LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC1700CMSIS Standard Peripheral Firmware Library

LPC1700CMSIS Standard Peripheral Firmware Library Manual Rev 2.02 - 30 Nov 2011
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  • Modules
  • Data Structures
  • Files
LPC1700CMSIS Standard Peripheral Firmware Library

This software package contains Standard Peripheral Firmware Driver Library for LPC1700. This package included Macros, Data Types, Structure Types and Functions that are useful in peripheral functionality application without deep-knowledge about LPC1700's peripherals.

The LPC1700CMSIS Standard Peripheral Firmware Library is also complaint with CMSIS.

Overview Manual

  • LPC1700CMSIS Library
    • Supported microcontrollers
    • Supported toolchains
      • LPC1000 Software Development Toolchain
    • Evaluation boards
    • Debugger
    • Acronyms
  • Package Description
    • Core
    • Drivers
    • Examples
    • MAKE section
    • Lib building
  • Examples Description
    • Example list
    • LPC1700CMSIS Example Description
  • About CMSIS (published by ARM)
    • CMSIS Introduction
    • CMSIS System View Description
    • CMSIS Debug Support
    • CMSIS History
    • CMSIS Release Note

NXP's License: Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

CMSIS's License

Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Modules

  • Data Structures
  • Files
Modules
Here is a list of all modules:
  • CMSIS
    • DSP Lib
      • Functions
        • Basic Math Functions
          • Vector Absolute Value
          • Vector Addition
          • Vector Dot Product
          • Vector Multiplication
          • Vector Negate
          • Vector Offset
          • Vector Scale
          • Vector Shift
          • Vector Subtraction
        • Fast Math Functions
          • Square Root
          • Cosine
          • Sine
        • Complex Math Functions
          • Complex Conjugate
          • Complex Dot Product
          • Complex Magnitude
          • Complex Magnitude Squared
          • Complex-by-Complex Multiplication
          • Complex-by-Real Multiplication
        • Filtering Functions
          • High Precision Q31 Biquad Cascade Filter
          • Biquad Cascade IIR Filters Using Direct Form I Structure
          • Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure
          • Convolution
          • Partial Convolution
          • Correlation
          • Finite Impulse Response (FIR) Decimator
          • Finite Impulse Response (FIR) Filters
          • Finite Impulse Response (FIR) Lattice Filters
          • Finite Impulse Response (FIR) Sparse Filters
          • Infinite Impulse Response (IIR) Lattice Filters
          • Least Mean Square (LMS) Filters
          • Normalized LMS Filters
          • Finite Impulse Response (FIR) Interpolator
        • Matrix Functions
          • Matrix Addition
          • Matrix Initialization
          • Matrix Inverse
          • Matrix Multiplication
          • Matrix Scale
          • Matrix Subtraction
          • Matrix Transpose
        • Transform Functions
          • Complex FFT Functions
          • DCT Type IV Functions
          • Real FFT Functions
        • Controller Functions
          • PID Motor Control
          • Vector Clarke Transform
          • Vector Inverse Clarke Transform
          • Vector Park Transform
          • Vector Inverse Park transform
          • Sine Cosine
        • Statistics Functions
          • Maximum
          • Mean
          • Minimum
          • Power
          • Root mean square (RMS)
          • Standard deviation
          • Variance
        • Support Functions
          • Vector Copy
          • Vector Fill
          • Convert 32-bit floating point value
          • Convert 16-bit Integer value
          • Convert 32-bit Integer value
          • Convert 8-bit Integer value
        • Interpolation Functions
          • Linear Interpolation
          • Bilinear Interpolation
      • Examples
        • Class Marks Example
        • Convolution Example
        • Dot Product Example
        • Frequency Bin Example
        • FIR Lowpass Filter Example
        • Graphic Audio Equalizer Example
        • Linear Interpolate Example
        • Matrix Example
        • Signal Convergence Example
        • SineCosine Example
        • Variance Example
    • CMSIS Core
      • CMSIS MISRA-C:2004 Compliance Exceptions
      • CMSIS Core Definitions
      • CMSIS Core Register
        • CMSIS Core
        • CMSIS NVIC
        • CMSIS SCB
        • CMSIS System Control and ID Register not in the SCB
        • CMSIS SysTick
        • CMSIS ITM
        • CMSIS Core Debug
      • CMSIS Core Function Interface
        • CMSIS Core NVIC Functions
        • CMSIS Core SysTick Functions
        • CMSIS Core Debug Functions
        • CMSIS Core Register Access Functions
      • CMSIS Core Instruction Interface
  • LPC17xx System
    • LPC17xx System Defines
    • LPC17xx System Public Variables
    • LPC17xx System Public Functions
  • LPC1700CMSIS Firmware Library
    • ADC (Analog-to-Digital Converter)
      • ADC Private Macros
      • ADC Public Types
      • ADC Public Functions
    • CAN (Control Area Network)
      • CAN Public Macros
      • CAN Private Macros
      • CAN Public Types
      • CAN Public Functions
      • CAN Private Variables
    • CLKPWR (Clock Power)
      • CLKPWR Public Macros
      • CLKPWR Private Macros
      • CLKPWR Public Functions
    • DAC (Digital-to-Analog Controller)
      • DAC Private Macros
      • DAC Public Types
      • DAC Public Functions
    • EMAC (Ethernet Media Access Controller)
      • EMAC Public Macros
      • EMAC Private Macros
      • EMAC Public Types
      • EMAC Public Functions
      • EMAC Private Variables
    • EXTI (External Interrupt)
      • EXTI Private Macros
      • EXTI Public Types
      • EXTI Public Functions
    • GPDMA (General Purpose Direct Memory Access)
      • GPDMA Public Macros
      • GPDMA Private Macros
      • GPDMA Public Types
      • GPDMA Public Functions
      • GPDMA Private Variables
    • GPIO (General Purpose Input/Output)
      • GPIO Public Macros
      • GPIO Public Types
      • GPIO Public Functions
    • I2C (Inter-IC Control bus)
      • I2C Private Macros
      • I2C Public Types
      • I2C Public Functions
      • I2C Private Types
    • I2S (Inter-IC Sound bus)
      • I2S Public Macros
      • I2S Private Macros
      • I2S Public Types
      • I2S Public Functions
    • LIBCFG_DEFAULT (Default Library Configuration)
      • LIBCFG_DEFAULT Public Macros
      • LIBCFG_DEFAULT Public Functions
    • MCPWM (Motor Control PWM)
      • MCPWM Public Macros
      • MCPWM Private Macros
      • MCPWM Public Types
      • MCPWM Public Functions
    • NVIC (Nested Vectored Interrupt Controller)
      • NVIC Public Functions
      • NVIC_Private_Macros
    • PINSEL (Pin Selection)
      • PINSEL Public Macros
      • PINSEL Private Macros
      • PINSEL Public Types
      • PINSEL Public Functions
    • PWM (Pulse Width Modulator)
      • PWM Private Macros
      • PWM Public Types
      • PWM Public Functions
    • QEI (Quadrature Encoder Interface)
      • QEI Public Macros
      • QEI Private Macros
      • QEI Public Types
      • QEI Public Functions
      • QEI Private Types
    • RIT (Repetitive Interrupt Timer)
      • RIT Private Macros
      • RIT Public Functions
    • RTC (Real Time Clock)
      • RTC Private Macros
      • RTC Public Types
      • RTC Public Functions
    • SPI (Serial Peripheral Interface)
      • SPI Public Macros
      • SPI Private Macros
      • SPI Public Types
      • SPI Public Functions
    • SSP (Synchronous Serial Port)
      • SSP Public Macros
      • SSP Private Macros
      • SSP Public Types
      • SSP Public Functions
    • SYSTICK (System Tick)
      • SYSTICK Private Macros
      • SYSTICK Public Functions
    • TIM (Timer)
      • TIM Private Macros
      • TIM Public Types
      • TIM Public Functions
    • UART (Universal Asynchronous Receiver/Transmitter)
      • UART Public Macros
      • UART Private Macros
      • UART Public Types
      • UART Public Functions
    • WDT (Watch-Dog Timer)
      • WDT Private Macros
      • WDT Public Types
      • WDT Public Functions
    • LPC_Types
      • LPC_Types Public Types
      • LPC_Types Public Macros
  • LPC1700CMSIS Examples
    • ADC
      • Burst
      • DMA
      • HardwareTrigger
      • INTERRUPT
      • Polling
    • CAN
      • CAN_LedControl
      • CAN_self_test
      • CAN_test_aflut
      • CAN_test_bypass_mode
      • CAN_test_two_kit
    • Cortex-M3
      • Bit-banding
      • MPU
      • Privilege_mode
    • DAC
      • DMA
      • SineWave
      • Speaker
      • WaveGenerate
    • EMAC
      • Easy_Web
      • EmacRaw
      • uIP
        • Clock interface
        • Protosockets library
        • Timer library
        • The uIP TCP/IP stack
          • uIP packet forwarding
          • uIP TCP throughput booster hack
          • uIP configuration functions
          • uIP initialization functions
          • uIP device driver functions
          • uIP application functions
          • uIP conversion functions
          • Variables used in uIP device drivers
          • uIP Address Resolution Protocol
          • Architecture specific uIP functions
        • Configuration options for uIP
        • Apps
          • Hello, world
          • DNS resolver
          • SMTP E-mail sender
          • Web client
          • Web server
        • Pt
          • Local continuations
    • GPDMA
      • Flash_2_Ram_Test
      • GPDMA_Sleep
      • Link_list
      • Ram_2_Ram_Test
    • GPIO
      • GPIO_Interrupt
      • LedBlinky
    • I2C
      • master
      • Master_Slave_Interrupt
      • Monitor
      • pca8581_polling
      • sc16is750_int
      • sc16is750_polling
      • slave
    • I2S
      • I2S_DMA
      • I2S_IRQ
      • I2S_MCLK
      • I2S_test_4_wire
      • I2S_two_kit
      • Polling
    • LCD
      • NOKIA6610_LCD
      • QVGA_TFT_LCD
    • MCPWM
      • MCPWMSimple
    • NVIC
      • Priority
      • VecTable_Relocation
    • PWM
      • Dual_Edge
      • Match_Interrupt
      • Single_Edge
    • PWR
      • EXTINT_Sleep
      • NMI_PowerDown
      • RTC_DeepPWD
      • WDT_DeepSleep
    • QEI
      • QEI_Velo
    • RIT
      • Interrupt
    • RTC
      • AlarmCntIncrInterrupt
      • Calibration
    • SPI
      • LoopBack
      • Master
      • sc16is750_int
      • sc16is750_polling
      • SDCard
      • slave
    • SSP
      • dma
      • Master
      • MicroWire
      • sc16is750_int
      • sc16is750_polling
      • Slave
      • TI
    • SysTick
      • 10ms_base
      • STCLK
    • TIMER
      • Capture
      • FreqMeasure
      • Gen_Diff_Delay
      • Gen_Diff_Freqs
      • Interrupt_Match
      • Polling_Match
      • PWMSignal
    • UART
      • IrDA
        • Receive
        • Transmit
      • AutoBaud
      • DMA
      • HWFlowControl
      • Interrupt
      • Polling
      • RS485_Master
      • RS485_Slave
      • UART1_FullModem
    • USBDEV
      • USBAudio
      • USBCDC
      • USBHID
      • USBMassStorage
    • WDT
      • INTERRUPT
      • RESET
Generated on Mon Nov 28 2011 11:15:29 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS

Modules
CMSIS

Modules

DSP Lib
CMSIS Core
Generated on Mon Nov 28 2011 11:15:18 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DSP Lib

Modules
DSP Lib
CMSIS

Modules

Functions
Examples
Generated on Mon Nov 28 2011 11:15:18 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Functions

Modules
Functions
DSP Lib

Modules

Basic Math Functions
Fast Math Functions
Complex Math Functions
Filtering Functions
Matrix Functions
Transform Functions
Controller Functions
Statistics Functions
Support Functions
Interpolation Functions
Generated on Mon Nov 28 2011 11:15:18 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Basic Math Functions

Modules
Basic Math Functions
Functions

Modules

Vector Absolute Value
Vector Addition
Vector Dot Product
Vector Multiplication
Vector Negate
Vector Offset
Vector Scale
Vector Shift
Vector Subtraction
Generated on Mon Nov 28 2011 11:15:25 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Vector Absolute Value

Functions
Vector Absolute Value
Basic Math Functions

Functions

void | arm_abs_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Floating-point vector absolute value.
void | arm_abs_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Q15 vector absolute value.
void | arm_abs_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Q31 vector absolute value.
void | arm_abs_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
Q7 vector absolute value.

Detailed Description

Computes the absolute value of a vector on an element-by-element basis.

     pDst[n] = abs(pSrcA[n]),   0 <= n < blockSize.

The operation can be done in-place by setting the input and output pointers to the same buffer. There are separate functions for floating-point, Q7, Q15, and Q31 data types.

Function Documentation

void arm_abs_f32 | ( | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Floating-point vector absolute value.

Parameters:
[in] | *pSrc | points to the input buffer
[out] | *pDst | points to the output buffer
[in] | blockSize | number of samples in each vector
Returns:
none.

Definition at line 66 of file arm_abs_f32.c.

void arm_abs_q15 | ( | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q15 vector absolute value.

Parameters:
[in] | *pSrc | points to the input buffer
[out] | *pDst | points to the output buffer
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.

Definition at line 57 of file arm_abs_q15.c.

void arm_abs_q31 | ( | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q31 vector absolute value.

Parameters:
[in] | *pSrc | points to the input buffer
[out] | *pDst | points to the output buffer
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.

Definition at line 58 of file arm_abs_q31.c.

void arm_abs_q7 | ( | q7_t * | pSrc,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q7 vector absolute value.

Parameters:
[in] | *pSrc | points to the input buffer
[out] | *pDst | points to the output buffer
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.

Definition at line 57 of file arm_abs_q7.c.

Generated on Mon Nov 28 2011 11:15:26 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Vector Addition

Functions
Vector Addition
Basic Math Functions

Functions

void | arm_add_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
Floating-point vector addition.
void | arm_add_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
Q15 vector addition.
void | arm_add_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
Q31 vector addition.
void | arm_add_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
Q7 vector addition.

Detailed Description

Element-by-element addition of two vectors.

     pDst[n] = pSrcA[n] + pSrcB[n],   0 <= n < blockSize.

There are separate functions for floating-point, Q7, Q15, and Q31 data types.

Function Documentation

void arm_add_f32 | ( | float32_t * | pSrcA,
 |  | float32_t * | pSrcB,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Floating-point vector addition.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Definition at line 65 of file arm_add_f32.c.

void arm_add_q15 | ( | q15_t * | pSrcA,
 |  | q15_t * | pSrcB,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q15 vector addition.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.

Definition at line 58 of file arm_add_q15.c.

void arm_add_q31 | ( | q31_t * | pSrcA,
 |  | q31_t * | pSrcB,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q31 vector addition.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.

Definition at line 59 of file arm_add_q31.c.

void arm_add_q7 | ( | q7_t * | pSrcA,
 |  | q7_t * | pSrcB,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q7 vector addition.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.

Definition at line 58 of file arm_add_q7.c.

Generated on Mon Nov 28 2011 11:15:26 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Vector Dot Product

Functions
Vector Dot Product
Basic Math Functions

Functions

void | arm_dot_prod_f32 (float32_t *pSrcA, float32_t *pSrcB, uint32_t blockSize, float32_t *result)
Dot product of floating-point vectors.
void | arm_dot_prod_q15 (q15_t *pSrcA, q15_t *pSrcB, uint32_t blockSize, q63_t *result)
Dot product of Q15 vectors.
void | arm_dot_prod_q31 (q31_t *pSrcA, q31_t *pSrcB, uint32_t blockSize, q63_t *result)
Dot product of Q31 vectors.
void | arm_dot_prod_q7 (q7_t *pSrcA, q7_t *pSrcB, uint32_t blockSize, q31_t *result)
Dot product of Q7 vectors.

Detailed Description

Computes the dot product of two vectors. The vectors are multiplied element-by-element and then summed. There are separate functions for floating-point, Q7, Q15, and Q31 data types.

Function Documentation

void arm_dot_prod_f32 | ( | float32_t * | pSrcA,
 |  | float32_t * | pSrcB,
 |  | uint32_t | blockSize,
 |  | float32_t * | result
 | ) |  |

Dot product of floating-point vectors.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[in] | blockSize | number of samples in each vector
[out] | *result | output result returned here
Returns:
none.

Definition at line 62 of file arm_dot_prod_f32.c.

void arm_dot_prod_q15 | ( | q15_t * | pSrcA,
 |  | q15_t * | pSrcB,
 |  | uint32_t | blockSize,
 |  | q63_t * | result
 | ) |  |

Dot product of Q15 vectors.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[in] | blockSize | number of samples in each vector
[out] | *result | output result returned here
Returns:
none.

Scaling and Overflow Behavior:

The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these results are added to a 64-bit accumulator in 34.30 format. Nonsaturating additions are used and given that there are 33 guard bits in the accumulator there is no risk of overflow. The return result is in 34.30 format.

Definition at line 61 of file arm_dot_prod_q15.c.

void arm_dot_prod_q31 | ( | q31_t * | pSrcA,
 |  | q31_t * | pSrcB,
 |  | uint32_t | blockSize,
 |  | q63_t * | result
 | ) |  |

Dot product of Q31 vectors.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[in] | blockSize | number of samples in each vector
[out] | *result | output result returned here
Returns:
none.

Scaling and Overflow Behavior:

The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these are truncated to 2.48 format by discarding the lower 14 bits. The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. There are 15 guard bits in the accumulator and there is no risk of overflow as long as the length of the vectors is less than 2^16 elements. The return result is in 16.48 format.

Definition at line 62 of file arm_dot_prod_q31.c.

void arm_dot_prod_q7 | ( | q7_t * | pSrcA,
 |  | q7_t * | pSrcB,
 |  | uint32_t | blockSize,
 |  | q31_t * | result
 | ) |  |

Dot product of Q7 vectors.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[in] | blockSize | number of samples in each vector
[out] | *result | output result returned here
Returns:
none.

Scaling and Overflow Behavior:

The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these results are added to an accumulator in 18.14 format. Nonsaturating additions are used and there is no danger of wrap around as long as the vectors are less than 2^18 elements long. The return result is in 18.14 format.

Definition at line 61 of file arm_dot_prod_q7.c.

Generated on Mon Nov 28 2011 11:15:26 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Vector Multiplication

Functions
Vector Multiplication
Basic Math Functions

Functions

void | arm_mult_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
Floating-point vector multiplication.
void | arm_mult_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
Q15 vector multiplication.
void | arm_mult_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
Q31 vector multiplication.
void | arm_mult_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
Q7 vector multiplication.

Detailed Description

Element-by-element multiplication of two vectors.

     pDst[n] = pSrcA[n] * pSrcB[n],   0 <= n < blockSize.

There are separate functions for floating-point, Q7, Q15, and Q31 data types.

Function Documentation

void arm_mult_f32 | ( | float32_t * | pSrcA,
 |  | float32_t * | pSrcB,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Floating-point vector multiplication.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Definition at line 68 of file arm_mult_f32.c.

void arm_mult_q15 | ( | q15_t * | pSrcA,
 |  | q15_t * | pSrcB,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q15 vector multiplication.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.

Definition at line 62 of file arm_mult_q15.c.

void arm_mult_q31 | ( | q31_t * | pSrcA,
 |  | q31_t * | pSrcB,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q31 vector multiplication.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.

Definition at line 61 of file arm_mult_q31.c.

void arm_mult_q7 | ( | q7_t * | pSrcA,
 |  | q7_t * | pSrcB,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q7 vector multiplication.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.

Definition at line 64 of file arm_mult_q7.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Vector Negate

Functions
Vector Negate
Basic Math Functions

Functions

void | arm_negate_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Negates the elements of a floating-point vector.
void | arm_negate_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Negates the elements of a Q15 vector.
void | arm_negate_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Negates the elements of a Q31 vector.
void | arm_negate_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
Negates the elements of a Q7 vector.

Detailed Description

Negates the elements of a vector.

     pDst[n] = -pSrc[n],   0 <= n < blockSize.

Function Documentation

void arm_negate_f32 | ( | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Negates the elements of a floating-point vector.

Parameters:
[in] | *pSrc | points to the input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Definition at line 62 of file arm_negate_f32.c.

void arm_negate_q15 | ( | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Negates the elements of a Q15 vector.

Parameters:
[in] | *pSrc | points to the input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.

Definition at line 57 of file arm_negate_q15.c.

void arm_negate_q31 | ( | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Negates the elements of a Q31 vector.

Parameters:
[in] | *pSrc | points to the input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.

Definition at line 57 of file arm_negate_q31.c.

void arm_negate_q7 | ( | q7_t * | pSrc,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Negates the elements of a Q7 vector.

Parameters:
[in] | *pSrc | points to the input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.

Definition at line 57 of file arm_negate_q7.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Vector Offset

Functions
Vector Offset
Basic Math Functions

Functions

void | arm_offset_f32 (float32_t *pSrc, float32_t offset, float32_t *pDst, uint32_t blockSize)
Adds a constant offset to a floating-point vector.
void | arm_offset_q15 (q15_t *pSrc, q15_t offset, q15_t *pDst, uint32_t blockSize)
Adds a constant offset to a Q15 vector.
void | arm_offset_q31 (q31_t *pSrc, q31_t offset, q31_t *pDst, uint32_t blockSize)
Adds a constant offset to a Q31 vector.
void | arm_offset_q7 (q7_t *pSrc, q7_t offset, q7_t *pDst, uint32_t blockSize)
Adds a constant offset to a Q7 vector.

Detailed Description

Adds a constant offset to each element of a vector.

     pDst[n] = pSrc[n] + offset,   0 <= n < blockSize.

There are separate functions for floating-point, Q7, Q15, and Q31 data types.

Function Documentation

void arm_offset_f32 | ( | float32_t * | pSrc,
 |  | float32_t | offset,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Adds a constant offset to a floating-point vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | offset | is the offset to be added
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Definition at line 66 of file arm_offset_f32.c.

void arm_offset_q15 | ( | q15_t * | pSrc,
 |  | q15_t | offset,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Adds a constant offset to a Q15 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | offset | is the offset to be added
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.

Definition at line 58 of file arm_offset_q15.c.

void arm_offset_q31 | ( | q31_t * | pSrc,
 |  | q31_t | offset,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Adds a constant offset to a Q31 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | offset | is the offset to be added
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.

Definition at line 58 of file arm_offset_q31.c.

void arm_offset_q7 | ( | q7_t * | pSrc,
 |  | q7_t | offset,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Adds a constant offset to a Q7 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | offset | is the offset to be added
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] are saturated.

Definition at line 58 of file arm_offset_q7.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Vector Scale

Functions
Vector Scale
Basic Math Functions

Functions

void | arm_scale_f32 (float32_t *pSrc, float32_t scale, float32_t *pDst, uint32_t blockSize)
Multiplies a floating-point vector by a scalar.
void | arm_scale_q15 (q15_t *pSrc, q15_t scaleFract, int8_t shift, q15_t *pDst, uint32_t blockSize)
Multiplies a Q15 vector by a scalar.
void | arm_scale_q31 (q31_t *pSrc, q31_t scaleFract, int8_t shift, q31_t *pDst, uint32_t blockSize)
Multiplies a Q31 vector by a scalar.
void | arm_scale_q7 (q7_t *pSrc, q7_t scaleFract, int8_t shift, q7_t *pDst, uint32_t blockSize)
Multiplies a Q7 vector by a scalar.

Detailed Description

Multiply a vector by a scalar value. For floating-point data, the algorithm used is:

     pDst[n] = pSrc[n] * scale,   0 <= n < blockSize.

In the fixed-point Q7, Q15, and Q31 functions, scale is represented by a fractional multiplication scaleFract and an arithmetic shift shift. The shift allows the gain of the scaling operation to exceed 1.0. The algorithm used with fixed-point data is:

     pDst[n] = (pSrc[n] * scaleFract) << shift,   0 <= n < blockSize.

The overall scale factor applied to the fixed-point data is

     scale = scaleFract * 2^shift.

Function Documentation

void arm_scale_f32 | ( | float32_t * | pSrc,
 |  | float32_t | scale,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Multiplies a floating-point vector by a scalar.

Parameters:
[in] | *pSrc | points to the input vector
[in] | scale | scale factor to be applied
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Definition at line 78 of file arm_scale_f32.c.

void arm_scale_q15 | ( | q15_t * | pSrc,
 |  | q15_t | scaleFract,
 |  | int8_t | shift,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Multiplies a Q15 vector by a scalar.

Parameters:
[in] | *pSrc | points to the input vector
[in] | scaleFract | fractional portion of the scale value
[in] | shift | number of bits to shift the result by
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The input data *pSrc and scaleFract are in 1.15 format. These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.

Definition at line 60 of file arm_scale_q15.c.

void arm_scale_q31 | ( | q31_t * | pSrc,
 |  | q31_t | scaleFract,
 |  | int8_t | shift,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Multiplies a Q31 vector by a scalar.

Parameters:
[in] | *pSrc | points to the input vector
[in] | scaleFract | fractional portion of the scale value
[in] | shift | number of bits to shift the result by
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The input data *pSrc and scaleFract are in 1.31 format. These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.

Definition at line 59 of file arm_scale_q31.c.

void arm_scale_q7 | ( | q7_t * | pSrc,
 |  | q7_t | scaleFract,
 |  | int8_t | shift,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Multiplies a Q7 vector by a scalar.

Parameters:
[in] | *pSrc | points to the input vector
[in] | scaleFract | fractional portion of the scale value
[in] | shift | number of bits to shift the result by
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The input data *pSrc and scaleFract are in 1.7 format. These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format.

Definition at line 59 of file arm_scale_q7.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Vector Shift

Functions
Vector Shift
Basic Math Functions

Functions

void | arm_shift_q15 (q15_t *pSrc, int8_t shiftBits, q15_t *pDst, uint32_t blockSize)
Shifts the elements of a Q15 vector a specified number of bits.
void | arm_shift_q31 (q31_t *pSrc, int8_t shiftBits, q31_t *pDst, uint32_t blockSize)
Shifts the elements of a Q31 vector a specified number of bits.
void | arm_shift_q7 (q7_t *pSrc, int8_t shiftBits, q7_t *pDst, uint32_t blockSize)
Shifts the elements of a Q7 vector a specified number of bits.

Detailed Description

Shifts the elements of a fixed-point vector by a specified number of bits. There are separate functions for Q7, Q15, and Q31 data types. The underlying algorithm used is:

     pDst[n] = pSrc[n] << shift,   0 <= n < blockSize.

If shift is positive then the elements of the vector are shifted to the left. If shift is negative then the elements of the vector are shifted to the right.

Function Documentation

void arm_shift_q15 | ( | q15_t * | pSrc,
 |  | int8_t | shiftBits,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Shifts the elements of a Q15 vector a specified number of bits.

Parameters:
[in] | *pSrc | points to the input vector
[in] | shiftBits | number of bits to shift. A positive value shifts left; a negative value shifts right.
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.

Definition at line 58 of file arm_shift_q15.c.

void arm_shift_q31 | ( | q31_t * | pSrc,
 |  | int8_t | shiftBits,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Shifts the elements of a Q31 vector a specified number of bits.

Parameters:
[in] | *pSrc | points to the input vector
[in] | shiftBits | number of bits to shift. A positive value shifts left; a negative value shifts right.
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.

Definition at line 73 of file arm_shift_q31.c.

void arm_shift_q7 | ( | q7_t * | pSrc,
 |  | int8_t | shiftBits,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Shifts the elements of a Q7 vector a specified number of bits.

Parameters:
[in] | *pSrc | points to the input vector
[in] | shiftBits | number of bits to shift. A positive value shifts left; a negative value shifts right.
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x8 0x7F] will be saturated.

Definition at line 59 of file arm_shift_q7.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Vector Subtraction

Functions
Vector Subtraction
Basic Math Functions

Functions

void | arm_sub_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
Floating-point vector subtraction.
void | arm_sub_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
Q15 vector subtraction.
void | arm_sub_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
Q31 vector subtraction.
void | arm_sub_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
Q7 vector subtraction.

Detailed Description

Element-by-element subtraction of two vectors.

     pDst[n] = pSrcA[n] - pSrcB[n],   0 <= n < blockSize.

There are separate functions for floating-point, Q7, Q15, and Q31 data types.

Function Documentation

void arm_sub_f32 | ( | float32_t * | pSrcA,
 |  | float32_t * | pSrcB,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Floating-point vector subtraction.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Definition at line 66 of file arm_sub_f32.c.

void arm_sub_q15 | ( | q15_t * | pSrcA,
 |  | q15_t * | pSrcB,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q15 vector subtraction.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.

Definition at line 58 of file arm_sub_q15.c.

void arm_sub_q31 | ( | q31_t * | pSrcA,
 |  | q31_t * | pSrcB,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q31 vector subtraction.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.

Definition at line 58 of file arm_sub_q31.c.

void arm_sub_q7 | ( | q7_t * | pSrcA,
 |  | q7_t * | pSrcB,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q7 vector subtraction.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.

Definition at line 58 of file arm_sub_q7.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Fast Math Functions

Modules
Fast Math Functions
Functions

Modules

Square Root
Cosine
Sine

Detailed Description

This set of functions provides a fast approximation to sine, cosine, and square root. As compared to most of the other functions in the CMSIS math library, the fast math functions operate on individual values and not arrays. There are separate functions for Q15, Q31, and floating-point data.

Generated on Mon Nov 28 2011 11:15:25 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Square Root

Functions
Square Root
Fast Math Functions

Functions

arm_status | arm_sqrt_q31 (q31_t in, q31_t *pOut)
Q31 square root function.
arm_status | arm_sqrt_q15 (q15_t in, q15_t *pOut)
Q15 square root function.

Detailed Description

Computes the square root of a number. There are separate functions for Q15, Q31, and floating-point data types. The square root function is computed using the Newton-Raphson algorithm. This is an iterative algorithm of the form:

      x1 = x0 - f(x0)/f'(x0)

where x1 is the current estimate, x0 is the previous estimate and f'(x0) is the derivative of f() evaluated at x0. For the square root function, the algorithm reduces to:

     x0 = in/2                         [initial guess]
     x1 = 1/2 * ( x0 + in / x0)        [each iteration]

Function Documentation

arm_status arm_sqrt_q15 | ( | q15_t | in,
 |  | q15_t * | pOut
 | ) |  |

Q15 square root function.

Parameters:
[in] | in | input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF.
[out] | *pOut | square root of input value.
Returns:
The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if in is negative value and returns zero output for negative values.

Definition at line 51 of file arm_sqrt_q15.c.

arm_status arm_sqrt_q31 | ( | q31_t | in,
 |  | q31_t * | pOut
 | ) |  |

Q31 square root function.

Parameters:
[in] | in | input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.
[out] | *pOut | square root of input value.
Returns:
The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if in is negative value and returns zero output for negative values.

Definition at line 47 of file arm_sqrt_q31.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Cosine

Functions
Cosine
Fast Math Functions

Functions

float32_t | arm_cos_f32 (float32_t x)
Fast approximation to the trigonometric cosine function for floating-point data.
q15_t | arm_cos_q15 (q15_t x)
Fast approximation to the trigonometric cosine function for Q15 data.
q31_t | arm_cos_q31 (q31_t x)
Fast approximation to the trigonometric cosine function for Q31 data.

Detailed Description

Computes the trigonometric cosine function using a combination of table lookup and cubic interpolation. There are separate functions for Q15, Q31, and floating-point data types. The input to the floating-point version is in radians while the fixed-point Q15 and Q31 have a scaled input with the range [0 1) mapping to [0 2*pi).

The implementation is based on table lookup using 256 values together with cubic interpolation. The steps used are:

  1. Calculation of the nearest integer table index
  2. Fetch the four table values a, b, c, and d
  3. Compute the fractional portion (fract) of the table index.
  4. Calculation of wa, wb, wc, wd
  5. The final result equals a*wa + b*wb + c*wc + d*wd

where

    a=Table[index-1];
    b=Table[index+0];
    c=Table[index+1];
    d=Table[index+2];

and

    wa=-(1/6)*fract.^3 + (1/2)*fract.^2 - (1/3)*fract;
    wb=(1/2)*fract.^3 - fract.^2 - (1/2)*fract + 1;
    wc=-(1/2)*fract.^3+(1/2)*fract.^2+fract;
    wd=(1/6)*fract.^3 - (1/6)*fract;

Function Documentation

float32_t arm_cos_f32 ( float32_t x )

Fast approximation to the trigonometric cosine function for floating-point data.

Parameters:
[in] x input value in radians.
Returns:
cos(x).

Definition at line 192 of file arm_cos_f32.c.

q15_t arm_cos_q15 ( q15_t x )

Fast approximation to the trigonometric cosine function for Q15 data.

Parameters:
[in] x Scaled input value in radians.
Returns:
cos(x).

The Q15 input value is in the range [0 +1) and is mapped to a radian value in the range [0 2*pi).

Definition at line 105 of file arm_cos_q15.c.

q31_t arm_cos_q31 ( q31_t x )

Fast approximation to the trigonometric cosine function for Q31 data.

Parameters:
[in] x Scaled input value in radians.
Returns:
cos(x).

The Q31 input value is in the range [0 +1) and is mapped to a radian value in the range [0 2*pi).

Definition at line 136 of file arm_cos_q31.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Sine

Functions
Sine
Fast Math Functions

Functions

float32_t | arm_sin_f32 (float32_t x)
Fast approximation to the trigonometric sine function for floating-point data.
q15_t | arm_sin_q15 (q15_t x)
Fast approximation to the trigonometric sine function for Q15 data.
q31_t | arm_sin_q31 (q31_t x)
Fast approximation to the trigonometric sine function for Q31 data.

Detailed Description

Computes the trigonometric sine function using a combination of table lookup and cubic interpolation. There are separate functions for Q15, Q31, and floating-point data types. The input to the floating-point version is in radians while the fixed-point Q15 and Q31 have a scaled input with the range [0 1) mapping to [0 2*pi).

The implementation is based on table lookup using 256 values together with cubic interpolation. The steps used are:

  1. Calculation of the nearest integer table index
  2. Fetch the four table values a, b, c, and d
  3. Compute the fractional portion (fract) of the table index.
  4. Calculation of wa, wb, wc, wd
  5. The final result equals a*wa + b*wb + c*wc + d*wd

where

    a=Table[index-1];
    b=Table[index+0];
    c=Table[index+1];
    d=Table[index+2];

and

    wa=-(1/6)*fract.^3 + (1/2)*fract.^2 - (1/3)*fract;
    wb=(1/2)*fract.^3 - fract.^2 - (1/2)*fract + 1;
    wc=-(1/2)*fract.^3+(1/2)*fract.^2+fract;
    wd=(1/6)*fract.^3 - (1/6)*fract;

Function Documentation

float32_t arm_sin_f32 ( float32_t x )

Fast approximation to the trigonometric sine function for floating-point data.

Parameters:
[in] x input value in radians.
Returns:
sin(x).

Definition at line 195 of file arm_sin_f32.c.

q15_t arm_sin_q15 ( q15_t x )

Fast approximation to the trigonometric sine function for Q15 data.

Parameters:
[in] x Scaled input value in radians.
Returns:
sin(x).

The Q15 input value is in the range [0 +1) and is mapped to a radian value in the range [0 2*pi).

Definition at line 106 of file arm_sin_q15.c.

q31_t arm_sin_q31 ( q31_t x )

Fast approximation to the trigonometric sine function for Q31 data.

Parameters:
[in] x Scaled input value in radians.
Returns:
sin(x).

The Q31 input value is in the range [0 +1) and is mapped to a radian value in the range [0 2*pi).

Definition at line 136 of file arm_sin_q31.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Complex Math Functions

Modules
Complex Math Functions
Functions

Modules

Complex Conjugate
Complex Dot Product
Complex Magnitude
Complex Magnitude Squared
Complex-by-Complex Multiplication
Complex-by-Real Multiplication

Detailed Description

This set of functions operates on complex data vectors. The data in the complex arrays is stored in an interleaved fashion (real, imag, real, imag, ...). In the API functions, the number of samples in a complex array refers to the number of complex values; the array contains twice this number of real values.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Complex Conjugate

Functions
Complex Conjugate
Complex Math Functions

Functions

void | arm_cmplx_conj_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
Floating-point complex conjugate.
void | arm_cmplx_conj_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
Q15 complex conjugate.
void | arm_cmplx_conj_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
Q31 complex conjugate.

Detailed Description

Conjugates the elements of a complex data vector.

The pSrc points to the source data and pDst points to the where the result should be written. numSamples specifies the number of complex samples and the data in each array is stored in an interleaved fashion (real, imag, real, imag, ...). Each array has a total of 2*numSamples values. The underlying algorithm is used:

 for(n=0; n<numSamples; n++) {
     pDst[(2*n)+0)] = pSrc[(2*n)+0];     // real part
     pDst[(2*n)+1)] = -pSrc[(2*n)+1];    // imag part
 }

There are separate functions for floating-point, Q15, and Q31 data types.

Function Documentation

void arm_cmplx_conj_f32 | ( | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Floating-point complex conjugate.

Parameters:
*pSrc | points to the input vector
*pDst | points to the output vector
numSamples | number of complex samples in each vector
Returns:
none.

Definition at line 72 of file arm_cmplx_conj_f32.c.

void arm_cmplx_conj_q15 | ( | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Q15 complex conjugate.

Parameters:
*pSrc | points to the input vector
*pDst | points to the output vector
numSamples | number of complex samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.

Definition at line 54 of file arm_cmplx_conj_q15.c.

void arm_cmplx_conj_q31 | ( | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Q31 complex conjugate.

Parameters:
*pSrc | points to the input vector
*pDst | points to the output vector
numSamples | number of complex samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.

Definition at line 54 of file arm_cmplx_conj_q31.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Complex Dot Product

Functions
Complex Dot Product
Complex Math Functions

Functions

void | arm_cmplx_dot_prod_f32 (float32_t *pSrcA, float32_t *pSrcB, uint32_t numSamples, float32_t *realResult, float32_t *imagResult)
Floating-point complex dot product.
void | arm_cmplx_dot_prod_q15 (q15_t *pSrcA, q15_t *pSrcB, uint32_t numSamples, q31_t *realResult, q31_t *imagResult)
Q15 complex dot product.
void | arm_cmplx_dot_prod_q31 (q31_t *pSrcA, q31_t *pSrcB, uint32_t numSamples, q63_t *realResult, q63_t *imagResult)
Q31 complex dot product.

Detailed Description

Computes the dot product of two complex vectors. The vectors are multiplied element-by-element and then summed.

The pSrcA points to the first complex input vector and pSrcB points to the second complex input vector. numSamples specifies the number of complex samples and the data in each array is stored in an interleaved fashion (real, imag, real, imag, ...). Each array has a total of 2*numSamples values.

The underlying algorithm is used:

 realResult=0;
 imagResult=0;
 for(n=0; n<numSamples; n++) {
     realResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+0] - pSrcA[(2*n)+1]*pSrcB[(2*n)+1];
     imagResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+1] + pSrcA[(2*n)+1]*pSrcB[(2*n)+0];
 }

There are separate functions for floating-point, Q15, and Q31 data types.

Function Documentation

void arm_cmplx_dot_prod_f32 | ( | float32_t * | pSrcA,
 |  | float32_t * | pSrcB,
 |  | uint32_t | numSamples,
 |  | float32_t * | realResult,
 |  | float32_t * | imagResult
 | ) |  |

Floating-point complex dot product.

Parameters:
*pSrcA | points to the first input vector
*pSrcB | points to the second input vector
numSamples | number of complex samples in each vector
*realResult | real part of the result returned here
*imagResult | imaginary part of the result returned here
Returns:
none.

Definition at line 77 of file arm_cmplx_dot_prod_f32.c.

void arm_cmplx_dot_prod_q15 | ( | q15_t * | pSrcA,
 |  | q15_t * | pSrcB,
 |  | uint32_t | numSamples,
 |  | q31_t * | realResult,
 |  | q31_t * | imagResult
 | ) |  |

Q15 complex dot product.

Parameters:
*pSrcA | points to the first input vector
*pSrcB | points to the second input vector
numSamples | number of complex samples in each vector
*realResult | real part of the result returned here
*imagResult | imaginary part of the result returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result. These are accumulated in a 64-bit accumulator with 34.30 precision. As a final step, the accumulators are converted to 8.24 format. The return results realResult and imagResult are in 8.24 format.

Definition at line 59 of file arm_cmplx_dot_prod_q15.c.

void arm_cmplx_dot_prod_q31 | ( | q31_t * | pSrcA,
 |  | q31_t * | pSrcB,
 |  | uint32_t | numSamples,
 |  | q63_t * | realResult,
 |  | q63_t * | imagResult
 | ) |  |

Q31 complex dot product.

Parameters:
*pSrcA | points to the first input vector
*pSrcB | points to the second input vector
numSamples | number of complex samples in each vector
*realResult | real part of the result returned here
*imagResult | imaginary part of the result returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format. The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits. Additions are nonsaturating and no overflow will occur as long as numSamples is less than 32768. The return results realResult and imagResult are in 16.48 format. Input down scaling is not required.

Definition at line 60 of file arm_cmplx_dot_prod_q31.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Complex Magnitude

Functions
Complex Magnitude
Complex Math Functions

Functions

void | arm_cmplx_mag_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
Floating-point complex magnitude.
void | arm_cmplx_mag_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
Q15 complex magnitude.
void | arm_cmplx_mag_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
Q31 complex magnitude.

Detailed Description

Computes the magnitude of the elements of a complex data vector.

The pSrc points to the source data and pDst points to the where the result should be written. numSamples specifies the number of complex samples in the input array and the data is stored in an interleaved fashion (real, imag, real, imag, ...). The input array has a total of 2*numSamples values; the output array has a total of numSamples values. The underlying algorithm is used:

 for(n=0; n<numSamples; n++) {
     pDst[n] = sqrt(pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2);
 }

There are separate functions for floating-point, Q15, and Q31 data types.

Function Documentation

void arm_cmplx_mag_f32 | ( | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Floating-point complex magnitude.

Parameters:
[in] | *pSrc | points to complex input buffer
[out] | *pDst | points to real output buffer
[in] | numSamples | number of complex samples in the input vector
Returns:
none.

Definition at line 73 of file arm_cmplx_mag_f32.c.

void arm_cmplx_mag_q15 | ( | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Q15 complex magnitude.

Parameters:
*pSrc | points to the complex input vector
*pDst | points to the real output vector
numSamples | number of complex samples in the input vector
Returns:
none.

Scaling and Overflow Behavior:

The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format.

Definition at line 54 of file arm_cmplx_mag_q15.c.

void arm_cmplx_mag_q31 | ( | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Q31 complex magnitude.

Parameters:
*pSrc | points to the complex input vector
*pDst | points to the real output vector
numSamples | number of complex samples in the input vector
Returns:
none.

Scaling and Overflow Behavior:

The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format. Input down scaling is not required.

Definition at line 54 of file arm_cmplx_mag_q31.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Complex Magnitude Squared

Functions
Complex Magnitude Squared
Complex Math Functions

Functions

void | arm_cmplx_mag_squared_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
Floating-point complex magnitude squared.
void | arm_cmplx_mag_squared_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
Q15 complex magnitude squared.
void | arm_cmplx_mag_squared_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
Q31 complex magnitude squared.

Detailed Description

Computes the magnitude squared of the elements of a complex data vector.

The pSrc points to the source data and pDst points to the where the result should be written. numSamples specifies the number of complex samples in the input array and the data is stored in an interleaved fashion (real, imag, real, imag, ...). The input array has a total of 2*numSamples values; the output array has a total of numSamples values.

The underlying algorithm is used:

 for(n=0; n<numSamples; n++) {
     pDst[n] = pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2;
 }

There are separate functions for floating-point, Q15, and Q31 data types.

Function Documentation

void arm_cmplx_mag_squared_f32 | ( | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Floating-point complex magnitude squared.

Parameters:
[in] | *pSrc | points to the complex input vector
[out] | *pDst | points to the real output vector
[in] | numSamples | number of complex samples in the input vector
Returns:
none.

Definition at line 74 of file arm_cmplx_mag_squared_f32.c.

void arm_cmplx_mag_squared_q15 | ( | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Q15 complex magnitude squared.

Parameters:
*pSrc | points to the complex input vector
*pDst | points to the real output vector
numSamples | number of complex samples in the input vector
Returns:
none.

Scaling and Overflow Behavior:

The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.

Definition at line 53 of file arm_cmplx_mag_squared_q15.c.

void arm_cmplx_mag_squared_q31 | ( | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Q31 complex magnitude squared.

Parameters:
*pSrc | points to the complex input vector
*pDst | points to the real output vector
numSamples | number of complex samples in the input vector
Returns:
none.

Scaling and Overflow Behavior:

The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format. Input down scaling is not required.

Definition at line 55 of file arm_cmplx_mag_squared_q31.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Complex-by-Complex Multiplication

Functions
Complex-by-Complex Multiplication
Complex Math Functions

Functions

void | arm_cmplx_mult_cmplx_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t numSamples)
Floating-point complex-by-complex multiplication.
void | arm_cmplx_mult_cmplx_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t numSamples)
Q15 complex-by-complex multiplication.
void | arm_cmplx_mult_cmplx_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t numSamples)
Q31 complex-by-complex multiplication.

Detailed Description

Multiplies a complex vector by another complex vector and generates a complex result. The data in the complex arrays is stored in an interleaved fashion (real, imag, real, imag, ...). The parameter numSamples represents the number of complex samples processed. The complex arrays have a total of 2*numSamples real values.

The underlying algorithm is used:

 for(n=0; n<numSamples; n++) {
     pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
     pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
 }

There are separate functions for floating-point, Q15, and Q31 data types.

Function Documentation

void arm_cmplx_mult_cmplx_f32 | ( | float32_t * | pSrcA,
 |  | float32_t * | pSrcB,
 |  | float32_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Floating-point complex-by-complex multiplication.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | numSamples | number of complex samples in each vector
Returns:
none.

Definition at line 73 of file arm_cmplx_mult_cmplx_f32.c.

void arm_cmplx_mult_cmplx_q15 | ( | q15_t * | pSrcA,
 |  | q15_t * | pSrcB,
 |  | q15_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Q15 complex-by-complex multiplication.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | numSamples | number of complex samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.

Definition at line 54 of file arm_cmplx_mult_cmplx_q15.c.

void arm_cmplx_mult_cmplx_q31 | ( | q31_t * | pSrcA,
 |  | q31_t * | pSrcB,
 |  | q31_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Q31 complex-by-complex multiplication.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | numSamples | number of complex samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format. Input down scaling is not required.

Definition at line 56 of file arm_cmplx_mult_cmplx_q31.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Complex-by-Real Multiplication

Functions
Complex-by-Real Multiplication
Complex Math Functions

Functions

void | arm_cmplx_mult_real_f32 (float32_t *pSrcCmplx, float32_t *pSrcReal, float32_t *pCmplxDst, uint32_t numSamples)
Floating-point complex-by-real multiplication.
void | arm_cmplx_mult_real_q15 (q15_t *pSrcCmplx, q15_t *pSrcReal, q15_t *pCmplxDst, uint32_t numSamples)
Q15 complex-by-real multiplication.
void | arm_cmplx_mult_real_q31 (q31_t *pSrcCmplx, q31_t *pSrcReal, q31_t *pCmplxDst, uint32_t numSamples)
Q31 complex-by-real multiplication.

Detailed Description

Multiplies a complex vector by a real vector and generates a complex result. The data in the complex arrays is stored in an interleaved fashion (real, imag, real, imag, ...). The parameter numSamples represents the number of complex samples processed. The complex arrays have a total of 2*numSamples real values while the real array has a total of numSamples real values.

The underlying algorithm is used:

 for(n=0; n<numSamples; n++) {
     pCmplxDst[(2*n)+0] = pSrcCmplx[(2*n)+0] * pSrcReal[n];
     pCmplxDst[(2*n)+1] = pSrcCmplx[(2*n)+1] * pSrcReal[n];
 }

There are separate functions for floating-point, Q15, and Q31 data types.

Function Documentation

void arm_cmplx_mult_real_f32 | ( | float32_t * | pSrcCmplx,
 |  | float32_t * | pSrcReal,
 |  | float32_t * | pCmplxDst,
 |  | uint32_t | numSamples
 | ) |  |

Floating-point complex-by-real multiplication.

Parameters:
[in] | *pSrcCmplx | points to the complex input vector
[in] | *pSrcReal | points to the real input vector
[out] | *pCmplxDst | points to the complex output vector
[in] | numSamples | number of samples in each vector
Returns:
none.

Definition at line 74 of file arm_cmplx_mult_real_f32.c.

void arm_cmplx_mult_real_q15 | ( | q15_t * | pSrcCmplx,
 |  | q15_t * | pSrcReal,
 |  | q15_t * | pCmplxDst,
 |  | uint32_t | numSamples
 | ) |  |

Q15 complex-by-real multiplication.

Parameters:
[in] | *pSrcCmplx | points to the complex input vector
[in] | *pSrcReal | points to the real input vector
[out] | *pCmplxDst | points to the complex output vector
[in] | numSamples | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.

Definition at line 56 of file arm_cmplx_mult_real_q15.c.

void arm_cmplx_mult_real_q31 | ( | q31_t * | pSrcCmplx,
 |  | q31_t * | pSrcReal,
 |  | q31_t * | pCmplxDst,
 |  | uint32_t | numSamples
 | ) |  |

Q31 complex-by-real multiplication.

Parameters:
[in] | *pSrcCmplx | points to the complex input vector
[in] | *pSrcReal | points to the real input vector
[out] | *pCmplxDst | points to the complex output vector
[in] | numSamples | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.

Definition at line 56 of file arm_cmplx_mult_real_q31.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Filtering Functions

Modules
Filtering Functions
Functions

Modules

High Precision Q31 Biquad Cascade Filter
Biquad Cascade IIR Filters Using Direct Form I Structure
Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure
Convolution
Partial Convolution
Correlation
Finite Impulse Response (FIR) Decimator
Finite Impulse Response (FIR) Filters
Finite Impulse Response (FIR) Lattice Filters
Finite Impulse Response (FIR) Sparse Filters
Infinite Impulse Response (IIR) Lattice Filters
Least Mean Square (LMS) Filters
Normalized LMS Filters
Finite Impulse Response (FIR) Interpolator
Generated on Mon Nov 28 2011 11:15:25 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: High Precision Q31 Biquad Cascade Filter

Functions
High Precision Q31 Biquad Cascade Filter
Filtering Functions

Functions

void | arm_biquad_cas_df1_32x64_init_q31 (arm_biquad_cas_df1_32x64_ins_q31 *S, uint8_t numStages, q31_t *pCoeffs, q63_t *pState, uint8_t postShift)
void | arm_biquad_cas_df1_32x64_q31 (const arm_biquad_cas_df1_32x64_ins_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)

Detailed Description

This function implements a high precision Biquad cascade filter which operates on Q31 data values. The filter coefficients are in 1.31 format and the state variables are in 1.63 format. The double precision state variables reduce quantization noise in the filter and provide a cleaner output. These filters are particularly useful when implementing filters in which the singularities are close to the unit circle. This is common for low pass or high pass filters with very low cutoff frequencies.

The function operates on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc and pDst points to input and output arrays containing blockSize Q31 values.

Algorithm
Each Biquad stage implements a second order filter using the difference equation:

     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
Single Biquad filter stage
Coefficients b0, b1, and b2 multiply the input signal x[n] and are referred to as the feedforward coefficients. Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients. Pay careful attention to the sign of the feedback coefficients. Some design tools use the difference equation

     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.
Higher order filters are realized as a cascade of second order sections. numStages refers to the number of second order stages used. For example, an 8th order filter would be realized with numStages=4 second order stages.
8th order filter using a cascade of Biquad stages
A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).
The pState points to state variables array . Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2] and each state variable in 1.63 format to improve precision. The state variables are arranged in the array as:

     {x[n-1], x[n-2], y[n-1], y[n-2]}
The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of 4*numStages values of data in 1.63 format. The state variables are updated after each block of data is processed; the coefficients are untouched.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
Init Function
There is also an associated initialization function which performs the following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. For example, to statically initialize the filter instance structure use

     arm_biquad_cas_df1_32x64_ins_q31 S1 = {numStages, pState, pCoeffs, postShift};
where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer; pCoeffs is the address of the coefficient buffer; postShift shift to be applied which is described in detail below.
Fixed-Point Behavior
Care must be taken while using Biquad Cascade 32x64 filter function. Following issues must be considered:
  • Scaling of coefficients
  • Filter gain
  • Overflow and saturation
Filter coefficients are represented as fractional values and restricted to lie in the range [-1 +1). The processing function has an additional scaling parameter postShift which allows the filter coefficients to exceed the range [+1 -1). At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.
Fixed-point Biquad with shift by postShift bits after accumulator
This essentially scales the filter coefficients by 2^postShift. For example, to realize the coefficients

    {1.5, -0.8, 1.2, 1.6, -0.9}
set the Coefficient array to:

    {0.75, -0.4, 0.6, 0.8, -0.45}
and set postShift=1
The second thing to keep in mind is the gain through the filter. The frequency response of a Biquad filter is a function of its coefficients. It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies. This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter. To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.
The third item to consider is the overflow and saturation behavior of the fixed-point Q31 version. This is described in the function specific documentation below.

Function Documentation

void arm_biquad_cas_df1_32x64_init_q31 | ( | arm_biquad_cas_df1_32x64_ins_q31 * | S,
 |  | uint8_t | numStages,
 |  | q31_t * | pCoeffs,
 |  | q63_t * | pState,
 |  | uint8_t | postShift
 | ) |  |
Parameters:
[in,out] | *S | points to an instance of the high precision Q31 Biquad cascade filter structure.
[in] | numStages | number of 2nd order stages in the filter.
[in] | *pCoeffs | points to the filter coefficients.
[in] | *pState | points to the state buffer.
[in] | postShift | Shift to be applied after the accumulator. Varies according to the coefficients format.
Returns:
none

Coefficient and State Ordering:

The coefficients are stored in the array pCoeffs in the following order:

     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
where b1x and a1x are the coefficients for the first stage, b2x and a2x are the coefficients for the second stage, and so on. The pCoeffs array contains a total of 5*numStages values.
The pState points to state variables array and size of each state variable is 1.63 format. Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. The state variables are arranged in the state array as:

     {x[n-1], x[n-2], y[n-1], y[n-2]}
The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of 4*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.

Definition at line 77 of file arm_biquad_cascade_df1_32x64_init_q31.c.

void arm_biquad_cas_df1_32x64_q31 | ( | const arm_biquad_cas_df1_32x64_ins_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |
Parameters:
[in] | *S | points to an instance of the high precision Q31 Biquad cascade filter.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process.
Returns:
none.
The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25). After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by postShift bits and the result truncated to 1.31 format by discarding the low 32 bits.
Two related functions are provided in the CMSIS DSP library. arm_biquad_cascade_df1_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q63 accumulator. arm_biquad_cascade_df1_fast_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q31 accumulator.

Definition at line 176 of file arm_biquad_cascade_df1_32x64_q31.c.

Generated on Mon Nov 28 2011 11:15:27 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Biquad Cascade IIR Filters Using Direct Form I Structure

Functions
Biquad Cascade IIR Filters Using Direct Form I Structure
Filtering Functions

Functions

void | arm_biquad_cascade_df1_f32 (const arm_biquad_casd_df1_inst_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point Biquad cascade filter.
void | arm_biquad_cascade_df1_fast_q15 (const arm_biquad_casd_df1_inst_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
void | arm_biquad_cascade_df1_fast_q31 (const arm_biquad_casd_df1_inst_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
void | arm_biquad_cascade_df1_init_f32 (arm_biquad_casd_df1_inst_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
Initialization function for the floating-point Biquad cascade filter.
void | arm_biquad_cascade_df1_init_q15 (arm_biquad_casd_df1_inst_q15 *S, uint8_t numStages, q15_t *pCoeffs, q15_t *pState, int8_t postShift)
Initialization function for the Q15 Biquad cascade filter.
void | arm_biquad_cascade_df1_init_q31 (arm_biquad_casd_df1_inst_q31 *S, uint8_t numStages, q31_t *pCoeffs, q31_t *pState, int8_t postShift)
Initialization function for the Q31 Biquad cascade filter.
void | arm_biquad_cascade_df1_q15 (const arm_biquad_casd_df1_inst_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 Biquad cascade filter.
void | arm_biquad_cascade_df1_q31 (const arm_biquad_casd_df1_inst_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 Biquad cascade filter.

Detailed Description

This set of functions implements arbitrary order recursive (IIR) filters. The filters are implemented as a cascade of second order Biquad sections. The functions support Q15, Q31 and floating-point data types. Fast version of Q15 and Q31 also supported on CortexM4 and Cortex-M3.

The functions operate on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc points to the array of input data and pDst points to the array of output data. Both arrays contain blockSize values.

Algorithm
Each Biquad stage implements a second order filter using the difference equation:

     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
Single Biquad filter stage
Coefficients b0, b1 and b2 multiply the input signal x[n] and are referred to as the feedforward coefficients. Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients. Pay careful attention to the sign of the feedback coefficients. Some design tools use the difference equation

     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.
Higher order filters are realized as a cascade of second order sections. numStages refers to the number of second order stages used. For example, an 8th order filter would be realized with numStages=4 second order stages.
8th order filter using a cascade of Biquad stages
A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).
The pState points to state variables array. Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. The state variables are arranged in the pState array as:

     {x[n-1], x[n-2], y[n-1], y[n-2]}
The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of 4*numStages values. The state variables are updated after each block of data is processed, the coefficients are untouched.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. There are separate instance structure declarations for each of the 3 supported data types.
Init Functions
There is also an associated initialization function for each data type. The initialization function performs following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. The code below statically initializes each of the 3 different data type filter instance structures

     arm_biquad_casd_df1_inst_f32 S1 = {numStages, pState, pCoeffs};
     arm_biquad_casd_df1_inst_q15 S2 = {numStages, pState, pCoeffs, postShift};
     arm_biquad_casd_df1_inst_q31 S3 = {numStages, pState, pCoeffs, postShift};
where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer; pCoeffs is the address of the coefficient buffer; postShift shift to be applied.
Fixed-Point Behavior
Care must be taken when using the Q15 and Q31 versions of the Biquad Cascade filter functions. Following issues must be considered:
  • Scaling of coefficients
  • Filter gain
  • Overflow and saturation
Scaling of coefficients: Filter coefficients are represented as fractional values and coefficients are restricted to lie in the range [-1 +1). The fixed-point functions have an additional scaling parameter postShift which allow the filter coefficients to exceed the range [+1 -1). At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.
Fixed-point Biquad with shift by postShift bits after accumulator
This essentially scales the filter coefficients by 2^postShift. For example, to realize the coefficients

    {1.5, -0.8, 1.2, 1.6, -0.9}
set the pCoeffs array to:

    {0.75, -0.4, 0.6, 0.8, -0.45}
and set postShift=1
Filter gain: The frequency response of a Biquad filter is a function of its coefficients. It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies. This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter. To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.
Overflow and saturation: For Q15 and Q31 versions, it is described separately as part of the function specific documentation below.

Function Documentation

void arm_biquad_cascade_df1_f32 | ( | const arm_biquad_casd_df1_inst_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the floating-point Biquad cascade filter.

Parameters:
[in] | *S | points to an instance of the floating-point Biquad cascade structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Definition at line 171 of file arm_biquad_cascade_df1_f32.c.

void arm_biquad_cascade_df1_fast_q15 | ( | const arm_biquad_casd_df1_inst_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *S | points to an instance of the Q15 Biquad cascade structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). The 2.30 accumulator is then shifted by postShift bits and the result truncated to 1.15 format by discarding the low 16 bits.
Refer to the function arm_biquad_cascade_df1_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure. Use the function arm_biquad_cascade_df1_init_q15() to initialize the filter structure.

Definition at line 69 of file arm_biquad_cascade_df1_fast_q15.c.

void arm_biquad_cascade_df1_fast_q31 | ( | const arm_biquad_casd_df1_inst_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *S | points to an instance of the Q31 Biquad cascade structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are added to a 2.30 accumulator. Finally, the accumulator is saturated and converted to a 1.31 result. The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). Use the intialization function arm_biquad_cascade_df1_init_q31() to initialize filter structure.
Refer to the function arm_biquad_cascade_df1_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision. Both the slow and the fast versions use the same instance structure. Use the function arm_biquad_cascade_df1_init_q31() to initialize the filter structure.

Definition at line 70 of file arm_biquad_cascade_df1_fast_q31.c.

void arm_biquad_cascade_df1_init_f32 | ( | arm_biquad_casd_df1_inst_f32 * | S,
 |  | uint8_t | numStages,
 |  | float32_t * | pCoeffs,
 |  | float32_t * | pState
 | ) |  |

Initialization function for the floating-point Biquad cascade filter.

Parameters:
[in,out] | *S | points to an instance of the floating-point Biquad cascade structure.
[in] | numStages | number of 2nd order stages in the filter.
[in] | *pCoeffs | points to the filter coefficients array.
[in] | *pState | points to the state array.
Returns:
none

Coefficient and State Ordering:

The coefficients are stored in the array pCoeffs in the following order:

     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
where b1x and a1x are the coefficients for the first stage, b2x and a2x are the coefficients for the second stage, and so on. The pCoeffs array contains a total of 5*numStages values.
The pState is a pointer to state array. Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. The state variables are arranged in the pState array as:

     {x[n-1], x[n-2], y[n-1], y[n-2]}
The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of 4*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.

Definition at line 83 of file arm_biquad_cascade_df1_init_f32.c.

void arm_biquad_cascade_df1_init_q15 | ( | arm_biquad_casd_df1_inst_q15 * | S,
 |  | uint8_t | numStages,
 |  | q15_t * | pCoeffs,
 |  | q15_t * | pState,
 |  | int8_t | postShift
 | ) |  |

Initialization function for the Q15 Biquad cascade filter.

Parameters:
[in,out] | *S | points to an instance of the Q15 Biquad cascade structure.
[in] | numStages | number of 2nd order stages in the filter.
[in] | *pCoeffs | points to the filter coefficients.
[in] | *pState | points to the state buffer.
[in] | postShift | Shift to be applied to the accumulator result. Varies according to the coefficients format
Returns:
none

Coefficient and State Ordering:

The coefficients are stored in the array pCoeffs in the following order:

     {b10, 0, b11, b12, a11, a12, b20, 0, b21, b22, a21, a22, ...}
where b1x and a1x are the coefficients for the first stage, b2x and a2x are the coefficients for the second stage, and so on. The pCoeffs array contains a total of 6*numStages values. The zero coefficient between b1 and b2 facilities use of 16-bit SIMD instructions on the Cortex-M4.
The state variables are stored in the array pState. Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. The state variables are arranged in the pState array as:

     {x[n-1], x[n-2], y[n-1], y[n-2]}
The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of 4*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.

Definition at line 81 of file arm_biquad_cascade_df1_init_q15.c.

void arm_biquad_cascade_df1_init_q31 | ( | arm_biquad_casd_df1_inst_q31 * | S,
 |  | uint8_t | numStages,
 |  | q31_t * | pCoeffs,
 |  | q31_t * | pState,
 |  | int8_t | postShift
 | ) |  |

Initialization function for the Q31 Biquad cascade filter.

Parameters:
[in,out] | *S | points to an instance of the Q31 Biquad cascade structure.
[in] | numStages | number of 2nd order stages in the filter.
[in] | *pCoeffs | points to the filter coefficients buffer.
[in] | *pState | points to the state buffer.
[in] | postShift | Shift to be applied after the accumulator. Varies according to the coefficients format
Returns:
none

Coefficient and State Ordering:

The coefficients are stored in the array pCoeffs in the following order:

     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
where b1x and a1x are the coefficients for the first stage, b2x and a2x are the coefficients for the second stage, and so on. The pCoeffs array contains a total of 5*numStages values.
The pState points to state variables array. Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. The state variables are arranged in the pState array as:

     {x[n-1], x[n-2], y[n-1], y[n-2]}
The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of 4*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.

Definition at line 81 of file arm_biquad_cascade_df1_init_q31.c.

void arm_biquad_cascade_df1_q15 | ( | const arm_biquad_casd_df1_inst_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q15 Biquad cascade filter.

Parameters:
[in] | *S | points to an instance of the Q15 Biquad cascade structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the location where the output result is written.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. The accumulator is then shifted by postShift bits to truncate the result to 1.15 format by discarding the low 16 bits. Finally, the result is saturated to 1.15 format.
Refer to the function arm_biquad_cascade_df1_fast_q15() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.

Definition at line 70 of file arm_biquad_cascade_df1_q15.c.

void arm_biquad_cascade_df1_q31 | ( | const arm_biquad_casd_df1_inst_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q31 Biquad cascade filter.

Parameters:
[in] | *S | points to an instance of the Q31 Biquad cascade structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25). After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by postShift bits and the result truncated to 1.31 format by discarding the low 32 bits.
Refer to the function arm_biquad_cascade_df1_fast_q31() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.

Definition at line 69 of file arm_biquad_cascade_df1_q31.c.

Generated on Mon Nov 28 2011 11:15:27 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure

Functions
Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure
Filtering Functions

Functions

void | arm_biquad_cascade_df2T_f32 (const arm_biquad_cascade_df2T_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point transposed direct form II Biquad cascade filter.
void | arm_biquad_cascade_df2T_init_f32 (arm_biquad_cascade_df2T_instance_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
Initialization function for the floating-point transposed direct form II Biquad cascade filter.

Detailed Description

This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure. The filters are implemented as a cascade of second order Biquad sections. These functions provide a slight memory savings as compared to the direct form I Biquad filter functions. Only floating-point data is supported.

This function operate on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc points to the array of input data and pDst points to the array of output data. Both arrays contain blockSize values.

Algorithm
Each Biquad stage implements a second order filter using the difference equation:

    y[n] = b0 * x[n] + d1
    d1 = b1 * x[n] + a1 * y[n] + d2
    d2 = b2 * x[n] + a2 * y[n]
where d1 and d2 represent the two state values.
A Biquad filter using a transposed Direct Form II structure is shown below.
Single transposed Direct Form II Biquad
Coefficients b0, b1, and b2 multiply the input signal x[n] and are referred to as the feedforward coefficients. Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients. Pay careful attention to the sign of the feedback coefficients. Some design tools flip the sign of the feedback coefficients:

    y[n] = b0 * x[n] + d1;
    d1 = b1 * x[n] - a1 * y[n] + d2;
    d2 = b2 * x[n] - a2 * y[n];
In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.
Higher order filters are realized as a cascade of second order sections. numStages refers to the number of second order stages used. For example, an 8th order filter would be realized with numStages=4 second order stages. A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).
pState points to the state variable array. Each Biquad stage has 2 state variables d1 and d2. The state variables are arranged in the pState array as:

     {d11, d12, d21, d22, ...}
where d1x refers to the state variables for the first Biquad and d2x refers to the state variables for the second Biquad. The state array has a total length of 2*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.
The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II. The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types. That is why the Direct Form I structure supports Q15 and Q31 data types. The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables d1 and d2. Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad. The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
Init Functions
There is also an associated initialization function. The initialization function performs following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. For example, to statically initialize the instance structure use

     arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};
where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer. pCoeffs is the address of the coefficient buffer;

Function Documentation

void arm_biquad_cascade_df2T_f32 | ( | const arm_biquad_cascade_df2T_instance_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the floating-point transposed direct form II Biquad cascade filter.

Parameters:
[in] | *S | points to an instance of the filter data structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | blockSize | number of samples to process.
Returns:
none.

Definition at line 143 of file arm_biquad_cascade_df2T_f32.c.

void arm_biquad_cascade_df2T_init_f32 | ( | arm_biquad_cascade_df2T_instance_f32 * | S,
 |  | uint8_t | numStages,
 |  | float32_t * | pCoeffs,
 |  | float32_t * | pState
 | ) |  |

Initialization function for the floating-point transposed direct form II Biquad cascade filter.

Parameters:
[in,out] | *S | points to an instance of the filter data structure.
[in] | numStages | number of 2nd order stages in the filter.
[in] | *pCoeffs | points to the filter coefficients.
[in] | *pState | points to the state buffer.
Returns:
none

Coefficient and State Ordering:

The coefficients are stored in the array pCoeffs in the following order:

     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
where b1x and a1x are the coefficients for the first stage, b2x and a2x are the coefficients for the second stage, and so on. The pCoeffs array contains a total of 5*numStages values.
The pState is a pointer to state array. Each Biquad stage has 2 state variables d1, and d2. The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on. The state array has a total length of 2*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.

Definition at line 73 of file arm_biquad_cascade_df2T_init_f32.c.

Generated on Mon Nov 28 2011 11:15:27 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Convolution

Functions
Convolution
Filtering Functions

Functions

void | arm_conv_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst)
Convolution of floating-point sequences.
void | arm_conv_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
void | arm_conv_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
void | arm_conv_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
Convolution of Q15 sequences.
void | arm_conv_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
Convolution of Q31 sequences.
void | arm_conv_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst)
Convolution of Q7 sequences.

Detailed Description

Convolution is a mathematical operation that operates on two finite length vectors to generate a finite length output vector. Convolution is similar to correlation and is frequently used in filtering and data analysis. The CMSIS DSP library contains functions for convolving Q7, Q15, Q31, and floating-point data types. The library also provides fast versions of the Q15 and Q31 functions on Cortex-M4 and Cortex-M3.

Algorithm
Let a[n] and b[n] be sequences of length srcALen and srcBLen samples respectively. Then the convolution

                   c[n] = a[n] * b[n]
is defined as
Note that c[n] is of length srcALen + srcBLen - 1 and is defined over the interval n=0, 1, 2, ..., srcALen + srcBLen - 2. pSrcA points to the first input vector of length srcALen and pSrcB points to the second input vector of length srcBLen. The output result is written to pDst and the calling function must allocate srcALen+srcBLen-1 words for the result.
Conceptually, when two signals a[n] and b[n] are convolved, the signal b[n] slides over a[n]. For each offset n, the overlapping portions of a[n] and b[n] are multiplied and summed together.
Note that convolution is a commutative operation:

                   a[n] * b[n] = b[n] * a[n].
This means that switching the A and B arguments to the convolution functions has no effect.

Fixed-Point Behavior

Convolution requires summing up a large number of intermediate products. As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation. Refer to the function specific documentation below for further details of the particular algorithm used.

Function Documentation

void arm_conv_f32 | ( | float32_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | float32_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | float32_t * | pDst
 | ) |  |

Convolution of floating-point sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length srcALen+srcBLen-1.
Returns:
none.

Definition at line 103 of file arm_conv_f32.c.

void arm_conv_fast_q15 | ( | q15_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q15_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q15_t * | pDst
 | ) |  |

Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length srcALen+srcBLen-1.
Returns:
none.

Scaling and Overflow Behavior:

This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally. The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
See arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.

Definition at line 66 of file arm_conv_fast_q15.c.

void arm_conv_fast_q31 | ( | q31_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q31_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q31_t * | pDst
 | ) |  |

Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length srcALen+srcBLen-1.
Returns:
none.

Scaling and Overflow Behavior:

This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.31 result.
The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally.
See arm_conv_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.

Definition at line 68 of file arm_conv_fast_q31.c.

void arm_conv_q15 | ( | q15_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q15_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q15_t * | pDst
 | ) |  |

Convolution of Q15 sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length srcALen+srcBLen-1.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
Refer to arm_conv_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.

Definition at line 68 of file arm_conv_q15.c.

void arm_conv_q31 | ( | q31_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q31_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q31_t * | pDst
 | ) |  |

Convolution of Q31 sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length srcALen+srcBLen-1.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
See arm_conv_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.

Definition at line 71 of file arm_conv_q31.c.

void arm_conv_q7 | ( | q7_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q7_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q7_t * | pDst
 | ) |  |

Convolution of Q7 sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length srcALen+srcBLen-1.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 32-bit internal accumulator. Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072. The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.

Definition at line 65 of file arm_conv_q7.c.

Generated on Mon Nov 28 2011 11:15:27 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Partial Convolution

Functions
Partial Convolution
Filtering Functions

Functions

arm_status | arm_conv_partial_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst, uint32_t firstIndex, uint32_t numPoints)
Partial convolution of floating-point sequences.
arm_status | arm_conv_partial_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints)
Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
arm_status | arm_conv_partial_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst, uint32_t firstIndex, uint32_t numPoints)
Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
arm_status | arm_conv_partial_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints)
Partial convolution of Q15 sequences.
arm_status | arm_conv_partial_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst, uint32_t firstIndex, uint32_t numPoints)
Partial convolution of Q31 sequences.
arm_status | arm_conv_partial_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, uint32_t firstIndex, uint32_t numPoints)
Partial convolution of Q7 sequences.

Detailed Description

Partial Convolution is equivalent to Convolution except that a subset of the output samples is generated. Each function has two additional arguments. firstIndex specifies the starting index of the subset of output samples. numPoints is the number of output samples to compute. The function computes the output in the range [firstIndex, ..., firstIndex+numPoints-1]. The output array pDst contains numPoints values.

The allowable range of output indices is [0 srcALen+srcBLen-2]. If the requested subset does not fall in this range then the functions return ARM_MATH_ARGUMENT_ERROR. Otherwise the functions return ARM_MATH_SUCCESS.

Note:
Refer arm_conv_f32() for details on fixed point behavior.

Function Documentation

arm_status arm_conv_partial_f32 | ( | float32_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | float32_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | float32_t * | pDst,
 |  | uint32_t | firstIndex,
 |  | uint32_t | numPoints
 | ) |  |

Partial convolution of floating-point sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written.
[in] | firstIndex | is the first output sample to start with.
[in] | numPoints | is the number of output points to be computed.
Returns:
Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].

Definition at line 74 of file arm_conv_partial_f32.c.

arm_status arm_conv_partial_fast_q15 | ( | q15_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q15_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q15_t * | pDst,
 |  | uint32_t | firstIndex,
 |  | uint32_t | numPoints
 | ) |  |

Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written.
[in] | firstIndex | is the first output sample to start with.
[in] | numPoints | is the number of output points to be computed.
Returns:
Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].

See arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.

Definition at line 56 of file arm_conv_partial_fast_q15.c.

arm_status arm_conv_partial_fast_q31 | ( | q31_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q31_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q31_t * | pDst,
 |  | uint32_t | firstIndex,
 |  | uint32_t | numPoints
 | ) |  |

Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written.
[in] | firstIndex | is the first output sample to start with.
[in] | numPoints | is the number of output points to be computed.
Returns:
Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
See arm_conv_partial_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.

Definition at line 56 of file arm_conv_partial_fast_q31.c.

arm_status arm_conv_partial_q15 | ( | q15_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q15_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q15_t * | pDst,
 |  | uint32_t | firstIndex,
 |  | uint32_t | numPoints
 | ) |  |

Partial convolution of Q15 sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written.
[in] | firstIndex | is the first output sample to start with.
[in] | numPoints | is the number of output points to be computed.
Returns:
Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].

Refer to arm_conv_partial_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.

Definition at line 60 of file arm_conv_partial_q15.c.

arm_status arm_conv_partial_q31 | ( | q31_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q31_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q31_t * | pDst,
 |  | uint32_t | firstIndex,
 |  | uint32_t | numPoints
 | ) |  |

Partial convolution of Q31 sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written.
[in] | firstIndex | is the first output sample to start with.
[in] | numPoints | is the number of output points to be computed.
Returns:
Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].

See arm_conv_partial_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.

Definition at line 59 of file arm_conv_partial_q31.c.

arm_status arm_conv_partial_q7 | ( | q7_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q7_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q7_t * | pDst,
 |  | uint32_t | firstIndex,
 |  | uint32_t | numPoints
 | ) |  |

Partial convolution of Q7 sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written.
[in] | firstIndex | is the first output sample to start with.
[in] | numPoints | is the number of output points to be computed.
Returns:
Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].

Definition at line 58 of file arm_conv_partial_q7.c.

Generated on Mon Nov 28 2011 11:15:27 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Correlation

Functions
Correlation
Filtering Functions

Functions

void | arm_correlate_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst)
Correlation of floating-point sequences.
void | arm_correlate_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
void | arm_correlate_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
void | arm_correlate_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
Correlation of Q15 sequences.
void | arm_correlate_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
Correlation of Q31 sequences.
void | arm_correlate_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst)
Correlation of Q7 sequences.

Detailed Description

Correlation is a mathematical operation that is similar to convolution. As with convolution, correlation uses two signals to produce a third signal. The underlying algorithms in correlation and convolution are identical except that one of the inputs is flipped in convolution. Correlation is commonly used to measure the similarity between two signals. It has applications in pattern recognition, cryptanalysis, and searching. The CMSIS library provides correlation functions for Q7, Q15, Q31 and floating-point data types. Fast versions of the Q15 and Q31 functions are also provided.

Algorithm
Let a[n] and b[n] be sequences of length srcALen and srcBLen samples respectively. The convolution of the two signals is denoted by

                   c[n] = a[n] * b[n]
In correlation, one of the signals is flipped in time

                   c[n] = a[n] * b[-n]
and this is mathematically defined as
The pSrcA points to the first input vector of length srcALen and pSrcB points to the second input vector of length srcBLen. The result c[n] is of length 2 * max(srcALen, srcBLen) - 1 and is defined over the interval n=0, 1, 2, ..., (2 * max(srcALen, srcBLen) - 2). The output result is written to pDst and the calling function must allocate 2 * max(srcALen, srcBLen) - 1 words for the result.

Note

The pDst should be initialized to all zeros before being used.

Fixed-Point Behavior

Correlation requires summing up a large number of intermediate products. As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation. Refer to the function specific documentation below for further details of the particular algorithm used.

Function Documentation

void arm_correlate_f32 | ( | float32_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | float32_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | float32_t * | pDst
 | ) |  |

Correlation of floating-point sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
Returns:
none.

Definition at line 95 of file arm_correlate_f32.c.

void arm_correlate_fast_q15 | ( | q15_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q15_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q15_t * | pDst
 | ) |  |

Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
Returns:
none.

Scaling and Overflow Behavior:

This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a maximum of min(srcALen, srcBLen) number of additions is carried internally. The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
See arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.

Definition at line 66 of file arm_correlate_fast_q15.c.

void arm_correlate_fast_q31 | ( | q31_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q31_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q31_t * | pDst
 | ) |  |

Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
Returns:
none.

Scaling and Overflow Behavior:

This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.31 result.
The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. The input signals should be scaled down to avoid intermediate overflows. Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a maximum of min(srcALen, srcBLen) number of additions is carried internally.
See arm_correlate_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.

Definition at line 70 of file arm_correlate_fast_q31.c.

void arm_correlate_q15 | ( | q15_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q15_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q15_t * | pDst
 | ) |  |

Correlation of Q15 sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
Refer to arm_correlate_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.

Definition at line 68 of file arm_correlate_q15.c.

void arm_correlate_q31 | ( | q31_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q31_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q31_t * | pDst
 | ) |  |

Correlation of Q31 sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a maximum of min(srcALen, srcBLen) number of additions is carried internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
See arm_correlate_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.

Definition at line 71 of file arm_correlate_q31.c.

void arm_correlate_q7 | ( | q7_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q7_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q7_t * | pDst
 | ) |  |

Correlation of Q7 sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 32-bit internal accumulator. Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072. The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.

Definition at line 65 of file arm_correlate_q7.c.

Generated on Mon Nov 28 2011 11:15:27 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Finite Impulse Response (FIR) Decimator

Functions
Finite Impulse Response (FIR) Decimator
Filtering Functions

Functions

void | arm_fir_decimate_f32 (const arm_fir_decimate_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point FIR decimator.
void | arm_fir_decimate_fast_q15 (const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
void | arm_fir_decimate_fast_q31 (arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
arm_status | arm_fir_decimate_init_f32 (arm_fir_decimate_instance_f32 *S, uint16_t numTaps, uint8_t M, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
Initialization function for the floating-point FIR decimator.
arm_status | arm_fir_decimate_init_q15 (arm_fir_decimate_instance_q15 *S, uint16_t numTaps, uint8_t M, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
Initialization function for the Q15 FIR decimator.
arm_status | arm_fir_decimate_init_q31 (arm_fir_decimate_instance_q31 *S, uint16_t numTaps, uint8_t M, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
Initialization function for the Q31 FIR decimator.
void | arm_fir_decimate_q15 (const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 FIR decimator.
void | arm_fir_decimate_q31 (const arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 FIR decimator.

Detailed Description

These functions combine an FIR filter together with a decimator. They are used in multirate systems for reducing the sample rate of a signal without introducing aliasing distortion. Conceptually, the functions are equivalent to the block diagram below:

Components included in the FIR Decimator functions

When decimating by a factor of M, the signal should be prefiltered by a lowpass filter with a normalized cutoff frequency of 1/M in order to prevent aliasing distortion. The user of the function is responsible for providing the filter coefficients.

The FIR decimator functions provided in the CMSIS DSP Library combine the FIR filter and the decimator in an efficient manner. Instead of calculating all of the FIR filter outputs and discarding M-1 out of every M, only the samples output by the decimator are computed. The functions operate on blocks of input and output data. pSrc points to an array of blockSize input values and pDst points to an array of blockSize/M output values. In order to have an integer number of output samples blockSize must always be a multiple of the decimation factor M.

The library provides separate functions for Q15, Q31 and floating-point data types.

Algorithm:
The FIR portion of the algorithm uses the standard form filter:

    y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
where, b[n] are the filter coefficients.
The pCoeffs points to a coefficient array of size numTaps. Coefficients are stored in time reversed order.

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to a state array of size numTaps + blockSize - 1. Samples in the state buffer are stored in the order:

    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
The state variables are updated after each block of data is processed, the coefficients are untouched.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable array should be allocated separately. There are separate instance structure declarations for each of the 3 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
  • Checks to make sure that the size of the input is a multiple of the decimation factor.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. The code below statically initializes each of the 3 different data type filter instance structures

arm_fir_decimate_instance_f32 S = {M, numTaps, pCoeffs, pState};
arm_fir_decimate_instance_q31 S = {M, numTaps, pCoeffs, pState};
arm_fir_decimate_instance_q15 S = {M, numTaps, pCoeffs, pState};
where M is the decimation factor; numTaps is the number of filter coefficients in the filter; pCoeffs is the address of the coefficient buffer; pState is the address of the state buffer. Be sure to set the values in the state buffer to zeros when doing static initialization.
Fixed-Point Behavior
Care must be taken when using the fixed-point versions of the FIR decimate filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.

Function Documentation

void arm_fir_decimate_f32 | ( | const arm_fir_decimate_instance_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the floating-point FIR decimator.

Parameters:
[in] | *S | points to an instance of the floating-point FIR decimator structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of input samples to process per call.
Returns:
none.

Definition at line 132 of file arm_fir_decimate_f32.c.

void arm_fir_decimate_fast_q15 | ( | const arm_fir_decimate_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *S | points to an instance of the Q15 FIR decimator structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | blockSize | number of input samples to process per call.
Returns:
none

Scaling and Overflow Behavior:

This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (log2 is read as log to the base 2). The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
Refer to the function arm_fir_decimate_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure. Use the function arm_fir_decimate_init_q15() to initialize the filter structure.

Definition at line 63 of file arm_fir_decimate_fast_q15.c.

void arm_fir_decimate_fast_q31 | ( | arm_fir_decimate_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *S | points to an instance of the Q31 FIR decimator structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | blockSize | number of input samples to process per call.
Returns:
none

Scaling and Overflow Behavior:

This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are added to a 2.30 accumulator. Finally, the accumulator is saturated and converted to a 1.31 result. The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).
Refer to the function arm_fir_decimate_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision. Both the slow and the fast versions use the same instance structure. Use the function arm_fir_decimate_init_q31() to initialize the filter structure.

Definition at line 65 of file arm_fir_decimate_fast_q31.c.

arm_status arm_fir_decimate_init_f32 | ( | arm_fir_decimate_instance_f32 * | S,
 |  | uint16_t | numTaps,
 |  | uint8_t | M,
 |  | float32_t * | pCoeffs,
 |  | float32_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the floating-point FIR decimator.

Parameters:
[in,out] | *S | points to an instance of the floating-point FIR decimator structure.
[in] | numTaps | number of coefficients in the filter.
[in] | M | decimation factor.
[in] | *pCoeffs | points to the filter coefficients.
[in] | *pState | points to the state buffer.
[in] | blockSize | number of input samples to process per call.
Returns:
The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if blockSize is not a multiple of M.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to the array of state variables. pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples passed to arm_fir_decimate_f32(). M is the decimation factor.

Definition at line 67 of file arm_fir_decimate_init_f32.c.

arm_status arm_fir_decimate_init_q15 | ( | arm_fir_decimate_instance_q15 * | S,
 |  | uint16_t | numTaps,
 |  | uint8_t | M,
 |  | q15_t * | pCoeffs,
 |  | q15_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q15 FIR decimator.

Parameters:
[in,out] | *S | points to an instance of the Q15 FIR decimator structure.
[in] | numTaps | number of coefficients in the filter.
[in] | M | decimation factor.
[in] | *pCoeffs | points to the filter coefficients.
[in] | *pState | points to the state buffer.
[in] | blockSize | number of input samples to process per call.
Returns:
The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if blockSize is not a multiple of M.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to the array of state variables. pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples to the call arm_fir_decimate_q15(). M is the decimation factor.

Definition at line 68 of file arm_fir_decimate_init_q15.c.

arm_status arm_fir_decimate_init_q31 | ( | arm_fir_decimate_instance_q31 * | S,
 |  | uint16_t | numTaps,
 |  | uint8_t | M,
 |  | q31_t * | pCoeffs,
 |  | q31_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q31 FIR decimator.

Parameters:
[in,out] | *S | points to an instance of the Q31 FIR decimator structure.
[in] | numTaps | number of coefficients in the filter.
[in] | M | decimation factor.
[in] | *pCoeffs | points to the filter coefficients.
[in] | *pState | points to the state buffer.
[in] | blockSize | number of input samples to process per call.
Returns:
The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if blockSize is not a multiple of M.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to the array of state variables. pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples passed to arm_fir_decimate_q31(). M is the decimation factor.

Definition at line 67 of file arm_fir_decimate_init_q31.c.

void arm_fir_decimate_q15 | ( | const arm_fir_decimate_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q15 FIR decimator.

Parameters:
[in] | *S | points to an instance of the Q15 FIR decimator structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the location where the output result is written.
[in] | blockSize | number of input samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.
Refer to the function arm_fir_decimate_fast_q15() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.

Definition at line 65 of file arm_fir_decimate_q15.c.

void arm_fir_decimate_q31 | ( | const arm_fir_decimate_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q31 FIR decimator.

Parameters:
[in] | *S | points to an instance of the Q31 FIR decimator structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | blockSize | number of input samples to process per call.
Returns:
none

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2). After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
Refer to the function arm_fir_decimate_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.

Definition at line 64 of file arm_fir_decimate_q31.c.

Generated on Mon Nov 28 2011 11:15:27 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Finite Impulse Response (FIR) Filters

Functions
Finite Impulse Response (FIR) Filters
Filtering Functions

Functions

void | arm_fir_f32 (const arm_fir_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point FIR filter.
void | arm_fir_fast_q15 (const arm_fir_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.
void | arm_fir_fast_q31 (const arm_fir_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.
void | arm_fir_init_f32 (arm_fir_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
Initialization function for the floating-point FIR filter.
arm_status | arm_fir_init_q15 (arm_fir_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
Initialization function for the Q15 FIR filter.
void | arm_fir_init_q31 (arm_fir_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
Initialization function for the Q31 FIR filter.
void | arm_fir_init_q7 (arm_fir_instance_q7 *S, uint16_t numTaps, q7_t *pCoeffs, q7_t *pState, uint32_t blockSize)
Initialization function for the Q7 FIR filter.
void | arm_fir_q15 (const arm_fir_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 FIR filter.
void | arm_fir_q31 (const arm_fir_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 FIR filter.
void | arm_fir_q7 (const arm_fir_instance_q7 *S, q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
Processing function for the Q7 FIR filter.

Detailed Description

This set of functions implements Finite Impulse Response (FIR) filters for Q7, Q15, Q31, and floating-point data types. Fast versions of Q15 and Q31 are also provided on Cortex-M4 and Cortex-M3. The functions operate on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc and pDst points to input and output arrays containing blockSize values.

Algorithm:
The FIR filter algorithm is based upon a sequence of multiply-accumulate (MAC) operations. Each filter coefficient b[n] is multiplied by a state variable which equals a previous input sample x[n].

    y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
Finite Impulse Response filter
pCoeffs points to a coefficient array of size numTaps. Coefficients are stored in time reversed order.

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to a state array of size numTaps + blockSize - 1. Samples in the state buffer are stored in the following order.

    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1. The increased state buffer length allows circular addressing, which is traditionally used in the FIR filters, to be avoided and yields a significant speed improvement. The state variables are updated after each block of data is processed; the coefficients are untouched.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. There are separate instance structure declarations for each of the 4 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. The code below statically initializes each of the 4 different data type filter instance structures

arm_fir_instance_f32 S = {numTaps, pState, pCoeffs};
arm_fir_instance_q31 S = {numTaps, pState, pCoeffs};
arm_fir_instance_q15 S = {numTaps, pState, pCoeffs};
arm_fir_instance_q7 S =  {numTaps, pState, pCoeffs};

where numTaps is the number of filter coefficients in the filter; pState is the address of the state buffer; pCoeffs is the address of the coefficient buffer.

Fixed-Point Behavior
Care must be taken when using the fixed-point versions of the FIR filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.

Function Documentation

void arm_fir_f32 | ( | const arm_fir_instance_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the floating-point FIR filter.

Parameters:
[in] | *S | points to an instance of the floating-point FIR filter structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Definition at line 128 of file arm_fir_f32.c.

void arm_fir_fast_q15 | ( | const arm_fir_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *S | points to an instance of the Q15 FIR filter structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
Refer to the function arm_fir_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure. Use the function arm_fir_init_q15() to initialize the filter structure.

Definition at line 65 of file arm_fir_fast_q15.c.

void arm_fir_fast_q31 | ( | const arm_fir_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *S | points to an instance of the Q31 structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block output data.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are added to a 2.30 accumulator. Finally, the accumulator is saturated and converted to a 1.31 result. The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
Refer to the function arm_fir_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision. Both the slow and the fast versions use the same instance structure. Use the function arm_fir_init_q31() to initialize the filter structure.

Definition at line 66 of file arm_fir_fast_q31.c.

void arm_fir_init_f32 | ( | arm_fir_instance_f32 * | S,
 |  | uint16_t | numTaps,
 |  | float32_t * | pCoeffs,
 |  | float32_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the floating-point FIR filter.

Parameters:
[in,out] | *S | points to an instance of the floating-point FIR filter structure.
[in] | numTaps | Number of filter coefficients in the filter.
[in] | *pCoeffs | points to the filter coefficients buffer.
[in] | *pState | points to the state buffer.
[in] | blockSize | number of samples that are processed per call.
Returns:
none.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to the array of state variables. pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_f32().

Definition at line 68 of file arm_fir_init_f32.c.

arm_status arm_fir_init_q15 | ( | arm_fir_instance_q15 * | S,
 |  | uint16_t | numTaps,
 |  | q15_t * | pCoeffs,
 |  | q15_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q15 FIR filter.

Parameters:
[in,out] | *S | points to an instance of the Q15 FIR filter structure.
[in] | numTaps | Number of filter coefficients in the filter. Must be even and greater than or equal to 4.
[in] | *pCoeffs | points to the filter coefficients buffer.
[in] | *pState | points to the state buffer.
[in] | blockSize | is number of samples processed per call.
Returns:
The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if numTaps is not greater than or equal to 4 and even.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
Note that numTaps must be even and greater than or equal to 4. To implement an odd length filter simply increase numTaps by 1 and set the last coefficient to zero. For example, to implement a filter with numTaps=3 and coefficients

     {0.3, -0.8, 0.3}
set numTaps=4 and use the coefficients:

     {0.3, -0.8, 0.3, 0}.
Similarly, to implement a two point filter

     {0.3, -0.3}
set numTaps=4 and use the coefficients:

     {0.3, -0.3, 0, 0}.
pState points to the array of state variables. pState is of length numTaps+blockSize-1, where blockSize is the number of input samples processed by each call to arm_fir_q15().

Definition at line 85 of file arm_fir_init_q15.c.

void arm_fir_init_q31 | ( | arm_fir_instance_q31 * | S,
 |  | uint16_t | numTaps,
 |  | q31_t * | pCoeffs,
 |  | q31_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q31 FIR filter.

Parameters:
[in,out] | *S | points to an instance of the Q31 FIR filter structure.
[in] | numTaps | Number of filter coefficients in the filter.
[in] | *pCoeffs | points to the filter coefficients buffer.
[in] | *pState | points to the state buffer.
[in] | blockSize | number of samples that are processed per call.
Returns:
none.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to the array of state variables. pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q31().

Definition at line 68 of file arm_fir_init_q31.c.

void arm_fir_init_q7 | ( | arm_fir_instance_q7 * | S,
 |  | uint16_t | numTaps,
 |  | q7_t * | pCoeffs,
 |  | q7_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q7 FIR filter.

Parameters:
[in,out] | *S | points to an instance of the Q7 FIR filter structure.
[in] | numTaps | Number of filter coefficients in the filter.
[in] | *pCoeffs | points to the filter coefficients buffer.
[in] | *pState | points to the state buffer.
[in] | blockSize | number of samples that are processed per call.
Returns:
none

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to the array of state variables. pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q7().

Definition at line 65 of file arm_fir_init_q7.c.

void arm_fir_q15 | ( | const arm_fir_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q15 FIR filter.

Parameters:
[in] | *S | points to an instance of the Q15 FIR structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.
Refer to the function arm_fir_fast_q15() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.

Definition at line 68 of file arm_fir_q15.c.

void arm_fir_q31 | ( | const arm_fir_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q31 FIR filter.

Parameters:
[in] | *S | points to an instance of the Q31 FIR filter structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. After all multiply-accumulates are performed, the 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
Refer to the function arm_fir_fast_q31() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.

Definition at line 67 of file arm_fir_q31.c.

void arm_fir_q7 | ( | const arm_fir_instance_q7 * | S,
 |  | q7_t * | pSrc,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q7 FIR filter.

Parameters:
[in] | *S | points to an instance of the Q7 FIR filter structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 32-bit internal accumulator. Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. The accumulator is converted to 18.7 format by discarding the low 7 bits. Finally, the result is truncated to 1.7 format.

Definition at line 64 of file arm_fir_q7.c.

Generated on Mon Nov 28 2011 11:15:27 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Finite Impulse Response (FIR) Lattice Filters

Functions
Finite Impulse Response (FIR) Lattice Filters
Filtering Functions

Functions

void | arm_fir_lattice_f32 (const arm_fir_lattice_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point FIR lattice filter.
void | arm_fir_lattice_init_f32 (arm_fir_lattice_instance_f32 *S, uint16_t numStages, float32_t *pCoeffs, float32_t *pState)
Initialization function for the floating-point FIR lattice filter.
void | arm_fir_lattice_init_q15 (arm_fir_lattice_instance_q15 *S, uint16_t numStages, q15_t *pCoeffs, q15_t *pState)
Initialization function for the Q15 FIR lattice filter.
void | arm_fir_lattice_init_q31 (arm_fir_lattice_instance_q31 *S, uint16_t numStages, q31_t *pCoeffs, q31_t *pState)
Initialization function for the Q31 FIR lattice filter.
void | arm_fir_lattice_q15 (const arm_fir_lattice_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 FIR lattice filter.
void | arm_fir_lattice_q31 (const arm_fir_lattice_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 FIR lattice filter.

Detailed Description

This set of functions implements Finite Impulse Response (FIR) lattice filters for Q15, Q31 and floating-point data types. Lattice filters are used in a variety of adaptive filter applications. The filter structure is feedforward and the net impulse response is finite length. The functions operate on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc and pDst point to input and output arrays containing blockSize values.

Algorithm:
Finite Impulse Response Lattice filter
The following difference equation is implemented:

    f0[n] = g0[n] = x[n]
    fm[n] = fm-1[n] + km * gm-1[n-1] for m = 1, 2, ...M
    gm[n] = km * fm-1[n] + gm-1[n-1] for m = 1, 2, ...M
    y[n] = fM[n]
pCoeffs points to tha array of reflection coefficients of size numStages. Reflection Coefficients are stored in the following order.

    {k1, k2, ..., kM}
where M is number of stages
pState points to a state array of size numStages. The state variables (g values) hold previous inputs and are stored in the following order.

    {g0[n], g1[n], g2[n] ...gM-1[n]}
The state variables are updated after each block of data is processed; the coefficients are untouched.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. There are separate instance structure declarations for each of the 3 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:

arm_fir_lattice_instance_f32 S = {numStages, pState, pCoeffs};
arm_fir_lattice_instance_q31 S = {numStages, pState, pCoeffs};
arm_fir_lattice_instance_q15 S = {numStages, pState, pCoeffs};
where numStages is the number of stages in the filter; pState is the address of the state buffer; pCoeffs is the address of the coefficient buffer.
Fixed-Point Behavior
Care must be taken when using the fixed-point versions of the FIR Lattice filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.

Function Documentation

void arm_fir_lattice_f32 | ( | const arm_fir_lattice_instance_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the floating-point FIR lattice filter.

Parameters:
[in] | *S | points to an instance of the floating-point FIR lattice structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | blockSize | number of samples to process.
Returns:
none.

Definition at line 121 of file arm_fir_lattice_f32.c.

void arm_fir_lattice_init_f32 | ( | arm_fir_lattice_instance_f32 * | S,
 |  | uint16_t | numStages,
 |  | float32_t * | pCoeffs,
 |  | float32_t * | pState
 | ) |  |

Initialization function for the floating-point FIR lattice filter.

Parameters:
[in] | *S | points to an instance of the floating-point FIR lattice structure.
[in] | numStages | number of filter stages.
[in] | *pCoeffs | points to the coefficient buffer. The array is of length numStages.
[in] | *pState | points to the state buffer. The array is of length numStages.
Returns:
none.

Definition at line 53 of file arm_fir_lattice_init_f32.c.

void arm_fir_lattice_init_q15 | ( | arm_fir_lattice_instance_q15 * | S,
 |  | uint16_t | numStages,
 |  | q15_t * | pCoeffs,
 |  | q15_t * | pState
 | ) |  |

Initialization function for the Q15 FIR lattice filter.

Parameters:
[in] | *S | points to an instance of the Q15 FIR lattice structure.
[in] | numStages | number of filter stages.
[in] | *pCoeffs | points to the coefficient buffer. The array is of length numStages.
[in] | *pState | points to the state buffer. The array is of length numStages.
Returns:
none.

Definition at line 53 of file arm_fir_lattice_init_q15.c.

void arm_fir_lattice_init_q31 | ( | arm_fir_lattice_instance_q31 * | S,
 |  | uint16_t | numStages,
 |  | q31_t * | pCoeffs,
 |  | q31_t * | pState
 | ) |  |

Initialization function for the Q31 FIR lattice filter.

Parameters:
[in] | *S | points to an instance of the Q31 FIR lattice structure.
[in] | numStages | number of filter stages.
[in] | *pCoeffs | points to the coefficient buffer. The array is of length numStages.
[in] | *pState | points to the state buffer. The array is of length numStages.
Returns:
none.

Definition at line 53 of file arm_fir_lattice_init_q31.c.

void arm_fir_lattice_q15 | ( | const arm_fir_lattice_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q15 FIR lattice filter.

Parameters:
[in] | *S | points to an instance of the Q15 FIR lattice structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | blockSize | number of samples to process.
Returns:
none.

Definition at line 54 of file arm_fir_lattice_q15.c.

void arm_fir_lattice_q31 | ( | const arm_fir_lattice_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q31 FIR lattice filter.

Parameters:
[in] | *S | points to an instance of the Q31 FIR lattice structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | blockSize | number of samples to process.
Returns:
none.

Scaling and Overflow Behavior: In order to avoid overflows the input signal must be scaled down by 2*log2(numStages) bits.

Definition at line 58 of file arm_fir_lattice_q31.c.

Generated on Mon Nov 28 2011 11:15:27 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Finite Impulse Response (FIR) Sparse Filters

Functions
Finite Impulse Response (FIR) Sparse Filters
Filtering Functions

Functions

void | arm_fir_sparse_f32 (arm_fir_sparse_instance_f32 *S, float32_t *pSrc, float32_t *pDst, float32_t *pScratchIn, uint32_t blockSize)
Processing function for the floating-point sparse FIR filter.
void | arm_fir_sparse_init_f32 (arm_fir_sparse_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
Initialization function for the floating-point sparse FIR filter.
void | arm_fir_sparse_init_q15 (arm_fir_sparse_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
Initialization function for the Q15 sparse FIR filter.
void | arm_fir_sparse_init_q31 (arm_fir_sparse_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
Initialization function for the Q31 sparse FIR filter.
void | arm_fir_sparse_init_q7 (arm_fir_sparse_instance_q7 *S, uint16_t numTaps, q7_t *pCoeffs, q7_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
Initialization function for the Q7 sparse FIR filter.
void | arm_fir_sparse_q15 (arm_fir_sparse_instance_q15 *S, q15_t *pSrc, q15_t *pDst, q15_t *pScratchIn, q31_t *pScratchOut, uint32_t blockSize)
Processing function for the Q15 sparse FIR filter.
void | arm_fir_sparse_q31 (arm_fir_sparse_instance_q31 *S, q31_t *pSrc, q31_t *pDst, q31_t *pScratchIn, uint32_t blockSize)
Processing function for the Q31 sparse FIR filter.
void | arm_fir_sparse_q7 (arm_fir_sparse_instance_q7 *S, q7_t *pSrc, q7_t *pDst, q7_t *pScratchIn, q31_t *pScratchOut, uint32_t blockSize)
Processing function for the Q7 sparse FIR filter.

Detailed Description

This group of functions implements sparse FIR filters. Sparse FIR filters are equivalent to standard FIR filters except that most of the coefficients are equal to zero. Sparse filters are used for simulating reflections in communications and audio applications.

There are separate functions for Q7, Q15, Q31, and floating-point data types. The functions operate on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc and pDst points to input and output arrays respectively containing blockSize values.

Algorithm:
The sparse filter instant structure contains an array of tap indices pTapDelay which specifies the locations of the non-zero coefficients. This is in addition to the coefficient array b. The implementation essentially skips the multiplications by zero and leads to an efficient realization.

     y[n] = b[0] * x[n-pTapDelay[0]] + b[1] * x[n-pTapDelay[1]] + b[2] * x[n-pTapDelay[2]] + ...+ b[numTaps-1] * x[n-pTapDelay[numTaps-1]]
Sparse FIR filter. b[n] represents the filter coefficients
pCoeffs points to a coefficient array of size numTaps; pTapDelay points to an array of nonzero indices and is also of size numTaps; pState points to a state array of size maxDelay + blockSize, where maxDelay is the largest offset value that is ever used in the pTapDelay array. Some of the processing functions also require temporary working buffers.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient and offset arrays may be shared among several instances while state variable arrays cannot be shared. There are separate instance structure declarations for each of the 4 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. The code below statically initializes each of the 4 different data type filter instance structures

arm_fir_sparse_instance_f32 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
arm_fir_sparse_instance_q31 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
arm_fir_sparse_instance_q15 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
arm_fir_sparse_instance_q7 S =  {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
Fixed-Point Behavior
Care must be taken when using the fixed-point versions of the sparse FIR filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.

Function Documentation

void arm_fir_sparse_f32 | ( | arm_fir_sparse_instance_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | float32_t * | pScratchIn,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the floating-point sparse FIR filter.

Parameters:
[in] | *S | points to an instance of the floating-point sparse FIR structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | *pScratchIn | points to a temporary buffer of size blockSize.
[in] | blockSize | number of input samples to process per call.
Returns:
none.

Definition at line 113 of file arm_fir_sparse_f32.c.

void arm_fir_sparse_init_f32 | ( | arm_fir_sparse_instance_f32 * | S,
 |  | uint16_t | numTaps,
 |  | float32_t * | pCoeffs,
 |  | float32_t * | pState,
 |  | int32_t * | pTapDelay,
 |  | uint16_t | maxDelay,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the floating-point sparse FIR filter.

Parameters:
[in,out] | *S | points to an instance of the floating-point sparse FIR structure.
[in] | numTaps | number of nonzero coefficients in the filter.
[in] | *pCoeffs | points to the array of filter coefficients.
[in] | *pState | points to the state buffer.
[in] | *pTapDelay | points to the array of offset times.
[in] | maxDelay | maximum offset time supported.
[in] | blockSize | number of samples that will be processed per block.
Returns:
none

Description:

pCoeffs holds the filter coefficients and has length numTaps. pState holds the filter's state variables and must be of length maxDelay + blockSize, where maxDelay is the maximum number of delay line values. blockSize is the number of samples processed by the arm_fir_sparse_f32() function.

Definition at line 65 of file arm_fir_sparse_init_f32.c.

void arm_fir_sparse_init_q15 | ( | arm_fir_sparse_instance_q15 * | S,
 |  | uint16_t | numTaps,
 |  | q15_t * | pCoeffs,
 |  | q15_t * | pState,
 |  | int32_t * | pTapDelay,
 |  | uint16_t | maxDelay,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q15 sparse FIR filter.

Parameters:
[in,out] | *S | points to an instance of the Q15 sparse FIR structure.
[in] | numTaps | number of nonzero coefficients in the filter.
[in] | *pCoeffs | points to the array of filter coefficients.
[in] | *pState | points to the state buffer.
[in] | *pTapDelay | points to the array of offset times.
[in] | maxDelay | maximum offset time supported.
[in] | blockSize | number of samples that will be processed per block.
Returns:
none

Description:

pCoeffs holds the filter coefficients and has length numTaps. pState holds the filter's state variables and must be of length maxDelay + blockSize, where maxDelay is the maximum number of delay line values. blockSize is the number of words processed by arm_fir_sparse_q15() function.

Definition at line 65 of file arm_fir_sparse_init_q15.c.

void arm_fir_sparse_init_q31 | ( | arm_fir_sparse_instance_q31 * | S,
 |  | uint16_t | numTaps,
 |  | q31_t * | pCoeffs,
 |  | q31_t * | pState,
 |  | int32_t * | pTapDelay,
 |  | uint16_t | maxDelay,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q31 sparse FIR filter.

Parameters:
[in,out] | *S | points to an instance of the Q31 sparse FIR structure.
[in] | numTaps | number of nonzero coefficients in the filter.
[in] | *pCoeffs | points to the array of filter coefficients.
[in] | *pState | points to the state buffer.
[in] | *pTapDelay | points to the array of offset times.
[in] | maxDelay | maximum offset time supported.
[in] | blockSize | number of samples that will be processed per block.
Returns:
none

Description:

pCoeffs holds the filter coefficients and has length numTaps. pState holds the filter's state variables and must be of length maxDelay + blockSize, where maxDelay is the maximum number of delay line values. blockSize is the number of words processed by arm_fir_sparse_q31() function.

Definition at line 64 of file arm_fir_sparse_init_q31.c.

void arm_fir_sparse_init_q7 | ( | arm_fir_sparse_instance_q7 * | S,
 |  | uint16_t | numTaps,
 |  | q7_t * | pCoeffs,
 |  | q7_t * | pState,
 |  | int32_t * | pTapDelay,
 |  | uint16_t | maxDelay,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q7 sparse FIR filter.

Parameters:
[in,out] | *S | points to an instance of the Q7 sparse FIR structure.
[in] | numTaps | number of nonzero coefficients in the filter.
[in] | *pCoeffs | points to the array of filter coefficients.
[in] | *pState | points to the state buffer.
[in] | *pTapDelay | points to the array of offset times.
[in] | maxDelay | maximum offset time supported.
[in] | blockSize | number of samples that will be processed per block.
Returns:
none

Description:

pCoeffs holds the filter coefficients and has length numTaps. pState holds the filter's state variables and must be of length maxDelay + blockSize, where maxDelay is the maximum number of delay line values. blockSize is the number of samples processed by the arm_fir_sparse_q7() function.

Definition at line 65 of file arm_fir_sparse_init_q7.c.

void arm_fir_sparse_q15 | ( | arm_fir_sparse_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | q15_t * | pScratchIn,
 |  | q31_t * | pScratchOut,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q15 sparse FIR filter.

Parameters:
[in] | *S | points to an instance of the Q15 sparse FIR structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | *pScratchIn | points to a temporary buffer of size blockSize.
[in] | *pScratchOut | points to a temporary buffer of size blockSize.
[in] | blockSize | number of input samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 32-bit accumulator. The 1.15 x 1.15 multiplications yield a 2.30 result and these are added to a 2.30 accumulator. Thus the full precision of the multiplications is maintained but there is only a single guard bit in the accumulator. If the accumulator result overflows it will wrap around rather than saturate. After all multiply-accumulates are performed, the 2.30 accumulator is truncated to 2.15 format and then saturated to 1.15 format. In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.

Definition at line 60 of file arm_fir_sparse_q15.c.

void arm_fir_sparse_q31 | ( | arm_fir_sparse_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | q31_t * | pScratchIn,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q31 sparse FIR filter.

Parameters:
[in] | *S | points to an instance of the Q31 sparse FIR structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | *pScratchIn | points to a temporary buffer of size blockSize.
[in] | blockSize | number of input samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 32-bit accumulator. The 1.31 x 1.31 multiplications are truncated to 2.30 format. This leads to loss of precision on the intermediate multiplications and provides only a single guard bit. If the accumulator result overflows, it wraps around rather than saturate. In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.

Definition at line 58 of file arm_fir_sparse_q31.c.

void arm_fir_sparse_q7 | ( | arm_fir_sparse_instance_q7 * | S,
 |  | q7_t * | pSrc,
 |  | q7_t * | pDst,
 |  | q7_t * | pScratchIn,
 |  | q31_t * | pScratchOut,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q7 sparse FIR filter.

Parameters:
[in] | *S | points to an instance of the Q7 sparse FIR structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | *pScratchIn | points to a temporary buffer of size blockSize.
[in] | *pScratchOut | points to a temporary buffer of size blockSize.
[in] | blockSize | number of input samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 32-bit internal accumulator. Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. The accumulator is then converted to 18.7 format by discarding the low 7 bits. Finally, the result is truncated to 1.7 format.

Definition at line 65 of file arm_fir_sparse_q7.c.

Generated on Mon Nov 28 2011 11:15:27 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Infinite Impulse Response (IIR) Lattice Filters

Functions
Infinite Impulse Response (IIR) Lattice Filters
Filtering Functions

Functions

void | arm_iir_lattice_f32 (const arm_iir_lattice_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point IIR lattice filter.
void | arm_iir_lattice_init_f32 (arm_iir_lattice_instance_f32 *S, uint16_t numStages, float32_t *pkCoeffs, float32_t *pvCoeffs, float32_t *pState, uint32_t blockSize)
Initialization function for the floating-point IIR lattice filter.
void | arm_iir_lattice_init_q15 (arm_iir_lattice_instance_q15 *S, uint16_t numStages, q15_t *pkCoeffs, q15_t *pvCoeffs, q15_t *pState, uint32_t blockSize)
Initialization function for the Q15 IIR lattice filter.
void | arm_iir_lattice_init_q31 (arm_iir_lattice_instance_q31 *S, uint16_t numStages, q31_t *pkCoeffs, q31_t *pvCoeffs, q31_t *pState, uint32_t blockSize)
Initialization function for the Q31 IIR lattice filter.
void | arm_iir_lattice_q15 (const arm_iir_lattice_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 IIR lattice filter.
void | arm_iir_lattice_q31 (const arm_iir_lattice_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 IIR lattice filter.

Detailed Description

This set of functions implements lattice filters for Q15, Q31 and floating-point data types. Lattice filters are used in a variety of adaptive filter applications. The filter structure has feedforward and feedback components and the net impulse response is infinite length. The functions operate on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc and pDst point to input and output arrays containing blockSize values.

Algorithm:
Infinite Impulse Response Lattice filter

    fN(n)   =  x(n)
    fm-1(n) = fm(n) - km * gm-1(n-1)   for m = N, N-1, ...1
    gm(n)   = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ...1
    y(n)    = vN * gN(n) + vN-1 * gN-1(n) + ...+ v0 * g0(n)
pkCoeffs points to array of reflection coefficients of size numStages. Reflection coefficients are stored in time-reversed order.

    {kN, kN-1, ....k1}
pvCoeffs points to the array of ladder coefficients of size (numStages+1). Ladder coefficients are stored in time-reversed order.

    {vN, vN-1, ...v0}
pState points to a state array of size numStages + blockSize. The state variables shown in the figure above (the g values) are stored in the pState array. The state variables are updated after each block of data is processed; the coefficients are untouched.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. There are separate instance structure declarations for each of the 3 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:

arm_iir_lattice_instance_f32 S = {numStages, pState, pkCoeffs, pvCoeffs};
arm_iir_lattice_instance_q31 S = {numStages, pState, pkCoeffs, pvCoeffs};
arm_iir_lattice_instance_q15 S = {numStages, pState, pkCoeffs, pvCoeffs};
where numStages is the number of stages in the filter; pState points to the state buffer array; pkCoeffs points to array of the reflection coefficients; pvCoeffs points to the array of ladder coefficients.
Fixed-Point Behavior
Care must be taken when using the fixed-point versions of the IIR lattice filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.

Function Documentation

void arm_iir_lattice_f32 | ( | const arm_iir_lattice_instance_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the floating-point IIR lattice filter.

Parameters:
[in] | *S | points to an instance of the floating-point IIR lattice structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process.
Returns:
none.

Definition at line 120 of file arm_iir_lattice_f32.c.

void arm_iir_lattice_init_f32 | ( | arm_iir_lattice_instance_f32 * | S,
 |  | uint16_t | numStages,
 |  | float32_t * | pkCoeffs,
 |  | float32_t * | pvCoeffs,
 |  | float32_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the floating-point IIR lattice filter.

Parameters:
[in] | *S | points to an instance of the floating-point IIR lattice structure.
[in] | numStages | number of stages in the filter.
[in] | *pkCoeffs | points to the reflection coefficient buffer. The array is of length numStages.
[in] | *pvCoeffs | points to the ladder coefficient buffer. The array is of length numStages+1.
[in] | *pState | points to the state buffer. The array is of length numStages+blockSize.
[in] | blockSize | number of samples to process.
Returns:
none.

Definition at line 55 of file arm_iir_lattice_init_f32.c.

void arm_iir_lattice_init_q15 | ( | arm_iir_lattice_instance_q15 * | S,
 |  | uint16_t | numStages,
 |  | q15_t * | pkCoeffs,
 |  | q15_t * | pvCoeffs,
 |  | q15_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q15 IIR lattice filter.

Parameters:
[in] | *S | points to an instance of the Q15 IIR lattice structure.
[in] | numStages | number of stages in the filter.
[in] | *pkCoeffs | points to reflection coefficient buffer. The array is of length numStages.
[in] | *pvCoeffs | points to ladder coefficient buffer. The array is of length numStages+1.
[in] | *pState | points to state buffer. The array is of length numStages+blockSize.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Definition at line 55 of file arm_iir_lattice_init_q15.c.

void arm_iir_lattice_init_q31 | ( | arm_iir_lattice_instance_q31 * | S,
 |  | uint16_t | numStages,
 |  | q31_t * | pkCoeffs,
 |  | q31_t * | pvCoeffs,
 |  | q31_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q31 IIR lattice filter.

Parameters:
[in] | *S | points to an instance of the Q31 IIR lattice structure.
[in] | numStages | number of stages in the filter.
[in] | *pkCoeffs | points to the reflection coefficient buffer. The array is of length numStages.
[in] | *pvCoeffs | points to the ladder coefficient buffer. The array is of length numStages+1.
[in] | *pState | points to the state buffer. The array is of length numStages+blockSize.
[in] | blockSize | number of samples to process.
Returns:
none.

Definition at line 55 of file arm_iir_lattice_init_q31.c.

void arm_iir_lattice_q15 | ( | const arm_iir_lattice_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q15 IIR lattice filter.

Parameters:
[in] | *S | points to an instance of the Q15 IIR lattice structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.

Definition at line 63 of file arm_iir_lattice_q15.c.

void arm_iir_lattice_q31 | ( | const arm_iir_lattice_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q31 IIR lattice filter.

Parameters:
[in] | *S | points to an instance of the Q31 IIR lattice structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 2*log2(numStages) bits. After all multiply-accumulates are performed, the 2.62 accumulator is saturated to 1.32 format and then truncated to 1.31 format.

Definition at line 62 of file arm_iir_lattice_q31.c.

Generated on Mon Nov 28 2011 11:15:27 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Least Mean Square (LMS) Filters

Functions
Least Mean Square (LMS) Filters
Filtering Functions

Functions

void | arm_lms_f32 (const arm_lms_instance_f32 *S, float32_t *pSrc, float32_t *pRef, float32_t *pOut, float32_t *pErr, uint32_t blockSize)
Processing function for floating-point LMS filter.
void | arm_lms_init_f32 (arm_lms_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, float32_t mu, uint32_t blockSize)
Initialization function for floating-point LMS filter.
void | arm_lms_init_q15 (arm_lms_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, q15_t mu, uint32_t blockSize, uint32_t postShift)
Initialization function for the Q15 LMS filter.
void | arm_lms_init_q31 (arm_lms_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, q31_t mu, uint32_t blockSize, uint32_t postShift)
Initialization function for Q31 LMS filter.
void | arm_lms_q15 (const arm_lms_instance_q15 *S, q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize)
Processing function for Q15 LMS filter.
void | arm_lms_q31 (const arm_lms_instance_q31 *S, q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize)
Processing function for Q31 LMS filter.

Detailed Description

LMS filters are a class of adaptive filters that are able to "learn" an unknown transfer functions. LMS filters use a gradient descent method in which the filter coefficients are updated based on the instantaneous error signal. Adaptive filters are often used in communication systems, equalizers, and noise removal. The CMSIS DSP Library contains LMS filter functions that operate on Q15, Q31, and floating-point data types. The library also contains normalized LMS filters in which the filter coefficient adaptation is indepedent of the level of the input signal.

An LMS filter consists of two components as shown below. The first component is a standard transversal or FIR filter. The second component is a coefficient update mechanism. The LMS filter has two input signals. The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter. That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input. The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input. This "error signal" tends towards zero as the filter adapts. The LMS processing functions accept the input and reference input signals and generate the filter output and error signal.

Internal structure of the Least Mean Square filter

The functions operate on blocks of data and each call to the function processes blockSize samples through the filter. pSrc points to input signal, pRef points to reference signal, pOut points to output signal and pErr points to error signal. All arrays contain blockSize values.

The functions operate on a block-by-block basis. Internally, the filter coefficients b[n] are updated on a sample-by-sample basis. The convergence of the LMS filter is slower compared to the normalized LMS algorithm.

Algorithm:
The output signal y[n] is computed by a standard FIR filter:

     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
The error signal equals the difference between the reference signal d[n] and the filter output:

     e[n] = d[n] - y[n].
After each sample of the error signal is computed, the filter coefficients b[k] are updated on a sample-by-sample basis:

     b[k] = b[k] + e[n] * mu * x[n-k],  for k=0, 1, ..., numTaps-1
where mu is the step size and controls the rate of coefficient convergence.
In the APIs, pCoeffs points to a coefficient array of size numTaps. Coefficients are stored in time reversed order.

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to a state array of size numTaps + blockSize - 1. Samples in the state buffer are stored in the order:

    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1 samples. The increased state buffer length allows circular addressing, which is traditionally used in FIR filters, to be avoided and yields a significant speed improvement. The state variables are updated after each block of data is processed.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter and coefficient and state arrays cannot be shared among instances. There are separate instance structure declarations for each of the 3 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. The code below statically initializes each of the 3 different data type filter instance structures

    arm_lms_instance_f32 S = {numTaps, pState, pCoeffs, mu};
    arm_lms_instance_q31 S = {numTaps, pState, pCoeffs, mu, postShift};
    arm_lms_instance_q15 S = {numTaps, pState, pCoeffs, mu, postShift};
where numTaps is the number of filter coefficients in the filter; pState is the address of the state buffer; pCoeffs is the address of the coefficient buffer; mu is the step size parameter; and postShift is the shift applied to coefficients.
Fixed-Point Behavior:
Care must be taken when using the Q15 and Q31 versions of the LMS filter. The following issues must be considered:
  • Scaling of coefficients
  • Overflow and saturation
Scaling of Coefficients:
Filter coefficients are represented as fractional values and coefficients are restricted to lie in the range [-1 +1). The fixed-point functions have an additional scaling parameter postShift. At the output of the filter's accumulator is a shift register which shifts the result by postShift bits. This essentially scales the filter coefficients by 2^postShift and allows the filter coefficients to exceed the range [+1 -1). The value of postShift is set by the user based on the expected gain through the system being modeled.
Overflow and Saturation:
Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are described separately as part of the function specific documentation below.

Function Documentation

void arm_lms_f32 | ( | const arm_lms_instance_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pRef,
 |  | float32_t * | pOut,
 |  | float32_t * | pErr,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for floating-point LMS filter.

This function operates on floating-point data types.

Parameters:
[in] | *S | points to an instance of the floating-point LMS filter structure.
[in] | *pSrc | points to the block of input data.
[in] | *pRef | points to the block of reference data.
[out] | *pOut | points to the block of output data.
[out] | *pErr | points to the block of error data.
[in] | blockSize | number of samples to process.
Returns:
none.

Definition at line 170 of file arm_lms_f32.c.

void arm_lms_init_f32 | ( | arm_lms_instance_f32 * | S,
 |  | uint16_t | numTaps,
 |  | float32_t * | pCoeffs,
 |  | float32_t * | pState,
 |  | float32_t | mu,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for floating-point LMS filter.

Parameters:
[in] | *S | points to an instance of the floating-point LMS filter structure.
[in] | numTaps | number of filter coefficients.
[in] | *pCoeffs | points to the coefficient buffer.
[in] | *pState | points to state buffer.
[in] | mu | step size that controls filter coefficient updates.
[in] | blockSize | number of samples to process.
Returns:
none.
Description:
pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
The initial filter coefficients serve as a starting point for the adaptive filter. pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_f32().

Definition at line 61 of file arm_lms_init_f32.c.

void arm_lms_init_q15 | ( | arm_lms_instance_q15 * | S,
 |  | uint16_t | numTaps,
 |  | q15_t * | pCoeffs,
 |  | q15_t * | pState,
 |  | q15_t | mu,
 |  | uint32_t | blockSize,
 |  | uint32_t | postShift
 | ) |  |

Initialization function for the Q15 LMS filter.

Parameters:
[in] | *S | points to an instance of the Q15 LMS filter structure.
[in] | numTaps | number of filter coefficients.
[in] | *pCoeffs | points to the coefficient buffer.
[in] | *pState | points to the state buffer.
[in] | mu | step size that controls filter coefficient updates.
[in] | blockSize | number of samples to process.
[in] | postShift | bit shift applied to coefficients.
Returns:
none.
Description:
pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
The initial filter coefficients serve as a starting point for the adaptive filter. pState points to the array of state variables and size of array is numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_q15().

Definition at line 66 of file arm_lms_init_q15.c.

void arm_lms_init_q31 | ( | arm_lms_instance_q31 * | S,
 |  | uint16_t | numTaps,
 |  | q31_t * | pCoeffs,
 |  | q31_t * | pState,
 |  | q31_t | mu,
 |  | uint32_t | blockSize,
 |  | uint32_t | postShift
 | ) |  |

Initialization function for Q31 LMS filter.

Parameters:
[in] | *S | points to an instance of the Q31 LMS filter structure.
[in] | numTaps | number of filter coefficients.
[in] | *pCoeffs | points to coefficient buffer.
[in] | *pState | points to state buffer.
[in] | mu | step size that controls filter coefficient updates.
[in] | blockSize | number of samples to process.
[in] | postShift | bit shift applied to coefficients.
Returns:
none.
Description:
pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
The initial filter coefficients serve as a starting point for the adaptive filter. pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_q31().

Definition at line 66 of file arm_lms_init_q31.c.

void arm_lms_q15 | ( | const arm_lms_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pRef,
 |  | q15_t * | pOut,
 |  | q15_t * | pErr,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for Q15 LMS filter.

Parameters:
[in] | *S | points to an instance of the Q15 LMS filter structure.
[in] | *pSrc | points to the block of input data.
[in] | *pRef | points to the block of reference data.
[out] | *pOut | points to the block of output data.
[out] | *pErr | points to the block of error data.
[in] | blockSize | number of samples to process.
Returns:
none.
Scaling and Overflow Behavior:
The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.
In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.

Definition at line 66 of file arm_lms_q15.c.

void arm_lms_q31 | ( | const arm_lms_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pRef,
 |  | q31_t * | pOut,
 |  | q31_t * | pErr,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for Q31 LMS filter.

Parameters:
[in] | *S | points to an instance of the Q15 LMS filter structure.
[in] | *pSrc | points to the block of input data.
[in] | *pRef | points to the block of reference data.
[out] | *pOut | points to the block of output data.
[out] | *pErr | points to the block of error data.
[in] | blockSize | number of samples to process.
Returns:
none.
Scaling and Overflow Behavior:
The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clips. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. The reference signal should not be scaled down. After all multiply-accumulates are performed, the 2.62 accumulator is shifted and saturated to 1.31 format to yield the final result. The output signal and error signal are in 1.31 format.
In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.

Definition at line 69 of file arm_lms_q31.c.

Generated on Mon Nov 28 2011 11:15:27 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Normalized LMS Filters

Functions
Normalized LMS Filters
Filtering Functions

Functions

void | arm_lms_norm_f32 (arm_lms_norm_instance_f32 *S, float32_t *pSrc, float32_t *pRef, float32_t *pOut, float32_t *pErr, uint32_t blockSize)
Processing function for floating-point normalized LMS filter.
void | arm_lms_norm_init_f32 (arm_lms_norm_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, float32_t mu, uint32_t blockSize)
Initialization function for floating-point normalized LMS filter.
void | arm_lms_norm_init_q15 (arm_lms_norm_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, q15_t mu, uint32_t blockSize, uint8_t postShift)
Initialization function for Q15 normalized LMS filter.
void | arm_lms_norm_init_q31 (arm_lms_norm_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, q31_t mu, uint32_t blockSize, uint8_t postShift)
Initialization function for Q31 normalized LMS filter.
void | arm_lms_norm_q15 (arm_lms_norm_instance_q15 *S, q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize)
Processing function for Q15 normalized LMS filter.
void | arm_lms_norm_q31 (arm_lms_norm_instance_q31 *S, q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize)
Processing function for Q31 normalized LMS filter.

Detailed Description

This set of functions implements a commonly used adaptive filter. It is related to the Least Mean Square (LMS) adaptive filter and includes an additional normalization factor which increases the adaptation rate of the filter. The CMSIS DSP Library contains normalized LMS filter functions that operate on Q15, Q31, and floating-point data types.

A normalized least mean square (NLMS) filter consists of two components as shown below. The first component is a standard transversal or FIR filter. The second component is a coefficient update mechanism. The NLMS filter has two input signals. The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter. That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input. The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input. This "error signal" tends towards zero as the filter adapts. The NLMS processing functions accept the input and reference input signals and generate the filter output and error signal.

Internal structure of the NLMS adaptive filter

The functions operate on blocks of data and each call to the function processes blockSize samples through the filter. pSrc points to input signal, pRef points to reference signal, pOut points to output signal and pErr points to error signal. All arrays contain blockSize values.

The functions operate on a block-by-block basis. Internally, the filter coefficients b[n] are updated on a sample-by-sample basis. The convergence of the LMS filter is slower compared to the normalized LMS algorithm.

Algorithm:
The output signal y[n] is computed by a standard FIR filter:

     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
The error signal equals the difference between the reference signal d[n] and the filter output:

     e[n] = d[n] - y[n].
After each sample of the error signal is computed the instanteous energy of the filter state variables is calculated:

    E = x[n]^2 + x[n-1]^2 + ... + x[n-numTaps+1]^2.
The filter coefficients b[k] are then updated on a sample-by-sample basis:

     b[k] = b[k] + e[n] * (mu/E) * x[n-k],  for k=0, 1, ..., numTaps-1
where mu is the step size and controls the rate of coefficient convergence.
In the APIs, pCoeffs points to a coefficient array of size numTaps. Coefficients are stored in time reversed order.

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to a state array of size numTaps + blockSize - 1. Samples in the state buffer are stored in the order:

    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1 samples. The increased state buffer length allows circular addressing, which is traditionally used in FIR filters, to be avoided and yields a significant speed improvement. The state variables are updated after each block of data is processed.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter and coefficient and state arrays cannot be shared among instances. There are separate instance structure declarations for each of the 3 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
Fixed-Point Behavior:
Care must be taken when using the Q15 and Q31 versions of the normalised LMS filter. The following issues must be considered:
  • Scaling of coefficients
  • Overflow and saturation
Scaling of Coefficients:
Filter coefficients are represented as fractional values and coefficients are restricted to lie in the range [-1 +1). The fixed-point functions have an additional scaling parameter postShift. At the output of the filter's accumulator is a shift register which shifts the result by postShift bits. This essentially scales the filter coefficients by 2^postShift and allows the filter coefficients to exceed the range [+1 -1). The value of postShift is set by the user based on the expected gain through the system being modeled.
Overflow and Saturation:
Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are described separately as part of the function specific documentation below.

Function Documentation

void arm_lms_norm_f32 | ( | arm_lms_norm_instance_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pRef,
 |  | float32_t * | pOut,
 |  | float32_t * | pErr,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for floating-point normalized LMS filter.

Parameters:
[in] | *S | points to an instance of the floating-point normalized LMS filter structure.
[in] | *pSrc | points to the block of input data.
[in] | *pRef | points to the block of reference data.
[out] | *pOut | points to the block of output data.
[out] | *pErr | points to the block of error data.
[in] | blockSize | number of samples to process.
Returns:
none.

Definition at line 160 of file arm_lms_norm_f32.c.

void arm_lms_norm_init_f32 | ( | arm_lms_norm_instance_f32 * | S,
 |  | uint16_t | numTaps,
 |  | float32_t * | pCoeffs,
 |  | float32_t * | pState,
 |  | float32_t | mu,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for floating-point normalized LMS filter.

Parameters:
[in] | *S | points to an instance of the floating-point LMS filter structure.
[in] | numTaps | number of filter coefficients.
[in] | *pCoeffs | points to coefficient buffer.
[in] | *pState | points to state buffer.
[in] | mu | step size that controls filter coefficient updates.
[in] | blockSize | number of samples to process.
Returns:
none.
Description:
pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
The initial filter coefficients serve as a starting point for the adaptive filter. pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_norm_f32().

Definition at line 64 of file arm_lms_norm_init_f32.c.

void arm_lms_norm_init_q15 | ( | arm_lms_norm_instance_q15 * | S,
 |  | uint16_t | numTaps,
 |  | q15_t * | pCoeffs,
 |  | q15_t * | pState,
 |  | q15_t | mu,
 |  | uint32_t | blockSize,
 |  | uint8_t | postShift
 | ) |  |

Initialization function for Q15 normalized LMS filter.

Parameters:
[in] | *S | points to an instance of the Q15 normalized LMS filter structure.
[in] | numTaps | number of filter coefficients.
[in] | *pCoeffs | points to coefficient buffer.
[in] | *pState | points to state buffer.
[in] | mu | step size that controls filter coefficient updates.
[in] | blockSize | number of samples to process.
[in] | postShift | bit shift applied to coefficients.
Returns:
none.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
The initial filter coefficients serve as a starting point for the adaptive filter. pState points to the array of state variables and size of array is numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_norm_q15().

Definition at line 64 of file arm_lms_norm_init_q15.c.

void arm_lms_norm_init_q31 | ( | arm_lms_norm_instance_q31 * | S,
 |  | uint16_t | numTaps,
 |  | q31_t * | pCoeffs,
 |  | q31_t * | pState,
 |  | q31_t | mu,
 |  | uint32_t | blockSize,
 |  | uint8_t | postShift
 | ) |  |

Initialization function for Q31 normalized LMS filter.

Parameters:
[in] | *S | points to an instance of the Q31 normalized LMS filter structure.
[in] | numTaps | number of filter coefficients.
[in] | *pCoeffs | points to coefficient buffer.
[in] | *pState | points to state buffer.
[in] | mu | step size that controls filter coefficient updates.
[in] | blockSize | number of samples to process.
[in] | postShift | bit shift applied to coefficients.
Returns:
none.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
The initial filter coefficients serve as a starting point for the adaptive filter. pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_norm_q31().

Definition at line 63 of file arm_lms_norm_init_q31.c.

void arm_lms_norm_q15 | ( | arm_lms_norm_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pRef,
 |  | q15_t * | pOut,
 |  | q15_t * | pErr,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for Q15 normalized LMS filter.

Parameters:
[in] | *S | points to an instance of the Q15 normalized LMS filter structure.
[in] | *pSrc | points to the block of input data.
[in] | *pRef | points to the block of reference data.
[out] | *pOut | points to the block of output data.
[out] | *pErr | points to the block of error data.
[in] | blockSize | number of samples to process.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.
In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.

Definition at line 71 of file arm_lms_norm_q15.c.

void arm_lms_norm_q31 | ( | arm_lms_norm_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pRef,
 |  | q31_t * | pOut,
 |  | q31_t * | pErr,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for Q31 normalized LMS filter.

Parameters:
[in] | *S | points to an instance of the Q31 normalized LMS filter structure.
[in] | *pSrc | points to the block of input data.
[in] | *pRef | points to the block of reference data.
[out] | *pOut | points to the block of output data.
[out] | *pErr | points to the block of error data.
[in] | blockSize | number of samples to process.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. The reference signal should not be scaled down. After all multiply-accumulates are performed, the 2.62 accumulator is shifted and saturated to 1.31 format to yield the final result. The output signal and error signal are in 1.31 format.
In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.

Definition at line 72 of file arm_lms_norm_q31.c.

Generated on Mon Nov 28 2011 11:15:27 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Finite Impulse Response (FIR) Interpolator

Functions
Finite Impulse Response (FIR) Interpolator
Filtering Functions

Functions

void | arm_fir_interpolate_f32 (const arm_fir_interpolate_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point FIR interpolator.
arm_status | arm_fir_interpolate_init_f32 (arm_fir_interpolate_instance_f32 *S, uint8_t L, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
Initialization function for the floating-point FIR interpolator.
arm_status | arm_fir_interpolate_init_q15 (arm_fir_interpolate_instance_q15 *S, uint8_t L, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
Initialization function for the Q15 FIR interpolator.
arm_status | arm_fir_interpolate_init_q31 (arm_fir_interpolate_instance_q31 *S, uint8_t L, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
Initialization function for the Q31 FIR interpolator.
void | arm_fir_interpolate_q15 (const arm_fir_interpolate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 FIR interpolator.
void | arm_fir_interpolate_q31 (const arm_fir_interpolate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 FIR interpolator.

Detailed Description

These functions combine an upsampler (zero stuffer) and an FIR filter. They are used in multirate systems for increasing the sample rate of a signal without introducing high frequency images. Conceptually, the functions are equivalent to the block diagram below:

Components included in the FIR Interpolator functions

After upsampling by a factor of L, the signal should be filtered by a lowpass filter with a normalized cutoff frequency of 1/L in order to eliminate high frequency copies of the spectrum. The user of the function is responsible for providing the filter coefficients.

The FIR interpolator functions provided in the CMSIS DSP Library combine the upsampler and FIR filter in an efficient manner. The upsampler inserts L-1 zeros between each sample. Instead of multiplying by these zero values, the FIR filter is designed to skip them. This leads to an efficient implementation without any wasted effort. The functions operate on blocks of input and output data. pSrc points to an array of blockSize input values and pDst points to an array of blockSize*L output values.

The library provides separate functions for Q15, Q31, and floating-point data types.

Algorithm:
The functions use a polyphase filter structure:

    y[n] = b[0] * x[n] + b[L]   * x[n-1] + ... + b[L*(phaseLength-1)] * x[n-phaseLength+1]
    y[n+1] = b[1] * x[n] + b[L+1] * x[n-1] + ... + b[L*(phaseLength-1)+1] * x[n-phaseLength+1]
    ...
    y[n+(L-1)] = b[L-1] * x[n] + b[2*L-1] * x[n-1] + ....+ b[L*(phaseLength-1)+(L-1)] * x[n-phaseLength+1]
This approach is more efficient than straightforward upsample-then-filter algorithms. With this method the computation is reduced by a factor of 1/L when compared to using a standard FIR filter.
pCoeffs points to a coefficient array of size numTaps. numTaps must be a multiple of the interpolation factor L and this is checked by the initialization functions. Internally, the function divides the FIR filter's impulse response into shorter filters of length phaseLength=numTaps/L. Coefficients are stored in time reversed order.

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to a state array of size blockSize + phaseLength - 1. Samples in the state buffer are stored in the order:

    {x[n-phaseLength+1], x[n-phaseLength], x[n-phaseLength-1], x[n-phaseLength-2]....x[0], x[1], ..., x[blockSize-1]}
The state variables are updated after each block of data is processed, the coefficients are untouched.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable array should be allocated separately. There are separate instance structure declarations for each of the 3 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
  • Checks to make sure that the length of the filter is a multiple of the interpolation factor.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. The code below statically initializes each of the 3 different data type filter instance structures

 arm_fir_interpolate_instance_f32 S = {L, phaseLength, pCoeffs, pState};
 arm_fir_interpolate_instance_q31 S = {L, phaseLength, pCoeffs, pState};
 arm_fir_interpolate_instance_q15 S = {L, phaseLength, pCoeffs, pState};
where L is the interpolation factor; phaseLength=numTaps/L is the length of each of the shorter FIR filters used internally, pCoeffs is the address of the coefficient buffer; pState is the address of the state buffer. Be sure to set the values in the state buffer to zeros when doing static initialization.
Fixed-Point Behavior
Care must be taken when using the fixed-point versions of the FIR interpolate filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.

Function Documentation

void arm_fir_interpolate_f32 | ( | const arm_fir_interpolate_instance_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the floating-point FIR interpolator.

Parameters:
[in] | *S | points to an instance of the floating-point FIR interpolator structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of input samples to process per call.
Returns:
none.

Definition at line 135 of file arm_fir_interpolate_f32.c.

arm_status arm_fir_interpolate_init_f32 | ( | arm_fir_interpolate_instance_f32 * | S,
 |  | uint8_t | L,
 |  | uint16_t | numTaps,
 |  | float32_t * | pCoeffs,
 |  | float32_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the floating-point FIR interpolator.

Parameters:
[in,out] | *S | points to an instance of the floating-point FIR interpolator structure.
[in] | L | upsample factor.
[in] | numTaps | number of filter coefficients in the filter.
[in] | *pCoeffs | points to the filter coefficient buffer.
[in] | *pState | points to the state buffer.
[in] | blockSize | number of input samples to process per call.
Returns:
The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if the filter length numTaps is not a multiple of the interpolation factor L.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
The length of the filter numTaps must be a multiple of the interpolation factor L.
pState points to the array of state variables. pState is of length (numTaps/L)+blockSize-1 words where blockSize is the number of input samples processed by each call to arm_fir_interpolate_f32().

Definition at line 68 of file arm_fir_interpolate_init_f32.c.

arm_status arm_fir_interpolate_init_q15 | ( | arm_fir_interpolate_instance_q15 * | S,
 |  | uint8_t | L,
 |  | uint16_t | numTaps,
 |  | q15_t * | pCoeffs,
 |  | q15_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q15 FIR interpolator.

Parameters:
[in,out] | *S | points to an instance of the Q15 FIR interpolator structure.
[in] | L | upsample factor.
[in] | numTaps | number of filter coefficients in the filter.
[in] | *pCoeffs | points to the filter coefficient buffer.
[in] | *pState | points to the state buffer.
[in] | blockSize | number of input samples to process per call.
Returns:
The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if the filter length numTaps is not a multiple of the interpolation factor L.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
The length of the filter numTaps must be a multiple of the interpolation factor L.
pState points to the array of state variables. pState is of length (numTaps/L)+blockSize-1 words where blockSize is the number of input samples processed by each call to arm_fir_interpolate_q15().

Definition at line 68 of file arm_fir_interpolate_init_q15.c.

arm_status arm_fir_interpolate_init_q31 | ( | arm_fir_interpolate_instance_q31 * | S,
 |  | uint8_t | L,
 |  | uint16_t | numTaps,
 |  | q31_t * | pCoeffs,
 |  | q31_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q31 FIR interpolator.

Parameters:
[in,out] | *S | points to an instance of the Q31 FIR interpolator structure.
[in] | L | upsample factor.
[in] | numTaps | number of filter coefficients in the filter.
[in] | *pCoeffs | points to the filter coefficient buffer.
[in] | *pState | points to the state buffer.
[in] | blockSize | number of input samples to process per call.
Returns:
The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if the filter length numTaps is not a multiple of the interpolation factor L.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
The length of the filter numTaps must be a multiple of the interpolation factor L.
pState points to the array of state variables. pState is of length (numTaps/L)+blockSize-1 words where blockSize is the number of input samples processed by each call to arm_fir_interpolate_q31().

Definition at line 69 of file arm_fir_interpolate_init_q31.c.

void arm_fir_interpolate_q15 | ( | const arm_fir_interpolate_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q15 FIR interpolator.

Parameters:
[in] | *S | points to an instance of the Q15 FIR interpolator structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of input samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.

Definition at line 62 of file arm_fir_interpolate_q15.c.

void arm_fir_interpolate_q31 | ( | const arm_fir_interpolate_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q31 FIR interpolator.

Parameters:
[in] | *S | points to an instance of the Q31 FIR interpolator structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of input samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 1/(numTaps/L). since numTaps/L additions occur per output sample. After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.

Definition at line 63 of file arm_fir_interpolate_q31.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Matrix Functions

Modules
Matrix Functions
Functions

Modules

Matrix Addition
Matrix Initialization
Matrix Inverse
Matrix Multiplication
Matrix Scale
Matrix Subtraction
Matrix Transpose

Detailed Description

This set of functions provides basic matrix math operations. The functions operate on matrix data structures. For example, the type definition for the floating-point matrix structure is shown below:

     typedef struct
     {
       uint16_t numRows;     // number of rows of the matrix.
       uint16_t numCols;     // number of columns of the matrix.
       float32_t *pData;     // points to the data of the matrix.
     } arm_matrix_instance_f32;

There are similar definitions for Q15 and Q31 data types.

The structure specifies the size of the matrix and then points to an array of data. The array is of size numRows X numCols and the values are arranged in row order. That is, the matrix element (i, j) is stored at:

     pData[i*numCols + j]
Init Functions
There is an associated initialization function for each type of matrix data structure. The initialization function sets the values of the internal structure fields. Refer to the function arm_mat_init_f32(), arm_mat_init_q31() and arm_mat_init_q15() for floating-point, Q31 and Q15 types, respectively.
Use of the initialization function is optional. However, if initialization function is used then the instance structure cannot be placed into a const data section. To place the instance structure in a const data section, manually initialize the data structure. For example:
 arm_matrix_instance_f32 S = {nRows, nColumns, pData};
 arm_matrix_instance_q31 S = {nRows, nColumns, pData};
 arm_matrix_instance_q15 S = {nRows, nColumns, pData};
where nRows specifies the number of rows, nColumns specifies the number of columns, and pData points to the data array.
Size Checking
By default all of the matrix functions perform size checking on the input and output matrices. For example, the matrix addition function verifies that the two input matrices and the output matrix all have the same number of rows and columns. If the size check fails the functions return:
     ARM_MATH_SIZE_MISMATCH
Otherwise the functions return
     ARM_MATH_SUCCESS
There is some overhead associated with this matrix size checking. The matrix size checking is enabled via the #define
     ARM_MATH_MATRIX_CHECK
within the library project settings. By default this macro is defined and size checking is enabled. By changing the project settings and undefining this macro size checking is eliminated and the functions run a bit faster. With size checking disabled the functions always return ARM_MATH_SUCCESS.
Generated on Mon Nov 28 2011 11:15:25 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Matrix Addition

Functions
Matrix Addition
Matrix Functions

Functions

arm_status | arm_mat_add_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
Floating-point matrix addition.
arm_status | arm_mat_add_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst)
Q15 matrix addition.
arm_status | arm_mat_add_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
Q31 matrix addition.

Detailed Description

Adds two matrices.

Addition of two 3 x 3 matrices

The functions check to make sure that pSrcA, pSrcB, and pDst have the same number of rows and columns.

Function Documentation

arm_status arm_mat_add_f32 | ( | const arm_matrix_instance_f32 * | pSrcA,
 |  | const arm_matrix_instance_f32 * | pSrcB,
 |  | arm_matrix_instance_f32 * | pDst
 | ) |  |

Floating-point matrix addition.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Definition at line 68 of file arm_mat_add_f32.c.

arm_status arm_mat_add_q15 | ( | const arm_matrix_instance_q15 * | pSrcA,
 |  | const arm_matrix_instance_q15 * | pSrcB,
 |  | arm_matrix_instance_q15 * | pDst
 | ) |  |

Q15 matrix addition.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.

Definition at line 61 of file arm_mat_add_q15.c.

arm_status arm_mat_add_q31 | ( | const arm_matrix_instance_q31 * | pSrcA,
 |  | const arm_matrix_instance_q31 * | pSrcB,
 |  | arm_matrix_instance_q31 * | pDst
 | ) |  |

Q31 matrix addition.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.

Definition at line 61 of file arm_mat_add_q31.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Matrix Initialization

Functions
Matrix Initialization
Matrix Functions

Functions

void | arm_mat_init_f32 (arm_matrix_instance_f32 *S, uint16_t nRows, uint16_t nColumns, float32_t *pData)
Floating-point matrix initialization.
void | arm_mat_init_q15 (arm_matrix_instance_q15 *S, uint16_t nRows, uint16_t nColumns, q15_t *pData)
Q15 matrix initialization.
void | arm_mat_init_q31 (arm_matrix_instance_q31 *S, uint16_t nRows, uint16_t nColumns, q31_t *pData)
Q31 matrix initialization.

Detailed Description

Initializes the underlying matrix data structure. The functions set the numRows, numCols, and pData fields of the matrix data structure.

Function Documentation

void arm_mat_init_f32 | ( | arm_matrix_instance_f32 * | S,
 |  | uint16_t | nRows,
 |  | uint16_t | nColumns,
 |  | float32_t * | pData
 | ) |  |

Floating-point matrix initialization.

Parameters:
[in,out] | *S | points to an instance of the floating-point matrix structure.
[in] | nRows | number of rows in the matrix.
[in] | nColumns | number of columns in the matrix.
[in] | *pData | points to the matrix data array.
Returns:
none

Definition at line 65 of file arm_mat_init_f32.c.

void arm_mat_init_q15 | ( | arm_matrix_instance_q15 * | S,
 |  | uint16_t | nRows,
 |  | uint16_t | nColumns,
 |  | q15_t * | pData
 | ) |  |

Q15 matrix initialization.

Parameters:
[in,out] | *S | points to an instance of the floating-point matrix structure.
[in] | nRows | number of rows in the matrix.
[in] | nColumns | number of columns in the matrix.
[in] | *pData | points to the matrix data array.
Returns:
none

Definition at line 57 of file arm_mat_init_q15.c.

void arm_mat_init_q31 | ( | arm_matrix_instance_q31 * | S,
 |  | uint16_t | nRows,
 |  | uint16_t | nColumns,
 |  | q31_t * | pData
 | ) |  |

Q31 matrix initialization.

Parameters:
[in,out] | *S | points to an instance of the floating-point matrix structure.
[in] | nRows | number of rows in the matrix.
[in] | nColumns | number of columns in the matrix.
[in] | *pData | points to the matrix data array.
Returns:
none

Definition at line 61 of file arm_mat_init_q31.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Matrix Inverse

Functions
Matrix Inverse
Matrix Functions

Functions

arm_status arm_mat_inverse_f32 (const arm_matrix_instance_f32 *pSrc, arm_matrix_instance_f32 *pDst)
Floating-point matrix inverse.

Detailed Description

Computes the inverse of a matrix.

The inverse is defined only if the input matrix is square and non-singular (the determinant is non-zero). The function checks that the input and output matrices are square and of the same size.

Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix inversion of floating-point matrices.

Algorithm
The Gauss-Jordan method is used to find the inverse. The algorithm performs a sequence of elementary row-operations till it reduces the input matrix to an identity matrix. Applying the same sequence of elementary row-operations to an identity matrix yields the inverse matrix. If the input matrix is singular, then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method

Function Documentation

arm_status arm_mat_inverse_f32 | ( | const arm_matrix_instance_f32 * | pSrc,
 |  | arm_matrix_instance_f32 * | pDst
 | ) |  |

Floating-point matrix inverse.

Parameters:
[in] | *pSrc | points to input matrix structure
[out] | *pDst | points to output matrix structure
Returns:
The function returns ARM_MATH_SIZE_MISMATCH if the input matrix is not square or if the size of the output matrix does not match the size of the input matrix. If the input matrix is found to be singular (non-invertible), then the function returns ARM_MATH_SINGULAR. Otherwise, the function returns ARM_MATH_SUCCESS.

Definition at line 74 of file arm_mat_inverse_f32.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Matrix Multiplication

Functions
Matrix Multiplication
Matrix Functions

Functions

arm_status | arm_mat_mult_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
Floating-point matrix multiplication.
arm_status | arm_mat_mult_fast_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pState)
Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4.
arm_status | arm_mat_mult_fast_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4.
arm_status | arm_mat_mult_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pState)
Q15 matrix multiplication.
arm_status | arm_mat_mult_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
Q31 matrix multiplication.

Detailed Description

Multiplies two matrices.

Multiplication of two 3 x 3 matrices

Matrix multiplication is only defined if the number of columns of the first matrix equals the number of rows of the second matrix. Multiplying an M x N matrix with an N x P matrix results in an M x P matrix. When matrix size checking is enabled, the functions check: (1) that the inner dimensions of pSrcA and pSrcB are equal; and (2) that the size of the output matrix equals the outer dimensions of pSrcA and pSrcB.

Function Documentation

arm_status arm_mat_mult_f32 | ( | const arm_matrix_instance_f32 * | pSrcA,
 |  | const arm_matrix_instance_f32 * | pSrcB,
 |  | arm_matrix_instance_f32 * | pDst
 | ) |  |

Floating-point matrix multiplication.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Definition at line 73 of file arm_mat_mult_f32.c.

arm_status arm_mat_mult_fast_q15 | ( | const arm_matrix_instance_q15 * | pSrcA,
 |  | const arm_matrix_instance_q15 * | pSrcB,
 |  | arm_matrix_instance_q15 * | pDst,
 |  | q15_t * | pState
 | ) |  |

Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
[in] | *pState | points to the array for storing intermediate results
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Scaling and Overflow Behavior:

The difference between the function arm_mat_mult_q15() and this fast variant is that the fast variant use a 32-bit rather than a 64-bit accumulator. The result of each 1.15 x 1.15 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.15 result.
The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 16 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. Scale down one of the input matrices by log2(numColsA) bits to avoid overflows, as a total of numColsA additions are computed internally for each output element.
See arm_mat_mult_q15() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.

Definition at line 74 of file arm_mat_mult_fast_q15.c.

arm_status arm_mat_mult_fast_q31 | ( | const arm_matrix_instance_q31 * | pSrcA,
 |  | const arm_matrix_instance_q31 * | pSrcB,
 |  | arm_matrix_instance_q31 * | pDst
 | ) |  |

Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Scaling and Overflow Behavior:

The difference between the function arm_mat_mult_q31() and this fast variant is that the fast variant use a 32-bit rather than a 64-bit accumulator. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.31 result.
The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. Scale down one of the input matrices by log2(numColsA) bits to avoid overflows, as a total of numColsA additions are computed internally for each output element.
See arm_mat_mult_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.

Definition at line 72 of file arm_mat_mult_fast_q31.c.

arm_status arm_mat_mult_q15 | ( | const arm_matrix_instance_q15 * | pSrcA,
 |  | const arm_matrix_instance_q15 * | pSrcB,
 |  | arm_matrix_instance_q15 * | pDst,
 |  | q15_t * | pState
 | ) |  |

Q15 matrix multiplication.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
[in] | *pState | points to the array for storing intermediate results
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. The inputs to the multiplications are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
Refer to arm_mat_mult_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.

Definition at line 74 of file arm_mat_mult_q15.c.

arm_status arm_mat_mult_q31 | ( | const arm_matrix_instance_q31 * | pSrcA,
 |  | const arm_matrix_instance_q31 * | pSrcB,
 |  | arm_matrix_instance_q31 * | pDst
 | ) |  |

Q31 matrix multiplication.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. The input is thus scaled down by log2(numColsA) bits to avoid overflows, as a total of numColsA additions are performed internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
See arm_mat_mult_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.

Definition at line 73 of file arm_mat_mult_q31.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Matrix Scale

Functions
Matrix Scale
Matrix Functions

Functions

arm_status | arm_mat_scale_f32 (const arm_matrix_instance_f32 *pSrc, float32_t scale, arm_matrix_instance_f32 *pDst)
Floating-point matrix scaling.
arm_status | arm_mat_scale_q15 (const arm_matrix_instance_q15 *pSrc, q15_t scaleFract, int32_t shift, arm_matrix_instance_q15 *pDst)
Q15 matrix scaling.
arm_status | arm_mat_scale_q31 (const arm_matrix_instance_q31 *pSrc, q31_t scaleFract, int32_t shift, arm_matrix_instance_q31 *pDst)
Q31 matrix scaling.

Detailed Description

Multiplies a matrix by a scalar. This is accomplished by multiplying each element in the matrix by the scalar. For example:

Matrix Scaling of a 3 x 3 matrix

The function checks to make sure that the input and output matrices are of the same size.

In the fixed-point Q15 and Q31 functions, scale is represented by a fractional multiplication scaleFract and an arithmetic shift shift. The shift allows the gain of the scaling operation to exceed 1.0. The overall scale factor applied to the fixed-point data is

     scale = scaleFract * 2^shift.

Function Documentation

arm_status arm_mat_scale_f32 | ( | const arm_matrix_instance_f32 * | pSrc,
 |  | float32_t | scale,
 |  | arm_matrix_instance_f32 * | pDst
 | ) |  |

Floating-point matrix scaling.

Parameters:
[in] | *pSrc | points to input matrix structure
[in] | scale | scale factor to be applied
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Definition at line 75 of file arm_mat_scale_f32.c.

arm_status arm_mat_scale_q15 | ( | const arm_matrix_instance_q15 * | pSrc,
 |  | q15_t | scaleFract,
 |  | int32_t | shift,
 |  | arm_matrix_instance_q15 * | pDst
 | ) |  |

Q15 matrix scaling.

Parameters:
[in] | *pSrc | points to input matrix
[in] | scaleFract | fractional portion of the scale factor
[in] | shift | number of bits to shift the result by
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Scaling and Overflow Behavior:

The input data *pSrc and scaleFract are in 1.15 format. These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.

Definition at line 63 of file arm_mat_scale_q15.c.

arm_status arm_mat_scale_q31 | ( | const arm_matrix_instance_q31 * | pSrc,
 |  | q31_t | scaleFract,
 |  | int32_t | shift,
 |  | arm_matrix_instance_q31 * | pDst
 | ) |  |

Q31 matrix scaling.

Parameters:
[in] | *pSrc | points to input matrix
[in] | scaleFract | fractional portion of the scale factor
[in] | shift | number of bits to shift the result by
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Scaling and Overflow Behavior:

The input data *pSrc and scaleFract are in 1.31 format. These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.

Definition at line 63 of file arm_mat_scale_q31.c.

Generated on Mon Nov 28 2011 11:15:28 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Matrix Subtraction

Functions
Matrix Subtraction
Matrix Functions

Functions

arm_status | arm_mat_sub_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
Floating-point matrix subtraction.
arm_status | arm_mat_sub_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst)
Q15 matrix subtraction.
arm_status | arm_mat_sub_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
Q31 matrix subtraction.

Detailed Description

Subtract two matrices.

Subraction of two 3 x 3 matrices

The functions check to make sure that pSrcA, pSrcB, and pDst have the same number of rows and columns.

Function Documentation

arm_status arm_mat_sub_f32 | ( | const arm_matrix_instance_f32 * | pSrcA,
 |  | const arm_matrix_instance_f32 * | pSrcB,
 |  | arm_matrix_instance_f32 * | pDst
 | ) |  |

Floating-point matrix subtraction.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Definition at line 67 of file arm_mat_sub_f32.c.

arm_status arm_mat_sub_q15 | ( | const arm_matrix_instance_q15 * | pSrcA,
 |  | const arm_matrix_instance_q15 * | pSrcB,
 |  | arm_matrix_instance_q15 * | pDst
 | ) |  |

Q15 matrix subtraction.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.

Definition at line 61 of file arm_mat_sub_q15.c.

arm_status arm_mat_sub_q31 | ( | const arm_matrix_instance_q31 * | pSrcA,
 |  | const arm_matrix_instance_q31 * | pSrcB,
 |  | arm_matrix_instance_q31 * | pDst
 | ) |  |

Q31 matrix subtraction.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.

Definition at line 62 of file arm_mat_sub_q31.c.

Generated on Mon Nov 28 2011 11:15:28 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Matrix Transpose

Functions
Matrix Transpose
Matrix Functions

Functions

arm_status | arm_mat_trans_f32 (const arm_matrix_instance_f32 *pSrc, arm_matrix_instance_f32 *pDst)
Floating-point matrix transpose.
arm_status | arm_mat_trans_q15 (const arm_matrix_instance_q15 *pSrc, arm_matrix_instance_q15 *pDst)
Q15 matrix transpose.
arm_status | arm_mat_trans_q31 (const arm_matrix_instance_q31 *pSrc, arm_matrix_instance_q31 *pDst)
Q31 matrix transpose.

Detailed Description

Tranposes a matrix. Transposing an M x N matrix flips it around the center diagonal and results in an N x M matrix.

Transpose of a 3 x 3 matrix

Function Documentation

arm_status arm_mat_trans_f32 | ( | const arm_matrix_instance_f32 * | pSrc,
 |  | arm_matrix_instance_f32 * | pDst
 | ) |  |

Floating-point matrix transpose.

Parameters:
[in] | *pSrc | points to the input matrix
[out] | *pDst | points to the output matrix
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Definition at line 64 of file arm_mat_trans_f32.c.

arm_status arm_mat_trans_q15 | ( | const arm_matrix_instance_q15 * | pSrc,
 |  | arm_matrix_instance_q15 * | pDst
 | ) |  |

Q15 matrix transpose.

Parameters:
[in] | *pSrc | points to the input matrix
[out] | *pDst | points to the output matrix
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Definition at line 55 of file arm_mat_trans_q15.c.

arm_status arm_mat_trans_q31 | ( | const arm_matrix_instance_q31 * | pSrc,
 |  | arm_matrix_instance_q31 * | pDst
 | ) |  |

Q31 matrix transpose.

Parameters:
[in] | *pSrc | points to the input matrix
[out] | *pDst | points to the output matrix
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Definition at line 55 of file arm_mat_trans_q31.c.

Generated on Mon Nov 28 2011 11:15:28 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Transform Functions

Modules
Transform Functions
Functions

Modules

Complex FFT Functions
DCT Type IV Functions
Real FFT Functions
Generated on Mon Nov 28 2011 11:15:25 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Complex FFT Functions

Functions | Variables
Complex FFT Functions
Transform Functions

Functions

void | arm_cfft_radix4_f32 (const arm_cfft_radix4_instance_f32 *S, float32_t *pSrc)
Processing function for the floating-point CFFT/CIFFT.
arm_status | arm_cfft_radix4_init_f32 (arm_cfft_radix4_instance_f32 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
Initialization function for the floating-point CFFT/CIFFT.
arm_status | arm_cfft_radix4_init_q15 (arm_cfft_radix4_instance_q15 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
Initialization function for the Q15 CFFT/CIFFT.
arm_status | arm_cfft_radix4_init_q31 (arm_cfft_radix4_instance_q31 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
Initialization function for the Q31 CFFT/CIFFT.
void | arm_cfft_radix4_q15 (const arm_cfft_radix4_instance_q15 *S, q15_t *pSrc)
Processing function for the Q15 CFFT/CIFFT.
void | arm_cfft_radix4_q31 (const arm_cfft_radix4_instance_q31 *S, q31_t *pSrc)
Processing function for the Q31 CFFT/CIFFT.

Variables

const uint16_t | armBitRevTable [256]

Detailed Description

Complex Fast Fourier Transform(CFFT) and Complex Inverse Fast Fourier Transform(CIFFT) is an efficient algorithm to compute Discrete Fourier Transform(DFT) and Inverse Discrete Fourier Transform(IDFT). Computational complexity of CFFT reduces drastically when compared to DFT.
This set of functions implements CFFT/CIFFT for Q15, Q31, and floating-point data types. The functions operates on in-place buffer which uses same buffer for input and output. Complex input is stored in input buffer in an interleaved fashion.
The functions operate on blocks of input and output data and each call to the function processes 2*fftLen samples through the transform. pSrc points to In-place arrays containing 2*fftLen values.
The pSrc points to the array of in-place buffer of size 2*fftLen and inputs and outputs are stored in an interleaved fashion as shown below.
 {real[0], imag[0], real[1], imag[1],..}
Lengths supported by the transform:
Internally, the function utilize a radix-4 decimation in frequency(DIF) algorithm and the size of the FFT supported are of the lengths [16, 64, 256, 1024].
Algorithm:

Complex Fast Fourier Transform:

Input real and imaginary data:

 x(n) = xa + j * ya
 x(n+N/4 ) = xb + j * yb
 x(n+N/2 ) = xc + j * yc
 x(n+3N 4) = xd + j * yd
where N is length of FFT
Output real and imaginary data:

 X(4r) = xa'+ j * ya'
 X(4r+1) = xb'+ j * yb'
 X(4r+2) = xc'+ j * yc'
 X(4r+3) = xd'+ j * yd'
Twiddle factors for radix-4 FFT:

 Wn = co1 + j * (- si1)
 W2n = co2 + j * (- si2)
 W3n = co3 + j * (- si3)
Radix-4 Decimation-in Frequency Complex Fast Fourier Transform
Output from Radix-4 CFFT Results in Digit reversal order. Interchange middle two branches of every butterfly results in Bit reversed output.
Butterfly CFFT equations:

 xa' = xa + xb + xc + xd
 ya' = ya + yb + yc + yd
 xc' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)
 yc' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)
 xb' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)
 yb' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)
 xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)
 yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)

Complex Inverse Fast Fourier Transform:

CIFFT uses same twiddle factor table as CFFT with modifications in the design equation as shown below.
Modified Butterfly CIFFT equations:

 xa' = xa + xb + xc + xd
 ya' = ya + yb + yc + yd
 xc' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)
 yc' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)
 xb' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)
 yb' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)
 xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)
 yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)
Instance Structure
A separate instance structure must be defined for each Instance but the twiddle factors and bit reversal tables can be reused. There are separate instance structure declarations for each of the 3 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Initializes twiddle factor table and bit reversal table pointers
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Manually initialize the instance structure as follows:

arm_cfft_radix4_instance_f32 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor, onebyfftLen};
arm_cfft_radix4_instance_q31 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor};
arm_cfft_radix4_instance_q15 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor};
where fftLen length of CFFT/CIFFT; ifftFlag Flag for selection of CFFT or CIFFT(Set ifftFlag to calculate CIFFT otherwise calculates CFFT); bitReverseFlag Flag for selection of output order(Set bitReverseFlag to output in normal order otherwise output in bit reversed order); pTwiddlepoints to array of twiddle coefficients; pBitRevTable points to the array of bit reversal table. twidCoefModifier modifier for twiddle factor table which supports all FFT lengths with same table; pBitRevTable modifier for bit reversal table which supports all FFT lengths with same table. onebyfftLen value of 1/fftLen to calculate CIFFT;
Fixed-Point Behavior
Care must be taken when using the fixed-point versions of the CFFT/CIFFT function. Refer to the function specific documentation below for usage guidelines.

Function Documentation

void arm_cfft_radix4_f32 | ( | const arm_cfft_radix4_instance_f32 * | S,
 |  | float32_t * | pSrc
 | ) |  |

Processing function for the floating-point CFFT/CIFFT.

Parameters:
[in] | *S | points to an instance of the floating-point CFFT/CIFFT structure.
[in,out] | *pSrc | points to the complex data buffer of size 2*fftLen. Processing occurs in-place.
Returns:
none.

Definition at line 177 of file arm_cfft_radix4_f32.c.

arm_status arm_cfft_radix4_init_f32 | ( | arm_cfft_radix4_instance_f32 * | S,
 |  | uint16_t | fftLen,
 |  | uint8_t | ifftFlag,
 |  | uint8_t | bitReverseFlag
 | ) |  |

Initialization function for the floating-point CFFT/CIFFT.

Parameters:
[in,out] | *S | points to an instance of the floating-point CFFT/CIFFT structure.
[in] | fftLen | length of the FFT.
[in] | ifftFlag | flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
[in] | bitReverseFlag | flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
Returns:
The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.
Description:
The parameter ifftFlag controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.

Definition at line 1118 of file arm_cfft_radix4_init_f32.c.

arm_status arm_cfft_radix4_init_q15 | ( | arm_cfft_radix4_instance_q15 * | S,
 |  | uint16_t | fftLen,
 |  | uint8_t | ifftFlag,
 |  | uint8_t | bitReverseFlag
 | ) |  |

Initialization function for the Q15 CFFT/CIFFT.

Parameters:
[in,out] | *S | points to an instance of the Q15 CFFT/CIFFT structure.
[in] | fftLen | length of the FFT.
[in] | ifftFlag | flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
[in] | bitReverseFlag | flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
Returns:
The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.
Description:
The parameter ifftFlag controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.

Definition at line 353 of file arm_cfft_radix4_init_q15.c.

arm_status arm_cfft_radix4_init_q31 | ( | arm_cfft_radix4_instance_q31 * | S,
 |  | uint16_t | fftLen,
 |  | uint8_t | ifftFlag,
 |  | uint8_t | bitReverseFlag
 | ) |  |

Initialization function for the Q31 CFFT/CIFFT.

Parameters:
[in,out] | *S | points to an instance of the Q31 CFFT/CIFFT structure.
[in] | fftLen | length of the FFT.
[in] | ifftFlag | flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
[in] | bitReverseFlag | flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
Returns:
The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.
Description:
The parameter ifftFlag controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.

Definition at line 608 of file arm_cfft_radix4_init_q31.c.

void arm_cfft_radix4_q15 | ( | const arm_cfft_radix4_instance_q15 * | S,
 |  | q15_t * | pSrc
 | ) |  |

Processing function for the Q15 CFFT/CIFFT.

Parameters:
[in] | *S | points to an instance of the Q15 CFFT/CIFFT structure.
[in,out] | *pSrc | points to the complex data buffer. Processing occurs in-place.
Returns:
none.
Input and output formats:
Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. Hence the output format is different for different FFT sizes. The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:
Input and Output Formats for Q15 CFFT
Input and Output Formats for Q15 CIFFT

Definition at line 66 of file arm_cfft_radix4_q15.c.

void arm_cfft_radix4_q31 | ( | const arm_cfft_radix4_instance_q31 * | S,
 |  | q31_t * | pSrc
 | ) |  |

Processing function for the Q31 CFFT/CIFFT.

Parameters:
[in] | *S | points to an instance of the Q31 CFFT/CIFFT structure.
[in,out] | *pSrc | points to the complex data buffer of size 2*fftLen. Processing occurs in-place.
Returns:
none.
Input and output formats:
Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. Hence the output format is different for different FFT sizes. The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:
Input and Output Formats for Q31 CFFT
Input and Output Formats for Q31 CIFFT

Definition at line 66 of file arm_cfft_radix4_q31.c.

Variable Documentation

const uint16_t armBitRevTable[256]
Pseudo code for Generation of Bit reversal Table is
for(l=1;l <= N/4;l++)
 {
   for(i=0;i<logN2;i++)
   {
     a[i]=l&(1<<i);
   }
   for(j=0; j<logN2; j++)
   {
     if (a[j]!=0)
     y[l]+=(1<<((logN2-1)-j));
   }
   y[l] = y[l] >> 1;
  }
where N = 1024 logN2 = 10
N is the maximum FFT Size supported

Definition at line 68 of file arm_common_tables.c.

Generated on Mon Nov 28 2011 11:15:28 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DCT Type IV Functions

Functions
DCT Type IV Functions
Transform Functions

Functions

void | arm_dct4_f32 (const arm_dct4_instance_f32 *S, float32_t *pState, float32_t *pInlineBuffer)
Processing function for the floating-point DCT4/IDCT4.
arm_status | arm_dct4_init_f32 (arm_dct4_instance_f32 *S, arm_rfft_instance_f32 *S_RFFT, arm_cfft_radix4_instance_f32 *S_CFFT, uint16_t N, uint16_t Nby2, float32_t normalize)
Initialization function for the floating-point DCT4/IDCT4.
arm_status | arm_dct4_init_q15 (arm_dct4_instance_q15 *S, arm_rfft_instance_q15 *S_RFFT, arm_cfft_radix4_instance_q15 *S_CFFT, uint16_t N, uint16_t Nby2, q15_t normalize)
Initialization function for the Q15 DCT4/IDCT4.
arm_status | arm_dct4_init_q31 (arm_dct4_instance_q31 *S, arm_rfft_instance_q31 *S_RFFT, arm_cfft_radix4_instance_q31 *S_CFFT, uint16_t N, uint16_t Nby2, q31_t normalize)
Initialization function for the Q31 DCT4/IDCT4.
void | arm_dct4_q15 (const arm_dct4_instance_q15 *S, q15_t *pState, q15_t *pInlineBuffer)
Processing function for the Q15 DCT4/IDCT4.
void | arm_dct4_q31 (const arm_dct4_instance_q31 *S, q31_t *pState, q31_t *pInlineBuffer)
Processing function for the Q31 DCT4/IDCT4.

Detailed Description

Representation of signals by minimum number of values is important for storage and transmission. The possibility of large discontinuity between the beginning and end of a period of a signal in DFT can be avoided by extending the signal so that it is even-symmetric. Discrete Cosine Transform (DCT) is constructed such that its energy is heavily concentrated in the lower part of the spectrum and is very widely used in signal and image coding applications. The family of DCTs (DCT type- 1,2,3,4) is the outcome of different combinations of homogeneous boundary conditions. DCT has an excellent energy-packing capability, hence has many applications and in data compression in particular.

DCT is essentially the Discrete Fourier Transform(DFT) of an even-extended real signal. Reordering of the input data makes the computation of DCT just a problem of computing the DFT of a real signal with a few additional operations. This approach provides regular, simple, and very efficient DCT algorithms for practical hardware and software implementations.

DCT type-II can be implemented using Fast fourier transform (FFT) internally, as the transform is applied on real values, Real FFT can be used. DCT4 is implemented using DCT2 as their implementations are similar except with some added pre-processing and post-processing. DCT2 implementation can be described in the following steps:

  • Re-ordering input
  • Calculating Real FFT
  • Multiplication of weights and Real FFT output and getting real part from the product.

This process is explained by the block diagram below:

Discrete Cosine Transform - type-IV
Algorithm:
The N-point type-IV DCT is defined as a real, linear transformation by the formula:
where k = 0,1,2,.....N-1
Its inverse is defined as follows:
where n = 0,1,2,.....N-1
The DCT4 matrices become involutory (i.e. they are self-inverse) by multiplying with an overall scale factor of sqrt(2/N). The symmetry of the transform matrix indicates that the fast algorithms for the forward and inverse transform computation are identical. Note that the implementation of Inverse DCT4 and DCT4 is same, hence same process function can be used for both.
Lengths supported by the transform:
As DCT4 internally uses Real FFT, it supports all the lengths supported by arm_rfft_f32(). The library provides separate functions for Q15, Q31, and floating-point data types.
Instance Structure
The instances for Real FFT and FFT, cosine values table and twiddle factor table are stored in an instance data structure. A separate instance structure must be defined for each transform. There are separate instance structure declarations for each of the 3 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Initializes Real FFT as its process function is used internally in DCT4, by calling arm_rfft_init_f32().
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Manually initialize the instance structure as follows:

arm_dct4_instance_f32 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
arm_dct4_instance_q31 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
arm_dct4_instance_q15 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
where N is the length of the DCT4; Nby2 is half of the length of the DCT4; normalize is normalizing factor used and is equal to sqrt(2/N); pTwiddle points to the twiddle factor table; pCosFactor points to the cosFactor table; pRfft points to the real FFT instance; pCfft points to the complex FFT instance; The CFFT and RFFT structures also needs to be initialized, refer to arm_cfft_radix4_f32() and arm_rfft_f32() respectively for details regarding static initialization.
Fixed-Point Behavior
Care must be taken when using the fixed-point versions of the DCT4 transform functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.

Function Documentation

void arm_dct4_f32 | ( | const arm_dct4_instance_f32 * | S,
 |  | float32_t * | pState,
 |  | float32_t * | pInlineBuffer
 | ) |  |

Processing function for the floating-point DCT4/IDCT4.

Parameters:
[in] | *S | points to an instance of the floating-point DCT4/IDCT4 structure.
[in] | *pState | points to state buffer.
[in,out] | *pInlineBuffer | points to the in-place input and output buffer.
Returns:
none.

Definition at line 126 of file arm_dct4_f32.c.

arm_status arm_dct4_init_f32 | ( | arm_dct4_instance_f32 * | S,
 |  | arm_rfft_instance_f32 * | S_RFFT,
 |  | arm_cfft_radix4_instance_f32 * | S_CFFT,
 |  | uint16_t | N,
 |  | uint16_t | Nby2,
 |  | float32_t | normalize
 | ) |  |

Initialization function for the floating-point DCT4/IDCT4.

Parameters:
[in,out] | *S | points to an instance of floating-point DCT4/IDCT4 structure.
[in] | *S_RFFT | points to an instance of floating-point RFFT/RIFFT structure.
[in] | *S_CFFT | points to an instance of floating-point CFFT/CIFFT structure.
[in] | N | length of the DCT4.
[in] | Nby2 | half of the length of the DCT4.
[in] | normalize | normalizing factor.
Returns:
arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported transform length.
Normalizing factor:
The normalizing factor is sqrt(2/N), which depends on the size of transform N. Floating-point normalizing factors are mentioned in the table below for different DCT sizes:

Definition at line 4142 of file arm_dct4_init_f32.c.

arm_status arm_dct4_init_q15 | ( | arm_dct4_instance_q15 * | S,
 |  | arm_rfft_instance_q15 * | S_RFFT,
 |  | arm_cfft_radix4_instance_q15 * | S_CFFT,
 |  | uint16_t | N,
 |  | uint16_t | Nby2,
 |  | q15_t | normalize
 | ) |  |

Initialization function for the Q15 DCT4/IDCT4.

Parameters:
[in,out] | *S | points to an instance of Q15 DCT4/IDCT4 structure.
[in] | *S_RFFT | points to an instance of Q15 RFFT/RIFFT structure.
[in] | *S_CFFT | points to an instance of Q15 CFFT/CIFFT structure.
[in] | N | length of the DCT4.
[in] | Nby2 | half of the length of the DCT4.
[in] | normalize | normalizing factor.
Returns:
arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.
Normalizing factor:
The normalizing factor is sqrt(2/N), which depends on the size of transform N. Normalizing factors in 1.15 format are mentioned in the table below for different DCT sizes:

Definition at line 1125 of file arm_dct4_init_q15.c.

arm_status arm_dct4_init_q31 | ( | arm_dct4_instance_q31 * | S,
 |  | arm_rfft_instance_q31 * | S_RFFT,
 |  | arm_cfft_radix4_instance_q31 * | S_CFFT,
 |  | uint16_t | N,
 |  | uint16_t | Nby2,
 |  | q31_t | normalize
 | ) |  |

Initialization function for the Q31 DCT4/IDCT4.

Parameters:
[in,out] | *S | points to an instance of Q31 DCT4/IDCT4 structure.
[in] | *S_RFFT | points to an instance of Q31 RFFT/RIFFT structure
[in] | *S_CFFT | points to an instance of Q31 CFFT/CIFFT structure
[in] | N | length of the DCT4.
[in] | Nby2 | half of the length of the DCT4.
[in] | normalize | normalizing factor.
Returns:
arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.
Normalizing factor:
The normalizing factor is sqrt(2/N), which depends on the size of transform N. Normalizing factors in 1.31 format are mentioned in the table below for different DCT sizes:

Definition at line 2133 of file arm_dct4_init_q31.c.

void arm_dct4_q15 | ( | const arm_dct4_instance_q15 * | S,
 |  | q15_t * | pState,
 |  | q15_t * | pInlineBuffer
 | ) |  |

Processing function for the Q15 DCT4/IDCT4.

Parameters:
[in] | *S | points to an instance of the Q15 DCT4 structure.
[in] | *pState | points to state buffer.
[in,out] | *pInlineBuffer | points to the in-place input and output buffer.
Returns:
none.
Input an output formats:
Internally inputs are downscaled in the RFFT process function to avoid overflows. Number of bits downscaled, depends on the size of the transform. The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below:

Definition at line 52 of file arm_dct4_q15.c.

void arm_dct4_q31 | ( | const arm_dct4_instance_q31 * | S,
 |  | q31_t * | pState,
 |  | q31_t * | pInlineBuffer
 | ) |  |

Processing function for the Q31 DCT4/IDCT4.

Parameters:
[in] | *S | points to an instance of the Q31 DCT4 structure.
[in] | *pState | points to state buffer.
[in,out] | *pInlineBuffer | points to the in-place input and output buffer.
Returns:
none.
Input an output formats:
Input samples need to be downscaled by 1 bit to avoid saturations in the Q31 DCT process, as the conversion from DCT2 to DCT4 involves one subtraction. Internally inputs are downscaled in the RFFT process function to avoid overflows. Number of bits downscaled, depends on the size of the transform. The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below:

Definition at line 53 of file arm_dct4_q31.c.

Generated on Mon Nov 28 2011 11:15:28 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Real FFT Functions

Functions | Variables
Real FFT Functions
Transform Functions

Functions

void | arm_rfft_f32 (const arm_rfft_instance_f32 *S, float32_t *pSrc, float32_t *pDst)
Processing function for the floating-point RFFT/RIFFT.
arm_status | arm_rfft_init_f32 (arm_rfft_instance_f32 *S, arm_cfft_radix4_instance_f32 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
Initialization function for the floating-point RFFT/RIFFT.
arm_status | arm_rfft_init_q15 (arm_rfft_instance_q15 *S, arm_cfft_radix4_instance_q15 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
Initialization function for the Q15 RFFT/RIFFT.
arm_status | arm_rfft_init_q31 (arm_rfft_instance_q31 *S, arm_cfft_radix4_instance_q31 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
Initialization function for the Q31 RFFT/RIFFT.
void | arm_rfft_q15 (const arm_rfft_instance_q15 *S, q15_t *pSrc, q15_t *pDst)
Processing function for the Q15 RFFT/RIFFT.
void | arm_rfft_q31 (const arm_rfft_instance_q31 *S, q31_t *pSrc, q31_t *pDst)
Processing function for the Q31 RFFT/RIFFT.

Variables

const q31_t | realCoefAQ31 [1024]
const q31_t | realCoefBQ31 [1024]

Detailed Description

Complex FFT/IFFT typically assumes complex input and output. However many applications use real valued data in time domain. Real FFT/IFFT efficiently process real valued sequences with the advantage of requirement of low memory and with less complexity.
This set of functions implements Real Fast Fourier Transforms(RFFT) and Real Inverse Fast Fourier Transform(RIFFT) for Q15, Q31, and floating-point data types.
Algorithm:

Real Fast Fourier Transform:

Real FFT of N-point is calculated using CFFT of N/2-point and Split RFFT process as shown below figure.
Real Fast Fourier Transform
The RFFT functions operate on blocks of input and output data and each call to the function processes fftLenR samples through the transform. pSrc points to input array containing fftLenR values. pDst points to output array containing 2*fftLenR values.
Input for real FFT is in the order of
{real[0], real[1], real[2], real[3], ..}
Output for real FFT is complex and are in the order of
{real(0), imag(0), real(1), imag(1), ...}

Real Inverse Fast Fourier Transform:

Real IFFT of N-point is calculated using Split RIFFT process and CFFT of N/2-point as shown below figure.
Real Inverse Fast Fourier Transform
The RIFFT functions operate on blocks of input and output data and each call to the function processes 2*fftLenR samples through the transform. pSrc points to input array containing 2*fftLenR values. pDst points to output array containing fftLenR values.
Input for real IFFT is complex and are in the order of
{real(0), imag(0), real(1), imag(1), ...}
Output for real IFFT is real and in the order of
{real[0], real[1], real[2], real[3], ..}
Lengths supported by the transform:
Real FFT/IFFT supports the lengths [128, 512, 2048], as it internally uses CFFT/CIFFT.
Instance Structure
A separate instance structure must be defined for each Instance but the twiddle factors can be reused. There are separate instance structure declarations for each of the 3 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Initializes twiddle factor tables.
  • Initializes CFFT data structure fields.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Manually initialize the instance structure as follows:

arm_rfft_instance_f32 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
arm_rfft_instance_q31 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
where fftLenReal length of RFFT/RIFFT; fftLenBy2 length of CFFT/CIFFT. ifftFlagR Flag for selection of RFFT or RIFFT(Set ifftFlagR to calculate RIFFT otherwise calculates RFFT); bitReverseFlagR Flag for selection of output order(Set bitReverseFlagR to output in normal order otherwise output in bit reversed order); twidCoefRModifier modifier for twiddle factor table which supports 128, 512, 2048 RFFT lengths with same table; pTwiddleARealpoints to A array of twiddle coefficients; pTwiddleBRealpoints to B array of twiddle coefficients; pCfft points to the CFFT Instance structure. The CFFT structure also needs to be initialized, refer to arm_cfft_radix4_f32() for details regarding static initialization of cfft structure.
Fixed-Point Behavior
Care must be taken when using the fixed-point versions of the RFFT/RIFFT function. Refer to the function specific documentation below for usage guidelines.

Function Documentation

void arm_rfft_f32 | ( | const arm_rfft_instance_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pDst
 | ) |  |

Processing function for the floating-point RFFT/RIFFT.

Parameters:
[in] | *S | points to an instance of the floating-point RFFT/RIFFT structure.
[in] | *pSrc | points to the input buffer.
[out] | *pDst | points to the output buffer.
Returns:
none.

Definition at line 150 of file arm_rfft_f32.c.

arm_status arm_rfft_init_f32 | ( | arm_rfft_instance_f32 * | S,
 |  | arm_cfft_radix4_instance_f32 * | S_CFFT,
 |  | uint32_t | fftLenReal,
 |  | uint32_t | ifftFlagR,
 |  | uint32_t | bitReverseFlag
 | ) |  |

Initialization function for the floating-point RFFT/RIFFT.

Parameters:
[in,out] | *S | points to an instance of the floating-point RFFT/RIFFT structure.
[in,out] | *S_CFFT | points to an instance of the floating-point CFFT/CIFFT structure.
[in] | fftLenReal | length of the FFT.
[in] | ifftFlagR | flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
[in] | bitReverseFlag | flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
Returns:
The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.
Description:
The parameter fftLenReal Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.
The parameter ifftFlagR controls whether a forward or inverse transform is computed. Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
This function also initializes Twiddle factor table.

Definition at line 1638 of file arm_rfft_init_f32.c.

arm_status arm_rfft_init_q15 | ( | arm_rfft_instance_q15 * | S,
 |  | arm_cfft_radix4_instance_q15 * | S_CFFT,
 |  | uint32_t | fftLenReal,
 |  | uint32_t | ifftFlagR,
 |  | uint32_t | bitReverseFlag
 | ) |  |

Initialization function for the Q15 RFFT/RIFFT.

Parameters:
[in,out] | *S | points to an instance of the Q15 RFFT/RIFFT structure.
[in] | *S_CFFT | points to an instance of the Q15 CFFT/CIFFT structure.
[in] | fftLenReal | length of the FFT.
[in] | ifftFlagR | flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
[in] | bitReverseFlag | flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
Returns:
The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.
Description:
The parameter fftLenReal Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.
The parameter ifftFlagR controls whether a forward or inverse transform is computed. Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
This function also initializes Twiddle factor table.

Definition at line 620 of file arm_rfft_init_q15.c.

arm_status arm_rfft_init_q31 | ( | arm_rfft_instance_q31 * | S,
 |  | arm_cfft_radix4_instance_q31 * | S_CFFT,
 |  | uint32_t | fftLenReal,
 |  | uint32_t | ifftFlagR,
 |  | uint32_t | bitReverseFlag
 | ) |  |

Initialization function for the Q31 RFFT/RIFFT.

Parameters:
[in,out] | *S | points to an instance of the Q31 RFFT/RIFFT structure.
[in,out] | *S_CFFT | points to an instance of the Q31 CFFT/CIFFT structure.
[in] | fftLenReal | length of the FFT.
[in] | ifftFlagR | flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
[in] | bitReverseFlag | flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
Returns:
The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.
Description:
The parameter fftLenReal Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.
The parameter ifftFlagR controls whether a forward or inverse transform is computed. Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
This function also initializes Twiddle factor table.

Definition at line 617 of file arm_rfft_init_q31.c.

void arm_rfft_q15 | ( | const arm_rfft_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst
 | ) |  |

Processing function for the Q15 RFFT/RIFFT.

Parameters:
[in] | *S | points to an instance of the Q15 RFFT/RIFFT structure.
[in] | *pSrc | points to the input buffer.
[out] | *pDst | points to the output buffer.
Returns:
none.
Input an output formats:
Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. Hence the output format is different for different RFFT sizes. The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:
Input and Output Formats for Q15 RFFT
Input and Output Formats for Q15 RIFFT

Definition at line 80 of file arm_rfft_q15.c.

void arm_rfft_q31 | ( | const arm_rfft_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst
 | ) |  |

Processing function for the Q31 RFFT/RIFFT.

Parameters:
[in] | *S | points to an instance of the Q31 RFFT/RIFFT structure.
[in] | *pSrc | points to the input buffer.
[out] | *pDst | points to the output buffer.
Returns:
none.
Input an output formats:
Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. Hence the output format is different for different RFFT sizes. The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:
Input and Output Formats for Q31 RFFT
Input and Output Formats for Q31 RIFFT

Definition at line 80 of file arm_rfft_q31.c.

Variable Documentation

const q31_t realCoefAQ31[1024]
Generation floating point realCoefAQ31 array:
n = 1024
for (i = 0; i < n; i++)
 {
    pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
 }
Convert to fixed point Q31 format round(pATable[i] * pow(2, 31))

Definition at line 60 of file arm_rfft_init_q31.c.

const q31_t realCoefBQ31[1024]
Generation of realCoefBQ31 array:
n = 512
for (i = 0; i < n; i++)
 {
    pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
 }
Convert to fixed point Q31 format round(pBTable[i] * pow(2, 31))

Definition at line 336 of file arm_rfft_init_q31.c.

Generated on Mon Nov 28 2011 11:15:28 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Controller Functions

Modules
Controller Functions
Functions

Modules

PID Motor Control
Vector Clarke Transform
Vector Inverse Clarke Transform
Vector Park Transform
Vector Inverse Park transform
Sine Cosine
Generated on Mon Nov 28 2011 11:15:25 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PID Motor Control

Functions
PID Motor Control
Controller Functions

Functions

void | arm_pid_init_f32 (arm_pid_instance_f32 *S, int32_t resetStateFlag)
Initialization function for the floating-point PID Control.
void | arm_pid_init_q15 (arm_pid_instance_q15 *S, int32_t resetStateFlag)
Initialization function for the Q15 PID Control.
void | arm_pid_init_q31 (arm_pid_instance_q31 *S, int32_t resetStateFlag)
Initialization function for the Q31 PID Control.
void | arm_pid_reset_f32 (arm_pid_instance_f32 *S)
Reset function for the floating-point PID Control.
void | arm_pid_reset_q15 (arm_pid_instance_q15 *S)
Reset function for the Q15 PID Control.
void | arm_pid_reset_q31 (arm_pid_instance_q31 *S)
Reset function for the Q31 PID Control.

Detailed Description

A Proportional Integral Derivative (PID) controller is a generic feedback control loop mechanism widely used in industrial control systems. A PID controller is the most commonly used type of feedback controller.

This set of functions implements (PID) controllers for Q15, Q31, and floating-point data types. The functions operate on a single sample of data and each call to the function returns a single processed value. S points to an instance of the PID control data structure. in is the input sample value. The functions return the output value.

Algorithm:
    y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
    A0 = Kp + Ki + Kd
    A1 = (-Kp ) - (2 * Kd )
    A2 = Kd
where Kp is proportional constant, Ki is Integral constant and Kd is Derivative constant
Proportional Integral Derivative Controller
The PID controller calculates an "error" value as the difference between the measured output and the reference input. The controller attempts to minimize the error by adjusting the process control inputs. The proportional value determines the reaction to the current error, the integral value determines the reaction based on the sum of recent errors, and the derivative value determines the reaction based on the rate at which the error has been changing.
Instance Structure
The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure. A separate instance structure must be defined for each PID Controller. There are separate instance structure declarations for each of the 3 supported data types.
Reset Functions
There is also an associated reset function for each data type which clears the state array.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains.
  • Zeros out the values in the state buffer.
Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
Fixed-Point Behavior
Care must be taken when using the fixed-point versions of the PID Controller functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.

Function Documentation

void arm_pid_init_f32 | ( | arm_pid_instance_f32 * | S,
 |  | int32_t | resetStateFlag
 | ) |  |

Initialization function for the floating-point PID Control.

Parameters:
[in,out] | *S | points to an instance of the PID structure.
[in] | resetStateFlag | flag to reset the state. 0 = no change in state & 1 = reset the state.
Returns:
none.
Description:
The resetStateFlag specifies whether to set state to zero or not.
The function computes the structure fields: A0, A1 A2 using the proportional gain( Kp), integral gain( Ki) and derivative gain( Kd) also sets the state variables to all zeros.

Definition at line 51 of file arm_pid_init_f32.c.

void arm_pid_init_q15 | ( | arm_pid_instance_q15 * | S,
 |  | int32_t | resetStateFlag
 | ) |  |

Initialization function for the Q15 PID Control.

Parameters:
[in,out] | *S | points to an instance of the Q15 PID structure.
[in] | resetStateFlag | flag to reset the state. 0 = no change in state 1 = reset the state.
Returns:
none.
Description:
The resetStateFlag specifies whether to set state to zero or not.
The function computes the structure fields: A0, A1 A2 using the proportional gain( Kp), integral gain( Ki) and derivative gain( Kd) also sets the state variables to all zeros.

Definition at line 50 of file arm_pid_init_q15.c.

void arm_pid_init_q31 | ( | arm_pid_instance_q31 * | S,
 |  | int32_t | resetStateFlag
 | ) |  |

Initialization function for the Q31 PID Control.

Parameters:
[in,out] | *S | points to an instance of the Q31 PID structure.
[in] | resetStateFlag | flag to reset the state. 0 = no change in state 1 = reset the state.
Returns:
none.
Description:
The resetStateFlag specifies whether to set state to zero or not.
The function computes the structure fields: A0, A1 A2 using the proportional gain( Kp), integral gain( Ki) and derivative gain( Kd) also sets the state variables to all zeros.

Definition at line 50 of file arm_pid_init_q31.c.

void arm_pid_reset_f32 ( arm_pid_instance_f32 * S )

Reset function for the floating-point PID Control.

Parameters:
[in] *S Instance pointer of PID control data structure.
Returns:
none.
Description:
The function resets the state buffer to zeros.

Definition at line 44 of file arm_pid_reset_f32.c.

void arm_pid_reset_q15 ( arm_pid_instance_q15 * S )

Reset function for the Q15 PID Control.

Parameters:
[in] *S Instance pointer of PID control data structure.
Returns:
none.
Description:
The function resets the state buffer to zeros.

Definition at line 44 of file arm_pid_reset_q15.c.

void arm_pid_reset_q31 ( arm_pid_instance_q31 * S )

Reset function for the Q31 PID Control.

Parameters:
[in] *S Instance pointer of PID control data structure.
Returns:
none.
Description:
The function resets the state buffer to zeros.

Definition at line 44 of file arm_pid_reset_q31.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Vector Clarke Transform

Vector Clarke Transform
Controller Functions

Detailed Description

Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector. Generally the Clarke transform uses three-phase currents Ia, Ib and Ic to calculate currents in the two-phase orthogonal stator axis Ialpha and Ibeta. When Ialpha is superposed with Ia as shown in the figure below

Stator current space vector and its components in (a,b).

and Ia + Ib + Ic = 0, in this condition Ialpha and Ibeta can be calculated using only Ia and Ib.

The function operates on a single sample of data and each call to the function returns the processed output. The library provides separate functions for Q31 and floating-point data types.

Algorithm
where Ia and Ib are the instantaneous stator phases and pIalpha and pIbeta are the two coordinates of time invariant vector.
Fixed-Point Behavior
Care must be taken when using the Q31 version of the Clarke transform. In particular, the overflow and saturation behavior of the accumulator used must be considered. Refer to the function specific documentation below for usage guidelines.
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Vector Inverse Clarke Transform

Vector Inverse Clarke Transform
Controller Functions

Detailed Description

Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.

The function operates on a single sample of data and each call to the function returns the processed output. The library provides separate functions for Q31 and floating-point data types.

Algorithm
where pIa and pIb are the instantaneous stator phases and Ialpha and Ibeta are the two coordinates of time invariant vector.
Fixed-Point Behavior
Care must be taken when using the Q31 version of the Clarke transform. In particular, the overflow and saturation behavior of the accumulator used must be considered. Refer to the function specific documentation below for usage guidelines.
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Vector Park Transform

Vector Park Transform
Controller Functions

Detailed Description

Forward Park transform converts the input two-coordinate vector to flux and torque components. The Park transform can be used to realize the transformation of the Ialpha and the Ibeta currents from the stationary to the moving reference frame and control the spatial relationship between the stator vector current and rotor flux vector. If we consider the d axis aligned with the rotor flux, the diagram below shows the current vector and the relationship from the two reference frames:

Stator current space vector and its component in (a,b) and in the d,q rotating reference frame

The function operates on a single sample of data and each call to the function returns the processed output. The library provides separate functions for Q31 and floating-point data types.

Algorithm
where Ialpha and Ibeta are the stator vector components, pId and pIq are rotor vector components and cosVal and sinVal are the cosine and sine values of theta (rotor flux position).
Fixed-Point Behavior
Care must be taken when using the Q31 version of the Park transform. In particular, the overflow and saturation behavior of the accumulator used must be considered. Refer to the function specific documentation below for usage guidelines.
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Vector Inverse Park transform

Vector Inverse Park transform
Controller Functions

Detailed Description

Inverse Park transform converts the input flux and torque components to two-coordinate vector.

The function operates on a single sample of data and each call to the function returns the processed output. The library provides separate functions for Q31 and floating-point data types.

Algorithm
where pIalpha and pIbeta are the stator vector components, Id and Iq are rotor vector components and cosVal and sinVal are the cosine and sine values of theta (rotor flux position).
Fixed-Point Behavior
Care must be taken when using the Q31 version of the Park transform. In particular, the overflow and saturation behavior of the accumulator used must be considered. Refer to the function specific documentation below for usage guidelines.
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Sine Cosine

Functions
Sine Cosine
Controller Functions

Functions

void | arm_sin_cos_f32 (float32_t theta, float32_t *pSinVal, float32_t *pCosVal)
Floating-point sin_cos function.
void | arm_sin_cos_q31 (q31_t theta, q31_t *pSinVal, q31_t *pCosVal)
Q31 sin_cos function.

Detailed Description

Computes the trigonometric sine and cosine values using a combination of table lookup and linear interpolation. There are separate functions for Q31 and floating-point data types. The input to the floating-point version is in degrees while the fixed-point Q31 have a scaled input with the range [-1 1) mapping to [-180 180) degrees.

The implementation is based on table lookup using 360 values together with linear interpolation. The steps used are:

  1. Calculation of the nearest integer table index.
  2. Compute the fractional portion (fract) of the input.
  3. Fetch the value corresponding to index from sine table to y0 and also value from index+1 to y1.
  4. Sine value is computed as *psinVal = y0 + (fract * (y1 - y0)).
  5. Fetch the value corresponding to index from cosine table to y0 and also value from index+1 to y1.
  6. Cosine value is computed as *pcosVal = y0 + (fract * (y1 - y0)).

Function Documentation

void arm_sin_cos_f32 | ( | float32_t | theta,
 |  | float32_t * | pSinVal,
 |  | float32_t * | pCosVal
 | ) |  |

Floating-point sin_cos function.

Parameters:
[in] | theta | input value in degrees
[out] | *pSinVal | points to the processed sine output.
[out] | *pCosVal | points to the processed cos output.
Returns:
none.

Definition at line 367 of file arm_sin_cos_f32.c.

void arm_sin_cos_q31 | ( | q31_t | theta,
 |  | q31_t * | pSinVal,
 |  | q31_t * | pCosVal
 | ) |  |

Q31 sin_cos function.

Parameters:
[in] | theta | scaled input value in degrees
[out] | *pSinVal | points to the processed sine output.
[out] | *pCosVal | points to the processed cosine output.
Returns:
none.

The Q31 input value is in the range [-1 +1) and is mapped to a degree value in the range [-180 180).

Definition at line 264 of file arm_sin_cos_q31.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Statistics Functions

Modules
Statistics Functions
Functions

Modules

Maximum
Mean
Minimum
Power
Root mean square (RMS)
Standard deviation
Variance
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Maximum

Functions
Maximum
Statistics Functions

Functions

void | arm_max_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult, uint32_t *pIndex)
Maximum value of a floating-point vector.
void | arm_max_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult, uint32_t *pIndex)
Maximum value of a Q15 vector.
void | arm_max_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult, uint32_t *pIndex)
Maximum value of a Q31 vector.
void | arm_max_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult, uint32_t *pIndex)
Maximum value of a Q7 vector.

Detailed Description

Computes the maximum value of an array of data. The function returns both the maximum value and its position within the array. There are separate functions for floating-point, Q31, Q15, and Q7 data types.

Function Documentation

void arm_max_f32 | ( | float32_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | float32_t * | pResult,
 |  | uint32_t * | pIndex
 | ) |  |

Maximum value of a floating-point vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | maximum value returned here
[out] | *pIndex | index of maximum value returned here
Returns:
none.

Definition at line 59 of file arm_max_f32.c.

void arm_max_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q15_t * | pResult,
 |  | uint32_t * | pIndex
 | ) |  |

Maximum value of a Q15 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | maximum value returned here
[out] | *pIndex | index of maximum value returned here
Returns:
none.

Definition at line 51 of file arm_max_q15.c.

void arm_max_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q31_t * | pResult,
 |  | uint32_t * | pIndex
 | ) |  |

Maximum value of a Q31 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | maximum value returned here
[out] | *pIndex | index of maximum value returned here
Returns:
none.

Definition at line 51 of file arm_max_q31.c.

void arm_max_q7 | ( | q7_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q7_t * | pResult,
 |  | uint32_t * | pIndex
 | ) |  |

Maximum value of a Q7 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | maximum value returned here
[out] | *pIndex | index of maximum value returned here
Returns:
none.

Definition at line 51 of file arm_max_q7.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Mean

Functions
Mean
Statistics Functions

Functions

void | arm_mean_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
Mean value of a floating-point vector.
void | arm_mean_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
Mean value of a Q15 vector.
void | arm_mean_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
Mean value of a Q31 vector.
void | arm_mean_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult)
Mean value of a Q7 vector.

Detailed Description

Calculates the mean of the input vector. Mean is defined as the average of the elements in the vector. The underlying algorithm is used:

     Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;

There are separate functions for floating-point, Q31, Q15, and Q7 data types.

Function Documentation

void arm_mean_f32 | ( | float32_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | float32_t * | pResult
 | ) |  |

Mean value of a floating-point vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | mean value returned here
Returns:
none.

Definition at line 64 of file arm_mean_f32.c.

void arm_mean_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q15_t * | pResult
 | ) |  |

Mean value of a Q15 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | mean value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 32-bit internal accumulator. The input is represented in 1.15 format and is accumulated in a 32-bit accumulator in 17.15 format. There is no risk of internal overflow with this approach, and the full precision of intermediate result is preserved. Finally, the accumulator is saturated and truncated to yield a result of 1.15 format.

Definition at line 61 of file arm_mean_q15.c.

void arm_mean_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q31_t * | pResult
 | ) |  |

Mean value of a Q31 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | mean value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. The input is represented in 1.31 format and is accumulated in a 64-bit accumulator in 33.31 format. There is no risk of internal overflow with this approach, and the full precision of intermediate result is preserved. Finally, the accumulator is truncated to yield a result of 1.31 format.

Definition at line 61 of file arm_mean_q31.c.

void arm_mean_q7 | ( | q7_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q7_t * | pResult
 | ) |  |

Mean value of a Q7 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | mean value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 32-bit internal accumulator. The input is represented in 1.7 format and is accumulated in a 32-bit accumulator in 25.7 format. There is no risk of internal overflow with this approach, and the full precision of intermediate result is preserved. Finally, the accumulator is truncated to yield a result of 1.7 format.

Definition at line 61 of file arm_mean_q7.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Minimum

Functions
Minimum
Statistics Functions

Functions

void | arm_min_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult, uint32_t *pIndex)
Minimum value of a floating-point vector.
void | arm_min_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult, uint32_t *pIndex)
Minimum value of a Q15 vector.
void | arm_min_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult, uint32_t *pIndex)
Minimum value of a Q31 vector.
void | arm_min_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult, uint32_t *pIndex)
Minimum value of a Q7 vector.

Detailed Description

Computes the minimum value of an array of data. The function returns both the minimum value and its position within the array. There are separate functions for floating-point, Q31, Q15, and Q7 data types.

Function Documentation

void arm_min_f32 | ( | float32_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | float32_t * | pResult,
 |  | uint32_t * | pIndex
 | ) |  |

Minimum value of a floating-point vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | minimum value returned here
[out] | *pIndex | index of minimum value returned here
Returns:
none.

Definition at line 60 of file arm_min_f32.c.

void arm_min_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q15_t * | pResult,
 |  | uint32_t * | pIndex
 | ) |  |

Minimum value of a Q15 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | minimum value returned here
[out] | *pIndex | index of minimum value returned here
Returns:
none.

Definition at line 53 of file arm_min_q15.c.

void arm_min_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q31_t * | pResult,
 |  | uint32_t * | pIndex
 | ) |  |

Minimum value of a Q31 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | minimum value returned here
[out] | *pIndex | index of minimum value returned here
Returns:
none.

Definition at line 53 of file arm_min_q31.c.

void arm_min_q7 | ( | q7_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q7_t * | pResult,
 |  | uint32_t * | pIndex
 | ) |  |

Minimum value of a Q7 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | minimum value returned here
[out] | *pIndex | index of minimum value returned here
Returns:
none.

Definition at line 52 of file arm_min_q7.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Power

Functions
Power
Statistics Functions

Functions

void | arm_power_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
Sum of the squares of the elements of a floating-point vector.
void | arm_power_q15 (q15_t *pSrc, uint32_t blockSize, q63_t *pResult)
Sum of the squares of the elements of a Q15 vector.
void | arm_power_q31 (q31_t *pSrc, uint32_t blockSize, q63_t *pResult)
Sum of the squares of the elements of a Q31 vector.
void | arm_power_q7 (q7_t *pSrc, uint32_t blockSize, q31_t *pResult)
Sum of the squares of the elements of a Q7 vector.

Detailed Description

Calculates the sum of the squares of the elements in the input vector. The underlying algorithm is used:

     Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];

There are separate functions for floating point, Q31, Q15, and Q7 data types.

Function Documentation

void arm_power_f32 | ( | float32_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | float32_t * | pResult
 | ) |  |

Sum of the squares of the elements of a floating-point vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | sum of the squares value returned here
Returns:
none.

Definition at line 68 of file arm_power_f32.c.

void arm_power_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q63_t * | pResult
 | ) |  |

Sum of the squares of the elements of a Q15 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | sum of the squares value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 34.30 format.

Definition at line 62 of file arm_power_q15.c.

void arm_power_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q63_t * | pResult
 | ) |  |

Sum of the squares of the elements of a Q31 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | sum of the squares value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. The input is represented in 1.31 format. Intermediate multiplication yields a 2.62 format, and this result is truncated to 2.48 format by discarding the lower 14 bits. The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. With 15 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 16.48 format.

Definition at line 63 of file arm_power_q31.c.

void arm_power_q7 | ( | q7_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q31_t * | pResult
 | ) |  |

Sum of the squares of the elements of a Q7 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | sum of the squares value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 32-bit internal accumulator. The input is represented in 1.7 format. Intermediate multiplication yields a 2.14 format, and this result is added without saturation to an accumulator in 18.14 format. With 17 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 18.14 format.

Definition at line 62 of file arm_power_q7.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Root mean square (RMS)

Functions
Root mean square (RMS)
Statistics Functions

Functions

void | arm_rms_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
Root Mean Square of the elements of a floating-point vector.
void | arm_rms_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
Root Mean Square of the elements of a Q15 vector.
void | arm_rms_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
Root Mean Square of the elements of a Q31 vector.

Detailed Description

Calculates the Root Mean Sqaure of the elements in the input vector. The underlying algorithm is used:

     Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));

There are separate functions for floating point, Q31, and Q15 data types.

Function Documentation

void arm_rms_f32 | ( | float32_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | float32_t * | pResult
 | ) |  |

Root Mean Square of the elements of a floating-point vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | rms value returned here
Returns:
none.

Definition at line 65 of file arm_rms_f32.c.

void arm_rms_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q15_t * | pResult
 | ) |  |

Root Mean Square of the elements of a Q15 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | rms value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 15 bits, and then saturated to yield a result in 1.15 format.

Definition at line 59 of file arm_rms_q15.c.

void arm_rms_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q31_t * | pResult
 | ) |  |

Root Mean Square of the elements of a Q31 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | rms value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The input is represented in 1.31 format, and intermediate multiplication yields a 2.62 format. The accumulator maintains full precision of the intermediate multiplication results, but provides only a single guard bit. There is no saturation on intermediate additions. If the accumulator overflows, it wraps around and distorts the result. In order to avoid overflows completely, the input signal must be scaled down by log2(blockSize) bits, as a total of blockSize additions are performed internally. Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.

Definition at line 62 of file arm_rms_q31.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Standard deviation

Functions
Standard deviation
Statistics Functions

Functions

void | arm_std_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
Standard deviation of the elements of a floating-point vector.
void | arm_std_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
Standard deviation of the elements of a Q15 vector.
void | arm_std_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
Standard deviation of the elements of a Q31 vector.

Detailed Description

Calculates the standard deviation of the elements in the input vector. The underlying algorithm is used:

     Result = sqrt((sumOfSquares - sum2 / blockSize) / (blockSize - 1))
       where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]
                       sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]

There are separate functions for floating point, Q31, and Q15 data types.

Function Documentation

void arm_std_f32 | ( | float32_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | float32_t * | pResult
 | ) |  |

Standard deviation of the elements of a floating-point vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | standard deviation value returned here
Returns:
none.

Definition at line 69 of file arm_std_f32.c.

void arm_std_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q15_t * | pResult
 | ) |  |

Standard deviation of the elements of a Q15 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | standard deviation value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 15 bits, and then saturated to yield a result in 1.15 format.

Definition at line 62 of file arm_std_q15.c.

void arm_std_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q31_t * | pResult
 | ) |  |

Standard deviation of the elements of a Q31 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | standard deviation value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The input is represented in 1.31 format, and intermediate multiplication yields a 2.62 format. The accumulator maintains full precision of the intermediate multiplication results, but provides only a single guard bit. There is no saturation on intermediate additions. If the accumulator overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(blockSize) bits, as a total of blockSize additions are performed internally. Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.

Definition at line 66 of file arm_std_q31.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Variance

Functions
Variance
Statistics Functions

Functions

void | arm_var_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
Variance of the elements of a floating-point vector.
void | arm_var_q15 (q15_t *pSrc, uint32_t blockSize, q31_t *pResult)
Variance of the elements of a Q15 vector.
void | arm_var_q31 (q31_t *pSrc, uint32_t blockSize, q63_t *pResult)
Variance of the elements of a Q31 vector.

Detailed Description

Calculates the variance of the elements in the input vector. The underlying algorithm is used:

     Result = (sumOfSquares - sum2 / blockSize) / (blockSize - 1)
       where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]
                       sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]

There are separate functions for floating point, Q31, and Q15 data types.

Function Documentation

void arm_var_f32 | ( | float32_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | float32_t * | pResult
 | ) |  |

Variance of the elements of a floating-point vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | variance value returned here
Returns:
none.

Definition at line 69 of file arm_var_f32.c.

void arm_var_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q31_t * | pResult
 | ) |  |

Variance of the elements of a Q15 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | variance value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 15 bits, and then saturated to yield a result in 1.15 format.

Definition at line 64 of file arm_var_q15.c.

void arm_var_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q63_t * | pResult
 | ) |  |

Variance of the elements of a Q31 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | variance value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The input is represented in 1.31 format, and intermediate multiplication yields a 2.62 format. The accumulator maintains full precision of the intermediate multiplication results, but provides only a single guard bit. There is no saturation on intermediate additions. If the accumulator overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(blockSize) bits, as a total of blockSize additions are performed internally. Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.

Definition at line 66 of file arm_var_q31.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Support Functions

Modules
Support Functions
Functions

Modules

Vector Copy
Vector Fill
Convert 32-bit floating point value
Convert 16-bit Integer value
Convert 32-bit Integer value
Convert 8-bit Integer value
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Vector Copy

Functions
Vector Copy
Support Functions

Functions

void | arm_copy_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Copies the elements of a floating-point vector.
void | arm_copy_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Copies the elements of a Q15 vector.
void | arm_copy_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Copies the elements of a Q31 vector.
void | arm_copy_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
Copies the elements of a Q7 vector.

Detailed Description

Copies sample by sample from source vector to destination vector.

     pDst[n] = pSrc[n];   0 <= n < blockSize.

There are separate functions for floating point, Q31, Q15, and Q7 data types.

Function Documentation

void arm_copy_f32 | ( | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Copies the elements of a floating-point vector.

Parameters:
[in] | *pSrc | points to input vector
[out] | *pDst | points to output vector
[in] | blockSize | length of the input vector
Returns:
none.

Definition at line 66 of file arm_copy_f32.c.

void arm_copy_q15 | ( | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Copies the elements of a Q15 vector.

Parameters:
[in] | *pSrc | points to input vector
[out] | *pDst | points to output vector
[in] | blockSize | length of the input vector
Returns:
none.

Definition at line 52 of file arm_copy_q15.c.

void arm_copy_q31 | ( | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Copies the elements of a Q31 vector.

Parameters:
[in] | *pSrc | points to input vector
[out] | *pDst | points to output vector
[in] | blockSize | length of the input vector
Returns:
none.

Definition at line 53 of file arm_copy_q31.c.

void arm_copy_q7 | ( | q7_t * | pSrc,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Copies the elements of a Q7 vector.

Parameters:
[in] | *pSrc | points to input vector
[out] | *pDst | points to output vector
[in] | blockSize | length of the input vector
Returns:
none.

Definition at line 53 of file arm_copy_q7.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Vector Fill

Functions
Vector Fill
Support Functions

Functions

void | arm_fill_f32 (float32_t value, float32_t *pDst, uint32_t blockSize)
Fills a constant value into a floating-point vector.
void | arm_fill_q15 (q15_t value, q15_t *pDst, uint32_t blockSize)
Fills a constant value into a Q15 vector.
void | arm_fill_q31 (q31_t value, q31_t *pDst, uint32_t blockSize)
Fills a constant value into a Q31 vector.
void | arm_fill_q7 (q7_t value, q7_t *pDst, uint32_t blockSize)
Fills a constant value into a Q7 vector.

Detailed Description

Fills the destination vector with a constant value.

     pDst[n] = value;   0 <= n < blockSize.

There are separate functions for floating point, Q31, Q15, and Q7 data types.

Function Documentation

void arm_fill_f32 | ( | float32_t | value,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Fills a constant value into a floating-point vector.

Parameters:
[in] | value | input value to be filled
[out] | *pDst | points to output vector
[in] | blockSize | length of the output vector
Returns:
none.

Definition at line 66 of file arm_fill_f32.c.

void arm_fill_q15 | ( | q15_t | value,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Fills a constant value into a Q15 vector.

Parameters:
[in] | value | input value to be filled
[out] | *pDst | points to output vector
[in] | blockSize | length of the output vector
Returns:
none.

Definition at line 53 of file arm_fill_q15.c.

void arm_fill_q31 | ( | q31_t | value,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Fills a constant value into a Q31 vector.

Parameters:
[in] | value | input value to be filled
[out] | *pDst | points to output vector
[in] | blockSize | length of the output vector
Returns:
none.

Definition at line 53 of file arm_fill_q31.c.

void arm_fill_q7 | ( | q7_t | value,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Fills a constant value into a Q7 vector.

Parameters:
[in] | value | input value to be filled
[out] | *pDst | points to output vector
[in] | blockSize | length of the output vector
Returns:
none.

Definition at line 53 of file arm_fill_q7.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Convert 32-bit floating point value

Functions
Convert 32-bit floating point value
Support Functions

Functions

void | arm_float_to_q15 (float32_t *pSrc, q15_t *pDst, uint32_t blockSize)
Converts the elements of the floating-point vector to Q15 vector.
void | arm_float_to_q31 (float32_t *pSrc, q31_t *pDst, uint32_t blockSize)
Converts the elements of the floating-point vector to Q31 vector.
void | arm_float_to_q7 (float32_t *pSrc, q7_t *pDst, uint32_t blockSize)
Converts the elements of the floating-point vector to Q7 vector.

Function Documentation

void arm_float_to_q15 | ( | float32_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the floating-point vector to Q15 vector.

Parameters:
[in] | *pSrc | points to the floating-point input vector
[out] | *pDst | points to the Q15 output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:
The equation used for the conversion process is:

     pDst[n] = (q15_t)(pSrc[n] * 32768);   0 <= n < blockSize.
Scaling and Overflow Behavior:
The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
Note:
In order to apply rounding, the library should be rebuilt with the ROUNDING macro defined in the preprocessor section of project options.

Definition at line 65 of file arm_float_to_q15.c.

void arm_float_to_q31 | ( | float32_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the floating-point vector to Q31 vector.

Parameters:
[in] | *pSrc | points to the floating-point input vector
[out] | *pDst | points to the Q31 output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:
The equation used for the conversion process is:

     pDst[n] = (q31_t)(pSrc[n] * 2147483648);   0 <= n < blockSize.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
Note:
In order to apply rounding, the library should be rebuilt with the ROUNDING macro defined in the preprocessor section of project options.

Definition at line 69 of file arm_float_to_q31.c.

void arm_float_to_q7 | ( | float32_t * | pSrc,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the floating-point vector to Q7 vector.

Parameters:
[in] | *pSrc | points to the floating-point input vector
[out] | *pDst | points to the Q7 output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:
The equation used for the conversion process is:

     pDst[n] = (q7_t)(pSrc[n] * 128);   0 <= n < blockSize.
Scaling and Overflow Behavior:
The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
Note:
In order to apply rounding, the library should be rebuilt with the ROUNDING macro defined in the preprocessor section of project options.

Definition at line 64 of file arm_float_to_q7.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Convert 16-bit Integer value

Functions
Convert 16-bit Integer value
Support Functions

Functions

void | arm_q15_to_float (q15_t *pSrc, float32_t *pDst, uint32_t blockSize)
Converts the elements of the Q15 vector to floating-point vector.
void | arm_q15_to_q31 (q15_t *pSrc, q31_t *pDst, uint32_t blockSize)
Converts the elements of the Q15 vector to Q31 vector.
void | arm_q15_to_q7 (q15_t *pSrc, q7_t *pDst, uint32_t blockSize)
Converts the elements of the Q15 vector to Q7 vector.

Function Documentation

void arm_q15_to_float | ( | q15_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the Q15 vector to floating-point vector.

Parameters:
[in] | *pSrc | points to the Q15 input vector
[out] | *pDst | points to the floating-point output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:

The equation used for the conversion process is:

     pDst[n] = (float32_t) pSrc[n] / 32768;   0 <= n < blockSize.

Definition at line 66 of file arm_q15_to_float.c.

void arm_q15_to_q31 | ( | q15_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the Q15 vector to Q31 vector.

Parameters:
[in] | *pSrc | points to the Q15 input vector
[out] | *pDst | points to the Q31 output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:

The equation used for the conversion process is:

     pDst[n] = (q31_t) pSrc[n] << 16;   0 <= n < blockSize.

Definition at line 59 of file arm_q15_to_q31.c.

void arm_q15_to_q7 | ( | q15_t * | pSrc,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the Q15 vector to Q7 vector.

Parameters:
[in] | *pSrc | points to the Q15 input vector
[out] | *pDst | points to the Q7 output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:

The equation used for the conversion process is:

     pDst[n] = (q7_t) pSrc[n] >> 8;   0 <= n < blockSize.

Definition at line 60 of file arm_q15_to_q7.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Convert 32-bit Integer value

Functions
Convert 32-bit Integer value
Support Functions

Functions

void | arm_q31_to_float (q31_t *pSrc, float32_t *pDst, uint32_t blockSize)
Converts the elements of the Q31 vector to floating-point vector.
void | arm_q31_to_q15 (q31_t *pSrc, q15_t *pDst, uint32_t blockSize)
Converts the elements of the Q31 vector to Q15 vector.
void | arm_q31_to_q7 (q31_t *pSrc, q7_t *pDst, uint32_t blockSize)
Converts the elements of the Q31 vector to Q7 vector.

Function Documentation

void arm_q31_to_float | ( | q31_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the Q31 vector to floating-point vector.

Parameters:
[in] | *pSrc | points to the Q31 input vector
[out] | *pDst | points to the floating-point output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:

The equation used for the conversion process is:

     pDst[n] = (float32_t) pSrc[n] / 2147483648;   0 <= n < blockSize.

Definition at line 63 of file arm_q31_to_float.c.

void arm_q31_to_q15 | ( | q31_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the Q31 vector to Q15 vector.

Parameters:
[in] | *pSrc | points to the Q31 input vector
[out] | *pDst | points to the Q15 output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:

The equation used for the conversion process is:

     pDst[n] = (q15_t) pSrc[n] >> 16;   0 <= n < blockSize.

Definition at line 59 of file arm_q31_to_q15.c.

void arm_q31_to_q7 | ( | q31_t * | pSrc,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the Q31 vector to Q7 vector.

Parameters:
[in] | *pSrc | points to the Q31 input vector
[out] | *pDst | points to the Q7 output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:

The equation used for the conversion process is:

     pDst[n] = (q7_t) pSrc[n] >> 24;   0 <= n < blockSize.

Definition at line 59 of file arm_q31_to_q7.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Convert 8-bit Integer value

Functions
Convert 8-bit Integer value
Support Functions

Functions

void | arm_q7_to_float (q7_t *pSrc, float32_t *pDst, uint32_t blockSize)
Converts the elements of the Q7 vector to floating-point vector.
void | arm_q7_to_q15 (q7_t *pSrc, q15_t *pDst, uint32_t blockSize)
Converts the elements of the Q7 vector to Q15 vector.
void | arm_q7_to_q31 (q7_t *pSrc, q31_t *pDst, uint32_t blockSize)
Converts the elements of the Q7 vector to Q31 vector.

Function Documentation

void arm_q7_to_float | ( | q7_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the Q7 vector to floating-point vector.

Parameters:
[in] | *pSrc | points to the Q7 input vector
[out] | *pDst | points to the floating-point output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:

The equation used for the conversion process is:

     pDst[n] = (float32_t) pSrc[n] / 128;   0 <= n < blockSize.

Definition at line 63 of file arm_q7_to_float.c.

void arm_q7_to_q15 | ( | q7_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the Q7 vector to Q15 vector.

Parameters:
[in] | *pSrc | points to the Q7 input vector
[out] | *pDst | points to the Q15 output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:

The equation used for the conversion process is:

     pDst[n] = (q15_t) pSrc[n] << 8;   0 <= n < blockSize.

Definition at line 62 of file arm_q7_to_q15.c.

void arm_q7_to_q31 | ( | q7_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the Q7 vector to Q31 vector.

Parameters:
[in] | *pSrc | points to the Q7 input vector
[out] | *pDst | points to the Q31 output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:

The equation used for the conversion process is:

     pDst[n] = (q31_t) pSrc[n] << 24;   0 <= n < blockSize.

Definition at line 59 of file arm_q7_to_q31.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Interpolation Functions

Modules
Interpolation Functions
Functions

Modules

Linear Interpolation
Bilinear Interpolation

Detailed Description

These functions perform 1- and 2-dimensional interpolation of data. Linear interpolation is used for 1-dimensional data and bilinear interpolation is used for 2-dimensional data.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Linear Interpolation

Linear Interpolation
Interpolation Functions

Detailed Description

Linear interpolation is a method of curve fitting using linear polynomials. Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line

Linear interpolation
A Linear Interpolate function calculates an output value(y), for the input(x) using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values)
Algorithm:
       y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
       where x0, x1 are nearest values of input x
             y0, y1 are nearest values to output y
This set of functions implements Linear interpolation process for Q7, Q15, Q31, and floating-point data types. The functions operate on a single sample of data and each call to the function returns a single processed value. S points to an instance of the Linear Interpolate function data structure. x is the input sample value. The functions returns the output value.
if x is outside of the table boundary, Linear interpolation returns first value of the table if x is below input range and returns last value of table if x is above range.
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Bilinear Interpolation

Bilinear Interpolation
Interpolation Functions

Detailed Description

Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid. The underlying function f(x, y) is sampled on a regular grid and the interpolation process determines values between the grid points. Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension. Bilinear interpolation is often used in image processing to rescale images. The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types.

Algorithm

The instance structure used by the bilinear interpolation functions describes a two dimensional data table. For floating-point, the instance structure is defined as:
   typedef struct
   {
     uint16_t numRows;
     uint16_t numCols;
     float32_t *pData;
 } arm_bilinear_interp_instance_f32;
where numRows specifies the number of rows in the table; numCols specifies the number of columns in the table; and pData points to an array of size numRows*numCols values. The data table pTable is organized in row order and the supplied data values fall on integer indexes. That is, table element (x,y) is located at pTable[x + y*numCols] where x and y are integers.
Let (x, y) specify the desired interpolation point. Then define:
     XF = floor(x)
     YF = floor(y)
The interpolated output point is computed as:
  f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
           + f(XF+1, YF) * (x-XF)*(1-(y-YF))
           + f(XF, YF+1) * (1-(x-XF))*(y-YF)
           + f(XF+1, YF+1) * (x-XF)*(y-YF)
Note that the coordinates (x, y) contain integer and fractional components. The integer components specify which portion of the table to use while the fractional components control the interpolation processor.
if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Examples

Modules
Examples
DSP Lib

Modules

Class Marks Example
Convolution Example
Dot Product Example
Frequency Bin Example
FIR Lowpass Filter Example
Graphic Audio Equalizer Example
Linear Interpolate Example
Matrix Example
Signal Convergence Example
SineCosine Example
Variance Example
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Class Marks Example

Class Marks Example
Examples
Description:
Demonstrates the use the Maximum, Minimum, Mean, Standard Deviation, Variance and Matrix functions to calculate statistical values of marks obtained in a class.
Note:
This example also demonstrates the usage of static initialization.
Variables Description:
  • testMarks_f32 points to the marks scored by 20 students in 4 subjects
  • max_marks Maximum of all marks
  • min_marks Minimum of all marks
  • mean Mean of all marks
  • var Variance of the marks
  • std Standard deviation of the marks
  • numStudents Total number of students in the class
CMSIS DSP Software Library Functions Used:
  • arm_mat_init_f32()
  • arm_mat_mult_f32()
  • arm_max_f32()
  • arm_min_f32()
  • arm_mean_f32()
  • arm_std_f32()
  • arm_var_f32()

Refer arm_class_marks_example_f32.c

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Convolution Example

Convolution Example
Examples
Description:
Demonstrates the convolution theorem with the use of the Complex FFT, Complex-by-Complex Multiplication, and Support Functions.
Algorithm:
The convolution theorem states that convolution in the time domain corresponds to multiplication in the frequency domain. Therefore, the Fourier transform of the convoution of two signals is equal to the product of their individual Fourier transforms. The Fourier transform of a signal can be evaluated efficiently using the Fast Fourier Transform (FFT).
Two input signals, a[n] and b[n], with lengths n1 and n2 respectively, are zero padded so that their lengths become N, which is greater than or equal to (n1+n2-1) and is a power of 4 as FFT implementation is radix-4. The convolution of a[n] and b[n] is obtained by taking the FFT of the input signals, multiplying the Fourier transforms of the two signals, and taking the inverse FFT of the multiplied result.
This is denoted by the following equations:
 A[k] = FFT(a[n],N)
 B[k] = FFT(b[n],N)
 conv(a[n], b[n]) = IFFT(A[k] * B[k], N)
where A[k] and B[k] are the N-point FFTs of the signals a[n] and b[n] respectively. The length of the convolved signal is (n1+n2-1).
Block Diagram:
Variables Description:
  • testInputA_f32 points to the first input sequence
  • srcALen length of the first input sequence
  • testInputB_f32 points to the second input sequence
  • srcBLen length of the second input sequence
  • outLen length of convolution output sequence, (srcALen + srcBLen - 1)
  • AxB points to the output array where the product of individual FFTs of inputs is stored.
CMSIS DSP Software Library Functions Used:
  • arm_fill_f32()
  • arm_copy_f32()
  • arm_cfft_radix4_init_f32()
  • arm_cfft_radix4_f32()
  • arm_cmplx_mult_cmplx_f32()

Refer arm_convolution_example_f32.c

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Dot Product Example

Dot Product Example
Examples
Description:
Demonstrates the use of the Multiply and Add functions to perform the dot product. The dot product of two vectors is obtained by multiplying corresponding elements and summing the products.
Algorithm:
The two input vectors A and B with length n, are multiplied element-by-element and then added to obtain dot product.
This is denoted by the following equation:
  dotProduct = A[0] * B[0] + A[1] * B[1] + ... + A[n-1] * B[n-1]
Block Diagram:
Variables Description:
  • srcA_buf_f32 points to first input vector
  • srcB_buf_f32 points to second input vector
  • testOutput stores dot product of the two input vectors.
CMSIS DSP Software Library Functions Used:
  • arm_mult_f32()
  • arm_add_f32()

Refer arm_dotproduct_example_f32.c

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Frequency Bin Example

Frequency Bin Example
Examples
Description
Demonstrates the calculation of the maximum energy bin in the frequency domain of the input signal with the use of Complex FFT, Complex Magnitude, and Maximum functions.
Algorithm:
The input test signal contains a 10 kHz signal with uniformly distributed white noise. Calculating the FFT of the input signal will give us the maximum energy of the bin corresponding to the input frequency of 10 kHz.
Block Diagram:
Block Diagram
The figure below shows the time domain signal of 10 kHz signal with uniformly distributed white noise, and the next figure shows the input in the frequency domain. The bin with maximum energy corresponds to 10 kHz signal.
Input signal in Time domain
Input signal in Frequency domain
Variables Description:
  • testInput_f32_10khz points to the input data
  • testOutput points to the output data
  • fftSize length of FFT
  • ifftFlag flag for the selection of CFFT/CIFFT
  • doBitReverse Flag for selection of normal order or bit reversed order
  • refIndex reference index value at which maximum energy of bin ocuurs
  • testIndex calculated index value at which maximum energy of bin ocuurs
CMSIS DSP Software Library Functions Used:
  • arm_cfft_radix4_init_f32()
  • arm_cfft_radix4_f32()
  • arm_cmplx_mag_f32()
  • arm_max_f32()

Refer arm_fft_bin_example_f32.c

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: FIR Lowpass Filter Example

FIR Lowpass Filter Example
Examples
Description:
Removes high frequency signal components from the input using an FIR lowpass filter. The example demonstrates how to configure an FIR filter and then pass data through it in a block-by-block fashion.
Algorithm:
The input signal is a sum of two sine waves: 1 kHz and 15 kHz. This is processed by an FIR lowpass filter with cutoff frequency 6 kHz. The lowpass filter eliminates the 15 kHz signal leaving only the 1 kHz sine wave at the output.
The lowpass filter was designed using MATLAB with a sample rate of 48 kHz and a length of 29 points. The MATLAB code to generate the filter coefficients is shown below:
     h = fir1(28, 6/24);
The first argument is the "order" of the filter and is always one less than the desired length. The second argument is the normalized cutoff frequency. This is in the range 0 (DC) to 1.0 (Nyquist). A 6 kHz cutoff with a Nyquist frequency of 24 kHz lies at a normalized frequency of 6/24 = 0.25. The CMSIS FIR filter function requires the coefficients to be in time reversed order.
     fliplr(h)
The resulting filter coefficients and are shown below. Note that the filter is symmetric (a property of linear phase FIR filters) and the point of symmetry is sample 14. Thus the filter will have a delay of 14 samples for all frequencies.
The frequency response of the filter is shown next. The passband gain of the filter is 1.0 and it reaches 0.5 at the cutoff frequency 6 kHz.
The input signal is shown below. The left hand side shows the signal in the time domain while the right hand side is a frequency domain representation. The two sine wave components can be clearly seen.
The output of the filter is shown below. The 15 kHz component has been eliminated.
Variables Description:
  • testInput_f32_1kHz_15kHz points to the input data
  • refOutput points to the reference output data
  • testOutput points to the test output data
  • firStateF32 points to state buffer
  • firCoeffs32 points to coefficient buffer
  • blockSize number of samples processed at a time
  • numBlocks number of frames
CMSIS DSP Software Library Functions Used:
  • arm_fir_init_f32()
  • arm_fir_f32()

Refer arm_fir_example_f32.c

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Graphic Audio Equalizer Example

Graphic Audio Equalizer Example
Examples
Description:
This example demonstrates how a 5-band graphic equalizer can be constructed using the Biquad cascade functions. A graphic equalizer is used in audio applications to vary the tonal quality of the audio.
Block Diagram:
The design is based on a cascade of 5 filter sections.
Each filter section is 4th order and consists of a cascade of two Biquads. Each filter has a nominal gain of 0 dB (1.0 in linear units) and boosts or cuts signals within a specific frequency range. The edge frequencies between the 5 bands are 100, 500, 2000, and 6000 Hz. Each band has an adjustable boost or cut in the range of +/- 9 dB. For example, the band that extends from 500 to 2000 Hz has the response shown below:
With 1 dB steps, each filter has a total of 19 different settings. The filter coefficients for all possible 19 settings were precomputed in MATLAB and stored in a table. With 5 different tables, there are a total of 5 x 19 = 95 different 4th order filters. All 95 responses are shown below:
Each 4th order filter has 10 coefficents for a grand total of 950 different filter coefficients that must be tabulated. The input and output data is in Q31 format. For better noise performance, the two low frequency bands are implemented using the high precision 32x64-bit Biquad filters. The remaining 3 high frequency bands use standard 32x32-bit Biquad filters. The input signal used in the example is a logarithmic chirp.
The array bandGains specifies the gain in dB to apply in each band. For example, if bandGains={0, -3, 6, 4, -6}; then the output signal will be:
Note:
The output chirp signal follows the gain or boost of each band.
Variables Description:
  • testInput_f32 points to the input data
  • testRefOutput_f32 points to the reference output data
  • testOutput points to the test output data
  • inputQ31 temporary input buffer
  • outputQ31 temporary output buffer
  • biquadStateBand1Q31 points to state buffer for band1
  • biquadStateBand2Q31 points to state buffer for band2
  • biquadStateBand3Q31 points to state buffer for band3
  • biquadStateBand4Q31 points to state buffer for band4
  • biquadStateBand5Q31 points to state buffer for band5
  • coeffTable points to coefficient buffer for all bands
  • gainDB gain buffer which has gains applied for all the bands
CMSIS DSP Software Library Functions Used:
  • arm_biquad_cas_df1_32x64_init_q31()
  • arm_biquad_cas_df1_32x64_q31()
  • arm_biquad_cascade_df1_init_q31()
  • arm_biquad_cascade_df1_q31()
  • arm_scale_q31()
  • arm_scale_f32()
  • arm_float_to_q31()
  • arm_q31_to_float()

Refer arm_graphic_equalizer_example_q31.c

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Linear Interpolate Example

Linear Interpolate Example
Examples

CMSIS DSP Software Library -- Linear Interpolate Example

Description This example demonstrates usage of linear interpolate modules and fast math modules. Method 1 uses fast math sine function to calculate sine values using cubic interpolation and method 2 uses linear interpolation function and results are compared to reference output. Example shows linear interpolation function can be used to get higher precision compared to fast math sin calculation.

Block Diagram:
Method 1: Sine caluclation using fast math
Method 2: Sine caluclation using interpolation function
Variables Description:
  • testInputSin_f32 points to the input values for sine calculation
  • testRefSinOutput32_f32 points to the reference values caculated from sin() matlab function
  • testOutput points to output buffer calculation from cubic interpolation
  • testLinIntOutput points to output buffer calculation from linear interpolation
  • snr1 Signal to noise ratio for reference and cubic interpolation output
  • snr2 Signal to noise ratio for reference and linear interpolation output
CMSIS DSP Software Library Functions Used:
  • arm_sin_f32()
  • arm_linear_interp_f32()

Refer arm_linear_interp_example_f32.c

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Matrix Example

Matrix Example
Examples
Description:
Demonstrates the use of Matrix Transpose, Matrix Muliplication, and Matrix Inverse functions to apply least squares fitting to input data. Least squares fitting is the procedure for finding the best-fitting curve that minimizes the sum of the squares of the offsets (least square error) from a given set of data.
Algorithm:
The linear combination of parameters considered is as follows:
A * X = B, where X is the unknown value and can be estimated from A & B.
The least squares estimate X is given by the following equation:
X = Inverse(AT * A) * AT * B
Block Diagram:
Variables Description:
  • A_f32 input matrix in the linear combination equation
  • B_f32 output matrix in the linear combination equation
  • X_f32 unknown matrix estimated using A_f32 & B_f32 matrices
CMSIS DSP Software Library Functions Used:
  • arm_mat_init_f32()
  • arm_mat_trans_f32()
  • arm_mat_mult_f32()
  • arm_mat_inverse_f32()

Refer arm_matrix_example_f32.c

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Signal Convergence Example

Signal Convergence Example
Examples
Description:
Demonstrates the ability of an adaptive filter to "learn" the transfer function of a FIR lowpass filter using the Normalized LMS Filter, Finite Impulse Response (FIR) Filter, and Basic Math Functions.
Algorithm:
The figure below illustrates the signal flow in this example. Uniformly distributed white noise is passed through an FIR lowpass filter. The output of the FIR filter serves as the reference input of the adaptive filter (normalized LMS filter). The white noise is input to the adaptive filter. The adaptive filter learns the transfer function of the FIR filter. The filter outputs two signals: (1) the output of the internal adaptive FIR filter, and (2) the error signal which is the difference between the adaptive filter and the reference output of the FIR filter. Over time as the adaptive filter learns the transfer function of the FIR filter, the first output approaches the reference output of the FIR filter, and the error signal approaches zero.
The adaptive filter converges properly even if the input signal has a large dynamic range (i.e., varies from small to large values). The coefficients of the adaptive filter are initially zero, and then converge over 1536 samples. The internal function test_signal_converge() implements the stopping condition. The function checks if all of the values of the error signal have a magnitude below a threshold DELTA.
Block Diagram:
Variables Description:
  • testInput_f32 points to the input data
  • firStateF32 points to FIR state buffer
  • lmsStateF32 points to Normalised Least mean square FIR filter state buffer
  • FIRCoeff_f32 points to coefficient buffer
  • lmsNormCoeff_f32 points to Normalised Least mean square FIR filter coefficient buffer
  • wire1, wir2, wire3 temporary buffers
  • errOutput, err_signal temporary error buffers
CMSIS DSP Software Library Functions Used:
  • arm_lms_norm_init_f32()
  • arm_fir_init_f32()
  • arm_fir_f32()
  • arm_lms_norm_f32()
  • arm_scale_f32()
  • arm_abs_f32()
  • arm_sub_f32()
  • arm_min_f32()
  • arm_copy_f32()

Refer arm_signal_converge_example_f32.c

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: SineCosine Example

SineCosine Example
Examples
Description:
Demonstrates the Pythagorean trignometric identity with the use of Cosine, Sine, Vector Multiplication, and Vector Addition functions.
Algorithm:
Mathematically, the Pythagorean trignometric identity is defined by the following equation:
sin(x) * sin(x) + cos(x) * cos(x) = 1
where x is the angle in radians.
Block Diagram:
Variables Description:
  • testInput_f32 array of input angle in radians
  • testOutput stores sum of the squares of sine and cosine values of input angle
CMSIS DSP Software Library Functions Used:
  • arm_cos_f32()
  • arm_sin_f32()
  • arm_mult_f32()
  • arm_add_f32()

Refer arm_sin_cos_example_f32.c

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Variance Example

Variance Example
Examples
Description:
Demonstrates the use of Basic Math and Support Functions to calculate the variance of an input sequence with N samples. Uniformly distributed white noise is taken as input.
Algorithm:
The variance of a sequence is the mean of the squared deviation of the sequence from its mean.
This is denoted by the following equation:
 variance = ((x[0] - x') * (x[0] - x') + (x[1] - x') * (x[1] - x') + ... + * (x[n-1] - x') * (x[n-1] - x')) / (N-1)
where, x[n] is the input sequence, N is the number of input samples, and x' is the mean value of the input sequence, x[n].
The mean value x' is defined as:
 x' = (x[0] + x[1] + ... + x[n-1]) / N
Block Diagram:
Variables Description:
  • testInput_f32 points to the input data
  • wire1, wir2, wire3 temporary buffers
  • blockSize number of samples processed at a time
  • refVarianceOut reference variance value
CMSIS DSP Software Library Functions Used:
  • arm_dot_prod_f32()
  • arm_mult_f32()
  • arm_sub_f32()
  • arm_fill_f32()
  • arm_copy_f32()

Refer arm_variance_example_f32.c

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core

Modules
CMSIS Core
CMSIS

Modules

CMSIS MISRA-C:2004 Compliance Exceptions
CMSIS Core Definitions
CMSIS Core Register
CMSIS Core Function Interface
CMSIS Core Instruction Interface
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS MISRA-C:2004 Compliance Exceptions

CMSIS MISRA-C:2004 Compliance Exceptions
CMSIS Core

CMSIS violates following MISRA-C2004 Rules:

  • Violates MISRA 2004 Required Rule 8.5, object/function definition in header file.
    Function definitions in header files are used to allow 'inlining'.
  • Violates MISRA 2004 Required Rule 18.4, declaration of union type or object of union type: '{...}'.
    Unions are used for effective representation of core registers.
  • Violates MISRA 2004 Advisory Rule 19.7, Function-like macro defined.
    Function-like macros are used to allow more efficient code.
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core Definitions

Defines
CMSIS Core Definitions
CMSIS Core

Defines

#define | __CM3_CMSIS_VERSION_MAIN (0x02)
#define | __CM3_CMSIS_VERSION_SUB (0x10)
#define | __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB)
#define | __CORTEX_M (0x03)
#define | __FPU_USED 0
#define | __CORE_CM3_H_DEPENDANT
#define | __I volatile const
#define | __O volatile
#define | __IO volatile

Detailed Description

This file defines all structures and symbols for CMSIS core:

  • CMSIS version number
  • Cortex-M core
  • Cortex-M core Revision Number

Define Documentation

#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB)

CMSIS HAL version number

Definition at line 66 of file core_cm3.h.

#define __CM3_CMSIS_VERSION_MAIN (0x02)

[31:16] CMSIS HAL main version

Definition at line 64 of file core_cm3.h.

#define __CM3_CMSIS_VERSION_SUB (0x10)

[15:0] CMSIS HAL sub version

Definition at line 65 of file core_cm3.h.

#define __CORE_CM3_H_DEPENDANT

Definition at line 119 of file core_cm3.h.

#define __CORTEX_M (0x03)

Cortex core __FPU_USED to be checked prior to making use of FPU specific registers and functions

Definition at line 68 of file core_cm3.h.

#define __FPU_USED 0

standard types definitions

Definition at line 90 of file core_cm3.h.

#define __I volatile const

defines 'read only' permissions

Definition at line 148 of file core_cm3.h.

#define __IO volatile

defines 'read / write' permissions

Definition at line 151 of file core_cm3.h.

#define __O volatile

defines 'write only' permissions

Definition at line 150 of file core_cm3.h.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core Register

Modules
CMSIS Core Register
CMSIS Core

Modules

CMSIS Core
CMSIS NVIC
CMSIS SCB
CMSIS System Control and ID Register not in the SCB
CMSIS SysTick
CMSIS ITM
CMSIS Core Debug
#define | SCS_BASE (0xE000E000UL)
#define | ITM_BASE (0xE0000000UL)
#define | CoreDebug_BASE (0xE000EDF0UL)
#define | SysTick_BASE (SCS_BASE + 0x0010UL)
#define | NVIC_BASE (SCS_BASE + 0x0100UL)
#define | SCB_BASE (SCS_BASE + 0x0D00UL)
#define | SCnSCB ((SCnSCB_Type *) SCS_BASE )
#define | SCB ((SCB_Type *) SCB_BASE )
#define | SysTick ((SysTick_Type *) SysTick_BASE )
#define | NVIC ((NVIC_Type *) NVIC_BASE )
#define | ITM ((ITM_Type *) ITM_BASE )
#define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE)

Detailed Description

Core Register contain:

  • Core Register
  • Core NVIC Register
  • Core SCB Register
  • Core SysTick Register
  • Core Debug Register
  • Core MPU Register

Define Documentation

#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE)

Core Debug configuration struct

Definition at line 846 of file core_cm3.h.

#define CoreDebug_BASE (0xE000EDF0UL)

Core Debug Base Address

Definition at line 836 of file core_cm3.h.

#define ITM ((ITM_Type *) ITM_BASE )

ITM configuration struct

Definition at line 845 of file core_cm3.h.

#define ITM_BASE (0xE0000000UL)

ITM Base Address

Definition at line 835 of file core_cm3.h.

#define NVIC ((NVIC_Type *) NVIC_BASE )

NVIC configuration struct

Definition at line 844 of file core_cm3.h.

#define NVIC_BASE (SCS_BASE + 0x0100UL)

NVIC Base Address

Definition at line 838 of file core_cm3.h.

#define SCB ((SCB_Type *) SCB_BASE )

SCB configuration struct

Definition at line 842 of file core_cm3.h.

#define SCB_BASE (SCS_BASE + 0x0D00UL)

System Control Block Base Address

Definition at line 839 of file core_cm3.h.

#define SCnSCB ((SCnSCB_Type *) SCS_BASE )

System control Register not in SCB

Definition at line 841 of file core_cm3.h.

#define SCS_BASE (0xE000E000UL)

System Control Space Base Address

Definition at line 834 of file core_cm3.h.

#define SysTick ((SysTick_Type *) SysTick_BASE )

SysTick configuration struct

Definition at line 843 of file core_cm3.h.

#define SysTick_BASE (SCS_BASE + 0x0010UL)

SysTick Base Address

Definition at line 837 of file core_cm3.h.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core

Data Structures
CMSIS Core
CMSIS Core Register

Data Structures

union | APSR_Type
Union type to access the Application Program Status Register (APSR). More...
union | IPSR_Type
Union type to access the Interrupt Program Status Register (IPSR). More...
union | xPSR_Type
Union type to access the Special-Purpose Program Status Registers (xPSR). More...
union | CONTROL_Type
Union type to access the Control Registers (CONTROL). More...

Detailed Description

Type definitions for the Cortex-M Core Registers

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS NVIC

Data Structures | Defines
CMSIS NVIC
CMSIS Core Register

Data Structures

struct | NVIC_Type
Structure type to access the Nested Vectored Interrupt Controller (NVIC). More...

Defines

#define | NVIC_STIR_INTID_Pos 0
#define | NVIC_STIR_INTID_Msk (0x1FFUL << NVIC_STIR_INTID_Pos)

Detailed Description

Type definitions for the Cortex-M NVIC Registers

Define Documentation

#define NVIC_STIR_INTID_Msk (0x1FFUL << NVIC_STIR_INTID_Pos)

STIR: INTLINESNUM Mask

Definition at line 283 of file core_cm3.h.

#define NVIC_STIR_INTID_Pos 0

STIR: INTLINESNUM Position

Definition at line 282 of file core_cm3.h.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS SCB

Data Structures | Defines
CMSIS SCB
CMSIS Core Register

Data Structures

struct | SCB_Type
Structure type to access the System Control Block (SCB). More...

Defines

#define | SCB_CPUID_IMPLEMENTER_Pos 24
#define | SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)
#define | SCB_CPUID_VARIANT_Pos 20
#define | SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos)
#define | SCB_CPUID_ARCHITECTURE_Pos 16
#define | SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)
#define | SCB_CPUID_PARTNO_Pos 4
#define | SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos)
#define | SCB_CPUID_REVISION_Pos 0
#define | SCB_CPUID_REVISION_Msk (0xFUL << SCB_CPUID_REVISION_Pos)
#define | SCB_ICSR_NMIPENDSET_Pos 31
#define | SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos)
#define | SCB_ICSR_PENDSVSET_Pos 28
#define | SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos)
#define | SCB_ICSR_PENDSVCLR_Pos 27
#define | SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos)
#define | SCB_ICSR_PENDSTSET_Pos 26
#define | SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos)
#define | SCB_ICSR_PENDSTCLR_Pos 25
#define | SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos)
#define | SCB_ICSR_ISRPREEMPT_Pos 23
#define | SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos)
#define | SCB_ICSR_ISRPENDING_Pos 22
#define | SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos)
#define | SCB_ICSR_VECTPENDING_Pos 12
#define | SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)
#define | SCB_ICSR_RETTOBASE_Pos 11
#define | SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos)
#define | SCB_ICSR_VECTACTIVE_Pos 0
#define | SCB_ICSR_VECTACTIVE_Msk (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos)
#define | SCB_VTOR_TBLOFF_Pos 7
#define | SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)
#define | SCB_AIRCR_VECTKEY_Pos 16
#define | SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)
#define | SCB_AIRCR_VECTKEYSTAT_Pos 16
#define | SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)
#define | SCB_AIRCR_ENDIANESS_Pos 15
#define | SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos)
#define | SCB_AIRCR_PRIGROUP_Pos 8
#define | SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos)
#define | SCB_AIRCR_SYSRESETREQ_Pos 2
#define | SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos)
#define | SCB_AIRCR_VECTCLRACTIVE_Pos 1
#define | SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)
#define | SCB_AIRCR_VECTRESET_Pos 0
#define | SCB_AIRCR_VECTRESET_Msk (1UL << SCB_AIRCR_VECTRESET_Pos)
#define | SCB_SCR_SEVONPEND_Pos 4
#define | SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos)
#define | SCB_SCR_SLEEPDEEP_Pos 2
#define | SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos)
#define | SCB_SCR_SLEEPONEXIT_Pos 1
#define | SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos)
#define | SCB_CCR_STKALIGN_Pos 9
#define | SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos)
#define | SCB_CCR_BFHFNMIGN_Pos 8
#define | SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos)
#define | SCB_CCR_DIV_0_TRP_Pos 4
#define | SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos)
#define | SCB_CCR_UNALIGN_TRP_Pos 3
#define | SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos)
#define | SCB_CCR_USERSETMPEND_Pos 1
#define | SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos)
#define | SCB_CCR_NONBASETHRDENA_Pos 0
#define | SCB_CCR_NONBASETHRDENA_Msk (1UL << SCB_CCR_NONBASETHRDENA_Pos)
#define | SCB_SHCSR_USGFAULTENA_Pos 18
#define | SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos)
#define | SCB_SHCSR_BUSFAULTENA_Pos 17
#define | SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos)
#define | SCB_SHCSR_MEMFAULTENA_Pos 16
#define | SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos)
#define | SCB_SHCSR_SVCALLPENDED_Pos 15
#define | SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos)
#define | SCB_SHCSR_BUSFAULTPENDED_Pos 14
#define | SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)
#define | SCB_SHCSR_MEMFAULTPENDED_Pos 13
#define | SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)
#define | SCB_SHCSR_USGFAULTPENDED_Pos 12
#define | SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)
#define | SCB_SHCSR_SYSTICKACT_Pos 11
#define | SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos)
#define | SCB_SHCSR_PENDSVACT_Pos 10
#define | SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos)
#define | SCB_SHCSR_MONITORACT_Pos 8
#define | SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos)
#define | SCB_SHCSR_SVCALLACT_Pos 7
#define | SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos)
#define | SCB_SHCSR_USGFAULTACT_Pos 3
#define | SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos)
#define | SCB_SHCSR_BUSFAULTACT_Pos 1
#define | SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos)
#define | SCB_SHCSR_MEMFAULTACT_Pos 0
#define | SCB_SHCSR_MEMFAULTACT_Msk (1UL << SCB_SHCSR_MEMFAULTACT_Pos)
#define | SCB_CFSR_USGFAULTSR_Pos 16
#define | SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)
#define | SCB_CFSR_BUSFAULTSR_Pos 8
#define | SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)
#define | SCB_CFSR_MEMFAULTSR_Pos 0
#define | SCB_CFSR_MEMFAULTSR_Msk (0xFFUL << SCB_CFSR_MEMFAULTSR_Pos)
#define | SCB_HFSR_DEBUGEVT_Pos 31
#define | SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos)
#define | SCB_HFSR_FORCED_Pos 30
#define | SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos)
#define | SCB_HFSR_VECTTBL_Pos 1
#define | SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos)
#define | SCB_DFSR_EXTERNAL_Pos 4
#define | SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos)
#define | SCB_DFSR_VCATCH_Pos 3
#define | SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos)
#define | SCB_DFSR_DWTTRAP_Pos 2
#define | SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos)
#define | SCB_DFSR_BKPT_Pos 1
#define | SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos)
#define | SCB_DFSR_HALTED_Pos 0
#define | SCB_DFSR_HALTED_Msk (1UL << SCB_DFSR_HALTED_Pos)

Detailed Description

Type definitions for the Cortex-M System Control Block Registers

Define Documentation

#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos)

SCB AIRCR: ENDIANESS Mask

Definition at line 380 of file core_cm3.h.

#define SCB_AIRCR_ENDIANESS_Pos 15

SCB AIRCR: ENDIANESS Position

Definition at line 379 of file core_cm3.h.

#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos)

SCB AIRCR: PRIGROUP Mask

Definition at line 383 of file core_cm3.h.

#define SCB_AIRCR_PRIGROUP_Pos 8

SCB AIRCR: PRIGROUP Position

Definition at line 382 of file core_cm3.h.

#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos)

SCB AIRCR: SYSRESETREQ Mask

Definition at line 386 of file core_cm3.h.

#define SCB_AIRCR_SYSRESETREQ_Pos 2

SCB AIRCR: SYSRESETREQ Position

Definition at line 385 of file core_cm3.h.

#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)

SCB AIRCR: VECTCLRACTIVE Mask

Definition at line 389 of file core_cm3.h.

#define SCB_AIRCR_VECTCLRACTIVE_Pos 1

SCB AIRCR: VECTCLRACTIVE Position

Definition at line 388 of file core_cm3.h.

#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)

SCB AIRCR: VECTKEY Mask

Definition at line 374 of file core_cm3.h.

#define SCB_AIRCR_VECTKEY_Pos 16

SCB AIRCR: VECTKEY Position

Definition at line 373 of file core_cm3.h.

#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)

SCB AIRCR: VECTKEYSTAT Mask

Definition at line 377 of file core_cm3.h.

#define SCB_AIRCR_VECTKEYSTAT_Pos 16

SCB AIRCR: VECTKEYSTAT Position

Definition at line 376 of file core_cm3.h.

#define SCB_AIRCR_VECTRESET_Msk (1UL << SCB_AIRCR_VECTRESET_Pos)

SCB AIRCR: VECTRESET Mask

Definition at line 392 of file core_cm3.h.

#define SCB_AIRCR_VECTRESET_Pos 0

SCB AIRCR: VECTRESET Position

Definition at line 391 of file core_cm3.h.

#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos)

SCB CCR: BFHFNMIGN Mask

Definition at line 409 of file core_cm3.h.

#define SCB_CCR_BFHFNMIGN_Pos 8

SCB CCR: BFHFNMIGN Position

Definition at line 408 of file core_cm3.h.

#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos)

SCB CCR: DIV_0_TRP Mask

Definition at line 412 of file core_cm3.h.

#define SCB_CCR_DIV_0_TRP_Pos 4

SCB CCR: DIV_0_TRP Position

Definition at line 411 of file core_cm3.h.

#define SCB_CCR_NONBASETHRDENA_Msk (1UL << SCB_CCR_NONBASETHRDENA_Pos)

SCB CCR: NONBASETHRDENA Mask

Definition at line 421 of file core_cm3.h.

#define SCB_CCR_NONBASETHRDENA_Pos 0

SCB CCR: NONBASETHRDENA Position

Definition at line 420 of file core_cm3.h.

#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos)

SCB CCR: STKALIGN Mask

Definition at line 406 of file core_cm3.h.

#define SCB_CCR_STKALIGN_Pos 9

SCB CCR: STKALIGN Position

Definition at line 405 of file core_cm3.h.

#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos)

SCB CCR: UNALIGN_TRP Mask

Definition at line 415 of file core_cm3.h.

#define SCB_CCR_UNALIGN_TRP_Pos 3

SCB CCR: UNALIGN_TRP Position

Definition at line 414 of file core_cm3.h.

#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos)

SCB CCR: USERSETMPEND Mask

Definition at line 418 of file core_cm3.h.

#define SCB_CCR_USERSETMPEND_Pos 1

SCB CCR: USERSETMPEND Position

Definition at line 417 of file core_cm3.h.

#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)

SCB CFSR: Bus Fault Status Register Mask

Definition at line 471 of file core_cm3.h.

#define SCB_CFSR_BUSFAULTSR_Pos 8

SCB CFSR: Bus Fault Status Register Position

Definition at line 470 of file core_cm3.h.

#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL << SCB_CFSR_MEMFAULTSR_Pos)

SCB CFSR: Memory Manage Fault Status Register Mask

Definition at line 474 of file core_cm3.h.

#define SCB_CFSR_MEMFAULTSR_Pos 0

SCB CFSR: Memory Manage Fault Status Register Position

Definition at line 473 of file core_cm3.h.

#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)

SCB CFSR: Usage Fault Status Register Mask

Definition at line 468 of file core_cm3.h.

#define SCB_CFSR_USGFAULTSR_Pos 16

SCB CFSR: Usage Fault Status Register Position

Definition at line 467 of file core_cm3.h.

#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)

SCB CPUID: ARCHITECTURE Mask

Definition at line 329 of file core_cm3.h.

#define SCB_CPUID_ARCHITECTURE_Pos 16

SCB CPUID: ARCHITECTURE Position

Definition at line 328 of file core_cm3.h.

#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)

SCB CPUID: IMPLEMENTER Mask

Definition at line 323 of file core_cm3.h.

#define SCB_CPUID_IMPLEMENTER_Pos 24

SCB CPUID: IMPLEMENTER Position

Definition at line 322 of file core_cm3.h.

#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos)

SCB CPUID: PARTNO Mask

Definition at line 332 of file core_cm3.h.

#define SCB_CPUID_PARTNO_Pos 4

SCB CPUID: PARTNO Position

Definition at line 331 of file core_cm3.h.

#define SCB_CPUID_REVISION_Msk (0xFUL << SCB_CPUID_REVISION_Pos)

SCB CPUID: REVISION Mask

Definition at line 335 of file core_cm3.h.

#define SCB_CPUID_REVISION_Pos 0

SCB CPUID: REVISION Position

Definition at line 334 of file core_cm3.h.

#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos)

SCB CPUID: VARIANT Mask

Definition at line 326 of file core_cm3.h.

#define SCB_CPUID_VARIANT_Pos 20

SCB CPUID: VARIANT Position

Definition at line 325 of file core_cm3.h.

#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos)

SCB DFSR: BKPT Mask

Definition at line 497 of file core_cm3.h.

#define SCB_DFSR_BKPT_Pos 1

SCB DFSR: BKPT Position

Definition at line 496 of file core_cm3.h.

#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos)

SCB DFSR: DWTTRAP Mask

Definition at line 494 of file core_cm3.h.

#define SCB_DFSR_DWTTRAP_Pos 2

SCB DFSR: DWTTRAP Position

Definition at line 493 of file core_cm3.h.

#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos)

SCB DFSR: EXTERNAL Mask

Definition at line 488 of file core_cm3.h.

#define SCB_DFSR_EXTERNAL_Pos 4

SCB DFSR: EXTERNAL Position

Definition at line 487 of file core_cm3.h.

#define SCB_DFSR_HALTED_Msk (1UL << SCB_DFSR_HALTED_Pos)

SCB DFSR: HALTED Mask

Definition at line 500 of file core_cm3.h.

#define SCB_DFSR_HALTED_Pos 0

SCB DFSR: HALTED Position

Definition at line 499 of file core_cm3.h.

#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos)

SCB DFSR: VCATCH Mask

Definition at line 491 of file core_cm3.h.

#define SCB_DFSR_VCATCH_Pos 3

SCB DFSR: VCATCH Position

Definition at line 490 of file core_cm3.h.

#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos)

SCB HFSR: DEBUGEVT Mask

Definition at line 478 of file core_cm3.h.

#define SCB_HFSR_DEBUGEVT_Pos 31

SCB HFSR: DEBUGEVT Position

Definition at line 477 of file core_cm3.h.

#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos)

SCB HFSR: FORCED Mask

Definition at line 481 of file core_cm3.h.

#define SCB_HFSR_FORCED_Pos 30

SCB HFSR: FORCED Position

Definition at line 480 of file core_cm3.h.

#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos)

SCB HFSR: VECTTBL Mask

Definition at line 484 of file core_cm3.h.

#define SCB_HFSR_VECTTBL_Pos 1

SCB HFSR: VECTTBL Position

Definition at line 483 of file core_cm3.h.

#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos)

SCB ICSR: ISRPENDING Mask

Definition at line 357 of file core_cm3.h.

#define SCB_ICSR_ISRPENDING_Pos 22

SCB ICSR: ISRPENDING Position

Definition at line 356 of file core_cm3.h.

#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos)

SCB ICSR: ISRPREEMPT Mask

Definition at line 354 of file core_cm3.h.

#define SCB_ICSR_ISRPREEMPT_Pos 23

SCB ICSR: ISRPREEMPT Position

Definition at line 353 of file core_cm3.h.

#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos)

SCB ICSR: NMIPENDSET Mask

Definition at line 339 of file core_cm3.h.

#define SCB_ICSR_NMIPENDSET_Pos 31

SCB ICSR: NMIPENDSET Position

Definition at line 338 of file core_cm3.h.

#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos)

SCB ICSR: PENDSTCLR Mask

Definition at line 351 of file core_cm3.h.

#define SCB_ICSR_PENDSTCLR_Pos 25

SCB ICSR: PENDSTCLR Position

Definition at line 350 of file core_cm3.h.

#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos)

SCB ICSR: PENDSTSET Mask

Definition at line 348 of file core_cm3.h.

#define SCB_ICSR_PENDSTSET_Pos 26

SCB ICSR: PENDSTSET Position

Definition at line 347 of file core_cm3.h.

#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos)

SCB ICSR: PENDSVCLR Mask

Definition at line 345 of file core_cm3.h.

#define SCB_ICSR_PENDSVCLR_Pos 27

SCB ICSR: PENDSVCLR Position

Definition at line 344 of file core_cm3.h.

#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos)

SCB ICSR: PENDSVSET Mask

Definition at line 342 of file core_cm3.h.

#define SCB_ICSR_PENDSVSET_Pos 28

SCB ICSR: PENDSVSET Position

Definition at line 341 of file core_cm3.h.

#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos)

SCB ICSR: RETTOBASE Mask

Definition at line 363 of file core_cm3.h.

#define SCB_ICSR_RETTOBASE_Pos 11

SCB ICSR: RETTOBASE Position

Definition at line 362 of file core_cm3.h.

#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos)

SCB ICSR: VECTACTIVE Mask

Definition at line 366 of file core_cm3.h.

#define SCB_ICSR_VECTACTIVE_Pos 0

SCB ICSR: VECTACTIVE Position

Definition at line 365 of file core_cm3.h.

#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)

SCB ICSR: VECTPENDING Mask

Definition at line 360 of file core_cm3.h.

#define SCB_ICSR_VECTPENDING_Pos 12

SCB ICSR: VECTPENDING Position

Definition at line 359 of file core_cm3.h.

#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos)

SCB SCR: SEVONPEND Mask

Definition at line 396 of file core_cm3.h.

#define SCB_SCR_SEVONPEND_Pos 4

SCB SCR: SEVONPEND Position

Definition at line 395 of file core_cm3.h.

#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos)

SCB SCR: SLEEPDEEP Mask

Definition at line 399 of file core_cm3.h.

#define SCB_SCR_SLEEPDEEP_Pos 2

SCB SCR: SLEEPDEEP Position

Definition at line 398 of file core_cm3.h.

#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos)

SCB SCR: SLEEPONEXIT Mask

Definition at line 402 of file core_cm3.h.

#define SCB_SCR_SLEEPONEXIT_Pos 1

SCB SCR: SLEEPONEXIT Position

Definition at line 401 of file core_cm3.h.

#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos)

SCB SHCSR: BUSFAULTACT Mask

Definition at line 461 of file core_cm3.h.

#define SCB_SHCSR_BUSFAULTACT_Pos 1

SCB SHCSR: BUSFAULTACT Position

Definition at line 460 of file core_cm3.h.

#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos)

SCB SHCSR: BUSFAULTENA Mask

Definition at line 428 of file core_cm3.h.

#define SCB_SHCSR_BUSFAULTENA_Pos 17

SCB SHCSR: BUSFAULTENA Position

Definition at line 427 of file core_cm3.h.

#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)

SCB SHCSR: BUSFAULTPENDED Mask

Definition at line 437 of file core_cm3.h.

#define SCB_SHCSR_BUSFAULTPENDED_Pos 14

SCB SHCSR: BUSFAULTPENDED Position

Definition at line 436 of file core_cm3.h.

#define SCB_SHCSR_MEMFAULTACT_Msk (1UL << SCB_SHCSR_MEMFAULTACT_Pos)

SCB SHCSR: MEMFAULTACT Mask

Definition at line 464 of file core_cm3.h.

#define SCB_SHCSR_MEMFAULTACT_Pos 0

SCB SHCSR: MEMFAULTACT Position

Definition at line 463 of file core_cm3.h.

#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos)

SCB SHCSR: MEMFAULTENA Mask

Definition at line 431 of file core_cm3.h.

#define SCB_SHCSR_MEMFAULTENA_Pos 16

SCB SHCSR: MEMFAULTENA Position

Definition at line 430 of file core_cm3.h.

#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)

SCB SHCSR: MEMFAULTPENDED Mask

Definition at line 440 of file core_cm3.h.

#define SCB_SHCSR_MEMFAULTPENDED_Pos 13

SCB SHCSR: MEMFAULTPENDED Position

Definition at line 439 of file core_cm3.h.

#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos)

SCB SHCSR: MONITORACT Mask

Definition at line 452 of file core_cm3.h.

#define SCB_SHCSR_MONITORACT_Pos 8

SCB SHCSR: MONITORACT Position

Definition at line 451 of file core_cm3.h.

#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos)

SCB SHCSR: PENDSVACT Mask

Definition at line 449 of file core_cm3.h.

#define SCB_SHCSR_PENDSVACT_Pos 10

SCB SHCSR: PENDSVACT Position

Definition at line 448 of file core_cm3.h.

#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos)

SCB SHCSR: SVCALLACT Mask

Definition at line 455 of file core_cm3.h.

#define SCB_SHCSR_SVCALLACT_Pos 7

SCB SHCSR: SVCALLACT Position

Definition at line 454 of file core_cm3.h.

#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos)

SCB SHCSR: SVCALLPENDED Mask

Definition at line 434 of file core_cm3.h.

#define SCB_SHCSR_SVCALLPENDED_Pos 15

SCB SHCSR: SVCALLPENDED Position

Definition at line 433 of file core_cm3.h.

#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos)

SCB SHCSR: SYSTICKACT Mask

Definition at line 446 of file core_cm3.h.

#define SCB_SHCSR_SYSTICKACT_Pos 11

SCB SHCSR: SYSTICKACT Position

Definition at line 445 of file core_cm3.h.

#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos)

SCB SHCSR: USGFAULTACT Mask

Definition at line 458 of file core_cm3.h.

#define SCB_SHCSR_USGFAULTACT_Pos 3

SCB SHCSR: USGFAULTACT Position

Definition at line 457 of file core_cm3.h.

#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos)

SCB SHCSR: USGFAULTENA Mask

Definition at line 425 of file core_cm3.h.

#define SCB_SHCSR_USGFAULTENA_Pos 18

SCB SHCSR: USGFAULTENA Position

Definition at line 424 of file core_cm3.h.

#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)

SCB SHCSR: USGFAULTPENDED Mask

Definition at line 443 of file core_cm3.h.

#define SCB_SHCSR_USGFAULTPENDED_Pos 12

SCB SHCSR: USGFAULTPENDED Position

Definition at line 442 of file core_cm3.h.

#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)

SCB VTOR: TBLOFF Mask

Definition at line 370 of file core_cm3.h.

#define SCB_VTOR_TBLOFF_Pos 7

SCB VTOR: TBLOFF Position

Definition at line 369 of file core_cm3.h.

Generated on Mon Nov 28 2011 11:15:26 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS System Control and ID Register not in the SCB

Data Structures | Defines
CMSIS System Control and ID Register not in the SCB
CMSIS Core Register

Data Structures

struct | SCnSCB_Type
Structure type to access the System Control and ID Register not in the SCB. More...

Defines

#define | SCnSCB_ICTR_INTLINESNUM_Pos 0
#define | SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL << SCnSCB_ICTR_INTLINESNUM_Pos)
#define | SCnSCB_ACTLR_DISFOLD_Pos 2
#define | SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos)
#define | SCnSCB_ACTLR_DISDEFWBUF_Pos 1
#define | SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)
#define | SCnSCB_ACTLR_DISMCYCINT_Pos 0
#define | SCnSCB_ACTLR_DISMCYCINT_Msk (1UL << SCnSCB_ACTLR_DISMCYCINT_Pos)

Detailed Description

Type definitions for the Cortex-M System Control and ID Register not in the SCB

Define Documentation

#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)

ACTLR: DISDEFWBUF Mask

Definition at line 534 of file core_cm3.h.

#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1

ACTLR: DISDEFWBUF Position

Definition at line 533 of file core_cm3.h.

#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos)

ACTLR: DISFOLD Mask

Definition at line 531 of file core_cm3.h.

#define SCnSCB_ACTLR_DISFOLD_Pos 2

ACTLR: DISFOLD Position

Definition at line 530 of file core_cm3.h.

#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL << SCnSCB_ACTLR_DISMCYCINT_Pos)

ACTLR: DISMCYCINT Mask

Definition at line 537 of file core_cm3.h.

#define SCnSCB_ACTLR_DISMCYCINT_Pos 0

ACTLR: DISMCYCINT Position

Definition at line 536 of file core_cm3.h.

#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL << SCnSCB_ICTR_INTLINESNUM_Pos)

ICTR: INTLINESNUM Mask

Definition at line 526 of file core_cm3.h.

#define SCnSCB_ICTR_INTLINESNUM_Pos 0

ICTR: INTLINESNUM Position

Definition at line 525 of file core_cm3.h.

Generated on Mon Nov 28 2011 11:15:26 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS SysTick

Data Structures | Defines
CMSIS SysTick
CMSIS Core Register

Data Structures

struct | SysTick_Type
Structure type to access the System Timer (SysTick). More...

Defines

#define | SysTick_CTRL_COUNTFLAG_Pos 16
#define | SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos)
#define | SysTick_CTRL_CLKSOURCE_Pos 2
#define | SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos)
#define | SysTick_CTRL_TICKINT_Pos 1
#define | SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos)
#define | SysTick_CTRL_ENABLE_Pos 0
#define | SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos)
#define | SysTick_LOAD_RELOAD_Pos 0
#define | SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos)
#define | SysTick_VAL_CURRENT_Pos 0
#define | SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)
#define | SysTick_CALIB_NOREF_Pos 31
#define | SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos)
#define | SysTick_CALIB_SKEW_Pos 30
#define | SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos)
#define | SysTick_CALIB_TENMS_Pos 0
#define | SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)

Detailed Description

Type definitions for the Cortex-M System Timer Registers

Define Documentation

#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos)

SysTick CALIB: NOREF Mask

Definition at line 581 of file core_cm3.h.

#define SysTick_CALIB_NOREF_Pos 31

SysTick CALIB: NOREF Position

Definition at line 580 of file core_cm3.h.

#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos)

SysTick CALIB: SKEW Mask

Definition at line 584 of file core_cm3.h.

#define SysTick_CALIB_SKEW_Pos 30

SysTick CALIB: SKEW Position

Definition at line 583 of file core_cm3.h.

#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)

SysTick CALIB: TENMS Mask

Definition at line 587 of file core_cm3.h.

#define SysTick_CALIB_TENMS_Pos 0

SysTick CALIB: TENMS Position

Definition at line 586 of file core_cm3.h.

#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos)

SysTick CTRL: CLKSOURCE Mask

Definition at line 563 of file core_cm3.h.

#define SysTick_CTRL_CLKSOURCE_Pos 2

SysTick CTRL: CLKSOURCE Position

Definition at line 562 of file core_cm3.h.

#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos)

SysTick CTRL: COUNTFLAG Mask

Definition at line 560 of file core_cm3.h.

#define SysTick_CTRL_COUNTFLAG_Pos 16

SysTick CTRL: COUNTFLAG Position

Definition at line 559 of file core_cm3.h.

#define SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos)

SysTick CTRL: ENABLE Mask

Definition at line 569 of file core_cm3.h.

#define SysTick_CTRL_ENABLE_Pos 0

SysTick CTRL: ENABLE Position

Definition at line 568 of file core_cm3.h.

#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos)

SysTick CTRL: TICKINT Mask

Definition at line 566 of file core_cm3.h.

#define SysTick_CTRL_TICKINT_Pos 1

SysTick CTRL: TICKINT Position

Definition at line 565 of file core_cm3.h.

#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos)

SysTick LOAD: RELOAD Mask

Definition at line 573 of file core_cm3.h.

#define SysTick_LOAD_RELOAD_Pos 0

SysTick LOAD: RELOAD Position

Definition at line 572 of file core_cm3.h.

#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)

SysTick VAL: CURRENT Mask

Definition at line 577 of file core_cm3.h.

#define SysTick_VAL_CURRENT_Pos 0

SysTick VAL: CURRENT Position

Definition at line 576 of file core_cm3.h.

Generated on Mon Nov 28 2011 11:15:26 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS ITM

Data Structures | Defines
CMSIS ITM
CMSIS Core Register

Data Structures

struct | ITM_Type
Structure type to access the Instrumentation Trace Macrocell Register (ITM). More...

Defines

#define | ITM_TPR_PRIVMASK_Pos 0
#define | ITM_TPR_PRIVMASK_Msk (0xFUL << ITM_TPR_PRIVMASK_Pos)
#define | ITM_TCR_BUSY_Pos 23
#define | ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos)
#define | ITM_TCR_TraceBusID_Pos 16
#define | ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos)
#define | ITM_TCR_GTSFREQ_Pos 10
#define | ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos)
#define | ITM_TCR_TSPrescale_Pos 8
#define | ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos)
#define | ITM_TCR_SWOENA_Pos 4
#define | ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos)
#define | ITM_TCR_TXENA_Pos 3
#define | ITM_TCR_TXENA_Msk (1UL << ITM_TCR_TXENA_Pos)
#define | ITM_TCR_SYNCENA_Pos 2
#define | ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos)
#define | ITM_TCR_TSENA_Pos 1
#define | ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos)
#define | ITM_TCR_ITMENA_Pos 0
#define | ITM_TCR_ITMENA_Msk (1UL << ITM_TCR_ITMENA_Pos)

Detailed Description

Type definitions for the Cortex-M Instrumentation Trace Macrocell (ITM)

Define Documentation

#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos)

ITM TCR: BUSY Mask

Definition at line 622 of file core_cm3.h.

#define ITM_TCR_BUSY_Pos 23

ITM TCR: BUSY Position

Definition at line 621 of file core_cm3.h.

#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos)

ITM TCR: Global timestamp frequency Mask

Definition at line 628 of file core_cm3.h.

#define ITM_TCR_GTSFREQ_Pos 10

ITM TCR: Global timestamp frequency Position

Definition at line 627 of file core_cm3.h.

#define ITM_TCR_ITMENA_Msk (1UL << ITM_TCR_ITMENA_Pos)

ITM TCR: ITM Enable bit Mask

Definition at line 646 of file core_cm3.h.

#define ITM_TCR_ITMENA_Pos 0

ITM TCR: ITM Enable bit Position

Definition at line 645 of file core_cm3.h.

#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos)

ITM TCR: SWOENA Mask

Definition at line 634 of file core_cm3.h.

#define ITM_TCR_SWOENA_Pos 4

ITM TCR: SWOENA Position

Definition at line 633 of file core_cm3.h.

#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos)

ITM TCR: SYNCENA Mask

Definition at line 640 of file core_cm3.h.

#define ITM_TCR_SYNCENA_Pos 2

ITM TCR: SYNCENA Position

Definition at line 639 of file core_cm3.h.

#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos)

ITM TCR: ATBID Mask

Definition at line 625 of file core_cm3.h.

#define ITM_TCR_TraceBusID_Pos 16

ITM TCR: ATBID Position

Definition at line 624 of file core_cm3.h.

#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos)

ITM TCR: TSENA Mask

Definition at line 643 of file core_cm3.h.

#define ITM_TCR_TSENA_Pos 1

ITM TCR: TSENA Position

Definition at line 642 of file core_cm3.h.

#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos)

ITM TCR: TSPrescale Mask

Definition at line 631 of file core_cm3.h.

#define ITM_TCR_TSPrescale_Pos 8

ITM TCR: TSPrescale Position

Definition at line 630 of file core_cm3.h.

#define ITM_TCR_TXENA_Msk (1UL << ITM_TCR_TXENA_Pos)

ITM TCR: TXENA Mask

Definition at line 637 of file core_cm3.h.

#define ITM_TCR_TXENA_Pos 3

ITM TCR: TXENA Position

Definition at line 636 of file core_cm3.h.

#define ITM_TPR_PRIVMASK_Msk (0xFUL << ITM_TPR_PRIVMASK_Pos)

ITM TPR: PRIVMASK Mask

Definition at line 618 of file core_cm3.h.

#define ITM_TPR_PRIVMASK_Pos 0

ITM TPR: PRIVMASK Position

Definition at line 617 of file core_cm3.h.

Generated on Mon Nov 28 2011 11:15:26 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core Debug

Data Structures | Defines
CMSIS Core Debug
CMSIS Core Register

Data Structures

struct | CoreDebug_Type
Structure type to access the Core Debug Register (CoreDebug). More...

Defines

#define | CoreDebug_DHCSR_DBGKEY_Pos 16
#define | CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)
#define | CoreDebug_DHCSR_S_RESET_ST_Pos 25
#define | CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)
#define | CoreDebug_DHCSR_S_RETIRE_ST_Pos 24
#define | CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)
#define | CoreDebug_DHCSR_S_LOCKUP_Pos 19
#define | CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)
#define | CoreDebug_DHCSR_S_SLEEP_Pos 18
#define | CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)
#define | CoreDebug_DHCSR_S_HALT_Pos 17
#define | CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos)
#define | CoreDebug_DHCSR_S_REGRDY_Pos 16
#define | CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)
#define | CoreDebug_DHCSR_C_SNAPSTALL_Pos 5
#define | CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)
#define | CoreDebug_DHCSR_C_MASKINTS_Pos 3
#define | CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)
#define | CoreDebug_DHCSR_C_STEP_Pos 2
#define | CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos)
#define | CoreDebug_DHCSR_C_HALT_Pos 1
#define | CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos)
#define | CoreDebug_DHCSR_C_DEBUGEN_Pos 0
#define | CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos)
#define | CoreDebug_DCRSR_REGWnR_Pos 16
#define | CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos)
#define | CoreDebug_DCRSR_REGSEL_Pos 0
#define | CoreDebug_DCRSR_REGSEL_Msk (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos)
#define | CoreDebug_DEMCR_TRCENA_Pos 24
#define | CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos)
#define | CoreDebug_DEMCR_MON_REQ_Pos 19
#define | CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos)
#define | CoreDebug_DEMCR_MON_STEP_Pos 18
#define | CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos)
#define | CoreDebug_DEMCR_MON_PEND_Pos 17
#define | CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos)
#define | CoreDebug_DEMCR_MON_EN_Pos 16
#define | CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos)
#define | CoreDebug_DEMCR_VC_HARDERR_Pos 10
#define | CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)
#define | CoreDebug_DEMCR_VC_INTERR_Pos 9
#define | CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)
#define | CoreDebug_DEMCR_VC_BUSERR_Pos 8
#define | CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)
#define | CoreDebug_DEMCR_VC_STATERR_Pos 7
#define | CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)
#define | CoreDebug_DEMCR_VC_CHKERR_Pos 6
#define | CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)
#define | CoreDebug_DEMCR_VC_NOCPERR_Pos 5
#define | CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)
#define | CoreDebug_DEMCR_VC_MMERR_Pos 4
#define | CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)
#define | CoreDebug_DEMCR_VC_CORERESET_Pos 0
#define | CoreDebug_DEMCR_VC_CORERESET_Msk (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos)

Detailed Description

Type definitions for the Cortex-M Core Debug Registers

Define Documentation

#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos)

CoreDebug DCRSR: REGSEL Mask

Definition at line 784 of file core_cm3.h.

#define CoreDebug_DCRSR_REGSEL_Pos 0

CoreDebug DCRSR: REGSEL Position

Definition at line 783 of file core_cm3.h.

#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos)

CoreDebug DCRSR: REGWnR Mask

Definition at line 781 of file core_cm3.h.

#define CoreDebug_DCRSR_REGWnR_Pos 16

CoreDebug DCRSR: REGWnR Position

Definition at line 780 of file core_cm3.h.

#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos)

CoreDebug DEMCR: MON_EN Mask

Definition at line 800 of file core_cm3.h.

#define CoreDebug_DEMCR_MON_EN_Pos 16

CoreDebug DEMCR: MON_EN Position

Definition at line 799 of file core_cm3.h.

#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos)

CoreDebug DEMCR: MON_PEND Mask

Definition at line 797 of file core_cm3.h.

#define CoreDebug_DEMCR_MON_PEND_Pos 17

CoreDebug DEMCR: MON_PEND Position

Definition at line 796 of file core_cm3.h.

#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos)

CoreDebug DEMCR: MON_REQ Mask

Definition at line 791 of file core_cm3.h.

#define CoreDebug_DEMCR_MON_REQ_Pos 19

CoreDebug DEMCR: MON_REQ Position

Definition at line 790 of file core_cm3.h.

#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos)

CoreDebug DEMCR: MON_STEP Mask

Definition at line 794 of file core_cm3.h.

#define CoreDebug_DEMCR_MON_STEP_Pos 18

CoreDebug DEMCR: MON_STEP Position

Definition at line 793 of file core_cm3.h.

#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos)

CoreDebug DEMCR: TRCENA Mask

Definition at line 788 of file core_cm3.h.

#define CoreDebug_DEMCR_TRCENA_Pos 24

CoreDebug DEMCR: TRCENA Position

Definition at line 787 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)

CoreDebug DEMCR: VC_BUSERR Mask

Definition at line 809 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_BUSERR_Pos 8

CoreDebug DEMCR: VC_BUSERR Position

Definition at line 808 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)

CoreDebug DEMCR: VC_CHKERR Mask

Definition at line 815 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_CHKERR_Pos 6

CoreDebug DEMCR: VC_CHKERR Position

Definition at line 814 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos)

CoreDebug DEMCR: VC_CORERESET Mask

Definition at line 824 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_CORERESET_Pos 0

CoreDebug DEMCR: VC_CORERESET Position

Definition at line 823 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)

CoreDebug DEMCR: VC_HARDERR Mask

Definition at line 803 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_HARDERR_Pos 10

CoreDebug DEMCR: VC_HARDERR Position

Definition at line 802 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)

CoreDebug DEMCR: VC_INTERR Mask

Definition at line 806 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_INTERR_Pos 9

CoreDebug DEMCR: VC_INTERR Position

Definition at line 805 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)

CoreDebug DEMCR: VC_MMERR Mask

Definition at line 821 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_MMERR_Pos 4

CoreDebug DEMCR: VC_MMERR Position

Definition at line 820 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)

CoreDebug DEMCR: VC_NOCPERR Mask

Definition at line 818 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5

CoreDebug DEMCR: VC_NOCPERR Position

Definition at line 817 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)

CoreDebug DEMCR: VC_STATERR Mask

Definition at line 812 of file core_cm3.h.

#define CoreDebug_DEMCR_VC_STATERR_Pos 7

CoreDebug DEMCR: VC_STATERR Position

Definition at line 811 of file core_cm3.h.

#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos)

CoreDebug DHCSR: C_DEBUGEN Mask

Definition at line 777 of file core_cm3.h.

#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0

CoreDebug DHCSR: C_DEBUGEN Position

Definition at line 776 of file core_cm3.h.

#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos)

CoreDebug DHCSR: C_HALT Mask

Definition at line 774 of file core_cm3.h.

#define CoreDebug_DHCSR_C_HALT_Pos 1

CoreDebug DHCSR: C_HALT Position

Definition at line 773 of file core_cm3.h.

#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)

CoreDebug DHCSR: C_MASKINTS Mask

Definition at line 768 of file core_cm3.h.

#define CoreDebug_DHCSR_C_MASKINTS_Pos 3

CoreDebug DHCSR: C_MASKINTS Position

Definition at line 767 of file core_cm3.h.

#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)

CoreDebug DHCSR: C_SNAPSTALL Mask

Definition at line 765 of file core_cm3.h.

#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5

CoreDebug DHCSR: C_SNAPSTALL Position

Definition at line 764 of file core_cm3.h.

#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos)

CoreDebug DHCSR: C_STEP Mask

Definition at line 771 of file core_cm3.h.

#define CoreDebug_DHCSR_C_STEP_Pos 2

CoreDebug DHCSR: C_STEP Position

Definition at line 770 of file core_cm3.h.

#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)

CoreDebug DHCSR: DBGKEY Mask

Definition at line 744 of file core_cm3.h.

#define CoreDebug_DHCSR_DBGKEY_Pos 16

CoreDebug DHCSR: DBGKEY Position

Definition at line 743 of file core_cm3.h.

#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos)

CoreDebug DHCSR: S_HALT Mask

Definition at line 759 of file core_cm3.h.

#define CoreDebug_DHCSR_S_HALT_Pos 17

CoreDebug DHCSR: S_HALT Position

Definition at line 758 of file core_cm3.h.

#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)

CoreDebug DHCSR: S_LOCKUP Mask

Definition at line 753 of file core_cm3.h.

#define CoreDebug_DHCSR_S_LOCKUP_Pos 19

CoreDebug DHCSR: S_LOCKUP Position

Definition at line 752 of file core_cm3.h.

#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)

CoreDebug DHCSR: S_REGRDY Mask

Definition at line 762 of file core_cm3.h.

#define CoreDebug_DHCSR_S_REGRDY_Pos 16

CoreDebug DHCSR: S_REGRDY Position

Definition at line 761 of file core_cm3.h.

#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)

CoreDebug DHCSR: S_RESET_ST Mask

Definition at line 747 of file core_cm3.h.

#define CoreDebug_DHCSR_S_RESET_ST_Pos 25

CoreDebug DHCSR: S_RESET_ST Position

Definition at line 746 of file core_cm3.h.

#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)

CoreDebug DHCSR: S_RETIRE_ST Mask

Definition at line 750 of file core_cm3.h.

#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24

CoreDebug DHCSR: S_RETIRE_ST Position

Definition at line 749 of file core_cm3.h.

#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)

CoreDebug DHCSR: S_SLEEP Mask

Definition at line 756 of file core_cm3.h.

#define CoreDebug_DHCSR_S_SLEEP_Pos 18

CoreDebug DHCSR: S_SLEEP Position

Definition at line 755 of file core_cm3.h.

Generated on Mon Nov 28 2011 11:15:26 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core Function Interface

Modules
CMSIS Core Function Interface
CMSIS Core

Modules

CMSIS Core NVIC Functions
CMSIS Core SysTick Functions
CMSIS Core Debug Functions
CMSIS Core Register Access Functions

Detailed Description

Core Function Interface contains:

  • Core NVIC Functions
  • Core SysTick Functions
  • Core Debug Functions
  • Core Register Access Functions
Generated on Mon Nov 28 2011 11:15:26 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core NVIC Functions

CMSIS Core NVIC Functions
CMSIS Core Function Interface
Generated on Mon Nov 28 2011 11:15:26 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core SysTick Functions

CMSIS Core SysTick Functions
CMSIS Core Function Interface
Generated on Mon Nov 28 2011 11:15:26 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core Debug Functions

Defines | Variables
CMSIS Core Debug Functions
CMSIS Core Function Interface

Defines

#define | ITM_RXBUFFER_EMPTY 0x5AA55AA5

Variables

volatile int32_t | ITM_RxBuffer

Define Documentation

#define ITM_RXBUFFER_EMPTY 0x5AA55AA5

value identifying ITM_RxBuffer is ready for next character

Definition at line 1156 of file core_cm3.h.

Variable Documentation

volatile int32_t ITM_RxBuffer

external variable to receive characters

Generated on Mon Nov 28 2011 11:15:26 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core Register Access Functions

CMSIS Core Register Access Functions
CMSIS Core Function Interface
Generated on Mon Nov 28 2011 11:15:26 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CMSIS Core Instruction Interface

CMSIS Core Instruction Interface
CMSIS Core

Access to dedicated instructions

Generated on Mon Nov 28 2011 11:15:26 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC17xx System

Data Structures | Modules | Defines | Typedefs | Enumerations | Functions | Variables
LPC17xx System

Data Structures

struct | LPC_SC_TypeDef
System Control (SC) register structure definition. More...
struct | LPC_PINCON_TypeDef
Pin Connect Block (PINCON) register structure definition. More...
struct | LPC_GPIO_TypeDef
General Purpose Input/Output (GPIO) register structure definition. More...
struct | LPC_GPIOINT_TypeDef
General Purpose Input/Output interrupt (GPIOINT) register structure definition. More...
struct | LPC_TIM_TypeDef
Timer (TIM) register structure definition. More...
struct | LPC_PWM_TypeDef
Pulse-Width Modulation (PWM) register structure definition. More...
struct | LPC_UART_TypeDef
Universal Asynchronous Receiver Transmitter (UART) register structure definition. More...
struct | LPC_UART0_TypeDef
Universal Asynchronous Receiver Transmitter 0 (UART0) register structure definition. More...
struct | LPC_UART1_TypeDef
Universal Asynchronous Receiver Transmitter 1 (UART1) register structure definition. More...
struct | LPC_SPI_TypeDef
Serial Peripheral Interface (SPI) register structure definition. More...
struct | LPC_SSP_TypeDef
Synchronous Serial Communication (SSP) register structure definition. More...
struct | LPC_I2C_TypeDef
Inter-Integrated Circuit (I2C) register structure definition. More...
struct | LPC_I2S_TypeDef
Inter IC Sound (I2S) register structure definition. More...
struct | LPC_RIT_TypeDef
Repetitive Interrupt Timer (RIT) register structure definition. More...
struct | LPC_RTC_TypeDef
Real-Time Clock (RTC) register structure definition. More...
struct | LPC_WDT_TypeDef
Watchdog Timer (WDT) register structure definition. More...
struct | LPC_ADC_TypeDef
Analog-to-Digital Converter (ADC) register structure definition. More...
struct | LPC_DAC_TypeDef
Digital-to-Analog Converter (DAC) register structure definition. More...
struct | LPC_MCPWM_TypeDef
Motor Control Pulse-Width Modulation (MCPWM) register structure definition. More...
struct | LPC_QEI_TypeDef
Quadrature Encoder Interface (QEI) register structure definition. More...
struct | LPC_CANAF_RAM_TypeDef
Controller Area Network Acceptance Filter RAM (CANAF_RAM)structure definition. More...
struct | LPC_CANAF_TypeDef
Controller Area Network Acceptance Filter(CANAF) register structure definition. More...
struct | LPC_CANCR_TypeDef
Controller Area Network Central (CANCR) register structure definition. More...
struct | LPC_CAN_TypeDef
Controller Area Network Controller (CAN) register structure definition. More...
struct | LPC_GPDMA_TypeDef
General Purpose Direct Memory Access (GPDMA) register structure definition. More...
struct | LPC_GPDMACH_TypeDef
General Purpose Direct Memory Access Channel (GPDMACH) register structure definition. More...
struct | LPC_USB_TypeDef
Universal Serial Bus (USB) register structure definition. More...
struct | LPC_EMAC_TypeDef
Ethernet Media Access Controller (EMAC) register structure definition. More...

Modules

LPC17xx System Defines
LPC17xx System Public Variables
LPC17xx System Public Functions

Defines

#define | __MPU_PRESENT 1
#define | __NVIC_PRIO_BITS 5
#define | __Vendor_SysTickConfig 0
#define | LPC_FLASH_BASE (0x00000000UL)
#define | LPC_RAM_BASE (0x10000000UL)
#define | LPC_AHBRAM0_BASE (0x2007C000UL)
#define | LPC_AHBRAM1_BASE (0x20080000UL)
#define | LPC_GPIO_BASE (0x2009C000UL)
#define | LPC_APB0_BASE (0x40000000UL)
#define | LPC_APB1_BASE (0x40080000UL)
#define | LPC_AHB_BASE (0x50000000UL)
#define | LPC_CM3_BASE (0xE0000000UL)
#define | LPC_WDT_BASE (LPC_APB0_BASE + 0x00000)
#define | LPC_TIM0_BASE (LPC_APB0_BASE + 0x04000)
#define | LPC_TIM1_BASE (LPC_APB0_BASE + 0x08000)
#define | LPC_UART0_BASE (LPC_APB0_BASE + 0x0C000)
#define | LPC_UART1_BASE (LPC_APB0_BASE + 0x10000)
#define | LPC_PWM1_BASE (LPC_APB0_BASE + 0x18000)
#define | LPC_I2C0_BASE (LPC_APB0_BASE + 0x1C000)
#define | LPC_SPI_BASE (LPC_APB0_BASE + 0x20000)
#define | LPC_RTC_BASE (LPC_APB0_BASE + 0x24000)
#define | LPC_GPIOINT_BASE (LPC_APB0_BASE + 0x28080)
#define | LPC_PINCON_BASE (LPC_APB0_BASE + 0x2C000)
#define | LPC_SSP1_BASE (LPC_APB0_BASE + 0x30000)
#define | LPC_ADC_BASE (LPC_APB0_BASE + 0x34000)
#define | LPC_CANAF_RAM_BASE (LPC_APB0_BASE + 0x38000)
#define | LPC_CANAF_BASE (LPC_APB0_BASE + 0x3C000)
#define | LPC_CANCR_BASE (LPC_APB0_BASE + 0x40000)
#define | LPC_CAN1_BASE (LPC_APB0_BASE + 0x44000)
#define | LPC_CAN2_BASE (LPC_APB0_BASE + 0x48000)
#define | LPC_I2C1_BASE (LPC_APB0_BASE + 0x5C000)
#define | LPC_SSP0_BASE (LPC_APB1_BASE + 0x08000)
#define | LPC_DAC_BASE (LPC_APB1_BASE + 0x0C000)
#define | LPC_TIM2_BASE (LPC_APB1_BASE + 0x10000)
#define | LPC_TIM3_BASE (LPC_APB1_BASE + 0x14000)
#define | LPC_UART2_BASE (LPC_APB1_BASE + 0x18000)
#define | LPC_UART3_BASE (LPC_APB1_BASE + 0x1C000)
#define | LPC_I2C2_BASE (LPC_APB1_BASE + 0x20000)
#define | LPC_I2S_BASE (LPC_APB1_BASE + 0x28000)
#define | LPC_RIT_BASE (LPC_APB1_BASE + 0x30000)
#define | LPC_MCPWM_BASE (LPC_APB1_BASE + 0x38000)
#define | LPC_QEI_BASE (LPC_APB1_BASE + 0x3C000)
#define | LPC_SC_BASE (LPC_APB1_BASE + 0x7C000)
#define | LPC_EMAC_BASE (LPC_AHB_BASE + 0x00000)
#define | LPC_GPDMA_BASE (LPC_AHB_BASE + 0x04000)
#define | LPC_GPDMACH0_BASE (LPC_AHB_BASE + 0x04100)
#define | LPC_GPDMACH1_BASE (LPC_AHB_BASE + 0x04120)
#define | LPC_GPDMACH2_BASE (LPC_AHB_BASE + 0x04140)
#define | LPC_GPDMACH3_BASE (LPC_AHB_BASE + 0x04160)
#define | LPC_GPDMACH4_BASE (LPC_AHB_BASE + 0x04180)
#define | LPC_GPDMACH5_BASE (LPC_AHB_BASE + 0x041A0)
#define | LPC_GPDMACH6_BASE (LPC_AHB_BASE + 0x041C0)
#define | LPC_GPDMACH7_BASE (LPC_AHB_BASE + 0x041E0)
#define | LPC_USB_BASE (LPC_AHB_BASE + 0x0C000)
#define | LPC_GPIO0_BASE (LPC_GPIO_BASE + 0x00000)
#define | LPC_GPIO1_BASE (LPC_GPIO_BASE + 0x00020)
#define | LPC_GPIO2_BASE (LPC_GPIO_BASE + 0x00040)
#define | LPC_GPIO3_BASE (LPC_GPIO_BASE + 0x00060)
#define | LPC_GPIO4_BASE (LPC_GPIO_BASE + 0x00080)
#define | LPC_SC ((LPC_SC_TypeDef *) LPC_SC_BASE )
#define | LPC_GPIO0 ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE )
#define | LPC_GPIO1 ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE )
#define | LPC_GPIO2 ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE )
#define | LPC_GPIO3 ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE )
#define | LPC_GPIO4 ((LPC_GPIO_TypeDef *) LPC_GPIO4_BASE )
#define | LPC_WDT ((LPC_WDT_TypeDef *) LPC_WDT_BASE )
#define | LPC_TIM0 ((LPC_TIM_TypeDef *) LPC_TIM0_BASE )
#define | LPC_TIM1 ((LPC_TIM_TypeDef *) LPC_TIM1_BASE )
#define | LPC_TIM2 ((LPC_TIM_TypeDef *) LPC_TIM2_BASE )
#define | LPC_TIM3 ((LPC_TIM_TypeDef *) LPC_TIM3_BASE )
#define | LPC_RIT ((LPC_RIT_TypeDef *) LPC_RIT_BASE )
#define | LPC_UART0 ((LPC_UART_TypeDef *) LPC_UART0_BASE )
#define | LPC_UART1 ((LPC_UART1_TypeDef *) LPC_UART1_BASE )
#define | LPC_UART2 ((LPC_UART_TypeDef *) LPC_UART2_BASE )
#define | LPC_UART3 ((LPC_UART_TypeDef *) LPC_UART3_BASE )
#define | LPC_PWM1 ((LPC_PWM_TypeDef *) LPC_PWM1_BASE )
#define | LPC_I2C0 ((LPC_I2C_TypeDef *) LPC_I2C0_BASE )
#define | LPC_I2C1 ((LPC_I2C_TypeDef *) LPC_I2C1_BASE )
#define | LPC_I2C2 ((LPC_I2C_TypeDef *) LPC_I2C2_BASE )
#define | LPC_I2S ((LPC_I2S_TypeDef *) LPC_I2S_BASE )
#define | LPC_SPI ((LPC_SPI_TypeDef *) LPC_SPI_BASE )
#define | LPC_RTC ((LPC_RTC_TypeDef *) LPC_RTC_BASE )
#define | LPC_GPIOINT ((LPC_GPIOINT_TypeDef *) LPC_GPIOINT_BASE )
#define | LPC_PINCON ((LPC_PINCON_TypeDef *) LPC_PINCON_BASE )
#define | LPC_SSP0 ((LPC_SSP_TypeDef *) LPC_SSP0_BASE )
#define | LPC_SSP1 ((LPC_SSP_TypeDef *) LPC_SSP1_BASE )
#define | LPC_ADC ((LPC_ADC_TypeDef *) LPC_ADC_BASE )
#define | LPC_DAC ((LPC_DAC_TypeDef *) LPC_DAC_BASE )
#define | LPC_CANAF_RAM ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE)
#define | LPC_CANAF ((LPC_CANAF_TypeDef *) LPC_CANAF_BASE )
#define | LPC_CANCR ((LPC_CANCR_TypeDef *) LPC_CANCR_BASE )
#define | LPC_CAN1 ((LPC_CAN_TypeDef *) LPC_CAN1_BASE )
#define | LPC_CAN2 ((LPC_CAN_TypeDef *) LPC_CAN2_BASE )
#define | LPC_MCPWM ((LPC_MCPWM_TypeDef *) LPC_MCPWM_BASE )
#define | LPC_QEI ((LPC_QEI_TypeDef *) LPC_QEI_BASE )
#define | LPC_EMAC ((LPC_EMAC_TypeDef *) LPC_EMAC_BASE )
#define | LPC_GPDMA ((LPC_GPDMA_TypeDef *) LPC_GPDMA_BASE )
#define | LPC_GPDMACH0 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH0_BASE )
#define | LPC_GPDMACH1 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH1_BASE )
#define | LPC_GPDMACH2 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH2_BASE )
#define | LPC_GPDMACH3 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH3_BASE )
#define | LPC_GPDMACH4 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH4_BASE )
#define | LPC_GPDMACH5 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH5_BASE )
#define | LPC_GPDMACH6 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH6_BASE )
#define | LPC_GPDMACH7 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH7_BASE )
#define | LPC_USB ((LPC_USB_TypeDef *) LPC_USB_BASE )

Typedefs

typedef enum IRQn | IRQn_Type
IRQ interrupt source definition.

Enumerations

enum IRQn {
NonMaskableInt_IRQn = -14, MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10,
SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1,
WDT_IRQn = 0, TIMER0_IRQn = 1, TIMER1_IRQn = 2, TIMER2_IRQn = 3,
TIMER3_IRQn = 4, UART0_IRQn = 5, UART1_IRQn = 6, UART2_IRQn = 7,
UART3_IRQn = 8, PWM1_IRQn = 9, I2C0_IRQn = 10, I2C1_IRQn = 11,
I2C2_IRQn = 12, SPI_IRQn = 13, SSP0_IRQn = 14, SSP1_IRQn = 15,
PLL0_IRQn = 16, RTC_IRQn = 17, EINT0_IRQn = 18, EINT1_IRQn = 19,
EINT2_IRQn = 20, EINT3_IRQn = 21, ADC_IRQn = 22, BOD_IRQn = 23,
USB_IRQn = 24, CAN_IRQn = 25, DMA_IRQn = 26, I2S_IRQn = 27,
ENET_IRQn = 28, RIT_IRQn = 29, MCPWM_IRQn = 30, QEI_IRQn = 31,
PLL1_IRQn = 32, USBActivity_IRQn = 33, CANActivity_IRQn = 34
}
IRQ interrupt source definition. More...

Functions

void | SystemInit (void)
Setup the microcontroller system. Initialize the System and update the SystemCoreClock variable.
void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.

Variables

uint32_t | SystemCoreClock

Define Documentation

#define __MPU_PRESENT 1

MPU present or not

Definition at line 98 of file LPC17xx.h.

#define __NVIC_PRIO_BITS 5

Number of Bits used for Priority Levels

Definition at line 99 of file LPC17xx.h.

#define __Vendor_SysTickConfig 0

Set to 1 if different SysTick Config is used

Definition at line 100 of file LPC17xx.h.

#define LPC_ADC ((LPC_ADC_TypeDef *) LPC_ADC_BASE )

Definition at line 1053 of file LPC17xx.h.

#define LPC_ADC_BASE (LPC_APB0_BASE + 0x34000)

Definition at line 981 of file LPC17xx.h.

#define LPC_AHB_BASE (0x50000000UL)

Definition at line 965 of file LPC17xx.h.

#define LPC_AHBRAM0_BASE (0x2007C000UL)

Definition at line 959 of file LPC17xx.h.

#define LPC_AHBRAM1_BASE (0x20080000UL)

Definition at line 960 of file LPC17xx.h.

#define LPC_APB0_BASE (0x40000000UL)

Definition at line 963 of file LPC17xx.h.

#define LPC_APB1_BASE (0x40080000UL)

Definition at line 964 of file LPC17xx.h.

#define LPC_CAN1 ((LPC_CAN_TypeDef *) LPC_CAN1_BASE )

Definition at line 1058 of file LPC17xx.h.

#define LPC_CAN1_BASE (LPC_APB0_BASE + 0x44000)

Definition at line 985 of file LPC17xx.h.

#define LPC_CAN2 ((LPC_CAN_TypeDef *) LPC_CAN2_BASE )

Definition at line 1059 of file LPC17xx.h.

#define LPC_CAN2_BASE (LPC_APB0_BASE + 0x48000)

Definition at line 986 of file LPC17xx.h.

#define LPC_CANAF ((LPC_CANAF_TypeDef *) LPC_CANAF_BASE )

Definition at line 1056 of file LPC17xx.h.

#define LPC_CANAF_BASE (LPC_APB0_BASE + 0x3C000)

Definition at line 983 of file LPC17xx.h.

#define LPC_CANAF_RAM ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE)

Definition at line 1055 of file LPC17xx.h.

#define LPC_CANAF_RAM_BASE (LPC_APB0_BASE + 0x38000)

Definition at line 982 of file LPC17xx.h.

#define LPC_CANCR ((LPC_CANCR_TypeDef *) LPC_CANCR_BASE )

Definition at line 1057 of file LPC17xx.h.

#define LPC_CANCR_BASE (LPC_APB0_BASE + 0x40000)

Definition at line 984 of file LPC17xx.h.

#define LPC_CM3_BASE (0xE0000000UL)

Definition at line 966 of file LPC17xx.h.

#define LPC_DAC ((LPC_DAC_TypeDef *) LPC_DAC_BASE )

Definition at line 1054 of file LPC17xx.h.

#define LPC_DAC_BASE (LPC_APB1_BASE + 0x0C000)

Definition at line 991 of file LPC17xx.h.

#define LPC_EMAC ((LPC_EMAC_TypeDef *) LPC_EMAC_BASE )

Definition at line 1062 of file LPC17xx.h.

#define LPC_EMAC_BASE (LPC_AHB_BASE + 0x00000)

Definition at line 1004 of file LPC17xx.h.

#define LPC_FLASH_BASE (0x00000000UL)

Definition at line 953 of file LPC17xx.h.

#define LPC_GPDMA ((LPC_GPDMA_TypeDef *) LPC_GPDMA_BASE )

Definition at line 1063 of file LPC17xx.h.

#define LPC_GPDMA_BASE (LPC_AHB_BASE + 0x04000)

Definition at line 1005 of file LPC17xx.h.

#define LPC_GPDMACH0 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH0_BASE )

Definition at line 1064 of file LPC17xx.h.

#define LPC_GPDMACH0_BASE (LPC_AHB_BASE + 0x04100)

Definition at line 1006 of file LPC17xx.h.

#define LPC_GPDMACH1 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH1_BASE )

Definition at line 1065 of file LPC17xx.h.

#define LPC_GPDMACH1_BASE (LPC_AHB_BASE + 0x04120)

Definition at line 1007 of file LPC17xx.h.

#define LPC_GPDMACH2 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH2_BASE )

Definition at line 1066 of file LPC17xx.h.

#define LPC_GPDMACH2_BASE (LPC_AHB_BASE + 0x04140)

Definition at line 1008 of file LPC17xx.h.

#define LPC_GPDMACH3 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH3_BASE )

Definition at line 1067 of file LPC17xx.h.

#define LPC_GPDMACH3_BASE (LPC_AHB_BASE + 0x04160)

Definition at line 1009 of file LPC17xx.h.

#define LPC_GPDMACH4 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH4_BASE )

Definition at line 1068 of file LPC17xx.h.

#define LPC_GPDMACH4_BASE (LPC_AHB_BASE + 0x04180)

Definition at line 1010 of file LPC17xx.h.

#define LPC_GPDMACH5 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH5_BASE )

Definition at line 1069 of file LPC17xx.h.

#define LPC_GPDMACH5_BASE (LPC_AHB_BASE + 0x041A0)

Definition at line 1011 of file LPC17xx.h.

#define LPC_GPDMACH6 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH6_BASE )

Definition at line 1070 of file LPC17xx.h.

#define LPC_GPDMACH6_BASE (LPC_AHB_BASE + 0x041C0)

Definition at line 1012 of file LPC17xx.h.

#define LPC_GPDMACH7 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH7_BASE )

Definition at line 1071 of file LPC17xx.h.

#define LPC_GPDMACH7_BASE (LPC_AHB_BASE + 0x041E0)

Definition at line 1013 of file LPC17xx.h.

#define LPC_GPIO0 ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE )

Definition at line 1027 of file LPC17xx.h.

#define LPC_GPIO0_BASE (LPC_GPIO_BASE + 0x00000)

Definition at line 1017 of file LPC17xx.h.

#define LPC_GPIO1 ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE )

Definition at line 1028 of file LPC17xx.h.

#define LPC_GPIO1_BASE (LPC_GPIO_BASE + 0x00020)

Definition at line 1018 of file LPC17xx.h.

#define LPC_GPIO2 ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE )

Definition at line 1029 of file LPC17xx.h.

#define LPC_GPIO2_BASE (LPC_GPIO_BASE + 0x00040)

Definition at line 1019 of file LPC17xx.h.

#define LPC_GPIO3 ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE )

Definition at line 1030 of file LPC17xx.h.

#define LPC_GPIO3_BASE (LPC_GPIO_BASE + 0x00060)

Definition at line 1020 of file LPC17xx.h.

#define LPC_GPIO4 ((LPC_GPIO_TypeDef *) LPC_GPIO4_BASE )

Definition at line 1031 of file LPC17xx.h.

#define LPC_GPIO4_BASE (LPC_GPIO_BASE + 0x00080)

Definition at line 1021 of file LPC17xx.h.

#define LPC_GPIO_BASE (0x2009C000UL)

Definition at line 962 of file LPC17xx.h.

#define LPC_GPIOINT ((LPC_GPIOINT_TypeDef *) LPC_GPIOINT_BASE )

Definition at line 1049 of file LPC17xx.h.

#define LPC_GPIOINT_BASE (LPC_APB0_BASE + 0x28080)

Definition at line 978 of file LPC17xx.h.

#define LPC_I2C0 ((LPC_I2C_TypeDef *) LPC_I2C0_BASE )

Definition at line 1043 of file LPC17xx.h.

#define LPC_I2C0_BASE (LPC_APB0_BASE + 0x1C000)

Definition at line 975 of file LPC17xx.h.

#define LPC_I2C1 ((LPC_I2C_TypeDef *) LPC_I2C1_BASE )

Definition at line 1044 of file LPC17xx.h.

#define LPC_I2C1_BASE (LPC_APB0_BASE + 0x5C000)

Definition at line 987 of file LPC17xx.h.

#define LPC_I2C2 ((LPC_I2C_TypeDef *) LPC_I2C2_BASE )

Definition at line 1045 of file LPC17xx.h.

#define LPC_I2C2_BASE (LPC_APB1_BASE + 0x20000)

Definition at line 996 of file LPC17xx.h.

#define LPC_I2S ((LPC_I2S_TypeDef *) LPC_I2S_BASE )

Definition at line 1046 of file LPC17xx.h.

#define LPC_I2S_BASE (LPC_APB1_BASE + 0x28000)

Definition at line 997 of file LPC17xx.h.

#define LPC_MCPWM ((LPC_MCPWM_TypeDef *) LPC_MCPWM_BASE )

Definition at line 1060 of file LPC17xx.h.

#define LPC_MCPWM_BASE (LPC_APB1_BASE + 0x38000)

Definition at line 999 of file LPC17xx.h.

#define LPC_PINCON ((LPC_PINCON_TypeDef *) LPC_PINCON_BASE )

Definition at line 1050 of file LPC17xx.h.

#define LPC_PINCON_BASE (LPC_APB0_BASE + 0x2C000)

Definition at line 979 of file LPC17xx.h.

#define LPC_PWM1 ((LPC_PWM_TypeDef *) LPC_PWM1_BASE )

Definition at line 1042 of file LPC17xx.h.

#define LPC_PWM1_BASE (LPC_APB0_BASE + 0x18000)

Definition at line 974 of file LPC17xx.h.

#define LPC_QEI ((LPC_QEI_TypeDef *) LPC_QEI_BASE )

Definition at line 1061 of file LPC17xx.h.

#define LPC_QEI_BASE (LPC_APB1_BASE + 0x3C000)

Definition at line 1000 of file LPC17xx.h.

#define LPC_RAM_BASE (0x10000000UL)

Definition at line 954 of file LPC17xx.h.

#define LPC_RIT ((LPC_RIT_TypeDef *) LPC_RIT_BASE )

Definition at line 1037 of file LPC17xx.h.

#define LPC_RIT_BASE (LPC_APB1_BASE + 0x30000)

Definition at line 998 of file LPC17xx.h.

#define LPC_RTC ((LPC_RTC_TypeDef *) LPC_RTC_BASE )

Definition at line 1048 of file LPC17xx.h.

#define LPC_RTC_BASE (LPC_APB0_BASE + 0x24000)

Definition at line 977 of file LPC17xx.h.

#define LPC_SC ((LPC_SC_TypeDef *) LPC_SC_BASE )

Definition at line 1026 of file LPC17xx.h.

#define LPC_SC_BASE (LPC_APB1_BASE + 0x7C000)

Definition at line 1001 of file LPC17xx.h.

#define LPC_SPI ((LPC_SPI_TypeDef *) LPC_SPI_BASE )

Definition at line 1047 of file LPC17xx.h.

#define LPC_SPI_BASE (LPC_APB0_BASE + 0x20000)

Definition at line 976 of file LPC17xx.h.

#define LPC_SSP0 ((LPC_SSP_TypeDef *) LPC_SSP0_BASE )

Definition at line 1051 of file LPC17xx.h.

#define LPC_SSP0_BASE (LPC_APB1_BASE + 0x08000)

Definition at line 990 of file LPC17xx.h.

#define LPC_SSP1 ((LPC_SSP_TypeDef *) LPC_SSP1_BASE )

Definition at line 1052 of file LPC17xx.h.

#define LPC_SSP1_BASE (LPC_APB0_BASE + 0x30000)

Definition at line 980 of file LPC17xx.h.

#define LPC_TIM0 ((LPC_TIM_TypeDef *) LPC_TIM0_BASE )

Definition at line 1033 of file LPC17xx.h.

#define LPC_TIM0_BASE (LPC_APB0_BASE + 0x04000)

Definition at line 970 of file LPC17xx.h.

#define LPC_TIM1 ((LPC_TIM_TypeDef *) LPC_TIM1_BASE )

Definition at line 1034 of file LPC17xx.h.

#define LPC_TIM1_BASE (LPC_APB0_BASE + 0x08000)

Definition at line 971 of file LPC17xx.h.

#define LPC_TIM2 ((LPC_TIM_TypeDef *) LPC_TIM2_BASE )

Definition at line 1035 of file LPC17xx.h.

#define LPC_TIM2_BASE (LPC_APB1_BASE + 0x10000)

Definition at line 992 of file LPC17xx.h.

#define LPC_TIM3 ((LPC_TIM_TypeDef *) LPC_TIM3_BASE )

Definition at line 1036 of file LPC17xx.h.

#define LPC_TIM3_BASE (LPC_APB1_BASE + 0x14000)

Definition at line 993 of file LPC17xx.h.

#define LPC_UART0 ((LPC_UART_TypeDef *) LPC_UART0_BASE )

Definition at line 1038 of file LPC17xx.h.

#define LPC_UART0_BASE (LPC_APB0_BASE + 0x0C000)

Definition at line 972 of file LPC17xx.h.

#define LPC_UART1 ((LPC_UART1_TypeDef *) LPC_UART1_BASE )

Definition at line 1039 of file LPC17xx.h.

#define LPC_UART1_BASE (LPC_APB0_BASE + 0x10000)

Definition at line 973 of file LPC17xx.h.

#define LPC_UART2 ((LPC_UART_TypeDef *) LPC_UART2_BASE )

Definition at line 1040 of file LPC17xx.h.

#define LPC_UART2_BASE (LPC_APB1_BASE + 0x18000)

Definition at line 994 of file LPC17xx.h.

#define LPC_UART3 ((LPC_UART_TypeDef *) LPC_UART3_BASE )

Definition at line 1041 of file LPC17xx.h.

#define LPC_UART3_BASE (LPC_APB1_BASE + 0x1C000)

Definition at line 995 of file LPC17xx.h.

#define LPC_USB ((LPC_USB_TypeDef *) LPC_USB_BASE )

Definition at line 1072 of file LPC17xx.h.

#define LPC_USB_BASE (LPC_AHB_BASE + 0x0C000)

Definition at line 1014 of file LPC17xx.h.

#define LPC_WDT ((LPC_WDT_TypeDef *) LPC_WDT_BASE )

Definition at line 1032 of file LPC17xx.h.

#define LPC_WDT_BASE (LPC_APB0_BASE + 0x00000)

Definition at line 969 of file LPC17xx.h.

Typedef Documentation

typedef enum IRQn IRQn_Type

IRQ interrupt source definition.

Enumeration Type Documentation

enum IRQn

IRQ interrupt source definition.

Enumerator:
NonMaskableInt_IRQn

2 Non Maskable Interrupt

MemoryManagement_IRQn

4 Cortex-M3 Memory Management Interrupt

BusFault_IRQn

5 Cortex-M3 Bus Fault Interrupt

UsageFault_IRQn

6 Cortex-M3 Usage Fault Interrupt

SVCall_IRQn

11 Cortex-M3 SV Call Interrupt

DebugMonitor_IRQn

12 Cortex-M3 Debug Monitor Interrupt

PendSV_IRQn

14 Cortex-M3 Pend SV Interrupt

SysTick_IRQn

15 Cortex-M3 System Tick Interrupt

WDT_IRQn

Watchdog Timer Interrupt

TIMER0_IRQn

Timer0 Interrupt

TIMER1_IRQn

Timer1 Interrupt

TIMER2_IRQn

Timer2 Interrupt

TIMER3_IRQn

Timer3 Interrupt

UART0_IRQn

UART0 Interrupt

UART1_IRQn

UART1 Interrupt

UART2_IRQn

UART2 Interrupt

UART3_IRQn

UART3 Interrupt

PWM1_IRQn

PWM1 Interrupt

I2C0_IRQn

I2C0 Interrupt

I2C1_IRQn

I2C1 Interrupt

I2C2_IRQn

I2C2 Interrupt

SPI_IRQn

SPI Interrupt

SSP0_IRQn

SSP0 Interrupt

SSP1_IRQn

SSP1 Interrupt

PLL0_IRQn

PLL0 Lock (Main PLL) Interrupt

RTC_IRQn

Real Time Clock Interrupt

EINT0_IRQn

External Interrupt 0 Interrupt

EINT1_IRQn

External Interrupt 1 Interrupt

EINT2_IRQn

External Interrupt 2 Interrupt

EINT3_IRQn

External Interrupt 3 Interrupt

ADC_IRQn

A/D Converter Interrupt

BOD_IRQn

Brown-Out Detect Interrupt

USB_IRQn

USB Interrupt

CAN_IRQn

CAN Interrupt

DMA_IRQn

General Purpose DMA Interrupt

I2S_IRQn

I2S Interrupt

ENET_IRQn

Ethernet Interrupt

RIT_IRQn

Repetitive Interrupt Timer Interrupt

MCPWM_IRQn

Motor Control PWM Interrupt

QEI_IRQn

Quadrature Encoder Interface Interrupt

PLL1_IRQn

PLL1 Lock (USB PLL) Interrupt

USBActivity_IRQn

USB Activity Interrupt

CANActivity_IRQn

CAN Activity Interrupt

Definition at line 40 of file LPC17xx.h.

Function Documentation

void SystemCoreClockUpdate ( void )

Updates the SystemCoreClock with current core Clock retrieved from cpu registers.

Update SystemCoreClock variable

Parameters:
none
Returns:
none

Definition at line 45 of file system_ARMCM0.c.

void SystemInit ( void )

Setup the microcontroller system. Initialize the System and update the SystemCoreClock variable.

Initialize the system

Parameters:
none
Returns:
none

Setup the microcontroller system. Initialize the System and update the SystemCoreClock variable.

Initialize the system

Parameters:
none
Returns:
none

Definition at line 59 of file system_ARMCM0.c.

Variable Documentation

uint32_t SystemCoreClock

System Clock Frequency (Core Clock)

Definition at line 39 of file system_ARMCM0.c.

Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC17xx System Defines

Defines
LPC17xx System Defines
LPC17xx System

Defines

#define | CLOCK_SETUP 1
#define | SCS_Val 0x00000020
#define | CLKSRCSEL_Val 0x00000001
#define | PLL0_SETUP 1
#define | PLL0CFG_Val 0x00050063
#define | PLL1_SETUP 1
#define | PLL1CFG_Val 0x00000023
#define | CCLKCFG_Val 0x00000003
#define | USBCLKCFG_Val 0x00000000
#define | PCLKSEL0_Val 0x00000000
#define | PCLKSEL1_Val 0x00000000
#define | PCONP_Val 0x042887DE
#define | CLKOUTCFG_Val 0x00000000
#define | FLASH_SETUP 1
#define | FLASHCFG_Val 0x0000303A
#define | CHECK_RANGE(val, min, max) ((val < min) || (val > max))
#define | CHECK_RSVD(val, mask) (val & mask)
#define | XTAL (12000000UL)
#define | OSC_CLK ( XTAL)
#define | RTC_CLK ( 32768UL)
#define | IRC_OSC ( 4000000UL)
#define | __M (((PLL0CFG_Val ) & 0x7FFF) + 1)
#define | __N (((PLL0CFG_Val >> 16) & 0x00FF) + 1)
#define | __FCCO(__F_IN) ((2 * __M * __F_IN) / __N)
#define | __CCLK_DIV (((CCLKCFG_Val ) & 0x00FF) + 1)
#define | __CORE_CLK (__FCCO(OSC_CLK) / __CCLK_DIV)

Define Documentation

#define __CCLK_DIV (((CCLKCFG_Val ) & 0x00FF) + 1)

Definition at line 400 of file system_LPC17xx.c.

#define __CORE_CLK (__FCCO(OSC_CLK) / __CCLK_DIV)

Definition at line 405 of file system_LPC17xx.c.

#define __FCCO ( __F_IN ) ((2 * __M * __F_IN) / __N)

Definition at line 399 of file system_LPC17xx.c.

#define __M (((PLL0CFG_Val ) & 0x7FFF) + 1)

Definition at line 397 of file system_LPC17xx.c.

#define __N (((PLL0CFG_Val >> 16) & 0x00FF) + 1)

Definition at line 398 of file system_LPC17xx.c.

#define CCLKCFG_Val 0x00000003

Definition at line 302 of file system_LPC17xx.c.

#define CHECK_RANGE | ( | val,
 |  | min,
 |  | max
 | ) | ((val < min) || (val > max))

Definition at line 333 of file system_LPC17xx.c.

#define CHECK_RSVD | ( | val,
 |  | mask
 | ) | (val & mask)

Definition at line 334 of file system_LPC17xx.c.

#define CLKOUTCFG_Val 0x00000000

Definition at line 307 of file system_LPC17xx.c.

#define CLKSRCSEL_Val 0x00000001

Definition at line 297 of file system_LPC17xx.c.

#define CLOCK_SETUP 1

Definition at line 295 of file system_LPC17xx.c.

#define FLASH_SETUP 1

Definition at line 323 of file system_LPC17xx.c.

#define FLASHCFG_Val 0x0000303A

Definition at line 324 of file system_LPC17xx.c.

#define IRC_OSC ( 4000000UL)

Definition at line 393 of file system_LPC17xx.c.

#define OSC_CLK ( XTAL)

Definition at line 391 of file system_LPC17xx.c.

#define PCLKSEL0_Val 0x00000000

Definition at line 304 of file system_LPC17xx.c.

#define PCLKSEL1_Val 0x00000000

Definition at line 305 of file system_LPC17xx.c.

#define PCONP_Val 0x042887DE

Definition at line 306 of file system_LPC17xx.c.

#define PLL0_SETUP 1

Definition at line 298 of file system_LPC17xx.c.

#define PLL0CFG_Val 0x00050063

Definition at line 299 of file system_LPC17xx.c.

#define PLL1_SETUP 1

Definition at line 300 of file system_LPC17xx.c.

#define PLL1CFG_Val 0x00000023

Definition at line 301 of file system_LPC17xx.c.

#define RTC_CLK ( 32768UL)

Definition at line 392 of file system_LPC17xx.c.

#define SCS_Val 0x00000020

Definition at line 296 of file system_LPC17xx.c.

#define USBCLKCFG_Val 0x00000000

Definition at line 303 of file system_LPC17xx.c.

#define XTAL (12000000UL)

Definition at line 390 of file system_LPC17xx.c.

Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC17xx System Public Variables

Variables
LPC17xx System Public Variables
LPC17xx System

Variables

uint32_t SystemCoreClock = __CORE_CLK

Variable Documentation

uint32_t SystemCoreClock = __CORE_CLK

System Clock Frequency (Core Clock)

Definition at line 432 of file system_LPC17xx.c.

Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC17xx System Public Functions

Functions
LPC17xx System Public Functions
LPC17xx System

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Function Documentation

void SystemCoreClockUpdate ( void )

Updates the SystemCoreClock with current core Clock retrieved from cpu registers.

Update SystemCoreClock variable

Parameters:
none
Returns:
none

Definition at line 448 of file system_LPC17xx.c.

void SystemInit ( void )

Setup the microcontroller system. Initialize the System.

Setup the microcontroller system. Initialize the System and update the SystemCoreClock variable.

Initialize the system

Parameters:
none
Returns:
none

Definition at line 499 of file system_LPC17xx.c.

Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC1700CMSIS Firmware Library

Modules
LPC1700CMSIS Firmware Library

Modules

ADC (Analog-to-Digital Converter)
CAN (Control Area Network)
CLKPWR (Clock Power)
DAC (Digital-to-Analog Controller)
EMAC (Ethernet Media Access Controller)
EXTI (External Interrupt)
GPDMA (General Purpose Direct Memory Access)
GPIO (General Purpose Input/Output)
I2C (Inter-IC Control bus)
I2S (Inter-IC Sound bus)
LIBCFG_DEFAULT (Default Library Configuration)
MCPWM (Motor Control PWM)
NVIC (Nested Vectored Interrupt Controller)
PINSEL (Pin Selection)
PWM (Pulse Width Modulator)
QEI (Quadrature Encoder Interface)
RIT (Repetitive Interrupt Timer)
RTC (Real Time Clock)
SPI (Serial Peripheral Interface)
SSP (Synchronous Serial Port)
SYSTICK (System Tick)
TIM (Timer)
UART (Universal Asynchronous Receiver/Transmitter)
WDT (Watch-Dog Timer)
LPC_Types
Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: ADC (Analog-to-Digital Converter)

Modules
ADC (Analog-to-Digital Converter)
LPC1700CMSIS Firmware Library

Modules

ADC Private Macros
ADC Public Types
ADC Public Functions
Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: ADC Private Macros

Defines
ADC Private Macros
ADC (Analog-to-Digital Converter)

Defines

#define | ADC_CR_CH_SEL(n) ((1UL << n))
#define | ADC_CR_CLKDIV(n) ((n<<8))
#define | ADC_CR_BURST ((1UL<<16))
#define | ADC_CR_PDN ((1UL<<21))
#define | ADC_CR_START_MASK ((7UL<<24))
#define | ADC_CR_START_MODE_SEL(SEL) ((SEL<<24))
#define | ADC_CR_START_NOW ((1UL<<24))
#define | ADC_CR_START_EINT0 ((2UL<<24))
#define | ADC_CR_START_CAP01 ((3UL<<24))
#define | ADC_CR_START_MAT01 ((4UL<<24))
#define | ADC_CR_START_MAT03 ((5UL<<24))
#define | ADC_CR_START_MAT10 ((6UL<<24))
#define | ADC_CR_START_MAT11 ((7UL<<24))
#define | ADC_CR_EDGE ((1UL<<27))
#define | ADC_GDR_RESULT(n) (((n>>4)&0xFFF))
#define | ADC_GDR_CH(n) (((n>>24)&0x7))
#define | ADC_GDR_OVERRUN_FLAG ((1UL<<30))
#define | ADC_GDR_DONE_FLAG ((1UL<<31))
#define | ADC_GDR_CH_MASK ((7UL<<24))
#define | ADC_INTEN_CH(n) ((1UL<<n))
#define | ADC_INTEN_GLOBAL ((1UL<<8))
#define | ADC_DR_RESULT(n) (((n>>4)&0xFFF))
#define | ADC_DR_OVERRUN_FLAG ((1UL<<30))
#define | ADC_DR_DONE_FLAG ((1UL<<31))
#define | ADC_STAT_CH_DONE_FLAG(n) ((n&0xFF))
#define | ADC_STAT_CH_OVERRUN_FLAG(n) (((n>>8)&0xFF))
#define | ADC_STAT_INT_FLAG ((1UL<<16))
#define | ADC_ADCOFFS(n) (((n&0xF)<<4))
#define | ADC_TRIM(n) (((n&0xF)<<8))
#define | PARAM_ADCx(n) (((uint32_t *)n)==((uint32_t *)LPC_ADC))
#define | PARAM_ADC_START_ON_EDGE_OPT(OPT) ((OPT == ADC_START_ON_RISING)||(OPT == ADC_START_ON_FALLING))
#define | PARAM_ADC_DATA_STATUS(OPT) ((OPT== ADC_DATA_BURST)||(OPT== ADC_DATA_DONE))
#define | PARAM_ADC_RATE(rate) ((rate>0)&&(rate<=200000))
#define | PARAM_ADC_CHANNEL_SELECTION(SEL)
#define | PARAM_ADC_START_OPT(OPT)
#define | PARAM_ADC_TYPE_INT_OPT(OPT)

Define Documentation

#define ADC_ADCOFFS ( n ) (((n&0xF)<<4))

Macro defines for ADC Trim register Offset trim bits for ADC operation

Definition at line 139 of file lpc17xx_adc.h.

#define ADC_CR_BURST ((1UL<<16))

Repeated conversions A/D enable bit

Definition at line 63 of file lpc17xx_adc.h.

#define ADC_CR_CH_SEL ( n ) ((1UL << n))

Macro defines for ADC control register Selects which of the AD0.0:7 pins is (are) to be sampled and converted

Definition at line 58 of file lpc17xx_adc.h.

#define ADC_CR_CLKDIV ( n ) ((n<<8))

The APB clock (PCLK) is divided by (this value plus one) to produce the clock for the A/D

Definition at line 61 of file lpc17xx_adc.h.

#define ADC_CR_EDGE ((1UL<<27))

Start conversion on a falling edge on the selected CAP/MAT signal

Definition at line 85 of file lpc17xx_adc.h.

#define ADC_CR_PDN ((1UL<<21))

ADC convert in power down mode

Definition at line 65 of file lpc17xx_adc.h.

#define ADC_CR_START_CAP01 ((3UL<<24))

Start conversion when the edge selected by bit 27 occurs on P1.27/CAP0.1

Definition at line 75 of file lpc17xx_adc.h.

#define ADC_CR_START_EINT0 ((2UL<<24))

Start conversion when the edge selected by bit 27 occurs on P2.10/EINT0

Definition at line 73 of file lpc17xx_adc.h.

#define ADC_CR_START_MASK ((7UL<<24))

Start mask bits

Definition at line 67 of file lpc17xx_adc.h.

#define ADC_CR_START_MAT01 ((4UL<<24))

Start conversion when the edge selected by bit 27 occurs on MAT0.1

Definition at line 77 of file lpc17xx_adc.h.

#define ADC_CR_START_MAT03 ((5UL<<24))

Start conversion when the edge selected by bit 27 occurs on MAT0.3

Definition at line 79 of file lpc17xx_adc.h.

#define ADC_CR_START_MAT10 ((6UL<<24))

Start conversion when the edge selected by bit 27 occurs on MAT1.0

Definition at line 81 of file lpc17xx_adc.h.

#define ADC_CR_START_MAT11 ((7UL<<24))

Start conversion when the edge selected by bit 27 occurs on MAT1.1

Definition at line 83 of file lpc17xx_adc.h.

#define ADC_CR_START_MODE_SEL ( SEL ) ((SEL<<24))

Select Start Mode

Definition at line 69 of file lpc17xx_adc.h.

#define ADC_CR_START_NOW ((1UL<<24))

Start conversion now

Definition at line 71 of file lpc17xx_adc.h.

#define ADC_DR_DONE_FLAG ((1UL<<31))

This bit is set to 1 when an A/D conversion completes. It is cleared when this register is read

Definition at line 121 of file lpc17xx_adc.h.

#define ADC_DR_OVERRUN_FLAG ((1UL<<30))

These bits mirror the OVERRRUN status flags that appear in the result register for each A/D channel

Definition at line 118 of file lpc17xx_adc.h.

#define ADC_DR_RESULT ( n ) (((n>>4)&0xFFF))

Macro defines for ADC Data register When DONE is 1, this field contains result value of ADC conversion

Definition at line 115 of file lpc17xx_adc.h.

#define ADC_GDR_CH ( n ) (((n>>24)&0x7))

These bits contain the channel from which the LS bits were converted

Definition at line 93 of file lpc17xx_adc.h.

#define ADC_GDR_CH_MASK ((7UL<<24))

This bits is used to mask for Channel

Definition at line 101 of file lpc17xx_adc.h.

#define ADC_GDR_DONE_FLAG ((1UL<<31))

This bit is set to 1 when an A/D conversion completes

Definition at line 98 of file lpc17xx_adc.h.

#define ADC_GDR_OVERRUN_FLAG ((1UL<<30))

This bit is 1 in burst mode if the results of one or more conversions was (were) lost

Definition at line 96 of file lpc17xx_adc.h.

#define ADC_GDR_RESULT ( n ) (((n>>4)&0xFFF))

Macro defines for ADC Global Data register When DONE is 1, this field contains result value of ADC conversion

Definition at line 91 of file lpc17xx_adc.h.

#define ADC_INTEN_CH ( n ) ((1UL<<n))

Macro defines for ADC Interrupt register These bits allow control over which A/D channels generate interrupts for conversion completion

Definition at line 107 of file lpc17xx_adc.h.

#define ADC_INTEN_GLOBAL ((1UL<<8))

When 1, enables the global DONE flag in ADDR to generate an interrupt

Definition at line 109 of file lpc17xx_adc.h.

#define ADC_STAT_CH_DONE_FLAG ( n ) ((n&0xFF))

Macro defines for ADC Status register These bits mirror the DONE status flags that appear in the result register for each A/D channel

Definition at line 128 of file lpc17xx_adc.h.

#define ADC_STAT_CH_OVERRUN_FLAG ( n ) (((n>>8)&0xFF))

These bits mirror the OVERRRUN status flags that appear in the result register for each A/D channel

Definition at line 131 of file lpc17xx_adc.h.

#define ADC_STAT_INT_FLAG ((1UL<<16))

This bit is the A/D interrupt flag

Definition at line 133 of file lpc17xx_adc.h.

#define ADC_TRIM ( n ) (((n&0xF)<<8))

Written to boot code

Definition at line 141 of file lpc17xx_adc.h.

#define PARAM_ADC_CHANNEL_SELECTION ( SEL )
Value:
((SEL == ADC_CHANNEL_0)||(ADC_CHANNEL_1)\
||(SEL == ADC_CHANNEL_2)|(ADC_CHANNEL_3)\
||(SEL == ADC_CHANNEL_4)||(ADC_CHANNEL_5)\
||(SEL == ADC_CHANNEL_6)||(ADC_CHANNEL_7))

Check ADC channel selection parameter

Definition at line 157 of file lpc17xx_adc.h.

#define PARAM_ADC_DATA_STATUS ( OPT ) ((OPT== ADC_DATA_BURST)||(OPT== ADC_DATA_DONE))

Check ADC state parameter

Definition at line 151 of file lpc17xx_adc.h.

#define PARAM_ADC_RATE ( rate ) ((rate>0)&&(rate<=200000))

Check ADC rate parameter

Definition at line 154 of file lpc17xx_adc.h.

#define PARAM_ADC_START_ON_EDGE_OPT ( OPT ) ((OPT == ADC_START_ON_RISING)||(OPT == ADC_START_ON_FALLING))

Check ADC state parameter

Definition at line 148 of file lpc17xx_adc.h.

#define PARAM_ADC_START_OPT ( OPT )
Value:
((OPT == ADC_START_CONTINUOUS)||(OPT == ADC_START_NOW)\
||(OPT == ADC_START_ON_EINT0)||(OPT == ADC_START_ON_CAP01)\
||(OPT == ADC_START_ON_MAT01)||(OPT == ADC_START_ON_MAT03)\
||(OPT == ADC_START_ON_MAT10)||(OPT == ADC_START_ON_MAT11))

Check ADC start option parameter

Definition at line 163 of file lpc17xx_adc.h.

#define PARAM_ADC_TYPE_INT_OPT ( OPT )
Value:
((OPT == ADC_ADINTEN0)||(OPT == ADC_ADINTEN1)\
||(OPT == ADC_ADINTEN2)||(OPT == ADC_ADINTEN3)\
||(OPT == ADC_ADINTEN4)||(OPT == ADC_ADINTEN5)\
||(OPT == ADC_ADINTEN6)||(OPT == ADC_ADINTEN7)\
||(OPT == ADC_ADGINTEN))

Check ADC interrupt type parameter

Definition at line 169 of file lpc17xx_adc.h.

#define PARAM_ADCx ( n ) (((uint32_t *)n)==((uint32_t *)LPC_ADC))

Check ADC parameter

Definition at line 145 of file lpc17xx_adc.h.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: ADC Public Types

Enumerations
ADC Public Types
ADC (Analog-to-Digital Converter)

Enumerations

enum ADC_CHANNEL_SELECTION {
ADC_CHANNEL_0 = 0, ADC_CHANNEL_1, ADC_CHANNEL_2, ADC_CHANNEL_3,
ADC_CHANNEL_4, ADC_CHANNEL_5, ADC_CHANNEL_6, ADC_CHANNEL_7
}
ADC enumeration. More...
enum ADC_START_OPT {
ADC_START_CONTINUOUS = 0, ADC_START_NOW, ADC_START_ON_EINT0, ADC_START_ON_CAP01,
ADC_START_ON_MAT01, ADC_START_ON_MAT03, ADC_START_ON_MAT10, ADC_START_ON_MAT11
}
Type of start option. More...
enum | ADC_START_ON_EDGE_OPT { ADC_START_ON_RISING = 0, ADC_START_ON_FALLING }
Type of edge when start conversion on the selected CAP/MAT signal. More...
enum ADC_TYPE_INT_OPT {
ADC_ADINTEN0 = 0, ADC_ADINTEN1, ADC_ADINTEN2, ADC_ADINTEN3,
ADC_ADINTEN4, ADC_ADINTEN5, ADC_ADINTEN6, ADC_ADINTEN7,
ADC_ADGINTEN
}
* ADC type interrupt enum More...
enum | ADC_DATA_STATUS { ADC_DATA_BURST = 0, ADC_DATA_DONE }
ADC Data status. More...

Enumeration Type Documentation

enum ADC_CHANNEL_SELECTION

ADC enumeration.

Channel Selection

Enumerator:
ADC_CHANNEL_0

Channel 0

ADC_CHANNEL_1

Channel 1

ADC_CHANNEL_2

Channel 2

ADC_CHANNEL_3

Channel 3

ADC_CHANNEL_4

Channel 4

ADC_CHANNEL_5

Channel 5

ADC_CHANNEL_6

Channel 6

ADC_CHANNEL_7

Channel 7

Definition at line 189 of file lpc17xx_adc.h.

enum ADC_DATA_STATUS

ADC Data status.

Enumerator:
ADC_DATA_BURST
ADC_DATA_DONE

Definition at line 245 of file lpc17xx_adc.h.

enum ADC_START_ON_EDGE_OPT

Type of edge when start conversion on the selected CAP/MAT signal.

Enumerator:
ADC_START_ON_RISING

Start conversion on a rising edge on the selected CAP/MAT signal

ADC_START_ON_FALLING

Start conversion on a falling edge on the selected CAP/MAT signal

Definition at line 222 of file lpc17xx_adc.h.

enum ADC_START_OPT

Type of start option.

Enumerator:
ADC_START_CONTINUOUS

Continuous mode

ADC_START_NOW

Start conversion now

ADC_START_ON_EINT0

Start conversion when the edge selected by bit 27 occurs on P2.10/EINT0

ADC_START_ON_CAP01

Start conversion when the edge selected by bit 27 occurs on P1.27/CAP0.1

ADC_START_ON_MAT01

Start conversion when the edge selected by bit 27 occurs on MAT0.1

ADC_START_ON_MAT03

Start conversion when the edge selected by bit 27 occurs on MAT0.3

ADC_START_ON_MAT10

Start conversion when the edge selected by bit 27 occurs on MAT1.0

ADC_START_ON_MAT11

Start conversion when the edge selected by bit 27 occurs on MAT1.1

Definition at line 202 of file lpc17xx_adc.h.

enum ADC_TYPE_INT_OPT

* ADC type interrupt enum

Enumerator:
ADC_ADINTEN0

Interrupt channel 0

ADC_ADINTEN1

Interrupt channel 1

ADC_ADINTEN2

Interrupt channel 2

ADC_ADINTEN3

Interrupt channel 3

ADC_ADINTEN4

Interrupt channel 4

ADC_ADINTEN5

Interrupt channel 5

ADC_ADINTEN6

Interrupt channel 6

ADC_ADINTEN7

Interrupt channel 7

ADC_ADGINTEN

Individual channel/global flag done generate an interrupt

Definition at line 231 of file lpc17xx_adc.h.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: ADC Public Functions

Functions
ADC Public Functions
ADC (Analog-to-Digital Converter)

Functions

void | ADC_Init (LPC_ADC_TypeDef *ADCx, uint32_t rate)
Initial for ADC + Set bit PCADC + Set clock for ADC + Set Clock Frequency.
void | ADC_DeInit (LPC_ADC_TypeDef *ADCx)
Close ADC.
void | ADC_BurstCmd (LPC_ADC_TypeDef *ADCx, FunctionalState NewState)
ADC Burst mode setting.
void | ADC_PowerdownCmd (LPC_ADC_TypeDef *ADCx, FunctionalState NewState)
Set AD conversion in power mode.
void | ADC_StartCmd (LPC_ADC_TypeDef *ADCx, uint8_t start_mode)
Set start mode for ADC.
void | ADC_ChannelCmd (LPC_ADC_TypeDef *ADCx, uint8_t Channel, FunctionalState NewState)
Enable/Disable ADC channel number.
void | ADC_EdgeStartConfig (LPC_ADC_TypeDef *ADCx, uint8_t EdgeOption)
Set Edge start configuration.
void | ADC_IntConfig (LPC_ADC_TypeDef *ADCx, ADC_TYPE_INT_OPT IntType, FunctionalState NewState)
ADC interrupt configuration.
uint16_t | ADC_ChannelGetData (LPC_ADC_TypeDef *ADCx, uint8_t channel)
Get ADC result.
FlagStatus | ADC_ChannelGetStatus (LPC_ADC_TypeDef *ADCx, uint8_t channel, uint32_t StatusType)
Get ADC Chanel status from ADC data register.
uint32_t | ADC_GlobalGetData (LPC_ADC_TypeDef *ADCx)
Get ADC Data from AD Global register.
FlagStatus | ADC_GlobalGetStatus (LPC_ADC_TypeDef *ADCx, uint32_t StatusType)
Get ADC Chanel status from AD global data register.
uint32_t | ADC_GetData (uint32_t channel)
Get Result conversion from A/D data register.

Function Documentation

void ADC_BurstCmd | ( | LPC_ADC_TypeDef * | ADCx,
 |  | FunctionalState | NewState
 | ) |  |

ADC Burst mode setting.

Parameters:
[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC
[in] NewState
  • 1: Set Burst mode
  • 0: reset Burst mode
Returns:
None

Definition at line 156 of file lpc17xx_adc.c.

void ADC_ChannelCmd | ( | LPC_ADC_TypeDef * | ADCx,
 |  | uint8_t | Channel,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable ADC channel number.

Parameters:
[in] | ADCx | pointer to LPC_ADC_TypeDef, should be: LPC_ADC
[in] | Channel | channel number
[in] | NewState | Enable or Disable
Returns:
None

Definition at line 236 of file lpc17xx_adc.c.

uint16_t ADC_ChannelGetData | ( | LPC_ADC_TypeDef * | ADCx,
 |  | uint8_t | channel
 | ) |  |

Get ADC result.

Parameters:
[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC
[in] channel,: channel number, should be 0...7
Returns:
Data conversion

Definition at line 254 of file lpc17xx_adc.c.

FlagStatus ADC_ChannelGetStatus | ( | LPC_ADC_TypeDef * | ADCx,
 |  | uint8_t | channel,
 |  | uint32_t | StatusType
 | ) |  |

Get ADC Chanel status from ADC data register.

Parameters:
[in] | ADCx | pointer to LPC_ADC_TypeDef, should be: LPC_ADC
[in] channel,: channel number, should be 0..7
[in] | StatusType | 0:Burst status 1:Done status
Returns:
SET / RESET

Definition at line 274 of file lpc17xx_adc.c.

void ADC_DeInit ( LPC_ADC_TypeDef * ADCx )

Close ADC.

Parameters:
[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC
Returns:
None

Definition at line 97 of file lpc17xx_adc.c.

void ADC_EdgeStartConfig | ( | LPC_ADC_TypeDef * | ADCx,
 |  | uint8_t | EdgeOption
 | ) |  |

Set Edge start configuration.

Parameters:
[in] | ADCx | pointer to LPC_ADC_TypeDef, should be: LPC_ADC
[in] | EdgeOption | is ADC_START_ON_RISING and ADC_START_ON_FALLING 0:ADC_START_ON_RISING 1:ADC_START_ON_FALLING
Returns:
None

Definition at line 192 of file lpc17xx_adc.c.

uint32_t ADC_GetData ( uint32_t channel )

Get Result conversion from A/D data register.

Parameters:
[in] channel number which want to read back the result
Returns:
Result of conversion

Definition at line 113 of file lpc17xx_adc.c.

uint32_t ADC_GlobalGetData ( LPC_ADC_TypeDef * ADCx )

Get ADC Data from AD Global register.

Parameters:
[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC
Returns:
Result of conversion

Definition at line 301 of file lpc17xx_adc.c.

FlagStatus ADC_GlobalGetStatus | ( | LPC_ADC_TypeDef * | ADCx,
 |  | uint32_t | StatusType
 | ) |  |

Get ADC Chanel status from AD global data register.

Parameters:
[in] | ADCx | pointer to LPC_ADC_TypeDef, should be: LPC_ADC
[in] | StatusType | 0:Burst status 1:Done status
Returns:
SET / RESET

Definition at line 316 of file lpc17xx_adc.c.

void ADC_Init | ( | LPC_ADC_TypeDef * | ADCx,
 |  | uint32_t | rate
 | ) |  |

Initial for ADC + Set bit PCADC + Set clock for ADC + Set Clock Frequency.

Parameters:
[in] | ADCx | pointer to LPC_ADC_TypeDef, should be: LPC_ADC
[in] | rate | ADC conversion rate, should be <=200KHz
Returns:
None

Definition at line 62 of file lpc17xx_adc.c.

void ADC_IntConfig | ( | LPC_ADC_TypeDef * | ADCx,
 |  | ADC_TYPE_INT_OPT | IntType,
 |  | FunctionalState | NewState
 | ) |  |

ADC interrupt configuration.

Parameters:
[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC
[in] IntType,: type of interrupt, should be:
  • ADC_ADINTEN0: Interrupt channel 0
  • ADC_ADINTEN1: Interrupt channel 1 ...
  • ADC_ADINTEN7: Interrupt channel 7
  • ADC_ADGINTEN: Individual channel/global flag done generate an interrupt
[in] NewState,:
  • SET : enable ADC interrupt
  • RESET: disable ADC interrupt
Returns:
None

Definition at line 217 of file lpc17xx_adc.c.

void ADC_PowerdownCmd | ( | LPC_ADC_TypeDef * | ADCx,
 |  | FunctionalState | NewState
 | ) |  |

Set AD conversion in power mode.

Parameters:
[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC
[in] NewState
  • 1: AD converter is optional
  • 0: AD Converter is in power down mode
Returns:
None

Definition at line 174 of file lpc17xx_adc.c.

void ADC_StartCmd | ( | LPC_ADC_TypeDef * | ADCx,
 |  | uint8_t | start_mode
 | ) |  |

Set start mode for ADC.

Parameters:
[in] ADCx pointer to LPC_ADC_TypeDef, should be: LPC_ADC
[in] start_mode Start mode choose one of modes in 'ADC_START_OPT' enumeration type definition, should be:
  • ADC_START_CONTINUOUS
  • ADC_START_NOW
  • ADC_START_ON_EINT0
  • ADC_START_ON_CAP01
  • ADC_START_ON_MAT01
  • ADC_START_ON_MAT03
  • ADC_START_ON_MAT10
  • ADC_START_ON_MAT11
Returns:
None

Definition at line 138 of file lpc17xx_adc.c.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN (Control Area Network)

Modules
CAN (Control Area Network)
LPC1700CMSIS Firmware Library

Modules

CAN Public Macros
CAN Private Macros
CAN Public Types
CAN Public Functions
CAN Private Variables
Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN Public Macros

Defines
CAN Public Macros
CAN (Control Area Network)

Defines

#define | MSG_ENABLE ((uint8_t)(0))
#define | MSG_DISABLE ((uint8_t)(1))
#define | CAN1_CTRL ((uint8_t)(0))
#define | CAN2_CTRL ((uint8_t)(1))
#define | PARAM_FULLCAN_IC(n) ((n==FULLCAN_IC0)||(n==FULLCAN_IC1))
#define | ID_11 1
#define | MAX_HW_FULLCAN_OBJ 64
#define | MAX_SW_FULLCAN_OBJ 32

Define Documentation

#define CAN1_CTRL ((uint8_t)(0))

Definition at line 51 of file lpc17xx_can.h.

#define CAN2_CTRL ((uint8_t)(1))

Definition at line 52 of file lpc17xx_can.h.

#define ID_11 1

Definition at line 54 of file lpc17xx_can.h.

#define MAX_HW_FULLCAN_OBJ 64

Definition at line 55 of file lpc17xx_can.h.

#define MAX_SW_FULLCAN_OBJ 32

Definition at line 56 of file lpc17xx_can.h.

#define MSG_DISABLE ((uint8_t)(1))

Definition at line 50 of file lpc17xx_can.h.

#define MSG_ENABLE ((uint8_t)(0))

Definition at line 49 of file lpc17xx_can.h.

#define PARAM_FULLCAN_IC ( n ) ((n==FULLCAN_IC0)||(n==FULLCAN_IC1))

Definition at line 53 of file lpc17xx_can.h.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN Private Macros

Defines
CAN Private Macros
CAN (Control Area Network)

Defines

#define | CAN_MOD_RM ((uint32_t)(1))
#define | CAN_MOD_LOM ((uint32_t)(1<<1))
#define | CAN_MOD_STM ((uint32_t)(1<<2))
#define | CAN_MOD_TPM ((uint32_t)(1<<3))
#define | CAN_MOD_SM ((uint32_t)(1<<4))
#define | CAN_MOD_RPM ((uint32_t)(1<<5))
#define | CAN_MOD_TM ((uint32_t)(1<<7))
#define | CAN_CMR_TR ((uint32_t)(1))
#define | CAN_CMR_AT ((uint32_t)(1<<1))
#define | CAN_CMR_RRB ((uint32_t)(1<<2))
#define | CAN_CMR_CDO ((uint32_t)(1<<3))
#define | CAN_CMR_SRR ((uint32_t)(1<<4))
#define | CAN_CMR_STB1 ((uint32_t)(1<<5))
#define | CAN_CMR_STB2 ((uint32_t)(1<<6))
#define | CAN_CMR_STB3 ((uint32_t)(1<<7))
#define | CAN_GSR_RBS ((uint32_t)(1))
#define | CAN_GSR_DOS ((uint32_t)(1<<1))
#define | CAN_GSR_TBS ((uint32_t)(1<<2))
#define | CAN_GSR_TCS ((uint32_t)(1<<3))
#define | CAN_GSR_RS ((uint32_t)(1<<4))
#define | CAN_GSR_TS ((uint32_t)(1<<5))
#define | CAN_GSR_ES ((uint32_t)(1<<6))
#define | CAN_GSR_BS ((uint32_t)(1<<7))
#define | CAN_GSR_RXERR(n) ((uint32_t)((n&0xFF)<<16))
#define | CAN_GSR_TXERR(n) ((uint32_t)(n&0xFF)<<24))
#define | CAN_ICR_RI ((uint32_t)(1))
#define | CAN_ICR_TI1 ((uint32_t)(1<<1))
#define | CAN_ICR_EI ((uint32_t)(1<<2))
#define | CAN_ICR_DOI ((uint32_t)(1<<3))
#define | CAN_ICR_WUI ((uint32_t)(1<<4))
#define | CAN_ICR_EPI ((uint32_t)(1<<5))
#define | CAN_ICR_ALI ((uint32_t)(1<<6))
#define | CAN_ICR_BEI ((uint32_t)(1<<7))
#define | CAN_ICR_IDI ((uint32_t)(1<<8))
#define | CAN_ICR_TI2 ((uint32_t)(1<<9))
#define | CAN_ICR_TI3 ((uint32_t)(1<<10))
#define | CAN_ICR_ERRBIT(n) ((uint32_t)((n&0x1F)<<16))
#define | CAN_ICR_ERRDIR ((uint32_t)(1<<21))
#define | CAN_ICR_ERRC(n) ((uint32_t)((n&0x3)<<22))
#define | CAN_ICR_ALCBIT(n) ((uint32_t)((n&0xFF)<<24))
#define | CAN_IER_RIE ((uint32_t)(1))
#define | CAN_IER_TIE1 ((uint32_t)(1<<1))
#define | CAN_IER_EIE ((uint32_t)(1<<2))
#define | CAN_IER_DOIE ((uint32_t)(1<<3))
#define | CAN_IER_WUIE ((uint32_t)(1<<4))
#define | CAN_IER_EPIE ((uint32_t)(1<<5))
#define | CAN_IER_ALIE ((uint32_t)(1<<6))
#define | CAN_IER_BEIE ((uint32_t)(1<<7))
#define | CAN_IER_IDIE ((uint32_t)(1<<8))
#define | CAN_IER_TIE2 ((uint32_t)(1<<9))
#define | CAN_IER_TIE3 ((uint32_t)(1<<10))
#define | CAN_BTR_BRP(n) ((uint32_t)(n&0x3FF))
#define | CAN_BTR_SJM(n) ((uint32_t)((n&0x3)<<14))
#define | CAN_BTR_TESG1(n) ((uint32_t)(n&0xF)<<16))
#define | CAN_BTR_TESG2(n) ((uint32_t)(n&0xF)<<20))
#define | CAN_BTR_SAM(n) ((uint32_t)(1<<23))
#define | CAN_EWL_EWL(n) ((uint32_t)(n&0xFF))
#define | CAN_SR_RBS ((uint32_t)(1))
#define | CAN_SR_DOS ((uint32_t)(1<<1))
#define | CAN_SR_TBS1 ((uint32_t)(1<<2))
#define | CAN_SR_TCS1 ((uint32_t)(1<<3))
#define | CAN_SR_RS ((uint32_t)(1<<4))
#define | CAN_SR_TS1 ((uint32_t)(1<<5))
#define | CAN_SR_ES ((uint32_t)(1<<6))
#define | CAN_SR_BS ((uint32_t)(1<<7))
#define | CAN_SR_TBS2 ((uint32_t)(1<<10))
#define | CAN_SR_TCS2 ((uint32_t)(1<<11))
#define | CAN_SR_TS2 ((uint32_t)(1<<13))
#define | CAN_SR_TBS3 ((uint32_t)(1<<18))
#define | CAN_SR_TCS3 ((uint32_t)(1<<19))
#define | CAN_SR_TS3 ((uint32_t)(1<<21))
#define | CAN_RFS_ID_INDEX(n) ((uint32_t)(n&0x3FF))
#define | CAN_RFS_BP ((uint32_t)(1<<10))
#define | CAN_RFS_DLC(n) ((uint32_t)((n&0xF)<<16)
#define | CAN_RFS_RTR ((uint32_t)(1<<30))
#define | CAN_RFS_FF ((uint32_t)(1<<31))
#define | CAN_RID_ID_11(n) ((uint32_t)(n&0x7FF))
#define | CAN_RID_ID_29(n) ((uint32_t)(n&0x1FFFFFFF))
#define | CAN_RDA_DATA1(n) ((uint32_t)(n&0xFF))
#define | CAN_RDA_DATA2(n) ((uint32_t)((n&0xFF)<<8))
#define | CAN_RDA_DATA3(n) ((uint32_t)((n&0xFF)<<16))
#define | CAN_RDA_DATA4(n) ((uint32_t)((n&0xFF)<<24))
#define | CAN_RDB_DATA5(n) ((uint32_t)(n&0xFF))
#define | CAN_RDB_DATA6(n) ((uint32_t)((n&0xFF)<<8))
#define | CAN_RDB_DATA7(n) ((uint32_t)((n&0xFF)<<16))
#define | CAN_RDB_DATA8(n) ((uint32_t)((n&0xFF)<<24))
#define | CAN_TFI_PRIO(n) ((uint32_t)(n&0xFF))
#define | CAN_TFI_DLC(n) ((uint32_t)((n&0xF)<<16))
#define | CAN_TFI_RTR ((uint32_t)(1<<30))
#define | CAN_TFI_FF ((uint32_t)(1<<31))
#define | CAN_TID_ID11(n) ((uint32_t)(n&0x7FF))
#define | CAN_TID_ID29(n) ((uint32_t)(n&0x1FFFFFFF))
#define | CAN_TDA_DATA1(n) ((uint32_t)(n&0xFF))
#define | CAN_TDA_DATA2(n) ((uint32_t)((n&0xFF)<<8))
#define | CAN_TDA_DATA3(n) ((uint32_t)((n&0xFF)<<16))
#define | CAN_TDA_DATA4(n) ((uint32_t)((n&0xFF)<<24))
#define | CAN_TDA_DATA5(n) ((uint32_t)(n&0xFF))
#define | CAN_TDA_DATA6(n) ((uint32_t)((n&0xFF)<<8))
#define | CAN_TDA_DATA7(n) ((uint32_t)((n&0xFF)<<16))
#define | CAN_TDA_DATA8(n) ((uint32_t)((n&0xFF)<<24))
#define | CAN1SLEEPCLR ((uint32_t)(1<<1))
#define | CAN2SLEEPCLR ((uint32_t)(1<<2))
#define | CAN_WAKEFLAGES_CAN1WAKE ((uint32_t)(1<<1))
#define | CAN_WAKEFLAGES_CAN2WAKE ((uint32_t)(1<<2))
#define | CAN_TSR_TS1 ((uint32_t)(1))
#define | CAN_TSR_TS2 ((uint32_t)(1<<1))
#define | CAN_TSR_TBS1 ((uint32_t)(1<<8))
#define | CAN_TSR_TBS2 ((uint32_t)(1<<9))
#define | CAN_TSR_TCS1 ((uint32_t)(1<<16))
#define | CAN_TSR_TCS2 ((uint32_t)(1<<17))
#define | CAN_RSR_RS1 ((uint32_t)(1))
#define | CAN_RSR_RS2 ((uint32_t)(1<<1))
#define | CAN_RSR_RB1 ((uint32_t)(1<<8))
#define | CAN_RSR_RB2 ((uint32_t)(1<<9))
#define | CAN_RSR_DOS1 ((uint32_t)(1<<16))
#define | CAN_RSR_DOS2 ((uint32_t)(1<<17))
#define | CAN_MSR_E1 ((uint32_t)(1))
#define | CAN_MSR_E2 ((uint32_t)(1<<1))
#define | CAN_MSR_BS1 ((uint32_t)(1<<8))
#define | CAN_MSR_BS2 ((uint32_t)(1<<9))
#define | CAN_AFMR_AccOff ((uint32_t)(1))
#define | CAN_AFMR_AccBP ((uint32_t)(1<<1))
#define | CAN_AFMR_eFCAN ((uint32_t)(1<<2))
#define | CAN_STT_sa(n) ((uint32_t)((n&1FF)<<2))
#define | CAN_SFF_GRP_sa(n) ((uint32_t)((n&3FF)<<2))
#define | CAN_EFF_sa(n) ((uint32_t)((n&1FF)<<2))
#define | CAN_Eff_GRP_sa(n) ((uint32_t)((n&3FF)<<2))
#define | CAN_EndofTable(n) ((uint32_t)((n&3FF)<<2))
#define | CAN_LUTerrAd(n) ((uint32_t)((n&1FF)<<2))
#define | CAN_LUTerr ((uint32_t)(1))
#define | CAN_FCANIE ((uint32_t)(1))
#define | CAN_FCANIC0_IntPnd(n) ((uint32_t)(1<<n))
#define | CAN_FCANIC1_IntPnd(n) ((uint32_t)(1<<(n-32)))
#define | PARAM_CANx(x)
#define | PARAM_CANAFx(x) (((uint32_t*)x)== ((uint32_t*)LPC_CANAF))
#define | PARAM_CANAFRAMx(x) (((uint32_t*)x)== (uint32_t*)LPC_CANAF_RAM)
#define | PARAM_CANCRx(x) (((uint32_t*)x)==((uint32_t*)LPC_CANCR))
#define | PARAM_I2S_DATA(data) ((data>=0)&&(data <= 0xFFFFFFFF))
#define | PRAM_I2S_FREQ(freq) ((freq>=16000)&&(freq <= 96000))
#define | PARAM_ID_11(n) ((n>>11)==0)
#define | PARAM_ID_29(n) ((n>>29)==0)
#define | PARAM_DLC(n) ((n>>4)==0)
#define | PARAM_ID_FORMAT(n) ((n==STD_ID_FORMAT)||(n==EXT_ID_FORMAT))
#define | PARAM_GRP_ID(x, y) ((x<=y))
#define | PARAM_FRAME_TYPE(n) ((n==DATA_FRAME)||(n==REMOTE_FRAME))
#define | PARAM_CTRL_STS_TYPE(n)
#define | PARAM_CR_STS_TYPE(n)
#define | PARAM_AFMODE_TYPE(n)
#define | PARAM_MODE_TYPE(n)
#define | PARAM_CTRL(n) ((n==CAN1_CTRL)|(n==CAN2_CTRL))
#define | PARAM_MSG_DISABLE(n) ((n==MSG_ENABLE)|(n==MSG_DISABLE))
#define | PARAM_INT_EN_TYPE(n)
#define | PARAM_AFLUT_ENTRY_TYPE(n)
#define | PARAM_POSITION(n) (n<512)

Define Documentation

#define CAN1SLEEPCLR ((uint32_t)(1<<1))

Macro defines for CAN Sleep Clear Register CAN1 Sleep mode

Definition at line 336 of file lpc17xx_can.h.

#define CAN2SLEEPCLR ((uint32_t)(1<<2))

CAN2 Sleep Mode

Definition at line 338 of file lpc17xx_can.h.

#define CAN_AFMR_AccBP ((uint32_t)(1<<1))

CAN Acceptance File Bypass mode

Definition at line 398 of file lpc17xx_can.h.

#define CAN_AFMR_AccOff ((uint32_t)(1))

Macro defines for Acceptance Filter Mode Register CAN Acceptance Filter Off mode

Definition at line 396 of file lpc17xx_can.h.

#define CAN_AFMR_eFCAN ((uint32_t)(1<<2))

FullCAN Mode Enhancements

Definition at line 400 of file lpc17xx_can.h.

#define CAN_BTR_BRP ( n ) ((uint32_t)(n&0x3FF))

Macro defines for CAN Bus Timing Register CAN Baudrate Prescaler

Definition at line 194 of file lpc17xx_can.h.

#define CAN_BTR_SAM ( n ) ((uint32_t)(1<<23))

CAN Sampling

Definition at line 202 of file lpc17xx_can.h.

#define CAN_BTR_SJM ( n ) ((uint32_t)((n&0x3)<<14))

CAN Synchronization Jump Width

Definition at line 196 of file lpc17xx_can.h.

#define CAN_BTR_TESG1 ( n ) ((uint32_t)(n&0xF)<<16))

CAN Time Segment 1

Definition at line 198 of file lpc17xx_can.h.

#define CAN_BTR_TESG2 ( n ) ((uint32_t)(n&0xF)<<20))

CAN Time Segment 2

Definition at line 200 of file lpc17xx_can.h.

#define CAN_CMR_AT ((uint32_t)(1<<1))

CAN Abort Transmission

Definition at line 92 of file lpc17xx_can.h.

#define CAN_CMR_CDO ((uint32_t)(1<<3))

CAN Clear Data Overrun

Definition at line 96 of file lpc17xx_can.h.

#define CAN_CMR_RRB ((uint32_t)(1<<2))

CAN Release Receive Buffer

Definition at line 94 of file lpc17xx_can.h.

#define CAN_CMR_SRR ((uint32_t)(1<<4))

CAN Self Reception Request

Definition at line 98 of file lpc17xx_can.h.

#define CAN_CMR_STB1 ((uint32_t)(1<<5))

CAN Select Tx Buffer 1

Definition at line 100 of file lpc17xx_can.h.

#define CAN_CMR_STB2 ((uint32_t)(1<<6))

CAN Select Tx Buffer 2

Definition at line 102 of file lpc17xx_can.h.

#define CAN_CMR_STB3 ((uint32_t)(1<<7))

CAN Select Tx Buffer 3

Definition at line 104 of file lpc17xx_can.h.

#define CAN_CMR_TR ((uint32_t)(1))

Macro defines for CAN Command Register CAN Transmission Request

Definition at line 90 of file lpc17xx_can.h.

#define CAN_Eff_GRP_sa ( n ) ((uint32_t)((n&3FF)<<2))

Macro defines for Extended Frame Group Start Address Register The start address of the table of grouped Extended Identifier

Definition at line 424 of file lpc17xx_can.h.

#define CAN_EFF_sa ( n ) ((uint32_t)((n&1FF)<<2))

Macro defines for Extended Frame Start Address Register The start address of the table of individual Extended Identifier

Definition at line 418 of file lpc17xx_can.h.

#define CAN_EndofTable ( n ) ((uint32_t)((n&3FF)<<2))

Macro defines for End Of AF Table Register The End of Table of AF LookUp Table

Definition at line 430 of file lpc17xx_can.h.

#define CAN_EWL_EWL ( n ) ((uint32_t)(n&0xFF))

Macro defines for CAN Error Warning Limit Register CAN Error Warning Limit

Definition at line 208 of file lpc17xx_can.h.

#define CAN_FCANIC0_IntPnd ( n ) ((uint32_t)(1<<n))

Macro defines for FullCAN Interrupt and Capture Register 0 FullCAN Interrupt and Capture (0-31)

Definition at line 454 of file lpc17xx_can.h.

#define CAN_FCANIC1_IntPnd ( n ) ((uint32_t)(1<<(n-32)))

Macro defines for FullCAN Interrupt and Capture Register 1 FullCAN Interrupt and Capture (0-31)

Definition at line 460 of file lpc17xx_can.h.

#define CAN_FCANIE ((uint32_t)(1))

Macro defines for Global FullCANInterrupt Enable Register Global FullCANInterrupt Enable

Definition at line 448 of file lpc17xx_can.h.

#define CAN_GSR_BS ((uint32_t)(1<<7))

CAN Bus Status

Definition at line 124 of file lpc17xx_can.h.

#define CAN_GSR_DOS ((uint32_t)(1<<1))

CAN Data Overrun Status

Definition at line 112 of file lpc17xx_can.h.

#define CAN_GSR_ES ((uint32_t)(1<<6))

CAN Error Status

Definition at line 122 of file lpc17xx_can.h.

#define CAN_GSR_RBS ((uint32_t)(1))

Macro defines for CAN Global Status Register CAN Receive Buffer Status

Definition at line 110 of file lpc17xx_can.h.

#define CAN_GSR_RS ((uint32_t)(1<<4))

CAN Receive Status

Definition at line 118 of file lpc17xx_can.h.

#define CAN_GSR_RXERR ( n ) ((uint32_t)((n&0xFF)<<16))

CAN Current value of the Rx Error Counter

Definition at line 126 of file lpc17xx_can.h.

#define CAN_GSR_TBS ((uint32_t)(1<<2))

CAN Transmit Buffer Status

Definition at line 114 of file lpc17xx_can.h.

#define CAN_GSR_TCS ((uint32_t)(1<<3))

CAN Transmit Complete Status

Definition at line 116 of file lpc17xx_can.h.

#define CAN_GSR_TS ((uint32_t)(1<<5))

CAN Transmit Status

Definition at line 120 of file lpc17xx_can.h.

#define CAN_GSR_TXERR ( n ) ((uint32_t)(n&0xFF)<<24))

CAN Current value of the Tx Error Counter

Definition at line 128 of file lpc17xx_can.h.

#define CAN_ICR_ALCBIT ( n ) ((uint32_t)((n&0xFF)<<24))

CAN Arbitration Lost Capture

Definition at line 162 of file lpc17xx_can.h.

#define CAN_ICR_ALI ((uint32_t)(1<<6))

CAN Arbitration Lost Interrupt

Definition at line 146 of file lpc17xx_can.h.

#define CAN_ICR_BEI ((uint32_t)(1<<7))

CAN Bus Error Interrupt

Definition at line 148 of file lpc17xx_can.h.

#define CAN_ICR_DOI ((uint32_t)(1<<3))

CAN Data Overrun Interrupt

Definition at line 140 of file lpc17xx_can.h.

#define CAN_ICR_EI ((uint32_t)(1<<2))

CAN Error Warning Interrupt

Definition at line 138 of file lpc17xx_can.h.

#define CAN_ICR_EPI ((uint32_t)(1<<5))

CAN Error Passive Interrupt

Definition at line 144 of file lpc17xx_can.h.

#define CAN_ICR_ERRBIT ( n ) ((uint32_t)((n&0x1F)<<16))

CAN Error Code Capture

Definition at line 156 of file lpc17xx_can.h.

#define CAN_ICR_ERRC ( n ) ((uint32_t)((n&0x3)<<22))

CAN Error Capture

Definition at line 160 of file lpc17xx_can.h.

#define CAN_ICR_ERRDIR ((uint32_t)(1<<21))

CAN Error Direction

Definition at line 158 of file lpc17xx_can.h.

#define CAN_ICR_IDI ((uint32_t)(1<<8))

CAN ID Ready Interrupt

Definition at line 150 of file lpc17xx_can.h.

#define CAN_ICR_RI ((uint32_t)(1))

Macro defines for CAN Interrupt and Capture Register CAN Receive Interrupt

Definition at line 134 of file lpc17xx_can.h.

#define CAN_ICR_TI1 ((uint32_t)(1<<1))

CAN Transmit Interrupt 1

Definition at line 136 of file lpc17xx_can.h.

#define CAN_ICR_TI2 ((uint32_t)(1<<9))

CAN Transmit Interrupt 2

Definition at line 152 of file lpc17xx_can.h.

#define CAN_ICR_TI3 ((uint32_t)(1<<10))

CAN Transmit Interrupt 3

Definition at line 154 of file lpc17xx_can.h.

#define CAN_ICR_WUI ((uint32_t)(1<<4))

CAN Wake-Up Interrupt

Definition at line 142 of file lpc17xx_can.h.

#define CAN_IER_ALIE ((uint32_t)(1<<6))

CAN Arbitration Lost Interrupt Enable

Definition at line 180 of file lpc17xx_can.h.

#define CAN_IER_BEIE ((uint32_t)(1<<7))

CAN Bus Error Interrupt Enable

Definition at line 182 of file lpc17xx_can.h.

#define CAN_IER_DOIE ((uint32_t)(1<<3))

CAN Data Overrun Interrupt Enable

Definition at line 174 of file lpc17xx_can.h.

#define CAN_IER_EIE ((uint32_t)(1<<2))

CAN Error Warning Interrupt Enable

Definition at line 172 of file lpc17xx_can.h.

#define CAN_IER_EPIE ((uint32_t)(1<<5))

CAN Error Passive Interrupt Enable

Definition at line 178 of file lpc17xx_can.h.

#define CAN_IER_IDIE ((uint32_t)(1<<8))

CAN ID Ready Interrupt Enable

Definition at line 184 of file lpc17xx_can.h.

#define CAN_IER_RIE ((uint32_t)(1))

Macro defines for CAN Interrupt Enable Register CAN Receive Interrupt Enable

Definition at line 168 of file lpc17xx_can.h.

#define CAN_IER_TIE1 ((uint32_t)(1<<1))

CAN Transmit Interrupt Enable for buffer 1

Definition at line 170 of file lpc17xx_can.h.

#define CAN_IER_TIE2 ((uint32_t)(1<<9))

CAN Transmit Enable Interrupt for Buffer 2

Definition at line 186 of file lpc17xx_can.h.

#define CAN_IER_TIE3 ((uint32_t)(1<<10))

CAN Transmit Enable Interrupt for Buffer 3

Definition at line 188 of file lpc17xx_can.h.

#define CAN_IER_WUIE ((uint32_t)(1<<4))

CAN Wake-Up Interrupt Enable

Definition at line 176 of file lpc17xx_can.h.

#define CAN_LUTerr ((uint32_t)(1))

Macro defines for LUT Error Register CAN Look-Up Table Error

Definition at line 442 of file lpc17xx_can.h.

#define CAN_LUTerrAd ( n ) ((uint32_t)((n&1FF)<<2))

Macro defines for LUT Error Address Register CAN Look-Up Table Error Address

Definition at line 436 of file lpc17xx_can.h.

#define CAN_MOD_LOM ((uint32_t)(1<<1))

CAN Listen Only Mode

Definition at line 74 of file lpc17xx_can.h.

#define CAN_MOD_RM ((uint32_t)(1))

Macro defines for CAN Mode Register CAN Reset mode

Definition at line 72 of file lpc17xx_can.h.

#define CAN_MOD_RPM ((uint32_t)(1<<5))

CAN Receive Polarity mode

Definition at line 82 of file lpc17xx_can.h.

#define CAN_MOD_SM ((uint32_t)(1<<4))

CAN Sleep mode

Definition at line 80 of file lpc17xx_can.h.

#define CAN_MOD_STM ((uint32_t)(1<<2))

CAN Self Test mode

Definition at line 76 of file lpc17xx_can.h.

#define CAN_MOD_TM ((uint32_t)(1<<7))

CAN Test mode

Definition at line 84 of file lpc17xx_can.h.

#define CAN_MOD_TPM ((uint32_t)(1<<3))

CAN Transmit Priority mode

Definition at line 78 of file lpc17xx_can.h.

#define CAN_MSR_BS1 ((uint32_t)(1<<8))

Same CAN Bus Status in CAN1GSR

Definition at line 388 of file lpc17xx_can.h.

#define CAN_MSR_BS2 ((uint32_t)(1<<9))

Same CAN Bus Status in CAN2GSR

Definition at line 390 of file lpc17xx_can.h.

#define CAN_MSR_E1 ((uint32_t)(1))

Macro defines for Central Miscellaneous Status Register Same CAN Error Status in CAN1GSR

Definition at line 384 of file lpc17xx_can.h.

#define CAN_MSR_E2 ((uint32_t)(1<<1))

Same CAN Error Status in CAN2GSR

Definition at line 386 of file lpc17xx_can.h.

#define CAN_RDA_DATA1 ( n ) ((uint32_t)(n&0xFF))

Macro defines for CAN Receive Data A Register CAN Receive Data 1

Definition at line 268 of file lpc17xx_can.h.

#define CAN_RDA_DATA2 ( n ) ((uint32_t)((n&0xFF)<<8))

CAN Receive Data 2

Definition at line 270 of file lpc17xx_can.h.

#define CAN_RDA_DATA3 ( n ) ((uint32_t)((n&0xFF)<<16))

CAN Receive Data 3

Definition at line 272 of file lpc17xx_can.h.

#define CAN_RDA_DATA4 ( n ) ((uint32_t)((n&0xFF)<<24))

CAN Receive Data 4

Definition at line 274 of file lpc17xx_can.h.

#define CAN_RDB_DATA5 ( n ) ((uint32_t)(n&0xFF))

Macro defines for CAN Receive Data B Register CAN Receive Data 5

Definition at line 280 of file lpc17xx_can.h.

#define CAN_RDB_DATA6 ( n ) ((uint32_t)((n&0xFF)<<8))

CAN Receive Data 6

Definition at line 282 of file lpc17xx_can.h.

#define CAN_RDB_DATA7 ( n ) ((uint32_t)((n&0xFF)<<16))

CAN Receive Data 7

Definition at line 284 of file lpc17xx_can.h.

#define CAN_RDB_DATA8 ( n ) ((uint32_t)((n&0xFF)<<24))

CAN Receive Data 8

Definition at line 286 of file lpc17xx_can.h.

#define CAN_RFS_BP ((uint32_t)(1<<10))

CAN Bypass

Definition at line 248 of file lpc17xx_can.h.

#define CAN_RFS_DLC ( n ) ((uint32_t)((n&0xF)<<16)

CAN Data Length Code

Definition at line 250 of file lpc17xx_can.h.

#define CAN_RFS_FF ((uint32_t)(1<<31))

CAN control 11 bit or 29 bit Identifier

Definition at line 254 of file lpc17xx_can.h.

#define CAN_RFS_ID_INDEX ( n ) ((uint32_t)(n&0x3FF))

Macro defines for CAN Receive Frame Status Register CAN ID Index

Definition at line 246 of file lpc17xx_can.h.

#define CAN_RFS_RTR ((uint32_t)(1<<30))

CAN Remote Transmission Request

Definition at line 252 of file lpc17xx_can.h.

#define CAN_RID_ID_11 ( n ) ((uint32_t)(n&0x7FF))

Macro defines for CAN Receive Identifier Register CAN 11 bit Identifier

Definition at line 260 of file lpc17xx_can.h.

#define CAN_RID_ID_29 ( n ) ((uint32_t)(n&0x1FFFFFFF))

CAN 29 bit Identifier

Definition at line 262 of file lpc17xx_can.h.

#define CAN_RSR_DOS1 ((uint32_t)(1<<16))

CAN Data Overrun Status 1

Definition at line 376 of file lpc17xx_can.h.

#define CAN_RSR_DOS2 ((uint32_t)(1<<17))

CAN Data Overrun Status 1

Definition at line 378 of file lpc17xx_can.h.

#define CAN_RSR_RB1 ((uint32_t)(1<<8))

CAN Receive Buffer Status 1

Definition at line 372 of file lpc17xx_can.h.

#define CAN_RSR_RB2 ((uint32_t)(1<<9))

CAN Receive Buffer Status 2

Definition at line 374 of file lpc17xx_can.h.

#define CAN_RSR_RS1 ((uint32_t)(1))

Macro defines for Central Receive Status Register CAN Receive Status 1

Definition at line 368 of file lpc17xx_can.h.

#define CAN_RSR_RS2 ((uint32_t)(1<<1))

CAN Receive Status 1

Definition at line 370 of file lpc17xx_can.h.

#define CAN_SFF_GRP_sa ( n ) ((uint32_t)((n&3FF)<<2))

Macro defines for Standard Frame Group Start Address Register The start address of the table of grouped Standard Identifier

Definition at line 412 of file lpc17xx_can.h.

#define CAN_SR_BS ((uint32_t)(1<<7))

CAN Bus Status

Definition at line 228 of file lpc17xx_can.h.

#define CAN_SR_DOS ((uint32_t)(1<<1))

CAN Data Overrun Status

Definition at line 216 of file lpc17xx_can.h.

#define CAN_SR_ES ((uint32_t)(1<<6))

CAN Error Status

Definition at line 226 of file lpc17xx_can.h.

#define CAN_SR_RBS ((uint32_t)(1))

Macro defines for CAN Status Register CAN Receive Buffer Status

Definition at line 214 of file lpc17xx_can.h.

#define CAN_SR_RS ((uint32_t)(1<<4))

CAN Receive Status

Definition at line 222 of file lpc17xx_can.h.

#define CAN_SR_TBS1 ((uint32_t)(1<<2))

CAN Transmit Buffer Status 1

Definition at line 218 of file lpc17xx_can.h.

#define CAN_SR_TBS2 ((uint32_t)(1<<10))

CAN Transmit Buffer Status 2

Definition at line 230 of file lpc17xx_can.h.

#define CAN_SR_TBS3 ((uint32_t)(1<<18))

CAN Transmit Buffer Status 2

Definition at line 236 of file lpc17xx_can.h.

#define CAN_SR_TCS1 ((uint32_t)(1<<3))

CAN Transmission Complete Status of Buffer 1

Definition at line 220 of file lpc17xx_can.h.

#define CAN_SR_TCS2 ((uint32_t)(1<<11))

CAN Transmission Complete Status of Buffer 2

Definition at line 232 of file lpc17xx_can.h.

#define CAN_SR_TCS3 ((uint32_t)(1<<19))

CAN Transmission Complete Status of Buffer 2

Definition at line 238 of file lpc17xx_can.h.

#define CAN_SR_TS1 ((uint32_t)(1<<5))

CAN Transmit Status 1

Definition at line 224 of file lpc17xx_can.h.

#define CAN_SR_TS2 ((uint32_t)(1<<13))

CAN Transmit Status 2

Definition at line 234 of file lpc17xx_can.h.

#define CAN_SR_TS3 ((uint32_t)(1<<21))

CAN Transmit Status 2

Definition at line 240 of file lpc17xx_can.h.

#define CAN_STT_sa ( n ) ((uint32_t)((n&1FF)<<2))

Macro defines for Standard Frame Individual Start Address Register The start address of the table of individual Standard Identifier

Definition at line 406 of file lpc17xx_can.h.

#define CAN_TDA_DATA1 ( n ) ((uint32_t)(n&0xFF))

Macro defines for CAN Transmit Data A Register CAN Transmit Data 1

Definition at line 312 of file lpc17xx_can.h.

#define CAN_TDA_DATA2 ( n ) ((uint32_t)((n&0xFF)<<8))

CAN Transmit Data 2

Definition at line 314 of file lpc17xx_can.h.

#define CAN_TDA_DATA3 ( n ) ((uint32_t)((n&0xFF)<<16))

CAN Transmit Data 3

Definition at line 316 of file lpc17xx_can.h.

#define CAN_TDA_DATA4 ( n ) ((uint32_t)((n&0xFF)<<24))

CAN Transmit Data 4

Definition at line 318 of file lpc17xx_can.h.

#define CAN_TDA_DATA5 ( n ) ((uint32_t)(n&0xFF))

Macro defines for CAN Transmit Data B Register CAN Transmit Data 5

Definition at line 324 of file lpc17xx_can.h.

#define CAN_TDA_DATA6 ( n ) ((uint32_t)((n&0xFF)<<8))

CAN Transmit Data 6

Definition at line 326 of file lpc17xx_can.h.

#define CAN_TDA_DATA7 ( n ) ((uint32_t)((n&0xFF)<<16))

CAN Transmit Data 7

Definition at line 328 of file lpc17xx_can.h.

#define CAN_TDA_DATA8 ( n ) ((uint32_t)((n&0xFF)<<24))

CAN Transmit Data 8

Definition at line 330 of file lpc17xx_can.h.

#define CAN_TFI_DLC ( n ) ((uint32_t)((n&0xF)<<16))

CAN Data Length Code

Definition at line 294 of file lpc17xx_can.h.

#define CAN_TFI_FF ((uint32_t)(1<<31))

CAN control 11-bit or 29-bit Identifier

Definition at line 298 of file lpc17xx_can.h.

#define CAN_TFI_PRIO ( n ) ((uint32_t)(n&0xFF))

Macro defines for CAN Transmit Frame Information Register CAN Priority

Definition at line 292 of file lpc17xx_can.h.

#define CAN_TFI_RTR ((uint32_t)(1<<30))

CAN Remote Frame Transmission

Definition at line 296 of file lpc17xx_can.h.

#define CAN_TID_ID11 ( n ) ((uint32_t)(n&0x7FF))

Macro defines for CAN Transmit Identifier Register CAN 11-bit Identifier

Definition at line 304 of file lpc17xx_can.h.

#define CAN_TID_ID29 ( n ) ((uint32_t)(n&0x1FFFFFFF))

CAN 11-bit Identifier

Definition at line 306 of file lpc17xx_can.h.

#define CAN_TSR_TBS1 ((uint32_t)(1<<8))

CAN Transmit Buffer Status 1

Definition at line 356 of file lpc17xx_can.h.

#define CAN_TSR_TBS2 ((uint32_t)(1<<9))

CAN Transmit Buffer Status 2

Definition at line 358 of file lpc17xx_can.h.

#define CAN_TSR_TCS1 ((uint32_t)(1<<16))

CAN Transmission Complete Status 1

Definition at line 360 of file lpc17xx_can.h.

#define CAN_TSR_TCS2 ((uint32_t)(1<<17))

CAN Transmission Complete Status 2

Definition at line 362 of file lpc17xx_can.h.

#define CAN_TSR_TS1 ((uint32_t)(1))

Macro defines for Central transmit Status Register CAN Transmit 1

Definition at line 352 of file lpc17xx_can.h.

#define CAN_TSR_TS2 ((uint32_t)(1<<1))

CAN Transmit 2

Definition at line 354 of file lpc17xx_can.h.

#define CAN_WAKEFLAGES_CAN1WAKE ((uint32_t)(1<<1))

Macro defines for CAN Wake up Flags Register CAN1 Sleep mode

Definition at line 344 of file lpc17xx_can.h.

#define CAN_WAKEFLAGES_CAN2WAKE ((uint32_t)(1<<2))

CAN2 Sleep Mode

Definition at line 346 of file lpc17xx_can.h.

#define PARAM_AFLUT_ENTRY_TYPE ( n )
Value:
((n==FULLCAN_ENTRY)||(n==EXPLICIT_STANDARD_ENTRY)\
||(n==GROUP_STANDARD_ENTRY)||(n==EXPLICIT_EXTEND_ENTRY) \
||(n==GROUP_EXTEND_ENTRY))

Macro to check AFLUT Entry type

Definition at line 530 of file lpc17xx_can.h.

#define PARAM_AFMODE_TYPE ( n )
Value:
((n==CAN_Normal)||(n==CAN_AccOff) \
||(n==CAN_AccBP)||(n==CAN_eFCAN))

Macro to check AF Mode type parameter

Definition at line 506 of file lpc17xx_can.h.

#define PARAM_CANAFRAMx ( x ) (((uint32_t*)x)== (uint32_t*)LPC_CANAF_RAM)

Definition at line 472 of file lpc17xx_can.h.

#define PARAM_CANAFx ( x ) (((uint32_t*)x)== ((uint32_t*)LPC_CANAF))

Definition at line 469 of file lpc17xx_can.h.

#define PARAM_CANCRx ( x ) (((uint32_t*)x)==((uint32_t*)LPC_CANCR))

Definition at line 475 of file lpc17xx_can.h.

#define PARAM_CANx ( x )
Value:
((((uint32_t*)x)==((uint32_t *)LPC_CAN1)) \
||(((uint32_t*)x)==((uint32_t *)LPC_CAN2)))

Macro to determine if it is valid CAN peripheral or not

Definition at line 465 of file lpc17xx_can.h.

#define PARAM_CR_STS_TYPE ( n )
Value:
((n==CANCR_TX_STS)||(n==CANCR_RX_STS) \
||(n==CANCR_MS))

Macro to check CR status type

Definition at line 503 of file lpc17xx_can.h.

#define PARAM_CTRL ( n ) ((n==CAN1_CTRL)|(n==CAN2_CTRL))

Macro define for struct AF_Section parameter

Definition at line 516 of file lpc17xx_can.h.

#define PARAM_CTRL_STS_TYPE ( n )
Value:
((n==CANCTRL_GLOBAL_STS)||(n==CANCTRL_INT_CAP) \
||(n==CANCTRL_ERR_WRN)||(n==CANCTRL_STS))

Macro to check Control/Central Status type parameter

Definition at line 499 of file lpc17xx_can.h.

#define PARAM_DLC ( n ) ((n>>4)==0)

Macro to check DLC value

Definition at line 488 of file lpc17xx_can.h.

#define PARAM_FRAME_TYPE ( n ) ((n==DATA_FRAME)||(n==REMOTE_FRAME))

Macro to check Frame type

Definition at line 496 of file lpc17xx_can.h.

#define PARAM_GRP_ID | ( | x,
 |  | y
 | ) | ((x<=y))

Macro to check Group identifier

Definition at line 493 of file lpc17xx_can.h.

#define PARAM_I2S_DATA ( data ) ((data>=0)&&(data <= 0xFFFFFFFF))

Macro to check Data to send valid

Definition at line 478 of file lpc17xx_can.h.

#define PARAM_ID_11 ( n ) ((n>>11)==0)

Macro to check Frame Identifier

Definition at line 484 of file lpc17xx_can.h.

#define PARAM_ID_29 ( n ) ((n>>29)==0)

Definition at line 485 of file lpc17xx_can.h.

#define PARAM_ID_FORMAT ( n ) ((n==STD_ID_FORMAT)||(n==EXT_ID_FORMAT))

Macro to check ID format type

Definition at line 490 of file lpc17xx_can.h.

#define PARAM_INT_EN_TYPE ( n )
Value:
((n==CANINT_RIE)||(n==CANINT_TIE1) \
||(n==CANINT_EIE)||(n==CANINT_DOIE) \
||(n==CANINT_WUIE)||(n==CANINT_EPIE) \
||(n==CANINT_ALIE)||(n==CANINT_BEIE) \
||(n==CANINT_IDIE)||(n==CANINT_TIE2) \
||(n==CANINT_TIE3)||(n==CANINT_FCE))

Macro to check Interrupt Type parameter

Definition at line 522 of file lpc17xx_can.h.

#define PARAM_MODE_TYPE ( n )
Value:
((n==CAN_OPERATING_MODE)||(n==CAN_RESET_MODE) \
||(n==CAN_LISTENONLY_MODE)||(n==CAN_SELFTEST_MODE) \
||(n==CAN_TXPRIORITY_MODE)||(n==CAN_SLEEP_MODE) \
||(n==CAN_RXPOLARITY_MODE)||(n==CAN_TEST_MODE))

Macro to check Operation Mode

Definition at line 510 of file lpc17xx_can.h.

#define PARAM_MSG_DISABLE ( n ) ((n==MSG_ENABLE)|(n==MSG_DISABLE))

Macro define for struct AF_Section parameter

Definition at line 519 of file lpc17xx_can.h.

#define PARAM_POSITION ( n ) (n<512)

Macro to check position

Definition at line 535 of file lpc17xx_can.h.

#define PRAM_I2S_FREQ ( freq ) ((freq>=16000)&&(freq <= 96000))

Macro to check frequency value

Definition at line 481 of file lpc17xx_can.h.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN Public Types

Data Structures | Enumerations
CAN Public Types
CAN (Control Area Network)

Data Structures

struct | CAN_PinCFG_Type
Pin Configuration structure. More...
struct | CAN_MSG_Type
CAN message object structure. More...
struct | FullCAN_Entry
FullCAN Entry structure. More...
struct | SFF_Entry
Standard ID Frame Format Entry structure. More...
struct | SFF_GPR_Entry
Group of Standard ID Frame Format Entry structure. More...
struct | EFF_Entry
Extended ID Frame Format Entry structure. More...
struct | EFF_GPR_Entry
Group of Extended ID Frame Format Entry structure. More...
struct | AF_SectionDef
Acceptance Filter Section Table structure. More...

Enumerations

enum | CAN_ID_FORMAT_Type { STD_ID_FORMAT = 0, EXT_ID_FORMAT = 1 }
CAN ID format definition. More...
enum AFLUT_ENTRY_Type {
FULLCAN_ENTRY = 0, EXPLICIT_STANDARD_ENTRY, GROUP_STANDARD_ENTRY, EXPLICIT_EXTEND_ENTRY,
GROUP_EXTEND_ENTRY
}
AFLUT Entry type definition. More...
enum | CAN_FRAME_Type { DATA_FRAME = 0, REMOTE_FRAME = 1 }
Symbolic names for type of CAN message. More...
enum | CAN_CTRL_STS_Type { CANCTRL_GLOBAL_STS = 0, CANCTRL_INT_CAP, CANCTRL_ERR_WRN, CANCTRL_STS }
CAN Control status definition. More...
enum | CAN_CR_STS_Type { CANCR_TX_STS = 0, CANCR_RX_STS, CANCR_MS }
Central CAN status type definition. More...
enum | FullCAN_IC_Type { FULLCAN_IC0, FULLCAN_IC1 }
FullCAN Interrupt Capture type definition. More...
enum CAN_INT_EN_Type {
CANINT_RIE = 0, CANINT_TIE1, CANINT_EIE, CANINT_DOIE,
CANINT_WUIE, CANINT_EPIE, CANINT_ALIE, CANINT_BEIE,
CANINT_IDIE, CANINT_TIE2, CANINT_TIE3, CANINT_FCE
}
CAN interrupt enable type definition. More...
enum | CAN_AFMODE_Type { CAN_Normal = 0, CAN_AccOff, CAN_AccBP, CAN_eFCAN }
Acceptance Filter Mode type definition. More...
enum CAN_MODE_Type {
CAN_OPERATING_MODE = 0, CAN_RESET_MODE, CAN_LISTENONLY_MODE, CAN_SELFTEST_MODE,
CAN_TXPRIORITY_MODE, CAN_SLEEP_MODE, CAN_RXPOLARITY_MODE, CAN_TEST_MODE
}
CAN Mode Type definition. More...
enum CAN_ERROR {
CAN_OK = 1, CAN_OBJECTS_FULL_ERROR, CAN_FULL_OBJ_NOT_RCV, CAN_NO_RECEIVE_DATA,
CAN_AF_ENTRY_ERROR, CAN_CONFLICT_ID_ERROR, CAN_ENTRY_NOT_EXIT_ERROR
}
Error values that functions can return. More...

Enumeration Type Documentation

enum AFLUT_ENTRY_Type

AFLUT Entry type definition.

Enumerator:
FULLCAN_ENTRY
EXPLICIT_STANDARD_ENTRY
GROUP_STANDARD_ENTRY
EXPLICIT_EXTEND_ENTRY
GROUP_EXTEND_ENTRY

Definition at line 561 of file lpc17xx_can.h.

enum CAN_AFMODE_Type

Acceptance Filter Mode type definition.

Enumerator:
CAN_Normal

Normal Mode

CAN_AccOff

Acceptance Filter Off Mode

CAN_AccBP

Acceptance Fileter Bypass Mode

CAN_eFCAN

FullCAN Mode Enhancement

Definition at line 625 of file lpc17xx_can.h.

enum CAN_CR_STS_Type

Central CAN status type definition.

Enumerator:
CANCR_TX_STS

Central CAN Tx Status

CANCR_RX_STS

Central CAN Rx Status

CANCR_MS

Central CAN Miscellaneous Status

Definition at line 590 of file lpc17xx_can.h.

enum CAN_CTRL_STS_Type

CAN Control status definition.

Enumerator:
CANCTRL_GLOBAL_STS

CAN Global Status

CANCTRL_INT_CAP

CAN Interrupt and Capture

CANCTRL_ERR_WRN

CAN Error Warning Limit

CANCTRL_STS

CAN Control Status

Definition at line 580 of file lpc17xx_can.h.

enum CAN_ERROR

Error values that functions can return.

Enumerator:
CAN_OK

No error

CAN_OBJECTS_FULL_ERROR

No more rx or tx objects available

CAN_FULL_OBJ_NOT_RCV

Full CAN object not received

CAN_NO_RECEIVE_DATA

No have receive data available

CAN_AF_ENTRY_ERROR

Entry load in AFLUT is unvalid

CAN_CONFLICT_ID_ERROR

Conflict ID occur

CAN_ENTRY_NOT_EXIT_ERROR

Entry remove outo AFLUT is not exit

Definition at line 649 of file lpc17xx_can.h.

enum CAN_FRAME_Type

Symbolic names for type of CAN message.

Enumerator:
DATA_FRAME

Data frame

REMOTE_FRAME

Remote frame

Definition at line 572 of file lpc17xx_can.h.

enum CAN_ID_FORMAT_Type

CAN ID format definition.

CAN configuration structure

Enumerator:
STD_ID_FORMAT

Use standard ID format (11 bit ID)

EXT_ID_FORMAT

Use extended ID format (29 bit ID)

Definition at line 553 of file lpc17xx_can.h.

enum CAN_INT_EN_Type

CAN interrupt enable type definition.

Enumerator:
CANINT_RIE

CAN Receiver Interrupt Enable

CANINT_TIE1

CAN Transmit Interrupt Enable

CANINT_EIE

CAN Error Warning Interrupt Enable

CANINT_DOIE

CAN Data Overrun Interrupt Enable

CANINT_WUIE

CAN Wake-Up Interrupt Enable

CANINT_EPIE

CAN Error Passive Interrupt Enable

CANINT_ALIE

CAN Arbitration Lost Interrupt Enable

CANINT_BEIE

CAN Bus Error Inter rupt Enable

CANINT_IDIE

CAN ID Ready Interrupt Enable

CANINT_TIE2

CAN Transmit Interrupt Enable for Buffer2

CANINT_TIE3

CAN Transmit Interrupt Enable for Buffer3

CANINT_FCE

FullCAN Interrupt Enable

Definition at line 607 of file lpc17xx_can.h.

enum CAN_MODE_Type

CAN Mode Type definition.

Enumerator:
CAN_OPERATING_MODE

Operating Mode

CAN_RESET_MODE

Reset Mode

CAN_LISTENONLY_MODE

Listen Only Mode

CAN_SELFTEST_MODE

Seft Test Mode

CAN_TXPRIORITY_MODE

Transmit Priority Mode

CAN_SLEEP_MODE

Sleep Mode

CAN_RXPOLARITY_MODE

Receive Polarity Mode

CAN_TEST_MODE

Test Mode

Definition at line 635 of file lpc17xx_can.h.

enum FullCAN_IC_Type

FullCAN Interrupt Capture type definition.

Enumerator:
FULLCAN_IC0

FullCAN Interrupt and Capture 0

FULLCAN_IC1

FullCAN Interrupt and Capture 1

Definition at line 599 of file lpc17xx_can.h.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN Public Functions

Functions
CAN Public Functions
CAN (Control Area Network)

Functions

void | CAN_Init (LPC_CAN_TypeDef *CANx, uint32_t baudrate)
Initialize CAN peripheral with given baudrate.
void | CAN_DeInit (LPC_CAN_TypeDef *CANx)
CAN deInit.
Status | CAN_SendMsg (LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg)
Send message data.
Status | CAN_ReceiveMsg (LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg)
Receive message data.
CAN_ERROR | FCAN_ReadObj (LPC_CANAF_TypeDef *CANAFx, CAN_MSG_Type *CAN_Msg)
Receive FullCAN Object.
void | CAN_ModeConfig (LPC_CAN_TypeDef *CANx, CAN_MODE_Type mode, FunctionalState NewState)
Enable/Disable CAN Mode.
void | CAN_SetAFMode (LPC_CANAF_TypeDef *CANAFx, CAN_AFMODE_Type AFMode)
Setting Acceptance Filter mode.
void | CAN_SetCommand (LPC_CAN_TypeDef *CANx, uint32_t CMRType)
Set CAN command request.
CAN_ERROR | CAN_SetupAFLUT (LPC_CANAF_TypeDef *CANAFx, AF_SectionDef *AFSection)
Setup Acceptance Filter Look-Up Table.
CAN_ERROR | CAN_LoadFullCANEntry (LPC_CAN_TypeDef *CANx, uint16_t id)
Load FullCAN entry into AFLUT.
CAN_ERROR | CAN_LoadExplicitEntry (LPC_CAN_TypeDef *CANx, uint32_t id, CAN_ID_FORMAT_Type format)
Add Explicit ID into AF Look-Up Table dynamically.
CAN_ERROR | CAN_LoadGroupEntry (LPC_CAN_TypeDef *CANx, uint32_t lowerID, uint32_t upperID, CAN_ID_FORMAT_Type format)
Load Group entry into AFLUT.
CAN_ERROR | CAN_RemoveEntry (AFLUT_ENTRY_Type EntryType, uint16_t position)
Remove AFLUT entry (FullCAN entry and Explicit Standard entry)
void | CAN_IRQCmd (LPC_CAN_TypeDef *CANx, CAN_INT_EN_Type arg, FunctionalState NewState)
Enable/Disable CAN Interrupt.
uint32_t | CAN_IntGetStatus (LPC_CAN_TypeDef *CANx)
Get CAN interrupt status.
IntStatus | CAN_FullCANIntGetStatus (LPC_CANAF_TypeDef *CANAFx)
Check if FullCAN interrupt enable or not.
uint32_t | CAN_FullCANPendGetStatus (LPC_CANAF_TypeDef *CANAFx, FullCAN_IC_Type type)
Get value of FullCAN interrupt and capture register.
uint32_t | CAN_GetCTRLStatus (LPC_CAN_TypeDef *CANx, CAN_CTRL_STS_Type arg)
Get CAN Control Status.
uint32_t | CAN_GetCRStatus (LPC_CANCR_TypeDef *CANCRx, CAN_CR_STS_Type arg)
Get CAN Central Status.

Function Documentation

void CAN_DeInit ( LPC_CAN_TypeDef * CANx )

CAN deInit.

Parameters:
[in] CANx pointer to LPC_CAN_TypeDef, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
Returns:
None

Definition at line 199 of file lpc17xx_can.c.

IntStatus CAN_FullCANIntGetStatus ( LPC_CANAF_TypeDef * CANAFx )

Check if FullCAN interrupt enable or not.

Parameters:
[in] CANAFx point to LPC_CANAF_TypeDef object, should be: LPC_CANAF
Returns:
IntStatus, could be:
  • SET: if FullCAN interrupt is enable
  • RESET: if FullCAN interrupt is disable

Definition at line 1895 of file lpc17xx_can.c.

uint32_t CAN_FullCANPendGetStatus | ( | LPC_CANAF_TypeDef * | CANAFx,
 |  | FullCAN_IC_Type | type
 | ) |  |

Get value of FullCAN interrupt and capture register.

Parameters:
[in] CANAFx point to LPC_CANAF_TypeDef object, should be: LPC_CANAF
[in] type,: FullCAN IC type, should be:
  • FULLCAN_IC0: FullCAN Interrupt Capture 0
  • FULLCAN_IC1: FullCAN Interrupt Capture 1
Returns:
FCANIC0 or FCANIC1 (FullCAN interrupt and Capture register) value

Definition at line 1911 of file lpc17xx_can.c.

uint32_t CAN_GetCRStatus | ( | LPC_CANCR_TypeDef * | CANCRx,
 |  | CAN_CR_STS_Type | arg
 | ) |  |

Get CAN Central Status.

Parameters:
[in] CANCRx point to LPC_CANCR_TypeDef, should be: LPC_CANCR
[in] arg,: type of CAN status to get from CAN Central status register Should be:
  • CANCR_TX_STS: Central CAN Tx Status
  • CANCR_RX_STS: Central CAN Rx Status
  • CANCR_MS: Central CAN Miscellaneous Status
Returns:
Current Central Status that you want to get value

Definition at line 1673 of file lpc17xx_can.c.

uint32_t CAN_GetCTRLStatus | ( | LPC_CAN_TypeDef * | CANx,
 |  | CAN_CTRL_STS_Type | arg
 | ) |  |

Get CAN Control Status.

Parameters:
[in] CANx pointer to LPC_CAN_TypeDef, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
[in] arg,: type of CAN status to get from CAN status register Should be:
  • CANCTRL_GLOBAL_STS: CAN Global Status
  • CANCTRL_INT_CAP: CAN Interrupt and Capture
  • CANCTRL_ERR_WRN: CAN Error Warning Limit
  • CANCTRL_STS: CAN Control Status
Returns:
Current Control Status that you want to get value

Definition at line 1643 of file lpc17xx_can.c.

void CAN_Init | ( | LPC_CAN_TypeDef * | CANx,
 |  | uint32_t | baudrate
 | ) |  |

Initialize CAN peripheral with given baudrate.

Parameters:
[in] CANx pointer to LPC_CAN_TypeDef, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
[in] baudrate,: the value of CAN baudrate will be set (bps)
Returns:
None

Definition at line 142 of file lpc17xx_can.c.

uint32_t CAN_IntGetStatus ( LPC_CAN_TypeDef * CANx )

Get CAN interrupt status.

Parameters:
[in] CANx point to CAN peripheral selected, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
Returns:
CANICR (CAN interrupt and Capture register) value

Definition at line 1882 of file lpc17xx_can.c.

void CAN_IRQCmd | ( | LPC_CAN_TypeDef * | CANx,
 |  | CAN_INT_EN_Type | arg,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable CAN Interrupt.

Parameters:
[in] CANx pointer to LPC_CAN_TypeDef, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
[in] arg,: type of CAN interrupt that you want to enable/disable Should be:
  • CANINT_RIE: CAN Receiver Interrupt Enable
  • CANINT_TIE1: CAN Transmit Interrupt Enable
  • CANINT_EIE: CAN Error Warning Interrupt Enable
  • CANINT_DOIE: CAN Data Overrun Interrupt Enable
  • CANINT_WUIE: CAN Wake-Up Interrupt Enable
  • CANINT_EPIE: CAN Error Passive Interrupt Enable
  • CANINT_ALIE: CAN Arbitration Lost Interrupt Enable
  • CANINT_BEIE: CAN Bus Error Interrupt Enable
  • CANINT_IDIE: CAN ID Ready Interrupt Enable
  • CANINT_TIE2: CAN Transmit Interrupt Enable for Buffer2
  • CANINT_TIE3: CAN Transmit Interrupt Enable for Buffer3
  • CANINT_FCE: FullCAN Interrupt Enable
[in] NewState,: New state of this function, should be:
  • ENABLE
  • DISABLE
Returns:
none

Definition at line 1714 of file lpc17xx_can.c.

CAN_ERROR CAN_LoadExplicitEntry | ( | LPC_CAN_TypeDef * | CANx,
 |  | uint32_t | id,
 |  | CAN_ID_FORMAT_Type | format
 | ) |  |

Add Explicit ID into AF Look-Up Table dynamically.

Parameters:
[in] CANx pointer to LPC_CAN_TypeDef, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
[in] id,: The ID of entry will be added
[in] format,: is the type of ID Frame Format, should be:
  • STD_ID_FORMAT: 11-bit ID value
  • EXT_ID_FORMAT: 29-bit ID value
Returns:
CAN Error, could be:
  • CAN_OBJECTS_FULL_ERROR: No more rx or tx objects available
  • CAN_ID_EXIT_ERROR: ID exited in table
  • CAN_OK: ID is added into table successfully

Definition at line 496 of file lpc17xx_can.c.

CAN_ERROR CAN_LoadFullCANEntry | ( | LPC_CAN_TypeDef * | CANx,
 |  | uint16_t | id
 | ) |  |

Load FullCAN entry into AFLUT.

Parameters:
[in] CANx,: CAN peripheral selected, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
[in] id,: identifier of entry that will be added
Returns:
CAN_ERROR, could be:
  • CAN_OK: loading is successful
  • CAN_ID_EXIT_ERROR: ID exited in FullCAN Section
  • CAN_OBJECTS_FULL_ERROR: no more space available

Definition at line 705 of file lpc17xx_can.c.

CAN_ERROR CAN_LoadGroupEntry | ( | LPC_CAN_TypeDef * | CANx,
 |  | uint32_t | lowerID,
 |  | uint32_t | upperID,
 |  | CAN_ID_FORMAT_Type | format
 | ) |  |

Load Group entry into AFLUT.

Parameters:
[in] CANx,: CAN peripheral selected, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
[in] lowerID,upperID,: lower and upper identifier of entry
[in] format,: type of ID format, should be:
  • STD_ID_FORMAT: Standard ID format (11-bit value)
  • EXT_ID_FORMAT: Extended ID format (29-bit value)
Returns:
CAN_ERROR, could be:
  • CAN_OK: loading is successful
  • CAN_CONFLICT_ID_ERROR: Conflict ID occurs
  • CAN_OBJECTS_FULL_ERROR: no more space available

Definition at line 891 of file lpc17xx_can.c.

void CAN_ModeConfig | ( | LPC_CAN_TypeDef * | CANx,
 |  | CAN_MODE_Type | mode,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable CAN Mode.

Parameters:
[in] CANx pointer to LPC_CAN_TypeDef, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
[in] mode,: type of CAN mode that you want to enable/disable, should be:
  • CAN_OPERATING_MODE: Normal Operating Mode
  • CAN_RESET_MODE: Reset Mode
  • CAN_LISTENONLY_MODE: Listen Only Mode
  • CAN_SELFTEST_MODE: Self Test Mode
  • CAN_TXPRIORITY_MODE: Transmit Priority Mode
  • CAN_SLEEP_MODE: Sleep Mode
  • CAN_RXPOLARITY_MODE: Receive Polarity Mode
  • CAN_TEST_MODE: Test Mode
[in] NewState,: New State of this function, should be:
  • ENABLE
  • DISABLE
Returns:
none

Definition at line 1794 of file lpc17xx_can.c.

Status CAN_ReceiveMsg | ( | LPC_CAN_TypeDef * | CANx,
 |  | CAN_MSG_Type * | CAN_Msg
 | ) |  |

Receive message data.

Parameters:
[in] CANx pointer to LPC_CAN_TypeDef, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
[in] CAN_Msg point to the CAN_MSG_Type Struct, it will contain received message information such as: ID, DLC, RTR, ID Format
Returns:
Status:
  • SUCCESS: receive message successfully
  • ERROR: receive message unsuccessfully

Definition at line 1489 of file lpc17xx_can.c.

CAN_ERROR CAN_RemoveEntry | ( | AFLUT_ENTRY_Type | EntryType,
 |  | uint16_t | position
 | ) |  |

Remove AFLUT entry (FullCAN entry and Explicit Standard entry)

Parameters:
[in] EntryType,: the type of entry that want to remove, should be:
  • FULLCAN_ENTRY
  • EXPLICIT_STANDARD_ENTRY
  • GROUP_STANDARD_ENTRY
  • EXPLICIT_EXTEND_ENTRY
  • GROUP_EXTEND_ENTRY
[in] position,: the position of this entry in its section Note: the first position is 0
Returns:
CAN_ERROR, could be:
  • CAN_OK: removing is successful
  • CAN_ENTRY_NOT_EXIT_ERROR: entry want to remove is not exit

Definition at line 1096 of file lpc17xx_can.c.

Status CAN_SendMsg | ( | LPC_CAN_TypeDef * | CANx,
 |  | CAN_MSG_Type * | CAN_Msg
 | ) |  |

Send message data.

Parameters:
[in] CANx pointer to LPC_CAN_TypeDef, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
[in] CAN_Msg point to the CAN_MSG_Type Structure, it contains message information such as: ID, DLC, RTR, ID Format
Returns:
Status:
  • SUCCESS: send message successfully
  • ERROR: send message unsuccessfully

Definition at line 1336 of file lpc17xx_can.c.

void CAN_SetAFMode | ( | LPC_CANAF_TypeDef * | CANAFx,
 |  | CAN_AFMODE_Type | AFMode
 | ) |  |

Setting Acceptance Filter mode.

Parameters:
[in] CANAFx point to LPC_CANAF_TypeDef object, should be: LPC_CANAF
[in] AFMode,: type of AF mode that you want to set, should be:
  • CAN_Normal: Normal mode
  • CAN_AccOff: Acceptance Filter Off Mode
  • CAN_AccBP: Acceptance Fileter Bypass Mode
  • CAN_eFCAN: FullCAN Mode Enhancement
Returns:
none

Definition at line 1753 of file lpc17xx_can.c.

void CAN_SetCommand | ( | LPC_CAN_TypeDef * | CANx,
 |  | uint32_t | CMRType
 | ) |  |

Set CAN command request.

Parameters:
[in] CANx point to CAN peripheral selected, should be:
  • LPC_CAN1: CAN1 peripheral
  • LPC_CAN2: CAN2 peripheral
[in] CMRType command request type, should be:
  • CAN_CMR_TR: Transmission request
  • CAN_CMR_AT: Abort Transmission request
  • CAN_CMR_RRB: Release Receive Buffer request
  • CAN_CMR_CDO: Clear Data Overrun request
  • CAN_CMR_SRR: Self Reception request
  • CAN_CMR_STB1: Select Tx Buffer 1 request
  • CAN_CMR_STB2: Select Tx Buffer 2 request
  • CAN_CMR_STB3: Select Tx Buffer 3 request
Returns:
CANICR (CAN interrupt and Capture register) value

Definition at line 1869 of file lpc17xx_can.c.

CAN_ERROR CAN_SetupAFLUT | ( | LPC_CANAF_TypeDef * | CANAFx,
 |  | AF_SectionDef * | AFSection
 | ) |  |

Setup Acceptance Filter Look-Up Table.

Parameters:
[in] | CANAFx | pointer to LPC_CANAF_TypeDef Should be: LPC_CANAF
[in] | AFSection | the pointer to AF_SectionDef structure It contain information about 5 sections will be install in AFLUT
Returns:
CAN Error could be:
  • CAN_OBJECTS_FULL_ERROR: No more rx or tx objects available
  • CAN_AF_ENTRY_ERROR: table error-violation of ascending numerical order
  • CAN_OK: ID is added into table successfully

Definition at line 226 of file lpc17xx_can.c.

CAN_ERROR FCAN_ReadObj | ( | LPC_CANAF_TypeDef * | CANAFx,
 |  | CAN_MSG_Type * | CAN_Msg
 | ) |  |

Receive FullCAN Object.

Parameters:
[in] CANAFx,: CAN Acceptance Filter register, should be: LPC_CANAF
[in] CAN_Msg point to the CAN_MSG_Type Struct, it will contain received message information such as: ID, DLC, RTR, ID Format
Returns:
CAN_ERROR, could be:
  • CAN_FULL_OBJ_NOT_RCV: FullCAN Object is not be received
  • CAN_OK: Received FullCAN Object successful

Definition at line 1554 of file lpc17xx_can.c.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN Private Variables

Variables
CAN Private Variables
CAN (Control Area Network)

Variables

FunctionalState FULLCAN_ENABLE
uint16_t | CANAF_FullCAN_cnt = 0
uint16_t | CANAF_std_cnt = 0
uint16_t | CANAF_gstd_cnt = 0
uint16_t | CANAF_ext_cnt = 0
uint16_t | CANAF_gext_cnt = 0

Variable Documentation

uint16_t CANAF_ext_cnt = 0

Definition at line 60 of file lpc17xx_can.c.

uint16_t CANAF_FullCAN_cnt = 0

Definition at line 57 of file lpc17xx_can.c.

uint16_t CANAF_gext_cnt = 0

Definition at line 61 of file lpc17xx_can.c.

uint16_t CANAF_gstd_cnt = 0

Definition at line 59 of file lpc17xx_can.c.

uint16_t CANAF_std_cnt = 0

Definition at line 58 of file lpc17xx_can.c.

FunctionalState FULLCAN_ENABLE

Definition at line 53 of file lpc17xx_can.c.

Generated on Mon Nov 28 2011 11:15:18 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CLKPWR (Clock Power)

Modules
CLKPWR (Clock Power)
LPC1700CMSIS Firmware Library

Modules

CLKPWR Public Macros
CLKPWR Private Macros
CLKPWR Public Functions
Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CLKPWR Public Macros

Defines
CLKPWR Public Macros
CLKPWR (Clock Power)

Defines

#define | CLKPWR_PCLKSEL_WDT ((uint32_t)(0))
#define | CLKPWR_PCLKSEL_TIMER0 ((uint32_t)(2))
#define | CLKPWR_PCLKSEL_TIMER1 ((uint32_t)(4))
#define | CLKPWR_PCLKSEL_UART0 ((uint32_t)(6))
#define | CLKPWR_PCLKSEL_UART1 ((uint32_t)(8))
#define | CLKPWR_PCLKSEL_PWM1 ((uint32_t)(12))
#define | CLKPWR_PCLKSEL_I2C0 ((uint32_t)(14))
#define | CLKPWR_PCLKSEL_SPI ((uint32_t)(16))
#define | CLKPWR_PCLKSEL_SSP1 ((uint32_t)(20))
#define | CLKPWR_PCLKSEL_DAC ((uint32_t)(22))
#define | CLKPWR_PCLKSEL_ADC ((uint32_t)(24))
#define | CLKPWR_PCLKSEL_CAN1 ((uint32_t)(26))
#define | CLKPWR_PCLKSEL_CAN2 ((uint32_t)(28))
#define | CLKPWR_PCLKSEL_ACF ((uint32_t)(30))
#define | CLKPWR_PCLKSEL_QEI ((uint32_t)(32))
#define | CLKPWR_PCLKSEL_PCB ((uint32_t)(36))
#define | CLKPWR_PCLKSEL_I2C1 ((uint32_t)(38))
#define | CLKPWR_PCLKSEL_SSP0 ((uint32_t)(42))
#define | CLKPWR_PCLKSEL_TIMER2 ((uint32_t)(44))
#define | CLKPWR_PCLKSEL_TIMER3 ((uint32_t)(46))
#define | CLKPWR_PCLKSEL_UART2 ((uint32_t)(48))
#define | CLKPWR_PCLKSEL_UART3 ((uint32_t)(50))
#define | CLKPWR_PCLKSEL_I2C2 ((uint32_t)(52))
#define | CLKPWR_PCLKSEL_I2S ((uint32_t)(54))
#define | CLKPWR_PCLKSEL_RIT ((uint32_t)(58))
#define | CLKPWR_PCLKSEL_SYSCON ((uint32_t)(60))
#define | CLKPWR_PCLKSEL_MC ((uint32_t)(62))
#define | CLKPWR_PCLKSEL_CCLK_DIV_4 ((uint32_t)(0))
#define | CLKPWR_PCLKSEL_CCLK_DIV_1 ((uint32_t)(1))
#define | CLKPWR_PCLKSEL_CCLK_DIV_2 ((uint32_t)(2))
#define | CLKPWR_PCONP_PCTIM0 ((uint32_t)(1<<1))
#define | CLKPWR_PCONP_PCTIM1 ((uint32_t)(1<<2))
#define | CLKPWR_PCONP_PCUART0 ((uint32_t)(1<<3))
#define | CLKPWR_PCONP_PCUART1 ((uint32_t)(1<<4))
#define | CLKPWR_PCONP_PCPWM1 ((uint32_t)(1<<6))
#define | CLKPWR_PCONP_PCI2C0 ((uint32_t)(1<<7))
#define | CLKPWR_PCONP_PCSPI ((uint32_t)(1<<8))
#define | CLKPWR_PCONP_PCRTC ((uint32_t)(1<<9))
#define | CLKPWR_PCONP_PCSSP1 ((uint32_t)(1<<10))
#define | CLKPWR_PCONP_PCAD ((uint32_t)(1<<12))
#define | CLKPWR_PCONP_PCAN1 ((uint32_t)(1<<13))
#define | CLKPWR_PCONP_PCAN2 ((uint32_t)(1<<14))
#define | CLKPWR_PCONP_PCGPIO ((uint32_t)(1<<15))
#define | CLKPWR_PCONP_PCRIT ((uint32_t)(1<<16))
#define | CLKPWR_PCONP_PCMC ((uint32_t)(1<<17))
#define | CLKPWR_PCONP_PCQEI ((uint32_t)(1<<18))
#define | CLKPWR_PCONP_PCI2C1 ((uint32_t)(1<<19))
#define | CLKPWR_PCONP_PCSSP0 ((uint32_t)(1<<21))
#define | CLKPWR_PCONP_PCTIM2 ((uint32_t)(1<<22))
#define | CLKPWR_PCONP_PCTIM3 ((uint32_t)(1<<23))
#define | CLKPWR_PCONP_PCUART2 ((uint32_t)(1<<24))
#define | CLKPWR_PCONP_PCUART3 ((uint32_t)(1<<25))
#define | CLKPWR_PCONP_PCI2C2 ((uint32_t)(1<<26))
#define | CLKPWR_PCONP_PCI2S ((uint32_t)(1<<27))
#define | CLKPWR_PCONP_PCGPDMA ((uint32_t)(1<<29))
#define | CLKPWR_PCONP_PCENET ((uint32_t)(1<<30))
#define | CLKPWR_PCONP_PCUSB ((uint32_t)(1<<31))

Define Documentation

#define CLKPWR_PCLKSEL_ACF ((uint32_t)(30))

Peripheral clock divider bit position for ACF

Definition at line 80 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_ADC ((uint32_t)(24))

Peripheral clock divider bit position for ADC

Definition at line 74 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_CAN1 ((uint32_t)(26))

Peripheral clock divider bit position for CAN1

Definition at line 76 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_CAN2 ((uint32_t)(28))

Peripheral clock divider bit position for CAN2

Definition at line 78 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_CCLK_DIV_1 ((uint32_t)(1))

Peripheral clock divider is the same with CCLK

Definition at line 115 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_CCLK_DIV_2 ((uint32_t)(2))

Peripheral clock divider is set to 2 from CCLK

Definition at line 117 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_CCLK_DIV_4 ((uint32_t)(0))

Macro for Peripheral Clock Selection register bit values Note: When CCLK_DIV_8, Peripheral’s clock is selected to PCLK_xyz = CCLK/8 except for CAN1, CAN2, and CAN filtering when ’11’selects PCLK_xyz = CCLK/6

Definition at line 113 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_DAC ((uint32_t)(22))

Peripheral clock divider bit position for DAC

Definition at line 72 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_I2C0 ((uint32_t)(14))

Peripheral clock divider bit position for I2C0

Definition at line 66 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_I2C1 ((uint32_t)(38))

Peripheral clock divider bit position for I2C1

Definition at line 86 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_I2C2 ((uint32_t)(52))

Peripheral clock divider bit position for I2C2

Definition at line 98 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_I2S ((uint32_t)(54))

Peripheral clock divider bit position for I2S

Definition at line 100 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_MC ((uint32_t)(62))

Peripheral clock divider bit position for MC

Definition at line 106 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_PCB ((uint32_t)(36))

Peripheral clock divider bit position for PCB

Definition at line 84 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_PWM1 ((uint32_t)(12))

Peripheral clock divider bit position for PWM1

Definition at line 64 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_QEI ((uint32_t)(32))

Peripheral clock divider bit position for QEI

Definition at line 82 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_RIT ((uint32_t)(58))

Peripheral clock divider bit position for RIT

Definition at line 102 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_SPI ((uint32_t)(16))

Peripheral clock divider bit position for SPI

Definition at line 68 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_SSP0 ((uint32_t)(42))

Peripheral clock divider bit position for SSP0

Definition at line 88 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_SSP1 ((uint32_t)(20))

Peripheral clock divider bit position for SSP1

Definition at line 70 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_SYSCON ((uint32_t)(60))

Peripheral clock divider bit position for SYSCON

Definition at line 104 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_TIMER0 ((uint32_t)(2))

Peripheral clock divider bit position for TIMER0

Definition at line 56 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_TIMER1 ((uint32_t)(4))

Peripheral clock divider bit position for TIMER1

Definition at line 58 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_TIMER2 ((uint32_t)(44))

Peripheral clock divider bit position for TIMER2

Definition at line 90 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_TIMER3 ((uint32_t)(46))

Peripheral clock divider bit position for TIMER3

Definition at line 92 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_UART0 ((uint32_t)(6))

Peripheral clock divider bit position for UART0

Definition at line 60 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_UART1 ((uint32_t)(8))

Peripheral clock divider bit position for UART1

Definition at line 62 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_UART2 ((uint32_t)(48))

Peripheral clock divider bit position for UART2

Definition at line 94 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_UART3 ((uint32_t)(50))

Peripheral clock divider bit position for UART3

Definition at line 96 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_WDT ((uint32_t)(0))

Peripheral clock divider bit position for WDT

Definition at line 54 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCAD ((uint32_t)(1<<12))

A/D converter 0 (ADC0) power/clock control bit

Definition at line 142 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCAN1 ((uint32_t)(1<<13))

CAN Controller 1 power/clock control bit

Definition at line 144 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCAN2 ((uint32_t)(1<<14))

CAN Controller 2 power/clock control bit

Definition at line 146 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCENET ((uint32_t)(1<<30))

Ethernet block power/clock control bit

Definition at line 174 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCGPDMA ((uint32_t)(1<<29))

GP DMA function power/clock control bit

Definition at line 172 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCGPIO ((uint32_t)(1<<15))

GPIO power/clock control bit

Definition at line 148 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCI2C0 ((uint32_t)(1<<7))

The I2C0 interface power/clock control bit

Definition at line 134 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCI2C1 ((uint32_t)(1<<19))

The I2C1 interface power/clock control bit

Definition at line 156 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCI2C2 ((uint32_t)(1<<26))

I2C interface 2 power/clock control bit

Definition at line 168 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCI2S ((uint32_t)(1<<27))

I2S interface power/clock control bit

Definition at line 170 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCMC ((uint32_t)(1<<17))

Motor Control PWM

Definition at line 152 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCPWM1 ((uint32_t)(1<<6))

PWM1 power/clock control bit

Definition at line 132 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCQEI ((uint32_t)(1<<18))

Quadrature Encoder Interface power/clock control bit

Definition at line 154 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCRIT ((uint32_t)(1<<16))

Repetitive Interrupt Timer power/clock control bit

Definition at line 150 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCRTC ((uint32_t)(1<<9))

The RTC power/clock control bit

Definition at line 138 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCSPI ((uint32_t)(1<<8))

The SPI interface power/clock control bit

Definition at line 136 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCSSP0 ((uint32_t)(1<<21))

The SSP0 interface power/clock control bit

Definition at line 158 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCSSP1 ((uint32_t)(1<<10))

The SSP1 interface power/clock control bit

Definition at line 140 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCTIM0 ((uint32_t)(1<<1))

Timer/Counter 0 power/clock control bit

Definition at line 124 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCTIM1 ((uint32_t)(1<<2))

Definition at line 126 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCTIM2 ((uint32_t)(1<<22))

Timer 2 power/clock control bit

Definition at line 160 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCTIM3 ((uint32_t)(1<<23))

Timer 3 power/clock control bit

Definition at line 162 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCUART0 ((uint32_t)(1<<3))

UART0 power/clock control bit

Definition at line 128 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCUART1 ((uint32_t)(1<<4))

UART1 power/clock control bit

Definition at line 130 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCUART2 ((uint32_t)(1<<24))

UART 2 power/clock control bit

Definition at line 164 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCUART3 ((uint32_t)(1<<25))

UART 3 power/clock control bit

Definition at line 166 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_PCUSB ((uint32_t)(1<<31))

USB interface power/clock control bit

Definition at line 176 of file lpc17xx_clkpwr.h.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CLKPWR Private Macros

Defines
CLKPWR Private Macros
CLKPWR (Clock Power)

Defines

#define | CLKPWR_CLKSRCSEL_CLKSRC_IRC ((uint32_t)(0x00))
#define | CLKPWR_CLKSRCSEL_CLKSRC_MAINOSC ((uint32_t)(0x01))
#define | CLKPWR_CLKSRCSEL_CLKSRC_RTC ((uint32_t)(0x02))
#define | CLKPWR_CLKSRCSEL_BITMASK ((uint32_t)(0x03))
#define | CLKPWR_CLKOUTCFG_CLKOUTSEL_CPU ((uint32_t)(0x00))
#define | CLKPWR_CLKOUTCFG_CLKOUTSEL_MAINOSC ((uint32_t)(0x01))
#define | CLKPWR_CLKOUTCFG_CLKOUTSEL_RC ((uint32_t)(0x02))
#define | CLKPWR_CLKOUTCFG_CLKOUTSEL_USB ((uint32_t)(0x03))
#define | CLKPWR_CLKOUTCFG_CLKOUTSEL_RTC ((uint32_t)(0x04))
#define | CLKPWR_CLKOUTCFG_CLKOUTDIV(n) ((uint32_t)((n&0x0F)<<4))
#define | CLKPWR_CLKOUTCFG_CLKOUT_EN ((uint32_t)(1<<8))
#define | CLKPWR_CLKOUTCFG_CLKOUT_ACT ((uint32_t)(1<<9))
#define | CLKPWR_CLKOUTCFG_BITMASK ((uint32_t)(0x3FF))
#define | CLKPWR_PLL0CON_ENABLE ((uint32_t)(0x01))
#define | CLKPWR_PLL0CON_CONNECT ((uint32_t)(0x02))
#define | CLKPWR_PLL0CON_BITMASK ((uint32_t)(0x03))
#define | CLKPWR_PLL0CFG_MSEL(n) ((uint32_t)(n&0x7FFF))
#define | CLKPWR_PLL0CFG_NSEL(n) ((uint32_t)((n<<16)&0xFF0000))
#define | CLKPWR_PLL0CFG_BITMASK ((uint32_t)(0xFF7FFF))
#define | CLKPWR_PLL0STAT_MSEL(n) ((uint32_t)(n&0x7FFF))
#define | CLKPWR_PLL0STAT_NSEL(n) ((uint32_t)((n>>16)&0xFF))
#define | CLKPWR_PLL0STAT_PLLE ((uint32_t)(1<<24))
#define | CLKPWR_PLL0STAT_PLLC ((uint32_t)(1<<25))
#define | CLKPWR_PLL0STAT_PLOCK ((uint32_t)(1<<26))
#define | CLKPWR_PLL0FEED_BITMASK ((uint32_t)0xFF)
#define | CLKPWR_PLL1CON_ENABLE ((uint32_t)(0x01))
#define | CLKPWR_PLL1CON_CONNECT ((uint32_t)(0x02))
#define | CLKPWR_PLL1CON_BITMASK ((uint32_t)(0x03))
#define | CLKPWR_PLL1CFG_MSEL(n) ((uint32_t)(n&0x1F))
#define | CLKPWR_PLL1CFG_PSEL(n) ((uint32_t)((n&0x03)<<5))
#define | CLKPWR_PLL1CFG_BITMASK ((uint32_t)(0x7F))
#define | CLKPWR_PLL1STAT_MSEL(n) ((uint32_t)(n&0x1F))
#define | CLKPWR_PLL1STAT_PSEL(n) ((uint32_t)((n>>5)&0x03))
#define | CLKPWR_PLL1STAT_PLLE ((uint32_t)(1<<8))
#define | CLKPWR_PLL1STAT_PLLC ((uint32_t)(1<<9))
#define | CLKPWR_PLL1STAT_PLOCK ((uint32_t)(1<<10))
#define | CLKPWR_PLL1FEED_BITMASK ((uint32_t)0xFF)
#define | CLKPWR_CCLKCFG_BITMASK ((uint32_t)(0xFF))
#define | CLKPWR_USBCLKCFG_BITMASK ((uint32_t)(0x0F))
#define | CLKPWR_IRCTRIM_BITMASK ((uint32_t)(0x0F))
#define | CLKPWR_PCLKSEL0_BITMASK ((uint32_t)(0xFFF3F3FF))
#define | CLKPWR_PCLKSEL1_BITMASK ((uint32_t)(0xFCF3F0F3))
#define | CLKPWR_PCLKSEL_SET(p, n) _SBF(p,n)
#define | CLKPWR_PCLKSEL_BITMASK(p) _SBF(p,0x03)
#define | CLKPWR_PCLKSEL_GET(p, n) ((uint32_t)((n>>p)&0x03))
#define | CLKPWR_PCON_PM0 ((uint32_t)(1<<0))
#define | CLKPWR_PCON_PM1 ((uint32_t)(1<<1))
#define | CLKPWR_PCON_BODPDM ((uint32_t)(1<<2))
#define | CLKPWR_PCON_BOGD ((uint32_t)(1<<3))
#define | CLKPWR_PCON_BORD ((uint32_t)(1<<4))
#define | CLKPWR_PCON_SMFLAG ((uint32_t)(1<<8))
#define | CLKPWR_PCON_DSFLAG ((uint32_t)(1<<9))
#define | CLKPWR_PCON_PDFLAG ((uint32_t)(1<<10))
#define | CLKPWR_PCON_DPDFLAG ((uint32_t)(1<<11))
#define | CLKPWR_PCONP_BITMASK 0xEFEFF7DE

Define Documentation

#define CLKPWR_CCLKCFG_BITMASK ((uint32_t)(0xFF))

Macro defines for CPU Clock Configuration Register CPU Clock configuration bit mask

Definition at line 308 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_BITMASK ((uint32_t)(0x3FF))

Clock source selection bit mask

Definition at line 221 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUT_ACT ((uint32_t)(1<<9))

CLKOUT activity indication

Definition at line 219 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUT_EN ((uint32_t)(1<<8))

CLKOUT enable control

Definition at line 217 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUTDIV ( n ) ((uint32_t)((n&0x0F)<<4))

Integer value to divide the output clock by, minus one

Definition at line 215 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUTSEL_CPU ((uint32_t)(0x00))

Macro defines for Clock Output Configuration Register Selects the CPU clock as the CLKOUT source

Definition at line 205 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUTSEL_MAINOSC ((uint32_t)(0x01))

Selects the main oscillator as the CLKOUT source

Definition at line 207 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUTSEL_RC ((uint32_t)(0x02))

Selects the Internal RC oscillator as the CLKOUT source

Definition at line 209 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUTSEL_RTC ((uint32_t)(0x04))

Selects the RTC oscillator as the CLKOUT source

Definition at line 213 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKOUTCFG_CLKOUTSEL_USB ((uint32_t)(0x03))

Selects the USB clock as the CLKOUT source

Definition at line 211 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKSRCSEL_BITMASK ((uint32_t)(0x03))

Clock source selection bit mask

Definition at line 198 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKSRCSEL_CLKSRC_IRC ((uint32_t)(0x00))

Macro defines for Clock Source Select Register Internal RC oscillator

Definition at line 192 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKSRCSEL_CLKSRC_MAINOSC ((uint32_t)(0x01))

Main oscillator

Definition at line 194 of file lpc17xx_clkpwr.h.

#define CLKPWR_CLKSRCSEL_CLKSRC_RTC ((uint32_t)(0x02))

RTC oscillator

Definition at line 196 of file lpc17xx_clkpwr.h.

#define CLKPWR_IRCTRIM_BITMASK ((uint32_t)(0x0F))

Macro defines for IRC Trim Register IRC Trim bit mask

Definition at line 320 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL0_BITMASK ((uint32_t)(0xFFF3F3FF))

Macro defines for Peripheral Clock Selection Register 0 and 1 Peripheral Clock Selection 0 mask bit

Definition at line 326 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL1_BITMASK ((uint32_t)(0xFCF3F0F3))

Peripheral Clock Selection 1 mask bit

Definition at line 328 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_BITMASK ( p ) _SBF(p,0x03)

Macro to mask peripheral clock of each type

Definition at line 334 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_GET | ( | p,
 |  | n
 | ) | ((uint32_t)((n>>p)&0x03))

Macro to get peripheral clock of each type

Definition at line 336 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCLKSEL_SET | ( | p,
 |  | n
 | ) | _SBF(p,n)

Macro to set peripheral clock of each type p: position of two bits that hold divider of peripheral clock n: value of divider of peripheral clock to be set

Definition at line 332 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_BODPDM ((uint32_t)(1<<2))

Brown-Out Reduced Power Mode

Definition at line 346 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_BOGD ((uint32_t)(1<<3))

Brown-Out Global Disable

Definition at line 348 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_BORD ((uint32_t)(1<<4))

Brown Out Reset Disable

Definition at line 350 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_DPDFLAG ((uint32_t)(1<<11))

Deep Power-down entry flag

Definition at line 358 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_DSFLAG ((uint32_t)(1<<9))

Deep Sleep entry flag

Definition at line 354 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_PDFLAG ((uint32_t)(1<<10))

Power-down entry flag

Definition at line 356 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_PM0 ((uint32_t)(1<<0))

Macro defines for Power Mode Control Register Power mode control bit 0

Definition at line 342 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_PM1 ((uint32_t)(1<<1))

Power mode control bit 1

Definition at line 344 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCON_SMFLAG ((uint32_t)(1<<8))

Sleep Mode entry flag

Definition at line 352 of file lpc17xx_clkpwr.h.

#define CLKPWR_PCONP_BITMASK 0xEFEFF7DE

Macro defines for Power Control for Peripheral Register Power Control for Peripherals bit mask

Definition at line 364 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0CFG_BITMASK ((uint32_t)(0xFF7FFF))

PLL 0 Configuration bit mask

Definition at line 241 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0CFG_MSEL ( n ) ((uint32_t)(n&0x7FFF))

Macro defines for PPL0 Configuration Register PLL 0 Configuration MSEL field

Definition at line 237 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0CFG_NSEL ( n ) ((uint32_t)((n<<16)&0xFF0000))

PLL 0 Configuration NSEL field

Definition at line 239 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0CON_BITMASK ((uint32_t)(0x03))

PLL 0 control bit mask

Definition at line 231 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0CON_CONNECT ((uint32_t)(0x02))

PLL 0 control connect

Definition at line 229 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0CON_ENABLE ((uint32_t)(0x01))

Macro defines for PPL0 Control Register PLL 0 control enable

Definition at line 227 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0FEED_BITMASK ((uint32_t)0xFF)

Macro defines for PPL0 Feed Register PLL0 Feed bit mask

Definition at line 262 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0STAT_MSEL ( n ) ((uint32_t)(n&0x7FFF))

Macro defines for PPL0 Status Register PLL 0 MSEL value

Definition at line 248 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0STAT_NSEL ( n ) ((uint32_t)((n>>16)&0xFF))

PLL NSEL get value

Definition at line 250 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0STAT_PLLC ((uint32_t)(1<<25))

PLL status Connect bit

Definition at line 254 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0STAT_PLLE ((uint32_t)(1<<24))

PLL status enable bit

Definition at line 252 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL0STAT_PLOCK ((uint32_t)(1<<26))

PLL status lock

Definition at line 256 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1CFG_BITMASK ((uint32_t)(0x7F))

USB PLL configuration bit mask

Definition at line 282 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1CFG_MSEL ( n ) ((uint32_t)(n&0x1F))

Macro defines for PLL1 Configuration Register USB PLL MSEL set value

Definition at line 278 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1CFG_PSEL ( n ) ((uint32_t)((n&0x03)<<5))

USB PLL PSEL set value

Definition at line 280 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1CON_BITMASK ((uint32_t)(0x03))

USB PLL control bit mask

Definition at line 272 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1CON_CONNECT ((uint32_t)(0x02))

USB PLL control connect

Definition at line 270 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1CON_ENABLE ((uint32_t)(0x01))

Macro defines for PLL1 Control Register USB PLL control enable

Definition at line 268 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1FEED_BITMASK ((uint32_t)0xFF)

Macro defines for PLL1 Feed Register PLL1 Feed bit mask

Definition at line 302 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1STAT_MSEL ( n ) ((uint32_t)(n&0x1F))

Macro defines for PLL1 Status Register USB PLL MSEL get value

Definition at line 288 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1STAT_PLLC ((uint32_t)(1<<9))

USB PLL status Connect bit

Definition at line 294 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1STAT_PLLE ((uint32_t)(1<<8))

USB PLL status enable bit

Definition at line 292 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1STAT_PLOCK ((uint32_t)(1<<10))

USB PLL status lock

Definition at line 296 of file lpc17xx_clkpwr.h.

#define CLKPWR_PLL1STAT_PSEL ( n ) ((uint32_t)((n>>5)&0x03))

USB PLL PSEL get value

Definition at line 290 of file lpc17xx_clkpwr.h.

#define CLKPWR_USBCLKCFG_BITMASK ((uint32_t)(0x0F))

Macro defines for USB Clock Configuration Register USB Clock Configuration bit mask

Definition at line 314 of file lpc17xx_clkpwr.h.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CLKPWR Public Functions

Functions
CLKPWR Public Functions
CLKPWR (Clock Power)

Functions

void | CLKPWR_SetPCLKDiv (uint32_t ClkType, uint32_t DivVal)
Set value of each Peripheral Clock Selection.
uint32_t | CLKPWR_GetPCLKSEL (uint32_t ClkType)
Get current value of each Peripheral Clock Selection.
uint32_t | CLKPWR_GetPCLK (uint32_t ClkType)
Get current value of each Peripheral Clock.
void | CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState)
Configure power supply for each peripheral according to NewState.
void | CLKPWR_Sleep (void)
Enter Sleep mode with co-operated instruction by the Cortex-M3.
void | CLKPWR_DeepSleep (void)
Enter Deep Sleep mode with co-operated instruction by the Cortex-M3.
void | CLKPWR_PowerDown (void)
Enter Power Down mode with co-operated instruction by the Cortex-M3.
void | CLKPWR_DeepPowerDown (void)
Enter Deep Power Down mode with co-operated instruction by the Cortex-M3.

Function Documentation

void CLKPWR_ConfigPPWR | ( | uint32_t | PPType,
 |  | FunctionalState | NewState
 | ) |  |

Configure power supply for each peripheral according to NewState.

Parameters:
[in] PPType Type of peripheral used to enable power, should be one of the following:
  • CLKPWR_PCONP_PCTIM0 : Timer 0
    • CLKPWR_PCONP_PCTIM1 : Timer 1
    • CLKPWR_PCONP_PCUART0 : UART 0
    • CLKPWR_PCONP_PCUART1 : UART 1
    • CLKPWR_PCONP_PCPWM1 : PWM 1
    • CLKPWR_PCONP_PCI2C0 : I2C 0
    • CLKPWR_PCONP_PCSPI : SPI
    • CLKPWR_PCONP_PCRTC : RTC
    • CLKPWR_PCONP_PCSSP1 : SSP 1
    • CLKPWR_PCONP_PCAD : ADC
    • CLKPWR_PCONP_PCAN1 : CAN 1
    • CLKPWR_PCONP_PCAN2 : CAN 2
    • CLKPWR_PCONP_PCGPIO : GPIO
    • CLKPWR_PCONP_PCRIT : RIT
    • CLKPWR_PCONP_PCMC : MC
    • CLKPWR_PCONP_PCQEI : QEI
    • CLKPWR_PCONP_PCI2C1 : I2C 1
    • CLKPWR_PCONP_PCSSP0 : SSP 0
    • CLKPWR_PCONP_PCTIM2 : Timer 2
    • CLKPWR_PCONP_PCTIM3 : Timer 3
    • CLKPWR_PCONP_PCUART2 : UART 2
    • CLKPWR_PCONP_PCUART3 : UART 3
    • CLKPWR_PCONP_PCI2C2 : I2C 2
    • CLKPWR_PCONP_PCI2S : I2S
    • CLKPWR_PCONP_PCGPDMA : GPDMA
    • CLKPWR_PCONP_PCENET : Ethernet
    • CLKPWR_PCONP_PCUSB : USB
[in] NewState New state of Peripheral Power, should be:
  • ENABLE : Enable power for this peripheral
  • DISABLE : Disable power for this peripheral
Returns:
none

Definition at line 266 of file lpc17xx_clkpwr.c.

void CLKPWR_DeepPowerDown ( void )

Enter Deep Power Down mode with co-operated instruction by the Cortex-M3.

Parameters:
[in] None
Returns:
None

Definition at line 327 of file lpc17xx_clkpwr.c.

void CLKPWR_DeepSleep ( void )

Enter Deep Sleep mode with co-operated instruction by the Cortex-M3.

Parameters:
[in] None
Returns:
None

Definition at line 297 of file lpc17xx_clkpwr.c.

uint32_t CLKPWR_GetPCLK ( uint32_t ClkType )

Get current value of each Peripheral Clock.

Parameters:
[in] ClkType Peripheral Clock Selection of each type, should be one of the following:
  • CLKPWR_PCLKSEL_WDT : WDT
  • CLKPWR_PCLKSEL_TIMER0 : Timer 0
  • CLKPWR_PCLKSEL_TIMER1 : Timer 1
  • CLKPWR_PCLKSEL_UART0 : UART 0
  • CLKPWR_PCLKSEL_UART1 : UART 1
  • CLKPWR_PCLKSEL_PWM1 : PWM 1
  • CLKPWR_PCLKSEL_I2C0 : I2C 0
  • CLKPWR_PCLKSEL_SPI : SPI
  • CLKPWR_PCLKSEL_SSP1 : SSP 1
  • CLKPWR_PCLKSEL_DAC : DAC
  • CLKPWR_PCLKSEL_ADC : ADC
  • CLKPWR_PCLKSEL_CAN1 : CAN 1
  • CLKPWR_PCLKSEL_CAN2 : CAN 2
  • CLKPWR_PCLKSEL_ACF : ACF
  • CLKPWR_PCLKSEL_QEI : QEI
  • CLKPWR_PCLKSEL_PCB : PCB
  • CLKPWR_PCLKSEL_I2C1 : I2C 1
  • CLKPWR_PCLKSEL_SSP0 : SSP 0
  • CLKPWR_PCLKSEL_TIMER2 : Timer 2
  • CLKPWR_PCLKSEL_TIMER3 : Timer 3
  • CLKPWR_PCLKSEL_UART2 : UART 2
  • CLKPWR_PCLKSEL_UART3 : UART 3
  • CLKPWR_PCLKSEL_I2C2 : I2C 2
  • CLKPWR_PCLKSEL_I2S : I2S
  • CLKPWR_PCLKSEL_RIT : RIT
  • CLKPWR_PCLKSEL_SYSCON : SYSCON
  • CLKPWR_PCLKSEL_MC : MC
Returns:
Value of Selected Peripheral Clock

Definition at line 196 of file lpc17xx_clkpwr.c.

uint32_t CLKPWR_GetPCLKSEL ( uint32_t ClkType )

Get current value of each Peripheral Clock Selection.

Parameters:
[in] ClkType Peripheral Clock Selection of each type, should be one of the following:
  • CLKPWR_PCLKSEL_WDT : WDT
  • CLKPWR_PCLKSEL_TIMER0 : Timer 0
  • CLKPWR_PCLKSEL_TIMER1 : Timer 1
  • CLKPWR_PCLKSEL_UART0 : UART 0
  • CLKPWR_PCLKSEL_UART1 : UART 1
  • CLKPWR_PCLKSEL_PWM1 : PWM 1
  • CLKPWR_PCLKSEL_I2C0 : I2C 0
  • CLKPWR_PCLKSEL_SPI : SPI
  • CLKPWR_PCLKSEL_SSP1 : SSP 1
  • CLKPWR_PCLKSEL_DAC : DAC
  • CLKPWR_PCLKSEL_ADC : ADC
  • CLKPWR_PCLKSEL_CAN1 : CAN 1
  • CLKPWR_PCLKSEL_CAN2 : CAN 2
  • CLKPWR_PCLKSEL_ACF : ACF
  • CLKPWR_PCLKSEL_QEI : QEI
  • CLKPWR_PCLKSEL_PCB : PCB
  • CLKPWR_PCLKSEL_I2C1 : I2C 1
  • CLKPWR_PCLKSEL_SSP0 : SSP 0
  • CLKPWR_PCLKSEL_TIMER2 : Timer 2
  • CLKPWR_PCLKSEL_TIMER3 : Timer 3
  • CLKPWR_PCLKSEL_UART2 : UART 2
  • CLKPWR_PCLKSEL_UART3 : UART 3
  • CLKPWR_PCLKSEL_I2C2 : I2C 2
  • CLKPWR_PCLKSEL_I2S : I2S
  • CLKPWR_PCLKSEL_RIT : RIT
  • CLKPWR_PCLKSEL_SYSCON : SYSCON
  • CLKPWR_PCLKSEL_MC : MC
Returns:
Value of Selected Peripheral Clock Selection

Definition at line 141 of file lpc17xx_clkpwr.c.

void CLKPWR_PowerDown ( void )

Enter Power Down mode with co-operated instruction by the Cortex-M3.

Parameters:
[in] None
Returns:
None

Definition at line 312 of file lpc17xx_clkpwr.c.

void CLKPWR_SetPCLKDiv | ( | uint32_t | ClkType,
 |  | uint32_t | DivVal
 | ) |  |

Set value of each Peripheral Clock Selection.

Parameters:
[in] ClkType Peripheral Clock Selection of each type, should be one of the following:
  • CLKPWR_PCLKSEL_WDT : WDT
  • CLKPWR_PCLKSEL_TIMER0 : Timer 0
  • CLKPWR_PCLKSEL_TIMER1 : Timer 1
  • CLKPWR_PCLKSEL_UART0 : UART 0
  • CLKPWR_PCLKSEL_UART1 : UART 1
  • CLKPWR_PCLKSEL_PWM1 : PWM 1
  • CLKPWR_PCLKSEL_I2C0 : I2C 0
  • CLKPWR_PCLKSEL_SPI : SPI
  • CLKPWR_PCLKSEL_SSP1 : SSP 1
  • CLKPWR_PCLKSEL_DAC : DAC
  • CLKPWR_PCLKSEL_ADC : ADC
  • CLKPWR_PCLKSEL_CAN1 : CAN 1
  • CLKPWR_PCLKSEL_CAN2 : CAN 2
  • CLKPWR_PCLKSEL_ACF : ACF
  • CLKPWR_PCLKSEL_QEI : QEI
  • CLKPWR_PCLKSEL_PCB : PCB
  • CLKPWR_PCLKSEL_I2C1 : I2C 1
  • CLKPWR_PCLKSEL_SSP0 : SSP 0
  • CLKPWR_PCLKSEL_TIMER2 : Timer 2
  • CLKPWR_PCLKSEL_TIMER3 : Timer 3
  • CLKPWR_PCLKSEL_UART2 : UART 2
  • CLKPWR_PCLKSEL_UART3 : UART 3
  • CLKPWR_PCLKSEL_I2C2 : I2C 2
  • CLKPWR_PCLKSEL_I2S : I2S
  • CLKPWR_PCLKSEL_RIT : RIT
  • CLKPWR_PCLKSEL_SYSCON : SYSCON
  • CLKPWR_PCLKSEL_MC : MC
[in] DivVal Value of divider, should be:
  • CLKPWR_PCLKSEL_CCLK_DIV_4 : PCLK_peripheral = CCLK/4
  • CLKPWR_PCLKSEL_CCLK_DIV_1 : PCLK_peripheral = CCLK/1
  • CLKPWR_PCLKSEL_CCLK_DIV_2 : PCLK_peripheral = CCLK/2
Returns:
none

Definition at line 80 of file lpc17xx_clkpwr.c.

void CLKPWR_Sleep ( void )

Enter Sleep mode with co-operated instruction by the Cortex-M3.

Parameters:
[in] None
Returns:
None

Definition at line 284 of file lpc17xx_clkpwr.c.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DAC (Digital-to-Analog Controller)

Modules
DAC (Digital-to-Analog Controller)
LPC1700CMSIS Firmware Library

Modules

DAC Private Macros
DAC Public Types
DAC Public Functions
Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DAC Private Macros

Defines
DAC Private Macros
DAC (Digital-to-Analog Controller)

Defines

#define | DAC_VALUE(n) ((uint32_t)((n&0x3FF)<<6))
#define | DAC_BIAS_EN ((uint32_t)(1<<16))
#define | DAC_CCNT_VALUE(n) ((uint32_t)(n&0xffff))
#define | DAC_DBLBUF_ENA ((uint32_t)(1<<1))
#define | DAC_CNT_ENA ((uint32_t)(1<<2))
#define | DAC_DMA_ENA ((uint32_t)(1<<3))
#define | DAC_DACCTRL_MASK ((uint32_t)(0x0F))
#define | PARAM_DACx(n) (((uint32_t *)n)==((uint32_t *)LPC_DAC))
#define | PARAM_DAC_CURRENT_OPT(OPTION)

Define Documentation

#define DAC_BIAS_EN ((uint32_t)(1<<16))

If this bit = 0: The settling time of the DAC is 1 microsecond max, and the maximum current is 700 microAmpere If this bit = 1: The settling time of the DAC is 2.5 microsecond and the maximum current is 350 microAmpere

Definition at line 59 of file lpc17xx_dac.h.

#define DAC_CCNT_VALUE ( n ) ((uint32_t)(n&0xffff))

Value to reload interrupt DMA counter

Definition at line 61 of file lpc17xx_dac.h.

#define DAC_CNT_ENA ((uint32_t)(1<<2))

DCAR Time out count enable

Definition at line 66 of file lpc17xx_dac.h.

#define DAC_DACCTRL_MASK ((uint32_t)(0x0F))

DCAR DACCTRL mask bit

Definition at line 70 of file lpc17xx_dac.h.

#define DAC_DBLBUF_ENA ((uint32_t)(1<<1))

DCAR double buffering

Definition at line 64 of file lpc17xx_dac.h.

#define DAC_DMA_ENA ((uint32_t)(1<<3))

DCAR DMA access

Definition at line 68 of file lpc17xx_dac.h.

#define DAC_VALUE ( n ) ((uint32_t)((n&0x3FF)<<6))

After the selected settling time after this field is written with a new VALUE, the voltage on the AOUT pin (with respect to VSSA) is VALUE/1024 × VREF

Definition at line 54 of file lpc17xx_dac.h.

#define PARAM_DAC_CURRENT_OPT ( OPTION )
Value:
((OPTION == DAC_MAX_CURRENT_700uA)\
||(OPTION == DAC_MAX_CURRENT_350uA))

Macro to check DAC current optional parameter

Definition at line 76 of file lpc17xx_dac.h.

#define PARAM_DACx ( n ) (((uint32_t *)n)==((uint32_t *)LPC_DAC))

Macro to determine if it is valid DAC peripheral

Definition at line 73 of file lpc17xx_dac.h.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DAC Public Types

Data Structures | Enumerations
DAC Public Types
DAC (Digital-to-Analog Controller)

Data Structures

struct | DAC_CONVERTER_CFG_Type
Configuration for DAC converter control register. More...

Enumerations

enum | DAC_CURRENT_OPT { DAC_MAX_CURRENT_700uA = 0, DAC_MAX_CURRENT_350uA }
Current option in DAC configuration option. More...

Enumeration Type Documentation

enum DAC_CURRENT_OPT

Current option in DAC configuration option.

Enumerator:
DAC_MAX_CURRENT_700uA

The settling time of the DAC is 1 us max, and the maximum current is 700 uA

DAC_MAX_CURRENT_350uA

The settling time of the DAC is 2.5 us and the maximum current is 350 uA

Definition at line 88 of file lpc17xx_dac.h.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DAC Public Functions

Functions
DAC Public Functions
DAC (Digital-to-Analog Controller)

Functions

void | DAC_Init (LPC_DAC_TypeDef *DACx)
Initial ADC configuration.
void | DAC_UpdateValue (LPC_DAC_TypeDef *DACx, uint32_t dac_value)
Update value to DAC.
void | DAC_SetBias (LPC_DAC_TypeDef *DACx, uint32_t bias)
Set Maximum current for DAC.
void | DAC_ConfigDAConverterControl (LPC_DAC_TypeDef *DACx, DAC_CONVERTER_CFG_Type *DAC_ConverterConfigStruct)
To enable the DMA operation and control DMA timer.
void | DAC_SetDMATimeOut (LPC_DAC_TypeDef *DACx, uint32_t time_out)
Set reload value for interrupt/DMA counter.

Function Documentation

void DAC_ConfigDAConverterControl | ( | LPC_DAC_TypeDef * | DACx,
 |  | DAC_CONVERTER_CFG_Type * | DAC_ConverterConfigStruct
 | ) |  |

To enable the DMA operation and control DMA timer.

Parameters:
[in] DACx pointer to LPC_DAC_TypeDef, should be: LPC_DAC
[in] DAC_ConverterConfigStruct pointer to DAC_CONVERTER_CFG_Type
  • DBLBUF_ENA : enable/disable DACR double buffering feature
  • CNT_ENA : enable/disable timer out counter
  • DMA_ENA : enable/disable DMA access
Returns:
None

Definition at line 111 of file lpc17xx_dac.c.

void DAC_Init ( LPC_DAC_TypeDef * DACx )

Initial ADC configuration.

  • Maximum current is 700 uA
  • Value to AOUT is 0
    Parameters:
    [in] DACx pointer to LPC_DAC_TypeDef, should be: LPC_DAC
    Returns:
    None

Definition at line 60 of file lpc17xx_dac.c.

void DAC_SetBias | ( | LPC_DAC_TypeDef * | DACx,
 |  | uint32_t | bias
 | ) |  |

Set Maximum current for DAC.

Parameters:
[in] | DACx | pointer to LPC_DAC_TypeDef, should be: LPC_DAC
[in] | bias | : 0 is 700 uA 1 350 uA
Returns:
None

Definition at line 92 of file lpc17xx_dac.c.

void DAC_SetDMATimeOut | ( | LPC_DAC_TypeDef * | DACx,
 |  | uint32_t | time_out
 | ) |  |

Set reload value for interrupt/DMA counter.

Parameters:
[in] | DACx | pointer to LPC_DAC_TypeDef, should be: LPC_DAC
[in] | time_out | time out to reload for interrupt/DMA counter
Returns:
None

Definition at line 129 of file lpc17xx_dac.c.

void DAC_UpdateValue | ( | LPC_DAC_TypeDef * | DACx,
 |  | uint32_t | dac_value
 | ) |  |

Update value to DAC.

Parameters:
[in] | DACx | pointer to LPC_DAC_TypeDef, should be: LPC_DAC
[in] | dac_value | : value 10 bit to be converted to output
Returns:
None

Definition at line 75 of file lpc17xx_dac.c.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EMAC (Ethernet Media Access Controller)

Modules | Defines
EMAC (Ethernet Media Access Controller)
LPC1700CMSIS Firmware Library

Modules

EMAC Public Macros
EMAC Private Macros
EMAC Public Types
EMAC Public Functions
EMAC Private Variables

Defines

#define MCB_LPC_1768

Define Documentation

#define MCB_LPC_1768

Definition at line 46 of file lpc17xx_emac.h.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EMAC Public Macros

Defines
EMAC Public Macros
EMAC (Ethernet Media Access Controller)

Defines

#define | EMAC_PHY_STAT_LINK (0)
#define | EMAC_PHY_STAT_SPEED (1)
#define | EMAC_PHY_STAT_DUP (2)
#define | EMAC_MODE_AUTO (0)
#define | EMAC_MODE_10M_FULL (1)
#define | EMAC_MODE_10M_HALF (2)
#define | EMAC_MODE_100M_FULL (3)
#define | EMAC_MODE_100M_HALF (4)

Define Documentation

#define EMAC_MODE_100M_FULL (3)

100Mbps FullDuplex mode

Definition at line 64 of file lpc17xx_emac.h.

#define EMAC_MODE_100M_HALF (4)

100Mbps HalfDuplex mode

Definition at line 65 of file lpc17xx_emac.h.

#define EMAC_MODE_10M_FULL (1)

10Mbps FullDuplex mode

Definition at line 62 of file lpc17xx_emac.h.

#define EMAC_MODE_10M_HALF (2)

10Mbps HalfDuplex mode

Definition at line 63 of file lpc17xx_emac.h.

#define EMAC_MODE_AUTO (0)

Auto-negotiation mode

Definition at line 61 of file lpc17xx_emac.h.

#define EMAC_PHY_STAT_DUP (2)

Duplex Status

Definition at line 58 of file lpc17xx_emac.h.

#define EMAC_PHY_STAT_LINK (0)

Link Status

Definition at line 56 of file lpc17xx_emac.h.

#define EMAC_PHY_STAT_SPEED (1)

Speed Status

Definition at line 57 of file lpc17xx_emac.h.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EMAC Private Macros

Defines
EMAC Private Macros
EMAC (Ethernet Media Access Controller)

Defines

#define | EMAC_NUM_RX_FRAG 4
#define | EMAC_NUM_TX_FRAG 3
#define | EMAC_ETH_MAX_FLEN 1536
#define | EMAC_TX_FRAME_TOUT 0x00100000
#define | EMAC_MAC1_REC_EN 0x00000001
#define | EMAC_MAC1_PASS_ALL 0x00000002
#define | EMAC_MAC1_RX_FLOWC 0x00000004
#define | EMAC_MAC1_TX_FLOWC 0x00000008
#define | EMAC_MAC1_LOOPB 0x00000010
#define | EMAC_MAC1_RES_TX 0x00000100
#define | EMAC_MAC1_RES_MCS_TX 0x00000200
#define | EMAC_MAC1_RES_RX 0x00000400
#define | EMAC_MAC1_RES_MCS_RX 0x00000800
#define | EMAC_MAC1_SIM_RES 0x00004000
#define | EMAC_MAC1_SOFT_RES 0x00008000
#define | EMAC_MAC2_FULL_DUP 0x00000001
#define | EMAC_MAC2_FRM_LEN_CHK 0x00000002
#define | EMAC_MAC2_HUGE_FRM_EN 0x00000004
#define | EMAC_MAC2_DLY_CRC 0x00000008
#define | EMAC_MAC2_CRC_EN 0x00000010
#define | EMAC_MAC2_PAD_EN 0x00000020
#define | EMAC_MAC2_VLAN_PAD_EN 0x00000040
#define | EMAC_MAC2_ADET_PAD_EN 0x00000080
#define | EMAC_MAC2_PPREAM_ENF 0x00000100
#define | EMAC_MAC2_LPREAM_ENF 0x00000200
#define | EMAC_MAC2_NO_BACKOFF 0x00001000
#define | EMAC_MAC2_BACK_PRESSURE 0x00002000
#define | EMAC_MAC2_EXCESS_DEF 0x00004000
#define | EMAC_IPGT_BBIPG(n) (n&0x7F)
#define | EMAC_IPGT_FULL_DUP (EMAC_IPGT_BBIPG(0x15))
#define | EMAC_IPGT_HALF_DUP (EMAC_IPGT_BBIPG(0x12))
#define | EMAC_IPGR_NBBIPG_P2(n) (n&0x7F)
#define | EMAC_IPGR_P2_DEF (EMAC_IPGR_NBBIPG_P2(0x12))
#define | EMAC_IPGR_NBBIPG_P1(n) ((n&0x7F)<<8)
#define | EMAC_IPGR_P1_DEF EMAC_IPGR_NBBIPG_P1(0x0C)
#define | EMAC_CLRT_MAX_RETX(n) (n&0x0F)
#define | EMAC_CLRT_COLL(n) ((n&0x3F)<<8)
#define | EMAC_CLRT_DEF ((EMAC_CLRT_MAX_RETX(0x0F))|(EMAC_CLRT_COLL(0x37)))
#define | EMAC_MAXF_MAXFRMLEN(n) (n&0xFFFF)
#define | EMAC_SUPP_SPEED 0x00000100
#define | EMAC_TEST_SHCUT_PQUANTA 0x00000001
#define | EMAC_TEST_TST_PAUSE 0x00000002
#define | EMAC_TEST_TST_BACKP 0x00000004
#define | EMAC_MCFG_SCAN_INC 0x00000001
#define | EMAC_MCFG_SUPP_PREAM 0x00000002
#define | EMAC_MCFG_CLK_SEL(n) ((n&0x0F)<<2)
#define | EMAC_MCFG_RES_MII 0x00008000
#define | EMAC_MCFG_MII_MAXCLK 2500000UL
#define | EMAC_MCMD_READ 0x00000001
#define | EMAC_MCMD_SCAN 0x00000002
#define | EMAC_MII_WR_TOUT 0x00050000
#define | EMAC_MII_RD_TOUT 0x00050000
#define | EMAC_MADR_REG_ADR(n) (n&0x1F)
#define | EMAC_MADR_PHY_ADR(n) ((n&0x1F)<<8)
#define | EMAC_MWTD_DATA(n) (n&0xFFFF)
#define | EMAC_MRDD_DATA(n) (n&0xFFFF)
#define | EMAC_MIND_BUSY 0x00000001
#define | EMAC_MIND_SCAN 0x00000002
#define | EMAC_MIND_NOT_VAL 0x00000004
#define | EMAC_MIND_MII_LINK_FAIL 0x00000008
#define | EMAC_CR_RX_EN 0x00000001
#define | EMAC_CR_TX_EN 0x00000002
#define | EMAC_CR_REG_RES 0x00000008
#define | EMAC_CR_TX_RES 0x00000010
#define | EMAC_CR_RX_RES 0x00000020
#define | EMAC_CR_PASS_RUNT_FRM 0x00000040
#define | EMAC_CR_PASS_RX_FILT 0x00000080
#define | EMAC_CR_TX_FLOW_CTRL 0x00000100
#define | EMAC_CR_RMII 0x00000200
#define | EMAC_CR_FULL_DUP 0x00000400
#define | EMAC_SR_RX_EN 0x00000001
#define | EMAC_SR_TX_EN 0x00000002
#define | EMAC_TSV0_CRC_ERR 0x00000001
#define | EMAC_TSV0_LEN_CHKERR 0x00000002
#define | EMAC_TSV0_LEN_OUTRNG 0x00000004
#define | EMAC_TSV0_DONE 0x00000008
#define | EMAC_TSV0_MCAST 0x00000010
#define | EMAC_TSV0_BCAST 0x00000020
#define | EMAC_TSV0_PKT_DEFER 0x00000040
#define | EMAC_TSV0_EXC_DEFER 0x00000080
#define | EMAC_TSV0_EXC_COLL 0x00000100
#define | EMAC_TSV0_LATE_COLL 0x00000200
#define | EMAC_TSV0_GIANT 0x00000400
#define | EMAC_TSV0_UNDERRUN 0x00000800
#define | EMAC_TSV0_BYTES 0x0FFFF000
#define | EMAC_TSV0_CTRL_FRAME 0x10000000
#define | EMAC_TSV0_PAUSE 0x20000000
#define | EMAC_TSV0_BACK_PRESS 0x40000000
#define | EMAC_TSV0_VLAN 0x80000000
#define | EMAC_TSV1_BYTE_CNT 0x0000FFFF
#define | EMAC_TSV1_COLL_CNT 0x000F0000
#define | EMAC_RSV_BYTE_CNT 0x0000FFFF
#define | EMAC_RSV_PKT_IGNORED 0x00010000
#define | EMAC_RSV_RXDV_SEEN 0x00020000
#define | EMAC_RSV_CARR_SEEN 0x00040000
#define | EMAC_RSV_REC_CODEV 0x00080000
#define | EMAC_RSV_CRC_ERR 0x00100000
#define | EMAC_RSV_LEN_CHKERR 0x00200000
#define | EMAC_RSV_LEN_OUTRNG 0x00400000
#define | EMAC_RSV_REC_OK 0x00800000
#define | EMAC_RSV_MCAST 0x01000000
#define | EMAC_RSV_BCAST 0x02000000
#define | EMAC_RSV_DRIB_NIBB 0x04000000
#define | EMAC_RSV_CTRL_FRAME 0x08000000
#define | EMAC_RSV_PAUSE 0x10000000
#define | EMAC_RSV_UNSUPP_OPC 0x20000000
#define | EMAC_RSV_VLAN 0x40000000
#define | EMAC_FCC_MIRR_CNT(n) (n&0xFFFF)
#define | EMAC_FCC_PAUSE_TIM(n) ((n&0xFFFF)<<16)
#define | EMAC_FCS_MIRR_CNT(n) (n&0xFFFF)
#define | EMAC_RFC_UCAST_EN 0x00000001
#define | EMAC_RFC_BCAST_EN 0x00000002
#define | EMAC_RFC_MCAST_EN 0x00000004
#define | EMAC_RFC_UCAST_HASH_EN 0x00000008
#define | EMAC_RFC_MCAST_HASH_EN 0x00000010
#define | EMAC_RFC_PERFECT_EN 0x00000020
#define | EMAC_RFC_MAGP_WOL_EN 0x00001000
#define | EMAC_RFC_PFILT_WOL_EN 0x00002000
#define | EMAC_WOL_UCAST 0x00000001
#define | EMAC_WOL_BCAST 0x00000002
#define | EMAC_WOL_MCAST 0x00000004
#define | EMAC_WOL_UCAST_HASH 0x00000008
#define | EMAC_WOL_MCAST_HASH 0x00000010
#define | EMAC_WOL_PERFECT 0x00000020
#define | EMAC_WOL_RX_FILTER 0x00000080
#define | EMAC_WOL_MAG_PACKET 0x00000100
#define | EMAC_WOL_BITMASK 0x01BF
#define | EMAC_INT_RX_OVERRUN 0x00000001
#define | EMAC_INT_RX_ERR 0x00000002
#define | EMAC_INT_RX_FIN 0x00000004
#define | EMAC_INT_RX_DONE 0x00000008
#define | EMAC_INT_TX_UNDERRUN 0x00000010
#define | EMAC_INT_TX_ERR 0x00000020
#define | EMAC_INT_TX_FIN 0x00000040
#define | EMAC_INT_TX_DONE 0x00000080
#define | EMAC_INT_SOFT_INT 0x00001000
#define | EMAC_INT_WAKEUP 0x00002000
#define | EMAC_PD_POWER_DOWN 0x80000000
#define | EMAC_RCTRL_SIZE(n) (n&0x7FF)
#define | EMAC_RCTRL_INT 0x80000000
#define | EMAC_RHASH_SA 0x000001FF
#define | EMAC_RHASH_DA 0x001FF000
#define | EMAC_RINFO_SIZE 0x000007FF
#define | EMAC_RINFO_CTRL_FRAME 0x00040000
#define | EMAC_RINFO_VLAN 0x00080000
#define | EMAC_RINFO_FAIL_FILT 0x00100000
#define | EMAC_RINFO_MCAST 0x00200000
#define | EMAC_RINFO_BCAST 0x00400000
#define | EMAC_RINFO_CRC_ERR 0x00800000
#define | EMAC_RINFO_SYM_ERR 0x01000000
#define | EMAC_RINFO_LEN_ERR 0x02000000
#define | EMAC_RINFO_RANGE_ERR 0x04000000
#define | EMAC_RINFO_ALIGN_ERR 0x08000000
#define | EMAC_RINFO_OVERRUN 0x10000000
#define | EMAC_RINFO_NO_DESCR 0x20000000
#define | EMAC_RINFO_LAST_FLAG 0x40000000
#define | EMAC_RINFO_ERR 0x80000000
#define | EMAC_RINFO_ERR_MASK
#define | EMAC_TCTRL_SIZE 0x000007FF
#define | EMAC_TCTRL_OVERRIDE 0x04000000
#define | EMAC_TCTRL_HUGE 0x08000000
#define | EMAC_TCTRL_PAD 0x10000000
#define | EMAC_TCTRL_CRC 0x20000000
#define | EMAC_TCTRL_LAST 0x40000000
#define | EMAC_TCTRL_INT 0x80000000
#define | EMAC_TINFO_COL_CNT 0x01E00000
#define | EMAC_TINFO_DEFER 0x02000000
#define | EMAC_TINFO_EXCESS_DEF 0x04000000
#define | EMAC_TINFO_EXCESS_COL 0x08000000
#define | EMAC_TINFO_LATE_COL 0x10000000
#define | EMAC_TINFO_UNDERRUN 0x20000000
#define | EMAC_TINFO_NO_DESCR 0x40000000
#define | EMAC_TINFO_ERR 0x80000000
#define | EMAC_PHY_RESP_TOUT 0x100000UL
#define | EMAC_OLD_EMAC_MODULE_ID 0x39022000
#define | EMAC_PHY_REG_BMCR 0x00
#define | EMAC_PHY_REG_BMSR 0x01
#define | EMAC_PHY_REG_IDR1 0x02
#define | EMAC_PHY_REG_IDR2 0x03
#define | EMAC_PHY_REG_ANAR 0x04
#define | EMAC_PHY_REG_ANLPAR 0x05
#define | EMAC_PHY_REG_ANER 0x06
#define | EMAC_PHY_REG_ANNPTR 0x07
#define | EMAC_PHY_REG_LPNPA 0x08
#define | EMAC_PHY_REG_STS 0x10
#define | EMAC_PHY_REG_MICR 0x11
#define | EMAC_PHY_REG_MISR 0x12
#define | EMAC_PHY_REG_FCSCR 0x14
#define | EMAC_PHY_REG_RECR 0x15
#define | EMAC_PHY_REG_PCSR 0x16
#define | EMAC_PHY_REG_RBR 0x17
#define | EMAC_PHY_REG_LEDCR 0x18
#define | EMAC_PHY_REG_PHYCR 0x19
#define | EMAC_PHY_REG_10BTSCR 0x1A
#define | EMAC_PHY_REG_CDCTRL1 0x1B
#define | EMAC_PHY_REG_EDCR 0x1D
#define | EMAC_PHY_BMCR_RESET (1<<15)
#define | EMAC_PHY_BMCR_LOOPBACK (1<<14)
#define | EMAC_PHY_BMCR_SPEED_SEL (1<<13)
#define | EMAC_PHY_BMCR_AN (1<<12)
#define | EMAC_PHY_BMCR_POWERDOWN (1<<11)
#define | EMAC_PHY_BMCR_ISOLATE (1<<10)
#define | EMAC_PHY_BMCR_RE_AN (1<<9)
#define | EMAC_PHY_BMCR_DUPLEX (1<<8)
#define | EMAC_PHY_BMSR_100BE_T4 (1<<15)
#define | EMAC_PHY_BMSR_100TX_FULL (1<<14)
#define | EMAC_PHY_BMSR_100TX_HALF (1<<13)
#define | EMAC_PHY_BMSR_10BE_FULL (1<<12)
#define | EMAC_PHY_BMSR_10BE_HALF (1<<11)
#define | EMAC_PHY_BMSR_NOPREAM (1<<6)
#define | EMAC_PHY_BMSR_AUTO_DONE (1<<5)
#define | EMAC_PHY_BMSR_REMOTE_FAULT (1<<4)
#define | EMAC_PHY_BMSR_NO_AUTO (1<<3)
#define | EMAC_PHY_BMSR_LINK_ESTABLISHED (1<<2)
#define | EMAC_PHY_SR_REMOTE_FAULT (1<<6)
#define | EMAC_PHY_SR_JABBER (1<<5)
#define | EMAC_PHY_SR_AUTO_DONE (1<<4)
#define | EMAC_PHY_SR_LOOPBACK (1<<3)
#define | EMAC_PHY_SR_DUP (1<<2)
#define | EMAC_PHY_SR_SPEED (1<<1)
#define | EMAC_PHY_SR_LINK (1<<0)
#define | EMAC_PHY_FULLD_100M 0x2100
#define | EMAC_PHY_HALFD_100M 0x2000
#define | EMAC_PHY_FULLD_10M 0x0100
#define | EMAC_PHY_HALFD_10M 0x0000
#define | EMAC_PHY_AUTO_NEG 0x3000
#define | EMAC_DEF_ADR 0x0100
#define | EMAC_DP83848C_ID 0x20005C90
#define | EMAC_PHY_SR_100_SPEED ((1<<14)|(1<<13))
#define | EMAC_PHY_SR_FULL_DUP ((1<<14)|(1<<12))
#define | EMAC_PHY_BMSR_LINK_STATUS (1<<2)

Define Documentation

#define EMAC_CLRT_COLL ( n ) ((n&0x3F)<<8)

Programmable field representing the slot time or collision window during which collisions occur in properly configured networks

Definition at line 151 of file lpc17xx_emac.h.

#define EMAC_CLRT_DEF ((EMAC_CLRT_MAX_RETX(0x0F))|(EMAC_CLRT_COLL(0x37)))

Default value for Collision Window / Retry register

Definition at line 153 of file lpc17xx_emac.h.

#define EMAC_CLRT_MAX_RETX ( n ) (n&0x0F)

Macro defines for Collision Window/Retry Register Programmable field specifying the number of retransmission attempts following a collision before aborting the packet due to excessive collisions

Definition at line 148 of file lpc17xx_emac.h.

#define EMAC_CR_FULL_DUP 0x00000400

Full Duplex

Definition at line 234 of file lpc17xx_emac.h.

#define EMAC_CR_PASS_RUNT_FRM 0x00000040

Pass Runt Frames

Definition at line 230 of file lpc17xx_emac.h.

#define EMAC_CR_PASS_RX_FILT 0x00000080

Pass RX Filter

Definition at line 231 of file lpc17xx_emac.h.

#define EMAC_CR_REG_RES 0x00000008

Reset Host Registers

Definition at line 227 of file lpc17xx_emac.h.

#define EMAC_CR_RMII 0x00000200

Reduced MII Interface

Definition at line 233 of file lpc17xx_emac.h.

#define EMAC_CR_RX_EN 0x00000001

Macro defines for Command Register Enable Receive

Definition at line 225 of file lpc17xx_emac.h.

#define EMAC_CR_RX_RES 0x00000020

Reset Receive Datapath

Definition at line 229 of file lpc17xx_emac.h.

#define EMAC_CR_TX_EN 0x00000002

Enable Transmit

Definition at line 226 of file lpc17xx_emac.h.

#define EMAC_CR_TX_FLOW_CTRL 0x00000100

TX Flow Control

Definition at line 232 of file lpc17xx_emac.h.

#define EMAC_CR_TX_RES 0x00000010

Reset Transmit Datapath

Definition at line 228 of file lpc17xx_emac.h.

#define EMAC_DEF_ADR 0x0100

Default PHY device address

Definition at line 486 of file lpc17xx_emac.h.

#define EMAC_DP83848C_ID 0x20005C90

PHY Identifier

Definition at line 487 of file lpc17xx_emac.h.

#define EMAC_ETH_MAX_FLEN 1536

Max. Ethernet Frame Size

Definition at line 79 of file lpc17xx_emac.h.

#define EMAC_FCC_MIRR_CNT ( n ) (n&0xFFFF)

Macro defines for Flow Control Counter Register Mirror Counter

Definition at line 292 of file lpc17xx_emac.h.

#define EMAC_FCC_PAUSE_TIM ( n ) ((n&0xFFFF)<<16)

Pause Timer

Definition at line 293 of file lpc17xx_emac.h.

#define EMAC_FCS_MIRR_CNT ( n ) (n&0xFFFF)

Macro defines for Flow Control Status Register Mirror Counter Current

Definition at line 298 of file lpc17xx_emac.h.

#define EMAC_INT_RX_DONE 0x00000008

Receive Done

Definition at line 335 of file lpc17xx_emac.h.

#define EMAC_INT_RX_ERR 0x00000002

Receive Error

Definition at line 333 of file lpc17xx_emac.h.

#define EMAC_INT_RX_FIN 0x00000004

RX Finished Process Descriptors

Definition at line 334 of file lpc17xx_emac.h.

#define EMAC_INT_RX_OVERRUN 0x00000001

Macro defines for Interrupt Status/Enable/Clear/Set Registers Overrun Error in RX Queue

Definition at line 332 of file lpc17xx_emac.h.

#define EMAC_INT_SOFT_INT 0x00001000

Software Triggered Interrupt

Definition at line 340 of file lpc17xx_emac.h.

#define EMAC_INT_TX_DONE 0x00000080

Transmit Done

Definition at line 339 of file lpc17xx_emac.h.

#define EMAC_INT_TX_ERR 0x00000020

Transmit Error

Definition at line 337 of file lpc17xx_emac.h.

#define EMAC_INT_TX_FIN 0x00000040

TX Finished Process Descriptors

Definition at line 338 of file lpc17xx_emac.h.

#define EMAC_INT_TX_UNDERRUN 0x00000010

Transmit Underrun

Definition at line 336 of file lpc17xx_emac.h.

#define EMAC_INT_WAKEUP 0x00002000

Wakeup Event Interrupt

Definition at line 341 of file lpc17xx_emac.h.

#define EMAC_IPGR_NBBIPG_P1 ( n ) ((n&0x7F)<<8)

Programmable field representing the optional carrierSense window referenced in IEEE 802.3/4.2.3.2.1 'Carrier Deference'

Definition at line 139 of file lpc17xx_emac.h.

#define EMAC_IPGR_NBBIPG_P2 ( n ) (n&0x7F)

Macro defines for Non Back-to-Back Inter-Packet-Gap Register Programmable field representing the Non-Back-to-Back Inter-Packet-Gap

Definition at line 134 of file lpc17xx_emac.h.

#define EMAC_IPGR_P1_DEF EMAC_IPGR_NBBIPG_P1(0x0C)

Recommended value for Programmable field representing the Non-Back-to-Back Inter-Packet-Gap Part 2

Definition at line 141 of file lpc17xx_emac.h.

#define EMAC_IPGR_P2_DEF (EMAC_IPGR_NBBIPG_P2(0x12))

Recommended value for Programmable field representing the Non-Back-to-Back Inter-Packet-Gap Part 1

Definition at line 136 of file lpc17xx_emac.h.

#define EMAC_IPGT_BBIPG ( n ) (n&0x7F)

Macro defines for Back-to-Back Inter-Packet-Gap Register Programmable field representing the nibble time offset of the minimum possible period between the end of any transmitted packet to the beginning of the next

Definition at line 120 of file lpc17xx_emac.h.

#define EMAC_IPGT_FULL_DUP (EMAC_IPGT_BBIPG(0x15))

Recommended value for Full Duplex of Programmable field representing the nibble time offset of the minimum possible period between the end of any transmitted packet to the beginning of the next

Definition at line 124 of file lpc17xx_emac.h.

#define EMAC_IPGT_HALF_DUP (EMAC_IPGT_BBIPG(0x12))

Recommended value for Half Duplex of Programmable field representing the nibble time offset of the minimum possible period between the end of any transmitted packet to the beginning of the next

Definition at line 128 of file lpc17xx_emac.h.

#define EMAC_MAC1_LOOPB 0x00000010

Loop Back Mode

Definition at line 90 of file lpc17xx_emac.h.

#define EMAC_MAC1_PASS_ALL 0x00000002

Pass All Receive Frames

Definition at line 87 of file lpc17xx_emac.h.

#define EMAC_MAC1_REC_EN 0x00000001

Macro defines for MAC Configuration Register 1 Receive Enable

Definition at line 86 of file lpc17xx_emac.h.

#define EMAC_MAC1_RES_MCS_RX 0x00000800

Reset MAC RX Control Sublayer

Definition at line 94 of file lpc17xx_emac.h.

#define EMAC_MAC1_RES_MCS_TX 0x00000200

Reset MAC TX Control Sublayer

Definition at line 92 of file lpc17xx_emac.h.

#define EMAC_MAC1_RES_RX 0x00000400

Reset RX Logic

Definition at line 93 of file lpc17xx_emac.h.

#define EMAC_MAC1_RES_TX 0x00000100

Reset TX Logic

Definition at line 91 of file lpc17xx_emac.h.

#define EMAC_MAC1_RX_FLOWC 0x00000004

RX Flow Control

Definition at line 88 of file lpc17xx_emac.h.

#define EMAC_MAC1_SIM_RES 0x00004000

Simulation Reset

Definition at line 95 of file lpc17xx_emac.h.

#define EMAC_MAC1_SOFT_RES 0x00008000

Soft Reset MAC

Definition at line 96 of file lpc17xx_emac.h.

#define EMAC_MAC1_TX_FLOWC 0x00000008

TX Flow Control

Definition at line 89 of file lpc17xx_emac.h.

#define EMAC_MAC2_ADET_PAD_EN 0x00000080

Auto Detect Pad Enable

Definition at line 108 of file lpc17xx_emac.h.

#define EMAC_MAC2_BACK_PRESSURE 0x00002000

Backoff Presurre / No Backoff

Definition at line 112 of file lpc17xx_emac.h.

#define EMAC_MAC2_CRC_EN 0x00000010

Append CRC to every Frame

Definition at line 105 of file lpc17xx_emac.h.

#define EMAC_MAC2_DLY_CRC 0x00000008

Delayed CRC Mode

Definition at line 104 of file lpc17xx_emac.h.

#define EMAC_MAC2_EXCESS_DEF 0x00004000

Excess Defer

Definition at line 113 of file lpc17xx_emac.h.

#define EMAC_MAC2_FRM_LEN_CHK 0x00000002

Frame Length Checking

Definition at line 102 of file lpc17xx_emac.h.

#define EMAC_MAC2_FULL_DUP 0x00000001

Macro defines for MAC Configuration Register 2 Full-Duplex Mode

Definition at line 101 of file lpc17xx_emac.h.

#define EMAC_MAC2_HUGE_FRM_EN 0x00000004

Huge Frame Enable

Definition at line 103 of file lpc17xx_emac.h.

#define EMAC_MAC2_LPREAM_ENF 0x00000200

Long Preamble Enforcement

Definition at line 110 of file lpc17xx_emac.h.

#define EMAC_MAC2_NO_BACKOFF 0x00001000

No Backoff Algorithm

Definition at line 111 of file lpc17xx_emac.h.

#define EMAC_MAC2_PAD_EN 0x00000020

Pad all Short Frames

Definition at line 106 of file lpc17xx_emac.h.

#define EMAC_MAC2_PPREAM_ENF 0x00000100

Pure Preamble Enforcement

Definition at line 109 of file lpc17xx_emac.h.

#define EMAC_MAC2_VLAN_PAD_EN 0x00000040

VLAN Pad Enable

Definition at line 107 of file lpc17xx_emac.h.

#define EMAC_MADR_PHY_ADR ( n ) ((n&0x1F)<<8)

PHY Address Field

Definition at line 196 of file lpc17xx_emac.h.

#define EMAC_MADR_REG_ADR ( n ) (n&0x1F)

Macro defines for MII Management Address Register MII Register Address field

Definition at line 195 of file lpc17xx_emac.h.

#define EMAC_MAXF_MAXFRMLEN ( n ) (n&0xFFFF)

Macro defines for Maximum Frame Register Represents a maximum receive frame of 1536 octets

Definition at line 159 of file lpc17xx_emac.h.

#define EMAC_MCFG_CLK_SEL ( n ) ((n&0x0F)<<2)

Clock Select Field

Definition at line 179 of file lpc17xx_emac.h.

#define EMAC_MCFG_MII_MAXCLK 2500000UL

MII Clock max

Definition at line 181 of file lpc17xx_emac.h.

#define EMAC_MCFG_RES_MII 0x00008000

Reset MII Management Hardware

Definition at line 180 of file lpc17xx_emac.h.

#define EMAC_MCFG_SCAN_INC 0x00000001

Macro defines for MII Management Configuration Register Scan Increment PHY Address

Definition at line 177 of file lpc17xx_emac.h.

#define EMAC_MCFG_SUPP_PREAM 0x00000002

Suppress Preamble

Definition at line 178 of file lpc17xx_emac.h.

#define EMAC_MCMD_READ 0x00000001

Macro defines for MII Management Command Register MII Read

Definition at line 186 of file lpc17xx_emac.h.

#define EMAC_MCMD_SCAN 0x00000002

MII Scan continuously

Definition at line 187 of file lpc17xx_emac.h.

#define EMAC_MII_RD_TOUT 0x00050000

MII Read timeout count

Definition at line 190 of file lpc17xx_emac.h.

#define EMAC_MII_WR_TOUT 0x00050000

MII Write timeout count

Definition at line 189 of file lpc17xx_emac.h.

#define EMAC_MIND_BUSY 0x00000001

Macro defines for MII Management Indicators Register MII is Busy

Definition at line 211 of file lpc17xx_emac.h.

#define EMAC_MIND_MII_LINK_FAIL 0x00000008

MII Link Failed

Definition at line 214 of file lpc17xx_emac.h.

#define EMAC_MIND_NOT_VAL 0x00000004

MII Read Data not valid

Definition at line 213 of file lpc17xx_emac.h.

#define EMAC_MIND_SCAN 0x00000002

MII Scanning in Progress

Definition at line 212 of file lpc17xx_emac.h.

#define EMAC_MRDD_DATA ( n ) (n&0xFFFF)

Macro defines for MII Management Read Data Register Data field for MMI Management Read Data register

Definition at line 206 of file lpc17xx_emac.h.

#define EMAC_MWTD_DATA ( n ) (n&0xFFFF)

Macro defines for MII Management Write Data Register Data field for MMI Management Write Data register

Definition at line 201 of file lpc17xx_emac.h.

#define EMAC_NUM_RX_FRAG 4

Num.of RX Fragments 4*1536= 6.0kB

Definition at line 77 of file lpc17xx_emac.h.

#define EMAC_NUM_TX_FRAG 3

Num.of TX Fragments 3*1536= 4.6kB

Definition at line 78 of file lpc17xx_emac.h.

#define EMAC_OLD_EMAC_MODULE_ID 0x39022000

Rev. ID for first rev '-'

Definition at line 412 of file lpc17xx_emac.h.

#define EMAC_PD_POWER_DOWN 0x80000000

Macro defines for Power Down Register Power Down MAC

Definition at line 346 of file lpc17xx_emac.h.

#define EMAC_PHY_AUTO_NEG 0x3000

Select Auto Negotiation

Definition at line 484 of file lpc17xx_emac.h.

#define EMAC_PHY_BMCR_AN (1<<12)

Auto Negotiation

Definition at line 449 of file lpc17xx_emac.h.

#define EMAC_PHY_BMCR_DUPLEX (1<<8)

Duplex mode

Definition at line 453 of file lpc17xx_emac.h.

#define EMAC_PHY_BMCR_ISOLATE (1<<10)

Isolate

Definition at line 451 of file lpc17xx_emac.h.

#define EMAC_PHY_BMCR_LOOPBACK (1<<14)

Loop back

Definition at line 447 of file lpc17xx_emac.h.

#define EMAC_PHY_BMCR_POWERDOWN (1<<11)

Power down mode

Definition at line 450 of file lpc17xx_emac.h.

#define EMAC_PHY_BMCR_RE_AN (1<<9)

Restart auto negotiation

Definition at line 452 of file lpc17xx_emac.h.

#define EMAC_PHY_BMCR_RESET (1<<15)

Macro defines for PHY Basic Mode Control Register Reset bit

Definition at line 446 of file lpc17xx_emac.h.

#define EMAC_PHY_BMCR_SPEED_SEL (1<<13)

Speed selection

Definition at line 448 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_100BE_T4 (1<<15)

Macro defines for PHY Basic Mode Status Status Register 100 base T4

Definition at line 458 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_100TX_FULL (1<<14)

100 base full duplex

Definition at line 459 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_100TX_HALF (1<<13)

100 base half duplex

Definition at line 460 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_10BE_FULL (1<<12)

10 base T full duplex

Definition at line 461 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_10BE_HALF (1<<11)

10 base T half duplex

Definition at line 462 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_AUTO_DONE (1<<5)

Auto negotiation complete

Definition at line 464 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_LINK_ESTABLISHED (1<<2)

Link status

Definition at line 467 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_LINK_STATUS (1<<2)

Link status

Definition at line 491 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_NO_AUTO (1<<3)

Auto Negotiation ability

Definition at line 466 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_NOPREAM (1<<6)

MF Preamable Supress

Definition at line 463 of file lpc17xx_emac.h.

#define EMAC_PHY_BMSR_REMOTE_FAULT (1<<4)

Remote fault

Definition at line 465 of file lpc17xx_emac.h.

#define EMAC_PHY_FULLD_100M 0x2100

Full Duplex 100Mbit

Definition at line 480 of file lpc17xx_emac.h.

#define EMAC_PHY_FULLD_10M 0x0100

Full Duplex 10Mbit

Definition at line 482 of file lpc17xx_emac.h.

#define EMAC_PHY_HALFD_100M 0x2000

Half Duplex 100Mbit

Definition at line 481 of file lpc17xx_emac.h.

#define EMAC_PHY_HALFD_10M 0x0000

Half Duplex 10MBit

Definition at line 483 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_10BTSCR 0x1A

10Base-T Status/Control Register

Definition at line 439 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_ANAR 0x04

Auto-Negotiation Advertisement

Definition at line 421 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_ANER 0x06

Auto-Neg. Expansion Register

Definition at line 423 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_ANLPAR 0x05

Auto-Neg. Link Partner Abitily

Definition at line 422 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_ANNPTR 0x07

Auto-Neg. Next Page TX

Definition at line 424 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_BMCR 0x00

Macro defines for DP83848C PHY Registers Basic Mode Control Register

Definition at line 417 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_BMSR 0x01

Basic Mode Status Register

Definition at line 418 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_CDCTRL1 0x1B

CD Test Control and BIST Extens.

Definition at line 440 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_EDCR 0x1D

Energy Detect Control Register

Definition at line 441 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_FCSCR 0x14

False Carrier Sense Counter

Definition at line 433 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_IDR1 0x02

PHY Identifier 1

Definition at line 419 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_IDR2 0x03

PHY Identifier 2

Definition at line 420 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_LEDCR 0x18

LED Direct Control Register

Definition at line 437 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_LPNPA 0x08

Definition at line 425 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_MICR 0x11

MII Interrupt Control Register

Definition at line 431 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_MISR 0x12

MII Interrupt Status Register

Definition at line 432 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_PCSR 0x16

PCS Sublayer Config. and Status

Definition at line 435 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_PHYCR 0x19

PHY Control Register

Definition at line 438 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_RBR 0x17

RMII and Bypass Register

Definition at line 436 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_RECR 0x15

Receive Error Counter

Definition at line 434 of file lpc17xx_emac.h.

#define EMAC_PHY_REG_STS 0x10

Macro defines for PHY Extended Registers Status Register

Definition at line 430 of file lpc17xx_emac.h.

#define EMAC_PHY_RESP_TOUT 0x100000UL

PHY device reset time out definition

Definition at line 409 of file lpc17xx_emac.h.

#define EMAC_PHY_SR_100_SPEED ((1<<14)|(1<<13))

Definition at line 489 of file lpc17xx_emac.h.

#define EMAC_PHY_SR_AUTO_DONE (1<<4)

Auto Negotiation complete

Definition at line 474 of file lpc17xx_emac.h.

#define EMAC_PHY_SR_DUP (1<<2)

Duplex status

Definition at line 476 of file lpc17xx_emac.h.

#define EMAC_PHY_SR_FULL_DUP ((1<<14)|(1<<12))

Definition at line 490 of file lpc17xx_emac.h.

#define EMAC_PHY_SR_JABBER (1<<5)

Jabber detect

Definition at line 473 of file lpc17xx_emac.h.

#define EMAC_PHY_SR_LINK (1<<0)

Link Status

Definition at line 478 of file lpc17xx_emac.h.

#define EMAC_PHY_SR_LOOPBACK (1<<3)

Loop back status

Definition at line 475 of file lpc17xx_emac.h.

#define EMAC_PHY_SR_REMOTE_FAULT (1<<6)

Macro defines for PHY Status Register Remote Fault

Definition at line 472 of file lpc17xx_emac.h.

#define EMAC_PHY_SR_SPEED (1<<1)

Speed status

Definition at line 477 of file lpc17xx_emac.h.

#define EMAC_RCTRL_INT 0x80000000

Generate RxDone Interrupt

Definition at line 353 of file lpc17xx_emac.h.

#define EMAC_RCTRL_SIZE ( n ) (n&0x7FF)

Macro defines for RX Descriptor Control Word Buffer size field

Definition at line 352 of file lpc17xx_emac.h.

#define EMAC_RFC_BCAST_EN 0x00000002

Accept Broadcast Frames Enable

Definition at line 306 of file lpc17xx_emac.h.

#define EMAC_RFC_MAGP_WOL_EN 0x00001000

Magic Packet Filter WoL Enable

Definition at line 311 of file lpc17xx_emac.h.

#define EMAC_RFC_MCAST_EN 0x00000004

Accept Multicast Frames Enable

Definition at line 307 of file lpc17xx_emac.h.

#define EMAC_RFC_MCAST_HASH_EN 0x00000010

Accept Multicast Hash Filter Fram.

Definition at line 309 of file lpc17xx_emac.h.

#define EMAC_RFC_PERFECT_EN 0x00000020

Accept Perfect Match Enable

Definition at line 310 of file lpc17xx_emac.h.

#define EMAC_RFC_PFILT_WOL_EN 0x00002000

Perfect Filter WoL Enable

Definition at line 312 of file lpc17xx_emac.h.

#define EMAC_RFC_UCAST_EN 0x00000001

Macro defines for Receive Filter Control Register Accept Unicast Frames Enable

Definition at line 305 of file lpc17xx_emac.h.

#define EMAC_RFC_UCAST_HASH_EN 0x00000008

Accept Unicast Hash Filter Frames

Definition at line 308 of file lpc17xx_emac.h.

#define EMAC_RHASH_DA 0x001FF000

Hash CRC for Destination Address

Definition at line 359 of file lpc17xx_emac.h.

#define EMAC_RHASH_SA 0x000001FF

Macro defines for RX Status Hash CRC Word Hash CRC for Source Address

Definition at line 358 of file lpc17xx_emac.h.

#define EMAC_RINFO_ALIGN_ERR 0x08000000

Alignment Error

Definition at line 374 of file lpc17xx_emac.h.

#define EMAC_RINFO_BCAST 0x00400000

Broadcast Frame

Definition at line 369 of file lpc17xx_emac.h.

#define EMAC_RINFO_CRC_ERR 0x00800000

CRC Error in Frame

Definition at line 370 of file lpc17xx_emac.h.

#define EMAC_RINFO_CTRL_FRAME 0x00040000

Control Frame

Definition at line 365 of file lpc17xx_emac.h.

#define EMAC_RINFO_ERR 0x80000000

Error Occured (OR of all errors)

Definition at line 378 of file lpc17xx_emac.h.

#define EMAC_RINFO_ERR_MASK
Value:
(EMAC_RINFO_FAIL_FILT | EMAC_RINFO_CRC_ERR   | EMAC_RINFO_SYM_ERR | \
EMAC_RINFO_LEN_ERR   | EMAC_RINFO_ALIGN_ERR | EMAC_RINFO_OVERRUN)

Definition at line 379 of file lpc17xx_emac.h.

#define EMAC_RINFO_FAIL_FILT 0x00100000

RX Filter Failed

Definition at line 367 of file lpc17xx_emac.h.

#define EMAC_RINFO_LAST_FLAG 0x40000000

Last Fragment in Frame

Definition at line 377 of file lpc17xx_emac.h.

#define EMAC_RINFO_LEN_ERR 0x02000000

Length Error

Definition at line 372 of file lpc17xx_emac.h.

#define EMAC_RINFO_MCAST 0x00200000

Multicast Frame

Definition at line 368 of file lpc17xx_emac.h.

#define EMAC_RINFO_NO_DESCR 0x20000000

No new Descriptor available

Definition at line 376 of file lpc17xx_emac.h.

#define EMAC_RINFO_OVERRUN 0x10000000

Receive overrun

Definition at line 375 of file lpc17xx_emac.h.

#define EMAC_RINFO_RANGE_ERR 0x04000000

Range Error (exceeded max. size)

Definition at line 373 of file lpc17xx_emac.h.

#define EMAC_RINFO_SIZE 0x000007FF

Macro defines for RX Status Information Word Data size in bytes

Definition at line 364 of file lpc17xx_emac.h.

#define EMAC_RINFO_SYM_ERR 0x01000000

Symbol Error from PHY

Definition at line 371 of file lpc17xx_emac.h.

#define EMAC_RINFO_VLAN 0x00080000

VLAN Frame

Definition at line 366 of file lpc17xx_emac.h.

#define EMAC_RSV_BCAST 0x02000000

Broadcast Frame

Definition at line 282 of file lpc17xx_emac.h.

#define EMAC_RSV_BYTE_CNT 0x0000FFFF

Macro defines for Receive Status Vector Register Receive Byte Count

Definition at line 272 of file lpc17xx_emac.h.

#define EMAC_RSV_CARR_SEEN 0x00040000

Carrier Event Previously Seen

Definition at line 275 of file lpc17xx_emac.h.

#define EMAC_RSV_CRC_ERR 0x00100000

CRC Error

Definition at line 277 of file lpc17xx_emac.h.

#define EMAC_RSV_CTRL_FRAME 0x08000000

Control Frame

Definition at line 284 of file lpc17xx_emac.h.

#define EMAC_RSV_DRIB_NIBB 0x04000000

Dribble Nibble

Definition at line 283 of file lpc17xx_emac.h.

#define EMAC_RSV_LEN_CHKERR 0x00200000

Length Check Error

Definition at line 278 of file lpc17xx_emac.h.

#define EMAC_RSV_LEN_OUTRNG 0x00400000

Length Out of Range

Definition at line 279 of file lpc17xx_emac.h.

#define EMAC_RSV_MCAST 0x01000000

Multicast Frame

Definition at line 281 of file lpc17xx_emac.h.

#define EMAC_RSV_PAUSE 0x10000000

Pause Frame

Definition at line 285 of file lpc17xx_emac.h.

#define EMAC_RSV_PKT_IGNORED 0x00010000

Packet Previously Ignored

Definition at line 273 of file lpc17xx_emac.h.

#define EMAC_RSV_REC_CODEV 0x00080000

Receive Code Violation

Definition at line 276 of file lpc17xx_emac.h.

#define EMAC_RSV_REC_OK 0x00800000

Frame Received OK

Definition at line 280 of file lpc17xx_emac.h.

#define EMAC_RSV_RXDV_SEEN 0x00020000

RXDV Event Previously Seen

Definition at line 274 of file lpc17xx_emac.h.

#define EMAC_RSV_UNSUPP_OPC 0x20000000

Unsupported Opcode

Definition at line 286 of file lpc17xx_emac.h.

#define EMAC_RSV_VLAN 0x40000000

VLAN Frame

Definition at line 287 of file lpc17xx_emac.h.

#define EMAC_SR_RX_EN 0x00000001

Macro defines for Status Register Enable Receive

Definition at line 239 of file lpc17xx_emac.h.

#define EMAC_SR_TX_EN 0x00000002

Enable Transmit

Definition at line 240 of file lpc17xx_emac.h.

#define EMAC_SUPP_SPEED 0x00000100

Macro defines for PHY Support Register Reduced MII Logic Current Speed

Definition at line 164 of file lpc17xx_emac.h.

#define EMAC_TCTRL_CRC 0x20000000

Append a hardware CRC to Frame

Definition at line 389 of file lpc17xx_emac.h.

#define EMAC_TCTRL_HUGE 0x08000000

Enable Huge Frame

Definition at line 387 of file lpc17xx_emac.h.

#define EMAC_TCTRL_INT 0x80000000

Generate TxDone Interrupt

Definition at line 391 of file lpc17xx_emac.h.

#define EMAC_TCTRL_LAST 0x40000000

Last Descriptor for TX Frame

Definition at line 390 of file lpc17xx_emac.h.

#define EMAC_TCTRL_OVERRIDE 0x04000000

Override Default MAC Registers

Definition at line 386 of file lpc17xx_emac.h.

#define EMAC_TCTRL_PAD 0x10000000

Pad short Frames to 64 bytes

Definition at line 388 of file lpc17xx_emac.h.

#define EMAC_TCTRL_SIZE 0x000007FF

Macro defines for TX Descriptor Control Word Size of data buffer in bytes

Definition at line 385 of file lpc17xx_emac.h.

#define EMAC_TEST_SHCUT_PQUANTA 0x00000001

Macro defines for Test Register Shortcut Pause Quanta

Definition at line 170 of file lpc17xx_emac.h.

#define EMAC_TEST_TST_BACKP 0x00000004

Test Back Pressure

Definition at line 172 of file lpc17xx_emac.h.

#define EMAC_TEST_TST_PAUSE 0x00000002

Test Pause

Definition at line 171 of file lpc17xx_emac.h.

#define EMAC_TINFO_COL_CNT 0x01E00000

Macro defines for TX Status Information Word Collision Count

Definition at line 396 of file lpc17xx_emac.h.

#define EMAC_TINFO_DEFER 0x02000000

Packet Deferred (not an error)

Definition at line 397 of file lpc17xx_emac.h.

#define EMAC_TINFO_ERR 0x80000000

Error Occured (OR of all errors)

Definition at line 403 of file lpc17xx_emac.h.

#define EMAC_TINFO_EXCESS_COL 0x08000000

Excessive Collision

Definition at line 399 of file lpc17xx_emac.h.

#define EMAC_TINFO_EXCESS_DEF 0x04000000

Excessive Deferral

Definition at line 398 of file lpc17xx_emac.h.

#define EMAC_TINFO_LATE_COL 0x10000000

Late Collision Occured

Definition at line 400 of file lpc17xx_emac.h.

#define EMAC_TINFO_NO_DESCR 0x40000000

No new Descriptor available

Definition at line 402 of file lpc17xx_emac.h.

#define EMAC_TINFO_UNDERRUN 0x20000000

Transmit Underrun

Definition at line 401 of file lpc17xx_emac.h.

#define EMAC_TSV0_BACK_PRESS 0x40000000

Backpressure Method Applied

Definition at line 260 of file lpc17xx_emac.h.

#define EMAC_TSV0_BCAST 0x00000020

Broadcast Destination

Definition at line 250 of file lpc17xx_emac.h.

#define EMAC_TSV0_BYTES 0x0FFFF000

Total Bytes Transferred

Definition at line 257 of file lpc17xx_emac.h.

#define EMAC_TSV0_CRC_ERR 0x00000001

Macro defines for Transmit Status Vector 0 Register CRC error

Definition at line 245 of file lpc17xx_emac.h.

#define EMAC_TSV0_CTRL_FRAME 0x10000000

Control Frame

Definition at line 258 of file lpc17xx_emac.h.

#define EMAC_TSV0_DONE 0x00000008

Tramsmission Completed

Definition at line 248 of file lpc17xx_emac.h.

#define EMAC_TSV0_EXC_COLL 0x00000100

Excessive Collision

Definition at line 253 of file lpc17xx_emac.h.

#define EMAC_TSV0_EXC_DEFER 0x00000080

Excessive Packet Deferral

Definition at line 252 of file lpc17xx_emac.h.

#define EMAC_TSV0_GIANT 0x00000400

Giant Frame

Definition at line 255 of file lpc17xx_emac.h.

#define EMAC_TSV0_LATE_COLL 0x00000200

Late Collision Occured

Definition at line 254 of file lpc17xx_emac.h.

#define EMAC_TSV0_LEN_CHKERR 0x00000002

Length Check Error

Definition at line 246 of file lpc17xx_emac.h.

#define EMAC_TSV0_LEN_OUTRNG 0x00000004

Length Out of Range

Definition at line 247 of file lpc17xx_emac.h.

#define EMAC_TSV0_MCAST 0x00000010

Multicast Destination

Definition at line 249 of file lpc17xx_emac.h.

#define EMAC_TSV0_PAUSE 0x20000000

Pause Frame

Definition at line 259 of file lpc17xx_emac.h.

#define EMAC_TSV0_PKT_DEFER 0x00000040

Packet Deferred

Definition at line 251 of file lpc17xx_emac.h.

#define EMAC_TSV0_UNDERRUN 0x00000800

Buffer Underrun

Definition at line 256 of file lpc17xx_emac.h.

#define EMAC_TSV0_VLAN 0x80000000

VLAN Frame

Definition at line 261 of file lpc17xx_emac.h.

#define EMAC_TSV1_BYTE_CNT 0x0000FFFF

Macro defines for Transmit Status Vector 1 Register Transmit Byte Count

Definition at line 266 of file lpc17xx_emac.h.

#define EMAC_TSV1_COLL_CNT 0x000F0000

Transmit Collision Count

Definition at line 267 of file lpc17xx_emac.h.

#define EMAC_TX_FRAME_TOUT 0x00100000

Frame Transmit timeout count

Definition at line 80 of file lpc17xx_emac.h.

#define EMAC_WOL_BCAST 0x00000002

Broadcast Frame caused WoL

Definition at line 318 of file lpc17xx_emac.h.

#define EMAC_WOL_BITMASK 0x01BF

Receive Filter WoL Status/Clear bitmasl value

Definition at line 325 of file lpc17xx_emac.h.

#define EMAC_WOL_MAG_PACKET 0x00000100

Magic Packet Filter caused WoL

Definition at line 324 of file lpc17xx_emac.h.

#define EMAC_WOL_MCAST 0x00000004

Multicast Frame caused WoL

Definition at line 319 of file lpc17xx_emac.h.

#define EMAC_WOL_MCAST_HASH 0x00000010

Multicast Hash Filter Frame WoL

Definition at line 321 of file lpc17xx_emac.h.

#define EMAC_WOL_PERFECT 0x00000020

Perfect Filter WoL

Definition at line 322 of file lpc17xx_emac.h.

#define EMAC_WOL_RX_FILTER 0x00000080

RX Filter caused WoL

Definition at line 323 of file lpc17xx_emac.h.

#define EMAC_WOL_UCAST 0x00000001

Macro defines for Receive Filter WoL Status/Clear Registers Unicast Frame caused WoL

Definition at line 317 of file lpc17xx_emac.h.

#define EMAC_WOL_UCAST_HASH 0x00000008

Unicast Hash Filter Frame WoL

Definition at line 320 of file lpc17xx_emac.h.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EMAC Public Types

Data Structures
EMAC Public Types
EMAC (Ethernet Media Access Controller)

Data Structures

struct | RX_Desc
RX Descriptor structure type definition. More...
struct | RX_Stat
RX Status structure type definition. More...
struct | TX_Desc
TX Descriptor structure type definition. More...
struct | TX_Stat
TX Status structure type definition. More...
struct | EMAC_PACKETBUF_Type
TX Data Buffer structure definition. More...
struct | EMAC_CFG_Type
EMAC configuration structure definition. More...
Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EMAC Public Functions

Functions
EMAC Public Functions
EMAC (Ethernet Media Access Controller)

Functions

Status | EMAC_Init (EMAC_CFG_Type *EMAC_ConfigStruct)
Initializes the EMAC peripheral according to the specified parameters in the EMAC_ConfigStruct.
void | EMAC_DeInit (void)
De-initializes the EMAC peripheral registers to their default reset values.
int32_t | EMAC_CheckPHYStatus (uint32_t ulPHYState)
Check specified PHY status in EMAC peripheral.
int32_t | EMAC_SetPHYMode (uint32_t ulPHYMode)
Set specified PHY mode in EMAC peripheral.
int32_t | EMAC_UpdatePHYStatus (void)
Auto-Configures value for the EMAC configuration register to match with current PHY mode.
void | EMAC_SetHashFilter (uint8_t dstMAC_addr[], FunctionalState NewState)
Enable/Disable hash filter functionality for specified destination MAC address in EMAC module.
void | EMAC_SetFilterMode (uint32_t ulFilterMode, FunctionalState NewState)
Enable/Disable Filter mode for each specified type EMAC peripheral.
void | EMAC_WritePacketBuffer (EMAC_PACKETBUF_Type *pDataStruct)
Write data to Tx packet data buffer at current index due to TxProduceIndex.
void | EMAC_ReadPacketBuffer (EMAC_PACKETBUF_Type *pDataStruct)
Read data from Rx packet data buffer at current index due to RxConsumeIndex.
void | EMAC_IntCmd (uint32_t ulIntType, FunctionalState NewState)
Enable/Disable interrupt for each type in EMAC.
IntStatus | EMAC_IntGetStatus (uint32_t ulIntType)
Check whether if specified interrupt flag is set or not for each interrupt type in EMAC and clear interrupt pending if it is set.
Bool | EMAC_CheckReceiveIndex (void)
Check whether if the current RxConsumeIndex is not equal to the current RxProduceIndex.
Bool | EMAC_CheckTransmitIndex (void)
Check whether if the current TxProduceIndex is not equal to the current RxProduceIndex - 1.
void | EMAC_UpdateRxConsumeIndex (void)
Increase the RxConsumeIndex (after reading the Receive buffer to release the Receive buffer) and wrap-around the index if it reaches the maximum Receive Number.
void | EMAC_UpdateTxProduceIndex (void)
Increase the TxProduceIndex (after writting to the Transmit buffer to enable the Transmit buffer) and wrap-around the index if it reaches the maximum Transmit Number.
FlagStatus | EMAC_CheckReceiveDataStatus (uint32_t ulRxStatType)
Get current status value of receive data (due to RxConsumeIndex)
uint32_t | EMAC_GetReceiveDataSize (void)
Get size of current Received data in received buffer (due to RxConsumeIndex)
FlagStatus | EMAC_GetWoLStatus (uint32_t ulWoLMode)
Get status of Wake On LAN Filter for each specified type in EMAC peripheral, clear this status if it is set.

Function Documentation

int32_t EMAC_CheckPHYStatus ( uint32_t ulPHYState )

Check specified PHY status in EMAC peripheral.

Parameters:
[in] ulPHYState Specified PHY Status Type, should be:
  • EMAC_PHY_STAT_LINK: Link Status
  • EMAC_PHY_STAT_SPEED: Speed Status
  • EMAC_PHY_STAT_DUP: Duplex Status
Returns:
Status of specified PHY status (0 or 1). (-1) if error.

Note: For EMAC_PHY_STAT_LINK, return value:

  • 0: Link Down
  • 1: Link Up For EMAC_PHY_STAT_SPEED, return value:
  • 0: 10Mbps
  • 1: 100Mbps For EMAC_PHY_STAT_DUP, return value:
  • 0: Half-Duplex
  • 1: Full-Duplex

Definition at line 420 of file lpc17xx_emac.c.

FlagStatus EMAC_CheckReceiveDataStatus ( uint32_t ulRxStatType )

Get current status value of receive data (due to RxConsumeIndex)

Parameters:
[in] ulRxStatType Received Status type, should be one of following:
  • EMAC_RINFO_CTRL_FRAME: Control Frame
  • EMAC_RINFO_VLAN: VLAN Frame
  • EMAC_RINFO_FAIL_FILT: RX Filter Failed
  • EMAC_RINFO_MCAST: Multicast Frame
  • EMAC_RINFO_BCAST: Broadcast Frame
  • EMAC_RINFO_CRC_ERR: CRC Error in Frame
  • EMAC_RINFO_SYM_ERR: Symbol Error from PHY
  • EMAC_RINFO_LEN_ERR: Length Error
  • EMAC_RINFO_RANGE_ERR: Range error(exceeded max size)
  • EMAC_RINFO_ALIGN_ERR: Alignment error
  • EMAC_RINFO_OVERRUN: Receive overrun
  • EMAC_RINFO_NO_DESCR: No new Descriptor available
  • EMAC_RINFO_LAST_FLAG: last Fragment in Frame
  • EMAC_RINFO_ERR: Error Occurred (OR of all error)
Returns:
Current value of receive data (due to RxConsumeIndex)

Definition at line 891 of file lpc17xx_emac.c.

Bool EMAC_CheckReceiveIndex ( void )

Check whether if the current RxConsumeIndex is not equal to the current RxProduceIndex.

Parameters:
[in] None
Returns:
TRUE if they're not equal, otherwise return FALSE

Note: In case the RxConsumeIndex is not equal to the RxProduceIndex, it means there're available data has been received. They should be read out and released the Receive Data Buffer by updating the RxConsumeIndex value.

Definition at line 841 of file lpc17xx_emac.c.

Bool EMAC_CheckTransmitIndex ( void )

Check whether if the current TxProduceIndex is not equal to the current RxProduceIndex - 1.

Parameters:
[in] None
Returns:
TRUE if they're not equal, otherwise return FALSE

Note: In case the RxConsumeIndex is equal to the RxProduceIndex - 1, it means the transmit buffer is available and data can be written to transmit buffer to be sent.

Definition at line 861 of file lpc17xx_emac.c.

void EMAC_DeInit ( void )

De-initializes the EMAC peripheral registers to their default reset values.

Parameters:
[in] None
Returns:
None

Definition at line 388 of file lpc17xx_emac.c.

uint32_t EMAC_GetReceiveDataSize ( void )

Get size of current Received data in received buffer (due to RxConsumeIndex)

Parameters:
[in] None
Returns:
Size of received data

Definition at line 905 of file lpc17xx_emac.c.

FlagStatus EMAC_GetWoLStatus ( uint32_t ulWoLMode )

Get status of Wake On LAN Filter for each specified type in EMAC peripheral, clear this status if it is set.

Parameters:
[in] ulWoLMode WoL Filter mode, should be:
  • EMAC_WOL_UCAST: unicast frames caused WoL
  • EMAC_WOL_UCAST: broadcast frame caused WoL
  • EMAC_WOL_MCAST: multicast frame caused WoL
  • EMAC_WOL_UCAST_HASH: unicast frame that passes the imperfect hash filter caused WoL
  • EMAC_WOL_MCAST_HASH: multicast frame that passes the imperfect hash filter caused WoL
  • EMAC_WOL_PERFECT:perfect address matching filter caused WoL
  • EMAC_WOL_RX_FILTER: the receive filter caused WoL
  • EMAC_WOL_MAG_PACKET: the magic packet filter caused WoL
Returns:
SET/RESET

Definition at line 718 of file lpc17xx_emac.c.

Status EMAC_Init ( EMAC_CFG_Type * EMAC_ConfigStruct )

Initializes the EMAC peripheral according to the specified parameters in the EMAC_ConfigStruct.

Parameters:
[in] EMAC_ConfigStruct Pointer to a EMAC_CFG_Type structure that contains the configuration information for the specified EMAC peripheral.
Returns:
None

Note: This function will initialize EMAC module according to procedure below:

  • Remove the soft reset condition from the MAC
  • Configure the PHY via the MIIM interface of the MAC
  • Select RMII mode
  • Configure the transmit and receive DMA engines, including the descriptor arrays
  • Configure the host registers (MAC1,MAC2 etc.) in the MAC
  • Enable the receive and transmit data paths In default state after initializing, only Rx Done and Tx Done interrupt are enabled, all remain interrupts are disabled (Ref. from LPC17xx UM)

Definition at line 292 of file lpc17xx_emac.c.

void EMAC_IntCmd | ( | uint32_t | ulIntType,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable interrupt for each type in EMAC.

Parameters:
[in] ulIntType Interrupt Type, should be:
  • EMAC_INT_RX_OVERRUN: Receive Overrun
  • EMAC_INT_RX_ERR: Receive Error
  • EMAC_INT_RX_FIN: Receive Descriptor Finish
  • EMAC_INT_RX_DONE: Receive Done
  • EMAC_INT_TX_UNDERRUN: Transmit Under-run
  • EMAC_INT_TX_ERR: Transmit Error
  • EMAC_INT_TX_FIN: Transmit descriptor finish
  • EMAC_INT_TX_DONE: Transmit Done
  • EMAC_INT_SOFT_INT: Software interrupt
  • EMAC_INT_WAKEUP: Wakeup interrupt
[in] NewState New State of this function, should be:
  • ENABLE.
  • DISABLE.
Returns:
None

Definition at line 794 of file lpc17xx_emac.c.

IntStatus EMAC_IntGetStatus ( uint32_t ulIntType )

Check whether if specified interrupt flag is set or not for each interrupt type in EMAC and clear interrupt pending if it is set.

Parameters:
[in] ulIntType Interrupt Type, should be:
  • EMAC_INT_RX_OVERRUN: Receive Overrun
  • EMAC_INT_RX_ERR: Receive Error
  • EMAC_INT_RX_FIN: Receive Descriptor Finish
  • EMAC_INT_RX_DONE: Receive Done
  • EMAC_INT_TX_UNDERRUN: Transmit Under-run
  • EMAC_INT_TX_ERR: Transmit Error
  • EMAC_INT_TX_FIN: Transmit descriptor finish
  • EMAC_INT_TX_DONE: Transmit Done
  • EMAC_INT_SOFT_INT: Software interrupt
  • EMAC_INT_WAKEUP: Wakeup interrupt
Returns:
New state of specified interrupt (SET or RESET)

Definition at line 820 of file lpc17xx_emac.c.

void EMAC_ReadPacketBuffer ( EMAC_PACKETBUF_Type * pDataStruct )

Read data from Rx packet data buffer at current index due to RxConsumeIndex.

Parameters:
[in] pDataStruct Pointer to a EMAC_PACKETBUF_Type structure data that contain specified information about Packet data buffer.
Returns:
None

Definition at line 760 of file lpc17xx_emac.c.

void EMAC_SetFilterMode | ( | uint32_t | ulFilterMode,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable Filter mode for each specified type EMAC peripheral.

Parameters:
[in] ulFilterMode Filter mode, should be:
  • EMAC_RFC_UCAST_EN: all frames of unicast types will be accepted
  • EMAC_RFC_BCAST_EN: broadcast frame will be accepted
  • EMAC_RFC_MCAST_EN: all frames of multicast types will be accepted
  • EMAC_RFC_UCAST_HASH_EN: The imperfect hash filter will be applied to unicast addresses
  • EMAC_RFC_MCAST_HASH_EN: The imperfect hash filter will be applied to multicast addresses
  • EMAC_RFC_PERFECT_EN: the destination address will be compared with the 6 byte station address programmed in the station address by the filter
  • EMAC_RFC_MAGP_WOL_EN: the result of the magic packet filter will generate a WoL interrupt when there is a match
  • EMAC_RFC_PFILT_WOL_EN: the result of the perfect address matching filter and the imperfect hash filter will generate a WoL interrupt when there is a match
[in] NewState New State of this command, should be:
  • ENABLE
  • DISABLE
Returns:
None

Definition at line 692 of file lpc17xx_emac.c.

void EMAC_SetHashFilter | ( | uint8_t | dstMAC_addr[],
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable hash filter functionality for specified destination MAC address in EMAC module.

Parameters:
[in] dstMAC_addr Pointer to the first MAC destination address, should be 6-bytes length, in order LSB to the MSB
[in] NewState New State of this command, should be:
  • ENABLE.
  • DISABLE.
Returns:
None

Note: The standard Ethernet cyclic redundancy check (CRC) function is calculated from the 6 byte destination address in the Ethernet frame (this CRC is calculated anyway as part of calculating the CRC of the whole frame), then bits [28:23] out of the 32 bits CRC result are taken to form the hash. The 6 bit hash is used to access the hash table: it is used as an index in the 64 bit HashFilter register that has been programmed with accept values. If the selected accept value is 1, the frame is accepted.

Definition at line 642 of file lpc17xx_emac.c.

int32_t EMAC_SetPHYMode ( uint32_t ulPHYMode )

Set specified PHY mode in EMAC peripheral.

Parameters:
[in] ulPHYMode Specified PHY mode, should be:
  • EMAC_MODE_AUTO
  • EMAC_MODE_10M_FULL
  • EMAC_MODE_10M_HALF
  • EMAC_MODE_100M_FULL
  • EMAC_MODE_100M_HALF
Returns:
Return (0) if no error, otherwise return (-1)

Definition at line 470 of file lpc17xx_emac.c.

int32_t EMAC_UpdatePHYStatus ( void )

Auto-Configures value for the EMAC configuration register to match with current PHY mode.

Parameters:
[in] None
Returns:
Return (0) if no error, otherwise return (-1)

Note: The EMAC configuration will be auto-configured:

  • Speed mode.
  • Half/Full duplex mode

Definition at line 551 of file lpc17xx_emac.c.

void EMAC_UpdateRxConsumeIndex ( void )

Increase the RxConsumeIndex (after reading the Receive buffer to release the Receive buffer) and wrap-around the index if it reaches the maximum Receive Number.

Parameters:
[in] None
Returns:
None

Definition at line 919 of file lpc17xx_emac.c.

void EMAC_UpdateTxProduceIndex ( void )

Increase the TxProduceIndex (after writting to the Transmit buffer to enable the Transmit buffer) and wrap-around the index if it reaches the maximum Transmit Number.

Parameters:
[in] None
Returns:
None

Definition at line 936 of file lpc17xx_emac.c.

void EMAC_WritePacketBuffer ( EMAC_PACKETBUF_Type * pDataStruct )

Write data to Tx packet data buffer at current index due to TxProduceIndex.

Parameters:
[in] pDataStruct Pointer to a EMAC_PACKETBUF_Type structure data that contain specified information about Packet data buffer.
Returns:
None

Definition at line 737 of file lpc17xx_emac.c.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EMAC Private Variables

Variables
EMAC Private Variables
EMAC (Ethernet Media Access Controller)

Variables

const uint8_t EMAC_clkdiv [] = { 4, 6, 8, 10, 14, 20, 28, 36, 40, 44, 48, 52, 56, 60, 64}

Variable Documentation

const uint8_t EMAC_clkdiv[] = { 4, 6, 8, 10, 14, 20, 28, 36, 40, 44, 48, 52, 56, 60, 64}

Definition at line 55 of file lpc17xx_emac.c.

Generated on Mon Nov 28 2011 11:15:18 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EXTI (External Interrupt)

Modules
EXTI (External Interrupt)
LPC1700CMSIS Firmware Library

Modules

EXTI Private Macros
EXTI Public Types
EXTI Public Functions
Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EXTI Private Macros

Defines
EXTI Private Macros
EXTI (External Interrupt)

Defines

#define | EXTI_EINT0_BIT_MARK 0x01
#define | EXTI_EINT1_BIT_MARK 0x02
#define | EXTI_EINT2_BIT_MARK 0x04
#define | EXTI_EINT3_BIT_MARK 0x08

Define Documentation

#define EXTI_EINT0_BIT_MARK 0x01

Macro defines for EXTI control register

Definition at line 54 of file lpc17xx_exti.h.

#define EXTI_EINT1_BIT_MARK 0x02

Definition at line 55 of file lpc17xx_exti.h.

#define EXTI_EINT2_BIT_MARK 0x04

Definition at line 56 of file lpc17xx_exti.h.

#define EXTI_EINT3_BIT_MARK 0x08

Definition at line 57 of file lpc17xx_exti.h.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EXTI Public Types

Data Structures | Enumerations
EXTI Public Types
EXTI (External Interrupt)

Data Structures

struct | EXTI_InitTypeDef
EXTI Initialize structure. More...

Enumerations

enum | EXTI_LINE_ENUM { EXTI_EINT0, EXTI_EINT1, EXTI_EINT2, EXTI_EINT3 }
EXTI external interrupt line option. More...
enum | EXTI_MODE_ENUM { EXTI_MODE_LEVEL_SENSITIVE, EXTI_MODE_EDGE_SENSITIVE }
EXTI mode option. More...
enum | EXTI_POLARITY_ENUM { EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE, EXTI_POLARITY_HIGH_ACTIVE_OR_RISING_EDGE }
EXTI polarity option. More...

Enumeration Type Documentation

enum EXTI_LINE_ENUM

EXTI external interrupt line option.

Enumerator:
EXTI_EINT0

External interrupt 0, P2.10

EXTI_EINT1

External interrupt 0, P2.11

EXTI_EINT2

External interrupt 0, P2.12

EXTI_EINT3

External interrupt 0, P2.13

Definition at line 71 of file lpc17xx_exti.h.

enum EXTI_MODE_ENUM

EXTI mode option.

Enumerator:
EXTI_MODE_LEVEL_SENSITIVE

Level sensitivity is selected

EXTI_MODE_EDGE_SENSITIVE

Edge sensitivity is selected

Definition at line 82 of file lpc17xx_exti.h.

enum EXTI_POLARITY_ENUM

EXTI polarity option.

Enumerator:
EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE

Low active or falling edge sensitive depending on pin mode

EXTI_POLARITY_HIGH_ACTIVE_OR_RISING_EDGE

High active or rising edge sensitive depending on pin mode

Definition at line 91 of file lpc17xx_exti.h.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EXTI Public Functions

Functions
EXTI Public Functions
EXTI (External Interrupt)

Functions

void | EXTI_Init (void)
Initial for EXT.
void | EXTI_DeInit (void)
Close EXT.
void | EXTI_Config (EXTI_InitTypeDef *EXTICfg)
Configuration for EXT.
void | EXTI_SetMode (EXTI_LINE_ENUM EXTILine, EXTI_MODE_ENUM mode)
Set mode for EXTI pin.
void | EXTI_SetPolarity (EXTI_LINE_ENUM EXTILine, EXTI_POLARITY_ENUM polarity)
Set polarity for EXTI pin.
void | EXTI_ClearEXTIFlag (EXTI_LINE_ENUM EXTILine)
Clear External interrupt flag.

Function Documentation

void EXTI_ClearEXTIFlag ( EXTI_LINE_ENUM EXTILine )

Clear External interrupt flag.

Parameters:
[in] EXTILine external interrupt line, should be:
  • EXTI_EINT0: external interrupt line 0
  • EXTI_EINT1: external interrupt line 1
  • EXTI_EINT2: external interrupt line 2
  • EXTI_EINT3: external interrupt line 3
Returns:
None

Definition at line 149 of file lpc17xx_exti.c.

void EXTI_Config ( EXTI_InitTypeDef * EXTICfg )

Configuration for EXT.

  • Set EXTINT, EXTMODE, EXTPOLAR register
    Parameters:
    [in] EXTICfg Pointer to a EXTI_InitTypeDef structure that contains the configuration information for the specified external interrupt
    Returns:
    None

Definition at line 85 of file lpc17xx_exti.c.

void EXTI_DeInit ( void )

Close EXT.

Parameters:
[in] None
Returns:
None

Definition at line 72 of file lpc17xx_exti.c.

void EXTI_Init ( void )

Initial for EXT.

  • Set EXTINT, EXTMODE, EXTPOLAR registers to default value
    Parameters:
    [in] None
    Returns:
    None

Definition at line 59 of file lpc17xx_exti.c.

void EXTI_SetMode | ( | EXTI_LINE_ENUM | EXTILine,
 |  | EXTI_MODE_ENUM | mode
 | ) |  |

Set mode for EXTI pin.

Parameters:
[in] EXTILine external interrupt line, should be:
  • EXTI_EINT0: external interrupt line 0
  • EXTI_EINT1: external interrupt line 1
  • EXTI_EINT2: external interrupt line 2
  • EXTI_EINT3: external interrupt line 3
[in] mode external mode, should be:
  • EXTI_MODE_LEVEL_SENSITIVE
  • EXTI_MODE_EDGE_SENSITIVE
Returns:
None

Definition at line 104 of file lpc17xx_exti.c.

void EXTI_SetPolarity | ( | EXTI_LINE_ENUM | EXTILine,
 |  | EXTI_POLARITY_ENUM | polarity
 | ) |  |

Set polarity for EXTI pin.

Parameters:
[in] EXTILine external interrupt line, should be:
  • EXTI_EINT0: external interrupt line 0
  • EXTI_EINT1: external interrupt line 1
  • EXTI_EINT2: external interrupt line 2
  • EXTI_EINT3: external interrupt line 3
[in] polarity external polarity value, should be:
  • EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE
  • EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE
Returns:
None

Definition at line 128 of file lpc17xx_exti.c.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPDMA (General Purpose Direct Memory Access)

Modules
GPDMA (General Purpose Direct Memory Access)
LPC1700CMSIS Firmware Library

Modules

GPDMA Public Macros
GPDMA Private Macros
GPDMA Public Types
GPDMA Public Functions
GPDMA Private Variables
Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPDMA Public Macros

Defines
GPDMA Public Macros
GPDMA (General Purpose Direct Memory Access)

Defines

#define | GPDMA_CONN_SSP0_Tx ((0UL))
#define | GPDMA_CONN_SSP0_Rx ((1UL))
#define | GPDMA_CONN_SSP1_Tx ((2UL))
#define | GPDMA_CONN_SSP1_Rx ((3UL))
#define | GPDMA_CONN_ADC ((4UL))
#define | GPDMA_CONN_I2S_Channel_0 ((5UL))
#define | GPDMA_CONN_I2S_Channel_1 ((6UL))
#define | GPDMA_CONN_DAC ((7UL))
#define | GPDMA_CONN_UART0_Tx ((8UL))
#define | GPDMA_CONN_UART0_Rx ((9UL))
#define | GPDMA_CONN_UART1_Tx ((10UL))
#define | GPDMA_CONN_UART1_Rx ((11UL))
#define | GPDMA_CONN_UART2_Tx ((12UL))
#define | GPDMA_CONN_UART2_Rx ((13UL))
#define | GPDMA_CONN_UART3_Tx ((14UL))
#define | GPDMA_CONN_UART3_Rx ((15UL))
#define | GPDMA_CONN_MAT0_0 ((16UL))
#define | GPDMA_CONN_MAT0_1 ((17UL))
#define | GPDMA_CONN_MAT1_0 ((18UL))
#define | GPDMA_CONN_MAT1_1 ((19UL))
#define | GPDMA_CONN_MAT2_0 ((20UL))
#define | GPDMA_CONN_MAT2_1 ((21UL))
#define | GPDMA_CONN_MAT3_0 ((22UL))
#define | GPDMA_CONN_MAT3_1 ((23UL))
#define | GPDMA_TRANSFERTYPE_M2M ((0UL))
#define | GPDMA_TRANSFERTYPE_M2P ((1UL))
#define | GPDMA_TRANSFERTYPE_P2M ((2UL))
#define | GPDMA_TRANSFERTYPE_P2P ((3UL))
#define | GPDMA_BSIZE_1 ((0UL))
#define | GPDMA_BSIZE_4 ((1UL))
#define | GPDMA_BSIZE_8 ((2UL))
#define | GPDMA_BSIZE_16 ((3UL))
#define | GPDMA_BSIZE_32 ((4UL))
#define | GPDMA_BSIZE_64 ((5UL))
#define | GPDMA_BSIZE_128 ((6UL))
#define | GPDMA_BSIZE_256 ((7UL))
#define | GPDMA_WIDTH_BYTE ((0UL))
#define | GPDMA_WIDTH_HALFWORD ((1UL))
#define | GPDMA_WIDTH_WORD ((2UL))
#define | GPDMA_REQSEL_UART ((0UL))
#define | GPDMA_REQSEL_TIMER ((1UL))

Define Documentation

#define GPDMA_BSIZE_1 ((0UL))

Burst size in Source and Destination definitions Burst size = 1

Definition at line 84 of file lpc17xx_gpdma.h.

#define GPDMA_BSIZE_128 ((6UL))

Burst size = 128

Definition at line 90 of file lpc17xx_gpdma.h.

#define GPDMA_BSIZE_16 ((3UL))

Burst size = 16

Definition at line 87 of file lpc17xx_gpdma.h.

#define GPDMA_BSIZE_256 ((7UL))

Burst size = 256

Definition at line 91 of file lpc17xx_gpdma.h.

#define GPDMA_BSIZE_32 ((4UL))

Burst size = 32

Definition at line 88 of file lpc17xx_gpdma.h.

#define GPDMA_BSIZE_4 ((1UL))

Burst size = 4

Definition at line 85 of file lpc17xx_gpdma.h.

#define GPDMA_BSIZE_64 ((5UL))

Burst size = 64

Definition at line 89 of file lpc17xx_gpdma.h.

#define GPDMA_BSIZE_8 ((2UL))

Burst size = 8

Definition at line 86 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_ADC ((4UL))

ADC

Definition at line 56 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_DAC ((7UL))

DAC

Definition at line 59 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_I2S_Channel_0 ((5UL))

I2S channel 0

Definition at line 57 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_I2S_Channel_1 ((6UL))

I2S channel 1

Definition at line 58 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_MAT0_0 ((16UL))

MAT0.0

Definition at line 68 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_MAT0_1 ((17UL))

MAT0.1

Definition at line 69 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_MAT1_0 ((18UL))

MAT1.0

Definition at line 70 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_MAT1_1 ((19UL))

MAT1.1

Definition at line 71 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_MAT2_0 ((20UL))

MAT2.0

Definition at line 72 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_MAT2_1 ((21UL))

MAT2.1

Definition at line 73 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_MAT3_0 ((22UL))

MAT3.0

Definition at line 74 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_MAT3_1 ((23UL))

MAT3.1

Definition at line 75 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_SSP0_Rx ((1UL))

SSP0 Rx

Definition at line 53 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_SSP0_Tx ((0UL))

DMA Connection number definitions SSP0 Tx

Definition at line 52 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_SSP1_Rx ((3UL))

SSP1 Rx

Definition at line 55 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_SSP1_Tx ((2UL))

SSP1 Tx

Definition at line 54 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_UART0_Rx ((9UL))

UART0 Rx

Definition at line 61 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_UART0_Tx ((8UL))

UART0 Tx

Definition at line 60 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_UART1_Rx ((11UL))

UART1 Rx

Definition at line 63 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_UART1_Tx ((10UL))

UART1 Tx

Definition at line 62 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_UART2_Rx ((13UL))

UART2 Rx

Definition at line 65 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_UART2_Tx ((12UL))

UART2 Tx

Definition at line 64 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_UART3_Rx ((15UL))

UART3 Rx

Definition at line 67 of file lpc17xx_gpdma.h.

#define GPDMA_CONN_UART3_Tx ((14UL))

UART3 Tx

Definition at line 66 of file lpc17xx_gpdma.h.

#define GPDMA_REQSEL_TIMER ((1UL))

Timer match is selected

Definition at line 100 of file lpc17xx_gpdma.h.

#define GPDMA_REQSEL_UART ((0UL))

DMA Request Select Mode definitions UART TX/RX is selected

Definition at line 99 of file lpc17xx_gpdma.h.

#define GPDMA_TRANSFERTYPE_M2M ((0UL))

GPDMA Transfer type definitions Memory to memory - DMA control

Definition at line 78 of file lpc17xx_gpdma.h.

#define GPDMA_TRANSFERTYPE_M2P ((1UL))

Memory to peripheral - DMA control

Definition at line 79 of file lpc17xx_gpdma.h.

#define GPDMA_TRANSFERTYPE_P2M ((2UL))

Peripheral to memory - DMA control

Definition at line 80 of file lpc17xx_gpdma.h.

#define GPDMA_TRANSFERTYPE_P2P ((3UL))

Source peripheral to destination peripheral - DMA control

Definition at line 81 of file lpc17xx_gpdma.h.

#define GPDMA_WIDTH_BYTE ((0UL))

Width in Source transfer width and Destination transfer width definitions Width = 1 byte

Definition at line 94 of file lpc17xx_gpdma.h.

#define GPDMA_WIDTH_HALFWORD ((1UL))

Width = 2 bytes

Definition at line 95 of file lpc17xx_gpdma.h.

#define GPDMA_WIDTH_WORD ((2UL))

Width = 4 bytes

Definition at line 96 of file lpc17xx_gpdma.h.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPDMA Private Macros

Defines
GPDMA Private Macros
GPDMA (General Purpose Direct Memory Access)

Defines

#define | GPDMA_DMACIntStat_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACIntStat_BITMASK ((0xFF))
#define | GPDMA_DMACIntTCStat_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACIntTCStat_BITMASK ((0xFF))
#define | GPDMA_DMACIntTCClear_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACIntTCClear_BITMASK ((0xFF))
#define | GPDMA_DMACIntErrStat_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACIntErrStat_BITMASK ((0xFF))
#define | GPDMA_DMACIntErrClr_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACIntErrClr_BITMASK ((0xFF))
#define | GPDMA_DMACRawIntTCStat_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACRawIntTCStat_BITMASK ((0xFF))
#define | GPDMA_DMACRawIntErrStat_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACRawIntErrStat_BITMASK ((0xFF))
#define | GPDMA_DMACEnbldChns_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACEnbldChns_BITMASK ((0xFF))
#define | GPDMA_DMACSoftBReq_Src(n) (((1UL<<n)&0xFFFF))
#define | GPDMA_DMACSoftBReq_BITMASK ((0xFFFF))
#define | GPDMA_DMACSoftSReq_Src(n) (((1UL<<n)&0xFFFF))
#define | GPDMA_DMACSoftSReq_BITMASK ((0xFFFF))
#define | GPDMA_DMACSoftLBReq_Src(n) (((1UL<<n)&0xFFFF))
#define | GPDMA_DMACSoftLBReq_BITMASK ((0xFFFF))
#define | GPDMA_DMACSoftLSReq_Src(n) (((1UL<<n)&0xFFFF))
#define | GPDMA_DMACSoftLSReq_BITMASK ((0xFFFF))
#define | GPDMA_DMACConfig_E ((0x01))
#define | GPDMA_DMACConfig_M ((0x02))
#define | GPDMA_DMACConfig_BITMASK ((0x03))
#define | GPDMA_DMACSync_Src(n) (((1UL<<n)&0xFFFF))
#define | GPDMA_DMACSync_BITMASK ((0xFFFF))
#define | GPDMA_DMAReqSel_Input(n) (((1UL<<(n-8))&0xFF))
#define | GPDMA_DMAReqSel_BITMASK ((0xFF))
#define | GPDMA_DMACCxLLI_BITMASK ((0xFFFFFFFC))
#define | GPDMA_DMACCxControl_TransferSize(n) (((n&0xFFF)<<0))
#define | GPDMA_DMACCxControl_SBSize(n) (((n&0x07)<<12))
#define | GPDMA_DMACCxControl_DBSize(n) (((n&0x07)<<15))
#define | GPDMA_DMACCxControl_SWidth(n) (((n&0x07)<<18))
#define | GPDMA_DMACCxControl_DWidth(n) (((n&0x07)<<21))
#define | GPDMA_DMACCxControl_SI ((1UL<<26))
#define | GPDMA_DMACCxControl_DI ((1UL<<27))
#define | GPDMA_DMACCxControl_Prot1 ((1UL<<28))
#define | GPDMA_DMACCxControl_Prot2 ((1UL<<29))
#define | GPDMA_DMACCxControl_Prot3 ((1UL<<30))
#define | GPDMA_DMACCxControl_I ((1UL<<31))
#define | GPDMA_DMACCxControl_BITMASK ((0xFCFFFFFF))
#define | GPDMA_DMACCxConfig_E ((1UL<<0))
#define | GPDMA_DMACCxConfig_SrcPeripheral(n) (((n&0x1F)<<1))
#define | GPDMA_DMACCxConfig_DestPeripheral(n) (((n&0x1F)<<6))
#define | GPDMA_DMACCxConfig_TransferType(n) (((n&0x7)<<11))
#define | GPDMA_DMACCxConfig_IE ((1UL<<14))
#define | GPDMA_DMACCxConfig_ITC ((1UL<<15))
#define | GPDMA_DMACCxConfig_L ((1UL<<16))
#define | GPDMA_DMACCxConfig_A ((1UL<<17))
#define | GPDMA_DMACCxConfig_H ((1UL<<18))
#define | GPDMA_DMACCxConfig_BITMASK ((0x7FFFF))
#define | PARAM_GPDMA_CHANNEL(n) (n<=7)
#define | PARAM_GPDMA_CONN(n)
#define | PARAM_GPDMA_BSIZE(n)
#define | PARAM_GPDMA_WIDTH(n)
#define | PARAM_GPDMA_STAT(n)
#define | PARAM_GPDMA_TRANSFERTYPE(n)
#define | PARAM_GPDMA_STATCLR(n) ((n==GPDMA_STATCLR_INTTC) || (n==GPDMA_STATCLR_INTERR))
#define | PARAM_GPDMA_REQSEL(n) ((n==GPDMA_REQSEL_UART) || (n==GPDMA_REQSEL_TIMER))

Define Documentation

#define GPDMA_DMACConfig_BITMASK ((0x03))

Definition at line 190 of file lpc17xx_gpdma.h.

#define GPDMA_DMACConfig_E ((0x01))

Macro defines for DMA Configuration register DMA Controller enable

Definition at line 188 of file lpc17xx_gpdma.h.

#define GPDMA_DMACConfig_M ((0x02))

AHB Master endianness configuration

Definition at line 189 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxConfig_A ((1UL<<17))

Active

Definition at line 237 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxConfig_BITMASK ((0x7FFFF))

DMA Channel Configuration registers bit mask

Definition at line 240 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxConfig_DestPeripheral ( n ) (((n&0x1F)<<6))

Destination peripheral

Definition at line 232 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxConfig_E ((1UL<<0))

Macro defines for DMA Channel Configuration registers DMA control enable

Definition at line 230 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxConfig_H ((1UL<<18))

Halt

Definition at line 238 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxConfig_IE ((1UL<<14))

Interrupt error mask

Definition at line 234 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxConfig_ITC ((1UL<<15))

Terminal count interrupt mask

Definition at line 235 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxConfig_L ((1UL<<16))

Lock

Definition at line 236 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxConfig_SrcPeripheral ( n ) (((n&0x1F)<<1))

Source peripheral

Definition at line 231 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxConfig_TransferType ( n ) (((n&0x7)<<11))

This value indicates the type of transfer

Definition at line 233 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_BITMASK ((0xFCFFFFFF))

DMA channel control registers bit mask

Definition at line 225 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_DBSize ( n ) (((n&0x07)<<15))

Destination burst size

Definition at line 215 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_DI ((1UL<<27))

Destination increment

Definition at line 219 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_DWidth ( n ) (((n&0x07)<<21))

Destination transfer width

Definition at line 217 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_I ((1UL<<31))

Terminal count interrupt enable bit

Definition at line 223 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_Prot1 ((1UL<<28))

Indicates that the access is in user mode or privileged mode

Definition at line 220 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_Prot2 ((1UL<<29))

Indicates that the access is bufferable or not bufferable

Definition at line 221 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_Prot3 ((1UL<<30))

Indicates that the access is cacheable or not cacheable

Definition at line 222 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_SBSize ( n ) (((n&0x07)<<12))

Source burst size

Definition at line 214 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_SI ((1UL<<26))

Source increment

Definition at line 218 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_SWidth ( n ) (((n&0x07)<<18))

Source transfer width

Definition at line 216 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxControl_TransferSize ( n ) (((n&0xFFF)<<0))

Macro defines for DMA channel control registers Transfer size

Definition at line 213 of file lpc17xx_gpdma.h.

#define GPDMA_DMACCxLLI_BITMASK ((0xFFFFFFFC))

Macro defines for DMA Channel Linked List Item registers DMA Channel Linked List Item registers bit mask

Definition at line 208 of file lpc17xx_gpdma.h.

#define GPDMA_DMACEnbldChns_BITMASK ((0xFF))

Definition at line 159 of file lpc17xx_gpdma.h.

#define GPDMA_DMACEnbldChns_Ch ( n ) (((1UL<<n)&0xFF))

Macro defines for DMA Enabled Channel register

Definition at line 158 of file lpc17xx_gpdma.h.

#define GPDMA_DMACIntErrClr_BITMASK ((0xFF))

Definition at line 141 of file lpc17xx_gpdma.h.

#define GPDMA_DMACIntErrClr_Ch ( n ) (((1UL<<n)&0xFF))

Macro defines for DMA Interrupt Error Clear register

Definition at line 140 of file lpc17xx_gpdma.h.

#define GPDMA_DMACIntErrStat_BITMASK ((0xFF))

Definition at line 135 of file lpc17xx_gpdma.h.

#define GPDMA_DMACIntErrStat_Ch ( n ) (((1UL<<n)&0xFF))

Macro defines for DMA Interrupt Error Status register

Definition at line 134 of file lpc17xx_gpdma.h.

#define GPDMA_DMACIntStat_BITMASK ((0xFF))

Definition at line 117 of file lpc17xx_gpdma.h.

#define GPDMA_DMACIntStat_Ch ( n ) (((1UL<<n)&0xFF))

Macro defines for DMA Interrupt Status register

Definition at line 116 of file lpc17xx_gpdma.h.

#define GPDMA_DMACIntTCClear_BITMASK ((0xFF))

Definition at line 129 of file lpc17xx_gpdma.h.

#define GPDMA_DMACIntTCClear_Ch ( n ) (((1UL<<n)&0xFF))

Macro defines for DMA Interrupt Terminal Count Request Clear register

Definition at line 128 of file lpc17xx_gpdma.h.

#define GPDMA_DMACIntTCStat_BITMASK ((0xFF))

Definition at line 123 of file lpc17xx_gpdma.h.

#define GPDMA_DMACIntTCStat_Ch ( n ) (((1UL<<n)&0xFF))

Macro defines for DMA Interrupt Terminal Count Request Status register

Definition at line 122 of file lpc17xx_gpdma.h.

#define GPDMA_DMACRawIntErrStat_BITMASK ((0xFF))

Definition at line 153 of file lpc17xx_gpdma.h.

#define GPDMA_DMACRawIntErrStat_Ch ( n ) (((1UL<<n)&0xFF))

Macro defines for DMA Raw Error Interrupt Status register

Definition at line 152 of file lpc17xx_gpdma.h.

#define GPDMA_DMACRawIntTCStat_BITMASK ((0xFF))

Definition at line 147 of file lpc17xx_gpdma.h.

#define GPDMA_DMACRawIntTCStat_Ch ( n ) (((1UL<<n)&0xFF))

Macro defines for DMA Raw Interrupt Terminal Count Status register

Definition at line 146 of file lpc17xx_gpdma.h.

#define GPDMA_DMACSoftBReq_BITMASK ((0xFFFF))

Definition at line 165 of file lpc17xx_gpdma.h.

#define GPDMA_DMACSoftBReq_Src ( n ) (((1UL<<n)&0xFFFF))

Macro defines for DMA Software Burst Request register

Definition at line 164 of file lpc17xx_gpdma.h.

#define GPDMA_DMACSoftLBReq_BITMASK ((0xFFFF))

Definition at line 177 of file lpc17xx_gpdma.h.

#define GPDMA_DMACSoftLBReq_Src ( n ) (((1UL<<n)&0xFFFF))

Macro defines for DMA Software Last Burst Request register

Definition at line 176 of file lpc17xx_gpdma.h.

#define GPDMA_DMACSoftLSReq_BITMASK ((0xFFFF))

Definition at line 183 of file lpc17xx_gpdma.h.

#define GPDMA_DMACSoftLSReq_Src ( n ) (((1UL<<n)&0xFFFF))

Macro defines for DMA Software Last Single Request register

Definition at line 182 of file lpc17xx_gpdma.h.

#define GPDMA_DMACSoftSReq_BITMASK ((0xFFFF))

Definition at line 171 of file lpc17xx_gpdma.h.

#define GPDMA_DMACSoftSReq_Src ( n ) (((1UL<<n)&0xFFFF))

Macro defines for DMA Software Single Request register

Definition at line 170 of file lpc17xx_gpdma.h.

#define GPDMA_DMACSync_BITMASK ((0xFFFF))

Definition at line 196 of file lpc17xx_gpdma.h.

#define GPDMA_DMACSync_Src ( n ) (((1UL<<n)&0xFFFF))

Macro defines for DMA Synchronization register

Definition at line 195 of file lpc17xx_gpdma.h.

#define GPDMA_DMAReqSel_BITMASK ((0xFF))

Definition at line 202 of file lpc17xx_gpdma.h.

#define GPDMA_DMAReqSel_Input ( n ) (((1UL<<(n-8))&0xFF))

Macro defines for DMA Request Select register

Definition at line 201 of file lpc17xx_gpdma.h.

#define PARAM_GPDMA_BSIZE ( n )
Value:
((n==GPDMA_BSIZE_1) || (n==GPDMA_BSIZE_4) \
|| (n==GPDMA_BSIZE_8) || (n==GPDMA_BSIZE_16) \
|| (n==GPDMA_BSIZE_32) || (n==GPDMA_BSIZE_64) \
|| (n==GPDMA_BSIZE_128) || (n==GPDMA_BSIZE_256))

Definition at line 261 of file lpc17xx_gpdma.h.

#define PARAM_GPDMA_CHANNEL ( n ) (n<=7)

Definition at line 244 of file lpc17xx_gpdma.h.

#define PARAM_GPDMA_CONN ( n )
Value:
((n==GPDMA_CONN_SSP0_Tx) || (n==GPDMA_CONN_SSP0_Rx) \
|| (n==GPDMA_CONN_SSP1_Tx) || (n==GPDMA_CONN_SSP1_Rx) \
|| (n==GPDMA_CONN_ADC) || (n==GPDMA_CONN_I2S_Channel_0) \
|| (n==GPDMA_CONN_I2S_Channel_1) || (n==GPDMA_CONN_DAC) \
|| (n==GPDMA_CONN_UART0_Tx) || (n==GPDMA_CONN_UART0_Rx) \
|| (n==GPDMA_CONN_UART1_Tx) || (n==GPDMA_CONN_UART1_Rx) \
|| (n==GPDMA_CONN_UART2_Tx) || (n==GPDMA_CONN_UART2_Rx) \
|| (n==GPDMA_CONN_UART3_Tx) || (n==GPDMA_CONN_UART3_Rx) \
|| (n==GPDMA_CONN_MAT0_0) || (n==GPDMA_CONN_MAT0_1) \
|| (n==GPDMA_CONN_MAT1_0) || (n==GPDMA_CONN_MAT1_1) \
|| (n==GPDMA_CONN_MAT2_0) || (n==GPDMA_CONN_MAT2_1) \
|| (n==GPDMA_CONN_MAT3_0) || (n==GPDMA_CONN_MAT3_1))

Definition at line 247 of file lpc17xx_gpdma.h.

#define PARAM_GPDMA_REQSEL ( n ) ((n==GPDMA_REQSEL_UART) || (n==GPDMA_REQSEL_TIMER))

Definition at line 283 of file lpc17xx_gpdma.h.

#define PARAM_GPDMA_STAT ( n )
Value:
((n==GPDMA_STAT_INT) || (n==GPDMA_STAT_INTTC) \
|| (n==GPDMA_STAT_INTERR) || (n==GPDMA_STAT_RAWINTTC) \
|| (n==GPDMA_STAT_RAWINTERR) || (n==GPDMA_STAT_ENABLED_CH))

Definition at line 271 of file lpc17xx_gpdma.h.

#define PARAM_GPDMA_STATCLR ( n ) ((n==GPDMA_STATCLR_INTTC) || (n==GPDMA_STATCLR_INTERR))

Definition at line 280 of file lpc17xx_gpdma.h.

#define PARAM_GPDMA_TRANSFERTYPE ( n )
Value:
((n==GPDMA_TRANSFERTYPE_M2M)||(n==GPDMA_TRANSFERTYPE_M2P) \
||(n==GPDMA_TRANSFERTYPE_P2M)||(n==GPDMA_TRANSFERTYPE_P2P))

Definition at line 276 of file lpc17xx_gpdma.h.

#define PARAM_GPDMA_WIDTH ( n )
Value:
((n==GPDMA_WIDTH_BYTE) || (n==GPDMA_WIDTH_HALFWORD) \
|| (n==GPDMA_WIDTH_WORD))

Definition at line 267 of file lpc17xx_gpdma.h.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPDMA Public Types

Data Structures | Enumerations
GPDMA Public Types
GPDMA (General Purpose Direct Memory Access)

Data Structures

struct | GPDMA_Channel_CFG_Type
GPDMA Channel configuration structure type definition. More...
struct | GPDMA_LLI_Type
GPDMA Linker List Item structure type definition. More...

Enumerations

enum GPDMA_Status_Type {
GPDMA_STAT_INT, GPDMA_STAT_INTTC, GPDMA_STAT_INTERR, GPDMA_STAT_RAWINTTC,
GPDMA_STAT_RAWINTERR, GPDMA_STAT_ENABLED_CH
}
GPDMA Status enumeration. More...
enum | GPDMA_StateClear_Type { GPDMA_STATCLR_INTTC, GPDMA_STATCLR_INTERR }
GPDMA Interrupt clear status enumeration. More...

Enumeration Type Documentation

enum GPDMA_StateClear_Type

GPDMA Interrupt clear status enumeration.

Enumerator:
GPDMA_STATCLR_INTTC

GPDMA Interrupt Terminal Count Request Clear

GPDMA_STATCLR_INTERR

GPDMA Interrupt Error Clear

Definition at line 309 of file lpc17xx_gpdma.h.

enum GPDMA_Status_Type

GPDMA Status enumeration.

Enumerator:
GPDMA_STAT_INT

GPDMA Interrupt Status

GPDMA_STAT_INTTC

GPDMA Interrupt Terminal Count Request Status

GPDMA_STAT_INTERR

GPDMA Interrupt Error Status

GPDMA_STAT_RAWINTTC

GPDMA Raw Interrupt Terminal Count Status

GPDMA_STAT_RAWINTERR

GPDMA Raw Error Interrupt Status

GPDMA_STAT_ENABLED_CH

GPDMA Enabled Channel Status

Definition at line 297 of file lpc17xx_gpdma.h.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPDMA Public Functions

Functions
GPDMA Public Functions
GPDMA (General Purpose Direct Memory Access)

Functions

void | GPDMA_Init (void)
Initialize GPDMA controller.
Status | GPDMA_Setup (GPDMA_Channel_CFG_Type *GPDMAChannelConfig)
Setup GPDMA channel peripheral according to the specified parameters in the GPDMAChannelConfig.
IntStatus | GPDMA_IntGetStatus (GPDMA_Status_Type type, uint8_t channel)
Check if corresponding channel does have an active interrupt request or not.
void | GPDMA_ClearIntPending (GPDMA_StateClear_Type type, uint8_t channel)
Clear one or more interrupt requests on DMA channels.
void | GPDMA_ChannelCmd (uint8_t channelNum, FunctionalState NewState)
Enable/Disable DMA channel.

Function Documentation

void GPDMA_ChannelCmd | ( | uint8_t | channelNum,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable DMA channel.

Parameters:
[in] channelNum GPDMA channel, should be in range from 0 to 7
[in] NewState New State of this command, should be:
  • ENABLE.
  • DISABLE.
Returns:
None

Definition at line 364 of file lpc17xx_gpdma.c.

void GPDMA_ClearIntPending | ( | GPDMA_StateClear_Type | type,
 |  | uint8_t | channel
 | ) |  |

Clear one or more interrupt requests on DMA channels.

Parameters:
[in] type type of interrupt request, should be:
  • GPDMA_STATCLR_INTTC: GPDMA Interrupt Terminal Count Request Clear
  • GPDMA_STATCLR_INTERR: GPDMA Interrupt Error Clear
[in] channel GPDMA channel, should be in range from 0 to 7
Returns:
None

Definition at line 435 of file lpc17xx_gpdma.c.

void GPDMA_Init ( void )

Initialize GPDMA controller.

Parameters:
None
Returns:
None

Definition at line 200 of file lpc17xx_gpdma.c.

IntStatus GPDMA_IntGetStatus | ( | GPDMA_Status_Type | type,
 |  | uint8_t | channel
 | ) |  |

Check if corresponding channel does have an active interrupt request or not.

Parameters:
[in] type type of status, should be:
  • GPDMA_STAT_INT: GPDMA Interrupt Status
  • GPDMA_STAT_INTTC: GPDMA Interrupt Terminal Count Request Status
  • GPDMA_STAT_INTERR: GPDMA Interrupt Error Status
  • GPDMA_STAT_RAWINTTC: GPDMA Raw Interrupt Terminal Count Status
  • GPDMA_STAT_RAWINTERR: GPDMA Raw Error Interrupt Status
  • GPDMA_STAT_ENABLED_CH:GPDMA Enabled Channel Status
[in] channel GPDMA channel, should be in range from 0 to 7
Returns:
IntStatus status of DMA channel interrupt after masking Should be:
  • SET: the corresponding channel has no active interrupt request
  • RESET: the corresponding channel does have an active interrupt request

Definition at line 393 of file lpc17xx_gpdma.c.

Status GPDMA_Setup ( GPDMA_Channel_CFG_Type * GPDMAChannelConfig )

Setup GPDMA channel peripheral according to the specified parameters in the GPDMAChannelConfig.

Parameters:
[in] GPDMAChannelConfig Pointer to a GPDMA_CH_CFG_Type structure that contains the configuration information for the specified GPDMA channel peripheral.
Returns:
ERROR if selected channel is enabled before or SUCCESS if channel is configured successfully

Definition at line 229 of file lpc17xx_gpdma.c.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPDMA Private Variables

Variables
GPDMA Private Variables
GPDMA (General Purpose Direct Memory Access)

Variables

volatile const void * | GPDMA_LUTPerAddr []
Lookup Table of Connection Type matched with Peripheral Data (FIFO) register base address.
const LPC_GPDMACH_TypeDef * | pGPDMACh [8]
Lookup Table of GPDMA Channel Number matched with GPDMA channel pointer.
const uint8_t | GPDMA_LUTPerBurst []
Optimized Peripheral Source and Destination burst size.
const uint8_t | GPDMA_LUTPerWid []
Optimized Peripheral Source and Destination transfer width.

Variable Documentation

volatile const void* GPDMA_LUTPerAddr[]
Initial value:
 {
                (&LPC_SSP0->DR),
                (&LPC_SSP0->DR),
                (&LPC_SSP1->DR),
                (&LPC_SSP1->DR),
                (&LPC_ADC->ADGDR),
                (&LPC_I2S->I2STXFIFO),
                (&LPC_I2S->I2SRXFIFO),
                (&LPC_DAC->DACR),
                (&LPC_UART0->THR),
                (&LPC_UART0->RBR),
                (&LPC_UART1->THR),
                (&LPC_UART1->RBR),
                (&LPC_UART2->THR),
                (&LPC_UART2->RBR),
                (&LPC_UART3->THR),
                (&LPC_UART3->RBR),
                (&LPC_TIM0->MR0),
                (&LPC_TIM0->MR1),
                (&LPC_TIM1->MR0),
                (&LPC_TIM1->MR1),
                (&LPC_TIM2->MR0),
                (&LPC_TIM2->MR1),
                (&LPC_TIM3->MR0),
                (&LPC_TIM3->MR1)
}

Lookup Table of Connection Type matched with Peripheral Data (FIFO) register base address.

Definition at line 59 of file lpc17xx_gpdma.c.

const uint8_t GPDMA_LUTPerBurst[]
Initial value:
 {
                GPDMA_BSIZE_4,
                GPDMA_BSIZE_4,
                GPDMA_BSIZE_4,
                GPDMA_BSIZE_4,
                GPDMA_BSIZE_4,
                GPDMA_BSIZE_32,
                GPDMA_BSIZE_32,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1,
                GPDMA_BSIZE_1
}

Optimized Peripheral Source and Destination burst size.

Definition at line 130 of file lpc17xx_gpdma.c.

const uint8_t GPDMA_LUTPerWid[]
Initial value:
 {
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_WORD,
                GPDMA_WIDTH_WORD,
                GPDMA_WIDTH_WORD,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_BYTE,
                GPDMA_WIDTH_WORD,
                GPDMA_WIDTH_WORD,
                GPDMA_WIDTH_WORD,
                GPDMA_WIDTH_WORD,
                GPDMA_WIDTH_WORD,
                GPDMA_WIDTH_WORD,
                GPDMA_WIDTH_WORD,
                GPDMA_WIDTH_WORD
}

Optimized Peripheral Source and Destination transfer width.

Definition at line 159 of file lpc17xx_gpdma.c.

const LPC_GPDMACH_TypeDef* pGPDMACh[8]
Initial value:
 {
                LPC_GPDMACH0,
                LPC_GPDMACH1,
                LPC_GPDMACH2,
                LPC_GPDMACH3,
                LPC_GPDMACH4,
                LPC_GPDMACH5,
                LPC_GPDMACH6,
                LPC_GPDMACH7
}

Lookup Table of GPDMA Channel Number matched with GPDMA channel pointer.

Definition at line 117 of file lpc17xx_gpdma.c.

Generated on Mon Nov 28 2011 11:15:18 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPIO (General Purpose Input/Output)

Modules
GPIO (General Purpose Input/Output)
LPC1700CMSIS Firmware Library

Modules

GPIO Public Macros
GPIO Public Types
GPIO Public Functions
Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPIO Public Macros

Defines
GPIO Public Macros
GPIO (General Purpose Input/Output)

Defines

#define | GPIO0_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO0_BASE))
#define | GPIO1_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO1_BASE))
#define | GPIO2_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO2_BASE))
#define | GPIO3_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO3_BASE))
#define | GPIO4_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO4_BASE))
#define | GPIO0_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO0_BASE))
#define | GPIO1_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO1_BASE))
#define | GPIO2_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO2_BASE))
#define | GPIO3_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO3_BASE))
#define | GPIO4_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO4_BASE))

Define Documentation

#define GPIO0_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO0_BASE))

Fast GPIO port 0 byte accessible definition

Definition at line 52 of file lpc17xx_gpio.h.

#define GPIO0_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO0_BASE))

Fast GPIO port 0 half-word accessible definition

Definition at line 64 of file lpc17xx_gpio.h.

#define GPIO1_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO1_BASE))

Fast GPIO port 1 byte accessible definition

Definition at line 54 of file lpc17xx_gpio.h.

#define GPIO1_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO1_BASE))

Fast GPIO port 1 half-word accessible definition

Definition at line 66 of file lpc17xx_gpio.h.

#define GPIO2_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO2_BASE))

Fast GPIO port 2 byte accessible definition

Definition at line 56 of file lpc17xx_gpio.h.

#define GPIO2_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO2_BASE))

Fast GPIO port 2 half-word accessible definition

Definition at line 68 of file lpc17xx_gpio.h.

#define GPIO3_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO3_BASE))

Fast GPIO port 3 byte accessible definition

Definition at line 58 of file lpc17xx_gpio.h.

#define GPIO3_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO3_BASE))

Fast GPIO port 3 half-word accessible definition

Definition at line 70 of file lpc17xx_gpio.h.

#define GPIO4_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO4_BASE))

Fast GPIO port 4 byte accessible definition

Definition at line 60 of file lpc17xx_gpio.h.

#define GPIO4_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO4_BASE))

Fast GPIO port 4 half-word accessible definition

Definition at line 72 of file lpc17xx_gpio.h.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPIO Public Types

Data Structures
GPIO Public Types
GPIO (General Purpose Input/Output)

Data Structures

struct | GPIO_Byte_TypeDef
Fast GPIO port byte type definition. More...
struct | GPIO_HalfWord_TypeDef
Fast GPIO port half-word type definition. More...
Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPIO Public Functions

Functions
GPIO Public Functions
GPIO (General Purpose Input/Output)

Functions

void | GPIO_SetDir (uint8_t portNum, uint32_t bitValue, uint8_t dir)
Set Direction for GPIO port.
void | GPIO_SetValue (uint8_t portNum, uint32_t bitValue)
Set Value for bits that have output direction on GPIO port.
void | GPIO_ClearValue (uint8_t portNum, uint32_t bitValue)
Clear Value for bits that have output direction on GPIO port.
uint32_t | GPIO_ReadValue (uint8_t portNum)
Read Current state on port pin that have input direction of GPIO.
void | GPIO_IntCmd (uint8_t portNum, uint32_t bitValue, uint8_t edgeState)
Enable GPIO interrupt (just used for P0.0-P0.30, P2.0-P2.13)
FunctionalState | GPIO_GetIntStatus (uint8_t portNum, uint32_t pinNum, uint8_t edgeState)
Get GPIO Interrupt Status (just used for P0.0-P0.30, P2.0-P2.13)
void | GPIO_ClearInt (uint8_t portNum, uint32_t bitValue)
Clear GPIO interrupt (just used for P0.0-P0.30, P2.0-P2.13)
void | FIO_SetDir (uint8_t portNum, uint32_t bitValue, uint8_t dir)
The same with GPIO_SetDir()
void | FIO_SetValue (uint8_t portNum, uint32_t bitValue)
The same with GPIO_SetValue()
void | FIO_ClearValue (uint8_t portNum, uint32_t bitValue)
The same with GPIO_ClearValue()
uint32_t | FIO_ReadValue (uint8_t portNum)
The same with GPIO_ReadValue()
void | FIO_SetMask (uint8_t portNum, uint32_t bitValue, uint8_t maskValue)
Set mask value for bits in FIO port.
void | FIO_IntCmd (uint8_t portNum, uint32_t bitValue, uint8_t edgeState)
The same with GPIO_IntCmd()
FunctionalState | FIO_GetIntStatus (uint8_t portNum, uint32_t pinNum, uint8_t edgeState)
The same with GPIO_GetIntStatus()
void | FIO_ClearInt (uint8_t portNum, uint32_t bitValue)
The same with GPIO_ClearInt()
void | FIO_HalfWordSetDir (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t dir)
Set direction for FIO port in halfword accessible style.
void | FIO_HalfWordSetMask (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t maskValue)
Set mask value for bits in FIO port in halfword accessible style.
void | FIO_HalfWordSetValue (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue)
Set bits for FIO port in halfword accessible style.
void | FIO_HalfWordClearValue (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue)
Clear bits for FIO port in halfword accessible style.
uint16_t | FIO_HalfWordReadValue (uint8_t portNum, uint8_t halfwordNum)
Read Current state on port pin that have input direction of GPIO in halfword accessible style.
void | FIO_ByteSetDir (uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t dir)
Set direction for FIO port in byte accessible style.
void | FIO_ByteSetMask (uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t maskValue)
Set mask value for bits in FIO port in byte accessible style.
void | FIO_ByteSetValue (uint8_t portNum, uint8_t byteNum, uint8_t bitValue)
Set bits for FIO port in byte accessible style.
void | FIO_ByteClearValue (uint8_t portNum, uint8_t byteNum, uint8_t bitValue)
Clear bits for FIO port in byte accessible style.
uint8_t | FIO_ByteReadValue (uint8_t portNum, uint8_t byteNum)
Read Current state on port pin that have input direction of GPIO in byte accessible style.

Function Documentation

void FIO_ByteClearValue | ( | uint8_t | portNum,
 |  | uint8_t | byteNum,
 |  | uint8_t | bitValue
 | ) |  |

Clear bits for FIO port in byte accessible style.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | byteNum | Byte part number, should be in range from 0 to 3
[in] | bitValue | Value that contains all bits in to clear, in range from 0 to 0xFF.
Returns:
None

Note:

  • For all bits that has been set as input direction, this function will not effect.
  • For all remaining bits that are not activated in bitValue (value '0') will not be effected by this function.

Definition at line 715 of file lpc17xx_gpio.c.

uint8_t FIO_ByteReadValue | ( | uint8_t | portNum,
 |  | uint8_t | byteNum
 | ) |  |

Read Current state on port pin that have input direction of GPIO in byte accessible style.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | byteNum | Byte part number, should be in range from 0 to 3
Returns:
Current value of FIO port pin of specified byte part. Note: Return value contain state of each port pin (bit) on that FIO regardless its direction is input or output.

Definition at line 735 of file lpc17xx_gpio.c.

void FIO_ByteSetDir | ( | uint8_t | portNum,
 |  | uint8_t | byteNum,
 |  | uint8_t | bitValue,
 |  | uint8_t | dir
 | ) |  |

Set direction for FIO port in byte accessible style.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | byteNum | Byte part number, should be in range from 0 to 3
[in] | bitValue | Value that contains all bits in to set direction, in range from 0 to 0xFF.
[in] dir Direction value, should be:
  • 0: Input.
  • 1: Output.
Returns:
None

Note: All remaining bits that are not activated in bitValue (value '0') will not be effected by this function.

Definition at line 618 of file lpc17xx_gpio.c.

void FIO_ByteSetMask | ( | uint8_t | portNum,
 |  | uint8_t | byteNum,
 |  | uint8_t | bitValue,
 |  | uint8_t | maskValue
 | ) |  |

Set mask value for bits in FIO port in byte accessible style.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | byteNum | Byte part number, should be in range from 0 to 3
[in] | bitValue | Value that contains all bits in to set mask, in range from 0 to 0xFF.
[in] maskValue Mask value contains state value for each bit:
  • 0: not mask.
  • 1: mask.
Returns:
None

Note:

  • All remaining bits that are not activated in bitValue (value '0') will not be effected by this function.
  • After executing this function, in mask register, value '0' on each bit enables an access to the corresponding physical pin via a read or write access, while value '1' on bit (masked) that corresponding pin will not be changed with write access and if read, will not be reflected in the updated pin.

Definition at line 656 of file lpc17xx_gpio.c.

void FIO_ByteSetValue | ( | uint8_t | portNum,
 |  | uint8_t | byteNum,
 |  | uint8_t | bitValue
 | ) |  |

Set bits for FIO port in byte accessible style.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | byteNum | Byte part number, should be in range from 0 to 3
[in] | bitValue | Value that contains all bits in to set, in range from 0 to 0xFF.
Returns:
None

Note:

  • For all bits that has been set as input direction, this function will not effect.
  • For all remaining bits that are not activated in bitValue (value '0') will not be effected by this function.

Definition at line 690 of file lpc17xx_gpio.c.

void FIO_ClearInt | ( | uint8_t | portNum,
 |  | uint32_t | pinNum
 | ) |  |

The same with GPIO_ClearInt()

Definition at line 383 of file lpc17xx_gpio.c.

void FIO_ClearValue | ( | uint8_t | portNum,
 |  | uint32_t | bitValue
 | ) |  |

The same with GPIO_ClearValue()

Definition at line 351 of file lpc17xx_gpio.c.

FunctionalState FIO_GetIntStatus | ( | uint8_t | portNum,
 |  | uint32_t | pinNum,
 |  | uint8_t | edgeState
 | ) |  |

The same with GPIO_GetIntStatus()

Definition at line 375 of file lpc17xx_gpio.c.

void FIO_HalfWordClearValue | ( | uint8_t | portNum,
 |  | uint8_t | halfwordNum,
 |  | uint16_t | bitValue
 | ) |  |

Clear bits for FIO port in halfword accessible style.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | halfwordNum | HalfWord part number, should be 0 (lower) or 1(upper)
[in] | bitValue | Value that contains all bits in to clear, in range from 0 to 0xFFFF.
Returns:
None

Note:

  • For all bits that has been set as input direction, this function will not effect.
  • For all remaining bits that are not activated in bitValue (value '0') will not be effected by this function.

Definition at line 560 of file lpc17xx_gpio.c.

uint16_t FIO_HalfWordReadValue | ( | uint8_t | portNum,
 |  | uint8_t | halfwordNum
 | ) |  |

Read Current state on port pin that have input direction of GPIO in halfword accessible style.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | halfwordNum | HalfWord part number, should be 0 (lower) or 1(upper)
Returns:
Current value of FIO port pin of specified halfword. Note: Return value contain state of each port pin (bit) on that FIO regardless its direction is input or output.

Definition at line 585 of file lpc17xx_gpio.c.

void FIO_HalfWordSetDir | ( | uint8_t | portNum,
 |  | uint8_t | halfwordNum,
 |  | uint16_t | bitValue,
 |  | uint8_t | dir
 | ) |  |

Set direction for FIO port in halfword accessible style.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | halfwordNum | HalfWord part number, should be 0 (lower) or 1(upper)
[in] | bitValue | Value that contains all bits in to set direction, in range from 0 to 0xFFFF.
[in] dir Direction value, should be:
  • 0: Input.
  • 1: Output.
Returns:
None

Note: All remaining bits that are not activated in bitValue (value '0') will not be effected by this function.

Definition at line 437 of file lpc17xx_gpio.c.

void FIO_HalfWordSetMask | ( | uint8_t | portNum,
 |  | uint8_t | halfwordNum,
 |  | uint16_t | bitValue,
 |  | uint8_t | maskValue
 | ) |  |

Set mask value for bits in FIO port in halfword accessible style.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | halfwordNum | HalfWord part number, should be 0 (lower) or 1(upper)
[in] | bitValue | Value that contains all bits in to set, in range from 0 to 0xFFFF.
[in] maskValue Mask value contains state value for each bit:
  • 0: not mask.
  • 1: mask.
Returns:
None

Note:

  • All remaining bits that are not activated in bitValue (value '0') will not be effected by this function.
  • After executing this function, in mask register, value '0' on each bit enables an access to the corresponding physical pin via a read or write access, while value '1' on bit (masked) that corresponding pin will not be changed with write access and if read, will not be reflected in the updated pin.

Definition at line 486 of file lpc17xx_gpio.c.

void FIO_HalfWordSetValue | ( | uint8_t | portNum,
 |  | uint8_t | halfwordNum,
 |  | uint16_t | bitValue
 | ) |  |

Set bits for FIO port in halfword accessible style.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | halfwordNum | HalfWord part number, should be 0 (lower) or 1(upper)
[in] | bitValue | Value that contains all bits in to set, in range from 0 to 0xFFFF.
Returns:
None

Note:

  • For all bits that has been set as input direction, this function will not effect.
  • For all remaining bits that are not activated in bitValue (value '0') will not be effected by this function.

Definition at line 530 of file lpc17xx_gpio.c.

void FIO_IntCmd | ( | uint8_t | portNum,
 |  | uint32_t | bitValue,
 |  | uint8_t | edgeState
 | ) |  |

The same with GPIO_IntCmd()

Definition at line 367 of file lpc17xx_gpio.c.

uint32_t FIO_ReadValue ( uint8_t portNum )

The same with GPIO_ReadValue()

Definition at line 359 of file lpc17xx_gpio.c.

void FIO_SetDir | ( | uint8_t | portNum,
 |  | uint32_t | bitValue,
 |  | uint8_t | dir
 | ) |  |

The same with GPIO_SetDir()

Definition at line 335 of file lpc17xx_gpio.c.

void FIO_SetMask | ( | uint8_t | portNum,
 |  | uint32_t | bitValue,
 |  | uint8_t | maskValue
 | ) |  |

Set mask value for bits in FIO port.

Parameters:
[in] | portNum | Port number, in range from 0 to 4
[in] | bitValue | Value that contains all bits in to set, in range from 0 to 0xFFFFFFFF.
[in] maskValue Mask value contains state value for each bit:
  • 0: not mask.
  • 1: mask.
Returns:
None

Note:

  • All remaining bits that are not activated in bitValue (value '0') will not be effected by this function.
  • After executing this function, in mask register, value '0' on each bit enables an access to the corresponding physical pin via a read or write access, while value '1' on bit (masked) that corresponding pin will not be changed with write access and if read, will not be reflected in the updated pin.

Definition at line 405 of file lpc17xx_gpio.c.

void FIO_SetValue | ( | uint8_t | portNum,
 |  | uint32_t | bitValue
 | ) |  |

The same with GPIO_SetValue()

Definition at line 343 of file lpc17xx_gpio.c.

void GPIO_ClearInt | ( | uint8_t | portNum,
 |  | uint32_t | bitValue
 | ) |  |

Clear GPIO interrupt (just used for P0.0-P0.30, P2.0-P2.13)

Parameters:
[in] | portNum | Port number to read value, should be: 0 or 2
[in] | bitValue | Value that contains all bits on GPIO to enable, in range from 0 to 0xFFFFFFFF.
Returns:
None

Definition at line 318 of file lpc17xx_gpio.c.

void GPIO_ClearValue | ( | uint8_t | portNum,
 |  | uint32_t | bitValue
 | ) |  |

Clear Value for bits that have output direction on GPIO port.

Parameters:
[in] | portNum | Port number value, should be in range from 0 to 4
[in] | bitValue | Value that contains all bits on GPIO to clear, in range from 0 to 0xFFFFFFFF. example: value 0x5 to clear bit 0 and bit 1.
Returns:
None

Note:

  • For all bits that has been set as input direction, this function will not effect.
  • For all remaining bits that are not activated in bitValue (value '0') will not be effected by this function.

Definition at line 231 of file lpc17xx_gpio.c.

FunctionalState GPIO_GetIntStatus | ( | uint8_t | portNum,
 |  | uint32_t | pinNum,
 |  | uint8_t | edgeState
 | ) |  |

Get GPIO Interrupt Status (just used for P0.0-P0.30, P2.0-P2.13)

Parameters:
[in] | portNum | Port number to read value, should be: 0 or 2
[in] | pinNum | Pin number, should be: 0..30(with port 0) and 0..13 (with port 2)
[in] edgeState state of edge, should be:
  • 0: Rising edge
  • 1: Falling edge
Returns:
Bool could be:
  • ENABLE: Interrupt has been generated due to a rising edge on P0.0
  • DISABLE: A rising edge has not been detected on P0.0

Definition at line 297 of file lpc17xx_gpio.c.

void GPIO_IntCmd | ( | uint8_t | portNum,
 |  | uint32_t | bitValue,
 |  | uint8_t | edgeState
 | ) |  |

Enable GPIO interrupt (just used for P0.0-P0.30, P2.0-P2.13)

Parameters:
[in] | portNum | Port number to read value, should be: 0 or 2
[in] | bitValue | Value that contains all bits on GPIO to enable, in range from 0 to 0xFFFFFFFF.
[in] edgeState state of edge, should be:
  • 0: Rising edge
  • 1: Falling edge
Returns:
None

Definition at line 269 of file lpc17xx_gpio.c.

uint32_t GPIO_ReadValue ( uint8_t portNum )

Read Current state on port pin that have input direction of GPIO.

Parameters:
[in] portNum Port number to read value, in range from 0 to 4
Returns:
Current value of GPIO port.

Note: Return value contain state of each port pin (bit) on that GPIO regardless its direction is input or output.

Definition at line 248 of file lpc17xx_gpio.c.

void GPIO_SetDir | ( | uint8_t | portNum,
 |  | uint32_t | bitValue,
 |  | uint8_t | dir
 | ) |  |

Set Direction for GPIO port.

Parameters:
[in] | portNum | Port Number value, should be in range from 0 to 4
[in] | bitValue | Value that contains all bits to set direction, in range from 0 to 0xFFFFFFFF. example: value 0x5 to set direction for bit 0 and bit 1.
[in] dir Direction value, should be:
  • 0: Input.
  • 1: Output.
Returns:
None

Note: All remaining bits that are not activated in bitValue (value '0') will not be effected by this function.

Definition at line 177 of file lpc17xx_gpio.c.

void GPIO_SetValue | ( | uint8_t | portNum,
 |  | uint32_t | bitValue
 | ) |  |

Set Value for bits that have output direction on GPIO port.

Parameters:
[in] | portNum | Port number value, should be in range from 0 to 4
[in] | bitValue | Value that contains all bits on GPIO to set, in range from 0 to 0xFFFFFFFF. example: value 0x5 to set bit 0 and bit 1.
Returns:
None

Note:

  • For all bits that has been set as input direction, this function will not effect.
  • For all remaining bits that are not activated in bitValue (value '0') will not be effected by this function.

Definition at line 208 of file lpc17xx_gpio.c.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2C (Inter-IC Control bus)

Modules
I2C (Inter-IC Control bus)
LPC1700CMSIS Firmware Library

Modules

I2C Private Macros
I2C Public Types
I2C Public Functions
I2C Private Types
Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2C Private Macros

Defines
I2C Private Macros
I2C (Inter-IC Control bus)

Defines

#define | I2C_I2CONSET_AA ((0x04))
#define | I2C_I2CONSET_SI ((0x08))
#define | I2C_I2CONSET_STO ((0x10))
#define | I2C_I2CONSET_STA ((0x20))
#define | I2C_I2CONSET_I2EN ((0x40))
#define | I2C_I2CONCLR_AAC ((1<<2))
#define | I2C_I2CONCLR_SIC ((1<<3))
#define | I2C_I2CONCLR_STAC ((1<<5))
#define | I2C_I2CONCLR_I2ENC ((1<<6))
#define | I2C_STAT_CODE_BITMASK ((0xF8))
#define | I2C_I2STAT_NO_INF ((0xF8))
#define | I2C_I2STAT_M_TX_START ((0x08))
#define | I2C_I2STAT_M_TX_RESTART ((0x10))
#define | I2C_I2STAT_M_TX_SLAW_ACK ((0x18))
#define | I2C_I2STAT_M_TX_SLAW_NACK ((0x20))
#define | I2C_I2STAT_M_TX_DAT_ACK ((0x28))
#define | I2C_I2STAT_M_TX_DAT_NACK ((0x30))
#define | I2C_I2STAT_M_TX_ARB_LOST ((0x38))
#define | I2C_I2STAT_M_RX_START ((0x08))
#define | I2C_I2STAT_M_RX_RESTART ((0x10))
#define | I2C_I2STAT_M_RX_ARB_LOST ((0x38))
#define | I2C_I2STAT_M_RX_SLAR_ACK ((0x40))
#define | I2C_I2STAT_M_RX_SLAR_NACK ((0x48))
#define | I2C_I2STAT_M_RX_DAT_ACK ((0x50))
#define | I2C_I2STAT_M_RX_DAT_NACK ((0x58))
#define | I2C_I2STAT_S_RX_SLAW_ACK ((0x60))
#define | I2C_I2STAT_S_RX_ARB_LOST_M_SLA ((0x68))
#define | I2C_I2STAT_S_RX_GENCALL_ACK ((0x70))
#define | I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL ((0x78))
#define | I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK ((0x80))
#define | I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK ((0x88))
#define | I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK ((0x90))
#define | I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK ((0x98))
#define | I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX ((0xA0))
#define | I2C_I2STAT_S_TX_SLAR_ACK ((0xA8))
#define | I2C_I2STAT_S_TX_ARB_LOST_M_SLA ((0xB0))
#define | I2C_I2STAT_S_TX_DAT_ACK ((0xB8))
#define | I2C_I2STAT_S_TX_DAT_NACK ((0xC0))
#define | I2C_I2STAT_S_TX_LAST_DAT_ACK ((0xC8))
#define | I2C_SLAVE_TIME_OUT 0x10000UL
#define | I2C_I2DAT_BITMASK ((0xFF))
#define | I2C_I2DAT_IDLE_CHAR (0xFF)
#define | I2C_I2MMCTRL_MM_ENA ((1<<0))
#define | I2C_I2MMCTRL_ENA_SCL ((1<<1))
#define | I2C_I2MMCTRL_MATCH_ALL ((1<<2))
#define | I2C_I2MMCTRL_BITMASK ((0x07))
#define | I2DATA_BUFFER_BITMASK ((0xFF))
#define | I2C_I2ADR_GC ((1<<0))
#define | I2C_I2ADR_BITMASK ((0xFF))
#define | I2C_I2MASK_MASK(n) ((n&0xFE))
#define | I2C_I2SCLH_BITMASK ((0xFFFF))
#define | I2C_I2SCLL_BITMASK ((0xFFFF))
#define | I2C_SETUP_STATUS_ARBF (1<<8)
#define | I2C_SETUP_STATUS_NOACKF (1<<9)
#define | I2C_SETUP_STATUS_DONE (1<<10)
#define | I2C_MONITOR_CFG_SCL_OUTPUT I2C_I2MMCTRL_ENA_SCL
#define | I2C_MONITOR_CFG_MATCHALL I2C_I2MMCTRL_MATCH_ALL
#define | PARAM_I2C_SLAVEADDR_CH(n) (n<=3)
#define | PARAM_I2Cx(n)
#define | PARAM_I2C_MONITOR_CFG(n) ((n==I2C_MONITOR_CFG_SCL_OUTPUT) || (I2C_MONITOR_CFG_MATCHALL))

Define Documentation

#define I2C_I2ADR_BITMASK ((0xFF))

I2C Slave Address registers bit mask

Definition at line 202 of file lpc17xx_i2c.h.

#define I2C_I2ADR_GC ((1<<0))

I2C Slave Address registers definition General Call enable bit

Definition at line 200 of file lpc17xx_i2c.h.

#define I2C_I2CONCLR_AAC ((1<<2))

I2C Control Clear register description Assert acknowledge Clear bit

Definition at line 66 of file lpc17xx_i2c.h.

#define I2C_I2CONCLR_I2ENC ((1<<6))

I2C interface Disable bit

Definition at line 72 of file lpc17xx_i2c.h.

#define I2C_I2CONCLR_SIC ((1<<3))

I2C interrupt Clear bit

Definition at line 68 of file lpc17xx_i2c.h.

#define I2C_I2CONCLR_STAC ((1<<5))

START flag Clear bit

Definition at line 70 of file lpc17xx_i2c.h.

#define I2C_I2CONSET_AA ((0x04))

I2C Control Set register description Assert acknowledge flag

Definition at line 56 of file lpc17xx_i2c.h.

#define I2C_I2CONSET_I2EN ((0x40))

I2C interface enable

Definition at line 60 of file lpc17xx_i2c.h.

#define I2C_I2CONSET_SI ((0x08))

I2C interrupt flag

Definition at line 57 of file lpc17xx_i2c.h.

#define I2C_I2CONSET_STA ((0x20))

START flag

Definition at line 59 of file lpc17xx_i2c.h.

#define I2C_I2CONSET_STO ((0x10))

STOP flag

Definition at line 58 of file lpc17xx_i2c.h.

#define I2C_I2DAT_BITMASK ((0xFF))

I2C Data register definition Mask for I2DAT register

Definition at line 175 of file lpc17xx_i2c.h.

#define I2C_I2DAT_IDLE_CHAR (0xFF)

Idle data value will be send out in slave mode in case of the actual expecting data requested from the master is greater than its sending data length that can be supported

Definition at line 180 of file lpc17xx_i2c.h.

#define I2C_I2MASK_MASK ( n ) ((n&0xFE))

I2C Mask Register definition I2C Mask Register mask field

Definition at line 208 of file lpc17xx_i2c.h.

#define I2C_I2MMCTRL_BITMASK ((0x07))

Mask for I2MMCTRL register

Definition at line 188 of file lpc17xx_i2c.h.

#define I2C_I2MMCTRL_ENA_SCL ((1<<1))

SCL output enable

Definition at line 186 of file lpc17xx_i2c.h.

#define I2C_I2MMCTRL_MATCH_ALL ((1<<2))

Select interrupt register match

Definition at line 187 of file lpc17xx_i2c.h.

#define I2C_I2MMCTRL_MM_ENA ((1<<0))

I2C Monitor mode control register description Monitor mode enable

Definition at line 185 of file lpc17xx_i2c.h.

#define I2C_I2SCLH_BITMASK ((0xFFFF))

I2C SCL HIGH duty cycle Register definition I2C SCL HIGH duty cycle Register bit mask

Definition at line 214 of file lpc17xx_i2c.h.

#define I2C_I2SCLL_BITMASK ((0xFFFF))

I2C SCL LOW duty cycle Register definition I2C SCL LOW duty cycle Register bit mask

Definition at line 220 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_ARB_LOST ((0x38))

Arbitration lost

Definition at line 107 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_DAT_ACK ((0x50))

Data has been received, ACK has been returned

Definition at line 113 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_DAT_NACK ((0x58))

Data has been received, NACK has been return

Definition at line 115 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_RESTART ((0x10))

A repeat start condition has been transmitted

Definition at line 105 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_SLAR_ACK ((0x40))

SLA+R has been transmitted, ACK has been received

Definition at line 109 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_SLAR_NACK ((0x48))

SLA+R has been transmitted, NACK has been received

Definition at line 111 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_RX_START ((0x08))

A start condition has been transmitted

Definition at line 103 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_ARB_LOST ((0x38))

Arbitration lost in SLA+R/W or Data bytes

Definition at line 99 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_DAT_ACK ((0x28))

Data has been transmitted, ACK has been received

Definition at line 95 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_DAT_NACK ((0x30))

Data has been transmitted, NACK has been received

Definition at line 97 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_RESTART ((0x10))

A repeat start condition has been transmitted

Definition at line 89 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_SLAW_ACK ((0x18))

SLA+W has been transmitted, ACK has been received

Definition at line 91 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_SLAW_NACK ((0x20))

SLA+W has been transmitted, NACK has been received

Definition at line 93 of file lpc17xx_i2c.h.

#define I2C_I2STAT_M_TX_START ((0x08))

A start condition has been transmitted

Definition at line 87 of file lpc17xx_i2c.h.

#define I2C_I2STAT_NO_INF ((0xF8))

No relevant information

Definition at line 83 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL ((0x78))

Arbitration lost in SLA+R/W (GENERAL CALL) as master

Definition at line 130 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_ARB_LOST_M_SLA ((0x68))

Arbitration lost in SLA+R/W as master

Definition at line 122 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_GENCALL_ACK ((0x70))

Own SLA+W has been received, ACK returned General call address has been received, ACK has been returned

Definition at line 127 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK ((0x90))

Previously addressed with General Call; Data has been received and ACK has been return

Definition at line 142 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK ((0x98))

Previously addressed with General Call; Data has been received and NOT ACK has been return

Definition at line 145 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK ((0x80))

General call address has been received, ACK has been returned Previously addressed with own SLV address; Data has been received, ACK has been return

Definition at line 136 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK ((0x88))

Previously addressed with own SLA; Data has been received and NOT ACK has been return

Definition at line 139 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_SLAW_ACK ((0x60))

Own slave address has been received, ACK has been returned

Definition at line 119 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX ((0xA0))

A STOP condition or repeated START condition has been received while still addressed as SLV/REC (Slave Receive) or SLV/TRX (Slave Transmit)

Definition at line 149 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_TX_ARB_LOST_M_SLA ((0xB0))

Arbitration lost in SLA+R/W as master

Definition at line 156 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_TX_DAT_ACK ((0xB8))

Own SLA+R has been received, ACK has been returned Data has been transmitted, ACK has been received

Definition at line 161 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_TX_DAT_NACK ((0xC0))

Data has been transmitted, NACK has been received

Definition at line 163 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_TX_LAST_DAT_ACK ((0xC8))

Last data byte in I2DAT has been transmitted (AA = 0); ACK has been received

Definition at line 166 of file lpc17xx_i2c.h.

#define I2C_I2STAT_S_TX_SLAR_ACK ((0xA8))

Slave transmit mode Own SLA+R has been received, ACK has been returned

Definition at line 153 of file lpc17xx_i2c.h.

#define I2C_MONITOR_CFG_MATCHALL I2C_I2MMCTRL_MATCH_ALL

Select interrupt register match

Definition at line 231 of file lpc17xx_i2c.h.

#define I2C_MONITOR_CFG_SCL_OUTPUT I2C_I2MMCTRL_ENA_SCL

I2C monitor control configuration defines SCL output enable

Definition at line 230 of file lpc17xx_i2c.h.

#define I2C_SETUP_STATUS_ARBF (1<<8)

Arbitration false

Definition at line 223 of file lpc17xx_i2c.h.

#define I2C_SETUP_STATUS_DONE (1<<10)

Status DONE

Definition at line 225 of file lpc17xx_i2c.h.

#define I2C_SETUP_STATUS_NOACKF (1<<9)

No ACK returned

Definition at line 224 of file lpc17xx_i2c.h.

#define I2C_SLAVE_TIME_OUT 0x10000UL

Time out in case of using I2C slave mode

Definition at line 169 of file lpc17xx_i2c.h.

#define I2C_STAT_CODE_BITMASK ((0xF8))

I2C Status Code definition (I2C Status register)

Definition at line 78 of file lpc17xx_i2c.h.

#define I2DATA_BUFFER_BITMASK ((0xFF))

I2C Data buffer register description I2C Data buffer register bit mask

Definition at line 194 of file lpc17xx_i2c.h.

#define PARAM_I2C_MONITOR_CFG ( n ) ((n==I2C_MONITOR_CFG_SCL_OUTPUT) || (I2C_MONITOR_CFG_MATCHALL))

Definition at line 243 of file lpc17xx_i2c.h.

#define PARAM_I2C_SLAVEADDR_CH ( n ) (n<=3)

Definition at line 235 of file lpc17xx_i2c.h.

#define PARAM_I2Cx ( n )
Value:
((((uint32_t *)n)==((uint32_t *)LPC_I2C0)) \
|| (((uint32_t *)n)==((uint32_t *)LPC_I2C1)) \
|| (((uint32_t *)n)==((uint32_t *)LPC_I2C2)))

Macro to determine if it is valid SSP port number

Definition at line 238 of file lpc17xx_i2c.h.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2C Public Types

Data Structures | Enumerations
I2C Public Types
I2C (Inter-IC Control bus)

Data Structures

struct | I2C_OWNSLAVEADDR_CFG_Type
I2C Own slave address setting structure. More...
struct | I2C_M_SETUP_Type
Master transfer setup data structure definitions. More...
struct | I2C_S_SETUP_Type
Slave transfer setup data structure definitions. More...

Enumerations

enum | I2C_TRANSFER_OPT_Type { I2C_TRANSFER_POLLING = 0, I2C_TRANSFER_INTERRUPT }
Transfer option type definitions. More...

Enumeration Type Documentation

enum I2C_TRANSFER_OPT_Type

Transfer option type definitions.

Enumerator:
I2C_TRANSFER_POLLING

Transfer in polling mode

I2C_TRANSFER_INTERRUPT

Transfer in interrupt mode

Definition at line 322 of file lpc17xx_i2c.h.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2C Public Functions

Functions
I2C Public Functions
I2C (Inter-IC Control bus)

Functions

void | I2C_Init (LPC_I2C_TypeDef *I2Cx, uint32_t clockrate)
Initializes the I2Cx peripheral with specified parameter.
void | I2C_DeInit (LPC_I2C_TypeDef *I2Cx)
De-initializes the I2C peripheral registers to their default reset values.
void | I2C_Cmd (LPC_I2C_TypeDef *I2Cx, FunctionalState NewState)
Enable or disable I2C peripheral's operation.
Status | I2C_MasterTransferData (LPC_I2C_TypeDef *I2Cx, I2C_M_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt)
Transmit and Receive data in master mode.
Status | I2C_SlaveTransferData (LPC_I2C_TypeDef *I2Cx, I2C_S_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt)
Receive and Transmit data in slave mode.
uint32_t | I2C_MasterTransferComplete (LPC_I2C_TypeDef *I2Cx)
Get status of Master Transfer.
uint32_t | I2C_SlaveTransferComplete (LPC_I2C_TypeDef *I2Cx)
Get status of Slave Transfer.
void | I2C_SetOwnSlaveAddr (LPC_I2C_TypeDef *I2Cx, I2C_OWNSLAVEADDR_CFG_Type *OwnSlaveAddrConfigStruct)
Set Own slave address in I2C peripheral corresponding to parameter specified in OwnSlaveAddrConfigStruct.
uint8_t | I2C_GetLastStatusCode (LPC_I2C_TypeDef *I2Cx)
void | I2C_MonitorModeConfig (LPC_I2C_TypeDef *I2Cx, uint32_t MonitorCfgType, FunctionalState NewState)
Configures functionality in I2C monitor mode.
void | I2C_MonitorModeCmd (LPC_I2C_TypeDef *I2Cx, FunctionalState NewState)
Enable/Disable I2C monitor mode.
uint8_t | I2C_MonitorGetDatabuffer (LPC_I2C_TypeDef *I2Cx)
Get data from I2C data buffer in monitor mode.
BOOL_8 | I2C_MonitorHandler (LPC_I2C_TypeDef *I2Cx, uint8_t *buffer, uint32_t size)
Get data from I2C data buffer in monitor mode.
void | I2C_IntCmd (LPC_I2C_TypeDef *I2Cx, Bool NewState)
Enable/Disable interrupt for I2C peripheral.
void | I2C_MasterHandler (LPC_I2C_TypeDef *I2Cx)
General Master Interrupt handler for I2C peripheral.
void | I2C_SlaveHandler (LPC_I2C_TypeDef *I2Cx)
General Slave Interrupt handler for I2C peripheral.

Function Documentation

void I2C_Cmd | ( | LPC_I2C_TypeDef * | I2Cx,
 |  | FunctionalState | NewState
 | ) |  |

Enable or disable I2C peripheral's operation.

Parameters:
[in] I2Cx I2C peripheral selected, should be
  • LPC_I2C0
    • LPC_I2C1
    • LPC_I2C2
[in] NewState New State of I2Cx peripheral's operation
Returns:
none

Definition at line 342 of file lpc17xx_i2c.c.

void I2C_DeInit ( LPC_I2C_TypeDef * I2Cx )

De-initializes the I2C peripheral registers to their default reset values.

Parameters:
[in] I2Cx I2C peripheral selected, should be
  • LPC_I2C0
    • LPC_I2C1
    • LPC_I2C2
Returns:
None

Definition at line 309 of file lpc17xx_i2c.c.

uint8_t I2C_GetLastStatusCode ( LPC_I2C_TypeDef * I2Cx )
void I2C_Init | ( | LPC_I2C_TypeDef * | I2Cx,
 |  | uint32_t | clockrate
 | ) |  |

Initializes the I2Cx peripheral with specified parameter.

Parameters:
[in] I2Cx I2C peripheral selected, should be
  • LPC_I2C0
  • LPC_I2C1
  • LPC_I2C2
[in] clockrate Target clock rate value to initialized I2C peripheral (Hz)
Returns:
None

Definition at line 261 of file lpc17xx_i2c.c.

void I2C_IntCmd | ( | LPC_I2C_TypeDef * | I2Cx,
 |  | Bool | NewState
 | ) |  |

Enable/Disable interrupt for I2C peripheral.

Parameters:
[in] I2Cx I2C peripheral selected, should be:
  • LPC_I2C0
  • LPC_I2C1
  • LPC_I2C2
[in] NewState New State of I2C peripheral interrupt in NVIC core should be:
  • ENABLE: enable interrupt for this I2C peripheral
  • DISABLE: disable interrupt for this I2C peripheral
Returns:
None

Definition at line 369 of file lpc17xx_i2c.c.

void I2C_MasterHandler ( LPC_I2C_TypeDef * I2Cx )

General Master Interrupt handler for I2C peripheral.

Parameters:
[in] I2Cx I2C peripheral selected, should be:
  • LPC_I2C
  • LPC_I2C1
  • LPC_I2C2
Returns:
None

Definition at line 413 of file lpc17xx_i2c.c.

uint32_t I2C_MasterTransferComplete ( LPC_I2C_TypeDef * I2Cx )

Get status of Master Transfer.

Parameters:
[in] I2Cx I2C peripheral selected, should be:
  • LPC_I2C0
    • LPC_I2C1
    • LPC_I2C2
Returns:
Master transfer status, could be:
  • TRUE master transfer completed
  • FALSE master transfer have not completed yet

Definition at line 1342 of file lpc17xx_i2c.c.

Status I2C_MasterTransferData | ( | LPC_I2C_TypeDef * | I2Cx,
 |  | I2C_M_SETUP_Type * | TransferCfg,
 |  | I2C_TRANSFER_OPT_Type | Opt
 | ) |  |

Transmit and Receive data in master mode.

Parameters:
[in] I2Cx I2C peripheral selected, should be:
  • LPC_I2C0
    • LPC_I2C1
    • LPC_I2C2
[in] | TransferCfg | Pointer to a I2C_M_SETUP_Type structure that contains specified information about the configuration for master transfer.
[in] | Opt | a I2C_TRANSFER_OPT_Type type that selected for interrupt or polling mode.
Returns:
SUCCESS or ERROR

Note:

  • In case of using I2C to transmit data only, either transmit length set to 0 or transmit data pointer set to NULL.
  • In case of using I2C to receive data only, either receive length set to 0 or receive data pointer set to NULL.
  • In case of using I2C to transmit followed by receive data, transmit length, transmit data pointer, receive length and receive data pointer should be set corresponding.

Definition at line 778 of file lpc17xx_i2c.c.

uint8_t I2C_MonitorGetDatabuffer ( LPC_I2C_TypeDef * I2Cx )

Get data from I2C data buffer in monitor mode.

Parameters:
[in] I2Cx I2C peripheral selected, should be
  • LPC_I2C0
    • LPC_I2C1
    • LPC_I2C2
Returns:
None Note: In monitor mode, the I2C module may lose the ability to stretch the clock (stall the bus) if the ENA_SCL bit is not set. This means that the processor will have a limited amount of time to read the contents of the data received on the bus. If the processor reads the I2DAT shift register, as it ordinarily would, it could have only one bit-time to respond to the interrupt before the received data is overwritten by new data.

Definition at line 1297 of file lpc17xx_i2c.c.

BOOL_8 I2C_MonitorHandler | ( | LPC_I2C_TypeDef * | I2Cx,
 |  | uint8_t * | buffer,
 |  | uint32_t | size
 | ) |  |

Get data from I2C data buffer in monitor mode.

Parameters:
[in] I2Cx I2C peripheral selected, should be
  • LPC_I2C0
    • LPC_I2C1
    • LPC_I2C2
Returns:
None Note: In monitor mode, the I2C module may lose the ability to stretch the clock (stall the bus) if the ENA_SCL bit is not set. This means that the processor will have a limited amount of time to read the contents of the data received on the bus. If the processor reads the I2DAT shift register, as it ordinarily would, it could have only one bit-time to respond to the interrupt before the received data is overwritten by new data.

Definition at line 1318 of file lpc17xx_i2c.c.

void I2C_MonitorModeCmd | ( | LPC_I2C_TypeDef * | I2Cx,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable I2C monitor mode.

Parameters:
[in] I2Cx I2C peripheral selected, should be
  • LPC_I2C0
    • LPC_I2C1
    • LPC_I2C2
[in] NewState New State of this function, should be:
  • ENABLE: Enable monitor mode.
  • DISABLE: Disable monitor mode.
Returns:
None

Definition at line 1262 of file lpc17xx_i2c.c.

void I2C_MonitorModeConfig | ( | LPC_I2C_TypeDef * | I2Cx,
 |  | uint32_t | MonitorCfgType,
 |  | FunctionalState | NewState
 | ) |  |

Configures functionality in I2C monitor mode.

Parameters:
[in] I2Cx I2C peripheral selected, should be
  • LPC_I2C0
    • LPC_I2C1
    • LPC_I2C2
[in] MonitorCfgType Monitor Configuration type, should be:
  • I2C_MONITOR_CFG_SCL_OUTPUT: I2C module can 'stretch' the clock line (hold it low) until it has had time to respond to an I2C interrupt.
  • I2C_MONITOR_CFG_MATCHALL: When this bit is set to '1' and the I2C is in monitor mode, an interrupt will be generated on ANY address received.
[in] NewState New State of this function, should be:
  • ENABLE: Enable this function.
  • DISABLE: Disable this function.
Returns:
None

Definition at line 1234 of file lpc17xx_i2c.c.

void I2C_SetOwnSlaveAddr | ( | LPC_I2C_TypeDef * | I2Cx,
 |  | I2C_OWNSLAVEADDR_CFG_Type * | OwnSlaveAddrConfigStruct
 | ) |  |

Set Own slave address in I2C peripheral corresponding to parameter specified in OwnSlaveAddrConfigStruct.

Parameters:
[in] I2Cx I2C peripheral selected, should be
  • LPC_I2C0
    • LPC_I2C1
    • LPC_I2C2
[in] OwnSlaveAddrConfigStruct Pointer to a I2C_OWNSLAVEADDR_CFG_Type structure that contains the configuration information for the specified I2C slave address.
Returns:
None

Definition at line 1181 of file lpc17xx_i2c.c.

void I2C_SlaveHandler ( LPC_I2C_TypeDef * I2Cx )

General Slave Interrupt handler for I2C peripheral.

Parameters:
[in] I2Cx I2C peripheral selected, should be:
  • LPC_I2C0
  • LPC_I2C1
  • LPC_I2C2
Returns:
None

Definition at line 617 of file lpc17xx_i2c.c.

uint32_t I2C_SlaveTransferComplete ( LPC_I2C_TypeDef * I2Cx )

Get status of Slave Transfer.

Parameters:
[in] I2Cx I2C peripheral selected, should be:
  • LPC_I2C0
  • LPC_I2C1
  • LPC_I2C2
Returns:
Complete status, could be: TRUE/FALSE

Definition at line 1359 of file lpc17xx_i2c.c.

Status I2C_SlaveTransferData | ( | LPC_I2C_TypeDef * | I2Cx,
 |  | I2C_S_SETUP_Type * | TransferCfg,
 |  | I2C_TRANSFER_OPT_Type | Opt
 | ) |  |

Receive and Transmit data in slave mode.

Parameters:
[in] I2Cx I2C peripheral selected, should be
  • LPC_I2C0
    • LPC_I2C1
    • LPC_I2C2
[in] | TransferCfg | Pointer to a I2C_S_SETUP_Type structure that contains specified information about the configuration for master transfer.
[in] | Opt | I2C_TRANSFER_OPT_Type type that selected for interrupt or polling mode.
Returns:
SUCCESS or ERROR

Note: The mode of slave's operation depends on the command sent from master on the I2C bus. If the master send a SLA+W command, this sub-routine will use receive data length and receive data pointer. If the master send a SLA+R command, this sub-routine will use transmit data length and transmit data pointer. If the master issue an repeat start command or a stop command, the slave will enable an time out condition, during time out condition, if there's no activity on I2C bus, the slave will exit, otherwise (i.e. the master send a SLA+R/W), the slave then switch to relevant operation mode. The time out should be used because the return status code can not show difference from stop and repeat start command in slave operation. In case of the expected data length from master is greater than data length that slave can support:

  • In case of reading operation (from master): slave will return I2C_I2DAT_IDLE_CHAR value.
  • In case of writing operation (from master): slave will ignore remain data from master.

Definition at line 990 of file lpc17xx_i2c.c.

Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2C Private Types

Data Structures
I2C Private Types
I2C (Inter-IC Control bus)

Data Structures

struct I2C_CFG_T
I2C device configuration structure type. More...
Generated on Mon Nov 28 2011 11:15:18 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S (Inter-IC Sound bus)

Modules
I2S (Inter-IC Sound bus)
LPC1700CMSIS Firmware Library

Modules

I2S Public Macros
I2S Private Macros
I2S Public Types
I2S Public Functions
Generated on Mon Nov 28 2011 11:15:15 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S Public Macros

Defines
I2S Public Macros
I2S (Inter-IC Sound bus)

Defines

#define | I2S_WORDWIDTH_8 ((uint32_t)(0))
#define | I2S_WORDWIDTH_16 ((uint32_t)(1))
#define | I2S_WORDWIDTH_32 ((uint32_t)(3))
#define | I2S_STEREO ((uint32_t)(0))
#define | I2S_MONO ((uint32_t)(1))
#define | I2S_MASTER_MODE ((uint8_t)(0))
#define | I2S_SLAVE_MODE ((uint8_t)(1))
#define | I2S_STOP_ENABLE ((uint8_t)(1))
#define | I2S_STOP_DISABLE ((uint8_t)(0))
#define | I2S_RESET_ENABLE ((uint8_t)(1))
#define | I2S_RESET_DISABLE ((uint8_t)(0))
#define | I2S_MUTE_ENABLE ((uint8_t)(1))
#define | I2S_MUTE_DISABLE ((uint8_t)(0))
#define | I2S_TX_MODE ((uint8_t)(0))
#define | I2S_RX_MODE ((uint8_t)(1))
#define | I2S_CLKSEL_FRDCLK ((uint8_t)(0))
#define | I2S_CLKSEL_MCLK ((uint8_t)(2))
#define | I2S_4PIN_ENABLE ((uint8_t)(1))
#define | I2S_4PIN_DISABLE ((uint8_t)(0))
#define | I2S_MCLK_ENABLE ((uint8_t)(1))
#define | I2S_MCLK_DISABLE ((uint8_t)(0))
#define | I2S_DMA_1 ((uint8_t)(0))
#define | I2S_DMA_2 ((uint8_t)(1))

Define Documentation

#define I2S_4PIN_DISABLE ((uint8_t)(0))

Definition at line 81 of file lpc17xx_i2s.h.

#define I2S_4PIN_ENABLE ((uint8_t)(1))

I2S 4-pin Mode bit

Definition at line 80 of file lpc17xx_i2s.h.

#define I2S_CLKSEL_FRDCLK ((uint8_t)(0))

I2S Clock Select bit

Definition at line 77 of file lpc17xx_i2s.h.

#define I2S_CLKSEL_MCLK ((uint8_t)(2))

Definition at line 78 of file lpc17xx_i2s.h.

#define I2S_DMA_1 ((uint8_t)(0))

I2S select DMA bit

Definition at line 86 of file lpc17xx_i2s.h.

#define I2S_DMA_2 ((uint8_t)(1))

Definition at line 87 of file lpc17xx_i2s.h.

#define I2S_MASTER_MODE ((uint8_t)(0))

I2S Master/Slave mode bit

Definition at line 62 of file lpc17xx_i2s.h.

#define I2S_MCLK_DISABLE ((uint8_t)(0))

Definition at line 84 of file lpc17xx_i2s.h.

#define I2S_MCLK_ENABLE ((uint8_t)(1))

I2S MCLK Enable bit

Definition at line 83 of file lpc17xx_i2s.h.

#define I2S_MONO ((uint32_t)(1))

Definition at line 60 of file lpc17xx_i2s.h.

#define I2S_MUTE_DISABLE ((uint8_t)(0))

Definition at line 72 of file lpc17xx_i2s.h.

#define I2S_MUTE_ENABLE ((uint8_t)(1))

I2S Mute bit

Definition at line 71 of file lpc17xx_i2s.h.

#define I2S_RESET_DISABLE ((uint8_t)(0))

Definition at line 69 of file lpc17xx_i2s.h.

#define I2S_RESET_ENABLE ((uint8_t)(1))

I2S Reset bit

Definition at line 68 of file lpc17xx_i2s.h.

#define I2S_RX_MODE ((uint8_t)(1))

Definition at line 75 of file lpc17xx_i2s.h.

#define I2S_SLAVE_MODE ((uint8_t)(1))

Definition at line 63 of file lpc17xx_i2s.h.

#define I2S_STEREO ((uint32_t)(0))

I2S Channel bit

Definition at line 59 of file lpc17xx_i2s.h.

#define I2S_STOP_DISABLE ((uint8_t)(0))

Definition at line 66 of file lpc17xx_i2s.h.

#define I2S_STOP_ENABLE ((uint8_t)(1))

I2S Stop bit

Definition at line 65 of file lpc17xx_i2s.h.

#define I2S_TX_MODE ((uint8_t)(0))

I2S Transmit/Receive bit

Definition at line 74 of file lpc17xx_i2s.h.

#define I2S_WORDWIDTH_16 ((uint32_t)(1))

Definition at line 56 of file lpc17xx_i2s.h.

#define I2S_WORDWIDTH_32 ((uint32_t)(3))

Definition at line 57 of file lpc17xx_i2s.h.

#define I2S_WORDWIDTH_8 ((uint32_t)(0))

I2S configuration parameter defines I2S Wordwidth bit

Definition at line 55 of file lpc17xx_i2s.h.

Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S Private Macros

Defines
I2S Private Macros
I2S (Inter-IC Sound bus)

Defines

#define | I2S_DAO_WORDWIDTH_8 ((uint32_t)(0))
#define | I2S_DAO_WORDWIDTH_16 ((uint32_t)(1))
#define | I2S_DAO_WORDWIDTH_32 ((uint32_t)(3))
#define | I2S_DAO_MONO ((uint32_t)(1<<2))
#define | I2S_DAO_STOP ((uint32_t)(1<<3))
#define | I2S_DAO_RESET ((uint32_t)(1<<4))
#define | I2S_DAO_SLAVE ((uint32_t)(1<<5))
#define | I2S_DAO_WS_HALFPERIOD(n) ((uint32_t)(n<<6))
#define | I2S_DAO_MUTE ((uint32_t)(1<<15))
#define | I2S_DAI_WORDWIDTH_8 ((uint32_t)(0))
#define | I2S_DAI_WORDWIDTH_16 ((uint32_t)(1))
#define | I2S_DAI_WORDWIDTH_32 ((uint32_t)(3))
#define | I2S_DAI_MONO ((uint32_t)(1<<2))
#define | I2S_DAI_STOP ((uint32_t)(1<<3))
#define | I2S_DAI_RESET ((uint32_t)(1<<4))
#define | I2S_DAI_SLAVE ((uint32_t)(1<<5))
#define | I2S_DAI_WS_HALFPERIOD(n) ((uint32_t)((n&0x1FF)<<6))
#define | I2S_DAI_MUTE ((uint32_t)(1<<15))
#define | I2S_STATE_IRQ ((uint32_t)(1))
#define | I2S_STATE_DMA1 ((uint32_t)(1<<1))
#define | I2S_STATE_DMA2 ((uint32_t)(1<<2))
#define | I2S_STATE_RX_LEVEL(n) ((uint32_t)((n&1F)<<8))
#define | I2S_STATE_TX_LEVEL(n) ((uint32_t)((n&1F)<<16))
#define | I2S_DMA1_RX_ENABLE ((uint32_t)(1))
#define | I2S_DMA1_TX_ENABLE ((uint32_t)(1<<1))
#define | I2S_DMA1_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8))
#define | I2S_DMA1_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16))
#define | I2S_DMA2_RX_ENABLE ((uint32_t)(1))
#define | I2S_DMA2_TX_ENABLE ((uint32_t)(1<<1))
#define | I2S_DMA2_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8))
#define | I2S_DMA2_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16))
#define | I2S_IRQ_RX_ENABLE ((uint32_t)(1))
#define | I2S_IRQ_TX_ENABLE ((uint32_t)(1<<1))
#define | I2S_IRQ_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8))
#define | I2S_IRQ_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16))
#define | I2S_TXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF))
#define | I2S_TXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8))
#define | I2S_RXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF))
#define | I2S_RXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8))
#define | I2S_TXBITRATE(n) ((uint32_t)(n&0x3F))
#define | I2S_RXBITRATE(n) ((uint32_t)(n&0x3F))
#define | I2S_TXMODE_CLKSEL(n) ((uint32_t)(n&0x03))
#define | I2S_TXMODE_4PIN_ENABLE ((uint32_t)(1<<2))
#define | I2S_TXMODE_MCENA ((uint32_t)(1<<3))
#define | I2S_RXMODE_CLKSEL(n) ((uint32_t)(n&0x03))
#define | I2S_RXMODE_4PIN_ENABLE ((uint32_t)(1<<2))
#define | I2S_RXMODE_MCENA ((uint32_t)(1<<3))
#define | PARAM_I2Sx(n) (((uint32_t *)n)==((uint32_t *)LPC_I2S))
#define | PRAM_I2S_FREQ(freq) ((freq>=16000)&&(freq <= 96000))
#define | PARAM_I2S_WORDWIDTH(n)
#define | PARAM_I2S_CHANNEL(n) ((n==I2S_STEREO)||(n==I2S_MONO))
#define | PARAM_I2S_WS_SEL(n) ((n==I2S_MASTER_MODE)||(n==I2S_SLAVE_MODE))
#define | PARAM_I2S_STOP(n) ((n==I2S_STOP_ENABLE)||(n==I2S_STOP_DISABLE))
#define | PARAM_I2S_RESET(n) ((n==I2S_RESET_ENABLE)||(n==I2S_RESET_DISABLE))
#define | PARAM_I2S_MUTE(n) ((n==I2S_MUTE_ENABLE)||(n==I2S_MUTE_DISABLE))
#define | PARAM_I2S_TRX(n) ((n==I2S_TX_MODE)||(n==I2S_RX_MODE))
#define | PARAM_I2S_CLKSEL(n) ((n==I2S_CLKSEL_FRDCLK)||(n==I2S_CLKSEL_MCLK))
#define | PARAM_I2S_4PIN(n) ((n==I2S_4PIN_ENABLE)||(n==I2S_4PIN_DISABLE))
#define | PARAM_I2S_MCLK(n) ((n==I2S_MCLK_ENABLE)||(n==I2S_MCLK_DISABLE))
#define | PARAM_I2S_DMA(n) ((n==I2S_DMA_1)||(n==I2S_DMA_2))
#define | PARAM_I2S_DMA_DEPTH(n) (n<=31)
#define | PARAM_I2S_IRQ_LEVEL(n) (n<=31)
#define | PARAM_I2S_HALFPERIOD(n) (n<512)
#define | PARAM_I2S_BITRATE(n) (n<=63)

Define Documentation

#define I2S_DAI_MONO ((uint32_t)(1<<2))

I2S control mono or stereo format

Definition at line 126 of file lpc17xx_i2s.h.

#define I2S_DAI_MUTE ((uint32_t)(1<<15))

I2S control mute mode

Definition at line 136 of file lpc17xx_i2s.h.

#define I2S_DAI_RESET ((uint32_t)(1<<4))

I2S control reset mode

Definition at line 130 of file lpc17xx_i2s.h.

#define I2S_DAI_SLAVE ((uint32_t)(1<<5))

I2S control master/slave mode

Definition at line 132 of file lpc17xx_i2s.h.

#define I2S_DAI_STOP ((uint32_t)(1<<3))

I2S control stop mode

Definition at line 128 of file lpc17xx_i2s.h.

#define I2S_DAI_WORDWIDTH_16 ((uint32_t)(1))

Definition at line 123 of file lpc17xx_i2s.h.

#define I2S_DAI_WORDWIDTH_32 ((uint32_t)(3))

Definition at line 124 of file lpc17xx_i2s.h.

#define I2S_DAI_WORDWIDTH_8 ((uint32_t)(0))

Macro defines for DAI-Digital Audio Input register I2S wordwide - the number of bytes in data

Definition at line 122 of file lpc17xx_i2s.h.

#define I2S_DAI_WS_HALFPERIOD ( n ) ((uint32_t)((n&0x1FF)<<6))

I2S word select half period minus one (9 bits)

Definition at line 134 of file lpc17xx_i2s.h.

#define I2S_DAO_MONO ((uint32_t)(1<<2))

I2S control mono or stereo format

Definition at line 106 of file lpc17xx_i2s.h.

#define I2S_DAO_MUTE ((uint32_t)(1<<15))

I2S control mute mode

Definition at line 116 of file lpc17xx_i2s.h.

#define I2S_DAO_RESET ((uint32_t)(1<<4))

I2S control reset mode

Definition at line 110 of file lpc17xx_i2s.h.

#define I2S_DAO_SLAVE ((uint32_t)(1<<5))

I2S control master/slave mode

Definition at line 112 of file lpc17xx_i2s.h.

#define I2S_DAO_STOP ((uint32_t)(1<<3))

I2S control stop mode

Definition at line 108 of file lpc17xx_i2s.h.

#define I2S_DAO_WORDWIDTH_16 ((uint32_t)(1))

Definition at line 103 of file lpc17xx_i2s.h.

#define I2S_DAO_WORDWIDTH_32 ((uint32_t)(3))

Definition at line 104 of file lpc17xx_i2s.h.

#define I2S_DAO_WORDWIDTH_8 ((uint32_t)(0))

Macro defines for DAO-Digital Audio Output register I2S wordwide - the number of bytes in data

Definition at line 102 of file lpc17xx_i2s.h.

#define I2S_DAO_WS_HALFPERIOD ( n ) ((uint32_t)(n<<6))

I2S word select half period minus one

Definition at line 114 of file lpc17xx_i2s.h.

#define I2S_DMA1_RX_DEPTH ( n ) ((uint32_t)((n&0x1F)<<8))

I2S set FIFO level that trigger a receive DMA request on DMA1

Definition at line 160 of file lpc17xx_i2s.h.

#define I2S_DMA1_RX_ENABLE ((uint32_t)(1))

Macro defines for DMA1 register (DMA1 Configuration register) I2S control DMA1 for I2S receive

Definition at line 156 of file lpc17xx_i2s.h.

#define I2S_DMA1_TX_DEPTH ( n ) ((uint32_t)((n&0x1F)<<16))

I2S set FIFO level that trigger a transmit DMA request on DMA1

Definition at line 162 of file lpc17xx_i2s.h.

#define I2S_DMA1_TX_ENABLE ((uint32_t)(1<<1))

I2S control DMA1 for I2S transmit

Definition at line 158 of file lpc17xx_i2s.h.

#define I2S_DMA2_RX_DEPTH ( n ) ((uint32_t)((n&0x1F)<<8))

I2S set FIFO level that trigger a receive DMA request on DMA1

Definition at line 172 of file lpc17xx_i2s.h.

#define I2S_DMA2_RX_ENABLE ((uint32_t)(1))

Macro defines for DMA2 register (DMA2 Configuration register) I2S control DMA2 for I2S receive

Definition at line 168 of file lpc17xx_i2s.h.

#define I2S_DMA2_TX_DEPTH ( n ) ((uint32_t)((n&0x1F)<<16))

I2S set FIFO level that trigger a transmit DMA request on DMA1

Definition at line 174 of file lpc17xx_i2s.h.

#define I2S_DMA2_TX_ENABLE ((uint32_t)(1<<1))

I2S control DMA1 for I2S transmit

Definition at line 170 of file lpc17xx_i2s.h.

#define I2S_IRQ_RX_DEPTH ( n ) ((uint32_t)((n&0x1F)<<8))

I2S set the FIFO level on which to create an irq request

Definition at line 184 of file lpc17xx_i2s.h.

#define I2S_IRQ_RX_ENABLE ((uint32_t)(1))

Macro defines for IRQ register (Interrupt Request Control register) I2S control I2S receive interrupt

Definition at line 180 of file lpc17xx_i2s.h.

#define I2S_IRQ_TX_DEPTH ( n ) ((uint32_t)((n&0x1F)<<16))

I2S set the FIFO level on which to create an irq request

Definition at line 186 of file lpc17xx_i2s.h.

#define I2S_IRQ_TX_ENABLE ((uint32_t)(1<<1))

I2S control I2S transmit interrupt

Definition at line 182 of file lpc17xx_i2s.h.

#define I2S_RXBITRATE ( n ) ((uint32_t)(n&0x3F))

Definition at line 204 of file lpc17xx_i2s.h.

#define I2S_RXMODE_4PIN_ENABLE ((uint32_t)(1<<2))

I2S Receive control 4-pin mode

Definition at line 218 of file lpc17xx_i2s.h.

#define I2S_RXMODE_CLKSEL ( n ) ((uint32_t)(n&0x03))

I2S Receive select clock source

Definition at line 216 of file lpc17xx_i2s.h.

#define I2S_RXMODE_MCENA ((uint32_t)(1<<3))

I2S Receive control the TX_MCLK output

Definition at line 220 of file lpc17xx_i2s.h.

#define I2S_RXRATE_X_DIVIDER ( n ) ((uint32_t)((n&0xFF)<<8))

I2S Receive MCLK rate denominator

Definition at line 198 of file lpc17xx_i2s.h.

#define I2S_RXRATE_Y_DIVIDER ( n ) ((uint32_t)(n&0xFF))

I2S Receive MCLK rate denominator

Definition at line 196 of file lpc17xx_i2s.h.

#define I2S_STATE_DMA1 ((uint32_t)(1<<1))

I2S Status Receive or Transmit DMA1

Definition at line 144 of file lpc17xx_i2s.h.

#define I2S_STATE_DMA2 ((uint32_t)(1<<2))

I2S Status Receive or Transmit DMA2

Definition at line 146 of file lpc17xx_i2s.h.

#define I2S_STATE_IRQ ((uint32_t)(1))

Macro defines for STAT register (Status Feedback register) I2S Status Receive or Transmit Interrupt

Definition at line 142 of file lpc17xx_i2s.h.

#define I2S_STATE_RX_LEVEL ( n ) ((uint32_t)((n&1F)<<8))

I2S Status Current level of the Receive FIFO (5 bits)

Definition at line 148 of file lpc17xx_i2s.h.

#define I2S_STATE_TX_LEVEL ( n ) ((uint32_t)((n&1F)<<16))

I2S Status Current level of the Transmit FIFO (5 bits)

Definition at line 150 of file lpc17xx_i2s.h.

#define I2S_TXBITRATE ( n ) ((uint32_t)(n&0x3F))

Macro defines for TXBITRATE & RXBITRATE register (Transmit/Receive Bit Rate register)

Definition at line 203 of file lpc17xx_i2s.h.

#define I2S_TXMODE_4PIN_ENABLE ((uint32_t)(1<<2))

I2S Transmit control 4-pin mode

Definition at line 212 of file lpc17xx_i2s.h.

#define I2S_TXMODE_CLKSEL ( n ) ((uint32_t)(n&0x03))

Macro defines for TXMODE/RXMODE register (Transmit/Receive Mode Control register) I2S Transmit select clock source (2 bits)

Definition at line 210 of file lpc17xx_i2s.h.

#define I2S_TXMODE_MCENA ((uint32_t)(1<<3))

I2S Transmit control the TX_MCLK output

Definition at line 214 of file lpc17xx_i2s.h.

#define I2S_TXRATE_X_DIVIDER ( n ) ((uint32_t)((n&0xFF)<<8))

I2S Transmit MCLK rate denominator

Definition at line 194 of file lpc17xx_i2s.h.

#define I2S_TXRATE_Y_DIVIDER ( n ) ((uint32_t)(n&0xFF))

Macro defines for TXRATE/RXRATE register (Transmit/Receive Clock Rate register) I2S Transmit MCLK rate denominator

Definition at line 192 of file lpc17xx_i2s.h.

#define PARAM_I2S_4PIN ( n ) ((n==I2S_4PIN_ENABLE)||(n==I2S_4PIN_DISABLE))

Definition at line 246 of file lpc17xx_i2s.h.

#define PARAM_I2S_BITRATE ( n ) (n<=63)

Definition at line 258 of file lpc17xx_i2s.h.

#define PARAM_I2S_CHANNEL ( n ) ((n==I2S_STEREO)||(n==I2S_MONO))

Definition at line 232 of file lpc17xx_i2s.h.

#define PARAM_I2S_CLKSEL ( n ) ((n==I2S_CLKSEL_FRDCLK)||(n==I2S_CLKSEL_MCLK))

Definition at line 244 of file lpc17xx_i2s.h.

#define PARAM_I2S_DMA ( n ) ((n==I2S_DMA_1)||(n==I2S_DMA_2))

Definition at line 250 of file lpc17xx_i2s.h.

#define PARAM_I2S_DMA_DEPTH ( n ) (n<=31)

Definition at line 252 of file lpc17xx_i2s.h.

#define PARAM_I2S_HALFPERIOD ( n ) (n<512)

Definition at line 256 of file lpc17xx_i2s.h.

#define PARAM_I2S_IRQ_LEVEL ( n ) (n<=31)

Definition at line 254 of file lpc17xx_i2s.h.

#define PARAM_I2S_MCLK ( n ) ((n==I2S_MCLK_ENABLE)||(n==I2S_MCLK_DISABLE))

Definition at line 248 of file lpc17xx_i2s.h.

#define PARAM_I2S_MUTE ( n ) ((n==I2S_MUTE_ENABLE)||(n==I2S_MUTE_DISABLE))

Definition at line 240 of file lpc17xx_i2s.h.

#define PARAM_I2S_RESET ( n ) ((n==I2S_RESET_ENABLE)||(n==I2S_RESET_DISABLE))

Definition at line 238 of file lpc17xx_i2s.h.

#define PARAM_I2S_STOP ( n ) ((n==I2S_STOP_ENABLE)||(n==I2S_STOP_DISABLE))

Definition at line 236 of file lpc17xx_i2s.h.

#define PARAM_I2S_TRX ( n ) ((n==I2S_TX_MODE)||(n==I2S_RX_MODE))

Definition at line 242 of file lpc17xx_i2s.h.

#define PARAM_I2S_WORDWIDTH ( n )
Value:
((n==I2S_WORDWIDTH_8)||(n==I2S_WORDWIDTH_16)\
||(n==I2S_WORDWIDTH_32))

Definition at line 229 of file lpc17xx_i2s.h.

#define PARAM_I2S_WS_SEL ( n ) ((n==I2S_MASTER_MODE)||(n==I2S_SLAVE_MODE))

Definition at line 234 of file lpc17xx_i2s.h.

#define PARAM_I2Sx ( n ) (((uint32_t *)n)==((uint32_t *)LPC_I2S))

Macro to determine if it is valid I2S peripheral

Definition at line 225 of file lpc17xx_i2s.h.

#define PRAM_I2S_FREQ ( freq ) ((freq>=16000)&&(freq <= 96000))

Macro to check Data to send valid

Definition at line 227 of file lpc17xx_i2s.h.

Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S Public Types

Data Structures
I2S Public Types
I2S (Inter-IC Sound bus)

Data Structures

struct | I2S_CFG_Type
I2S configuration structure definition. More...
struct | I2S_DMAConf_Type
I2S DMA configuration structure definition. More...
struct | I2S_MODEConf_Type
I2S mode configuration structure definition. More...
Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S Public Functions

Functions
I2S Public Functions
I2S (Inter-IC Sound bus)

Functions

void | I2S_Init (LPC_I2S_TypeDef *I2Sx)
Initialize I2S.
void | I2S_DeInit (LPC_I2S_TypeDef *I2Sx)
DeInitial both I2S transmit or receive.
void | I2S_Config (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, I2S_CFG_Type *ConfigStruct)
Configuration I2S, setting:
Status | I2S_FreqConfig (LPC_I2S_TypeDef *I2Sx, uint32_t Freq, uint8_t TRMode)
Set frequency for I2S.
void | I2S_SetBitRate (LPC_I2S_TypeDef *I2Sx, uint8_t bitrate, uint8_t TRMode)
I2S set bitrate.
void | I2S_ModeConfig (LPC_I2S_TypeDef *I2Sx, I2S_MODEConf_Type *ModeConfig, uint8_t TRMode)
Configuration operating mode for I2S.
uint8_t | I2S_GetLevel (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
Get I2S Buffer Level.
void | I2S_Send (LPC_I2S_TypeDef *I2Sx, uint32_t BufferData)
I2S Send data.
uint32_t | I2S_Receive (LPC_I2S_TypeDef *I2Sx)
I2S Receive Data.
void | I2S_Start (LPC_I2S_TypeDef *I2Sx)
I2S Start: clear all STOP,RESET and MUTE bit, ready to operate.
void | I2S_Pause (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
I2S Pause.
void | I2S_Mute (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
I2S Mute.
void | I2S_Stop (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
I2S Stop.
void | I2S_DMAConfig (LPC_I2S_TypeDef *I2Sx, I2S_DMAConf_Type *DMAConfig, uint8_t TRMode)
Configure DMA operation for I2S.
void | I2S_DMACmd (LPC_I2S_TypeDef *I2Sx, uint8_t DMAIndex, uint8_t TRMode, FunctionalState NewState)
Enable/Disable DMA operation for I2S.
void | I2S_IRQCmd (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, FunctionalState NewState)
Enable/Disable IRQ for I2S.
void | I2S_IRQConfig (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, uint8_t level)
Configure IRQ for I2S.
FunctionalState | I2S_GetIRQStatus (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
Get I2S interrupt status.
uint8_t | I2S_GetIRQDepth (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
Get I2S interrupt depth.

Function Documentation

void I2S_Config | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | TRMode,
 |  | I2S_CFG_Type * | ConfigStruct
 | ) |  |

Configuration I2S, setting:

  • master/slave mode
  • wordwidth value
  • channel mode
    Parameters:
    [in] | I2Sx | I2S peripheral selected, should be: LPC_I2S
    [in] | TRMode | transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
    Parameters:
    [in] ConfigStruct pointer to I2S_CFG_Type structure which will be initialized.
    Returns:
    none

Definition at line 142 of file lpc17xx_i2s.c.

void I2S_DeInit ( LPC_I2S_TypeDef * I2Sx )

DeInitial both I2S transmit or receive.

Parameters:
[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Returns:
none

Definition at line 174 of file lpc17xx_i2s.c.

void I2S_DMACmd | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | DMAIndex,
 |  | uint8_t | TRMode,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable DMA operation for I2S.

Parameters:
[in] I2Sx,: I2S peripheral selected, should be: LPC_I2S
[in] DMAIndex chose what DMA is used, should be:
  • I2S_DMA_1 = 0: DMA1
  • I2S_DMA_2 = 1: DMA2
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
[in] NewState is new state of DMA operation, should be:
  • ENABLE
  • DISABLE
Returns:
none

Definition at line 469 of file lpc17xx_i2s.c.

void I2S_DMAConfig | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | I2S_DMAConf_Type * | DMAConfig,
 |  | uint8_t | TRMode
 | ) |  |

Configure DMA operation for I2S.

Parameters:
[in] | I2Sx | I2S peripheral selected, should be: LPC_I2S
[in] | DMAConfig | pointer to I2S_DMAConf_Type will be used to configure
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
Returns:
none

Definition at line 432 of file lpc17xx_i2s.c.

Status I2S_FreqConfig | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint32_t | Freq,
 |  | uint8_t | TRMode
 | ) |  |

Set frequency for I2S.

Parameters:
[in] | I2Sx | I2S peripheral selected, should be: LPC_I2S
[in] | Freq | is the frequency for I2S will be set. It can range from 16-96 kHz(16, 22.05, 32, 44.1, 48, 96kHz)
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
Returns:
Status: ERROR or SUCCESS

Definition at line 319 of file lpc17xx_i2s.c.

uint8_t I2S_GetIRQDepth | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | TRMode
 | ) |  |

Get I2S interrupt depth.

Parameters:
[in] I2Sx I2S peripheral selected, should be: LPC_I2S
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
Returns:
depth of FIFO level on which to create an irq request

Definition at line 582 of file lpc17xx_i2s.c.

FunctionalState I2S_GetIRQStatus | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | TRMode
 | ) |  |

Get I2S interrupt status.

Parameters:
[in] I2Sx I2S peripheral selected, should be: LPC_I2S
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
Returns:
FunctionState should be:
  • ENABLE: interrupt is enable
  • DISABLE: interrupt is disable

Definition at line 565 of file lpc17xx_i2s.c.

uint8_t I2S_GetLevel | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | TRMode
 | ) |  |

Get I2S Buffer Level.

Parameters:
[in] I2Sx I2S peripheral selected, should be: LPC_I2S
[in] TRMode Transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
Returns:
current level of Transmit/Receive Buffer

Definition at line 189 of file lpc17xx_i2s.c.

void I2S_Init ( LPC_I2S_TypeDef * I2Sx )

Initialize I2S.

  • Turn on power and clock
    Parameters:
    [in] I2Sx I2S peripheral selected, should be: LPC_I2S
    Returns:
    none

Definition at line 121 of file lpc17xx_i2s.c.

void I2S_IRQCmd | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | TRMode,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable IRQ for I2S.

Parameters:
[in] I2Sx I2S peripheral selected, should be: LPC_I2S
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
[in] NewState is new state of DMA operation, should be:
  • ENABLE
  • DISABLE
Returns:
none

Definition at line 536 of file lpc17xx_i2s.c.

void I2S_IRQConfig | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | TRMode,
 |  | uint8_t | level
 | ) |  |

Configure IRQ for I2S.

Parameters:
[in] | I2Sx | I2S peripheral selected, should be: LPC_I2S
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
[in] | level | is the FIFO level that triggers IRQ request
Returns:
none

Definition at line 513 of file lpc17xx_i2s.c.

void I2S_ModeConfig | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | I2S_MODEConf_Type * | ModeConfig,
 |  | uint8_t | TRMode
 | ) |  |

Configuration operating mode for I2S.

Parameters:
[in] | I2Sx | I2S peripheral selected, should be: LPC_I2S
[in] | ModeConfig | pointer to I2S_MODEConf_Type will be used to configure
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
Returns:
none

Definition at line 389 of file lpc17xx_i2s.c.

void I2S_Mute | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | TRMode
 | ) |  |

I2S Mute.

Parameters:
[in] I2Sx I2S peripheral selected, should be: LPC_I2S
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
Returns:
none

Definition at line 272 of file lpc17xx_i2s.c.

void I2S_Pause | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | TRMode
 | ) |  |

I2S Pause.

Parameters:
[in] I2Sx I2S peripheral selected, should be: LPC_I2S
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
Returns:
none

Definition at line 251 of file lpc17xx_i2s.c.

uint32_t I2S_Receive ( LPC_I2S_TypeDef * I2Sx )

I2S Receive Data.

Parameters:
[in] I2Sx pointer to LPC_I2S_TypeDef
Returns:
received value

Definition at line 236 of file lpc17xx_i2s.c.

void I2S_Send | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint32_t | BufferData
 | ) |  |

I2S Send data.

Parameters:
[in] | I2Sx | I2S peripheral selected, should be: LPC_I2S
[in] | BufferData | pointer to uint32_t is the data will be send
Returns:
none

Definition at line 225 of file lpc17xx_i2s.c.

void I2S_SetBitRate | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | bitrate,
 |  | uint8_t | TRMode
 | ) |  |

I2S set bitrate.

Parameters:
[in] | I2Sx | I2S peripheral selected, should be: LPC_I2S
[in] | bitrate | value will be set bitrate value should be in range: 0 .. 63
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
Returns:
none

Definition at line 363 of file lpc17xx_i2s.c.

void I2S_Start ( LPC_I2S_TypeDef * I2Sx )

I2S Start: clear all STOP,RESET and MUTE bit, ready to operate.

Parameters:
[in] I2Sx I2S peripheral selected, should be: LPC_I2S
Returns:
none

Definition at line 209 of file lpc17xx_i2s.c.

void I2S_Stop | ( | LPC_I2S_TypeDef * | I2Sx,
 |  | uint8_t | TRMode
 | ) |  |

I2S Stop.

Parameters:
[in] I2Sx I2S peripheral selected, should be: LPC_I2S
[in] TRMode is transmit/receive mode, should be:
  • I2S_TX_MODE = 0: transmit mode
  • I2S_RX_MODE = 1: receive mode
Returns:
none

Definition at line 293 of file lpc17xx_i2s.c.

Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LIBCFG_DEFAULT (Default Library Configuration)

Modules
LIBCFG_DEFAULT (Default Library Configuration)
LPC1700CMSIS Firmware Library

Modules

LIBCFG_DEFAULT Public Macros
LIBCFG_DEFAULT Public Functions
Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LIBCFG_DEFAULT Public Macros

Defines
LIBCFG_DEFAULT Public Macros
LIBCFG_DEFAULT (Default Library Configuration)

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _EXTI
#define | _UART
#define | _UART0
#define | _UART1
#define | _UART2
#define | _UART3
#define | _SPI
#define | _SYSTICK
#define | _SSP
#define | _SSP0
#define | _SSP1
#define | _I2C
#define | _I2C0
#define | _I2C1
#define | _I2C2
#define | _TIM
#define | _WDT
#define | _GPDMA
#define | _DAC
#define | _ADC
#define | _PWM
#define | _PWM1
#define | _RTC
#define | _I2S
#define | _USBDEV
#define | _USB_DMA
#define | _QEI
#define | _MCPWM
#define | _CAN
#define | _RIT
#define | _EMAC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Define Documentation

#define _ADC

Definition at line 103 of file lpc17xx_libcfg_default.h.

#define _CAN

Definition at line 127 of file lpc17xx_libcfg_default.h.

#define _DAC

Definition at line 100 of file lpc17xx_libcfg_default.h.

#define _DBGFWK

Definition at line 55 of file lpc17xx_libcfg_default.h.

#define _EMAC

Definition at line 133 of file lpc17xx_libcfg_default.h.

#define _EXTI

Definition at line 61 of file lpc17xx_libcfg_default.h.

#define _GPDMA

Definition at line 96 of file lpc17xx_libcfg_default.h.

#define _GPIO

Definition at line 58 of file lpc17xx_libcfg_default.h.

#define _I2C

Definition at line 83 of file lpc17xx_libcfg_default.h.

#define _I2C0

Definition at line 84 of file lpc17xx_libcfg_default.h.

#define _I2C1

Definition at line 85 of file lpc17xx_libcfg_default.h.

#define _I2C2

Definition at line 86 of file lpc17xx_libcfg_default.h.

#define _I2S

Definition at line 114 of file lpc17xx_libcfg_default.h.

#define _MCPWM

Definition at line 124 of file lpc17xx_libcfg_default.h.

#define _PWM

Definition at line 107 of file lpc17xx_libcfg_default.h.

#define _PWM1

Definition at line 108 of file lpc17xx_libcfg_default.h.

#define _QEI

Definition at line 121 of file lpc17xx_libcfg_default.h.

#define _RIT

Definition at line 130 of file lpc17xx_libcfg_default.h.

#define _RTC

Definition at line 111 of file lpc17xx_libcfg_default.h.

#define _SPI

Definition at line 71 of file lpc17xx_libcfg_default.h.

#define _SSP

Definition at line 77 of file lpc17xx_libcfg_default.h.

#define _SSP0

Definition at line 78 of file lpc17xx_libcfg_default.h.

#define _SSP1

Definition at line 79 of file lpc17xx_libcfg_default.h.

#define _SYSTICK

Definition at line 74 of file lpc17xx_libcfg_default.h.

#define _TIM

Definition at line 89 of file lpc17xx_libcfg_default.h.

#define _UART

Definition at line 64 of file lpc17xx_libcfg_default.h.

#define _UART0

Definition at line 65 of file lpc17xx_libcfg_default.h.

#define _UART1

Definition at line 66 of file lpc17xx_libcfg_default.h.

#define _UART2

Definition at line 67 of file lpc17xx_libcfg_default.h.

#define _UART3

Definition at line 68 of file lpc17xx_libcfg_default.h.

#define _USB_DMA

Definition at line 118 of file lpc17xx_libcfg_default.h.

#define _USBDEV

Definition at line 117 of file lpc17xx_libcfg_default.h.

#define _WDT

Definition at line 92 of file lpc17xx_libcfg_default.h.

#define CHECK_PARAM ( expr ) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Definition at line 147 of file lpc17xx_libcfg_default.h.

#define DEBUG

Definition at line 48 of file lpc17xx_libcfg_default.h.

Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LIBCFG_DEFAULT Public Functions

Functions
LIBCFG_DEFAULT Public Functions
LIBCFG_DEFAULT (Default Library Configuration)

Functions

void check_failed (uint8_t *file, uint32_t line)

Function Documentation

void check_failed | ( | uint8_t * | file,
 |  | uint32_t | line
 | ) |  |

Definition at line 50 of file lpc17xx_libcfg_default.c.

Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MCPWM (Motor Control PWM)

Modules
MCPWM (Motor Control PWM)
LPC1700CMSIS Firmware Library

Modules

MCPWM Public Macros
MCPWM Private Macros
MCPWM Public Types
MCPWM Public Functions
Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MCPWM Public Macros

Defines
MCPWM Public Macros
MCPWM (Motor Control PWM)

Defines

#define | MCPWM_CHANNEL_EDGE_MODE ((uint32_t)(0))
#define | MCPWM_CHANNEL_CENTER_MODE ((uint32_t)(1))
#define | MCPWM_CHANNEL_PASSIVE_LO ((uint32_t)(0))
#define | MCPWM_CHANNEL_PASSIVE_HI ((uint32_t)(1))
#define | MCPWM_PATENT_A0 ((uint32_t)(1<<0))
#define | MCPWM_PATENT_B0 ((uint32_t)(1<<1))
#define | MCPWM_PATENT_A1 ((uint32_t)(1<<2))
#define | MCPWM_PATENT_B1 ((uint32_t)(1<<3))
#define | MCPWM_PATENT_A2 ((uint32_t)(1<<4))
#define | MCPWM_PATENT_B2 ((uint32_t)(1<<5))
#define | MCPWM_INTFLAG_LIM0 MCPWM_INT_ILIM(0)
#define | MCPWM_INTFLAG_MAT0 MCPWM_INT_IMAT(0)
#define | MCPWM_INTFLAG_CAP0 MCPWM_INT_ICAP(0)
#define | MCPWM_INTFLAG_LIM1 MCPWM_INT_ILIM(1)
#define | MCPWM_INTFLAG_MAT1 MCPWM_INT_IMAT(1)
#define | MCPWM_INTFLAG_CAP1 MCPWM_INT_ICAP(1)
#define | MCPWM_INTFLAG_LIM2 MCPWM_INT_ILIM(2)
#define | MCPWM_INTFLAG_MAT2 MCPWM_INT_IMAT(2)
#define | MCPWM_INTFLAG_CAP2 MCPWM_INT_ICAP(2)
#define | MCPWM_INTFLAG_ABORT MCPWM_INT_ABORT

Define Documentation

#define MCPWM_CHANNEL_CENTER_MODE ((uint32_t)(1))

Center aligned mode for channel in MCPWM

Definition at line 55 of file lpc17xx_mcpwm.h.

#define MCPWM_CHANNEL_EDGE_MODE ((uint32_t)(0))

Edge aligned mode for channel in MCPWM

Definition at line 53 of file lpc17xx_mcpwm.h.

#define MCPWM_CHANNEL_PASSIVE_HI ((uint32_t)(1))

Polarity of the MCOA and MCOB pins: Passive state is HIGH, active state is LOW

Definition at line 60 of file lpc17xx_mcpwm.h.

#define MCPWM_CHANNEL_PASSIVE_LO ((uint32_t)(0))

Polarity of the MCOA and MCOB pins: Passive state is LOW, active state is HIGH

Definition at line 58 of file lpc17xx_mcpwm.h.

#define MCPWM_INTFLAG_ABORT MCPWM_INT_ABORT

Fast abort interrupt

Definition at line 94 of file lpc17xx_mcpwm.h.

#define MCPWM_INTFLAG_CAP0 MCPWM_INT_ICAP(0)

Capture interrupt for channel (0)

Definition at line 77 of file lpc17xx_mcpwm.h.

#define MCPWM_INTFLAG_CAP1 MCPWM_INT_ICAP(1)

Capture interrupt for channel (1)

Definition at line 84 of file lpc17xx_mcpwm.h.

#define MCPWM_INTFLAG_CAP2 MCPWM_INT_ICAP(2)

Capture interrupt for channel (2)

Definition at line 91 of file lpc17xx_mcpwm.h.

#define MCPWM_INTFLAG_LIM0 MCPWM_INT_ILIM(0)

Limit interrupt for channel (0)

Definition at line 73 of file lpc17xx_mcpwm.h.

#define MCPWM_INTFLAG_LIM1 MCPWM_INT_ILIM(1)

Limit interrupt for channel (1)

Definition at line 80 of file lpc17xx_mcpwm.h.

#define MCPWM_INTFLAG_LIM2 MCPWM_INT_ILIM(2)

Limit interrupt for channel (2)

Definition at line 87 of file lpc17xx_mcpwm.h.

#define MCPWM_INTFLAG_MAT0 MCPWM_INT_IMAT(0)

Match interrupt for channel (0)

Definition at line 75 of file lpc17xx_mcpwm.h.

#define MCPWM_INTFLAG_MAT1 MCPWM_INT_IMAT(1)

Match interrupt for channel (1)

Definition at line 82 of file lpc17xx_mcpwm.h.

#define MCPWM_INTFLAG_MAT2 MCPWM_INT_IMAT(2)

Match interrupt for channel (2)

Definition at line 89 of file lpc17xx_mcpwm.h.

#define MCPWM_PATENT_A0 ((uint32_t)(1<<0))

MCOA0 tracks internal MCOA0

Definition at line 64 of file lpc17xx_mcpwm.h.

#define MCPWM_PATENT_A1 ((uint32_t)(1<<2))

MCOA1 tracks internal MCOA0

Definition at line 66 of file lpc17xx_mcpwm.h.

#define MCPWM_PATENT_A2 ((uint32_t)(1<<4))

MCOA2 tracks internal MCOA0

Definition at line 68 of file lpc17xx_mcpwm.h.

#define MCPWM_PATENT_B0 ((uint32_t)(1<<1))

MCOB0 tracks internal MCOA0

Definition at line 65 of file lpc17xx_mcpwm.h.

#define MCPWM_PATENT_B1 ((uint32_t)(1<<3))

MCOB1 tracks internal MCOA0

Definition at line 67 of file lpc17xx_mcpwm.h.

#define MCPWM_PATENT_B2 ((uint32_t)(1<<5))

MCOB2 tracks internal MCOA0

Definition at line 69 of file lpc17xx_mcpwm.h.

Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MCPWM Private Macros

Defines
MCPWM Private Macros
MCPWM (Motor Control PWM)

Defines

#define | MCPWM_CON_RUN(n) ((n<=2) ? ((uint32_t)(1<<((n*8)+0))) : (0))
#define | MCPWM_CON_CENTER(n) ((n<=2) ? ((uint32_t)(1<<((n*8)+1))) : (0))
#define | MCPWM_CON_POLAR(n) ((n<=2) ? ((uint32_t)(1<<((n*8)+2))) : (0))
#define | MCPWM_CON_DTE(n) ((n<=2) ? ((uint32_t)(1<<((n*8)+3))) : (0))
#define | MCPWM_CON_DISUP(n) ((n<=2) ? ((uint32_t)(1<<((n*8)+4))) : (0))
#define | MCPWM_CON_INVBDC ((uint32_t)(1<<29))
#define | MCPWM_CON_ACMODE ((uint32_t)(1<<30))
#define | MCPWM_CON_DCMODE ((uint32_t)(0x80000000))
#define | MCPWM_CAPCON_CAPMCI_RE(cap, mci) (((cap<=2)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+0))) : (0))
#define | MCPWM_CAPCON_CAPMCI_FE(cap, mci) (((cap<=2)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+1))) : (0))
#define | MCPWM_CAPCON_RT(n) ((n<=2) ? ((uint32_t)(1<<(18+(n)))) : (0))
#define | MCPWM_CAPCON_HNFCAP(n) ((n<=2) ? ((uint32_t)(1<<(21+(n)))) : (0))
#define | MCPWM_INT_ILIM(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+0))) : (0))
#define | MCPWM_INT_IMAT(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+1))) : (0))
#define | MCPWM_INT_ICAP(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+2))) : (0))
#define | MCPWM_INT_ABORT ((uint32_t)(1<<15))
#define | MCPWM_CNTCON_TCMCI_RE(tc, mci) (((tc<=2)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+0))) : (0))
#define | MCPWM_CNTCON_TCMCI_FE(tc, mci) (((tc<=2)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+1))) : (0))
#define | MCPWM_CNTCON_CNTR(n) ((n<=2) ? ((uint32_t)(1<<(29+n))) : (0))
#define | MCPWM_DT(n, x) ((n<=2) ? ((uint32_t)((x&0x3FF)<<(n*10))) : (0))
#define | MCPWM_CP_A0 ((uint32_t)(1<<0))
#define | MCPWM_CP_B0 ((uint32_t)(1<<1))
#define | MCPWM_CP_A1 ((uint32_t)(1<<2))
#define | MCPWM_CP_B1 ((uint32_t)(1<<3))
#define | MCPWM_CP_A2 ((uint32_t)(1<<4))
#define | MCPWM_CP_B2 ((uint32_t)(1<<5))
#define | MCPWM_CAPCLR_CAP(n) ((n<=2) ? ((uint32_t)(1<<n)) : (0))

Define Documentation

#define MCPWM_CAPCLR_CAP ( n ) ((n<=2) ? ((uint32_t)(1<<n)) : (0))

Macro defines for MCPWM Capture clear address register Clear the MCCAP (n) register

Definition at line 198 of file lpc17xx_mcpwm.h.

#define MCPWM_CAPCON_CAPMCI_FE | ( | cap,
 |  | mci
 | ) | (((cap<=2)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+1))) : (0))

Enables/Disable channel (cap) capture event on a falling edge on MCI(mci)

Definition at line 135 of file lpc17xx_mcpwm.h.

#define MCPWM_CAPCON_CAPMCI_RE | ( | cap,
 |  | mci
 | ) | (((cap<=2)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+0))) : (0))

Macro defines for MCPWM Capture Control register Enables/Disable channel (cap) capture event on a rising edge on MCI(mci)

Definition at line 133 of file lpc17xx_mcpwm.h.

#define MCPWM_CAPCON_HNFCAP ( n ) ((n<=2) ? ((uint32_t)(1<<(21+(n)))) : (0))

Hardware noise filter: channel (n) capture events are delayed

Definition at line 139 of file lpc17xx_mcpwm.h.

#define MCPWM_CAPCON_RT ( n ) ((n<=2) ? ((uint32_t)(1<<(18+(n)))) : (0))

TC(n) is reset by channel (n) capture event

Definition at line 137 of file lpc17xx_mcpwm.h.

#define MCPWM_CNTCON_CNTR ( n ) ((n<=2) ? ((uint32_t)(1<<(29+n))) : (0))

Channel (n) is in counter mode

Definition at line 176 of file lpc17xx_mcpwm.h.

#define MCPWM_CNTCON_TCMCI_FE | ( | tc,
 |  | mci
 | ) | (((tc<=2)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+1))) : (0))

Counter(cnt) advances on a falling edge on MCI(mci) pin

Definition at line 174 of file lpc17xx_mcpwm.h.

#define MCPWM_CNTCON_TCMCI_RE | ( | tc,
 |  | mci
 | ) | (((tc<=2)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+0))) : (0))

Macro defines for MCPWM Count Control register Counter(tc) advances on a rising edge on MCI(mci) pin

Definition at line 172 of file lpc17xx_mcpwm.h.

#define MCPWM_CON_ACMODE ((uint32_t)(1<<30))

3-phase AC mode select

Definition at line 120 of file lpc17xx_mcpwm.h.

#define MCPWM_CON_CENTER ( n ) ((n<=2) ? ((uint32_t)(1<<((n*8)+1))) : (0))

Edge/center aligned operation for channel n

Definition at line 115 of file lpc17xx_mcpwm.h.

#define MCPWM_CON_DCMODE ((uint32_t)(0x80000000))

3-phase DC mode select

Definition at line 121 of file lpc17xx_mcpwm.h.

#define MCPWM_CON_DISUP ( n ) ((n<=2) ? ((uint32_t)(1<<((n*8)+4))) : (0))

Enable/Disable update of functional register for channel n

Definition at line 118 of file lpc17xx_mcpwm.h.

#define MCPWM_CON_DTE ( n ) ((n<=2) ? ((uint32_t)(1<<((n*8)+3))) : (0))

Control the dead-time feature for channel n

Definition at line 117 of file lpc17xx_mcpwm.h.

#define MCPWM_CON_INVBDC ((uint32_t)(1<<29))

Control the polarity for all 3 channels

Definition at line 119 of file lpc17xx_mcpwm.h.

#define MCPWM_CON_POLAR ( n ) ((n<=2) ? ((uint32_t)(1<<((n*8)+2))) : (0))

Select polarity of the MCOAn and MCOBn pin

Definition at line 116 of file lpc17xx_mcpwm.h.

#define MCPWM_CON_RUN ( n ) ((n<=2) ? ((uint32_t)(1<<((n*8)+0))) : (0))

Macro defines for MCPWM Control register Stops/starts timer channel n

Definition at line 114 of file lpc17xx_mcpwm.h.

#define MCPWM_CP_A0 ((uint32_t)(1<<0))

Macro defines for MCPWM Communication Pattern register MCOA0 tracks internal MCOA0

Definition at line 187 of file lpc17xx_mcpwm.h.

#define MCPWM_CP_A1 ((uint32_t)(1<<2))

MCOA1 tracks internal MCOA0

Definition at line 189 of file lpc17xx_mcpwm.h.

#define MCPWM_CP_A2 ((uint32_t)(1<<4))

MCOA2 tracks internal MCOA0

Definition at line 191 of file lpc17xx_mcpwm.h.

#define MCPWM_CP_B0 ((uint32_t)(1<<1))

MCOB0 tracks internal MCOA0

Definition at line 188 of file lpc17xx_mcpwm.h.

#define MCPWM_CP_B1 ((uint32_t)(1<<3))

MCOB1 tracks internal MCOA0

Definition at line 190 of file lpc17xx_mcpwm.h.

#define MCPWM_CP_B2 ((uint32_t)(1<<5))

MCOB2 tracks internal MCOA0

Definition at line 192 of file lpc17xx_mcpwm.h.

#define MCPWM_DT | ( | n,
 |  | x
 | ) | ((n<=2) ? ((uint32_t)((x&0x3FF)<<(n*10))) : (0))

Macro defines for MCPWM Dead-time register Dead time value x for channel n

Definition at line 182 of file lpc17xx_mcpwm.h.

#define MCPWM_INT_ABORT ((uint32_t)(1<<15))

Fast abort interrupt

Definition at line 160 of file lpc17xx_mcpwm.h.

#define MCPWM_INT_ICAP ( n ) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+2))) : (0))

Capture interrupt for channel (n)

Definition at line 158 of file lpc17xx_mcpwm.h.

#define MCPWM_INT_ILIM ( n ) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+0))) : (0))

Macro defines for MCPWM Interrupt register Limit interrupt for channel (n)

Definition at line 154 of file lpc17xx_mcpwm.h.

#define MCPWM_INT_IMAT ( n ) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+1))) : (0))

Match interrupt for channel (n)

Definition at line 156 of file lpc17xx_mcpwm.h.

Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MCPWM Public Types

Data Structures
MCPWM Public Types
MCPWM (Motor Control PWM)

Data Structures

struct | MCPWM_CHANNEL_CFG_Type
Motor Control PWM Channel Configuration structure type definition. More...
struct | MCPWM_CAPTURE_CFG_Type
MCPWM Capture Configuration type definition. More...
struct | MCPWM_COUNT_CFG_Type
MCPWM Count Control Configuration type definition. More...
Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MCPWM Public Functions

Functions
MCPWM Public Functions
MCPWM (Motor Control PWM)

Functions

void | MCPWM_Init (LPC_MCPWM_TypeDef *MCPWMx)
Initializes the MCPWM peripheral.
void | MCPWM_ConfigChannel (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, MCPWM_CHANNEL_CFG_Type *channelSetup)
Configures each channel in MCPWM peripheral according to the specified parameters in the MCPWM_CHANNEL_CFG_Type.
void | MCPWM_WriteToShadow (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, MCPWM_CHANNEL_CFG_Type *channelSetup)
Write to MCPWM shadow registers - Update the value for period and pulse width in MCPWM peripheral.
void | MCPWM_ConfigCapture (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, MCPWM_CAPTURE_CFG_Type *captureConfig)
Configures capture function in MCPWM peripheral.
void | MCPWM_ClearCapture (LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel)
Clears current captured value in specified capture channel.
uint32_t | MCPWM_GetCapture (LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel)
Get current captured value in specified capture channel.
void | MCPWM_CountConfig (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, uint32_t countMode, MCPWM_COUNT_CFG_Type *countConfig)
Configures Count control in MCPWM peripheral.
void | MCPWM_Start (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0, uint32_t channel1, uint32_t channel2)
Start MCPWM activity for each MCPWM channel.
void | MCPWM_Stop (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0, uint32_t channel1, uint32_t channel2)
Stop MCPWM activity for each MCPWM channel.
void | MCPWM_ACMode (LPC_MCPWM_TypeDef *MCPWMx, uint32_t acMode)
Enables/Disables 3-phase AC motor mode on MCPWM peripheral.
void | MCPWM_DCMode (LPC_MCPWM_TypeDef *MCPWMx, uint32_t dcMode, uint32_t outputInvered, uint32_t outputPattern)
Enables/Disables 3-phase DC motor mode on MCPWM peripheral.
void | MCPWM_IntConfig (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType, FunctionalState NewState)
Configures the specified interrupt in MCPWM peripheral.
void | MCPWM_IntSet (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Sets/Forces the specified interrupt for MCPWM peripheral.
void | MCPWM_IntClear (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Clear the specified interrupt pending for MCPWM peripheral.
FlagStatus | MCPWM_GetIntStatus (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Check whether if the specified interrupt in MCPWM is set or not.

Function Documentation

void MCPWM_ACMode | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | acMode
 | ) |  |

Enables/Disables 3-phase AC motor mode on MCPWM peripheral.

Parameters:
[in] MCPWMx Motor Control PWM peripheral selected Should be: LPC_MCPWM
[in] acMode State of this command, should be:
  • ENABLE.
  • DISABLE.
Returns:
None

Definition at line 337 of file lpc17xx_mcpwm.c.

void MCPWM_ClearCapture | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | captureChannel
 | ) |  |

Clears current captured value in specified capture channel.

Parameters:
[in] | MCPWMx | Motor Control PWM peripheral selected Should be: LPC_MCPWM
[in] | captureChannel | Capture channel number, should be: 0..2
Returns:
None

Definition at line 217 of file lpc17xx_mcpwm.c.

void MCPWM_ConfigCapture | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | channelNum,
 |  | MCPWM_CAPTURE_CFG_Type * | captureConfig
 | ) |  |

Configures capture function in MCPWM peripheral.

Parameters:
[in] | MCPWMx | Motor Control PWM peripheral selected Should be: LPC_MCPWM
[in] | channelNum | MCI (Motor Control Input pin) number Should be: 0..2
[in] | captureConfig | Pointer to a MCPWM_CAPTURE_CFG_Type structure that contains the configuration information for the specified MCPWM capture.
Returns:

Definition at line 178 of file lpc17xx_mcpwm.c.

void MCPWM_ConfigChannel | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | channelNum,
 |  | MCPWM_CHANNEL_CFG_Type * | channelSetup
 | ) |  |

Configures each channel in MCPWM peripheral according to the specified parameters in the MCPWM_CHANNEL_CFG_Type.

Parameters:
[in] | MCPWMx | Motor Control PWM peripheral selected should be: LPC_MCPWM
[in] | channelNum | Channel number, should be: 0..2.
[in] | channelSetup | Pointer to a MCPWM_CHANNEL_CFG_Type structure that contains the configuration information for the specified MCPWM channel.
Returns:
None

Definition at line 90 of file lpc17xx_mcpwm.c.

void MCPWM_CountConfig | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | channelNum,
 |  | uint32_t | countMode,
 |  | MCPWM_COUNT_CFG_Type * | countConfig
 | ) |  |

Configures Count control in MCPWM peripheral.

Parameters:
[in] | MCPWMx | Motor Control PWM peripheral selected Should be: LPC_MCPWM
[in] | channelNum | Channel number, should be: 0..2
[in] countMode Count mode, should be:
  • ENABLE: Enables count mode.
  • DISABLE: Disable count mode, the channel is in timer mode.
[in] | countConfig | Pointer to a MCPWM_COUNT_CFG_Type structure that contains the configuration information for the specified MCPWM count control.
Returns:
None

Definition at line 255 of file lpc17xx_mcpwm.c.

void MCPWM_DCMode | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | dcMode,
 |  | uint32_t | outputInvered,
 |  | uint32_t | outputPattern
 | ) |  |

Enables/Disables 3-phase DC motor mode on MCPWM peripheral.

Parameters:
[in] MCPWMx Motor Control PWM peripheral selected Should be: LPC_MCPWM
[in] dcMode State of this command, should be:
  • ENABLE.
  • DISABLE.
[in] outputInvered Polarity of the MCOB outputs for all 3 channels, should be:
  • ENABLE: The MCOB outputs have opposite polarity from the MCOA outputs.
  • DISABLE: The MCOB outputs have the same basic polarity as the MCOA outputs.
[in] outputPattern A value contains bits that enables/disables the specified output pins route to the internal MCOA0 signal, should be:
  • MCPWM_PATENT_A0: MCOA0 tracks internal MCOA0
  • MCPWM_PATENT_B0: MCOB0 tracks internal MCOA0
  • MCPWM_PATENT_A1: MCOA1 tracks internal MCOA0
  • MCPWM_PATENT_B1: MCOB1 tracks internal MCOA0
  • MCPWM_PATENT_A2: MCOA2 tracks internal MCOA0
  • MCPWM_PATENT_B2: MCOB2 tracks internal MCOA0
Returns:
None

Note: all these outputPatent values above can be ORed together for using as input parameter.

Definition at line 372 of file lpc17xx_mcpwm.c.

uint32_t MCPWM_GetCapture | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | captureChannel
 | ) |  |

Get current captured value in specified capture channel.

Parameters:
[in] | MCPWMx | Motor Control PWM peripheral selected, Should be: LPC_MCPWM
[in] | captureChannel | Capture channel number, should be: 0..2
Returns:
None

Definition at line 229 of file lpc17xx_mcpwm.c.

FlagStatus MCPWM_GetIntStatus | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | ulIntType
 | ) |  |

Check whether if the specified interrupt in MCPWM is set or not.

Parameters:
[in] MCPWMx Motor Control PWM peripheral selected, should be: LPC_MCPWM
[in] ulIntType Interrupt type, should be:
  • MCPWM_INTFLAG_LIM0: Limit interrupt for channel (0)
  • MCPWM_INTFLAG_MAT0: Match interrupt for channel (0)
  • MCPWM_INTFLAG_CAP0: Capture interrupt for channel (0)
  • MCPWM_INTFLAG_LIM1: Limit interrupt for channel (1)
  • MCPWM_INTFLAG_MAT1: Match interrupt for channel (1)
  • MCPWM_INTFLAG_CAP1: Capture interrupt for channel (1)
  • MCPWM_INTFLAG_LIM2: Limit interrupt for channel (2)
  • MCPWM_INTFLAG_MAT2: Match interrupt for channel (2)
  • MCPWM_INTFLAG_CAP2: Capture interrupt for channel (2)
  • MCPWM_INTFLAG_ABORT: Fast abort interrupt
Returns:
None

Definition at line 488 of file lpc17xx_mcpwm.c.

void MCPWM_Init ( LPC_MCPWM_TypeDef * MCPWMx )

Initializes the MCPWM peripheral.

Parameters:
[in] MCPWMx Motor Control PWM peripheral selected, Should be: LPC_MCPWM
Returns:
None

Definition at line 60 of file lpc17xx_mcpwm.c.

void MCPWM_IntClear | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | ulIntType
 | ) |  |

Clear the specified interrupt pending for MCPWM peripheral.

Parameters:
[in] MCPWMx Motor Control PWM peripheral selected, should be: LPC_MCPWM
[in] ulIntType Interrupt type, should be:
  • MCPWM_INTFLAG_LIM0: Limit interrupt for channel (0)
  • MCPWM_INTFLAG_MAT0: Match interrupt for channel (0)
  • MCPWM_INTFLAG_CAP0: Capture interrupt for channel (0)
  • MCPWM_INTFLAG_LIM1: Limit interrupt for channel (1)
  • MCPWM_INTFLAG_MAT1: Match interrupt for channel (1)
  • MCPWM_INTFLAG_CAP1: Capture interrupt for channel (1)
  • MCPWM_INTFLAG_LIM2: Limit interrupt for channel (2)
  • MCPWM_INTFLAG_MAT2: Match interrupt for channel (2)
  • MCPWM_INTFLAG_CAP2: Capture interrupt for channel (2)
  • MCPWM_INTFLAG_ABORT: Fast abort interrupt
Returns:
None Note: all these ulIntType values above can be ORed together for using as input parameter.

Definition at line 465 of file lpc17xx_mcpwm.c.

void MCPWM_IntConfig | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | ulIntType,
 |  | FunctionalState | NewState
 | ) |  |

Configures the specified interrupt in MCPWM peripheral.

Parameters:
[in] MCPWMx Motor Control PWM peripheral selected Should be: LPC_MCPWM
[in] ulIntType Interrupt type, should be:
  • MCPWM_INTFLAG_LIM0: Limit interrupt for channel (0)
  • MCPWM_INTFLAG_MAT0: Match interrupt for channel (0)
  • MCPWM_INTFLAG_CAP0: Capture interrupt for channel (0)
  • MCPWM_INTFLAG_LIM1: Limit interrupt for channel (1)
  • MCPWM_INTFLAG_MAT1: Match interrupt for channel (1)
  • MCPWM_INTFLAG_CAP1: Capture interrupt for channel (1)
  • MCPWM_INTFLAG_LIM2: Limit interrupt for channel (2)
  • MCPWM_INTFLAG_MAT2: Match interrupt for channel (2)
  • MCPWM_INTFLAG_CAP2: Capture interrupt for channel (2)
  • MCPWM_INTFLAG_ABORT: Fast abort interrupt
[in] NewState New State of this command, should be:
  • ENABLE.
  • DISABLE.
Returns:
None

Note: all these ulIntType values above can be ORed together for using as input parameter.

Definition at line 413 of file lpc17xx_mcpwm.c.

void MCPWM_IntSet | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | ulIntType
 | ) |  |

Sets/Forces the specified interrupt for MCPWM peripheral.

Parameters:
[in] MCPWMx Motor Control PWM peripheral selected Should be LPC_MCPWM
[in] ulIntType Interrupt type, should be:
  • MCPWM_INTFLAG_LIM0: Limit interrupt for channel (0)
  • MCPWM_INTFLAG_MAT0: Match interrupt for channel (0)
  • MCPWM_INTFLAG_CAP0: Capture interrupt for channel (0)
  • MCPWM_INTFLAG_LIM1: Limit interrupt for channel (1)
  • MCPWM_INTFLAG_MAT1: Match interrupt for channel (1)
  • MCPWM_INTFLAG_CAP1: Capture interrupt for channel (1)
  • MCPWM_INTFLAG_LIM2: Limit interrupt for channel (2)
  • MCPWM_INTFLAG_MAT2: Match interrupt for channel (2)
  • MCPWM_INTFLAG_CAP2: Capture interrupt for channel (2)
  • MCPWM_INTFLAG_ABORT: Fast abort interrupt
Returns:
None Note: all these ulIntType values above can be ORed together for using as input parameter.

Definition at line 441 of file lpc17xx_mcpwm.c.

void MCPWM_Start | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | channel0,
 |  | uint32_t | channel1,
 |  | uint32_t | channel2
 | ) |  |

Start MCPWM activity for each MCPWM channel.

Parameters:
[in] MCPWMx Motor Control PWM peripheral selected Should be: LPC_MCPWM
[in] channel0 State of this command on channel 0:
  • ENABLE: 'Start' command will effect on channel 0
  • DISABLE: 'Start' command will not effect on channel 0
[in] channel1 State of this command on channel 1:
  • ENABLE: 'Start' command will effect on channel 1
  • DISABLE: 'Start' command will not effect on channel 1
[in] channel2 State of this command on channel 2:
  • ENABLE: 'Start' command will effect on channel 2
  • DISABLE: 'Start' command will not effect on channel 2
Returns:
None

Definition at line 293 of file lpc17xx_mcpwm.c.

void MCPWM_Stop | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | channel0,
 |  | uint32_t | channel1,
 |  | uint32_t | channel2
 | ) |  |

Stop MCPWM activity for each MCPWM channel.

Parameters:
[in] MCPWMx Motor Control PWM peripheral selected Should be: LPC_MCPWM
[in] channel0 State of this command on channel 0:
  • ENABLE: 'Stop' command will effect on channel 0
  • DISABLE: 'Stop' command will not effect on channel 0
[in] channel1 State of this command on channel 1:
  • ENABLE: 'Stop' command will effect on channel 1
  • DISABLE: 'Stop' command will not effect on channel 1
[in] channel2 State of this command on channel 2:
  • ENABLE: 'Stop' command will effect on channel 2
  • DISABLE: 'Stop' command will not effect on channel 2
Returns:
None

Definition at line 318 of file lpc17xx_mcpwm.c.

void MCPWM_WriteToShadow | ( | LPC_MCPWM_TypeDef * | MCPWMx,
 |  | uint32_t | channelNum,
 |  | MCPWM_CHANNEL_CFG_Type * | channelSetup
 | ) |  |

Write to MCPWM shadow registers - Update the value for period and pulse width in MCPWM peripheral.

Parameters:
[in] | MCPWMx | Motor Control PWM peripheral selected Should be: LPC_MCPWM
[in] | channelNum | Channel Number, should be: 0..2.
[in] | channelSetup | Pointer to a MCPWM_CHANNEL_CFG_Type structure that contains the configuration information for the specified MCPWM channel.
Returns:
None

Definition at line 150 of file lpc17xx_mcpwm.c.

Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: NVIC (Nested Vectored Interrupt Controller)

Modules
NVIC (Nested Vectored Interrupt Controller)
LPC1700CMSIS Firmware Library

Modules

NVIC Public Functions
NVIC_Private_Macros
Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: NVIC Public Functions

Functions
NVIC Public Functions
NVIC (Nested Vectored Interrupt Controller)

Functions

void | NVIC_DeInit (void)
De-initializes the NVIC peripheral registers to their default reset values.
void | NVIC_SCBDeInit (void)
De-initializes the SCB peripheral registers to their default reset values.
void | NVIC_SetVTOR (uint32_t offset)
Set Vector Table Offset value.

Function Documentation

void NVIC_DeInit ( void )

De-initializes the NVIC peripheral registers to their default reset values.

Parameters:
None
Returns:
None

These following NVIC peripheral registers will be de-initialized:

  • Disable Interrupt (32 IRQ interrupt sources that matched with LPC17xx)
  • Clear all Pending Interrupts (32 IRQ interrupt source that matched with LPC17xx)
  • Clear all Interrupt Priorities (32 IRQ interrupt source that matched with LPC17xx)

Definition at line 67 of file lpc17xx_nvic.c.

void NVIC_SCBDeInit ( void )

De-initializes the SCB peripheral registers to their default reset values.

Parameters:
none
Returns:
none

These following SCB NVIC peripheral registers will be de-initialized:

  • Interrupt Control State register
  • Interrupt Vector Table Offset register
  • Application Interrupt/Reset Control register
  • System Control register
  • Configuration Control register
  • System Handlers Priority Registers
  • System Handler Control and State Register
  • Configurable Fault Status Register
  • Hard Fault Status Register
  • Debug Fault Status Register

Definition at line 102 of file lpc17xx_nvic.c.

void NVIC_SetVTOR ( uint32_t offset )

Set Vector Table Offset value.

Parameters:
offset Offset value
Returns:
None

Definition at line 128 of file lpc17xx_nvic.c.

Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: NVIC_Private_Macros

Defines
NVIC_Private_Macros
NVIC (Nested Vectored Interrupt Controller)

Defines

#define NVIC_VTOR_MASK 0x3FFFFF80

Define Documentation

#define NVIC_VTOR_MASK 0x3FFFFF80

Definition at line 43 of file lpc17xx_nvic.c.

Generated on Mon Nov 28 2011 11:15:29 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PINSEL (Pin Selection)

Modules
PINSEL (Pin Selection)
LPC1700CMSIS Firmware Library

Modules

PINSEL Public Macros
PINSEL Private Macros
PINSEL Public Types
PINSEL Public Functions
Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PINSEL Public Macros

Defines
PINSEL Public Macros
PINSEL (Pin Selection)

Defines

#define | PINSEL_PORT_0 ((0))
#define | PINSEL_PORT_1 ((1))
#define | PINSEL_PORT_2 ((2))
#define | PINSEL_PORT_3 ((3))
#define | PINSEL_PORT_4 ((4))
#define | PINSEL_FUNC_0 ((0))
#define | PINSEL_FUNC_1 ((1))
#define | PINSEL_FUNC_2 ((2))
#define | PINSEL_FUNC_3 ((3))
#define | PINSEL_PIN_0 ((0))
#define | PINSEL_PIN_1 ((1))
#define | PINSEL_PIN_2 ((2))
#define | PINSEL_PIN_3 ((3))
#define | PINSEL_PIN_4 ((4))
#define | PINSEL_PIN_5 ((5))
#define | PINSEL_PIN_6 ((6))
#define | PINSEL_PIN_7 ((7))
#define | PINSEL_PIN_8 ((8))
#define | PINSEL_PIN_9 ((9))
#define | PINSEL_PIN_10 ((10))
#define | PINSEL_PIN_11 ((11))
#define | PINSEL_PIN_12 ((12))
#define | PINSEL_PIN_13 ((13))
#define | PINSEL_PIN_14 ((14))
#define | PINSEL_PIN_15 ((15))
#define | PINSEL_PIN_16 ((16))
#define | PINSEL_PIN_17 ((17))
#define | PINSEL_PIN_18 ((18))
#define | PINSEL_PIN_19 ((19))
#define | PINSEL_PIN_20 ((20))
#define | PINSEL_PIN_21 ((21))
#define | PINSEL_PIN_22 ((22))
#define | PINSEL_PIN_23 ((23))
#define | PINSEL_PIN_24 ((24))
#define | PINSEL_PIN_25 ((25))
#define | PINSEL_PIN_26 ((26))
#define | PINSEL_PIN_27 ((27))
#define | PINSEL_PIN_28 ((28))
#define | PINSEL_PIN_29 ((29))
#define | PINSEL_PIN_30 ((30))
#define | PINSEL_PIN_31 ((31))
#define | PINSEL_PINMODE_PULLUP ((0))
#define | PINSEL_PINMODE_TRISTATE ((2))
#define | PINSEL_PINMODE_PULLDOWN ((3))
#define | PINSEL_PINMODE_NORMAL ((0))
#define | PINSEL_PINMODE_OPENDRAIN ((1))
#define | PINSEL_I2C_Normal_Mode ((0))
#define | PINSEL_I2C_Fast_Mode ((1))

Define Documentation

#define PINSEL_FUNC_0 ((0))

default function

Definition at line 62 of file lpc17xx_pinsel.h.

#define PINSEL_FUNC_1 ((1))

first alternate function

Definition at line 63 of file lpc17xx_pinsel.h.

#define PINSEL_FUNC_2 ((2))

second alternate function

Definition at line 64 of file lpc17xx_pinsel.h.

#define PINSEL_FUNC_3 ((3))

third or reserved alternate function

Definition at line 65 of file lpc17xx_pinsel.h.

#define PINSEL_I2C_Fast_Mode ((1))

Fast Mode Plus drive mode

Definition at line 120 of file lpc17xx_pinsel.h.

#define PINSEL_I2C_Normal_Mode ((0))

The standard drive mode

Definition at line 119 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_0 ((0))

Pin 0

Definition at line 70 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_1 ((1))

Pin 1

Definition at line 71 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_10 ((10))

Pin 10

Definition at line 80 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_11 ((11))

Pin 11

Definition at line 81 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_12 ((12))

Pin 12

Definition at line 82 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_13 ((13))

Pin 13

Definition at line 83 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_14 ((14))

Pin 14

Definition at line 84 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_15 ((15))

Pin 15

Definition at line 85 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_16 ((16))

Pin 16

Definition at line 86 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_17 ((17))

Pin 17

Definition at line 87 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_18 ((18))

Pin 18

Definition at line 88 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_19 ((19))

Pin 19

Definition at line 89 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_2 ((2))

Pin 2

Definition at line 72 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_20 ((20))

Pin 20

Definition at line 90 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_21 ((21))

Pin 21

Definition at line 91 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_22 ((22))

Pin 22

Definition at line 92 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_23 ((23))

Pin 23

Definition at line 93 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_24 ((24))

Pin 24

Definition at line 94 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_25 ((25))

Pin 25

Definition at line 95 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_26 ((26))

Pin 26

Definition at line 96 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_27 ((27))

Pin 27

Definition at line 97 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_28 ((28))

Pin 28

Definition at line 98 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_29 ((29))

Pin 29

Definition at line 99 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_3 ((3))

Pin 3

Definition at line 73 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_30 ((30))

Pin 30

Definition at line 100 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_31 ((31))

Pin 31

Definition at line 101 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_4 ((4))

Pin 4

Definition at line 74 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_5 ((5))

Pin 5

Definition at line 75 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_6 ((6))

Pin 6

Definition at line 76 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_7 ((7))

Pin 7

Definition at line 77 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_8 ((8))

Pin 8

Definition at line 78 of file lpc17xx_pinsel.h.

#define PINSEL_PIN_9 ((9))

Pin 9

Definition at line 79 of file lpc17xx_pinsel.h.

#define PINSEL_PINMODE_NORMAL ((0))

Pin is in the normal (not open drain) mode.

Definition at line 113 of file lpc17xx_pinsel.h.

#define PINSEL_PINMODE_OPENDRAIN ((1))

Pin is in the open drain mode

Definition at line 114 of file lpc17xx_pinsel.h.

#define PINSEL_PINMODE_PULLDOWN ((3))

Internal pull-down resistor

Definition at line 108 of file lpc17xx_pinsel.h.

#define PINSEL_PINMODE_PULLUP ((0))

Internal pull-up resistor

Definition at line 106 of file lpc17xx_pinsel.h.

#define PINSEL_PINMODE_TRISTATE ((2))

Tri-state

Definition at line 107 of file lpc17xx_pinsel.h.

#define PINSEL_PORT_0 ((0))

!< Macros define for PORT Selection PORT 0

Definition at line 53 of file lpc17xx_pinsel.h.

#define PINSEL_PORT_1 ((1))

PORT 1

Definition at line 54 of file lpc17xx_pinsel.h.

#define PINSEL_PORT_2 ((2))

PORT 2

Definition at line 55 of file lpc17xx_pinsel.h.

#define PINSEL_PORT_3 ((3))

PORT 3

Definition at line 56 of file lpc17xx_pinsel.h.

#define PINSEL_PORT_4 ((4))

PORT 4

Definition at line 57 of file lpc17xx_pinsel.h.

Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PINSEL Private Macros

Defines
PINSEL Private Macros
PINSEL (Pin Selection)

Defines

#define | PINSEL_I2CPADCFG_SDADRV0 _BIT(0)
#define | PINSEL_I2CPADCFG_SDAI2C0 _BIT(1)
#define | PINSEL_I2CPADCFG_SCLDRV0 _BIT(2)
#define | PINSEL_I2CPADCFG_SCLI2C0 _BIT(3)

Define Documentation

#define PINSEL_I2CPADCFG_SCLDRV0 _BIT(2)

Drive mode control for the SCL0 pin, P0.28

Definition at line 135 of file lpc17xx_pinsel.h.

#define PINSEL_I2CPADCFG_SCLI2C0 _BIT(3)

I2C mode control for the SCL0 pin, P0.28

Definition at line 136 of file lpc17xx_pinsel.h.

#define PINSEL_I2CPADCFG_SDADRV0 _BIT(0)

Drive mode control for the SDA0 pin, P0.27

Definition at line 133 of file lpc17xx_pinsel.h.

#define PINSEL_I2CPADCFG_SDAI2C0 _BIT(1)

I2C mode control for the SDA0 pin, P0.27

Definition at line 134 of file lpc17xx_pinsel.h.

Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PINSEL Public Types

Data Structures
PINSEL Public Types
PINSEL (Pin Selection)

Data Structures

struct PINSEL_CFG_Type
Pin configuration structure. More...
Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PINSEL Public Functions

Functions
PINSEL Public Functions
PINSEL (Pin Selection)

Functions

void | PINSEL_ConfigPin (PINSEL_CFG_Type *PinCfg)
Configure Pin corresponding to specified parameters passed in the PinCfg.
void | PINSEL_ConfigTraceFunc (FunctionalState NewState)
Configure trace function.
void | PINSEL_SetI2C0Pins (uint8_t i2cPinMode, FunctionalState filterSlewRateEnable)
Setup I2C0 pins.

Function Documentation

void PINSEL_ConfigPin ( PINSEL_CFG_Type * PinCfg )

Configure Pin corresponding to specified parameters passed in the PinCfg.

Parameters:
[in] PinCfg Pointer to a PINSEL_CFG_Type structure that contains the configuration information for the specified pin.
Returns:
None

Definition at line 296 of file lpc17xx_pinsel.c.

void PINSEL_ConfigTraceFunc ( FunctionalState NewState )

Configure trace function.

Parameters:
[in] NewState State of the Trace function configuration, should be one of the following:
  • ENABLE : Enable Trace Function
  • DISABLE : Disable Trace Function
Returns:
None

Definition at line 251 of file lpc17xx_pinsel.c.

void PINSEL_SetI2C0Pins | ( | uint8_t | i2cPinMode,
 |  | FunctionalState | filterSlewRateEnable
 | ) |  |

Setup I2C0 pins.

Parameters:
[in] i2cPinMode I2C pin mode, should be one of the following:
  • PINSEL_I2C_Normal_Mode : The standard drive mode
  • PINSEL_I2C_Fast_Mode : Fast Mode Plus drive mode
[in] filterSlewRateEnable should be:
  • ENABLE: Enable filter and slew rate.
  • DISABLE: Disable filter and slew rate.
Returns:
None

Definition at line 273 of file lpc17xx_pinsel.c.

Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWM (Pulse Width Modulator)

Modules
PWM (Pulse Width Modulator)
LPC1700CMSIS Firmware Library

Modules

PWM Private Macros
PWM Public Types
PWM Public Functions
Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWM Private Macros

Defines
PWM Private Macros
PWM (Pulse Width Modulator)

Defines

#define | PWM_IR_PWMMRn(n) ((uint32_t)((n<4)?(1<<n):(1<<(n+4))))
#define | PWM_IR_PWMCAPn(n) ((uint32_t)(1<<(n+4)))
#define | PWM_IR_BITMASK ((uint32_t)(0x0000073F))
#define | PWM_TCR_BITMASK ((uint32_t)(0x0000000B))
#define | PWM_TCR_COUNTER_ENABLE ((uint32_t)(1<<0))
#define | PWM_TCR_COUNTER_RESET ((uint32_t)(1<<1))
#define | PWM_TCR_PWM_ENABLE ((uint32_t)(1<<3))
#define | PWM_CTCR_BITMASK ((uint32_t)(0x0000000F))
#define | PWM_CTCR_MODE(n) ((uint32_t)(n&0x03))
#define | PWM_CTCR_SELECT_INPUT(n) ((uint32_t)((n&0x03)<<2))
#define | PWM_MCR_BITMASK ((uint32_t)(0x001FFFFF))
#define | PWM_MCR_INT_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07))))
#define | PWM_MCR_RESET_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+1)))
#define | PWM_MCR_STOP_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+2)))
#define | PWM_CCR_BITMASK ((uint32_t)(0x0000003F))
#define | PWM_CCR_CAP_RISING(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1))))
#define | PWM_CCR_CAP_FALLING(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+1)))
#define | PWM_CCR_INT_ON_CAP(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+2)))
#define | PWM_PCR_BITMASK (uint32_t)0x00007E7C
#define | PWM_PCR_PWMSELn(n) ((uint32_t)(((n&0x7)<2) ? 0 : (1<<n)))
#define | PWM_PCR_PWMENAn(n) ((uint32_t)(((n&0x7)<1) ? 0 : (1<<(n+8))))
#define | PWM_LER_BITMASK ((uint32_t)(0x0000007F))
#define | PWM_LER_EN_MATCHn_LATCH(n) ((uint32_t)((n<7) ? (1<<n) : 0))
#define | PARAM_PWMx(n) (((uint32_t *)n)==((uint32_t *)LPC_PWM1))
#define | PARAM_PWM1_MATCH_CHANNEL(n) (n<=6)
#define | PARAM_PWM1_CHANNEL(n) ((n>=1) && (n<=6))
#define | PARAM_PWM1_EDGE_MODE_CHANNEL(n) ((n>=2) && (n<=6))
#define | PARAM_PWM1_CAPTURE_CHANNEL(n) ((n==0) || (n==1))
#define | PARAM_PWM_INTSTAT(n)

Define Documentation

#define PARAM_PWM1_CAPTURE_CHANNEL ( n ) ((n==0) || (n==1))

Macro check PWM1 capture channel mode

Definition at line 138 of file lpc17xx_pwm.h.

#define PARAM_PWM1_CHANNEL ( n ) ((n>=1) && (n<=6))

Macro check PWM1 channel value

Definition at line 132 of file lpc17xx_pwm.h.

#define PARAM_PWM1_EDGE_MODE_CHANNEL ( n ) ((n>=2) && (n<=6))

Macro check PWM1 edge channel mode

Definition at line 135 of file lpc17xx_pwm.h.

#define PARAM_PWM1_MATCH_CHANNEL ( n ) (n<=6)

Macro check PWM1 match channel value

Definition at line 129 of file lpc17xx_pwm.h.

#define PARAM_PWM_INTSTAT ( n )
Value:
((n==PWM_INTSTAT_MR0) || (n==PWM_INTSTAT_MR1) || (n==PWM_INTSTAT_MR2) \
|| (n==PWM_INTSTAT_MR3) || (n==PWM_INTSTAT_MR4) || (n==PWM_INTSTAT_MR5) \
|| (n==PWM_INTSTAT_MR6) || (n==PWM_INTSTAT_CAP0) || (n==PWM_INTSTAT_CAP1))

Macro check PWM1 interrupt status type

Definition at line 141 of file lpc17xx_pwm.h.

#define PARAM_PWMx ( n ) (((uint32_t *)n)==((uint32_t *)LPC_PWM1))

Macro to determine if it is valid PWM peripheral or not

Definition at line 126 of file lpc17xx_pwm.h.

#define PWM_CCR_BITMASK ((uint32_t)(0x0000003F))

CCR register mask

Definition at line 98 of file lpc17xx_pwm.h.

#define PWM_CCR_CAP_FALLING ( n ) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+1)))

PCAPn is falling edge sensitive

Definition at line 102 of file lpc17xx_pwm.h.

#define PWM_CCR_CAP_RISING ( n ) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1))))

PCAPn is rising edge sensitive

Definition at line 100 of file lpc17xx_pwm.h.

#define PWM_CCR_INT_ON_CAP ( n ) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+2)))

PWM interrupt is generated on a PCAP event

Definition at line 104 of file lpc17xx_pwm.h.

#define PWM_CTCR_BITMASK ((uint32_t)(0x0000000F))

CTCR register mask

Definition at line 76 of file lpc17xx_pwm.h.

#define PWM_CTCR_MODE ( n ) ((uint32_t)(n&0x03))

PWM Counter-Timer Mode

Definition at line 78 of file lpc17xx_pwm.h.

#define PWM_CTCR_SELECT_INPUT ( n ) ((uint32_t)((n&0x03)<<2))

PWM Capture input select

Definition at line 80 of file lpc17xx_pwm.h.

#define PWM_IR_BITMASK ((uint32_t)(0x0000073F))

IR register mask

Definition at line 61 of file lpc17xx_pwm.h.

#define PWM_IR_PWMCAPn ( n ) ((uint32_t)(1<<(n+4)))

Interrupt flag for capture input

Definition at line 59 of file lpc17xx_pwm.h.

#define PWM_IR_PWMMRn ( n ) ((uint32_t)((n<4)?(1<<n):(1<<(n+4))))

Interrupt flag for PWM match channel for 6 channel

Definition at line 57 of file lpc17xx_pwm.h.

#define PWM_LER_BITMASK ((uint32_t)(0x0000007F))

LER register mask

Definition at line 120 of file lpc17xx_pwm.h.

#define PWM_LER_EN_MATCHn_LATCH ( n ) ((uint32_t)((n<7) ? (1<<n) : 0))

PWM MATCHn register update control

Definition at line 122 of file lpc17xx_pwm.h.

#define PWM_MCR_BITMASK ((uint32_t)(0x001FFFFF))

MCR register mask

Definition at line 86 of file lpc17xx_pwm.h.

#define PWM_MCR_INT_ON_MATCH ( n ) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07))))

generate a PWM interrupt when a MATCHn occurs

Definition at line 88 of file lpc17xx_pwm.h.

#define PWM_MCR_RESET_ON_MATCH ( n ) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+1)))

reset the PWM when a MATCHn occurs

Definition at line 90 of file lpc17xx_pwm.h.

#define PWM_MCR_STOP_ON_MATCH ( n ) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+2)))

stop the PWM when a MATCHn occurs

Definition at line 92 of file lpc17xx_pwm.h.

#define PWM_PCR_BITMASK (uint32_t)0x00007E7C

PCR register mask

Definition at line 110 of file lpc17xx_pwm.h.

#define PWM_PCR_PWMENAn ( n ) ((uint32_t)(((n&0x7)<1) ? 0 : (1<<(n+8))))

enable PWM output n

Definition at line 114 of file lpc17xx_pwm.h.

#define PWM_PCR_PWMSELn ( n ) ((uint32_t)(((n&0x7)<2) ? 0 : (1<<n)))

PWM output n is a single edge controlled output

Definition at line 112 of file lpc17xx_pwm.h.

#define PWM_TCR_BITMASK ((uint32_t)(0x0000000B))

TCR register mask

Definition at line 67 of file lpc17xx_pwm.h.

#define PWM_TCR_COUNTER_ENABLE ((uint32_t)(1<<0))

PWM Counter Enable

Definition at line 68 of file lpc17xx_pwm.h.

#define PWM_TCR_COUNTER_RESET ((uint32_t)(1<<1))

PWM Counter Reset

Definition at line 69 of file lpc17xx_pwm.h.

#define PWM_TCR_PWM_ENABLE ((uint32_t)(1<<3))

PWM Enable

Definition at line 70 of file lpc17xx_pwm.h.

Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWM Public Types

Data Structures | Defines | Enumerations
PWM Public Types
PWM (Pulse Width Modulator)

Data Structures

struct | PWM_TIMERCFG_Type
Configuration structure in PWM TIMER mode. More...
struct | PWM_COUNTERCFG_Type
Configuration structure in PWM COUNTER mode. More...
struct | PWM_MATCHCFG_Type
PWM Match channel configuration structure. More...
struct | PWM_CAPTURECFG_Type
PWM Capture Input configuration structure. More...
struct | PWM_Match_T
Match update structure. More...

Defines

#define | PARAM_PWM_TC_MODE(n) ((n==PWM_MODE_TIMER) || (n==PWM_MODE_COUNTER))
#define | PARAM_PWM_TIMER_PRESCALE(n) ((n==PWM_TIMER_PRESCALE_TICKVAL) || (n==PWM_TIMER_PRESCALE_USVAL))
#define | PARAM_PWM_COUNTER_INPUTSEL(n) ((n==PWM_COUNTER_PCAP1_0) || (n==PWM_COUNTER_PCAP1_1))
#define | PARAM_PWM_COUNTER_EDGE(n)
#define | PARAM_PWM_CHANNEL_EDGE(n) ((n==PWM_CHANNEL_SINGLE_EDGE) || (n==PWM_CHANNEL_DUAL_EDGE))
#define | PARAM_PWM_MATCH_UPDATE(n) ((n==PWM_MATCH_UPDATE_NOW) || (n==PWM_MATCH_UPDATE_NEXT_RST))

Enumerations

enum | PWM_TC_MODE_OPT { PWM_MODE_TIMER = 0, PWM_MODE_COUNTER }
PMW TC mode select option. More...
enum | PWM_TIMER_PRESCALE_OPT { PWM_TIMER_PRESCALE_TICKVAL = 0, PWM_TIMER_PRESCALE_USVAL }
PWM Timer/Counter prescale option. More...
enum | PWM_COUNTER_INPUTSEL_OPT { PWM_COUNTER_PCAP1_0 = 0, PWM_COUNTER_PCAP1_1 }
PWM Input Select in counter mode. More...
enum | PWM_COUNTER_EDGE_OPT { PWM_COUNTER_RISING = 1, PWM_COUNTER_FALLING = 2, PWM_COUNTER_ANY = 3 }
PWM Input Edge Option in counter mode. More...
enum | PWM_CHANNEL_EDGE_OPT { PWM_CHANNEL_SINGLE_EDGE, PWM_CHANNEL_DUAL_EDGE }
PWM operating mode options. More...
enum | PWM_MATCH_UPDATE_OPT { PWM_MATCH_UPDATE_NOW = 0, PWM_MATCH_UPDATE_NEXT_RST }
PWM update type. More...
enum PWM_INTSTAT_TYPE {
PWM_INTSTAT_MR0 = PWM_IR_PWMMRn(0), PWM_INTSTAT_MR1 = PWM_IR_PWMMRn(1), PWM_INTSTAT_MR2 = PWM_IR_PWMMRn(2), PWM_INTSTAT_MR3 = PWM_IR_PWMMRn(3),
PWM_INTSTAT_CAP0 = PWM_IR_PWMCAPn(0), PWM_INTSTAT_CAP1 = PWM_IR_PWMCAPn(1), PWM_INTSTAT_MR4 = PWM_IR_PWMMRn(4), PWM_INTSTAT_MR6 = PWM_IR_PWMMRn(5),
PWM_INTSTAT_MR5 = PWM_IR_PWMMRn(6)
}
PWM interrupt status type definition -----------------------------------------------------. More...

Define Documentation

#define PARAM_PWM_CHANNEL_EDGE ( n ) ((n==PWM_CHANNEL_SINGLE_EDGE) || (n==PWM_CHANNEL_DUAL_EDGE))

Definition at line 266 of file lpc17xx_pwm.h.

#define PARAM_PWM_COUNTER_EDGE ( n )
Value:
((n==PWM_COUNTER_RISING) || (n==PWM_COUNTER_FALLING) \
|| (n==PWM_COUNTER_ANY))

Definition at line 255 of file lpc17xx_pwm.h.

#define PARAM_PWM_COUNTER_INPUTSEL ( n ) ((n==PWM_COUNTER_PCAP1_0) || (n==PWM_COUNTER_PCAP1_1))

Definition at line 246 of file lpc17xx_pwm.h.

#define PARAM_PWM_MATCH_UPDATE ( n ) ((n==PWM_MATCH_UPDATE_NOW) || (n==PWM_MATCH_UPDATE_NEXT_RST))

Definition at line 276 of file lpc17xx_pwm.h.

#define PARAM_PWM_TC_MODE ( n ) ((n==PWM_MODE_TIMER) || (n==PWM_MODE_COUNTER))

Definition at line 227 of file lpc17xx_pwm.h.

#define PARAM_PWM_TIMER_PRESCALE ( n ) ((n==PWM_TIMER_PRESCALE_TICKVAL) || (n==PWM_TIMER_PRESCALE_USVAL))

Definition at line 237 of file lpc17xx_pwm.h.

Enumeration Type Documentation

enum PWM_CHANNEL_EDGE_OPT

PWM operating mode options.

Enumerator:
PWM_CHANNEL_SINGLE_EDGE

PWM Channel Single edge mode

PWM_CHANNEL_DUAL_EDGE

PWM Channel Dual edge mode

Definition at line 261 of file lpc17xx_pwm.h.

enum PWM_COUNTER_EDGE_OPT

PWM Input Edge Option in counter mode.

Enumerator:
PWM_COUNTER_RISING

Rising edge mode

PWM_COUNTER_FALLING

Falling edge mode

PWM_COUNTER_ANY

Both rising and falling mode

Definition at line 249 of file lpc17xx_pwm.h.

enum PWM_COUNTER_INPUTSEL_OPT

PWM Input Select in counter mode.

Enumerator:
PWM_COUNTER_PCAP1_0

PWM Counter input selected is PCAP1.0 pin

PWM_COUNTER_PCAP1_1

PWM counter input selected is CAP1.1 pin

Definition at line 241 of file lpc17xx_pwm.h.

enum PWM_INTSTAT_TYPE

PWM interrupt status type definition -----------------------------------------------------.

PWM Interrupt status type

Enumerator:
PWM_INTSTAT_MR0

Interrupt flag for PWM match channel 0

PWM_INTSTAT_MR1

Interrupt flag for PWM match channel 1

PWM_INTSTAT_MR2

Interrupt flag for PWM match channel 2

PWM_INTSTAT_MR3

Interrupt flag for PWM match channel 3

PWM_INTSTAT_CAP0

Interrupt flag for capture input 0

PWM_INTSTAT_CAP1

Interrupt flag for capture input 1

PWM_INTSTAT_MR4

Interrupt flag for PWM match channel 4

PWM_INTSTAT_MR6

Interrupt flag for PWM match channel 5

PWM_INTSTAT_MR5

Interrupt flag for PWM match channel 6

Definition at line 281 of file lpc17xx_pwm.h.

enum PWM_MATCH_UPDATE_OPT

PWM update type.

Enumerator:
PWM_MATCH_UPDATE_NOW

PWM Match Channel Update Now

PWM_MATCH_UPDATE_NEXT_RST

PWM Match Channel Update on next PWM Counter resetting

Definition at line 270 of file lpc17xx_pwm.h.

enum PWM_TC_MODE_OPT

PMW TC mode select option.

Enumerator:
PWM_MODE_TIMER

PWM using Timer mode

PWM_MODE_COUNTER

PWM using Counter mode

Definition at line 222 of file lpc17xx_pwm.h.

enum PWM_TIMER_PRESCALE_OPT

PWM Timer/Counter prescale option.

Enumerator:
PWM_TIMER_PRESCALE_TICKVAL

Prescale in absolute value

PWM_TIMER_PRESCALE_USVAL

Prescale in microsecond value

Definition at line 231 of file lpc17xx_pwm.h.

Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWM Public Functions

Functions
PWM Public Functions
PWM (Pulse Width Modulator)

Functions

void | PWM_PinConfig (LPC_PWM_TypeDef *PWMx, uint8_t PWM_Channel, uint8_t PinselOption)
IntStatus | PWM_GetIntStatus (LPC_PWM_TypeDef *PWMx, uint32_t IntFlag)
Check whether specified interrupt flag in PWM is set or not.
void | PWM_ClearIntPending (LPC_PWM_TypeDef *PWMx, uint32_t IntFlag)
Clear specified PWM Interrupt pending.
void | PWM_ConfigStructInit (uint8_t PWMTimerCounterMode, void *PWM_InitStruct)
Fills each PWM_InitStruct member with its default value:
void | PWM_Init (LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct)
Initializes the PWMx peripheral corresponding to the specified parameters in the PWM_ConfigStruct.
void | PWM_DeInit (LPC_PWM_TypeDef *PWMx)
De-initializes the PWM peripheral registers to their default reset values.
void | PWM_Cmd (LPC_PWM_TypeDef *PWMx, FunctionalState NewState)
Enable/Disable PWM peripheral.
void | PWM_CounterCmd (LPC_PWM_TypeDef *PWMx, FunctionalState NewState)
Enable/Disable Counter in PWM peripheral.
void | PWM_ResetCounter (LPC_PWM_TypeDef *PWMx)
Reset Counter in PWM peripheral.
void | PWM_ConfigMatch (LPC_PWM_TypeDef *PWMx, PWM_MATCHCFG_Type *PWM_MatchConfigStruct)
Configures match for PWM peripheral.
void | PWM_ConfigCapture (LPC_PWM_TypeDef *PWMx, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct)
Configures capture input for PWM peripheral.
uint32_t | PWM_GetCaptureValue (LPC_PWM_TypeDef *PWMx, uint8_t CaptureChannel)
Read value of capture register PWM peripheral.
void | PWM_MatchUpdate (LPC_PWM_TypeDef *PWMx, uint8_t MatchChannel, uint32_t MatchValue, uint8_t UpdateType)
Update value for each PWM channel with update type option.
void | PWM_ChannelConfig (LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, uint8_t ModeOption)
Configure Edge mode for each PWM channel.
void | PWM_ChannelCmd (LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, FunctionalState NewState)
Enable/Disable PWM channel output.
void | PWM_MultiMatchUpdate (LPC_PWM_TypeDef *PWMx, PWM_Match_T *MatchStruct, uint8_t UpdateType)
Update value for multi PWM channel with update type option at the same time.

Function Documentation

void PWM_ChannelCmd | ( | LPC_PWM_TypeDef * | PWMx,
 |  | uint8_t | PWMChannel,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable PWM channel output.

Parameters:
[in] | PWMx | PWM peripheral selected, should be LPC_PWM1
[in] | PWMChannel | PWM channel, should be in range from 1 to 6
[in] NewState New State of this function, should be:
  • ENABLE: Enable this PWM channel output
  • DISABLE: Disable this PWM channel output
Returns:
None

Definition at line 557 of file lpc17xx_pwm.c.

void PWM_ChannelConfig | ( | LPC_PWM_TypeDef * | PWMx,
 |  | uint8_t | PWMChannel,
 |  | uint8_t | ModeOption
 | ) |  |

Configure Edge mode for each PWM channel.

Parameters:
[in] | PWMx | PWM peripheral selected, should be LPC_PWM1
[in] | PWMChannel | PWM channel, should be in range from 2 to 6
[in] ModeOption PWM mode option, should be:
  • PWM_CHANNEL_SINGLE_EDGE: Single Edge mode
  • PWM_CHANNEL_DUAL_EDGE: Dual Edge mode
Returns:
None Note: PWM Channel 1 can not be selected for mode option

Definition at line 528 of file lpc17xx_pwm.c.

void PWM_ClearIntPending | ( | LPC_PWM_TypeDef * | PWMx,
 |  | uint32_t | IntFlag
 | ) |  |

Clear specified PWM Interrupt pending.

Parameters:
[in] PWMx,: PWM peripheral, should be LPC_PWM1
[in] IntFlag,: PWM interrupt flag, should be:
  • PWM_INTSTAT_MR0: Interrupt flag for PWM match channel 0
  • PWM_INTSTAT_MR1: Interrupt flag for PWM match channel 1
  • PWM_INTSTAT_MR2: Interrupt flag for PWM match channel 2
  • PWM_INTSTAT_MR3: Interrupt flag for PWM match channel 3
  • PWM_INTSTAT_MR4: Interrupt flag for PWM match channel 4
  • PWM_INTSTAT_MR5: Interrupt flag for PWM match channel 5
  • PWM_INTSTAT_MR6: Interrupt flag for PWM match channel 6
  • PWM_INTSTAT_CAP0: Interrupt flag for capture input 0
  • PWM_INTSTAT_CAP1: Interrupt flag for capture input 1
Returns:
None

Definition at line 95 of file lpc17xx_pwm.c.

void PWM_Cmd | ( | LPC_PWM_TypeDef * | PWMx,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable PWM peripheral.

Parameters:
[in] PWMx PWM peripheral selected, should be LPC_PWM1
[in] NewState New State of this function, should be:
  • ENABLE: Enable PWM peripheral
  • DISABLE: Disable PWM peripheral
Returns:
None

Definition at line 236 of file lpc17xx_pwm.c.

void PWM_ConfigCapture | ( | LPC_PWM_TypeDef * | PWMx,
 |  | PWM_CAPTURECFG_Type * | PWM_CaptureConfigStruct
 | ) |  |

Configures capture input for PWM peripheral.

Parameters:
[in] | PWMx | PWM peripheral selected, should be LPC_PWM1
[in] | PWM_CaptureConfigStruct | Pointer to a PWM_CAPTURECFG_Type structure that contains the configuration information for the specified PWM capture input function.
Returns:
None

Definition at line 347 of file lpc17xx_pwm.c.

void PWM_ConfigMatch | ( | LPC_PWM_TypeDef * | PWMx,
 |  | PWM_MATCHCFG_Type * | PWM_MatchConfigStruct
 | ) |  |

Configures match for PWM peripheral.

Parameters:
[in] | PWMx | PWM peripheral selected, should be LPC_PWM1
[in] | PWM_MatchConfigStruct | Pointer to a PWM_MATCHCFG_Type structure that contains the configuration information for the specified PWM match function.
Returns:
None

Definition at line 296 of file lpc17xx_pwm.c.

void PWM_ConfigStructInit | ( | uint8_t | PWMTimerCounterMode,
 |  | void * | PWM_InitStruct
 | ) |  |

Fills each PWM_InitStruct member with its default value:

  • If PWMCounterMode = PWM_MODE_TIMER: + PrescaleOption = PWM_TIMER_PRESCALE_USVAL + PrescaleValue = 1
  • If PWMCounterMode = PWM_MODE_COUNTER: + CountInputSelect = PWM_COUNTER_PCAP1_0 + CounterOption = PWM_COUNTER_RISING
    Parameters:
    [in] PWMTimerCounterMode Timer or Counter mode, should be:
  • PWM_MODE_TIMER: Counter of PWM peripheral is in Timer mode
  • PWM_MODE_COUNTER: Counter of PWM peripheral is in Counter mode
    Parameters:
    [in] PWM_InitStruct Pointer to structure (PWM_TIMERCFG_Type or PWM_COUNTERCFG_Type) which will be initialized.
    Returns:
    None Note: PWM_InitStruct pointer will be assigned to corresponding structure (PWM_TIMERCFG_Type or PWM_COUNTERCFG_Type) due to PWMTimerCounterMode.

Definition at line 121 of file lpc17xx_pwm.c.

void PWM_CounterCmd | ( | LPC_PWM_TypeDef * | PWMx,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable Counter in PWM peripheral.

Parameters:
[in] PWMx PWM peripheral selected, should be LPC_PWM1
[in] NewState New State of this function, should be:
  • ENABLE: Enable Counter in PWM peripheral
  • DISABLE: Disable Counter in PWM peripheral
Returns:
None

Definition at line 260 of file lpc17xx_pwm.c.

void PWM_DeInit ( LPC_PWM_TypeDef * PWMx )

De-initializes the PWM peripheral registers to their default reset values.

Parameters:
[in] PWMx PWM peripheral selected, should be LPC_PWM1
Returns:
None

Definition at line 217 of file lpc17xx_pwm.c.

uint32_t PWM_GetCaptureValue | ( | LPC_PWM_TypeDef * | PWMx,
 |  | uint8_t | CaptureChannel
 | ) |  |

Read value of capture register PWM peripheral.

Parameters:
[in] PWMx PWM peripheral selected, should be LPC_PWM1
[in] CaptureChannel,: capture channel number, should be in range 0 to 1
Returns:
Value of capture register

Definition at line 394 of file lpc17xx_pwm.c.

IntStatus PWM_GetIntStatus | ( | LPC_PWM_TypeDef * | PWMx,
 |  | uint32_t | IntFlag
 | ) |  |

Check whether specified interrupt flag in PWM is set or not.

Parameters:
[in] PWMx,: PWM peripheral, should be LPC_PWM1
[in] IntFlag,: PWM interrupt flag, should be:
  • PWM_INTSTAT_MR0: Interrupt flag for PWM match channel 0
  • PWM_INTSTAT_MR1: Interrupt flag for PWM match channel 1
  • PWM_INTSTAT_MR2: Interrupt flag for PWM match channel 2
  • PWM_INTSTAT_MR3: Interrupt flag for PWM match channel 3
  • PWM_INTSTAT_MR4: Interrupt flag for PWM match channel 4
  • PWM_INTSTAT_MR5: Interrupt flag for PWM match channel 5
  • PWM_INTSTAT_MR6: Interrupt flag for PWM match channel 6
  • PWM_INTSTAT_CAP0: Interrupt flag for capture input 0
  • PWM_INTSTAT_CAP1: Interrupt flag for capture input 1
Returns:
New State of PWM interrupt flag (SET or RESET)

Definition at line 70 of file lpc17xx_pwm.c.

void PWM_Init | ( | LPC_PWM_TypeDef * | PWMx,
 |  | uint32_t | PWMTimerCounterMode,
 |  | void * | PWM_ConfigStruct
 | ) |  |

Initializes the PWMx peripheral corresponding to the specified parameters in the PWM_ConfigStruct.

Parameters:
[in] | PWMx | PWM peripheral, should be LPC_PWM1
[in] PWMTimerCounterMode Timer or Counter mode, should be:
  • PWM_MODE_TIMER: Counter of PWM peripheral is in Timer mode
  • PWM_MODE_COUNTER: Counter of PWM peripheral is in Counter mode
[in] | PWM_ConfigStruct | Pointer to structure (PWM_TIMERCFG_Type or PWM_COUNTERCFG_Type) which will be initialized.
Returns:
None Note: PWM_ConfigStruct pointer will be assigned to corresponding structure (PWM_TIMERCFG_Type or PWM_COUNTERCFG_Type) due to PWMTimerCounterMode.

Definition at line 156 of file lpc17xx_pwm.c.

void PWM_MatchUpdate | ( | LPC_PWM_TypeDef * | PWMx,
 |  | uint8_t | MatchChannel,
 |  | uint32_t | MatchValue,
 |  | uint8_t | UpdateType
 | ) |  |

Update value for each PWM channel with update type option.

Parameters:
[in] | PWMx | PWM peripheral selected, should be LPC_PWM1
[in] | MatchChannel | Match channel
[in] | MatchValue | Match value
[in] UpdateType Type of Update, should be:
  • PWM_MATCH_UPDATE_NOW: The update value will be updated for this channel immediately
  • PWM_MATCH_UPDATE_NEXT_RST: The update value will be updated for this channel on next reset by a PWM Match event.
Returns:
None

Definition at line 425 of file lpc17xx_pwm.c.

void PWM_MultiMatchUpdate | ( | LPC_PWM_TypeDef * | PWMx,
 |  | PWM_Match_T * | MatchStruct,
 |  | uint8_t | UpdateType
 | ) |  |

Update value for multi PWM channel with update type option at the same time.

Parameters:
[in] | PWMx | PWM peripheral selected, should be LPC_PWM1
[in] | MatchStruct | Structure that contents match value of 7 pwm channels
[in] UpdateType Type of Update, should be:
  • PWM_MATCH_UPDATE_NOW: The update value will be updated for this channel immediately
  • PWM_MATCH_UPDATE_NEXT_RST: The update value will be updated for this channel on next reset by a PWM Match event.
Returns:
None

Definition at line 486 of file lpc17xx_pwm.c.

void PWM_PinConfig | ( | LPC_PWM_TypeDef * | PWMx,
 |  | uint8_t | PWM_Channel,
 |  | uint8_t | PinselOption
 | ) |  |
void PWM_ResetCounter ( LPC_PWM_TypeDef * PWMx )

Reset Counter in PWM peripheral.

Parameters:
[in] PWMx PWM peripheral selected, should be LPC_PWM1
Returns:
None

Definition at line 280 of file lpc17xx_pwm.c.

Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI (Quadrature Encoder Interface)

Modules
QEI (Quadrature Encoder Interface)
LPC1700CMSIS Firmware Library

Modules

QEI Public Macros
QEI Private Macros
QEI Public Types
QEI Public Functions
QEI Private Types
Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI Public Macros

Defines
QEI Public Macros
QEI (Quadrature Encoder Interface)

Defines

#define | QEI_RESET_POS QEI_CON_RESP
#define | QEI_RESET_POSOnIDX QEI_CON_RESPI
#define | QEI_RESET_VEL QEI_CON_RESV
#define | QEI_RESET_IDX QEI_CON_RESI
#define | QEI_DIRINV_NONE ((uint32_t)(0))
#define | QEI_DIRINV_CMPL ((uint32_t)(1))
#define | QEI_SIGNALMODE_QUAD ((uint32_t)(0))
#define | QEI_SIGNALMODE_CLKDIR ((uint32_t)(1))
#define | QEI_CAPMODE_2X ((uint32_t)(0))
#define | QEI_CAPMODE_4X ((uint32_t)(1))
#define | QEI_INVINX_NONE ((uint32_t)(0))
#define | QEI_INVINX_EN ((uint32_t)(1))
#define | QEI_TIMERRELOAD_TICKVAL ((uint8_t)(0))
#define | QEI_TIMERRELOAD_USVAL ((uint8_t)(1))
#define | QEI_STATUS_DIR ((uint32_t)(1<<0))
#define | QEI_COMPPOS_CH_0 ((uint8_t)(0))
#define | QEI_COMPPOS_CH_1 ((uint8_t)(1))
#define | QEI_COMPPOS_CH_2 ((uint8_t)(2))
#define | QEI_INTFLAG_INX_Int ((uint32_t)(1<<0))
#define | QEI_INTFLAG_TIM_Int ((uint32_t)(1<<1))
#define | QEI_INTFLAG_VELC_Int ((uint32_t)(1<<2))
#define | QEI_INTFLAG_DIR_Int ((uint32_t)(1<<3))
#define | QEI_INTFLAG_ERR_Int ((uint32_t)(1<<4))
#define | QEI_INTFLAG_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_INTFLAG_POS0_Int ((uint32_t)(1<<6))
#define | QEI_INTFLAG_POS1_Int ((uint32_t)(1<<7))
#define | QEI_INTFLAG_POS2_Int ((uint32_t)(1<<8))
#define | QEI_INTFLAG_REV_Int ((uint32_t)(1<<9))
#define | QEI_INTFLAG_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_INTFLAG_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_INTFLAG_POS2REV_Int ((uint32_t)(1<<12))

Define Documentation

#define QEI_CAPMODE_2X ((uint32_t)(0))

Capture mode: Only Phase-A edges are counted (2X)

Definition at line 66 of file lpc17xx_qei.h.

#define QEI_CAPMODE_4X ((uint32_t)(1))

Capture mode: BOTH PhA and PhB edges are counted (4X)

Definition at line 67 of file lpc17xx_qei.h.

#define QEI_COMPPOS_CH_0 ((uint8_t)(0))

QEI compare position channel 0

Definition at line 81 of file lpc17xx_qei.h.

#define QEI_COMPPOS_CH_1 ((uint8_t)(1))

QEI compare position channel 1

Definition at line 82 of file lpc17xx_qei.h.

#define QEI_COMPPOS_CH_2 ((uint8_t)(2))

QEI compare position channel 2

Definition at line 83 of file lpc17xx_qei.h.

#define QEI_DIRINV_CMPL ((uint32_t)(1))

Direction is complemented

Definition at line 59 of file lpc17xx_qei.h.

#define QEI_DIRINV_NONE ((uint32_t)(0))

Direction is not inverted

Definition at line 58 of file lpc17xx_qei.h.

#define QEI_INTFLAG_DIR_Int ((uint32_t)(1<<3))

Change of direction interrupt

Definition at line 89 of file lpc17xx_qei.h.

#define QEI_INTFLAG_ENCLK_Int ((uint32_t)(1<<5))

An encoder clock pulse was detected interrupt

Definition at line 91 of file lpc17xx_qei.h.

#define QEI_INTFLAG_ERR_Int ((uint32_t)(1<<4))

An encoder phase error interrupt

Definition at line 90 of file lpc17xx_qei.h.

#define QEI_INTFLAG_INX_Int ((uint32_t)(1<<0))

index pulse was detected interrupt

Definition at line 86 of file lpc17xx_qei.h.

#define QEI_INTFLAG_POS0_Int ((uint32_t)(1<<6))

position 0 compare value is equal to the current position interrupt

Definition at line 92 of file lpc17xx_qei.h.

#define QEI_INTFLAG_POS0REV_Int ((uint32_t)(1<<10))

Combined position 0 and revolution count interrupt

Definition at line 100 of file lpc17xx_qei.h.

#define QEI_INTFLAG_POS1_Int ((uint32_t)(1<<7))

position 1 compare value is equal to the current position interrupt

Definition at line 94 of file lpc17xx_qei.h.

#define QEI_INTFLAG_POS1REV_Int ((uint32_t)(1<<11))

Combined position 1 and revolution count interrupt

Definition at line 101 of file lpc17xx_qei.h.

#define QEI_INTFLAG_POS2_Int ((uint32_t)(1<<8))

position 2 compare value is equal to the current position interrupt

Definition at line 96 of file lpc17xx_qei.h.

#define QEI_INTFLAG_POS2REV_Int ((uint32_t)(1<<12))

Combined position 2 and revolution count interrupt

Definition at line 102 of file lpc17xx_qei.h.

#define QEI_INTFLAG_REV_Int ((uint32_t)(1<<9))

Index compare value is equal to the current index count interrupt

Definition at line 98 of file lpc17xx_qei.h.

#define QEI_INTFLAG_TIM_Int ((uint32_t)(1<<1))

Velocity timer over flow interrupt

Definition at line 87 of file lpc17xx_qei.h.

#define QEI_INTFLAG_VELC_Int ((uint32_t)(1<<2))

Capture velocity is less than compare interrupt

Definition at line 88 of file lpc17xx_qei.h.

#define QEI_INVINX_EN ((uint32_t)(1))

Invert Index signal option: Enable

Definition at line 71 of file lpc17xx_qei.h.

#define QEI_INVINX_NONE ((uint32_t)(0))

Invert Index signal option: None

Definition at line 70 of file lpc17xx_qei.h.

#define QEI_RESET_IDX QEI_CON_RESI

Reset Index Counter

Definition at line 55 of file lpc17xx_qei.h.

#define QEI_RESET_POS QEI_CON_RESP

Reset position counter

Definition at line 52 of file lpc17xx_qei.h.

#define QEI_RESET_POSOnIDX QEI_CON_RESPI

Reset Posistion Counter on Index

Definition at line 53 of file lpc17xx_qei.h.

#define QEI_RESET_VEL QEI_CON_RESV

Reset Velocity

Definition at line 54 of file lpc17xx_qei.h.

#define QEI_SIGNALMODE_CLKDIR ((uint32_t)(1))

Signal operation: Clock/Direction mode

Definition at line 63 of file lpc17xx_qei.h.

#define QEI_SIGNALMODE_QUAD ((uint32_t)(0))

Signal operation: Quadrature phase mode

Definition at line 62 of file lpc17xx_qei.h.

#define QEI_STATUS_DIR ((uint32_t)(1<<0))

Direction status

Definition at line 78 of file lpc17xx_qei.h.

#define QEI_TIMERRELOAD_TICKVAL ((uint8_t)(0))

Reload value in absolute value

Definition at line 74 of file lpc17xx_qei.h.

#define QEI_TIMERRELOAD_USVAL ((uint8_t)(1))

Reload value in microsecond value

Definition at line 75 of file lpc17xx_qei.h.

Generated on Mon Nov 28 2011 11:15:16 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI Private Macros

Defines
QEI Private Macros
QEI (Quadrature Encoder Interface)

Defines

#define | QEI_CON_RESP ((uint32_t)(1<<0))
#define | QEI_CON_RESPI ((uint32_t)(1<<1))
#define | QEI_CON_RESV ((uint32_t)(1<<2))
#define | QEI_CON_RESI ((uint32_t)(1<<3))
#define | QEI_CON_BITMASK ((uint32_t)(0x0F))
#define | QEI_CONF_DIRINV ((uint32_t)(1<<0))
#define | QEI_CONF_SIGMODE ((uint32_t)(1<<1))
#define | QEI_CONF_CAPMODE ((uint32_t)(1<<2))
#define | QEI_CONF_INVINX ((uint32_t)(1<<3))
#define | QEI_CONF_BITMASK ((uint32_t)(0x0F))
#define | QEI_STAT_DIR ((uint32_t)(1<<0))
#define | QEI_STAT_BITMASK ((uint32_t)(1<<0))
#define | QEI_INTSTAT_INX_Int ((uint32_t)(1<<0))
#define | QEI_INTSTAT_TIM_Int ((uint32_t)(1<<1))
#define | QEI_INTSTAT_VELC_Int ((uint32_t)(1<<2))
#define | QEI_INTSTAT_DIR_Int ((uint32_t)(1<<3))
#define | QEI_INTSTAT_ERR_Int ((uint32_t)(1<<4))
#define | QEI_INTSTAT_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_INTSTAT_POS0_Int ((uint32_t)(1<<6))
#define | QEI_INTSTAT_POS1_Int ((uint32_t)(1<<7))
#define | QEI_INTSTAT_POS2_Int ((uint32_t)(1<<8))
#define | QEI_INTSTAT_REV_Int ((uint32_t)(1<<9))
#define | QEI_INTSTAT_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_INTSTAT_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_INTSTAT_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_INTSTAT_BITMASK ((uint32_t)(0x1FFF))
#define | QEI_INTSET_INX_Int ((uint32_t)(1<<0))
#define | QEI_INTSET_TIM_Int ((uint32_t)(1<<1))
#define | QEI_INTSET_VELC_Int ((uint32_t)(1<<2))
#define | QEI_INTSET_DIR_Int ((uint32_t)(1<<3))
#define | QEI_INTSET_ERR_Int ((uint32_t)(1<<4))
#define | QEI_INTSET_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_INTSET_POS0_Int ((uint32_t)(1<<6))
#define | QEI_INTSET_POS1_Int ((uint32_t)(1<<7))
#define | QEI_INTSET_POS2_Int ((uint32_t)(1<<8))
#define | QEI_INTSET_REV_Int ((uint32_t)(1<<9))
#define | QEI_INTSET_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_INTSET_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_INTSET_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_INTSET_BITMASK ((uint32_t)(0x1FFF))
#define | QEI_INTCLR_INX_Int ((uint32_t)(1<<0))
#define | QEI_INTCLR_TIM_Int ((uint32_t)(1<<1))
#define | QEI_INTCLR_VELC_Int ((uint32_t)(1<<2))
#define | QEI_INTCLR_DIR_Int ((uint32_t)(1<<3))
#define | QEI_INTCLR_ERR_Int ((uint32_t)(1<<4))
#define | QEI_INTCLR_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_INTCLR_POS0_Int ((uint32_t)(1<<6))
#define | QEI_INTCLR_POS1_Int ((uint32_t)(1<<7))
#define | QEI_INTCLR_POS2_Int ((uint32_t)(1<<8))
#define | QEI_INTCLR_REV_Int ((uint32_t)(1<<9))
#define | QEI_INTCLR_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_INTCLR_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_INTCLR_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_INTCLR_BITMASK ((uint32_t)(0x1FFF))
#define | QEI_INTEN_INX_Int ((uint32_t)(1<<0))
#define | QEI_INTEN_TIM_Int ((uint32_t)(1<<1))
#define | QEI_INTEN_VELC_Int ((uint32_t)(1<<2))
#define | QEI_INTEN_DIR_Int ((uint32_t)(1<<3))
#define | QEI_INTEN_ERR_Int ((uint32_t)(1<<4))
#define | QEI_INTEN_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_INTEN_POS0_Int ((uint32_t)(1<<6))
#define | QEI_INTEN_POS1_Int ((uint32_t)(1<<7))
#define | QEI_INTEN_POS2_Int ((uint32_t)(1<<8))
#define | QEI_INTEN_REV_Int ((uint32_t)(1<<9))
#define | QEI_INTEN_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_INTEN_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_INTEN_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_INTEN_BITMASK ((uint32_t)(0x1FFF))
#define | QEI_IESET_INX_Int ((uint32_t)(1<<0))
#define | QEI_IESET_TIM_Int ((uint32_t)(1<<1))
#define | QEI_IESET_VELC_Int ((uint32_t)(1<<2))
#define | QEI_IESET_DIR_Int ((uint32_t)(1<<3))
#define | QEI_IESET_ERR_Int ((uint32_t)(1<<4))
#define | QEI_IESET_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_IESET_POS0_Int ((uint32_t)(1<<6))
#define | QEI_IESET_POS1_Int ((uint32_t)(1<<7))
#define | QEI_IESET_POS2_Int ((uint32_t)(1<<8))
#define | QEI_IESET_REV_Int ((uint32_t)(1<<9))
#define | QEI_IESET_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_IESET_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_IESET_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_IESET_BITMASK ((uint32_t)(0x1FFF))
#define | QEI_IECLR_INX_Int ((uint32_t)(1<<0))
#define | QEI_IECLR_TIM_Int ((uint32_t)(1<<1))
#define | QEI_IECLR_VELC_Int ((uint32_t)(1<<2))
#define | QEI_IECLR_DIR_Int ((uint32_t)(1<<3))
#define | QEI_IECLR_ERR_Int ((uint32_t)(1<<4))
#define | QEI_IECLR_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_IECLR_POS0_Int ((uint32_t)(1<<6))
#define | QEI_IECLR_POS1_Int ((uint32_t)(1<<7))
#define | QEI_IECLR_POS2_Int ((uint32_t)(1<<8))
#define | QEI_IECLR_REV_Int ((uint32_t)(1<<9))
#define | QEI_IECLR_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_IECLR_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_IECLR_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_IECLR_BITMASK ((uint32_t)(0x1FFF))
#define | PARAM_QEIx(n) ((n==LPC_QEI))
#define | PARAM_QEI_RESET(n)
#define | PARAM_QEI_DIRINV(n) ((n==QEI_DIRINV_NONE) || (n==QEI_DIRINV_CMPL))
#define | PARAM_QEI_SIGNALMODE(n) ((n==QEI_SIGNALMODE_QUAD) || (n==QEI_SIGNALMODE_CLKDIR))
#define | PARAM_QEI_CAPMODE(n) ((n==QEI_CAPMODE_2X) || (n==QEI_CAPMODE_4X))
#define | PARAM_QEI_INVINX(n) ((n==QEI_INVINX_NONE) || (n==QEI_INVINX_EN))
#define | PARAM_QEI_TIMERRELOAD(n) ((n==QEI_TIMERRELOAD_TICKVAL) || (n==QEI_TIMERRELOAD_USVAL))
#define | PARAM_QEI_STATUS(n) ((n==QEI_STATUS_DIR))
#define | PARAM_QEI_COMPPOS_CH(n) ((n==QEI_COMPPOS_CH_0) || (n==QEI_COMPPOS_CH_1) || (n==QEI_COMPPOS_CH_2))
#define | PARAM_QEI_INTFLAG(n)

Define Documentation

#define PARAM_QEI_CAPMODE ( n ) ((n==QEI_CAPMODE_2X) || (n==QEI_CAPMODE_4X))

Definition at line 294 of file lpc17xx_qei.h.

#define PARAM_QEI_COMPPOS_CH ( n ) ((n==QEI_COMPPOS_CH_0) || (n==QEI_COMPPOS_CH_1) || (n==QEI_COMPPOS_CH_2))

Definition at line 306 of file lpc17xx_qei.h.

#define PARAM_QEI_DIRINV ( n ) ((n==QEI_DIRINV_NONE) || (n==QEI_DIRINV_CMPL))

Definition at line 288 of file lpc17xx_qei.h.

#define PARAM_QEI_INTFLAG ( n )
Value:
((n==QEI_INTFLAG_INX_Int) \
|| (n==QEI_INTFLAG_TIM_Int) \
|| (n==QEI_INTFLAG_VELC_Int) \
|| (n==QEI_INTFLAG_DIR_Int) \
|| (n==QEI_INTFLAG_ERR_Int) \
|| (n==QEI_INTFLAG_ENCLK_Int) \
|| (n==QEI_INTFLAG_POS0_Int) \
|| (n==QEI_INTFLAG_POS1_Int) \
|| (n==QEI_INTFLAG_POS2_Int) \
|| (n==QEI_INTFLAG_REV_Int) \
|| (n==QEI_INTFLAG_POS0REV_Int) \
|| (n==QEI_INTFLAG_POS1REV_Int) \
|| (n==QEI_INTFLAG_POS2REV_Int))

Definition at line 309 of file lpc17xx_qei.h.

#define PARAM_QEI_INVINX ( n ) ((n==QEI_INVINX_NONE) || (n==QEI_INVINX_EN))

Definition at line 297 of file lpc17xx_qei.h.

#define PARAM_QEI_RESET ( n )
Value:
((n==QEI_CON_RESP) \
|| (n==QEI_RESET_POSOnIDX) \
|| (n==QEI_RESET_VEL) \
|| (n==QEI_RESET_IDX))

Definition at line 282 of file lpc17xx_qei.h.

#define PARAM_QEI_SIGNALMODE ( n ) ((n==QEI_SIGNALMODE_QUAD) || (n==QEI_SIGNALMODE_CLKDIR))

Definition at line 291 of file lpc17xx_qei.h.

#define PARAM_QEI_STATUS ( n ) ((n==QEI_STATUS_DIR))

Definition at line 303 of file lpc17xx_qei.h.

#define PARAM_QEI_TIMERRELOAD ( n ) ((n==QEI_TIMERRELOAD_TICKVAL) || (n==QEI_TIMERRELOAD_USVAL))

Definition at line 300 of file lpc17xx_qei.h.

#define PARAM_QEIx ( n ) ((n==LPC_QEI))

Definition at line 279 of file lpc17xx_qei.h.

#define QEI_CON_BITMASK ((uint32_t)(0x0F))

QEI Control register bit-mask

Definition at line 123 of file lpc17xx_qei.h.

#define QEI_CON_RESI ((uint32_t)(1<<3))

Reset Index Counter

Definition at line 122 of file lpc17xx_qei.h.

#define QEI_CON_RESP ((uint32_t)(1<<0))

Macro defines for QEI Control register Reset position counter

Definition at line 119 of file lpc17xx_qei.h.

#define QEI_CON_RESPI ((uint32_t)(1<<1))

Reset Posistion Counter on Index

Definition at line 120 of file lpc17xx_qei.h.

#define QEI_CON_RESV ((uint32_t)(1<<2))

Reset Velocity

Definition at line 121 of file lpc17xx_qei.h.

#define QEI_CONF_BITMASK ((uint32_t)(0x0F))

QEI Configuration register bit-mask

Definition at line 132 of file lpc17xx_qei.h.

#define QEI_CONF_CAPMODE ((uint32_t)(1<<2))

Capture mode

Definition at line 130 of file lpc17xx_qei.h.

#define QEI_CONF_DIRINV ((uint32_t)(1<<0))

Macro defines for QEI Configuration register Direction Invert

Definition at line 128 of file lpc17xx_qei.h.

#define QEI_CONF_INVINX ((uint32_t)(1<<3))

Invert index

Definition at line 131 of file lpc17xx_qei.h.

#define QEI_CONF_SIGMODE ((uint32_t)(1<<1))

Signal mode

Definition at line 129 of file lpc17xx_qei.h.

#define QEI_IECLR_BITMASK ((uint32_t)(0x1FFF))

QEI Interrupt Enable Clear register bit-mask

Definition at line 274 of file lpc17xx_qei.h.

#define QEI_IECLR_DIR_Int ((uint32_t)(1<<3))

Clear Enabled Interrupt Bit Indicates that a change of direction was detected

Definition at line 260 of file lpc17xx_qei.h.

#define QEI_IECLR_ENCLK_Int ((uint32_t)(1<<5))

Clear Enabled Interrupt Bit Indicates that and encoder clock pulse was detected

Definition at line 262 of file lpc17xx_qei.h.

#define QEI_IECLR_ERR_Int ((uint32_t)(1<<4))

Clear Enabled Interrupt Bit Indicates that an encoder phase error was detected

Definition at line 261 of file lpc17xx_qei.h.

#define QEI_IECLR_INX_Int ((uint32_t)(1<<0))

Macro defines for QEI Interrupt Enable Clear register Clear Enabled Interrupt Bit Indicates that an index pulse was detected

Definition at line 257 of file lpc17xx_qei.h.

#define QEI_IECLR_POS0_Int ((uint32_t)(1<<6))

Clear Enabled Interrupt Bit Indicates that the position 0 compare value is equal to the current position

Definition at line 263 of file lpc17xx_qei.h.

#define QEI_IECLR_POS0REV_Int ((uint32_t)(1<<10))

Clear Enabled Interrupt Bit that combined position 0 and revolution count interrupt

Definition at line 271 of file lpc17xx_qei.h.

#define QEI_IECLR_POS1_Int ((uint32_t)(1<<7))

Clear Enabled Interrupt Bit Indicates that the position 1compare value is equal to the current position

Definition at line 265 of file lpc17xx_qei.h.

#define QEI_IECLR_POS1REV_Int ((uint32_t)(1<<11))

Clear Enabled Interrupt Bit that Combined position 1 and revolution count interrupt

Definition at line 272 of file lpc17xx_qei.h.

#define QEI_IECLR_POS2_Int ((uint32_t)(1<<8))

Clear Enabled Interrupt Bit Indicates that the position 2 compare value is equal to the current position

Definition at line 267 of file lpc17xx_qei.h.

#define QEI_IECLR_POS2REV_Int ((uint32_t)(1<<12))

Clear Enabled Interrupt Bit that Combined position 2 and revolution count interrupt

Definition at line 273 of file lpc17xx_qei.h.

#define QEI_IECLR_REV_Int ((uint32_t)(1<<9))

Clear Enabled Interrupt Bit Indicates that the index compare value is equal to the current index count

Definition at line 269 of file lpc17xx_qei.h.

#define QEI_IECLR_TIM_Int ((uint32_t)(1<<1))

Clear Enabled Interrupt Bit Indicates that a velocity timer overflow occurred

Definition at line 258 of file lpc17xx_qei.h.

#define QEI_IECLR_VELC_Int ((uint32_t)(1<<2))

Clear Enabled Interrupt Bit Indicates that capture velocity is less than compare velocity

Definition at line 259 of file lpc17xx_qei.h.

#define QEI_IESET_BITMASK ((uint32_t)(0x1FFF))

QEI Interrupt Enable Set register bit-mask

Definition at line 252 of file lpc17xx_qei.h.

#define QEI_IESET_DIR_Int ((uint32_t)(1<<3))

Set Enable Interrupt Bit Indicates that a change of direction was detected

Definition at line 238 of file lpc17xx_qei.h.

#define QEI_IESET_ENCLK_Int ((uint32_t)(1<<5))

Set Enable Interrupt Bit Indicates that and encoder clock pulse was detected

Definition at line 240 of file lpc17xx_qei.h.

#define QEI_IESET_ERR_Int ((uint32_t)(1<<4))

Set Enable Interrupt Bit Indicates that an encoder phase error was detected

Definition at line 239 of file lpc17xx_qei.h.

#define QEI_IESET_INX_Int ((uint32_t)(1<<0))

Macro defines for QEI Interrupt Enable Set register Set Enable Interrupt Bit Indicates that an index pulse was detected

Definition at line 235 of file lpc17xx_qei.h.

#define QEI_IESET_POS0_Int ((uint32_t)(1<<6))

Set Enable Interrupt Bit Indicates that the position 0 compare value is equal to the current position

Definition at line 241 of file lpc17xx_qei.h.

#define QEI_IESET_POS0REV_Int ((uint32_t)(1<<10))

Set Enable Interrupt Bit that combined position 0 and revolution count interrupt

Definition at line 249 of file lpc17xx_qei.h.

#define QEI_IESET_POS1_Int ((uint32_t)(1<<7))

Set Enable Interrupt Bit Indicates that the position 1compare value is equal to the current position

Definition at line 243 of file lpc17xx_qei.h.

#define QEI_IESET_POS1REV_Int ((uint32_t)(1<<11))

Set Enable Interrupt Bit that Combined position 1 and revolution count interrupt

Definition at line 250 of file lpc17xx_qei.h.

#define QEI_IESET_POS2_Int ((uint32_t)(1<<8))

Set Enable Interrupt Bit Indicates that the position 2 compare value is equal to the current position

Definition at line 245 of file lpc17xx_qei.h.

#define QEI_IESET_POS2REV_Int ((uint32_t)(1<<12))

Set Enable Interrupt Bit that Combined position 2 and revolution count interrupt

Definition at line 251 of file lpc17xx_qei.h.

#define QEI_IESET_REV_Int ((uint32_t)(1<<9))

Set Enable Interrupt Bit Indicates that the index compare value is equal to the current index count

Definition at line 247 of file lpc17xx_qei.h.

#define QEI_IESET_TIM_Int ((uint32_t)(1<<1))

Set Enable Interrupt Bit Indicates that a velocity timer overflow occurred

Definition at line 236 of file lpc17xx_qei.h.

#define QEI_IESET_VELC_Int ((uint32_t)(1<<2))

Set Enable Interrupt Bit Indicates that capture velocity is less than compare velocity

Definition at line 237 of file lpc17xx_qei.h.

#define QEI_INTCLR_BITMASK ((uint32_t)(0x1FFF))

QEI Interrupt Clear register bit-mask

Definition at line 208 of file lpc17xx_qei.h.

#define QEI_INTCLR_DIR_Int ((uint32_t)(1<<3))

Clear Bit Indicates that a change of direction was detected

Definition at line 194 of file lpc17xx_qei.h.

#define QEI_INTCLR_ENCLK_Int ((uint32_t)(1<<5))

Clear Bit Indicates that and encoder clock pulse was detected

Definition at line 196 of file lpc17xx_qei.h.

#define QEI_INTCLR_ERR_Int ((uint32_t)(1<<4))

Clear Bit Indicates that an encoder phase error was detected

Definition at line 195 of file lpc17xx_qei.h.

#define QEI_INTCLR_INX_Int ((uint32_t)(1<<0))

Macro defines for QEI Interrupt Clear register Clear Bit Indicates that an index pulse was detected

Definition at line 191 of file lpc17xx_qei.h.

#define QEI_INTCLR_POS0_Int ((uint32_t)(1<<6))

Clear Bit Indicates that the position 0 compare value is equal to the current position

Definition at line 197 of file lpc17xx_qei.h.

#define QEI_INTCLR_POS0REV_Int ((uint32_t)(1<<10))

Clear Bit that combined position 0 and revolution count interrupt

Definition at line 205 of file lpc17xx_qei.h.

#define QEI_INTCLR_POS1_Int ((uint32_t)(1<<7))

Clear Bit Indicates that the position 1compare value is equal to the current position

Definition at line 199 of file lpc17xx_qei.h.

#define QEI_INTCLR_POS1REV_Int ((uint32_t)(1<<11))

Clear Bit that Combined position 1 and revolution count interrupt

Definition at line 206 of file lpc17xx_qei.h.

#define QEI_INTCLR_POS2_Int ((uint32_t)(1<<8))

Clear Bit Indicates that the position 2 compare value is equal to the current position

Definition at line 201 of file lpc17xx_qei.h.

#define QEI_INTCLR_POS2REV_Int ((uint32_t)(1<<12))

Clear Bit that Combined position 2 and revolution count interrupt

Definition at line 207 of file lpc17xx_qei.h.

#define QEI_INTCLR_REV_Int ((uint32_t)(1<<9))

Clear Bit Indicates that the index compare value is equal to the current index count

Definition at line 203 of file lpc17xx_qei.h.

#define QEI_INTCLR_TIM_Int ((uint32_t)(1<<1))

Clear Bit Indicates that a velocity timer overflow occurred

Definition at line 192 of file lpc17xx_qei.h.

#define QEI_INTCLR_VELC_Int ((uint32_t)(1<<2))

Clear Bit Indicates that capture velocity is less than compare velocity

Definition at line 193 of file lpc17xx_qei.h.

#define QEI_INTEN_BITMASK ((uint32_t)(0x1FFF))

QEI Interrupt Enable register bit-mask

Definition at line 230 of file lpc17xx_qei.h.

#define QEI_INTEN_DIR_Int ((uint32_t)(1<<3))

Enabled Interrupt Bit Indicates that a change of direction was detected

Definition at line 216 of file lpc17xx_qei.h.

#define QEI_INTEN_ENCLK_Int ((uint32_t)(1<<5))

Enabled Interrupt Bit Indicates that and encoder clock pulse was detected

Definition at line 218 of file lpc17xx_qei.h.

#define QEI_INTEN_ERR_Int ((uint32_t)(1<<4))

Enabled Interrupt Bit Indicates that an encoder phase error was detected

Definition at line 217 of file lpc17xx_qei.h.

#define QEI_INTEN_INX_Int ((uint32_t)(1<<0))

Macro defines for QEI Interrupt Enable register Enabled Interrupt Bit Indicates that an index pulse was detected

Definition at line 213 of file lpc17xx_qei.h.

#define QEI_INTEN_POS0_Int ((uint32_t)(1<<6))

Enabled Interrupt Bit Indicates that the position 0 compare value is equal to the current position

Definition at line 219 of file lpc17xx_qei.h.

#define QEI_INTEN_POS0REV_Int ((uint32_t)(1<<10))

Enabled Interrupt Bit that combined position 0 and revolution count interrupt

Definition at line 227 of file lpc17xx_qei.h.

#define QEI_INTEN_POS1_Int ((uint32_t)(1<<7))

Enabled Interrupt Bit Indicates that the position 1compare value is equal to the current position

Definition at line 221 of file lpc17xx_qei.h.

#define QEI_INTEN_POS1REV_Int ((uint32_t)(1<<11))

Enabled Interrupt Bit that Combined position 1 and revolution count interrupt

Definition at line 228 of file lpc17xx_qei.h.

#define QEI_INTEN_POS2_Int ((uint32_t)(1<<8))

Enabled Interrupt Bit Indicates that the position 2 compare value is equal to the current position

Definition at line 223 of file lpc17xx_qei.h.

#define QEI_INTEN_POS2REV_Int ((uint32_t)(1<<12))

Enabled Interrupt Bit that Combined position 2 and revolution count interrupt

Definition at line 229 of file lpc17xx_qei.h.

#define QEI_INTEN_REV_Int ((uint32_t)(1<<9))

Enabled Interrupt Bit Indicates that the index compare value is equal to the current index count

Definition at line 225 of file lpc17xx_qei.h.

#define QEI_INTEN_TIM_Int ((uint32_t)(1<<1))

Enabled Interrupt Bit Indicates that a velocity timer overflow occurred

Definition at line 214 of file lpc17xx_qei.h.

#define QEI_INTEN_VELC_Int ((uint32_t)(1<<2))

Enabled Interrupt Bit Indicates that capture velocity is less than compare velocity

Definition at line 215 of file lpc17xx_qei.h.

#define QEI_INTSET_BITMASK ((uint32_t)(0x1FFF))

QEI Interrupt Set register bit-mask

Definition at line 186 of file lpc17xx_qei.h.

#define QEI_INTSET_DIR_Int ((uint32_t)(1<<3))

Set Bit Indicates that a change of direction was detected

Definition at line 172 of file lpc17xx_qei.h.

#define QEI_INTSET_ENCLK_Int ((uint32_t)(1<<5))

Set Bit Indicates that and encoder clock pulse was detected

Definition at line 174 of file lpc17xx_qei.h.

#define QEI_INTSET_ERR_Int ((uint32_t)(1<<4))

Set Bit Indicates that an encoder phase error was detected

Definition at line 173 of file lpc17xx_qei.h.

#define QEI_INTSET_INX_Int ((uint32_t)(1<<0))

Macro defines for QEI Interrupt Set register Set Bit Indicates that an index pulse was detected

Definition at line 169 of file lpc17xx_qei.h.

#define QEI_INTSET_POS0_Int ((uint32_t)(1<<6))

Set Bit Indicates that the position 0 compare value is equal to the current position

Definition at line 175 of file lpc17xx_qei.h.

#define QEI_INTSET_POS0REV_Int ((uint32_t)(1<<10))

Set Bit that combined position 0 and revolution count interrupt

Definition at line 183 of file lpc17xx_qei.h.

#define QEI_INTSET_POS1_Int ((uint32_t)(1<<7))

Set Bit Indicates that the position 1compare value is equal to the current position

Definition at line 177 of file lpc17xx_qei.h.

#define QEI_INTSET_POS1REV_Int ((uint32_t)(1<<11))

Set Bit that Combined position 1 and revolution count interrupt

Definition at line 184 of file lpc17xx_qei.h.

#define QEI_INTSET_POS2_Int ((uint32_t)(1<<8))

Set Bit Indicates that the position 2 compare value is equal to the current position

Definition at line 179 of file lpc17xx_qei.h.

#define QEI_INTSET_POS2REV_Int ((uint32_t)(1<<12))

Set Bit that Combined position 2 and revolution count interrupt

Definition at line 185 of file lpc17xx_qei.h.

#define QEI_INTSET_REV_Int ((uint32_t)(1<<9))

Set Bit Indicates that the index compare value is equal to the current index count

Definition at line 181 of file lpc17xx_qei.h.

#define QEI_INTSET_TIM_Int ((uint32_t)(1<<1))

Set Bit Indicates that a velocity timer overflow occurred

Definition at line 170 of file lpc17xx_qei.h.

#define QEI_INTSET_VELC_Int ((uint32_t)(1<<2))

Set Bit Indicates that capture velocity is less than compare velocity

Definition at line 171 of file lpc17xx_qei.h.

#define QEI_INTSTAT_BITMASK ((uint32_t)(0x1FFF))

QEI Interrupt Status register bit-mask

Definition at line 164 of file lpc17xx_qei.h.

#define QEI_INTSTAT_DIR_Int ((uint32_t)(1<<3))

Indicates that a change of direction was detected

Definition at line 147 of file lpc17xx_qei.h.

#define QEI_INTSTAT_ENCLK_Int ((uint32_t)(1<<5))

Indicates that and encoder clock pulse was detected

Definition at line 149 of file lpc17xx_qei.h.

#define QEI_INTSTAT_ERR_Int ((uint32_t)(1<<4))

Indicates that an encoder phase error was detected

Definition at line 148 of file lpc17xx_qei.h.

#define QEI_INTSTAT_INX_Int ((uint32_t)(1<<0))

Macro defines for QEI Interrupt Status register Indicates that an index pulse was detected

Definition at line 144 of file lpc17xx_qei.h.

#define QEI_INTSTAT_POS0_Int ((uint32_t)(1<<6))

Indicates that the position 0 compare value is equal to the current position

Definition at line 150 of file lpc17xx_qei.h.

#define QEI_INTSTAT_POS0REV_Int ((uint32_t)(1<<10))

Combined position 0 and revolution count interrupt. Set when both the POS0_Int bit is set and the REV_Int is set

Definition at line 158 of file lpc17xx_qei.h.

#define QEI_INTSTAT_POS1_Int ((uint32_t)(1<<7))

Indicates that the position 1compare value is equal to the current position

Definition at line 152 of file lpc17xx_qei.h.

#define QEI_INTSTAT_POS1REV_Int ((uint32_t)(1<<11))

Combined position 1 and revolution count interrupt. Set when both the POS1_Int bit is set and the REV_Int is set

Definition at line 160 of file lpc17xx_qei.h.

#define QEI_INTSTAT_POS2_Int ((uint32_t)(1<<8))

Indicates that the position 2 compare value is equal to the current position

Definition at line 154 of file lpc17xx_qei.h.

#define QEI_INTSTAT_POS2REV_Int ((uint32_t)(1<<12))

Combined position 2 and revolution count interrupt. Set when both the POS2_Int bit is set and the REV_Int is set

Definition at line 162 of file lpc17xx_qei.h.

#define QEI_INTSTAT_REV_Int ((uint32_t)(1<<9))

Indicates that the index compare value is equal to the current index count

Definition at line 156 of file lpc17xx_qei.h.

#define QEI_INTSTAT_TIM_Int ((uint32_t)(1<<1))

Indicates that a velocity timer overflow occurred

Definition at line 145 of file lpc17xx_qei.h.

#define QEI_INTSTAT_VELC_Int ((uint32_t)(1<<2))

Indicates that capture velocity is less than compare velocity

Definition at line 146 of file lpc17xx_qei.h.

#define QEI_STAT_BITMASK ((uint32_t)(1<<0))

QEI status register bit-mask

Definition at line 138 of file lpc17xx_qei.h.

#define QEI_STAT_DIR ((uint32_t)(1<<0))

Macro defines for QEI Status register Direction bit

Definition at line 137 of file lpc17xx_qei.h.

Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI Public Types

Data Structures
QEI Public Types
QEI (Quadrature Encoder Interface)

Data Structures

struct | QEI_CFG_Type
QEI Configuration structure type definition. More...
struct | QEI_RELOADCFG_Type
Timer Reload Configuration structure type definition. More...
Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI Public Functions

Functions
QEI Public Functions
QEI (Quadrature Encoder Interface)

Functions

void | QEI_Reset (LPC_QEI_TypeDef *QEIx, uint32_t ulResetType)
Resets value for each type of QEI value, such as velocity, counter, position, etc..
void | QEI_Init (LPC_QEI_TypeDef *QEIx, QEI_CFG_Type *QEI_ConfigStruct)
Initializes the QEI peripheral according to the specified parameters in the QEI_ConfigStruct.
void | QEI_ConfigStructInit (QEI_CFG_Type *QIE_InitStruct)
Fills each QIE_InitStruct member with its default value:
void | QEI_DeInit (LPC_QEI_TypeDef *QEIx)
De-initializes the QEI peripheral registers to their default reset values.
FlagStatus | QEI_GetStatus (LPC_QEI_TypeDef *QEIx, uint32_t ulFlagType)
Check whether if specified flag status is set or not.
uint32_t | QEI_GetPosition (LPC_QEI_TypeDef *QEIx)
Get current position value in QEI peripheral.
void | QEI_SetMaxPosition (LPC_QEI_TypeDef *QEIx, uint32_t ulMaxPos)
Set max position value for QEI peripheral.
void | QEI_SetPositionComp (LPC_QEI_TypeDef *QEIx, uint8_t bPosCompCh, uint32_t ulPosComp)
Set position compare value for QEI peripheral.
uint32_t | QEI_GetIndex (LPC_QEI_TypeDef *QEIx)
Get current index counter of QEI peripheral.
void | QEI_SetIndexComp (LPC_QEI_TypeDef *QEIx, uint32_t ulIndexComp)
Set value for index compare in QEI peripheral.
void | QEI_SetTimerReload (LPC_QEI_TypeDef *QEIx, QEI_RELOADCFG_Type *QEIReloadStruct)
Set timer reload value for QEI peripheral. When the velocity timer is over-flow, the value that set for Timer Reload register will be loaded into the velocity timer for next period. The calculated velocity in RPM therefore will be affect by this value.
uint32_t | QEI_GetTimer (LPC_QEI_TypeDef *QEIx)
Get current timer counter in QEI peripheral.
uint32_t | QEI_GetVelocity (LPC_QEI_TypeDef *QEIx)
Get current velocity pulse counter in current time period.
uint32_t | QEI_GetVelocityCap (LPC_QEI_TypeDef *QEIx)
Get the most recently measured velocity of the QEI. When the Velocity timer in QEI is over-flow, the current velocity value will be loaded into Velocity Capture register.
void | QEI_SetVelocityComp (LPC_QEI_TypeDef *QEIx, uint32_t ulVelComp)
Set Velocity Compare value for QEI peripheral.
void | QEI_SetDigiFilter (LPC_QEI_TypeDef *QEIx, uint32_t ulSamplingPulse)
Set value of sampling count for the digital filter in QEI peripheral.
FlagStatus | QEI_GetIntStatus (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
Check whether if specified interrupt flag status in QEI peripheral is set or not.
void | QEI_IntCmd (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType, FunctionalState NewState)
Enable/Disable specified interrupt in QEI peripheral.
void | QEI_IntSet (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
Sets (forces) specified interrupt in QEI peripheral.
void | QEI_IntClear (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
Clear (force) specified interrupt (pending) in QEI peripheral.
uint32_t | QEI_CalculateRPM (LPC_QEI_TypeDef *QEIx, uint32_t ulVelCapValue, uint32_t ulPPR)
Calculates the actual velocity in RPM passed via velocity capture value and Pulse Per Round (of the encoder) value parameter input.

Function Documentation

uint32_t QEI_CalculateRPM | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulVelCapValue,
 |  | uint32_t | ulPPR
 | ) |  |

Calculates the actual velocity in RPM passed via velocity capture value and Pulse Per Round (of the encoder) value parameter input.

Parameters:
[in] | QEIx | QEI peripheral, should be LPC_QEI
[in] | ulVelCapValue | Velocity capture input value that can be got from QEI_GetVelocityCap() function
[in] | ulPPR | Pulse per round of encoder
Returns:
The actual value of velocity in RPM (Round per minute)

Definition at line 480 of file lpc17xx_qei.c.

void QEI_ConfigStructInit ( QEI_CFG_Type * QIE_InitStruct )

Fills each QIE_InitStruct member with its default value:

  • DirectionInvert = QEI_DIRINV_NONE
  • SignalMode = QEI_SIGNALMODE_QUAD
  • CaptureMode = QEI_CAPMODE_4X
  • InvertIndex = QEI_INVINX_NONE
    Parameters:
    [in] QIE_InitStruct Pointer to a QEI_CFG_Type structure which will be initialized.
    Returns:
    None

Definition at line 160 of file lpc17xx_qei.c.

void QEI_DeInit ( LPC_QEI_TypeDef * QEIx )

De-initializes the QEI peripheral registers to their default reset values.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
Returns:
None

Definition at line 141 of file lpc17xx_qei.c.

uint32_t QEI_GetIndex ( LPC_QEI_TypeDef * QEIx )

Get current index counter of QEI peripheral.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
Returns:
Current value of QEI index counter

Definition at line 232 of file lpc17xx_qei.c.

FlagStatus QEI_GetIntStatus | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulIntType
 | ) |  |

Check whether if specified interrupt flag status in QEI peripheral is set or not.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
[in] ulIntType Interrupt Flag Status type, should be:
  • QEI_INTFLAG_INX_Int: index pulse was detected interrupt
  • QEI_INTFLAG_TIM_Int: Velocity timer over flow interrupt
  • QEI_INTFLAG_VELC_Int: Capture velocity is less than compare interrupt
  • QEI_INTFLAG_DIR_Int: Change of direction interrupt
  • QEI_INTFLAG_ERR_Int: An encoder phase error interrupt
  • QEI_INTFLAG_ENCLK_Int: An encoder clock pulse was detected interrupt
  • QEI_INTFLAG_POS0_Int: position 0 compare value is equal to the current position interrupt
  • QEI_INTFLAG_POS1_Int: position 1 compare value is equal to the current position interrupt
  • QEI_INTFLAG_POS2_Int: position 2 compare value is equal to the current position interrupt
  • QEI_INTFLAG_REV_Int: Index compare value is equal to the current index count interrupt
  • QEI_INTFLAG_POS0REV_Int: Combined position 0 and revolution count interrupt
  • QEI_INTFLAG_POS1REV_Int: Combined position 1 and revolution count interrupt
  • QEI_INTFLAG_POS2REV_Int: Combined position 2 and revolution count interrupt
Returns:
New State of specified interrupt flag status (SET or RESET)

Definition at line 359 of file lpc17xx_qei.c.

uint32_t QEI_GetPosition ( LPC_QEI_TypeDef * QEIx )

Get current position value in QEI peripheral.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
Returns:
Current position value of QEI peripheral

Definition at line 188 of file lpc17xx_qei.c.

FlagStatus QEI_GetStatus | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulFlagType
 | ) |  |

Check whether if specified flag status is set or not.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
[in] ulFlagType Status Flag Type, should be one of the following:
  • QEI_STATUS_DIR: Direction Status
Returns:
New Status of this status flag (SET or RESET)

Definition at line 176 of file lpc17xx_qei.c.

uint32_t QEI_GetTimer ( LPC_QEI_TypeDef * QEIx )

Get current timer counter in QEI peripheral.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
Returns:
Current timer counter in QEI peripheral

Definition at line 280 of file lpc17xx_qei.c.

uint32_t QEI_GetVelocity ( LPC_QEI_TypeDef * QEIx )

Get current velocity pulse counter in current time period.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
Returns:
Current velocity pulse counter value

Definition at line 291 of file lpc17xx_qei.c.

uint32_t QEI_GetVelocityCap ( LPC_QEI_TypeDef * QEIx )

Get the most recently measured velocity of the QEI. When the Velocity timer in QEI is over-flow, the current velocity value will be loaded into Velocity Capture register.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
Returns:
The most recently measured velocity value

Definition at line 304 of file lpc17xx_qei.c.

void QEI_Init | ( | LPC_QEI_TypeDef * | QEIx,
 |  | QEI_CFG_Type * | QEI_ConfigStruct
 | ) |  |

Initializes the QEI peripheral according to the specified parameters in the QEI_ConfigStruct.

Parameters:
[in] | QEIx | QEI peripheral, should be LPC_QEI
[in] | QEI_ConfigStruct | Pointer to a QEI_CFG_Type structure that contains the configuration information for the specified QEI peripheral
Returns:
None

Definition at line 100 of file lpc17xx_qei.c.

void QEI_IntClear | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulIntType
 | ) |  |

Clear (force) specified interrupt (pending) in QEI peripheral.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
[in] ulIntType Interrupt Flag Status type, should be:
  • QEI_INTFLAG_INX_Int: index pulse was detected interrupt
  • QEI_INTFLAG_TIM_Int: Velocity timer over flow interrupt
  • QEI_INTFLAG_VELC_Int: Capture velocity is less than compare interrupt
  • QEI_INTFLAG_DIR_Int: Change of direction interrupt
  • QEI_INTFLAG_ERR_Int: An encoder phase error interrupt
  • QEI_INTFLAG_ENCLK_Int: An encoder clock pulse was detected interrupt
  • QEI_INTFLAG_POS0_Int: position 0 compare value is equal to the current position interrupt
  • QEI_INTFLAG_POS1_Int: position 1 compare value is equal to the current position interrupt
  • QEI_INTFLAG_POS2_Int: position 2 compare value is equal to the current position interrupt
  • QEI_INTFLAG_REV_Int: Index compare value is equal to the current index count interrupt
  • QEI_INTFLAG_POS0REV_Int: Combined position 0 and revolution count interrupt
  • QEI_INTFLAG_POS1REV_Int: Combined position 1 and revolution count interrupt
  • QEI_INTFLAG_POS2REV_Int: Combined position 2 and revolution count interrupt
Returns:
None

Definition at line 461 of file lpc17xx_qei.c.

void QEI_IntCmd | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulIntType,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable specified interrupt in QEI peripheral.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
[in] ulIntType Interrupt Flag Status type, should be:
  • QEI_INTFLAG_INX_Int: index pulse was detected interrupt
  • QEI_INTFLAG_TIM_Int: Velocity timer over flow interrupt
  • QEI_INTFLAG_VELC_Int: Capture velocity is less than compare interrupt
  • QEI_INTFLAG_DIR_Int: Change of direction interrupt
  • QEI_INTFLAG_ERR_Int: An encoder phase error interrupt
    • QEI_INTFLAG_ENCLK_Int: An encoder clock pulse was detected interrupt
    • QEI_INTFLAG_POS0_Int: position 0 compare value is equal to the current position interrupt
    • QEI_INTFLAG_POS1_Int: position 1 compare value is equal to the current position interrupt
    • QEI_INTFLAG_POS2_Int: position 2 compare value is equal to the current position interrupt
    • QEI_INTFLAG_REV_Int: Index compare value is equal to the current index count interrupt
    • QEI_INTFLAG_POS0REV_Int: Combined position 0 and revolution count interrupt
    • QEI_INTFLAG_POS1REV_Int: Combined position 1 and revolution count interrupt
    • QEI_INTFLAG_POS2REV_Int: Combined position 2 and revolution count interrupt
      Parameters:
      [in] NewState New function state, should be:
    • DISABLE
    • ENABLE
      Returns:
      None

Definition at line 393 of file lpc17xx_qei.c.

void QEI_IntSet | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulIntType
 | ) |  |

Sets (forces) specified interrupt in QEI peripheral.

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
[in] ulIntType Interrupt Flag Status type, should be:
  • QEI_INTFLAG_INX_Int: index pulse was detected interrupt
  • QEI_INTFLAG_TIM_Int: Velocity timer over flow interrupt
  • QEI_INTFLAG_VELC_Int: Capture velocity is less than compare interrupt
  • QEI_INTFLAG_DIR_Int: Change of direction interrupt
  • QEI_INTFLAG_ERR_Int: An encoder phase error interrupt
  • QEI_INTFLAG_ENCLK_Int: An encoder clock pulse was detected interrupt
  • QEI_INTFLAG_POS0_Int: position 0 compare value is equal to the current position interrupt
  • QEI_INTFLAG_POS1_Int: position 1 compare value is equal to the current position interrupt
  • QEI_INTFLAG_POS2_Int: position 2 compare value is equal to the current position interrupt
  • QEI_INTFLAG_REV_Int: Index compare value is equal to the current index count interrupt
  • QEI_INTFLAG_POS0REV_Int: Combined position 0 and revolution count interrupt
  • QEI_INTFLAG_POS1REV_Int: Combined position 1 and revolution count interrupt
  • QEI_INTFLAG_POS2REV_Int: Combined position 2 and revolution count interrupt
Returns:
None

Definition at line 430 of file lpc17xx_qei.c.

void QEI_Reset | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulResetType
 | ) |  |

Resets value for each type of QEI value, such as velocity, counter, position, etc..

Parameters:
[in] QEIx QEI peripheral, should be LPC_QEI
[in] ulResetType QEI Reset Type, should be one of the following:
  • QEI_RESET_POS: Reset Position Counter
  • QEI_RESET_POSOnIDX: Reset Position Counter on Index signal
  • QEI_RESET_VEL: Reset Velocity
  • QEI_RESET_IDX: Reset Index Counter
Returns:
None

Definition at line 83 of file lpc17xx_qei.c.

void QEI_SetDigiFilter | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulSamplingPulse
 | ) |  |

Set value of sampling count for the digital filter in QEI peripheral.

Parameters:
[in] | QEIx | QEI peripheral, should be LPC_QEI
[in] | ulSamplingPulse | Value of sampling count to set
Returns:
None

Definition at line 329 of file lpc17xx_qei.c.

void QEI_SetIndexComp | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulIndexComp
 | ) |  |

Set value for index compare in QEI peripheral.

Parameters:
[in] | QEIx | QEI peripheral, should be LPC_QEI
[in] | ulIndexComp | Compare Index Value to set
Returns:
None

Definition at line 244 of file lpc17xx_qei.c.

void QEI_SetMaxPosition | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulMaxPos
 | ) |  |

Set max position value for QEI peripheral.

Parameters:
[in] | QEIx | QEI peripheral, should be LPC_QEI
[in] | ulMaxPos | Max position value to set
Returns:
None

Definition at line 200 of file lpc17xx_qei.c.

void QEI_SetPositionComp | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint8_t | bPosCompCh,
 |  | uint32_t | ulPosComp
 | ) |  |

Set position compare value for QEI peripheral.

Parameters:
[in] | QEIx | QEI peripheral, should be LPC_QEI
[in] bPosCompCh Compare Position channel, should be:
  • QEI_COMPPOS_CH_0: QEI compare position channel 0
  • QEI_COMPPOS_CH_1: QEI compare position channel 1
  • QEI_COMPPOS_CH_2: QEI compare position channel 2
[in] | ulPosComp | Compare Position value to set
Returns:
None

Definition at line 216 of file lpc17xx_qei.c.

void QEI_SetTimerReload | ( | LPC_QEI_TypeDef * | QEIx,
 |  | QEI_RELOADCFG_Type * | QEIReloadStruct
 | ) |  |

Set timer reload value for QEI peripheral. When the velocity timer is over-flow, the value that set for Timer Reload register will be loaded into the velocity timer for next period. The calculated velocity in RPM therefore will be affect by this value.

Parameters:
[in] | QEIx | QEI peripheral, should be LPC_QEI
[in] | QEIReloadStruct | QEI reload structure
Returns:
None

Definition at line 259 of file lpc17xx_qei.c.

void QEI_SetVelocityComp | ( | LPC_QEI_TypeDef * | QEIx,
 |  | uint32_t | ulVelComp
 | ) |  |

Set Velocity Compare value for QEI peripheral.

Parameters:
[in] | QEIx | QEI peripheral, should be LPC_QEI
[in] | ulVelComp | Compare Velocity value to set
Returns:
None

Definition at line 316 of file lpc17xx_qei.c.

Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI Private Types

Data Structures
QEI Private Types
QEI (Quadrature Encoder Interface)

Data Structures

union QEI_CFGOPT_Type
QEI configuration union type definition. More...
Generated on Mon Nov 28 2011 11:15:18 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RIT (Repetitive Interrupt Timer)

Modules
RIT (Repetitive Interrupt Timer)
LPC1700CMSIS Firmware Library

Modules

RIT Private Macros
RIT Public Functions
Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RIT Private Macros

Defines
RIT Private Macros
RIT (Repetitive Interrupt Timer)

Defines

#define | RIT_CTRL_INTEN ((uint32_t) (1))
#define | RIT_CTRL_ENCLR ((uint32_t) _BIT(1))
#define | RIT_CTRL_ENBR ((uint32_t) _BIT(2))
#define | RIT_CTRL_TEN ((uint32_t) _BIT(3))
#define | PARAM_RITx(n) (((uint32_t *)n)==((uint32_t *)LPC_RIT))

Define Documentation

#define PARAM_RITx ( n ) (((uint32_t *)n)==((uint32_t *)LPC_RIT))

Macro to determine if it is valid RIT peripheral

Definition at line 66 of file lpc17xx_rit.h.

#define RIT_CTRL_ENBR ((uint32_t) _BIT(2))

Set timer enable on debug

Definition at line 61 of file lpc17xx_rit.h.

#define RIT_CTRL_ENCLR ((uint32_t) _BIT(1))

Set timer enable clear to 0 when the counter value equals the masked compare value

Definition at line 59 of file lpc17xx_rit.h.

#define RIT_CTRL_INTEN ((uint32_t) (1))

Macro defines for RIT control register Set interrupt flag when the counter value equals the masked compare value

Definition at line 57 of file lpc17xx_rit.h.

#define RIT_CTRL_TEN ((uint32_t) _BIT(3))

Set timer enable

Definition at line 63 of file lpc17xx_rit.h.

Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RIT Public Functions

Functions
RIT Public Functions
RIT (Repetitive Interrupt Timer)

Functions

void | RIT_Init (LPC_RIT_TypeDef *RITx)
void | RIT_DeInit (LPC_RIT_TypeDef *RITx)
void | RIT_TimerConfig (LPC_RIT_TypeDef *RITx, uint32_t time_interval)
void | RIT_TimerClearCmd (LPC_RIT_TypeDef *RITx, FunctionalState NewState)
void | RIT_Cmd (LPC_RIT_TypeDef *RITx, FunctionalState NewState)
void | RIT_TimerDebugCmd (LPC_RIT_TypeDef *RITx, FunctionalState NewState)
IntStatus | RIT_GetIntStatus (LPC_RIT_TypeDef *RITx)

Function Documentation

void RIT_Cmd | ( | LPC_RIT_TypeDef * | RITx,
 |  | FunctionalState | NewState
 | ) |  |

Definition at line 128 of file lpc17xx_rit.c.

void RIT_DeInit ( LPC_RIT_TypeDef * RITx )

Definition at line 78 of file lpc17xx_rit.c.

IntStatus RIT_GetIntStatus ( LPC_RIT_TypeDef * RITx )

Definition at line 172 of file lpc17xx_rit.c.

void RIT_Init ( LPC_RIT_TypeDef * RITx )

Definition at line 59 of file lpc17xx_rit.c.

void RIT_TimerClearCmd | ( | LPC_RIT_TypeDef * | RITx,
 |  | FunctionalState | NewState
 | ) |  |
void RIT_TimerConfig | ( | LPC_RIT_TypeDef * | RITx,
 |  | uint32_t | time_interval
 | ) |  |

Definition at line 97 of file lpc17xx_rit.c.

void RIT_TimerDebugCmd | ( | LPC_RIT_TypeDef * | RITx,
 |  | FunctionalState | NewState
 | ) |  |

Definition at line 152 of file lpc17xx_rit.c.

Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RTC (Real Time Clock)

Modules
RTC (Real Time Clock)
LPC1700CMSIS Firmware Library

Modules

RTC Private Macros
RTC Public Types
RTC Public Functions
Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RTC Private Macros

Defines
RTC Private Macros
RTC (Real Time Clock)

Defines

#define | RTC_ILR_BITMASK ((0x00000003))
#define | RTC_IRL_RTCCIF ((1<<0))
#define | RTC_IRL_RTCALF ((1<<1))
#define | RTC_CCR_BITMASK ((0x00000013))
#define | RTC_CCR_CLKEN ((1<<0))
#define | RTC_CCR_CTCRST ((1<<1))
#define | RTC_CCR_CCALEN ((1<<4))
#define | RTC_CIIR_IMSEC ((1<<0))
#define | RTC_CIIR_IMMIN ((1<<1))
#define | RTC_CIIR_IMHOUR ((1<<2))
#define | RTC_CIIR_IMDOM ((1<<3))
#define | RTC_CIIR_IMDOW ((1<<4))
#define | RTC_CIIR_IMDOY ((1<<5))
#define | RTC_CIIR_IMMON ((1<<6))
#define | RTC_CIIR_IMYEAR ((1<<7))
#define | RTC_CIIR_BITMASK ((0xFF))
#define | RTC_AMR_AMRSEC ((1<<0))
#define | RTC_AMR_AMRMIN ((1<<1))
#define | RTC_AMR_AMRHOUR ((1<<2))
#define | RTC_AMR_AMRDOM ((1<<3))
#define | RTC_AMR_AMRDOW ((1<<4))
#define | RTC_AMR_AMRDOY ((1<<5))
#define | RTC_AMR_AMRMON ((1<<6))
#define | RTC_AMR_AMRYEAR ((1<<7))
#define | RTC_AMR_BITMASK ((0xFF))
#define | RTC_AUX_RTC_OSCF ((1<<4))
#define | RTC_AUXEN_RTC_OSCFEN ((1<<4))
#define | RTC_CTIME0_SECONDS_MASK ((0x3F))
#define | RTC_CTIME0_MINUTES_MASK ((0x3F00))
#define | RTC_CTIME0_HOURS_MASK ((0x1F0000))
#define | RTC_CTIME0_DOW_MASK ((0x7000000))
#define | RTC_CTIME1_DOM_MASK ((0x1F))
#define | RTC_CTIME1_MONTH_MASK ((0xF00))
#define | RTC_CTIME1_YEAR_MASK ((0xFFF0000))
#define | RTC_CTIME2_DOY_MASK ((0xFFF))
#define | RTC_SEC_MASK (0x0000003F)
#define | RTC_MIN_MASK (0x0000003F)
#define | RTC_HOUR_MASK (0x0000001F)
#define | RTC_DOM_MASK (0x0000001F)
#define | RTC_DOW_MASK (0x00000007)
#define | RTC_DOY_MASK (0x000001FF)
#define | RTC_MONTH_MASK (0x0000000F)
#define | RTC_YEAR_MASK (0x00000FFF)
#define | RTC_SECOND_MAX 59
#define | RTC_MINUTE_MAX 59
#define | RTC_HOUR_MAX 23
#define | RTC_MONTH_MIN 1
#define | RTC_MONTH_MAX 12
#define | RTC_DAYOFMONTH_MIN 1
#define | RTC_DAYOFMONTH_MAX 31
#define | RTC_DAYOFWEEK_MAX 6
#define | RTC_DAYOFYEAR_MIN 1
#define | RTC_DAYOFYEAR_MAX 366
#define | RTC_YEAR_MAX 4095
#define | RTC_CALIBRATION_CALVAL_MASK ((0x1FFFF))
#define | RTC_CALIBRATION_LIBDIR ((1<<17))
#define | RTC_CALIBRATION_MAX ((0x20000))
#define | RTC_CALIB_DIR_FORWARD ((uint8_t)(0))
#define | RTC_CALIB_DIR_BACKWARD ((uint8_t)(1))
#define | PARAM_RTCx(x) (((uint32_t *)x)==((uint32_t *)LPC_RTC))
#define | PARAM_RTC_INT(n) ((n==RTC_INT_COUNTER_INCREASE) || (n==RTC_INT_ALARM))
#define | PARAM_RTC_TIMETYPE(n)
#define | PARAM_RTC_CALIB_DIR(n) ((n==RTC_CALIB_DIR_FORWARD) || (n==RTC_CALIB_DIR_BACKWARD))
#define | PARAM_RTC_GPREG_CH(n) (n<=4)

Define Documentation

#define PARAM_RTC_CALIB_DIR ( n ) ((n==RTC_CALIB_DIR_FORWARD) || (n==RTC_CALIB_DIR_BACKWARD))

Definition at line 214 of file lpc17xx_rtc.h.

#define PARAM_RTC_GPREG_CH ( n ) (n<=4)

Definition at line 217 of file lpc17xx_rtc.h.

#define PARAM_RTC_INT ( n ) ((n==RTC_INT_COUNTER_INCREASE) || (n==RTC_INT_ALARM))

Definition at line 205 of file lpc17xx_rtc.h.

#define PARAM_RTC_TIMETYPE ( n )
Value:
((n==RTC_TIMETYPE_SECOND) || (n==RTC_TIMETYPE_MINUTE) \
|| (n==RTC_TIMETYPE_HOUR) || (n==RTC_TIMETYPE_DAYOFWEEK) \
|| (n==RTC_TIMETYPE_DAYOFMONTH) || (n==RTC_TIMETYPE_DAYOFYEAR) \
|| (n==RTC_TIMETYPE_MONTH) || (n==RTC_TIMETYPE_YEAR))

Definition at line 208 of file lpc17xx_rtc.h.

#define PARAM_RTCx ( x ) (((uint32_t *)x)==((uint32_t *)LPC_RTC))

Macro to determine if it is valid RTC peripheral

Definition at line 202 of file lpc17xx_rtc.h.

#define RTC_AMR_AMRDOM ((1<<3))

Counter Increment Select Mask bit for day of month

Definition at line 108 of file lpc17xx_rtc.h.

#define RTC_AMR_AMRDOW ((1<<4))

Counter Increment Select Mask bit for day of week

Definition at line 110 of file lpc17xx_rtc.h.

#define RTC_AMR_AMRDOY ((1<<5))

Counter Increment Select Mask bit for day of year

Definition at line 112 of file lpc17xx_rtc.h.

#define RTC_AMR_AMRHOUR ((1<<2))

Counter Increment Select Mask bit for hour

Definition at line 106 of file lpc17xx_rtc.h.

#define RTC_AMR_AMRMIN ((1<<1))

Counter Increment Select Mask bit for minute

Definition at line 104 of file lpc17xx_rtc.h.

#define RTC_AMR_AMRMON ((1<<6))

Counter Increment Select Mask bit for month

Definition at line 114 of file lpc17xx_rtc.h.

#define RTC_AMR_AMRSEC ((1<<0))

Counter Increment Select Mask bit for second

Definition at line 102 of file lpc17xx_rtc.h.

#define RTC_AMR_AMRYEAR ((1<<7))

Counter Increment Select Mask bit for year

Definition at line 116 of file lpc17xx_rtc.h.

#define RTC_AMR_BITMASK ((0xFF))

AMR bit mask

Definition at line 118 of file lpc17xx_rtc.h.

#define RTC_AUX_RTC_OSCF ((1<<4))

RTC Oscillator Fail detect flag

Definition at line 124 of file lpc17xx_rtc.h.

#define RTC_AUXEN_RTC_OSCFEN ((1<<4))

Oscillator Fail Detect interrupt enable

Definition at line 130 of file lpc17xx_rtc.h.

#define RTC_CALIB_DIR_BACKWARD ((uint8_t)(1))

Definition at line 197 of file lpc17xx_rtc.h.

#define RTC_CALIB_DIR_FORWARD ((uint8_t)(0))

Calibration definitions

Definition at line 196 of file lpc17xx_rtc.h.

#define RTC_CALIBRATION_CALVAL_MASK ((0x1FFFF))

Calibration value

Definition at line 190 of file lpc17xx_rtc.h.

#define RTC_CALIBRATION_LIBDIR ((1<<17))

Calibration direction

Definition at line 192 of file lpc17xx_rtc.h.

#define RTC_CALIBRATION_MAX ((0x20000))

Calibration max value

Definition at line 194 of file lpc17xx_rtc.h.

#define RTC_CCR_BITMASK ((0x00000013))

CCR register mask

Definition at line 68 of file lpc17xx_rtc.h.

#define RTC_CCR_CCALEN ((1<<4))

Calibration counter enable

Definition at line 74 of file lpc17xx_rtc.h.

#define RTC_CCR_CLKEN ((1<<0))

Clock enable

Definition at line 70 of file lpc17xx_rtc.h.

#define RTC_CCR_CTCRST ((1<<1))

Clock reset

Definition at line 72 of file lpc17xx_rtc.h.

#define RTC_CIIR_BITMASK ((0xFF))

CIIR bit mask

Definition at line 96 of file lpc17xx_rtc.h.

#define RTC_CIIR_IMDOM ((1<<3))

Counter Increment Interrupt bit for day of month

Definition at line 86 of file lpc17xx_rtc.h.

#define RTC_CIIR_IMDOW ((1<<4))

Counter Increment Interrupt bit for day of week

Definition at line 88 of file lpc17xx_rtc.h.

#define RTC_CIIR_IMDOY ((1<<5))

Counter Increment Interrupt bit for day of year

Definition at line 90 of file lpc17xx_rtc.h.

#define RTC_CIIR_IMHOUR ((1<<2))

Counter Increment Interrupt bit for hour

Definition at line 84 of file lpc17xx_rtc.h.

#define RTC_CIIR_IMMIN ((1<<1))

Counter Increment Interrupt bit for minute

Definition at line 82 of file lpc17xx_rtc.h.

#define RTC_CIIR_IMMON ((1<<6))

Counter Increment Interrupt bit for month

Definition at line 92 of file lpc17xx_rtc.h.

#define RTC_CIIR_IMSEC ((1<<0))

Counter Increment Interrupt bit for second

Definition at line 80 of file lpc17xx_rtc.h.

#define RTC_CIIR_IMYEAR ((1<<7))

Counter Increment Interrupt bit for year

Definition at line 94 of file lpc17xx_rtc.h.

#define RTC_CTIME0_DOW_MASK ((0x7000000))

Definition at line 139 of file lpc17xx_rtc.h.

#define RTC_CTIME0_HOURS_MASK ((0x1F0000))

Definition at line 138 of file lpc17xx_rtc.h.

#define RTC_CTIME0_MINUTES_MASK ((0x3F00))

Definition at line 137 of file lpc17xx_rtc.h.

#define RTC_CTIME0_SECONDS_MASK ((0x3F))

Definition at line 136 of file lpc17xx_rtc.h.

#define RTC_CTIME1_DOM_MASK ((0x1F))

Definition at line 144 of file lpc17xx_rtc.h.

#define RTC_CTIME1_MONTH_MASK ((0xF00))

Definition at line 145 of file lpc17xx_rtc.h.

#define RTC_CTIME1_YEAR_MASK ((0xFFF0000))

Definition at line 146 of file lpc17xx_rtc.h.

#define RTC_CTIME2_DOY_MASK ((0xFFF))

Definition at line 151 of file lpc17xx_rtc.h.

#define RTC_DAYOFMONTH_MAX 31

Maximum value of day of month

Definition at line 179 of file lpc17xx_rtc.h.

#define RTC_DAYOFMONTH_MIN 1

Minimum value of day of month

Definition at line 178 of file lpc17xx_rtc.h.

#define RTC_DAYOFWEEK_MAX 6

Maximum value of day of week

Definition at line 180 of file lpc17xx_rtc.h.

#define RTC_DAYOFYEAR_MAX 366

Maximum value of day of year

Definition at line 182 of file lpc17xx_rtc.h.

#define RTC_DAYOFYEAR_MIN 1

Minimum value of day of year

Definition at line 181 of file lpc17xx_rtc.h.

#define RTC_DOM_MASK (0x0000001F)

DOM register mask

Definition at line 163 of file lpc17xx_rtc.h.

#define RTC_DOW_MASK (0x00000007)

DOW register mask

Definition at line 165 of file lpc17xx_rtc.h.

#define RTC_DOY_MASK (0x000001FF)

DOY register mask

Definition at line 167 of file lpc17xx_rtc.h.

#define RTC_HOUR_MASK (0x0000001F)

HOUR register mask

Definition at line 161 of file lpc17xx_rtc.h.

#define RTC_HOUR_MAX 23

Maximum value of hour

Definition at line 175 of file lpc17xx_rtc.h.

#define RTC_ILR_BITMASK ((0x00000003))

ILR register mask

Definition at line 58 of file lpc17xx_rtc.h.

#define RTC_IRL_RTCALF ((1<<1))

Bit inform the source interrupt is alarm match

Definition at line 62 of file lpc17xx_rtc.h.

#define RTC_IRL_RTCCIF ((1<<0))

Bit inform the source interrupt is counter increment

Definition at line 60 of file lpc17xx_rtc.h.

#define RTC_MIN_MASK (0x0000003F)

MIN register mask

Definition at line 159 of file lpc17xx_rtc.h.

#define RTC_MINUTE_MAX 59

Maximum value of minute

Definition at line 174 of file lpc17xx_rtc.h.

#define RTC_MONTH_MASK (0x0000000F)

MONTH register mask

Definition at line 169 of file lpc17xx_rtc.h.

#define RTC_MONTH_MAX 12

Maximum value of month

Definition at line 177 of file lpc17xx_rtc.h.

#define RTC_MONTH_MIN 1

Minimum value of month

Definition at line 176 of file lpc17xx_rtc.h.

#define RTC_SEC_MASK (0x0000003F)

SEC register mask

Definition at line 157 of file lpc17xx_rtc.h.

#define RTC_SECOND_MAX 59

Maximum value of second

Definition at line 173 of file lpc17xx_rtc.h.

#define RTC_YEAR_MASK (0x00000FFF)

YEAR register mask

Definition at line 171 of file lpc17xx_rtc.h.

#define RTC_YEAR_MAX 4095

Maximum value of year

Definition at line 183 of file lpc17xx_rtc.h.

Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RTC Public Types

Data Structures | Enumerations
RTC Public Types
RTC (Real Time Clock)

Data Structures

struct | RTC_TIME_Type
Time structure definitions for easy manipulate the data. More...

Enumerations

enum | RTC_INT_OPT { RTC_INT_COUNTER_INCREASE = RTC_IRL_RTCCIF, RTC_INT_ALARM = RTC_IRL_RTCALF }
RTC interrupt source. More...
enum RTC_TIMETYPE_Num {
RTC_TIMETYPE_SECOND = 0, RTC_TIMETYPE_MINUTE = 1, RTC_TIMETYPE_HOUR = 2, RTC_TIMETYPE_DAYOFWEEK = 3,
RTC_TIMETYPE_DAYOFMONTH = 4, RTC_TIMETYPE_DAYOFYEAR = 5, RTC_TIMETYPE_MONTH = 6, RTC_TIMETYPE_YEAR = 7
}
RTC time type option. More...

Enumeration Type Documentation

enum RTC_INT_OPT

RTC interrupt source.

Enumerator:
RTC_INT_COUNTER_INCREASE

Counter Increment Interrupt

RTC_INT_ALARM

The alarm interrupt

Definition at line 242 of file lpc17xx_rtc.h.

enum RTC_TIMETYPE_Num

RTC time type option.

Enumerator:
RTC_TIMETYPE_SECOND

Second

RTC_TIMETYPE_MINUTE

Month

RTC_TIMETYPE_HOUR

Hour

RTC_TIMETYPE_DAYOFWEEK

Day of week

RTC_TIMETYPE_DAYOFMONTH

Day of month

RTC_TIMETYPE_DAYOFYEAR

Day of year

RTC_TIMETYPE_MONTH

Month

RTC_TIMETYPE_YEAR

Year

Definition at line 249 of file lpc17xx_rtc.h.

Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RTC Public Functions

Functions
RTC Public Functions
RTC (Real Time Clock)

Functions

void | RTC_Init (LPC_RTC_TypeDef *RTCx)
Initializes the RTC peripheral.
void | RTC_DeInit (LPC_RTC_TypeDef *RTCx)
De-initializes the RTC peripheral registers to their default reset values.
void | RTC_ResetClockTickCounter (LPC_RTC_TypeDef *RTCx)
Reset clock tick counter in RTC peripheral.
void | RTC_Cmd (LPC_RTC_TypeDef *RTCx, FunctionalState NewState)
Start/Stop RTC peripheral.
void | RTC_CntIncrIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t CntIncrIntType, FunctionalState NewState)
Enable/Disable Counter increment interrupt for each time type in RTC peripheral.
void | RTC_AlarmIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t AlarmTimeType, FunctionalState NewState)
Enable/Disable Alarm interrupt for each time type in RTC peripheral.
void | RTC_SetTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t TimeValue)
Set current time value for each time type in RTC peripheral.
uint32_t | RTC_GetTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype)
Get current time value for each type time type.
void | RTC_SetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Set full of time in RTC peripheral.
void | RTC_GetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Get full of time in RTC peripheral.
void | RTC_SetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t ALValue)
Set alarm time value for each time type.
uint32_t | RTC_GetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype)
Get alarm time value for each time type.
void | RTC_SetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Set full of alarm time in RTC peripheral.
void | RTC_GetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Get full of alarm time in RTC peripheral.
IntStatus | RTC_GetIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType)
Check whether if specified Location interrupt in RTC peripheral is set or not.
void | RTC_ClearIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType)
Clear specified Location interrupt pending in RTC peripheral.
void | RTC_CalibCounterCmd (LPC_RTC_TypeDef *RTCx, FunctionalState NewState)
Enable/Disable calibration counter in RTC peripheral.
void | RTC_CalibConfig (LPC_RTC_TypeDef *RTCx, uint32_t CalibValue, uint8_t CalibDir)
Configures Calibration in RTC peripheral.
void | RTC_WriteGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel, uint32_t Value)
Write value to General purpose registers.
uint32_t | RTC_ReadGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel)
Read value from General purpose registers.

Function Documentation

void RTC_AlarmIntConfig | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint32_t | AlarmTimeType,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable Alarm interrupt for each time type in RTC peripheral.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
[in] AlarmTimeType,: Alarm Time Interrupt type, an matching of this type value below with current time in RTC will generates an interrupt, should be:
  • RTC_TIMETYPE_SECOND
  • RTC_TIMETYPE_MINUTE
  • RTC_TIMETYPE_HOUR
  • RTC_TIMETYPE_DAYOFWEEK
  • RTC_TIMETYPE_DAYOFMONTH
  • RTC_TIMETYPE_DAYOFYEAR
  • RTC_TIMETYPE_MONTH
  • RTC_TIMETYPE_YEAR
[in] NewState New State of this function, should be:
  • ENABLE: Alarm interrupt for this time type are enabled
  • DISABLE: Alarm interrupt for this time type are disabled
Returns:
None

Definition at line 242 of file lpc17xx_rtc.c.

void RTC_CalibConfig | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint32_t | CalibValue,
 |  | uint8_t | CalibDir
 | ) |  |

Configures Calibration in RTC peripheral.

Parameters:
[in] | RTCx | RTC peripheral selected, should be LPC_RTC
[in] | CalibValue | Calibration value, should be in range from 0 to 131,072
[in] CalibDir Calibration Direction, should be:
  • RTC_CALIB_DIR_FORWARD: Forward calibration
  • RTC_CALIB_DIR_BACKWARD: Backward calibration
Returns:
None

Definition at line 707 of file lpc17xx_rtc.c.

void RTC_CalibCounterCmd | ( | LPC_RTC_TypeDef * | RTCx,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable calibration counter in RTC peripheral.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
[in] NewState New State of this function, should be:
  • ENABLE: The calibration counter is enabled and counting
  • DISABLE: The calibration counter is disabled and reset to zero
Returns:
None

Definition at line 681 of file lpc17xx_rtc.c.

void RTC_ClearIntPending | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint32_t | IntType
 | ) |  |

Clear specified Location interrupt pending in RTC peripheral.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
[in] IntType Interrupt location type, should be:
  • RTC_INT_COUNTER_INCREASE: Clear Counter Increment Interrupt pending.
  • RTC_INT_ALARM: Clear alarm interrupt pending
Returns:
None

Definition at line 665 of file lpc17xx_rtc.c.

void RTC_Cmd | ( | LPC_RTC_TypeDef * | RTCx,
 |  | FunctionalState | NewState
 | ) |  |

Start/Stop RTC peripheral.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
[in] NewState New State of this function, should be:
  • ENABLE: The time counters are enabled
  • DISABLE: The time counters are disabled
Returns:
None

Definition at line 112 of file lpc17xx_rtc.c.

void RTC_CntIncrIntConfig | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint32_t | CntIncrIntType,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable Counter increment interrupt for each time type in RTC peripheral.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
[in] CntIncrIntType,: Counter Increment Interrupt type, an increment of this type value below will generates an interrupt, should be:
  • RTC_TIMETYPE_SECOND
  • RTC_TIMETYPE_MINUTE
  • RTC_TIMETYPE_HOUR
  • RTC_TIMETYPE_DAYOFWEEK
  • RTC_TIMETYPE_DAYOFMONTH
  • RTC_TIMETYPE_DAYOFYEAR
  • RTC_TIMETYPE_MONTH
  • RTC_TIMETYPE_YEAR
[in] NewState New State of this function, should be:
  • ENABLE: Counter Increment interrupt for this time type are enabled
  • DISABLE: Counter Increment interrupt for this time type are disabled
Returns:
None

Definition at line 150 of file lpc17xx_rtc.c.

void RTC_DeInit ( LPC_RTC_TypeDef * RTCx )

De-initializes the RTC peripheral registers to their default reset values.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
Returns:
None

Definition at line 82 of file lpc17xx_rtc.c.

uint32_t RTC_GetAlarmTime | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint32_t | Timetype
 | ) |  |

Get alarm time value for each time type.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
[in] Timetype,: Time Type, should be:
  • RTC_TIMETYPE_SECOND
  • RTC_TIMETYPE_MINUTE
  • RTC_TIMETYPE_HOUR
  • RTC_TIMETYPE_DAYOFWEEK
  • RTC_TIMETYPE_DAYOFMONTH
  • RTC_TIMETYPE_DAYOFYEAR
  • RTC_TIMETYPE_MONTH
  • RTC_TIMETYPE_YEAR
Returns:
Value of Alarm time according to specified time type

Definition at line 564 of file lpc17xx_rtc.c.

void RTC_GetFullAlarmTime | ( | LPC_RTC_TypeDef * | RTCx,
 |  | RTC_TIME_Type * | pFullTime
 | ) |  |

Get full of alarm time in RTC peripheral.

Parameters:
[in] | RTCx | RTC peripheral selected, should be LPC_RTC
[in] | pFullTime | Pointer to a RTC_TIME_Type structure that will be stored alarm time in full.
Returns:
None

Definition at line 619 of file lpc17xx_rtc.c.

void RTC_GetFullTime | ( | LPC_RTC_TypeDef * | RTCx,
 |  | RTC_TIME_Type * | pFullTime
 | ) |  |

Get full of time in RTC peripheral.

Parameters:
[in] | RTCx | RTC peripheral selected, should be LPC_RTC
[in] | pFullTime | Pointer to a RTC_TIME_Type structure that will be stored time in full.
Returns:
None

Definition at line 459 of file lpc17xx_rtc.c.

IntStatus RTC_GetIntPending | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint32_t | IntType
 | ) |  |

Check whether if specified Location interrupt in RTC peripheral is set or not.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
[in] IntType Interrupt location type, should be:
  • RTC_INT_COUNTER_INCREASE: Counter Increment Interrupt block generated an interrupt.
  • RTC_INT_ALARM: Alarm generated an interrupt.
Returns:
New state of specified Location interrupt in RTC peripheral (SET or RESET)

Definition at line 646 of file lpc17xx_rtc.c.

uint32_t RTC_GetTime | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint32_t | Timetype
 | ) |  |

Get current time value for each type time type.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
[in] Timetype,: Time Type, should be:
  • RTC_TIMETYPE_SECOND
  • RTC_TIMETYPE_MINUTE
  • RTC_TIMETYPE_HOUR
  • RTC_TIMETYPE_DAYOFWEEK
  • RTC_TIMETYPE_DAYOFMONTH
  • RTC_TIMETYPE_DAYOFYEAR
  • RTC_TIMETYPE_MONTH
  • RTC_TIMETYPE_YEAR
Returns:
Value of time according to specified time type

Definition at line 401 of file lpc17xx_rtc.c.

void RTC_Init ( LPC_RTC_TypeDef * RTCx )

Initializes the RTC peripheral.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
Returns:
None

Definition at line 60 of file lpc17xx_rtc.c.

uint32_t RTC_ReadGPREG | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint8_t | Channel
 | ) |  |

Read value from General purpose registers.

Parameters:
[in] | RTCx | RTC peripheral selected, should be LPC_RTC
[in] | Channel | General purpose registers Channel number, should be in range from 0 to 4.
Returns:
Read Value Note: These General purpose registers can be used to store important information when the main power supply is off. The value in these registers is not affected by chip reset.

Definition at line 752 of file lpc17xx_rtc.c.

void RTC_ResetClockTickCounter ( LPC_RTC_TypeDef * RTCx )

Reset clock tick counter in RTC peripheral.

Parameters:
[in] RTCx RTC peripheral selected, should be LPC_RTC
Returns:
None

Definition at line 96 of file lpc17xx_rtc.c.

void RTC_SetAlarmTime | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint32_t | Timetype,
 |  | uint32_t | ALValue
 | ) |  |

Set alarm time value for each time type.

Parameters:
[in] | RTCx | RTC peripheral selected, should be LPC_RTC
[in] Timetype,: Time Type, should be:
  • RTC_TIMETYPE_SECOND
  • RTC_TIMETYPE_MINUTE
  • RTC_TIMETYPE_HOUR
  • RTC_TIMETYPE_DAYOFWEEK
  • RTC_TIMETYPE_DAYOFMONTH
  • RTC_TIMETYPE_DAYOFYEAR
  • RTC_TIMETYPE_MONTH
  • RTC_TIMETYPE_YEAR
[in] | ALValue | Alarm time value to set
Returns:
None

Definition at line 489 of file lpc17xx_rtc.c.

void RTC_SetFullAlarmTime | ( | LPC_RTC_TypeDef * | RTCx,
 |  | RTC_TIME_Type * | pFullTime
 | ) |  |

Set full of alarm time in RTC peripheral.

Parameters:
[in] | RTCx | RTC peripheral selected, should be LPC_RTC
[in] | pFullTime | Pointer to a RTC_TIME_Type structure that contains alarm time value in full.
Returns:
None

Definition at line 597 of file lpc17xx_rtc.c.

void RTC_SetFullTime | ( | LPC_RTC_TypeDef * | RTCx,
 |  | RTC_TIME_Type * | pFullTime
 | ) |  |

Set full of time in RTC peripheral.

Parameters:
[in] | RTCx | RTC peripheral selected, should be LPC_RTC
[in] | pFullTime | Pointer to a RTC_TIME_Type structure that contains time value in full.
Returns:
None

Definition at line 437 of file lpc17xx_rtc.c.

void RTC_SetTime | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint32_t | Timetype,
 |  | uint32_t | TimeValue
 | ) |  |

Set current time value for each time type in RTC peripheral.

Parameters:
[in] | RTCx | RTC peripheral selected, should be LPC_RTC
[in] Timetype,: Time Type, should be:
  • RTC_TIMETYPE_SECOND
  • RTC_TIMETYPE_MINUTE
  • RTC_TIMETYPE_HOUR
  • RTC_TIMETYPE_DAYOFWEEK
  • RTC_TIMETYPE_DAYOFMONTH
  • RTC_TIMETYPE_DAYOFYEAR
  • RTC_TIMETYPE_MONTH
  • RTC_TIMETYPE_YEAR
[in] | TimeValue | Time value to set
Returns:
None

Definition at line 327 of file lpc17xx_rtc.c.

void RTC_WriteGPREG | ( | LPC_RTC_TypeDef * | RTCx,
 |  | uint8_t | Channel,
 |  | uint32_t | Value
 | ) |  |

Write value to General purpose registers.

Parameters:
[in] | RTCx | RTC peripheral selected, should be LPC_RTC
[in] | Channel | General purpose registers Channel number, should be in range from 0 to 4.
[in] | Value | Value to write
Returns:
None Note: These General purpose registers can be used to store important information when the main power supply is off. The value in these registers is not affected by chip reset.

Definition at line 729 of file lpc17xx_rtc.c.

Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SPI (Serial Peripheral Interface)

Modules
SPI (Serial Peripheral Interface)
LPC1700CMSIS Firmware Library

Modules

SPI Public Macros
SPI Private Macros
SPI Public Types
SPI Public Functions
Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SPI Public Macros

Defines
SPI Public Macros
SPI (Serial Peripheral Interface)

Defines

#define | SPI_CPHA_FIRST ((uint32_t)(0))
#define | SPI_CPHA_SECOND ((uint32_t)(1<<3))
#define | SPI_CPOL_HI ((uint32_t)(0))
#define | SPI_CPOL_LO ((uint32_t)(1<<4))
#define | SPI_SLAVE_MODE ((uint32_t)(0))
#define | SPI_MASTER_MODE ((uint32_t)(1<<5))
#define | SPI_DATA_MSB_FIRST ((uint32_t)(0))
#define | SPI_DATA_LSB_FIRST ((uint32_t)(1<<6))
#define | SPI_DATABIT_16 SPI_SPCR_BITS(0)
#define | SPI_DATABIT_8 SPI_SPCR_BITS(0x08)
#define | SPI_DATABIT_9 SPI_SPCR_BITS(0x09)
#define | SPI_DATABIT_10 SPI_SPCR_BITS(0x0A)
#define | SPI_DATABIT_11 SPI_SPCR_BITS(0x0B)
#define | SPI_DATABIT_12 SPI_SPCR_BITS(0x0C)
#define | SPI_DATABIT_13 SPI_SPCR_BITS(0x0D)
#define | SPI_DATABIT_14 SPI_SPCR_BITS(0x0E)
#define | SPI_DATABIT_15 SPI_SPCR_BITS(0x0F)
#define | SPI_STAT_ABRT SPI_SPSR_ABRT
#define | SPI_STAT_MODF SPI_SPSR_MODF
#define | SPI_STAT_ROVR SPI_SPSR_ROVR
#define | SPI_STAT_WCOL SPI_SPSR_WCOL
#define | SPI_STAT_SPIF SPI_SPSR_SPIF
#define | SPI_STAT_DONE (1UL<<8)
#define | SPI_STAT_ERROR (1UL<<9)

Define Documentation

#define SPI_CPHA_FIRST ((uint32_t)(0))

SPI configuration parameter defines Clock phase control bit

Definition at line 55 of file lpc17xx_spi.h.

#define SPI_CPHA_SECOND ((uint32_t)(1<<3))

Definition at line 56 of file lpc17xx_spi.h.

#define SPI_CPOL_HI ((uint32_t)(0))

Clock polarity control bit

Definition at line 59 of file lpc17xx_spi.h.

#define SPI_CPOL_LO ((uint32_t)(1<<4))

Definition at line 60 of file lpc17xx_spi.h.

#define SPI_DATA_LSB_FIRST ((uint32_t)(1<<6))

Definition at line 68 of file lpc17xx_spi.h.

#define SPI_DATA_MSB_FIRST ((uint32_t)(0))

LSB enable bit

Definition at line 67 of file lpc17xx_spi.h.

#define SPI_DATABIT_10 SPI_SPCR_BITS(0x0A)

Databit number = 10

Definition at line 74 of file lpc17xx_spi.h.

#define SPI_DATABIT_11 SPI_SPCR_BITS(0x0B)

Databit number = 11

Definition at line 75 of file lpc17xx_spi.h.

#define SPI_DATABIT_12 SPI_SPCR_BITS(0x0C)

Databit number = 12

Definition at line 76 of file lpc17xx_spi.h.

#define SPI_DATABIT_13 SPI_SPCR_BITS(0x0D)

Databit number = 13

Definition at line 77 of file lpc17xx_spi.h.

#define SPI_DATABIT_14 SPI_SPCR_BITS(0x0E)

Databit number = 14

Definition at line 78 of file lpc17xx_spi.h.

#define SPI_DATABIT_15 SPI_SPCR_BITS(0x0F)

Databit number = 15

Definition at line 79 of file lpc17xx_spi.h.

#define SPI_DATABIT_16 SPI_SPCR_BITS(0)

SPI data bit number defines Databit number = 16

Definition at line 71 of file lpc17xx_spi.h.

#define SPI_DATABIT_8 SPI_SPCR_BITS(0x08)

Databit number = 8

Definition at line 72 of file lpc17xx_spi.h.

#define SPI_DATABIT_9 SPI_SPCR_BITS(0x09)

Databit number = 9

Definition at line 73 of file lpc17xx_spi.h.

#define SPI_MASTER_MODE ((uint32_t)(1<<5))

Definition at line 64 of file lpc17xx_spi.h.

#define SPI_SLAVE_MODE ((uint32_t)(0))

SPI master mode enable

Definition at line 63 of file lpc17xx_spi.h.

#define SPI_STAT_ABRT SPI_SPSR_ABRT

SPI Status Flag defines Slave abort

Definition at line 85 of file lpc17xx_spi.h.

#define SPI_STAT_DONE (1UL<<8)

Done

Definition at line 96 of file lpc17xx_spi.h.

#define SPI_STAT_ERROR (1UL<<9)

Error

Definition at line 97 of file lpc17xx_spi.h.

#define SPI_STAT_MODF SPI_SPSR_MODF

Mode fault

Definition at line 87 of file lpc17xx_spi.h.

#define SPI_STAT_ROVR SPI_SPSR_ROVR

Read overrun

Definition at line 89 of file lpc17xx_spi.h.

#define SPI_STAT_SPIF SPI_SPSR_SPIF

SPI transfer complete flag

Definition at line 93 of file lpc17xx_spi.h.

#define SPI_STAT_WCOL SPI_SPSR_WCOL

Write collision

Definition at line 91 of file lpc17xx_spi.h.

Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SPI Private Macros

Defines
SPI Private Macros
SPI (Serial Peripheral Interface)

Defines

#define | SPI_SPCR_BIT_EN ((uint32_t)(1<<2))
#define | SPI_SPCR_CPHA_SECOND ((uint32_t)(1<<3))
#define | SPI_SPCR_CPOL_LOW ((uint32_t)(1<<4))
#define | SPI_SPCR_MSTR ((uint32_t)(1<<5))
#define | SPI_SPCR_LSBF ((uint32_t)(1<<6))
#define | SPI_SPCR_SPIE ((uint32_t)(1<<7))
#define | SPI_SPCR_BITS(n) ((n==0) ? ((uint32_t)0) : ((uint32_t)((n&0x0F)<<8)))
#define | SPI_SPCR_BITMASK ((uint32_t)(0xFFC))
#define | SPI_SPSR_ABRT ((uint32_t)(1<<3))
#define | SPI_SPSR_MODF ((uint32_t)(1<<4))
#define | SPI_SPSR_ROVR ((uint32_t)(1<<5))
#define | SPI_SPSR_WCOL ((uint32_t)(1<<6))
#define | SPI_SPSR_SPIF ((uint32_t)(1<<7))
#define | SPI_SPSR_BITMASK ((uint32_t)(0xF8))
#define | SPI_SPDR_LO_MASK ((uint32_t)(0xFF))
#define | SPI_SPDR_HI_MASK ((uint32_t)(0xFF00))
#define | SPI_SPDR_BITMASK ((uint32_t)(0xFFFF))
#define | SPI_SPCCR_COUNTER(n) ((uint32_t)(n&0xFF))
#define | SPI_SPCCR_BITMASK ((uint32_t)(0xFF))
#define | SPI_SPTCR_TEST_MASK ((uint32_t)(0xFE))
#define | SPI_SPTCR_BITMASK ((uint32_t)(0xFE))
#define | SPI_SPTSR_ABRT ((uint32_t)(1<<3))
#define | SPI_SPTSR_MODF ((uint32_t)(1<<4))
#define | SPI_SPTSR_ROVR ((uint32_t)(1<<5))
#define | SPI_SPTSR_WCOL ((uint32_t)(1<<6))
#define | SPI_SPTSR_SPIF ((uint32_t)(1<<7))
#define | SPI_SPTSR_MASKBIT ((uint32_t)(0xF8))
#define | SPI_SPINT_INTFLAG ((uint32_t)(1<<0))
#define | SPI_SPINT_BITMASK ((uint32_t)(0x01))
#define | PARAM_SPIx(n) (((uint32_t *)n)==((uint32_t *)LPC_SPI))
#define | PARAM_SPI_CPHA(n) ((n==SPI_CPHA_FIRST) || (n==SPI_CPHA_SECOND))
#define | PARAM_SPI_CPOL(n) ((n==SPI_CPOL_HI) || (n==SPI_CPOL_LO))
#define | PARAM_SPI_MODE(n) ((n==SPI_SLAVE_MODE) || (n==SPI_MASTER_MODE))
#define | PARAM_SPI_DATA_ORDER(n) ((n==SPI_DATA_MSB_FIRST) || (n==SPI_DATA_LSB_FIRST))
#define | PARAM_SPI_DATABIT(n)
#define | PARAM_SPI_STAT(n)

Define Documentation

#define PARAM_SPI_CPHA ( n ) ((n==SPI_CPHA_FIRST) || (n==SPI_CPHA_SECOND))

Macro check Clock phase control mode

Definition at line 204 of file lpc17xx_spi.h.

#define PARAM_SPI_CPOL ( n ) ((n==SPI_CPOL_HI) || (n==SPI_CPOL_LO))

Macro check Clock polarity control mode

Definition at line 207 of file lpc17xx_spi.h.

#define PARAM_SPI_DATA_ORDER ( n ) ((n==SPI_DATA_MSB_FIRST) || (n==SPI_DATA_LSB_FIRST))

Macro check LSB/MSB mode

Definition at line 213 of file lpc17xx_spi.h.

#define PARAM_SPI_DATABIT ( n )
Value:
((n==SPI_DATABIT_16) || (n==SPI_DATABIT_8) \
|| (n==SPI_DATABIT_9) || (n==SPI_DATABIT_10) \
|| (n==SPI_DATABIT_11) || (n==SPI_DATABIT_12) \
|| (n==SPI_DATABIT_13) || (n==SPI_DATABIT_14) \
|| (n==SPI_DATABIT_15))

Macro check databit value

Definition at line 216 of file lpc17xx_spi.h.

#define PARAM_SPI_MODE ( n ) ((n==SPI_SLAVE_MODE) || (n==SPI_MASTER_MODE))

Macro check master/slave mode

Definition at line 210 of file lpc17xx_spi.h.

#define PARAM_SPI_STAT ( n )
Value:
((n==SPI_STAT_ABRT) || (n==SPI_STAT_MODF) \
|| (n==SPI_STAT_ROVR) || (n==SPI_STAT_WCOL) \
|| (n==SPI_STAT_SPIF))

Macro check status flag

Definition at line 223 of file lpc17xx_spi.h.

#define PARAM_SPIx ( n ) (((uint32_t *)n)==((uint32_t *)LPC_SPI))

Macro to determine if it is valid SPI port number

Definition at line 201 of file lpc17xx_spi.h.

#define SPI_SPCCR_BITMASK ((uint32_t)(0xFF))

SPI clock counter bit-mask

Definition at line 164 of file lpc17xx_spi.h.

#define SPI_SPCCR_COUNTER ( n ) ((uint32_t)(n&0xFF))

Macro defines for SPI Clock Counter Register SPI clock counter setting

Definition at line 162 of file lpc17xx_spi.h.

#define SPI_SPCR_BIT_EN ((uint32_t)(1<<2))

Macro defines for SPI Control Register Bit enable, the SPI controller sends and receives the number of bits selected by bits 11:8

Definition at line 115 of file lpc17xx_spi.h.

#define SPI_SPCR_BITMASK ((uint32_t)(0xFFC))

SPI Control bit mask

Definition at line 130 of file lpc17xx_spi.h.

#define SPI_SPCR_BITS ( n ) ((n==0) ? ((uint32_t)0) : ((uint32_t)((n&0x0F)<<8)))

When bit 2 of this register is 1, this field controls the number of bits per transfer

Definition at line 128 of file lpc17xx_spi.h.

#define SPI_SPCR_CPHA_SECOND ((uint32_t)(1<<3))

Clock phase control bit

Definition at line 117 of file lpc17xx_spi.h.

#define SPI_SPCR_CPOL_LOW ((uint32_t)(1<<4))

Clock polarity control bit

Definition at line 119 of file lpc17xx_spi.h.

#define SPI_SPCR_LSBF ((uint32_t)(1<<6))

LSB enable bit

Definition at line 123 of file lpc17xx_spi.h.

#define SPI_SPCR_MSTR ((uint32_t)(1<<5))

SPI master mode enable

Definition at line 121 of file lpc17xx_spi.h.

#define SPI_SPCR_SPIE ((uint32_t)(1<<7))

SPI interrupt enable bit

Definition at line 125 of file lpc17xx_spi.h.

#define SPI_SPDR_BITMASK ((uint32_t)(0xFFFF))

SPI Data bit-mask

Definition at line 156 of file lpc17xx_spi.h.

#define SPI_SPDR_HI_MASK ((uint32_t)(0xFF00))

SPI Data high bit-mask

Definition at line 154 of file lpc17xx_spi.h.

#define SPI_SPDR_LO_MASK ((uint32_t)(0xFF))

Macro defines for SPI Data Register SPI Data low bit-mask

Definition at line 152 of file lpc17xx_spi.h.

#define SPI_SPINT_BITMASK ((uint32_t)(0x01))

SPI interrupt register bit mask

Definition at line 196 of file lpc17xx_spi.h.

#define SPI_SPINT_INTFLAG ((uint32_t)(1<<0))

Macro defines for SPI Interrupt Register SPI interrupt flag

Definition at line 194 of file lpc17xx_spi.h.

#define SPI_SPSR_ABRT ((uint32_t)(1<<3))

Macro defines for SPI Status Register Slave abort

Definition at line 136 of file lpc17xx_spi.h.

#define SPI_SPSR_BITMASK ((uint32_t)(0xF8))

SPI Status bit mask

Definition at line 146 of file lpc17xx_spi.h.

#define SPI_SPSR_MODF ((uint32_t)(1<<4))

Mode fault

Definition at line 138 of file lpc17xx_spi.h.

#define SPI_SPSR_ROVR ((uint32_t)(1<<5))

Read overrun

Definition at line 140 of file lpc17xx_spi.h.

#define SPI_SPSR_SPIF ((uint32_t)(1<<7))

SPI transfer complete flag

Definition at line 144 of file lpc17xx_spi.h.

#define SPI_SPSR_WCOL ((uint32_t)(1<<6))

Write collision

Definition at line 142 of file lpc17xx_spi.h.

#define SPI_SPTCR_BITMASK ((uint32_t)(0xFE))

SPI Test register bit mask

Definition at line 172 of file lpc17xx_spi.h.

#define SPI_SPTCR_TEST_MASK ((uint32_t)(0xFE))

SPI Test bit

Definition at line 170 of file lpc17xx_spi.h.

#define SPI_SPTSR_ABRT ((uint32_t)(1<<3))

Macro defines for SPI Test Status Register Slave abort

Definition at line 178 of file lpc17xx_spi.h.

#define SPI_SPTSR_MASKBIT ((uint32_t)(0xF8))

SPI Status bit mask

Definition at line 188 of file lpc17xx_spi.h.

#define SPI_SPTSR_MODF ((uint32_t)(1<<4))

Mode fault

Definition at line 180 of file lpc17xx_spi.h.

#define SPI_SPTSR_ROVR ((uint32_t)(1<<5))

Read overrun

Definition at line 182 of file lpc17xx_spi.h.

#define SPI_SPTSR_SPIF ((uint32_t)(1<<7))

SPI transfer complete flag

Definition at line 186 of file lpc17xx_spi.h.

#define SPI_SPTSR_WCOL ((uint32_t)(1<<6))

Write collision

Definition at line 184 of file lpc17xx_spi.h.

Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SPI Public Types

Data Structures | Enumerations
SPI Public Types
SPI (Serial Peripheral Interface)

Data Structures

struct | SPI_CFG_Type
SPI configuration structure. More...
struct | SPI_DATA_SETUP_Type
SPI Data configuration structure definitions. More...

Enumerations

enum | SPI_TRANSFER_Type { SPI_TRANSFER_POLLING = 0, SPI_TRANSFER_INTERRUPT }
SPI Transfer Type definitions. More...

Enumeration Type Documentation

enum SPI_TRANSFER_Type

SPI Transfer Type definitions.

Enumerator:
SPI_TRANSFER_POLLING

Polling transfer

SPI_TRANSFER_INTERRUPT

Interrupt transfer

Definition at line 261 of file lpc17xx_spi.h.

Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SPI Public Functions

Functions
SPI Public Functions
SPI (Serial Peripheral Interface)

Functions

void | SPI_Init (LPC_SPI_TypeDef *SPIx, SPI_CFG_Type *SPI_ConfigStruct)
Initializes the SPIx peripheral according to the specified parameters in the UART_ConfigStruct.
void | SPI_DeInit (LPC_SPI_TypeDef *SPIx)
De-initializes the SPIx peripheral registers to their default reset values.
void | SPI_SetClock (LPC_SPI_TypeDef *SPIx, uint32_t target_clock)
Setup clock rate for SPI device.
void | SPI_ConfigStructInit (SPI_CFG_Type *SPI_InitStruct)
Fills each SPI_InitStruct member with its default value:
void | SPI_SendData (LPC_SPI_TypeDef *SPIx, uint16_t Data)
Transmit a single data through SPIx peripheral.
uint16_t | SPI_ReceiveData (LPC_SPI_TypeDef *SPIx)
Receive a single data from SPIx peripheral.
int32_t | SPI_ReadWrite (LPC_SPI_TypeDef *SPIx, SPI_DATA_SETUP_Type *dataCfg, SPI_TRANSFER_Type xfType)
SPI Read write data function.
void | SPI_IntCmd (LPC_SPI_TypeDef *SPIx, FunctionalState NewState)
Enable or disable SPIx interrupt.
IntStatus | SPI_GetIntStatus (LPC_SPI_TypeDef *SPIx)
Checks whether the SPI interrupt flag is set or not.
void | SPI_ClearIntPending (LPC_SPI_TypeDef *SPIx)
Clear SPI interrupt flag.
uint8_t | SPI_GetDataSize (LPC_SPI_TypeDef *SPIx)
Get data bit size per transfer.
uint32_t | SPI_GetStatus (LPC_SPI_TypeDef *SPIx)
Get current value of SPI Status register in SPIx peripheral.
FlagStatus | SPI_CheckStatus (uint32_t inputSPIStatus, uint8_t SPIStatus)
Checks whether the specified SPI Status flag is set or not via inputSPIStatus parameter.

Function Documentation

FlagStatus SPI_CheckStatus | ( | uint32_t | inputSPIStatus,
 |  | uint8_t | SPIStatus
 | ) |  |

Checks whether the specified SPI Status flag is set or not via inputSPIStatus parameter.

Parameters:
[in] inputSPIStatus Value to check status of each flag type. This value is the return value from SPI_GetStatus().
[in] SPIStatus Specifies the SPI status flag to check, should be one of the following:
  • SPI_STAT_ABRT: Slave abort.
  • SPI_STAT_MODF: Mode fault.
  • SPI_STAT_ROVR: Read overrun.
  • SPI_STAT_WCOL: Write collision.
  • SPI_STAT_SPIF: SPI transfer complete.
Returns:
The new state of SPIStatus (SET or RESET)

Definition at line 419 of file lpc17xx_spi.c.

void SPI_ClearIntPending ( LPC_SPI_TypeDef * SPIx )

Clear SPI interrupt flag.

Parameters:
[in] SPIx SPI peripheral selected, should be LPC_SPI
Returns:
None

Definition at line 379 of file lpc17xx_spi.c.

void SPI_ConfigStructInit ( SPI_CFG_Type * SPI_InitStruct )

Fills each SPI_InitStruct member with its default value:

  • CPHA = SPI_CPHA_FIRST
  • CPOL = SPI_CPOL_HI
  • ClockRate = 1000000
  • DataOrder = SPI_DATA_MSB_FIRST
  • Databit = SPI_DATABIT_8
  • Mode = SPI_MASTER_MODE
    Parameters:
    [in] SPI_InitStruct Pointer to a SPI_CFG_Type structure which will be initialized.
    Returns:
    None

Definition at line 169 of file lpc17xx_spi.c.

void SPI_DeInit ( LPC_SPI_TypeDef * SPIx )

De-initializes the SPIx peripheral registers to their default reset values.

Parameters:
[in] SPIx SPI peripheral selected, should be LPC_SPI
Returns:
None

Definition at line 96 of file lpc17xx_spi.c.

uint8_t SPI_GetDataSize ( LPC_SPI_TypeDef * SPIx )

Get data bit size per transfer.

Parameters:
[in] SPIx SPI peripheral selected, should be LPC_SPI
Returns:
number of bit per transfer, could be 8-16

Definition at line 111 of file lpc17xx_spi.c.

IntStatus SPI_GetIntStatus ( LPC_SPI_TypeDef * SPIx )

Checks whether the SPI interrupt flag is set or not.

Parameters:
[in] SPIx SPI peripheral selected, should be LPC_SPI
Returns:
The new state of SPI Interrupt Flag (SET or RESET)

Definition at line 367 of file lpc17xx_spi.c.

uint32_t SPI_GetStatus ( LPC_SPI_TypeDef * SPIx )

Get current value of SPI Status register in SPIx peripheral.

Parameters:
[in] SPIx SPI peripheral selected, should be LPC_SPI
Returns:
Current value of SPI Status register in SPI peripheral. Note: The return value of this function must be used with SPI_CheckStatus() to determine current flag status corresponding to each SPI status type. Because some flags in SPI Status register will be cleared after reading, the next reading SPI Status register could not be correct. So this function used to read SPI status register in one time only, then the return value used to check all flags.

Definition at line 398 of file lpc17xx_spi.c.

void SPI_Init | ( | LPC_SPI_TypeDef * | SPIx,
 |  | SPI_CFG_Type * | SPI_ConfigStruct
 | ) |  |

Initializes the SPIx peripheral according to the specified parameters in the UART_ConfigStruct.

Parameters:
[in] | SPIx | SPI peripheral selected, should be LPC_SPI
[in] | SPI_ConfigStruct | Pointer to a SPI_CFG_Type structure that contains the configuration information for the specified SPI peripheral.
Returns:
None

Definition at line 126 of file lpc17xx_spi.c.

void SPI_IntCmd | ( | LPC_SPI_TypeDef * | SPIx,
 |  | FunctionalState | NewState
 | ) |  |

Enable or disable SPIx interrupt.

Parameters:
[in] SPIx SPI peripheral selected, should be LPC_SPI
[in] NewState New state of specified UART interrupt type, should be:
  • ENALBE: Enable this SPI interrupt.
  • DISALBE: Disable this SPI interrupt.
Returns:
None

Definition at line 346 of file lpc17xx_spi.c.

int32_t SPI_ReadWrite | ( | LPC_SPI_TypeDef * | SPIx,
 |  | SPI_DATA_SETUP_Type * | dataCfg,
 |  | SPI_TRANSFER_Type | xfType
 | ) |  |

SPI Read write data function.

Parameters:
[in] | SPIx | Pointer to SPI peripheral, should be LPC_SPI
[in] | dataCfg | Pointer to a SPI_DATA_SETUP_Type structure that contains specified information about transmit data configuration.
[in] xfType Transfer type, should be:
  • SPI_TRANSFER_POLLING: Polling mode
  • SPI_TRANSFER_INTERRUPT: Interrupt mode
Returns:
Actual Data length has been transferred in polling mode. In interrupt mode, always return (0) Return (-1) if error. Note: This function can be used in both master and slave mode.

Definition at line 221 of file lpc17xx_spi.c.

uint16_t SPI_ReceiveData ( LPC_SPI_TypeDef * SPIx )

Receive a single data from SPIx peripheral.

Parameters:
[in] SPIx SPI peripheral selected, should be LPC_SPI
Returns:
Data received (16-bit long)

Definition at line 200 of file lpc17xx_spi.c.

void SPI_SendData | ( | LPC_SPI_TypeDef * | SPIx,
 |  | uint16_t | Data
 | ) |  |

Transmit a single data through SPIx peripheral.

Parameters:
[in] | SPIx | SPI peripheral selected, should be LPC_SPI
[in] | Data | Data to transmit (must be 16 or 8-bit long, this depend on SPI data bit number configured)
Returns:
none

Definition at line 186 of file lpc17xx_spi.c.

void SPI_SetClock | ( | LPC_SPI_TypeDef * | SPIx,
 |  | uint32_t | target_clock
 | ) |  |

Setup clock rate for SPI device.

Parameters:
[in] | SPIx | SPI peripheral definition, should be LPC_SPI
[in] | target_clock | : clock of SPI (Hz)
Returns:
None

Definition at line 59 of file lpc17xx_spi.c.

Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SSP (Synchronous Serial Port)

Modules
SSP (Synchronous Serial Port)
LPC1700CMSIS Firmware Library

Modules

SSP Public Macros
SSP Private Macros
SSP Public Types
SSP Public Functions
Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SSP Public Macros

Defines
SSP Public Macros
SSP (Synchronous Serial Port)

Defines

#define | SSP_CPHA_FIRST ((uint32_t)(0))
#define | SSP_CPHA_SECOND SSP_CR0_CPHA_SECOND
#define | SSP_CPOL_HI ((uint32_t)(0))
#define | SSP_CPOL_LO SSP_CR0_CPOL_HI
#define | SSP_SLAVE_MODE SSP_CR1_SLAVE_EN
#define | SSP_MASTER_MODE ((uint32_t)(0))
#define | SSP_DATABIT_4 SSP_CR0_DSS(4)
#define | SSP_DATABIT_5 SSP_CR0_DSS(5)
#define | SSP_DATABIT_6 SSP_CR0_DSS(6)
#define | SSP_DATABIT_7 SSP_CR0_DSS(7)
#define | SSP_DATABIT_8 SSP_CR0_DSS(8)
#define | SSP_DATABIT_9 SSP_CR0_DSS(9)
#define | SSP_DATABIT_10 SSP_CR0_DSS(10)
#define | SSP_DATABIT_11 SSP_CR0_DSS(11)
#define | SSP_DATABIT_12 SSP_CR0_DSS(12)
#define | SSP_DATABIT_13 SSP_CR0_DSS(13)
#define | SSP_DATABIT_14 SSP_CR0_DSS(14)
#define | SSP_DATABIT_15 SSP_CR0_DSS(15)
#define | SSP_DATABIT_16 SSP_CR0_DSS(16)
#define | SSP_FRAME_SPI SSP_CR0_FRF_SPI
#define | SSP_FRAME_TI SSP_CR0_FRF_TI
#define | SSP_FRAME_MICROWIRE SSP_CR0_FRF_MICROWIRE
#define | SSP_STAT_TXFIFO_EMPTY SSP_SR_TFE
#define | SSP_STAT_TXFIFO_NOTFULL SSP_SR_TNF
#define | SSP_STAT_RXFIFO_NOTEMPTY SSP_SR_RNE
#define | SSP_STAT_RXFIFO_FULL SSP_SR_RFF
#define | SSP_STAT_BUSY SSP_SR_BSY
#define | SSP_INTCFG_ROR SSP_IMSC_ROR
#define | SSP_INTCFG_RT SSP_IMSC_RT
#define | SSP_INTCFG_RX SSP_IMSC_RX
#define | SSP_INTCFG_TX SSP_IMSC_TX
#define | SSP_INTSTAT_ROR SSP_MIS_ROR
#define | SSP_INTSTAT_RT SSP_MIS_RT
#define | SSP_INTSTAT_RX SSP_MIS_RX
#define | SSP_INTSTAT_TX SSP_MIS_TX
#define | SSP_INTSTAT_RAW_ROR SSP_RIS_ROR
#define | SSP_INTSTAT_RAW_RT SSP_RIS_RT
#define | SSP_INTSTAT_RAW_RX SSP_RIS_RX
#define | SSP_INTSTAT_RAW_TX SSP_RIS_TX
#define | SSP_INTCLR_ROR SSP_ICR_ROR
#define | SSP_INTCLR_RT SSP_ICR_RT
#define | SSP_DMA_RX SSP_DMA_RXDMA_EN
#define | SSP_DMA_TX SSP_DMA_TXDMA_EN
#define | SSP_STAT_DONE (1UL<<8)
#define | SSP_STAT_ERROR (1UL<<9)

Define Documentation

#define SSP_CPHA_FIRST ((uint32_t)(0))

SSP configuration parameter defines Clock phase control bit

Definition at line 55 of file lpc17xx_ssp.h.

#define SSP_CPHA_SECOND SSP_CR0_CPHA_SECOND

Definition at line 56 of file lpc17xx_ssp.h.

#define SSP_CPOL_HI ((uint32_t)(0))

Clock polarity control bit

Definition at line 66 of file lpc17xx_ssp.h.

#define SSP_CPOL_LO SSP_CR0_CPOL_HI

Definition at line 67 of file lpc17xx_ssp.h.

#define SSP_DATABIT_10 SSP_CR0_DSS(10)

Databit number = 10

Definition at line 80 of file lpc17xx_ssp.h.

#define SSP_DATABIT_11 SSP_CR0_DSS(11)

Databit number = 11

Definition at line 81 of file lpc17xx_ssp.h.

#define SSP_DATABIT_12 SSP_CR0_DSS(12)

Databit number = 12

Definition at line 82 of file lpc17xx_ssp.h.

#define SSP_DATABIT_13 SSP_CR0_DSS(13)

Databit number = 13

Definition at line 83 of file lpc17xx_ssp.h.

#define SSP_DATABIT_14 SSP_CR0_DSS(14)

Databit number = 14

Definition at line 84 of file lpc17xx_ssp.h.

#define SSP_DATABIT_15 SSP_CR0_DSS(15)

Databit number = 15

Definition at line 85 of file lpc17xx_ssp.h.

#define SSP_DATABIT_16 SSP_CR0_DSS(16)

Databit number = 16

Definition at line 86 of file lpc17xx_ssp.h.

#define SSP_DATABIT_4 SSP_CR0_DSS(4)

SSP data bit number defines Databit number = 4

Definition at line 74 of file lpc17xx_ssp.h.

#define SSP_DATABIT_5 SSP_CR0_DSS(5)

Databit number = 5

Definition at line 75 of file lpc17xx_ssp.h.

#define SSP_DATABIT_6 SSP_CR0_DSS(6)

Databit number = 6

Definition at line 76 of file lpc17xx_ssp.h.

#define SSP_DATABIT_7 SSP_CR0_DSS(7)

Databit number = 7

Definition at line 77 of file lpc17xx_ssp.h.

#define SSP_DATABIT_8 SSP_CR0_DSS(8)

Databit number = 8

Definition at line 78 of file lpc17xx_ssp.h.

#define SSP_DATABIT_9 SSP_CR0_DSS(9)

Databit number = 9

Definition at line 79 of file lpc17xx_ssp.h.

#define SSP_DMA_RX SSP_DMA_RXDMA_EN

SSP DMA defines SSP bit for enabling RX DMA

Definition at line 160 of file lpc17xx_ssp.h.

#define SSP_DMA_TX SSP_DMA_TXDMA_EN

SSP bit for enabling TX DMA

Definition at line 162 of file lpc17xx_ssp.h.

#define SSP_FRAME_MICROWIRE SSP_CR0_FRF_MICROWIRE

National Micro-wire mode

Definition at line 94 of file lpc17xx_ssp.h.

#define SSP_FRAME_SPI SSP_CR0_FRF_SPI

SSP Frame Format definition Motorola SPI mode

Definition at line 90 of file lpc17xx_ssp.h.

#define SSP_FRAME_TI SSP_CR0_FRF_TI

TI synchronous serial mode

Definition at line 92 of file lpc17xx_ssp.h.

#define SSP_INTCFG_ROR SSP_IMSC_ROR

SSP Interrupt Configuration defines Receive Overrun

Definition at line 114 of file lpc17xx_ssp.h.

#define SSP_INTCFG_RT SSP_IMSC_RT

Receive TimeOut

Definition at line 116 of file lpc17xx_ssp.h.

#define SSP_INTCFG_RX SSP_IMSC_RX

Rx FIFO is at least half full

Definition at line 118 of file lpc17xx_ssp.h.

#define SSP_INTCFG_TX SSP_IMSC_TX

Tx FIFO is at least half empty

Definition at line 120 of file lpc17xx_ssp.h.

#define SSP_INTCLR_ROR SSP_ICR_ROR

SSP Interrupt Clear defines Writing a 1 to this bit clears the "frame was received when RxFIFO was full" interrupt

Definition at line 151 of file lpc17xx_ssp.h.

#define SSP_INTCLR_RT SSP_ICR_RT

Writing a 1 to this bit clears the "Rx FIFO was not empty and has not been read for a timeout period" interrupt

Definition at line 154 of file lpc17xx_ssp.h.

#define SSP_INTSTAT_RAW_ROR SSP_RIS_ROR

SSP Raw Interrupt Status defines Receive Overrun

Definition at line 138 of file lpc17xx_ssp.h.

#define SSP_INTSTAT_RAW_RT SSP_RIS_RT

Receive TimeOut

Definition at line 140 of file lpc17xx_ssp.h.

#define SSP_INTSTAT_RAW_RX SSP_RIS_RX

Rx FIFO is at least half full

Definition at line 142 of file lpc17xx_ssp.h.

#define SSP_INTSTAT_RAW_TX SSP_RIS_TX

Tx FIFO is at least half empty

Definition at line 144 of file lpc17xx_ssp.h.

#define SSP_INTSTAT_ROR SSP_MIS_ROR

SSP Configured Interrupt Status defines Receive Overrun

Definition at line 126 of file lpc17xx_ssp.h.

#define SSP_INTSTAT_RT SSP_MIS_RT

Receive TimeOut

Definition at line 128 of file lpc17xx_ssp.h.

#define SSP_INTSTAT_RX SSP_MIS_RX

Rx FIFO is at least half full

Definition at line 130 of file lpc17xx_ssp.h.

#define SSP_INTSTAT_TX SSP_MIS_TX

Tx FIFO is at least half empty

Definition at line 132 of file lpc17xx_ssp.h.

#define SSP_MASTER_MODE ((uint32_t)(0))

Definition at line 71 of file lpc17xx_ssp.h.

#define SSP_SLAVE_MODE SSP_CR1_SLAVE_EN

SSP master mode enable

Definition at line 70 of file lpc17xx_ssp.h.

#define SSP_STAT_BUSY SSP_SR_BSY

SSP status SSP Busy bit

Definition at line 108 of file lpc17xx_ssp.h.

#define SSP_STAT_DONE (1UL<<8)

Done

Definition at line 165 of file lpc17xx_ssp.h.

#define SSP_STAT_ERROR (1UL<<9)

Error

Definition at line 166 of file lpc17xx_ssp.h.

#define SSP_STAT_RXFIFO_FULL SSP_SR_RFF

SSP status RX FIFO full bit

Definition at line 106 of file lpc17xx_ssp.h.

#define SSP_STAT_RXFIFO_NOTEMPTY SSP_SR_RNE

SSP status RX FIFO not empty bit

Definition at line 104 of file lpc17xx_ssp.h.

#define SSP_STAT_TXFIFO_EMPTY SSP_SR_TFE

SSP Status defines SSP status TX FIFO Empty bit

Definition at line 100 of file lpc17xx_ssp.h.

#define SSP_STAT_TXFIFO_NOTFULL SSP_SR_TNF

SSP status TX FIFO not full bit

Definition at line 102 of file lpc17xx_ssp.h.

Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SSP Private Macros

Defines
SSP Private Macros
SSP (Synchronous Serial Port)

Defines

#define | SSP_CR0_DSS(n) ((uint32_t)((n-1)&0xF))
#define | SSP_CR0_FRF_SPI ((uint32_t)(0<<4))
#define | SSP_CR0_FRF_TI ((uint32_t)(1<<4))
#define | SSP_CR0_FRF_MICROWIRE ((uint32_t)(2<<4))
#define | SSP_CR0_CPOL_HI ((uint32_t)(1<<6))
#define | SSP_CR0_CPHA_SECOND ((uint32_t)(1<<7))
#define | SSP_CR0_SCR(n) ((uint32_t)((n&0xFF)<<8))
#define | SSP_CR0_BITMASK ((uint32_t)(0xFFFF))
#define | SSP_CR1_LBM_EN ((uint32_t)(1<<0))
#define | SSP_CR1_SSP_EN ((uint32_t)(1<<1))
#define | SSP_CR1_SLAVE_EN ((uint32_t)(1<<2))
#define | SSP_CR1_SO_DISABLE ((uint32_t)(1<<3))
#define | SSP_CR1_BITMASK ((uint32_t)(0x0F))
#define | SSP_DR_BITMASK(n) ((n)&0xFFFF)
#define | SSP_SR_TFE ((uint32_t)(1<<0))
#define | SSP_SR_TNF ((uint32_t)(1<<1))
#define | SSP_SR_RNE ((uint32_t)(1<<2))
#define | SSP_SR_RFF ((uint32_t)(1<<3))
#define | SSP_SR_BSY ((uint32_t)(1<<4))
#define | SSP_SR_BITMASK ((uint32_t)(0x1F))
#define | SSP_CPSR_CPDVSR(n) ((uint32_t)(n&0xFF))
#define | SSP_CPSR_BITMASK ((uint32_t)(0xFF))
#define | SSP_IMSC_ROR ((uint32_t)(1<<0))
#define | SSP_IMSC_RT ((uint32_t)(1<<1))
#define | SSP_IMSC_RX ((uint32_t)(1<<2))
#define | SSP_IMSC_TX ((uint32_t)(1<<3))
#define | SSP_IMSC_BITMASK ((uint32_t)(0x0F))
#define | SSP_RIS_ROR ((uint32_t)(1<<0))
#define | SSP_RIS_RT ((uint32_t)(1<<1))
#define | SSP_RIS_RX ((uint32_t)(1<<2))
#define | SSP_RIS_TX ((uint32_t)(1<<3))
#define | SSP_RIS_BITMASK ((uint32_t)(0x0F))
#define | SSP_MIS_ROR ((uint32_t)(1<<0))
#define | SSP_MIS_RT ((uint32_t)(1<<1))
#define | SSP_MIS_RX ((uint32_t)(1<<2))
#define | SSP_MIS_TX ((uint32_t)(1<<3))
#define | SSP_MIS_BITMASK ((uint32_t)(0x0F))
#define | SSP_ICR_ROR ((uint32_t)(1<<0))
#define | SSP_ICR_RT ((uint32_t)(1<<1))
#define | SSP_ICR_BITMASK ((uint32_t)(0x03))
#define | SSP_DMA_RXDMA_EN ((uint32_t)(1<<0))
#define | SSP_DMA_TXDMA_EN ((uint32_t)(1<<1))
#define | SSP_DMA_BITMASK ((uint32_t)(0x03))
#define | PARAM_SSPx(n)
#define | PARAM_SSP_CPHA(n) ((n==SSP_CPHA_FIRST) || (n==SSP_CPHA_SECOND))
#define | PARAM_SSP_CPOL(n) ((n==SSP_CPOL_HI) || (n==SSP_CPOL_LO))
#define | PARAM_SSP_MODE(n) ((n==SSP_SLAVE_MODE) || (n==SSP_MASTER_MODE))
#define | PARAM_SSP_DATABIT(n)
#define | PARAM_SSP_FRAME(n)
#define | PARAM_SSP_STAT(n)
#define | PARAM_SSP_INTCFG(n)
#define | PARAM_SSP_INTSTAT(n)
#define | PARAM_SSP_INTSTAT_RAW(n)
#define | PARAM_SSP_INTCLR(n) ((n==SSP_INTCLR_ROR) || (n==SSP_INTCLR_RT))
#define | PARAM_SSP_DMA(n) ((n==SSP_DMA_TX) || (n==SSP_DMA_RX))

Define Documentation

#define PARAM_SSP_CPHA ( n ) ((n==SSP_CPHA_FIRST) || (n==SSP_CPHA_SECOND))

Macro check clock phase control mode

Definition at line 317 of file lpc17xx_ssp.h.

#define PARAM_SSP_CPOL ( n ) ((n==SSP_CPOL_HI) || (n==SSP_CPOL_LO))

Macro check clock polarity mode

Definition at line 320 of file lpc17xx_ssp.h.

#define PARAM_SSP_DATABIT ( n )
Value:
((n==SSP_DATABIT_4) || (n==SSP_DATABIT_5) \
|| (n==SSP_DATABIT_6) || (n==SSP_DATABIT_16) \
|| (n==SSP_DATABIT_7) || (n==SSP_DATABIT_8) \
|| (n==SSP_DATABIT_9) || (n==SSP_DATABIT_10) \
|| (n==SSP_DATABIT_11) || (n==SSP_DATABIT_12) \
|| (n==SSP_DATABIT_13) || (n==SSP_DATABIT_14) \
|| (n==SSP_DATABIT_15))

Definition at line 326 of file lpc17xx_ssp.h.

#define PARAM_SSP_DMA ( n ) ((n==SSP_DMA_TX) || (n==SSP_DMA_RX))

Definition at line 359 of file lpc17xx_ssp.h.

#define PARAM_SSP_FRAME ( n )
Value:
((n==SSP_FRAME_SPI) || (n==SSP_FRAME_TI)\
|| (n==SSP_FRAME_MICROWIRE))

Definition at line 335 of file lpc17xx_ssp.h.

#define PARAM_SSP_INTCFG ( n )
Value:
((n==SSP_INTCFG_ROR) || (n==SSP_INTCFG_RT) \
|| (n==SSP_INTCFG_RX) || (n==SSP_INTCFG_TX))

Definition at line 344 of file lpc17xx_ssp.h.

#define PARAM_SSP_INTCLR ( n ) ((n==SSP_INTCLR_ROR) || (n==SSP_INTCLR_RT))

Definition at line 356 of file lpc17xx_ssp.h.

#define PARAM_SSP_INTSTAT ( n )
Value:
((n==SSP_INTSTAT_ROR) || (n==SSP_INTSTAT_RT) \
|| (n==SSP_INTSTAT_RX) || (n==SSP_INTSTAT_TX))

Definition at line 348 of file lpc17xx_ssp.h.

#define PARAM_SSP_INTSTAT_RAW ( n )
Value:
((n==SSP_INTSTAT_RAW_ROR) || (n==SSP_INTSTAT_RAW_RT) \
|| (n==SSP_INTSTAT_RAW_RX) || (n==SSP_INTSTAT_RAW_TX))

Definition at line 352 of file lpc17xx_ssp.h.

#define PARAM_SSP_MODE ( n ) ((n==SSP_SLAVE_MODE) || (n==SSP_MASTER_MODE))

Definition at line 323 of file lpc17xx_ssp.h.

#define PARAM_SSP_STAT ( n )
Value:
((n==SSP_STAT_TXFIFO_EMPTY) || (n==SSP_STAT_TXFIFO_NOTFULL) \
|| (n==SSP_STAT_RXFIFO_NOTEMPTY) || (n==SSP_STAT_RXFIFO_FULL) \
|| (n==SSP_STAT_BUSY))

Definition at line 339 of file lpc17xx_ssp.h.

#define PARAM_SSPx ( n )
Value:
((((uint32_t *)n)==((uint32_t *)LPC_SSP0)) \
|| (((uint32_t *)n)==((uint32_t *)LPC_SSP1)))

Macro to determine if it is valid SSP port number

Definition at line 313 of file lpc17xx_ssp.h.

#define SSP_CPSR_BITMASK ((uint32_t)(0xFF))

SSP CPSR bit mask

Definition at line 244 of file lpc17xx_ssp.h.

#define SSP_CPSR_CPDVSR ( n ) ((uint32_t)(n&0xFF))

Macro defines for CPSR register SSP clock prescaler

Definition at line 242 of file lpc17xx_ssp.h.

#define SSP_CR0_BITMASK ((uint32_t)(0xFFFF))

SSP CR0 bit mask

Definition at line 199 of file lpc17xx_ssp.h.

#define SSP_CR0_CPHA_SECOND ((uint32_t)(1<<7))

SPI clock out phase bit (used in SPI mode only), (1) = captures data on the second clock transition of the frame, (0) = first

Definition at line 194 of file lpc17xx_ssp.h.

#define SSP_CR0_CPOL_HI ((uint32_t)(1<<6))

SPI clock polarity bit (used in SPI mode only), (1) = maintains the bus clock high between frames, (0) = low

Definition at line 191 of file lpc17xx_ssp.h.

#define SSP_CR0_DSS ( n ) ((uint32_t)((n-1)&0xF))

Macro defines for CR0 register SSP data size select, must be 4 bits to 16 bits

Definition at line 182 of file lpc17xx_ssp.h.

#define SSP_CR0_FRF_MICROWIRE ((uint32_t)(2<<4))

SSP control 0 National Micro-wire mode

Definition at line 188 of file lpc17xx_ssp.h.

#define SSP_CR0_FRF_SPI ((uint32_t)(0<<4))

SSP control 0 Motorola SPI mode

Definition at line 184 of file lpc17xx_ssp.h.

#define SSP_CR0_FRF_TI ((uint32_t)(1<<4))

SSP control 0 TI synchronous serial mode

Definition at line 186 of file lpc17xx_ssp.h.

#define SSP_CR0_SCR ( n ) ((uint32_t)((n&0xFF)<<8))

SSP serial clock rate value load macro, divider rate is PERIPH_CLK / (cpsr * (SCR + 1))

Definition at line 197 of file lpc17xx_ssp.h.

#define SSP_CR1_BITMASK ((uint32_t)(0x0F))

SSP CR1 bit mask

Definition at line 214 of file lpc17xx_ssp.h.

#define SSP_CR1_LBM_EN ((uint32_t)(1<<0))

Macro defines for CR1 register SSP control 1 loopback mode enable bit

Definition at line 205 of file lpc17xx_ssp.h.

#define SSP_CR1_SLAVE_EN ((uint32_t)(1<<2))

SSP control 1 slave enable

Definition at line 209 of file lpc17xx_ssp.h.

#define SSP_CR1_SO_DISABLE ((uint32_t)(1<<3))

SSP control 1 slave out disable bit, disables transmit line in slave mode

Definition at line 212 of file lpc17xx_ssp.h.

#define SSP_CR1_SSP_EN ((uint32_t)(1<<1))

SSP control 1 enable bit

Definition at line 207 of file lpc17xx_ssp.h.

#define SSP_DMA_BITMASK ((uint32_t)(0x03))

DMACR bit mask

Definition at line 308 of file lpc17xx_ssp.h.

#define SSP_DMA_RXDMA_EN ((uint32_t)(1<<0))

Macro defines for DMACR register SSP bit for enabling RX DMA

Definition at line 304 of file lpc17xx_ssp.h.

#define SSP_DMA_TXDMA_EN ((uint32_t)(1<<1))

SSP bit for enabling TX DMA

Definition at line 306 of file lpc17xx_ssp.h.

#define SSP_DR_BITMASK ( n ) ((n)&0xFFFF)

Macro defines for DR register SSP data bit mask

Definition at line 220 of file lpc17xx_ssp.h.

#define SSP_ICR_BITMASK ((uint32_t)(0x03))

ICR bit mask

Definition at line 298 of file lpc17xx_ssp.h.

#define SSP_ICR_ROR ((uint32_t)(1<<0))

Macro define for (ICR) Interrupt Clear registers Writing a 1 to this bit clears the "frame was received when RxFIFO was full" interrupt

Definition at line 293 of file lpc17xx_ssp.h.

#define SSP_ICR_RT ((uint32_t)(1<<1))

Writing a 1 to this bit clears the "Rx FIFO was not empty and has not been read for a timeout period" interrupt

Definition at line 296 of file lpc17xx_ssp.h.

#define SSP_IMSC_BITMASK ((uint32_t)(0x0F))

IMSC bit mask

Definition at line 258 of file lpc17xx_ssp.h.

#define SSP_IMSC_ROR ((uint32_t)(1<<0))

Macro define for (IMSC) Interrupt Mask Set/Clear registers Receive Overrun

Definition at line 250 of file lpc17xx_ssp.h.

#define SSP_IMSC_RT ((uint32_t)(1<<1))

Receive TimeOut

Definition at line 252 of file lpc17xx_ssp.h.

#define SSP_IMSC_RX ((uint32_t)(1<<2))

Rx FIFO is at least half full

Definition at line 254 of file lpc17xx_ssp.h.

#define SSP_IMSC_TX ((uint32_t)(1<<3))

Tx FIFO is at least half empty

Definition at line 256 of file lpc17xx_ssp.h.

#define SSP_MIS_BITMASK ((uint32_t)(0x0F))

MIS bit mask

Definition at line 286 of file lpc17xx_ssp.h.

#define SSP_MIS_ROR ((uint32_t)(1<<0))

Macro define for (MIS) Masked Interrupt Status registers Receive Overrun

Definition at line 278 of file lpc17xx_ssp.h.

#define SSP_MIS_RT ((uint32_t)(1<<1))

Receive TimeOut

Definition at line 280 of file lpc17xx_ssp.h.

#define SSP_MIS_RX ((uint32_t)(1<<2))

Rx FIFO is at least half full

Definition at line 282 of file lpc17xx_ssp.h.

#define SSP_MIS_TX ((uint32_t)(1<<3))

Tx FIFO is at least half empty

Definition at line 284 of file lpc17xx_ssp.h.

#define SSP_RIS_BITMASK ((uint32_t)(0x0F))

RIS bit mask

Definition at line 272 of file lpc17xx_ssp.h.

#define SSP_RIS_ROR ((uint32_t)(1<<0))

Macro define for (RIS) Raw Interrupt Status registers Receive Overrun

Definition at line 264 of file lpc17xx_ssp.h.

#define SSP_RIS_RT ((uint32_t)(1<<1))

Receive TimeOut

Definition at line 266 of file lpc17xx_ssp.h.

#define SSP_RIS_RX ((uint32_t)(1<<2))

Rx FIFO is at least half full

Definition at line 268 of file lpc17xx_ssp.h.

#define SSP_RIS_TX ((uint32_t)(1<<3))

Tx FIFO is at least half empty

Definition at line 270 of file lpc17xx_ssp.h.

#define SSP_SR_BITMASK ((uint32_t)(0x1F))

SSP SR bit mask

Definition at line 236 of file lpc17xx_ssp.h.

#define SSP_SR_BSY ((uint32_t)(1<<4))

SSP status SSP Busy bit

Definition at line 234 of file lpc17xx_ssp.h.

#define SSP_SR_RFF ((uint32_t)(1<<3))

SSP status RX FIFO full bit

Definition at line 232 of file lpc17xx_ssp.h.

#define SSP_SR_RNE ((uint32_t)(1<<2))

SSP status RX FIFO not empty bit

Definition at line 230 of file lpc17xx_ssp.h.

#define SSP_SR_TFE ((uint32_t)(1<<0))

Macro defines for SR register SSP status TX FIFO Empty bit

Definition at line 226 of file lpc17xx_ssp.h.

#define SSP_SR_TNF ((uint32_t)(1<<1))

SSP status TX FIFO not full bit

Definition at line 228 of file lpc17xx_ssp.h.

Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SSP Public Types

Data Structures | Enumerations
SSP Public Types
SSP (Synchronous Serial Port)

Data Structures

struct | SSP_CFG_Type
SSP configuration structure. More...
struct | SSP_DATA_SETUP_Type
SPI Data configuration structure definitions. More...

Enumerations

enum | SSP_TRANSFER_Type { SSP_TRANSFER_POLLING = 0, SSP_TRANSFER_INTERRUPT }
SSP Transfer Type definitions. More...

Enumeration Type Documentation

enum SSP_TRANSFER_Type

SSP Transfer Type definitions.

Enumerator:
SSP_TRANSFER_POLLING

Polling transfer

SSP_TRANSFER_INTERRUPT

Interrupt transfer

Definition at line 393 of file lpc17xx_ssp.h.

Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SSP Public Functions

Functions
SSP Public Functions
SSP (Synchronous Serial Port)

Functions

void | SSP_Init (LPC_SSP_TypeDef *SSPx, SSP_CFG_Type *SSP_ConfigStruct)
Initializes the SSPx peripheral according to the specified parameters in the SSP_ConfigStruct.
void | SSP_DeInit (LPC_SSP_TypeDef *SSPx)
De-initializes the SSPx peripheral registers to their default reset values.
void | SSP_ConfigStructInit (SSP_CFG_Type *SSP_InitStruct)
Fills each SSP_InitStruct member with its default value:
void | SSP_Cmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState)
Enable or disable SSP peripheral's operation.
void | SSP_LoopBackCmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState)
Enable or disable Loop Back mode function in SSP peripheral.
void | SSP_SlaveOutputCmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState)
Enable or disable Slave Output function in SSP peripheral.
void | SSP_DMACmd (LPC_SSP_TypeDef *SSPx, uint32_t DMAMode, FunctionalState NewState)
Enable/Disable DMA function for SSP peripheral.
FlagStatus | SSP_GetStatus (LPC_SSP_TypeDef *SSPx, uint32_t FlagType)
Checks whether the specified SSP status flag is set or not.
uint8_t | SSP_GetDataSize (LPC_SSP_TypeDef *SSPx)
Get data size bit selected.
IntStatus | SSP_GetRawIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t RawIntType)
Check whether the specified Raw interrupt status flag is set or not.
uint32_t | SSP_GetRawIntStatusReg (LPC_SSP_TypeDef *SSPx)
Get Raw Interrupt Status register.
IntStatus | SSP_GetIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t IntType)
Check whether the specified interrupt status flag is set or not.
void | SSP_SendData (LPC_SSP_TypeDef *SSPx, uint16_t Data)
Transmit a single data through SSPx peripheral.
uint16_t | SSP_ReceiveData (LPC_SSP_TypeDef *SSPx)
Receive a single data from SSPx peripheral.
int32_t | SSP_ReadWrite (LPC_SSP_TypeDef *SSPx, SSP_DATA_SETUP_Type *dataCfg, SSP_TRANSFER_Type xfType)
SSP Read write data function.
void | SSP_IntConfig (LPC_SSP_TypeDef *SSPx, uint32_t IntType, FunctionalState NewState)
Enable or disable specified interrupt type in SSP peripheral.
void | SSP_ClearIntPending (LPC_SSP_TypeDef *SSPx, uint32_t IntType)
Clear specified interrupt pending in SSP peripheral.

Function Documentation

void SSP_ClearIntPending | ( | LPC_SSP_TypeDef * | SSPx,
 |  | uint32_t | IntType
 | ) |  |

Clear specified interrupt pending in SSP peripheral.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
    • LPC_SSP1: SSP1 peripheral
[in] IntType Interrupt pending to clear, should be:
  • SSP_INTCLR_ROR: clears the "frame was received when RxFIFO was full" interrupt.
  • SSP_INTCLR_RT: clears the "Rx FIFO was not empty and has not been read for a timeout period" interrupt.
Returns:
None

Definition at line 639 of file lpc17xx_ssp.c.

void SSP_Cmd | ( | LPC_SSP_TypeDef * | SSPx,
 |  | FunctionalState | NewState
 | ) |  |

Enable or disable SSP peripheral's operation.

Parameters:
[in] SSPx SSP peripheral, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
[in] NewState New State of SSPx peripheral's operation
Returns:
none

Definition at line 227 of file lpc17xx_ssp.c.

void SSP_ConfigStructInit ( SSP_CFG_Type * SSP_InitStruct )

Fills each SSP_InitStruct member with its default value:

  • CPHA = SSP_CPHA_FIRST
  • CPOL = SSP_CPOL_HI
  • ClockRate = 1000000
  • Databit = SSP_DATABIT_8
  • Mode = SSP_MASTER_MODE
  • FrameFormat = SSP_FRAME_SSP
    Parameters:
    [in] SSP_InitStruct Pointer to a SSP_CFG_Type structure which will be initialized.
    Returns:
    None

Definition at line 208 of file lpc17xx_ssp.c.

void SSP_DeInit ( LPC_SSP_TypeDef * SSPx )

De-initializes the SSPx peripheral registers to their default reset values.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
Returns:
None

Definition at line 166 of file lpc17xx_ssp.c.

void SSP_DMACmd | ( | LPC_SSP_TypeDef * | SSPx,
 |  | uint32_t | DMAMode,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable DMA function for SSP peripheral.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
    • LPC_SSP1: SSP1 peripheral
[in] DMAMode Type of DMA, should be:
  • SSP_DMA_TX: DMA for the transmit FIFO
  • SSP_DMA_RX: DMA for the Receive FIFO
[in] NewState New State of DMA function on SSP peripheral, should be:
  • ENALBE: Enable this function
  • DISABLE: Disable this function
Returns:
None

Definition at line 661 of file lpc17xx_ssp.c.

uint8_t SSP_GetDataSize ( LPC_SSP_TypeDef * SSPx )

Get data size bit selected.

Parameters:
[in] SSPx pointer to LPC_SSP_TypeDef structure, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
Returns:
Data size, could be:
  • SSP_DATABIT_4: 4 bit transfer
  • SSP_DATABIT_5: 5 bit transfer ...
  • SSP_DATABIT_16: 16 bit transfer

Definition at line 190 of file lpc17xx_ssp.c.

IntStatus SSP_GetIntStatus | ( | LPC_SSP_TypeDef * | SSPx,
 |  | uint32_t | IntType
 | ) |  |

Check whether the specified interrupt status flag is set or not.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
[in] IntType Raw Interrupt Type, should be:
  • SSP_INTSTAT_ROR: Receive Overrun interrupt
  • SSP_INTSTAT_RT: Receive Time out interrupt
  • SSP_INTSTAT_RX: RX FIFO is at least half full interrupt
  • SSP_INTSTAT_TX: TX FIFO is at least half empty interrupt
Returns:
New State of specified interrupt status flag in SSP peripheral Note: Enabling/Disabling specified interrupt in SSP peripheral effects to Interrupt Status flag.

Definition at line 619 of file lpc17xx_ssp.c.

IntStatus SSP_GetRawIntStatus | ( | LPC_SSP_TypeDef * | SSPx,
 |  | uint32_t | RawIntType
 | ) |  |

Check whether the specified Raw interrupt status flag is set or not.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
[in] RawIntType Raw Interrupt Type, should be:
  • SSP_INTSTAT_RAW_ROR: Receive Overrun interrupt
  • SSP_INTSTAT_RAW_RT: Receive Time out interrupt
  • SSP_INTSTAT_RAW_RX: RX FIFO is at least half full interrupt
  • SSP_INTSTAT_RAW_TX: TX FIFO is at least half empty interrupt
Returns:
New State of specified Raw interrupt status flag in SSP peripheral Note: Enabling/Disabling specified interrupt in SSP peripheral does not effect to Raw Interrupt Status flag.

Definition at line 583 of file lpc17xx_ssp.c.

uint32_t SSP_GetRawIntStatusReg ( LPC_SSP_TypeDef * SSPx )

Get Raw Interrupt Status register.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
Returns:
Raw Interrupt Status (RIS) register value

Definition at line 598 of file lpc17xx_ssp.c.

FlagStatus SSP_GetStatus | ( | LPC_SSP_TypeDef * | SSPx,
 |  | uint32_t | FlagType
 | ) |  |

Checks whether the specified SSP status flag is set or not.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
[in] FlagType Type of flag to check status, should be one of following:
  • SSP_STAT_TXFIFO_EMPTY: TX FIFO is empty
  • SSP_STAT_TXFIFO_NOTFULL: TX FIFO is not full
  • SSP_STAT_RXFIFO_NOTEMPTY: RX FIFO is not empty
  • SSP_STAT_RXFIFO_FULL: RX FIFO is full
  • SSP_STAT_BUSY: SSP peripheral is busy
Returns:
New State of specified SSP status flag

Definition at line 530 of file lpc17xx_ssp.c.

void SSP_Init | ( | LPC_SSP_TypeDef * | SSPx,
 |  | SSP_CFG_Type * | SSP_ConfigStruct
 | ) |  |

Initializes the SSPx peripheral according to the specified parameters in the SSP_ConfigStruct.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
[in] SSP_ConfigStruct Pointer to a SSP_CFG_Type structure that contains the configuration information for the specified SSP peripheral.
Returns:
None

Definition at line 125 of file lpc17xx_ssp.c.

void SSP_IntConfig | ( | LPC_SSP_TypeDef * | SSPx,
 |  | uint32_t | IntType,
 |  | FunctionalState | NewState
 | ) |  |

Enable or disable specified interrupt type in SSP peripheral.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
[in] IntType Interrupt type in SSP peripheral, should be:
  • SSP_INTCFG_ROR: Receive Overrun interrupt
  • SSP_INTCFG_RT: Receive Time out interrupt
  • SSP_INTCFG_RX: RX FIFO is at least half full interrupt
  • SSP_INTCFG_TX: TX FIFO is at least half empty interrupt
[in] NewState New State of specified interrupt type, should be:
  • ENABLE: Enable this interrupt type
  • DISABLE: Disable this interrupt type
Returns:
None Note: We can enable/disable multi-interrupt type by OR multi value

Definition at line 554 of file lpc17xx_ssp.c.

void SSP_LoopBackCmd | ( | LPC_SSP_TypeDef * | SSPx,
 |  | FunctionalState | NewState
 | ) |  |

Enable or disable Loop Back mode function in SSP peripheral.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
    • LPC_SSP1: SSP1 peripheral
[in] NewState New State of Loop Back mode, should be:
  • ENABLE: Enable this function
  • DISABLE: Disable this function
Returns:
None

Definition at line 252 of file lpc17xx_ssp.c.

int32_t SSP_ReadWrite | ( | LPC_SSP_TypeDef * | SSPx,
 |  | SSP_DATA_SETUP_Type * | dataCfg,
 |  | SSP_TRANSFER_Type | xfType
 | ) |  |

SSP Read write data function.

Parameters:
[in] SSPx Pointer to SSP peripheral, should be
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
[in] dataCfg Pointer to a SSP_DATA_SETUP_Type structure that contains specified information about transmit data configuration.
[in] xfType Transfer type, should be:
  • SSP_TRANSFER_POLLING: Polling mode
  • SSP_TRANSFER_INTERRUPT: Interrupt mode
Returns:
Actual Data length has been transferred in polling mode. In interrupt mode, always return (0) Return (-1) if error. Note: This function can be used in both master and slave mode.

Definition at line 345 of file lpc17xx_ssp.c.

uint16_t SSP_ReceiveData ( LPC_SSP_TypeDef * SSPx )

Receive a single data from SSPx peripheral.

Parameters:
[in] SSPx SSP peripheral selected, should be
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
Returns:
Data received (16-bit long)

Definition at line 322 of file lpc17xx_ssp.c.

void SSP_SendData | ( | LPC_SSP_TypeDef * | SSPx,
 |  | uint16_t | Data
 | ) |  |

Transmit a single data through SSPx peripheral.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
[in] Data Data to transmit (must be 16 or 8-bit long, this depend on SSP data bit number configured)
Returns:
none

Definition at line 306 of file lpc17xx_ssp.c.

void SSP_SlaveOutputCmd | ( | LPC_SSP_TypeDef * | SSPx,
 |  | FunctionalState | NewState
 | ) |  |

Enable or disable Slave Output function in SSP peripheral.

Parameters:
[in] SSPx SSP peripheral selected, should be:
  • LPC_SSP0: SSP0 peripheral
  • LPC_SSP1: SSP1 peripheral
[in] NewState New State of Slave Output function, should be:
  • ENABLE: Slave Output in normal operation
  • DISABLE: Slave Output is disabled. This blocks SSP controller from driving the transmit data line (MISO) Note: This function is available when SSP peripheral in Slave mode
Returns:
None

Definition at line 280 of file lpc17xx_ssp.c.

Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SYSTICK (System Tick)

Modules
SYSTICK (System Tick)
LPC1700CMSIS Firmware Library

Modules

SYSTICK Private Macros
SYSTICK Public Functions
Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SYSTICK Private Macros

Defines
SYSTICK Private Macros
SYSTICK (System Tick)

Defines

#define | ST_CTRL_ENABLE ((uint32_t)(1<<0))
#define | ST_CTRL_TICKINT ((uint32_t)(1<<1))
#define | ST_CTRL_CLKSOURCE ((uint32_t)(1<<2))
#define | ST_CTRL_COUNTFLAG ((uint32_t)(1<<16))
#define | ST_RELOAD_RELOAD(n) ((uint32_t)(n & 0x00FFFFFF))
#define | ST_RELOAD_CURRENT(n) ((uint32_t)(n & 0x00FFFFFF))
#define | ST_CALIB_TENMS(n) ((uint32_t)(n & 0x00FFFFFF))
#define | ST_CALIB_SKEW ((uint32_t)(1<<30))
#define | ST_CALIB_NOREF ((uint32_t)(1<<31))
#define | CLKSOURCE_EXT ((uint32_t)(0))
#define | CLKSOURCE_CPU ((uint32_t)(1))

Define Documentation

#define CLKSOURCE_CPU ((uint32_t)(1))

Definition at line 77 of file lpc17xx_systick.h.

#define CLKSOURCE_EXT ((uint32_t)(0))

Definition at line 76 of file lpc17xx_systick.h.

#define ST_CALIB_NOREF ((uint32_t)(1<<31))

Definition at line 74 of file lpc17xx_systick.h.

#define ST_CALIB_SKEW ((uint32_t)(1<<30))

Definition at line 73 of file lpc17xx_systick.h.

#define ST_CALIB_TENMS ( n ) ((uint32_t)(n & 0x00FFFFFF))

Macro defines for System Timer Calibration value (STCALIB) register

Definition at line 72 of file lpc17xx_systick.h.

#define ST_CTRL_CLKSOURCE ((uint32_t)(1<<2))

Definition at line 56 of file lpc17xx_systick.h.

#define ST_CTRL_COUNTFLAG ((uint32_t)(1<<16))

Definition at line 57 of file lpc17xx_systick.h.

#define ST_CTRL_ENABLE ((uint32_t)(1<<0))

Macro defines for System Timer Control and status (STCTRL) register

Definition at line 54 of file lpc17xx_systick.h.

#define ST_CTRL_TICKINT ((uint32_t)(1<<1))

Definition at line 55 of file lpc17xx_systick.h.

#define ST_RELOAD_CURRENT ( n ) ((uint32_t)(n & 0x00FFFFFF))

Macro defines for System Timer Current value (STCURRENT) register

Definition at line 67 of file lpc17xx_systick.h.

#define ST_RELOAD_RELOAD ( n ) ((uint32_t)(n & 0x00FFFFFF))

Macro defines for System Timer Reload value (STRELOAD) register

Definition at line 62 of file lpc17xx_systick.h.

Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SYSTICK Public Functions

Functions
SYSTICK Public Functions
SYSTICK (System Tick)

Functions

void | SYSTICK_InternalInit (uint32_t time)
Initial System Tick with using internal CPU clock source.
void | SYSTICK_ExternalInit (uint32_t freq, uint32_t time)
Initial System Tick with using external clock source.
void | SYSTICK_Cmd (FunctionalState NewState)
Enable/disable System Tick counter.
void | SYSTICK_IntCmd (FunctionalState NewState)
Enable/disable System Tick interrupt.
uint32_t | SYSTICK_GetCurrentValue (void)
Get current value of System Tick counter.
void | SYSTICK_ClearCounterFlag (void)
Clear Counter flag.

Function Documentation

void SYSTICK_ClearCounterFlag ( void )

Clear Counter flag.

Parameters:
[in] None
Returns:
None

Definition at line 172 of file lpc17xx_systick.c.

void SYSTICK_Cmd ( FunctionalState NewState )

Enable/disable System Tick counter.

Parameters:
[in] NewState System Tick counter status, should be:
  • ENABLE
  • DISABLE
Returns:
None

Definition at line 126 of file lpc17xx_systick.c.

void SYSTICK_ExternalInit | ( | uint32_t | freq,
 |  | uint32_t | time
 | ) |  |

Initial System Tick with using external clock source.

Parameters:
[in] | freq | external clock frequency(Hz)
[in] | time | time interval(ms)
Returns:
None

Definition at line 92 of file lpc17xx_systick.c.

uint32_t SYSTICK_GetCurrentValue ( void )

Get current value of System Tick counter.

Parameters:
[in] None
Returns:
current value of System Tick counter

Definition at line 162 of file lpc17xx_systick.c.

void SYSTICK_IntCmd ( FunctionalState NewState )

Enable/disable System Tick interrupt.

Parameters:
[in] NewState System Tick interrupt status, should be:
  • ENABLE
  • DISABLE
Returns:
None

Definition at line 145 of file lpc17xx_systick.c.

void SYSTICK_InternalInit ( uint32_t time )

Initial System Tick with using internal CPU clock source.

Parameters:
[in] time time interval(ms)
Returns:
None

Definition at line 58 of file lpc17xx_systick.c.

Generated on Mon Nov 28 2011 11:15:17 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TIM (Timer)

Modules
TIM (Timer)
LPC1700CMSIS Firmware Library

Modules

TIM Private Macros
TIM Public Types
TIM Public Functions
Generated on Mon Nov 28 2011 11:15:18 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TIM Private Macros

Defines
TIM Private Macros
TIM (Timer)

Defines

#define | TIM_IR_CLR(n) _BIT(n)
#define | TIM_MATCH_INT(n) (_BIT(n & 0x0F))
#define | TIM_CAP_INT(n) (_BIT(((n & 0x0F) + 4)))
#define | TIM_ENABLE ((uint32_t)(1<<0))
#define | TIM_RESET ((uint32_t)(1<<1))
#define | TIM_TCR_MASKBIT ((uint32_t)(3))
#define | TIM_INT_ON_MATCH(n) (_BIT((n * 3)))
#define | TIM_RESET_ON_MATCH(n) (_BIT(((n * 3) + 1)))
#define | TIM_STOP_ON_MATCH(n) (_BIT(((n * 3) + 2)))
#define | TIM_MCR_MASKBIT ((uint32_t)(0x0FFF))
#define | TIM_MCR_CHANNEL_MASKBIT(n) ((uint32_t)(7<<(n*3)))
#define | TIM_CAP_RISING(n) (_BIT((n * 3)))
#define | TIM_CAP_FALLING(n) (_BIT(((n * 3) + 1)))
#define | TIM_INT_ON_CAP(n) (_BIT(((n * 3) + 2)))
#define | TIM_EDGE_MASK(n) (_SBF((n * 3), 0x03))
#define | TIM_CCR_MASKBIT ((uint32_t)(0x3F))
#define | TIM_CCR_CHANNEL_MASKBIT(n) ((uint32_t)(7<<(n*3)))
#define | TIM_EM(n) _BIT(n)
#define | TIM_EM_NOTHING ((uint8_t)(0x0))
#define | TIM_EM_LOW ((uint8_t)(0x1))
#define | TIM_EM_HIGH ((uint8_t)(0x2))
#define | TIM_EM_TOGGLE ((uint8_t)(0x3))
#define | TIM_EM_SET(n, s) (_SBF(((n << 1) + 4), (s & 0x03)))
#define | TIM_EM_MASK(n) (_SBF(((n << 1) + 4), 0x03))
#define | TIM_EMR_MASKBIT 0x0FFF
#define | TIM_CTCR_MODE_MASK 0x3
#define | TIM_CTCR_INPUT_MASK 0xC
#define | TIM_CTCR_MASKBIT 0xF
#define | TIM_COUNTER_MODE ((uint8_t)(1))
#define | PARAM_TIMx(n)
#define | PARAM_TIM_INT_TYPE(TYPE)
#define | PARAM_TIM_MODE_OPT(MODE)
#define | PARAM_TIM_PRESCALE_OPT(OPT) ((OPT == TIM_PRESCALE_TICKVAL)||(OPT == TIM_PRESCALE_USVAL))
#define | PARAM_TIM_COUNTER_INPUT_OPT(OPT) ((OPT == TIM_COUNTER_INCAP0)||(OPT == TIM_COUNTER_INCAP1))
#define | PARAM_TIM_EXTMATCH_OPT(OPT)
#define | PARAM_TIM_CAP_MODE_OPT(OPT)

Define Documentation

#define PARAM_TIM_CAP_MODE_OPT ( OPT )
Value:
((OPT == TIM_CAPTURE_NONE)||(OPT == TIM_CAPTURE_RISING) \
||(OPT == TIM_CAPTURE_FALLING)||(OPT == TIM_CAPTURE_ANY))

Definition at line 163 of file lpc17xx_timer.h.

#define PARAM_TIM_COUNTER_INPUT_OPT ( OPT ) ((OPT == TIM_COUNTER_INCAP0)||(OPT == TIM_COUNTER_INCAP1))

Definition at line 156 of file lpc17xx_timer.h.

#define PARAM_TIM_EXTMATCH_OPT ( OPT )
Value:
((OPT == TIM_EXTMATCH_NOTHING)||(OPT == TIM_EXTMATCH_LOW)\
||(OPT == TIM_EXTMATCH_HIGH)||(OPT == TIM_EXTMATCH_TOGGLE))

Definition at line 159 of file lpc17xx_timer.h.

#define PARAM_TIM_INT_TYPE ( TYPE )
Value:
((TYPE ==TIM_MR0_INT)||(TYPE ==TIM_MR1_INT)\
||(TYPE ==TIM_MR2_INT)||(TYPE ==TIM_MR3_INT)\
||(TYPE ==TIM_CR0_INT)||(TYPE ==TIM_CR1_INT))

Definition at line 144 of file lpc17xx_timer.h.

#define PARAM_TIM_MODE_OPT ( MODE )
Value:
((MODE == TIM_TIMER_MODE)||(MODE == TIM_COUNTER_RISING_MODE)\
|| (MODE == TIM_COUNTER_RISING_MODE)||(MODE == TIM_COUNTER_RISING_MODE))

Definition at line 149 of file lpc17xx_timer.h.

#define PARAM_TIM_PRESCALE_OPT ( OPT ) ((OPT == TIM_PRESCALE_TICKVAL)||(OPT == TIM_PRESCALE_USVAL))

Definition at line 153 of file lpc17xx_timer.h.

#define PARAM_TIMx ( n )
Value:
((((uint32_t *)n)==((uint32_t *)LPC_TIM0)) || (((uint32_t *)n)==((uint32_t *)LPC_TIM1)) \
|| (((uint32_t *)n)==((uint32_t *)LPC_TIM2)) || (((uint32_t *)n)==((uint32_t *)LPC_TIM3)))

Macro to determine if it is valid TIMER peripheral

Definition at line 140 of file lpc17xx_timer.h.

#define TIM_CAP_FALLING ( n ) (_BIT(((n * 3) + 1)))

Bit location for CAP.n on CRx falling edge, n = 0 to 3

Definition at line 95 of file lpc17xx_timer.h.

#define TIM_CAP_INT ( n ) (_BIT(((n & 0x0F) + 4)))

Macro for getting a capture event interrupt bit

Definition at line 63 of file lpc17xx_timer.h.

#define TIM_CAP_RISING ( n ) (_BIT((n * 3)))

Bit location for CAP.n on CRx rising edge, n = 0 to 3

Definition at line 93 of file lpc17xx_timer.h.

#define TIM_CCR_CHANNEL_MASKBIT ( n ) ((uint32_t)(7<<(n*3)))

Timer Capture control bit mask for specific channel

Definition at line 103 of file lpc17xx_timer.h.

#define TIM_CCR_MASKBIT ((uint32_t)(0x3F))

Timer capture control bit mask

Definition at line 101 of file lpc17xx_timer.h.

#define TIM_COUNTER_MODE ((uint8_t)(1))

Definition at line 135 of file lpc17xx_timer.h.

#define TIM_CTCR_INPUT_MASK 0xC

Mask to get the count input select bits

Definition at line 132 of file lpc17xx_timer.h.

#define TIM_CTCR_MASKBIT 0xF

Timer Count control bit mask

Definition at line 134 of file lpc17xx_timer.h.

#define TIM_CTCR_MODE_MASK 0x3

Mask to get the Counter/timer mode bits

Definition at line 130 of file lpc17xx_timer.h.

#define TIM_EDGE_MASK ( n ) (_SBF((n * 3), 0x03))

Mask bit for rising and falling edge bit

Definition at line 99 of file lpc17xx_timer.h.

#define TIM_EM ( n ) _BIT(n)

Bit location for output state change of MAT.n when external match happens, n = 0 to 3

Definition at line 110 of file lpc17xx_timer.h.

#define TIM_EM_HIGH ((uint8_t)(0x2))

Output state change of MAT.n when external match happens: high

Definition at line 116 of file lpc17xx_timer.h.

#define TIM_EM_LOW ((uint8_t)(0x1))

Output state change of MAT.n when external match happens: low

Definition at line 114 of file lpc17xx_timer.h.

#define TIM_EM_MASK ( n ) (_SBF(((n << 1) + 4), 0x03))

Mask for the MAT.n change state bits

Definition at line 122 of file lpc17xx_timer.h.

#define TIM_EM_NOTHING ((uint8_t)(0x0))

Output state change of MAT.n when external match happens: no change

Definition at line 112 of file lpc17xx_timer.h.

#define TIM_EM_SET | ( | n,
 |  | s
 | ) | (_SBF(((n << 1) + 4), (s & 0x03)))

Macro for setting for the MAT.n change state bits

Definition at line 120 of file lpc17xx_timer.h.

#define TIM_EM_TOGGLE ((uint8_t)(0x3))

Output state change of MAT.n when external match happens: toggle

Definition at line 118 of file lpc17xx_timer.h.

#define TIM_EMR_MASKBIT 0x0FFF

Timer external match bit mask

Definition at line 124 of file lpc17xx_timer.h.

#define TIM_ENABLE ((uint32_t)(1<<0))

Timer/counter enable bit

Definition at line 69 of file lpc17xx_timer.h.

#define TIM_INT_ON_CAP ( n ) (_BIT(((n * 3) + 2)))

Bit location for CAP.n on CRx interrupt enable, n = 0 to 3

Definition at line 97 of file lpc17xx_timer.h.

#define TIM_INT_ON_MATCH ( n ) (_BIT((n * 3)))

Bit location for interrupt on MRx match, n = 0 to 3

Definition at line 79 of file lpc17xx_timer.h.

#define TIM_IR_CLR ( n ) _BIT(n)

Macro to clean interrupt pending

Definition at line 55 of file lpc17xx_timer.h.

#define TIM_MATCH_INT ( n ) (_BIT(n & 0x0F))

Macro for getting a timer match interrupt bit

Definition at line 61 of file lpc17xx_timer.h.

#define TIM_MCR_CHANNEL_MASKBIT ( n ) ((uint32_t)(7<<(n*3)))

Timer Match control bit mask for specific channel

Definition at line 87 of file lpc17xx_timer.h.

#define TIM_MCR_MASKBIT ((uint32_t)(0x0FFF))

Timer Match control bit mask

Definition at line 85 of file lpc17xx_timer.h.

#define TIM_RESET ((uint32_t)(1<<1))

Timer/counter reset bit

Definition at line 71 of file lpc17xx_timer.h.

#define TIM_RESET_ON_MATCH ( n ) (_BIT(((n * 3) + 1)))

Bit location for reset on MRx match, n = 0 to 3

Definition at line 81 of file lpc17xx_timer.h.

#define TIM_STOP_ON_MATCH ( n ) (_BIT(((n * 3) + 2)))

Bit location for stop on MRx match, n = 0 to 3

Definition at line 83 of file lpc17xx_timer.h.

#define TIM_TCR_MASKBIT ((uint32_t)(3))

Timer control bit mask

Definition at line 73 of file lpc17xx_timer.h.

Generated on Mon Nov 28 2011 11:15:18 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TIM Public Types

Data Structures | Enumerations
TIM Public Types
TIM (Timer)

Data Structures

struct | TIM_TIMERCFG_Type
Configuration structure in TIMER mode. More...
struct | TIM_COUNTERCFG_Type
Configuration structure in COUNTER mode. More...
struct | TIM_MATCHCFG_Type
Match channel configuration structure. More...
struct | TIM_CAPTURECFG_Type
Capture Input configuration structure. More...

Enumerations

enum TIM_INT_TYPE {
TIM_MR0_INT = 0, TIM_MR1_INT = 1, TIM_MR2_INT = 2, TIM_MR3_INT = 3,
TIM_CR0_INT = 4, TIM_CR1_INT = 5
}
interrupt type More...
enum | TIM_MODE_OPT { TIM_TIMER_MODE = 0, TIM_COUNTER_RISING_MODE, TIM_COUNTER_FALLING_MODE, TIM_COUNTER_ANY_MODE }
Timer/counter operating mode. More...
enum | TIM_PRESCALE_OPT { TIM_PRESCALE_TICKVAL = 0, TIM_PRESCALE_USVAL }
Timer/Counter prescale option. More...
enum | TIM_COUNTER_INPUT_OPT { TIM_COUNTER_INCAP0 = 0, TIM_COUNTER_INCAP1 }
Counter input option. More...
enum | TIM_EXTMATCH_OPT { TIM_EXTMATCH_NOTHING = 0, TIM_EXTMATCH_LOW, TIM_EXTMATCH_HIGH, TIM_EXTMATCH_TOGGLE }
Timer/Counter external match option. More...
enum | TIM_CAP_MODE_OPT { TIM_CAPTURE_NONE = 0, TIM_CAPTURE_RISING, TIM_CAPTURE_FALLING, TIM_CAPTURE_ANY }
Timer/counter capture mode options. More...

Enumeration Type Documentation

enum TIM_CAP_MODE_OPT

Timer/counter capture mode options.

Enumerator:
TIM_CAPTURE_NONE

No Capture

TIM_CAPTURE_RISING

Rising capture mode

TIM_CAPTURE_FALLING

Falling capture mode

TIM_CAPTURE_ANY

On both edges

Definition at line 223 of file lpc17xx_timer.h.

enum TIM_COUNTER_INPUT_OPT

Counter input option.

Enumerator:
TIM_COUNTER_INCAP0

CAPn.0 input pin for TIMERn

TIM_COUNTER_INCAP1

CAPn.1 input pin for TIMERn

Definition at line 207 of file lpc17xx_timer.h.

enum TIM_EXTMATCH_OPT

Timer/Counter external match option.

Enumerator:
TIM_EXTMATCH_NOTHING

Do nothing for external output pin if match

TIM_EXTMATCH_LOW

Force external output pin to low if match

TIM_EXTMATCH_HIGH

Force external output pin to high if match

TIM_EXTMATCH_TOGGLE

Toggle external output pin if match

Definition at line 214 of file lpc17xx_timer.h.

enum TIM_INT_TYPE

interrupt type

Enumerator:
TIM_MR0_INT

interrupt for Match channel 0

TIM_MR1_INT

interrupt for Match channel 1

TIM_MR2_INT

interrupt for Match channel 2

TIM_MR3_INT

interrupt for Match channel 3

TIM_CR0_INT

interrupt for Capture channel 0

TIM_CR1_INT

interrupt for Capture channel 1

Definition at line 180 of file lpc17xx_timer.h.

enum TIM_MODE_OPT

Timer/counter operating mode.

Enumerator:
TIM_TIMER_MODE

Timer mode

TIM_COUNTER_RISING_MODE

Counter rising mode

TIM_COUNTER_FALLING_MODE

Counter falling mode

TIM_COUNTER_ANY_MODE

Counter on both edges

Definition at line 191 of file lpc17xx_timer.h.

enum TIM_PRESCALE_OPT

Timer/Counter prescale option.

Enumerator:
TIM_PRESCALE_TICKVAL

Prescale in absolute value

TIM_PRESCALE_USVAL

Prescale in microsecond value

Definition at line 200 of file lpc17xx_timer.h.

Generated on Mon Nov 28 2011 11:15:18 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TIM Public Functions

Functions
TIM Public Functions
TIM (Timer)

Functions

void | TIM_Init (LPC_TIM_TypeDef *TIMx, TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct)
Initial Timer/Counter device Set Clock frequency for Timer Set initial configuration for Timer.
void | TIM_DeInit (LPC_TIM_TypeDef *TIMx)
Close Timer/Counter device.
void | TIM_ClearIntPending (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Clear Interrupt pending.
void | TIM_ClearIntCapturePending (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Clear Capture Interrupt pending.
FlagStatus | TIM_GetIntStatus (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Get Interrupt Status.
FlagStatus | TIM_GetIntCaptureStatus (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Get Capture Interrupt Status.
void | TIM_ConfigStructInit (TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct)
Configuration for Timer at initial time.
void | TIM_ConfigMatch (LPC_TIM_TypeDef *TIMx, TIM_MATCHCFG_Type *TIM_MatchConfigStruct)
Configuration for Match register.
void | TIM_UpdateMatchValue (LPC_TIM_TypeDef *TIMx, uint8_t MatchChannel, uint32_t MatchValue)
Update Match value.
void | TIM_SetMatchExt (LPC_TIM_TypeDef *TIMx, TIM_EXTMATCH_OPT ext_match)
void | TIM_ConfigCapture (LPC_TIM_TypeDef *TIMx, TIM_CAPTURECFG_Type *TIM_CaptureConfigStruct)
Configuration for Capture register.
void | TIM_Cmd (LPC_TIM_TypeDef *TIMx, FunctionalState NewState)
Start/Stop Timer/Counter device.
uint32_t | TIM_GetCaptureValue (LPC_TIM_TypeDef *TIMx, TIM_COUNTER_INPUT_OPT CaptureChannel)
Read value of capture register in timer/counter device.
void | TIM_ResetCounter (LPC_TIM_TypeDef *TIMx)
Reset Timer/Counter device, Make TC and PC are synchronously reset on the next positive edge of PCLK.

Function Documentation

void TIM_ClearIntCapturePending | ( | LPC_TIM_TypeDef * | TIMx,
 |  | TIM_INT_TYPE | IntFlag
 | ) |  |

Clear Capture Interrupt pending.

Parameters:
[in] TIMx Timer selection, should be
  • LPC_TIM0: TIMER0 peripheral
    • LPC_TIM1: TIMER1 peripheral
    • LPC_TIM2: TIMER2 peripheral
    • LPC_TIM3: TIMER3 peripheral
[in] IntFlag interrupt type, should be:
  • TIM_MR0_INT: Interrupt for Match channel 0
  • TIM_MR1_INT: Interrupt for Match channel 1
  • TIM_MR2_INT: Interrupt for Match channel 2
  • TIM_MR3_INT: Interrupt for Match channel 3
  • TIM_CR0_INT: Interrupt for Capture channel 0
  • TIM_CR1_INT: Interrupt for Capture channel 1
Returns:
None

Definition at line 242 of file lpc17xx_timer.c.

void TIM_ClearIntPending | ( | LPC_TIM_TypeDef * | TIMx,
 |  | TIM_INT_TYPE | IntFlag
 | ) |  |

Clear Interrupt pending.

Parameters:
[in] TIMx Timer selection, should be:
  • LPC_TIM0: TIMER0 peripheral
    • LPC_TIM1: TIMER1 peripheral
    • LPC_TIM2: TIMER2 peripheral
    • LPC_TIM3: TIMER3 peripheral
[in] IntFlag,: interrupt type, should be:
  • TIM_MR0_INT: Interrupt for Match channel 0
  • TIM_MR1_INT: Interrupt for Match channel 1
  • TIM_MR2_INT: Interrupt for Match channel 2
  • TIM_MR3_INT: Interrupt for Match channel 3
  • TIM_CR0_INT: Interrupt for Capture channel 0
  • TIM_CR1_INT: Interrupt for Capture channel 1
Returns:
None

Definition at line 219 of file lpc17xx_timer.c.

void TIM_Cmd | ( | LPC_TIM_TypeDef * | TIMx,
 |  | FunctionalState | NewState
 | ) |  |

Start/Stop Timer/Counter device.

Parameters:
[in] TIMx Pointer to timer device, should be:
  • LPC_TIM0: TIMER0 peripheral
    • LPC_TIM1: TIMER1 peripheral
    • LPC_TIM2: TIMER2 peripheral
    • LPC_TIM3: TIMER3 peripheral
[in] NewState
  • ENABLE : set timer enable
  • DISABLE : disable timer
Returns:
None

Definition at line 408 of file lpc17xx_timer.c.

void TIM_ConfigCapture | ( | LPC_TIM_TypeDef * | TIMx,
 |  | TIM_CAPTURECFG_Type * | TIM_CaptureConfigStruct
 | ) |  |

Configuration for Capture register.

Parameters:
[in] TIMx Pointer to timer device, should be:
  • LPC_TIM0: TIMER0 peripheral
    • LPC_TIM1: TIMER1 peripheral
    • LPC_TIM2: TIMER2 peripheral
    • LPC_TIM3: TIMER3 peripheral
      • CaptureChannel: set the channel to capture data
      • RisingEdge : if SET, Capture at rising edge
      • FallingEdge : if SET, Capture at falling edge
      • IntOnCaption : if SET, Capture generate interrupt
[in] TIM_CaptureConfigStruct Pointer to TIM_CAPTURECFG_Type
Returns:
None

Definition at line 554 of file lpc17xx_timer.c.

void TIM_ConfigMatch | ( | LPC_TIM_TypeDef * | TIMx,
 |  | TIM_MATCHCFG_Type * | TIM_MatchConfigStruct
 | ) |  |

Configuration for Match register.

Parameters:
[in] TIMx Pointer to timer device, should be:
  • LPC_TIM0: TIMER0 peripheral
    • LPC_TIM1: TIMER1 peripheral
    • LPC_TIM2: TIMER2 peripheral
    • LPC_TIM3: TIMER3 peripheral
[in] TIM_MatchConfigStruct Pointer to TIM_MATCHCFG_Type
  • MatchChannel : choose channel 0 or 1
  • IntOnMatch : if SET, interrupt will be generated when MRxx match the value in TC
  • StopOnMatch : if SET, TC and PC will be stopped whenM Rxx match the value in TC
  • ResetOnMatch : if SET, Reset on MR0 when MRxx match the value in TC -ExtMatchOutputType: Select output for external match + 0: Do nothing for external output pin if match + 1: Force external output pin to low if match + 2: Force external output pin to high if match + 3: Toggle external output pin if match MatchValue: Set the value to be compared with TC value
Returns:
None

Definition at line 462 of file lpc17xx_timer.c.

void TIM_ConfigStructInit | ( | TIM_MODE_OPT | TimerCounterMode,
 |  | void * | TIM_ConfigStruct
 | ) |  |

Configuration for Timer at initial time.

Parameters:
[in] TimerCounterMode timer counter mode, should be:
  • TIM_TIMER_MODE: Timer mode
  • TIM_COUNTER_RISING_MODE: Counter rising mode
  • TIM_COUNTER_FALLING_MODE: Counter falling mode
  • TIM_COUNTER_ANY_MODE:Counter on both edges
[in] TIM_ConfigStruct pointer to TIM_TIMERCFG_Type or TIM_COUNTERCFG_Type
Returns:
None

Definition at line 260 of file lpc17xx_timer.c.

void TIM_DeInit ( LPC_TIM_TypeDef * TIMx )

Close Timer/Counter device.

Parameters:
[in] TIMx Pointer to timer device, should be:
  • LPC_TIM0: TIMER0 peripheral
  • LPC_TIM1: TIMER1 peripheral
  • LPC_TIM2: TIMER2 peripheral
  • LPC_TIM3: TIMER3 peripheral
Returns:
None

Definition at line 375 of file lpc17xx_timer.c.

uint32_t TIM_GetCaptureValue | ( | LPC_TIM_TypeDef * | TIMx,
 |  | TIM_COUNTER_INPUT_OPT | CaptureChannel
 | ) |  |

Read value of capture register in timer/counter device.

Parameters:
[in] TIMx Pointer to timer/counter device, should be:
  • LPC_TIM0: TIMER0 peripheral
    • LPC_TIM1: TIMER1 peripheral
    • LPC_TIM2: TIMER2 peripheral
    • LPC_TIM3: TIMER3 peripheral
[in] CaptureChannel,: capture channel number, should be:
  • TIM_COUNTER_INCAP0: CAPn.0 input pin for TIMERn
  • TIM_COUNTER_INCAP1: CAPn.1 input pin for TIMERn
Returns:
Value of capture register

Definition at line 582 of file lpc17xx_timer.c.

FlagStatus TIM_GetIntCaptureStatus | ( | LPC_TIM_TypeDef * | TIMx,
 |  | TIM_INT_TYPE | IntFlag
 | ) |  |

Get Capture Interrupt Status.

Parameters:
[in] TIMx Timer selection, should be:
  • LPC_TIM0: TIMER0 peripheral
    • LPC_TIM1: TIMER1 peripheral
    • LPC_TIM2: TIMER2 peripheral
    • LPC_TIM3: TIMER3 peripheral
[in] IntFlag,: interrupt type, should be:
  • TIM_MR0_INT: Interrupt for Match channel 0
  • TIM_MR1_INT: Interrupt for Match channel 1
  • TIM_MR2_INT: Interrupt for Match channel 2
  • TIM_MR3_INT: Interrupt for Match channel 3
  • TIM_CR0_INT: Interrupt for Capture channel 0
  • TIM_CR1_INT: Interrupt for Capture channel 1
Returns:
FlagStatus
  • SET : interrupt
  • RESET : no interrupt

Definition at line 193 of file lpc17xx_timer.c.

FlagStatus TIM_GetIntStatus | ( | LPC_TIM_TypeDef * | TIMx,
 |  | TIM_INT_TYPE | IntFlag
 | ) |  |

Get Interrupt Status.

Parameters:
[in] TIMx Timer selection, should be:
  • LPC_TIM0: TIMER0 peripheral
    • LPC_TIM1: TIMER1 peripheral
    • LPC_TIM2: TIMER2 peripheral
    • LPC_TIM3: TIMER3 peripheral
[in] IntFlag,: interrupt type, should be:
  • TIM_MR0_INT: Interrupt for Match channel 0
  • TIM_MR1_INT: Interrupt for Match channel 1
  • TIM_MR2_INT: Interrupt for Match channel 2
  • TIM_MR3_INT: Interrupt for Match channel 3
  • TIM_CR0_INT: Interrupt for Capture channel 0
  • TIM_CR1_INT: Interrupt for Capture channel 1
Returns:
FlagStatus
  • SET : interrupt
  • RESET : no interrupt

Definition at line 163 of file lpc17xx_timer.c.

void TIM_Init | ( | LPC_TIM_TypeDef * | TIMx,
 |  | TIM_MODE_OPT | TimerCounterMode,
 |  | void * | TIM_ConfigStruct
 | ) |  |

Initial Timer/Counter device Set Clock frequency for Timer Set initial configuration for Timer.

Parameters:
[in] TIMx Timer selection, should be:
  • LPC_TIM0: TIMER0 peripheral
  • LPC_TIM1: TIMER1 peripheral
  • LPC_TIM2: TIMER2 peripheral
  • LPC_TIM3: TIMER3 peripheral
[in] TimerCounterMode Timer counter mode, should be:
  • TIM_TIMER_MODE: Timer mode
  • TIM_COUNTER_RISING_MODE: Counter rising mode
  • TIM_COUNTER_FALLING_MODE: Counter falling mode
  • TIM_COUNTER_ANY_MODE:Counter on both edges
[in] TIM_ConfigStruct pointer to TIM_TIMERCFG_Type that contains the configuration information for the specified Timer peripheral.
Returns:
None

Definition at line 294 of file lpc17xx_timer.c.

void TIM_ResetCounter ( LPC_TIM_TypeDef * TIMx )

Reset Timer/Counter device, Make TC and PC are synchronously reset on the next positive edge of PCLK.

Parameters:
[in] TIMx Pointer to timer device, should be:
  • LPC_TIM0: TIMER0 peripheral
    • LPC_TIM1: TIMER1 peripheral
    • LPC_TIM2: TIMER2 peripheral
    • LPC_TIM3: TIMER3 peripheral
Returns:
None

Definition at line 432 of file lpc17xx_timer.c.

void TIM_SetMatchExt | ( | LPC_TIM_TypeDef * | TIMx,
 |  | TIM_EXTMATCH_OPT | ext_match
 | ) |  |
void TIM_UpdateMatchValue | ( | LPC_TIM_TypeDef * | TIMx,
 |  | uint8_t | MatchChannel,
 |  | uint32_t | MatchValue
 | ) |  |

Update Match value.

Parameters:
[in] TIMx Pointer to timer device, should be:
  • LPC_TIM0: TIMER0 peripheral
    • LPC_TIM1: TIMER1 peripheral
    • LPC_TIM2: TIMER2 peripheral
    • LPC_TIM3: TIMER3 peripheral
[in] | MatchChannel | Match channel, should be: 0..3
[in] | MatchValue | updated match value
Returns:
None

Definition at line 517 of file lpc17xx_timer.c.

Generated on Mon Nov 28 2011 11:15:18 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART (Universal Asynchronous Receiver/Transmitter)

Modules
UART (Universal Asynchronous Receiver/Transmitter)
LPC1700CMSIS Firmware Library

Modules

UART Public Macros
UART Private Macros
UART Public Types
UART Public Functions
Generated on Mon Nov 28 2011 11:15:18 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART Public Macros

Defines
UART Public Macros
UART (Universal Asynchronous Receiver/Transmitter)

Defines

#define UART_BLOCKING_TIMEOUT (0xFFFFFFFFUL)

Define Documentation

#define UART_BLOCKING_TIMEOUT (0xFFFFFFFFUL)

UART time-out definitions in case of using Read() and Write function with Blocking Flag mode

Definition at line 54 of file lpc17xx_uart.h.

Generated on Mon Nov 28 2011 11:15:18 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART Private Macros

Defines
UART Private Macros
UART (Universal Asynchronous Receiver/Transmitter)

Defines

#define | UART_ACCEPTED_BAUDRATE_ERROR (3)
#define | UART_RBR_MASKBIT ((uint8_t)0xFF)
#define | UART_THR_MASKBIT ((uint8_t)0xFF)
#define | UART_LOAD_DLL(div) ((div) & 0xFF)
#define | UART_DLL_MASKBIT ((uint8_t)0xFF)
#define | UART_DLM_MASKBIT ((uint8_t)0xFF)
#define | UART_LOAD_DLM(div) (((div) >> 8) & 0xFF)
#define | UART_IER_RBRINT_EN ((uint32_t)(1<<0))
#define | UART_IER_THREINT_EN ((uint32_t)(1<<1))
#define | UART_IER_RLSINT_EN ((uint32_t)(1<<2))
#define | UART1_IER_MSINT_EN ((uint32_t)(1<<3))
#define | UART1_IER_CTSINT_EN ((uint32_t)(1<<7))
#define | UART_IER_ABEOINT_EN ((uint32_t)(1<<8))
#define | UART_IER_ABTOINT_EN ((uint32_t)(1<<9))
#define | UART_IER_BITMASK ((uint32_t)(0x307))
#define | UART1_IER_BITMASK ((uint32_t)(0x38F))
#define | UART_IIR_INTSTAT_PEND ((uint32_t)(1<<0))
#define | UART_IIR_INTID_RLS ((uint32_t)(3<<1))
#define | UART_IIR_INTID_RDA ((uint32_t)(2<<1))
#define | UART_IIR_INTID_CTI ((uint32_t)(6<<1))
#define | UART_IIR_INTID_THRE ((uint32_t)(1<<1))
#define | UART1_IIR_INTID_MODEM ((uint32_t)(0<<1))
#define | UART_IIR_INTID_MASK ((uint32_t)(7<<1))
#define | UART_IIR_FIFO_EN ((uint32_t)(3<<6))
#define | UART_IIR_ABEO_INT ((uint32_t)(1<<8))
#define | UART_IIR_ABTO_INT ((uint32_t)(1<<9))
#define | UART_IIR_BITMASK ((uint32_t)(0x3CF))
#define | UART_FCR_FIFO_EN ((uint8_t)(1<<0))
#define | UART_FCR_RX_RS ((uint8_t)(1<<1))
#define | UART_FCR_TX_RS ((uint8_t)(1<<2))
#define | UART_FCR_DMAMODE_SEL ((uint8_t)(1<<3))
#define | UART_FCR_TRG_LEV0 ((uint8_t)(0))
#define | UART_FCR_TRG_LEV1 ((uint8_t)(1<<6))
#define | UART_FCR_TRG_LEV2 ((uint8_t)(2<<6))
#define | UART_FCR_TRG_LEV3 ((uint8_t)(3<<6))
#define | UART_FCR_BITMASK ((uint8_t)(0xCF))
#define | UART_TX_FIFO_SIZE (16)
#define | UART_LCR_WLEN5 ((uint8_t)(0))
#define | UART_LCR_WLEN6 ((uint8_t)(1<<0))
#define | UART_LCR_WLEN7 ((uint8_t)(2<<0))
#define | UART_LCR_WLEN8 ((uint8_t)(3<<0))
#define | UART_LCR_STOPBIT_SEL ((uint8_t)(1<<2))
#define | UART_LCR_PARITY_EN ((uint8_t)(1<<3))
#define | UART_LCR_PARITY_ODD ((uint8_t)(0))
#define | UART_LCR_PARITY_EVEN ((uint8_t)(1<<4))
#define | UART_LCR_PARITY_F_1 ((uint8_t)(2<<4))
#define | UART_LCR_PARITY_F_0 ((uint8_t)(3<<4))
#define | UART_LCR_BREAK_EN ((uint8_t)(1<<6))
#define | UART_LCR_DLAB_EN ((uint8_t)(1<<7))
#define | UART_LCR_BITMASK ((uint8_t)(0xFF))
#define | UART1_MCR_DTR_CTRL ((uint8_t)(1<<0))
#define | UART1_MCR_RTS_CTRL ((uint8_t)(1<<1))
#define | UART1_MCR_LOOPB_EN ((uint8_t)(1<<4))
#define | UART1_MCR_AUTO_RTS_EN ((uint8_t)(1<<6))
#define | UART1_MCR_AUTO_CTS_EN ((uint8_t)(1<<7))
#define | UART1_MCR_BITMASK ((uint8_t)(0x0F3))
#define | UART_LSR_RDR ((uint8_t)(1<<0))
#define | UART_LSR_OE ((uint8_t)(1<<1))
#define | UART_LSR_PE ((uint8_t)(1<<2))
#define | UART_LSR_FE ((uint8_t)(1<<3))
#define | UART_LSR_BI ((uint8_t)(1<<4))
#define | UART_LSR_THRE ((uint8_t)(1<<5))
#define | UART_LSR_TEMT ((uint8_t)(1<<6))
#define | UART_LSR_RXFE ((uint8_t)(1<<7))
#define | UART_LSR_BITMASK ((uint8_t)(0xFF))
#define | UART1_MSR_DELTA_CTS ((uint8_t)(1<<0))
#define | UART1_MSR_DELTA_DSR ((uint8_t)(1<<1))
#define | UART1_MSR_LO2HI_RI ((uint8_t)(1<<2))
#define | UART1_MSR_DELTA_DCD ((uint8_t)(1<<3))
#define | UART1_MSR_CTS ((uint8_t)(1<<4))
#define | UART1_MSR_DSR ((uint8_t)(1<<5))
#define | UART1_MSR_RI ((uint8_t)(1<<6))
#define | UART1_MSR_DCD ((uint8_t)(1<<7))
#define | UART1_MSR_BITMASK ((uint8_t)(0xFF))
#define | UART_SCR_BIMASK ((uint8_t)(0xFF))
#define | UART_ACR_START ((uint32_t)(1<<0))
#define | UART_ACR_MODE ((uint32_t)(1<<1))
#define | UART_ACR_AUTO_RESTART ((uint32_t)(1<<2))
#define | UART_ACR_ABEOINT_CLR ((uint32_t)(1<<8))
#define | UART_ACR_ABTOINT_CLR ((uint32_t)(1<<9))
#define | UART_ACR_BITMASK ((uint32_t)(0x307))
#define | UART_ICR_IRDAEN ((uint32_t)(1<<0))
#define | UART_ICR_IRDAINV ((uint32_t)(1<<1))
#define | UART_ICR_FIXPULSE_EN ((uint32_t)(1<<2))
#define | UART_ICR_PULSEDIV(n) ((uint32_t)((n&0x07)<<3))
#define | UART_ICR_BITMASK ((uint32_t)(0x3F))
#define | UART_FDR_DIVADDVAL(n) ((uint32_t)(n&0x0F))
#define | UART_FDR_MULVAL(n) ((uint32_t)((n<<4)&0xF0))
#define | UART_FDR_BITMASK ((uint32_t)(0xFF))
#define | UART_TER_TXEN ((uint8_t)(1<<7))
#define | UART_TER_BITMASK ((uint8_t)(0x80))
#define | UART1_RS485CTRL_NMM_EN ((uint32_t)(1<<0))
#define | UART1_RS485CTRL_RX_DIS ((uint32_t)(1<<1))
#define | UART1_RS485CTRL_AADEN ((uint32_t)(1<<2))
#define | UART1_RS485CTRL_SEL_DTR ((uint32_t)(1<<3))
#define | UART1_RS485CTRL_DCTRL_EN ((uint32_t)(1<<4))
#define | UART1_RS485CTRL_OINV_1 ((uint32_t)(1<<5))
#define | UART1_RS485CTRL_BITMASK ((uint32_t)(0x3F))
#define | UART1_RS485ADRMATCH_BITMASK ((uint8_t)(0xFF))
#define | UART1_RS485DLY_BITMASK ((uint8_t)(0xFF))
#define | UART_FIFOLVL_RXFIFOLVL(n) ((uint32_t)(n&0x0F))
#define | UART_FIFOLVL_TXFIFOLVL(n) ((uint32_t)((n>>8)&0x0F))
#define | UART_FIFOLVL_BITMASK ((uint32_t)(0x0F0F))
#define | PARAM_UART_DATABIT(databit)
#define | PARAM_UART_STOPBIT(stopbit) ((stopbit==UART_STOPBIT_1) || (stopbit==UART_STOPBIT_2))
#define | PARAM_UART_PARITY(parity)
#define | PARAM_UART_FIFO_LEVEL(fifo)
#define | PARAM_UART_INTCFG(IntCfg)
#define | PARAM_UART1_INTCFG(IntCfg) ((IntCfg==UART1_INTCFG_MS) || (IntCfg==UART1_INTCFG_CTS))
#define | PARAM_UART_AUTOBAUD_MODE(ABmode) ((ABmode==UART_AUTOBAUD_MODE0) || (ABmode==UART_AUTOBAUD_MODE1))
#define | PARAM_UART_AUTOBAUD_INTSTAT(ABIntStat)
#define | PARAM_UART_IrDA_PULSEDIV(PulseDiv)
#define | PARAM_UART1_SIGNALSTATE(x) ((x==INACTIVE) || (x==ACTIVE))
#define | PARAM_UART1_MODEM_PIN(x) ((x==UART1_MODEM_PIN_DTR) || (x==UART1_MODEM_PIN_RTS))
#define | PARAM_UART1_MODEM_MODE(x)
#define | PARAM_UART_RS485_DIRCTRL_PIN(x) ((x==UART1_RS485_DIRCTRL_RTS) || (x==UART1_RS485_DIRCTRL_DTR))
#define | PARAM_UARTx(x)
#define | PARAM_UART_IrDA(x) (((uint32_t *)x)==((uint32_t *)LPC_UART3))
#define | PARAM_UART1_MODEM(x) (((uint32_t *)x)==((uint32_t *)LPC_UART1))
#define | PARAM_UART1_RS485_CFG_MATCHADDRVALUE(x) ((x<0xFF))
#define | PARAM_UART1_RS485_CFG_DELAYVALUE(x) ((x<0xFF))

Define Documentation

#define PARAM_UART1_INTCFG ( IntCfg ) ((IntCfg==UART1_INTCFG_MS) || (IntCfg==UART1_INTCFG_CTS))

Macro to check the input UART1_INTCFG parameters - expansion input parameter for UART1

Definition at line 283 of file lpc17xx_uart.h.

#define PARAM_UART1_MODEM ( x ) (((uint32_t *)x)==((uint32_t *)LPC_UART1))

Definition at line 317 of file lpc17xx_uart.h.

#define PARAM_UART1_MODEM_MODE ( x )
Value:
((x==UART1_MODEM_MODE_LOOPBACK) || (x==UART1_MODEM_MODE_AUTO_RTS) \
|| (x==UART1_MODEM_MODE_AUTO_CTS))

Macro to check the input PARAM_UART1_MODEM_MODE parameters

Definition at line 305 of file lpc17xx_uart.h.

#define PARAM_UART1_MODEM_PIN ( x ) ((x==UART1_MODEM_PIN_DTR) || (x==UART1_MODEM_PIN_RTS))

Macro to check the input PARAM_UART1_MODEM_PIN parameters

Definition at line 302 of file lpc17xx_uart.h.

#define PARAM_UART1_RS485_CFG_DELAYVALUE ( x ) ((x<0xFF))

Macro to check the input value for UART1_RS485_CFG_DELAYVALUE parameter

Definition at line 323 of file lpc17xx_uart.h.

#define PARAM_UART1_RS485_CFG_MATCHADDRVALUE ( x ) ((x<0xFF))

Macro to check the input value for UART1_RS485_CFG_MATCHADDRVALUE parameter

Definition at line 320 of file lpc17xx_uart.h.

#define PARAM_UART1_SIGNALSTATE ( x ) ((x==INACTIVE) || (x==ACTIVE))

Definition at line 299 of file lpc17xx_uart.h.

#define PARAM_UART_AUTOBAUD_INTSTAT ( ABIntStat )
Value:
((ABIntStat==UART_AUTOBAUD_INTSTAT_ABEO) || \
                (ABIntStat==UART_AUTOBAUD_INTSTAT_ABTO))

Macro to check the input UART_AUTOBAUD_INTSTAT parameters

Definition at line 289 of file lpc17xx_uart.h.

#define PARAM_UART_AUTOBAUD_MODE ( ABmode ) ((ABmode==UART_AUTOBAUD_MODE0) || (ABmode==UART_AUTOBAUD_MODE1))

Macro to check the input UART_AUTOBAUD_MODE parameters

Definition at line 286 of file lpc17xx_uart.h.

#define PARAM_UART_DATABIT ( databit )
Value:
((databit==UART_DATABIT_5) || (databit==UART_DATABIT_6)\
|| (databit==UART_DATABIT_7) || (databit==UART_DATABIT_8))

Macro to check the input UART_DATABIT parameters

Definition at line 261 of file lpc17xx_uart.h.

#define PARAM_UART_FIFO_LEVEL ( fifo )
Value:
((fifo==UART_FIFO_TRGLEV0) \
|| (fifo==UART_FIFO_TRGLEV1) || (fifo==UART_FIFO_TRGLEV2) \
|| (fifo==UART_FIFO_TRGLEV3))

Macro to check the input UART_FIFO parameters

Definition at line 273 of file lpc17xx_uart.h.

#define PARAM_UART_INTCFG ( IntCfg )
Value:
((IntCfg==UART_INTCFG_RBR) || (IntCfg==UART_INTCFG_THRE) \
|| (IntCfg==UART_INTCFG_RLS) || (IntCfg==UART_INTCFG_ABEO) \
|| (IntCfg==UART_INTCFG_ABTO))

Macro to check the input UART_INTCFG parameters

Definition at line 278 of file lpc17xx_uart.h.

#define PARAM_UART_IrDA ( x ) (((uint32_t *)x)==((uint32_t *)LPC_UART3))

Definition at line 316 of file lpc17xx_uart.h.

#define PARAM_UART_IrDA_PULSEDIV ( PulseDiv )
Value:
((PulseDiv==UART_IrDA_PULSEDIV2) || (PulseDiv==UART_IrDA_PULSEDIV4) \
|| (PulseDiv==UART_IrDA_PULSEDIV8) || (PulseDiv==UART_IrDA_PULSEDIV16) \
|| (PulseDiv==UART_IrDA_PULSEDIV32) || (PulseDiv==UART_IrDA_PULSEDIV64) \
|| (PulseDiv==UART_IrDA_PULSEDIV128) || (PulseDiv==UART_IrDA_PULSEDIV256))

Macro to check the input UART_IrDA_PULSEDIV parameters

Definition at line 293 of file lpc17xx_uart.h.

#define PARAM_UART_PARITY ( parity )
Value:
((parity==UART_PARITY_NONE) || (parity==UART_PARITY_ODD) \
|| (parity==UART_PARITY_EVEN) || (parity==UART_PARITY_SP_1) \
|| (parity==UART_PARITY_SP_0))

Macro to check the input UART_PARITY parameters

Definition at line 268 of file lpc17xx_uart.h.

#define PARAM_UART_RS485_DIRCTRL_PIN ( x ) ((x==UART1_RS485_DIRCTRL_RTS) || (x==UART1_RS485_DIRCTRL_DTR))

Macro to check the direction control pin type

Definition at line 309 of file lpc17xx_uart.h.

#define PARAM_UART_STOPBIT ( stopbit ) ((stopbit==UART_STOPBIT_1) || (stopbit==UART_STOPBIT_2))

Macro to check the input UART_STOPBIT parameters

Definition at line 265 of file lpc17xx_uart.h.

#define PARAM_UARTx ( x )
Value:
((((uint32_t *)x)==((uint32_t *)LPC_UART0)) \
|| (((uint32_t *)x)==((uint32_t *)LPC_UART1)) \
|| (((uint32_t *)x)==((uint32_t *)LPC_UART2)) \
|| (((uint32_t *)x)==((uint32_t *)LPC_UART3)))

Definition at line 312 of file lpc17xx_uart.h.

#define UART1_IER_BITMASK ((uint32_t)(0x38F))

UART1 interrupt enable register bit mask

Definition at line 103 of file lpc17xx_uart.h.

#define UART1_IER_CTSINT_EN ((uint32_t)(1<<7))

CTS1 signal transition interrupt enable

Definition at line 99 of file lpc17xx_uart.h.

#define UART1_IER_MSINT_EN ((uint32_t)(1<<3))

Modem status interrupt enable

Definition at line 98 of file lpc17xx_uart.h.

#define UART1_IIR_INTID_MODEM ((uint32_t)(0<<1))

Interrupt identification: Modem interrupt

Definition at line 113 of file lpc17xx_uart.h.

#define UART1_MCR_AUTO_CTS_EN ((uint8_t)(1<<7))

Enable Auto CTS flow-control

Definition at line 158 of file lpc17xx_uart.h.

#define UART1_MCR_AUTO_RTS_EN ((uint8_t)(1<<6))

Enable Auto RTS flow-control

Definition at line 157 of file lpc17xx_uart.h.

#define UART1_MCR_BITMASK ((uint8_t)(0x0F3))

UART1 bit mask value

Definition at line 159 of file lpc17xx_uart.h.

#define UART1_MCR_DTR_CTRL ((uint8_t)(1<<0))

Macro defines for Macro defines for UART1 Modem Control Register Source for modem output pin DTR

Definition at line 154 of file lpc17xx_uart.h.

#define UART1_MCR_LOOPB_EN ((uint8_t)(1<<4))

Loop back mode select

Definition at line 156 of file lpc17xx_uart.h.

#define UART1_MCR_RTS_CTRL ((uint8_t)(1<<1))

Source for modem output pin RTS

Definition at line 155 of file lpc17xx_uart.h.

#define UART1_MSR_BITMASK ((uint8_t)(0xFF))

MSR register bit-mask value

Definition at line 185 of file lpc17xx_uart.h.

#define UART1_MSR_CTS ((uint8_t)(1<<4))

Clear To Send State

Definition at line 181 of file lpc17xx_uart.h.

#define UART1_MSR_DCD ((uint8_t)(1<<7))

Data Carrier Detect State

Definition at line 184 of file lpc17xx_uart.h.

#define UART1_MSR_DELTA_CTS ((uint8_t)(1<<0))

Macro defines for Macro defines for UART Modem (UART1 only) status register Set upon state change of input CTS

Definition at line 177 of file lpc17xx_uart.h.

#define UART1_MSR_DELTA_DCD ((uint8_t)(1<<3))

Set upon state change of input DCD

Definition at line 180 of file lpc17xx_uart.h.

#define UART1_MSR_DELTA_DSR ((uint8_t)(1<<1))

Set upon state change of input DSR

Definition at line 178 of file lpc17xx_uart.h.

#define UART1_MSR_DSR ((uint8_t)(1<<5))

Data Set Ready State

Definition at line 182 of file lpc17xx_uart.h.

#define UART1_MSR_LO2HI_RI ((uint8_t)(1<<2))

Set upon low to high transition of input RI

Definition at line 179 of file lpc17xx_uart.h.

#define UART1_MSR_RI ((uint8_t)(1<<6))

Ring Indicator State

Definition at line 183 of file lpc17xx_uart.h.

#define UART1_RS485ADRMATCH_BITMASK ((uint8_t)(0xFF))

Macro defines for Macro defines for UART1 RS-485 Address Match register Bit mask value

Definition at line 242 of file lpc17xx_uart.h.

#define UART1_RS485CTRL_AADEN ((uint32_t)(1<<2))

Auto Address Detect (AAD) is enabled

Definition at line 230 of file lpc17xx_uart.h.

#define UART1_RS485CTRL_BITMASK ((uint32_t)(0x3F))

RS485 control bit-mask value

Definition at line 237 of file lpc17xx_uart.h.

#define UART1_RS485CTRL_DCTRL_EN ((uint32_t)(1<<4))

Enable Auto Direction Control

Definition at line 233 of file lpc17xx_uart.h.

#define UART1_RS485CTRL_NMM_EN ((uint32_t)(1<<0))

Macro defines for Macro defines for UART1 RS485 Control register RS-485/EIA-485 Normal Multi-drop Mode (NMM) is disabled

Definition at line 227 of file lpc17xx_uart.h.

#define UART1_RS485CTRL_OINV_1 ((uint32_t)(1<<5))

This bit reverses the polarity of the direction control signal on the RTS (or DTR) pin. The direction control pin will be driven to logic "1" when the transmitter has data to be sent

Definition at line 234 of file lpc17xx_uart.h.

#define UART1_RS485CTRL_RX_DIS ((uint32_t)(1<<1))

The receiver is disabled

Definition at line 229 of file lpc17xx_uart.h.

#define UART1_RS485CTRL_SEL_DTR ((uint32_t)(1<<3))

If direction control is enabled (bit DCTRL = 1), pin DTR is used for direction control

Definition at line 231 of file lpc17xx_uart.h.

#define UART1_RS485DLY_BITMASK ((uint8_t)(0xFF))

Macro defines for Macro defines for UART1 RS-485 Delay value register

Definition at line 248 of file lpc17xx_uart.h.

#define UART_ACCEPTED_BAUDRATE_ERROR (3)

Acceptable UART baudrate error

Definition at line 66 of file lpc17xx_uart.h.

#define UART_ACR_ABEOINT_CLR ((uint32_t)(1<<8))

UART End of auto-baud interrupt clear

Definition at line 198 of file lpc17xx_uart.h.

#define UART_ACR_ABTOINT_CLR ((uint32_t)(1<<9))

UART Auto-baud time-out interrupt clear

Definition at line 199 of file lpc17xx_uart.h.

#define UART_ACR_AUTO_RESTART ((uint32_t)(1<<2))

UART Auto baudrate restart

Definition at line 197 of file lpc17xx_uart.h.

#define UART_ACR_BITMASK ((uint32_t)(0x307))

UART Auto Baudrate register bit mask

Definition at line 200 of file lpc17xx_uart.h.

#define UART_ACR_MODE ((uint32_t)(1<<1))

UART Auto baudrate Mode 1

Definition at line 196 of file lpc17xx_uart.h.

#define UART_ACR_START ((uint32_t)(1<<0))

Macro defines for Macro defines for UART Auto baudrate control register UART Auto-baud start

Definition at line 195 of file lpc17xx_uart.h.

#define UART_DLL_MASKBIT ((uint8_t)0xFF)

Divisor latch LSB bit mask

Definition at line 84 of file lpc17xx_uart.h.

#define UART_DLM_MASKBIT ((uint8_t)0xFF)

Macro defines for Macro defines for UARTn Divisor Latch MSB register Divisor latch MSB bit mask

Definition at line 89 of file lpc17xx_uart.h.

#define UART_FCR_BITMASK ((uint8_t)(0xCF))

UART FIFO control bit mask

Definition at line 131 of file lpc17xx_uart.h.

#define UART_FCR_DMAMODE_SEL ((uint8_t)(1<<3))

UART DMA mode selection

Definition at line 126 of file lpc17xx_uart.h.

#define UART_FCR_FIFO_EN ((uint8_t)(1<<0))

Macro defines for Macro defines for UART FIFO control register UART FIFO enable

Definition at line 123 of file lpc17xx_uart.h.

#define UART_FCR_RX_RS ((uint8_t)(1<<1))

UART FIFO RX reset

Definition at line 124 of file lpc17xx_uart.h.

#define UART_FCR_TRG_LEV0 ((uint8_t)(0))

UART FIFO trigger level 0: 1 character

Definition at line 127 of file lpc17xx_uart.h.

#define UART_FCR_TRG_LEV1 ((uint8_t)(1<<6))

UART FIFO trigger level 1: 4 character

Definition at line 128 of file lpc17xx_uart.h.

#define UART_FCR_TRG_LEV2 ((uint8_t)(2<<6))

UART FIFO trigger level 2: 8 character

Definition at line 129 of file lpc17xx_uart.h.

#define UART_FCR_TRG_LEV3 ((uint8_t)(3<<6))

UART FIFO trigger level 3: 14 character

Definition at line 130 of file lpc17xx_uart.h.

#define UART_FCR_TX_RS ((uint8_t)(1<<2))

UART FIFO TX reset

Definition at line 125 of file lpc17xx_uart.h.

#define UART_FDR_BITMASK ((uint32_t)(0xFF))

UART Fractional Divider register bit mask

Definition at line 216 of file lpc17xx_uart.h.

#define UART_FDR_DIVADDVAL ( n ) ((uint32_t)(n&0x0F))

Macro defines for Macro defines for UART Fractional divider register Baud-rate generation pre-scaler divisor

Definition at line 214 of file lpc17xx_uart.h.

#define UART_FDR_MULVAL ( n ) ((uint32_t)((n<<4)&0xF0))

Baud-rate pre-scaler multiplier value

Definition at line 215 of file lpc17xx_uart.h.

#define UART_FIFOLVL_BITMASK ((uint32_t)(0x0F0F))

UART FIFO Level Register bit mask

Definition at line 255 of file lpc17xx_uart.h.

#define UART_FIFOLVL_RXFIFOLVL ( n ) ((uint32_t)(n&0x0F))

Macro defines for Macro defines for UART FIFO Level register Reflects the current level of the UART receiver FIFO

Definition at line 253 of file lpc17xx_uart.h.

#define UART_FIFOLVL_TXFIFOLVL ( n ) ((uint32_t)((n>>8)&0x0F))

Reflects the current level of the UART transmitter FIFO

Definition at line 254 of file lpc17xx_uart.h.

#define UART_ICR_BITMASK ((uint32_t)(0x3F))

UART IRDA bit mask

Definition at line 209 of file lpc17xx_uart.h.

#define UART_ICR_FIXPULSE_EN ((uint32_t)(1<<2))

IrDA fixed pulse width mode

Definition at line 207 of file lpc17xx_uart.h.

#define UART_ICR_IRDAEN ((uint32_t)(1<<0))

Macro defines for Macro defines for UART IrDA control register IrDA mode enable

Definition at line 205 of file lpc17xx_uart.h.

#define UART_ICR_IRDAINV ((uint32_t)(1<<1))

IrDA serial input inverted

Definition at line 206 of file lpc17xx_uart.h.

#define UART_ICR_PULSEDIV ( n ) ((uint32_t)((n&0x07)<<3))

PulseDiv - Configures the pulse when FixPulseEn = 1

Definition at line 208 of file lpc17xx_uart.h.

#define UART_IER_ABEOINT_EN ((uint32_t)(1<<8))

Enables the end of auto-baud interrupt

Definition at line 100 of file lpc17xx_uart.h.

#define UART_IER_ABTOINT_EN ((uint32_t)(1<<9))

Enables the auto-baud time-out interrupt

Definition at line 101 of file lpc17xx_uart.h.

#define UART_IER_BITMASK ((uint32_t)(0x307))

UART interrupt enable register bit mask

Definition at line 102 of file lpc17xx_uart.h.

#define UART_IER_RBRINT_EN ((uint32_t)(1<<0))

Macro defines for Macro defines for UART interrupt enable register RBR Interrupt enable

Definition at line 95 of file lpc17xx_uart.h.

#define UART_IER_RLSINT_EN ((uint32_t)(1<<2))

RX line status interrupt enable

Definition at line 97 of file lpc17xx_uart.h.

#define UART_IER_THREINT_EN ((uint32_t)(1<<1))

THR Interrupt enable

Definition at line 96 of file lpc17xx_uart.h.

#define UART_IIR_ABEO_INT ((uint32_t)(1<<8))

End of auto-baud interrupt

Definition at line 116 of file lpc17xx_uart.h.

#define UART_IIR_ABTO_INT ((uint32_t)(1<<9))

Auto-baud time-out interrupt

Definition at line 117 of file lpc17xx_uart.h.

#define UART_IIR_BITMASK ((uint32_t)(0x3CF))

UART interrupt identification register bit mask

Definition at line 118 of file lpc17xx_uart.h.

#define UART_IIR_FIFO_EN ((uint32_t)(3<<6))

These bits are equivalent to UnFCR[0]

Definition at line 115 of file lpc17xx_uart.h.

#define UART_IIR_INTID_CTI ((uint32_t)(6<<1))

Interrupt identification: Character time-out indicator

Definition at line 111 of file lpc17xx_uart.h.

#define UART_IIR_INTID_MASK ((uint32_t)(7<<1))

Interrupt identification: Interrupt ID mask

Definition at line 114 of file lpc17xx_uart.h.

#define UART_IIR_INTID_RDA ((uint32_t)(2<<1))

Interrupt identification: Receive data available

Definition at line 110 of file lpc17xx_uart.h.

#define UART_IIR_INTID_RLS ((uint32_t)(3<<1))

Interrupt identification: Receive line status

Definition at line 109 of file lpc17xx_uart.h.

#define UART_IIR_INTID_THRE ((uint32_t)(1<<1))

Interrupt identification: THRE interrupt

Definition at line 112 of file lpc17xx_uart.h.

#define UART_IIR_INTSTAT_PEND ((uint32_t)(1<<0))

Macro defines for Macro defines for UART interrupt identification registerInterrupt Status - Active low

Definition at line 108 of file lpc17xx_uart.h.

#define UART_LCR_BITMASK ((uint8_t)(0xFF))

UART line control bit mask

Definition at line 149 of file lpc17xx_uart.h.

#define UART_LCR_BREAK_EN ((uint8_t)(1<<6))

UART Transmission Break enable

Definition at line 147 of file lpc17xx_uart.h.

#define UART_LCR_DLAB_EN ((uint8_t)(1<<7))

UART Divisor Latches Access bit enable

Definition at line 148 of file lpc17xx_uart.h.

#define UART_LCR_PARITY_EN ((uint8_t)(1<<3))

UART Parity Enable

Definition at line 142 of file lpc17xx_uart.h.

#define UART_LCR_PARITY_EVEN ((uint8_t)(1<<4))

UART Even Parity Select

Definition at line 144 of file lpc17xx_uart.h.

#define UART_LCR_PARITY_F_0 ((uint8_t)(3<<4))

UART force 0 stick parity

Definition at line 146 of file lpc17xx_uart.h.

#define UART_LCR_PARITY_F_1 ((uint8_t)(2<<4))

UART force 1 stick parity

Definition at line 145 of file lpc17xx_uart.h.

#define UART_LCR_PARITY_ODD ((uint8_t)(0))

UART Odd Parity Select

Definition at line 143 of file lpc17xx_uart.h.

#define UART_LCR_STOPBIT_SEL ((uint8_t)(1<<2))

UART Two Stop Bits Select

Definition at line 141 of file lpc17xx_uart.h.

#define UART_LCR_WLEN5 ((uint8_t)(0))

Macro defines for Macro defines for UART line control register UART 5 bit data mode

Definition at line 137 of file lpc17xx_uart.h.

#define UART_LCR_WLEN6 ((uint8_t)(1<<0))

UART 6 bit data mode

Definition at line 138 of file lpc17xx_uart.h.

#define UART_LCR_WLEN7 ((uint8_t)(2<<0))

UART 7 bit data mode

Definition at line 139 of file lpc17xx_uart.h.

#define UART_LCR_WLEN8 ((uint8_t)(3<<0))

UART 8 bit data mode

Definition at line 140 of file lpc17xx_uart.h.

#define UART_LOAD_DLL ( div ) ((div) & 0xFF)

Macro defines for Macro defines for UARTn Divisor Latch LSB register Macro for loading least significant halfs of divisors

Definition at line 83 of file lpc17xx_uart.h.

#define UART_LOAD_DLM ( div ) (((div) >> 8) & 0xFF)

Macro for loading most significant halfs of divisors

Definition at line 90 of file lpc17xx_uart.h.

#define UART_LSR_BI ((uint8_t)(1<<4))

Line status register: Break interrupt

Definition at line 168 of file lpc17xx_uart.h.

#define UART_LSR_BITMASK ((uint8_t)(0xFF))

UART Line status bit mask

Definition at line 172 of file lpc17xx_uart.h.

#define UART_LSR_FE ((uint8_t)(1<<3))

Line status register: Framing error

Definition at line 167 of file lpc17xx_uart.h.

#define UART_LSR_OE ((uint8_t)(1<<1))

Line status register: Overrun error

Definition at line 165 of file lpc17xx_uart.h.

#define UART_LSR_PE ((uint8_t)(1<<2))

Line status register: Parity error

Definition at line 166 of file lpc17xx_uart.h.

#define UART_LSR_RDR ((uint8_t)(1<<0))

Macro defines for Macro defines for UART line status registerLine status register: Receive data ready

Definition at line 164 of file lpc17xx_uart.h.

#define UART_LSR_RXFE ((uint8_t)(1<<7))

Error in RX FIFO

Definition at line 171 of file lpc17xx_uart.h.

#define UART_LSR_TEMT ((uint8_t)(1<<6))

Line status register: Transmitter empty

Definition at line 170 of file lpc17xx_uart.h.

#define UART_LSR_THRE ((uint8_t)(1<<5))

Line status register: Transmit holding register empty

Definition at line 169 of file lpc17xx_uart.h.

#define UART_RBR_MASKBIT ((uint8_t)0xFF)

Macro defines for Macro defines for UARTn Receiver Buffer Register UART Received Buffer mask bit (8 bits)

Definition at line 73 of file lpc17xx_uart.h.

#define UART_SCR_BIMASK ((uint8_t)(0xFF))

Macro defines for Macro defines for UART Scratch Pad Register UART Scratch Pad bit mask

Definition at line 190 of file lpc17xx_uart.h.

#define UART_TER_BITMASK ((uint8_t)(0x80))

UART Transmit Enable Register bit mask

Definition at line 222 of file lpc17xx_uart.h.

#define UART_TER_TXEN ((uint8_t)(1<<7))

Macro defines for Macro defines for UART Tx Enable register Transmit enable bit

Definition at line 221 of file lpc17xx_uart.h.

#define UART_THR_MASKBIT ((uint8_t)0xFF)

Macro defines for Macro defines for UARTn Transmit Holding Register UART Transmit Holding mask bit (8 bits)

Definition at line 78 of file lpc17xx_uart.h.

#define UART_TX_FIFO_SIZE (16)

Definition at line 132 of file lpc17xx_uart.h.

Generated on Mon Nov 28 2011 11:15:18 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART Public Types

Data Structures | Enumerations
UART Public Types
UART (Universal Asynchronous Receiver/Transmitter)

Data Structures

struct | UART_AB_CFG_Type
Auto Baudrate mode configuration type definition. More...
struct | UART_CFG_Type
UART Configuration Structure definition. More...
struct | UART_FIFO_CFG_Type
UART FIFO Configuration Structure definition. More...
struct | UART1_RS485_CTRLCFG_Type
UART1 Full modem - RS485 Control configuration type. More...

Enumerations

enum | UART_DATABIT_Type { UART_DATABIT_5 = 0, UART_DATABIT_6, UART_DATABIT_7, UART_DATABIT_8 }
UART Databit type definitions. More...
enum | UART_STOPBIT_Type { UART_STOPBIT_1 = (0), UART_STOPBIT_2 }
UART Stop bit type definitions. More...
enum UART_PARITY_Type {
UART_PARITY_NONE = 0, UART_PARITY_ODD, UART_PARITY_EVEN, UART_PARITY_SP_1,
UART_PARITY_SP_0
}
UART Parity type definitions. More...
enum | UART_FITO_LEVEL_Type { UART_FIFO_TRGLEV0 = 0, UART_FIFO_TRGLEV1, UART_FIFO_TRGLEV2, UART_FIFO_TRGLEV3 }
FIFO Level type definitions. More...
enum UART_INT_Type {
UART_INTCFG_RBR = 0, UART_INTCFG_THRE, UART_INTCFG_RLS, UART1_INTCFG_MS,
UART1_INTCFG_CTS, UART_INTCFG_ABEO, UART_INTCFG_ABTO
}
UART Interrupt Type definitions. More...
enum UART_LS_Type {
UART_LINESTAT_RDR = UART_LSR_RDR, UART_LINESTAT_OE = UART_LSR_OE, UART_LINESTAT_PE = UART_LSR_PE, UART_LINESTAT_FE = UART_LSR_FE,
UART_LINESTAT_BI = UART_LSR_BI, UART_LINESTAT_THRE = UART_LSR_THRE, UART_LINESTAT_TEMT = UART_LSR_TEMT, UART_LINESTAT_RXFE = UART_LSR_RXFE
}
UART Line Status Type definition. More...
enum | UART_AB_MODE_Type { UART_AUTOBAUD_MODE0 = 0, UART_AUTOBAUD_MODE1 }
UART Auto-baudrate mode type definition. More...
enum | UART_ABEO_Type { UART_AUTOBAUD_INTSTAT_ABEO = UART_IIR_ABEO_INT, UART_AUTOBAUD_INTSTAT_ABTO = UART_IIR_ABTO_INT }
UART End of Auto-baudrate type definition. More...
enum UART_IrDA_PULSE_Type {
UART_IrDA_PULSEDIV2 = 0, UART_IrDA_PULSEDIV4, UART_IrDA_PULSEDIV8, UART_IrDA_PULSEDIV16,
UART_IrDA_PULSEDIV32, UART_IrDA_PULSEDIV64, UART_IrDA_PULSEDIV128, UART_IrDA_PULSEDIV256
}
enum | UART1_SignalState { INACTIVE = 0, ACTIVE = !INACTIVE }
UART1 Full modem - Signal states definition. More...
enum UART_MODEM_STAT_type {
UART1_MODEM_STAT_DELTA_CTS = UART1_MSR_DELTA_CTS, UART1_MODEM_STAT_DELTA_DSR = UART1_MSR_DELTA_DSR, UART1_MODEM_STAT_LO2HI_RI = UART1_MSR_LO2HI_RI, UART1_MODEM_STAT_DELTA_DCD = UART1_MSR_DELTA_DCD,
UART1_MODEM_STAT_CTS = UART1_MSR_CTS, UART1_MODEM_STAT_DSR = UART1_MSR_DSR, UART1_MODEM_STAT_RI = UART1_MSR_RI, UART1_MODEM_STAT_DCD = UART1_MSR_DCD
}
UART modem status type definition. More...
enum | UART_MODEM_PIN_Type { UART1_MODEM_PIN_DTR = 0, UART1_MODEM_PIN_RTS }
Modem output pin type definition. More...
enum | UART_MODEM_MODE_Type { UART1_MODEM_MODE_LOOPBACK = 0, UART1_MODEM_MODE_AUTO_RTS, UART1_MODEM_MODE_AUTO_CTS }
UART Modem mode type definition. More...
enum | UART_RS485_DIRCTRL_PIN_Type { UART1_RS485_DIRCTRL_RTS = 0, UART1_RS485_DIRCTRL_DTR }
UART Direction Control Pin type definition. More...

Enumeration Type Documentation

enum UART1_SignalState

UART1 Full modem - Signal states definition.

Enumerator:
INACTIVE
ACTIVE

Definition at line 450 of file lpc17xx_uart.h.

enum UART_AB_MODE_Type

UART Auto-baudrate mode type definition.

Enumerator:
UART_AUTOBAUD_MODE0

UART Auto baudrate Mode 0

UART_AUTOBAUD_MODE1

UART Auto baudrate Mode 1

Definition at line 404 of file lpc17xx_uart.h.

enum UART_ABEO_Type

UART End of Auto-baudrate type definition.

Enumerator:
UART_AUTOBAUD_INTSTAT_ABEO

UART End of auto-baud interrupt

UART_AUTOBAUD_INTSTAT_ABTO

UART Auto-baud time-out interrupt

Definition at line 420 of file lpc17xx_uart.h.

enum UART_DATABIT_Type

UART Databit type definitions.

Enumerator:
UART_DATABIT_5

UART 5 bit data mode

UART_DATABIT_6

UART 6 bit data mode

UART_DATABIT_7

UART 7 bit data mode

UART_DATABIT_8

UART 8 bit data mode

Definition at line 338 of file lpc17xx_uart.h.

enum UART_FITO_LEVEL_Type

FIFO Level type definitions.

Enumerator:
UART_FIFO_TRGLEV0

UART FIFO trigger level 0: 1 character

UART_FIFO_TRGLEV1

UART FIFO trigger level 1: 4 character

UART_FIFO_TRGLEV2

UART FIFO trigger level 2: 8 character

UART_FIFO_TRGLEV3

UART FIFO trigger level 3: 14 character

Definition at line 367 of file lpc17xx_uart.h.

enum UART_INT_Type

UART Interrupt Type definitions.

Enumerator:
UART_INTCFG_RBR

RBR Interrupt enable

UART_INTCFG_THRE

THR Interrupt enable

UART_INTCFG_RLS

RX line status interrupt enable

UART1_INTCFG_MS

Modem status interrupt enable (UART1 only)

UART1_INTCFG_CTS

CTS1 signal transition interrupt enable (UART1 only)

UART_INTCFG_ABEO

Enables the end of auto-baud interrupt

UART_INTCFG_ABTO

Enables the auto-baud time-out interrupt

Definition at line 377 of file lpc17xx_uart.h.

enum UART_IrDA_PULSE_Type

UART IrDA Control type Definition

Enumerator:
UART_IrDA_PULSEDIV2

Pulse width = 2 * Tpclk

  • Configures the pulse when FixPulseEn = 1
UART_IrDA_PULSEDIV4

Pulse width = 4 * Tpclk

  • Configures the pulse when FixPulseEn = 1
UART_IrDA_PULSEDIV8

Pulse width = 8 * Tpclk

  • Configures the pulse when FixPulseEn = 1
UART_IrDA_PULSEDIV16

Pulse width = 16 * Tpclk

  • Configures the pulse when FixPulseEn = 1
UART_IrDA_PULSEDIV32

Pulse width = 32 * Tpclk

  • Configures the pulse when FixPulseEn = 1
UART_IrDA_PULSEDIV64

Pulse width = 64 * Tpclk

  • Configures the pulse when FixPulseEn = 1
UART_IrDA_PULSEDIV128

Pulse width = 128 * Tpclk

  • Configures the pulse when FixPulseEn = 1
UART_IrDA_PULSEDIV256

Pulse width = 256 * Tpclk

  • Configures the pulse when FixPulseEn = 1

Definition at line 428 of file lpc17xx_uart.h.

enum UART_LS_Type

UART Line Status Type definition.

Enumerator:
UART_LINESTAT_RDR

Line status register: Receive data ready

UART_LINESTAT_OE

Line status register: Overrun error

UART_LINESTAT_PE

Line status register: Parity error

UART_LINESTAT_FE

Line status register: Framing error

UART_LINESTAT_BI

Line status register: Break interrupt

UART_LINESTAT_THRE

Line status register: Transmit holding register empty

UART_LINESTAT_TEMT

Line status register: Transmitter empty

UART_LINESTAT_RXFE

Error in RX FIFO

Definition at line 390 of file lpc17xx_uart.h.

enum UART_MODEM_MODE_Type

UART Modem mode type definition.

Enumerator:
UART1_MODEM_MODE_LOOPBACK

Loop back mode select

UART1_MODEM_MODE_AUTO_RTS

Enable Auto RTS flow-control

UART1_MODEM_MODE_AUTO_CTS

Enable Auto CTS flow-control

Definition at line 480 of file lpc17xx_uart.h.

enum UART_MODEM_PIN_Type

Modem output pin type definition.

Enumerator:
UART1_MODEM_PIN_DTR

Source for modem output pin DTR

UART1_MODEM_PIN_RTS

Source for modem output pin RTS

Definition at line 472 of file lpc17xx_uart.h.

enum UART_MODEM_STAT_type

UART modem status type definition.

Enumerator:
UART1_MODEM_STAT_DELTA_CTS

Set upon state change of input CTS

UART1_MODEM_STAT_DELTA_DSR

Set upon state change of input DSR

UART1_MODEM_STAT_LO2HI_RI

Set upon low to high transition of input RI

UART1_MODEM_STAT_DELTA_DCD

Set upon state change of input DCD

UART1_MODEM_STAT_CTS

Clear To Send State

UART1_MODEM_STAT_DSR

Data Set Ready State

UART1_MODEM_STAT_RI

Ring Indicator State

UART1_MODEM_STAT_DCD

Data Carrier Detect State

Definition at line 458 of file lpc17xx_uart.h.

enum UART_PARITY_Type

UART Parity type definitions.

Enumerator:
UART_PARITY_NONE

No parity

UART_PARITY_ODD

Odd parity

UART_PARITY_EVEN

Even parity

UART_PARITY_SP_1

Forced "1" stick parity

UART_PARITY_SP_0

Forced "0" stick parity

Definition at line 356 of file lpc17xx_uart.h.

enum UART_RS485_DIRCTRL_PIN_Type

UART Direction Control Pin type definition.

Enumerator:
UART1_RS485_DIRCTRL_RTS

Pin RTS is used for direction control

UART1_RS485_DIRCTRL_DTR

Pin DTR is used for direction control

Definition at line 489 of file lpc17xx_uart.h.

enum UART_STOPBIT_Type

UART Stop bit type definitions.

Enumerator:
UART_STOPBIT_1

UART 1 Stop Bits Select

UART_STOPBIT_2

UART Two Stop Bits Select

Definition at line 348 of file lpc17xx_uart.h.

Generated on Mon Nov 28 2011 11:15:18 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART Public Functions

Functions
UART Public Functions
UART (Universal Asynchronous Receiver/Transmitter)

Functions

void | UART_Init (LPC_UART_TypeDef *UARTx, UART_CFG_Type *UART_ConfigStruct)
Initializes the UARTx peripheral according to the specified parameters in the UART_ConfigStruct.
void | UART_DeInit (LPC_UART_TypeDef *UARTx)
De-initializes the UARTx peripheral registers to their default reset values.
void | UART_ConfigStructInit (UART_CFG_Type *UART_InitStruct)
Fills each UART_InitStruct member with its default value:
void | UART_SendByte (LPC_UART_TypeDef *UARTx, uint8_t Data)
Transmit a single data through UART peripheral.
uint8_t | UART_ReceiveByte (LPC_UART_TypeDef *UARTx)
Receive a single data from UART peripheral.
uint32_t | UART_Send (LPC_UART_TypeDef *UARTx, uint8_t *txbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
Send a block of data via UART peripheral.
uint32_t | UART_Receive (LPC_UART_TypeDef *UARTx, uint8_t *rxbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
Receive a block of data via UART peripheral.
void | UART_FIFOConfig (LPC_UART_TypeDef *UARTx, UART_FIFO_CFG_Type *FIFOCfg)
Configure FIFO function on selected UART peripheral.
void | UART_FIFOConfigStructInit (UART_FIFO_CFG_Type *UART_FIFOInitStruct)
Fills each UART_FIFOInitStruct member with its default value:
uint32_t | UART_GetIntId (LPC_UART_TypeDef *UARTx)
Get Interrupt Identification value.
uint8_t | UART_GetLineStatus (LPC_UART_TypeDef *UARTx)
Get current value of Line Status register in UART peripheral.
void | UART_IntConfig (LPC_UART_TypeDef *UARTx, UART_INT_Type UARTIntCfg, FunctionalState NewState)
Enable or disable specified UART interrupt.
void | UART_TxCmd (LPC_UART_TypeDef *UARTx, FunctionalState NewState)
Enable/Disable transmission on UART TxD pin.
FlagStatus | UART_CheckBusy (LPC_UART_TypeDef *UARTx)
Check whether if UART is busy or not.
void | UART_ForceBreak (LPC_UART_TypeDef *UARTx)
Force BREAK character on UART line, output pin UARTx TXD is forced to logic 0.
void | UART_ABClearIntPending (LPC_UART_TypeDef *UARTx, UART_ABEO_Type ABIntType)
Clear Autobaud Interrupt Pending.
void | UART_ABCmd (LPC_UART_TypeDef *UARTx, UART_AB_CFG_Type *ABConfigStruct, FunctionalState NewState)
Start/Stop Auto Baudrate activity.
void | UART_FullModemForcePinState (LPC_UART1_TypeDef *UARTx, UART_MODEM_PIN_Type Pin, UART1_SignalState NewState)
Force pin DTR/RTS corresponding to given state (Full modem mode)
void | UART_FullModemConfigMode (LPC_UART1_TypeDef *UARTx, UART_MODEM_MODE_Type Mode, FunctionalState NewState)
Configure Full Modem mode for UART peripheral.
uint8_t | UART_FullModemGetStatus (LPC_UART1_TypeDef *UARTx)
Get current status of modem status register.
void | UART_RS485Config (LPC_UART1_TypeDef *UARTx, UART1_RS485_CTRLCFG_Type *RS485ConfigStruct)
Configure UART peripheral in RS485 mode according to the specified parameters in the RS485ConfigStruct.
void | UART_RS485ReceiverCmd (LPC_UART1_TypeDef *UARTx, FunctionalState NewState)
Enable/Disable receiver in RS485 module in UART1.
void | UART_RS485SendSlvAddr (LPC_UART1_TypeDef *UARTx, uint8_t SlvAddr)
Send Slave address frames on RS485 bus.
uint32_t | UART_RS485SendData (LPC_UART1_TypeDef *UARTx, uint8_t *pData, uint32_t size)
Send Data frames on RS485 bus.
void | UART_IrDAInvtInputCmd (LPC_UART_TypeDef *UARTx, FunctionalState NewState)
Enable or disable inverting serial input function of IrDA on UART peripheral.
void | UART_IrDACmd (LPC_UART_TypeDef *UARTx, FunctionalState NewState)
Enable or disable IrDA function on UART peripheral.
void | UART_IrDAPulseDivConfig (LPC_UART_TypeDef *UARTx, UART_IrDA_PULSE_Type PulseDiv)
Configure Pulse divider for IrDA function on UART peripheral.
uint32_t | UART_RS485Send (LPC_UART1_TypeDef *UARTx, uint8_t *pDatFrm, uint32_t size, uint8_t ParityStick)
Send data on RS485 bus with specified parity stick value (9-bit mode).

Function Documentation

void UART_ABClearIntPending | ( | LPC_UART_TypeDef * | UARTx,
 |  | UART_ABEO_Type | ABIntType
 | ) |  |

Clear Autobaud Interrupt Pending.

Parameters:
[in] UARTx UART peripheral selected, should be
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
[in] ABIntType type of auto-baud interrupt, should be:
  • UART_AUTOBAUD_INTSTAT_ABEO: End of Auto-baud interrupt
  • UART_AUTOBAUD_INTSTAT_ABTO: Auto-baud time out interrupt
Returns:
none

Definition at line 977 of file lpc17xx_uart.c.

void UART_ABCmd | ( | LPC_UART_TypeDef * | UARTx,
 |  | UART_AB_CFG_Type * | ABConfigStruct,
 |  | FunctionalState | NewState
 | ) |  |

Start/Stop Auto Baudrate activity.

Parameters:
[in] UARTx UART peripheral selected, should be
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
[in] ABConfigStruct A pointer to UART_AB_CFG_Type structure that contains specified information about UART auto baudrate configuration
[in] NewState New State of Auto baudrate activity, should be:
  • ENABLE: Start this activity
  • DISABLE: Stop this activity Note: Auto-baudrate mode enable bit will be cleared once this mode completed.
Returns:
none

Definition at line 909 of file lpc17xx_uart.c.

FlagStatus UART_CheckBusy ( LPC_UART_TypeDef * UARTx )

Check whether if UART is busy or not.

Parameters:
[in] UARTx UART peripheral selected, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
Returns:
RESET if UART is not busy, otherwise return SET.

Definition at line 798 of file lpc17xx_uart.c.

void UART_ConfigStructInit ( UART_CFG_Type * UART_InitStruct )

Fills each UART_InitStruct member with its default value:

  • 9600 bps
  • 8-bit data
  • 1 Stopbit
  • None Parity
    Parameters:
    [in] UART_InitStruct Pointer to a UART_CFG_Type structure which will be initialized.
    Returns:
    None

Definition at line 452 of file lpc17xx_uart.c.

void UART_DeInit ( LPC_UART_TypeDef * UARTx )

De-initializes the UARTx peripheral registers to their default reset values.

Parameters:
[in] UARTx UART peripheral selected, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
Returns:
None

Definition at line 402 of file lpc17xx_uart.c.

void UART_FIFOConfig | ( | LPC_UART_TypeDef * | UARTx,
 |  | UART_FIFO_CFG_Type * | FIFOCfg
 | ) |  |

Configure FIFO function on selected UART peripheral.

Parameters:
[in] UARTx UART peripheral selected, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
[in] FIFOCfg Pointer to a UART_FIFO_CFG_Type Structure that contains specified information about FIFO configuration
Returns:
none

Definition at line 819 of file lpc17xx_uart.c.

void UART_FIFOConfigStructInit ( UART_FIFO_CFG_Type * UART_FIFOInitStruct )

Fills each UART_FIFOInitStruct member with its default value:

  • FIFO_DMAMode = DISABLE
  • FIFO_Level = UART_FIFO_TRGLEV0
  • FIFO_ResetRxBuf = ENABLE
  • FIFO_ResetTxBuf = ENABLE
  • FIFO_State = ENABLE
Parameters:
[in] UART_FIFOInitStruct Pointer to a UART_FIFO_CFG_Type structure which will be initialized.
Returns:
None

Definition at line 883 of file lpc17xx_uart.c.

void UART_ForceBreak ( LPC_UART_TypeDef * UARTx )

Force BREAK character on UART line, output pin UARTx TXD is forced to logic 0.

Parameters:
[in] UARTx UART peripheral selected, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
Returns:
None

Definition at line 642 of file lpc17xx_uart.c.

void UART_FullModemConfigMode | ( | LPC_UART1_TypeDef * | UARTx,
 |  | UART_MODEM_MODE_Type | Mode,
 |  | FunctionalState | NewState
 | ) |  |

Configure Full Modem mode for UART peripheral.

Parameters:
[in] UARTx LPC_UART1 (only)
[in] Mode Full Modem mode, should be:
  • UART1_MODEM_MODE_LOOPBACK: Loop back mode.
  • UART1_MODEM_MODE_AUTO_RTS: Auto-RTS mode.
  • UART1_MODEM_MODE_AUTO_CTS: Auto-CTS mode.
[in] NewState New State of this mode, should be:
  • ENABLE: Enable this mode.
  • DISABLE: Disable this mode.
Returns:
none

Definition at line 1168 of file lpc17xx_uart.c.

void UART_FullModemForcePinState | ( | LPC_UART1_TypeDef * | UARTx,
 |  | UART_MODEM_PIN_Type | Pin,
 |  | UART1_SignalState | NewState
 | ) |  |

Force pin DTR/RTS corresponding to given state (Full modem mode)

Parameters:
[in] UARTx LPC_UART1 (only)
[in] Pin Pin that NewState will be applied to, should be:
  • UART1_MODEM_PIN_DTR: DTR pin.
  • UART1_MODEM_PIN_RTS: RTS pin.
[in] NewState New State of DTR/RTS pin, should be:
  • INACTIVE: Force the pin to inactive signal.
  • ACTIVE: Force the pin to active signal.
Returns:
none

Definition at line 1128 of file lpc17xx_uart.c.

uint8_t UART_FullModemGetStatus ( LPC_UART1_TypeDef * UARTx )

Get current status of modem status register.

Parameters:
[in] UARTx LPC_UART1 (only)
Returns:
Current value of modem status register Note: The return value of this function must be ANDed with each member UART_MODEM_STAT_type enumeration to determine current flag status corresponding to each modem flag status. Because some flags in modem status register will be cleared after reading, the next reading modem register could not be correct. So this function used to read modem status register in one time only, then the return value used to check all flags.

Definition at line 1214 of file lpc17xx_uart.c.

uint32_t UART_GetIntId ( LPC_UART_TypeDef * UARTx )

Get Interrupt Identification value.

Parameters:
[in] UARTx UART peripheral selected, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
Returns:
Current value of UART UIIR register in UART peripheral.

Definition at line 783 of file lpc17xx_uart.c.

uint8_t UART_GetLineStatus ( LPC_UART_TypeDef * UARTx )

Get current value of Line Status register in UART peripheral.

Parameters:
[in] UARTx UART peripheral selected, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
Returns:
Current value of Line Status register in UART peripheral. Note: The return value of this function must be ANDed with each member in UART_LS_Type enumeration to determine current flag status corresponding to each Line status type. Because some flags in Line Status register will be cleared after reading, the next reading Line Status register could not be correct. So this function used to read Line status register in one time only, then the return value used to check all flags.

Definition at line 760 of file lpc17xx_uart.c.

void UART_Init | ( | LPC_UART_TypeDef * | UARTx,
 |  | UART_CFG_Type * | UART_ConfigStruct
 | ) |  |

Initializes the UARTx peripheral according to the specified parameters in the UART_ConfigStruct.

Parameters:
[in] UARTx UART peripheral selected, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
[in] UART_ConfigStruct Pointer to a UART_CFG_Type structure that contains the configuration information for the specified UART peripheral.
Returns:
None

Definition at line 196 of file lpc17xx_uart.c.

void UART_IntConfig | ( | LPC_UART_TypeDef * | UARTx,
 |  | UART_INT_Type | UARTIntCfg,
 |  | FunctionalState | NewState
 | ) |  |

Enable or disable specified UART interrupt.

Parameters:
[in] UARTx UART peripheral selected, should be
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
[in] UARTIntCfg Specifies the interrupt flag, should be one of the following:
  • UART_INTCFG_RBR : RBR Interrupt enable
  • UART_INTCFG_THRE : THR Interrupt enable
  • UART_INTCFG_RLS : RX line status interrupt enable
  • UART1_INTCFG_MS : Modem status interrupt enable (UART1 only)
  • UART1_INTCFG_CTS : CTS1 signal transition interrupt enable (UART1 only)
  • UART_INTCFG_ABEO : Enables the end of auto-baud interrupt
  • UART_INTCFG_ABTO : Enables the auto-baud time-out interrupt
[in] NewState New state of specified UART interrupt type, should be:
  • ENALBE: Enable this UART interrupt type.
  • DISALBE: Disable this UART interrupt type.
Returns:
None

Definition at line 679 of file lpc17xx_uart.c.

void UART_IrDACmd | ( | LPC_UART_TypeDef * | UARTx,
 |  | FunctionalState | NewState
 | ) |  |

Enable or disable IrDA function on UART peripheral.

Parameters:
[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
[in] NewState New state of IrDA function, should be:
  • ENABLE: Enable this function.
  • DISABLE: Disable this function.
Returns:
none

Definition at line 1066 of file lpc17xx_uart.c.

void UART_IrDAInvtInputCmd | ( | LPC_UART_TypeDef * | UARTx,
 |  | FunctionalState | NewState
 | ) |  |

Enable or disable inverting serial input function of IrDA on UART peripheral.

Parameters:
[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
[in] NewState New state of inverting serial input, should be:
  • ENABLE: Enable this function.
  • DISABLE: Disable this function.
Returns:
none

Definition at line 1042 of file lpc17xx_uart.c.

void UART_IrDAPulseDivConfig | ( | LPC_UART_TypeDef * | UARTx,
 |  | UART_IrDA_PULSE_Type | PulseDiv
 | ) |  |

Configure Pulse divider for IrDA function on UART peripheral.

Parameters:
[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
[in] PulseDiv Pulse Divider value from Peripheral clock, should be one of the following:
  • UART_IrDA_PULSEDIV2 : Pulse width = 2 * Tpclk
  • UART_IrDA_PULSEDIV4 : Pulse width = 4 * Tpclk
  • UART_IrDA_PULSEDIV8 : Pulse width = 8 * Tpclk
  • UART_IrDA_PULSEDIV16 : Pulse width = 16 * Tpclk
  • UART_IrDA_PULSEDIV32 : Pulse width = 32 * Tpclk
  • UART_IrDA_PULSEDIV64 : Pulse width = 64 * Tpclk
  • UART_IrDA_PULSEDIV128 : Pulse width = 128 * Tpclk
  • UART_IrDA_PULSEDIV256 : Pulse width = 256 * Tpclk
Returns:
none

Definition at line 1098 of file lpc17xx_uart.c.

uint32_t UART_Receive | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint8_t * | rxbuf,
 |  | uint32_t | buflen,
 |  | TRANSFER_BLOCK_Type | flag
 | ) |  |

Receive a block of data via UART peripheral.

Parameters:
[in] UARTx Selected UART peripheral used to send data, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
[out] | rxbuf | Pointer to Received buffer
[in] | buflen | Length of Received buffer
[in] | flag | Flag mode, should be NONE_BLOCKING or BLOCKING
Returns:
Number of bytes received

Note: when using UART in BLOCKING mode, a time-out condition is used via defined symbol UART_BLOCKING_TIMEOUT.

Definition at line 591 of file lpc17xx_uart.c.

uint8_t UART_ReceiveByte ( LPC_UART_TypeDef * UARTx )

Receive a single data from UART peripheral.

Parameters:
[in] UARTx UART peripheral selected, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
Returns:
Data received

Definition at line 496 of file lpc17xx_uart.c.

void UART_RS485Config | ( | LPC_UART1_TypeDef * | UARTx,
 |  | UART1_RS485_CTRLCFG_Type * | RS485ConfigStruct
 | ) |  |

Configure UART peripheral in RS485 mode according to the specified parameters in the RS485ConfigStruct.

Parameters:
[in] | UARTx | LPC_UART1 (only)
[in] | RS485ConfigStruct | Pointer to a UART1_RS485_CTRLCFG_Type structure that contains the configuration information for specified UART in RS485 mode.
Returns:
None

Definition at line 1232 of file lpc17xx_uart.c.

void UART_RS485ReceiverCmd | ( | LPC_UART1_TypeDef * | UARTx,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable receiver in RS485 module in UART1.

Parameters:
[in] UARTx LPC_UART1 (only)
[in] NewState New State of command, should be:
  • ENABLE: Enable this function.
  • DISABLE: Disable this function.
Returns:
None

Definition at line 1304 of file lpc17xx_uart.c.

uint32_t UART_RS485Send | ( | LPC_UART1_TypeDef * | UARTx,
 |  | uint8_t * | pDatFrm,
 |  | uint32_t | size,
 |  | uint8_t | ParityStick
 | ) |  |

Send data on RS485 bus with specified parity stick value (9-bit mode).

Parameters:
[in] | UARTx | LPC_UART1 (only)
[in] | pDatFrm | Pointer to data frame.
[in] | size | Size of data.
[in] | ParityStick | Parity Stick value, should be 0 or 1.
Returns:
None

Definition at line 1321 of file lpc17xx_uart.c.

uint32_t UART_RS485SendData | ( | LPC_UART1_TypeDef * | UARTx,
 |  | uint8_t * | pData,
 |  | uint32_t | size
 | ) |  |

Send Data frames on RS485 bus.

Parameters:
[in] | UARTx | LPC_UART1 (only)
[in] | pData | Pointer to data to be sent.
[in] | size | Size of data frame to be sent.
Returns:
None

Definition at line 1359 of file lpc17xx_uart.c.

void UART_RS485SendSlvAddr | ( | LPC_UART1_TypeDef * | UARTx,
 |  | uint8_t | SlvAddr
 | ) |  |

Send Slave address frames on RS485 bus.

Parameters:
[in] | UARTx | LPC_UART1 (only)
[in] | SlvAddr | Slave Address.
Returns:
None

Definition at line 1347 of file lpc17xx_uart.c.

uint32_t UART_Send | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint8_t * | txbuf,
 |  | uint32_t | buflen,
 |  | TRANSFER_BLOCK_Type | flag
 | ) |  |

Send a block of data via UART peripheral.

Parameters:
[in] UARTx Selected UART peripheral used to send data, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
[in] | txbuf | Pointer to Transmit buffer
[in] | buflen | Length of Transmit buffer
[in] | flag | Flag used in UART transfer, should be NONE_BLOCKING or BLOCKING
Returns:
Number of bytes sent.

Note: when using UART in BLOCKING mode, a time-out condition is used via defined symbol UART_BLOCKING_TIMEOUT.

Definition at line 526 of file lpc17xx_uart.c.

void UART_SendByte | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint8_t | Data
 | ) |  |

Transmit a single data through UART peripheral.

Parameters:
[in] UARTx UART peripheral selected, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
[in] Data Data to transmit (must be 8-bit long)
Returns:
None

Definition at line 471 of file lpc17xx_uart.c.

void UART_TxCmd | ( | LPC_UART_TypeDef * | UARTx,
 |  | FunctionalState | NewState
 | ) |  |

Enable/Disable transmission on UART TxD pin.

Parameters:
[in] UARTx UART peripheral selected, should be:
  • LPC_UART0: UART0 peripheral
    • LPC_UART1: UART1 peripheral
    • LPC_UART2: UART2 peripheral
    • LPC_UART3: UART3 peripheral
[in] NewState New State of Tx transmission function, should be:
  • ENABLE: Enable this function
  • DISABLE: Disable this function
Returns:
none

Definition at line 1000 of file lpc17xx_uart.c.

Generated on Mon Nov 28 2011 11:15:18 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: WDT (Watch-Dog Timer)

Modules
WDT (Watch-Dog Timer)
LPC1700CMSIS Firmware Library

Modules

WDT Private Macros
WDT Public Types
WDT Public Functions
Generated on Mon Nov 28 2011 11:15:18 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: WDT Private Macros

Defines
WDT Private Macros
WDT (Watch-Dog Timer)

Defines

#define | WDT_WDMOD_WDEN ((uint32_t)(1<<0))
#define | WDT_WDMOD_WDRESET ((uint32_t)(1<<1))
#define | WDT_WDMOD_WDTOF ((uint32_t)(1<<2))
#define | WDT_WDMOD_WDINT ((uint32_t)(1<<3))
#define | WDT_WDMOD(n) ((uint32_t)(1<<1))
#define | WDT_US_INDEX ((uint32_t)(1000000))
#define | WDT_TIMEOUT_MIN ((uint32_t)(0xFF))
#define | WDT_TIMEOUT_MAX ((uint32_t)(0xFFFFFFFF))
#define | WDT_WDMOD_MASK (uint8_t)(0x02)
#define | WDT_WDTC_MASK (uint8_t)(0xFFFFFFFF)
#define | WDT_WDFEED_MASK (uint8_t)(0x000000FF)
#define | WDT_WDCLKSEL_MASK (uint8_t)(0x03)
#define | WDT_WDCLKSEL_RC (uint8_t)(0x00)
#define | WDT_WDCLKSEL_PCLK (uint8_t)(0x01)
#define | WDT_WDCLKSEL_RTC (uint8_t)(0x02)
#define | PARAM_WDT_CLK_OPT(OPTION)
#define | PARAM_WDT_MODE_OPT(OPTION) ((OPTION ==WDT_MODE_INT_ONLY)||(OPTION ==WDT_MODE_RESET))

Define Documentation

#define PARAM_WDT_CLK_OPT ( OPTION )
Value:
((OPTION ==WDT_CLKSRC_IRC)||(OPTION ==WDT_CLKSRC_IRC)\
||(OPTION ==WDT_CLKSRC_IRC))

Definition at line 88 of file lpc17xx_wdt.h.

#define PARAM_WDT_MODE_OPT ( OPTION ) ((OPTION ==WDT_MODE_INT_ONLY)||(OPTION ==WDT_MODE_RESET))

Definition at line 92 of file lpc17xx_wdt.h.

#define WDT_TIMEOUT_MAX ((uint32_t)(0xFFFFFFFF))

WDT Time out maximum value

Definition at line 69 of file lpc17xx_wdt.h.

#define WDT_TIMEOUT_MIN ((uint32_t)(0xFF))

WDT Time out minimum value

Definition at line 67 of file lpc17xx_wdt.h.

#define WDT_US_INDEX ((uint32_t)(1000000))

Define divider index for microsecond ( us )

Definition at line 65 of file lpc17xx_wdt.h.

#define WDT_WDCLKSEL_MASK (uint8_t)(0x03)

Watchdog timer value register mask

Definition at line 78 of file lpc17xx_wdt.h.

#define WDT_WDCLKSEL_PCLK (uint8_t)(0x01)

Clock selected from PCLK

Definition at line 82 of file lpc17xx_wdt.h.

#define WDT_WDCLKSEL_RC (uint8_t)(0x00)

Clock selected from internal RC

Definition at line 80 of file lpc17xx_wdt.h.

#define WDT_WDCLKSEL_RTC (uint8_t)(0x02)

Clock selected from external RTC

Definition at line 84 of file lpc17xx_wdt.h.

#define WDT_WDFEED_MASK (uint8_t)(0x000000FF)

Watchdog feed sequence register mask

Definition at line 76 of file lpc17xx_wdt.h.

#define WDT_WDMOD ( n ) ((uint32_t)(1<<1))

WDT Mode

Definition at line 62 of file lpc17xx_wdt.h.

#define WDT_WDMOD_MASK (uint8_t)(0x02)

Watchdog mode register mask

Definition at line 72 of file lpc17xx_wdt.h.

#define WDT_WDMOD_WDEN ((uint32_t)(1<<0))

WDT interrupt enable bit

Definition at line 54 of file lpc17xx_wdt.h.

#define WDT_WDMOD_WDINT ((uint32_t)(1<<3))

WDT Time Out flag bit

Definition at line 60 of file lpc17xx_wdt.h.

#define WDT_WDMOD_WDRESET ((uint32_t)(1<<1))

WDT interrupt enable bit

Definition at line 56 of file lpc17xx_wdt.h.

#define WDT_WDMOD_WDTOF ((uint32_t)(1<<2))

WDT time out flag bit

Definition at line 58 of file lpc17xx_wdt.h.

#define WDT_WDTC_MASK (uint8_t)(0xFFFFFFFF)

Watchdog timer constant register mask

Definition at line 74 of file lpc17xx_wdt.h.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: WDT Public Types

Enumerations
WDT Public Types
WDT (Watch-Dog Timer)

Enumerations

enum | WDT_CLK_OPT { WDT_CLKSRC_IRC = 0, WDT_CLKSRC_PCLK = 1, WDT_CLKSRC_RTC = 2 }
Clock source option for WDT. More...
enum | WDT_MODE_OPT { WDT_MODE_INT_ONLY = 0, WDT_MODE_RESET = 1 }
WDT operation mode. More...

Enumeration Type Documentation

enum WDT_CLK_OPT

Clock source option for WDT.

Enumerator:
WDT_CLKSRC_IRC

Clock source from Internal RC oscillator

WDT_CLKSRC_PCLK

Selects the APB peripheral clock (PCLK)

WDT_CLKSRC_RTC

Selects the RTC oscillator

Definition at line 104 of file lpc17xx_wdt.h.

enum WDT_MODE_OPT

WDT operation mode.

Enumerator:
WDT_MODE_INT_ONLY

Use WDT to generate interrupt only

WDT_MODE_RESET

Use WDT to generate interrupt and reset MCU

Definition at line 111 of file lpc17xx_wdt.h.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: WDT Public Functions

Functions
WDT Public Functions
WDT (Watch-Dog Timer)

Functions

void | WDT_Init (WDT_CLK_OPT ClkSrc, WDT_MODE_OPT WDTMode)
Initial for Watchdog function Clock source = RTC ,.
void | WDT_Start (uint32_t TimeOut)
Start WDT activity with given timeout value.
void | WDT_Feed (void)
After set WDTEN, call this function to start Watchdog or reload the Watchdog timer.
void | WDT_UpdateTimeOut (uint32_t TimeOut)
Update WDT timeout value and feed.
FlagStatus | WDT_ReadTimeOutFlag (void)
Read WDT Time out flag.
void | WDT_ClrTimeOutFlag (void)
Clear WDT Time out flag.
uint32_t | WDT_GetCurrentCount (void)
Get the current value of WDT.

Function Documentation

void WDT_ClrTimeOutFlag ( void )

Clear WDT Time out flag.

Parameters:
[in] None
Returns:
None

Definition at line 211 of file lpc17xx_wdt.c.

void WDT_Feed ( void )

After set WDTEN, call this function to start Watchdog or reload the Watchdog timer.

Parameters:
[in] None
Returns:
None

Definition at line 238 of file lpc17xx_wdt.c.

uint32_t WDT_GetCurrentCount ( void )

Get the current value of WDT.

Parameters:
[in] None
Returns:
current value of WDT

Definition at line 253 of file lpc17xx_wdt.c.

void WDT_Init | ( | WDT_CLK_OPT | ClkSrc,
 |  | WDT_MODE_OPT | WDTMode
 | ) |  |

Initial for Watchdog function Clock source = RTC ,.

Parameters:
[in] ClkSrc Select clock source, should be:
  • WDT_CLKSRC_IRC: Clock source from Internal RC oscillator
  • WDT_CLKSRC_PCLK: Selects the APB peripheral clock (PCLK)
  • WDT_CLKSRC_RTC: Selects the RTC oscillator
[in] WDTMode WDT mode, should be:
  • WDT_MODE_INT_ONLY: Use WDT to generate interrupt only
  • WDT_MODE_RESET: Use WDT to generate interrupt and reset MCU
Returns:
None

Definition at line 164 of file lpc17xx_wdt.c.

FlagStatus WDT_ReadTimeOutFlag ( void )

Read WDT Time out flag.

Parameters:
[in] None
Returns:
Time out flag status of WDT

Definition at line 201 of file lpc17xx_wdt.c.

void WDT_Start ( uint32_t TimeOut )

Start WDT activity with given timeout value.

Parameters:
[in] TimeOut WDT reset after timeout if it is not feed
Returns:
None

Definition at line 184 of file lpc17xx_wdt.c.

void WDT_UpdateTimeOut ( uint32_t TimeOut )

Update WDT timeout value and feed.

Parameters:
[in] TimeOut TimeOut value to be updated
Returns:
None

Definition at line 221 of file lpc17xx_wdt.c.

Generated on Mon Nov 28 2011 11:15:18 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_Types

Modules
LPC_Types
LPC1700CMSIS Firmware Library

Modules

LPC_Types Public Types
LPC_Types Public Macros
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_Types Public Types

Defines | Typedefs | Enumerations
LPC_Types Public Types
LPC_Types

Defines

#define | PARAM_SETSTATE(State) ((State==RESET) || (State==SET))
#define | PARAM_FUNCTIONALSTATE(State) ((State==DISABLE) || (State==ENABLE))

Typedefs

typedef enum FlagStatus | IntStatus
typedef enum FlagStatus | SetState
typedef void(* | PFV )()
typedef int32_t(* | PFI )()
typedef char | CHAR
typedef uint8_t | UNS_8
typedef int8_t | INT_8
typedef uint16_t | UNS_16
typedef int16_t | INT_16
typedef uint32_t | UNS_32
typedef int32_t | INT_32
typedef int64_t | INT_64
typedef uint64_t | UNS_64
typedef Bool | BOOL_32
typedef Bool | BOOL_16
typedef Bool | BOOL_8

Enumerations

enum | Bool { FALSE = 0, TRUE = !FALSE }
Boolean Type definition. More...
enum | FlagStatus { RESET = 0, SET = !RESET }
Flag Status and Interrupt Flag Status type definition. More...
enum | FunctionalState { DISABLE = 0, ENABLE = !DISABLE }
Functional State Definition. More...
enum | Status { ERROR = 0, SUCCESS = !ERROR }
enum | TRANSFER_BLOCK_Type { NONE_BLOCKING = 0, BLOCKING }

Define Documentation

#define PARAM_FUNCTIONALSTATE ( State ) ((State==DISABLE) || (State==ENABLE))

Definition at line 62 of file lpc_types.h.

#define PARAM_SETSTATE ( State ) ((State==RESET) || (State==SET))

Definition at line 56 of file lpc_types.h.

Typedef Documentation

typedef Bool BOOL_16

16 bit boolean type

Definition at line 190 of file lpc_types.h.

typedef Bool BOOL_32

32 bit boolean type

Definition at line 187 of file lpc_types.h.

typedef Bool BOOL_8

8 bit boolean type

Definition at line 193 of file lpc_types.h.

typedef char CHAR

SMA type for character type

Definition at line 160 of file lpc_types.h.

typedef int16_t INT_16

SMA type for 16 bit signed value

Definition at line 172 of file lpc_types.h.

typedef int32_t INT_32

SMA type for 32 bit signed value

Definition at line 178 of file lpc_types.h.

typedef int64_t INT_64

SMA type for 64 bit signed value

Definition at line 181 of file lpc_types.h.

typedef int8_t INT_8

SMA type for 8 bit signed value

Definition at line 166 of file lpc_types.h.

typedef enum FlagStatus IntStatus
typedef int32_t(* PFI)()

Pointer to Function returning int32_t (any number of parameters)

Definition at line 84 of file lpc_types.h.

typedef void(* PFV)()

Pointer to Function returning Void (any number of parameters)

Definition at line 81 of file lpc_types.h.

typedef enum FlagStatus SetState
typedef uint16_t UNS_16

SMA type for 16 bit unsigned value

Definition at line 169 of file lpc_types.h.

typedef uint32_t UNS_32

SMA type for 32 bit unsigned value

Definition at line 175 of file lpc_types.h.

typedef uint64_t UNS_64

SMA type for 64 bit unsigned value

Definition at line 184 of file lpc_types.h.

typedef uint8_t UNS_8

SMA type for 8 bit unsigned value

Definition at line 163 of file lpc_types.h.

Enumeration Type Documentation

enum Bool

Boolean Type definition.

Enumerator:
FALSE
TRUE

Definition at line 50 of file lpc_types.h.

enum FlagStatus

Flag Status and Interrupt Flag Status type definition.

Enumerator:
RESET
SET

Definition at line 55 of file lpc_types.h.

enum FunctionalState

Functional State Definition.

Enumerator:
DISABLE
ENABLE

Definition at line 61 of file lpc_types.h.

enum Status

@ Status type definition

Enumerator:
ERROR
SUCCESS

Definition at line 67 of file lpc_types.h.

enum TRANSFER_BLOCK_Type

Read/Write transfer type mode (Block or non-block)

Enumerator:
NONE_BLOCKING

None Blocking type

BLOCKING

Blocking type

Definition at line 73 of file lpc_types.h.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_Types Public Macros

Defines
LPC_Types Public Macros
LPC_Types

Defines

#define | _BIT(n) (1<<n)
#define | _SBF(f, v) (v<<f)
#define | _BITMASK(field_width) ( _BIT(field_width) - 1)
#define | NULL ((void*) 0)
#define | NELEMENTS(array) (sizeof (array) / sizeof (array[0]))
#define | STATIC static
#define | EXTERN extern
#define | MAX(a, b) (((a) > (b)) ? (a) : (b))
#define | MIN(a, b) (((a) < (b)) ? (a) : (b))

Define Documentation

#define _BIT ( n ) (1<<n)

Definition at line 102 of file lpc_types.h.

#define _BITMASK ( field_width ) ( _BIT(field_width) - 1)

Definition at line 127 of file lpc_types.h.

#define _SBF | ( | f,
 |  | v
 | ) | (v<<f)

Definition at line 110 of file lpc_types.h.

#define EXTERN extern

Definition at line 140 of file lpc_types.h.

#define MAX | ( | a,
 |  | b
 | ) | (((a) > (b)) ? (a) : (b))

Definition at line 143 of file lpc_types.h.

#define MIN | ( | a,
 |  | b
 | ) | (((a) < (b)) ? (a) : (b))

Definition at line 146 of file lpc_types.h.

#define NELEMENTS ( array ) (sizeof (array) / sizeof (array[0]))

Definition at line 135 of file lpc_types.h.

#define NULL ((void*) 0)

Definition at line 131 of file lpc_types.h.

#define STATIC static

Definition at line 138 of file lpc_types.h.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC1700CMSIS Examples

Modules
LPC1700CMSIS Examples

Modules

ADC
CAN
Cortex-M3
DAC
EMAC
GPDMA
GPIO
I2C
I2S
LCD
MCPWM
NVIC
PWM
PWR
QEI
RIT
RTC
SPI
SSP
SysTick
TIMER
UART
USBDEV
WDT
Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: ADC

Modules
ADC
LPC1700CMSIS Examples

Modules

Burst
DMA
HardwareTrigger
INTERRUPT
Polling
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Burst

Defines | Functions | Variables
Burst
ADC

Defines

#define | MCB_LPC_1768
#define | MCB_LPC17XX_ADC_INJECT_TEST
#define | DMA_SIZE 8
#define | GPIO_INT (1<<10)
#define | POLL_LED (1<<4)

Functions

int | c_entry (void)
c_entry: Main ADC program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"

Define Documentation

#define DMA_SIZE 8

DMA size of transfer

Definition at line 62 of file adc_burst_test.c.

#define GPIO_INT (1<<10)

Definition at line 65 of file adc_burst_test.c.

#define MCB_LPC17XX_ADC_INJECT_TEST

Definition at line 41 of file adc_burst_test.c.

#define MCB_LPC_1768

Definition at line 39 of file adc_burst_test.c.

#define POLL_LED (1<<4)

Definition at line 66 of file adc_burst_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main ADC program body

Parameters:
[in] None
Returns:
int

Definition at line 134 of file adc_burst_test.c.

int main ( void )

Definition at line 238 of file adc_burst_test.c.

Variable Documentation

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 69 of file adc_burst_test.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: DMA

Defines | Functions | Variables
DMA
ADC

Defines

#define | MCB_LPC_1768
#define | DMA_SIZE 1

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main ADC program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err

Define Documentation

#define DMA_SIZE 1

DMA size of transfer

Definition at line 51 of file adc_dma_test.c.

#define MCB_LPC_1768

Definition at line 39 of file adc_dma_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main ADC program body

Parameters:
[in] None
Returns:
int

Definition at line 125 of file adc_dma_test.c.

int main ( void )

Definition at line 251 of file adc_dma_test.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

__IO uint32_t Channel0_Err

Definition at line 76 of file adc_dma_test.c.

__IO uint32_t Channel0_TC

Definition at line 73 of file adc_dma_test.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 54 of file adc_dma_test.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: HardwareTrigger

Defines | Functions | Variables
HardwareTrigger
ADC

Defines

#define | _ADC_INT ADC_ADINTEN2
#define | _ADC_CHANNEL ADC_CHANNEL_2

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main ADC program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint32_t | adc_value

Define Documentation

#define _ADC_CHANNEL ADC_CHANNEL_2

Definition at line 39 of file adc_hardware_trigger_test.c.

#define _ADC_INT ADC_ADINTEN2

Definition at line 38 of file adc_hardware_trigger_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main ADC program body

Parameters:
[in] None
Returns:
int

Definition at line 96 of file adc_hardware_trigger_test.c.

int main ( void )

Definition at line 169 of file adc_hardware_trigger_test.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint32_t adc_value

Definition at line 55 of file adc_hardware_trigger_test.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 42 of file adc_hardware_trigger_test.c.

Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: INTERRUPT

Defines | Functions | Variables
INTERRUPT
ADC

Defines

#define | MCB_LPC_1768

Functions

void | ADC_IRQHandler (void)
ADC interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main ADC program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint32_t | adc_value

Define Documentation

#define MCB_LPC_1768

Definition at line 38 of file adc_interrupt_test.c.

Function Documentation

void ADC_IRQHandler ( void )

ADC interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None
int c_entry ( void )

c_entry: Main ADC program body

Parameters:
[in] None
Returns:
int

Definition at line 111 of file adc_interrupt_test.c.

int main ( void )

Definition at line 189 of file adc_interrupt_test.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint32_t adc_value

Definition at line 62 of file adc_interrupt_test.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 50 of file adc_interrupt_test.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Polling

Defines | Functions | Variables
Polling
ADC

Defines

#define | MCB_LPC_1768

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main ADC program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"

Define Documentation

#define MCB_LPC_1768

Definition at line 38 of file adc_polling_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main ADC program body

Parameters:
[in] None
Returns:
int

Definition at line 84 of file adc_polling_test.c.

int main ( void )

Definition at line 163 of file adc_polling_test.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 50 of file adc_polling_test.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN

Modules
CAN
LPC1700CMSIS Examples

Modules

CAN_LedControl
CAN_self_test
CAN_test_aflut
CAN_test_bypass_mode
CAN_test_two_kit
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN_LedControl

Functions | Variables
CAN_LedControl
CAN

Functions

void | print_menu ()
print menu
int | c_entry (void)
c_entry: Main CAN program body
int | main (void)

Variables

uint8_t | menu [] = "*******************************************************************************\n\r"
CAN_MSG_Type TXMsg
CAN_MSG_Type RXMsg
uint8_t | LED_Value
uint32_t | LED [8] = {(1<<6),(1<<5),(1<<4),(1<<3),(1<<2),(0x80000000),(1<<29),(1<<28)}

Function Documentation

int c_entry ( void )

c_entry: Main CAN program body

Parameters:
[in] none
Returns:
int

Definition at line 140 of file can_ledcontrol.c.

int main ( void )

Definition at line 264 of file can_ledcontrol.c.

void print_menu ( void )

print menu

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint32_t LED[8] = {(1<<6),(1<<5),(1<<4),(1<<3),(1<<2),(0x80000000),(1<<29),(1<<28)}

Definition at line 53 of file can_ledcontrol.c.

uint8_t LED_Value

Definition at line 52 of file can_ledcontrol.c.

uint8_t menu[] = "*******************************************************************************\n\r"

Definition at line 39 of file can_ledcontrol.c.

CAN_MSG_Type RXMsg

Definition at line 51 of file can_ledcontrol.c.

CAN_MSG_Type TXMsg

CAN variable definition

Definition at line 51 of file can_ledcontrol.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN_self_test

Functions | Variables
CAN_self_test
CAN

Functions

void | CAN_IRQHandler ()
CAN_IRQ Handler, control receive message operation param[in] none.
void | CAN_InitMessage (void)
Initialize transmit and receive message for Bypass operation.
void | print_menu ()
print menu
Bool | Check_Message (CAN_MSG_Type *TX_Msg, CAN_MSG_Type *RX_Msg)
Compare two message.
int | c_entry (void)
c_entry: Main CAN program body
int | main (void)

Variables

uint8_t | menu [] = "*******************************************************************************\n\r"
CAN_MSG_Type TXMsg
CAN_MSG_Type RXMsg
uint32_t | CANRxCount
uint32_t | CANTxCount = 0

Function Documentation

int c_entry ( void )

c_entry: Main CAN program body

Parameters:
[in] none
Returns:
int

To test Bypass Mode: we send infinite messages to CAN2 and check receive process via COM1

Definition at line 179 of file can_self_test.c.

void CAN_InitMessage ( void )

Initialize transmit and receive message for Bypass operation.

Parameters:
[in] none
Returns:
none

Definition at line 108 of file can_ledcontrol.c.

void CAN_IRQHandler ( void )

CAN_IRQ Handler, control receive message operation param[in] none.

Returns:
none
Bool Check_Message | ( | CAN_MSG_Type * | TX_Msg,
 |  | CAN_MSG_Type * | RX_Msg
 | ) |  |

Compare two message.

Parameters:
[in] | Tx_Msg | transmit message
[in] | Rx_Msg | receive message
Returns:
Bool should be:
  • TRUE: if two message is the same
  • FALSE: if two message is different

Definition at line 160 of file can_self_test.c.

int main ( void )

Definition at line 224 of file can_self_test.c.

void print_menu ( void )

print menu

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint32_t CANRxCount

Definition at line 48 of file can_self_test.c.

uint32_t CANTxCount = 0

Definition at line 48 of file can_self_test.c.

uint8_t menu[] = "*******************************************************************************\n\r"

Definition at line 35 of file can_self_test.c.

CAN_MSG_Type RXMsg

Definition at line 47 of file can_self_test.c.

CAN_MSG_Type TXMsg

CAN variable definition

Definition at line 47 of file can_self_test.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN_test_aflut

Defines | Functions | Variables
CAN_test_aflut
CAN

Defines

#define | MAX_ENTRY 512
#define | CAN_TX_MSG_CNT 10
#define | CAN_RX_MSG_CNT 5

Functions

void | CAN_IRQHandler (void)
CAN IRQ Handler.
void | CAN_PinCfg (void)
void | CAN_InitMessage (void)
Initialize transmit and receive message for Bypass operation.
void | PrintMessage (CAN_MSG_Type *CAN_Msg)
Print Message via COM1 param[in] msg: point to CAN_MSG_Type object that will be printed.
void | print_menu ()
print menu
void | CAN_ChangeAFTable (void)
Change AFLUT table.
int | c_entry (void)
c_entry: Main CAN program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
CAN_MSG_Type | AFTxMsg [CAN_TX_MSG_CNT]
CAN_MSG_Type | AFRxMsg [CAN_RX_MSG_CNT]
uint32_t | CANRxCount = 0
uint32_t | CANTxCount = 0
uint32_t | CANErrCount = 0
AF_SectionDef AFTable
FullCAN_Entry | FullCAN_Table [6]
SFF_Entry | SFF_Table [6]
SFF_GPR_Entry | SFF_GPR_Table [6]
EFF_Entry | EFF_Table [6]
EFF_GPR_Entry | EFF_GPR_Table [6]

Define Documentation

#define CAN_RX_MSG_CNT 5

Definition at line 40 of file can_test_aflut.c.

#define CAN_TX_MSG_CNT 10

Definition at line 39 of file can_test_aflut.c.

#define MAX_ENTRY 512

Definition at line 38 of file can_test_aflut.c.

Function Documentation

int c_entry ( void )

c_entry: Main CAN program body

Parameters:
[in] none
Returns:
int

Definition at line 404 of file can_test_aflut.c.

void CAN_ChangeAFTable ( void )

Change AFLUT table.

Parameters:
[in] none
Returns:
none

Definition at line 270 of file can_test_aflut.c.

void CAN_InitMessage ( void )

Initialize transmit and receive message for Bypass operation.

Parameters:
[in] none
Returns:
none

Definition at line 108 of file can_ledcontrol.c.

void CAN_IRQHandler ( void )

CAN IRQ Handler.

Parameters:
[in] none
Returns:
none
void CAN_PinCfg ( void )
int main ( void )

Definition at line 531 of file can_test_aflut.c.

void print_menu ( void )

print menu

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 122 of file adc_burst_test.c.

void PrintMessage ( CAN_MSG_Type * CAN_Msg )

Print Message via COM1 param[in] msg: point to CAN_MSG_Type object that will be printed.

Returns:
none

Variable Documentation

CAN_MSG_Type AFRxMsg[CAN_RX_MSG_CNT]

Definition at line 56 of file can_test_aflut.c.

AF_SectionDef AFTable

Definition at line 60 of file can_test_aflut.c.

CAN_MSG_Type AFTxMsg[CAN_TX_MSG_CNT]

Definition at line 56 of file can_test_aflut.c.

uint32_t CANErrCount = 0

Definition at line 58 of file can_test_aflut.c.

uint32_t CANRxCount = 0

Definition at line 57 of file can_test_aflut.c.

uint32_t CANTxCount = 0

Definition at line 57 of file can_test_aflut.c.

EFF_GPR_Entry EFF_GPR_Table[6]

Definition at line 65 of file can_test_aflut.c.

EFF_Entry EFF_Table[6]

Definition at line 64 of file can_test_aflut.c.

FullCAN_Entry FullCAN_Table[6]

Definition at line 61 of file can_test_aflut.c.

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 43 of file can_test_aflut.c.

SFF_GPR_Entry SFF_GPR_Table[6]

Definition at line 63 of file can_test_aflut.c.

SFF_Entry SFF_Table[6]

Definition at line 62 of file can_test_aflut.c.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN_test_bypass_mode

Functions | Variables
CAN_test_bypass_mode
CAN

Functions

void | CAN_IRQHandler ()
CAN_IRQ Handler, control receive message operation param[in] none.
void | CAN_InitMessage (void)
Initialize transmit and receive message for Bypass operation.
void | PrintMessage (CAN_MSG_Type *CAN_Msg)
Print Message via COM1 param[in] msg: point to CAN_MSG_Type object that will be printed.
void | print_menu ()
print menu
int | c_entry (void)
c_entry: Main CAN program body
int | main (void)

Variables

uint8_t | menu [] = "*******************************************************************************\n\r"
CAN_MSG_Type TXMsg
CAN_MSG_Type RXMsg
uint32_t | CANRxCount
uint32_t | CANTxCount = 0

Function Documentation

int c_entry ( void )

c_entry: Main CAN program body

Parameters:
[in] none
Returns:
int

To test Bypass Mode: we send infinite messages to CAN2 and check receive process via COM1

Definition at line 167 of file can_test_bypass_mode.c.

void CAN_InitMessage ( void )

Initialize transmit and receive message for Bypass operation.

Parameters:
[in] none
Returns:
none

Definition at line 108 of file can_ledcontrol.c.

void CAN_IRQHandler ( void )

CAN_IRQ Handler, control receive message operation param[in] none.

Returns:
none
int main ( void )

Definition at line 233 of file can_test_bypass_mode.c.

void print_menu ( void )

print menu

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 122 of file adc_burst_test.c.

void PrintMessage ( CAN_MSG_Type * CAN_Msg )

Print Message via COM1 param[in] msg: point to CAN_MSG_Type object that will be printed.

Returns:
none

Variable Documentation

uint32_t CANRxCount

Definition at line 49 of file can_test_bypass_mode.c.

uint32_t CANTxCount = 0

Definition at line 49 of file can_test_bypass_mode.c.

uint8_t menu[] = "*******************************************************************************\n\r"

Definition at line 36 of file can_test_bypass_mode.c.

CAN_MSG_Type RXMsg

Definition at line 48 of file can_test_bypass_mode.c.

CAN_MSG_Type TXMsg

CAN variable definition

Definition at line 48 of file can_test_bypass_mode.c.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN_test_two_kit

Defines | Functions | Variables
CAN_test_two_kit
CAN

Defines

#define | CAN_TRANSMIT 1
#define | CAN_RECEIVE !CAN_TRANSMIT
#define | TX_BUFFER_SIZE 4
#define | RX_BUFFER_SIZE 2

Functions

void | CAN_IRQHandler ()
CAN_IRQ Handler, control receive message operation param[in] none.
void | CAN_InitMessage (void)
Initialize transmit and receive message for Bypass operation.
Bool | CAN_VerifyMessage (CAN_MSG_Type Msg1, CAN_MSG_Type Msg2)
CAN_ERROR | CAN_SetupAFTable (void)
Setup Acceptance Filter Table.
void | CAN_InitAFMessage (void)
Initialize transmit and receive message for testing AF operation.
void | PrintMessage (CAN_MSG_Type *CAN_Msg)
Print Message via COM1 param[in] msg: point to CAN_MSG_Type object that will be printed.
void | print_menu (void)
print menu
int | c_entry (void)
c_entry: Main CAN program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
CAN_MSG_Type TXMsg
CAN_MSG_Type RXMsg
CAN_MSG_Type | AFTxMsg [TX_BUFFER_SIZE]
CAN_MSG_Type | AFRxMsg [RX_BUFFER_SIZE]
uint32_t | CANRxCount = 0
uint32_t | CANTxCount = 0
uint32_t | CANErrCount = 0

Define Documentation

#define CAN_RECEIVE !CAN_TRANSMIT

Definition at line 37 of file can_test_two_kit.c.

#define CAN_TRANSMIT 1

Definition at line 36 of file can_test_two_kit.c.

#define RX_BUFFER_SIZE 2

Definition at line 39 of file can_test_two_kit.c.

#define TX_BUFFER_SIZE 4

Definition at line 38 of file can_test_two_kit.c.

Function Documentation

int c_entry ( void )

c_entry: Main CAN program body

Parameters:
[in] none
Returns:
int

Definition at line 220 of file can_test_two_kit.c.

void CAN_InitAFMessage ( void )

Initialize transmit and receive message for testing AF operation.

Parameters:
[in] none
Returns:
none
void CAN_InitMessage ( void )

Initialize transmit and receive message for Bypass operation.

Parameters:
[in] none
Returns:
none

Definition at line 108 of file can_ledcontrol.c.

void CAN_IRQHandler ( void )

CAN_IRQ Handler, control receive message operation param[in] none.

Returns:
none
CAN_ERROR CAN_SetupAFTable ( void )

Setup Acceptance Filter Table.

Parameters:
[in] none
Returns:
none Note: not use Group Standard Frame, just use for Explicit Standard and Extended Frame
Bool CAN_VerifyMessage | ( | CAN_MSG_Type | Msg1,
 |  | CAN_MSG_Type | Msg2
 | ) |  |
int main ( void )

Definition at line 294 of file can_test_two_kit.c.

void print_menu ( void )

print menu

Print menu.

Parameters:
[in] none
Returns:
none

Definition at line 209 of file can_test_two_kit.c.

void PrintMessage ( CAN_MSG_Type * CAN_Msg )

Print Message via COM1 param[in] msg: point to CAN_MSG_Type object that will be printed.

Returns:
none

Variable Documentation

CAN_MSG_Type AFRxMsg[RX_BUFFER_SIZE]

Definition at line 54 of file can_test_two_kit.c.

CAN_MSG_Type AFTxMsg[TX_BUFFER_SIZE]

Definition at line 54 of file can_test_two_kit.c.

uint32_t CANErrCount = 0

Definition at line 56 of file can_test_two_kit.c.

uint32_t CANRxCount = 0

Definition at line 55 of file can_test_two_kit.c.

uint32_t CANTxCount = 0

Definition at line 55 of file can_test_two_kit.c.

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 42 of file can_test_two_kit.c.

CAN_MSG_Type RXMsg

Definition at line 53 of file can_test_two_kit.c.

CAN_MSG_Type TXMsg

CAN variable definition

Definition at line 53 of file can_test_two_kit.c.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Cortex-M3

Modules
Cortex-M3
LPC1700CMSIS Examples

Modules

Bit-banding
MPU
Privilege_mode
Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Bit-banding

Defines | Functions | Variables
Bit-banding
Cortex-M3

Defines

#define | BITBAND_SRAM_REF 0x20000000
#define | BITBAND_SRAM_BASE 0x22000000
#define | BITBAND_SRAM(a, b) ((BITBAND_SRAM_BASE + ((a-BITBAND_SRAM_REF)<<5) + (b<<2)))
#define | BITBAND_PERI_REF 0x40000000
#define | BITBAND_PERI_BASE 0x42000000
#define | BITBAND_PERI(a, b) ((BITBAND_PERI_BASE + ((a-BITBAND_PERI_REF)<<5) + (b<<2)))
#define | BITBAND_SRAM_ClearBit(a, b) (*(volatile uint32_t *) (BITBAND_SRAM(a,b)) = 0)
#define | BITBAND_SRAM_SetBit(a, b) (*(volatile uint32_t *) (BITBAND_SRAM(a,b)) = 1)
#define | BITBAND_SRAM_GetBit(a, b) (*(volatile uint32_t *) (BITBAND_SRAM(a,b)))
#define | BITBAND_PERI_ClearBit(a, b) (*(volatile uint32_t *) (BITBAND_PERI(a,b)) = 0)
#define | BITBAND_PERI_SetBit(a, b) (*(volatile uint32_t *) (BITBAND_PERI(a,b)) = 1)
#define | BITBAND_PERI_GetBit(a, b) (*(volatile uint32_t *) (BITBAND_PERI(a,b)))
#define | VAR_ADDRESS 0x2007C000
#define | VAR_BIT 3
#define | PERI_ADDRESS 0x40020000
#define | PERI_BIT 5

Functions

int | c_entry (void)
c_entry: main function
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"

Define Documentation

#define BITBAND_PERI | ( | a,
 |  | b
 | ) | ((BITBAND_PERI_BASE + ((a-BITBAND_PERI_REF)<<5) + (b<<2)))

Definition at line 68 of file bitband.c.

#define BITBAND_PERI_BASE 0x42000000

Definition at line 66 of file bitband.c.

#define BITBAND_PERI_ClearBit | ( | a,
 |  | b
 | ) | (*(volatile uint32_t *) (BITBAND_PERI(a,b)) = 0)

Definition at line 75 of file bitband.c.

#define BITBAND_PERI_GetBit | ( | a,
 |  | b
 | ) | (*(volatile uint32_t *) (BITBAND_PERI(a,b)))

Definition at line 77 of file bitband.c.

#define BITBAND_PERI_REF 0x40000000

Definition at line 65 of file bitband.c.

#define BITBAND_PERI_SetBit | ( | a,
 |  | b
 | ) | (*(volatile uint32_t *) (BITBAND_PERI(a,b)) = 1)

Definition at line 76 of file bitband.c.

#define BITBAND_SRAM | ( | a,
 |  | b
 | ) | ((BITBAND_SRAM_BASE + ((a-BITBAND_SRAM_REF)<<5) + (b<<2)))

Definition at line 62 of file bitband.c.

#define BITBAND_SRAM_BASE 0x22000000

Definition at line 60 of file bitband.c.

#define BITBAND_SRAM_ClearBit | ( | a,
 |  | b
 | ) | (*(volatile uint32_t *) (BITBAND_SRAM(a,b)) = 0)

Definition at line 71 of file bitband.c.

#define BITBAND_SRAM_GetBit | ( | a,
 |  | b
 | ) | (*(volatile uint32_t *) (BITBAND_SRAM(a,b)))

Definition at line 73 of file bitband.c.

#define BITBAND_SRAM_REF 0x20000000

Definition at line 59 of file bitband.c.

#define BITBAND_SRAM_SetBit | ( | a,
 |  | b
 | ) | (*(volatile uint32_t *) (BITBAND_SRAM(a,b)) = 1)

Definition at line 72 of file bitband.c.

#define PERI_ADDRESS 0x40020000

Definition at line 90 of file bitband.c.

#define PERI_BIT 5

Definition at line 91 of file bitband.c.

#define VAR_ADDRESS 0x2007C000

Definition at line 84 of file bitband.c.

#define VAR_BIT 3

Definition at line 85 of file bitband.c.

Function Documentation

int c_entry ( void )

c_entry: main function

Parameters:
[in] none
Returns:
int

Definition at line 110 of file bitband.c.

int main ( void )

Definition at line 190 of file bitband.c.

Variable Documentation

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 94 of file bitband.c.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MPU

Functions | Variables
MPU
Cortex-M3

Functions

void | MemManage_Handler (void)
Memory Management interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main MPU program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
Bool | Led_State = FALSE

Function Documentation

int c_entry ( void )

c_entry: Main MPU program body

Parameters:
[in] None
Returns:
int

Definition at line 126 of file mpu_test.c.

int main ( void )

Definition at line 262 of file mpu_test.c.

void MemManage_Handler ( void )

Memory Management interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

Definition at line 102 of file mpu_test.c.

Variable Documentation

Bool Led_State = FALSE

Definition at line 91 of file mpu_test.c.

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 81 of file mpu_test.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Privilege_mode

Defines | Functions | Variables
Privilege_mode
Cortex-M3

Defines

#define | IAR_LPC_1768
#define | THREAD_PRIVILEGED 0
#define | THREAD_UNPRIVILEGED 1
#define | THREAD_PRIVILEDGED_MASK 0xFFFFFFFE
#define | PRIVILEGE_LED 25
#define | PRIVILEGE_LEDPORT 1
#define | UNPRIVILEGE_LED 4
#define | UNPRIVILEGE_LEDPORT 0

Functions

void | SVC_Handler (void)
SVC Hander.
void | Turn_on_LED (uint8_t Led_num)
Turn on LED.
void | Turn_off_LED (uint8_t Led_num)
Turn off LED.
int | c_entry (void)
c_entry: main function
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "LED2 (P0.4) will blink in un-privilege mode\n\r"

Define Documentation

#define IAR_LPC_1768

Definition at line 40 of file privilege.c.

#define PRIVILEGE_LED 25

Definition at line 56 of file privilege.c.

#define PRIVILEGE_LEDPORT 1

Definition at line 57 of file privilege.c.

#define THREAD_PRIVILEDGED_MASK 0xFFFFFFFE

Definition at line 47 of file privilege.c.

#define THREAD_PRIVILEGED 0

Definition at line 45 of file privilege.c.

#define THREAD_UNPRIVILEGED 1

Definition at line 46 of file privilege.c.

#define UNPRIVILEGE_LED 4

Definition at line 58 of file privilege.c.

#define UNPRIVILEGE_LEDPORT 0

Definition at line 59 of file privilege.c.

Function Documentation

int c_entry ( void )

c_entry: main function

Parameters:
[in] none
Returns:
int

Definition at line 185 of file privilege.c.

int main ( void )

Definition at line 264 of file privilege.c.

void SVC_Handler ( void )

SVC Hander.

Parameters:
None
Return values:
None

Definition at line 100 of file privilege.c.

void Turn_off_LED ( uint8_t Led_num )

Turn off LED.

Parameters:
[in] Led_num LED number, should be:
  • PRIVILEGE_LED
  • UNPRIVILEGE_LED
Returns:
None

Definition at line 162 of file privilege.c.

void Turn_on_LED ( uint8_t Led_num )

Turn on LED.

Parameters:
[in] Led_num LED number, should be:
  • PRIVILEGE_LED
  • UNPRIVILEGE_LED
Returns:
None

Definition at line 138 of file privilege.c.

Variable Documentation

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 63 of file privilege.c.

uint8_t menu2[] = "LED2 (P0.4) will blink in un-privilege mode\n\r"

Definition at line 77 of file privilege.c.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DAC

Modules
DAC
LPC1700CMSIS Examples

Modules

DMA
SineWave
Speaker
WaveGenerate
Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DMA

Defines | Functions | Variables
DMA
DAC

Defines

#define | DMA_SIZE 1

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main DAC program body
int | main (void)

Variables

__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err
GPDMA_Channel_CFG_Type GPDMACfg

Define Documentation

#define DMA_SIZE 1

DMA size of transfer

Definition at line 39 of file dac_dma.c.

Function Documentation

int c_entry ( void )

c_entry: Main DAC program body

Parameters:
[in] None
Returns:
int

Definition at line 84 of file dac_dma.c.

void DMA_IRQHandler ( void )

GPDMA interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None
int main ( void )

Definition at line 177 of file dac_dma.c.

Variable Documentation

__IO uint32_t Channel0_Err

Definition at line 46 of file dac_dma.c.

__IO uint32_t Channel0_TC

Definition at line 43 of file dac_dma.c.

GPDMA_Channel_CFG_Type GPDMACfg

Definition at line 48 of file dac_dma.c.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SineWave

Defines | Functions | Variables
SineWave
DAC

Defines

#define | DMA_SIZE 60
#define | NUM_SINE_SAMPLE 60
#define | SINE_FREQ_IN_HZ 60
#define | PCLK_DAC_IN_MHZ 25

Functions

int | c_entry (void)
c_entry: Main DAC program body
int | main (void)

Variables

GPDMA_Channel_CFG_Type GPDMACfg

Define Documentation

#define DMA_SIZE 60

DMA size of transfer

Definition at line 39 of file dac_sinewave_test.c.

#define NUM_SINE_SAMPLE 60

Definition at line 40 of file dac_sinewave_test.c.

#define PCLK_DAC_IN_MHZ 25

Definition at line 42 of file dac_sinewave_test.c.

#define SINE_FREQ_IN_HZ 60

Definition at line 41 of file dac_sinewave_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main DAC program body

Parameters:
[in] None
Returns:
int

Definition at line 53 of file dac_sinewave_test.c.

int main ( void )

Definition at line 153 of file dac_sinewave_test.c.

Variable Documentation

GPDMA_Channel_CFG_Type GPDMACfg

Definition at line 45 of file dac_sinewave_test.c.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Speaker

Functions
Speaker
DAC

Functions

int | c_entry (void)
c_entry: Main DAC program body
int | main (void)

Function Documentation

int c_entry ( void )

c_entry: Main DAC program body

Parameters:
[in] None
Returns:
int

Definition at line 42 of file dac_speaker.c.

int main ( void )

Definition at line 86 of file dac_speaker.c.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: WaveGenerate

Defines | Functions | Variables
WaveGenerate
DAC

Defines

#define | DMA_SIZE_SINE 60
#define | NUM_SAMPLE_SINE 60
#define | DMA_SIZE 64
#define | NUM_SAMPLE 64
#define | SIGNAL_FREQ_IN_HZ 60
#define | PCLK_DAC_IN_MHZ 25
#define | DAC_GENERATE_SINE 1
#define | DAC_GENERATE_TRIANGLE 2
#define | DAC_GENERATE_ESCALATOR 3
#define | DAC_GENERATE_NONE 0

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main DAC program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"

Define Documentation

#define DAC_GENERATE_ESCALATOR 3

Definition at line 50 of file dac_wave_generate.c.

#define DAC_GENERATE_NONE 0

Definition at line 51 of file dac_wave_generate.c.

#define DAC_GENERATE_SINE 1

Definition at line 48 of file dac_wave_generate.c.

#define DAC_GENERATE_TRIANGLE 2

Definition at line 49 of file dac_wave_generate.c.

#define DMA_SIZE 64

Definition at line 42 of file dac_wave_generate.c.

#define DMA_SIZE_SINE 60

DMA size of transfer

Definition at line 40 of file dac_wave_generate.c.

#define NUM_SAMPLE 64

Definition at line 43 of file dac_wave_generate.c.

#define NUM_SAMPLE_SINE 60

Definition at line 41 of file dac_wave_generate.c.

#define PCLK_DAC_IN_MHZ 25

Definition at line 46 of file dac_wave_generate.c.

#define SIGNAL_FREQ_IN_HZ 60

Definition at line 45 of file dac_wave_generate.c.

Function Documentation

int c_entry ( void )

c_entry: Main DAC program body

Parameters:
[in] None
Returns:
int

Definition at line 85 of file dac_wave_generate.c.

int main ( void )

Definition at line 266 of file dac_wave_generate.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 54 of file dac_wave_generate.c.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EMAC

Modules
EMAC
LPC1700CMSIS Examples

Modules

Easy_Web
EmacRaw
uIP
Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Easy_Web

Functions
Easy_Web
EMAC

Functions

int | main (void)
void | HTTPServer (void)
unsigned int | GetAD7Val (void)
unsigned int | GetTempVal (void)
void | InsertDynamicValues (void)

Function Documentation

unsigned int GetAD7Val ( void )

Definition at line 112 of file easyweb.c.

unsigned int GetTempVal ( void )

Definition at line 123 of file easyweb.c.

void HTTPServer ( void )

Definition at line 58 of file easyweb.c.

void InsertDynamicValues ( void )

Definition at line 133 of file easyweb.c.

int main ( void )

Definition at line 34 of file easyweb.c.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EmacRaw

Defines | Functions | Variables
EmacRaw
EMAC

Defines

#define | TX_ONLY 0
#define | BOUNCE_RX 1
#define | ENABLE_WOL 1
#define | ENABLE_HASH 1
#define | EMAC_ADDR12 0x0000E386
#define | EMAC_ADDR34 0x00006BDA
#define | EMAC_ADDR56 0x00005000
#define | EMAC_DST_ADDR12 0x0000101F
#define | EMAC_DST_ADDR34 0x0000E012
#define | EMAC_DST_ADDR56 0x00001D0C
#define | PD_LED_PIN (1<<6)
#define | TX_LED_PIN (1<<5)
#define | RX_LED_PIN (1<<4)
#define | KB_LED_PIN (1<<3)
#define | BLINK_LED_PIN (1<<2)
#define | LED2_MASK ((1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6))
#define | LED1_MASK ((1<<28) | (1<<29) | (0x80000000))
#define | TX_PACKET_SIZE 114
#define | MYMAC_1 ((EMAC_ADDR12 & 0xFF00) >> 8)
#define | MYMAC_2 ((EMAC_ADDR12 & 0xFF))
#define | MYMAC_3 ((EMAC_ADDR34 & 0xFF00) >> 8)
#define | MYMAC_4 ((EMAC_ADDR34 & 0xFF))
#define | MYMAC_5 ((EMAC_ADDR56 & 0xFF00) >> 8)
#define | MYMAC_6 ((EMAC_ADDR56 & 0xFF))
#define | DB _DBG((uint8_t *)db_)

Functions

uint8_t | __attribute__ ((aligned(4)))
void | ENET_IRQHandler (void)
Ethernet service routine handler.
void | PacketGen (uint8_t *txptr)
Create a perfect packet for TX.
void | LED_Init (void)
Init LEDs.
void | LED_Blink (uint32_t pattern)
LED blink. This is used for WOL test only.
void | Usr_Init_Emac (void)
User EMAC initialize.
int | c_entry (void)
c_entry: Main EMAC program body
int | main (void)

Variables

char | db_ [64]
__IO uint32_t | RXOverrunCount = 0
__IO uint32_t | RXErrorCount = 0
__IO uint32_t | TXUnderrunCount = 0
__IO uint32_t | TXErrorCount = 0
__IO uint32_t | RxFinishedCount = 0
__IO uint32_t | TxFinishedCount = 0
__IO uint32_t | TxDoneCount = 0
__IO uint32_t | RxDoneCount = 0
__IO uint32_t | ReceiveLength = 0
__IO Bool | PacketReceived = FALSE
__IO uint32_t | WOLCount = 0

Define Documentation

#define BLINK_LED_PIN (1<<2)

Definition at line 93 of file emactest.c.

#define BOUNCE_RX 1

Definition at line 59 of file emactest.c.

#define DB _DBG((uint8_t *)db_)

Definition at line 109 of file emactest.c.

#define EMAC_ADDR12 0x0000E386

Definition at line 78 of file emactest.c.

#define EMAC_ADDR34 0x00006BDA

Definition at line 79 of file emactest.c.

#define EMAC_ADDR56 0x00005000

Definition at line 80 of file emactest.c.

#define EMAC_DST_ADDR12 0x0000101F

Definition at line 83 of file emactest.c.

#define EMAC_DST_ADDR34 0x0000E012

Definition at line 84 of file emactest.c.

#define EMAC_DST_ADDR56 0x00001D0C

Definition at line 85 of file emactest.c.

#define ENABLE_HASH 1

Definition at line 61 of file emactest.c.

#define ENABLE_WOL 1

Definition at line 60 of file emactest.c.

#define KB_LED_PIN (1<<3)

Definition at line 92 of file emactest.c.

#define LED1_MASK ((1<<28) | (1<<29) | (0x80000000))

Definition at line 95 of file emactest.c.

#define LED2_MASK ((1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6))

Definition at line 94 of file emactest.c.

#define MYMAC_1 ((EMAC_ADDR12 & 0xFF00) >> 8)

Definition at line 102 of file emactest.c.

#define MYMAC_2 ((EMAC_ADDR12 & 0xFF))

Definition at line 103 of file emactest.c.

#define MYMAC_3 ((EMAC_ADDR34 & 0xFF00) >> 8)

Definition at line 104 of file emactest.c.

#define MYMAC_4 ((EMAC_ADDR34 & 0xFF))

Definition at line 105 of file emactest.c.

#define MYMAC_5 ((EMAC_ADDR56 & 0xFF00) >> 8)

Definition at line 106 of file emactest.c.

#define MYMAC_6 ((EMAC_ADDR56 & 0xFF))

Definition at line 107 of file emactest.c.

#define PD_LED_PIN (1<<6)

Definition at line 89 of file emactest.c.

#define RX_LED_PIN (1<<4)

Definition at line 91 of file emactest.c.

#define TX_LED_PIN (1<<5)

Definition at line 90 of file emactest.c.

#define TX_ONLY 0

Definition at line 58 of file emactest.c.

#define TX_PACKET_SIZE 114

Definition at line 100 of file emactest.c.

Function Documentation

uint8_t __attribute__ ( (aligned(4)) )

Definition at line 124 of file emactest.c.

int c_entry ( void )

c_entry: Main EMAC program body

Parameters:
[in] None
Returns:
int

Definition at line 576 of file emactest.c.

void ENET_IRQHandler ( void )

Ethernet service routine handler.

Parameters:
[in] none
Returns:
none

Definition at line 177 of file emactest.c.

void LED_Blink ( uint32_t pattern )

LED blink. This is used for WOL test only.

Parameters:
[in] none
Returns:
none

Definition at line 415 of file emactest.c.

void LED_Init ( void )

Init LEDs.

Parameters:
[in] none
Returns:
none
int main ( void )

Definition at line 732 of file emactest.c.

void PacketGen ( uint8_t * txptr )

Create a perfect packet for TX.

Parameters:
[in] pointer to TX packet
Returns:
none

Definition at line 328 of file emactest.c.

void Usr_Init_Emac ( void )

User EMAC initialize.

Parameters:
[in] none
Returns:
none

Definition at line 501 of file emactest.c.

Variable Documentation

char db_[64]

Definition at line 113 of file emactest.c.

__IO Bool PacketReceived = FALSE

Definition at line 142 of file emactest.c.

__IO uint32_t ReceiveLength = 0

Definition at line 141 of file emactest.c.

__IO uint32_t RxDoneCount = 0

Definition at line 140 of file emactest.c.

__IO uint32_t RXErrorCount = 0

Definition at line 134 of file emactest.c.

__IO uint32_t RxFinishedCount = 0

Definition at line 137 of file emactest.c.

__IO uint32_t RXOverrunCount = 0

Definition at line 133 of file emactest.c.

__IO uint32_t TxDoneCount = 0

Definition at line 139 of file emactest.c.

__IO uint32_t TXErrorCount = 0

Definition at line 136 of file emactest.c.

__IO uint32_t TxFinishedCount = 0

Definition at line 138 of file emactest.c.

__IO uint32_t TXUnderrunCount = 0

Definition at line 135 of file emactest.c.

__IO uint32_t WOLCount = 0

Definition at line 150 of file emactest.c.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uIP

Modules | Defines | Functions | Variables
uIP
EMAC

Modules

Clock interface
Protosockets library
Timer library
The uIP TCP/IP stack
Configuration options for uIP
Apps
Pt

Defines

#define | DB _DBG((uint8_t *)db)

Functions

BOOL_8 | tapdev_init (void)
UNS_32 | tapdev_read (void *pPacket)
BOOL_8 | tapdev_send (void *pPacket, UNS_32 size)

Variables

char | db [64]
unsigned short | left
const u8_t * | sendptr
u8_t * readptr
char * | bufptr
u16_t sendlen
u16_t readlen
struct psock_buf | buf
unsigned int | bufsize
unsigned char | state
clock_time_t interval

Define Documentation

#define DB _DBG((uint8_t *)db)

Definition at line 18 of file emac.c.

Function Documentation

BOOL_8 tapdev_init ( void )

Definition at line 22 of file emac.c.

UNS_32 tapdev_read ( void * pPacket )

Definition at line 114 of file emac.c.

BOOL_8 tapdev_send | ( | void * | pPacket,
 |  | UNS_32 | size
 | ) |  |

Definition at line 141 of file emac.c.

Variable Documentation

struct psock_buf buf

Definition at line 123 of file psock.h.

char* bufptr

Definition at line 117 of file psock.h.

unsigned int bufsize

Definition at line 125 of file psock.h.

char db[64]

Definition at line 19 of file emac.c.

clock_time_t interval

Definition at line 80 of file timer.h.

unsigned short left

Definition at line 101 of file psock.h.

u16_t readlen

Definition at line 121 of file psock.h.

u8_t* readptr

Definition at line 115 of file psock.h.

u16_t sendlen

Definition at line 120 of file psock.h.

const u8_t* sendptr

Definition at line 114 of file psock.h.

unsigned char state

Definition at line 127 of file psock.h.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Clock interface

Defines | Functions
Clock interface
uIP

Defines

#define | CLOCK_SECOND

Functions

void | clock_init (void)
clock_time_t | clock_time (void)

Detailed Description

The clock interface is the interface between the timer library and the platform specific clock functionality. The clock interface must be implemented for each platform that uses the timer library.

The clock interface does only one this: it measures time. The clock interface provides a macro, CLOCK_SECOND, which corresponds to one second of system time.

See also:
Timer library

Define Documentation

#define CLOCK_SECOND

A second, measured in system clock time.

Definition at line 85 of file clock.h.

Function Documentation

void clock_init ( void )

Initialize the clock library.

This function initializes the clock library and should be called from the main() function of the system.

Definition at line 18 of file clock-arch.c.

clock_time_t clock_time ( void )

Get the current clock time.

This function returns the current system clock time.

Returns:
The current clock time, measured in system ticks.

Definition at line 31 of file clock-arch.c.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Protosockets library

Data Structures | Files | Defines | Functions
Protosockets library
uIP

Data Structures

struct | psock_buf
struct | psock

Files

file | psock.h

Defines

#define | PSOCK_INIT(psock, buffer, buffersize)
#define | PSOCK_BEGIN(psock)
#define | PSOCK_SEND(psock, data, datalen)
#define | PSOCK_SEND_STR(psock, str)
Send a null-terminated string.
#define | PSOCK_GENERATOR_SEND(psock, generator, arg)
Generate data with a function and send it.
#define | PSOCK_CLOSE(psock)
#define | PSOCK_READBUF(psock)
#define | PSOCK_READTO(psock, c)
#define | PSOCK_DATALEN(psock)
#define | PSOCK_EXIT(psock)
#define | PSOCK_CLOSE_EXIT(psock)
#define | PSOCK_END(psock)
#define | PSOCK_NEWDATA(psock)
#define | PSOCK_WAIT_UNTIL(psock, condition)
#define | PSOCK_WAIT_THREAD(psock, condition) PT_WAIT_THREAD(&((psock)->pt), (condition))

Functions

void | psock_init (struct psock *psock, char *buffer, unsigned int buffersize)
PT_THREAD (psock_send(struct psock *psock, const char *buf, unsigned int len))
PT_THREAD (psock_generator_send(struct psock *psock, unsigned short(*f)(void *), void *arg))
PT_THREAD (psock_readbuf(struct psock *psock))
PT_THREAD (psock_readto(struct psock *psock, unsigned char c))
u16_t | psock_datalen (struct psock *psock)
char | psock_newdata (struct psock *s)

Detailed Description

The protosocket library provides an interface to the uIP stack that is similar to the traditional BSD socket interface. Unlike programs written for the ordinary uIP event-driven interface, programs written with the protosocket library are executed in a sequential fashion and does not have to be implemented as explicit state machines.

Protosockets only work with TCP connections.

The protosocket library uses Pt protothreads to provide sequential control flow. This makes the protosockets lightweight in terms of memory, but also means that protosockets inherits the functional limitations of protothreads. Each protosocket lives only within a single function. Automatic variables (stack variables) are not retained across a protosocket library function call.

Note:
Because the protosocket library uses protothreads, local variables will not always be saved across a call to a protosocket library function. It is therefore advised that local variables are used with extreme care.

The protosocket library provides functions for sending data without having to deal with retransmissions and acknowledgements, as well as functions for reading data without having to deal with data being split across more than one TCP segment.

Because each protosocket runs as a protothread, the protosocket has to be started with a call to PSOCK_BEGIN() at the start of the function in which the protosocket is used. Similarly, the protosocket protothread can be terminated by a call to PSOCK_EXIT().

Define Documentation

#define PSOCK_BEGIN ( psock )

Start the protosocket protothread in a function.

This macro starts the protothread associated with the protosocket and must come before other protosocket calls in the function it is used.

Parameters:
psock (struct psock *) A pointer to the protosocket to be started.

Definition at line 162 of file psock.h.

#define PSOCK_CLOSE ( psock )

Close a protosocket.

This macro closes a protosocket and can only be called from within the protothread in which the protosocket lives.

Parameters:
psock (struct psock *) A pointer to the protosocket that is to be closed.

Definition at line 239 of file psock.h.

#define PSOCK_CLOSE_EXIT ( psock )

Close a protosocket and exit the protosocket's protothread.

This macro closes a protosocket and exits the protosocket's protothread.

Parameters:
psock (struct psock *) A pointer to the protosocket.

Definition at line 312 of file psock.h.

#define PSOCK_DATALEN ( psock )

The length of the data that was previously read.

This macro returns the length of the data that was previously read using PSOCK_READTO() or PSOCK_READ().

Parameters:
psock (struct psock *) A pointer to the protosocket holding the data.

Definition at line 285 of file psock.h.

#define PSOCK_END ( psock )

Declare the end of a protosocket's protothread.

This macro is used for declaring that the protosocket's protothread ends. It must always be used together with a matching PSOCK_BEGIN() macro.

Parameters:
psock (struct psock *) A pointer to the protosocket.

Definition at line 329 of file psock.h.

#define PSOCK_EXIT ( psock )

Exit the protosocket's protothread.

This macro terminates the protothread of the protosocket and should almost always be used in conjunction with PSOCK_CLOSE().

See also:
PSOCK_CLOSE_EXIT()
Parameters:
psock (struct psock *) A pointer to the protosocket.

Definition at line 301 of file psock.h.

#define PSOCK_GENERATOR_SEND | ( | psock,
 |  | generator,
 |  | arg
 | ) |

Generate data with a function and send it.

Parameters:
psock | Pointer to the protosocket.
generator | Pointer to the generator function
arg | Argument to the generator function

This function generates data and sends it over the protosocket. This can be used to dynamically generate data for a transmission, instead of generating the data in a buffer beforehand. This function reduces the need for buffer memory. The generator function is implemented by the application, and a pointer to the function is given as an argument with the call to PSOCK_GENERATOR_SEND().

The generator function should place the generated data directly in the uip_appdata buffer, and return the length of the generated data. The generator function is called by the protosocket layer when the data first is sent, and once for every retransmission that is needed.

Definition at line 223 of file psock.h.

#define PSOCK_INIT | ( | psock,
 |  | buffer,
 |  | buffersize
 | ) |

Initialize a protosocket.

This macro initializes a protosocket and must be called before the protosocket is used. The initialization also specifies the input buffer for the protosocket.

Parameters:
psock | (struct psock *) A pointer to the protosocket to be initialized
buffer | (char *) A pointer to the input buffer for the protosocket.
buffersize | (unsigned int) The size of the input buffer.

Definition at line 148 of file psock.h.

#define PSOCK_NEWDATA ( psock )

Check if new data has arrived on a protosocket.

This macro is used in conjunction with the PSOCK_WAIT_UNTIL() macro to check if data has arrived on a protosocket.

Parameters:
psock (struct psock *) A pointer to the protosocket.

Definition at line 343 of file psock.h.

#define PSOCK_READBUF ( psock )

Read data until the buffer is full.

This macro will block waiting for data and read the data into the input buffer specified with the call to PSOCK_INIT(). Data is read until the buffer is full..

Parameters:
psock (struct psock *) A pointer to the protosocket from which data should be read.

Definition at line 254 of file psock.h.

#define PSOCK_READTO | ( | psock,
 |  | c
 | ) |

Read data up to a specified character.

This macro will block waiting for data and read the data into the input buffer specified with the call to PSOCK_INIT(). Data is only read until the specifieed character appears in the data stream.

Parameters:
psock | (struct psock *) A pointer to the protosocket from which data should be read.
c | (char) The character at which to stop reading.

Definition at line 272 of file psock.h.

#define PSOCK_SEND | ( | psock,
 |  | data,
 |  | datalen
 | ) |

Send data.

This macro sends data over a protosocket. The protosocket protothread blocks until all data has been sent and is known to have been received by the remote end of the TCP connection.

Parameters:
psock | (struct psock *) A pointer to the protosocket over which data is to be sent.
data | (char *) A pointer to the data that is to be sent.
datalen | (unsigned int) The length of the data that is to be sent.

Definition at line 182 of file psock.h.

#define PSOCK_SEND_STR | ( | psock,
 |  | str
 | ) |

Send a null-terminated string.

Parameters:
psock | Pointer to the protosocket.
str | The string to be sent.

This function sends a null-terminated string over the protosocket.

Definition at line 195 of file psock.h.

#define PSOCK_WAIT_THREAD | ( | psock,
 |  | condition
 | ) | PT_WAIT_THREAD(&((psock)->pt), (condition))

Definition at line 379 of file psock.h.

#define PSOCK_WAIT_UNTIL | ( | psock,
 |  | condition
 | ) |

Wait until a condition is true.

This macro blocks the protothread until the specified condition is true. The macro PSOCK_NEWDATA() can be used to check if new data arrives when the protosocket is waiting.

Typically, this macro is used as follows:

 PT_THREAD(thread(struct psock *s, struct timer *t))
 {
   PSOCK_BEGIN(s);

   PSOCK_WAIT_UNTIL(s, PSOCK_NEWADATA(s) || timer_expired(t));

   if(PSOCK_NEWDATA(s)) {
     PSOCK_READTO(s, '\n');
   } else {
     handle_timed_out(s);
   }

   PSOCK_END(s);
 }
Parameters:
psock | (struct psock *) A pointer to the protosocket.
condition | The condition to wait for.

Definition at line 376 of file psock.h.

Function Documentation

u16_t psock_datalen ( struct psock * psock )

Definition at line 248 of file psock.c.

void psock_init | ( | struct psock * | psock,
 |  | char * | buffer,
 |  | unsigned int | buffersize
 | ) |  |
char psock_newdata ( struct psock * s )

Definition at line 254 of file psock.c.

PT_THREAD ( psock_readto(struct psock *psock, unsigned char c) )
PT_THREAD ( psock_readbuf(struct psock *psock) )
PT_THREAD ( psock_generator_send(struct psock *psock, unsigned short(*f)(void *), void *arg) )
PT_THREAD ( psock_send(struct psock *psock, const char *buf, unsigned int len) )
Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Timer library

Data Structures | Files | Functions
Timer library
uIP

Data Structures

struct | timer

Files

file | timer.c
file | timer.h

Functions

void | timer_set (struct timer *t, clock_time_t interval)
void | timer_reset (struct timer *t)
void | timer_restart (struct timer *t)
int | timer_expired (struct timer *t)

Detailed Description

The timer library provides functions for setting, resetting and restarting timers, and for checking if a timer has expired. An application must "manually" check if its timers have expired; this is not done automatically.

A timer is declared as a struct timer and all access to the timer is made by a pointer to the declared timer.

Note:
The timer library uses the Clock library to measure time. Intervals should be specified in the format used by the clock library.

Function Documentation

int timer_expired ( struct timer * t )

Check if a timer has expired.

This function tests if a timer has expired and returns true or false depending on its status.

Parameters:
t A pointer to the timer
Returns:
Non-zero if the timer has expired, zero otherwise.

Definition at line 121 of file timer.c.

void timer_reset ( struct timer * t )

Reset the timer with the same interval.

This function resets the timer with the same interval that was given to the timer_set() function. The start point of the interval is the exact time that the timer last expired. Therefore, this function will cause the timer to be stable over time, unlike the timer_rester() function.

Parameters:
t A pointer to the timer.
See also:
timer_restart()

Definition at line 84 of file timer.c.

void timer_restart ( struct timer * t )

Restart the timer from the current point in time

This function restarts a timer with the same interval that was given to the timer_set() function. The timer will start at the current time.

Note:
A periodic timer will drift if this function is used to reset it. For preioric timers, use the timer_reset() function instead.
Parameters:
t A pointer to the timer.
See also:
timer_reset()

Definition at line 104 of file timer.c.

void timer_set | ( | struct timer * | t,
 |  | clock_time_t | interval
 | ) |  |

Set a timer.

This function is used to set a timer for a time sometime in the future. The function timer_expired() will evaluate to true after the timer has expired.

Parameters:
t | A pointer to the timer
interval | The interval before the timer expires.

Definition at line 64 of file timer.c.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: The uIP TCP/IP stack

Data Structures | Modules | Files | Defines | Typedefs | Functions | Variables
The uIP TCP/IP stack
uIP

Data Structures

struct | uip_conn
struct | uip_stats
struct | uip_tcpip_hdr
struct | uip_icmpip_hdr
struct | uip_udpip_hdr
struct | uip_eth_addr

Modules

uIP packet forwarding
uIP TCP throughput booster hack
uIP configuration functions
uIP initialization functions
uIP device driver functions
uIP application functions
uIP conversion functions
Variables used in uIP device drivers
uIP Address Resolution Protocol
Architecture specific uIP functions

Files

file | uip.c
file | uip.h

Defines

#define | TCP_FIN 0x01
#define | TCP_SYN 0x02
#define | TCP_RST 0x04
#define | TCP_PSH 0x08
#define | TCP_ACK 0x10
#define | TCP_URG 0x20
#define | TCP_CTL 0x3f
#define | TCP_OPT_END 0
#define | TCP_OPT_NOOP 1
#define | TCP_OPT_MSS 2
#define | TCP_OPT_MSS_LEN 4
#define | ICMP_ECHO_REPLY 0
#define | ICMP_ECHO 8
#define | ICMP6_ECHO_REPLY 129
#define | ICMP6_ECHO 128
#define | ICMP6_NEIGHBOR_SOLICITATION 135
#define | ICMP6_NEIGHBOR_ADVERTISEMENT 136
#define | ICMP6_FLAG_S (1 << 6)
#define | ICMP6_OPTION_SOURCE_LINK_ADDRESS 1
#define | ICMP6_OPTION_TARGET_LINK_ADDRESS 2
#define | BUF ((struct uip_tcpip_hdr *)&uip_buf[UIP_LLH_LEN])
#define | FBUF ((struct uip_tcpip_hdr *)&uip_reassbuf[0])
#define | ICMPBUF ((struct uip_icmpip_hdr *)&uip_buf[UIP_LLH_LEN])
#define | UDPBUF ((struct uip_udpip_hdr *)&uip_buf[UIP_LLH_LEN])
#define | UIP_STAT(s) s
#define | UIP_LOG(m) uip_log(m)
#define | UIP_ACKDATA 1
#define | UIP_NEWDATA 2
#define | UIP_REXMIT 4
#define | UIP_POLL 8
#define | UIP_CLOSE 16
#define | UIP_ABORT 32
#define | UIP_CONNECTED 64
#define | UIP_TIMEDOUT 128
#define | UIP_DATA 1
#define | UIP_TIMER 2
#define | UIP_POLL_REQUEST 3
#define | UIP_UDP_SEND_CONN 4
#define | UIP_CLOSED 0
#define | UIP_SYN_RCVD 1
#define | UIP_SYN_SENT 2
#define | UIP_ESTABLISHED 3
#define | UIP_FIN_WAIT_1 4
#define | UIP_FIN_WAIT_2 5
#define | UIP_CLOSING 6
#define | UIP_TIME_WAIT 7
#define | UIP_LAST_ACK 8
#define | UIP_TS_MASK 15
#define | UIP_STOPPED 16
#define | UIP_APPDATA_SIZE
#define | UIP_PROTO_ICMP 1
#define | UIP_PROTO_TCP 6
#define | UIP_PROTO_UDP 17
#define | UIP_PROTO_ICMP6 58
#define | UIP_IPH_LEN 20
#define | UIP_UDPH_LEN 8
#define | UIP_TCPH_LEN 20
#define | UIP_IPUDPH_LEN (UIP_UDPH_LEN + UIP_IPH_LEN)
#define | UIP_IPTCPH_LEN (UIP_TCPH_LEN + UIP_IPH_LEN)
#define | UIP_TCPIP_HLEN UIP_IPTCPH_LEN

Typedefs

typedef u16_t | uip_ip4addr_t [2]
typedef u16_t | uip_ip6addr_t [8]
typedef uip_ip4addr_t | uip_ipaddr_t

Functions

void | uip_setipid (u16_t id)
void | uip_log (char *msg)
void | uip_add32 (u8_t *op32, u16_t op16)
u16_t | uip_chksum (u16_t *data, u16_t len)
u16_t | uip_ipchksum (void)
u16_t | uip_tcpchksum (void)
u16_t | uip_udpchksum (void)
void | uip_init (void)
struct uip_conn * | uip_connect (uip_ipaddr_t *ripaddr, u16_t rport)
void | uip_unlisten (u16_t port)
void | uip_listen (u16_t port)
void | uip_process (u8_t flag)
u16_t | htons (u16_t val)
void | uip_send (const void *data, int len)

Variables

uip_ipaddr_t uip_hostaddr
uip_ipaddr_t uip_draddr
uip_ipaddr_t uip_netmask
struct uip_eth_addr | uip_ethaddr = {{0,0,0,0,0,0}}
void * | uip_appdata
void * | uip_sappdata
u16_t uip_len
u16_t uip_slen
u8_t uip_flags
struct uip_conn * | uip_conn
struct uip_conn | uip_conns [UIP_CONNS]
u16_t | uip_listenports [UIP_LISTENPORTS]
u8_t | uip_acc32 [4]
static u8_t | opt
struct uip_stats | uip_stat
void * | uip_appdata
struct uip_conn * | uip_conn
struct uip_conn | uip_conns [UIP_CONNS]
struct uip_stats | uip_stat
u8_t uip_flags
uip_ipaddr_t uip_hostaddr
uip_ipaddr_t uip_netmask
uip_ipaddr_t uip_draddr

Detailed Description

uIP is an implementation of the TCP/IP protocol stack intended for small 8-bit and 16-bit microcontrollers.

uIP provides the necessary protocols for Internet communication, with a very small code footprint and RAM requirements - the uIP code size is on the order of a few kilobytes and RAM usage is on the order of a few hundred bytes.

{@

Define Documentation

#define BUF ((struct uip_tcpip_hdr *)&uip_buf[UIP_LLH_LEN])

Definition at line 240 of file uip.c.

#define FBUF ((struct uip_tcpip_hdr *)&uip_reassbuf[0])

Definition at line 241 of file uip.c.

#define ICMP6_ECHO 128

Definition at line 229 of file uip.c.

#define ICMP6_ECHO_REPLY 129

Definition at line 228 of file uip.c.

#define ICMP6_FLAG_S (1 << 6)

Definition at line 233 of file uip.c.

#define ICMP6_NEIGHBOR_ADVERTISEMENT 136

Definition at line 231 of file uip.c.

#define ICMP6_NEIGHBOR_SOLICITATION 135

Definition at line 230 of file uip.c.

#define ICMP6_OPTION_SOURCE_LINK_ADDRESS 1

Definition at line 235 of file uip.c.

#define ICMP6_OPTION_TARGET_LINK_ADDRESS 2

Definition at line 236 of file uip.c.

#define ICMP_ECHO 8

Definition at line 226 of file uip.c.

#define ICMP_ECHO_REPLY 0

Definition at line 225 of file uip.c.

#define ICMPBUF ((struct uip_icmpip_hdr *)&uip_buf[UIP_LLH_LEN])

Definition at line 242 of file uip.c.

#define TCP_ACK 0x10

Definition at line 215 of file uip.c.

#define TCP_CTL 0x3f

Definition at line 217 of file uip.c.

#define TCP_FIN 0x01

Definition at line 211 of file uip.c.

#define TCP_OPT_END 0

Definition at line 219 of file uip.c.

#define TCP_OPT_MSS 2

Definition at line 221 of file uip.c.

#define TCP_OPT_MSS_LEN 4

Definition at line 223 of file uip.c.

#define TCP_OPT_NOOP 1

Definition at line 220 of file uip.c.

#define TCP_PSH 0x08

Definition at line 214 of file uip.c.

#define TCP_RST 0x04

Definition at line 213 of file uip.c.

#define TCP_SYN 0x02

Definition at line 212 of file uip.c.

#define TCP_URG 0x20

Definition at line 216 of file uip.c.

#define UDPBUF ((struct uip_udpip_hdr *)&uip_buf[UIP_LLH_LEN])

Definition at line 243 of file uip.c.

#define UIP_ABORT 32

Definition at line 1334 of file uip.h.

#define UIP_ACKDATA 1

Definition at line 1318 of file uip.h.

#define UIP_APPDATA_SIZE

The buffer size available for user data in the uip_buf buffer.

This macro holds the available size for user data in the uip_buf buffer. The macro is intended to be used for checking bounds of available user data.

Example:

 snprintf(uip_appdata, UIP_APPDATA_SIZE, "%u\n", i);

Definition at line 1553 of file uip.h.

#define UIP_CLOSE 16

Definition at line 1329 of file uip.h.

#define UIP_CLOSED 0

Definition at line 1376 of file uip.h.

#define UIP_CLOSING 6

Definition at line 1382 of file uip.h.

#define UIP_CONNECTED 64

Definition at line 1339 of file uip.h.

#define UIP_DATA 1

Definition at line 1360 of file uip.h.

#define UIP_ESTABLISHED 3

Definition at line 1379 of file uip.h.

#define UIP_FIN_WAIT_1 4

Definition at line 1380 of file uip.h.

#define UIP_FIN_WAIT_2 5

Definition at line 1381 of file uip.h.

#define UIP_IPH_LEN 20

Definition at line 1565 of file uip.h.

#define UIP_IPTCPH_LEN (UIP_TCPH_LEN + UIP_IPH_LEN)

Definition at line 1572 of file uip.h.

#define UIP_IPUDPH_LEN (UIP_UDPH_LEN + UIP_IPH_LEN)

Definition at line 1569 of file uip.h.

#define UIP_LAST_ACK 8

Definition at line 1384 of file uip.h.

#define UIP_LOG ( m ) uip_log(m)

Definition at line 256 of file uip.c.

#define UIP_NEWDATA 2

Definition at line 1322 of file uip.h.

#define UIP_POLL 8

Definition at line 1326 of file uip.h.

#define UIP_POLL_REQUEST 3

Definition at line 1366 of file uip.h.

#define UIP_PROTO_ICMP 1

Definition at line 1556 of file uip.h.

#define UIP_PROTO_ICMP6 58

Definition at line 1559 of file uip.h.

#define UIP_PROTO_TCP 6

Definition at line 1557 of file uip.h.

#define UIP_PROTO_UDP 17

Definition at line 1558 of file uip.h.

#define UIP_REXMIT 4

Definition at line 1324 of file uip.h.

#define UIP_STAT ( s ) s

Definition at line 248 of file uip.c.

#define UIP_STOPPED 16

Definition at line 1387 of file uip.h.

#define UIP_SYN_RCVD 1

Definition at line 1377 of file uip.h.

#define UIP_SYN_SENT 2

Definition at line 1378 of file uip.h.

#define UIP_TCPH_LEN 20

Definition at line 1568 of file uip.h.

#define UIP_TCPIP_HLEN UIP_IPTCPH_LEN

Definition at line 1575 of file uip.h.

#define UIP_TIME_WAIT 7

Definition at line 1383 of file uip.h.

#define UIP_TIMEDOUT 128

Definition at line 1344 of file uip.h.

#define UIP_TIMER 2

Definition at line 1364 of file uip.h.

#define UIP_TS_MASK 15

Definition at line 1385 of file uip.h.

#define UIP_UDP_SEND_CONN 4

Definition at line 1368 of file uip.h.

#define UIP_UDPH_LEN 8

Definition at line 1567 of file uip.h.

Typedef Documentation

typedef u16_t uip_ip4addr_t[2]

Repressentation of an IP address.

Definition at line 62 of file uip.h.

typedef u16_t uip_ip6addr_t[8]

Definition at line 63 of file uip.h.

typedef uip_ip4addr_t uip_ipaddr_t

Definition at line 67 of file uip.h.

Function Documentation

u16_t htons ( u16_t val )

Convert 16-bit quantity from host byte order to network byte order.

This function is primarily used for converting variables from host byte order to network byte order. For converting constants to network byte order, use the HTONS() macro instead.

Definition at line 1900 of file uip.c.

void uip_add32 | ( | u8_t * | op32,
 |  | u16_t | op16
 | ) |  |

Carry out a 32-bit addition.

Because not all architectures for which uIP is intended has native 32-bit arithmetic, uIP uses an external C function for doing the required 32-bit additions in the TCP protocol processing. This function should add the two arguments and place the result in the global variable uip_acc32.

Note:
The 32-bit integer pointed to by the op32 parameter and the result in the uip_acc32 variable are in network byte order (big endian).
Parameters:
op32 | A pointer to a 4-byte array representing a 32-bit integer in network byte order (big endian).
op16 | A 16-bit integer in host byte order.

Definition at line 263 of file uip.c.

u16_t uip_chksum | ( | u16_t * | buf,
 |  | u16_t | len
 | ) |  |

Calculate the Internet checksum over a buffer.

The Internet checksum is the one's complement of the one's complement sum of all 16-bit words in the buffer.

See RFC1071.

Parameters:
buf | A pointer to the buffer over which the checksum is to be computed.
len | The length of the buffer over which the checksum is to be computed.
Returns:
The Internet checksum of the buffer.

Definition at line 325 of file uip.c.

struct uip_conn* uip_connect | ( | uip_ipaddr_t * | ripaddr,
 |  | u16_t | port
 | ) |  | [read]

Connect to a remote host using TCP.

This function is used to start a new connection to the specified port on the specied host. It allocates a new connection identifier, sets the connection to the SYN_SENT state and sets the retransmission timer to 0. This will cause a TCP SYN segment to be sent out the next time this connection is periodically processed, which usually is done within 0.5 seconds after the call to uip_connect().

Note:
This function is avaliable only if support for active open has been configured by defining UIP_ACTIVE_OPEN to 1 in uipopt.h.
Since this function requires the port number to be in network byte order, a conversion using HTONS() or htons() is necessary.
 uip_ipaddr_t ipaddr;

 uip_ipaddr(&ipaddr, 192,168,1,2);
 uip_connect(&ipaddr, HTONS(80));
Parameters:
ripaddr | The IP address of the remote hot.
port | A 16-bit port number in network byte order.
Returns:
A pointer to the uIP connection identifier for the new connection, or NULL if no connection could be allocated.

Definition at line 421 of file uip.c.

void uip_init ( void )

uIP initialization function.

This function should be called at boot up to initilize the uIP TCP/IP stack.

Definition at line 393 of file uip.c.

u16_t uip_ipchksum ( void )

Calculate the IP header checksum of the packet header in uip_buf.

The IP header checksum is the Internet checksum of the 20 bytes of the IP header.

Returns:
The IP header checksum of the IP header in the uip_buf buffer.

Definition at line 332 of file uip.c.

void uip_listen ( u16_t port )

Start listening to the specified port.

Note:
Since this function expects the port number in network byte order, a conversion using HTONS() or htons() is necessary.
 uip_listen(HTONS(80));
Parameters:
port A 16-bit port number in network byte order.

Definition at line 543 of file uip.c.

void uip_log ( char * msg )

Definition at line 74 of file main.c.

void uip_process ( u8_t flag )

Definition at line 696 of file uip.c.

void uip_send | ( | const void * | data,
 |  | int | len
 | ) |  |

Send data on the current connection.

This function is used to send out a single segment of TCP data. Only applications that have been invoked by uIP for event processing can send data.

The amount of data that actually is sent out after a call to this funcion is determined by the maximum amount of data TCP allows. uIP will automatically crop the data so that only the appropriate amount of data is sent. The function uip_mss() can be used to query uIP for the amount of data that actually will be sent.

Note:
This function does not guarantee that the sent data will arrive at the destination. If the data is lost in the network, the application will be invoked with the uip_rexmit() event being set. The application will then have to resend the data using this function.
Parameters:
data | A pointer to the data which is to be sent.
len | The maximum amount of data bytes to be sent.

Definition at line 1906 of file uip.c.

void uip_setipid ( u16_t id )

uIP initialization function.

This function may be used at boot time to set the initial ip_id.

Definition at line 195 of file uip.c.

u16_t uip_tcpchksum ( void )

Calculate the TCP checksum of the packet in uip_buf and uip_appdata.

The TCP checksum is the Internet checksum of data contents of the TCP segment, and a pseudo-header as defined in RFC793.

Returns:
The TCP checksum of the TCP segment in uip_buf and pointed to by uip_appdata.

Definition at line 378 of file uip.c.

u16_t uip_udpchksum ( void )

Calculate the UDP checksum of the packet in uip_buf and uip_appdata.

The UDP checksum is the Internet checksum of data contents of the UDP segment, and a pseudo-header as defined in RFC768.

Returns:
The UDP checksum of the UDP segment in uip_buf and pointed to by uip_appdata.

Definition at line 385 of file uip.c.

void uip_unlisten ( u16_t port )

Stop listening to the specified port.

Note:
Since this function expects the port number in network byte order, a conversion using HTONS() or htons() is necessary.
 uip_unlisten(HTONS(80));
Parameters:
port A 16-bit port number in network byte order.

Definition at line 532 of file uip.c.

Variable Documentation

u8_t opt

Definition at line 207 of file uip.c.

u8_t uip_acc32[4]

4-byte array used for the 32-bit sequence number calculations.

Definition at line 206 of file uip.c.

void* uip_appdata

Pointer to the application data in the packet buffer.

This pointer points to the application data when the application is called. If the application wishes to send data, the application may use this space to write the data into before calling uip_send().

Definition at line 157 of file uip.c.

void* uip_appdata

Pointer to the application data in the packet buffer.

This pointer points to the application data when the application is called. If the application wishes to send data, the application may use this space to write the data into before calling uip_send().

Definition at line 157 of file uip.c.

struct uip_conn* uip_conn

Pointer to the current TCP connection.

The uip_conn pointer can be used to access the current TCP connection.

Definition at line 177 of file uip.c.

struct uip_conn* uip_conn

Pointer to the current TCP connection.

The uip_conn pointer can be used to access the current TCP connection.

Definition at line 177 of file uip.c.

struct uip_conn uip_conns[UIP_CONNS]

Definition at line 180 of file uip.c.

struct uip_conn uip_conns[UIP_CONNS]

Definition at line 180 of file uip.c.

uip_ipaddr_t uip_draddr

Definition at line 115 of file uip.c.

uip_ipaddr_t uip_draddr

Definition at line 115 of file uip.c.

struct uip_eth_addr uip_ethaddr = {{0,0,0,0,0,0}}

Definition at line 139 of file uip.c.

u8_t uip_flags

Definition at line 174 of file uip.c.

u8_t uip_flags

Definition at line 174 of file uip.c.

uip_ipaddr_t uip_hostaddr

Definition at line 115 of file uip.c.

uip_ipaddr_t uip_hostaddr

Definition at line 115 of file uip.c.

u16_t uip_len

The length of the packet in the uip_buf buffer.

The global variable uip_len holds the length of the packet in the uip_buf buffer.

When the network device driver calls the uIP input function, uip_len should be set to the length of the packet in the uip_buf buffer.

When sending packets, the device driver should use the contents of the uip_len variable to determine the length of the outgoing packet.

Definition at line 169 of file uip.c.

u16_t uip_listenports[UIP_LISTENPORTS]

Definition at line 183 of file uip.c.

uip_ipaddr_t uip_netmask

Definition at line 115 of file uip.c.

uip_ipaddr_t uip_netmask

Definition at line 115 of file uip.c.

void* uip_sappdata

Definition at line 159 of file uip.c.

u16_t uip_slen

Definition at line 169 of file uip.c.

struct uip_stats uip_stat

The uIP TCP/IP statistics.

This is the variable in which the uIP TCP/IP statistics are gathered.

Definition at line 247 of file uip.c.

struct uip_stats uip_stat

The uIP TCP/IP statistics.

This is the variable in which the uIP TCP/IP statistics are gathered.

Definition at line 247 of file uip.c.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uIP packet forwarding

Data Structures | Files | Defines | Functions | Variables
uIP packet forwarding
The uIP TCP/IP stack

Data Structures

struct | tcpip_hdr
struct | icmpip_hdr
struct | fwcache_entry
struct | uip_fw_netif

Files

file | uip-fw.c
file | uip-fw.h

Defines

#define | ICMP_ECHO 8
#define | ICMP_TE 11
#define | BUF ((struct tcpip_hdr *)&uip_buf[UIP_LLH_LEN])
#define | ICMPBUF ((struct icmpip_hdr *)&uip_buf[UIP_LLH_LEN])
#define | FWCACHE_SIZE 2
#define | FW_TIME 20
#define | UIP_FW_NETIF(ip1, ip2, ip3, ip4, nm1, nm2, nm3, nm4, outputfunc)
#define | uip_fw_setipaddr(netif, addr)
#define | uip_fw_setnetmask(netif, addr)
#define | UIP_FW_LOCAL
#define | UIP_FW_OK
#define | UIP_FW_FORWARDED
#define | UIP_FW_ZEROLEN
#define | UIP_FW_TOOLARGE
#define | UIP_FW_NOROUTE
#define | UIP_FW_DROPPED

Functions

void | uip_fw_init (void)
u8_t | uip_fw_output (void)
u8_t | uip_fw_forward (void)
void | uip_fw_register (struct uip_fw_netif *netif)
void | uip_fw_default (struct uip_fw_netif *netif)
void | uip_fw_periodic (void)

Variables

u8_t tos
u16_t len
u16_t ipid
u16_t ipoffset
u8_t ttl
u8_t proto
u16_t ipchksum
u16_t | srcipaddr [2]
u16_t | destipaddr [2]
u16_t srcport
u16_t destport
u8_t | seqno [4]
u8_t | ackno [4]
u8_t tcpoffset
u8_t flags
u8_t | wnd [2]
u16_t tcpchksum
u8_t | urgp [2]
u8_t | optdata [4]
u8_t tos
u8_t | len [2]
u8_t | ipid [2]
u8_t | ipoffset [2]
u8_t ttl
u8_t proto
u16_t ipchksum
u16_t | srcipaddr [2]
u16_t | destipaddr [2]
u8_t type
u8_t icode
u16_t icmpchksum
u16_t id
u16_t seqno
u8_t | payload [1]
u16_t | srcipaddr [2]
u16_t | destipaddr [2]
u16_t ipid
u8_t proto
u8_t unused

Define Documentation

#define BUF ((struct tcpip_hdr *)&uip_buf[UIP_LLH_LEN])

Definition at line 126 of file uip-fw.c.

#define FW_TIME 20

Definition at line 175 of file uip-fw.c.

#define FWCACHE_SIZE 2

Definition at line 161 of file uip-fw.c.

#define ICMP_ECHO 8

Definition at line 118 of file uip-fw.c.

#define ICMP_TE 11

Definition at line 121 of file uip-fw.c.

#define ICMPBUF ((struct icmpip_hdr *)&uip_buf[UIP_LLH_LEN])

Definition at line 131 of file uip-fw.c.

#define UIP_FW_DROPPED

An error message that indicates that a packet that should be forwarded or output was dropped.

Definition at line 171 of file uip-fw.h.

#define UIP_FW_FORWARDED

A non-error message that indicates that a packet was forwarded.

Definition at line 139 of file uip-fw.h.

#define UIP_FW_LOCAL

A non-error message that indicates that a packet should be processed locally.

Definition at line 125 of file uip-fw.h.

#define UIP_FW_NETIF | ( | ip1,
 |  | ip2,
 |  | ip3,
 |  | ip4,
 |  | nm1,
 |  | nm2,
 |  | nm3,
 |  | nm4,
 |  | outputfunc
 | ) |

Intantiating macro for a uIP network interface.

Example:

 struct uip_fw_netif slipnetif =
   {UIP_FW_NETIF(192,168,76,1, 255,255,255,0, slip_output)};
Parameters:
ip1,ip2,ip3,ip4 | The IP address of the network interface.
nm1,nm2,nm3,nm4 | The netmask of the network interface.
outputfunc | A pointer to the output function of the network interface.

Definition at line 80 of file uip-fw.h.

#define UIP_FW_NOROUTE

An error message that indicates that no suitable interface could be found for an outbound packet.

Definition at line 163 of file uip-fw.h.

#define UIP_FW_OK

A non-error message that indicates that something went OK.

Definition at line 132 of file uip-fw.h.

#define uip_fw_setipaddr | ( | netif,
 |  | addr
 | ) |

Set the IP address of a network interface.

Parameters:
netif | A pointer to the uip_fw_netif structure for the network interface.
addr | A pointer to an IP address.

Definition at line 95 of file uip-fw.h.

#define uip_fw_setnetmask | ( | netif,
 |  | addr
 | ) |

Set the netmask of a network interface.

Parameters:
netif | A pointer to the uip_fw_netif structure for the network interface.
addr | A pointer to an IP address representing the netmask.

Definition at line 107 of file uip-fw.h.

#define UIP_FW_TOOLARGE

An error message that indicates that a packet that was too large for the outbound network interface was detected.

Definition at line 155 of file uip-fw.h.

#define UIP_FW_ZEROLEN

A non-error message that indicates that a zero-length packet transmission was attempted, and that no packet was sent.

Definition at line 147 of file uip-fw.h.

Function Documentation

void uip_fw_default ( struct uip_fw_netif * netif )

Register a default network interface.

All packets that don't go out on any of the other interfaces will be routed to the default interface.

Parameters:
netif A pointer to the network interface that is to be registered.

Definition at line 513 of file uip-fw.c.

u8_t uip_fw_forward ( void )

Forward an IP packet in the uip_buf buffer.

Returns:
UIP_FW_FORWARDED if the packet was forwarded, UIP_FW_LOCAL if the packet should be processed locally.

Definition at line 406 of file uip-fw.c.

void uip_fw_init ( void )

Initialize the uIP packet forwarding module.

Definition at line 183 of file uip-fw.c.

u8_t uip_fw_output ( void )

Output an IP packet on the correct network interface.

The IP packet should be present in the uip_buf buffer and its length in the global uip_len variable.

Return values:
UIP_FW_ZEROLEN | Indicates that a zero-length packet transmission was attempted and that no packet was sent.
UIP_FW_NOROUTE | No suitable network interface could be found for the outbound packet, and the packet was not sent.
Returns:
The return value from the actual network interface output function is passed unmodified as a return value.

Definition at line 358 of file uip-fw.c.

void uip_fw_periodic ( void )

Perform periodic processing.

Definition at line 523 of file uip-fw.c.

void uip_fw_register ( struct uip_fw_netif * netif )

Register a network interface with the forwarding module.

Parameters:
netif A pointer to the network interface that is to be registered.

Definition at line 496 of file uip-fw.c.

Variable Documentation

u8_t ackno[4]

Definition at line 88 of file uip-fw.c.

u16_t destipaddr[2]

Definition at line 82 of file uip-fw.c.

u16_t destipaddr[2]

Definition at line 141 of file uip-fw.c.

u16_t destipaddr[2]

Definition at line 108 of file uip-fw.c.

u16_t destport

Definition at line 86 of file uip-fw.c.

u8_t flags

Definition at line 88 of file uip-fw.c.

u16_t icmpchksum

Definition at line 112 of file uip-fw.c.

u8_t icode

Definition at line 111 of file uip-fw.c.

u16_t id

Definition at line 113 of file uip-fw.c.

u16_t ipchksum

Definition at line 81 of file uip-fw.c.

u16_t ipchksum

Definition at line 107 of file uip-fw.c.

u16_t ipid

Definition at line 76 of file uip-fw.c.

u16_t ipid

Definition at line 142 of file uip-fw.c.

u8_t ipid[2]

Definition at line 100 of file uip-fw.c.

u16_t ipoffset

Definition at line 76 of file uip-fw.c.

u8_t ipoffset[2]

Definition at line 100 of file uip-fw.c.

u16_t len

Definition at line 76 of file uip-fw.c.

u8_t len[2]

Definition at line 100 of file uip-fw.c.

u8_t optdata[4]

Definition at line 95 of file uip-fw.c.

u8_t payload[1]

Definition at line 114 of file uip-fw.c.

u8_t proto

Definition at line 79 of file uip-fw.c.

u8_t proto

Definition at line 143 of file uip-fw.c.

u8_t proto

Definition at line 100 of file uip-fw.c.

u16_t seqno

Definition at line 113 of file uip-fw.c.

u8_t seqno[4]

Definition at line 88 of file uip-fw.c.

u16_t srcipaddr[2]

Definition at line 140 of file uip-fw.c.

u16_t srcipaddr[2]

Definition at line 108 of file uip-fw.c.

u16_t srcipaddr[2]

Definition at line 82 of file uip-fw.c.

u16_t srcport

Definition at line 86 of file uip-fw.c.

u16_t tcpchksum

Definition at line 93 of file uip-fw.c.

u8_t tcpoffset

Definition at line 88 of file uip-fw.c.

u8_t tos

Definition at line 100 of file uip-fw.c.

u8_t tos

Definition at line 74 of file uip-fw.c.

u8_t ttl

Definition at line 79 of file uip-fw.c.

u8_t ttl

Definition at line 100 of file uip-fw.c.

u8_t type

Definition at line 111 of file uip-fw.c.

u8_t unused

Definition at line 144 of file uip-fw.c.

u8_t urgp[2]

Definition at line 94 of file uip-fw.c.

u8_t wnd[2]

Definition at line 88 of file uip-fw.c.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uIP TCP throughput booster hack

Files | Functions
uIP TCP throughput booster hack
The uIP TCP/IP stack

Files

file | uip-split.h

Functions

void | uip_split_output (void)

Detailed Description

The basic uIP TCP implementation only allows each TCP connection to have a single TCP segment in flight at any given time. Because of the delayed ACK algorithm employed by most TCP receivers, uIP's limit on the amount of in-flight TCP segments seriously reduces the maximum achievable throughput for sending data from uIP.

The uip-split module is a hack which tries to remedy this situation. By splitting maximum sized outgoing TCP segments into two, the delayed ACK algorithm is not invoked at TCP receivers. This improves the throughput when sending data from uIP by orders of magnitude.

The uip-split module uses the uip-fw module (uIP IP packet forwarding) for sending packets. Therefore, the uip-fw module must be set up with the appropriate network interfaces for this module to work.

Function Documentation

void uip_split_output ( void )

Handle outgoing packets.

This function inspects an outgoing packet in the uip_buf buffer and sends it out using the uip_fw_output() function. If the packet is a full-sized TCP segment it will be split into two segments and transmitted separately. This function should be called instead of the actual device driver output function, or the uip_fw_output() function.

The headers of the outgoing packet is assumed to be in the uip_buf buffer and the payload is assumed to be wherever uip_appdata points. The length of the outgoing packet is assumed to be in the uip_len variable.

Definition at line 49 of file uip-split.c.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uIP configuration functions

Defines
uIP configuration functions
The uIP TCP/IP stack

Defines

#define | uip_sethostaddr(addr)
#define | uip_gethostaddr(addr)
#define | uip_setdraddr(addr)
#define | uip_setnetmask(addr)
#define | uip_getdraddr(addr)
#define | uip_getnetmask(addr)
#define | uip_setethaddr(eaddr)

Detailed Description

The uIP configuration functions are used for setting run-time parameters in uIP such as IP addresses.

Define Documentation

#define uip_getdraddr ( addr )

Get the default router's IP address.

Parameters:
addr A pointer to a uip_ipaddr_t variable that will be filled in with the IP address of the default router.

Definition at line 161 of file uip.h.

#define uip_gethostaddr ( addr )

Get the IP address of this host.

The IP address is represented as a 4-byte array where the first octet of the IP address is put in the first member of the 4-byte array.

Example:

 uip_ipaddr_t hostaddr;

 uip_gethostaddr(&hostaddr);
Parameters:
addr A pointer to a uip_ipaddr_t variable that will be filled in with the currently configured IP address.

Definition at line 126 of file uip.h.

#define uip_getnetmask ( addr )

Get the netmask.

Parameters:
addr A pointer to a uip_ipaddr_t variable that will be filled in with the value of the netmask.

Definition at line 171 of file uip.h.

#define uip_setdraddr ( addr )

Set the default router's IP address.

Parameters:
addr A pointer to a uip_ipaddr_t variable containing the IP address of the default router.
See also:
uip_ipaddr()

Definition at line 138 of file uip.h.

#define uip_setethaddr ( eaddr )

Specifiy the Ethernet MAC address.

The ARP code needs to know the MAC address of the Ethernet card in order to be able to respond to ARP queries and to generate working Ethernet headers.

Note:
This macro only specifies the Ethernet MAC address to the ARP code. It cannot be used to change the MAC address of the Ethernet card.
Parameters:
eaddr A pointer to a struct uip_eth_addr containing the Ethernet MAC address of the Ethernet card.

Definition at line 147 of file uip_arp.h.

#define uip_sethostaddr ( addr )

Set the IP address of this host.

The IP address is represented as a 4-byte array where the first octet of the IP address is put in the first member of the 4-byte array.

Example:

 uip_ipaddr_t addr;

 uip_ipaddr(&addr, 192,168,1,2);
 uip_sethostaddr(&addr);
Parameters:
addr A pointer to an IP address of type uip_ipaddr_t;
See also:
uip_ipaddr()

Definition at line 106 of file uip.h.

#define uip_setnetmask ( addr )

Set the netmask.

Parameters:
addr A pointer to a uip_ipaddr_t variable containing the IP address of the netmask.
See also:
uip_ipaddr()

Definition at line 150 of file uip.h.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uIP initialization functions

Functions
uIP initialization functions
The uIP TCP/IP stack

Functions

void | uip_init (void)
void | uip_setipid (u16_t id)

Detailed Description

The uIP initialization functions are used for booting uIP.

Function Documentation

void uip_init ( void )

uIP initialization function.

This function should be called at boot up to initilize the uIP TCP/IP stack.

Definition at line 393 of file uip.c.

void uip_setipid ( u16_t id )

uIP initialization function.

This function may be used at boot time to set the initial ip_id.

Definition at line 195 of file uip.c.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uIP device driver functions

Defines | Variables
uIP device driver functions
The uIP TCP/IP stack

Defines

#define | uip_input()
#define | uip_periodic(conn)
#define | uip_conn_active(conn) (uip_conns[conn].tcpstateflags != UIP_CLOSED)
#define | uip_periodic_conn(conn)
#define | uip_poll_conn(conn)

Variables

u8_t | uip_buf [UIP_BUFSIZE+2]

Detailed Description

These functions are used by a network device driver for interacting with uIP.

Define Documentation

#define uip_conn_active ( conn ) (uip_conns[conn].tcpstateflags != UIP_CLOSED)

Definition at line 308 of file uip.h.

#define uip_input ( )

Process an incoming packet.

This function should be called when the device driver has received a packet from the network. The packet from the device driver must be present in the uip_buf buffer, and the length of the packet should be placed in the uip_len variable.

When the function returns, there may be an outbound packet placed in the uip_buf packet buffer. If so, the uip_len variable is set to the length of the packet. If no packet is to be sent out, the uip_len variable is set to 0.

The usual way of calling the function is presented by the source code below.

  uip_len = devicedriver_poll();
  if(uip_len > 0) {
    uip_input();
    if(uip_len > 0) {
      devicedriver_send();
    }
  }
Note:
If you are writing a uIP device driver that needs ARP (Address Resolution Protocol), e.g., when running uIP over Ethernet, you will need to call the uIP ARP code before calling this function:
  #define BUF ((struct uip_eth_hdr *)&uip_buf[0])
  uip_len = ethernet_devicedrver_poll();
  if(uip_len > 0) {
    if(BUF->type == HTONS(UIP_ETHTYPE_IP)) {
      uip_arp_ipin();
      uip_input();
      if(uip_len > 0) {
        uip_arp_out();
        ethernet_devicedriver_send();
      }
    } else if(BUF->type == HTONS(UIP_ETHTYPE_ARP)) {
      uip_arp_arpin();
      if(uip_len > 0) {
        ethernet_devicedriver_send();
      }
    }

Definition at line 257 of file uip.h.

#define uip_periodic ( conn )

Periodic processing for a connection identified by its number.

This function does the necessary periodic processing (timers, polling) for a uIP TCP conneciton, and should be called when the periodic uIP timer goes off. It should be called for every connection, regardless of whether they are open of closed.

When the function returns, it may have an outbound packet waiting for service in the uIP packet buffer, and if so the uip_len variable is set to a value larger than zero. The device driver should be called to send out the packet.

The ususal way of calling the function is through a for() loop like this:

  for(i = 0; i < UIP_CONNS; ++i) {
    uip_periodic(i);
    if(uip_len > 0) {
      devicedriver_send();
    }
  }
Note:
If you are writing a uIP device driver that needs ARP (Address Resolution Protocol), e.g., when running uIP over Ethernet, you will need to call the uip_arp_out() function before calling the device driver:
  for(i = 0; i < UIP_CONNS; ++i) {
    uip_periodic(i);
    if(uip_len > 0) {
      uip_arp_out();
      ethernet_devicedriver_send();
    }
  }
Parameters:
conn The number of the connection which is to be periodically polled.

Definition at line 301 of file uip.h.

#define uip_periodic_conn ( conn )

Perform periodic processing for a connection identified by a pointer to its structure.

Same as uip_periodic() but takes a pointer to the actual uip_conn struct instead of an integer as its argument. This function can be used to force periodic processing of a specific connection.

Parameters:
conn A pointer to the uip_conn struct for the connection to be processed.

Definition at line 323 of file uip.h.

#define uip_poll_conn ( conn )

Reuqest that a particular connection should be polled.

Similar to uip_periodic_conn() but does not perform any timer processing. The application is polled for new data.

Parameters:
conn A pointer to the uip_conn struct for the connection to be processed.

Definition at line 337 of file uip.h.

Variable Documentation

u8_t uip_buf[UIP_BUFSIZE+2]

The uIP packet buffer.

The uip_buf array is used to hold incoming and outgoing packets. The device driver should place incoming data into this buffer. When sending data, the device driver should read the link level headers and the TCP/IP headers from this buffer. The size of the link level headers is configured by the UIP_LLH_LEN define.

Note:
The application data need not be placed in this buffer, so the device driver must read it from the place pointed to by the uip_appdata pointer as illustrated by the following example:
 void
 devicedriver_send(void)
 {
    hwsend(&uip_buf[0], UIP_LLH_LEN);
    if(uip_len <= UIP_LLH_LEN + UIP_TCPIP_HLEN) {
      hwsend(&uip_buf[UIP_LLH_LEN], uip_len - UIP_LLH_LEN);
    } else {
      hwsend(&uip_buf[UIP_LLH_LEN], UIP_TCPIP_HLEN);
      hwsend(uip_appdata, uip_len - UIP_TCPIP_HLEN - UIP_LLH_LEN);
    }
 }
Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uIP application functions

Defines | Functions
uIP application functions
The uIP TCP/IP stack

Defines

#define | uip_outstanding(conn) ((conn)->len)
#define | uip_datalen()
#define | uip_urgdatalen()
#define | uip_close()
#define | uip_abort()
#define | uip_stop()
#define | uip_stopped(conn)
#define | uip_restart()
#define | uip_udpconnection()
#define | uip_newdata()
#define | uip_acked()
#define | uip_connected()
#define | uip_closed()
#define | uip_aborted()
#define | uip_timedout()
#define | uip_rexmit()
#define | uip_poll()
#define | uip_initialmss()
#define | uip_mss()
#define | uip_udp_remove(conn)
#define | uip_udp_bind(conn, port)
#define | uip_udp_send(len)

Functions

void | uip_listen (u16_t port)
void | uip_unlisten (u16_t port)
struct uip_conn * | uip_connect (uip_ipaddr_t *ripaddr, u16_t port)
void | uip_send (const void *data, int len)
struct uip_udp_conn * | uip_udp_new (uip_ipaddr_t *ripaddr, u16_t rport)

Detailed Description

Functions used by an application running of top of uIP.

Define Documentation

#define uip_abort ( )

Abort the current connection.

This function will abort (reset) the current connection, and is usually used when an error has occured that prevents using the uip_close() function.

Definition at line 585 of file uip.h.

#define uip_aborted ( )

Has the connection been aborted by the other end?

Non-zero if the current connection has been aborted (reset) by the remote host.

Definition at line 684 of file uip.h.

#define uip_acked ( )

Has previously sent data been acknowledged?

Will reduce to non-zero if the previously sent data has been acknowledged by the remote host. This means that the application can send new data.

Definition at line 652 of file uip.h.

#define uip_close ( )

Close the current connection.

This function will close the current connection in a nice way.

Definition at line 574 of file uip.h.

#define uip_closed ( )

Has the connection been closed by the other end?

Is non-zero if the connection has been closed by the remote host. The application may then do the necessary clean-ups.

Definition at line 674 of file uip.h.

#define uip_connected ( )

Has the connection just been connected?

Reduces to non-zero if the current connection has been connected to a remote host. This will happen both if the connection has been actively opened (with uip_connect()) or passively opened (with uip_listen()).

Definition at line 664 of file uip.h.

#define uip_datalen ( )

The length of any incoming data that is currently avaliable (if avaliable) in the uip_appdata buffer.

The test function uip_data() must first be used to check if there is any data available at all.

Definition at line 554 of file uip.h.

#define uip_initialmss ( )

Get the initial maxium segment size (MSS) of the current connection.

Definition at line 728 of file uip.h.

#define uip_mss ( )

Get the current maxium segment size that can be sent on the current connection.

The current maxiumum segment size that can be sent on the connection is computed from the receiver's window and the MSS of the connection (which also is available by calling uip_initialmss()).

Definition at line 741 of file uip.h.

#define uip_newdata ( )

Is new incoming data available?

Will reduce to non-zero if there is new data for the application present at the uip_appdata pointer. The size of the data is avaliable through the uip_len variable.

Definition at line 641 of file uip.h.

#define uip_outstanding ( conn ) ((conn)->len)

Definition at line 515 of file uip.h.

#define uip_poll ( )

Is the connection being polled by uIP?

Is non-zero if the reason the application is invoked is that the current connection has been idle for a while and should be polled.

The polling event can be used for sending data without having to wait for the remote host to send data.

Definition at line 720 of file uip.h.

#define uip_restart ( )

Restart the current connection, if is has previously been stopped with uip_stop().

This function will open the receiver's window again so that we start receiving data for the current connection.

Definition at line 614 of file uip.h.

#define uip_rexmit ( )

Do we need to retransmit previously data?

Reduces to non-zero if the previously sent data has been lost in the network, and the application should retransmit it. The application should send the exact same data as it did the last time, using the uip_send() function.

Definition at line 706 of file uip.h.

#define uip_stop ( )

Tell the sending host to stop sending data.

This function will close our receiver's window so that we stop receiving data for the current connection.

Definition at line 595 of file uip.h.

#define uip_stopped ( conn )

Find out if the current connection has been previously stopped with uip_stop().

Definition at line 603 of file uip.h.

#define uip_timedout ( )

Has the connection timed out?

Non-zero if the current connection has been aborted due to too many retransmissions.

Definition at line 694 of file uip.h.

#define uip_udp_bind | ( | conn,
 |  | port
 | ) |

Bind a UDP connection to a local port.

Parameters:
conn | A pointer to the uip_udp_conn structure for the connection.
port | The local port number, in network byte order.

Definition at line 791 of file uip.h.

#define uip_udp_remove ( conn )

Removed a UDP connection.

Parameters:
conn A pointer to the uip_udp_conn structure for the connection.

Definition at line 779 of file uip.h.

#define uip_udp_send ( len )

Send a UDP datagram of length len on the current connection.

This function can only be called in response to a UDP event (poll or newdata). The data must be present in the uip_buf buffer, at the place pointed to by the uip_appdata pointer.

Parameters:
len The length of the data in the uip_buf buffer.

Definition at line 804 of file uip.h.

#define uip_udpconnection ( )

Is the current connection a UDP connection?

This function checks whether the current connection is a UDP connection.

Definition at line 630 of file uip.h.

#define uip_urgdatalen ( )

The length of any out-of-band data (urgent data) that has arrived on the connection.

Note:
The configuration parameter UIP_URGDATA must be set for this function to be enabled.

Definition at line 565 of file uip.h.

Function Documentation

struct uip_conn* uip_connect | ( | uip_ipaddr_t * | ripaddr,
 |  | u16_t | port
 | ) |  | [read]

Connect to a remote host using TCP.

This function is used to start a new connection to the specified port on the specied host. It allocates a new connection identifier, sets the connection to the SYN_SENT state and sets the retransmission timer to 0. This will cause a TCP SYN segment to be sent out the next time this connection is periodically processed, which usually is done within 0.5 seconds after the call to uip_connect().

Note:
This function is avaliable only if support for active open has been configured by defining UIP_ACTIVE_OPEN to 1 in uipopt.h.
Since this function requires the port number to be in network byte order, a conversion using HTONS() or htons() is necessary.
 uip_ipaddr_t ipaddr;

 uip_ipaddr(&ipaddr, 192,168,1,2);
 uip_connect(&ipaddr, HTONS(80));
Parameters:
ripaddr | The IP address of the remote hot.
port | A 16-bit port number in network byte order.
Returns:
A pointer to the uIP connection identifier for the new connection, or NULL if no connection could be allocated.

Definition at line 421 of file uip.c.

void uip_listen ( u16_t port )

Start listening to the specified port.

Note:
Since this function expects the port number in network byte order, a conversion using HTONS() or htons() is necessary.
 uip_listen(HTONS(80));
Parameters:
port A 16-bit port number in network byte order.

Definition at line 543 of file uip.c.

void uip_send | ( | const void * | data,
 |  | int | len
 | ) |  |

Send data on the current connection.

This function is used to send out a single segment of TCP data. Only applications that have been invoked by uIP for event processing can send data.

The amount of data that actually is sent out after a call to this funcion is determined by the maximum amount of data TCP allows. uIP will automatically crop the data so that only the appropriate amount of data is sent. The function uip_mss() can be used to query uIP for the amount of data that actually will be sent.

Note:
This function does not guarantee that the sent data will arrive at the destination. If the data is lost in the network, the application will be invoked with the uip_rexmit() event being set. The application will then have to resend the data using this function.
Parameters:
data | A pointer to the data which is to be sent.
len | The maximum amount of data bytes to be sent.

Definition at line 1906 of file uip.c.

struct uip_udp_conn* uip_udp_new | ( | uip_ipaddr_t * | ripaddr,
 |  | u16_t | rport
 | ) |  | [read]

Set up a new UDP connection.

This function sets up a new UDP connection. The function will automatically allocate an unused local port for the new connection. However, another port can be chosen by using the uip_udp_bind() call, after the uip_udp_new() function has been called.

Example:

 uip_ipaddr_t addr;
 struct uip_udp_conn *c;

 uip_ipaddr(&addr, 192,168,2,1);
 c = uip_udp_new(&addr, HTONS(12345));
 if(c != NULL) {
   uip_udp_bind(c, HTONS(12344));
 }
Parameters:
ripaddr | The IP address of the remote host.
rport | The remote port number in network byte order.
Returns:
The uip_udp_conn structure for the new connection or NULL if no connection could be allocated.
void uip_unlisten ( u16_t port )

Stop listening to the specified port.

Note:
Since this function expects the port number in network byte order, a conversion using HTONS() or htons() is necessary.
 uip_unlisten(HTONS(80));
Parameters:
port A 16-bit port number in network byte order.

Definition at line 532 of file uip.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uIP conversion functions

Defines | Functions
uIP conversion functions
The uIP TCP/IP stack

Defines

#define | uip_ipaddr(addr, addr0, addr1, addr2, addr3)
#define | uip_ip6addr(addr, addr0, addr1, addr2, addr3, addr4, addr5, addr6, addr7)
#define | uip_ipaddr_copy(dest, src)
#define | uip_ipaddr_cmp(addr1, addr2)
#define | uip_ipaddr_maskcmp(addr1, addr2, mask)
#define | uip_ipaddr_mask(dest, src, mask)
#define | uip_ipaddr1(addr)
#define | uip_ipaddr2(addr)
#define | uip_ipaddr3(addr)
#define | uip_ipaddr4(addr)
#define | HTONS(n)
#define | ntohs htons

Functions

u16_t | htons (u16_t val)
unsigned char | uiplib_ipaddrconv (char *addrstr, unsigned char *addr)

Detailed Description

These functions can be used for converting between different data formats used by uIP.

Define Documentation

#define HTONS ( n )

Convert 16-bit quantity from host byte order to network byte order.

This macro is primarily used for converting constants from host byte order to network byte order. For converting variables to network byte order, use the htons() function instead.

Definition at line 1074 of file uip.h.

#define ntohs htons

Definition at line 1091 of file uip.h.

#define uip_ip6addr | ( | addr,
 |  | addr0,
 |  | addr1,
 |  | addr2,
 |  | addr3,
 |  | addr4,
 |  | addr5,
 |  | addr6,
 |  | addr7
 | ) |

Construct an IPv6 address from eight 16-bit words.

This function constructs an IPv6 address.

Definition at line 856 of file uip.h.

#define uip_ipaddr | ( | addr,
 |  | addr0,
 |  | addr1,
 |  | addr2,
 |  | addr3
 | ) |

Construct an IP address from four bytes.

This function constructs an IP address of the type that uIP handles internally from four bytes. The function is handy for specifying IP addresses to use with e.g. the uip_connect() function.

Example:

 uip_ipaddr_t ipaddr;
 struct uip_conn *c;

 uip_ipaddr(&ipaddr, 192,168,1,2);
 c = uip_connect(&ipaddr, HTONS(80));
Parameters:
addr | A pointer to a uip_ipaddr_t variable that will be filled in with the IP address.
addr0 | The first octet of the IP address.
addr1 | The second octet of the IP address.
addr2 | The third octet of the IP address.
addr3 | The forth octet of the IP address.

Definition at line 844 of file uip.h.

#define uip_ipaddr1 ( addr )

Pick the first octet of an IP address.

Picks out the first octet of an IP address.

Example:

 uip_ipaddr_t ipaddr;
 u8_t octet;

 uip_ipaddr(&ipaddr, 1,2,3,4);
 octet = uip_ipaddr1(&ipaddr);

In the example above, the variable "octet" will contain the value 1.

Definition at line 999 of file uip.h.

#define uip_ipaddr2 ( addr )

Pick the second octet of an IP address.

Picks out the second octet of an IP address.

Example:

 uip_ipaddr_t ipaddr;
 u8_t octet;

 uip_ipaddr(&ipaddr, 1,2,3,4);
 octet = uip_ipaddr2(&ipaddr);

In the example above, the variable "octet" will contain the value 2.

Definition at line 1019 of file uip.h.

#define uip_ipaddr3 ( addr )

Pick the third octet of an IP address.

Picks out the third octet of an IP address.

Example:

 uip_ipaddr_t ipaddr;
 u8_t octet;

 uip_ipaddr(&ipaddr, 1,2,3,4);
 octet = uip_ipaddr3(&ipaddr);

In the example above, the variable "octet" will contain the value 3.

Definition at line 1039 of file uip.h.

#define uip_ipaddr4 ( addr )

Pick the fourth octet of an IP address.

Picks out the fourth octet of an IP address.

Example:

 uip_ipaddr_t ipaddr;
 u8_t octet;

 uip_ipaddr(&ipaddr, 1,2,3,4);
 octet = uip_ipaddr4(&ipaddr);

In the example above, the variable "octet" will contain the value 4.

Definition at line 1059 of file uip.h.

#define uip_ipaddr_cmp | ( | addr1,
 |  | addr2
 | ) |

Compare two IP addresses

Compares two IP addresses.

Example:

 uip_ipaddr_t ipaddr1, ipaddr2;

 uip_ipaddr(&ipaddr1, 192,16,1,2);
 if(uip_ipaddr_cmp(&ipaddr2, &ipaddr1)) {
    printf("They are the same");
 }
Parameters:
addr1 | The first IP address.
addr2 | The second IP address.

Definition at line 915 of file uip.h.

#define uip_ipaddr_copy | ( | dest,
 |  | src
 | ) |

Copy an IP address to another IP address.

Copies an IP address from one place to another.

Example:

 uip_ipaddr_t ipaddr1, ipaddr2;

 uip_ipaddr(&ipaddr1, 192,16,1,2);
 uip_ipaddr_copy(&ipaddr2, &ipaddr1);
Parameters:
dest | The destination for the copy.
src | The source from where to copy.

Definition at line 886 of file uip.h.

#define uip_ipaddr_mask | ( | dest,
 |  | src,
 |  | mask
 | ) |

Mask out the network part of an IP address.

Masks out the network part of an IP address, given the address and the netmask.

Example:

 uip_ipaddr_t ipaddr1, ipaddr2, netmask;

 uip_ipaddr(&ipaddr1, 192,16,1,2);
 uip_ipaddr(&netmask, 255,255,255,0);
 uip_ipaddr_mask(&ipaddr2, &ipaddr1, &netmask);

In the example above, the variable "ipaddr2" will contain the IP address 192.168.1.0.

Parameters:
dest | Where the result is to be placed.
src | The IP address.
mask | The netmask.

Definition at line 976 of file uip.h.

#define uip_ipaddr_maskcmp | ( | addr1,
 |  | addr2,
 |  | mask
 | ) |

Compare two IP addresses with netmasks

Compares two IP addresses with netmasks. The masks are used to mask out the bits that are to be compared.

Example:

 uip_ipaddr_t ipaddr1, ipaddr2, mask;

 uip_ipaddr(&mask, 255,255,255,0);
 uip_ipaddr(&ipaddr1, 192,16,1,2);
 uip_ipaddr(&ipaddr2, 192,16,1,3);
 if(uip_ipaddr_maskcmp(&ipaddr1, &ipaddr2, &mask)) {
    printf("They are the same");
 }
Parameters:
addr1 | The first IP address.
addr2 | The second IP address.
mask | The netmask.

Definition at line 945 of file uip.h.

Function Documentation

u16_t htons ( u16_t val )

Convert 16-bit quantity from host byte order to network byte order.

This function is primarily used for converting variables from host byte order to network byte order. For converting constants to network byte order, use the HTONS() macro instead.

Definition at line 1900 of file uip.c.

unsigned char uiplib_ipaddrconv | ( | char * | addrstr,
 |  | unsigned char * | addr
 | ) |  |

Convert a textual representation of an IP address to a numerical representation.

This function takes a textual representation of an IP address in the form a.b.c.d and converts it into a 4-byte array that can be used by other uIP functions.

Parameters:
addrstr | A pointer to a string containing the IP address in textual form.
addr | A pointer to a 4-byte array that will be filled in with the numerical representation of the address.
Return values:
0 | If the IP address could not be parsed.
Non-zero | If the IP address was parsed.

Definition at line 43 of file uiplib.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Variables used in uIP device drivers

Variables
Variables used in uIP device drivers
The uIP TCP/IP stack

Variables

u16_t uip_len

Detailed Description

uIP has a few global variables that are used in device drivers for uIP.

Variable Documentation

u16_t uip_len

The length of the packet in the uip_buf buffer.

The global variable uip_len holds the length of the packet in the uip_buf buffer.

When the network device driver calls the uIP input function, uip_len should be set to the length of the packet in the uip_buf buffer.

When sending packets, the device driver should use the contents of the uip_len variable to determine the length of the outgoing packet.

Definition at line 169 of file uip.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uIP Address Resolution Protocol

Data Structures | Files | Defines | Functions | Variables
uIP Address Resolution Protocol
The uIP TCP/IP stack

Data Structures

struct | arp_hdr
struct | ethip_hdr
struct | arp_entry
struct | uip_eth_hdr

Files

file | uip_arp.c
file | uip_arp.h

Defines

#define | ARP_REQUEST 1
#define | ARP_REPLY 2
#define | ARP_HWTYPE_ETH 1
#define | BUF ((struct arp_hdr *)&uip_buf[0])
#define | IPBUF ((struct ethip_hdr *)&uip_buf[0])
#define | UIP_ETHTYPE_ARP 0x0806
#define | UIP_ETHTYPE_IP 0x0800
#define | UIP_ETHTYPE_IP6 0x86dd

Functions

void | uip_arp_init (void)
void | uip_arp_timer (void)
void | uip_arp_ipin (void)
void | uip_arp_arpin (void)
void | uip_arp_out (void)

Variables

static u8_t | c
struct uip_eth_addr | uip_ethaddr

Detailed Description

The Address Resolution Protocol ARP is used for mapping between IP addresses and link level addresses such as the Ethernet MAC addresses. ARP uses broadcast queries to ask for the link level address of a known IP address and the host which is configured with the IP address for which the query was meant, will respond with its link level address.

Note:
This ARP implementation only supports Ethernet.

Define Documentation

#define ARP_HWTYPE_ETH 1

Definition at line 123 of file uip_arp.c.

#define ARP_REPLY 2

Definition at line 121 of file uip_arp.c.

#define ARP_REQUEST 1

Definition at line 120 of file uip_arp.c.

#define BUF ((struct arp_hdr *)&uip_buf[0])

Definition at line 142 of file uip_arp.c.

#define IPBUF ((struct ethip_hdr *)&uip_buf[0])

Definition at line 143 of file uip_arp.c.

#define UIP_ETHTYPE_ARP 0x0806

Definition at line 82 of file uip_arp.h.

#define UIP_ETHTYPE_IP 0x0800

Definition at line 83 of file uip_arp.h.

#define UIP_ETHTYPE_IP6 0x86dd

Definition at line 84 of file uip_arp.h.

Function Documentation

void uip_arp_arpin ( void )

ARP processing for incoming ARP packets.

This function should be called by the device driver when an ARP packet has been received. The function will act differently depending on the ARP packet type: if it is a reply for a request that we previously sent out, the ARP cache will be filled in with the values from the ARP reply. If the incoming ARP packet is an ARP request for our IP address, an ARP reply packet is created and put into the uip_buf[] buffer.

When the function returns, the value of the global variable uip_len indicates whether the device driver should send out a packet or not. If uip_len is zero, no packet should be sent. If uip_len is non-zero, it contains the length of the outbound packet that is present in the uip_buf[] buffer.

This function expects an ARP packet with a prepended Ethernet header in the uip_buf[] buffer, and the length of the packet in the global variable uip_len.

Definition at line 304 of file uip_arp.c.

void uip_arp_init ( void )

Initialize the ARP module.

Definition at line 151 of file uip_arp.c.

void uip_arp_ipin ( void )

ARP processing for incoming IP packets

This function should be called by the device driver when an IP packet has been received. The function will check if the address is in the ARP cache, and if so the ARP cache entry will be refreshed. If no ARP cache entry was found, a new one is created.

This function expects an IP packet with a prepended Ethernet header in the uip_buf[] buffer, and the length of the packet in the global variable uip_len.

Definition at line 261 of file uip_arp.c.

void uip_arp_out ( void )

Prepend Ethernet header to an outbound IP packet and see if we need to send out an ARP request.

This function should be called before sending out an IP packet. The function checks the destination IP address of the IP packet to see what Ethernet MAC address that should be used as a destination MAC address on the Ethernet.

If the destination IP address is in the local network (determined by logical ANDing of netmask and our IP address), the function checks the ARP cache to see if an entry for the destination IP address is found. If so, an Ethernet header is prepended and the function returns. If no ARP cache entry is found for the destination IP address, the packet in the uip_buf[] is replaced by an ARP request packet for the IP address. The IP packet is dropped and it is assumed that they higher level protocols (e.g., TCP) eventually will retransmit the dropped packet.

If the destination IP address is not on the local network, the IP address of the default router is used instead.

When the function returns, a packet is present in the uip_buf[] buffer, and the length of the packet is in the global variable uip_len.

Definition at line 380 of file uip_arp.c.

void uip_arp_timer ( void )

Periodic ARP processing function.

This function performs periodic timer processing in the ARP module and should be called at regular intervals. The recommended interval is 10 seconds between the calls.

Definition at line 168 of file uip_arp.c.

Variable Documentation

u8_t c

Definition at line 137 of file uip_arp.c.

struct uip_eth_addr uip_ethaddr

Definition at line 139 of file uip.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Architecture specific uIP functions

Files | Functions | Variables
Architecture specific uIP functions
The uIP TCP/IP stack

Files

file | uip_arch.h

Functions

void | uip_add32 (u8_t *op32, u16_t op16)
u16_t | uip_chksum (u16_t *buf, u16_t len)
u16_t | uip_ipchksum (void)
u16_t | uip_tcpchksum (void)
u16_t | uip_udpchksum (void)

Variables

u8_t | uip_acc32 [4]

Detailed Description

The functions in the architecture specific module implement the IP check sum and 32-bit additions.

The IP checksum calculation is the most computationally expensive operation in the TCP/IP stack and it therefore pays off to implement this in efficient assembler. The purpose of the uip-arch module is to let the checksum functions to be implemented in architecture specific assembler.

Function Documentation

void uip_add32 | ( | u8_t * | op32,
 |  | u16_t | op16
 | ) |  |

Carry out a 32-bit addition.

Because not all architectures for which uIP is intended has native 32-bit arithmetic, uIP uses an external C function for doing the required 32-bit additions in the TCP protocol processing. This function should add the two arguments and place the result in the global variable uip_acc32.

Note:
The 32-bit integer pointed to by the op32 parameter and the result in the uip_acc32 variable are in network byte order (big endian).
Parameters:
op32 | A pointer to a 4-byte array representing a 32-bit integer in network byte order (big endian).
op16 | A 16-bit integer in host byte order.

Definition at line 263 of file uip.c.

u16_t uip_chksum | ( | u16_t * | buf,
 |  | u16_t | len
 | ) |  |

Calculate the Internet checksum over a buffer.

The Internet checksum is the one's complement of the one's complement sum of all 16-bit words in the buffer.

See RFC1071.

Note:
This function is not called in the current version of uIP, but future versions might make use of it.
Parameters:
buf | A pointer to the buffer over which the checksum is to be computed.
len | The length of the buffer over which the checksum is to be computed.
Returns:
The Internet checksum of the buffer.

Calculate the Internet checksum over a buffer.

The Internet checksum is the one's complement of the one's complement sum of all 16-bit words in the buffer.

See RFC1071.

Parameters:
buf | A pointer to the buffer over which the checksum is to be computed.
len | The length of the buffer over which the checksum is to be computed.
Returns:
The Internet checksum of the buffer.

Definition at line 325 of file uip.c.

u16_t uip_ipchksum ( void )

Calculate the IP header checksum of the packet header in uip_buf.

The IP header checksum is the Internet checksum of the 20 bytes of the IP header.

Returns:
The IP header checksum of the IP header in the uip_buf buffer.

Definition at line 332 of file uip.c.

u16_t uip_tcpchksum ( void )

Calculate the TCP checksum of the packet in uip_buf and uip_appdata.

The TCP checksum is the Internet checksum of data contents of the TCP segment, and a pseudo-header as defined in RFC793.

Note:
The uip_appdata pointer that points to the packet data may point anywhere in memory, so it is not possible to simply calculate the Internet checksum of the contents of the uip_buf buffer.
Returns:
The TCP checksum of the TCP segment in uip_buf and pointed to by uip_appdata.

Calculate the TCP checksum of the packet in uip_buf and uip_appdata.

The TCP checksum is the Internet checksum of data contents of the TCP segment, and a pseudo-header as defined in RFC793.

Returns:
The TCP checksum of the TCP segment in uip_buf and pointed to by uip_appdata.

Definition at line 378 of file uip.c.

u16_t uip_udpchksum ( void )

Calculate the UDP checksum of the packet in uip_buf and uip_appdata.

The UDP checksum is the Internet checksum of data contents of the UDP segment, and a pseudo-header as defined in RFC768.

Returns:
The UDP checksum of the UDP segment in uip_buf and pointed to by uip_appdata.

Definition at line 385 of file uip.c.

Variable Documentation

u8_t uip_acc32[4]

4-byte array used for the 32-bit sequence number calculations.

Definition at line 206 of file uip.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Configuration options for uIP

Files | Defines
Configuration options for uIP
uIP

Files

file | uip-conf.h
file | uipopt.h

Defines

#define | UIP_LITTLE_ENDIAN 3412
#define | UIP_BIG_ENDIAN 1234

Project-specific configuration options

uIP has a number of configuration options that can be overridden for each project. These are kept in a project-specific uip-conf.h file and all configuration names have the prefix UIP_CONF.

typedef uint8_t | u8_t
typedef uint16_t | u16_t
typedef unsigned short | uip_stats_t
#define | UIP_CONF_MAX_CONNECTIONS
#define | UIP_CONF_MAX_LISTENPORTS
#define | UIP_CONF_BUFFER_SIZE
#define | UIP_CONF_BYTE_ORDER
#define | UIP_CONF_LOGGING
#define | UIP_CONF_UDP
#define | UIP_CONF_UDP_CHECKSUMS
#define | UIP_CONF_STATISTICS

Static configuration options

These configuration options can be used for setting the IP address settings statically, but only if UIP_FIXEDADDR is set to 1. The configuration options for a specific node includes IP address, netmask and default router as well as the Ethernet address. The netmask, default router and Ethernet address are appliciable only if uIP should be run over Ethernet.

All of these should be changed to suit your project.

#define | UIP_FIXEDADDR
#define | UIP_PINGADDRCONF
#define | UIP_FIXEDETHADDR

IP configuration options

#define | UIP_TTL 64
#define | UIP_REASSEMBLY
#define | UIP_REASS_MAXAGE 40

UDP configuration options

#define | UIP_UDP
#define | UIP_UDP_CHECKSUMS
#define | UIP_UDP_CONNS

TCP configuration options

The name of the function that should be called when UDP datagrams arrive.

#define | UIP_ACTIVE_OPEN
#define | UIP_CONNS
#define | UIP_LISTENPORTS
#define | UIP_URGDATA
#define | UIP_RTO 3
#define | UIP_MAXRTX 8
#define | UIP_MAXSYNRTX 5
#define | UIP_TCP_MSS (UIP_BUFSIZE - UIP_LLH_LEN - UIP_TCPIP_HLEN)
#define | UIP_RECEIVE_WINDOW
#define | UIP_TIME_WAIT_TIMEOUT 120

ARP configuration options

#define | UIP_ARPTAB_SIZE
#define | UIP_ARP_MAXAGE 120

General configuration options

void | uip_log (char *msg)
#define | UIP_BUFSIZE
#define | UIP_STATISTICS
#define | UIP_LOGGING
#define | UIP_BROADCAST
#define | UIP_LLH_LEN

CPU architecture configuration

The CPU architecture configuration is where the endianess of the CPU on which uIP is to be run is specified. Most CPUs today are little endian, and the most notable exception are the Motorolas which are big endian. The BYTE_ORDER macro should be changed to reflect the CPU architecture on which uIP is to be run.

#define | UIP_BYTE_ORDER

Appication specific configurations

An uIP application is implemented using a single application function that is called by uIP whenever a TCP/IP event occurs. The name of this function must be registered with uIP at compile time using the UIP_APPCALL definition.

uIP applications can store the application state within the uip_conn structure by specifying the type of the application structure by typedef:ing the type uip_tcp_appstate_t and uip_udp_appstate_t.

The file containing the definitions must be included in the uipopt.h file.

The following example illustrates how this can look.

void httpd_appcall(void);
#define UIP_APPCALL     httpd_appcall

struct httpd_state {
  u8_t state;
  u16_t count;
  char *dataptr;
  char *script;
};
typedef struct httpd_state uip_tcp_appstate_t
typedef struct hello_world_state | uip_tcp_appstate_t
typedef struct dhcpc_state | uip_udp_appstate_t
#define | UIP_APPCALL hello_world_appcall

Detailed Description

uIP is configured using the per-project configuration file uipopt.h. This file contains all compile-time options for uIP and should be tweaked to match each specific project. The uIP distribution contains a documented example "uipopt.h" that can be copied and modified for each project.

Note:
Most of the configuration options in the uipopt.h should not be changed, but rather the per-project uip-conf.h file.

Define Documentation

#define UIP_ACTIVE_OPEN

Determines if support for opening connections from uIP should be compiled in.

If the applications that are running on top of uIP for this project do not need to open outgoing TCP connections, this configration option can be turned off to reduce the code size of uIP.

Definition at line 237 of file uipopt.h.

define UIP_APPCALL hello_world_appcall

The name of the application function that uIP should call in response to TCP/IP events.

Definition at line 49 of file hello-world.h.

#define UIP_ARP_MAXAGE 120

The maxium age of ARP table entries measured in 10ths of seconds.

An UIP_ARP_MAXAGE of 120 corresponds to 20 minutes (BSD default).

Definition at line 362 of file uipopt.h.

#define UIP_ARPTAB_SIZE

The size of the ARP table.

This option should be set to a larger value if this uIP node will have many connections from the local network.

Definition at line 353 of file uipopt.h.

#define UIP_BIG_ENDIAN 1234

Definition at line 71 of file uipopt.h.

#define UIP_BROADCAST

Broadcast support.

This flag configures IP broadcast support. This is useful only together with UDP.

Definition at line 427 of file uipopt.h.

#define UIP_BUFSIZE

The size of the uIP packet buffer.

The uIP packet buffer should not be smaller than 60 bytes, and does not need to be larger than 1500 bytes. Lower size results in lower TCP throughput, larger size results in higher TCP throughput.

Definition at line 385 of file uipopt.h.

#define UIP_BYTE_ORDER

The byte order of the CPU architecture on which uIP is to be run.

This option can be either BIG_ENDIAN (Motorola byte order) or LITTLE_ENDIAN (Intel byte order).

Definition at line 477 of file uipopt.h.

#define UIP_CONF_BUFFER_SIZE

uIP buffer size.

Definition at line 107 of file uip-conf.h.

#define UIP_CONF_BYTE_ORDER

CPU byte order.

Definition at line 114 of file uip-conf.h.

#define UIP_CONF_LOGGING

Logging on or off

Definition at line 121 of file uip-conf.h.

#define UIP_CONF_MAX_CONNECTIONS

Maximum number of TCP connections.

Definition at line 93 of file uip-conf.h.

#define UIP_CONF_MAX_LISTENPORTS

Maximum number of listening TCP ports.

Definition at line 100 of file uip-conf.h.

#define UIP_CONF_STATISTICS

uIP statistics on or off

Definition at line 142 of file uip-conf.h.

#define UIP_CONF_UDP

UDP support on or off

Definition at line 128 of file uip-conf.h.

#define UIP_CONF_UDP_CHECKSUMS

UDP checksums on or off

Definition at line 135 of file uip-conf.h.

#define UIP_CONNS

The maximum number of simultaneously open TCP connections.

Since the TCP connections are statically allocated, turning this configuration knob down results in less RAM used. Each TCP connection requires approximatly 30 bytes of memory.

Definition at line 251 of file uipopt.h.

#define UIP_FIXEDADDR

Determines if uIP should use a fixed IP address or not.

If uIP should use a fixed IP address, the settings are set in the uipopt.h file. If not, the macros uip_sethostaddr(), uip_setdraddr() and uip_setnetmask() should be used instead.

Definition at line 101 of file uipopt.h.

#define UIP_FIXEDETHADDR

Specifies if the uIP ARP module should be compiled with a fixed Ethernet MAC address or not.

If this configuration option is 0, the macro uip_setethaddr() can be used to specify the Ethernet address at run-time.

Definition at line 131 of file uipopt.h.

#define UIP_LISTENPORTS

The maximum number of simultaneously listening TCP ports.

Each listening TCP port requires 2 bytes of memory.

Definition at line 265 of file uipopt.h.

#define UIP_LITTLE_ENDIAN 3412

Definition at line 68 of file uipopt.h.

#define UIP_LLH_LEN

The link level header length.

This is the offset into the uip_buf where the IP header can be found. For Ethernet, this should be set to 14. For SLIP, this should be set to 0.

Definition at line 452 of file uipopt.h.

#define UIP_LOGGING

Determines if logging of certain events should be compiled in.

This is useful mostly for debugging. The function uip_log() must be implemented to suit the architecture of the project, if logging is turned on.

Definition at line 414 of file uipopt.h.

#define UIP_MAXRTX 8

The maximum number of times a segment should be retransmitted before the connection should be aborted.

This should not be changed.

Definition at line 292 of file uipopt.h.

#define UIP_MAXSYNRTX 5

The maximum number of times a SYN segment should be retransmitted before a connection request should be deemed to have been unsuccessful.

This should not need to be changed.

Definition at line 301 of file uipopt.h.

#define UIP_PINGADDRCONF

Ping IP address asignment.

uIP uses a "ping" packets for setting its own IP address if this option is set. If so, uIP will start with an empty IP address and the destination IP address of the first incoming "ping" (ICMP echo) packet will be used for setting the hosts IP address.

Note:
This works only if UIP_FIXEDADDR is 0.

Definition at line 118 of file uipopt.h.

#define UIP_REASS_MAXAGE 40

The maximum time an IP fragment should wait in the reassembly buffer before it is dropped.

Definition at line 167 of file uipopt.h.

#define UIP_REASSEMBLY

Turn on support for IP packet reassembly.

uIP supports reassembly of fragmented IP packets. This features requires an additonal amount of RAM to hold the reassembly buffer and the reassembly code size is approximately 700 bytes. The reassembly buffer is of the same size as the uip_buf buffer (configured by UIP_BUFSIZE).

Note:
IP packet reassembly is not heavily tested.

Definition at line 160 of file uipopt.h.

#define UIP_RECEIVE_WINDOW

The size of the advertised receiver's window.

Should be set low (i.e., to the size of the uip_buf buffer) is the application is slow to process incoming data, or high (32768 bytes) if the application processes data quickly.

Definition at line 321 of file uipopt.h.

#define UIP_RTO 3

The initial retransmission timeout counted in timer pulses.

This should not be changed.

Definition at line 284 of file uipopt.h.

#define UIP_STATISTICS

Determines if statistics support should be compiled in.

The statistics is useful for debugging and to show the user.

Definition at line 399 of file uipopt.h.

#define UIP_TCP_MSS (UIP_BUFSIZE - UIP_LLH_LEN - UIP_TCPIP_HLEN)

The TCP maximum segment size.

This is should not be to set to more than UIP_BUFSIZE - UIP_LLH_LEN - UIP_TCPIP_HLEN.

Definition at line 309 of file uipopt.h.

#define UIP_TIME_WAIT_TIMEOUT 120

How long a connection should stay in the TIME_WAIT state.

This configiration option has no real implication, and it should be left untouched.

Definition at line 332 of file uipopt.h.

#define UIP_TTL 64

The IP TTL (time to live) of IP packets sent by uIP.

This should normally not be changed.

Definition at line 145 of file uipopt.h.

#define UIP_UDP

Toggles wether UDP support should be compiled in or not.

Definition at line 183 of file uipopt.h.

#define UIP_UDP_CHECKSUMS

Toggles if UDP checksums should be used or not.

Note:
Support for UDP checksums is currently not included in uIP, so this option has no function.

Definition at line 197 of file uipopt.h.

#define UIP_UDP_CONNS

The maximum amount of concurrent UDP connections.

Definition at line 210 of file uipopt.h.

#define UIP_URGDATA

Determines if support for TCP urgent data notification should be compiled in.

Urgent data (out-of-band data) is a rarely used TCP feature that very seldom would be required.

Definition at line 277 of file uipopt.h.

Typedef Documentation

typedef uint16_t u16_t

16 bit datatype

This typedef defines the 16-bit type used throughout uIP.

Definition at line 76 of file uip-conf.h.

typedef uint8_t u8_t

8 bit datatype

This typedef defines the 8-bit type used throughout uIP.

Definition at line 67 of file uip-conf.h.

typedef unsigned short uip_stats_t

Statistics datatype

This typedef defines the dataype used for keeping statistics in uIP.

Definition at line 86 of file uip-conf.h.

typedef uip_tcp_appstate_t

The type of the application state that is to be stored in the uip_conn structure. This usually is typedef:ed to a struct holding application state information.

typedef uip_udp_appstate_t

The type of the application state that is to be stored in the uip_conn structure. This usually is typedef:ed to a struct holding application state information.

Definition at line 64 of file dhcpc.h.

Function Documentation

void uip_log ( char * msg )

Print out a uIP log message.

This function must be implemented by the module that uses uIP, and is called by uIP whenever a log message is generated.

Definition at line 74 of file main.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Apps

Modules
Apps
uIP

Modules

Hello, world
DNS resolver
SMTP E-mail sender
Web client
Web server
Generated on Mon Nov 28 2011 11:15:29 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Hello, world

Data Structures | Files | Functions
Hello, world
Apps

Data Structures

struct | hello_world_state

Files

file | hello-world.c
file | hello-world.h

Functions

void | hello_world_init (void)
void | hello_world_appcall (void)

Detailed Description

A small example showing how to write applications with protosockets.

Function Documentation

void hello_world_appcall ( void )

Definition at line 55 of file hello-world.c.

void hello_world_init ( void )

Definition at line 41 of file hello-world.c.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DNS resolver

Data Structures | Files | Defines | Typedefs | Functions
DNS resolver
Apps

Data Structures

struct | dns_hdr
struct | dns_answer
struct | namemap

Files

file | resolv.c
file | resolv.h

Defines

#define | NULL (void *)0
#define | MAX_RETRIES 8
#define | RESOLV_ENTRIES 4
#define | UIP_UDP_APPCALL resolv_appcall

Typedefs

typedef int | uip_udp_appstate_t

Functions

void | resolv_appcall (void)
void | resolv_query (char *name)
u16_t * | resolv_lookup (char *name)
u16_t * | resolv_getserver (void)
void | resolv_conf (u16_t *dnsserver)
void | resolv_init (void)
void | resolv_found (char *name, u16_t *ipaddr)

Detailed Description

The uIP DNS resolver functions are used to lookup a hostname and map it to a numerical IP address. It maintains a list of resolved hostnames that can be queried with the resolv_lookup() function. New hostnames can be resolved using the resolv_query() function.

When a hostname has been resolved (or found to be non-existant), the resolver code calls a callback function called resolv_found() that must be implemented by the module that uses the resolver.

Define Documentation

#define MAX_RETRIES 8

Definition at line 77 of file resolv.c.

#define NULL (void *)0

Definition at line 73 of file resolv.c.

#define RESOLV_ENTRIES 4

Definition at line 127 of file resolv.c.

#define UIP_UDP_APPCALL resolv_appcall

Definition at line 49 of file resolv.h.

Typedef Documentation

typedef int uip_udp_appstate_t

Definition at line 47 of file resolv.h.

Function Documentation

void resolv_appcall ( void )

Definition at line 335 of file resolv.c.

void resolv_conf ( u16_t * dnsserver )

Configure which DNS server to use for queries.

Parameters:
dnsserver A pointer to a 4-byte representation of the IP address of the DNS server to be configured.

Definition at line 442 of file resolv.c.

void resolv_found | ( | char * | name,
 |  | u16_t * | ipaddr
 | ) |  |

Callback function which is called when a hostname is found.

This function must be implemented by the module that uses the DNS resolver. It is called when a hostname is found, or when a hostname was not found.

Parameters:
name | A pointer to the name that was looked up.
ipaddr | A pointer to a 4-byte array containing the IP address of the hostname, or NULL if the hostname could not be found.
u16_t * resolv_getserver ( void )

Obtain the currently configured DNS server.

Returns:
A pointer to a 4-byte representation of the IP address of the currently configured DNS server or NULL if no DNS server has been configured.

Definition at line 426 of file resolv.c.

void resolv_init ( void )

Initalize the resolver.

Definition at line 456 of file resolv.c.

u16_t * resolv_lookup ( char * name )

Look up a hostname in the array of known hostnames.

Note:
This function only looks in the internal array of known hostnames, it does not send out a query for the hostname if none was found. The function resolv_query() can be used to send a query for a hostname.
Returns:
A pointer to a 4-byte representation of the hostname's IP address, or NULL if the hostname was not found in the array of hostnames.

Definition at line 400 of file resolv.c.

void resolv_query ( char * name )

Queues a name so that a question for the name will be sent out.

Parameters:
name The hostname that is to be queried.

Definition at line 354 of file resolv.c.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SMTP E-mail sender

Data Structures | Files | Defines | Typedefs | Functions
SMTP E-mail sender
Apps

Data Structures

struct | smtp_state

Files

file | smtp.c
file | smtp.h

Defines

#define | ISO_nl 0x0a
#define | ISO_cr 0x0d
#define | ISO_period 0x2e
#define | ISO_2 0x32
#define | ISO_3 0x33
#define | ISO_4 0x34
#define | ISO_5 0x35
#define | SMTP_ERR_OK 0
#define | SMTP_SEND(to, cc, from, subject, msg) smtp_send(to, cc, from, subject, msg, strlen(msg))
#define | UIP_APPCALL smtp_appcall

Typedefs

typedef struct smtp_state | uip_tcp_appstate_t

Functions

void | smtp_done (unsigned char error)
void | smtp_init (void)
void | smtp_configure (char *localhostname, u16_t *smtpserver)
unsigned char | smtp_send (char *to, char *from, char *subject, char *msg, u16_t msglen)
void | smtp_appcall (void)

Detailed Description

The Simple Mail Transfer Protocol (SMTP) as defined by RFC821 is the standard way of sending and transfering e-mail on the Internet. This simple example implementation is intended as an example of how to implement protocols in uIP, and is able to send out e-mail but has not been extensively tested.

Define Documentation

#define ISO_2 0x32

Definition at line 78 of file smtp.c.

#define ISO_3 0x33

Definition at line 79 of file smtp.c.

#define ISO_4 0x34

Definition at line 80 of file smtp.c.

#define ISO_5 0x35

Definition at line 81 of file smtp.c.

#define ISO_cr 0x0d

Definition at line 74 of file smtp.c.

#define ISO_nl 0x0a

Definition at line 73 of file smtp.c.

#define ISO_period 0x2e

Definition at line 76 of file smtp.c.

#define SMTP_ERR_OK 0

Error number that signifies a non-error condition.

Definition at line 55 of file smtp.h.

#define SMTP_SEND | ( | to,
 |  | cc,
 |  | from,
 |  | subject,
 |  | msg
 | ) | smtp_send(to, cc, from, subject, msg, strlen(msg))

Definition at line 76 of file smtp.h.

#define UIP_APPCALL smtp_appcall

Definition at line 96 of file smtp.h.

Typedef Documentation

typedef struct smtp_state uip_tcp_appstate_t

Definition at line 98 of file smtp.h.

Function Documentation

void smtp_appcall ( void )
void smtp_configure | ( | char * | localhostname,
 |  | u16_t * | smtpserver
 | ) |  |
void smtp_done ( unsigned char error )

Callback function that is called when an e-mail transmission is done.

This function must be implemented by the module that uses the SMTP module.

Parameters:
error The number of the error if an error occured, or SMTP_ERR_OK.
void smtp_init ( void )
unsigned char smtp_send | ( | char * | to,
 |  | char * | from,
 |  | char * | subject,
 |  | char * | msg,
 |  | u16_t | msglen
 | ) |  |
Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Web client

Data Structures | Files | Defines | Typedefs | Functions
Web client
Apps

Data Structures

struct | webclient_state

Files

file | webclient.c
file | webclient.h

Defines

#define | WEBCLIENT_TIMEOUT 100
#define | WEBCLIENT_STATE_STATUSLINE 0
#define | WEBCLIENT_STATE_HEADERS 1
#define | WEBCLIENT_STATE_DATA 2
#define | WEBCLIENT_STATE_CLOSE 3
#define | HTTPFLAG_NONE 0
#define | HTTPFLAG_OK 1
#define | HTTPFLAG_MOVED 2
#define | HTTPFLAG_ERROR 3
#define | ISO_nl 0x0a
#define | ISO_cr 0x0d
#define | ISO_space 0x20
#define | WEBCLIENT_CONF_MAX_URLLEN 100
#define | UIP_APPCALL webclient_appcall

Typedefs

typedef struct webclient_state | uip_tcp_appstate_t

Functions

char * | webclient_mimetype (void)
char * | webclient_filename (void)
char * | webclient_hostname (void)
unsigned short | webclient_port (void)
void | webclient_init (void)
void | webclient_close (void)
unsigned char | webclient_get (char *host, u16_t port, char *file)
void | webclient_appcall (void)
void | webclient_datahandler (char *data, u16_t len)
void | webclient_connected (void)
void | webclient_timedout (void)
void | webclient_aborted (void)
void | webclient_closed (void)

Detailed Description

This example shows a HTTP client that is able to download web pages and files from web servers. It requires a number of callback functions to be implemented by the module that utilizes the code: webclient_datahandler(), webclient_connected(), webclient_timedout(), webclient_aborted(), webclient_closed().

Define Documentation

#define HTTPFLAG_ERROR 3

Definition at line 78 of file webclient.c.

#define HTTPFLAG_MOVED 2

Definition at line 77 of file webclient.c.

#define HTTPFLAG_NONE 0

Definition at line 75 of file webclient.c.

#define HTTPFLAG_OK 1

Definition at line 76 of file webclient.c.

#define ISO_cr 0x0d

Definition at line 82 of file webclient.c.

#define ISO_nl 0x0a

Definition at line 81 of file webclient.c.

#define ISO_space 0x20

Definition at line 83 of file webclient.c.

#define UIP_APPCALL webclient_appcall

Definition at line 73 of file webclient.h.

#define WEBCLIENT_CONF_MAX_URLLEN 100

Definition at line 53 of file webclient.h.

#define WEBCLIENT_STATE_CLOSE 3

Definition at line 73 of file webclient.c.

#define WEBCLIENT_STATE_DATA 2

Definition at line 72 of file webclient.c.

#define WEBCLIENT_STATE_HEADERS 1

Definition at line 71 of file webclient.c.

#define WEBCLIENT_STATE_STATUSLINE 0

Definition at line 70 of file webclient.c.

#define WEBCLIENT_TIMEOUT 100

Definition at line 68 of file webclient.c.

Typedef Documentation

typedef struct webclient_state uip_tcp_appstate_t

Definition at line 72 of file webclient.h.

Function Documentation

void webclient_aborted ( void )

Callback function that is called from the webclient code if the HTTP connection to the web server has been aborted by the web server.

This function must be implemented by the module that uses the webclient code.

void webclient_appcall ( void )

Definition at line 381 of file webclient.c.

void webclient_close ( void )

Close the currently open HTTP connection.

Definition at line 137 of file webclient.c.

void webclient_closed ( void )

Callback function that is called from the webclient code when the HTTP connection to the web server has been closed.

This function must be implemented by the module that uses the webclient code.

void webclient_connected ( void )

Callback function that is called from the webclient code when the HTTP connection has been connected to the web server.

This function must be implemented by the module that uses the webclient code.

void webclient_datahandler | ( | char * | data,
 |  | u16_t | len
 | ) |  |

Callback function that is called from the webclient code when HTTP data has been received.

This function must be implemented by the module that uses the webclient code. The function is called from the webclient module when HTTP data has been received. The function is not called when HTTP headers are received, only for the actual data.

Note:
This function is called many times, repetedly, when data is being received, and not once when all data has been received.
Parameters:
data | A pointer to the data that has been received.
len | The length of the data that has been received.
char * webclient_filename ( void )

Obtain the filename of the current HTTP data stream.

The filename of an HTTP request may be changed by the web server, and may therefore not be the same as when the original GET request was made with webclient_get(). This function is used for obtaining the current filename.

Returns:
A pointer to the current filename.

Definition at line 96 of file webclient.c.

unsigned char webclient_get | ( | char * | host,
 |  | u16_t | port,
 |  | char * | file
 | ) |  |

Open an HTTP connection to a web server and ask for a file using the GET method.

This function opens an HTTP connection to the specified web server and requests the specified file using the GET method. When the HTTP connection has been connected, the webclient_connected() callback function is called and when the HTTP data arrives the webclient_datahandler() callback function is called.

The callback function webclient_timedout() is called if the web server could not be contacted, and the webclient_aborted() callback function is called if the HTTP connection is aborted by the web server.

When the HTTP request has been completed and the HTTP connection is closed, the webclient_closed() callback function will be called.

Note:
If the function is passed a host name, it must already be in the resolver cache in order for the function to connect to the web server. It is therefore up to the calling module to implement the resolver calls and the signal handler used for reporting a resolv query answer.
Parameters:
host | A pointer to a string containing either a host name or a numerical IP address in dotted decimal notation (e.g., 192.168.23.1).
port | The port number to which to connect, in host byte order.
file | A pointer to the name of the file to get.
Return values:
0 | if the host name could not be found in the cache, or if a TCP connection could not be created.
1 | if the connection was initiated.

Definition at line 143 of file webclient.c.

char * webclient_hostname ( void )

Obtain the hostname of the current HTTP data stream.

The hostname of the web server of an HTTP request may be changed by the web server, and may therefore not be the same as when the original GET request was made with webclient_get(). This function is used for obtaining the current hostname.

Returns:
A pointer to the current hostname.

Definition at line 102 of file webclient.c.

void webclient_init ( void )

Initialize the webclient module.

Definition at line 114 of file webclient.c.

char * webclient_mimetype ( void )

Obtain the MIME type of the current HTTP data stream.

Returns:
A pointer to a string contaning the MIME type. The string may be empty if no MIME type was reported by the web server.

Definition at line 90 of file webclient.c.

unsigned short webclient_port ( void )

Obtain the port number of the current HTTP data stream.

The port number of an HTTP request may be changed by the web server, and may therefore not be the same as when the original GET request was made with webclient_get(). This function is used for obtaining the current port number.

Returns:
The port number of the current HTTP data stream, in host byte order.

Definition at line 108 of file webclient.c.

void webclient_timedout ( void )

Callback function that is called from the webclient code if the HTTP connection to the web server has timed out.

This function must be implemented by the module that uses the webclient code.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Web server

Data Structures | Files | Defines | Functions
Web server
Apps

Data Structures

struct | httpd_cgi_call

Files

file | httpd-cgi.c
file | httpd-cgi.h
file | httpd.c

Defines

#define | HTTPD_CGI_CALL(name, str, function)
HTTPD CGI function declaration.
#define | STATE_WAITING 0
#define | STATE_OUTPUT 1
#define | ISO_nl 0x0a
#define | ISO_space 0x20
#define | ISO_bang 0x21
#define | ISO_percent 0x25
#define | ISO_period 0x2e
#define | ISO_slash 0x2f
#define | ISO_colon 0x3a

Functions

HTTPD_CGI_CALL (file,"file-stats", file_stats)
HTTPD_CGI_CALL (tcp,"tcp-connections", tcp_stats)
HTTPD_CGI_CALL (net,"net-stats", net_stats)
typedef | PT_THREAD ((*httpd_cgifunction)(struct httpd_state *, char *))
httpd_cgifunction | httpd_cgi (char *name)
void | httpd_cgi_init (void)

Detailed Description

The uIP web server is a very simplistic implementation of an HTTP server. It can serve web pages and files from a read-only ROM filesystem, and provides a very small scripting language.

Define Documentation

#define HTTPD_CGI_CALL | ( | name,
 |  | str,
 |  | function
 | ) |

HTTPD CGI function declaration.

Parameters:
name | The C variable name of the function
str | The string name of the function, used in the script file
function | A pointer to the function that implements it

This macro is used for declaring a HTTPD CGI function. This function is then added to the list of HTTPD CGI functions with the httpd_cgi_add() function.

Definition at line 77 of file httpd-cgi.h.

#define ISO_bang 0x21

Definition at line 74 of file httpd.c.

#define ISO_colon 0x3a

Definition at line 78 of file httpd.c.

#define ISO_nl 0x0a

Definition at line 72 of file httpd.c.

#define ISO_percent 0x25

Definition at line 75 of file httpd.c.

#define ISO_period 0x2e

Definition at line 76 of file httpd.c.

#define ISO_slash 0x2f

Definition at line 77 of file httpd.c.

#define ISO_space 0x20

Definition at line 73 of file httpd.c.

#define STATE_OUTPUT 1

Definition at line 70 of file httpd.c.

#define STATE_WAITING 0

Definition at line 69 of file httpd.c.

Function Documentation

httpd_cgifunction httpd_cgi ( char * name )
HTTPD_CGI_CALL | ( | tcp | ,
 |  | "tcp-connections" | ,
 |  | tcp_stats |
 | ) |  |
HTTPD_CGI_CALL | ( | file | ,
 |  | "file-stats" | ,
 |  | file_stats |
 | ) |  |
HTTPD_CGI_CALL | ( | net | ,
 |  | "net-stats" | ,
 |  | net_stats |
 | ) |  |
void httpd_cgi_init ( void )
typedef PT_THREAD ( (*)(struct httpd_state *, char *) httpd_cgifunction )
Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Pt

Data Structures | Modules | Files | Defines
Pt
uIP

Data Structures

struct | pt

Modules

Local continuations

Files

file | pt.h

Defines

#define | PT_WAITING 0
#define | PT_EXITED 1
#define | PT_ENDED 2
#define | PT_YIELDED 3

Initialization

#define | PT_INIT(pt)

Declaration and definition

#define | PT_THREAD(name_args)
#define | PT_BEGIN(pt)
#define | PT_END(pt)

Blocked wait

#define | PT_WAIT_UNTIL(pt, condition)
#define | PT_WAIT_WHILE(pt, cond)

Hierarchical protothreads

#define | PT_WAIT_THREAD(pt, thread)
#define | PT_SPAWN(pt, child, thread)

Exiting and restarting

#define | PT_RESTART(pt)
#define | PT_EXIT(pt)

Calling a protothread

#define | PT_SCHEDULE(f)

Yielding from a protothread

#define | PT_YIELD(pt)
#define | PT_YIELD_UNTIL(pt, cond)
Yield from the protothread until a condition occurs.

Define Documentation

#define PT_BEGIN ( pt )

Declare the start of a protothread inside the C function implementing the protothread.

This macro is used to declare the starting point of a protothread. It should be placed at the start of the function in which the protothread runs. All C statements above the PT_BEGIN() invokation will be executed each time the protothread is scheduled.

Parameters:
pt A pointer to the protothread control structure.

Definition at line 115 of file pt.h.

#define PT_END ( pt )

Declare the end of a protothread.

This macro is used for declaring that a protothread ends. It must always be used together with a matching PT_BEGIN() macro.

Parameters:
pt A pointer to the protothread control structure.

Definition at line 127 of file pt.h.

#define PT_ENDED 2

Definition at line 60 of file pt.h.

#define PT_EXIT ( pt )

Exit the protothread.

This macro causes the protothread to exit. If the protothread was spawned by another protothread, the parent protothread will become unblocked and can continue to run.

Parameters:
pt A pointer to the protothread control structure.

Definition at line 246 of file pt.h.

#define PT_EXITED 1

Definition at line 59 of file pt.h.

#define PT_INIT ( pt )

Initialize a protothread.

Initializes a protothread. Initialization must be done prior to starting to execute the protothread.

Parameters:
pt A pointer to the protothread control structure.
See also:
PT_SPAWN()

Definition at line 80 of file pt.h.

#define PT_RESTART ( pt )

Restart the protothread.

This macro will block and cause the running protothread to restart its execution at the place of the PT_BEGIN() call.

Parameters:
pt A pointer to the protothread control structure.

Definition at line 229 of file pt.h.

#define PT_SCHEDULE ( f )

Schedule a protothread.

This function shedules a protothread. The return value of the function is non-zero if the protothread is running or zero if the protothread has exited.

Parameters:
f The call to the C function implementing the protothread to be scheduled

Definition at line 271 of file pt.h.

#define PT_SPAWN | ( | pt,
 |  | child,
 |  | thread
 | ) |

Spawn a child protothread and wait until it exits.

This macro spawns a child protothread and waits until it exits. The macro can only be used within a protothread.

Parameters:
pt | A pointer to the protothread control structure.
child | A pointer to the child protothread's control structure.
thread | The child protothread with arguments

Definition at line 206 of file pt.h.

#define PT_THREAD ( name_args )

Declaration of a protothread.

This macro is used to declare a protothread. All protothreads must be declared with this macro.

Parameters:
name_args The name and arguments of the C function implementing the protothread.

Definition at line 100 of file pt.h.

#define PT_WAIT_THREAD | ( | pt,
 |  | thread
 | ) |

Block and wait until a child protothread completes.

This macro schedules a child protothread. The current protothread will block until the child protothread completes.

Note:
The child protothread must be manually initialized with the PT_INIT() function before this function is used.
Parameters:
pt | A pointer to the protothread control structure.
thread | The child protothread with arguments
See also:
PT_SPAWN()

Definition at line 192 of file pt.h.

#define PT_WAIT_UNTIL | ( | pt,
 |  | condition
 | ) |

Block and wait until condition is true.

This macro blocks the protothread until the specified condition is true.

Parameters:
pt | A pointer to the protothread control structure.
condition | The condition.

Definition at line 148 of file pt.h.

#define PT_WAIT_WHILE | ( | pt,
 |  | cond
 | ) |

Block and wait while condition is true.

This function blocks and waits while condition is true. See PT_WAIT_UNTIL().

Parameters:
pt | A pointer to the protothread control structure.
cond | The condition.

Definition at line 167 of file pt.h.

#define PT_WAITING 0

Definition at line 58 of file pt.h.

#define PT_YIELD ( pt )

Yield from the current protothread.

This function will yield the protothread, thereby allowing other processing to take place in the system.

Parameters:
pt A pointer to the protothread control structure.

Definition at line 290 of file pt.h.

#define PT_YIELD_UNTIL | ( | pt,
 |  | cond
 | ) |

Yield from the protothread until a condition occurs.

Parameters:
pt | A pointer to the protothread control structure.
cond | The condition.

This function will yield the protothread, until the specified condition evaluates to true.

Definition at line 310 of file pt.h.

#define PT_YIELDED 3

Definition at line 61 of file pt.h.

Generated on Mon Nov 28 2011 11:15:29 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Local continuations

Files | Defines | Typedefs
Local continuations
Pt

Files

file | lc-addrlabels.h
file | lc-switch.h
file | lc.h

Defines

#define | LC_INIT(s) s = NULL
#define | LC_RESUME(s)
#define | LC_SET(s) do { ({ __label__ resume; resume: (s) = &&resume; }); }while(0)
#define | LC_END(s)
#define | __LC_SWTICH_H__
#define | LC_INIT(s) s = 0;
#define | LC_RESUME(s) switch(s) { case 0:
#define | LC_SET(s) s = __LINE__; case __LINE__:
#define | LC_END(s) }
#define | __LC_H__

Typedefs

typedef void * | lc_t
typedef unsigned short | lc_t

Detailed Description

Local continuations form the basis for implementing protothreads. A local continuation can be set in a specific function to capture the state of the function. After a local continuation has been set can be resumed in order to restore the state of the function at the point where the local continuation was set.

Define Documentation

#define __LC_H__

Definition at line 124 of file lc.h.

#define __LC_SWTICH_H__

Definition at line 58 of file lc-switch.h.

#define LC_END ( s ) }

Definition at line 72 of file lc-switch.h.

#define LC_END ( s )

Definition at line 79 of file lc-addrlabels.h.

#define LC_INIT ( s ) s = NULL

Definition at line 66 of file lc-addrlabels.h.

#define LC_INIT ( s ) s = 0;

Definition at line 66 of file lc-switch.h.

#define LC_RESUME ( s )
Value:
do {                                          \
    if(s != NULL) {                             \
      goto *s;                                  \
    }                                           \
  } while(0)

Definition at line 69 of file lc-addrlabels.h.

#define LC_RESUME ( s ) switch(s) { case 0:

Definition at line 68 of file lc-switch.h.

#define LC_SET ( s ) do { ({ __label__ resume; resume: (s) = &&resume; }); }while(0)

Definition at line 76 of file lc-addrlabels.h.

#define LC_SET ( s ) s = __LINE__; case __LINE__:

Definition at line 70 of file lc-switch.h.

Typedef Documentation

typedef void* lc_t

Definition at line 64 of file lc-addrlabels.h.

typedef unsigned short lc_t

Definition at line 64 of file lc-switch.h.

Generated on Mon Nov 28 2011 11:15:20 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPDMA

Modules
GPDMA
LPC1700CMSIS Examples

Modules

Flash_2_Ram_Test
GPDMA_Sleep
Link_list
Ram_2_Ram_Test
Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Flash_2_Ram_Test

Defines | Functions | Variables
Flash_2_Ram_Test
GPDMA

Defines

#define | DMA_SIZE 16

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | err_menu [] = "Buffer Check fail!"
uint8_t | compl_menu [] = "Buffer Check success!"
const uint32_t | DMASrc_Buffer [DMA_SIZE]
uint32_t | DMADest_Buffer [DMA_SIZE]
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err

Define Documentation

#define DMA_SIZE 16

DMA transfer size

Definition at line 38 of file flash_2_ram.c.

Function Documentation

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
Parameters:
[in] none
Returns:
TRUE: if two buffers are similar FALSE: if two buffers are different

Definition at line 120 of file flash_2_ram.c.

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 157 of file flash_2_ram.c.

void DMA_IRQHandler ( void )

GPDMA interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None
int main ( void )

Definition at line 234 of file flash_2_ram.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

__IO uint32_t Channel0_Err

Definition at line 70 of file flash_2_ram.c.

__IO uint32_t Channel0_TC

Definition at line 67 of file flash_2_ram.c.

uint8_t compl_menu[] = "Buffer Check success!"

Definition at line 53 of file flash_2_ram.c.

uint32_t DMADest_Buffer[DMA_SIZE]

Definition at line 64 of file flash_2_ram.c.

const uint32_t DMASrc_Buffer[DMA_SIZE]
Initial value:
{
        0x01020304,0x05060708,0x090A0B0C,0x0D0E0F10,
        0x11121314,0x15161718,0x191A1B1C,0x1D1E1F20,
        0x21222324,0x25262728,0x292A2B2C,0x2D2E2F30,
        0x31323334,0x35363738,0x393A3B3C,0x3D3E3F40
}

Definition at line 56 of file flash_2_ram.c.

uint8_t err_menu[] = "Buffer Check fail!"

Definition at line 52 of file flash_2_ram.c.

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 41 of file flash_2_ram.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 51 of file flash_2_ram.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPDMA_Sleep

Defines | Functions | Variables
GPDMA_Sleep
GPDMA

Defines

#define | DMA_SIZE 0x100UL
#define | DMA_SRC LPC_AHBRAM1_BASE
#define | DMA_DST (DMA_SRC+DMA_SIZE)

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | err_menu [] = "Buffer Check fail!"
uint8_t | compl_menu [] = "Buffer Check success!"
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err

Define Documentation

#define DMA_DST (DMA_SRC+DMA_SIZE)

DMA Source Address is (AHBRAM1_BASE + DMA_SIZE) that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 49 of file gpdma_sleep.c.

#define DMA_SIZE 0x100UL

DMA transfer size

Definition at line 39 of file gpdma_sleep.c.

#define DMA_SRC LPC_AHBRAM1_BASE

DMA Source Address is AHBRAM1_BASE that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 44 of file gpdma_sleep.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file gpdma_sleep.c.

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None

Definition at line 141 of file gpdma_sleep.c.

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 178 of file gpdma_sleep.c.

void DMA_IRQHandler ( void )

GPDMA interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None
void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error)

Parameters:
[in] none
Returns:
None
int main ( void )

Definition at line 262 of file gpdma_sleep.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

__IO uint32_t Channel0_Err

Definition at line 72 of file gpdma_sleep.c.

__IO uint32_t Channel0_TC

Definition at line 69 of file gpdma_sleep.c.

uint8_t compl_menu[] = "Buffer Check success!"

Definition at line 66 of file gpdma_sleep.c.

uint8_t err_menu[] = "Buffer Check fail!"

Definition at line 65 of file gpdma_sleep.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 53 of file gpdma_sleep.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 64 of file gpdma_sleep.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Link_list

Defines | Functions | Variables
Link_list
GPDMA

Defines

#define | DMA_SIZE 32

Functions

uint32_t DMASrc_Buffer1[DMA_SIZE/2] | __attribute__ ((at(0x2007C000)))
uint32_t DMASrc_Buffer2[DMA_SIZE/2] | __attribute__ ((at(0x2007C200)))
void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | err_menu [] = "Buffer Check fail!\n\r"
uint8_t | compl_menu [] = "Buffer Check success!\n\r"
uint32_t | DMADest_Buffer [DMA_SIZE]
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err

Define Documentation

#define DMA_SIZE 32

DMA transfer size

Definition at line 37 of file link_list.c.

Function Documentation

uint32_t DMASrc_Buffer1 [DMA_SIZE/2] __attribute__ ( (at(0x2007C000)) )
uint32_t DMASrc_Buffer2 [DMA_SIZE/2] __attribute__ ( (at(0x2007C200)) )
void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None

Definition at line 134 of file link_list.c.

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 180 of file link_list.c.

void DMA_IRQHandler ( void )

GPDMA interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None
void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error)

Parameters:
[in] none
Returns:
None
int main ( void )

Definition at line 278 of file link_list.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

__IO uint32_t Channel0_Err

Definition at line 72 of file link_list.c.

__IO uint32_t Channel0_TC

Definition at line 69 of file link_list.c.

uint8_t compl_menu[] = "Buffer Check success!\n\r"

Definition at line 51 of file link_list.c.

uint32_t DMADest_Buffer[DMA_SIZE]

Definition at line 53 of file link_list.c.

uint8_t err_menu[] = "Buffer Check fail!\n\r"

Definition at line 50 of file link_list.c.

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 40 of file link_list.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 49 of file link_list.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Ram_2_Ram_Test

Defines | Functions | Variables
Ram_2_Ram_Test
GPDMA

Defines

#define | DMA_SIZE 0x100UL
#define | DMA_SRC LPC_AHBRAM1_BASE
#define | DMA_DST (DMA_SRC+DMA_SIZE)

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | err_menu [] = "Buffer Check fail!"
uint8_t | compl_menu [] = "Buffer Check success!"
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err

Define Documentation

#define DMA_DST (DMA_SRC+DMA_SIZE)

DMA Source Address is (AHBRAM1_BASE + DMA_SIZE) that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 48 of file gpdma_r2r_test.c.

#define DMA_SIZE 0x100UL

DMA transfer size

Definition at line 38 of file gpdma_r2r_test.c.

#define DMA_SRC LPC_AHBRAM1_BASE

DMA Source Address is AHBRAM1_BASE that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 43 of file gpdma_r2r_test.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file gpdma_sleep.c.

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None

Definition at line 139 of file gpdma_r2r_test.c.

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 176 of file gpdma_r2r_test.c.

void DMA_IRQHandler ( void )

GPDMA interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None
void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error)

Parameters:
[in] none
Returns:
None
int main ( void )

Definition at line 257 of file gpdma_r2r_test.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

__IO uint32_t Channel0_Err

Definition at line 70 of file gpdma_r2r_test.c.

__IO uint32_t Channel0_TC

Definition at line 67 of file gpdma_r2r_test.c.

uint8_t compl_menu[] = "Buffer Check success!"

Definition at line 64 of file gpdma_r2r_test.c.

uint8_t err_menu[] = "Buffer Check fail!"

Definition at line 63 of file gpdma_r2r_test.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 52 of file gpdma_r2r_test.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 62 of file gpdma_r2r_test.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPIO

Modules
GPIO
LPC1700CMSIS Examples

Modules

GPIO_Interrupt
LedBlinky
Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPIO_Interrupt

Defines | Functions
GPIO_Interrupt
GPIO

Defines

#define | MCB_LPC_1768

Functions

void | EINT3_IRQHandler (void)
External interrupt 3 handler sub-routine.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Define Documentation

#define MCB_LPC_1768

Definition at line 37 of file gpio_int.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Use: LEDs for polling when idle and when GPIO interrupt occurs If using MCB1700 board: Polling led: P1.28; Interrupt led: P1.29 If using IAR KS board: Polling led: P1.25 (LED1); Interrupt led: P0.4 (LED2)

Definition at line 112 of file gpio_int.c.

void EINT3_IRQHandler ( void )

External interrupt 3 handler sub-routine.

Parameters:
[in] None
Returns:
None
int main ( void )

Definition at line 155 of file gpio_int.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LedBlinky

Defines | Functions | Variables
LedBlinky
GPIO

Defines

#define | MCB_LPC_1768

Functions

void | SysTick_Handler (void)
SysTick handler sub-routine (1ms)
void | Delay (unsigned long tick)
Delay function.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

volatile unsigned long | SysTickCnt

Define Documentation

#define MCB_LPC_1768

Definition at line 36 of file LedBlinky.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 83 of file LedBlinky.c.

void Delay ( unsigned long tick )

Delay function.

Parameters:
[in] tick - number milisecond of delay time
Returns:
None

Definition at line 70 of file LedBlinky.c.

int main ( void )

Definition at line 136 of file LedBlinky.c.

void SysTick_Handler ( void )

SysTick handler sub-routine (1ms)

Parameters:
[in] None
Returns:
None

Definition at line 1006 of file tcpip.c.

Variable Documentation

volatile unsigned long SysTickCnt

Definition at line 47 of file LedBlinky.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2C

Modules
I2C
LPC1700CMSIS Examples

Modules

master
Master_Slave_Interrupt
Monitor
pca8581_polling
sc16is750_int
sc16is750_polling
slave
Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: master

Defines | Functions | Variables
master
I2C

Defines

#define | USEDI2CDEV_M 0
#define | I2CDEV_S_ADDR (0x90>>1)
#define | BUFFER_SIZE 0x10
#define | I2CDEV_M LPC_I2C0

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | Master_Buf [BUFFER_SIZE]
uint8_t | master_test [2]

Define Documentation

#define BUFFER_SIZE 0x10

Max buffer length

Definition at line 43 of file master.c.

#define I2CDEV_M LPC_I2C0

Definition at line 46 of file master.c.

#define I2CDEV_S_ADDR (0x90>>1)

Own Slave address in Slave I2C device

Definition at line 40 of file master.c.

#define USEDI2CDEV_M 0

Used I2C device as slave definition

Definition at line 38 of file master.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 118 of file master.c.

int main ( void )

Definition at line 255 of file master.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t Master_Buf[BUFFER_SIZE]

These global variables below used in interrupt mode - Slave device ----------------

Definition at line 66 of file master.c.

uint8_t master_test[2]

Definition at line 67 of file master.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 54 of file master.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Master_Slave_Interrupt

Defines | Functions | Variables
Master_Slave_Interrupt
I2C

Defines

#define | USEDI2CDEV_M 2
#define | USEDI2CDEV_S 0
#define | I2CDEV_S_OWN_ADDR (0x90>>1)
#define | BUFFER_SIZE 0x10
#define | I2CDEV_M LPC_I2C2
#define | I2CDEV_S LPC_I2C0

Functions

void | I2C2_IRQHandler (void)
Main I2C2 interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Error_Loop_M (uint8_t ErrorCode)
A subroutine that will be called if there's any error on I2C operation (master)
void | Error_Loop_S (uint8_t ErrorCode)
A subroutine that will be called if there's any error on I2C operation (slave)
void | Buffer_Init (uint8_t type)
Initialize buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
__IO FlagStatus | complete_M
uint8_t | Master_Buf [BUFFER_SIZE]
__IO FlagStatus | complete_S
uint8_t | Slave_Buf [BUFFER_SIZE]
uint8_t | master_test [2]
uint8_t | slave_test [2]

Define Documentation

#define BUFFER_SIZE 0x10

Max buffer length

Definition at line 47 of file i2c_master_slave_int_test.c.

#define I2CDEV_M LPC_I2C2

Definition at line 57 of file i2c_master_slave_int_test.c.

#define I2CDEV_S LPC_I2C0

Definition at line 64 of file i2c_master_slave_int_test.c.

#define I2CDEV_S_OWN_ADDR (0x90>>1)

Own Slave address in Slave I2C device

Definition at line 44 of file i2c_master_slave_int_test.c.

#define USEDI2CDEV_M 2

Used I2C device as master definition

Definition at line 39 of file i2c_master_slave_int_test.c.

#define USEDI2CDEV_S 0

Used I2C device as slave definition

Definition at line 42 of file i2c_master_slave_int_test.c.

Function Documentation

void Buffer_Init ( uint8_t type )

Initialize buffer.

Parameters:
[in] type,:
  • 0: Initialize Master_Buf with increment value from 0 Fill all member in Slave_Buf with 0
  • 1: Initialize Slave_Buf with increment value from 0 Fill all member in Master_Buf with 0
Returns:
None

Definition at line 183 of file i2c_master_slave_int_test.c.

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 237 of file i2c_master_slave_int_test.c.

void Error_Loop_M ( uint8_t ErrorCode )

A subroutine that will be called if there's any error on I2C operation (master)

Parameters:
[in] ErrorCode Error Code Input
Returns:
None

Definition at line 209 of file i2c_master_slave_int_test.c.

void Error_Loop_S ( uint8_t ErrorCode )

A subroutine that will be called if there's any error on I2C operation (slave)

Parameters:
[in] ErrorCode Error Code Input
Returns:
None

Definition at line 223 of file i2c_master_slave_int_test.c.

void I2C2_IRQHandler ( void )

Main I2C2 interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

Definition at line 145 of file i2c_master_slave_int_test.c.

int main ( void )

Definition at line 488 of file i2c_master_slave_int_test.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

__IO FlagStatus complete_M

These global variables below used in interrupt mode - Master device -----------

Definition at line 86 of file i2c_master_slave_int_test.c.

__IO FlagStatus complete_S

These global variables below used in interrupt mode - Slave device ------------

Definition at line 91 of file i2c_master_slave_int_test.c.

uint8_t Master_Buf[BUFFER_SIZE]

Definition at line 87 of file i2c_master_slave_int_test.c.

uint8_t master_test[2]

Definition at line 95 of file i2c_master_slave_int_test.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 72 of file i2c_master_slave_int_test.c.

uint8_t Slave_Buf[BUFFER_SIZE]

Definition at line 92 of file i2c_master_slave_int_test.c.

uint8_t slave_test[2]

Definition at line 96 of file i2c_master_slave_int_test.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Monitor

Defines | Functions | Variables
Monitor
I2C

Defines

#define | I2CDEV LPC_I2C0
#define | BUFFER_SIZE 0x80

Functions

void | I2C0_IRQHandler (void)
Main I2C0 interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | buffer [BUFFER_SIZE]
BOOL_8 | done = FALSE
uint32_t | count = 0

Define Documentation

#define BUFFER_SIZE 0x80

Max buffer length

Definition at line 41 of file i2c_monitor.c.

#define I2CDEV LPC_I2C0

Definition at line 38 of file i2c_monitor.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 95 of file i2c_monitor.c.

void I2C0_IRQHandler ( void )

Main I2C0 interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None
int main ( void )

Definition at line 209 of file i2c_monitor.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t buffer[BUFFER_SIZE]

Definition at line 55 of file i2c_monitor.c.

uint32_t count = 0

Definition at line 57 of file i2c_monitor.c.

BOOL_8 done = FALSE

Definition at line 56 of file i2c_monitor.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 43 of file i2c_monitor.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: pca8581_polling

Defines | Functions | Variables
pca8581_polling
I2C

Defines

#define | USEDI2CDEV 0
#define | PCA8581_SLVADDR (0xA0>>1)
#define | I2CDEV LPC_I2C0

Functions

int32_t | PCA8581_Write (void)
Write a number of data byte into EEPROM PCA8581.
int32_t | PCA8581_Read (void)
Read a number of data byte from EEPROM PCA8581.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | pca8581_wrdat []
uint8_t | pca8581_rddat []
I2C_M_SETUP_Type txsetup
I2C_M_SETUP_Type rxsetup

Define Documentation

#define I2CDEV LPC_I2C0

Definition at line 46 of file pca8581_test.c.

#define PCA8581_SLVADDR (0xA0>>1)

Definition at line 43 of file pca8581_test.c.

#define USEDI2CDEV 0

Used I2C device definition, should be 0 or 2

Definition at line 39 of file pca8581_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 180 of file pca8581_test.c.

int main ( void )

Definition at line 267 of file pca8581_test.c.

int32_t PCA8581_Read ( void )

Read a number of data byte from EEPROM PCA8581.

Parameters:
[in] None
Returns:
0: if success, otherwise (-1) returned.

Definition at line 132 of file pca8581_test.c.

int32_t PCA8581_Write ( void )

Write a number of data byte into EEPROM PCA8581.

Parameters:
[in] None
Returns:
0: if success, otherwise (-1) returned.

Definition at line 111 of file pca8581_test.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 55 of file pca8581_test.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 65 of file pca8581_test.c.

uint8_t pca8581_rddat[]
Initial value:
 {

                0x00,
                0x00,
                0x00,
                0x00,
                0x00,
                0x00,
                0x00,
                0x00,
}

Definition at line 81 of file pca8581_test.c.

uint8_t pca8581_wrdat[]
Initial value:
 {
                (0x01<<3),

                0x00,
                0x11,
                0x22,
                0x33,
                0x44,
                0x55,
                0x66,
                0x77,
}

Definition at line 68 of file pca8581_test.c.

I2C_M_SETUP_Type rxsetup

Definition at line 97 of file pca8581_test.c.

I2C_M_SETUP_Type txsetup

Definition at line 95 of file pca8581_test.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: sc16is750_int

Defines | Functions | Variables
sc16is750_int
I2C

Defines

#define | USEDI2CDEV 0
#define | IODIR 0x0A
#define | IOSTATE 0x0B
#define | IOCON 0x0E
#define | SLVADDR (0x90>>1)
#define | REGS_ADDR(n) (n<<3)
#define | I2CDEV LPC_I2C0

Functions

void | I2C0_IRQHandler (void)
Main I2C0 interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Error_Loop (uint8_t ErrorCode)
A subroutine that will be called if there's any error on I2C operation.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | iocon_cfg [2] = {REGS_ADDR(IOCON), 0x00}
uint8_t | iodir_cfg [2] = {REGS_ADDR(IODIR), 0xFF}
uint8_t | iostate_cfg_0 [2] = {REGS_ADDR(IOSTATE), 0x00}
uint8_t | iostate_cfg_1 [2] = {REGS_ADDR(IOSTATE), 0xFF}
__IO FlagStatus | complete

Define Documentation

#define I2CDEV LPC_I2C0

Definition at line 51 of file i2c_interrupt_test.c.

#define IOCON 0x0E

Definition at line 45 of file i2c_interrupt_test.c.

#define IODIR 0x0A

Definition at line 43 of file i2c_interrupt_test.c.

#define IOSTATE 0x0B

Definition at line 44 of file i2c_interrupt_test.c.

#define REGS_ADDR ( n ) (n<<3)

Definition at line 47 of file i2c_interrupt_test.c.

#define SLVADDR (0x90>>1)

Definition at line 46 of file i2c_interrupt_test.c.

#define USEDI2CDEV 0

Used I2C device definition, should be 0 or 2

Definition at line 40 of file i2c_interrupt_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 153 of file i2c_interrupt_test.c.

void Error_Loop ( uint8_t ErrorCode )

A subroutine that will be called if there's any error on I2C operation.

Parameters:
[in] ErrorCode Error Code Input
Returns:
None

Definition at line 138 of file i2c_interrupt_test.c.

void I2C0_IRQHandler ( void )

Main I2C0 interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None
int main ( void )

Definition at line 355 of file i2c_interrupt_test.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

__IO FlagStatus complete

Definition at line 78 of file i2c_interrupt_test.c.

uint8_t iocon_cfg[2] = {REGS_ADDR(IOCON), 0x00}

Definition at line 73 of file i2c_interrupt_test.c.

uint8_t iodir_cfg[2] = {REGS_ADDR(IODIR), 0xFF}

Definition at line 74 of file i2c_interrupt_test.c.

uint8_t iostate_cfg_0[2] = {REGS_ADDR(IOSTATE), 0x00}

Definition at line 75 of file i2c_interrupt_test.c.

uint8_t iostate_cfg_1[2] = {REGS_ADDR(IOSTATE), 0xFF}

Definition at line 76 of file i2c_interrupt_test.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 59 of file i2c_interrupt_test.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 70 of file i2c_interrupt_test.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: sc16is750_polling

Defines | Functions | Variables
sc16is750_polling
I2C

Defines

#define | USEDI2CDEV 0
#define | IODIR 0x0A
#define | IOSTATE 0x0B
#define | IOCON 0x0E
#define | SLVADDR (0x90>>1)
#define | REGS_ADDR(n) (n<<3)
#define | I2CDEV LPC_I2C0

Functions

void | print_menu (void)
Print Welcome menu.
void | Error_Loop (uint32_t ErrorCode)
A subroutine that will be called if there's any error on I2C operation.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | iocon_cfg [2] = {REGS_ADDR(IOCON), 0x00}
uint8_t | iodir_cfg [2] = {REGS_ADDR(IODIR), 0xFF}
uint8_t | iostate_cfg_0 [2] = {REGS_ADDR(IOSTATE), 0x00}
uint8_t | iostate_cfg_1 [2] = {REGS_ADDR(IOSTATE), 0xFF}

Define Documentation

#define I2CDEV LPC_I2C0

Definition at line 50 of file i2c_polling_test.c.

#define IOCON 0x0E

Definition at line 45 of file i2c_polling_test.c.

#define IODIR 0x0A

Definition at line 43 of file i2c_polling_test.c.

#define IOSTATE 0x0B

Definition at line 44 of file i2c_polling_test.c.

#define REGS_ADDR ( n ) (n<<3)

Definition at line 47 of file i2c_polling_test.c.

#define SLVADDR (0x90>>1)

Definition at line 46 of file i2c_polling_test.c.

#define USEDI2CDEV 0

Used I2C device definition, should be 0 or 2

Definition at line 40 of file i2c_polling_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 116 of file i2c_polling_test.c.

void Error_Loop ( uint32_t ErrorCode )

A subroutine that will be called if there's any error on I2C operation.

Parameters:
[in] ErrorCode Error Code Input
Returns:
None
int main ( void )

Definition at line 300 of file i2c_polling_test.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t iocon_cfg[2] = {REGS_ADDR(IOCON), 0x00}

Definition at line 73 of file i2c_polling_test.c.

uint8_t iodir_cfg[2] = {REGS_ADDR(IODIR), 0xFF}

Definition at line 74 of file i2c_polling_test.c.

uint8_t iostate_cfg_0[2] = {REGS_ADDR(IOSTATE), 0x00}

Definition at line 75 of file i2c_polling_test.c.

uint8_t iostate_cfg_1[2] = {REGS_ADDR(IOSTATE), 0xFF}

Definition at line 76 of file i2c_polling_test.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 58 of file i2c_polling_test.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 70 of file i2c_polling_test.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: slave

Defines | Functions | Variables
slave
I2C

Defines

#define | USEDI2CDEV_S 0
#define | I2CDEV_S_OWN_ADDR (0x90>>1)
#define | BUFFER_SIZE 0x10
#define | I2CDEV_S LPC_I2C0

Functions

void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (uint8_t type)
Initialize buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | Slave_Buf [BUFFER_SIZE]
uint8_t | slave_test [2]

Define Documentation

#define BUFFER_SIZE 0x10

Max buffer length

Definition at line 43 of file slave.c.

#define I2CDEV_S LPC_I2C0

Definition at line 46 of file slave.c.

#define I2CDEV_S_OWN_ADDR (0x90>>1)

Own Slave address in Slave I2C device

Definition at line 40 of file slave.c.

#define USEDI2CDEV_S 0

Used I2C device as slave definition

Definition at line 38 of file slave.c.

Function Documentation

void Buffer_Init ( uint8_t type )

Initialize buffer.

Parameters:
[in] type,:
  • 0: Initialize Master_Buf with increment value from 0 Fill all member in Slave_Buf with 0
  • 1: Initialize Slave_Buf with increment value from 0 Fill all member in Master_Buf with 0
Returns:
None
int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 118 of file slave.c.

int main ( void )

Definition at line 249 of file slave.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 54 of file slave.c.

uint8_t Slave_Buf[BUFFER_SIZE]

These global variables below used in interrupt mode - Slave device -----------

Definition at line 65 of file slave.c.

uint8_t slave_test[2]

Definition at line 66 of file slave.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S

Modules
I2S
LPC1700CMSIS Examples

Modules

I2S_DMA
I2S_IRQ
I2S_MCLK
I2S_test_4_wire
I2S_two_kit
Polling
Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S_DMA

Defines | Functions | Variables
I2S_DMA
I2S

Defines

#define | BUFFER_SIZE 0x0A
#define | DMA_SIZE 0x100UL
#define | DMA_SRC LPC_AHBRAM1_BASE
#define | DMA_DST (DMA_SRC+DMA_SIZE)

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | Buffer_Init (void)
Initialize buffer.
Bool | Buffer_Verify (void)
Verify buffer.
void | print_menu (void)
Print menu screen.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err
__IO uint32_t | Channel1_TC
__IO uint32_t | Channel1_Err
volatile uint32_t * | I2STXBuffer = (uint32_t*)(DMA_SRC)
volatile uint32_t * | I2SRXBuffer = (uint32_t*)(DMA_DST)

Define Documentation

#define BUFFER_SIZE 0x0A

Max buffer length

Definition at line 40 of file i2s_dma_test.c.

#define DMA_DST (DMA_SRC+DMA_SIZE)

DMA Source Address is (AHBRAM1_BASE + DMA_SIZE) that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 52 of file i2s_dma_test.c.

#define DMA_SIZE 0x100UL

DMA transfer size

Definition at line 42 of file i2s_dma_test.c.

#define DMA_SRC LPC_AHBRAM1_BASE

DMA Source Address is AHBRAM1_BASE that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 47 of file i2s_dma_test.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file gpdma_sleep.c.

Bool Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None
int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 176 of file i2s_dma_test.c.

void DMA_IRQHandler ( void )

GPDMA interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None
int main ( void )

Definition at line 398 of file i2s_dma_test.c.

void print_menu ( void )

Print menu screen.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

__IO uint32_t Channel0_Err

Definition at line 69 of file i2s_dma_test.c.

__IO uint32_t Channel0_TC

Definition at line 66 of file i2s_dma_test.c.

__IO uint32_t Channel1_Err

Definition at line 75 of file i2s_dma_test.c.

__IO uint32_t Channel1_TC

Definition at line 72 of file i2s_dma_test.c.

volatile uint32_t* I2SRXBuffer = (uint32_t*)(DMA_DST)

Definition at line 78 of file i2s_dma_test.c.

volatile uint32_t* I2STXBuffer = (uint32_t*)(DMA_SRC)

Definition at line 77 of file i2s_dma_test.c.

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 55 of file i2s_dma_test.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S_IRQ

Defines | Functions | Variables
I2S_IRQ
I2S

Defines

#define | BUFFER_SIZE 0x400
#define | I2S_BUFFER_SRC LPC_AHBRAM1_BASE
#define | I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)
#define | RXFIFO_EMPTY 0
#define | TXFIFO_FULL 8

Functions

void | Buffer_Init (void)
Initialize buffer.
Bool | Buffer_Verify (void)
Verify buffer.
void | print_menu (void)
print menu
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
volatile uint8_t | I2STXDone = 0
volatile uint8_t | I2SRXDone = 0
volatile uint32_t * | I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)
volatile uint32_t * | I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)
volatile uint32_t | I2SReadLength = 0
volatile uint32_t | I2SWriteLength = 0
uint8_t | tx_depth_irq = 0
uint8_t | rx_depth_irq = 0
uint8_t | dummy = 0

Define Documentation

#define BUFFER_SIZE 0x400

Max buffer length

Definition at line 39 of file i2s_irq_test.c.

#define I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)

I2S Buffer Destination Address is (AHBRAM1_BASE + 0x100UL) that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 49 of file i2s_irq_test.c.

#define I2S_BUFFER_SRC LPC_AHBRAM1_BASE

I2S Buffer Source Address is AHBRAM1_BASE that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 44 of file i2s_irq_test.c.

#define RXFIFO_EMPTY 0

Definition at line 51 of file i2s_irq_test.c.

#define TXFIFO_FULL 8

Definition at line 52 of file i2s_irq_test.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file gpdma_sleep.c.

Bool Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 176 of file i2s_irq_test.c.

int main ( void )

Definition at line 306 of file i2s_irq_test.c.

void print_menu ( void )

print menu

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t dummy = 0

Definition at line 75 of file i2s_irq_test.c.

volatile uint32_t I2SReadLength = 0

Definition at line 70 of file i2s_irq_test.c.

volatile uint32_t* I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)

Definition at line 68 of file i2s_irq_test.c.

volatile uint8_t I2SRXDone = 0

Definition at line 65 of file i2s_irq_test.c.

volatile uint32_t* I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)

Definition at line 67 of file i2s_irq_test.c.

volatile uint8_t I2STXDone = 0

Definition at line 64 of file i2s_irq_test.c.

volatile uint32_t I2SWriteLength = 0

Definition at line 71 of file i2s_irq_test.c.

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 54 of file i2s_irq_test.c.

uint8_t rx_depth_irq = 0

Definition at line 74 of file i2s_irq_test.c.

uint8_t tx_depth_irq = 0

Definition at line 73 of file i2s_irq_test.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S_MCLK

Defines | Functions | Variables
I2S_MCLK
I2S

Defines

#define | BUFFER_SIZE 0x400
#define | I2S_BUFFER_SRC LPC_AHBRAM1_BASE
#define | I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)
#define | RXFIFO_EMPTY 0
#define | TXFIFO_FULL 8

Functions

void | I2S_IRQHandler ()
I2S IRQ Handler.
void | Buffer_Init (void)
Initialize buffer.
Bool | Buffer_Verify (void)
Verify buffer.
void | print_menu (void)
print menu
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
volatile uint8_t | I2STXDone = 0
volatile uint8_t | I2SRXDone = 0
volatile uint32_t * | I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)
volatile uint32_t * | I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)
volatile uint32_t | I2SReadLength = 0
volatile uint32_t | I2SWriteLength = 0
uint8_t | tx_depth_irq = 0
uint8_t | rx_depth_irq = 0
uint8_t | dummy = 0

Define Documentation

#define BUFFER_SIZE 0x400

Max buffer length

Definition at line 38 of file i2s_mclk.c.

#define I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)

I2S Buffer Destination Address is (AHBRAM1_BASE + 0x100UL) that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 48 of file i2s_mclk.c.

#define I2S_BUFFER_SRC LPC_AHBRAM1_BASE

I2S Buffer Source Address is AHBRAM1_BASE that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 43 of file i2s_mclk.c.

#define RXFIFO_EMPTY 0

Definition at line 50 of file i2s_mclk.c.

#define TXFIFO_FULL 8

Definition at line 51 of file i2s_mclk.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file gpdma_sleep.c.

Bool Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 175 of file i2s_mclk.c.

void I2S_IRQHandler ( void )

I2S IRQ Handler.

Parameters:
[in] None
Returns:
None
int main ( void )

Definition at line 324 of file i2s_mclk.c.

void print_menu ( void )

print menu

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t dummy = 0

Definition at line 74 of file i2s_mclk.c.

volatile uint32_t I2SReadLength = 0

Definition at line 69 of file i2s_mclk.c.

volatile uint32_t* I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)

Definition at line 67 of file i2s_mclk.c.

volatile uint8_t I2SRXDone = 0

Definition at line 64 of file i2s_mclk.c.

volatile uint32_t* I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)

Definition at line 66 of file i2s_mclk.c.

volatile uint8_t I2STXDone = 0

Definition at line 63 of file i2s_mclk.c.

volatile uint32_t I2SWriteLength = 0

Definition at line 70 of file i2s_mclk.c.

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 53 of file i2s_mclk.c.

uint8_t rx_depth_irq = 0

Definition at line 73 of file i2s_mclk.c.

uint8_t tx_depth_irq = 0

Definition at line 72 of file i2s_mclk.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S_test_4_wire

Defines | Functions | Variables
I2S_test_4_wire
I2S

Defines

#define | BUFFER_SIZE 0x400
************************** PRIVATE DEFINITIONS *************************/
#define | I2S_BUFFER_SRC LPC_AHBRAM1_BASE
#define | I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)

Functions

void | Buffer_Init (void)
Initialize buffer.
Bool | Buffer_Verify (void)
Verify buffer.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main I2S program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
volatile uint8_t | I2STXDone = 0
volatile uint8_t | I2SRXDone = 0
volatile uint32_t * | I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)
volatile uint32_t * | I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)
volatile uint32_t | I2SReadLength = 0
volatile uint32_t | I2SWriteLength = 0

Define Documentation

#define BUFFER_SIZE 0x400

************************** PRIVATE DEFINITIONS *************************/

Max buffer length

Definition at line 38 of file i2s_test_4_wire.c.

#define I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)

I2S Buffer Destination Address is (AHBRAM1_BASE + 0x100UL) that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 48 of file i2s_test_4_wire.c.

#define I2S_BUFFER_SRC LPC_AHBRAM1_BASE

I2S Buffer Source Address is AHBRAM1_BASE that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 43 of file i2s_test_4_wire.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file gpdma_sleep.c.

Bool Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
TRUE - if two buffers are similar FALSE - if two buffers are different
int c_entry ( void )

c_entry: Main I2S program body

Parameters:
[in] None
Returns:
int

Definition at line 127 of file i2s_test_4_wire.c.

int main ( void )

Definition at line 260 of file i2s_test_4_wire.c.

void print_menu ( void )

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

volatile uint32_t I2SReadLength = 0

Definition at line 66 of file i2s_test_4_wire.c.

volatile uint32_t* I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)

Definition at line 64 of file i2s_test_4_wire.c.

volatile uint8_t I2SRXDone = 0

Definition at line 61 of file i2s_test_4_wire.c.

volatile uint32_t* I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)

Definition at line 63 of file i2s_test_4_wire.c.

volatile uint8_t I2STXDone = 0

Definition at line 60 of file i2s_test_4_wire.c.

volatile uint32_t I2SWriteLength = 0

Definition at line 67 of file i2s_test_4_wire.c.

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 51 of file i2s_test_4_wire.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S_two_kit

Defines | Functions | Variables
I2S_two_kit
I2S

Defines

#define | I2S_TRANSMIT 0
#define | I2S_RECEIVE !I2S_TRANSMIT

Functions

void | I2S_IRQHandler ()
I2S IRQ Handler.
void | print_menu ()
print_menu
int | c_entry (void)
c_entry: Main I2S program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
uint8_t | tx_depth_irq = 0
uint8_t | rx_depth_irq = 0
uint32_t | data

Define Documentation

#define I2S_RECEIVE !I2S_TRANSMIT

Definition at line 40 of file i2s_two_kit.c.

#define I2S_TRANSMIT 0

Definition at line 39 of file i2s_two_kit.c.

Function Documentation

int c_entry ( void )

c_entry: Main I2S program body

Parameters:
[in] None
Returns:
int

Definition at line 127 of file i2s_two_kit.c.

void I2S_IRQHandler ( void )

I2S IRQ Handler.

Parameters:
[in] None
Returns:
None
int main ( void )

Definition at line 255 of file i2s_two_kit.c.

void print_menu ( void )

print_menu

Print menu.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint32_t data

Definition at line 55 of file i2s_two_kit.c.

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 44 of file i2s_two_kit.c.

uint8_t rx_depth_irq = 0

Definition at line 54 of file i2s_two_kit.c.

uint8_t tx_depth_irq = 0

Definition at line 53 of file i2s_two_kit.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Polling

Defines | Functions | Variables
Polling
I2S

Defines

#define | BUFFER_SIZE 0x400
#define | I2S_BUFFER_SRC LPC_AHBRAM1_BASE
#define | I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)

Functions

void | Buffer_Init (void)
Initialize buffer.
Bool | Buffer_Verify (void)
Verify buffer.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main I2S program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
volatile uint8_t | I2STXDone = 0
volatile uint8_t | I2SRXDone = 0
volatile uint32_t * | I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)
volatile uint32_t * | I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)
volatile uint32_t | I2SReadLength = 0
volatile uint32_t | I2SWriteLength = 0

Define Documentation

#define BUFFER_SIZE 0x400

Max buffer length

Definition at line 39 of file i2s_polling.c.

#define I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)

I2S Buffer Destination Address is (AHBRAM1_BASE + 0x100UL) that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 49 of file i2s_polling.c.

#define I2S_BUFFER_SRC LPC_AHBRAM1_BASE

I2S Buffer Source Address is AHBRAM1_BASE that used for USB RAM purpose, but it is not used in this example, so this memory section can be used for general purpose memory

Definition at line 44 of file i2s_polling.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file gpdma_sleep.c.

Bool Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
TRUE: if two buffers are similar FALSE: if two buffers are different
int c_entry ( void )

c_entry: Main I2S program body

Parameters:
[in] None
Returns:
int

Definition at line 130 of file i2s_polling.c.

int main ( void )

Definition at line 267 of file i2s_polling.c.

void print_menu ( void )

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

volatile uint32_t I2SReadLength = 0

Definition at line 68 of file i2s_polling.c.

volatile uint32_t* I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)

Definition at line 66 of file i2s_polling.c.

volatile uint8_t I2SRXDone = 0

Definition at line 63 of file i2s_polling.c.

volatile uint32_t* I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)

Definition at line 65 of file i2s_polling.c.

volatile uint8_t I2STXDone = 0

Definition at line 62 of file i2s_polling.c.

volatile uint32_t I2SWriteLength = 0

Definition at line 69 of file i2s_polling.c.

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 52 of file i2s_polling.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: LCD

Modules
LCD
LPC1700CMSIS Examples

Modules

NOKIA6610_LCD
QVGA_TFT_LCD
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: NOKIA6610_LCD

Defines | Functions | Variables
NOKIA6610_LCD
LCD

Defines

#define | TIMER0_TICK_PER_SEC 20

Functions

void | Dly100us (void *arg)
Delay 100us.
int | c_entry (void)
c_entry: Main LCD program body
int | main (void)

Variables

FontType_t Terminal_6_8_6
FontType_t Terminal_9_12_6
FontType_t Terminal_18_24_12
volatile Bool | CntrSel = FALSE
uint32_t | CriticalSecCntr

Define Documentation

#define TIMER0_TICK_PER_SEC 20

Definition at line 44 of file lcdtest.c.

Function Documentation

int c_entry ( void )

c_entry: Main LCD program body

Parameters:
[in] None
Returns:
int

Definition at line 105 of file lcdtest.c.

void Dly100us ( void * arg )

Delay 100us.

Parameters:
[in] void *arg
Returns:
None

Definition at line 92 of file lcdtest.c.

int main ( void )

Definition at line 236 of file lcdtest.c.

Variable Documentation

volatile Bool CntrSel = FALSE

Definition at line 52 of file lcdtest.c.

uint32_t CriticalSecCntr

Definition at line 55 of file lcdtest.c.

FontType_t Terminal_18_24_12
FontType_t Terminal_6_8_6
FontType_t Terminal_9_12_6

Definition at line 406 of file Terminal_9_12x6.c.

Generated on Mon Nov 28 2011 11:15:21 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QVGA_TFT_LCD

Defines | Functions | Variables
QVGA_TFT_LCD
LCD

Defines

#define | TIME_OUT 10000

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
Print Welcome menu.
int | main (void)

Variables

uint8_t | lcd_text [2][16+1]

Define Documentation

#define TIME_OUT 10000

Definition at line 38 of file lcdtest.c.

Function Documentation

int c_entry ( void )

Print Welcome menu.

Parameters:
[in] none
Returns:
None c_entry: Main LCD program body
Parameters:
[in] None
Returns:
int

Definition at line 79 of file lcdtest.c.

int main ( void )

Definition at line 110 of file lcdtest.c.

void print_menu ( void )

Print menu.

Print Welcome Screen Menu subroutine.

print_menu

Print menu screen.

Print Welcome menu.

print menu

Parameters:
[in] None
Returns:
None
Parameters:
[in] none
Returns:
none
Parameters:
[in] none
Returns:
None
Parameters:
None
Returns:
None
Parameters:
[in] None
Returns:
None

Print menu.

Parameters:
[in] none
Returns:
none

Print menu.

Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
None

Print menu.

Parameters:
[in] None
Returns:
None

Print menu.

Parameters:
None
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t lcd_text[2][16+1]
Initial value:
 {"   NXP SEMI.    ",
                          "  LPC1768/CM3" }

Definition at line 56 of file lcdtest.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: MCPWM

Modules
MCPWM
LPC1700CMSIS Examples

Modules

MCPWMSimple
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: MCPWMSimple

Defines | Functions
MCPWMSimple
MCPWM

Defines

#define | DC_MODE_TEST 1
#define | AC_MODE_TEST 0
#define | CAPTURE_MODE_TEST 0

Functions

void | MCPWM_IRQHandler (void)
MCPWM interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main MCPWM program body
int | main (void)

Define Documentation

#define AC_MODE_TEST 0

MCPWM in 3-phase AC motor mode test

Definition at line 42 of file mcpwm_simple.c.

#define CAPTURE_MODE_TEST 0

MCPWM tested with Capture function

Definition at line 44 of file mcpwm_simple.c.

#define DC_MODE_TEST 1

MCPWM in 3-phase DC motor mode test

Definition at line 40 of file mcpwm_simple.c.

Function Documentation

int c_entry ( void )

c_entry: Main MCPWM program body

Parameters:
[in] None
Returns:
int

Definition at line 91 of file mcpwm_simple.c.

int main ( void )

Definition at line 261 of file mcpwm_simple.c.

void MCPWM_IRQHandler ( void )

MCPWM interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

Definition at line 65 of file mcpwm_simple.c.

Generated on Mon Nov 28 2011 11:15:22 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: NVIC

Modules
NVIC
LPC1700CMSIS Examples

Modules

Priority
VecTable_Relocation
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Priority

Defines | Functions
Priority
NVIC

Defines

#define | INT_MODE 1

Functions

void | EINT0_IRQHandler (void)
External interrupt 0 handler This interrupt occurs when pressing button INT0.
void | EINT3_IRQHandler (void)
External interrupt 3 handler This interrupt occurs when turn ADC potentiometer.
void | print_menu (void)
Print menu.
void | delay (void)
delay function
int | c_entry (void)
c_entry: Main program body
int | main (void)

Define Documentation

#define INT_MODE 1

Definition at line 43 of file nvic_priority.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 112 of file nvic_priority.c.

void delay ( void )

delay function

Parameters:
[in] none
Returns:
None
void EINT0_IRQHandler ( void )

External interrupt 0 handler This interrupt occurs when pressing button INT0.

Parameters:
None
Returns:
None

Definition at line 59 of file nvic_priority.c.

void EINT3_IRQHandler ( void )

External interrupt 3 handler This interrupt occurs when turn ADC potentiometer.

Parameters:
None
Returns:
None
int main ( void )

Definition at line 164 of file nvic_priority.c.

void print_menu ( void )

Print menu.

Print Welcome Screen Menu subroutine.

print_menu

Print menu screen.

Print Welcome menu.

print menu

Parameters:
[in] None
Returns:
None
Parameters:
[in] none
Returns:
none
Parameters:
[in] none
Returns:
None
Parameters:
None
Returns:
None
Parameters:
[in] None
Returns:
None

Print menu.

Parameters:
[in] none
Returns:
none

Print menu.

Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
None

Print menu.

Parameters:
[in] None
Returns:
None

Print menu.

Parameters:
None
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Generated on Mon Nov 28 2011 11:15:22 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: VecTable_Relocation

Defines | Functions | Variables
VecTable_Relocation
NVIC

Defines

#define | VTOR_OFFSET 0x20080000

Functions

void | SysTick_Handler (void)
SysTick interrupt handler.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
FunctionalState | Cur_State = DISABLE

Define Documentation

#define VTOR_OFFSET 0x20080000

Definition at line 43 of file vt_relocation.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 103 of file vt_relocation.c.

int main ( void )

Definition at line 155 of file vt_relocation.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

void SysTick_Handler ( void )

SysTick interrupt handler.

SysTick handler sub-routine (1ms)

Parameters:
None
Returns:
None

Definition at line 1006 of file tcpip.c.

Variable Documentation

FunctionalState Cur_State = DISABLE

Definition at line 55 of file vt_relocation.c.

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 46 of file vt_relocation.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWM

Modules
PWM
LPC1700CMSIS Examples

Modules

Dual_Edge
Match_Interrupt
Single_Edge
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Dual_Edge

Functions
Dual_Edge
PWM

Functions

int | c_entry (void)
c_entry: Main PWM program body
int | main (void)

Function Documentation

int c_entry ( void )

c_entry: Main PWM program body

Parameters:
[in] None
Returns:
int

Definition at line 42 of file pwm_dual_edge.c.

int main ( void )

Definition at line 144 of file pwm_dual_edge.c.

Generated on Mon Nov 28 2011 11:15:22 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Match_Interrupt

Defines | Functions | Variables
Match_Interrupt
PWM

Defines

#define | TIME_OUT 10000

Functions

void | PWM1_IRQHandler (void)
GPDMA interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main PWM program body
int | main (void)

Variables

__IO uint32_t | match_cnt = 0
__IO uint32_t | long_duty = 0

Define Documentation

#define TIME_OUT 10000

Definition at line 37 of file pwm_match_int.c.

Function Documentation

int c_entry ( void )

c_entry: Main PWM program body

Parameters:
[in] None
Returns:
int

Definition at line 72 of file pwm_match_int.c.

int main ( void )

Definition at line 184 of file pwm_match_int.c.

void PWM1_IRQHandler ( void )

GPDMA interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

Definition at line 54 of file pwm_match_int.c.

Variable Documentation

__IO uint32_t long_duty = 0

Definition at line 42 of file pwm_match_int.c.

__IO uint32_t match_cnt = 0

Definition at line 41 of file pwm_match_int.c.

Generated on Mon Nov 28 2011 11:15:22 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Single_Edge

Functions
Single_Edge
PWM

Functions

int | c_entry (void)
c_entry: Main PWM program body
int | main (void)

Function Documentation

int c_entry ( void )

c_entry: Main PWM program body

Parameters:
[in] None
Returns:
int

Definition at line 42 of file pwm_single_edge.c.

int main ( void )

Definition at line 131 of file pwm_single_edge.c.

Generated on Mon Nov 28 2011 11:15:22 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWR

Modules
PWR
LPC1700CMSIS Examples

Modules

EXTINT_Sleep
NMI_PowerDown
RTC_DeepPWD
WDT_DeepSleep
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: EXTINT_Sleep

Defines | Functions | Variables
EXTINT_Sleep
PWR

Defines

#define | MCB_LPC_1768

Functions

void | print_menu (void)
Print Welcome menu.
void | delay (void)
Delay function.
void | InitLED (void)
Initialize LEDs.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"

Define Documentation

#define MCB_LPC_1768

Definition at line 42 of file extint_sleep.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 153 of file extint_sleep.c.

void delay ( void )

Delay function.

Parameters:
[in] None
Returns:
None
void InitLED ( void )

Initialize LEDs.

Parameters:
[in] None
Returns:
None

Definition at line 131 of file extint_sleep.c.

int main ( void )

Definition at line 272 of file extint_sleep.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 55 of file extint_sleep.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: NMI_PowerDown

Functions | Variables
NMI_PowerDown
PWR

Functions

void | print_menu (void)
Print Welcome menu.
void | NMI_Handler (void)
Non-Maskable interrupt handler.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 82 of file nmi_powerdown.c.

int main ( void )

Definition at line 143 of file nmi_powerdown.c.

void NMI_Handler ( void )

Non-Maskable interrupt handler.

Parameters:
[in] none
Returns:
None

Definition at line 60 of file nmi_powerdown.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 40 of file nmi_powerdown.c.

Generated on Mon Nov 28 2011 11:15:22 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RTC_DeepPWD

Functions | Variables
RTC_DeepPWD
PWR

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 88 of file rtc_deeppwd.c.

int main ( void )

Definition at line 141 of file rtc_deeppwd.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 40 of file rtc_deeppwd.c.

Generated on Mon Nov 28 2011 11:15:22 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: WDT_DeepSleep

Defines | Functions | Variables
WDT_DeepSleep
PWR

Defines

#define | WDT_TIMEOUT 2000000

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"

Define Documentation

#define WDT_TIMEOUT 2000000

Definition at line 50 of file wdt_deepsleep.c.

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 81 of file wdt_deepsleep.c.

int main ( void )

Definition at line 134 of file wdt_deepsleep.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 39 of file wdt_deepsleep.c.

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LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI

Modules
QEI
LPC1700CMSIS Examples

Modules

QEI_Velo
Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI_Velo

Defines | Functions | Variables
QEI_Velo
QEI

Defines

#define | VIRTUAL_QEI_SIGNAL 1
#define | SIGNAL_MODE 0
#define | CAP_MODE 1
#define | CAP_PERIOD 250000UL
#define | DISP_TIME 3000000UL
#define | MAX_CAP_TIMES (DISP_TIME/CAP_PERIOD)
#define | ENC_RES 2048UL
#define | MAX_VEL 600UL
#define | COUNT_MODE 4
#define | PHASE_A_PIN (1<<19)
#define | PHASE_B_PIN (1<<21)

Functions

void | VirtualQEISignal_Init (void)
Initializes signal supplying for QEI peripheral by using timer match interrupt output, that will generate two virtual signal on Phase-A and Phase-B. These two clock are 90 degrees out of phase. In this case, a 'virtual encoder' that has these following parameter:
void | TIMER0_IRQHandler (void)
Timer 0 interrupt handler. This sub-routine will set/clear two Phase A-B output pin to their phase state.
void | QEI_IRQHandler (void)
QEI interrupt handler. This sub-routine will update current value of captured velocity in to velocity accumulate.
int | c_entry (void)
c_entry: Main QEI program body
int | main (void)

Variables

__IO uint8_t | PhaseCnt
__IO uint64_t | VeloAcc
__IO uint32_t | VeloCapCnt
__IO FlagStatus | VeloAccFlag
const PINSEL_CFG_Type | qei_phaA_pin [1] = {{1, 20, 1, 0, 0}}
const PINSEL_CFG_Type | qei_phaB_pin [1] = {{1, 23, 1, 0, 0}}
const PINSEL_CFG_Type | qei_idx_pin [1] = {{1, 24, 1, 0, 0}}

Define Documentation

#define CAP_MODE 1

Capture Mode setting:

  • When = 0, only PhA edges are counted (2X).
  • When = 1, BOTH PhA and PhB edges are counted (4X), increasing resolution but decreasing range

Definition at line 57 of file qei_test_velo.c.

#define CAP_PERIOD 250000UL

Velocity capture period definition (in microsecond)

Definition at line 60 of file qei_test_velo.c.

#define COUNT_MODE 4

Definition at line 75 of file qei_test_velo.c.

#define DISP_TIME 3000000UL

Delay time to Read Velocity Accumulator and display (in microsecond)

Definition at line 63 of file qei_test_velo.c.

#define ENC_RES 2048UL

Encoder resolution (PPR)

Definition at line 67 of file qei_test_velo.c.

#define MAX_CAP_TIMES (DISP_TIME/CAP_PERIOD)

Max velocity capture times calculated

Definition at line 65 of file qei_test_velo.c.

#define MAX_VEL 600UL

Max velocity (RPM)

Definition at line 73 of file qei_test_velo.c.

#define PHASE_A_PIN (1<<19)

Definition at line 82 of file qei_test_velo.c.

#define PHASE_B_PIN (1<<21)

Definition at line 84 of file qei_test_velo.c.

#define SIGNAL_MODE 0

Signal Mode setting:

  • When = 0, PhA and PhB function as quadrature encoder inputs.
  • When = 1, PhA functions as the direction signal and PhB functions as the clock signal

Definition at line 50 of file qei_test_velo.c.

#define VIRTUAL_QEI_SIGNAL 1

In case of using QEI virtual signal, this macro below must be set to 1

Definition at line 43 of file qei_test_velo.c.

Function Documentation

int c_entry ( void )

c_entry: Main QEI program body

Parameters:
[in] None
Returns:
int

Definition at line 273 of file qei_test_velo.c.

int main ( void )

Definition at line 381 of file qei_test_velo.c.

void QEI_IRQHandler ( void )

QEI interrupt handler. This sub-routine will update current value of captured velocity in to velocity accumulate.

Parameters:
[in] None
Returns:
None

Definition at line 176 of file qei_test_velo.c.

void TIMER0_IRQHandler ( void )

Timer 0 interrupt handler. This sub-routine will set/clear two Phase A-B output pin to their phase state.

Parameters:
[in] None
Returns:
None
void VirtualQEISignal_Init ( void )

Initializes signal supplying for QEI peripheral by using timer match interrupt output, that will generate two virtual signal on Phase-A and Phase-B. These two clock are 90 degrees out of phase. In this case, a 'virtual encoder' that has these following parameter:

  • Encoder type : Quadrature encoder
  • Max velocity : MAX_VEL (Round Per Minute)
  • Encoder Resolution : ENC_RES (Pulse Per Round) The calculated frequency is: Freq = (MAX_VEL * ENC_RES * COUNT_MODE) / 60 (Hz) The timer therefore should be set to tick every cycle T = 1/Freq (second) Figure: |-----| |-----| Phase A --| |-----| |----- |-----| |-----| Phase B -----| |-----| |--

|--|--|--|--|--|--|--|-- T T T T T T T

Parameters:
[in] None
Returns:
None

Definition at line 226 of file qei_test_velo.c.

Variable Documentation

__IO uint8_t PhaseCnt

Phase Counter:

  • 0: Phase A = 1, Phase B = 0
  • 1: Phase A = 1, Phase B = 1
  • 2: Phase A = 0, Phase B = 1
  • 3: Phase A = 0, Phase B = 0

Definition at line 94 of file qei_test_velo.c.

const PINSEL_CFG_Type qei_idx_pin[1] = {{1, 24, 1, 0, 0}}

QEI Index Pin

Definition at line 118 of file qei_test_velo.c.

const PINSEL_CFG_Type qei_phaA_pin[1] = {{1, 20, 1, 0, 0}}

QEI Phase-A Pin

Definition at line 114 of file qei_test_velo.c.

const PINSEL_CFG_Type qei_phaB_pin[1] = {{1, 23, 1, 0, 0}}

QEI Phase-B Pin

Definition at line 116 of file qei_test_velo.c.

__IO uint64_t VeloAcc

Velocity Accumulator

Definition at line 98 of file qei_test_velo.c.

__IO FlagStatus VeloAccFlag

Flag indicates Times of Velocity capture is enough to read out

Definition at line 102 of file qei_test_velo.c.

__IO uint32_t VeloCapCnt

Times of Velocity capture

Definition at line 100 of file qei_test_velo.c.

Generated on Mon Nov 28 2011 11:15:22 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RIT

Modules
RIT
LPC1700CMSIS Examples

Modules

Interrupt
Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Interrupt

Defines | Functions | Variables
Interrupt
RIT

Defines

#define | MCB_LPC_1768
#define | TIME_INTERVAL 1000

Functions

void | RIT_IRQHandler (void)
RIT interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main RIT program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
FunctionalState | LEDStatus = ENABLE

Define Documentation

#define MCB_LPC_1768

Definition at line 37 of file rit_interrupt.c.

#define TIME_INTERVAL 1000

Definition at line 40 of file rit_interrupt.c.

Function Documentation

int c_entry ( void )

c_entry: Main RIT program body

Parameters:
[in] None
Returns:
int

Definition at line 94 of file rit_interrupt.c.

int main ( void )

Definition at line 134 of file rit_interrupt.c.

void RIT_IRQHandler ( void )

RIT interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

Definition at line 63 of file rit_interrupt.c.

Variable Documentation

FunctionalState LEDStatus = ENABLE

Definition at line 52 of file rit_interrupt.c.

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 43 of file rit_interrupt.c.

Generated on Mon Nov 28 2011 11:15:22 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RTC

Modules
RTC
LPC1700CMSIS Examples

Modules

AlarmCntIncrInterrupt
Calibration
Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: AlarmCntIncrInterrupt

Functions | Variables
AlarmCntIncrInterrupt
RTC

Functions

void | RTC_IRQHandler (void)
RTC interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main RTC program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"

Function Documentation

int c_entry ( void )

c_entry: Main RTC program body

Parameters:
[in] None
Returns:
int

Definition at line 108 of file rtc_alarm_cntincr_int.c.

int main ( void )

Definition at line 183 of file rtc_alarm_cntincr_int.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file adc_burst_test.c.

void RTC_IRQHandler ( void )

RTC interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

Variable Documentation

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 39 of file rtc_alarm_cntincr_int.c.

Generated on Mon Nov 28 2011 11:15:22 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Calibration

Functions | Variables
Calibration
RTC

Functions

void | print_menu (void)
Print Welcome menu.
void | RTC_IRQHandle (void)
void | RTC_IRQHandler (void)
RTC interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 94 of file rtc_calib.c.

int main ( void )

Definition at line 148 of file rtc_calib.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

void RTC_IRQHandle ( void )
void RTC_IRQHandler ( void )

RTC interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

Definition at line 59 of file rtc_calib.c.

Variable Documentation

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 39 of file rtc_calib.c.

Generated on Mon Nov 28 2011 11:15:22 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SPI

Modules
SPI
LPC1700CMSIS Examples

Modules

LoopBack
Master
sc16is750_int
sc16is750_polling
SDCard
slave
Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LoopBack

Defines | Functions | Variables
LoopBack
SPI

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | SPI_DATABIT_SIZE 10
#define | BUFFER_SIZE 0x40

Functions

void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
SPI_CFG_Type SPI_ConfigStruct
uint16_t | Tx_Buf [BUFFER_SIZE]
uint16_t | Rx_Buf [BUFFER_SIZE]

Define Documentation

#define BUFFER_SIZE 0x40

Max buffer length

Definition at line 46 of file spi_loopback_test.c.

#define CS_PIN_NUM 16

Definition at line 43 of file spi_loopback_test.c.

#define CS_PORT_NUM 0

Definition at line 41 of file spi_loopback_test.c.

#define SPI_DATABIT_SIZE 10

Definition at line 44 of file spi_loopback_test.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file gpdma_sleep.c.

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None
int c_entry ( void )

c_entry: Main SPI program body

Parameters:
[in] None
Returns:
int

Definition at line 163 of file spi_loopback_test.c.

void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error)

Parameters:
[in] none
Returns:
None
int main ( void )

Definition at line 233 of file spi_loopback_test.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 49 of file spi_loopback_test.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 59 of file spi_loopback_test.c.

uint16_t Rx_Buf[BUFFER_SIZE]

Definition at line 69 of file spi_loopback_test.c.

SPI_CFG_Type SPI_ConfigStruct

Definition at line 62 of file spi_loopback_test.c.

uint16_t Tx_Buf[BUFFER_SIZE]

Definition at line 68 of file spi_loopback_test.c.

Generated on Mon Nov 28 2011 11:15:23 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Master

Defines | Functions | Variables
Master
SPI

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | SPI_DATABIT_SIZE 10
#define | BUFFER_SIZE 0x40

Functions

void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
SPI_CFG_Type SPI_ConfigStruct
uint16_t | Tx_Buf [BUFFER_SIZE]
uint16_t | Rx_Buf [BUFFER_SIZE]

Define Documentation

#define BUFFER_SIZE 0x40

Max buffer length

Definition at line 45 of file spi_master.c.

#define CS_PIN_NUM 16

Definition at line 41 of file spi_master.c.

#define CS_PORT_NUM 0

Definition at line 39 of file spi_master.c.

#define SPI_DATABIT_SIZE 10

Definition at line 42 of file spi_master.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file gpdma_sleep.c.

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None
int c_entry ( void )

c_entry: Main SPI program body

Parameters:
[in] None
Returns:
int

Definition at line 194 of file spi_master.c.

void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error)

Parameters:
[in] none
Returns:
None
int main ( void )

Definition at line 278 of file spi_master.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 48 of file spi_master.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 59 of file spi_master.c.

uint16_t Rx_Buf[BUFFER_SIZE]

Definition at line 69 of file spi_master.c.

SPI_CFG_Type SPI_ConfigStruct

Definition at line 62 of file spi_master.c.

uint16_t Tx_Buf[BUFFER_SIZE]

Definition at line 68 of file spi_master.c.

Generated on Mon Nov 28 2011 11:15:23 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: sc16is750_int

Defines | Functions | Variables
sc16is750_int
SPI

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | IDLE_CHAR 0xFF
#define | SC16IS740_WR_CMD(x) ((uint8_t) (x << 3))
#define | SC16IS740_RD_CMD(x) ((uint8_t) ((x << 3) | 0x80))
#define | SC16IS740_IODIR_REG 0x0A
#define | SC16IS740_IOSTATE_REG 0x0B
#define | SC16IS740_IOCON_REG 0x0E

Functions

void | SPI_IRQHandler (void)
SPI Interrupt used for reading and writing handler.
void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | iocon_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}
uint8_t | iodir_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}
uint8_t | iostate_on [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}
uint8_t | iostate_off [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}
uint8_t | spireadbuf [2]
__IO FlagStatus | complete
SPI_CFG_Type SPI_ConfigStruct
SPI_DATA_SETUP_Type xferConfig

Define Documentation

#define CS_PIN_NUM 16

Definition at line 43 of file spi_interrupt_test.c.

#define CS_PORT_NUM 0

Definition at line 41 of file spi_interrupt_test.c.

#define IDLE_CHAR 0xFF

Definition at line 46 of file spi_interrupt_test.c.

#define SC16IS740_IOCON_REG 0x0E

Definition at line 55 of file spi_interrupt_test.c.

#define SC16IS740_IODIR_REG 0x0A

Definition at line 53 of file spi_interrupt_test.c.

#define SC16IS740_IOSTATE_REG 0x0B

Definition at line 54 of file spi_interrupt_test.c.

#define SC16IS740_RD_CMD ( x ) ((uint8_t) ((x << 3) | 0x80))

Definition at line 50 of file spi_interrupt_test.c.

#define SC16IS740_WR_CMD ( x ) ((uint8_t) (x << 3))

Definition at line 49 of file spi_interrupt_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main SPI program body

Parameters:
[in] None
Returns:
int

Definition at line 221 of file spi_interrupt_test.c.

void CS_Force ( int32_t state )

Drive CS output pin to low/high level to select slave device via /CS pin state.

Parameters:
[in] state State of CS output pin that will be driven:
  • 0: Drive CS pin to low level
  • 1: Drive CS pin to high level
Returns:
None
void CS_Init ( void )

Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.

Parameters:
None
Returns:
None
int main ( void )

Definition at line 346 of file spi_interrupt_test.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

void SPI_IRQHandler ( void )

SPI Interrupt used for reading and writing handler.

Parameters:
None
Returns:
None

Definition at line 99 of file spi_interrupt_test.c.

Variable Documentation

__IO FlagStatus complete

Definition at line 78 of file spi_interrupt_test.c.

uint8_t iocon_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}

Definition at line 71 of file spi_interrupt_test.c.

uint8_t iodir_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}

Definition at line 72 of file spi_interrupt_test.c.

uint8_t iostate_off[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}

Definition at line 74 of file spi_interrupt_test.c.

uint8_t iostate_on[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}

Definition at line 73 of file spi_interrupt_test.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 58 of file spi_interrupt_test.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 69 of file spi_interrupt_test.c.

SPI_CFG_Type SPI_ConfigStruct

Definition at line 81 of file spi_interrupt_test.c.

uint8_t spireadbuf[2]

Definition at line 75 of file spi_interrupt_test.c.

SPI_DATA_SETUP_Type xferConfig

Definition at line 83 of file spi_interrupt_test.c.

Generated on Mon Nov 28 2011 11:15:23 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: sc16is750_polling

Defines | Functions | Variables
sc16is750_polling
SPI

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | SC16IS740_WR_CMD(x) ((uint8_t) (x << 3))
#define | SC16IS740_RD_CMD(x) ((uint8_t) ((x << 3) | 0x80))
#define | SC16IS740_IODIR_REG 0x0A
#define | SC16IS740_IOSTATE_REG 0x0B
#define | SC16IS740_IOCON_REG 0x0E

Functions

void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
SPI_CFG_Type SPI_ConfigStruct
uint8_t | iocon_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}
uint8_t | iodir_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}
uint8_t | iostate_on [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}
uint8_t | iostate_off [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}
uint8_t | spireadbuf [2]

Define Documentation

#define CS_PIN_NUM 16

Definition at line 44 of file spi_polling_test.c.

#define CS_PORT_NUM 0

Definition at line 42 of file spi_polling_test.c.

#define SC16IS740_IOCON_REG 0x0E

Definition at line 53 of file spi_polling_test.c.

#define SC16IS740_IODIR_REG 0x0A

Definition at line 51 of file spi_polling_test.c.

#define SC16IS740_IOSTATE_REG 0x0B

Definition at line 52 of file spi_polling_test.c.

#define SC16IS740_RD_CMD ( x ) ((uint8_t) ((x << 3) | 0x80))

Definition at line 48 of file spi_polling_test.c.

#define SC16IS740_WR_CMD ( x ) ((uint8_t) (x << 3))

Definition at line 47 of file spi_polling_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main SPI program body

Parameters:
[in] None
Returns:
int

Definition at line 134 of file spi_polling_test.c.

void CS_Force ( int32_t state )

Drive CS output pin to low/high level to select slave device via /CS pin state.

Parameters:
[in] state State of CS output pin that will be driven:
  • 0: Drive CS pin to low level
  • 1: Drive CS pin to high level
Returns:
None
void CS_Init ( void )

Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.

Parameters:
None
Returns:
None
int main ( void )

Definition at line 248 of file spi_polling_test.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t iocon_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}

Definition at line 73 of file spi_polling_test.c.

uint8_t iodir_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}

Definition at line 74 of file spi_polling_test.c.

uint8_t iostate_off[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}

Definition at line 76 of file spi_polling_test.c.

uint8_t iostate_on[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}

Definition at line 75 of file spi_polling_test.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 57 of file spi_polling_test.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 68 of file spi_polling_test.c.

SPI_CFG_Type SPI_ConfigStruct

Definition at line 71 of file spi_polling_test.c.

uint8_t spireadbuf[2]

Definition at line 77 of file spi_polling_test.c.

Generated on Mon Nov 28 2011 11:15:23 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SDCard

Defines | Typedefs | Enumerations | Enumerator | Functions | Variables
SDCard
SPI

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | SD_DETECT_PORTNUM 4
#define | SD_DETECT_PINNUM 29
#define | CMD0_GO_IDLE_STATE 0x00
#define | CMD1_SEND_OPCOND 0x01
#define | CMD9_SEND_CSD 0x09
#define | CMD10_SEND_CID 0x0a
#define | CMD12_STOP_TRANSMISSION 0x0b
#define | CMD13_SEND_STATUS 0x0c
#define | CMD16_SET_BLOCKLEN 0x10
#define | CMD17_READ_SINGLE_BLOCK 0x11
#define | CMD18_READ_MULTIPLE_BLOCK 0x12
#define | CMD24_WRITE_BLOCK 0x18
#define | CMD25_WRITE_MULTIPLE_BLOCK 0x19
#define | CMD27_PROGRAM_CSD 0x1b
#define | CMD28_SET_WRITE_PROT 0x1c
#define | CMD29_CLR_WRITE_PROT 0x1d
#define | CMD30_SEND_WRITE_PROT 0x1e
#define | CMD32_ERASE_WR_BLK_START_ADDR 0x20
#define | CMD33_ERASE_WR_BLK_END_ADDR 0x21
#define | CMD38_ERASE 0x26
#define | CMD55_APP_CMD 0x37
#define | CMD56_GEN_CMD 0x38
#define | CMD58_READ_OCR 0x3a
#define | CMD59_CRC_ON_OFF 0x3b
#define | ACMD13_SD_STATUS 0x0d
#define | ACMD22_SEND_NUM_WR_BLOCKS 0x16
#define | ACMD23_SET_WR_BLK_ERASE_COUNT 0x17
#define | ACMD41_SEND_OP_COND 0x29
#define | ACMD42_SET_CLR_CARD_DETECT 0x2a
#define | ACMD51_SEND_SCR 0x33
#define | R1_NOERROR 0x00
#define | R1_IDLE 0x01
#define | R1_ERASE 0x02
#define | R1_ILLEGAL 0x04
#define | R1_CRC_ERR 0x08
#define | R1_ERASE_SEQ 0x10
#define | R1_ADDR_ERR 0x20
#define | R1_PARAM_ERR 0x40
#define | R2_LOCKED 0x01
#define | R2_WP_FAILED 0x02
#define | R2_ERROR 0x04
#define | R2_CTRL_ERR 0x08
#define | R2_ECC_FAIL 0x10
#define | R2_WP_VIOL 0x20
#define | R2_ERASE_PARAM 0x40
#define | R2_RANGE_ERR 0x80
#define | GETBIT(in, bit) ((in & (1<<bit)) >> bit)
#define | SD_CMD_BLOCK_LENGTH 6
#define | SD_DATA_BLOCK_LENGTH 515
#define | SD_WAIT_R1_TIMEOUT 100000

Typedefs

typedef enum _sd_connect_status | sd_connect_status
typedef enum _sd_error | sd_error

Enumerations

enum | _sd_connect_status { SD_CONNECTED, SD_DISCONNECTED }
enum _sd_error {
SD_OK, SD_NG, SD_CMD_BAD_PARAMETER, SD_ERROR_TOKEN,
SD_ERROR_TIMEOUT, SD_ERROR_BUS_NOT_IDLE, SD_ERROR_CMD0, SD_ERROR_CMD55,
SD_ERROR_ACMD41, SD_ERROR_CMD59
}

Functions

void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
sd_connect_status | SD_GetCardConnectStatus (void)
check if SD card is inserted or not
uint8_t | crc_7 (uint8_t old_crc, uint8_t data)
Calculate CRC-7 as required by SD specification.
uint8_t | crc_7final (uint8_t old_crc)
Provides the zero-padding final step to CRC-7.
uint32_t | SD_SendReceiveData_Polling (void *tx_buf, void *rx_buf, uint32_t length)
Send/receive data over SPI bus.
void | SD_SendCommand (uint8_t cmd, uint8_t *arg)
Send command to SD card.
sd_error | SD_WaitR1 (uint8_t *buffer, uint32_t length, uint32_t timeout)
Wait for SD card R1 response.
sd_error | SD_WaitDeviceIdle (uint32_t num_char)
Wait for SD card idle.
sd_error | SD_Init (uint8_t retries)
Initialize SD card in SPI mode.
sd_error | SD_GetCID (void)
Get SD card's CID register.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
SPI_CFG_Type SPI_ConfigStruct
SPI_DATA_SETUP_Type xferConfig
uint8_t | sd_cmd_buf [SD_CMD_BLOCK_LENGTH]
uint8_t | sd_data_buf [SD_DATA_BLOCK_LENGTH]

Define Documentation

#define ACMD13_SD_STATUS 0x0d

Definition at line 88 of file spi_sdcard.c.

#define ACMD22_SEND_NUM_WR_BLOCKS 0x16

Definition at line 89 of file spi_sdcard.c.

#define ACMD23_SET_WR_BLK_ERASE_COUNT 0x17

Definition at line 90 of file spi_sdcard.c.

#define ACMD41_SEND_OP_COND 0x29

Definition at line 91 of file spi_sdcard.c.

#define ACMD42_SET_CLR_CARD_DETECT 0x2a

Definition at line 92 of file spi_sdcard.c.

#define ACMD51_SEND_SCR 0x33

Definition at line 93 of file spi_sdcard.c.

#define CMD0_GO_IDLE_STATE 0x00

Definition at line 65 of file spi_sdcard.c.

#define CMD10_SEND_CID 0x0a

Definition at line 68 of file spi_sdcard.c.

#define CMD12_STOP_TRANSMISSION 0x0b

Definition at line 69 of file spi_sdcard.c.

#define CMD13_SEND_STATUS 0x0c

Definition at line 70 of file spi_sdcard.c.

#define CMD16_SET_BLOCKLEN 0x10

Definition at line 71 of file spi_sdcard.c.

#define CMD17_READ_SINGLE_BLOCK 0x11

Definition at line 72 of file spi_sdcard.c.

#define CMD18_READ_MULTIPLE_BLOCK 0x12

Definition at line 73 of file spi_sdcard.c.

#define CMD1_SEND_OPCOND 0x01

Definition at line 66 of file spi_sdcard.c.

#define CMD24_WRITE_BLOCK 0x18

Definition at line 74 of file spi_sdcard.c.

#define CMD25_WRITE_MULTIPLE_BLOCK 0x19

Definition at line 75 of file spi_sdcard.c.

#define CMD27_PROGRAM_CSD 0x1b

Definition at line 76 of file spi_sdcard.c.

#define CMD28_SET_WRITE_PROT 0x1c

Definition at line 77 of file spi_sdcard.c.

#define CMD29_CLR_WRITE_PROT 0x1d

Definition at line 78 of file spi_sdcard.c.

#define CMD30_SEND_WRITE_PROT 0x1e

Definition at line 79 of file spi_sdcard.c.

#define CMD32_ERASE_WR_BLK_START_ADDR 0x20

Definition at line 80 of file spi_sdcard.c.

#define CMD33_ERASE_WR_BLK_END_ADDR 0x21

Definition at line 81 of file spi_sdcard.c.

#define CMD38_ERASE 0x26

Definition at line 82 of file spi_sdcard.c.

#define CMD55_APP_CMD 0x37

Definition at line 83 of file spi_sdcard.c.

#define CMD56_GEN_CMD 0x38

Definition at line 84 of file spi_sdcard.c.

#define CMD58_READ_OCR 0x3a

Definition at line 85 of file spi_sdcard.c.

#define CMD59_CRC_ON_OFF 0x3b

Definition at line 86 of file spi_sdcard.c.

#define CMD9_SEND_CSD 0x09

Definition at line 67 of file spi_sdcard.c.

#define CS_PIN_NUM 16

Definition at line 41 of file spi_sdcard.c.

#define CS_PORT_NUM 0

Definition at line 39 of file spi_sdcard.c.

#define GETBIT | ( | in,
 |  | bit
 | ) | ((in & (1<<bit)) >> bit)

Definition at line 113 of file spi_sdcard.c.

#define R1_ADDR_ERR 0x20

Definition at line 101 of file spi_sdcard.c.

#define R1_CRC_ERR 0x08

Definition at line 99 of file spi_sdcard.c.

#define R1_ERASE 0x02

Definition at line 97 of file spi_sdcard.c.

#define R1_ERASE_SEQ 0x10

Definition at line 100 of file spi_sdcard.c.

#define R1_IDLE 0x01

Definition at line 96 of file spi_sdcard.c.

#define R1_ILLEGAL 0x04

Definition at line 98 of file spi_sdcard.c.

#define R1_NOERROR 0x00

Definition at line 95 of file spi_sdcard.c.

#define R1_PARAM_ERR 0x40

Definition at line 102 of file spi_sdcard.c.

#define R2_CTRL_ERR 0x08

Definition at line 107 of file spi_sdcard.c.

#define R2_ECC_FAIL 0x10

Definition at line 108 of file spi_sdcard.c.

#define R2_ERASE_PARAM 0x40

Definition at line 110 of file spi_sdcard.c.

#define R2_ERROR 0x04

Definition at line 106 of file spi_sdcard.c.

#define R2_LOCKED 0x01

Definition at line 104 of file spi_sdcard.c.

#define R2_RANGE_ERR 0x80

Definition at line 111 of file spi_sdcard.c.

#define R2_WP_FAILED 0x02

Definition at line 105 of file spi_sdcard.c.

#define R2_WP_VIOL 0x20

Definition at line 109 of file spi_sdcard.c.

#define SD_CMD_BLOCK_LENGTH 6

Definition at line 114 of file spi_sdcard.c.

#define SD_DATA_BLOCK_LENGTH 515

Definition at line 115 of file spi_sdcard.c.

#define SD_DETECT_PINNUM 29

Definition at line 44 of file spi_sdcard.c.

#define SD_DETECT_PORTNUM 4

Definition at line 43 of file spi_sdcard.c.

#define SD_WAIT_R1_TIMEOUT 100000

Definition at line 116 of file spi_sdcard.c.

Typedef Documentation

typedef enum _sd_connect_status sd_connect_status
typedef enum _sd_error sd_error

Enumeration Type Documentation

enum _sd_connect_status
Enumerator:
SD_CONNECTED
SD_DISCONNECTED

Definition at line 45 of file spi_sdcard.c.

enum _sd_error
Enumerator:
SD_OK
SD_NG
SD_CMD_BAD_PARAMETER
SD_ERROR_TOKEN
SD_ERROR_TIMEOUT
SD_ERROR_BUS_NOT_IDLE
SD_ERROR_CMD0
SD_ERROR_CMD55
SD_ERROR_ACMD41
SD_ERROR_CMD59

Definition at line 50 of file spi_sdcard.c.

Function Documentation

int c_entry ( void )

c_entry: Main SPI program body

Parameters:
[in] None
Returns:
int

Definition at line 468 of file spi_sdcard.c.

uint8_t crc_7 | ( | uint8_t | old_crc,
 |  | uint8_t | data
 | ) |  |

Calculate CRC-7 as required by SD specification.

Parameters:
[in] - old_crc: 0x00 to start new CRC or value from previous call to continue.
  • data: data byte to add to CRC computation
Returns:
CRC-7 checksum which MUST be augmented by crc_7augment() before used

Definition at line 208 of file spi_sdcard.c.

uint8_t crc_7final ( uint8_t old_crc )

Provides the zero-padding final step to CRC-7.

Parameters:
[in] - old_crc: value from last crc_7()call
Returns:
Finalized CRC-7 checksum

Definition at line 229 of file spi_sdcard.c.

void CS_Force ( int32_t state )

Drive CS output pin to low/high level to select slave device via /CS pin state.

Parameters:
[in] state State of CS output pin that will be driven:
  • 0: Drive CS pin to low level
  • 1: Drive CS pin to high level
Returns:
None
void CS_Init ( void )

Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.

Parameters:
None
Returns:
None
int main ( void )

Definition at line 585 of file spi_sdcard.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

sd_connect_status SD_GetCardConnectStatus ( void )

check if SD card is inserted or not

Parameters:
[in] none
Returns:
SD_CONNECTED or SD_DISCONNECTED

Definition at line 192 of file spi_sdcard.c.

sd_error SD_GetCID ( void )

Get SD card's CID register.

Parameters:
[in] none
Returns:
OK or NG OK: the returned data from SD card is stored in sd_data_buf

Definition at line 453 of file spi_sdcard.c.

sd_error SD_Init ( uint8_t retries )

Initialize SD card in SPI mode.

Parameters:
[in] - retries: number retry time
Returns:
initialization successful or terminated with specific error code

Definition at line 386 of file spi_sdcard.c.

void SD_SendCommand | ( | uint8_t | cmd,
 |  | uint8_t * | arg
 | ) |  |

Send command to SD card.

Parameters:
[in] - cmd: SD command code
  • arg: pointer to array of 4x8 bytes, argument of command
Returns:
n/a

Definition at line 273 of file spi_sdcard.c.

uint32_t SD_SendReceiveData_Polling | ( | void * | tx_buf,
 |  | void * | rx_buf,
 |  | uint32_t | length
 | ) |  |

Send/receive data over SPI bus.

Parameters:
[in] - tx_buf: pointer to transmit buffer. NULL if send 0xFF.
  • rx_buf: pointer to receive buffer NULL if nothing to receive.
  • length: number of data to send or receive
    Returns:
    the actual data sent or received.

Definition at line 251 of file spi_sdcard.c.

sd_error SD_WaitDeviceIdle ( uint32_t num_char )

Wait for SD card idle.

Parameters:
[in] - num_char: number characters (8 bits clock) to wait
Returns:
device already in idle state or need more time

Definition at line 356 of file spi_sdcard.c.

sd_error SD_WaitR1 | ( | uint8_t * | buffer,
 |  | uint32_t | length,
 |  | uint32_t | timeout
 | ) |  |

Wait for SD card R1 response.

Parameters:
[in] - buffer: pointer to receive buffer
  • length: length of receive data, must equal 1+actual length of data length = 0 if receive R1 only
    • timeout: timeout for retry
Returns:
error code

Definition at line 302 of file spi_sdcard.c.

Variable Documentation

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 118 of file spi_sdcard.c.

uint8_t sd_cmd_buf[SD_CMD_BLOCK_LENGTH]

Definition at line 132 of file spi_sdcard.c.

uint8_t sd_data_buf[SD_DATA_BLOCK_LENGTH]

Definition at line 133 of file spi_sdcard.c.

SPI_CFG_Type SPI_ConfigStruct

Definition at line 128 of file spi_sdcard.c.

SPI_DATA_SETUP_Type xferConfig

Definition at line 130 of file spi_sdcard.c.

Generated on Mon Nov 28 2011 11:15:23 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: slave

Defines | Functions | Variables
slave
SPI

Defines

#define | BUFFER_SIZE 0x40
#define | SPI_DATABIT_SIZE 10

Functions

void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
SPI_CFG_Type SPI_ConfigStruct
uint16_t | Tx_Buf [BUFFER_SIZE]
uint16_t | Rx_Buf [BUFFER_SIZE]

Define Documentation

#define BUFFER_SIZE 0x40

Max buffer length

Definition at line 39 of file spi_slave.c.

#define SPI_DATABIT_SIZE 10

Definition at line 40 of file spi_slave.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file gpdma_sleep.c.

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None
int c_entry ( void )

c_entry: Main SPI program body

Parameters:
[in] None
Returns:
int

Definition at line 162 of file spi_slave.c.

void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error)

Parameters:
[in] none
Returns:
None
int main ( void )

Definition at line 233 of file spi_slave.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 43 of file spi_slave.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 54 of file spi_slave.c.

uint16_t Rx_Buf[BUFFER_SIZE]

Definition at line 64 of file spi_slave.c.

SPI_CFG_Type SPI_ConfigStruct

Definition at line 57 of file spi_slave.c.

uint16_t Tx_Buf[BUFFER_SIZE]

Definition at line 63 of file spi_slave.c.

Generated on Mon Nov 28 2011 11:15:23 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SSP

Modules
SSP
LPC1700CMSIS Examples

Modules

dma
Master
MicroWire
sc16is750_int
sc16is750_polling
Slave
TI
Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: dma

Defines | Functions | Variables
dma
SSP

Defines

#define | DMA_DATA_SIZE 65

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Buffer_Verify (void)
Verify buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
int | c_entry (void)
c_entry: Main SSP program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
SSP_CFG_Type SSP_ConfigStruct
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err
__IO uint32_t | Channel1_TC
__IO uint32_t | Channel1_Err
uint8_t | dma_src [DMA_DATA_SIZE]
uint8_t | dma_dst [DMA_DATA_SIZE]

Define Documentation

#define DMA_DATA_SIZE 65

Definition at line 41 of file ssp_dma.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file gpdma_sleep.c.

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None
int c_entry ( void )

c_entry: Main SSP program body

Parameters:
[in] None
Returns:
int

Definition at line 196 of file ssp_dma.c.

void DMA_IRQHandler ( void )

GPDMA interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None
void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error)

Parameters:
[in] none
Returns:
None
int main ( void )

Definition at line 351 of file ssp_dma.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

__IO uint32_t Channel0_Err

Definition at line 65 of file ssp_dma.c.

__IO uint32_t Channel0_TC

Definition at line 62 of file ssp_dma.c.

__IO uint32_t Channel1_Err

Definition at line 71 of file ssp_dma.c.

__IO uint32_t Channel1_TC

Definition at line 68 of file ssp_dma.c.

uint8_t dma_dst[DMA_DATA_SIZE]

Definition at line 77 of file ssp_dma.c.

uint8_t dma_src[DMA_DATA_SIZE]

Definition at line 74 of file ssp_dma.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 44 of file ssp_dma.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 56 of file ssp_dma.c.

SSP_CFG_Type SSP_ConfigStruct

Definition at line 59 of file ssp_dma.c.

Generated on Mon Nov 28 2011 11:15:23 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Master

Defines | Functions | Variables
Master
SSP

Defines

#define | BUFFER_SIZE 0x40

Functions

void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main SSP program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
SSP_CFG_Type SSP_ConfigStruct
uint8_t | Tx_Buf [BUFFER_SIZE]
uint8_t | Rx_Buf [BUFFER_SIZE]

Define Documentation

#define BUFFER_SIZE 0x40

Max buffer length

Definition at line 39 of file ssp_master.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file gpdma_sleep.c.

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None
int c_entry ( void )

c_entry: Main SSP program body

Parameters:
[in] None
Returns:
int

Definition at line 138 of file ssp_master.c.

void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error)

Parameters:
[in] none
Returns:
None
int main ( void )

Definition at line 210 of file ssp_master.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 43 of file ssp_master.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 54 of file ssp_master.c.

uint8_t Rx_Buf[BUFFER_SIZE]

Definition at line 63 of file ssp_master.c.

SSP_CFG_Type SSP_ConfigStruct

Definition at line 57 of file ssp_master.c.

uint8_t Tx_Buf[BUFFER_SIZE]

Definition at line 60 of file ssp_master.c.

Generated on Mon Nov 28 2011 11:15:23 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MicroWire

Defines | Functions | Variables
MicroWire
SSP

Defines

#define | IDLE_CHAR 0xFF
#define | USEDSSPDEV_M 0
#define | USEDSSPDEV_S 1
#define | BUFFER_SIZE 0x40
#define | MicroWire_WR_CMD ((uint8_t)(0x00))
#define | MicroWire_RD_CMD ((uint8_t)(0x01))
#define | SSPDEV_M LPC_SSP0
#define | SSPDEV_S LPC_SSP1

Functions

void | ssp_MW_SendCMD (LPC_SSP_TypeDef *SSPx, uint8_t cmd)
Send command to slave in master mode.
uint16_t | ssp_MW_GetRSP (LPC_SSP_TypeDef *SSPx)
Get respond from slave after sending a command in master mode.
uint8_t | ssp_MW_GetCMD (LPC_SSP_TypeDef *SSPx)
Get command from master in slave mode.
void | ssp_MW_SendRSP (LPC_SSP_TypeDef *SSPx, uint16_t Rsp)
Send respond to master in slave mode.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Buffer_Verify (void)
Verify buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
int | c_entry (void)
c_entry: Main MICROWIRE program body
int | main (void)

Variables

uint8_t * | pRdBuf_M
uint32_t | RdIdx_M
uint32_t | DatLen_M
uint8_t | Master_Rx_Buf [BUFFER_SIZE]
uint8_t * | pWrBuf_S
uint32_t | WrIdx_S
uint32_t | DatLen_S
uint8_t | Slave_Tx_Buf [BUFFER_SIZE]
uint8_t | Last_cmd
uint8_t | menu1 [] = "********************************************************************************\n\r"
SSP_CFG_Type SSP_ConfigStruct

Define Documentation

#define BUFFER_SIZE 0x40

Max buffer length

Definition at line 49 of file microwire_test.c.

#define IDLE_CHAR 0xFF

Definition at line 40 of file microwire_test.c.

#define MicroWire_RD_CMD ((uint8_t)(0x01))

Definition at line 58 of file microwire_test.c.

#define MicroWire_WR_CMD ((uint8_t)(0x00))

Definition at line 56 of file microwire_test.c.

#define SSPDEV_M LPC_SSP0

Definition at line 66 of file microwire_test.c.

#define SSPDEV_S LPC_SSP1

Definition at line 76 of file microwire_test.c.

#define USEDSSPDEV_M 0

Used SSP device as master definition

Definition at line 43 of file microwire_test.c.

#define USEDSSPDEV_S 1

Used SSP device as slave definition

Definition at line 46 of file microwire_test.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file gpdma_sleep.c.

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None
int c_entry ( void )

c_entry: Main MICROWIRE program body

Parameters:
[in] None
Returns:
int

Definition at line 248 of file microwire_test.c.

void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error)

Parameters:
[in] none
Returns:
None
int main ( void )

Definition at line 397 of file microwire_test.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

uint8_t ssp_MW_GetCMD ( LPC_SSP_TypeDef * SSPx )

Get command from master in slave mode.

Parameters:
[in] None
Returns:
None

Definition at line 161 of file microwire_test.c.

uint16_t ssp_MW_GetRSP ( LPC_SSP_TypeDef * SSPx )

Get respond from slave after sending a command in master mode.

Parameters:
[in] None
Returns:
None

Definition at line 150 of file microwire_test.c.

void ssp_MW_SendCMD | ( | LPC_SSP_TypeDef * | SSPx,
 |  | uint8_t | cmd
 | ) |  |

Send command to slave in master mode.

Parameters:
[in] None
Returns:
None

Definition at line 137 of file microwire_test.c.

void ssp_MW_SendRSP | ( | LPC_SSP_TypeDef * | SSPx,
 |  | uint16_t | Rsp
 | ) |  |

Send respond to master in slave mode.

Parameters:
[in] None
Returns:
None

Definition at line 174 of file microwire_test.c.

Variable Documentation

uint32_t DatLen_M

Definition at line 87 of file microwire_test.c.

uint32_t DatLen_S

Definition at line 98 of file microwire_test.c.

uint8_t Last_cmd

Definition at line 102 of file microwire_test.c.

uint8_t Master_Rx_Buf[BUFFER_SIZE]

Definition at line 89 of file microwire_test.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 105 of file microwire_test.c.

uint8_t* pRdBuf_M

Definition at line 83 of file microwire_test.c.

uint8_t* pWrBuf_S

Definition at line 94 of file microwire_test.c.

uint32_t RdIdx_M

Definition at line 85 of file microwire_test.c.

uint8_t Slave_Tx_Buf[BUFFER_SIZE]

Definition at line 100 of file microwire_test.c.

SSP_CFG_Type SSP_ConfigStruct

Definition at line 119 of file microwire_test.c.

uint32_t WrIdx_S

Definition at line 96 of file microwire_test.c.

Generated on Mon Nov 28 2011 11:15:23 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: sc16is750_int

Defines | Functions | Variables
sc16is750_int
SSP

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | IDLE_CHAR 0xFF
#define | SC16IS740_WR_CMD(x) ((uint8_t) (x << 3))
#define | SC16IS740_RD_CMD(x) ((uint8_t) ((x << 3) | 0x80))
#define | SC16IS740_IODIR_REG 0x0A
#define | SC16IS740_IOSTATE_REG 0x0B
#define | SC16IS740_IOCON_REG 0x0E

Functions

void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main SSP program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | iocon_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}
uint8_t | iodir_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}
uint8_t | iostate_on [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}
uint8_t | iostate_off [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}
uint8_t | sspreadbuf [2]
__IO FlagStatus | complete
SSP_CFG_Type SSP_ConfigStruct
SSP_DATA_SETUP_Type xferConfig

Define Documentation

#define CS_PIN_NUM 16

Definition at line 42 of file sc16is750_int.c.

#define CS_PORT_NUM 0

Definition at line 40 of file sc16is750_int.c.

#define IDLE_CHAR 0xFF

Definition at line 45 of file sc16is750_int.c.

#define SC16IS740_IOCON_REG 0x0E

Definition at line 54 of file sc16is750_int.c.

#define SC16IS740_IODIR_REG 0x0A

Definition at line 52 of file sc16is750_int.c.

#define SC16IS740_IOSTATE_REG 0x0B

Definition at line 53 of file sc16is750_int.c.

#define SC16IS740_RD_CMD ( x ) ((uint8_t) ((x << 3) | 0x80))

Definition at line 49 of file sc16is750_int.c.

#define SC16IS740_WR_CMD ( x ) ((uint8_t) (x << 3))

Definition at line 48 of file sc16is750_int.c.

Function Documentation

int c_entry ( void )

c_entry: Main SSP program body

Parameters:
[in] None
Returns:
int

Definition at line 263 of file sc16is750_int.c.

void CS_Force ( int32_t state )

Drive CS output pin to low/high level to select slave device via /CS pin state.

Parameters:
[in] state State of CS output pin that will be driven:
  • 0: Drive CS pin to low level
  • 1: Drive CS pin to high level
Returns:
None
void CS_Init ( void )

Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.

Parameters:
None
Returns:
None
int main ( void )

Definition at line 395 of file sc16is750_int.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

__IO FlagStatus complete

Definition at line 79 of file sc16is750_int.c.

uint8_t iocon_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}

Definition at line 72 of file sc16is750_int.c.

uint8_t iodir_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}

Definition at line 73 of file sc16is750_int.c.

uint8_t iostate_off[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}

Definition at line 75 of file sc16is750_int.c.

uint8_t iostate_on[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}

Definition at line 74 of file sc16is750_int.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 57 of file sc16is750_int.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 70 of file sc16is750_int.c.

SSP_CFG_Type SSP_ConfigStruct

Definition at line 82 of file sc16is750_int.c.

uint8_t sspreadbuf[2]

Definition at line 76 of file sc16is750_int.c.

SSP_DATA_SETUP_Type xferConfig

Definition at line 83 of file sc16is750_int.c.

Generated on Mon Nov 28 2011 11:15:23 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: sc16is750_polling

Defines | Functions | Variables
sc16is750_polling
SSP

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | SC16IS740_WR_CMD(x) ((uint8_t) (x << 3))
#define | SC16IS740_RD_CMD(x) ((uint8_t) ((x << 3) | 0x80))
#define | SC16IS740_IODIR_REG 0x0A
#define | SC16IS740_IOSTATE_REG 0x0B
#define | SC16IS740_IOCON_REG 0x0E

Functions

void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main SSP program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
SSP_CFG_Type SSP_ConfigStruct
uint8_t | iocon_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}
uint8_t | iodir_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}
uint8_t | iostate_on [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}
uint8_t | iostate_off [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}
uint8_t | sspreadbuf [2]

Define Documentation

#define CS_PIN_NUM 16

Definition at line 43 of file sc16is750_polling.c.

#define CS_PORT_NUM 0

Definition at line 41 of file sc16is750_polling.c.

#define SC16IS740_IOCON_REG 0x0E

Definition at line 52 of file sc16is750_polling.c.

#define SC16IS740_IODIR_REG 0x0A

Definition at line 50 of file sc16is750_polling.c.

#define SC16IS740_IOSTATE_REG 0x0B

Definition at line 51 of file sc16is750_polling.c.

#define SC16IS740_RD_CMD ( x ) ((uint8_t) ((x << 3) | 0x80))

Definition at line 47 of file sc16is750_polling.c.

#define SC16IS740_WR_CMD ( x ) ((uint8_t) (x << 3))

Definition at line 46 of file sc16is750_polling.c.

Function Documentation

int c_entry ( void )

c_entry: Main SSP program body

Parameters:
[in] None
Returns:
int

Definition at line 132 of file sc16is750_polling.c.

void CS_Force ( int32_t state )

Drive CS output pin to low/high level to select slave device via /CS pin state.

Parameters:
[in] state State of CS output pin that will be driven:
  • 0: Drive CS pin to low level
  • 1: Drive CS pin to high level
Returns:
None
void CS_Init ( void )

Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.

Parameters:
None
Returns:
None
int main ( void )

Definition at line 256 of file sc16is750_polling.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t iocon_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}

Definition at line 73 of file sc16is750_polling.c.

uint8_t iodir_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}

Definition at line 74 of file sc16is750_polling.c.

uint8_t iostate_off[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}

Definition at line 76 of file sc16is750_polling.c.

uint8_t iostate_on[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}

Definition at line 75 of file sc16is750_polling.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 56 of file sc16is750_polling.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 68 of file sc16is750_polling.c.

SSP_CFG_Type SSP_ConfigStruct

Definition at line 71 of file sc16is750_polling.c.

uint8_t sspreadbuf[2]

Definition at line 77 of file sc16is750_polling.c.

Generated on Mon Nov 28 2011 11:15:23 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Slave

Defines | Functions | Variables
Slave
SSP

Defines

#define | BUFFER_SIZE 0x40

Functions

void | SSP0_IRQHandler (void)
SSP0 Interrupt used for reading and writing handler.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main SSP program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
SSP_CFG_Type SSP_ConfigStruct
SSP_DATA_SETUP_Type xferConfig
uint8_t | Tx_Buf [BUFFER_SIZE]
uint8_t | Rx_Buf [BUFFER_SIZE]
__IO FlagStatus | complete

Define Documentation

#define BUFFER_SIZE 0x40

Max buffer length

Definition at line 40 of file ssp_slave.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file gpdma_sleep.c.

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None
int c_entry ( void )

c_entry: Main SSP program body

Parameters:
[in] None
Returns:
int

Definition at line 266 of file ssp_slave.c.

void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error)

Parameters:
[in] none
Returns:
None
int main ( void )

Definition at line 341 of file ssp_slave.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

void SSP0_IRQHandler ( void )

SSP0 Interrupt used for reading and writing handler.

Parameters:
None
Returns:
None

Variable Documentation

__IO FlagStatus complete

Definition at line 68 of file ssp_slave.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 44 of file ssp_slave.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 55 of file ssp_slave.c.

uint8_t Rx_Buf[BUFFER_SIZE]

Definition at line 65 of file ssp_slave.c.

SSP_CFG_Type SSP_ConfigStruct

Definition at line 58 of file ssp_slave.c.

uint8_t Tx_Buf[BUFFER_SIZE]

Definition at line 63 of file ssp_slave.c.

SSP_DATA_SETUP_Type xferConfig

Definition at line 60 of file ssp_slave.c.

Generated on Mon Nov 28 2011 11:15:23 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TI

Defines | Functions | Variables
TI
SSP

Defines

#define | IDLE_CHAR 0xFF
#define | USEDSSPDEV_M 0
#define | USEDSSPDEV_S 1
#define | BUFFER_SIZE 0x40
#define | SSPDEV_M LPC_SSP0
#define | SSPDEV_S LPC_SSP1

Functions

void | SSP0_IRQHandler (void)
SSP0 Interrupt used for reading and writing handler.
void | SSP1_IRQHandler (void)
SSP1 Interrupt used for reading and writing handler.
void | ssp_Master_IntHandler (void)
SSP Master Interrupt sub-routine used for reading and writing handler.
void | ssp_Slave_IntHandler (void)
SSP Slave Interrupt sub-routine used for reading and writing handler.
int32_t | ssp_MasterReadWrite (LPC_SSP_TypeDef *SSPx, void *rbuffer, void *wbuffer, uint32_t length)
SSP Read write in polling mode function (Master mode)
int32_t | ssp_SlaveReadWrite (LPC_SSP_TypeDef *SSPx, void *rbuffer, void *wbuffer, uint32_t length)
SSP Read write in polling mode function (Slave mode)
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Buffer_Verify (void)
Verify buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
int | c_entry (void)
c_entry: Main TI program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
SSP_CFG_Type SSP_ConfigStruct
uint8_t * | pRdBuf_M
uint8_t * | pWrBuf_M
uint32_t | RdIdx_M
uint32_t | WrIdx_M
uint32_t | DatLen_M
__IO Bool | complete_M
uint8_t | Master_Tx_Buf [BUFFER_SIZE]
uint8_t | Master_Rx_Buf [BUFFER_SIZE]
uint8_t * | pRdBuf_S
uint8_t * | pWrBuf_S
uint32_t | RdIdx_S
uint32_t | WrIdx_S
uint32_t | DatLen_S
__IO Bool | complete_S
uint8_t | Slave_Tx_Buf [BUFFER_SIZE]
uint8_t | Slave_Rx_Buf [BUFFER_SIZE]

Define Documentation

#define BUFFER_SIZE 0x40

Max buffer length

Definition at line 48 of file ti_test.c.

#define IDLE_CHAR 0xFF

Definition at line 39 of file ti_test.c.

#define SSPDEV_M LPC_SSP0

Definition at line 55 of file ti_test.c.

#define SSPDEV_S LPC_SSP1

Definition at line 65 of file ti_test.c.

#define USEDSSPDEV_M 0

Used SSP device as master definition

Definition at line 42 of file ti_test.c.

#define USEDSSPDEV_S 1

Used SSP device as slave definition

Definition at line 45 of file ti_test.c.

Function Documentation

void Buffer_Init ( void )

Initialize buffer.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file gpdma_sleep.c.

void Buffer_Verify ( void )

Verify buffer.

Parameters:
[in] none
Returns:
None
int c_entry ( void )

c_entry: Main TI program body

Parameters:
[in] None
Returns:
int

Definition at line 515 of file ti_test.c.

void Error_Loop ( void )

Error Loop (called by Buffer_Verify() if any error)

Parameters:
[in] none
Returns:
None
int main ( void )

Definition at line 639 of file ti_test.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

void SSP0_IRQHandler ( void )

SSP0 Interrupt used for reading and writing handler.

Parameters:
None
Returns:
None
void SSP1_IRQHandler ( void )

SSP1 Interrupt used for reading and writing handler.

Parameters:
None
Returns:
None

Definition at line 338 of file ti_test.c.

void ssp_Master_IntHandler ( void )

SSP Master Interrupt sub-routine used for reading and writing handler.

Parameters:
None
Returns:
None

Definition at line 152 of file ti_test.c.

int32_t ssp_MasterReadWrite | ( | LPC_SSP_TypeDef * | SSPx,
 |  | void * | rbuffer,
 |  | void * | wbuffer,
 |  | uint32_t | length
 | ) |  |

SSP Read write in polling mode function (Master mode)

Parameters:
[in] SSPdev,: Pointer to SSP device
[out] rbuffer,: pointer to read buffer
[in] wbuffer,: pointer to write buffer
[in] length,: length of data to read and write
Returns:
0 if there no data to send, otherwise return 1

Definition at line 359 of file ti_test.c.

void ssp_Slave_IntHandler ( void )

SSP Slave Interrupt sub-routine used for reading and writing handler.

Parameters:
None
Returns:
None

Definition at line 238 of file ti_test.c.

int32_t ssp_SlaveReadWrite | ( | LPC_SSP_TypeDef * | SSPx,
 |  | void * | rbuffer,
 |  | void * | wbuffer,
 |  | uint32_t | length
 | ) |  |

SSP Read write in polling mode function (Slave mode)

Parameters:
[in] SSPdev,: Pointer to SSP device
[out] rbuffer,: pointer to read buffer
[in] wbuffer,: pointer to write buffer
[in] length,: length of data to read and write
Returns:
0 if there no data to send, otherwise return 1

Definition at line 404 of file ti_test.c.

Variable Documentation

__IO Bool complete_M

Definition at line 100 of file ti_test.c.

__IO Bool complete_S

Definition at line 119 of file ti_test.c.

uint32_t DatLen_M

Definition at line 98 of file ti_test.c.

uint32_t DatLen_S

Definition at line 117 of file ti_test.c.

uint8_t Master_Rx_Buf[BUFFER_SIZE]

Definition at line 104 of file ti_test.c.

uint8_t Master_Tx_Buf[BUFFER_SIZE]

Definition at line 102 of file ti_test.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 71 of file ti_test.c.

uint8_t menu2[] = "Demo terminated! \n\r"

Definition at line 83 of file ti_test.c.

uint8_t* pRdBuf_M

Definition at line 90 of file ti_test.c.

uint8_t* pRdBuf_S

Definition at line 109 of file ti_test.c.

uint8_t* pWrBuf_M

Definition at line 92 of file ti_test.c.

uint8_t* pWrBuf_S

Definition at line 111 of file ti_test.c.

uint32_t RdIdx_M

Definition at line 94 of file ti_test.c.

uint32_t RdIdx_S

Definition at line 113 of file ti_test.c.

uint8_t Slave_Rx_Buf[BUFFER_SIZE]

Definition at line 123 of file ti_test.c.

uint8_t Slave_Tx_Buf[BUFFER_SIZE]

Definition at line 121 of file ti_test.c.

SSP_CFG_Type SSP_ConfigStruct

Definition at line 86 of file ti_test.c.

uint32_t WrIdx_M

Definition at line 96 of file ti_test.c.

uint32_t WrIdx_S

Definition at line 115 of file ti_test.c.

Generated on Mon Nov 28 2011 11:15:23 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SysTick

Modules
SysTick
LPC1700CMSIS Examples

Modules

10ms_base
STCLK
Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: 10ms_base

Functions | Variables
10ms_base
SysTick

Functions

void | SysTick_Handler (void)
SysTick interrupt handler.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

FunctionalState | Cur_State = ENABLE

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 73 of file 10ms_base.c.

int main ( void )

Definition at line 94 of file 10ms_base.c.

void SysTick_Handler ( void )

SysTick interrupt handler.

SysTick handler sub-routine (1ms)

Parameters:
None
Returns:
None

Definition at line 1006 of file tcpip.c.

Variable Documentation

FunctionalState Cur_State = ENABLE

Definition at line 37 of file 10ms_base.c.

Generated on Mon Nov 28 2011 11:15:24 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: STCLK

Functions | Variables
STCLK
SysTick

Functions

void | SysTick_Handler (void)
SysTick interrupt handler.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

FunctionalState | Cur_State = ENABLE
Bool | IO_State = FALSE

Function Documentation

int c_entry ( void )

c_entry: Main program body

Parameters:
[in] None
Returns:
int

Definition at line 76 of file systick_stclk.c.

int main ( void )

Definition at line 141 of file systick_stclk.c.

void SysTick_Handler ( void )

SysTick interrupt handler.

SysTick handler sub-routine (1ms)

Parameters:
None
Returns:
None

Definition at line 1006 of file tcpip.c.

Variable Documentation

FunctionalState Cur_State = ENABLE

Definition at line 39 of file systick_stclk.c.

Bool IO_State = FALSE

Definition at line 40 of file systick_stclk.c.

Generated on Mon Nov 28 2011 11:15:24 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TIMER

Modules
TIMER
LPC1700CMSIS Examples

Modules

Capture
FreqMeasure
Gen_Diff_Delay
Gen_Diff_Freqs
Interrupt_Match
Polling_Match
PWMSignal
Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Capture

Functions | Variables
Capture
TIMER

Functions

void | TIMER0_IRQHandler (void)
TIMER0 interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
UART_CFG_Type UARTConfigStruct
uint32_t | MatchCount
TIM_TIMERCFG_Type TIM_ConfigStruct
TIM_MATCHCFG_Type TIM_MatchConfigStruct
TIM_CAPTURECFG_Type TIM_CaptureConfigStruct
uint8_t volatile | timer0_flag = FALSE
uint8_t volatile | timer1_flag = FALSE

Function Documentation

int c_entry ( void )

c_entry: Main TIMER program body

Parameters:
[in] None
Returns:
int

Definition at line 114 of file timer_capture.c.

int main ( void )

Definition at line 169 of file timer_capture.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file adc_burst_test.c.

void TIMER0_IRQHandler ( void )

TIMER0 interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

Variable Documentation

uint32_t MatchCount

Definition at line 51 of file timer_capture.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 38 of file timer_capture.c.

TIM_CAPTURECFG_Type TIM_CaptureConfigStruct

Definition at line 56 of file timer_capture.c.

TIM_TIMERCFG_Type TIM_ConfigStruct

Definition at line 54 of file timer_capture.c.

TIM_MATCHCFG_Type TIM_MatchConfigStruct

Definition at line 55 of file timer_capture.c.

uint8_t volatile timer0_flag = FALSE

Definition at line 57 of file timer_capture.c.

uint8_t volatile timer1_flag = FALSE

Definition at line 57 of file timer_capture.c.

UART_CFG_Type UARTConfigStruct

Definition at line 50 of file timer_capture.c.

Generated on Mon Nov 28 2011 11:15:24 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: FreqMeasure

Functions | Variables
FreqMeasure
TIMER

Functions

void | TIMER0_IRQHandler (void)
TIMER0 interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
TIM_TIMERCFG_Type TIM_ConfigStruct
TIM_CAPTURECFG_Type TIM_CaptureConfigStruct
BOOL_8 first_capture
BOOL_8 done
uint32_t | capture
uint8_t | count = 0

Function Documentation

int c_entry ( void )

c_entry: Main TIMER program body

Parameters:
[in] None
Returns:
int

Definition at line 107 of file freqmeasure.c.

int main ( void )

Definition at line 226 of file freqmeasure.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file adc_burst_test.c.

void TIMER0_IRQHandler ( void )

TIMER0 interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

Variable Documentation

uint32_t capture

Definition at line 54 of file freqmeasure.c.

uint8_t count = 0

Definition at line 55 of file freqmeasure.c.

BOOL_8 done

Definition at line 53 of file freqmeasure.c.

BOOL_8 first_capture

Definition at line 53 of file freqmeasure.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 39 of file freqmeasure.c.

TIM_CAPTURECFG_Type TIM_CaptureConfigStruct

Definition at line 51 of file freqmeasure.c.

TIM_TIMERCFG_Type TIM_ConfigStruct

Definition at line 50 of file freqmeasure.c.

Generated on Mon Nov 28 2011 11:15:24 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Gen_Diff_Delay

Functions | Variables
Gen_Diff_Delay
TIMER

Functions

void | print_menu (void)
Print menu.
void | TIMER0_IRQHandler (void)
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
BOOL_8 | toggle = TRUE
uint32_t | T1
uint32_t | T2

Function Documentation

int c_entry ( void )

c_entry: Main TIMER program body

Parameters:
[in] None
Returns:
int

Definition at line 91 of file gen_diff_delay.c.

int main ( void )

Definition at line 201 of file gen_diff_delay.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file adc_burst_test.c.

void TIMER0_IRQHandler ( void )

Variable Documentation

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 38 of file gen_diff_delay.c.

uint32_t T1

Definition at line 49 of file gen_diff_delay.c.

uint32_t T2

Definition at line 49 of file gen_diff_delay.c.

BOOL_8 toggle = TRUE

Definition at line 48 of file gen_diff_delay.c.

Generated on Mon Nov 28 2011 11:15:24 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Gen_Diff_Freqs

Functions | Variables
Gen_Diff_Freqs
TIMER

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"

Function Documentation

int c_entry ( void )

c_entry: Main TIMER program body

Parameters:
[in] None
Returns:
int

Definition at line 71 of file gen_diff_freqs.c.

int main ( void )

Definition at line 190 of file gen_diff_freqs.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 38 of file gen_diff_freqs.c.

Generated on Mon Nov 28 2011 11:15:24 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Interrupt_Match

Functions | Variables
Interrupt_Match
TIMER

Functions

void | TIMER0_IRQHandler (void)
TIMER0 interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
TIM_TIMERCFG_Type TIM_ConfigStruct
TIM_MATCHCFG_Type TIM_MatchConfigStruct
uint8_t volatile | timer0_flag = FALSE
uint8_t volatile | timer1_flag = FALSE
FunctionalState | LEDStatus = ENABLE

Function Documentation

int c_entry ( void )

c_entry: Main TIMER program body

Parameters:
[in] None
Returns:
int

Definition at line 93 of file timer_int_match.c.

int main ( void )

Definition at line 151 of file timer_int_match.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file adc_burst_test.c.

void TIMER0_IRQHandler ( void )

TIMER0 interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

Variable Documentation

FunctionalState LEDStatus = ENABLE

Definition at line 52 of file timer_int_match.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 38 of file timer_int_match.c.

TIM_TIMERCFG_Type TIM_ConfigStruct

Definition at line 49 of file timer_int_match.c.

TIM_MATCHCFG_Type TIM_MatchConfigStruct

Definition at line 50 of file timer_int_match.c.

uint8_t volatile timer0_flag = FALSE

Definition at line 51 of file timer_int_match.c.

uint8_t volatile timer1_flag = FALSE

Definition at line 51 of file timer_int_match.c.

Generated on Mon Nov 28 2011 11:15:24 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Polling_Match

Functions | Variables
Polling_Match
TIMER

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
TIM_TIMERCFG_Type TIM_ConfigStruct
TIM_MATCHCFG_Type TIM_MatchConfigStruct

Function Documentation

int c_entry ( void )

c_entry: Main TIMER program body

Parameters:
[in] None
Returns:
int

Definition at line 74 of file timer_poll_match.c.

int main ( void )

Definition at line 129 of file timer_poll_match.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 38 of file timer_poll_match.c.

TIM_TIMERCFG_Type TIM_ConfigStruct

Definition at line 49 of file timer_poll_match.c.

TIM_MATCHCFG_Type TIM_MatchConfigStruct

Definition at line 50 of file timer_poll_match.c.

Generated on Mon Nov 28 2011 11:15:24 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWMSignal

Functions | Variables
PWMSignal
TIMER

Functions

void | TIMER0_IRQHandler (void)
TIMER0 interrupt handler.
void | TIMER1_IRQHandler (void)
TIMER1 interrupt handler.
void | TIMER2_IRQHandler (void)
TIMER2 interrupt handler.
void | TIMER3_IRQHandler (void)
TIMER3 interrupt handler.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
FunctionalState | PWM0_State = ENABLE
FunctionalState | PWM1_State = ENABLE
FunctionalState | PWM2_State = ENABLE
FunctionalState | PWM3_State = ENABLE
TIM_TIMERCFG_Type TIM_ConfigStruct
TIM_MATCHCFG_Type TIM_MatchConfigStruct

Function Documentation

int c_entry ( void )

c_entry: Main TIMER program body

Parameters:
[in] None
Returns:
int

Definition at line 170 of file pwm_signal.c.

int main ( void )

Definition at line 274 of file pwm_signal.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

void TIMER0_IRQHandler ( void )

TIMER0 interrupt handler.

Parameters:
None
Returns:
None
void TIMER1_IRQHandler ( void )

TIMER1 interrupt handler.

Parameters:
None
Returns:
None
void TIMER2_IRQHandler ( void )

TIMER2 interrupt handler.

Parameters:
None
Returns:
None

Definition at line 118 of file pwm_signal.c.

void TIMER3_IRQHandler ( void )

TIMER3 interrupt handler.

Parameters:
None
Returns:
None

Definition at line 142 of file pwm_signal.c.

Variable Documentation

uint8_t menu[] = "********************************************************************************\n\r"

Definition at line 39 of file pwm_signal.c.

FunctionalState PWM0_State = ENABLE

Definition at line 48 of file pwm_signal.c.

FunctionalState PWM1_State = ENABLE

Definition at line 49 of file pwm_signal.c.

FunctionalState PWM2_State = ENABLE

Definition at line 50 of file pwm_signal.c.

FunctionalState PWM3_State = ENABLE

Definition at line 51 of file pwm_signal.c.

TIM_TIMERCFG_Type TIM_ConfigStruct

Definition at line 53 of file pwm_signal.c.

TIM_MATCHCFG_Type TIM_MatchConfigStruct

Definition at line 54 of file pwm_signal.c.

Generated on Mon Nov 28 2011 11:15:24 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART

Modules
UART
LPC1700CMSIS Examples

Modules

IrDA
AutoBaud
DMA
HWFlowControl
Interrupt
Polling
RS485_Master
RS485_Slave
UART1_FullModem
Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: IrDA

Modules
IrDA
UART

Modules

Receive
Transmit
Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Receive

Defines | Functions | Variables
Receive
IrDA

Defines

#define | UART_PORT 0
#define | TEST_UART LPC_UART0
#define | TEST_IRDA LPC_UART3

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART IrDA mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps communicates with PC \n\r\t UART3 - 9600bps receives infrared signal\n\r"
uint8_t | menu3 [] = "\t The demo keep reading input infrared signal and display through 8 led bank \n\r"

Define Documentation

#define TEST_IRDA LPC_UART3

Definition at line 44 of file uart_irda_receive.c.

#define TEST_UART LPC_UART0

Definition at line 40 of file uart_irda_receive.c.

#define UART_PORT 0

Definition at line 37 of file uart_irda_receive.c.

Function Documentation

int c_entry ( void )

c_entry: Main UART program body

Parameters:
[in] None
Returns:
int

Definition at line 74 of file uart_irda_receive.c.

int main ( void )

Definition at line 199 of file uart_irda_receive.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t menu1[] = "Hello NXP Semiconductors \n\r"

Definition at line 47 of file uart_irda_receive.c.

uint8_t menu2[] = "UART IrDA mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps communicates with PC \n\r\t UART3 - 9600bps receives infrared signal\n\r"

Definition at line 48 of file uart_irda_receive.c.

uint8_t menu3[] = "\t The demo keep reading input infrared signal and display through 8 led bank \n\r"

Definition at line 49 of file uart_irda_receive.c.

Generated on Mon Nov 28 2011 11:15:24 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Transmit

Defines | Functions | Variables
Transmit
IrDA

Defines

#define | UART_PORT 0
#define | TEST_UART LPC_UART0
#define | TEST_IRDA LPC_UART3

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART IrDA mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps communicates with PC \n\r\t UART3 - 9600bps transmits infrared signals\n\r"
uint8_t | menu3 [] = "\t\t- Press Esc to terminate this demo \n\r\t\t- Press 'r' to re-print this menu \n\r"
uint8_t | menu4 [] = "\n\rUART demo terminated!"
uint8_t | menu5 [] = "\n\rEnter a hex byte value to transmit: 0x"

Define Documentation

#define TEST_IRDA LPC_UART3

Definition at line 43 of file uart_irda_transmit.c.

#define TEST_UART LPC_UART0

Definition at line 39 of file uart_irda_transmit.c.

#define UART_PORT 0

Definition at line 36 of file uart_irda_transmit.c.

Function Documentation

int c_entry ( void )

c_entry: Main UART program body

Parameters:
[in] None
Returns:
int

Definition at line 75 of file uart_irda_transmit.c.

int main ( void )

Definition at line 243 of file uart_irda_transmit.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t menu1[] = "Hello NXP Semiconductors \n\r"

Definition at line 46 of file uart_irda_transmit.c.

uint8_t menu2[] = "UART IrDA mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps communicates with PC \n\r\t UART3 - 9600bps transmits infrared signals\n\r"

Definition at line 47 of file uart_irda_transmit.c.

uint8_t menu3[] = "\t\t- Press Esc to terminate this demo \n\r\t\t- Press 'r' to re-print this menu \n\r"

Definition at line 48 of file uart_irda_transmit.c.

uint8_t menu4[] = "\n\rUART demo terminated!"

Definition at line 49 of file uart_irda_transmit.c.

uint8_t menu5[] = "\n\rEnter a hex byte value to transmit: 0x"

Definition at line 50 of file uart_irda_transmit.c.

Generated on Mon Nov 28 2011 11:15:24 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: AutoBaud

Functions | Variables
AutoBaud
UART

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)

Variables

uint8_t | syncmenu [] = "AutoBaudrate Status: Synchronous! \n\r"
uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART0 - Auto Baud rate mode used \n\r"
uint8_t | menu3 [] = "UART demo terminated!\n"
__IO FlagStatus | Synchronous

Function Documentation

int c_entry ( void )

c_entry: Main UART program body

Parameters:
[in] None
Returns:
int

Definition at line 132 of file uart_autobaud_test.c.

int main ( void )

Definition at line 274 of file uart_autobaud_test.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t menu1[] = "Hello NXP Semiconductors \n\r"

Definition at line 38 of file uart_autobaud_test.c.

uint8_t menu2[] = "UART0 - Auto Baud rate mode used \n\r"

Definition at line 39 of file uart_autobaud_test.c.

uint8_t menu3[] = "UART demo terminated!\n"

Definition at line 43 of file uart_autobaud_test.c.

__IO FlagStatus Synchronous

Definition at line 46 of file uart_autobaud_test.c.

uint8_t syncmenu[] = "AutoBaudrate Status: Synchronous! \n\r"

Definition at line 37 of file uart_autobaud_test.c.

Generated on Mon Nov 28 2011 11:15:24 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DMA

Defines | Functions | Variables
DMA
UART

Defines

#define | RX_BUF_SIZE 0x10

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)

Variables

uint8_t | menu1 [] = " on UART0 peripheral. To use UART with DMA mode, FIFO function must be enabled \n\r"
uint8_t | menu3 [] = "UART demo terminated!\n"
__IO uint8_t | rx_buf [RX_BUF_SIZE]
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err
__IO uint32_t | Channel1_TC
__IO uint32_t | Channel1_Err

Define Documentation

#define RX_BUF_SIZE 0x10

Definition at line 38 of file uart_dma_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main UART program body

Parameters:
[in] None
Returns:
int

Definition at line 130 of file uart_dma_test.c.

void DMA_IRQHandler ( void )

GPDMA interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None
int main ( void )

Definition at line 294 of file uart_dma_test.c.

void print_menu ( void )

Print menu.

Print Welcome Screen Menu subroutine.

print_menu

Print menu screen.

Print Welcome menu.

print menu

Parameters:
[in] None
Returns:
None
Parameters:
[in] none
Returns:
none
Parameters:
[in] none
Returns:
None
Parameters:
None
Returns:
None
Parameters:
[in] None
Returns:
None

Print menu.

Parameters:
[in] none
Returns:
none

Print menu.

Parameters:
[in] none
Returns:
None
Parameters:
[in] none
Returns:
None

Print menu.

Parameters:
[in] None
Returns:
None

Print menu.

Parameters:
None
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

__IO uint32_t Channel0_Err

Definition at line 58 of file uart_dma_test.c.

__IO uint32_t Channel0_TC

Definition at line 55 of file uart_dma_test.c.

__IO uint32_t Channel1_Err

Definition at line 64 of file uart_dma_test.c.

__IO uint32_t Channel1_TC

Definition at line 61 of file uart_dma_test.c.

uint8_t menu1[] = " on UART0 peripheral. To use UART with DMA mode, FIFO function must be enabled \n\r"

Definition at line 41 of file uart_dma_test.c.

uint8_t menu3[] = "UART demo terminated!\n"

Definition at line 49 of file uart_dma_test.c.

__IO uint8_t rx_buf[RX_BUF_SIZE]

Definition at line 52 of file uart_dma_test.c.

Generated on Mon Nov 28 2011 11:15:24 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: HWFlowControl

Defines | Functions | Variables
HWFlowControl
UART

Defines

#define | TEST_UART (LPC_UART_TypeDef *)LPC_UART1

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART hardware flow control mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART1 - 9600bps \n\r"
uint8_t | menu3 [] = "UART demo terminated!"

Define Documentation

#define TEST_UART (LPC_UART_TypeDef *)LPC_UART1

Definition at line 37 of file uart_hw_flow_control.c.

Function Documentation

int c_entry ( void )

c_entry: Main UART program body

Parameters:
[in] None
Returns:
int

Definition at line 65 of file uart_hw_flow_control.c.

int main ( void )

Definition at line 176 of file uart_hw_flow_control.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t menu1[] = "Hello NXP Semiconductors \n\r"

Definition at line 40 of file uart_hw_flow_control.c.

uint8_t menu2[] = "UART hardware flow control mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART1 - 9600bps \n\r"

Definition at line 41 of file uart_hw_flow_control.c.

uint8_t menu3[] = "UART demo terminated!"

Definition at line 42 of file uart_hw_flow_control.c.

Generated on Mon Nov 28 2011 11:15:24 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Interrupt

Data Structures | Defines | Functions | Variables
Interrupt
UART

Data Structures

struct | UART_RING_BUFFER_T
UART Ring buffer structure. More...

Defines

#define | UART_RING_BUFSIZE 256
#define | __BUF_MASK (UART_RING_BUFSIZE-1)
#define | __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
#define | __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
#define | __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
#define | __BUF_RESET(bufidx) (bufidx=0)
#define | __BUF_INCR(bufidx) (bufidx=(bufidx+1)&__BUF_MASK)

Functions

void | UART0_IRQHandler (void)
UART0 interrupt handler sub-routine.
void | UART_IntTransmit (void)
UART transmit function (ring buffer used)
void | print_menu (void)
Print Welcome Screen Menu subroutine.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)

Variables

__IO uint32_t | tx_tail
__IO uint32_t | rx_head
__IO uint32_t | rx_tail
__IO uint8_t | tx [UART_RING_BUFSIZE]
__IO uint8_t | rx [UART_RING_BUFSIZE]
uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART0 - 9600bps \n\r"
uint8_t | menu3 [] = "UART demo terminated!\n"
UART_RING_BUFFER_T rb
__IO FlagStatus | TxIntStat

Define Documentation

#define __BUF_INCR ( bufidx ) (bufidx=(bufidx+1)&__BUF_MASK)

Definition at line 49 of file uart_interrupt_test.c.

#define __BUF_IS_EMPTY | ( | head,
 |  | tail
 | ) | ((head&__BUF_MASK)==(tail&__BUF_MASK))

Definition at line 46 of file uart_interrupt_test.c.

#define __BUF_IS_FULL | ( | head,
 |  | tail
 | ) | ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))

Definition at line 42 of file uart_interrupt_test.c.

#define __BUF_MASK (UART_RING_BUFSIZE-1)

Definition at line 40 of file uart_interrupt_test.c.

#define __BUF_RESET ( bufidx ) (bufidx=0)

Definition at line 48 of file uart_interrupt_test.c.

#define __BUF_WILL_FULL | ( | head,
 |  | tail
 | ) | ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))

Definition at line 44 of file uart_interrupt_test.c.

#define UART_RING_BUFSIZE 256

Definition at line 37 of file uart_interrupt_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main UART program body

Parameters:
[in] None
Returns:
int

Definition at line 342 of file uart_interrupt_test.c.

int main ( void )

Definition at line 472 of file uart_interrupt_test.c.

void print_menu ( void )

Print Welcome Screen Menu subroutine.

Print menu.

Parameters:
None
Returns:
None

Definition at line 122 of file adc_burst_test.c.

void UART0_IRQHandler ( void )

UART0 interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None
void UART_IntTransmit ( void )

UART transmit function (ring buffer used)

Parameters:
[in] None
Returns:
None

Definition at line 166 of file uart_interrupt_test.c.

Variable Documentation

uint8_t menu1[] = "Hello NXP Semiconductors \n\r"

Definition at line 67 of file uart_interrupt_test.c.

uint8_t menu2[] = "UART0 - 9600bps \n\r"

Definition at line 68 of file uart_interrupt_test.c.

uint8_t menu3[] = "UART demo terminated!\n"

Definition at line 72 of file uart_interrupt_test.c.

UART_RING_BUFFER_T rb

Definition at line 75 of file uart_interrupt_test.c.

__IO uint8_t rx

UART Rx data ring buffer

Definition at line 62 of file uart_interrupt_test.c.

__IO uint32_t rx_head

UART Rx ring buffer head index

Definition at line 59 of file uart_interrupt_test.c.

__IO uint32_t rx_tail

UART Rx ring buffer tail index

Definition at line 60 of file uart_interrupt_test.c.

__IO uint8_t tx

UART Tx data ring buffer

Definition at line 61 of file uart_interrupt_test.c.

__IO uint32_t tx_tail

UART Tx ring buffer tail index

Definition at line 58 of file uart_interrupt_test.c.

__IO FlagStatus TxIntStat

Definition at line 78 of file uart_interrupt_test.c.

Generated on Mon Nov 28 2011 11:15:24 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Polling

Defines | Functions | Variables
Polling
UART

Defines

#define | UART_PORT 0
#define | TEST_UART LPC_UART0

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART polling mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps \n\r"
uint8_t | menu3 [] = "UART demo terminated!"

Define Documentation

#define TEST_UART LPC_UART0

Definition at line 39 of file uart_polling_test.c.

#define UART_PORT 0

Definition at line 36 of file uart_polling_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main UART program body

Parameters:
[in] None
Returns:
int

Definition at line 73 of file uart_polling_test.c.

int main ( void )

Definition at line 194 of file uart_polling_test.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

Variable Documentation

uint8_t menu1[] = "Hello NXP Semiconductors \n\r"

Definition at line 46 of file uart_polling_test.c.

uint8_t menu2[] = "UART polling mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps \n\r"

Definition at line 47 of file uart_polling_test.c.

uint8_t menu3[] = "UART demo terminated!"

Definition at line 48 of file uart_polling_test.c.

Generated on Mon Nov 28 2011 11:15:24 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RS485_Master

Data Structures | Defines | Functions | Variables
RS485_Master
UART

Data Structures

struct | UART_RING_BUFFER_T
UART Ring buffer structure. More...

Defines

#define | SLAVE_ADDR_A 'A'
#define | SLAVE_ADDR_B 'B'
#define | UART_RING_BUFSIZE 256
#define | __BUF_MASK (UART_RING_BUFSIZE-1)
#define | __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
#define | __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
#define | __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
#define | __BUF_RESET(bufidx) (bufidx=0)
#define | __BUF_INCR(bufidx) (bufidx=(bufidx+1)&__BUF_MASK)

Functions

void | UART_IntReceive (void)
UART receive function (ring buffer used)
void | UART_IntErr (uint8_t bLSErrType)
UART Line Status Error.
uint32_t | UARTReceive (LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
UART read function for interrupt mode (using ring buffers)
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART-RS485 program body
int | main (void)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "RS485 demo in Master mode \n\r"
uint8_t | send_menu [] = "Sending... \n\r"
uint8_t | recv_menu [] = "Receive: "
uint8_t | p_err_menu [] = "Parity error \n\r"
uint8_t | f_err_menu [] = "Frame error \n\r"
uint8_t | nextline [] = "\n\r"
uint8_t | slaveA_msg [] = "Msg A: Hello NXP"
uint8_t | slaveB_msg [] = "Msg B: Hello NXP"
uint8_t | terminator = 13
UART_RING_BUFFER_T rb

Define Documentation

#define __BUF_INCR ( bufidx ) (bufidx=(bufidx+1)&__BUF_MASK)

Definition at line 55 of file rs485_master.c.

#define __BUF_IS_EMPTY | ( | head,
 |  | tail
 | ) | ((head&__BUF_MASK)==(tail&__BUF_MASK))

Definition at line 52 of file rs485_master.c.

#define __BUF_IS_FULL | ( | head,
 |  | tail
 | ) | ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))

Definition at line 48 of file rs485_master.c.

#define __BUF_MASK (UART_RING_BUFSIZE-1)

Definition at line 46 of file rs485_master.c.

#define __BUF_RESET ( bufidx ) (bufidx=0)

Definition at line 54 of file rs485_master.c.

#define __BUF_WILL_FULL | ( | head,
 |  | tail
 | ) | ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))

Definition at line 50 of file rs485_master.c.

#define SLAVE_ADDR_A 'A'

Definition at line 39 of file rs485_master.c.

#define SLAVE_ADDR_B 'B'

Definition at line 40 of file rs485_master.c.

#define UART_RING_BUFSIZE 256

Definition at line 43 of file rs485_master.c.

Function Documentation

int c_entry ( void )

c_entry: Main UART-RS485 program body

Parameters:
[in] None
Returns:
int

Definition at line 237 of file rs485_master.c.

int main ( void )

Definition at line 433 of file rs485_master.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

void UART_IntErr ( uint8_t bLSErrType )

UART Line Status Error.

Parameters:
[in] bLSErrType UART Line Status Error Type
Returns:
None
void UART_IntReceive ( void )

UART receive function (ring buffer used)

Parameters:
[in] None
Returns:
None
uint32_t UARTReceive | ( | LPC_UART_TypeDef * | UARTPort,
 |  | uint8_t * | rxbuf,
 |  | uint8_t | buflen
 | ) |  |

UART read function for interrupt mode (using ring buffers)

Parameters:
[in] | UARTPort | Selected UART peripheral used to send data, should be UART0
[out] | rxbuf | Pointer to Received buffer
[in] | buflen | Length of Received buffer
Returns:
Number of bytes actually read from the ring buffer

Variable Documentation

uint8_t f_err_menu[] = "Frame error \n\r"

Definition at line 63 of file rs485_master.c.

uint8_t menu1[] = "Hello NXP Semiconductors \n\r"

Definition at line 58 of file rs485_master.c.

uint8_t menu2[] = "RS485 demo in Master mode \n\r"

Definition at line 59 of file rs485_master.c.

uint8_t nextline[] = "\n\r"

Definition at line 64 of file rs485_master.c.

uint8_t p_err_menu[] = "Parity error \n\r"

Definition at line 62 of file rs485_master.c.

UART_RING_BUFFER_T rb

Definition at line 84 of file rs485_master.c.

uint8_t recv_menu[] = "Receive: "

Definition at line 61 of file rs485_master.c.

uint8_t send_menu[] = "Sending... \n\r"

Definition at line 60 of file rs485_master.c.

uint8_t slaveA_msg[] = "Msg A: Hello NXP"

Definition at line 66 of file rs485_master.c.

uint8_t slaveB_msg[] = "Msg B: Hello NXP"

Definition at line 67 of file rs485_master.c.

uint8_t terminator = 13

Definition at line 68 of file rs485_master.c.

Generated on Mon Nov 28 2011 11:15:24 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RS485_Slave

Data Structures | Defines | Functions | Variables
RS485_Slave
UART

Data Structures

struct | UART_RING_BUFFER_T
UART Ring buffer structure. More...

Defines

#define | RECEIVER_ALWAYS_EN 0
#define | AUTO_SLVADDR_DETECT 1
#define | SLAVE_ADDR 'A'
#define | UART_RING_BUFSIZE 256
#define | __BUF_MASK (UART_RING_BUFSIZE-1)
#define | __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
#define | __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
#define | __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
#define | __BUF_RESET(bufidx) (bufidx=0)
#define | __BUF_INCR(bufidx) (bufidx=(bufidx+1)&__BUF_MASK)

Functions

void | UART1_IRQHandler (void)
UART1 interrupt handler sub-routine.
void | UART_IntReceive (void)
UART receive function (ring buffer used)
void | UART_IntErr (uint8_t bLSErrType)
UART Line Status Error.
uint32_t | UARTReceive (LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
UART read function for interrupt mode (using ring buffers)
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART-RS485 program body
int | main (void)

Variables

uint8_t | menu1 [] = "Slave's Receiver is not always enabled - Auto Address Detection is enabled\n\r"
uint8_t | send_msg [] = "Sending... \n\r"
uint8_t | recv_msg [] = "Receive: "
uint8_t | p_err_menu [] = "Parity error"
uint8_t | addr_menu [] = " - Slv Addr Frm received\n\r"
uint8_t | addr_acc [] = " - Slave Addr accepted\n\r"
uint8_t | addr_una [] = " - Slave Addr unaccepted\n\r"
uint8_t | addr_auto [] = "Slave Addr detected!\n\r"
uint8_t | f_err_menu [] = "Frame error \n\r"
uint8_t | nextline [] = "\n\r"
uint8_t | ack_msg [] = "ACK"
uint8_t | terminator = 13
UART_RING_BUFFER_T rb

Define Documentation

#define __BUF_INCR ( bufidx ) (bufidx=(bufidx+1)&__BUF_MASK)

Definition at line 85 of file rs485_slave.c.

#define __BUF_IS_EMPTY | ( | head,
 |  | tail
 | ) | ((head&__BUF_MASK)==(tail&__BUF_MASK))

Definition at line 82 of file rs485_slave.c.

#define __BUF_IS_FULL | ( | head,
 |  | tail
 | ) | ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))

Definition at line 78 of file rs485_slave.c.

#define __BUF_MASK (UART_RING_BUFSIZE-1)

Definition at line 76 of file rs485_slave.c.

#define __BUF_RESET ( bufidx ) (bufidx=0)

Definition at line 84 of file rs485_slave.c.

#define __BUF_WILL_FULL | ( | head,
 |  | tail
 | ) | ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))

Definition at line 80 of file rs485_slave.c.

#define AUTO_SLVADDR_DETECT 1

Definition at line 68 of file rs485_slave.c.

#define RECEIVER_ALWAYS_EN 0

Definition at line 52 of file rs485_slave.c.

#define SLAVE_ADDR 'A'

Definition at line 69 of file rs485_slave.c.

#define UART_RING_BUFSIZE 256

Definition at line 73 of file rs485_slave.c.

Function Documentation

int c_entry ( void )

c_entry: Main UART-RS485 program body

Parameters:
[in] None
Returns:
int

Definition at line 373 of file rs485_slave.c.

int main ( void )

Definition at line 546 of file rs485_slave.c.

void print_menu ( void )

Print Welcome menu.

Print menu.

Parameters:
[in] none
Returns:
None

Definition at line 122 of file adc_burst_test.c.

void UART1_IRQHandler ( void )

UART1 interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None
void UART_IntErr ( uint8_t bLSErrType )

UART Line Status Error.

Parameters:
[in] bLSErrType UART Line Status Error Type
Returns:
None
void UART_IntReceive ( void )

UART receive function (ring buffer used)

Parameters:
[in] None
Returns:
None
uint32_t UARTReceive | ( | LPC_UART_TypeDef * | UARTPort,
 |  | uint8_t * | rxbuf,
 |  | uint8_t | buflen
 | ) |  |

UART read function for interrupt mode (using ring buffers)

Parameters:
[in] | UARTPort | Selected UART peripheral used to send data, should be UART0
[out] | rxbuf | Pointer to Received buffer
[in] | buflen | Length of Received buffer
Returns:
Number of bytes actually read from the ring buffer

Variable Documentation

uint8_t ack_msg[] = "ACK"

Definition at line 129 of file rs485_slave.c.

uint8_t addr_acc[] = " - Slave Addr accepted\n\r"

Definition at line 123 of file rs485_slave.c.

uint8_t addr_auto[] = "Slave Addr detected!\n\r"

Definition at line 125 of file rs485_slave.c.

uint8_t addr_menu[] = " - Slv Addr Frm received\n\r"

Definition at line 122 of file rs485_slave.c.

uint8_t addr_una[] = " - Slave Addr unaccepted\n\r"

Definition at line 124 of file rs485_slave.c.

uint8_t f_err_menu[] = "Frame error \n\r"

Definition at line 126 of file rs485_slave.c.

uint8_t menu1[] = "Slave's Receiver is not always enabled - Auto Address Detection is enabled\n\r"

Definition at line 112 of file rs485_slave.c.

uint8_t nextline[] = "\n\r"

Definition at line 127 of file rs485_slave.c.

uint8_t p_err_menu[] = "Parity error"

Definition at line 121 of file rs485_slave.c.

UART_RING_BUFFER_T rb

Definition at line 133 of file rs485_slave.c.

uint8_t recv_msg[] = "Receive: "

Definition at line 120 of file rs485_slave.c.

uint8_t send_msg[] = "Sending... \n\r"

Definition at line 119 of file rs485_slave.c.

uint8_t terminator = 13

Definition at line 130 of file rs485_slave.c.

Generated on Mon Nov 28 2011 11:15:24 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART1_FullModem

Data Structures | Defines | Functions | Variables
UART1_FullModem
UART

Data Structures

struct | UART_RING_BUFFER_T
UART Ring buffer structure. More...

Defines

#define | MCB_LPC_1768
#define | UART_RING_BUFSIZE 256
#define | AUTO_RTS_CTS_USE 0
#define | __BUF_MASK (UART_RING_BUFSIZE-1)
#define | __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
#define | __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
#define | __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
#define | __BUF_RESET(bufidx) (bufidx=0)
#define | __BUF_INCR(bufidx) (bufidx=(bufidx+1)&__BUF_MASK)

Functions

void | UART1_IRQHandler (void)
UART1 interrupt handler sub-routine.
void | UART1_IntTransmit (void)
UART1 transmit function (ring buffer used)
void | UART1_IntReceive (void)
UART1 receive function (ring buffer used)
void | UART1_IntErr (uint8_t bLSErrType)
UART Line Status Error.
uint32_t | UARTReceive (LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
UART read function for interrupt mode (using ring buffers)
uint32_t | UARTSend (LPC_UART_TypeDef *UARTPort, uint8_t *txbuf, uint8_t buflen)
UART transmit function for interrupt mode (using ring buffers)
void | print_menu (void)
Print Welcome Screen Menu subroutine.
int | c_entry (void)
c_entry: Main UART-FULLMODEM program body
int | main (void)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART1 - 9600bps \n\r"
uint8_t | menu3 [] = "UART demo terminated!\n"
UART_RING_BUFFER_T rb
__IO int32_t | RTS_State
__IO FlagStatus | TxIntStat

Define Documentation

#define __BUF_INCR ( bufidx ) (bufidx=(bufidx+1)&__BUF_MASK)

Definition at line 58 of file uart_fullmodem_test.c.

#define __BUF_IS_EMPTY | ( | head,
 |  | tail
 | ) | ((head&__BUF_MASK)==(tail&__BUF_MASK))

Definition at line 55 of file uart_fullmodem_test.c.

#define __BUF_IS_FULL | ( | head,
 |  | tail
 | ) | ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))

Definition at line 51 of file uart_fullmodem_test.c.

#define __BUF_MASK (UART_RING_BUFSIZE-1)

Definition at line 49 of file uart_fullmodem_test.c.

#define __BUF_RESET ( bufidx ) (bufidx=0)

Definition at line 57 of file uart_fullmodem_test.c.

#define __BUF_WILL_FULL | ( | head,
 |  | tail
 | ) | ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))

Definition at line 53 of file uart_fullmodem_test.c.

#define AUTO_RTS_CTS_USE 0

Definition at line 46 of file uart_fullmodem_test.c.

#define MCB_LPC_1768

Definition at line 37 of file uart_fullmodem_test.c.

#define UART_RING_BUFSIZE 256

Definition at line 41 of file uart_fullmodem_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main UART-FULLMODEM program body

Parameters:
[in] None
Returns:
int

Definition at line 415 of file uart_fullmodem_test.c.

int main ( void )

Definition at line 580 of file uart_fullmodem_test.c.

void print_menu ( void )

Print Welcome Screen Menu subroutine.

Print menu.

Parameters:
None
Returns:
None

Definition at line 122 of file adc_burst_test.c.

void UART1_IntErr ( uint8_t bLSErrType )

UART Line Status Error.

Parameters:
[in] bLSErrType UART Line Status Error Type
Returns:
None

Definition at line 263 of file uart_fullmodem_test.c.

void UART1_IntReceive ( void )

UART1 receive function (ring buffer used)

Parameters:
[in] None
Returns:
None

Definition at line 173 of file uart_fullmodem_test.c.

void UART1_IntTransmit ( void )

UART1 transmit function (ring buffer used)

Parameters:
[in] None
Returns:
None

Definition at line 221 of file uart_fullmodem_test.c.

void UART1_IRQHandler ( void )

UART1 interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None
uint32_t UARTReceive | ( | LPC_UART_TypeDef * | UARTPort,
 |  | uint8_t * | rxbuf,
 |  | uint8_t | buflen
 | ) |  |

UART read function for interrupt mode (using ring buffers)

Parameters:
[in] | UARTPort | Selected UART peripheral used to send data, should be UART1.
[out] | rxbuf | Pointer to Received buffer
[in] | buflen | Length of Received buffer
Returns:
Number of bytes actually read from the ring buffer
uint32_t UARTSend | ( | LPC_UART_TypeDef * | UARTPort,
 |  | uint8_t * | txbuf,
 |  | uint8_t | buflen
 | ) |  |

UART transmit function for interrupt mode (using ring buffers)

Parameters:
[in] | UARTPort | Selected UART peripheral used to send data, should be UART1.
[out] | txbuf | Pointer to Transmit buffer
[in] | buflen | Length of Transmit buffer
Returns:
Number of bytes actually sent to the ring buffer

Variable Documentation

uint8_t menu1[] = "Hello NXP Semiconductors \n\r"

Definition at line 75 of file uart_fullmodem_test.c.

uint8_t menu2[] = "UART1 - 9600bps \n\r"

Definition at line 76 of file uart_fullmodem_test.c.

uint8_t menu3[] = "UART demo terminated!\n"

Definition at line 80 of file uart_fullmodem_test.c.

UART_RING_BUFFER_T rb

Definition at line 83 of file uart_fullmodem_test.c.

__IO int32_t RTS_State

Definition at line 86 of file uart_fullmodem_test.c.

__IO FlagStatus TxIntStat

Definition at line 89 of file uart_fullmodem_test.c.

Generated on Mon Nov 28 2011 11:15:25 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: USBDEV

Modules
USBDEV
LPC1700CMSIS Examples

Modules

USBAudio
USBCDC
USBHID
USBMassStorage
Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: USBAudio

Functions | Variables
USBAudio
USBDEV

Functions

void | get_potval (void)
void | TIMER0_IRQHandler (void)
int | main (void)

Variables

uint8_t | Mute
uint32_t | Volume
uint32_t | InfoBuf [P_C]
short | DataBuf [B_S]
uint16_t | DataOut
uint16_t | DataIn
uint8_t | DataRun
uint16_t | PotVal
uint32_t | VUM
uint32_t | Tick

Function Documentation

void get_potval ( void )

Definition at line 55 of file usbdmain.c.

int main ( void )

Definition at line 124 of file usbdmain.c.

void TIMER0_IRQHandler ( void )

Definition at line 73 of file usbdmain.c.

Variable Documentation

short DataBuf[B_S]

Definition at line 39 of file usbdmain.c.

uint16_t DataIn

Definition at line 43 of file usbdmain.c.

uint16_t DataOut

Definition at line 42 of file usbdmain.c.

uint8_t DataRun

Definition at line 45 of file usbdmain.c.

uint32_t InfoBuf[P_C]

Definition at line 38 of file usbdmain.c.

uint8_t Mute

Definition at line 31 of file usbdmain.c.

uint16_t PotVal

Definition at line 46 of file usbdmain.c.

uint32_t Tick

Definition at line 48 of file usbdmain.c.

uint32_t Volume

Definition at line 32 of file usbdmain.c.

uint32_t VUM

Definition at line 47 of file usbdmain.c.

Generated on Mon Nov 28 2011 11:15:25 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: USBCDC

Functions
USBCDC
USBDEV

Functions

void | VCOM_Init (void)
void | VCOM_Serial2Usb (void)
void | VCOM_Usb2Serial (void)
void | VCOM_CheckSerialState (void)
int | main (void)

Function Documentation

int main ( void )

Definition at line 105 of file vcomdemo.c.

void VCOM_CheckSerialState ( void )

Definition at line 91 of file vcomdemo.c.

void VCOM_Init ( void )

Definition at line 39 of file vcomdemo.c.

void VCOM_Serial2Usb ( void )

Definition at line 51 of file vcomdemo.c.

void VCOM_Usb2Serial ( void )

Definition at line 70 of file vcomdemo.c.

Generated on Mon Nov 28 2011 11:15:25 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: USBHID

Functions | Variables
USBHID
USBDEV

Functions

void | GetInReport (void)
void | SetOutReport (void)
int | main (void)

Variables

uint8_t | InReport
uint8_t | OutReport

Function Documentation

void GetInReport ( void )

Definition at line 50 of file demo.c.

int main ( void )

Definition at line 123 of file demo.c.

void SetOutReport ( void )

Definition at line 64 of file demo.c.

Variable Documentation

uint8_t InReport

Definition at line 38 of file demo.c.

uint8_t OutReport

Definition at line 42 of file demo.c.

Generated on Mon Nov 28 2011 11:15:25 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: USBMassStorage

Functions | Variables
USBMassStorage
USBDEV

Functions

int | main (void)

Variables

uint8_t | Memory [MSC_MemorySize]

Function Documentation

int main ( void )

Definition at line 43 of file memory.c.

Variable Documentation

uint8_t Memory[MSC_MemorySize]

Definition at line 33 of file mscuser.c.

Generated on Mon Nov 28 2011 11:15:25 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: WDT

Modules
WDT
LPC1700CMSIS Examples

Modules

INTERRUPT
RESET
Generated on Mon Nov 28 2011 11:15:19 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: INTERRUPT

Defines | Functions | Variables
INTERRUPT
WDT

Defines

#define | MCB_LPC_1768
#define | WDT_TIMEOUT 5000000

Functions

void | WDT_IRQHandler (void)
WDT interrupt handler sub-routine.
void | print_menu (void)
Print menu.
void | LED_Init (void)
Initialize LEDs.
int | c_entry (void)
c_entry: Main WDT program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | info1 [] = "BEFORE WDT interrupt!\n\r"
uint8_t | info2 [] = "AFTER WDT interrupt\n\r"
__IO Bool | wdt_flag = FALSE
__IO Bool | LED_toggle = FALSE

Define Documentation

#define MCB_LPC_1768

Definition at line 39 of file wdt_interrupt_test.c.

#define WDT_TIMEOUT 5000000

Definition at line 43 of file wdt_interrupt_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main WDT program body

Parameters:
[in] None
Returns:
int

Definition at line 122 of file wdt_interrupt_test.c.

void LED_Init ( void )

Initialize LEDs.

Parameters:
[in] None
Returns:
None
int main ( void )

Definition at line 195 of file wdt_interrupt_test.c.

void print_menu ( void )

Print menu.

Parameters:
[in] None
Returns:
None

Definition at line 122 of file adc_burst_test.c.

void WDT_IRQHandler ( void )

WDT interrupt handler sub-routine.

Parameters:
[in] None
Returns:
None

Variable Documentation

uint8_t info1[] = "BEFORE WDT interrupt!\n\r"

Definition at line 57 of file wdt_interrupt_test.c.

uint8_t info2[] = "AFTER WDT interrupt\n\r"

Definition at line 58 of file wdt_interrupt_test.c.

__IO Bool LED_toggle = FALSE

Definition at line 61 of file wdt_interrupt_test.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 47 of file wdt_interrupt_test.c.

__IO Bool wdt_flag = FALSE

Definition at line 60 of file wdt_interrupt_test.c.

Generated on Mon Nov 28 2011 11:15:25 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RESET

Defines | Functions | Variables
RESET
WDT

Defines

#define | IAR_LPC_1768
#define | WDT_TIMEOUT 5000000

Functions

int | c_entry (void)
c_entry: Main WDT program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | info1 [] = "Last MCU reset caused by WDT TimeOut!\n\r"
uint8_t | info2 [] = "Last MCU reset caused by External!\n\r"

Define Documentation

#define IAR_LPC_1768

Definition at line 39 of file wdt_reset_test.c.

#define WDT_TIMEOUT 5000000

Definition at line 42 of file wdt_reset_test.c.

Function Documentation

int c_entry ( void )

c_entry: Main WDT program body

Parameters:
[in] None
Returns:
int

Definition at line 67 of file wdt_reset_test.c.

int main ( void )

Definition at line 100 of file wdt_reset_test.c.

Variable Documentation

uint8_t info1[] = "Last MCU reset caused by WDT TimeOut!\n\r"

Definition at line 58 of file wdt_reset_test.c.

uint8_t info2[] = "Last MCU reset caused by External!\n\r"

Definition at line 59 of file wdt_reset_test.c.

uint8_t menu1[] = "********************************************************************************\n\r"

Definition at line 46 of file wdt_reset_test.c.

Generated on Mon Nov 28 2011 11:15:25 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Structures

  • Data Fields
Data Structures
Here are the data structures with brief descriptions:
__CDC_BUF_T |
__FILE |
__SER_BUF_T |
_ASCSET_Data_t |
_Bmp_t |
_COLMOD_Data_t |
_DATCTR_Data_t |
_FontType_t |
_GLCD_CmdCtrl_t |
_MADCTR_Data_t |
_USB_DMA_DESCRIPTOR |
_USB_EP_DATA |
AF_SectionDef | Acceptance Filter Section Table structure
APSR_Type | Union type to access the Application Program Status Register (APSR)
arm_bilinear_interp_instance_f32 | Instance structure for the floating-point bilinear interpolation function
arm_bilinear_interp_instance_q15 | Instance structure for the Q15 bilinear interpolation function
arm_bilinear_interp_instance_q31 | Instance structure for the Q31 bilinear interpolation function
arm_bilinear_interp_instance_q7 | Instance structure for the Q15 bilinear interpolation function
arm_biquad_cas_df1_32x64_ins_q31 | Instance structure for the high precision Q31 Biquad cascade filter
arm_biquad_cascade_df2T_instance_f32 | Instance structure for the floating-point transposed direct form II Biquad cascade filter
arm_biquad_casd_df1_inst_f32 | Instance structure for the floating-point Biquad cascade filter
arm_biquad_casd_df1_inst_q15 | Instance structure for the Q15 Biquad cascade filter
arm_biquad_casd_df1_inst_q31 | Instance structure for the Q31 Biquad cascade filter
arm_cfft_radix4_instance_f32 | Instance structure for the floating-point CFFT/CIFFT function
arm_cfft_radix4_instance_q15 | Instance structure for the Q15 CFFT/CIFFT function
arm_cfft_radix4_instance_q31 | Instance structure for the Q31 CFFT/CIFFT function
arm_dct4_instance_f32 | Instance structure for the floating-point DCT4/IDCT4 function
arm_dct4_instance_q15 | Instance structure for the Q15 DCT4/IDCT4 function
arm_dct4_instance_q31 | Instance structure for the Q31 DCT4/IDCT4 function
arm_fir_decimate_instance_f32 | Instance structure for the floating-point FIR decimator
arm_fir_decimate_instance_q15 | Instance structure for the Q15 FIR decimator
arm_fir_decimate_instance_q31 | Instance structure for the Q31 FIR decimator
arm_fir_instance_f32 | Instance structure for the floating-point FIR filter
arm_fir_instance_q15 | Instance structure for the Q15 FIR filter
arm_fir_instance_q31 | Instance structure for the Q31 FIR filter
arm_fir_instance_q7 | Instance structure for the Q7 FIR filter
arm_fir_interpolate_instance_f32 | Instance structure for the floating-point FIR interpolator
arm_fir_interpolate_instance_q15 | Instance structure for the Q15 FIR interpolator
arm_fir_interpolate_instance_q31 | Instance structure for the Q31 FIR interpolator
arm_fir_lattice_instance_f32 | Instance structure for the floating-point FIR lattice filter
arm_fir_lattice_instance_q15 | Instance structure for the Q15 FIR lattice filter
arm_fir_lattice_instance_q31 | Instance structure for the Q31 FIR lattice filter
arm_fir_sparse_instance_f32 | Instance structure for the floating-point sparse FIR filter
arm_fir_sparse_instance_q15 | Instance structure for the Q15 sparse FIR filter
arm_fir_sparse_instance_q31 | Instance structure for the Q31 sparse FIR filter
arm_fir_sparse_instance_q7 | Instance structure for the Q7 sparse FIR filter
arm_iir_lattice_instance_f32 | Instance structure for the floating-point IIR lattice filter
arm_iir_lattice_instance_q15 | Instance structure for the Q15 IIR lattice filter
arm_iir_lattice_instance_q31 | Instance structure for the Q31 IIR lattice filter
arm_linear_interp_instance_f32 | Instance structure for the floating-point Linear Interpolate function
arm_lms_instance_f32 | Instance structure for the floating-point LMS filter
arm_lms_instance_q15 | Instance structure for the Q15 LMS filter
arm_lms_instance_q31 | Instance structure for the Q31 LMS filter
arm_lms_norm_instance_f32 | Instance structure for the floating-point normalized LMS filter
arm_lms_norm_instance_q15 | Instance structure for the Q15 normalized LMS filter
arm_lms_norm_instance_q31 | Instance structure for the Q31 normalized LMS filter
arm_matrix_instance_f32 | Instance structure for the floating-point matrix structure
arm_matrix_instance_q15 | Instance structure for the Q15 matrix structure
arm_matrix_instance_q31 | Instance structure for the Q31 matrix structure
arm_pid_instance_f32 | Instance structure for the floating-point PID Control
arm_pid_instance_q15 | Instance structure for the Q15 PID Control
arm_pid_instance_q31 | Instance structure for the Q31 PID Control
arm_rfft_instance_f32 | Instance structure for the floating-point RFFT/RIFFT function
arm_rfft_instance_q15 | Instance structure for the Q15 RFFT/RIFFT function
arm_rfft_instance_q31 | Instance structure for the Q31 RFFT/RIFFT function
arp_entry |
arp_hdr |
CAN_MSG_Type | CAN message object structure
CAN_PinCFG_Type | Pin Configuration structure
CONTROL_Type | Union type to access the Control Registers (CONTROL)
CoreDebug_Type | Structure type to access the Core Debug Register (CoreDebug)
DAC_CONVERTER_CFG_Type | Configuration for DAC converter control register
dhcp_msg |
dhcpc_state |
dns_answer |
dns_hdr |
EFF_Entry | Extended ID Frame Format Entry structure
EFF_GPR_Entry | Group of Extended ID Frame Format Entry structure
EMAC_CFG_Type | EMAC configuration structure definition
EMAC_PACKETBUF_Type | TX Data Buffer structure definition
ethip_hdr |
EXTI_InitTypeDef | EXTI Initialize structure
FullCAN_Entry | FullCAN Entry structure
fwcache_entry |
GPDMA_Channel_CFG_Type | GPDMA Channel configuration structure type definition
GPDMA_LLI_Type | GPDMA Linker List Item structure type definition
GPIO_Byte_TypeDef | Fast GPIO port byte type definition
GPIO_HalfWord_TypeDef | Fast GPIO port half-word type definition
hello_world_state |
httpd_cgi_call |
httpd_fs_file |
httpd_fsdata_file |
httpd_fsdata_file_noconst |
httpd_state |
I2C_CFG_T | I2C device configuration structure type
I2C_M_SETUP_Type | Master transfer setup data structure definitions
I2C_OWNSLAVEADDR_CFG_Type | I2C Own slave address setting structure
I2C_S_SETUP_Type | Slave transfer setup data structure definitions
I2S_CFG_Type | I2S configuration structure definition
I2S_DMAConf_Type | I2S DMA configuration structure definition
I2S_MODEConf_Type | I2S mode configuration structure definition
icmpip_hdr |
IPSR_Type | Union type to access the Interrupt Program Status Register (IPSR)
ITM_Type | Structure type to access the Instrumentation Trace Macrocell Register (ITM)
LPC_ADC_TypeDef | Analog-to-Digital Converter (ADC) register structure definition
LPC_CAN_TypeDef | Controller Area Network Controller (CAN) register structure definition
LPC_CANAF_RAM_TypeDef | Controller Area Network Acceptance Filter RAM (CANAF_RAM)structure definition
LPC_CANAF_TypeDef | Controller Area Network Acceptance Filter(CANAF) register structure definition
LPC_CANCR_TypeDef | Controller Area Network Central (CANCR) register structure definition
LPC_DAC_TypeDef | Digital-to-Analog Converter (DAC) register structure definition
LPC_EMAC_TypeDef | Ethernet Media Access Controller (EMAC) register structure definition
LPC_GPDMA_TypeDef | General Purpose Direct Memory Access (GPDMA) register structure definition
LPC_GPDMACH_TypeDef | General Purpose Direct Memory Access Channel (GPDMACH) register structure definition
LPC_GPIO_TypeDef | General Purpose Input/Output (GPIO) register structure definition
LPC_GPIOINT_TypeDef | General Purpose Input/Output interrupt (GPIOINT) register structure definition
LPC_I2C_TypeDef | Inter-Integrated Circuit (I2C) register structure definition
LPC_I2S_TypeDef | Inter IC Sound (I2S) register structure definition
LPC_MCPWM_TypeDef | Motor Control Pulse-Width Modulation (MCPWM) register structure definition
LPC_PINCON_TypeDef | Pin Connect Block (PINCON) register structure definition
LPC_PWM_TypeDef | Pulse-Width Modulation (PWM) register structure definition
LPC_QEI_TypeDef | Quadrature Encoder Interface (QEI) register structure definition
LPC_RIT_TypeDef | Repetitive Interrupt Timer (RIT) register structure definition
LPC_RTC_TypeDef | Real-Time Clock (RTC) register structure definition
LPC_SC_TypeDef | System Control (SC) register structure definition
LPC_SPI_TypeDef | Serial Peripheral Interface (SPI) register structure definition
LPC_SSP_TypeDef | Synchronous Serial Communication (SSP) register structure definition
LPC_TIM_TypeDef | Timer (TIM) register structure definition
LPC_UART0_TypeDef | Universal Asynchronous Receiver Transmitter 0 (UART0) register structure definition
LPC_UART1_TypeDef | Universal Asynchronous Receiver Transmitter 1 (UART1) register structure definition
LPC_UART_TypeDef | Universal Asynchronous Receiver Transmitter (UART) register structure definition
LPC_USB_TypeDef | Universal Serial Bus (USB) register structure definition
LPC_WDT_TypeDef | Watchdog Timer (WDT) register structure definition
MCPWM_CAPTURE_CFG_Type | MCPWM Capture Configuration type definition
MCPWM_CHANNEL_CFG_Type | Motor Control PWM Channel Configuration structure type definition
MCPWM_COUNT_CFG_Type | MCPWM Count Control Configuration type definition
namemap |
neighbor_entry |
NVIC_Type | Structure type to access the Nested Vectored Interrupt Controller (NVIC)
PINSEL_CFG_Type | Pin configuration structure
psock |
psock_buf |
pt |
ptentry |
PWM_CAPTURECFG_Type | PWM Capture Input configuration structure
PWM_COUNTERCFG_Type | Configuration structure in PWM COUNTER mode
PWM_Match_T | Match update structure
PWM_MATCHCFG_Type | PWM Match channel configuration structure
PWM_TIMERCFG_Type | Configuration structure in PWM TIMER mode
QEI_CFG_Type | QEI Configuration structure type definition
QEI_CFGOPT_Type | QEI configuration union type definition
QEI_RELOADCFG_Type | Timer Reload Configuration structure type definition
RTC_TIME_Type | Time structure definitions for easy manipulate the data
RX_Desc | RX Descriptor structure type definition
RX_Stat | RX Status structure type definition
SCB_Type | Structure type to access the System Control Block (SCB)
SCnSCB_Type | Structure type to access the System Control and ID Register not in the SCB
SFF_Entry | Standard ID Frame Format Entry structure
SFF_GPR_Entry | Group of Standard ID Frame Format Entry structure
smtp_state |
SPI_CFG_Type | SPI configuration structure
SPI_DATA_SETUP_Type | SPI Data configuration structure definitions
SSP_CFG_Type | SSP configuration structure
SSP_DATA_SETUP_Type | SPI Data configuration structure definitions
SysTick_Type | Structure type to access the System Timer (SysTick)
tcpip_hdr |
telnetd_line |
telnetd_state |
TIM_CAPTURECFG_Type | Capture Input configuration structure
TIM_COUNTERCFG_Type | Configuration structure in COUNTER mode
TIM_MATCHCFG_Type | Match channel configuration structure
TIM_TIMERCFG_Type | Configuration structure in TIMER mode
timer |
TX_Desc | TX Descriptor structure type definition
TX_Stat | TX Status structure type definition
UART1_RS485_CTRLCFG_Type | UART1 Full modem - RS485 Control configuration type
UART_AB_CFG_Type | Auto Baudrate mode configuration type definition
UART_CFG_Type | UART Configuration Structure definition
UART_FIFO_CFG_Type | UART FIFO Configuration Structure definition
UART_RING_BUFFER_T | UART Ring buffer structure
uip_conn |
uip_eth_addr |
uip_eth_hdr |
uip_fw_netif |
uip_icmpip_hdr |
uip_neighbor_addr |
uip_stats |
uip_tcpip_hdr |
uip_udpip_hdr |
webclient_state |
xPSR_Type | Union type to access the Special-Purpose Program Status Registers (xPSR)
Generated on Mon Nov 28 2011 11:15:29 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: __CDC_BUF_T Struct Reference

  • Data Fields
Data Fields
__CDC_BUF_T Struct Reference

Data Fields

unsigned char | data [CDC_BUF_SIZE]
unsigned int | wrIdx
unsigned int | rdIdx

Detailed Description

Definition at line 57 of file cdcuser.c.

Field Documentation

unsigned char data[CDC_BUF_SIZE]

Definition at line 58 of file cdcuser.c.

unsigned int rdIdx

Definition at line 60 of file cdcuser.c.

unsigned int wrIdx

Definition at line 59 of file cdcuser.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.c
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: __FILE Struct Reference

  • Data Fields
Data Fields
__FILE Struct Reference

Data Fields

int handle

Detailed Description

Definition at line 21 of file Retarget.c.

Field Documentation

int handle

Definition at line 21 of file Retarget.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Retarget.c
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: __SER_BUF_T Struct Reference

  • Data Fields
Data Fields
__SER_BUF_T Struct Reference

Data Fields

unsigned char | data [SER_BUF_SIZE]
unsigned int | wrIdx
unsigned int | rdIdx

Detailed Description

Definition at line 36 of file serial.c.

Field Documentation

unsigned char data[SER_BUF_SIZE]

Definition at line 37 of file serial.c.

unsigned int rdIdx

Definition at line 39 of file serial.c.

unsigned int wrIdx

Definition at line 38 of file serial.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.c
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: _ASCSET_Data_t Struct Reference

  • Data Fields
Data Fields
_ASCSET_Data_t Struct Reference

#include <drv_glcd.h>

Data Fields

uint8_t | Ssl
uint8_t | Sel
uint8_t | Sfl
uint8_t | Smd

Detailed Description

Definition at line 129 of file drv_glcd.h.

Field Documentation

uint8_t Sel

Definition at line 131 of file drv_glcd.h.

uint8_t Sfl

Definition at line 132 of file drv_glcd.h.

uint8_t Smd

Definition at line 133 of file drv_glcd.h.

uint8_t Ssl

Definition at line 130 of file drv_glcd.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: _Bmp_t Struct Reference

  • Data Fields
Data Fields
_Bmp_t Struct Reference

#include <drv_glcd.h>

Data Fields

uint32_t | H_Size
uint32_t | V_Size
uint32_t | BitsPP
uint32_t | BytesPP
unsigned int * | pPalette
unsigned int * | pPicStream
unsigned char * | pPicDesc

Detailed Description

Definition at line 214 of file drv_glcd.h.

Field Documentation

uint32_t BitsPP

Definition at line 217 of file drv_glcd.h.

uint32_t BytesPP

Definition at line 218 of file drv_glcd.h.

uint32_t H_Size

Definition at line 215 of file drv_glcd.h.

unsigned int* pPalette

Definition at line 219 of file drv_glcd.h.

unsigned char* pPicDesc

Definition at line 221 of file drv_glcd.h.

unsigned int* pPicStream

Definition at line 220 of file drv_glcd.h.

uint32_t V_Size

Definition at line 216 of file drv_glcd.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: _COLMOD_Data_t Struct Reference

  • Data Fields
Data Fields
_COLMOD_Data_t Struct Reference

#include <drv_glcd.h>

Data Fields

union {
uint8_t ColourMode
struct {
uint8_t Mode: 3
uint8_t Reversed: 5
}
};

Detailed Description

Definition at line 190 of file drv_glcd.h.

Field Documentation

union { ... }
uint8_t ColourMode

Definition at line 193 of file drv_glcd.h.

uint8_t Mode

Definition at line 196 of file drv_glcd.h.

uint8_t Reversed

Definition at line 197 of file drv_glcd.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: _DATCTR_Data_t Struct Reference

  • Data Fields
Data Fields
_DATCTR_Data_t Struct Reference

#include <drv_glcd.h>

Data Fields

union {
uint8_t RC_AddMode
struct {
uint8_t MY: 1
uint8_t MX: 1
uint8_t MV: 1
uint8_t ML: 1
uint8_t __pad0__: 4
}
};
union {
uint8_t RGB_Mode
struct {
uint8_t RGB: 1
uint8_t __pad0__: 7
}
};
union {
uint8_t GrayScale
struct {
uint8_t GS: 3
uint8_t Reversed: 5
}
};

Detailed Description

Definition at line 140 of file drv_glcd.h.

Field Documentation

union { ... }
union { ... }
union { ... }
uint8_t __pad0__

Definition at line 150 of file drv_glcd.h.

uint8_t GrayScale

Definition at line 164 of file drv_glcd.h.

uint8_t GS

Definition at line 167 of file drv_glcd.h.

uint8_t ML

Definition at line 149 of file drv_glcd.h.

uint8_t MV

Definition at line 148 of file drv_glcd.h.

uint8_t MX

Definition at line 147 of file drv_glcd.h.

uint8_t MY

Definition at line 146 of file drv_glcd.h.

uint8_t RC_AddMode

Definition at line 143 of file drv_glcd.h.

uint8_t Reversed

Definition at line 168 of file drv_glcd.h.

uint8_t RGB

Definition at line 158 of file drv_glcd.h.

uint8_t RGB_Mode

Definition at line 155 of file drv_glcd.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: _FontType_t Struct Reference

  • Data Fields
Data Fields
_FontType_t Struct Reference

#include <drv_glcd.h>

Data Fields

uint32_t | H_Size
uint32_t | V_Size
uint32_t | CharacterOffset
uint32_t | CharactersNuber
unsigned char * | pFontStream
unsigned char * | pFontDesc

Detailed Description

Definition at line 205 of file drv_glcd.h.

Field Documentation

uint32_t CharacterOffset

Definition at line 208 of file drv_glcd.h.

uint32_t CharactersNuber

Definition at line 209 of file drv_glcd.h.

uint32_t H_Size

Definition at line 206 of file drv_glcd.h.

unsigned char* pFontDesc

Definition at line 211 of file drv_glcd.h.

unsigned char* pFontStream

Definition at line 210 of file drv_glcd.h.

uint32_t V_Size

Definition at line 207 of file drv_glcd.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: _GLCD_CmdCtrl_t Struct Reference

  • Data Fields
Data Fields
_GLCD_CmdCtrl_t Struct Reference

#include <drv_glcd.h>

Data Fields

uint32_t | Cmd
GLCD_CmdDir_t Dir
Bool Pulse
uint32_t | Param

Detailed Description

Definition at line 121 of file drv_glcd.h.

Field Documentation

uint32_t Cmd

Definition at line 122 of file drv_glcd.h.

GLCD_CmdDir_t Dir

Definition at line 123 of file drv_glcd.h.

uint32_t Param

Definition at line 125 of file drv_glcd.h.

Bool Pulse

Definition at line 124 of file drv_glcd.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: _MADCTR_Data_t Struct Reference

  • Data Fields
Data Fields
_MADCTR_Data_t Struct Reference

#include <drv_glcd.h>

Data Fields

union {
uint8_t MemDataAccCtrl
struct {
uint8_t Reversed: 3
uint8_t RGB: 1
uint8_t ML: 1
uint8_t MV: 1
uint8_t MX: 1
uint8_t MY: 1
}
};

Detailed Description

Definition at line 173 of file drv_glcd.h.

Field Documentation

union { ... }
uint8_t MemDataAccCtrl

Definition at line 176 of file drv_glcd.h.

uint8_t ML

Definition at line 181 of file drv_glcd.h.

uint8_t MV

Definition at line 182 of file drv_glcd.h.

uint8_t MX

Definition at line 183 of file drv_glcd.h.

uint8_t MY

Definition at line 184 of file drv_glcd.h.

uint8_t Reversed

Definition at line 179 of file drv_glcd.h.

uint8_t RGB

Definition at line 180 of file drv_glcd.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: _USB_DMA_DESCRIPTOR Struct Reference

  • Data Fields
Data Fields
_USB_DMA_DESCRIPTOR Struct Reference

#include <usbhw.h>

Data Fields

uint32_t | BufAdr
uint16_t | BufLen
uint16_t | MaxSize
uint32_t | InfoAdr
union {
struct {
uint32_t Link: 1
uint32_t IsoEP: 1
uint32_t ATLE: 1
uint32_t Rsrvd: 5
uint32_t LenPos: 8
} Type
uint32_t Val
} Cfg
union {
struct {
uint32_t Link: 1
uint32_t IsoEP: 1
uint32_t ATLE: 1
uint32_t Rsrvd: 5
uint32_t LenPos: 8
} Type
uint32_t Val
} Cfg
union {
struct {
uint32_t Link: 1
uint32_t IsoEP: 1
uint32_t ATLE: 1
uint32_t Rsrvd: 5
uint32_t LenPos: 8
} Type
uint32_t Val
} Cfg
union {
struct {
uint32_t Link: 1
uint32_t IsoEP: 1
uint32_t ATLE: 1
uint32_t Rsrvd: 5
uint32_t LenPos: 8
} Type
uint32_t Val
} Cfg

Detailed Description

Definition at line 65 of file usbhw.h.

Field Documentation

uint32_t ATLE

Definition at line 74 of file usbhw.h.

uint32_t BufAdr

Definition at line 66 of file usbhw.h.

uint16_t BufLen

Definition at line 67 of file usbhw.h.

union { ... } Cfg
union { ... } Cfg
union { ... } Cfg
union { ... } Cfg
uint32_t InfoAdr

Definition at line 69 of file usbhw.h.

uint32_t IsoEP

Definition at line 73 of file usbhw.h.

uint32_t LenPos

Definition at line 76 of file usbhw.h.

uint32_t Link

Definition at line 72 of file usbhw.h.

uint16_t MaxSize

Definition at line 68 of file usbhw.h.

uint32_t Rsrvd

Definition at line 75 of file usbhw.h.

struct { ... } Type
struct { ... } Type
struct { ... } Type
struct { ... } Type
uint32_t Val

Definition at line 78 of file usbhw.h.

The documentation for this struct was generated from the following files:
  • C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.h
  • C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.h
  • C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.h
  • C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: _USB_EP_DATA Struct Reference

  • Data Fields
Data Fields
_USB_EP_DATA Struct Reference

#include <usbcore.h>

Data Fields

uint8_t * | pData
uint16_t | Count

Detailed Description

Definition at line 24 of file usbcore.h.

Field Documentation

uint16_t Count

Definition at line 26 of file usbcore.h.

uint8_t * pData

Definition at line 25 of file usbcore.h.

The documentation for this struct was generated from the following files:
  • C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.h
  • C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.h
  • C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.h
  • C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: AF_SectionDef Struct Reference

  • Data Fields
Data Fields
AF_SectionDef Struct Reference
CAN Public Types

Acceptance Filter Section Table structure. More...

#include <lpc17xx_can.h>

Data Fields

FullCAN_Entry * FullCAN_Sec
uint8_t | FC_NumEntry
SFF_Entry * SFF_Sec
uint8_t | SFF_NumEntry
SFF_GPR_Entry * SFF_GPR_Sec
uint8_t | SFF_GPR_NumEntry
EFF_Entry * EFF_Sec
uint8_t | EFF_NumEntry
EFF_GPR_Entry * EFF_GPR_Sec
uint8_t | EFF_GPR_NumEntry

Detailed Description

Acceptance Filter Section Table structure.

Definition at line 794 of file lpc17xx_can.h.

Field Documentation

uint8_t EFF_GPR_NumEntry

Group Extended ID Entry Number

Definition at line 804 of file lpc17xx_can.h.

EFF_GPR_Entry* EFF_GPR_Sec

The pointer point to EFF_GPR_Entry

Definition at line 803 of file lpc17xx_can.h.

uint8_t EFF_NumEntry

Extended ID Entry Number

Definition at line 802 of file lpc17xx_can.h.

EFF_Entry* EFF_Sec

The pointer point to EFF_Entry

Definition at line 801 of file lpc17xx_can.h.

uint8_t FC_NumEntry

FullCAN Entry Number

Definition at line 796 of file lpc17xx_can.h.

FullCAN_Entry* FullCAN_Sec

The pointer point to FullCAN_Entry

Definition at line 795 of file lpc17xx_can.h.

uint8_t SFF_GPR_NumEntry

Group Standard ID Entry Number

Definition at line 800 of file lpc17xx_can.h.

SFF_GPR_Entry* SFF_GPR_Sec

The pointer point to SFF_GPR_Entry

Definition at line 799 of file lpc17xx_can.h.

uint8_t SFF_NumEntry

Standard ID Entry Number

Definition at line 798 of file lpc17xx_can.h.

SFF_Entry* SFF_Sec

The pointer point to SFF_Entry

Definition at line 797 of file lpc17xx_can.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: APSR_Type Union Reference

  • Data Fields
Data Fields
APSR_Type Union Reference
CMSIS Core

Union type to access the Application Program Status Register (APSR). More...

#include <core_cm3.h>

Data Fields

struct {
uint32_t _reserved0:27
uint32_t Q:1
uint32_t V:1
uint32_t C:1
uint32_t Z:1
uint32_t N:1
} b
uint32_t w

Detailed Description

Union type to access the Application Program Status Register (APSR).

Definition at line 179 of file core_cm3.h.

Field Documentation

uint32_t _reserved0

bit: 0..26 Reserved

Definition at line 184 of file core_cm3.h.

struct { ... } b

Structure used for bit access

uint32_t C

bit: 29 Carry condition code flag

Definition at line 192 of file core_cm3.h.

uint32_t N

bit: 31 Negative condition code flag

Definition at line 194 of file core_cm3.h.

uint32_t Q

bit: 27 Saturation condition flag

Definition at line 190 of file core_cm3.h.

uint32_t V

bit: 28 Overflow condition code flag

Definition at line 191 of file core_cm3.h.

uint32_t w

Type used for word access

Definition at line 196 of file core_cm3.h.

uint32_t Z

bit: 30 Zero condition code flag

Definition at line 193 of file core_cm3.h.

The documentation for this union was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cm3.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_bilinear_interp_instance_f32 Struct Reference

  • Data Fields
Data Fields
arm_bilinear_interp_instance_f32 Struct Reference

Instance structure for the floating-point bilinear interpolation function. More...

#include <arm_math.h>

Data Fields

uint16_t | numRows
uint16_t | numCols
float32_t * pData

Detailed Description

Instance structure for the floating-point bilinear interpolation function.

Definition at line 1796 of file arm_math.h.

Field Documentation

uint16_t numCols

number of columns in the data table.

Definition at line 1799 of file arm_math.h.

uint16_t numRows

number of rows in the data table.

Definition at line 1798 of file arm_math.h.

float32_t* pData

points to the data table.

Definition at line 1800 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_bilinear_interp_instance_q15 Struct Reference

  • Data Fields
Data Fields
arm_bilinear_interp_instance_q15 Struct Reference

Instance structure for the Q15 bilinear interpolation function. More...

#include <arm_math.h>

Data Fields

uint16_t | numRows
uint16_t | numCols
q15_t * pData

Detailed Description

Instance structure for the Q15 bilinear interpolation function.

Definition at line 1818 of file arm_math.h.

Field Documentation

uint16_t numCols

number of columns in the data table.

Definition at line 1821 of file arm_math.h.

uint16_t numRows

number of rows in the data table.

Definition at line 1820 of file arm_math.h.

q15_t* pData

points to the data table.

Definition at line 1822 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_bilinear_interp_instance_q31 Struct Reference

  • Data Fields
Data Fields
arm_bilinear_interp_instance_q31 Struct Reference

Instance structure for the Q31 bilinear interpolation function. More...

#include <arm_math.h>

Data Fields

uint16_t | numRows
uint16_t | numCols
q31_t * pData

Detailed Description

Instance structure for the Q31 bilinear interpolation function.

Definition at line 1807 of file arm_math.h.

Field Documentation

uint16_t numCols

number of columns in the data table.

Definition at line 1810 of file arm_math.h.

uint16_t numRows

number of rows in the data table.

Definition at line 1809 of file arm_math.h.

q31_t* pData

points to the data table.

Definition at line 1811 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_bilinear_interp_instance_q7 Struct Reference

  • Data Fields
Data Fields
arm_bilinear_interp_instance_q7 Struct Reference

Instance structure for the Q15 bilinear interpolation function. More...

#include <arm_math.h>

Data Fields

uint16_t | numRows
uint16_t | numCols
q7_t * pData

Detailed Description

Instance structure for the Q15 bilinear interpolation function.

Definition at line 1829 of file arm_math.h.

Field Documentation

uint16_t numCols

number of columns in the data table.

Definition at line 1832 of file arm_math.h.

uint16_t numRows

number of rows in the data table.

Definition at line 1831 of file arm_math.h.

q7_t* pData

points to the data table.

Definition at line 1833 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_biquad_cas_df1_32x64_ins_q31 Struct Reference

  • Data Fields
Data Fields
arm_biquad_cas_df1_32x64_ins_q31 Struct Reference

Instance structure for the high precision Q31 Biquad cascade filter. More...

#include <arm_math.h>

Data Fields

uint8_t | numStages
q63_t * pState
q31_t * pCoeffs
uint8_t | postShift

Detailed Description

Instance structure for the high precision Q31 Biquad cascade filter.

Definition at line 3552 of file arm_math.h.

Field Documentation

uint8_t numStages

number of 2nd order stages in the filter. Overall order is 2*numStages.

Definition at line 3554 of file arm_math.h.

q31_t* pCoeffs

points to the array of coefficients. The array is of length 5*numStages.

Definition at line 3556 of file arm_math.h.

uint8_t postShift

additional shift, in bits, applied to each output sample.

Definition at line 3557 of file arm_math.h.

q63_t* pState

points to the array of state coefficients. The array is of length 4*numStages.

Definition at line 3555 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_biquad_cascade_df2T_instance_f32 Struct Reference

  • Data Fields
Data Fields
arm_biquad_cascade_df2T_instance_f32 Struct Reference

Instance structure for the floating-point transposed direct form II Biquad cascade filter. More...

#include <arm_math.h>

Data Fields

uint8_t numStages
float32_t * pState
float32_t * pCoeffs

Detailed Description

Instance structure for the floating-point transposed direct form II Biquad cascade filter.

Definition at line 3599 of file arm_math.h.

Field Documentation

uint8_t numStages

number of 2nd order stages in the filter. Overall order is 2*numStages.

Definition at line 3601 of file arm_math.h.

float32_t* pCoeffs

points to the array of coefficients. The array is of length 5*numStages.

Definition at line 3603 of file arm_math.h.

float32_t* pState

points to the array of state coefficients. The array is of length 2*numStages.

Definition at line 3602 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_biquad_casd_df1_inst_f32 Struct Reference

  • Data Fields
Data Fields
arm_biquad_casd_df1_inst_f32 Struct Reference

Instance structure for the floating-point Biquad cascade filter. More...

#include <arm_math.h>

Data Fields

uint32_t numStages
float32_t * pState
float32_t * pCoeffs

Detailed Description

Instance structure for the floating-point Biquad cascade filter.

Definition at line 1208 of file arm_math.h.

Field Documentation

uint32_t numStages

number of 2nd order stages in the filter. Overall order is 2*numStages.

Definition at line 1210 of file arm_math.h.

float32_t* pCoeffs

Points to the array of coefficients. The array is of length 5*numStages.

Definition at line 1212 of file arm_math.h.

float32_t* pState

Points to the array of state coefficients. The array is of length 4*numStages.

Definition at line 1211 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_biquad_casd_df1_inst_q15 Struct Reference

  • Data Fields
Data Fields
arm_biquad_casd_df1_inst_q15 Struct Reference

Instance structure for the Q15 Biquad cascade filter. More...

#include <arm_math.h>

Data Fields

int8_t | numStages
q15_t * pState
q15_t * pCoeffs
int8_t | postShift

Detailed Description

Instance structure for the Q15 Biquad cascade filter.

Definition at line 1183 of file arm_math.h.

Field Documentation

int8_t numStages

number of 2nd order stages in the filter. Overall order is 2*numStages.

Definition at line 1185 of file arm_math.h.

q15_t* pCoeffs

Points to the array of coefficients. The array is of length 5*numStages.

Definition at line 1187 of file arm_math.h.

int8_t postShift

Additional shift, in bits, applied to each output sample.

Definition at line 1188 of file arm_math.h.

q15_t* pState

Points to the array of state coefficients. The array is of length 4*numStages.

Definition at line 1186 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_biquad_casd_df1_inst_q31 Struct Reference

  • Data Fields
Data Fields
arm_biquad_casd_df1_inst_q31 Struct Reference

Instance structure for the Q31 Biquad cascade filter. More...

#include <arm_math.h>

Data Fields

uint32_t | numStages
q31_t * pState
q31_t * pCoeffs
uint8_t | postShift

Detailed Description

Instance structure for the Q31 Biquad cascade filter.

Definition at line 1196 of file arm_math.h.

Field Documentation

uint32_t numStages

number of 2nd order stages in the filter. Overall order is 2*numStages.

Definition at line 1198 of file arm_math.h.

q31_t* pCoeffs

Points to the array of coefficients. The array is of length 5*numStages.

Definition at line 1200 of file arm_math.h.

uint8_t postShift

Additional shift, in bits, applied to each output sample.

Definition at line 1201 of file arm_math.h.

q31_t* pState

Points to the array of state coefficients. The array is of length 4*numStages.

Definition at line 1199 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_cfft_radix4_instance_f32 Struct Reference

  • Data Fields
Data Fields
arm_cfft_radix4_instance_f32 Struct Reference

Instance structure for the floating-point CFFT/CIFFT function. More...

#include <arm_math.h>

Data Fields

uint16_t | fftLen
uint8_t | ifftFlag
uint8_t | bitReverseFlag
float32_t * pTwiddle
uint16_t * | pBitRevTable
uint16_t | twidCoefModifier
uint16_t | bitRevFactor
float32_t onebyfftLen

Detailed Description

Instance structure for the floating-point CFFT/CIFFT function.

Definition at line 1932 of file arm_math.h.

Field Documentation

uint8_t bitReverseFlag

flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.

Definition at line 1936 of file arm_math.h.

uint16_t bitRevFactor

bit reversal modifier that supports different size FFTs with the same bit reversal table.

Definition at line 1940 of file arm_math.h.

uint16_t fftLen

length of the FFT.

Definition at line 1934 of file arm_math.h.

uint8_t ifftFlag

flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.

Definition at line 1935 of file arm_math.h.

float32_t onebyfftLen

value of 1/fftLen.

Definition at line 1941 of file arm_math.h.

uint16_t* pBitRevTable

points to the bit reversal table.

Definition at line 1938 of file arm_math.h.

float32_t* pTwiddle

points to the twiddle factor table.

Definition at line 1937 of file arm_math.h.

uint16_t twidCoefModifier

twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

Definition at line 1939 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_cfft_radix4_instance_q15 Struct Reference

  • Data Fields
Data Fields
arm_cfft_radix4_instance_q15 Struct Reference

Instance structure for the Q15 CFFT/CIFFT function. More...

#include <arm_math.h>

Data Fields

uint16_t | fftLen
uint8_t | ifftFlag
uint8_t | bitReverseFlag
q15_t * pTwiddle
uint16_t * | pBitRevTable
uint16_t | twidCoefModifier
uint16_t | bitRevFactor

Detailed Description

Instance structure for the Q15 CFFT/CIFFT function.

Definition at line 1902 of file arm_math.h.

Field Documentation

uint8_t bitReverseFlag

flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.

Definition at line 1906 of file arm_math.h.

uint16_t bitRevFactor

bit reversal modifier that supports different size FFTs with the same bit reversal table.

Definition at line 1910 of file arm_math.h.

uint16_t fftLen

length of the FFT.

Definition at line 1904 of file arm_math.h.

uint8_t ifftFlag

flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.

Definition at line 1905 of file arm_math.h.

uint16_t* pBitRevTable

points to the bit reversal table.

Definition at line 1908 of file arm_math.h.

q15_t* pTwiddle

points to the twiddle factor table.

Definition at line 1907 of file arm_math.h.

uint16_t twidCoefModifier

twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

Definition at line 1909 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_cfft_radix4_instance_q31 Struct Reference

  • Data Fields
Data Fields
arm_cfft_radix4_instance_q31 Struct Reference

Instance structure for the Q31 CFFT/CIFFT function. More...

#include <arm_math.h>

Data Fields

uint16_t | fftLen
uint8_t | ifftFlag
uint8_t | bitReverseFlag
q31_t * pTwiddle
uint16_t * | pBitRevTable
uint16_t | twidCoefModifier
uint16_t | bitRevFactor

Detailed Description

Instance structure for the Q31 CFFT/CIFFT function.

Definition at line 1917 of file arm_math.h.

Field Documentation

uint8_t bitReverseFlag

flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.

Definition at line 1921 of file arm_math.h.

uint16_t bitRevFactor

bit reversal modifier that supports different size FFTs with the same bit reversal table.

Definition at line 1925 of file arm_math.h.

uint16_t fftLen

length of the FFT.

Definition at line 1919 of file arm_math.h.

uint8_t ifftFlag

flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.

Definition at line 1920 of file arm_math.h.

uint16_t* pBitRevTable

points to the bit reversal table.

Definition at line 1923 of file arm_math.h.

q31_t* pTwiddle

points to the twiddle factor table.

Definition at line 1922 of file arm_math.h.

uint16_t twidCoefModifier

twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

Definition at line 1924 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_dct4_instance_f32 Struct Reference

  • Data Fields
Data Fields
arm_dct4_instance_f32 Struct Reference

Instance structure for the floating-point DCT4/IDCT4 function. More...

#include <arm_math.h>

Data Fields

uint16_t | N
uint16_t | Nby2
float32_t normalize
float32_t * pTwiddle
float32_t * pCosFactor
arm_rfft_instance_f32 * pRfft
arm_cfft_radix4_instance_f32 * pCfft

Detailed Description

Instance structure for the floating-point DCT4/IDCT4 function.

Definition at line 2307 of file arm_math.h.

Field Documentation

uint16_t N

length of the DCT4.

Definition at line 2309 of file arm_math.h.

uint16_t Nby2

half of the length of the DCT4.

Definition at line 2310 of file arm_math.h.

float32_t normalize

normalizing factor.

Definition at line 2311 of file arm_math.h.

arm_cfft_radix4_instance_f32* pCfft

points to the complex FFT instance.

Definition at line 2315 of file arm_math.h.

float32_t* pCosFactor

points to the cosFactor table.

Definition at line 2313 of file arm_math.h.

arm_rfft_instance_f32* pRfft

points to the real FFT instance.

Definition at line 2314 of file arm_math.h.

float32_t* pTwiddle

points to the twiddle factor table.

Definition at line 2312 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_dct4_instance_q15 Struct Reference

  • Data Fields
Data Fields
arm_dct4_instance_q15 Struct Reference

Instance structure for the Q15 DCT4/IDCT4 function. More...

#include <arm_math.h>

Data Fields

uint16_t | N
uint16_t | Nby2
q15_t normalize
q15_t * pTwiddle
q15_t * pCosFactor
arm_rfft_instance_q15 * pRfft
arm_cfft_radix4_instance_q15 * pCfft

Detailed Description

Instance structure for the Q15 DCT4/IDCT4 function.

Definition at line 2401 of file arm_math.h.

Field Documentation

uint16_t N

length of the DCT4.

Definition at line 2403 of file arm_math.h.

uint16_t Nby2

half of the length of the DCT4.

Definition at line 2404 of file arm_math.h.

q15_t normalize

normalizing factor.

Definition at line 2405 of file arm_math.h.

arm_cfft_radix4_instance_q15* pCfft

points to the complex FFT instance.

Definition at line 2409 of file arm_math.h.

q15_t* pCosFactor

points to the cosFactor table.

Definition at line 2407 of file arm_math.h.

arm_rfft_instance_q15* pRfft

points to the real FFT instance.

Definition at line 2408 of file arm_math.h.

q15_t* pTwiddle

points to the twiddle factor table.

Definition at line 2406 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_dct4_instance_q31 Struct Reference

  • Data Fields
Data Fields
arm_dct4_instance_q31 Struct Reference

Instance structure for the Q31 DCT4/IDCT4 function. More...

#include <arm_math.h>

Data Fields

uint16_t | N
uint16_t | Nby2
q31_t normalize
q31_t * pTwiddle
q31_t * pCosFactor
arm_rfft_instance_q31 * pRfft
arm_cfft_radix4_instance_q31 * pCfft

Detailed Description

Instance structure for the Q31 DCT4/IDCT4 function.

Definition at line 2354 of file arm_math.h.

Field Documentation

uint16_t N

length of the DCT4.

Definition at line 2356 of file arm_math.h.

uint16_t Nby2

half of the length of the DCT4.

Definition at line 2357 of file arm_math.h.

q31_t normalize

normalizing factor.

Definition at line 2358 of file arm_math.h.

arm_cfft_radix4_instance_q31* pCfft

points to the complex FFT instance.

Definition at line 2362 of file arm_math.h.

q31_t* pCosFactor

points to the cosFactor table.

Definition at line 2360 of file arm_math.h.

arm_rfft_instance_q31* pRfft

points to the real FFT instance.

Definition at line 2361 of file arm_math.h.

q31_t* pTwiddle

points to the twiddle factor table.

Definition at line 2359 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_fir_decimate_instance_f32 Struct Reference

  • Data Fields
Data Fields
arm_fir_decimate_instance_f32 Struct Reference

Instance structure for the floating-point FIR decimator. More...

#include <arm_math.h>

Data Fields

uint8_t | M
uint16_t | numTaps
float32_t * pCoeffs
float32_t * pState

Detailed Description

Instance structure for the floating-point FIR decimator.

Definition at line 3252 of file arm_math.h.

Field Documentation

uint8_t M

decimation factor.

Definition at line 3254 of file arm_math.h.

uint16_t numTaps

number of coefficients in the filter.

Definition at line 3255 of file arm_math.h.

float32_t* pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 3256 of file arm_math.h.

float32_t* pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 3257 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_fir_decimate_instance_q15 Struct Reference

  • Data Fields
Data Fields
arm_fir_decimate_instance_q15 Struct Reference

Instance structure for the Q15 FIR decimator. More...

#include <arm_math.h>

Data Fields

uint8_t | M
uint16_t | numTaps
q15_t * pCoeffs
q15_t * pState

Detailed Description

Instance structure for the Q15 FIR decimator.

Definition at line 3227 of file arm_math.h.

Field Documentation

uint8_t M

decimation factor.

Definition at line 3229 of file arm_math.h.

uint16_t numTaps

number of coefficients in the filter.

Definition at line 3230 of file arm_math.h.

q15_t* pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 3231 of file arm_math.h.

q15_t* pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 3232 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_fir_decimate_instance_q31 Struct Reference

  • Data Fields
Data Fields
arm_fir_decimate_instance_q31 Struct Reference

Instance structure for the Q31 FIR decimator. More...

#include <arm_math.h>

Data Fields

uint8_t | M
uint16_t | numTaps
q31_t * pCoeffs
q31_t * pState

Detailed Description

Instance structure for the Q31 FIR decimator.

Definition at line 3239 of file arm_math.h.

Field Documentation

uint8_t M

decimation factor.

Definition at line 3241 of file arm_math.h.

uint16_t numTaps

number of coefficients in the filter.

Definition at line 3242 of file arm_math.h.

q31_t* pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 3243 of file arm_math.h.

q31_t* pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 3244 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_fir_instance_f32 Struct Reference

  • Data Fields
Data Fields
arm_fir_instance_f32 Struct Reference

Instance structure for the floating-point FIR filter. More...

#include <arm_math.h>

Data Fields

uint16_t numTaps
float32_t * pState
float32_t * pCoeffs

Detailed Description

Instance structure for the floating-point FIR filter.

Definition at line 1019 of file arm_math.h.

Field Documentation

uint16_t numTaps

number of filter coefficients in the filter.

Definition at line 1021 of file arm_math.h.

float32_t* pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 1023 of file arm_math.h.

float32_t* pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 1022 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_fir_instance_q15 Struct Reference

  • Data Fields
Data Fields
arm_fir_instance_q15 Struct Reference

Instance structure for the Q15 FIR filter. More...

#include <arm_math.h>

Data Fields

uint16_t numTaps
q15_t * pState
q15_t * pCoeffs

Detailed Description

Instance structure for the Q15 FIR filter.

Definition at line 999 of file arm_math.h.

Field Documentation

uint16_t numTaps

number of filter coefficients in the filter.

Definition at line 1001 of file arm_math.h.

q15_t* pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 1003 of file arm_math.h.

q15_t* pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 1002 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_fir_instance_q31 Struct Reference

  • Data Fields
Data Fields
arm_fir_instance_q31 Struct Reference

Instance structure for the Q31 FIR filter. More...

#include <arm_math.h>

Data Fields

uint16_t numTaps
q31_t * pState
q31_t * pCoeffs

Detailed Description

Instance structure for the Q31 FIR filter.

Definition at line 1009 of file arm_math.h.

Field Documentation

uint16_t numTaps

number of filter coefficients in the filter.

Definition at line 1011 of file arm_math.h.

q31_t* pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 1013 of file arm_math.h.

q31_t* pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 1012 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_fir_instance_q7 Struct Reference

  • Data Fields
Data Fields
arm_fir_instance_q7 Struct Reference

Instance structure for the Q7 FIR filter. More...

#include <arm_math.h>

Data Fields

uint16_t numTaps
q7_t * pState
q7_t * pCoeffs

Detailed Description

Instance structure for the Q7 FIR filter.

Definition at line 989 of file arm_math.h.

Field Documentation

uint16_t numTaps

number of filter coefficients in the filter.

Definition at line 991 of file arm_math.h.

q7_t* pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 993 of file arm_math.h.

q7_t* pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 992 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_fir_interpolate_instance_f32 Struct Reference

  • Data Fields
Data Fields
arm_fir_interpolate_instance_f32 Struct Reference

Instance structure for the floating-point FIR interpolator. More...

#include <arm_math.h>

Data Fields

uint8_t | L
uint16_t | phaseLength
float32_t * pCoeffs
float32_t * pState

Detailed Description

Instance structure for the floating-point FIR interpolator.

Definition at line 3432 of file arm_math.h.

Field Documentation

uint8_t L

upsample factor.

Definition at line 3434 of file arm_math.h.

float32_t* pCoeffs

points to the coefficient array. The array is of length L*phaseLength.

Definition at line 3436 of file arm_math.h.

uint16_t phaseLength

length of each polyphase filter component.

Definition at line 3435 of file arm_math.h.

float32_t* pState

points to the state variable array. The array is of length phaseLength+numTaps-1.

Definition at line 3437 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_fir_interpolate_instance_q15 Struct Reference

  • Data Fields
Data Fields
arm_fir_interpolate_instance_q15 Struct Reference

Instance structure for the Q15 FIR interpolator. More...

#include <arm_math.h>

Data Fields

uint8_t | L
uint16_t | phaseLength
q15_t * pCoeffs
q15_t * pState

Detailed Description

Instance structure for the Q15 FIR interpolator.

Definition at line 3408 of file arm_math.h.

Field Documentation

uint8_t L

upsample factor.

Definition at line 3410 of file arm_math.h.

q15_t* pCoeffs

points to the coefficient array. The array is of length L*phaseLength.

Definition at line 3412 of file arm_math.h.

uint16_t phaseLength

length of each polyphase filter component.

Definition at line 3411 of file arm_math.h.

q15_t* pState

points to the state variable array. The array is of length blockSize+phaseLength-1.

Definition at line 3413 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_fir_interpolate_instance_q31 Struct Reference

  • Data Fields
Data Fields
arm_fir_interpolate_instance_q31 Struct Reference

Instance structure for the Q31 FIR interpolator. More...

#include <arm_math.h>

Data Fields

uint8_t | L
uint16_t | phaseLength
q31_t * pCoeffs
q31_t * pState

Detailed Description

Instance structure for the Q31 FIR interpolator.

Definition at line 3420 of file arm_math.h.

Field Documentation

uint8_t L

upsample factor.

Definition at line 3422 of file arm_math.h.

q31_t* pCoeffs

points to the coefficient array. The array is of length L*phaseLength.

Definition at line 3424 of file arm_math.h.

uint16_t phaseLength

length of each polyphase filter component.

Definition at line 3423 of file arm_math.h.

q31_t* pState

points to the state variable array. The array is of length blockSize+phaseLength-1.

Definition at line 3425 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_fir_lattice_instance_f32 Struct Reference

  • Data Fields
Data Fields
arm_fir_lattice_instance_f32 Struct Reference

Instance structure for the floating-point FIR lattice filter. More...

#include <arm_math.h>

Data Fields

uint16_t numStages
float32_t * pState
float32_t * pCoeffs

Detailed Description

Instance structure for the floating-point FIR lattice filter.

Definition at line 3666 of file arm_math.h.

Field Documentation

uint16_t numStages

number of filter stages.

Definition at line 3668 of file arm_math.h.

float32_t* pCoeffs

points to the coefficient array. The array is of length numStages.

Definition at line 3670 of file arm_math.h.

float32_t* pState

points to the state variable array. The array is of length numStages.

Definition at line 3669 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_fir_lattice_instance_q15 Struct Reference

  • Data Fields
Data Fields
arm_fir_lattice_instance_q15 Struct Reference

Instance structure for the Q15 FIR lattice filter. More...

#include <arm_math.h>

Data Fields

uint16_t numStages
q15_t * pState
q15_t * pCoeffs

Detailed Description

Instance structure for the Q15 FIR lattice filter.

Definition at line 3644 of file arm_math.h.

Field Documentation

uint16_t numStages

number of filter stages.

Definition at line 3646 of file arm_math.h.

q15_t* pCoeffs

points to the coefficient array. The array is of length numStages.

Definition at line 3648 of file arm_math.h.

q15_t* pState

points to the state variable array. The array is of length numStages.

Definition at line 3647 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_fir_lattice_instance_q31 Struct Reference

  • Data Fields
Data Fields
arm_fir_lattice_instance_q31 Struct Reference

Instance structure for the Q31 FIR lattice filter. More...

#include <arm_math.h>

Data Fields

uint16_t numStages
q31_t * pState
q31_t * pCoeffs

Detailed Description

Instance structure for the Q31 FIR lattice filter.

Definition at line 3655 of file arm_math.h.

Field Documentation

uint16_t numStages

number of filter stages.

Definition at line 3657 of file arm_math.h.

q31_t* pCoeffs

points to the coefficient array. The array is of length numStages.

Definition at line 3659 of file arm_math.h.

q31_t* pState

points to the state variable array. The array is of length numStages.

Definition at line 3658 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_fir_sparse_instance_f32 Struct Reference

  • Data Fields
Data Fields
arm_fir_sparse_instance_f32 Struct Reference

Instance structure for the floating-point sparse FIR filter. More...

#include <arm_math.h>

Data Fields

uint16_t | numTaps
uint16_t | stateIndex
float32_t * pState
float32_t * pCoeffs
uint16_t | maxDelay
int32_t * | pTapDelay

Detailed Description

Instance structure for the floating-point sparse FIR filter.

Definition at line 4332 of file arm_math.h.

Field Documentation

uint16_t maxDelay

maximum offset specified by the pTapDelay array.

Definition at line 4338 of file arm_math.h.

uint16_t numTaps

number of coefficients in the filter.

Definition at line 4334 of file arm_math.h.

float32_t* pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 4337 of file arm_math.h.

float32_t* pState

points to the state buffer array. The array is of length maxDelay+blockSize-1.

Definition at line 4336 of file arm_math.h.

int32_t* pTapDelay

points to the array of delay values. The array is of length numTaps.

Definition at line 4339 of file arm_math.h.

uint16_t stateIndex

state buffer index. Points to the oldest sample in the state buffer.

Definition at line 4335 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_fir_sparse_instance_q15 Struct Reference

  • Data Fields
Data Fields
arm_fir_sparse_instance_q15 Struct Reference

Instance structure for the Q15 sparse FIR filter. More...

#include <arm_math.h>

Data Fields

uint16_t | numTaps
uint16_t | stateIndex
q15_t * pState
q15_t * pCoeffs
uint16_t | maxDelay
int32_t * | pTapDelay

Detailed Description

Instance structure for the Q15 sparse FIR filter.

Definition at line 4360 of file arm_math.h.

Field Documentation

uint16_t maxDelay

maximum offset specified by the pTapDelay array.

Definition at line 4366 of file arm_math.h.

uint16_t numTaps

number of coefficients in the filter.

Definition at line 4362 of file arm_math.h.

q15_t* pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 4365 of file arm_math.h.

q15_t* pState

points to the state buffer array. The array is of length maxDelay+blockSize-1.

Definition at line 4364 of file arm_math.h.

int32_t* pTapDelay

points to the array of delay values. The array is of length numTaps.

Definition at line 4367 of file arm_math.h.

uint16_t stateIndex

state buffer index. Points to the oldest sample in the state buffer.

Definition at line 4363 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_fir_sparse_instance_q31 Struct Reference

  • Data Fields
Data Fields
arm_fir_sparse_instance_q31 Struct Reference

Instance structure for the Q31 sparse FIR filter. More...

#include <arm_math.h>

Data Fields

uint16_t | numTaps
uint16_t | stateIndex
q31_t * pState
q31_t * pCoeffs
uint16_t | maxDelay
int32_t * | pTapDelay

Detailed Description

Instance structure for the Q31 sparse FIR filter.

Definition at line 4346 of file arm_math.h.

Field Documentation

uint16_t maxDelay

maximum offset specified by the pTapDelay array.

Definition at line 4352 of file arm_math.h.

uint16_t numTaps

number of coefficients in the filter.

Definition at line 4348 of file arm_math.h.

q31_t* pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 4351 of file arm_math.h.

q31_t* pState

points to the state buffer array. The array is of length maxDelay+blockSize-1.

Definition at line 4350 of file arm_math.h.

int32_t* pTapDelay

points to the array of delay values. The array is of length numTaps.

Definition at line 4353 of file arm_math.h.

uint16_t stateIndex

state buffer index. Points to the oldest sample in the state buffer.

Definition at line 4349 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_fir_sparse_instance_q7 Struct Reference

  • Data Fields
Data Fields
arm_fir_sparse_instance_q7 Struct Reference

Instance structure for the Q7 sparse FIR filter. More...

#include <arm_math.h>

Data Fields

uint16_t | numTaps
uint16_t | stateIndex
q7_t * pState
q7_t * pCoeffs
uint16_t | maxDelay
int32_t * | pTapDelay

Detailed Description

Instance structure for the Q7 sparse FIR filter.

Definition at line 4374 of file arm_math.h.

Field Documentation

uint16_t maxDelay

maximum offset specified by the pTapDelay array.

Definition at line 4380 of file arm_math.h.

uint16_t numTaps

number of coefficients in the filter.

Definition at line 4376 of file arm_math.h.

q7_t* pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 4379 of file arm_math.h.

q7_t* pState

points to the state buffer array. The array is of length maxDelay+blockSize-1.

Definition at line 4378 of file arm_math.h.

int32_t* pTapDelay

points to the array of delay values. The array is of length numTaps.

Definition at line 4381 of file arm_math.h.

uint16_t stateIndex

state buffer index. Points to the oldest sample in the state buffer.

Definition at line 4377 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_iir_lattice_instance_f32 Struct Reference

  • Data Fields
Data Fields
arm_iir_lattice_instance_f32 Struct Reference

Instance structure for the floating-point IIR lattice filter. More...

#include <arm_math.h>

Data Fields

uint16_t numStages
float32_t * pState
float32_t * pkCoeffs
float32_t * pvCoeffs

Detailed Description

Instance structure for the floating-point IIR lattice filter.

Definition at line 3789 of file arm_math.h.

Field Documentation

uint16_t numStages

number of stages in the filter.

Definition at line 3791 of file arm_math.h.

float32_t* pkCoeffs

points to the reflection coefficient array. The array is of length numStages.

Definition at line 3793 of file arm_math.h.

float32_t* pState

points to the state variable array. The array is of length numStages+blockSize.

Definition at line 3792 of file arm_math.h.

float32_t* pvCoeffs

points to the ladder coefficient array. The array is of length numStages+1.

Definition at line 3794 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_iir_lattice_instance_q15 Struct Reference

  • Data Fields
Data Fields
arm_iir_lattice_instance_q15 Struct Reference

Instance structure for the Q15 IIR lattice filter. More...

#include <arm_math.h>

Data Fields

uint16_t numStages
q15_t * pState
q15_t * pkCoeffs
q15_t * pvCoeffs

Detailed Description

Instance structure for the Q15 IIR lattice filter.

Definition at line 3767 of file arm_math.h.

Field Documentation

uint16_t numStages

number of stages in the filter.

Definition at line 3769 of file arm_math.h.

q15_t* pkCoeffs

points to the reflection coefficient array. The array is of length numStages.

Definition at line 3771 of file arm_math.h.

q15_t* pState

points to the state variable array. The array is of length numStages+blockSize.

Definition at line 3770 of file arm_math.h.

q15_t* pvCoeffs

points to the ladder coefficient array. The array is of length numStages+1.

Definition at line 3772 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:31 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_iir_lattice_instance_q31 Struct Reference

  • Data Fields
Data Fields
arm_iir_lattice_instance_q31 Struct Reference

Instance structure for the Q31 IIR lattice filter. More...

#include <arm_math.h>

Data Fields

uint16_t numStages
q31_t * pState
q31_t * pkCoeffs
q31_t * pvCoeffs

Detailed Description

Instance structure for the Q31 IIR lattice filter.

Definition at line 3778 of file arm_math.h.

Field Documentation

uint16_t numStages

number of stages in the filter.

Definition at line 3780 of file arm_math.h.

q31_t* pkCoeffs

points to the reflection coefficient array. The array is of length numStages.

Definition at line 3782 of file arm_math.h.

q31_t* pState

points to the state variable array. The array is of length numStages+blockSize.

Definition at line 3781 of file arm_math.h.

q31_t* pvCoeffs

points to the ladder coefficient array. The array is of length numStages+1.

Definition at line 3783 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_linear_interp_instance_f32 Struct Reference

  • Data Fields
Data Fields
arm_linear_interp_instance_f32 Struct Reference

Instance structure for the floating-point Linear Interpolate function. More...

#include <arm_math.h>

Data Fields

uint32_t nValues
float32_t x1
float32_t xSpacing
float32_t * pYData

Detailed Description

Instance structure for the floating-point Linear Interpolate function.

Definition at line 1784 of file arm_math.h.

Field Documentation

uint32_t nValues

Definition at line 1786 of file arm_math.h.

float32_t* pYData

pointer to the table of Y values

Definition at line 1789 of file arm_math.h.

float32_t x1

Definition at line 1787 of file arm_math.h.

float32_t xSpacing

Definition at line 1788 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_lms_instance_f32 Struct Reference

  • Data Fields
Data Fields
arm_lms_instance_f32 Struct Reference

Instance structure for the floating-point LMS filter. More...

#include <arm_math.h>

Data Fields

uint16_t numTaps
float32_t * pState
float32_t * pCoeffs
float32_t mu

Detailed Description

Instance structure for the floating-point LMS filter.

Definition at line 3907 of file arm_math.h.

Field Documentation

float32_t mu

step size that controls filter coefficient updates.

Definition at line 3912 of file arm_math.h.

uint16_t numTaps

number of coefficients in the filter.

Definition at line 3909 of file arm_math.h.

float32_t* pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 3911 of file arm_math.h.

float32_t* pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 3910 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_lms_instance_q15 Struct Reference

  • Data Fields
Data Fields
arm_lms_instance_q15 Struct Reference

Instance structure for the Q15 LMS filter. More...

#include <arm_math.h>

Data Fields

uint16_t | numTaps
q15_t * pState
q15_t * pCoeffs
q15_t mu
uint32_t | postShift

Detailed Description

Instance structure for the Q15 LMS filter.

Definition at line 3957 of file arm_math.h.

Field Documentation

q15_t mu

step size that controls filter coefficient updates.

Definition at line 3962 of file arm_math.h.

uint16_t numTaps

number of coefficients in the filter.

Definition at line 3959 of file arm_math.h.

q15_t* pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 3961 of file arm_math.h.

uint32_t postShift

bit shift applied to coefficients.

Definition at line 3963 of file arm_math.h.

q15_t* pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 3960 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_lms_instance_q31 Struct Reference

  • Data Fields
Data Fields
arm_lms_instance_q31 Struct Reference

Instance structure for the Q31 LMS filter. More...

#include <arm_math.h>

Data Fields

uint16_t | numTaps
q31_t * pState
q31_t * pCoeffs
q31_t mu
uint32_t | postShift

Detailed Description

Instance structure for the Q31 LMS filter.

Definition at line 4012 of file arm_math.h.

Field Documentation

q31_t mu

step size that controls filter coefficient updates.

Definition at line 4017 of file arm_math.h.

uint16_t numTaps

number of coefficients in the filter.

Definition at line 4014 of file arm_math.h.

q31_t* pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 4016 of file arm_math.h.

uint32_t postShift

bit shift applied to coefficients.

Definition at line 4018 of file arm_math.h.

q31_t* pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 4015 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_lms_norm_instance_f32 Struct Reference

  • Data Fields
Data Fields
arm_lms_norm_instance_f32 Struct Reference

Instance structure for the floating-point normalized LMS filter. More...

#include <arm_math.h>

Data Fields

uint16_t numTaps
float32_t * pState
float32_t * pCoeffs
float32_t mu
float32_t energy
float32_t x0

Detailed Description

Instance structure for the floating-point normalized LMS filter.

Definition at line 4066 of file arm_math.h.

Field Documentation

float32_t energy

saves previous frame energy.

Definition at line 4072 of file arm_math.h.

float32_t mu

step size that control filter coefficient updates.

Definition at line 4071 of file arm_math.h.

uint16_t numTaps

number of coefficients in the filter.

Definition at line 4068 of file arm_math.h.

float32_t* pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 4070 of file arm_math.h.

float32_t* pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 4069 of file arm_math.h.

float32_t x0

saves previous input sample.

Definition at line 4073 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_lms_norm_instance_q15 Struct Reference

  • Data Fields
Data Fields
arm_lms_norm_instance_q15 Struct Reference

Instance structure for the Q15 normalized LMS filter. More...

#include <arm_math.h>

Data Fields

uint16_t | numTaps
q15_t * pState
q15_t * pCoeffs
q15_t mu
uint8_t | postShift
q15_t * recipTable
q15_t energy
q15_t x0

Detailed Description

Instance structure for the Q15 normalized LMS filter.

Definition at line 4174 of file arm_math.h.

Field Documentation

q15_t energy

saves previous frame energy.

Definition at line 4182 of file arm_math.h.

q15_t mu

step size that controls filter coefficient updates.

Definition at line 4179 of file arm_math.h.

uint16_t numTaps

Number of coefficients in the filter.

Definition at line 4176 of file arm_math.h.

q15_t* pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 4178 of file arm_math.h.

uint8_t postShift

bit shift applied to coefficients.

Definition at line 4180 of file arm_math.h.

q15_t* pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 4177 of file arm_math.h.

q15_t* recipTable

Points to the reciprocal initial value table.

Definition at line 4181 of file arm_math.h.

q15_t x0

saves previous input sample.

Definition at line 4183 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_lms_norm_instance_q31 Struct Reference

  • Data Fields
Data Fields
arm_lms_norm_instance_q31 Struct Reference

Instance structure for the Q31 normalized LMS filter. More...

#include <arm_math.h>

Data Fields

uint16_t | numTaps
q31_t * pState
q31_t * pCoeffs
q31_t mu
uint8_t | postShift
q31_t * recipTable
q31_t energy
q31_t x0

Detailed Description

Instance structure for the Q31 normalized LMS filter.

Definition at line 4118 of file arm_math.h.

Field Documentation

q31_t energy

saves previous frame energy.

Definition at line 4126 of file arm_math.h.

q31_t mu

step size that controls filter coefficient updates.

Definition at line 4123 of file arm_math.h.

uint16_t numTaps

number of coefficients in the filter.

Definition at line 4120 of file arm_math.h.

q31_t* pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 4122 of file arm_math.h.

uint8_t postShift

bit shift applied to coefficients.

Definition at line 4124 of file arm_math.h.

q31_t* pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 4121 of file arm_math.h.

q31_t* recipTable

points to the reciprocal initial value table.

Definition at line 4125 of file arm_math.h.

q31_t x0

saves previous input sample.

Definition at line 4127 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_matrix_instance_f32 Struct Reference

  • Data Fields
Data Fields
arm_matrix_instance_f32 Struct Reference

Instance structure for the floating-point matrix structure. More...

#include <arm_math.h>

Data Fields

uint16_t | numRows
uint16_t | numCols
float32_t * pData

Detailed Description

Instance structure for the floating-point matrix structure.

Definition at line 1350 of file arm_math.h.

Field Documentation

uint16_t numCols

number of columns of the matrix.

Definition at line 1353 of file arm_math.h.

uint16_t numRows

number of rows of the matrix.

Definition at line 1352 of file arm_math.h.

float32_t* pData

points to the data of the matrix.

Definition at line 1354 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_matrix_instance_q15 Struct Reference

  • Data Fields
Data Fields
arm_matrix_instance_q15 Struct Reference

Instance structure for the Q15 matrix structure. More...

#include <arm_math.h>

Data Fields

uint16_t | numRows
uint16_t | numCols
q15_t * pData

Detailed Description

Instance structure for the Q15 matrix structure.

Definition at line 1361 of file arm_math.h.

Field Documentation

uint16_t numCols

number of columns of the matrix.

Definition at line 1364 of file arm_math.h.

uint16_t numRows

number of rows of the matrix.

Definition at line 1363 of file arm_math.h.

q15_t* pData

points to the data of the matrix.

Definition at line 1365 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_matrix_instance_q31 Struct Reference

  • Data Fields
Data Fields
arm_matrix_instance_q31 Struct Reference

Instance structure for the Q31 matrix structure. More...

#include <arm_math.h>

Data Fields

uint16_t | numRows
uint16_t | numCols
q31_t * pData

Detailed Description

Instance structure for the Q31 matrix structure.

Definition at line 1373 of file arm_math.h.

Field Documentation

uint16_t numCols

number of columns of the matrix.

Definition at line 1376 of file arm_math.h.

uint16_t numRows

number of rows of the matrix.

Definition at line 1375 of file arm_math.h.

q31_t* pData

points to the data of the matrix.

Definition at line 1377 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_pid_instance_f32 Struct Reference

  • Data Fields
Data Fields
arm_pid_instance_f32 Struct Reference

Instance structure for the floating-point PID Control. More...

#include <arm_math.h>

Data Fields

float32_t A0
float32_t A1
float32_t A2
float32_t state [3]
float32_t Kp
float32_t Ki
float32_t Kd

Detailed Description

Instance structure for the floating-point PID Control.

Definition at line 1710 of file arm_math.h.

Field Documentation

float32_t A0

The derived gain, A0 = Kp + Ki + Kd .

Definition at line 1712 of file arm_math.h.

float32_t A1

The derived gain, A1 = -Kp - 2Kd.

Definition at line 1713 of file arm_math.h.

float32_t A2

The derived gain, A2 = Kd .

Definition at line 1714 of file arm_math.h.

float32_t Kd

The derivative gain.

Definition at line 1718 of file arm_math.h.

float32_t Ki

The integral gain.

Definition at line 1717 of file arm_math.h.

float32_t Kp

The proportional gain.

Definition at line 1716 of file arm_math.h.

float32_t state[3]

The state array of length 3.

Definition at line 1715 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_pid_instance_q15 Struct Reference

  • Data Fields
Data Fields
arm_pid_instance_q15 Struct Reference

Instance structure for the Q15 PID Control. More...

#include <arm_math.h>

Data Fields

q15_t A0
q31_t A1
q15_t state [3]
q15_t Kp
q15_t Ki
q15_t Kd

Detailed Description

Instance structure for the Q15 PID Control.

Definition at line 1677 of file arm_math.h.

Field Documentation

q15_t A0

The derived gain, A0 = Kp + Ki + Kd .

Definition at line 1679 of file arm_math.h.

q31_t A1

The derived gain A1 = -Kp - 2Kd | Kd.

Definition at line 1684 of file arm_math.h.

q15_t Kd

The derivative gain.

Definition at line 1689 of file arm_math.h.

q15_t Ki

The integral gain.

Definition at line 1688 of file arm_math.h.

q15_t Kp

The proportional gain.

Definition at line 1687 of file arm_math.h.

q15_t state[3]

The state array of length 3.

Definition at line 1686 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_pid_instance_q31 Struct Reference

  • Data Fields
Data Fields
arm_pid_instance_q31 Struct Reference

Instance structure for the Q31 PID Control. More...

#include <arm_math.h>

Data Fields

q31_t A0
q31_t A1
q31_t A2
q31_t state [3]
q31_t Kp
q31_t Ki
q31_t Kd

Detailed Description

Instance structure for the Q31 PID Control.

Definition at line 1695 of file arm_math.h.

Field Documentation

q31_t A0

The derived gain, A0 = Kp + Ki + Kd .

Definition at line 1697 of file arm_math.h.

q31_t A1

The derived gain, A1 = -Kp - 2Kd.

Definition at line 1698 of file arm_math.h.

q31_t A2

The derived gain, A2 = Kd .

Definition at line 1699 of file arm_math.h.

q31_t Kd

The derivative gain.

Definition at line 1703 of file arm_math.h.

q31_t Ki

The integral gain.

Definition at line 1702 of file arm_math.h.

q31_t Kp

The proportional gain.

Definition at line 1701 of file arm_math.h.

q31_t state[3]

The state array of length 3.

Definition at line 1700 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_rfft_instance_f32 Struct Reference

  • Data Fields
Data Fields
arm_rfft_instance_f32 Struct Reference

Instance structure for the floating-point RFFT/RIFFT function. More...

#include <arm_math.h>

Data Fields

uint32_t | fftLenReal
uint16_t | fftLenBy2
uint8_t | ifftFlagR
uint8_t | bitReverseFlagR
uint32_t | twidCoefRModifier
float32_t * pTwiddleAReal
float32_t * pTwiddleBReal
arm_cfft_radix4_instance_f32 * pCfft

Detailed Description

Instance structure for the floating-point RFFT/RIFFT function.

Definition at line 2201 of file arm_math.h.

Field Documentation

uint8_t bitReverseFlagR

flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output.

Definition at line 2206 of file arm_math.h.

uint16_t fftLenBy2

length of the complex FFT.

Definition at line 2204 of file arm_math.h.

uint32_t fftLenReal

length of the real FFT.

Definition at line 2203 of file arm_math.h.

uint8_t ifftFlagR

flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.

Definition at line 2205 of file arm_math.h.

arm_cfft_radix4_instance_f32* pCfft

points to the complex FFT instance.

Definition at line 2210 of file arm_math.h.

float32_t* pTwiddleAReal

points to the real twiddle factor table.

Definition at line 2208 of file arm_math.h.

float32_t* pTwiddleBReal

points to the imag twiddle factor table.

Definition at line 2209 of file arm_math.h.

uint32_t twidCoefRModifier

twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

Definition at line 2207 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_rfft_instance_q15 Struct Reference

  • Data Fields
Data Fields
arm_rfft_instance_q15 Struct Reference

Instance structure for the Q15 RFFT/RIFFT function. More...

#include <arm_math.h>

Data Fields

uint32_t | fftLenReal
uint32_t | fftLenBy2
uint8_t | ifftFlagR
uint8_t | bitReverseFlagR
uint32_t | twidCoefRModifier
q15_t * pTwiddleAReal
q15_t * pTwiddleBReal
arm_cfft_radix4_instance_q15 * pCfft

Detailed Description

Instance structure for the Q15 RFFT/RIFFT function.

Definition at line 2169 of file arm_math.h.

Field Documentation

uint8_t bitReverseFlagR

flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output.

Definition at line 2174 of file arm_math.h.

uint32_t fftLenBy2

length of the complex FFT.

Definition at line 2172 of file arm_math.h.

uint32_t fftLenReal

length of the real FFT.

Definition at line 2171 of file arm_math.h.

uint8_t ifftFlagR

flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.

Definition at line 2173 of file arm_math.h.

arm_cfft_radix4_instance_q15* pCfft

points to the complex FFT instance.

Definition at line 2178 of file arm_math.h.

q15_t* pTwiddleAReal

points to the real twiddle factor table.

Definition at line 2176 of file arm_math.h.

q15_t* pTwiddleBReal

points to the imag twiddle factor table.

Definition at line 2177 of file arm_math.h.

uint32_t twidCoefRModifier

twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

Definition at line 2175 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arm_rfft_instance_q31 Struct Reference

  • Data Fields
Data Fields
arm_rfft_instance_q31 Struct Reference

Instance structure for the Q31 RFFT/RIFFT function. More...

#include <arm_math.h>

Data Fields

uint32_t | fftLenReal
uint32_t | fftLenBy2
uint8_t | ifftFlagR
uint8_t | bitReverseFlagR
uint32_t | twidCoefRModifier
q31_t * pTwiddleAReal
q31_t * pTwiddleBReal
arm_cfft_radix4_instance_q31 * pCfft

Detailed Description

Instance structure for the Q31 RFFT/RIFFT function.

Definition at line 2185 of file arm_math.h.

Field Documentation

uint8_t bitReverseFlagR

flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output.

Definition at line 2190 of file arm_math.h.

uint32_t fftLenBy2

length of the complex FFT.

Definition at line 2188 of file arm_math.h.

uint32_t fftLenReal

length of the real FFT.

Definition at line 2187 of file arm_math.h.

uint8_t ifftFlagR

flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.

Definition at line 2189 of file arm_math.h.

arm_cfft_radix4_instance_q31* pCfft

points to the complex FFT instance.

Definition at line 2194 of file arm_math.h.

q31_t* pTwiddleAReal

points to the real twiddle factor table.

Definition at line 2192 of file arm_math.h.

q31_t* pTwiddleBReal

points to the imag twiddle factor table.

Definition at line 2193 of file arm_math.h.

uint32_t twidCoefRModifier

twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

Definition at line 2191 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arp_entry Struct Reference

  • Data Fields
Data Fields
arp_entry Struct Reference
uIP Address Resolution Protocol

Data Fields

u16_t | ipaddr [2]
struct uip_eth_addr | ethaddr
u8_t time

Detailed Description

Definition at line 125 of file uip_arp.c.

Field Documentation

struct uip_eth_addr ethaddr

Definition at line 127 of file uip_arp.c.

u16_t ipaddr[2]

Definition at line 126 of file uip_arp.c.

u8_t time

Definition at line 128 of file uip_arp.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.c
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: arp_hdr Struct Reference

  • Data Fields
Data Fields
arp_hdr Struct Reference
uIP Address Resolution Protocol

Data Fields

struct uip_eth_hdr | ethhdr
u16_t hwtype
u16_t protocol
u8_t hwlen
u8_t protolen
u16_t opcode
struct uip_eth_addr | shwaddr
u16_t | sipaddr [2]
struct uip_eth_addr | dhwaddr
u16_t | dipaddr [2]

Detailed Description

Definition at line 75 of file uip_arp.c.

Field Documentation

struct uip_eth_addr dhwaddr

Definition at line 84 of file uip_arp.c.

u16_t dipaddr[2]

Definition at line 85 of file uip_arp.c.

struct uip_eth_hdr ethhdr

Definition at line 76 of file uip_arp.c.

u8_t hwlen

Definition at line 79 of file uip_arp.c.

u16_t hwtype

Definition at line 77 of file uip_arp.c.

u16_t opcode

Definition at line 81 of file uip_arp.c.

u16_t protocol

Definition at line 78 of file uip_arp.c.

u8_t protolen

Definition at line 80 of file uip_arp.c.

struct uip_eth_addr shwaddr

Definition at line 82 of file uip_arp.c.

u16_t sipaddr[2]

Definition at line 83 of file uip_arp.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.c
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN_MSG_Type Struct Reference

  • Data Fields
Data Fields
CAN_MSG_Type Struct Reference
CAN Public Types

CAN message object structure. More...

#include <lpc17xx_can.h>

Data Fields

uint32_t | id
uint8_t | dataA [4]
uint8_t | dataB [4]
uint8_t | len
uint8_t | format
uint8_t | type

Detailed Description

CAN message object structure.

Definition at line 684 of file lpc17xx_can.h.

Field Documentation

uint8_t dataA[4]

Data field A

Definition at line 689 of file lpc17xx_can.h.

uint8_t dataB[4]

Data field B

Definition at line 690 of file lpc17xx_can.h.

uint8_t format

Identifier Format, should be:

  • STD_ID_FORMAT: Standard ID - 11 bit format
  • EXT_ID_FORMAT: Extended ID - 29 bit format

Definition at line 695 of file lpc17xx_can.h.

uint32_t id

29 bit identifier, it depend on "format" value

  • if format = STD_ID_FORMAT, id should be 11 bit identifier
  • if format = EXT_ID_FORMAT, id should be 29 bit identifier

Definition at line 685 of file lpc17xx_can.h.

uint8_t len

Length of data field in bytes, should be:

  • 0000b-0111b: 0-7 bytes
  • 1xxxb: 8 bytes

Definition at line 691 of file lpc17xx_can.h.

uint8_t type

Remote Frame transmission, should be:

  • DATA_FRAME: the number of data bytes called out by the DLC field are send from the CANxTDA and CANxTDB registers
  • REMOTE_FRAME: Remote Frame is sent

Definition at line 699 of file lpc17xx_can.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CAN_PinCFG_Type Struct Reference

  • Data Fields
Data Fields
CAN_PinCFG_Type Struct Reference
CAN Public Types

Pin Configuration structure. More...

#include <lpc17xx_can.h>

Data Fields

uint8_t | RD
uint8_t | TD

Detailed Description

Pin Configuration structure.

Definition at line 662 of file lpc17xx_can.h.

Field Documentation

uint8_t RD

Serial Inputs, from CAN transceivers, should be: For CAN1:

  • CAN_RD1_P0_0: RD pin is on P0.0
  • CAN_RD1_P0_21 : RD pin is on P0.21 For CAN2:
  • CAN_RD2_P0_4: RD pin is on P0.4
  • CAN_RD2_P2_7: RD pin is on P2.7

Definition at line 663 of file lpc17xx_can.h.

uint8_t TD

Serial Outputs, To CAN transceivers, should be: For CAN1:

  • CAN_TD1_P0_1: TD pin is on P0.1
  • CAN_TD1_P0_22: TD pin is on P0.22 For CAN2:
  • CAN_TD2_P0_5: TD pin is on P0.5
  • CAN_TD2_P2_8: TD pin is on P2.8

Definition at line 671 of file lpc17xx_can.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CONTROL_Type Union Reference

  • Data Fields
Data Fields
CONTROL_Type Union Reference
CMSIS Core

Union type to access the Control Registers (CONTROL). More...

#include <core_cm3.h>

Data Fields

struct {
uint32_t nPRIV:1
uint32_t SPSEL:1
uint32_t FPCA:1
uint32_t _reserved0:29
} b
uint32_t w

Detailed Description

Union type to access the Control Registers (CONTROL).

Definition at line 241 of file core_cm3.h.

Field Documentation

uint32_t _reserved0

bit: 3..31 Reserved

Definition at line 248 of file core_cm3.h.

struct { ... } b

Structure used for bit access

uint32_t FPCA

bit: 2 FP extension active flag

Definition at line 247 of file core_cm3.h.

uint32_t nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 245 of file core_cm3.h.

uint32_t SPSEL

bit: 1 Stack to be used

Definition at line 246 of file core_cm3.h.

uint32_t w

Type used for word access

Definition at line 250 of file core_cm3.h.

The documentation for this union was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cm3.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: CoreDebug_Type Struct Reference

  • Data Fields
Data Fields
CoreDebug_Type Struct Reference
CMSIS Core Debug

Structure type to access the Core Debug Register (CoreDebug). More...

#include <core_cm3.h>

Data Fields

__IO uint32_t | DHCSR
__O uint32_t | DCRSR
__IO uint32_t | DCRDR
__IO uint32_t | DEMCR

Detailed Description

Structure type to access the Core Debug Register (CoreDebug).

Definition at line 734 of file core_cm3.h.

Field Documentation

__IO uint32_t DCRDR

Offset: 0x008 (R/W) Debug Core Register Data Register

Definition at line 738 of file core_cm3.h.

__O uint32_t DCRSR

Offset: 0x004 ( /W) Debug Core Register Selector Register

Definition at line 737 of file core_cm3.h.

__IO uint32_t DEMCR

Offset: 0x00C (R/W) Debug Exception and Monitor Control Register

Definition at line 739 of file core_cm3.h.

__IO uint32_t DHCSR

Offset: 0x000 (R/W) Debug Halting Control and Status Register

Definition at line 736 of file core_cm3.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cm3.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: DAC_CONVERTER_CFG_Type Struct Reference

  • Data Fields
Data Fields
DAC_CONVERTER_CFG_Type Struct Reference
DAC Public Types

Configuration for DAC converter control register. More...

#include <lpc17xx_dac.h>

Data Fields

uint8_t | DBLBUF_ENA
uint8_t | CNT_ENA
uint8_t | DMA_ENA
uint8_t | RESERVED

Detailed Description

Configuration for DAC converter control register.

Definition at line 98 of file lpc17xx_dac.h.

Field Documentation

uint8_t CNT_ENA

-0: Time out counter is disable -1: Time out conter is enable

Definition at line 105 of file lpc17xx_dac.h.

uint8_t DBLBUF_ENA

-0: Disable DACR double buffering -1: when bit CNT_ENA, enable DACR double buffering feature

Definition at line 101 of file lpc17xx_dac.h.

uint8_t DMA_ENA

-0: DMA access is disable -1: DMA burst request

Definition at line 109 of file lpc17xx_dac.h.

uint8_t RESERVED

Definition at line 113 of file lpc17xx_dac.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_dac.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: dhcp_msg Struct Reference

  • Data Fields
Data Fields
dhcp_msg Struct Reference

Data Fields

u8_t op
u8_t htype
u8_t hlen
u8_t hops
u8_t | xid [4]
u16_t secs
u16_t flags
u8_t | ciaddr [4]
u8_t | yiaddr [4]
u8_t | siaddr [4]
u8_t | giaddr [4]
u8_t | chaddr [16]
u8_t | sname [64]
u8_t | file [128]
u8_t | options [312]

Detailed Description

Definition at line 49 of file dhcpc.c.

Field Documentation

u8_t chaddr[16]

Definition at line 57 of file dhcpc.c.

u8_t ciaddr[4]

Definition at line 53 of file dhcpc.c.

u8_t file[128]

Definition at line 60 of file dhcpc.c.

u16_t flags

Definition at line 52 of file dhcpc.c.

u8_t giaddr[4]

Definition at line 56 of file dhcpc.c.

u8_t hlen

Definition at line 50 of file dhcpc.c.

u8_t hops

Definition at line 50 of file dhcpc.c.

u8_t htype

Definition at line 50 of file dhcpc.c.

u8_t op

Definition at line 50 of file dhcpc.c.

u8_t options[312]

Definition at line 62 of file dhcpc.c.

u16_t secs

Definition at line 52 of file dhcpc.c.

u8_t siaddr[4]

Definition at line 55 of file dhcpc.c.

u8_t sname[64]

Definition at line 59 of file dhcpc.c.

u8_t xid[4]

Definition at line 51 of file dhcpc.c.

u8_t yiaddr[4]

Definition at line 54 of file dhcpc.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.c
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: dhcpc_state Struct Reference

  • Data Fields
Data Fields
dhcpc_state Struct Reference

#include <dhcpc.h>

Data Fields

struct pt | pt
char | state
struct uip_udp_conn * | conn
struct timer | timer
u16_t ticks
const void * | mac_addr
int | mac_len
u8_t | serverid [4]
u16_t | lease_time [2]
u16_t | ipaddr [2]
u16_t | netmask [2]
u16_t | dnsaddr [2]
u16_t | default_router [2]

Detailed Description

Definition at line 39 of file dhcpc.h.

Field Documentation

struct uip_udp_conn* conn

Definition at line 42 of file dhcpc.h.

u16_t default_router[2]

Definition at line 54 of file dhcpc.h.

u16_t dnsaddr[2]

Definition at line 53 of file dhcpc.h.

u16_t ipaddr[2]

Definition at line 51 of file dhcpc.h.

u16_t lease_time[2]

Definition at line 50 of file dhcpc.h.

const void* mac_addr

Definition at line 45 of file dhcpc.h.

int mac_len

Definition at line 46 of file dhcpc.h.

u16_t netmask[2]

Definition at line 52 of file dhcpc.h.

struct pt pt

Definition at line 40 of file dhcpc.h.

u8_t serverid[4]

Definition at line 48 of file dhcpc.h.

char state

Definition at line 41 of file dhcpc.h.

u16_t ticks

Definition at line 44 of file dhcpc.h.

struct timer timer

Definition at line 43 of file dhcpc.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.h
Generated on Mon Nov 28 2011 11:15:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: dns_answer Struct Reference

  • Data Fields
Data Fields
dns_answer Struct Reference
DNS resolver

Data Fields

u16_t type
u16_t class
u16_t ttl [2]
u16_t len
uip_ipaddr_t ipaddr

Detailed Description

Definition at line 101 of file resolv.c.

Field Documentation

u16_t class

Definition at line 105 of file resolv.c.

uip_ipaddr_t ipaddr

Definition at line 108 of file resolv.c.

u16_t len

Definition at line 107 of file resolv.c.

u16_t ttl[2]

Definition at line 106 of file resolv.c.

u16_t type

Definition at line 104 of file resolv.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.c
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: dns_hdr Struct Reference

  • Data Fields
Data Fields
dns_hdr Struct Reference
DNS resolver

Data Fields

u16_t id
u8_t flags1
u8_t flags2
u16_t numquestions
u16_t numanswers
u16_t numauthrr
u16_t numextrarr

Detailed Description

Definition at line 80 of file resolv.c.

Field Documentation

u8_t flags1

Definition at line 82 of file resolv.c.

u8_t flags2

Definition at line 82 of file resolv.c.

u16_t id

Definition at line 81 of file resolv.c.

u16_t numanswers

Definition at line 95 of file resolv.c.

u16_t numauthrr

Definition at line 96 of file resolv.c.

u16_t numextrarr

Definition at line 97 of file resolv.c.

u16_t numquestions

Definition at line 94 of file resolv.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.c
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EFF_Entry Struct Reference

  • Data Fields
Data Fields
EFF_Entry Struct Reference
CAN Public Types

Extended ID Frame Format Entry structure. More...

#include <lpc17xx_can.h>

Data Fields

uint8_t | controller
uint32_t | ID_29

Detailed Description

Extended ID Frame Format Entry structure.

Definition at line 765 of file lpc17xx_can.h.

Field Documentation

uint8_t controller

CAN Controller, should be:

  • CAN1_CTRL: CAN1 Controller
  • CAN2_CTRL: CAN2 Controller

Definition at line 766 of file lpc17xx_can.h.

uint32_t ID_29

Extend ID, shoud be 29-bit value

Definition at line 770 of file lpc17xx_can.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EFF_GPR_Entry Struct Reference

  • Data Fields
Data Fields
EFF_GPR_Entry Struct Reference
CAN Public Types

Group of Extended ID Frame Format Entry structure. More...

#include <lpc17xx_can.h>

Data Fields

uint8_t | controller1
uint8_t | controller2
uint32_t | lowerEID
uint32_t | upperEID

Detailed Description

Group of Extended ID Frame Format Entry structure.

Definition at line 777 of file lpc17xx_can.h.

Field Documentation

uint8_t controller1

First CAN Controller, should be:

  • CAN1_CTRL: CAN1 Controller
  • CAN2_CTRL: CAN2 Controller

Definition at line 778 of file lpc17xx_can.h.

uint8_t controller2

Second Disable bit, should be:

  • MSG_ENABLE: disable bit = 0(default)
  • MSG_DISABLE: disable bit = 1

Definition at line 782 of file lpc17xx_can.h.

uint32_t lowerEID

Extended ID lower bound, should be 29-bit value

Definition at line 786 of file lpc17xx_can.h.

uint32_t upperEID

Extended ID upper bound, should be 29-bit value

Definition at line 787 of file lpc17xx_can.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EMAC_CFG_Type Struct Reference

  • Data Fields
Data Fields
EMAC_CFG_Type Struct Reference
EMAC Public Types

EMAC configuration structure definition. More...

#include <lpc17xx_emac.h>

Data Fields

uint32_t | Mode
uint8_t * | pbEMAC_Addr

Detailed Description

EMAC configuration structure definition.

Definition at line 637 of file lpc17xx_emac.h.

Field Documentation

uint32_t Mode

Supported EMAC PHY device speed, should be one of the following:

  • EMAC_MODE_AUTO
  • EMAC_MODE_10M_FULL
  • EMAC_MODE_10M_HALF
  • EMAC_MODE_100M_FULL
  • EMAC_MODE_100M_HALF

Definition at line 638 of file lpc17xx_emac.h.

uint8_t* pbEMAC_Addr

Pointer to EMAC Station address that contains 6-bytes of MAC address, it must be sorted in order (bEMAC_Addr[0]..[5])

Definition at line 645 of file lpc17xx_emac.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EMAC_PACKETBUF_Type Struct Reference

  • Data Fields
Data Fields
EMAC_PACKETBUF_Type Struct Reference
EMAC Public Types

TX Data Buffer structure definition. More...

#include <lpc17xx_emac.h>

Data Fields

uint32_t | ulDataLen
uint32_t * | pbDataBuf

Detailed Description

TX Data Buffer structure definition.

Definition at line 629 of file lpc17xx_emac.h.

Field Documentation

uint32_t* pbDataBuf

A word-align data pointer to data buffer

Definition at line 631 of file lpc17xx_emac.h.

uint32_t ulDataLen

Data length

Definition at line 630 of file lpc17xx_emac.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: ethip_hdr Struct Reference

  • Data Fields
Data Fields
ethip_hdr Struct Reference
uIP Address Resolution Protocol

Data Fields

struct uip_eth_hdr | ethhdr
u8_t vhl
u8_t tos
u8_t | len [2]
u8_t | ipid [2]
u8_t | ipoffset [2]
u8_t ttl
u8_t proto
u16_t ipchksum
u16_t | srcipaddr [2]
u16_t | destipaddr [2]

Detailed Description

Definition at line 101 of file uip_arp.c.

Field Documentation

u16_t destipaddr[2]

Definition at line 112 of file uip_arp.c.

struct uip_eth_hdr ethhdr

Definition at line 102 of file uip_arp.c.

u16_t ipchksum

Definition at line 111 of file uip_arp.c.

u8_t ipid[2]

Definition at line 104 of file uip_arp.c.

u8_t ipoffset[2]

Definition at line 104 of file uip_arp.c.

u8_t len[2]

Definition at line 104 of file uip_arp.c.

u8_t proto

Definition at line 104 of file uip_arp.c.

u16_t srcipaddr[2]

Definition at line 112 of file uip_arp.c.

u8_t tos

Definition at line 104 of file uip_arp.c.

u8_t ttl

Definition at line 104 of file uip_arp.c.

u8_t vhl

Definition at line 104 of file uip_arp.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.c
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: EXTI_InitTypeDef Struct Reference

  • Data Fields
Data Fields
EXTI_InitTypeDef Struct Reference
EXTI Public Types

EXTI Initialize structure. More...

#include <lpc17xx_exti.h>

Data Fields

EXTI_LINE_ENUM EXTI_Line
EXTI_MODE_ENUM EXTI_Mode
EXTI_POLARITY_ENUM EXTI_polarity

Detailed Description

EXTI Initialize structure.

Definition at line 102 of file lpc17xx_exti.h.

Field Documentation

EXTI_LINE_ENUM EXTI_Line

Select external interrupt pin (EINT0, EINT1, EINT 2, EINT3)

Definition at line 104 of file lpc17xx_exti.h.

EXTI_MODE_ENUM EXTI_Mode

Choose between Level-sensitivity or Edge sensitivity

Definition at line 106 of file lpc17xx_exti.h.

EXTI_POLARITY_ENUM EXTI_polarity

If EXTI mode is level-sensitive: this element use to select low or high active level if EXTI mode is polarity-sensitive: this element use to select falling or rising edge

Definition at line 108 of file lpc17xx_exti.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_exti.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: FullCAN_Entry Struct Reference

  • Data Fields
Data Fields
FullCAN_Entry Struct Reference
CAN Public Types

FullCAN Entry structure. More...

#include <lpc17xx_can.h>

Data Fields

uint8_t | controller
uint8_t | disable
uint16_t | id_11

Detailed Description

FullCAN Entry structure.

Definition at line 709 of file lpc17xx_can.h.

Field Documentation

uint8_t controller

CAN Controller, should be:

  • CAN1_CTRL: CAN1 Controller
  • CAN2_CTRL: CAN2 Controller

Definition at line 710 of file lpc17xx_can.h.

uint8_t disable

Disable bit, should be:

  • MSG_ENABLE: disable bit = 0
  • MSG_DISABLE: disable bit = 1

Definition at line 714 of file lpc17xx_can.h.

uint16_t id_11

Standard ID, should be 11-bit value

Definition at line 718 of file lpc17xx_can.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: fwcache_entry Struct Reference

  • Data Fields
Data Fields
fwcache_entry Struct Reference
uIP packet forwarding

Data Fields

u16_t timer
u16_t | srcipaddr [2]
u16_t | destipaddr [2]
u16_t ipid
u8_t proto
u8_t unused

Detailed Description

Definition at line 137 of file uip-fw.c.

Field Documentation

u16_t timer

Definition at line 138 of file uip-fw.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.c
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPDMA_Channel_CFG_Type Struct Reference

  • Data Fields
Data Fields
GPDMA_Channel_CFG_Type Struct Reference
GPDMA Public Types

GPDMA Channel configuration structure type definition. More...

#include <lpc17xx_gpdma.h>

Data Fields

uint32_t | ChannelNum
uint32_t | TransferSize
uint32_t | TransferWidth
uint32_t | SrcMemAddr
uint32_t | DstMemAddr
uint32_t | TransferType
uint32_t | SrcConn
uint32_t | DstConn
uint32_t | DMALLI

Detailed Description

GPDMA Channel configuration structure type definition.

Definition at line 317 of file lpc17xx_gpdma.h.

Field Documentation

uint32_t ChannelNum

DMA channel number, should be in range from 0 to 7. Note: DMA channel 0 has the highest priority and DMA channel 7 the lowest priority.

Definition at line 318 of file lpc17xx_gpdma.h.

uint32_t DMALLI

Linker List Item structure data address if there's no Linker List, set as '0'

Definition at line 375 of file lpc17xx_gpdma.h.

uint32_t DstConn

Peripheral Destination Connection type, used in case TransferType is chosen as GPDMA_TRANSFERTYPE_M2P or GPDMA_TRANSFERTYPE_P2P, should be one of following:

  • GPDMA_CONN_SSP0_Tx: SSP0, Tx
  • GPDMA_CONN_SSP0_Rx: SSP0, Rx
  • GPDMA_CONN_SSP1_Tx: SSP1, Tx
  • GPDMA_CONN_SSP1_Rx: SSP1, Rx
  • GPDMA_CONN_ADC: ADC
  • GPDMA_CONN_I2S_Channel_0: I2S Channel 0
  • GPDMA_CONN_I2S_Channel_1: I2S Channel 1
  • GPDMA_CONN_DAC: DAC
  • GPDMA_CONN_UART0_Tx_MAT0_0: UART0 Tx / MAT0.0
  • GPDMA_CONN_UART0_Rx_MAT0_1: UART0 Rx / MAT0.1
  • GPDMA_CONN_UART1_Tx_MAT1_0: UART1 Tx / MAT1.0
  • GPDMA_CONN_UART1_Rx_MAT1_1: UART1 Rx / MAT1.1
  • GPDMA_CONN_UART2_Tx_MAT2_0: UART2 Tx / MAT2.0
  • GPDMA_CONN_UART2_Rx_MAT2_1: UART2 Rx / MAT2.1
  • GPDMA_CONN_UART3_Tx_MAT3_0: UART3 Tx / MAT3.0
  • GPDMA_CONN_UART3_Rx_MAT3_1: UART3 Rx / MAT3.1

Definition at line 355 of file lpc17xx_gpdma.h.

uint32_t DstMemAddr

Physical Destination Address, used in case TransferType is chosen as GPDMA_TRANSFERTYPE_M2M or GPDMA_TRANSFERTYPE_P2M

Definition at line 327 of file lpc17xx_gpdma.h.

uint32_t SrcConn

Peripheral Source Connection type, used in case TransferType is chosen as GPDMA_TRANSFERTYPE_P2M or GPDMA_TRANSFERTYPE_P2P, should be one of following:

  • GPDMA_CONN_SSP0_Tx: SSP0, Tx
  • GPDMA_CONN_SSP0_Rx: SSP0, Rx
  • GPDMA_CONN_SSP1_Tx: SSP1, Tx
  • GPDMA_CONN_SSP1_Rx: SSP1, Rx
  • GPDMA_CONN_ADC: ADC
  • GPDMA_CONN_I2S_Channel_0: I2S Channel 0
  • GPDMA_CONN_I2S_Channel_1: I2S Channel 1
  • GPDMA_CONN_DAC: DAC
  • GPDMA_CONN_UART0_Tx_MAT0_0: UART0 Tx / MAT0.0
  • GPDMA_CONN_UART0_Rx_MAT0_1: UART0 Rx / MAT0.1
  • GPDMA_CONN_UART1_Tx_MAT1_0: UART1 Tx / MAT1.0
  • GPDMA_CONN_UART1_Rx_MAT1_1: UART1 Rx / MAT1.1
  • GPDMA_CONN_UART2_Tx_MAT2_0: UART2 Tx / MAT2.0
  • GPDMA_CONN_UART2_Rx_MAT2_1: UART2 Rx / MAT2.1
  • GPDMA_CONN_UART3_Tx_MAT3_0: UART3 Tx / MAT3.0
  • GPDMA_CONN_UART3_Rx_MAT3_1: UART3 Rx / MAT3.1

Definition at line 335 of file lpc17xx_gpdma.h.

uint32_t SrcMemAddr

Physical Source Address, used in case TransferType is chosen as GPDMA_TRANSFERTYPE_M2M or GPDMA_TRANSFERTYPE_M2P

Definition at line 325 of file lpc17xx_gpdma.h.

uint32_t TransferSize

Length/Size of transfer

Definition at line 323 of file lpc17xx_gpdma.h.

uint32_t TransferType

Transfer Type, should be one of the following:

  • GPDMA_TRANSFERTYPE_M2M: Memory to memory - DMA control
  • GPDMA_TRANSFERTYPE_M2P: Memory to peripheral - DMA control
  • GPDMA_TRANSFERTYPE_P2M: Peripheral to memory - DMA control
  • GPDMA_TRANSFERTYPE_P2P: Source peripheral to destination peripheral - DMA control

Definition at line 329 of file lpc17xx_gpdma.h.

uint32_t TransferWidth

Transfer width - used for TransferType is GPDMA_TRANSFERTYPE_M2M only

Definition at line 324 of file lpc17xx_gpdma.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpdma.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPDMA_LLI_Type Struct Reference

  • Data Fields
Data Fields
GPDMA_LLI_Type Struct Reference
GPDMA Public Types

GPDMA Linker List Item structure type definition. More...

#include <lpc17xx_gpdma.h>

Data Fields

uint32_t | SrcAddr
uint32_t | DstAddr
uint32_t | NextLLI
uint32_t | Control

Detailed Description

GPDMA Linker List Item structure type definition.

Definition at line 383 of file lpc17xx_gpdma.h.

Field Documentation

uint32_t Control

GPDMA Control of this LLI

Definition at line 387 of file lpc17xx_gpdma.h.

uint32_t DstAddr

Destination address

Definition at line 385 of file lpc17xx_gpdma.h.

uint32_t NextLLI

Next LLI address, otherwise set to '0'

Definition at line 386 of file lpc17xx_gpdma.h.

uint32_t SrcAddr

Source Address

Definition at line 384 of file lpc17xx_gpdma.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpdma.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPIO_Byte_TypeDef Struct Reference

  • Data Fields
Data Fields
GPIO_Byte_TypeDef Struct Reference
GPIO Public Types

Fast GPIO port byte type definition. More...

#include <lpc17xx_gpio.h>

Data Fields

__IO uint8_t | FIODIR [4]
uint32_t | RESERVED0 [3]
__IO uint8_t | FIOMASK [4]
__IO uint8_t | FIOPIN [4]
__IO uint8_t | FIOSET [4]
__O uint8_t | FIOCLR [4]

Detailed Description

Fast GPIO port byte type definition.

Definition at line 86 of file lpc17xx_gpio.h.

Field Documentation

__O uint8_t FIOCLR[4]

FIO clear register in byte-align

Definition at line 92 of file lpc17xx_gpio.h.

__IO uint8_t FIODIR[4]

FIO direction register in byte-align

Definition at line 87 of file lpc17xx_gpio.h.

__IO uint8_t FIOMASK[4]

FIO mask register in byte-align

Definition at line 89 of file lpc17xx_gpio.h.

__IO uint8_t FIOPIN[4]

FIO pin register in byte align

Definition at line 90 of file lpc17xx_gpio.h.

__IO uint8_t FIOSET[4]

FIO set register in byte-align

Definition at line 91 of file lpc17xx_gpio.h.

uint32_t RESERVED0[3]

Reserved

Definition at line 88 of file lpc17xx_gpio.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpio.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: GPIO_HalfWord_TypeDef Struct Reference

  • Data Fields
Data Fields
GPIO_HalfWord_TypeDef Struct Reference
GPIO Public Types

Fast GPIO port half-word type definition. More...

#include <lpc17xx_gpio.h>

Data Fields

__IO uint16_t | FIODIRL
__IO uint16_t | FIODIRU
uint32_t | RESERVED0 [3]
__IO uint16_t | FIOMASKL
__IO uint16_t | FIOMASKU
__IO uint16_t | FIOPINL
__IO uint16_t | FIOPINU
__IO uint16_t | FIOSETL
__IO uint16_t | FIOSETU
__O uint16_t | FIOCLRL
__O uint16_t | FIOCLRU

Detailed Description

Fast GPIO port half-word type definition.

Definition at line 99 of file lpc17xx_gpio.h.

Field Documentation

__O uint16_t FIOCLRL

FIO clear register lower halfword part

Definition at line 109 of file lpc17xx_gpio.h.

__O uint16_t FIOCLRU

FIO clear register upper halfword part

Definition at line 110 of file lpc17xx_gpio.h.

__IO uint16_t FIODIRL

FIO direction register lower halfword part

Definition at line 100 of file lpc17xx_gpio.h.

__IO uint16_t FIODIRU

FIO direction register upper halfword part

Definition at line 101 of file lpc17xx_gpio.h.

__IO uint16_t FIOMASKL

FIO mask register lower halfword part

Definition at line 103 of file lpc17xx_gpio.h.

__IO uint16_t FIOMASKU

FIO mask register upper halfword part

Definition at line 104 of file lpc17xx_gpio.h.

__IO uint16_t FIOPINL

FIO pin register lower halfword part

Definition at line 105 of file lpc17xx_gpio.h.

__IO uint16_t FIOPINU

FIO pin register upper halfword part

Definition at line 106 of file lpc17xx_gpio.h.

__IO uint16_t FIOSETL

FIO set register lower halfword part

Definition at line 107 of file lpc17xx_gpio.h.

__IO uint16_t FIOSETU

FIO set register upper halfword part

Definition at line 108 of file lpc17xx_gpio.h.

uint32_t RESERVED0[3]

Reserved

Definition at line 102 of file lpc17xx_gpio.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpio.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: hello_world_state Struct Reference

  • Data Fields
Data Fields
hello_world_state Struct Reference
Hello, world

#include <hello-world.h>

Data Fields

struct psock | p
char | inputbuffer [10]
char | name [40]

Detailed Description

Definition at line 40 of file hello-world.h.

Field Documentation

char inputbuffer[10]

Definition at line 42 of file hello-world.h.

char name[40]

Definition at line 43 of file hello-world.h.

struct psock p

Definition at line 41 of file hello-world.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: httpd_cgi_call Struct Reference

  • Data Fields
Data Fields
httpd_cgi_call Struct Reference
Web server

#include <httpd-cgi.h>

Data Fields

const char * | name
const httpd_cgifunction | function

Detailed Description

Definition at line 60 of file httpd-cgi.h.

Field Documentation

const httpd_cgifunction function

Definition at line 62 of file httpd-cgi.h.

const char* name

Definition at line 61 of file httpd-cgi.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: httpd_fs_file Struct Reference

  • Data Fields
Data Fields
httpd_fs_file Struct Reference

#include <httpd-fs.h>

Data Fields

char * | data
int | len

Detailed Description

Definition at line 40 of file httpd-fs.h.

Field Documentation

char* data

Definition at line 41 of file httpd-fs.h.

int len

Definition at line 42 of file httpd-fs.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: httpd_fsdata_file Struct Reference

  • Data Fields
Data Fields
httpd_fsdata_file Struct Reference

#include <httpd-fsdata.h>

Data Fields

struct httpd_fsdata_file * | next
const char * | name
const char * | data
const int | len

Detailed Description

Definition at line 40 of file httpd-fsdata.h.

Field Documentation

const char* data

Definition at line 43 of file httpd-fsdata.h.

const int len

Definition at line 44 of file httpd-fsdata.h.

const char* name

Definition at line 42 of file httpd-fsdata.h.

struct httpd_fsdata_file* next

Definition at line 41 of file httpd-fsdata.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: httpd_fsdata_file_noconst Struct Reference

  • Data Fields
Data Fields
httpd_fsdata_file_noconst Struct Reference

#include <httpd-fsdata.h>

Data Fields

struct httpd_fsdata_file * | next
char * | name
char * | data
int | len

Detailed Description

Definition at line 52 of file httpd-fsdata.h.

Field Documentation

char* data

Definition at line 55 of file httpd-fsdata.h.

int len

Definition at line 56 of file httpd-fsdata.h.

char* name

Definition at line 54 of file httpd-fsdata.h.

struct httpd_fsdata_file* next

Definition at line 53 of file httpd-fsdata.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: httpd_state Struct Reference

  • Data Fields
Data Fields
httpd_state Struct Reference

#include <httpd.h>

Data Fields

unsigned char | timer
struct psock sin | sout
struct pt outputpt | scriptpt
char | inputbuf [50]
char | filename [20]
char | state
struct httpd_fs_file | file
int | len
char * | scriptptr
int | scriptlen
unsigned short | count

Detailed Description

Definition at line 41 of file httpd.h.

Field Documentation

unsigned short count

Definition at line 53 of file httpd.h.

struct httpd_fs_file file

Definition at line 48 of file httpd.h.

char filename[20]

Definition at line 46 of file httpd.h.

char inputbuf[50]

Definition at line 45 of file httpd.h.

int len

Definition at line 49 of file httpd.h.

int scriptlen

Definition at line 51 of file httpd.h.

struct pt outputpt scriptpt

Definition at line 44 of file httpd.h.

char* scriptptr

Definition at line 50 of file httpd.h.

struct psock sin sout

Definition at line 43 of file httpd.h.

char state

Definition at line 47 of file httpd.h.

unsigned char timer

Definition at line 42 of file httpd.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2C_CFG_T Struct Reference

  • Data Fields
Data Fields
I2C_CFG_T Struct Reference
I2C Private Types

I2C device configuration structure type. More...

Data Fields

uint32_t | txrx_setup
int32_t | dir

Detailed Description

I2C device configuration structure type.

Definition at line 60 of file lpc17xx_i2c.c.

Field Documentation

int32_t dir

Definition at line 63 of file lpc17xx_i2c.c.

uint32_t txrx_setup

Definition at line 62 of file lpc17xx_i2c.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2c.c
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2C_M_SETUP_Type Struct Reference

  • Data Fields
Data Fields
I2C_M_SETUP_Type Struct Reference
I2C Public Types

Master transfer setup data structure definitions. More...

#include <lpc17xx_i2c.h>

Data Fields

uint32_t | sl_addr7bit
uint8_t * | tx_data
uint32_t | tx_length
uint32_t | tx_count
uint8_t * | rx_data
uint32_t | rx_length
uint32_t | rx_count
uint32_t | retransmissions_max
uint32_t | retransmissions_count
uint32_t | status
void(* | callback )(void)

Detailed Description

Master transfer setup data structure definitions.

Definition at line 283 of file lpc17xx_i2c.h.

Field Documentation

void(* callback)(void)

Pointer to Call back function when transmission complete used in interrupt transfer mode

Definition at line 299 of file lpc17xx_i2c.h.

uint32_t retransmissions_count

Current Re-Transmission counter

Definition at line 297 of file lpc17xx_i2c.h.

uint32_t retransmissions_max

Max Re-Transmission value

Definition at line 296 of file lpc17xx_i2c.h.

uint32_t rx_count

Current Receive data counter

Definition at line 295 of file lpc17xx_i2c.h.

uint8_t* rx_data

Pointer to Receive data - NULL if data receive is not used

Definition at line 291 of file lpc17xx_i2c.h.

uint32_t rx_length

Receive data length - 0 if data receive is not used

Definition at line 293 of file lpc17xx_i2c.h.

uint32_t sl_addr7bit

Slave address in 7bit mode

Definition at line 285 of file lpc17xx_i2c.h.

uint32_t status

Current status of I2C activity

Definition at line 298 of file lpc17xx_i2c.h.

uint32_t tx_count

Current Transmit data counter

Definition at line 290 of file lpc17xx_i2c.h.

uint8_t* tx_data

Pointer to Transmit data - NULL if data transmit is not used

Definition at line 286 of file lpc17xx_i2c.h.

uint32_t tx_length

Transmit data length - 0 if data transmit is not used

Definition at line 288 of file lpc17xx_i2c.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2c.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2C_OWNSLAVEADDR_CFG_Type Struct Reference

  • Data Fields
Data Fields
I2C_OWNSLAVEADDR_CFG_Type Struct Reference
I2C Public Types

I2C Own slave address setting structure. More...

#include <lpc17xx_i2c.h>

Data Fields

uint8_t | SlaveAddrChannel
uint8_t | SlaveAddr_7bit
uint8_t | GeneralCallState
uint8_t | SlaveAddrMaskValue

Detailed Description

I2C Own slave address setting structure.

Definition at line 259 of file lpc17xx_i2c.h.

Field Documentation

uint8_t GeneralCallState

Enable/Disable General Call Functionality when I2C control being in Slave mode, should be:

  • ENABLE: Enable General Call function.
  • DISABLE: Disable General Call function.

Definition at line 264 of file lpc17xx_i2c.h.

uint8_t SlaveAddr_7bit

Value of 7-bit slave address

Definition at line 263 of file lpc17xx_i2c.h.

uint8_t SlaveAddrChannel

Slave Address channel in I2C control, should be in range from 0..3

Definition at line 260 of file lpc17xx_i2c.h.

uint8_t SlaveAddrMaskValue

Any bit in this 8-bit value (bit 7:1) which is set to '1' will cause an automatic compare on the corresponding bit of the received address when it is compared to the SlaveAddr_7bit value associated with this mask register. In other words, bits in SlaveAddr_7bit value which are masked are not taken into account in determining an address match

Definition at line 269 of file lpc17xx_i2c.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2c.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2C_S_SETUP_Type Struct Reference

  • Data Fields
Data Fields
I2C_S_SETUP_Type Struct Reference
I2C Public Types

Slave transfer setup data structure definitions. More...

#include <lpc17xx_i2c.h>

Data Fields

uint8_t * | tx_data
uint32_t | tx_length
uint32_t | tx_count
uint8_t * | rx_data
uint32_t | rx_length
uint32_t | rx_count
uint32_t | status
void(* | callback )(void)

Detailed Description

Slave transfer setup data structure definitions.

Definition at line 307 of file lpc17xx_i2c.h.

Field Documentation

void(* callback)(void)

Definition at line 316 of file lpc17xx_i2c.h.

uint32_t rx_count

Definition at line 314 of file lpc17xx_i2c.h.

uint8_t* rx_data

Definition at line 312 of file lpc17xx_i2c.h.

uint32_t rx_length

Definition at line 313 of file lpc17xx_i2c.h.

uint32_t status

Definition at line 315 of file lpc17xx_i2c.h.

uint32_t tx_count

Definition at line 311 of file lpc17xx_i2c.h.

uint8_t* tx_data

Definition at line 309 of file lpc17xx_i2c.h.

uint32_t tx_length

Definition at line 310 of file lpc17xx_i2c.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2c.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S_CFG_Type Struct Reference

  • Data Fields
Data Fields
I2S_CFG_Type Struct Reference
I2S Public Types

I2S configuration structure definition. More...

#include <lpc17xx_i2s.h>

Data Fields

uint8_t | wordwidth
uint8_t | mono
uint8_t | stop
uint8_t | reset
uint8_t | ws_sel
uint8_t | mute
uint8_t | Reserved0 [2]

Detailed Description

I2S configuration structure definition.

Definition at line 273 of file lpc17xx_i2s.h.

Field Documentation

uint8_t mono

the number of bytes in data as follow: -I2S_WORDWIDTH_8: 8 bit data -I2S_WORDWIDTH_16: 16 bit data -I2S_WORDWIDTH_32: 32 bit data

Definition at line 278 of file lpc17xx_i2s.h.

uint8_t mute

Set Master/Slave mode, should be:

  • I2S_MASTER_MODE: I2S master mode
  • I2S_SLAVE_MODE: I2S slave mode

Definition at line 290 of file lpc17xx_i2s.h.

uint8_t Reserved0[2]

MUTE mode: when true, the transmit channel sends only zeroes, shoule be:

  • I2S_MUTE_ENABLE: enable mute mode
  • I2S_MUTE_DISABLE: disable mute mode

Definition at line 293 of file lpc17xx_i2s.h.

uint8_t reset

Disables accesses on FIFOs, should be:

  • I2S_STOP_ENABLE: enable stop mode
  • I2S_STOP_DISABLE: disable stop mode

Definition at line 284 of file lpc17xx_i2s.h.

uint8_t stop

Set mono/stereo mode, should be:

  • I2S_STEREO: stereo mode
  • I2S_MONO: mono mode

Definition at line 281 of file lpc17xx_i2s.h.

uint8_t wordwidth

Definition at line 274 of file lpc17xx_i2s.h.

uint8_t ws_sel

Asynchronously reset tje transmit channel and FIFO, should be:

  • I2S_RESET_ENABLE: enable reset mode
  • I2S_RESET_DISABLE: disable reset mode

Definition at line 287 of file lpc17xx_i2s.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2s.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S_DMAConf_Type Struct Reference

  • Data Fields
Data Fields
I2S_DMAConf_Type Struct Reference
I2S Public Types

I2S DMA configuration structure definition. More...

#include <lpc17xx_i2s.h>

Data Fields

uint8_t | DMAIndex
uint8_t | depth
uint8_t | Reserved0 [2]

Detailed Description

I2S DMA configuration structure definition.

Definition at line 299 of file lpc17xx_i2s.h.

Field Documentation

uint8_t depth

Select DMA1 or DMA2, should be:

  • I2S_DMA_1: DMA1
  • I2S_DMA_2: DMA2

Definition at line 303 of file lpc17xx_i2s.h.

uint8_t DMAIndex

Definition at line 300 of file lpc17xx_i2s.h.

uint8_t Reserved0[2]

FIFO level that triggers a DMA request

Definition at line 304 of file lpc17xx_i2s.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2s.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: I2S_MODEConf_Type Struct Reference

  • Data Fields
Data Fields
I2S_MODEConf_Type Struct Reference
I2S Public Types

I2S mode configuration structure definition. More...

#include <lpc17xx_i2s.h>

Data Fields

uint8_t | clksel
uint8_t | fpin
uint8_t | mcena
uint8_t | Reserved

Detailed Description

I2S mode configuration structure definition.

Definition at line 310 of file lpc17xx_i2s.h.

Field Documentation

uint8_t clksel

Definition at line 311 of file lpc17xx_i2s.h.

uint8_t fpin

Clock source selection, should be:

  • I2S_CLKSEL_FRDCLK: Select the fractional rate divider clock output
  • I2S_CLKSEL_MCLK: Select the MCLK signal as the clock source

Definition at line 314 of file lpc17xx_i2s.h.

uint8_t mcena

Select four pin mode, should be:

  • I2S_4PIN_ENABLE: 4-pin enable
  • I2S_4PIN_DISABLE: 4-pin disable

Definition at line 317 of file lpc17xx_i2s.h.

uint8_t Reserved

Select MCLK mode, should be:

  • I2S_MCLK_ENABLE: MCLK enable for output
  • I2S_MCLK_DISABLE: MCLK disable for output

Definition at line 320 of file lpc17xx_i2s.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2s.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: icmpip_hdr Struct Reference

  • Data Fields
Data Fields
icmpip_hdr Struct Reference
uIP packet forwarding

Data Fields

u8_t vhl
u8_t tos
u8_t | len [2]
u8_t | ipid [2]
u8_t | ipoffset [2]
u8_t ttl
u8_t proto
u16_t ipchksum
u16_t | srcipaddr [2]
u16_t | destipaddr [2]
u8_t type
u8_t icode
u16_t icmpchksum
u16_t id
u16_t seqno
u8_t | payload [1]

Detailed Description

Definition at line 98 of file uip-fw.c.

Field Documentation

u8_t vhl

Definition at line 100 of file uip-fw.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.c
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: IPSR_Type Union Reference

  • Data Fields
Data Fields
IPSR_Type Union Reference
CMSIS Core

Union type to access the Interrupt Program Status Register (IPSR). More...

#include <core_cm3.h>

Data Fields

struct {
uint32_t ISR:9
uint32_t _reserved0:23
} b
uint32_t w

Detailed Description

Union type to access the Interrupt Program Status Register (IPSR).

Definition at line 202 of file core_cm3.h.

Field Documentation

uint32_t _reserved0

bit: 9..31 Reserved

Definition at line 207 of file core_cm3.h.

struct { ... } b

Structure used for bit access

uint32_t ISR

bit: 0.. 8 Exception number

Definition at line 206 of file core_cm3.h.

uint32_t w

Type used for word access

Definition at line 209 of file core_cm3.h.

The documentation for this union was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cm3.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: ITM_Type Struct Reference

  • Data Fields
Data Fields
ITM_Type Struct Reference
CMSIS ITM

Structure type to access the Instrumentation Trace Macrocell Register (ITM). More...

#include <core_cm3.h>

Data Fields

union {
__O uint8_t u8
__O uint16_t u16
__O uint32_t u32
} PORT [32]
uint32_t | RESERVED0 [864]
__IO uint32_t | TER
uint32_t | RESERVED1 [15]
__IO uint32_t | TPR
uint32_t | RESERVED2 [15]
__IO uint32_t | TCR

Detailed Description

Structure type to access the Instrumentation Trace Macrocell Register (ITM).

Definition at line 600 of file core_cm3.h.

Field Documentation

__O { ... } PORT[32]

Offset: 0x000 ( /W) ITM Stimulus Port Registers

uint32_t RESERVED0[864]

Definition at line 608 of file core_cm3.h.

uint32_t RESERVED1[15]

Definition at line 610 of file core_cm3.h.

uint32_t RESERVED2[15]

Definition at line 612 of file core_cm3.h.

__IO uint32_t TCR

Offset: 0xE80 (R/W) ITM Trace Control Register

Definition at line 613 of file core_cm3.h.

__IO uint32_t TER

Offset: 0xE00 (R/W) ITM Trace Enable Register

Definition at line 609 of file core_cm3.h.

__IO uint32_t TPR

Offset: 0xE40 (R/W) ITM Trace Privilege Register

Definition at line 611 of file core_cm3.h.

__O uint16_t u16

Offset: 0x000 ( /W) ITM Stimulus Port 16-bit

Definition at line 605 of file core_cm3.h.

__O uint32_t u32

Offset: 0x000 ( /W) ITM Stimulus Port 32-bit

Definition at line 606 of file core_cm3.h.

__O uint8_t u8

Offset: 0x000 ( /W) ITM Stimulus Port 8-bit

Definition at line 604 of file core_cm3.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cm3.h
Generated on Mon Nov 28 2011 11:15:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_ADC_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_ADC_TypeDef Struct Reference
LPC17xx System

Analog-to-Digital Converter (ADC) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | ADCR
__IO uint32_t | ADGDR
uint32_t | RESERVED0
__IO uint32_t | ADINTEN
__I uint32_t | ADDR0
__I uint32_t | ADDR1
__I uint32_t | ADDR2
__I uint32_t | ADDR3
__I uint32_t | ADDR4
__I uint32_t | ADDR5
__I uint32_t | ADDR6
__I uint32_t | ADDR7
__I uint32_t | ADSTAT
__IO uint32_t | ADTRM

Detailed Description

Analog-to-Digital Converter (ADC) register structure definition.

Definition at line 596 of file LPC17xx.h.

Field Documentation

__IO uint32_t ADCR

Definition at line 598 of file LPC17xx.h.

__I uint32_t ADDR0

Definition at line 602 of file LPC17xx.h.

__I uint32_t ADDR1

Definition at line 603 of file LPC17xx.h.

__I uint32_t ADDR2

Definition at line 604 of file LPC17xx.h.

__I uint32_t ADDR3

Definition at line 605 of file LPC17xx.h.

__I uint32_t ADDR4

Definition at line 606 of file LPC17xx.h.

__I uint32_t ADDR5

Definition at line 607 of file LPC17xx.h.

__I uint32_t ADDR6

Definition at line 608 of file LPC17xx.h.

__I uint32_t ADDR7

Definition at line 609 of file LPC17xx.h.

__IO uint32_t ADGDR

Definition at line 599 of file LPC17xx.h.

__IO uint32_t ADINTEN

Definition at line 601 of file LPC17xx.h.

__I uint32_t ADSTAT

Definition at line 610 of file LPC17xx.h.

__IO uint32_t ADTRM

Definition at line 611 of file LPC17xx.h.

uint32_t RESERVED0

Definition at line 600 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_CAN_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_CAN_TypeDef Struct Reference
LPC17xx System

Controller Area Network Controller (CAN) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | MOD
__O uint32_t | CMR
__IO uint32_t | GSR
__I uint32_t | ICR
__IO uint32_t | IER
__IO uint32_t | BTR
__IO uint32_t | EWL
__I uint32_t | SR
__IO uint32_t | RFS
__IO uint32_t | RID
__IO uint32_t | RDA
__IO uint32_t | RDB
__IO uint32_t | TFI1
__IO uint32_t | TID1
__IO uint32_t | TDA1
__IO uint32_t | TDB1
__IO uint32_t | TFI2
__IO uint32_t | TID2
__IO uint32_t | TDA2
__IO uint32_t | TDB2
__IO uint32_t | TFI3
__IO uint32_t | TID3
__IO uint32_t | TDA3
__IO uint32_t | TDB3

Detailed Description

Controller Area Network Controller (CAN) register structure definition.

Definition at line 720 of file LPC17xx.h.

Field Documentation

__IO uint32_t BTR

Definition at line 727 of file LPC17xx.h.

__O uint32_t CMR

Definition at line 723 of file LPC17xx.h.

__IO uint32_t EWL

Definition at line 728 of file LPC17xx.h.

__IO uint32_t GSR

Definition at line 724 of file LPC17xx.h.

__I uint32_t ICR

Definition at line 725 of file LPC17xx.h.

__IO uint32_t IER

Definition at line 726 of file LPC17xx.h.

__IO uint32_t MOD

Definition at line 722 of file LPC17xx.h.

__IO uint32_t RDA

Definition at line 732 of file LPC17xx.h.

__IO uint32_t RDB

Definition at line 733 of file LPC17xx.h.

__IO uint32_t RFS

Definition at line 730 of file LPC17xx.h.

__IO uint32_t RID

Definition at line 731 of file LPC17xx.h.

__I uint32_t SR

Definition at line 729 of file LPC17xx.h.

__IO uint32_t TDA1

Definition at line 736 of file LPC17xx.h.

__IO uint32_t TDA2

Definition at line 740 of file LPC17xx.h.

__IO uint32_t TDA3

Definition at line 744 of file LPC17xx.h.

__IO uint32_t TDB1

Definition at line 737 of file LPC17xx.h.

__IO uint32_t TDB2

Definition at line 741 of file LPC17xx.h.

__IO uint32_t TDB3

Definition at line 745 of file LPC17xx.h.

__IO uint32_t TFI1

Definition at line 734 of file LPC17xx.h.

__IO uint32_t TFI2

Definition at line 738 of file LPC17xx.h.

__IO uint32_t TFI3

Definition at line 742 of file LPC17xx.h.

__IO uint32_t TID1

Definition at line 735 of file LPC17xx.h.

__IO uint32_t TID2

Definition at line 739 of file LPC17xx.h.

__IO uint32_t TID3

Definition at line 743 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_CANAF_RAM_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_CANAF_RAM_TypeDef Struct Reference
LPC17xx System

Controller Area Network Acceptance Filter RAM (CANAF_RAM)structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t mask [512]

Detailed Description

Controller Area Network Acceptance Filter RAM (CANAF_RAM)structure definition.

Definition at line 690 of file LPC17xx.h.

Field Documentation

__IO uint32_t mask[512]

Definition at line 692 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_CANAF_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_CANAF_TypeDef Struct Reference
LPC17xx System

Controller Area Network Acceptance Filter(CANAF) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | AFMR
__IO uint32_t | SFF_sa
__IO uint32_t | SFF_GRP_sa
__IO uint32_t | EFF_sa
__IO uint32_t | EFF_GRP_sa
__IO uint32_t | ENDofTable
__I uint32_t | LUTerrAd
__I uint32_t | LUTerr
__IO uint32_t | FCANIE
__IO uint32_t | FCANIC0
__IO uint32_t | FCANIC1

Detailed Description

Controller Area Network Acceptance Filter(CANAF) register structure definition.

Definition at line 696 of file LPC17xx.h.

Field Documentation

__IO uint32_t AFMR

Definition at line 698 of file LPC17xx.h.

__IO uint32_t EFF_GRP_sa

Definition at line 702 of file LPC17xx.h.

__IO uint32_t EFF_sa

Definition at line 701 of file LPC17xx.h.

__IO uint32_t ENDofTable

Definition at line 703 of file LPC17xx.h.

__IO uint32_t FCANIC0

Definition at line 707 of file LPC17xx.h.

__IO uint32_t FCANIC1

Definition at line 708 of file LPC17xx.h.

__IO uint32_t FCANIE

Definition at line 706 of file LPC17xx.h.

__I uint32_t LUTerr

Definition at line 705 of file LPC17xx.h.

__I uint32_t LUTerrAd

Definition at line 704 of file LPC17xx.h.

__IO uint32_t SFF_GRP_sa

Definition at line 700 of file LPC17xx.h.

__IO uint32_t SFF_sa

Definition at line 699 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_CANCR_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_CANCR_TypeDef Struct Reference
LPC17xx System

Controller Area Network Central (CANCR) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__I uint32_t | CANTxSR
__I uint32_t | CANRxSR
__I uint32_t | CANMSR

Detailed Description

Controller Area Network Central (CANCR) register structure definition.

Definition at line 712 of file LPC17xx.h.

Field Documentation

__I uint32_t CANMSR

Definition at line 716 of file LPC17xx.h.

__I uint32_t CANRxSR

Definition at line 715 of file LPC17xx.h.

__I uint32_t CANTxSR

Definition at line 714 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_DAC_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_DAC_TypeDef Struct Reference
LPC17xx System

Digital-to-Analog Converter (DAC) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | DACR
__IO uint32_t | DACCTRL
__IO uint16_t | DACCNTVAL

Detailed Description

Digital-to-Analog Converter (DAC) register structure definition.

Definition at line 616 of file LPC17xx.h.

Field Documentation

__IO uint16_t DACCNTVAL

Definition at line 620 of file LPC17xx.h.

__IO uint32_t DACCTRL

Definition at line 619 of file LPC17xx.h.

__IO uint32_t DACR

Definition at line 618 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_EMAC_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_EMAC_TypeDef Struct Reference
LPC17xx System

Ethernet Media Access Controller (EMAC) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | MAC1
__IO uint32_t | MAC2
__IO uint32_t | IPGT
__IO uint32_t | IPGR
__IO uint32_t | CLRT
__IO uint32_t | MAXF
__IO uint32_t | SUPP
__IO uint32_t | TEST
__IO uint32_t | MCFG
__IO uint32_t | MCMD
__IO uint32_t | MADR
__O uint32_t | MWTD
__I uint32_t | MRDD
__I uint32_t | MIND
uint32_t | RESERVED0 [2]
__IO uint32_t | SA0
__IO uint32_t | SA1
__IO uint32_t | SA2
uint32_t | RESERVED1 [45]
__IO uint32_t | Command
__I uint32_t | Status
__IO uint32_t | RxDescriptor
__IO uint32_t | RxStatus
__IO uint32_t | RxDescriptorNumber
__I uint32_t | RxProduceIndex
__IO uint32_t | RxConsumeIndex
__IO uint32_t | TxDescriptor
__IO uint32_t | TxStatus
__IO uint32_t | TxDescriptorNumber
__IO uint32_t | TxProduceIndex
__I uint32_t | TxConsumeIndex
uint32_t | RESERVED2 [10]
__I uint32_t | TSV0
__I uint32_t | TSV1
__I uint32_t | RSV
uint32_t | RESERVED3 [3]
__IO uint32_t | FlowControlCounter
__I uint32_t | FlowControlStatus
uint32_t | RESERVED4 [34]
__IO uint32_t | RxFilterCtrl
__IO uint32_t | RxFilterWoLStatus
__IO uint32_t | RxFilterWoLClear
uint32_t | RESERVED5
__IO uint32_t | HashFilterL
__IO uint32_t | HashFilterH
uint32_t | RESERVED6 [882]
__I uint32_t | IntStatus
__IO uint32_t | IntEnable
__O uint32_t | IntClear
__O uint32_t | IntSet
uint32_t | RESERVED7
__IO uint32_t | PowerDown
uint32_t | RESERVED8
__IO uint32_t | Module_ID

Detailed Description

Ethernet Media Access Controller (EMAC) register structure definition.

Definition at line 885 of file LPC17xx.h.

Field Documentation

__IO uint32_t CLRT

Definition at line 891 of file LPC17xx.h.

__IO uint32_t Command

Definition at line 906 of file LPC17xx.h.

__IO uint32_t FlowControlCounter

Definition at line 923 of file LPC17xx.h.

__I uint32_t FlowControlStatus

Definition at line 924 of file LPC17xx.h.

__IO uint32_t HashFilterH

Definition at line 931 of file LPC17xx.h.

__IO uint32_t HashFilterL

Definition at line 930 of file LPC17xx.h.

__O uint32_t IntClear

Definition at line 935 of file LPC17xx.h.

__IO uint32_t IntEnable

Definition at line 934 of file LPC17xx.h.

__O uint32_t IntSet

Definition at line 936 of file LPC17xx.h.

__I uint32_t IntStatus

Definition at line 933 of file LPC17xx.h.

__IO uint32_t IPGR

Definition at line 890 of file LPC17xx.h.

__IO uint32_t IPGT

Definition at line 889 of file LPC17xx.h.

__IO uint32_t MAC1

Definition at line 887 of file LPC17xx.h.

__IO uint32_t MAC2

Definition at line 888 of file LPC17xx.h.

__IO uint32_t MADR

Definition at line 897 of file LPC17xx.h.

__IO uint32_t MAXF

Definition at line 892 of file LPC17xx.h.

__IO uint32_t MCFG

Definition at line 895 of file LPC17xx.h.

__IO uint32_t MCMD

Definition at line 896 of file LPC17xx.h.

__I uint32_t MIND

Definition at line 900 of file LPC17xx.h.

__IO uint32_t Module_ID

Definition at line 940 of file LPC17xx.h.

__I uint32_t MRDD

Definition at line 899 of file LPC17xx.h.

__O uint32_t MWTD

Definition at line 898 of file LPC17xx.h.

__IO uint32_t PowerDown

Definition at line 938 of file LPC17xx.h.

uint32_t RESERVED0[2]

Definition at line 901 of file LPC17xx.h.

uint32_t RESERVED1[45]

Definition at line 905 of file LPC17xx.h.

uint32_t RESERVED2[10]

Definition at line 918 of file LPC17xx.h.

uint32_t RESERVED3[3]

Definition at line 922 of file LPC17xx.h.

uint32_t RESERVED4[34]

Definition at line 925 of file LPC17xx.h.

uint32_t RESERVED5

Definition at line 929 of file LPC17xx.h.

uint32_t RESERVED6[882]

Definition at line 932 of file LPC17xx.h.

uint32_t RESERVED7

Definition at line 937 of file LPC17xx.h.

uint32_t RESERVED8

Definition at line 939 of file LPC17xx.h.

__I uint32_t RSV

Definition at line 921 of file LPC17xx.h.

__IO uint32_t RxConsumeIndex

Definition at line 912 of file LPC17xx.h.

__IO uint32_t RxDescriptor

Definition at line 908 of file LPC17xx.h.

__IO uint32_t RxDescriptorNumber

Definition at line 910 of file LPC17xx.h.

__IO uint32_t RxFilterCtrl

Definition at line 926 of file LPC17xx.h.

__IO uint32_t RxFilterWoLClear

Definition at line 928 of file LPC17xx.h.

__IO uint32_t RxFilterWoLStatus

Definition at line 927 of file LPC17xx.h.

__I uint32_t RxProduceIndex

Definition at line 911 of file LPC17xx.h.

__IO uint32_t RxStatus

Definition at line 909 of file LPC17xx.h.

__IO uint32_t SA0

Definition at line 902 of file LPC17xx.h.

__IO uint32_t SA1

Definition at line 903 of file LPC17xx.h.

__IO uint32_t SA2

Definition at line 904 of file LPC17xx.h.

__I uint32_t Status

Definition at line 907 of file LPC17xx.h.

__IO uint32_t SUPP

Definition at line 893 of file LPC17xx.h.

__IO uint32_t TEST

Definition at line 894 of file LPC17xx.h.

__I uint32_t TSV0

Definition at line 919 of file LPC17xx.h.

__I uint32_t TSV1

Definition at line 920 of file LPC17xx.h.

__I uint32_t TxConsumeIndex

Definition at line 917 of file LPC17xx.h.

__IO uint32_t TxDescriptor

Definition at line 913 of file LPC17xx.h.

__IO uint32_t TxDescriptorNumber

Definition at line 915 of file LPC17xx.h.

__IO uint32_t TxProduceIndex

Definition at line 916 of file LPC17xx.h.

__IO uint32_t TxStatus

Definition at line 914 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_GPDMA_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_GPDMA_TypeDef Struct Reference
LPC17xx System

General Purpose Direct Memory Access (GPDMA) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__I uint32_t | DMACIntStat
__I uint32_t | DMACIntTCStat
__O uint32_t | DMACIntTCClear
__I uint32_t | DMACIntErrStat
__O uint32_t | DMACIntErrClr
__I uint32_t | DMACRawIntTCStat
__I uint32_t | DMACRawIntErrStat
__I uint32_t | DMACEnbldChns
__IO uint32_t | DMACSoftBReq
__IO uint32_t | DMACSoftSReq
__IO uint32_t | DMACSoftLBReq
__IO uint32_t | DMACSoftLSReq
__IO uint32_t | DMACConfig
__IO uint32_t | DMACSync

Detailed Description

General Purpose Direct Memory Access (GPDMA) register structure definition.

Definition at line 750 of file LPC17xx.h.

Field Documentation

__IO uint32_t DMACConfig

Definition at line 764 of file LPC17xx.h.

__I uint32_t DMACEnbldChns

Definition at line 759 of file LPC17xx.h.

__O uint32_t DMACIntErrClr

Definition at line 756 of file LPC17xx.h.

__I uint32_t DMACIntErrStat

Definition at line 755 of file LPC17xx.h.

__I uint32_t DMACIntStat

Definition at line 752 of file LPC17xx.h.

__O uint32_t DMACIntTCClear

Definition at line 754 of file LPC17xx.h.

__I uint32_t DMACIntTCStat

Definition at line 753 of file LPC17xx.h.

__I uint32_t DMACRawIntErrStat

Definition at line 758 of file LPC17xx.h.

__I uint32_t DMACRawIntTCStat

Definition at line 757 of file LPC17xx.h.

__IO uint32_t DMACSoftBReq

Definition at line 760 of file LPC17xx.h.

__IO uint32_t DMACSoftLBReq

Definition at line 762 of file LPC17xx.h.

__IO uint32_t DMACSoftLSReq

Definition at line 763 of file LPC17xx.h.

__IO uint32_t DMACSoftSReq

Definition at line 761 of file LPC17xx.h.

__IO uint32_t DMACSync

Definition at line 765 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_GPDMACH_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_GPDMACH_TypeDef Struct Reference
LPC17xx System

General Purpose Direct Memory Access Channel (GPDMACH) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | DMACCSrcAddr
__IO uint32_t | DMACCDestAddr
__IO uint32_t | DMACCLLI
__IO uint32_t | DMACCControl
__IO uint32_t | DMACCConfig

Detailed Description

General Purpose Direct Memory Access Channel (GPDMACH) register structure definition.

Definition at line 769 of file LPC17xx.h.

Field Documentation

__IO uint32_t DMACCConfig

Definition at line 775 of file LPC17xx.h.

__IO uint32_t DMACCControl

Definition at line 774 of file LPC17xx.h.

__IO uint32_t DMACCDestAddr

Definition at line 772 of file LPC17xx.h.

__IO uint32_t DMACCLLI

Definition at line 773 of file LPC17xx.h.

__IO uint32_t DMACCSrcAddr

Definition at line 771 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_GPIO_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_GPIO_TypeDef Struct Reference
LPC17xx System

General Purpose Input/Output (GPIO) register structure definition. More...

#include <LPC17xx.h>

Data Fields

union {
__IO uint32_t FIODIR
struct {
__IO uint16_t FIODIRL
__IO uint16_t FIODIRH
}
struct {
__IO uint8_t FIODIR0
__IO uint8_t FIODIR1
__IO uint8_t FIODIR2
__IO uint8_t FIODIR3
}
};
uint32_t RESERVED0 [3]
union {
__IO uint32_t FIOMASK
struct {
__IO uint16_t FIOMASKL
__IO uint16_t FIOMASKH
}
struct {
__IO uint8_t FIOMASK0
__IO uint8_t FIOMASK1
__IO uint8_t FIOMASK2
__IO uint8_t FIOMASK3
}
};
union {
__IO uint32_t FIOPIN
struct {
__IO uint16_t FIOPINL
__IO uint16_t FIOPINH
}
struct {
__IO uint8_t FIOPIN0
__IO uint8_t FIOPIN1
__IO uint8_t FIOPIN2
__IO uint8_t FIOPIN3
}
};
union {
__IO uint32_t FIOSET
struct {
__IO uint16_t FIOSETL
__IO uint16_t FIOSETH
}
struct {
__IO uint8_t FIOSET0
__IO uint8_t FIOSET1
__IO uint8_t FIOSET2
__IO uint8_t FIOSET3
}
};
union {
__O uint32_t FIOCLR
struct {
__O uint16_t FIOCLRL
__O uint16_t FIOCLRH
}
struct {
__O uint8_t FIOCLR0
__O uint8_t FIOCLR1
__O uint8_t FIOCLR2
__O uint8_t FIOCLR3
}
};

Detailed Description

General Purpose Input/Output (GPIO) register structure definition.

Definition at line 193 of file LPC17xx.h.

Field Documentation

union { ... }
union { ... }
union { ... }
union { ... }
union { ... }
__O uint32_t FIOCLR

Definition at line 249 of file LPC17xx.h.

__O uint8_t FIOCLR0

Definition at line 255 of file LPC17xx.h.

__O uint8_t FIOCLR1

Definition at line 256 of file LPC17xx.h.

__O uint8_t FIOCLR2

Definition at line 257 of file LPC17xx.h.

__O uint8_t FIOCLR3

Definition at line 258 of file LPC17xx.h.

__O uint16_t FIOCLRH

Definition at line 252 of file LPC17xx.h.

__O uint16_t FIOCLRL

Definition at line 251 of file LPC17xx.h.

__IO uint32_t FIODIR

Definition at line 196 of file LPC17xx.h.

__IO uint8_t FIODIR0

Definition at line 202 of file LPC17xx.h.

__IO uint8_t FIODIR1

Definition at line 203 of file LPC17xx.h.

__IO uint8_t FIODIR2

Definition at line 204 of file LPC17xx.h.

__IO uint8_t FIODIR3

Definition at line 205 of file LPC17xx.h.

__IO uint16_t FIODIRH

Definition at line 199 of file LPC17xx.h.

__IO uint16_t FIODIRL

Definition at line 198 of file LPC17xx.h.

__IO uint32_t FIOMASK

Definition at line 210 of file LPC17xx.h.

__IO uint8_t FIOMASK0

Definition at line 216 of file LPC17xx.h.

__IO uint8_t FIOMASK1

Definition at line 217 of file LPC17xx.h.

__IO uint8_t FIOMASK2

Definition at line 218 of file LPC17xx.h.

__IO uint8_t FIOMASK3

Definition at line 219 of file LPC17xx.h.

__IO uint16_t FIOMASKH

Definition at line 213 of file LPC17xx.h.

__IO uint16_t FIOMASKL

Definition at line 212 of file LPC17xx.h.

__IO uint32_t FIOPIN

Definition at line 223 of file LPC17xx.h.

__IO uint8_t FIOPIN0

Definition at line 229 of file LPC17xx.h.

__IO uint8_t FIOPIN1

Definition at line 230 of file LPC17xx.h.

__IO uint8_t FIOPIN2

Definition at line 231 of file LPC17xx.h.

__IO uint8_t FIOPIN3

Definition at line 232 of file LPC17xx.h.

__IO uint16_t FIOPINH

Definition at line 226 of file LPC17xx.h.

__IO uint16_t FIOPINL

Definition at line 225 of file LPC17xx.h.

__IO uint32_t FIOSET

Definition at line 236 of file LPC17xx.h.

__IO uint8_t FIOSET0

Definition at line 242 of file LPC17xx.h.

__IO uint8_t FIOSET1

Definition at line 243 of file LPC17xx.h.

__IO uint8_t FIOSET2

Definition at line 244 of file LPC17xx.h.

__IO uint8_t FIOSET3

Definition at line 245 of file LPC17xx.h.

__IO uint16_t FIOSETH

Definition at line 239 of file LPC17xx.h.

__IO uint16_t FIOSETL

Definition at line 238 of file LPC17xx.h.

uint32_t RESERVED0[3]

Definition at line 208 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_GPIOINT_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_GPIOINT_TypeDef Struct Reference
LPC17xx System

General Purpose Input/Output interrupt (GPIOINT) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__I uint32_t | IntStatus
__I uint32_t | IO0IntStatR
__I uint32_t | IO0IntStatF
__O uint32_t | IO0IntClr
__IO uint32_t | IO0IntEnR
__IO uint32_t | IO0IntEnF
uint32_t | RESERVED0 [3]
__I uint32_t | IO2IntStatR
__I uint32_t | IO2IntStatF
__O uint32_t | IO2IntClr
__IO uint32_t | IO2IntEnR
__IO uint32_t | IO2IntEnF

Detailed Description

General Purpose Input/Output interrupt (GPIOINT) register structure definition.

Definition at line 264 of file LPC17xx.h.

Field Documentation

__I uint32_t IntStatus

Definition at line 266 of file LPC17xx.h.

__O uint32_t IO0IntClr

Definition at line 269 of file LPC17xx.h.

__IO uint32_t IO0IntEnF

Definition at line 271 of file LPC17xx.h.

__IO uint32_t IO0IntEnR

Definition at line 270 of file LPC17xx.h.

__I uint32_t IO0IntStatF

Definition at line 268 of file LPC17xx.h.

__I uint32_t IO0IntStatR

Definition at line 267 of file LPC17xx.h.

__O uint32_t IO2IntClr

Definition at line 275 of file LPC17xx.h.

__IO uint32_t IO2IntEnF

Definition at line 277 of file LPC17xx.h.

__IO uint32_t IO2IntEnR

Definition at line 276 of file LPC17xx.h.

__I uint32_t IO2IntStatF

Definition at line 274 of file LPC17xx.h.

__I uint32_t IO2IntStatR

Definition at line 273 of file LPC17xx.h.

uint32_t RESERVED0[3]

Definition at line 272 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_I2C_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_I2C_TypeDef Struct Reference
LPC17xx System

Inter-Integrated Circuit (I2C) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | I2CONSET
__I uint32_t | I2STAT
__IO uint32_t | I2DAT
__IO uint32_t | I2ADR0
__IO uint32_t | I2SCLH
__IO uint32_t | I2SCLL
__O uint32_t | I2CONCLR
__IO uint32_t | MMCTRL
__IO uint32_t | I2ADR1
__IO uint32_t | I2ADR2
__IO uint32_t | I2ADR3
__I uint32_t | I2DATA_BUFFER
__IO uint32_t | I2MASK0
__IO uint32_t | I2MASK1
__IO uint32_t | I2MASK2
__IO uint32_t | I2MASK3

Detailed Description

Inter-Integrated Circuit (I2C) register structure definition.

Definition at line 471 of file LPC17xx.h.

Field Documentation

__IO uint32_t I2ADR0

Definition at line 476 of file LPC17xx.h.

__IO uint32_t I2ADR1

Definition at line 481 of file LPC17xx.h.

__IO uint32_t I2ADR2

Definition at line 482 of file LPC17xx.h.

__IO uint32_t I2ADR3

Definition at line 483 of file LPC17xx.h.

__O uint32_t I2CONCLR

Definition at line 479 of file LPC17xx.h.

__IO uint32_t I2CONSET

Definition at line 473 of file LPC17xx.h.

__IO uint32_t I2DAT

Definition at line 475 of file LPC17xx.h.

__I uint32_t I2DATA_BUFFER

Definition at line 484 of file LPC17xx.h.

__IO uint32_t I2MASK0

Definition at line 485 of file LPC17xx.h.

__IO uint32_t I2MASK1

Definition at line 486 of file LPC17xx.h.

__IO uint32_t I2MASK2

Definition at line 487 of file LPC17xx.h.

__IO uint32_t I2MASK3

Definition at line 488 of file LPC17xx.h.

__IO uint32_t I2SCLH

Definition at line 477 of file LPC17xx.h.

__IO uint32_t I2SCLL

Definition at line 478 of file LPC17xx.h.

__I uint32_t I2STAT

Definition at line 474 of file LPC17xx.h.

__IO uint32_t MMCTRL

Definition at line 480 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_I2S_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_I2S_TypeDef Struct Reference
LPC17xx System

Inter IC Sound (I2S) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | I2SDAO
__IO uint32_t | I2SDAI
__O uint32_t | I2STXFIFO
__I uint32_t | I2SRXFIFO
__I uint32_t | I2SSTATE
__IO uint32_t | I2SDMA1
__IO uint32_t | I2SDMA2
__IO uint32_t | I2SIRQ
__IO uint32_t | I2STXRATE
__IO uint32_t | I2SRXRATE
__IO uint32_t | I2STXBITRATE
__IO uint32_t | I2SRXBITRATE
__IO uint32_t | I2STXMODE
__IO uint32_t | I2SRXMODE

Detailed Description

Inter IC Sound (I2S) register structure definition.

Definition at line 493 of file LPC17xx.h.

Field Documentation

__IO uint32_t I2SDAI

Definition at line 496 of file LPC17xx.h.

__IO uint32_t I2SDAO

Definition at line 495 of file LPC17xx.h.

__IO uint32_t I2SDMA1

Definition at line 500 of file LPC17xx.h.

__IO uint32_t I2SDMA2

Definition at line 501 of file LPC17xx.h.

__IO uint32_t I2SIRQ

Definition at line 502 of file LPC17xx.h.

__IO uint32_t I2SRXBITRATE

Definition at line 506 of file LPC17xx.h.

__I uint32_t I2SRXFIFO

Definition at line 498 of file LPC17xx.h.

__IO uint32_t I2SRXMODE

Definition at line 508 of file LPC17xx.h.

__IO uint32_t I2SRXRATE

Definition at line 504 of file LPC17xx.h.

__I uint32_t I2SSTATE

Definition at line 499 of file LPC17xx.h.

__IO uint32_t I2STXBITRATE

Definition at line 505 of file LPC17xx.h.

__O uint32_t I2STXFIFO

Definition at line 497 of file LPC17xx.h.

__IO uint32_t I2STXMODE

Definition at line 507 of file LPC17xx.h.

__IO uint32_t I2STXRATE

Definition at line 503 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_MCPWM_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_MCPWM_TypeDef Struct Reference
LPC17xx System

Motor Control Pulse-Width Modulation (MCPWM) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__I uint32_t | MCCON
__O uint32_t | MCCON_SET
__O uint32_t | MCCON_CLR
__I uint32_t | MCCAPCON
__O uint32_t | MCCAPCON_SET
__O uint32_t | MCCAPCON_CLR
__IO uint32_t | MCTIM0
__IO uint32_t | MCTIM1
__IO uint32_t | MCTIM2
__IO uint32_t | MCPER0
__IO uint32_t | MCPER1
__IO uint32_t | MCPER2
__IO uint32_t | MCPW0
__IO uint32_t | MCPW1
__IO uint32_t | MCPW2
__IO uint32_t | MCDEADTIME
__IO uint32_t | MCCCP
__IO uint32_t | MCCR0
__IO uint32_t | MCCR1
__IO uint32_t | MCCR2
__I uint32_t | MCINTEN
__O uint32_t | MCINTEN_SET
__O uint32_t | MCINTEN_CLR
__I uint32_t | MCCNTCON
__O uint32_t | MCCNTCON_SET
__O uint32_t | MCCNTCON_CLR
__I uint32_t | MCINTFLAG
__O uint32_t | MCINTFLAG_SET
__O uint32_t | MCINTFLAG_CLR
__O uint32_t | MCCAP_CLR

Detailed Description

Motor Control Pulse-Width Modulation (MCPWM) register structure definition.

Definition at line 625 of file LPC17xx.h.

Field Documentation

__O uint32_t MCCAP_CLR

Definition at line 656 of file LPC17xx.h.

__I uint32_t MCCAPCON

Definition at line 630 of file LPC17xx.h.

__O uint32_t MCCAPCON_CLR

Definition at line 632 of file LPC17xx.h.

__O uint32_t MCCAPCON_SET

Definition at line 631 of file LPC17xx.h.

__IO uint32_t MCCCP

Definition at line 643 of file LPC17xx.h.

__I uint32_t MCCNTCON

Definition at line 650 of file LPC17xx.h.

__O uint32_t MCCNTCON_CLR

Definition at line 652 of file LPC17xx.h.

__O uint32_t MCCNTCON_SET

Definition at line 651 of file LPC17xx.h.

__I uint32_t MCCON

Definition at line 627 of file LPC17xx.h.

__O uint32_t MCCON_CLR

Definition at line 629 of file LPC17xx.h.

__O uint32_t MCCON_SET

Definition at line 628 of file LPC17xx.h.

__IO uint32_t MCCR0

Definition at line 644 of file LPC17xx.h.

__IO uint32_t MCCR1

Definition at line 645 of file LPC17xx.h.

__IO uint32_t MCCR2

Definition at line 646 of file LPC17xx.h.

__IO uint32_t MCDEADTIME

Definition at line 642 of file LPC17xx.h.

__I uint32_t MCINTEN

Definition at line 647 of file LPC17xx.h.

__O uint32_t MCINTEN_CLR

Definition at line 649 of file LPC17xx.h.

__O uint32_t MCINTEN_SET

Definition at line 648 of file LPC17xx.h.

__I uint32_t MCINTFLAG

Definition at line 653 of file LPC17xx.h.

__O uint32_t MCINTFLAG_CLR

Definition at line 655 of file LPC17xx.h.

__O uint32_t MCINTFLAG_SET

Definition at line 654 of file LPC17xx.h.

__IO uint32_t MCPER0

Definition at line 636 of file LPC17xx.h.

__IO uint32_t MCPER1

Definition at line 637 of file LPC17xx.h.

__IO uint32_t MCPER2

Definition at line 638 of file LPC17xx.h.

__IO uint32_t MCPW0

Definition at line 639 of file LPC17xx.h.

__IO uint32_t MCPW1

Definition at line 640 of file LPC17xx.h.

__IO uint32_t MCPW2

Definition at line 641 of file LPC17xx.h.

__IO uint32_t MCTIM0

Definition at line 633 of file LPC17xx.h.

__IO uint32_t MCTIM1

Definition at line 634 of file LPC17xx.h.

__IO uint32_t MCTIM2

Definition at line 635 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_PINCON_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_PINCON_TypeDef Struct Reference
LPC17xx System

Pin Connect Block (PINCON) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | PINSEL0
__IO uint32_t | PINSEL1
__IO uint32_t | PINSEL2
__IO uint32_t | PINSEL3
__IO uint32_t | PINSEL4
__IO uint32_t | PINSEL5
__IO uint32_t | PINSEL6
__IO uint32_t | PINSEL7
__IO uint32_t | PINSEL8
__IO uint32_t | PINSEL9
__IO uint32_t | PINSEL10
uint32_t | RESERVED0 [5]
__IO uint32_t | PINMODE0
__IO uint32_t | PINMODE1
__IO uint32_t | PINMODE2
__IO uint32_t | PINMODE3
__IO uint32_t | PINMODE4
__IO uint32_t | PINMODE5
__IO uint32_t | PINMODE6
__IO uint32_t | PINMODE7
__IO uint32_t | PINMODE8
__IO uint32_t | PINMODE9
__IO uint32_t | PINMODE_OD0
__IO uint32_t | PINMODE_OD1
__IO uint32_t | PINMODE_OD2
__IO uint32_t | PINMODE_OD3
__IO uint32_t | PINMODE_OD4
__IO uint32_t | I2CPADCFG

Detailed Description

Pin Connect Block (PINCON) register structure definition.

Definition at line 159 of file LPC17xx.h.

Field Documentation

__IO uint32_t I2CPADCFG

Definition at line 188 of file LPC17xx.h.

__IO uint32_t PINMODE0

Definition at line 173 of file LPC17xx.h.

__IO uint32_t PINMODE1

Definition at line 174 of file LPC17xx.h.

__IO uint32_t PINMODE2

Definition at line 175 of file LPC17xx.h.

__IO uint32_t PINMODE3

Definition at line 176 of file LPC17xx.h.

__IO uint32_t PINMODE4

Definition at line 177 of file LPC17xx.h.

__IO uint32_t PINMODE5

Definition at line 178 of file LPC17xx.h.

__IO uint32_t PINMODE6

Definition at line 179 of file LPC17xx.h.

__IO uint32_t PINMODE7

Definition at line 180 of file LPC17xx.h.

__IO uint32_t PINMODE8

Definition at line 181 of file LPC17xx.h.

__IO uint32_t PINMODE9

Definition at line 182 of file LPC17xx.h.

__IO uint32_t PINMODE_OD0

Definition at line 183 of file LPC17xx.h.

__IO uint32_t PINMODE_OD1

Definition at line 184 of file LPC17xx.h.

__IO uint32_t PINMODE_OD2

Definition at line 185 of file LPC17xx.h.

__IO uint32_t PINMODE_OD3

Definition at line 186 of file LPC17xx.h.

__IO uint32_t PINMODE_OD4

Definition at line 187 of file LPC17xx.h.

__IO uint32_t PINSEL0

Definition at line 161 of file LPC17xx.h.

__IO uint32_t PINSEL1

Definition at line 162 of file LPC17xx.h.

__IO uint32_t PINSEL10

Definition at line 171 of file LPC17xx.h.

__IO uint32_t PINSEL2

Definition at line 163 of file LPC17xx.h.

__IO uint32_t PINSEL3

Definition at line 164 of file LPC17xx.h.

__IO uint32_t PINSEL4

Definition at line 165 of file LPC17xx.h.

__IO uint32_t PINSEL5

Definition at line 166 of file LPC17xx.h.

__IO uint32_t PINSEL6

Definition at line 167 of file LPC17xx.h.

__IO uint32_t PINSEL7

Definition at line 168 of file LPC17xx.h.

__IO uint32_t PINSEL8

Definition at line 169 of file LPC17xx.h.

__IO uint32_t PINSEL9

Definition at line 170 of file LPC17xx.h.

uint32_t RESERVED0[5]

Definition at line 172 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_PWM_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_PWM_TypeDef Struct Reference
LPC17xx System

Pulse-Width Modulation (PWM) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | IR
__IO uint32_t | TCR
__IO uint32_t | TC
__IO uint32_t | PR
__IO uint32_t | PC
__IO uint32_t | MCR
__IO uint32_t | MR0
__IO uint32_t | MR1
__IO uint32_t | MR2
__IO uint32_t | MR3
__IO uint32_t | CCR
__I uint32_t | CR0
__I uint32_t | CR1
__I uint32_t | CR2
__I uint32_t | CR3
uint32_t | RESERVED0
__IO uint32_t | MR4
__IO uint32_t | MR5
__IO uint32_t | MR6
__IO uint32_t | PCR
__IO uint32_t | LER
uint32_t | RESERVED1 [7]
__IO uint32_t | CTCR

Detailed Description

Pulse-Width Modulation (PWM) register structure definition.

Definition at line 305 of file LPC17xx.h.

Field Documentation

__IO uint32_t CCR

Definition at line 317 of file LPC17xx.h.

__I uint32_t CR0

Definition at line 318 of file LPC17xx.h.

__I uint32_t CR1

Definition at line 319 of file LPC17xx.h.

__I uint32_t CR2

Definition at line 320 of file LPC17xx.h.

__I uint32_t CR3

Definition at line 321 of file LPC17xx.h.

__IO uint32_t CTCR

Definition at line 329 of file LPC17xx.h.

__IO uint32_t IR

Definition at line 307 of file LPC17xx.h.

__IO uint32_t LER

Definition at line 327 of file LPC17xx.h.

__IO uint32_t MCR

Definition at line 312 of file LPC17xx.h.

__IO uint32_t MR0

Definition at line 313 of file LPC17xx.h.

__IO uint32_t MR1

Definition at line 314 of file LPC17xx.h.

__IO uint32_t MR2

Definition at line 315 of file LPC17xx.h.

__IO uint32_t MR3

Definition at line 316 of file LPC17xx.h.

__IO uint32_t MR4

Definition at line 323 of file LPC17xx.h.

__IO uint32_t MR5

Definition at line 324 of file LPC17xx.h.

__IO uint32_t MR6

Definition at line 325 of file LPC17xx.h.

__IO uint32_t PC

Definition at line 311 of file LPC17xx.h.

__IO uint32_t PCR

Definition at line 326 of file LPC17xx.h.

__IO uint32_t PR

Definition at line 310 of file LPC17xx.h.

uint32_t RESERVED0

Definition at line 322 of file LPC17xx.h.

uint32_t RESERVED1[7]

Definition at line 328 of file LPC17xx.h.

__IO uint32_t TC

Definition at line 309 of file LPC17xx.h.

__IO uint32_t TCR

Definition at line 308 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_QEI_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_QEI_TypeDef Struct Reference
LPC17xx System

Quadrature Encoder Interface (QEI) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__O uint32_t | QEICON
__I uint32_t | QEISTAT
__IO uint32_t | QEICONF
__I uint32_t | QEIPOS
__IO uint32_t | QEIMAXPOS
__IO uint32_t | CMPOS0
__IO uint32_t | CMPOS1
__IO uint32_t | CMPOS2
__I uint32_t | INXCNT
__IO uint32_t | INXCMP
__IO uint32_t | QEILOAD
__I uint32_t | QEITIME
__I uint32_t | QEIVEL
__I uint32_t | QEICAP
__IO uint32_t | VELCOMP
__IO uint32_t | FILTER
uint32_t | RESERVED0 [998]
__O uint32_t | QEIIEC
__O uint32_t | QEIIES
__I uint32_t | QEIINTSTAT
__I uint32_t | QEIIE
__O uint32_t | QEICLR
__O uint32_t | QEISET

Detailed Description

Quadrature Encoder Interface (QEI) register structure definition.

Definition at line 661 of file LPC17xx.h.

Field Documentation

__IO uint32_t CMPOS0

Definition at line 668 of file LPC17xx.h.

__IO uint32_t CMPOS1

Definition at line 669 of file LPC17xx.h.

__IO uint32_t CMPOS2

Definition at line 670 of file LPC17xx.h.

__IO uint32_t FILTER

Definition at line 678 of file LPC17xx.h.

__IO uint32_t INXCMP

Definition at line 672 of file LPC17xx.h.

__I uint32_t INXCNT

Definition at line 671 of file LPC17xx.h.

__I uint32_t QEICAP

Definition at line 676 of file LPC17xx.h.

__O uint32_t QEICLR

Definition at line 684 of file LPC17xx.h.

__O uint32_t QEICON

Definition at line 663 of file LPC17xx.h.

__IO uint32_t QEICONF

Definition at line 665 of file LPC17xx.h.

__I uint32_t QEIIE

Definition at line 683 of file LPC17xx.h.

__O uint32_t QEIIEC

Definition at line 680 of file LPC17xx.h.

__O uint32_t QEIIES

Definition at line 681 of file LPC17xx.h.

__I uint32_t QEIINTSTAT

Definition at line 682 of file LPC17xx.h.

__IO uint32_t QEILOAD

Definition at line 673 of file LPC17xx.h.

__IO uint32_t QEIMAXPOS

Definition at line 667 of file LPC17xx.h.

__I uint32_t QEIPOS

Definition at line 666 of file LPC17xx.h.

__O uint32_t QEISET

Definition at line 685 of file LPC17xx.h.

__I uint32_t QEISTAT

Definition at line 664 of file LPC17xx.h.

__I uint32_t QEITIME

Definition at line 674 of file LPC17xx.h.

__I uint32_t QEIVEL

Definition at line 675 of file LPC17xx.h.

uint32_t RESERVED0[998]

Definition at line 679 of file LPC17xx.h.

__IO uint32_t VELCOMP

Definition at line 677 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_RIT_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_RIT_TypeDef Struct Reference
LPC17xx System

Repetitive Interrupt Timer (RIT) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | RICOMPVAL
__IO uint32_t | RIMASK
__IO uint8_t | RICTRL
uint8_t | RESERVED0 [3]
__IO uint32_t | RICOUNTER

Detailed Description

Repetitive Interrupt Timer (RIT) register structure definition.

Definition at line 513 of file LPC17xx.h.

Field Documentation

uint8_t RESERVED0[3]

Definition at line 518 of file LPC17xx.h.

__IO uint32_t RICOMPVAL

Definition at line 515 of file LPC17xx.h.

__IO uint32_t RICOUNTER

Definition at line 519 of file LPC17xx.h.

__IO uint8_t RICTRL

Definition at line 517 of file LPC17xx.h.

__IO uint32_t RIMASK

Definition at line 516 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_RTC_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_RTC_TypeDef Struct Reference
LPC17xx System

Real-Time Clock (RTC) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint8_t | ILR
uint8_t | RESERVED0 [7]
__IO uint8_t | CCR
uint8_t | RESERVED1 [3]
__IO uint8_t | CIIR
uint8_t | RESERVED2 [3]
__IO uint8_t | AMR
uint8_t | RESERVED3 [3]
__I uint32_t | CTIME0
__I uint32_t | CTIME1
__I uint32_t | CTIME2
__IO uint8_t | SEC
uint8_t | RESERVED4 [3]
__IO uint8_t | MIN
uint8_t | RESERVED5 [3]
__IO uint8_t | HOUR
uint8_t | RESERVED6 [3]
__IO uint8_t | DOM
uint8_t | RESERVED7 [3]
__IO uint8_t | DOW
uint8_t | RESERVED8 [3]
__IO uint16_t | DOY
uint16_t | RESERVED9
__IO uint8_t | MONTH
uint8_t | RESERVED10 [3]
__IO uint16_t | YEAR
uint16_t | RESERVED11
__IO uint32_t | CALIBRATION
__IO uint32_t | GPREG0
__IO uint32_t | GPREG1
__IO uint32_t | GPREG2
__IO uint32_t | GPREG3
__IO uint32_t | GPREG4
__IO uint8_t | RTC_AUXEN
uint8_t | RESERVED12 [3]
__IO uint8_t | RTC_AUX
uint8_t | RESERVED13 [3]
__IO uint8_t | ALSEC
uint8_t | RESERVED14 [3]
__IO uint8_t | ALMIN
uint8_t | RESERVED15 [3]
__IO uint8_t | ALHOUR
uint8_t | RESERVED16 [3]
__IO uint8_t | ALDOM
uint8_t | RESERVED17 [3]
__IO uint8_t | ALDOW
uint8_t | RESERVED18 [3]
__IO uint16_t | ALDOY
uint16_t | RESERVED19
__IO uint8_t | ALMON
uint8_t | RESERVED20 [3]
__IO uint16_t | ALYEAR
uint16_t | RESERVED21

Detailed Description

Real-Time Clock (RTC) register structure definition.

Definition at line 524 of file LPC17xx.h.

Field Documentation

__IO uint8_t ALDOM

Definition at line 569 of file LPC17xx.h.

__IO uint8_t ALDOW

Definition at line 571 of file LPC17xx.h.

__IO uint16_t ALDOY

Definition at line 573 of file LPC17xx.h.

__IO uint8_t ALHOUR

Definition at line 567 of file LPC17xx.h.

__IO uint8_t ALMIN

Definition at line 565 of file LPC17xx.h.

__IO uint8_t ALMON

Definition at line 575 of file LPC17xx.h.

__IO uint8_t ALSEC

Definition at line 563 of file LPC17xx.h.

__IO uint16_t ALYEAR

Definition at line 577 of file LPC17xx.h.

__IO uint8_t AMR

Definition at line 532 of file LPC17xx.h.

__IO uint32_t CALIBRATION

Definition at line 553 of file LPC17xx.h.

__IO uint8_t CCR

Definition at line 528 of file LPC17xx.h.

__IO uint8_t CIIR

Definition at line 530 of file LPC17xx.h.

__I uint32_t CTIME0

Definition at line 534 of file LPC17xx.h.

__I uint32_t CTIME1

Definition at line 535 of file LPC17xx.h.

__I uint32_t CTIME2

Definition at line 536 of file LPC17xx.h.

__IO uint8_t DOM

Definition at line 543 of file LPC17xx.h.

__IO uint8_t DOW

Definition at line 545 of file LPC17xx.h.

__IO uint16_t DOY

Definition at line 547 of file LPC17xx.h.

__IO uint32_t GPREG0

Definition at line 554 of file LPC17xx.h.

__IO uint32_t GPREG1

Definition at line 555 of file LPC17xx.h.

__IO uint32_t GPREG2

Definition at line 556 of file LPC17xx.h.

__IO uint32_t GPREG3

Definition at line 557 of file LPC17xx.h.

__IO uint32_t GPREG4

Definition at line 558 of file LPC17xx.h.

__IO uint8_t HOUR

Definition at line 541 of file LPC17xx.h.

__IO uint8_t ILR

Definition at line 526 of file LPC17xx.h.

__IO uint8_t MIN

Definition at line 539 of file LPC17xx.h.

__IO uint8_t MONTH

Definition at line 549 of file LPC17xx.h.

uint8_t RESERVED0[7]

Definition at line 527 of file LPC17xx.h.

uint8_t RESERVED1[3]

Definition at line 529 of file LPC17xx.h.

uint8_t RESERVED10[3]

Definition at line 550 of file LPC17xx.h.

uint16_t RESERVED11

Definition at line 552 of file LPC17xx.h.

uint8_t RESERVED12[3]

Definition at line 560 of file LPC17xx.h.

uint8_t RESERVED13[3]

Definition at line 562 of file LPC17xx.h.

uint8_t RESERVED14[3]

Definition at line 564 of file LPC17xx.h.

uint8_t RESERVED15[3]

Definition at line 566 of file LPC17xx.h.

uint8_t RESERVED16[3]

Definition at line 568 of file LPC17xx.h.

uint8_t RESERVED17[3]

Definition at line 570 of file LPC17xx.h.

uint8_t RESERVED18[3]

Definition at line 572 of file LPC17xx.h.

uint16_t RESERVED19

Definition at line 574 of file LPC17xx.h.

uint8_t RESERVED2[3]

Definition at line 531 of file LPC17xx.h.

uint8_t RESERVED20[3]

Definition at line 576 of file LPC17xx.h.

uint16_t RESERVED21

Definition at line 578 of file LPC17xx.h.

uint8_t RESERVED3[3]

Definition at line 533 of file LPC17xx.h.

uint8_t RESERVED4[3]

Definition at line 538 of file LPC17xx.h.

uint8_t RESERVED5[3]

Definition at line 540 of file LPC17xx.h.

uint8_t RESERVED6[3]

Definition at line 542 of file LPC17xx.h.

uint8_t RESERVED7[3]

Definition at line 544 of file LPC17xx.h.

uint8_t RESERVED8[3]

Definition at line 546 of file LPC17xx.h.

uint16_t RESERVED9

Definition at line 548 of file LPC17xx.h.

__IO uint8_t RTC_AUX

Definition at line 561 of file LPC17xx.h.

__IO uint8_t RTC_AUXEN

Definition at line 559 of file LPC17xx.h.

__IO uint8_t SEC

Definition at line 537 of file LPC17xx.h.

__IO uint16_t YEAR

Definition at line 551 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_SC_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_SC_TypeDef Struct Reference
LPC17xx System

System Control (SC) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | FLASHCFG
uint32_t | RESERVED0 [31]
__IO uint32_t | PLL0CON
__IO uint32_t | PLL0CFG
__I uint32_t | PLL0STAT
__O uint32_t | PLL0FEED
uint32_t | RESERVED1 [4]
__IO uint32_t | PLL1CON
__IO uint32_t | PLL1CFG
__I uint32_t | PLL1STAT
__O uint32_t | PLL1FEED
uint32_t | RESERVED2 [4]
__IO uint32_t | PCON
__IO uint32_t | PCONP
uint32_t | RESERVED3 [15]
__IO uint32_t | CCLKCFG
__IO uint32_t | USBCLKCFG
__IO uint32_t | CLKSRCSEL
__IO uint32_t | CANSLEEPCLR
__IO uint32_t | CANWAKEFLAGS
uint32_t | RESERVED4 [10]
__IO uint32_t | EXTINT
uint32_t | RESERVED5
__IO uint32_t | EXTMODE
__IO uint32_t | EXTPOLAR
uint32_t | RESERVED6 [12]
__IO uint32_t | RSID
uint32_t | RESERVED7 [7]
__IO uint32_t | SCS
__IO uint32_t | IRCTRIM
__IO uint32_t | PCLKSEL0
__IO uint32_t | PCLKSEL1
uint32_t | RESERVED8 [4]
__IO uint32_t | USBIntSt
__IO uint32_t | DMAREQSEL
__IO uint32_t | CLKOUTCFG

Detailed Description

System Control (SC) register structure definition.

Definition at line 117 of file LPC17xx.h.

Field Documentation

__IO uint32_t CANSLEEPCLR

Definition at line 137 of file LPC17xx.h.

__IO uint32_t CANWAKEFLAGS

Definition at line 138 of file LPC17xx.h.

__IO uint32_t CCLKCFG

Definition at line 134 of file LPC17xx.h.

__IO uint32_t CLKOUTCFG

Definition at line 154 of file LPC17xx.h.

__IO uint32_t CLKSRCSEL

Definition at line 136 of file LPC17xx.h.

__IO uint32_t DMAREQSEL

Definition at line 153 of file LPC17xx.h.

__IO uint32_t EXTINT

Definition at line 140 of file LPC17xx.h.

__IO uint32_t EXTMODE

Definition at line 142 of file LPC17xx.h.

__IO uint32_t EXTPOLAR

Definition at line 143 of file LPC17xx.h.

__IO uint32_t FLASHCFG

Definition at line 119 of file LPC17xx.h.

__IO uint32_t IRCTRIM

Definition at line 148 of file LPC17xx.h.

__IO uint32_t PCLKSEL0

Definition at line 149 of file LPC17xx.h.

__IO uint32_t PCLKSEL1

Definition at line 150 of file LPC17xx.h.

__IO uint32_t PCON

Definition at line 131 of file LPC17xx.h.

__IO uint32_t PCONP

Definition at line 132 of file LPC17xx.h.

__IO uint32_t PLL0CFG

Definition at line 122 of file LPC17xx.h.

__IO uint32_t PLL0CON

Definition at line 121 of file LPC17xx.h.

__O uint32_t PLL0FEED

Definition at line 124 of file LPC17xx.h.

__I uint32_t PLL0STAT

Definition at line 123 of file LPC17xx.h.

__IO uint32_t PLL1CFG

Definition at line 127 of file LPC17xx.h.

__IO uint32_t PLL1CON

Definition at line 126 of file LPC17xx.h.

__O uint32_t PLL1FEED

Definition at line 129 of file LPC17xx.h.

__I uint32_t PLL1STAT

Definition at line 128 of file LPC17xx.h.

uint32_t RESERVED0[31]

Definition at line 120 of file LPC17xx.h.

uint32_t RESERVED1[4]

Definition at line 125 of file LPC17xx.h.

uint32_t RESERVED2[4]

Definition at line 130 of file LPC17xx.h.

uint32_t RESERVED3[15]

Definition at line 133 of file LPC17xx.h.

uint32_t RESERVED4[10]

Definition at line 139 of file LPC17xx.h.

uint32_t RESERVED5

Definition at line 141 of file LPC17xx.h.

uint32_t RESERVED6[12]

Definition at line 144 of file LPC17xx.h.

uint32_t RESERVED7[7]

Definition at line 146 of file LPC17xx.h.

uint32_t RESERVED8[4]

Definition at line 151 of file LPC17xx.h.

__IO uint32_t RSID

Definition at line 145 of file LPC17xx.h.

__IO uint32_t SCS

Definition at line 147 of file LPC17xx.h.

__IO uint32_t USBCLKCFG

Definition at line 135 of file LPC17xx.h.

__IO uint32_t USBIntSt

Definition at line 152 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_SPI_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_SPI_TypeDef Struct Reference
LPC17xx System

Serial Peripheral Interface (SPI) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | SPCR
__I uint32_t | SPSR
__IO uint32_t | SPDR
__IO uint32_t | SPCCR
uint32_t | RESERVED0 [3]
__IO uint32_t | SPINT

Detailed Description

Serial Peripheral Interface (SPI) register structure definition.

Definition at line 443 of file LPC17xx.h.

Field Documentation

uint32_t RESERVED0[3]

Definition at line 449 of file LPC17xx.h.

__IO uint32_t SPCCR

Definition at line 448 of file LPC17xx.h.

__IO uint32_t SPCR

Definition at line 445 of file LPC17xx.h.

__IO uint32_t SPDR

Definition at line 447 of file LPC17xx.h.

__IO uint32_t SPINT

Definition at line 450 of file LPC17xx.h.

__I uint32_t SPSR

Definition at line 446 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_SSP_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_SSP_TypeDef Struct Reference
LPC17xx System

Synchronous Serial Communication (SSP) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | CR0
__IO uint32_t | CR1
__IO uint32_t | DR
__I uint32_t | SR
__IO uint32_t | CPSR
__IO uint32_t | IMSC
__IO uint32_t | RIS
__IO uint32_t | MIS
__IO uint32_t | ICR
__IO uint32_t | DMACR

Detailed Description

Synchronous Serial Communication (SSP) register structure definition.

Definition at line 455 of file LPC17xx.h.

Field Documentation

__IO uint32_t CPSR

Definition at line 461 of file LPC17xx.h.

__IO uint32_t CR0

Definition at line 457 of file LPC17xx.h.

__IO uint32_t CR1

Definition at line 458 of file LPC17xx.h.

__IO uint32_t DMACR

Definition at line 466 of file LPC17xx.h.

__IO uint32_t DR

Definition at line 459 of file LPC17xx.h.

__IO uint32_t ICR

Definition at line 465 of file LPC17xx.h.

__IO uint32_t IMSC

Definition at line 462 of file LPC17xx.h.

__IO uint32_t MIS

Definition at line 464 of file LPC17xx.h.

__IO uint32_t RIS

Definition at line 463 of file LPC17xx.h.

__I uint32_t SR

Definition at line 460 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_TIM_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_TIM_TypeDef Struct Reference
LPC17xx System

Timer (TIM) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t | IR
__IO uint32_t | TCR
__IO uint32_t | TC
__IO uint32_t | PR
__IO uint32_t | PC
__IO uint32_t | MCR
__IO uint32_t | MR0
__IO uint32_t | MR1
__IO uint32_t | MR2
__IO uint32_t | MR3
__IO uint32_t | CCR
__I uint32_t | CR0
__I uint32_t | CR1
uint32_t | RESERVED0 [2]
__IO uint32_t | EMR
uint32_t | RESERVED1 [12]
__IO uint32_t | CTCR

Detailed Description

Timer (TIM) register structure definition.

Definition at line 282 of file LPC17xx.h.

Field Documentation

__IO uint32_t CCR

Definition at line 294 of file LPC17xx.h.

__I uint32_t CR0

Definition at line 295 of file LPC17xx.h.

__I uint32_t CR1

Definition at line 296 of file LPC17xx.h.

__IO uint32_t CTCR

Definition at line 300 of file LPC17xx.h.

__IO uint32_t EMR

Definition at line 298 of file LPC17xx.h.

__IO uint32_t IR

Definition at line 284 of file LPC17xx.h.

__IO uint32_t MCR

Definition at line 289 of file LPC17xx.h.

__IO uint32_t MR0

Definition at line 290 of file LPC17xx.h.

__IO uint32_t MR1

Definition at line 291 of file LPC17xx.h.

__IO uint32_t MR2

Definition at line 292 of file LPC17xx.h.

__IO uint32_t MR3

Definition at line 293 of file LPC17xx.h.

__IO uint32_t PC

Definition at line 288 of file LPC17xx.h.

__IO uint32_t PR

Definition at line 287 of file LPC17xx.h.

uint32_t RESERVED0[2]

Definition at line 297 of file LPC17xx.h.

uint32_t RESERVED1[12]

Definition at line 299 of file LPC17xx.h.

__IO uint32_t TC

Definition at line 286 of file LPC17xx.h.

__IO uint32_t TCR

Definition at line 285 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_UART0_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_UART0_TypeDef Struct Reference
LPC17xx System

Universal Asynchronous Receiver Transmitter 0 (UART0) register structure definition. More...

#include <LPC17xx.h>

Data Fields

union {
__I uint8_t RBR
__O uint8_t THR
__IO uint8_t DLL
uint32_t RESERVED0
};
union {
__IO uint8_t DLM
__IO uint32_t IER
};
union {
__I uint32_t IIR
__O uint8_t FCR
};
__IO uint8_t | LCR
uint8_t | RESERVED1 [7]
__I uint8_t | LSR
uint8_t | RESERVED2 [7]
__IO uint8_t | SCR
uint8_t | RESERVED3 [3]
__IO uint32_t | ACR
__IO uint8_t | ICR
uint8_t | RESERVED4 [3]
__IO uint8_t | FDR
uint8_t | RESERVED5 [7]
__IO uint8_t | TER
uint8_t | RESERVED6 [39]
__I uint8_t | FIFOLVL

Detailed Description

Universal Asynchronous Receiver Transmitter 0 (UART0) register structure definition.

Definition at line 367 of file LPC17xx.h.

Field Documentation

union { ... }
union { ... }
union { ... }
__IO uint32_t ACR

Definition at line 389 of file LPC17xx.h.

__IO uint8_t DLL

Definition at line 372 of file LPC17xx.h.

__IO uint8_t DLM

Definition at line 376 of file LPC17xx.h.

__O uint8_t FCR

Definition at line 381 of file LPC17xx.h.

__IO uint8_t FDR

Definition at line 392 of file LPC17xx.h.

__I uint8_t FIFOLVL

Definition at line 396 of file LPC17xx.h.

__IO uint8_t ICR

Definition at line 390 of file LPC17xx.h.

__IO uint32_t IER

Definition at line 377 of file LPC17xx.h.

__I uint32_t IIR

Definition at line 380 of file LPC17xx.h.

__IO uint8_t LCR

Definition at line 383 of file LPC17xx.h.

__I uint8_t LSR

Definition at line 385 of file LPC17xx.h.

__I uint8_t RBR

Definition at line 370 of file LPC17xx.h.

uint32_t RESERVED0

Definition at line 373 of file LPC17xx.h.

uint8_t RESERVED1[7]

Definition at line 384 of file LPC17xx.h.

uint8_t RESERVED2[7]

Definition at line 386 of file LPC17xx.h.

uint8_t RESERVED3[3]

Definition at line 388 of file LPC17xx.h.

uint8_t RESERVED4[3]

Definition at line 391 of file LPC17xx.h.

uint8_t RESERVED5[7]

Definition at line 393 of file LPC17xx.h.

uint8_t RESERVED6[39]

Definition at line 395 of file LPC17xx.h.

__IO uint8_t SCR

Definition at line 387 of file LPC17xx.h.

__IO uint8_t TER

Definition at line 394 of file LPC17xx.h.

__O uint8_t THR

Definition at line 371 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_UART1_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_UART1_TypeDef Struct Reference
LPC17xx System

Universal Asynchronous Receiver Transmitter 1 (UART1) register structure definition. More...

#include <LPC17xx.h>

Data Fields

union {
__I uint8_t RBR
__O uint8_t THR
__IO uint8_t DLL
uint32_t RESERVED0
};
union {
__IO uint8_t DLM
__IO uint32_t IER
};
union {
__I uint32_t IIR
__O uint8_t FCR
};
__IO uint8_t | LCR
uint8_t | RESERVED1 [3]
__IO uint8_t | MCR
uint8_t | RESERVED2 [3]
__I uint8_t | LSR
uint8_t | RESERVED3 [3]
__I uint8_t | MSR
uint8_t | RESERVED4 [3]
__IO uint8_t | SCR
uint8_t | RESERVED5 [3]
__IO uint32_t | ACR
uint32_t | RESERVED6
__IO uint32_t | FDR
uint32_t | RESERVED7
__IO uint8_t | TER
uint8_t | RESERVED8 [27]
__IO uint8_t | RS485CTRL
uint8_t | RESERVED9 [3]
__IO uint8_t | ADRMATCH
uint8_t | RESERVED10 [3]
__IO uint8_t | RS485DLY
uint8_t | RESERVED11 [3]
__I uint8_t | FIFOLVL

Detailed Description

Universal Asynchronous Receiver Transmitter 1 (UART1) register structure definition.

Definition at line 400 of file LPC17xx.h.

Field Documentation

union { ... }
union { ... }
union { ... }
__IO uint32_t ACR

Definition at line 426 of file LPC17xx.h.

__IO uint8_t ADRMATCH

Definition at line 434 of file LPC17xx.h.

__IO uint8_t DLL

Definition at line 405 of file LPC17xx.h.

__IO uint8_t DLM

Definition at line 409 of file LPC17xx.h.

__O uint8_t FCR

Definition at line 414 of file LPC17xx.h.

__IO uint32_t FDR

Definition at line 428 of file LPC17xx.h.

__I uint8_t FIFOLVL

Definition at line 438 of file LPC17xx.h.

__IO uint32_t IER

Definition at line 410 of file LPC17xx.h.

__I uint32_t IIR

Definition at line 413 of file LPC17xx.h.

__IO uint8_t LCR

Definition at line 416 of file LPC17xx.h.

__I uint8_t LSR

Definition at line 420 of file LPC17xx.h.

__IO uint8_t MCR

Definition at line 418 of file LPC17xx.h.

__I uint8_t MSR

Definition at line 422 of file LPC17xx.h.

__I uint8_t RBR

Definition at line 403 of file LPC17xx.h.

uint32_t RESERVED0

Definition at line 406 of file LPC17xx.h.

uint8_t RESERVED1[3]

Definition at line 417 of file LPC17xx.h.

uint8_t RESERVED10[3]

Definition at line 435 of file LPC17xx.h.

uint8_t RESERVED11[3]

Definition at line 437 of file LPC17xx.h.

uint8_t RESERVED2[3]

Definition at line 419 of file LPC17xx.h.

uint8_t RESERVED3[3]

Definition at line 421 of file LPC17xx.h.

uint8_t RESERVED4[3]

Definition at line 423 of file LPC17xx.h.

uint8_t RESERVED5[3]

Definition at line 425 of file LPC17xx.h.

uint32_t RESERVED6

Definition at line 427 of file LPC17xx.h.

uint32_t RESERVED7

Definition at line 429 of file LPC17xx.h.

uint8_t RESERVED8[27]

Definition at line 431 of file LPC17xx.h.

uint8_t RESERVED9[3]

Definition at line 433 of file LPC17xx.h.

__IO uint8_t RS485CTRL

Definition at line 432 of file LPC17xx.h.

__IO uint8_t RS485DLY

Definition at line 436 of file LPC17xx.h.

__IO uint8_t SCR

Definition at line 424 of file LPC17xx.h.

__IO uint8_t TER

Definition at line 430 of file LPC17xx.h.

__O uint8_t THR

Definition at line 404 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_UART_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_UART_TypeDef Struct Reference
LPC17xx System

Universal Asynchronous Receiver Transmitter (UART) register structure definition. More...

#include <LPC17xx.h>

Data Fields

union {
__I uint8_t RBR
__O uint8_t THR
__IO uint8_t DLL
uint32_t RESERVED0
};
union {
__IO uint8_t DLM
__IO uint32_t IER
};
union {
__I uint32_t IIR
__O uint8_t FCR
};
__IO uint8_t | LCR
uint8_t | RESERVED1 [7]
__I uint8_t | LSR
uint8_t | RESERVED2 [7]
__IO uint8_t | SCR
uint8_t | RESERVED3 [3]
__IO uint32_t | ACR
__IO uint8_t | ICR
uint8_t | RESERVED4 [3]
__IO uint8_t | FDR
uint8_t | RESERVED5 [7]
__IO uint8_t | TER
uint8_t | RESERVED6 [39]
__I uint8_t | FIFOLVL

Detailed Description

Universal Asynchronous Receiver Transmitter (UART) register structure definition.

Definition at line 334 of file LPC17xx.h.

Field Documentation

union { ... }
union { ... }
union { ... }
__IO uint32_t ACR

Definition at line 356 of file LPC17xx.h.

__IO uint8_t DLL

Definition at line 339 of file LPC17xx.h.

__IO uint8_t DLM

Definition at line 343 of file LPC17xx.h.

__O uint8_t FCR

Definition at line 348 of file LPC17xx.h.

__IO uint8_t FDR

Definition at line 359 of file LPC17xx.h.

__I uint8_t FIFOLVL

Definition at line 363 of file LPC17xx.h.

__IO uint8_t ICR

Definition at line 357 of file LPC17xx.h.

__IO uint32_t IER

Definition at line 344 of file LPC17xx.h.

__I uint32_t IIR

Definition at line 347 of file LPC17xx.h.

__IO uint8_t LCR

Definition at line 350 of file LPC17xx.h.

__I uint8_t LSR

Definition at line 352 of file LPC17xx.h.

__I uint8_t RBR

Definition at line 337 of file LPC17xx.h.

uint32_t RESERVED0

Definition at line 340 of file LPC17xx.h.

uint8_t RESERVED1[7]

Definition at line 351 of file LPC17xx.h.

uint8_t RESERVED2[7]

Definition at line 353 of file LPC17xx.h.

uint8_t RESERVED3[3]

Definition at line 355 of file LPC17xx.h.

uint8_t RESERVED4[3]

Definition at line 358 of file LPC17xx.h.

uint8_t RESERVED5[7]

Definition at line 360 of file LPC17xx.h.

uint8_t RESERVED6[39]

Definition at line 362 of file LPC17xx.h.

__IO uint8_t SCR

Definition at line 354 of file LPC17xx.h.

__IO uint8_t TER

Definition at line 361 of file LPC17xx.h.

__O uint8_t THR

Definition at line 338 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_USB_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_USB_TypeDef Struct Reference
LPC17xx System

Universal Serial Bus (USB) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__I uint32_t | HcRevision
__IO uint32_t | HcControl
__IO uint32_t | HcCommandStatus
__IO uint32_t | HcInterruptStatus
__IO uint32_t | HcInterruptEnable
__IO uint32_t | HcInterruptDisable
__IO uint32_t | HcHCCA
__I uint32_t | HcPeriodCurrentED
__IO uint32_t | HcControlHeadED
__IO uint32_t | HcControlCurrentED
__IO uint32_t | HcBulkHeadED
__IO uint32_t | HcBulkCurrentED
__I uint32_t | HcDoneHead
__IO uint32_t | HcFmInterval
__I uint32_t | HcFmRemaining
__I uint32_t | HcFmNumber
__IO uint32_t | HcPeriodicStart
__IO uint32_t | HcLSTreshold
__IO uint32_t | HcRhDescriptorA
__IO uint32_t | HcRhDescriptorB
__IO uint32_t | HcRhStatus
__IO uint32_t | HcRhPortStatus1
__IO uint32_t | HcRhPortStatus2
uint32_t | RESERVED0 [40]
__I uint32_t | Module_ID
__I uint32_t | OTGIntSt
__IO uint32_t | OTGIntEn
__O uint32_t | OTGIntSet
__O uint32_t | OTGIntClr
__IO uint32_t | OTGStCtrl
__IO uint32_t | OTGTmr
uint32_t | RESERVED1 [58]
__I uint32_t | USBDevIntSt
__IO uint32_t | USBDevIntEn
__O uint32_t | USBDevIntClr
__O uint32_t | USBDevIntSet
__O uint32_t | USBCmdCode
__I uint32_t | USBCmdData
__I uint32_t | USBRxData
__O uint32_t | USBTxData
__I uint32_t | USBRxPLen
__O uint32_t | USBTxPLen
__IO uint32_t | USBCtrl
__O uint32_t | USBDevIntPri
__I uint32_t | USBEpIntSt
__IO uint32_t | USBEpIntEn
__O uint32_t | USBEpIntClr
__O uint32_t | USBEpIntSet
__O uint32_t | USBEpIntPri
__IO uint32_t | USBReEp
__O uint32_t | USBEpInd
__IO uint32_t | USBMaxPSize
__I uint32_t | USBDMARSt
__O uint32_t | USBDMARClr
__O uint32_t | USBDMARSet
uint32_t | RESERVED2 [9]
__IO uint32_t | USBUDCAH
__I uint32_t | USBEpDMASt
__O uint32_t | USBEpDMAEn
__O uint32_t | USBEpDMADis
__I uint32_t | USBDMAIntSt
__IO uint32_t | USBDMAIntEn
uint32_t | RESERVED3 [2]
__I uint32_t | USBEoTIntSt
__O uint32_t | USBEoTIntClr
__O uint32_t | USBEoTIntSet
__I uint32_t | USBNDDRIntSt
__O uint32_t | USBNDDRIntClr
__O uint32_t | USBNDDRIntSet
__I uint32_t | USBSysErrIntSt
__O uint32_t | USBSysErrIntClr
__O uint32_t | USBSysErrIntSet
uint32_t | RESERVED4 [15]
union {
__I uint32_t I2C_RX
__O uint32_t I2C_TX
};
__I uint32_t | I2C_STS
__IO uint32_t | I2C_CTL
__IO uint32_t | I2C_CLKHI
__O uint32_t | I2C_CLKLO
uint32_t | RESERVED5 [824]
union {
__IO uint32_t USBClkCtrl
__IO uint32_t OTGClkCtrl
};
union {
__I uint32_t USBClkSt
__I uint32_t OTGClkSt
};

Detailed Description

Universal Serial Bus (USB) register structure definition.

Definition at line 780 of file LPC17xx.h.

Field Documentation

union { ... }
union { ... }
union { ... }
__IO uint32_t HcBulkCurrentED

Definition at line 793 of file LPC17xx.h.

__IO uint32_t HcBulkHeadED

Definition at line 792 of file LPC17xx.h.

__IO uint32_t HcCommandStatus

Definition at line 784 of file LPC17xx.h.

__IO uint32_t HcControl

Definition at line 783 of file LPC17xx.h.

__IO uint32_t HcControlCurrentED

Definition at line 791 of file LPC17xx.h.

__IO uint32_t HcControlHeadED

Definition at line 790 of file LPC17xx.h.

__I uint32_t HcDoneHead

Definition at line 794 of file LPC17xx.h.

__IO uint32_t HcFmInterval

Definition at line 795 of file LPC17xx.h.

__I uint32_t HcFmNumber

Definition at line 797 of file LPC17xx.h.

__I uint32_t HcFmRemaining

Definition at line 796 of file LPC17xx.h.

__IO uint32_t HcHCCA

Definition at line 788 of file LPC17xx.h.

__IO uint32_t HcInterruptDisable

Definition at line 787 of file LPC17xx.h.

__IO uint32_t HcInterruptEnable

Definition at line 786 of file LPC17xx.h.

__IO uint32_t HcInterruptStatus

Definition at line 785 of file LPC17xx.h.

__IO uint32_t HcLSTreshold

Definition at line 799 of file LPC17xx.h.

__I uint32_t HcPeriodCurrentED

Definition at line 789 of file LPC17xx.h.

__IO uint32_t HcPeriodicStart

Definition at line 798 of file LPC17xx.h.

__I uint32_t HcRevision

Definition at line 782 of file LPC17xx.h.

__IO uint32_t HcRhDescriptorA

Definition at line 800 of file LPC17xx.h.

__IO uint32_t HcRhDescriptorB

Definition at line 801 of file LPC17xx.h.

__IO uint32_t HcRhPortStatus1

Definition at line 803 of file LPC17xx.h.

__IO uint32_t HcRhPortStatus2

Definition at line 804 of file LPC17xx.h.

__IO uint32_t HcRhStatus

Definition at line 802 of file LPC17xx.h.

__IO uint32_t I2C_CLKHI

Definition at line 869 of file LPC17xx.h.

__O uint32_t I2C_CLKLO

Definition at line 870 of file LPC17xx.h.

__IO uint32_t I2C_CTL

Definition at line 868 of file LPC17xx.h.

__I uint32_t I2C_RX

Definition at line 864 of file LPC17xx.h.

__I uint32_t I2C_STS

Definition at line 867 of file LPC17xx.h.

__O uint32_t I2C_TX

Definition at line 865 of file LPC17xx.h.

__I uint32_t Module_ID

Definition at line 806 of file LPC17xx.h.

__IO uint32_t OTGClkCtrl

Definition at line 875 of file LPC17xx.h.

__I uint32_t OTGClkSt

Definition at line 879 of file LPC17xx.h.

__O uint32_t OTGIntClr

Definition at line 811 of file LPC17xx.h.

__IO uint32_t OTGIntEn

Definition at line 809 of file LPC17xx.h.

__O uint32_t OTGIntSet

Definition at line 810 of file LPC17xx.h.

__I uint32_t OTGIntSt

Definition at line 808 of file LPC17xx.h.

__IO uint32_t OTGStCtrl

Definition at line 812 of file LPC17xx.h.

__IO uint32_t OTGTmr

Definition at line 813 of file LPC17xx.h.

uint32_t RESERVED0[40]

Definition at line 805 of file LPC17xx.h.

uint32_t RESERVED1[58]

Definition at line 814 of file LPC17xx.h.

uint32_t RESERVED2[9]

Definition at line 844 of file LPC17xx.h.

uint32_t RESERVED3[2]

Definition at line 851 of file LPC17xx.h.

uint32_t RESERVED4[15]

Definition at line 861 of file LPC17xx.h.

uint32_t RESERVED5[824]

Definition at line 871 of file LPC17xx.h.

__IO uint32_t USBClkCtrl

Definition at line 874 of file LPC17xx.h.

__I uint32_t USBClkSt

Definition at line 878 of file LPC17xx.h.

__O uint32_t USBCmdCode

Definition at line 821 of file LPC17xx.h.

__I uint32_t USBCmdData

Definition at line 822 of file LPC17xx.h.

__IO uint32_t USBCtrl

Definition at line 828 of file LPC17xx.h.

__O uint32_t USBDevIntClr

Definition at line 818 of file LPC17xx.h.

__IO uint32_t USBDevIntEn

Definition at line 817 of file LPC17xx.h.

__O uint32_t USBDevIntPri

Definition at line 829 of file LPC17xx.h.

__O uint32_t USBDevIntSet

Definition at line 819 of file LPC17xx.h.

__I uint32_t USBDevIntSt

Definition at line 816 of file LPC17xx.h.

__IO uint32_t USBDMAIntEn

Definition at line 850 of file LPC17xx.h.

__I uint32_t USBDMAIntSt

Definition at line 849 of file LPC17xx.h.

__O uint32_t USBDMARClr

Definition at line 842 of file LPC17xx.h.

__O uint32_t USBDMARSet

Definition at line 843 of file LPC17xx.h.

__I uint32_t USBDMARSt

Definition at line 841 of file LPC17xx.h.

__O uint32_t USBEoTIntClr

Definition at line 853 of file LPC17xx.h.

__O uint32_t USBEoTIntSet

Definition at line 854 of file LPC17xx.h.

__I uint32_t USBEoTIntSt

Definition at line 852 of file LPC17xx.h.

__O uint32_t USBEpDMADis

Definition at line 848 of file LPC17xx.h.

__O uint32_t USBEpDMAEn

Definition at line 847 of file LPC17xx.h.

__I uint32_t USBEpDMASt

Definition at line 846 of file LPC17xx.h.

__O uint32_t USBEpInd

Definition at line 838 of file LPC17xx.h.

__O uint32_t USBEpIntClr

Definition at line 833 of file LPC17xx.h.

__IO uint32_t USBEpIntEn

Definition at line 832 of file LPC17xx.h.

__O uint32_t USBEpIntPri

Definition at line 835 of file LPC17xx.h.

__O uint32_t USBEpIntSet

Definition at line 834 of file LPC17xx.h.

__I uint32_t USBEpIntSt

Definition at line 831 of file LPC17xx.h.

__IO uint32_t USBMaxPSize

Definition at line 839 of file LPC17xx.h.

__O uint32_t USBNDDRIntClr

Definition at line 856 of file LPC17xx.h.

__O uint32_t USBNDDRIntSet

Definition at line 857 of file LPC17xx.h.

__I uint32_t USBNDDRIntSt

Definition at line 855 of file LPC17xx.h.

__IO uint32_t USBReEp

Definition at line 837 of file LPC17xx.h.

__I uint32_t USBRxData

Definition at line 824 of file LPC17xx.h.

__I uint32_t USBRxPLen

Definition at line 826 of file LPC17xx.h.

__O uint32_t USBSysErrIntClr

Definition at line 859 of file LPC17xx.h.

__O uint32_t USBSysErrIntSet

Definition at line 860 of file LPC17xx.h.

__I uint32_t USBSysErrIntSt

Definition at line 858 of file LPC17xx.h.

__O uint32_t USBTxData

Definition at line 825 of file LPC17xx.h.

__O uint32_t USBTxPLen

Definition at line 827 of file LPC17xx.h.

__IO uint32_t USBUDCAH

Definition at line 845 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: LPC_WDT_TypeDef Struct Reference

  • Data Fields
Data Fields
LPC_WDT_TypeDef Struct Reference
LPC17xx System

Watchdog Timer (WDT) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint8_t | WDMOD
uint8_t | RESERVED0 [3]
__IO uint32_t | WDTC
__O uint8_t | WDFEED
uint8_t | RESERVED1 [3]
__I uint32_t | WDTV
__IO uint32_t | WDCLKSEL

Detailed Description

Watchdog Timer (WDT) register structure definition.

Definition at line 583 of file LPC17xx.h.

Field Documentation

uint8_t RESERVED0[3]

Definition at line 586 of file LPC17xx.h.

uint8_t RESERVED1[3]

Definition at line 589 of file LPC17xx.h.

__IO uint32_t WDCLKSEL

Definition at line 591 of file LPC17xx.h.

__O uint8_t WDFEED

Definition at line 588 of file LPC17xx.h.

__IO uint8_t WDMOD

Definition at line 585 of file LPC17xx.h.

__IO uint32_t WDTC

Definition at line 587 of file LPC17xx.h.

__I uint32_t WDTV

Definition at line 590 of file LPC17xx.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Generated on Mon Nov 28 2011 11:15:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MCPWM_CAPTURE_CFG_Type Struct Reference

  • Data Fields
Data Fields
MCPWM_CAPTURE_CFG_Type Struct Reference
MCPWM Public Types

MCPWM Capture Configuration type definition. More...

#include <lpc17xx_mcpwm.h>

Data Fields

uint32_t | captureChannel
uint32_t | captureRising
uint32_t | captureFalling
uint32_t | timerReset
uint32_t | hnfEnable

Detailed Description

MCPWM Capture Configuration type definition.

Definition at line 242 of file lpc17xx_mcpwm.h.

Field Documentation

uint32_t captureChannel

Capture Channel Number, should be in range from 0 to 2

Definition at line 243 of file lpc17xx_mcpwm.h.

uint32_t captureFalling

Enable/Disable Capture on Falling Edge event, should be:

  • ENABLE.
  • DISABLE.

Definition at line 248 of file lpc17xx_mcpwm.h.

uint32_t captureRising

Enable/Disable Capture on Rising Edge event, should be:

  • ENABLE.
  • DISABLE.

Definition at line 244 of file lpc17xx_mcpwm.h.

uint32_t hnfEnable

Enable/Disable Hardware noise filter function, should be:

  • ENABLE.
  • DISABLE.

Definition at line 256 of file lpc17xx_mcpwm.h.

uint32_t timerReset

Enable/Disable Timer reset function an capture, should be:

  • ENABLE.
  • DISABLE.

Definition at line 252 of file lpc17xx_mcpwm.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_mcpwm.h
Generated on Mon Nov 28 2011 11:15:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MCPWM_CHANNEL_CFG_Type Struct Reference

  • Data Fields
Data Fields
MCPWM_CHANNEL_CFG_Type Struct Reference
MCPWM Public Types

Motor Control PWM Channel Configuration structure type definition. More...

#include <lpc17xx_mcpwm.h>

Data Fields

uint32_t | channelType
uint32_t | channelPolarity
uint32_t | channelDeadtimeEnable
uint32_t | channelDeadtimeValue
uint32_t | channelUpdateEnable
uint32_t | channelTimercounterValue
uint32_t | channelPeriodValue
uint32_t | channelPulsewidthValue

Detailed Description

Motor Control PWM Channel Configuration structure type definition.

Definition at line 214 of file lpc17xx_mcpwm.h.

Field Documentation

uint32_t channelDeadtimeEnable

Enable/Disable DeadTime function for channel, should be:

  • ENABLE.
  • DISABLE.

Definition at line 224 of file lpc17xx_mcpwm.h.

uint32_t channelDeadtimeValue

DeadTime value, should be less than 0x3FF

Definition at line 228 of file lpc17xx_mcpwm.h.

uint32_t channelPeriodValue

MCPWM Period value

Definition at line 235 of file lpc17xx_mcpwm.h.

uint32_t channelPolarity

Polarity of the MCOA and MCOB pins, should be:

  • MCPWM_CHANNEL_PASSIVE_LO: Passive state is LOW, active state is HIGH
  • MCPWM_CHANNEL_PASSIVE_HI: Passive state is HIGH, active state is LOW

Definition at line 220 of file lpc17xx_mcpwm.h.

uint32_t channelPulsewidthValue

MCPWM Pulse Width value

Definition at line 236 of file lpc17xx_mcpwm.h.

uint32_t channelTimercounterValue

MCPWM Timer Counter value

Definition at line 234 of file lpc17xx_mcpwm.h.

uint32_t channelType

Edge/center aligned mode for this channel, should be:

  • MCPWM_CHANNEL_EDGE_MODE: Channel is in Edge mode
  • MCPWM_CHANNEL_CENTER_MODE: Channel is in Center mode

Definition at line 215 of file lpc17xx_mcpwm.h.

uint32_t channelUpdateEnable

Enable/Disable updates of functional registers, should be:

  • ENABLE.
  • DISABLE.

Definition at line 229 of file lpc17xx_mcpwm.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_mcpwm.h
Generated on Mon Nov 28 2011 11:15:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: MCPWM_COUNT_CFG_Type Struct Reference

  • Data Fields
Data Fields
MCPWM_COUNT_CFG_Type Struct Reference
MCPWM Public Types

MCPWM Count Control Configuration type definition. More...

#include <lpc17xx_mcpwm.h>

Data Fields

uint32_t | counterChannel
uint32_t | countRising
uint32_t | countFalling

Detailed Description

MCPWM Count Control Configuration type definition.

Definition at line 266 of file lpc17xx_mcpwm.h.

Field Documentation

uint32_t counterChannel

Counter Channel Number, should be in range from 0 to 2

Definition at line 267 of file lpc17xx_mcpwm.h.

uint32_t countFalling

Enable/Disable Capture on Falling Edge event, should be:

  • ENABLE.
  • DISABLE.

Definition at line 272 of file lpc17xx_mcpwm.h.

uint32_t countRising

Enable/Disable Capture on Rising Edge event, should be:

  • ENABLE.
  • DISABLE.

Definition at line 268 of file lpc17xx_mcpwm.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_mcpwm.h
Generated on Mon Nov 28 2011 11:15:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: namemap Struct Reference

  • Data Fields
Data Fields
namemap Struct Reference
DNS resolver

Data Fields

u8_t state
u8_t tmr
u8_t retries
u8_t seqno
u8_t err
char name [32]
uip_ipaddr_t ipaddr

Detailed Description

Definition at line 111 of file resolv.c.

Field Documentation

u8_t err

Definition at line 121 of file resolv.c.

uip_ipaddr_t ipaddr

Definition at line 123 of file resolv.c.

char name[32]

Definition at line 122 of file resolv.c.

u8_t retries

Definition at line 119 of file resolv.c.

u8_t seqno

Definition at line 120 of file resolv.c.

u8_t state

Definition at line 117 of file resolv.c.

u8_t tmr

Definition at line 118 of file resolv.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.c
Generated on Mon Nov 28 2011 11:15:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: neighbor_entry Struct Reference

  • Data Fields
Data Fields
neighbor_entry Struct Reference

Data Fields

uip_ipaddr_t ipaddr
struct uip_neighbor_addr addr
u8_t time

Detailed Description

Definition at line 55 of file uip-neighbor.c.

Field Documentation

struct uip_neighbor_addr addr

Definition at line 57 of file uip-neighbor.c.

uip_ipaddr_t ipaddr

Definition at line 56 of file uip-neighbor.c.

u8_t time

Definition at line 58 of file uip-neighbor.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.c
Generated on Mon Nov 28 2011 11:15:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: NVIC_Type Struct Reference

  • Data Fields
Data Fields
NVIC_Type Struct Reference
CMSIS NVIC

Structure type to access the Nested Vectored Interrupt Controller (NVIC). More...

#include <core_cm3.h>

Data Fields

__IO uint32_t | ISER [8]
uint32_t | RESERVED0 [24]
__IO uint32_t | ICER [8]
uint32_t | RSERVED1 [24]
__IO uint32_t | ISPR [8]
uint32_t | RESERVED2 [24]
__IO uint32_t | ICPR [8]
uint32_t | RESERVED3 [24]
__IO uint32_t | IABR [8]
uint32_t | RESERVED4 [56]
__IO uint8_t | IP [240]
uint32_t | RESERVED5 [644]
__O uint32_t | STIR

Detailed Description

Structure type to access the Nested Vectored Interrupt Controller (NVIC).

Definition at line 264 of file core_cm3.h.

Field Documentation

__IO uint32_t IABR[8]

Offset: 0x200 (R/W) Interrupt Active bit Register

Definition at line 274 of file core_cm3.h.

__IO uint32_t ICER[8]

Offset: 0x080 (R/W) Interrupt Clear Enable Register

Definition at line 268 of file core_cm3.h.

__IO uint32_t ICPR[8]

Offset: 0x180 (R/W) Interrupt Clear Pending Register

Definition at line 272 of file core_cm3.h.

__IO uint8_t IP[240]

Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide)

Definition at line 276 of file core_cm3.h.

__IO uint32_t ISER[8]

Offset: 0x000 (R/W) Interrupt Set Enable Register

Definition at line 266 of file core_cm3.h.

__IO uint32_t ISPR[8]

Offset: 0x100 (R/W) Interrupt Set Pending Register

Definition at line 270 of file core_cm3.h.

uint32_t RESERVED0[24]

Definition at line 267 of file core_cm3.h.

uint32_t RESERVED2[24]

Definition at line 271 of file core_cm3.h.

uint32_t RESERVED3[24]

Definition at line 273 of file core_cm3.h.

uint32_t RESERVED4[56]

Definition at line 275 of file core_cm3.h.

uint32_t RESERVED5[644]

Definition at line 277 of file core_cm3.h.

uint32_t RSERVED1[24]

Definition at line 269 of file core_cm3.h.

__O uint32_t STIR

Offset: 0xE00 ( /W) Software Trigger Interrupt Register

Definition at line 278 of file core_cm3.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cm3.h
Generated on Mon Nov 28 2011 11:15:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PINSEL_CFG_Type Struct Reference

  • Data Fields
Data Fields
PINSEL_CFG_Type Struct Reference
PINSEL Public Types

Pin configuration structure. More...

#include <lpc17xx_pinsel.h>

Data Fields

uint8_t | Portnum
uint8_t | Pinnum
uint8_t | Funcnum
uint8_t | Pinmode
uint8_t | OpenDrain

Detailed Description

Pin configuration structure.

Definition at line 149 of file lpc17xx_pinsel.h.

Field Documentation

uint8_t Funcnum

Function Number, should be PINSEL_FUNC_x, where x should be in range from 0 to 3

Definition at line 155 of file lpc17xx_pinsel.h.

uint8_t OpenDrain

OpenDrain mode, should be:

  • PINSEL_PINMODE_NORMAL: Pin is in the normal (not open drain) mode
  • PINSEL_PINMODE_OPENDRAIN: Pin is in the open drain mode

Definition at line 161 of file lpc17xx_pinsel.h.

uint8_t Pinmode

Pin Mode, should be:

  • PINSEL_PINMODE_PULLUP: Internal pull-up resistor
  • PINSEL_PINMODE_TRISTATE: Tri-state
  • PINSEL_PINMODE_PULLDOWN: Internal pull-down resistor

Definition at line 157 of file lpc17xx_pinsel.h.

uint8_t Pinnum

Pin Number, should be PINSEL_PIN_x, where x should be in range from 0 to 31

Definition at line 153 of file lpc17xx_pinsel.h.

uint8_t Portnum

Port Number, should be PINSEL_PORT_x, where x should be in range from 0 to 4

Definition at line 151 of file lpc17xx_pinsel.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pinsel.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: psock Struct Reference

  • Data Fields
Data Fields
psock Struct Reference
Protosockets library

#include <psock.h>

Data Fields

struct pt pt | psockpt
const u8_t * | sendptr
u8_t * readptr
char * | bufptr
u16_t sendlen
u16_t readlen
struct psock_buf | buf
unsigned int | bufsize
unsigned char | state

Detailed Description

The representation of a protosocket.

The protosocket structrure is an opaque structure with no user-visible elements.

Definition at line 110 of file psock.h.

Field Documentation

struct pt pt psockpt

Definition at line 111 of file psock.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: psock_buf Struct Reference

  • Data Fields
Data Fields
psock_buf Struct Reference
Protosockets library

#include <psock.h>

Data Fields

u8_t * ptr
unsigned short left

Detailed Description

Definition at line 99 of file psock.h.

Field Documentation

u8_t* ptr

Definition at line 100 of file psock.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: pt Struct Reference

  • Data Fields
Data Fields
pt Struct Reference
Pt

#include <pt.h>

Data Fields

lc_t lc

Detailed Description

Definition at line 54 of file pt.h.

Field Documentation

lc_t lc

Definition at line 55 of file pt.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/pt.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: ptentry Struct Reference

  • Data Fields
Data Fields
ptentry Struct Reference

Data Fields

char * | commandstr
void(* | pfunc )(char *str)

Detailed Description

Definition at line 39 of file shell.c.

Field Documentation

char* commandstr

Definition at line 40 of file shell.c.

void(* pfunc)(char *str)

Definition at line 41 of file shell.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.c
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWM_CAPTURECFG_Type Struct Reference

  • Data Fields
Data Fields
PWM_CAPTURECFG_Type Struct Reference
PWM Public Types

PWM Capture Input configuration structure. More...

#include <lpc17xx_pwm.h>

Data Fields

uint8_t | CaptureChannel
uint8_t | RisingEdge
uint8_t | FallingEdge
uint8_t | IntOnCaption

Detailed Description

PWM Capture Input configuration structure.

Definition at line 202 of file lpc17xx_pwm.h.

Field Documentation

uint8_t CaptureChannel

Capture channel, should be in range from 0..1

Definition at line 203 of file lpc17xx_pwm.h.

uint8_t FallingEdge

caption falling edge, should be:

  • ENABLE: Enable falling edge.
  • DISABLE: Disable this function.

Definition at line 209 of file lpc17xx_pwm.h.

uint8_t IntOnCaption

Interrupt On caption, should be:

  • ENABLE: Enable interrupt function.
  • DISABLE: Disable this function.

Definition at line 213 of file lpc17xx_pwm.h.

uint8_t RisingEdge

caption rising edge, should be:

  • ENABLE: Enable rising edge.
  • DISABLE: Disable this function.

Definition at line 205 of file lpc17xx_pwm.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pwm.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWM_COUNTERCFG_Type Struct Reference

  • Data Fields
Data Fields
PWM_COUNTERCFG_Type Struct Reference
PWM Public Types

Configuration structure in PWM COUNTER mode. More...

#include <lpc17xx_pwm.h>

Data Fields

uint8_t | CounterOption
uint8_t | CountInputSelect
uint8_t | Reserved [2]

Detailed Description

Configuration structure in PWM COUNTER mode.

Definition at line 168 of file lpc17xx_pwm.h.

Field Documentation

uint8_t CounterOption

Counter Option, should be:

  • PWM_COUNTER_RISING: Rising Edge
  • PWM_COUNTER_FALLING: Falling Edge
  • PWM_COUNTER_ANY: Both rising and falling mode

Definition at line 170 of file lpc17xx_pwm.h.

uint8_t CountInputSelect

Counter input select, should be:

  • PWM_COUNTER_PCAP1_0: PWM Counter input selected is PCAP1.0 pin
  • PWM_COUNTER_PCAP1_1: PWM Counter input selected is PCAP1.1 pin

Definition at line 175 of file lpc17xx_pwm.h.

uint8_t Reserved[2]

Definition at line 179 of file lpc17xx_pwm.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pwm.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWM_Match_T Struct Reference

  • Data Fields
Data Fields
PWM_Match_T Struct Reference
PWM Public Types

Match update structure. More...

#include <lpc17xx_pwm.h>

Data Fields

uint32_t Matchvalue
FlagStatus Status

Detailed Description

Match update structure.

Definition at line 295 of file lpc17xx_pwm.h.

Field Documentation

uint32_t Matchvalue

Definition at line 297 of file lpc17xx_pwm.h.

FlagStatus Status

Definition at line 298 of file lpc17xx_pwm.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pwm.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWM_MATCHCFG_Type Struct Reference

  • Data Fields
Data Fields
PWM_MATCHCFG_Type Struct Reference
PWM Public Types

PWM Match channel configuration structure. More...

#include <lpc17xx_pwm.h>

Data Fields

uint8_t | MatchChannel
uint8_t | IntOnMatch
uint8_t | StopOnMatch
uint8_t | ResetOnMatch

Detailed Description

PWM Match channel configuration structure.

Definition at line 183 of file lpc17xx_pwm.h.

Field Documentation

uint8_t IntOnMatch

Interrupt On match, should be:

  • ENABLE: Enable this function.
  • DISABLE: Disable this function.

Definition at line 186 of file lpc17xx_pwm.h.

uint8_t MatchChannel

Match channel, should be in range from 0..6

Definition at line 184 of file lpc17xx_pwm.h.

uint8_t ResetOnMatch

Reset On match, should be:

  • ENABLE: Enable this function.
  • DISABLE: Disable this function.

Definition at line 194 of file lpc17xx_pwm.h.

uint8_t StopOnMatch

Stop On match, should be:

  • ENABLE: Enable this function.
  • DISABLE: Disable this function.

Definition at line 190 of file lpc17xx_pwm.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pwm.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: PWM_TIMERCFG_Type Struct Reference

  • Data Fields
Data Fields
PWM_TIMERCFG_Type Struct Reference
PWM Public Types

Configuration structure in PWM TIMER mode. More...

#include <lpc17xx_pwm.h>

Data Fields

uint8_t | PrescaleOption
uint8_t | Reserved [3]
uint32_t | PrescaleValue

Detailed Description

Configuration structure in PWM TIMER mode.

Definition at line 155 of file lpc17xx_pwm.h.

Field Documentation

uint8_t PrescaleOption

Prescale option, should be:

  • PWM_TIMER_PRESCALE_TICKVAL: Prescale in absolute value
  • PWM_TIMER_PRESCALE_USVAL: Prescale in microsecond value

Definition at line 157 of file lpc17xx_pwm.h.

uint32_t PrescaleValue

Prescale value, 32-bit long, should be matched with PrescaleOption

Definition at line 162 of file lpc17xx_pwm.h.

uint8_t Reserved[3]

Definition at line 161 of file lpc17xx_pwm.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pwm.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI_CFG_Type Struct Reference

  • Data Fields
Data Fields
QEI_CFG_Type Struct Reference
QEI Public Types

QEI Configuration structure type definition. More...

#include <lpc17xx_qei.h>

Data Fields

uint32_t | DirectionInvert:1
uint32_t | SignalMode:1
uint32_t | CaptureMode:1
uint32_t | InvertIndex:1

Detailed Description

QEI Configuration structure type definition.

Definition at line 334 of file lpc17xx_qei.h.

Field Documentation

uint32_t CaptureMode

Capture Mode Option:

  • QEI_CAPMODE_2X: Only Phase-A edges are counted (2X)
  • QEI_CAPMODE_4X: BOTH Phase-A and Phase-B edges are counted (4X)

Definition at line 343 of file lpc17xx_qei.h.

uint32_t DirectionInvert

Direction invert option:

  • QEI_DIRINV_NONE: QEI Direction is normal
  • QEI_DIRINV_CMPL: QEI Direction is complemented

Definition at line 335 of file lpc17xx_qei.h.

uint32_t InvertIndex

Invert Index Option:

  • QEI_INVINX_NONE: the sense of the index input is normal
  • QEI_INVINX_EN: inverts the sense of the index input

Definition at line 347 of file lpc17xx_qei.h.

uint32_t SignalMode

Signal mode Option:

  • QEI_SIGNALMODE_QUAD: Signal is in Quadrature phase mode
  • QEI_SIGNALMODE_CLKDIR: Signal is in Clock/Direction mode

Definition at line 339 of file lpc17xx_qei.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_qei.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI_CFGOPT_Type Union Reference

  • Data Fields
Data Fields
QEI_CFGOPT_Type Union Reference
QEI Private Types

QEI configuration union type definition. More...

Data Fields

QEI_CFG_Type bmQEIConfig
uint32_t ulQEIConfig

Detailed Description

QEI configuration union type definition.

Definition at line 57 of file lpc17xx_qei.c.

Field Documentation

QEI_CFG_Type bmQEIConfig

Definition at line 58 of file lpc17xx_qei.c.

uint32_t ulQEIConfig

Definition at line 59 of file lpc17xx_qei.c.

The documentation for this union was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_qei.c
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: QEI_RELOADCFG_Type Struct Reference

  • Data Fields
Data Fields
QEI_RELOADCFG_Type Struct Reference
QEI Public Types

Timer Reload Configuration structure type definition. More...

#include <lpc17xx_qei.h>

Data Fields

uint8_t | ReloadOption
uint8_t | Reserved [3]
uint32_t | ReloadValue

Detailed Description

Timer Reload Configuration structure type definition.

Definition at line 356 of file lpc17xx_qei.h.

Field Documentation

uint8_t ReloadOption

Velocity Timer Reload Option, should be:

  • QEI_TIMERRELOAD_TICKVAL: Reload value in absolute value
  • QEI_TIMERRELOAD_USVAL: Reload value in microsecond value

Definition at line 358 of file lpc17xx_qei.h.

uint32_t ReloadValue

Velocity Timer Reload Value, 32-bit long, should be matched with Velocity Timer Reload Option

Definition at line 363 of file lpc17xx_qei.h.

uint8_t Reserved[3]

Definition at line 362 of file lpc17xx_qei.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_qei.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RTC_TIME_Type Struct Reference

  • Data Fields
Data Fields
RTC_TIME_Type Struct Reference
RTC Public Types

Time structure definitions for easy manipulate the data. More...

#include <lpc17xx_rtc.h>

Data Fields

uint32_t | SEC
uint32_t | MIN
uint32_t | HOUR
uint32_t | DOM
uint32_t | DOW
uint32_t | DOY
uint32_t | MONTH
uint32_t | YEAR

Detailed Description

Time structure definitions for easy manipulate the data.

Definition at line 230 of file lpc17xx_rtc.h.

Field Documentation

uint32_t DOM

Day of Month Register

Definition at line 234 of file lpc17xx_rtc.h.

uint32_t DOW

Day of Week Register

Definition at line 235 of file lpc17xx_rtc.h.

uint32_t DOY

Day of Year Register

Definition at line 236 of file lpc17xx_rtc.h.

uint32_t HOUR

Hours Register

Definition at line 233 of file lpc17xx_rtc.h.

uint32_t MIN

Minutes Register

Definition at line 232 of file lpc17xx_rtc.h.

uint32_t MONTH

Months Register

Definition at line 237 of file lpc17xx_rtc.h.

uint32_t SEC

Seconds Register

Definition at line 231 of file lpc17xx_rtc.h.

uint32_t YEAR

Years Register

Definition at line 238 of file lpc17xx_rtc.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rtc.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RX_Desc Struct Reference

  • Data Fields
Data Fields
RX_Desc Struct Reference
EMAC Public Types

RX Descriptor structure type definition. More...

#include <lpc17xx_emac.h>

Data Fields

uint32_t | Packet
uint32_t | Ctrl

Detailed Description

RX Descriptor structure type definition.

Definition at line 597 of file lpc17xx_emac.h.

Field Documentation

uint32_t Ctrl

Receive Control Descriptor

Definition at line 599 of file lpc17xx_emac.h.

uint32_t Packet

Receive Packet Descriptor

Definition at line 598 of file lpc17xx_emac.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: RX_Stat Struct Reference

  • Data Fields
Data Fields
RX_Stat Struct Reference
EMAC Public Types

RX Status structure type definition. More...

#include <lpc17xx_emac.h>

Data Fields

uint32_t | Info
uint32_t | HashCRC

Detailed Description

RX Status structure type definition.

Definition at line 605 of file lpc17xx_emac.h.

Field Documentation

uint32_t HashCRC

Receive Hash CRC Status

Definition at line 607 of file lpc17xx_emac.h.

uint32_t Info

Receive Information Status

Definition at line 606 of file lpc17xx_emac.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SCB_Type Struct Reference

  • Data Fields
Data Fields
SCB_Type Struct Reference
CMSIS SCB

Structure type to access the System Control Block (SCB). More...

#include <core_cm3.h>

Data Fields

__I uint32_t | CPUID
__IO uint32_t | ICSR
__IO uint32_t | VTOR
__IO uint32_t | AIRCR
__IO uint32_t | SCR
__IO uint32_t | CCR
__IO uint8_t | SHP [12]
__IO uint32_t | SHCSR
__IO uint32_t | CFSR
__IO uint32_t | HFSR
__IO uint32_t | DFSR
__IO uint32_t | MMFAR
__IO uint32_t | BFAR
__IO uint32_t | AFSR
__I uint32_t | PFR [2]
__I uint32_t | DFR
__I uint32_t | ADR
__I uint32_t | MMFR [4]
__I uint32_t | ISAR [5]
uint32_t | RESERVED0 [5]
__IO uint32_t | CPACR

Detailed Description

Structure type to access the System Control Block (SCB).

Definition at line 296 of file core_cm3.h.

Field Documentation

__I uint32_t ADR

Offset: 0x04C (R/ ) Auxiliary Feature Register

Definition at line 314 of file core_cm3.h.

__IO uint32_t AFSR

Offset: 0x03C (R/W) Auxiliary Fault Status Register

Definition at line 311 of file core_cm3.h.

__IO uint32_t AIRCR

Offset: 0x00C (R/W) Application Interrupt and Reset Control Register

Definition at line 301 of file core_cm3.h.

__IO uint32_t BFAR

Offset: 0x038 (R/W) BusFault Address Register

Definition at line 310 of file core_cm3.h.

__IO uint32_t CCR

Offset: 0x014 (R/W) Configuration Control Register

Definition at line 303 of file core_cm3.h.

__IO uint32_t CFSR

Offset: 0x028 (R/W) Configurable Fault Status Register

Definition at line 306 of file core_cm3.h.

__IO uint32_t CPACR

Offset: 0x088 (R/W) Coprocessor Access Control Register

Definition at line 318 of file core_cm3.h.

__I uint32_t CPUID

Offset: 0x000 (R/ ) CPUID Base Register

Definition at line 298 of file core_cm3.h.

__I uint32_t DFR

Offset: 0x048 (R/ ) Debug Feature Register

Definition at line 313 of file core_cm3.h.

__IO uint32_t DFSR

Offset: 0x030 (R/W) Debug Fault Status Register

Definition at line 308 of file core_cm3.h.

__IO uint32_t HFSR

Offset: 0x02C (R/W) HardFault Status Register

Definition at line 307 of file core_cm3.h.

__IO uint32_t ICSR

Offset: 0x004 (R/W) Interrupt Control and State Register

Definition at line 299 of file core_cm3.h.

__I uint32_t ISAR[5]

Offset: 0x060 (R/ ) Instruction Set Attributes Register

Definition at line 316 of file core_cm3.h.

__IO uint32_t MMFAR

Offset: 0x034 (R/W) MemManage Fault Address Register

Definition at line 309 of file core_cm3.h.

__I uint32_t MMFR[4]

Offset: 0x050 (R/ ) Memory Model Feature Register

Definition at line 315 of file core_cm3.h.

__I uint32_t PFR[2]

Offset: 0x040 (R/ ) Processor Feature Register

Definition at line 312 of file core_cm3.h.

uint32_t RESERVED0[5]

Definition at line 317 of file core_cm3.h.

__IO uint32_t SCR

Offset: 0x010 (R/W) System Control Register

Definition at line 302 of file core_cm3.h.

__IO uint32_t SHCSR

Offset: 0x024 (R/W) System Handler Control and State Register

Definition at line 305 of file core_cm3.h.

__IO uint8_t SHP[12]

Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15)

Definition at line 304 of file core_cm3.h.

__IO uint32_t VTOR

Offset: 0x008 (R/W) Vector Table Offset Register

Definition at line 300 of file core_cm3.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cm3.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SCnSCB_Type Struct Reference

  • Data Fields
Data Fields
SCnSCB_Type Struct Reference
CMSIS System Control and ID Register not in the SCB

Structure type to access the System Control and ID Register not in the SCB. More...

#include <core_cm3.h>

Data Fields

uint32_t | RESERVED0 [1]
__I uint32_t | ICTR
uint32_t | RESERVED1 [1]

Detailed Description

Structure type to access the System Control and ID Register not in the SCB.

Definition at line 513 of file core_cm3.h.

Field Documentation

__I uint32_t ICTR

Offset: 0x004 (R/ ) Interrupt Controller Type Register

Definition at line 516 of file core_cm3.h.

uint32_t RESERVED0[1]

Definition at line 515 of file core_cm3.h.

uint32_t RESERVED1[1]

Definition at line 520 of file core_cm3.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cm3.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SFF_Entry Struct Reference

  • Data Fields
Data Fields
SFF_Entry Struct Reference
CAN Public Types

Standard ID Frame Format Entry structure. More...

#include <lpc17xx_can.h>

Data Fields

uint8_t | controller
uint8_t | disable
uint16_t | id_11

Detailed Description

Standard ID Frame Format Entry structure.

Definition at line 724 of file lpc17xx_can.h.

Field Documentation

uint8_t controller

CAN Controller, should be:

  • CAN1_CTRL: CAN1 Controller
  • CAN2_CTRL: CAN2 Controller

Definition at line 725 of file lpc17xx_can.h.

uint8_t disable

Disable bit, should be:

  • MSG_ENABLE: disable bit = 0
  • MSG_DISABLE: disable bit = 1

Definition at line 729 of file lpc17xx_can.h.

uint16_t id_11

Standard ID, should be 11-bit value

Definition at line 733 of file lpc17xx_can.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SFF_GPR_Entry Struct Reference

  • Data Fields
Data Fields
SFF_GPR_Entry Struct Reference
CAN Public Types

Group of Standard ID Frame Format Entry structure. More...

#include <lpc17xx_can.h>

Data Fields

uint8_t | controller1
uint8_t | disable1
uint16_t | lowerID
uint8_t | controller2
uint8_t | disable2
uint16_t | upperID

Detailed Description

Group of Standard ID Frame Format Entry structure.

Definition at line 739 of file lpc17xx_can.h.

Field Documentation

uint8_t controller1

First CAN Controller, should be:

  • CAN1_CTRL: CAN1 Controller
  • CAN2_CTRL: CAN2 Controller

Definition at line 740 of file lpc17xx_can.h.

uint8_t controller2

Second CAN Controller, should be:

  • CAN1_CTRL: CAN1 Controller
  • CAN2_CTRL: CAN2 Controller

Definition at line 749 of file lpc17xx_can.h.

uint8_t disable1

First Disable bit, should be:

  • MSG_ENABLE: disable bit = 0)
  • MSG_DISABLE: disable bit = 1

Definition at line 744 of file lpc17xx_can.h.

uint8_t disable2

Second Disable bit, should be:

  • MSG_ENABLE: disable bit = 0
  • MSG_DISABLE: disable bit = 1

Definition at line 753 of file lpc17xx_can.h.

uint16_t lowerID

ID lower bound, should be 11-bit value

Definition at line 748 of file lpc17xx_can.h.

uint16_t upperID

ID upper bound, should be 11-bit value and equal or greater than lowerID

Definition at line 757 of file lpc17xx_can.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: smtp_state Struct Reference

  • Data Fields
Data Fields
smtp_state Struct Reference
SMTP E-mail sender

#include <smtp.h>

Data Fields

u8_t state
char * | to
char * | from
char * | subject
char * | msg
u16_t msglen
u16_t sentlen
u16_t textlen
u16_t sendptr

Detailed Description

Definition at line 81 of file smtp.h.

Field Documentation

char* from

Definition at line 84 of file smtp.h.

char* msg

Definition at line 86 of file smtp.h.

u16_t msglen

Definition at line 87 of file smtp.h.

u16_t sendptr

Definition at line 90 of file smtp.h.

u16_t sentlen

Definition at line 89 of file smtp.h.

u8_t state

Definition at line 82 of file smtp.h.

char* subject

Definition at line 85 of file smtp.h.

u16_t textlen

Definition at line 89 of file smtp.h.

char* to

Definition at line 83 of file smtp.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SPI_CFG_Type Struct Reference

  • Data Fields
Data Fields
SPI_CFG_Type Struct Reference
SPI Public Types

SPI configuration structure. More...

#include <lpc17xx_spi.h>

Data Fields

uint32_t | Databit
uint32_t | CPHA
uint32_t | CPOL
uint32_t | Mode
uint32_t | DataOrder
uint32_t | ClockRate

Detailed Description

SPI configuration structure.

Definition at line 238 of file lpc17xx_spi.h.

Field Documentation

uint32_t ClockRate

Data order, should be:

  • SPI_DATA_MSB_FIRST: MSB first
  • SPI_DATA_LSB_FIRST: LSB first

Definition at line 253 of file lpc17xx_spi.h.

uint32_t CPHA

Databit number, should be SPI_DATABIT_x, where x is in range from 8 - 16

Definition at line 241 of file lpc17xx_spi.h.

uint32_t CPOL

Clock phase, should be:

  • SPI_CPHA_FIRST: first clock edge
  • SPI_CPHA_SECOND: second clock edge

Definition at line 244 of file lpc17xx_spi.h.

uint32_t Databit

Definition at line 239 of file lpc17xx_spi.h.

uint32_t DataOrder

SPI mode, should be:

  • SPI_MASTER_MODE: Master mode
  • SPI_SLAVE_MODE: Slave mode

Definition at line 250 of file lpc17xx_spi.h.

uint32_t Mode

Clock polarity, should be:

  • SPI_CPOL_HI: high level
  • SPI_CPOL_LO: low level

Definition at line 247 of file lpc17xx_spi.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_spi.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SPI_DATA_SETUP_Type Struct Reference

  • Data Fields
Data Fields
SPI_DATA_SETUP_Type Struct Reference
SPI Public Types

SPI Data configuration structure definitions. More...

#include <lpc17xx_spi.h>

Data Fields

void * | tx_data
void * | rx_data
uint32_t | length
uint32_t | counter
uint32_t | status

Detailed Description

SPI Data configuration structure definitions.

Definition at line 269 of file lpc17xx_spi.h.

Field Documentation

uint32_t counter

Data counter index

Definition at line 273 of file lpc17xx_spi.h.

uint32_t length

Length of transfer data

Definition at line 272 of file lpc17xx_spi.h.

void* rx_data

Pointer to transmit data

Definition at line 271 of file lpc17xx_spi.h.

uint32_t status

Current status of SPI activity

Definition at line 274 of file lpc17xx_spi.h.

void* tx_data

Pointer to transmit data

Definition at line 270 of file lpc17xx_spi.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_spi.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SSP_CFG_Type Struct Reference

  • Data Fields
Data Fields
SSP_CFG_Type Struct Reference
SSP Public Types

SSP configuration structure. More...

#include <lpc17xx_ssp.h>

Data Fields

uint32_t | Databit
uint32_t | CPHA
uint32_t | CPOL
uint32_t | Mode
uint32_t | FrameFormat
uint32_t | ClockRate

Detailed Description

SSP configuration structure.

Definition at line 371 of file lpc17xx_ssp.h.

Field Documentation

uint32_t ClockRate

Frame Format:

  • SSP_FRAME_SPI: Motorola SPI frame format
  • SSP_FRAME_TI: TI frame format
  • SSP_FRAME_MICROWIRE: National Microwire frame format

Definition at line 387 of file lpc17xx_ssp.h.

uint32_t CPHA

Databit number, should be SSP_DATABIT_x, where x is in range from 4 - 16

Definition at line 374 of file lpc17xx_ssp.h.

uint32_t CPOL

Clock phase, should be:

  • SSP_CPHA_FIRST: first clock edge
  • SSP_CPHA_SECOND: second clock edge

Definition at line 377 of file lpc17xx_ssp.h.

uint32_t Databit

Definition at line 372 of file lpc17xx_ssp.h.

uint32_t FrameFormat

SSP mode, should be:

  • SSP_MASTER_MODE: Master mode
  • SSP_SLAVE_MODE: Slave mode

Definition at line 383 of file lpc17xx_ssp.h.

uint32_t Mode

Clock polarity, should be:

  • SSP_CPOL_HI: high level
  • SSP_CPOL_LO: low level

Definition at line 380 of file lpc17xx_ssp.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_ssp.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SSP_DATA_SETUP_Type Struct Reference

  • Data Fields
Data Fields
SSP_DATA_SETUP_Type Struct Reference
SSP Public Types

SPI Data configuration structure definitions. More...

#include <lpc17xx_ssp.h>

Data Fields

void * | tx_data
uint32_t | tx_cnt
void * | rx_data
uint32_t | rx_cnt
uint32_t | length
uint32_t | status

Detailed Description

SPI Data configuration structure definitions.

Definition at line 401 of file lpc17xx_ssp.h.

Field Documentation

uint32_t length

Length of transfer data

Definition at line 406 of file lpc17xx_ssp.h.

uint32_t rx_cnt

Receive counter

Definition at line 405 of file lpc17xx_ssp.h.

void* rx_data

Pointer to transmit data

Definition at line 404 of file lpc17xx_ssp.h.

uint32_t status

Current status of SSP activity

Definition at line 407 of file lpc17xx_ssp.h.

uint32_t tx_cnt

Transmit counter

Definition at line 403 of file lpc17xx_ssp.h.

void* tx_data

Pointer to transmit data

Definition at line 402 of file lpc17xx_ssp.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_ssp.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: SysTick_Type Struct Reference

  • Data Fields
Data Fields
SysTick_Type Struct Reference
CMSIS SysTick

Structure type to access the System Timer (SysTick). More...

#include <core_cm3.h>

Data Fields

__IO uint32_t | CTRL
__IO uint32_t | LOAD
__IO uint32_t | VAL
__I uint32_t | CALIB

Detailed Description

Structure type to access the System Timer (SysTick).

Definition at line 550 of file core_cm3.h.

Field Documentation

__I uint32_t CALIB

Offset: 0x00C (R/ ) SysTick Calibration Register

Definition at line 555 of file core_cm3.h.

__IO uint32_t CTRL

Offset: 0x000 (R/W) SysTick Control and Status Register

Definition at line 552 of file core_cm3.h.

__IO uint32_t LOAD

Offset: 0x004 (R/W) SysTick Reload Value Register

Definition at line 553 of file core_cm3.h.

__IO uint32_t VAL

Offset: 0x008 (R/W) SysTick Current Value Register

Definition at line 554 of file core_cm3.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cm3.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: tcpip_hdr Struct Reference

  • Data Fields
Data Fields
tcpip_hdr Struct Reference
uIP packet forwarding

Data Fields

u8_t vhl
u8_t tos
u16_t len
u16_t ipid
u16_t ipoffset
u8_t ttl
u8_t proto
u16_t ipchksum
u16_t | srcipaddr [2]
u16_t | destipaddr [2]
u16_t srcport
u16_t destport
u8_t | seqno [4]
u8_t | ackno [4]
u8_t tcpoffset
u8_t flags
u8_t | wnd [2]
u16_t tcpchksum
u8_t | urgp [2]
u8_t | optdata [4]

Detailed Description

Definition at line 72 of file uip-fw.c.

Field Documentation

u8_t vhl

Definition at line 74 of file uip-fw.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.c
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: telnetd_line Struct Reference

  • Data Fields
Data Fields
telnetd_line Struct Reference

Data Fields

char line [TELNETD_CONF_LINELEN]

Detailed Description

Definition at line 45 of file telnetd.c.

Field Documentation

char line[TELNETD_CONF_LINELEN]

Definition at line 46 of file telnetd.c.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.c
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: telnetd_state Struct Reference

  • Data Fields
Data Fields
telnetd_state Struct Reference

#include <telnetd.h>

Data Fields

char * | lines [TELNETD_CONF_NUMLINES]
char | buf [TELNETD_CONF_LINELEN]
char | bufptr
u8_t numsent
u8_t state

Detailed Description

Definition at line 49 of file telnetd.h.

Field Documentation

char buf[TELNETD_CONF_LINELEN]

Definition at line 51 of file telnetd.h.

char bufptr

Definition at line 52 of file telnetd.h.

char* lines[TELNETD_CONF_NUMLINES]

Definition at line 50 of file telnetd.h.

u8_t numsent

Definition at line 53 of file telnetd.h.

u8_t state

Definition at line 54 of file telnetd.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.h
Generated on Mon Nov 28 2011 11:15:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TIM_CAPTURECFG_Type Struct Reference

  • Data Fields
Data Fields
TIM_CAPTURECFG_Type Struct Reference
TIM Public Types

Capture Input configuration structure. More...

#include <lpc17xx_timer.h>

Data Fields

uint8_t | CaptureChannel
uint8_t | RisingEdge
uint8_t | FallingEdge
uint8_t | IntOnCaption

Detailed Description

Capture Input configuration structure.

Definition at line 281 of file lpc17xx_timer.h.

Field Documentation

uint8_t CaptureChannel

Capture channel, should be in range from 0..1

Definition at line 282 of file lpc17xx_timer.h.

uint8_t FallingEdge

caption falling edge, should be:

  • ENABLE: Enable falling edge.
  • DISABLE: Disable this function.

Definition at line 288 of file lpc17xx_timer.h.

uint8_t IntOnCaption

Interrupt On caption, should be:

  • ENABLE: Enable interrupt function.
  • DISABLE: Disable this function.

Definition at line 292 of file lpc17xx_timer.h.

uint8_t RisingEdge

caption rising edge, should be:

  • ENABLE: Enable rising edge.
  • DISABLE: Disable this function.

Definition at line 284 of file lpc17xx_timer.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_timer.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TIM_COUNTERCFG_Type Struct Reference

  • Data Fields
Data Fields
TIM_COUNTERCFG_Type Struct Reference
TIM Public Types

Configuration structure in COUNTER mode. More...

#include <lpc17xx_timer.h>

Data Fields

uint8_t | CounterOption
uint8_t | CountInputSelect
uint8_t | Reserved [2]

Detailed Description

Configuration structure in COUNTER mode.

Definition at line 243 of file lpc17xx_timer.h.

Field Documentation

uint8_t CounterOption

Counter Option, should be:

  • TIM_COUNTER_INCAP0: CAPn.0 input pin for TIMERn
  • TIM_COUNTER_INCAP1: CAPn.1 input pin for TIMERn

Definition at line 245 of file lpc17xx_timer.h.

uint8_t CountInputSelect

Definition at line 249 of file lpc17xx_timer.h.

uint8_t Reserved[2]

Definition at line 250 of file lpc17xx_timer.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_timer.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TIM_MATCHCFG_Type Struct Reference

  • Data Fields
Data Fields
TIM_MATCHCFG_Type Struct Reference
TIM Public Types

Match channel configuration structure. More...

#include <lpc17xx_timer.h>

Data Fields

uint8_t | MatchChannel
uint8_t | IntOnMatch
uint8_t | StopOnMatch
uint8_t | ResetOnMatch
uint8_t | ExtMatchOutputType
uint8_t | Reserved [3]
uint32_t | MatchValue

Detailed Description

Match channel configuration structure.

Definition at line 254 of file lpc17xx_timer.h.

Field Documentation

uint8_t ExtMatchOutputType

External Match Output type, should be:

  • TIM_EXTMATCH_NOTHING: Do nothing for external output pin if match
  • TIM_EXTMATCH_LOW: Force external output pin to low if match
  • TIM_EXTMATCH_HIGH: Force external output pin to high if match
  • TIM_EXTMATCH_TOGGLE: Toggle external output pin if match.

Definition at line 270 of file lpc17xx_timer.h.

uint8_t IntOnMatch

Interrupt On match, should be:

  • ENABLE: Enable this function.
  • DISABLE: Disable this function.

Definition at line 257 of file lpc17xx_timer.h.

uint8_t MatchChannel

Match channel, should be in range from 0..3

Definition at line 255 of file lpc17xx_timer.h.

uint32_t MatchValue

Reserved

Definition at line 277 of file lpc17xx_timer.h.

uint8_t Reserved[3]

Definition at line 276 of file lpc17xx_timer.h.

uint8_t ResetOnMatch

Reset On match, should be:

  • ENABLE: Enable this function.
  • DISABLE: Disable this function.

Definition at line 265 of file lpc17xx_timer.h.

uint8_t StopOnMatch

Stop On match, should be:

  • ENABLE: Enable this function.
  • DISABLE: Disable this function.

Definition at line 261 of file lpc17xx_timer.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_timer.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TIM_TIMERCFG_Type Struct Reference

  • Data Fields
Data Fields
TIM_TIMERCFG_Type Struct Reference
TIM Public Types

Configuration structure in TIMER mode. More...

#include <lpc17xx_timer.h>

Data Fields

uint8_t | PrescaleOption
uint8_t | Reserved [3]
uint32_t | PrescaleValue

Detailed Description

Configuration structure in TIMER mode.

Definition at line 231 of file lpc17xx_timer.h.

Field Documentation

uint8_t PrescaleOption

Timer Prescale option, should be:

  • TIM_PRESCALE_TICKVAL: Prescale in absolute value
  • TIM_PRESCALE_USVAL: Prescale in microsecond value

Definition at line 234 of file lpc17xx_timer.h.

uint32_t PrescaleValue

Prescale value

Definition at line 239 of file lpc17xx_timer.h.

uint8_t Reserved[3]

Reserved

Definition at line 238 of file lpc17xx_timer.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_timer.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: timer Struct Reference

  • Data Fields
Data Fields
timer Struct Reference
Timer library

#include <timer.h>

Data Fields

clock_time_t start
clock_time_t interval

Detailed Description

A timer.

This structure is used for declaring a timer. The timer must be set with timer_set() before it can be used.

Definition at line 78 of file timer.h.

Field Documentation

clock_time_t start

Definition at line 79 of file timer.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TX_Desc Struct Reference

  • Data Fields
Data Fields
TX_Desc Struct Reference
EMAC Public Types

TX Descriptor structure type definition. More...

#include <lpc17xx_emac.h>

Data Fields

uint32_t | Packet
uint32_t | Ctrl

Detailed Description

TX Descriptor structure type definition.

Definition at line 613 of file lpc17xx_emac.h.

Field Documentation

uint32_t Ctrl

Transmit Control Descriptor

Definition at line 615 of file lpc17xx_emac.h.

uint32_t Packet

Transmit Packet Descriptor

Definition at line 614 of file lpc17xx_emac.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: TX_Stat Struct Reference

  • Data Fields
Data Fields
TX_Stat Struct Reference
EMAC Public Types

TX Status structure type definition. More...

#include <lpc17xx_emac.h>

Data Fields

uint32_t Info

Detailed Description

TX Status structure type definition.

Definition at line 621 of file lpc17xx_emac.h.

Field Documentation

uint32_t Info

Transmit Information Status

Definition at line 622 of file lpc17xx_emac.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART1_RS485_CTRLCFG_Type Struct Reference

  • Data Fields
Data Fields
UART1_RS485_CTRLCFG_Type Struct Reference
UART Public Types

UART1 Full modem - RS485 Control configuration type. More...

#include <lpc17xx_uart.h>

Data Fields

FunctionalState NormalMultiDropMode_State
FunctionalState Rx_State
FunctionalState AutoAddrDetect_State
FunctionalState AutoDirCtrl_State
UART_RS485_DIRCTRL_PIN_Type DirCtrlPin
SetState DirCtrlPol_Level
uint8_t | MatchAddrValue
uint8_t | DelayValue

Detailed Description

UART1 Full modem - RS485 Control configuration type.

Definition at line 546 of file lpc17xx_uart.h.

Field Documentation

FunctionalState AutoAddrDetect_State

Auto Address Detect mode state:

  • ENABLE: ENABLE this function.
  • DISABLE: Disable this function.

Definition at line 553 of file lpc17xx_uart.h.

FunctionalState AutoDirCtrl_State

Auto Direction Control State:

  • ENABLE: Enable this function.
  • DISABLE: Disable this function.

Definition at line 556 of file lpc17xx_uart.h.

uint8_t DelayValue

delay time is in periods of the baud clock, 8-bit long

Definition at line 571 of file lpc17xx_uart.h.

UART_RS485_DIRCTRL_PIN_Type DirCtrlPin

If direction control is enabled, state:

  • UART1_RS485_DIRCTRL_RTS: pin RTS is used for direction control.
  • UART1_RS485_DIRCTRL_DTR: pin DTR is used for direction control.

Definition at line 559 of file lpc17xx_uart.h.

SetState DirCtrlPol_Level

Polarity of the direction control signal on the RTS (or DTR) pin:

  • RESET: The direction control pin will be driven to logic "0" when the transmitter has data to be sent.
  • SET: The direction control pin will be driven to logic "1" when the transmitter has data to be sent.

Definition at line 564 of file lpc17xx_uart.h.

uint8_t MatchAddrValue

address match value for RS-485/EIA-485 mode, 8-bit long

Definition at line 570 of file lpc17xx_uart.h.

FunctionalState NormalMultiDropMode_State

Normal MultiDrop mode State:

  • ENABLE: Enable this function.
  • DISABLE: Disable this function.

Definition at line 547 of file lpc17xx_uart.h.

FunctionalState Rx_State

Receiver State:

  • ENABLE: Enable Receiver.
  • DISABLE: Disable Receiver.

Definition at line 550 of file lpc17xx_uart.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_uart.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART_AB_CFG_Type Struct Reference

  • Data Fields
Data Fields
UART_AB_CFG_Type Struct Reference
UART Public Types

Auto Baudrate mode configuration type definition. More...

#include <lpc17xx_uart.h>

Data Fields

UART_AB_MODE_Type ABMode
FunctionalState AutoRestart

Detailed Description

Auto Baudrate mode configuration type definition.

Definition at line 412 of file lpc17xx_uart.h.

Field Documentation

UART_AB_MODE_Type ABMode

Autobaudrate mode

Definition at line 413 of file lpc17xx_uart.h.

FunctionalState AutoRestart

Auto Restart state

Definition at line 414 of file lpc17xx_uart.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_uart.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART_CFG_Type Struct Reference

  • Data Fields
Data Fields
UART_CFG_Type Struct Reference
UART Public Types

UART Configuration Structure definition. More...

#include <lpc17xx_uart.h>

Data Fields

uint32_t Baud_rate
UART_PARITY_Type Parity
UART_DATABIT_Type Databits
UART_STOPBIT_Type Stopbits

Detailed Description

UART Configuration Structure definition.

Definition at line 497 of file lpc17xx_uart.h.

Field Documentation

uint32_t Baud_rate

UART baud rate

Definition at line 498 of file lpc17xx_uart.h.

UART_DATABIT_Type Databits

Number of data bits, should be:

  • UART_DATABIT_5: UART 5 bit data mode
  • UART_DATABIT_6: UART 6 bit data mode
  • UART_DATABIT_7: UART 7 bit data mode
  • UART_DATABIT_8: UART 8 bit data mode

Definition at line 506 of file lpc17xx_uart.h.

UART_PARITY_Type Parity

Parity selection, should be:

  • UART_PARITY_NONE: No parity
  • UART_PARITY_ODD: Odd parity
  • UART_PARITY_EVEN: Even parity
  • UART_PARITY_SP_1: Forced "1" stick parity
  • UART_PARITY_SP_0: Forced "0" stick parity

Definition at line 499 of file lpc17xx_uart.h.

UART_STOPBIT_Type Stopbits

Number of stop bits, should be:

  • UART_STOPBIT_1: UART 1 Stop Bits Select
  • UART_STOPBIT_2: UART 2 Stop Bits Select

Definition at line 512 of file lpc17xx_uart.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_uart.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART_FIFO_CFG_Type Struct Reference

  • Data Fields
Data Fields
UART_FIFO_CFG_Type Struct Reference
UART Public Types

UART FIFO Configuration Structure definition. More...

#include <lpc17xx_uart.h>

Data Fields

FunctionalState FIFO_ResetRxBuf
FunctionalState FIFO_ResetTxBuf
FunctionalState FIFO_DMAMode
UART_FITO_LEVEL_Type FIFO_Level

Detailed Description

UART FIFO Configuration Structure definition.

Definition at line 522 of file lpc17xx_uart.h.

Field Documentation

FunctionalState FIFO_DMAMode

DMA mode, should be:

  • ENABLE: Enable DMA mode in UART
  • DISABLE: Disable DMA mode in UART

Definition at line 531 of file lpc17xx_uart.h.

UART_FITO_LEVEL_Type FIFO_Level

Rx FIFO trigger level, should be:

  • UART_FIFO_TRGLEV0: UART FIFO trigger level 0: 1 character
  • UART_FIFO_TRGLEV1: UART FIFO trigger level 1: 4 character
  • UART_FIFO_TRGLEV2: UART FIFO trigger level 2: 8 character
  • UART_FIFO_TRGLEV3: UART FIFO trigger level 3: 14 character

Definition at line 535 of file lpc17xx_uart.h.

FunctionalState FIFO_ResetRxBuf

Reset Rx FIFO command state , should be:

  • ENABLE: Reset Rx FIFO in UART
  • DISABLE: Do not reset Rx FIFO in UART

Definition at line 523 of file lpc17xx_uart.h.

FunctionalState FIFO_ResetTxBuf

Reset Tx FIFO command state , should be:

  • ENABLE: Reset Tx FIFO in UART
  • DISABLE: Do not reset Tx FIFO in UART

Definition at line 527 of file lpc17xx_uart.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_uart.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: UART_RING_BUFFER_T Struct Reference

  • Data Fields
Data Fields
UART_RING_BUFFER_T Struct Reference
Interrupt | RS485_Master | RS485_Slave | UART1_FullModem

UART Ring buffer structure. More...

Data Fields

__IO uint32_t | tx_head
__IO uint32_t | tx_tail
__IO uint32_t | rx_head
__IO uint32_t | rx_tail
__IO uint8_t | tx [UART_RING_BUFSIZE]
__IO uint8_t | rx [UART_RING_BUFSIZE]

Detailed Description

UART Ring buffer structure.

Definition at line 55 of file uart_interrupt_test.c.

Field Documentation

__IO uint32_t tx_head

UART Tx ring buffer head index

Definition at line 57 of file uart_interrupt_test.c.

The documentation for this struct was generated from the following files:
  • C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/uart_interrupt_test.c
  • C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/rs485_master.c
  • C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/rs485_slave.c
  • C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/uart_fullmodem_test.c
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uip_conn Struct Reference

  • Data Fields
Data Fields
uip_conn Struct Reference
The uIP TCP/IP stack

#include <uip.h>

Data Fields

uip_ipaddr_t ripaddr
u16_t lport
u16_t rport
u8_t | rcv_nxt [4]
u8_t | snd_nxt [4]
u16_t len
u16_t mss
u16_t initialmss
u8_t sa
u8_t sv
u8_t rto
u8_t tcpstateflags
u8_t timer
u8_t nrtx
uip_tcp_appstate_t appstate

Detailed Description

Representation of a uIP TCP connection.

The uip_conn structure is used for identifying a connection. All but one field in the structure are to be considered read-only by an application. The only exception is the appstate field whos purpose is to let the application store application-specific state (e.g., file pointers) for the connection. The type of this field is configured in the "uipopt.h" header file.

Definition at line 1157 of file uip.h.

Field Documentation

uip_tcp_appstate_t appstate

The application state.

Definition at line 1184 of file uip.h.

u16_t initialmss

Initial maximum segment size for the connection.

Definition at line 1171 of file uip.h.

u16_t len

Length of the data that was previously sent.

Definition at line 1168 of file uip.h.

u16_t lport

The local TCP port, in network byte order.

Definition at line 1160 of file uip.h.

u16_t mss

Current maximum segment size for the connection.

Definition at line 1169 of file uip.h.

u8_t nrtx

The number of retransmissions for the last segment sent.

Definition at line 1180 of file uip.h.

u8_t rcv_nxt[4]

The sequence number that we expect to receive next.

Definition at line 1164 of file uip.h.

uip_ipaddr_t ripaddr

The IP address of the remote host.

Definition at line 1158 of file uip.h.

u16_t rport

The local remote TCP port, in network byte order.

Definition at line 1161 of file uip.h.

u8_t rto

Retransmission time-out.

Definition at line 1177 of file uip.h.

u8_t sa

Retransmission time-out calculation state variable.

Definition at line 1173 of file uip.h.

u8_t snd_nxt[4]

The sequence number that was last sent by us.

Definition at line 1166 of file uip.h.

u8_t sv

Retransmission time-out calculation state variable.

Definition at line 1175 of file uip.h.

u8_t tcpstateflags

TCP state and flags.

Definition at line 1178 of file uip.h.

u8_t timer

The retransmission timer.

Definition at line 1179 of file uip.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uip_eth_addr Struct Reference

  • Data Fields
Data Fields
uip_eth_addr Struct Reference
The uIP TCP/IP stack

#include <uip.h>

Data Fields

u8_t addr [6]

Detailed Description

Representation of a 48-bit Ethernet address.

Definition at line 1599 of file uip.h.

Field Documentation

u8_t addr[6]

Definition at line 1600 of file uip.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uip_eth_hdr Struct Reference

  • Data Fields
Data Fields
uip_eth_hdr Struct Reference
uIP Address Resolution Protocol

#include <uip_arp.h>

Data Fields

struct uip_eth_addr | dest
struct uip_eth_addr | src
u16_t type

Detailed Description

The Ethernet header.

Definition at line 72 of file uip_arp.h.

Field Documentation

struct uip_eth_addr dest

Definition at line 73 of file uip_arp.h.

struct uip_eth_addr src

Definition at line 74 of file uip_arp.h.

u16_t type

Definition at line 75 of file uip_arp.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uip_fw_netif Struct Reference

  • Data Fields
Data Fields
uip_fw_netif Struct Reference
uIP packet forwarding

#include <uip-fw.h>

Data Fields

struct uip_fw_netif * | next
u16_t | ipaddr [2]
u16_t | netmask [2]
u8_t(* | output )(void)

Detailed Description

Representation of a uIP network interface.

Definition at line 54 of file uip-fw.h.

Field Documentation

u16_t ipaddr[2]

The IP address of this interface.

Definition at line 57 of file uip-fw.h.

u16_t netmask[2]

The netmask of the interface.

Definition at line 58 of file uip-fw.h.

struct uip_fw_netif* next

Pointer to the next interface when linked in a list.

Definition at line 55 of file uip-fw.h.

u8_t(* output)(void)

A pointer to the function that sends a packet.

Definition at line 59 of file uip-fw.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uip_icmpip_hdr Struct Reference

  • Data Fields
Data Fields
uip_icmpip_hdr Struct Reference
The uIP TCP/IP stack

#include <uip.h>

Data Fields

u8_t vhl
u8_t tos
u8_t | len [2]
u8_t | ipid [2]
u8_t | ipoffset [2]
u8_t ttl
u8_t proto
u16_t ipchksum
u16_t | srcipaddr [2]
u16_t | destipaddr [2]
u8_t type
u8_t icode
u16_t icmpchksum
u16_t id
u16_t seqno

Detailed Description

Definition at line 1452 of file uip.h.

Field Documentation

u16_t destipaddr[2]

Definition at line 1471 of file uip.h.

u16_t icmpchksum

Definition at line 1477 of file uip.h.

u8_t icode

Definition at line 1476 of file uip.h.

u16_t id

Definition at line 1479 of file uip.h.

u16_t ipchksum

Definition at line 1470 of file uip.h.

u8_t ipid[2]

Definition at line 1463 of file uip.h.

u8_t ipoffset[2]

Definition at line 1463 of file uip.h.

u8_t len[2]

Definition at line 1463 of file uip.h.

u8_t proto

Definition at line 1463 of file uip.h.

u16_t seqno

Definition at line 1479 of file uip.h.

u16_t srcipaddr[2]

Definition at line 1471 of file uip.h.

u8_t tos

Definition at line 1463 of file uip.h.

u8_t ttl

Definition at line 1463 of file uip.h.

u8_t type

Definition at line 1476 of file uip.h.

u8_t vhl

Definition at line 1463 of file uip.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uip_neighbor_addr Struct Reference

  • Data Fields
Data Fields
uip_neighbor_addr Struct Reference

#include <uip-neighbor.h>

Data Fields

struct uip_eth_addr addr

Detailed Description

Definition at line 47 of file uip-neighbor.h.

Field Documentation

struct uip_eth_addr addr

Definition at line 51 of file uip-neighbor.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uip_stats Struct Reference

  • Data Fields
Data Fields
uip_stats Struct Reference
The uIP TCP/IP stack

#include <uip.h>

Data Fields

struct {
uip_stats_t drop
uip_stats_t recv
uip_stats_t sent
uip_stats_t vhlerr
uip_stats_t hblenerr
uip_stats_t lblenerr
uip_stats_t fragerr
uip_stats_t chkerr
uip_stats_t protoerr
} ip
struct {
uip_stats_t drop
uip_stats_t recv
uip_stats_t sent
uip_stats_t typeerr
} icmp
struct {
uip_stats_t drop
uip_stats_t recv
uip_stats_t sent
uip_stats_t chkerr
uip_stats_t ackerr
uip_stats_t rst
uip_stats_t rexmit
uip_stats_t syndrop
uip_stats_t synrst
} tcp

Detailed Description

The structure holding the TCP/IP statistics that are gathered if UIP_STATISTICS is set to 1.

Definition at line 1236 of file uip.h.

Field Documentation

uip_stats_t ackerr

Number of TCP segments with a bad ACK number.

Definition at line 1270 of file uip.h.

uip_stats_t chkerr

Number of packets dropped due to IP checksum errors.

Number of TCP segments with a bad checksum.

Definition at line 1252 of file uip.h.

uip_stats_t drop

Number of dropped packets at the IP layer.

Number of dropped ICMP packets.

Number of dropped TCP segments.

Definition at line 1238 of file uip.h.

uip_stats_t fragerr

Number of packets dropped since they were IP fragments.

Definition at line 1250 of file uip.h.

uip_stats_t hblenerr

Number of packets dropped due to wrong IP length, high byte.

Definition at line 1246 of file uip.h.

struct { ... } icmp

ICMP statistics.

struct { ... } ip

IP statistics.

uip_stats_t lblenerr

Number of packets dropped due to wrong IP length, low byte.

Definition at line 1248 of file uip.h.

uip_stats_t protoerr

Number of packets dropped since they were neither ICMP, UDP nor TCP.

Definition at line 1254 of file uip.h.

uip_stats_t recv

Number of received packets at the IP layer.

Number of received ICMP packets.

Number of recived TCP segments.

Definition at line 1240 of file uip.h.

uip_stats_t rexmit

Number of retransmitted TCP segments.

Definition at line 1273 of file uip.h.

uip_stats_t rst

Number of recevied TCP RST (reset) segments.

Definition at line 1272 of file uip.h.

uip_stats_t sent

Number of sent packets at the IP layer.

Number of sent ICMP packets.

Number of sent TCP segments.

Definition at line 1242 of file uip.h.

uip_stats_t syndrop

Number of dropped SYNs due to too few connections was avaliable.

Definition at line 1274 of file uip.h.

uip_stats_t synrst

Number of SYNs for closed ports, triggering a RST.

Definition at line 1276 of file uip.h.

struct { ... } tcp

TCP statistics.

uip_stats_t typeerr

Number of ICMP packets with a wrong type.

Definition at line 1261 of file uip.h.

uip_stats_t vhlerr

Number of packets dropped due to wrong IP version or header length.

Definition at line 1244 of file uip.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uip_tcpip_hdr Struct Reference

  • Data Fields
Data Fields
uip_tcpip_hdr Struct Reference
The uIP TCP/IP stack

#include <uip.h>

Data Fields

u8_t vhl
u8_t tos
u8_t | len [2]
u8_t | ipid [2]
u8_t | ipoffset [2]
u8_t ttl
u8_t proto
u16_t ipchksum
u16_t | srcipaddr [2]
u16_t | destipaddr [2]
u16_t srcport
u16_t destport
u8_t | seqno [4]
u8_t | ackno [4]
u8_t tcpoffset
u8_t flags
u8_t | wnd [2]
u16_t tcpchksum
u8_t | urgp [2]
u8_t | optdata [4]

Detailed Description

Definition at line 1401 of file uip.h.

Field Documentation

u8_t ackno[4]

Definition at line 1427 of file uip.h.

u16_t destipaddr[2]

Definition at line 1420 of file uip.h.

u16_t destport

Definition at line 1425 of file uip.h.

u8_t flags

Definition at line 1427 of file uip.h.

u16_t ipchksum

Definition at line 1419 of file uip.h.

u8_t ipid[2]

Definition at line 1412 of file uip.h.

u8_t ipoffset[2]

Definition at line 1412 of file uip.h.

u8_t len[2]

Definition at line 1412 of file uip.h.

u8_t optdata[4]

Definition at line 1434 of file uip.h.

u8_t proto

Definition at line 1412 of file uip.h.

u8_t seqno[4]

Definition at line 1427 of file uip.h.

u16_t srcipaddr[2]

Definition at line 1420 of file uip.h.

u16_t srcport

Definition at line 1425 of file uip.h.

u16_t tcpchksum

Definition at line 1432 of file uip.h.

u8_t tcpoffset

Definition at line 1427 of file uip.h.

u8_t tos

Definition at line 1412 of file uip.h.

u8_t ttl

Definition at line 1412 of file uip.h.

u8_t urgp[2]

Definition at line 1433 of file uip.h.

u8_t vhl

Definition at line 1412 of file uip.h.

u8_t wnd[2]

Definition at line 1427 of file uip.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: uip_udpip_hdr Struct Reference

  • Data Fields
Data Fields
uip_udpip_hdr Struct Reference
The uIP TCP/IP stack

#include <uip.h>

Data Fields

u8_t vhl
u8_t tos
u8_t | len [2]
u8_t | ipid [2]
u8_t | ipoffset [2]
u8_t ttl
u8_t proto
u16_t ipchksum
u16_t | srcipaddr [2]
u16_t | destipaddr [2]
u16_t srcport
u16_t destport
u16_t udplen
u16_t udpchksum

Detailed Description

Definition at line 1503 of file uip.h.

Field Documentation

u16_t destipaddr[2]

Definition at line 1522 of file uip.h.

u16_t destport

Definition at line 1527 of file uip.h.

u16_t ipchksum

Definition at line 1521 of file uip.h.

u8_t ipid[2]

Definition at line 1514 of file uip.h.

u8_t ipoffset[2]

Definition at line 1514 of file uip.h.

u8_t len[2]

Definition at line 1514 of file uip.h.

u8_t proto

Definition at line 1514 of file uip.h.

u16_t srcipaddr[2]

Definition at line 1522 of file uip.h.

u16_t srcport

Definition at line 1527 of file uip.h.

u8_t tos

Definition at line 1514 of file uip.h.

u8_t ttl

Definition at line 1514 of file uip.h.

u16_t udpchksum

Definition at line 1530 of file uip.h.

u16_t udplen

Definition at line 1529 of file uip.h.

u8_t vhl

Definition at line 1514 of file uip.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: webclient_state Struct Reference

  • Data Fields
Data Fields
webclient_state Struct Reference
Web client

#include <webclient.h>

Data Fields

u8_t timer
u8_t state
u8_t httpflag
u16_t port
char | host [40]
char | file [WEBCLIENT_CONF_MAX_URLLEN]
u16_t getrequestptr
u16_t getrequestleft
char | httpheaderline [200]
u16_t httpheaderlineptr
char | mimetype [32]

Detailed Description

Definition at line 55 of file webclient.h.

Field Documentation

char file[WEBCLIENT_CONF_MAX_URLLEN]

Definition at line 62 of file webclient.h.

u16_t getrequestleft

Definition at line 64 of file webclient.h.

u16_t getrequestptr

Definition at line 63 of file webclient.h.

char host[40]

Definition at line 61 of file webclient.h.

u8_t httpflag

Definition at line 58 of file webclient.h.

char httpheaderline[200]

Definition at line 66 of file webclient.h.

u16_t httpheaderlineptr

Definition at line 67 of file webclient.h.

char mimetype[32]

Definition at line 69 of file webclient.h.

u16_t port

Definition at line 60 of file webclient.h.

u8_t state

Definition at line 57 of file webclient.h.

u8_t timer

Definition at line 56 of file webclient.h.

The documentation for this struct was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: xPSR_Type Union Reference

  • Data Fields
Data Fields
xPSR_Type Union Reference
CMSIS Core

Union type to access the Special-Purpose Program Status Registers (xPSR). More...

#include <core_cm3.h>

Data Fields

struct {
uint32_t ISR:9
uint32_t _reserved0:15
uint32_t T:1
uint32_t IT:2
uint32_t Q:1
uint32_t V:1
uint32_t C:1
uint32_t Z:1
uint32_t N:1
} b
uint32_t w

Detailed Description

Union type to access the Special-Purpose Program Status Registers (xPSR).

Definition at line 215 of file core_cm3.h.

Field Documentation

uint32_t _reserved0

bit: 9..23 Reserved

Definition at line 221 of file core_cm3.h.

struct { ... } b

Structure used for bit access

uint32_t C

bit: 29 Carry condition code flag

Definition at line 231 of file core_cm3.h.

uint32_t ISR

bit: 0.. 8 Exception number

Definition at line 219 of file core_cm3.h.

uint32_t IT

bit: 25..26 saved IT state (read 0)

Definition at line 228 of file core_cm3.h.

uint32_t N

bit: 31 Negative condition code flag

Definition at line 233 of file core_cm3.h.

uint32_t Q

bit: 27 Saturation condition flag

Definition at line 229 of file core_cm3.h.

uint32_t T

bit: 24 Thumb bit (read 0)

Definition at line 227 of file core_cm3.h.

uint32_t V

bit: 28 Overflow condition code flag

Definition at line 230 of file core_cm3.h.

uint32_t w

Type used for word access

Definition at line 235 of file core_cm3.h.

uint32_t Z

bit: 30 Zero condition code flag

Definition at line 232 of file core_cm3.h.

The documentation for this union was generated from the following file:
  • C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cm3.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Structure Index

  • Data Fields
Data Structure Index
A | C | D | E | F | G | H | I | L | M | N | P | Q | R | S | T | U | W | X | _
A
arm_lms_norm_instance_f32 httpd_cgi_call LPC_UART_TypeDef tcpip_hdr
AF_SectionDef arm_lms_norm_instance_q15 httpd_fs_file LPC_USB_TypeDef telnetd_line
APSR_Type arm_lms_norm_instance_q31 httpd_fsdata_file LPC_WDT_TypeDef telnetd_state
arm_bilinear_interp_instance_f32 arm_matrix_instance_f32 httpd_fsdata_file_noconst
M
TIM_CAPTURECFG_Type
arm_bilinear_interp_instance_q15 arm_matrix_instance_q15 httpd_state MCPWM_CAPTURE_CFG_Type TIM_COUNTERCFG_Type
arm_bilinear_interp_instance_q31 arm_matrix_instance_q31
I
MCPWM_CHANNEL_CFG_Type TIM_MATCHCFG_Type
arm_bilinear_interp_instance_q7 arm_pid_instance_f32 I2C_CFG_T MCPWM_COUNT_CFG_Type TIM_TIMERCFG_Type
arm_biquad_cas_df1_32x64_ins_q31 arm_pid_instance_q15 I2C_M_SETUP_Type
N
timer
arm_biquad_cascade_df2T_instance_f32 arm_pid_instance_q31 I2C_OWNSLAVEADDR_CFG_Type namemap TX_Desc
arm_biquad_casd_df1_inst_f32 arm_rfft_instance_f32 I2C_S_SETUP_Type neighbor_entry TX_Stat
arm_biquad_casd_df1_inst_q15 arm_rfft_instance_q15 I2S_CFG_Type NVIC_Type
U
arm_biquad_casd_df1_inst_q31 arm_rfft_instance_q31 I2S_DMAConf_Type
P
UART1_RS485_CTRLCFG_Type
arm_cfft_radix4_instance_f32 arp_entry I2S_MODEConf_Type PINSEL_CFG_Type UART_AB_CFG_Type
arm_cfft_radix4_instance_q15 arp_hdr icmpip_hdr psock UART_CFG_Type
arm_cfft_radix4_instance_q31
C
IPSR_Type psock_buf UART_FIFO_CFG_Type
arm_dct4_instance_f32 CAN_MSG_Type ITM_Type pt UART_RING_BUFFER_T
arm_dct4_instance_q15 CAN_PinCFG_Type
L
ptentry uip_conn
arm_dct4_instance_q31 CONTROL_Type LPC_ADC_TypeDef PWM_CAPTURECFG_Type uip_eth_addr
arm_fir_decimate_instance_f32 CoreDebug_Type LPC_CAN_TypeDef PWM_COUNTERCFG_Type uip_eth_hdr
arm_fir_decimate_instance_q15
D
LPC_CANAF_RAM_TypeDef PWM_Match_T uip_fw_netif
arm_fir_decimate_instance_q31 DAC_CONVERTER_CFG_Type LPC_CANAF_TypeDef PWM_MATCHCFG_Type uip_icmpip_hdr
arm_fir_instance_f32 dhcp_msg LPC_CANCR_TypeDef PWM_TIMERCFG_Type uip_neighbor_addr
arm_fir_instance_q15 dhcpc_state LPC_DAC_TypeDef
Q
uip_stats
arm_fir_instance_q31 dns_answer LPC_EMAC_TypeDef QEI_CFG_Type uip_tcpip_hdr
arm_fir_instance_q7 dns_hdr LPC_GPDMA_TypeDef QEI_CFGOPT_Type uip_udpip_hdr
arm_fir_interpolate_instance_f32
E
LPC_GPDMACH_TypeDef QEI_RELOADCFG_Type
W
arm_fir_interpolate_instance_q15 EFF_Entry LPC_GPIO_TypeDef
R
webclient_state
arm_fir_interpolate_instance_q31 EFF_GPR_Entry LPC_GPIOINT_TypeDef RTC_TIME_Type
X
arm_fir_lattice_instance_f32 EMAC_CFG_Type LPC_I2C_TypeDef RX_Desc xPSR_Type
arm_fir_lattice_instance_q15 EMAC_PACKETBUF_Type LPC_I2S_TypeDef RX_Stat
_
arm_fir_lattice_instance_q31 ethip_hdr LPC_MCPWM_TypeDef
S
__CDC_BUF_T
arm_fir_sparse_instance_f32 EXTI_InitTypeDef LPC_PINCON_TypeDef SCB_Type __FILE
arm_fir_sparse_instance_q15
F
LPC_PWM_TypeDef SCnSCB_Type __SER_BUF_T
arm_fir_sparse_instance_q31 FullCAN_Entry LPC_QEI_TypeDef SFF_Entry _ASCSET_Data_t
arm_fir_sparse_instance_q7 fwcache_entry LPC_RIT_TypeDef SFF_GPR_Entry _Bmp_t
arm_iir_lattice_instance_f32
G
LPC_RTC_TypeDef smtp_state _COLMOD_Data_t
arm_iir_lattice_instance_q15 GPDMA_Channel_CFG_Type LPC_SC_TypeDef SPI_CFG_Type _DATCTR_Data_t
arm_iir_lattice_instance_q31 GPDMA_LLI_Type LPC_SPI_TypeDef SPI_DATA_SETUP_Type _FontType_t
arm_linear_interp_instance_f32 GPIO_Byte_TypeDef LPC_SSP_TypeDef SSP_CFG_Type _GLCD_CmdCtrl_t
arm_lms_instance_f32 GPIO_HalfWord_TypeDef LPC_TIM_TypeDef SSP_DATA_SETUP_Type _MADCTR_Data_t
arm_lms_instance_q15
H
LPC_UART0_TypeDef SysTick_Type _USB_DMA_DESCRIPTOR
arm_lms_instance_q31 hello_world_state LPC_UART1_TypeDef
T
_USB_EP_DATA
A | C | D | E | F | G | H | I | L | M | N | P | Q | R | S | T | U | W | X | _
Generated on Mon Nov 28 2011 11:15:29 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- _ -

  • __pad0__ : _DATCTR_Data_t
  • _reserved0 : CONTROL_Type , xPSR_Type , IPSR_Type , APSR_Type
Generated on Mon Nov 28 2011 11:15:29 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: File List

  • File List
  • Globals
File List
Here is a list of all files with brief descriptions:
C:/nxpdrv/LPC1700CMSIS/_htmlsrc/ummainpage.h [code] | This file just used to dummy information for UM document generating
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_class_marks_example/arm_class_marks_example_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_class_marks_example/system_ARMCM0.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_class_marks_example/system_ARMCM3.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_class_marks_example/system_ARMCM4.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_convolution_example/arm_convolution_example_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM0.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM3.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM4.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_dotproduct_example/arm_dotproduct_example_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_dotproduct_example/system_ARMCM0.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_dotproduct_example/system_ARMCM3.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_dotproduct_example/system_ARMCM4.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/arm_fft_bin_data.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/arm_fft_bin_example_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM0.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM3.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM4.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/arm_fir_data.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/arm_fir_example_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM0.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM3.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM4.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/arm_graphic_equalizer_data.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/arm_graphic_equalizer_example_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM0.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM3.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM4.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/arm_linear_interp_data.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/arm_linear_interp_example_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM0.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM3.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM4.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_matrix_example/arm_matrix_example_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_matrix_example/system_ARMCM0.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_matrix_example/system_ARMCM3.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_matrix_example/system_ARMCM4.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/arm_signal_converge_data.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/arm_signal_converge_example_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM0.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM3.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM4.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/arm_sin_cos_example_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM0.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM3.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM4.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_variance_example/arm_variance_example_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM0.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM3.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM4.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/Common/Include/math_helper.h [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/Common/Source/math_helper.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_common_tables.h [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h [code] |
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cm3.h [code] | CMSIS Cortex-M3 Core Peripheral Access Layer Header File
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cmFunc.h [code] | CMSIS Cortex-M Core Function Access Header File
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cmInstr.h [code] | CMSIS Cortex-M Core Instruction Access Header File
C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h [code] | CMSIS Cortex-M3 Core Peripheral Access Layer Header File for NXP LPC17xx Device Series
C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/system_LPC17xx.h [code] | CMSIS Cortex-M3 Device Peripheral Access Layer Header File for the NXP LPC17xx Device Series
C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Source/Template/system_LPC17xx.c [code] | CMSIS Cortex-M3 Device Peripheral Access Layer Source File for the NXP LPC17xx Device Series
C:/nxpdrv/LPC1700CMSIS/Drivers/include/debug_frmwrk.h [code] | Contains some utilities that used for debugging through UART
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_adc.h [code] | Contains the NXP ABL typedefs for C standard types. It is intended to be used in ISO C conforming development environments and checks for this insofar as it is possible to do so
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h [code] | Contains all macro definitions and function prototypes support for CAN firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_clkpwr.h [code] | Contains all macro definitions and function prototypes support for Clock and Power Control firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_dac.h [code] | Contains all macro definitions and function prototypes support for Clock and Power Control firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h [code] | Contains all macro definitions and function prototypes support for Ethernet MAC firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_exti.h [code] | Contains all macro definitions and function prototypes support for External interrupt firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpdma.h [code] | Contains all macro definitions and function prototypes support for GPDMA firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpio.h [code] | Contains all macro definitions and function prototypes support for GPDMA firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2c.h [code] | Contains all macro definitions and function prototypes support for I2C firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2s.h [code] | Contains all macro definitions and function prototypes support for I2S firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_libcfg_default.h [code] | Default Library configuration header file
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_mcpwm.h [code] | Contains all macro definitions and function prototypes support for Motor Control PWM firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_nvic.h [code] | Contains all macro definitions and function prototypes support for Nesting Vectored Interrupt firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pinsel.h [code] | Contains all macro definitions and function prototypes support for Pin connect block firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pwm.h [code] | Contains all macro definitions and function prototypes support for PWM firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_qei.h [code] | Contains all macro definitions and function prototypes support for QEI firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rit.h [code] | Contains all macro definitions and function prototypes support for RIT firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rtc.h [code] | Contains all macro definitions and function prototypes support for RTC firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_spi.h [code] | Contains all macro definitions and function prototypes support for SPI firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_ssp.h [code] | Contains all macro definitions and function prototypes support for SSP firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_systick.h [code] | Contains all macro definitions and function prototypes support for SYSTICK firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_timer.h [code] | Contains all macro definitions and function prototypes support for Timer firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_uart.h [code] | Contains all macro definitions and function prototypes support for UART firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_wdt.h [code] | Contains all macro definitions and function prototypes support for WDT firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc_types.h [code] | Contains the NXP ABL typedefs for C standard types. It is intended to be used in ISO C conforming development environments and checks for this insofar as it is possible to do so
C:/nxpdrv/LPC1700CMSIS/Drivers/source/debug_frmwrk.c [code] | Contains some utilities that used for debugging through UART
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_adc.c [code] | Contains all functions support for ADC firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_can.c [code] | Contains all functions support for CAN firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_clkpwr.c [code] | Contains all functions support for Clock and Power Control firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_dac.c [code] | Contains all functions support for DAC firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_emac.c [code] |
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_exti.c [code] | Contains all functions support for External interrupt firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_gpdma.c [code] | Contains all functions support for GPDMA firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_gpio.c [code] | Contains all functions support for GPIO firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2c.c [code] |
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2s.c [code] |
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_libcfg_default.c [code] | Library configuration source file (default), used to build library without examples
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_mcpwm.c [code] | Contains all functions support for Motor Control PWM firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_nvic.c [code] | Contains all expansion functions support for NVIC firmware library on LPC17xx. The main NVIC functions are defined in core_cm3.h
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_pinsel.c [code] | Contains all functions support for Pin connect block firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_pwm.c [code] | Contains all functions support for PWM firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_qei.c [code] | Contains all functions support for QEI firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_rit.c [code] | Contains all functions support for RIT firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_rtc.c [code] | Contains all functions support for RTC firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_spi.c [code] | Contains all functions support for SPI firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_ssp.c [code] | Contains all functions support for SSP firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_systick.c [code] | Contains all functions support for SYSTICK firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_timer.c [code] | Contains all functions support for Timer firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_uart.c [code] | Contains all functions support for UART firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_wdt.c [code] | Contains all functions support for WDT firmware library on LPC17xx
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Burst/adc_burst_test.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Burst/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/DMA/adc_dma_test.c [code] | This example describes how to use ADC conversions and transfer converted data by using DMA
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/DMA/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/HardwareTrigger/adc_hardware_trigger_test.c [code] | This example describes how to use ADC conversion in hardware-triggered mode
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/HardwareTrigger/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/INTERRUPT/adc_interrupt_test.c [code] | This example describes how to use ADC conversion in burst mode
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/INTERRUPT/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Polling/adc_polling_test.c [code] | This example describes how to use ADC conversion in polling mode
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Polling/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_LedControl/can_ledcontrol.c [code] | This example describes how to use CAN frames to control LED display
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_LedControl/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_self_test/can_self_test.c [code] | This example used to test Self-test mode
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_self_test/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_aflut/can_test_aflut.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_aflut/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_bypass_mode/can_test_bypass_mode.c [code] | This example used to test Bypass mode
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_bypass_mode/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_two_kit/can_test_two_kit.c [code] | This example used to CAN operation in two board
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_two_kit/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Bit-banding/bitband.c [code] | This example used to test bit-banding feature of Cortex-M3 processor
C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Bit-banding/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/MPU/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/MPU/mpu_test.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Privilege_mode/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Privilege_mode/privilege.c [code] | This example used to test privilege feature of Cortex-M3 processor
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/DMA/dac_dma.c [code] | This example describes how to use DAC conversion and using DMA to transfer data
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/DMA/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/SineWave/dac_sinewave_test.c [code] | This example describes how to use DAC to generate a sine wave using DMA to transfer data
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/SineWave/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/Speaker/dac_speaker.c [code] | This example used to test DAC peripheral through speaker
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/Speaker/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/WaveGenerate/dac_wave_generate.c [code] | This example describes how to use DAC to generate a sine wave, triangle wave or escalator wave
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/WaveGenerate/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/ADC.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/ADC.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/easyweb.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/easyweb.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/EMAC.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/EMAC.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/Retarget.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/tcpip.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/tcpip.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/webpage.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/crc32.c [code] | Ethernet CRC module file for NXP LPC230x Family Microprocessors
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/crc32.h [code] | Ethernet CRC module file for NXP LPC230x Family Microprocessors
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/emactest.c [code] | This example used to test EMAC operation on LPC1768
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/libnosys_gnu.c [code] | Definitions for OS interface, stub function required by newlibc used by Codesourcery GNU compiler
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp-strings.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp-strings.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient-strings.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient-strings.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/http-strings.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/http-strings.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/webserver.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/printf-stdarg.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Retarget.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Serial.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/syscalls.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/clock-arch.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/clock-arch.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/emac.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/emac.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/main.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/uip-conf.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/clock.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc-addrlabels.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc-switch.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/pt.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-split.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-split.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arch.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uiplib.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uiplib.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uipopt.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Flash_2_Ram_Test/flash_2_ram.c [code] | This example used to test GPDMA function by transferring data from flash to ram memory
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Flash_2_Ram_Test/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/GPDMA_Sleep/gpdma_sleep.c [code] | This example used to test GPDMA operation in sleep mode
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/GPDMA_Sleep/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Link_list/link_list.c [code] | This example used to test GPDMA Link list function
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Link_list/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Ram_2_Ram_Test/gpdma_r2r_test.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Ram_2_Ram_Test/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/GPIO_Interrupt/gpio_int.c [code] | This example used to test GPIO interrupt function
C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/GPIO_Interrupt/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/LedBlinky/LedBlinky.c [code] | This example describes how to use GPIO interrupt to drive LEDs
C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/LedBlinky/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/master/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/master/master.c [code] | This example describes how to configure I2C as master device
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Master_Slave_Interrupt/i2c_master_slave_int_test.c [code] | This example describes how to uses two I2C peripheral on LPC1768 to communicate together. One set as master and the other set as slave
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Master_Slave_Interrupt/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Monitor/i2c_monitor.c [code] | This example describes how to uses I2C peripheral on LPC1768 in monitor mode
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Monitor/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/pca8581_polling/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/pca8581_polling/pca8581_test.c [code] | An example of I2C using polling mode to test the I2C driver. Using EEPROM PCA8581 to transfer a number of data byte
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_int/i2c_interrupt_test.c [code] | An example of I2C using interrupt mode to test the I2C driver. Using I2C at mode I2C master/8bit on LPC1766 to communicate with SC16IS750/760 Demo Board
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_int/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_polling/i2c_polling_test.c [code] | An example of I2C using polling mode to test the I2C driver. Using I2C at mode I2C master/8bit on LPC1766 to communicate with SC16IS750/760 Demo Board
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_polling/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/slave/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/slave/slave.c [code] | This example describes how to use I2C peripheral as a slave
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_DMA/i2s_dma_test.c [code] | This example describes how to use DMA mode to test the I2S driver
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_DMA/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_IRQ/i2s_irq_test.c [code] | This example describes how to use I2S transfer in interrupt mode
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_IRQ/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_MCLK/i2s_mclk.c [code] | This example describes how to test I2S master clock
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_MCLK/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_test_4_wire/i2s_test_4_wire.c [code] | This example describes how to use I2S 4-wire mode
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_test_4_wire/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_two_kit/i2s_two_kit.c [code] | This example describes how to use I2S transfer data between two board
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_two_kit/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/Polling/i2s_polling.c [code] | This example describes how to use I2S transfer in polling mode
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/Polling/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd_cnfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/glcd_ll.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/glcd_ll.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/lcdtest.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/NXP_logo.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/NXP_logo.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/Terminal_9_12x6.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/Font_24x16.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/GLCD.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/GLCD_SPI_LPC1700.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/lcdtest.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/MCPWM/MCPWMSimple/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/MCPWM/MCPWMSimple/mcpwm_simple.c [code] | This example used to test MCPWM driver
C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/Priority/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/Priority/nvic_priority.c [code] | This example used to test NVIC Grouping Priority function
C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/VecTable_Relocation/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/VecTable_Relocation/vt_relocation.c [code] | This example used to test NVIC Vector Table relocation function
C:/nxpdrv/LPC1700CMSIS/Examples/Project_Template/Eclipse_GNU/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/Project_Template/Eclipse_GNU/template.c [code] | A simple template for GNU example
C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Dual_Edge/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Dual_Edge/pwm_dual_edge.c [code] | This program illustrates the PWM signal on 3 Channels in both edge mode and single mode
C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Match_Interrupt/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Match_Interrupt/pwm_match_int.c [code] | PWM match interrupt example
C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Single_Edge/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Single_Edge/pwm_single_edge.c [code] | This program illustrates the PWM signal on 6 Channels in single edge mode
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/EXTINT_Sleep/extint_sleep.c [code] | This example describes how to enter the system in sleep mode and wake-up by using external interrupt
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/EXTINT_Sleep/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/NMI_PowerDown/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/NMI_PowerDown/nmi_powerdown.c [code] | This example describes how to enter the system in Power Down mode and wake-up by using NMI (Non-maskable Interrupt)
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/RTC_DeepPWD/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/RTC_DeepPWD/rtc_deeppwd.c [code] | This example describes how to enter the system in Deep PowerDown and wake-up by using RTC Interrupt
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/WDT_DeepSleep/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/WDT_DeepSleep/wdt_deepsleep.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/QEI/QEI_Velo/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/QEI/QEI_Velo/qei_test_velo.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/RIT/Interrupt/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/RIT/Interrupt/rit_interrupt.c [code] | This example used RIT to generate interrupt each 1s
C:/nxpdrv/LPC1700CMSIS/Examples/RTC/AlarmCntIncrInterrupt/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/RTC/AlarmCntIncrInterrupt/rtc_alarm_cntincr_int.c [code] | This example describes how to use RTC to generate interrupt in Second Counter Increment Interrupt (1s) and generate alarm interrupt at 10s
C:/nxpdrv/LPC1700CMSIS/Examples/RTC/Calibration/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/RTC/Calibration/rtc_calib.c [code] | This example describes how to calibrate real time clock
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/LoopBack/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/LoopBack/spi_loopback_test.c [code] | An example of SPI using polling mode with loop-back (MISO <-> MOSI)connection to test SPI driver
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Master/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Master/spi_master.c [code] | This example describes how to use SPI in master mode
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_int/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_int/spi_interrupt_test.c [code] | This example describes how to use SPI at mode SPI master/8bit on LPC1768 to communicate with SC16IS750/760 Demo board in interrupt mode
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_polling/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_polling/spi_polling_test.c [code] | This example describes how to use SPI at mode SPI master/8bit on LPC1768 to communicate with SC16IS750/760 Demo board in polling mode
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/SDCard/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/SDCard/spi_sdcard.c [code] | This example describes how to use SPI to read SD card's CID register
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Slave/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Slave/spi_slave.c [code] | This example describes how to use SPI in slave mode
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/dma/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/dma/ssp_dma.c [code] | This example describes how to use SPP in Master mode with loop-back mode (MOSI <-> MISO), using DMA for both Tx and Rx channel
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Master/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Master/ssp_master.c [code] | This example describes how to use SPP in master mode
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/MicroWire/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/MicroWire/microwire_test.c [code] | This example describes how to use SPP peripheral in MicroWire frame format
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_int/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_int/sc16is750_int.c [code] | This example describes how to use SPP using interrupt mode, SSP frame format to communicate with SC16IS750/760 Demo board
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_polling/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_polling/sc16is750_polling.c [code] | This example describes how to use SPP using polling mode, SSP frame format to communicate with SC16IS750/760 Demo board
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Slave/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Slave/ssp_slave.c [code] | This example describes how to use SPP in slave mode
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/TI/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/TI/ti_test.c [code] | This example describes how to use SPP using TI frame format (interrupt mode)
C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/10ms_base/10ms_base.c [code] | This example describes how to configure System Tick to generate interrupt each 10ms
C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/10ms_base/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/STCLK/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/STCLK/systick_stclk.c [code] | This example describes how to configure System Tick to use with external clock source STCLK
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Capture/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Capture/timer_capture.c [code] | This example describes how to use TIMER capture function
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/FreqMeasure/freqmeasure.c [code] | This example describes how to use Timer to measure a signal's frequency
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/FreqMeasure/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Delay/gen_diff_delay.c [code] | This example describes how to use TIMER0 and TIMER2 to generate 2 different delay signals
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Delay/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Freqs/gen_diff_freqs.c [code] | This example describes how to use TIMER0 and TIMER2 to generate 2 different frequency signals
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Freqs/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Interrupt_Match/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Interrupt_Match/timer_int_match.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Polling_Match/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Polling_Match/timer_poll_match.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/PWMSignal/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/PWMSignal/pwm_signal.c [code] | This example use TIMERs to generate 4 PWM signals with different duty cycle
C:/nxpdrv/LPC1700CMSIS/Examples/UART/AutoBaud/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/UART/AutoBaud/uart_autobaud_test.c [code] | This example describes how to configure UART using auto-baud rate in interrupt mode
C:/nxpdrv/LPC1700CMSIS/Examples/UART/DMA/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/UART/DMA/uart_dma_test.c [code] | This example describes how to using UART in DMA mode
C:/nxpdrv/LPC1700CMSIS/Examples/UART/HWFlowControl/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/UART/HWFlowControl/uart_hw_flow_control.c [code] | This example describes how to using UART Hardware flow control mode
C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/uart_interrupt_test.c [code] | This example describes how to using UART in interrupt mode
C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Receive/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Receive/uart_irda_receive.c [code] | This example describes how to using UART in irDA mode
C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Transmit/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Transmit/uart_irda_transmit.c [code] | This example describes how to using UART in irDA mode
C:/nxpdrv/LPC1700CMSIS/Examples/UART/Polling/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/UART/Polling/uart_polling_test.c [code] | This example describes how to using UART in polling mode
C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/rs485_master.c [code] | This example used to test RS485 functionality on UART1 of LPC1768.In this case, RS485 function on UART1 acts as Master on RS485 bus
C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/rs485_slave.c [code] | This example used to test RS485 functionality on UART1 of LPC1768.In this case, RS485 function on UART1 acts as SLave on RS485 bus
C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/uart_fullmodem_test.c [code] | This example describes how to use UART1 full-modem function
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/adcuser.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/adcuser.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/audio.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usb.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbaudio.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdesc.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdesc.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdmain.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbreg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbuser.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbuser.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdc.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usb.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbdesc.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbdesc.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbreg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbuser.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbuser.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/vcomdemo.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/vcomdemo.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/demo.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/demo.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hid.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hiduser.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hiduser.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usb.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbdesc.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbdesc.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbreg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbuser.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbuser.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/DiskImg.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/memory.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/memory.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/msc.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/mscuser.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/mscuser.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usb.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbdesc.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbdesc.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbreg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbuser.c [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbuser.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/WDT/INTERRUPT/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/WDT/INTERRUPT/wdt_interrupt_test.c [code] | This example describes how to use Watch-dog timer application in interrupt mode
C:/nxpdrv/LPC1700CMSIS/Examples/WDT/RESET/lpc17xx_libcfg.h [code] |
C:/nxpdrv/LPC1700CMSIS/Examples/WDT/RESET/wdt_reset_test.c [code] | This example describes how to use WDT in reset mode
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/_htmlsrc/ummainpage.h File Reference

C:/nxpdrv/LPC1700CMSIS/_htmlsrc/ummainpage.h File Reference

This file just used to dummy information for UM document generating. More...

Go to the source code of this file.

Detailed Description

This file just used to dummy information for UM document generating.

Author:
NXP MCU SW Application Team.
Date:
21 May 2010

Definition in file ummainpage.h.

Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_class_marks_example/arm_class_marks_example_f32.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_class_marks_example/arm_class_marks_example_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Defines

#define | USE_STATIC_INIT
#define | TEST_LENGTH_SAMPLES (20*4)
#define | NUMSTUDENTS 20
#define | NUMSUBJECTS 4

Functions

int32_t | main ()

Variables

const float32_t | testMarks_f32 [TEST_LENGTH_SAMPLES]
const float32_t | testUnity_f32 [4]
uint32_t | numStudents = 20
uint32_t | numSubjects = 4
float32_t max_marks
float32_t min_marks
float32_t mean
float32_t std
float32_t var
uint32_t | student_num

Define Documentation

#define NUMSTUDENTS 20

Definition at line 121 of file arm_class_marks_example_f32.c.

#define NUMSUBJECTS 4

Definition at line 122 of file arm_class_marks_example_f32.c.

#define TEST_LENGTH_SAMPLES (20*4)

Definition at line 73 of file arm_class_marks_example_f32.c.

#define USE_STATIC_INIT

Definition at line 67 of file arm_class_marks_example_f32.c.

Function Documentation

int32_t main ( void )

Definition at line 137 of file arm_class_marks_example_f32.c.

Variable Documentation

float32_t max_marks

Definition at line 130 of file arm_class_marks_example_f32.c.

float32_t mean

Definition at line 130 of file arm_class_marks_example_f32.c.

float32_t min_marks

Definition at line 130 of file arm_class_marks_example_f32.c.

uint32_t numStudents = 20

Definition at line 128 of file arm_class_marks_example_f32.c.

uint32_t numSubjects = 4

Definition at line 129 of file arm_class_marks_example_f32.c.

float32_t std

Definition at line 130 of file arm_class_marks_example_f32.c.

uint32_t student_num

Definition at line 131 of file arm_class_marks_example_f32.c.

const float32_t testMarks_f32[TEST_LENGTH_SAMPLES]
Initial value:
{
        42.000000,      37.000000,      81.000000,      28.000000,
        83.000000,      72.000000,      36.000000,      38.000000,
        32.000000,      51.000000,      63.000000,      64.000000,
        97.000000,      82.000000,      95.000000,      90.000000,
        66.000000,      51.000000,      54.000000,      42.000000,
        67.000000,      56.000000,      45.000000,      57.000000,
        67.000000,      69.000000,      35.000000,      52.000000,
        29.000000,      81.000000,      58.000000,      47.000000,
        38.000000,      76.000000,      100.000000,     29.000000,
        33.000000,      47.000000,      29.000000,      50.000000,
        34.000000,      41.000000,      61.000000,      46.000000,
        52.000000,      50.000000,      48.000000,      36.000000,
        47.000000,      55.000000,      44.000000,      40.000000,
        100.000000,     94.000000,      84.000000,      37.000000,
        32.000000,      71.000000,      47.000000,      77.000000,
        31.000000,      50.000000,      49.000000,      35.000000,
        63.000000,      67.000000,      40.000000,      31.000000,
        29.000000,      68.000000,      61.000000,      38.000000,
        31.000000,      28.000000,      28.000000,      76.000000,
        55.000000,      33.000000,      29.000000,      39.000000
}

Definition at line 78 of file arm_class_marks_example_f32.c.

const float32_t testUnity_f32[4]
Initial value:
{
        1.000,  1.000,  1.000,  1.000
}

Definition at line 106 of file arm_class_marks_example_f32.c.

float32_t var

Definition at line 130 of file arm_class_marks_example_f32.c.

Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_class_marks_example/system_ARMCM0.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_class_marks_example/system_ARMCM0.c File Reference
#include "ARMCM0.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM0.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM0.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM0.c.

Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_class_marks_example/system_ARMCM3.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_class_marks_example/system_ARMCM3.c File Reference
#include "ARMCM3.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM3.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM3.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM3.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_class_marks_example/system_ARMCM4.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_class_marks_example/system_ARMCM4.c File Reference
#include "ARMCM4.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM4.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM4.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM4.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_convolution_example/arm_convolution_example_f32.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_convolution_example/arm_convolution_example_f32.c File Reference
#include "arm_math.h"
#include "math_helper.h"

Go to the source code of this file.

Defines

#define | MAX_BLOCKSIZE 128
#define | DELTA (0.000001f)
#define | SNR_THRESHOLD 90

Functions

int32_t | main (void)

Variables

float32_t | Ak [MAX_BLOCKSIZE]
float32_t | Bk [MAX_BLOCKSIZE]
float32_t | AxB [MAX_BLOCKSIZE *2]
float32_t | testInputA_f32 [64]
float32_t | testInputB_f32 [64]
const float | testRefOutput_f32 [126]
uint32_t | srcALen = 64
uint32_t | srcBLen = 64
uint32_t | outLen
float32_t snr

Define Documentation

#define DELTA (0.000001f)

Definition at line 93 of file arm_convolution_example_f32.c.

#define MAX_BLOCKSIZE 128

Definition at line 92 of file arm_convolution_example_f32.c.

#define SNR_THRESHOLD 90

Definition at line 94 of file arm_convolution_example_f32.c.

Function Documentation

int32_t main ( void )

Definition at line 172 of file arm_convolution_example_f32.c.

Variable Documentation

float32_t Ak[MAX_BLOCKSIZE]

Definition at line 99 of file arm_convolution_example_f32.c.

float32_t AxB[MAX_BLOCKSIZE *2]

Definition at line 101 of file arm_convolution_example_f32.c.

float32_t Bk[MAX_BLOCKSIZE]

Definition at line 100 of file arm_convolution_example_f32.c.

uint32_t outLen

Definition at line 169 of file arm_convolution_example_f32.c.

float32_t snr

Definition at line 170 of file arm_convolution_example_f32.c.

uint32_t srcALen = 64

Definition at line 167 of file arm_convolution_example_f32.c.

uint32_t srcBLen = 64

Definition at line 168 of file arm_convolution_example_f32.c.

float32_t testInputA_f32[64]
Initial value:
{
-0.808920,      1.357369,       1.180861,       -0.504544,      1.762637,       -0.703285,
1.696966,       0.620571,       -0.151093,      -0.100235,      -0.872382,      -0.403579,
-0.860749,      -0.382648,      -1.052338,      0.128113,       -0.646269,      1.093377,
-2.209198,      0.471706,       0.408901,       1.266242,       0.598252,       1.176827,
-0.203421,      0.213596,       -0.851964,      -0.466958,      0.021841,       -0.698938,
-0.604107,      0.461778,       -0.318219,      0.942520,       0.577585,       0.417619,
0.614665,       0.563679,       -1.295073,      -0.764437,      0.952194,       -0.859222,
-0.618554,      -2.268542,      -1.210592,      1.655853,       -2.627219,      -0.994249,
-1.374704,      0.343799,       0.025619,       1.227481,       -0.708031,      0.069355,
-1.845228,      -1.570886,      1.010668,       -1.802084,      1.630088,       1.286090,
-0.161050,      -0.940794,      0.367961,       0.291907

}

Definition at line 107 of file arm_convolution_example_f32.c.

float32_t testInputB_f32[64]
Initial value:
{
0.933724,       0.046881,       1.316470,       0.438345,       0.332682,       2.094885,
0.512081,       0.035546,       0.050894,       -2.320371,      0.168711,       -1.830493,
-0.444834,      -1.003242,      -0.531494,      -1.365600,      -0.155420,      -0.757692,
-0.431880,      -0.380021,      0.096243,       -0.695835,      0.558850,       -1.648962,
0.020369,       -0.363630,      0.887146,       0.845503,       -0.252864,      -0.330397,
1.269131,       -1.109295,      -1.027876,      0.135940,       0.116721,       -0.293399,
-1.349799,      0.166078,       -0.802201,      0.369367,       -0.964568,      -2.266011,
0.465178,       0.651222,       -0.325426,      0.320245,       -0.784178,      -0.579456,
0.093374,       0.604778,       -0.048225,      0.376297,       -0.394412,      0.578182,
-1.218141,      -1.387326,      0.692462,       -0.631297,      0.153137,       -0.638952,
0.635474,       -0.970468,      1.334057,       -0.111370
}

Definition at line 123 of file arm_convolution_example_f32.c.

const float testRefOutput_f32[126]
Initial value:
{
-0.818943,      1.229484,       -0.533664,      1.016604,       0.341875,       -1.963656,
5.171476,       3.478033,       7.616361,       6.648384,       0.479069,       1.792012,
-1.295591,      -7.447818,      0.315830,       -10.657445,     -2.483469,      -6.524236,
-7.380591,      -3.739005,      -8.388957,      0.184147,       -1.554888,      3.786508,
-1.684421,      5.400610,       -1.578126,      7.403361,       8.315999,       2.080267,
11.077776,      2.749673,       7.138962,       2.748762,       0.660363,       0.981552,
1.442275,       0.552721,       -2.576892,      4.703989,       0.989156,       8.759344,
-0.564825,      -3.994680,      0.954710,       -5.014144,      6.592329,       1.599488,
-13.979146,     -0.391891,      -4.453369,      -2.311242,      -2.948764,      1.761415,
-0.138322,      10.433007,      -2.309103,      4.297153,       8.535523,       3.209462,
8.695819,       5.569919,       2.514304,       5.582029,       2.060199,       0.642280,
7.024616,       1.686615,       -6.481756,      1.343084,       -3.526451,      1.099073,
-2.965764,      -0.173723,      -4.111484,      6.528384,       -6.965658,      1.726291,
1.535172,       11.023435,      2.338401,       -4.690188,      1.298210,       3.943885,
8.407885,       5.168365,       0.684131,       1.559181,       1.859998,       2.852417,
8.574070,       -6.369078,      6.023458,       11.837963,      -6.027632,      4.469678,
-6.799093,      -2.674048,      6.250367,       -6.809971,      -3.459360,      9.112410,
-2.711621,      -1.336678,      1.564249,       -1.564297,      -1.296760,      8.904013,
-3.230109,      6.878013,       -7.819823,      3.369909,       -1.657410,      -2.007358,
-4.112825,      1.370685,       -3.420525,      -6.276605,      3.244873,       -3.352638,
1.545372,       0.902211,       0.197489,       -1.408732,      0.523390,       0.348440
}

Definition at line 138 of file arm_convolution_example_f32.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM0.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM0.c File Reference
#include "ARMCM0.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM0.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM0.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM0.c.

Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM3.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM3.c File Reference
#include "ARMCM3.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM3.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM3.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM3.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM4.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM4.c File Reference
#include "ARMCM4.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM4.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM4.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM4.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_dotproduct_example/arm_dotproduct_example_f32.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_dotproduct_example/arm_dotproduct_example_f32.c File Reference
#include <math.h>
#include "arm_math.h"

Go to the source code of this file.

Defines

#define | MAX_BLOCKSIZE 32
#define | DELTA (0.000001f)

Functions

int32_t | main (void)

Variables

float32_t | srcA_buf_f32 [MAX_BLOCKSIZE]
float32_t | srcB_buf_f32 [MAX_BLOCKSIZE]
float32_t | refDotProdOut = 5.9273644806352142
float32_t | multOutput [MAX_BLOCKSIZE]
float32_t testOutput
arm_status status

Define Documentation

#define DELTA (0.000001f)

Definition at line 73 of file arm_dotproduct_example_f32.c.

#define MAX_BLOCKSIZE 32

Definition at line 72 of file arm_dotproduct_example_f32.c.

Function Documentation

int32_t main ( void )

Definition at line 126 of file arm_dotproduct_example_f32.c.

Variable Documentation

float32_t multOutput[MAX_BLOCKSIZE]

Definition at line 121 of file arm_dotproduct_example_f32.c.

float32_t refDotProdOut = 5.9273644806352142

Definition at line 116 of file arm_dotproduct_example_f32.c.

float32_t srcA_buf_f32[MAX_BLOCKSIZE]
Initial value:
{
-0.4325648115282207,    -1.6655843782380970,    0.1253323064748307,
 0.2876764203585489,    -1.1464713506814637,    1.1909154656429988,
 1.1891642016521031,    -0.0376332765933176,    0.3272923614086541,
 0.1746391428209245,    -0.1867085776814394,    0.7257905482933027,
-0.5883165430141887,     2.1831858181971011,   -0.1363958830865957,
 0.1139313135208096,     1.0667682113591888,    0.0592814605236053,
-0.0956484054836690,    -0.8323494636500225,    0.2944108163926404,
-1.3361818579378040,     0.7143245518189522,    1.6235620644462707,
-0.6917757017022868,     0.8579966728282626,    1.2540014216025324,
-1.5937295764474768,    -1.4409644319010200,    0.5711476236581780,
-0.3998855777153632,     0.6899973754643451
}

Definition at line 82 of file arm_dotproduct_example_f32.c.

float32_t srcB_buf_f32[MAX_BLOCKSIZE]
Initial value:
{
 1.7491401329284098,    0.1325982188803279,      0.3252281811989881,
-0.7938091410349637,    0.3149236145048914,     -0.5272704888029532,
 0.9322666565031119,    1.1646643544607362,     -2.0456694357357357,
-0.6443728590041911,    1.7410657940825480,      0.4867684246821860,
 1.0488288293660140,    1.4885752747099299,      1.2705014969484090,
-1.8561241921210170,    2.1343209047321410,  1.4358467535865909,
-0.9173023332875400,   -1.1060770780029008,      0.8105708062681296,
 0.6985430696369063,   -0.4015827425012831,      1.2687512030669628,
-0.7836083053674872,    0.2132664971465569,      0.7878984786088954,
 0.8966819356782295,   -0.1869172943544062,      1.0131816724341454,
 0.2484350696132857,    0.0596083377937976
}

Definition at line 100 of file arm_dotproduct_example_f32.c.

arm_status status

Definition at line 124 of file arm_dotproduct_example_f32.c.

float32_t testOutput

Definition at line 122 of file arm_dotproduct_example_f32.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_dotproduct_example/system_ARMCM0.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_dotproduct_example/system_ARMCM0.c File Reference
#include "ARMCM0.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM0.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM0.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM0.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_dotproduct_example/system_ARMCM3.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_dotproduct_example/system_ARMCM3.c File Reference
#include "ARMCM3.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM3.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM3.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM3.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_dotproduct_example/system_ARMCM4.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_dotproduct_example/system_ARMCM4.c File Reference
#include "ARMCM4.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM4.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM4.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM4.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/arm_fft_bin_data.c File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/arm_fft_bin_data.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Variables

float32_t testInput_f32_10khz [2048]

Variable Documentation

float32_t testInput_f32_10khz[2048]

Definition at line 7 of file arm_fft_bin_data.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/arm_fft_bin_example_f32.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/arm_fft_bin_example_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Defines

#define | TEST_LENGTH_SAMPLES 2048

Functions

int32_t | main (void)

Variables

float32_t | testInput_f32_10khz [TEST_LENGTH_SAMPLES]
uint32_t | fftSize = 1024
uint32_t | ifftFlag = 0
uint32_t | doBitReverse = 1
uint32_t | refIndex = 213
uint32_t | testIndex = 0

Define Documentation

#define TEST_LENGTH_SAMPLES 2048

Definition at line 79 of file arm_fft_bin_example_f32.c.

Function Documentation

int32_t main ( void )

Definition at line 101 of file arm_fft_bin_example_f32.c.

Variable Documentation

uint32_t doBitReverse = 1

Definition at line 92 of file arm_fft_bin_example_f32.c.

uint32_t fftSize = 1024

Definition at line 90 of file arm_fft_bin_example_f32.c.

uint32_t ifftFlag = 0

Definition at line 91 of file arm_fft_bin_example_f32.c.

uint32_t refIndex = 213

Definition at line 95 of file arm_fft_bin_example_f32.c.

uint32_t testIndex = 0

Definition at line 95 of file arm_fft_bin_example_f32.c.

float32_t testInput_f32_10khz[TEST_LENGTH_SAMPLES]

Definition at line 7 of file arm_fft_bin_data.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM0.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM0.c File Reference
#include "ARMCM0.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM0.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM0.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM0.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM3.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM3.c File Reference
#include "ARMCM3.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM3.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM3.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM3.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM4.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM4.c File Reference
#include "ARMCM4.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM4.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM4.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM4.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/arm_fir_data.c File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/arm_fir_data.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Variables

float32_t | testInput_f32_1kHz_15kHz [320]
float32_t | refOutput [320]

Variable Documentation

float32_t refOutput[320]

Definition at line 51 of file arm_fir_data.c.

float32_t testInput_f32_1kHz_15kHz[320]

Definition at line 7 of file arm_fir_data.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/arm_fir_example_f32.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/arm_fir_example_f32.c File Reference
#include "arm_math.h"
#include "math_helper.h"

Go to the source code of this file.

Defines

#define | TEST_LENGTH_SAMPLES 320
#define | SNR_THRESHOLD_F32 140.0f
#define | BLOCK_SIZE 32
#define | NUM_TAPS 29

Functions

int32_t | main (void)

Variables

float32_t | testInput_f32_1kHz_15kHz [TEST_LENGTH_SAMPLES]
float32_t | refOutput [TEST_LENGTH_SAMPLES]
const float32_t | firCoeffs32 [NUM_TAPS]
uint32_t | blockSize = BLOCK_SIZE
uint32_t | numBlocks = TEST_LENGTH_SAMPLES/BLOCK_SIZE
float32_t snr

Define Documentation

#define BLOCK_SIZE 32

Definition at line 115 of file arm_fir_example_f32.c.

#define NUM_TAPS 29

Definition at line 116 of file arm_fir_example_f32.c.

#define SNR_THRESHOLD_F32 140.0f

Definition at line 114 of file arm_fir_example_f32.c.

#define TEST_LENGTH_SAMPLES 320

Definition at line 113 of file arm_fir_example_f32.c.

Function Documentation

int32_t main ( void )

Definition at line 163 of file arm_fir_example_f32.c.

Variable Documentation

uint32_t blockSize = BLOCK_SIZE

Definition at line 154 of file arm_fir_example_f32.c.

const float32_t firCoeffs32[NUM_TAPS]
Initial value:
 {
-0.0018225230f, -0.0015879294f, +0.0000000000f, +0.0036977508f, +0.0080754303f, +0.0085302217f, -0.0000000000f, -0.0173976984f,
-0.0341458607f, -0.0333591565f, +0.0000000000f, +0.0676308395f, +0.1522061835f, +0.2229246956f, +0.2504960933f, +0.2229246956f,
+0.1522061835f, +0.0676308395f, +0.0000000000f, -0.0333591565f, -0.0341458607f, -0.0173976984f, -0.0000000000f, +0.0085302217f,
+0.0080754303f, +0.0036977508f, +0.0000000000f, -0.0015879294f, -0.0018225230f
}

Definition at line 143 of file arm_fir_example_f32.c.

uint32_t numBlocks = TEST_LENGTH_SAMPLES/BLOCK_SIZE

Definition at line 155 of file arm_fir_example_f32.c.

float32_t refOutput[TEST_LENGTH_SAMPLES]

Definition at line 51 of file arm_fir_data.c.

float32_t snr

Definition at line 157 of file arm_fir_example_f32.c.

float32_t testInput_f32_1kHz_15kHz[TEST_LENGTH_SAMPLES]

Definition at line 7 of file arm_fir_data.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM0.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM0.c File Reference
#include "ARMCM0.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM0.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM0.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM0.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM3.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM3.c File Reference
#include "ARMCM3.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM3.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM3.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM3.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM4.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM4.c File Reference
#include "ARMCM4.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM4.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM4.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM4.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/arm_graphic_equalizer_data.c File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/arm_graphic_equalizer_data.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Variables

float32_t | testRefOutput_f32 [320]
float32_t | testInput_f32 [320]

Variable Documentation

float32_t testInput_f32[320]

Definition at line 51 of file arm_graphic_equalizer_data.c.

float32_t testRefOutput_f32[320]

Definition at line 3 of file arm_graphic_equalizer_data.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/arm_graphic_equalizer_example_q31.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/arm_graphic_equalizer_example_q31.c File Reference
#include "arm_math.h"
#include "math_helper.h"

Go to the source code of this file.

Defines

#define | TESTLENGTH 320
#define | BLOCKSIZE 32
#define | NUMBLOCKS (TESTLENGTH/BLOCKSIZE)
#define | NUMSTAGES 2
#define | SNR_THRESHOLD_F32 98

Functions

int32_t | main (void)

Variables

float32_t | testInput_f32 [TESTLENGTH]
float32_t | testRefOutput_f32 [TESTLENGTH]
q31_t | inputQ31 [BLOCKSIZE]
q31_t | outputQ31 [BLOCKSIZE]
const q31_t | coeffTable [950]
int | gainDB [5] = {0, -3, 6, 4, -6}
float32_t snr

Define Documentation

#define BLOCKSIZE 32

Definition at line 116 of file arm_graphic_equalizer_example_q31.c.

#define NUMBLOCKS (TESTLENGTH/BLOCKSIZE)

Definition at line 119 of file arm_graphic_equalizer_example_q31.c.

#define NUMSTAGES 2

Definition at line 122 of file arm_graphic_equalizer_example_q31.c.

#define SNR_THRESHOLD_F32 98

Definition at line 124 of file arm_graphic_equalizer_example_q31.c.

#define TESTLENGTH 320

Definition at line 113 of file arm_graphic_equalizer_example_q31.c.

Function Documentation

int32_t main ( void )

Definition at line 281 of file arm_graphic_equalizer_example_q31.c.

Variable Documentation

const q31_t coeffTable[950]

Definition at line 163 of file arm_graphic_equalizer_example_q31.c.

int gainDB[5] = {0, -3, 6, 4, -6}

Definition at line 272 of file arm_graphic_equalizer_example_q31.c.

q31_t inputQ31[BLOCKSIZE]

Definition at line 149 of file arm_graphic_equalizer_example_q31.c.

q31_t outputQ31[BLOCKSIZE]

Definition at line 150 of file arm_graphic_equalizer_example_q31.c.

float32_t snr

Definition at line 274 of file arm_graphic_equalizer_example_q31.c.

float32_t testInput_f32[TESTLENGTH]

Definition at line 51 of file arm_graphic_equalizer_data.c.

float32_t testRefOutput_f32[TESTLENGTH]

Definition at line 138 of file arm_convolution_example_f32.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM0.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM0.c File Reference
#include "ARMCM0.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM0.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM0.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM0.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM3.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM3.c File Reference
#include "ARMCM3.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM3.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM3.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM3.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM4.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM4.c File Reference
#include "ARMCM4.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM4.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM4.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM4.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/arm_linear_interp_data.c File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/arm_linear_interp_data.c File Reference

Go to the source code of this file.

Variables

const float arm_linear_interep_table [188495]

Variable Documentation

const float arm_linear_interep_table[188495]

Definition at line 9 of file arm_linear_interp_data.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/arm_linear_interp_example_f32.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/arm_linear_interp_example_f32.c File Reference
#include "arm_math.h"
#include "math_helper.h"

Go to the source code of this file.

Defines

#define | SNR_THRESHOLD 90
#define | TEST_LENGTH_SAMPLES 10
#define | XSPACING (0.00005f)

Functions

int32_t | main (void)

Variables

float32_t | testInputSin_f32 [TEST_LENGTH_SAMPLES]
float32_t | testRefSinOutput32_f32 [TEST_LENGTH_SAMPLES]
float32_t | testOutput [TEST_LENGTH_SAMPLES]
float32_t | testLinIntOutput [TEST_LENGTH_SAMPLES]
float32_t | arm_linear_interep_table [188495]
float32_t snr1
float32_t snr2

Define Documentation

#define SNR_THRESHOLD 90

Definition at line 70 of file arm_linear_interp_example_f32.c.

#define TEST_LENGTH_SAMPLES 10

Definition at line 71 of file arm_linear_interp_example_f32.c.

#define XSPACING (0.00005f)

Definition at line 72 of file arm_linear_interp_example_f32.c.

Function Documentation

int32_t main ( void )

Definition at line 120 of file arm_linear_interp_example_f32.c.

Variable Documentation

float32_t arm_linear_interep_table[188495]

Definition at line 9 of file arm_linear_interp_data.c.

float32_t snr1

Definition at line 114 of file arm_linear_interp_example_f32.c.

float32_t snr2

Definition at line 115 of file arm_linear_interp_example_f32.c.

float32_t testInputSin_f32[TEST_LENGTH_SAMPLES]
Initial value:
{
        -0.649716504673081170,  -2.501723745497831200,  0.188250329003310100,   0.432092748487532540,   -1.722010988459680800,  1.788766476323060600,   1.786136060975809500,   -0.056525543169408797,
        0.491596272728153760,   0.262309671126153390
}

Definition at line 80 of file arm_linear_interp_example_f32.c.

float32_t testLinIntOutput[TEST_LENGTH_SAMPLES]

Definition at line 104 of file arm_linear_interp_example_f32.c.

float32_t testOutput[TEST_LENGTH_SAMPLES]

Definition at line 99 of file arm_linear_interp_example_f32.c.

float32_t testRefSinOutput32_f32[TEST_LENGTH_SAMPLES]
Initial value:
{
        -0.604960695383043530,  -0.597090287967934840,  0.187140422442966500,   0.418772124875992690,   -0.988588831792106880,  0.976338412038794010,   0.976903856413481100,   -0.056495446835214236,
        0.472033731854734240,   0.259311907228582830
}

Definition at line 90 of file arm_linear_interp_example_f32.c.

Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM0.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM0.c File Reference
#include "ARMCM0.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM0.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM0.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM0.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM3.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM3.c File Reference
#include "ARMCM3.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM3.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM3.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM3.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM4.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM4.c File Reference
#include "ARMCM4.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM4.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM4.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM4.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_matrix_example/arm_matrix_example_f32.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_matrix_example/arm_matrix_example_f32.c File Reference
#include "arm_math.h"
#include "math_helper.h"

Go to the source code of this file.

Defines

#define | SNR_THRESHOLD 90

Functions

int32_t | main (void)

Variables

const float32_t | B_f32 [4]
const float32_t | A_f32 [16]
float32_t | AT_f32 [16]
float32_t | ATMA_f32 [16]
float32_t | ATMAI_f32 [16]
float32_t | X_f32 [4]
const float32_t | xRef_f32 [4] = {73.0, 8.0, 21.25, 2.875}
float32_t snr

Define Documentation

#define SNR_THRESHOLD 90

Definition at line 77 of file arm_matrix_example_f32.c.

Function Documentation

int32_t main ( void )

Definition at line 127 of file arm_matrix_example_f32.c.

Variable Documentation

const float32_t A_f32[16]
Initial value:
{

        1.0,            32.0,           4.0,            128.0,
        1.0,            32.0,           64.0,           2048.0,
        1.0,            16.0,           4.0,            64.0,
        1.0,            16.0,           64.0,           1024.0,
}

Definition at line 93 of file arm_matrix_example_f32.c.

float32_t AT_f32[16]

Definition at line 107 of file arm_matrix_example_f32.c.

float32_t ATMA_f32[16]

Definition at line 109 of file arm_matrix_example_f32.c.

float32_t ATMAI_f32[16]

Definition at line 111 of file arm_matrix_example_f32.c.

const float32_t B_f32[4]
Initial value:
{
        782.0, 7577.0, 470.0, 4505.0
}

Definition at line 84 of file arm_matrix_example_f32.c.

float32_t snr

Definition at line 120 of file arm_matrix_example_f32.c.

float32_t X_f32[4]

Definition at line 113 of file arm_matrix_example_f32.c.

const float32_t xRef_f32[4] = {73.0, 8.0, 21.25, 2.875}

Definition at line 118 of file arm_matrix_example_f32.c.

Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_matrix_example/system_ARMCM0.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_matrix_example/system_ARMCM0.c File Reference
#include "ARMCM0.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM0.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM0.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM0.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_matrix_example/system_ARMCM3.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_matrix_example/system_ARMCM3.c File Reference
#include "ARMCM3.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM3.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM3.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM3.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_matrix_example/system_ARMCM4.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_matrix_example/system_ARMCM4.c File Reference
#include "ARMCM4.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM4.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM4.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM4.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/arm_signal_converge_data.c File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/arm_signal_converge_data.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Variables

float32_t | testInput_f32 [1536]
float32_t | lmsNormCoeff_f32 [32]
const float32_t | FIRCoeff_f32 [32]

Variable Documentation

const float32_t FIRCoeff_f32[32]
Initial value:
 {
0.004502,       0.005074,       0.006707,       0.009356,       0.012933,       0.017303,       0.022298,       0.027717,
0.033338,       0.038930,       0.044258,       0.049098,       0.053243,       0.056519,       0.058784,       0.059941,
0.059941,       0.058784,       0.056519,       0.053243,       0.049098,       0.044258,       0.038930,       0.033338,
0.027717,       0.022298,       0.017303,       0.012933,       0.009356,       0.006707,       0.005074,       0.004502

}

Definition at line 222 of file arm_signal_converge_data.c.

float32_t lmsNormCoeff_f32[32]
Initial value:
 {
-0.004240,      0.002301,       0.008860,       -0.000000,      -0.019782,      -0.010543,      0.032881,       0.034736,
-0.037374,      -0.069586,      0.022397,       0.102169,       0.014185,       -0.115908,      -0.061648,      0.101018,
0.101018,       -0.061648,      -0.115908,      0.014185,       0.102169,       0.022397,       -0.069586,      -0.037374,
0.034736,       0.032881,       -0.010543,      -0.019782,      -0.000000,      0.008860,       0.002301,       -0.004240

}

Definition at line 210 of file arm_signal_converge_data.c.

float32_t testInput_f32[1536]

Definition at line 8 of file arm_signal_converge_data.c.

Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/arm_signal_converge_example_f32.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/arm_signal_converge_example_f32.c File Reference
#include "arm_math.h"
#include "math_helper.h"

Go to the source code of this file.

Defines

#define | TEST_LENGTH_SAMPLES 1536
#define | NUMTAPS 32
#define | BLOCKSIZE 32
#define | DELTA_ERROR 0.000001f
#define | DELTA_COEFF 0.0001f
#define | MU 0.5f
#define | NUMFRAMES (TEST_LENGTH_SAMPLES / BLOCKSIZE)

Functions

arm_status | test_signal_converge_example (void)
arm_status | test_signal_converge (float32_t *err_signal, uint32_t blockSize)
void | getinput (float32_t *input, uint32_t fr_cnt, uint32_t blockSize)
int32_t | main (void)

Variables

float32_t | firStateF32 [NUMTAPS+BLOCKSIZE]
arm_fir_instance_f32 LPF_instance
float32_t | lmsStateF32 [NUMTAPS+BLOCKSIZE]
float32_t | errOutput [TEST_LENGTH_SAMPLES]
arm_lms_norm_instance_f32 lmsNorm_instance
float32_t | testInput_f32 [TEST_LENGTH_SAMPLES]
float32_t | lmsNormCoeff_f32 [32]
const float32_t | FIRCoeff_f32 [32]
float32_t | wire1 [BLOCKSIZE]
float32_t | wire2 [BLOCKSIZE]
float32_t | wire3 [BLOCKSIZE]
float32_t | err_signal [BLOCKSIZE]

Define Documentation

#define BLOCKSIZE 32

Definition at line 99 of file arm_signal_converge_example_f32.c.

#define DELTA_COEFF 0.0001f

Definition at line 101 of file arm_signal_converge_example_f32.c.

#define DELTA_ERROR 0.000001f

Definition at line 100 of file arm_signal_converge_example_f32.c.

#define MU 0.5f

Definition at line 102 of file arm_signal_converge_example_f32.c.

#define NUMFRAMES (TEST_LENGTH_SAMPLES / BLOCKSIZE)

Definition at line 104 of file arm_signal_converge_example_f32.c.

#define NUMTAPS 32

Definition at line 98 of file arm_signal_converge_example_f32.c.

#define TEST_LENGTH_SAMPLES 1536

Definition at line 97 of file arm_signal_converge_example_f32.c.

Function Documentation

void getinput | ( | float32_t * | input,
 |  | uint32_t | fr_cnt,
 |  | uint32_t | blockSize
 | ) |  |
int32_t main ( void )

Definition at line 160 of file arm_signal_converge_example_f32.c.

arm_status test_signal_converge | ( | float32_t * | err_signal,
 |  | uint32_t | blockSize
 | ) |  |
arm_status test_signal_converge_example ( void )

Variable Documentation

float32_t err_signal[BLOCKSIZE]

Definition at line 154 of file arm_signal_converge_example_f32.c.

float32_t errOutput[TEST_LENGTH_SAMPLES]

Definition at line 118 of file arm_signal_converge_example_f32.c.

const float32_t FIRCoeff_f32[32]

Definition at line 222 of file arm_signal_converge_data.c.

float32_t firStateF32[NUMTAPS+BLOCKSIZE]

Definition at line 110 of file arm_signal_converge_example_f32.c.

arm_lms_norm_instance_f32 lmsNorm_instance

Definition at line 119 of file arm_signal_converge_example_f32.c.

float32_t lmsNormCoeff_f32[32]

Definition at line 210 of file arm_signal_converge_data.c.

float32_t lmsStateF32[NUMTAPS+BLOCKSIZE]

Definition at line 117 of file arm_signal_converge_example_f32.c.

arm_fir_instance_f32 LPF_instance

Definition at line 111 of file arm_signal_converge_example_f32.c.

float32_t testInput_f32[TEST_LENGTH_SAMPLES]

Definition at line 51 of file arm_graphic_equalizer_data.c.

float32_t wire1[BLOCKSIZE]

Definition at line 151 of file arm_signal_converge_example_f32.c.

float32_t wire2[BLOCKSIZE]

Definition at line 152 of file arm_signal_converge_example_f32.c.

float32_t wire3[BLOCKSIZE]

Definition at line 153 of file arm_signal_converge_example_f32.c.

Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM0.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM0.c File Reference
#include "ARMCM0.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM0.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM0.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM0.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM3.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM3.c File Reference
#include "ARMCM3.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM3.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM3.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM3.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM4.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM4.c File Reference
#include "ARMCM4.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM4.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM4.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM4.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/arm_sin_cos_example_f32.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/arm_sin_cos_example_f32.c File Reference
#include <math.h>
#include "arm_math.h"

Go to the source code of this file.

Defines

#define | MAX_BLOCKSIZE 32
#define | DELTA (0.000001f)

Functions

int32_t | main (void)

Variables

const float32_t | testInput_f32 [MAX_BLOCKSIZE]
const float32_t | testRefOutput_f32 = 1.000000000
uint32_t | blockSize = 32
float32_t testOutput
float32_t cosOutput
float32_t sinOutput
float32_t cosSquareOutput
float32_t sinSquareOutput
arm_status status

Define Documentation

#define DELTA (0.000001f)

Definition at line 72 of file arm_sin_cos_example_f32.c.

#define MAX_BLOCKSIZE 32

Definition at line 71 of file arm_sin_cos_example_f32.c.

Function Documentation

int32_t main ( void )

Definition at line 108 of file arm_sin_cos_example_f32.c.

Variable Documentation

uint32_t blockSize = 32

Definition at line 95 of file arm_sin_cos_example_f32.c.

float32_t cosOutput

Definition at line 97 of file arm_sin_cos_example_f32.c.

float32_t cosSquareOutput

Definition at line 99 of file arm_sin_cos_example_f32.c.

float32_t sinOutput

Definition at line 98 of file arm_sin_cos_example_f32.c.

float32_t sinSquareOutput

Definition at line 100 of file arm_sin_cos_example_f32.c.

arm_status status

Definition at line 106 of file arm_sin_cos_example_f32.c.

const float32_t testInput_f32[MAX_BLOCKSIZE]
Initial value:
{
        -1.244916875853235400,  -4.793533929171324800,  0.360705030233248850,   0.827929644170887320,   -3.299532218312426900,  3.427441903227623800,   3.422401784294607700,   -0.108308165334010680,
        0.941943896490312180,   0.502609575000365850,   -0.537345278736373500,  2.088817392965764500,   -1.693168684143455700,  6.283185307179590700,   -0.392545884746175080,  0.327893095115825040,
        3.070147440456292300,   0.170611405884662230,   -0.275275082396073010,  -2.395492805446796300,  0.847311163536506600,   -3.845517018083148800,  2.055818378415868300,   4.672594161978930800,
        -1.990923030266425800,  2.469305197656249500,   3.609002606064021000,   -4.586736582331667500,  -4.147080139136136300,  1.643756718868359500,   -1.150866392366494800,  1.985805026477433800

}

Definition at line 80 of file arm_sin_cos_example_f32.c.

float32_t testOutput

Definition at line 96 of file arm_sin_cos_example_f32.c.

const float32_t testRefOutput_f32 = 1.000000000

Definition at line 90 of file arm_sin_cos_example_f32.c.

Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM0.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM0.c File Reference
#include "ARMCM0.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM0.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM0.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM0.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM3.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM3.c File Reference
#include "ARMCM3.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM3.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM3.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM3.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM4.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM4.c File Reference
#include "ARMCM4.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM4.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM4.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM4.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_variance_example/arm_variance_example_f32.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_variance_example/arm_variance_example_f32.c File Reference
#include <math.h>
#include "arm_math.h"

Go to the source code of this file.

Defines

#define | MAX_BLOCKSIZE 32
#define | DELTA (0.000001f)

Functions

int32_t | main (void)

Variables

float32_t | wire1 [MAX_BLOCKSIZE]
float32_t | wire2 [MAX_BLOCKSIZE]
float32_t | wire3 [MAX_BLOCKSIZE]
float32_t | testInput_f32 [32]
uint32_t | blockSize = 32
float32_t | refVarianceOut = 0.903941793931839

Define Documentation

#define DELTA (0.000001f)

Definition at line 82 of file arm_variance_example_f32.c.

#define MAX_BLOCKSIZE 32

Definition at line 81 of file arm_variance_example_f32.c.

Function Documentation

int32_t main ( void )

Definition at line 120 of file arm_variance_example_f32.c.

Variable Documentation

uint32_t blockSize = 32

Definition at line 113 of file arm_variance_example_f32.c.

float32_t refVarianceOut = 0.903941793931839

Definition at line 114 of file arm_variance_example_f32.c.

float32_t testInput_f32[32]
Initial value:
{
-0.432564811528221,     -1.665584378238097,     0.125332306474831,              0.287676420358549,
-1.146471350681464,     1.190915465642999,              1.189164201652103,              -0.037633276593318,
0.327292361408654,              0.174639142820925,              -0.186708577681439,     0.725790548293303,
-0.588316543014189,     2.183185818197101,              -0.136395883086596,     0.113931313520810,
1.066768211359189,              0.059281460523605,              -0.095648405483669,     -0.832349463650022,
0.294410816392640,              -1.336181857937804,     0.714324551818952,              1.623562064446271,
-0.691775701702287,     0.857996672828263,              1.254001421602532,              -1.593729576447477,
-1.440964431901020,     0.571147623658178,              -0.399885577715363,     0.689997375464345

}

Definition at line 97 of file arm_variance_example_f32.c.

float32_t wire1[MAX_BLOCKSIZE]

Definition at line 88 of file arm_variance_example_f32.c.

float32_t wire2[MAX_BLOCKSIZE]

Definition at line 89 of file arm_variance_example_f32.c.

float32_t wire3[MAX_BLOCKSIZE]

Definition at line 90 of file arm_variance_example_f32.c.

Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM0.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM0.c File Reference
#include "ARMCM0.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM0.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM0.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM0.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM3.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM3.c File Reference
#include "ARMCM3.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM3.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM3.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM3.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM4.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM4.c File Reference
#include "ARMCM4.h"

Go to the source code of this file.

Defines

#define | __HSI ( 8000000UL)
#define | __XTAL (12000000UL)
#define | __SYSTEM_CLOCK (4*__XTAL)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __SYSTEM_CLOCK

Define Documentation

#define __HSI ( 8000000UL)

Definition at line 30 of file system_ARMCM4.c.

#define __SYSTEM_CLOCK (4*__XTAL)

Definition at line 33 of file system_ARMCM4.c.

#define __XTAL (12000000UL)

Definition at line 31 of file system_ARMCM4.c.

Generated on Mon Nov 28 2011 11:14:55 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/Common/Include/math_helper.h File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/Common/Include/math_helper.h File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

float | arm_snr_f32 (float *pRef, float *pTest, uint32_t buffSize)
Caluclation of SNR.
void | arm_float_to_q12_20 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed in q12.20 format.
void | arm_provide_guard_bits_q15 (q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer.
void | arm_provide_guard_bits_q31 (q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer.
void | arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
Converts float to fixed q14.
void | arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q30 format.
void | arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q28 format.
void | arm_float_to_q30 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q30 format.
void | arm_clip_f32 (float *pIn, uint32_t numSamples)
Clip the float values to +/- 1.
uint32_t | arm_calc_guard_bits (uint32_t num_adds)
Caluclates number of guard bits.
void | arm_apply_guard_bits (float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
Converts Q15 to floating-point.
uint32_t | arm_compare_fixed_q15 (q15_t *pIn, q15_t *pOut, uint32_t numSamples)
Compare MATLAB Reference Output and ARM Test output.
uint32_t | arm_compare_fixed_q31 (q31_t *pIn, q31_t *pOut, uint32_t numSamples)
Compare MATLAB Reference Output and ARM Test output.
uint32_t | arm_calc_2pow (uint32_t guard_bits)
Calculates pow(2, numShifts)

Function Documentation

void arm_apply_guard_bits | ( | float32_t * | pIn,
 |  | uint32_t | numSamples,
 |  | uint32_t | guard_bits
 | ) |  |

Converts Q15 to floating-point.

Parameters:
uint32_t number of samples in the buffer
Returns:
none

Definition at line 279 of file math_helper.c.

uint32_t arm_calc_2pow ( uint32_t numShifts )

Calculates pow(2, numShifts)

Parameters:
uint32_t number of shifts
Returns:
pow(2, numShifts)

Definition at line 296 of file math_helper.c.

uint32_t arm_calc_guard_bits ( uint32_t num_adds )

Caluclates number of guard bits.

Parameters:
uint32_t number of additions
Returns:
none The function Caluclates the number of guard bits depending on the numtaps

Definition at line 255 of file math_helper.c.

void arm_clip_f32 | ( | float * | pIn,
 |  | uint32_t | numSamples
 | ) |  |

Clip the float values to +/- 1.

Parameters:
pIn | input buffer
numSamples | number of samples in the buffer
Returns:
none The function converts floating point values to fixed point values

Definition at line 427 of file math_helper.c.

uint32_t arm_compare_fixed_q15 | ( | q15_t * | pIn,
 |  | q15_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Compare MATLAB Reference Output and ARM Test output.

Parameters:
q15_t* | Pointer to Ref buffer
q15_t* | Pointer to Test buffer
uint32_t | number of samples in the buffer
Returns:
none

Definition at line 153 of file math_helper.c.

uint32_t arm_compare_fixed_q31 | ( | q31_t * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Compare MATLAB Reference Output and ARM Test output.

Parameters:
q31_t* | Pointer to Ref buffer
q31_t* | Pointer to Test buffer
uint32_t | number of samples in the buffer
Returns:
none

Definition at line 181 of file math_helper.c.

void arm_float_to_q12_20 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed in q12.20 format.

Parameters:
uint32_t number of samples in the buffer
Returns:
none The function converts floating point values to fixed point(q12.20) values

Definition at line 127 of file math_helper.c.

void arm_float_to_q14 | ( | float * | pIn,
 |  | q15_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q14.

Parameters:
uint32_t number of samples in the buffer
Returns:
none The function converts floating point values to fixed point values

Definition at line 318 of file math_helper.c.

void arm_float_to_q28 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q28 format.

Parameters:
uint32_t number of samples in the buffer
Returns:
none The function converts floating point values to fixed point values

Definition at line 400 of file math_helper.c.

void arm_float_to_q29 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q30 format.

Parameters:
uint32_t number of samples in the buffer
Returns:
none The function converts floating point values to fixed point values

Definition at line 373 of file math_helper.c.

void arm_float_to_q30 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q30 format.

Parameters:
uint32_t number of samples in the buffer
Returns:
none The function converts floating point values to fixed point values

Definition at line 347 of file math_helper.c.

void arm_provide_guard_bits_q15 | ( | q15_t * | input_buf,
 |  | uint32_t | blockSize,
 |  | uint32_t | guard_bits
 | ) |  |

Provide guard bits for Input buffer.

Parameters:
q15_t* | Pointer to input buffer
uint32_t | blockSize
uint32_t | guard_bits
Returns:
none The function Provides the guard bits for the buffer to avoid overflow

Definition at line 109 of file math_helper.c.

void arm_provide_guard_bits_q31 | ( | q31_t * | input_buf,
 |  | uint32_t | blockSize,
 |  | uint32_t | guard_bits
 | ) |  |

Provide guard bits for Input buffer.

Parameters:
q31_t* | Pointer to input buffer
uint32_t | blockSize
uint32_t | guard_bits
Returns:
none The function Provides the guard bits for the buffer to avoid overflow

Definition at line 211 of file math_helper.c.

float arm_snr_f32 | ( | float * | pRef,
 |  | float * | pTest,
 |  | uint32_t | buffSize
 | ) |  |

Caluclation of SNR.

Parameters:
float* | Pointer to the reference buffer
float* | Pointer to the test buffer
uint32_t | total number of samples
Returns:
float SNR The function Caluclates signal to noise ratio for the reference output and test output

Definition at line 51 of file math_helper.c.

Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/Common/Source/math_helper.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/Common/Source/math_helper.c File Reference
#include <math.h>
#include "math_helper.h"

Go to the source code of this file.

Functions

float | arm_snr_f32 (float *pRef, float *pTest, uint32_t buffSize)
Caluclation of SNR.
void | arm_provide_guard_bits_q15 (q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer.
void | arm_float_to_q12_20 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed in q12.20 format.
uint32_t | arm_compare_fixed_q15 (q15_t *pIn, q15_t *pOut, uint32_t numSamples)
Compare MATLAB Reference Output and ARM Test output.
uint32_t | arm_compare_fixed_q31 (q31_t *pIn, q31_t *pOut, uint32_t numSamples)
Compare MATLAB Reference Output and ARM Test output.
void | arm_provide_guard_bits_q31 (q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer.
void | arm_provide_guard_bits_q7 (q7_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
Provide guard bits for Input buffer.
uint32_t | arm_calc_guard_bits (uint32_t num_adds)
Caluclates number of guard bits.
void | arm_apply_guard_bits (float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
Converts Q15 to floating-point.
uint32_t | arm_calc_2pow (uint32_t numShifts)
Calculates pow(2, numShifts)
void | arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
Converts float to fixed q14.
void | arm_float_to_q30 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q30 format.
void | arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q30 format.
void | arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
Converts float to fixed q28 format.
void | arm_clip_f32 (float *pIn, uint32_t numSamples)
Clip the float values to +/- 1.

Function Documentation

void arm_apply_guard_bits | ( | float32_t * | pIn,
 |  | uint32_t | numSamples,
 |  | uint32_t | guard_bits
 | ) |  |

Converts Q15 to floating-point.

Parameters:
uint32_t number of samples in the buffer
Returns:
none

Definition at line 279 of file math_helper.c.

uint32_t arm_calc_2pow ( uint32_t numShifts )

Calculates pow(2, numShifts)

Parameters:
uint32_t number of shifts
Returns:
pow(2, numShifts)

Definition at line 296 of file math_helper.c.

uint32_t arm_calc_guard_bits ( uint32_t num_adds )

Caluclates number of guard bits.

Parameters:
uint32_t number of additions
Returns:
none The function Caluclates the number of guard bits depending on the numtaps

Definition at line 255 of file math_helper.c.

void arm_clip_f32 | ( | float * | pIn,
 |  | uint32_t | numSamples
 | ) |  |

Clip the float values to +/- 1.

Parameters:
pIn | input buffer
numSamples | number of samples in the buffer
Returns:
none The function converts floating point values to fixed point values

Definition at line 427 of file math_helper.c.

uint32_t arm_compare_fixed_q15 | ( | q15_t * | pIn,
 |  | q15_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Compare MATLAB Reference Output and ARM Test output.

Parameters:
q15_t* | Pointer to Ref buffer
q15_t* | Pointer to Test buffer
uint32_t | number of samples in the buffer
Returns:
none

Definition at line 153 of file math_helper.c.

uint32_t arm_compare_fixed_q31 | ( | q31_t * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Compare MATLAB Reference Output and ARM Test output.

Parameters:
q31_t* | Pointer to Ref buffer
q31_t* | Pointer to Test buffer
uint32_t | number of samples in the buffer
Returns:
none

Definition at line 181 of file math_helper.c.

void arm_float_to_q12_20 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed in q12.20 format.

Parameters:
uint32_t number of samples in the buffer
Returns:
none The function converts floating point values to fixed point(q12.20) values

Definition at line 127 of file math_helper.c.

void arm_float_to_q14 | ( | float * | pIn,
 |  | q15_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q14.

Parameters:
uint32_t number of samples in the buffer
Returns:
none The function converts floating point values to fixed point values

Definition at line 318 of file math_helper.c.

void arm_float_to_q28 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q28 format.

Parameters:
uint32_t number of samples in the buffer
Returns:
none The function converts floating point values to fixed point values

Definition at line 400 of file math_helper.c.

void arm_float_to_q29 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q30 format.

Parameters:
uint32_t number of samples in the buffer
Returns:
none The function converts floating point values to fixed point values

Definition at line 373 of file math_helper.c.

void arm_float_to_q30 | ( | float * | pIn,
 |  | q31_t * | pOut,
 |  | uint32_t | numSamples
 | ) |  |

Converts float to fixed q30 format.

Parameters:
uint32_t number of samples in the buffer
Returns:
none The function converts floating point values to fixed point values

Definition at line 347 of file math_helper.c.

void arm_provide_guard_bits_q15 | ( | q15_t * | input_buf,
 |  | uint32_t | blockSize,
 |  | uint32_t | guard_bits
 | ) |  |

Provide guard bits for Input buffer.

Parameters:
q15_t* | Pointer to input buffer
uint32_t | blockSize
uint32_t | guard_bits
Returns:
none The function Provides the guard bits for the buffer to avoid overflow

Definition at line 109 of file math_helper.c.

void arm_provide_guard_bits_q31 | ( | q31_t * | input_buf,
 |  | uint32_t | blockSize,
 |  | uint32_t | guard_bits
 | ) |  |

Provide guard bits for Input buffer.

Parameters:
q31_t* | Pointer to input buffer
uint32_t | blockSize
uint32_t | guard_bits
Returns:
none The function Provides the guard bits for the buffer to avoid overflow

Definition at line 211 of file math_helper.c.

void arm_provide_guard_bits_q7 | ( | q7_t * | input_buf,
 |  | uint32_t | blockSize,
 |  | uint32_t | guard_bits
 | ) |  |

Provide guard bits for Input buffer.

Parameters:
q31_t* | Pointer to input buffer
uint32_t | blockSize
uint32_t | guard_bits
Returns:
none The function Provides the guard bits for the buffer to avoid overflow

Definition at line 233 of file math_helper.c.

float arm_snr_f32 | ( | float * | pRef,
 |  | float * | pTest,
 |  | uint32_t | buffSize
 | ) |  |

Caluclation of SNR.

Parameters:
float* | Pointer to the reference buffer
float* | Pointer to the test buffer
uint32_t | total number of samples
Returns:
float SNR The function Caluclates signal to noise ratio for the reference output and test output

Definition at line 51 of file math_helper.c.

Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c File Reference
#include "arm_math.h"
#include <math.h>

Go to the source code of this file.

Functions

void arm_abs_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Floating-point vector absolute value.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_abs_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Q15 vector absolute value.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_abs_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Q31 vector absolute value.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_abs_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
Q7 vector absolute value.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_add_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
Floating-point vector addition.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_add_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
Q15 vector addition.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_add_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
Q31 vector addition.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_add_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
Q7 vector addition.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_dot_prod_f32 (float32_t *pSrcA, float32_t *pSrcB, uint32_t blockSize, float32_t *result)
Dot product of floating-point vectors.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_dot_prod_q15 (q15_t *pSrcA, q15_t *pSrcB, uint32_t blockSize, q63_t *result)
Dot product of Q15 vectors.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_dot_prod_q31 (q31_t *pSrcA, q31_t *pSrcB, uint32_t blockSize, q63_t *result)
Dot product of Q31 vectors.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_dot_prod_q7 (q7_t *pSrcA, q7_t *pSrcB, uint32_t blockSize, q31_t *result)
Dot product of Q7 vectors.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_mult_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
Floating-point vector multiplication.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_mult_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
Q15 vector multiplication.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_mult_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
Q31 vector multiplication.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_mult_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
Q7 vector multiplication.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_negate_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Negates the elements of a floating-point vector.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_negate_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Negates the elements of a Q15 vector.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_negate_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Negates the elements of a Q31 vector.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_negate_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
Negates the elements of a Q7 vector.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_offset_f32 (float32_t *pSrc, float32_t offset, float32_t *pDst, uint32_t blockSize)
Adds a constant offset to a floating-point vector.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_offset_q15 (q15_t *pSrc, q15_t offset, q15_t *pDst, uint32_t blockSize)
Adds a constant offset to a Q15 vector.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_offset_q31 (q31_t *pSrc, q31_t offset, q31_t *pDst, uint32_t blockSize)
Adds a constant offset to a Q31 vector.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_offset_q7 (q7_t *pSrc, q7_t offset, q7_t *pDst, uint32_t blockSize)
Adds a constant offset to a Q7 vector.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_scale_f32 (float32_t *pSrc, float32_t scale, float32_t *pDst, uint32_t blockSize)
Multiplies a floating-point vector by a scalar.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_scale_q15 (q15_t *pSrc, q15_t scaleFract, int8_t shift, q15_t *pDst, uint32_t blockSize)
Multiplies a Q15 vector by a scalar.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_scale_q31 (q31_t *pSrc, q31_t scaleFract, int8_t shift, q31_t *pDst, uint32_t blockSize)
Multiplies a Q31 vector by a scalar.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_scale_q7 (q7_t *pSrc, q7_t scaleFract, int8_t shift, q7_t *pDst, uint32_t blockSize)
Multiplies a Q7 vector by a scalar.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_shift_q15 (q15_t *pSrc, int8_t shiftBits, q15_t *pDst, uint32_t blockSize)
Shifts the elements of a Q15 vector a specified number of bits.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_shift_q31 (q31_t *pSrc, int8_t shiftBits, q31_t *pDst, uint32_t blockSize)
Shifts the elements of a Q31 vector a specified number of bits.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_shift_q7 (q7_t *pSrc, int8_t shiftBits, q7_t *pDst, uint32_t blockSize)
Shifts the elements of a Q7 vector a specified number of bits.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_sub_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
Floating-point vector subtraction.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_sub_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
Q15 vector subtraction.
Generated on Mon Nov 28 2011 11:14:56 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_sub_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
Q31 vector subtraction.
Generated on Mon Nov 28 2011 11:14:57 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_sub_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
Q7 vector subtraction.
Generated on Mon Nov 28 2011 11:14:57 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Variables

const uint16_t | armBitRevTable [256]
const q15_t | armRecipTableQ15 [64]
const q31_t | armRecipTableQ31 [64]

Variable Documentation

const q15_t armRecipTableQ15[64]
Initial value:
 {
  0x7F03, 0x7D13, 0x7B31, 0x795E, 0x7798, 0x75E0,
  0x7434, 0x7294, 0x70FF, 0x6F76, 0x6DF6, 0x6C82,
  0x6B16, 0x69B5, 0x685C, 0x670C, 0x65C4, 0x6484,
  0x634C, 0x621C, 0x60F3, 0x5FD0, 0x5EB5, 0x5DA0,
  0x5C91, 0x5B88, 0x5A85, 0x5988, 0x5890, 0x579E,
  0x56B0, 0x55C8, 0x54E4, 0x5405, 0x532B, 0x5255,
  0x5183, 0x50B6, 0x4FEC, 0x4F26, 0x4E64, 0x4DA6,
  0x4CEC, 0x4C34, 0x4B81, 0x4AD0, 0x4A23, 0x4978,
  0x48D1, 0x482D, 0x478C, 0x46ED, 0x4651, 0x45B8,
  0x4521, 0x448D, 0x43FC, 0x436C, 0x42DF, 0x4255,
  0x41CC, 0x4146, 0x40C2, 0x4040
}

end of CFFT_CIFFT group

Definition at line 115 of file arm_common_tables.c.

const q31_t armRecipTableQ31[64]
Initial value:
 {
  0x7F03F03F, 0x7D137420, 0x7B31E739, 0x795E9F94, 0x7798FD29, 0x75E06928,
  0x7434554D, 0x72943B4B, 0x70FF9C40, 0x6F760031, 0x6DF6F593, 0x6C8210E3,
  0x6B16EC3A, 0x69B526F6, 0x685C655F, 0x670C505D, 0x65C4952D, 0x6484E519,
  0x634CF53E, 0x621C7E4F, 0x60F33C61, 0x5FD0EEB3, 0x5EB55785, 0x5DA03BEB,
  0x5C9163A1, 0x5B8898E6, 0x5A85A85A, 0x598860DF, 0x58909373, 0x579E1318,
  0x56B0B4B8, 0x55C84F0B, 0x54E4BA80, 0x5405D124, 0x532B6E8F, 0x52556FD0,
  0x5183B35A, 0x50B618F3, 0x4FEC81A2, 0x4F26CFA2, 0x4E64E64E, 0x4DA6AA1D,
  0x4CEC008B, 0x4C34D010, 0x4B810016, 0x4AD078EF, 0x4A2323C4, 0x4978EA96,
  0x48D1B827, 0x482D77FE, 0x478C1657, 0x46ED801D, 0x4651A2E5, 0x45B86CE2,
  0x4521CCE1, 0x448DB244, 0x43FC0CFA, 0x436CCD78, 0x42DFE4B4, 0x42554426,
  0x41CCDDB6, 0x4146A3C6, 0x40C28923, 0x40408102
}

Definition at line 132 of file arm_common_tables.c.

Generated on Mon Nov 28 2011 11:14:57 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_conj_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
Floating-point complex conjugate.
Generated on Mon Nov 28 2011 11:14:57 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_conj_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
Q15 complex conjugate.
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_conj_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
Q31 complex conjugate.
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_dot_prod_f32 (float32_t *pSrcA, float32_t *pSrcB, uint32_t numSamples, float32_t *realResult, float32_t *imagResult)
Floating-point complex dot product.
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_dot_prod_q15 (q15_t *pSrcA, q15_t *pSrcB, uint32_t numSamples, q31_t *realResult, q31_t *imagResult)
Q15 complex dot product.
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_dot_prod_q31 (q31_t *pSrcA, q31_t *pSrcB, uint32_t numSamples, q63_t *realResult, q63_t *imagResult)
Q31 complex dot product.
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_mag_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
Floating-point complex magnitude.
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_mag_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
Q15 complex magnitude.
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_mag_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
Q31 complex magnitude.
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_mag_squared_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
Floating-point complex magnitude squared.
Generated on Mon Nov 28 2011 11:14:57 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_mag_squared_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
Q15 complex magnitude squared.
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_mag_squared_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
Q31 complex magnitude squared.
Generated on Mon Nov 28 2011 11:14:57 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_mult_cmplx_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t numSamples)
Floating-point complex-by-complex multiplication.
Generated on Mon Nov 28 2011 11:14:57 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_mult_cmplx_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t numSamples)
Q15 complex-by-complex multiplication.
Generated on Mon Nov 28 2011 11:14:57 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_mult_cmplx_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t numSamples)
Q31 complex-by-complex multiplication.
Generated on Mon Nov 28 2011 11:14:57 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_mult_real_f32 (float32_t *pSrcCmplx, float32_t *pSrcReal, float32_t *pCmplxDst, uint32_t numSamples)
Floating-point complex-by-real multiplication.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_mult_real_q15 (q15_t *pSrcCmplx, q15_t *pSrcReal, q15_t *pCmplxDst, uint32_t numSamples)
Q15 complex-by-real multiplication.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_mult_real_q31 (q31_t *pSrcCmplx, q31_t *pSrcReal, q31_t *pCmplxDst, uint32_t numSamples)
Q31 complex-by-real multiplication.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_pid_init_f32 (arm_pid_instance_f32 *S, int32_t resetStateFlag)
Initialization function for the floating-point PID Control.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_pid_init_q15 (arm_pid_instance_q15 *S, int32_t resetStateFlag)
Initialization function for the Q15 PID Control.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_pid_init_q31 (arm_pid_instance_q31 *S, int32_t resetStateFlag)
Initialization function for the Q31 PID Control.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_pid_reset_f32 (arm_pid_instance_f32 *S)
Reset function for the floating-point PID Control.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_pid_reset_q15 (arm_pid_instance_q15 *S)
Reset function for the Q15 PID Control.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_pid_reset_q31 (arm_pid_instance_q31 *S)
Reset function for the Q31 PID Control.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_sin_cos_f32 (float32_t theta, float32_t *pSinVal, float32_t *pCosVal)
Floating-point sin_cos function.
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_sin_cos_q31 (q31_t theta, q31_t *pSinVal, q31_t *pCosVal)
Q31 sin_cos function.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

float32_t arm_cos_f32 (float32_t x)
Fast approximation to the trigonometric cosine function for floating-point data.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

q15_t arm_cos_q15 (q15_t x)
Fast approximation to the trigonometric cosine function for Q15 data.
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

q31_t arm_cos_q31 (q31_t x)
Fast approximation to the trigonometric cosine function for Q31 data.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

float32_t arm_sin_f32 (float32_t x)
Fast approximation to the trigonometric sine function for floating-point data.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

q15_t arm_sin_q15 (q15_t x)
Fast approximation to the trigonometric sine function for Q15 data.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

q31_t arm_sin_q31 (q31_t x)
Fast approximation to the trigonometric sine function for Q31 data.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c File Reference
#include "arm_math.h"
#include "arm_common_tables.h"

Go to the source code of this file.

Functions

arm_status arm_sqrt_q15 (q15_t in, q15_t *pOut)
Q15 square root function.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c File Reference
#include "arm_math.h"
#include "arm_common_tables.h"

Go to the source code of this file.

Functions

arm_status arm_sqrt_q31 (q31_t in, q31_t *pOut)
Q31 square root function.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_biquad_cas_df1_32x64_init_q31 (arm_biquad_cas_df1_32x64_ins_q31 *S, uint8_t numStages, q31_t *pCoeffs, q63_t *pState, uint8_t postShift)
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_biquad_cas_df1_32x64_q31 (const arm_biquad_cas_df1_32x64_ins_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_biquad_cascade_df1_f32 (const arm_biquad_casd_df1_inst_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point Biquad cascade filter.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_biquad_cascade_df1_fast_q15 (const arm_biquad_casd_df1_inst_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_biquad_cascade_df1_fast_q31 (const arm_biquad_casd_df1_inst_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_biquad_cascade_df1_init_f32 (arm_biquad_casd_df1_inst_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
Initialization function for the floating-point Biquad cascade filter.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_biquad_cascade_df1_init_q15 (arm_biquad_casd_df1_inst_q15 *S, uint8_t numStages, q15_t *pCoeffs, q15_t *pState, int8_t postShift)
Initialization function for the Q15 Biquad cascade filter.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_biquad_cascade_df1_init_q31 (arm_biquad_casd_df1_inst_q31 *S, uint8_t numStages, q31_t *pCoeffs, q31_t *pState, int8_t postShift)
Initialization function for the Q31 Biquad cascade filter.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_biquad_cascade_df1_q15 (const arm_biquad_casd_df1_inst_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 Biquad cascade filter.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_biquad_cascade_df1_q31 (const arm_biquad_casd_df1_inst_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 Biquad cascade filter.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_biquad_cascade_df2T_f32 (const arm_biquad_cascade_df2T_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point transposed direct form II Biquad cascade filter.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_biquad_cascade_df2T_init_f32 (arm_biquad_cascade_df2T_instance_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
Initialization function for the floating-point transposed direct form II Biquad cascade filter.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_conv_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst)
Convolution of floating-point sequences.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_conv_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_conv_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
Generated on Mon Nov 28 2011 11:14:58 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_conv_partial_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst, uint32_t firstIndex, uint32_t numPoints)
Partial convolution of floating-point sequences.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_conv_partial_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints)
Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_conv_partial_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst, uint32_t firstIndex, uint32_t numPoints)
Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_conv_partial_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints)
Partial convolution of Q15 sequences.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_conv_partial_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst, uint32_t firstIndex, uint32_t numPoints)
Partial convolution of Q31 sequences.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_conv_partial_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, uint32_t firstIndex, uint32_t numPoints)
Partial convolution of Q7 sequences.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_conv_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
Convolution of Q15 sequences.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_conv_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
Convolution of Q31 sequences.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_conv_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst)
Convolution of Q7 sequences.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_correlate_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst)
Correlation of floating-point sequences.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_correlate_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_correlate_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_correlate_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
Correlation of Q15 sequences.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_correlate_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
Correlation of Q31 sequences.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_correlate_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst)
Correlation of Q7 sequences.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_decimate_f32 (const arm_fir_decimate_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point FIR decimator.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_decimate_fast_q15 (const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_decimate_fast_q31 (arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_fir_decimate_init_f32 (arm_fir_decimate_instance_f32 *S, uint16_t numTaps, uint8_t M, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
Initialization function for the floating-point FIR decimator.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_fir_decimate_init_q15 (arm_fir_decimate_instance_q15 *S, uint16_t numTaps, uint8_t M, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
Initialization function for the Q15 FIR decimator.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_fir_decimate_init_q31 (arm_fir_decimate_instance_q31 *S, uint16_t numTaps, uint8_t M, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
Initialization function for the Q31 FIR decimator.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_decimate_q15 (const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 FIR decimator.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_decimate_q31 (const arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 FIR decimator.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_f32 (const arm_fir_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point FIR filter.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_fast_q15 (const arm_fir_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_fast_q31 (const arm_fir_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_init_f32 (arm_fir_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
Initialization function for the floating-point FIR filter.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_fir_init_q15 (arm_fir_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
Initialization function for the Q15 FIR filter.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_init_q31 (arm_fir_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
Initialization function for the Q31 FIR filter.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_init_q7 (arm_fir_instance_q7 *S, uint16_t numTaps, q7_t *pCoeffs, q7_t *pState, uint32_t blockSize)
Initialization function for the Q7 FIR filter.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_interpolate_f32 (const arm_fir_interpolate_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point FIR interpolator.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_fir_interpolate_init_f32 (arm_fir_interpolate_instance_f32 *S, uint8_t L, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
Initialization function for the floating-point FIR interpolator.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_fir_interpolate_init_q15 (arm_fir_interpolate_instance_q15 *S, uint8_t L, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
Initialization function for the Q15 FIR interpolator.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_fir_interpolate_init_q31 (arm_fir_interpolate_instance_q31 *S, uint8_t L, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
Initialization function for the Q31 FIR interpolator.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_interpolate_q15 (const arm_fir_interpolate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 FIR interpolator.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_interpolate_q31 (const arm_fir_interpolate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 FIR interpolator.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_lattice_f32 (const arm_fir_lattice_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point FIR lattice filter.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_lattice_init_f32 (arm_fir_lattice_instance_f32 *S, uint16_t numStages, float32_t *pCoeffs, float32_t *pState)
Initialization function for the floating-point FIR lattice filter.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_lattice_init_q15 (arm_fir_lattice_instance_q15 *S, uint16_t numStages, q15_t *pCoeffs, q15_t *pState)
Initialization function for the Q15 FIR lattice filter.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_lattice_init_q31 (arm_fir_lattice_instance_q31 *S, uint16_t numStages, q31_t *pCoeffs, q31_t *pState)
Initialization function for the Q31 FIR lattice filter.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_lattice_q15 (const arm_fir_lattice_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 FIR lattice filter.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_lattice_q31 (const arm_fir_lattice_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 FIR lattice filter.
Generated on Mon Nov 28 2011 11:14:59 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_q15 (const arm_fir_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 FIR filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_q31 (const arm_fir_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 FIR filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_q7 (const arm_fir_instance_q7 *S, q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
Processing function for the Q7 FIR filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_sparse_f32 (arm_fir_sparse_instance_f32 *S, float32_t *pSrc, float32_t *pDst, float32_t *pScratchIn, uint32_t blockSize)
Processing function for the floating-point sparse FIR filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_sparse_init_f32 (arm_fir_sparse_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
Initialization function for the floating-point sparse FIR filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_sparse_init_q15 (arm_fir_sparse_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
Initialization function for the Q15 sparse FIR filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_sparse_init_q31 (arm_fir_sparse_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
Initialization function for the Q31 sparse FIR filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_sparse_init_q7 (arm_fir_sparse_instance_q7 *S, uint16_t numTaps, q7_t *pCoeffs, q7_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
Initialization function for the Q7 sparse FIR filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_sparse_q15 (arm_fir_sparse_instance_q15 *S, q15_t *pSrc, q15_t *pDst, q15_t *pScratchIn, q31_t *pScratchOut, uint32_t blockSize)
Processing function for the Q15 sparse FIR filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_sparse_q31 (arm_fir_sparse_instance_q31 *S, q31_t *pSrc, q31_t *pDst, q31_t *pScratchIn, uint32_t blockSize)
Processing function for the Q31 sparse FIR filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_sparse_q7 (arm_fir_sparse_instance_q7 *S, q7_t *pSrc, q7_t *pDst, q7_t *pScratchIn, q31_t *pScratchOut, uint32_t blockSize)
Processing function for the Q7 sparse FIR filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_iir_lattice_f32 (const arm_iir_lattice_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point IIR lattice filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_iir_lattice_init_f32 (arm_iir_lattice_instance_f32 *S, uint16_t numStages, float32_t *pkCoeffs, float32_t *pvCoeffs, float32_t *pState, uint32_t blockSize)
Initialization function for the floating-point IIR lattice filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_iir_lattice_init_q15 (arm_iir_lattice_instance_q15 *S, uint16_t numStages, q15_t *pkCoeffs, q15_t *pvCoeffs, q15_t *pState, uint32_t blockSize)
Initialization function for the Q15 IIR lattice filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_iir_lattice_init_q31 (arm_iir_lattice_instance_q31 *S, uint16_t numStages, q31_t *pkCoeffs, q31_t *pvCoeffs, q31_t *pState, uint32_t blockSize)
Initialization function for the Q31 IIR lattice filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_iir_lattice_q15 (const arm_iir_lattice_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 IIR lattice filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_iir_lattice_q31 (const arm_iir_lattice_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 IIR lattice filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_lms_f32 (const arm_lms_instance_f32 *S, float32_t *pSrc, float32_t *pRef, float32_t *pOut, float32_t *pErr, uint32_t blockSize)
Processing function for floating-point LMS filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_lms_init_f32 (arm_lms_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, float32_t mu, uint32_t blockSize)
Initialization function for floating-point LMS filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_lms_init_q15 (arm_lms_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, q15_t mu, uint32_t blockSize, uint32_t postShift)
Initialization function for the Q15 LMS filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_lms_init_q31 (arm_lms_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, q31_t mu, uint32_t blockSize, uint32_t postShift)
Initialization function for Q31 LMS filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_lms_norm_f32 (arm_lms_norm_instance_f32 *S, float32_t *pSrc, float32_t *pRef, float32_t *pOut, float32_t *pErr, uint32_t blockSize)
Processing function for floating-point normalized LMS filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_lms_norm_init_f32 (arm_lms_norm_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, float32_t mu, uint32_t blockSize)
Initialization function for floating-point normalized LMS filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c File Reference
#include "arm_math.h"
#include "arm_common_tables.h"

Go to the source code of this file.

Functions

void arm_lms_norm_init_q15 (arm_lms_norm_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, q15_t mu, uint32_t blockSize, uint8_t postShift)
Initialization function for Q15 normalized LMS filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c File Reference
#include "arm_math.h"
#include "arm_common_tables.h"

Go to the source code of this file.

Functions

void arm_lms_norm_init_q31 (arm_lms_norm_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, q31_t mu, uint32_t blockSize, uint8_t postShift)
Initialization function for Q31 normalized LMS filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_lms_norm_q15 (arm_lms_norm_instance_q15 *S, q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize)
Processing function for Q15 normalized LMS filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_lms_norm_q31 (arm_lms_norm_instance_q31 *S, q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize)
Processing function for Q31 normalized LMS filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_lms_q15 (const arm_lms_instance_q15 *S, q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize)
Processing function for Q15 LMS filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_lms_q31 (const arm_lms_instance_q31 *S, q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize)
Processing function for Q31 LMS filter.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_add_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
Floating-point matrix addition.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_add_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst)
Q15 matrix addition.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_add_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
Q31 matrix addition.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_mat_init_f32 (arm_matrix_instance_f32 *S, uint16_t nRows, uint16_t nColumns, float32_t *pData)
Floating-point matrix initialization.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_mat_init_q15 (arm_matrix_instance_q15 *S, uint16_t nRows, uint16_t nColumns, q15_t *pData)
Q15 matrix initialization.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_mat_init_q31 (arm_matrix_instance_q31 *S, uint16_t nRows, uint16_t nColumns, q31_t *pData)
Q31 matrix initialization.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_inverse_f32 (const arm_matrix_instance_f32 *pSrc, arm_matrix_instance_f32 *pDst)
Floating-point matrix inverse.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_mult_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
Floating-point matrix multiplication.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_mult_fast_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pState)
Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_mult_fast_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_mult_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pState)
Q15 matrix multiplication.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_mult_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
Q31 matrix multiplication.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_scale_f32 (const arm_matrix_instance_f32 *pSrc, float32_t scale, arm_matrix_instance_f32 *pDst)
Floating-point matrix scaling.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_scale_q15 (const arm_matrix_instance_q15 *pSrc, q15_t scaleFract, int32_t shift, arm_matrix_instance_q15 *pDst)
Q15 matrix scaling.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_scale_q31 (const arm_matrix_instance_q31 *pSrc, q31_t scaleFract, int32_t shift, arm_matrix_instance_q31 *pDst)
Q31 matrix scaling.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_sub_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
Floating-point matrix subtraction.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_sub_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst)
Q15 matrix subtraction.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_sub_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
Q31 matrix subtraction.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_trans_f32 (const arm_matrix_instance_f32 *pSrc, arm_matrix_instance_f32 *pDst)
Floating-point matrix transpose.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_trans_q15 (const arm_matrix_instance_q15 *pSrc, arm_matrix_instance_q15 *pDst)
Q15 matrix transpose.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_trans_q31 (const arm_matrix_instance_q31 *pSrc, arm_matrix_instance_q31 *pDst)
Q31 matrix transpose.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_max_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult, uint32_t *pIndex)
Maximum value of a floating-point vector.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_max_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult, uint32_t *pIndex)
Maximum value of a Q15 vector.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_max_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult, uint32_t *pIndex)
Maximum value of a Q31 vector.
Generated on Mon Nov 28 2011 11:15:00 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_max_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult, uint32_t *pIndex)
Maximum value of a Q7 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_mean_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
Mean value of a floating-point vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_mean_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
Mean value of a Q15 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_mean_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
Mean value of a Q31 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_mean_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult)
Mean value of a Q7 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_min_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult, uint32_t *pIndex)
Minimum value of a floating-point vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_min_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult, uint32_t *pIndex)
Minimum value of a Q15 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_min_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult, uint32_t *pIndex)
Minimum value of a Q31 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_min_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult, uint32_t *pIndex)
Minimum value of a Q7 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_power_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
Sum of the squares of the elements of a floating-point vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_power_q15 (q15_t *pSrc, uint32_t blockSize, q63_t *pResult)
Sum of the squares of the elements of a Q15 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_power_q31 (q31_t *pSrc, uint32_t blockSize, q63_t *pResult)
Sum of the squares of the elements of a Q31 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_power_q7 (q7_t *pSrc, uint32_t blockSize, q31_t *pResult)
Sum of the squares of the elements of a Q7 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_rms_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
Root Mean Square of the elements of a floating-point vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_rms_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
Root Mean Square of the elements of a Q15 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_rms_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
Root Mean Square of the elements of a Q31 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_std_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
Standard deviation of the elements of a floating-point vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_std_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
Standard deviation of the elements of a Q15 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_std_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
Standard deviation of the elements of a Q31 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_var_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
Variance of the elements of a floating-point vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_var_q15 (q15_t *pSrc, uint32_t blockSize, q31_t *pResult)
Variance of the elements of a Q15 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_var_q31 (q31_t *pSrc, uint32_t blockSize, q63_t *pResult)
Variance of the elements of a Q31 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_copy_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Copies the elements of a floating-point vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_copy_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Copies the elements of a Q15 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_copy_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Copies the elements of a Q31 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_copy_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
Copies the elements of a Q7 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fill_f32 (float32_t value, float32_t *pDst, uint32_t blockSize)
Fills a constant value into a floating-point vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fill_q15 (q15_t value, q15_t *pDst, uint32_t blockSize)
Fills a constant value into a Q15 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fill_q31 (q31_t value, q31_t *pDst, uint32_t blockSize)
Fills a constant value into a Q31 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fill_q7 (q7_t value, q7_t *pDst, uint32_t blockSize)
Fills a constant value into a Q7 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_float_to_q15 (float32_t *pSrc, q15_t *pDst, uint32_t blockSize)
Converts the elements of the floating-point vector to Q15 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_float_to_q31 (float32_t *pSrc, q31_t *pDst, uint32_t blockSize)
Converts the elements of the floating-point vector to Q31 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_float_to_q7 (float32_t *pSrc, q7_t *pDst, uint32_t blockSize)
Converts the elements of the floating-point vector to Q7 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_q15_to_float (q15_t *pSrc, float32_t *pDst, uint32_t blockSize)
Converts the elements of the Q15 vector to floating-point vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_q15_to_q31 (q15_t *pSrc, q31_t *pDst, uint32_t blockSize)
Converts the elements of the Q15 vector to Q31 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_q15_to_q7 (q15_t *pSrc, q7_t *pDst, uint32_t blockSize)
Converts the elements of the Q15 vector to Q7 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_q31_to_float (q31_t *pSrc, float32_t *pDst, uint32_t blockSize)
Converts the elements of the Q31 vector to floating-point vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_q31_to_q15 (q31_t *pSrc, q15_t *pDst, uint32_t blockSize)
Converts the elements of the Q31 vector to Q15 vector.
Generated on Mon Nov 28 2011 11:15:01 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_q31_to_q7 (q31_t *pSrc, q7_t *pDst, uint32_t blockSize)
Converts the elements of the Q31 vector to Q7 vector.
Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_q7_to_float (q7_t *pSrc, float32_t *pDst, uint32_t blockSize)
Converts the elements of the Q7 vector to floating-point vector.
Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_q7_to_q15 (q7_t *pSrc, q15_t *pDst, uint32_t blockSize)
Converts the elements of the Q7 vector to Q15 vector.
Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_q7_to_q31 (q7_t *pSrc, q31_t *pDst, uint32_t blockSize)
Converts the elements of the Q7 vector to Q31 vector.
Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void | arm_cfft_radix4_f32 (const arm_cfft_radix4_instance_f32 *S, float32_t *pSrc)
Processing function for the floating-point CFFT/CIFFT.
void | arm_radix4_butterfly_f32 (float32_t *pSrc, uint16_t fftLen, float32_t *pCoef, uint16_t twidCoefModifier)
Core function for the floating-point CFFT butterfly process.
void | arm_radix4_butterfly_inverse_f32 (float32_t *pSrc, uint16_t fftLen, float32_t *pCoef, uint16_t twidCoefModifier, float32_t onebyfftLen)
Core function for the floating-point CIFFT butterfly process.
void | arm_bitreversal_f32 (float32_t *pSrc, uint16_t fftSize, uint16_t bitRevFactor, uint16_t *pBitRevTab)
In-place bit reversal function.

Function Documentation

void arm_bitreversal_f32 | ( | float32_t * | pSrc,
 |  | uint16_t | fftSize,
 |  | uint16_t | bitRevFactor,
 |  | uint16_t * | pBitRevTab
 | ) |  |

In-place bit reversal function.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of floating-point data type.
[in] | fftSize | length of the FFT.
[in] | bitRevFactor | bit reversal modifier that supports different size FFTs with the same bit reversal table.
[in] | *pBitRevTab | points to the bit reversal table.
Returns:
none.

Definition at line 1177 of file arm_cfft_radix4_f32.c.

void arm_radix4_butterfly_f32 | ( | float32_t * | pSrc,
 |  | uint16_t | fftLen,
 |  | float32_t * | pCoef,
 |  | uint16_t | twidCoefModifier
 | ) |  |

Core function for the floating-point CFFT butterfly process.

end of CFFT_CIFFT group

Definition at line 223 of file arm_cfft_radix4_f32.c.

void arm_radix4_butterfly_inverse_f32 | ( | float32_t * | pSrc,
 |  | uint16_t | fftLen,
 |  | float32_t * | pCoef,
 |  | uint16_t | twidCoefModifier,
 |  | float32_t | onebyfftLen
 | ) |  |

Core function for the floating-point CIFFT butterfly process.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of floating-point data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
[in] | onebyfftLen | value of 1/fftLen.
Returns:
none.

Definition at line 660 of file arm_cfft_radix4_f32.c.

Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c File Reference
#include "arm_math.h"
#include "arm_common_tables.h"

Go to the source code of this file.

Functions

arm_status arm_cfft_radix4_init_f32 (arm_cfft_radix4_instance_f32 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
Initialization function for the floating-point CFFT/CIFFT.
Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c File Reference
#include "arm_math.h"
#include "arm_common_tables.h"

Go to the source code of this file.

Functions

arm_status arm_cfft_radix4_init_q15 (arm_cfft_radix4_instance_q15 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
Initialization function for the Q15 CFFT/CIFFT.
Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c File Reference
#include "arm_math.h"
#include "arm_common_tables.h"

Go to the source code of this file.

Functions

arm_status arm_cfft_radix4_init_q31 (arm_cfft_radix4_instance_q31 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
Initialization function for the Q31 CFFT/CIFFT.
Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void | arm_cfft_radix4_q15 (const arm_cfft_radix4_instance_q15 *S, q15_t *pSrc)
Processing function for the Q15 CFFT/CIFFT.
void | arm_radix4_butterfly_q15 (q15_t *pSrc16, uint32_t fftLen, q15_t *pCoef16, uint32_t twidCoefModifier)
Core function for the Q15 CFFT butterfly process.
void | arm_radix4_butterfly_inverse_q15 (q15_t *pSrc16, uint32_t fftLen, q15_t *pCoef16, uint32_t twidCoefModifier)
Core function for the Q15 CIFFT butterfly process.
void | arm_bitreversal_q15 (q15_t *pSrc16, uint32_t fftLen, uint16_t bitRevFactor, uint16_t *pBitRevTab)
In-place bit reversal function.

Function Documentation

void arm_bitreversal_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | uint16_t | bitRevFactor,
 |  | uint16_t * | pBitRevTab
 | ) |  |

In-place bit reversal function.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of Q15 data type.
[in] | fftLen | length of the FFT.
[in] | bitRevFactor | bit reversal modifier that supports different size FFTs with the same bit reversal table
[in] | *pBitRevTab | points to bit reversal table.
Returns:
none.

Definition at line 1906 of file arm_cfft_radix4_q15.c.

void arm_radix4_butterfly_inverse_q15 | ( | q15_t * | pSrc16,
 |  | uint32_t | fftLen,
 |  | q15_t * | pCoef16,
 |  | uint32_t | twidCoefModifier
 | ) |  |

Core function for the Q15 CIFFT butterfly process.

Parameters:
[in,out] | *pSrc16 | points to the in-place buffer of Q15 data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef16 | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 1053 of file arm_cfft_radix4_q15.c.

void arm_radix4_butterfly_q15 | ( | q15_t * | pSrc16,
 |  | uint32_t | fftLen,
 |  | q15_t * | pCoef16,
 |  | uint32_t | twidCoefModifier
 | ) |  |

Core function for the Q15 CFFT butterfly process.

end of CFFT_CIFFT group

Parameters:
[in,out] | *pSrc16 | points to the in-place buffer of Q15 data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef16 | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 138 of file arm_cfft_radix4_q15.c.

Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void | arm_cfft_radix4_q31 (const arm_cfft_radix4_instance_q31 *S, q31_t *pSrc)
Processing function for the Q31 CFFT/CIFFT.
void | arm_radix4_butterfly_q31 (q31_t *pSrc, uint32_t fftLen, q31_t *pCoef, uint32_t twidCoefModifier)
Core function for the Q31 CFFT butterfly process.
void | arm_radix4_butterfly_inverse_q31 (q31_t *pSrc, uint32_t fftLen, q31_t *pCoef, uint32_t twidCoefModifier)
Core function for the Q31 CIFFT butterfly process.
void | arm_bitreversal_q31 (q31_t *pSrc, uint32_t fftLen, uint16_t bitRevFactor, uint16_t *pBitRevTable)
In-place bit reversal function.

Function Documentation

void arm_bitreversal_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | uint16_t | bitRevFactor,
 |  | uint16_t * | pBitRevTab
 | ) |  |

In-place bit reversal function.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of Q31 data type.
[in] | fftLen | length of the FFT.
[in] | bitRevFactor | bit reversal modifier that supports different size FFTs with the same bit reversal table
[in] | *pBitRevTab | points to bit reversal table.
Returns:
none.

Definition at line 848 of file arm_cfft_radix4_q31.c.

void arm_radix4_butterfly_inverse_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | q31_t * | pCoef,
 |  | uint32_t | twidCoefModifier
 | ) |  |

Core function for the Q31 CIFFT butterfly process.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of Q31 data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 517 of file arm_cfft_radix4_q31.c.

void arm_radix4_butterfly_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | q31_t * | pCoef,
 |  | uint32_t | twidCoefModifier
 | ) |  |

Core function for the Q31 CFFT butterfly process.

end of CFFT_CIFFT group

Parameters:
[in,out] | *pSrc | points to the in-place buffer of Q31 data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 139 of file arm_cfft_radix4_q31.c.

Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_dct4_f32 (const arm_dct4_instance_f32 *S, float32_t *pState, float32_t *pInlineBuffer)
Processing function for the floating-point DCT4/IDCT4.
Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_dct4_init_f32 (arm_dct4_instance_f32 *S, arm_rfft_instance_f32 *S_RFFT, arm_cfft_radix4_instance_f32 *S_CFFT, uint16_t N, uint16_t Nby2, float32_t normalize)
Initialization function for the floating-point DCT4/IDCT4.
Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_dct4_init_q15 (arm_dct4_instance_q15 *S, arm_rfft_instance_q15 *S_RFFT, arm_cfft_radix4_instance_q15 *S_CFFT, uint16_t N, uint16_t Nby2, q15_t normalize)
Initialization function for the Q15 DCT4/IDCT4.
Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_dct4_init_q31 (arm_dct4_instance_q31 *S, arm_rfft_instance_q31 *S_RFFT, arm_cfft_radix4_instance_q31 *S_CFFT, uint16_t N, uint16_t Nby2, q31_t normalize)
Initialization function for the Q31 DCT4/IDCT4.
Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_dct4_q15 (const arm_dct4_instance_q15 *S, q15_t *pState, q15_t *pInlineBuffer)
Processing function for the Q15 DCT4/IDCT4.
Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_dct4_q31 (const arm_dct4_instance_q31 *S, q31_t *pState, q31_t *pInlineBuffer)
Processing function for the Q31 DCT4/IDCT4.
Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void | arm_split_rfft_f32 (float32_t *pSrc, uint32_t fftLen, float32_t *pATable, float32_t *pBTable, float32_t *pDst, uint32_t modifier)
Core Real FFT process.
void | arm_split_rifft_f32 (float32_t *pSrc, uint32_t fftLen, float32_t *pATable, float32_t *pBTable, float32_t *pDst, uint32_t modifier)
Core Real IFFT process.
void | arm_rfft_f32 (const arm_rfft_instance_f32 *S, float32_t *pSrc, float32_t *pDst)
Processing function for the floating-point RFFT/RIFFT.

Function Documentation

void arm_split_rfft_f32 | ( | float32_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | float32_t * | pATable,
 |  | float32_t * | pBTable,
 |  | float32_t * | pDst,
 |  | uint32_t | modifier
 | ) |  |

Core Real FFT process.

end of RFFT_RIFFT group

Parameters:
[in] | *pSrc | points to the input buffer.
[in] | fftLen | length of FFT.
[in] | *pATable | points to the twiddle Coef A buffer.
[in] | *pBTable | points to the twiddle Coef B buffer.
[out] | *pDst | points to the output buffer.
[in] | modifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 218 of file arm_rfft_f32.c.

void arm_split_rifft_f32 | ( | float32_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | float32_t * | pATable,
 |  | float32_t * | pBTable,
 |  | float32_t * | pDst,
 |  | uint32_t | modifier
 | ) |  |

Core Real IFFT process.

Parameters:
[in] | *pSrc | points to the input buffer.
[in] | fftLen | length of FFT.
[in] | *pATable | points to the twiddle Coef A buffer.
[in] | *pBTable | points to the twiddle Coef B buffer.
[out] | *pDst | points to the output buffer.
[in] | modifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 316 of file arm_rfft_f32.c.

Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_rfft_init_f32 (arm_rfft_instance_f32 *S, arm_cfft_radix4_instance_f32 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
Initialization function for the floating-point RFFT/RIFFT.
Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_rfft_init_q15 (arm_rfft_instance_q15 *S, arm_cfft_radix4_instance_q15 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
Initialization function for the Q15 RFFT/RIFFT.
Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status | arm_rfft_init_q31 (arm_rfft_instance_q31 *S, arm_cfft_radix4_instance_q31 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
Initialization function for the Q31 RFFT/RIFFT.

Variables

const q31_t | realCoefAQ31 [1024]
const q31_t | realCoefBQ31 [1024]
Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void | arm_split_rfft_q15 (q15_t *pSrc, uint32_t fftLen, q15_t *pATable, q15_t *pBTable, q15_t *pDst, uint32_t modifier)
Core Real FFT process.
void | arm_split_rifft_q15 (q15_t *pSrc, uint32_t fftLen, q15_t *pATable, q15_t *pBTable, q15_t *pDst, uint32_t modifier)
Core Real IFFT process.
void | arm_rfft_q15 (const arm_rfft_instance_q15 *S, q15_t *pSrc, q15_t *pDst)
Processing function for the Q15 RFFT/RIFFT.

Function Documentation

void arm_split_rfft_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | q15_t * | pATable,
 |  | q15_t * | pBTable,
 |  | q15_t * | pDst,
 |  | uint32_t | modifier
 | ) |  |

Core Real FFT process.

end of RFFT_RIFFT group

Parameters:
*pSrc | points to the input buffer.
fftLen | length of FFT.
*pATable | points to the A twiddle Coef buffer.
*pBTable | points to the B twiddle Coef buffer.
*pDst | points to the output buffer.
modifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none. The function implements a Real FFT

Definition at line 143 of file arm_rfft_q15.c.

void arm_split_rifft_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | q15_t * | pATable,
 |  | q15_t * | pBTable,
 |  | q15_t * | pDst,
 |  | uint32_t | modifier
 | ) |  |

Core Real IFFT process.

Parameters:
[in] | *pSrc | points to the input buffer.
[in] | fftLen | length of FFT.
[in] | *pATable | points to the twiddle Coef A buffer.
[in] | *pBTable | points to the twiddle Coef B buffer.
[out] | *pDst | points to the output buffer.
[in] | modifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none. The function implements a Real IFFT

Definition at line 312 of file arm_rfft_q15.c.

Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c File Reference
#include "arm_math.h"

Go to the source code of this file.

Functions

void | arm_split_rfft_q31 (q31_t *pSrc, uint32_t fftLen, q31_t *pATable, q31_t *pBTable, q31_t *pDst, uint32_t modifier)
Core Real FFT process.
void | arm_split_rifft_q31 (q31_t *pSrc, uint32_t fftLen, q31_t *pATable, q31_t *pBTable, q31_t *pDst, uint32_t modifier)
Core Real IFFT process.
void | arm_rfft_q31 (const arm_rfft_instance_q31 *S, q31_t *pSrc, q31_t *pDst)
Processing function for the Q31 RFFT/RIFFT.

Function Documentation

void arm_split_rfft_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | q31_t * | pATable,
 |  | q31_t * | pBTable,
 |  | q31_t * | pDst,
 |  | uint32_t | modifier
 | ) |  |

Core Real FFT process.

end of RFFT_RIFFT group

Parameters:
[in] | *pSrc | points to the input buffer.
[in] | fftLen | length of FFT.
[in] | *pATable | points to the twiddle Coef A buffer.
[in] | *pBTable | points to the twiddle Coef B buffer.
[out] | *pDst | points to the output buffer.
[in] | modifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 143 of file arm_rfft_q31.c.

void arm_split_rifft_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | q31_t * | pATable,
 |  | q31_t * | pBTable,
 |  | q31_t * | pDst,
 |  | uint32_t | modifier
 | ) |  |

Core Real IFFT process.

Parameters:
[in] | *pSrc | points to the input buffer.
[in] | fftLen | length of FFT.
[in] | *pATable | points to the twiddle Coef A buffer.
[in] | *pBTable | points to the twiddle Coef B buffer.
[out] | *pDst | points to the output buffer.
[in] | modifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 249 of file arm_rfft_q31.c.

Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_common_tables.h File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_common_tables.h File Reference
#include "arm_math.h"

Go to the source code of this file.

Variables

uint16_t | armBitRevTable [256]
q15_t | armRecipTableQ15 [64]
q31_t | armRecipTableQ31 [64]
const q31_t | realCoefAQ31 [1024]
const q31_t | realCoefBQ31 [1024]

Variable Documentation

q15_t armRecipTableQ15[64]

end of CFFT_CIFFT group

Definition at line 115 of file arm_common_tables.c.

q31_t armRecipTableQ31[64]

Definition at line 132 of file arm_common_tables.c.

Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h File Reference

Data Structures | Defines | Typedefs | Enumerations | Functions
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h File Reference
#include "ARMCM4.h"
#include "string.h"
#include "math.h"

Go to the source code of this file.

Data Structures

struct | arm_fir_instance_q7
Instance structure for the Q7 FIR filter. More...
struct | arm_fir_instance_q15
Instance structure for the Q15 FIR filter. More...
struct | arm_fir_instance_q31
Instance structure for the Q31 FIR filter. More...
struct | arm_fir_instance_f32
Instance structure for the floating-point FIR filter. More...
struct | arm_biquad_casd_df1_inst_q15
Instance structure for the Q15 Biquad cascade filter. More...
struct | arm_biquad_casd_df1_inst_q31
Instance structure for the Q31 Biquad cascade filter. More...
struct | arm_biquad_casd_df1_inst_f32
Instance structure for the floating-point Biquad cascade filter. More...
struct | arm_matrix_instance_f32
Instance structure for the floating-point matrix structure. More...
struct | arm_matrix_instance_q15
Instance structure for the Q15 matrix structure. More...
struct | arm_matrix_instance_q31
Instance structure for the Q31 matrix structure. More...
struct | arm_pid_instance_q15
Instance structure for the Q15 PID Control. More...
struct | arm_pid_instance_q31
Instance structure for the Q31 PID Control. More...
struct | arm_pid_instance_f32
Instance structure for the floating-point PID Control. More...
struct | arm_linear_interp_instance_f32
Instance structure for the floating-point Linear Interpolate function. More...
struct | arm_bilinear_interp_instance_f32
Instance structure for the floating-point bilinear interpolation function. More...
struct | arm_bilinear_interp_instance_q31
Instance structure for the Q31 bilinear interpolation function. More...
struct | arm_bilinear_interp_instance_q15
Instance structure for the Q15 bilinear interpolation function. More...
struct | arm_bilinear_interp_instance_q7
Instance structure for the Q15 bilinear interpolation function. More...
struct | arm_cfft_radix4_instance_q15
Instance structure for the Q15 CFFT/CIFFT function. More...
struct | arm_cfft_radix4_instance_q31
Instance structure for the Q31 CFFT/CIFFT function. More...
struct | arm_cfft_radix4_instance_f32
Instance structure for the floating-point CFFT/CIFFT function. More...
struct | arm_rfft_instance_q15
Instance structure for the Q15 RFFT/RIFFT function. More...
struct | arm_rfft_instance_q31
Instance structure for the Q31 RFFT/RIFFT function. More...
struct | arm_rfft_instance_f32
Instance structure for the floating-point RFFT/RIFFT function. More...
struct | arm_dct4_instance_f32
Instance structure for the floating-point DCT4/IDCT4 function. More...
struct | arm_dct4_instance_q31
Instance structure for the Q31 DCT4/IDCT4 function. More...
struct | arm_dct4_instance_q15
Instance structure for the Q15 DCT4/IDCT4 function. More...
struct | arm_fir_decimate_instance_q15
Instance structure for the Q15 FIR decimator. More...
struct | arm_fir_decimate_instance_q31
Instance structure for the Q31 FIR decimator. More...
struct | arm_fir_decimate_instance_f32
Instance structure for the floating-point FIR decimator. More...
struct | arm_fir_interpolate_instance_q15
Instance structure for the Q15 FIR interpolator. More...
struct | arm_fir_interpolate_instance_q31
Instance structure for the Q31 FIR interpolator. More...
struct | arm_fir_interpolate_instance_f32
Instance structure for the floating-point FIR interpolator. More...
struct | arm_biquad_cas_df1_32x64_ins_q31
Instance structure for the high precision Q31 Biquad cascade filter. More...
struct | arm_biquad_cascade_df2T_instance_f32
Instance structure for the floating-point transposed direct form II Biquad cascade filter. More...
struct | arm_fir_lattice_instance_q15
Instance structure for the Q15 FIR lattice filter. More...
struct | arm_fir_lattice_instance_q31
Instance structure for the Q31 FIR lattice filter. More...
struct | arm_fir_lattice_instance_f32
Instance structure for the floating-point FIR lattice filter. More...
struct | arm_iir_lattice_instance_q15
Instance structure for the Q15 IIR lattice filter. More...
struct | arm_iir_lattice_instance_q31
Instance structure for the Q31 IIR lattice filter. More...
struct | arm_iir_lattice_instance_f32
Instance structure for the floating-point IIR lattice filter. More...
struct | arm_lms_instance_f32
Instance structure for the floating-point LMS filter. More...
struct | arm_lms_instance_q15
Instance structure for the Q15 LMS filter. More...
struct | arm_lms_instance_q31
Instance structure for the Q31 LMS filter. More...
struct | arm_lms_norm_instance_f32
Instance structure for the floating-point normalized LMS filter. More...
struct | arm_lms_norm_instance_q31
Instance structure for the Q31 normalized LMS filter. More...
struct | arm_lms_norm_instance_q15
Instance structure for the Q15 normalized LMS filter. More...
struct | arm_fir_sparse_instance_f32
Instance structure for the floating-point sparse FIR filter. More...
struct | arm_fir_sparse_instance_q31
Instance structure for the Q31 sparse FIR filter. More...
struct | arm_fir_sparse_instance_q15
Instance structure for the Q15 sparse FIR filter. More...
struct | arm_fir_sparse_instance_q7
Instance structure for the Q7 sparse FIR filter. More...

Defines

#define | __CMSIS_GENERIC
#define | DELTA_Q31 (0x100)
Macros required for reciprocal calculation in Normalized LMS.
#define | DELTA_Q15 0x5
#define | INDEX_MASK 0x0000003F
#define | PI 3.14159265358979f
#define | TABLE_SIZE 256
Macros required for SINE and COSINE Fast math approximations.
#define | TABLE_SPACING_Q31 0x800000
#define | TABLE_SPACING_Q15 0x80
#define | INPUT_SPACING 0xB60B61
Macros required for SINE and COSINE Controller functions.
#define | __SIMD32(addr) (*(int32_t **) & (addr))
definition to read/write two 16 bit values.
#define | __PACKq7(v0, v1, v2, v3)
definition to pack four 8 bit values.

Typedefs

typedef int8_t | q7_t
8-bit fractional data type in 1.7 format.
typedef int16_t | q15_t
16-bit fractional data type in 1.15 format.
typedef int32_t | q31_t
32-bit fractional data type in 1.31 format.
typedef int64_t | q63_t
64-bit fractional data type in 1.63 format.
typedef float | float32_t
32-bit floating-point type definition.
typedef double | float64_t
64-bit floating-point type definition.

Enumerations

enum arm_status {
ARM_MATH_SUCCESS = 0, ARM_MATH_ARGUMENT_ERROR = -1, ARM_MATH_LENGTH_ERROR = -2, ARM_MATH_SIZE_MISMATCH = -3,
ARM_MATH_NANINF = -4, ARM_MATH_SINGULAR = -5, ARM_MATH_TEST_FAILURE = -6
}
Error status returned by some functions in the library. More...

Functions

void | arm_fir_q7 (const arm_fir_instance_q7 *S, q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
Processing function for the Q7 FIR filter.
void | arm_fir_init_q7 (arm_fir_instance_q7 *S, uint16_t numTaps, q7_t *pCoeffs, q7_t *pState, uint32_t blockSize)
Initialization function for the Q7 FIR filter.
void | arm_fir_q15 (const arm_fir_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 FIR filter.
void | arm_fir_fast_q15 (const arm_fir_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.
arm_status | arm_fir_init_q15 (arm_fir_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
Initialization function for the Q15 FIR filter.
void | arm_fir_q31 (const arm_fir_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 FIR filter.
void | arm_fir_fast_q31 (const arm_fir_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.
void | arm_fir_init_q31 (arm_fir_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
Initialization function for the Q31 FIR filter.
void | arm_fir_f32 (const arm_fir_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point FIR filter.
void | arm_fir_init_f32 (arm_fir_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
Initialization function for the floating-point FIR filter.
void | arm_biquad_cascade_df1_q15 (const arm_biquad_casd_df1_inst_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 Biquad cascade filter.
void | arm_biquad_cascade_df1_init_q15 (arm_biquad_casd_df1_inst_q15 *S, uint8_t numStages, q15_t *pCoeffs, q15_t *pState, int8_t postShift)
Initialization function for the Q15 Biquad cascade filter.
void | arm_biquad_cascade_df1_fast_q15 (const arm_biquad_casd_df1_inst_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
void | arm_biquad_cascade_df1_q31 (const arm_biquad_casd_df1_inst_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 Biquad cascade filter.
void | arm_biquad_cascade_df1_fast_q31 (const arm_biquad_casd_df1_inst_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
void | arm_biquad_cascade_df1_init_q31 (arm_biquad_casd_df1_inst_q31 *S, uint8_t numStages, q31_t *pCoeffs, q31_t *pState, int8_t postShift)
Initialization function for the Q31 Biquad cascade filter.
void | arm_biquad_cascade_df1_f32 (const arm_biquad_casd_df1_inst_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point Biquad cascade filter.
void | arm_biquad_cascade_df1_init_f32 (arm_biquad_casd_df1_inst_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
Initialization function for the floating-point Biquad cascade filter.
arm_status | arm_mat_add_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
Floating-point matrix addition.
arm_status | arm_mat_add_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst)
Q15 matrix addition.
arm_status | arm_mat_add_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
Q31 matrix addition.
arm_status | arm_mat_trans_f32 (const arm_matrix_instance_f32 *pSrc, arm_matrix_instance_f32 *pDst)
Floating-point matrix transpose.
arm_status | arm_mat_trans_q15 (const arm_matrix_instance_q15 *pSrc, arm_matrix_instance_q15 *pDst)
Q15 matrix transpose.
arm_status | arm_mat_trans_q31 (const arm_matrix_instance_q31 *pSrc, arm_matrix_instance_q31 *pDst)
Q31 matrix transpose.
arm_status | arm_mat_mult_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
Floating-point matrix multiplication.
arm_status | arm_mat_mult_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pState)
Q15 matrix multiplication.
arm_status | arm_mat_mult_fast_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pState)
Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4.
arm_status | arm_mat_mult_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
Q31 matrix multiplication.
arm_status | arm_mat_mult_fast_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4.
arm_status | arm_mat_sub_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
Floating-point matrix subtraction.
arm_status | arm_mat_sub_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst)
Q15 matrix subtraction.
arm_status | arm_mat_sub_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
Q31 matrix subtraction.
arm_status | arm_mat_scale_f32 (const arm_matrix_instance_f32 *pSrc, float32_t scale, arm_matrix_instance_f32 *pDst)
Floating-point matrix scaling.
arm_status | arm_mat_scale_q15 (const arm_matrix_instance_q15 *pSrc, q15_t scaleFract, int32_t shift, arm_matrix_instance_q15 *pDst)
Q15 matrix scaling.
arm_status | arm_mat_scale_q31 (const arm_matrix_instance_q31 *pSrc, q31_t scaleFract, int32_t shift, arm_matrix_instance_q31 *pDst)
Q31 matrix scaling.
void | arm_mat_init_q31 (arm_matrix_instance_q31 *S, uint16_t nRows, uint16_t nColumns, q31_t *pData)
Q31 matrix initialization.
void | arm_mat_init_q15 (arm_matrix_instance_q15 *S, uint16_t nRows, uint16_t nColumns, q15_t *pData)
Q15 matrix initialization.
void | arm_mat_init_f32 (arm_matrix_instance_f32 *S, uint16_t nRows, uint16_t nColumns, float32_t *pData)
Floating-point matrix initialization.
void | arm_pid_init_f32 (arm_pid_instance_f32 *S, int32_t resetStateFlag)
Initialization function for the floating-point PID Control.
void | arm_pid_reset_f32 (arm_pid_instance_f32 *S)
Reset function for the floating-point PID Control.
void | arm_pid_init_q31 (arm_pid_instance_q31 *S, int32_t resetStateFlag)
Initialization function for the Q31 PID Control.
void | arm_pid_reset_q31 (arm_pid_instance_q31 *S)
Reset function for the Q31 PID Control.
void | arm_pid_init_q15 (arm_pid_instance_q15 *S, int32_t resetStateFlag)
Initialization function for the Q15 PID Control.
void | arm_pid_reset_q15 (arm_pid_instance_q15 *S)
Reset function for the Q15 PID Control.
void | arm_mult_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
Q7 vector multiplication.
void | arm_mult_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
Q15 vector multiplication.
void | arm_mult_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
Q31 vector multiplication.
void | arm_mult_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
Floating-point vector multiplication.
void | arm_cfft_radix4_q15 (const arm_cfft_radix4_instance_q15 *S, q15_t *pSrc)
Processing function for the Q15 CFFT/CIFFT.
arm_status | arm_cfft_radix4_init_q15 (arm_cfft_radix4_instance_q15 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
Initialization function for the Q15 CFFT/CIFFT.
void | arm_cfft_radix4_q31 (const arm_cfft_radix4_instance_q31 *S, q31_t *pSrc)
Processing function for the Q31 CFFT/CIFFT.
arm_status | arm_cfft_radix4_init_q31 (arm_cfft_radix4_instance_q31 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
Initialization function for the Q31 CFFT/CIFFT.
void | arm_cfft_radix4_f32 (const arm_cfft_radix4_instance_f32 *S, float32_t *pSrc)
Processing function for the floating-point CFFT/CIFFT.
arm_status | arm_cfft_radix4_init_f32 (arm_cfft_radix4_instance_f32 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
Initialization function for the floating-point CFFT/CIFFT.
void | arm_radix4_butterfly_f32 (float32_t *pSrc, uint16_t fftLen, float32_t *pCoef, uint16_t twidCoefModifier)
Core function for the floating-point CFFT butterfly process.
void | arm_radix4_butterfly_inverse_f32 (float32_t *pSrc, uint16_t fftLen, float32_t *pCoef, uint16_t twidCoefModifier, float32_t onebyfftLen)
Core function for the floating-point CIFFT butterfly process.
void | arm_bitreversal_f32 (float32_t *pSrc, uint16_t fftSize, uint16_t bitRevFactor, uint16_t *pBitRevTab)
In-place bit reversal function.
void | arm_radix4_butterfly_q31 (q31_t *pSrc, uint32_t fftLen, q31_t *pCoef, uint32_t twidCoefModifier)
Core function for the Q31 CFFT butterfly process.
void | arm_radix4_butterfly_inverse_q31 (q31_t *pSrc, uint32_t fftLen, q31_t *pCoef, uint32_t twidCoefModifier)
Core function for the Q31 CIFFT butterfly process.
void | arm_bitreversal_q31 (q31_t *pSrc, uint32_t fftLen, uint16_t bitRevFactor, uint16_t *pBitRevTab)
In-place bit reversal function.
void | arm_radix4_butterfly_q15 (q15_t *pSrc16, uint32_t fftLen, q15_t *pCoef16, uint32_t twidCoefModifier)
Core function for the Q15 CFFT butterfly process.
void | arm_radix4_butterfly_inverse_q15 (q15_t *pSrc16, uint32_t fftLen, q15_t *pCoef16, uint32_t twidCoefModifier)
Core function for the Q15 CIFFT butterfly process.
void | arm_bitreversal_q15 (q15_t *pSrc, uint32_t fftLen, uint16_t bitRevFactor, uint16_t *pBitRevTab)
In-place bit reversal function.
void | arm_rfft_q15 (const arm_rfft_instance_q15 *S, q15_t *pSrc, q15_t *pDst)
Processing function for the Q15 RFFT/RIFFT.
arm_status | arm_rfft_init_q15 (arm_rfft_instance_q15 *S, arm_cfft_radix4_instance_q15 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
Initialization function for the Q15 RFFT/RIFFT.
void | arm_rfft_q31 (const arm_rfft_instance_q31 *S, q31_t *pSrc, q31_t *pDst)
Processing function for the Q31 RFFT/RIFFT.
arm_status | arm_rfft_init_q31 (arm_rfft_instance_q31 *S, arm_cfft_radix4_instance_q31 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
Initialization function for the Q31 RFFT/RIFFT.
arm_status | arm_rfft_init_f32 (arm_rfft_instance_f32 *S, arm_cfft_radix4_instance_f32 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
Initialization function for the floating-point RFFT/RIFFT.
void | arm_rfft_f32 (const arm_rfft_instance_f32 *S, float32_t *pSrc, float32_t *pDst)
Processing function for the floating-point RFFT/RIFFT.
arm_status | arm_dct4_init_f32 (arm_dct4_instance_f32 *S, arm_rfft_instance_f32 *S_RFFT, arm_cfft_radix4_instance_f32 *S_CFFT, uint16_t N, uint16_t Nby2, float32_t normalize)
Initialization function for the floating-point DCT4/IDCT4.
void | arm_dct4_f32 (const arm_dct4_instance_f32 *S, float32_t *pState, float32_t *pInlineBuffer)
Processing function for the floating-point DCT4/IDCT4.
arm_status | arm_dct4_init_q31 (arm_dct4_instance_q31 *S, arm_rfft_instance_q31 *S_RFFT, arm_cfft_radix4_instance_q31 *S_CFFT, uint16_t N, uint16_t Nby2, q31_t normalize)
Initialization function for the Q31 DCT4/IDCT4.
void | arm_dct4_q31 (const arm_dct4_instance_q31 *S, q31_t *pState, q31_t *pInlineBuffer)
Processing function for the Q31 DCT4/IDCT4.
arm_status | arm_dct4_init_q15 (arm_dct4_instance_q15 *S, arm_rfft_instance_q15 *S_RFFT, arm_cfft_radix4_instance_q15 *S_CFFT, uint16_t N, uint16_t Nby2, q15_t normalize)
Initialization function for the Q15 DCT4/IDCT4.
void | arm_dct4_q15 (const arm_dct4_instance_q15 *S, q15_t *pState, q15_t *pInlineBuffer)
Processing function for the Q15 DCT4/IDCT4.
void | arm_add_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
Floating-point vector addition.
void | arm_add_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
Q7 vector addition.
void | arm_add_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
Q15 vector addition.
void | arm_add_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
Q31 vector addition.
void | arm_sub_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
Floating-point vector subtraction.
void | arm_sub_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
Q7 vector subtraction.
void | arm_sub_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
Q15 vector subtraction.
void | arm_sub_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
Q31 vector subtraction.
void | arm_scale_f32 (float32_t *pSrc, float32_t scale, float32_t *pDst, uint32_t blockSize)
Multiplies a floating-point vector by a scalar.
void | arm_scale_q7 (q7_t *pSrc, q7_t scaleFract, int8_t shift, q7_t *pDst, uint32_t blockSize)
Multiplies a Q7 vector by a scalar.
void | arm_scale_q15 (q15_t *pSrc, q15_t scaleFract, int8_t shift, q15_t *pDst, uint32_t blockSize)
Multiplies a Q15 vector by a scalar.
void | arm_scale_q31 (q31_t *pSrc, q31_t scaleFract, int8_t shift, q31_t *pDst, uint32_t blockSize)
Multiplies a Q31 vector by a scalar.
void | arm_abs_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
Q7 vector absolute value.
void | arm_abs_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Floating-point vector absolute value.
void | arm_abs_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Q15 vector absolute value.
void | arm_abs_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Q31 vector absolute value.
void | arm_dot_prod_f32 (float32_t *pSrcA, float32_t *pSrcB, uint32_t blockSize, float32_t *result)
Dot product of floating-point vectors.
void | arm_dot_prod_q7 (q7_t *pSrcA, q7_t *pSrcB, uint32_t blockSize, q31_t *result)
Dot product of Q7 vectors.
void | arm_dot_prod_q15 (q15_t *pSrcA, q15_t *pSrcB, uint32_t blockSize, q63_t *result)
Dot product of Q15 vectors.
void | arm_dot_prod_q31 (q31_t *pSrcA, q31_t *pSrcB, uint32_t blockSize, q63_t *result)
Dot product of Q31 vectors.
void | arm_shift_q7 (q7_t *pSrc, int8_t shiftBits, q7_t *pDst, uint32_t blockSize)
Shifts the elements of a Q7 vector a specified number of bits.
void | arm_shift_q15 (q15_t *pSrc, int8_t shiftBits, q15_t *pDst, uint32_t blockSize)
Shifts the elements of a Q15 vector a specified number of bits.
void | arm_shift_q31 (q31_t *pSrc, int8_t shiftBits, q31_t *pDst, uint32_t blockSize)
Shifts the elements of a Q31 vector a specified number of bits.
void | arm_offset_f32 (float32_t *pSrc, float32_t offset, float32_t *pDst, uint32_t blockSize)
Adds a constant offset to a floating-point vector.
void | arm_offset_q7 (q7_t *pSrc, q7_t offset, q7_t *pDst, uint32_t blockSize)
Adds a constant offset to a Q7 vector.
void | arm_offset_q15 (q15_t *pSrc, q15_t offset, q15_t *pDst, uint32_t blockSize)
Adds a constant offset to a Q15 vector.
void | arm_offset_q31 (q31_t *pSrc, q31_t offset, q31_t *pDst, uint32_t blockSize)
Adds a constant offset to a Q31 vector.
void | arm_negate_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Negates the elements of a floating-point vector.
void | arm_negate_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
Negates the elements of a Q7 vector.
void | arm_negate_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Negates the elements of a Q15 vector.
void | arm_negate_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Negates the elements of a Q31 vector.
void | arm_copy_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Copies the elements of a floating-point vector.
void | arm_copy_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
Copies the elements of a Q7 vector.
void | arm_copy_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Copies the elements of a Q15 vector.
void | arm_copy_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Copies the elements of a Q31 vector.
void | arm_fill_f32 (float32_t value, float32_t *pDst, uint32_t blockSize)
Fills a constant value into a floating-point vector.
void | arm_fill_q7 (q7_t value, q7_t *pDst, uint32_t blockSize)
Fills a constant value into a Q7 vector.
void | arm_fill_q15 (q15_t value, q15_t *pDst, uint32_t blockSize)
Fills a constant value into a Q15 vector.
void | arm_fill_q31 (q31_t value, q31_t *pDst, uint32_t blockSize)
Fills a constant value into a Q31 vector.
void | arm_conv_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst)
Convolution of floating-point sequences.
void | arm_conv_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
Convolution of Q15 sequences.
void | arm_conv_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
void | arm_conv_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
Convolution of Q31 sequences.
void | arm_conv_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
void | arm_conv_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst)
Convolution of Q7 sequences.
arm_status | arm_conv_partial_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst, uint32_t firstIndex, uint32_t numPoints)
Partial convolution of floating-point sequences.
arm_status | arm_conv_partial_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints)
Partial convolution of Q15 sequences.
arm_status | arm_conv_partial_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints)
Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
arm_status | arm_conv_partial_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst, uint32_t firstIndex, uint32_t numPoints)
Partial convolution of Q31 sequences.
arm_status | arm_conv_partial_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst, uint32_t firstIndex, uint32_t numPoints)
Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
arm_status | arm_conv_partial_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, uint32_t firstIndex, uint32_t numPoints)
Partial convolution of Q7 sequences.
void | arm_fir_decimate_f32 (const arm_fir_decimate_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point FIR decimator.
arm_status | arm_fir_decimate_init_f32 (arm_fir_decimate_instance_f32 *S, uint16_t numTaps, uint8_t M, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
Initialization function for the floating-point FIR decimator.
void | arm_fir_decimate_q15 (const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 FIR decimator.
void | arm_fir_decimate_fast_q15 (const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
arm_status | arm_fir_decimate_init_q15 (arm_fir_decimate_instance_q15 *S, uint16_t numTaps, uint8_t M, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
Initialization function for the Q15 FIR decimator.
void | arm_fir_decimate_q31 (const arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 FIR decimator.
void | arm_fir_decimate_fast_q31 (arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
arm_status | arm_fir_decimate_init_q31 (arm_fir_decimate_instance_q31 *S, uint16_t numTaps, uint8_t M, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
Initialization function for the Q31 FIR decimator.
void | arm_fir_interpolate_q15 (const arm_fir_interpolate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 FIR interpolator.
arm_status | arm_fir_interpolate_init_q15 (arm_fir_interpolate_instance_q15 *S, uint8_t L, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
Initialization function for the Q15 FIR interpolator.
void | arm_fir_interpolate_q31 (const arm_fir_interpolate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 FIR interpolator.
arm_status | arm_fir_interpolate_init_q31 (arm_fir_interpolate_instance_q31 *S, uint8_t L, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
Initialization function for the Q31 FIR interpolator.
void | arm_fir_interpolate_f32 (const arm_fir_interpolate_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point FIR interpolator.
arm_status | arm_fir_interpolate_init_f32 (arm_fir_interpolate_instance_f32 *S, uint8_t L, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
Initialization function for the floating-point FIR interpolator.
void | arm_biquad_cas_df1_32x64_q31 (const arm_biquad_cas_df1_32x64_ins_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_biquad_cas_df1_32x64_init_q31 (arm_biquad_cas_df1_32x64_ins_q31 *S, uint8_t numStages, q31_t *pCoeffs, q63_t *pState, uint8_t postShift)
void | arm_biquad_cascade_df2T_f32 (const arm_biquad_cascade_df2T_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point transposed direct form II Biquad cascade filter.
void | arm_biquad_cascade_df2T_init_f32 (arm_biquad_cascade_df2T_instance_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
Initialization function for the floating-point transposed direct form II Biquad cascade filter.
void | arm_fir_lattice_init_q15 (arm_fir_lattice_instance_q15 *S, uint16_t numStages, q15_t *pCoeffs, q15_t *pState)
Initialization function for the Q15 FIR lattice filter.
void | arm_fir_lattice_q15 (const arm_fir_lattice_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 FIR lattice filter.
void | arm_fir_lattice_init_q31 (arm_fir_lattice_instance_q31 *S, uint16_t numStages, q31_t *pCoeffs, q31_t *pState)
Initialization function for the Q31 FIR lattice filter.
void | arm_fir_lattice_q31 (const arm_fir_lattice_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 FIR lattice filter.
void | arm_fir_lattice_init_f32 (arm_fir_lattice_instance_f32 *S, uint16_t numStages, float32_t *pCoeffs, float32_t *pState)
Initialization function for the floating-point FIR lattice filter.
void | arm_fir_lattice_f32 (const arm_fir_lattice_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point FIR lattice filter.
void | arm_iir_lattice_f32 (const arm_iir_lattice_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
Processing function for the floating-point IIR lattice filter.
void | arm_iir_lattice_init_f32 (arm_iir_lattice_instance_f32 *S, uint16_t numStages, float32_t *pkCoeffs, float32_t *pvCoeffs, float32_t *pState, uint32_t blockSize)
Initialization function for the floating-point IIR lattice filter.
void | arm_iir_lattice_q31 (const arm_iir_lattice_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
Processing function for the Q31 IIR lattice filter.
void | arm_iir_lattice_init_q31 (arm_iir_lattice_instance_q31 *S, uint16_t numStages, q31_t *pkCoeffs, q31_t *pvCoeffs, q31_t *pState, uint32_t blockSize)
Initialization function for the Q31 IIR lattice filter.
void | arm_iir_lattice_q15 (const arm_iir_lattice_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
Processing function for the Q15 IIR lattice filter.
void | arm_iir_lattice_init_q15 (arm_iir_lattice_instance_q15 *S, uint16_t numStages, q15_t *pkCoeffs, q15_t *pvCoeffs, q15_t *pState, uint32_t blockSize)
Initialization function for the Q15 IIR lattice filter.
void | arm_lms_f32 (const arm_lms_instance_f32 *S, float32_t *pSrc, float32_t *pRef, float32_t *pOut, float32_t *pErr, uint32_t blockSize)
Processing function for floating-point LMS filter.
void | arm_lms_init_f32 (arm_lms_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, float32_t mu, uint32_t blockSize)
Initialization function for floating-point LMS filter.
void | arm_lms_init_q15 (arm_lms_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, q15_t mu, uint32_t blockSize, uint32_t postShift)
Initialization function for the Q15 LMS filter.
void | arm_lms_q15 (const arm_lms_instance_q15 *S, q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize)
Processing function for Q15 LMS filter.
void | arm_lms_q31 (const arm_lms_instance_q31 *S, q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize)
Processing function for Q31 LMS filter.
void | arm_lms_init_q31 (arm_lms_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, q31_t mu, uint32_t blockSize, uint32_t postShift)
Initialization function for Q31 LMS filter.
void | arm_lms_norm_f32 (arm_lms_norm_instance_f32 *S, float32_t *pSrc, float32_t *pRef, float32_t *pOut, float32_t *pErr, uint32_t blockSize)
Processing function for floating-point normalized LMS filter.
void | arm_lms_norm_init_f32 (arm_lms_norm_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, float32_t mu, uint32_t blockSize)
Initialization function for floating-point normalized LMS filter.
void | arm_lms_norm_q31 (arm_lms_norm_instance_q31 *S, q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize)
Processing function for Q31 normalized LMS filter.
void | arm_lms_norm_init_q31 (arm_lms_norm_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, q31_t mu, uint32_t blockSize, uint8_t postShift)
Initialization function for Q31 normalized LMS filter.
void | arm_lms_norm_q15 (arm_lms_norm_instance_q15 *S, q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize)
Processing function for Q15 normalized LMS filter.
void | arm_lms_norm_init_q15 (arm_lms_norm_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, q15_t mu, uint32_t blockSize, uint8_t postShift)
Initialization function for Q15 normalized LMS filter.
void | arm_correlate_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst)
Correlation of floating-point sequences.
void | arm_correlate_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
Correlation of Q15 sequences.
void | arm_correlate_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
void | arm_correlate_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
Correlation of Q31 sequences.
void | arm_correlate_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
void | arm_correlate_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst)
Correlation of Q7 sequences.
void | arm_fir_sparse_f32 (arm_fir_sparse_instance_f32 *S, float32_t *pSrc, float32_t *pDst, float32_t *pScratchIn, uint32_t blockSize)
Processing function for the floating-point sparse FIR filter.
void | arm_fir_sparse_init_f32 (arm_fir_sparse_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
Initialization function for the floating-point sparse FIR filter.
void | arm_fir_sparse_q31 (arm_fir_sparse_instance_q31 *S, q31_t *pSrc, q31_t *pDst, q31_t *pScratchIn, uint32_t blockSize)
Processing function for the Q31 sparse FIR filter.
void | arm_fir_sparse_init_q31 (arm_fir_sparse_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
Initialization function for the Q31 sparse FIR filter.
void | arm_fir_sparse_q15 (arm_fir_sparse_instance_q15 *S, q15_t *pSrc, q15_t *pDst, q15_t *pScratchIn, q31_t *pScratchOut, uint32_t blockSize)
Processing function for the Q15 sparse FIR filter.
void | arm_fir_sparse_init_q15 (arm_fir_sparse_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
Initialization function for the Q15 sparse FIR filter.
void | arm_fir_sparse_q7 (arm_fir_sparse_instance_q7 *S, q7_t *pSrc, q7_t *pDst, q7_t *pScratchIn, q31_t *pScratchOut, uint32_t blockSize)
Processing function for the Q7 sparse FIR filter.
void | arm_fir_sparse_init_q7 (arm_fir_sparse_instance_q7 *S, uint16_t numTaps, q7_t *pCoeffs, q7_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
Initialization function for the Q7 sparse FIR filter.
void | arm_sin_cos_f32 (float32_t theta, float32_t *pSinVal, float32_t *pCcosVal)
Floating-point sin_cos function.
void | arm_sin_cos_q31 (q31_t theta, q31_t *pSinVal, q31_t *pCosVal)
Q31 sin_cos function.
void | arm_cmplx_conj_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
Floating-point complex conjugate.
void | arm_cmplx_conj_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
Q31 complex conjugate.
void | arm_cmplx_conj_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
Q15 complex conjugate.
void | arm_cmplx_mag_squared_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
Floating-point complex magnitude squared.
void | arm_cmplx_mag_squared_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
Q31 complex magnitude squared.
void | arm_cmplx_mag_squared_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
Q15 complex magnitude squared.
arm_status | arm_mat_inverse_f32 (const arm_matrix_instance_f32 *src, arm_matrix_instance_f32 *dst)
Floating-point matrix inverse.
void | arm_q7_to_q31 (q7_t *pSrc, q31_t *pDst, uint32_t blockSize)
Converts the elements of the Q7 vector to Q31 vector.
void | arm_q7_to_q15 (q7_t *pSrc, q15_t *pDst, uint32_t blockSize)
Converts the elements of the Q7 vector to Q15 vector.
void | arm_q7_to_float (q7_t *pSrc, float32_t *pDst, uint32_t blockSize)
Converts the elements of the Q7 vector to floating-point vector.
void | arm_q31_to_float (q31_t *pSrc, float32_t *pDst, uint32_t blockSize)
Converts the elements of the Q31 vector to floating-point vector.
float32_t | arm_sin_f32 (float32_t x)
Fast approximation to the trigonometric sine function for floating-point data.
q31_t | arm_sin_q31 (q31_t x)
Fast approximation to the trigonometric sine function for Q31 data.
q15_t | arm_sin_q15 (q15_t x)
Fast approximation to the trigonometric sine function for Q15 data.
float32_t | arm_cos_f32 (float32_t x)
Fast approximation to the trigonometric cosine function for floating-point data.
q31_t | arm_cos_q31 (q31_t x)
Fast approximation to the trigonometric cosine function for Q31 data.
q15_t | arm_cos_q15 (q15_t x)
Fast approximation to the trigonometric cosine function for Q15 data.
arm_status | arm_sqrt_q31 (q31_t in, q31_t *pOut)
Q31 square root function.
arm_status | arm_sqrt_q15 (q15_t in, q15_t *pOut)
Q15 square root function.
void | arm_power_q31 (q31_t *pSrc, uint32_t blockSize, q63_t *pResult)
Sum of the squares of the elements of a Q31 vector.
void | arm_power_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
Sum of the squares of the elements of a floating-point vector.
void | arm_power_q15 (q15_t *pSrc, uint32_t blockSize, q63_t *pResult)
Sum of the squares of the elements of a Q15 vector.
void | arm_power_q7 (q7_t *pSrc, uint32_t blockSize, q31_t *pResult)
Sum of the squares of the elements of a Q7 vector.
void | arm_mean_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult)
Mean value of a Q7 vector.
void | arm_mean_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
Mean value of a Q15 vector.
void | arm_mean_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
Mean value of a Q31 vector.
void | arm_mean_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
Mean value of a floating-point vector.
void | arm_var_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
Variance of the elements of a floating-point vector.
void | arm_var_q31 (q31_t *pSrc, uint32_t blockSize, q63_t *pResult)
Variance of the elements of a Q31 vector.
void | arm_var_q15 (q15_t *pSrc, uint32_t blockSize, q31_t *pResult)
Variance of the elements of a Q15 vector.
void | arm_rms_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
Root Mean Square of the elements of a floating-point vector.
void | arm_rms_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
Root Mean Square of the elements of a Q31 vector.
void | arm_rms_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
Root Mean Square of the elements of a Q15 vector.
void | arm_std_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
Standard deviation of the elements of a floating-point vector.
void | arm_std_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
Standard deviation of the elements of a Q31 vector.
void | arm_std_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
Standard deviation of the elements of a Q15 vector.
void | arm_cmplx_mag_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
Floating-point complex magnitude.
void | arm_cmplx_mag_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
Q31 complex magnitude.
void | arm_cmplx_mag_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
Q15 complex magnitude.
void | arm_cmplx_dot_prod_q15 (q15_t *pSrcA, q15_t *pSrcB, uint32_t numSamples, q31_t *realResult, q31_t *imagResult)
Q15 complex dot product.
void | arm_cmplx_dot_prod_q31 (q31_t *pSrcA, q31_t *pSrcB, uint32_t numSamples, q63_t *realResult, q63_t *imagResult)
Q31 complex dot product.
void | arm_cmplx_dot_prod_f32 (float32_t *pSrcA, float32_t *pSrcB, uint32_t numSamples, float32_t *realResult, float32_t *imagResult)
Floating-point complex dot product.
void | arm_cmplx_mult_real_q15 (q15_t *pSrcCmplx, q15_t *pSrcReal, q15_t *pCmplxDst, uint32_t numSamples)
Q15 complex-by-real multiplication.
void | arm_cmplx_mult_real_q31 (q31_t *pSrcCmplx, q31_t *pSrcReal, q31_t *pCmplxDst, uint32_t numSamples)
Q31 complex-by-real multiplication.
void | arm_cmplx_mult_real_f32 (float32_t *pSrcCmplx, float32_t *pSrcReal, float32_t *pCmplxDst, uint32_t numSamples)
Floating-point complex-by-real multiplication.
void | arm_min_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *result, uint32_t *index)
Minimum value of a Q7 vector.
void | arm_min_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult, uint32_t *pIndex)
Minimum value of a Q15 vector.
void | arm_min_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult, uint32_t *pIndex)
Minimum value of a Q31 vector.
void | arm_min_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult, uint32_t *pIndex)
Minimum value of a floating-point vector.
void | arm_max_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult, uint32_t *pIndex)
Maximum value of a Q7 vector.
void | arm_max_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult, uint32_t *pIndex)
Maximum value of a Q15 vector.
void | arm_max_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult, uint32_t *pIndex)
Maximum value of a Q31 vector.
void | arm_max_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult, uint32_t *pIndex)
Maximum value of a floating-point vector.
void | arm_cmplx_mult_cmplx_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t numSamples)
Q15 complex-by-complex multiplication.
void | arm_cmplx_mult_cmplx_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t numSamples)
Q31 complex-by-complex multiplication.
void | arm_cmplx_mult_cmplx_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t numSamples)
Floating-point complex-by-complex multiplication.
void | arm_float_to_q31 (float32_t *pSrc, q31_t *pDst, uint32_t blockSize)
Converts the elements of the floating-point vector to Q31 vector.
void | arm_float_to_q15 (float32_t *pSrc, q15_t *pDst, uint32_t blockSize)
Converts the elements of the floating-point vector to Q15 vector.
void | arm_float_to_q7 (float32_t *pSrc, q7_t *pDst, uint32_t blockSize)
Converts the elements of the floating-point vector to Q7 vector.
void | arm_q31_to_q15 (q31_t *pSrc, q15_t *pDst, uint32_t blockSize)
Converts the elements of the Q31 vector to Q15 vector.
void | arm_q31_to_q7 (q31_t *pSrc, q7_t *pDst, uint32_t blockSize)
Converts the elements of the Q31 vector to Q7 vector.
void | arm_q15_to_float (q15_t *pSrc, float32_t *pDst, uint32_t blockSize)
Converts the elements of the Q15 vector to floating-point vector.
void | arm_q15_to_q31 (q15_t *pSrc, q31_t *pDst, uint32_t blockSize)
Converts the elements of the Q15 vector to Q31 vector.
void | arm_q15_to_q7 (q15_t *pSrc, q7_t *pDst, uint32_t blockSize)
Converts the elements of the Q15 vector to Q7 vector.

Define Documentation

#define __CMSIS_GENERIC

Definition at line 267 of file arm_math.h.

#define __PACKq7 | ( | v0,
 |  | v1,
 |  | v2,
 |  | v3
 | ) |
Value:
( (((int32_t)(v0) <<  0) & (int32_t)0x000000FF) |       \
                                (((int32_t)(v1) <<  8) & (int32_t)0x0000FF00) | \
                                                            (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) |     \
                                                            (((int32_t)(v3) << 24) & (int32_t)0xFF000000)  )

definition to pack four 8 bit values.

Definition at line 379 of file arm_math.h.

#define __SIMD32 ( addr ) (*(int32_t **) & (addr))

definition to read/write two 16 bit values.

Definition at line 362 of file arm_math.h.

#define DELTA_Q15 0x5

Definition at line 294 of file arm_math.h.

#define DELTA_Q31 (0x100)

Macros required for reciprocal calculation in Normalized LMS.

Definition at line 293 of file arm_math.h.

#define INDEX_MASK 0x0000003F

Definition at line 295 of file arm_math.h.

#define INPUT_SPACING 0xB60B61

Macros required for SINE and COSINE Controller functions.

Definition at line 311 of file arm_math.h.

#define PI 3.14159265358979f

Definition at line 296 of file arm_math.h.

#define TABLE_SIZE 256

Macros required for SINE and COSINE Fast math approximations.

Definition at line 302 of file arm_math.h.

#define TABLE_SPACING_Q15 0x80

Definition at line 304 of file arm_math.h.

#define TABLE_SPACING_Q31 0x800000

Definition at line 303 of file arm_math.h.

Typedef Documentation

typedef float float32_t

32-bit floating-point type definition.

Definition at line 352 of file arm_math.h.

typedef double float64_t

64-bit floating-point type definition.

Definition at line 357 of file arm_math.h.

typedef int16_t q15_t

16-bit fractional data type in 1.15 format.

Definition at line 337 of file arm_math.h.

typedef int32_t q31_t

32-bit fractional data type in 1.31 format.

Definition at line 342 of file arm_math.h.

typedef int64_t q63_t

64-bit fractional data type in 1.63 format.

Definition at line 347 of file arm_math.h.

typedef int8_t q7_t

8-bit fractional data type in 1.7 format.

Definition at line 332 of file arm_math.h.

Enumeration Type Documentation

enum arm_status

Error status returned by some functions in the library.

Enumerator:
ARM_MATH_SUCCESS

No error

ARM_MATH_ARGUMENT_ERROR

One or more arguments are incorrect

ARM_MATH_LENGTH_ERROR

Length of data buffer is incorrect

ARM_MATH_SIZE_MISMATCH

Size of matrices is not compatible with the operation.

ARM_MATH_NANINF

Not-a-number (NaN) or infinity is generated

ARM_MATH_SINGULAR

Generated by matrix inversion if the input matrix is singular and cannot be inverted.

ARM_MATH_TEST_FAILURE

Test Failed

Definition at line 318 of file arm_math.h.

Function Documentation

void arm_bitreversal_f32 | ( | float32_t * | pSrc,
 |  | uint16_t | fftSize,
 |  | uint16_t | bitRevFactor,
 |  | uint16_t * | pBitRevTab
 | ) |  |

In-place bit reversal function.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of floating-point data type.
[in] | fftSize | length of the FFT.
[in] | bitRevFactor | bit reversal modifier that supports different size FFTs with the same bit reversal table.
[in] | *pBitRevTab | points to the bit reversal table.
Returns:
none.

Definition at line 1177 of file arm_cfft_radix4_f32.c.

void arm_bitreversal_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | uint16_t | bitRevFactor,
 |  | uint16_t * | pBitRevTab
 | ) |  |

In-place bit reversal function.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of Q15 data type.
[in] | fftLen | length of the FFT.
[in] | bitRevFactor | bit reversal modifier that supports different size FFTs with the same bit reversal table
[in] | *pBitRevTab | points to bit reversal table.
Returns:
none.

Definition at line 1906 of file arm_cfft_radix4_q15.c.

void arm_bitreversal_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | uint16_t | bitRevFactor,
 |  | uint16_t * | pBitRevTab
 | ) |  |

In-place bit reversal function.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of Q31 data type.
[in] | fftLen | length of the FFT.
[in] | bitRevFactor | bit reversal modifier that supports different size FFTs with the same bit reversal table
[in] | *pBitRevTab | points to bit reversal table.
Returns:
none.

Definition at line 848 of file arm_cfft_radix4_q31.c.

void arm_radix4_butterfly_f32 | ( | float32_t * | pSrc,
 |  | uint16_t | fftLen,
 |  | float32_t * | pCoef,
 |  | uint16_t | twidCoefModifier
 | ) |  |

Core function for the floating-point CFFT butterfly process.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of floating-point data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef | points to the twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

end of CFFT_CIFFT group

Definition at line 223 of file arm_cfft_radix4_f32.c.

void arm_radix4_butterfly_inverse_f32 | ( | float32_t * | pSrc,
 |  | uint16_t | fftLen,
 |  | float32_t * | pCoef,
 |  | uint16_t | twidCoefModifier,
 |  | float32_t | onebyfftLen
 | ) |  |

Core function for the floating-point CIFFT butterfly process.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of floating-point data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
[in] | onebyfftLen | value of 1/fftLen.
Returns:
none.

Definition at line 660 of file arm_cfft_radix4_f32.c.

void arm_radix4_butterfly_inverse_q15 | ( | q15_t * | pSrc16,
 |  | uint32_t | fftLen,
 |  | q15_t * | pCoef16,
 |  | uint32_t | twidCoefModifier
 | ) |  |

Core function for the Q15 CIFFT butterfly process.

Parameters:
[in,out] | *pSrc16 | points to the in-place buffer of Q15 data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef16 | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 1053 of file arm_cfft_radix4_q15.c.

void arm_radix4_butterfly_inverse_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | q31_t * | pCoef,
 |  | uint32_t | twidCoefModifier
 | ) |  |

Core function for the Q31 CIFFT butterfly process.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of Q31 data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 517 of file arm_cfft_radix4_q31.c.

void arm_radix4_butterfly_q15 | ( | q15_t * | pSrc16,
 |  | uint32_t | fftLen,
 |  | q15_t * | pCoef16,
 |  | uint32_t | twidCoefModifier
 | ) |  |

Core function for the Q15 CFFT butterfly process.

Parameters:
[in,out] | *pSrc16 | points to the in-place buffer of Q15 data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef16 | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

end of CFFT_CIFFT group

Parameters:
[in,out] | *pSrc16 | points to the in-place buffer of Q15 data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef16 | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 138 of file arm_cfft_radix4_q15.c.

void arm_radix4_butterfly_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | q31_t * | pCoef,
 |  | uint32_t | twidCoefModifier
 | ) |  |

Core function for the Q31 CFFT butterfly process.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of Q31 data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

end of CFFT_CIFFT group

Parameters:
[in,out] | *pSrc | points to the in-place buffer of Q31 data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 139 of file arm_cfft_radix4_q31.c.

Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cm3.h File Reference

Data Structures | Defines | Variables
C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cm3.h File Reference

CMSIS Cortex-M3 Core Peripheral Access Layer Header File. More...

#include <stdint.h>
#include "core_cmInstr.h"
#include "core_cmFunc.h"

Go to the source code of this file.

Data Structures

union | APSR_Type
Union type to access the Application Program Status Register (APSR). More...
union | IPSR_Type
Union type to access the Interrupt Program Status Register (IPSR). More...
union | xPSR_Type
Union type to access the Special-Purpose Program Status Registers (xPSR). More...
union | CONTROL_Type
Union type to access the Control Registers (CONTROL). More...
struct | NVIC_Type
Structure type to access the Nested Vectored Interrupt Controller (NVIC). More...
struct | SCB_Type
Structure type to access the System Control Block (SCB). More...
struct | SCnSCB_Type
Structure type to access the System Control and ID Register not in the SCB. More...
struct | SysTick_Type
Structure type to access the System Timer (SysTick). More...
struct | ITM_Type
Structure type to access the Instrumentation Trace Macrocell Register (ITM). More...
struct | CoreDebug_Type
Structure type to access the Core Debug Register (CoreDebug). More...

Defines

#define | __CORE_CM3_H_GENERIC
#define | __CM3_CMSIS_VERSION_MAIN (0x02)
#define | __CM3_CMSIS_VERSION_SUB (0x10)
#define | __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB)
#define | __CORTEX_M (0x03)
#define | __FPU_USED 0
#define | __CORE_CM3_H_DEPENDANT
#define | __I volatile const
#define | __O volatile
#define | __IO volatile
#define | NVIC_STIR_INTID_Pos 0
#define | NVIC_STIR_INTID_Msk (0x1FFUL << NVIC_STIR_INTID_Pos)
#define | SCB_CPUID_IMPLEMENTER_Pos 24
#define | SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)
#define | SCB_CPUID_VARIANT_Pos 20
#define | SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos)
#define | SCB_CPUID_ARCHITECTURE_Pos 16
#define | SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)
#define | SCB_CPUID_PARTNO_Pos 4
#define | SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos)
#define | SCB_CPUID_REVISION_Pos 0
#define | SCB_CPUID_REVISION_Msk (0xFUL << SCB_CPUID_REVISION_Pos)
#define | SCB_ICSR_NMIPENDSET_Pos 31
#define | SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos)
#define | SCB_ICSR_PENDSVSET_Pos 28
#define | SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos)
#define | SCB_ICSR_PENDSVCLR_Pos 27
#define | SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos)
#define | SCB_ICSR_PENDSTSET_Pos 26
#define | SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos)
#define | SCB_ICSR_PENDSTCLR_Pos 25
#define | SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos)
#define | SCB_ICSR_ISRPREEMPT_Pos 23
#define | SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos)
#define | SCB_ICSR_ISRPENDING_Pos 22
#define | SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos)
#define | SCB_ICSR_VECTPENDING_Pos 12
#define | SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)
#define | SCB_ICSR_RETTOBASE_Pos 11
#define | SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos)
#define | SCB_ICSR_VECTACTIVE_Pos 0
#define | SCB_ICSR_VECTACTIVE_Msk (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos)
#define | SCB_VTOR_TBLOFF_Pos 7
#define | SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)
#define | SCB_AIRCR_VECTKEY_Pos 16
#define | SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)
#define | SCB_AIRCR_VECTKEYSTAT_Pos 16
#define | SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)
#define | SCB_AIRCR_ENDIANESS_Pos 15
#define | SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos)
#define | SCB_AIRCR_PRIGROUP_Pos 8
#define | SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos)
#define | SCB_AIRCR_SYSRESETREQ_Pos 2
#define | SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos)
#define | SCB_AIRCR_VECTCLRACTIVE_Pos 1
#define | SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)
#define | SCB_AIRCR_VECTRESET_Pos 0
#define | SCB_AIRCR_VECTRESET_Msk (1UL << SCB_AIRCR_VECTRESET_Pos)
#define | SCB_SCR_SEVONPEND_Pos 4
#define | SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos)
#define | SCB_SCR_SLEEPDEEP_Pos 2
#define | SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos)
#define | SCB_SCR_SLEEPONEXIT_Pos 1
#define | SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos)
#define | SCB_CCR_STKALIGN_Pos 9
#define | SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos)
#define | SCB_CCR_BFHFNMIGN_Pos 8
#define | SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos)
#define | SCB_CCR_DIV_0_TRP_Pos 4
#define | SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos)
#define | SCB_CCR_UNALIGN_TRP_Pos 3
#define | SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos)
#define | SCB_CCR_USERSETMPEND_Pos 1
#define | SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos)
#define | SCB_CCR_NONBASETHRDENA_Pos 0
#define | SCB_CCR_NONBASETHRDENA_Msk (1UL << SCB_CCR_NONBASETHRDENA_Pos)
#define | SCB_SHCSR_USGFAULTENA_Pos 18
#define | SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos)
#define | SCB_SHCSR_BUSFAULTENA_Pos 17
#define | SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos)
#define | SCB_SHCSR_MEMFAULTENA_Pos 16
#define | SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos)
#define | SCB_SHCSR_SVCALLPENDED_Pos 15
#define | SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos)
#define | SCB_SHCSR_BUSFAULTPENDED_Pos 14
#define | SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)
#define | SCB_SHCSR_MEMFAULTPENDED_Pos 13
#define | SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)
#define | SCB_SHCSR_USGFAULTPENDED_Pos 12
#define | SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)
#define | SCB_SHCSR_SYSTICKACT_Pos 11
#define | SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos)
#define | SCB_SHCSR_PENDSVACT_Pos 10
#define | SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos)
#define | SCB_SHCSR_MONITORACT_Pos 8
#define | SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos)
#define | SCB_SHCSR_SVCALLACT_Pos 7
#define | SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos)
#define | SCB_SHCSR_USGFAULTACT_Pos 3
#define | SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos)
#define | SCB_SHCSR_BUSFAULTACT_Pos 1
#define | SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos)
#define | SCB_SHCSR_MEMFAULTACT_Pos 0
#define | SCB_SHCSR_MEMFAULTACT_Msk (1UL << SCB_SHCSR_MEMFAULTACT_Pos)
#define | SCB_CFSR_USGFAULTSR_Pos 16
#define | SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)
#define | SCB_CFSR_BUSFAULTSR_Pos 8
#define | SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)
#define | SCB_CFSR_MEMFAULTSR_Pos 0
#define | SCB_CFSR_MEMFAULTSR_Msk (0xFFUL << SCB_CFSR_MEMFAULTSR_Pos)
#define | SCB_HFSR_DEBUGEVT_Pos 31
#define | SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos)
#define | SCB_HFSR_FORCED_Pos 30
#define | SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos)
#define | SCB_HFSR_VECTTBL_Pos 1
#define | SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos)
#define | SCB_DFSR_EXTERNAL_Pos 4
#define | SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos)
#define | SCB_DFSR_VCATCH_Pos 3
#define | SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos)
#define | SCB_DFSR_DWTTRAP_Pos 2
#define | SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos)
#define | SCB_DFSR_BKPT_Pos 1
#define | SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos)
#define | SCB_DFSR_HALTED_Pos 0
#define | SCB_DFSR_HALTED_Msk (1UL << SCB_DFSR_HALTED_Pos)
#define | SCnSCB_ICTR_INTLINESNUM_Pos 0
#define | SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL << SCnSCB_ICTR_INTLINESNUM_Pos)
#define | SCnSCB_ACTLR_DISFOLD_Pos 2
#define | SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos)
#define | SCnSCB_ACTLR_DISDEFWBUF_Pos 1
#define | SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)
#define | SCnSCB_ACTLR_DISMCYCINT_Pos 0
#define | SCnSCB_ACTLR_DISMCYCINT_Msk (1UL << SCnSCB_ACTLR_DISMCYCINT_Pos)
#define | SysTick_CTRL_COUNTFLAG_Pos 16
#define | SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos)
#define | SysTick_CTRL_CLKSOURCE_Pos 2
#define | SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos)
#define | SysTick_CTRL_TICKINT_Pos 1
#define | SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos)
#define | SysTick_CTRL_ENABLE_Pos 0
#define | SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos)
#define | SysTick_LOAD_RELOAD_Pos 0
#define | SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos)
#define | SysTick_VAL_CURRENT_Pos 0
#define | SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)
#define | SysTick_CALIB_NOREF_Pos 31
#define | SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos)
#define | SysTick_CALIB_SKEW_Pos 30
#define | SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos)
#define | SysTick_CALIB_TENMS_Pos 0
#define | SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)
#define | ITM_TPR_PRIVMASK_Pos 0
#define | ITM_TPR_PRIVMASK_Msk (0xFUL << ITM_TPR_PRIVMASK_Pos)
#define | ITM_TCR_BUSY_Pos 23
#define | ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos)
#define | ITM_TCR_TraceBusID_Pos 16
#define | ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos)
#define | ITM_TCR_GTSFREQ_Pos 10
#define | ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos)
#define | ITM_TCR_TSPrescale_Pos 8
#define | ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos)
#define | ITM_TCR_SWOENA_Pos 4
#define | ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos)
#define | ITM_TCR_TXENA_Pos 3
#define | ITM_TCR_TXENA_Msk (1UL << ITM_TCR_TXENA_Pos)
#define | ITM_TCR_SYNCENA_Pos 2
#define | ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos)
#define | ITM_TCR_TSENA_Pos 1
#define | ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos)
#define | ITM_TCR_ITMENA_Pos 0
#define | ITM_TCR_ITMENA_Msk (1UL << ITM_TCR_ITMENA_Pos)
#define | CoreDebug_DHCSR_DBGKEY_Pos 16
#define | CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)
#define | CoreDebug_DHCSR_S_RESET_ST_Pos 25
#define | CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)
#define | CoreDebug_DHCSR_S_RETIRE_ST_Pos 24
#define | CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)
#define | CoreDebug_DHCSR_S_LOCKUP_Pos 19
#define | CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)
#define | CoreDebug_DHCSR_S_SLEEP_Pos 18
#define | CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)
#define | CoreDebug_DHCSR_S_HALT_Pos 17
#define | CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos)
#define | CoreDebug_DHCSR_S_REGRDY_Pos 16
#define | CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)
#define | CoreDebug_DHCSR_C_SNAPSTALL_Pos 5
#define | CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)
#define | CoreDebug_DHCSR_C_MASKINTS_Pos 3
#define | CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)
#define | CoreDebug_DHCSR_C_STEP_Pos 2
#define | CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos)
#define | CoreDebug_DHCSR_C_HALT_Pos 1
#define | CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos)
#define | CoreDebug_DHCSR_C_DEBUGEN_Pos 0
#define | CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos)
#define | CoreDebug_DCRSR_REGWnR_Pos 16
#define | CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos)
#define | CoreDebug_DCRSR_REGSEL_Pos 0
#define | CoreDebug_DCRSR_REGSEL_Msk (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos)
#define | CoreDebug_DEMCR_TRCENA_Pos 24
#define | CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos)
#define | CoreDebug_DEMCR_MON_REQ_Pos 19
#define | CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos)
#define | CoreDebug_DEMCR_MON_STEP_Pos 18
#define | CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos)
#define | CoreDebug_DEMCR_MON_PEND_Pos 17
#define | CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos)
#define | CoreDebug_DEMCR_MON_EN_Pos 16
#define | CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos)
#define | CoreDebug_DEMCR_VC_HARDERR_Pos 10
#define | CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)
#define | CoreDebug_DEMCR_VC_INTERR_Pos 9
#define | CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)
#define | CoreDebug_DEMCR_VC_BUSERR_Pos 8
#define | CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)
#define | CoreDebug_DEMCR_VC_STATERR_Pos 7
#define | CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)
#define | CoreDebug_DEMCR_VC_CHKERR_Pos 6
#define | CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)
#define | CoreDebug_DEMCR_VC_NOCPERR_Pos 5
#define | CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)
#define | CoreDebug_DEMCR_VC_MMERR_Pos 4
#define | CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)
#define | CoreDebug_DEMCR_VC_CORERESET_Pos 0
#define | CoreDebug_DEMCR_VC_CORERESET_Msk (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos)
#define | ITM_RXBUFFER_EMPTY 0x5AA55AA5
#define | SCS_BASE (0xE000E000UL)
#define | ITM_BASE (0xE0000000UL)
#define | CoreDebug_BASE (0xE000EDF0UL)
#define | SysTick_BASE (SCS_BASE + 0x0010UL)
#define | NVIC_BASE (SCS_BASE + 0x0100UL)
#define | SCB_BASE (SCS_BASE + 0x0D00UL)
#define | SCnSCB ((SCnSCB_Type *) SCS_BASE )
#define | SCB ((SCB_Type *) SCB_BASE )
#define | SysTick ((SysTick_Type *) SysTick_BASE )
#define | NVIC ((NVIC_Type *) NVIC_BASE )
#define | ITM ((ITM_Type *) ITM_BASE )
#define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE)

Variables

volatile int32_t | ITM_RxBuffer

Detailed Description

CMSIS Cortex-M3 Core Peripheral Access Layer Header File.

Version:
V2.10
Date:
19. July 2011
Note:
Copyright (C) 2009-2011 ARM Limited. All rights reserved.
ARM Limited (ARM) is supplying this software for use with Cortex-M processor based microcontrollers. This file can be freely distributed within development tools that are supporting such ARM based processors.
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file core_cm3.h.

Define Documentation

#define __CORE_CM3_H_GENERIC

Definition at line 32 of file core_cm3.h.

Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cmFunc.h File Reference

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cmFunc.h File Reference

CMSIS Cortex-M Core Function Access Header File. More...

Go to the source code of this file.

Detailed Description

CMSIS Cortex-M Core Function Access Header File.

Version:
V2.10
Date:
26. July 2011
Note:
Copyright (C) 2009-2011 ARM Limited. All rights reserved.
ARM Limited (ARM) is supplying this software for use with Cortex-M processor based microcontrollers. This file can be freely distributed within development tools that are supporting such ARM based processors.
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file core_cmFunc.h.

Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cmInstr.h File Reference

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cmInstr.h File Reference

CMSIS Cortex-M Core Instruction Access Header File. More...

Go to the source code of this file.

Detailed Description

CMSIS Cortex-M Core Instruction Access Header File.

Version:
V2.10
Date:
19. July 2011
Note:
Copyright (C) 2009-2011 ARM Limited. All rights reserved.
ARM Limited (ARM) is supplying this software for use with Cortex-M processor based microcontrollers. This file can be freely distributed within development tools that are supporting such ARM based processors.
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file core_cmInstr.h.

Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h File Reference

Data Structures | Defines | Typedefs | Enumerations
C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h File Reference

CMSIS Cortex-M3 Core Peripheral Access Layer Header File for NXP LPC17xx Device Series. More...

#include "core_cm3.h"
#include "system_LPC17xx.h"

Go to the source code of this file.

Data Structures

struct | LPC_SC_TypeDef
System Control (SC) register structure definition. More...
struct | LPC_PINCON_TypeDef
Pin Connect Block (PINCON) register structure definition. More...
struct | LPC_GPIO_TypeDef
General Purpose Input/Output (GPIO) register structure definition. More...
struct | LPC_GPIOINT_TypeDef
General Purpose Input/Output interrupt (GPIOINT) register structure definition. More...
struct | LPC_TIM_TypeDef
Timer (TIM) register structure definition. More...
struct | LPC_PWM_TypeDef
Pulse-Width Modulation (PWM) register structure definition. More...
struct | LPC_UART_TypeDef
Universal Asynchronous Receiver Transmitter (UART) register structure definition. More...
struct | LPC_UART0_TypeDef
Universal Asynchronous Receiver Transmitter 0 (UART0) register structure definition. More...
struct | LPC_UART1_TypeDef
Universal Asynchronous Receiver Transmitter 1 (UART1) register structure definition. More...
struct | LPC_SPI_TypeDef
Serial Peripheral Interface (SPI) register structure definition. More...
struct | LPC_SSP_TypeDef
Synchronous Serial Communication (SSP) register structure definition. More...
struct | LPC_I2C_TypeDef
Inter-Integrated Circuit (I2C) register structure definition. More...
struct | LPC_I2S_TypeDef
Inter IC Sound (I2S) register structure definition. More...
struct | LPC_RIT_TypeDef
Repetitive Interrupt Timer (RIT) register structure definition. More...
struct | LPC_RTC_TypeDef
Real-Time Clock (RTC) register structure definition. More...
struct | LPC_WDT_TypeDef
Watchdog Timer (WDT) register structure definition. More...
struct | LPC_ADC_TypeDef
Analog-to-Digital Converter (ADC) register structure definition. More...
struct | LPC_DAC_TypeDef
Digital-to-Analog Converter (DAC) register structure definition. More...
struct | LPC_MCPWM_TypeDef
Motor Control Pulse-Width Modulation (MCPWM) register structure definition. More...
struct | LPC_QEI_TypeDef
Quadrature Encoder Interface (QEI) register structure definition. More...
struct | LPC_CANAF_RAM_TypeDef
Controller Area Network Acceptance Filter RAM (CANAF_RAM)structure definition. More...
struct | LPC_CANAF_TypeDef
Controller Area Network Acceptance Filter(CANAF) register structure definition. More...
struct | LPC_CANCR_TypeDef
Controller Area Network Central (CANCR) register structure definition. More...
struct | LPC_CAN_TypeDef
Controller Area Network Controller (CAN) register structure definition. More...
struct | LPC_GPDMA_TypeDef
General Purpose Direct Memory Access (GPDMA) register structure definition. More...
struct | LPC_GPDMACH_TypeDef
General Purpose Direct Memory Access Channel (GPDMACH) register structure definition. More...
struct | LPC_USB_TypeDef
Universal Serial Bus (USB) register structure definition. More...
struct | LPC_EMAC_TypeDef
Ethernet Media Access Controller (EMAC) register structure definition. More...

Defines

#define | __MPU_PRESENT 1
#define | __NVIC_PRIO_BITS 5
#define | __Vendor_SysTickConfig 0
#define | LPC_FLASH_BASE (0x00000000UL)
#define | LPC_RAM_BASE (0x10000000UL)
#define | LPC_AHBRAM0_BASE (0x2007C000UL)
#define | LPC_AHBRAM1_BASE (0x20080000UL)
#define | LPC_GPIO_BASE (0x2009C000UL)
#define | LPC_APB0_BASE (0x40000000UL)
#define | LPC_APB1_BASE (0x40080000UL)
#define | LPC_AHB_BASE (0x50000000UL)
#define | LPC_CM3_BASE (0xE0000000UL)
#define | LPC_WDT_BASE (LPC_APB0_BASE + 0x00000)
#define | LPC_TIM0_BASE (LPC_APB0_BASE + 0x04000)
#define | LPC_TIM1_BASE (LPC_APB0_BASE + 0x08000)
#define | LPC_UART0_BASE (LPC_APB0_BASE + 0x0C000)
#define | LPC_UART1_BASE (LPC_APB0_BASE + 0x10000)
#define | LPC_PWM1_BASE (LPC_APB0_BASE + 0x18000)
#define | LPC_I2C0_BASE (LPC_APB0_BASE + 0x1C000)
#define | LPC_SPI_BASE (LPC_APB0_BASE + 0x20000)
#define | LPC_RTC_BASE (LPC_APB0_BASE + 0x24000)
#define | LPC_GPIOINT_BASE (LPC_APB0_BASE + 0x28080)
#define | LPC_PINCON_BASE (LPC_APB0_BASE + 0x2C000)
#define | LPC_SSP1_BASE (LPC_APB0_BASE + 0x30000)
#define | LPC_ADC_BASE (LPC_APB0_BASE + 0x34000)
#define | LPC_CANAF_RAM_BASE (LPC_APB0_BASE + 0x38000)
#define | LPC_CANAF_BASE (LPC_APB0_BASE + 0x3C000)
#define | LPC_CANCR_BASE (LPC_APB0_BASE + 0x40000)
#define | LPC_CAN1_BASE (LPC_APB0_BASE + 0x44000)
#define | LPC_CAN2_BASE (LPC_APB0_BASE + 0x48000)
#define | LPC_I2C1_BASE (LPC_APB0_BASE + 0x5C000)
#define | LPC_SSP0_BASE (LPC_APB1_BASE + 0x08000)
#define | LPC_DAC_BASE (LPC_APB1_BASE + 0x0C000)
#define | LPC_TIM2_BASE (LPC_APB1_BASE + 0x10000)
#define | LPC_TIM3_BASE (LPC_APB1_BASE + 0x14000)
#define | LPC_UART2_BASE (LPC_APB1_BASE + 0x18000)
#define | LPC_UART3_BASE (LPC_APB1_BASE + 0x1C000)
#define | LPC_I2C2_BASE (LPC_APB1_BASE + 0x20000)
#define | LPC_I2S_BASE (LPC_APB1_BASE + 0x28000)
#define | LPC_RIT_BASE (LPC_APB1_BASE + 0x30000)
#define | LPC_MCPWM_BASE (LPC_APB1_BASE + 0x38000)
#define | LPC_QEI_BASE (LPC_APB1_BASE + 0x3C000)
#define | LPC_SC_BASE (LPC_APB1_BASE + 0x7C000)
#define | LPC_EMAC_BASE (LPC_AHB_BASE + 0x00000)
#define | LPC_GPDMA_BASE (LPC_AHB_BASE + 0x04000)
#define | LPC_GPDMACH0_BASE (LPC_AHB_BASE + 0x04100)
#define | LPC_GPDMACH1_BASE (LPC_AHB_BASE + 0x04120)
#define | LPC_GPDMACH2_BASE (LPC_AHB_BASE + 0x04140)
#define | LPC_GPDMACH3_BASE (LPC_AHB_BASE + 0x04160)
#define | LPC_GPDMACH4_BASE (LPC_AHB_BASE + 0x04180)
#define | LPC_GPDMACH5_BASE (LPC_AHB_BASE + 0x041A0)
#define | LPC_GPDMACH6_BASE (LPC_AHB_BASE + 0x041C0)
#define | LPC_GPDMACH7_BASE (LPC_AHB_BASE + 0x041E0)
#define | LPC_USB_BASE (LPC_AHB_BASE + 0x0C000)
#define | LPC_GPIO0_BASE (LPC_GPIO_BASE + 0x00000)
#define | LPC_GPIO1_BASE (LPC_GPIO_BASE + 0x00020)
#define | LPC_GPIO2_BASE (LPC_GPIO_BASE + 0x00040)
#define | LPC_GPIO3_BASE (LPC_GPIO_BASE + 0x00060)
#define | LPC_GPIO4_BASE (LPC_GPIO_BASE + 0x00080)
#define | LPC_SC ((LPC_SC_TypeDef *) LPC_SC_BASE )
#define | LPC_GPIO0 ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE )
#define | LPC_GPIO1 ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE )
#define | LPC_GPIO2 ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE )
#define | LPC_GPIO3 ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE )
#define | LPC_GPIO4 ((LPC_GPIO_TypeDef *) LPC_GPIO4_BASE )
#define | LPC_WDT ((LPC_WDT_TypeDef *) LPC_WDT_BASE )
#define | LPC_TIM0 ((LPC_TIM_TypeDef *) LPC_TIM0_BASE )
#define | LPC_TIM1 ((LPC_TIM_TypeDef *) LPC_TIM1_BASE )
#define | LPC_TIM2 ((LPC_TIM_TypeDef *) LPC_TIM2_BASE )
#define | LPC_TIM3 ((LPC_TIM_TypeDef *) LPC_TIM3_BASE )
#define | LPC_RIT ((LPC_RIT_TypeDef *) LPC_RIT_BASE )
#define | LPC_UART0 ((LPC_UART_TypeDef *) LPC_UART0_BASE )
#define | LPC_UART1 ((LPC_UART1_TypeDef *) LPC_UART1_BASE )
#define | LPC_UART2 ((LPC_UART_TypeDef *) LPC_UART2_BASE )
#define | LPC_UART3 ((LPC_UART_TypeDef *) LPC_UART3_BASE )
#define | LPC_PWM1 ((LPC_PWM_TypeDef *) LPC_PWM1_BASE )
#define | LPC_I2C0 ((LPC_I2C_TypeDef *) LPC_I2C0_BASE )
#define | LPC_I2C1 ((LPC_I2C_TypeDef *) LPC_I2C1_BASE )
#define | LPC_I2C2 ((LPC_I2C_TypeDef *) LPC_I2C2_BASE )
#define | LPC_I2S ((LPC_I2S_TypeDef *) LPC_I2S_BASE )
#define | LPC_SPI ((LPC_SPI_TypeDef *) LPC_SPI_BASE )
#define | LPC_RTC ((LPC_RTC_TypeDef *) LPC_RTC_BASE )
#define | LPC_GPIOINT ((LPC_GPIOINT_TypeDef *) LPC_GPIOINT_BASE )
#define | LPC_PINCON ((LPC_PINCON_TypeDef *) LPC_PINCON_BASE )
#define | LPC_SSP0 ((LPC_SSP_TypeDef *) LPC_SSP0_BASE )
#define | LPC_SSP1 ((LPC_SSP_TypeDef *) LPC_SSP1_BASE )
#define | LPC_ADC ((LPC_ADC_TypeDef *) LPC_ADC_BASE )
#define | LPC_DAC ((LPC_DAC_TypeDef *) LPC_DAC_BASE )
#define | LPC_CANAF_RAM ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE)
#define | LPC_CANAF ((LPC_CANAF_TypeDef *) LPC_CANAF_BASE )
#define | LPC_CANCR ((LPC_CANCR_TypeDef *) LPC_CANCR_BASE )
#define | LPC_CAN1 ((LPC_CAN_TypeDef *) LPC_CAN1_BASE )
#define | LPC_CAN2 ((LPC_CAN_TypeDef *) LPC_CAN2_BASE )
#define | LPC_MCPWM ((LPC_MCPWM_TypeDef *) LPC_MCPWM_BASE )
#define | LPC_QEI ((LPC_QEI_TypeDef *) LPC_QEI_BASE )
#define | LPC_EMAC ((LPC_EMAC_TypeDef *) LPC_EMAC_BASE )
#define | LPC_GPDMA ((LPC_GPDMA_TypeDef *) LPC_GPDMA_BASE )
#define | LPC_GPDMACH0 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH0_BASE )
#define | LPC_GPDMACH1 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH1_BASE )
#define | LPC_GPDMACH2 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH2_BASE )
#define | LPC_GPDMACH3 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH3_BASE )
#define | LPC_GPDMACH4 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH4_BASE )
#define | LPC_GPDMACH5 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH5_BASE )
#define | LPC_GPDMACH6 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH6_BASE )
#define | LPC_GPDMACH7 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH7_BASE )
#define | LPC_USB ((LPC_USB_TypeDef *) LPC_USB_BASE )

Typedefs

typedef enum IRQn | IRQn_Type
IRQ interrupt source definition.

Enumerations

enum IRQn {
NonMaskableInt_IRQn = -14, MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10,
SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1,
WDT_IRQn = 0, TIMER0_IRQn = 1, TIMER1_IRQn = 2, TIMER2_IRQn = 3,
TIMER3_IRQn = 4, UART0_IRQn = 5, UART1_IRQn = 6, UART2_IRQn = 7,
UART3_IRQn = 8, PWM1_IRQn = 9, I2C0_IRQn = 10, I2C1_IRQn = 11,
I2C2_IRQn = 12, SPI_IRQn = 13, SSP0_IRQn = 14, SSP1_IRQn = 15,
PLL0_IRQn = 16, RTC_IRQn = 17, EINT0_IRQn = 18, EINT1_IRQn = 19,
EINT2_IRQn = 20, EINT3_IRQn = 21, ADC_IRQn = 22, BOD_IRQn = 23,
USB_IRQn = 24, CAN_IRQn = 25, DMA_IRQn = 26, I2S_IRQn = 27,
ENET_IRQn = 28, RIT_IRQn = 29, MCPWM_IRQn = 30, QEI_IRQn = 31,
PLL1_IRQn = 32, USBActivity_IRQn = 33, CANActivity_IRQn = 34
}
IRQ interrupt source definition. More...

Detailed Description

CMSIS Cortex-M3 Core Peripheral Access Layer Header File for NXP LPC17xx Device Series.

Version:
: V1.09
Date:
: 25. July. 2011
Note:
Copyright (C) 2009 ARM Limited. All rights reserved.
ARM Limited (ARM) is supplying this software for use with Cortex-M processor based microcontrollers. This file can be freely distributed within development tools that are supporting such ARM based processors.
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file LPC17xx.h.

Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/system_LPC17xx.h File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/system_LPC17xx.h File Reference

CMSIS Cortex-M3 Device Peripheral Access Layer Header File for the NXP LPC17xx Device Series. More...

#include <stdint.h>

Go to the source code of this file.

Functions

void | SystemInit (void)
Setup the microcontroller system. Initialize the System and update the SystemCoreClock variable.
void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.

Variables

uint32_t | SystemCoreClock

Detailed Description

CMSIS Cortex-M3 Device Peripheral Access Layer Header File for the NXP LPC17xx Device Series.

Version:
V1.02
Date:
08. September 2009
Note:
Copyright (C) 2009 ARM Limited. All rights reserved.
ARM Limited (ARM) is supplying this software for use with Cortex-M processor based microcontrollers. This file can be freely distributed within development tools that are supporting such ARM based processors.
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file system_LPC17xx.h.

Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Source/Template/system_LPC17xx.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Source/Template/system_LPC17xx.c File Reference

CMSIS Cortex-M3 Device Peripheral Access Layer Source File for the NXP LPC17xx Device Series. More...

#include <stdint.h>
#include "LPC17xx.h"

Go to the source code of this file.

Defines

#define | CLOCK_SETUP 1
#define | SCS_Val 0x00000020
#define | CLKSRCSEL_Val 0x00000001
#define | PLL0_SETUP 1
#define | PLL0CFG_Val 0x00050063
#define | PLL1_SETUP 1
#define | PLL1CFG_Val 0x00000023
#define | CCLKCFG_Val 0x00000003
#define | USBCLKCFG_Val 0x00000000
#define | PCLKSEL0_Val 0x00000000
#define | PCLKSEL1_Val 0x00000000
#define | PCONP_Val 0x042887DE
#define | CLKOUTCFG_Val 0x00000000
#define | FLASH_SETUP 1
#define | FLASHCFG_Val 0x0000303A
#define | CHECK_RANGE(val, min, max) ((val < min) || (val > max))
#define | CHECK_RSVD(val, mask) (val & mask)
#define | XTAL (12000000UL)
#define | OSC_CLK ( XTAL)
#define | RTC_CLK ( 32768UL)
#define | IRC_OSC ( 4000000UL)
#define | __M (((PLL0CFG_Val ) & 0x7FFF) + 1)
#define | __N (((PLL0CFG_Val >> 16) & 0x00FF) + 1)
#define | __FCCO(__F_IN) ((2 * __M * __F_IN) / __N)
#define | __CCLK_DIV (((CCLKCFG_Val ) & 0x00FF) + 1)
#define | __CORE_CLK (__FCCO(OSC_CLK) / __CCLK_DIV)

Functions

void | SystemCoreClockUpdate (void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
void | SystemInit (void)
Setup the microcontroller system. Initialize the System.

Variables

uint32_t | SystemCoreClock = __CORE_CLK

Detailed Description

CMSIS Cortex-M3 Device Peripheral Access Layer Source File for the NXP LPC17xx Device Series.

Version:
V1.03
Date:
07. October 2009
Note:
Copyright (C) 2009 ARM Limited. All rights reserved.
ARM Limited (ARM) is supplying this software for use with Cortex-M processor based microcontrollers. This file can be freely distributed within development tools that are supporting such ARM based processors.
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file system_LPC17xx.c.

Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/debug_frmwrk.h File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Drivers/include/debug_frmwrk.h File Reference

Contains some utilities that used for debugging through UART. More...

#include "lpc17xx_uart.h"

Go to the source code of this file.

Defines

#define | USED_UART_DEBUG_PORT 0
#define | DEBUG_UART_PORT LPC_UART0
#define | _DBG(x) _db_msg(DEBUG_UART_PORT, x)
#define | _DBG_(x) _db_msg_(DEBUG_UART_PORT, x)
#define | _DBC(x) _db_char(DEBUG_UART_PORT, x)
#define | _DBD(x) _db_dec(DEBUG_UART_PORT, x)
#define | _DBD16(x) _db_dec_16(DEBUG_UART_PORT, x)
#define | _DBD32(x) _db_dec_32(DEBUG_UART_PORT, x)
#define | _DBH(x) _db_hex(DEBUG_UART_PORT, x)
#define | _DBH16(x) _db_hex_16(DEBUG_UART_PORT, x)
#define | _DBH32(x) _db_hex_32(DEBUG_UART_PORT, x)
#define | _DG _db_get_char(DEBUG_UART_PORT)

Functions

void | UARTPutChar (LPC_UART_TypeDef *UARTx, uint8_t ch)
Puts a character to UART port.
void | UARTPuts (LPC_UART_TypeDef *UARTx, const void *str)
Puts a string to UART port.
void | UARTPuts_ (LPC_UART_TypeDef *UARTx, const void *str)
Puts a string to UART port and print new line.
void | UARTPutDec (LPC_UART_TypeDef *UARTx, uint8_t decnum)
Puts a decimal number to UART port.
void | UARTPutDec16 (LPC_UART_TypeDef *UARTx, uint16_t decnum)
Puts a decimal number to UART port.
void | UARTPutDec32 (LPC_UART_TypeDef *UARTx, uint32_t decnum)
Puts a decimal number to UART port.
void | UARTPutHex (LPC_UART_TypeDef *UARTx, uint8_t hexnum)
Puts a hex number to UART port.
void | UARTPutHex16 (LPC_UART_TypeDef *UARTx, uint16_t hexnum)
Puts a hex number to UART port.
void | UARTPutHex32 (LPC_UART_TypeDef *UARTx, uint32_t hexnum)
Puts a hex number to UART port.
uint8_t | UARTGetChar (LPC_UART_TypeDef *UARTx)
Get a character to UART port.
void | debug_frmwrk_init (void)
*********************************************************************//**

Variables

void(* | _db_msg )(LPC_UART_TypeDef *UARTx, const void *s)
void(* | _db_msg_ )(LPC_UART_TypeDef *UARTx, const void *s)
void(* | _db_char )(LPC_UART_TypeDef *UARTx, uint8_t ch)
void(* | _db_dec )(LPC_UART_TypeDef *UARTx, uint8_t decn)
void(* | _db_dec_16 )(LPC_UART_TypeDef *UARTx, uint16_t decn)
void(* | _db_dec_32 )(LPC_UART_TypeDef *UARTx, uint32_t decn)
void(* | _db_hex )(LPC_UART_TypeDef *UARTx, uint8_t hexn)
void(* | _db_hex_16 )(LPC_UART_TypeDef *UARTx, uint16_t hexn)
void(* | _db_hex_32 )(LPC_UART_TypeDef *UARTx, uint32_t hexn)
uint8_t(* | _db_get_char )(LPC_UART_TypeDef *UARTx)

Detailed Description

Contains some utilities that used for debugging through UART.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file debug_frmwrk.h.

Define Documentation

#define _DBC ( x ) _db_char(DEBUG_UART_PORT, x)

Definition at line 41 of file debug_frmwrk.h.

#define _DBD ( x ) _db_dec(DEBUG_UART_PORT, x)

Definition at line 42 of file debug_frmwrk.h.

#define _DBD16 ( x ) _db_dec_16(DEBUG_UART_PORT, x)

Definition at line 43 of file debug_frmwrk.h.

#define _DBD32 ( x ) _db_dec_32(DEBUG_UART_PORT, x)

Definition at line 44 of file debug_frmwrk.h.

#define _DBG ( x ) _db_msg(DEBUG_UART_PORT, x)

Definition at line 39 of file debug_frmwrk.h.

#define _DBG_ ( x ) _db_msg_(DEBUG_UART_PORT, x)

Definition at line 40 of file debug_frmwrk.h.

#define _DBH ( x ) _db_hex(DEBUG_UART_PORT, x)

Definition at line 45 of file debug_frmwrk.h.

#define _DBH16 ( x ) _db_hex_16(DEBUG_UART_PORT, x)

Definition at line 46 of file debug_frmwrk.h.

#define _DBH32 ( x ) _db_hex_32(DEBUG_UART_PORT, x)

Definition at line 47 of file debug_frmwrk.h.

#define _DG _db_get_char(DEBUG_UART_PORT)

Definition at line 48 of file debug_frmwrk.h.

#define DEBUG_UART_PORT LPC_UART0

Definition at line 34 of file debug_frmwrk.h.

#define USED_UART_DEBUG_PORT 0

Definition at line 31 of file debug_frmwrk.h.

Function Documentation

void debug_frmwrk_init ( void )

*********************************************************************//**

Initialize Debug frame work through initializing UART port

Parameters:
[in] None
Returns:
None

Definition at line 253 of file debug_frmwrk.c.

uint8_t UARTGetChar ( LPC_UART_TypeDef * UARTx )

Get a character to UART port.

Parameters:
[in] UARTx Pointer to UART peripheral
Returns:
character value that returned

Definition at line 71 of file debug_frmwrk.c.

void UARTPutChar | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint8_t | ch
 | ) |  |

Puts a character to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | ch | Character to put
Returns:
None

Definition at line 60 of file debug_frmwrk.c.

void UARTPutDec | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint8_t | decnum
 | ) |  |

Puts a decimal number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | decnum | Decimal number (8-bit long)
Returns:
None

Definition at line 115 of file debug_frmwrk.c.

void UARTPutDec16 | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint16_t | decnum
 | ) |  |

Puts a decimal number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | decnum | Decimal number (8-bit long)
Returns:
None

Definition at line 131 of file debug_frmwrk.c.

void UARTPutDec32 | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint32_t | decnum
 | ) |  |

Puts a decimal number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | decnum | Decimal number (8-bit long)
Returns:
None

Definition at line 151 of file debug_frmwrk.c.

void UARTPutHex | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint8_t | hexnum
 | ) |  |

Puts a hex number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | hexnum | Hex number (8-bit long)
Returns:
None

Definition at line 181 of file debug_frmwrk.c.

void UARTPutHex16 | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint16_t | hexnum
 | ) |  |

Puts a hex number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | hexnum | Hex number (16-bit long)
Returns:
None

Definition at line 200 of file debug_frmwrk.c.

void UARTPutHex32 | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint32_t | hexnum
 | ) |  |

Puts a hex number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | hexnum | Hex number (32-bit long)
Returns:
None

Definition at line 218 of file debug_frmwrk.c.

void UARTPuts | ( | LPC_UART_TypeDef * | UARTx,
 |  | const void * | str
 | ) |  |

Puts a string to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | str | string to put
Returns:
None

Definition at line 85 of file debug_frmwrk.c.

void UARTPuts_ | ( | LPC_UART_TypeDef * | UARTx,
 |  | const void * | str
 | ) |  |

Puts a string to UART port and print new line.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | str | String to put
Returns:
None

Definition at line 102 of file debug_frmwrk.c.

Variable Documentation

void(* _db_char)(LPC_UART_TypeDef *UARTx, uint8_t ch)

Definition at line 44 of file debug_frmwrk.c.

void(* _db_dec)(LPC_UART_TypeDef *UARTx, uint8_t decn)

Definition at line 45 of file debug_frmwrk.c.

void(* _db_dec_16)(LPC_UART_TypeDef *UARTx, uint16_t decn)

Definition at line 46 of file debug_frmwrk.c.

void(* _db_dec_32)(LPC_UART_TypeDef *UARTx, uint32_t decn)

Definition at line 47 of file debug_frmwrk.c.

uint8_t(* _db_get_char)(LPC_UART_TypeDef *UARTx)

Definition at line 51 of file debug_frmwrk.c.

void(* _db_hex)(LPC_UART_TypeDef *UARTx, uint8_t hexn)

Definition at line 48 of file debug_frmwrk.c.

void(* _db_hex_16)(LPC_UART_TypeDef *UARTx, uint16_t hexn)

Definition at line 49 of file debug_frmwrk.c.

void(* _db_hex_32)(LPC_UART_TypeDef *UARTx, uint32_t hexn)

Definition at line 50 of file debug_frmwrk.c.

void(* _db_msg)(LPC_UART_TypeDef *UARTx, const void *s)

Definition at line 42 of file debug_frmwrk.c.

void(* _db_msg_)(LPC_UART_TypeDef *UARTx, const void *s)

Definition at line 43 of file debug_frmwrk.c.

Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_adc.h File Reference

Defines | Enumerations | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_adc.h File Reference

Contains the NXP ABL typedefs for C standard types. It is intended to be used in ISO C conforming development environments and checks for this insofar as it is possible to do so. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | ADC_CR_CH_SEL(n) ((1UL << n))
#define | ADC_CR_CLKDIV(n) ((n<<8))
#define | ADC_CR_BURST ((1UL<<16))
#define | ADC_CR_PDN ((1UL<<21))
#define | ADC_CR_START_MASK ((7UL<<24))
#define | ADC_CR_START_MODE_SEL(SEL) ((SEL<<24))
#define | ADC_CR_START_NOW ((1UL<<24))
#define | ADC_CR_START_EINT0 ((2UL<<24))
#define | ADC_CR_START_CAP01 ((3UL<<24))
#define | ADC_CR_START_MAT01 ((4UL<<24))
#define | ADC_CR_START_MAT03 ((5UL<<24))
#define | ADC_CR_START_MAT10 ((6UL<<24))
#define | ADC_CR_START_MAT11 ((7UL<<24))
#define | ADC_CR_EDGE ((1UL<<27))
#define | ADC_GDR_RESULT(n) (((n>>4)&0xFFF))
#define | ADC_GDR_CH(n) (((n>>24)&0x7))
#define | ADC_GDR_OVERRUN_FLAG ((1UL<<30))
#define | ADC_GDR_DONE_FLAG ((1UL<<31))
#define | ADC_GDR_CH_MASK ((7UL<<24))
#define | ADC_INTEN_CH(n) ((1UL<<n))
#define | ADC_INTEN_GLOBAL ((1UL<<8))
#define | ADC_DR_RESULT(n) (((n>>4)&0xFFF))
#define | ADC_DR_OVERRUN_FLAG ((1UL<<30))
#define | ADC_DR_DONE_FLAG ((1UL<<31))
#define | ADC_STAT_CH_DONE_FLAG(n) ((n&0xFF))
#define | ADC_STAT_CH_OVERRUN_FLAG(n) (((n>>8)&0xFF))
#define | ADC_STAT_INT_FLAG ((1UL<<16))
#define | ADC_ADCOFFS(n) (((n&0xF)<<4))
#define | ADC_TRIM(n) (((n&0xF)<<8))
#define | PARAM_ADCx(n) (((uint32_t *)n)==((uint32_t *)LPC_ADC))
#define | PARAM_ADC_START_ON_EDGE_OPT(OPT) ((OPT == ADC_START_ON_RISING)||(OPT == ADC_START_ON_FALLING))
#define | PARAM_ADC_DATA_STATUS(OPT) ((OPT== ADC_DATA_BURST)||(OPT== ADC_DATA_DONE))
#define | PARAM_ADC_RATE(rate) ((rate>0)&&(rate<=200000))
#define | PARAM_ADC_CHANNEL_SELECTION(SEL)
#define | PARAM_ADC_START_OPT(OPT)
#define | PARAM_ADC_TYPE_INT_OPT(OPT)

Enumerations

enum ADC_CHANNEL_SELECTION {
ADC_CHANNEL_0 = 0, ADC_CHANNEL_1, ADC_CHANNEL_2, ADC_CHANNEL_3,
ADC_CHANNEL_4, ADC_CHANNEL_5, ADC_CHANNEL_6, ADC_CHANNEL_7
}
ADC enumeration. More...
enum ADC_START_OPT {
ADC_START_CONTINUOUS = 0, ADC_START_NOW, ADC_START_ON_EINT0, ADC_START_ON_CAP01,
ADC_START_ON_MAT01, ADC_START_ON_MAT03, ADC_START_ON_MAT10, ADC_START_ON_MAT11
}
Type of start option. More...
enum | ADC_START_ON_EDGE_OPT { ADC_START_ON_RISING = 0, ADC_START_ON_FALLING }
Type of edge when start conversion on the selected CAP/MAT signal. More...
enum ADC_TYPE_INT_OPT {
ADC_ADINTEN0 = 0, ADC_ADINTEN1, ADC_ADINTEN2, ADC_ADINTEN3,
ADC_ADINTEN4, ADC_ADINTEN5, ADC_ADINTEN6, ADC_ADINTEN7,
ADC_ADGINTEN
}
* ADC type interrupt enum More...
enum | ADC_DATA_STATUS { ADC_DATA_BURST = 0, ADC_DATA_DONE }
ADC Data status. More...

Functions

void | ADC_Init (LPC_ADC_TypeDef *ADCx, uint32_t rate)
Initial for ADC + Set bit PCADC + Set clock for ADC + Set Clock Frequency.
void | ADC_DeInit (LPC_ADC_TypeDef *ADCx)
Close ADC.
void | ADC_BurstCmd (LPC_ADC_TypeDef *ADCx, FunctionalState NewState)
ADC Burst mode setting.
void | ADC_PowerdownCmd (LPC_ADC_TypeDef *ADCx, FunctionalState NewState)
Set AD conversion in power mode.
void | ADC_StartCmd (LPC_ADC_TypeDef *ADCx, uint8_t start_mode)
Set start mode for ADC.
void | ADC_ChannelCmd (LPC_ADC_TypeDef *ADCx, uint8_t Channel, FunctionalState NewState)
Enable/Disable ADC channel number.
void | ADC_EdgeStartConfig (LPC_ADC_TypeDef *ADCx, uint8_t EdgeOption)
Set Edge start configuration.
void | ADC_IntConfig (LPC_ADC_TypeDef *ADCx, ADC_TYPE_INT_OPT IntType, FunctionalState NewState)
ADC interrupt configuration.
uint16_t | ADC_ChannelGetData (LPC_ADC_TypeDef *ADCx, uint8_t channel)
Get ADC result.
FlagStatus | ADC_ChannelGetStatus (LPC_ADC_TypeDef *ADCx, uint8_t channel, uint32_t StatusType)
Get ADC Chanel status from ADC data register.
uint32_t | ADC_GlobalGetData (LPC_ADC_TypeDef *ADCx)
Get ADC Data from AD Global register.
FlagStatus | ADC_GlobalGetStatus (LPC_ADC_TypeDef *ADCx, uint32_t StatusType)
Get ADC Chanel status from AD global data register.

Detailed Description

Contains the NXP ABL typedefs for C standard types. It is intended to be used in ISO C conforming development environments and checks for this insofar as it is possible to do so.

Version:
2.0
Date:
27 Jul. 2008
Author:
NXP MCU SW Application Team

Copyright(C) 2008, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_adc.h.

Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h File Reference

Data Structures | Defines | Enumerations | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h File Reference

Contains all macro definitions and function prototypes support for CAN firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | CAN_PinCFG_Type
Pin Configuration structure. More...
struct | CAN_MSG_Type
CAN message object structure. More...
struct | FullCAN_Entry
FullCAN Entry structure. More...
struct | SFF_Entry
Standard ID Frame Format Entry structure. More...
struct | SFF_GPR_Entry
Group of Standard ID Frame Format Entry structure. More...
struct | EFF_Entry
Extended ID Frame Format Entry structure. More...
struct | EFF_GPR_Entry
Group of Extended ID Frame Format Entry structure. More...
struct | AF_SectionDef
Acceptance Filter Section Table structure. More...

Defines

#define | MSG_ENABLE ((uint8_t)(0))
#define | MSG_DISABLE ((uint8_t)(1))
#define | CAN1_CTRL ((uint8_t)(0))
#define | CAN2_CTRL ((uint8_t)(1))
#define | PARAM_FULLCAN_IC(n) ((n==FULLCAN_IC0)||(n==FULLCAN_IC1))
#define | ID_11 1
#define | MAX_HW_FULLCAN_OBJ 64
#define | MAX_SW_FULLCAN_OBJ 32
#define | CAN_MOD_RM ((uint32_t)(1))
#define | CAN_MOD_LOM ((uint32_t)(1<<1))
#define | CAN_MOD_STM ((uint32_t)(1<<2))
#define | CAN_MOD_TPM ((uint32_t)(1<<3))
#define | CAN_MOD_SM ((uint32_t)(1<<4))
#define | CAN_MOD_RPM ((uint32_t)(1<<5))
#define | CAN_MOD_TM ((uint32_t)(1<<7))
#define | CAN_CMR_TR ((uint32_t)(1))
#define | CAN_CMR_AT ((uint32_t)(1<<1))
#define | CAN_CMR_RRB ((uint32_t)(1<<2))
#define | CAN_CMR_CDO ((uint32_t)(1<<3))
#define | CAN_CMR_SRR ((uint32_t)(1<<4))
#define | CAN_CMR_STB1 ((uint32_t)(1<<5))
#define | CAN_CMR_STB2 ((uint32_t)(1<<6))
#define | CAN_CMR_STB3 ((uint32_t)(1<<7))
#define | CAN_GSR_RBS ((uint32_t)(1))
#define | CAN_GSR_DOS ((uint32_t)(1<<1))
#define | CAN_GSR_TBS ((uint32_t)(1<<2))
#define | CAN_GSR_TCS ((uint32_t)(1<<3))
#define | CAN_GSR_RS ((uint32_t)(1<<4))
#define | CAN_GSR_TS ((uint32_t)(1<<5))
#define | CAN_GSR_ES ((uint32_t)(1<<6))
#define | CAN_GSR_BS ((uint32_t)(1<<7))
#define | CAN_GSR_RXERR(n) ((uint32_t)((n&0xFF)<<16))
#define | CAN_GSR_TXERR(n) ((uint32_t)(n&0xFF)<<24))
#define | CAN_ICR_RI ((uint32_t)(1))
#define | CAN_ICR_TI1 ((uint32_t)(1<<1))
#define | CAN_ICR_EI ((uint32_t)(1<<2))
#define | CAN_ICR_DOI ((uint32_t)(1<<3))
#define | CAN_ICR_WUI ((uint32_t)(1<<4))
#define | CAN_ICR_EPI ((uint32_t)(1<<5))
#define | CAN_ICR_ALI ((uint32_t)(1<<6))
#define | CAN_ICR_BEI ((uint32_t)(1<<7))
#define | CAN_ICR_IDI ((uint32_t)(1<<8))
#define | CAN_ICR_TI2 ((uint32_t)(1<<9))
#define | CAN_ICR_TI3 ((uint32_t)(1<<10))
#define | CAN_ICR_ERRBIT(n) ((uint32_t)((n&0x1F)<<16))
#define | CAN_ICR_ERRDIR ((uint32_t)(1<<21))
#define | CAN_ICR_ERRC(n) ((uint32_t)((n&0x3)<<22))
#define | CAN_ICR_ALCBIT(n) ((uint32_t)((n&0xFF)<<24))
#define | CAN_IER_RIE ((uint32_t)(1))
#define | CAN_IER_TIE1 ((uint32_t)(1<<1))
#define | CAN_IER_EIE ((uint32_t)(1<<2))
#define | CAN_IER_DOIE ((uint32_t)(1<<3))
#define | CAN_IER_WUIE ((uint32_t)(1<<4))
#define | CAN_IER_EPIE ((uint32_t)(1<<5))
#define | CAN_IER_ALIE ((uint32_t)(1<<6))
#define | CAN_IER_BEIE ((uint32_t)(1<<7))
#define | CAN_IER_IDIE ((uint32_t)(1<<8))
#define | CAN_IER_TIE2 ((uint32_t)(1<<9))
#define | CAN_IER_TIE3 ((uint32_t)(1<<10))
#define | CAN_BTR_BRP(n) ((uint32_t)(n&0x3FF))
#define | CAN_BTR_SJM(n) ((uint32_t)((n&0x3)<<14))
#define | CAN_BTR_TESG1(n) ((uint32_t)(n&0xF)<<16))
#define | CAN_BTR_TESG2(n) ((uint32_t)(n&0xF)<<20))
#define | CAN_BTR_SAM(n) ((uint32_t)(1<<23))
#define | CAN_EWL_EWL(n) ((uint32_t)(n&0xFF))
#define | CAN_SR_RBS ((uint32_t)(1))
#define | CAN_SR_DOS ((uint32_t)(1<<1))
#define | CAN_SR_TBS1 ((uint32_t)(1<<2))
#define | CAN_SR_TCS1 ((uint32_t)(1<<3))
#define | CAN_SR_RS ((uint32_t)(1<<4))
#define | CAN_SR_TS1 ((uint32_t)(1<<5))
#define | CAN_SR_ES ((uint32_t)(1<<6))
#define | CAN_SR_BS ((uint32_t)(1<<7))
#define | CAN_SR_TBS2 ((uint32_t)(1<<10))
#define | CAN_SR_TCS2 ((uint32_t)(1<<11))
#define | CAN_SR_TS2 ((uint32_t)(1<<13))
#define | CAN_SR_TBS3 ((uint32_t)(1<<18))
#define | CAN_SR_TCS3 ((uint32_t)(1<<19))
#define | CAN_SR_TS3 ((uint32_t)(1<<21))
#define | CAN_RFS_ID_INDEX(n) ((uint32_t)(n&0x3FF))
#define | CAN_RFS_BP ((uint32_t)(1<<10))
#define | CAN_RFS_DLC(n) ((uint32_t)((n&0xF)<<16)
#define | CAN_RFS_RTR ((uint32_t)(1<<30))
#define | CAN_RFS_FF ((uint32_t)(1<<31))
#define | CAN_RID_ID_11(n) ((uint32_t)(n&0x7FF))
#define | CAN_RID_ID_29(n) ((uint32_t)(n&0x1FFFFFFF))
#define | CAN_RDA_DATA1(n) ((uint32_t)(n&0xFF))
#define | CAN_RDA_DATA2(n) ((uint32_t)((n&0xFF)<<8))
#define | CAN_RDA_DATA3(n) ((uint32_t)((n&0xFF)<<16))
#define | CAN_RDA_DATA4(n) ((uint32_t)((n&0xFF)<<24))
#define | CAN_RDB_DATA5(n) ((uint32_t)(n&0xFF))
#define | CAN_RDB_DATA6(n) ((uint32_t)((n&0xFF)<<8))
#define | CAN_RDB_DATA7(n) ((uint32_t)((n&0xFF)<<16))
#define | CAN_RDB_DATA8(n) ((uint32_t)((n&0xFF)<<24))
#define | CAN_TFI_PRIO(n) ((uint32_t)(n&0xFF))
#define | CAN_TFI_DLC(n) ((uint32_t)((n&0xF)<<16))
#define | CAN_TFI_RTR ((uint32_t)(1<<30))
#define | CAN_TFI_FF ((uint32_t)(1<<31))
#define | CAN_TID_ID11(n) ((uint32_t)(n&0x7FF))
#define | CAN_TID_ID29(n) ((uint32_t)(n&0x1FFFFFFF))
#define | CAN_TDA_DATA1(n) ((uint32_t)(n&0xFF))
#define | CAN_TDA_DATA2(n) ((uint32_t)((n&0xFF)<<8))
#define | CAN_TDA_DATA3(n) ((uint32_t)((n&0xFF)<<16))
#define | CAN_TDA_DATA4(n) ((uint32_t)((n&0xFF)<<24))
#define | CAN_TDA_DATA5(n) ((uint32_t)(n&0xFF))
#define | CAN_TDA_DATA6(n) ((uint32_t)((n&0xFF)<<8))
#define | CAN_TDA_DATA7(n) ((uint32_t)((n&0xFF)<<16))
#define | CAN_TDA_DATA8(n) ((uint32_t)((n&0xFF)<<24))
#define | CAN1SLEEPCLR ((uint32_t)(1<<1))
#define | CAN2SLEEPCLR ((uint32_t)(1<<2))
#define | CAN_WAKEFLAGES_CAN1WAKE ((uint32_t)(1<<1))
#define | CAN_WAKEFLAGES_CAN2WAKE ((uint32_t)(1<<2))
#define | CAN_TSR_TS1 ((uint32_t)(1))
#define | CAN_TSR_TS2 ((uint32_t)(1<<1))
#define | CAN_TSR_TBS1 ((uint32_t)(1<<8))
#define | CAN_TSR_TBS2 ((uint32_t)(1<<9))
#define | CAN_TSR_TCS1 ((uint32_t)(1<<16))
#define | CAN_TSR_TCS2 ((uint32_t)(1<<17))
#define | CAN_RSR_RS1 ((uint32_t)(1))
#define | CAN_RSR_RS2 ((uint32_t)(1<<1))
#define | CAN_RSR_RB1 ((uint32_t)(1<<8))
#define | CAN_RSR_RB2 ((uint32_t)(1<<9))
#define | CAN_RSR_DOS1 ((uint32_t)(1<<16))
#define | CAN_RSR_DOS2 ((uint32_t)(1<<17))
#define | CAN_MSR_E1 ((uint32_t)(1))
#define | CAN_MSR_E2 ((uint32_t)(1<<1))
#define | CAN_MSR_BS1 ((uint32_t)(1<<8))
#define | CAN_MSR_BS2 ((uint32_t)(1<<9))
#define | CAN_AFMR_AccOff ((uint32_t)(1))
#define | CAN_AFMR_AccBP ((uint32_t)(1<<1))
#define | CAN_AFMR_eFCAN ((uint32_t)(1<<2))
#define | CAN_STT_sa(n) ((uint32_t)((n&1FF)<<2))
#define | CAN_SFF_GRP_sa(n) ((uint32_t)((n&3FF)<<2))
#define | CAN_EFF_sa(n) ((uint32_t)((n&1FF)<<2))
#define | CAN_Eff_GRP_sa(n) ((uint32_t)((n&3FF)<<2))
#define | CAN_EndofTable(n) ((uint32_t)((n&3FF)<<2))
#define | CAN_LUTerrAd(n) ((uint32_t)((n&1FF)<<2))
#define | CAN_LUTerr ((uint32_t)(1))
#define | CAN_FCANIE ((uint32_t)(1))
#define | CAN_FCANIC0_IntPnd(n) ((uint32_t)(1<<n))
#define | CAN_FCANIC1_IntPnd(n) ((uint32_t)(1<<(n-32)))
#define | PARAM_CANx(x)
#define | PARAM_CANAFx(x) (((uint32_t*)x)== ((uint32_t*)LPC_CANAF))
#define | PARAM_CANAFRAMx(x) (((uint32_t*)x)== (uint32_t*)LPC_CANAF_RAM)
#define | PARAM_CANCRx(x) (((uint32_t*)x)==((uint32_t*)LPC_CANCR))
#define | PARAM_I2S_DATA(data) ((data>=0)&&(data <= 0xFFFFFFFF))
#define | PRAM_I2S_FREQ(freq) ((freq>=16000)&&(freq <= 96000))
#define | PARAM_ID_11(n) ((n>>11)==0)
#define | PARAM_ID_29(n) ((n>>29)==0)
#define | PARAM_DLC(n) ((n>>4)==0)
#define | PARAM_ID_FORMAT(n) ((n==STD_ID_FORMAT)||(n==EXT_ID_FORMAT))
#define | PARAM_GRP_ID(x, y) ((x<=y))
#define | PARAM_FRAME_TYPE(n) ((n==DATA_FRAME)||(n==REMOTE_FRAME))
#define | PARAM_CTRL_STS_TYPE(n)
#define | PARAM_CR_STS_TYPE(n)
#define | PARAM_AFMODE_TYPE(n)
#define | PARAM_MODE_TYPE(n)
#define | PARAM_CTRL(n) ((n==CAN1_CTRL)|(n==CAN2_CTRL))
#define | PARAM_MSG_DISABLE(n) ((n==MSG_ENABLE)|(n==MSG_DISABLE))
#define | PARAM_INT_EN_TYPE(n)
#define | PARAM_AFLUT_ENTRY_TYPE(n)
#define | PARAM_POSITION(n) (n<512)

Enumerations

enum | CAN_ID_FORMAT_Type { STD_ID_FORMAT = 0, EXT_ID_FORMAT = 1 }
CAN ID format definition. More...
enum AFLUT_ENTRY_Type {
FULLCAN_ENTRY = 0, EXPLICIT_STANDARD_ENTRY, GROUP_STANDARD_ENTRY, EXPLICIT_EXTEND_ENTRY,
GROUP_EXTEND_ENTRY
}
AFLUT Entry type definition. More...
enum | CAN_FRAME_Type { DATA_FRAME = 0, REMOTE_FRAME = 1 }
Symbolic names for type of CAN message. More...
enum | CAN_CTRL_STS_Type { CANCTRL_GLOBAL_STS = 0, CANCTRL_INT_CAP, CANCTRL_ERR_WRN, CANCTRL_STS }
CAN Control status definition. More...
enum | CAN_CR_STS_Type { CANCR_TX_STS = 0, CANCR_RX_STS, CANCR_MS }
Central CAN status type definition. More...
enum | FullCAN_IC_Type { FULLCAN_IC0, FULLCAN_IC1 }
FullCAN Interrupt Capture type definition. More...
enum CAN_INT_EN_Type {
CANINT_RIE = 0, CANINT_TIE1, CANINT_EIE, CANINT_DOIE,
CANINT_WUIE, CANINT_EPIE, CANINT_ALIE, CANINT_BEIE,
CANINT_IDIE, CANINT_TIE2, CANINT_TIE3, CANINT_FCE
}
CAN interrupt enable type definition. More...
enum | CAN_AFMODE_Type { CAN_Normal = 0, CAN_AccOff, CAN_AccBP, CAN_eFCAN }
Acceptance Filter Mode type definition. More...
enum CAN_MODE_Type {
CAN_OPERATING_MODE = 0, CAN_RESET_MODE, CAN_LISTENONLY_MODE, CAN_SELFTEST_MODE,
CAN_TXPRIORITY_MODE, CAN_SLEEP_MODE, CAN_RXPOLARITY_MODE, CAN_TEST_MODE
}
CAN Mode Type definition. More...
enum CAN_ERROR {
CAN_OK = 1, CAN_OBJECTS_FULL_ERROR, CAN_FULL_OBJ_NOT_RCV, CAN_NO_RECEIVE_DATA,
CAN_AF_ENTRY_ERROR, CAN_CONFLICT_ID_ERROR, CAN_ENTRY_NOT_EXIT_ERROR
}
Error values that functions can return. More...

Functions

void | CAN_Init (LPC_CAN_TypeDef *CANx, uint32_t baudrate)
Initialize CAN peripheral with given baudrate.
void | CAN_DeInit (LPC_CAN_TypeDef *CANx)
CAN deInit.
Status | CAN_SendMsg (LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg)
Send message data.
Status | CAN_ReceiveMsg (LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg)
Receive message data.
CAN_ERROR | FCAN_ReadObj (LPC_CANAF_TypeDef *CANAFx, CAN_MSG_Type *CAN_Msg)
Receive FullCAN Object.
void | CAN_ModeConfig (LPC_CAN_TypeDef *CANx, CAN_MODE_Type mode, FunctionalState NewState)
Enable/Disable CAN Mode.
void | CAN_SetAFMode (LPC_CANAF_TypeDef *CANAFx, CAN_AFMODE_Type AFMode)
Setting Acceptance Filter mode.
void | CAN_SetCommand (LPC_CAN_TypeDef *CANx, uint32_t CMRType)
Set CAN command request.
CAN_ERROR | CAN_SetupAFLUT (LPC_CANAF_TypeDef *CANAFx, AF_SectionDef *AFSection)
Setup Acceptance Filter Look-Up Table.
CAN_ERROR | CAN_LoadFullCANEntry (LPC_CAN_TypeDef *CANx, uint16_t id)
Load FullCAN entry into AFLUT.
CAN_ERROR | CAN_LoadExplicitEntry (LPC_CAN_TypeDef *CANx, uint32_t id, CAN_ID_FORMAT_Type format)
Add Explicit ID into AF Look-Up Table dynamically.
CAN_ERROR | CAN_LoadGroupEntry (LPC_CAN_TypeDef *CANx, uint32_t lowerID, uint32_t upperID, CAN_ID_FORMAT_Type format)
Load Group entry into AFLUT.
CAN_ERROR | CAN_RemoveEntry (AFLUT_ENTRY_Type EntryType, uint16_t position)
Remove AFLUT entry (FullCAN entry and Explicit Standard entry)
void | CAN_IRQCmd (LPC_CAN_TypeDef *CANx, CAN_INT_EN_Type arg, FunctionalState NewState)
Enable/Disable CAN Interrupt.
uint32_t | CAN_IntGetStatus (LPC_CAN_TypeDef *CANx)
Get CAN interrupt status.
IntStatus | CAN_FullCANIntGetStatus (LPC_CANAF_TypeDef *CANAFx)
Check if FullCAN interrupt enable or not.
uint32_t | CAN_FullCANPendGetStatus (LPC_CANAF_TypeDef *CANAFx, FullCAN_IC_Type type)
Get value of FullCAN interrupt and capture register.
uint32_t | CAN_GetCTRLStatus (LPC_CAN_TypeDef *CANx, CAN_CTRL_STS_Type arg)
Get CAN Control Status.
uint32_t | CAN_GetCRStatus (LPC_CANCR_TypeDef *CANCRx, CAN_CR_STS_Type arg)
Get CAN Central Status.

Detailed Description

Contains all macro definitions and function prototypes support for CAN firmware library on LPC17xx.

Version:
3.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_can.h.

Generated on Mon Nov 28 2011 11:15:02 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_clkpwr.h File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_clkpwr.h File Reference

Contains all macro definitions and function prototypes support for Clock and Power Control firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | CLKPWR_PCLKSEL_WDT ((uint32_t)(0))
#define | CLKPWR_PCLKSEL_TIMER0 ((uint32_t)(2))
#define | CLKPWR_PCLKSEL_TIMER1 ((uint32_t)(4))
#define | CLKPWR_PCLKSEL_UART0 ((uint32_t)(6))
#define | CLKPWR_PCLKSEL_UART1 ((uint32_t)(8))
#define | CLKPWR_PCLKSEL_PWM1 ((uint32_t)(12))
#define | CLKPWR_PCLKSEL_I2C0 ((uint32_t)(14))
#define | CLKPWR_PCLKSEL_SPI ((uint32_t)(16))
#define | CLKPWR_PCLKSEL_SSP1 ((uint32_t)(20))
#define | CLKPWR_PCLKSEL_DAC ((uint32_t)(22))
#define | CLKPWR_PCLKSEL_ADC ((uint32_t)(24))
#define | CLKPWR_PCLKSEL_CAN1 ((uint32_t)(26))
#define | CLKPWR_PCLKSEL_CAN2 ((uint32_t)(28))
#define | CLKPWR_PCLKSEL_ACF ((uint32_t)(30))
#define | CLKPWR_PCLKSEL_QEI ((uint32_t)(32))
#define | CLKPWR_PCLKSEL_PCB ((uint32_t)(36))
#define | CLKPWR_PCLKSEL_I2C1 ((uint32_t)(38))
#define | CLKPWR_PCLKSEL_SSP0 ((uint32_t)(42))
#define | CLKPWR_PCLKSEL_TIMER2 ((uint32_t)(44))
#define | CLKPWR_PCLKSEL_TIMER3 ((uint32_t)(46))
#define | CLKPWR_PCLKSEL_UART2 ((uint32_t)(48))
#define | CLKPWR_PCLKSEL_UART3 ((uint32_t)(50))
#define | CLKPWR_PCLKSEL_I2C2 ((uint32_t)(52))
#define | CLKPWR_PCLKSEL_I2S ((uint32_t)(54))
#define | CLKPWR_PCLKSEL_RIT ((uint32_t)(58))
#define | CLKPWR_PCLKSEL_SYSCON ((uint32_t)(60))
#define | CLKPWR_PCLKSEL_MC ((uint32_t)(62))
#define | CLKPWR_PCLKSEL_CCLK_DIV_4 ((uint32_t)(0))
#define | CLKPWR_PCLKSEL_CCLK_DIV_1 ((uint32_t)(1))
#define | CLKPWR_PCLKSEL_CCLK_DIV_2 ((uint32_t)(2))
#define | CLKPWR_PCONP_PCTIM0 ((uint32_t)(1<<1))
#define | CLKPWR_PCONP_PCTIM1 ((uint32_t)(1<<2))
#define | CLKPWR_PCONP_PCUART0 ((uint32_t)(1<<3))
#define | CLKPWR_PCONP_PCUART1 ((uint32_t)(1<<4))
#define | CLKPWR_PCONP_PCPWM1 ((uint32_t)(1<<6))
#define | CLKPWR_PCONP_PCI2C0 ((uint32_t)(1<<7))
#define | CLKPWR_PCONP_PCSPI ((uint32_t)(1<<8))
#define | CLKPWR_PCONP_PCRTC ((uint32_t)(1<<9))
#define | CLKPWR_PCONP_PCSSP1 ((uint32_t)(1<<10))
#define | CLKPWR_PCONP_PCAD ((uint32_t)(1<<12))
#define | CLKPWR_PCONP_PCAN1 ((uint32_t)(1<<13))
#define | CLKPWR_PCONP_PCAN2 ((uint32_t)(1<<14))
#define | CLKPWR_PCONP_PCGPIO ((uint32_t)(1<<15))
#define | CLKPWR_PCONP_PCRIT ((uint32_t)(1<<16))
#define | CLKPWR_PCONP_PCMC ((uint32_t)(1<<17))
#define | CLKPWR_PCONP_PCQEI ((uint32_t)(1<<18))
#define | CLKPWR_PCONP_PCI2C1 ((uint32_t)(1<<19))
#define | CLKPWR_PCONP_PCSSP0 ((uint32_t)(1<<21))
#define | CLKPWR_PCONP_PCTIM2 ((uint32_t)(1<<22))
#define | CLKPWR_PCONP_PCTIM3 ((uint32_t)(1<<23))
#define | CLKPWR_PCONP_PCUART2 ((uint32_t)(1<<24))
#define | CLKPWR_PCONP_PCUART3 ((uint32_t)(1<<25))
#define | CLKPWR_PCONP_PCI2C2 ((uint32_t)(1<<26))
#define | CLKPWR_PCONP_PCI2S ((uint32_t)(1<<27))
#define | CLKPWR_PCONP_PCGPDMA ((uint32_t)(1<<29))
#define | CLKPWR_PCONP_PCENET ((uint32_t)(1<<30))
#define | CLKPWR_PCONP_PCUSB ((uint32_t)(1<<31))
#define | CLKPWR_CLKSRCSEL_CLKSRC_IRC ((uint32_t)(0x00))
#define | CLKPWR_CLKSRCSEL_CLKSRC_MAINOSC ((uint32_t)(0x01))
#define | CLKPWR_CLKSRCSEL_CLKSRC_RTC ((uint32_t)(0x02))
#define | CLKPWR_CLKSRCSEL_BITMASK ((uint32_t)(0x03))
#define | CLKPWR_CLKOUTCFG_CLKOUTSEL_CPU ((uint32_t)(0x00))
#define | CLKPWR_CLKOUTCFG_CLKOUTSEL_MAINOSC ((uint32_t)(0x01))
#define | CLKPWR_CLKOUTCFG_CLKOUTSEL_RC ((uint32_t)(0x02))
#define | CLKPWR_CLKOUTCFG_CLKOUTSEL_USB ((uint32_t)(0x03))
#define | CLKPWR_CLKOUTCFG_CLKOUTSEL_RTC ((uint32_t)(0x04))
#define | CLKPWR_CLKOUTCFG_CLKOUTDIV(n) ((uint32_t)((n&0x0F)<<4))
#define | CLKPWR_CLKOUTCFG_CLKOUT_EN ((uint32_t)(1<<8))
#define | CLKPWR_CLKOUTCFG_CLKOUT_ACT ((uint32_t)(1<<9))
#define | CLKPWR_CLKOUTCFG_BITMASK ((uint32_t)(0x3FF))
#define | CLKPWR_PLL0CON_ENABLE ((uint32_t)(0x01))
#define | CLKPWR_PLL0CON_CONNECT ((uint32_t)(0x02))
#define | CLKPWR_PLL0CON_BITMASK ((uint32_t)(0x03))
#define | CLKPWR_PLL0CFG_MSEL(n) ((uint32_t)(n&0x7FFF))
#define | CLKPWR_PLL0CFG_NSEL(n) ((uint32_t)((n<<16)&0xFF0000))
#define | CLKPWR_PLL0CFG_BITMASK ((uint32_t)(0xFF7FFF))
#define | CLKPWR_PLL0STAT_MSEL(n) ((uint32_t)(n&0x7FFF))
#define | CLKPWR_PLL0STAT_NSEL(n) ((uint32_t)((n>>16)&0xFF))
#define | CLKPWR_PLL0STAT_PLLE ((uint32_t)(1<<24))
#define | CLKPWR_PLL0STAT_PLLC ((uint32_t)(1<<25))
#define | CLKPWR_PLL0STAT_PLOCK ((uint32_t)(1<<26))
#define | CLKPWR_PLL0FEED_BITMASK ((uint32_t)0xFF)
#define | CLKPWR_PLL1CON_ENABLE ((uint32_t)(0x01))
#define | CLKPWR_PLL1CON_CONNECT ((uint32_t)(0x02))
#define | CLKPWR_PLL1CON_BITMASK ((uint32_t)(0x03))
#define | CLKPWR_PLL1CFG_MSEL(n) ((uint32_t)(n&0x1F))
#define | CLKPWR_PLL1CFG_PSEL(n) ((uint32_t)((n&0x03)<<5))
#define | CLKPWR_PLL1CFG_BITMASK ((uint32_t)(0x7F))
#define | CLKPWR_PLL1STAT_MSEL(n) ((uint32_t)(n&0x1F))
#define | CLKPWR_PLL1STAT_PSEL(n) ((uint32_t)((n>>5)&0x03))
#define | CLKPWR_PLL1STAT_PLLE ((uint32_t)(1<<8))
#define | CLKPWR_PLL1STAT_PLLC ((uint32_t)(1<<9))
#define | CLKPWR_PLL1STAT_PLOCK ((uint32_t)(1<<10))
#define | CLKPWR_PLL1FEED_BITMASK ((uint32_t)0xFF)
#define | CLKPWR_CCLKCFG_BITMASK ((uint32_t)(0xFF))
#define | CLKPWR_USBCLKCFG_BITMASK ((uint32_t)(0x0F))
#define | CLKPWR_IRCTRIM_BITMASK ((uint32_t)(0x0F))
#define | CLKPWR_PCLKSEL0_BITMASK ((uint32_t)(0xFFF3F3FF))
#define | CLKPWR_PCLKSEL1_BITMASK ((uint32_t)(0xFCF3F0F3))
#define | CLKPWR_PCLKSEL_SET(p, n) _SBF(p,n)
#define | CLKPWR_PCLKSEL_BITMASK(p) _SBF(p,0x03)
#define | CLKPWR_PCLKSEL_GET(p, n) ((uint32_t)((n>>p)&0x03))
#define | CLKPWR_PCON_PM0 ((uint32_t)(1<<0))
#define | CLKPWR_PCON_PM1 ((uint32_t)(1<<1))
#define | CLKPWR_PCON_BODPDM ((uint32_t)(1<<2))
#define | CLKPWR_PCON_BOGD ((uint32_t)(1<<3))
#define | CLKPWR_PCON_BORD ((uint32_t)(1<<4))
#define | CLKPWR_PCON_SMFLAG ((uint32_t)(1<<8))
#define | CLKPWR_PCON_DSFLAG ((uint32_t)(1<<9))
#define | CLKPWR_PCON_PDFLAG ((uint32_t)(1<<10))
#define | CLKPWR_PCON_DPDFLAG ((uint32_t)(1<<11))
#define | CLKPWR_PCONP_BITMASK 0xEFEFF7DE

Functions

void | CLKPWR_SetPCLKDiv (uint32_t ClkType, uint32_t DivVal)
Set value of each Peripheral Clock Selection.
uint32_t | CLKPWR_GetPCLKSEL (uint32_t ClkType)
Get current value of each Peripheral Clock Selection.
uint32_t | CLKPWR_GetPCLK (uint32_t ClkType)
Get current value of each Peripheral Clock.
void | CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState)
Configure power supply for each peripheral according to NewState.
void | CLKPWR_Sleep (void)
Enter Sleep mode with co-operated instruction by the Cortex-M3.
void | CLKPWR_DeepSleep (void)
Enter Deep Sleep mode with co-operated instruction by the Cortex-M3.
void | CLKPWR_PowerDown (void)
Enter Power Down mode with co-operated instruction by the Cortex-M3.
void | CLKPWR_DeepPowerDown (void)
Enter Deep Power Down mode with co-operated instruction by the Cortex-M3.

Detailed Description

Contains all macro definitions and function prototypes support for Clock and Power Control firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_clkpwr.h.

Generated on Mon Nov 28 2011 11:15:03 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_dac.h File Reference

Data Structures | Defines | Enumerations | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_dac.h File Reference

Contains all macro definitions and function prototypes support for Clock and Power Control firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | DAC_CONVERTER_CFG_Type
Configuration for DAC converter control register. More...

Defines

#define | DAC_VALUE(n) ((uint32_t)((n&0x3FF)<<6))
#define | DAC_BIAS_EN ((uint32_t)(1<<16))
#define | DAC_CCNT_VALUE(n) ((uint32_t)(n&0xffff))
#define | DAC_DBLBUF_ENA ((uint32_t)(1<<1))
#define | DAC_CNT_ENA ((uint32_t)(1<<2))
#define | DAC_DMA_ENA ((uint32_t)(1<<3))
#define | DAC_DACCTRL_MASK ((uint32_t)(0x0F))
#define | PARAM_DACx(n) (((uint32_t *)n)==((uint32_t *)LPC_DAC))
#define | PARAM_DAC_CURRENT_OPT(OPTION)

Enumerations

enum | DAC_CURRENT_OPT { DAC_MAX_CURRENT_700uA = 0, DAC_MAX_CURRENT_350uA }
Current option in DAC configuration option. More...

Functions

void | DAC_Init (LPC_DAC_TypeDef *DACx)
Initial ADC configuration.
void | DAC_UpdateValue (LPC_DAC_TypeDef *DACx, uint32_t dac_value)
Update value to DAC.
void | DAC_SetBias (LPC_DAC_TypeDef *DACx, uint32_t bias)
Set Maximum current for DAC.
void | DAC_ConfigDAConverterControl (LPC_DAC_TypeDef *DACx, DAC_CONVERTER_CFG_Type *DAC_ConverterConfigStruct)
To enable the DMA operation and control DMA timer.
void | DAC_SetDMATimeOut (LPC_DAC_TypeDef *DACx, uint32_t time_out)
Set reload value for interrupt/DMA counter.

Detailed Description

Contains all macro definitions and function prototypes support for Clock and Power Control firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_dac.h.

Generated on Mon Nov 28 2011 11:15:03 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h File Reference

Data Structures | Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h File Reference

Contains all macro definitions and function prototypes support for Ethernet MAC firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | RX_Desc
RX Descriptor structure type definition. More...
struct | RX_Stat
RX Status structure type definition. More...
struct | TX_Desc
TX Descriptor structure type definition. More...
struct | TX_Stat
TX Status structure type definition. More...
struct | EMAC_PACKETBUF_Type
TX Data Buffer structure definition. More...
struct | EMAC_CFG_Type
EMAC configuration structure definition. More...

Defines

#define | MCB_LPC_1768
#define | EMAC_PHY_STAT_LINK (0)
#define | EMAC_PHY_STAT_SPEED (1)
#define | EMAC_PHY_STAT_DUP (2)
#define | EMAC_MODE_AUTO (0)
#define | EMAC_MODE_10M_FULL (1)
#define | EMAC_MODE_10M_HALF (2)
#define | EMAC_MODE_100M_FULL (3)
#define | EMAC_MODE_100M_HALF (4)
#define | EMAC_NUM_RX_FRAG 4
#define | EMAC_NUM_TX_FRAG 3
#define | EMAC_ETH_MAX_FLEN 1536
#define | EMAC_TX_FRAME_TOUT 0x00100000
#define | EMAC_MAC1_REC_EN 0x00000001
#define | EMAC_MAC1_PASS_ALL 0x00000002
#define | EMAC_MAC1_RX_FLOWC 0x00000004
#define | EMAC_MAC1_TX_FLOWC 0x00000008
#define | EMAC_MAC1_LOOPB 0x00000010
#define | EMAC_MAC1_RES_TX 0x00000100
#define | EMAC_MAC1_RES_MCS_TX 0x00000200
#define | EMAC_MAC1_RES_RX 0x00000400
#define | EMAC_MAC1_RES_MCS_RX 0x00000800
#define | EMAC_MAC1_SIM_RES 0x00004000
#define | EMAC_MAC1_SOFT_RES 0x00008000
#define | EMAC_MAC2_FULL_DUP 0x00000001
#define | EMAC_MAC2_FRM_LEN_CHK 0x00000002
#define | EMAC_MAC2_HUGE_FRM_EN 0x00000004
#define | EMAC_MAC2_DLY_CRC 0x00000008
#define | EMAC_MAC2_CRC_EN 0x00000010
#define | EMAC_MAC2_PAD_EN 0x00000020
#define | EMAC_MAC2_VLAN_PAD_EN 0x00000040
#define | EMAC_MAC2_ADET_PAD_EN 0x00000080
#define | EMAC_MAC2_PPREAM_ENF 0x00000100
#define | EMAC_MAC2_LPREAM_ENF 0x00000200
#define | EMAC_MAC2_NO_BACKOFF 0x00001000
#define | EMAC_MAC2_BACK_PRESSURE 0x00002000
#define | EMAC_MAC2_EXCESS_DEF 0x00004000
#define | EMAC_IPGT_BBIPG(n) (n&0x7F)
#define | EMAC_IPGT_FULL_DUP (EMAC_IPGT_BBIPG(0x15))
#define | EMAC_IPGT_HALF_DUP (EMAC_IPGT_BBIPG(0x12))
#define | EMAC_IPGR_NBBIPG_P2(n) (n&0x7F)
#define | EMAC_IPGR_P2_DEF (EMAC_IPGR_NBBIPG_P2(0x12))
#define | EMAC_IPGR_NBBIPG_P1(n) ((n&0x7F)<<8)
#define | EMAC_IPGR_P1_DEF EMAC_IPGR_NBBIPG_P1(0x0C)
#define | EMAC_CLRT_MAX_RETX(n) (n&0x0F)
#define | EMAC_CLRT_COLL(n) ((n&0x3F)<<8)
#define | EMAC_CLRT_DEF ((EMAC_CLRT_MAX_RETX(0x0F))|(EMAC_CLRT_COLL(0x37)))
#define | EMAC_MAXF_MAXFRMLEN(n) (n&0xFFFF)
#define | EMAC_SUPP_SPEED 0x00000100
#define | EMAC_TEST_SHCUT_PQUANTA 0x00000001
#define | EMAC_TEST_TST_PAUSE 0x00000002
#define | EMAC_TEST_TST_BACKP 0x00000004
#define | EMAC_MCFG_SCAN_INC 0x00000001
#define | EMAC_MCFG_SUPP_PREAM 0x00000002
#define | EMAC_MCFG_CLK_SEL(n) ((n&0x0F)<<2)
#define | EMAC_MCFG_RES_MII 0x00008000
#define | EMAC_MCFG_MII_MAXCLK 2500000UL
#define | EMAC_MCMD_READ 0x00000001
#define | EMAC_MCMD_SCAN 0x00000002
#define | EMAC_MII_WR_TOUT 0x00050000
#define | EMAC_MII_RD_TOUT 0x00050000
#define | EMAC_MADR_REG_ADR(n) (n&0x1F)
#define | EMAC_MADR_PHY_ADR(n) ((n&0x1F)<<8)
#define | EMAC_MWTD_DATA(n) (n&0xFFFF)
#define | EMAC_MRDD_DATA(n) (n&0xFFFF)
#define | EMAC_MIND_BUSY 0x00000001
#define | EMAC_MIND_SCAN 0x00000002
#define | EMAC_MIND_NOT_VAL 0x00000004
#define | EMAC_MIND_MII_LINK_FAIL 0x00000008
#define | EMAC_CR_RX_EN 0x00000001
#define | EMAC_CR_TX_EN 0x00000002
#define | EMAC_CR_REG_RES 0x00000008
#define | EMAC_CR_TX_RES 0x00000010
#define | EMAC_CR_RX_RES 0x00000020
#define | EMAC_CR_PASS_RUNT_FRM 0x00000040
#define | EMAC_CR_PASS_RX_FILT 0x00000080
#define | EMAC_CR_TX_FLOW_CTRL 0x00000100
#define | EMAC_CR_RMII 0x00000200
#define | EMAC_CR_FULL_DUP 0x00000400
#define | EMAC_SR_RX_EN 0x00000001
#define | EMAC_SR_TX_EN 0x00000002
#define | EMAC_TSV0_CRC_ERR 0x00000001
#define | EMAC_TSV0_LEN_CHKERR 0x00000002
#define | EMAC_TSV0_LEN_OUTRNG 0x00000004
#define | EMAC_TSV0_DONE 0x00000008
#define | EMAC_TSV0_MCAST 0x00000010
#define | EMAC_TSV0_BCAST 0x00000020
#define | EMAC_TSV0_PKT_DEFER 0x00000040
#define | EMAC_TSV0_EXC_DEFER 0x00000080
#define | EMAC_TSV0_EXC_COLL 0x00000100
#define | EMAC_TSV0_LATE_COLL 0x00000200
#define | EMAC_TSV0_GIANT 0x00000400
#define | EMAC_TSV0_UNDERRUN 0x00000800
#define | EMAC_TSV0_BYTES 0x0FFFF000
#define | EMAC_TSV0_CTRL_FRAME 0x10000000
#define | EMAC_TSV0_PAUSE 0x20000000
#define | EMAC_TSV0_BACK_PRESS 0x40000000
#define | EMAC_TSV0_VLAN 0x80000000
#define | EMAC_TSV1_BYTE_CNT 0x0000FFFF
#define | EMAC_TSV1_COLL_CNT 0x000F0000
#define | EMAC_RSV_BYTE_CNT 0x0000FFFF
#define | EMAC_RSV_PKT_IGNORED 0x00010000
#define | EMAC_RSV_RXDV_SEEN 0x00020000
#define | EMAC_RSV_CARR_SEEN 0x00040000
#define | EMAC_RSV_REC_CODEV 0x00080000
#define | EMAC_RSV_CRC_ERR 0x00100000
#define | EMAC_RSV_LEN_CHKERR 0x00200000
#define | EMAC_RSV_LEN_OUTRNG 0x00400000
#define | EMAC_RSV_REC_OK 0x00800000
#define | EMAC_RSV_MCAST 0x01000000
#define | EMAC_RSV_BCAST 0x02000000
#define | EMAC_RSV_DRIB_NIBB 0x04000000
#define | EMAC_RSV_CTRL_FRAME 0x08000000
#define | EMAC_RSV_PAUSE 0x10000000
#define | EMAC_RSV_UNSUPP_OPC 0x20000000
#define | EMAC_RSV_VLAN 0x40000000
#define | EMAC_FCC_MIRR_CNT(n) (n&0xFFFF)
#define | EMAC_FCC_PAUSE_TIM(n) ((n&0xFFFF)<<16)
#define | EMAC_FCS_MIRR_CNT(n) (n&0xFFFF)
#define | EMAC_RFC_UCAST_EN 0x00000001
#define | EMAC_RFC_BCAST_EN 0x00000002
#define | EMAC_RFC_MCAST_EN 0x00000004
#define | EMAC_RFC_UCAST_HASH_EN 0x00000008
#define | EMAC_RFC_MCAST_HASH_EN 0x00000010
#define | EMAC_RFC_PERFECT_EN 0x00000020
#define | EMAC_RFC_MAGP_WOL_EN 0x00001000
#define | EMAC_RFC_PFILT_WOL_EN 0x00002000
#define | EMAC_WOL_UCAST 0x00000001
#define | EMAC_WOL_BCAST 0x00000002
#define | EMAC_WOL_MCAST 0x00000004
#define | EMAC_WOL_UCAST_HASH 0x00000008
#define | EMAC_WOL_MCAST_HASH 0x00000010
#define | EMAC_WOL_PERFECT 0x00000020
#define | EMAC_WOL_RX_FILTER 0x00000080
#define | EMAC_WOL_MAG_PACKET 0x00000100
#define | EMAC_WOL_BITMASK 0x01BF
#define | EMAC_INT_RX_OVERRUN 0x00000001
#define | EMAC_INT_RX_ERR 0x00000002
#define | EMAC_INT_RX_FIN 0x00000004
#define | EMAC_INT_RX_DONE 0x00000008
#define | EMAC_INT_TX_UNDERRUN 0x00000010
#define | EMAC_INT_TX_ERR 0x00000020
#define | EMAC_INT_TX_FIN 0x00000040
#define | EMAC_INT_TX_DONE 0x00000080
#define | EMAC_INT_SOFT_INT 0x00001000
#define | EMAC_INT_WAKEUP 0x00002000
#define | EMAC_PD_POWER_DOWN 0x80000000
#define | EMAC_RCTRL_SIZE(n) (n&0x7FF)
#define | EMAC_RCTRL_INT 0x80000000
#define | EMAC_RHASH_SA 0x000001FF
#define | EMAC_RHASH_DA 0x001FF000
#define | EMAC_RINFO_SIZE 0x000007FF
#define | EMAC_RINFO_CTRL_FRAME 0x00040000
#define | EMAC_RINFO_VLAN 0x00080000
#define | EMAC_RINFO_FAIL_FILT 0x00100000
#define | EMAC_RINFO_MCAST 0x00200000
#define | EMAC_RINFO_BCAST 0x00400000
#define | EMAC_RINFO_CRC_ERR 0x00800000
#define | EMAC_RINFO_SYM_ERR 0x01000000
#define | EMAC_RINFO_LEN_ERR 0x02000000
#define | EMAC_RINFO_RANGE_ERR 0x04000000
#define | EMAC_RINFO_ALIGN_ERR 0x08000000
#define | EMAC_RINFO_OVERRUN 0x10000000
#define | EMAC_RINFO_NO_DESCR 0x20000000
#define | EMAC_RINFO_LAST_FLAG 0x40000000
#define | EMAC_RINFO_ERR 0x80000000
#define | EMAC_RINFO_ERR_MASK
#define | EMAC_TCTRL_SIZE 0x000007FF
#define | EMAC_TCTRL_OVERRIDE 0x04000000
#define | EMAC_TCTRL_HUGE 0x08000000
#define | EMAC_TCTRL_PAD 0x10000000
#define | EMAC_TCTRL_CRC 0x20000000
#define | EMAC_TCTRL_LAST 0x40000000
#define | EMAC_TCTRL_INT 0x80000000
#define | EMAC_TINFO_COL_CNT 0x01E00000
#define | EMAC_TINFO_DEFER 0x02000000
#define | EMAC_TINFO_EXCESS_DEF 0x04000000
#define | EMAC_TINFO_EXCESS_COL 0x08000000
#define | EMAC_TINFO_LATE_COL 0x10000000
#define | EMAC_TINFO_UNDERRUN 0x20000000
#define | EMAC_TINFO_NO_DESCR 0x40000000
#define | EMAC_TINFO_ERR 0x80000000
#define | EMAC_PHY_RESP_TOUT 0x100000UL
#define | EMAC_OLD_EMAC_MODULE_ID 0x39022000
#define | EMAC_PHY_REG_BMCR 0x00
#define | EMAC_PHY_REG_BMSR 0x01
#define | EMAC_PHY_REG_IDR1 0x02
#define | EMAC_PHY_REG_IDR2 0x03
#define | EMAC_PHY_REG_ANAR 0x04
#define | EMAC_PHY_REG_ANLPAR 0x05
#define | EMAC_PHY_REG_ANER 0x06
#define | EMAC_PHY_REG_ANNPTR 0x07
#define | EMAC_PHY_REG_LPNPA 0x08
#define | EMAC_PHY_REG_STS 0x10
#define | EMAC_PHY_REG_MICR 0x11
#define | EMAC_PHY_REG_MISR 0x12
#define | EMAC_PHY_REG_FCSCR 0x14
#define | EMAC_PHY_REG_RECR 0x15
#define | EMAC_PHY_REG_PCSR 0x16
#define | EMAC_PHY_REG_RBR 0x17
#define | EMAC_PHY_REG_LEDCR 0x18
#define | EMAC_PHY_REG_PHYCR 0x19
#define | EMAC_PHY_REG_10BTSCR 0x1A
#define | EMAC_PHY_REG_CDCTRL1 0x1B
#define | EMAC_PHY_REG_EDCR 0x1D
#define | EMAC_PHY_BMCR_RESET (1<<15)
#define | EMAC_PHY_BMCR_LOOPBACK (1<<14)
#define | EMAC_PHY_BMCR_SPEED_SEL (1<<13)
#define | EMAC_PHY_BMCR_AN (1<<12)
#define | EMAC_PHY_BMCR_POWERDOWN (1<<11)
#define | EMAC_PHY_BMCR_ISOLATE (1<<10)
#define | EMAC_PHY_BMCR_RE_AN (1<<9)
#define | EMAC_PHY_BMCR_DUPLEX (1<<8)
#define | EMAC_PHY_BMSR_100BE_T4 (1<<15)
#define | EMAC_PHY_BMSR_100TX_FULL (1<<14)
#define | EMAC_PHY_BMSR_100TX_HALF (1<<13)
#define | EMAC_PHY_BMSR_10BE_FULL (1<<12)
#define | EMAC_PHY_BMSR_10BE_HALF (1<<11)
#define | EMAC_PHY_BMSR_NOPREAM (1<<6)
#define | EMAC_PHY_BMSR_AUTO_DONE (1<<5)
#define | EMAC_PHY_BMSR_REMOTE_FAULT (1<<4)
#define | EMAC_PHY_BMSR_NO_AUTO (1<<3)
#define | EMAC_PHY_BMSR_LINK_ESTABLISHED (1<<2)
#define | EMAC_PHY_SR_REMOTE_FAULT (1<<6)
#define | EMAC_PHY_SR_JABBER (1<<5)
#define | EMAC_PHY_SR_AUTO_DONE (1<<4)
#define | EMAC_PHY_SR_LOOPBACK (1<<3)
#define | EMAC_PHY_SR_DUP (1<<2)
#define | EMAC_PHY_SR_SPEED (1<<1)
#define | EMAC_PHY_SR_LINK (1<<0)
#define | EMAC_PHY_FULLD_100M 0x2100
#define | EMAC_PHY_HALFD_100M 0x2000
#define | EMAC_PHY_FULLD_10M 0x0100
#define | EMAC_PHY_HALFD_10M 0x0000
#define | EMAC_PHY_AUTO_NEG 0x3000
#define | EMAC_DEF_ADR 0x0100
#define | EMAC_DP83848C_ID 0x20005C90
#define | EMAC_PHY_SR_100_SPEED ((1<<14)|(1<<13))
#define | EMAC_PHY_SR_FULL_DUP ((1<<14)|(1<<12))
#define | EMAC_PHY_BMSR_LINK_STATUS (1<<2)

Functions

Status | EMAC_Init (EMAC_CFG_Type *EMAC_ConfigStruct)
Initializes the EMAC peripheral according to the specified parameters in the EMAC_ConfigStruct.
void | EMAC_DeInit (void)
De-initializes the EMAC peripheral registers to their default reset values.
int32_t | EMAC_CheckPHYStatus (uint32_t ulPHYState)
Check specified PHY status in EMAC peripheral.
int32_t | EMAC_SetPHYMode (uint32_t ulPHYMode)
Set specified PHY mode in EMAC peripheral.
int32_t | EMAC_UpdatePHYStatus (void)
Auto-Configures value for the EMAC configuration register to match with current PHY mode.
void | EMAC_SetHashFilter (uint8_t dstMAC_addr[], FunctionalState NewState)
Enable/Disable hash filter functionality for specified destination MAC address in EMAC module.
void | EMAC_SetFilterMode (uint32_t ulFilterMode, FunctionalState NewState)
Enable/Disable Filter mode for each specified type EMAC peripheral.
void | EMAC_WritePacketBuffer (EMAC_PACKETBUF_Type *pDataStruct)
Write data to Tx packet data buffer at current index due to TxProduceIndex.
void | EMAC_ReadPacketBuffer (EMAC_PACKETBUF_Type *pDataStruct)
Read data from Rx packet data buffer at current index due to RxConsumeIndex.
void | EMAC_IntCmd (uint32_t ulIntType, FunctionalState NewState)
Enable/Disable interrupt for each type in EMAC.
IntStatus | EMAC_IntGetStatus (uint32_t ulIntType)
Check whether if specified interrupt flag is set or not for each interrupt type in EMAC and clear interrupt pending if it is set.
Bool | EMAC_CheckReceiveIndex (void)
Check whether if the current RxConsumeIndex is not equal to the current RxProduceIndex.
Bool | EMAC_CheckTransmitIndex (void)
Check whether if the current TxProduceIndex is not equal to the current RxProduceIndex - 1.
void | EMAC_UpdateRxConsumeIndex (void)
Increase the RxConsumeIndex (after reading the Receive buffer to release the Receive buffer) and wrap-around the index if it reaches the maximum Receive Number.
void | EMAC_UpdateTxProduceIndex (void)
Increase the TxProduceIndex (after writting to the Transmit buffer to enable the Transmit buffer) and wrap-around the index if it reaches the maximum Transmit Number.
FlagStatus | EMAC_CheckReceiveDataStatus (uint32_t ulRxStatType)
Get current status value of receive data (due to RxConsumeIndex)
uint32_t | EMAC_GetReceiveDataSize (void)
Get size of current Received data in received buffer (due to RxConsumeIndex)
FlagStatus | EMAC_GetWoLStatus (uint32_t ulWoLMode)
Get status of Wake On LAN Filter for each specified type in EMAC peripheral, clear this status if it is set.

Detailed Description

Contains all macro definitions and function prototypes support for Ethernet MAC firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_emac.h.

Generated on Mon Nov 28 2011 11:15:03 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_exti.h File Reference

Data Structures | Defines | Enumerations | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_exti.h File Reference

Contains all macro definitions and function prototypes support for External interrupt firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | EXTI_InitTypeDef
EXTI Initialize structure. More...

Defines

#define | EXTI_EINT0_BIT_MARK 0x01
#define | EXTI_EINT1_BIT_MARK 0x02
#define | EXTI_EINT2_BIT_MARK 0x04
#define | EXTI_EINT3_BIT_MARK 0x08

Enumerations

enum | EXTI_LINE_ENUM { EXTI_EINT0, EXTI_EINT1, EXTI_EINT2, EXTI_EINT3 }
EXTI external interrupt line option. More...
enum | EXTI_MODE_ENUM { EXTI_MODE_LEVEL_SENSITIVE, EXTI_MODE_EDGE_SENSITIVE }
EXTI mode option. More...
enum | EXTI_POLARITY_ENUM { EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE, EXTI_POLARITY_HIGH_ACTIVE_OR_RISING_EDGE }
EXTI polarity option. More...

Functions

void | EXTI_Init (void)
Initial for EXT.
void | EXTI_DeInit (void)
Close EXT.
void | EXTI_Config (EXTI_InitTypeDef *EXTICfg)
Configuration for EXT.
void | EXTI_SetMode (EXTI_LINE_ENUM EXTILine, EXTI_MODE_ENUM mode)
Set mode for EXTI pin.
void | EXTI_SetPolarity (EXTI_LINE_ENUM EXTILine, EXTI_POLARITY_ENUM polarity)
Set polarity for EXTI pin.
void | EXTI_ClearEXTIFlag (EXTI_LINE_ENUM EXTILine)
Clear External interrupt flag.

Detailed Description

Contains all macro definitions and function prototypes support for External interrupt firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_exti.h.

Generated on Mon Nov 28 2011 11:15:03 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpdma.h File Reference

Data Structures | Defines | Enumerations | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpdma.h File Reference

Contains all macro definitions and function prototypes support for GPDMA firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | GPDMA_Channel_CFG_Type
GPDMA Channel configuration structure type definition. More...
struct | GPDMA_LLI_Type
GPDMA Linker List Item structure type definition. More...

Defines

#define | GPDMA_CONN_SSP0_Tx ((0UL))
#define | GPDMA_CONN_SSP0_Rx ((1UL))
#define | GPDMA_CONN_SSP1_Tx ((2UL))
#define | GPDMA_CONN_SSP1_Rx ((3UL))
#define | GPDMA_CONN_ADC ((4UL))
#define | GPDMA_CONN_I2S_Channel_0 ((5UL))
#define | GPDMA_CONN_I2S_Channel_1 ((6UL))
#define | GPDMA_CONN_DAC ((7UL))
#define | GPDMA_CONN_UART0_Tx ((8UL))
#define | GPDMA_CONN_UART0_Rx ((9UL))
#define | GPDMA_CONN_UART1_Tx ((10UL))
#define | GPDMA_CONN_UART1_Rx ((11UL))
#define | GPDMA_CONN_UART2_Tx ((12UL))
#define | GPDMA_CONN_UART2_Rx ((13UL))
#define | GPDMA_CONN_UART3_Tx ((14UL))
#define | GPDMA_CONN_UART3_Rx ((15UL))
#define | GPDMA_CONN_MAT0_0 ((16UL))
#define | GPDMA_CONN_MAT0_1 ((17UL))
#define | GPDMA_CONN_MAT1_0 ((18UL))
#define | GPDMA_CONN_MAT1_1 ((19UL))
#define | GPDMA_CONN_MAT2_0 ((20UL))
#define | GPDMA_CONN_MAT2_1 ((21UL))
#define | GPDMA_CONN_MAT3_0 ((22UL))
#define | GPDMA_CONN_MAT3_1 ((23UL))
#define | GPDMA_TRANSFERTYPE_M2M ((0UL))
#define | GPDMA_TRANSFERTYPE_M2P ((1UL))
#define | GPDMA_TRANSFERTYPE_P2M ((2UL))
#define | GPDMA_TRANSFERTYPE_P2P ((3UL))
#define | GPDMA_BSIZE_1 ((0UL))
#define | GPDMA_BSIZE_4 ((1UL))
#define | GPDMA_BSIZE_8 ((2UL))
#define | GPDMA_BSIZE_16 ((3UL))
#define | GPDMA_BSIZE_32 ((4UL))
#define | GPDMA_BSIZE_64 ((5UL))
#define | GPDMA_BSIZE_128 ((6UL))
#define | GPDMA_BSIZE_256 ((7UL))
#define | GPDMA_WIDTH_BYTE ((0UL))
#define | GPDMA_WIDTH_HALFWORD ((1UL))
#define | GPDMA_WIDTH_WORD ((2UL))
#define | GPDMA_REQSEL_UART ((0UL))
#define | GPDMA_REQSEL_TIMER ((1UL))
#define | GPDMA_DMACIntStat_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACIntStat_BITMASK ((0xFF))
#define | GPDMA_DMACIntTCStat_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACIntTCStat_BITMASK ((0xFF))
#define | GPDMA_DMACIntTCClear_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACIntTCClear_BITMASK ((0xFF))
#define | GPDMA_DMACIntErrStat_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACIntErrStat_BITMASK ((0xFF))
#define | GPDMA_DMACIntErrClr_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACIntErrClr_BITMASK ((0xFF))
#define | GPDMA_DMACRawIntTCStat_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACRawIntTCStat_BITMASK ((0xFF))
#define | GPDMA_DMACRawIntErrStat_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACRawIntErrStat_BITMASK ((0xFF))
#define | GPDMA_DMACEnbldChns_Ch(n) (((1UL<<n)&0xFF))
#define | GPDMA_DMACEnbldChns_BITMASK ((0xFF))
#define | GPDMA_DMACSoftBReq_Src(n) (((1UL<<n)&0xFFFF))
#define | GPDMA_DMACSoftBReq_BITMASK ((0xFFFF))
#define | GPDMA_DMACSoftSReq_Src(n) (((1UL<<n)&0xFFFF))
#define | GPDMA_DMACSoftSReq_BITMASK ((0xFFFF))
#define | GPDMA_DMACSoftLBReq_Src(n) (((1UL<<n)&0xFFFF))
#define | GPDMA_DMACSoftLBReq_BITMASK ((0xFFFF))
#define | GPDMA_DMACSoftLSReq_Src(n) (((1UL<<n)&0xFFFF))
#define | GPDMA_DMACSoftLSReq_BITMASK ((0xFFFF))
#define | GPDMA_DMACConfig_E ((0x01))
#define | GPDMA_DMACConfig_M ((0x02))
#define | GPDMA_DMACConfig_BITMASK ((0x03))
#define | GPDMA_DMACSync_Src(n) (((1UL<<n)&0xFFFF))
#define | GPDMA_DMACSync_BITMASK ((0xFFFF))
#define | GPDMA_DMAReqSel_Input(n) (((1UL<<(n-8))&0xFF))
#define | GPDMA_DMAReqSel_BITMASK ((0xFF))
#define | GPDMA_DMACCxLLI_BITMASK ((0xFFFFFFFC))
#define | GPDMA_DMACCxControl_TransferSize(n) (((n&0xFFF)<<0))
#define | GPDMA_DMACCxControl_SBSize(n) (((n&0x07)<<12))
#define | GPDMA_DMACCxControl_DBSize(n) (((n&0x07)<<15))
#define | GPDMA_DMACCxControl_SWidth(n) (((n&0x07)<<18))
#define | GPDMA_DMACCxControl_DWidth(n) (((n&0x07)<<21))
#define | GPDMA_DMACCxControl_SI ((1UL<<26))
#define | GPDMA_DMACCxControl_DI ((1UL<<27))
#define | GPDMA_DMACCxControl_Prot1 ((1UL<<28))
#define | GPDMA_DMACCxControl_Prot2 ((1UL<<29))
#define | GPDMA_DMACCxControl_Prot3 ((1UL<<30))
#define | GPDMA_DMACCxControl_I ((1UL<<31))
#define | GPDMA_DMACCxControl_BITMASK ((0xFCFFFFFF))
#define | GPDMA_DMACCxConfig_E ((1UL<<0))
#define | GPDMA_DMACCxConfig_SrcPeripheral(n) (((n&0x1F)<<1))
#define | GPDMA_DMACCxConfig_DestPeripheral(n) (((n&0x1F)<<6))
#define | GPDMA_DMACCxConfig_TransferType(n) (((n&0x7)<<11))
#define | GPDMA_DMACCxConfig_IE ((1UL<<14))
#define | GPDMA_DMACCxConfig_ITC ((1UL<<15))
#define | GPDMA_DMACCxConfig_L ((1UL<<16))
#define | GPDMA_DMACCxConfig_A ((1UL<<17))
#define | GPDMA_DMACCxConfig_H ((1UL<<18))
#define | GPDMA_DMACCxConfig_BITMASK ((0x7FFFF))
#define | PARAM_GPDMA_CHANNEL(n) (n<=7)
#define | PARAM_GPDMA_CONN(n)
#define | PARAM_GPDMA_BSIZE(n)
#define | PARAM_GPDMA_WIDTH(n)
#define | PARAM_GPDMA_STAT(n)
#define | PARAM_GPDMA_TRANSFERTYPE(n)
#define | PARAM_GPDMA_STATCLR(n) ((n==GPDMA_STATCLR_INTTC) || (n==GPDMA_STATCLR_INTERR))
#define | PARAM_GPDMA_REQSEL(n) ((n==GPDMA_REQSEL_UART) || (n==GPDMA_REQSEL_TIMER))

Enumerations

enum GPDMA_Status_Type {
GPDMA_STAT_INT, GPDMA_STAT_INTTC, GPDMA_STAT_INTERR, GPDMA_STAT_RAWINTTC,
GPDMA_STAT_RAWINTERR, GPDMA_STAT_ENABLED_CH
}
GPDMA Status enumeration. More...
enum | GPDMA_StateClear_Type { GPDMA_STATCLR_INTTC, GPDMA_STATCLR_INTERR }
GPDMA Interrupt clear status enumeration. More...

Functions

void | GPDMA_Init (void)
Initialize GPDMA controller.
Status | GPDMA_Setup (GPDMA_Channel_CFG_Type *GPDMAChannelConfig)
Setup GPDMA channel peripheral according to the specified parameters in the GPDMAChannelConfig.
IntStatus | GPDMA_IntGetStatus (GPDMA_Status_Type type, uint8_t channel)
Check if corresponding channel does have an active interrupt request or not.
void | GPDMA_ClearIntPending (GPDMA_StateClear_Type type, uint8_t channel)
Clear one or more interrupt requests on DMA channels.
void | GPDMA_ChannelCmd (uint8_t channelNum, FunctionalState NewState)
Enable/Disable DMA channel.

Detailed Description

Contains all macro definitions and function prototypes support for GPDMA firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_gpdma.h.

Generated on Mon Nov 28 2011 11:15:03 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpio.h File Reference

Data Structures | Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpio.h File Reference

Contains all macro definitions and function prototypes support for GPDMA firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | GPIO_Byte_TypeDef
Fast GPIO port byte type definition. More...
struct | GPIO_HalfWord_TypeDef
Fast GPIO port half-word type definition. More...

Defines

#define | GPIO0_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO0_BASE))
#define | GPIO1_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO1_BASE))
#define | GPIO2_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO2_BASE))
#define | GPIO3_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO3_BASE))
#define | GPIO4_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO4_BASE))
#define | GPIO0_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO0_BASE))
#define | GPIO1_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO1_BASE))
#define | GPIO2_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO2_BASE))
#define | GPIO3_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO3_BASE))
#define | GPIO4_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO4_BASE))

Functions

void | GPIO_SetDir (uint8_t portNum, uint32_t bitValue, uint8_t dir)
Set Direction for GPIO port.
void | GPIO_SetValue (uint8_t portNum, uint32_t bitValue)
Set Value for bits that have output direction on GPIO port.
void | GPIO_ClearValue (uint8_t portNum, uint32_t bitValue)
Clear Value for bits that have output direction on GPIO port.
uint32_t | GPIO_ReadValue (uint8_t portNum)
Read Current state on port pin that have input direction of GPIO.
void | GPIO_IntCmd (uint8_t portNum, uint32_t bitValue, uint8_t edgeState)
Enable GPIO interrupt (just used for P0.0-P0.30, P2.0-P2.13)
FunctionalState | GPIO_GetIntStatus (uint8_t portNum, uint32_t pinNum, uint8_t edgeState)
Get GPIO Interrupt Status (just used for P0.0-P0.30, P2.0-P2.13)
void | GPIO_ClearInt (uint8_t portNum, uint32_t bitValue)
Clear GPIO interrupt (just used for P0.0-P0.30, P2.0-P2.13)
void | FIO_SetDir (uint8_t portNum, uint32_t bitValue, uint8_t dir)
The same with GPIO_SetDir()
void | FIO_SetValue (uint8_t portNum, uint32_t bitValue)
The same with GPIO_SetValue()
void | FIO_ClearValue (uint8_t portNum, uint32_t bitValue)
The same with GPIO_ClearValue()
uint32_t | FIO_ReadValue (uint8_t portNum)
The same with GPIO_ReadValue()
void | FIO_SetMask (uint8_t portNum, uint32_t bitValue, uint8_t maskValue)
Set mask value for bits in FIO port.
void | FIO_IntCmd (uint8_t portNum, uint32_t bitValue, uint8_t edgeState)
The same with GPIO_IntCmd()
FunctionalState | FIO_GetIntStatus (uint8_t portNum, uint32_t pinNum, uint8_t edgeState)
The same with GPIO_GetIntStatus()
void | FIO_ClearInt (uint8_t portNum, uint32_t bitValue)
The same with GPIO_ClearInt()
void | FIO_HalfWordSetDir (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t dir)
Set direction for FIO port in halfword accessible style.
void | FIO_HalfWordSetMask (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t maskValue)
Set mask value for bits in FIO port in halfword accessible style.
void | FIO_HalfWordSetValue (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue)
Set bits for FIO port in halfword accessible style.
void | FIO_HalfWordClearValue (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue)
Clear bits for FIO port in halfword accessible style.
uint16_t | FIO_HalfWordReadValue (uint8_t portNum, uint8_t halfwordNum)
Read Current state on port pin that have input direction of GPIO in halfword accessible style.
void | FIO_ByteSetDir (uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t dir)
Set direction for FIO port in byte accessible style.
void | FIO_ByteSetMask (uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t maskValue)
Set mask value for bits in FIO port in byte accessible style.
void | FIO_ByteSetValue (uint8_t portNum, uint8_t byteNum, uint8_t bitValue)
Set bits for FIO port in byte accessible style.
void | FIO_ByteClearValue (uint8_t portNum, uint8_t byteNum, uint8_t bitValue)
Clear bits for FIO port in byte accessible style.
uint8_t | FIO_ByteReadValue (uint8_t portNum, uint8_t byteNum)
Read Current state on port pin that have input direction of GPIO in byte accessible style.

Detailed Description

Contains all macro definitions and function prototypes support for GPDMA firmware library on LPC17xx.

Version:
3.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_gpio.h.

Generated on Mon Nov 28 2011 11:15:03 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2c.h File Reference

Data Structures | Defines | Enumerations | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2c.h File Reference

Contains all macro definitions and function prototypes support for I2C firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | I2C_OWNSLAVEADDR_CFG_Type
I2C Own slave address setting structure. More...
struct | I2C_M_SETUP_Type
Master transfer setup data structure definitions. More...
struct | I2C_S_SETUP_Type
Slave transfer setup data structure definitions. More...

Defines

#define | I2C_I2CONSET_AA ((0x04))
#define | I2C_I2CONSET_SI ((0x08))
#define | I2C_I2CONSET_STO ((0x10))
#define | I2C_I2CONSET_STA ((0x20))
#define | I2C_I2CONSET_I2EN ((0x40))
#define | I2C_I2CONCLR_AAC ((1<<2))
#define | I2C_I2CONCLR_SIC ((1<<3))
#define | I2C_I2CONCLR_STAC ((1<<5))
#define | I2C_I2CONCLR_I2ENC ((1<<6))
#define | I2C_STAT_CODE_BITMASK ((0xF8))
#define | I2C_I2STAT_NO_INF ((0xF8))
#define | I2C_I2STAT_M_TX_START ((0x08))
#define | I2C_I2STAT_M_TX_RESTART ((0x10))
#define | I2C_I2STAT_M_TX_SLAW_ACK ((0x18))
#define | I2C_I2STAT_M_TX_SLAW_NACK ((0x20))
#define | I2C_I2STAT_M_TX_DAT_ACK ((0x28))
#define | I2C_I2STAT_M_TX_DAT_NACK ((0x30))
#define | I2C_I2STAT_M_TX_ARB_LOST ((0x38))
#define | I2C_I2STAT_M_RX_START ((0x08))
#define | I2C_I2STAT_M_RX_RESTART ((0x10))
#define | I2C_I2STAT_M_RX_ARB_LOST ((0x38))
#define | I2C_I2STAT_M_RX_SLAR_ACK ((0x40))
#define | I2C_I2STAT_M_RX_SLAR_NACK ((0x48))
#define | I2C_I2STAT_M_RX_DAT_ACK ((0x50))
#define | I2C_I2STAT_M_RX_DAT_NACK ((0x58))
#define | I2C_I2STAT_S_RX_SLAW_ACK ((0x60))
#define | I2C_I2STAT_S_RX_ARB_LOST_M_SLA ((0x68))
#define | I2C_I2STAT_S_RX_GENCALL_ACK ((0x70))
#define | I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL ((0x78))
#define | I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK ((0x80))
#define | I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK ((0x88))
#define | I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK ((0x90))
#define | I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK ((0x98))
#define | I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX ((0xA0))
#define | I2C_I2STAT_S_TX_SLAR_ACK ((0xA8))
#define | I2C_I2STAT_S_TX_ARB_LOST_M_SLA ((0xB0))
#define | I2C_I2STAT_S_TX_DAT_ACK ((0xB8))
#define | I2C_I2STAT_S_TX_DAT_NACK ((0xC0))
#define | I2C_I2STAT_S_TX_LAST_DAT_ACK ((0xC8))
#define | I2C_SLAVE_TIME_OUT 0x10000UL
#define | I2C_I2DAT_BITMASK ((0xFF))
#define | I2C_I2DAT_IDLE_CHAR (0xFF)
#define | I2C_I2MMCTRL_MM_ENA ((1<<0))
#define | I2C_I2MMCTRL_ENA_SCL ((1<<1))
#define | I2C_I2MMCTRL_MATCH_ALL ((1<<2))
#define | I2C_I2MMCTRL_BITMASK ((0x07))
#define | I2DATA_BUFFER_BITMASK ((0xFF))
#define | I2C_I2ADR_GC ((1<<0))
#define | I2C_I2ADR_BITMASK ((0xFF))
#define | I2C_I2MASK_MASK(n) ((n&0xFE))
#define | I2C_I2SCLH_BITMASK ((0xFFFF))
#define | I2C_I2SCLL_BITMASK ((0xFFFF))
#define | I2C_SETUP_STATUS_ARBF (1<<8)
#define | I2C_SETUP_STATUS_NOACKF (1<<9)
#define | I2C_SETUP_STATUS_DONE (1<<10)
#define | I2C_MONITOR_CFG_SCL_OUTPUT I2C_I2MMCTRL_ENA_SCL
#define | I2C_MONITOR_CFG_MATCHALL I2C_I2MMCTRL_MATCH_ALL
#define | PARAM_I2C_SLAVEADDR_CH(n) (n<=3)
#define | PARAM_I2Cx(n)
#define | PARAM_I2C_MONITOR_CFG(n) ((n==I2C_MONITOR_CFG_SCL_OUTPUT) || (I2C_MONITOR_CFG_MATCHALL))

Enumerations

enum | I2C_TRANSFER_OPT_Type { I2C_TRANSFER_POLLING = 0, I2C_TRANSFER_INTERRUPT }
Transfer option type definitions. More...

Functions

void | I2C_Init (LPC_I2C_TypeDef *I2Cx, uint32_t clockrate)
Initializes the I2Cx peripheral with specified parameter.
void | I2C_DeInit (LPC_I2C_TypeDef *I2Cx)
De-initializes the I2C peripheral registers to their default reset values.
void | I2C_Cmd (LPC_I2C_TypeDef *I2Cx, FunctionalState NewState)
Enable or disable I2C peripheral's operation.
Status | I2C_MasterTransferData (LPC_I2C_TypeDef *I2Cx, I2C_M_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt)
Transmit and Receive data in master mode.
Status | I2C_SlaveTransferData (LPC_I2C_TypeDef *I2Cx, I2C_S_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt)
Receive and Transmit data in slave mode.
uint32_t | I2C_MasterTransferComplete (LPC_I2C_TypeDef *I2Cx)
Get status of Master Transfer.
uint32_t | I2C_SlaveTransferComplete (LPC_I2C_TypeDef *I2Cx)
Get status of Slave Transfer.
void | I2C_SetOwnSlaveAddr (LPC_I2C_TypeDef *I2Cx, I2C_OWNSLAVEADDR_CFG_Type *OwnSlaveAddrConfigStruct)
Set Own slave address in I2C peripheral corresponding to parameter specified in OwnSlaveAddrConfigStruct.
uint8_t | I2C_GetLastStatusCode (LPC_I2C_TypeDef *I2Cx)
void | I2C_MonitorModeConfig (LPC_I2C_TypeDef *I2Cx, uint32_t MonitorCfgType, FunctionalState NewState)
Configures functionality in I2C monitor mode.
void | I2C_MonitorModeCmd (LPC_I2C_TypeDef *I2Cx, FunctionalState NewState)
Enable/Disable I2C monitor mode.
uint8_t | I2C_MonitorGetDatabuffer (LPC_I2C_TypeDef *I2Cx)
Get data from I2C data buffer in monitor mode.
BOOL_8 | I2C_MonitorHandler (LPC_I2C_TypeDef *I2Cx, uint8_t *buffer, uint32_t size)
Get data from I2C data buffer in monitor mode.
void | I2C_IntCmd (LPC_I2C_TypeDef *I2Cx, Bool NewState)
Enable/Disable interrupt for I2C peripheral.
void | I2C_MasterHandler (LPC_I2C_TypeDef *I2Cx)
General Master Interrupt handler for I2C peripheral.
void | I2C_SlaveHandler (LPC_I2C_TypeDef *I2Cx)
General Slave Interrupt handler for I2C peripheral.

Detailed Description

Contains all macro definitions and function prototypes support for I2C firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_i2c.h.

Generated on Mon Nov 28 2011 11:15:03 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2s.h File Reference

Data Structures | Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2s.h File Reference

Contains all macro definitions and function prototypes support for I2S firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | I2S_CFG_Type
I2S configuration structure definition. More...
struct | I2S_DMAConf_Type
I2S DMA configuration structure definition. More...
struct | I2S_MODEConf_Type
I2S mode configuration structure definition. More...

Defines

#define | I2S_WORDWIDTH_8 ((uint32_t)(0))
#define | I2S_WORDWIDTH_16 ((uint32_t)(1))
#define | I2S_WORDWIDTH_32 ((uint32_t)(3))
#define | I2S_STEREO ((uint32_t)(0))
#define | I2S_MONO ((uint32_t)(1))
#define | I2S_MASTER_MODE ((uint8_t)(0))
#define | I2S_SLAVE_MODE ((uint8_t)(1))
#define | I2S_STOP_ENABLE ((uint8_t)(1))
#define | I2S_STOP_DISABLE ((uint8_t)(0))
#define | I2S_RESET_ENABLE ((uint8_t)(1))
#define | I2S_RESET_DISABLE ((uint8_t)(0))
#define | I2S_MUTE_ENABLE ((uint8_t)(1))
#define | I2S_MUTE_DISABLE ((uint8_t)(0))
#define | I2S_TX_MODE ((uint8_t)(0))
#define | I2S_RX_MODE ((uint8_t)(1))
#define | I2S_CLKSEL_FRDCLK ((uint8_t)(0))
#define | I2S_CLKSEL_MCLK ((uint8_t)(2))
#define | I2S_4PIN_ENABLE ((uint8_t)(1))
#define | I2S_4PIN_DISABLE ((uint8_t)(0))
#define | I2S_MCLK_ENABLE ((uint8_t)(1))
#define | I2S_MCLK_DISABLE ((uint8_t)(0))
#define | I2S_DMA_1 ((uint8_t)(0))
#define | I2S_DMA_2 ((uint8_t)(1))
#define | I2S_DAO_WORDWIDTH_8 ((uint32_t)(0))
#define | I2S_DAO_WORDWIDTH_16 ((uint32_t)(1))
#define | I2S_DAO_WORDWIDTH_32 ((uint32_t)(3))
#define | I2S_DAO_MONO ((uint32_t)(1<<2))
#define | I2S_DAO_STOP ((uint32_t)(1<<3))
#define | I2S_DAO_RESET ((uint32_t)(1<<4))
#define | I2S_DAO_SLAVE ((uint32_t)(1<<5))
#define | I2S_DAO_WS_HALFPERIOD(n) ((uint32_t)(n<<6))
#define | I2S_DAO_MUTE ((uint32_t)(1<<15))
#define | I2S_DAI_WORDWIDTH_8 ((uint32_t)(0))
#define | I2S_DAI_WORDWIDTH_16 ((uint32_t)(1))
#define | I2S_DAI_WORDWIDTH_32 ((uint32_t)(3))
#define | I2S_DAI_MONO ((uint32_t)(1<<2))
#define | I2S_DAI_STOP ((uint32_t)(1<<3))
#define | I2S_DAI_RESET ((uint32_t)(1<<4))
#define | I2S_DAI_SLAVE ((uint32_t)(1<<5))
#define | I2S_DAI_WS_HALFPERIOD(n) ((uint32_t)((n&0x1FF)<<6))
#define | I2S_DAI_MUTE ((uint32_t)(1<<15))
#define | I2S_STATE_IRQ ((uint32_t)(1))
#define | I2S_STATE_DMA1 ((uint32_t)(1<<1))
#define | I2S_STATE_DMA2 ((uint32_t)(1<<2))
#define | I2S_STATE_RX_LEVEL(n) ((uint32_t)((n&1F)<<8))
#define | I2S_STATE_TX_LEVEL(n) ((uint32_t)((n&1F)<<16))
#define | I2S_DMA1_RX_ENABLE ((uint32_t)(1))
#define | I2S_DMA1_TX_ENABLE ((uint32_t)(1<<1))
#define | I2S_DMA1_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8))
#define | I2S_DMA1_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16))
#define | I2S_DMA2_RX_ENABLE ((uint32_t)(1))
#define | I2S_DMA2_TX_ENABLE ((uint32_t)(1<<1))
#define | I2S_DMA2_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8))
#define | I2S_DMA2_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16))
#define | I2S_IRQ_RX_ENABLE ((uint32_t)(1))
#define | I2S_IRQ_TX_ENABLE ((uint32_t)(1<<1))
#define | I2S_IRQ_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8))
#define | I2S_IRQ_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16))
#define | I2S_TXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF))
#define | I2S_TXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8))
#define | I2S_RXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF))
#define | I2S_RXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8))
#define | I2S_TXBITRATE(n) ((uint32_t)(n&0x3F))
#define | I2S_RXBITRATE(n) ((uint32_t)(n&0x3F))
#define | I2S_TXMODE_CLKSEL(n) ((uint32_t)(n&0x03))
#define | I2S_TXMODE_4PIN_ENABLE ((uint32_t)(1<<2))
#define | I2S_TXMODE_MCENA ((uint32_t)(1<<3))
#define | I2S_RXMODE_CLKSEL(n) ((uint32_t)(n&0x03))
#define | I2S_RXMODE_4PIN_ENABLE ((uint32_t)(1<<2))
#define | I2S_RXMODE_MCENA ((uint32_t)(1<<3))
#define | PARAM_I2Sx(n) (((uint32_t *)n)==((uint32_t *)LPC_I2S))
#define | PRAM_I2S_FREQ(freq) ((freq>=16000)&&(freq <= 96000))
#define | PARAM_I2S_WORDWIDTH(n)
#define | PARAM_I2S_CHANNEL(n) ((n==I2S_STEREO)||(n==I2S_MONO))
#define | PARAM_I2S_WS_SEL(n) ((n==I2S_MASTER_MODE)||(n==I2S_SLAVE_MODE))
#define | PARAM_I2S_STOP(n) ((n==I2S_STOP_ENABLE)||(n==I2S_STOP_DISABLE))
#define | PARAM_I2S_RESET(n) ((n==I2S_RESET_ENABLE)||(n==I2S_RESET_DISABLE))
#define | PARAM_I2S_MUTE(n) ((n==I2S_MUTE_ENABLE)||(n==I2S_MUTE_DISABLE))
#define | PARAM_I2S_TRX(n) ((n==I2S_TX_MODE)||(n==I2S_RX_MODE))
#define | PARAM_I2S_CLKSEL(n) ((n==I2S_CLKSEL_FRDCLK)||(n==I2S_CLKSEL_MCLK))
#define | PARAM_I2S_4PIN(n) ((n==I2S_4PIN_ENABLE)||(n==I2S_4PIN_DISABLE))
#define | PARAM_I2S_MCLK(n) ((n==I2S_MCLK_ENABLE)||(n==I2S_MCLK_DISABLE))
#define | PARAM_I2S_DMA(n) ((n==I2S_DMA_1)||(n==I2S_DMA_2))
#define | PARAM_I2S_DMA_DEPTH(n) (n<=31)
#define | PARAM_I2S_IRQ_LEVEL(n) (n<=31)
#define | PARAM_I2S_HALFPERIOD(n) (n<512)
#define | PARAM_I2S_BITRATE(n) (n<=63)

Functions

void | I2S_Init (LPC_I2S_TypeDef *I2Sx)
Initialize I2S.
void | I2S_DeInit (LPC_I2S_TypeDef *I2Sx)
DeInitial both I2S transmit or receive.
void | I2S_Config (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, I2S_CFG_Type *ConfigStruct)
Configuration I2S, setting:
Status | I2S_FreqConfig (LPC_I2S_TypeDef *I2Sx, uint32_t Freq, uint8_t TRMode)
Set frequency for I2S.
void | I2S_SetBitRate (LPC_I2S_TypeDef *I2Sx, uint8_t bitrate, uint8_t TRMode)
I2S set bitrate.
void | I2S_ModeConfig (LPC_I2S_TypeDef *I2Sx, I2S_MODEConf_Type *ModeConfig, uint8_t TRMode)
Configuration operating mode for I2S.
uint8_t | I2S_GetLevel (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
Get I2S Buffer Level.
void | I2S_Send (LPC_I2S_TypeDef *I2Sx, uint32_t BufferData)
I2S Send data.
uint32_t | I2S_Receive (LPC_I2S_TypeDef *I2Sx)
I2S Receive Data.
void | I2S_Start (LPC_I2S_TypeDef *I2Sx)
I2S Start: clear all STOP,RESET and MUTE bit, ready to operate.
void | I2S_Pause (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
I2S Pause.
void | I2S_Mute (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
I2S Mute.
void | I2S_Stop (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
I2S Stop.
void | I2S_DMAConfig (LPC_I2S_TypeDef *I2Sx, I2S_DMAConf_Type *DMAConfig, uint8_t TRMode)
Configure DMA operation for I2S.
void | I2S_DMACmd (LPC_I2S_TypeDef *I2Sx, uint8_t DMAIndex, uint8_t TRMode, FunctionalState NewState)
Enable/Disable DMA operation for I2S.
void | I2S_IRQCmd (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, FunctionalState NewState)
Enable/Disable IRQ for I2S.
void | I2S_IRQConfig (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, uint8_t level)
Configure IRQ for I2S.
FunctionalState | I2S_GetIRQStatus (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
Get I2S interrupt status.
uint8_t | I2S_GetIRQDepth (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
Get I2S interrupt depth.

Detailed Description

Contains all macro definitions and function prototypes support for I2S firmware library on LPC17xx.

Version:
3.1
Date:
06. June. 2011
Author:
NXP MCU SW Application Team

Copyright(C) 2011, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_i2s.h.

Generated on Mon Nov 28 2011 11:15:03 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_libcfg_default.h File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_libcfg_default.h File Reference

Default Library configuration header file. More...

#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _EXTI
#define | _UART
#define | _UART0
#define | _UART1
#define | _UART2
#define | _UART3
#define | _SPI
#define | _SYSTICK
#define | _SSP
#define | _SSP0
#define | _SSP1
#define | _I2C
#define | _I2C0
#define | _I2C1
#define | _I2C2
#define | _TIM
#define | _WDT
#define | _GPDMA
#define | _DAC
#define | _ADC
#define | _PWM
#define | _PWM1
#define | _RTC
#define | _I2S
#define | _USBDEV
#define | _USB_DMA
#define | _QEI
#define | _MCPWM
#define | _CAN
#define | _RIT
#define | _EMAC
#define | CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))

Functions

void | check_failed (uint8_t *file, uint32_t line)

Detailed Description

Default Library configuration header file.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_libcfg_default.h.

Generated on Mon Nov 28 2011 11:15:03 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_mcpwm.h File Reference

Data Structures | Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_mcpwm.h File Reference

Contains all macro definitions and function prototypes support for Motor Control PWM firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | MCPWM_CHANNEL_CFG_Type
Motor Control PWM Channel Configuration structure type definition. More...
struct | MCPWM_CAPTURE_CFG_Type
MCPWM Capture Configuration type definition. More...
struct | MCPWM_COUNT_CFG_Type
MCPWM Count Control Configuration type definition. More...

Defines

#define | MCPWM_CHANNEL_EDGE_MODE ((uint32_t)(0))
#define | MCPWM_CHANNEL_CENTER_MODE ((uint32_t)(1))
#define | MCPWM_CHANNEL_PASSIVE_LO ((uint32_t)(0))
#define | MCPWM_CHANNEL_PASSIVE_HI ((uint32_t)(1))
#define | MCPWM_PATENT_A0 ((uint32_t)(1<<0))
#define | MCPWM_PATENT_B0 ((uint32_t)(1<<1))
#define | MCPWM_PATENT_A1 ((uint32_t)(1<<2))
#define | MCPWM_PATENT_B1 ((uint32_t)(1<<3))
#define | MCPWM_PATENT_A2 ((uint32_t)(1<<4))
#define | MCPWM_PATENT_B2 ((uint32_t)(1<<5))
#define | MCPWM_INTFLAG_LIM0 MCPWM_INT_ILIM(0)
#define | MCPWM_INTFLAG_MAT0 MCPWM_INT_IMAT(0)
#define | MCPWM_INTFLAG_CAP0 MCPWM_INT_ICAP(0)
#define | MCPWM_INTFLAG_LIM1 MCPWM_INT_ILIM(1)
#define | MCPWM_INTFLAG_MAT1 MCPWM_INT_IMAT(1)
#define | MCPWM_INTFLAG_CAP1 MCPWM_INT_ICAP(1)
#define | MCPWM_INTFLAG_LIM2 MCPWM_INT_ILIM(2)
#define | MCPWM_INTFLAG_MAT2 MCPWM_INT_IMAT(2)
#define | MCPWM_INTFLAG_CAP2 MCPWM_INT_ICAP(2)
#define | MCPWM_INTFLAG_ABORT MCPWM_INT_ABORT
#define | MCPWM_CON_RUN(n) ((n<=2) ? ((uint32_t)(1<<((n*8)+0))) : (0))
#define | MCPWM_CON_CENTER(n) ((n<=2) ? ((uint32_t)(1<<((n*8)+1))) : (0))
#define | MCPWM_CON_POLAR(n) ((n<=2) ? ((uint32_t)(1<<((n*8)+2))) : (0))
#define | MCPWM_CON_DTE(n) ((n<=2) ? ((uint32_t)(1<<((n*8)+3))) : (0))
#define | MCPWM_CON_DISUP(n) ((n<=2) ? ((uint32_t)(1<<((n*8)+4))) : (0))
#define | MCPWM_CON_INVBDC ((uint32_t)(1<<29))
#define | MCPWM_CON_ACMODE ((uint32_t)(1<<30))
#define | MCPWM_CON_DCMODE ((uint32_t)(0x80000000))
#define | MCPWM_CAPCON_CAPMCI_RE(cap, mci) (((cap<=2)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+0))) : (0))
#define | MCPWM_CAPCON_CAPMCI_FE(cap, mci) (((cap<=2)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+1))) : (0))
#define | MCPWM_CAPCON_RT(n) ((n<=2) ? ((uint32_t)(1<<(18+(n)))) : (0))
#define | MCPWM_CAPCON_HNFCAP(n) ((n<=2) ? ((uint32_t)(1<<(21+(n)))) : (0))
#define | MCPWM_INT_ILIM(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+0))) : (0))
#define | MCPWM_INT_IMAT(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+1))) : (0))
#define | MCPWM_INT_ICAP(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+2))) : (0))
#define | MCPWM_INT_ABORT ((uint32_t)(1<<15))
#define | MCPWM_CNTCON_TCMCI_RE(tc, mci) (((tc<=2)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+0))) : (0))
#define | MCPWM_CNTCON_TCMCI_FE(tc, mci) (((tc<=2)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+1))) : (0))
#define | MCPWM_CNTCON_CNTR(n) ((n<=2) ? ((uint32_t)(1<<(29+n))) : (0))
#define | MCPWM_DT(n, x) ((n<=2) ? ((uint32_t)((x&0x3FF)<<(n*10))) : (0))
#define | MCPWM_CP_A0 ((uint32_t)(1<<0))
#define | MCPWM_CP_B0 ((uint32_t)(1<<1))
#define | MCPWM_CP_A1 ((uint32_t)(1<<2))
#define | MCPWM_CP_B1 ((uint32_t)(1<<3))
#define | MCPWM_CP_A2 ((uint32_t)(1<<4))
#define | MCPWM_CP_B2 ((uint32_t)(1<<5))
#define | MCPWM_CAPCLR_CAP(n) ((n<=2) ? ((uint32_t)(1<<n)) : (0))

Functions

void | MCPWM_Init (LPC_MCPWM_TypeDef *MCPWMx)
Initializes the MCPWM peripheral.
void | MCPWM_ConfigChannel (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, MCPWM_CHANNEL_CFG_Type *channelSetup)
Configures each channel in MCPWM peripheral according to the specified parameters in the MCPWM_CHANNEL_CFG_Type.
void | MCPWM_WriteToShadow (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, MCPWM_CHANNEL_CFG_Type *channelSetup)
Write to MCPWM shadow registers - Update the value for period and pulse width in MCPWM peripheral.
void | MCPWM_ConfigCapture (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, MCPWM_CAPTURE_CFG_Type *captureConfig)
Configures capture function in MCPWM peripheral.
void | MCPWM_ClearCapture (LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel)
Clears current captured value in specified capture channel.
uint32_t | MCPWM_GetCapture (LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel)
Get current captured value in specified capture channel.
void | MCPWM_CountConfig (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, uint32_t countMode, MCPWM_COUNT_CFG_Type *countConfig)
Configures Count control in MCPWM peripheral.
void | MCPWM_Start (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0, uint32_t channel1, uint32_t channel2)
Start MCPWM activity for each MCPWM channel.
void | MCPWM_Stop (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0, uint32_t channel1, uint32_t channel2)
Stop MCPWM activity for each MCPWM channel.
void | MCPWM_ACMode (LPC_MCPWM_TypeDef *MCPWMx, uint32_t acMode)
Enables/Disables 3-phase AC motor mode on MCPWM peripheral.
void | MCPWM_DCMode (LPC_MCPWM_TypeDef *MCPWMx, uint32_t dcMode, uint32_t outputInvered, uint32_t outputPattern)
Enables/Disables 3-phase DC motor mode on MCPWM peripheral.
void | MCPWM_IntConfig (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType, FunctionalState NewState)
Configures the specified interrupt in MCPWM peripheral.
void | MCPWM_IntSet (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Sets/Forces the specified interrupt for MCPWM peripheral.
void | MCPWM_IntClear (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Clear the specified interrupt pending for MCPWM peripheral.
FlagStatus | MCPWM_GetIntStatus (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Check whether if the specified interrupt in MCPWM is set or not.

Detailed Description

Contains all macro definitions and function prototypes support for Motor Control PWM firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_mcpwm.h.

Generated on Mon Nov 28 2011 11:15:03 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_nvic.h File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_nvic.h File Reference

Contains all macro definitions and function prototypes support for Nesting Vectored Interrupt firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Functions

void | NVIC_DeInit (void)
De-initializes the NVIC peripheral registers to their default reset values.
void | NVIC_SCBDeInit (void)
De-initializes the SCB peripheral registers to their default reset values.
void | NVIC_SetVTOR (uint32_t offset)
Set Vector Table Offset value.

Detailed Description

Contains all macro definitions and function prototypes support for Nesting Vectored Interrupt firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_nvic.h.

Generated on Mon Nov 28 2011 11:15:03 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pinsel.h File Reference

Data Structures | Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pinsel.h File Reference

Contains all macro definitions and function prototypes support for Pin connect block firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | PINSEL_CFG_Type
Pin configuration structure. More...

Defines

#define | PINSEL_PORT_0 ((0))
#define | PINSEL_PORT_1 ((1))
#define | PINSEL_PORT_2 ((2))
#define | PINSEL_PORT_3 ((3))
#define | PINSEL_PORT_4 ((4))
#define | PINSEL_FUNC_0 ((0))
#define | PINSEL_FUNC_1 ((1))
#define | PINSEL_FUNC_2 ((2))
#define | PINSEL_FUNC_3 ((3))
#define | PINSEL_PIN_0 ((0))
#define | PINSEL_PIN_1 ((1))
#define | PINSEL_PIN_2 ((2))
#define | PINSEL_PIN_3 ((3))
#define | PINSEL_PIN_4 ((4))
#define | PINSEL_PIN_5 ((5))
#define | PINSEL_PIN_6 ((6))
#define | PINSEL_PIN_7 ((7))
#define | PINSEL_PIN_8 ((8))
#define | PINSEL_PIN_9 ((9))
#define | PINSEL_PIN_10 ((10))
#define | PINSEL_PIN_11 ((11))
#define | PINSEL_PIN_12 ((12))
#define | PINSEL_PIN_13 ((13))
#define | PINSEL_PIN_14 ((14))
#define | PINSEL_PIN_15 ((15))
#define | PINSEL_PIN_16 ((16))
#define | PINSEL_PIN_17 ((17))
#define | PINSEL_PIN_18 ((18))
#define | PINSEL_PIN_19 ((19))
#define | PINSEL_PIN_20 ((20))
#define | PINSEL_PIN_21 ((21))
#define | PINSEL_PIN_22 ((22))
#define | PINSEL_PIN_23 ((23))
#define | PINSEL_PIN_24 ((24))
#define | PINSEL_PIN_25 ((25))
#define | PINSEL_PIN_26 ((26))
#define | PINSEL_PIN_27 ((27))
#define | PINSEL_PIN_28 ((28))
#define | PINSEL_PIN_29 ((29))
#define | PINSEL_PIN_30 ((30))
#define | PINSEL_PIN_31 ((31))
#define | PINSEL_PINMODE_PULLUP ((0))
#define | PINSEL_PINMODE_TRISTATE ((2))
#define | PINSEL_PINMODE_PULLDOWN ((3))
#define | PINSEL_PINMODE_NORMAL ((0))
#define | PINSEL_PINMODE_OPENDRAIN ((1))
#define | PINSEL_I2C_Normal_Mode ((0))
#define | PINSEL_I2C_Fast_Mode ((1))
#define | PINSEL_I2CPADCFG_SDADRV0 _BIT(0)
#define | PINSEL_I2CPADCFG_SDAI2C0 _BIT(1)
#define | PINSEL_I2CPADCFG_SCLDRV0 _BIT(2)
#define | PINSEL_I2CPADCFG_SCLI2C0 _BIT(3)

Functions

void | PINSEL_ConfigPin (PINSEL_CFG_Type *PinCfg)
Configure Pin corresponding to specified parameters passed in the PinCfg.
void | PINSEL_ConfigTraceFunc (FunctionalState NewState)
Configure trace function.
void | PINSEL_SetI2C0Pins (uint8_t i2cPinMode, FunctionalState filterSlewRateEnable)
Setup I2C0 pins.

Detailed Description

Contains all macro definitions and function prototypes support for Pin connect block firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_pinsel.h.

Generated on Mon Nov 28 2011 11:15:03 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pwm.h File Reference

Data Structures | Defines | Enumerations | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pwm.h File Reference

Contains all macro definitions and function prototypes support for PWM firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | PWM_TIMERCFG_Type
Configuration structure in PWM TIMER mode. More...
struct | PWM_COUNTERCFG_Type
Configuration structure in PWM COUNTER mode. More...
struct | PWM_MATCHCFG_Type
PWM Match channel configuration structure. More...
struct | PWM_CAPTURECFG_Type
PWM Capture Input configuration structure. More...
struct | PWM_Match_T
Match update structure. More...

Defines

#define | PWM_IR_PWMMRn(n) ((uint32_t)((n<4)?(1<<n):(1<<(n+4))))
#define | PWM_IR_PWMCAPn(n) ((uint32_t)(1<<(n+4)))
#define | PWM_IR_BITMASK ((uint32_t)(0x0000073F))
#define | PWM_TCR_BITMASK ((uint32_t)(0x0000000B))
#define | PWM_TCR_COUNTER_ENABLE ((uint32_t)(1<<0))
#define | PWM_TCR_COUNTER_RESET ((uint32_t)(1<<1))
#define | PWM_TCR_PWM_ENABLE ((uint32_t)(1<<3))
#define | PWM_CTCR_BITMASK ((uint32_t)(0x0000000F))
#define | PWM_CTCR_MODE(n) ((uint32_t)(n&0x03))
#define | PWM_CTCR_SELECT_INPUT(n) ((uint32_t)((n&0x03)<<2))
#define | PWM_MCR_BITMASK ((uint32_t)(0x001FFFFF))
#define | PWM_MCR_INT_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07))))
#define | PWM_MCR_RESET_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+1)))
#define | PWM_MCR_STOP_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+2)))
#define | PWM_CCR_BITMASK ((uint32_t)(0x0000003F))
#define | PWM_CCR_CAP_RISING(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1))))
#define | PWM_CCR_CAP_FALLING(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+1)))
#define | PWM_CCR_INT_ON_CAP(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+2)))
#define | PWM_PCR_BITMASK (uint32_t)0x00007E7C
#define | PWM_PCR_PWMSELn(n) ((uint32_t)(((n&0x7)<2) ? 0 : (1<<n)))
#define | PWM_PCR_PWMENAn(n) ((uint32_t)(((n&0x7)<1) ? 0 : (1<<(n+8))))
#define | PWM_LER_BITMASK ((uint32_t)(0x0000007F))
#define | PWM_LER_EN_MATCHn_LATCH(n) ((uint32_t)((n<7) ? (1<<n) : 0))
#define | PARAM_PWMx(n) (((uint32_t *)n)==((uint32_t *)LPC_PWM1))
#define | PARAM_PWM1_MATCH_CHANNEL(n) (n<=6)
#define | PARAM_PWM1_CHANNEL(n) ((n>=1) && (n<=6))
#define | PARAM_PWM1_EDGE_MODE_CHANNEL(n) ((n>=2) && (n<=6))
#define | PARAM_PWM1_CAPTURE_CHANNEL(n) ((n==0) || (n==1))
#define | PARAM_PWM_INTSTAT(n)
#define | PARAM_PWM_TC_MODE(n) ((n==PWM_MODE_TIMER) || (n==PWM_MODE_COUNTER))
#define | PARAM_PWM_TIMER_PRESCALE(n) ((n==PWM_TIMER_PRESCALE_TICKVAL) || (n==PWM_TIMER_PRESCALE_USVAL))
#define | PARAM_PWM_COUNTER_INPUTSEL(n) ((n==PWM_COUNTER_PCAP1_0) || (n==PWM_COUNTER_PCAP1_1))
#define | PARAM_PWM_COUNTER_EDGE(n)
#define | PARAM_PWM_CHANNEL_EDGE(n) ((n==PWM_CHANNEL_SINGLE_EDGE) || (n==PWM_CHANNEL_DUAL_EDGE))
#define | PARAM_PWM_MATCH_UPDATE(n) ((n==PWM_MATCH_UPDATE_NOW) || (n==PWM_MATCH_UPDATE_NEXT_RST))

Enumerations

enum | PWM_TC_MODE_OPT { PWM_MODE_TIMER = 0, PWM_MODE_COUNTER }
PMW TC mode select option. More...
enum | PWM_TIMER_PRESCALE_OPT { PWM_TIMER_PRESCALE_TICKVAL = 0, PWM_TIMER_PRESCALE_USVAL }
PWM Timer/Counter prescale option. More...
enum | PWM_COUNTER_INPUTSEL_OPT { PWM_COUNTER_PCAP1_0 = 0, PWM_COUNTER_PCAP1_1 }
PWM Input Select in counter mode. More...
enum | PWM_COUNTER_EDGE_OPT { PWM_COUNTER_RISING = 1, PWM_COUNTER_FALLING = 2, PWM_COUNTER_ANY = 3 }
PWM Input Edge Option in counter mode. More...
enum | PWM_CHANNEL_EDGE_OPT { PWM_CHANNEL_SINGLE_EDGE, PWM_CHANNEL_DUAL_EDGE }
PWM operating mode options. More...
enum | PWM_MATCH_UPDATE_OPT { PWM_MATCH_UPDATE_NOW = 0, PWM_MATCH_UPDATE_NEXT_RST }
PWM update type. More...
enum PWM_INTSTAT_TYPE {
PWM_INTSTAT_MR0 = PWM_IR_PWMMRn(0), PWM_INTSTAT_MR1 = PWM_IR_PWMMRn(1), PWM_INTSTAT_MR2 = PWM_IR_PWMMRn(2), PWM_INTSTAT_MR3 = PWM_IR_PWMMRn(3),
PWM_INTSTAT_CAP0 = PWM_IR_PWMCAPn(0), PWM_INTSTAT_CAP1 = PWM_IR_PWMCAPn(1), PWM_INTSTAT_MR4 = PWM_IR_PWMMRn(4), PWM_INTSTAT_MR6 = PWM_IR_PWMMRn(5),
PWM_INTSTAT_MR5 = PWM_IR_PWMMRn(6)
}
PWM interrupt status type definition -----------------------------------------------------. More...

Functions

void | PWM_PinConfig (LPC_PWM_TypeDef *PWMx, uint8_t PWM_Channel, uint8_t PinselOption)
IntStatus | PWM_GetIntStatus (LPC_PWM_TypeDef *PWMx, uint32_t IntFlag)
Check whether specified interrupt flag in PWM is set or not.
void | PWM_ClearIntPending (LPC_PWM_TypeDef *PWMx, uint32_t IntFlag)
Clear specified PWM Interrupt pending.
void | PWM_ConfigStructInit (uint8_t PWMTimerCounterMode, void *PWM_InitStruct)
Fills each PWM_InitStruct member with its default value:
void | PWM_Init (LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct)
Initializes the PWMx peripheral corresponding to the specified parameters in the PWM_ConfigStruct.
void | PWM_DeInit (LPC_PWM_TypeDef *PWMx)
De-initializes the PWM peripheral registers to their default reset values.
void | PWM_Cmd (LPC_PWM_TypeDef *PWMx, FunctionalState NewState)
Enable/Disable PWM peripheral.
void | PWM_CounterCmd (LPC_PWM_TypeDef *PWMx, FunctionalState NewState)
Enable/Disable Counter in PWM peripheral.
void | PWM_ResetCounter (LPC_PWM_TypeDef *PWMx)
Reset Counter in PWM peripheral.
void | PWM_ConfigMatch (LPC_PWM_TypeDef *PWMx, PWM_MATCHCFG_Type *PWM_MatchConfigStruct)
Configures match for PWM peripheral.
void | PWM_ConfigCapture (LPC_PWM_TypeDef *PWMx, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct)
Configures capture input for PWM peripheral.
uint32_t | PWM_GetCaptureValue (LPC_PWM_TypeDef *PWMx, uint8_t CaptureChannel)
Read value of capture register PWM peripheral.
void | PWM_MatchUpdate (LPC_PWM_TypeDef *PWMx, uint8_t MatchChannel, uint32_t MatchValue, uint8_t UpdateType)
Update value for each PWM channel with update type option.
void | PWM_ChannelConfig (LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, uint8_t ModeOption)
Configure Edge mode for each PWM channel.
void | PWM_ChannelCmd (LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, FunctionalState NewState)
Enable/Disable PWM channel output.

Detailed Description

Contains all macro definitions and function prototypes support for PWM firmware library on LPC17xx.

Version:
2.1
Date:
31. Mar. 2011
Author:
NXP MCU SW Application Team

Copyright(C) 2011, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_pwm.h.

Generated on Mon Nov 28 2011 11:15:03 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_qei.h File Reference

Data Structures | Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_qei.h File Reference

Contains all macro definitions and function prototypes support for QEI firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | QEI_CFG_Type
QEI Configuration structure type definition. More...
struct | QEI_RELOADCFG_Type
Timer Reload Configuration structure type definition. More...

Defines

#define | QEI_RESET_POS QEI_CON_RESP
#define | QEI_RESET_POSOnIDX QEI_CON_RESPI
#define | QEI_RESET_VEL QEI_CON_RESV
#define | QEI_RESET_IDX QEI_CON_RESI
#define | QEI_DIRINV_NONE ((uint32_t)(0))
#define | QEI_DIRINV_CMPL ((uint32_t)(1))
#define | QEI_SIGNALMODE_QUAD ((uint32_t)(0))
#define | QEI_SIGNALMODE_CLKDIR ((uint32_t)(1))
#define | QEI_CAPMODE_2X ((uint32_t)(0))
#define | QEI_CAPMODE_4X ((uint32_t)(1))
#define | QEI_INVINX_NONE ((uint32_t)(0))
#define | QEI_INVINX_EN ((uint32_t)(1))
#define | QEI_TIMERRELOAD_TICKVAL ((uint8_t)(0))
#define | QEI_TIMERRELOAD_USVAL ((uint8_t)(1))
#define | QEI_STATUS_DIR ((uint32_t)(1<<0))
#define | QEI_COMPPOS_CH_0 ((uint8_t)(0))
#define | QEI_COMPPOS_CH_1 ((uint8_t)(1))
#define | QEI_COMPPOS_CH_2 ((uint8_t)(2))
#define | QEI_INTFLAG_INX_Int ((uint32_t)(1<<0))
#define | QEI_INTFLAG_TIM_Int ((uint32_t)(1<<1))
#define | QEI_INTFLAG_VELC_Int ((uint32_t)(1<<2))
#define | QEI_INTFLAG_DIR_Int ((uint32_t)(1<<3))
#define | QEI_INTFLAG_ERR_Int ((uint32_t)(1<<4))
#define | QEI_INTFLAG_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_INTFLAG_POS0_Int ((uint32_t)(1<<6))
#define | QEI_INTFLAG_POS1_Int ((uint32_t)(1<<7))
#define | QEI_INTFLAG_POS2_Int ((uint32_t)(1<<8))
#define | QEI_INTFLAG_REV_Int ((uint32_t)(1<<9))
#define | QEI_INTFLAG_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_INTFLAG_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_INTFLAG_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_CON_RESP ((uint32_t)(1<<0))
#define | QEI_CON_RESPI ((uint32_t)(1<<1))
#define | QEI_CON_RESV ((uint32_t)(1<<2))
#define | QEI_CON_RESI ((uint32_t)(1<<3))
#define | QEI_CON_BITMASK ((uint32_t)(0x0F))
#define | QEI_CONF_DIRINV ((uint32_t)(1<<0))
#define | QEI_CONF_SIGMODE ((uint32_t)(1<<1))
#define | QEI_CONF_CAPMODE ((uint32_t)(1<<2))
#define | QEI_CONF_INVINX ((uint32_t)(1<<3))
#define | QEI_CONF_BITMASK ((uint32_t)(0x0F))
#define | QEI_STAT_DIR ((uint32_t)(1<<0))
#define | QEI_STAT_BITMASK ((uint32_t)(1<<0))
#define | QEI_INTSTAT_INX_Int ((uint32_t)(1<<0))
#define | QEI_INTSTAT_TIM_Int ((uint32_t)(1<<1))
#define | QEI_INTSTAT_VELC_Int ((uint32_t)(1<<2))
#define | QEI_INTSTAT_DIR_Int ((uint32_t)(1<<3))
#define | QEI_INTSTAT_ERR_Int ((uint32_t)(1<<4))
#define | QEI_INTSTAT_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_INTSTAT_POS0_Int ((uint32_t)(1<<6))
#define | QEI_INTSTAT_POS1_Int ((uint32_t)(1<<7))
#define | QEI_INTSTAT_POS2_Int ((uint32_t)(1<<8))
#define | QEI_INTSTAT_REV_Int ((uint32_t)(1<<9))
#define | QEI_INTSTAT_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_INTSTAT_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_INTSTAT_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_INTSTAT_BITMASK ((uint32_t)(0x1FFF))
#define | QEI_INTSET_INX_Int ((uint32_t)(1<<0))
#define | QEI_INTSET_TIM_Int ((uint32_t)(1<<1))
#define | QEI_INTSET_VELC_Int ((uint32_t)(1<<2))
#define | QEI_INTSET_DIR_Int ((uint32_t)(1<<3))
#define | QEI_INTSET_ERR_Int ((uint32_t)(1<<4))
#define | QEI_INTSET_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_INTSET_POS0_Int ((uint32_t)(1<<6))
#define | QEI_INTSET_POS1_Int ((uint32_t)(1<<7))
#define | QEI_INTSET_POS2_Int ((uint32_t)(1<<8))
#define | QEI_INTSET_REV_Int ((uint32_t)(1<<9))
#define | QEI_INTSET_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_INTSET_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_INTSET_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_INTSET_BITMASK ((uint32_t)(0x1FFF))
#define | QEI_INTCLR_INX_Int ((uint32_t)(1<<0))
#define | QEI_INTCLR_TIM_Int ((uint32_t)(1<<1))
#define | QEI_INTCLR_VELC_Int ((uint32_t)(1<<2))
#define | QEI_INTCLR_DIR_Int ((uint32_t)(1<<3))
#define | QEI_INTCLR_ERR_Int ((uint32_t)(1<<4))
#define | QEI_INTCLR_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_INTCLR_POS0_Int ((uint32_t)(1<<6))
#define | QEI_INTCLR_POS1_Int ((uint32_t)(1<<7))
#define | QEI_INTCLR_POS2_Int ((uint32_t)(1<<8))
#define | QEI_INTCLR_REV_Int ((uint32_t)(1<<9))
#define | QEI_INTCLR_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_INTCLR_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_INTCLR_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_INTCLR_BITMASK ((uint32_t)(0x1FFF))
#define | QEI_INTEN_INX_Int ((uint32_t)(1<<0))
#define | QEI_INTEN_TIM_Int ((uint32_t)(1<<1))
#define | QEI_INTEN_VELC_Int ((uint32_t)(1<<2))
#define | QEI_INTEN_DIR_Int ((uint32_t)(1<<3))
#define | QEI_INTEN_ERR_Int ((uint32_t)(1<<4))
#define | QEI_INTEN_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_INTEN_POS0_Int ((uint32_t)(1<<6))
#define | QEI_INTEN_POS1_Int ((uint32_t)(1<<7))
#define | QEI_INTEN_POS2_Int ((uint32_t)(1<<8))
#define | QEI_INTEN_REV_Int ((uint32_t)(1<<9))
#define | QEI_INTEN_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_INTEN_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_INTEN_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_INTEN_BITMASK ((uint32_t)(0x1FFF))
#define | QEI_IESET_INX_Int ((uint32_t)(1<<0))
#define | QEI_IESET_TIM_Int ((uint32_t)(1<<1))
#define | QEI_IESET_VELC_Int ((uint32_t)(1<<2))
#define | QEI_IESET_DIR_Int ((uint32_t)(1<<3))
#define | QEI_IESET_ERR_Int ((uint32_t)(1<<4))
#define | QEI_IESET_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_IESET_POS0_Int ((uint32_t)(1<<6))
#define | QEI_IESET_POS1_Int ((uint32_t)(1<<7))
#define | QEI_IESET_POS2_Int ((uint32_t)(1<<8))
#define | QEI_IESET_REV_Int ((uint32_t)(1<<9))
#define | QEI_IESET_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_IESET_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_IESET_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_IESET_BITMASK ((uint32_t)(0x1FFF))
#define | QEI_IECLR_INX_Int ((uint32_t)(1<<0))
#define | QEI_IECLR_TIM_Int ((uint32_t)(1<<1))
#define | QEI_IECLR_VELC_Int ((uint32_t)(1<<2))
#define | QEI_IECLR_DIR_Int ((uint32_t)(1<<3))
#define | QEI_IECLR_ERR_Int ((uint32_t)(1<<4))
#define | QEI_IECLR_ENCLK_Int ((uint32_t)(1<<5))
#define | QEI_IECLR_POS0_Int ((uint32_t)(1<<6))
#define | QEI_IECLR_POS1_Int ((uint32_t)(1<<7))
#define | QEI_IECLR_POS2_Int ((uint32_t)(1<<8))
#define | QEI_IECLR_REV_Int ((uint32_t)(1<<9))
#define | QEI_IECLR_POS0REV_Int ((uint32_t)(1<<10))
#define | QEI_IECLR_POS1REV_Int ((uint32_t)(1<<11))
#define | QEI_IECLR_POS2REV_Int ((uint32_t)(1<<12))
#define | QEI_IECLR_BITMASK ((uint32_t)(0x1FFF))
#define | PARAM_QEIx(n) ((n==LPC_QEI))
#define | PARAM_QEI_RESET(n)
#define | PARAM_QEI_DIRINV(n) ((n==QEI_DIRINV_NONE) || (n==QEI_DIRINV_CMPL))
#define | PARAM_QEI_SIGNALMODE(n) ((n==QEI_SIGNALMODE_QUAD) || (n==QEI_SIGNALMODE_CLKDIR))
#define | PARAM_QEI_CAPMODE(n) ((n==QEI_CAPMODE_2X) || (n==QEI_CAPMODE_4X))
#define | PARAM_QEI_INVINX(n) ((n==QEI_INVINX_NONE) || (n==QEI_INVINX_EN))
#define | PARAM_QEI_TIMERRELOAD(n) ((n==QEI_TIMERRELOAD_TICKVAL) || (n==QEI_TIMERRELOAD_USVAL))
#define | PARAM_QEI_STATUS(n) ((n==QEI_STATUS_DIR))
#define | PARAM_QEI_COMPPOS_CH(n) ((n==QEI_COMPPOS_CH_0) || (n==QEI_COMPPOS_CH_1) || (n==QEI_COMPPOS_CH_2))
#define | PARAM_QEI_INTFLAG(n)

Functions

void | QEI_Reset (LPC_QEI_TypeDef *QEIx, uint32_t ulResetType)
Resets value for each type of QEI value, such as velocity, counter, position, etc..
void | QEI_Init (LPC_QEI_TypeDef *QEIx, QEI_CFG_Type *QEI_ConfigStruct)
Initializes the QEI peripheral according to the specified parameters in the QEI_ConfigStruct.
void | QEI_ConfigStructInit (QEI_CFG_Type *QIE_InitStruct)
Fills each QIE_InitStruct member with its default value:
void | QEI_DeInit (LPC_QEI_TypeDef *QEIx)
De-initializes the QEI peripheral registers to their default reset values.
FlagStatus | QEI_GetStatus (LPC_QEI_TypeDef *QEIx, uint32_t ulFlagType)
Check whether if specified flag status is set or not.
uint32_t | QEI_GetPosition (LPC_QEI_TypeDef *QEIx)
Get current position value in QEI peripheral.
void | QEI_SetMaxPosition (LPC_QEI_TypeDef *QEIx, uint32_t ulMaxPos)
Set max position value for QEI peripheral.
void | QEI_SetPositionComp (LPC_QEI_TypeDef *QEIx, uint8_t bPosCompCh, uint32_t ulPosComp)
Set position compare value for QEI peripheral.
uint32_t | QEI_GetIndex (LPC_QEI_TypeDef *QEIx)
Get current index counter of QEI peripheral.
void | QEI_SetIndexComp (LPC_QEI_TypeDef *QEIx, uint32_t ulIndexComp)
Set value for index compare in QEI peripheral.
void | QEI_SetTimerReload (LPC_QEI_TypeDef *QEIx, QEI_RELOADCFG_Type *QEIReloadStruct)
Set timer reload value for QEI peripheral. When the velocity timer is over-flow, the value that set for Timer Reload register will be loaded into the velocity timer for next period. The calculated velocity in RPM therefore will be affect by this value.
uint32_t | QEI_GetTimer (LPC_QEI_TypeDef *QEIx)
Get current timer counter in QEI peripheral.
uint32_t | QEI_GetVelocity (LPC_QEI_TypeDef *QEIx)
Get current velocity pulse counter in current time period.
uint32_t | QEI_GetVelocityCap (LPC_QEI_TypeDef *QEIx)
Get the most recently measured velocity of the QEI. When the Velocity timer in QEI is over-flow, the current velocity value will be loaded into Velocity Capture register.
void | QEI_SetVelocityComp (LPC_QEI_TypeDef *QEIx, uint32_t ulVelComp)
Set Velocity Compare value for QEI peripheral.
void | QEI_SetDigiFilter (LPC_QEI_TypeDef *QEIx, uint32_t ulSamplingPulse)
Set value of sampling count for the digital filter in QEI peripheral.
FlagStatus | QEI_GetIntStatus (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
Check whether if specified interrupt flag status in QEI peripheral is set or not.
void | QEI_IntCmd (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType, FunctionalState NewState)
Enable/Disable specified interrupt in QEI peripheral.
void | QEI_IntSet (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
Sets (forces) specified interrupt in QEI peripheral.
void | QEI_IntClear (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
Clear (force) specified interrupt (pending) in QEI peripheral.
uint32_t | QEI_CalculateRPM (LPC_QEI_TypeDef *QEIx, uint32_t ulVelCapValue, uint32_t ulPPR)
Calculates the actual velocity in RPM passed via velocity capture value and Pulse Per Round (of the encoder) value parameter input.

Detailed Description

Contains all macro definitions and function prototypes support for QEI firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_qei.h.

Generated on Mon Nov 28 2011 11:15:03 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rit.h File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rit.h File Reference

Contains all macro definitions and function prototypes support for RIT firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | RIT_CTRL_INTEN ((uint32_t) (1))
#define | RIT_CTRL_ENCLR ((uint32_t) _BIT(1))
#define | RIT_CTRL_ENBR ((uint32_t) _BIT(2))
#define | RIT_CTRL_TEN ((uint32_t) _BIT(3))
#define | PARAM_RITx(n) (((uint32_t *)n)==((uint32_t *)LPC_RIT))

Functions

void | RIT_Init (LPC_RIT_TypeDef *RITx)
void | RIT_DeInit (LPC_RIT_TypeDef *RITx)
void | RIT_TimerConfig (LPC_RIT_TypeDef *RITx, uint32_t time_interval)
void | RIT_TimerClearCmd (LPC_RIT_TypeDef *RITx, FunctionalState NewState)
void | RIT_Cmd (LPC_RIT_TypeDef *RITx, FunctionalState NewState)
void | RIT_TimerDebugCmd (LPC_RIT_TypeDef *RITx, FunctionalState NewState)
IntStatus | RIT_GetIntStatus (LPC_RIT_TypeDef *RITx)

Detailed Description

Contains all macro definitions and function prototypes support for RIT firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_rit.h.

Generated on Mon Nov 28 2011 11:15:03 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rtc.h File Reference

Data Structures | Defines | Enumerations | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rtc.h File Reference

Contains all macro definitions and function prototypes support for RTC firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | RTC_TIME_Type
Time structure definitions for easy manipulate the data. More...

Defines

#define | RTC_ILR_BITMASK ((0x00000003))
#define | RTC_IRL_RTCCIF ((1<<0))
#define | RTC_IRL_RTCALF ((1<<1))
#define | RTC_CCR_BITMASK ((0x00000013))
#define | RTC_CCR_CLKEN ((1<<0))
#define | RTC_CCR_CTCRST ((1<<1))
#define | RTC_CCR_CCALEN ((1<<4))
#define | RTC_CIIR_IMSEC ((1<<0))
#define | RTC_CIIR_IMMIN ((1<<1))
#define | RTC_CIIR_IMHOUR ((1<<2))
#define | RTC_CIIR_IMDOM ((1<<3))
#define | RTC_CIIR_IMDOW ((1<<4))
#define | RTC_CIIR_IMDOY ((1<<5))
#define | RTC_CIIR_IMMON ((1<<6))
#define | RTC_CIIR_IMYEAR ((1<<7))
#define | RTC_CIIR_BITMASK ((0xFF))
#define | RTC_AMR_AMRSEC ((1<<0))
#define | RTC_AMR_AMRMIN ((1<<1))
#define | RTC_AMR_AMRHOUR ((1<<2))
#define | RTC_AMR_AMRDOM ((1<<3))
#define | RTC_AMR_AMRDOW ((1<<4))
#define | RTC_AMR_AMRDOY ((1<<5))
#define | RTC_AMR_AMRMON ((1<<6))
#define | RTC_AMR_AMRYEAR ((1<<7))
#define | RTC_AMR_BITMASK ((0xFF))
#define | RTC_AUX_RTC_OSCF ((1<<4))
#define | RTC_AUXEN_RTC_OSCFEN ((1<<4))
#define | RTC_CTIME0_SECONDS_MASK ((0x3F))
#define | RTC_CTIME0_MINUTES_MASK ((0x3F00))
#define | RTC_CTIME0_HOURS_MASK ((0x1F0000))
#define | RTC_CTIME0_DOW_MASK ((0x7000000))
#define | RTC_CTIME1_DOM_MASK ((0x1F))
#define | RTC_CTIME1_MONTH_MASK ((0xF00))
#define | RTC_CTIME1_YEAR_MASK ((0xFFF0000))
#define | RTC_CTIME2_DOY_MASK ((0xFFF))
#define | RTC_SEC_MASK (0x0000003F)
#define | RTC_MIN_MASK (0x0000003F)
#define | RTC_HOUR_MASK (0x0000001F)
#define | RTC_DOM_MASK (0x0000001F)
#define | RTC_DOW_MASK (0x00000007)
#define | RTC_DOY_MASK (0x000001FF)
#define | RTC_MONTH_MASK (0x0000000F)
#define | RTC_YEAR_MASK (0x00000FFF)
#define | RTC_SECOND_MAX 59
#define | RTC_MINUTE_MAX 59
#define | RTC_HOUR_MAX 23
#define | RTC_MONTH_MIN 1
#define | RTC_MONTH_MAX 12
#define | RTC_DAYOFMONTH_MIN 1
#define | RTC_DAYOFMONTH_MAX 31
#define | RTC_DAYOFWEEK_MAX 6
#define | RTC_DAYOFYEAR_MIN 1
#define | RTC_DAYOFYEAR_MAX 366
#define | RTC_YEAR_MAX 4095
#define | RTC_CALIBRATION_CALVAL_MASK ((0x1FFFF))
#define | RTC_CALIBRATION_LIBDIR ((1<<17))
#define | RTC_CALIBRATION_MAX ((0x20000))
#define | RTC_CALIB_DIR_FORWARD ((uint8_t)(0))
#define | RTC_CALIB_DIR_BACKWARD ((uint8_t)(1))
#define | PARAM_RTCx(x) (((uint32_t *)x)==((uint32_t *)LPC_RTC))
#define | PARAM_RTC_INT(n) ((n==RTC_INT_COUNTER_INCREASE) || (n==RTC_INT_ALARM))
#define | PARAM_RTC_TIMETYPE(n)
#define | PARAM_RTC_CALIB_DIR(n) ((n==RTC_CALIB_DIR_FORWARD) || (n==RTC_CALIB_DIR_BACKWARD))
#define | PARAM_RTC_GPREG_CH(n) (n<=4)

Enumerations

enum | RTC_INT_OPT { RTC_INT_COUNTER_INCREASE = RTC_IRL_RTCCIF, RTC_INT_ALARM = RTC_IRL_RTCALF }
RTC interrupt source. More...
enum RTC_TIMETYPE_Num {
RTC_TIMETYPE_SECOND = 0, RTC_TIMETYPE_MINUTE = 1, RTC_TIMETYPE_HOUR = 2, RTC_TIMETYPE_DAYOFWEEK = 3,
RTC_TIMETYPE_DAYOFMONTH = 4, RTC_TIMETYPE_DAYOFYEAR = 5, RTC_TIMETYPE_MONTH = 6, RTC_TIMETYPE_YEAR = 7
}
RTC time type option. More...

Functions

void | RTC_Init (LPC_RTC_TypeDef *RTCx)
Initializes the RTC peripheral.
void | RTC_DeInit (LPC_RTC_TypeDef *RTCx)
De-initializes the RTC peripheral registers to their default reset values.
void | RTC_ResetClockTickCounter (LPC_RTC_TypeDef *RTCx)
Reset clock tick counter in RTC peripheral.
void | RTC_Cmd (LPC_RTC_TypeDef *RTCx, FunctionalState NewState)
Start/Stop RTC peripheral.
void | RTC_CntIncrIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t CntIncrIntType, FunctionalState NewState)
Enable/Disable Counter increment interrupt for each time type in RTC peripheral.
void | RTC_AlarmIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t AlarmTimeType, FunctionalState NewState)
Enable/Disable Alarm interrupt for each time type in RTC peripheral.
void | RTC_SetTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t TimeValue)
Set current time value for each time type in RTC peripheral.
uint32_t | RTC_GetTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype)
Get current time value for each type time type.
void | RTC_SetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Set full of time in RTC peripheral.
void | RTC_GetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Get full of time in RTC peripheral.
void | RTC_SetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t ALValue)
Set alarm time value for each time type.
uint32_t | RTC_GetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype)
Get alarm time value for each time type.
void | RTC_SetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Set full of alarm time in RTC peripheral.
void | RTC_GetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Get full of alarm time in RTC peripheral.
IntStatus | RTC_GetIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType)
Check whether if specified Location interrupt in RTC peripheral is set or not.
void | RTC_ClearIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType)
Clear specified Location interrupt pending in RTC peripheral.
void | RTC_CalibCounterCmd (LPC_RTC_TypeDef *RTCx, FunctionalState NewState)
Enable/Disable calibration counter in RTC peripheral.
void | RTC_CalibConfig (LPC_RTC_TypeDef *RTCx, uint32_t CalibValue, uint8_t CalibDir)
Configures Calibration in RTC peripheral.
void | RTC_WriteGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel, uint32_t Value)
Write value to General purpose registers.
uint32_t | RTC_ReadGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel)
Read value from General purpose registers.

Detailed Description

Contains all macro definitions and function prototypes support for RTC firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_rtc.h.

Generated on Mon Nov 28 2011 11:15:03 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_spi.h File Reference

Data Structures | Defines | Enumerations | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_spi.h File Reference

Contains all macro definitions and function prototypes support for SPI firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | SPI_CFG_Type
SPI configuration structure. More...
struct | SPI_DATA_SETUP_Type
SPI Data configuration structure definitions. More...

Defines

#define | SPI_CPHA_FIRST ((uint32_t)(0))
#define | SPI_CPHA_SECOND ((uint32_t)(1<<3))
#define | SPI_CPOL_HI ((uint32_t)(0))
#define | SPI_CPOL_LO ((uint32_t)(1<<4))
#define | SPI_SLAVE_MODE ((uint32_t)(0))
#define | SPI_MASTER_MODE ((uint32_t)(1<<5))
#define | SPI_DATA_MSB_FIRST ((uint32_t)(0))
#define | SPI_DATA_LSB_FIRST ((uint32_t)(1<<6))
#define | SPI_DATABIT_16 SPI_SPCR_BITS(0)
#define | SPI_DATABIT_8 SPI_SPCR_BITS(0x08)
#define | SPI_DATABIT_9 SPI_SPCR_BITS(0x09)
#define | SPI_DATABIT_10 SPI_SPCR_BITS(0x0A)
#define | SPI_DATABIT_11 SPI_SPCR_BITS(0x0B)
#define | SPI_DATABIT_12 SPI_SPCR_BITS(0x0C)
#define | SPI_DATABIT_13 SPI_SPCR_BITS(0x0D)
#define | SPI_DATABIT_14 SPI_SPCR_BITS(0x0E)
#define | SPI_DATABIT_15 SPI_SPCR_BITS(0x0F)
#define | SPI_STAT_ABRT SPI_SPSR_ABRT
#define | SPI_STAT_MODF SPI_SPSR_MODF
#define | SPI_STAT_ROVR SPI_SPSR_ROVR
#define | SPI_STAT_WCOL SPI_SPSR_WCOL
#define | SPI_STAT_SPIF SPI_SPSR_SPIF
#define | SPI_STAT_DONE (1UL<<8)
#define | SPI_STAT_ERROR (1UL<<9)
#define | SPI_SPCR_BIT_EN ((uint32_t)(1<<2))
#define | SPI_SPCR_CPHA_SECOND ((uint32_t)(1<<3))
#define | SPI_SPCR_CPOL_LOW ((uint32_t)(1<<4))
#define | SPI_SPCR_MSTR ((uint32_t)(1<<5))
#define | SPI_SPCR_LSBF ((uint32_t)(1<<6))
#define | SPI_SPCR_SPIE ((uint32_t)(1<<7))
#define | SPI_SPCR_BITS(n) ((n==0) ? ((uint32_t)0) : ((uint32_t)((n&0x0F)<<8)))
#define | SPI_SPCR_BITMASK ((uint32_t)(0xFFC))
#define | SPI_SPSR_ABRT ((uint32_t)(1<<3))
#define | SPI_SPSR_MODF ((uint32_t)(1<<4))
#define | SPI_SPSR_ROVR ((uint32_t)(1<<5))
#define | SPI_SPSR_WCOL ((uint32_t)(1<<6))
#define | SPI_SPSR_SPIF ((uint32_t)(1<<7))
#define | SPI_SPSR_BITMASK ((uint32_t)(0xF8))
#define | SPI_SPDR_LO_MASK ((uint32_t)(0xFF))
#define | SPI_SPDR_HI_MASK ((uint32_t)(0xFF00))
#define | SPI_SPDR_BITMASK ((uint32_t)(0xFFFF))
#define | SPI_SPCCR_COUNTER(n) ((uint32_t)(n&0xFF))
#define | SPI_SPCCR_BITMASK ((uint32_t)(0xFF))
#define | SPI_SPTCR_TEST_MASK ((uint32_t)(0xFE))
#define | SPI_SPTCR_BITMASK ((uint32_t)(0xFE))
#define | SPI_SPTSR_ABRT ((uint32_t)(1<<3))
#define | SPI_SPTSR_MODF ((uint32_t)(1<<4))
#define | SPI_SPTSR_ROVR ((uint32_t)(1<<5))
#define | SPI_SPTSR_WCOL ((uint32_t)(1<<6))
#define | SPI_SPTSR_SPIF ((uint32_t)(1<<7))
#define | SPI_SPTSR_MASKBIT ((uint32_t)(0xF8))
#define | SPI_SPINT_INTFLAG ((uint32_t)(1<<0))
#define | SPI_SPINT_BITMASK ((uint32_t)(0x01))
#define | PARAM_SPIx(n) (((uint32_t *)n)==((uint32_t *)LPC_SPI))
#define | PARAM_SPI_CPHA(n) ((n==SPI_CPHA_FIRST) || (n==SPI_CPHA_SECOND))
#define | PARAM_SPI_CPOL(n) ((n==SPI_CPOL_HI) || (n==SPI_CPOL_LO))
#define | PARAM_SPI_MODE(n) ((n==SPI_SLAVE_MODE) || (n==SPI_MASTER_MODE))
#define | PARAM_SPI_DATA_ORDER(n) ((n==SPI_DATA_MSB_FIRST) || (n==SPI_DATA_LSB_FIRST))
#define | PARAM_SPI_DATABIT(n)
#define | PARAM_SPI_STAT(n)

Enumerations

enum | SPI_TRANSFER_Type { SPI_TRANSFER_POLLING = 0, SPI_TRANSFER_INTERRUPT }
SPI Transfer Type definitions. More...

Functions

void | SPI_Init (LPC_SPI_TypeDef *SPIx, SPI_CFG_Type *SPI_ConfigStruct)
Initializes the SPIx peripheral according to the specified parameters in the UART_ConfigStruct.
void | SPI_DeInit (LPC_SPI_TypeDef *SPIx)
De-initializes the SPIx peripheral registers to their default reset values.
void | SPI_SetClock (LPC_SPI_TypeDef *SPIx, uint32_t target_clock)
Setup clock rate for SPI device.
void | SPI_ConfigStructInit (SPI_CFG_Type *SPI_InitStruct)
Fills each SPI_InitStruct member with its default value:
void | SPI_SendData (LPC_SPI_TypeDef *SPIx, uint16_t Data)
Transmit a single data through SPIx peripheral.
uint16_t | SPI_ReceiveData (LPC_SPI_TypeDef *SPIx)
Receive a single data from SPIx peripheral.
int32_t | SPI_ReadWrite (LPC_SPI_TypeDef *SPIx, SPI_DATA_SETUP_Type *dataCfg, SPI_TRANSFER_Type xfType)
SPI Read write data function.
void | SPI_IntCmd (LPC_SPI_TypeDef *SPIx, FunctionalState NewState)
Enable or disable SPIx interrupt.
IntStatus | SPI_GetIntStatus (LPC_SPI_TypeDef *SPIx)
Checks whether the SPI interrupt flag is set or not.
void | SPI_ClearIntPending (LPC_SPI_TypeDef *SPIx)
Clear SPI interrupt flag.
uint8_t | SPI_GetDataSize (LPC_SPI_TypeDef *SPIx)
Get data bit size per transfer.
uint32_t | SPI_GetStatus (LPC_SPI_TypeDef *SPIx)
Get current value of SPI Status register in SPIx peripheral.
FlagStatus | SPI_CheckStatus (uint32_t inputSPIStatus, uint8_t SPIStatus)
Checks whether the specified SPI Status flag is set or not via inputSPIStatus parameter.

Detailed Description

Contains all macro definitions and function prototypes support for SPI firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_spi.h.

Generated on Mon Nov 28 2011 11:15:03 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_ssp.h File Reference

Data Structures | Defines | Enumerations | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_ssp.h File Reference

Contains all macro definitions and function prototypes support for SSP firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | SSP_CFG_Type
SSP configuration structure. More...
struct | SSP_DATA_SETUP_Type
SPI Data configuration structure definitions. More...

Defines

#define | SSP_CPHA_FIRST ((uint32_t)(0))
#define | SSP_CPHA_SECOND SSP_CR0_CPHA_SECOND
#define | SSP_CPOL_HI ((uint32_t)(0))
#define | SSP_CPOL_LO SSP_CR0_CPOL_HI
#define | SSP_SLAVE_MODE SSP_CR1_SLAVE_EN
#define | SSP_MASTER_MODE ((uint32_t)(0))
#define | SSP_DATABIT_4 SSP_CR0_DSS(4)
#define | SSP_DATABIT_5 SSP_CR0_DSS(5)
#define | SSP_DATABIT_6 SSP_CR0_DSS(6)
#define | SSP_DATABIT_7 SSP_CR0_DSS(7)
#define | SSP_DATABIT_8 SSP_CR0_DSS(8)
#define | SSP_DATABIT_9 SSP_CR0_DSS(9)
#define | SSP_DATABIT_10 SSP_CR0_DSS(10)
#define | SSP_DATABIT_11 SSP_CR0_DSS(11)
#define | SSP_DATABIT_12 SSP_CR0_DSS(12)
#define | SSP_DATABIT_13 SSP_CR0_DSS(13)
#define | SSP_DATABIT_14 SSP_CR0_DSS(14)
#define | SSP_DATABIT_15 SSP_CR0_DSS(15)
#define | SSP_DATABIT_16 SSP_CR0_DSS(16)
#define | SSP_FRAME_SPI SSP_CR0_FRF_SPI
#define | SSP_FRAME_TI SSP_CR0_FRF_TI
#define | SSP_FRAME_MICROWIRE SSP_CR0_FRF_MICROWIRE
#define | SSP_STAT_TXFIFO_EMPTY SSP_SR_TFE
#define | SSP_STAT_TXFIFO_NOTFULL SSP_SR_TNF
#define | SSP_STAT_RXFIFO_NOTEMPTY SSP_SR_RNE
#define | SSP_STAT_RXFIFO_FULL SSP_SR_RFF
#define | SSP_STAT_BUSY SSP_SR_BSY
#define | SSP_INTCFG_ROR SSP_IMSC_ROR
#define | SSP_INTCFG_RT SSP_IMSC_RT
#define | SSP_INTCFG_RX SSP_IMSC_RX
#define | SSP_INTCFG_TX SSP_IMSC_TX
#define | SSP_INTSTAT_ROR SSP_MIS_ROR
#define | SSP_INTSTAT_RT SSP_MIS_RT
#define | SSP_INTSTAT_RX SSP_MIS_RX
#define | SSP_INTSTAT_TX SSP_MIS_TX
#define | SSP_INTSTAT_RAW_ROR SSP_RIS_ROR
#define | SSP_INTSTAT_RAW_RT SSP_RIS_RT
#define | SSP_INTSTAT_RAW_RX SSP_RIS_RX
#define | SSP_INTSTAT_RAW_TX SSP_RIS_TX
#define | SSP_INTCLR_ROR SSP_ICR_ROR
#define | SSP_INTCLR_RT SSP_ICR_RT
#define | SSP_DMA_RX SSP_DMA_RXDMA_EN
#define | SSP_DMA_TX SSP_DMA_TXDMA_EN
#define | SSP_STAT_DONE (1UL<<8)
#define | SSP_STAT_ERROR (1UL<<9)
#define | SSP_CR0_DSS(n) ((uint32_t)((n-1)&0xF))
#define | SSP_CR0_FRF_SPI ((uint32_t)(0<<4))
#define | SSP_CR0_FRF_TI ((uint32_t)(1<<4))
#define | SSP_CR0_FRF_MICROWIRE ((uint32_t)(2<<4))
#define | SSP_CR0_CPOL_HI ((uint32_t)(1<<6))
#define | SSP_CR0_CPHA_SECOND ((uint32_t)(1<<7))
#define | SSP_CR0_SCR(n) ((uint32_t)((n&0xFF)<<8))
#define | SSP_CR0_BITMASK ((uint32_t)(0xFFFF))
#define | SSP_CR1_LBM_EN ((uint32_t)(1<<0))
#define | SSP_CR1_SSP_EN ((uint32_t)(1<<1))
#define | SSP_CR1_SLAVE_EN ((uint32_t)(1<<2))
#define | SSP_CR1_SO_DISABLE ((uint32_t)(1<<3))
#define | SSP_CR1_BITMASK ((uint32_t)(0x0F))
#define | SSP_DR_BITMASK(n) ((n)&0xFFFF)
#define | SSP_SR_TFE ((uint32_t)(1<<0))
#define | SSP_SR_TNF ((uint32_t)(1<<1))
#define | SSP_SR_RNE ((uint32_t)(1<<2))
#define | SSP_SR_RFF ((uint32_t)(1<<3))
#define | SSP_SR_BSY ((uint32_t)(1<<4))
#define | SSP_SR_BITMASK ((uint32_t)(0x1F))
#define | SSP_CPSR_CPDVSR(n) ((uint32_t)(n&0xFF))
#define | SSP_CPSR_BITMASK ((uint32_t)(0xFF))
#define | SSP_IMSC_ROR ((uint32_t)(1<<0))
#define | SSP_IMSC_RT ((uint32_t)(1<<1))
#define | SSP_IMSC_RX ((uint32_t)(1<<2))
#define | SSP_IMSC_TX ((uint32_t)(1<<3))
#define | SSP_IMSC_BITMASK ((uint32_t)(0x0F))
#define | SSP_RIS_ROR ((uint32_t)(1<<0))
#define | SSP_RIS_RT ((uint32_t)(1<<1))
#define | SSP_RIS_RX ((uint32_t)(1<<2))
#define | SSP_RIS_TX ((uint32_t)(1<<3))
#define | SSP_RIS_BITMASK ((uint32_t)(0x0F))
#define | SSP_MIS_ROR ((uint32_t)(1<<0))
#define | SSP_MIS_RT ((uint32_t)(1<<1))
#define | SSP_MIS_RX ((uint32_t)(1<<2))
#define | SSP_MIS_TX ((uint32_t)(1<<3))
#define | SSP_MIS_BITMASK ((uint32_t)(0x0F))
#define | SSP_ICR_ROR ((uint32_t)(1<<0))
#define | SSP_ICR_RT ((uint32_t)(1<<1))
#define | SSP_ICR_BITMASK ((uint32_t)(0x03))
#define | SSP_DMA_RXDMA_EN ((uint32_t)(1<<0))
#define | SSP_DMA_TXDMA_EN ((uint32_t)(1<<1))
#define | SSP_DMA_BITMASK ((uint32_t)(0x03))
#define | PARAM_SSPx(n)
#define | PARAM_SSP_CPHA(n) ((n==SSP_CPHA_FIRST) || (n==SSP_CPHA_SECOND))
#define | PARAM_SSP_CPOL(n) ((n==SSP_CPOL_HI) || (n==SSP_CPOL_LO))
#define | PARAM_SSP_MODE(n) ((n==SSP_SLAVE_MODE) || (n==SSP_MASTER_MODE))
#define | PARAM_SSP_DATABIT(n)
#define | PARAM_SSP_FRAME(n)
#define | PARAM_SSP_STAT(n)
#define | PARAM_SSP_INTCFG(n)
#define | PARAM_SSP_INTSTAT(n)
#define | PARAM_SSP_INTSTAT_RAW(n)
#define | PARAM_SSP_INTCLR(n) ((n==SSP_INTCLR_ROR) || (n==SSP_INTCLR_RT))
#define | PARAM_SSP_DMA(n) ((n==SSP_DMA_TX) || (n==SSP_DMA_RX))

Enumerations

enum | SSP_TRANSFER_Type { SSP_TRANSFER_POLLING = 0, SSP_TRANSFER_INTERRUPT }
SSP Transfer Type definitions. More...

Functions

void | SSP_Init (LPC_SSP_TypeDef *SSPx, SSP_CFG_Type *SSP_ConfigStruct)
Initializes the SSPx peripheral according to the specified parameters in the SSP_ConfigStruct.
void | SSP_DeInit (LPC_SSP_TypeDef *SSPx)
De-initializes the SSPx peripheral registers to their default reset values.
void | SSP_ConfigStructInit (SSP_CFG_Type *SSP_InitStruct)
Fills each SSP_InitStruct member with its default value:
void | SSP_Cmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState)
Enable or disable SSP peripheral's operation.
void | SSP_LoopBackCmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState)
Enable or disable Loop Back mode function in SSP peripheral.
void | SSP_SlaveOutputCmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState)
Enable or disable Slave Output function in SSP peripheral.
void | SSP_DMACmd (LPC_SSP_TypeDef *SSPx, uint32_t DMAMode, FunctionalState NewState)
Enable/Disable DMA function for SSP peripheral.
FlagStatus | SSP_GetStatus (LPC_SSP_TypeDef *SSPx, uint32_t FlagType)
Checks whether the specified SSP status flag is set or not.
uint8_t | SSP_GetDataSize (LPC_SSP_TypeDef *SSPx)
Get data size bit selected.
IntStatus | SSP_GetRawIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t RawIntType)
Check whether the specified Raw interrupt status flag is set or not.
uint32_t | SSP_GetRawIntStatusReg (LPC_SSP_TypeDef *SSPx)
Get Raw Interrupt Status register.
IntStatus | SSP_GetIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t IntType)
Check whether the specified interrupt status flag is set or not.
void | SSP_SendData (LPC_SSP_TypeDef *SSPx, uint16_t Data)
Transmit a single data through SSPx peripheral.
uint16_t | SSP_ReceiveData (LPC_SSP_TypeDef *SSPx)
Receive a single data from SSPx peripheral.
int32_t | SSP_ReadWrite (LPC_SSP_TypeDef *SSPx, SSP_DATA_SETUP_Type *dataCfg, SSP_TRANSFER_Type xfType)
SSP Read write data function.
void | SSP_IntConfig (LPC_SSP_TypeDef *SSPx, uint32_t IntType, FunctionalState NewState)
Enable or disable specified interrupt type in SSP peripheral.
void | SSP_ClearIntPending (LPC_SSP_TypeDef *SSPx, uint32_t IntType)
Clear specified interrupt pending in SSP peripheral.

Detailed Description

Contains all macro definitions and function prototypes support for SSP firmware library on LPC17xx.

Version:
3.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_ssp.h.

Generated on Mon Nov 28 2011 11:15:03 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_systick.h File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_systick.h File Reference

Contains all macro definitions and function prototypes support for SYSTICK firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | ST_CTRL_ENABLE ((uint32_t)(1<<0))
#define | ST_CTRL_TICKINT ((uint32_t)(1<<1))
#define | ST_CTRL_CLKSOURCE ((uint32_t)(1<<2))
#define | ST_CTRL_COUNTFLAG ((uint32_t)(1<<16))
#define | ST_RELOAD_RELOAD(n) ((uint32_t)(n & 0x00FFFFFF))
#define | ST_RELOAD_CURRENT(n) ((uint32_t)(n & 0x00FFFFFF))
#define | ST_CALIB_TENMS(n) ((uint32_t)(n & 0x00FFFFFF))
#define | ST_CALIB_SKEW ((uint32_t)(1<<30))
#define | ST_CALIB_NOREF ((uint32_t)(1<<31))
#define | CLKSOURCE_EXT ((uint32_t)(0))
#define | CLKSOURCE_CPU ((uint32_t)(1))

Functions

void | SYSTICK_InternalInit (uint32_t time)
Initial System Tick with using internal CPU clock source.
void | SYSTICK_ExternalInit (uint32_t freq, uint32_t time)
Initial System Tick with using external clock source.
void | SYSTICK_Cmd (FunctionalState NewState)
Enable/disable System Tick counter.
void | SYSTICK_IntCmd (FunctionalState NewState)
Enable/disable System Tick interrupt.
uint32_t | SYSTICK_GetCurrentValue (void)
Get current value of System Tick counter.
void | SYSTICK_ClearCounterFlag (void)
Clear Counter flag.

Detailed Description

Contains all macro definitions and function prototypes support for SYSTICK firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_systick.h.

Generated on Mon Nov 28 2011 11:15:03 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_timer.h File Reference

Data Structures | Defines | Enumerations | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_timer.h File Reference

Contains all macro definitions and function prototypes support for Timer firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | TIM_TIMERCFG_Type
Configuration structure in TIMER mode. More...
struct | TIM_COUNTERCFG_Type
Configuration structure in COUNTER mode. More...
struct | TIM_MATCHCFG_Type
Match channel configuration structure. More...
struct | TIM_CAPTURECFG_Type
Capture Input configuration structure. More...

Defines

#define | TIM_IR_CLR(n) _BIT(n)
#define | TIM_MATCH_INT(n) (_BIT(n & 0x0F))
#define | TIM_CAP_INT(n) (_BIT(((n & 0x0F) + 4)))
#define | TIM_ENABLE ((uint32_t)(1<<0))
#define | TIM_RESET ((uint32_t)(1<<1))
#define | TIM_TCR_MASKBIT ((uint32_t)(3))
#define | TIM_INT_ON_MATCH(n) (_BIT((n * 3)))
#define | TIM_RESET_ON_MATCH(n) (_BIT(((n * 3) + 1)))
#define | TIM_STOP_ON_MATCH(n) (_BIT(((n * 3) + 2)))
#define | TIM_MCR_MASKBIT ((uint32_t)(0x0FFF))
#define | TIM_MCR_CHANNEL_MASKBIT(n) ((uint32_t)(7<<(n*3)))
#define | TIM_CAP_RISING(n) (_BIT((n * 3)))
#define | TIM_CAP_FALLING(n) (_BIT(((n * 3) + 1)))
#define | TIM_INT_ON_CAP(n) (_BIT(((n * 3) + 2)))
#define | TIM_EDGE_MASK(n) (_SBF((n * 3), 0x03))
#define | TIM_CCR_MASKBIT ((uint32_t)(0x3F))
#define | TIM_CCR_CHANNEL_MASKBIT(n) ((uint32_t)(7<<(n*3)))
#define | TIM_EM(n) _BIT(n)
#define | TIM_EM_NOTHING ((uint8_t)(0x0))
#define | TIM_EM_LOW ((uint8_t)(0x1))
#define | TIM_EM_HIGH ((uint8_t)(0x2))
#define | TIM_EM_TOGGLE ((uint8_t)(0x3))
#define | TIM_EM_SET(n, s) (_SBF(((n << 1) + 4), (s & 0x03)))
#define | TIM_EM_MASK(n) (_SBF(((n << 1) + 4), 0x03))
#define | TIM_EMR_MASKBIT 0x0FFF
#define | TIM_CTCR_MODE_MASK 0x3
#define | TIM_CTCR_INPUT_MASK 0xC
#define | TIM_CTCR_MASKBIT 0xF
#define | TIM_COUNTER_MODE ((uint8_t)(1))
#define | PARAM_TIMx(n)
#define | PARAM_TIM_INT_TYPE(TYPE)
#define | PARAM_TIM_MODE_OPT(MODE)
#define | PARAM_TIM_PRESCALE_OPT(OPT) ((OPT == TIM_PRESCALE_TICKVAL)||(OPT == TIM_PRESCALE_USVAL))
#define | PARAM_TIM_COUNTER_INPUT_OPT(OPT) ((OPT == TIM_COUNTER_INCAP0)||(OPT == TIM_COUNTER_INCAP1))
#define | PARAM_TIM_EXTMATCH_OPT(OPT)
#define | PARAM_TIM_CAP_MODE_OPT(OPT)

Enumerations

enum TIM_INT_TYPE {
TIM_MR0_INT = 0, TIM_MR1_INT = 1, TIM_MR2_INT = 2, TIM_MR3_INT = 3,
TIM_CR0_INT = 4, TIM_CR1_INT = 5
}
interrupt type More...
enum | TIM_MODE_OPT { TIM_TIMER_MODE = 0, TIM_COUNTER_RISING_MODE, TIM_COUNTER_FALLING_MODE, TIM_COUNTER_ANY_MODE }
Timer/counter operating mode. More...
enum | TIM_PRESCALE_OPT { TIM_PRESCALE_TICKVAL = 0, TIM_PRESCALE_USVAL }
Timer/Counter prescale option. More...
enum | TIM_COUNTER_INPUT_OPT { TIM_COUNTER_INCAP0 = 0, TIM_COUNTER_INCAP1 }
Counter input option. More...
enum | TIM_EXTMATCH_OPT { TIM_EXTMATCH_NOTHING = 0, TIM_EXTMATCH_LOW, TIM_EXTMATCH_HIGH, TIM_EXTMATCH_TOGGLE }
Timer/Counter external match option. More...
enum | TIM_CAP_MODE_OPT { TIM_CAPTURE_NONE = 0, TIM_CAPTURE_RISING, TIM_CAPTURE_FALLING, TIM_CAPTURE_ANY }
Timer/counter capture mode options. More...

Functions

void | TIM_Init (LPC_TIM_TypeDef *TIMx, TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct)
Initial Timer/Counter device Set Clock frequency for Timer Set initial configuration for Timer.
void | TIM_DeInit (LPC_TIM_TypeDef *TIMx)
Close Timer/Counter device.
void | TIM_ClearIntPending (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Clear Interrupt pending.
void | TIM_ClearIntCapturePending (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Clear Capture Interrupt pending.
FlagStatus | TIM_GetIntStatus (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Get Interrupt Status.
FlagStatus | TIM_GetIntCaptureStatus (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Get Capture Interrupt Status.
void | TIM_ConfigStructInit (TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct)
Configuration for Timer at initial time.
void | TIM_ConfigMatch (LPC_TIM_TypeDef *TIMx, TIM_MATCHCFG_Type *TIM_MatchConfigStruct)
Configuration for Match register.
void | TIM_UpdateMatchValue (LPC_TIM_TypeDef *TIMx, uint8_t MatchChannel, uint32_t MatchValue)
Update Match value.
void | TIM_SetMatchExt (LPC_TIM_TypeDef *TIMx, TIM_EXTMATCH_OPT ext_match)
void | TIM_ConfigCapture (LPC_TIM_TypeDef *TIMx, TIM_CAPTURECFG_Type *TIM_CaptureConfigStruct)
Configuration for Capture register.
void | TIM_Cmd (LPC_TIM_TypeDef *TIMx, FunctionalState NewState)
Start/Stop Timer/Counter device.
uint32_t | TIM_GetCaptureValue (LPC_TIM_TypeDef *TIMx, TIM_COUNTER_INPUT_OPT CaptureChannel)
Read value of capture register in timer/counter device.
void | TIM_ResetCounter (LPC_TIM_TypeDef *TIMx)
Reset Timer/Counter device, Make TC and PC are synchronously reset on the next positive edge of PCLK.

Detailed Description

Contains all macro definitions and function prototypes support for Timer firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_timer.h.

Generated on Mon Nov 28 2011 11:15:03 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_uart.h File Reference

Data Structures | Defines | Enumerations | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_uart.h File Reference

Contains all macro definitions and function prototypes support for UART firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | UART_AB_CFG_Type
Auto Baudrate mode configuration type definition. More...
struct | UART_CFG_Type
UART Configuration Structure definition. More...
struct | UART_FIFO_CFG_Type
UART FIFO Configuration Structure definition. More...
struct | UART1_RS485_CTRLCFG_Type
UART1 Full modem - RS485 Control configuration type. More...

Defines

#define | UART_BLOCKING_TIMEOUT (0xFFFFFFFFUL)
#define | UART_ACCEPTED_BAUDRATE_ERROR (3)
#define | UART_RBR_MASKBIT ((uint8_t)0xFF)
#define | UART_THR_MASKBIT ((uint8_t)0xFF)
#define | UART_LOAD_DLL(div) ((div) & 0xFF)
#define | UART_DLL_MASKBIT ((uint8_t)0xFF)
#define | UART_DLM_MASKBIT ((uint8_t)0xFF)
#define | UART_LOAD_DLM(div) (((div) >> 8) & 0xFF)
#define | UART_IER_RBRINT_EN ((uint32_t)(1<<0))
#define | UART_IER_THREINT_EN ((uint32_t)(1<<1))
#define | UART_IER_RLSINT_EN ((uint32_t)(1<<2))
#define | UART1_IER_MSINT_EN ((uint32_t)(1<<3))
#define | UART1_IER_CTSINT_EN ((uint32_t)(1<<7))
#define | UART_IER_ABEOINT_EN ((uint32_t)(1<<8))
#define | UART_IER_ABTOINT_EN ((uint32_t)(1<<9))
#define | UART_IER_BITMASK ((uint32_t)(0x307))
#define | UART1_IER_BITMASK ((uint32_t)(0x38F))
#define | UART_IIR_INTSTAT_PEND ((uint32_t)(1<<0))
#define | UART_IIR_INTID_RLS ((uint32_t)(3<<1))
#define | UART_IIR_INTID_RDA ((uint32_t)(2<<1))
#define | UART_IIR_INTID_CTI ((uint32_t)(6<<1))
#define | UART_IIR_INTID_THRE ((uint32_t)(1<<1))
#define | UART1_IIR_INTID_MODEM ((uint32_t)(0<<1))
#define | UART_IIR_INTID_MASK ((uint32_t)(7<<1))
#define | UART_IIR_FIFO_EN ((uint32_t)(3<<6))
#define | UART_IIR_ABEO_INT ((uint32_t)(1<<8))
#define | UART_IIR_ABTO_INT ((uint32_t)(1<<9))
#define | UART_IIR_BITMASK ((uint32_t)(0x3CF))
#define | UART_FCR_FIFO_EN ((uint8_t)(1<<0))
#define | UART_FCR_RX_RS ((uint8_t)(1<<1))
#define | UART_FCR_TX_RS ((uint8_t)(1<<2))
#define | UART_FCR_DMAMODE_SEL ((uint8_t)(1<<3))
#define | UART_FCR_TRG_LEV0 ((uint8_t)(0))
#define | UART_FCR_TRG_LEV1 ((uint8_t)(1<<6))
#define | UART_FCR_TRG_LEV2 ((uint8_t)(2<<6))
#define | UART_FCR_TRG_LEV3 ((uint8_t)(3<<6))
#define | UART_FCR_BITMASK ((uint8_t)(0xCF))
#define | UART_TX_FIFO_SIZE (16)
#define | UART_LCR_WLEN5 ((uint8_t)(0))
#define | UART_LCR_WLEN6 ((uint8_t)(1<<0))
#define | UART_LCR_WLEN7 ((uint8_t)(2<<0))
#define | UART_LCR_WLEN8 ((uint8_t)(3<<0))
#define | UART_LCR_STOPBIT_SEL ((uint8_t)(1<<2))
#define | UART_LCR_PARITY_EN ((uint8_t)(1<<3))
#define | UART_LCR_PARITY_ODD ((uint8_t)(0))
#define | UART_LCR_PARITY_EVEN ((uint8_t)(1<<4))
#define | UART_LCR_PARITY_F_1 ((uint8_t)(2<<4))
#define | UART_LCR_PARITY_F_0 ((uint8_t)(3<<4))
#define | UART_LCR_BREAK_EN ((uint8_t)(1<<6))
#define | UART_LCR_DLAB_EN ((uint8_t)(1<<7))
#define | UART_LCR_BITMASK ((uint8_t)(0xFF))
#define | UART1_MCR_DTR_CTRL ((uint8_t)(1<<0))
#define | UART1_MCR_RTS_CTRL ((uint8_t)(1<<1))
#define | UART1_MCR_LOOPB_EN ((uint8_t)(1<<4))
#define | UART1_MCR_AUTO_RTS_EN ((uint8_t)(1<<6))
#define | UART1_MCR_AUTO_CTS_EN ((uint8_t)(1<<7))
#define | UART1_MCR_BITMASK ((uint8_t)(0x0F3))
#define | UART_LSR_RDR ((uint8_t)(1<<0))
#define | UART_LSR_OE ((uint8_t)(1<<1))
#define | UART_LSR_PE ((uint8_t)(1<<2))
#define | UART_LSR_FE ((uint8_t)(1<<3))
#define | UART_LSR_BI ((uint8_t)(1<<4))
#define | UART_LSR_THRE ((uint8_t)(1<<5))
#define | UART_LSR_TEMT ((uint8_t)(1<<6))
#define | UART_LSR_RXFE ((uint8_t)(1<<7))
#define | UART_LSR_BITMASK ((uint8_t)(0xFF))
#define | UART1_MSR_DELTA_CTS ((uint8_t)(1<<0))
#define | UART1_MSR_DELTA_DSR ((uint8_t)(1<<1))
#define | UART1_MSR_LO2HI_RI ((uint8_t)(1<<2))
#define | UART1_MSR_DELTA_DCD ((uint8_t)(1<<3))
#define | UART1_MSR_CTS ((uint8_t)(1<<4))
#define | UART1_MSR_DSR ((uint8_t)(1<<5))
#define | UART1_MSR_RI ((uint8_t)(1<<6))
#define | UART1_MSR_DCD ((uint8_t)(1<<7))
#define | UART1_MSR_BITMASK ((uint8_t)(0xFF))
#define | UART_SCR_BIMASK ((uint8_t)(0xFF))
#define | UART_ACR_START ((uint32_t)(1<<0))
#define | UART_ACR_MODE ((uint32_t)(1<<1))
#define | UART_ACR_AUTO_RESTART ((uint32_t)(1<<2))
#define | UART_ACR_ABEOINT_CLR ((uint32_t)(1<<8))
#define | UART_ACR_ABTOINT_CLR ((uint32_t)(1<<9))
#define | UART_ACR_BITMASK ((uint32_t)(0x307))
#define | UART_ICR_IRDAEN ((uint32_t)(1<<0))
#define | UART_ICR_IRDAINV ((uint32_t)(1<<1))
#define | UART_ICR_FIXPULSE_EN ((uint32_t)(1<<2))
#define | UART_ICR_PULSEDIV(n) ((uint32_t)((n&0x07)<<3))
#define | UART_ICR_BITMASK ((uint32_t)(0x3F))
#define | UART_FDR_DIVADDVAL(n) ((uint32_t)(n&0x0F))
#define | UART_FDR_MULVAL(n) ((uint32_t)((n<<4)&0xF0))
#define | UART_FDR_BITMASK ((uint32_t)(0xFF))
#define | UART_TER_TXEN ((uint8_t)(1<<7))
#define | UART_TER_BITMASK ((uint8_t)(0x80))
#define | UART1_RS485CTRL_NMM_EN ((uint32_t)(1<<0))
#define | UART1_RS485CTRL_RX_DIS ((uint32_t)(1<<1))
#define | UART1_RS485CTRL_AADEN ((uint32_t)(1<<2))
#define | UART1_RS485CTRL_SEL_DTR ((uint32_t)(1<<3))
#define | UART1_RS485CTRL_DCTRL_EN ((uint32_t)(1<<4))
#define | UART1_RS485CTRL_OINV_1 ((uint32_t)(1<<5))
#define | UART1_RS485CTRL_BITMASK ((uint32_t)(0x3F))
#define | UART1_RS485ADRMATCH_BITMASK ((uint8_t)(0xFF))
#define | UART1_RS485DLY_BITMASK ((uint8_t)(0xFF))
#define | UART_FIFOLVL_RXFIFOLVL(n) ((uint32_t)(n&0x0F))
#define | UART_FIFOLVL_TXFIFOLVL(n) ((uint32_t)((n>>8)&0x0F))
#define | UART_FIFOLVL_BITMASK ((uint32_t)(0x0F0F))
#define | PARAM_UART_DATABIT(databit)
#define | PARAM_UART_STOPBIT(stopbit) ((stopbit==UART_STOPBIT_1) || (stopbit==UART_STOPBIT_2))
#define | PARAM_UART_PARITY(parity)
#define | PARAM_UART_FIFO_LEVEL(fifo)
#define | PARAM_UART_INTCFG(IntCfg)
#define | PARAM_UART1_INTCFG(IntCfg) ((IntCfg==UART1_INTCFG_MS) || (IntCfg==UART1_INTCFG_CTS))
#define | PARAM_UART_AUTOBAUD_MODE(ABmode) ((ABmode==UART_AUTOBAUD_MODE0) || (ABmode==UART_AUTOBAUD_MODE1))
#define | PARAM_UART_AUTOBAUD_INTSTAT(ABIntStat)
#define | PARAM_UART_IrDA_PULSEDIV(PulseDiv)
#define | PARAM_UART1_SIGNALSTATE(x) ((x==INACTIVE) || (x==ACTIVE))
#define | PARAM_UART1_MODEM_PIN(x) ((x==UART1_MODEM_PIN_DTR) || (x==UART1_MODEM_PIN_RTS))
#define | PARAM_UART1_MODEM_MODE(x)
#define | PARAM_UART_RS485_DIRCTRL_PIN(x) ((x==UART1_RS485_DIRCTRL_RTS) || (x==UART1_RS485_DIRCTRL_DTR))
#define | PARAM_UARTx(x)
#define | PARAM_UART_IrDA(x) (((uint32_t *)x)==((uint32_t *)LPC_UART3))
#define | PARAM_UART1_MODEM(x) (((uint32_t *)x)==((uint32_t *)LPC_UART1))
#define | PARAM_UART1_RS485_CFG_MATCHADDRVALUE(x) ((x<0xFF))
#define | PARAM_UART1_RS485_CFG_DELAYVALUE(x) ((x<0xFF))

Enumerations

enum | UART_DATABIT_Type { UART_DATABIT_5 = 0, UART_DATABIT_6, UART_DATABIT_7, UART_DATABIT_8 }
UART Databit type definitions. More...
enum | UART_STOPBIT_Type { UART_STOPBIT_1 = (0), UART_STOPBIT_2 }
UART Stop bit type definitions. More...
enum UART_PARITY_Type {
UART_PARITY_NONE = 0, UART_PARITY_ODD, UART_PARITY_EVEN, UART_PARITY_SP_1,
UART_PARITY_SP_0
}
UART Parity type definitions. More...
enum | UART_FITO_LEVEL_Type { UART_FIFO_TRGLEV0 = 0, UART_FIFO_TRGLEV1, UART_FIFO_TRGLEV2, UART_FIFO_TRGLEV3 }
FIFO Level type definitions. More...
enum UART_INT_Type {
UART_INTCFG_RBR = 0, UART_INTCFG_THRE, UART_INTCFG_RLS, UART1_INTCFG_MS,
UART1_INTCFG_CTS, UART_INTCFG_ABEO, UART_INTCFG_ABTO
}
UART Interrupt Type definitions. More...
enum UART_LS_Type {
UART_LINESTAT_RDR = UART_LSR_RDR, UART_LINESTAT_OE = UART_LSR_OE, UART_LINESTAT_PE = UART_LSR_PE, UART_LINESTAT_FE = UART_LSR_FE,
UART_LINESTAT_BI = UART_LSR_BI, UART_LINESTAT_THRE = UART_LSR_THRE, UART_LINESTAT_TEMT = UART_LSR_TEMT, UART_LINESTAT_RXFE = UART_LSR_RXFE
}
UART Line Status Type definition. More...
enum | UART_AB_MODE_Type { UART_AUTOBAUD_MODE0 = 0, UART_AUTOBAUD_MODE1 }
UART Auto-baudrate mode type definition. More...
enum | UART_ABEO_Type { UART_AUTOBAUD_INTSTAT_ABEO = UART_IIR_ABEO_INT, UART_AUTOBAUD_INTSTAT_ABTO = UART_IIR_ABTO_INT }
UART End of Auto-baudrate type definition. More...
enum UART_IrDA_PULSE_Type {
UART_IrDA_PULSEDIV2 = 0, UART_IrDA_PULSEDIV4, UART_IrDA_PULSEDIV8, UART_IrDA_PULSEDIV16,
UART_IrDA_PULSEDIV32, UART_IrDA_PULSEDIV64, UART_IrDA_PULSEDIV128, UART_IrDA_PULSEDIV256
}
enum | UART1_SignalState { INACTIVE = 0, ACTIVE = !INACTIVE }
UART1 Full modem - Signal states definition. More...
enum UART_MODEM_STAT_type {
UART1_MODEM_STAT_DELTA_CTS = UART1_MSR_DELTA_CTS, UART1_MODEM_STAT_DELTA_DSR = UART1_MSR_DELTA_DSR, UART1_MODEM_STAT_LO2HI_RI = UART1_MSR_LO2HI_RI, UART1_MODEM_STAT_DELTA_DCD = UART1_MSR_DELTA_DCD,
UART1_MODEM_STAT_CTS = UART1_MSR_CTS, UART1_MODEM_STAT_DSR = UART1_MSR_DSR, UART1_MODEM_STAT_RI = UART1_MSR_RI, UART1_MODEM_STAT_DCD = UART1_MSR_DCD
}
UART modem status type definition. More...
enum | UART_MODEM_PIN_Type { UART1_MODEM_PIN_DTR = 0, UART1_MODEM_PIN_RTS }
Modem output pin type definition. More...
enum | UART_MODEM_MODE_Type { UART1_MODEM_MODE_LOOPBACK = 0, UART1_MODEM_MODE_AUTO_RTS, UART1_MODEM_MODE_AUTO_CTS }
UART Modem mode type definition. More...
enum | UART_RS485_DIRCTRL_PIN_Type { UART1_RS485_DIRCTRL_RTS = 0, UART1_RS485_DIRCTRL_DTR }
UART Direction Control Pin type definition. More...

Functions

void | UART_Init (LPC_UART_TypeDef *UARTx, UART_CFG_Type *UART_ConfigStruct)
Initializes the UARTx peripheral according to the specified parameters in the UART_ConfigStruct.
void | UART_DeInit (LPC_UART_TypeDef *UARTx)
De-initializes the UARTx peripheral registers to their default reset values.
void | UART_ConfigStructInit (UART_CFG_Type *UART_InitStruct)
Fills each UART_InitStruct member with its default value:
void | UART_SendByte (LPC_UART_TypeDef *UARTx, uint8_t Data)
Transmit a single data through UART peripheral.
uint8_t | UART_ReceiveByte (LPC_UART_TypeDef *UARTx)
Receive a single data from UART peripheral.
uint32_t | UART_Send (LPC_UART_TypeDef *UARTx, uint8_t *txbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
Send a block of data via UART peripheral.
uint32_t | UART_Receive (LPC_UART_TypeDef *UARTx, uint8_t *rxbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
Receive a block of data via UART peripheral.
void | UART_FIFOConfig (LPC_UART_TypeDef *UARTx, UART_FIFO_CFG_Type *FIFOCfg)
Configure FIFO function on selected UART peripheral.
void | UART_FIFOConfigStructInit (UART_FIFO_CFG_Type *UART_FIFOInitStruct)
Fills each UART_FIFOInitStruct member with its default value:
uint32_t | UART_GetIntId (LPC_UART_TypeDef *UARTx)
Get Interrupt Identification value.
uint8_t | UART_GetLineStatus (LPC_UART_TypeDef *UARTx)
Get current value of Line Status register in UART peripheral.
void | UART_IntConfig (LPC_UART_TypeDef *UARTx, UART_INT_Type UARTIntCfg, FunctionalState NewState)
Enable or disable specified UART interrupt.
void | UART_TxCmd (LPC_UART_TypeDef *UARTx, FunctionalState NewState)
Enable/Disable transmission on UART TxD pin.
FlagStatus | UART_CheckBusy (LPC_UART_TypeDef *UARTx)
Check whether if UART is busy or not.
void | UART_ForceBreak (LPC_UART_TypeDef *UARTx)
Force BREAK character on UART line, output pin UARTx TXD is forced to logic 0.
void | UART_ABClearIntPending (LPC_UART_TypeDef *UARTx, UART_ABEO_Type ABIntType)
Clear Autobaud Interrupt Pending.
void | UART_ABCmd (LPC_UART_TypeDef *UARTx, UART_AB_CFG_Type *ABConfigStruct, FunctionalState NewState)
Start/Stop Auto Baudrate activity.
void | UART_FullModemForcePinState (LPC_UART1_TypeDef *UARTx, UART_MODEM_PIN_Type Pin, UART1_SignalState NewState)
Force pin DTR/RTS corresponding to given state (Full modem mode)
void | UART_FullModemConfigMode (LPC_UART1_TypeDef *UARTx, UART_MODEM_MODE_Type Mode, FunctionalState NewState)
Configure Full Modem mode for UART peripheral.
uint8_t | UART_FullModemGetStatus (LPC_UART1_TypeDef *UARTx)
Get current status of modem status register.
void | UART_RS485Config (LPC_UART1_TypeDef *UARTx, UART1_RS485_CTRLCFG_Type *RS485ConfigStruct)
Configure UART peripheral in RS485 mode according to the specified parameters in the RS485ConfigStruct.
void | UART_RS485ReceiverCmd (LPC_UART1_TypeDef *UARTx, FunctionalState NewState)
Enable/Disable receiver in RS485 module in UART1.
void | UART_RS485SendSlvAddr (LPC_UART1_TypeDef *UARTx, uint8_t SlvAddr)
Send Slave address frames on RS485 bus.
uint32_t | UART_RS485SendData (LPC_UART1_TypeDef *UARTx, uint8_t *pData, uint32_t size)
Send Data frames on RS485 bus.
void | UART_IrDAInvtInputCmd (LPC_UART_TypeDef *UARTx, FunctionalState NewState)
Enable or disable inverting serial input function of IrDA on UART peripheral.
void | UART_IrDACmd (LPC_UART_TypeDef *UARTx, FunctionalState NewState)
Enable or disable IrDA function on UART peripheral.
void | UART_IrDAPulseDivConfig (LPC_UART_TypeDef *UARTx, UART_IrDA_PULSE_Type PulseDiv)
Configure Pulse divider for IrDA function on UART peripheral.

Detailed Description

Contains all macro definitions and function prototypes support for UART firmware library on LPC17xx.

Version:
3.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_uart.h.

Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_wdt.h File Reference

Defines | Enumerations | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_wdt.h File Reference

Contains all macro definitions and function prototypes support for WDT firmware library on LPC17xx. More...

#include "LPC17xx.h"
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | WDT_WDMOD_WDEN ((uint32_t)(1<<0))
#define | WDT_WDMOD_WDRESET ((uint32_t)(1<<1))
#define | WDT_WDMOD_WDTOF ((uint32_t)(1<<2))
#define | WDT_WDMOD_WDINT ((uint32_t)(1<<3))
#define | WDT_WDMOD(n) ((uint32_t)(1<<1))
#define | WDT_US_INDEX ((uint32_t)(1000000))
#define | WDT_TIMEOUT_MIN ((uint32_t)(0xFF))
#define | WDT_TIMEOUT_MAX ((uint32_t)(0xFFFFFFFF))
#define | WDT_WDMOD_MASK (uint8_t)(0x02)
#define | WDT_WDTC_MASK (uint8_t)(0xFFFFFFFF)
#define | WDT_WDFEED_MASK (uint8_t)(0x000000FF)
#define | WDT_WDCLKSEL_MASK (uint8_t)(0x03)
#define | WDT_WDCLKSEL_RC (uint8_t)(0x00)
#define | WDT_WDCLKSEL_PCLK (uint8_t)(0x01)
#define | WDT_WDCLKSEL_RTC (uint8_t)(0x02)
#define | PARAM_WDT_CLK_OPT(OPTION)
#define | PARAM_WDT_MODE_OPT(OPTION) ((OPTION ==WDT_MODE_INT_ONLY)||(OPTION ==WDT_MODE_RESET))

Enumerations

enum | WDT_CLK_OPT { WDT_CLKSRC_IRC = 0, WDT_CLKSRC_PCLK = 1, WDT_CLKSRC_RTC = 2 }
Clock source option for WDT. More...
enum | WDT_MODE_OPT { WDT_MODE_INT_ONLY = 0, WDT_MODE_RESET = 1 }
WDT operation mode. More...

Functions

void | WDT_Init (WDT_CLK_OPT ClkSrc, WDT_MODE_OPT WDTMode)
Initial for Watchdog function Clock source = RTC ,.
void | WDT_Start (uint32_t TimeOut)
Start WDT activity with given timeout value.
void | WDT_Feed (void)
After set WDTEN, call this function to start Watchdog or reload the Watchdog timer.
void | WDT_UpdateTimeOut (uint32_t TimeOut)
Update WDT timeout value and feed.
FlagStatus | WDT_ReadTimeOutFlag (void)
Read WDT Time out flag.
void | WDT_ClrTimeOutFlag (void)
Clear WDT Time out flag.
uint32_t | WDT_GetCurrentCount (void)
Get the current value of WDT.

Detailed Description

Contains all macro definitions and function prototypes support for WDT firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_wdt.h.

Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc_types.h File Reference

Defines | Typedefs | Enumerations
C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc_types.h File Reference

Contains the NXP ABL typedefs for C standard types. It is intended to be used in ISO C conforming development environments and checks for this insofar as it is possible to do so. More...

#include <stdint.h>

Go to the source code of this file.

Defines

#define | PARAM_SETSTATE(State) ((State==RESET) || (State==SET))
#define | PARAM_FUNCTIONALSTATE(State) ((State==DISABLE) || (State==ENABLE))
#define | _BIT(n) (1<<n)
#define | _SBF(f, v) (v<<f)
#define | _BITMASK(field_width) ( _BIT(field_width) - 1)
#define | NULL ((void*) 0)
#define | NELEMENTS(array) (sizeof (array) / sizeof (array[0]))
#define | STATIC static
#define | EXTERN extern
#define | MAX(a, b) (((a) > (b)) ? (a) : (b))
#define | MIN(a, b) (((a) < (b)) ? (a) : (b))

Typedefs

typedef enum FlagStatus | IntStatus
typedef enum FlagStatus | SetState
typedef void(* | PFV )()
typedef int32_t(* | PFI )()
typedef char | CHAR
typedef uint8_t | UNS_8
typedef int8_t | INT_8
typedef uint16_t | UNS_16
typedef int16_t | INT_16
typedef uint32_t | UNS_32
typedef int32_t | INT_32
typedef int64_t | INT_64
typedef uint64_t | UNS_64
typedef Bool | BOOL_32
typedef Bool | BOOL_16
typedef Bool | BOOL_8

Enumerations

enum | Bool { FALSE = 0, TRUE = !FALSE }
Boolean Type definition. More...
enum | FlagStatus { RESET = 0, SET = !RESET }
Flag Status and Interrupt Flag Status type definition. More...
enum | FunctionalState { DISABLE = 0, ENABLE = !DISABLE }
Functional State Definition. More...
enum | Status { ERROR = 0, SUCCESS = !ERROR }
enum | TRANSFER_BLOCK_Type { NONE_BLOCKING = 0, BLOCKING }

Detailed Description

Contains the NXP ABL typedefs for C standard types. It is intended to be used in ISO C conforming development environments and checks for this insofar as it is possible to do so.

Version:
2.0
Date:
27 July. 2008
Author:
NXP MCU SW Application Team

Copyright(C) 2008, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc_types.h.

Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/debug_frmwrk.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Drivers/source/debug_frmwrk.c File Reference

Contains some utilities that used for debugging through UART. More...

#include "debug_frmwrk.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | UARTPutChar (LPC_UART_TypeDef *UARTx, uint8_t ch)
Puts a character to UART port.
uint8_t | UARTGetChar (LPC_UART_TypeDef *UARTx)
Get a character to UART port.
void | UARTPuts (LPC_UART_TypeDef *UARTx, const void *str)
Puts a string to UART port.
void | UARTPuts_ (LPC_UART_TypeDef *UARTx, const void *str)
Puts a string to UART port and print new line.
void | UARTPutDec (LPC_UART_TypeDef *UARTx, uint8_t decnum)
Puts a decimal number to UART port.
void | UARTPutDec16 (LPC_UART_TypeDef *UARTx, uint16_t decnum)
Puts a decimal number to UART port.
void | UARTPutDec32 (LPC_UART_TypeDef *UARTx, uint32_t decnum)
Puts a decimal number to UART port.
void | UARTPutHex (LPC_UART_TypeDef *UARTx, uint8_t hexnum)
Puts a hex number to UART port.
void | UARTPutHex16 (LPC_UART_TypeDef *UARTx, uint16_t hexnum)
Puts a hex number to UART port.
void | UARTPutHex32 (LPC_UART_TypeDef *UARTx, uint32_t hexnum)
Puts a hex number to UART port.
void | debug_frmwrk_init (void)
*********************************************************************//**

Variables

void(* | _db_msg )(LPC_UART_TypeDef *UARTx, const void *s)
void(* | _db_msg_ )(LPC_UART_TypeDef *UARTx, const void *s)
void(* | _db_char )(LPC_UART_TypeDef *UARTx, uint8_t ch)
void(* | _db_dec )(LPC_UART_TypeDef *UARTx, uint8_t decn)
void(* | _db_dec_16 )(LPC_UART_TypeDef *UARTx, uint16_t decn)
void(* | _db_dec_32 )(LPC_UART_TypeDef *UARTx, uint32_t decn)
void(* | _db_hex )(LPC_UART_TypeDef *UARTx, uint8_t hexn)
void(* | _db_hex_16 )(LPC_UART_TypeDef *UARTx, uint16_t hexn)
void(* | _db_hex_32 )(LPC_UART_TypeDef *UARTx, uint32_t hexn)
uint8_t(* | _db_get_char )(LPC_UART_TypeDef *UARTx)

Detailed Description

Contains some utilities that used for debugging through UART.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file debug_frmwrk.c.

Function Documentation

void debug_frmwrk_init ( void )

*********************************************************************//**

Initialize Debug frame work through initializing UART port

Parameters:
[in] None
Returns:
None

Definition at line 253 of file debug_frmwrk.c.

uint8_t UARTGetChar ( LPC_UART_TypeDef * UARTx )

Get a character to UART port.

Parameters:
[in] UARTx Pointer to UART peripheral
Returns:
character value that returned

Definition at line 71 of file debug_frmwrk.c.

void UARTPutChar | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint8_t | ch
 | ) |  |

Puts a character to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | ch | Character to put
Returns:
None

Definition at line 60 of file debug_frmwrk.c.

void UARTPutDec | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint8_t | decnum
 | ) |  |

Puts a decimal number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | decnum | Decimal number (8-bit long)
Returns:
None

Definition at line 115 of file debug_frmwrk.c.

void UARTPutDec16 | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint16_t | decnum
 | ) |  |

Puts a decimal number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | decnum | Decimal number (8-bit long)
Returns:
None

Definition at line 131 of file debug_frmwrk.c.

void UARTPutDec32 | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint32_t | decnum
 | ) |  |

Puts a decimal number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | decnum | Decimal number (8-bit long)
Returns:
None

Definition at line 151 of file debug_frmwrk.c.

void UARTPutHex | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint8_t | hexnum
 | ) |  |

Puts a hex number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | hexnum | Hex number (8-bit long)
Returns:
None

Definition at line 181 of file debug_frmwrk.c.

void UARTPutHex16 | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint16_t | hexnum
 | ) |  |

Puts a hex number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | hexnum | Hex number (16-bit long)
Returns:
None

Definition at line 200 of file debug_frmwrk.c.

void UARTPutHex32 | ( | LPC_UART_TypeDef * | UARTx,
 |  | uint32_t | hexnum
 | ) |  |

Puts a hex number to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | hexnum | Hex number (32-bit long)
Returns:
None

Definition at line 218 of file debug_frmwrk.c.

void UARTPuts | ( | LPC_UART_TypeDef * | UARTx,
 |  | const void * | str
 | ) |  |

Puts a string to UART port.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | str | string to put
Returns:
None

Definition at line 85 of file debug_frmwrk.c.

void UARTPuts_ | ( | LPC_UART_TypeDef * | UARTx,
 |  | const void * | str
 | ) |  |

Puts a string to UART port and print new line.

Parameters:
[in] | UARTx | Pointer to UART peripheral
[in] | str | String to put
Returns:
None

Definition at line 102 of file debug_frmwrk.c.

Variable Documentation

void(* _db_char)(LPC_UART_TypeDef *UARTx, uint8_t ch)

Definition at line 44 of file debug_frmwrk.c.

void(* _db_dec)(LPC_UART_TypeDef *UARTx, uint8_t decn)

Definition at line 45 of file debug_frmwrk.c.

void(* _db_dec_16)(LPC_UART_TypeDef *UARTx, uint16_t decn)

Definition at line 46 of file debug_frmwrk.c.

void(* _db_dec_32)(LPC_UART_TypeDef *UARTx, uint32_t decn)

Definition at line 47 of file debug_frmwrk.c.

uint8_t(* _db_get_char)(LPC_UART_TypeDef *UARTx)

Definition at line 51 of file debug_frmwrk.c.

void(* _db_hex)(LPC_UART_TypeDef *UARTx, uint8_t hexn)

Definition at line 48 of file debug_frmwrk.c.

void(* _db_hex_16)(LPC_UART_TypeDef *UARTx, uint16_t hexn)

Definition at line 49 of file debug_frmwrk.c.

void(* _db_hex_32)(LPC_UART_TypeDef *UARTx, uint32_t hexn)

Definition at line 50 of file debug_frmwrk.c.

void(* _db_msg)(LPC_UART_TypeDef *UARTx, const void *s)

Definition at line 42 of file debug_frmwrk.c.

void(* _db_msg_)(LPC_UART_TypeDef *UARTx, const void *s)

Definition at line 43 of file debug_frmwrk.c.

Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_adc.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_adc.c File Reference

Contains all functions support for ADC firmware library on LPC17xx. More...

#include "lpc17xx_adc.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | ADC_Init (LPC_ADC_TypeDef *ADCx, uint32_t rate)
Initial for ADC + Set bit PCADC + Set clock for ADC + Set Clock Frequency.
void | ADC_DeInit (LPC_ADC_TypeDef *ADCx)
Close ADC.
uint32_t | ADC_GetData (uint32_t channel)
Get Result conversion from A/D data register.
void | ADC_StartCmd (LPC_ADC_TypeDef *ADCx, uint8_t start_mode)
Set start mode for ADC.
void | ADC_BurstCmd (LPC_ADC_TypeDef *ADCx, FunctionalState NewState)
ADC Burst mode setting.
void | ADC_PowerdownCmd (LPC_ADC_TypeDef *ADCx, FunctionalState NewState)
Set AD conversion in power mode.
void | ADC_EdgeStartConfig (LPC_ADC_TypeDef *ADCx, uint8_t EdgeOption)
Set Edge start configuration.
void | ADC_IntConfig (LPC_ADC_TypeDef *ADCx, ADC_TYPE_INT_OPT IntType, FunctionalState NewState)
ADC interrupt configuration.
void | ADC_ChannelCmd (LPC_ADC_TypeDef *ADCx, uint8_t Channel, FunctionalState NewState)
Enable/Disable ADC channel number.
uint16_t | ADC_ChannelGetData (LPC_ADC_TypeDef *ADCx, uint8_t channel)
Get ADC result.
FlagStatus | ADC_ChannelGetStatus (LPC_ADC_TypeDef *ADCx, uint8_t channel, uint32_t StatusType)
Get ADC Chanel status from ADC data register.
uint32_t | ADC_GlobalGetData (LPC_ADC_TypeDef *ADCx)
Get ADC Data from AD Global register.
FlagStatus | ADC_GlobalGetStatus (LPC_ADC_TypeDef *ADCx, uint32_t StatusType)
Get ADC Chanel status from AD global data register.

Detailed Description

Contains all functions support for ADC firmware library on LPC17xx.

Version:
3.1
Date:
26. July. 2011
Author:
NXP MCU SW Application Team

Copyright(C) 2011, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_adc.c.

Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_can.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_can.c File Reference

Contains all functions support for CAN firmware library on LPC17xx. More...

#include "lpc17xx_can.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | CAN_Init (LPC_CAN_TypeDef *CANx, uint32_t baudrate)
Initialize CAN peripheral with given baudrate.
void | CAN_DeInit (LPC_CAN_TypeDef *CANx)
CAN deInit.
CAN_ERROR | CAN_SetupAFLUT (LPC_CANAF_TypeDef *CANAFx, AF_SectionDef *AFSection)
Setup Acceptance Filter Look-Up Table.
CAN_ERROR | CAN_LoadExplicitEntry (LPC_CAN_TypeDef *CANx, uint32_t id, CAN_ID_FORMAT_Type format)
Add Explicit ID into AF Look-Up Table dynamically.
CAN_ERROR | CAN_LoadFullCANEntry (LPC_CAN_TypeDef *CANx, uint16_t id)
Load FullCAN entry into AFLUT.
CAN_ERROR | CAN_LoadGroupEntry (LPC_CAN_TypeDef *CANx, uint32_t lowerID, uint32_t upperID, CAN_ID_FORMAT_Type format)
Load Group entry into AFLUT.
CAN_ERROR | CAN_RemoveEntry (AFLUT_ENTRY_Type EntryType, uint16_t position)
Remove AFLUT entry (FullCAN entry and Explicit Standard entry)
Status | CAN_SendMsg (LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg)
Send message data.
Status | CAN_ReceiveMsg (LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg)
Receive message data.
CAN_ERROR | FCAN_ReadObj (LPC_CANAF_TypeDef *CANAFx, CAN_MSG_Type *CAN_Msg)
Receive FullCAN Object.
uint32_t | CAN_GetCTRLStatus (LPC_CAN_TypeDef *CANx, CAN_CTRL_STS_Type arg)
Get CAN Control Status.
uint32_t | CAN_GetCRStatus (LPC_CANCR_TypeDef *CANCRx, CAN_CR_STS_Type arg)
Get CAN Central Status.
void | CAN_IRQCmd (LPC_CAN_TypeDef *CANx, CAN_INT_EN_Type arg, FunctionalState NewState)
Enable/Disable CAN Interrupt.
void | CAN_SetAFMode (LPC_CANAF_TypeDef *CANAFx, CAN_AFMODE_Type AFMode)
Setting Acceptance Filter mode.
void | CAN_ModeConfig (LPC_CAN_TypeDef *CANx, CAN_MODE_Type mode, FunctionalState NewState)
Enable/Disable CAN Mode.
void | CAN_SetCommand (LPC_CAN_TypeDef *CANx, uint32_t CMRType)
Set CAN command request.
uint32_t | CAN_IntGetStatus (LPC_CAN_TypeDef *CANx)
Get CAN interrupt status.
IntStatus | CAN_FullCANIntGetStatus (LPC_CANAF_TypeDef *CANAFx)
Check if FullCAN interrupt enable or not.
uint32_t | CAN_FullCANPendGetStatus (LPC_CANAF_TypeDef *CANAFx, FullCAN_IC_Type type)
Get value of FullCAN interrupt and capture register.

Variables

FunctionalState FULLCAN_ENABLE
uint16_t | CANAF_FullCAN_cnt = 0
uint16_t | CANAF_std_cnt = 0
uint16_t | CANAF_gstd_cnt = 0
uint16_t | CANAF_ext_cnt = 0
uint16_t | CANAF_gext_cnt = 0

Detailed Description

Contains all functions support for CAN firmware library on LPC17xx.

Version:
3.3
Date:
09. March. 2011
Author:
NXP MCU SW Application Team

Copyright(C) 2011, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_can.c.

Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_clkpwr.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_clkpwr.c File Reference

Contains all functions support for Clock and Power Control firmware library on LPC17xx. More...

#include "lpc17xx_clkpwr.h"

Go to the source code of this file.

Functions

void | CLKPWR_SetPCLKDiv (uint32_t ClkType, uint32_t DivVal)
Set value of each Peripheral Clock Selection.
uint32_t | CLKPWR_GetPCLKSEL (uint32_t ClkType)
Get current value of each Peripheral Clock Selection.
uint32_t | CLKPWR_GetPCLK (uint32_t ClkType)
Get current value of each Peripheral Clock.
void | CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState)
Configure power supply for each peripheral according to NewState.
void | CLKPWR_Sleep (void)
Enter Sleep mode with co-operated instruction by the Cortex-M3.
void | CLKPWR_DeepSleep (void)
Enter Deep Sleep mode with co-operated instruction by the Cortex-M3.
void | CLKPWR_PowerDown (void)
Enter Power Down mode with co-operated instruction by the Cortex-M3.
void | CLKPWR_DeepPowerDown (void)
Enter Deep Power Down mode with co-operated instruction by the Cortex-M3.

Detailed Description

Contains all functions support for Clock and Power Control firmware library on LPC17xx.

Version:
3.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_clkpwr.c.

Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_dac.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_dac.c File Reference

Contains all functions support for DAC firmware library on LPC17xx. More...

#include "lpc17xx_dac.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | DAC_Init (LPC_DAC_TypeDef *DACx)
Initial ADC configuration.
void | DAC_UpdateValue (LPC_DAC_TypeDef *DACx, uint32_t dac_value)
Update value to DAC.
void | DAC_SetBias (LPC_DAC_TypeDef *DACx, uint32_t bias)
Set Maximum current for DAC.
void | DAC_ConfigDAConverterControl (LPC_DAC_TypeDef *DACx, DAC_CONVERTER_CFG_Type *DAC_ConverterConfigStruct)
To enable the DMA operation and control DMA timer.
void | DAC_SetDMATimeOut (LPC_DAC_TypeDef *DACx, uint32_t time_out)
Set reload value for interrupt/DMA counter.

Detailed Description

Contains all functions support for DAC firmware library on LPC17xx.

Contains all functions support for Ethernet MAC firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_dac.c.

Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_emac.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_emac.c File Reference
#include "lpc17xx_emac.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

Status | EMAC_Init (EMAC_CFG_Type *EMAC_ConfigStruct)
Initializes the EMAC peripheral according to the specified parameters in the EMAC_ConfigStruct.
void | EMAC_DeInit (void)
De-initializes the EMAC peripheral registers to their default reset values.
int32_t | EMAC_CheckPHYStatus (uint32_t ulPHYState)
Check specified PHY status in EMAC peripheral.
int32_t | EMAC_SetPHYMode (uint32_t ulPHYMode)
Set specified PHY mode in EMAC peripheral.
int32_t | EMAC_UpdatePHYStatus (void)
Auto-Configures value for the EMAC configuration register to match with current PHY mode.
void | EMAC_SetHashFilter (uint8_t dstMAC_addr[], FunctionalState NewState)
Enable/Disable hash filter functionality for specified destination MAC address in EMAC module.
void | EMAC_SetFilterMode (uint32_t ulFilterMode, FunctionalState NewState)
Enable/Disable Filter mode for each specified type EMAC peripheral.
FlagStatus | EMAC_GetWoLStatus (uint32_t ulWoLMode)
Get status of Wake On LAN Filter for each specified type in EMAC peripheral, clear this status if it is set.
void | EMAC_WritePacketBuffer (EMAC_PACKETBUF_Type *pDataStruct)
Write data to Tx packet data buffer at current index due to TxProduceIndex.
void | EMAC_ReadPacketBuffer (EMAC_PACKETBUF_Type *pDataStruct)
Read data from Rx packet data buffer at current index due to RxConsumeIndex.
void | EMAC_IntCmd (uint32_t ulIntType, FunctionalState NewState)
Enable/Disable interrupt for each type in EMAC.
IntStatus | EMAC_IntGetStatus (uint32_t ulIntType)
Check whether if specified interrupt flag is set or not for each interrupt type in EMAC and clear interrupt pending if it is set.
Bool | EMAC_CheckReceiveIndex (void)
Check whether if the current RxConsumeIndex is not equal to the current RxProduceIndex.
Bool | EMAC_CheckTransmitIndex (void)
Check whether if the current TxProduceIndex is not equal to the current RxProduceIndex - 1.
FlagStatus | EMAC_CheckReceiveDataStatus (uint32_t ulRxStatType)
Get current status value of receive data (due to RxConsumeIndex)
uint32_t | EMAC_GetReceiveDataSize (void)
Get size of current Received data in received buffer (due to RxConsumeIndex)
void | EMAC_UpdateRxConsumeIndex (void)
Increase the RxConsumeIndex (after reading the Receive buffer to release the Receive buffer) and wrap-around the index if it reaches the maximum Receive Number.
void | EMAC_UpdateTxProduceIndex (void)
Increase the TxProduceIndex (after writting to the Transmit buffer to enable the Transmit buffer) and wrap-around the index if it reaches the maximum Transmit Number.

Variables

const uint8_t | EMAC_clkdiv [] = { 4, 6, 8, 10, 14, 20, 28, 36, 40, 44, 48, 52, 56, 60, 64}
Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_exti.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_exti.c File Reference

Contains all functions support for External interrupt firmware library on LPC17xx. More...

#include "lpc17xx_exti.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | EXTI_Init (void)
Initial for EXT.
void | EXTI_DeInit (void)
Close EXT.
void | EXTI_Config (EXTI_InitTypeDef *EXTICfg)
Configuration for EXT.
void | EXTI_SetMode (EXTI_LINE_ENUM EXTILine, EXTI_MODE_ENUM mode)
Set mode for EXTI pin.
void | EXTI_SetPolarity (EXTI_LINE_ENUM EXTILine, EXTI_POLARITY_ENUM polarity)
Set polarity for EXTI pin.
void | EXTI_ClearEXTIFlag (EXTI_LINE_ENUM EXTILine)
Clear External interrupt flag.

Detailed Description

Contains all functions support for External interrupt firmware library on LPC17xx.

Version:
3.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_exti.c.

Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_gpdma.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_gpdma.c File Reference

Contains all functions support for GPDMA firmware library on LPC17xx. More...

#include "lpc17xx_gpdma.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | GPDMA_Init (void)
Initialize GPDMA controller.
Status | GPDMA_Setup (GPDMA_Channel_CFG_Type *GPDMAChannelConfig)
Setup GPDMA channel peripheral according to the specified parameters in the GPDMAChannelConfig.
void | GPDMA_ChannelCmd (uint8_t channelNum, FunctionalState NewState)
Enable/Disable DMA channel.
IntStatus | GPDMA_IntGetStatus (GPDMA_Status_Type type, uint8_t channel)
Check if corresponding channel does have an active interrupt request or not.
void | GPDMA_ClearIntPending (GPDMA_StateClear_Type type, uint8_t channel)
Clear one or more interrupt requests on DMA channels.

Variables

volatile const void * | GPDMA_LUTPerAddr []
Lookup Table of Connection Type matched with Peripheral Data (FIFO) register base address.
const LPC_GPDMACH_TypeDef * | pGPDMACh [8]
Lookup Table of GPDMA Channel Number matched with GPDMA channel pointer.
const uint8_t | GPDMA_LUTPerBurst []
Optimized Peripheral Source and Destination burst size.
const uint8_t | GPDMA_LUTPerWid []
Optimized Peripheral Source and Destination transfer width.

Detailed Description

Contains all functions support for GPDMA firmware library on LPC17xx.

Version:
2.1
Date:
25. July. 2011
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_gpdma.c.

Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_gpio.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_gpio.c File Reference

Contains all functions support for GPIO firmware library on LPC17xx. More...

#include "lpc17xx_gpio.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | GPIO_SetDir (uint8_t portNum, uint32_t bitValue, uint8_t dir)
Set Direction for GPIO port.
void | GPIO_SetValue (uint8_t portNum, uint32_t bitValue)
Set Value for bits that have output direction on GPIO port.
void | GPIO_ClearValue (uint8_t portNum, uint32_t bitValue)
Clear Value for bits that have output direction on GPIO port.
uint32_t | GPIO_ReadValue (uint8_t portNum)
Read Current state on port pin that have input direction of GPIO.
void | GPIO_IntCmd (uint8_t portNum, uint32_t bitValue, uint8_t edgeState)
Enable GPIO interrupt (just used for P0.0-P0.30, P2.0-P2.13)
FunctionalState | GPIO_GetIntStatus (uint8_t portNum, uint32_t pinNum, uint8_t edgeState)
Get GPIO Interrupt Status (just used for P0.0-P0.30, P2.0-P2.13)
void | GPIO_ClearInt (uint8_t portNum, uint32_t bitValue)
Clear GPIO interrupt (just used for P0.0-P0.30, P2.0-P2.13)
void | FIO_SetDir (uint8_t portNum, uint32_t bitValue, uint8_t dir)
The same with GPIO_SetDir()
void | FIO_SetValue (uint8_t portNum, uint32_t bitValue)
The same with GPIO_SetValue()
void | FIO_ClearValue (uint8_t portNum, uint32_t bitValue)
The same with GPIO_ClearValue()
uint32_t | FIO_ReadValue (uint8_t portNum)
The same with GPIO_ReadValue()
void | FIO_IntCmd (uint8_t portNum, uint32_t bitValue, uint8_t edgeState)
The same with GPIO_IntCmd()
FunctionalState | FIO_GetIntStatus (uint8_t portNum, uint32_t pinNum, uint8_t edgeState)
The same with GPIO_GetIntStatus()
void | FIO_ClearInt (uint8_t portNum, uint32_t bitValue)
The same with GPIO_ClearInt()
void | FIO_SetMask (uint8_t portNum, uint32_t bitValue, uint8_t maskValue)
Set mask value for bits in FIO port.
void | FIO_HalfWordSetDir (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t dir)
Set direction for FIO port in halfword accessible style.
void | FIO_HalfWordSetMask (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t maskValue)
Set mask value for bits in FIO port in halfword accessible style.
void | FIO_HalfWordSetValue (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue)
Set bits for FIO port in halfword accessible style.
void | FIO_HalfWordClearValue (uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue)
Clear bits for FIO port in halfword accessible style.
uint16_t | FIO_HalfWordReadValue (uint8_t portNum, uint8_t halfwordNum)
Read Current state on port pin that have input direction of GPIO in halfword accessible style.
void | FIO_ByteSetDir (uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t dir)
Set direction for FIO port in byte accessible style.
void | FIO_ByteSetMask (uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t maskValue)
Set mask value for bits in FIO port in byte accessible style.
void | FIO_ByteSetValue (uint8_t portNum, uint8_t byteNum, uint8_t bitValue)
Set bits for FIO port in byte accessible style.
void | FIO_ByteClearValue (uint8_t portNum, uint8_t byteNum, uint8_t bitValue)
Clear bits for FIO port in byte accessible style.
uint8_t | FIO_ByteReadValue (uint8_t portNum, uint8_t byteNum)
Read Current state on port pin that have input direction of GPIO in byte accessible style.

Detailed Description

Contains all functions support for GPIO firmware library on LPC17xx.

Contains all functions support for I2S firmware library on LPC17xx.

Contains all functions support for I2C firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Version:
2.1
Date:
31. Mar. 2011
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Version:
3.1
Date:
23. Sep. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_gpio.c.

Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2c.c File Reference

Data Structures | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2c.c File Reference
#include "lpc17xx_i2c.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Data Structures

struct | I2C_CFG_T
I2C device configuration structure type. More...

Functions

void | I2C_Init (LPC_I2C_TypeDef *I2Cx, uint32_t clockrate)
Initializes the I2Cx peripheral with specified parameter.
void | I2C_DeInit (LPC_I2C_TypeDef *I2Cx)
De-initializes the I2C peripheral registers to their default reset values.
void | I2C_Cmd (LPC_I2C_TypeDef *I2Cx, FunctionalState NewState)
Enable or disable I2C peripheral's operation.
void | I2C_IntCmd (LPC_I2C_TypeDef *I2Cx, Bool NewState)
Enable/Disable interrupt for I2C peripheral.
void | I2C_MasterHandler (LPC_I2C_TypeDef *I2Cx)
General Master Interrupt handler for I2C peripheral.
void | I2C_SlaveHandler (LPC_I2C_TypeDef *I2Cx)
General Slave Interrupt handler for I2C peripheral.
Status | I2C_MasterTransferData (LPC_I2C_TypeDef *I2Cx, I2C_M_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt)
Transmit and Receive data in master mode.
Status | I2C_SlaveTransferData (LPC_I2C_TypeDef *I2Cx, I2C_S_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt)
Receive and Transmit data in slave mode.
void | I2C_SetOwnSlaveAddr (LPC_I2C_TypeDef *I2Cx, I2C_OWNSLAVEADDR_CFG_Type *OwnSlaveAddrConfigStruct)
Set Own slave address in I2C peripheral corresponding to parameter specified in OwnSlaveAddrConfigStruct.
void | I2C_MonitorModeConfig (LPC_I2C_TypeDef *I2Cx, uint32_t MonitorCfgType, FunctionalState NewState)
Configures functionality in I2C monitor mode.
void | I2C_MonitorModeCmd (LPC_I2C_TypeDef *I2Cx, FunctionalState NewState)
Enable/Disable I2C monitor mode.
uint8_t | I2C_MonitorGetDatabuffer (LPC_I2C_TypeDef *I2Cx)
Get data from I2C data buffer in monitor mode.
BOOL_8 | I2C_MonitorHandler (LPC_I2C_TypeDef *I2Cx, uint8_t *buffer, uint32_t size)
Get data from I2C data buffer in monitor mode.
uint32_t | I2C_MasterTransferComplete (LPC_I2C_TypeDef *I2Cx)
Get status of Master Transfer.
uint32_t | I2C_SlaveTransferComplete (LPC_I2C_TypeDef *I2Cx)
Get status of Slave Transfer.
Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2s.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2s.c File Reference
#include "lpc17xx_i2s.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | I2S_Init (LPC_I2S_TypeDef *I2Sx)
Initialize I2S.
void | I2S_Config (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, I2S_CFG_Type *ConfigStruct)
Configuration I2S, setting:
void | I2S_DeInit (LPC_I2S_TypeDef *I2Sx)
DeInitial both I2S transmit or receive.
uint8_t | I2S_GetLevel (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
Get I2S Buffer Level.
void | I2S_Start (LPC_I2S_TypeDef *I2Sx)
I2S Start: clear all STOP,RESET and MUTE bit, ready to operate.
void | I2S_Send (LPC_I2S_TypeDef *I2Sx, uint32_t BufferData)
I2S Send data.
uint32_t | I2S_Receive (LPC_I2S_TypeDef *I2Sx)
I2S Receive Data.
void | I2S_Pause (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
I2S Pause.
void | I2S_Mute (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
I2S Mute.
void | I2S_Stop (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
I2S Stop.
Status | I2S_FreqConfig (LPC_I2S_TypeDef *I2Sx, uint32_t Freq, uint8_t TRMode)
Set frequency for I2S.
void | I2S_SetBitRate (LPC_I2S_TypeDef *I2Sx, uint8_t bitrate, uint8_t TRMode)
I2S set bitrate.
void | I2S_ModeConfig (LPC_I2S_TypeDef *I2Sx, I2S_MODEConf_Type *ModeConfig, uint8_t TRMode)
Configuration operating mode for I2S.
void | I2S_DMAConfig (LPC_I2S_TypeDef *I2Sx, I2S_DMAConf_Type *DMAConfig, uint8_t TRMode)
Configure DMA operation for I2S.
void | I2S_DMACmd (LPC_I2S_TypeDef *I2Sx, uint8_t DMAIndex, uint8_t TRMode, FunctionalState NewState)
Enable/Disable DMA operation for I2S.
void | I2S_IRQConfig (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, uint8_t level)
Configure IRQ for I2S.
void | I2S_IRQCmd (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, FunctionalState NewState)
Enable/Disable IRQ for I2S.
FunctionalState | I2S_GetIRQStatus (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
Get I2S interrupt status.
uint8_t | I2S_GetIRQDepth (LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
Get I2S interrupt depth.
Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_libcfg_default.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_libcfg_default.c File Reference

Library configuration source file (default), used to build library without examples. More...

#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void check_failed (uint8_t *file, uint32_t line)

Detailed Description

Library configuration source file (default), used to build library without examples.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_libcfg_default.c.

Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_mcpwm.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_mcpwm.c File Reference

Contains all functions support for Motor Control PWM firmware library on LPC17xx. More...

#include "lpc17xx_mcpwm.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | MCPWM_Init (LPC_MCPWM_TypeDef *MCPWMx)
Initializes the MCPWM peripheral.
void | MCPWM_ConfigChannel (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, MCPWM_CHANNEL_CFG_Type *channelSetup)
Configures each channel in MCPWM peripheral according to the specified parameters in the MCPWM_CHANNEL_CFG_Type.
void | MCPWM_WriteToShadow (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, MCPWM_CHANNEL_CFG_Type *channelSetup)
Write to MCPWM shadow registers - Update the value for period and pulse width in MCPWM peripheral.
void | MCPWM_ConfigCapture (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, MCPWM_CAPTURE_CFG_Type *captureConfig)
Configures capture function in MCPWM peripheral.
void | MCPWM_ClearCapture (LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel)
Clears current captured value in specified capture channel.
uint32_t | MCPWM_GetCapture (LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel)
Get current captured value in specified capture channel.
void | MCPWM_CountConfig (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum, uint32_t countMode, MCPWM_COUNT_CFG_Type *countConfig)
Configures Count control in MCPWM peripheral.
void | MCPWM_Start (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0, uint32_t channel1, uint32_t channel2)
Start MCPWM activity for each MCPWM channel.
void | MCPWM_Stop (LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0, uint32_t channel1, uint32_t channel2)
Stop MCPWM activity for each MCPWM channel.
void | MCPWM_ACMode (LPC_MCPWM_TypeDef *MCPWMx, uint32_t acMode)
Enables/Disables 3-phase AC motor mode on MCPWM peripheral.
void | MCPWM_DCMode (LPC_MCPWM_TypeDef *MCPWMx, uint32_t dcMode, uint32_t outputInvered, uint32_t outputPattern)
Enables/Disables 3-phase DC motor mode on MCPWM peripheral.
void | MCPWM_IntConfig (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType, FunctionalState NewState)
Configures the specified interrupt in MCPWM peripheral.
void | MCPWM_IntSet (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Sets/Forces the specified interrupt for MCPWM peripheral.
void | MCPWM_IntClear (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Clear the specified interrupt pending for MCPWM peripheral.
FlagStatus | MCPWM_GetIntStatus (LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Check whether if the specified interrupt in MCPWM is set or not.

Detailed Description

Contains all functions support for Motor Control PWM firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_mcpwm.c.

Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_nvic.c File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_nvic.c File Reference

Contains all expansion functions support for NVIC firmware library on LPC17xx. The main NVIC functions are defined in core_cm3.h. More...

#include "lpc17xx_nvic.h"

Go to the source code of this file.

Defines

#define | NVIC_VTOR_MASK 0x3FFFFF80

Functions

void | NVIC_DeInit (void)
De-initializes the NVIC peripheral registers to their default reset values.
void | NVIC_SCBDeInit (void)
De-initializes the SCB peripheral registers to their default reset values.
void | NVIC_SetVTOR (uint32_t offset)
Set Vector Table Offset value.

Detailed Description

Contains all expansion functions support for NVIC firmware library on LPC17xx. The main NVIC functions are defined in core_cm3.h.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_nvic.c.

Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_pinsel.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_pinsel.c File Reference

Contains all functions support for Pin connect block firmware library on LPC17xx. More...

#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Functions

void | PINSEL_ConfigTraceFunc (FunctionalState NewState)
Configure trace function.
void | PINSEL_SetI2C0Pins (uint8_t i2cPinMode, FunctionalState filterSlewRateEnable)
Setup I2C0 pins.
void | PINSEL_ConfigPin (PINSEL_CFG_Type *PinCfg)
Configure Pin corresponding to specified parameters passed in the PinCfg.

Detailed Description

Contains all functions support for Pin connect block firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_pinsel.c.

Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_pwm.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_pwm.c File Reference

Contains all functions support for PWM firmware library on LPC17xx. More...

#include "lpc17xx_pwm.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

IntStatus | PWM_GetIntStatus (LPC_PWM_TypeDef *PWMx, uint32_t IntFlag)
Check whether specified interrupt flag in PWM is set or not.
void | PWM_ClearIntPending (LPC_PWM_TypeDef *PWMx, uint32_t IntFlag)
Clear specified PWM Interrupt pending.
void | PWM_ConfigStructInit (uint8_t PWMTimerCounterMode, void *PWM_InitStruct)
Fills each PWM_InitStruct member with its default value:
void | PWM_Init (LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct)
Initializes the PWMx peripheral corresponding to the specified parameters in the PWM_ConfigStruct.
void | PWM_DeInit (LPC_PWM_TypeDef *PWMx)
De-initializes the PWM peripheral registers to their default reset values.
void | PWM_Cmd (LPC_PWM_TypeDef *PWMx, FunctionalState NewState)
Enable/Disable PWM peripheral.
void | PWM_CounterCmd (LPC_PWM_TypeDef *PWMx, FunctionalState NewState)
Enable/Disable Counter in PWM peripheral.
void | PWM_ResetCounter (LPC_PWM_TypeDef *PWMx)
Reset Counter in PWM peripheral.
void | PWM_ConfigMatch (LPC_PWM_TypeDef *PWMx, PWM_MATCHCFG_Type *PWM_MatchConfigStruct)
Configures match for PWM peripheral.
void | PWM_ConfigCapture (LPC_PWM_TypeDef *PWMx, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct)
Configures capture input for PWM peripheral.
uint32_t | PWM_GetCaptureValue (LPC_PWM_TypeDef *PWMx, uint8_t CaptureChannel)
Read value of capture register PWM peripheral.
void | PWM_MatchUpdate (LPC_PWM_TypeDef *PWMx, uint8_t MatchChannel, uint32_t MatchValue, uint8_t UpdateType)
Update value for each PWM channel with update type option.
void | PWM_MultiMatchUpdate (LPC_PWM_TypeDef *PWMx, PWM_Match_T *MatchStruct, uint8_t UpdateType)
Update value for multi PWM channel with update type option at the same time.
void | PWM_ChannelConfig (LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, uint8_t ModeOption)
Configure Edge mode for each PWM channel.
void | PWM_ChannelCmd (LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, FunctionalState NewState)
Enable/Disable PWM channel output.

Detailed Description

Contains all functions support for PWM firmware library on LPC17xx.

Version:
2.1
Date:
31. Mar. 2011
Author:
NXP MCU SW Application Team

Copyright(C) 2011, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_pwm.c.

Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_qei.c File Reference

Data Structures | Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_qei.c File Reference

Contains all functions support for QEI firmware library on LPC17xx. More...

#include "lpc17xx_qei.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Data Structures

union | QEI_CFGOPT_Type
QEI configuration union type definition. More...

Functions

void | QEI_Reset (LPC_QEI_TypeDef *QEIx, uint32_t ulResetType)
Resets value for each type of QEI value, such as velocity, counter, position, etc..
void | QEI_Init (LPC_QEI_TypeDef *QEIx, QEI_CFG_Type *QEI_ConfigStruct)
Initializes the QEI peripheral according to the specified parameters in the QEI_ConfigStruct.
void | QEI_DeInit (LPC_QEI_TypeDef *QEIx)
De-initializes the QEI peripheral registers to their default reset values.
void | QEI_ConfigStructInit (QEI_CFG_Type *QIE_InitStruct)
Fills each QIE_InitStruct member with its default value:
FlagStatus | QEI_GetStatus (LPC_QEI_TypeDef *QEIx, uint32_t ulFlagType)
Check whether if specified flag status is set or not.
uint32_t | QEI_GetPosition (LPC_QEI_TypeDef *QEIx)
Get current position value in QEI peripheral.
void | QEI_SetMaxPosition (LPC_QEI_TypeDef *QEIx, uint32_t ulMaxPos)
Set max position value for QEI peripheral.
void | QEI_SetPositionComp (LPC_QEI_TypeDef *QEIx, uint8_t bPosCompCh, uint32_t ulPosComp)
Set position compare value for QEI peripheral.
uint32_t | QEI_GetIndex (LPC_QEI_TypeDef *QEIx)
Get current index counter of QEI peripheral.
void | QEI_SetIndexComp (LPC_QEI_TypeDef *QEIx, uint32_t ulIndexComp)
Set value for index compare in QEI peripheral.
void | QEI_SetTimerReload (LPC_QEI_TypeDef *QEIx, QEI_RELOADCFG_Type *QEIReloadStruct)
Set timer reload value for QEI peripheral. When the velocity timer is over-flow, the value that set for Timer Reload register will be loaded into the velocity timer for next period. The calculated velocity in RPM therefore will be affect by this value.
uint32_t | QEI_GetTimer (LPC_QEI_TypeDef *QEIx)
Get current timer counter in QEI peripheral.
uint32_t | QEI_GetVelocity (LPC_QEI_TypeDef *QEIx)
Get current velocity pulse counter in current time period.
uint32_t | QEI_GetVelocityCap (LPC_QEI_TypeDef *QEIx)
Get the most recently measured velocity of the QEI. When the Velocity timer in QEI is over-flow, the current velocity value will be loaded into Velocity Capture register.
void | QEI_SetVelocityComp (LPC_QEI_TypeDef *QEIx, uint32_t ulVelComp)
Set Velocity Compare value for QEI peripheral.
void | QEI_SetDigiFilter (LPC_QEI_TypeDef *QEIx, uint32_t ulSamplingPulse)
Set value of sampling count for the digital filter in QEI peripheral.
FlagStatus | QEI_GetIntStatus (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
Check whether if specified interrupt flag status in QEI peripheral is set or not.
void | QEI_IntCmd (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType, FunctionalState NewState)
Enable/Disable specified interrupt in QEI peripheral.
void | QEI_IntSet (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
Sets (forces) specified interrupt in QEI peripheral.
void | QEI_IntClear (LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
Clear (force) specified interrupt (pending) in QEI peripheral.
uint32_t | QEI_CalculateRPM (LPC_QEI_TypeDef *QEIx, uint32_t ulVelCapValue, uint32_t ulPPR)
Calculates the actual velocity in RPM passed via velocity capture value and Pulse Per Round (of the encoder) value parameter input.

Detailed Description

Contains all functions support for QEI firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_qei.c.

Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_rit.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_rit.c File Reference

Contains all functions support for RIT firmware library on LPC17xx. More...

#include "lpc17xx_rit.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | RIT_Init (LPC_RIT_TypeDef *RITx)
void | RIT_DeInit (LPC_RIT_TypeDef *RITx)
void | RIT_TimerConfig (LPC_RIT_TypeDef *RITx, uint32_t time_interval)
void | RIT_Cmd (LPC_RIT_TypeDef *RITx, FunctionalState NewState)
void | RIT_TimerDebugCmd (LPC_RIT_TypeDef *RITx, FunctionalState NewState)
IntStatus | RIT_GetIntStatus (LPC_RIT_TypeDef *RITx)

Detailed Description

Contains all functions support for RIT firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_rit.c.

Generated on Mon Nov 28 2011 11:15:04 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_rtc.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_rtc.c File Reference

Contains all functions support for RTC firmware library on LPC17xx. More...

#include "lpc17xx_rtc.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | RTC_Init (LPC_RTC_TypeDef *RTCx)
Initializes the RTC peripheral.
void | RTC_DeInit (LPC_RTC_TypeDef *RTCx)
De-initializes the RTC peripheral registers to their default reset values.
void | RTC_ResetClockTickCounter (LPC_RTC_TypeDef *RTCx)
Reset clock tick counter in RTC peripheral.
void | RTC_Cmd (LPC_RTC_TypeDef *RTCx, FunctionalState NewState)
Start/Stop RTC peripheral.
void | RTC_CntIncrIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t CntIncrIntType, FunctionalState NewState)
Enable/Disable Counter increment interrupt for each time type in RTC peripheral.
void | RTC_AlarmIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t AlarmTimeType, FunctionalState NewState)
Enable/Disable Alarm interrupt for each time type in RTC peripheral.
void | RTC_SetTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t TimeValue)
Set current time value for each time type in RTC peripheral.
uint32_t | RTC_GetTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype)
Get current time value for each type time type.
void | RTC_SetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Set full of time in RTC peripheral.
void | RTC_GetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Get full of time in RTC peripheral.
void | RTC_SetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t ALValue)
Set alarm time value for each time type.
uint32_t | RTC_GetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype)
Get alarm time value for each time type.
void | RTC_SetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Set full of alarm time in RTC peripheral.
void | RTC_GetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
Get full of alarm time in RTC peripheral.
IntStatus | RTC_GetIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType)
Check whether if specified Location interrupt in RTC peripheral is set or not.
void | RTC_ClearIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType)
Clear specified Location interrupt pending in RTC peripheral.
void | RTC_CalibCounterCmd (LPC_RTC_TypeDef *RTCx, FunctionalState NewState)
Enable/Disable calibration counter in RTC peripheral.
void | RTC_CalibConfig (LPC_RTC_TypeDef *RTCx, uint32_t CalibValue, uint8_t CalibDir)
Configures Calibration in RTC peripheral.
void | RTC_WriteGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel, uint32_t Value)
Write value to General purpose registers.
uint32_t | RTC_ReadGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel)
Read value from General purpose registers.

Detailed Description

Contains all functions support for RTC firmware library on LPC17xx.

Version:
3.1
Date:
6. June. 2011
Author:
NXP MCU SW Application Team

Copyright(C) 2011, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_rtc.c.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_spi.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_spi.c File Reference

Contains all functions support for SPI firmware library on LPC17xx. More...

#include "lpc17xx_spi.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | SPI_SetClock (LPC_SPI_TypeDef *SPIx, uint32_t target_clock)
Setup clock rate for SPI device.
void | SPI_DeInit (LPC_SPI_TypeDef *SPIx)
De-initializes the SPIx peripheral registers to their default reset values.
uint8_t | SPI_GetDataSize (LPC_SPI_TypeDef *SPIx)
Get data bit size per transfer.
void | SPI_Init (LPC_SPI_TypeDef *SPIx, SPI_CFG_Type *SPI_ConfigStruct)
Initializes the SPIx peripheral according to the specified parameters in the UART_ConfigStruct.
void | SPI_ConfigStructInit (SPI_CFG_Type *SPI_InitStruct)
Fills each SPI_InitStruct member with its default value:
void | SPI_SendData (LPC_SPI_TypeDef *SPIx, uint16_t Data)
Transmit a single data through SPIx peripheral.
uint16_t | SPI_ReceiveData (LPC_SPI_TypeDef *SPIx)
Receive a single data from SPIx peripheral.
int32_t | SPI_ReadWrite (LPC_SPI_TypeDef *SPIx, SPI_DATA_SETUP_Type *dataCfg, SPI_TRANSFER_Type xfType)
SPI Read write data function.
void | SPI_IntCmd (LPC_SPI_TypeDef *SPIx, FunctionalState NewState)
Enable or disable SPIx interrupt.
IntStatus | SPI_GetIntStatus (LPC_SPI_TypeDef *SPIx)
Checks whether the SPI interrupt flag is set or not.
void | SPI_ClearIntPending (LPC_SPI_TypeDef *SPIx)
Clear SPI interrupt flag.
uint32_t | SPI_GetStatus (LPC_SPI_TypeDef *SPIx)
Get current value of SPI Status register in SPIx peripheral.
FlagStatus | SPI_CheckStatus (uint32_t inputSPIStatus, uint8_t SPIStatus)
Checks whether the specified SPI Status flag is set or not via inputSPIStatus parameter.

Detailed Description

Contains all functions support for SPI firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_spi.c.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_ssp.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_ssp.c File Reference

Contains all functions support for SSP firmware library on LPC17xx. More...

#include "lpc17xx_ssp.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | SSP_Init (LPC_SSP_TypeDef *SSPx, SSP_CFG_Type *SSP_ConfigStruct)
Initializes the SSPx peripheral according to the specified parameters in the SSP_ConfigStruct.
void | SSP_DeInit (LPC_SSP_TypeDef *SSPx)
De-initializes the SSPx peripheral registers to their default reset values.
uint8_t | SSP_GetDataSize (LPC_SSP_TypeDef *SSPx)
Get data size bit selected.
void | SSP_ConfigStructInit (SSP_CFG_Type *SSP_InitStruct)
Fills each SSP_InitStruct member with its default value:
void | SSP_Cmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState)
Enable or disable SSP peripheral's operation.
void | SSP_LoopBackCmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState)
Enable or disable Loop Back mode function in SSP peripheral.
void | SSP_SlaveOutputCmd (LPC_SSP_TypeDef *SSPx, FunctionalState NewState)
Enable or disable Slave Output function in SSP peripheral.
void | SSP_SendData (LPC_SSP_TypeDef *SSPx, uint16_t Data)
Transmit a single data through SSPx peripheral.
uint16_t | SSP_ReceiveData (LPC_SSP_TypeDef *SSPx)
Receive a single data from SSPx peripheral.
int32_t | SSP_ReadWrite (LPC_SSP_TypeDef *SSPx, SSP_DATA_SETUP_Type *dataCfg, SSP_TRANSFER_Type xfType)
SSP Read write data function.
FlagStatus | SSP_GetStatus (LPC_SSP_TypeDef *SSPx, uint32_t FlagType)
Checks whether the specified SSP status flag is set or not.
void | SSP_IntConfig (LPC_SSP_TypeDef *SSPx, uint32_t IntType, FunctionalState NewState)
Enable or disable specified interrupt type in SSP peripheral.
IntStatus | SSP_GetRawIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t RawIntType)
Check whether the specified Raw interrupt status flag is set or not.
uint32_t | SSP_GetRawIntStatusReg (LPC_SSP_TypeDef *SSPx)
Get Raw Interrupt Status register.
IntStatus | SSP_GetIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t IntType)
Check whether the specified interrupt status flag is set or not.
void | SSP_ClearIntPending (LPC_SSP_TypeDef *SSPx, uint32_t IntType)
Clear specified interrupt pending in SSP peripheral.
void | SSP_DMACmd (LPC_SSP_TypeDef *SSPx, uint32_t DMAMode, FunctionalState NewState)
Enable/Disable DMA function for SSP peripheral.

Detailed Description

Contains all functions support for SSP firmware library on LPC17xx.

Version:
3.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_ssp.c.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_systick.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_systick.c File Reference

Contains all functions support for SYSTICK firmware library on LPC17xx. More...

#include "lpc17xx_systick.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | SYSTICK_InternalInit (uint32_t time)
Initial System Tick with using internal CPU clock source.
void | SYSTICK_ExternalInit (uint32_t freq, uint32_t time)
Initial System Tick with using external clock source.
void | SYSTICK_Cmd (FunctionalState NewState)
Enable/disable System Tick counter.
void | SYSTICK_IntCmd (FunctionalState NewState)
Enable/disable System Tick interrupt.
uint32_t | SYSTICK_GetCurrentValue (void)
Get current value of System Tick counter.
void | SYSTICK_ClearCounterFlag (void)
Clear Counter flag.

Detailed Description

Contains all functions support for SYSTICK firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_systick.c.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_timer.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_timer.c File Reference

Contains all functions support for Timer firmware library on LPC17xx. More...

#include "lpc17xx_timer.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

FlagStatus | TIM_GetIntStatus (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Get Interrupt Status.
FlagStatus | TIM_GetIntCaptureStatus (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Get Capture Interrupt Status.
void | TIM_ClearIntPending (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Clear Interrupt pending.
void | TIM_ClearIntCapturePending (LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
Clear Capture Interrupt pending.
void | TIM_ConfigStructInit (TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct)
Configuration for Timer at initial time.
void | TIM_Init (LPC_TIM_TypeDef *TIMx, TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct)
Initial Timer/Counter device Set Clock frequency for Timer Set initial configuration for Timer.
void | TIM_DeInit (LPC_TIM_TypeDef *TIMx)
Close Timer/Counter device.
void | TIM_Cmd (LPC_TIM_TypeDef *TIMx, FunctionalState NewState)
Start/Stop Timer/Counter device.
void | TIM_ResetCounter (LPC_TIM_TypeDef *TIMx)
Reset Timer/Counter device, Make TC and PC are synchronously reset on the next positive edge of PCLK.
void | TIM_ConfigMatch (LPC_TIM_TypeDef *TIMx, TIM_MATCHCFG_Type *TIM_MatchConfigStruct)
Configuration for Match register.
void | TIM_UpdateMatchValue (LPC_TIM_TypeDef *TIMx, uint8_t MatchChannel, uint32_t MatchValue)
Update Match value.
void | TIM_ConfigCapture (LPC_TIM_TypeDef *TIMx, TIM_CAPTURECFG_Type *TIM_CaptureConfigStruct)
Configuration for Capture register.
uint32_t | TIM_GetCaptureValue (LPC_TIM_TypeDef *TIMx, TIM_COUNTER_INPUT_OPT CaptureChannel)
Read value of capture register in timer/counter device.

Detailed Description

Contains all functions support for Timer firmware library on LPC17xx.

Version:
3.1
Date:
10. March. 2011
Author:
NXP MCU SW Application Team

Copyright(C) 2011, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_timer.c.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_uart.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_uart.c File Reference

Contains all functions support for UART firmware library on LPC17xx. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | UART_Init (LPC_UART_TypeDef *UARTx, UART_CFG_Type *UART_ConfigStruct)
Initializes the UARTx peripheral according to the specified parameters in the UART_ConfigStruct.
void | UART_DeInit (LPC_UART_TypeDef *UARTx)
De-initializes the UARTx peripheral registers to their default reset values.
void | UART_ConfigStructInit (UART_CFG_Type *UART_InitStruct)
Fills each UART_InitStruct member with its default value:
void | UART_SendByte (LPC_UART_TypeDef *UARTx, uint8_t Data)
Transmit a single data through UART peripheral.
uint8_t | UART_ReceiveByte (LPC_UART_TypeDef *UARTx)
Receive a single data from UART peripheral.
uint32_t | UART_Send (LPC_UART_TypeDef *UARTx, uint8_t *txbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
Send a block of data via UART peripheral.
uint32_t | UART_Receive (LPC_UART_TypeDef *UARTx, uint8_t *rxbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
Receive a block of data via UART peripheral.
void | UART_ForceBreak (LPC_UART_TypeDef *UARTx)
Force BREAK character on UART line, output pin UARTx TXD is forced to logic 0.
void | UART_IntConfig (LPC_UART_TypeDef *UARTx, UART_INT_Type UARTIntCfg, FunctionalState NewState)
Enable or disable specified UART interrupt.
uint8_t | UART_GetLineStatus (LPC_UART_TypeDef *UARTx)
Get current value of Line Status register in UART peripheral.
uint32_t | UART_GetIntId (LPC_UART_TypeDef *UARTx)
Get Interrupt Identification value.
FlagStatus | UART_CheckBusy (LPC_UART_TypeDef *UARTx)
Check whether if UART is busy or not.
void | UART_FIFOConfig (LPC_UART_TypeDef *UARTx, UART_FIFO_CFG_Type *FIFOCfg)
Configure FIFO function on selected UART peripheral.
void | UART_FIFOConfigStructInit (UART_FIFO_CFG_Type *UART_FIFOInitStruct)
Fills each UART_FIFOInitStruct member with its default value:
void | UART_ABCmd (LPC_UART_TypeDef *UARTx, UART_AB_CFG_Type *ABConfigStruct, FunctionalState NewState)
Start/Stop Auto Baudrate activity.
void | UART_ABClearIntPending (LPC_UART_TypeDef *UARTx, UART_ABEO_Type ABIntType)
Clear Autobaud Interrupt Pending.
void | UART_TxCmd (LPC_UART_TypeDef *UARTx, FunctionalState NewState)
Enable/Disable transmission on UART TxD pin.
void | UART_IrDAInvtInputCmd (LPC_UART_TypeDef *UARTx, FunctionalState NewState)
Enable or disable inverting serial input function of IrDA on UART peripheral.
void | UART_IrDACmd (LPC_UART_TypeDef *UARTx, FunctionalState NewState)
Enable or disable IrDA function on UART peripheral.
void | UART_IrDAPulseDivConfig (LPC_UART_TypeDef *UARTx, UART_IrDA_PULSE_Type PulseDiv)
Configure Pulse divider for IrDA function on UART peripheral.
void | UART_FullModemForcePinState (LPC_UART1_TypeDef *UARTx, UART_MODEM_PIN_Type Pin, UART1_SignalState NewState)
Force pin DTR/RTS corresponding to given state (Full modem mode)
void | UART_FullModemConfigMode (LPC_UART1_TypeDef *UARTx, UART_MODEM_MODE_Type Mode, FunctionalState NewState)
Configure Full Modem mode for UART peripheral.
uint8_t | UART_FullModemGetStatus (LPC_UART1_TypeDef *UARTx)
Get current status of modem status register.
void | UART_RS485Config (LPC_UART1_TypeDef *UARTx, UART1_RS485_CTRLCFG_Type *RS485ConfigStruct)
Configure UART peripheral in RS485 mode according to the specified parameters in the RS485ConfigStruct.
void | UART_RS485ReceiverCmd (LPC_UART1_TypeDef *UARTx, FunctionalState NewState)
Enable/Disable receiver in RS485 module in UART1.
uint32_t | UART_RS485Send (LPC_UART1_TypeDef *UARTx, uint8_t *pDatFrm, uint32_t size, uint8_t ParityStick)
Send data on RS485 bus with specified parity stick value (9-bit mode).
void | UART_RS485SendSlvAddr (LPC_UART1_TypeDef *UARTx, uint8_t SlvAddr)
Send Slave address frames on RS485 bus.
uint32_t | UART_RS485SendData (LPC_UART1_TypeDef *UARTx, uint8_t *pData, uint32_t size)
Send Data frames on RS485 bus.

Detailed Description

Contains all functions support for UART firmware library on LPC17xx.

Version:
3.2
Date:
25. July. 2011
Author:
NXP MCU SW Application Team

Copyright(C) 2011, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_uart.c.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_wdt.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_wdt.c File Reference

Contains all functions support for WDT firmware library on LPC17xx. More...

#include "lpc17xx_wdt.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_libcfg_default.h"

Go to the source code of this file.

Functions

void | WDT_Init (WDT_CLK_OPT ClkSrc, WDT_MODE_OPT WDTMode)
Initial for Watchdog function Clock source = RTC ,.
void | WDT_Start (uint32_t TimeOut)
Start WDT activity with given timeout value.
FlagStatus | WDT_ReadTimeOutFlag (void)
Read WDT Time out flag.
void | WDT_ClrTimeOutFlag (void)
Clear WDT Time out flag.
void | WDT_UpdateTimeOut (uint32_t TimeOut)
Update WDT timeout value and feed.
void | WDT_Feed (void)
After set WDTEN, call this function to start Watchdog or reload the Watchdog timer.
uint32_t | WDT_GetCurrentCount (void)
Get the current value of WDT.

Detailed Description

Contains all functions support for WDT firmware library on LPC17xx.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file lpc17xx_wdt.c.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Burst/adc_burst_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Burst/adc_burst_test.c File Reference
#include "lpc17xx_adc.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | MCB_LPC_1768
#define | MCB_LPC17XX_ADC_INJECT_TEST
#define | DMA_SIZE 8
#define | GPIO_INT (1<<10)
#define | POLL_LED (1<<4)

Functions

void | print_menu (void)
Print menu.
void | EINT3_IRQHandler (void)
External interrupt 3 handler sub-routine.
int | c_entry (void)
c_entry: Main ADC program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Burst/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Burst/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _ADC
#define | CHECK_PARAM(expr)

Define Documentation

#define _ADC

Definition at line 92 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/DMA/adc_dma_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/DMA/adc_dma_test.c File Reference

This example describes how to use ADC conversions and transfer converted data by using DMA. More...

#include "lpc17xx_adc.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_nvic.h"
#include "lpc17xx_gpdma.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | MCB_LPC_1768
#define | DMA_SIZE 1

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main ADC program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err

Detailed Description

This example describes how to use ADC conversions and transfer converted data by using DMA.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file adc_dma_test.c.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/DMA/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/DMA/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _GPDMA
#define | _ADC
#define | CHECK_PARAM(expr)

Define Documentation

#define _ADC

Definition at line 92 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 85 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/HardwareTrigger/adc_hardware_trigger_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/HardwareTrigger/adc_hardware_trigger_test.c File Reference

This example describes how to use ADC conversion in hardware-triggered mode. More...

#include "lpc17xx_adc.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | _ADC_INT ADC_ADINTEN2
#define | _ADC_CHANNEL ADC_CHANNEL_2

Functions

void | ADC_IRQHandler (void)
ADC interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main ADC program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint32_t | adc_value

Detailed Description

This example describes how to use ADC conversion in hardware-triggered mode.

Version:
1.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file adc_hardware_trigger_test.c.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/HardwareTrigger/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/HardwareTrigger/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _ADC
#define | CHECK_PARAM(expr)

Define Documentation

#define _ADC

Definition at line 92 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/INTERRUPT/adc_interrupt_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/INTERRUPT/adc_interrupt_test.c File Reference

This example describes how to use ADC conversion in burst mode. More...

#include "lpc17xx_adc.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | MCB_LPC_1768

Functions

void | ADC_IRQHandler (void)
ADC interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main ADC program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint32_t | adc_value

Detailed Description

This example describes how to use ADC conversion in burst mode.

This example describes how to use ADC conversion in interrupt mode.

Version:
2.0
Date:
16. July. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file adc_interrupt_test.c.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/INTERRUPT/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/INTERRUPT/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _ADC
#define | CHECK_PARAM(expr)

Define Documentation

#define _ADC

Definition at line 92 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Polling/adc_polling_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Polling/adc_polling_test.c File Reference

This example describes how to use ADC conversion in polling mode. More...

#include "lpc17xx_adc.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | MCB_LPC_1768

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main ADC program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"

Detailed Description

This example describes how to use ADC conversion in polling mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file adc_polling_test.c.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Polling/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Polling/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _ADC
#define | CHECK_PARAM(expr)

Define Documentation

#define _ADC

Definition at line 92 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_LedControl/can_ledcontrol.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_LedControl/can_ledcontrol.c File Reference

This example describes how to use CAN frames to control LED display. More...

#include "lpc17xx_can.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Functions

void | CAN_IRQHandler ()
CAN_IRQ Handler, control receive message operation param[in] none.
void | CAN_InitMessage (void)
Initialize transmit and receive message for Bypass operation.
void | print_menu ()
print menu
int | c_entry (void)
c_entry: Main CAN program body
int | main (void)

Variables

uint8_t | menu [] = "*******************************************************************************\n\r"
CAN_MSG_Type TXMsg
CAN_MSG_Type RXMsg
uint8_t | LED_Value
uint32_t | LED [8] = {(1<<6),(1<<5),(1<<4),(1<<3),(1<<2),(0x80000000),(1<<29),(1<<28)}

Detailed Description

This example describes how to use CAN frames to control LED display.

Version:
1.0
Date:
16. July. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file can_ledcontrol.c.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_LedControl/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_LedControl/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _CAN
#define | CHECK_PARAM(expr)

Define Documentation

#define _CAN

Definition at line 115 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_self_test/can_self_test.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_self_test/can_self_test.c File Reference

This example used to test Self-test mode. More...

#include "lpc17xx_can.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Functions

void | CAN_IRQHandler ()
CAN_IRQ Handler, control receive message operation param[in] none.
void | CAN_InitMessage (void)
Initialize transmit and receive message for Bypass operation.
void | PrintMessage (CAN_MSG_Type *CAN_Msg)
Print Message via COM1 param[in] msg: point to CAN_MSG_Type object that will be printed.
void | print_menu ()
print menu
Bool | Check_Message (CAN_MSG_Type *TX_Msg, CAN_MSG_Type *RX_Msg)
Compare two message.
int | c_entry (void)
c_entry: Main CAN program body
int | main (void)

Variables

uint8_t | menu [] = "*******************************************************************************\n\r"
CAN_MSG_Type TXMsg
CAN_MSG_Type RXMsg
uint32_t | CANRxCount
uint32_t | CANTxCount = 0

Detailed Description

This example used to test Self-test mode.

Version:
1.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file can_self_test.c.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_self_test/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_self_test/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _CAN
#define | CHECK_PARAM(expr)

Define Documentation

#define _CAN

Definition at line 115 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_aflut/can_test_aflut.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_aflut/can_test_aflut.c File Reference
#include "lpc17xx_can.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | MAX_ENTRY 512
#define | CAN_TX_MSG_CNT 10
#define | CAN_RX_MSG_CNT 5

Functions

void | CAN_IRQHandler (void)
CAN IRQ Handler.
void | CAN_PinCfg (void)
void | CAN_InitMessage (void)
Initialize transmit and receive message for Bypass operation.
void | CAN_SetupAFTable (void)
Init AF-Look Up Table Sections entry value We setup entries for 5 sections:
void | CAN_InitAFMessage (void)
Init Transmit Message We use 10 message to test Acceptance Filter operation, include:
void | PrintMessage (CAN_MSG_Type *CAN_Msg)
Print Message via COM1 param[in] msg: point to CAN_MSG_Type object that will be printed.
void | print_menu ()
print menu
void | CAN_ChangeAFTable (void)
Change AFLUT table.
int | c_entry (void)
c_entry: Main CAN program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
CAN_MSG_Type | AFTxMsg [CAN_TX_MSG_CNT]
CAN_MSG_Type | AFRxMsg [CAN_RX_MSG_CNT]
uint32_t | CANRxCount = 0
uint32_t | CANTxCount = 0
uint32_t | CANErrCount = 0
AF_SectionDef AFTable
FullCAN_Entry | FullCAN_Table [6]
SFF_Entry | SFF_Table [6]
SFF_GPR_Entry | SFF_GPR_Table [6]
EFF_Entry | EFF_Table [6]
EFF_GPR_Entry | EFF_GPR_Table [6]
Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_aflut/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_aflut/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _CAN
#define | CHECK_PARAM(expr)

Define Documentation

#define _CAN

Definition at line 115 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_bypass_mode/can_test_bypass_mode.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_bypass_mode/can_test_bypass_mode.c File Reference

This example used to test Bypass mode. More...

#include "lpc17xx_can.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Functions

void | CAN_IRQHandler ()
CAN_IRQ Handler, control receive message operation param[in] none.
void | CAN_InitMessage (void)
Initialize transmit and receive message for Bypass operation.
void | PrintMessage (CAN_MSG_Type *CAN_Msg)
Print Message via COM1 param[in] msg: point to CAN_MSG_Type object that will be printed.
void | print_menu ()
print menu
int | c_entry (void)
c_entry: Main CAN program body
int | main (void)

Variables

uint8_t | menu [] = "*******************************************************************************\n\r"
CAN_MSG_Type TXMsg
CAN_MSG_Type RXMsg
uint32_t | CANRxCount
uint32_t | CANTxCount = 0

Detailed Description

This example used to test Bypass mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file can_test_bypass_mode.c.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_bypass_mode/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_bypass_mode/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _CAN
#define | CHECK_PARAM(expr)

Define Documentation

#define _CAN

Definition at line 115 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_two_kit/can_test_two_kit.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_two_kit/can_test_two_kit.c File Reference

This example used to CAN operation in two board. More...

#include "lpc17xx_can.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | CAN_TRANSMIT 1
#define | CAN_RECEIVE !CAN_TRANSMIT
#define | TX_BUFFER_SIZE 4
#define | RX_BUFFER_SIZE 2

Functions

void | CAN_IRQHandler ()
CAN_IRQ Handler, control receive message operation param[in] none.
void | CAN_InitMessage (void)
Initialize transmit and receive message for Bypass operation.
Bool | CAN_VerifyMessage (CAN_MSG_Type Msg1, CAN_MSG_Type Msg2)
CAN_ERROR | CAN_SetupAFTable (void)
Setup Acceptance Filter Table.
void | CAN_InitAFMessage (void)
Initialize transmit and receive message for testing AF operation.
void | PrintMessage (CAN_MSG_Type *CAN_Msg)
Print Message via COM1 param[in] msg: point to CAN_MSG_Type object that will be printed.
void | print_menu (void)
print menu
int | c_entry (void)
c_entry: Main CAN program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
CAN_MSG_Type TXMsg
CAN_MSG_Type RXMsg
CAN_MSG_Type | AFTxMsg [TX_BUFFER_SIZE]
CAN_MSG_Type | AFRxMsg [RX_BUFFER_SIZE]
uint32_t | CANRxCount = 0
uint32_t | CANTxCount = 0
uint32_t | CANErrCount = 0

Detailed Description

This example used to CAN operation in two board.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file can_test_two_kit.c.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_two_kit/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_two_kit/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _CAN
#define | CHECK_PARAM(expr)

Define Documentation

#define _CAN

Definition at line 115 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Bit-banding/bitband.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Bit-banding/bitband.c File Reference

This example used to test bit-banding feature of Cortex-M3 processor. More...

#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | BITBAND_SRAM_REF 0x20000000
#define | BITBAND_SRAM_BASE 0x22000000
#define | BITBAND_SRAM(a, b) ((BITBAND_SRAM_BASE + ((a-BITBAND_SRAM_REF)<<5) + (b<<2)))
#define | BITBAND_PERI_REF 0x40000000
#define | BITBAND_PERI_BASE 0x42000000
#define | BITBAND_PERI(a, b) ((BITBAND_PERI_BASE + ((a-BITBAND_PERI_REF)<<5) + (b<<2)))
#define | BITBAND_SRAM_ClearBit(a, b) (*(volatile uint32_t *) (BITBAND_SRAM(a,b)) = 0)
#define | BITBAND_SRAM_SetBit(a, b) (*(volatile uint32_t *) (BITBAND_SRAM(a,b)) = 1)
#define | BITBAND_SRAM_GetBit(a, b) (*(volatile uint32_t *) (BITBAND_SRAM(a,b)))
#define | BITBAND_PERI_ClearBit(a, b) (*(volatile uint32_t *) (BITBAND_PERI(a,b)) = 0)
#define | BITBAND_PERI_SetBit(a, b) (*(volatile uint32_t *) (BITBAND_PERI(a,b)) = 1)
#define | BITBAND_PERI_GetBit(a, b) (*(volatile uint32_t *) (BITBAND_PERI(a,b)))
#define | VAR_ADDRESS 0x2007C000
#define | VAR_BIT 3
#define | PERI_ADDRESS 0x40020000
#define | PERI_BIT 5

Functions

int | c_entry (void)
c_entry: main function
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"

Detailed Description

This example used to test bit-banding feature of Cortex-M3 processor.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file bitband.c.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Bit-banding/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Bit-banding/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/MPU/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/MPU/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _GPDMA
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/MPU/mpu_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/MPU/mpu_test.c File Reference
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | MPU_REGION_SIZE_32B 0x04
#define | MPU_REGION_SIZE_64B 0x05
#define | MPU_REGION_SIZE_128B 0x06
#define | MPU_REGION_SIZE_256B 0x07
#define | MPU_REGION_SIZE_512B 0x08
#define | MPU_REGION_SIZE_1KB 0x09
#define | MPU_REGION_SIZE_2KB 0x0A
#define | MPU_REGION_SIZE_4KB 0x0B
#define | MPU_REGION_SIZE_8KB 0x0C
#define | MPU_REGION_SIZE_16KB 0x0D
#define | MPU_REGION_SIZE_32KB 0x0E
#define | MPU_REGION_SIZE_64KB 0x0F
#define | MPU_REGION_SIZE_128KB 0x10
#define | MPU_REGION_SIZE_256KB 0x11
#define | MPU_REGION_SIZE_512KB 0x12
#define | MPU_REGION_SIZE_1MB 0x13
#define | MPU_REGION_SIZE_2MB 0x14
#define | MPU_REGION_SIZE_4MB 0x15
#define | MPU_REGION_SIZE_8MB 0x16
#define | MPU_REGION_SIZE_16MB 0x17
#define | MPU_REGION_SIZE_32MB 0x18
#define | MPU_REGION_SIZE_64MB 0x19
#define | MPU_REGION_SIZE_128MB 0x1A
#define | MPU_REGION_SIZE_256MB 0x1B
#define | MPU_REGION_SIZE_512MB 0x1C
#define | MPU_REGION_SIZE_1GB 0x1D
#define | MPU_REGION_SIZE_2GB 0x1E
#define | MPU_REGION_SIZE_4GB 0x1F
#define | MPU_NO_ACCESS 0x00
#define | MPU_PRIVILEGED_ACESS_USER_NO_ACCESS 0x01
#define | MPU_PRIVILEGED_RW_USER_READ_ONLY 0x02
#define | MPU_FULL_ACCESS 0x03
#define | MPU_UNPREDICTABLE 0x04
#define | MPU_PRIVILEGED_READ_ONLY_USER_NO_ACCESS 0x05
#define | MPU_READ_ONLY 0x06
#define | MPU_RASR_REGION_SIZE(n) ((uint32_t)(n<<1))
#define | MPU_RASR_ACCESS_PERMISSION(n) ((uint32_t)(n<<24))
#define | MPU_REGION_ENABLE ((uint32_t)(1<<0))

Functions

void | MemManage_Handler (void)
Memory Management interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main MPU program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
Bool | Led_State = FALSE

Define Documentation

#define MPU_FULL_ACCESS 0x03

Definition at line 65 of file mpu_test.c.

#define MPU_NO_ACCESS 0x00

Definition at line 62 of file mpu_test.c.

#define MPU_PRIVILEGED_ACESS_USER_NO_ACCESS 0x01

Definition at line 63 of file mpu_test.c.

#define MPU_PRIVILEGED_READ_ONLY_USER_NO_ACCESS 0x05

Definition at line 67 of file mpu_test.c.

#define MPU_PRIVILEGED_RW_USER_READ_ONLY 0x02

Definition at line 64 of file mpu_test.c.

#define MPU_RASR_ACCESS_PERMISSION ( n ) ((uint32_t)(n<<24))

Definition at line 72 of file mpu_test.c.

#define MPU_RASR_REGION_SIZE ( n ) ((uint32_t)(n<<1))

Definition at line 71 of file mpu_test.c.

#define MPU_READ_ONLY 0x06

Definition at line 68 of file mpu_test.c.

#define MPU_REGION_ENABLE ((uint32_t)(1<<0))

Definition at line 73 of file mpu_test.c.

#define MPU_REGION_SIZE_128B 0x06

Definition at line 34 of file mpu_test.c.

#define MPU_REGION_SIZE_128KB 0x10

Definition at line 44 of file mpu_test.c.

#define MPU_REGION_SIZE_128MB 0x1A

Definition at line 54 of file mpu_test.c.

#define MPU_REGION_SIZE_16KB 0x0D

Definition at line 41 of file mpu_test.c.

#define MPU_REGION_SIZE_16MB 0x17

Definition at line 51 of file mpu_test.c.

#define MPU_REGION_SIZE_1GB 0x1D

Definition at line 57 of file mpu_test.c.

#define MPU_REGION_SIZE_1KB 0x09

Definition at line 37 of file mpu_test.c.

#define MPU_REGION_SIZE_1MB 0x13

Definition at line 47 of file mpu_test.c.

#define MPU_REGION_SIZE_256B 0x07

Definition at line 35 of file mpu_test.c.

#define MPU_REGION_SIZE_256KB 0x11

Definition at line 45 of file mpu_test.c.

#define MPU_REGION_SIZE_256MB 0x1B

Definition at line 55 of file mpu_test.c.

#define MPU_REGION_SIZE_2GB 0x1E

Definition at line 58 of file mpu_test.c.

#define MPU_REGION_SIZE_2KB 0x0A

Definition at line 38 of file mpu_test.c.

#define MPU_REGION_SIZE_2MB 0x14

Definition at line 48 of file mpu_test.c.

#define MPU_REGION_SIZE_32B 0x04

Definition at line 32 of file mpu_test.c.

#define MPU_REGION_SIZE_32KB 0x0E

Definition at line 42 of file mpu_test.c.

#define MPU_REGION_SIZE_32MB 0x18

Definition at line 52 of file mpu_test.c.

#define MPU_REGION_SIZE_4GB 0x1F

Definition at line 59 of file mpu_test.c.

#define MPU_REGION_SIZE_4KB 0x0B

Definition at line 39 of file mpu_test.c.

#define MPU_REGION_SIZE_4MB 0x15

Definition at line 49 of file mpu_test.c.

#define MPU_REGION_SIZE_512B 0x08

Definition at line 36 of file mpu_test.c.

#define MPU_REGION_SIZE_512KB 0x12

Definition at line 46 of file mpu_test.c.

#define MPU_REGION_SIZE_512MB 0x1C

Definition at line 56 of file mpu_test.c.

#define MPU_REGION_SIZE_64B 0x05

Definition at line 33 of file mpu_test.c.

#define MPU_REGION_SIZE_64KB 0x0F

Definition at line 43 of file mpu_test.c.

#define MPU_REGION_SIZE_64MB 0x19

Definition at line 53 of file mpu_test.c.

#define MPU_REGION_SIZE_8KB 0x0C

Definition at line 40 of file mpu_test.c.

#define MPU_REGION_SIZE_8MB 0x16

Definition at line 50 of file mpu_test.c.

#define MPU_UNPREDICTABLE 0x04

Definition at line 66 of file mpu_test.c.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Privilege_mode/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Privilege_mode/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Privilege_mode/privilege.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Privilege_mode/privilege.c File Reference

This example used to test privilege feature of Cortex-M3 processor. More...

#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | IAR_LPC_1768
#define | THREAD_PRIVILEGED 0
#define | THREAD_UNPRIVILEGED 1
#define | THREAD_PRIVILEDGED_MASK 0xFFFFFFFE
#define | PRIVILEGE_LED 25
#define | PRIVILEGE_LEDPORT 1
#define | UNPRIVILEGE_LED 4
#define | UNPRIVILEGE_LEDPORT 0

Functions

void | SVC_Handler (void)
SVC Hander.
void | LED_Init (void)
Initialize LED.
void | Turn_on_LED (uint8_t Led_num)
Turn on LED.
void | Turn_off_LED (uint8_t Led_num)
Turn off LED.
int | c_entry (void)
c_entry: main function
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "LED2 (P0.4) will blink in un-privilege mode\n\r"

Detailed Description

This example used to test privilege feature of Cortex-M3 processor.

Version:
1.0
Date:
18. July. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file privilege.c.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/DMA/dac_dma.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/DMA/dac_dma.c File Reference

This example describes how to use DAC conversion and using DMA to transfer data. More...

#include "lpc17xx_dac.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_gpdma.h"

Go to the source code of this file.

Defines

#define | DMA_SIZE 1

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main DAC program body
int | main (void)

Variables

__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err
GPDMA_Channel_CFG_Type GPDMACfg

Detailed Description

This example describes how to use DAC conversion and using DMA to transfer data.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file dac_dma.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/DMA/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/DMA/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _GPDMA
#define | _DAC
#define | CHECK_PARAM(expr)

Define Documentation

#define _DAC

Definition at line 88 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/SineWave/dac_sinewave_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/SineWave/dac_sinewave_test.c File Reference

This example describes how to use DAC to generate a sine wave using DMA to transfer data. More...

#include "lpc17xx_dac.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_gpdma.h"

Go to the source code of this file.

Defines

#define | DMA_SIZE 60
#define | NUM_SINE_SAMPLE 60
#define | SINE_FREQ_IN_HZ 60
#define | PCLK_DAC_IN_MHZ 25

Functions

int | c_entry (void)
c_entry: Main DAC program body
int | main (void)

Variables

GPDMA_Channel_CFG_Type GPDMACfg

Detailed Description

This example describes how to use DAC to generate a sine wave using DMA to transfer data.

Version:
2.0
Date:
04. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file dac_sinewave_test.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/SineWave/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/SineWave/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _GPDMA
#define | _DAC
#define | CHECK_PARAM(expr)

Define Documentation

#define _DAC

Definition at line 88 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/Speaker/dac_speaker.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/Speaker/dac_speaker.c File Reference

This example used to test DAC peripheral through speaker. More...

#include "lpc17xx_dac.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Functions

int | c_entry (void)
c_entry: Main DAC program body
int | main (void)

Detailed Description

This example used to test DAC peripheral through speaker.

Version:
1.0
Date:
16. July. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file dac_speaker.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/Speaker/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/Speaker/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DAC
#define | CHECK_PARAM(expr)

Define Documentation

#define _DAC

Definition at line 88 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/WaveGenerate/dac_wave_generate.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/WaveGenerate/dac_wave_generate.c File Reference

This example describes how to use DAC to generate a sine wave, triangle wave or escalator wave. More...

#include "lpc17xx_dac.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_gpdma.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | DMA_SIZE_SINE 60
#define | NUM_SAMPLE_SINE 60
#define | DMA_SIZE 64
#define | NUM_SAMPLE 64
#define | SIGNAL_FREQ_IN_HZ 60
#define | PCLK_DAC_IN_MHZ 25
#define | DAC_GENERATE_SINE 1
#define | DAC_GENERATE_TRIANGLE 2
#define | DAC_GENERATE_ESCALATOR 3
#define | DAC_GENERATE_NONE 0

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main DAC program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"

Detailed Description

This example describes how to use DAC to generate a sine wave, triangle wave or escalator wave.

Version:
1.0
Date:
16. July. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file dac_wave_generate.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/WaveGenerate/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/DAC/WaveGenerate/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _GPDMA
#define | _DAC
#define | CHECK_PARAM(expr)

Define Documentation

#define _DAC

Definition at line 88 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/ADC.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/ADC.c File Reference
#include "LPC17xx.h"
#include "ADC.h"
#include "lpc17xx_emac.h"

Go to the source code of this file.

Functions

void | ADC_init (void)
void | ADC_startCnv (void)
void | ADC_stopCnv (void)
uint32_t | ADC_getCnv (void)

Function Documentation

uint32_t ADC_getCnv ( void )

Definition at line 75 of file ADC.c.

void ADC_init ( void )

Definition at line 27 of file ADC.c.

void ADC_startCnv ( void )

Definition at line 58 of file ADC.c.

void ADC_stopCnv ( void )

Definition at line 67 of file ADC.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/ADC.h File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/ADC.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | ADC_VALUE_MAX 0xFFF

Functions

void | ADC_init (void)
void | ADC_startCnv (void)
void | ADC_stopCnv (void)
uint32_t | ADC_getCnv (void)

Define Documentation

#define ADC_VALUE_MAX 0xFFF

Definition at line 25 of file ADC.h.

Function Documentation

uint32_t ADC_getCnv ( void )

Definition at line 75 of file ADC.c.

void ADC_init ( void )

Definition at line 27 of file ADC.c.

void ADC_startCnv ( void )

Definition at line 58 of file ADC.c.

void ADC_stopCnv ( void )

Definition at line 67 of file ADC.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/easyweb.c File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/easyweb.c File Reference
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include "adc.h"
#include "lpc17xx_libcfg.h"
#include "EMAC.h"
#include "easyweb.h"
#include "tcpip.h"
#include "webpage.h"

Go to the source code of this file.

Defines

#define | extern

Functions

int | main (void)
void | HTTPServer (void)
unsigned int | GetAD7Val (void)
unsigned int | GetTempVal (void)
void | InsertDynamicValues (void)

Define Documentation

#define extern

Definition at line 21 of file easyweb.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/easyweb.h File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/easyweb.h File Reference

Go to the source code of this file.

Defines

#define | HTTP_SEND_PAGE 0x01

Functions

void | InitOsc (void)
void | InitPorts (void)
void | HTTPServer (void)
void | InsertDynamicValues (void)
unsigned int | GetAD7Val (void)
unsigned int | GetTempVal (void)

Variables

const unsigned char | GetResponse []
unsigned char * | PWebSide
unsigned int | HTTPBytesToSend
unsigned char | HTTPStatus

Define Documentation

#define HTTP_SEND_PAGE 0x01

Definition at line 35 of file easyweb.h.

Function Documentation

void InitOsc ( void )
void InitPorts ( void )

Variable Documentation

const unsigned char GetResponse[]
Initial value:

{
  "HTTP/1.0 200 OK\r\n"
  "Content-Type: text/html\r\n"
  "\r\n"
}

Definition at line 17 of file easyweb.h.

unsigned int HTTPBytesToSend

Definition at line 32 of file easyweb.h.

unsigned char HTTPStatus

Definition at line 34 of file easyweb.h.

unsigned char* PWebSide

Definition at line 31 of file easyweb.h.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/EMAC.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/EMAC.c File Reference
#include "EMAC.h"
#include "tcpip.h"
#include "lpc17xx_emac.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include <stdio.h>

Go to the source code of this file.

Defines

#define | DB _DBG((uint8_t *)db)

Functions

void | Init_EMAC (void)
unsigned short | ReadFrame_EMAC (void)
unsigned short | ReadFrameBE_EMAC (void)
void | CopyFromFrame_EMAC (void *Dest, unsigned short Size)
void | DummyReadFrame_EMAC (unsigned short Size)
unsigned short | StartReadFrame (void)
void | EndReadFrame (void)
unsigned int | CheckFrameReceived (void)
void | RequestSend (unsigned short FrameSize)
unsigned int | Rdy4Tx (void)
void | WriteFrame_EMAC (unsigned short Data)
void | CopyToFrame_EMAC (void *Source, unsigned int Size)

Variables

char | db [64]

Define Documentation

#define DB _DBG((uint8_t *)db)

Definition at line 26 of file EMAC.c.

Function Documentation

unsigned int CheckFrameReceived ( void )

Definition at line 184 of file EMAC.c.

void CopyFromFrame_EMAC | ( | void * | Dest,
 |  | unsigned short | Size
 | ) |  |

Definition at line 134 of file EMAC.c.

void CopyToFrame_EMAC | ( | void * | Source,
 |  | unsigned int | Size
 | ) |  |

Definition at line 219 of file EMAC.c.

void DummyReadFrame_EMAC ( unsigned short Size )

Definition at line 152 of file EMAC.c.

void EndReadFrame ( void )

Definition at line 178 of file EMAC.c.

void Init_EMAC ( void )

Definition at line 40 of file EMAC.c.

unsigned int Rdy4Tx ( void )

Definition at line 202 of file EMAC.c.

unsigned short ReadFrame_EMAC ( void )

Definition at line 111 of file EMAC.c.

unsigned short ReadFrameBE_EMAC ( void )

Definition at line 120 of file EMAC.c.

void RequestSend ( unsigned short FrameSize )

Definition at line 194 of file EMAC.c.

unsigned short StartReadFrame ( void )

Definition at line 163 of file EMAC.c.

void WriteFrame_EMAC ( unsigned short Data )

Definition at line 209 of file EMAC.c.

Variable Documentation

char db[64]

Definition at line 27 of file EMAC.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/EMAC.h File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/EMAC.h File Reference
#include "lpc17xx_emac.h"

Go to the source code of this file.

Defines

#define | MYMAC_1 0x1E
#define | MYMAC_2 0x30
#define | MYMAC_3 0x6c
#define | MYMAC_4 0xa2
#define | MYMAC_5 0x45
#define | MYMAC_6 0x5e

Functions

void | Init_EMAC (void)
unsigned short | ReadFrameBE_EMAC (void)
void | CopyToFrame_EMAC (void *Source, unsigned int Size)
void | CopyFromFrame_EMAC (void *Dest, unsigned short Size)
void | DummyReadFrame_EMAC (unsigned short Size)
unsigned short | StartReadFrame (void)
void | EndReadFrame (void)
unsigned int | CheckFrameReceived (void)
void | RequestSend (unsigned short FrameSize)
unsigned int | Rdy4Tx (void)

Define Documentation

#define MYMAC_1 0x1E

Definition at line 16 of file EMAC.h.

#define MYMAC_2 0x30

Definition at line 17 of file EMAC.h.

#define MYMAC_3 0x6c

Definition at line 18 of file EMAC.h.

#define MYMAC_4 0xa2

Definition at line 19 of file EMAC.h.

#define MYMAC_5 0x45

Definition at line 20 of file EMAC.h.

#define MYMAC_6 0x5e

Definition at line 21 of file EMAC.h.

Function Documentation

unsigned int CheckFrameReceived ( void )

Definition at line 184 of file EMAC.c.

void CopyFromFrame_EMAC | ( | void * | Dest,
 |  | unsigned short | Size
 | ) |  |

Definition at line 134 of file EMAC.c.

void CopyToFrame_EMAC | ( | void * | Source,
 |  | unsigned int | Size
 | ) |  |

Definition at line 219 of file EMAC.c.

void DummyReadFrame_EMAC ( unsigned short Size )

Definition at line 152 of file EMAC.c.

void EndReadFrame ( void )

Definition at line 178 of file EMAC.c.

void Init_EMAC ( void )

Definition at line 40 of file EMAC.c.

unsigned int Rdy4Tx ( void )

Definition at line 202 of file EMAC.c.

unsigned short ReadFrameBE_EMAC ( void )

Definition at line 120 of file EMAC.c.

void RequestSend ( unsigned short FrameSize )

Definition at line 194 of file EMAC.c.

unsigned short StartReadFrame ( void )

Definition at line 163 of file EMAC.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _EMAC
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 46 of file lpc17xx_libcfg.h.

#define _EMAC

Definition at line 123 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 55 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 56 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 139 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 38 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/Retarget.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/Retarget.c File Reference

Go to the source code of this file.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/tcpip.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/tcpip.c File Reference
#include "tcpip.h"
#include "EMAC.h"
#include <string.h>
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "adc.h"
#include "debug_frmwrk.h"
#include <stdio.h>

Go to the source code of this file.

Defines

#define | DB _DBG((uint8_t *)db_)
#define | SYSTICK_PERIOD 210000UL

Functions

void | SysTick_Handler (void)
SysTick handler sub-routine (1ms)
void | LED_Init (void)
void | TCPLowLevelInit (void)
void | TCPPassiveOpen (void)
void | TCPActiveOpen (void)
void | TCPClose (void)
void | TCPReleaseRxBuffer (void)
void | TCPTransmitTxBuffer (void)
unsigned int | IsBroadcast (void)
void | DoNetworkStuff (void)
void | ProcessEthBroadcastFrame (void)
void | ProcessEthIAFrame (void)
void | ProcessICMPFrame (void)
void | ProcessTCPFrame (void)
void | PrepareARP_REQUEST (void)
void | PrepareARP_ANSWER (void)
void | PrepareICMP_ECHO_REPLY (void)
void | PrepareTCP_FRAME (unsigned short TCPCode)
void | PrepareTCP_DATA_FRAME (void)
unsigned short | CalcChecksum (void *Start, unsigned short Count, unsigned char IsTCP)
void | TCPStartRetryTimer (void)
void | TCPStartTimeWaitTimer (void)
void | TCPRestartTimer (void)
void | TCPStopTimer (void)
void | TCPHandleRetransmission (void)
void | TCPHandleTimeout (void)
void | SendFrame1 (void)
void | SendFrame2 (void)
void | WriteWBE (unsigned char *Add, unsigned short Data)
void | WriteDWBE (unsigned char *Add, unsigned long Data)
unsigned short | SwapBytes (unsigned short Data)

Variables

char | db_ [64]
uint16_t | _tickVal
const unsigned char | MyMAC [6]

Define Documentation

#define DB _DBG((uint8_t *)db_)

Definition at line 28 of file tcpip.c.

#define SYSTICK_PERIOD 210000UL

Definition at line 50 of file tcpip.c.

Function Documentation

unsigned short CalcChecksum | ( | void * | Start,
 |  | unsigned short | Count,
 |  | unsigned char | IsTCP
 | ) |  |

Definition at line 900 of file tcpip.c.

void DoNetworkStuff ( void )

Definition at line 246 of file tcpip.c.

unsigned int IsBroadcast ( void )

Definition at line 224 of file tcpip.c.

void LED_Init ( void )

Definition at line 55 of file tcpip.c.

void PrepareARP_ANSWER ( void )

Definition at line 746 of file tcpip.c.

void PrepareARP_REQUEST ( void )

Definition at line 718 of file tcpip.c.

void PrepareICMP_ECHO_REPLY ( void )

Definition at line 770 of file tcpip.c.

void PrepareTCP_DATA_FRAME ( void )

Definition at line 865 of file tcpip.c.

void PrepareTCP_FRAME ( unsigned short TCPCode )

Definition at line 810 of file tcpip.c.

void ProcessEthBroadcastFrame ( void )

Definition at line 372 of file tcpip.c.

void ProcessEthIAFrame ( void )

Definition at line 395 of file tcpip.c.

void ProcessICMPFrame ( void )

Definition at line 447 of file tcpip.c.

void ProcessTCPFrame ( void )

Definition at line 467 of file tcpip.c.

void SendFrame1 ( void )

Definition at line 1023 of file tcpip.c.

void SendFrame2 ( void )

Definition at line 1031 of file tcpip.c.

unsigned short SwapBytes ( unsigned short Data )

Definition at line 1061 of file tcpip.c.

void SysTick_Handler ( void )

SysTick handler sub-routine (1ms)

SysTick interrupt handler.

Parameters:
[in] None
Returns:
None
Parameters:
None
Returns:
None

Definition at line 1006 of file tcpip.c.

void TCPActiveOpen ( void )

Definition at line 153 of file tcpip.c.

void TCPClose ( void )

Definition at line 170 of file tcpip.c.

void TCPHandleRetransmission ( void )

Definition at line 972 of file tcpip.c.

void TCPHandleTimeout ( void )

Definition at line 987 of file tcpip.c.

void TCPLowLevelInit ( void )

Definition at line 100 of file tcpip.c.

void TCPPassiveOpen ( void )

Definition at line 139 of file tcpip.c.

void TCPReleaseRxBuffer ( void )

Definition at line 196 of file tcpip.c.

void TCPRestartTimer ( void )

Definition at line 955 of file tcpip.c.

void TCPStartRetryTimer ( void )

Definition at line 934 of file tcpip.c.

void TCPStartTimeWaitTimer ( void )

Definition at line 945 of file tcpip.c.

void TCPStopTimer ( void )

Definition at line 963 of file tcpip.c.

void TCPTransmitTxBuffer ( void )

Definition at line 206 of file tcpip.c.

void WriteDWBE | ( | unsigned char * | Add,
 |  | unsigned long | Data
 | ) |  |

Definition at line 1050 of file tcpip.c.

void WriteWBE | ( | unsigned char * | Add,
 |  | unsigned short | Data
 | ) |  |

Definition at line 1040 of file tcpip.c.

Variable Documentation

uint16_t _tickVal

Definition at line 30 of file tcpip.c.

char db_[64]

Definition at line 29 of file tcpip.c.

const unsigned char MyMAC[6]
Initial value:

{
  MYMAC_1, MYMAC_2, MYMAC_3,
  MYMAC_4, MYMAC_5, MYMAC_6
}

Definition at line 42 of file tcpip.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/tcpip.h File Reference

Defines | Enumerations | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/tcpip.h File Reference

Go to the source code of this file.

Defines

#define | MYIP_1 192
#define | MYIP_2 168
#define | MYIP_3 0
#define | MYIP_4 100
#define | SUBMASK_1 255
#define | SUBMASK_2 255
#define | SUBMASK_3 255
#define | SUBMASK_4 0
#define | GWIP_1 192
#define | GWIP_2 168
#define | GWIP_3 0
#define | GWIP_4 254
#define | RETRY_TIMEOUT 8
#define | FIN_TIMEOUT 2
#define | MAX_RETRYS 4
#define | MAX_TCP_TX_DATA_SIZE 512
#define | MAX_TCP_RX_DATA_SIZE 256
#define | MAX_ETH_TX_DATA_SIZE 60
#define | DEFAULT_TTL 64
#define | ETH_DA_OFS 0
#define | ETH_SA_OFS 6
#define | ETH_TYPE_OFS 12
#define | ETH_DATA_OFS 14
#define | ETH_HEADER_SIZE 14
#define | FRAME_ARP 0x0806
#define | FRAME_IP 0x0800
#define | IP_VER_IHL_TOS_OFS ETH_DATA_OFS + 0
#define | IP_TOTAL_LENGTH_OFS ETH_DATA_OFS + 2
#define | IP_IDENT_OFS ETH_DATA_OFS + 4
#define | IP_FLAGS_FRAG_OFS ETH_DATA_OFS + 6
#define | IP_TTL_PROT_OFS ETH_DATA_OFS + 8
#define | IP_HEAD_CHKSUM_OFS ETH_DATA_OFS + 10
#define | IP_SOURCE_OFS ETH_DATA_OFS + 12
#define | IP_DESTINATION_OFS ETH_DATA_OFS + 16
#define | IP_DATA_OFS ETH_DATA_OFS + 20
#define | IP_HEADER_SIZE 20
#define | IP_VER_IHL 0x4500
#define | IP_TOS_D 0x0010
#define | IP_TOS_T 0x0008
#define | IP_TOS_R 0x0004
#define | IP_FLAG_DONTFRAG 0x4000
#define | IP_FLAG_MOREFRAG 0x2000
#define | IP_FRAGOFS_MASK 0x1FFF
#define | PROT_ICMP 1
#define | PROT_TCP 6
#define | PROT_UDP 17
#define | ARP_HARDW_OFS ETH_DATA_OFS + 0
#define | ARP_PROT_OFS ETH_DATA_OFS + 2
#define | ARP_HLEN_PLEN_OFS ETH_DATA_OFS + 4
#define | ARP_OPCODE_OFS ETH_DATA_OFS + 6
#define | ARP_SENDER_HA_OFS ETH_DATA_OFS + 8
#define | ARP_SENDER_IP_OFS ETH_DATA_OFS + 14
#define | ARP_TARGET_HA_OFS ETH_DATA_OFS + 18
#define | ARP_TARGET_IP_OFS ETH_DATA_OFS + 24
#define | ARP_FRAME_SIZE 28
#define | HARDW_ETH10 1
#define | IP_HLEN_PLEN 0x0604
#define | OP_ARP_REQUEST 1
#define | OP_ARP_ANSWER 2
#define | ICMP_TYPE_CODE_OFS IP_DATA_OFS + 0
#define | ICMP_CHKSUM_OFS IP_DATA_OFS + 2
#define | ICMP_DATA_OFS IP_DATA_OFS + 4
#define | ICMP_HEADER_SIZE 4
#define | ICMP_ECHO 8
#define | ICMP_ECHO_REPLY 0
#define | TCP_SRCPORT_OFS IP_DATA_OFS + 0
#define | TCP_DESTPORT_OFS IP_DATA_OFS + 2
#define | TCP_SEQNR_OFS IP_DATA_OFS + 4
#define | TCP_ACKNR_OFS IP_DATA_OFS + 8
#define | TCP_DATA_CODE_OFS IP_DATA_OFS + 12
#define | TCP_WINDOW_OFS IP_DATA_OFS + 14
#define | TCP_CHKSUM_OFS IP_DATA_OFS + 16
#define | TCP_URGENT_OFS IP_DATA_OFS + 18
#define | TCP_DATA_OFS IP_DATA_OFS + 20
#define | TCP_HEADER_SIZE 20
#define | DATA_OFS_MASK 0xF000
#define | TCP_CODE_FIN 0x0001
#define | TCP_CODE_SYN 0x0002
#define | TCP_CODE_RST 0x0004
#define | TCP_CODE_PSH 0x0008
#define | TCP_CODE_ACK 0x0010
#define | TCP_CODE_URG 0x0020
#define | TCP_OPT_MSS 0x0204
#define | TCP_OPT_MSS_SIZE 4
#define | TCP_PORT_ECHO 7
#define | TCP_PORT_DISCARD 9
#define | TCP_PORT_DAYTIME 13
#define | TCP_PORT_QOTD 17
#define | TCP_PORT_CHARGEN 19
#define | TCP_PORT_HTTP 80
#define | SWAPB(Word) ((unsigned short)((Word) << 8) | ((Word) >> 8))
#define | TxFrame1 ((unsigned char *)_TxFrame1)
#define | TxFrame2 ((unsigned char *)_TxFrame2)
#define | RxTCPBuffer ((unsigned char *)_RxTCPBuffer)
#define | SEND_FRAME1 0x01
#define | SEND_FRAME2 0x02
#define | TCP_ACTIVE_OPEN 0x01
#define | IP_ADDR_RESOLVED 0x02
#define | TCP_TIMER_RUNNING 0x04
#define | TIMER_TYPE_RETRY 0x08
#define | TCP_CLOSE_REQUESTED 0x10
#define | SOCK_ACTIVE 0x01
#define | SOCK_CONNECTED 0x02
#define | SOCK_DATA_AVAILABLE 0x04
#define | SOCK_TX_BUF_RELEASED 0x08
#define | SOCK_ERROR_MASK 0xF0
#define | SOCK_ERR_OK 0x00
#define | SOCK_ERR_ARP_TIMEOUT 0x10
#define | SOCK_ERR_TCP_TIMEOUT 0x20
#define | SOCK_ERR_CONN_RESET 0x30
#define | SOCK_ERR_REMOTE 0x40
#define | SOCK_ERR_ETHERNET 0x50
#define | TCP_TX_BUF ((unsigned char *)TxFrame1 + ETH_HEADER_SIZE + IP_HEADER_SIZE + TCP_HEADER_SIZE)
#define | TCP_RX_BUF ((unsigned char *)RxTCPBuffer)

Enumerations

enum TTCPStateMachine {
CLOSED, LISTENING, SYN_SENT, SYN_RECD,
ESTABLISHED, FIN_WAIT_1, FIN_WAIT_2, CLOSE_WAIT,
CLOSING, LAST_ACK, TIME_WAIT
}
enum TLastFrameSent {
ARP_REQUEST, TCP_SYN_FRAME, TCP_SYN_ACK_FRAME, TCP_FIN_FRAME,
TCP_DATA_FRAME
}

Functions

void | DoNetworkStuff (void)
void | ProcessEthBroadcastFrame (void)
void | ProcessEthIAFrame (void)
void | ProcessICMPFrame (void)
void | ProcessTCPFrame (void)
void | PrepareARP_REQUEST (void)
void | PrepareARP_ANSWER (void)
void | PrepareICMP_ECHO_REPLY (void)
void | PrepareTCP_FRAME (unsigned short TCPCode)
void | PrepareTCP_DATA_FRAME (void)
void | SendFrame1 (void)
void | SendFrame2 (void)
void | TCPStartRetryTimer (void)
void | TCPStartTimeWaitTimer (void)
void | TCPRestartTimer (void)
void | TCPStopTimer (void)
void | TCPHandleRetransmission (void)
void | TCPHandleTimeout (void)
unsigned short | CalcChecksum (void *Start, unsigned short Count, unsigned char IsTCP)
unsigned short | SwapBytes (unsigned short Data)
void | WriteWBE (unsigned char *Add, unsigned short Data)
void | WriteDWBE (unsigned char *Add, unsigned long Data)
void | TCPLowLevelInit (void)
void | TCPPassiveOpen (void)
void | TCPActiveOpen (void)
void | TCPClose (void)
void | TCPReleaseRxBuffer (void)
void | TCPTransmitTxBuffer (void)
void | SysTick_Handler (void)
SysTick handler sub-routine (1ms)

Variables

const unsigned short | MyIP [2]
const unsigned short | SubnetMask [2]
const unsigned short | GatewayIP [2]
const unsigned char | MyMAC [6]
TTCPStateMachine TCPStateMachine
TLastFrameSent LastFrameSent
unsigned short | ISNGenHigh
unsigned long | TCPSeqNr
unsigned long | TCPUNASeqNr
unsigned long | TCPAckNr
unsigned char | TCPTimer
unsigned char | RetryCounter
unsigned short | RecdFrameLength
unsigned short | RecdFrameMAC [3]
unsigned short | RecdFrameIP [2]
unsigned short | RecdIPFrameLength
unsigned short | TxFrame1Size
unsigned char | TxFrame2Size
unsigned char | TransmitControl
unsigned char | TCPFlags
unsigned short | TCPRxDataCount
unsigned short | TCPTxDataCount
unsigned short | TCPLocalPort
unsigned short | TCPRemotePort
unsigned short | RemoteMAC [3]
unsigned short | RemoteIP [2]
unsigned char | SocketStatus

Define Documentation

#define ARP_FRAME_SIZE 28

Definition at line 93 of file tcpip.h.

#define ARP_HARDW_OFS ETH_DATA_OFS + 0

Definition at line 85 of file tcpip.h.

#define ARP_HLEN_PLEN_OFS ETH_DATA_OFS + 4

Definition at line 87 of file tcpip.h.

#define ARP_OPCODE_OFS ETH_DATA_OFS + 6

Definition at line 88 of file tcpip.h.

#define ARP_PROT_OFS ETH_DATA_OFS + 2

Definition at line 86 of file tcpip.h.

#define ARP_SENDER_HA_OFS ETH_DATA_OFS + 8

Definition at line 89 of file tcpip.h.

#define ARP_SENDER_IP_OFS ETH_DATA_OFS + 14

Definition at line 90 of file tcpip.h.

#define ARP_TARGET_HA_OFS ETH_DATA_OFS + 18

Definition at line 91 of file tcpip.h.

#define ARP_TARGET_IP_OFS ETH_DATA_OFS + 24

Definition at line 92 of file tcpip.h.

#define DATA_OFS_MASK 0xF000

Definition at line 121 of file tcpip.h.

#define DEFAULT_TTL 64

Definition at line 47 of file tcpip.h.

#define ETH_DA_OFS 0

Definition at line 50 of file tcpip.h.

#define ETH_DATA_OFS 14

Definition at line 53 of file tcpip.h.

#define ETH_HEADER_SIZE 14

Definition at line 54 of file tcpip.h.

#define ETH_SA_OFS 6

Definition at line 51 of file tcpip.h.

#define ETH_TYPE_OFS 12

Definition at line 52 of file tcpip.h.

#define FIN_TIMEOUT 2

Definition at line 34 of file tcpip.h.

#define FRAME_ARP 0x0806

Definition at line 56 of file tcpip.h.

#define FRAME_IP 0x0800

Definition at line 57 of file tcpip.h.

#define GWIP_1 192

Definition at line 28 of file tcpip.h.

#define GWIP_2 168

Definition at line 29 of file tcpip.h.

#define GWIP_3 0

Definition at line 30 of file tcpip.h.

#define GWIP_4 254

Definition at line 31 of file tcpip.h.

#define HARDW_ETH10 1

Definition at line 95 of file tcpip.h.

#define ICMP_CHKSUM_OFS IP_DATA_OFS + 2

Definition at line 102 of file tcpip.h.

#define ICMP_DATA_OFS IP_DATA_OFS + 4

Definition at line 103 of file tcpip.h.

#define ICMP_ECHO 8

Definition at line 106 of file tcpip.h.

#define ICMP_ECHO_REPLY 0

Definition at line 107 of file tcpip.h.

#define ICMP_HEADER_SIZE 4

Definition at line 104 of file tcpip.h.

#define ICMP_TYPE_CODE_OFS IP_DATA_OFS + 0

Definition at line 101 of file tcpip.h.

#define IP_ADDR_RESOLVED 0x02

Definition at line 244 of file tcpip.h.

#define IP_DATA_OFS ETH_DATA_OFS + 20

Definition at line 68 of file tcpip.h.

#define IP_DESTINATION_OFS ETH_DATA_OFS + 16

Definition at line 67 of file tcpip.h.

#define IP_FLAG_DONTFRAG 0x4000

Definition at line 76 of file tcpip.h.

#define IP_FLAG_MOREFRAG 0x2000

Definition at line 77 of file tcpip.h.

#define IP_FLAGS_FRAG_OFS ETH_DATA_OFS + 6

Definition at line 63 of file tcpip.h.

#define IP_FRAGOFS_MASK 0x1FFF

Definition at line 78 of file tcpip.h.

#define IP_HEAD_CHKSUM_OFS ETH_DATA_OFS + 10

Definition at line 65 of file tcpip.h.

#define IP_HEADER_SIZE 20

Definition at line 69 of file tcpip.h.

#define IP_HLEN_PLEN 0x0604

Definition at line 96 of file tcpip.h.

#define IP_IDENT_OFS ETH_DATA_OFS + 4

Definition at line 62 of file tcpip.h.

#define IP_SOURCE_OFS ETH_DATA_OFS + 12

Definition at line 66 of file tcpip.h.

#define IP_TOS_D 0x0010

Definition at line 72 of file tcpip.h.

#define IP_TOS_R 0x0004

Definition at line 74 of file tcpip.h.

#define IP_TOS_T 0x0008

Definition at line 73 of file tcpip.h.

#define IP_TOTAL_LENGTH_OFS ETH_DATA_OFS + 2

Definition at line 61 of file tcpip.h.

#define IP_TTL_PROT_OFS ETH_DATA_OFS + 8

Definition at line 64 of file tcpip.h.

#define IP_VER_IHL 0x4500

Definition at line 71 of file tcpip.h.

#define IP_VER_IHL_TOS_OFS ETH_DATA_OFS + 0

Definition at line 60 of file tcpip.h.

#define MAX_ETH_TX_DATA_SIZE 60

Definition at line 44 of file tcpip.h.

#define MAX_RETRYS 4

Definition at line 36 of file tcpip.h.

#define MAX_TCP_RX_DATA_SIZE 256

Definition at line 40 of file tcpip.h.

#define MAX_TCP_TX_DATA_SIZE 512

Definition at line 39 of file tcpip.h.

#define MYIP_1 192

Definition at line 18 of file tcpip.h.

#define MYIP_2 168

Definition at line 19 of file tcpip.h.

#define MYIP_3 0

Definition at line 20 of file tcpip.h.

#define MYIP_4 100

Definition at line 21 of file tcpip.h.

#define OP_ARP_ANSWER 2

Definition at line 98 of file tcpip.h.

#define OP_ARP_REQUEST 1

Definition at line 97 of file tcpip.h.

#define PROT_ICMP 1

Definition at line 80 of file tcpip.h.

#define PROT_TCP 6

Definition at line 81 of file tcpip.h.

#define PROT_UDP 17

Definition at line 82 of file tcpip.h.

#define RETRY_TIMEOUT 8

Definition at line 33 of file tcpip.h.

#define RxTCPBuffer ((unsigned char *)_RxTCPBuffer)

Definition at line 233 of file tcpip.h.

#define SEND_FRAME1 0x01

Definition at line 239 of file tcpip.h.

#define SEND_FRAME2 0x02

Definition at line 240 of file tcpip.h.

#define SOCK_ACTIVE 0x01

Definition at line 303 of file tcpip.h.

#define SOCK_CONNECTED 0x02

Definition at line 304 of file tcpip.h.

#define SOCK_DATA_AVAILABLE 0x04

Definition at line 305 of file tcpip.h.

#define SOCK_ERR_ARP_TIMEOUT 0x10

Definition at line 310 of file tcpip.h.

#define SOCK_ERR_CONN_RESET 0x30

Definition at line 312 of file tcpip.h.

#define SOCK_ERR_ETHERNET 0x50

Definition at line 314 of file tcpip.h.

#define SOCK_ERR_OK 0x00

Definition at line 309 of file tcpip.h.

#define SOCK_ERR_REMOTE 0x40

Definition at line 313 of file tcpip.h.

#define SOCK_ERR_TCP_TIMEOUT 0x20

Definition at line 311 of file tcpip.h.

#define SOCK_ERROR_MASK 0xF0

Definition at line 308 of file tcpip.h.

#define SOCK_TX_BUF_RELEASED 0x08

Definition at line 306 of file tcpip.h.

#define SUBMASK_1 255

Definition at line 23 of file tcpip.h.

#define SUBMASK_2 255

Definition at line 24 of file tcpip.h.

#define SUBMASK_3 255

Definition at line 25 of file tcpip.h.

#define SUBMASK_4 0

Definition at line 26 of file tcpip.h.

#define SWAPB ( Word ) ((unsigned short)((Word) << 8) | ((Word) >> 8))

Definition at line 142 of file tcpip.h.

#define TCP_ACKNR_OFS IP_DATA_OFS + 8

Definition at line 113 of file tcpip.h.

#define TCP_ACTIVE_OPEN 0x01

Definition at line 243 of file tcpip.h.

#define TCP_CHKSUM_OFS IP_DATA_OFS + 16

Definition at line 116 of file tcpip.h.

#define TCP_CLOSE_REQUESTED 0x10

Definition at line 247 of file tcpip.h.

#define TCP_CODE_ACK 0x0010

Definition at line 127 of file tcpip.h.

#define TCP_CODE_FIN 0x0001

Definition at line 123 of file tcpip.h.

#define TCP_CODE_PSH 0x0008

Definition at line 126 of file tcpip.h.

#define TCP_CODE_RST 0x0004

Definition at line 125 of file tcpip.h.

#define TCP_CODE_SYN 0x0002

Definition at line 124 of file tcpip.h.

#define TCP_CODE_URG 0x0020

Definition at line 128 of file tcpip.h.

#define TCP_DATA_CODE_OFS IP_DATA_OFS + 12

Definition at line 114 of file tcpip.h.

#define TCP_DATA_OFS IP_DATA_OFS + 20

Definition at line 118 of file tcpip.h.

#define TCP_DESTPORT_OFS IP_DATA_OFS + 2

Definition at line 111 of file tcpip.h.

#define TCP_HEADER_SIZE 20

Definition at line 119 of file tcpip.h.

#define TCP_OPT_MSS 0x0204

Definition at line 130 of file tcpip.h.

#define TCP_OPT_MSS_SIZE 4

Definition at line 131 of file tcpip.h.

#define TCP_PORT_CHARGEN 19

Definition at line 138 of file tcpip.h.

#define TCP_PORT_DAYTIME 13

Definition at line 136 of file tcpip.h.

#define TCP_PORT_DISCARD 9

Definition at line 135 of file tcpip.h.

#define TCP_PORT_ECHO 7

Definition at line 134 of file tcpip.h.

#define TCP_PORT_HTTP 80

Definition at line 139 of file tcpip.h.

#define TCP_PORT_QOTD 17

Definition at line 137 of file tcpip.h.

#define TCP_RX_BUF ((unsigned char *)RxTCPBuffer)

Definition at line 318 of file tcpip.h.

#define TCP_SEQNR_OFS IP_DATA_OFS + 4

Definition at line 112 of file tcpip.h.

#define TCP_SRCPORT_OFS IP_DATA_OFS + 0

Definition at line 110 of file tcpip.h.

#define TCP_TIMER_RUNNING 0x04

Definition at line 245 of file tcpip.h.

#define TCP_TX_BUF ((unsigned char *)TxFrame1 + ETH_HEADER_SIZE + IP_HEADER_SIZE + TCP_HEADER_SIZE)

Definition at line 317 of file tcpip.h.

#define TCP_URGENT_OFS IP_DATA_OFS + 18

Definition at line 117 of file tcpip.h.

#define TCP_WINDOW_OFS IP_DATA_OFS + 14

Definition at line 115 of file tcpip.h.

#define TIMER_TYPE_RETRY 0x08

Definition at line 246 of file tcpip.h.

#define TxFrame1 ((unsigned char *)_TxFrame1)

Definition at line 231 of file tcpip.h.

#define TxFrame2 ((unsigned char *)_TxFrame2)

Definition at line 232 of file tcpip.h.

Enumeration Type Documentation

enum TLastFrameSent
Enumerator:
ARP_REQUEST
TCP_SYN_FRAME
TCP_SYN_ACK_FRAME
TCP_FIN_FRAME
TCP_DATA_FRAME

Definition at line 160 of file tcpip.h.

enum TTCPStateMachine
Enumerator:
CLOSED
LISTENING
SYN_SENT
SYN_RECD
ESTABLISHED
FIN_WAIT_1
FIN_WAIT_2
CLOSE_WAIT
CLOSING
LAST_ACK
TIME_WAIT

Definition at line 146 of file tcpip.h.

Function Documentation

unsigned short CalcChecksum | ( | void * | Start,
 |  | unsigned short | Count,
 |  | unsigned char | IsTCP
 | ) |  |

Definition at line 900 of file tcpip.c.

void DoNetworkStuff ( void )

Definition at line 246 of file tcpip.c.

void PrepareARP_ANSWER ( void )

Definition at line 746 of file tcpip.c.

void PrepareARP_REQUEST ( void )

Definition at line 718 of file tcpip.c.

void PrepareICMP_ECHO_REPLY ( void )

Definition at line 770 of file tcpip.c.

void PrepareTCP_DATA_FRAME ( void )

Definition at line 865 of file tcpip.c.

void PrepareTCP_FRAME ( unsigned short TCPCode )

Definition at line 810 of file tcpip.c.

void ProcessEthBroadcastFrame ( void )

Definition at line 372 of file tcpip.c.

void ProcessEthIAFrame ( void )

Definition at line 395 of file tcpip.c.

void ProcessICMPFrame ( void )

Definition at line 447 of file tcpip.c.

void ProcessTCPFrame ( void )

Definition at line 467 of file tcpip.c.

void SendFrame1 ( void )

Definition at line 1023 of file tcpip.c.

void SendFrame2 ( void )

Definition at line 1031 of file tcpip.c.

unsigned short SwapBytes ( unsigned short Data )

Definition at line 1061 of file tcpip.c.

void TCPActiveOpen ( void )

Definition at line 153 of file tcpip.c.

void TCPClose ( void )

Definition at line 170 of file tcpip.c.

void TCPHandleRetransmission ( void )

Definition at line 972 of file tcpip.c.

void TCPHandleTimeout ( void )

Definition at line 987 of file tcpip.c.

void TCPLowLevelInit ( void )

Definition at line 100 of file tcpip.c.

void TCPPassiveOpen ( void )

Definition at line 139 of file tcpip.c.

void TCPReleaseRxBuffer ( void )

Definition at line 196 of file tcpip.c.

void TCPRestartTimer ( void )

Definition at line 955 of file tcpip.c.

void TCPStartRetryTimer ( void )

Definition at line 934 of file tcpip.c.

void TCPStartTimeWaitTimer ( void )

Definition at line 945 of file tcpip.c.

void TCPStopTimer ( void )

Definition at line 963 of file tcpip.c.

void TCPTransmitTxBuffer ( void )

Definition at line 206 of file tcpip.c.

void WriteDWBE | ( | unsigned char * | Add,
 |  | unsigned long | Data
 | ) |  |

Definition at line 1050 of file tcpip.c.

void WriteWBE | ( | unsigned char * | Add,
 |  | unsigned short | Data
 | ) |  |

Definition at line 1040 of file tcpip.c.

Variable Documentation

const unsigned short GatewayIP[2]
unsigned short ISNGenHigh
TLastFrameSent LastFrameSent
const unsigned short MyIP[2]
const unsigned char MyMAC[6]

Definition at line 42 of file tcpip.c.

unsigned short RecdFrameIP[2]
unsigned short RecdFrameLength
unsigned short RecdFrameMAC[3]
unsigned short RecdIPFrameLength
unsigned short RemoteIP[2]
unsigned short RemoteMAC[3]
unsigned char RetryCounter
unsigned char SocketStatus
const unsigned short SubnetMask[2]
unsigned long TCPAckNr
unsigned char TCPFlags
unsigned short TCPLocalPort
unsigned short TCPRemotePort
unsigned short TCPRxDataCount
unsigned long TCPSeqNr
TTCPStateMachine TCPStateMachine
unsigned char TCPTimer
unsigned short TCPTxDataCount
unsigned long TCPUNASeqNr
unsigned char TransmitControl
unsigned short TxFrame1Size
unsigned char TxFrame2Size
Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/webpage.h File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/webpage.h File Reference

Go to the source code of this file.

Variables

const unsigned char WebSide []

Variable Documentation

const unsigned char WebSide[]

Definition at line 1 of file webpage.h.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/crc32.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/crc32.c File Reference

Ethernet CRC module file for NXP LPC230x Family Microprocessors. More...

#include "lpc17xx_emac.h"
#include "crc32.h"

Go to the source code of this file.

Functions

void | crc32_init (uint32_t *pCRC)
void | crc32_add (uint32_t *pCRC, uint8_t val8)
void | crc32_end (uint32_t *pCRC)
uint32_t | crc32_bfr (void *pBfr, uint32_t size)

Detailed Description

Ethernet CRC module file for NXP LPC230x Family Microprocessors.

Version:
1.0
Date:
01. September. 2006
Author:
NXP MCU SW Application Team

Copyright(C) 2006, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file crc32.c.

Function Documentation

void crc32_add | ( | uint32_t * | pCRC,
 |  | uint8_t | val8
 | ) |  |

Definition at line 51 of file crc32.c.

uint32_t crc32_bfr | ( | void * | pBfr,
 |  | uint32_t | size
 | ) |  |

Definition at line 96 of file crc32.c.

void crc32_end ( uint32_t * pCRC )

Definition at line 82 of file crc32.c.

void crc32_init ( uint32_t * pCRC )

Definition at line 37 of file crc32.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/crc32.h File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/crc32.h File Reference

Ethernet CRC module file for NXP LPC230x Family Microprocessors. More...

#include "lpc_types.h"

Go to the source code of this file.

Functions

void | crc32_init (uint32_t *pCRC)
void | crc32_add (uint32_t *pCRC, uint8_t val8)
void | crc32_end (uint32_t *pCRC)
uint32_t | crc32_bfr (void *pBfr, uint32_t size)
uint32_t | do_crc_behav (long long Addr)

Detailed Description

Ethernet CRC module file for NXP LPC230x Family Microprocessors.

Version:
1.0
Date:
01. September. 2006
Author:
NXP MCU SW Application Team

Copyright(C) 2006, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file crc32.h.

Function Documentation

void crc32_add | ( | uint32_t * | pCRC,
 |  | uint8_t | val8
 | ) |  |

Definition at line 51 of file crc32.c.

uint32_t crc32_bfr | ( | void * | pBfr,
 |  | uint32_t | size
 | ) |  |

Definition at line 96 of file crc32.c.

void crc32_end ( uint32_t * pCRC )

Definition at line 82 of file crc32.c.

void crc32_init ( uint32_t * pCRC )

Definition at line 37 of file crc32.c.

uint32_t do_crc_behav ( long long Addr )
Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/emactest.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/emactest.c File Reference

This example used to test EMAC operation on LPC1768. More...

#include "string.h"
#include "crc32.h"
#include "lpc17xx_emac.h"
#include "lpc17xx_gpio.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"
#include <stdio.h>

Go to the source code of this file.

Defines

#define | TX_ONLY 0
#define | BOUNCE_RX 1
#define | ENABLE_WOL 1
#define | ENABLE_HASH 1
#define | EMAC_ADDR12 0x0000E386
#define | EMAC_ADDR34 0x00006BDA
#define | EMAC_ADDR56 0x00005000
#define | EMAC_DST_ADDR12 0x0000101F
#define | EMAC_DST_ADDR34 0x0000E012
#define | EMAC_DST_ADDR56 0x00001D0C
#define | PD_LED_PIN (1<<6)
#define | TX_LED_PIN (1<<5)
#define | RX_LED_PIN (1<<4)
#define | KB_LED_PIN (1<<3)
#define | BLINK_LED_PIN (1<<2)
#define | LED2_MASK ((1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6))
#define | LED1_MASK ((1<<28) | (1<<29) | (0x80000000))
#define | TX_PACKET_SIZE 114
#define | MYMAC_1 ((EMAC_ADDR12 & 0xFF00) >> 8)
#define | MYMAC_2 ((EMAC_ADDR12 & 0xFF))
#define | MYMAC_3 ((EMAC_ADDR34 & 0xFF00) >> 8)
#define | MYMAC_4 ((EMAC_ADDR34 & 0xFF))
#define | MYMAC_5 ((EMAC_ADDR56 & 0xFF00) >> 8)
#define | MYMAC_6 ((EMAC_ADDR56 & 0xFF))
#define | DB _DBG((uint8_t *)db_)

Functions

uint8_t | __attribute__ ((aligned(4)))
void | ENET_IRQHandler (void)
Ethernet service routine handler.
void | PacketGen (uint8_t *txptr)
Create a perfect packet for TX.
void | LED_Init (void)
Init LEDs.
void | LED_Blink (uint32_t pattern)
LED blink. This is used for WOL test only.
void | Usr_Init_Emac (void)
User EMAC initialize.
int | c_entry (void)
c_entry: Main EMAC program body
int | main (void)

Variables

char | db_ [64]
__IO uint32_t | RXOverrunCount = 0
__IO uint32_t | RXErrorCount = 0
__IO uint32_t | TXUnderrunCount = 0
__IO uint32_t | TXErrorCount = 0
__IO uint32_t | RxFinishedCount = 0
__IO uint32_t | TxFinishedCount = 0
__IO uint32_t | TxDoneCount = 0
__IO uint32_t | RxDoneCount = 0
__IO uint32_t | ReceiveLength = 0
__IO Bool | PacketReceived = FALSE
__IO uint32_t | WOLCount = 0

Detailed Description

This example used to test EMAC operation on LPC1768.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file emactest.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/libnosys_gnu.c File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/libnosys_gnu.c File Reference

Definitions for OS interface, stub function required by newlibc used by Codesourcery GNU compiler. More...

Go to the source code of this file.

Detailed Description

Definitions for OS interface, stub function required by newlibc used by Codesourcery GNU compiler.

Version:
Date:
01. December. 2008
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file libnosys_gnu.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _EMAC
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _EMAC

Definition at line 121 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.c File Reference

Data Structures | Defines
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.c File Reference
#include <stdio.h>
#include <string.h>
#include "uip.h"
#include "dhcpc.h"
#include "timer.h"
#include "pt.h"

Go to the source code of this file.

Data Structures

struct | dhcp_msg

Defines

#define | STATE_INITIAL 0
#define | STATE_SENDING 1
#define | STATE_OFFER_RECEIVED 2
#define | STATE_CONFIG_RECEIVED 3
#define | BOOTP_BROADCAST 0x8000
#define | DHCP_REQUEST 1
#define | DHCP_REPLY 2
#define | DHCP_HTYPE_ETHERNET 1
#define | DHCP_HLEN_ETHERNET 6
#define | DHCP_MSG_LEN 236
#define | DHCPC_SERVER_PORT 67
#define | DHCPC_CLIENT_PORT 68
#define | DHCPDISCOVER 1
#define | DHCPOFFER 2
#define | DHCPREQUEST 3
#define | DHCPDECLINE 4
#define | DHCPACK 5
#define | DHCPNAK 6
#define | DHCPRELEASE 7
#define | DHCP_OPTION_SUBNET_MASK 1
#define | DHCP_OPTION_ROUTER 3
#define | DHCP_OPTION_DNS_SERVER 6
#define | DHCP_OPTION_REQ_IPADDR 50
#define | DHCP_OPTION_LEASE_TIME 51
#define | DHCP_OPTION_MSG_TYPE 53
#define | DHCP_OPTION_SERVER_ID 54
#define | DHCP_OPTION_REQ_LIST 55
#define | DHCP_OPTION_END 255

Define Documentation

#define BOOTP_BROADCAST 0x8000

Definition at line 65 of file dhcpc.c.

#define DHCP_HLEN_ETHERNET 6

Definition at line 70 of file dhcpc.c.

#define DHCP_HTYPE_ETHERNET 1

Definition at line 69 of file dhcpc.c.

#define DHCP_MSG_LEN 236

Definition at line 71 of file dhcpc.c.

#define DHCP_OPTION_DNS_SERVER 6

Definition at line 86 of file dhcpc.c.

#define DHCP_OPTION_END 255

Definition at line 92 of file dhcpc.c.

#define DHCP_OPTION_LEASE_TIME 51

Definition at line 88 of file dhcpc.c.

#define DHCP_OPTION_MSG_TYPE 53

Definition at line 89 of file dhcpc.c.

#define DHCP_OPTION_REQ_IPADDR 50

Definition at line 87 of file dhcpc.c.

#define DHCP_OPTION_REQ_LIST 55

Definition at line 91 of file dhcpc.c.

#define DHCP_OPTION_ROUTER 3

Definition at line 85 of file dhcpc.c.

#define DHCP_OPTION_SERVER_ID 54

Definition at line 90 of file dhcpc.c.

#define DHCP_OPTION_SUBNET_MASK 1

Definition at line 84 of file dhcpc.c.

#define DHCP_REPLY 2

Definition at line 68 of file dhcpc.c.

#define DHCP_REQUEST 1

Definition at line 67 of file dhcpc.c.

#define DHCPACK 5

Definition at line 80 of file dhcpc.c.

#define DHCPC_CLIENT_PORT 68

Definition at line 74 of file dhcpc.c.

#define DHCPC_SERVER_PORT 67

Definition at line 73 of file dhcpc.c.

#define DHCPDECLINE 4

Definition at line 79 of file dhcpc.c.

#define DHCPDISCOVER 1

Definition at line 76 of file dhcpc.c.

#define DHCPNAK 6

Definition at line 81 of file dhcpc.c.

#define DHCPOFFER 2

Definition at line 77 of file dhcpc.c.

#define DHCPRELEASE 7

Definition at line 82 of file dhcpc.c.

#define DHCPREQUEST 3

Definition at line 78 of file dhcpc.c.

#define STATE_CONFIG_RECEIVED 3

Definition at line 45 of file dhcpc.c.

#define STATE_INITIAL 0

Definition at line 42 of file dhcpc.c.

#define STATE_OFFER_RECEIVED 2

Definition at line 44 of file dhcpc.c.

#define STATE_SENDING 1

Definition at line 43 of file dhcpc.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.h File Reference

Data Structures | Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.h File Reference
#include "timer.h"
#include "pt.h"

Go to the source code of this file.

Data Structures

struct | dhcpc_state

Defines

#define | UIP_UDP_APPCALL dhcpc_appcall

Typedefs

Appication specific configurations

An uIP application is implemented using a single application function that is called by uIP whenever a TCP/IP event occurs. The name of this function must be registered with uIP at compile time using the UIP_APPCALL definition.

uIP applications can store the application state within the uip_conn structure by specifying the type of the application structure by typedef:ing the type uip_tcp_appstate_t and uip_udp_appstate_t.

The file containing the definitions must be included in the uipopt.h file.

The following example illustrates how this can look.

void httpd_appcall(void);
#define UIP_APPCALL     httpd_appcall

struct httpd_state {
  u8_t state;
  u16_t count;
  char *dataptr;
  char *script;
};
typedef struct httpd_state uip_tcp_appstate_t
typedef struct dhcpc_state | uip_udp_appstate_t

Functions

void | dhcpc_init (const void *mac_addr, int mac_len)
void | dhcpc_request (void)
void | dhcpc_appcall (void)
void | dhcpc_configured (const struct dhcpc_state *s)

Define Documentation

#define UIP_UDP_APPCALL dhcpc_appcall

Definition at line 65 of file dhcpc.h.

Function Documentation

void dhcpc_appcall ( void )
void dhcpc_configured ( const struct dhcpc_state * s )
void dhcpc_init | ( | const void * | mac_addr,
 |  | int | mac_len
 | ) |  |
void dhcpc_request ( void )
Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.c File Reference
Hello, world
#include "hello-world.h"
#include "uip.h"
#include <string.h>

Go to the source code of this file.

Functions

void | hello_world_init (void)
void | hello_world_appcall (void)

Detailed Description

An example of how to write uIP applications with protosockets.

Author:
Adam Dunkels <adam@sics.se>

Definition in file hello-world.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.h File Reference

Data Structures | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.h File Reference
Hello, world
#include "uipopt.h"
#include "psock.h"

Go to the source code of this file.

Data Structures

struct | hello_world_state

Functions

void | hello_world_appcall (void)
void | hello_world_init (void)

Appication specific configurations

An uIP application is implemented using a single application function that is called by uIP whenever a TCP/IP event occurs. The name of this function must be registered with uIP at compile time using the UIP_APPCALL definition.

uIP applications can store the application state within the uip_conn structure by specifying the type of the application structure by typedef:ing the type uip_tcp_appstate_t and uip_udp_appstate_t.

The file containing the definitions must be included in the uipopt.h file.

The following example illustrates how this can look.

void httpd_appcall(void);
#define UIP_APPCALL     httpd_appcall

struct httpd_state {
  u8_t state;
  u16_t count;
  char *dataptr;
  char *script;
};
typedef struct httpd_state uip_tcp_appstate_t
#define | UIP_APPCALL hello_world_appcall
typedef struct hello_world_state | uip_tcp_appstate_t

Detailed Description

Header file for an example of how to write uIP applications with protosockets.

Author:
Adam Dunkels <adam@sics.se>

Definition in file hello-world.h.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.c File Reference

Data Structures | Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.c File Reference
DNS resolver
#include "resolv.h"
#include "uip.h"
#include <string.h>

Go to the source code of this file.

Data Structures

struct | dns_hdr
struct | dns_answer
struct | namemap

Defines

#define | NULL (void *)0
#define | MAX_RETRIES 8
#define | DNS_FLAG1_RESPONSE 0x80
#define | DNS_FLAG1_OPCODE_STATUS 0x10
#define | DNS_FLAG1_OPCODE_INVERSE 0x08
#define | DNS_FLAG1_OPCODE_STANDARD 0x00
#define | DNS_FLAG1_AUTHORATIVE 0x04
#define | DNS_FLAG1_TRUNC 0x02
#define | DNS_FLAG1_RD 0x01
#define | DNS_FLAG2_RA 0x80
#define | DNS_FLAG2_ERR_MASK 0x0f
#define | DNS_FLAG2_ERR_NONE 0x00
#define | DNS_FLAG2_ERR_NAME 0x03
#define | STATE_UNUSED 0
#define | STATE_NEW 1
#define | STATE_ASKING 2
#define | STATE_DONE 3
#define | STATE_ERROR 4
#define | RESOLV_ENTRIES 4

Functions

void | resolv_appcall (void)
void | resolv_query (char *name)
u16_t * | resolv_lookup (char *name)
u16_t * | resolv_getserver (void)
void | resolv_conf (u16_t *dnsserver)
void | resolv_init (void)

Detailed Description

DNS host name to IP address resolver.

Author:
Adam Dunkels <adam@dunkels.com>

This file implements a DNS host name to IP address resolver.

Definition in file resolv.c.

Define Documentation

#define DNS_FLAG1_AUTHORATIVE 0x04

Definition at line 87 of file resolv.c.

#define DNS_FLAG1_OPCODE_INVERSE 0x08

Definition at line 85 of file resolv.c.

#define DNS_FLAG1_OPCODE_STANDARD 0x00

Definition at line 86 of file resolv.c.

#define DNS_FLAG1_OPCODE_STATUS 0x10

Definition at line 84 of file resolv.c.

#define DNS_FLAG1_RD 0x01

Definition at line 89 of file resolv.c.

#define DNS_FLAG1_RESPONSE 0x80

Definition at line 83 of file resolv.c.

#define DNS_FLAG1_TRUNC 0x02

Definition at line 88 of file resolv.c.

#define DNS_FLAG2_ERR_MASK 0x0f

Definition at line 91 of file resolv.c.

#define DNS_FLAG2_ERR_NAME 0x03

Definition at line 93 of file resolv.c.

#define DNS_FLAG2_ERR_NONE 0x00

Definition at line 92 of file resolv.c.

#define DNS_FLAG2_RA 0x80

Definition at line 90 of file resolv.c.

#define STATE_ASKING 2

Definition at line 114 of file resolv.c.

#define STATE_DONE 3

Definition at line 115 of file resolv.c.

#define STATE_ERROR 4

Definition at line 116 of file resolv.c.

#define STATE_NEW 1

Definition at line 113 of file resolv.c.

#define STATE_UNUSED 0

Definition at line 112 of file resolv.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.h File Reference

Defines | Typedefs | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.h File Reference
DNS resolver
#include "uipopt.h"

Go to the source code of this file.

Defines

#define | UIP_UDP_APPCALL resolv_appcall

Typedefs

typedef int | uip_udp_appstate_t

Functions

void | resolv_appcall (void)
void | resolv_found (char *name, u16_t *ipaddr)
void | resolv_conf (u16_t *dnsserver)
u16_t * | resolv_getserver (void)
void | resolv_init (void)
u16_t * | resolv_lookup (char *name)
void | resolv_query (char *name)

Detailed Description

DNS resolver code header file.

Author:
Adam Dunkels <adam@dunkels.com>

Definition in file resolv.h.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp-strings.c File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp-strings.c File Reference

Go to the source code of this file.

Variables

const char | smtp_220 [4]
const char | smtp_helo [6]
const char | smtp_mail_from [12]
const char | smtp_rcpt_to [10]
const char | smtp_data [7]
const char | smtp_to [5]
const char | smtp_cc [5]
const char | smtp_from [7]
const char | smtp_subject [10]
const char | smtp_quit [7]
const char | smtp_crnl [3]
const char | smtp_crnlperiodcrnl [6]

Variable Documentation

const char smtp_220[4]
Initial value:

{0x32, 0x32, 0x30, }

Definition at line 35 of file smtp-strings.c.

const char smtp_cc[5]
Initial value:

{0x43, 0x63, 0x3a, 0x20, }

Definition at line 53 of file smtp-strings.c.

const char smtp_crnl[3]
Initial value:

{0xd, 0xa, }

Definition at line 65 of file smtp-strings.c.

const char smtp_crnlperiodcrnl[6]
Initial value:

{0xd, 0xa, 0x2e, 0xd, 0xa, }

Definition at line 68 of file smtp-strings.c.

const char smtp_data[7]
Initial value:

{0x44, 0x41, 0x54, 0x41, 0xd, 0xa, }

Definition at line 47 of file smtp-strings.c.

const char smtp_from[7]
Initial value:

{0x46, 0x72, 0x6f, 0x6d, 0x3a, 0x20, }

Definition at line 56 of file smtp-strings.c.

const char smtp_helo[6]
Initial value:

{0x48, 0x45, 0x4c, 0x4f, 0x20, }

Definition at line 38 of file smtp-strings.c.

const char smtp_mail_from[12]
Initial value:

{0x4d, 0x41, 0x49, 0x4c, 0x20, 0x46, 0x52, 0x4f, 0x4d, 0x3a, 0x20, }

Definition at line 41 of file smtp-strings.c.

const char smtp_quit[7]
Initial value:

{0x51, 0x55, 0x49, 0x54, 0xd, 0xa, }

Definition at line 62 of file smtp-strings.c.

const char smtp_rcpt_to[10]
Initial value:

{0x52, 0x43, 0x50, 0x54, 0x20, 0x54, 0x4f, 0x3a, 0x20, }

Definition at line 44 of file smtp-strings.c.

const char smtp_subject[10]
Initial value:

{0x53, 0x75, 0x62, 0x6a, 0x65, 0x63, 0x74, 0x3a, 0x20, }

Definition at line 59 of file smtp-strings.c.

const char smtp_to[5]
Initial value:

{0x54, 0x6f, 0x3a, 0x20, }

Definition at line 50 of file smtp-strings.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp-strings.h File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp-strings.h File Reference

Go to the source code of this file.

Variables

const char | smtp_220 [4]
const char | smtp_helo [6]
const char | smtp_mail_from [12]
const char | smtp_rcpt_to [10]
const char | smtp_data [7]
const char | smtp_to [5]
const char | smtp_cc [5]
const char | smtp_from [7]
const char | smtp_subject [10]
const char | smtp_quit [7]
const char | smtp_crnl [3]
const char | smtp_crnlperiodcrnl [6]

Variable Documentation

const char smtp_220[4]

Definition at line 35 of file smtp-strings.c.

const char smtp_cc[5]

Definition at line 53 of file smtp-strings.c.

const char smtp_crnl[3]

Definition at line 65 of file smtp-strings.c.

const char smtp_crnlperiodcrnl[6]

Definition at line 68 of file smtp-strings.c.

const char smtp_data[7]

Definition at line 47 of file smtp-strings.c.

const char smtp_from[7]

Definition at line 56 of file smtp-strings.c.

const char smtp_helo[6]

Definition at line 38 of file smtp-strings.c.

const char smtp_mail_from[12]

Definition at line 41 of file smtp-strings.c.

const char smtp_quit[7]

Definition at line 62 of file smtp-strings.c.

const char smtp_rcpt_to[10]

Definition at line 44 of file smtp-strings.c.

const char smtp_subject[10]

Definition at line 59 of file smtp-strings.c.

const char smtp_to[5]

Definition at line 50 of file smtp-strings.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.c File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.c File Reference
SMTP E-mail sender
#include "smtp.h"
#include "smtp-strings.h"
#include "psock.h"
#include "uip.h"
#include <string.h>

Go to the source code of this file.

Defines

#define | ISO_nl 0x0a
#define | ISO_cr 0x0d
#define | ISO_period 0x2e
#define | ISO_2 0x32
#define | ISO_3 0x33
#define | ISO_4 0x34
#define | ISO_5 0x35

Detailed Description

SMTP example implementation

Author:
Adam Dunkels <adam@dunkels.com>

Definition in file smtp.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.h File Reference

Data Structures | Defines | Typedefs | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.h File Reference
SMTP E-mail sender
#include "uipopt.h"

Go to the source code of this file.

Data Structures

struct | smtp_state

Defines

#define | SMTP_ERR_OK 0
#define | SMTP_SEND(to, cc, from, subject, msg) smtp_send(to, cc, from, subject, msg, strlen(msg))
#define | UIP_APPCALL smtp_appcall

Typedefs

typedef struct smtp_state | uip_tcp_appstate_t

Functions

void | smtp_done (unsigned char error)
void | smtp_init (void)
void | smtp_configure (char *localhostname, u16_t *smtpserver)
unsigned char | smtp_send (char *to, char *from, char *subject, char *msg, u16_t msglen)
void | smtp_appcall (void)

Detailed Description

SMTP header file

Author:
Adam Dunkels <adam@dunkels.com>

Definition in file smtp.h.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.c File Reference

Data Structures | Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.c File Reference
#include "shell.h"
#include <string.h>

Go to the source code of this file.

Data Structures

struct | ptentry

Defines

#define | SHELL_PROMPT "uIP 1.0> "

Functions

void | shell_init (void)
void | shell_start (void)
void | shell_input (char *cmd)

Define Documentation

#define SHELL_PROMPT "uIP 1.0> "

Definition at line 44 of file shell.c.

Function Documentation

void shell_init ( void )

Initialize the shell.

Called when the shell front-end process starts. This function may be used to start listening for signals.

Definition at line 105 of file shell.c.

void shell_input ( char * command )

Process a shell command.

This function will be called by the shell GUI / telnet server whan a command has been entered that should be processed by the shell back-end.

Parameters:
command The command to be processed.

Definition at line 118 of file shell.c.

void shell_start ( void )

Start the shell back-end.

Called by the front-end when a new shell is started.

Definition at line 110 of file shell.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.h File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.h File Reference

Go to the source code of this file.

Functions

void | shell_init (void)
void | shell_start (void)
void | shell_input (char *command)
void | shell_quit (char *)
void | shell_output (char *str1, char *str2)
void | shell_prompt (char *prompt)

Detailed Description

Interface for the Contiki shell.

Author:
Adam Dunkels <adam@dunkels.com>

Some of the functions declared in this file must be implemented as a shell back-end in the architecture specific files of a Contiki port.

Definition in file shell.h.

Function Documentation

void shell_init ( void )

Initialize the shell.

Called when the shell front-end process starts. This function may be used to start listening for signals.

Definition at line 105 of file shell.c.

void shell_input ( char * command )

Process a shell command.

This function will be called by the shell GUI / telnet server whan a command has been entered that should be processed by the shell back-end.

Parameters:
command The command to be processed.

Definition at line 118 of file shell.c.

void shell_output | ( | char * | str1,
 |  | char * | str2
 | ) |  |

Print a string to the shell window.

This function is implemented by the shell GUI / telnet server and can be called by the shell back-end to output a string in the shell window. The string is automatically appended with a linebreak.

Parameters:
str1 | The first half of the string to be output.
str2 | The second half of the string to be output.

Definition at line 113 of file telnetd.c.

void shell_prompt ( char * prompt )

Print a prompt to the shell window.

This function can be used by the shell back-end to print out a prompt to the shell window.

Parameters:
prompt The prompt to be printed.

Definition at line 101 of file telnetd.c.

void shell_quit ( char * )

Quit the shell.

Definition at line 79 of file telnetd.c.

void shell_start ( void )

Start the shell back-end.

Called by the front-end when a new shell is started.

Definition at line 110 of file shell.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.c File Reference

Data Structures | Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.c File Reference
#include "uip.h"
#include "telnetd.h"
#include "memb.h"
#include "shell.h"
#include <string.h>

Go to the source code of this file.

Data Structures

struct | telnetd_line

Defines

#define | ISO_nl 0x0a
#define | ISO_cr 0x0d
#define | STATE_NORMAL 0
#define | STATE_IAC 1
#define | STATE_WILL 2
#define | STATE_WONT 3
#define | STATE_DO 4
#define | STATE_DONT 5
#define | STATE_CLOSE 6
#define | TELNET_IAC 255
#define | TELNET_WILL 251
#define | TELNET_WONT 252
#define | TELNET_DO 253
#define | TELNET_DONT 254

Functions

MEMB (linemem, struct telnetd_line, TELNETD_CONF_NUMLINES)
void | shell_quit (char *str)
void | shell_prompt (char *str)
void | shell_output (char *str1, char *str2)
void | telnetd_init (void)
void | telnetd_appcall (void)

Define Documentation

#define ISO_cr 0x0d

Definition at line 43 of file telnetd.c.

#define ISO_nl 0x0a

Definition at line 42 of file telnetd.c.

#define STATE_CLOSE 6

Definition at line 56 of file telnetd.c.

#define STATE_DO 4

Definition at line 54 of file telnetd.c.

#define STATE_DONT 5

Definition at line 55 of file telnetd.c.

#define STATE_IAC 1

Definition at line 51 of file telnetd.c.

#define STATE_NORMAL 0

Definition at line 50 of file telnetd.c.

#define STATE_WILL 2

Definition at line 52 of file telnetd.c.

#define STATE_WONT 3

Definition at line 53 of file telnetd.c.

#define TELNET_DO 253

Definition at line 63 of file telnetd.c.

#define TELNET_DONT 254

Definition at line 64 of file telnetd.c.

#define TELNET_IAC 255

Definition at line 60 of file telnetd.c.

#define TELNET_WILL 251

Definition at line 61 of file telnetd.c.

#define TELNET_WONT 252

Definition at line 62 of file telnetd.c.

Function Documentation

MEMB | ( | linemem | ,
 |  | struct telnetd_line | ,
 |  | TELNETD_CONF_NUMLINES |
 | ) |  |
void shell_output | ( | char * | str1,
 |  | char * | str2
 | ) |  |

Print a string to the shell window.

This function is implemented by the shell GUI / telnet server and can be called by the shell back-end to output a string in the shell window. The string is automatically appended with a linebreak.

Parameters:
str1 | The first half of the string to be output.
str2 | The second half of the string to be output.

Definition at line 113 of file telnetd.c.

void shell_prompt ( char * prompt )

Print a prompt to the shell window.

This function can be used by the shell back-end to print out a prompt to the shell window.

Parameters:
prompt The prompt to be printed.

Definition at line 101 of file telnetd.c.

void shell_quit ( char * )

Quit the shell.

Definition at line 79 of file telnetd.c.

void telnetd_appcall ( void )

Definition at line 308 of file telnetd.c.

void telnetd_init ( void )

Definition at line 137 of file telnetd.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.h File Reference

Data Structures | Defines | Typedefs | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.h File Reference
#include "uipopt.h"

Go to the source code of this file.

Data Structures

struct | telnetd_state

Defines

#define | TELNETD_CONF_LINELEN 40
#define | TELNETD_CONF_NUMLINES 16
#define | UIP_APPCALL telnetd_appcall

Typedefs

typedef struct telnetd_state | uip_tcp_appstate_t

Functions

void | telnetd_appcall (void)

Define Documentation

#define TELNETD_CONF_LINELEN 40

Definition at line 43 of file telnetd.h.

#define TELNETD_CONF_NUMLINES 16

Definition at line 46 of file telnetd.h.

#define UIP_APPCALL telnetd_appcall

Definition at line 60 of file telnetd.h.

Typedef Documentation

typedef struct telnetd_state uip_tcp_appstate_t

Definition at line 57 of file telnetd.h.

Function Documentation

void telnetd_appcall ( void )

Definition at line 308 of file telnetd.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient-strings.c File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient-strings.c File Reference

Go to the source code of this file.

Variables

const char | http_http [8]
const char | http_200 [5]
const char | http_301 [5]
const char | http_302 [5]
const char | http_get [5]
const char | http_10 [9]
const char | http_11 [9]
const char | http_content_type [15]
const char | http_texthtml [10]
const char | http_location [11]
const char | http_host [7]
const char | http_crnl [3]
const char | http_index_html [12]
const char | http_404_html [10]
const char | http_content_type_html [28]
const char | http_content_type_css [27]
const char | http_content_type_text [28]
const char | http_content_type_png [28]
const char | http_content_type_gif [28]
const char | http_content_type_jpg [29]
const char | http_content_type_binary [43]
const char | http_html [6]
const char | http_shtml [7]
const char | http_htm [5]
const char | http_css [5]
const char | http_png [5]
const char | http_gif [5]
const char | http_jpg [5]
const char | http_text [6]
const char | http_txt [5]
const char | http_user_agent_fields [77]

Variable Documentation

const char http_10[9]
Initial value:

{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0 }

Definition at line 16 of file webclient-strings.c.

const char http_11[9]
Initial value:

{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x31, 0 }

Definition at line 19 of file webclient-strings.c.

const char http_200[5]
Initial value:

{0x32, 0x30, 0x30, 0x20, 0 }

Definition at line 4 of file webclient-strings.c.

const char http_301[5]
Initial value:

{0x33, 0x30, 0x31, 0x20, 0 }

Definition at line 7 of file webclient-strings.c.

const char http_302[5]
Initial value:

{0x33, 0x30, 0x32, 0x20, 0 }

Definition at line 10 of file webclient-strings.c.

const char http_404_html[10]
Initial value:

{0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0 }

Definition at line 40 of file webclient-strings.c.

const char http_content_type[15]
Initial value:

{0x63, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0 }

Definition at line 22 of file webclient-strings.c.

const char http_content_type_binary[43]
Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x61, 0x70, 0x70, 0x6c, 0x69, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x2f, 0x6f, 0x63, 0x74, 0x65, 0x74, 0x2d, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d, 0xd, 0xa, 0xd, 0xa, 0 }

Definition at line 61 of file webclient-strings.c.

const char http_content_type_css[27]
Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x63, 0x73, 0x73, 0xd, 0xa, 0xd, 0xa, 0 }

Definition at line 46 of file webclient-strings.c.

const char http_content_type_gif[28]
Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x67, 0x69, 0x66, 0xd, 0xa, 0xd, 0xa, 0 }

Definition at line 55 of file webclient-strings.c.

const char http_content_type_html[28]
Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0xd, 0xa, 0xd, 0xa, 0 }

Definition at line 43 of file webclient-strings.c.

const char http_content_type_jpg[29]
Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x6a, 0x70, 0x65, 0x67, 0xd, 0xa, 0xd, 0xa, 0 }

Definition at line 58 of file webclient-strings.c.

const char http_content_type_png[28]
Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x70, 0x6e, 0x67, 0xd, 0xa, 0xd, 0xa, 0 }

Definition at line 52 of file webclient-strings.c.

const char http_content_type_text[28]
Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x74, 0x65, 0x78, 0x74, 0xd, 0xa, 0xd, 0xa, 0 }

Definition at line 49 of file webclient-strings.c.

const char http_crnl[3]
Initial value:

{0xd, 0xa, 0 }

Definition at line 34 of file webclient-strings.c.

const char http_css[5]
Initial value:

{0x2e, 0x63, 0x73, 0x73, 0 }

Definition at line 73 of file webclient-strings.c.

const char http_get[5]
Initial value:

{0x47, 0x45, 0x54, 0x20, 0 }

Definition at line 13 of file webclient-strings.c.

const char http_gif[5]
Initial value:

{0x2e, 0x67, 0x69, 0x66, 0 }

Definition at line 79 of file webclient-strings.c.

const char http_host[7]
Initial value:

{0x68, 0x6f, 0x73, 0x74, 0x3a, 0x20, 0 }

Definition at line 31 of file webclient-strings.c.

const char http_htm[5]
Initial value:

{0x2e, 0x68, 0x74, 0x6d, 0 }

Definition at line 70 of file webclient-strings.c.

const char http_html[6]
Initial value:

{0x2e, 0x68, 0x74, 0x6d, 0x6c, 0 }

Definition at line 64 of file webclient-strings.c.

const char http_http[8]
Initial value:

{0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0 }

Definition at line 1 of file webclient-strings.c.

const char http_index_html[12]
Initial value:

{0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0 }

Definition at line 37 of file webclient-strings.c.

const char http_jpg[5]
Initial value:

{0x2e, 0x6a, 0x70, 0x67, 0 }

Definition at line 82 of file webclient-strings.c.

const char http_location[11]
Initial value:

{0x6c, 0x6f, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0 }

Definition at line 28 of file webclient-strings.c.

const char http_png[5]
Initial value:

{0x2e, 0x70, 0x6e, 0x67, 0 }

Definition at line 76 of file webclient-strings.c.

const char http_shtml[7]
Initial value:

{0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, 0 }

Definition at line 67 of file webclient-strings.c.

const char http_text[6]
Initial value:

{0x2e, 0x74, 0x65, 0x78, 0x74, 0 }

Definition at line 85 of file webclient-strings.c.

const char http_texthtml[10]
Initial value:

{0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0 }

Definition at line 25 of file webclient-strings.c.

const char http_txt[5]
Initial value:

{0x2e, 0x74, 0x78, 0x74, 0 }

Definition at line 88 of file webclient-strings.c.

const char http_user_agent_fields[77]
Initial value:

{0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, 0x55, 0x73, 0x65, 0x72, 0x2d, 0x41, 0x67, 0x65, 0x6e, 0x74, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x28, 0x3b, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0x29, 0xd, 0xa, 0xd, 0xa, 0 }

Definition at line 91 of file webclient-strings.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient-strings.h File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient-strings.h File Reference

Go to the source code of this file.

Variables

const char | http_http [8]
const char | http_200 [5]
const char | http_301 [5]
const char | http_302 [5]
const char | http_get [5]
const char | http_10 [9]
const char | http_11 [9]
const char | http_content_type [15]
const char | http_texthtml [10]
const char | http_location [11]
const char | http_host [7]
const char | http_crnl [3]
const char | http_index_html [12]
const char | http_404_html [10]
const char | http_content_type_html [28]
const char | http_content_type_css [27]
const char | http_content_type_text [28]
const char | http_content_type_png [28]
const char | http_content_type_gif [28]
const char | http_content_type_jpg [29]
const char | http_content_type_binary [43]
const char | http_html [6]
const char | http_shtml [7]
const char | http_htm [5]
const char | http_css [5]
const char | http_png [5]
const char | http_gif [5]
const char | http_jpg [5]
const char | http_text [6]
const char | http_txt [5]
const char | http_user_agent_fields [77]

Variable Documentation

const char http_10[9]

Definition at line 16 of file webclient-strings.c.

const char http_11[9]

Definition at line 19 of file webclient-strings.c.

const char http_200[5]

Definition at line 4 of file webclient-strings.c.

const char http_301[5]

Definition at line 7 of file webclient-strings.c.

const char http_302[5]

Definition at line 10 of file webclient-strings.c.

const char http_404_html[10]

Definition at line 40 of file webclient-strings.c.

const char http_content_type[15]

Definition at line 22 of file webclient-strings.c.

const char http_content_type_binary[43]

Definition at line 61 of file webclient-strings.c.

const char http_content_type_css[27]

Definition at line 46 of file webclient-strings.c.

const char http_content_type_gif[28]

Definition at line 55 of file webclient-strings.c.

const char http_content_type_html[28]

Definition at line 43 of file webclient-strings.c.

const char http_content_type_jpg[29]

Definition at line 58 of file webclient-strings.c.

const char http_content_type_png[28]

Definition at line 52 of file webclient-strings.c.

const char http_content_type_text[28]

Definition at line 49 of file webclient-strings.c.

const char http_crnl[3]

Definition at line 34 of file webclient-strings.c.

const char http_css[5]

Definition at line 73 of file webclient-strings.c.

const char http_get[5]

Definition at line 13 of file webclient-strings.c.

const char http_gif[5]

Definition at line 79 of file webclient-strings.c.

const char http_host[7]

Definition at line 31 of file webclient-strings.c.

const char http_htm[5]

Definition at line 70 of file webclient-strings.c.

const char http_html[6]

Definition at line 64 of file webclient-strings.c.

const char http_http[8]

Definition at line 1 of file webclient-strings.c.

const char http_index_html[12]

Definition at line 37 of file webclient-strings.c.

const char http_jpg[5]

Definition at line 82 of file webclient-strings.c.

const char http_location[11]

Definition at line 28 of file webclient-strings.c.

const char http_png[5]

Definition at line 76 of file webclient-strings.c.

const char http_shtml[7]

Definition at line 67 of file webclient-strings.c.

const char http_text[6]

Definition at line 85 of file webclient-strings.c.

const char http_texthtml[10]

Definition at line 25 of file webclient-strings.c.

const char http_txt[5]

Definition at line 88 of file webclient-strings.c.

const char http_user_agent_fields[77]

Definition at line 91 of file webclient-strings.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.c File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.c File Reference
Web client
#include "uip.h"
#include "uiplib.h"
#include "webclient.h"
#include "resolv.h"
#include <string.h>

Go to the source code of this file.

Defines

#define | WEBCLIENT_TIMEOUT 100
#define | WEBCLIENT_STATE_STATUSLINE 0
#define | WEBCLIENT_STATE_HEADERS 1
#define | WEBCLIENT_STATE_DATA 2
#define | WEBCLIENT_STATE_CLOSE 3
#define | HTTPFLAG_NONE 0
#define | HTTPFLAG_OK 1
#define | HTTPFLAG_MOVED 2
#define | HTTPFLAG_ERROR 3
#define | ISO_nl 0x0a
#define | ISO_cr 0x0d
#define | ISO_space 0x20

Functions

char * | webclient_mimetype (void)
char * | webclient_filename (void)
char * | webclient_hostname (void)
unsigned short | webclient_port (void)
void | webclient_init (void)
void | webclient_close (void)
unsigned char | webclient_get (char *host, u16_t port, char *file)
void | webclient_appcall (void)

Detailed Description

Implementation of the HTTP client.

Author:
Adam Dunkels <adam@dunkels.com>

Definition in file webclient.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.h File Reference

Data Structures | Defines | Typedefs | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.h File Reference
Web client
#include "webclient-strings.h"
#include "uipopt.h"

Go to the source code of this file.

Data Structures

struct | webclient_state

Defines

#define | WEBCLIENT_CONF_MAX_URLLEN 100
#define | UIP_APPCALL webclient_appcall

Typedefs

typedef struct webclient_state | uip_tcp_appstate_t

Functions

void | webclient_datahandler (char *data, u16_t len)
void | webclient_connected (void)
void | webclient_timedout (void)
void | webclient_aborted (void)
void | webclient_closed (void)
void | webclient_init (void)
unsigned char | webclient_get (char *host, u16_t port, char *file)
void | webclient_close (void)
void | webclient_appcall (void)
char * | webclient_mimetype (void)
char * | webclient_filename (void)
char * | webclient_hostname (void)
unsigned short | webclient_port (void)

Detailed Description

Header file for the HTTP client.

Author:
Adam Dunkels <adam@dunkels.com>

Definition in file webclient.h.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/http-strings.c File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/http-strings.c File Reference

Go to the source code of this file.

Variables

const char | http_http [8]
const char | http_200 [5]
const char | http_301 [5]
const char | http_302 [5]
const char | http_get [5]
const char | http_10 [9]
const char | http_11 [9]
const char | http_content_type [15]
const char | http_texthtml [10]
const char | http_location [11]
const char | http_host [7]
const char | http_crnl [3]
const char | http_index_html [12]
const char | http_404_html [10]
const char | http_referer [9]
const char | http_header_200 [84]
const char | http_header_404 [91]
const char | http_content_type_plain [29]
const char | http_content_type_html [28]
const char | http_content_type_css [27]
const char | http_content_type_text [28]
const char | http_content_type_png [28]
const char | http_content_type_gif [28]
const char | http_content_type_jpg [29]
const char | http_content_type_binary [43]
const char | http_html [6]
const char | http_shtml [7]
const char | http_htm [5]
const char | http_css [5]
const char | http_png [5]
const char | http_gif [5]
const char | http_jpg [5]
const char | http_text [5]
const char | http_txt [5]

Variable Documentation

const char http_10[9]
Initial value:

{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, }

Definition at line 16 of file http-strings.c.

const char http_11[9]
Initial value:

{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x31, }

Definition at line 19 of file http-strings.c.

const char http_200[5]
Initial value:

{0x32, 0x30, 0x30, 0x20, }

Definition at line 4 of file http-strings.c.

const char http_301[5]
Initial value:

{0x33, 0x30, 0x31, 0x20, }

Definition at line 7 of file http-strings.c.

const char http_302[5]
Initial value:

{0x33, 0x30, 0x32, 0x20, }

Definition at line 10 of file http-strings.c.

const char http_404_html[10]
Initial value:

{0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, }

Definition at line 40 of file http-strings.c.

const char http_content_type[15]
Initial value:

{0x63, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, }

Definition at line 22 of file http-strings.c.

const char http_content_type_binary[43]
Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x61, 0x70, 0x70, 0x6c, 0x69, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x2f, 0x6f, 0x63, 0x74, 0x65, 0x74, 0x2d, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d, 0xd, 0xa, 0xd, 0xa, }

Definition at line 73 of file http-strings.c.

const char http_content_type_css[27]
Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x63, 0x73, 0x73, 0xd, 0xa, 0xd, 0xa, }

Definition at line 58 of file http-strings.c.

const char http_content_type_gif[28]
Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x67, 0x69, 0x66, 0xd, 0xa, 0xd, 0xa, }

Definition at line 67 of file http-strings.c.

const char http_content_type_html[28]
Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0xd, 0xa, 0xd, 0xa, }

Definition at line 55 of file http-strings.c.

const char http_content_type_jpg[29]
Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x6a, 0x70, 0x65, 0x67, 0xd, 0xa, 0xd, 0xa, }

Definition at line 70 of file http-strings.c.

const char http_content_type_plain[29]
Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x70, 0x6c, 0x61, 0x69, 0x6e, 0xd, 0xa, 0xd, 0xa, }

Definition at line 52 of file http-strings.c.

const char http_content_type_png[28]
Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x70, 0x6e, 0x67, 0xd, 0xa, 0xd, 0xa, }

Definition at line 64 of file http-strings.c.

const char http_content_type_text[28]
Initial value:

{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x74, 0x65, 0x78, 0x74, 0xd, 0xa, 0xd, 0xa, }

Definition at line 61 of file http-strings.c.

const char http_crnl[3]
Initial value:

{0xd, 0xa, }

Definition at line 34 of file http-strings.c.

const char http_css[5]
Initial value:

{0x2e, 0x63, 0x73, 0x73, }

Definition at line 85 of file http-strings.c.

const char http_get[5]
Initial value:

{0x47, 0x45, 0x54, 0x20, }

Definition at line 13 of file http-strings.c.

const char http_gif[5]
Initial value:

{0x2e, 0x67, 0x69, 0x66, }

Definition at line 91 of file http-strings.c.

const char http_header_200[84]
Initial value:

{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x32, 0x30, 0x30, 0x20, 0x4f, 0x4b, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, }

Definition at line 46 of file http-strings.c.

const char http_header_404[91]
Initial value:

{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x34, 0x30, 0x34, 0x20, 0x4e, 0x6f, 0x74, 0x20, 0x66, 0x6f, 0x75, 0x6e, 0x64, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, }

Definition at line 49 of file http-strings.c.

const char http_host[7]
Initial value:

{0x68, 0x6f, 0x73, 0x74, 0x3a, 0x20, }

Definition at line 31 of file http-strings.c.

const char http_htm[5]
Initial value:

{0x2e, 0x68, 0x74, 0x6d, }

Definition at line 82 of file http-strings.c.

const char http_html[6]
Initial value:

{0x2e, 0x68, 0x74, 0x6d, 0x6c, }

Definition at line 76 of file http-strings.c.

const char http_http[8]
Initial value:

{0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, }

Definition at line 1 of file http-strings.c.

const char http_index_html[12]
Initial value:

{0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, }

Definition at line 37 of file http-strings.c.

const char http_jpg[5]
Initial value:

{0x2e, 0x6a, 0x70, 0x67, }

Definition at line 94 of file http-strings.c.

const char http_location[11]
Initial value:

{0x6c, 0x6f, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, }

Definition at line 28 of file http-strings.c.

const char http_png[5]
Initial value:

{0x2e, 0x70, 0x6e, 0x67, }

Definition at line 88 of file http-strings.c.

const char http_referer[9]
Initial value:

{0x52, 0x65, 0x66, 0x65, 0x72, 0x65, 0x72, 0x3a, }

Definition at line 43 of file http-strings.c.

const char http_shtml[7]
Initial value:

{0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, }

Definition at line 79 of file http-strings.c.

const char http_text[5]
Initial value:

{0x2e, 0x74, 0x78, 0x74, }

Definition at line 97 of file http-strings.c.

const char http_texthtml[10]
Initial value:

{0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, }

Definition at line 25 of file http-strings.c.

const char http_txt[5]
Initial value:

{0x2e, 0x74, 0x78, 0x74, }

Definition at line 100 of file http-strings.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/http-strings.h File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/http-strings.h File Reference

Go to the source code of this file.

Variables

const char | http_http [8]
const char | http_200 [5]
const char | http_301 [5]
const char | http_302 [5]
const char | http_get [5]
const char | http_10 [9]
const char | http_11 [9]
const char | http_content_type [15]
const char | http_texthtml [10]
const char | http_location [11]
const char | http_host [7]
const char | http_crnl [3]
const char | http_index_html [12]
const char | http_404_html [10]
const char | http_referer [9]
const char | http_header_200 [84]
const char | http_header_404 [91]
const char | http_content_type_plain [29]
const char | http_content_type_html [28]
const char | http_content_type_css [27]
const char | http_content_type_text [28]
const char | http_content_type_png [28]
const char | http_content_type_gif [28]
const char | http_content_type_jpg [29]
const char | http_content_type_binary [43]
const char | http_html [6]
const char | http_shtml [7]
const char | http_htm [5]
const char | http_css [5]
const char | http_png [5]
const char | http_gif [5]
const char | http_jpg [5]
const char | http_text [5]
const char | http_txt [5]

Variable Documentation

const char http_10[9]

Definition at line 16 of file webclient-strings.c.

const char http_11[9]

Definition at line 19 of file webclient-strings.c.

const char http_200[5]

Definition at line 4 of file webclient-strings.c.

const char http_301[5]

Definition at line 7 of file webclient-strings.c.

const char http_302[5]

Definition at line 10 of file webclient-strings.c.

const char http_404_html[10]

Definition at line 40 of file webclient-strings.c.

const char http_content_type[15]

Definition at line 22 of file webclient-strings.c.

const char http_content_type_binary[43]

Definition at line 61 of file webclient-strings.c.

const char http_content_type_css[27]

Definition at line 46 of file webclient-strings.c.

const char http_content_type_gif[28]

Definition at line 55 of file webclient-strings.c.

const char http_content_type_html[28]

Definition at line 43 of file webclient-strings.c.

const char http_content_type_jpg[29]

Definition at line 58 of file webclient-strings.c.

const char http_content_type_plain[29]

Definition at line 52 of file http-strings.c.

const char http_content_type_png[28]

Definition at line 52 of file webclient-strings.c.

const char http_content_type_text[28]

Definition at line 49 of file webclient-strings.c.

const char http_crnl[3]

Definition at line 34 of file webclient-strings.c.

const char http_css[5]

Definition at line 73 of file webclient-strings.c.

const char http_get[5]

Definition at line 13 of file webclient-strings.c.

const char http_gif[5]

Definition at line 79 of file webclient-strings.c.

const char http_header_200[84]

Definition at line 46 of file http-strings.c.

const char http_header_404[91]

Definition at line 49 of file http-strings.c.

const char http_host[7]

Definition at line 31 of file webclient-strings.c.

const char http_htm[5]

Definition at line 70 of file webclient-strings.c.

const char http_html[6]

Definition at line 64 of file webclient-strings.c.

const char http_http[8]

Definition at line 1 of file webclient-strings.c.

const char http_index_html[12]

Definition at line 37 of file webclient-strings.c.

const char http_jpg[5]

Definition at line 82 of file webclient-strings.c.

const char http_location[11]

Definition at line 28 of file webclient-strings.c.

const char http_png[5]

Definition at line 76 of file webclient-strings.c.

const char http_referer[9]

Definition at line 43 of file http-strings.c.

const char http_shtml[7]

Definition at line 67 of file webclient-strings.c.

const char http_text[5]

Definition at line 85 of file webclient-strings.c.

const char http_texthtml[10]

Definition at line 25 of file webclient-strings.c.

const char http_txt[5]

Definition at line 88 of file webclient-strings.c.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.c File Reference
Web server
#include "uip.h"
#include "psock.h"
#include "httpd.h"
#include "httpd-cgi.h"
#include "httpd-fs.h"
#include <stdio.h>
#include <string.h>

Go to the source code of this file.

Functions

HTTPD_CGI_CALL (file,"file-stats", file_stats)
HTTPD_CGI_CALL (tcp,"tcp-connections", tcp_stats)
HTTPD_CGI_CALL (net,"net-stats", net_stats)

Detailed Description

Web server script interface

Author:
Adam Dunkels <adam@sics.se>

Definition in file httpd-cgi.c.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.h File Reference

Data Structures | Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.h File Reference
Web server
#include "psock.h"
#include "httpd.h"

Go to the source code of this file.

Data Structures

struct | httpd_cgi_call

Defines

#define | HTTPD_CGI_CALL(name, str, function)
HTTPD CGI function declaration.

Functions

typedef | PT_THREAD ((*httpd_cgifunction)(struct httpd_state *, char *))
httpd_cgifunction | httpd_cgi (char *name)
void | httpd_cgi_init (void)

Detailed Description

Web server script interface header file

Author:
Adam Dunkels <adam@sics.se>

Definition in file httpd-cgi.h.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.c File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.c File Reference
#include "httpd.h"
#include "httpd-fs.h"
#include "httpd-fsdata.h"
#include "httpd-fsdata.c"

Go to the source code of this file.

Defines

#define | NULL 0

Functions

int | httpd_fs_open (const char *name, struct httpd_fs_file *file)
void | httpd_fs_init (void)
u16_t | httpd_fs_count (char *name)

Define Documentation

#define NULL 0

Definition at line 41 of file httpd-fs.c.

Function Documentation

u16_t httpd_fs_count ( char * name )

Definition at line 114 of file httpd-fs.c.

void httpd_fs_init ( void )

Definition at line 102 of file httpd-fs.c.

int httpd_fs_open | ( | const char * | name,
 |  | struct httpd_fs_file * | file
 | ) |  |

Definition at line 74 of file httpd-fs.c.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.h File Reference

Data Structures | Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.h File Reference

Go to the source code of this file.

Data Structures

struct | httpd_fs_file

Defines

#define | HTTPD_FS_STATISTICS 1

Functions

int | httpd_fs_open (const char *name, struct httpd_fs_file *file)
u16_t | httpd_fs_count (char *name)
void | httpd_fs_init (void)

Define Documentation

#define HTTPD_FS_STATISTICS 1

Definition at line 38 of file httpd-fs.h.

Function Documentation

u16_t httpd_fs_count ( char * name )

Definition at line 114 of file httpd-fs.c.

void httpd_fs_init ( void )

Definition at line 102 of file httpd-fs.c.

int httpd_fs_open | ( | const char * | name,
 |  | struct httpd_fs_file * | file
 | ) |  |

Definition at line 74 of file httpd-fs.c.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.c File Reference

Defines | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.c File Reference

Go to the source code of this file.

Defines

#define | HTTPD_FS_ROOT file_stats_shtml
#define | HTTPD_FS_NUMFILES 10

Variables

struct httpd_fsdata_file | file_processes_shtml [] = {{NULL, data_processes_shtml, data_processes_shtml + 17, sizeof(data_processes_shtml) - 17}}
struct httpd_fsdata_file | file_404_html [] = {{file_processes_shtml, data_404_html, data_404_html + 10, sizeof(data_404_html) - 10}}
struct httpd_fsdata_file | file_files_shtml [] = {{file_404_html, data_files_shtml, data_files_shtml + 13, sizeof(data_files_shtml) - 13}}
struct httpd_fsdata_file | file_footer_html [] = {{file_files_shtml, data_footer_html, data_footer_html + 13, sizeof(data_footer_html) - 13}}
struct httpd_fsdata_file | file_header_html [] = {{file_footer_html, data_header_html, data_header_html + 13, sizeof(data_header_html) - 13}}
struct httpd_fsdata_file | file_index_html [] = {{file_header_html, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}}
struct httpd_fsdata_file | file_style_css [] = {{file_index_html, data_style_css, data_style_css + 11, sizeof(data_style_css) - 11}}
struct httpd_fsdata_file | file_tcp_shtml [] = {{file_style_css, data_tcp_shtml, data_tcp_shtml + 11, sizeof(data_tcp_shtml) - 11}}
struct httpd_fsdata_file | file_fade_png [] = {{file_tcp_shtml, data_fade_png, data_fade_png + 10, sizeof(data_fade_png) - 10}}
struct httpd_fsdata_file | file_stats_shtml [] = {{file_fade_png, data_stats_shtml, data_stats_shtml + 13, sizeof(data_stats_shtml) - 13}}

Define Documentation

#define HTTPD_FS_NUMFILES 10

Definition at line 607 of file httpd-fsdata.c.

#define HTTPD_FS_ROOT file_stats_shtml

Definition at line 605 of file httpd-fsdata.c.

Variable Documentation

struct httpd_fsdata_file file_404_html[] = {{file_processes_shtml, data_404_html, data_404_html + 10, sizeof(data_404_html) - 10}}

Definition at line 587 of file httpd-fsdata.c.

struct httpd_fsdata_file file_fade_png[] = {{file_tcp_shtml, data_fade_png, data_fade_png + 10, sizeof(data_fade_png) - 10}}

Definition at line 601 of file httpd-fsdata.c.

struct httpd_fsdata_file file_files_shtml[] = {{file_404_html, data_files_shtml, data_files_shtml + 13, sizeof(data_files_shtml) - 13}}

Definition at line 589 of file httpd-fsdata.c.

struct httpd_fsdata_file file_footer_html[] = {{file_files_shtml, data_footer_html, data_footer_html + 13, sizeof(data_footer_html) - 13}}

Definition at line 591 of file httpd-fsdata.c.

struct httpd_fsdata_file file_header_html[] = {{file_footer_html, data_header_html, data_header_html + 13, sizeof(data_header_html) - 13}}

Definition at line 593 of file httpd-fsdata.c.

struct httpd_fsdata_file file_index_html[] = {{file_header_html, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}}

Definition at line 595 of file httpd-fsdata.c.

struct httpd_fsdata_file file_processes_shtml[] = {{NULL, data_processes_shtml, data_processes_shtml + 17, sizeof(data_processes_shtml) - 17}}

Definition at line 585 of file httpd-fsdata.c.

struct httpd_fsdata_file file_stats_shtml[] = {{file_fade_png, data_stats_shtml, data_stats_shtml + 13, sizeof(data_stats_shtml) - 13}}

Definition at line 603 of file httpd-fsdata.c.

struct httpd_fsdata_file file_style_css[] = {{file_index_html, data_style_css, data_style_css + 11, sizeof(data_style_css) - 11}}

Definition at line 597 of file httpd-fsdata.c.

struct httpd_fsdata_file file_tcp_shtml[] = {{file_style_css, data_tcp_shtml, data_tcp_shtml + 11, sizeof(data_tcp_shtml) - 11}}

Definition at line 599 of file httpd-fsdata.c.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.h File Reference

Data Structures
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.h File Reference
#include "uip.h"

Go to the source code of this file.

Data Structures

struct | httpd_fsdata_file
struct | httpd_fsdata_file_noconst
Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.c File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.c File Reference
Web server
#include "uip.h"
#include "httpd.h"
#include "httpd-fs.h"
#include "httpd-cgi.h"
#include "http-strings.h"
#include <string.h>

Go to the source code of this file.

Defines

#define | STATE_WAITING 0
#define | STATE_OUTPUT 1
#define | ISO_nl 0x0a
#define | ISO_space 0x20
#define | ISO_bang 0x21
#define | ISO_percent 0x25
#define | ISO_period 0x2e
#define | ISO_slash 0x2f
#define | ISO_colon 0x3a

Detailed Description

Web server

Author:
Adam Dunkels <adam@sics.se>

Definition in file httpd.c.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.h File Reference

Data Structures | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.h File Reference
#include "psock.h"
#include "httpd-fs.h"

Go to the source code of this file.

Data Structures

struct | httpd_state

Functions

void | httpd_init (void)
void | httpd_appcall (void)
void | httpd_log (char *msg)
void | httpd_log_file (u16_t *requester, char *file)

Function Documentation

void httpd_appcall ( void )
void httpd_init ( void )
void httpd_log ( char * msg )
void httpd_log_file | ( | u16_t * | requester,
 |  | char * | file
 | ) |  |
Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/webserver.h File Reference

Defines | Typedefs
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/webserver.h File Reference
#include "httpd.h"

Go to the source code of this file.

Defines

#define | UIP_APPCALL httpd_appcall

Typedefs

typedef struct httpd_state | uip_tcp_appstate_t

Define Documentation

#define UIP_APPCALL httpd_appcall

Definition at line 45 of file webserver.h.

Typedef Documentation

typedef struct httpd_state uip_tcp_appstate_t

Definition at line 40 of file webserver.h.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/printf-stdarg.c File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/printf-stdarg.c File Reference
#include <stdarg.h>

Go to the source code of this file.

Defines

#define | putchar(c) sendchar(c)
#define | PAD_RIGHT 1
#define | PAD_ZERO 2
#define | PRINT_BUF_LEN 12

Functions

int | sendchar (int ch)
int | printf (const char *format,...)
int | sprintf (char *out, const char *format,...)
int | snprintf (char *buf, unsigned int count, const char *format,...)
int | write (int i, char *c, int n)

Define Documentation

#define PAD_RIGHT 1

Definition at line 49 of file printf-stdarg.c.

#define PAD_ZERO 2

Definition at line 50 of file printf-stdarg.c.

#define PRINT_BUF_LEN 12

Definition at line 83 of file printf-stdarg.c.

#define putchar ( c ) sendchar(c)

Definition at line 31 of file printf-stdarg.c.

Function Documentation

int printf | ( | const char * | format,
 |  |  | ...
 | ) |  |

Definition at line 192 of file printf-stdarg.c.

int sendchar ( int ch )

Definition at line 22 of file Serial.c.

int snprintf | ( | char * | buf,
 |  | unsigned int | count,
 |  | const char * | format,
 |  |  | ...
 | ) |  |

Definition at line 209 of file printf-stdarg.c.

int sprintf | ( | char * | out,
 |  | const char * | format,
 |  |  | ...
 | ) |  |

Definition at line 200 of file printf-stdarg.c.

int write | ( | int | i,
 |  | char * | c,
 |  | int | n
 | ) |  |

Definition at line 289 of file printf-stdarg.c.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Retarget.c File Reference

Data Structures | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Retarget.c File Reference
#include <stdio.h>
#include <rt_misc.h>

Go to the source code of this file.

Data Structures

struct | __FILE

Functions

unsigned char | sendchar (unsigned char ch)
unsigned char | getkey (void)
int | fputc (int ch, FILE *f)
int | fgetc (FILE *fp)
int | ferror (FILE *f)
void | _ttywrch (int ch)
void | _sys_exit (int return_code)

Variables

FILE | __stdout
FILE | __stdin

Function Documentation

void _sys_exit ( int return_code )

Definition at line 55 of file Retarget.c.

void _ttywrch ( int ch )

Definition at line 50 of file Retarget.c.

int ferror ( FILE * f )

Definition at line 44 of file Retarget.c.

int fgetc ( FILE * fp )

Definition at line 31 of file Retarget.c.

int fputc | ( | int | ch,
 |  | FILE * | f
 | ) |  |

Definition at line 25 of file Retarget.c.

unsigned char getkey ( void )

Definition at line 33 of file Serial.c.

unsigned char sendchar ( unsigned char ch )

Variable Documentation

FILE __stdin

Definition at line 23 of file Retarget.c.

FILE __stdout

Definition at line 22 of file Retarget.c.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Serial.c File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Serial.c File Reference
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | CR 0x0D

Functions

void | init_serial (void)
int | sendchar (int ch)
int | getkey (void)
unsigned char | getchar (void)

Define Documentation

#define CR 0x0D

Definition at line 13 of file Serial.c.

Function Documentation

unsigned char getchar ( void )

Definition at line 37 of file Serial.c.

int getkey ( void )

Definition at line 33 of file Serial.c.

void init_serial ( void )

Definition at line 16 of file Serial.c.

int sendchar ( int ch )

Definition at line 22 of file Serial.c.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/syscalls.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/syscalls.c File Reference
#include <stdlib.h>
#include <sys/stat.h>

Go to the source code of this file.

Functions

int | _read_r (struct _reent *r, int file, char *ptr, int len)
int | _lseek_r (struct _reent *r, int file, int ptr, int dir)
int | _write_r (struct _reent *r, int file, char *ptr, int len)
int | _close_r (struct _reent *r, int file)
caddr_t | _sbrk_r (struct _reent *r, int incr)
int | _fstat_r (struct _reent *r, int file, struct stat *st)
int | _isatty_r (struct _reent *r, int fd)

Function Documentation

int _close_r | ( | struct _reent * | r,
 |  | int | file
 | ) |  |

Definition at line 44 of file syscalls.c.

int _fstat_r | ( | struct _reent * | r,
 |  | int | file,
 |  | struct stat * | st
 | ) |  |

Definition at line 64 of file syscalls.c.

int _isatty_r | ( | struct _reent * | r,
 |  | int | fd
 | ) |  |

Definition at line 75 of file syscalls.c.

int _lseek_r | ( | struct _reent * | r,
 |  | int | file,
 |  | int | ptr,
 |  | int | dir
 | ) |  |

Definition at line 20 of file syscalls.c.

int _read_r | ( | struct _reent * | r,
 |  | int | file,
 |  | char * | ptr,
 |  | int | len
 | ) |  |

Definition at line 9 of file syscalls.c.

caddr_t _sbrk_r | ( | struct _reent * | r,
 |  | int | incr
 | ) |  |

Definition at line 54 of file syscalls.c.

int _write_r | ( | struct _reent * | r,
 |  | int | file,
 |  | char * | ptr,
 |  | int | len
 | ) |  |

Definition at line 32 of file syscalls.c.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/clock-arch.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/clock-arch.c File Reference
#include "clock-arch.h"
#include "LPC17xx.h"

Go to the source code of this file.

Defines

#define | LED_PIN (1<<6)

Functions

void | SysTick_Handler (void)
SysTick handler sub-routine (1ms)
void | clock_init (void)
clock_time_t | clock_time (void)

Variables

__IO clock_time_t | Ticks

Define Documentation

#define LED_PIN (1<<6)

Definition at line 6 of file clock-arch.c.

Function Documentation

void SysTick_Handler ( void )

SysTick handler sub-routine (1ms)

SysTick interrupt handler.

Parameters:
[in] None
Returns:
None
Parameters:
None
Returns:
None

Definition at line 9 of file clock-arch.c.

Variable Documentation

__IO clock_time_t Ticks

Definition at line 4 of file clock-arch.c.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/clock-arch.h File Reference

Defines | Typedefs
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/clock-arch.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | CLOCK_CONF_SECOND 100

Typedefs

typedef unsigned int | clock_time_t

Define Documentation

#define CLOCK_CONF_SECOND 100

Definition at line 8 of file clock-arch.h.

Typedef Documentation

typedef unsigned int clock_time_t

Definition at line 6 of file clock-arch.h.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/emac.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/emac.c File Reference
#include "emac.h"
#include "lpc17xx_emac.h"
#include "lpc17xx_pinsel.h"
#include <string.h>
#include <stdio.h>
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | DB _DBG((uint8_t *)db)

Functions

BOOL_8 | tapdev_init (void)
UNS_32 | tapdev_read (void *pPacket)
BOOL_8 | tapdev_send (void *pPacket, UNS_32 size)

Variables

char | db [64]
Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/emac.h File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/emac.h File Reference
#include "lpc_types.h"
#include "uip-conf.h"
#include "uipopt.h"
#include "lpc17xx_emac.h"

Go to the source code of this file.

Defines

#define | EMAC_MAX_PACKET_SIZE (UIP_CONF_BUFFER_SIZE + 16)
#define | ENET_DMA_DESC_NUMB 3
#define | AUTO_NEGOTIATION_ENA 1
#define | PHY_TO 200000
#define | RMII 1
#define | EMAC_ADDR0 0x10
#define | EMAC_ADDR1 0x1F
#define | EMAC_ADDR2 0xE0
#define | EMAC_ADDR3 0x12
#define | EMAC_ADDR4 0x1D
#define | EMAC_ADDR5 0x0C
#define | SPEED_100 1
#define | SPEED_10 0
#define | FULL_DUPLEX 1
#define | HALF_DUPLEX 0
#define | FIX_SPEED SPEED_100
#define | FIX_DUPLEX FULL_DUPLEX

Functions

BOOL_8 | tapdev_init (void)
UNS_32 | tapdev_read (void *pPacket)
BOOL_8 | tapdev_send (void *pPacket, UNS_32 size)

Define Documentation

#define AUTO_NEGOTIATION_ENA 1

Definition at line 12 of file emac.h.

#define EMAC_ADDR0 0x10

Definition at line 19 of file emac.h.

#define EMAC_ADDR1 0x1F

Definition at line 20 of file emac.h.

#define EMAC_ADDR2 0xE0

Definition at line 21 of file emac.h.

#define EMAC_ADDR3 0x12

Definition at line 22 of file emac.h.

#define EMAC_ADDR4 0x1D

Definition at line 23 of file emac.h.

#define EMAC_ADDR5 0x0C

Definition at line 24 of file emac.h.

#define EMAC_MAX_PACKET_SIZE (UIP_CONF_BUFFER_SIZE + 16)

Definition at line 9 of file emac.h.

#define ENET_DMA_DESC_NUMB 3

Definition at line 11 of file emac.h.

#define FIX_DUPLEX FULL_DUPLEX

Definition at line 42 of file emac.h.

#define FIX_SPEED SPEED_100

Definition at line 41 of file emac.h.

#define FULL_DUPLEX 1

Definition at line 38 of file emac.h.

#define HALF_DUPLEX 0

Definition at line 39 of file emac.h.

#define PHY_TO 200000

Definition at line 13 of file emac.h.

#define RMII 1

Definition at line 14 of file emac.h.

#define SPEED_10 0

Definition at line 37 of file emac.h.

#define SPEED_100 1

Definition at line 36 of file emac.h.

Generated on Mon Nov 28 2011 11:15:08 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _EMAC
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 46 of file lpc17xx_libcfg.h.

#define _EMAC

Definition at line 123 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 49 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 55 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 56 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 140 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 38 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/main.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/main.c File Reference
#include <stdio.h>
#include <string.h>
#include "debug_frmwrk.h"
#include "clock-arch.h"
#include "timer.h"
#include "uip-conf.h"
#include "uipopt.h"
#include "uip_arp.h"
#include "uip.h"
#include "emac.h"
#include "lpc_types.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | BUF ((struct uip_eth_hdr *)&uip_buf[0])
#define | LED_PIN (1<<6)
#define | LED2_MASK ((1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6))
#define | LED1_MASK ((1<<28) | (1<<29) | (0x80000000))
#define | DB _DBG((uint8_t *)_db)

Functions

void | LED_Init (void)
void | uip_log (char *m)
int | c_entry (void)
int | main (void)

Variables

char | _db [64]

Define Documentation

#define BUF ((struct uip_eth_hdr *)&uip_buf[0])

Definition at line 18 of file main.c.

#define DB _DBG((uint8_t *)_db)

Definition at line 27 of file main.c.

#define LED1_MASK ((1<<28) | (1<<29) | (0x80000000))

Definition at line 22 of file main.c.

#define LED2_MASK ((1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6))

Definition at line 21 of file main.c.

#define LED_PIN (1<<6)

Definition at line 20 of file main.c.

Function Documentation

int c_entry ( void )

Definition at line 90 of file main.c.

void LED_Init ( void )

Definition at line 30 of file main.c.

int main ( void )

Definition at line 239 of file main.c.

Variable Documentation

char _db[64]

Definition at line 28 of file main.c.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/uip-conf.h File Reference

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/uip-conf.h File Reference
Configuration options for uIP
#include <inttypes.h>
#include "webserver.h"

Go to the source code of this file.

Project-specific configuration options

uIP has a number of configuration options that can be overridden for each project. These are kept in a project-specific uip-conf.h file and all configuration names have the prefix UIP_CONF.

#define | UIP_CONF_MAX_CONNECTIONS
#define | UIP_CONF_MAX_LISTENPORTS
#define | UIP_CONF_BUFFER_SIZE
#define | UIP_CONF_BYTE_ORDER
#define | UIP_CONF_LOGGING
#define | UIP_CONF_UDP
#define | UIP_CONF_UDP_CHECKSUMS
#define | UIP_CONF_STATISTICS
typedef uint8_t | u8_t
typedef uint16_t | u16_t
typedef unsigned short | uip_stats_t

Detailed Description

An example uIP configuration file

Author:
Adam Dunkels <adam@sics.se>

Definition in file uip-conf.h.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/clock.h File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/clock.h File Reference
#include "clock-arch.h"

Go to the source code of this file.

Defines

#define | CLOCK_SECOND

Functions

void | clock_init (void)
clock_time_t | clock_time (void)
Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc-addrlabels.h File Reference

Defines | Typedefs
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc-addrlabels.h File Reference
Local continuations

Go to the source code of this file.

Defines

#define | LC_INIT(s) s = NULL
#define | LC_RESUME(s)
#define | LC_SET(s) do { ({ __label__ resume; resume: (s) = &&resume; }); }while(0)
#define | LC_END(s)

Typedefs

typedef void * | lc_t

Detailed Description

Implementation of local continuations based on the "Labels as values" feature of gcc

Author:
Adam Dunkels <adam@sics.se>

This implementation of local continuations is based on a special feature of the GCC C compiler called "labels as values". This feature allows assigning pointers with the address of the code corresponding to a particular C label.

For more information, see the GCC documentation: http://gcc.gnu.org/onlinedocs/gcc/Labels-as-Values.html

Thanks to dividuum for finding the nice local scope label implementation.

Definition in file lc-addrlabels.h.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc-switch.h File Reference

Defines | Typedefs
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc-switch.h File Reference
Local continuations

Go to the source code of this file.

Defines

#define | __LC_SWTICH_H__
#define | LC_INIT(s) s = 0;
#define | LC_RESUME(s) switch(s) { case 0:
#define | LC_SET(s) s = __LINE__; case __LINE__:
#define | LC_END(s) }

Typedefs

typedef unsigned short | lc_t

Detailed Description

Implementation of local continuations based on switch() statment

Author:
Adam Dunkels <adam@sics.se>

This implementation of local continuations uses the C switch() statement to resume execution of a function somewhere inside the function's body. The implementation is based on the fact that switch() statements are able to jump directly into the bodies of control structures such as if() or while() statmenets.

This implementation borrows heavily from Simon Tatham's coroutines implementation in C: http://www.chiark.greenend.org.uk/~sgtatham/coroutines.html

Definition in file lc-switch.h.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc.h File Reference
Local continuations
#include "lc-switch.h"

Go to the source code of this file.

Defines

#define __LC_H__

Detailed Description

Local continuations

Author:
Adam Dunkels <adam@sics.se>

Definition in file lc.h.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.c File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.c File Reference
#include <stdio.h>
#include <string.h>
#include "uipopt.h"
#include "psock.h"
#include "uip.h"

Go to the source code of this file.

Defines

#define | STATE_NONE 0
#define | STATE_ACKED 1
#define | STATE_READ 2
#define | STATE_BLOCKED_NEWDATA 3
#define | STATE_BLOCKED_CLOSE 4
#define | STATE_BLOCKED_SEND 5
#define | STATE_DATA_SENT 6
#define | BUF_NOT_FULL 0
#define | BUF_NOT_FOUND 0
#define | BUF_FULL 1
#define | BUF_FOUND 2

Functions

PT_THREAD (psock_send(register struct psock *s, const char *buf, unsigned int len))
PT_THREAD (psock_generator_send(register struct psock *s, unsigned short(*generate)(void *), void *arg))
u16_t | psock_datalen (struct psock *psock)
char | psock_newdata (struct psock *s)

Define Documentation

#define BUF_FOUND 2

Definition at line 71 of file psock.c.

#define BUF_FULL 1

Definition at line 64 of file psock.c.

#define BUF_NOT_FOUND 0

Definition at line 57 of file psock.c.

#define BUF_NOT_FULL 0

Definition at line 56 of file psock.c.

#define STATE_ACKED 1

Definition at line 44 of file psock.c.

#define STATE_BLOCKED_CLOSE 4

Definition at line 47 of file psock.c.

#define STATE_BLOCKED_NEWDATA 3

Definition at line 46 of file psock.c.

#define STATE_BLOCKED_SEND 5

Definition at line 48 of file psock.c.

#define STATE_DATA_SENT 6

Definition at line 49 of file psock.c.

#define STATE_NONE 0

Definition at line 43 of file psock.c.

#define STATE_READ 2

Definition at line 45 of file psock.c.

Function Documentation

PT_THREAD ( psock_generator_send(register struct psock *s,unsigned short(*generate)(void *), void *arg) )

Definition at line 216 of file psock.c.

PT_THREAD ( psock_send(register struct psock *s, const char *buf,unsigned int len) )

Definition at line 177 of file psock.c.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.h File Reference

Data Structures | Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.h File Reference
Protosockets library
#include "uipopt.h"
#include "pt.h"

Go to the source code of this file.

Data Structures

struct | psock_buf
struct | psock

Defines

#define | PSOCK_INIT(psock, buffer, buffersize)
#define | PSOCK_BEGIN(psock)
#define | PSOCK_SEND(psock, data, datalen)
#define | PSOCK_SEND_STR(psock, str)
Send a null-terminated string.
#define | PSOCK_GENERATOR_SEND(psock, generator, arg)
Generate data with a function and send it.
#define | PSOCK_CLOSE(psock)
#define | PSOCK_READBUF(psock)
#define | PSOCK_READTO(psock, c)
#define | PSOCK_DATALEN(psock)
#define | PSOCK_EXIT(psock)
#define | PSOCK_CLOSE_EXIT(psock)
#define | PSOCK_END(psock)
#define | PSOCK_NEWDATA(psock)
#define | PSOCK_WAIT_UNTIL(psock, condition)
#define | PSOCK_WAIT_THREAD(psock, condition) PT_WAIT_THREAD(&((psock)->pt), (condition))

Functions

void | psock_init (struct psock *psock, char *buffer, unsigned int buffersize)
PT_THREAD (psock_send(struct psock *psock, const char *buf, unsigned int len))
PT_THREAD (psock_generator_send(struct psock *psock, unsigned short(*f)(void *), void *arg))
PT_THREAD (psock_readbuf(struct psock *psock))
PT_THREAD (psock_readto(struct psock *psock, unsigned char c))
u16_t | psock_datalen (struct psock *psock)
char | psock_newdata (struct psock *s)

Detailed Description

Protosocket library header file

Author:
Adam Dunkels <adam@sics.se>

Definition in file psock.h.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/pt.h File Reference

Data Structures | Defines
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/pt.h File Reference
Pt
#include "lc.h"

Go to the source code of this file.

Data Structures

struct | pt

Defines

#define | PT_WAITING 0
#define | PT_EXITED 1
#define | PT_ENDED 2
#define | PT_YIELDED 3
Initialization
#define | PT_INIT(pt)
Declaration and definition
#define | PT_THREAD(name_args)
#define | PT_BEGIN(pt)
#define | PT_END(pt)
Blocked wait
#define | PT_WAIT_UNTIL(pt, condition)
#define | PT_WAIT_WHILE(pt, cond)
Hierarchical protothreads
#define | PT_WAIT_THREAD(pt, thread)
#define | PT_SPAWN(pt, child, thread)
Exiting and restarting
#define | PT_RESTART(pt)
#define | PT_EXIT(pt)
Calling a protothread
#define | PT_SCHEDULE(f)
Yielding from a protothread
#define | PT_YIELD(pt)
#define | PT_YIELD_UNTIL(pt, cond)
Yield from the protothread until a condition occurs.

Detailed Description

Protothreads implementation.

Author:
Adam Dunkels <adam@sics.se>

Definition in file pt.h.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.c File Reference
Timer library
#include "clock.h"
#include "timer.h"

Go to the source code of this file.

Functions

void | timer_set (struct timer *t, clock_time_t interval)
void | timer_reset (struct timer *t)
void | timer_restart (struct timer *t)
int | timer_expired (struct timer *t)

Detailed Description

Timer library implementation.

Author:
Adam Dunkels <adam@sics.se>

Definition in file timer.c.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.h File Reference

Data Structures | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.h File Reference
Timer library
#include "clock.h"

Go to the source code of this file.

Data Structures

struct | timer

Functions

void | timer_set (struct timer *t, clock_time_t interval)
void | timer_reset (struct timer *t)
void | timer_restart (struct timer *t)
int | timer_expired (struct timer *t)

Detailed Description

Timer library header file.

Author:
Adam Dunkels <adam@sics.se>

Definition in file timer.h.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.c File Reference

Data Structures | Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.c File Reference
uIP packet forwarding
#include "uip.h"
#include "uip_arch.h"
#include "uip-fw.h"
#include <string.h>

Go to the source code of this file.

Data Structures

struct | tcpip_hdr
struct | icmpip_hdr
struct | fwcache_entry

Defines

#define | ICMP_ECHO 8
#define | ICMP_TE 11
#define | BUF ((struct tcpip_hdr *)&uip_buf[UIP_LLH_LEN])
#define | ICMPBUF ((struct icmpip_hdr *)&uip_buf[UIP_LLH_LEN])
#define | FWCACHE_SIZE 2
#define | FW_TIME 20

Functions

void | uip_fw_init (void)
u8_t | uip_fw_output (void)
u8_t | uip_fw_forward (void)
void | uip_fw_register (struct uip_fw_netif *netif)
void | uip_fw_default (struct uip_fw_netif *netif)
void | uip_fw_periodic (void)

Detailed Description

uIP packet forwarding.

Author:
Adam Dunkels <adam@sics.se>

This file implements a number of simple functions which do packet forwarding over multiple network interfaces with uIP.

Definition in file uip-fw.c.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.h File Reference

Data Structures | Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.h File Reference
uIP packet forwarding
#include "uip.h"

Go to the source code of this file.

Data Structures

struct | uip_fw_netif

Defines

#define | UIP_FW_NETIF(ip1, ip2, ip3, ip4, nm1, nm2, nm3, nm4, outputfunc)
#define | uip_fw_setipaddr(netif, addr)
#define | uip_fw_setnetmask(netif, addr)
#define | UIP_FW_LOCAL
#define | UIP_FW_OK
#define | UIP_FW_FORWARDED
#define | UIP_FW_ZEROLEN
#define | UIP_FW_TOOLARGE
#define | UIP_FW_NOROUTE
#define | UIP_FW_DROPPED

Functions

void | uip_fw_init (void)
u8_t | uip_fw_forward (void)
u8_t | uip_fw_output (void)
void | uip_fw_register (struct uip_fw_netif *netif)
void | uip_fw_default (struct uip_fw_netif *netif)
void | uip_fw_periodic (void)

Detailed Description

uIP packet forwarding header file.

Author:
Adam Dunkels <adam@sics.se>

Definition in file uip-fw.h.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.c File Reference

Data Structures | Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.c File Reference
#include "uip-neighbor.h"
#include <string.h>
#include <stdio.h>

Go to the source code of this file.

Data Structures

struct | neighbor_entry

Defines

#define | MAX_TIME 128
#define | ENTRIES 8

Functions

void | uip_neighbor_init (void)
void | uip_neighbor_periodic (void)
void | uip_neighbor_add (uip_ipaddr_t ipaddr, struct uip_neighbor_addr *addr)
void | uip_neighbor_update (uip_ipaddr_t ipaddr)
struct uip_neighbor_addr * | uip_neighbor_lookup (uip_ipaddr_t ipaddr)

Detailed Description

Database of link-local neighbors, used by IPv6 code and to be used by a future ARP code rewrite.

Author:
Adam Dunkels <adam@sics.se>

Definition in file uip-neighbor.c.

Define Documentation

#define ENTRIES 8

Definition at line 52 of file uip-neighbor.c.

#define MAX_TIME 128

Definition at line 47 of file uip-neighbor.c.

Function Documentation

void uip_neighbor_add | ( | uip_ipaddr_t | ipaddr,
 |  | struct uip_neighbor_addr * | addr
 | ) |  |

Definition at line 86 of file uip-neighbor.c.

void uip_neighbor_init ( void )

Definition at line 64 of file uip-neighbor.c.

struct uip_neighbor_addr* uip_neighbor_lookup ( uip_ipaddr_t ipaddr ) [read]

Definition at line 145 of file uip-neighbor.c.

void uip_neighbor_periodic ( void )

Definition at line 74 of file uip-neighbor.c.

void uip_neighbor_update ( uip_ipaddr_t ipaddr )

Definition at line 134 of file uip-neighbor.c.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.h File Reference

Data Structures | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.h File Reference
#include "uip.h"

Go to the source code of this file.

Data Structures

struct | uip_neighbor_addr

Functions

void | uip_neighbor_init (void)
void | uip_neighbor_add (uip_ipaddr_t ipaddr, struct uip_neighbor_addr *addr)
void | uip_neighbor_update (uip_ipaddr_t ipaddr)
struct uip_neighbor_addr * | uip_neighbor_lookup (uip_ipaddr_t ipaddr)
void | uip_neighbor_periodic (void)

Detailed Description

Header file for database of link-local neighbors, used by IPv6 code and to be used by future ARP code.

Author:
Adam Dunkels <adam@sics.se>

Definition in file uip-neighbor.h.

Function Documentation

void uip_neighbor_add | ( | uip_ipaddr_t | ipaddr,
 |  | struct uip_neighbor_addr * | addr
 | ) |  |

Definition at line 86 of file uip-neighbor.c.

void uip_neighbor_init ( void )

Definition at line 64 of file uip-neighbor.c.

struct uip_neighbor_addr* uip_neighbor_lookup ( uip_ipaddr_t ipaddr ) [read]

Definition at line 145 of file uip-neighbor.c.

void uip_neighbor_periodic ( void )

Definition at line 74 of file uip-neighbor.c.

void uip_neighbor_update ( uip_ipaddr_t ipaddr )

Definition at line 134 of file uip-neighbor.c.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-split.c File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-split.c File Reference
#include <string.h>
#include "uip-split.h"
#include "uip.h"
#include "uip-fw.h"
#include "uip_arch.h"

Go to the source code of this file.

Defines

#define | BUF ((struct uip_tcpip_hdr *)&uip_buf[UIP_LLH_LEN])

Functions

void | uip_split_output (void)

Define Documentation

#define BUF ((struct uip_tcpip_hdr *)&uip_buf[UIP_LLH_LEN])

Definition at line 45 of file uip-split.c.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-split.h File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-split.h File Reference
uIP TCP throughput booster hack

Go to the source code of this file.

Functions

void uip_split_output (void)

Detailed Description

Module for splitting outbound TCP segments in two to avoid the delayed ACK throughput degradation.

Author:
Adam Dunkels <adam@sics.se>

Definition in file uip-split.h.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.c File Reference
The uIP TCP/IP stack
#include "uip.h"
#include "uipopt.h"
#include "uip_arch.h"
#include <string.h>
#include <stdio.h>

Go to the source code of this file.

Defines

#define | DEBUG_PRINTF(...)
#define | TCP_FIN 0x01
#define | TCP_SYN 0x02
#define | TCP_RST 0x04
#define | TCP_PSH 0x08
#define | TCP_ACK 0x10
#define | TCP_URG 0x20
#define | TCP_CTL 0x3f
#define | TCP_OPT_END 0
#define | TCP_OPT_NOOP 1
#define | TCP_OPT_MSS 2
#define | TCP_OPT_MSS_LEN 4
#define | ICMP_ECHO_REPLY 0
#define | ICMP_ECHO 8
#define | ICMP6_ECHO_REPLY 129
#define | ICMP6_ECHO 128
#define | ICMP6_NEIGHBOR_SOLICITATION 135
#define | ICMP6_NEIGHBOR_ADVERTISEMENT 136
#define | ICMP6_FLAG_S (1 << 6)
#define | ICMP6_OPTION_SOURCE_LINK_ADDRESS 1
#define | ICMP6_OPTION_TARGET_LINK_ADDRESS 2
#define | BUF ((struct uip_tcpip_hdr *)&uip_buf[UIP_LLH_LEN])
#define | FBUF ((struct uip_tcpip_hdr *)&uip_reassbuf[0])
#define | ICMPBUF ((struct uip_icmpip_hdr *)&uip_buf[UIP_LLH_LEN])
#define | UDPBUF ((struct uip_udpip_hdr *)&uip_buf[UIP_LLH_LEN])
#define | UIP_STAT(s) s
#define | UIP_LOG(m) uip_log(m)

Functions

void | uip_setipid (u16_t id)
void | uip_log (char *msg)
void | uip_add32 (u8_t *op32, u16_t op16)
u16_t | uip_chksum (u16_t *data, u16_t len)
u16_t | uip_ipchksum (void)
u16_t | uip_tcpchksum (void)
u16_t | uip_udpchksum (void)
void | uip_init (void)
struct uip_conn * | uip_connect (uip_ipaddr_t *ripaddr, u16_t rport)
void | uip_unlisten (u16_t port)
void | uip_listen (u16_t port)
void | uip_process (u8_t flag)
u16_t | htons (u16_t val)
void | uip_send (const void *data, int len)

Variables

uip_ipaddr_t uip_hostaddr
uip_ipaddr_t uip_draddr
uip_ipaddr_t uip_netmask
struct uip_eth_addr | uip_ethaddr = {{0,0,0,0,0,0}}
void * | uip_appdata
void * | uip_sappdata
u16_t uip_len
u16_t uip_slen
u8_t uip_flags
struct uip_conn * | uip_conn
struct uip_conn | uip_conns [UIP_CONNS]
u16_t | uip_listenports [UIP_LISTENPORTS]
u8_t | uip_acc32 [4]
static u8_t | opt
struct uip_stats | uip_stat

Detailed Description

The uIP TCP/IP stack code.

Author:
Adam Dunkels <adam@dunkels.com>

Definition in file uip.c.

Define Documentation

#define DEBUG_PRINTF ( ... )

Definition at line 1 of file uip.c.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h File Reference

Data Structures | Defines | Typedefs | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h File Reference
The uIP TCP/IP stack
#include "uipopt.h"

Go to the source code of this file.

Data Structures

struct | uip_conn
struct | uip_stats
struct | uip_tcpip_hdr
struct | uip_icmpip_hdr
struct | uip_udpip_hdr
struct | uip_eth_addr

Defines

#define | uip_sethostaddr(addr)
#define | uip_gethostaddr(addr)
#define | uip_setdraddr(addr)
#define | uip_setnetmask(addr)
#define | uip_getdraddr(addr)
#define | uip_getnetmask(addr)
#define | uip_input()
#define | uip_periodic(conn)
#define | uip_conn_active(conn) (uip_conns[conn].tcpstateflags != UIP_CLOSED)
#define | uip_periodic_conn(conn)
#define | uip_poll_conn(conn)
#define | uip_outstanding(conn) ((conn)->len)
#define | uip_datalen()
#define | uip_urgdatalen()
#define | uip_close()
#define | uip_abort()
#define | uip_stop()
#define | uip_stopped(conn)
#define | uip_restart()
#define | uip_udpconnection()
#define | uip_newdata()
#define | uip_acked()
#define | uip_connected()
#define | uip_closed()
#define | uip_aborted()
#define | uip_timedout()
#define | uip_rexmit()
#define | uip_poll()
#define | uip_initialmss()
#define | uip_mss()
#define | uip_udp_remove(conn)
#define | uip_udp_bind(conn, port)
#define | uip_udp_send(len)
#define | uip_ipaddr(addr, addr0, addr1, addr2, addr3)
#define | uip_ip6addr(addr, addr0, addr1, addr2, addr3, addr4, addr5, addr6, addr7)
#define | uip_ipaddr_copy(dest, src)
#define | uip_ipaddr_cmp(addr1, addr2)
#define | uip_ipaddr_maskcmp(addr1, addr2, mask)
#define | uip_ipaddr_mask(dest, src, mask)
#define | uip_ipaddr1(addr)
#define | uip_ipaddr2(addr)
#define | uip_ipaddr3(addr)
#define | uip_ipaddr4(addr)
#define | HTONS(n)
#define | ntohs htons
#define | UIP_ACKDATA 1
#define | UIP_NEWDATA 2
#define | UIP_REXMIT 4
#define | UIP_POLL 8
#define | UIP_CLOSE 16
#define | UIP_ABORT 32
#define | UIP_CONNECTED 64
#define | UIP_TIMEDOUT 128
#define | UIP_DATA 1
#define | UIP_TIMER 2
#define | UIP_POLL_REQUEST 3
#define | UIP_UDP_SEND_CONN 4
#define | UIP_CLOSED 0
#define | UIP_SYN_RCVD 1
#define | UIP_SYN_SENT 2
#define | UIP_ESTABLISHED 3
#define | UIP_FIN_WAIT_1 4
#define | UIP_FIN_WAIT_2 5
#define | UIP_CLOSING 6
#define | UIP_TIME_WAIT 7
#define | UIP_LAST_ACK 8
#define | UIP_TS_MASK 15
#define | UIP_STOPPED 16
#define | UIP_APPDATA_SIZE
#define | UIP_PROTO_ICMP 1
#define | UIP_PROTO_TCP 6
#define | UIP_PROTO_UDP 17
#define | UIP_PROTO_ICMP6 58
#define | UIP_IPH_LEN 20
#define | UIP_UDPH_LEN 8
#define | UIP_TCPH_LEN 20
#define | UIP_IPUDPH_LEN (UIP_UDPH_LEN + UIP_IPH_LEN)
#define | UIP_IPTCPH_LEN (UIP_TCPH_LEN + UIP_IPH_LEN)
#define | UIP_TCPIP_HLEN UIP_IPTCPH_LEN

Typedefs

typedef u16_t | uip_ip4addr_t [2]
typedef u16_t | uip_ip6addr_t [8]
typedef uip_ip4addr_t | uip_ipaddr_t

Functions

void | uip_init (void)
void | uip_setipid (u16_t id)
void | uip_listen (u16_t port)
void | uip_unlisten (u16_t port)
struct uip_conn * | uip_connect (uip_ipaddr_t *ripaddr, u16_t port)
void | uip_send (const void *data, int len)
struct uip_udp_conn * | uip_udp_new (uip_ipaddr_t *ripaddr, u16_t rport)
u16_t | htons (u16_t val)
void | uip_process (u8_t flag)
u16_t | uip_chksum (u16_t *data, u16_t len)
u16_t | uip_ipchksum (void)
u16_t | uip_tcpchksum (void)
u16_t | uip_udpchksum (void)

Variables

u8_t | uip_buf [UIP_BUFSIZE+2]
void * | uip_appdata
u16_t uip_len
struct uip_conn * | uip_conn
struct uip_conn | uip_conns [UIP_CONNS]
u8_t | uip_acc32 [4]
struct uip_stats | uip_stat
u8_t uip_flags
uip_ipaddr_t uip_hostaddr
uip_ipaddr_t uip_netmask
uip_ipaddr_t uip_draddr

Detailed Description

Header file for the uIP TCP/IP stack.

Author:
Adam Dunkels <adam@dunkels.com>

The uIP TCP/IP stack header file contains definitions for a number of C macros that are used by uIP programs as well as internal uIP structures, TCP/IP header structures and function declarations.

Definition in file uip.h.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arch.h File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arch.h File Reference
Architecture specific uIP functions
#include "uip.h"

Go to the source code of this file.

Functions

void | uip_add32 (u8_t *op32, u16_t op16)
u16_t | uip_chksum (u16_t *buf, u16_t len)
u16_t | uip_ipchksum (void)
u16_t | uip_tcpchksum (void)
u16_t | uip_udpchksum (void)

Detailed Description

Declarations of architecture specific functions.

Author:
Adam Dunkels <adam@dunkels.com>

Definition in file uip_arch.h.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.c File Reference

Data Structures | Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.c File Reference
uIP Address Resolution Protocol
#include "uip_arp.h"
#include <string.h>

Go to the source code of this file.

Data Structures

struct | arp_hdr
struct | ethip_hdr
struct | arp_entry

Defines

#define | ARP_REQUEST 1
#define | ARP_REPLY 2
#define | ARP_HWTYPE_ETH 1
#define | BUF ((struct arp_hdr *)&uip_buf[0])
#define | IPBUF ((struct ethip_hdr *)&uip_buf[0])

Functions

void | uip_arp_init (void)
void | uip_arp_timer (void)
void | uip_arp_ipin (void)
void | uip_arp_arpin (void)
void | uip_arp_out (void)

Variables

static u8_t | c

Detailed Description

Implementation of the ARP Address Resolution Protocol.

Author:
Adam Dunkels <adam@dunkels.com>

Definition in file uip_arp.c.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.h File Reference

Data Structures | Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.h File Reference
uIP Address Resolution Protocol
#include "uip.h"

Go to the source code of this file.

Data Structures

struct | uip_eth_hdr

Defines

#define | UIP_ETHTYPE_ARP 0x0806
#define | UIP_ETHTYPE_IP 0x0800
#define | UIP_ETHTYPE_IP6 0x86dd
#define | uip_setethaddr(eaddr)

Functions

void | uip_arp_init (void)
void | uip_arp_ipin (void)
void | uip_arp_arpin (void)
void | uip_arp_out (void)
void | uip_arp_timer (void)

Variables

struct uip_eth_addr | uip_ethaddr

Detailed Description

Macros and definitions for the ARP module.

Author:
Adam Dunkels <adam@dunkels.com>

Definition in file uip_arp.h.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uiplib.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uiplib.c File Reference
#include "uip.h"
#include "uiplib.h"

Go to the source code of this file.

Functions

unsigned char uiplib_ipaddrconv (char *addrstr, unsigned char *ipaddr)
Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uiplib.h File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uiplib.h File Reference

Go to the source code of this file.

Functions

unsigned char uiplib_ipaddrconv (char *addrstr, unsigned char *addr)

Detailed Description

Various uIP library functions.

Author:
Adam Dunkels <adam@sics.se>

Definition in file uiplib.h.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uipopt.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uipopt.h File Reference
Configuration options for uIP
#include "uip-conf.h"

Go to the source code of this file.

Defines

#define | UIP_LITTLE_ENDIAN 3412
#define | UIP_BIG_ENDIAN 1234
Static configuration options

These configuration options can be used for setting the IP address settings statically, but only if UIP_FIXEDADDR is set to 1. The configuration options for a specific node includes IP address, netmask and default router as well as the Ethernet address. The netmask, default router and Ethernet address are appliciable only if uIP should be run over Ethernet.

All of these should be changed to suit your project.

#define | UIP_FIXEDADDR
#define | UIP_PINGADDRCONF
#define | UIP_FIXEDETHADDR
IP configuration options
#define | UIP_TTL 64
#define | UIP_REASSEMBLY
#define | UIP_REASS_MAXAGE 40
UDP configuration options
#define | UIP_UDP
#define | UIP_UDP_CHECKSUMS
#define | UIP_UDP_CONNS
TCP configuration options

The name of the function that should be called when UDP datagrams arrive.

#define | UIP_ACTIVE_OPEN
#define | UIP_CONNS
#define | UIP_LISTENPORTS
#define | UIP_URGDATA
#define | UIP_RTO 3
#define | UIP_MAXRTX 8
#define | UIP_MAXSYNRTX 5
#define | UIP_TCP_MSS (UIP_BUFSIZE - UIP_LLH_LEN - UIP_TCPIP_HLEN)
#define | UIP_RECEIVE_WINDOW
#define | UIP_TIME_WAIT_TIMEOUT 120
ARP configuration options
#define | UIP_ARPTAB_SIZE
#define | UIP_ARP_MAXAGE 120
CPU architecture configuration

The CPU architecture configuration is where the endianess of the CPU on which uIP is to be run is specified. Most CPUs today are little endian, and the most notable exception are the Motorolas which are big endian. The BYTE_ORDER macro should be changed to reflect the CPU architecture on which uIP is to be run.

#define | UIP_BYTE_ORDER

General configuration options

#define | UIP_BUFSIZE
#define | UIP_STATISTICS
#define | UIP_LOGGING
#define | UIP_BROADCAST
#define | UIP_LLH_LEN
void | uip_log (char *msg)

Detailed Description

Configuration options for uIP.

Author:
Adam Dunkels <adam@dunkels.com>

This file is used for tweaking various configuration options for uIP. You should make a copy of this file into one of your project's directories instead of editing this example "uipopt.h" file that comes with the uIP distribution.

Definition in file uipopt.h.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Flash_2_Ram_Test/flash_2_ram.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Flash_2_Ram_Test/flash_2_ram.c File Reference

This example used to test GPDMA function by transferring data from flash to ram memory. More...

#include "lpc17xx_gpdma.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | DMA_SIZE 16

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | err_menu [] = "Buffer Check fail!"
uint8_t | compl_menu [] = "Buffer Check success!"
const uint32_t | DMASrc_Buffer [DMA_SIZE]
uint32_t | DMADest_Buffer [DMA_SIZE]
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err

Detailed Description

This example used to test GPDMA function by transferring data from flash to ram memory.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file flash_2_ram.c.

Generated on Mon Nov 28 2011 11:15:10 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Flash_2_Ram_Test/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Flash_2_Ram_Test/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _GPDMA
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/GPDMA_Sleep/gpdma_sleep.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/GPDMA_Sleep/gpdma_sleep.c File Reference

This example used to test GPDMA operation in sleep mode. More...

#include "lpc17xx_gpdma.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_clkpwr.h"

Go to the source code of this file.

Defines

#define | DMA_SIZE 0x100UL
#define | DMA_SRC LPC_AHBRAM1_BASE
#define | DMA_DST (DMA_SRC+DMA_SIZE)

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | err_menu [] = "Buffer Check fail!"
uint8_t | compl_menu [] = "Buffer Check success!"
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err

Detailed Description

This example used to test GPDMA operation in sleep mode.

Version:
1.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file gpdma_sleep.c.

Generated on Mon Nov 28 2011 11:15:10 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/GPDMA_Sleep/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/GPDMA_Sleep/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _GPDMA
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Link_list/link_list.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Link_list/link_list.c File Reference

This example used to test GPDMA Link list function. More...

#include "lpc17xx_gpdma.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | DMA_SIZE 32

Functions

uint32_t DMASrc_Buffer1[DMA_SIZE/2] | __attribute__ ((at(0x2007C000)))
uint32_t DMASrc_Buffer2[DMA_SIZE/2] | __attribute__ ((at(0x2007C200)))
void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | err_menu [] = "Buffer Check fail!\n\r"
uint8_t | compl_menu [] = "Buffer Check success!\n\r"
uint32_t | DMADest_Buffer [DMA_SIZE]
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err

Detailed Description

This example used to test GPDMA Link list function.

Version:
1.0
Date:
16. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file link_list.c.

Generated on Mon Nov 28 2011 11:15:10 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Link_list/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Link_list/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _GPDMA
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Ram_2_Ram_Test/gpdma_r2r_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Ram_2_Ram_Test/gpdma_r2r_test.c File Reference
#include "lpc17xx_gpdma.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | DMA_SIZE 0x100UL
#define | DMA_SRC LPC_AHBRAM1_BASE
#define | DMA_DST (DMA_SRC+DMA_SIZE)

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | err_menu [] = "Buffer Check fail!"
uint8_t | compl_menu [] = "Buffer Check success!"
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err
Generated on Mon Nov 28 2011 11:15:10 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Ram_2_Ram_Test/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Ram_2_Ram_Test/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _GPDMA
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/GPIO_Interrupt/gpio_int.c File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/GPIO_Interrupt/gpio_int.c File Reference

This example used to test GPIO interrupt function. More...

#include "LPC17xx.h"
#include "lpc17xx_gpio.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_libcfg.h"

Go to the source code of this file.

Defines

#define | MCB_LPC_1768

Functions

void | EINT3_IRQHandler (void)
External interrupt 3 handler sub-routine.
void | delay (void)
Delay function.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Detailed Description

This example used to test GPIO interrupt function.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file gpio_int.c.

Generated on Mon Nov 28 2011 11:15:10 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/GPIO_Interrupt/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/GPIO_Interrupt/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _GPIO
#define | CHECK_PARAM(expr)

Define Documentation

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/LedBlinky/LedBlinky.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/LedBlinky/LedBlinky.c File Reference

This example describes how to use GPIO interrupt to drive LEDs. More...

#include "lpc17xx_gpio.h"
#include "lpc17xx_libcfg.h"

Go to the source code of this file.

Defines

#define | MCB_LPC_1768

Functions

void | SysTick_Handler (void)
SysTick handler sub-routine (1ms)
void | Delay (unsigned long tick)
Delay function.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

volatile unsigned long | SysTickCnt

Detailed Description

This example describes how to use GPIO interrupt to drive LEDs.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file LedBlinky.c.

Generated on Mon Nov 28 2011 11:15:10 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/LedBlinky/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/LedBlinky/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _GPIO
#define | CHECK_PARAM(expr)

Define Documentation

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/master/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/master/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2C
#define | _I2C0
#define | _I2C1
#define | _I2C2
#define | _GPDMA
#define | _ADC
#define | CHECK_PARAM(expr)

Define Documentation

#define _ADC

Definition at line 90 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 83 of file lpc17xx_libcfg.h.

#define _I2C

Definition at line 70 of file lpc17xx_libcfg.h.

#define _I2C0

Definition at line 71 of file lpc17xx_libcfg.h.

#define _I2C1

Definition at line 72 of file lpc17xx_libcfg.h.

#define _I2C2

Definition at line 73 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:05 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/master/master.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/master/master.c File Reference

This example describes how to configure I2C as master device. More...

#include "lpc17xx_i2c.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | USEDI2CDEV_M 0
#define | I2CDEV_S_ADDR (0x90>>1)
#define | BUFFER_SIZE 0x10
#define | I2CDEV_M LPC_I2C0

Functions

void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (uint8_t type)
Initialize buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | Master_Buf [BUFFER_SIZE]
uint8_t | master_test [2]

Detailed Description

This example describes how to configure I2C as master device.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file master.c.

Generated on Mon Nov 28 2011 11:15:10 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Master_Slave_Interrupt/i2c_master_slave_int_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Master_Slave_Interrupt/i2c_master_slave_int_test.c File Reference

This example describes how to uses two I2C peripheral on LPC1768 to communicate together. One set as master and the other set as slave. More...

#include "lpc17xx_i2c.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | USEDI2CDEV_M 2
#define | USEDI2CDEV_S 0
#define | I2CDEV_S_OWN_ADDR (0x90>>1)
#define | BUFFER_SIZE 0x10
#define | I2CDEV_M LPC_I2C2
#define | I2CDEV_S LPC_I2C0

Functions

void | I2C0_IRQHandler (void)
Main I2C0 interrupt handler sub-routine.
void | I2C2_IRQHandler (void)
Main I2C2 interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Error_Loop_M (uint8_t ErrorCode)
A subroutine that will be called if there's any error on I2C operation (master)
void | Error_Loop_S (uint8_t ErrorCode)
A subroutine that will be called if there's any error on I2C operation (slave)
void | Buffer_Init (uint8_t type)
Initialize buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
__IO FlagStatus | complete_M
uint8_t | Master_Buf [BUFFER_SIZE]
__IO FlagStatus | complete_S
uint8_t | Slave_Buf [BUFFER_SIZE]
uint8_t | master_test [2]
uint8_t | slave_test [2]

Detailed Description

This example describes how to uses two I2C peripheral on LPC1768 to communicate together. One set as master and the other set as slave.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file i2c_master_slave_int_test.c.

Generated on Mon Nov 28 2011 11:15:10 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Master_Slave_Interrupt/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Master_Slave_Interrupt/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2C
#define | _I2C0
#define | _I2C1
#define | _I2C2
#define | _GPDMA
#define | _ADC
#define | CHECK_PARAM(expr)

Define Documentation

#define _ADC

Definition at line 90 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 83 of file lpc17xx_libcfg.h.

#define _I2C

Definition at line 70 of file lpc17xx_libcfg.h.

#define _I2C0

Definition at line 71 of file lpc17xx_libcfg.h.

#define _I2C1

Definition at line 72 of file lpc17xx_libcfg.h.

#define _I2C2

Definition at line 73 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Monitor/i2c_monitor.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Monitor/i2c_monitor.c File Reference

This example describes how to uses I2C peripheral on LPC1768 in monitor mode. More...

#include "lpc17xx_i2c.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | I2CDEV LPC_I2C0
#define | BUFFER_SIZE 0x80

Functions

void | I2C0_IRQHandler (void)
Main I2C0 interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | buffer [BUFFER_SIZE]
BOOL_8 | done = FALSE
uint32_t | count = 0

Detailed Description

This example describes how to uses I2C peripheral on LPC1768 in monitor mode.

Version:
1.0
Date:
16. July. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file i2c_monitor.c.

Generated on Mon Nov 28 2011 11:15:10 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Monitor/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Monitor/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2C
#define | _I2C0
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _I2C

Definition at line 70 of file lpc17xx_libcfg.h.

#define _I2C0

Definition at line 71 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/pca8581_polling/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/pca8581_polling/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2C
#define | _I2C0
#define | _I2C1
#define | _I2C2
#define | _GPDMA
#define | _ADC
#define | CHECK_PARAM(expr)

Define Documentation

#define _ADC

Definition at line 90 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 83 of file lpc17xx_libcfg.h.

#define _I2C

Definition at line 70 of file lpc17xx_libcfg.h.

#define _I2C0

Definition at line 71 of file lpc17xx_libcfg.h.

#define _I2C1

Definition at line 72 of file lpc17xx_libcfg.h.

#define _I2C2

Definition at line 73 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/pca8581_polling/pca8581_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/pca8581_polling/pca8581_test.c File Reference

An example of I2C using polling mode to test the I2C driver. Using EEPROM PCA8581 to transfer a number of data byte. More...

#include "lpc17xx_i2c.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | USEDI2CDEV 0
#define | PCA8581_SLVADDR (0xA0>>1)
#define | I2CDEV LPC_I2C0

Functions

int32_t | PCA8581_Write (void)
Write a number of data byte into EEPROM PCA8581.
int32_t | PCA8581_Read (void)
Read a number of data byte from EEPROM PCA8581.
void | print_menu (void)
Print Welcome menu.
void | Error_Loop (uint32_t ErrorCode)
A subroutine that will be called if there's any error on I2C operation.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | pca8581_wrdat []
uint8_t | pca8581_rddat []
I2C_M_SETUP_Type txsetup
I2C_M_SETUP_Type rxsetup

Detailed Description

An example of I2C using polling mode to test the I2C driver. Using EEPROM PCA8581 to transfer a number of data byte.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file pca8581_test.c.

Generated on Mon Nov 28 2011 11:15:10 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_int/i2c_interrupt_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_int/i2c_interrupt_test.c File Reference

An example of I2C using interrupt mode to test the I2C driver. Using I2C at mode I2C master/8bit on LPC1766 to communicate with SC16IS750/760 Demo Board. More...

#include "lpc17xx_i2c.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | USEDI2CDEV 0
#define | IODIR 0x0A
#define | IOSTATE 0x0B
#define | IOCON 0x0E
#define | SLVADDR (0x90>>1)
#define | REGS_ADDR(n) (n<<3)
#define | I2CDEV LPC_I2C0

Functions

void | I2C0_IRQHandler (void)
Main I2C0 interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Error_Loop (uint8_t ErrorCode)
A subroutine that will be called if there's any error on I2C operation.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | iocon_cfg [2] = {REGS_ADDR(IOCON), 0x00}
uint8_t | iodir_cfg [2] = {REGS_ADDR(IODIR), 0xFF}
uint8_t | iostate_cfg_0 [2] = {REGS_ADDR(IOSTATE), 0x00}
uint8_t | iostate_cfg_1 [2] = {REGS_ADDR(IOSTATE), 0xFF}
__IO FlagStatus | complete

Detailed Description

An example of I2C using interrupt mode to test the I2C driver. Using I2C at mode I2C master/8bit on LPC1766 to communicate with SC16IS750/760 Demo Board.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file i2c_interrupt_test.c.

Generated on Mon Nov 28 2011 11:15:10 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_int/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_int/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2C
#define | _I2C0
#define | _I2C1
#define | _I2C2
#define | _GPDMA
#define | _ADC
#define | CHECK_PARAM(expr)

Define Documentation

#define _ADC

Definition at line 91 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define _I2C

Definition at line 71 of file lpc17xx_libcfg.h.

#define _I2C0

Definition at line 72 of file lpc17xx_libcfg.h.

#define _I2C1

Definition at line 73 of file lpc17xx_libcfg.h.

#define _I2C2

Definition at line 74 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_polling/i2c_polling_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_polling/i2c_polling_test.c File Reference

An example of I2C using polling mode to test the I2C driver. Using I2C at mode I2C master/8bit on LPC1766 to communicate with SC16IS750/760 Demo Board. More...

#include "lpc17xx_i2c.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | USEDI2CDEV 0
#define | IODIR 0x0A
#define | IOSTATE 0x0B
#define | IOCON 0x0E
#define | SLVADDR (0x90>>1)
#define | REGS_ADDR(n) (n<<3)
#define | I2CDEV LPC_I2C0

Functions

void | print_menu (void)
Print Welcome menu.
void | Error_Loop (uint32_t ErrorCode)
A subroutine that will be called if there's any error on I2C operation.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | iocon_cfg [2] = {REGS_ADDR(IOCON), 0x00}
uint8_t | iodir_cfg [2] = {REGS_ADDR(IODIR), 0xFF}
uint8_t | iostate_cfg_0 [2] = {REGS_ADDR(IOSTATE), 0x00}
uint8_t | iostate_cfg_1 [2] = {REGS_ADDR(IOSTATE), 0xFF}

Detailed Description

An example of I2C using polling mode to test the I2C driver. Using I2C at mode I2C master/8bit on LPC1766 to communicate with SC16IS750/760 Demo Board.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file i2c_polling_test.c.

Generated on Mon Nov 28 2011 11:15:10 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_polling/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_polling/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2C
#define | _I2C0
#define | _I2C1
#define | _I2C2
#define | _GPDMA
#define | _ADC
#define | CHECK_PARAM(expr)

Define Documentation

#define _ADC

Definition at line 90 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 83 of file lpc17xx_libcfg.h.

#define _I2C

Definition at line 70 of file lpc17xx_libcfg.h.

#define _I2C0

Definition at line 71 of file lpc17xx_libcfg.h.

#define _I2C1

Definition at line 72 of file lpc17xx_libcfg.h.

#define _I2C2

Definition at line 73 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/slave/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/slave/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2C
#define | _I2C0
#define | _I2C1
#define | _I2C2
#define | _GPDMA
#define | _ADC
#define | CHECK_PARAM(expr)

Define Documentation

#define _ADC

Definition at line 89 of file lpc17xx_libcfg.h.

#define _DBGFWK

Definition at line 42 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 82 of file lpc17xx_libcfg.h.

#define _I2C

Definition at line 69 of file lpc17xx_libcfg.h.

#define _I2C0

Definition at line 70 of file lpc17xx_libcfg.h.

#define _I2C1

Definition at line 71 of file lpc17xx_libcfg.h.

#define _I2C2

Definition at line 72 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 51 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 52 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 135 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/slave/slave.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/I2C/slave/slave.c File Reference

This example describes how to use I2C peripheral as a slave. More...

#include "lpc17xx_i2c.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | USEDI2CDEV_S 0
#define | I2CDEV_S_OWN_ADDR (0x90>>1)
#define | BUFFER_SIZE 0x10
#define | I2CDEV_S LPC_I2C0

Functions

void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (uint8_t type)
Initialize buffer.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | Slave_Buf [BUFFER_SIZE]
uint8_t | slave_test [2]

Detailed Description

This example describes how to use I2C peripheral as a slave.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file slave.c.

Generated on Mon Nov 28 2011 11:15:10 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_DMA/i2s_dma_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_DMA/i2s_dma_test.c File Reference

This example describes how to use DMA mode to test the I2S driver. More...

#include "lpc17xx_i2s.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_gpdma.h"
#include "debug_frmwrk.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Defines

#define | BUFFER_SIZE 0x0A
#define | DMA_SIZE 0x100UL
#define | DMA_SRC LPC_AHBRAM1_BASE
#define | DMA_DST (DMA_SRC+DMA_SIZE)

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | Buffer_Init (void)
Initialize buffer.
Bool | Buffer_Verify (void)
Verify buffer.
void | print_menu (void)
Print menu screen.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err
__IO uint32_t | Channel1_TC
__IO uint32_t | Channel1_Err
volatile uint32_t * | I2STXBuffer = (uint32_t*)(DMA_SRC)
volatile uint32_t * | I2SRXBuffer = (uint32_t*)(DMA_DST)

Detailed Description

This example describes how to use DMA mode to test the I2S driver.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file i2s_dma_test.c.

Generated on Mon Nov 28 2011 11:15:10 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_DMA/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_DMA/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _GPDMA
#define | _I2S
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define _I2S

Definition at line 102 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_IRQ/i2s_irq_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_IRQ/i2s_irq_test.c File Reference

This example describes how to use I2S transfer in interrupt mode. More...

#include "lpc17xx_i2s.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | BUFFER_SIZE 0x400
#define | I2S_BUFFER_SRC LPC_AHBRAM1_BASE
#define | I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)
#define | RXFIFO_EMPTY 0
#define | TXFIFO_FULL 8

Functions

void | I2S_IRQHandler ()
I2S IRQ Handler.
void | Buffer_Init (void)
Initialize buffer.
Bool | Buffer_Verify (void)
Verify buffer.
void | print_menu (void)
print menu
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
volatile uint8_t | I2STXDone = 0
volatile uint8_t | I2SRXDone = 0
volatile uint32_t * | I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)
volatile uint32_t * | I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)
volatile uint32_t | I2SReadLength = 0
volatile uint32_t | I2SWriteLength = 0
uint8_t | tx_depth_irq = 0
uint8_t | rx_depth_irq = 0
uint8_t | dummy = 0

Detailed Description

This example describes how to use I2S transfer in interrupt mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file i2s_irq_test.c.

Generated on Mon Nov 28 2011 11:15:10 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_IRQ/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_IRQ/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2S
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _I2S

Definition at line 102 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_MCLK/i2s_mclk.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_MCLK/i2s_mclk.c File Reference

This example describes how to test I2S master clock. More...

#include "lpc17xx_i2s.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | BUFFER_SIZE 0x400
#define | I2S_BUFFER_SRC LPC_AHBRAM1_BASE
#define | I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)
#define | RXFIFO_EMPTY 0
#define | TXFIFO_FULL 8

Functions

void | I2S_IRQHandler ()
I2S IRQ Handler.
void | Buffer_Init (void)
Initialize buffer.
Bool | Buffer_Verify (void)
Verify buffer.
void | print_menu (void)
print menu
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
volatile uint8_t | I2STXDone = 0
volatile uint8_t | I2SRXDone = 0
volatile uint32_t * | I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)
volatile uint32_t * | I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)
volatile uint32_t | I2SReadLength = 0
volatile uint32_t | I2SWriteLength = 0
uint8_t | tx_depth_irq = 0
uint8_t | rx_depth_irq = 0
uint8_t | dummy = 0

Detailed Description

This example describes how to test I2S master clock.

Version:
1.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file i2s_mclk.c.

Generated on Mon Nov 28 2011 11:15:10 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_MCLK/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_MCLK/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2S
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _I2S

Definition at line 102 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_test_4_wire/i2s_test_4_wire.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_test_4_wire/i2s_test_4_wire.c File Reference

This example describes how to use I2S 4-wire mode. More...

#include "lpc17xx_i2s.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | BUFFER_SIZE 0x400
************************** PRIVATE DEFINITIONS *************************/
#define | I2S_BUFFER_SRC LPC_AHBRAM1_BASE
#define | I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)

Functions

void | Buffer_Init (void)
Initialize buffer.
Bool | Buffer_Verify (void)
Verify buffer.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main I2S program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
volatile uint8_t | I2STXDone = 0
volatile uint8_t | I2SRXDone = 0
volatile uint32_t * | I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)
volatile uint32_t * | I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)
volatile uint32_t | I2SReadLength = 0
volatile uint32_t | I2SWriteLength = 0

Detailed Description

This example describes how to use I2S 4-wire mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file i2s_test_4_wire.c.

Generated on Mon Nov 28 2011 11:15:10 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_test_4_wire/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_test_4_wire/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2S
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _I2S

Definition at line 102 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_two_kit/i2s_two_kit.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_two_kit/i2s_two_kit.c File Reference

This example describes how to use I2S transfer data between two board. More...

#include "lpc17xx_i2s.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | I2S_TRANSMIT 0
#define | I2S_RECEIVE !I2S_TRANSMIT

Functions

void | I2S_IRQHandler ()
I2S IRQ Handler.
void | print_menu ()
print_menu
int | c_entry (void)
c_entry: Main I2S program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
uint8_t | tx_depth_irq = 0
uint8_t | rx_depth_irq = 0
uint32_t | data

Detailed Description

This example describes how to use I2S transfer data between two board.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file i2s_two_kit.c.

Generated on Mon Nov 28 2011 11:15:10 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_two_kit/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_two_kit/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2S
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _I2S

Definition at line 102 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/Polling/i2s_polling.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/Polling/i2s_polling.c File Reference

This example describes how to use I2S transfer in polling mode. More...

#include "lpc17xx_i2s.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | BUFFER_SIZE 0x400
#define | I2S_BUFFER_SRC LPC_AHBRAM1_BASE
#define | I2S_BUFFER_DST (I2S_BUFFER_SRC+0x1000UL)

Functions

void | Buffer_Init (void)
Initialize buffer.
Bool | Buffer_Verify (void)
Verify buffer.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main I2S program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
volatile uint8_t | I2STXDone = 0
volatile uint8_t | I2SRXDone = 0
volatile uint32_t * | I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC)
volatile uint32_t * | I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST)
volatile uint32_t | I2SReadLength = 0
volatile uint32_t | I2SWriteLength = 0

Detailed Description

This example describes how to use I2S transfer in polling mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file i2s_polling.c.

Generated on Mon Nov 28 2011 11:15:10 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/Polling/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/I2S/Polling/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _I2S
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _I2S

Definition at line 102 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.c File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.c File Reference
#include "drv_glcd.h"
#include "lpc_types.h"
#include "stdarg.h"
#include <assert.h>
#include "glcd_ll.h"

Go to the source code of this file.

Defines

#define | GLCD_DLY_10US 80
#define | GLCD_RESET_DLY 50
#define | GLCD_BOOSTER_ON_DLY 1200

Functions

GLCD_Status_t | GLCD_SendCmd (GLCD_Cmd_t Cmd, unsigned char *pData, uint32_t Size)
GLCD_Status_t | GLCD_PowerUpInit (unsigned char *pInitData)
void | GLCD_SetFont (pFontType_t pFont, LdcPixel_t Color, LdcPixel_t BackgndColor)
void | GLCD_SetWindow (uint32_t X_Left, uint32_t Y_Up, uint32_t X_Right, uint32_t Y_Down)
void | GLCD_TextSetPos (uint32_t X, uint32_t Y)
void | GLCD_TextSetTabSize (uint32_t Size)
int | GLCD_putchar (int c)
void | GLCD_print (const char *fmt)

Define Documentation

#define GLCD_BOOSTER_ON_DLY 1200

Definition at line 25 of file drv_glcd.c.

#define GLCD_DLY_10US 80

Definition at line 23 of file drv_glcd.c.

#define GLCD_RESET_DLY 50

Definition at line 24 of file drv_glcd.c.

Function Documentation

GLCD_Status_t GLCD_PowerUpInit ( unsigned char * pInitData )

Definition at line 527 of file drv_glcd.c.

void GLCD_print ( const char * fmt )

Definition at line 919 of file drv_glcd.c.

int GLCD_putchar ( int c )

Definition at line 777 of file drv_glcd.c.

GLCD_Status_t GLCD_SendCmd | ( | GLCD_Cmd_t | Cmd,
 |  | unsigned char * | pData,
 |  | uint32_t | Size
 | ) |  |

Definition at line 347 of file drv_glcd.c.

void GLCD_SetFont | ( | pFontType_t | pFont,
 |  | LdcPixel_t | Color,
 |  | LdcPixel_t | BackgndColor
 | ) |  |

Definition at line 661 of file drv_glcd.c.

void GLCD_SetWindow | ( | uint32_t | X_Left,
 |  | uint32_t | Y_Up,
 |  | uint32_t | X_Right,
 |  | uint32_t | Y_Down
 | ) |  |

Definition at line 678 of file drv_glcd.c.

void GLCD_TextSetPos | ( | uint32_t | X,
 |  | uint32_t | Y
 | ) |  |

Definition at line 701 of file drv_glcd.c.

void GLCD_TextSetTabSize ( uint32_t Size )

Definition at line 716 of file drv_glcd.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h File Reference

Data Structures | Defines | Typedefs | Enumerations | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h File Reference
#include "drv_glcd_cnfg.h"
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | _GLCD_CmdCtrl_t
struct | _ASCSET_Data_t
struct | _DATCTR_Data_t
struct | _MADCTR_Data_t
struct | _COLMOD_Data_t
struct | _FontType_t
struct | _Bmp_t

Defines

#define | DEF_X_LEFT 0
#define | DEF_Y_UP 0
#define | DEF_X_RIGHT GLCD_HORIZONTAL_SIZE
#define | DEF_Y_DOWN GLCD_VERTICAL_SIZE
#define | DEF_FONT_COLOUR 0x000000
#define | DEF_BACKGND_COLOUR 0x00FF0
#define | TEXT_DEF_TAB_SIZE 4
#define | MAX_GLCD_STR_SIZE 256
#define | TEXT_BEL1_FUNC()
#define | LCD_SET_WINDOW(xl, xr, yu, yd)
#define | LCD_WRITE_PIXEL(c) GLCD_SendCmd(RAMWR,(unsigned char*)&c,2)
#define | LCD_FLUSH_PIXELS() GLCD_SendCmd(NOP,NULL,0)
#define | GLCD_MANF_ID 0x45
#define | GLCD_MOD_ID 0x03
#define | WAITED_PIXEL 0x80000000
#define | PIXEL_CONV(Pixel, Order) (!Order)?(((Pixel >> 4) & 0xFF) | ((Pixel << 12) & 0xF000)):(((Pixel << 16) & 0xFF0000) | ((Pixel) & 0xF00))
#define | PCF8833_ST_BOOSTER_ON (1UL << 7)
#define | PCF8833_ST_Y_ADDR_ODR (1UL << 6)
#define | PCF8833_ST_X_ADDR_ODR (1UL << 5)
#define | PCF8833_ST_ADDR_MODE (1UL << 4)
#define | PCF8833_ST_LINE_ADDR_ORD (1UL << 3)
#define | PCF8833_ST_RGB_ORD (1UL << 2)
#define | PCF8833_ST_PIXEL_FORM (7UL << 12)
#define | PCF8833_ST_IDLE_MODE (1UL << 11)
#define | PCF8833_ST_PARTIAL_MODE (1UL << 10)
#define | PCF8833_ST_SLEEP_MODE (1UL << 9)
#define | PCF8833_ST_NORM_MODE (1UL << 8)
#define | PCF8833_ST_V_SCROLL_MODE (1UL << 23)
#define | PCF8833_ST_INV_MODE (1UL << 21)
#define | PCF8833_ST_ALL_PIXELS_ON (1UL << 20)
#define | PCF8833_ST_ALL_PIXELS_OFF (1UL << 19)
#define | PCF8833_ST_DISPLAY_MODE (1UL << 18)
#define | PCF8833_ST_TEARING_MODE (1UL << 17)
#define | GLCD_DATA 0x100
#define | GLCD_INV_CMD ((uint32_t)(-1))
#define | GLCD_MAX_COTRAST 63
#define | GLCD_MIN_COTRAST -64

Typedefs

typedef enum _GLCD_ISS_t | GLCD_ISS_t
typedef enum _GLCD_Status_t | GLCD_Status_t
typedef enum _GLCD_Cmd_t | GLCD_Cmd_t
typedef enum _GLCD_CmdDir_t | GLCD_CmdDir_t
typedef struct _GLCD_CmdCtrl_t | GLCD_CmdCtrl_t
typedef struct _GLCD_CmdCtrl_t * | pGLCD_CmdCtrl_t
typedef struct _ASCSET_Data_t | ASCSET_Data_t
typedef struct _ASCSET_Data_t * | pASCSET_Data_t
typedef struct _DATCTR_Data_t | DATCTR_Data_t
typedef struct _DATCTR_Data_t * | pDATCTR_Data_t
typedef struct _MADCTR_Data_t | MADCTR_Data_t
typedef struct _MADCTR_Data_t * | pMADCTR_Data_t
typedef struct _COLMOD_Data_t | COLMOD_Data_t
typedef struct _COLMOD_Data_t * | pCOLMOD_Data_t
typedef uint32_t | LdcPixel_t
typedef uint32_t * | pLdcPixel_t
typedef struct _FontType_t | FontType_t
typedef struct _FontType_t * | pFontType_t
typedef struct _Bmp_t | Bmp_t
typedef struct _Bmp_t * | pBmp_t

Enumerations

enum | _GLCD_ISS_t { GLCD_ISS_0 = 0, GLCD_ISS_1 }
enum | _GLCD_Status_t { GLCD_OK = 0, GLCD_ID_ERROR, GLCD_UNSUPPORTED, GLCD_ERROR }
enum _GLCD_Cmd_t {
NOP, SLPIN, SLPOUT, PTLOUT,
INVOFF, INVON, DISPOFF, DISPON,
CASET, RASET, RAMWR, RGBSET,
VSCSAD, IDMOFF, IDMON, RDID1,
RDID2, RDID3, FRMSEL, FRM8SEL,
TMPRNG, TMPHIS, TMPREAD, EPWRIN,
EPWROUT, RDEV, RDRR, PTIN,
SCRLAR, DATCTR, SETCON, OSCON,
OSCOFF, RMWIN, RMWOUT, VOLUP,
VOLDOWN, ASCSET, DISCTR, PWRCTR,
VOLCTR, CLKINT, CLKEXT, RDDST,
SWRESET, RDDID, PTLAR, PTLON,
MADCTR, COLMOD, APOFF, APON,
BSTROFF, BSTRON, GLCD_CMD_NUMB
}
enum | _GLCD_CmdDir_t { GLCD_WRITE = 0, GLCD_READ }

Functions

void | Dly100us (void *arg)
Delay 100us.
GLCD_Status_t | GLCD_SendCmd (GLCD_Cmd_t Cmd, unsigned char *pData, uint32_t Size)
GLCD_Status_t | GLCD_PowerUpInit (unsigned char *pInitData)
void | GLCD_SetFont (pFontType_t pFont, LdcPixel_t Color, LdcPixel_t BackgndColor)
void | GLCD_SetWindow (uint32_t X_Left, uint32_t Y_Up, uint32_t X_Right, uint32_t Y_Down)
void | GLCD_TextSetPos (uint32_t X, uint32_t Y)
void | GLCD_TextSetTabSize (uint32_t Size)
int | GLCD_putchar (int c)
void | GLCD_print (const char *fmt)

Define Documentation

#define DEF_BACKGND_COLOUR 0x00FF0

Definition at line 27 of file drv_glcd.h.

#define DEF_FONT_COLOUR 0x000000

Definition at line 26 of file drv_glcd.h.

#define DEF_X_LEFT 0

Definition at line 22 of file drv_glcd.h.

#define DEF_X_RIGHT GLCD_HORIZONTAL_SIZE

Definition at line 24 of file drv_glcd.h.

#define DEF_Y_DOWN GLCD_VERTICAL_SIZE

Definition at line 25 of file drv_glcd.h.

#define DEF_Y_UP 0

Definition at line 23 of file drv_glcd.h.

#define GLCD_DATA 0x100

Definition at line 112 of file drv_glcd.h.

#define GLCD_INV_CMD ((uint32_t)(-1))

Definition at line 116 of file drv_glcd.h.

#define GLCD_MANF_ID 0x45

Definition at line 50 of file drv_glcd.h.

#define GLCD_MAX_COTRAST 63

Definition at line 118 of file drv_glcd.h.

#define GLCD_MIN_COTRAST -64

Definition at line 119 of file drv_glcd.h.

#define GLCD_MOD_ID 0x03

Definition at line 51 of file drv_glcd.h.

#define LCD_FLUSH_PIXELS ( ) GLCD_SendCmd(NOP,NULL,0)

Definition at line 48 of file drv_glcd.h.

#define LCD_SET_WINDOW | ( | xl,
 |  | xr,
 |  | yu,
 |  | yd
 | ) |
Value:
{\
uint32_t Temp;\
  Temp = xl | (xr<<8);\
  GLCD_SendCmd(CASET,(unsigned char*)&Temp,0);\
  Temp = (yu+2) | ((yd+2)<<8);\
  GLCD_SendCmd(RASET,(unsigned char*)&Temp,0);\
}

Definition at line 35 of file drv_glcd.h.

#define LCD_WRITE_PIXEL ( c ) GLCD_SendCmd(RAMWR,(unsigned char*)&c,2)

Definition at line 45 of file drv_glcd.h.

#define MAX_GLCD_STR_SIZE 256

Definition at line 30 of file drv_glcd.h.

#define PCF8833_ST_ADDR_MODE (1UL << 4)

Definition at line 60 of file drv_glcd.h.

#define PCF8833_ST_ALL_PIXELS_OFF (1UL << 19)

Definition at line 71 of file drv_glcd.h.

#define PCF8833_ST_ALL_PIXELS_ON (1UL << 20)

Definition at line 70 of file drv_glcd.h.

#define PCF8833_ST_BOOSTER_ON (1UL << 7)

Definition at line 57 of file drv_glcd.h.

#define PCF8833_ST_DISPLAY_MODE (1UL << 18)

Definition at line 72 of file drv_glcd.h.

#define PCF8833_ST_IDLE_MODE (1UL << 11)

Definition at line 64 of file drv_glcd.h.

#define PCF8833_ST_INV_MODE (1UL << 21)

Definition at line 69 of file drv_glcd.h.

#define PCF8833_ST_LINE_ADDR_ORD (1UL << 3)

Definition at line 61 of file drv_glcd.h.

#define PCF8833_ST_NORM_MODE (1UL << 8)

Definition at line 67 of file drv_glcd.h.

#define PCF8833_ST_PARTIAL_MODE (1UL << 10)

Definition at line 65 of file drv_glcd.h.

#define PCF8833_ST_PIXEL_FORM (7UL << 12)

Definition at line 63 of file drv_glcd.h.

#define PCF8833_ST_RGB_ORD (1UL << 2)

Definition at line 62 of file drv_glcd.h.

#define PCF8833_ST_SLEEP_MODE (1UL << 9)

Definition at line 66 of file drv_glcd.h.

#define PCF8833_ST_TEARING_MODE (1UL << 17)

Definition at line 73 of file drv_glcd.h.

#define PCF8833_ST_V_SCROLL_MODE (1UL << 23)

Definition at line 68 of file drv_glcd.h.

#define PCF8833_ST_X_ADDR_ODR (1UL << 5)

Definition at line 59 of file drv_glcd.h.

#define PCF8833_ST_Y_ADDR_ODR (1UL << 6)

Definition at line 58 of file drv_glcd.h.

#define PIXEL_CONV | ( | Pixel,
 |  | Order
 | ) | (!Order)?(((Pixel >> 4) & 0xFF) | ((Pixel << 12) & 0xF000)):(((Pixel << 16) & 0xFF0000) | ((Pixel) & 0xF00))

Definition at line 55 of file drv_glcd.h.

#define TEXT_BEL1_FUNC ( )

Definition at line 32 of file drv_glcd.h.

#define TEXT_DEF_TAB_SIZE 4

Definition at line 28 of file drv_glcd.h.

#define WAITED_PIXEL 0x80000000

Definition at line 53 of file drv_glcd.h.

Typedef Documentation

typedef struct _ASCSET_Data_t ASCSET_Data_t
typedef struct _Bmp_t Bmp_t
typedef struct _COLMOD_Data_t COLMOD_Data_t
typedef struct _DATCTR_Data_t DATCTR_Data_t
typedef struct _FontType_t FontType_t
typedef enum _GLCD_Cmd_t GLCD_Cmd_t
typedef struct _GLCD_CmdCtrl_t GLCD_CmdCtrl_t
typedef enum _GLCD_CmdDir_t GLCD_CmdDir_t
typedef enum _GLCD_ISS_t GLCD_ISS_t
typedef enum _GLCD_Status_t GLCD_Status_t
typedef uint32_t LdcPixel_t

Definition at line 203 of file drv_glcd.h.

typedef struct _MADCTR_Data_t MADCTR_Data_t
typedef struct _ASCSET_Data_t * pASCSET_Data_t
typedef struct _Bmp_t * pBmp_t
typedef struct _COLMOD_Data_t * pCOLMOD_Data_t
typedef struct _DATCTR_Data_t * pDATCTR_Data_t
typedef struct _FontType_t * pFontType_t
typedef struct _GLCD_CmdCtrl_t * pGLCD_CmdCtrl_t
typedef uint32_t * pLdcPixel_t

Definition at line 203 of file drv_glcd.h.

typedef struct _MADCTR_Data_t * pMADCTR_Data_t

Enumeration Type Documentation

enum _GLCD_Cmd_t
Enumerator:
NOP
SLPIN
SLPOUT
PTLOUT
INVOFF
INVON
DISPOFF
DISPON
CASET
RASET
RAMWR
RGBSET
VSCSAD
IDMOFF
IDMON
RDID1
RDID2
RDID3
FRMSEL
FRM8SEL
TMPRNG
TMPHIS
TMPREAD
EPWRIN
EPWROUT
RDEV
RDRR
PTIN
SCRLAR
DATCTR
SETCON
OSCON
OSCOFF
RMWIN
RMWOUT
VOLUP
VOLDOWN
ASCSET
DISCTR
PWRCTR
VOLCTR
CLKINT
CLKEXT
RDDST
SWRESET
RDDID
PTLAR
PTLON
MADCTR
COLMOD
APOFF
APON
BSTROFF
BSTRON
GLCD_CMD_NUMB

Definition at line 86 of file drv_glcd.h.

enum _GLCD_CmdDir_t
Enumerator:
GLCD_WRITE
GLCD_READ

Definition at line 107 of file drv_glcd.h.

enum _GLCD_ISS_t
Enumerator:
GLCD_ISS_0
GLCD_ISS_1

Definition at line 76 of file drv_glcd.h.

enum _GLCD_Status_t
Enumerator:
GLCD_OK
GLCD_ID_ERROR
GLCD_UNSUPPORTED
GLCD_ERROR

Definition at line 81 of file drv_glcd.h.

Function Documentation

GLCD_Status_t GLCD_PowerUpInit ( unsigned char * pInitData )

Definition at line 527 of file drv_glcd.c.

void GLCD_print ( const char * fmt )

Definition at line 919 of file drv_glcd.c.

int GLCD_putchar ( int c )

Definition at line 777 of file drv_glcd.c.

GLCD_Status_t GLCD_SendCmd | ( | GLCD_Cmd_t | Cmd,
 |  | unsigned char * | pData,
 |  | uint32_t | Size
 | ) |  |

Definition at line 347 of file drv_glcd.c.

void GLCD_SetFont | ( | pFontType_t | pFont,
 |  | LdcPixel_t | Color,
 |  | LdcPixel_t | BackgndColor
 | ) |  |

Definition at line 661 of file drv_glcd.c.

void GLCD_SetWindow | ( | uint32_t | X_Left,
 |  | uint32_t | Y_Up,
 |  | uint32_t | X_Right,
 |  | uint32_t | Y_Down
 | ) |  |

Definition at line 678 of file drv_glcd.c.

void GLCD_TextSetPos | ( | uint32_t | X,
 |  | uint32_t | Y
 | ) |  |

Definition at line 701 of file drv_glcd.c.

void GLCD_TextSetTabSize ( uint32_t Size )

Definition at line 716 of file drv_glcd.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd_cnfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd_cnfg.h File Reference

Go to the source code of this file.

Defines

#define | GLCD_DEF_CLOCK (1000000UL)
#define | GLCD_DEF_WIDTH 9
#define | GLCD_HORIZONTAL_SIZE 132
#define | GLCD_VERTICAL_SIZE 132
#define | GLCD_DISPLAY_STATE 1
#define | GLCD_DEF_DPL_INV 1
#define | GLCD_DEF_DPL_8_COLOR 0
#define | GLCD_DEF_DPL_PARTIAL_MODE 0
#define | GLCD_DEF_DPL_MY 0
#define | GLCD_DEF_DPL_MX 1
#define | GLCD_DEF_DPL_V 0
#define | GLCD_DEF_DPL_ML 0
#define | GLCD_DEF_DPL_RGB_ORD 0

Define Documentation

#define GLCD_DEF_CLOCK (1000000UL)

Definition at line 22 of file drv_glcd_cnfg.h.

#define GLCD_DEF_DPL_8_COLOR 0

Definition at line 34 of file drv_glcd_cnfg.h.

#define GLCD_DEF_DPL_INV 1

Definition at line 32 of file drv_glcd_cnfg.h.

#define GLCD_DEF_DPL_ML 0

Definition at line 44 of file drv_glcd_cnfg.h.

#define GLCD_DEF_DPL_MX 1

Definition at line 40 of file drv_glcd_cnfg.h.

#define GLCD_DEF_DPL_MY 0

Definition at line 38 of file drv_glcd_cnfg.h.

#define GLCD_DEF_DPL_PARTIAL_MODE 0

Definition at line 36 of file drv_glcd_cnfg.h.

#define GLCD_DEF_DPL_RGB_ORD 0

Definition at line 46 of file drv_glcd_cnfg.h.

#define GLCD_DEF_DPL_V 0

Definition at line 42 of file drv_glcd_cnfg.h.

#define GLCD_DEF_WIDTH 9

Definition at line 24 of file drv_glcd_cnfg.h.

#define GLCD_DISPLAY_STATE 1

Definition at line 30 of file drv_glcd_cnfg.h.

#define GLCD_HORIZONTAL_SIZE 132

Definition at line 26 of file drv_glcd_cnfg.h.

#define GLCD_VERTICAL_SIZE 132

Definition at line 28 of file drv_glcd_cnfg.h.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/glcd_ll.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/glcd_ll.c File Reference
#include "glcd_ll.h"
#include "lpc_types.h"
#include "LPC17xx.h"
#include "lpc17xx_clkpwr.h"

Go to the source code of this file.

Functions

void | GLCD_SetReset (Bool State)
void | GLCD_Backlight (uint8_t Light)
void | GLCD_LLInit (void)
void | GLCD_SPI_ChipSelect (Bool Select)
Bool | GLCD_SPI_SetWordWidth (uint32_t Width)
uint32_t | GLCD_SPI_SetClockFreq (uint32_t Frequency)
void | GLCD_SPI_Init (uint32_t Clk, uint32_t Width)
uint32_t | GLCD_SPI_TranserByte (uint32_t Data)
void | GLCD_SPI_SendBlock (unsigned char *pData, uint32_t Size)
void | GLCD_SPI_ReceiveBlock (unsigned char *pData, uint32_t Size)

Function Documentation

void GLCD_Backlight ( uint8_t Light )

Definition at line 49 of file glcd_ll.c.

void GLCD_LLInit ( void )

Definition at line 63 of file glcd_ll.c.

void GLCD_SetReset ( Bool State )

Definition at line 29 of file glcd_ll.c.

void GLCD_SPI_ChipSelect ( Bool Select )

Definition at line 102 of file glcd_ll.c.

void GLCD_SPI_Init | ( | uint32_t | Clk,
 |  | uint32_t | Width
 | ) |  |

Definition at line 165 of file glcd_ll.c.

void GLCD_SPI_ReceiveBlock | ( | unsigned char * | pData,
 |  | uint32_t | Size
 | ) |  |

Definition at line 254 of file glcd_ll.c.

void GLCD_SPI_SendBlock | ( | unsigned char * | pData,
 |  | uint32_t | Size
 | ) |  |

Definition at line 225 of file glcd_ll.c.

uint32_t GLCD_SPI_SetClockFreq ( uint32_t Frequency )

Definition at line 142 of file glcd_ll.c.

Bool GLCD_SPI_SetWordWidth ( uint32_t Width )

Definition at line 122 of file glcd_ll.c.

uint32_t GLCD_SPI_TranserByte ( uint32_t Data )

Definition at line 208 of file glcd_ll.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/glcd_ll.h File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/glcd_ll.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | BACKLIGHT_OFF 0x40
#define | BACKLIGHT_ON 0x20
#define | SSP_FIFO_SIZE 8

Functions

void | GLCD_SetReset (Bool State)
void | GLCD_Backlight (uint8_t Light)
void | GLCD_LLInit (void)
void | GLCD_SPI_ChipSelect (Bool Select)
Bool | GLCD_SPI_SetWordWidth (uint32_t Width)
uint32_t | GLCD_SPI_SetClockFreq (uint32_t Frequency)
void | GLCD_SPI_Init (uint32_t Clk, uint32_t Width)
uint32_t | GLCD_SPI_TranserByte (uint32_t Data)
void | GLCD_SPI_SendBlock (unsigned char *pData, uint32_t Size)
void | GLCD_SPI_ReceiveBlock (unsigned char *pData, uint32_t Size)

Define Documentation

#define BACKLIGHT_OFF 0x40

Definition at line 22 of file glcd_ll.h.

#define BACKLIGHT_ON 0x20

Definition at line 23 of file glcd_ll.h.

#define SSP_FIFO_SIZE 8

Definition at line 24 of file glcd_ll.h.

Function Documentation

void GLCD_Backlight ( uint8_t Light )

Definition at line 49 of file glcd_ll.c.

void GLCD_LLInit ( void )

Definition at line 63 of file glcd_ll.c.

void GLCD_SetReset ( Bool State )

Definition at line 29 of file glcd_ll.c.

void GLCD_SPI_ChipSelect ( Bool Select )

Definition at line 102 of file glcd_ll.c.

void GLCD_SPI_Init | ( | uint32_t | Clk,
 |  | uint32_t | Width
 | ) |  |

Definition at line 165 of file glcd_ll.c.

void GLCD_SPI_ReceiveBlock | ( | unsigned char * | pData,
 |  | uint32_t | Size
 | ) |  |

Definition at line 254 of file glcd_ll.c.

void GLCD_SPI_SendBlock | ( | unsigned char * | pData,
 |  | uint32_t | Size
 | ) |  |

Definition at line 225 of file glcd_ll.c.

uint32_t GLCD_SPI_SetClockFreq ( uint32_t Frequency )

Definition at line 142 of file glcd_ll.c.

Bool GLCD_SPI_SetWordWidth ( uint32_t Width )

Definition at line 122 of file glcd_ll.c.

uint32_t GLCD_SPI_TranserByte ( uint32_t Data )

Definition at line 208 of file glcd_ll.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/lcdtest.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/lcdtest.c File Reference
#include "drv_glcd.h"
#include "glcd_ll.h"
#include "lpc17xx_nvic.h"
#include "core_cm3.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg.h"
#include "NXP_logo.h"
#include "lpc17xx_timer.h"
#include "lpc17xx_adc.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | TIMER0_TICK_PER_SEC 20

Functions

void | TIMER0_IRQHandler (void)
TIMER0 IRQ Handler.
void | Dly100us (void *arg)
Delay 100us.
int | c_entry (void)
c_entry: Main LCD program body
int | main (void)

Variables

FontType_t Terminal_6_8_6
FontType_t Terminal_9_12_6
FontType_t Terminal_18_24_12
volatile Bool | CntrSel = FALSE
uint32_t | CriticalSecCntr
Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _GPIO
#define | _TIM
#define | _ADC
#define | CHECK_PARAM(expr)

Define Documentation

#define _ADC

Definition at line 86 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 42 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 72 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/NXP_logo.c File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/NXP_logo.c File Reference
#include "NXP_logo.h"

Go to the source code of this file.

Variables

const unsigned char NXP_LogoStream []
Bmp_t NXP_Logo

Variable Documentation

Bmp_t NXP_Logo
Initial value:
{
  132,
  132,
  12,
  2,
  NULL,
  (unsigned int *)&NXP_LogoStream
}

Definition at line 2189 of file NXP_logo.c.

const unsigned char NXP_LogoStream[]

Definition at line 7 of file NXP_logo.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/NXP_logo.h File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/NXP_logo.h File Reference
#include "drv_glcd.h"

Go to the source code of this file.

Variables

Bmp_t NXP_Logo

Variable Documentation

Bmp_t NXP_Logo

Definition at line 2189 of file NXP_logo.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/Terminal_9_12x6.c File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/Terminal_9_12x6.c File Reference
#include "drv_glcd.h"

Go to the source code of this file.

Variables

FontType_t Terminal_9_12_6
Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/Font_24x16.h File Reference

Defines | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/Font_24x16.h File Reference

Go to the source code of this file.

Defines

#define | CHAR_H 24
#define | CHAR_W 16

Variables

const uint16_t | Font_24x16 []

Define Documentation

#define CHAR_H 24

Definition at line 18 of file Font_24x16.h.

#define CHAR_W 16

Definition at line 19 of file Font_24x16.h.

Variable Documentation

const uint16_t Font_24x16[]

Definition at line 21 of file Font_24x16.h.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/GLCD.h File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/GLCD.h File Reference

Go to the source code of this file.

Defines

#define | Black 0x0000
#define | Navy 0x000F
#define | DarkGreen 0x03E0
#define | DarkCyan 0x03EF
#define | Maroon 0x7800
#define | Purple 0x780F
#define | Olive 0x7BE0
#define | LightGrey 0xC618
#define | DarkGrey 0x7BEF
#define | Blue 0x001F
#define | Green 0x07E0
#define | Cyan 0x07FF
#define | Red 0xF800
#define | Magenta 0xF81F
#define | Yellow 0xFFE0
#define | White 0xFFFF

Functions

void | GLCD_Init (void)
void | GLCD_WindowMax (void)
void | GLCD_PutPixel (unsigned int x, unsigned int y)
void | GLCD_SetTextColor (unsigned short color)
void | GLCD_SetBackColor (unsigned short color)
void | GLCD_Clear (unsigned short color)
void | GLCD_DrawChar (unsigned int x, unsigned int y, unsigned short *c)
void | GLCD_DisplayChar (unsigned int ln, unsigned int col, unsigned char c)
void | GLCD_DisplayString (unsigned int ln, unsigned int col, unsigned char *s)
void | GLCD_ClearLn (unsigned int ln)
void | GLCD_Bargraph (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned int val)
void | GLCD_Bitmap (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bitmap)
void | GLCD_Bmp (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bmp)

Define Documentation

#define Black 0x0000

Definition at line 25 of file GLCD.h.

#define Blue 0x001F

Definition at line 34 of file GLCD.h.

#define Cyan 0x07FF

Definition at line 36 of file GLCD.h.

#define DarkCyan 0x03EF

Definition at line 28 of file GLCD.h.

#define DarkGreen 0x03E0

Definition at line 27 of file GLCD.h.

#define DarkGrey 0x7BEF

Definition at line 33 of file GLCD.h.

#define Green 0x07E0

Definition at line 35 of file GLCD.h.

#define LightGrey 0xC618

Definition at line 32 of file GLCD.h.

#define Magenta 0xF81F

Definition at line 38 of file GLCD.h.

#define Maroon 0x7800

Definition at line 29 of file GLCD.h.

#define Navy 0x000F

Definition at line 26 of file GLCD.h.

#define Olive 0x7BE0

Definition at line 31 of file GLCD.h.

#define Purple 0x780F

Definition at line 30 of file GLCD.h.

#define Red 0xF800

Definition at line 37 of file GLCD.h.

#define White 0xFFFF

Definition at line 40 of file GLCD.h.

#define Yellow 0xFFE0

Definition at line 39 of file GLCD.h.

Function Documentation

void GLCD_Bargraph | ( | unsigned int | x,
 |  | unsigned int | y,
 |  | unsigned int | w,
 |  | unsigned int | h,
 |  | unsigned int | val
 | ) |  |

Definition at line 508 of file GLCD_SPI_LPC1700.c.

void GLCD_Bitmap | ( | unsigned int | x,
 |  | unsigned int | y,
 |  | unsigned int | w,
 |  | unsigned int | h,
 |  | unsigned char * | bitmap
 | ) |  |

Definition at line 547 of file GLCD_SPI_LPC1700.c.

void GLCD_Bmp | ( | unsigned int | x,
 |  | unsigned int | y,
 |  | unsigned int | w,
 |  | unsigned int | h,
 |  | unsigned char * | bmp
 | ) |  |

Definition at line 584 of file GLCD_SPI_LPC1700.c.

void GLCD_Clear ( unsigned short color )

Definition at line 405 of file GLCD_SPI_LPC1700.c.

void GLCD_ClearLn ( unsigned int ln )

Definition at line 493 of file GLCD_SPI_LPC1700.c.

void GLCD_DisplayChar | ( | unsigned int | ln,
 |  | unsigned int | col,
 |  | unsigned char | c
 | ) |  |

Definition at line 463 of file GLCD_SPI_LPC1700.c.

void GLCD_DisplayString | ( | unsigned int | ln,
 |  | unsigned int | col,
 |  | unsigned char * | s
 | ) |  |

Definition at line 478 of file GLCD_SPI_LPC1700.c.

void GLCD_DrawChar | ( | unsigned int | x,
 |  | unsigned int | y,
 |  | unsigned short * | c
 | ) |  |

Definition at line 428 of file GLCD_SPI_LPC1700.c.

void GLCD_Init ( void )

Definition at line 218 of file GLCD_SPI_LPC1700.c.

void GLCD_PutPixel | ( | unsigned int | x,
 |  | unsigned int | y
 | ) |  |

Definition at line 366 of file GLCD_SPI_LPC1700.c.

void GLCD_SetBackColor ( unsigned short color )

Definition at line 393 of file GLCD_SPI_LPC1700.c.

void GLCD_SetTextColor ( unsigned short color )

Definition at line 381 of file GLCD_SPI_LPC1700.c.

void GLCD_WindowMax ( void )

Definition at line 350 of file GLCD_SPI_LPC1700.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/GLCD_SPI_LPC1700.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/GLCD_SPI_LPC1700.c File Reference
#include <lpc17xx.h>
#include "GLCD.h"
#include "Font_24x16.h"

Go to the source code of this file.

Defines

#define | PIN_CS (1 << 6)
#define | TFE 0x01
#define | RNE 0x04
#define | BSY 0x10
#define | DELAY_2N 18
#define | WIDTH 320
#define | HEIGHT 240
#define | BPP 16
#define | BYPP ((BPP+7)/8)
#define | LCD_CS(x) ((x) ? (LPC_GPIO0->FIOSET = PIN_CS) : (LPC_GPIO0->FIOCLR = PIN_CS));
#define | SPI_START (0x70)
#define | SPI_RD (0x01)
#define | SPI_WR (0x00)
#define | SPI_DATA (0x02)
#define | SPI_INDEX (0x00)

Functions

void | GLCD_Init (void)
void | GLCD_WindowMax (void)
void | GLCD_PutPixel (unsigned int x, unsigned int y)
void | GLCD_SetTextColor (unsigned short color)
void | GLCD_SetBackColor (unsigned short color)
void | GLCD_Clear (unsigned short color)
void | GLCD_DrawChar (unsigned int x, unsigned int y, unsigned short *c)
void | GLCD_DisplayChar (unsigned int ln, unsigned int col, unsigned char c)
void | GLCD_DisplayString (unsigned int ln, unsigned int col, unsigned char *s)
void | GLCD_ClearLn (unsigned int ln)
void | GLCD_Bargraph (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned int val)
void | GLCD_Bitmap (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bitmap)
void | GLCD_Bmp (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bmp)

Variables

static volatile unsigned short | BackColor = White

Define Documentation

#define BPP 16

Definition at line 46 of file GLCD_SPI_LPC1700.c.

#define BSY 0x10

Definition at line 34 of file GLCD_SPI_LPC1700.c.

#define BYPP ((BPP+7)/8)

Definition at line 47 of file GLCD_SPI_LPC1700.c.

#define DELAY_2N 18

Definition at line 40 of file GLCD_SPI_LPC1700.c.

#define HEIGHT 240

Definition at line 45 of file GLCD_SPI_LPC1700.c.

#define LCD_CS ( x ) ((x) ? (LPC_GPIO0->FIOSET = PIN_CS) : (LPC_GPIO0->FIOCLR = PIN_CS));

Definition at line 52 of file GLCD_SPI_LPC1700.c.

#define PIN_CS (1 << 6)

Definition at line 29 of file GLCD_SPI_LPC1700.c.

#define RNE 0x04

Definition at line 33 of file GLCD_SPI_LPC1700.c.

#define SPI_DATA (0x02)

Definition at line 57 of file GLCD_SPI_LPC1700.c.

#define SPI_INDEX (0x00)

Definition at line 58 of file GLCD_SPI_LPC1700.c.

#define SPI_RD (0x01)

Definition at line 55 of file GLCD_SPI_LPC1700.c.

#define SPI_START (0x70)

Definition at line 54 of file GLCD_SPI_LPC1700.c.

#define SPI_WR (0x00)

Definition at line 56 of file GLCD_SPI_LPC1700.c.

#define TFE 0x01

Definition at line 32 of file GLCD_SPI_LPC1700.c.

#define WIDTH 320

Definition at line 44 of file GLCD_SPI_LPC1700.c.

Function Documentation

void GLCD_Bargraph | ( | unsigned int | x,
 |  | unsigned int | y,
 |  | unsigned int | w,
 |  | unsigned int | h,
 |  | unsigned int | val
 | ) |  |

Definition at line 508 of file GLCD_SPI_LPC1700.c.

void GLCD_Bitmap | ( | unsigned int | x,
 |  | unsigned int | y,
 |  | unsigned int | w,
 |  | unsigned int | h,
 |  | unsigned char * | bitmap
 | ) |  |

Definition at line 547 of file GLCD_SPI_LPC1700.c.

void GLCD_Bmp | ( | unsigned int | x,
 |  | unsigned int | y,
 |  | unsigned int | w,
 |  | unsigned int | h,
 |  | unsigned char * | bmp
 | ) |  |

Definition at line 584 of file GLCD_SPI_LPC1700.c.

void GLCD_Clear ( unsigned short color )

Definition at line 405 of file GLCD_SPI_LPC1700.c.

void GLCD_ClearLn ( unsigned int ln )

Definition at line 493 of file GLCD_SPI_LPC1700.c.

void GLCD_DisplayChar | ( | unsigned int | ln,
 |  | unsigned int | col,
 |  | unsigned char | c
 | ) |  |

Definition at line 463 of file GLCD_SPI_LPC1700.c.

void GLCD_DisplayString | ( | unsigned int | ln,
 |  | unsigned int | col,
 |  | unsigned char * | s
 | ) |  |

Definition at line 478 of file GLCD_SPI_LPC1700.c.

void GLCD_DrawChar | ( | unsigned int | x,
 |  | unsigned int | y,
 |  | unsigned short * | c
 | ) |  |

Definition at line 428 of file GLCD_SPI_LPC1700.c.

void GLCD_Init ( void )

Definition at line 218 of file GLCD_SPI_LPC1700.c.

void GLCD_PutPixel | ( | unsigned int | x,
 |  | unsigned int | y
 | ) |  |

Definition at line 366 of file GLCD_SPI_LPC1700.c.

void GLCD_SetBackColor ( unsigned short color )

Definition at line 393 of file GLCD_SPI_LPC1700.c.

void GLCD_SetTextColor ( unsigned short color )

Definition at line 381 of file GLCD_SPI_LPC1700.c.

void GLCD_WindowMax ( void )

Definition at line 350 of file GLCD_SPI_LPC1700.c.

Variable Documentation

volatile unsigned short BackColor = White

Definition at line 63 of file GLCD_SPI_LPC1700.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/lcdtest.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/lcdtest.c File Reference
#include "lpc17xx_gpio.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "GLCD.h"

Go to the source code of this file.

Defines

#define | TIME_OUT 10000

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
Print Welcome menu.
int | main (void)

Variables

uint8_t | lcd_text [2][16+1]
Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _GPIO
#define | CHECK_PARAM(expr)

Define Documentation

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/MCPWM/MCPWMSimple/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/MCPWM/MCPWMSimple/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _MCPWM
#define | _UART
#define | _UART0
#define | _TIM
#define | _QEI
#define | _MCPWM
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 45 of file lpc17xx_libcfg.h.

#define _MCPWM

Definition at line 183 of file lpc17xx_libcfg.h.

#define _MCPWM

Definition at line 183 of file lpc17xx_libcfg.h.

#define _QEI

Definition at line 180 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 148 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 129 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 129 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 130 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 130 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 200 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 37 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/MCPWM/MCPWMSimple/mcpwm_simple.c File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/MCPWM/MCPWMSimple/mcpwm_simple.c File Reference

This example used to test MCPWM driver. More...

#include "lpc17xx_mcpwm.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_clkpwr.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | DC_MODE_TEST 1
#define | AC_MODE_TEST 0
#define | CAPTURE_MODE_TEST 0

Functions

void | MCPWM_IRQHandler (void)
MCPWM interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main MCPWM program body
int | main (void)

Detailed Description

This example used to test MCPWM driver.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file mcpwm_simple.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/Priority/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/Priority/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _GPIO
#define | _EXTI
#define | CHECK_PARAM(expr)

Define Documentation

#define _EXTI

Definition at line 50 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/Priority/nvic_priority.c File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/Priority/nvic_priority.c File Reference

This example used to test NVIC Grouping Priority function. More...

#include "lpc17xx_libcfg.h"
#include "lpc17xx_gpio.h"
#include "lpc17xx_nvic.h"
#include "lpc17xx_systick.h"
#include "lpc17xx_exti.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Defines

#define | INT_MODE 1

Functions

void | EINT0_IRQHandler (void)
External interrupt 0 handler This interrupt occurs when pressing button INT0.
void | EINT3_IRQHandler (void)
External interrupt 3 handler This interrupt occurs when turn ADC potentiometer.
void | print_menu (void)
Print menu.
void | delay (void)
delay function
int | c_entry (void)
c_entry: Main program body
int | main (void)

Detailed Description

This example used to test NVIC Grouping Priority function.

Version:
1.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file nvic_priority.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/VecTable_Relocation/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/VecTable_Relocation/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SYSTICK
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 46 of file lpc17xx_libcfg.h.

#define _SYSTICK

Definition at line 67 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/VecTable_Relocation/vt_relocation.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/VecTable_Relocation/vt_relocation.c File Reference

This example used to test NVIC Vector Table relocation function. More...

#include <string.h>
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"
#include "lpc17xx_nvic.h"
#include "lpc17xx_systick.h"

Go to the source code of this file.

Defines

#define | VTOR_OFFSET 0x20080000

Functions

void | SysTick_Handler (void)
SysTick interrupt handler.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
FunctionalState | Cur_State = DISABLE

Detailed Description

This example used to test NVIC Vector Table relocation function.

Version:
1.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file vt_relocation.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Project_Template/Eclipse_GNU/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/Project_Template/Eclipse_GNU/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Project_Template/Eclipse_GNU/template.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Examples/Project_Template/Eclipse_GNU/template.c File Reference

A simple template for GNU example. More...

#include "lpc17xx_libcfg.h"

Go to the source code of this file.

Functions

int | c_entry (void)
Main program body.
int | main (void)

Detailed Description

A simple template for GNU example.

Version:
x.x
Date:
dd. mm. yy
Author:
xxxx

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file template.c.

Function Documentation

int c_entry ( void )

Main program body.

Definition at line 41 of file template.c.

int main ( void )

Definition at line 49 of file template.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Dual_Edge/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Dual_Edge/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _PWM
#define | _PWM1
#define | CHECK_PARAM(expr)

Define Documentation

#define _PWM

Definition at line 95 of file lpc17xx_libcfg.h.

#define _PWM1

Definition at line 96 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Dual_Edge/pwm_dual_edge.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Dual_Edge/pwm_dual_edge.c File Reference

This program illustrates the PWM signal on 3 Channels in both edge mode and single mode. More...

#include "lpc17xx_pwm.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Functions

int | c_entry (void)
c_entry: Main PWM program body
int | main (void)

Detailed Description

This program illustrates the PWM signal on 3 Channels in both edge mode and single mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file pwm_dual_edge.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Match_Interrupt/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Match_Interrupt/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _PWM
#define | _PWM1
#define | CHECK_PARAM(expr)

Define Documentation

#define _PWM

Definition at line 95 of file lpc17xx_libcfg.h.

#define _PWM1

Definition at line 96 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Match_Interrupt/pwm_match_int.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Match_Interrupt/pwm_match_int.c File Reference

PWM match interrupt example. More...

#include "lpc17xx_pwm.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Defines

#define | TIME_OUT 10000

Functions

void | PWM1_IRQHandler (void)
GPDMA interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main PWM program body
int | main (void)

Variables

__IO uint32_t | match_cnt = 0
__IO uint32_t | long_duty = 0

Detailed Description

PWM match interrupt example.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file pwm_match_int.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Single_Edge/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Single_Edge/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _PWM
#define | _PWM1
#define | CHECK_PARAM(expr)

Define Documentation

#define _PWM

Definition at line 94 of file lpc17xx_libcfg.h.

#define _PWM1

Definition at line 95 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Single_Edge/pwm_single_edge.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Single_Edge/pwm_single_edge.c File Reference

This program illustrates the PWM signal on 6 Channels in single edge mode. More...

#include "lpc17xx_pwm.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Functions

int | c_entry (void)
c_entry: Main PWM program body
int | main (void)

Detailed Description

This program illustrates the PWM signal on 6 Channels in single edge mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file pwm_single_edge.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/EXTINT_Sleep/extint_sleep.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/EXTINT_Sleep/extint_sleep.c File Reference

This example describes how to enter the system in sleep mode and wake-up by using external interrupt. More...

#include "LPC17xx.h"
#include "lpc17xx_gpio.h"
#include "lpc17xx_exti.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | MCB_LPC_1768

Functions

void | print_menu (void)
Print Welcome menu.
void | delay (void)
Delay function.
void | InitLED (void)
Initialize LEDs.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"

Detailed Description

This example describes how to enter the system in sleep mode and wake-up by using external interrupt.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file extint_sleep.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/EXTINT_Sleep/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/EXTINT_Sleep/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _EXTI
#define | _UART
#define | _UART0
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _EXTI

Definition at line 50 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/NMI_PowerDown/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/NMI_PowerDown/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 48 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 54 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 55 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/NMI_PowerDown/nmi_powerdown.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/NMI_PowerDown/nmi_powerdown.c File Reference

This example describes how to enter the system in Power Down mode and wake-up by using NMI (Non-maskable Interrupt) More...

#include "LPC17xx.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Functions

void | print_menu (void)
Print Welcome menu.
void | NMI_Handler (void)
Non-Maskable interrupt handler.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"

Detailed Description

This example describes how to enter the system in Power Down mode and wake-up by using NMI (Non-maskable Interrupt)

Version:
1.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file nmi_powerdown.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/RTC_DeepPWD/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/RTC_DeepPWD/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _RTC
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 48 of file lpc17xx_libcfg.h.

#define _RTC

Definition at line 100 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 54 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 55 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/RTC_DeepPWD/rtc_deeppwd.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/RTC_DeepPWD/rtc_deeppwd.c File Reference

This example describes how to enter the system in Deep PowerDown and wake-up by using RTC Interrupt. More...

#include "LPC17xx.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"
#include "lpc17xx_rtc.h"

Go to the source code of this file.

Functions

void | print_menu (void)
Print Welcome menu.
void | RTC_IRQHandler (void)
RTC(Real-time clock) interrupt handler.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"

Detailed Description

This example describes how to enter the system in Deep PowerDown and wake-up by using RTC Interrupt.

Version:
1.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file rtc_deeppwd.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/WDT_DeepSleep/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/WDT_DeepSleep/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _WDT
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define _WDT

Definition at line 79 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/WDT_DeepSleep/wdt_deepsleep.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/PWR/WDT_DeepSleep/wdt_deepsleep.c File Reference
#include "LPC17xx.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"
#include "lpc17xx_wdt.h"

Go to the source code of this file.

Defines

#define | WDT_TIMEOUT 2000000

Functions

void | print_menu (void)
Print Welcome menu.
void | WDT_IRQHandler (void)
WDT interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/QEI/QEI_Velo/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/QEI/QEI_Velo/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _TIM
#define | _QEI
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 46 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 50 of file lpc17xx_libcfg.h.

#define _QEI

Definition at line 112 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 80 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 56 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 57 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 140 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 38 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/QEI/QEI_Velo/qei_test_velo.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/QEI/QEI_Velo/qei_test_velo.c File Reference
#include "lpc17xx_qei.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_timer.h"
#include "lpc17xx_clkpwr.h"
#include "debug_frmwrk.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | VIRTUAL_QEI_SIGNAL 1
#define | SIGNAL_MODE 0
#define | CAP_MODE 1
#define | CAP_PERIOD 250000UL
#define | DISP_TIME 3000000UL
#define | MAX_CAP_TIMES (DISP_TIME/CAP_PERIOD)
#define | ENC_RES 2048UL
#define | MAX_VEL 600UL
#define | COUNT_MODE 4
#define | PHASE_A_PIN (1<<19)
#define | PHASE_B_PIN (1<<21)

Functions

void | VirtualQEISignal_Init (void)
Initializes signal supplying for QEI peripheral by using timer match interrupt output, that will generate two virtual signal on Phase-A and Phase-B. These two clock are 90 degrees out of phase. In this case, a 'virtual encoder' that has these following parameter:
void | TIMER0_IRQHandler (void)
Timer 0 interrupt handler. This sub-routine will set/clear two Phase A-B output pin to their phase state.
void | QEI_IRQHandler (void)
QEI interrupt handler. This sub-routine will update current value of captured velocity in to velocity accumulate.
int | c_entry (void)
c_entry: Main QEI program body
int | main (void)

Variables

__IO uint8_t | PhaseCnt
__IO uint64_t | VeloAcc
__IO uint32_t | VeloCapCnt
__IO FlagStatus | VeloAccFlag
const PINSEL_CFG_Type | qei_phaA_pin [1] = {{1, 20, 1, 0, 0}}
const PINSEL_CFG_Type | qei_phaB_pin [1] = {{1, 23, 1, 0, 0}}
const PINSEL_CFG_Type | qei_idx_pin [1] = {{1, 24, 1, 0, 0}}
Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RIT/Interrupt/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/RIT/Interrupt/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _RIT
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _RIT

Definition at line 118 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RIT/Interrupt/rit_interrupt.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/RIT/Interrupt/rit_interrupt.c File Reference

This example used RIT to generate interrupt each 1s. More...

#include "lpc17xx_rit.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | MCB_LPC_1768
#define | TIME_INTERVAL 1000

Functions

void | RIT_IRQHandler (void)
RIT interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main RIT program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
FunctionalState | LEDStatus = ENABLE

Detailed Description

This example used RIT to generate interrupt each 1s.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file rit_interrupt.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RTC/AlarmCntIncrInterrupt/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/RTC/AlarmCntIncrInterrupt/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _RTC
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _RTC

Definition at line 99 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RTC/AlarmCntIncrInterrupt/rtc_alarm_cntincr_int.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/RTC/AlarmCntIncrInterrupt/rtc_alarm_cntincr_int.c File Reference

This example describes how to use RTC to generate interrupt in Second Counter Increment Interrupt (1s) and generate alarm interrupt at 10s. More...

#include "lpc17xx_rtc.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Functions

void | RTC_IRQHandler (void)
RTC interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main RTC program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"

Detailed Description

This example describes how to use RTC to generate interrupt in Second Counter Increment Interrupt (1s) and generate alarm interrupt at 10s.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file rtc_alarm_cntincr_int.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RTC/Calibration/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/RTC/Calibration/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _RTC
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _RTC

Definition at line 99 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RTC/Calibration/rtc_calib.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/RTC/Calibration/rtc_calib.c File Reference

This example describes how to calibrate real time clock. More...

#include "LPC17xx.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"
#include "lpc17xx_rtc.h"

Go to the source code of this file.

Functions

void | print_menu (void)
Print Welcome menu.
void | RTC_IRQHandle (void)
void | RTC_IRQHandler (void)
RTC interrupt handler sub-routine.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"

Detailed Description

This example describes how to calibrate real time clock.

Version:
2.0
Date:
18. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file rtc_calib.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/LoopBack/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/LoopBack/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SPI
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _SPI

Definition at line 60 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/LoopBack/spi_loopback_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/LoopBack/spi_loopback_test.c File Reference

An example of SPI using polling mode with loop-back (MISO <-> MOSI)connection to test SPI driver. More...

#include "lpc17xx_spi.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | SPI_DATABIT_SIZE 10
#define | BUFFER_SIZE 0x40

Functions

void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
SPI_CFG_Type SPI_ConfigStruct
uint16_t | Tx_Buf [BUFFER_SIZE]
uint16_t | Rx_Buf [BUFFER_SIZE]

Detailed Description

An example of SPI using polling mode with loop-back (MISO <-> MOSI)connection to test SPI driver.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file spi_loopback_test.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Master/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Master/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SPI
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _SPI

Definition at line 60 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Master/spi_master.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Master/spi_master.c File Reference

This example describes how to use SPI in master mode. More...

#include "lpc17xx_spi.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | SPI_DATABIT_SIZE 10
#define | BUFFER_SIZE 0x40

Functions

void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
SPI_CFG_Type SPI_ConfigStruct
uint16_t | Tx_Buf [BUFFER_SIZE]
uint16_t | Rx_Buf [BUFFER_SIZE]

Detailed Description

This example describes how to use SPI in master mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file spi_master.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_int/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_int/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SPI
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _SPI

Definition at line 60 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_int/spi_interrupt_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_int/spi_interrupt_test.c File Reference

This example describes how to use SPI at mode SPI master/8bit on LPC1768 to communicate with SC16IS750/760 Demo board in interrupt mode. More...

#include "lpc17xx_spi.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | IDLE_CHAR 0xFF
#define | SC16IS740_WR_CMD(x) ((uint8_t) (x << 3))
#define | SC16IS740_RD_CMD(x) ((uint8_t) ((x << 3) | 0x80))
#define | SC16IS740_IODIR_REG 0x0A
#define | SC16IS740_IOSTATE_REG 0x0B
#define | SC16IS740_IOCON_REG 0x0E

Functions

void | SPI_IRQHandler (void)
SPI Interrupt used for reading and writing handler.
void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | iocon_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}
uint8_t | iodir_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}
uint8_t | iostate_on [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}
uint8_t | iostate_off [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}
uint8_t | spireadbuf [2]
__IO FlagStatus | complete
SPI_CFG_Type SPI_ConfigStruct
SPI_DATA_SETUP_Type xferConfig

Detailed Description

This example describes how to use SPI at mode SPI master/8bit on LPC1768 to communicate with SC16IS750/760 Demo board in interrupt mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file spi_interrupt_test.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_polling/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_polling/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SPI
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 46 of file lpc17xx_libcfg.h.

#define _SPI

Definition at line 59 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_polling/spi_polling_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_polling/spi_polling_test.c File Reference

This example describes how to use SPI at mode SPI master/8bit on LPC1768 to communicate with SC16IS750/760 Demo board in polling mode. More...

#include "lpc17xx_spi.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | SC16IS740_WR_CMD(x) ((uint8_t) (x << 3))
#define | SC16IS740_RD_CMD(x) ((uint8_t) ((x << 3) | 0x80))
#define | SC16IS740_IODIR_REG 0x0A
#define | SC16IS740_IOSTATE_REG 0x0B
#define | SC16IS740_IOCON_REG 0x0E

Functions

void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
SPI_CFG_Type SPI_ConfigStruct
uint8_t | iocon_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}
uint8_t | iodir_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}
uint8_t | iostate_on [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}
uint8_t | iostate_off [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}
uint8_t | spireadbuf [2]

Detailed Description

This example describes how to use SPI at mode SPI master/8bit on LPC1768 to communicate with SC16IS750/760 Demo board in polling mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file spi_polling_test.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/SDCard/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/SDCard/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SPI
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _SPI

Definition at line 60 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/SDCard/spi_sdcard.c File Reference

Defines | Typedefs | Enumerations | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/SDCard/spi_sdcard.c File Reference

This example describes how to use SPI to read SD card's CID register. More...

#include "lpc17xx_spi.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | SD_DETECT_PORTNUM 4
#define | SD_DETECT_PINNUM 29
#define | CMD0_GO_IDLE_STATE 0x00
#define | CMD1_SEND_OPCOND 0x01
#define | CMD9_SEND_CSD 0x09
#define | CMD10_SEND_CID 0x0a
#define | CMD12_STOP_TRANSMISSION 0x0b
#define | CMD13_SEND_STATUS 0x0c
#define | CMD16_SET_BLOCKLEN 0x10
#define | CMD17_READ_SINGLE_BLOCK 0x11
#define | CMD18_READ_MULTIPLE_BLOCK 0x12
#define | CMD24_WRITE_BLOCK 0x18
#define | CMD25_WRITE_MULTIPLE_BLOCK 0x19
#define | CMD27_PROGRAM_CSD 0x1b
#define | CMD28_SET_WRITE_PROT 0x1c
#define | CMD29_CLR_WRITE_PROT 0x1d
#define | CMD30_SEND_WRITE_PROT 0x1e
#define | CMD32_ERASE_WR_BLK_START_ADDR 0x20
#define | CMD33_ERASE_WR_BLK_END_ADDR 0x21
#define | CMD38_ERASE 0x26
#define | CMD55_APP_CMD 0x37
#define | CMD56_GEN_CMD 0x38
#define | CMD58_READ_OCR 0x3a
#define | CMD59_CRC_ON_OFF 0x3b
#define | ACMD13_SD_STATUS 0x0d
#define | ACMD22_SEND_NUM_WR_BLOCKS 0x16
#define | ACMD23_SET_WR_BLK_ERASE_COUNT 0x17
#define | ACMD41_SEND_OP_COND 0x29
#define | ACMD42_SET_CLR_CARD_DETECT 0x2a
#define | ACMD51_SEND_SCR 0x33
#define | R1_NOERROR 0x00
#define | R1_IDLE 0x01
#define | R1_ERASE 0x02
#define | R1_ILLEGAL 0x04
#define | R1_CRC_ERR 0x08
#define | R1_ERASE_SEQ 0x10
#define | R1_ADDR_ERR 0x20
#define | R1_PARAM_ERR 0x40
#define | R2_LOCKED 0x01
#define | R2_WP_FAILED 0x02
#define | R2_ERROR 0x04
#define | R2_CTRL_ERR 0x08
#define | R2_ECC_FAIL 0x10
#define | R2_WP_VIOL 0x20
#define | R2_ERASE_PARAM 0x40
#define | R2_RANGE_ERR 0x80
#define | GETBIT(in, bit) ((in & (1<<bit)) >> bit)
#define | SD_CMD_BLOCK_LENGTH 6
#define | SD_DATA_BLOCK_LENGTH 515
#define | SD_WAIT_R1_TIMEOUT 100000

Typedefs

typedef enum _sd_connect_status | sd_connect_status
typedef enum _sd_error | sd_error

Enumerations

enum | _sd_connect_status { SD_CONNECTED, SD_DISCONNECTED }
enum _sd_error {
SD_OK, SD_NG, SD_CMD_BAD_PARAMETER, SD_ERROR_TOKEN,
SD_ERROR_TIMEOUT, SD_ERROR_BUS_NOT_IDLE, SD_ERROR_CMD0, SD_ERROR_CMD55,
SD_ERROR_ACMD41, SD_ERROR_CMD59
}

Functions

void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
sd_connect_status | SD_GetCardConnectStatus (void)
check if SD card is inserted or not
uint8_t | crc_7 (uint8_t old_crc, uint8_t data)
Calculate CRC-7 as required by SD specification.
uint8_t | crc_7final (uint8_t old_crc)
Provides the zero-padding final step to CRC-7.
uint32_t | SD_SendReceiveData_Polling (void *tx_buf, void *rx_buf, uint32_t length)
Send/receive data over SPI bus.
void | SD_SendCommand (uint8_t cmd, uint8_t *arg)
Send command to SD card.
sd_error | SD_WaitR1 (uint8_t *buffer, uint32_t length, uint32_t timeout)
Wait for SD card R1 response.
sd_error | SD_WaitDeviceIdle (uint32_t num_char)
Wait for SD card idle.
sd_error | SD_Init (uint8_t retries)
Initialize SD card in SPI mode.
sd_error | SD_GetCID (void)
Get SD card's CID register.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
SPI_CFG_Type SPI_ConfigStruct
SPI_DATA_SETUP_Type xferConfig
uint8_t | sd_cmd_buf [SD_CMD_BLOCK_LENGTH]
uint8_t | sd_data_buf [SD_DATA_BLOCK_LENGTH]

Detailed Description

This example describes how to use SPI to read SD card's CID register.

Version:
1.0
Date:
16. July. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file spi_sdcard.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Slave/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Slave/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SPI
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _SPI

Definition at line 60 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Slave/spi_slave.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Slave/spi_slave.c File Reference

This example describes how to use SPI in slave mode. More...

#include "lpc17xx_spi.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | BUFFER_SIZE 0x40
#define | SPI_DATABIT_SIZE 10

Functions

void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main SPI program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
SPI_CFG_Type SPI_ConfigStruct
uint16_t | Tx_Buf [BUFFER_SIZE]
uint16_t | Rx_Buf [BUFFER_SIZE]

Detailed Description

This example describes how to use SPI in slave mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file spi_slave.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/dma/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/dma/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _SSP
#define | _SSP0
#define | _SSP1
#define | _GPDMA
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 84 of file lpc17xx_libcfg.h.

#define _SSP

Definition at line 63 of file lpc17xx_libcfg.h.

#define _SSP0

Definition at line 64 of file lpc17xx_libcfg.h.

#define _SSP1

Definition at line 65 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/dma/ssp_dma.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/dma/ssp_dma.c File Reference

This example describes how to use SPP in Master mode with loop-back mode (MOSI <-> MISO), using DMA for both Tx and Rx channel. More...

#include "lpc17xx_ssp.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_gpdma.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | DMA_DATA_SIZE 65

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Buffer_Verify (void)
Verify buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
int | c_entry (void)
c_entry: Main SSP program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
SSP_CFG_Type SSP_ConfigStruct
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err
__IO uint32_t | Channel1_TC
__IO uint32_t | Channel1_Err
uint8_t | dma_src [DMA_DATA_SIZE]
uint8_t | dma_dst [DMA_DATA_SIZE]

Detailed Description

This example describes how to use SPP in Master mode with loop-back mode (MOSI <-> MISO), using DMA for both Tx and Rx channel.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file ssp_dma.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Master/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Master/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SSP
#define | _SSP0
#define | _SSP1
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _SSP

Definition at line 63 of file lpc17xx_libcfg.h.

#define _SSP0

Definition at line 64 of file lpc17xx_libcfg.h.

#define _SSP1

Definition at line 65 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Master/ssp_master.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Master/ssp_master.c File Reference

This example describes how to use SPP in master mode. More...

#include "lpc17xx_ssp.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | BUFFER_SIZE 0x40

Functions

void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main SSP program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
SSP_CFG_Type SSP_ConfigStruct
uint8_t | Tx_Buf [BUFFER_SIZE]
uint8_t | Rx_Buf [BUFFER_SIZE]

Detailed Description

This example describes how to use SPP in master mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file ssp_master.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/MicroWire/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/MicroWire/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _SSP
#define | _SSP0
#define | _SSP1
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _SSP

Definition at line 63 of file lpc17xx_libcfg.h.

#define _SSP0

Definition at line 64 of file lpc17xx_libcfg.h.

#define _SSP1

Definition at line 65 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/MicroWire/microwire_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/MicroWire/microwire_test.c File Reference

This example describes how to use SPP peripheral in MicroWire frame format. More...

#include "lpc17xx_ssp.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | IDLE_CHAR 0xFF
#define | USEDSSPDEV_M 0
#define | USEDSSPDEV_S 1
#define | BUFFER_SIZE 0x40
#define | MicroWire_WR_CMD ((uint8_t)(0x00))
#define | MicroWire_RD_CMD ((uint8_t)(0x01))
#define | SSPDEV_M LPC_SSP0
#define | SSPDEV_S LPC_SSP1

Functions

void | ssp_MW_SendCMD (LPC_SSP_TypeDef *SSPx, uint8_t cmd)
Send command to slave in master mode.
uint16_t | ssp_MW_GetRSP (LPC_SSP_TypeDef *SSPx)
Get respond from slave after sending a command in master mode.
uint8_t | ssp_MW_GetCMD (LPC_SSP_TypeDef *SSPx)
Get command from master in slave mode.
void | ssp_MW_SendRSP (LPC_SSP_TypeDef *SSPx, uint16_t Rsp)
Send respond to master in slave mode.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Buffer_Verify (void)
Verify buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
int | c_entry (void)
c_entry: Main MICROWIRE program body
int | main (void)

Variables

uint8_t * | pRdBuf_M
uint32_t | RdIdx_M
uint32_t | DatLen_M
uint8_t | Master_Rx_Buf [BUFFER_SIZE]
uint8_t * | pWrBuf_S
uint32_t | WrIdx_S
uint32_t | DatLen_S
uint8_t | Slave_Tx_Buf [BUFFER_SIZE]
uint8_t | Last_cmd
uint8_t | menu1 [] = "********************************************************************************\n\r"
SSP_CFG_Type SSP_ConfigStruct

Detailed Description

This example describes how to use SPP peripheral in MicroWire frame format.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file microwire_test.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_int/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_int/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SSP
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _SSP

Definition at line 63 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:06 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_int/sc16is750_int.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_int/sc16is750_int.c File Reference

This example describes how to use SPP using interrupt mode, SSP frame format to communicate with SC16IS750/760 Demo board. More...

#include "lpc17xx_ssp.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | IDLE_CHAR 0xFF
#define | SC16IS740_WR_CMD(x) ((uint8_t) (x << 3))
#define | SC16IS740_RD_CMD(x) ((uint8_t) ((x << 3) | 0x80))
#define | SC16IS740_IODIR_REG 0x0A
#define | SC16IS740_IOSTATE_REG 0x0B
#define | SC16IS740_IOCON_REG 0x0E

Functions

void | SSP0_IRQHandler (void)
SSP0 Interrupt used for reading and writing handler.
void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main SSP program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
uint8_t | iocon_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}
uint8_t | iodir_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}
uint8_t | iostate_on [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}
uint8_t | iostate_off [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}
uint8_t | sspreadbuf [2]
__IO FlagStatus | complete
SSP_CFG_Type SSP_ConfigStruct
SSP_DATA_SETUP_Type xferConfig

Detailed Description

This example describes how to use SPP using interrupt mode, SSP frame format to communicate with SC16IS750/760 Demo board.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file sc16is750_int.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_polling/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_polling/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SSP
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 46 of file lpc17xx_libcfg.h.

#define _SSP

Definition at line 62 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_polling/sc16is750_polling.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_polling/sc16is750_polling.c File Reference

This example describes how to use SPP using polling mode, SSP frame format to communicate with SC16IS750/760 Demo board. More...

#include "lpc17xx_ssp.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | CS_PORT_NUM 0
#define | CS_PIN_NUM 16
#define | SC16IS740_WR_CMD(x) ((uint8_t) (x << 3))
#define | SC16IS740_RD_CMD(x) ((uint8_t) ((x << 3) | 0x80))
#define | SC16IS740_IODIR_REG 0x0A
#define | SC16IS740_IOSTATE_REG 0x0B
#define | SC16IS740_IOCON_REG 0x0E

Functions

void | CS_Init (void)
Initialize CS pin as GPIO function to drive /CS pin due to definition of CS_PORT_NUM and CS_PORT_NUM.
void | CS_Force (int32_t state)
Drive CS output pin to low/high level to select slave device via /CS pin state.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main SSP program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
SSP_CFG_Type SSP_ConfigStruct
uint8_t | iocon_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00}
uint8_t | iodir_cfg [2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF}
uint8_t | iostate_on [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00}
uint8_t | iostate_off [2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF}
uint8_t | sspreadbuf [2]

Detailed Description

This example describes how to use SPP using polling mode, SSP frame format to communicate with SC16IS750/760 Demo board.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file sc16is750_polling.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Slave/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Slave/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _SSP
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _SSP

Definition at line 63 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Slave/ssp_slave.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Slave/ssp_slave.c File Reference

This example describes how to use SPP in slave mode. More...

#include "lpc17xx_ssp.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | BUFFER_SIZE 0x40

Functions

void | SSP0_IRQHandler (void)
SSP0 Interrupt used for reading and writing handler.
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
void | Buffer_Verify (void)
Verify buffer.
int | c_entry (void)
c_entry: Main SSP program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
SSP_CFG_Type SSP_ConfigStruct
SSP_DATA_SETUP_Type xferConfig
uint8_t | Tx_Buf [BUFFER_SIZE]
uint8_t | Rx_Buf [BUFFER_SIZE]
__IO FlagStatus | complete

Detailed Description

This example describes how to use SPP in slave mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file ssp_slave.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/TI/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/TI/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _SSP
#define | _SSP0
#define | _SSP1
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _SSP

Definition at line 63 of file lpc17xx_libcfg.h.

#define _SSP0

Definition at line 64 of file lpc17xx_libcfg.h.

#define _SSP1

Definition at line 65 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/TI/ti_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/SSP/TI/ti_test.c File Reference

This example describes how to use SPP using TI frame format (interrupt mode) More...

#include "lpc17xx_ssp.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Defines

#define | IDLE_CHAR 0xFF
#define | USEDSSPDEV_M 0
#define | USEDSSPDEV_S 1
#define | BUFFER_SIZE 0x40
#define | SSPDEV_M LPC_SSP0
#define | SSPDEV_S LPC_SSP1

Functions

void | SSP0_IRQHandler (void)
SSP0 Interrupt used for reading and writing handler.
void | SSP1_IRQHandler (void)
SSP1 Interrupt used for reading and writing handler.
void | ssp_Master_IntHandler (void)
SSP Master Interrupt sub-routine used for reading and writing handler.
void | ssp_Slave_IntHandler (void)
SSP Slave Interrupt sub-routine used for reading and writing handler.
int32_t | ssp_MasterReadWrite (LPC_SSP_TypeDef *SSPx, void *rbuffer, void *wbuffer, uint32_t length)
SSP Read write in polling mode function (Master mode)
int32_t | ssp_SlaveReadWrite (LPC_SSP_TypeDef *SSPx, void *rbuffer, void *wbuffer, uint32_t length)
SSP Read write in polling mode function (Slave mode)
void | print_menu (void)
Print Welcome menu.
void | Buffer_Init (void)
Initialize buffer.
void | Buffer_Verify (void)
Verify buffer.
void | Error_Loop (void)
Error Loop (called by Buffer_Verify() if any error)
int | c_entry (void)
c_entry: Main TI program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | menu2 [] = "Demo terminated! \n\r"
SSP_CFG_Type SSP_ConfigStruct
uint8_t * | pRdBuf_M
uint8_t * | pWrBuf_M
uint32_t | RdIdx_M
uint32_t | WrIdx_M
uint32_t | DatLen_M
__IO Bool | complete_M
uint8_t | Master_Tx_Buf [BUFFER_SIZE]
uint8_t | Master_Rx_Buf [BUFFER_SIZE]
uint8_t * | pRdBuf_S
uint8_t * | pWrBuf_S
uint32_t | RdIdx_S
uint32_t | WrIdx_S
uint32_t | DatLen_S
__IO Bool | complete_S
uint8_t | Slave_Tx_Buf [BUFFER_SIZE]
uint8_t | Slave_Rx_Buf [BUFFER_SIZE]

Detailed Description

This example describes how to use SPP using TI frame format (interrupt mode)

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file ti_test.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/10ms_base/10ms_base.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/10ms_base/10ms_base.c File Reference

This example describes how to configure System Tick to generate interrupt each 10ms. More...

#include "lpc17xx_libcfg.h"
#include "lpc17xx_gpio.h"
#include "lpc17xx_systick.h"

Go to the source code of this file.

Functions

void | SysTick_Handler (void)
SysTick interrupt handler.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

FunctionalState | Cur_State = ENABLE

Detailed Description

This example describes how to configure System Tick to generate interrupt each 10ms.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file 10ms_base.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/10ms_base/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/10ms_base/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _GPIO
#define | _SYSTICK
#define | CHECK_PARAM(expr)

Define Documentation

#define _GPIO

Definition at line 46 of file lpc17xx_libcfg.h.

#define _SYSTICK

Definition at line 67 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/STCLK/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/STCLK/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _GPIO
#define | _SYSTICK
#define | _TIM
#define | _RIT
#define | CHECK_PARAM(expr)

Define Documentation

#define _GPIO

Definition at line 46 of file lpc17xx_libcfg.h.

#define _RIT

Definition at line 117 of file lpc17xx_libcfg.h.

#define _SYSTICK

Definition at line 67 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 76 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/STCLK/systick_stclk.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/STCLK/systick_stclk.c File Reference

This example describes how to configure System Tick to use with external clock source STCLK. More...

#include "lpc17xx_libcfg.h"
#include "lpc17xx_gpio.h"
#include "lpc17xx_systick.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_timer.h"

Go to the source code of this file.

Functions

void | SysTick_Handler (void)
SysTick interrupt handler.
int | c_entry (void)
c_entry: Main program body
int | main (void)

Variables

FunctionalState | Cur_State = ENABLE
Bool | IO_State = FALSE

Detailed Description

This example describes how to configure System Tick to use with external clock source STCLK.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file systick_stclk.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Capture/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Capture/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _TIM
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 77 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Capture/timer_capture.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Capture/timer_capture.c File Reference

This example describes how to use TIMER capture function. More...

#include "lpc17xx_timer.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Functions

void | TIMER0_IRQHandler (void)
TIMER0 interrupt handler sub-routine.
void | TIMER1_IRQHandler (void)
TIMER1 interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
UART_CFG_Type UARTConfigStruct
uint32_t | MatchCount
TIM_TIMERCFG_Type TIM_ConfigStruct
TIM_MATCHCFG_Type TIM_MatchConfigStruct
TIM_CAPTURECFG_Type TIM_CaptureConfigStruct
uint8_t volatile | timer0_flag = FALSE
uint8_t volatile | timer1_flag = FALSE

Detailed Description

This example describes how to use TIMER capture function.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file timer_capture.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/FreqMeasure/freqmeasure.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/FreqMeasure/freqmeasure.c File Reference

This example describes how to use Timer to measure a signal's frequency. More...

#include "lpc17xx_timer.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Functions

void | TIMER0_IRQHandler (void)
TIMER0 interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
TIM_TIMERCFG_Type TIM_ConfigStruct
TIM_CAPTURECFG_Type TIM_CaptureConfigStruct
BOOL_8 first_capture
BOOL_8 done
uint32_t | capture
uint8_t | count = 0

Detailed Description

This example describes how to use Timer to measure a signal's frequency.

Version:
1.0
Date:
16. July. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file freqmeasure.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/FreqMeasure/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/FreqMeasure/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _TIM
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 77 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Delay/gen_diff_delay.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Delay/gen_diff_delay.c File Reference

This example describes how to use TIMER0 and TIMER2 to generate 2 different delay signals. More...

#include "lpc17xx_timer.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Functions

void | print_menu (void)
Print menu.
void | TIMER0_IRQHandler (void)
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
BOOL_8 | toggle = TRUE
uint32_t | T1
uint32_t | T2

Detailed Description

This example describes how to use TIMER0 and TIMER2 to generate 2 different delay signals.

Version:
1.0
Date:
16. July. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file gen_diff_delay.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Delay/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Delay/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _TIM
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 76 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Freqs/gen_diff_freqs.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Freqs/gen_diff_freqs.c File Reference

This example describes how to use TIMER0 and TIMER2 to generate 2 different frequency signals. More...

#include "lpc17xx_timer.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"

Detailed Description

This example describes how to use TIMER0 and TIMER2 to generate 2 different frequency signals.

Version:
2.0
Date:
16. July. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file gen_diff_freqs.c.

Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Freqs/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Freqs/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _TIM
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 77 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Interrupt_Match/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Interrupt_Match/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _TIM
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 43 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 46 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 76 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 136 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Interrupt_Match/timer_int_match.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Interrupt_Match/timer_int_match.c File Reference
#include "lpc17xx_timer.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_gpio.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Functions

void | TIMER0_IRQHandler (void)
TIMER0 interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
TIM_TIMERCFG_Type TIM_ConfigStruct
TIM_MATCHCFG_Type TIM_MatchConfigStruct
uint8_t volatile | timer0_flag = FALSE
uint8_t volatile | timer1_flag = FALSE
FunctionalState | LEDStatus = ENABLE
Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Polling_Match/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Polling_Match/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _TIM
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 77 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Polling_Match/timer_poll_match.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Polling_Match/timer_poll_match.c File Reference
#include "lpc17xx_timer.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"

Go to the source code of this file.

Functions

void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
TIM_TIMERCFG_Type TIM_ConfigStruct
TIM_MATCHCFG_Type TIM_MatchConfigStruct
Generated on Mon Nov 28 2011 11:15:11 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/PWMSignal/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/PWMSignal/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _TIM
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _TIM

Definition at line 77 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/PWMSignal/pwm_signal.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/PWMSignal/pwm_signal.c File Reference

This example use TIMERs to generate 4 PWM signals with different duty cycle. More...

#include "lpc17xx_libcfg.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_timer.h"

Go to the source code of this file.

Functions

void | TIMER0_IRQHandler (void)
TIMER0 interrupt handler.
void | TIMER1_IRQHandler (void)
TIMER1 interrupt handler.
void | TIMER2_IRQHandler (void)
TIMER2 interrupt handler.
void | TIMER3_IRQHandler (void)
TIMER3 interrupt handler.
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main TIMER program body
int | main (void)

Variables

uint8_t | menu [] = "********************************************************************************\n\r"
FunctionalState | PWM0_State = ENABLE
FunctionalState | PWM1_State = ENABLE
FunctionalState | PWM2_State = ENABLE
FunctionalState | PWM3_State = ENABLE
TIM_TIMERCFG_Type TIM_ConfigStruct
TIM_MATCHCFG_Type TIM_MatchConfigStruct

Detailed Description

This example use TIMERs to generate 4 PWM signals with different duty cycle.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file pwm_signal.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/AutoBaud/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/UART/AutoBaud/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _UART
#define | _UART0
#define | CHECK_PARAM(expr)

Define Documentation

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/AutoBaud/uart_autobaud_test.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/UART/AutoBaud/uart_autobaud_test.c File Reference

This example describes how to configure UART using auto-baud rate in interrupt mode. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Functions

void | UART0_IRQHandler (void)
UART0 interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)

Variables

uint8_t | syncmenu [] = "AutoBaudrate Status: Synchronous! \n\r"
uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART0 - Auto Baud rate mode used \n\r"
uint8_t | menu3 [] = "UART demo terminated!\n"
__IO FlagStatus | Synchronous

Detailed Description

This example describes how to configure UART using auto-baud rate in interrupt mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file uart_autobaud_test.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/DMA/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/UART/DMA/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _UART
#define | _UART0
#define | _GPDMA
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPDMA

Definition at line 125 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 142 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/DMA/uart_dma_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/UART/DMA/uart_dma_test.c File Reference

This example describes how to using UART in DMA mode. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_gpdma.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Defines

#define | RX_BUF_SIZE 0x10

Functions

void | DMA_IRQHandler (void)
GPDMA interrupt handler sub-routine.
void | print_menu (void)
Print menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)

Variables

uint8_t | menu1 [] = " on UART0 peripheral. To use UART with DMA mode, FIFO function must be enabled \n\r"
uint8_t | menu3 [] = "UART demo terminated!\n"
__IO uint8_t | rx_buf [RX_BUF_SIZE]
__IO uint32_t | Channel0_TC
__IO uint32_t | Channel0_Err
__IO uint32_t | Channel1_TC
__IO uint32_t | Channel1_Err

Detailed Description

This example describes how to using UART in DMA mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file uart_dma_test.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/HWFlowControl/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/UART/HWFlowControl/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _UART
#define | _UART0
#define | _UART1
#define | _UART2
#define | _UART3
#define | CHECK_PARAM(expr)

Define Documentation

#define _UART

Definition at line 48 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 49 of file lpc17xx_libcfg.h.

#define _UART1

Definition at line 50 of file lpc17xx_libcfg.h.

#define _UART2

Definition at line 51 of file lpc17xx_libcfg.h.

#define _UART3

Definition at line 52 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 134 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/HWFlowControl/uart_hw_flow_control.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/UART/HWFlowControl/uart_hw_flow_control.c File Reference

This example describes how to using UART Hardware flow control mode. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Defines

#define | TEST_UART (LPC_UART_TypeDef *)LPC_UART1

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART hardware flow control mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART1 - 9600bps \n\r"
uint8_t | menu3 [] = "UART demo terminated!"

Detailed Description

This example describes how to using UART Hardware flow control mode.

Version:
2.0
Date:
10. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file uart_hw_flow_control.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _UART
#define | _UART0
#define | CHECK_PARAM(expr)

Define Documentation

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/uart_interrupt_test.c File Reference

Data Structures | Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/uart_interrupt_test.c File Reference

This example describes how to using UART in interrupt mode. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Data Structures

struct | UART_RING_BUFFER_T
UART Ring buffer structure. More...

Defines

#define | UART_RING_BUFSIZE 256
#define | __BUF_MASK (UART_RING_BUFSIZE-1)
#define | __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
#define | __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
#define | __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
#define | __BUF_RESET(bufidx) (bufidx=0)
#define | __BUF_INCR(bufidx) (bufidx=(bufidx+1)&__BUF_MASK)

Functions

void | UART0_IRQHandler (void)
UART0 interrupt handler sub-routine.
void | UART_IntErr (uint8_t bLSErrType)
UART Line Status Error.
void | UART_IntTransmit (void)
UART transmit function (ring buffer used)
void | UART_IntReceive (void)
UART receive function (ring buffer used)
uint32_t | UARTReceive (LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
UART read function for interrupt mode (using ring buffers)
uint32_t | UARTSend (LPC_UART_TypeDef *UARTPort, uint8_t *txbuf, uint8_t buflen)
UART transmit function for interrupt mode (using ring buffers)
void | print_menu (void)
Print Welcome Screen Menu subroutine.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART0 - 9600bps \n\r"
uint8_t | menu3 [] = "UART demo terminated!\n"
UART_RING_BUFFER_T rb
__IO FlagStatus | TxIntStat

Detailed Description

This example describes how to using UART in interrupt mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file uart_interrupt_test.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Receive/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Receive/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _GPIO
#define | _UART
#define | _UART0
#define | _UART1
#define | _UART2
#define | _UART3
#define | CHECK_PARAM(expr)

Define Documentation

#define _GPIO

Definition at line 42 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 48 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 49 of file lpc17xx_libcfg.h.

#define _UART1

Definition at line 50 of file lpc17xx_libcfg.h.

#define _UART2

Definition at line 51 of file lpc17xx_libcfg.h.

#define _UART3

Definition at line 52 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 134 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Receive/uart_irda_receive.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Receive/uart_irda_receive.c File Reference

This example describes how to using UART in irDA mode. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | UART_PORT 0
#define | TEST_UART LPC_UART0
#define | TEST_IRDA LPC_UART3

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART IrDA mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps communicates with PC \n\r\t UART3 - 9600bps receives infrared signal\n\r"
uint8_t | menu3 [] = "\t The demo keep reading input infrared signal and display through 8 led bank \n\r"

Detailed Description

This example describes how to using UART in irDA mode.

Version:
2.0
Date:
07. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file uart_irda_receive.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Transmit/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Transmit/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _UART
#define | _UART0
#define | _UART1
#define | _UART2
#define | _UART3
#define | CHECK_PARAM(expr)

Define Documentation

#define _UART

Definition at line 48 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 49 of file lpc17xx_libcfg.h.

#define _UART1

Definition at line 50 of file lpc17xx_libcfg.h.

#define _UART2

Definition at line 51 of file lpc17xx_libcfg.h.

#define _UART3

Definition at line 52 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 134 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Transmit/uart_irda_transmit.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Transmit/uart_irda_transmit.c File Reference

This example describes how to using UART in irDA mode. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Defines

#define | UART_PORT 0
#define | TEST_UART LPC_UART0
#define | TEST_IRDA LPC_UART3

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART IrDA mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps communicates with PC \n\r\t UART3 - 9600bps transmits infrared signals\n\r"
uint8_t | menu3 [] = "\t\t- Press Esc to terminate this demo \n\r\t\t- Press 'r' to re-print this menu \n\r"
uint8_t | menu4 [] = "\n\rUART demo terminated!"
uint8_t | menu5 [] = "\n\rEnter a hex byte value to transmit: 0x"

Detailed Description

This example describes how to using UART in irDA mode.

Version:
2.0
Date:
07. June. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file uart_irda_transmit.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/Polling/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/UART/Polling/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _UART
#define | _UART0
#define | _UART1
#define | _UART2
#define | _UART3
#define | CHECK_PARAM(expr)

Define Documentation

#define _UART

Definition at line 51 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART1

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART2

Definition at line 54 of file lpc17xx_libcfg.h.

#define _UART3

Definition at line 55 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/Polling/uart_polling_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/UART/Polling/uart_polling_test.c File Reference

This example describes how to using UART in polling mode. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Defines

#define | UART_PORT 0
#define | TEST_UART LPC_UART0

Functions

void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART program body
int | main (void)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART polling mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps \n\r"
uint8_t | menu3 [] = "UART demo terminated!"

Detailed Description

This example describes how to using UART in polling mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file uart_polling_test.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _UART
#define | _UART0
#define | _UART1
#define | _UART2
#define | _UART3
#define | CHECK_PARAM(expr)

Define Documentation

#define _UART

Definition at line 52 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART1

Definition at line 54 of file lpc17xx_libcfg.h.

#define _UART2

Definition at line 55 of file lpc17xx_libcfg.h.

#define _UART3

Definition at line 56 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 139 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 35 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/rs485_master.c File Reference

Data Structures | Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/rs485_master.c File Reference

This example used to test RS485 functionality on UART1 of LPC1768.In this case, RS485 function on UART1 acts as Master on RS485 bus. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Data Structures

struct | UART_RING_BUFFER_T
UART Ring buffer structure. More...

Defines

#define | SLAVE_ADDR_A 'A'
#define | SLAVE_ADDR_B 'B'
#define | UART_RING_BUFSIZE 256
#define | __BUF_MASK (UART_RING_BUFSIZE-1)
#define | __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
#define | __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
#define | __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
#define | __BUF_RESET(bufidx) (bufidx=0)
#define | __BUF_INCR(bufidx) (bufidx=(bufidx+1)&__BUF_MASK)

Functions

void | UART1_IRQHandler (void)
UART1 interrupt handler sub-routine.
void | UART_IntReceive (void)
UART receive function (ring buffer used)
void | UART_IntErr (uint8_t bLSErrType)
UART Line Status Error.
uint32_t | UARTReceive (LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
UART read function for interrupt mode (using ring buffers)
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART-RS485 program body
int | main (void)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "RS485 demo in Master mode \n\r"
uint8_t | send_menu [] = "Sending... \n\r"
uint8_t | recv_menu [] = "Receive: "
uint8_t | p_err_menu [] = "Parity error \n\r"
uint8_t | f_err_menu [] = "Frame error \n\r"
uint8_t | nextline [] = "\n\r"
uint8_t | slaveA_msg [] = "Msg A: Hello NXP"
uint8_t | slaveB_msg [] = "Msg B: Hello NXP"
uint8_t | terminator = 13
UART_RING_BUFFER_T rb

Detailed Description

This example used to test RS485 functionality on UART1 of LPC1768.In this case, RS485 function on UART1 acts as Master on RS485 bus.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file rs485_master.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _UART
#define | _UART0
#define | _UART1
#define | _UART2
#define | _UART3
#define | CHECK_PARAM(expr)

Define Documentation

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define _UART1

Definition at line 55 of file lpc17xx_libcfg.h.

#define _UART2

Definition at line 56 of file lpc17xx_libcfg.h.

#define _UART3

Definition at line 57 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 139 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/rs485_slave.c File Reference

Data Structures | Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/rs485_slave.c File Reference

This example used to test RS485 functionality on UART1 of LPC1768.In this case, RS485 function on UART1 acts as SLave on RS485 bus. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Data Structures

struct | UART_RING_BUFFER_T
UART Ring buffer structure. More...

Defines

#define | RECEIVER_ALWAYS_EN 0
#define | AUTO_SLVADDR_DETECT 1
#define | SLAVE_ADDR 'A'
#define | UART_RING_BUFSIZE 256
#define | __BUF_MASK (UART_RING_BUFSIZE-1)
#define | __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
#define | __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
#define | __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
#define | __BUF_RESET(bufidx) (bufidx=0)
#define | __BUF_INCR(bufidx) (bufidx=(bufidx+1)&__BUF_MASK)

Functions

void | UART1_IRQHandler (void)
UART1 interrupt handler sub-routine.
void | UART_IntReceive (void)
UART receive function (ring buffer used)
void | UART_IntErr (uint8_t bLSErrType)
UART Line Status Error.
uint32_t | UARTReceive (LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
UART read function for interrupt mode (using ring buffers)
void | print_menu (void)
Print Welcome menu.
int | c_entry (void)
c_entry: Main UART-RS485 program body
int | main (void)

Variables

uint8_t | menu1 [] = "Slave's Receiver is not always enabled - Auto Address Detection is enabled\n\r"
uint8_t | send_msg [] = "Sending... \n\r"
uint8_t | recv_msg [] = "Receive: "
uint8_t | p_err_menu [] = "Parity error"
uint8_t | addr_menu [] = " - Slv Addr Frm received\n\r"
uint8_t | addr_acc [] = " - Slave Addr accepted\n\r"
uint8_t | addr_una [] = " - Slave Addr unaccepted\n\r"
uint8_t | addr_auto [] = "Slave Addr detected!\n\r"
uint8_t | f_err_menu [] = "Frame error \n\r"
uint8_t | nextline [] = "\n\r"
uint8_t | ack_msg [] = "ACK"
uint8_t | terminator = 13
UART_RING_BUFFER_T rb

Detailed Description

This example used to test RS485 functionality on UART1 of LPC1768.In this case, RS485 function on UART1 acts as SLave on RS485 bus.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file rs485_slave.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _UART
#define | _UART0
#define | _UART1
#define | _UART2
#define | _UART3
#define | CHECK_PARAM(expr)

Define Documentation

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define _UART1

Definition at line 55 of file lpc17xx_libcfg.h.

#define _UART2

Definition at line 56 of file lpc17xx_libcfg.h.

#define _UART3

Definition at line 57 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/uart_fullmodem_test.c File Reference

Data Structures | Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/uart_fullmodem_test.c File Reference

This example describes how to use UART1 full-modem function. More...

#include "lpc17xx_uart.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"

Go to the source code of this file.

Data Structures

struct | UART_RING_BUFFER_T
UART Ring buffer structure. More...

Defines

#define | MCB_LPC_1768
#define | UART_RING_BUFSIZE 256
#define | AUTO_RTS_CTS_USE 0
#define | __BUF_MASK (UART_RING_BUFSIZE-1)
#define | __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
#define | __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
#define | __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
#define | __BUF_RESET(bufidx) (bufidx=0)
#define | __BUF_INCR(bufidx) (bufidx=(bufidx+1)&__BUF_MASK)

Functions

void | UART1_IRQHandler (void)
UART1 interrupt handler sub-routine.
void | UART1_IntTransmit (void)
UART1 transmit function (ring buffer used)
void | UART1_IntReceive (void)
UART1 receive function (ring buffer used)
void | UART1_IntErr (uint8_t bLSErrType)
UART Line Status Error.
uint32_t | UARTReceive (LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
UART read function for interrupt mode (using ring buffers)
uint32_t | UARTSend (LPC_UART_TypeDef *UARTPort, uint8_t *txbuf, uint8_t buflen)
UART transmit function for interrupt mode (using ring buffers)
void | print_menu (void)
Print Welcome Screen Menu subroutine.
int | c_entry (void)
c_entry: Main UART-FULLMODEM program body
int | main (void)

Variables

uint8_t | menu1 [] = "Hello NXP Semiconductors \n\r"
uint8_t | menu2 [] = "UART1 - 9600bps \n\r"
uint8_t | menu3 [] = "UART demo terminated!\n"
UART_RING_BUFFER_T rb
__IO int32_t | RTS_State
__IO FlagStatus | TxIntStat

Detailed Description

This example describes how to use UART1 full-modem function.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file uart_fullmodem_test.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/adcuser.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/adcuser.c File Reference
#include "lpc_types.h"
#include "usb.h"
#include "audio.h"
#include "usbcfg.h"
#include "usbcore.h"
#include "adcuser.h"
#include "usbaudio.h"

Go to the source code of this file.

Functions

uint32_t | ADC_IF_GetRequest (void)
uint32_t | ADC_IF_SetRequest (void)
uint32_t | ADC_EP_GetRequest (void)
uint32_t | ADC_EP_SetRequest (void)

Variables

uint16_t | VolCur = 0x0100
const uint16_t | VolMin = 0x0000
const uint16_t | VolMax = 0x0100
const uint16_t | VolRes = 0x0004

Function Documentation

uint32_t ADC_EP_GetRequest ( void )

Definition at line 136 of file adcuser.c.

uint32_t ADC_EP_SetRequest ( void )

Definition at line 155 of file adcuser.c.

uint32_t ADC_IF_GetRequest ( void )

Definition at line 41 of file adcuser.c.

uint32_t ADC_IF_SetRequest ( void )

Definition at line 93 of file adcuser.c.

Variable Documentation

uint16_t VolCur = 0x0100

Definition at line 29 of file adcuser.c.

const uint16_t VolMax = 0x0100

Definition at line 31 of file adcuser.c.

const uint16_t VolMin = 0x0000

Definition at line 30 of file adcuser.c.

const uint16_t VolRes = 0x0004

Definition at line 32 of file adcuser.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/adcuser.h File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/adcuser.h File Reference

Go to the source code of this file.

Functions

uint32_t | ADC_IF_GetRequest (void)
uint32_t | ADC_IF_SetRequest (void)
uint32_t | ADC_EP_GetRequest (void)
uint32_t | ADC_EP_SetRequest (void)

Function Documentation

uint32_t ADC_EP_GetRequest ( void )

Definition at line 136 of file adcuser.c.

uint32_t ADC_EP_SetRequest ( void )

Definition at line 155 of file adcuser.c.

uint32_t ADC_IF_GetRequest ( void )

Definition at line 41 of file adcuser.c.

uint32_t ADC_IF_SetRequest ( void )

Definition at line 93 of file adcuser.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/audio.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/audio.h File Reference

Go to the source code of this file.

Defines

#define | AUDIO_SUBCLASS_UNDEFINED 0x00
#define | AUDIO_SUBCLASS_AUDIOCONTROL 0x01
#define | AUDIO_SUBCLASS_AUDIOSTREAMING 0x02
#define | AUDIO_SUBCLASS_MIDISTREAMING 0x03
#define | AUDIO_PROTOCOL_UNDEFINED 0x00
#define | AUDIO_UNDEFINED_DESCRIPTOR_TYPE 0x20
#define | AUDIO_DEVICE_DESCRIPTOR_TYPE 0x21
#define | AUDIO_CONFIGURATION_DESCRIPTOR_TYPE 0x22
#define | AUDIO_STRING_DESCRIPTOR_TYPE 0x23
#define | AUDIO_INTERFACE_DESCRIPTOR_TYPE 0x24
#define | AUDIO_ENDPOINT_DESCRIPTOR_TYPE 0x25
#define | AUDIO_CONTROL_UNDEFINED 0x00
#define | AUDIO_CONTROL_HEADER 0x01
#define | AUDIO_CONTROL_INPUT_TERMINAL 0x02
#define | AUDIO_CONTROL_OUTPUT_TERMINAL 0x03
#define | AUDIO_CONTROL_MIXER_UNIT 0x04
#define | AUDIO_CONTROL_SELECTOR_UNIT 0x05
#define | AUDIO_CONTROL_FEATURE_UNIT 0x06
#define | AUDIO_CONTROL_PROCESSING_UNIT 0x07
#define | AUDIO_CONTROL_EXTENSION_UNIT 0x08
#define | AUDIO_STREAMING_UNDEFINED 0x00
#define | AUDIO_STREAMING_GENERAL 0x01
#define | AUDIO_STREAMING_FORMAT_TYPE 0x02
#define | AUDIO_STREAMING_FORMAT_SPECIFIC 0x03
#define | AUDIO_ENDPOINT_UNDEFINED 0x00
#define | AUDIO_ENDPOINT_GENERAL 0x01
#define | AUDIO_CONTROL_INTERFACE_DESC_SZ(n) 0x08+n
#define | AUDIO_STREAMING_INTERFACE_DESC_SIZE 0x07
#define | AUDIO_INPUT_TERMINAL_DESC_SIZE 0x0C
#define | AUDIO_OUTPUT_TERMINAL_DESC_SIZE 0x09
#define | AUDIO_MIXER_UNIT_DESC_SZ(p, n) 0x0A+p+n
#define | AUDIO_SELECTOR_UNIT_DESC_SZ(p) 0x06+p
#define | AUDIO_FEATURE_UNIT_DESC_SZ(ch, n) 0x07+(ch+1)*n
#define | AUDIO_PROCESSING_UNIT_DESC_SZ(p, n, x) 0x0D+p+n+x
#define | AUDIO_EXTENSION_UNIT_DESC_SZ(p, n) 0x0D+p+n
#define | AUDIO_STANDARD_ENDPOINT_DESC_SIZE 0x09
#define | AUDIO_STREAMING_ENDPOINT_DESC_SIZE 0x07
#define | AUDIO_UNDEFINED_PROCESS 0x00
#define | AUDIO_UP_DOWN_MIX_PROCESS 0x01
#define | AUDIO_DOLBY_PROLOGIC_PROCESS 0x02
#define | AUDIO_3D_STEREO_PROCESS 0x03
#define | AUDIO_REVERBERATION_PROCESS 0x04
#define | AUDIO_CHORUS_PROCESS 0x05
#define | AUDIO_DYN_RANGE_COMP_PROCESS 0x06
#define | AUDIO_REQUEST_UNDEFINED 0x00
#define | AUDIO_REQUEST_SET_CUR 0x01
#define | AUDIO_REQUEST_GET_CUR 0x81
#define | AUDIO_REQUEST_SET_MIN 0x02
#define | AUDIO_REQUEST_GET_MIN 0x82
#define | AUDIO_REQUEST_SET_MAX 0x03
#define | AUDIO_REQUEST_GET_MAX 0x83
#define | AUDIO_REQUEST_SET_RES 0x04
#define | AUDIO_REQUEST_GET_RES 0x84
#define | AUDIO_REQUEST_SET_MEM 0x05
#define | AUDIO_REQUEST_GET_MEM 0x85
#define | AUDIO_REQUEST_GET_STAT 0xFF
#define | AUDIO_CONTROL_UNDEFINED 0x00
#define | AUDIO_COPY_PROTECT_CONTROL 0x01
#define | AUDIO_MUTE_CONTROL 0x01
#define | AUDIO_VOLUME_CONTROL 0x02
#define | AUDIO_BASS_CONTROL 0x03
#define | AUDIO_MID_CONTROL 0x04
#define | AUDIO_TREBLE_CONTROL 0x05
#define | AUDIO_GRAPHIC_EQUALIZER_CONTROL 0x06
#define | AUDIO_AUTOMATIC_GAIN_CONTROL 0x07
#define | AUDIO_DELAY_CONTROL 0x08
#define | AUDIO_BASS_BOOST_CONTROL 0x09
#define | AUDIO_LOUDNESS_CONTROL 0x0A
#define | AUDIO_ENABLE_CONTROL 0x01
#define | AUDIO_MODE_SELECT_CONTROL 0x02
#define | AUDIO_SPACIOUSNESS_CONTROL 0x02
#define | AUDIO_REVERB_LEVEL_CONTROL 0x02
#define | AUDIO_REVERB_TIME_CONTROL 0x03
#define | AUDIO_REVERB_FEEDBACK_CONTROL 0x04
#define | AUDIO_CHORUS_LEVEL_CONTROL 0x02
#define | AUDIO_SHORUS_RATE_CONTROL 0x03
#define | AUDIO_CHORUS_DEPTH_CONTROL 0x04
#define | AUDIO_COMPRESSION_RATE_CONTROL 0x02
#define | AUDIO_MAX_AMPL_CONTROL 0x03
#define | AUDIO_THRESHOLD_CONTROL 0x04
#define | AUDIO_ATTACK_TIME_CONTROL 0x05
#define | AUDIO_RELEASE_TIME_CONTROL 0x06
#define | AUDIO_SAMPLING_FREQ_CONTROL 0x01
#define | AUDIO_PITCH_CONTROL 0x02
#define | AUDIO_MPEG_CONTROL_UNDEFINED 0x00
#define | AUDIO_MPEG_DUAL_CHANNEL_CONTROL 0x01
#define | AUDIO_MPEG_SECOND_STEREO_CONTROL 0x02
#define | AUDIO_MPEG_MULTILINGUAL_CONTROL 0x03
#define | AUDIO_MPEG_DYN_RANGE_CONTROL 0x04
#define | AUDIO_MPEG_SCALING_CONTROL 0x05
#define | AUDIO_MPEG_HILO_SCALING_CONTROL 0x06
#define | AUDIO_AC3_CONTROL_UNDEFINED 0x00
#define | AUDIO_AC3_MODE_CONTROL 0x01
#define | AUDIO_AC3_DYN_RANGE_CONTROL 0x02
#define | AUDIO_AC3_SCALING_CONTROL 0x03
#define | AUDIO_AC3_HILO_SCALING_CONTROL 0x04
#define | AUDIO_FORMAT_TYPE_UNDEFINED 0x00
#define | AUDIO_FORMAT_TYPE_I 0x01
#define | AUDIO_FORMAT_TYPE_II 0x02
#define | AUDIO_FORMAT_TYPE_III 0x03
#define | AUDIO_FORMAT_TYPE_I_DESC_SZ(n) 0x08+(n*3)
#define | AUDIO_FORMAT_TYPE_II_DESC_SZ(n) 0x09+(n*3)
#define | AUDIO_FORMAT_TYPE_III_DESC_SZ(n) 0x08+(n*3)
#define | AUDIO_FORMAT_MPEG_DESC_SIZE 0x09
#define | AUDIO_FORMAT_AC3_DESC_SIZE 0x0A
#define | AUDIO_FORMAT_TYPE_I_UNDEFINED 0x0000
#define | AUDIO_FORMAT_PCM 0x0001
#define | AUDIO_FORMAT_PCM8 0x0002
#define | AUDIO_FORMAT_IEEE_FLOAT 0x0003
#define | AUDIO_FORMAT_ALAW 0x0004
#define | AUDIO_FORMAT_MULAW 0x0005
#define | AUDIO_FORMAT_TYPE_II_UNDEFINED 0x1000
#define | AUDIO_FORMAT_MPEG 0x1001
#define | AUDIO_FORMAT_AC3 0x1002
#define | AUDIO_FORMAT_TYPE_III_UNDEFINED 0x2000
#define | AUDIO_FORMAT_IEC1937_AC3 0x2001
#define | AUDIO_FORMAT_IEC1937_MPEG1_L1 0x2002
#define | AUDIO_FORMAT_IEC1937_MPEG1_L2_3 0x2003
#define | AUDIO_FORMAT_IEC1937_MPEG2_NOEXT 0x2003
#define | AUDIO_FORMAT_IEC1937_MPEG2_EXT 0x2004
#define | AUDIO_FORMAT_IEC1937_MPEG2_L1_LS 0x2005
#define | AUDIO_FORMAT_IEC1937_MPEG2_L2_3 0x2006
#define | AUDIO_CHANNEL_M 0x0000
#define | AUDIO_CHANNEL_L 0x0001
#define | AUDIO_CHANNEL_R 0x0002
#define | AUDIO_CHANNEL_C 0x0004
#define | AUDIO_CHANNEL_LFE 0x0008
#define | AUDIO_CHANNEL_LS 0x0010
#define | AUDIO_CHANNEL_RS 0x0020
#define | AUDIO_CHANNEL_LC 0x0040
#define | AUDIO_CHANNEL_RC 0x0080
#define | AUDIO_CHANNEL_S 0x0100
#define | AUDIO_CHANNEL_SL 0x0200
#define | AUDIO_CHANNEL_SR 0x0400
#define | AUDIO_CHANNEL_T 0x0800
#define | AUDIO_CONTROL_MUTE 0x0001
#define | AUDIO_CONTROL_VOLUME 0x0002
#define | AUDIO_CONTROL_BASS 0x0004
#define | AUDIO_CONTROL_MID 0x0008
#define | AUDIO_CONTROL_TREBLE 0x0010
#define | AUDIO_CONTROL_GRAPHIC_EQUALIZER 0x0020
#define | AUDIO_CONTROL_AUTOMATIC_GAIN 0x0040
#define | AUDIO_CONTROL_DEALY 0x0080
#define | AUDIO_CONTROL_BASS_BOOST 0x0100
#define | AUDIO_CONTROL_LOUDNESS 0x0200
#define | AUDIO_CONTROL_ENABLE 0x0001
#define | AUDIO_CONTROL_MODE_SELECT 0x0002
#define | AUDIO_CONTROL_SPACIOUSNESS 0x0002
#define | AUDIO_CONTROL_REVERB_TYPE 0x0002
#define | AUDIO_CONTROL_REVERB_LEVEL 0x0004
#define | AUDIO_CONTROL_REVERB_TIME 0x0008
#define | AUDIO_CONTROL_REVERB_FEEDBACK 0x0010
#define | AUDIO_CONTROL_CHORUS_LEVEL 0x0002
#define | AUDIO_CONTROL_SHORUS_RATE 0x0004
#define | AUDIO_CONTROL_CHORUS_DEPTH 0x0008
#define | AUDIO_CONTROL_COMPRESSION_RATE 0x0002
#define | AUDIO_CONTROL_MAX_AMPL 0x0004
#define | AUDIO_CONTROL_THRESHOLD 0x0008
#define | AUDIO_CONTROL_ATTACK_TIME 0x0010
#define | AUDIO_CONTROL_RELEASE_TIME 0x0020
#define | AUDIO_CONTROL_SAMPLING_FREQ 0x01
#define | AUDIO_CONTROL_PITCH 0x02
#define | AUDIO_MAX_PACKETS_ONLY 0x80
#define | AUDIO_TERMINAL_USB_UNDEFINED 0x0100
#define | AUDIO_TERMINAL_USB_STREAMING 0x0101
#define | AUDIO_TERMINAL_USB_VENDOR_SPECIFIC 0x01FF
#define | AUDIO_TERMINAL_INPUT_UNDEFINED 0x0200
#define | AUDIO_TERMINAL_MICROPHONE 0x0201
#define | AUDIO_TERMINAL_DESKTOP_MICROPHONE 0x0202
#define | AUDIO_TERMINAL_PERSONAL_MICROPHONE 0x0203
#define | AUDIO_TERMINAL_OMNI_DIR_MICROPHONE 0x0204
#define | AUDIO_TERMINAL_MICROPHONE_ARRAY 0x0205
#define | AUDIO_TERMINAL_PROCESSING_MIC_ARRAY 0x0206
#define | AUDIO_TERMINAL_OUTPUT_UNDEFINED 0x0300
#define | AUDIO_TERMINAL_SPEAKER 0x0301
#define | AUDIO_TERMINAL_HEADPHONES 0x0302
#define | AUDIO_TERMINAL_HEAD_MOUNTED_AUDIO 0x0303
#define | AUDIO_TERMINAL_DESKTOP_SPEAKER 0x0304
#define | AUDIO_TERMINAL_ROOM_SPEAKER 0x0305
#define | AUDIO_TERMINAL_COMMUNICATION_SPEAKER 0x0306
#define | AUDIO_TERMINAL_LOW_FREQ_SPEAKER 0x0307
#define | AUDIO_TERMINAL_BIDIRECTIONAL_UNDEFINED 0x0400
#define | AUDIO_TERMINAL_HANDSET 0x0401
#define | AUDIO_TERMINAL_HEAD_MOUNTED_HANDSET 0x0402
#define | AUDIO_TERMINAL_SPEAKERPHONE 0x0403
#define | AUDIO_TERMINAL_SPEAKERPHONE_ECHOSUPRESS 0x0404
#define | AUDIO_TERMINAL_SPEAKERPHONE_ECHOCANCEL 0x0405
#define | AUDIO_TERMINAL_TELEPHONY_UNDEFINED 0x0500
#define | AUDIO_TERMINAL_PHONE_LINE 0x0501
#define | AUDIO_TERMINAL_TELEPHONE 0x0502
#define | AUDIO_TERMINAL_DOWN_LINE_PHONE 0x0503
#define | AUDIO_TERMINAL_EXTERNAL_UNDEFINED 0x0600
#define | AUDIO_TERMINAL_ANALOG_CONNECTOR 0x0601
#define | AUDIO_TERMINAL_DIGITAL_AUDIO_INTERFACE 0x0602
#define | AUDIO_TERMINAL_LINE_CONNECTOR 0x0603
#define | AUDIO_TERMINAL_LEGACY_AUDIO_CONNECTOR 0x0604
#define | AUDIO_TERMINAL_SPDIF_INTERFACE 0x0605
#define | AUDIO_TERMINAL_1394_DA_STREAM 0x0606
#define | AUDIO_TERMINAL_1394_DA_STREAM_TRACK 0x0607
#define | AUDIO_TERMINAL_EMBEDDED_UNDEFINED 0x0700
#define | AUDIO_TERMINAL_CALIBRATION_NOISE 0x0701
#define | AUDIO_TERMINAL_EQUALIZATION_NOISE 0x0702
#define | AUDIO_TERMINAL_CD_PLAYER 0x0703
#define | AUDIO_TERMINAL_DAT 0x0704
#define | AUDIO_TERMINAL_DCC 0x0705
#define | AUDIO_TERMINAL_MINI_DISK 0x0706
#define | AUDIO_TERMINAL_ANALOG_TAPE 0x0707
#define | AUDIO_TERMINAL_PHONOGRAPH 0x0708
#define | AUDIO_TERMINAL_VCR_AUDIO 0x0709
#define | AUDIO_TERMINAL_VIDEO_DISC_AUDIO 0x070A
#define | AUDIO_TERMINAL_DVD_AUDIO 0x070B
#define | AUDIO_TERMINAL_TV_TUNER_AUDIO 0x070C
#define | AUDIO_TERMINAL_SATELLITE_RECEIVER_AUDIO 0x070D
#define | AUDIO_TERMINAL_CABLE_TUNER_AUDIO 0x070E
#define | AUDIO_TERMINAL_DSS_AUDIO 0x070F
#define | AUDIO_TERMINAL_RADIO_RECEIVER 0x0710
#define | AUDIO_TERMINAL_RADIO_TRANSMITTER 0x0711
#define | AUDIO_TERMINAL_MULTI_TRACK_RECORDER 0x0712
#define | AUDIO_TERMINAL_SYNTHESIZER 0x0713

Define Documentation

#define AUDIO_3D_STEREO_PROCESS 0x03

Definition at line 82 of file audio.h.

#define AUDIO_AC3_CONTROL_UNDEFINED 0x00

Definition at line 177 of file audio.h.

#define AUDIO_AC3_DYN_RANGE_CONTROL 0x02

Definition at line 179 of file audio.h.

#define AUDIO_AC3_HILO_SCALING_CONTROL 0x04

Definition at line 181 of file audio.h.

#define AUDIO_AC3_MODE_CONTROL 0x01

Definition at line 178 of file audio.h.

#define AUDIO_AC3_SCALING_CONTROL 0x03

Definition at line 180 of file audio.h.

#define AUDIO_ATTACK_TIME_CONTROL 0x05

Definition at line 154 of file audio.h.

#define AUDIO_AUTOMATIC_GAIN_CONTROL 0x07

Definition at line 116 of file audio.h.

#define AUDIO_BASS_BOOST_CONTROL 0x09

Definition at line 118 of file audio.h.

#define AUDIO_BASS_CONTROL 0x03

Definition at line 112 of file audio.h.

#define AUDIO_CHANNEL_C 0x0004

Definition at line 229 of file audio.h.

#define AUDIO_CHANNEL_L 0x0001

Definition at line 227 of file audio.h.

#define AUDIO_CHANNEL_LC 0x0040

Definition at line 233 of file audio.h.

#define AUDIO_CHANNEL_LFE 0x0008

Definition at line 230 of file audio.h.

#define AUDIO_CHANNEL_LS 0x0010

Definition at line 231 of file audio.h.

#define AUDIO_CHANNEL_M 0x0000

Definition at line 226 of file audio.h.

#define AUDIO_CHANNEL_R 0x0002

Definition at line 228 of file audio.h.

#define AUDIO_CHANNEL_RC 0x0080

Definition at line 234 of file audio.h.

#define AUDIO_CHANNEL_RS 0x0020

Definition at line 232 of file audio.h.

#define AUDIO_CHANNEL_S 0x0100

Definition at line 235 of file audio.h.

#define AUDIO_CHANNEL_SL 0x0200

Definition at line 236 of file audio.h.

#define AUDIO_CHANNEL_SR 0x0400

Definition at line 237 of file audio.h.

#define AUDIO_CHANNEL_T 0x0800

Definition at line 238 of file audio.h.

#define AUDIO_CHORUS_DEPTH_CONTROL 0x04

Definition at line 147 of file audio.h.

#define AUDIO_CHORUS_LEVEL_CONTROL 0x02

Definition at line 145 of file audio.h.

#define AUDIO_CHORUS_PROCESS 0x05

Definition at line 84 of file audio.h.

#define AUDIO_COMPRESSION_RATE_CONTROL 0x02

Definition at line 151 of file audio.h.

#define AUDIO_CONFIGURATION_DESCRIPTOR_TYPE 0x22

Definition at line 36 of file audio.h.

#define AUDIO_CONTROL_ATTACK_TIME 0x0010

Definition at line 287 of file audio.h.

#define AUDIO_CONTROL_AUTOMATIC_GAIN 0x0040

Definition at line 248 of file audio.h.

#define AUDIO_CONTROL_BASS 0x0004

Definition at line 244 of file audio.h.

#define AUDIO_CONTROL_BASS_BOOST 0x0100

Definition at line 250 of file audio.h.

#define AUDIO_CONTROL_CHORUS_DEPTH 0x0008

Definition at line 280 of file audio.h.

#define AUDIO_CONTROL_CHORUS_LEVEL 0x0002

Definition at line 278 of file audio.h.

#define AUDIO_CONTROL_COMPRESSION_RATE 0x0002

Definition at line 284 of file audio.h.

#define AUDIO_CONTROL_DEALY 0x0080

Definition at line 249 of file audio.h.

#define AUDIO_CONTROL_ENABLE 0x0001

Definition at line 254 of file audio.h.

#define AUDIO_CONTROL_EXTENSION_UNIT 0x08

Definition at line 51 of file audio.h.

#define AUDIO_CONTROL_FEATURE_UNIT 0x06

Definition at line 49 of file audio.h.

#define AUDIO_CONTROL_GRAPHIC_EQUALIZER 0x0020

Definition at line 247 of file audio.h.

#define AUDIO_CONTROL_HEADER 0x01

Definition at line 44 of file audio.h.

#define AUDIO_CONTROL_INPUT_TERMINAL 0x02

Definition at line 45 of file audio.h.

#define AUDIO_CONTROL_INTERFACE_DESC_SZ ( n ) 0x08+n

Definition at line 65 of file audio.h.

#define AUDIO_CONTROL_LOUDNESS 0x0200

Definition at line 251 of file audio.h.

#define AUDIO_CONTROL_MAX_AMPL 0x0004

Definition at line 285 of file audio.h.

#define AUDIO_CONTROL_MID 0x0008

Definition at line 245 of file audio.h.

#define AUDIO_CONTROL_MIXER_UNIT 0x04

Definition at line 47 of file audio.h.

#define AUDIO_CONTROL_MODE_SELECT 0x0002

Definition at line 255 of file audio.h.

#define AUDIO_CONTROL_MUTE 0x0001

Definition at line 242 of file audio.h.

#define AUDIO_CONTROL_OUTPUT_TERMINAL 0x03

Definition at line 46 of file audio.h.

#define AUDIO_CONTROL_PITCH 0x02

Definition at line 295 of file audio.h.

#define AUDIO_CONTROL_PROCESSING_UNIT 0x07

Definition at line 50 of file audio.h.

#define AUDIO_CONTROL_RELEASE_TIME 0x0020

Definition at line 288 of file audio.h.

#define AUDIO_CONTROL_REVERB_FEEDBACK 0x0010

Definition at line 274 of file audio.h.

#define AUDIO_CONTROL_REVERB_LEVEL 0x0004

Definition at line 272 of file audio.h.

#define AUDIO_CONTROL_REVERB_TIME 0x0008

Definition at line 273 of file audio.h.

#define AUDIO_CONTROL_REVERB_TYPE 0x0002

Definition at line 271 of file audio.h.

#define AUDIO_CONTROL_SAMPLING_FREQ 0x01

Definition at line 294 of file audio.h.

#define AUDIO_CONTROL_SELECTOR_UNIT 0x05

Definition at line 48 of file audio.h.

#define AUDIO_CONTROL_SHORUS_RATE 0x0004

Definition at line 279 of file audio.h.

#define AUDIO_CONTROL_SPACIOUSNESS 0x0002

Definition at line 267 of file audio.h.

#define AUDIO_CONTROL_THRESHOLD 0x0008

Definition at line 286 of file audio.h.

#define AUDIO_CONTROL_TREBLE 0x0010

Definition at line 246 of file audio.h.

#define AUDIO_CONTROL_UNDEFINED 0x00

Definition at line 104 of file audio.h.

#define AUDIO_CONTROL_UNDEFINED 0x00

Definition at line 104 of file audio.h.

#define AUDIO_CONTROL_VOLUME 0x0002

Definition at line 243 of file audio.h.

#define AUDIO_COPY_PROTECT_CONTROL 0x01

Definition at line 107 of file audio.h.

#define AUDIO_DELAY_CONTROL 0x08

Definition at line 117 of file audio.h.

#define AUDIO_DEVICE_DESCRIPTOR_TYPE 0x21

Definition at line 35 of file audio.h.

#define AUDIO_DOLBY_PROLOGIC_PROCESS 0x02

Definition at line 81 of file audio.h.

#define AUDIO_DYN_RANGE_COMP_PROCESS 0x06

Definition at line 85 of file audio.h.

#define AUDIO_ENABLE_CONTROL 0x01

Definition at line 122 of file audio.h.

#define AUDIO_ENDPOINT_DESCRIPTOR_TYPE 0x25

Definition at line 39 of file audio.h.

#define AUDIO_ENDPOINT_GENERAL 0x01

Definition at line 61 of file audio.h.

#define AUDIO_ENDPOINT_UNDEFINED 0x00

Definition at line 60 of file audio.h.

#define AUDIO_EXTENSION_UNIT_DESC_SZ | ( | p,
 |  | n
 | ) | 0x0D+p+n

Definition at line 73 of file audio.h.

#define AUDIO_FEATURE_UNIT_DESC_SZ | ( | ch,
 |  | n
 | ) | 0x07+(ch+1)*n

Definition at line 71 of file audio.h.

#define AUDIO_FORMAT_AC3 0x1002

Definition at line 212 of file audio.h.

#define AUDIO_FORMAT_AC3_DESC_SIZE 0x0A

Definition at line 196 of file audio.h.

#define AUDIO_FORMAT_ALAW 0x0004

Definition at line 206 of file audio.h.

#define AUDIO_FORMAT_IEC1937_AC3 0x2001

Definition at line 216 of file audio.h.

#define AUDIO_FORMAT_IEC1937_MPEG1_L1 0x2002

Definition at line 217 of file audio.h.

#define AUDIO_FORMAT_IEC1937_MPEG1_L2_3 0x2003

Definition at line 218 of file audio.h.

#define AUDIO_FORMAT_IEC1937_MPEG2_EXT 0x2004

Definition at line 220 of file audio.h.

#define AUDIO_FORMAT_IEC1937_MPEG2_L1_LS 0x2005

Definition at line 221 of file audio.h.

#define AUDIO_FORMAT_IEC1937_MPEG2_L2_3 0x2006

Definition at line 222 of file audio.h.

#define AUDIO_FORMAT_IEC1937_MPEG2_NOEXT 0x2003

Definition at line 219 of file audio.h.

#define AUDIO_FORMAT_IEEE_FLOAT 0x0003

Definition at line 205 of file audio.h.

#define AUDIO_FORMAT_MPEG 0x1001

Definition at line 211 of file audio.h.

#define AUDIO_FORMAT_MPEG_DESC_SIZE 0x09

Definition at line 195 of file audio.h.

#define AUDIO_FORMAT_MULAW 0x0005

Definition at line 207 of file audio.h.

#define AUDIO_FORMAT_PCM 0x0001

Definition at line 203 of file audio.h.

#define AUDIO_FORMAT_PCM8 0x0002

Definition at line 204 of file audio.h.

#define AUDIO_FORMAT_TYPE_I 0x01

Definition at line 186 of file audio.h.

#define AUDIO_FORMAT_TYPE_I_DESC_SZ ( n ) 0x08+(n*3)

Definition at line 192 of file audio.h.

#define AUDIO_FORMAT_TYPE_I_UNDEFINED 0x0000

Definition at line 202 of file audio.h.

#define AUDIO_FORMAT_TYPE_II 0x02

Definition at line 187 of file audio.h.

#define AUDIO_FORMAT_TYPE_II_DESC_SZ ( n ) 0x09+(n*3)

Definition at line 193 of file audio.h.

#define AUDIO_FORMAT_TYPE_II_UNDEFINED 0x1000

Definition at line 210 of file audio.h.

#define AUDIO_FORMAT_TYPE_III 0x03

Definition at line 188 of file audio.h.

#define AUDIO_FORMAT_TYPE_III_DESC_SZ ( n ) 0x08+(n*3)

Definition at line 194 of file audio.h.

#define AUDIO_FORMAT_TYPE_III_UNDEFINED 0x2000

Definition at line 215 of file audio.h.

#define AUDIO_FORMAT_TYPE_UNDEFINED 0x00

Definition at line 185 of file audio.h.

#define AUDIO_GRAPHIC_EQUALIZER_CONTROL 0x06

Definition at line 115 of file audio.h.

#define AUDIO_INPUT_TERMINAL_DESC_SIZE 0x0C

Definition at line 67 of file audio.h.

#define AUDIO_INTERFACE_DESCRIPTOR_TYPE 0x24

Definition at line 38 of file audio.h.

#define AUDIO_LOUDNESS_CONTROL 0x0A

Definition at line 119 of file audio.h.

#define AUDIO_MAX_AMPL_CONTROL 0x03

Definition at line 152 of file audio.h.

#define AUDIO_MAX_PACKETS_ONLY 0x80

Definition at line 296 of file audio.h.

#define AUDIO_MID_CONTROL 0x04

Definition at line 113 of file audio.h.

#define AUDIO_MIXER_UNIT_DESC_SZ | ( | p,
 |  | n
 | ) | 0x0A+p+n

Definition at line 69 of file audio.h.

#define AUDIO_MODE_SELECT_CONTROL 0x02

Definition at line 123 of file audio.h.

#define AUDIO_MPEG_CONTROL_UNDEFINED 0x00

Definition at line 168 of file audio.h.

#define AUDIO_MPEG_DUAL_CHANNEL_CONTROL 0x01

Definition at line 169 of file audio.h.

#define AUDIO_MPEG_DYN_RANGE_CONTROL 0x04

Definition at line 172 of file audio.h.

#define AUDIO_MPEG_HILO_SCALING_CONTROL 0x06

Definition at line 174 of file audio.h.

#define AUDIO_MPEG_MULTILINGUAL_CONTROL 0x03

Definition at line 171 of file audio.h.

#define AUDIO_MPEG_SCALING_CONTROL 0x05

Definition at line 173 of file audio.h.

#define AUDIO_MPEG_SECOND_STEREO_CONTROL 0x02

Definition at line 170 of file audio.h.

#define AUDIO_MUTE_CONTROL 0x01

Definition at line 110 of file audio.h.

#define AUDIO_OUTPUT_TERMINAL_DESC_SIZE 0x09

Definition at line 68 of file audio.h.

#define AUDIO_PITCH_CONTROL 0x02

Definition at line 162 of file audio.h.

#define AUDIO_PROCESSING_UNIT_DESC_SZ | ( | p,
 |  | n,
 |  | x
 | ) | 0x0D+p+n+x

Definition at line 72 of file audio.h.

#define AUDIO_PROTOCOL_UNDEFINED 0x00

Definition at line 30 of file audio.h.

#define AUDIO_RELEASE_TIME_CONTROL 0x06

Definition at line 155 of file audio.h.

#define AUDIO_REQUEST_GET_CUR 0x81

Definition at line 91 of file audio.h.

#define AUDIO_REQUEST_GET_MAX 0x83

Definition at line 95 of file audio.h.

#define AUDIO_REQUEST_GET_MEM 0x85

Definition at line 99 of file audio.h.

#define AUDIO_REQUEST_GET_MIN 0x82

Definition at line 93 of file audio.h.

#define AUDIO_REQUEST_GET_RES 0x84

Definition at line 97 of file audio.h.

#define AUDIO_REQUEST_GET_STAT 0xFF

Definition at line 100 of file audio.h.

#define AUDIO_REQUEST_SET_CUR 0x01

Definition at line 90 of file audio.h.

#define AUDIO_REQUEST_SET_MAX 0x03

Definition at line 94 of file audio.h.

#define AUDIO_REQUEST_SET_MEM 0x05

Definition at line 98 of file audio.h.

#define AUDIO_REQUEST_SET_MIN 0x02

Definition at line 92 of file audio.h.

#define AUDIO_REQUEST_SET_RES 0x04

Definition at line 96 of file audio.h.

#define AUDIO_REQUEST_UNDEFINED 0x00

Definition at line 89 of file audio.h.

#define AUDIO_REVERB_FEEDBACK_CONTROL 0x04

Definition at line 141 of file audio.h.

#define AUDIO_REVERB_LEVEL_CONTROL 0x02

Definition at line 139 of file audio.h.

#define AUDIO_REVERB_TIME_CONTROL 0x03

Definition at line 140 of file audio.h.

#define AUDIO_REVERBERATION_PROCESS 0x04

Definition at line 83 of file audio.h.

#define AUDIO_SAMPLING_FREQ_CONTROL 0x01

Definition at line 161 of file audio.h.

#define AUDIO_SELECTOR_UNIT_DESC_SZ ( p ) 0x06+p

Definition at line 70 of file audio.h.

#define AUDIO_SHORUS_RATE_CONTROL 0x03

Definition at line 146 of file audio.h.

#define AUDIO_SPACIOUSNESS_CONTROL 0x02

Definition at line 135 of file audio.h.

#define AUDIO_STANDARD_ENDPOINT_DESC_SIZE 0x09

Definition at line 74 of file audio.h.

#define AUDIO_STREAMING_ENDPOINT_DESC_SIZE 0x07

Definition at line 75 of file audio.h.

#define AUDIO_STREAMING_FORMAT_SPECIFIC 0x03

Definition at line 57 of file audio.h.

#define AUDIO_STREAMING_FORMAT_TYPE 0x02

Definition at line 56 of file audio.h.

#define AUDIO_STREAMING_GENERAL 0x01

Definition at line 55 of file audio.h.

#define AUDIO_STREAMING_INTERFACE_DESC_SIZE 0x07

Definition at line 66 of file audio.h.

#define AUDIO_STREAMING_UNDEFINED 0x00

Definition at line 54 of file audio.h.

#define AUDIO_STRING_DESCRIPTOR_TYPE 0x23

Definition at line 37 of file audio.h.

#define AUDIO_SUBCLASS_AUDIOCONTROL 0x01

Definition at line 25 of file audio.h.

#define AUDIO_SUBCLASS_AUDIOSTREAMING 0x02

Definition at line 26 of file audio.h.

#define AUDIO_SUBCLASS_MIDISTREAMING 0x03

Definition at line 27 of file audio.h.

#define AUDIO_SUBCLASS_UNDEFINED 0x00

Definition at line 24 of file audio.h.

#define AUDIO_TERMINAL_1394_DA_STREAM 0x0606

Definition at line 346 of file audio.h.

#define AUDIO_TERMINAL_1394_DA_STREAM_TRACK 0x0607

Definition at line 347 of file audio.h.

#define AUDIO_TERMINAL_ANALOG_CONNECTOR 0x0601

Definition at line 341 of file audio.h.

#define AUDIO_TERMINAL_ANALOG_TAPE 0x0707

Definition at line 357 of file audio.h.

#define AUDIO_TERMINAL_BIDIRECTIONAL_UNDEFINED 0x0400

Definition at line 326 of file audio.h.

#define AUDIO_TERMINAL_CABLE_TUNER_AUDIO 0x070E

Definition at line 364 of file audio.h.

#define AUDIO_TERMINAL_CALIBRATION_NOISE 0x0701

Definition at line 351 of file audio.h.

#define AUDIO_TERMINAL_CD_PLAYER 0x0703

Definition at line 353 of file audio.h.

#define AUDIO_TERMINAL_COMMUNICATION_SPEAKER 0x0306

Definition at line 322 of file audio.h.

#define AUDIO_TERMINAL_DAT 0x0704

Definition at line 354 of file audio.h.

#define AUDIO_TERMINAL_DCC 0x0705

Definition at line 355 of file audio.h.

#define AUDIO_TERMINAL_DESKTOP_MICROPHONE 0x0202

Definition at line 309 of file audio.h.

#define AUDIO_TERMINAL_DESKTOP_SPEAKER 0x0304

Definition at line 320 of file audio.h.

#define AUDIO_TERMINAL_DIGITAL_AUDIO_INTERFACE 0x0602

Definition at line 342 of file audio.h.

#define AUDIO_TERMINAL_DOWN_LINE_PHONE 0x0503

Definition at line 337 of file audio.h.

#define AUDIO_TERMINAL_DSS_AUDIO 0x070F

Definition at line 365 of file audio.h.

#define AUDIO_TERMINAL_DVD_AUDIO 0x070B

Definition at line 361 of file audio.h.

#define AUDIO_TERMINAL_EMBEDDED_UNDEFINED 0x0700

Definition at line 350 of file audio.h.

#define AUDIO_TERMINAL_EQUALIZATION_NOISE 0x0702

Definition at line 352 of file audio.h.

#define AUDIO_TERMINAL_EXTERNAL_UNDEFINED 0x0600

Definition at line 340 of file audio.h.

#define AUDIO_TERMINAL_HANDSET 0x0401

Definition at line 327 of file audio.h.

#define AUDIO_TERMINAL_HEAD_MOUNTED_AUDIO 0x0303

Definition at line 319 of file audio.h.

#define AUDIO_TERMINAL_HEAD_MOUNTED_HANDSET 0x0402

Definition at line 328 of file audio.h.

#define AUDIO_TERMINAL_HEADPHONES 0x0302

Definition at line 318 of file audio.h.

#define AUDIO_TERMINAL_INPUT_UNDEFINED 0x0200

Definition at line 307 of file audio.h.

#define AUDIO_TERMINAL_LEGACY_AUDIO_CONNECTOR 0x0604

Definition at line 344 of file audio.h.

#define AUDIO_TERMINAL_LINE_CONNECTOR 0x0603

Definition at line 343 of file audio.h.

#define AUDIO_TERMINAL_LOW_FREQ_SPEAKER 0x0307

Definition at line 323 of file audio.h.

#define AUDIO_TERMINAL_MICROPHONE 0x0201

Definition at line 308 of file audio.h.

#define AUDIO_TERMINAL_MICROPHONE_ARRAY 0x0205

Definition at line 312 of file audio.h.

#define AUDIO_TERMINAL_MINI_DISK 0x0706

Definition at line 356 of file audio.h.

#define AUDIO_TERMINAL_MULTI_TRACK_RECORDER 0x0712

Definition at line 368 of file audio.h.

#define AUDIO_TERMINAL_OMNI_DIR_MICROPHONE 0x0204

Definition at line 311 of file audio.h.

#define AUDIO_TERMINAL_OUTPUT_UNDEFINED 0x0300

Definition at line 316 of file audio.h.

#define AUDIO_TERMINAL_PERSONAL_MICROPHONE 0x0203

Definition at line 310 of file audio.h.

#define AUDIO_TERMINAL_PHONE_LINE 0x0501

Definition at line 335 of file audio.h.

#define AUDIO_TERMINAL_PHONOGRAPH 0x0708

Definition at line 358 of file audio.h.

#define AUDIO_TERMINAL_PROCESSING_MIC_ARRAY 0x0206

Definition at line 313 of file audio.h.

#define AUDIO_TERMINAL_RADIO_RECEIVER 0x0710

Definition at line 366 of file audio.h.

#define AUDIO_TERMINAL_RADIO_TRANSMITTER 0x0711

Definition at line 367 of file audio.h.

#define AUDIO_TERMINAL_ROOM_SPEAKER 0x0305

Definition at line 321 of file audio.h.

#define AUDIO_TERMINAL_SATELLITE_RECEIVER_AUDIO 0x070D

Definition at line 363 of file audio.h.

#define AUDIO_TERMINAL_SPDIF_INTERFACE 0x0605

Definition at line 345 of file audio.h.

#define AUDIO_TERMINAL_SPEAKER 0x0301

Definition at line 317 of file audio.h.

#define AUDIO_TERMINAL_SPEAKERPHONE 0x0403

Definition at line 329 of file audio.h.

#define AUDIO_TERMINAL_SPEAKERPHONE_ECHOCANCEL 0x0405

Definition at line 331 of file audio.h.

#define AUDIO_TERMINAL_SPEAKERPHONE_ECHOSUPRESS 0x0404

Definition at line 330 of file audio.h.

#define AUDIO_TERMINAL_SYNTHESIZER 0x0713

Definition at line 369 of file audio.h.

#define AUDIO_TERMINAL_TELEPHONE 0x0502

Definition at line 336 of file audio.h.

#define AUDIO_TERMINAL_TELEPHONY_UNDEFINED 0x0500

Definition at line 334 of file audio.h.

#define AUDIO_TERMINAL_TV_TUNER_AUDIO 0x070C

Definition at line 362 of file audio.h.

#define AUDIO_TERMINAL_USB_STREAMING 0x0101

Definition at line 303 of file audio.h.

#define AUDIO_TERMINAL_USB_UNDEFINED 0x0100

Definition at line 302 of file audio.h.

#define AUDIO_TERMINAL_USB_VENDOR_SPECIFIC 0x01FF

Definition at line 304 of file audio.h.

#define AUDIO_TERMINAL_VCR_AUDIO 0x0709

Definition at line 359 of file audio.h.

#define AUDIO_TERMINAL_VIDEO_DISC_AUDIO 0x070A

Definition at line 360 of file audio.h.

#define AUDIO_THRESHOLD_CONTROL 0x04

Definition at line 153 of file audio.h.

#define AUDIO_TREBLE_CONTROL 0x05

Definition at line 114 of file audio.h.

#define AUDIO_UNDEFINED_DESCRIPTOR_TYPE 0x20

Definition at line 34 of file audio.h.

#define AUDIO_UNDEFINED_PROCESS 0x00

Definition at line 79 of file audio.h.

#define AUDIO_UP_DOWN_MIX_PROCESS 0x01

Definition at line 80 of file audio.h.

#define AUDIO_VOLUME_CONTROL 0x02

Definition at line 111 of file audio.h.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | CHECK_PARAM(expr)
#define _DBGFWK

Define Documentation

#define CHECK_PARAM ( expr )

#define _DBGFWK

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usb.h File Reference

Defines | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usb.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | REQUEST_HOST_TO_DEVICE 0
#define | REQUEST_DEVICE_TO_HOST 1
#define | REQUEST_STANDARD 0
#define | REQUEST_CLASS 1
#define | REQUEST_VENDOR 2
#define | REQUEST_RESERVED 3
#define | REQUEST_TO_DEVICE 0
#define | REQUEST_TO_INTERFACE 1
#define | REQUEST_TO_ENDPOINT 2
#define | REQUEST_TO_OTHER 3
#define | USB_REQUEST_GET_STATUS 0
#define | USB_REQUEST_CLEAR_FEATURE 1
#define | USB_REQUEST_SET_FEATURE 3
#define | USB_REQUEST_SET_ADDRESS 5
#define | USB_REQUEST_GET_DESCRIPTOR 6
#define | USB_REQUEST_SET_DESCRIPTOR 7
#define | USB_REQUEST_GET_CONFIGURATION 8
#define | USB_REQUEST_SET_CONFIGURATION 9
#define | USB_REQUEST_GET_INTERFACE 10
#define | USB_REQUEST_SET_INTERFACE 11
#define | USB_REQUEST_SYNC_FRAME 12
#define | USB_GETSTATUS_SELF_POWERED 0x01
#define | USB_GETSTATUS_REMOTE_WAKEUP 0x02
#define | USB_GETSTATUS_ENDPOINT_STALL 0x01
#define | USB_FEATURE_ENDPOINT_STALL 0
#define | USB_FEATURE_REMOTE_WAKEUP 1
#define | USB_DEVICE_DESCRIPTOR_TYPE 1
#define | USB_CONFIGURATION_DESCRIPTOR_TYPE 2
#define | USB_STRING_DESCRIPTOR_TYPE 3
#define | USB_INTERFACE_DESCRIPTOR_TYPE 4
#define | USB_ENDPOINT_DESCRIPTOR_TYPE 5
#define | USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE 6
#define | USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7
#define | USB_INTERFACE_POWER_DESCRIPTOR_TYPE 8
#define | USB_OTG_DESCRIPTOR_TYPE 9
#define | USB_DEBUG_DESCRIPTOR_TYPE 10
#define | USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE 11
#define | USB_DEVICE_CLASS_RESERVED 0x00
#define | USB_DEVICE_CLASS_AUDIO 0x01
#define | USB_DEVICE_CLASS_COMMUNICATIONS 0x02
#define | USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03
#define | USB_DEVICE_CLASS_MONITOR 0x04
#define | USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05
#define | USB_DEVICE_CLASS_POWER 0x06
#define | USB_DEVICE_CLASS_PRINTER 0x07
#define | USB_DEVICE_CLASS_STORAGE 0x08
#define | USB_DEVICE_CLASS_HUB 0x09
#define | USB_DEVICE_CLASS_MISCELLANEOUS 0xEF
#define | USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF
#define | USB_CONFIG_POWERED_MASK 0x40
#define | USB_CONFIG_BUS_POWERED 0x80
#define | USB_CONFIG_SELF_POWERED 0xC0
#define | USB_CONFIG_REMOTE_WAKEUP 0x20
#define | USB_CONFIG_POWER_MA(mA) ((mA)/2)
#define | USB_ENDPOINT_DIRECTION_MASK 0x80
#define | USB_ENDPOINT_OUT(addr) ((addr) | 0x00)
#define | USB_ENDPOINT_IN(addr) ((addr) | 0x80)
#define | USB_ENDPOINT_TYPE_MASK 0x03
#define | USB_ENDPOINT_TYPE_CONTROL 0x00
#define | USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01
#define | USB_ENDPOINT_TYPE_BULK 0x02
#define | USB_ENDPOINT_TYPE_INTERRUPT 0x03
#define | USB_ENDPOINT_SYNC_MASK 0x0C
#define | USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION 0x00
#define | USB_ENDPOINT_SYNC_ASYNCHRONOUS 0x04
#define | USB_ENDPOINT_SYNC_ADAPTIVE 0x08
#define | USB_ENDPOINT_SYNC_SYNCHRONOUS 0x0C
#define | USB_ENDPOINT_USAGE_MASK 0x30
#define | USB_ENDPOINT_USAGE_DATA 0x00
#define | USB_ENDPOINT_USAGE_FEEDBACK 0x10
#define | USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK 0x20
#define | USB_ENDPOINT_USAGE_RESERVED 0x30

Variables

uint16_t | W
uint8_t | L
uint8_t | H
WB
WORD_BYTE
uint8_t | Recipient
uint8_t | Type
uint8_t | Dir
BM
uint8_t | B
REQUEST_TYPE
REQUEST_TYPE bmRequestType
uint8_t | bRequest
WORD_BYTE wValue
WORD_BYTE wIndex
uint16_t | wLength
USB_SETUP_PACKET
uint8_t | bLength
uint8_t | bDescriptorType
uint16_t | bcdUSB
uint8_t | bDeviceClass
uint8_t | bDeviceSubClass
uint8_t | bDeviceProtocol
uint8_t | bMaxPacketSize0
uint16_t | idVendor
uint16_t | idProduct
uint16_t | bcdDevice
uint8_t | iManufacturer
uint8_t | iProduct
uint8_t | iSerialNumber
uint8_t | bNumConfigurations
USB_DEVICE_DESCRIPTOR
uint8_t | bReserved
USB_DEVICE_QUALIFIER_DESCRIPTOR
uint16_t | wTotalLength
uint8_t | bNumInterfaces
uint8_t | bConfigurationValue
uint8_t | iConfiguration
uint8_t | bmAttributes
uint8_t | bMaxPower
USB_CONFIGURATION_DESCRIPTOR
uint8_t | bInterfaceNumber
uint8_t | bAlternateSetting
uint8_t | bNumEndpoints
uint8_t | bInterfaceClass
uint8_t | bInterfaceSubClass
uint8_t | bInterfaceProtocol
uint8_t | iInterface
USB_INTERFACE_DESCRIPTOR
uint8_t | bEndpointAddress
uint16_t | wMaxPacketSize
uint8_t | bInterval
USB_ENDPOINT_DESCRIPTOR
uint16_t | bString
USB_STRING_DESCRIPTOR
USB_COMMON_DESCRIPTOR

Define Documentation

#define REQUEST_CLASS 1

Definition at line 61 of file usb.h.

#define REQUEST_DEVICE_TO_HOST 1

Definition at line 57 of file usb.h.

#define REQUEST_HOST_TO_DEVICE 0

Definition at line 56 of file usb.h.

#define REQUEST_RESERVED 3

Definition at line 63 of file usb.h.

#define REQUEST_STANDARD 0

Definition at line 60 of file usb.h.

#define REQUEST_TO_DEVICE 0

Definition at line 66 of file usb.h.

#define REQUEST_TO_ENDPOINT 2

Definition at line 68 of file usb.h.

#define REQUEST_TO_INTERFACE 1

Definition at line 67 of file usb.h.

#define REQUEST_TO_OTHER 3

Definition at line 69 of file usb.h.

#define REQUEST_VENDOR 2

Definition at line 62 of file usb.h.

#define USB_CONFIG_BUS_POWERED 0x80

Definition at line 172 of file usb.h.

#define USB_CONFIG_POWER_MA ( mA ) ((mA)/2)

Definition at line 177 of file usb.h.

#define USB_CONFIG_POWERED_MASK 0x40

Definition at line 171 of file usb.h.

#define USB_CONFIG_REMOTE_WAKEUP 0x20

Definition at line 174 of file usb.h.

#define USB_CONFIG_SELF_POWERED 0xC0

Definition at line 173 of file usb.h.

#define USB_CONFIGURATION_DESCRIPTOR_TYPE 2

Definition at line 145 of file usb.h.

#define USB_DEBUG_DESCRIPTOR_TYPE 10

Definition at line 153 of file usb.h.

#define USB_DEVICE_CLASS_AUDIO 0x01

Definition at line 158 of file usb.h.

#define USB_DEVICE_CLASS_COMMUNICATIONS 0x02

Definition at line 159 of file usb.h.

#define USB_DEVICE_CLASS_HUB 0x09

Definition at line 166 of file usb.h.

#define USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03

Definition at line 160 of file usb.h.

#define USB_DEVICE_CLASS_MISCELLANEOUS 0xEF

Definition at line 167 of file usb.h.

#define USB_DEVICE_CLASS_MONITOR 0x04

Definition at line 161 of file usb.h.

#define USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05

Definition at line 162 of file usb.h.

#define USB_DEVICE_CLASS_POWER 0x06

Definition at line 163 of file usb.h.

#define USB_DEVICE_CLASS_PRINTER 0x07

Definition at line 164 of file usb.h.

#define USB_DEVICE_CLASS_RESERVED 0x00

Definition at line 157 of file usb.h.

#define USB_DEVICE_CLASS_STORAGE 0x08

Definition at line 165 of file usb.h.

#define USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF

Definition at line 168 of file usb.h.

#define USB_DEVICE_DESCRIPTOR_TYPE 1

Definition at line 144 of file usb.h.

#define USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE 6

Definition at line 149 of file usb.h.

#define USB_ENDPOINT_DESCRIPTOR_TYPE 5

Definition at line 148 of file usb.h.

#define USB_ENDPOINT_DIRECTION_MASK 0x80

Definition at line 180 of file usb.h.

#define USB_ENDPOINT_IN ( addr ) ((addr) | 0x80)

Definition at line 182 of file usb.h.

#define USB_ENDPOINT_OUT ( addr ) ((addr) | 0x00)

Definition at line 181 of file usb.h.

#define USB_ENDPOINT_SYNC_ADAPTIVE 0x08

Definition at line 193 of file usb.h.

#define USB_ENDPOINT_SYNC_ASYNCHRONOUS 0x04

Definition at line 192 of file usb.h.

#define USB_ENDPOINT_SYNC_MASK 0x0C

Definition at line 190 of file usb.h.

#define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION 0x00

Definition at line 191 of file usb.h.

#define USB_ENDPOINT_SYNC_SYNCHRONOUS 0x0C

Definition at line 194 of file usb.h.

#define USB_ENDPOINT_TYPE_BULK 0x02

Definition at line 188 of file usb.h.

#define USB_ENDPOINT_TYPE_CONTROL 0x00

Definition at line 186 of file usb.h.

#define USB_ENDPOINT_TYPE_INTERRUPT 0x03

Definition at line 189 of file usb.h.

#define USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01

Definition at line 187 of file usb.h.

#define USB_ENDPOINT_TYPE_MASK 0x03

Definition at line 185 of file usb.h.

#define USB_ENDPOINT_USAGE_DATA 0x00

Definition at line 196 of file usb.h.

#define USB_ENDPOINT_USAGE_FEEDBACK 0x10

Definition at line 197 of file usb.h.

#define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK 0x20

Definition at line 198 of file usb.h.

#define USB_ENDPOINT_USAGE_MASK 0x30

Definition at line 195 of file usb.h.

#define USB_ENDPOINT_USAGE_RESERVED 0x30

Definition at line 199 of file usb.h.

#define USB_FEATURE_ENDPOINT_STALL 0

Definition at line 120 of file usb.h.

#define USB_FEATURE_REMOTE_WAKEUP 1

Definition at line 121 of file usb.h.

#define USB_GETSTATUS_ENDPOINT_STALL 0x01

Definition at line 117 of file usb.h.

#define USB_GETSTATUS_REMOTE_WAKEUP 0x02

Definition at line 116 of file usb.h.

#define USB_GETSTATUS_SELF_POWERED 0x01

Definition at line 115 of file usb.h.

#define USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE 11

Definition at line 154 of file usb.h.

#define USB_INTERFACE_DESCRIPTOR_TYPE 4

Definition at line 147 of file usb.h.

#define USB_INTERFACE_POWER_DESCRIPTOR_TYPE 8

Definition at line 151 of file usb.h.

#define USB_OTG_DESCRIPTOR_TYPE 9

Definition at line 152 of file usb.h.

#define USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7

Definition at line 150 of file usb.h.

#define USB_REQUEST_CLEAR_FEATURE 1

Definition at line 103 of file usb.h.

#define USB_REQUEST_GET_CONFIGURATION 8

Definition at line 108 of file usb.h.

#define USB_REQUEST_GET_DESCRIPTOR 6

Definition at line 106 of file usb.h.

#define USB_REQUEST_GET_INTERFACE 10

Definition at line 110 of file usb.h.

#define USB_REQUEST_GET_STATUS 0

Definition at line 102 of file usb.h.

#define USB_REQUEST_SET_ADDRESS 5

Definition at line 105 of file usb.h.

#define USB_REQUEST_SET_CONFIGURATION 9

Definition at line 109 of file usb.h.

#define USB_REQUEST_SET_DESCRIPTOR 7

Definition at line 107 of file usb.h.

#define USB_REQUEST_SET_FEATURE 3

Definition at line 104 of file usb.h.

#define USB_REQUEST_SET_INTERFACE 11

Definition at line 111 of file usb.h.

#define USB_REQUEST_SYNC_FRAME 12

Definition at line 112 of file usb.h.

#define USB_STRING_DESCRIPTOR_TYPE 3

Definition at line 146 of file usb.h.

Variable Documentation

uint8_t B

Definition at line 95 of file usb.h.

uint8_t bAlternateSetting

Definition at line 286 of file usb.h.

uint16_t bcdDevice

Definition at line 219 of file usb.h.

uint16_t bcdUSB

Definition at line 212 of file usb.h.

uint8_t bConfigurationValue

Definition at line 265 of file usb.h.

uint8_t bDescriptorType

Definition at line 211 of file usb.h.

uint8_t bDeviceClass

Definition at line 213 of file usb.h.

uint8_t bDeviceProtocol

Definition at line 215 of file usb.h.

uint8_t bDeviceSubClass

Definition at line 214 of file usb.h.

uint8_t bEndpointAddress

Definition at line 308 of file usb.h.

uint8_t bInterfaceClass

Definition at line 288 of file usb.h.

uint8_t bInterfaceNumber

Definition at line 285 of file usb.h.

uint8_t bInterfaceProtocol

Definition at line 290 of file usb.h.

uint8_t bInterfaceSubClass

Definition at line 289 of file usb.h.

uint8_t bInterval

Definition at line 311 of file usb.h.

uint8_t bLength

Definition at line 210 of file usb.h.

BM

Definition at line 91 of file usb.h.

uint8_t bmAttributes

Definition at line 267 of file usb.h.

uint8_t bMaxPacketSize0

Definition at line 216 of file usb.h.

uint8_t bMaxPower

Definition at line 268 of file usb.h.

REQUEST_TYPE bmRequestType

Definition at line 132 of file usb.h.

uint8_t bNumConfigurations

Definition at line 223 of file usb.h.

uint8_t bNumEndpoints

Definition at line 287 of file usb.h.

uint8_t bNumInterfaces

Definition at line 264 of file usb.h.

uint8_t bRequest

Definition at line 133 of file usb.h.

uint8_t bReserved

Definition at line 246 of file usb.h.

uint16_t bString

Definition at line 328 of file usb.h.

uint8_t Dir

Definition at line 90 of file usb.h.

uint8_t H

Definition at line 44 of file usb.h.

uint8_t iConfiguration

Definition at line 266 of file usb.h.

uint16_t idProduct

Definition at line 218 of file usb.h.

uint16_t idVendor

Definition at line 217 of file usb.h.

uint8_t iInterface

Definition at line 291 of file usb.h.

uint8_t iManufacturer

Definition at line 220 of file usb.h.

uint8_t iProduct

Definition at line 221 of file usb.h.

uint8_t iSerialNumber

Definition at line 222 of file usb.h.

uint8_t L

Definition at line 43 of file usb.h.

uint8_t Recipient

Definition at line 88 of file usb.h.

REQUEST_TYPE

Definition at line 96 of file usb.h.

uint8_t Type

Definition at line 89 of file usb.h.

USB_COMMON_DESCRIPTOR

Definition at line 345 of file usb.h.

USB_CONFIGURATION_DESCRIPTOR

Definition at line 269 of file usb.h.

USB_DEVICE_DESCRIPTOR

Definition at line 224 of file usb.h.

USB_DEVICE_QUALIFIER_DESCRIPTOR

Definition at line 247 of file usb.h.

USB_ENDPOINT_DESCRIPTOR

Definition at line 312 of file usb.h.

USB_INTERFACE_DESCRIPTOR

Definition at line 292 of file usb.h.

USB_SETUP_PACKET

Definition at line 137 of file usb.h.

USB_STRING_DESCRIPTOR

Definition at line 329 of file usb.h.

uint16_t W

Definition at line 34 of file usb.h.

WB

Definition at line 45 of file usb.h.

WORD_BYTE wIndex

Definition at line 135 of file usb.h.

uint16_t wLength

Definition at line 136 of file usb.h.

uint16_t wMaxPacketSize

Definition at line 310 of file usb.h.

WORD_BYTE

Definition at line 49 of file usb.h.

uint16_t wTotalLength

Definition at line 263 of file usb.h.

WORD_BYTE wValue

Definition at line 134 of file usb.h.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbaudio.h File Reference

Defines | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbaudio.h File Reference

Go to the source code of this file.

Defines

#define | DATA_FREQ 32000
#define | P_S 32
#define | P_C 1
#define | B_S (8*P_C*P_S)
#define | LEDMSK 0x000000FF

Variables

uint8_t | Mute
uint32_t | Volume
uint16_t | VolCur
uint32_t | InfoBuf [P_C]
short | DataBuf [B_S]
uint16_t | DataOut
uint16_t | DataIn
uint8_t | DataRun

Define Documentation

#define B_S (8*P_C*P_S)

Definition at line 25 of file usbaudio.h.

#define DATA_FREQ 32000

Definition at line 18 of file usbaudio.h.

#define LEDMSK 0x000000FF

Definition at line 31 of file usbaudio.h.

#define P_C 1

Definition at line 23 of file usbaudio.h.

#define P_S 32

Definition at line 19 of file usbaudio.h.

Variable Documentation

uint16_t VolCur

Definition at line 29 of file adcuser.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcfg.h File Reference

Go to the source code of this file.

Defines

#define | USB_POWER 0
#define | USB_IF_NUM 4
#define | USB_EP_NUM 32
#define | USB_MAX_PACKET0 64
#define | USB_DMA 0
#define | USB_DMA_EP 0x00000040
#define | USB_POWER_EVENT 0
#define | USB_RESET_EVENT 1
#define | USB_SUSPEND_EVENT 0
#define | USB_RESUME_EVENT 0
#define | USB_WAKEUP_EVENT 0
#define | USB_SOF_EVENT 1
#define | USB_ERROR_EVENT 0
#define | USB_EP_EVENT 0x0009
#define | USB_CONFIGURE_EVENT 0
#define | USB_INTERFACE_EVENT 0
#define | USB_FEATURE_EVENT 0
#define | USB_CLASS 1
#define | USB_HID 0
#define | USB_HID_IF_NUM 0
#define | USB_MSC 0
#define | USB_MSC_IF_NUM 0
#define | USB_AUDIO 1
#define | USB_ADC_CIF_NUM 0
#define | USB_ADC_SIF1_NUM 1
#define | USB_ADC_SIF2_NUM 2
#define | USB_CDC 0
#define | USB_CDC_CIF_NUM 0
#define | USB_CDC_DIF_NUM 1
#define | USB_CDC_BUFSIZE 64
#define | USB_VENDOR 0

Define Documentation

#define USB_ADC_CIF_NUM 0

Definition at line 165 of file usbcfg.h.

#define USB_ADC_SIF1_NUM 1

Definition at line 166 of file usbcfg.h.

#define USB_ADC_SIF2_NUM 2

Definition at line 167 of file usbcfg.h.

#define USB_AUDIO 1

Definition at line 164 of file usbcfg.h.

#define USB_CDC 0

Definition at line 168 of file usbcfg.h.

#define USB_CDC_BUFSIZE 64

Definition at line 171 of file usbcfg.h.

#define USB_CDC_CIF_NUM 0

Definition at line 169 of file usbcfg.h.

#define USB_CDC_DIF_NUM 1

Definition at line 170 of file usbcfg.h.

#define USB_CLASS 1

Definition at line 159 of file usbcfg.h.

#define USB_CONFIGURE_EVENT 0

Definition at line 131 of file usbcfg.h.

#define USB_DMA 0

Definition at line 82 of file usbcfg.h.

#define USB_DMA_EP 0x00000040

Definition at line 83 of file usbcfg.h.

#define USB_EP_EVENT 0x0009

Definition at line 130 of file usbcfg.h.

#define USB_EP_NUM 32

Definition at line 80 of file usbcfg.h.

#define USB_ERROR_EVENT 0

Definition at line 129 of file usbcfg.h.

#define USB_FEATURE_EVENT 0

Definition at line 133 of file usbcfg.h.

#define USB_HID 0

Definition at line 160 of file usbcfg.h.

#define USB_HID_IF_NUM 0

Definition at line 161 of file usbcfg.h.

#define USB_IF_NUM 4

Definition at line 79 of file usbcfg.h.

#define USB_INTERFACE_EVENT 0

Definition at line 132 of file usbcfg.h.

#define USB_MAX_PACKET0 64

Definition at line 81 of file usbcfg.h.

#define USB_MSC 0

Definition at line 162 of file usbcfg.h.

#define USB_MSC_IF_NUM 0

Definition at line 163 of file usbcfg.h.

#define USB_POWER 0

Definition at line 78 of file usbcfg.h.

#define USB_POWER_EVENT 0

Definition at line 123 of file usbcfg.h.

#define USB_RESET_EVENT 1

Definition at line 124 of file usbcfg.h.

#define USB_RESUME_EVENT 0

Definition at line 126 of file usbcfg.h.

#define USB_SOF_EVENT 1

Definition at line 128 of file usbcfg.h.

#define USB_SUSPEND_EVENT 0

Definition at line 125 of file usbcfg.h.

#define USB_VENDOR 0

Definition at line 178 of file usbcfg.h.

#define USB_WAKEUP_EVENT 0

Definition at line 127 of file usbcfg.h.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.c File Reference
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbdesc.h"
#include "usbuser.h"

Go to the source code of this file.

Functions

void | USB_ResetCore (void)
void | USB_SetupStage (void)
void | USB_DataInStage (void)
void | USB_DataOutStage (void)
void | USB_StatusInStage (void)
void | USB_StatusOutStage (void)
__inline uint32_t | USB_ReqGetStatus (void)
__inline uint32_t | USB_ReqSetClrFeature (uint32_t sc)
__inline uint32_t | USB_ReqSetAddress (void)
__inline uint32_t | USB_ReqGetDescriptor (void)
__inline uint32_t | USB_ReqGetConfiguration (void)
__inline uint32_t | USB_ReqSetConfiguration (void)
__inline uint32_t | USB_ReqGetInterface (void)
__inline uint32_t | USB_ReqSetInterface (void)
void | USB_EndPoint0 (uint32_t event)

Variables

uint16_t | USB_DeviceStatus
uint8_t | USB_DeviceAddress
uint8_t | USB_Configuration
uint32_t | USB_EndPointMask
uint32_t | USB_EndPointHalt
uint32_t | USB_EndPointStall
uint8_t | USB_NumInterfaces
uint8_t | USB_AltSetting [USB_IF_NUM]
uint8_t | EP0Buf [USB_MAX_PACKET0]
USB_EP_DATA EP0Data
USB_SETUP_PACKET SetupPacket

Function Documentation

void USB_DataInStage ( void )

Definition at line 127 of file usbcore.c.

void USB_DataOutStage ( void )

Definition at line 147 of file usbcore.c.

void USB_EndPoint0 ( uint32_t event )

Definition at line 600 of file usbcore.c.

__inline uint32_t USB_ReqGetConfiguration ( void )

Definition at line 387 of file usbcore.c.

__inline uint32_t USB_ReqGetDescriptor ( void )

Definition at line 304 of file usbcore.c.

__inline uint32_t USB_ReqGetInterface ( void )

Definition at line 504 of file usbcore.c.

__inline uint32_t USB_ReqGetStatus ( void )

Definition at line 184 of file usbcore.c.

__inline uint32_t USB_ReqSetAddress ( void )

Definition at line 285 of file usbcore.c.

__inline uint32_t USB_ReqSetClrFeature ( uint32_t sc )

Definition at line 223 of file usbcore.c.

__inline uint32_t USB_ReqSetConfiguration ( void )

Definition at line 406 of file usbcore.c.

__inline uint32_t USB_ReqSetInterface ( void )

Definition at line 527 of file usbcore.c.

void USB_ResetCore ( void )

Definition at line 99 of file usbcore.c.

void USB_SetupStage ( void )

Definition at line 116 of file usbcore.c.

void USB_StatusInStage ( void )

Definition at line 162 of file usbcore.c.

void USB_StatusOutStage ( void )

Definition at line 173 of file usbcore.c.

Variable Documentation

uint8_t EP0Buf[USB_MAX_PACKET0]

Definition at line 85 of file usbcore.c.

USB_EP_DATA EP0Data

Definition at line 88 of file usbcore.c.

USB_SETUP_PACKET SetupPacket

Definition at line 90 of file usbcore.c.

uint8_t USB_AltSetting[USB_IF_NUM]

Definition at line 83 of file usbcore.c.

uint8_t USB_Configuration

Definition at line 78 of file usbcore.c.

uint8_t USB_DeviceAddress

Definition at line 77 of file usbcore.c.

uint16_t USB_DeviceStatus

Definition at line 76 of file usbcore.c.

uint32_t USB_EndPointHalt

Definition at line 80 of file usbcore.c.

uint32_t USB_EndPointMask

Definition at line 79 of file usbcore.c.

uint32_t USB_EndPointStall

Definition at line 81 of file usbcore.c.

uint8_t USB_NumInterfaces

Definition at line 82 of file usbcore.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.h File Reference

Data Structures | Typedefs | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.h File Reference

Go to the source code of this file.

Data Structures

struct | _USB_EP_DATA

Typedefs

typedef struct _USB_EP_DATA | USB_EP_DATA

Functions

void | USB_ResetCore (void)

Variables

uint16_t | USB_DeviceStatus
uint8_t | USB_DeviceAddress
uint8_t | USB_Configuration
uint32_t | USB_EndPointMask
uint32_t | USB_EndPointHalt
uint32_t | USB_EndPointStall
uint8_t | USB_AltSetting [USB_IF_NUM]
uint8_t | EP0Buf [USB_MAX_PACKET0]
USB_EP_DATA EP0Data
USB_SETUP_PACKET SetupPacket

Typedef Documentation

typedef struct _USB_EP_DATA USB_EP_DATA

Function Documentation

void USB_ResetCore ( void )

Definition at line 99 of file usbcore.c.

Variable Documentation

uint8_t EP0Buf[USB_MAX_PACKET0]

Definition at line 85 of file usbcore.c.

USB_EP_DATA EP0Data

Definition at line 88 of file usbcore.c.

USB_SETUP_PACKET SetupPacket

Definition at line 90 of file usbcore.c.

uint8_t USB_AltSetting[USB_IF_NUM]

Definition at line 83 of file usbcore.c.

uint8_t USB_Configuration

Definition at line 78 of file usbcore.c.

uint8_t USB_DeviceAddress

Definition at line 77 of file usbcore.c.

uint16_t USB_DeviceStatus

Definition at line 76 of file usbcore.c.

uint32_t USB_EndPointHalt

Definition at line 80 of file usbcore.c.

uint32_t USB_EndPointMask

Definition at line 79 of file usbcore.c.

uint32_t USB_EndPointStall

Definition at line 81 of file usbcore.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdesc.c File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdesc.c File Reference
#include "lpc_types.h"
#include "usb.h"
#include "audio.h"
#include "usbcfg.h"
#include "usbdesc.h"

Go to the source code of this file.

Variables

const uint8_t | USB_DeviceDescriptor []
const uint8_t | USB_ConfigDescriptor []
const uint8_t | USB_StringDescriptor []

Variable Documentation

const uint8_t USB_ConfigDescriptor[]

Definition at line 50 of file usbdesc.c.

const uint8_t USB_DeviceDescriptor[]
Initial value:
 {
  USB_DEVICE_DESC_SIZE,
  USB_DEVICE_DESCRIPTOR_TYPE,
  WBVAL(0x0200),
  0x00,
  0x00,
  0x00,
  USB_MAX_PACKET0,
  WBVAL(0x1FC9),
  WBVAL(0x4002),
  WBVAL(0x0100),
  0x01,
  0x02,
  0x03,
  0x01
}

Definition at line 31 of file usbdesc.c.

const uint8_t USB_StringDescriptor[]

Definition at line 185 of file usbdesc.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdesc.h File Reference

Defines | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdesc.h File Reference

Go to the source code of this file.

Defines

#define | WBVAL(x) (x & 0xFF),((x >> 8) & 0xFF)
#define | B3VAL(x) (x & 0xFF),((x >> 8) & 0xFF),((x >> 16) & 0xFF)
#define | USB_DEVICE_DESC_SIZE (sizeof(USB_DEVICE_DESCRIPTOR))
#define | USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))
#define | USB_INTERFACE_DESC_SIZE (sizeof(USB_INTERFACE_DESCRIPTOR))
#define | USB_ENDPOINT_DESC_SIZE (sizeof(USB_ENDPOINT_DESCRIPTOR))

Variables

const uint8_t | USB_DeviceDescriptor []
const uint8_t | USB_ConfigDescriptor []
const uint8_t | USB_StringDescriptor []

Define Documentation

#define B3VAL ( x ) (x & 0xFF),((x >> 8) & 0xFF),((x >> 16) & 0xFF)

Definition at line 24 of file usbdesc.h.

#define USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))

Definition at line 27 of file usbdesc.h.

#define USB_DEVICE_DESC_SIZE (sizeof(USB_DEVICE_DESCRIPTOR))

Definition at line 26 of file usbdesc.h.

#define USB_ENDPOINT_DESC_SIZE (sizeof(USB_ENDPOINT_DESCRIPTOR))

Definition at line 29 of file usbdesc.h.

#define USB_INTERFACE_DESC_SIZE (sizeof(USB_INTERFACE_DESCRIPTOR))

Definition at line 28 of file usbdesc.h.

#define WBVAL ( x ) (x & 0xFF),((x >> 8) & 0xFF)

Definition at line 23 of file usbdesc.h.

Variable Documentation

const uint8_t USB_ConfigDescriptor[]

Definition at line 50 of file usbdesc.c.

const uint8_t USB_DeviceDescriptor[]

Definition at line 31 of file usbdesc.c.

const uint8_t USB_StringDescriptor[]

Definition at line 185 of file usbdesc.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdmain.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdmain.c File Reference
#include "LPC17xx.h"
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbaudio.h"

Go to the source code of this file.

Functions

void | get_potval (void)
void | TIMER0_IRQHandler (void)
int | main (void)

Variables

uint8_t | Mute
uint32_t | Volume
uint32_t | InfoBuf [P_C]
short | DataBuf [B_S]
uint16_t | DataOut
uint16_t | DataIn
uint8_t | DataRun
uint16_t | PotVal
uint32_t | VUM
uint32_t | Tick
Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.c File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.c File Reference
#include "LPC17xx.h"
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbreg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbuser.h"

Go to the source code of this file.

Defines

#define | EP_MSK_CTRL 0x0001
#define | EP_MSK_BULK 0xC924
#define | EP_MSK_INT 0x4492
#define | EP_MSK_ISO 0x1248

Functions

uint32_t | EPAdr (uint32_t EPNum)
void | WrCmd (uint32_t cmd)
void | WrCmdDat (uint32_t cmd, uint32_t val)
void | WrCmdEP (uint32_t EPNum, uint32_t cmd)
uint32_t | RdCmdDat (uint32_t cmd)
void | USB_Init (void)
void | USB_Connect (uint32_t con)
void | USB_Reset (void)
void | USB_Suspend (void)
void | USB_Resume (void)
void | USB_WakeUp (void)
void | USB_WakeUpCfg (uint32_t cfg)
void | USB_SetAddress (uint32_t adr)
void | USB_Configure (uint32_t cfg)
void | USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD)
void | USB_DirCtrlEP (uint32_t dir)
void | USB_EnableEP (uint32_t EPNum)
void | USB_DisableEP (uint32_t EPNum)
void | USB_ResetEP (uint32_t EPNum)
void | USB_SetStallEP (uint32_t EPNum)
void | USB_ClrStallEP (uint32_t EPNum)
void | USB_ClearEPBuf (uint32_t EPNum)
uint32_t | USB_ReadEP (uint32_t EPNum, uint8_t *pData)
uint32_t | USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt)
uint32_t | USB_GetFrame (void)
void | USB_IRQHandler (void)

Define Documentation

#define EP_MSK_BULK 0xC924

Definition at line 38 of file usbhw.c.

#define EP_MSK_CTRL 0x0001

Definition at line 37 of file usbhw.c.

#define EP_MSK_INT 0x4492

Definition at line 39 of file usbhw.c.

#define EP_MSK_ISO 0x1248

Definition at line 40 of file usbhw.c.

Function Documentation

uint32_t EPAdr ( uint32_t EPNum )

Definition at line 66 of file usbhw.c.

uint32_t RdCmdDat ( uint32_t cmd )

Definition at line 133 of file usbhw.c.

void USB_ClearEPBuf ( uint32_t EPNum )

Definition at line 403 of file usbhw.c.

void USB_ClrStallEP ( uint32_t EPNum )

Definition at line 390 of file usbhw.c.

void USB_ConfigEP ( USB_ENDPOINT_DESCRIPTOR * pEPD )

Definition at line 307 of file usbhw.c.

void USB_Configure ( uint32_t cfg )

Definition at line 291 of file usbhw.c.

void USB_Connect ( uint32_t con )

Definition at line 178 of file usbhw.c.

void USB_DirCtrlEP ( uint32_t dir )

Definition at line 325 of file usbhw.c.

void USB_DisableEP ( uint32_t EPNum )

Definition at line 351 of file usbhw.c.

void USB_EnableEP ( uint32_t EPNum )

Definition at line 338 of file usbhw.c.

uint32_t USB_GetFrame ( void )

Definition at line 647 of file usbhw.c.

void USB_Init ( void )

Definition at line 148 of file usbhw.c.

void USB_IRQHandler ( void )

Definition at line 662 of file usbhw.c.

uint32_t USB_ReadEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData
 | ) |  |

Definition at line 417 of file usbhw.c.

void USB_Reset ( void )

Definition at line 189 of file usbhw.c.

void USB_ResetEP ( uint32_t EPNum )

Definition at line 364 of file usbhw.c.

void USB_Resume ( void )

Definition at line 243 of file usbhw.c.

void USB_SetAddress ( uint32_t adr )

Definition at line 279 of file usbhw.c.

void USB_SetStallEP ( uint32_t EPNum )

Definition at line 377 of file usbhw.c.

void USB_Suspend ( void )

Definition at line 232 of file usbhw.c.

void USB_WakeUp ( void )

Definition at line 254 of file usbhw.c.

void USB_WakeUpCfg ( uint32_t cfg )

Definition at line 268 of file usbhw.c.

uint32_t USB_WriteEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData,
 |  | uint32_t | cnt
 | ) |  |

Definition at line 450 of file usbhw.c.

void WrCmd ( uint32_t cmd )

Definition at line 83 of file usbhw.c.

void WrCmdDat | ( | uint32_t | cmd,
 |  | uint32_t | val
 | ) |  |

Definition at line 98 of file usbhw.c.

void WrCmdEP | ( | uint32_t | EPNum,
 |  | uint32_t | cmd
 | ) |  |

Definition at line 116 of file usbhw.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.h File Reference

Data Structures | Defines | Typedefs | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.h File Reference

Go to the source code of this file.

Data Structures

struct | _USB_DMA_DESCRIPTOR

Defines

#define | USB_RAM_ADR 0x20080000
#define | USB_RAM_SZ 0x00004000
#define | DD_NISO_CNT 16
#define | DD_ISO_CNT 8
#define | DD_NISO_SZ (DD_NISO_CNT * 16)
#define | DD_ISO_SZ (DD_ISO_CNT * 20)
#define | DD_NISO_ADR (USB_RAM_ADR + 128)
#define | DD_ISO_ADR (DD_NISO_ADR + DD_NISO_SZ)
#define | DD_SZ (128 + DD_NISO_SZ + DD_ISO_SZ)
#define | DMA_BUF_ADR (USB_RAM_ADR + DD_SZ)
#define | DMA_BUF_SZ (USB_RAM_SZ - DD_SZ)
#define | USB_ERR_PID 0x0001
#define | USB_ERR_UEPKT 0x0002
#define | USB_ERR_DCRC 0x0004
#define | USB_ERR_TIMOUT 0x0008
#define | USB_ERR_EOP 0x0010
#define | USB_ERR_B_OVRN 0x0020
#define | USB_ERR_BTSTF 0x0040
#define | USB_ERR_TGL 0x0080
#define | USB_DMA_INVALID 0x0000
#define | USB_DMA_IDLE 0x0001
#define | USB_DMA_BUSY 0x0002
#define | USB_DMA_DONE 0x0003
#define | USB_DMA_OVER_RUN 0x0004
#define | USB_DMA_UNDER_RUN 0x0005
#define | USB_DMA_ERROR 0x0006
#define | USB_DMA_UNKNOWN 0xFFFF

Typedefs

typedef struct _USB_DMA_DESCRIPTOR | USB_DMA_DESCRIPTOR

Functions

void | USB_Init (void)
void | USB_Connect (uint32_t con)
void | USB_Reset (void)
void | USB_Suspend (void)
void | USB_Resume (void)
void | USB_WakeUp (void)
void | USB_WakeUpCfg (uint32_t cfg)
void | USB_SetAddress (uint32_t adr)
void | USB_Configure (uint32_t cfg)
void | USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD)
void | USB_DirCtrlEP (uint32_t dir)
void | USB_EnableEP (uint32_t EPNum)
void | USB_DisableEP (uint32_t EPNum)
void | USB_ResetEP (uint32_t EPNum)
void | USB_SetStallEP (uint32_t EPNum)
void | USB_ClrStallEP (uint32_t EPNum)
void | USB_ClearEPBuf (uint32_t EPNum)
uint32_t | USB_ReadEP (uint32_t EPNum, uint8_t *pData)
uint32_t | USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt)
uint32_t | USB_DMA_Setup (uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD)
void | USB_DMA_Enable (uint32_t EPNum)
void | USB_DMA_Disable (uint32_t EPNum)
uint32_t | USB_DMA_Status (uint32_t EPNum)
uint32_t | USB_DMA_BufAdr (uint32_t EPNum)
uint32_t | USB_DMA_BufCnt (uint32_t EPNum)
uint32_t | USB_GetFrame (void)
void | USB_IRQHandler (void)

Define Documentation

#define DD_ISO_ADR (DD_NISO_ADR + DD_NISO_SZ)

Definition at line 37 of file usbhw.h.

#define DD_ISO_CNT 8

Definition at line 33 of file usbhw.h.

#define DD_ISO_SZ (DD_ISO_CNT * 20)

Definition at line 35 of file usbhw.h.

#define DD_NISO_ADR (USB_RAM_ADR + 128)

Definition at line 36 of file usbhw.h.

#define DD_NISO_CNT 16

Definition at line 32 of file usbhw.h.

#define DD_NISO_SZ (DD_NISO_CNT * 16)

Definition at line 34 of file usbhw.h.

#define DD_SZ (128 + DD_NISO_SZ + DD_ISO_SZ)

Definition at line 38 of file usbhw.h.

#define DMA_BUF_ADR (USB_RAM_ADR + DD_SZ)

Definition at line 41 of file usbhw.h.

#define DMA_BUF_SZ (USB_RAM_SZ - DD_SZ)

Definition at line 42 of file usbhw.h.

#define USB_DMA_BUSY 0x0002

Definition at line 57 of file usbhw.h.

#define USB_DMA_DONE 0x0003

Definition at line 58 of file usbhw.h.

#define USB_DMA_ERROR 0x0006

Definition at line 61 of file usbhw.h.

#define USB_DMA_IDLE 0x0001

Definition at line 56 of file usbhw.h.

#define USB_DMA_INVALID 0x0000

Definition at line 55 of file usbhw.h.

#define USB_DMA_OVER_RUN 0x0004

Definition at line 59 of file usbhw.h.

#define USB_DMA_UNDER_RUN 0x0005

Definition at line 60 of file usbhw.h.

#define USB_DMA_UNKNOWN 0xFFFF

Definition at line 62 of file usbhw.h.

#define USB_ERR_B_OVRN 0x0020

Definition at line 50 of file usbhw.h.

#define USB_ERR_BTSTF 0x0040

Definition at line 51 of file usbhw.h.

#define USB_ERR_DCRC 0x0004

Definition at line 47 of file usbhw.h.

#define USB_ERR_EOP 0x0010

Definition at line 49 of file usbhw.h.

#define USB_ERR_PID 0x0001

Definition at line 45 of file usbhw.h.

#define USB_ERR_TGL 0x0080

Definition at line 52 of file usbhw.h.

#define USB_ERR_TIMOUT 0x0008

Definition at line 48 of file usbhw.h.

#define USB_ERR_UEPKT 0x0002

Definition at line 46 of file usbhw.h.

#define USB_RAM_ADR 0x20080000

Definition at line 28 of file usbhw.h.

#define USB_RAM_SZ 0x00004000

Definition at line 29 of file usbhw.h.

Typedef Documentation

typedef struct _USB_DMA_DESCRIPTOR USB_DMA_DESCRIPTOR

Function Documentation

void USB_ClearEPBuf ( uint32_t EPNum )

Definition at line 403 of file usbhw.c.

void USB_ClrStallEP ( uint32_t EPNum )

Definition at line 390 of file usbhw.c.

void USB_ConfigEP ( USB_ENDPOINT_DESCRIPTOR * pEPD )

Definition at line 307 of file usbhw.c.

void USB_Configure ( uint32_t cfg )

Definition at line 291 of file usbhw.c.

void USB_Connect ( uint32_t con )

Definition at line 178 of file usbhw.c.

void USB_DirCtrlEP ( uint32_t dir )

Definition at line 325 of file usbhw.c.

void USB_DisableEP ( uint32_t EPNum )

Definition at line 351 of file usbhw.c.

uint32_t USB_DMA_BufAdr ( uint32_t EPNum )
uint32_t USB_DMA_BufCnt ( uint32_t EPNum )
void USB_DMA_Disable ( uint32_t EPNum )
void USB_DMA_Enable ( uint32_t EPNum )
uint32_t USB_DMA_Setup | ( | uint32_t | EPNum,
 |  | USB_DMA_DESCRIPTOR * | pDD
 | ) |  |
uint32_t USB_DMA_Status ( uint32_t EPNum )
void USB_EnableEP ( uint32_t EPNum )

Definition at line 338 of file usbhw.c.

uint32_t USB_GetFrame ( void )

Definition at line 647 of file usbhw.c.

void USB_Init ( void )

Definition at line 148 of file usbhw.c.

void USB_IRQHandler ( void )

Definition at line 662 of file usbhw.c.

uint32_t USB_ReadEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData
 | ) |  |

Definition at line 417 of file usbhw.c.

void USB_Reset ( void )

Definition at line 189 of file usbhw.c.

void USB_ResetEP ( uint32_t EPNum )

Definition at line 364 of file usbhw.c.

void USB_Resume ( void )

Definition at line 243 of file usbhw.c.

void USB_SetAddress ( uint32_t adr )

Definition at line 279 of file usbhw.c.

void USB_SetStallEP ( uint32_t EPNum )

Definition at line 377 of file usbhw.c.

void USB_Suspend ( void )

Definition at line 232 of file usbhw.c.

void USB_WakeUp ( void )

Definition at line 254 of file usbhw.c.

void USB_WakeUpCfg ( uint32_t cfg )

Definition at line 268 of file usbhw.c.

uint32_t USB_WriteEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData,
 |  | uint32_t | cnt
 | ) |  |

Definition at line 450 of file usbhw.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbreg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbreg.h File Reference

Go to the source code of this file.

Defines

#define | FRAME_INT 0x00000001
#define | EP_FAST_INT 0x00000002
#define | EP_SLOW_INT 0x00000004
#define | DEV_STAT_INT 0x00000008
#define | CCEMTY_INT 0x00000010
#define | CDFULL_INT 0x00000020
#define | RxENDPKT_INT 0x00000040
#define | TxENDPKT_INT 0x00000080
#define | EP_RLZED_INT 0x00000100
#define | ERR_INT 0x00000200
#define | PKT_LNGTH_MASK 0x000003FF
#define | PKT_DV 0x00000400
#define | PKT_RDY 0x00000800
#define | CTRL_RD_EN 0x00000001
#define | CTRL_WR_EN 0x00000002
#define | CMD_SET_ADDR 0x00D00500
#define | CMD_CFG_DEV 0x00D80500
#define | CMD_SET_MODE 0x00F30500
#define | CMD_RD_FRAME 0x00F50500
#define | DAT_RD_FRAME 0x00F50200
#define | CMD_RD_TEST 0x00FD0500
#define | DAT_RD_TEST 0x00FD0200
#define | CMD_SET_DEV_STAT 0x00FE0500
#define | CMD_GET_DEV_STAT 0x00FE0500
#define | DAT_GET_DEV_STAT 0x00FE0200
#define | CMD_GET_ERR_CODE 0x00FF0500
#define | DAT_GET_ERR_CODE 0x00FF0200
#define | CMD_RD_ERR_STAT 0x00FB0500
#define | DAT_RD_ERR_STAT 0x00FB0200
#define | DAT_WR_BYTE(x) (0x00000100 | ((x) << 16))
#define | CMD_SEL_EP(x) (0x00000500 | ((x) << 16))
#define | DAT_SEL_EP(x) (0x00000200 | ((x) << 16))
#define | CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16))
#define | DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16))
#define | CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16))
#define | CMD_CLR_BUF 0x00F20500
#define | DAT_CLR_BUF 0x00F20200
#define | CMD_VALID_BUF 0x00FA0500
#define | DEV_ADDR_MASK 0x7F
#define | DEV_EN 0x80
#define | CONF_DVICE 0x01
#define | AP_CLK 0x01
#define | INAK_CI 0x02
#define | INAK_CO 0x04
#define | INAK_II 0x08
#define | INAK_IO 0x10
#define | INAK_BI 0x20
#define | INAK_BO 0x40
#define | DEV_CON 0x01
#define | DEV_CON_CH 0x02
#define | DEV_SUS 0x04
#define | DEV_SUS_CH 0x08
#define | DEV_RST 0x10
#define | ERR_EC_MASK 0x0F
#define | ERR_EA 0x10
#define | ERR_PID 0x01
#define | ERR_UEPKT 0x02
#define | ERR_DCRC 0x04
#define | ERR_TIMOUT 0x08
#define | ERR_EOP 0x10
#define | ERR_B_OVRN 0x20
#define | ERR_BTSTF 0x40
#define | ERR_TGL 0x80
#define | EP_SEL_F 0x01
#define | EP_SEL_ST 0x02
#define | EP_SEL_STP 0x04
#define | EP_SEL_PO 0x08
#define | EP_SEL_EPN 0x10
#define | EP_SEL_B_1_FULL 0x20
#define | EP_SEL_B_2_FULL 0x40
#define | EP_STAT_ST 0x01
#define | EP_STAT_DA 0x20
#define | EP_STAT_RF_MO 0x40
#define | EP_STAT_CND_ST 0x80
#define | CLR_BUF_PO 0x01
#define | EOT_INT 0x01
#define | NDD_REQ_INT 0x02
#define | SYS_ERR_INT 0x04

Define Documentation

#define AP_CLK 0x01

Definition at line 76 of file usbreg.h.

#define CCEMTY_INT 0x00000010

Definition at line 27 of file usbreg.h.

#define CDFULL_INT 0x00000020

Definition at line 28 of file usbreg.h.

#define CLR_BUF_PO 0x01

Definition at line 121 of file usbreg.h.

#define CMD_CFG_DEV 0x00D80500

Definition at line 45 of file usbreg.h.

#define CMD_CLR_BUF 0x00F20500

Definition at line 64 of file usbreg.h.

#define CMD_GET_DEV_STAT 0x00FE0500

Definition at line 52 of file usbreg.h.

#define CMD_GET_ERR_CODE 0x00FF0500

Definition at line 54 of file usbreg.h.

#define CMD_RD_ERR_STAT 0x00FB0500

Definition at line 56 of file usbreg.h.

#define CMD_RD_FRAME 0x00F50500

Definition at line 47 of file usbreg.h.

#define CMD_RD_TEST 0x00FD0500

Definition at line 49 of file usbreg.h.

#define CMD_SEL_EP ( x ) (0x00000500 | ((x) << 16))

Definition at line 59 of file usbreg.h.

#define CMD_SEL_EP_CLRI ( x ) (0x00400500 | ((x) << 16))

Definition at line 61 of file usbreg.h.

#define CMD_SET_ADDR 0x00D00500

Definition at line 44 of file usbreg.h.

#define CMD_SET_DEV_STAT 0x00FE0500

Definition at line 51 of file usbreg.h.

#define CMD_SET_EP_STAT ( x ) (0x00400500 | ((x) << 16))

Definition at line 63 of file usbreg.h.

#define CMD_SET_MODE 0x00F30500

Definition at line 46 of file usbreg.h.

#define CMD_VALID_BUF 0x00FA0500

Definition at line 66 of file usbreg.h.

#define CONF_DVICE 0x01

Definition at line 73 of file usbreg.h.

#define CTRL_RD_EN 0x00000001

Definition at line 40 of file usbreg.h.

#define CTRL_WR_EN 0x00000002

Definition at line 41 of file usbreg.h.

#define DAT_CLR_BUF 0x00F20200

Definition at line 65 of file usbreg.h.

#define DAT_GET_DEV_STAT 0x00FE0200

Definition at line 53 of file usbreg.h.

#define DAT_GET_ERR_CODE 0x00FF0200

Definition at line 55 of file usbreg.h.

#define DAT_RD_ERR_STAT 0x00FB0200

Definition at line 57 of file usbreg.h.

#define DAT_RD_FRAME 0x00F50200

Definition at line 48 of file usbreg.h.

#define DAT_RD_TEST 0x00FD0200

Definition at line 50 of file usbreg.h.

#define DAT_SEL_EP ( x ) (0x00000200 | ((x) << 16))

Definition at line 60 of file usbreg.h.

#define DAT_SEL_EP_CLRI ( x ) (0x00400200 | ((x) << 16))

Definition at line 62 of file usbreg.h.

#define DAT_WR_BYTE ( x ) (0x00000100 | ((x) << 16))

Definition at line 58 of file usbreg.h.

#define DEV_ADDR_MASK 0x7F

Definition at line 69 of file usbreg.h.

#define DEV_CON 0x01

Definition at line 85 of file usbreg.h.

#define DEV_CON_CH 0x02

Definition at line 86 of file usbreg.h.

#define DEV_EN 0x80

Definition at line 70 of file usbreg.h.

#define DEV_RST 0x10

Definition at line 89 of file usbreg.h.

#define DEV_STAT_INT 0x00000008

Definition at line 26 of file usbreg.h.

#define DEV_SUS 0x04

Definition at line 87 of file usbreg.h.

#define DEV_SUS_CH 0x08

Definition at line 88 of file usbreg.h.

#define EOT_INT 0x01

Definition at line 125 of file usbreg.h.

#define EP_FAST_INT 0x00000002

Definition at line 24 of file usbreg.h.

#define EP_RLZED_INT 0x00000100

Definition at line 31 of file usbreg.h.

#define EP_SEL_B_1_FULL 0x20

Definition at line 111 of file usbreg.h.

#define EP_SEL_B_2_FULL 0x40

Definition at line 112 of file usbreg.h.

#define EP_SEL_EPN 0x10

Definition at line 110 of file usbreg.h.

#define EP_SEL_F 0x01

Definition at line 106 of file usbreg.h.

#define EP_SEL_PO 0x08

Definition at line 109 of file usbreg.h.

#define EP_SEL_ST 0x02

Definition at line 107 of file usbreg.h.

#define EP_SEL_STP 0x04

Definition at line 108 of file usbreg.h.

#define EP_SLOW_INT 0x00000004

Definition at line 25 of file usbreg.h.

#define EP_STAT_CND_ST 0x80

Definition at line 118 of file usbreg.h.

#define EP_STAT_DA 0x20

Definition at line 116 of file usbreg.h.

#define EP_STAT_RF_MO 0x40

Definition at line 117 of file usbreg.h.

#define EP_STAT_ST 0x01

Definition at line 115 of file usbreg.h.

#define ERR_B_OVRN 0x20

Definition at line 101 of file usbreg.h.

#define ERR_BTSTF 0x40

Definition at line 102 of file usbreg.h.

#define ERR_DCRC 0x04

Definition at line 98 of file usbreg.h.

#define ERR_EA 0x10

Definition at line 93 of file usbreg.h.

#define ERR_EC_MASK 0x0F

Definition at line 92 of file usbreg.h.

#define ERR_EOP 0x10

Definition at line 100 of file usbreg.h.

#define ERR_INT 0x00000200

Definition at line 32 of file usbreg.h.

#define ERR_PID 0x01

Definition at line 96 of file usbreg.h.

#define ERR_TGL 0x80

Definition at line 103 of file usbreg.h.

#define ERR_TIMOUT 0x08

Definition at line 99 of file usbreg.h.

#define ERR_UEPKT 0x02

Definition at line 97 of file usbreg.h.

#define FRAME_INT 0x00000001

Definition at line 23 of file usbreg.h.

#define INAK_BI 0x20

Definition at line 81 of file usbreg.h.

#define INAK_BO 0x40

Definition at line 82 of file usbreg.h.

#define INAK_CI 0x02

Definition at line 77 of file usbreg.h.

#define INAK_CO 0x04

Definition at line 78 of file usbreg.h.

#define INAK_II 0x08

Definition at line 79 of file usbreg.h.

#define INAK_IO 0x10

Definition at line 80 of file usbreg.h.

#define NDD_REQ_INT 0x02

Definition at line 126 of file usbreg.h.

#define PKT_DV 0x00000400

Definition at line 36 of file usbreg.h.

#define PKT_LNGTH_MASK 0x000003FF

Definition at line 35 of file usbreg.h.

#define PKT_RDY 0x00000800

Definition at line 37 of file usbreg.h.

#define RxENDPKT_INT 0x00000040

Definition at line 29 of file usbreg.h.

#define SYS_ERR_INT 0x04

Definition at line 127 of file usbreg.h.

#define TxENDPKT_INT 0x00000080

Definition at line 30 of file usbreg.h.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbuser.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbuser.c File Reference
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbuser.h"
#include "usbaudio.h"

Go to the source code of this file.

Defines

#define | P_EP(n) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)

Functions

void | USB_EndPoint1 (uint32_t event)
void | USB_EndPoint2 (uint32_t event)
void | USB_EndPoint3 (uint32_t event)
void | USB_EndPoint4 (uint32_t event)
void | USB_EndPoint5 (uint32_t event)
void | USB_EndPoint6 (uint32_t event)
void | USB_EndPoint7 (uint32_t event)
void | USB_EndPoint8 (uint32_t event)
void | USB_EndPoint9 (uint32_t event)
void | USB_EndPoint10 (uint32_t event)
void | USB_EndPoint11 (uint32_t event)
void | USB_EndPoint12 (uint32_t event)
void | USB_EndPoint13 (uint32_t event)
void | USB_EndPoint14 (uint32_t event)
void | USB_EndPoint15 (uint32_t event)

Variables

void(*const | USB_P_EP [16])(uint32_t event)

Define Documentation

#define P_EP ( n ) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)

Definition at line 161 of file usbuser.c.

Function Documentation

void USB_EndPoint1 ( uint32_t event )

Definition at line 190 of file usbuser.c.

void USB_EndPoint10 ( uint32_t event )

Definition at line 311 of file usbuser.c.

void USB_EndPoint11 ( uint32_t event )

Definition at line 321 of file usbuser.c.

void USB_EndPoint12 ( uint32_t event )

Definition at line 331 of file usbuser.c.

void USB_EndPoint13 ( uint32_t event )

Definition at line 341 of file usbuser.c.

void USB_EndPoint14 ( uint32_t event )

Definition at line 351 of file usbuser.c.

void USB_EndPoint15 ( uint32_t event )

Definition at line 361 of file usbuser.c.

void USB_EndPoint2 ( uint32_t event )

Definition at line 200 of file usbuser.c.

void USB_EndPoint3 ( uint32_t event )

Definition at line 209 of file usbuser.c.

void USB_EndPoint4 ( uint32_t event )

Definition at line 251 of file usbuser.c.

void USB_EndPoint5 ( uint32_t event )

Definition at line 261 of file usbuser.c.

void USB_EndPoint6 ( uint32_t event )

Definition at line 271 of file usbuser.c.

void USB_EndPoint7 ( uint32_t event )

Definition at line 281 of file usbuser.c.

void USB_EndPoint8 ( uint32_t event )

Definition at line 291 of file usbuser.c.

void USB_EndPoint9 ( uint32_t event )

Definition at line 301 of file usbuser.c.

Variable Documentation

void(* const USB_P_EP[16])(uint32_t event)
Initial value:
 {
  P_EP(0),
  P_EP(1),
  P_EP(2),
  P_EP(3),
  P_EP(4),
  P_EP(5),
  P_EP(6),
  P_EP(7),
  P_EP(8),
  P_EP(9),
  P_EP(10),
  P_EP(11),
  P_EP(12),
  P_EP(13),
  P_EP(14),
  P_EP(15),
}

Definition at line 164 of file usbuser.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbuser.h File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbuser.h File Reference

Go to the source code of this file.

Defines

#define | USB_EVT_SETUP 1
#define | USB_EVT_OUT 2
#define | USB_EVT_IN 3
#define | USB_EVT_OUT_NAK 4
#define | USB_EVT_IN_NAK 5
#define | USB_EVT_OUT_STALL 6
#define | USB_EVT_IN_STALL 7
#define | USB_EVT_OUT_DMA_EOT 8
#define | USB_EVT_IN_DMA_EOT 9
#define | USB_EVT_OUT_DMA_NDR 10
#define | USB_EVT_IN_DMA_NDR 11
#define | USB_EVT_OUT_DMA_ERR 12
#define | USB_EVT_IN_DMA_ERR 13

Functions

void | USB_Power_Event (uint32_t power)
void | USB_Reset_Event (void)
void | USB_Suspend_Event (void)
void | USB_Resume_Event (void)
void | USB_WakeUp_Event (void)
void | USB_SOF_Event (void)
void | USB_Error_Event (uint32_t error)
void | USB_EndPoint0 (uint32_t event)
void | USB_EndPoint1 (uint32_t event)
void | USB_EndPoint2 (uint32_t event)
void | USB_EndPoint3 (uint32_t event)
void | USB_EndPoint4 (uint32_t event)
void | USB_EndPoint5 (uint32_t event)
void | USB_EndPoint6 (uint32_t event)
void | USB_EndPoint7 (uint32_t event)
void | USB_EndPoint8 (uint32_t event)
void | USB_EndPoint9 (uint32_t event)
void | USB_EndPoint10 (uint32_t event)
void | USB_EndPoint11 (uint32_t event)
void | USB_EndPoint12 (uint32_t event)
void | USB_EndPoint13 (uint32_t event)
void | USB_EndPoint14 (uint32_t event)
void | USB_EndPoint15 (uint32_t event)
void | USB_Configure_Event (void)
void | USB_Interface_Event (void)
void | USB_Feature_Event (void)

Variables

void(*const | USB_P_EP [16])(uint32_t event)

Define Documentation

#define USB_EVT_IN 3

Definition at line 35 of file usbuser.h.

#define USB_EVT_IN_DMA_EOT 9

Definition at line 41 of file usbuser.h.

#define USB_EVT_IN_DMA_ERR 13

Definition at line 45 of file usbuser.h.

#define USB_EVT_IN_DMA_NDR 11

Definition at line 43 of file usbuser.h.

#define USB_EVT_IN_NAK 5

Definition at line 37 of file usbuser.h.

#define USB_EVT_IN_STALL 7

Definition at line 39 of file usbuser.h.

#define USB_EVT_OUT 2

Definition at line 34 of file usbuser.h.

#define USB_EVT_OUT_DMA_EOT 8

Definition at line 40 of file usbuser.h.

#define USB_EVT_OUT_DMA_ERR 12

Definition at line 44 of file usbuser.h.

#define USB_EVT_OUT_DMA_NDR 10

Definition at line 42 of file usbuser.h.

#define USB_EVT_OUT_NAK 4

Definition at line 36 of file usbuser.h.

#define USB_EVT_OUT_STALL 6

Definition at line 38 of file usbuser.h.

#define USB_EVT_SETUP 1

Definition at line 33 of file usbuser.h.

Function Documentation

void USB_Configure_Event ( void )
void USB_EndPoint0 ( uint32_t event )

Definition at line 600 of file usbcore.c.

void USB_EndPoint1 ( uint32_t event )

Definition at line 190 of file usbuser.c.

void USB_EndPoint10 ( uint32_t event )

Definition at line 311 of file usbuser.c.

void USB_EndPoint11 ( uint32_t event )

Definition at line 321 of file usbuser.c.

void USB_EndPoint12 ( uint32_t event )

Definition at line 331 of file usbuser.c.

void USB_EndPoint13 ( uint32_t event )

Definition at line 341 of file usbuser.c.

void USB_EndPoint14 ( uint32_t event )

Definition at line 351 of file usbuser.c.

void USB_EndPoint15 ( uint32_t event )

Definition at line 361 of file usbuser.c.

void USB_EndPoint2 ( uint32_t event )

Definition at line 200 of file usbuser.c.

void USB_EndPoint3 ( uint32_t event )

Definition at line 209 of file usbuser.c.

void USB_EndPoint4 ( uint32_t event )

Definition at line 251 of file usbuser.c.

void USB_EndPoint5 ( uint32_t event )

Definition at line 261 of file usbuser.c.

void USB_EndPoint6 ( uint32_t event )

Definition at line 271 of file usbuser.c.

void USB_EndPoint7 ( uint32_t event )

Definition at line 281 of file usbuser.c.

void USB_EndPoint8 ( uint32_t event )

Definition at line 291 of file usbuser.c.

void USB_EndPoint9 ( uint32_t event )

Definition at line 301 of file usbuser.c.

void USB_Error_Event ( uint32_t error )
void USB_Feature_Event ( void )
void USB_Interface_Event ( void )
void USB_Power_Event ( uint32_t power )
void USB_Reset_Event ( void )
void USB_Resume_Event ( void )
void USB_SOF_Event ( void )
void USB_Suspend_Event ( void )
void USB_WakeUp_Event ( void )

Variable Documentation

void(* const USB_P_EP[16])(uint32_t event)

Definition at line 164 of file usbuser.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdc.h File Reference

Defines | Typedefs | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdc.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | CDC_V1_10 0x0110
#define | CDC_COMMUNICATION_INTERFACE_CLASS 0x02
#define | CDC_DIRECT_LINE_CONTROL_MODEL 0x01
#define | CDC_ABSTRACT_CONTROL_MODEL 0x02
#define | CDC_TELEPHONE_CONTROL_MODEL 0x03
#define | CDC_MULTI_CHANNEL_CONTROL_MODEL 0x04
#define | CDC_CAPI_CONTROL_MODEL 0x05
#define | CDC_ETHERNET_NETWORKING_CONTROL_MODEL 0x06
#define | CDC_ATM_NETWORKING_CONTROL_MODEL 0x07
#define | CDC_PROTOCOL_COMMON_AT_COMMANDS 0x01
#define | CDC_DATA_INTERFACE_CLASS 0x0A
#define | CDC_PROTOCOL_ISDN_BRI 0x30
#define | CDC_PROTOCOL_HDLC 0x31
#define | CDC_PROTOCOL_TRANSPARENT 0x32
#define | CDC_PROTOCOL_Q921_MANAGEMENT 0x50
#define | CDC_PROTOCOL_Q921_DATA_LINK 0x51
#define | CDC_PROTOCOL_Q921_MULTIPLEXOR 0x52
#define | CDC_PROTOCOL_V42 0x90
#define | CDC_PROTOCOL_EURO_ISDN 0x91
#define | CDC_PROTOCOL_V24_RATE_ADAPTATION 0x92
#define | CDC_PROTOCOL_CAPI 0x93
#define | CDC_PROTOCOL_HOST_BASED_DRIVER 0xFD
#define | CDC_PROTOCOL_DESCRIBED_IN_PUFD 0xFE
#define | CDC_CS_INTERFACE 0x24
#define | CDC_CS_ENDPOINT 0x25
#define | CDC_HEADER 0x00
#define | CDC_CALL_MANAGEMENT 0x01
#define | CDC_ABSTRACT_CONTROL_MANAGEMENT 0x02
#define | CDC_DIRECT_LINE_MANAGEMENT 0x03
#define | CDC_TELEPHONE_RINGER 0x04
#define | CDC_REPORTING_CAPABILITIES 0x05
#define | CDC_UNION 0x06
#define | CDC_COUNTRY_SELECTION 0x07
#define | CDC_TELEPHONE_OPERATIONAL_MODES 0x08
#define | CDC_USB_TERMINAL 0x09
#define | CDC_NETWORK_CHANNEL 0x0A
#define | CDC_PROTOCOL_UNIT 0x0B
#define | CDC_EXTENSION_UNIT 0x0C
#define | CDC_MULTI_CHANNEL_MANAGEMENT 0x0D
#define | CDC_CAPI_CONTROL_MANAGEMENT 0x0E
#define | CDC_ETHERNET_NETWORKING 0x0F
#define | CDC_ATM_NETWORKING 0x10
#define | CDC_SEND_ENCAPSULATED_COMMAND 0x00
#define | CDC_GET_ENCAPSULATED_RESPONSE 0x01
#define | CDC_SET_COMM_FEATURE 0x02
#define | CDC_GET_COMM_FEATURE 0x03
#define | CDC_CLEAR_COMM_FEATURE 0x04
#define | CDC_SET_AUX_LINE_STATE 0x10
#define | CDC_SET_HOOK_STATE 0x11
#define | CDC_PULSE_SETUP 0x12
#define | CDC_SEND_PULSE 0x13
#define | CDC_SET_PULSE_TIME 0x14
#define | CDC_RING_AUX_JACK 0x15
#define | CDC_SET_LINE_CODING 0x20
#define | CDC_GET_LINE_CODING 0x21
#define | CDC_SET_CONTROL_LINE_STATE 0x22
#define | CDC_SEND_BREAK 0x23
#define | CDC_SET_RINGER_PARMS 0x30
#define | CDC_GET_RINGER_PARMS 0x31
#define | CDC_SET_OPERATION_PARMS 0x32
#define | CDC_GET_OPERATION_PARMS 0x33
#define | CDC_SET_LINE_PARMS 0x34
#define | CDC_GET_LINE_PARMS 0x35
#define | CDC_DIAL_DIGITS 0x36
#define | CDC_SET_UNIT_PARAMETER 0x37
#define | CDC_GET_UNIT_PARAMETER 0x38
#define | CDC_CLEAR_UNIT_PARAMETER 0x39
#define | CDC_GET_PROFILE 0x3A
#define | CDC_SET_ETHERNET_MULTICAST_FILTERS 0x40
#define | CDC_SET_ETHERNET_PMP_FILTER 0x41
#define | CDC_GET_ETHERNET_PMP_FILTER 0x42
#define | CDC_SET_ETHERNET_PACKET_FILTER 0x43
#define | CDC_GET_ETHERNET_STATISTIC 0x44
#define | CDC_SET_ATM_DATA_FORMAT 0x50
#define | CDC_GET_ATM_DEVICE_STATISTICS 0x51
#define | CDC_SET_ATM_DEFAULT_VC 0x52
#define | CDC_GET_ATM_VC_STATISTICS 0x53
#define | CDC_ABSTRACT_STATE 0x01
#define | CDC_COUNTRY_SETTING 0x02
#define | CDC_IDLE_SETTING (1 << 0)
#define | CDC_DATA_MULTPLEXED_STATE (1 << 1)
#define | CDC_DTE_PRESENT (1 << 0)
#define | CDC_ACTIVATE_CARRIER (1 << 1)
#define | CDC_NOTIFICATION_NETWORK_CONNECTION 0x00
#define | CDC_RESPONSE_AVAILABLE 0x01
#define | CDC_AUX_JACK_HOOK_STATE 0x08
#define | CDC_RING_DETECT 0x09
#define | CDC_NOTIFICATION_SERIAL_STATE 0x20
#define | CDC_CALL_STATE_CHANGE 0x28
#define | CDC_LINE_STATE_CHANGE 0x29
#define | CDC_CONNECTION_SPEED_CHANGE 0x2A
#define | CDC_SERIAL_STATE_OVERRUN (1 << 6)
#define | CDC_SERIAL_STATE_PARITY (1 << 5)
#define | CDC_SERIAL_STATE_FRAMING (1 << 4)
#define | CDC_SERIAL_STATE_RING (1 << 3)
#define | CDC_SERIAL_STATE_BREAK (1 << 2)
#define | CDC_SERIAL_STATE_TX_CARRIER (1 << 1)
#define | CDC_SERIAL_STATE_RX_CARRIER (1 << 0)

Typedefs

typedef USB_SETUP_PACKET | CDC_NOTIFICATION_HEADER

Variables

uint8_t | bFunctionLength
uint8_t | bDescriptorType
uint8_t | bDescriptorSubtype
uint16_t | bcdCDC
CDC_HEADER_DESCRIPTOR
uint8_t | bmCapabilities
uint8_t | bDataInterface
CDC_CALL_MANAGEMENT_DESCRIPTOR
CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR
uint8_t | bMasterInterface
CDC_UNION_DESCRIPTOR
CDC_UNION_DESCRIPTOR sUnion
uint8_t | bSlaveInterfaces [1]
CDC_UNION_1SLAVE_DESCRIPTOR
uint32_t | dwDTERate
uint8_t | bCharFormat
uint8_t | bParityType
uint8_t | bDataBits
CDC_LINE_CODING

Define Documentation

#define CDC_ABSTRACT_CONTROL_MANAGEMENT 0x02

Definition at line 78 of file cdc.h.

#define CDC_ABSTRACT_CONTROL_MODEL 0x02

Definition at line 39 of file cdc.h.

#define CDC_ABSTRACT_STATE 0x01

Definition at line 135 of file cdc.h.

#define CDC_ACTIVATE_CARRIER (1 << 1)

Definition at line 147 of file cdc.h.

#define CDC_ATM_NETWORKING 0x10

Definition at line 92 of file cdc.h.

#define CDC_ATM_NETWORKING_CONTROL_MODEL 0x07

Definition at line 44 of file cdc.h.

#define CDC_AUX_JACK_HOOK_STATE 0x08

Definition at line 154 of file cdc.h.

#define CDC_CALL_MANAGEMENT 0x01

Definition at line 77 of file cdc.h.

#define CDC_CALL_STATE_CHANGE 0x28

Definition at line 157 of file cdc.h.

#define CDC_CAPI_CONTROL_MANAGEMENT 0x0E

Definition at line 90 of file cdc.h.

#define CDC_CAPI_CONTROL_MODEL 0x05

Definition at line 42 of file cdc.h.

#define CDC_CLEAR_COMM_FEATURE 0x04

Definition at line 101 of file cdc.h.

#define CDC_CLEAR_UNIT_PARAMETER 0x39

Definition at line 121 of file cdc.h.

#define CDC_COMMUNICATION_INTERFACE_CLASS 0x02

Definition at line 34 of file cdc.h.

#define CDC_CONNECTION_SPEED_CHANGE 0x2A

Definition at line 159 of file cdc.h.

#define CDC_COUNTRY_SELECTION 0x07

Definition at line 83 of file cdc.h.

#define CDC_COUNTRY_SETTING 0x02

Definition at line 136 of file cdc.h.

#define CDC_CS_ENDPOINT 0x25

Definition at line 72 of file cdc.h.

#define CDC_CS_INTERFACE 0x24

Definition at line 71 of file cdc.h.

#define CDC_DATA_INTERFACE_CLASS 0x0A

Definition at line 52 of file cdc.h.

#define CDC_DATA_MULTPLEXED_STATE (1 << 1)

Definition at line 141 of file cdc.h.

#define CDC_DIAL_DIGITS 0x36

Definition at line 118 of file cdc.h.

#define CDC_DIRECT_LINE_CONTROL_MODEL 0x01

Definition at line 38 of file cdc.h.

#define CDC_DIRECT_LINE_MANAGEMENT 0x03

Definition at line 79 of file cdc.h.

#define CDC_DTE_PRESENT (1 << 0)

Definition at line 146 of file cdc.h.

#define CDC_ETHERNET_NETWORKING 0x0F

Definition at line 91 of file cdc.h.

#define CDC_ETHERNET_NETWORKING_CONTROL_MODEL 0x06

Definition at line 43 of file cdc.h.

#define CDC_EXTENSION_UNIT 0x0C

Definition at line 88 of file cdc.h.

#define CDC_GET_ATM_DEVICE_STATISTICS 0x51

Definition at line 129 of file cdc.h.

#define CDC_GET_ATM_VC_STATISTICS 0x53

Definition at line 131 of file cdc.h.

#define CDC_GET_COMM_FEATURE 0x03

Definition at line 100 of file cdc.h.

#define CDC_GET_ENCAPSULATED_RESPONSE 0x01

Definition at line 98 of file cdc.h.

#define CDC_GET_ETHERNET_PMP_FILTER 0x42

Definition at line 125 of file cdc.h.

#define CDC_GET_ETHERNET_STATISTIC 0x44

Definition at line 127 of file cdc.h.

#define CDC_GET_LINE_CODING 0x21

Definition at line 109 of file cdc.h.

#define CDC_GET_LINE_PARMS 0x35

Definition at line 117 of file cdc.h.

#define CDC_GET_OPERATION_PARMS 0x33

Definition at line 115 of file cdc.h.

#define CDC_GET_PROFILE 0x3A

Definition at line 122 of file cdc.h.

#define CDC_GET_RINGER_PARMS 0x31

Definition at line 113 of file cdc.h.

#define CDC_GET_UNIT_PARAMETER 0x38

Definition at line 120 of file cdc.h.

#define CDC_HEADER 0x00

Definition at line 76 of file cdc.h.

#define CDC_IDLE_SETTING (1 << 0)

Definition at line 140 of file cdc.h.

#define CDC_LINE_STATE_CHANGE 0x29

Definition at line 158 of file cdc.h.

#define CDC_MULTI_CHANNEL_CONTROL_MODEL 0x04

Definition at line 41 of file cdc.h.

#define CDC_MULTI_CHANNEL_MANAGEMENT 0x0D

Definition at line 89 of file cdc.h.

#define CDC_NETWORK_CHANNEL 0x0A

Definition at line 86 of file cdc.h.

#define CDC_NOTIFICATION_NETWORK_CONNECTION 0x00

Definition at line 152 of file cdc.h.

#define CDC_NOTIFICATION_SERIAL_STATE 0x20

Definition at line 156 of file cdc.h.

#define CDC_PROTOCOL_CAPI 0x93

Definition at line 65 of file cdc.h.

#define CDC_PROTOCOL_COMMON_AT_COMMANDS 0x01

Definition at line 48 of file cdc.h.

#define CDC_PROTOCOL_DESCRIBED_IN_PUFD 0xFE

Definition at line 67 of file cdc.h.

#define CDC_PROTOCOL_EURO_ISDN 0x91

Definition at line 63 of file cdc.h.

#define CDC_PROTOCOL_HDLC 0x31

Definition at line 57 of file cdc.h.

#define CDC_PROTOCOL_HOST_BASED_DRIVER 0xFD

Definition at line 66 of file cdc.h.

#define CDC_PROTOCOL_ISDN_BRI 0x30

Definition at line 56 of file cdc.h.

#define CDC_PROTOCOL_Q921_DATA_LINK 0x51

Definition at line 60 of file cdc.h.

#define CDC_PROTOCOL_Q921_MANAGEMENT 0x50

Definition at line 59 of file cdc.h.

#define CDC_PROTOCOL_Q921_MULTIPLEXOR 0x52

Definition at line 61 of file cdc.h.

#define CDC_PROTOCOL_TRANSPARENT 0x32

Definition at line 58 of file cdc.h.

#define CDC_PROTOCOL_UNIT 0x0B

Definition at line 87 of file cdc.h.

#define CDC_PROTOCOL_V24_RATE_ADAPTATION 0x92

Definition at line 64 of file cdc.h.

#define CDC_PROTOCOL_V42 0x90

Definition at line 62 of file cdc.h.

#define CDC_PULSE_SETUP 0x12

Definition at line 104 of file cdc.h.

#define CDC_REPORTING_CAPABILITIES 0x05

Definition at line 81 of file cdc.h.

#define CDC_RESPONSE_AVAILABLE 0x01

Definition at line 153 of file cdc.h.

#define CDC_RING_AUX_JACK 0x15

Definition at line 107 of file cdc.h.

#define CDC_RING_DETECT 0x09

Definition at line 155 of file cdc.h.

#define CDC_SEND_BREAK 0x23

Definition at line 111 of file cdc.h.

#define CDC_SEND_ENCAPSULATED_COMMAND 0x00

Definition at line 97 of file cdc.h.

#define CDC_SEND_PULSE 0x13

Definition at line 105 of file cdc.h.

#define CDC_SERIAL_STATE_BREAK (1 << 2)

Definition at line 167 of file cdc.h.

#define CDC_SERIAL_STATE_FRAMING (1 << 4)

Definition at line 165 of file cdc.h.

#define CDC_SERIAL_STATE_OVERRUN (1 << 6)

Definition at line 163 of file cdc.h.

#define CDC_SERIAL_STATE_PARITY (1 << 5)

Definition at line 164 of file cdc.h.

#define CDC_SERIAL_STATE_RING (1 << 3)

Definition at line 166 of file cdc.h.

#define CDC_SERIAL_STATE_RX_CARRIER (1 << 0)

Definition at line 169 of file cdc.h.

#define CDC_SERIAL_STATE_TX_CARRIER (1 << 1)

Definition at line 168 of file cdc.h.

#define CDC_SET_ATM_DATA_FORMAT 0x50

Definition at line 128 of file cdc.h.

#define CDC_SET_ATM_DEFAULT_VC 0x52

Definition at line 130 of file cdc.h.

#define CDC_SET_AUX_LINE_STATE 0x10

Definition at line 102 of file cdc.h.

#define CDC_SET_COMM_FEATURE 0x02

Definition at line 99 of file cdc.h.

#define CDC_SET_CONTROL_LINE_STATE 0x22

Definition at line 110 of file cdc.h.

#define CDC_SET_ETHERNET_MULTICAST_FILTERS 0x40

Definition at line 123 of file cdc.h.

#define CDC_SET_ETHERNET_PACKET_FILTER 0x43

Definition at line 126 of file cdc.h.

#define CDC_SET_ETHERNET_PMP_FILTER 0x41

Definition at line 124 of file cdc.h.

#define CDC_SET_HOOK_STATE 0x11

Definition at line 103 of file cdc.h.

#define CDC_SET_LINE_CODING 0x20

Definition at line 108 of file cdc.h.

#define CDC_SET_LINE_PARMS 0x34

Definition at line 116 of file cdc.h.

#define CDC_SET_OPERATION_PARMS 0x32

Definition at line 114 of file cdc.h.

#define CDC_SET_PULSE_TIME 0x14

Definition at line 106 of file cdc.h.

#define CDC_SET_RINGER_PARMS 0x30

Definition at line 112 of file cdc.h.

#define CDC_SET_UNIT_PARAMETER 0x37

Definition at line 119 of file cdc.h.

#define CDC_TELEPHONE_CONTROL_MODEL 0x03

Definition at line 40 of file cdc.h.

#define CDC_TELEPHONE_OPERATIONAL_MODES 0x08

Definition at line 84 of file cdc.h.

#define CDC_TELEPHONE_RINGER 0x04

Definition at line 80 of file cdc.h.

#define CDC_UNION 0x06

Definition at line 82 of file cdc.h.

#define CDC_USB_TERMINAL 0x09

Definition at line 85 of file cdc.h.

#define CDC_V1_10 0x0110

Definition at line 30 of file cdc.h.

Typedef Documentation

typedef USB_SETUP_PACKET CDC_NOTIFICATION_HEADER

Definition at line 280 of file cdc.h.

Variable Documentation

uint16_t bcdCDC

Definition at line 191 of file cdc.h.

uint8_t bCharFormat

Definition at line 272 of file cdc.h.

uint8_t bDataBits

Definition at line 274 of file cdc.h.

uint8_t bDataInterface

Definition at line 209 of file cdc.h.

uint8_t bDescriptorSubtype

Definition at line 190 of file cdc.h.

uint8_t bDescriptorType

Definition at line 189 of file cdc.h.

uint8_t bFunctionLength

Definition at line 188 of file cdc.h.

uint8_t bMasterInterface

Definition at line 243 of file cdc.h.

uint8_t bmCapabilities

Definition at line 208 of file cdc.h.

uint8_t bParityType

Definition at line 273 of file cdc.h.

uint8_t bSlaveInterfaces[1]

Definition at line 257 of file cdc.h.

CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR

Definition at line 227 of file cdc.h.

CDC_CALL_MANAGEMENT_DESCRIPTOR

Definition at line 210 of file cdc.h.

CDC_HEADER_DESCRIPTOR

Definition at line 192 of file cdc.h.

CDC_LINE_CODING

Definition at line 275 of file cdc.h.

CDC_UNION_1SLAVE_DESCRIPTOR

Definition at line 258 of file cdc.h.

CDC_UNION_DESCRIPTOR

Definition at line 244 of file cdc.h.

uint32_t dwDTERate

Definition at line 271 of file cdc.h.

CDC_UNION_DESCRIPTOR sUnion

Definition at line 256 of file cdc.h.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.c File Reference

Data Structures | Defines | Typedefs | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.c File Reference
#include "lpc_types.h"
#include "usb.h"
#include "usbhw.h"
#include "usbcfg.h"
#include "usbcore.h"
#include "cdc.h"
#include "cdcuser.h"
#include "serial.h"

Go to the source code of this file.

Data Structures

struct | __CDC_BUF_T

Defines

#define | CDC_BUF_SIZE (64)
#define | CDC_BUF_MASK (CDC_BUF_SIZE-1ul)
#define | CDC_BUF_RESET(cdcBuf) (cdcBuf.rdIdx = cdcBuf.wrIdx = 0)
#define | CDC_BUF_WR(cdcBuf, dataIn) (cdcBuf.data[CDC_BUF_MASK & cdcBuf.wrIdx++] = (dataIn))
#define | CDC_BUF_RD(cdcBuf) (cdcBuf.data[CDC_BUF_MASK & cdcBuf.rdIdx++])
#define | CDC_BUF_EMPTY(cdcBuf) (cdcBuf.rdIdx == cdcBuf.wrIdx)
#define | CDC_BUF_FULL(cdcBuf) (cdcBuf.rdIdx == cdcBuf.wrIdx+1)
#define | CDC_BUF_COUNT(cdcBuf) (CDC_BUF_MASK & (cdcBuf.wrIdx - cdcBuf.rdIdx))

Typedefs

typedef struct __CDC_BUF_T | CDC_BUF_T

Functions

int | CDC_RdOutBuf (char *buffer, const int *length)
int | CDC_WrOutBuf (const char *buffer, int *length)
int | CDC_OutBufAvailChar (int *availChar)
void | CDC_Init (char portNum)
uint32_t | CDC_SendEncapsulatedCommand (void)
uint32_t | CDC_GetEncapsulatedResponse (void)
uint32_t | CDC_SetCommFeature (unsigned short wFeatureSelector)
uint32_t | CDC_GetCommFeature (unsigned short wFeatureSelector)
uint32_t | CDC_ClearCommFeature (unsigned short wFeatureSelector)
uint32_t | CDC_SetLineCoding (void)
uint32_t | CDC_GetLineCoding (void)
uint32_t | CDC_SetControlLineState (unsigned short wControlSignalBitmap)
uint32_t | CDC_SendBreak (unsigned short wDurationOfBreak)
void | CDC_BulkIn (void)
void | CDC_BulkOut (void)
unsigned short | CDC_GetSerialState (void)
void | CDC_NotificationIn (void)

Variables

unsigned char | BulkBufIn [USB_CDC_BUFSIZE]
unsigned char | BulkBufOut [USB_CDC_BUFSIZE]
unsigned char | NotificationBuf [10]
CDC_LINE_CODING | CDC_LineCoding = {9600, 0, 0, 8}
unsigned short | CDC_SerialState = 0x0000
unsigned short | CDC_DepInEmpty = 1
CDC_BUF_T CDC_OutBuf

Define Documentation

#define CDC_BUF_COUNT ( cdcBuf ) (CDC_BUF_MASK & (cdcBuf.wrIdx - cdcBuf.rdIdx))

Definition at line 53 of file cdcuser.c.

#define CDC_BUF_EMPTY ( cdcBuf ) (cdcBuf.rdIdx == cdcBuf.wrIdx)

Definition at line 51 of file cdcuser.c.

#define CDC_BUF_FULL ( cdcBuf ) (cdcBuf.rdIdx == cdcBuf.wrIdx+1)

Definition at line 52 of file cdcuser.c.

#define CDC_BUF_MASK (CDC_BUF_SIZE-1ul)

Definition at line 45 of file cdcuser.c.

#define CDC_BUF_RD ( cdcBuf ) (cdcBuf.data[CDC_BUF_MASK & cdcBuf.rdIdx++])

Definition at line 50 of file cdcuser.c.

#define CDC_BUF_RESET ( cdcBuf ) (cdcBuf.rdIdx = cdcBuf.wrIdx = 0)

Definition at line 48 of file cdcuser.c.

#define CDC_BUF_SIZE (64)

Definition at line 43 of file cdcuser.c.

#define CDC_BUF_WR | ( | cdcBuf,
 |  | dataIn
 | ) | (cdcBuf.data[CDC_BUF_MASK & cdcBuf.wrIdx++] = (dataIn))

Definition at line 49 of file cdcuser.c.

Typedef Documentation

typedef struct __CDC_BUF_T CDC_BUF_T

Function Documentation

void CDC_BulkIn ( void )

Definition at line 301 of file cdcuser.c.

void CDC_BulkOut ( void )

Definition at line 325 of file cdcuser.c.

uint32_t CDC_ClearCommFeature ( unsigned short wFeatureSelector )

Definition at line 206 of file cdcuser.c.

uint32_t CDC_GetCommFeature ( unsigned short wFeatureSelector )

Definition at line 193 of file cdcuser.c.

uint32_t CDC_GetEncapsulatedResponse ( void )

Definition at line 167 of file cdcuser.c.

uint32_t CDC_GetLineCoding ( void )

Definition at line 254 of file cdcuser.c.

unsigned short CDC_GetSerialState ( void )

Definition at line 344 of file cdcuser.c.

void CDC_Init ( char portNum )

Definition at line 124 of file cdcuser.c.

void CDC_NotificationIn ( void )

Definition at line 365 of file cdcuser.c.

int CDC_OutBufAvailChar ( int * availChar )

Definition at line 109 of file cdcuser.c.

int CDC_RdOutBuf | ( | char * | buffer,
 |  | const int * | length
 | ) |  |

Definition at line 68 of file cdcuser.c.

uint32_t CDC_SendBreak ( unsigned short wDurationOfBreak )

Definition at line 289 of file cdcuser.c.

uint32_t CDC_SendEncapsulatedCommand ( void )

Definition at line 155 of file cdcuser.c.

uint32_t CDC_SetCommFeature ( unsigned short wFeatureSelector )

Definition at line 180 of file cdcuser.c.

uint32_t CDC_SetControlLineState ( unsigned short wControlSignalBitmap )

Definition at line 274 of file cdcuser.c.

uint32_t CDC_SetLineCoding ( void )

Definition at line 219 of file cdcuser.c.

int CDC_WrOutBuf | ( | const char * | buffer,
 |  | int * | length
 | ) |  |

Definition at line 88 of file cdcuser.c.

Variable Documentation

unsigned char BulkBufIn[USB_CDC_BUFSIZE]

Definition at line 30 of file cdcuser.c.

unsigned char BulkBufOut[USB_CDC_BUFSIZE]

Definition at line 31 of file cdcuser.c.

unsigned short CDC_DepInEmpty = 1

Definition at line 36 of file cdcuser.c.

CDC_LINE_CODING CDC_LineCoding = {9600, 0, 0, 8}

Definition at line 34 of file cdcuser.c.

CDC_BUF_T CDC_OutBuf

Definition at line 63 of file cdcuser.c.

unsigned short CDC_SerialState = 0x0000

Definition at line 35 of file cdcuser.c.

unsigned char NotificationBuf[10]

Definition at line 32 of file cdcuser.c.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.h File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.h File Reference

Go to the source code of this file.

Defines

#define | CDC_DEP_IN 0x82
#define | CDC_DEP_OUT 0x02
#define | CDC_CEP_IN 0x81

Functions

int | CDC_RdOutBuf (char *buffer, const int *length)
int | CDC_WrOutBuf (const char *buffer, int *length)
int | CDC_OutBufAvailChar (int *availChar)
uint32_t | CDC_SendEncapsulatedCommand (void)
uint32_t | CDC_GetEncapsulatedResponse (void)
uint32_t | CDC_SetCommFeature (unsigned short wFeatureSelector)
uint32_t | CDC_GetCommFeature (unsigned short wFeatureSelector)
uint32_t | CDC_ClearCommFeature (unsigned short wFeatureSelector)
uint32_t | CDC_GetLineCoding (void)
uint32_t | CDC_SetLineCoding (void)
uint32_t | CDC_SetControlLineState (unsigned short wControlSignalBitmap)
uint32_t | CDC_SendBreak (unsigned short wDurationOfBreak)
void | CDC_BulkIn (void)
void | CDC_BulkOut (void)
void | CDC_NotificationIn (void)
void | CDC_Init (char portNum)
unsigned short | CDC_GetSerialState (void)

Variables

unsigned short | CDC_DepInEmpty

Define Documentation

#define CDC_CEP_IN 0x81

Definition at line 33 of file cdcuser.h.

#define CDC_DEP_IN 0x82

Definition at line 29 of file cdcuser.h.

#define CDC_DEP_OUT 0x02

Definition at line 30 of file cdcuser.h.

Function Documentation

void CDC_BulkIn ( void )

Definition at line 301 of file cdcuser.c.

void CDC_BulkOut ( void )

Definition at line 325 of file cdcuser.c.

uint32_t CDC_ClearCommFeature ( unsigned short wFeatureSelector )

Definition at line 206 of file cdcuser.c.

uint32_t CDC_GetCommFeature ( unsigned short wFeatureSelector )

Definition at line 193 of file cdcuser.c.

uint32_t CDC_GetEncapsulatedResponse ( void )

Definition at line 167 of file cdcuser.c.

uint32_t CDC_GetLineCoding ( void )

Definition at line 254 of file cdcuser.c.

unsigned short CDC_GetSerialState ( void )

Definition at line 344 of file cdcuser.c.

void CDC_Init ( char portNum )

Definition at line 124 of file cdcuser.c.

void CDC_NotificationIn ( void )

Definition at line 365 of file cdcuser.c.

int CDC_OutBufAvailChar ( int * availChar )

Definition at line 109 of file cdcuser.c.

int CDC_RdOutBuf | ( | char * | buffer,
 |  | const int * | length
 | ) |  |

Definition at line 68 of file cdcuser.c.

uint32_t CDC_SendBreak ( unsigned short wDurationOfBreak )

Definition at line 289 of file cdcuser.c.

uint32_t CDC_SendEncapsulatedCommand ( void )

Definition at line 155 of file cdcuser.c.

uint32_t CDC_SetCommFeature ( unsigned short wFeatureSelector )

Definition at line 180 of file cdcuser.c.

uint32_t CDC_SetControlLineState ( unsigned short wControlSignalBitmap )

Definition at line 274 of file cdcuser.c.

uint32_t CDC_SetLineCoding ( void )

Definition at line 219 of file cdcuser.c.

int CDC_WrOutBuf | ( | const char * | buffer,
 |  | int * | length
 | ) |  |

Definition at line 88 of file cdcuser.c.

Variable Documentation

unsigned short CDC_DepInEmpty

Definition at line 36 of file cdcuser.c.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | CHECK_PARAM(expr)
#define _DBGFWK

Define Documentation

#define CHECK_PARAM ( expr )

#define _DBGFWK

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.c File Reference

Data Structures | Defines | Typedefs | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.c File Reference
#include "LPC17xx.h"
#include "lpc_types.h"
#include "serial.h"

Go to the source code of this file.

Data Structures

struct | __SER_BUF_T

Defines

#define | SER_BUF_SIZE (128)
#define | SER_BUF_MASK (SER_BUF_SIZE-1ul)
#define | SER_BUF_RESET(serBuf) (serBuf.rdIdx = serBuf.wrIdx = 0)
#define | SER_BUF_WR(serBuf, dataIn) (serBuf.data[SER_BUF_MASK & serBuf.wrIdx++] = (dataIn))
#define | SER_BUF_RD(serBuf) (serBuf.data[SER_BUF_MASK & serBuf.rdIdx++])
#define | SER_BUF_EMPTY(serBuf) (serBuf.rdIdx == serBuf.wrIdx)
#define | SER_BUF_FULL(serBuf) (serBuf.rdIdx == serBuf.wrIdx+1)
#define | SER_BUF_COUNT(serBuf) (SER_BUF_MASK & (serBuf.wrIdx - serBuf.rdIdx))

Typedefs

typedef struct __SER_BUF_T | SER_BUF_T

Functions

void | ser_OpenPort (char portNum)
void | ser_ClosePort (char portNum)
void | ser_InitPort0 (unsigned long baudrate, unsigned int databits, unsigned int parity, unsigned int stopbits)
void | ser_InitPort1 (unsigned long baudrate, unsigned int databits, unsigned int parity, unsigned int stopbits)
int | ser_Read (char *buffer, const int *length)
int | ser_Write (char portNum, const char *buffer, int *length)
void | ser_AvailChar (int *availChar)
void | ser_LineState (unsigned short *lineState)
void | UART0_IRQHandler (void)
void | UART1_IRQHandler (void)

Variables

unsigned long | ser_txRestart
unsigned short | ser_lineState
SER_BUF_T ser_out
SER_BUF_T ser_in

Define Documentation

#define SER_BUF_COUNT ( serBuf ) (SER_BUF_MASK & (serBuf.wrIdx - serBuf.rdIdx))

Definition at line 33 of file serial.c.

#define SER_BUF_EMPTY ( serBuf ) (serBuf.rdIdx == serBuf.wrIdx)

Definition at line 31 of file serial.c.

#define SER_BUF_FULL ( serBuf ) (serBuf.rdIdx == serBuf.wrIdx+1)

Definition at line 32 of file serial.c.

#define SER_BUF_MASK (SER_BUF_SIZE-1ul)

Definition at line 25 of file serial.c.

#define SER_BUF_RD ( serBuf ) (serBuf.data[SER_BUF_MASK & serBuf.rdIdx++])

Definition at line 30 of file serial.c.

#define SER_BUF_RESET ( serBuf ) (serBuf.rdIdx = serBuf.wrIdx = 0)

Definition at line 28 of file serial.c.

#define SER_BUF_SIZE (128)

Definition at line 24 of file serial.c.

#define SER_BUF_WR | ( | serBuf,
 |  | dataIn
 | ) | (serBuf.data[SER_BUF_MASK & serBuf.wrIdx++] = (dataIn))

Definition at line 29 of file serial.c.

Typedef Documentation

typedef struct __SER_BUF_T SER_BUF_T

Function Documentation

void ser_AvailChar ( int * availChar )

Definition at line 334 of file serial.c.

void ser_ClosePort ( char portNum )

Definition at line 72 of file serial.c.

void ser_InitPort0 | ( | unsigned long | baudrate,
 |  | unsigned int | databits,
 |  | unsigned int | parity,
 |  | unsigned int | stopbits
 | ) |  |

Definition at line 95 of file serial.c.

void ser_InitPort1 | ( | unsigned long | baudrate,
 |  | unsigned int | databits,
 |  | unsigned int | parity,
 |  | unsigned int | stopbits
 | ) |  |

Definition at line 190 of file serial.c.

void ser_LineState ( unsigned short * lineState )

Definition at line 343 of file serial.c.

void ser_OpenPort ( char portNum )

Definition at line 50 of file serial.c.

int ser_Read | ( | char * | buffer,
 |  | const int * | length
 | ) |  |

Definition at line 285 of file serial.c.

int ser_Write | ( | char | portNum,
 |  | const char * | buffer,
 |  | int * | length
 | ) |  |

Definition at line 303 of file serial.c.

void UART0_IRQHandler ( void )

Definition at line 353 of file serial.c.

void UART1_IRQHandler ( void )

Definition at line 380 of file serial.c.

Variable Documentation

SER_BUF_T ser_in

Definition at line 45 of file serial.c.

unsigned short ser_lineState

Definition at line 43 of file serial.c.

SER_BUF_T ser_out

Definition at line 44 of file serial.c.

unsigned long ser_txRestart

Definition at line 42 of file serial.c.

Generated on Mon Nov 28 2011 11:15:09 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.h File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.h File Reference

Go to the source code of this file.

Defines

#define | PORT_NUM 1

Functions

void | ser_OpenPort (char portNum)
void | ser_ClosePort (char portNum)
void | ser_InitPort0 (unsigned long baudrate, unsigned int databits, unsigned int parity, unsigned int stopbits)
void | ser_InitPort1 (unsigned long baudrate, unsigned int databits, unsigned int parity, unsigned int stopbits)
void | ser_AvailChar (int *availChar)
int | ser_Write (char portNum, const char *buffer, int *length)
int | ser_Read (char *buffer, const int *length)
void | ser_LineState (unsigned short *lineState)

Define Documentation

#define PORT_NUM 1

Definition at line 17 of file serial.h.

Function Documentation

void ser_AvailChar ( int * availChar )

Definition at line 334 of file serial.c.

void ser_ClosePort ( char portNum )

Definition at line 72 of file serial.c.

void ser_InitPort0 | ( | unsigned long | baudrate,
 |  | unsigned int | databits,
 |  | unsigned int | parity,
 |  | unsigned int | stopbits
 | ) |  |

Definition at line 95 of file serial.c.

void ser_InitPort1 | ( | unsigned long | baudrate,
 |  | unsigned int | databits,
 |  | unsigned int | parity,
 |  | unsigned int | stopbits
 | ) |  |

Definition at line 190 of file serial.c.

void ser_LineState ( unsigned short * lineState )

Definition at line 343 of file serial.c.

void ser_OpenPort ( char portNum )

Definition at line 50 of file serial.c.

int ser_Read | ( | char * | buffer,
 |  | const int * | length
 | ) |  |

Definition at line 285 of file serial.c.

int ser_Write | ( | char | portNum,
 |  | const char * | buffer,
 |  | int * | length
 | ) |  |

Definition at line 303 of file serial.c.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usb.h File Reference

Defines | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usb.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | REQUEST_HOST_TO_DEVICE 0
#define | REQUEST_DEVICE_TO_HOST 1
#define | REQUEST_STANDARD 0
#define | REQUEST_CLASS 1
#define | REQUEST_VENDOR 2
#define | REQUEST_RESERVED 3
#define | REQUEST_TO_DEVICE 0
#define | REQUEST_TO_INTERFACE 1
#define | REQUEST_TO_ENDPOINT 2
#define | REQUEST_TO_OTHER 3
#define | USB_REQUEST_GET_STATUS 0
#define | USB_REQUEST_CLEAR_FEATURE 1
#define | USB_REQUEST_SET_FEATURE 3
#define | USB_REQUEST_SET_ADDRESS 5
#define | USB_REQUEST_GET_DESCRIPTOR 6
#define | USB_REQUEST_SET_DESCRIPTOR 7
#define | USB_REQUEST_GET_CONFIGURATION 8
#define | USB_REQUEST_SET_CONFIGURATION 9
#define | USB_REQUEST_GET_INTERFACE 10
#define | USB_REQUEST_SET_INTERFACE 11
#define | USB_REQUEST_SYNC_FRAME 12
#define | USB_GETSTATUS_SELF_POWERED 0x01
#define | USB_GETSTATUS_REMOTE_WAKEUP 0x02
#define | USB_GETSTATUS_ENDPOINT_STALL 0x01
#define | USB_FEATURE_ENDPOINT_STALL 0
#define | USB_FEATURE_REMOTE_WAKEUP 1
#define | USB_DEVICE_DESCRIPTOR_TYPE 1
#define | USB_CONFIGURATION_DESCRIPTOR_TYPE 2
#define | USB_STRING_DESCRIPTOR_TYPE 3
#define | USB_INTERFACE_DESCRIPTOR_TYPE 4
#define | USB_ENDPOINT_DESCRIPTOR_TYPE 5
#define | USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE 6
#define | USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7
#define | USB_INTERFACE_POWER_DESCRIPTOR_TYPE 8
#define | USB_OTG_DESCRIPTOR_TYPE 9
#define | USB_DEBUG_DESCRIPTOR_TYPE 10
#define | USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE 11
#define | USB_DEVICE_CLASS_RESERVED 0x00
#define | USB_DEVICE_CLASS_AUDIO 0x01
#define | USB_DEVICE_CLASS_COMMUNICATIONS 0x02
#define | USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03
#define | USB_DEVICE_CLASS_MONITOR 0x04
#define | USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05
#define | USB_DEVICE_CLASS_POWER 0x06
#define | USB_DEVICE_CLASS_PRINTER 0x07
#define | USB_DEVICE_CLASS_STORAGE 0x08
#define | USB_DEVICE_CLASS_HUB 0x09
#define | USB_DEVICE_CLASS_MISCELLANEOUS 0xEF
#define | USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF
#define | USB_CONFIG_POWERED_MASK 0x40
#define | USB_CONFIG_BUS_POWERED 0x80
#define | USB_CONFIG_SELF_POWERED 0xC0
#define | USB_CONFIG_REMOTE_WAKEUP 0x20
#define | USB_CONFIG_POWER_MA(mA) ((mA)/2)
#define | USB_ENDPOINT_DIRECTION_MASK 0x80
#define | USB_ENDPOINT_OUT(addr) ((addr) | 0x00)
#define | USB_ENDPOINT_IN(addr) ((addr) | 0x80)
#define | USB_ENDPOINT_TYPE_MASK 0x03
#define | USB_ENDPOINT_TYPE_CONTROL 0x00
#define | USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01
#define | USB_ENDPOINT_TYPE_BULK 0x02
#define | USB_ENDPOINT_TYPE_INTERRUPT 0x03
#define | USB_ENDPOINT_SYNC_MASK 0x0C
#define | USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION 0x00
#define | USB_ENDPOINT_SYNC_ASYNCHRONOUS 0x04
#define | USB_ENDPOINT_SYNC_ADAPTIVE 0x08
#define | USB_ENDPOINT_SYNC_SYNCHRONOUS 0x0C
#define | USB_ENDPOINT_USAGE_MASK 0x30
#define | USB_ENDPOINT_USAGE_DATA 0x00
#define | USB_ENDPOINT_USAGE_FEEDBACK 0x10
#define | USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK 0x20
#define | USB_ENDPOINT_USAGE_RESERVED 0x30

Variables

uint16_t | W
uint8_t | L
uint8_t | H
WB
WORD_BYTE
uint8_t | Recipient
uint8_t | Type
uint8_t | Dir
BM
uint8_t | B
REQUEST_TYPE
REQUEST_TYPE bmRequestType
uint8_t | bRequest
WORD_BYTE wValue
WORD_BYTE wIndex
uint16_t | wLength
USB_SETUP_PACKET
uint8_t | bLength
uint8_t | bDescriptorType
uint16_t | bcdUSB
uint8_t | bDeviceClass
uint8_t | bDeviceSubClass
uint8_t | bDeviceProtocol
uint8_t | bMaxPacketSize0
uint16_t | idVendor
uint16_t | idProduct
uint16_t | bcdDevice
uint8_t | iManufacturer
uint8_t | iProduct
uint8_t | iSerialNumber
uint8_t | bNumConfigurations
USB_DEVICE_DESCRIPTOR
uint8_t | bReserved
USB_DEVICE_QUALIFIER_DESCRIPTOR
uint16_t | wTotalLength
uint8_t | bNumInterfaces
uint8_t | bConfigurationValue
uint8_t | iConfiguration
uint8_t | bmAttributes
uint8_t | bMaxPower
USB_CONFIGURATION_DESCRIPTOR
uint8_t | bInterfaceNumber
uint8_t | bAlternateSetting
uint8_t | bNumEndpoints
uint8_t | bInterfaceClass
uint8_t | bInterfaceSubClass
uint8_t | bInterfaceProtocol
uint8_t | iInterface
USB_INTERFACE_DESCRIPTOR
uint8_t | bEndpointAddress
uint16_t | wMaxPacketSize
uint8_t | bInterval
USB_ENDPOINT_DESCRIPTOR
uint16_t | bString
USB_STRING_DESCRIPTOR
USB_COMMON_DESCRIPTOR

Define Documentation

#define REQUEST_CLASS 1

Definition at line 62 of file usb.h.

#define REQUEST_DEVICE_TO_HOST 1

Definition at line 58 of file usb.h.

#define REQUEST_HOST_TO_DEVICE 0

Definition at line 57 of file usb.h.

#define REQUEST_RESERVED 3

Definition at line 64 of file usb.h.

#define REQUEST_STANDARD 0

Definition at line 61 of file usb.h.

#define REQUEST_TO_DEVICE 0

Definition at line 67 of file usb.h.

#define REQUEST_TO_ENDPOINT 2

Definition at line 69 of file usb.h.

#define REQUEST_TO_INTERFACE 1

Definition at line 68 of file usb.h.

#define REQUEST_TO_OTHER 3

Definition at line 70 of file usb.h.

#define REQUEST_VENDOR 2

Definition at line 63 of file usb.h.

#define USB_CONFIG_BUS_POWERED 0x80

Definition at line 173 of file usb.h.

#define USB_CONFIG_POWER_MA ( mA ) ((mA)/2)

Definition at line 178 of file usb.h.

#define USB_CONFIG_POWERED_MASK 0x40

Definition at line 172 of file usb.h.

#define USB_CONFIG_REMOTE_WAKEUP 0x20

Definition at line 175 of file usb.h.

#define USB_CONFIG_SELF_POWERED 0xC0

Definition at line 174 of file usb.h.

#define USB_CONFIGURATION_DESCRIPTOR_TYPE 2

Definition at line 146 of file usb.h.

#define USB_DEBUG_DESCRIPTOR_TYPE 10

Definition at line 154 of file usb.h.

#define USB_DEVICE_CLASS_AUDIO 0x01

Definition at line 159 of file usb.h.

#define USB_DEVICE_CLASS_COMMUNICATIONS 0x02

Definition at line 160 of file usb.h.

#define USB_DEVICE_CLASS_HUB 0x09

Definition at line 167 of file usb.h.

#define USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03

Definition at line 161 of file usb.h.

#define USB_DEVICE_CLASS_MISCELLANEOUS 0xEF

Definition at line 168 of file usb.h.

#define USB_DEVICE_CLASS_MONITOR 0x04

Definition at line 162 of file usb.h.

#define USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05

Definition at line 163 of file usb.h.

#define USB_DEVICE_CLASS_POWER 0x06

Definition at line 164 of file usb.h.

#define USB_DEVICE_CLASS_PRINTER 0x07

Definition at line 165 of file usb.h.

#define USB_DEVICE_CLASS_RESERVED 0x00

Definition at line 158 of file usb.h.

#define USB_DEVICE_CLASS_STORAGE 0x08

Definition at line 166 of file usb.h.

#define USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF

Definition at line 169 of file usb.h.

#define USB_DEVICE_DESCRIPTOR_TYPE 1

Definition at line 145 of file usb.h.

#define USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE 6

Definition at line 150 of file usb.h.

#define USB_ENDPOINT_DESCRIPTOR_TYPE 5

Definition at line 149 of file usb.h.

#define USB_ENDPOINT_DIRECTION_MASK 0x80

Definition at line 181 of file usb.h.

#define USB_ENDPOINT_IN ( addr ) ((addr) | 0x80)

Definition at line 183 of file usb.h.

#define USB_ENDPOINT_OUT ( addr ) ((addr) | 0x00)

Definition at line 182 of file usb.h.

#define USB_ENDPOINT_SYNC_ADAPTIVE 0x08

Definition at line 194 of file usb.h.

#define USB_ENDPOINT_SYNC_ASYNCHRONOUS 0x04

Definition at line 193 of file usb.h.

#define USB_ENDPOINT_SYNC_MASK 0x0C

Definition at line 191 of file usb.h.

#define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION 0x00

Definition at line 192 of file usb.h.

#define USB_ENDPOINT_SYNC_SYNCHRONOUS 0x0C

Definition at line 195 of file usb.h.

#define USB_ENDPOINT_TYPE_BULK 0x02

Definition at line 189 of file usb.h.

#define USB_ENDPOINT_TYPE_CONTROL 0x00

Definition at line 187 of file usb.h.

#define USB_ENDPOINT_TYPE_INTERRUPT 0x03

Definition at line 190 of file usb.h.

#define USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01

Definition at line 188 of file usb.h.

#define USB_ENDPOINT_TYPE_MASK 0x03

Definition at line 186 of file usb.h.

#define USB_ENDPOINT_USAGE_DATA 0x00

Definition at line 197 of file usb.h.

#define USB_ENDPOINT_USAGE_FEEDBACK 0x10

Definition at line 198 of file usb.h.

#define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK 0x20

Definition at line 199 of file usb.h.

#define USB_ENDPOINT_USAGE_MASK 0x30

Definition at line 196 of file usb.h.

#define USB_ENDPOINT_USAGE_RESERVED 0x30

Definition at line 200 of file usb.h.

#define USB_FEATURE_ENDPOINT_STALL 0

Definition at line 121 of file usb.h.

#define USB_FEATURE_REMOTE_WAKEUP 1

Definition at line 122 of file usb.h.

#define USB_GETSTATUS_ENDPOINT_STALL 0x01

Definition at line 118 of file usb.h.

#define USB_GETSTATUS_REMOTE_WAKEUP 0x02

Definition at line 117 of file usb.h.

#define USB_GETSTATUS_SELF_POWERED 0x01

Definition at line 116 of file usb.h.

#define USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE 11

Definition at line 155 of file usb.h.

#define USB_INTERFACE_DESCRIPTOR_TYPE 4

Definition at line 148 of file usb.h.

#define USB_INTERFACE_POWER_DESCRIPTOR_TYPE 8

Definition at line 152 of file usb.h.

#define USB_OTG_DESCRIPTOR_TYPE 9

Definition at line 153 of file usb.h.

#define USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7

Definition at line 151 of file usb.h.

#define USB_REQUEST_CLEAR_FEATURE 1

Definition at line 104 of file usb.h.

#define USB_REQUEST_GET_CONFIGURATION 8

Definition at line 109 of file usb.h.

#define USB_REQUEST_GET_DESCRIPTOR 6

Definition at line 107 of file usb.h.

#define USB_REQUEST_GET_INTERFACE 10

Definition at line 111 of file usb.h.

#define USB_REQUEST_GET_STATUS 0

Definition at line 103 of file usb.h.

#define USB_REQUEST_SET_ADDRESS 5

Definition at line 106 of file usb.h.

#define USB_REQUEST_SET_CONFIGURATION 9

Definition at line 110 of file usb.h.

#define USB_REQUEST_SET_DESCRIPTOR 7

Definition at line 108 of file usb.h.

#define USB_REQUEST_SET_FEATURE 3

Definition at line 105 of file usb.h.

#define USB_REQUEST_SET_INTERFACE 11

Definition at line 112 of file usb.h.

#define USB_REQUEST_SYNC_FRAME 12

Definition at line 113 of file usb.h.

#define USB_STRING_DESCRIPTOR_TYPE 3

Definition at line 147 of file usb.h.

Variable Documentation

uint8_t B

Definition at line 96 of file usb.h.

uint8_t bAlternateSetting

Definition at line 286 of file usb.h.

uint16_t bcdDevice

Definition at line 220 of file usb.h.

uint16_t bcdUSB

Definition at line 213 of file usb.h.

uint8_t bConfigurationValue

Definition at line 265 of file usb.h.

uint8_t bDescriptorType

Definition at line 212 of file usb.h.

uint8_t bDeviceClass

Definition at line 214 of file usb.h.

uint8_t bDeviceProtocol

Definition at line 216 of file usb.h.

uint8_t bDeviceSubClass

Definition at line 215 of file usb.h.

uint8_t bEndpointAddress

Definition at line 308 of file usb.h.

uint8_t bInterfaceClass

Definition at line 288 of file usb.h.

uint8_t bInterfaceNumber

Definition at line 285 of file usb.h.

uint8_t bInterfaceProtocol

Definition at line 290 of file usb.h.

uint8_t bInterfaceSubClass

Definition at line 289 of file usb.h.

uint8_t bInterval

Definition at line 311 of file usb.h.

uint8_t bLength

Definition at line 211 of file usb.h.

BM

Definition at line 92 of file usb.h.

uint8_t bmAttributes

Definition at line 267 of file usb.h.

uint8_t bMaxPacketSize0

Definition at line 217 of file usb.h.

uint8_t bMaxPower

Definition at line 268 of file usb.h.

REQUEST_TYPE bmRequestType

Definition at line 133 of file usb.h.

uint8_t bNumConfigurations

Definition at line 224 of file usb.h.

uint8_t bNumEndpoints

Definition at line 287 of file usb.h.

uint8_t bNumInterfaces

Definition at line 264 of file usb.h.

uint8_t bRequest

Definition at line 134 of file usb.h.

uint8_t bReserved

Definition at line 247 of file usb.h.

uint16_t bString

Definition at line 328 of file usb.h.

uint8_t Dir

Definition at line 91 of file usb.h.

uint8_t H

Definition at line 45 of file usb.h.

uint8_t iConfiguration

Definition at line 266 of file usb.h.

uint16_t idProduct

Definition at line 219 of file usb.h.

uint16_t idVendor

Definition at line 218 of file usb.h.

uint8_t iInterface

Definition at line 291 of file usb.h.

uint8_t iManufacturer

Definition at line 221 of file usb.h.

uint8_t iProduct

Definition at line 222 of file usb.h.

uint8_t iSerialNumber

Definition at line 223 of file usb.h.

uint8_t L

Definition at line 44 of file usb.h.

uint8_t Recipient

Definition at line 89 of file usb.h.

REQUEST_TYPE

Definition at line 97 of file usb.h.

uint8_t Type

Definition at line 90 of file usb.h.

USB_COMMON_DESCRIPTOR

Definition at line 345 of file usb.h.

USB_CONFIGURATION_DESCRIPTOR

Definition at line 269 of file usb.h.

USB_DEVICE_DESCRIPTOR

Definition at line 225 of file usb.h.

USB_DEVICE_QUALIFIER_DESCRIPTOR

Definition at line 248 of file usb.h.

USB_ENDPOINT_DESCRIPTOR

Definition at line 312 of file usb.h.

USB_INTERFACE_DESCRIPTOR

Definition at line 292 of file usb.h.

USB_SETUP_PACKET

Definition at line 138 of file usb.h.

USB_STRING_DESCRIPTOR

Definition at line 329 of file usb.h.

uint16_t W

Definition at line 35 of file usb.h.

WB

Definition at line 46 of file usb.h.

WORD_BYTE wIndex

Definition at line 136 of file usb.h.

uint16_t wLength

Definition at line 137 of file usb.h.

uint16_t wMaxPacketSize

Definition at line 310 of file usb.h.

WORD_BYTE

Definition at line 50 of file usb.h.

uint16_t wTotalLength

Definition at line 263 of file usb.h.

WORD_BYTE wValue

Definition at line 135 of file usb.h.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcfg.h File Reference

Go to the source code of this file.

Defines

#define | USB_POWER 0
#define | USB_IF_NUM 4
#define | USB_EP_NUM 32
#define | USB_MAX_PACKET0 8
#define | USB_DMA 0
#define | USB_DMA_EP 0x00000000
#define | USB_POWER_EVENT 0
#define | USB_RESET_EVENT 1
#define | USB_SUSPEND_EVENT 0
#define | USB_RESUME_EVENT 0
#define | USB_WAKEUP_EVENT 0
#define | USB_SOF_EVENT 0
#define | USB_ERROR_EVENT 0
#define | USB_EP_EVENT 0x0007
#define | USB_CONFIGURE_EVENT 1
#define | USB_INTERFACE_EVENT 0
#define | USB_FEATURE_EVENT 0
#define | USB_CLASS 1
#define | USB_HID 0
#define | USB_HID_IF_NUM 0
#define | USB_MSC 0
#define | USB_MSC_IF_NUM 0
#define | USB_AUDIO 0
#define | USB_ADC_CIF_NUM 0
#define | USB_ADC_SIF1_NUM 1
#define | USB_ADC_SIF2_NUM 2
#define | USB_CDC 1
#define | USB_CDC_CIF_NUM 0
#define | USB_CDC_DIF_NUM 1
#define | USB_CDC_BUFSIZE 64
#define | USB_VENDOR 0

Define Documentation

#define USB_ADC_CIF_NUM 0

Definition at line 165 of file usbcfg.h.

#define USB_ADC_SIF1_NUM 1

Definition at line 166 of file usbcfg.h.

#define USB_ADC_SIF2_NUM 2

Definition at line 167 of file usbcfg.h.

#define USB_AUDIO 0

Definition at line 164 of file usbcfg.h.

#define USB_CDC 1

Definition at line 168 of file usbcfg.h.

#define USB_CDC_BUFSIZE 64

Definition at line 171 of file usbcfg.h.

#define USB_CDC_CIF_NUM 0

Definition at line 169 of file usbcfg.h.

#define USB_CDC_DIF_NUM 1

Definition at line 170 of file usbcfg.h.

#define USB_CLASS 1

Definition at line 159 of file usbcfg.h.

#define USB_CONFIGURE_EVENT 1

Definition at line 131 of file usbcfg.h.

#define USB_DMA 0

Definition at line 82 of file usbcfg.h.

#define USB_DMA_EP 0x00000000

Definition at line 83 of file usbcfg.h.

#define USB_EP_EVENT 0x0007

Definition at line 130 of file usbcfg.h.

#define USB_EP_NUM 32

Definition at line 80 of file usbcfg.h.

#define USB_ERROR_EVENT 0

Definition at line 129 of file usbcfg.h.

#define USB_FEATURE_EVENT 0

Definition at line 133 of file usbcfg.h.

#define USB_HID 0

Definition at line 160 of file usbcfg.h.

#define USB_HID_IF_NUM 0

Definition at line 161 of file usbcfg.h.

#define USB_IF_NUM 4

Definition at line 79 of file usbcfg.h.

#define USB_INTERFACE_EVENT 0

Definition at line 132 of file usbcfg.h.

#define USB_MAX_PACKET0 8

Definition at line 81 of file usbcfg.h.

#define USB_MSC 0

Definition at line 162 of file usbcfg.h.

#define USB_MSC_IF_NUM 0

Definition at line 163 of file usbcfg.h.

#define USB_POWER 0

Definition at line 78 of file usbcfg.h.

#define USB_POWER_EVENT 0

Definition at line 123 of file usbcfg.h.

#define USB_RESET_EVENT 1

Definition at line 124 of file usbcfg.h.

#define USB_RESUME_EVENT 0

Definition at line 126 of file usbcfg.h.

#define USB_SOF_EVENT 0

Definition at line 128 of file usbcfg.h.

#define USB_SUSPEND_EVENT 0

Definition at line 125 of file usbcfg.h.

#define USB_VENDOR 0

Definition at line 178 of file usbcfg.h.

#define USB_WAKEUP_EVENT 0

Definition at line 127 of file usbcfg.h.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.c File Reference
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbdesc.h"
#include "usbuser.h"

Go to the source code of this file.

Functions

void | USB_ResetCore (void)
void | USB_SetupStage (void)
void | USB_DataInStage (void)
void | USB_DataOutStage (void)
void | USB_StatusInStage (void)
void | USB_StatusOutStage (void)
__inline uint32_t | USB_ReqGetStatus (void)
__inline uint32_t | USB_ReqSetClrFeature (uint32_t sc)
__inline uint32_t | USB_ReqSetAddress (void)
__inline uint32_t | USB_ReqGetDescriptor (void)
__inline uint32_t | USB_ReqGetConfiguration (void)
__inline uint32_t | USB_ReqSetConfiguration (void)
__inline uint32_t | USB_ReqGetInterface (void)
__inline uint32_t | USB_ReqSetInterface (void)
void | USB_EndPoint0 (uint32_t event)

Variables

uint16_t | USB_DeviceStatus
uint8_t | USB_DeviceAddress
uint8_t | USB_Configuration
uint32_t | USB_EndPointMask
uint32_t | USB_EndPointHalt
uint32_t | USB_EndPointStall
uint8_t | USB_NumInterfaces
uint8_t | USB_AltSetting [USB_IF_NUM]
uint8_t | EP0Buf [USB_MAX_PACKET0]
USB_EP_DATA EP0Data
USB_SETUP_PACKET SetupPacket

Function Documentation

void USB_DataInStage ( void )

Definition at line 121 of file usbcore.c.

void USB_DataOutStage ( void )

Definition at line 141 of file usbcore.c.

void USB_EndPoint0 ( uint32_t event )

Definition at line 625 of file usbcore.c.

__inline uint32_t USB_ReqGetConfiguration ( void )

Definition at line 401 of file usbcore.c.

__inline uint32_t USB_ReqGetDescriptor ( void )

Definition at line 314 of file usbcore.c.

__inline uint32_t USB_ReqGetInterface ( void )

Definition at line 525 of file usbcore.c.

__inline uint32_t USB_ReqGetStatus ( void )

Definition at line 181 of file usbcore.c.

__inline uint32_t USB_ReqSetAddress ( void )

Definition at line 292 of file usbcore.c.

__inline uint32_t USB_ReqSetClrFeature ( uint32_t sc )

Definition at line 226 of file usbcore.c.

__inline uint32_t USB_ReqSetConfiguration ( void )

Definition at line 423 of file usbcore.c.

__inline uint32_t USB_ReqSetInterface ( void )

Definition at line 550 of file usbcore.c.

void USB_ResetCore ( void )

Definition at line 93 of file usbcore.c.

void USB_SetupStage ( void )

Definition at line 110 of file usbcore.c.

void USB_StatusInStage ( void )

Definition at line 156 of file usbcore.c.

void USB_StatusOutStage ( void )

Definition at line 167 of file usbcore.c.

Variable Documentation

uint8_t EP0Buf[USB_MAX_PACKET0]

Definition at line 79 of file usbcore.c.

USB_EP_DATA EP0Data

Definition at line 82 of file usbcore.c.

USB_SETUP_PACKET SetupPacket

Definition at line 84 of file usbcore.c.

uint8_t USB_AltSetting[USB_IF_NUM]

Definition at line 77 of file usbcore.c.

uint8_t USB_Configuration

Definition at line 72 of file usbcore.c.

uint8_t USB_DeviceAddress

Definition at line 71 of file usbcore.c.

uint16_t USB_DeviceStatus

Definition at line 70 of file usbcore.c.

uint32_t USB_EndPointHalt

Definition at line 74 of file usbcore.c.

uint32_t USB_EndPointMask

Definition at line 73 of file usbcore.c.

uint32_t USB_EndPointStall

Definition at line 75 of file usbcore.c.

uint8_t USB_NumInterfaces

Definition at line 76 of file usbcore.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.h File Reference

Data Structures | Typedefs | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.h File Reference

Go to the source code of this file.

Data Structures

struct | _USB_EP_DATA

Typedefs

typedef struct _USB_EP_DATA | USB_EP_DATA

Functions

void | USB_ResetCore (void)

Variables

uint16_t | USB_DeviceStatus
uint8_t | USB_DeviceAddress
uint8_t | USB_Configuration
uint32_t | USB_EndPointMask
uint32_t | USB_EndPointHalt
uint32_t | USB_EndPointStall
uint8_t | USB_AltSetting [USB_IF_NUM]
uint8_t | EP0Buf [USB_MAX_PACKET0]
USB_EP_DATA EP0Data
USB_SETUP_PACKET SetupPacket

Typedef Documentation

typedef struct _USB_EP_DATA USB_EP_DATA

Function Documentation

void USB_ResetCore ( void )

Definition at line 99 of file usbcore.c.

Variable Documentation

uint8_t EP0Buf[USB_MAX_PACKET0]

Definition at line 85 of file usbcore.c.

USB_EP_DATA EP0Data

Definition at line 88 of file usbcore.c.

USB_SETUP_PACKET SetupPacket

Definition at line 90 of file usbcore.c.

uint8_t USB_AltSetting[USB_IF_NUM]

Definition at line 83 of file usbcore.c.

uint8_t USB_Configuration

Definition at line 78 of file usbcore.c.

uint8_t USB_DeviceAddress

Definition at line 77 of file usbcore.c.

uint16_t USB_DeviceStatus

Definition at line 76 of file usbcore.c.

uint32_t USB_EndPointHalt

Definition at line 80 of file usbcore.c.

uint32_t USB_EndPointMask

Definition at line 79 of file usbcore.c.

uint32_t USB_EndPointStall

Definition at line 81 of file usbcore.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbdesc.c File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbdesc.c File Reference
#include "lpc_types.h"
#include "usb.h"
#include "cdc.h"
#include "usbcfg.h"
#include "usbdesc.h"

Go to the source code of this file.

Variables

const uint8_t | USB_DeviceDescriptor []
const uint8_t | USB_ConfigDescriptor []
const uint8_t | USB_StringDescriptor []

Variable Documentation

const uint8_t USB_ConfigDescriptor[]

Definition at line 49 of file usbdesc.c.

const uint8_t USB_DeviceDescriptor[]
Initial value:
 {
  USB_DEVICE_DESC_SIZE,
  USB_DEVICE_DESCRIPTOR_TYPE,
  WBVAL(0x0200),
  USB_DEVICE_CLASS_COMMUNICATIONS,
  0x00,
  0x00,
  USB_MAX_PACKET0,
  WBVAL(0x1FC9),
  WBVAL(0x2002),
  WBVAL(0x0100),
  0x01,
  0x02,
  0x03,
  0x01
}

Definition at line 30 of file usbdesc.c.

const uint8_t USB_StringDescriptor[]

Definition at line 138 of file usbdesc.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbdesc.h File Reference

Defines | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbdesc.h File Reference

Go to the source code of this file.

Defines

#define | WBVAL(x) (x & 0xFF),((x >> 8) & 0xFF)
#define | USB_DEVICE_DESC_SIZE (sizeof(USB_DEVICE_DESCRIPTOR))
#define | USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))
#define | USB_INTERFACE_DESC_SIZE (sizeof(USB_INTERFACE_DESCRIPTOR))
#define | USB_ENDPOINT_DESC_SIZE (sizeof(USB_ENDPOINT_DESCRIPTOR))

Variables

const uint8_t | USB_DeviceDescriptor []
const uint8_t | USB_ConfigDescriptor []
const uint8_t | USB_StringDescriptor []

Define Documentation

#define USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))

Definition at line 26 of file usbdesc.h.

#define USB_DEVICE_DESC_SIZE (sizeof(USB_DEVICE_DESCRIPTOR))

Definition at line 25 of file usbdesc.h.

#define USB_ENDPOINT_DESC_SIZE (sizeof(USB_ENDPOINT_DESCRIPTOR))

Definition at line 28 of file usbdesc.h.

#define USB_INTERFACE_DESC_SIZE (sizeof(USB_INTERFACE_DESCRIPTOR))

Definition at line 27 of file usbdesc.h.

#define WBVAL ( x ) (x & 0xFF),((x >> 8) & 0xFF)

Definition at line 23 of file usbdesc.h.

Variable Documentation

const uint8_t USB_ConfigDescriptor[]

Definition at line 50 of file usbdesc.c.

const uint8_t USB_DeviceDescriptor[]

Definition at line 31 of file usbdesc.c.

const uint8_t USB_StringDescriptor[]

Definition at line 185 of file usbdesc.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.c File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.c File Reference
#include "LPC17xx.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbreg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbuser.h"

Go to the source code of this file.

Defines

#define | EP_MSK_CTRL 0x0001
#define | EP_MSK_BULK 0xC924
#define | EP_MSK_INT 0x4492
#define | EP_MSK_ISO 0x1248

Functions

uint32_t | EPAdr (uint32_t EPNum)
void | WrCmd (uint32_t cmd)
void | WrCmdDat (uint32_t cmd, uint32_t val)
void | WrCmdEP (uint32_t EPNum, uint32_t cmd)
uint32_t | RdCmdDat (uint32_t cmd)
void | USB_Init (void)
void | USB_Connect (uint32_t con)
void | USB_Reset (void)
void | USB_Suspend (void)
void | USB_Resume (void)
void | USB_WakeUp (void)
void | USB_WakeUpCfg (uint32_t cfg)
void | USB_SetAddress (uint32_t adr)
void | USB_Configure (uint32_t cfg)
void | USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD)
void | USB_DirCtrlEP (uint32_t dir)
void | USB_EnableEP (uint32_t EPNum)
void | USB_DisableEP (uint32_t EPNum)
void | USB_ResetEP (uint32_t EPNum)
void | USB_SetStallEP (uint32_t EPNum)
void | USB_ClrStallEP (uint32_t EPNum)
void | USB_ClearEPBuf (uint32_t EPNum)
uint32_t | USB_ReadEP (uint32_t EPNum, uint8_t *pData)
uint32_t | USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt)
uint32_t | USB_GetFrame (void)
void | USB_IRQHandler (void)

Define Documentation

#define EP_MSK_BULK 0xC924

Definition at line 36 of file usbhw.c.

#define EP_MSK_CTRL 0x0001

Definition at line 35 of file usbhw.c.

#define EP_MSK_INT 0x4492

Definition at line 37 of file usbhw.c.

#define EP_MSK_ISO 0x1248

Definition at line 38 of file usbhw.c.

Function Documentation

uint32_t EPAdr ( uint32_t EPNum )

Definition at line 63 of file usbhw.c.

uint32_t RdCmdDat ( uint32_t cmd )

Definition at line 130 of file usbhw.c.

void USB_ClearEPBuf ( uint32_t EPNum )

Definition at line 400 of file usbhw.c.

void USB_ClrStallEP ( uint32_t EPNum )

Definition at line 387 of file usbhw.c.

void USB_ConfigEP ( USB_ENDPOINT_DESCRIPTOR * pEPD )

Definition at line 304 of file usbhw.c.

void USB_Configure ( uint32_t cfg )

Definition at line 288 of file usbhw.c.

void USB_Connect ( uint32_t con )

Definition at line 175 of file usbhw.c.

void USB_DirCtrlEP ( uint32_t dir )

Definition at line 322 of file usbhw.c.

void USB_DisableEP ( uint32_t EPNum )

Definition at line 348 of file usbhw.c.

void USB_EnableEP ( uint32_t EPNum )

Definition at line 335 of file usbhw.c.

uint32_t USB_GetFrame ( void )

Definition at line 643 of file usbhw.c.

void USB_Init ( void )

Definition at line 145 of file usbhw.c.

void USB_IRQHandler ( void )

Definition at line 658 of file usbhw.c.

uint32_t USB_ReadEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData
 | ) |  |

Definition at line 414 of file usbhw.c.

void USB_Reset ( void )

Definition at line 186 of file usbhw.c.

void USB_ResetEP ( uint32_t EPNum )

Definition at line 361 of file usbhw.c.

void USB_Resume ( void )

Definition at line 240 of file usbhw.c.

void USB_SetAddress ( uint32_t adr )

Definition at line 276 of file usbhw.c.

void USB_SetStallEP ( uint32_t EPNum )

Definition at line 374 of file usbhw.c.

void USB_Suspend ( void )

Definition at line 229 of file usbhw.c.

void USB_WakeUp ( void )

Definition at line 251 of file usbhw.c.

void USB_WakeUpCfg ( uint32_t cfg )

Definition at line 265 of file usbhw.c.

uint32_t USB_WriteEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData,
 |  | uint32_t | cnt
 | ) |  |

Definition at line 448 of file usbhw.c.

void WrCmd ( uint32_t cmd )

Definition at line 80 of file usbhw.c.

void WrCmdDat | ( | uint32_t | cmd,
 |  | uint32_t | val
 | ) |  |

Definition at line 95 of file usbhw.c.

void WrCmdEP | ( | uint32_t | EPNum,
 |  | uint32_t | cmd
 | ) |  |

Definition at line 113 of file usbhw.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.h File Reference

Data Structures | Defines | Typedefs | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Data Structures

struct | _USB_DMA_DESCRIPTOR

Defines

#define | USB_RAM_ADR 0x20080000
#define | USB_RAM_SZ 0x00004000
#define | DD_NISO_CNT 16
#define | DD_ISO_CNT 8
#define | DD_NISO_SZ (DD_NISO_CNT * 16)
#define | DD_ISO_SZ (DD_ISO_CNT * 20)
#define | DD_NISO_ADR (USB_RAM_ADR + 128)
#define | DD_ISO_ADR (DD_NISO_ADR + DD_NISO_SZ)
#define | DD_SZ (128 + DD_NISO_SZ + DD_ISO_SZ)
#define | DMA_BUF_ADR (USB_RAM_ADR + DD_SZ)
#define | DMA_BUF_SZ (USB_RAM_SZ - DD_SZ)
#define | USB_ERR_PID 0x0001
#define | USB_ERR_UEPKT 0x0002
#define | USB_ERR_DCRC 0x0004
#define | USB_ERR_TIMOUT 0x0008
#define | USB_ERR_EOP 0x0010
#define | USB_ERR_B_OVRN 0x0020
#define | USB_ERR_BTSTF 0x0040
#define | USB_ERR_TGL 0x0080
#define | USB_DMA_INVALID 0x0000
#define | USB_DMA_IDLE 0x0001
#define | USB_DMA_BUSY 0x0002
#define | USB_DMA_DONE 0x0003
#define | USB_DMA_OVER_RUN 0x0004
#define | USB_DMA_UNDER_RUN 0x0005
#define | USB_DMA_ERROR 0x0006
#define | USB_DMA_UNKNOWN 0xFFFF

Typedefs

typedef struct _USB_DMA_DESCRIPTOR | USB_DMA_DESCRIPTOR

Functions

void | USB_Init (void)
void | USB_Connect (uint32_t con)
void | USB_Reset (void)
void | USB_Suspend (void)
void | USB_Resume (void)
void | USB_WakeUp (void)
void | USB_WakeUpCfg (uint32_t cfg)
void | USB_SetAddress (uint32_t adr)
void | USB_Configure (uint32_t cfg)
void | USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD)
void | USB_DirCtrlEP (uint32_t dir)
void | USB_EnableEP (uint32_t EPNum)
void | USB_DisableEP (uint32_t EPNum)
void | USB_ResetEP (uint32_t EPNum)
void | USB_SetStallEP (uint32_t EPNum)
void | USB_ClrStallEP (uint32_t EPNum)
void | USB_ClearEPBuf (uint32_t EPNum)
uint32_t | USB_ReadEP (uint32_t EPNum, uint8_t *pData)
uint32_t | USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt)
uint32_t | USB_DMA_Setup (uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD)
void | USB_DMA_Enable (uint32_t EPNum)
void | USB_DMA_Disable (uint32_t EPNum)
uint32_t | USB_DMA_Status (uint32_t EPNum)
uint32_t | USB_DMA_BufAdr (uint32_t EPNum)
uint32_t | USB_DMA_BufCnt (uint32_t EPNum)
uint32_t | USB_GetFrame (void)
void | USB_IRQHandler (void)

Define Documentation

#define DD_ISO_ADR (DD_NISO_ADR + DD_NISO_SZ)

Definition at line 37 of file usbhw.h.

#define DD_ISO_CNT 8

Definition at line 33 of file usbhw.h.

#define DD_ISO_SZ (DD_ISO_CNT * 20)

Definition at line 35 of file usbhw.h.

#define DD_NISO_ADR (USB_RAM_ADR + 128)

Definition at line 36 of file usbhw.h.

#define DD_NISO_CNT 16

Definition at line 32 of file usbhw.h.

#define DD_NISO_SZ (DD_NISO_CNT * 16)

Definition at line 34 of file usbhw.h.

#define DD_SZ (128 + DD_NISO_SZ + DD_ISO_SZ)

Definition at line 38 of file usbhw.h.

#define DMA_BUF_ADR (USB_RAM_ADR + DD_SZ)

Definition at line 41 of file usbhw.h.

#define DMA_BUF_SZ (USB_RAM_SZ - DD_SZ)

Definition at line 42 of file usbhw.h.

#define USB_DMA_BUSY 0x0002

Definition at line 57 of file usbhw.h.

#define USB_DMA_DONE 0x0003

Definition at line 58 of file usbhw.h.

#define USB_DMA_ERROR 0x0006

Definition at line 61 of file usbhw.h.

#define USB_DMA_IDLE 0x0001

Definition at line 56 of file usbhw.h.

#define USB_DMA_INVALID 0x0000

Definition at line 55 of file usbhw.h.

#define USB_DMA_OVER_RUN 0x0004

Definition at line 59 of file usbhw.h.

#define USB_DMA_UNDER_RUN 0x0005

Definition at line 60 of file usbhw.h.

#define USB_DMA_UNKNOWN 0xFFFF

Definition at line 62 of file usbhw.h.

#define USB_ERR_B_OVRN 0x0020

Definition at line 50 of file usbhw.h.

#define USB_ERR_BTSTF 0x0040

Definition at line 51 of file usbhw.h.

#define USB_ERR_DCRC 0x0004

Definition at line 47 of file usbhw.h.

#define USB_ERR_EOP 0x0010

Definition at line 49 of file usbhw.h.

#define USB_ERR_PID 0x0001

Definition at line 45 of file usbhw.h.

#define USB_ERR_TGL 0x0080

Definition at line 52 of file usbhw.h.

#define USB_ERR_TIMOUT 0x0008

Definition at line 48 of file usbhw.h.

#define USB_ERR_UEPKT 0x0002

Definition at line 46 of file usbhw.h.

#define USB_RAM_ADR 0x20080000

Definition at line 28 of file usbhw.h.

#define USB_RAM_SZ 0x00004000

Definition at line 29 of file usbhw.h.

Typedef Documentation

typedef struct _USB_DMA_DESCRIPTOR USB_DMA_DESCRIPTOR

Function Documentation

void USB_ClearEPBuf ( uint32_t EPNum )

Definition at line 403 of file usbhw.c.

void USB_ClrStallEP ( uint32_t EPNum )

Definition at line 390 of file usbhw.c.

void USB_ConfigEP ( USB_ENDPOINT_DESCRIPTOR * pEPD )

Definition at line 307 of file usbhw.c.

void USB_Configure ( uint32_t cfg )

Definition at line 291 of file usbhw.c.

void USB_Connect ( uint32_t con )

Definition at line 178 of file usbhw.c.

void USB_DirCtrlEP ( uint32_t dir )

Definition at line 325 of file usbhw.c.

void USB_DisableEP ( uint32_t EPNum )

Definition at line 351 of file usbhw.c.

uint32_t USB_DMA_BufAdr ( uint32_t EPNum )
uint32_t USB_DMA_BufCnt ( uint32_t EPNum )
void USB_DMA_Disable ( uint32_t EPNum )
void USB_DMA_Enable ( uint32_t EPNum )
uint32_t USB_DMA_Setup | ( | uint32_t | EPNum,
 |  | USB_DMA_DESCRIPTOR * | pDD
 | ) |  |
uint32_t USB_DMA_Status ( uint32_t EPNum )
void USB_EnableEP ( uint32_t EPNum )

Definition at line 338 of file usbhw.c.

uint32_t USB_GetFrame ( void )

Definition at line 647 of file usbhw.c.

void USB_Init ( void )

Definition at line 148 of file usbhw.c.

void USB_IRQHandler ( void )

Definition at line 662 of file usbhw.c.

uint32_t USB_ReadEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData
 | ) |  |

Definition at line 417 of file usbhw.c.

void USB_Reset ( void )

Definition at line 189 of file usbhw.c.

void USB_ResetEP ( uint32_t EPNum )

Definition at line 364 of file usbhw.c.

void USB_Resume ( void )

Definition at line 243 of file usbhw.c.

void USB_SetAddress ( uint32_t adr )

Definition at line 279 of file usbhw.c.

void USB_SetStallEP ( uint32_t EPNum )

Definition at line 377 of file usbhw.c.

void USB_Suspend ( void )

Definition at line 232 of file usbhw.c.

void USB_WakeUp ( void )

Definition at line 254 of file usbhw.c.

void USB_WakeUpCfg ( uint32_t cfg )

Definition at line 268 of file usbhw.c.

uint32_t USB_WriteEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData,
 |  | uint32_t | cnt
 | ) |  |

Definition at line 450 of file usbhw.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbreg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbreg.h File Reference

Go to the source code of this file.

Defines

#define | FRAME_INT 0x00000001
#define | EP_FAST_INT 0x00000002
#define | EP_SLOW_INT 0x00000004
#define | DEV_STAT_INT 0x00000008
#define | CCEMTY_INT 0x00000010
#define | CDFULL_INT 0x00000020
#define | RxENDPKT_INT 0x00000040
#define | TxENDPKT_INT 0x00000080
#define | EP_RLZED_INT 0x00000100
#define | ERR_INT 0x00000200
#define | PKT_LNGTH_MASK 0x000003FF
#define | PKT_DV 0x00000400
#define | PKT_RDY 0x00000800
#define | CTRL_RD_EN 0x00000001
#define | CTRL_WR_EN 0x00000002
#define | CMD_SET_ADDR 0x00D00500
#define | CMD_CFG_DEV 0x00D80500
#define | CMD_SET_MODE 0x00F30500
#define | CMD_RD_FRAME 0x00F50500
#define | DAT_RD_FRAME 0x00F50200
#define | CMD_RD_TEST 0x00FD0500
#define | DAT_RD_TEST 0x00FD0200
#define | CMD_SET_DEV_STAT 0x00FE0500
#define | CMD_GET_DEV_STAT 0x00FE0500
#define | DAT_GET_DEV_STAT 0x00FE0200
#define | CMD_GET_ERR_CODE 0x00FF0500
#define | DAT_GET_ERR_CODE 0x00FF0200
#define | CMD_RD_ERR_STAT 0x00FB0500
#define | DAT_RD_ERR_STAT 0x00FB0200
#define | DAT_WR_BYTE(x) (0x00000100 | ((x) << 16))
#define | CMD_SEL_EP(x) (0x00000500 | ((x) << 16))
#define | DAT_SEL_EP(x) (0x00000200 | ((x) << 16))
#define | CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16))
#define | DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16))
#define | CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16))
#define | CMD_CLR_BUF 0x00F20500
#define | DAT_CLR_BUF 0x00F20200
#define | CMD_VALID_BUF 0x00FA0500
#define | DEV_ADDR_MASK 0x7F
#define | DEV_EN 0x80
#define | CONF_DVICE 0x01
#define | AP_CLK 0x01
#define | INAK_CI 0x02
#define | INAK_CO 0x04
#define | INAK_II 0x08
#define | INAK_IO 0x10
#define | INAK_BI 0x20
#define | INAK_BO 0x40
#define | DEV_CON 0x01
#define | DEV_CON_CH 0x02
#define | DEV_SUS 0x04
#define | DEV_SUS_CH 0x08
#define | DEV_RST 0x10
#define | ERR_EC_MASK 0x0F
#define | ERR_EA 0x10
#define | ERR_PID 0x01
#define | ERR_UEPKT 0x02
#define | ERR_DCRC 0x04
#define | ERR_TIMOUT 0x08
#define | ERR_EOP 0x10
#define | ERR_B_OVRN 0x20
#define | ERR_BTSTF 0x40
#define | ERR_TGL 0x80
#define | EP_SEL_F 0x01
#define | EP_SEL_ST 0x02
#define | EP_SEL_STP 0x04
#define | EP_SEL_PO 0x08
#define | EP_SEL_EPN 0x10
#define | EP_SEL_B_1_FULL 0x20
#define | EP_SEL_B_2_FULL 0x40
#define | EP_STAT_ST 0x01
#define | EP_STAT_DA 0x20
#define | EP_STAT_RF_MO 0x40
#define | EP_STAT_CND_ST 0x80
#define | CLR_BUF_PO 0x01
#define | EOT_INT 0x01
#define | NDD_REQ_INT 0x02
#define | SYS_ERR_INT 0x04

Define Documentation

#define AP_CLK 0x01

Definition at line 76 of file usbreg.h.

#define CCEMTY_INT 0x00000010

Definition at line 27 of file usbreg.h.

#define CDFULL_INT 0x00000020

Definition at line 28 of file usbreg.h.

#define CLR_BUF_PO 0x01

Definition at line 121 of file usbreg.h.

#define CMD_CFG_DEV 0x00D80500

Definition at line 45 of file usbreg.h.

#define CMD_CLR_BUF 0x00F20500

Definition at line 64 of file usbreg.h.

#define CMD_GET_DEV_STAT 0x00FE0500

Definition at line 52 of file usbreg.h.

#define CMD_GET_ERR_CODE 0x00FF0500

Definition at line 54 of file usbreg.h.

#define CMD_RD_ERR_STAT 0x00FB0500

Definition at line 56 of file usbreg.h.

#define CMD_RD_FRAME 0x00F50500

Definition at line 47 of file usbreg.h.

#define CMD_RD_TEST 0x00FD0500

Definition at line 49 of file usbreg.h.

#define CMD_SEL_EP ( x ) (0x00000500 | ((x) << 16))

Definition at line 59 of file usbreg.h.

#define CMD_SEL_EP_CLRI ( x ) (0x00400500 | ((x) << 16))

Definition at line 61 of file usbreg.h.

#define CMD_SET_ADDR 0x00D00500

Definition at line 44 of file usbreg.h.

#define CMD_SET_DEV_STAT 0x00FE0500

Definition at line 51 of file usbreg.h.

#define CMD_SET_EP_STAT ( x ) (0x00400500 | ((x) << 16))

Definition at line 63 of file usbreg.h.

#define CMD_SET_MODE 0x00F30500

Definition at line 46 of file usbreg.h.

#define CMD_VALID_BUF 0x00FA0500

Definition at line 66 of file usbreg.h.

#define CONF_DVICE 0x01

Definition at line 73 of file usbreg.h.

#define CTRL_RD_EN 0x00000001

Definition at line 40 of file usbreg.h.

#define CTRL_WR_EN 0x00000002

Definition at line 41 of file usbreg.h.

#define DAT_CLR_BUF 0x00F20200

Definition at line 65 of file usbreg.h.

#define DAT_GET_DEV_STAT 0x00FE0200

Definition at line 53 of file usbreg.h.

#define DAT_GET_ERR_CODE 0x00FF0200

Definition at line 55 of file usbreg.h.

#define DAT_RD_ERR_STAT 0x00FB0200

Definition at line 57 of file usbreg.h.

#define DAT_RD_FRAME 0x00F50200

Definition at line 48 of file usbreg.h.

#define DAT_RD_TEST 0x00FD0200

Definition at line 50 of file usbreg.h.

#define DAT_SEL_EP ( x ) (0x00000200 | ((x) << 16))

Definition at line 60 of file usbreg.h.

#define DAT_SEL_EP_CLRI ( x ) (0x00400200 | ((x) << 16))

Definition at line 62 of file usbreg.h.

#define DAT_WR_BYTE ( x ) (0x00000100 | ((x) << 16))

Definition at line 58 of file usbreg.h.

#define DEV_ADDR_MASK 0x7F

Definition at line 69 of file usbreg.h.

#define DEV_CON 0x01

Definition at line 85 of file usbreg.h.

#define DEV_CON_CH 0x02

Definition at line 86 of file usbreg.h.

#define DEV_EN 0x80

Definition at line 70 of file usbreg.h.

#define DEV_RST 0x10

Definition at line 89 of file usbreg.h.

#define DEV_STAT_INT 0x00000008

Definition at line 26 of file usbreg.h.

#define DEV_SUS 0x04

Definition at line 87 of file usbreg.h.

#define DEV_SUS_CH 0x08

Definition at line 88 of file usbreg.h.

#define EOT_INT 0x01

Definition at line 125 of file usbreg.h.

#define EP_FAST_INT 0x00000002

Definition at line 24 of file usbreg.h.

#define EP_RLZED_INT 0x00000100

Definition at line 31 of file usbreg.h.

#define EP_SEL_B_1_FULL 0x20

Definition at line 111 of file usbreg.h.

#define EP_SEL_B_2_FULL 0x40

Definition at line 112 of file usbreg.h.

#define EP_SEL_EPN 0x10

Definition at line 110 of file usbreg.h.

#define EP_SEL_F 0x01

Definition at line 106 of file usbreg.h.

#define EP_SEL_PO 0x08

Definition at line 109 of file usbreg.h.

#define EP_SEL_ST 0x02

Definition at line 107 of file usbreg.h.

#define EP_SEL_STP 0x04

Definition at line 108 of file usbreg.h.

#define EP_SLOW_INT 0x00000004

Definition at line 25 of file usbreg.h.

#define EP_STAT_CND_ST 0x80

Definition at line 118 of file usbreg.h.

#define EP_STAT_DA 0x20

Definition at line 116 of file usbreg.h.

#define EP_STAT_RF_MO 0x40

Definition at line 117 of file usbreg.h.

#define EP_STAT_ST 0x01

Definition at line 115 of file usbreg.h.

#define ERR_B_OVRN 0x20

Definition at line 101 of file usbreg.h.

#define ERR_BTSTF 0x40

Definition at line 102 of file usbreg.h.

#define ERR_DCRC 0x04

Definition at line 98 of file usbreg.h.

#define ERR_EA 0x10

Definition at line 93 of file usbreg.h.

#define ERR_EC_MASK 0x0F

Definition at line 92 of file usbreg.h.

#define ERR_EOP 0x10

Definition at line 100 of file usbreg.h.

#define ERR_INT 0x00000200

Definition at line 32 of file usbreg.h.

#define ERR_PID 0x01

Definition at line 96 of file usbreg.h.

#define ERR_TGL 0x80

Definition at line 103 of file usbreg.h.

#define ERR_TIMOUT 0x08

Definition at line 99 of file usbreg.h.

#define ERR_UEPKT 0x02

Definition at line 97 of file usbreg.h.

#define FRAME_INT 0x00000001

Definition at line 23 of file usbreg.h.

#define INAK_BI 0x20

Definition at line 81 of file usbreg.h.

#define INAK_BO 0x40

Definition at line 82 of file usbreg.h.

#define INAK_CI 0x02

Definition at line 77 of file usbreg.h.

#define INAK_CO 0x04

Definition at line 78 of file usbreg.h.

#define INAK_II 0x08

Definition at line 79 of file usbreg.h.

#define INAK_IO 0x10

Definition at line 80 of file usbreg.h.

#define NDD_REQ_INT 0x02

Definition at line 126 of file usbreg.h.

#define PKT_DV 0x00000400

Definition at line 36 of file usbreg.h.

#define PKT_LNGTH_MASK 0x000003FF

Definition at line 35 of file usbreg.h.

#define PKT_RDY 0x00000800

Definition at line 37 of file usbreg.h.

#define RxENDPKT_INT 0x00000040

Definition at line 29 of file usbreg.h.

#define SYS_ERR_INT 0x04

Definition at line 127 of file usbreg.h.

#define TxENDPKT_INT 0x00000080

Definition at line 30 of file usbreg.h.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbuser.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbuser.c File Reference
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbuser.h"
#include "cdcuser.h"

Go to the source code of this file.

Defines

#define | P_EP(n) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)

Functions

void | USB_EndPoint1 (uint32_t event)
void | USB_EndPoint2 (uint32_t event)
void | USB_EndPoint3 (uint32_t event)
void | USB_EndPoint4 (uint32_t event)
void | USB_EndPoint5 (uint32_t event)
void | USB_EndPoint6 (uint32_t event)
void | USB_EndPoint7 (uint32_t event)
void | USB_EndPoint8 (uint32_t event)
void | USB_EndPoint9 (uint32_t event)
void | USB_EndPoint10 (uint32_t event)
void | USB_EndPoint11 (uint32_t event)
void | USB_EndPoint12 (uint32_t event)
void | USB_EndPoint13 (uint32_t event)
void | USB_EndPoint14 (uint32_t event)
void | USB_EndPoint15 (uint32_t event)

Variables

void(*const | USB_P_EP [16])(uint32_t event)

Define Documentation

#define P_EP ( n ) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)

Definition at line 145 of file usbuser.c.

Function Documentation

void USB_EndPoint1 ( uint32_t event )

Definition at line 174 of file usbuser.c.

void USB_EndPoint10 ( uint32_t event )

Definition at line 285 of file usbuser.c.

void USB_EndPoint11 ( uint32_t event )

Definition at line 295 of file usbuser.c.

void USB_EndPoint12 ( uint32_t event )

Definition at line 305 of file usbuser.c.

void USB_EndPoint13 ( uint32_t event )

Definition at line 315 of file usbuser.c.

void USB_EndPoint14 ( uint32_t event )

Definition at line 325 of file usbuser.c.

void USB_EndPoint15 ( uint32_t event )

Definition at line 335 of file usbuser.c.

void USB_EndPoint2 ( uint32_t event )

Definition at line 196 of file usbuser.c.

void USB_EndPoint3 ( uint32_t event )

Definition at line 215 of file usbuser.c.

void USB_EndPoint4 ( uint32_t event )

Definition at line 225 of file usbuser.c.

void USB_EndPoint5 ( uint32_t event )

Definition at line 235 of file usbuser.c.

void USB_EndPoint6 ( uint32_t event )

Definition at line 245 of file usbuser.c.

void USB_EndPoint7 ( uint32_t event )

Definition at line 255 of file usbuser.c.

void USB_EndPoint8 ( uint32_t event )

Definition at line 265 of file usbuser.c.

void USB_EndPoint9 ( uint32_t event )

Definition at line 275 of file usbuser.c.

Variable Documentation

void(* const USB_P_EP[16])(uint32_t event)
Initial value:
 {
  P_EP(0),
  P_EP(1),
  P_EP(2),
  P_EP(3),
  P_EP(4),
  P_EP(5),
  P_EP(6),
  P_EP(7),
  P_EP(8),
  P_EP(9),
  P_EP(10),
  P_EP(11),
  P_EP(12),
  P_EP(13),
  P_EP(14),
  P_EP(15),
}

Definition at line 148 of file usbuser.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbuser.h File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbuser.h File Reference

Go to the source code of this file.

Defines

#define | USB_EVT_SETUP 1
#define | USB_EVT_OUT 2
#define | USB_EVT_IN 3
#define | USB_EVT_OUT_NAK 4
#define | USB_EVT_IN_NAK 5
#define | USB_EVT_OUT_STALL 6
#define | USB_EVT_IN_STALL 7
#define | USB_EVT_OUT_DMA_EOT 8
#define | USB_EVT_IN_DMA_EOT 9
#define | USB_EVT_OUT_DMA_NDR 10
#define | USB_EVT_IN_DMA_NDR 11
#define | USB_EVT_OUT_DMA_ERR 12
#define | USB_EVT_IN_DMA_ERR 13

Functions

void | USB_Power_Event (uint32_t power)
void | USB_Reset_Event (void)
void | USB_Suspend_Event (void)
void | USB_Resume_Event (void)
void | USB_WakeUp_Event (void)
void | USB_SOF_Event (void)
void | USB_Error_Event (uint32_t error)
void | USB_EndPoint0 (uint32_t event)
void | USB_EndPoint1 (uint32_t event)
void | USB_EndPoint2 (uint32_t event)
void | USB_EndPoint3 (uint32_t event)
void | USB_EndPoint4 (uint32_t event)
void | USB_EndPoint5 (uint32_t event)
void | USB_EndPoint6 (uint32_t event)
void | USB_EndPoint7 (uint32_t event)
void | USB_EndPoint8 (uint32_t event)
void | USB_EndPoint9 (uint32_t event)
void | USB_EndPoint10 (uint32_t event)
void | USB_EndPoint11 (uint32_t event)
void | USB_EndPoint12 (uint32_t event)
void | USB_EndPoint13 (uint32_t event)
void | USB_EndPoint14 (uint32_t event)
void | USB_EndPoint15 (uint32_t event)
void | USB_Configure_Event (void)
void | USB_Interface_Event (void)
void | USB_Feature_Event (void)

Variables

void(*const | USB_P_EP [16])(uint32_t event)

Define Documentation

#define USB_EVT_IN 3

Definition at line 35 of file usbuser.h.

#define USB_EVT_IN_DMA_EOT 9

Definition at line 41 of file usbuser.h.

#define USB_EVT_IN_DMA_ERR 13

Definition at line 45 of file usbuser.h.

#define USB_EVT_IN_DMA_NDR 11

Definition at line 43 of file usbuser.h.

#define USB_EVT_IN_NAK 5

Definition at line 37 of file usbuser.h.

#define USB_EVT_IN_STALL 7

Definition at line 39 of file usbuser.h.

#define USB_EVT_OUT 2

Definition at line 34 of file usbuser.h.

#define USB_EVT_OUT_DMA_EOT 8

Definition at line 40 of file usbuser.h.

#define USB_EVT_OUT_DMA_ERR 12

Definition at line 44 of file usbuser.h.

#define USB_EVT_OUT_DMA_NDR 10

Definition at line 42 of file usbuser.h.

#define USB_EVT_OUT_NAK 4

Definition at line 36 of file usbuser.h.

#define USB_EVT_OUT_STALL 6

Definition at line 38 of file usbuser.h.

#define USB_EVT_SETUP 1

Definition at line 33 of file usbuser.h.

Function Documentation

void USB_Configure_Event ( void )
void USB_EndPoint0 ( uint32_t event )

Definition at line 600 of file usbcore.c.

void USB_EndPoint1 ( uint32_t event )

Definition at line 190 of file usbuser.c.

void USB_EndPoint10 ( uint32_t event )

Definition at line 311 of file usbuser.c.

void USB_EndPoint11 ( uint32_t event )

Definition at line 321 of file usbuser.c.

void USB_EndPoint12 ( uint32_t event )

Definition at line 331 of file usbuser.c.

void USB_EndPoint13 ( uint32_t event )

Definition at line 341 of file usbuser.c.

void USB_EndPoint14 ( uint32_t event )

Definition at line 351 of file usbuser.c.

void USB_EndPoint15 ( uint32_t event )

Definition at line 361 of file usbuser.c.

void USB_EndPoint2 ( uint32_t event )

Definition at line 200 of file usbuser.c.

void USB_EndPoint3 ( uint32_t event )

Definition at line 209 of file usbuser.c.

void USB_EndPoint4 ( uint32_t event )

Definition at line 251 of file usbuser.c.

void USB_EndPoint5 ( uint32_t event )

Definition at line 261 of file usbuser.c.

void USB_EndPoint6 ( uint32_t event )

Definition at line 271 of file usbuser.c.

void USB_EndPoint7 ( uint32_t event )

Definition at line 281 of file usbuser.c.

void USB_EndPoint8 ( uint32_t event )

Definition at line 291 of file usbuser.c.

void USB_EndPoint9 ( uint32_t event )

Definition at line 301 of file usbuser.c.

void USB_Error_Event ( uint32_t error )
void USB_Feature_Event ( void )
void USB_Interface_Event ( void )
void USB_Power_Event ( uint32_t power )
void USB_Reset_Event ( void )
void USB_Resume_Event ( void )
void USB_SOF_Event ( void )
void USB_Suspend_Event ( void )
void USB_WakeUp_Event ( void )

Variable Documentation

void(* const USB_P_EP[16])(uint32_t event)

Definition at line 164 of file usbuser.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/vcomdemo.c File Reference

Functions
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/vcomdemo.c File Reference
#include "LPC17xx.h"
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "cdc.h"
#include "cdcuser.h"
#include "serial.h"
#include "vcomdemo.h"

Go to the source code of this file.

Functions

void | VCOM_Init (void)
void | VCOM_Serial2Usb (void)
void | VCOM_Usb2Serial (void)
void | VCOM_CheckSerialState (void)
int | main (void)
Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/vcomdemo.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/vcomdemo.h File Reference

Go to the source code of this file.

Defines

#define | S2 0x00000400
#define | LED1 0x00000001
#define | LED2 0x00000002
#define | LED3 0x00000004
#define | LED4 0x00000008
#define | LED5 0x00000010
#define | LED6 0x00000020
#define | LED7 0x00000040
#define | LED8 0x00000080
#define | LEDMSK 0x000000FF

Define Documentation

#define LED1 0x00000001

Definition at line 21 of file vcomdemo.h.

#define LED2 0x00000002

Definition at line 22 of file vcomdemo.h.

#define LED3 0x00000004

Definition at line 23 of file vcomdemo.h.

#define LED4 0x00000008

Definition at line 24 of file vcomdemo.h.

#define LED5 0x00000010

Definition at line 25 of file vcomdemo.h.

#define LED6 0x00000020

Definition at line 26 of file vcomdemo.h.

#define LED7 0x00000040

Definition at line 27 of file vcomdemo.h.

#define LED8 0x00000080

Definition at line 28 of file vcomdemo.h.

#define LEDMSK 0x000000FF

Definition at line 30 of file vcomdemo.h.

#define S2 0x00000400

Definition at line 18 of file vcomdemo.h.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/demo.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/demo.c File Reference
#include "LPC17xx.h"
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "demo.h"
#include "hid.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_nvic.h"

Go to the source code of this file.

Functions

void | GetInReport (void)
void | SetOutReport (void)
int | main (void)

Variables

uint8_t | InReport
uint8_t | OutReport
Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/demo.h File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/demo.h File Reference

Go to the source code of this file.

Defines

#define | PBINT 0x00000400
#define | LEDMSK 0x000000FF

Functions

void | GetInReport (void)
void | SetOutReport (void)

Variables

uint8_t | InReport
uint8_t | OutReport

Define Documentation

#define LEDMSK 0x000000FF

Definition at line 21 of file demo.h.

#define PBINT 0x00000400

Definition at line 18 of file demo.h.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hid.h File Reference

Defines | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hid.h File Reference

Go to the source code of this file.

Defines

#define | HID_SUBCLASS_NONE 0x00
#define | HID_SUBCLASS_BOOT 0x01
#define | HID_PROTOCOL_NONE 0x00
#define | HID_PROTOCOL_KEYBOARD 0x01
#define | HID_PROTOCOL_MOUSE 0x02
#define | HID_HID_DESCRIPTOR_TYPE 0x21
#define | HID_REPORT_DESCRIPTOR_TYPE 0x22
#define | HID_PHYSICAL_DESCRIPTOR_TYPE 0x23
#define | HID_REQUEST_GET_REPORT 0x01
#define | HID_REQUEST_GET_IDLE 0x02
#define | HID_REQUEST_GET_PROTOCOL 0x03
#define | HID_REQUEST_SET_REPORT 0x09
#define | HID_REQUEST_SET_IDLE 0x0A
#define | HID_REQUEST_SET_PROTOCOL 0x0B
#define | HID_REPORT_INPUT 0x01
#define | HID_REPORT_OUTPUT 0x02
#define | HID_REPORT_FEATURE 0x03
#define | HID_USAGE_PAGE_UNDEFINED 0x00
#define | HID_USAGE_PAGE_GENERIC 0x01
#define | HID_USAGE_PAGE_SIMULATION 0x02
#define | HID_USAGE_PAGE_VR 0x03
#define | HID_USAGE_PAGE_SPORT 0x04
#define | HID_USAGE_PAGE_GAME 0x05
#define | HID_USAGE_PAGE_DEV_CONTROLS 0x06
#define | HID_USAGE_PAGE_KEYBOARD 0x07
#define | HID_USAGE_PAGE_LED 0x08
#define | HID_USAGE_PAGE_BUTTON 0x09
#define | HID_USAGE_PAGE_ORDINAL 0x0A
#define | HID_USAGE_PAGE_TELEPHONY 0x0B
#define | HID_USAGE_PAGE_CONSUMER 0x0C
#define | HID_USAGE_PAGE_DIGITIZER 0x0D
#define | HID_USAGE_PAGE_UNICODE 0x10
#define | HID_USAGE_PAGE_ALPHANUMERIC 0x14
#define | HID_USAGE_GENERIC_POINTER 0x01
#define | HID_USAGE_GENERIC_MOUSE 0x02
#define | HID_USAGE_GENERIC_JOYSTICK 0x04
#define | HID_USAGE_GENERIC_GAMEPAD 0x05
#define | HID_USAGE_GENERIC_KEYBOARD 0x06
#define | HID_USAGE_GENERIC_KEYPAD 0x07
#define | HID_USAGE_GENERIC_X 0x30
#define | HID_USAGE_GENERIC_Y 0x31
#define | HID_USAGE_GENERIC_Z 0x32
#define | HID_USAGE_GENERIC_RX 0x33
#define | HID_USAGE_GENERIC_RY 0x34
#define | HID_USAGE_GENERIC_RZ 0x35
#define | HID_USAGE_GENERIC_SLIDER 0x36
#define | HID_USAGE_GENERIC_DIAL 0x37
#define | HID_USAGE_GENERIC_WHEEL 0x38
#define | HID_USAGE_GENERIC_HATSWITCH 0x39
#define | HID_USAGE_GENERIC_COUNTED_BUFFER 0x3A
#define | HID_USAGE_GENERIC_BYTE_COUNT 0x3B
#define | HID_USAGE_GENERIC_MOTION_WAKEUP 0x3C
#define | HID_USAGE_GENERIC_VX 0x40
#define | HID_USAGE_GENERIC_VY 0x41
#define | HID_USAGE_GENERIC_VZ 0x42
#define | HID_USAGE_GENERIC_VBRX 0x43
#define | HID_USAGE_GENERIC_VBRY 0x44
#define | HID_USAGE_GENERIC_VBRZ 0x45
#define | HID_USAGE_GENERIC_VNO 0x46
#define | HID_USAGE_GENERIC_SYSTEM_CTL 0x80
#define | HID_USAGE_GENERIC_SYSCTL_POWER 0x81
#define | HID_USAGE_GENERIC_SYSCTL_SLEEP 0x82
#define | HID_USAGE_GENERIC_SYSCTL_WAKE 0x83
#define | HID_USAGE_GENERIC_SYSCTL_CONTEXT_MENU 0x84
#define | HID_USAGE_GENERIC_SYSCTL_MAIN_MENU 0x85
#define | HID_USAGE_GENERIC_SYSCTL_APP_MENU 0x86
#define | HID_USAGE_GENERIC_SYSCTL_HELP_MENU 0x87
#define | HID_USAGE_GENERIC_SYSCTL_MENU_EXIT 0x88
#define | HID_USAGE_GENERIC_SYSCTL_MENU_SELECT 0x89
#define | HID_USAGE_GENERIC_SYSCTL_MENU_RIGHT 0x8A
#define | HID_USAGE_GENERIC_SYSCTL_MENU_LEFT 0x8B
#define | HID_USAGE_GENERIC_SYSCTL_MENU_UP 0x8C
#define | HID_USAGE_GENERIC_SYSCTL_MENU_DOWN 0x8D
#define | HID_USAGE_SIMULATION_RUDDER 0xBA
#define | HID_USAGE_SIMULATION_THROTTLE 0xBB
#define | HID_USAGE_KEYBOARD_NOEVENT 0x00
#define | HID_USAGE_KEYBOARD_ROLLOVER 0x01
#define | HID_USAGE_KEYBOARD_POSTFAIL 0x02
#define | HID_USAGE_KEYBOARD_UNDEFINED 0x03
#define | HID_USAGE_KEYBOARD_aA 0x04
#define | HID_USAGE_KEYBOARD_zZ 0x1D
#define | HID_USAGE_KEYBOARD_ONE 0x1E
#define | HID_USAGE_KEYBOARD_ZERO 0x27
#define | HID_USAGE_KEYBOARD_RETURN 0x28
#define | HID_USAGE_KEYBOARD_ESCAPE 0x29
#define | HID_USAGE_KEYBOARD_DELETE 0x2A
#define | HID_USAGE_KEYBOARD_F1 0x3A
#define | HID_USAGE_KEYBOARD_F12 0x45
#define | HID_USAGE_KEYBOARD_PRINT_SCREEN 0x46
#define | HID_USAGE_KEYBOARD_LCTRL 0xE0
#define | HID_USAGE_KEYBOARD_LSHFT 0xE1
#define | HID_USAGE_KEYBOARD_LALT 0xE2
#define | HID_USAGE_KEYBOARD_LGUI 0xE3
#define | HID_USAGE_KEYBOARD_RCTRL 0xE4
#define | HID_USAGE_KEYBOARD_RSHFT 0xE5
#define | HID_USAGE_KEYBOARD_RALT 0xE6
#define | HID_USAGE_KEYBOARD_RGUI 0xE7
#define | HID_USAGE_KEYBOARD_SCROLL_LOCK 0x47
#define | HID_USAGE_KEYBOARD_NUM_LOCK 0x53
#define | HID_USAGE_KEYBOARD_CAPS_LOCK 0x39
#define | HID_USAGE_LED_NUM_LOCK 0x01
#define | HID_USAGE_LED_CAPS_LOCK 0x02
#define | HID_USAGE_LED_SCROLL_LOCK 0x03
#define | HID_USAGE_LED_COMPOSE 0x04
#define | HID_USAGE_LED_KANA 0x05
#define | HID_USAGE_LED_POWER 0x06
#define | HID_USAGE_LED_SHIFT 0x07
#define | HID_USAGE_LED_DO_NOT_DISTURB 0x08
#define | HID_USAGE_LED_MUTE 0x09
#define | HID_USAGE_LED_TONE_ENABLE 0x0A
#define | HID_USAGE_LED_HIGH_CUT_FILTER 0x0B
#define | HID_USAGE_LED_LOW_CUT_FILTER 0x0C
#define | HID_USAGE_LED_EQUALIZER_ENABLE 0x0D
#define | HID_USAGE_LED_SOUND_FIELD_ON 0x0E
#define | HID_USAGE_LED_SURROUND_FIELD_ON 0x0F
#define | HID_USAGE_LED_REPEAT 0x10
#define | HID_USAGE_LED_STEREO 0x11
#define | HID_USAGE_LED_SAMPLING_RATE_DETECT 0x12
#define | HID_USAGE_LED_SPINNING 0x13
#define | HID_USAGE_LED_CAV 0x14
#define | HID_USAGE_LED_CLV 0x15
#define | HID_USAGE_LED_RECORDING_FORMAT_DET 0x16
#define | HID_USAGE_LED_OFF_HOOK 0x17
#define | HID_USAGE_LED_RING 0x18
#define | HID_USAGE_LED_MESSAGE_WAITING 0x19
#define | HID_USAGE_LED_DATA_MODE 0x1A
#define | HID_USAGE_LED_BATTERY_OPERATION 0x1B
#define | HID_USAGE_LED_BATTERY_OK 0x1C
#define | HID_USAGE_LED_BATTERY_LOW 0x1D
#define | HID_USAGE_LED_SPEAKER 0x1E
#define | HID_USAGE_LED_HEAD_SET 0x1F
#define | HID_USAGE_LED_HOLD 0x20
#define | HID_USAGE_LED_MICROPHONE 0x21
#define | HID_USAGE_LED_COVERAGE 0x22
#define | HID_USAGE_LED_NIGHT_MODE 0x23
#define | HID_USAGE_LED_SEND_CALLS 0x24
#define | HID_USAGE_LED_CALL_PICKUP 0x25
#define | HID_USAGE_LED_CONFERENCE 0x26
#define | HID_USAGE_LED_STAND_BY 0x27
#define | HID_USAGE_LED_CAMERA_ON 0x28
#define | HID_USAGE_LED_CAMERA_OFF 0x29
#define | HID_USAGE_LED_ON_LINE 0x2A
#define | HID_USAGE_LED_OFF_LINE 0x2B
#define | HID_USAGE_LED_BUSY 0x2C
#define | HID_USAGE_LED_READY 0x2D
#define | HID_USAGE_LED_PAPER_OUT 0x2E
#define | HID_USAGE_LED_PAPER_JAM 0x2F
#define | HID_USAGE_LED_REMOTE 0x30
#define | HID_USAGE_LED_FORWARD 0x31
#define | HID_USAGE_LED_REVERSE 0x32
#define | HID_USAGE_LED_STOP 0x33
#define | HID_USAGE_LED_REWIND 0x34
#define | HID_USAGE_LED_FAST_FORWARD 0x35
#define | HID_USAGE_LED_PLAY 0x36
#define | HID_USAGE_LED_PAUSE 0x37
#define | HID_USAGE_LED_RECORD 0x38
#define | HID_USAGE_LED_ERROR 0x39
#define | HID_USAGE_LED_SELECTED_INDICATOR 0x3A
#define | HID_USAGE_LED_IN_USE_INDICATOR 0x3B
#define | HID_USAGE_LED_MULTI_MODE_INDICATOR 0x3C
#define | HID_USAGE_LED_INDICATOR_ON 0x3D
#define | HID_USAGE_LED_INDICATOR_FLASH 0x3E
#define | HID_USAGE_LED_INDICATOR_SLOW_BLINK 0x3F
#define | HID_USAGE_LED_INDICATOR_FAST_BLINK 0x40
#define | HID_USAGE_LED_INDICATOR_OFF 0x41
#define | HID_USAGE_LED_FLASH_ON_TIME 0x42
#define | HID_USAGE_LED_SLOW_BLINK_ON_TIME 0x43
#define | HID_USAGE_LED_SLOW_BLINK_OFF_TIME 0x44
#define | HID_USAGE_LED_FAST_BLINK_ON_TIME 0x45
#define | HID_USAGE_LED_FAST_BLINK_OFF_TIME 0x46
#define | HID_USAGE_LED_INDICATOR_COLOR 0x47
#define | HID_USAGE_LED_RED 0x48
#define | HID_USAGE_LED_GREEN 0x49
#define | HID_USAGE_LED_AMBER 0x4A
#define | HID_USAGE_LED_GENERIC_INDICATOR 0x4B
#define | HID_USAGE_TELEPHONY_PHONE 0x01
#define | HID_USAGE_TELEPHONY_ANSWERING_MACHINE 0x02
#define | HID_USAGE_TELEPHONY_MESSAGE_CONTROLS 0x03
#define | HID_USAGE_TELEPHONY_HANDSET 0x04
#define | HID_USAGE_TELEPHONY_HEADSET 0x05
#define | HID_USAGE_TELEPHONY_KEYPAD 0x06
#define | HID_USAGE_TELEPHONY_PROGRAMMABLE_BUTTON 0x07
#define | HID_USAGE_CONSUMER_CONTROL 0x01
#define | HID_Input(x) 0x81,x
#define | HID_Output(x) 0x91,x
#define | HID_Feature(x) 0xB1,x
#define | HID_Collection(x) 0xA1,x
#define | HID_EndCollection 0xC0
#define | HID_Data 0<<0
#define | HID_Constant 1<<0
#define | HID_Array 0<<1
#define | HID_Variable 1<<1
#define | HID_Absolute 0<<2
#define | HID_Relative 1<<2
#define | HID_NoWrap 0<<3
#define | HID_Wrap 1<<3
#define | HID_Linear 0<<4
#define | HID_NonLinear 1<<4
#define | HID_PreferredState 0<<5
#define | HID_NoPreferred 1<<5
#define | HID_NoNullPosition 0<<6
#define | HID_NullState 1<<6
#define | HID_NonVolatile 0<<7
#define | HID_Volatile 1<<7
#define | HID_Physical 0x00
#define | HID_Application 0x01
#define | HID_Logical 0x02
#define | HID_Report 0x03
#define | HID_NamedArray 0x04
#define | HID_UsageSwitch 0x05
#define | HID_UsageModifier 0x06
#define | HID_UsagePage(x) 0x05,x
#define | HID_UsagePageVendor(x) 0x06,x,0xFF
#define | HID_LogicalMin(x) 0x15,x
#define | HID_LogicalMinS(x) 0x16,(x&0xFF),((x>>8)&0xFF)
#define | HID_LogicalMinL(x) 0x17,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)
#define | HID_LogicalMax(x) 0x25,x
#define | HID_LogicalMaxS(x) 0x26,(x&0xFF),((x>>8)&0xFF)
#define | HID_LogicalMaxL(x) 0x27,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)
#define | HID_PhysicalMin(x) 0x35,x
#define | HID_PhysicalMinS(x) 0x36,(x&0xFF),((x>>8)&0xFF)
#define | HID_PhysicalMinL(x) 0x37,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)
#define | HID_PhysicalMax(x) 0x45,x
#define | HID_PhysicalMaxS(x) 0x46,(x&0xFF),((x>>8)&0xFF)
#define | HID_PhysicalMaxL(x) 0x47,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)
#define | HID_UnitExponent(x) 0x55,x
#define | HID_Unit(x) 0x65,x
#define | HID_UnitS(x) 0x66,(x&0xFF),((x>>8)&0xFF)
#define | HID_UnitL(x) 0x67,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)
#define | HID_ReportSize(x) 0x75,x
#define | HID_ReportID(x) 0x85,x
#define | HID_ReportCount(x) 0x95,x
#define | HID_Push 0xA0
#define | HID_Pop 0xB0
#define | HID_Usage(x) 0x09,x
#define | HID_UsageMin(x) 0x19,x
#define | HID_UsageMax(x) 0x29,x

Variables

uint8_t | bLength
uint8_t | bDescriptorType
uint16_t | bcdHID
uint8_t | bCountryCode
uint8_t | bNumDescriptors
uint16_t | wDescriptorLength
DescriptorList [1]
HID_DESCRIPTOR

Define Documentation

#define HID_Absolute 0<<2

Definition at line 327 of file hid.h.

#define HID_Application 0x01

Definition at line 342 of file hid.h.

#define HID_Array 0<<1

Definition at line 325 of file hid.h.

#define HID_Collection ( x ) 0xA1,x

Definition at line 319 of file hid.h.

#define HID_Constant 1<<0

Definition at line 324 of file hid.h.

#define HID_Data 0<<0

Definition at line 323 of file hid.h.

#define HID_EndCollection 0xC0

Definition at line 320 of file hid.h.

#define HID_Feature ( x ) 0xB1,x

Definition at line 318 of file hid.h.

#define HID_HID_DESCRIPTOR_TYPE 0x21

Definition at line 38 of file hid.h.

#define HID_Input ( x ) 0x81,x

Definition at line 316 of file hid.h.

#define HID_Linear 0<<4

Definition at line 331 of file hid.h.

#define HID_Logical 0x02

Definition at line 343 of file hid.h.

#define HID_LogicalMax ( x ) 0x25,x

Definition at line 355 of file hid.h.

#define HID_LogicalMaxL ( x ) 0x27,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)

Definition at line 357 of file hid.h.

#define HID_LogicalMaxS ( x ) 0x26,(x&0xFF),((x>>8)&0xFF)

Definition at line 356 of file hid.h.

#define HID_LogicalMin ( x ) 0x15,x

Definition at line 352 of file hid.h.

#define HID_LogicalMinL ( x ) 0x17,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)

Definition at line 354 of file hid.h.

#define HID_LogicalMinS ( x ) 0x16,(x&0xFF),((x>>8)&0xFF)

Definition at line 353 of file hid.h.

#define HID_NamedArray 0x04

Definition at line 345 of file hid.h.

#define HID_NonLinear 1<<4

Definition at line 332 of file hid.h.

#define HID_NoNullPosition 0<<6

Definition at line 335 of file hid.h.

#define HID_NonVolatile 0<<7

Definition at line 337 of file hid.h.

#define HID_NoPreferred 1<<5

Definition at line 334 of file hid.h.

#define HID_NoWrap 0<<3

Definition at line 329 of file hid.h.

#define HID_NullState 1<<6

Definition at line 336 of file hid.h.

#define HID_Output ( x ) 0x91,x

Definition at line 317 of file hid.h.

#define HID_Physical 0x00

Definition at line 341 of file hid.h.

#define HID_PHYSICAL_DESCRIPTOR_TYPE 0x23

Definition at line 40 of file hid.h.

#define HID_PhysicalMax ( x ) 0x45,x

Definition at line 361 of file hid.h.

#define HID_PhysicalMaxL ( x ) 0x47,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)

Definition at line 363 of file hid.h.

#define HID_PhysicalMaxS ( x ) 0x46,(x&0xFF),((x>>8)&0xFF)

Definition at line 362 of file hid.h.

#define HID_PhysicalMin ( x ) 0x35,x

Definition at line 358 of file hid.h.

#define HID_PhysicalMinL ( x ) 0x37,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)

Definition at line 360 of file hid.h.

#define HID_PhysicalMinS ( x ) 0x36,(x&0xFF),((x>>8)&0xFF)

Definition at line 359 of file hid.h.

#define HID_Pop 0xB0

Definition at line 372 of file hid.h.

#define HID_PreferredState 0<<5

Definition at line 333 of file hid.h.

#define HID_PROTOCOL_KEYBOARD 0x01

Definition at line 33 of file hid.h.

#define HID_PROTOCOL_MOUSE 0x02

Definition at line 34 of file hid.h.

#define HID_PROTOCOL_NONE 0x00

Definition at line 32 of file hid.h.

#define HID_Push 0xA0

Definition at line 371 of file hid.h.

#define HID_Relative 1<<2

Definition at line 328 of file hid.h.

#define HID_Report 0x03

Definition at line 344 of file hid.h.

#define HID_REPORT_DESCRIPTOR_TYPE 0x22

Definition at line 39 of file hid.h.

#define HID_REPORT_FEATURE 0x03

Definition at line 88 of file hid.h.

#define HID_REPORT_INPUT 0x01

Definition at line 86 of file hid.h.

#define HID_REPORT_OUTPUT 0x02

Definition at line 87 of file hid.h.

#define HID_ReportCount ( x ) 0x95,x

Definition at line 370 of file hid.h.

#define HID_ReportID ( x ) 0x85,x

Definition at line 369 of file hid.h.

#define HID_ReportSize ( x ) 0x75,x

Definition at line 368 of file hid.h.

#define HID_REQUEST_GET_IDLE 0x02

Definition at line 79 of file hid.h.

#define HID_REQUEST_GET_PROTOCOL 0x03

Definition at line 80 of file hid.h.

#define HID_REQUEST_GET_REPORT 0x01

Definition at line 78 of file hid.h.

#define HID_REQUEST_SET_IDLE 0x0A

Definition at line 82 of file hid.h.

#define HID_REQUEST_SET_PROTOCOL 0x0B

Definition at line 83 of file hid.h.

#define HID_REQUEST_SET_REPORT 0x09

Definition at line 81 of file hid.h.

#define HID_SUBCLASS_BOOT 0x01

Definition at line 29 of file hid.h.

#define HID_SUBCLASS_NONE 0x00

Definition at line 28 of file hid.h.

#define HID_Unit ( x ) 0x65,x

Definition at line 365 of file hid.h.

#define HID_UnitExponent ( x ) 0x55,x

Definition at line 364 of file hid.h.

#define HID_UnitL ( x ) 0x67,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)

Definition at line 367 of file hid.h.

#define HID_UnitS ( x ) 0x66,(x&0xFF),((x>>8)&0xFF)

Definition at line 366 of file hid.h.

#define HID_Usage ( x ) 0x09,x

Definition at line 375 of file hid.h.

#define HID_USAGE_CONSUMER_CONTROL 0x01

Definition at line 307 of file hid.h.

#define HID_USAGE_GENERIC_BYTE_COUNT 0x3B

Definition at line 129 of file hid.h.

#define HID_USAGE_GENERIC_COUNTED_BUFFER 0x3A

Definition at line 128 of file hid.h.

#define HID_USAGE_GENERIC_DIAL 0x37

Definition at line 125 of file hid.h.

#define HID_USAGE_GENERIC_GAMEPAD 0x05

Definition at line 115 of file hid.h.

#define HID_USAGE_GENERIC_HATSWITCH 0x39

Definition at line 127 of file hid.h.

#define HID_USAGE_GENERIC_JOYSTICK 0x04

Definition at line 114 of file hid.h.

#define HID_USAGE_GENERIC_KEYBOARD 0x06

Definition at line 116 of file hid.h.

#define HID_USAGE_GENERIC_KEYPAD 0x07

Definition at line 117 of file hid.h.

#define HID_USAGE_GENERIC_MOTION_WAKEUP 0x3C

Definition at line 130 of file hid.h.

#define HID_USAGE_GENERIC_MOUSE 0x02

Definition at line 113 of file hid.h.

#define HID_USAGE_GENERIC_POINTER 0x01

Definition at line 112 of file hid.h.

#define HID_USAGE_GENERIC_RX 0x33

Definition at line 121 of file hid.h.

#define HID_USAGE_GENERIC_RY 0x34

Definition at line 122 of file hid.h.

#define HID_USAGE_GENERIC_RZ 0x35

Definition at line 123 of file hid.h.

#define HID_USAGE_GENERIC_SLIDER 0x36

Definition at line 124 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_APP_MENU 0x86

Definition at line 144 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_CONTEXT_MENU 0x84

Definition at line 142 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_HELP_MENU 0x87

Definition at line 145 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_MAIN_MENU 0x85

Definition at line 143 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_MENU_DOWN 0x8D

Definition at line 151 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_MENU_EXIT 0x88

Definition at line 146 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_MENU_LEFT 0x8B

Definition at line 149 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_MENU_RIGHT 0x8A

Definition at line 148 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_MENU_SELECT 0x89

Definition at line 147 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_MENU_UP 0x8C

Definition at line 150 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_POWER 0x81

Definition at line 139 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_SLEEP 0x82

Definition at line 140 of file hid.h.

#define HID_USAGE_GENERIC_SYSCTL_WAKE 0x83

Definition at line 141 of file hid.h.

#define HID_USAGE_GENERIC_SYSTEM_CTL 0x80

Definition at line 138 of file hid.h.

#define HID_USAGE_GENERIC_VBRX 0x43

Definition at line 134 of file hid.h.

#define HID_USAGE_GENERIC_VBRY 0x44

Definition at line 135 of file hid.h.

#define HID_USAGE_GENERIC_VBRZ 0x45

Definition at line 136 of file hid.h.

#define HID_USAGE_GENERIC_VNO 0x46

Definition at line 137 of file hid.h.

#define HID_USAGE_GENERIC_VX 0x40

Definition at line 131 of file hid.h.

#define HID_USAGE_GENERIC_VY 0x41

Definition at line 132 of file hid.h.

#define HID_USAGE_GENERIC_VZ 0x42

Definition at line 133 of file hid.h.

#define HID_USAGE_GENERIC_WHEEL 0x38

Definition at line 126 of file hid.h.

#define HID_USAGE_GENERIC_X 0x30

Definition at line 118 of file hid.h.

#define HID_USAGE_GENERIC_Y 0x31

Definition at line 119 of file hid.h.

#define HID_USAGE_GENERIC_Z 0x32

Definition at line 120 of file hid.h.

#define HID_USAGE_KEYBOARD_aA 0x04

Definition at line 181 of file hid.h.

#define HID_USAGE_KEYBOARD_CAPS_LOCK 0x39

Definition at line 209 of file hid.h.

#define HID_USAGE_KEYBOARD_DELETE 0x2A

Definition at line 190 of file hid.h.

#define HID_USAGE_KEYBOARD_ESCAPE 0x29

Definition at line 189 of file hid.h.

#define HID_USAGE_KEYBOARD_F1 0x3A

Definition at line 193 of file hid.h.

#define HID_USAGE_KEYBOARD_F12 0x45

Definition at line 194 of file hid.h.

#define HID_USAGE_KEYBOARD_LALT 0xE2

Definition at line 201 of file hid.h.

#define HID_USAGE_KEYBOARD_LCTRL 0xE0

Definition at line 199 of file hid.h.

#define HID_USAGE_KEYBOARD_LGUI 0xE3

Definition at line 202 of file hid.h.

#define HID_USAGE_KEYBOARD_LSHFT 0xE1

Definition at line 200 of file hid.h.

#define HID_USAGE_KEYBOARD_NOEVENT 0x00

Definition at line 175 of file hid.h.

#define HID_USAGE_KEYBOARD_NUM_LOCK 0x53

Definition at line 208 of file hid.h.

#define HID_USAGE_KEYBOARD_ONE 0x1E

Definition at line 185 of file hid.h.

#define HID_USAGE_KEYBOARD_POSTFAIL 0x02

Definition at line 177 of file hid.h.

#define HID_USAGE_KEYBOARD_PRINT_SCREEN 0x46

Definition at line 196 of file hid.h.

#define HID_USAGE_KEYBOARD_RALT 0xE6

Definition at line 205 of file hid.h.

#define HID_USAGE_KEYBOARD_RCTRL 0xE4

Definition at line 203 of file hid.h.

#define HID_USAGE_KEYBOARD_RETURN 0x28

Definition at line 188 of file hid.h.

#define HID_USAGE_KEYBOARD_RGUI 0xE7

Definition at line 206 of file hid.h.

#define HID_USAGE_KEYBOARD_ROLLOVER 0x01

Definition at line 176 of file hid.h.

#define HID_USAGE_KEYBOARD_RSHFT 0xE5

Definition at line 204 of file hid.h.

#define HID_USAGE_KEYBOARD_SCROLL_LOCK 0x47

Definition at line 207 of file hid.h.

#define HID_USAGE_KEYBOARD_UNDEFINED 0x03

Definition at line 178 of file hid.h.

#define HID_USAGE_KEYBOARD_ZERO 0x27

Definition at line 186 of file hid.h.

#define HID_USAGE_KEYBOARD_zZ 0x1D

Definition at line 182 of file hid.h.

#define HID_USAGE_LED_AMBER 0x4A

Definition at line 287 of file hid.h.

#define HID_USAGE_LED_BATTERY_LOW 0x1D

Definition at line 242 of file hid.h.

#define HID_USAGE_LED_BATTERY_OK 0x1C

Definition at line 241 of file hid.h.

#define HID_USAGE_LED_BATTERY_OPERATION 0x1B

Definition at line 240 of file hid.h.

#define HID_USAGE_LED_BUSY 0x2C

Definition at line 257 of file hid.h.

#define HID_USAGE_LED_CALL_PICKUP 0x25

Definition at line 250 of file hid.h.

#define HID_USAGE_LED_CAMERA_OFF 0x29

Definition at line 254 of file hid.h.

#define HID_USAGE_LED_CAMERA_ON 0x28

Definition at line 253 of file hid.h.

#define HID_USAGE_LED_CAPS_LOCK 0x02

Definition at line 215 of file hid.h.

#define HID_USAGE_LED_CAV 0x14

Definition at line 233 of file hid.h.

#define HID_USAGE_LED_CLV 0x15

Definition at line 234 of file hid.h.

#define HID_USAGE_LED_COMPOSE 0x04

Definition at line 217 of file hid.h.

#define HID_USAGE_LED_CONFERENCE 0x26

Definition at line 251 of file hid.h.

#define HID_USAGE_LED_COVERAGE 0x22

Definition at line 247 of file hid.h.

#define HID_USAGE_LED_DATA_MODE 0x1A

Definition at line 239 of file hid.h.

#define HID_USAGE_LED_DO_NOT_DISTURB 0x08

Definition at line 221 of file hid.h.

#define HID_USAGE_LED_EQUALIZER_ENABLE 0x0D

Definition at line 226 of file hid.h.

#define HID_USAGE_LED_ERROR 0x39

Definition at line 270 of file hid.h.

#define HID_USAGE_LED_FAST_BLINK_OFF_TIME 0x46

Definition at line 283 of file hid.h.

#define HID_USAGE_LED_FAST_BLINK_ON_TIME 0x45

Definition at line 282 of file hid.h.

#define HID_USAGE_LED_FAST_FORWARD 0x35

Definition at line 266 of file hid.h.

#define HID_USAGE_LED_FLASH_ON_TIME 0x42

Definition at line 279 of file hid.h.

#define HID_USAGE_LED_FORWARD 0x31

Definition at line 262 of file hid.h.

#define HID_USAGE_LED_GENERIC_INDICATOR 0x4B

Definition at line 288 of file hid.h.

#define HID_USAGE_LED_GREEN 0x49

Definition at line 286 of file hid.h.

#define HID_USAGE_LED_HEAD_SET 0x1F

Definition at line 244 of file hid.h.

#define HID_USAGE_LED_HIGH_CUT_FILTER 0x0B

Definition at line 224 of file hid.h.

#define HID_USAGE_LED_HOLD 0x20

Definition at line 245 of file hid.h.

#define HID_USAGE_LED_IN_USE_INDICATOR 0x3B

Definition at line 272 of file hid.h.

#define HID_USAGE_LED_INDICATOR_COLOR 0x47

Definition at line 284 of file hid.h.

#define HID_USAGE_LED_INDICATOR_FAST_BLINK 0x40

Definition at line 277 of file hid.h.

#define HID_USAGE_LED_INDICATOR_FLASH 0x3E

Definition at line 275 of file hid.h.

#define HID_USAGE_LED_INDICATOR_OFF 0x41

Definition at line 278 of file hid.h.

#define HID_USAGE_LED_INDICATOR_ON 0x3D

Definition at line 274 of file hid.h.

#define HID_USAGE_LED_INDICATOR_SLOW_BLINK 0x3F

Definition at line 276 of file hid.h.

#define HID_USAGE_LED_KANA 0x05

Definition at line 218 of file hid.h.

#define HID_USAGE_LED_LOW_CUT_FILTER 0x0C

Definition at line 225 of file hid.h.

#define HID_USAGE_LED_MESSAGE_WAITING 0x19

Definition at line 238 of file hid.h.

#define HID_USAGE_LED_MICROPHONE 0x21

Definition at line 246 of file hid.h.

#define HID_USAGE_LED_MULTI_MODE_INDICATOR 0x3C

Definition at line 273 of file hid.h.

#define HID_USAGE_LED_MUTE 0x09

Definition at line 222 of file hid.h.

#define HID_USAGE_LED_NIGHT_MODE 0x23

Definition at line 248 of file hid.h.

#define HID_USAGE_LED_NUM_LOCK 0x01

Definition at line 214 of file hid.h.

#define HID_USAGE_LED_OFF_HOOK 0x17

Definition at line 236 of file hid.h.

#define HID_USAGE_LED_OFF_LINE 0x2B

Definition at line 256 of file hid.h.

#define HID_USAGE_LED_ON_LINE 0x2A

Definition at line 255 of file hid.h.

#define HID_USAGE_LED_PAPER_JAM 0x2F

Definition at line 260 of file hid.h.

#define HID_USAGE_LED_PAPER_OUT 0x2E

Definition at line 259 of file hid.h.

#define HID_USAGE_LED_PAUSE 0x37

Definition at line 268 of file hid.h.

#define HID_USAGE_LED_PLAY 0x36

Definition at line 267 of file hid.h.

#define HID_USAGE_LED_POWER 0x06

Definition at line 219 of file hid.h.

#define HID_USAGE_LED_READY 0x2D

Definition at line 258 of file hid.h.

#define HID_USAGE_LED_RECORD 0x38

Definition at line 269 of file hid.h.

#define HID_USAGE_LED_RECORDING_FORMAT_DET 0x16

Definition at line 235 of file hid.h.

#define HID_USAGE_LED_RED 0x48

Definition at line 285 of file hid.h.

#define HID_USAGE_LED_REMOTE 0x30

Definition at line 261 of file hid.h.

#define HID_USAGE_LED_REPEAT 0x10

Definition at line 229 of file hid.h.

#define HID_USAGE_LED_REVERSE 0x32

Definition at line 263 of file hid.h.

#define HID_USAGE_LED_REWIND 0x34

Definition at line 265 of file hid.h.

#define HID_USAGE_LED_RING 0x18

Definition at line 237 of file hid.h.

#define HID_USAGE_LED_SAMPLING_RATE_DETECT 0x12

Definition at line 231 of file hid.h.

#define HID_USAGE_LED_SCROLL_LOCK 0x03

Definition at line 216 of file hid.h.

#define HID_USAGE_LED_SELECTED_INDICATOR 0x3A

Definition at line 271 of file hid.h.

#define HID_USAGE_LED_SEND_CALLS 0x24

Definition at line 249 of file hid.h.

#define HID_USAGE_LED_SHIFT 0x07

Definition at line 220 of file hid.h.

#define HID_USAGE_LED_SLOW_BLINK_OFF_TIME 0x44

Definition at line 281 of file hid.h.

#define HID_USAGE_LED_SLOW_BLINK_ON_TIME 0x43

Definition at line 280 of file hid.h.

#define HID_USAGE_LED_SOUND_FIELD_ON 0x0E

Definition at line 227 of file hid.h.

#define HID_USAGE_LED_SPEAKER 0x1E

Definition at line 243 of file hid.h.

#define HID_USAGE_LED_SPINNING 0x13

Definition at line 232 of file hid.h.

#define HID_USAGE_LED_STAND_BY 0x27

Definition at line 252 of file hid.h.

#define HID_USAGE_LED_STEREO 0x11

Definition at line 230 of file hid.h.

#define HID_USAGE_LED_STOP 0x33

Definition at line 264 of file hid.h.

#define HID_USAGE_LED_SURROUND_FIELD_ON 0x0F

Definition at line 228 of file hid.h.

#define HID_USAGE_LED_TONE_ENABLE 0x0A

Definition at line 223 of file hid.h.

#define HID_USAGE_PAGE_ALPHANUMERIC 0x14

Definition at line 107 of file hid.h.

#define HID_USAGE_PAGE_BUTTON 0x09

Definition at line 101 of file hid.h.

#define HID_USAGE_PAGE_CONSUMER 0x0C

Definition at line 104 of file hid.h.

#define HID_USAGE_PAGE_DEV_CONTROLS 0x06

Definition at line 98 of file hid.h.

#define HID_USAGE_PAGE_DIGITIZER 0x0D

Definition at line 105 of file hid.h.

#define HID_USAGE_PAGE_GAME 0x05

Definition at line 97 of file hid.h.

#define HID_USAGE_PAGE_GENERIC 0x01

Definition at line 93 of file hid.h.

#define HID_USAGE_PAGE_KEYBOARD 0x07

Definition at line 99 of file hid.h.

#define HID_USAGE_PAGE_LED 0x08

Definition at line 100 of file hid.h.

#define HID_USAGE_PAGE_ORDINAL 0x0A

Definition at line 102 of file hid.h.

#define HID_USAGE_PAGE_SIMULATION 0x02

Definition at line 94 of file hid.h.

#define HID_USAGE_PAGE_SPORT 0x04

Definition at line 96 of file hid.h.

#define HID_USAGE_PAGE_TELEPHONY 0x0B

Definition at line 103 of file hid.h.

#define HID_USAGE_PAGE_UNDEFINED 0x00

Definition at line 92 of file hid.h.

#define HID_USAGE_PAGE_UNICODE 0x10

Definition at line 106 of file hid.h.

#define HID_USAGE_PAGE_VR 0x03

Definition at line 95 of file hid.h.

#define HID_USAGE_SIMULATION_RUDDER 0xBA

Definition at line 156 of file hid.h.

#define HID_USAGE_SIMULATION_THROTTLE 0xBB

Definition at line 157 of file hid.h.

#define HID_USAGE_TELEPHONY_ANSWERING_MACHINE 0x02

Definition at line 298 of file hid.h.

#define HID_USAGE_TELEPHONY_HANDSET 0x04

Definition at line 300 of file hid.h.

#define HID_USAGE_TELEPHONY_HEADSET 0x05

Definition at line 301 of file hid.h.

#define HID_USAGE_TELEPHONY_KEYPAD 0x06

Definition at line 302 of file hid.h.

#define HID_USAGE_TELEPHONY_MESSAGE_CONTROLS 0x03

Definition at line 299 of file hid.h.

#define HID_USAGE_TELEPHONY_PHONE 0x01

Definition at line 297 of file hid.h.

#define HID_USAGE_TELEPHONY_PROGRAMMABLE_BUTTON 0x07

Definition at line 303 of file hid.h.

#define HID_UsageMax ( x ) 0x29,x

Definition at line 377 of file hid.h.

#define HID_UsageMin ( x ) 0x19,x

Definition at line 376 of file hid.h.

#define HID_UsageModifier 0x06

Definition at line 347 of file hid.h.

#define HID_UsagePage ( x ) 0x05,x

Definition at line 350 of file hid.h.

#define HID_UsagePageVendor ( x ) 0x06,x,0xFF

Definition at line 351 of file hid.h.

#define HID_UsageSwitch 0x05

Definition at line 346 of file hid.h.

#define HID_Variable 1<<1

Definition at line 326 of file hid.h.

#define HID_Volatile 1<<7

Definition at line 338 of file hid.h.

#define HID_Wrap 1<<3

Definition at line 330 of file hid.h.

Variable Documentation

uint16_t bcdHID

Definition at line 54 of file hid.h.

uint8_t bCountryCode

Definition at line 55 of file hid.h.

uint8_t bDescriptorType

Definition at line 53 of file hid.h.

uint8_t bLength

Definition at line 52 of file hid.h.

uint8_t bNumDescriptors

Definition at line 56 of file hid.h.

DescriptorList[1]

Definition at line 68 of file hid.h.

HID_DESCRIPTOR

Definition at line 72 of file hid.h.

uint16_t wDescriptorLength

Definition at line 67 of file hid.h.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hiduser.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hiduser.c File Reference
#include "lpc_types.h"
#include "usb.h"
#include "hid.h"
#include "usbcfg.h"
#include "usbcore.h"
#include "hiduser.h"
#include "demo.h"

Go to the source code of this file.

Functions

uint32_t | HID_GetReport (void)
uint32_t | HID_SetReport (void)
uint32_t | HID_GetIdle (void)
uint32_t | HID_SetIdle (void)
uint32_t | HID_GetProtocol (void)
uint32_t | HID_SetProtocol (void)

Variables

uint8_t | HID_Protocol
uint8_t | HID_IdleTime [HID_REPORT_NUM]

Function Documentation

uint32_t HID_GetIdle ( void )

Definition at line 92 of file hiduser.c.

uint32_t HID_GetProtocol ( void )

Definition at line 124 of file hiduser.c.

uint32_t HID_GetReport ( void )

Definition at line 42 of file hiduser.c.

uint32_t HID_SetIdle ( void )

Definition at line 106 of file hiduser.c.

uint32_t HID_SetProtocol ( void )

Definition at line 138 of file hiduser.c.

uint32_t HID_SetReport ( void )

Definition at line 68 of file hiduser.c.

Variable Documentation

uint8_t HID_IdleTime[HID_REPORT_NUM]

Definition at line 32 of file hiduser.c.

uint8_t HID_Protocol

Definition at line 31 of file hiduser.c.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hiduser.h File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hiduser.h File Reference

Go to the source code of this file.

Defines

#define | HID_REPORT_NUM 1

Functions

uint32_t | HID_GetReport (void)
uint32_t | HID_SetReport (void)
uint32_t | HID_GetIdle (void)
uint32_t | HID_SetIdle (void)
uint32_t | HID_GetProtocol (void)
uint32_t | HID_SetProtocol (void)

Variables

uint8_t | HID_Protocol
uint8_t | HID_IdleTime [HID_REPORT_NUM]

Define Documentation

#define HID_REPORT_NUM 1

Definition at line 24 of file hiduser.h.

Function Documentation

uint32_t HID_GetIdle ( void )

Definition at line 92 of file hiduser.c.

uint32_t HID_GetProtocol ( void )

Definition at line 124 of file hiduser.c.

uint32_t HID_GetReport ( void )

Definition at line 42 of file hiduser.c.

uint32_t HID_SetIdle ( void )

Definition at line 106 of file hiduser.c.

uint32_t HID_SetProtocol ( void )

Definition at line 138 of file hiduser.c.

uint32_t HID_SetReport ( void )

Definition at line 68 of file hiduser.c.

Variable Documentation

uint8_t HID_IdleTime[HID_REPORT_NUM]

Definition at line 32 of file hiduser.c.

uint8_t HID_Protocol

Definition at line 31 of file hiduser.c.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | CHECK_PARAM(expr)

Define Documentation

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usb.h File Reference

Defines | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usb.h File Reference

Go to the source code of this file.

Defines

#define | REQUEST_HOST_TO_DEVICE 0
#define | REQUEST_DEVICE_TO_HOST 1
#define | REQUEST_STANDARD 0
#define | REQUEST_CLASS 1
#define | REQUEST_VENDOR 2
#define | REQUEST_RESERVED 3
#define | REQUEST_TO_DEVICE 0
#define | REQUEST_TO_INTERFACE 1
#define | REQUEST_TO_ENDPOINT 2
#define | REQUEST_TO_OTHER 3
#define | USB_REQUEST_GET_STATUS 0
#define | USB_REQUEST_CLEAR_FEATURE 1
#define | USB_REQUEST_SET_FEATURE 3
#define | USB_REQUEST_SET_ADDRESS 5
#define | USB_REQUEST_GET_DESCRIPTOR 6
#define | USB_REQUEST_SET_DESCRIPTOR 7
#define | USB_REQUEST_GET_CONFIGURATION 8
#define | USB_REQUEST_SET_CONFIGURATION 9
#define | USB_REQUEST_GET_INTERFACE 10
#define | USB_REQUEST_SET_INTERFACE 11
#define | USB_REQUEST_SYNC_FRAME 12
#define | USB_GETSTATUS_SELF_POWERED 0x01
#define | USB_GETSTATUS_REMOTE_WAKEUP 0x02
#define | USB_GETSTATUS_ENDPOINT_STALL 0x01
#define | USB_FEATURE_ENDPOINT_STALL 0
#define | USB_FEATURE_REMOTE_WAKEUP 1
#define | USB_DEVICE_DESCRIPTOR_TYPE 1
#define | USB_CONFIGURATION_DESCRIPTOR_TYPE 2
#define | USB_STRING_DESCRIPTOR_TYPE 3
#define | USB_INTERFACE_DESCRIPTOR_TYPE 4
#define | USB_ENDPOINT_DESCRIPTOR_TYPE 5
#define | USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE 6
#define | USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7
#define | USB_INTERFACE_POWER_DESCRIPTOR_TYPE 8
#define | USB_OTG_DESCRIPTOR_TYPE 9
#define | USB_DEBUG_DESCRIPTOR_TYPE 10
#define | USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE 11
#define | USB_DEVICE_CLASS_RESERVED 0x00
#define | USB_DEVICE_CLASS_AUDIO 0x01
#define | USB_DEVICE_CLASS_COMMUNICATIONS 0x02
#define | USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03
#define | USB_DEVICE_CLASS_MONITOR 0x04
#define | USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05
#define | USB_DEVICE_CLASS_POWER 0x06
#define | USB_DEVICE_CLASS_PRINTER 0x07
#define | USB_DEVICE_CLASS_STORAGE 0x08
#define | USB_DEVICE_CLASS_HUB 0x09
#define | USB_DEVICE_CLASS_MISCELLANEOUS 0xEF
#define | USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF
#define | USB_CONFIG_POWERED_MASK 0xC0
#define | USB_CONFIG_BUS_POWERED 0x80
#define | USB_CONFIG_SELF_POWERED 0xC0
#define | USB_CONFIG_REMOTE_WAKEUP 0x20
#define | USB_CONFIG_POWER_MA(mA) ((mA)/2)
#define | USB_ENDPOINT_DIRECTION_MASK 0x80
#define | USB_ENDPOINT_OUT(addr) ((addr) | 0x00)
#define | USB_ENDPOINT_IN(addr) ((addr) | 0x80)
#define | USB_ENDPOINT_TYPE_MASK 0x03
#define | USB_ENDPOINT_TYPE_CONTROL 0x00
#define | USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01
#define | USB_ENDPOINT_TYPE_BULK 0x02
#define | USB_ENDPOINT_TYPE_INTERRUPT 0x03
#define | USB_ENDPOINT_SYNC_MASK 0x0C
#define | USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION 0x00
#define | USB_ENDPOINT_SYNC_ASYNCHRONOUS 0x04
#define | USB_ENDPOINT_SYNC_ADAPTIVE 0x08
#define | USB_ENDPOINT_SYNC_SYNCHRONOUS 0x0C
#define | USB_ENDPOINT_USAGE_MASK 0x30
#define | USB_ENDPOINT_USAGE_DATA 0x00
#define | USB_ENDPOINT_USAGE_FEEDBACK 0x10
#define | USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK 0x20
#define | USB_ENDPOINT_USAGE_RESERVED 0x30

Variables

uint16_t | W
uint8_t | L
uint8_t | H
WB
WORD_BYTE
uint8_t | Recipient
uint8_t | Type
uint8_t | Dir
BM
uint8_t | B
REQUEST_TYPE
REQUEST_TYPE bmRequestType
uint8_t | bRequest
WORD_BYTE wValue
WORD_BYTE wIndex
uint16_t | wLength
USB_SETUP_PACKET
uint8_t | bLength
uint8_t | bDescriptorType
uint16_t | bcdUSB
uint8_t | bDeviceClass
uint8_t | bDeviceSubClass
uint8_t | bDeviceProtocol
uint8_t | bMaxPacketSize0
uint16_t | idVendor
uint16_t | idProduct
uint16_t | bcdDevice
uint8_t | iManufacturer
uint8_t | iProduct
uint8_t | iSerialNumber
uint8_t | bNumConfigurations
USB_DEVICE_DESCRIPTOR
uint8_t | bReserved
USB_DEVICE_QUALIFIER_DESCRIPTOR
uint16_t | wTotalLength
uint8_t | bNumInterfaces
uint8_t | bConfigurationValue
uint8_t | iConfiguration
uint8_t | bmAttributes
uint8_t | bMaxPower
USB_CONFIGURATION_DESCRIPTOR
uint8_t | bInterfaceNumber
uint8_t | bAlternateSetting
uint8_t | bNumEndpoints
uint8_t | bInterfaceClass
uint8_t | bInterfaceSubClass
uint8_t | bInterfaceProtocol
uint8_t | iInterface
USB_INTERFACE_DESCRIPTOR
uint8_t | bEndpointAddress
uint16_t | wMaxPacketSize
uint8_t | bInterval
USB_ENDPOINT_DESCRIPTOR
uint16_t | bString
USB_STRING_DESCRIPTOR
USB_COMMON_DESCRIPTOR

Define Documentation

#define REQUEST_CLASS 1

Definition at line 62 of file usb.h.

#define REQUEST_DEVICE_TO_HOST 1

Definition at line 58 of file usb.h.

#define REQUEST_HOST_TO_DEVICE 0

Definition at line 57 of file usb.h.

#define REQUEST_RESERVED 3

Definition at line 64 of file usb.h.

#define REQUEST_STANDARD 0

Definition at line 61 of file usb.h.

#define REQUEST_TO_DEVICE 0

Definition at line 67 of file usb.h.

#define REQUEST_TO_ENDPOINT 2

Definition at line 69 of file usb.h.

#define REQUEST_TO_INTERFACE 1

Definition at line 68 of file usb.h.

#define REQUEST_TO_OTHER 3

Definition at line 70 of file usb.h.

#define REQUEST_VENDOR 2

Definition at line 63 of file usb.h.

#define USB_CONFIG_BUS_POWERED 0x80

Definition at line 172 of file usb.h.

#define USB_CONFIG_POWER_MA ( mA ) ((mA)/2)

Definition at line 177 of file usb.h.

#define USB_CONFIG_POWERED_MASK 0xC0

Definition at line 171 of file usb.h.

#define USB_CONFIG_REMOTE_WAKEUP 0x20

Definition at line 174 of file usb.h.

#define USB_CONFIG_SELF_POWERED 0xC0

Definition at line 173 of file usb.h.

#define USB_CONFIGURATION_DESCRIPTOR_TYPE 2

Definition at line 145 of file usb.h.

#define USB_DEBUG_DESCRIPTOR_TYPE 10

Definition at line 153 of file usb.h.

#define USB_DEVICE_CLASS_AUDIO 0x01

Definition at line 158 of file usb.h.

#define USB_DEVICE_CLASS_COMMUNICATIONS 0x02

Definition at line 159 of file usb.h.

#define USB_DEVICE_CLASS_HUB 0x09

Definition at line 166 of file usb.h.

#define USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03

Definition at line 160 of file usb.h.

#define USB_DEVICE_CLASS_MISCELLANEOUS 0xEF

Definition at line 167 of file usb.h.

#define USB_DEVICE_CLASS_MONITOR 0x04

Definition at line 161 of file usb.h.

#define USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05

Definition at line 162 of file usb.h.

#define USB_DEVICE_CLASS_POWER 0x06

Definition at line 163 of file usb.h.

#define USB_DEVICE_CLASS_PRINTER 0x07

Definition at line 164 of file usb.h.

#define USB_DEVICE_CLASS_RESERVED 0x00

Definition at line 157 of file usb.h.

#define USB_DEVICE_CLASS_STORAGE 0x08

Definition at line 165 of file usb.h.

#define USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF

Definition at line 168 of file usb.h.

#define USB_DEVICE_DESCRIPTOR_TYPE 1

Definition at line 144 of file usb.h.

#define USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE 6

Definition at line 149 of file usb.h.

#define USB_ENDPOINT_DESCRIPTOR_TYPE 5

Definition at line 148 of file usb.h.

#define USB_ENDPOINT_DIRECTION_MASK 0x80

Definition at line 180 of file usb.h.

#define USB_ENDPOINT_IN ( addr ) ((addr) | 0x80)

Definition at line 182 of file usb.h.

#define USB_ENDPOINT_OUT ( addr ) ((addr) | 0x00)

Definition at line 181 of file usb.h.

#define USB_ENDPOINT_SYNC_ADAPTIVE 0x08

Definition at line 193 of file usb.h.

#define USB_ENDPOINT_SYNC_ASYNCHRONOUS 0x04

Definition at line 192 of file usb.h.

#define USB_ENDPOINT_SYNC_MASK 0x0C

Definition at line 190 of file usb.h.

#define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION 0x00

Definition at line 191 of file usb.h.

#define USB_ENDPOINT_SYNC_SYNCHRONOUS 0x0C

Definition at line 194 of file usb.h.

#define USB_ENDPOINT_TYPE_BULK 0x02

Definition at line 188 of file usb.h.

#define USB_ENDPOINT_TYPE_CONTROL 0x00

Definition at line 186 of file usb.h.

#define USB_ENDPOINT_TYPE_INTERRUPT 0x03

Definition at line 189 of file usb.h.

#define USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01

Definition at line 187 of file usb.h.

#define USB_ENDPOINT_TYPE_MASK 0x03

Definition at line 185 of file usb.h.

#define USB_ENDPOINT_USAGE_DATA 0x00

Definition at line 196 of file usb.h.

#define USB_ENDPOINT_USAGE_FEEDBACK 0x10

Definition at line 197 of file usb.h.

#define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK 0x20

Definition at line 198 of file usb.h.

#define USB_ENDPOINT_USAGE_MASK 0x30

Definition at line 195 of file usb.h.

#define USB_ENDPOINT_USAGE_RESERVED 0x30

Definition at line 199 of file usb.h.

#define USB_FEATURE_ENDPOINT_STALL 0

Definition at line 121 of file usb.h.

#define USB_FEATURE_REMOTE_WAKEUP 1

Definition at line 122 of file usb.h.

#define USB_GETSTATUS_ENDPOINT_STALL 0x01

Definition at line 118 of file usb.h.

#define USB_GETSTATUS_REMOTE_WAKEUP 0x02

Definition at line 117 of file usb.h.

#define USB_GETSTATUS_SELF_POWERED 0x01

Definition at line 116 of file usb.h.

#define USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE 11

Definition at line 154 of file usb.h.

#define USB_INTERFACE_DESCRIPTOR_TYPE 4

Definition at line 147 of file usb.h.

#define USB_INTERFACE_POWER_DESCRIPTOR_TYPE 8

Definition at line 151 of file usb.h.

#define USB_OTG_DESCRIPTOR_TYPE 9

Definition at line 152 of file usb.h.

#define USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7

Definition at line 150 of file usb.h.

#define USB_REQUEST_CLEAR_FEATURE 1

Definition at line 104 of file usb.h.

#define USB_REQUEST_GET_CONFIGURATION 8

Definition at line 109 of file usb.h.

#define USB_REQUEST_GET_DESCRIPTOR 6

Definition at line 107 of file usb.h.

#define USB_REQUEST_GET_INTERFACE 10

Definition at line 111 of file usb.h.

#define USB_REQUEST_GET_STATUS 0

Definition at line 103 of file usb.h.

#define USB_REQUEST_SET_ADDRESS 5

Definition at line 106 of file usb.h.

#define USB_REQUEST_SET_CONFIGURATION 9

Definition at line 110 of file usb.h.

#define USB_REQUEST_SET_DESCRIPTOR 7

Definition at line 108 of file usb.h.

#define USB_REQUEST_SET_FEATURE 3

Definition at line 105 of file usb.h.

#define USB_REQUEST_SET_INTERFACE 11

Definition at line 112 of file usb.h.

#define USB_REQUEST_SYNC_FRAME 12

Definition at line 113 of file usb.h.

#define USB_STRING_DESCRIPTOR_TYPE 3

Definition at line 146 of file usb.h.

Variable Documentation

uint8_t B

Definition at line 96 of file usb.h.

uint8_t bAlternateSetting

Definition at line 286 of file usb.h.

uint16_t bcdDevice

Definition at line 219 of file usb.h.

uint16_t bcdUSB

Definition at line 212 of file usb.h.

uint8_t bConfigurationValue

Definition at line 265 of file usb.h.

uint8_t bDescriptorType

Definition at line 211 of file usb.h.

uint8_t bDeviceClass

Definition at line 213 of file usb.h.

uint8_t bDeviceProtocol

Definition at line 215 of file usb.h.

uint8_t bDeviceSubClass

Definition at line 214 of file usb.h.

uint8_t bEndpointAddress

Definition at line 308 of file usb.h.

uint8_t bInterfaceClass

Definition at line 288 of file usb.h.

uint8_t bInterfaceNumber

Definition at line 285 of file usb.h.

uint8_t bInterfaceProtocol

Definition at line 290 of file usb.h.

uint8_t bInterfaceSubClass

Definition at line 289 of file usb.h.

uint8_t bInterval

Definition at line 311 of file usb.h.

uint8_t bLength

Definition at line 210 of file usb.h.

BM

Definition at line 92 of file usb.h.

uint8_t bmAttributes

Definition at line 267 of file usb.h.

uint8_t bMaxPacketSize0

Definition at line 216 of file usb.h.

uint8_t bMaxPower

Definition at line 268 of file usb.h.

REQUEST_TYPE bmRequestType

Definition at line 133 of file usb.h.

uint8_t bNumConfigurations

Definition at line 223 of file usb.h.

uint8_t bNumEndpoints

Definition at line 287 of file usb.h.

uint8_t bNumInterfaces

Definition at line 264 of file usb.h.

uint8_t bRequest

Definition at line 134 of file usb.h.

uint8_t bReserved

Definition at line 246 of file usb.h.

uint16_t bString

Definition at line 328 of file usb.h.

uint8_t Dir

Definition at line 91 of file usb.h.

uint8_t H

Definition at line 46 of file usb.h.

uint8_t iConfiguration

Definition at line 266 of file usb.h.

uint16_t idProduct

Definition at line 218 of file usb.h.

uint16_t idVendor

Definition at line 217 of file usb.h.

uint8_t iInterface

Definition at line 291 of file usb.h.

uint8_t iManufacturer

Definition at line 220 of file usb.h.

uint8_t iProduct

Definition at line 221 of file usb.h.

uint8_t iSerialNumber

Definition at line 222 of file usb.h.

uint8_t L

Definition at line 45 of file usb.h.

uint8_t Recipient

Definition at line 89 of file usb.h.

REQUEST_TYPE

Definition at line 97 of file usb.h.

uint8_t Type

Definition at line 90 of file usb.h.

USB_COMMON_DESCRIPTOR

Definition at line 345 of file usb.h.

USB_CONFIGURATION_DESCRIPTOR

Definition at line 269 of file usb.h.

USB_DEVICE_DESCRIPTOR

Definition at line 224 of file usb.h.

USB_DEVICE_QUALIFIER_DESCRIPTOR

Definition at line 247 of file usb.h.

USB_ENDPOINT_DESCRIPTOR

Definition at line 312 of file usb.h.

USB_INTERFACE_DESCRIPTOR

Definition at line 292 of file usb.h.

USB_SETUP_PACKET

Definition at line 138 of file usb.h.

USB_STRING_DESCRIPTOR

Definition at line 329 of file usb.h.

uint16_t W

Definition at line 36 of file usb.h.

WB

Definition at line 47 of file usb.h.

WORD_BYTE wIndex

Definition at line 136 of file usb.h.

uint16_t wLength

Definition at line 137 of file usb.h.

uint16_t wMaxPacketSize

Definition at line 310 of file usb.h.

WORD_BYTE

Definition at line 51 of file usb.h.

uint16_t wTotalLength

Definition at line 263 of file usb.h.

WORD_BYTE wValue

Definition at line 135 of file usb.h.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcfg.h File Reference

Go to the source code of this file.

Defines

#define | USB_POWER 0
#define | USB_IF_NUM 1
#define | USB_EP_NUM 32
#define | USB_MAX_PACKET0 8
#define | USB_DMA 1
#define | USB_DMA_EP 0x00000000
#define | USB_POWER_EVENT 0
#define | USB_RESET_EVENT 1
#define | USB_SUSPEND_EVENT 0
#define | USB_RESUME_EVENT 0
#define | USB_WAKEUP_EVENT 0
#define | USB_SOF_EVENT 0
#define | USB_ERROR_EVENT 0
#define | USB_EP_EVENT 0x0007
#define | USB_CONFIGURE_EVENT 1
#define | USB_INTERFACE_EVENT 0
#define | USB_FEATURE_EVENT 0
#define | USB_CLASS 1
#define | USB_HID 1
#define | USB_HID_IF_NUM 0
#define | USB_MSC 0
#define | USB_MSC_IF_NUM 0
#define | USB_AUDIO 0
#define | USB_ADC_CIF_NUM 0
#define | USB_ADC_SIF1_NUM 1
#define | USB_ADC_SIF2_NUM 2
#define | USB_CDC 0
#define | USB_CDC_CIF_NUM 0
#define | USB_CDC_DIF_NUM 1
#define | USB_CDC_BUFSIZE 64

Define Documentation

#define USB_ADC_CIF_NUM 0

Definition at line 156 of file usbcfg.h.

#define USB_ADC_SIF1_NUM 1

Definition at line 157 of file usbcfg.h.

#define USB_ADC_SIF2_NUM 2

Definition at line 158 of file usbcfg.h.

#define USB_AUDIO 0

Definition at line 155 of file usbcfg.h.

#define USB_CDC 0

Definition at line 159 of file usbcfg.h.

#define USB_CDC_BUFSIZE 64

Definition at line 162 of file usbcfg.h.

#define USB_CDC_CIF_NUM 0

Definition at line 160 of file usbcfg.h.

#define USB_CDC_DIF_NUM 1

Definition at line 161 of file usbcfg.h.

#define USB_CLASS 1

Definition at line 150 of file usbcfg.h.

#define USB_CONFIGURE_EVENT 1

Definition at line 129 of file usbcfg.h.

#define USB_DMA 1

Definition at line 79 of file usbcfg.h.

#define USB_DMA_EP 0x00000000

Definition at line 80 of file usbcfg.h.

#define USB_EP_EVENT 0x0007

Definition at line 128 of file usbcfg.h.

#define USB_EP_NUM 32

Definition at line 76 of file usbcfg.h.

#define USB_ERROR_EVENT 0

Definition at line 126 of file usbcfg.h.

#define USB_FEATURE_EVENT 0

Definition at line 131 of file usbcfg.h.

#define USB_HID 1

Definition at line 151 of file usbcfg.h.

#define USB_HID_IF_NUM 0

Definition at line 152 of file usbcfg.h.

#define USB_IF_NUM 1

Definition at line 75 of file usbcfg.h.

#define USB_INTERFACE_EVENT 0

Definition at line 130 of file usbcfg.h.

#define USB_MAX_PACKET0 8

Definition at line 78 of file usbcfg.h.

#define USB_MSC 0

Definition at line 153 of file usbcfg.h.

#define USB_MSC_IF_NUM 0

Definition at line 154 of file usbcfg.h.

#define USB_POWER 0

Definition at line 74 of file usbcfg.h.

#define USB_POWER_EVENT 0

Definition at line 120 of file usbcfg.h.

#define USB_RESET_EVENT 1

Definition at line 121 of file usbcfg.h.

#define USB_RESUME_EVENT 0

Definition at line 123 of file usbcfg.h.

#define USB_SOF_EVENT 0

Definition at line 125 of file usbcfg.h.

#define USB_SUSPEND_EVENT 0

Definition at line 122 of file usbcfg.h.

#define USB_WAKEUP_EVENT 0

Definition at line 124 of file usbcfg.h.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.c File Reference
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbdesc.h"
#include "usbuser.h"

Go to the source code of this file.

Functions

void | USB_ResetCore (void)
void | USB_SetupStage (void)
void | USB_DataInStage (void)
void | USB_DataOutStage (void)
void | USB_StatusInStage (void)
void | USB_StatusOutStage (void)
__inline uint32_t | USB_GetDescriptor (void)
__inline uint32_t | USB_SetConfiguration (void)
void | USB_EndPoint0 (uint32_t event)

Variables

uint16_t | USB_DeviceStatus
uint8_t | USB_DeviceAddress
uint8_t | USB_Configuration
uint32_t | USB_EndPointMask
uint32_t | USB_EndPointHalt
uint8_t | USB_NumInterfaces
uint8_t | USB_AltSetting [USB_IF_NUM]
uint8_t | EP0Buf [USB_MAX_PACKET0]
USB_EP_DATA EP0Data
USB_SETUP_PACKET SetupPacket

Function Documentation

void USB_DataInStage ( void )

Definition at line 111 of file usbcore.c.

void USB_DataOutStage ( void )

Definition at line 131 of file usbcore.c.

void USB_EndPoint0 ( uint32_t event )

Definition at line 335 of file usbcore.c.

__inline uint32_t USB_GetDescriptor ( void )

Definition at line 171 of file usbcore.c.

void USB_ResetCore ( void )

Definition at line 84 of file usbcore.c.

__inline uint32_t USB_SetConfiguration ( void )

Definition at line 259 of file usbcore.c.

void USB_SetupStage ( void )

Definition at line 100 of file usbcore.c.

void USB_StatusInStage ( void )

Definition at line 146 of file usbcore.c.

void USB_StatusOutStage ( void )

Definition at line 157 of file usbcore.c.

Variable Documentation

uint8_t EP0Buf[USB_MAX_PACKET0]

Definition at line 70 of file usbcore.c.

USB_EP_DATA EP0Data

Definition at line 73 of file usbcore.c.

USB_SETUP_PACKET SetupPacket

Definition at line 75 of file usbcore.c.

uint8_t USB_AltSetting[USB_IF_NUM]

Definition at line 68 of file usbcore.c.

uint8_t USB_Configuration

Definition at line 64 of file usbcore.c.

uint8_t USB_DeviceAddress

Definition at line 63 of file usbcore.c.

uint16_t USB_DeviceStatus

Definition at line 62 of file usbcore.c.

uint32_t USB_EndPointHalt

Definition at line 66 of file usbcore.c.

uint32_t USB_EndPointMask

Definition at line 65 of file usbcore.c.

uint8_t USB_NumInterfaces

Definition at line 67 of file usbcore.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.h File Reference

Data Structures | Typedefs | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.h File Reference

Go to the source code of this file.

Data Structures

struct | _USB_EP_DATA

Typedefs

typedef struct _USB_EP_DATA | USB_EP_DATA

Functions

void | USB_ResetCore (void)

Variables

uint16_t | USB_DeviceStatus
uint8_t | USB_DeviceAddress
uint8_t | USB_Configuration
uint32_t | USB_EndPointMask
uint32_t | USB_EndPointHalt
uint8_t | USB_AltSetting [USB_IF_NUM]
uint8_t | EP0Buf [USB_MAX_PACKET0]
USB_EP_DATA EP0Data
USB_SETUP_PACKET SetupPacket

Typedef Documentation

typedef struct _USB_EP_DATA USB_EP_DATA

Function Documentation

void USB_ResetCore ( void )

Definition at line 99 of file usbcore.c.

Variable Documentation

uint8_t EP0Buf[USB_MAX_PACKET0]

Definition at line 85 of file usbcore.c.

USB_EP_DATA EP0Data

Definition at line 88 of file usbcore.c.

USB_SETUP_PACKET SetupPacket

Definition at line 90 of file usbcore.c.

uint8_t USB_AltSetting[USB_IF_NUM]

Definition at line 83 of file usbcore.c.

uint8_t USB_Configuration

Definition at line 78 of file usbcore.c.

uint8_t USB_DeviceAddress

Definition at line 77 of file usbcore.c.

uint16_t USB_DeviceStatus

Definition at line 76 of file usbcore.c.

uint32_t USB_EndPointHalt

Definition at line 80 of file usbcore.c.

uint32_t USB_EndPointMask

Definition at line 79 of file usbcore.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbdesc.c File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbdesc.c File Reference
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbdesc.h"
#include "hid.h"

Go to the source code of this file.

Variables

const uint8_t | HID_ReportDescriptor []
const uint16_t | HID_ReportDescSize = sizeof(HID_ReportDescriptor)
const uint8_t | USB_DeviceDescriptor []
const uint8_t | USB_ConfigDescriptor []
const uint8_t | USB_StringDescriptor []

Variable Documentation

const uint8_t HID_ReportDescriptor[]
Initial value:
 {
  HID_UsagePageVendor(0x00),
  HID_Usage(0x01),
  HID_Collection(HID_Application),
    HID_UsagePage(HID_USAGE_PAGE_BUTTON),
    HID_UsageMin(1),
    HID_UsageMax(3),
    HID_LogicalMin(0),
    HID_LogicalMax(1),
    HID_ReportCount(3),
    HID_ReportSize(1),
    HID_Input(HID_Data | HID_Variable | HID_Absolute),
    HID_ReportCount(1),
    HID_ReportSize(5),
    HID_Input(HID_Constant),
    HID_UsagePage(HID_USAGE_PAGE_LED),
    HID_Usage(HID_USAGE_LED_GENERIC_INDICATOR),
    HID_LogicalMin(0),
    HID_LogicalMax(1),
    HID_ReportCount(8),
    HID_ReportSize(1),
    HID_Output(HID_Data | HID_Variable | HID_Absolute),
  HID_EndCollection,
}

Definition at line 28 of file usbdesc.c.

const uint16_t HID_ReportDescSize = sizeof(HID_ReportDescriptor)

Definition at line 53 of file usbdesc.c.

const uint8_t USB_ConfigDescriptor[]

Definition at line 76 of file usbdesc.c.

const uint8_t USB_DeviceDescriptor[]
Initial value:
 {
  USB_DEVICE_DESC_SIZE,
  USB_DEVICE_DESCRIPTOR_TYPE,
  WBVAL(0x0200),
  0x00,
  0x00,
  0x00,
  USB_MAX_PACKET0,
  WBVAL(0xC251),
  WBVAL(0x2201),
  WBVAL(0x0100),
  0x04,
  0x20,
  0x42,
  0x01
}

Definition at line 57 of file usbdesc.c.

const uint8_t USB_StringDescriptor[]

Definition at line 123 of file usbdesc.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbdesc.h File Reference

Defines | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbdesc.h File Reference

Go to the source code of this file.

Defines

#define | WBVAL(x) (x & 0xFF),((x >> 8) & 0xFF)
#define | USB_DEVICE_DESC_SIZE (sizeof(USB_DEVICE_DESCRIPTOR))
#define | USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))
#define | USB_INTERFACE_DESC_SIZE (sizeof(USB_INTERFACE_DESCRIPTOR))
#define | USB_ENDPOINT_DESC_SIZE (sizeof(USB_ENDPOINT_DESCRIPTOR))
#define | HID_DESC_OFFSET 0x0012
#define | HID_DESC_SIZE (sizeof(HID_DESCRIPTOR))
#define | HID_REPORT_DESC_SIZE (sizeof(HID_ReportDescriptor))

Variables

const uint8_t | USB_DeviceDescriptor []
const uint8_t | USB_ConfigDescriptor []
const uint8_t | USB_StringDescriptor []
const uint8_t | HID_ReportDescriptor []
const uint16_t | HID_ReportDescSize

Define Documentation

#define HID_DESC_OFFSET 0x0012

Definition at line 28 of file usbdesc.h.

#define HID_DESC_SIZE (sizeof(HID_DESCRIPTOR))

Definition at line 29 of file usbdesc.h.

#define HID_REPORT_DESC_SIZE (sizeof(HID_ReportDescriptor))

Definition at line 30 of file usbdesc.h.

#define USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))

Definition at line 24 of file usbdesc.h.

#define USB_DEVICE_DESC_SIZE (sizeof(USB_DEVICE_DESCRIPTOR))

Definition at line 23 of file usbdesc.h.

#define USB_ENDPOINT_DESC_SIZE (sizeof(USB_ENDPOINT_DESCRIPTOR))

Definition at line 26 of file usbdesc.h.

#define USB_INTERFACE_DESC_SIZE (sizeof(USB_INTERFACE_DESCRIPTOR))

Definition at line 25 of file usbdesc.h.

#define WBVAL ( x ) (x & 0xFF),((x >> 8) & 0xFF)

Definition at line 21 of file usbdesc.h.

Variable Documentation

const uint8_t HID_ReportDescriptor[]

Definition at line 28 of file usbdesc.c.

const uint16_t HID_ReportDescSize

Definition at line 53 of file usbdesc.c.

const uint8_t USB_ConfigDescriptor[]

Definition at line 50 of file usbdesc.c.

const uint8_t USB_DeviceDescriptor[]

Definition at line 31 of file usbdesc.c.

const uint8_t USB_StringDescriptor[]

Definition at line 185 of file usbdesc.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.c File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.c File Reference
#include "LPC17xx.h"
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbreg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbuser.h"

Go to the source code of this file.

Defines

#define | EP_MSK_CTRL 0x0001
#define | EP_MSK_BULK 0xC924
#define | EP_MSK_INT 0x4492
#define | EP_MSK_ISO 0x1248

Functions

uint32_t | EPAdr (uint32_t EPNum)
void | WrCmd (uint32_t cmd)
void | WrCmdDat (uint32_t cmd, uint32_t val)
uint32_t | RdCmdDat (uint32_t cmd)
void | USB_Init (void)
void | USB_Connect (uint32_t con)
void | USB_Reset (void)
void | USB_Suspend (void)
void | USB_Resume (void)
void | USB_WakeUp (void)
void | USB_WakeUpCfg (uint32_t cfg)
void | USB_SetAddress (uint32_t adr)
void | USB_Configure (uint32_t cfg)
void | USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD)
void | USB_DirCtrlEP (uint32_t dir)
void | USB_EnableEP (uint32_t EPNum)
void | USB_DisableEP (uint32_t EPNum)
void | USB_ResetEP (uint32_t EPNum)
void | USB_SetStallEP (uint32_t EPNum)
void | USB_ClrStallEP (uint32_t EPNum)
uint32_t | USB_ReadEP (uint32_t EPNum, uint8_t *pData)
uint32_t | USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt)
uint32_t | USB_GetFrame (void)
void | USB_IRQHandler (void)

Define Documentation

#define EP_MSK_BULK 0xC924

Definition at line 35 of file usbhw.c.

#define EP_MSK_CTRL 0x0001

Definition at line 34 of file usbhw.c.

#define EP_MSK_INT 0x4492

Definition at line 36 of file usbhw.c.

#define EP_MSK_ISO 0x1248

Definition at line 37 of file usbhw.c.

Function Documentation

uint32_t EPAdr ( uint32_t EPNum )

Definition at line 83 of file usbhw.c.

uint32_t RdCmdDat ( uint32_t cmd )

Definition at line 132 of file usbhw.c.

void USB_ClrStallEP ( uint32_t EPNum )

Definition at line 389 of file usbhw.c.

void USB_ConfigEP ( USB_ENDPOINT_DESCRIPTOR * pEPD )

Definition at line 306 of file usbhw.c.

void USB_Configure ( uint32_t cfg )

Definition at line 290 of file usbhw.c.

void USB_Connect ( uint32_t con )

Definition at line 177 of file usbhw.c.

void USB_DirCtrlEP ( uint32_t dir )

Definition at line 324 of file usbhw.c.

void USB_DisableEP ( uint32_t EPNum )

Definition at line 350 of file usbhw.c.

void USB_EnableEP ( uint32_t EPNum )

Definition at line 337 of file usbhw.c.

uint32_t USB_GetFrame ( void )

Definition at line 644 of file usbhw.c.

void USB_Init ( void )

Definition at line 147 of file usbhw.c.

void USB_IRQHandler ( void )

Definition at line 658 of file usbhw.c.

uint32_t USB_ReadEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData
 | ) |  |

Definition at line 403 of file usbhw.c.

void USB_Reset ( void )

Definition at line 188 of file usbhw.c.

void USB_ResetEP ( uint32_t EPNum )

Definition at line 363 of file usbhw.c.

void USB_Resume ( void )

Definition at line 242 of file usbhw.c.

void USB_SetAddress ( uint32_t adr )

Definition at line 278 of file usbhw.c.

void USB_SetStallEP ( uint32_t EPNum )

Definition at line 376 of file usbhw.c.

void USB_Suspend ( void )

Definition at line 231 of file usbhw.c.

void USB_WakeUp ( void )

Definition at line 253 of file usbhw.c.

void USB_WakeUpCfg ( uint32_t cfg )

Definition at line 267 of file usbhw.c.

uint32_t USB_WriteEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData,
 |  | uint32_t | cnt
 | ) |  |

Definition at line 437 of file usbhw.c.

void WrCmd ( uint32_t cmd )

Definition at line 100 of file usbhw.c.

void WrCmdDat | ( | uint32_t | cmd,
 |  | uint32_t | val
 | ) |  |

Definition at line 115 of file usbhw.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.h File Reference

Data Structures | Defines | Typedefs | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.h File Reference

Go to the source code of this file.

Data Structures

struct | _USB_DMA_DESCRIPTOR

Defines

#define | USB_RAM_ADR 0x20080000
#define | USB_RAM_SZ 0x00004000
#define | DD_NISO_CNT 16
#define | DD_ISO_CNT 8
#define | DD_NISO_SZ (DD_NISO_CNT * 16)
#define | DD_ISO_SZ (DD_ISO_CNT * 20)
#define | DD_NISO_ADR (USB_RAM_ADR + 128)
#define | DD_ISO_ADR (DD_NISO_ADR + DD_NISO_SZ)
#define | DD_SZ (128 + DD_NISO_SZ + DD_ISO_SZ)
#define | DMA_BUF_ADR (USB_RAM_ADR + DD_SZ)
#define | DMA_BUF_SZ (USB_RAM_SZ - DD_SZ)
#define | USB_ERR_PID 0x0001
#define | USB_ERR_UEPKT 0x0002
#define | USB_ERR_DCRC 0x0004
#define | USB_ERR_TIMOUT 0x0008
#define | USB_ERR_EOP 0x0010
#define | USB_ERR_B_OVRN 0x0020
#define | USB_ERR_BTSTF 0x0040
#define | USB_ERR_TGL 0x0080
#define | USB_DMA_INVALID 0x0000
#define | USB_DMA_IDLE 0x0001
#define | USB_DMA_BUSY 0x0002
#define | USB_DMA_DONE 0x0003
#define | USB_DMA_OVER_RUN 0x0004
#define | USB_DMA_UNDER_RUN 0x0005
#define | USB_DMA_ERROR 0x0006
#define | USB_DMA_UNKNOWN 0xFFFF

Typedefs

typedef struct _USB_DMA_DESCRIPTOR | USB_DMA_DESCRIPTOR

Functions

void | USB_Init (void)
void | USB_Connect (uint32_t con)
void | USB_Reset (void)
void | USB_Suspend (void)
void | USB_Resume (void)
void | USB_WakeUp (void)
void | USB_WakeUpCfg (uint32_t cfg)
void | USB_SetAddress (uint32_t adr)
void | USB_Configure (uint32_t cfg)
void | USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD)
void | USB_DirCtrlEP (uint32_t dir)
void | USB_EnableEP (uint32_t EPNum)
void | USB_DisableEP (uint32_t EPNum)
void | USB_ResetEP (uint32_t EPNum)
void | USB_SetStallEP (uint32_t EPNum)
void | USB_ClrStallEP (uint32_t EPNum)
uint32_t | USB_ReadEP (uint32_t EPNum, uint8_t *pData)
uint32_t | USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt)
uint32_t | USB_DMA_Setup (uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD)
void | USB_DMA_Enable (uint32_t EPNum)
void | USB_DMA_Disable (uint32_t EPNum)
uint32_t | USB_DMA_Status (uint32_t EPNum)
uint32_t | USB_DMA_BufAdr (uint32_t EPNum)
uint32_t | USB_DMA_BufCnt (uint32_t EPNum)
uint32_t | USB_GetFrame (void)
void | USB_IRQHandler (void)

Define Documentation

#define DD_ISO_ADR (DD_NISO_ADR + DD_NISO_SZ)

Definition at line 33 of file usbhw.h.

#define DD_ISO_CNT 8

Definition at line 29 of file usbhw.h.

#define DD_ISO_SZ (DD_ISO_CNT * 20)

Definition at line 31 of file usbhw.h.

#define DD_NISO_ADR (USB_RAM_ADR + 128)

Definition at line 32 of file usbhw.h.

#define DD_NISO_CNT 16

Definition at line 28 of file usbhw.h.

#define DD_NISO_SZ (DD_NISO_CNT * 16)

Definition at line 30 of file usbhw.h.

#define DD_SZ (128 + DD_NISO_SZ + DD_ISO_SZ)

Definition at line 34 of file usbhw.h.

#define DMA_BUF_ADR (USB_RAM_ADR + DD_SZ)

Definition at line 37 of file usbhw.h.

#define DMA_BUF_SZ (USB_RAM_SZ - DD_SZ)

Definition at line 38 of file usbhw.h.

#define USB_DMA_BUSY 0x0002

Definition at line 53 of file usbhw.h.

#define USB_DMA_DONE 0x0003

Definition at line 54 of file usbhw.h.

#define USB_DMA_ERROR 0x0006

Definition at line 57 of file usbhw.h.

#define USB_DMA_IDLE 0x0001

Definition at line 52 of file usbhw.h.

#define USB_DMA_INVALID 0x0000

Definition at line 51 of file usbhw.h.

#define USB_DMA_OVER_RUN 0x0004

Definition at line 55 of file usbhw.h.

#define USB_DMA_UNDER_RUN 0x0005

Definition at line 56 of file usbhw.h.

#define USB_DMA_UNKNOWN 0xFFFF

Definition at line 58 of file usbhw.h.

#define USB_ERR_B_OVRN 0x0020

Definition at line 46 of file usbhw.h.

#define USB_ERR_BTSTF 0x0040

Definition at line 47 of file usbhw.h.

#define USB_ERR_DCRC 0x0004

Definition at line 43 of file usbhw.h.

#define USB_ERR_EOP 0x0010

Definition at line 45 of file usbhw.h.

#define USB_ERR_PID 0x0001

Definition at line 41 of file usbhw.h.

#define USB_ERR_TGL 0x0080

Definition at line 48 of file usbhw.h.

#define USB_ERR_TIMOUT 0x0008

Definition at line 44 of file usbhw.h.

#define USB_ERR_UEPKT 0x0002

Definition at line 42 of file usbhw.h.

#define USB_RAM_ADR 0x20080000

Definition at line 24 of file usbhw.h.

#define USB_RAM_SZ 0x00004000

Definition at line 25 of file usbhw.h.

Typedef Documentation

typedef struct _USB_DMA_DESCRIPTOR USB_DMA_DESCRIPTOR

Function Documentation

void USB_ClrStallEP ( uint32_t EPNum )

Definition at line 390 of file usbhw.c.

void USB_ConfigEP ( USB_ENDPOINT_DESCRIPTOR * pEPD )

Definition at line 307 of file usbhw.c.

void USB_Configure ( uint32_t cfg )

Definition at line 291 of file usbhw.c.

void USB_Connect ( uint32_t con )

Definition at line 178 of file usbhw.c.

void USB_DirCtrlEP ( uint32_t dir )

Definition at line 325 of file usbhw.c.

void USB_DisableEP ( uint32_t EPNum )

Definition at line 351 of file usbhw.c.

uint32_t USB_DMA_BufAdr ( uint32_t EPNum )
uint32_t USB_DMA_BufCnt ( uint32_t EPNum )
void USB_DMA_Disable ( uint32_t EPNum )
void USB_DMA_Enable ( uint32_t EPNum )
uint32_t USB_DMA_Setup | ( | uint32_t | EPNum,
 |  | USB_DMA_DESCRIPTOR * | pDD
 | ) |  |
uint32_t USB_DMA_Status ( uint32_t EPNum )
void USB_EnableEP ( uint32_t EPNum )

Definition at line 338 of file usbhw.c.

uint32_t USB_GetFrame ( void )

Definition at line 647 of file usbhw.c.

void USB_Init ( void )

Definition at line 148 of file usbhw.c.

void USB_IRQHandler ( void )

Definition at line 662 of file usbhw.c.

uint32_t USB_ReadEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData
 | ) |  |

Definition at line 417 of file usbhw.c.

void USB_Reset ( void )

Definition at line 189 of file usbhw.c.

void USB_ResetEP ( uint32_t EPNum )

Definition at line 364 of file usbhw.c.

void USB_Resume ( void )

Definition at line 243 of file usbhw.c.

void USB_SetAddress ( uint32_t adr )

Definition at line 279 of file usbhw.c.

void USB_SetStallEP ( uint32_t EPNum )

Definition at line 377 of file usbhw.c.

void USB_Suspend ( void )

Definition at line 232 of file usbhw.c.

void USB_WakeUp ( void )

Definition at line 254 of file usbhw.c.

void USB_WakeUpCfg ( uint32_t cfg )

Definition at line 268 of file usbhw.c.

uint32_t USB_WriteEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData,
 |  | uint32_t | cnt
 | ) |  |

Definition at line 450 of file usbhw.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbreg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbreg.h File Reference

Go to the source code of this file.

Defines

#define | FRAME_INT 0x00000001
#define | EP_FAST_INT 0x00000002
#define | EP_SLOW_INT 0x00000004
#define | DEV_STAT_INT 0x00000008
#define | CCEMTY_INT 0x00000010
#define | CDFULL_INT 0x00000020
#define | RxENDPKT_INT 0x00000040
#define | TxENDPKT_INT 0x00000080
#define | EP_RLZED_INT 0x00000100
#define | ERR_INT 0x00000200
#define | PKT_LNGTH_MASK 0x000003FF
#define | PKT_DV 0x00000400
#define | PKT_RDY 0x00000800
#define | CTRL_RD_EN 0x00000001
#define | CTRL_WR_EN 0x00000002
#define | CMD_SET_ADDR 0x00D00500
#define | CMD_CFG_DEV 0x00D80500
#define | CMD_SET_MODE 0x00F30500
#define | CMD_RD_FRAME 0x00F50500
#define | DAT_RD_FRAME 0x00F50200
#define | CMD_RD_TEST 0x00FD0500
#define | DAT_RD_TEST 0x00FD0200
#define | CMD_SET_DEV_STAT 0x00FE0500
#define | CMD_GET_DEV_STAT 0x00FE0500
#define | DAT_GET_DEV_STAT 0x00FE0200
#define | CMD_GET_ERR_CODE 0x00FF0500
#define | DAT_GET_ERR_CODE 0x00FF0200
#define | CMD_RD_ERR_STAT 0x00FB0500
#define | DAT_RD_ERR_STAT 0x00FB0200
#define | DAT_WR_BYTE(x) (0x00000100 | ((x) << 16))
#define | CMD_SEL_EP(x) (0x00000500 | ((x) << 16))
#define | DAT_SEL_EP(x) (0x00000200 | ((x) << 16))
#define | CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16))
#define | DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16))
#define | CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16))
#define | CMD_CLR_BUF 0x00F20500
#define | DAT_CLR_BUF 0x00F20200
#define | CMD_VALID_BUF 0x00FA0500
#define | DEV_ADDR_MASK 0x7F
#define | DEV_EN 0x80
#define | CONF_DVICE 0x01
#define | AP_CLK 0x01
#define | INAK_CI 0x02
#define | INAK_CO 0x04
#define | INAK_II 0x08
#define | INAK_IO 0x10
#define | INAK_BI 0x20
#define | INAK_BO 0x40
#define | DEV_CON 0x01
#define | DEV_CON_CH 0x02
#define | DEV_SUS 0x04
#define | DEV_SUS_CH 0x08
#define | DEV_RST 0x10
#define | ERR_EC_MASK 0x0F
#define | ERR_EA 0x10
#define | ERR_PID 0x01
#define | ERR_UEPKT 0x02
#define | ERR_DCRC 0x04
#define | ERR_TIMOUT 0x08
#define | ERR_EOP 0x10
#define | ERR_B_OVRN 0x20
#define | ERR_BTSTF 0x40
#define | ERR_TGL 0x80
#define | EP_SEL_F 0x01
#define | EP_SEL_ST 0x02
#define | EP_SEL_STP 0x04
#define | EP_SEL_PO 0x08
#define | EP_SEL_EPN 0x10
#define | EP_SEL_B_1_FULL 0x20
#define | EP_SEL_B_2_FULL 0x40
#define | EP_STAT_ST 0x01
#define | EP_STAT_DA 0x20
#define | EP_STAT_RF_MO 0x40
#define | EP_STAT_CND_ST 0x80
#define | CLR_BUF_PO 0x01
#define | EOT_INT 0x01
#define | NDD_REQ_INT 0x02
#define | SYS_ERR_INT 0x04

Define Documentation

#define AP_CLK 0x01

Definition at line 77 of file usbreg.h.

#define CCEMTY_INT 0x00000010

Definition at line 28 of file usbreg.h.

#define CDFULL_INT 0x00000020

Definition at line 29 of file usbreg.h.

#define CLR_BUF_PO 0x01

Definition at line 122 of file usbreg.h.

#define CMD_CFG_DEV 0x00D80500

Definition at line 46 of file usbreg.h.

#define CMD_CLR_BUF 0x00F20500

Definition at line 65 of file usbreg.h.

#define CMD_GET_DEV_STAT 0x00FE0500

Definition at line 53 of file usbreg.h.

#define CMD_GET_ERR_CODE 0x00FF0500

Definition at line 55 of file usbreg.h.

#define CMD_RD_ERR_STAT 0x00FB0500

Definition at line 57 of file usbreg.h.

#define CMD_RD_FRAME 0x00F50500

Definition at line 48 of file usbreg.h.

#define CMD_RD_TEST 0x00FD0500

Definition at line 50 of file usbreg.h.

#define CMD_SEL_EP ( x ) (0x00000500 | ((x) << 16))

Definition at line 60 of file usbreg.h.

#define CMD_SEL_EP_CLRI ( x ) (0x00400500 | ((x) << 16))

Definition at line 62 of file usbreg.h.

#define CMD_SET_ADDR 0x00D00500

Definition at line 45 of file usbreg.h.

#define CMD_SET_DEV_STAT 0x00FE0500

Definition at line 52 of file usbreg.h.

#define CMD_SET_EP_STAT ( x ) (0x00400500 | ((x) << 16))

Definition at line 64 of file usbreg.h.

#define CMD_SET_MODE 0x00F30500

Definition at line 47 of file usbreg.h.

#define CMD_VALID_BUF 0x00FA0500

Definition at line 67 of file usbreg.h.

#define CONF_DVICE 0x01

Definition at line 74 of file usbreg.h.

#define CTRL_RD_EN 0x00000001

Definition at line 41 of file usbreg.h.

#define CTRL_WR_EN 0x00000002

Definition at line 42 of file usbreg.h.

#define DAT_CLR_BUF 0x00F20200

Definition at line 66 of file usbreg.h.

#define DAT_GET_DEV_STAT 0x00FE0200

Definition at line 54 of file usbreg.h.

#define DAT_GET_ERR_CODE 0x00FF0200

Definition at line 56 of file usbreg.h.

#define DAT_RD_ERR_STAT 0x00FB0200

Definition at line 58 of file usbreg.h.

#define DAT_RD_FRAME 0x00F50200

Definition at line 49 of file usbreg.h.

#define DAT_RD_TEST 0x00FD0200

Definition at line 51 of file usbreg.h.

#define DAT_SEL_EP ( x ) (0x00000200 | ((x) << 16))

Definition at line 61 of file usbreg.h.

#define DAT_SEL_EP_CLRI ( x ) (0x00400200 | ((x) << 16))

Definition at line 63 of file usbreg.h.

#define DAT_WR_BYTE ( x ) (0x00000100 | ((x) << 16))

Definition at line 59 of file usbreg.h.

#define DEV_ADDR_MASK 0x7F

Definition at line 70 of file usbreg.h.

#define DEV_CON 0x01

Definition at line 86 of file usbreg.h.

#define DEV_CON_CH 0x02

Definition at line 87 of file usbreg.h.

#define DEV_EN 0x80

Definition at line 71 of file usbreg.h.

#define DEV_RST 0x10

Definition at line 90 of file usbreg.h.

#define DEV_STAT_INT 0x00000008

Definition at line 27 of file usbreg.h.

#define DEV_SUS 0x04

Definition at line 88 of file usbreg.h.

#define DEV_SUS_CH 0x08

Definition at line 89 of file usbreg.h.

#define EOT_INT 0x01

Definition at line 126 of file usbreg.h.

#define EP_FAST_INT 0x00000002

Definition at line 25 of file usbreg.h.

#define EP_RLZED_INT 0x00000100

Definition at line 32 of file usbreg.h.

#define EP_SEL_B_1_FULL 0x20

Definition at line 112 of file usbreg.h.

#define EP_SEL_B_2_FULL 0x40

Definition at line 113 of file usbreg.h.

#define EP_SEL_EPN 0x10

Definition at line 111 of file usbreg.h.

#define EP_SEL_F 0x01

Definition at line 107 of file usbreg.h.

#define EP_SEL_PO 0x08

Definition at line 110 of file usbreg.h.

#define EP_SEL_ST 0x02

Definition at line 108 of file usbreg.h.

#define EP_SEL_STP 0x04

Definition at line 109 of file usbreg.h.

#define EP_SLOW_INT 0x00000004

Definition at line 26 of file usbreg.h.

#define EP_STAT_CND_ST 0x80

Definition at line 119 of file usbreg.h.

#define EP_STAT_DA 0x20

Definition at line 117 of file usbreg.h.

#define EP_STAT_RF_MO 0x40

Definition at line 118 of file usbreg.h.

#define EP_STAT_ST 0x01

Definition at line 116 of file usbreg.h.

#define ERR_B_OVRN 0x20

Definition at line 102 of file usbreg.h.

#define ERR_BTSTF 0x40

Definition at line 103 of file usbreg.h.

#define ERR_DCRC 0x04

Definition at line 99 of file usbreg.h.

#define ERR_EA 0x10

Definition at line 94 of file usbreg.h.

#define ERR_EC_MASK 0x0F

Definition at line 93 of file usbreg.h.

#define ERR_EOP 0x10

Definition at line 101 of file usbreg.h.

#define ERR_INT 0x00000200

Definition at line 33 of file usbreg.h.

#define ERR_PID 0x01

Definition at line 97 of file usbreg.h.

#define ERR_TGL 0x80

Definition at line 104 of file usbreg.h.

#define ERR_TIMOUT 0x08

Definition at line 100 of file usbreg.h.

#define ERR_UEPKT 0x02

Definition at line 98 of file usbreg.h.

#define FRAME_INT 0x00000001

Definition at line 24 of file usbreg.h.

#define INAK_BI 0x20

Definition at line 82 of file usbreg.h.

#define INAK_BO 0x40

Definition at line 83 of file usbreg.h.

#define INAK_CI 0x02

Definition at line 78 of file usbreg.h.

#define INAK_CO 0x04

Definition at line 79 of file usbreg.h.

#define INAK_II 0x08

Definition at line 80 of file usbreg.h.

#define INAK_IO 0x10

Definition at line 81 of file usbreg.h.

#define NDD_REQ_INT 0x02

Definition at line 127 of file usbreg.h.

#define PKT_DV 0x00000400

Definition at line 37 of file usbreg.h.

#define PKT_LNGTH_MASK 0x000003FF

Definition at line 36 of file usbreg.h.

#define PKT_RDY 0x00000800

Definition at line 38 of file usbreg.h.

#define RxENDPKT_INT 0x00000040

Definition at line 30 of file usbreg.h.

#define SYS_ERR_INT 0x04

Definition at line 128 of file usbreg.h.

#define TxENDPKT_INT 0x00000080

Definition at line 31 of file usbreg.h.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbuser.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbuser.c File Reference
#include "LPC17xx.h"
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbuser.h"
#include "demo.h"

Go to the source code of this file.

Defines

#define | P_EP(n) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)

Functions

void | USB_EndPoint1 (uint32_t event)
void | USB_EndPoint2 (uint32_t event)
void | USB_EndPoint3 (uint32_t event)
void | USB_EndPoint4 (uint32_t event)
void | USB_EndPoint5 (uint32_t event)
void | USB_EndPoint6 (uint32_t event)
void | USB_EndPoint7 (uint32_t event)
void | USB_EndPoint8 (uint32_t event)
void | USB_EndPoint9 (uint32_t event)
void | USB_EndPoint10 (uint32_t event)
void | USB_EndPoint11 (uint32_t event)
void | USB_EndPoint12 (uint32_t event)
void | USB_EndPoint13 (uint32_t event)
void | USB_EndPoint14 (uint32_t event)
void | USB_EndPoint15 (uint32_t event)

Variables

void(*const | USB_P_EP [16])(uint32_t event)

Define Documentation

#define P_EP ( n ) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)

Definition at line 149 of file usbuser.c.

Function Documentation

void USB_EndPoint1 ( uint32_t event )

Definition at line 178 of file usbuser.c.

void USB_EndPoint10 ( uint32_t event )

Definition at line 287 of file usbuser.c.

void USB_EndPoint11 ( uint32_t event )

Definition at line 297 of file usbuser.c.

void USB_EndPoint12 ( uint32_t event )

Definition at line 307 of file usbuser.c.

void USB_EndPoint13 ( uint32_t event )

Definition at line 317 of file usbuser.c.

void USB_EndPoint14 ( uint32_t event )

Definition at line 327 of file usbuser.c.

void USB_EndPoint15 ( uint32_t event )

Definition at line 337 of file usbuser.c.

void USB_EndPoint2 ( uint32_t event )

Definition at line 195 of file usbuser.c.

void USB_EndPoint3 ( uint32_t event )

Definition at line 211 of file usbuser.c.

void USB_EndPoint4 ( uint32_t event )

Definition at line 227 of file usbuser.c.

void USB_EndPoint5 ( uint32_t event )

Definition at line 237 of file usbuser.c.

void USB_EndPoint6 ( uint32_t event )

Definition at line 247 of file usbuser.c.

void USB_EndPoint7 ( uint32_t event )

Definition at line 257 of file usbuser.c.

void USB_EndPoint8 ( uint32_t event )

Definition at line 267 of file usbuser.c.

void USB_EndPoint9 ( uint32_t event )

Definition at line 277 of file usbuser.c.

Variable Documentation

void(* const USB_P_EP[16])(uint32_t event)
Initial value:
 {
  P_EP(0),
  P_EP(1),
  P_EP(2),
  P_EP(3),
  P_EP(4),
  P_EP(5),
  P_EP(6),
  P_EP(7),
  P_EP(8),
  P_EP(9),
  P_EP(10),
  P_EP(11),
  P_EP(12),
  P_EP(13),
  P_EP(14),
  P_EP(15),
}

Definition at line 152 of file usbuser.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbuser.h File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbuser.h File Reference

Go to the source code of this file.

Defines

#define | USB_EVT_SETUP 1
#define | USB_EVT_OUT 2
#define | USB_EVT_IN 3
#define | USB_EVT_OUT_NAK 4
#define | USB_EVT_IN_NAK 5
#define | USB_EVT_OUT_STALL 6
#define | USB_EVT_IN_STALL 7
#define | USB_EVT_OUT_DMA_EOT 8
#define | USB_EVT_IN_DMA_EOT 9
#define | USB_EVT_OUT_DMA_NDR 10
#define | USB_EVT_IN_DMA_NDR 11
#define | USB_EVT_OUT_DMA_ERR 12
#define | USB_EVT_IN_DMA_ERR 13

Functions

void | USB_Power_Event (uint32_t power)
void | USB_Reset_Event (void)
void | USB_Suspend_Event (void)
void | USB_Resume_Event (void)
void | USB_WakeUp_Event (void)
void | USB_SOF_Event (void)
void | USB_Error_Event (uint32_t error)
void | USB_EndPoint0 (uint32_t event)
void | USB_EndPoint1 (uint32_t event)
void | USB_EndPoint2 (uint32_t event)
void | USB_EndPoint3 (uint32_t event)
void | USB_EndPoint4 (uint32_t event)
void | USB_EndPoint5 (uint32_t event)
void | USB_EndPoint6 (uint32_t event)
void | USB_EndPoint7 (uint32_t event)
void | USB_EndPoint8 (uint32_t event)
void | USB_EndPoint9 (uint32_t event)
void | USB_EndPoint10 (uint32_t event)
void | USB_EndPoint11 (uint32_t event)
void | USB_EndPoint12 (uint32_t event)
void | USB_EndPoint13 (uint32_t event)
void | USB_EndPoint14 (uint32_t event)
void | USB_EndPoint15 (uint32_t event)
void | USB_Configure_Event (void)
void | USB_Interface_Event (void)
void | USB_Feature_Event (void)

Variables

void(*const | USB_P_EP [16])(uint32_t event)

Define Documentation

#define USB_EVT_IN 3

Definition at line 35 of file usbuser.h.

#define USB_EVT_IN_DMA_EOT 9

Definition at line 41 of file usbuser.h.

#define USB_EVT_IN_DMA_ERR 13

Definition at line 45 of file usbuser.h.

#define USB_EVT_IN_DMA_NDR 11

Definition at line 43 of file usbuser.h.

#define USB_EVT_IN_NAK 5

Definition at line 37 of file usbuser.h.

#define USB_EVT_IN_STALL 7

Definition at line 39 of file usbuser.h.

#define USB_EVT_OUT 2

Definition at line 34 of file usbuser.h.

#define USB_EVT_OUT_DMA_EOT 8

Definition at line 40 of file usbuser.h.

#define USB_EVT_OUT_DMA_ERR 12

Definition at line 44 of file usbuser.h.

#define USB_EVT_OUT_DMA_NDR 10

Definition at line 42 of file usbuser.h.

#define USB_EVT_OUT_NAK 4

Definition at line 36 of file usbuser.h.

#define USB_EVT_OUT_STALL 6

Definition at line 38 of file usbuser.h.

#define USB_EVT_SETUP 1

Definition at line 33 of file usbuser.h.

Function Documentation

void USB_Configure_Event ( void )
void USB_EndPoint0 ( uint32_t event )

Definition at line 600 of file usbcore.c.

void USB_EndPoint1 ( uint32_t event )

Definition at line 190 of file usbuser.c.

void USB_EndPoint10 ( uint32_t event )

Definition at line 311 of file usbuser.c.

void USB_EndPoint11 ( uint32_t event )

Definition at line 321 of file usbuser.c.

void USB_EndPoint12 ( uint32_t event )

Definition at line 331 of file usbuser.c.

void USB_EndPoint13 ( uint32_t event )

Definition at line 341 of file usbuser.c.

void USB_EndPoint14 ( uint32_t event )

Definition at line 351 of file usbuser.c.

void USB_EndPoint15 ( uint32_t event )

Definition at line 361 of file usbuser.c.

void USB_EndPoint2 ( uint32_t event )

Definition at line 200 of file usbuser.c.

void USB_EndPoint3 ( uint32_t event )

Definition at line 209 of file usbuser.c.

void USB_EndPoint4 ( uint32_t event )

Definition at line 251 of file usbuser.c.

void USB_EndPoint5 ( uint32_t event )

Definition at line 261 of file usbuser.c.

void USB_EndPoint6 ( uint32_t event )

Definition at line 271 of file usbuser.c.

void USB_EndPoint7 ( uint32_t event )

Definition at line 281 of file usbuser.c.

void USB_EndPoint8 ( uint32_t event )

Definition at line 291 of file usbuser.c.

void USB_EndPoint9 ( uint32_t event )

Definition at line 301 of file usbuser.c.

void USB_Error_Event ( uint32_t error )
void USB_Feature_Event ( void )
void USB_Interface_Event ( void )
void USB_Power_Event ( uint32_t power )
void USB_Reset_Event ( void )
void USB_Resume_Event ( void )
void USB_SOF_Event ( void )
void USB_Suspend_Event ( void )
void USB_WakeUp_Event ( void )

Variable Documentation

void(* const USB_P_EP[16])(uint32_t event)

Definition at line 164 of file usbuser.c.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/DiskImg.c File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/DiskImg.c File Reference
#include "lpc_types.h"
#include "memory.h"

Go to the source code of this file.

Variables

const unsigned char DiskImage [MSC_ImageSize]

Variable Documentation

const unsigned char DiskImage[MSC_ImageSize]

Definition at line 6 of file DiskImg.c.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | CHECK_PARAM(expr)

Define Documentation

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/memory.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/memory.c File Reference
#include "LPC17xx.h"
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "mscuser.h"
#include "memory.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_nvic.h"

Go to the source code of this file.

Functions

int | main (void)

Variables

uint8_t | Memory [MSC_MemorySize]
Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/memory.h File Reference

Defines | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/memory.h File Reference

Go to the source code of this file.

Defines

#define | CCLK 60000000
#define | LED_MSK 0x00FF0000
#define | LED_RD 0x00010000
#define | LED_WR 0x00020000
#define | LED_CFG 0x00400000
#define | LED_SUSP 0x00800000
#define | MSC_ImageSize 0x00001000

Variables

const unsigned char | DiskImage [MSC_ImageSize]

Define Documentation

#define CCLK 60000000

Definition at line 14 of file memory.h.

#define LED_CFG 0x00400000

Definition at line 20 of file memory.h.

#define LED_MSK 0x00FF0000

Definition at line 17 of file memory.h.

#define LED_RD 0x00010000

Definition at line 18 of file memory.h.

#define LED_SUSP 0x00800000

Definition at line 21 of file memory.h.

#define LED_WR 0x00020000

Definition at line 19 of file memory.h.

#define MSC_ImageSize 0x00001000

Definition at line 24 of file memory.h.

Variable Documentation

const unsigned char DiskImage[MSC_ImageSize]

Definition at line 6 of file DiskImg.c.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/msc.h File Reference

Defines | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/msc.h File Reference

Go to the source code of this file.

Defines

#define | MSC_SUBCLASS_RBC 0x01
#define | MSC_SUBCLASS_SFF8020I_MMC2 0x02
#define | MSC_SUBCLASS_QIC157 0x03
#define | MSC_SUBCLASS_UFI 0x04
#define | MSC_SUBCLASS_SFF8070I 0x05
#define | MSC_SUBCLASS_SCSI 0x06
#define | MSC_PROTOCOL_CBI_INT 0x00
#define | MSC_PROTOCOL_CBI_NOINT 0x01
#define | MSC_PROTOCOL_BULK_ONLY 0x50
#define | MSC_REQUEST_RESET 0xFF
#define | MSC_REQUEST_GET_MAX_LUN 0xFE
#define | MSC_BS_CBW 0
#define | MSC_BS_DATA_OUT 1
#define | MSC_BS_DATA_IN 2
#define | MSC_BS_DATA_IN_LAST 3
#define | MSC_BS_DATA_IN_LAST_STALL 4
#define | MSC_BS_CSW 5
#define | MSC_BS_ERROR 6
#define | MSC_CBW_Signature 0x43425355
#define | MSC_CSW_Signature 0x53425355
#define | CSW_CMD_PASSED 0x00
#define | CSW_CMD_FAILED 0x01
#define | CSW_PHASE_ERROR 0x02
#define | SCSI_TEST_UNIT_READY 0x00
#define | SCSI_REQUEST_SENSE 0x03
#define | SCSI_FORMAT_UNIT 0x04
#define | SCSI_INQUIRY 0x12
#define | SCSI_MODE_SELECT6 0x15
#define | SCSI_MODE_SENSE6 0x1A
#define | SCSI_START_STOP_UNIT 0x1B
#define | SCSI_MEDIA_REMOVAL 0x1E
#define | SCSI_READ_FORMAT_CAPACITIES 0x23
#define | SCSI_READ_CAPACITY 0x25
#define | SCSI_READ10 0x28
#define | SCSI_WRITE10 0x2A
#define | SCSI_VERIFY10 0x2F
#define | SCSI_MODE_SELECT10 0x55
#define | SCSI_MODE_SENSE10 0x5A

Variables

uint32_t | dSignature
uint32_t | dTag
uint32_t | dDataLength
uint8_t | bmFlags
uint8_t | bLUN
uint8_t | bCBLength
uint8_t | CB [16]
MSC_CBW
uint32_t | dDataResidue
uint8_t | bStatus
MSC_CSW

Define Documentation

#define CSW_CMD_FAILED 0x01

Definition at line 94 of file msc.h.

#define CSW_CMD_PASSED 0x00

Definition at line 93 of file msc.h.

#define CSW_PHASE_ERROR 0x02

Definition at line 95 of file msc.h.

#define MSC_BS_CBW 0

Definition at line 48 of file msc.h.

#define MSC_BS_CSW 5

Definition at line 53 of file msc.h.

#define MSC_BS_DATA_IN 2

Definition at line 50 of file msc.h.

#define MSC_BS_DATA_IN_LAST 3

Definition at line 51 of file msc.h.

#define MSC_BS_DATA_IN_LAST_STALL 4

Definition at line 52 of file msc.h.

#define MSC_BS_DATA_OUT 1

Definition at line 49 of file msc.h.

#define MSC_BS_ERROR 6

Definition at line 54 of file msc.h.

#define MSC_CBW_Signature 0x43425355

Definition at line 88 of file msc.h.

#define MSC_CSW_Signature 0x53425355

Definition at line 89 of file msc.h.

#define MSC_PROTOCOL_BULK_ONLY 0x50

Definition at line 39 of file msc.h.

#define MSC_PROTOCOL_CBI_INT 0x00

Definition at line 37 of file msc.h.

#define MSC_PROTOCOL_CBI_NOINT 0x01

Definition at line 38 of file msc.h.

#define MSC_REQUEST_GET_MAX_LUN 0xFE

Definition at line 44 of file msc.h.

#define MSC_REQUEST_RESET 0xFF

Definition at line 43 of file msc.h.

#define MSC_SUBCLASS_QIC157 0x03

Definition at line 31 of file msc.h.

#define MSC_SUBCLASS_RBC 0x01

Definition at line 29 of file msc.h.

#define MSC_SUBCLASS_SCSI 0x06

Definition at line 34 of file msc.h.

#define MSC_SUBCLASS_SFF8020I_MMC2 0x02

Definition at line 30 of file msc.h.

#define MSC_SUBCLASS_SFF8070I 0x05

Definition at line 33 of file msc.h.

#define MSC_SUBCLASS_UFI 0x04

Definition at line 32 of file msc.h.

#define SCSI_FORMAT_UNIT 0x04

Definition at line 101 of file msc.h.

#define SCSI_INQUIRY 0x12

Definition at line 102 of file msc.h.

#define SCSI_MEDIA_REMOVAL 0x1E

Definition at line 106 of file msc.h.

#define SCSI_MODE_SELECT10 0x55

Definition at line 112 of file msc.h.

#define SCSI_MODE_SELECT6 0x15

Definition at line 103 of file msc.h.

#define SCSI_MODE_SENSE10 0x5A

Definition at line 113 of file msc.h.

#define SCSI_MODE_SENSE6 0x1A

Definition at line 104 of file msc.h.

#define SCSI_READ10 0x28

Definition at line 109 of file msc.h.

#define SCSI_READ_CAPACITY 0x25

Definition at line 108 of file msc.h.

#define SCSI_READ_FORMAT_CAPACITIES 0x23

Definition at line 107 of file msc.h.

#define SCSI_REQUEST_SENSE 0x03

Definition at line 100 of file msc.h.

#define SCSI_START_STOP_UNIT 0x1B

Definition at line 105 of file msc.h.

#define SCSI_TEST_UNIT_READY 0x00

Definition at line 99 of file msc.h.

#define SCSI_VERIFY10 0x2F

Definition at line 111 of file msc.h.

#define SCSI_WRITE10 0x2A

Definition at line 110 of file msc.h.

Variable Documentation

uint8_t bCBLength

Definition at line 70 of file msc.h.

uint8_t bLUN

Definition at line 69 of file msc.h.

uint8_t bmFlags

Definition at line 68 of file msc.h.

uint8_t bStatus

Definition at line 85 of file msc.h.

uint8_t CB[16]

Definition at line 71 of file msc.h.

uint32_t dDataLength

Definition at line 67 of file msc.h.

uint32_t dDataResidue

Definition at line 84 of file msc.h.

uint32_t dSignature

Definition at line 65 of file msc.h.

uint32_t dTag

Definition at line 66 of file msc.h.

MSC_CBW

Definition at line 72 of file msc.h.

MSC_CSW

Definition at line 86 of file msc.h.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/mscuser.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/mscuser.c File Reference
#include "LPC17xx.h"
#include "lpc_types.h"
#include "usb.h"
#include "msc.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "mscuser.h"
#include "memory.h"

Go to the source code of this file.

Functions

uint32_t | MSC_Reset (void)
uint32_t | MSC_GetMaxLUN (void)
void | MSC_MemoryRead (void)
void | MSC_MemoryWrite (void)
void | MSC_MemoryVerify (void)
uint32_t | MSC_RWSetup (void)
uint32_t | DataInFormat (void)
void | DataInTransfer (void)
void | MSC_TestUnitReady (void)
void | MSC_RequestSense (void)
void | MSC_Inquiry (void)
void | MSC_ModeSense6 (void)
void | MSC_ModeSense10 (void)
void | MSC_ReadCapacity (void)
void | MSC_ReadFormatCapacity (void)
void | MSC_GetCBW (void)
void | MSC_SetCSW (void)
void | MSC_BulkIn (void)
void | MSC_BulkOut (void)

Variables

uint8_t | Memory [MSC_MemorySize]
uint32_t | MemOK
uint32_t | Offset
uint32_t | Length
uint8_t | BulkStage
uint8_t | BulkBuf [MSC_MAX_PACKET]
uint8_t | BulkLen
MSC_CBW CBW
MSC_CSW CSW

Function Documentation

uint32_t DataInFormat ( void )

Definition at line 222 of file mscuser.c.

void DataInTransfer ( void )

Definition at line 245 of file mscuser.c.

void MSC_BulkIn ( void )

Definition at line 593 of file mscuser.c.

void MSC_BulkOut ( void )

Definition at line 623 of file mscuser.c.

void MSC_GetCBW ( void )

Definition at line 479 of file mscuser.c.

uint32_t MSC_GetMaxLUN ( void )

Definition at line 70 of file mscuser.c.

void MSC_Inquiry ( void )

Definition at line 320 of file mscuser.c.

void MSC_MemoryRead ( void )

Definition at line 84 of file mscuser.c.

void MSC_MemoryVerify ( void )

Definition at line 153 of file mscuser.c.

void MSC_MemoryWrite ( void )

Definition at line 121 of file mscuser.c.

void MSC_ModeSense10 ( void )

Definition at line 396 of file mscuser.c.

void MSC_ModeSense6 ( void )

Definition at line 376 of file mscuser.c.

void MSC_ReadCapacity ( void )

Definition at line 420 of file mscuser.c.

void MSC_ReadFormatCapacity ( void )

Definition at line 447 of file mscuser.c.

void MSC_RequestSense ( void )

Definition at line 286 of file mscuser.c.

uint32_t MSC_Reset ( void )

Definition at line 56 of file mscuser.c.

uint32_t MSC_RWSetup ( void )

Definition at line 187 of file mscuser.c.

void MSC_SetCSW ( void )

Definition at line 579 of file mscuser.c.

void MSC_TestUnitReady ( void )

Definition at line 265 of file mscuser.c.

Variable Documentation

uint8_t BulkBuf[MSC_MAX_PACKET]

Definition at line 42 of file mscuser.c.

uint8_t BulkLen

Definition at line 43 of file mscuser.c.

uint8_t BulkStage

Definition at line 40 of file mscuser.c.

MSC_CBW CBW

Definition at line 45 of file mscuser.c.

MSC_CSW CSW

Definition at line 46 of file mscuser.c.

uint32_t Length

Definition at line 38 of file mscuser.c.

uint32_t MemOK

Definition at line 35 of file mscuser.c.

uint32_t Offset

Definition at line 37 of file mscuser.c.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/mscuser.h File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/mscuser.h File Reference

Go to the source code of this file.

Defines

#define | MSC_MemorySize 8192
#define | MSC_BlockSize 512
#define | MSC_BlockCount (MSC_MemorySize / MSC_BlockSize)
#define | MSC_MAX_PACKET 64
#define | MSC_EP_IN 0x82
#define | MSC_EP_OUT 0x02

Functions

uint32_t | MSC_Reset (void)
uint32_t | MSC_GetMaxLUN (void)
void | MSC_GetCBW (void)
void | MSC_SetCSW (void)
void | MSC_BulkIn (void)
void | MSC_BulkOut (void)

Define Documentation

#define MSC_BlockCount (MSC_MemorySize / MSC_BlockSize)

Definition at line 31 of file mscuser.h.

#define MSC_BlockSize 512

Definition at line 30 of file mscuser.h.

#define MSC_EP_IN 0x82

Definition at line 38 of file mscuser.h.

#define MSC_EP_OUT 0x02

Definition at line 39 of file mscuser.h.

#define MSC_MAX_PACKET 64

Definition at line 35 of file mscuser.h.

#define MSC_MemorySize 8192

Definition at line 28 of file mscuser.h.

Function Documentation

void MSC_BulkIn ( void )

Definition at line 593 of file mscuser.c.

void MSC_BulkOut ( void )

Definition at line 623 of file mscuser.c.

void MSC_GetCBW ( void )

Definition at line 479 of file mscuser.c.

uint32_t MSC_GetMaxLUN ( void )

Definition at line 70 of file mscuser.c.

uint32_t MSC_Reset ( void )

Definition at line 56 of file mscuser.c.

void MSC_SetCSW ( void )

Definition at line 579 of file mscuser.c.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usb.h File Reference

Defines | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usb.h File Reference

Go to the source code of this file.

Defines

#define | REQUEST_HOST_TO_DEVICE 0
#define | REQUEST_DEVICE_TO_HOST 1
#define | REQUEST_STANDARD 0
#define | REQUEST_CLASS 1
#define | REQUEST_VENDOR 2
#define | REQUEST_RESERVED 3
#define | REQUEST_TO_DEVICE 0
#define | REQUEST_TO_INTERFACE 1
#define | REQUEST_TO_ENDPOINT 2
#define | REQUEST_TO_OTHER 3
#define | USB_REQUEST_GET_STATUS 0
#define | USB_REQUEST_CLEAR_FEATURE 1
#define | USB_REQUEST_SET_FEATURE 3
#define | USB_REQUEST_SET_ADDRESS 5
#define | USB_REQUEST_GET_DESCRIPTOR 6
#define | USB_REQUEST_SET_DESCRIPTOR 7
#define | USB_REQUEST_GET_CONFIGURATION 8
#define | USB_REQUEST_SET_CONFIGURATION 9
#define | USB_REQUEST_GET_INTERFACE 10
#define | USB_REQUEST_SET_INTERFACE 11
#define | USB_REQUEST_SYNC_FRAME 12
#define | USB_GETSTATUS_SELF_POWERED 0x01
#define | USB_GETSTATUS_REMOTE_WAKEUP 0x02
#define | USB_GETSTATUS_ENDPOINT_STALL 0x01
#define | USB_FEATURE_ENDPOINT_STALL 0
#define | USB_FEATURE_REMOTE_WAKEUP 1
#define | USB_DEVICE_DESCRIPTOR_TYPE 1
#define | USB_CONFIGURATION_DESCRIPTOR_TYPE 2
#define | USB_STRING_DESCRIPTOR_TYPE 3
#define | USB_INTERFACE_DESCRIPTOR_TYPE 4
#define | USB_ENDPOINT_DESCRIPTOR_TYPE 5
#define | USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE 6
#define | USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7
#define | USB_INTERFACE_POWER_DESCRIPTOR_TYPE 8
#define | USB_OTG_DESCRIPTOR_TYPE 9
#define | USB_DEBUG_DESCRIPTOR_TYPE 10
#define | USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE 11
#define | USB_DEVICE_CLASS_RESERVED 0x00
#define | USB_DEVICE_CLASS_AUDIO 0x01
#define | USB_DEVICE_CLASS_COMMUNICATIONS 0x02
#define | USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03
#define | USB_DEVICE_CLASS_MONITOR 0x04
#define | USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05
#define | USB_DEVICE_CLASS_POWER 0x06
#define | USB_DEVICE_CLASS_PRINTER 0x07
#define | USB_DEVICE_CLASS_STORAGE 0x08
#define | USB_DEVICE_CLASS_HUB 0x09
#define | USB_DEVICE_CLASS_MISCELLANEOUS 0xEF
#define | USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF
#define | USB_CONFIG_POWERED_MASK 0xC0
#define | USB_CONFIG_BUS_POWERED 0x80
#define | USB_CONFIG_SELF_POWERED 0xC0
#define | USB_CONFIG_REMOTE_WAKEUP 0x20
#define | USB_CONFIG_POWER_MA(mA) ((mA)/2)
#define | USB_ENDPOINT_DIRECTION_MASK 0x80
#define | USB_ENDPOINT_OUT(addr) ((addr) | 0x00)
#define | USB_ENDPOINT_IN(addr) ((addr) | 0x80)
#define | USB_ENDPOINT_TYPE_MASK 0x03
#define | USB_ENDPOINT_TYPE_CONTROL 0x00
#define | USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01
#define | USB_ENDPOINT_TYPE_BULK 0x02
#define | USB_ENDPOINT_TYPE_INTERRUPT 0x03
#define | USB_ENDPOINT_SYNC_MASK 0x0C
#define | USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION 0x00
#define | USB_ENDPOINT_SYNC_ASYNCHRONOUS 0x04
#define | USB_ENDPOINT_SYNC_ADAPTIVE 0x08
#define | USB_ENDPOINT_SYNC_SYNCHRONOUS 0x0C
#define | USB_ENDPOINT_USAGE_MASK 0x30
#define | USB_ENDPOINT_USAGE_DATA 0x00
#define | USB_ENDPOINT_USAGE_FEEDBACK 0x10
#define | USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK 0x20
#define | USB_ENDPOINT_USAGE_RESERVED 0x30

Variables

uint16_t | W
uint8_t | L
uint8_t | H
WB
WORD_BYTE
uint8_t | Recipient
uint8_t | Type
uint8_t | Dir
BM
uint8_t | B
REQUEST_TYPE
REQUEST_TYPE bmRequestType
uint8_t | bRequest
WORD_BYTE wValue
WORD_BYTE wIndex
uint16_t | wLength
USB_SETUP_PACKET
uint8_t | bLength
uint8_t | bDescriptorType
uint16_t | bcdUSB
uint8_t | bDeviceClass
uint8_t | bDeviceSubClass
uint8_t | bDeviceProtocol
uint8_t | bMaxPacketSize0
uint16_t | idVendor
uint16_t | idProduct
uint16_t | bcdDevice
uint8_t | iManufacturer
uint8_t | iProduct
uint8_t | iSerialNumber
uint8_t | bNumConfigurations
USB_DEVICE_DESCRIPTOR
uint8_t | bReserved
USB_DEVICE_QUALIFIER_DESCRIPTOR
uint16_t | wTotalLength
uint8_t | bNumInterfaces
uint8_t | bConfigurationValue
uint8_t | iConfiguration
uint8_t | bmAttributes
uint8_t | bMaxPower
USB_CONFIGURATION_DESCRIPTOR
uint8_t | bInterfaceNumber
uint8_t | bAlternateSetting
uint8_t | bNumEndpoints
uint8_t | bInterfaceClass
uint8_t | bInterfaceSubClass
uint8_t | bInterfaceProtocol
uint8_t | iInterface
USB_INTERFACE_DESCRIPTOR
uint8_t | bEndpointAddress
uint16_t | wMaxPacketSize
uint8_t | bInterval
USB_ENDPOINT_DESCRIPTOR
uint16_t | bString
USB_STRING_DESCRIPTOR
USB_COMMON_DESCRIPTOR

Define Documentation

#define REQUEST_CLASS 1

Definition at line 55 of file usb.h.

#define REQUEST_DEVICE_TO_HOST 1

Definition at line 51 of file usb.h.

#define REQUEST_HOST_TO_DEVICE 0

Definition at line 50 of file usb.h.

#define REQUEST_RESERVED 3

Definition at line 57 of file usb.h.

#define REQUEST_STANDARD 0

Definition at line 54 of file usb.h.

#define REQUEST_TO_DEVICE 0

Definition at line 60 of file usb.h.

#define REQUEST_TO_ENDPOINT 2

Definition at line 62 of file usb.h.

#define REQUEST_TO_INTERFACE 1

Definition at line 61 of file usb.h.

#define REQUEST_TO_OTHER 3

Definition at line 63 of file usb.h.

#define REQUEST_VENDOR 2

Definition at line 56 of file usb.h.

#define USB_CONFIG_BUS_POWERED 0x80

Definition at line 154 of file usb.h.

#define USB_CONFIG_POWER_MA ( mA ) ((mA)/2)

Definition at line 159 of file usb.h.

#define USB_CONFIG_POWERED_MASK 0xC0

Definition at line 153 of file usb.h.

#define USB_CONFIG_REMOTE_WAKEUP 0x20

Definition at line 156 of file usb.h.

#define USB_CONFIG_SELF_POWERED 0xC0

Definition at line 155 of file usb.h.

#define USB_CONFIGURATION_DESCRIPTOR_TYPE 2

Definition at line 127 of file usb.h.

#define USB_DEBUG_DESCRIPTOR_TYPE 10

Definition at line 135 of file usb.h.

#define USB_DEVICE_CLASS_AUDIO 0x01

Definition at line 140 of file usb.h.

#define USB_DEVICE_CLASS_COMMUNICATIONS 0x02

Definition at line 141 of file usb.h.

#define USB_DEVICE_CLASS_HUB 0x09

Definition at line 148 of file usb.h.

#define USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03

Definition at line 142 of file usb.h.

#define USB_DEVICE_CLASS_MISCELLANEOUS 0xEF

Definition at line 149 of file usb.h.

#define USB_DEVICE_CLASS_MONITOR 0x04

Definition at line 143 of file usb.h.

#define USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05

Definition at line 144 of file usb.h.

#define USB_DEVICE_CLASS_POWER 0x06

Definition at line 145 of file usb.h.

#define USB_DEVICE_CLASS_PRINTER 0x07

Definition at line 146 of file usb.h.

#define USB_DEVICE_CLASS_RESERVED 0x00

Definition at line 139 of file usb.h.

#define USB_DEVICE_CLASS_STORAGE 0x08

Definition at line 147 of file usb.h.

#define USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF

Definition at line 150 of file usb.h.

#define USB_DEVICE_DESCRIPTOR_TYPE 1

Definition at line 126 of file usb.h.

#define USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE 6

Definition at line 131 of file usb.h.

#define USB_ENDPOINT_DESCRIPTOR_TYPE 5

Definition at line 130 of file usb.h.

#define USB_ENDPOINT_DIRECTION_MASK 0x80

Definition at line 162 of file usb.h.

#define USB_ENDPOINT_IN ( addr ) ((addr) | 0x80)

Definition at line 164 of file usb.h.

#define USB_ENDPOINT_OUT ( addr ) ((addr) | 0x00)

Definition at line 163 of file usb.h.

#define USB_ENDPOINT_SYNC_ADAPTIVE 0x08

Definition at line 175 of file usb.h.

#define USB_ENDPOINT_SYNC_ASYNCHRONOUS 0x04

Definition at line 174 of file usb.h.

#define USB_ENDPOINT_SYNC_MASK 0x0C

Definition at line 172 of file usb.h.

#define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION 0x00

Definition at line 173 of file usb.h.

#define USB_ENDPOINT_SYNC_SYNCHRONOUS 0x0C

Definition at line 176 of file usb.h.

#define USB_ENDPOINT_TYPE_BULK 0x02

Definition at line 170 of file usb.h.

#define USB_ENDPOINT_TYPE_CONTROL 0x00

Definition at line 168 of file usb.h.

#define USB_ENDPOINT_TYPE_INTERRUPT 0x03

Definition at line 171 of file usb.h.

#define USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01

Definition at line 169 of file usb.h.

#define USB_ENDPOINT_TYPE_MASK 0x03

Definition at line 167 of file usb.h.

#define USB_ENDPOINT_USAGE_DATA 0x00

Definition at line 178 of file usb.h.

#define USB_ENDPOINT_USAGE_FEEDBACK 0x10

Definition at line 179 of file usb.h.

#define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK 0x20

Definition at line 180 of file usb.h.

#define USB_ENDPOINT_USAGE_MASK 0x30

Definition at line 177 of file usb.h.

#define USB_ENDPOINT_USAGE_RESERVED 0x30

Definition at line 181 of file usb.h.

#define USB_FEATURE_ENDPOINT_STALL 0

Definition at line 106 of file usb.h.

#define USB_FEATURE_REMOTE_WAKEUP 1

Definition at line 107 of file usb.h.

#define USB_GETSTATUS_ENDPOINT_STALL 0x01

Definition at line 103 of file usb.h.

#define USB_GETSTATUS_REMOTE_WAKEUP 0x02

Definition at line 102 of file usb.h.

#define USB_GETSTATUS_SELF_POWERED 0x01

Definition at line 101 of file usb.h.

#define USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE 11

Definition at line 136 of file usb.h.

#define USB_INTERFACE_DESCRIPTOR_TYPE 4

Definition at line 129 of file usb.h.

#define USB_INTERFACE_POWER_DESCRIPTOR_TYPE 8

Definition at line 133 of file usb.h.

#define USB_OTG_DESCRIPTOR_TYPE 9

Definition at line 134 of file usb.h.

#define USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7

Definition at line 132 of file usb.h.

#define USB_REQUEST_CLEAR_FEATURE 1

Definition at line 89 of file usb.h.

#define USB_REQUEST_GET_CONFIGURATION 8

Definition at line 94 of file usb.h.

#define USB_REQUEST_GET_DESCRIPTOR 6

Definition at line 92 of file usb.h.

#define USB_REQUEST_GET_INTERFACE 10

Definition at line 96 of file usb.h.

#define USB_REQUEST_GET_STATUS 0

Definition at line 88 of file usb.h.

#define USB_REQUEST_SET_ADDRESS 5

Definition at line 91 of file usb.h.

#define USB_REQUEST_SET_CONFIGURATION 9

Definition at line 95 of file usb.h.

#define USB_REQUEST_SET_DESCRIPTOR 7

Definition at line 93 of file usb.h.

#define USB_REQUEST_SET_FEATURE 3

Definition at line 90 of file usb.h.

#define USB_REQUEST_SET_INTERFACE 11

Definition at line 97 of file usb.h.

#define USB_REQUEST_SYNC_FRAME 12

Definition at line 98 of file usb.h.

#define USB_STRING_DESCRIPTOR_TYPE 3

Definition at line 128 of file usb.h.

Variable Documentation

uint8_t B

Definition at line 84 of file usb.h.

uint8_t bAlternateSetting

Definition at line 255 of file usb.h.

uint16_t bcdDevice

Definition at line 200 of file usb.h.

uint16_t bcdUSB

Definition at line 193 of file usb.h.

uint8_t bConfigurationValue

Definition at line 238 of file usb.h.

uint8_t bDescriptorType

Definition at line 192 of file usb.h.

uint8_t bDeviceClass

Definition at line 194 of file usb.h.

uint8_t bDeviceProtocol

Definition at line 196 of file usb.h.

uint8_t bDeviceSubClass

Definition at line 195 of file usb.h.

uint8_t bEndpointAddress

Definition at line 273 of file usb.h.

uint8_t bInterfaceClass

Definition at line 257 of file usb.h.

uint8_t bInterfaceNumber

Definition at line 254 of file usb.h.

uint8_t bInterfaceProtocol

Definition at line 259 of file usb.h.

uint8_t bInterfaceSubClass

Definition at line 258 of file usb.h.

uint8_t bInterval

Definition at line 276 of file usb.h.

uint8_t bLength

Definition at line 191 of file usb.h.

BM

Definition at line 83 of file usb.h.

uint8_t bmAttributes

Definition at line 240 of file usb.h.

uint8_t bMaxPacketSize0

Definition at line 197 of file usb.h.

uint8_t bMaxPower

Definition at line 241 of file usb.h.

REQUEST_TYPE bmRequestType

Definition at line 117 of file usb.h.

uint8_t bNumConfigurations

Definition at line 204 of file usb.h.

uint8_t bNumEndpoints

Definition at line 256 of file usb.h.

uint8_t bNumInterfaces

Definition at line 237 of file usb.h.

uint8_t bRequest

Definition at line 118 of file usb.h.

uint8_t bReserved

Definition at line 223 of file usb.h.

uint16_t bString

Definition at line 289 of file usb.h.

uint8_t Dir

Definition at line 82 of file usb.h.

uint8_t H

Definition at line 44 of file usb.h.

uint8_t iConfiguration

Definition at line 239 of file usb.h.

uint16_t idProduct

Definition at line 199 of file usb.h.

uint16_t idVendor

Definition at line 198 of file usb.h.

uint8_t iInterface

Definition at line 260 of file usb.h.

uint8_t iManufacturer

Definition at line 201 of file usb.h.

uint8_t iProduct

Definition at line 202 of file usb.h.

uint8_t iSerialNumber

Definition at line 203 of file usb.h.

uint8_t L

Definition at line 43 of file usb.h.

uint8_t Recipient

Definition at line 80 of file usb.h.

REQUEST_TYPE

Definition at line 85 of file usb.h.

uint8_t Type

Definition at line 81 of file usb.h.

USB_COMMON_DESCRIPTOR

Definition at line 302 of file usb.h.

USB_CONFIGURATION_DESCRIPTOR

Definition at line 242 of file usb.h.

USB_DEVICE_DESCRIPTOR

Definition at line 205 of file usb.h.

USB_DEVICE_QUALIFIER_DESCRIPTOR

Definition at line 224 of file usb.h.

USB_ENDPOINT_DESCRIPTOR

Definition at line 277 of file usb.h.

USB_INTERFACE_DESCRIPTOR

Definition at line 261 of file usb.h.

USB_SETUP_PACKET

Definition at line 122 of file usb.h.

USB_STRING_DESCRIPTOR

Definition at line 290 of file usb.h.

uint16_t W

Definition at line 35 of file usb.h.

WB

Definition at line 45 of file usb.h.

WORD_BYTE wIndex

Definition at line 120 of file usb.h.

uint16_t wLength

Definition at line 121 of file usb.h.

uint16_t wMaxPacketSize

Definition at line 275 of file usb.h.

WORD_BYTE

Definition at line 46 of file usb.h.

uint16_t wTotalLength

Definition at line 236 of file usb.h.

WORD_BYTE wValue

Definition at line 119 of file usb.h.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcfg.h File Reference

Go to the source code of this file.

Defines

#define | USB_POWER 0
#define | USB_IF_NUM 4
#define | USB_EP_NUM 32
#define | USB_MAX_PACKET0 64
#define | USB_DMA 1
#define | USB_DMA_EP 0x00000000
#define | USB_POWER_EVENT 0
#define | USB_RESET_EVENT 1
#define | USB_SUSPEND_EVENT 0
#define | USB_RESUME_EVENT 0
#define | USB_WAKEUP_EVENT 0
#define | USB_SOF_EVENT 0
#define | USB_ERROR_EVENT 0
#define | USB_EP_EVENT 0x0005
#define | USB_CONFIGURE_EVENT 1
#define | USB_INTERFACE_EVENT 0
#define | USB_FEATURE_EVENT 0
#define | USB_CLASS 1
#define | USB_HID 0
#define | USB_HID_IF_NUM 0
#define | USB_MSC 1
#define | USB_MSC_IF_NUM 0
#define | USB_AUDIO 0
#define | USB_ADC_CIF_NUM 0
#define | USB_ADC_SIF1_NUM 1
#define | USB_ADC_SIF2_NUM 2
#define | USB_CDC 0
#define | USB_CDC_CIF_NUM 0
#define | USB_CDC_DIF_NUM 1
#define | USB_CDC_BUFSIZE 64

Define Documentation

#define USB_ADC_CIF_NUM 0

Definition at line 154 of file usbcfg.h.

#define USB_ADC_SIF1_NUM 1

Definition at line 155 of file usbcfg.h.

#define USB_ADC_SIF2_NUM 2

Definition at line 156 of file usbcfg.h.

#define USB_AUDIO 0

Definition at line 153 of file usbcfg.h.

#define USB_CDC 0

Definition at line 157 of file usbcfg.h.

#define USB_CDC_BUFSIZE 64

Definition at line 160 of file usbcfg.h.

#define USB_CDC_CIF_NUM 0

Definition at line 158 of file usbcfg.h.

#define USB_CDC_DIF_NUM 1

Definition at line 159 of file usbcfg.h.

#define USB_CLASS 1

Definition at line 148 of file usbcfg.h.

#define USB_CONFIGURE_EVENT 1

Definition at line 127 of file usbcfg.h.

#define USB_DMA 1

Definition at line 78 of file usbcfg.h.

#define USB_DMA_EP 0x00000000

Definition at line 79 of file usbcfg.h.

#define USB_EP_EVENT 0x0005

Definition at line 126 of file usbcfg.h.

#define USB_EP_NUM 32

Definition at line 76 of file usbcfg.h.

#define USB_ERROR_EVENT 0

Definition at line 125 of file usbcfg.h.

#define USB_FEATURE_EVENT 0

Definition at line 129 of file usbcfg.h.

#define USB_HID 0

Definition at line 149 of file usbcfg.h.

#define USB_HID_IF_NUM 0

Definition at line 150 of file usbcfg.h.

#define USB_IF_NUM 4

Definition at line 75 of file usbcfg.h.

#define USB_INTERFACE_EVENT 0

Definition at line 128 of file usbcfg.h.

#define USB_MAX_PACKET0 64

Definition at line 77 of file usbcfg.h.

#define USB_MSC 1

Definition at line 151 of file usbcfg.h.

#define USB_MSC_IF_NUM 0

Definition at line 152 of file usbcfg.h.

#define USB_POWER 0

Definition at line 74 of file usbcfg.h.

#define USB_POWER_EVENT 0

Definition at line 119 of file usbcfg.h.

#define USB_RESET_EVENT 1

Definition at line 120 of file usbcfg.h.

#define USB_RESUME_EVENT 0

Definition at line 122 of file usbcfg.h.

#define USB_SOF_EVENT 0

Definition at line 124 of file usbcfg.h.

#define USB_SUSPEND_EVENT 0

Definition at line 121 of file usbcfg.h.

#define USB_WAKEUP_EVENT 0

Definition at line 123 of file usbcfg.h.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.c File Reference

Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.c File Reference
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbdesc.h"
#include "usbuser.h"

Go to the source code of this file.

Functions

void | USB_ResetCore (void)
void | USB_SetupStage (void)
void | USB_DataInStage (void)
void | USB_DataOutStage (void)
void | USB_StatusInStage (void)
void | USB_StatusOutStage (void)
__inline uint32_t | USB_GetStatus (void)
__inline uint32_t | USB_SetClrFeature (uint32_t sc)
__inline uint32_t | USB_GetDescriptor (void)
__inline uint32_t | USB_SetConfiguration (void)
__inline uint32_t | USB_SetInterface (void)
void | USB_EndPoint0 (uint32_t event)

Variables

uint16_t | USB_DeviceStatus
uint8_t | USB_DeviceAddress
uint8_t | USB_Configuration
uint32_t | USB_EndPointMask
uint32_t | USB_EndPointHalt
uint8_t | USB_NumInterfaces
uint8_t | USB_AltSetting [USB_IF_NUM]
uint8_t | EP0Buf [USB_MAX_PACKET0]
USB_EP_DATA EP0Data
USB_SETUP_PACKET SetupPacket

Function Documentation

void USB_DataInStage ( void )

Definition at line 110 of file usbcore.c.

void USB_DataOutStage ( void )

Definition at line 130 of file usbcore.c.

void USB_EndPoint0 ( uint32_t event )

Definition at line 508 of file usbcore.c.

__inline uint32_t USB_GetDescriptor ( void )

Definition at line 271 of file usbcore.c.

__inline uint32_t USB_GetStatus ( void )

Definition at line 170 of file usbcore.c.

void USB_ResetCore ( void )

Definition at line 83 of file usbcore.c.

__inline uint32_t USB_SetClrFeature ( uint32_t sc )

Definition at line 216 of file usbcore.c.

__inline uint32_t USB_SetConfiguration ( void )

Definition at line 349 of file usbcore.c.

__inline uint32_t USB_SetInterface ( void )

Definition at line 442 of file usbcore.c.

void USB_SetupStage ( void )

Definition at line 99 of file usbcore.c.

void USB_StatusInStage ( void )

Definition at line 145 of file usbcore.c.

void USB_StatusOutStage ( void )

Definition at line 156 of file usbcore.c.

Variable Documentation

uint8_t EP0Buf[USB_MAX_PACKET0]

Definition at line 69 of file usbcore.c.

USB_EP_DATA EP0Data

Definition at line 72 of file usbcore.c.

USB_SETUP_PACKET SetupPacket

Definition at line 74 of file usbcore.c.

uint8_t USB_AltSetting[USB_IF_NUM]

Definition at line 67 of file usbcore.c.

uint8_t USB_Configuration

Definition at line 63 of file usbcore.c.

uint8_t USB_DeviceAddress

Definition at line 62 of file usbcore.c.

uint16_t USB_DeviceStatus

Definition at line 61 of file usbcore.c.

uint32_t USB_EndPointHalt

Definition at line 65 of file usbcore.c.

uint32_t USB_EndPointMask

Definition at line 64 of file usbcore.c.

uint8_t USB_NumInterfaces

Definition at line 66 of file usbcore.c.

Generated on Mon Nov 28 2011 11:15:12 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.h File Reference

Data Structures | Typedefs | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.h File Reference

Go to the source code of this file.

Data Structures

struct | _USB_EP_DATA

Typedefs

typedef struct _USB_EP_DATA | USB_EP_DATA

Functions

void | USB_ResetCore (void)

Variables

uint16_t | USB_DeviceStatus
uint8_t | USB_DeviceAddress
uint8_t | USB_Configuration
uint32_t | USB_EndPointMask
uint32_t | USB_EndPointHalt
uint8_t | USB_AltSetting [USB_IF_NUM]
uint8_t | EP0Buf [USB_MAX_PACKET0]
USB_EP_DATA EP0Data
USB_SETUP_PACKET SetupPacket

Typedef Documentation

typedef struct _USB_EP_DATA USB_EP_DATA

Function Documentation

void USB_ResetCore ( void )

Definition at line 99 of file usbcore.c.

Variable Documentation

uint8_t EP0Buf[USB_MAX_PACKET0]

Definition at line 85 of file usbcore.c.

USB_EP_DATA EP0Data

Definition at line 88 of file usbcore.c.

USB_SETUP_PACKET SetupPacket

Definition at line 90 of file usbcore.c.

uint8_t USB_AltSetting[USB_IF_NUM]

Definition at line 83 of file usbcore.c.

uint8_t USB_Configuration

Definition at line 78 of file usbcore.c.

uint8_t USB_DeviceAddress

Definition at line 77 of file usbcore.c.

uint16_t USB_DeviceStatus

Definition at line 76 of file usbcore.c.

uint32_t USB_EndPointHalt

Definition at line 80 of file usbcore.c.

uint32_t USB_EndPointMask

Definition at line 79 of file usbcore.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbdesc.c File Reference

Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbdesc.c File Reference
#include "lpc_types.h"
#include "usb.h"
#include "msc.h"
#include "usbcfg.h"
#include "usbdesc.h"

Go to the source code of this file.

Variables

const uint8_t | USB_DeviceDescriptor []
const uint8_t | USB_ConfigDescriptor []
const uint8_t | USB_StringDescriptor []

Variable Documentation

const uint8_t USB_ConfigDescriptor[]

Definition at line 47 of file usbdesc.c.

const uint8_t USB_DeviceDescriptor[]
Initial value:
 {
  USB_DEVICE_DESC_SIZE,
  USB_DEVICE_DESCRIPTOR_TYPE,
  WBVAL(0x0200),
  0x00,
  0x00,
  0x00,
  USB_MAX_PACKET0,
  WBVAL(0xC251),
  WBVAL(0x1303),
  WBVAL(0x0100),
  0x04,
  0x20,
  0x48,
  0x01
}

Definition at line 28 of file usbdesc.c.

const uint8_t USB_StringDescriptor[]

Definition at line 91 of file usbdesc.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbdesc.h File Reference

Defines | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbdesc.h File Reference

Go to the source code of this file.

Defines

#define | WBVAL(x) (x & 0xFF),((x >> 8) & 0xFF)
#define | USB_DEVICE_DESC_SIZE (sizeof(USB_DEVICE_DESCRIPTOR))
#define | USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))
#define | USB_INTERFACE_DESC_SIZE (sizeof(USB_INTERFACE_DESCRIPTOR))
#define | USB_ENDPOINT_DESC_SIZE (sizeof(USB_ENDPOINT_DESCRIPTOR))

Variables

const uint8_t | USB_DeviceDescriptor []
const uint8_t | USB_ConfigDescriptor []
const uint8_t | USB_StringDescriptor []

Define Documentation

#define USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))

Definition at line 24 of file usbdesc.h.

#define USB_DEVICE_DESC_SIZE (sizeof(USB_DEVICE_DESCRIPTOR))

Definition at line 23 of file usbdesc.h.

#define USB_ENDPOINT_DESC_SIZE (sizeof(USB_ENDPOINT_DESCRIPTOR))

Definition at line 26 of file usbdesc.h.

#define USB_INTERFACE_DESC_SIZE (sizeof(USB_INTERFACE_DESCRIPTOR))

Definition at line 25 of file usbdesc.h.

#define WBVAL ( x ) (x & 0xFF),((x >> 8) & 0xFF)

Definition at line 21 of file usbdesc.h.

Variable Documentation

const uint8_t USB_ConfigDescriptor[]

Definition at line 50 of file usbdesc.c.

const uint8_t USB_DeviceDescriptor[]

Definition at line 31 of file usbdesc.c.

const uint8_t USB_StringDescriptor[]

Definition at line 185 of file usbdesc.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.c File Reference

Defines | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.c File Reference
#include <LPC17xx.h>
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbreg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbuser.h"

Go to the source code of this file.

Defines

#define | EP_MSK_CTRL 0x0001
#define | EP_MSK_BULK 0xC924
#define | EP_MSK_INT 0x4492
#define | EP_MSK_ISO 0x1248

Functions

uint32_t | EPAdr (uint32_t EPNum)
void | WrCmd (uint32_t cmd)
void | WrCmdDat (uint32_t cmd, uint32_t val)
uint32_t | RdCmdDat (uint32_t cmd)
void | USB_Init (void)
void | USB_Connect (uint32_t con)
void | USB_Reset (void)
void | USB_Suspend (void)
void | USB_Resume (void)
void | USB_WakeUp (void)
void | USB_WakeUpCfg (uint32_t cfg)
void | USB_SetAddress (uint32_t adr)
void | USB_Configure (uint32_t cfg)
void | USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD)
void | USB_DirCtrlEP (uint32_t dir)
void | USB_EnableEP (uint32_t EPNum)
void | USB_DisableEP (uint32_t EPNum)
void | USB_ResetEP (uint32_t EPNum)
void | USB_SetStallEP (uint32_t EPNum)
void | USB_ClrStallEP (uint32_t EPNum)
uint32_t | USB_ReadEP (uint32_t EPNum, uint8_t *pData)
uint32_t | USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt)
uint32_t | USB_GetFrame (void)
void | USB_IRQHandler (void)

Define Documentation

#define EP_MSK_BULK 0xC924

Definition at line 35 of file usbhw.c.

#define EP_MSK_CTRL 0x0001

Definition at line 34 of file usbhw.c.

#define EP_MSK_INT 0x4492

Definition at line 36 of file usbhw.c.

#define EP_MSK_ISO 0x1248

Definition at line 37 of file usbhw.c.

Function Documentation

uint32_t EPAdr ( uint32_t EPNum )

Definition at line 82 of file usbhw.c.

uint32_t RdCmdDat ( uint32_t cmd )

Definition at line 131 of file usbhw.c.

void USB_ClrStallEP ( uint32_t EPNum )

Definition at line 388 of file usbhw.c.

void USB_ConfigEP ( USB_ENDPOINT_DESCRIPTOR * pEPD )

Definition at line 305 of file usbhw.c.

void USB_Configure ( uint32_t cfg )

Definition at line 289 of file usbhw.c.

void USB_Connect ( uint32_t con )

Definition at line 176 of file usbhw.c.

void USB_DirCtrlEP ( uint32_t dir )

Definition at line 323 of file usbhw.c.

void USB_DisableEP ( uint32_t EPNum )

Definition at line 349 of file usbhw.c.

void USB_EnableEP ( uint32_t EPNum )

Definition at line 336 of file usbhw.c.

uint32_t USB_GetFrame ( void )

Definition at line 644 of file usbhw.c.

void USB_Init ( void )

Definition at line 146 of file usbhw.c.

void USB_IRQHandler ( void )

Definition at line 659 of file usbhw.c.

uint32_t USB_ReadEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData
 | ) |  |

Definition at line 402 of file usbhw.c.

void USB_Reset ( void )

Definition at line 187 of file usbhw.c.

void USB_ResetEP ( uint32_t EPNum )

Definition at line 362 of file usbhw.c.

void USB_Resume ( void )

Definition at line 241 of file usbhw.c.

void USB_SetAddress ( uint32_t adr )

Definition at line 277 of file usbhw.c.

void USB_SetStallEP ( uint32_t EPNum )

Definition at line 375 of file usbhw.c.

void USB_Suspend ( void )

Definition at line 230 of file usbhw.c.

void USB_WakeUp ( void )

Definition at line 252 of file usbhw.c.

void USB_WakeUpCfg ( uint32_t cfg )

Definition at line 266 of file usbhw.c.

uint32_t USB_WriteEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData,
 |  | uint32_t | cnt
 | ) |  |

Definition at line 436 of file usbhw.c.

void WrCmd ( uint32_t cmd )

Definition at line 99 of file usbhw.c.

void WrCmdDat | ( | uint32_t | cmd,
 |  | uint32_t | val
 | ) |  |

Definition at line 114 of file usbhw.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.h File Reference

Data Structures | Defines | Typedefs | Functions
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.h File Reference

Go to the source code of this file.

Data Structures

struct | _USB_DMA_DESCRIPTOR

Defines

#define | USB_RAM_ADR 0x20080000
#define | USB_RAM_SZ 0x00004000
#define | DD_NISO_CNT 16
#define | DD_ISO_CNT 8
#define | DD_NISO_SZ (DD_NISO_CNT * 16)
#define | DD_ISO_SZ (DD_ISO_CNT * 20)
#define | DD_NISO_ADR (USB_RAM_ADR + 128)
#define | DD_ISO_ADR (DD_NISO_ADR + DD_NISO_SZ)
#define | DD_SZ (128 + DD_NISO_SZ + DD_ISO_SZ)
#define | DMA_BUF_ADR (USB_RAM_ADR + DD_SZ)
#define | DMA_BUF_SZ (USB_RAM_SZ - DD_SZ)
#define | USB_ERR_PID 0x0001
#define | USB_ERR_UEPKT 0x0002
#define | USB_ERR_DCRC 0x0004
#define | USB_ERR_TIMOUT 0x0008
#define | USB_ERR_EOP 0x0010
#define | USB_ERR_B_OVRN 0x0020
#define | USB_ERR_BTSTF 0x0040
#define | USB_ERR_TGL 0x0080
#define | USB_DMA_INVALID 0x0000
#define | USB_DMA_IDLE 0x0001
#define | USB_DMA_BUSY 0x0002
#define | USB_DMA_DONE 0x0003
#define | USB_DMA_OVER_RUN 0x0004
#define | USB_DMA_UNDER_RUN 0x0005
#define | USB_DMA_ERROR 0x0006
#define | USB_DMA_UNKNOWN 0xFFFF

Typedefs

typedef struct _USB_DMA_DESCRIPTOR | USB_DMA_DESCRIPTOR

Functions

void | USB_Init (void)
void | USB_Connect (uint32_t con)
void | USB_Reset (void)
void | USB_Suspend (void)
void | USB_Resume (void)
void | USB_WakeUp (void)
void | USB_WakeUpCfg (uint32_t cfg)
void | USB_SetAddress (uint32_t adr)
void | USB_Configure (uint32_t cfg)
void | USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD)
void | USB_DirCtrlEP (uint32_t dir)
void | USB_EnableEP (uint32_t EPNum)
void | USB_DisableEP (uint32_t EPNum)
void | USB_ResetEP (uint32_t EPNum)
void | USB_SetStallEP (uint32_t EPNum)
void | USB_ClrStallEP (uint32_t EPNum)
uint32_t | USB_ReadEP (uint32_t EPNum, uint8_t *pData)
uint32_t | USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt)
uint32_t | USB_DMA_Setup (uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD)
void | USB_DMA_Enable (uint32_t EPNum)
void | USB_DMA_Disable (uint32_t EPNum)
uint32_t | USB_DMA_Status (uint32_t EPNum)
uint32_t | USB_DMA_BufAdr (uint32_t EPNum)
uint32_t | USB_DMA_BufCnt (uint32_t EPNum)
uint32_t | USB_GetFrame (void)
void | USB_IRQHandler (void)

Define Documentation

#define DD_ISO_ADR (DD_NISO_ADR + DD_NISO_SZ)

Definition at line 33 of file usbhw.h.

#define DD_ISO_CNT 8

Definition at line 29 of file usbhw.h.

#define DD_ISO_SZ (DD_ISO_CNT * 20)

Definition at line 31 of file usbhw.h.

#define DD_NISO_ADR (USB_RAM_ADR + 128)

Definition at line 32 of file usbhw.h.

#define DD_NISO_CNT 16

Definition at line 28 of file usbhw.h.

#define DD_NISO_SZ (DD_NISO_CNT * 16)

Definition at line 30 of file usbhw.h.

#define DD_SZ (128 + DD_NISO_SZ + DD_ISO_SZ)

Definition at line 34 of file usbhw.h.

#define DMA_BUF_ADR (USB_RAM_ADR + DD_SZ)

Definition at line 37 of file usbhw.h.

#define DMA_BUF_SZ (USB_RAM_SZ - DD_SZ)

Definition at line 38 of file usbhw.h.

#define USB_DMA_BUSY 0x0002

Definition at line 53 of file usbhw.h.

#define USB_DMA_DONE 0x0003

Definition at line 54 of file usbhw.h.

#define USB_DMA_ERROR 0x0006

Definition at line 57 of file usbhw.h.

#define USB_DMA_IDLE 0x0001

Definition at line 52 of file usbhw.h.

#define USB_DMA_INVALID 0x0000

Definition at line 51 of file usbhw.h.

#define USB_DMA_OVER_RUN 0x0004

Definition at line 55 of file usbhw.h.

#define USB_DMA_UNDER_RUN 0x0005

Definition at line 56 of file usbhw.h.

#define USB_DMA_UNKNOWN 0xFFFF

Definition at line 58 of file usbhw.h.

#define USB_ERR_B_OVRN 0x0020

Definition at line 46 of file usbhw.h.

#define USB_ERR_BTSTF 0x0040

Definition at line 47 of file usbhw.h.

#define USB_ERR_DCRC 0x0004

Definition at line 43 of file usbhw.h.

#define USB_ERR_EOP 0x0010

Definition at line 45 of file usbhw.h.

#define USB_ERR_PID 0x0001

Definition at line 41 of file usbhw.h.

#define USB_ERR_TGL 0x0080

Definition at line 48 of file usbhw.h.

#define USB_ERR_TIMOUT 0x0008

Definition at line 44 of file usbhw.h.

#define USB_ERR_UEPKT 0x0002

Definition at line 42 of file usbhw.h.

#define USB_RAM_ADR 0x20080000

Definition at line 24 of file usbhw.h.

#define USB_RAM_SZ 0x00004000

Definition at line 25 of file usbhw.h.

Typedef Documentation

typedef struct _USB_DMA_DESCRIPTOR USB_DMA_DESCRIPTOR

Function Documentation

void USB_ClrStallEP ( uint32_t EPNum )

Definition at line 390 of file usbhw.c.

void USB_ConfigEP ( USB_ENDPOINT_DESCRIPTOR * pEPD )

Definition at line 307 of file usbhw.c.

void USB_Configure ( uint32_t cfg )

Definition at line 291 of file usbhw.c.

void USB_Connect ( uint32_t con )

Definition at line 178 of file usbhw.c.

void USB_DirCtrlEP ( uint32_t dir )

Definition at line 325 of file usbhw.c.

void USB_DisableEP ( uint32_t EPNum )

Definition at line 351 of file usbhw.c.

uint32_t USB_DMA_BufAdr ( uint32_t EPNum )
uint32_t USB_DMA_BufCnt ( uint32_t EPNum )
void USB_DMA_Disable ( uint32_t EPNum )
void USB_DMA_Enable ( uint32_t EPNum )
uint32_t USB_DMA_Setup | ( | uint32_t | EPNum,
 |  | USB_DMA_DESCRIPTOR * | pDD
 | ) |  |
uint32_t USB_DMA_Status ( uint32_t EPNum )
void USB_EnableEP ( uint32_t EPNum )

Definition at line 338 of file usbhw.c.

uint32_t USB_GetFrame ( void )

Definition at line 647 of file usbhw.c.

void USB_Init ( void )

Definition at line 148 of file usbhw.c.

void USB_IRQHandler ( void )

Definition at line 662 of file usbhw.c.

uint32_t USB_ReadEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData
 | ) |  |

Definition at line 417 of file usbhw.c.

void USB_Reset ( void )

Definition at line 189 of file usbhw.c.

void USB_ResetEP ( uint32_t EPNum )

Definition at line 364 of file usbhw.c.

void USB_Resume ( void )

Definition at line 243 of file usbhw.c.

void USB_SetAddress ( uint32_t adr )

Definition at line 279 of file usbhw.c.

void USB_SetStallEP ( uint32_t EPNum )

Definition at line 377 of file usbhw.c.

void USB_Suspend ( void )

Definition at line 232 of file usbhw.c.

void USB_WakeUp ( void )

Definition at line 254 of file usbhw.c.

void USB_WakeUpCfg ( uint32_t cfg )

Definition at line 268 of file usbhw.c.

uint32_t USB_WriteEP | ( | uint32_t | EPNum,
 |  | uint8_t * | pData,
 |  | uint32_t | cnt
 | ) |  |

Definition at line 450 of file usbhw.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbreg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbreg.h File Reference

Go to the source code of this file.

Defines

#define | FRAME_INT 0x00000001
#define | EP_FAST_INT 0x00000002
#define | EP_SLOW_INT 0x00000004
#define | DEV_STAT_INT 0x00000008
#define | CCEMTY_INT 0x00000010
#define | CDFULL_INT 0x00000020
#define | RxENDPKT_INT 0x00000040
#define | TxENDPKT_INT 0x00000080
#define | EP_RLZED_INT 0x00000100
#define | ERR_INT 0x00000200
#define | PKT_LNGTH_MASK 0x000003FF
#define | PKT_DV 0x00000400
#define | PKT_RDY 0x00000800
#define | CTRL_RD_EN 0x00000001
#define | CTRL_WR_EN 0x00000002
#define | CMD_SET_ADDR 0x00D00500
#define | CMD_CFG_DEV 0x00D80500
#define | CMD_SET_MODE 0x00F30500
#define | CMD_RD_FRAME 0x00F50500
#define | DAT_RD_FRAME 0x00F50200
#define | CMD_RD_TEST 0x00FD0500
#define | DAT_RD_TEST 0x00FD0200
#define | CMD_SET_DEV_STAT 0x00FE0500
#define | CMD_GET_DEV_STAT 0x00FE0500
#define | DAT_GET_DEV_STAT 0x00FE0200
#define | CMD_GET_ERR_CODE 0x00FF0500
#define | DAT_GET_ERR_CODE 0x00FF0200
#define | CMD_RD_ERR_STAT 0x00FB0500
#define | DAT_RD_ERR_STAT 0x00FB0200
#define | DAT_WR_BYTE(x) (0x00000100 | ((x) << 16))
#define | CMD_SEL_EP(x) (0x00000500 | ((x) << 16))
#define | DAT_SEL_EP(x) (0x00000200 | ((x) << 16))
#define | CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16))
#define | DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16))
#define | CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16))
#define | CMD_CLR_BUF 0x00F20500
#define | DAT_CLR_BUF 0x00F20200
#define | CMD_VALID_BUF 0x00FA0500
#define | DEV_ADDR_MASK 0x7F
#define | DEV_EN 0x80
#define | CONF_DVICE 0x01
#define | AP_CLK 0x01
#define | INAK_CI 0x02
#define | INAK_CO 0x04
#define | INAK_II 0x08
#define | INAK_IO 0x10
#define | INAK_BI 0x20
#define | INAK_BO 0x40
#define | DEV_CON 0x01
#define | DEV_CON_CH 0x02
#define | DEV_SUS 0x04
#define | DEV_SUS_CH 0x08
#define | DEV_RST 0x10
#define | ERR_EC_MASK 0x0F
#define | ERR_EA 0x10
#define | ERR_PID 0x01
#define | ERR_UEPKT 0x02
#define | ERR_DCRC 0x04
#define | ERR_TIMOUT 0x08
#define | ERR_EOP 0x10
#define | ERR_B_OVRN 0x20
#define | ERR_BTSTF 0x40
#define | ERR_TGL 0x80
#define | EP_SEL_F 0x01
#define | EP_SEL_ST 0x02
#define | EP_SEL_STP 0x04
#define | EP_SEL_PO 0x08
#define | EP_SEL_EPN 0x10
#define | EP_SEL_B_1_FULL 0x20
#define | EP_SEL_B_2_FULL 0x40
#define | EP_STAT_ST 0x01
#define | EP_STAT_DA 0x20
#define | EP_STAT_RF_MO 0x40
#define | EP_STAT_CND_ST 0x80
#define | CLR_BUF_PO 0x01
#define | EOT_INT 0x01
#define | NDD_REQ_INT 0x02
#define | SYS_ERR_INT 0x04

Define Documentation

#define AP_CLK 0x01

Definition at line 77 of file usbreg.h.

#define CCEMTY_INT 0x00000010

Definition at line 28 of file usbreg.h.

#define CDFULL_INT 0x00000020

Definition at line 29 of file usbreg.h.

#define CLR_BUF_PO 0x01

Definition at line 122 of file usbreg.h.

#define CMD_CFG_DEV 0x00D80500

Definition at line 46 of file usbreg.h.

#define CMD_CLR_BUF 0x00F20500

Definition at line 65 of file usbreg.h.

#define CMD_GET_DEV_STAT 0x00FE0500

Definition at line 53 of file usbreg.h.

#define CMD_GET_ERR_CODE 0x00FF0500

Definition at line 55 of file usbreg.h.

#define CMD_RD_ERR_STAT 0x00FB0500

Definition at line 57 of file usbreg.h.

#define CMD_RD_FRAME 0x00F50500

Definition at line 48 of file usbreg.h.

#define CMD_RD_TEST 0x00FD0500

Definition at line 50 of file usbreg.h.

#define CMD_SEL_EP ( x ) (0x00000500 | ((x) << 16))

Definition at line 60 of file usbreg.h.

#define CMD_SEL_EP_CLRI ( x ) (0x00400500 | ((x) << 16))

Definition at line 62 of file usbreg.h.

#define CMD_SET_ADDR 0x00D00500

Definition at line 45 of file usbreg.h.

#define CMD_SET_DEV_STAT 0x00FE0500

Definition at line 52 of file usbreg.h.

#define CMD_SET_EP_STAT ( x ) (0x00400500 | ((x) << 16))

Definition at line 64 of file usbreg.h.

#define CMD_SET_MODE 0x00F30500

Definition at line 47 of file usbreg.h.

#define CMD_VALID_BUF 0x00FA0500

Definition at line 67 of file usbreg.h.

#define CONF_DVICE 0x01

Definition at line 74 of file usbreg.h.

#define CTRL_RD_EN 0x00000001

Definition at line 41 of file usbreg.h.

#define CTRL_WR_EN 0x00000002

Definition at line 42 of file usbreg.h.

#define DAT_CLR_BUF 0x00F20200

Definition at line 66 of file usbreg.h.

#define DAT_GET_DEV_STAT 0x00FE0200

Definition at line 54 of file usbreg.h.

#define DAT_GET_ERR_CODE 0x00FF0200

Definition at line 56 of file usbreg.h.

#define DAT_RD_ERR_STAT 0x00FB0200

Definition at line 58 of file usbreg.h.

#define DAT_RD_FRAME 0x00F50200

Definition at line 49 of file usbreg.h.

#define DAT_RD_TEST 0x00FD0200

Definition at line 51 of file usbreg.h.

#define DAT_SEL_EP ( x ) (0x00000200 | ((x) << 16))

Definition at line 61 of file usbreg.h.

#define DAT_SEL_EP_CLRI ( x ) (0x00400200 | ((x) << 16))

Definition at line 63 of file usbreg.h.

#define DAT_WR_BYTE ( x ) (0x00000100 | ((x) << 16))

Definition at line 59 of file usbreg.h.

#define DEV_ADDR_MASK 0x7F

Definition at line 70 of file usbreg.h.

#define DEV_CON 0x01

Definition at line 86 of file usbreg.h.

#define DEV_CON_CH 0x02

Definition at line 87 of file usbreg.h.

#define DEV_EN 0x80

Definition at line 71 of file usbreg.h.

#define DEV_RST 0x10

Definition at line 90 of file usbreg.h.

#define DEV_STAT_INT 0x00000008

Definition at line 27 of file usbreg.h.

#define DEV_SUS 0x04

Definition at line 88 of file usbreg.h.

#define DEV_SUS_CH 0x08

Definition at line 89 of file usbreg.h.

#define EOT_INT 0x01

Definition at line 126 of file usbreg.h.

#define EP_FAST_INT 0x00000002

Definition at line 25 of file usbreg.h.

#define EP_RLZED_INT 0x00000100

Definition at line 32 of file usbreg.h.

#define EP_SEL_B_1_FULL 0x20

Definition at line 112 of file usbreg.h.

#define EP_SEL_B_2_FULL 0x40

Definition at line 113 of file usbreg.h.

#define EP_SEL_EPN 0x10

Definition at line 111 of file usbreg.h.

#define EP_SEL_F 0x01

Definition at line 107 of file usbreg.h.

#define EP_SEL_PO 0x08

Definition at line 110 of file usbreg.h.

#define EP_SEL_ST 0x02

Definition at line 108 of file usbreg.h.

#define EP_SEL_STP 0x04

Definition at line 109 of file usbreg.h.

#define EP_SLOW_INT 0x00000004

Definition at line 26 of file usbreg.h.

#define EP_STAT_CND_ST 0x80

Definition at line 119 of file usbreg.h.

#define EP_STAT_DA 0x20

Definition at line 117 of file usbreg.h.

#define EP_STAT_RF_MO 0x40

Definition at line 118 of file usbreg.h.

#define EP_STAT_ST 0x01

Definition at line 116 of file usbreg.h.

#define ERR_B_OVRN 0x20

Definition at line 102 of file usbreg.h.

#define ERR_BTSTF 0x40

Definition at line 103 of file usbreg.h.

#define ERR_DCRC 0x04

Definition at line 99 of file usbreg.h.

#define ERR_EA 0x10

Definition at line 94 of file usbreg.h.

#define ERR_EC_MASK 0x0F

Definition at line 93 of file usbreg.h.

#define ERR_EOP 0x10

Definition at line 101 of file usbreg.h.

#define ERR_INT 0x00000200

Definition at line 33 of file usbreg.h.

#define ERR_PID 0x01

Definition at line 97 of file usbreg.h.

#define ERR_TGL 0x80

Definition at line 104 of file usbreg.h.

#define ERR_TIMOUT 0x08

Definition at line 100 of file usbreg.h.

#define ERR_UEPKT 0x02

Definition at line 98 of file usbreg.h.

#define FRAME_INT 0x00000001

Definition at line 24 of file usbreg.h.

#define INAK_BI 0x20

Definition at line 82 of file usbreg.h.

#define INAK_BO 0x40

Definition at line 83 of file usbreg.h.

#define INAK_CI 0x02

Definition at line 78 of file usbreg.h.

#define INAK_CO 0x04

Definition at line 79 of file usbreg.h.

#define INAK_II 0x08

Definition at line 80 of file usbreg.h.

#define INAK_IO 0x10

Definition at line 81 of file usbreg.h.

#define NDD_REQ_INT 0x02

Definition at line 127 of file usbreg.h.

#define PKT_DV 0x00000400

Definition at line 37 of file usbreg.h.

#define PKT_LNGTH_MASK 0x000003FF

Definition at line 36 of file usbreg.h.

#define PKT_RDY 0x00000800

Definition at line 38 of file usbreg.h.

#define RxENDPKT_INT 0x00000040

Definition at line 30 of file usbreg.h.

#define SYS_ERR_INT 0x04

Definition at line 128 of file usbreg.h.

#define TxENDPKT_INT 0x00000080

Definition at line 31 of file usbreg.h.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbuser.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbuser.c File Reference
#include "LPC17xx.h"
#include "lpc_types.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbuser.h"
#include "mscuser.h"
#include "memory.h"

Go to the source code of this file.

Defines

#define | P_EP(n) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)

Functions

void | USB_EndPoint1 (uint32_t event)
void | USB_EndPoint2 (uint32_t event)
void | USB_EndPoint3 (uint32_t event)
void | USB_EndPoint4 (uint32_t event)
void | USB_EndPoint5 (uint32_t event)
void | USB_EndPoint6 (uint32_t event)
void | USB_EndPoint7 (uint32_t event)
void | USB_EndPoint8 (uint32_t event)
void | USB_EndPoint9 (uint32_t event)
void | USB_EndPoint10 (uint32_t event)
void | USB_EndPoint11 (uint32_t event)
void | USB_EndPoint12 (uint32_t event)
void | USB_EndPoint13 (uint32_t event)
void | USB_EndPoint14 (uint32_t event)
void | USB_EndPoint15 (uint32_t event)

Variables

void(*const | USB_P_EP [16])(uint32_t event)

Define Documentation

#define P_EP ( n ) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)

Definition at line 149 of file usbuser.c.

Function Documentation

void USB_EndPoint1 ( uint32_t event )

Definition at line 178 of file usbuser.c.

void USB_EndPoint10 ( uint32_t event )

Definition at line 277 of file usbuser.c.

void USB_EndPoint11 ( uint32_t event )

Definition at line 287 of file usbuser.c.

void USB_EndPoint12 ( uint32_t event )

Definition at line 297 of file usbuser.c.

void USB_EndPoint13 ( uint32_t event )

Definition at line 307 of file usbuser.c.

void USB_EndPoint14 ( uint32_t event )

Definition at line 317 of file usbuser.c.

void USB_EndPoint15 ( uint32_t event )

Definition at line 327 of file usbuser.c.

void USB_EndPoint2 ( uint32_t event )

Definition at line 188 of file usbuser.c.

void USB_EndPoint3 ( uint32_t event )

Definition at line 207 of file usbuser.c.

void USB_EndPoint4 ( uint32_t event )

Definition at line 217 of file usbuser.c.

void USB_EndPoint5 ( uint32_t event )

Definition at line 227 of file usbuser.c.

void USB_EndPoint6 ( uint32_t event )

Definition at line 237 of file usbuser.c.

void USB_EndPoint7 ( uint32_t event )

Definition at line 247 of file usbuser.c.

void USB_EndPoint8 ( uint32_t event )

Definition at line 257 of file usbuser.c.

void USB_EndPoint9 ( uint32_t event )

Definition at line 267 of file usbuser.c.

Variable Documentation

void(* const USB_P_EP[16])(uint32_t event)
Initial value:
 {
  P_EP(0),
  P_EP(1),
  P_EP(2),
  P_EP(3),
  P_EP(4),
  P_EP(5),
  P_EP(6),
  P_EP(7),
  P_EP(8),
  P_EP(9),
  P_EP(10),
  P_EP(11),
  P_EP(12),
  P_EP(13),
  P_EP(14),
  P_EP(15),
}

Definition at line 152 of file usbuser.c.

Generated on Mon Nov 28 2011 11:15:13 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbuser.h File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbuser.h File Reference

Go to the source code of this file.

Defines

#define | USB_EVT_SETUP 1
#define | USB_EVT_OUT 2
#define | USB_EVT_IN 3
#define | USB_EVT_OUT_NAK 4
#define | USB_EVT_IN_NAK 5
#define | USB_EVT_OUT_STALL 6
#define | USB_EVT_IN_STALL 7
#define | USB_EVT_OUT_DMA_EOT 8
#define | USB_EVT_IN_DMA_EOT 9
#define | USB_EVT_OUT_DMA_NDR 10
#define | USB_EVT_IN_DMA_NDR 11
#define | USB_EVT_OUT_DMA_ERR 12
#define | USB_EVT_IN_DMA_ERR 13

Functions

void | USB_Power_Event (uint32_t power)
void | USB_Reset_Event (void)
void | USB_Suspend_Event (void)
void | USB_Resume_Event (void)
void | USB_WakeUp_Event (void)
void | USB_SOF_Event (void)
void | USB_Error_Event (uint32_t error)
void | USB_EndPoint0 (uint32_t event)
void | USB_EndPoint1 (uint32_t event)
void | USB_EndPoint2 (uint32_t event)
void | USB_EndPoint3 (uint32_t event)
void | USB_EndPoint4 (uint32_t event)
void | USB_EndPoint5 (uint32_t event)
void | USB_EndPoint6 (uint32_t event)
void | USB_EndPoint7 (uint32_t event)
void | USB_EndPoint8 (uint32_t event)
void | USB_EndPoint9 (uint32_t event)
void | USB_EndPoint10 (uint32_t event)
void | USB_EndPoint11 (uint32_t event)
void | USB_EndPoint12 (uint32_t event)
void | USB_EndPoint13 (uint32_t event)
void | USB_EndPoint14 (uint32_t event)
void | USB_EndPoint15 (uint32_t event)
void | USB_Configure_Event (void)
void | USB_Interface_Event (void)
void | USB_Feature_Event (void)

Variables

void(*const | USB_P_EP [16])(uint32_t event)

Define Documentation

#define USB_EVT_IN 3

Definition at line 35 of file usbuser.h.

#define USB_EVT_IN_DMA_EOT 9

Definition at line 41 of file usbuser.h.

#define USB_EVT_IN_DMA_ERR 13

Definition at line 45 of file usbuser.h.

#define USB_EVT_IN_DMA_NDR 11

Definition at line 43 of file usbuser.h.

#define USB_EVT_IN_NAK 5

Definition at line 37 of file usbuser.h.

#define USB_EVT_IN_STALL 7

Definition at line 39 of file usbuser.h.

#define USB_EVT_OUT 2

Definition at line 34 of file usbuser.h.

#define USB_EVT_OUT_DMA_EOT 8

Definition at line 40 of file usbuser.h.

#define USB_EVT_OUT_DMA_ERR 12

Definition at line 44 of file usbuser.h.

#define USB_EVT_OUT_DMA_NDR 10

Definition at line 42 of file usbuser.h.

#define USB_EVT_OUT_NAK 4

Definition at line 36 of file usbuser.h.

#define USB_EVT_OUT_STALL 6

Definition at line 38 of file usbuser.h.

#define USB_EVT_SETUP 1

Definition at line 33 of file usbuser.h.

Function Documentation

void USB_Configure_Event ( void )
void USB_EndPoint0 ( uint32_t event )

Definition at line 600 of file usbcore.c.

void USB_EndPoint1 ( uint32_t event )

Definition at line 190 of file usbuser.c.

void USB_EndPoint10 ( uint32_t event )

Definition at line 311 of file usbuser.c.

void USB_EndPoint11 ( uint32_t event )

Definition at line 321 of file usbuser.c.

void USB_EndPoint12 ( uint32_t event )

Definition at line 331 of file usbuser.c.

void USB_EndPoint13 ( uint32_t event )

Definition at line 341 of file usbuser.c.

void USB_EndPoint14 ( uint32_t event )

Definition at line 351 of file usbuser.c.

void USB_EndPoint15 ( uint32_t event )

Definition at line 361 of file usbuser.c.

void USB_EndPoint2 ( uint32_t event )

Definition at line 200 of file usbuser.c.

void USB_EndPoint3 ( uint32_t event )

Definition at line 209 of file usbuser.c.

void USB_EndPoint4 ( uint32_t event )

Definition at line 251 of file usbuser.c.

void USB_EndPoint5 ( uint32_t event )

Definition at line 261 of file usbuser.c.

void USB_EndPoint6 ( uint32_t event )

Definition at line 271 of file usbuser.c.

void USB_EndPoint7 ( uint32_t event )

Definition at line 281 of file usbuser.c.

void USB_EndPoint8 ( uint32_t event )

Definition at line 291 of file usbuser.c.

void USB_EndPoint9 ( uint32_t event )

Definition at line 301 of file usbuser.c.

void USB_Error_Event ( uint32_t error )
void USB_Feature_Event ( void )
void USB_Interface_Event ( void )
void USB_Power_Event ( uint32_t power )
void USB_Reset_Event ( void )
void USB_Resume_Event ( void )
void USB_SOF_Event ( void )
void USB_Suspend_Event ( void )
void USB_WakeUp_Event ( void )

Variable Documentation

void(* const USB_P_EP[16])(uint32_t event)

Definition at line 164 of file usbuser.c.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/WDT/INTERRUPT/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/WDT/INTERRUPT/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _WDT
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define _WDT

Definition at line 80 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 138 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/WDT/INTERRUPT/wdt_interrupt_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/WDT/INTERRUPT/wdt_interrupt_test.c File Reference

This example describes how to use Watch-dog timer application in interrupt mode. More...

#include "lpc17xx_wdt.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | MCB_LPC_1768
#define | WDT_TIMEOUT 5000000

Functions

void | WDT_IRQHandler (void)
WDT interrupt handler sub-routine.
void | print_menu (void)
Print menu.
void | LED_Init (void)
Initialize LEDs.
int | c_entry (void)
c_entry: Main WDT program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | info1 [] = "BEFORE WDT interrupt!\n\r"
uint8_t | info2 [] = "AFTER WDT interrupt\n\r"
__IO Bool | wdt_flag = FALSE
__IO Bool | LED_toggle = FALSE

Detailed Description

This example describes how to use Watch-dog timer application in interrupt mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file wdt_interrupt_test.c.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/WDT/RESET/lpc17xx_libcfg.h File Reference

Defines
C:/nxpdrv/LPC1700CMSIS/Examples/WDT/RESET/lpc17xx_libcfg.h File Reference
#include "lpc_types.h"

Go to the source code of this file.

Defines

#define | DEBUG
#define | _DBGFWK
#define | _GPIO
#define | _UART
#define | _UART0
#define | _WDT
#define | CHECK_PARAM(expr)

Define Documentation

#define _DBGFWK

Definition at line 44 of file lpc17xx_libcfg.h.

#define _GPIO

Definition at line 47 of file lpc17xx_libcfg.h.

#define _UART

Definition at line 53 of file lpc17xx_libcfg.h.

#define _UART0

Definition at line 54 of file lpc17xx_libcfg.h.

#define _WDT

Definition at line 80 of file lpc17xx_libcfg.h.

#define CHECK_PARAM ( expr )

Definition at line 137 of file lpc17xx_libcfg.h.

#define DEBUG

Definition at line 36 of file lpc17xx_libcfg.h.

Generated on Mon Nov 28 2011 11:15:07 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/WDT/RESET/wdt_reset_test.c File Reference

Defines | Functions | Variables
C:/nxpdrv/LPC1700CMSIS/Examples/WDT/RESET/wdt_reset_test.c File Reference

This example describes how to use WDT in reset mode. More...

#include "lpc17xx_wdt.h"
#include "lpc17xx_libcfg.h"
#include "lpc17xx_pinsel.h"
#include "debug_frmwrk.h"
#include "lpc17xx_gpio.h"

Go to the source code of this file.

Defines

#define | IAR_LPC_1768
#define | WDT_TIMEOUT 5000000

Functions

int | c_entry (void)
c_entry: Main WDT program body
int | main (void)

Variables

uint8_t | menu1 [] = "********************************************************************************\n\r"
uint8_t | info1 [] = "Last MCU reset caused by WDT TimeOut!\n\r"
uint8_t | info2 [] = "Last MCU reset caused by External!\n\r"

Detailed Description

This example describes how to use WDT in reset mode.

Version:
2.0
Date:
21. May. 2010
Author:
NXP MCU SW Application Team

Copyright(C) 2010, NXP Semiconductor All rights reserved.

Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification.

Definition in file wdt_reset_test.c.

Generated on Mon Nov 28 2011 11:15:14 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- _ -

  • __attribute__() : emactest.c , link_list.c
  • __BUF_INCR : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • __BUF_IS_EMPTY : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • __BUF_IS_FULL : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • __BUF_MASK : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • __BUF_RESET : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • __BUF_WILL_FULL : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • __CCLK_DIV : system_LPC17xx.c
  • __CM3_CMSIS_VERSION : core_cm3.h
  • __CM3_CMSIS_VERSION_MAIN : core_cm3.h
  • __CM3_CMSIS_VERSION_SUB : core_cm3.h
  • __CMSIS_GENERIC : arm_math.h
  • __CORE_CLK : system_LPC17xx.c
  • __CORE_CM3_H_DEPENDANT : core_cm3.h
  • __CORE_CM3_H_GENERIC : core_cm3.h
  • __CORTEX_M : core_cm3.h
  • __FCCO : system_LPC17xx.c
  • __FPU_USED : core_cm3.h
  • __HSI : system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c
  • __I : core_cm3.h
  • __IO : core_cm3.h
  • __LC_H__ : lc.h
  • __LC_SWTICH_H__ : lc-switch.h
  • __M : system_LPC17xx.c
  • __MPU_PRESENT : LPC17xx.h
  • __N : system_LPC17xx.c
  • __NVIC_PRIO_BITS : LPC17xx.h
  • __O : core_cm3.h
  • __PACKq7 : arm_math.h
  • __SIMD32 : arm_math.h
  • __stdin : Retarget.c
  • __stdout : Retarget.c
  • __SYSTEM_CLOCK : system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c
  • __Vendor_SysTickConfig : LPC17xx.h
  • __XTAL : system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c
  • _ADC : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _ADC_CHANNEL : adc_hardware_trigger_test.c
  • _ADC_INT : adc_hardware_trigger_test.c
  • _BIT : lpc_types.h
  • _BITMASK : lpc_types.h
  • _CAN : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _close_r() : syscalls.c
  • _DAC : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _db : main.c
  • _db_char : debug_frmwrk.h , debug_frmwrk.c
  • _db_dec : debug_frmwrk.h , debug_frmwrk.c
  • _db_dec_16 : debug_frmwrk.h , debug_frmwrk.c
  • _db_dec_32 : debug_frmwrk.h , debug_frmwrk.c
  • _db_get_char : debug_frmwrk.h , debug_frmwrk.c
  • _db_hex : debug_frmwrk.h , debug_frmwrk.c
  • _db_hex_16 : debug_frmwrk.h , debug_frmwrk.c
  • _db_hex_32 : debug_frmwrk.h , debug_frmwrk.c
  • _db_msg : debug_frmwrk.h , debug_frmwrk.c
  • _db_msg_ : debug_frmwrk.h , debug_frmwrk.c
  • _DBC : debug_frmwrk.h
  • _DBD : debug_frmwrk.h
  • _DBD16 : debug_frmwrk.h
  • _DBD32 : debug_frmwrk.h
  • _DBG : debug_frmwrk.h
  • _DBG_ : debug_frmwrk.h
  • _DBGFWK : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _DBH : debug_frmwrk.h
  • _DBH16 : debug_frmwrk.h
  • _DBH32 : debug_frmwrk.h
  • _DG : debug_frmwrk.h
  • _EMAC : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _EXTI : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _fstat_r() : syscalls.c
  • _GLCD_Cmd_t : drv_glcd.h
  • _GLCD_CmdDir_t : drv_glcd.h
  • _GLCD_ISS_t : drv_glcd.h
  • _GLCD_Status_t : drv_glcd.h
  • _GPDMA : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _GPIO : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _I2C : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _I2C0 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _I2C1 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _I2C2 : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _I2S : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _isatty_r() : syscalls.c
  • _lseek_r() : syscalls.c
  • _MCPWM : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _PWM : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _PWM1 : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _QEI : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _read_r() : syscalls.c
  • _RIT : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _RTC : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _SBF : lpc_types.h
  • _sbrk_r() : syscalls.c
  • _sd_connect_status : spi_sdcard.c
  • _sd_error : spi_sdcard.c
  • _SPI : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _SSP : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _SSP0 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _SSP1 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _sys_exit() : Retarget.c
  • _SYSTICK : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _tickVal : tcpip.c
  • _TIM : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _ttywrch() : Retarget.c
  • _UART : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _UART0 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _UART1 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _UART2 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _UART3 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _USB_DMA : lpc17xx_libcfg_default.h
  • _USBDEV : lpc17xx_libcfg_default.h
  • _WDT : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _write_r() : syscalls.c
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/10ms_base/10ms_base.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/10ms_base/10ms_base.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          10ms_base.c                             2010-05-21
00003 */
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_gpio.h"
00028 #include "lpc17xx_systick.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE VARIABLES *************************/
00037 FunctionalState Cur_State = ENABLE;
00038
00039 /************************** PRIVATE FUNCTIONS *************************/
00040 void SysTick_Handler(void);
00041
00042 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00043 /*********************************************************************/
00048 void SysTick_Handler(void)
00049 {
00050         //Clear System Tick counter flag
00051         SYSTICK_ClearCounterFlag();
00052         //toggle P0.0
00053         if (Cur_State == ENABLE)
00054         {
00055                 //pull-down pin
00056                 GPIO_ClearValue(0, (1<<0));
00057                 Cur_State = DISABLE;
00058         }
00059         else
00060         {
00061                 GPIO_SetValue(0, (1<<0));
00062                 Cur_State = ENABLE;
00063         }
00064 }
00065
00066
00067 /*-------------------------MAIN FUNCTION------------------------------*/
00068 /*********************************************************************/
00073 int c_entry (void)
00074 {
00075         //Use P0.0 to test System Tick interrupt
00076         GPIO_SetDir(0, (1<<0), 1); //Set P0.0 as output
00077
00078         //Initialize System Tick with 10ms time interval
00079         SYSTICK_InternalInit(10);
00080         //Enable System Tick interrupt
00081         SYSTICK_IntCmd(ENABLE);
00082         //Enable System Tick Counter
00083         SYSTICK_Cmd(ENABLE);
00084
00085         while(1);
00086 }
00087
00088
00089 /* With ARM and GHS toolsets, the entry point is main() - this will
00090    allow the linker to generate wrapper code to setup stacks, allocate
00091    heap area, and initialize and copy code and data segments. For GNU
00092    toolsets, the entry point is through __start() in the crt0_gnu.asm
00093    file, and that startup code will setup stacks and data */
00094 int main(void)
00095 {
00096     return c_entry();
00097 }
00098
00099 #ifdef  DEBUG
00100 /*******************************************************************************
00101 * @brief                Reports the name of the source file and the source line number
00102 *                               where the CHECK_PARAM error has occurred.
00103 * @param[in]    file Pointer to the source file name
00104 * @param[in]    line assert_param error line source number
00105 * @return               None
00106 *******************************************************************************/
00107 void check_failed(uint8_t *file, uint32_t line)
00108 {
00109         /* User can add his own implementation to report the file name and line number,
00110          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00111
00112         /* Infinite loop */
00113         while(1);
00114 }
00115 #endif
00116
00117 /*
00118  * @}
00119  */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Burst/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Burst/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK -------------------- */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* SSP ------------------------------- */
00066 //#define _SSP
00067 //#define _SSP0
00068 //#define _SSP1
00069
00070
00071 /* I2C ------------------------------- */
00072 //#define _I2C
00073 //#define _I2C0
00074 //#define _I2C1
00075 //#define _I2C2
00076
00077 /* TIMER ------------------------------- */
00078 //#define _TIM
00079
00080 /* WDT ------------------------------- */
00081 //#define _WDT
00082
00083
00084 /* GPDMA ------------------------------- */
00085 //#define _GPDMA
00086
00087
00088 /* DAC ------------------------------- */
00089 //#define _DAC
00090
00091 /* DAC ------------------------------- */
00092 #define _ADC
00093
00094
00095 /* PWM ------------------------------- */
00096 //#define _PWM
00097 //#define _PWM1
00098
00099 /* RTC ------------------------------- */
00100 //#define _RTC
00101
00102 /* I2S ------------------------------- */
00103 //#define _I2S
00104
00105 /* USB device ------------------------------- */
00106 //#define _USBDEV
00107 //#define _USB_DMA
00108
00109 /* QEI ------------------------------- */
00110 //#define _QEI
00111
00112 /* MCPWM ------------------------------- */
00113 //#define _MCPWM
00114
00115 /* CAN--------------------------------*/
00116 //#define _CAN
00117
00118 /* RIT ------------------------------- */
00119 //#define _RIT
00120
00121 /* EMAC ------------------------------ */
00122 //#define _EMAC
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/DMA/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/DMA/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK -------------------- */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* SSP ------------------------------- */
00066 //#define _SSP
00067 //#define _SSP0
00068 //#define _SSP1
00069
00070
00071 /* I2C ------------------------------- */
00072 //#define _I2C
00073 //#define _I2C0
00074 //#define _I2C1
00075 //#define _I2C2
00076
00077 /* TIMER ------------------------------- */
00078 //#define _TIM
00079
00080 /* WDT ------------------------------- */
00081 //#define _WDT
00082
00083
00084 /* GPDMA ------------------------------- */
00085 #define _GPDMA
00086
00087
00088 /* DAC ------------------------------- */
00089 //#define _DAC
00090
00091 /* DAC ------------------------------- */
00092 #define _ADC
00093
00094
00095 /* PWM ------------------------------- */
00096 //#define _PWM
00097 //#define _PWM1
00098
00099 /* RTC ------------------------------- */
00100 //#define _RTC
00101
00102 /* I2S ------------------------------- */
00103 //#define _I2S
00104
00105 /* USB device ------------------------------- */
00106 //#define _USBDEV
00107 //#define _USB_DMA
00108
00109 /* QEI ------------------------------- */
00110 //#define _QEI
00111
00112 /* MCPWM ------------------------------- */
00113 //#define _MCPWM
00114
00115 /* CAN--------------------------------*/
00116 //#define _CAN
00117
00118 /* RIT ------------------------------- */
00119 //#define _RIT
00120
00121 /* EMAC ------------------------------ */
00122 //#define _EMAC
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/HardwareTrigger/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/HardwareTrigger/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK -------------------- */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* SSP ------------------------------- */
00066 //#define _SSP
00067 //#define _SSP0
00068 //#define _SSP1
00069
00070
00071 /* I2C ------------------------------- */
00072 //#define _I2C
00073 //#define _I2C0
00074 //#define _I2C1
00075 //#define _I2C2
00076
00077 /* TIMER ------------------------------- */
00078 //#define _TIM
00079
00080 /* WDT ------------------------------- */
00081 //#define _WDT
00082
00083
00084 /* GPDMA ------------------------------- */
00085 //#define _GPDMA
00086
00087
00088 /* DAC ------------------------------- */
00089 //#define _DAC
00090
00091 /* DAC ------------------------------- */
00092 #define _ADC
00093
00094
00095 /* PWM ------------------------------- */
00096 //#define _PWM
00097 //#define _PWM1
00098
00099 /* RTC ------------------------------- */
00100 //#define _RTC
00101
00102 /* I2S ------------------------------- */
00103 //#define _I2S
00104
00105 /* USB device ------------------------------- */
00106 //#define _USBDEV
00107 //#define _USB_DMA
00108
00109 /* QEI ------------------------------- */
00110 //#define _QEI
00111
00112 /* MCPWM ------------------------------- */
00113 //#define _MCPWM
00114
00115 /* CAN--------------------------------*/
00116 //#define _CAN
00117
00118 /* RIT ------------------------------- */
00119 //#define _RIT
00120
00121 /* EMAC ------------------------------ */
00122 //#define _EMAC
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/INTERRUPT/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/INTERRUPT/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* SSP ------------------------------- */
00066 //#define _SSP
00067 //#define _SSP0
00068 //#define _SSP1
00069
00070
00071 /* I2C ------------------------------- */
00072 //#define _I2C
00073 //#define _I2C0
00074 //#define _I2C1
00075 //#define _I2C2
00076
00077 /* TIMER ------------------------------- */
00078 //#define _TIM
00079
00080 /* WDT ------------------------------- */
00081 //#define _WDT
00082
00083
00084 /* GPDMA ------------------------------- */
00085 //#define _GPDMA
00086
00087
00088 /* DAC ------------------------------- */
00089 //#define _DAC
00090
00091 /* DAC ------------------------------- */
00092 #define _ADC
00093
00094
00095 /* PWM ------------------------------- */
00096 //#define _PWM
00097 //#define _PWM1
00098
00099 /* RTC ------------------------------- */
00100 //#define _RTC
00101
00102 /* I2S ------------------------------- */
00103 //#define _I2S
00104
00105 /* USB device ------------------------------- */
00106 //#define _USBDEV
00107 //#define _USB_DMA
00108
00109 /* QEI ------------------------------- */
00110 //#define _QEI
00111
00112 /* MCPWM ------------------------------- */
00113 //#define _MCPWM
00114
00115 /* CAN--------------------------------*/
00116 //#define _CAN
00117
00118 /* RIT ------------------------------- */
00119 //#define _RIT
00120
00121 /* EMAC ------------------------------ */
00122 //#define _EMAC
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Polling/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Polling/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* SSP ------------------------------- */
00066 //#define _SSP
00067 //#define _SSP0
00068 //#define _SSP1
00069
00070
00071 /* I2C ------------------------------- */
00072 //#define _I2C
00073 //#define _I2C0
00074 //#define _I2C1
00075 //#define _I2C2
00076
00077 /* TIMER ------------------------------- */
00078 //#define _TIM
00079
00080 /* WDT ------------------------------- */
00081 //#define _WDT
00082
00083
00084 /* GPDMA ------------------------------- */
00085 //#define _GPDMA
00086
00087
00088 /* DAC ------------------------------- */
00089 //#define _DAC
00090
00091 /* DAC ------------------------------- */
00092 #define _ADC
00093
00094
00095 /* PWM ------------------------------- */
00096 //#define _PWM
00097 //#define _PWM1
00098
00099 /* RTC ------------------------------- */
00100 //#define _RTC
00101
00102 /* I2S ------------------------------- */
00103 //#define _I2S
00104
00105 /* USB device ------------------------------- */
00106 //#define _USBDEV
00107 //#define _USB_DMA
00108
00109 /* QEI ------------------------------- */
00110 //#define _QEI
00111
00112 /* MCPWM ------------------------------- */
00113 //#define _MCPWM
00114
00115 /* CAN--------------------------------*/
00116 //#define _CAN
00117
00118 /* RIT ------------------------------- */
00119 //#define _RIT
00120
00121 /* EMAC ------------------------------ */
00122 //#define _EMAC
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/ADC.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/ADC.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  * Name:    ADC.c
00003  * Purpose: MCB1700 low level ADC functions
00004  * Version: V1.00
00005  * Note(s):
00006  *----------------------------------------------------------------------------
00007  * This file is part of the uVision/ARM development tools.
00008  * This software may only be used under the terms of a valid, current,
00009  * end user licence from KEIL for a compatible version of KEIL software
00010  * development tools. Nothing else gives you the right to use this software.
00011  *
00012  * This software is supplied "AS IS" without warranties of any kind.
00013  *
00014  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00015  *----------------------------------------------------------------------------
00016  * History:
00017  *          V1.00 Initial Version
00018  *----------------------------------------------------------------------------*/
00019
00020 #include "LPC17xx.h"                             /* LPC17xx definitions */
00021 #include "ADC.h"
00022 #include "lpc17xx_emac.h"
00023
00024 /*----------------------------------------------------------------------------
00025   initialize ADC Pins
00026  *----------------------------------------------------------------------------*/
00027 void ADC_init (void) {
00028 #ifdef MCB_LPC_1768
00029         /* Using MCB1700 board :
00030          * ADC channel 2 is available
00031          */
00032   LPC_PINCON->PINSEL1 &= ~(3<<18);                   /* P0.25 is GPIO */
00033   LPC_PINCON->PINSEL1 |=  (1<<18);                   /* P0.25 is AD0.2 */
00034
00035   LPC_SC->PCONP       |=  (1<<12);                   /* Enable power to ADC block */
00036
00037   LPC_ADC->ADCR        =  (1<< 2) |                  /* select AD0.2 pin */
00038                       (1<< 8) |
00039                       (1<<21);                   /* enable ADC */
00040 #elif defined(IAR_LPC_1768)
00041   /* Using IAR LPC1768 KickStart board
00042    * ADC channel 5 is available
00043    */
00044    LPC_PINCON->PINSEL3 |=  (3<<30);                   /* P1.31 is AD0.5 */
00045
00046    LPC_SC->PCONP       |=  (1<<12);                   /* Enable power to ADC block */
00047
00048    LPC_ADC->ADCR        =  (1<<5) |               /* select AD0.5 pin */
00049                        (1<< 8) |
00050                        (1<<21);                   /* enable ADC */
00051 #endif
00052 }
00053
00054
00055 /*----------------------------------------------------------------------------
00056   start ADC Conversion
00057  *----------------------------------------------------------------------------*/
00058 void ADC_startCnv (void) {
00059         LPC_ADC->ADCR &= ~(7<<24);                         /* stop conversion  */
00060         LPC_ADC->ADCR |=  (1<<24);                         /* start conversion */
00061 }
00062
00063
00064 /*----------------------------------------------------------------------------
00065   stop ADC Conversion
00066  *----------------------------------------------------------------------------*/
00067 void ADC_stopCnv (void) {
00068         LPC_ADC->ADCR &= ~(7<<24);                         /* stop conversion */
00069 }
00070
00071
00072 /*----------------------------------------------------------------------------
00073   get converted ADC value
00074  *----------------------------------------------------------------------------*/
00075 uint32_t ADC_getCnv (void) {
00076   uint32_t adGdr;
00077
00078   while (!(LPC_ADC->ADGDR & (1UL<<31)));             /* Wait for Conversion end */
00079   adGdr = LPC_ADC->ADGDR;
00080   return((adGdr >> 4) & ADC_VALUE_MAX);          /* read converted value */
00081 }
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/ADC.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/ADC.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  * Name:    ADC.h
00003  * Purpose: MCB1700 low level ADC definitions
00004  * Version: V1.00
00005  * Note(s):
00006  *----------------------------------------------------------------------------
00007  * This file is part of the uVision/ARM development tools.
00008  * This software may only be used under the terms of a valid, current,
00009  * end user licence from KEIL for a compatible version of KEIL software
00010  * development tools. Nothing else gives you the right to use this software.
00011  *
00012  * This software is supplied "AS IS" without warranties of any kind.
00013  *
00014  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00015  *----------------------------------------------------------------------------
00016  * History:
00017  *          V1.00 Initial Version
00018  *----------------------------------------------------------------------------*/
00019
00020 #ifndef __ADC_H
00021 #define __ADC_H
00022
00023 #include "lpc_types.h"
00024
00025 #define ADC_VALUE_MAX 0xFFF
00026
00027
00028 extern void     ADC_init    (void);
00029 extern void     ADC_startCnv(void);
00030 extern void     ADC_stopCnv (void);
00031 extern uint32_t ADC_getCnv  (void);
00032
00033 #endif
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_LedControl/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_LedControl/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 #define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_self_test/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_self_test/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 #define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_aflut/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_aflut/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 #define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_bypass_mode/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_bypass_mode/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 #define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_two_kit/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_two_kit/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 #define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Bit-banding/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Bit-banding/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/MPU/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/MPU/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Privilege_mode/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Privilege_mode/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/DMA/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/DMA/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 #define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/SineWave/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/SineWave/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK -------------------- */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 #define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/Speaker/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/Speaker/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 #define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/WaveGenerate/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/WaveGenerate/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 #define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/DiskImg.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/DiskImg.c
Go to the documentation of this file.
00001 /* Disk Image */
00002
00003 #include "lpc_types.h"
00004 #include "memory.h"
00005
00006 const unsigned char DiskImage[MSC_ImageSize] = {
00007 0xEB,0x3C,0x90,0x4D,0x53,0x44,0x4F,0x53,0x35,0x2E,0x30,0x00,0x02,0x01,0x01,0x00,
00008 0x01,0x10,0x00,0x20,0x00,0xF8,0x02,0x00,0x01,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
00009 0x00,0x00,0x00,0x00,0x00,0x00,0x29,0x74,0x19,0x02,0x27,0x4C,0x50,0x43,0x31,0x37,
00010 0x78,0x78,0x20,0x55,0x53,0x42,0x46,0x41,0x54,0x31,0x32,0x20,0x20,0x20,0x33,0xC9,
00011 0x8E,0xD1,0xBC,0xF0,0x7B,0x8E,0xD9,0xB8,0x00,0x20,0x8E,0xC0,0xFC,0xBD,0x00,0x7C,
00012 0x38,0x4E,0x24,0x7D,0x24,0x8B,0xC1,0x99,0xE8,0x3C,0x01,0x72,0x1C,0x83,0xEB,0x3A,
00013 0x66,0xA1,0x1C,0x7C,0x26,0x66,0x3B,0x07,0x26,0x8A,0x57,0xFC,0x75,0x06,0x80,0xCA,
00014 0x02,0x88,0x56,0x02,0x80,0xC3,0x10,0x73,0xEB,0x33,0xC9,0x8A,0x46,0x10,0x98,0xF7,
00015 0x66,0x16,0x03,0x46,0x1C,0x13,0x56,0x1E,0x03,0x46,0x0E,0x13,0xD1,0x8B,0x76,0x11,
00016 0x60,0x89,0x46,0xFC,0x89,0x56,0xFE,0xB8,0x20,0x00,0xF7,0xE6,0x8B,0x5E,0x0B,0x03,
00017 0xC3,0x48,0xF7,0xF3,0x01,0x46,0xFC,0x11,0x4E,0xFE,0x61,0xBF,0x00,0x00,0xE8,0xE6,
00018 0x00,0x72,0x39,0x26,0x38,0x2D,0x74,0x17,0x60,0xB1,0x0B,0xBE,0xA1,0x7D,0xF3,0xA6,
00019 0x61,0x74,0x32,0x4E,0x74,0x09,0x83,0xC7,0x20,0x3B,0xFB,0x72,0xE6,0xEB,0xDC,0xA0,
00020 0xFB,0x7D,0xB4,0x7D,0x8B,0xF0,0xAC,0x98,0x40,0x74,0x0C,0x48,0x74,0x13,0xB4,0x0E,
00021 0xBB,0x07,0x00,0xCD,0x10,0xEB,0xEF,0xA0,0xFD,0x7D,0xEB,0xE6,0xA0,0xFC,0x7D,0xEB,
00022 0xE1,0xCD,0x16,0xCD,0x19,0x26,0x8B,0x55,0x1A,0x52,0xB0,0x01,0xBB,0x00,0x00,0xE8,
00023 0x3B,0x00,0x72,0xE8,0x5B,0x8A,0x56,0x24,0xBE,0x0B,0x7C,0x8B,0xFC,0xC7,0x46,0xF0,
00024 0x3D,0x7D,0xC7,0x46,0xF4,0x29,0x7D,0x8C,0xD9,0x89,0x4E,0xF2,0x89,0x4E,0xF6,0xC6,
00025 0x06,0x96,0x7D,0xCB,0xEA,0x03,0x00,0x00,0x20,0x0F,0xB6,0xC8,0x66,0x8B,0x46,0xF8,
00026 0x66,0x03,0x46,0x1C,0x66,0x8B,0xD0,0x66,0xC1,0xEA,0x10,0xEB,0x5E,0x0F,0xB6,0xC8,
00027 0x4A,0x4A,0x8A,0x46,0x0D,0x32,0xE4,0xF7,0xE2,0x03,0x46,0xFC,0x13,0x56,0xFE,0xEB,
00028 0x4A,0x52,0x50,0x06,0x53,0x6A,0x01,0x6A,0x10,0x91,0x8B,0x46,0x18,0x96,0x92,0x33,
00029 0xD2,0xF7,0xF6,0x91,0xF7,0xF6,0x42,0x87,0xCA,0xF7,0x76,0x1A,0x8A,0xF2,0x8A,0xE8,
00030 0xC0,0xCC,0x02,0x0A,0xCC,0xB8,0x01,0x02,0x80,0x7E,0x02,0x0E,0x75,0x04,0xB4,0x42,
00031 0x8B,0xF4,0x8A,0x56,0x24,0xCD,0x13,0x61,0x61,0x72,0x0B,0x40,0x75,0x01,0x42,0x03,
00032 0x5E,0x0B,0x49,0x75,0x06,0xF8,0xC3,0x41,0xBB,0x00,0x00,0x60,0x66,0x6A,0x00,0xEB,
00033 0xB0,0x4E,0x54,0x4C,0x44,0x52,0x20,0x20,0x20,0x20,0x20,0x20,0x0D,0x0A,0x52,0x65,
00034 0x6D,0x6F,0x76,0x65,0x20,0x64,0x69,0x73,0x6B,0x73,0x20,0x6F,0x72,0x20,0x6F,0x74,
00035 0x68,0x65,0x72,0x20,0x6D,0x65,0x64,0x69,0x61,0x2E,0xFF,0x0D,0x0A,0x44,0x69,0x73,
00036 0x6B,0x20,0x65,0x72,0x72,0x6F,0x72,0xFF,0x0D,0x0A,0x50,0x72,0x65,0x73,0x73,0x20,
00037 0x61,0x6E,0x79,0x20,0x6B,0x65,0x79,0x20,0x74,0x6F,0x20,0x72,0x65,0x73,0x74,0x61,
00038 0x72,0x74,0x0D,0x0A,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xAC,0xCB,0xD8,0x55,0xAA,
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00157 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00158 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00159 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00160 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00161 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00162 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00163 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00164 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00165 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00166 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
00167 };
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00034
00035 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00036    the "CHECK_PARAM" macro in the FW library code */
00037
00038 #define DEBUG
00039
00040
00041 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00042
00043 /* Comment the line below to disable the specific peripheral inclusion */
00044
00045 /* DEBUG_FRAMWORK ------------------------------ */
00046 #define _DBGFWK
00047
00048 /* GPIO ------------------------------- */
00049 //#define _GPIO
00050
00051 /* EXTI ------------------------------- */
00052 //#define _EXTI
00053
00054 /* UART ------------------------------- */
00055 #define _UART
00056 #define _UART0
00057 //#define _UART1
00058 //#define _UART2
00059 //#define _UART3
00060
00061 /* SPI ------------------------------- */
00062 //#define _SPI
00063
00064 /* SSP ------------------------------- */
00065 //#define _SSP
00066 //#define _SSP0
00067 //#define _SSP1
00068
00069 /* SYSTICK --------------------------- */
00070 //#define _SYSTICK
00071
00072 /* I2C ------------------------------- */
00073 //#define _I2C
00074 //#define _I2C0
00075 //#define _I2C1
00076 //#define _I2C2
00077
00078 /* TIMER ------------------------------- */
00079 //#define _TIM
00080
00081 /* WDT ------------------------------- */
00082 //#define _WDT
00083
00084
00085 /* GPDMA ------------------------------- */
00086 //#define _GPDMA
00087
00088
00089 /* DAC ------------------------------- */
00090 //#define _DAC
00091
00092 /* DAC ------------------------------- */
00093 //#define _ADC
00094
00095
00096 /* PWM ------------------------------- */
00097 //#define _PWM
00098 //#define _PWM1
00099
00100 /* RTC ------------------------------- */
00101 //#define _RTC
00102
00103 /* I2S ------------------------------- */
00104 //#define _I2S
00105
00106 /* USB device ------------------------------- */
00107 //#define _USBDEV
00108 //#define _USB_DMA
00109
00110 /* QEI ------------------------------- */
00111 //#define _QEI
00112
00113 /* MCPWM ------------------------------- */
00114 //#define _MCPWM
00115
00116 /* CAN--------------------------------*/
00117 //#define _CAN
00118
00119 /* RIT ------------------------------- */
00120 //#define _RIT
00121
00122 /* EMAC ------------------------------ */
00123 #define _EMAC
00124
00125 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00126
00127 #ifdef  DEBUG
00128 /*******************************************************************************
00129 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00130 *                               It is used only if the library is compiled in DEBUG mode.
00131 * @param[in]    expr - If expr is false, it calls check_failed() function
00132 *                       which reports the name of the source file and the source
00133 *                       line number of the call that failed.
00134 *                    - If expr is true, it returns no value.
00135 * @return               None
00136 *******************************************************************************/
00137 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00138 #else
00139 #define CHECK_PARAM(expr)
00140 #endif /* DEBUG */
00141
00142
00143
00144 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00145
00146 #ifdef  DEBUG
00147 void check_failed(uint8_t *file, uint32_t line);
00148 #endif
00149
00150
00151 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 #define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Serial.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Serial.c
Go to the documentation of this file.
00001 /******************************************************************************/
00002 /* SERIAL.C: Low Level Serial Routines                                        */
00003 /******************************************************************************/
00004 /* This file is part of the uVision/ARM development tools.                    */
00005 /* Copyright (c) 2005-2007 Keil Software. All rights reserved.                */
00006 /* This software may only be used under the terms of a valid, current,        */
00007 /* end user licence from KEIL for a compatible version of KEIL software       */
00008 /* development tools. Nothing else gives you the right to use this software.  */
00009 /******************************************************************************/
00010
00011 #include "debug_frmwrk.h"
00012
00013 #define CR     0x0D
00014
00015
00016 void init_serial (void)  {               /* Initialize Serial Interface       */
00017         debug_frmwrk_init();
00018 }
00019
00020
00021 /* Implementation of putchar (also used by printf function to output data)    */
00022 int sendchar (int ch)  {                 /* Write character to Serial Port    */
00023 #if 1
00024    if (ch == '\n')  {
00025    _DBC(CR);                          /* output CR */
00026   }
00027 #endif
00028         _DBC(ch);
00029         return (ch);
00030 }
00031
00032
00033 int getkey (void)  {                     /* Read character from Serial Port   */
00034   return (_DG);
00035 }
00036
00037 unsigned char getchar(void)
00038 {
00039         return getkey();
00040 }
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00034
00035 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00036    the "CHECK_PARAM" macro in the FW library code */
00037
00038 #define DEBUG
00039
00040
00041 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00042
00043 /* Comment the line below to disable the specific peripheral inclusion */
00044
00045 /* DEBUG_FRAMWORK ------------------------------ */
00046 #define _DBGFWK
00047
00048 /* GPIO ------------------------------- */
00049 #define _GPIO
00050
00051 /* EXTI ------------------------------- */
00052 //#define _EXTI
00053
00054 /* UART ------------------------------- */
00055 #define _UART
00056 #define _UART0
00057 //#define _UART1
00058 //#define _UART2
00059 //#define _UART3
00060
00061 /* SPI ------------------------------- */
00062 //#define _SPI
00063
00064 /* SSP ------------------------------- */
00065 //#define _SSP
00066 //#define _SSP0
00067 //#define _SSP1
00068
00069 /* SYSTICK --------------------------- */
00070 //#define _SYSTICK
00071
00072 /* I2C ------------------------------- */
00073 //#define _I2C
00074 //#define _I2C0
00075 //#define _I2C1
00076 //#define _I2C2
00077
00078 /* TIMER ------------------------------- */
00079 //#define _TIM
00080
00081 /* WDT ------------------------------- */
00082 //#define _WDT
00083
00084
00085 /* GPDMA ------------------------------- */
00086 //#define _GPDMA
00087
00088
00089 /* DAC ------------------------------- */
00090 //#define _DAC
00091
00092 /* DAC ------------------------------- */
00093 //#define _ADC
00094
00095
00096 /* PWM ------------------------------- */
00097 //#define _PWM
00098 //#define _PWM1
00099
00100 /* RTC ------------------------------- */
00101 //#define _RTC
00102
00103 /* I2S ------------------------------- */
00104 //#define _I2S
00105
00106 /* USB device ------------------------------- */
00107 //#define _USBDEV
00108 //#define _USB_DMA
00109
00110 /* QEI ------------------------------- */
00111 //#define _QEI
00112
00113 /* MCPWM ------------------------------- */
00114 //#define _MCPWM
00115
00116 /* CAN--------------------------------*/
00117 //#define _CAN
00118
00119 /* RIT ------------------------------- */
00120 //#define _RIT
00121
00122 /* EMAC ------------------------------ */
00123 #define _EMAC
00124
00125
00126 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00127
00128 #ifdef  DEBUG
00129 /*******************************************************************************
00130 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00131 *                               It is used only if the library is compiled in DEBUG mode.
00132 * @param[in]    expr - If expr is false, it calls check_failed() function
00133 *                       which reports the name of the source file and the source
00134 *                       line number of the call that failed.
00135 *                    - If expr is true, it returns no value.
00136 * @return               None
00137 *******************************************************************************/
00138 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00139 #else
00140 #define CHECK_PARAM(expr)
00141 #endif /* DEBUG */
00142
00143
00144
00145 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00146
00147 #ifdef  DEBUG
00148 void check_failed(uint8_t *file, uint32_t line);
00149 #endif
00150
00151
00152 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/EMAC.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/EMAC.c
Go to the documentation of this file.
00001 /******************************************************************
00002  *****                                                        *****
00003  *****  Name: cs8900.c                                        *****
00004  *****  Ver.: 1.0                                             *****
00005  *****  Date: 07/05/2001                                      *****
00006  *****  Auth: Andreas Dannenberg                              *****
00007  *****        HTWK Leipzig                                    *****
00008  *****        university of applied sciences                  *****
00009  *****        Germany                                         *****
00010  *****  Func: ethernet packet-driver for use with LAN-        *****
00011  *****        controller CS8900 from Crystal/Cirrus Logic     *****
00012  *****                                                        *****
00013  *****  NXP: Module modified for use with NXP                     *****
00014  *****        LPC1768 EMAC Ethernet controller                *****
00015  *****                                                        *****
00016  ******************************************************************/
00017
00018 #include "EMAC.h"
00019 #include "tcpip.h"
00020 #include "lpc17xx_emac.h"
00021 #include "lpc17xx_pinsel.h"
00022
00023 /* For debugging... */
00024 #include "debug_frmwrk.h"
00025 #include <stdio.h>
00026 #define DB      _DBG((uint8_t *)db)
00027 char db[64];
00028
00029 static unsigned short *rptr;
00030 static unsigned short *tptr;
00031
00032 /*
00033  * NXP: Here AHBRAM1 section still not be used, so a mount of this section
00034  * will be used to store buffer data get from receive packet buffer of EMAC
00035  */
00036 static unsigned short *pgBuf = (unsigned short *)LPC_AHBRAM1_BASE;
00037
00038 // configure port-pins for use with LAN-controller,
00039 // reset it and send the configuration-sequence
00040 void Init_EMAC(void)
00041 {
00042         uint32_t delay;
00043
00044         /* EMAC configuration type */
00045         EMAC_CFG_Type Emac_Config;
00046         /* pin configuration */
00047         PINSEL_CFG_Type PinCfg;
00048
00049         /* EMAC address */
00050         uint8_t EMACAddr[] = {MYMAC_1, MYMAC_2, MYMAC_3, MYMAC_4, MYMAC_5, MYMAC_6};
00051
00052         /*
00053          * Enable P1 Ethernet Pins:
00054          * P1.0 - ENET_TXD0
00055          * P1.1 - ENET_TXD1
00056          * P1.4 - ENET_TX_EN
00057          * P1.8 - ENET_CRS
00058          * P1.9 - ENET_RXD0
00059          * P1.10 - ENET_RXD1
00060          * P1.14 - ENET_RX_ER
00061          * P1.15 - ENET_REF_CLK
00062          * P1.16 - ENET_MDC
00063          * P1.17 - ENET_MDIO
00064          */
00065         PinCfg.Funcnum = 1;
00066         PinCfg.OpenDrain = 0;
00067         PinCfg.Pinmode = 0;
00068         PinCfg.Portnum = 1;
00069
00070         PinCfg.Pinnum = 0;
00071         PINSEL_ConfigPin(&PinCfg);
00072         PinCfg.Pinnum = 1;
00073         PINSEL_ConfigPin(&PinCfg);
00074         PinCfg.Pinnum = 4;
00075         PINSEL_ConfigPin(&PinCfg);
00076         PinCfg.Pinnum = 8;
00077         PINSEL_ConfigPin(&PinCfg);
00078         PinCfg.Pinnum = 9;
00079         PINSEL_ConfigPin(&PinCfg);
00080         PinCfg.Pinnum = 10;
00081         PINSEL_ConfigPin(&PinCfg);
00082         PinCfg.Pinnum = 14;
00083         PINSEL_ConfigPin(&PinCfg);
00084         PinCfg.Pinnum = 15;
00085         PINSEL_ConfigPin(&PinCfg);
00086         PinCfg.Pinnum = 16;
00087         PINSEL_ConfigPin(&PinCfg);
00088         PinCfg.Pinnum = 17;
00089         PINSEL_ConfigPin(&PinCfg);
00090
00091         _DBG_("Init EMAC module");
00092         sprintf(db,"MAC addr: %X-%X-%X-%X-%X-%X \n\r", \
00093                          EMACAddr[0],  EMACAddr[1],  EMACAddr[2], \
00094                           EMACAddr[3],  EMACAddr[4],  EMACAddr[5]);
00095         DB;
00096
00097         Emac_Config.Mode = EMAC_MODE_AUTO;
00098         Emac_Config.pbEMAC_Addr = EMACAddr;
00099         // Initialize EMAC module with given parameter
00100         while (EMAC_Init(&Emac_Config) == ERROR){
00101                 // Delay for a while then continue initializing EMAC module
00102                 _DBG_("Error during initializing EMAC, restart after a while");
00103                 for (delay = 0x100000; delay; delay--);
00104         }
00105         _DBG_("Init EMAC complete");
00106 }
00107
00108
00109 // reads a word in little-endian byte order from RX_BUFFER
00110
00111 unsigned short ReadFrame_EMAC(void)
00112 {
00113   return (*rptr++);
00114 }
00115
00116 // reads a word in big-endian byte order from RX_FRAME_PORT
00117 // (useful to avoid permanent byte-swapping while reading
00118 // TCP/IP-data)
00119
00120 unsigned short ReadFrameBE_EMAC(void)
00121 {
00122   unsigned short ReturnValue;
00123
00124   ReturnValue = SwapBytes (*rptr++);
00125   return (ReturnValue);
00126 }
00127
00128
00129 // copies bytes from frame port to MCU-memory
00130 // NOTES: * an odd number of byte may only be transfered
00131 //          if the frame is read to the end!
00132 //        * MCU-memory MUST start at word-boundary
00133
00134 void CopyFromFrame_EMAC(void *Dest, unsigned short Size)
00135 {
00136   unsigned short * piDest;                       // Keil: Pointer added to correct expression
00137
00138   piDest = Dest;                                 // Keil: Line added
00139   while (Size > 1) {
00140     *piDest++ = ReadFrame_EMAC();
00141     Size -= 2;
00142   }
00143
00144   if (Size) {                                         // check for leftover byte...
00145     *(unsigned char *)piDest = (char)ReadFrame_EMAC();// the LAN-Controller will return 0
00146   }                                                   // for the highbyte
00147 }
00148
00149 // does a dummy read on frame-I/O-port
00150 // NOTE: only an even number of bytes is read!
00151
00152 void DummyReadFrame_EMAC(unsigned short Size)    // discards an EVEN number of bytes
00153 {                                                // from RX-fifo
00154   while (Size > 1) {
00155     ReadFrame_EMAC();
00156     Size -= 2;
00157   }
00158 }
00159
00160 // Reads the length of the received ethernet frame and checks if the
00161 // destination address is a broadcast message or not
00162 // returns the frame length
00163 unsigned short StartReadFrame(void) {
00164         unsigned short RxLen;
00165         EMAC_PACKETBUF_Type RxPack;
00166
00167         RxLen = EMAC_GetReceiveDataSize() - 3;
00168         // Copy packet to data buffer
00169         RxPack.pbDataBuf = (uint32_t *)pgBuf;
00170         RxPack.ulDataLen = RxLen;
00171         EMAC_ReadPacketBuffer(&RxPack);
00172         // Point to the data buffer
00173         rptr = (unsigned short *)pgBuf;
00174         return(RxLen);
00175 }
00176
00177 // Release the buffer after reading all the content inside
00178 void EndReadFrame(void) {
00179         // just call EMAC_UpdateConsumeIndex() in EMAC driver
00180         EMAC_UpdateRxConsumeIndex();
00181 }
00182
00183 // Check whether if there is a receive packet coming
00184 unsigned int CheckFrameReceived(void) {             // Packet received ?
00185         // Just call EMAC_CheckReceiveIndex() in EMAC driver
00186         if (EMAC_CheckReceiveIndex() == TRUE){
00187                 return (1);
00188         } else {
00189                 return (0);
00190         }
00191 }
00192
00193 // requests space in EMAC memory for storing an outgoing frame
00194 void RequestSend(unsigned short FrameSize)
00195 {
00196         // Nothing to do here, just implemented in CopyToFrame_EMAC()
00197 }
00198
00199 // check if ethernet controller is ready to accept the
00200 // frame we want to send
00201
00202 unsigned int Rdy4Tx(void)
00203 {
00204   return (1);   // the ethernet controller transmits much faster
00205 }               // than the CPU can load its buffers
00206
00207
00208 // writes a word in little-endian byte order to TX_BUFFER
00209 void WriteFrame_EMAC(unsigned short Data)
00210 {
00211   *tptr++ = Data;
00212 }
00213
00214 // copies bytes from MCU-memory to frame port
00215 // NOTES: * an odd number of byte may only be transfered
00216 //          if the frame is written to the end!
00217 //        * MCU-memory MUST start at word-boundary
00218
00219 void CopyToFrame_EMAC(void *Source, unsigned int Size)
00220 {
00221         EMAC_PACKETBUF_Type TxPack;
00222
00223         // Setup Tx Packet buffer
00224         // NXP: Added for compatibility with old style
00225         TxPack.ulDataLen = Size;
00226         TxPack.pbDataBuf = (uint32_t *)Source;
00227         EMAC_WritePacketBuffer(&TxPack);
00228         EMAC_UpdateTxProduceIndex();
00229 }
00230
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/EMAC.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/EMAC.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      LPC1768 Ethernet Definitions
00003  *----------------------------------------------------------------------------
00004  *      Name:    EMAC.H
00005  *      Purpose: LPC1768 EMAC hardware implementation definitions
00006  *----------------------------------------------------------------------------
00007  *      Copyright (c) 2006 KEIL - An ARM Company. All rights reserved.
00008  *---------------------------------------------------------------------------*/
00009
00010 #ifndef __EMAC_H
00011 #define __EMAC_H
00012
00013 #include "lpc17xx_emac.h"
00014
00015 #ifdef MCB_LPC_1768
00016 #define MYMAC_1         0x1E            /* our ethernet (MAC) address        */
00017 #define MYMAC_2         0x30            /* (MUST be unique in LAN!)          */
00018 #define MYMAC_3         0x6c
00019 #define MYMAC_4         0xa2
00020 #define MYMAC_5         0x45
00021 #define MYMAC_6         0x5e
00022 #elif defined(IAR_LPC_1768)
00023 /* Using IAR LPC1768 KickStart board */
00024 #define MYMAC_1         0x00            /* our ethernet (MAC) address        */
00025 #define MYMAC_2         0xFF            /* (MUST be unique in LAN!)          */
00026 #define MYMAC_3         0xFF
00027 #define MYMAC_4         0xFF
00028 #define MYMAC_5         0xFF
00029 #define MYMAC_6         0xFF
00030 #endif
00031
00032 // prototypes
00033 void           Init_EMAC(void);
00034 unsigned short ReadFrameBE_EMAC(void);
00035 void           CopyToFrame_EMAC(void *Source, unsigned int Size);
00036 void           CopyFromFrame_EMAC(void *Dest, unsigned short Size);
00037 void           DummyReadFrame_EMAC(unsigned short Size);
00038 unsigned short StartReadFrame(void);
00039 void           EndReadFrame(void);
00040 unsigned int   CheckFrameReceived(void);
00041 void           RequestSend(unsigned short FrameSize);
00042 unsigned int   Rdy4Tx(void);
00043
00044 #endif
00045
00046 /*----------------------------------------------------------------------------
00047  * end of file
00048  *---------------------------------------------------------------------------*/
00049
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/Retarget.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/Retarget.c
Go to the documentation of this file.
00001 /******************************************************************************/
00002 /* RETARGET.C: 'Retarget' layer for target-dependent low level functions      */
00003 /******************************************************************************/
00004 /* This file is part of the uVision/ARM development tools.                    */
00005 /* Copyright (c) 2005-2006 Keil Software. All rights reserved.                */
00006 /* This software may only be used under the terms of a valid, current,        */
00007 /* end user licence from KEIL for a compatible version of KEIL software       */
00008 /* development tools. Nothing else gives you the right to use this software.  */
00009 /******************************************************************************/
00010
00011 // This used for ARMCC compiler only
00012 #if defined ( __CC_ARM   )
00013
00014 #include <rt_misc.h>
00015
00016 #pragma import(__use_no_semihosting_swi)
00017
00018 void _ttywrch(int ch) {
00019   // Not used (No Output)
00020 }
00021
00022 void _sys_exit(int return_code) {
00023 label:  goto label;  /* endless loop */
00024 }
00025 #endif /* __CC_ARM */
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/Font_24x16.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/Font_24x16.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  * Name:    Font_24x16.h
00003  * Purpose: ASCII font characters (width 24 pixels, height 16 pixels)
00004  *----------------------------------------------------------------------------
00005  * This file is part of the uVision/ARM development tools.
00006  * This software may only be used under the terms of a valid, current,
00007  * end user licence from KEIL for a compatible version of KEIL software
00008  * development tools. Nothing else gives you the right to use this software.
00009  *
00010  * This software is supplied "AS IS" without warranties of any kind.
00011  *
00012  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00013  *----------------------------------------------------------------------------*/
00014
00015 #ifndef __FONT_24x16_H
00016 #define __FONT_24x16_H
00017
00018 #define CHAR_H      24                  /* Character Height (in pixels)       */
00019 #define CHAR_W      16                  /* Character Width (in pixels)        */
00020
00021 const uint16_t Font_24x16[] = {
00022   /* Space ' ' */
00023   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00024   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00025   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00026   /* '!' */
00027   0x0000, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
00028   0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0000, 0x0000,
00029   0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00030   /* '"' */
00031   0x0000, 0x0000, 0x00CC, 0x00CC, 0x00CC, 0x00CC, 0x00CC, 0x00CC,
00032   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00033   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00034   /* '#' */
00035   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0C60, 0x0C60,
00036   0x0C60, 0x0630, 0x0630, 0x1FFE, 0x1FFE, 0x0630, 0x0738, 0x0318,
00037   0x1FFE, 0x1FFE, 0x0318, 0x0318, 0x018C, 0x018C, 0x018C, 0x0000,
00038   /* '$' */
00039   0x0000, 0x0080, 0x03E0, 0x0FF8, 0x0E9C, 0x1C8C, 0x188C, 0x008C,
00040   0x0098, 0x01F8, 0x07E0, 0x0E80, 0x1C80, 0x188C, 0x188C, 0x189C,
00041   0x0CB8, 0x0FF0, 0x03E0, 0x0080, 0x0080, 0x0000, 0x0000, 0x0000,
00042   /* '%' */
00043   0x0000, 0x0000, 0x0000, 0x180E, 0x0C1B, 0x0C11, 0x0611, 0x0611,
00044   0x0311, 0x0311, 0x019B, 0x018E, 0x38C0, 0x6CC0, 0x4460, 0x4460,
00045   0x4430, 0x4430, 0x4418, 0x6C18, 0x380C, 0x0000, 0x0000, 0x0000,
00046   /* '&' */
00047   0x0000, 0x01E0, 0x03F0, 0x0738, 0x0618, 0x0618, 0x0330, 0x01F0,
00048   0x00F0, 0x00F8, 0x319C, 0x330E, 0x1E06, 0x1C06, 0x1C06, 0x3F06,
00049   0x73FC, 0x21F0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00050   /* ''' */
00051   0x0000, 0x0000, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C,
00052   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00053   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00054   /* '(' */
00055   0x0000, 0x0200, 0x0300, 0x0180, 0x00C0, 0x00C0, 0x0060, 0x0060,
00056   0x0030, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030,
00057   0x0060, 0x0060, 0x00C0, 0x00C0, 0x0180, 0x0300, 0x0200, 0x0000,
00058   /* ')' */
00059   0x0000, 0x0020, 0x0060, 0x00C0, 0x0180, 0x0180, 0x0300, 0x0300,
00060   0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600,
00061   0x0300, 0x0300, 0x0180, 0x0180, 0x00C0, 0x0060, 0x0020, 0x0000,
00062   /* '*' */
00063   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x00C0, 0x00C0,
00064   0x06D8, 0x07F8, 0x01E0, 0x0330, 0x0738, 0x0000, 0x0000, 0x0000,
00065   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00066   /* '+' */
00067   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0180, 0x0180,
00068   0x0180, 0x0180, 0x0180, 0x3FFC, 0x3FFC, 0x0180, 0x0180, 0x0180,
00069   0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00070   /* ',' */
00071   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00072   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00073   0x0000, 0x0180, 0x0180, 0x0100, 0x0100, 0x0080, 0x0000, 0x0000,
00074   /* '-' */
00075   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00076   0x0000, 0x0000, 0x0000, 0x0000, 0x07E0, 0x07E0, 0x0000, 0x0000,
00077   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00078   /* '.' */
00079   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00080   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00081   0x0000, 0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00082   /* '/' */
00083   0x0000, 0x0C00, 0x0C00, 0x0600, 0x0600, 0x0600, 0x0300, 0x0300,
00084   0x0300, 0x0380, 0x0180, 0x0180, 0x0180, 0x00C0, 0x00C0, 0x00C0,
00085   0x0060, 0x0060, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00086   /* '0' */
00087   0x0000, 0x03E0, 0x07F0, 0x0E38, 0x0C18, 0x180C, 0x180C, 0x180C,
00088   0x180C, 0x180C, 0x180C, 0x180C, 0x180C, 0x180C, 0x0C18, 0x0E38,
00089   0x07F0, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00090   /* '1' */
00091   0x0000, 0x0100, 0x0180, 0x01C0, 0x01F0, 0x0198, 0x0188, 0x0180,
00092   0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
00093   0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00094   /* '2' */
00095   0x0000, 0x03E0, 0x0FF8, 0x0C18, 0x180C, 0x180C, 0x1800, 0x1800,
00096   0x0C00, 0x0600, 0x0300, 0x0180, 0x00C0, 0x0060, 0x0030, 0x0018,
00097   0x1FFC, 0x1FFC, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00098   /* '3' */
00099   0x0000, 0x01E0, 0x07F8, 0x0E18, 0x0C0C, 0x0C0C, 0x0C00, 0x0600,
00100   0x03C0, 0x07C0, 0x0C00, 0x1800, 0x1800, 0x180C, 0x180C, 0x0C18,
00101   0x07F8, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00102   /* '4' */
00103   0x0000, 0x0C00, 0x0E00, 0x0F00, 0x0F00, 0x0D80, 0x0CC0, 0x0C60,
00104   0x0C60, 0x0C30, 0x0C18, 0x0C0C, 0x3FFC, 0x3FFC, 0x0C00, 0x0C00,
00105   0x0C00, 0x0C00, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00106   /* '5' */
00107   0x0000, 0x0FF8, 0x0FF8, 0x0018, 0x0018, 0x000C, 0x03EC, 0x07FC,
00108   0x0E1C, 0x1C00, 0x1800, 0x1800, 0x1800, 0x180C, 0x0C1C, 0x0E18,
00109   0x07F8, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00110   /* '6' */
00111   0x0000, 0x07C0, 0x0FF0, 0x1C38, 0x1818, 0x0018, 0x000C, 0x03CC,
00112   0x0FEC, 0x0E3C, 0x1C1C, 0x180C, 0x180C, 0x180C, 0x1C18, 0x0E38,
00113   0x07F0, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00114   /* '7' */
00115   0x0000, 0x1FFC, 0x1FFC, 0x0C00, 0x0600, 0x0600, 0x0300, 0x0380,
00116   0x0180, 0x01C0, 0x00C0, 0x00E0, 0x0060, 0x0060, 0x0070, 0x0030,
00117   0x0030, 0x0030, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00118   /* '8' */
00119   0x0000, 0x03E0, 0x07F0, 0x0E38, 0x0C18, 0x0C18, 0x0C18, 0x0638,
00120   0x07F0, 0x07F0, 0x0C18, 0x180C, 0x180C, 0x180C, 0x180C, 0x0C38,
00121   0x0FF8, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00122   /* '9' */
00123   0x0000, 0x03E0, 0x07F0, 0x0E38, 0x0C1C, 0x180C, 0x180C, 0x180C,
00124   0x1C1C, 0x1E38, 0x1BF8, 0x19E0, 0x1800, 0x0C00, 0x0C00, 0x0E1C,
00125   0x07F8, 0x01F0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00126   /* ':' */
00127   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0180, 0x0180,
00128   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00129   0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00130   /* ';' */
00131   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0180, 0x0180,
00132   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00133   0x0180, 0x0180, 0x0100, 0x0100, 0x0080, 0x0000, 0x0000, 0x0000,
00134   /* '<' */
00135   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00136   0x1000, 0x1C00, 0x0F80, 0x03E0, 0x00F8, 0x0018, 0x00F8, 0x03E0,
00137   0x0F80, 0x1C00, 0x1000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00138   /* '=' */
00139   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00140   0x1FF8, 0x0000, 0x0000, 0x0000, 0x1FF8, 0x0000, 0x0000, 0x0000,
00141   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00142   /* '>' */
00143   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00144   0x0008, 0x0038, 0x01F0, 0x07C0, 0x1F00, 0x1800, 0x1F00, 0x07C0,
00145   0x01F0, 0x0038, 0x0008, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00146   /* '?' */
00147   0x0000, 0x03E0, 0x0FF8, 0x0C18, 0x180C, 0x180C, 0x1800, 0x0C00,
00148   0x0600, 0x0300, 0x0180, 0x00C0, 0x00C0, 0x00C0, 0x0000, 0x0000,
00149   0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00150   /* '@' */
00151   0x0000, 0x0000, 0x07E0, 0x1818, 0x2004, 0x29C2, 0x4A22, 0x4411,
00152   0x4409, 0x4409, 0x4409, 0x2209, 0x1311, 0x0CE2, 0x4002, 0x2004,
00153   0x1818, 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00154   /* 'A' */
00155   0x0000, 0x0380, 0x0380, 0x06C0, 0x06C0, 0x06C0, 0x0C60, 0x0C60,
00156   0x1830, 0x1830, 0x1830, 0x3FF8, 0x3FF8, 0x701C, 0x600C, 0x600C,
00157   0xC006, 0xC006, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00158   /* 'B' */
00159   0x0000, 0x03FC, 0x0FFC, 0x0C0C, 0x180C, 0x180C, 0x180C, 0x0C0C,
00160   0x07FC, 0x0FFC, 0x180C, 0x300C, 0x300C, 0x300C, 0x300C, 0x180C,
00161   0x1FFC, 0x07FC, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00162   /* 'C' */
00163   0x0000, 0x07C0, 0x1FF0, 0x3838, 0x301C, 0x700C, 0x6006, 0x0006,
00164   0x0006, 0x0006, 0x0006, 0x0006, 0x0006, 0x6006, 0x700C, 0x301C,
00165   0x1FF0, 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00166   /* 'D' */
00167   0x0000, 0x03FE, 0x0FFE, 0x0E06, 0x1806, 0x1806, 0x3006, 0x3006,
00168   0x3006, 0x3006, 0x3006, 0x3006, 0x3006, 0x1806, 0x1806, 0x0E06,
00169   0x0FFE, 0x03FE, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00170   /* 'E' */
00171   0x0000, 0x3FFC, 0x3FFC, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C,
00172   0x1FFC, 0x1FFC, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C,
00173   0x3FFC, 0x3FFC, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00174   /* 'F' */
00175   0x0000, 0x3FF8, 0x3FF8, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018,
00176   0x1FF8, 0x1FF8, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018,
00177   0x0018, 0x0018, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00178   /* 'G' */
00179   0x0000, 0x0FE0, 0x3FF8, 0x783C, 0x600E, 0xE006, 0xC007, 0x0003,
00180   0x0003, 0xFE03, 0xFE03, 0xC003, 0xC007, 0xC006, 0xC00E, 0xF03C,
00181   0x3FF8, 0x0FE0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00182   /* 'H' */
00183   0x0000, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C,
00184   0x3FFC, 0x3FFC, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C,
00185   0x300C, 0x300C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00186   /* 'I' */
00187   0x0000, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
00188   0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
00189   0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00190   /* 'J' */
00191   0x0000, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600,
00192   0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0618, 0x0618, 0x0738,
00193   0x03F0, 0x01E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00194   /* 'K' */
00195   0x0000, 0x3006, 0x1806, 0x0C06, 0x0606, 0x0306, 0x0186, 0x00C6,
00196   0x0066, 0x0076, 0x00DE, 0x018E, 0x0306, 0x0606, 0x0C06, 0x1806,
00197   0x3006, 0x6006, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00198   /* 'L' */
00199   0x0000, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018,
00200   0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018,
00201   0x1FF8, 0x1FF8, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00202   /* 'M' */
00203   0x0000, 0xE00E, 0xF01E, 0xF01E, 0xF01E, 0xD836, 0xD836, 0xD836,
00204   0xD836, 0xCC66, 0xCC66, 0xCC66, 0xC6C6, 0xC6C6, 0xC6C6, 0xC6C6,
00205   0xC386, 0xC386, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00206   /* 'N' */
00207   0x0000, 0x300C, 0x301C, 0x303C, 0x303C, 0x306C, 0x306C, 0x30CC,
00208   0x30CC, 0x318C, 0x330C, 0x330C, 0x360C, 0x360C, 0x3C0C, 0x3C0C,
00209   0x380C, 0x300C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00210   /* 'O' */
00211   0x0000, 0x07E0, 0x1FF8, 0x381C, 0x700E, 0x6006, 0xC003, 0xC003,
00212   0xC003, 0xC003, 0xC003, 0xC003, 0xC003, 0x6006, 0x700E, 0x381C,
00213   0x1FF8, 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00214   /* 'P' */
00215   0x0000, 0x0FFC, 0x1FFC, 0x380C, 0x300C, 0x300C, 0x300C, 0x300C,
00216   0x180C, 0x1FFC, 0x07FC, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C,
00217   0x000C, 0x000C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00218   /* 'Q' */
00219   0x0000, 0x07E0, 0x1FF8, 0x381C, 0x700E, 0x6006, 0xE003, 0xC003,
00220   0xC003, 0xC003, 0xC003, 0xC003, 0xE007, 0x6306, 0x3F0E, 0x3C1C,
00221   0x3FF8, 0xF7E0, 0xC000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00222   /* 'R' */
00223   0x0000, 0x0FFE, 0x1FFE, 0x3806, 0x3006, 0x3006, 0x3006, 0x3806,
00224   0x1FFE, 0x07FE, 0x0306, 0x0606, 0x0C06, 0x1806, 0x1806, 0x3006,
00225   0x3006, 0x6006, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00226   /* 'S' */
00227   0x0000, 0x03E0, 0x0FF8, 0x0C1C, 0x180C, 0x180C, 0x000C, 0x001C,
00228   0x03F8, 0x0FE0, 0x1E00, 0x3800, 0x3006, 0x3006, 0x300E, 0x1C1C,
00229   0x0FF8, 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00230   /* 'T' */
00231   0x0000, 0x7FFE, 0x7FFE, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
00232   0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
00233   0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00234   /* 'U' */
00235   0x0000, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C,
00236   0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x1818,
00237   0x1FF8, 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00238   /* 'V' */
00239   0x0000, 0x6003, 0x3006, 0x3006, 0x3006, 0x180C, 0x180C, 0x180C,
00240   0x0C18, 0x0C18, 0x0E38, 0x0630, 0x0630, 0x0770, 0x0360, 0x0360,
00241   0x01C0, 0x01C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00242   /* 'W' */
00243   0x0000, 0x6003, 0x61C3, 0x61C3, 0x61C3, 0x3366, 0x3366, 0x3366,
00244   0x3366, 0x3366, 0x3366, 0x1B6C, 0x1B6C, 0x1B6C, 0x1A2C, 0x1E3C,
00245   0x0E38, 0x0E38, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00246   /* 'X' */
00247   0x0000, 0xE00F, 0x700C, 0x3018, 0x1830, 0x0C70, 0x0E60, 0x07C0,
00248   0x0380, 0x0380, 0x03C0, 0x06E0, 0x0C70, 0x1C30, 0x1818, 0x300C,
00249   0x600E, 0xE007, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00250   /* 'Y' */
00251   0x0000, 0xC003, 0x6006, 0x300C, 0x381C, 0x1838, 0x0C30, 0x0660,
00252   0x07E0, 0x03C0, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
00253   0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00254   /* 'Z' */
00255   0x0000, 0x7FFC, 0x7FFC, 0x6000, 0x3000, 0x1800, 0x0C00, 0x0600,
00256   0x0300, 0x0180, 0x00C0, 0x0060, 0x0030, 0x0018, 0x000C, 0x0006,
00257   0x7FFE, 0x7FFE, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00258   /* '[' */
00259   0x0000, 0x03E0, 0x03E0, 0x0060, 0x0060, 0x0060, 0x0060, 0x0060,
00260   0x0060, 0x0060, 0x0060, 0x0060, 0x0060, 0x0060, 0x0060, 0x0060,
00261   0x0060, 0x0060, 0x0060, 0x0060, 0x0060, 0x03E0, 0x03E0, 0x0000,
00262   /* '\' */
00263   0x0000, 0x0030, 0x0030, 0x0060, 0x0060, 0x0060, 0x00C0, 0x00C0,
00264   0x00C0, 0x01C0, 0x0180, 0x0180, 0x0180, 0x0300, 0x0300, 0x0300,
00265   0x0600, 0x0600, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00266   /* ']' */
00267   0x0000, 0x03E0, 0x03E0, 0x0300, 0x0300, 0x0300, 0x0300, 0x0300,
00268   0x0300, 0x0300, 0x0300, 0x0300, 0x0300, 0x0300, 0x0300, 0x0300,
00269   0x0300, 0x0300, 0x0300, 0x0300, 0x0300, 0x03E0, 0x03E0, 0x0000,
00270   /* '^' */
00271   0x0000, 0x0000, 0x01C0, 0x01C0, 0x0360, 0x0360, 0x0360, 0x0630,
00272   0x0630, 0x0C18, 0x0C18, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00273   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00274   /* '_' */
00275   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00276   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00277   0x0000, 0xFFFF, 0xFFFF, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00278   /* ''' */
00279   0x0000, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, 0x0000,
00280   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00281   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00282   /* 'a' */
00283   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03F0, 0x07F8,
00284   0x0C1C, 0x0C0C, 0x0F00, 0x0FF0, 0x0CF8, 0x0C0C, 0x0C0C, 0x0F1C,
00285   0x0FF8, 0x18F0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00286   /* 'b' */
00287   0x0000, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x03D8, 0x0FF8,
00288   0x0C38, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x0C38,
00289   0x0FF8, 0x03D8, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00290   /* 'c' */
00291   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x07F0,
00292   0x0E30, 0x0C18, 0x0018, 0x0018, 0x0018, 0x0018, 0x0C18, 0x0E30,
00293   0x07F0, 0x03C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00294   /* 'd' */
00295   0x0000, 0x1800, 0x1800, 0x1800, 0x1800, 0x1800, 0x1BC0, 0x1FF0,
00296   0x1C30, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1C30,
00297   0x1FF0, 0x1BC0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00298   /* 'e' */
00299   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x0FF0,
00300   0x0C30, 0x1818, 0x1FF8, 0x1FF8, 0x0018, 0x0018, 0x1838, 0x1C30,
00301   0x0FF0, 0x07C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00302   /* 'f' */
00303   0x0000, 0x0F80, 0x0FC0, 0x00C0, 0x00C0, 0x00C0, 0x07F0, 0x07F0,
00304   0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
00305   0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00306   /* 'g' */
00307   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0DE0, 0x0FF8,
00308   0x0E18, 0x0C0C, 0x0C0C, 0x0C0C, 0x0C0C, 0x0C0C, 0x0C0C, 0x0E18,
00309   0x0FF8, 0x0DE0, 0x0C00, 0x0C0C, 0x061C, 0x07F8, 0x01F0, 0x0000,
00310   /* 'h' */
00311   0x0000, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x07D8, 0x0FF8,
00312   0x1C38, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818,
00313   0x1818, 0x1818, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00314   /* 'i' */
00315   0x0000, 0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x00C0, 0x00C0,
00316   0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
00317   0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00318   /* 'j' */
00319   0x0000, 0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x00C0, 0x00C0,
00320   0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
00321   0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00F8, 0x0078, 0x0000,
00322   /* 'k' */
00323   0x0000, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, 0x0C0C, 0x060C,
00324   0x030C, 0x018C, 0x00CC, 0x006C, 0x00FC, 0x019C, 0x038C, 0x030C,
00325   0x060C, 0x0C0C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00326   /* 'l' */
00327   0x0000, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
00328   0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
00329   0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00330   /* 'm' */
00331   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x3C7C, 0x7EFF,
00332   0xE3C7, 0xC183, 0xC183, 0xC183, 0xC183, 0xC183, 0xC183, 0xC183,
00333   0xC183, 0xC183, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00334   /* 'n' */
00335   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0798, 0x0FF8,
00336   0x1C38, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818,
00337   0x1818, 0x1818, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00338   /* 'o' */
00339   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x0FF0,
00340   0x0C30, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x0C30,
00341   0x0FF0, 0x03C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00342   /* 'p' */
00343   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03D8, 0x0FF8,
00344   0x0C38, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x0C38,
00345   0x0FF8, 0x03D8, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0000,
00346   /* 'q' */
00347   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1BC0, 0x1FF0,
00348   0x1C30, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1C30,
00349   0x1FF0, 0x1BC0, 0x1800, 0x1800, 0x1800, 0x1800, 0x1800, 0x0000,
00350   /* 'r' */
00351   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x07B0, 0x03F0,
00352   0x0070, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030,
00353   0x0030, 0x0030, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00354   /* 's' */
00355   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03E0, 0x03F0,
00356   0x0E38, 0x0C18, 0x0038, 0x03F0, 0x07C0, 0x0C00, 0x0C18, 0x0E38,
00357   0x07F0, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00358   /* 't' */
00359   0x0000, 0x0000, 0x0080, 0x00C0, 0x00C0, 0x00C0, 0x07F0, 0x07F0,
00360   0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
00361   0x07C0, 0x0780, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00362   /* 'u' */
00363   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1818, 0x1818,
00364   0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1C38,
00365   0x1FF0, 0x19E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00366   /* 'v' */
00367   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x180C, 0x0C18,
00368   0x0C18, 0x0C18, 0x0630, 0x0630, 0x0630, 0x0360, 0x0360, 0x0360,
00369   0x01C0, 0x01C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00370   /* 'w' */
00371   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x41C1, 0x41C1,
00372   0x61C3, 0x6363, 0x6363, 0x6363, 0x3636, 0x3636, 0x3636, 0x1C1C,
00373   0x1C1C, 0x1C1C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00374   /* 'x' */
00375   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x381C, 0x1C38,
00376   0x0C30, 0x0660, 0x03C0, 0x03C0, 0x03C0, 0x03C0, 0x0660, 0x0C30,
00377   0x1C38, 0x381C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00378   /* 'y' */
00379   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x3018, 0x1830,
00380   0x1830, 0x1870, 0x0C60, 0x0C60, 0x0CE0, 0x06C0, 0x06C0, 0x0380,
00381   0x0380, 0x0380, 0x0180, 0x0180, 0x01C0, 0x00F0, 0x0070, 0x0000,
00382   /* 'z' */
00383   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1FFC, 0x1FFC,
00384   0x0C00, 0x0600, 0x0300, 0x0180, 0x00C0, 0x0060, 0x0030, 0x0018,
00385   0x1FFC, 0x1FFC, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00386   /* '{' */
00387   0x0000, 0x0300, 0x0180, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
00388   0x00C0, 0x0060, 0x0060, 0x0030, 0x0060, 0x0040, 0x00C0, 0x00C0,
00389   0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x0180, 0x0300, 0x0000, 0x0000,
00390   /* '|' */
00391   0x0000, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
00392   0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
00393   0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0000,
00394   /* '}' */
00395   0x0000, 0x0060, 0x00C0, 0x01C0, 0x0180, 0x0180, 0x0180, 0x0180,
00396   0x0180, 0x0300, 0x0300, 0x0600, 0x0300, 0x0100, 0x0180, 0x0180,
00397   0x0180, 0x0180, 0x0180, 0x0180, 0x00C0, 0x0060, 0x0000, 0x0000,
00398   /* '~' */
00399   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00400   0x10F0, 0x1FF8, 0x0F08, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00401   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00402   /* ' ' */
00403   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00404   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00405   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00406
00407   /* Special Symbols  starting at character 0x80 */
00408   /* Circle - Empty */
00409   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x0C30, 0x1008,
00410   0x2004, 0x2004, 0x4002, 0x4002, 0x4002, 0x4002, 0x4002, 0x2004,
00411   0x2004, 0x1008, 0x0C30, 0x03C0, 0x0000, 0x0000, 0x0000, 0x0000,
00412   /* Circle - Full */
00413   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x0FF0, 0x1FF8,
00414   0x3FFC, 0x3FFC, 0x7FFE, 0x7FFE, 0x7FFE, 0x7FFE, 0x7FFE, 0x3FFC,
00415   0x3FFC, 0x1FF8, 0x0FF0, 0x03C0, 0x0000, 0x0000, 0x0000, 0x0000,
00416   /* Square - Empty */
00417   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x07E0,
00418   0x0FF0, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x0FF0,
00419   0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00420   /* Square - Full */
00421   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x07E0,
00422   0x0FF0, 0x1FF8, 0x1FF8, 0x1FF8, 0x1FF8, 0x1FF8, 0x1FF8, 0x0FF0,
00423   0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00424   /* Up - Empty */
00425   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00426   0x0000, 0x0000, 0x0000, 0x0000, 0x0180, 0x03C0, 0x0660, 0x0C30,
00427   0x1818, 0x1818, 0x1FF8, 0x1FF8, 0x0000, 0x0000, 0x0000, 0x0000,
00428   /* Up - Full */
00429   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00430   0x0000, 0x0000, 0x0000, 0x0000, 0x0180, 0x03C0, 0x07E0, 0x0FF0,
00431   0x1FF8, 0x1FF8, 0x1FF8, 0x1FF8, 0x0000, 0x0000, 0x0000, 0x0000,
00432   /* Down - Empty */
00433   0x0000, 0x0000, 0x0000, 0x0000, 0x1FF8, 0x1FF8, 0x1818, 0x1818,
00434   0x0C30, 0x0660, 0x03C0, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000,
00435   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00436   /* Down - Full */
00437   0x0000, 0x0000, 0x0000, 0x0000, 0x1FF8, 0x1FF8, 0x1FF8, 0x1FF8,
00438   0x0FF0, 0x07E0, 0x03C0, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000,
00439   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00440   /* Left - Empty */
00441   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x01E0,
00442   0x01F0, 0x0198, 0x018C, 0x0186, 0x0186, 0x018C, 0x0198, 0x01F0,
00443   0x01E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00444   /* Left - Full */
00445   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x01E0,
00446   0x01F0, 0x01F8, 0x01FC, 0x01FE, 0x01FE, 0x01FC, 0x01F8, 0x01F0,
00447   0x01E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00448   /* Right - Empty */
00449   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0780,
00450   0x0F80, 0x1980, 0x3180, 0x6180, 0x6180, 0x3180, 0x1980, 0x0F80,
00451   0x0780, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00452   /* Right - Full */
00453   0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0780,
00454   0x0F80, 0x1F80, 0x3F80, 0x7F80, 0x7F80, 0x3F80, 0x1F80, 0x0F80,
00455   0x0780, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00456   /* Wait - Empty */
00457   0x0000, 0x01C0, 0x0220, 0x0220, 0x0140, 0x0630, 0x0808, 0x0808,
00458   0x0808, 0x0808, 0x0808, 0x0808, 0x0808, 0x0220, 0x0220, 0x0220,
00459   0x0220, 0x0220, 0x0220, 0x0220, 0x0220, 0x0220, 0x0220, 0x0000,
00460   /* Wait - Full */
00461   0x0000, 0x01C0, 0x03E0, 0x03E0, 0x01C0, 0x07F0, 0x0DD8, 0x0DD8,
00462   0x0DD8, 0x0DD8, 0x0DD8, 0x0DD8, 0x0DD8, 0x0360, 0x0360, 0x0360,
00463   0x0360, 0x0360, 0x0360, 0x0360, 0x0360, 0x0360, 0x0360, 0x0000,
00464   /* Walk - Empty */
00465   0x0000, 0x01C0, 0x0220, 0x0220, 0x0140, 0x0630, 0x0808, 0x0808,
00466   0x0808, 0x1004, 0x2002, 0x2002, 0x0140, 0x0220, 0x0220, 0x0410,
00467   0x0808, 0x0808, 0x1004, 0x1004, 0x2004, 0x4004, 0x0000, 0x0000,
00468   /* Walk - Full */
00469   0x0000, 0x01C0, 0x03E0, 0x03E0, 0x01C0, 0x07F0, 0x0DD8, 0x0DD8,
00470   0x0DD8, 0x19CC, 0x31C6, 0x61C2, 0x01C0, 0x0360, 0x0360, 0x0670,
00471   0x0C38, 0x0C18, 0x180C, 0x180C, 0x300C, 0x600C, 0x0000, 0x0000,
00472 };
00473
00474 #endif /* __FONT_24x16_H */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/GLCD.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/GLCD.h
Go to the documentation of this file.
00001 /******************************************************************************/
00002 /* GLCD.h: Graphic LCD function prototypes and defines                        */
00003 /******************************************************************************/
00004 /* This file is part of the uVision/ARM development tools.                    */
00005 /* Copyright (c) 2005-2009 Keil Software. All rights reserved.                */
00006 /* This software may only be used under the terms of a valid, current,        */
00007 /* end user licence from KEIL for a compatible version of KEIL software       */
00008 /* development tools. Nothing else gives you the right to use this software.  */
00009 /******************************************************************************/
00010
00011 #ifndef _GLCD_H
00012 #define _GLCD_H
00013
00014 /*------------------------------------------------------------------------------
00015   Color coding
00016   GLCD is coded:   15..11 red, 10..5 green, 4..0 blue  (unsigned short)  GLCD_R5, GLCD_G6, GLCD_B5
00017   original coding: 17..12 red, 11..6 green, 5..0 blue                    ORG_R6,  ORG_G6,  ORG_B6
00018
00019   ORG_R1..5 = GLCD_R0..4,  ORG_R0 = GLCD_R4
00020   ORG_G0..5 = GLCD_G0..5,
00021   ORG_B1..5 = GLCD_B0..4,  ORG_B0 = GLCD_B4
00022  *----------------------------------------------------------------------------*/
00023
00024 /* GLCD RGB color definitions                                                 */
00025 #define Black           0x0000          /*   0,   0,   0 */
00026 #define Navy            0x000F      /*   0,   0, 128 */
00027 #define DarkGreen       0x03E0      /*   0, 128,   0 */
00028 #define DarkCyan        0x03EF      /*   0, 128, 128 */
00029 #define Maroon          0x7800      /* 128,   0,   0 */
00030 #define Purple          0x780F      /* 128,   0, 128 */
00031 #define Olive           0x7BE0      /* 128, 128,   0 */
00032 #define LightGrey       0xC618      /* 192, 192, 192 */
00033 #define DarkGrey        0x7BEF      /* 128, 128, 128 */
00034 #define Blue            0x001F      /*   0,   0, 255 */
00035 #define Green           0x07E0      /*   0, 255,   0 */
00036 #define Cyan            0x07FF      /*   0, 255, 255 */
00037 #define Red             0xF800      /* 255,   0,   0 */
00038 #define Magenta         0xF81F      /* 255,   0, 255 */
00039 #define Yellow          0xFFE0      /* 255, 255, 0   */
00040 #define White           0xFFFF      /* 255, 255, 255 */
00041
00042
00043 extern void GLCD_Init           (void);
00044 extern void GLCD_WindowMax      (void);
00045 extern void GLCD_PutPixel       (unsigned int x, unsigned int y);
00046 extern void GLCD_SetTextColor   (unsigned short color);
00047 extern void GLCD_SetBackColor   (unsigned short color);
00048 extern void GLCD_Clear          (unsigned short color);
00049 extern void GLCD_DrawChar       (unsigned int x, unsigned int y, unsigned short *c);
00050 extern void GLCD_DisplayChar    (unsigned int ln, unsigned int col, unsigned char  c);
00051 extern void GLCD_DisplayString  (unsigned int ln, unsigned int col, unsigned char *s);
00052 extern void GLCD_ClearLn        (unsigned int ln);
00053 extern void GLCD_Bargraph       (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned int val);
00054 extern void GLCD_Bitmap         (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bitmap);
00055 extern void GLCD_Bmp            (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bmp);
00056
00057 #endif /* _GLCD_H */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/GLCD_SPI_LPC1700.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/GLCD_SPI_LPC1700.c
Go to the documentation of this file.
00001 /******************************************************************************/
00002 /* GLCD_SPI_LPC1700.c: LPC1700 low level Graphic LCD (320x240 pixels) driven  */
00003 /*                     with SPI functions                                     */
00004 /******************************************************************************/
00005 /* This file is part of the uVision/ARM development tools.                    */
00006 /* Copyright (c) 2005-2009 Keil Software. All rights reserved.                */
00007 /* This software may only be used under the terms of a valid, current,        */
00008 /* end user licence from KEIL for a compatible version of KEIL software       */
00009 /* development tools. Nothing else gives you the right to use this software.  */
00010 /******************************************************************************/
00011
00012
00013 #include <lpc17xx.h>
00014 #include "GLCD.h"
00015 #include "Font_24x16.h"
00016
00017 /*********************** Hardware specific configuration **********************/
00018
00019 /* SPI Interface: SPI3
00020
00021    PINS:
00022    - CS     = P0.6 (GPIO pin)
00023    - RS     = GND
00024    - WR/SCK = P0.7 (SCK1)
00025    - RD     = GND
00026    - SDO    = P0.8 (MISO1)
00027    - SDI    = P0.9 (MOSI1)                                                    */
00028
00029 #define PIN_CS      (1 << 6)
00030
00031 /* SPI_SR - bit definitions                                                   */
00032 #define TFE         0x01
00033 #define RNE         0x04
00034 #define BSY         0x10
00035
00036 /*------------------------- Speed dependant settings -------------------------*/
00037
00038 /* If processor works on high frequency delay has to be increased, it can be
00039    increased by factor 2^N by this constant                                   */
00040 #define DELAY_2N    18
00041
00042 /*---------------------- Graphic LCD size definitions ------------------------*/
00043
00044 #define WIDTH       320                 /* Screen Width (in pixels)           */
00045 #define HEIGHT      240                 /* Screen Hight (in pixels)           */
00046 #define BPP         16                  /* Bits per pixel                     */
00047 #define BYPP        ((BPP+7)/8)         /* Bytes per pixel                    */
00048
00049 /*--------------- Graphic LCD interface hardware definitions -----------------*/
00050
00051 /* Pin CS setting to 0 or 1                                                   */
00052 #define LCD_CS(x)   ((x) ? (LPC_GPIO0->FIOSET = PIN_CS) : (LPC_GPIO0->FIOCLR = PIN_CS));
00053
00054 #define SPI_START   (0x70)              /* Start byte for SPI transfer        */
00055 #define SPI_RD      (0x01)              /* WR bit 1 within start              */
00056 #define SPI_WR      (0x00)              /* WR bit 0 within start              */
00057 #define SPI_DATA    (0x02)              /* RS bit 1 within start byte         */
00058 #define SPI_INDEX   (0x00)              /* RS bit 0 within start byte         */
00059
00060 /*---------------------------- Global variables ------------------------------*/
00061
00062 /******************************************************************************/
00063 static volatile unsigned short TextColor = Black, BackColor = White;
00064
00065
00066 /************************ Local auxiliary functions ***************************/
00067
00068 /*******************************************************************************
00069 * Delay in while loop cycles                                                   *
00070 *   Parameter:    cnt:    number of while cycles to delay                      *
00071 *   Return:                                                                    *
00072 *******************************************************************************/
00073
00074 static void delay (int cnt) {
00075
00076   cnt <<= DELAY_2N;
00077   while (cnt--);
00078 }
00079
00080
00081 /*******************************************************************************
00082 * Send 1 byte over serial communication                                        *
00083 *   Parameter:    byte:   byte to be sent                                      *
00084 *   Return:               byte read while sending                              *
00085 *******************************************************************************/
00086
00087 static __INLINE unsigned char spi_send (unsigned char byte) {
00088
00089   LPC_SSP1->DR = byte;
00090   while (!(LPC_SSP1->SR & RNE));        /* Wait for send to finish            */
00091   return (LPC_SSP1->DR);
00092 }
00093
00094
00095 /*******************************************************************************
00096 * Write command to LCD controller                                              *
00097 *   Parameter:    c:      command to be written                                *
00098 *   Return:                                                                    *
00099 *******************************************************************************/
00100
00101 static __INLINE void wr_cmd (unsigned char c) {
00102
00103   LCD_CS(0)
00104   spi_send(SPI_START | SPI_WR | SPI_INDEX);   /* Write : RS = 0, RW = 0       */
00105   spi_send(0);
00106   spi_send(c);
00107   LCD_CS(1)
00108 }
00109
00110
00111 /*******************************************************************************
00112 * Write data to LCD controller                                                 *
00113 *   Parameter:    c:      data to be written                                   *
00114 *   Return:                                                                    *
00115 *******************************************************************************/
00116
00117 static __INLINE void wr_dat (unsigned short c) {
00118
00119   LCD_CS(0)
00120   spi_send(SPI_START | SPI_WR | SPI_DATA);    /* Write : RS = 1, RW = 0       */
00121   spi_send((c >>   8));                       /* Write D8..D15                */
00122   spi_send((c & 0xFF));                       /* Write D0..D7                 */
00123   LCD_CS(1)
00124 }
00125
00126
00127 /*******************************************************************************
00128 * Start of data writing to LCD controller                                      *
00129 *   Parameter:                                                                 *
00130 *   Return:                                                                    *
00131 *******************************************************************************/
00132
00133 static __INLINE void wr_dat_start (void) {
00134
00135   LCD_CS(0)
00136   spi_send(SPI_START | SPI_WR | SPI_DATA);    /* Write : RS = 1, RW = 0       */
00137 }
00138
00139
00140 /*******************************************************************************
00141 * Stop of data writing to LCD controller                                       *
00142 *   Parameter:                                                                 *
00143 *   Return:                                                                    *
00144 *******************************************************************************/
00145
00146 static __INLINE void wr_dat_stop (void) {
00147
00148   LCD_CS(1)
00149 }
00150
00151
00152 /*******************************************************************************
00153 * Data writing to LCD controller                                               *
00154 *   Parameter:    c:      data to be written                                   *
00155 *   Return:                                                                    *
00156 *******************************************************************************/
00157
00158 static __INLINE void wr_dat_only (unsigned short c) {
00159
00160   spi_send((c >>   8));                       /* Write D8..D15                */
00161   spi_send((c & 0xFF));                       /* Write D0..D7                 */
00162 }
00163
00164
00165 /*******************************************************************************
00166 * Read data from LCD controller                                                *
00167 *   Parameter:                                                                 *
00168 *   Return:               read data                                            *
00169 *******************************************************************************/
00170
00171 static __INLINE unsigned short rd_dat (void) {
00172   unsigned short val = 0;
00173
00174   LCD_CS(0)
00175   spi_send(SPI_START | SPI_RD | SPI_DATA);    /* Read: RS = 1, RW = 1         */
00176   spi_send(0);                                /* Dummy read                   */
00177   val   = spi_send(0);                        /* Read D8..D15                 */
00178   val <<= 8;
00179   val  |= spi_send(0);                        /* Read D0..D7                  */
00180   LCD_CS(1)
00181   return (val);
00182 }
00183
00184 /*******************************************************************************
00185 * Write to LCD register                                                        *
00186 *   Parameter:    reg:    register to be read                                  *
00187 *                 val:    value to write to register                           *
00188 *******************************************************************************/
00189
00190 static __INLINE void wr_reg (unsigned char reg, unsigned short val) {
00191
00192   wr_cmd(reg);
00193   wr_dat(val);
00194 }
00195
00196
00197 /*******************************************************************************
00198 * Read from LCD register                                                       *
00199 *   Parameter:    reg:    register to be read                                  *
00200 *   Return:               value read from register                             *
00201 *******************************************************************************/
00202
00203 static unsigned short rd_reg (unsigned char reg) {
00204
00205   wr_cmd(reg);
00206   return (rd_dat());
00207 }
00208
00209
00210 /************************ Exported functions **********************************/
00211
00212 /*******************************************************************************
00213 * Initialize the Graphic LCD controller                                        *
00214 *   Parameter:                                                                 *
00215 *   Return:                                                                    *
00216 *******************************************************************************/
00217
00218 void GLCD_Init (void) {
00219   static unsigned short driverCode;
00220
00221   /* Enable clock for SSP1, clock = CCLK / 2                                  */
00222   LPC_SC->PCONP       |= 0x00000400;
00223   LPC_SC->PCLKSEL0    |= 0x00200000;
00224
00225   /* Configure the LCD Control pins                                           */
00226   LPC_PINCON->PINSEL9 &= 0xF0FFFFFF;
00227   LPC_GPIO4->FIODIR   |= 0x30000000;
00228   LPC_GPIO4->FIOSET    = 0x20000000;
00229
00230   /* SSEL1 is GPIO output set to high                                         */
00231   LPC_GPIO0->FIODIR   |= 0x00000040;
00232   LPC_GPIO0->FIOSET    = 0x00000040;
00233   LPC_PINCON->PINSEL0 &= 0xFFF03FFF;
00234   LPC_PINCON->PINSEL0 |= 0x000A8000;
00235
00236   /* Enable SPI in Master Mode, CPOL=1, CPHA=1                                */
00237   /* Max. 25 MBit used for Data Transfer @ 100MHz                              */
00238   LPC_SSP1->CR0        = 0xC7;
00239   LPC_SSP1->CPSR       = 0x02;
00240   LPC_SSP1->CR1        = 0x02;
00241
00242   delay(5);                             /* Delay 50 ms                        */
00243   driverCode = rd_reg(0x00);
00244
00245   /* Start Initial Sequence --------------------------------------------------*/
00246   wr_reg(0x01, 0x0100);                 /* Set SS bit                         */
00247   wr_reg(0x02, 0x0700);                 /* Set 1 line inversion               */
00248   wr_reg(0x04, 0x0000);                 /* Resize register                    */
00249   wr_reg(0x08, 0x0207);                 /* 2 lines front, 7 back porch        */
00250   wr_reg(0x09, 0x0000);                 /* Set non-disp area refresh cyc ISC  */
00251   wr_reg(0x0A, 0x0000);                 /* FMARK function                     */
00252   wr_reg(0x0C, 0x0000);                 /* RGB interface setting              */
00253   wr_reg(0x0D, 0x0000);                 /* Frame marker Position              */
00254   wr_reg(0x0F, 0x0000);                 /* RGB interface polarity             */
00255
00256   /* Power On sequence -------------------------------------------------------*/
00257   wr_reg(0x10, 0x0000);                 /* Reset Power Control 1              */
00258   wr_reg(0x11, 0x0000);                 /* Reset Power Control 2              */
00259   wr_reg(0x12, 0x0000);                 /* Reset Power Control 3              */
00260   wr_reg(0x13, 0x0000);                 /* Reset Power Control 4              */
00261   delay(20);                            /* Discharge cap power voltage (200ms)*/
00262   wr_reg(0x10, 0x12B0);                 /* SAP, BT[3:0], AP, DSTB, SLP, STB   */
00263   wr_reg(0x11, 0x0007);                 /* DC1[2:0], DC0[2:0], VC[2:0]        */
00264   delay(5);                             /* Delay 50 ms                        */
00265   wr_reg(0x12, 0x01BD);                 /* VREG1OUT voltage                   */
00266   delay(5);                             /* Delay 50 ms                        */
00267   wr_reg(0x13, 0x1400);                 /* VDV[4:0] for VCOM amplitude        */
00268   wr_reg(0x29, 0x000E);                 /* VCM[4:0] for VCOMH                 */
00269   delay(5);                             /* Delay 50 ms                        */
00270   wr_reg(0x20, 0x0000);                 /* GRAM horizontal Address            */
00271   wr_reg(0x21, 0x0000);                 /* GRAM Vertical Address              */
00272
00273   /* Adjust the Gamma Curve --------------------------------------------------*/
00274   if (driverCode == 0x5408) {           /* LCD with touch                     */
00275     wr_reg(0x30, 0x0B0D);
00276     wr_reg(0x31, 0x1923);
00277     wr_reg(0x32, 0x1C26);
00278     wr_reg(0x33, 0x261C);
00279     wr_reg(0x34, 0x2419);
00280     wr_reg(0x35, 0x0D0B);
00281     wr_reg(0x36, 0x1006);
00282     wr_reg(0x37, 0x0610);
00283     wr_reg(0x38, 0x0706);
00284     wr_reg(0x39, 0x0304);
00285     wr_reg(0x3A, 0x0E05);
00286     wr_reg(0x3B, 0x0E01);
00287     wr_reg(0x3C, 0x010E);
00288     wr_reg(0x3D, 0x050E);
00289     wr_reg(0x3E, 0x0403);
00290     wr_reg(0x3F, 0x0607);
00291   }
00292   if (driverCode == 0xC990) {           /* LCD without touch                  */
00293     wr_reg(0x30, 0x0006);
00294     wr_reg(0x31, 0x0101);
00295     wr_reg(0x32, 0x0003);
00296     wr_reg(0x35, 0x0106);
00297     wr_reg(0x36, 0x0B02);
00298     wr_reg(0x37, 0x0302);
00299     wr_reg(0x38, 0x0707);
00300     wr_reg(0x39, 0x0007);
00301     wr_reg(0x3C, 0x0600);
00302     wr_reg(0x3D, 0x020B);
00303   }
00304
00305  /* Set GRAM area -----------------------------------------------------------*/
00306   wr_reg(0x50, 0x0000);                 /* Horizontal GRAM Start Address      */
00307   wr_reg(0x51, (HEIGHT-1));             /* Horizontal GRAM End   Address      */
00308   wr_reg(0x52, 0x0000);                 /* Vertical   GRAM Start Address      */
00309   wr_reg(0x53, (WIDTH-1));              /* Vertical   GRAM End   Address      */
00310   wr_reg(0x60, 0xA700);                 /* Gate Scan Line                     */
00311   if (driverCode == 0x5408)             /* LCD with touch                     */
00312     wr_reg(0x60, 0xA700);               /* Gate Scan Line                     */
00313   if (driverCode == 0xC990)             /* LCD without touch                  */
00314     wr_reg(0x60, 0x2700);               /* Gate Scan Line                     */
00315   wr_reg(0x61, 0x0001);                 /* NDL,VLE, REV                       */
00316   wr_reg(0x6A, 0x0000);                 /* Set scrolling line                 */
00317
00318   /* Partial Display Control -------------------------------------------------*/
00319   wr_reg(0x80, 0x0000);
00320   wr_reg(0x81, 0x0000);
00321   wr_reg(0x82, 0x0000);
00322   wr_reg(0x83, 0x0000);
00323   wr_reg(0x84, 0x0000);
00324   wr_reg(0x85, 0x0000);
00325
00326   /* Panel Control -----------------------------------------------------------*/
00327   wr_reg(0x90, 0x0010);
00328   wr_reg(0x92, 0x0000);
00329   wr_reg(0x93, 0x0003);
00330   wr_reg(0x95, 0x0110);
00331   wr_reg(0x97, 0x0000);
00332   wr_reg(0x98, 0x0000);
00333
00334   /* Set GRAM write direction
00335      I/D=10 (Horizontal : increment, Vertical : increment)
00336      AM=1   (address is updated in vertical writing direction)                */
00337   wr_reg(0x03, 0x1038);
00338
00339   wr_reg(0x07, 0x0137);                 /* 262K color and display ON          */
00340   LPC_GPIO4->FIOSET = 0x10000000;
00341 }
00342
00343
00344 /*******************************************************************************
00345 * Set draw window region to whole screen                                       *
00346 *   Parameter:                                                                 *
00347 *   Return:                                                                    *
00348 *******************************************************************************/
00349
00350 void GLCD_WindowMax (void) {
00351
00352   wr_reg(0x50, 0);                      /* Horizontal GRAM Start Address      */
00353   wr_reg(0x51, HEIGHT-1);               /* Horizontal GRAM End   Address (-1) */
00354   wr_reg(0x52, 0);                      /* Vertical   GRAM Start Address      */
00355   wr_reg(0x53, WIDTH-1);                /* Vertical   GRAM End   Address (-1) */
00356 }
00357
00358
00359 /*******************************************************************************
00360 * Draw a pixel in foreground color                                             *
00361 *   Parameter:      x:        horizontal position                              *
00362 *                   y:        vertical position                                *
00363 *   Return:                                                                    *
00364 *******************************************************************************/
00365
00366 void GLCD_PutPixel (unsigned int x, unsigned int y) {
00367
00368   wr_reg(0x20, y);
00369   wr_reg(0x21, WIDTH-1-x);
00370   wr_cmd(0x22);
00371   wr_dat(TextColor);
00372 }
00373
00374
00375 /*******************************************************************************
00376 * Set foreground color                                                         *
00377 *   Parameter:      color:    foreground color                                 *
00378 *   Return:                                                                    *
00379 *******************************************************************************/
00380
00381 void GLCD_SetTextColor (unsigned short color) {
00382
00383   TextColor = color;
00384 }
00385
00386
00387 /*******************************************************************************
00388 * Set background color                                                         *
00389 *   Parameter:      color:    background color                                 *
00390 *   Return:                                                                    *
00391 *******************************************************************************/
00392
00393 void GLCD_SetBackColor (unsigned short color) {
00394
00395   BackColor = color;
00396 }
00397
00398
00399 /*******************************************************************************
00400 * Clear display                                                                *
00401 *   Parameter:      color:    display clearing color                           *
00402 *   Return:                                                                    *
00403 *******************************************************************************/
00404
00405 void GLCD_Clear (unsigned short color) {
00406   unsigned int   i;
00407
00408   GLCD_WindowMax();
00409
00410   wr_reg(0x20, 0);
00411   wr_reg(0x21, 0);
00412   wr_cmd(0x22);
00413   wr_dat_start();
00414   for(i = 0; i < (WIDTH*HEIGHT); i++)
00415     wr_dat_only(color);
00416   wr_dat_stop();
00417 }
00418
00419
00420 /*******************************************************************************
00421 * Draw character on given position                                             *
00422 *   Parameter:      x:        horizontal position                              *
00423 *                   y:        vertical position                                *
00424 *                   c:        pointer to character bitmap                      *
00425 *   Return:                                                                    *
00426 *******************************************************************************/
00427
00428 void GLCD_DrawChar (unsigned int x, unsigned int y, unsigned short *c) {
00429   int idx = 0, i, j;
00430
00431   x = WIDTH-x-CHAR_W;
00432   wr_reg(0x50, y);                      /* Horizontal GRAM Start Address      */
00433   wr_reg(0x51, y+CHAR_H-1);             /* Horizontal GRAM End   Address (-1) */
00434   wr_reg(0x52, x);                      /* Vertical   GRAM Start Address      */
00435   wr_reg(0x53, x+CHAR_W-1);             /* Vertical   GRAM End   Address (-1) */
00436
00437   wr_reg(0x20, y);
00438   wr_reg(0x21, x);
00439   wr_cmd(0x22);
00440   wr_dat_start();
00441   for (j = 0; j < CHAR_H; j++) {
00442     for (i = CHAR_W-1; i >= 0; i--) {
00443       if((c[idx] & (1 << i)) == 0x00) {
00444         wr_dat_only(BackColor);
00445       } else {
00446         wr_dat_only(TextColor);
00447       }
00448     }
00449     c++;
00450   }
00451   wr_dat_stop();
00452 }
00453
00454
00455 /*******************************************************************************
00456 * Disply character on given line                                               *
00457 *   Parameter:      ln:       line number                                      *
00458 *                   col:      column number                                    *
00459 *                   c:        ascii character                                  *
00460 *   Return:                                                                    *
00461 *******************************************************************************/
00462
00463 void GLCD_DisplayChar (unsigned int ln, unsigned int col, unsigned char c) {
00464
00465   c -= 32;
00466   GLCD_DrawChar(col * CHAR_W, ln * CHAR_H, (unsigned short *)&Font_24x16[c * CHAR_H]);
00467 }
00468
00469
00470 /*******************************************************************************
00471 * Disply string on given line                                                  *
00472 *   Parameter:      ln:       line number                                      *
00473 *                   col:      column number                                    *
00474 *                   s:        pointer to string                                *
00475 *   Return:                                                                    *
00476 *******************************************************************************/
00477
00478 void GLCD_DisplayString (unsigned int ln, unsigned int col, unsigned char *s) {
00479
00480   GLCD_WindowMax();
00481   while (*s) {
00482     GLCD_DisplayChar(ln, col++, *s++);
00483   }
00484 }
00485
00486
00487 /*******************************************************************************
00488 * Clear given line                                                             *
00489 *   Parameter:      ln:       line number                                      *
00490 *   Return:                                                                    *
00491 *******************************************************************************/
00492
00493 void GLCD_ClearLn (unsigned int ln) {
00494
00495   GLCD_WindowMax();
00496   GLCD_DisplayString(ln, 0, "                    ");
00497 }
00498
00499 /*******************************************************************************
00500 * Draw bargraph                                                                *
00501 *   Parameter:      x:        horizontal position                              *
00502 *                   y:        vertical position                                *
00503 *                   w:        maximum width of bargraph (in pixels)            *
00504 *                   val:      value of active bargraph (in 1/1024)             *
00505 *   Return:                                                                    *
00506 *******************************************************************************/
00507
00508 void GLCD_Bargraph (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned int val) {
00509   int i,j;
00510
00511   x = WIDTH-x-w;
00512   wr_reg(0x50, y);                      /* Horizontal GRAM Start Address      */
00513   wr_reg(0x51, y+CHAR_H-1);             /* Horizontal GRAM End   Address (-1) */
00514   wr_reg(0x52, x);                      /* Vertical   GRAM Start Address      */
00515   wr_reg(0x53, x+w-1);                  /* Vertical   GRAM End   Address (-1) */
00516
00517   val = (val * w) >> 10;                /* Scale value for 24x12 characters   */
00518   wr_reg(0x20, y);
00519   wr_reg(0x21, x);
00520   wr_cmd(0x22);
00521   wr_dat_start();
00522   for (i = 0; i < h; i++) {
00523     for (j = w-1; j >= 0; j--) {
00524       if(j >= val) {
00525         wr_dat_only(BackColor);
00526       } else {
00527         wr_dat_only(TextColor);
00528       }
00529     }
00530   }
00531   wr_dat_stop();
00532 }
00533
00534
00535 /*******************************************************************************
00536 * Display graphical bitmap image at position x horizontally and y vertically   *
00537 * (This function is optimized for 16 bits per pixel format, it has to be       *
00538 *  adapted for any other bits per pixel format)                                *
00539 *   Parameter:      x:        horizontal position                              *
00540 *                   y:        vertical position                                *
00541 *                   w:        width of bitmap                                  *
00542 *                   h:        height of bitmap                                 *
00543 *                   bitmap:   address at which the bitmap data resides         *
00544 *   Return:                                                                    *
00545 *******************************************************************************/
00546
00547 void GLCD_Bitmap (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bitmap) {
00548   unsigned int    i, j;
00549   unsigned short *bitmap_ptr = (unsigned short *)bitmap;
00550
00551   x = WIDTH-x-w;
00552   wr_reg(0x50, y);                      /* Horizontal GRAM Start Address      */
00553   wr_reg(0x51, y+h-1);                  /* Horizontal GRAM End   Address (-1) */
00554   wr_reg(0x52, x);                      /* Vertical   GRAM Start Address      */
00555   wr_reg(0x53, x+w-1);                  /* Vertical   GRAM End   Address (-1) */
00556
00557   wr_reg(0x20, y);
00558   wr_reg(0x21, x);
00559   wr_cmd(0x22);
00560   wr_dat_start();
00561   for (j = 0; j < h; j++) {
00562     bitmap_ptr += w-1;
00563     for (i = 0; i < w; i++) {
00564       wr_dat_only(*bitmap_ptr--);
00565     }
00566     bitmap_ptr += w+1;
00567   }
00568   wr_dat_stop();
00569 }
00570
00571
00572 /*******************************************************************************
00573 * Display graphical bmp file image at position x horizontally and y vertically *
00574 * (This function is optimized for 16 bits per pixel format, it has to be       *
00575 *  adapted for any other bits per pixel format)                                *
00576 *   Parameter:      x:        horizontal position                              *
00577 *                   y:        vertical position                                *
00578 *                   w:        width of bitmap                                  *
00579 *                   h:        height of bitmap                                 *
00580 *                   bmp:      address at which the bmp data resides            *
00581 *   Return:                                                                    *
00582 *******************************************************************************/
00583
00584 void GLCD_Bmp (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bmp) {
00585   unsigned int    i, j;
00586   unsigned short *bitmap_ptr = (unsigned short *)bmp;
00587
00588   x = WIDTH-x-w;
00589   wr_reg(0x50, y);                      /* Horizontal GRAM Start Address      */
00590   wr_reg(0x51, y+h-1);                  /* Horizontal GRAM End   Address (-1) */
00591   wr_reg(0x52, x);                      /* Vertical   GRAM Start Address      */
00592   wr_reg(0x53, x+w-1);                  /* Vertical   GRAM End   Address (-1) */
00593
00594   wr_reg(0x20, y);
00595   wr_reg(0x21, x);
00596   wr_cmd(0x22);
00597   wr_dat_start();
00598   bitmap_ptr += (h*w)-1;
00599   for (j = 0; j < h; j++) {
00600     for (i = 0; i < w; i++) {
00601       wr_dat_only(*bitmap_ptr--);
00602     }
00603   }
00604   wr_dat_stop();
00605 }
00606
00607 /******************************************************************************/
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Flash_2_Ram_Test/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Flash_2_Ram_Test/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/GPDMA_Sleep/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/GPDMA_Sleep/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Link_list/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Link_list/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Ram_2_Ram_Test/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Ram_2_Ram_Test/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/GPIO_Interrupt/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/GPIO_Interrupt/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/LedBlinky/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/LedBlinky/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Master_Slave_Interrupt/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Master_Slave_Interrupt/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 #define _I2C
00071 #define _I2C0
00072 #define _I2C1
00073 #define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 #define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 #define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Monitor/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Monitor/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 #define _I2C
00071 #define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/master/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/master/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 #define _I2C
00071 #define _I2C0
00072 #define _I2C1
00073 #define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 #define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 #define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/pca8581_polling/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/pca8581_polling/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 #define _I2C
00071 #define _I2C0
00072 #define _I2C1
00073 #define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 #define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 #define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_int/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_int/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 #define _I2C
00072 #define _I2C0
00073 #define _I2C1
00074 #define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 #define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_polling/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_polling/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 #define _I2C
00071 #define _I2C0
00072 #define _I2C1
00073 #define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 #define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 #define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/slave/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/slave/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00038
00039 /* Comment the line below to disable the specific peripheral inclusion */
00040
00041 /* DEBUG_FRAMWORK ------------------------------ */
00042 #define _DBGFWK
00043
00044 /* GPIO ------------------------------- */
00045 //#define _GPIO
00046
00047 /* EXTI ------------------------------- */
00048 //#define _EXTI
00049
00050 /* UART ------------------------------- */
00051 #define _UART
00052 #define _UART0
00053 //#define _UART1
00054 //#define _UART2
00055 //#define _UART3
00056
00057 /* SPI ------------------------------- */
00058 //#define _SPI
00059
00060 /* SSP ------------------------------- */
00061 //#define _SSP
00062 //#define _SSP0
00063 //#define _SSP1
00064
00065 /* SYSTICK --------------------------- */
00066 //#define _SYSTICK
00067
00068 /* I2C ------------------------------- */
00069 #define _I2C
00070 #define _I2C0
00071 #define _I2C1
00072 #define _I2C2
00073
00074 /* TIMER ------------------------------- */
00075 //#define _TIM
00076
00077 /* WDT ------------------------------- */
00078 //#define _WDT
00079
00080
00081 /* GPDMA ------------------------------- */
00082 #define _GPDMA
00083
00084
00085 /* DAC ------------------------------- */
00086 //#define _DAC
00087
00088 /* DAC ------------------------------- */
00089 #define _ADC
00090
00091
00092 /* PWM ------------------------------- */
00093 //#define _PWM
00094 //#define _PWM1
00095
00096 /* RTC ------------------------------- */
00097 //#define _RTC
00098
00099 /* I2S ------------------------------- */
00100 //#define _I2S
00101
00102 /* USB device ------------------------------- */
00103 //#define _USBDEV
00104 //#define _USB_DMA
00105
00106 /* QEI ------------------------------- */
00107 //#define _QEI
00108
00109 /* MCPWM ------------------------------- */
00110 //#define _MCPWM
00111
00112 /* CAN--------------------------------*/
00113 //#define _CAN
00114
00115 /* RIT ------------------------------- */
00116 //#define _RIT
00117
00118 /* EMAC ------------------------------ */
00119 //#define _EMAC
00120
00121 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00122
00123 #ifdef  DEBUG
00124 /*******************************************************************************
00125 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00126 *                               It is used only if the library is compiled in DEBUG mode.
00127 * @param[in]    expr - If expr is false, it calls check_failed() function
00128 *                       which reports the name of the source file and the source
00129 *                       line number of the call that failed.
00130 *                    - If expr is true, it returns no value.
00131 * @return               None
00132 *******************************************************************************/
00133 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00134 #else
00135 #define CHECK_PARAM(expr)
00136 #endif /* DEBUG */
00137
00138
00139
00140 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00141
00142 #ifdef  DEBUG
00143 void check_failed(uint8_t *file, uint32_t line);
00144 #endif
00145
00146
00147 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_DMA/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_DMA/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 #define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_IRQ/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_IRQ/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 #define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_MCLK/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_MCLK/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 #define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_test_4_wire/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_test_4_wire/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 #define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:44 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_two_kit/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_two_kit/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 #define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:44 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/Polling/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/Polling/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 #define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:44 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036 /* Comment the line below to disable the specific peripheral inclusion */
00037
00038 /* DEBUG_FRAMWORK ------------------------------ */
00039 //#define _DBGFWK
00040
00041 /* GPIO ------------------------------- */
00042 #define _GPIO
00043
00044 /* EXTI ------------------------------- */
00045 //#define _EXTI
00046
00047 /* UART ------------------------------- */
00048 //#define _UART
00049 //#define _UART0
00050 //#define _UART1
00051 //#define _UART2
00052 //#define _UART3
00053
00054 /* SPI ------------------------------- */
00055 //#define _SPI
00056
00057 /* SSP ------------------------------- */
00058 //#define _SSP
00059 //#define _SSP0
00060 //#define _SSP1
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* I2C ------------------------------- */
00066 //#define _I2C
00067 //#define _I2C0
00068 //#define _I2C1
00069 //#define _I2C2
00070
00071 /* TIMER ------------------------------- */
00072 #define _TIM
00073
00074 /* WDT ------------------------------- */
00075 //#define _WDT
00076
00077
00078 /* GPDMA ------------------------------- */
00079 //#define _GPDMA
00080
00081
00082 /* DAC ------------------------------- */
00083 //#define _DAC
00084
00085 /* DAC ------------------------------- */
00086 #define _ADC
00087
00088
00089 /* PWM ------------------------------- */
00090 //#define _PWM
00091 //#define _PWM1
00092
00093 /* RTC ------------------------------- */
00094 //#define _RTC
00095
00096 /* I2S ------------------------------- */
00097 //#define _I2S
00098
00099 /* USB device ------------------------------- */
00100 //#define _USBDEV
00101 //#define _USB_DMA
00102
00103 /* QEI ------------------------------- */
00104 //#define _QEI
00105
00106 /* MCPWM ------------------------------- */
00107 //#define _MCPWM
00108
00109 /* CAN--------------------------------*/
00110 //#define _CAN
00111
00112 /* RIT ------------------------------- */
00113 //#define _RIT
00114
00115 /* EMAC ------------------------------ */
00116 //#define _EMAC
00117
00118 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00119
00120 /* Comment the line below to disable the specific peripheral inclusion */
00121
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:44 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:44 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h Source File

C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/LPC17xx.h
Go to the documentation of this file.
00001 /**************************************************************************/
00026 #ifndef __LPC17xx_H__
00027 #define __LPC17xx_H__
00028
00029 /*
00030  * ==========================================================================
00031  * ---------- Interrupt Number Definition -----------------------------------
00032  * ==========================================================================
00033  */
00034
00040 typedef enum IRQn
00041 {
00042 /******  Cortex-M3 Processor Exceptions Numbers ***************************************************/
00043   NonMaskableInt_IRQn           = -14,
00044   MemoryManagement_IRQn         = -12,
00045   BusFault_IRQn                 = -11,
00046   UsageFault_IRQn               = -10,
00047   SVCall_IRQn                   = -5,
00048   DebugMonitor_IRQn             = -4,
00049   PendSV_IRQn                   = -2,
00050   SysTick_IRQn                  = -1,
00052 /******  LPC17xx Specific Interrupt Numbers *******************************************************/
00053   WDT_IRQn                      = 0,
00054   TIMER0_IRQn                   = 1,
00055   TIMER1_IRQn                   = 2,
00056   TIMER2_IRQn                   = 3,
00057   TIMER3_IRQn                   = 4,
00058   UART0_IRQn                    = 5,
00059   UART1_IRQn                    = 6,
00060   UART2_IRQn                    = 7,
00061   UART3_IRQn                    = 8,
00062   PWM1_IRQn                     = 9,
00063   I2C0_IRQn                     = 10,
00064   I2C1_IRQn                     = 11,
00065   I2C2_IRQn                     = 12,
00066   SPI_IRQn                      = 13,
00067   SSP0_IRQn                     = 14,
00068   SSP1_IRQn                     = 15,
00069   PLL0_IRQn                     = 16,
00070   RTC_IRQn                      = 17,
00071   EINT0_IRQn                    = 18,
00072   EINT1_IRQn                    = 19,
00073   EINT2_IRQn                    = 20,
00074   EINT3_IRQn                    = 21,
00075   ADC_IRQn                      = 22,
00076   BOD_IRQn                      = 23,
00077   USB_IRQn                      = 24,
00078   CAN_IRQn                      = 25,
00079   DMA_IRQn                      = 26,
00080   I2S_IRQn                      = 27,
00081   ENET_IRQn                     = 28,
00082   RIT_IRQn                      = 29,
00083   MCPWM_IRQn                    = 30,
00084   QEI_IRQn                      = 31,
00085   PLL1_IRQn                     = 32,
00086   USBActivity_IRQn                              = 33,
00087   CANActivity_IRQn                              = 34
00088 } IRQn_Type;
00089
00090
00091 /*
00092  * ==========================================================================
00093  * ----------- Processor and Core Peripheral Section ------------------------
00094  * ==========================================================================
00095  */
00096
00097 /* Configuration of the Cortex-M3 Processor and Core Peripherals */
00098 #define __MPU_PRESENT             1
00099 #define __NVIC_PRIO_BITS          5
00100 #define __Vendor_SysTickConfig    0
00103 #include "core_cm3.h"                       /* Cortex-M3 processor and core peripherals           */
00104 #include "system_LPC17xx.h"                 /* System Header                                      */
00105
00106
00107 /******************************************************************************/
00108 /*                Device Specific Peripheral registers structures             */
00109 /******************************************************************************/
00110
00111 #if defined ( __CC_ARM   )
00112 #pragma anon_unions
00113 #endif
00114
00115 /*------------- System Control (SC) ------------------------------------------*/
00117 typedef struct
00118 {
00119   __IO uint32_t FLASHCFG;               /* Flash Accelerator Module           */
00120        uint32_t RESERVED0[31];
00121   __IO uint32_t PLL0CON;                /* Clocking and Power Control         */
00122   __IO uint32_t PLL0CFG;
00123   __I  uint32_t PLL0STAT;
00124   __O  uint32_t PLL0FEED;
00125        uint32_t RESERVED1[4];
00126   __IO uint32_t PLL1CON;
00127   __IO uint32_t PLL1CFG;
00128   __I  uint32_t PLL1STAT;
00129   __O  uint32_t PLL1FEED;
00130        uint32_t RESERVED2[4];
00131   __IO uint32_t PCON;
00132   __IO uint32_t PCONP;
00133        uint32_t RESERVED3[15];
00134   __IO uint32_t CCLKCFG;
00135   __IO uint32_t USBCLKCFG;
00136   __IO uint32_t CLKSRCSEL;
00137   __IO uint32_t CANSLEEPCLR;
00138   __IO uint32_t CANWAKEFLAGS;
00139        uint32_t RESERVED4[10];
00140   __IO uint32_t EXTINT;                 /* External Interrupts                */
00141        uint32_t RESERVED5;
00142   __IO uint32_t EXTMODE;
00143   __IO uint32_t EXTPOLAR;
00144        uint32_t RESERVED6[12];
00145   __IO uint32_t RSID;                   /* Reset                              */
00146        uint32_t RESERVED7[7];
00147   __IO uint32_t SCS;                    /* Syscon Miscellaneous Registers     */
00148   __IO uint32_t IRCTRIM;                /* Clock Dividers                     */
00149   __IO uint32_t PCLKSEL0;
00150   __IO uint32_t PCLKSEL1;
00151        uint32_t RESERVED8[4];
00152   __IO uint32_t USBIntSt;               /* USB Device/OTG Interrupt Register  */
00153   __IO uint32_t DMAREQSEL;
00154   __IO uint32_t CLKOUTCFG;              /* Clock Output Configuration         */
00155  } LPC_SC_TypeDef;
00156
00157 /*------------- Pin Connect Block (PINCON) -----------------------------------*/
00159 typedef struct
00160 {
00161   __IO uint32_t PINSEL0;
00162   __IO uint32_t PINSEL1;
00163   __IO uint32_t PINSEL2;
00164   __IO uint32_t PINSEL3;
00165   __IO uint32_t PINSEL4;
00166   __IO uint32_t PINSEL5;
00167   __IO uint32_t PINSEL6;
00168   __IO uint32_t PINSEL7;
00169   __IO uint32_t PINSEL8;
00170   __IO uint32_t PINSEL9;
00171   __IO uint32_t PINSEL10;
00172        uint32_t RESERVED0[5];
00173   __IO uint32_t PINMODE0;
00174   __IO uint32_t PINMODE1;
00175   __IO uint32_t PINMODE2;
00176   __IO uint32_t PINMODE3;
00177   __IO uint32_t PINMODE4;
00178   __IO uint32_t PINMODE5;
00179   __IO uint32_t PINMODE6;
00180   __IO uint32_t PINMODE7;
00181   __IO uint32_t PINMODE8;
00182   __IO uint32_t PINMODE9;
00183   __IO uint32_t PINMODE_OD0;
00184   __IO uint32_t PINMODE_OD1;
00185   __IO uint32_t PINMODE_OD2;
00186   __IO uint32_t PINMODE_OD3;
00187   __IO uint32_t PINMODE_OD4;
00188   __IO uint32_t I2CPADCFG;
00189 } LPC_PINCON_TypeDef;
00190
00191 /*------------- General Purpose Input/Output (GPIO) --------------------------*/
00193 typedef struct
00194 {
00195   union {
00196     __IO uint32_t FIODIR;
00197     struct {
00198       __IO uint16_t FIODIRL;
00199       __IO uint16_t FIODIRH;
00200     };
00201     struct {
00202       __IO uint8_t  FIODIR0;
00203       __IO uint8_t  FIODIR1;
00204       __IO uint8_t  FIODIR2;
00205       __IO uint8_t  FIODIR3;
00206     };
00207   };
00208   uint32_t RESERVED0[3];
00209   union {
00210     __IO uint32_t FIOMASK;
00211     struct {
00212       __IO uint16_t FIOMASKL;
00213       __IO uint16_t FIOMASKH;
00214     };
00215     struct {
00216       __IO uint8_t  FIOMASK0;
00217       __IO uint8_t  FIOMASK1;
00218       __IO uint8_t  FIOMASK2;
00219       __IO uint8_t  FIOMASK3;
00220     };
00221   };
00222   union {
00223     __IO uint32_t FIOPIN;
00224     struct {
00225       __IO uint16_t FIOPINL;
00226       __IO uint16_t FIOPINH;
00227     };
00228     struct {
00229       __IO uint8_t  FIOPIN0;
00230       __IO uint8_t  FIOPIN1;
00231       __IO uint8_t  FIOPIN2;
00232       __IO uint8_t  FIOPIN3;
00233     };
00234   };
00235   union {
00236     __IO uint32_t FIOSET;
00237     struct {
00238       __IO uint16_t FIOSETL;
00239       __IO uint16_t FIOSETH;
00240     };
00241     struct {
00242       __IO uint8_t  FIOSET0;
00243       __IO uint8_t  FIOSET1;
00244       __IO uint8_t  FIOSET2;
00245       __IO uint8_t  FIOSET3;
00246     };
00247   };
00248   union {
00249     __O  uint32_t FIOCLR;
00250     struct {
00251       __O  uint16_t FIOCLRL;
00252       __O  uint16_t FIOCLRH;
00253     };
00254     struct {
00255       __O  uint8_t  FIOCLR0;
00256       __O  uint8_t  FIOCLR1;
00257       __O  uint8_t  FIOCLR2;
00258       __O  uint8_t  FIOCLR3;
00259     };
00260   };
00261 } LPC_GPIO_TypeDef;
00262
00264 typedef struct
00265 {
00266   __I  uint32_t IntStatus;
00267   __I  uint32_t IO0IntStatR;
00268   __I  uint32_t IO0IntStatF;
00269   __O  uint32_t IO0IntClr;
00270   __IO uint32_t IO0IntEnR;
00271   __IO uint32_t IO0IntEnF;
00272        uint32_t RESERVED0[3];
00273   __I  uint32_t IO2IntStatR;
00274   __I  uint32_t IO2IntStatF;
00275   __O  uint32_t IO2IntClr;
00276   __IO uint32_t IO2IntEnR;
00277   __IO uint32_t IO2IntEnF;
00278 } LPC_GPIOINT_TypeDef;
00279
00280 /*------------- Timer (TIM) --------------------------------------------------*/
00282 typedef struct
00283 {
00284   __IO uint32_t IR;
00285   __IO uint32_t TCR;
00286   __IO uint32_t TC;
00287   __IO uint32_t PR;
00288   __IO uint32_t PC;
00289   __IO uint32_t MCR;
00290   __IO uint32_t MR0;
00291   __IO uint32_t MR1;
00292   __IO uint32_t MR2;
00293   __IO uint32_t MR3;
00294   __IO uint32_t CCR;
00295   __I  uint32_t CR0;
00296   __I  uint32_t CR1;
00297        uint32_t RESERVED0[2];
00298   __IO uint32_t EMR;
00299        uint32_t RESERVED1[12];
00300   __IO uint32_t CTCR;
00301 } LPC_TIM_TypeDef;
00302
00303 /*------------- Pulse-Width Modulation (PWM) ---------------------------------*/
00305 typedef struct
00306 {
00307   __IO uint32_t IR;
00308   __IO uint32_t TCR;
00309   __IO uint32_t TC;
00310   __IO uint32_t PR;
00311   __IO uint32_t PC;
00312   __IO uint32_t MCR;
00313   __IO uint32_t MR0;
00314   __IO uint32_t MR1;
00315   __IO uint32_t MR2;
00316   __IO uint32_t MR3;
00317   __IO uint32_t CCR;
00318   __I  uint32_t CR0;
00319   __I  uint32_t CR1;
00320   __I  uint32_t CR2;
00321   __I  uint32_t CR3;
00322        uint32_t RESERVED0;
00323   __IO uint32_t MR4;
00324   __IO uint32_t MR5;
00325   __IO uint32_t MR6;
00326   __IO uint32_t PCR;
00327   __IO uint32_t LER;
00328        uint32_t RESERVED1[7];
00329   __IO uint32_t CTCR;
00330 } LPC_PWM_TypeDef;
00331
00332 /*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/
00334 typedef struct
00335 {
00336   union {
00337   __I  uint8_t  RBR;
00338   __O  uint8_t  THR;
00339   __IO uint8_t  DLL;
00340        uint32_t RESERVED0;
00341   };
00342   union {
00343   __IO uint8_t  DLM;
00344   __IO uint32_t IER;
00345   };
00346   union {
00347   __I  uint32_t IIR;
00348   __O  uint8_t  FCR;
00349   };
00350   __IO uint8_t  LCR;
00351        uint8_t  RESERVED1[7];
00352   __I  uint8_t  LSR;
00353        uint8_t  RESERVED2[7];
00354   __IO uint8_t  SCR;
00355        uint8_t  RESERVED3[3];
00356   __IO uint32_t ACR;
00357   __IO uint8_t  ICR;
00358        uint8_t  RESERVED4[3];
00359   __IO uint8_t  FDR;
00360        uint8_t  RESERVED5[7];
00361   __IO uint8_t  TER;
00362        uint8_t  RESERVED6[39];
00363   __I  uint8_t  FIFOLVL;
00364 } LPC_UART_TypeDef;
00365
00367 typedef struct
00368 {
00369   union {
00370   __I  uint8_t  RBR;
00371   __O  uint8_t  THR;
00372   __IO uint8_t  DLL;
00373        uint32_t RESERVED0;
00374   };
00375   union {
00376   __IO uint8_t  DLM;
00377   __IO uint32_t IER;
00378   };
00379   union {
00380   __I  uint32_t IIR;
00381   __O  uint8_t  FCR;
00382   };
00383   __IO uint8_t  LCR;
00384        uint8_t  RESERVED1[7];
00385   __I  uint8_t  LSR;
00386        uint8_t  RESERVED2[7];
00387   __IO uint8_t  SCR;
00388        uint8_t  RESERVED3[3];
00389   __IO uint32_t ACR;
00390   __IO uint8_t  ICR;
00391        uint8_t  RESERVED4[3];
00392   __IO uint8_t  FDR;
00393        uint8_t  RESERVED5[7];
00394   __IO uint8_t  TER;
00395        uint8_t  RESERVED6[39];
00396   __I  uint8_t  FIFOLVL;
00397 } LPC_UART0_TypeDef;
00398
00400 typedef struct
00401 {
00402   union {
00403   __I  uint8_t  RBR;
00404   __O  uint8_t  THR;
00405   __IO uint8_t  DLL;
00406        uint32_t RESERVED0;
00407   };
00408   union {
00409   __IO uint8_t  DLM;
00410   __IO uint32_t IER;
00411   };
00412   union {
00413   __I  uint32_t IIR;
00414   __O  uint8_t  FCR;
00415   };
00416   __IO uint8_t  LCR;
00417        uint8_t  RESERVED1[3];
00418   __IO uint8_t  MCR;
00419        uint8_t  RESERVED2[3];
00420   __I  uint8_t  LSR;
00421        uint8_t  RESERVED3[3];
00422   __I  uint8_t  MSR;
00423        uint8_t  RESERVED4[3];
00424   __IO uint8_t  SCR;
00425        uint8_t  RESERVED5[3];
00426   __IO uint32_t ACR;
00427        uint32_t RESERVED6;
00428   __IO uint32_t FDR;
00429        uint32_t RESERVED7;
00430   __IO uint8_t  TER;
00431        uint8_t  RESERVED8[27];
00432   __IO uint8_t  RS485CTRL;
00433        uint8_t  RESERVED9[3];
00434   __IO uint8_t  ADRMATCH;
00435        uint8_t  RESERVED10[3];
00436   __IO uint8_t  RS485DLY;
00437        uint8_t  RESERVED11[3];
00438   __I  uint8_t  FIFOLVL;
00439 } LPC_UART1_TypeDef;
00440
00441 /*------------- Serial Peripheral Interface (SPI) ----------------------------*/
00443 typedef struct
00444 {
00445   __IO uint32_t SPCR;
00446   __I  uint32_t SPSR;
00447   __IO uint32_t SPDR;
00448   __IO uint32_t SPCCR;
00449        uint32_t RESERVED0[3];
00450   __IO uint32_t SPINT;
00451 } LPC_SPI_TypeDef;
00452
00453 /*------------- Synchronous Serial Communication (SSP) -----------------------*/
00455 typedef struct
00456 {
00457   __IO uint32_t CR0;
00458   __IO uint32_t CR1;
00459   __IO uint32_t DR;
00460   __I  uint32_t SR;
00461   __IO uint32_t CPSR;
00462   __IO uint32_t IMSC;
00463   __IO uint32_t RIS;
00464   __IO uint32_t MIS;
00465   __IO uint32_t ICR;
00466   __IO uint32_t DMACR;
00467 } LPC_SSP_TypeDef;
00468
00469 /*------------- Inter-Integrated Circuit (I2C) -------------------------------*/
00471 typedef struct
00472 {
00473   __IO uint32_t I2CONSET;
00474   __I  uint32_t I2STAT;
00475   __IO uint32_t I2DAT;
00476   __IO uint32_t I2ADR0;
00477   __IO uint32_t I2SCLH;
00478   __IO uint32_t I2SCLL;
00479   __O  uint32_t I2CONCLR;
00480   __IO uint32_t MMCTRL;
00481   __IO uint32_t I2ADR1;
00482   __IO uint32_t I2ADR2;
00483   __IO uint32_t I2ADR3;
00484   __I  uint32_t I2DATA_BUFFER;
00485   __IO uint32_t I2MASK0;
00486   __IO uint32_t I2MASK1;
00487   __IO uint32_t I2MASK2;
00488   __IO uint32_t I2MASK3;
00489 } LPC_I2C_TypeDef;
00490
00491 /*------------- Inter IC Sound (I2S) -----------------------------------------*/
00493 typedef struct
00494 {
00495   __IO uint32_t I2SDAO;
00496   __IO uint32_t I2SDAI;
00497   __O  uint32_t I2STXFIFO;
00498   __I  uint32_t I2SRXFIFO;
00499   __I  uint32_t I2SSTATE;
00500   __IO uint32_t I2SDMA1;
00501   __IO uint32_t I2SDMA2;
00502   __IO uint32_t I2SIRQ;
00503   __IO uint32_t I2STXRATE;
00504   __IO uint32_t I2SRXRATE;
00505   __IO uint32_t I2STXBITRATE;
00506   __IO uint32_t I2SRXBITRATE;
00507   __IO uint32_t I2STXMODE;
00508   __IO uint32_t I2SRXMODE;
00509 } LPC_I2S_TypeDef;
00510
00511 /*------------- Repetitive Interrupt Timer (RIT) -----------------------------*/
00513 typedef struct
00514 {
00515   __IO uint32_t RICOMPVAL;
00516   __IO uint32_t RIMASK;
00517   __IO uint8_t  RICTRL;
00518        uint8_t  RESERVED0[3];
00519   __IO uint32_t RICOUNTER;
00520 } LPC_RIT_TypeDef;
00521
00522 /*------------- Real-Time Clock (RTC) ----------------------------------------*/
00524 typedef struct
00525 {
00526   __IO uint8_t  ILR;
00527        uint8_t  RESERVED0[7];
00528   __IO uint8_t  CCR;
00529        uint8_t  RESERVED1[3];
00530   __IO uint8_t  CIIR;
00531        uint8_t  RESERVED2[3];
00532   __IO uint8_t  AMR;
00533        uint8_t  RESERVED3[3];
00534   __I  uint32_t CTIME0;
00535   __I  uint32_t CTIME1;
00536   __I  uint32_t CTIME2;
00537   __IO uint8_t  SEC;
00538        uint8_t  RESERVED4[3];
00539   __IO uint8_t  MIN;
00540        uint8_t  RESERVED5[3];
00541   __IO uint8_t  HOUR;
00542        uint8_t  RESERVED6[3];
00543   __IO uint8_t  DOM;
00544        uint8_t  RESERVED7[3];
00545   __IO uint8_t  DOW;
00546        uint8_t  RESERVED8[3];
00547   __IO uint16_t DOY;
00548        uint16_t RESERVED9;
00549   __IO uint8_t  MONTH;
00550        uint8_t  RESERVED10[3];
00551   __IO uint16_t YEAR;
00552        uint16_t RESERVED11;
00553   __IO uint32_t CALIBRATION;
00554   __IO uint32_t GPREG0;
00555   __IO uint32_t GPREG1;
00556   __IO uint32_t GPREG2;
00557   __IO uint32_t GPREG3;
00558   __IO uint32_t GPREG4;
00559   __IO uint8_t  RTC_AUXEN;
00560        uint8_t  RESERVED12[3];
00561   __IO uint8_t  RTC_AUX;
00562        uint8_t  RESERVED13[3];
00563   __IO uint8_t  ALSEC;
00564        uint8_t  RESERVED14[3];
00565   __IO uint8_t  ALMIN;
00566        uint8_t  RESERVED15[3];
00567   __IO uint8_t  ALHOUR;
00568        uint8_t  RESERVED16[3];
00569   __IO uint8_t  ALDOM;
00570        uint8_t  RESERVED17[3];
00571   __IO uint8_t  ALDOW;
00572        uint8_t  RESERVED18[3];
00573   __IO uint16_t ALDOY;
00574        uint16_t RESERVED19;
00575   __IO uint8_t  ALMON;
00576        uint8_t  RESERVED20[3];
00577   __IO uint16_t ALYEAR;
00578        uint16_t RESERVED21;
00579 } LPC_RTC_TypeDef;
00580
00581 /*------------- Watchdog Timer (WDT) -----------------------------------------*/
00583 typedef struct
00584 {
00585   __IO uint8_t  WDMOD;
00586        uint8_t  RESERVED0[3];
00587   __IO uint32_t WDTC;
00588   __O  uint8_t  WDFEED;
00589        uint8_t  RESERVED1[3];
00590   __I  uint32_t WDTV;
00591   __IO uint32_t WDCLKSEL;
00592 } LPC_WDT_TypeDef;
00593
00594 /*------------- Analog-to-Digital Converter (ADC) ----------------------------*/
00596 typedef struct
00597 {
00598   __IO uint32_t ADCR;
00599   __IO uint32_t ADGDR;
00600        uint32_t RESERVED0;
00601   __IO uint32_t ADINTEN;
00602   __I  uint32_t ADDR0;
00603   __I  uint32_t ADDR1;
00604   __I  uint32_t ADDR2;
00605   __I  uint32_t ADDR3;
00606   __I  uint32_t ADDR4;
00607   __I  uint32_t ADDR5;
00608   __I  uint32_t ADDR6;
00609   __I  uint32_t ADDR7;
00610   __I  uint32_t ADSTAT;
00611   __IO uint32_t ADTRM;
00612 } LPC_ADC_TypeDef;
00613
00614 /*------------- Digital-to-Analog Converter (DAC) ----------------------------*/
00616 typedef struct
00617 {
00618   __IO uint32_t DACR;
00619   __IO uint32_t DACCTRL;
00620   __IO uint16_t DACCNTVAL;
00621 } LPC_DAC_TypeDef;
00622
00623 /*------------- Motor Control Pulse-Width Modulation (MCPWM) -----------------*/
00625 typedef struct
00626 {
00627   __I  uint32_t MCCON;
00628   __O  uint32_t MCCON_SET;
00629   __O  uint32_t MCCON_CLR;
00630   __I  uint32_t MCCAPCON;
00631   __O  uint32_t MCCAPCON_SET;
00632   __O  uint32_t MCCAPCON_CLR;
00633   __IO uint32_t MCTIM0;
00634   __IO uint32_t MCTIM1;
00635   __IO uint32_t MCTIM2;
00636   __IO uint32_t MCPER0;
00637   __IO uint32_t MCPER1;
00638   __IO uint32_t MCPER2;
00639   __IO uint32_t MCPW0;
00640   __IO uint32_t MCPW1;
00641   __IO uint32_t MCPW2;
00642   __IO uint32_t MCDEADTIME;
00643   __IO uint32_t MCCCP;
00644   __IO uint32_t MCCR0;
00645   __IO uint32_t MCCR1;
00646   __IO uint32_t MCCR2;
00647   __I  uint32_t MCINTEN;
00648   __O  uint32_t MCINTEN_SET;
00649   __O  uint32_t MCINTEN_CLR;
00650   __I  uint32_t MCCNTCON;
00651   __O  uint32_t MCCNTCON_SET;
00652   __O  uint32_t MCCNTCON_CLR;
00653   __I  uint32_t MCINTFLAG;
00654   __O  uint32_t MCINTFLAG_SET;
00655   __O  uint32_t MCINTFLAG_CLR;
00656   __O  uint32_t MCCAP_CLR;
00657 } LPC_MCPWM_TypeDef;
00658
00659 /*------------- Quadrature Encoder Interface (QEI) ---------------------------*/
00661 typedef struct
00662 {
00663   __O  uint32_t QEICON;
00664   __I  uint32_t QEISTAT;
00665   __IO uint32_t QEICONF;
00666   __I  uint32_t QEIPOS;
00667   __IO uint32_t QEIMAXPOS;
00668   __IO uint32_t CMPOS0;
00669   __IO uint32_t CMPOS1;
00670   __IO uint32_t CMPOS2;
00671   __I  uint32_t INXCNT;
00672   __IO uint32_t INXCMP;
00673   __IO uint32_t QEILOAD;
00674   __I  uint32_t QEITIME;
00675   __I  uint32_t QEIVEL;
00676   __I  uint32_t QEICAP;
00677   __IO uint32_t VELCOMP;
00678   __IO uint32_t FILTER;
00679        uint32_t RESERVED0[998];
00680   __O  uint32_t QEIIEC;
00681   __O  uint32_t QEIIES;
00682   __I  uint32_t QEIINTSTAT;
00683   __I  uint32_t QEIIE;
00684   __O  uint32_t QEICLR;
00685   __O  uint32_t QEISET;
00686 } LPC_QEI_TypeDef;
00687
00688 /*------------- Controller Area Network (CAN) --------------------------------*/
00690 typedef struct
00691 {
00692   __IO uint32_t mask[512];              /* ID Masks                           */
00693 } LPC_CANAF_RAM_TypeDef;
00694
00696 typedef struct                          /* Acceptance Filter Registers        */
00697 {
00698   __IO uint32_t AFMR;
00699   __IO uint32_t SFF_sa;
00700   __IO uint32_t SFF_GRP_sa;
00701   __IO uint32_t EFF_sa;
00702   __IO uint32_t EFF_GRP_sa;
00703   __IO uint32_t ENDofTable;
00704   __I  uint32_t LUTerrAd;
00705   __I  uint32_t LUTerr;
00706   __IO uint32_t FCANIE;
00707   __IO uint32_t FCANIC0;
00708   __IO uint32_t FCANIC1;
00709 } LPC_CANAF_TypeDef;
00710
00712 typedef struct                          /* Central Registers                  */
00713 {
00714   __I  uint32_t CANTxSR;
00715   __I  uint32_t CANRxSR;
00716   __I  uint32_t CANMSR;
00717 } LPC_CANCR_TypeDef;
00718
00720 typedef struct                          /* Controller Registers               */
00721 {
00722   __IO uint32_t MOD;
00723   __O  uint32_t CMR;
00724   __IO uint32_t GSR;
00725   __I  uint32_t ICR;
00726   __IO uint32_t IER;
00727   __IO uint32_t BTR;
00728   __IO uint32_t EWL;
00729   __I  uint32_t SR;
00730   __IO uint32_t RFS;
00731   __IO uint32_t RID;
00732   __IO uint32_t RDA;
00733   __IO uint32_t RDB;
00734   __IO uint32_t TFI1;
00735   __IO uint32_t TID1;
00736   __IO uint32_t TDA1;
00737   __IO uint32_t TDB1;
00738   __IO uint32_t TFI2;
00739   __IO uint32_t TID2;
00740   __IO uint32_t TDA2;
00741   __IO uint32_t TDB2;
00742   __IO uint32_t TFI3;
00743   __IO uint32_t TID3;
00744   __IO uint32_t TDA3;
00745   __IO uint32_t TDB3;
00746 } LPC_CAN_TypeDef;
00747
00748 /*------------- General Purpose Direct Memory Access (GPDMA) -----------------*/
00750 typedef struct                          /* Common Registers                   */
00751 {
00752   __I  uint32_t DMACIntStat;
00753   __I  uint32_t DMACIntTCStat;
00754   __O  uint32_t DMACIntTCClear;
00755   __I  uint32_t DMACIntErrStat;
00756   __O  uint32_t DMACIntErrClr;
00757   __I  uint32_t DMACRawIntTCStat;
00758   __I  uint32_t DMACRawIntErrStat;
00759   __I  uint32_t DMACEnbldChns;
00760   __IO uint32_t DMACSoftBReq;
00761   __IO uint32_t DMACSoftSReq;
00762   __IO uint32_t DMACSoftLBReq;
00763   __IO uint32_t DMACSoftLSReq;
00764   __IO uint32_t DMACConfig;
00765   __IO uint32_t DMACSync;
00766 } LPC_GPDMA_TypeDef;
00767
00769 typedef struct                          /* Channel Registers                  */
00770 {
00771   __IO uint32_t DMACCSrcAddr;
00772   __IO uint32_t DMACCDestAddr;
00773   __IO uint32_t DMACCLLI;
00774   __IO uint32_t DMACCControl;
00775   __IO uint32_t DMACCConfig;
00776 } LPC_GPDMACH_TypeDef;
00777
00778 /*------------- Universal Serial Bus (USB) -----------------------------------*/
00780 typedef struct
00781 {
00782   __I  uint32_t HcRevision;             /* USB Host Registers                 */
00783   __IO uint32_t HcControl;
00784   __IO uint32_t HcCommandStatus;
00785   __IO uint32_t HcInterruptStatus;
00786   __IO uint32_t HcInterruptEnable;
00787   __IO uint32_t HcInterruptDisable;
00788   __IO uint32_t HcHCCA;
00789   __I  uint32_t HcPeriodCurrentED;
00790   __IO uint32_t HcControlHeadED;
00791   __IO uint32_t HcControlCurrentED;
00792   __IO uint32_t HcBulkHeadED;
00793   __IO uint32_t HcBulkCurrentED;
00794   __I  uint32_t HcDoneHead;
00795   __IO uint32_t HcFmInterval;
00796   __I  uint32_t HcFmRemaining;
00797   __I  uint32_t HcFmNumber;
00798   __IO uint32_t HcPeriodicStart;
00799   __IO uint32_t HcLSTreshold;
00800   __IO uint32_t HcRhDescriptorA;
00801   __IO uint32_t HcRhDescriptorB;
00802   __IO uint32_t HcRhStatus;
00803   __IO uint32_t HcRhPortStatus1;
00804   __IO uint32_t HcRhPortStatus2;
00805        uint32_t RESERVED0[40];
00806   __I  uint32_t Module_ID;
00807
00808   __I  uint32_t OTGIntSt;               /* USB On-The-Go Registers            */
00809   __IO uint32_t OTGIntEn;
00810   __O  uint32_t OTGIntSet;
00811   __O  uint32_t OTGIntClr;
00812   __IO uint32_t OTGStCtrl;
00813   __IO uint32_t OTGTmr;
00814        uint32_t RESERVED1[58];
00815
00816   __I  uint32_t USBDevIntSt;            /* USB Device Interrupt Registers     */
00817   __IO uint32_t USBDevIntEn;
00818   __O  uint32_t USBDevIntClr;
00819   __O  uint32_t USBDevIntSet;
00820
00821   __O  uint32_t USBCmdCode;             /* USB Device SIE Command Registers   */
00822   __I  uint32_t USBCmdData;
00823
00824   __I  uint32_t USBRxData;              /* USB Device Transfer Registers      */
00825   __O  uint32_t USBTxData;
00826   __I  uint32_t USBRxPLen;
00827   __O  uint32_t USBTxPLen;
00828   __IO uint32_t USBCtrl;
00829   __O  uint32_t USBDevIntPri;
00830
00831   __I  uint32_t USBEpIntSt;             /* USB Device Endpoint Interrupt Regs */
00832   __IO uint32_t USBEpIntEn;
00833   __O  uint32_t USBEpIntClr;
00834   __O  uint32_t USBEpIntSet;
00835   __O  uint32_t USBEpIntPri;
00836
00837   __IO uint32_t USBReEp;                /* USB Device Endpoint Realization Reg*/
00838   __O  uint32_t USBEpInd;
00839   __IO uint32_t USBMaxPSize;
00840
00841   __I  uint32_t USBDMARSt;              /* USB Device DMA Registers           */
00842   __O  uint32_t USBDMARClr;
00843   __O  uint32_t USBDMARSet;
00844        uint32_t RESERVED2[9];
00845   __IO uint32_t USBUDCAH;
00846   __I  uint32_t USBEpDMASt;
00847   __O  uint32_t USBEpDMAEn;
00848   __O  uint32_t USBEpDMADis;
00849   __I  uint32_t USBDMAIntSt;
00850   __IO uint32_t USBDMAIntEn;
00851        uint32_t RESERVED3[2];
00852   __I  uint32_t USBEoTIntSt;
00853   __O  uint32_t USBEoTIntClr;
00854   __O  uint32_t USBEoTIntSet;
00855   __I  uint32_t USBNDDRIntSt;
00856   __O  uint32_t USBNDDRIntClr;
00857   __O  uint32_t USBNDDRIntSet;
00858   __I  uint32_t USBSysErrIntSt;
00859   __O  uint32_t USBSysErrIntClr;
00860   __O  uint32_t USBSysErrIntSet;
00861        uint32_t RESERVED4[15];
00862
00863   union {
00864   __I  uint32_t I2C_RX;                 /* USB OTG I2C Registers              */
00865   __O  uint32_t I2C_TX;
00866   };
00867   __I  uint32_t I2C_STS;
00868   __IO uint32_t I2C_CTL;
00869   __IO uint32_t I2C_CLKHI;
00870   __O  uint32_t I2C_CLKLO;
00871        uint32_t RESERVED5[824];
00872
00873   union {
00874   __IO uint32_t USBClkCtrl;             /* USB Clock Control Registers        */
00875   __IO uint32_t OTGClkCtrl;
00876   };
00877   union {
00878   __I  uint32_t USBClkSt;
00879   __I  uint32_t OTGClkSt;
00880   };
00881 } LPC_USB_TypeDef;
00882
00883 /*------------- Ethernet Media Access Controller (EMAC) ----------------------*/
00885 typedef struct
00886 {
00887   __IO uint32_t MAC1;                   /* MAC Registers                      */
00888   __IO uint32_t MAC2;
00889   __IO uint32_t IPGT;
00890   __IO uint32_t IPGR;
00891   __IO uint32_t CLRT;
00892   __IO uint32_t MAXF;
00893   __IO uint32_t SUPP;
00894   __IO uint32_t TEST;
00895   __IO uint32_t MCFG;
00896   __IO uint32_t MCMD;
00897   __IO uint32_t MADR;
00898   __O  uint32_t MWTD;
00899   __I  uint32_t MRDD;
00900   __I  uint32_t MIND;
00901        uint32_t RESERVED0[2];
00902   __IO uint32_t SA0;
00903   __IO uint32_t SA1;
00904   __IO uint32_t SA2;
00905        uint32_t RESERVED1[45];
00906   __IO uint32_t Command;                /* Control Registers                  */
00907   __I  uint32_t Status;
00908   __IO uint32_t RxDescriptor;
00909   __IO uint32_t RxStatus;
00910   __IO uint32_t RxDescriptorNumber;
00911   __I  uint32_t RxProduceIndex;
00912   __IO uint32_t RxConsumeIndex;
00913   __IO uint32_t TxDescriptor;
00914   __IO uint32_t TxStatus;
00915   __IO uint32_t TxDescriptorNumber;
00916   __IO uint32_t TxProduceIndex;
00917   __I  uint32_t TxConsumeIndex;
00918        uint32_t RESERVED2[10];
00919   __I  uint32_t TSV0;
00920   __I  uint32_t TSV1;
00921   __I  uint32_t RSV;
00922        uint32_t RESERVED3[3];
00923   __IO uint32_t FlowControlCounter;
00924   __I  uint32_t FlowControlStatus;
00925        uint32_t RESERVED4[34];
00926   __IO uint32_t RxFilterCtrl;           /* Rx Filter Registers                */
00927   __IO uint32_t RxFilterWoLStatus;
00928   __IO uint32_t RxFilterWoLClear;
00929        uint32_t RESERVED5;
00930   __IO uint32_t HashFilterL;
00931   __IO uint32_t HashFilterH;
00932        uint32_t RESERVED6[882];
00933   __I  uint32_t IntStatus;              /* Module Control Registers           */
00934   __IO uint32_t IntEnable;
00935   __O  uint32_t IntClear;
00936   __O  uint32_t IntSet;
00937        uint32_t RESERVED7;
00938   __IO uint32_t PowerDown;
00939        uint32_t RESERVED8;
00940   __IO uint32_t Module_ID;
00941 } LPC_EMAC_TypeDef;
00942
00943
00944 #if defined ( __CC_ARM   )
00945 #pragma no_anon_unions
00946 #endif
00947
00948
00949 /******************************************************************************/
00950 /*                         Peripheral memory map                              */
00951 /******************************************************************************/
00952 /* Base addresses                                                             */
00953 #define LPC_FLASH_BASE        (0x00000000UL)
00954 #define LPC_RAM_BASE          (0x10000000UL)
00955 #ifdef __LPC17XX_REV00
00956 #define LPC_AHBRAM0_BASE      (0x20000000UL)
00957 #define LPC_AHBRAM1_BASE      (0x20004000UL)
00958 #else
00959 #define LPC_AHBRAM0_BASE      (0x2007C000UL)
00960 #define LPC_AHBRAM1_BASE      (0x20080000UL)
00961 #endif
00962 #define LPC_GPIO_BASE         (0x2009C000UL)
00963 #define LPC_APB0_BASE         (0x40000000UL)
00964 #define LPC_APB1_BASE         (0x40080000UL)
00965 #define LPC_AHB_BASE          (0x50000000UL)
00966 #define LPC_CM3_BASE          (0xE0000000UL)
00967
00968 /* APB0 peripherals                                                           */
00969 #define LPC_WDT_BASE          (LPC_APB0_BASE + 0x00000)
00970 #define LPC_TIM0_BASE         (LPC_APB0_BASE + 0x04000)
00971 #define LPC_TIM1_BASE         (LPC_APB0_BASE + 0x08000)
00972 #define LPC_UART0_BASE        (LPC_APB0_BASE + 0x0C000)
00973 #define LPC_UART1_BASE        (LPC_APB0_BASE + 0x10000)
00974 #define LPC_PWM1_BASE         (LPC_APB0_BASE + 0x18000)
00975 #define LPC_I2C0_BASE         (LPC_APB0_BASE + 0x1C000)
00976 #define LPC_SPI_BASE          (LPC_APB0_BASE + 0x20000)
00977 #define LPC_RTC_BASE          (LPC_APB0_BASE + 0x24000)
00978 #define LPC_GPIOINT_BASE      (LPC_APB0_BASE + 0x28080)
00979 #define LPC_PINCON_BASE       (LPC_APB0_BASE + 0x2C000)
00980 #define LPC_SSP1_BASE         (LPC_APB0_BASE + 0x30000)
00981 #define LPC_ADC_BASE          (LPC_APB0_BASE + 0x34000)
00982 #define LPC_CANAF_RAM_BASE    (LPC_APB0_BASE + 0x38000)
00983 #define LPC_CANAF_BASE        (LPC_APB0_BASE + 0x3C000)
00984 #define LPC_CANCR_BASE        (LPC_APB0_BASE + 0x40000)
00985 #define LPC_CAN1_BASE         (LPC_APB0_BASE + 0x44000)
00986 #define LPC_CAN2_BASE         (LPC_APB0_BASE + 0x48000)
00987 #define LPC_I2C1_BASE         (LPC_APB0_BASE + 0x5C000)
00988
00989 /* APB1 peripherals                                                           */
00990 #define LPC_SSP0_BASE         (LPC_APB1_BASE + 0x08000)
00991 #define LPC_DAC_BASE          (LPC_APB1_BASE + 0x0C000)
00992 #define LPC_TIM2_BASE         (LPC_APB1_BASE + 0x10000)
00993 #define LPC_TIM3_BASE         (LPC_APB1_BASE + 0x14000)
00994 #define LPC_UART2_BASE        (LPC_APB1_BASE + 0x18000)
00995 #define LPC_UART3_BASE        (LPC_APB1_BASE + 0x1C000)
00996 #define LPC_I2C2_BASE         (LPC_APB1_BASE + 0x20000)
00997 #define LPC_I2S_BASE          (LPC_APB1_BASE + 0x28000)
00998 #define LPC_RIT_BASE          (LPC_APB1_BASE + 0x30000)
00999 #define LPC_MCPWM_BASE        (LPC_APB1_BASE + 0x38000)
01000 #define LPC_QEI_BASE          (LPC_APB1_BASE + 0x3C000)
01001 #define LPC_SC_BASE           (LPC_APB1_BASE + 0x7C000)
01002
01003 /* AHB peripherals                                                            */
01004 #define LPC_EMAC_BASE         (LPC_AHB_BASE  + 0x00000)
01005 #define LPC_GPDMA_BASE        (LPC_AHB_BASE  + 0x04000)
01006 #define LPC_GPDMACH0_BASE     (LPC_AHB_BASE  + 0x04100)
01007 #define LPC_GPDMACH1_BASE     (LPC_AHB_BASE  + 0x04120)
01008 #define LPC_GPDMACH2_BASE     (LPC_AHB_BASE  + 0x04140)
01009 #define LPC_GPDMACH3_BASE     (LPC_AHB_BASE  + 0x04160)
01010 #define LPC_GPDMACH4_BASE     (LPC_AHB_BASE  + 0x04180)
01011 #define LPC_GPDMACH5_BASE     (LPC_AHB_BASE  + 0x041A0)
01012 #define LPC_GPDMACH6_BASE     (LPC_AHB_BASE  + 0x041C0)
01013 #define LPC_GPDMACH7_BASE     (LPC_AHB_BASE  + 0x041E0)
01014 #define LPC_USB_BASE          (LPC_AHB_BASE  + 0x0C000)
01015
01016 /* GPIOs                                                                      */
01017 #define LPC_GPIO0_BASE        (LPC_GPIO_BASE + 0x00000)
01018 #define LPC_GPIO1_BASE        (LPC_GPIO_BASE + 0x00020)
01019 #define LPC_GPIO2_BASE        (LPC_GPIO_BASE + 0x00040)
01020 #define LPC_GPIO3_BASE        (LPC_GPIO_BASE + 0x00060)
01021 #define LPC_GPIO4_BASE        (LPC_GPIO_BASE + 0x00080)
01022
01023 /******************************************************************************/
01024 /*                         Peripheral declaration                             */
01025 /******************************************************************************/
01026 #define LPC_SC                ((LPC_SC_TypeDef        *) LPC_SC_BASE       )
01027 #define LPC_GPIO0             ((LPC_GPIO_TypeDef      *) LPC_GPIO0_BASE    )
01028 #define LPC_GPIO1             ((LPC_GPIO_TypeDef      *) LPC_GPIO1_BASE    )
01029 #define LPC_GPIO2             ((LPC_GPIO_TypeDef      *) LPC_GPIO2_BASE    )
01030 #define LPC_GPIO3             ((LPC_GPIO_TypeDef      *) LPC_GPIO3_BASE    )
01031 #define LPC_GPIO4             ((LPC_GPIO_TypeDef      *) LPC_GPIO4_BASE    )
01032 #define LPC_WDT               ((LPC_WDT_TypeDef       *) LPC_WDT_BASE      )
01033 #define LPC_TIM0              ((LPC_TIM_TypeDef       *) LPC_TIM0_BASE     )
01034 #define LPC_TIM1              ((LPC_TIM_TypeDef       *) LPC_TIM1_BASE     )
01035 #define LPC_TIM2              ((LPC_TIM_TypeDef       *) LPC_TIM2_BASE     )
01036 #define LPC_TIM3              ((LPC_TIM_TypeDef       *) LPC_TIM3_BASE     )
01037 #define LPC_RIT               ((LPC_RIT_TypeDef       *) LPC_RIT_BASE      )
01038 #define LPC_UART0             ((LPC_UART_TypeDef      *) LPC_UART0_BASE    )
01039 #define LPC_UART1             ((LPC_UART1_TypeDef     *) LPC_UART1_BASE    )
01040 #define LPC_UART2             ((LPC_UART_TypeDef      *) LPC_UART2_BASE    )
01041 #define LPC_UART3             ((LPC_UART_TypeDef      *) LPC_UART3_BASE    )
01042 #define LPC_PWM1              ((LPC_PWM_TypeDef       *) LPC_PWM1_BASE     )
01043 #define LPC_I2C0              ((LPC_I2C_TypeDef       *) LPC_I2C0_BASE     )
01044 #define LPC_I2C1              ((LPC_I2C_TypeDef       *) LPC_I2C1_BASE     )
01045 #define LPC_I2C2              ((LPC_I2C_TypeDef       *) LPC_I2C2_BASE     )
01046 #define LPC_I2S               ((LPC_I2S_TypeDef       *) LPC_I2S_BASE      )
01047 #define LPC_SPI               ((LPC_SPI_TypeDef       *) LPC_SPI_BASE      )
01048 #define LPC_RTC               ((LPC_RTC_TypeDef       *) LPC_RTC_BASE      )
01049 #define LPC_GPIOINT           ((LPC_GPIOINT_TypeDef   *) LPC_GPIOINT_BASE  )
01050 #define LPC_PINCON            ((LPC_PINCON_TypeDef    *) LPC_PINCON_BASE   )
01051 #define LPC_SSP0              ((LPC_SSP_TypeDef       *) LPC_SSP0_BASE     )
01052 #define LPC_SSP1              ((LPC_SSP_TypeDef       *) LPC_SSP1_BASE     )
01053 #define LPC_ADC               ((LPC_ADC_TypeDef       *) LPC_ADC_BASE      )
01054 #define LPC_DAC               ((LPC_DAC_TypeDef       *) LPC_DAC_BASE      )
01055 #define LPC_CANAF_RAM         ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE)
01056 #define LPC_CANAF             ((LPC_CANAF_TypeDef     *) LPC_CANAF_BASE    )
01057 #define LPC_CANCR             ((LPC_CANCR_TypeDef     *) LPC_CANCR_BASE    )
01058 #define LPC_CAN1              ((LPC_CAN_TypeDef       *) LPC_CAN1_BASE     )
01059 #define LPC_CAN2              ((LPC_CAN_TypeDef       *) LPC_CAN2_BASE     )
01060 #define LPC_MCPWM             ((LPC_MCPWM_TypeDef     *) LPC_MCPWM_BASE    )
01061 #define LPC_QEI               ((LPC_QEI_TypeDef       *) LPC_QEI_BASE      )
01062 #define LPC_EMAC              ((LPC_EMAC_TypeDef      *) LPC_EMAC_BASE     )
01063 #define LPC_GPDMA             ((LPC_GPDMA_TypeDef     *) LPC_GPDMA_BASE    )
01064 #define LPC_GPDMACH0          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH0_BASE )
01065 #define LPC_GPDMACH1          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH1_BASE )
01066 #define LPC_GPDMACH2          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH2_BASE )
01067 #define LPC_GPDMACH3          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH3_BASE )
01068 #define LPC_GPDMACH4          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH4_BASE )
01069 #define LPC_GPDMACH5          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH5_BASE )
01070 #define LPC_GPDMACH6          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH6_BASE )
01071 #define LPC_GPDMACH7          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH7_BASE )
01072 #define LPC_USB               ((LPC_USB_TypeDef       *) LPC_USB_BASE      )
01073
01078 #endif  // __LPC17xx_H__
Generated on Mon Nov 28 2011 11:14:41 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/LedBlinky/LedBlinky.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/LedBlinky/LedBlinky.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          LedBlinky.c                             2010-05-21
00003 */
00025 #include "lpc17xx_gpio.h"
00026 #include "lpc17xx_libcfg.h"
00027
00028 /* Example group ----------------------------------------------------------- */
00035 /************************** PRIVATE DEFINITIONS *************************/
00036 #define MCB_LPC_1768
00037 //#define IAR_LPC_1768
00038
00039 #ifdef MCB_LPC_1768
00040  /* Number of user LEDs */
00041 #define LED_NUM     8
00042 const unsigned long led_mask[] = { 1<<28, 1<<29, 1UL<<31, 1<<2, 1<<3, 1<<4, 1<<5, 1<<6 };
00043 #endif
00044
00045 /************************** PRIVATE VARIABLES *************************/
00046 /* SysTick Counter */
00047 volatile unsigned long SysTickCnt;
00048
00049 /************************** PRIVATE FUNCTIONS *************************/
00050 void SysTick_Handler (void);
00051
00052 void Delay (unsigned long tick);
00053
00054 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00055 /*********************************************************************/
00060 void SysTick_Handler (void) {
00061   SysTickCnt++;
00062 }
00063
00064 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00065 /*********************************************************************/
00070 void Delay (unsigned long tick) {
00071   unsigned long systickcnt;
00072
00073   systickcnt = SysTickCnt;
00074   while ((SysTickCnt - systickcnt) < tick);
00075 }
00076
00077 /*-------------------------MAIN FUNCTION------------------------------*/
00078 /*********************************************************************/
00083 int c_entry (void) {                       /* Main Program                       */
00084   int num = -1;
00085   int dir =  1;
00086
00087   SysTick_Config(SystemCoreClock/1000 - 1); /* Generate interrupt each 1 ms   */
00088
00089 #ifdef MCB_LPC_1768
00090   GPIO_SetDir(1, 0xB0000000, 1);           /* LEDs on PORT1 defined as Output    */
00091   GPIO_SetDir(2, 0x0000007C, 1);           /* LEDs on PORT2 defined as Output    */
00092
00093   GPIO_ClearValue(1, 0xB0000000);
00094   GPIO_ClearValue(2, 0x0000007C);
00095 #elif defined(IAR_LPC_1768)
00096   GPIO_SetDir(1, (1<<25), 1);
00097   GPIO_ClearValue(1, (1<<25));
00098 #endif
00099
00100
00101   for (;;) {                            /* Loop forever                       */
00102 #ifdef MCB_LPC_1768
00103     /* Calculate 'num': 0,1,...,LED_NUM-1,LED_NUM-1,...,1,0,0,...             */
00104     num += dir;
00105     if (num == LED_NUM) { dir = -1; num =  LED_NUM-1; }
00106     else if   (num < 0) { dir =  1; num =  0;         }
00107
00108     if (num < 3){
00109         GPIO_SetValue(1, led_mask[num]);
00110         Delay(500);                         /* Delay 500ms                        */
00111         GPIO_ClearValue(1, led_mask[num]);
00112         Delay(500);                         /* Delay 500ms                        */
00113     }
00114     else {
00115         GPIO_SetValue(2, led_mask[num]);
00116         Delay(500);                         /* Delay 500ms                        */
00117         GPIO_ClearValue(2, led_mask[num]);
00118         Delay(500);                         /* Delay 500ms                        */
00119     }
00120 #elif defined(IAR_LPC_1768)
00121   GPIO_SetValue(1,(1<<25));
00122   Delay(500);
00123   GPIO_ClearValue(1,(1<<25));
00124   Delay(500);
00125 #endif
00126   }
00127
00128 }
00129
00130
00131 /* With ARM and GHS toolsets, the entry point is main() - this will
00132    allow the linker to generate wrapper code to setup stacks, allocate
00133    heap area, and initialize and copy code and data segments. For GNU
00134    toolsets, the entry point is through __start() in the crt0_gnu.asm
00135    file, and that startup code will setup stacks and data */
00136 int main(void)
00137 {
00138     return c_entry();
00139 }
00140
00141 #ifdef  DEBUG
00142 /*******************************************************************************
00143 * @brief                Reports the name of the source file and the source line number
00144 *                               where the CHECK_PARAM error has occurred.
00145 * @param[in]    file Pointer to the source file name
00146 * @param[in]    line assert_param error line source number
00147 * @return               None
00148 *******************************************************************************/
00149 void check_failed(uint8_t *file, uint32_t line)
00150 {
00151         /* User can add his own implementation to report the file name and line number,
00152          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00153
00154         /* Infinite loop */
00155         while(1);
00156 }
00157 #endif
00158
00159 /*
00160  * @}
00161  */
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/MCPWM/MCPWMSimple/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/MCPWM/MCPWMSimple/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033
00034 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00035    the "CHECK_PARAM" macro in the FW library code */
00036
00037 #define DEBUG
00038
00039
00040 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00041
00042 /* Comment the line below to disable the specific peripheral inclusion */
00043
00044 /* DEBUG_FRAMWORK ------------------------------ */
00045 #define _DBGFWK
00046
00047 /* GPIO ------------------------------- */
00048 //#define _GPIO
00049
00050 /* EXTI ------------------------------- */
00051 //#define _EXTI
00052
00053 /* UART ------------------------------- */
00054 #define _UART
00055 #define _UART0
00056 //#define _UART1
00057 //#define _UART2
00058 //#define _UART3
00059
00060 /* SPI ------------------------------- */
00061 //#define _SPI
00062
00063 /* SSP ------------------------------- */
00064 //#define _SSP
00065 //#define _SSP0
00066 //#define _SSP1
00067
00068 /* SYSTICK --------------------------- */
00069 //#define _SYSTICK
00070
00071 /* I2C ------------------------------- */
00072 //#define _I2C
00073 //#define _I2C0
00074 //#define _I2C1
00075 //#define _I2C2
00076
00077 /* TIMER ------------------------------- */
00078 //#define _TIM
00079
00080 /* WDT ------------------------------- */
00081 //#define _WDT
00082
00083
00084 /* GPDMA ------------------------------- */
00085 //#define _GPDMA
00086
00087
00088 /* DAC ------------------------------- */
00089 //#define _DAC
00090
00091 /* DAC ------------------------------- */
00092 //#define _ADC
00093
00094
00095 /* PWM ------------------------------- */
00096 //#define _PWM
00097 //#define _PWM1
00098
00099 /* RTC ------------------------------- */
00100 //#define _RTC
00101
00102 /* I2S ------------------------------- */
00103 //#define _I2S
00104
00105 /* USB device ------------------------------- */
00106 //#define _USBDEV
00107 //#define _USB_DMA
00108
00109 /* QEI ------------------------------- */
00110 //#define _QEI
00111
00112 /* MCPWM ------------------------------- */
00113 #define _MCPWM
00114
00115 /* CAN--------------------------------*/
00116 //#define _CAN
00117
00118 /* RIT ------------------------------- */
00119 //#define _RIT
00120
00121 /* EMAC ------------------------------ */
00122 //#define _EMAC
00123
00124 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00125
00126 /* Comment the line below to disable the specific peripheral inclusion */
00127
00128 /* UART ------------------------------- */
00129 #define _UART
00130 #define _UART0
00131
00132 /* SPI ------------------------------- */
00133 //#define _SPI
00134
00135 /* SSP ------------------------------- */
00136 //#define _SSP
00137 //#define _SSP0
00138 //#define _SSP1
00139
00140
00141 /* I2C ------------------------------- */
00142 //#define _I2C
00143 //#define _I2C0
00144 //#define _I2C1
00145 //#define _I2C2
00146
00147 /* TIMER ------------------------------- */
00148 #define _TIM
00149
00150 /* WDT ------------------------------- */
00151 //#define _WDT
00152
00153
00154 /* GPDMA ------------------------------- */
00155 //#define _GPDMA
00156
00157
00158 /* DAC ------------------------------- */
00159 //#define _DAC
00160
00161 /* DAC ------------------------------- */
00162 //#define _ADC
00163
00164
00165 /* PWM ------------------------------- */
00166 //#define _PWM
00167 //#define _PWM1
00168
00169 /* RTC ------------------------------- */
00170 //#define _RTC
00171
00172 /* I2S ------------------------------- */
00173 //#define _I2S
00174
00175 /* USB device ------------------------------- */
00176 //#define _USBDEV
00177 //#define _USB_DMA
00178
00179 /* QEI ------------------------------- */
00180 #define _QEI
00181
00182 /* MCPWM ------------------------------- */
00183 #define _MCPWM
00184
00185
00186 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00187
00188 #ifdef  DEBUG
00189 /*******************************************************************************
00190 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00191 *                               It is used only if the library is compiled in DEBUG mode.
00192 * @param[in]    expr - If expr is false, it calls check_failed() function
00193 *                       which reports the name of the source file and the source
00194 *                       line number of the call that failed.
00195 *                    - If expr is true, it returns no value.
00196 * @return               None
00197 *******************************************************************************/
00198 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00199 #else
00200 #define CHECK_PARAM(expr)
00201 #endif /* DEBUG */
00202
00203
00204
00205 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00206
00207 #ifdef  DEBUG
00208 void check_failed(uint8_t *file, uint32_t line);
00209 #endif
00210
00211
00212 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:44 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/lcdtest.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/lcdtest.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lcdtest.c                               2010-06-18
00003 */
00025 #include "drv_glcd.h"
00026 #include "glcd_ll.h"
00027 #include "lpc17xx_nvic.h"
00028 #include "core_cm3.h"
00029 #include "lpc17xx_clkpwr.h"
00030 #include "lpc17xx_libcfg.h"
00031 #include "NXP_logo.h"
00032 #include "lpc17xx_timer.h"
00033 #include "lpc17xx_adc.h"
00034 #include "lpc17xx_pinsel.h"
00035 #include "lpc17xx_gpio.h"
00036
00037 /* Example group ----------------------------------------------------------- */
00043 /************************** PRIVATE DEFINITIONS *************************/
00044 #define TIMER0_TICK_PER_SEC   20
00045
00046 /************************** PUBLIC DEFINITIONS *************************/
00047 extern FontType_t Terminal_6_8_6;
00048 extern FontType_t Terminal_9_12_6;
00049 extern FontType_t Terminal_18_24_12;
00050
00051 /************************** PRIVATE DEFINITIONS *************************/
00052 volatile Bool CntrSel = FALSE;
00053
00054 /*variable for clitical section entry control*/
00055 uint32_t CriticalSecCntr;
00056
00057 /************************** PRIVATE FUNCTIONS *************************/
00058 /* Interrupt service routine */
00059 void TIMER0_IRQHandler (void);
00060
00061 void Dly100us(void *arg);
00062
00063
00064 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00065 /*********************************************************************/
00070 void TIMER0_IRQHandler (void)
00071 {
00072         //check BUT1
00073         if(!(GPIO_ReadValue(0)&(1<<23)))
00074         {
00075                 CntrSel = FALSE;
00076         }
00077         //Check BUT2
00078         else if (!(GPIO_ReadValue(2)&(1<<13)))
00079         {
00080                 CntrSel = TRUE;
00081         }
00082   // clear interrupt
00083         TIM_ClearIntPending(LPC_TIM0, TIM_MR0_INT);
00084         NVIC_ClearPendingIRQ(TIMER0_IRQn);
00085 }
00086 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00087 /*********************************************************************/
00092 void Dly100us(void *arg)
00093 {
00094         volatile uint32_t Dly = (uint32_t)arg, Dly100;
00095         for(;Dly;Dly--)
00096     for(Dly100 = 500; Dly100; Dly100--);
00097 }
00098
00099 /*-------------------------MAIN FUNCTION------------------------------*/
00100 /*********************************************************************/
00105 int c_entry(void)
00106 {
00107         Bool SelHold;
00108         uint32_t AdcData, timer_tick;
00109         PINSEL_CFG_Type PinCfg;
00110         TIM_TIMERCFG_Type TimerCfg;
00111         TIM_MATCHCFG_Type MatchCfg;
00112
00113         // But 0,1 init
00114         GPIO_SetDir(0, (1<<23), 0); //Setting BUT0 (P0.23) as input
00115         GPIO_SetDir(2, (1<<13), 0); //Setting BUT1 (P2.13) as input
00116
00117         /* ADC Pin select
00118          * P1.31 as AD0.5
00119          */
00120         PinCfg.Funcnum = 3;
00121         PinCfg.OpenDrain = 0;
00122         PinCfg.Pinmode = 2; //Pin has neither pull-up nor pull-down
00123         PinCfg.Pinnum = 31;
00124         PinCfg.Portnum = 1;
00125         PINSEL_ConfigPin(&PinCfg);
00126
00127         // Enable ADC clock
00128         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCAD, ENABLE);
00129
00130         /* Initialize ADC peripheral */
00131         ADC_Init(LPC_ADC, 100000);
00132
00133         /* Enable ADC channel 5 */
00134         ADC_ChannelCmd (LPC_ADC, 5, ENABLE);
00135
00136         /* Start ADC */
00137         ADC_StartCmd(LPC_ADC, ADC_START_NOW);
00138
00139         /* Initialize TIMER0
00140          * Timer channel: TIMER0
00141          * Timer mode: every rising PCLK edge
00142          * Prescale option: TICKVAL
00143          * Prescale value = 0
00144          */
00145         TimerCfg.PrescaleOption = TIM_PRESCALE_TICKVAL;
00146         TimerCfg.PrescaleValue = 0;
00147         TIM_Init(LPC_TIM0, TIM_COUNTER_RISING_MODE, &TimerCfg);
00148
00149         //disable timer counter
00150         TIM_Cmd(LPC_TIM0, DISABLE);
00151
00152         /* Initalize Match MR0
00153          * - Enable interrupt
00154          * - Enable reset
00155          * - Disable stop
00156          * - Match value = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_TIMER0)/(TIMER0_TICK_PER_SEC)
00157          */
00158         timer_tick = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_TIMER0)/(TIMER0_TICK_PER_SEC);
00159         MatchCfg.MatchChannel = 0;
00160         MatchCfg.IntOnMatch = ENABLE;
00161         MatchCfg.ResetOnMatch = ENABLE;
00162         MatchCfg.StopOnMatch = DISABLE;
00163         MatchCfg.ExtMatchOutputType = TIM_EXTMATCH_NOTHING;
00164         MatchCfg.MatchValue = timer_tick;
00165         TIM_ConfigMatch(LPC_TIM0,&MatchCfg);
00166
00167         // Clear MR0 interrupt pending
00168         TIM_ClearIntPending(LPC_TIM0, TIM_MR0_INT);
00169
00170         //Enable TIMER0 interrupt
00171         NVIC_EnableIRQ(TIMER0_IRQn);
00172
00173         // Enable TIMER0 counter
00174         TIM_Cmd(LPC_TIM0, ENABLE);
00175
00176         // GLCD init
00177         GLCD_PowerUpInit((unsigned char *)NXP_Logo.pPicStream);
00178         GLCD_Backlight(BACKLIGHT_ON);
00179
00180         GLCD_SetFont(&Terminal_9_12_6,0x000F00,0x00FF0);
00181         GLCD_SetWindow(10,116,131,131);
00182         GLCD_TextSetPos(0,0);
00183
00184         if(CntrSel)
00185         {
00186                 SelHold = TRUE;
00187                 GLCD_print("\fContrast adj.\r");
00188         }
00189         else
00190         {
00191                 SelHold = FALSE;
00192                 GLCD_print("\fBacklight adj.\r");
00193         }
00194
00195         while(1)
00196         {
00197                 AdcData = ADC_GlobalGetData(LPC_ADC);
00198                 if(AdcData & (1UL << 31))
00199                 {
00200                         //AD0 start conversion
00201                         ADC_StartCmd(LPC_ADC, ADC_START_NOW);
00202                         AdcData >>= 10;
00203                         AdcData  &= 0xFF;
00204                         if(SelHold)
00205                         {
00206                                 // Contract adj
00207                                 GLCD_SendCmd(SETCON,(unsigned char *)&AdcData,0);
00208                         }
00209                         else
00210                         {
00211                                 // Backlight adj
00212                                 AdcData >>= 1;
00213                                 GLCD_Backlight(AdcData);
00214                         }
00215                 }
00216                 if(SelHold != CntrSel)
00217                 {
00218                         SelHold ^= 1;
00219                         if(SelHold)
00220                         {
00221                                 GLCD_print("\fContrast adj.\r");
00222                         }
00223                         else
00224                         {
00225                                 GLCD_print("\fBacklight adj.\r");
00226                         }
00227                 }
00228         }
00229 }
00230
00231 /* With ARM and GHS toolsets, the entry point is main() - this will
00232    allow the linker to generate wrapper code to setup stacks, allocate
00233    heap area, and initialize and copy code and data segments. For GNU
00234    toolsets, the entry point is through __start() in the crt0_gnu.asm
00235    file, and that startup code will setup stacks and data */
00236 int main(void)
00237 {
00238     return c_entry();
00239 }
00240
00241 #ifdef  DEBUG
00242 /*******************************************************************************
00243 * @brief                Reports the name of the source file and the source line number
00244 *                               where the CHECK_PARAM error has occurred.
00245 * @param[in]    file Pointer to the source file name
00246 * @param[in]    line assert_param error line source number
00247 * @return               None
00248 *******************************************************************************/
00249 void check_failed(uint8_t *file, uint32_t line)
00250 {
00251         /* User can add his own implementation to report the file name and line number,
00252          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00253
00254         /* Infinite loop */
00255         while(1);
00256 }
00257 #endif
00258
00259 /*
00260  * @}
00261  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/Priority/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/Priority/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 #define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:44 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/VecTable_Relocation/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/VecTable_Relocation/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 #define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 #define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:44 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/NXP_logo.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/NXP_logo.c
Go to the documentation of this file.
00001 /*************************************************************************
00002  *    File name   : NXP_logo.c
00003  *    Description : NXP Logo picture
00004  **************************************************************************/
00005 #include "NXP_logo.h"
00006
00007 const unsigned char NXP_LogoStream[] = {
00008         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00009         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00010         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00011         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00012         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00013         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00014         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00015         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00016         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00017         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00018         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00019         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00020         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00021         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00022         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00023         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00024         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00025         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00026         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00027         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00028         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00029         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00030         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00031         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00032         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00033         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00034         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00035         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00036         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00037         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00038         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00039         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00040         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00041         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00042         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00043         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00044         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00045         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00046         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00047         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00048         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00049         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00050         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00051         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00052         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00053         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00054         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00055         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00056         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00057         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00058         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00059         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00060         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00061         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00062         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00063         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00064         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00065         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00066         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00067         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00068         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00069         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00070         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00071         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00072         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00073         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00074         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00075         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00076         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00077         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00078         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00079         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00080         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00081         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00082         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00083         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00084         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00085         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00086         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00087         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00088         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00089         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00090         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00091         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00092         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00093         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00094         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00095         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00096         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00097         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00098         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00099         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00100         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00101         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00102         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00103         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00104         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00105         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00106         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00107         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00108         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00109         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00110         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00111         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00112         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00113         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00114         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00115         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00116         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00117         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00118         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00119         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00120         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00121         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00122         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00123         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00124         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00125         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00126         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00127         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00128         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00129         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00130         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00131         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00132         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00133         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00134         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00135         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00136         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00137         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00138         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00139         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00140         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00141         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00142         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00143         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00144         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00145         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00146         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00147         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00148         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00149         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00150         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00151         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00152         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00153         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00154         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00155         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00156         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00157         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00158         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00159         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00160         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00161         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00162         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00163         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00164         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00165         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00166         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00167         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00168         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00169         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00170         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00171         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00172         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00173         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00174         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00175         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00176         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00177         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00178         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00179         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00180         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00181         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00182         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00183         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00184         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00185         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00186         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00187         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00188         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00189         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00190         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00191         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00192         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00193         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00194         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00195         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00196         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00197         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00198         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00199         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00200         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00201         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00202         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00203         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00204         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00205         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00206         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00207         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00208         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00209         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00210         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00211         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00212         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00213         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00214         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00215         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00216         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00217         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00218         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00219         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00220         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00221         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00222         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00223         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00224         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00225         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00226         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00227         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00228         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00229         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00230         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00231         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00232         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00233         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00234         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00235         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00236         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00237         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00238         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00239         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00240         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00241         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00242         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00243         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00244         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00245         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00246         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00247         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00248         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00249         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00250         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00251         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00252         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00253         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00254         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00255         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00256         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00257         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00258         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00259         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00260         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00261         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00262         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00263         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00264         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00265         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00266         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00267         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00268         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00269         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00270         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00271         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00272         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00273         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00274         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00275         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00276         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00277         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00278         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00279         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00280         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00281         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00282         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00283         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00284         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00285         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00286         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00287         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00288         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00289         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00290         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00291         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00292         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00293         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00294         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00295         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00296         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00297         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00298         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00299         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00300         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00301         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00302         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00303         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00304         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00305         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00306         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00307         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00308         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00309         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00310         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00311         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00312         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00313         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00314         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00315         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00316         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00317         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00318         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00319         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00320         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00321         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00322         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00323         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00324         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00325         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00326         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00327         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00328         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00329         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00330         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00331         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00332         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00333         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00334         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00335         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00336         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00337         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00338         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00339         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00340         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00341         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00342         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00343         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00344         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00345         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00346         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00347         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00348         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00349         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00350         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00351         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00352         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00353         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00354         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00355         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00356         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00357         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00358         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00359         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00360         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00361         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00362         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00363         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00364         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00365         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00366         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00367         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00368         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00369         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00370         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00371         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00372         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00373         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00374         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00375         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00376         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00377         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00378         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00379         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00380         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00381         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00382         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00383         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00384         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00385         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00386         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00387         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00388         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00389         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00390         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00391         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00392         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00393         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00394         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00395         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00396         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00397         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00398         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00399         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00400         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00401         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00402         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00403         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00404         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00405         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00406         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00407         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00408         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00409         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00410         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00411         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00412         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00413         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00414         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00415         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00416         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00417         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00418         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00419         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00420         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00421         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00422         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00423         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00424         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00425         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00426         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00427         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00428         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00429         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00430         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00431         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00432         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00433         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00434         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00435         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00436         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00437         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00438         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00439         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00440         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00441         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00442         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00443         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00444         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00445         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00446         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00447         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00448         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00449         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00450         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00451         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00452         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00453         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00454         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00455         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00456         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00457         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00458         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00459         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00460         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00461         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00462         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00463         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00464         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00465         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00466         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00467         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00468         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00469         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00470         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00471         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00472         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00473         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00474         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00475         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00476         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00477         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00478         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00479         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00480         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00481         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00482         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00483         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00484         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00485         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00486         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00487         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00488         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00489         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00490         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00491         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00492         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00493         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00494         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00495         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00496         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00497         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00498         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00499         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00500         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00501         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00502         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00503         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00504         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00505         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00506         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00507         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00508         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00509         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00510         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00511         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00512         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00513         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00514         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00515         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00516         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00517         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00518         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00519         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00520         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00521         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00522         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00523         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00524         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00525         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00526         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00527         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00528         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00529         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00530         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00531         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00532         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00533         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00534         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00535         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00536         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00537         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00538         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00539         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00540         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00541         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00542         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00543         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00544         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00545         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00546         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00547         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00548         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00549         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00550         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00551         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00552         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00553         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00554         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00555         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00556         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00557         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00558         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00559         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00560         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00561         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00562         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00563         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00564         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00565         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00566         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00567         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00568         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00569         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00570         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00571         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00572         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00573         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00574         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00575         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00576         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00577         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00578         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00579         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00580         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00581         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00582         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00583         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00584         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00585         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00586         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00587         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00588         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00589         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00590         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00591         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00592         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00593         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00594         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00595         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00596         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00597         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00598         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00599         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00600         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00601         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00602         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00603         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00604         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00605         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00606         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00607         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
00608         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00609         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00610         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00611         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00612         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00613         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00614         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00615         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00616         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00617         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00618         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00619         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00620         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00621         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00622         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00623         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00624         0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00625         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00626         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00627         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00628         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00629         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00630         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00631         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00632         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00633         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00634         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00635         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00636         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00637         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00638         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00639         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00640         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00641         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00642         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00643         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00644         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00645         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00646         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
00647         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00648         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00649         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00650         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00651         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00652         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00653         0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00654         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00655         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00656         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00657         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00658         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00659         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00660         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00661         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00662         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00663         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00664         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00665         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00666         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00667         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00668         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00669         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00670         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00671         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00672         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00673         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00674         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00675         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00676         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00677         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00678         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00679         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00680         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00681         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00682         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00683         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00684         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00685         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00686         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00687         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00688         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F,
00689         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00690         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00691         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00692         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00693         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00694         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00695         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00696         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00697         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00698         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00699         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00700         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00701         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00702         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00703         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00704         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00705         0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00706         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00707         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00708         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00709         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00710         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00711         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00712         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00713         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00714         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00715         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00716         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00717         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
00718         0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
00719         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00720         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00721         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFE, 0x0F, 0xFE, 0x0F,
00722         0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00723         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xED, 0x0F, 0xED, 0x0F, 0xEE, 0x0F, 0xFE, 0x0F,
00724         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F,
00725         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00726         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00727         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0E,
00728         0xFD, 0x0E, 0xFD, 0x0E, 0xFE, 0x0E, 0xFE, 0x0E, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
00729         0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00730         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00731         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00732         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00733         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00734         0xFA, 0x0F, 0xFA, 0x0F, 0xFA, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFC, 0x0F,
00735         0xEB, 0x0F, 0xFD, 0x0F, 0xED, 0x0F, 0xFE, 0x0F, 0xEE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00736         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00737         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00738         0xFF, 0x0F, 0xFE, 0x0E, 0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xEC, 0x0F, 0xEC, 0x0F, 0xFC, 0x0F,
00739         0xFD, 0x0F, 0xFD, 0x0F, 0xED, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
00740         0xEC, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E,
00741         0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00742         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00743         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0E,
00744         0xFE, 0x0E, 0xFE, 0x0E, 0xFD, 0x0E, 0xFC, 0x0E, 0xFC, 0x0E, 0xFD, 0x0F, 0xFE, 0x0F, 0xFD, 0x0E,
00745         0xFD, 0x0E, 0xFD, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F, 0xFD, 0x0E, 0xFE, 0x0F, 0xEE, 0x0E,
00746         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00747         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00748         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00749         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00750         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xB5, 0x0D, 0xB5, 0x0D, 0xB5, 0x0D, 0xB5, 0x0D,
00751         0xB5, 0x0D, 0xB5, 0x0D, 0xB6, 0x0E, 0xB6, 0x0D, 0xB7, 0x0D, 0xC8, 0x0E, 0xB9, 0x0D, 0xEC, 0x0F,
00752         0xED, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00753         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00754         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFC, 0x0F,
00755         0xDA, 0x0E, 0xA7, 0x0B, 0x95, 0x0A, 0x96, 0x0A, 0x86, 0x0A, 0x86, 0x09, 0x86, 0x09, 0x86, 0x09,
00756         0x96, 0x09, 0x96, 0x09, 0x95, 0x09, 0x95, 0x09, 0x96, 0x0A, 0x96, 0x0A, 0x97, 0x09, 0x98, 0x09,
00757         0xA9, 0x0A, 0xBB, 0x0A, 0xBC, 0x0B, 0xCD, 0x0B, 0xFF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E,
00758         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00759         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0E, 0xDD, 0x0C,
00760         0xBB, 0x0A, 0xBB, 0x0A, 0xBA, 0x0A, 0xA8, 0x09, 0x97, 0x08, 0xA7, 0x08, 0xA6, 0x08, 0xA6, 0x08,
00761         0xA6, 0x08, 0xA6, 0x09, 0xA7, 0x09, 0x97, 0x09, 0xA7, 0x09, 0xA6, 0x09, 0x95, 0x09, 0x94, 0x08,
00762         0xA5, 0x09, 0xA7, 0x0A, 0xEC, 0x0D, 0xEE, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00763         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00764         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00765         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00766         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00767         0xB2, 0x0D, 0xB2, 0x0D, 0xB2, 0x0D, 0xB2, 0x0D, 0xB2, 0x0D, 0xB2, 0x0D, 0xB2, 0x0D, 0xB3, 0x0D,
00768         0xA3, 0x0D, 0xB5, 0x0D, 0xA6, 0x0C, 0xDA, 0x0F, 0xEC, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00769         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00770         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00771         0xFD, 0x0F, 0xFD, 0x0F, 0xFC, 0x0F, 0xEA, 0x0F, 0xC8, 0x0E, 0x95, 0x0B, 0x73, 0x0A, 0x73, 0x09,
00772         0x84, 0x09, 0x84, 0x09, 0x85, 0x09, 0x85, 0x08, 0x84, 0x08, 0x84, 0x08, 0x84, 0x09, 0x84, 0x09,
00773         0x84, 0x08, 0x74, 0x08, 0x75, 0x08, 0x76, 0x08, 0x88, 0x08, 0x9A, 0x09, 0xAB, 0x09, 0xBC, 0x09,
00774         0xEE, 0x0C, 0xFF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00775         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00776         0xFF, 0x0F, 0xFF, 0x0E, 0xEF, 0x0D, 0xCC, 0x0B, 0xAA, 0x08, 0xAA, 0x09, 0xA9, 0x08, 0x86, 0x07,
00777         0x86, 0x07, 0x85, 0x07, 0x94, 0x07, 0x94, 0x07, 0x94, 0x07, 0x94, 0x07, 0x85, 0x07, 0x85, 0x07,
00778         0x84, 0x07, 0x83, 0x07, 0x92, 0x08, 0x82, 0x07, 0x93, 0x08, 0xA6, 0x0A, 0xEC, 0x0E, 0xFE, 0x0F,
00779         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00780         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00781         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00782         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00783         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xB1, 0x0E, 0xB1, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E,
00784         0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E, 0xB3, 0x0D, 0xB5, 0x0D, 0xE9, 0x0F,
00785         0xFC, 0x0F, 0xFD, 0x0F, 0xEE, 0x0F, 0xEE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00786         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
00787         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFC, 0x0F, 0xEA, 0x0F, 0xC7, 0x0E,
00788         0xB5, 0x0D, 0xA4, 0x0D, 0x93, 0x0C, 0x72, 0x0A, 0x72, 0x09, 0x73, 0x09, 0x84, 0x09, 0x74, 0x08,
00789         0x73, 0x08, 0x83, 0x08, 0x83, 0x08, 0x72, 0x08, 0x83, 0x09, 0x84, 0x08, 0x85, 0x08, 0x87, 0x08,
00790         0x99, 0x09, 0xAB, 0x09, 0xAB, 0x09, 0xAB, 0x08, 0xCD, 0x0A, 0xEF, 0x0C, 0xFF, 0x0E, 0xFF, 0x0E,
00791         0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00792         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xEF, 0x0D, 0xDE, 0x0B, 0xAC, 0x09,
00793         0xAA, 0x08, 0xAA, 0x09, 0xA9, 0x08, 0x97, 0x07, 0x85, 0x06, 0x84, 0x06, 0x93, 0x06, 0x93, 0x07,
00794         0x93, 0x07, 0x93, 0x07, 0x84, 0x07, 0x84, 0x07, 0x84, 0x07, 0x82, 0x07, 0x91, 0x08, 0x91, 0x08,
00795         0xA3, 0x09, 0xB6, 0x0A, 0xEB, 0x0E, 0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00796         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00797         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00798         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00799         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00800         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E,
00801         0xB1, 0x0E, 0xB2, 0x0D, 0xB4, 0x0D, 0xE9, 0x0F, 0xFB, 0x0F, 0xFD, 0x0F, 0xEE, 0x0F, 0xFF, 0x0F,
00802         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00803         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00804         0xFC, 0x0F, 0xEA, 0x0F, 0xC7, 0x0E, 0xA4, 0x0D, 0xA3, 0x0D, 0xB4, 0x0F, 0xA3, 0x0E, 0x81, 0x0B,
00805         0x71, 0x0A, 0x83, 0x09, 0x83, 0x09, 0x84, 0x09, 0x83, 0x09, 0x83, 0x09, 0x83, 0x09, 0x82, 0x09,
00806         0x82, 0x08, 0x73, 0x08, 0x74, 0x08, 0x86, 0x08, 0x99, 0x08, 0xAB, 0x09, 0xAC, 0x08, 0x9B, 0x08,
00807         0xAC, 0x09, 0xDE, 0x0B, 0xFF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F,
00808         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E,
00809         0xFF, 0x0E, 0xDF, 0x0C, 0xBC, 0x09, 0xAB, 0x08, 0xAA, 0x08, 0xAA, 0x08, 0xA9, 0x08, 0x97, 0x06,
00810         0x95, 0x06, 0x94, 0x07, 0x93, 0x07, 0x93, 0x07, 0x93, 0x07, 0x93, 0x07, 0x94, 0x07, 0x94, 0x07,
00811         0x94, 0x08, 0x92, 0x07, 0x90, 0x07, 0xA1, 0x08, 0xB3, 0x0A, 0xC6, 0x0B, 0xFB, 0x0F, 0xFD, 0x0F,
00812         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00813         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00814         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00815         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00816         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
00817         0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB2, 0x0D, 0xB4, 0x0D, 0xE9, 0x0F,
00818         0xEB, 0x0F, 0xED, 0x0F, 0xEE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00819         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00820         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xEA, 0x0F, 0xC6, 0x0E, 0xA3, 0x0D, 0xA2, 0x0D,
00821         0xB2, 0x0F, 0xB2, 0x0F, 0xA2, 0x0E, 0xA2, 0x0D, 0x81, 0x0A, 0x72, 0x09, 0x73, 0x09, 0x83, 0x09,
00822         0x83, 0x09, 0x83, 0x08, 0x72, 0x09, 0x82, 0x09, 0x82, 0x09, 0x82, 0x08, 0x84, 0x08, 0x86, 0x08,
00823         0x99, 0x08, 0xAB, 0x09, 0xAD, 0x09, 0xAC, 0x08, 0xAC, 0x08, 0xBD, 0x09, 0xEE, 0x0C, 0xFF, 0x0E,
00824         0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
00825         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xCE, 0x0B, 0xAC, 0x09, 0xAC, 0x08,
00826         0xAB, 0x08, 0xBB, 0x08, 0xA9, 0x07, 0x97, 0x06, 0x95, 0x06, 0x93, 0x06, 0x92, 0x06, 0x92, 0x06,
00827         0x92, 0x06, 0x92, 0x06, 0x83, 0x07, 0x83, 0x07, 0x92, 0x07, 0x81, 0x07, 0x90, 0x07, 0xA1, 0x09,
00828         0xC3, 0x0B, 0xC5, 0x0B, 0xEA, 0x0E, 0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00829         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00830         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00831         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00832         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00833         0xA1, 0x0E, 0xA1, 0x0E, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E,
00834         0xB1, 0x0E, 0xB3, 0x0E, 0xB4, 0x0D, 0xE9, 0x0F, 0xEC, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00835         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00836         0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFC, 0x0F,
00837         0xE8, 0x0F, 0xC4, 0x0D, 0xB2, 0x0D, 0xB2, 0x0F, 0xB2, 0x0F, 0xA0, 0x0F, 0xA1, 0x0E, 0xA2, 0x0E,
00838         0x92, 0x0C, 0x82, 0x0A, 0x72, 0x09, 0x83, 0x09, 0x83, 0x09, 0x83, 0x09, 0x72, 0x09, 0x82, 0x09,
00839         0x92, 0x09, 0x82, 0x09, 0x84, 0x08, 0x86, 0x08, 0x99, 0x08, 0xAB, 0x09, 0xAD, 0x09, 0xAD, 0x08,
00840         0xAC, 0x08, 0xAC, 0x08, 0xCD, 0x0A, 0xEF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F,
00841         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E,
00842         0xCD, 0x0B, 0xBD, 0x09, 0xAC, 0x08, 0xAC, 0x08, 0xAB, 0x08, 0xBB, 0x08, 0xA9, 0x07, 0x86, 0x05,
00843         0x96, 0x06, 0x94, 0x06, 0x93, 0x06, 0xA2, 0x07, 0x92, 0x07, 0x92, 0x07, 0x93, 0x07, 0x94, 0x07,
00844         0x92, 0x07, 0x91, 0x07, 0xB1, 0x09, 0xC2, 0x0B, 0xD4, 0x0C, 0xC5, 0x0C, 0xEA, 0x0E, 0xFD, 0x0F,
00845         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00846         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00847         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00848         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00849         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F,
00850         0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB2, 0x0E, 0xB4, 0x0D, 0xE9, 0x0F,
00851         0xFC, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00852         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00853         0xFE, 0x0F, 0xFE, 0x0F, 0xED, 0x0F, 0xEA, 0x0F, 0xB4, 0x0D, 0xB2, 0x0D, 0xB1, 0x0D, 0xB1, 0x0E,
00854         0xB1, 0x0F, 0xA0, 0x0F, 0xB1, 0x0F, 0xB2, 0x0F, 0xA2, 0x0D, 0x81, 0x0B, 0x71, 0x09, 0x82, 0x09,
00855         0x83, 0x09, 0x83, 0x08, 0x83, 0x09, 0x83, 0x09, 0x82, 0x09, 0x82, 0x09, 0x84, 0x08, 0x86, 0x08,
00856         0x98, 0x08, 0xAB, 0x08, 0xAC, 0x08, 0xAC, 0x07, 0xAD, 0x08, 0xAC, 0x07, 0xBC, 0x09, 0xDE, 0x0C,
00857         0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00858         0xFE, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xAB, 0x08, 0xAC, 0x08, 0xAD, 0x08, 0xAC, 0x08,
00859         0xAB, 0x07, 0xBB, 0x08, 0xA9, 0x07, 0x96, 0x06, 0x95, 0x06, 0x93, 0x06, 0x93, 0x06, 0x93, 0x06,
00860         0x92, 0x06, 0x92, 0x06, 0x93, 0x07, 0x93, 0x07, 0x92, 0x07, 0x91, 0x08, 0xB1, 0x09, 0xC1, 0x0B,
00861         0xC2, 0x0B, 0xB4, 0x0B, 0xEA, 0x0E, 0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00862         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00863         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00864         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00865         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00866         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
00867         0xB0, 0x0E, 0xB1, 0x0E, 0xB4, 0x0D, 0xE9, 0x0F, 0xFC, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
00868         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0E, 0xFE, 0x0E, 0xFE, 0x0E, 0xFE, 0x0E,
00869         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F, 0xED, 0x0F, 0xFD, 0x0F, 0xDA, 0x0F, 0xB6, 0x0D,
00870         0xA3, 0x0D, 0xB1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E,
00871         0xB1, 0x0E, 0x91, 0x0C, 0x80, 0x0A, 0x71, 0x09, 0x82, 0x09, 0x83, 0x09, 0x83, 0x08, 0x84, 0x09,
00872         0x83, 0x09, 0x83, 0x09, 0x84, 0x08, 0x85, 0x07, 0x98, 0x08, 0xAA, 0x08, 0xBC, 0x08, 0xAC, 0x07,
00873         0xAD, 0x08, 0xAD, 0x08, 0xAC, 0x08, 0xBD, 0x09, 0xEF, 0x0D, 0xFF, 0x0E, 0xFE, 0x0E, 0xFE, 0x0E,
00874         0xFF, 0x0F, 0xEE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0D, 0xDD, 0x0B,
00875         0xAB, 0x08, 0xBC, 0x08, 0xAC, 0x07, 0xAC, 0x08, 0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06,
00876         0xA4, 0x07, 0x93, 0x06, 0x94, 0x06, 0x94, 0x06, 0x93, 0x07, 0x92, 0x07, 0x92, 0x07, 0x91, 0x07,
00877         0x81, 0x07, 0xB2, 0x0A, 0xC1, 0x0A, 0xD2, 0x0C, 0xC2, 0x0B, 0xC3, 0x0B, 0xFB, 0x0F, 0xFE, 0x0F,
00878         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00879         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00880         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00881         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00882         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F,
00883         0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0E, 0xB3, 0x0D, 0xE9, 0x0F,
00884         0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
00885         0xFE, 0x0E, 0xFE, 0x0E, 0xFE, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F,
00886         0xEC, 0x0F, 0xDA, 0x0F, 0xC7, 0x0F, 0xA4, 0x0D, 0xB2, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E,
00887         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xA1, 0x0D, 0x90, 0x0B, 0x80, 0x0A,
00888         0x71, 0x09, 0x83, 0x09, 0x84, 0x08, 0x84, 0x08, 0x83, 0x09, 0x74, 0x09, 0x84, 0x08, 0x85, 0x07,
00889         0x98, 0x08, 0xAA, 0x08, 0xBC, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAD, 0x07, 0xBD, 0x08,
00890         0xDE, 0x0B, 0xFF, 0x0D, 0xFF, 0x0E, 0xFE, 0x0E, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00891         0xFF, 0x0E, 0xFF, 0x0E, 0xDE, 0x0C, 0xBC, 0x09, 0xAB, 0x07, 0xBC, 0x07, 0xAC, 0x07, 0xAD, 0x07,
00892         0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06, 0x94, 0x07, 0x93, 0x06, 0x94, 0x06, 0x84, 0x07,
00893         0x93, 0x07, 0x92, 0x07, 0x91, 0x07, 0x90, 0x07, 0xA1, 0x08, 0xC3, 0x0A, 0xC1, 0x0B, 0xD1, 0x0C,
00894         0xC1, 0x0B, 0xC2, 0x0B, 0xEA, 0x0E, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00895         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00896         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xEF, 0x0F, 0xEF, 0x0F, 0xEF, 0x0F, 0xFF, 0x0F,
00897         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xEE, 0x0F, 0xEE, 0x0F,
00898         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00899         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
00900         0xB0, 0x0E, 0xB1, 0x0E, 0xB3, 0x0D, 0xE9, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00901         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0E, 0xFE, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E,
00902         0xFF, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xEA, 0x0F, 0xC7, 0x0E, 0xB4, 0x0D, 0xA2, 0x0D,
00903         0xB1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E,
00904         0xB1, 0x0E, 0xB1, 0x0E, 0xA1, 0x0D, 0x80, 0x0A, 0x81, 0x09, 0x82, 0x09, 0x83, 0x09, 0x83, 0x08,
00905         0x73, 0x09, 0x74, 0x09, 0x84, 0x08, 0x86, 0x08, 0x98, 0x08, 0xAA, 0x08, 0xBC, 0x08, 0xAC, 0x07,
00906         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x08, 0xBC, 0x09, 0xEE, 0x0C, 0xFF, 0x0E, 0xFF, 0x0E,
00907         0xFE, 0x0F, 0xFF, 0x0F, 0xEF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xCC, 0x0A, 0xAB, 0x07,
00908         0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06,
00909         0x94, 0x06, 0x93, 0x07, 0x95, 0x07, 0x85, 0x07, 0x93, 0x07, 0x92, 0x07, 0x91, 0x08, 0x90, 0x07,
00910         0xB2, 0x0A, 0xC3, 0x0B, 0xC1, 0x0B, 0xD1, 0x0B, 0xC1, 0x0B, 0xC3, 0x0B, 0xF9, 0x0F, 0xFC, 0x0F,
00911         0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00912         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00913         0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
00914         0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00915         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F,
00916         0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0E, 0xB3, 0x0D, 0xE9, 0x0F,
00917         0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
00918         0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xEB, 0x0F,
00919         0xC7, 0x0F, 0xB5, 0x0E, 0xA3, 0x0D, 0xA1, 0x0E, 0xB1, 0x0F, 0xB0, 0x0F, 0xA0, 0x0E, 0xB0, 0x0E,
00920         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xA0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0F, 0xB2, 0x0E, 0x91, 0x0C,
00921         0x81, 0x0A, 0x82, 0x09, 0x83, 0x09, 0x83, 0x09, 0x73, 0x09, 0x74, 0x09, 0x75, 0x08, 0x86, 0x08,
00922         0x98, 0x08, 0xAA, 0x08, 0xBC, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAC, 0x08,
00923         0xAB, 0x08, 0xCD, 0x0A, 0xFF, 0x0D, 0xFF, 0x0E, 0xFE, 0x0E, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F,
00924         0xFF, 0x0E, 0xDE, 0x0C, 0xAB, 0x08, 0xAB, 0x07, 0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
00925         0xAC, 0x07, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06, 0x94, 0x07, 0x93, 0x07, 0x85, 0x07, 0x95, 0x07,
00926         0x93, 0x07, 0x91, 0x07, 0x90, 0x08, 0xA0, 0x09, 0xC2, 0x0B, 0xC3, 0x0B, 0xC1, 0x0B, 0xD1, 0x0C,
00927         0xC1, 0x0B, 0xD3, 0x0C, 0xF8, 0x0F, 0xFA, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFC, 0x0F,
00928         0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F,
00929         0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFA, 0x0F,
00930         0xFA, 0x0F, 0xFA, 0x0F, 0xFA, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F,
00931         0xFC, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00932         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
00933         0xB0, 0x0E, 0xB1, 0x0E, 0xB4, 0x0D, 0xE9, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0E,
00934         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F,
00935         0xFE, 0x0F, 0xFD, 0x0F, 0xEB, 0x0F, 0xC8, 0x0E, 0xB4, 0x0D, 0xB2, 0x0D, 0xB1, 0x0E, 0xB1, 0x0E,
00936         0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0E, 0xA0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E,
00937         0xB0, 0x0F, 0xB1, 0x0F, 0xB2, 0x0E, 0xA2, 0x0D, 0x91, 0x0B, 0x71, 0x09, 0x72, 0x08, 0x83, 0x09,
00938         0x73, 0x09, 0x74, 0x09, 0x75, 0x08, 0x86, 0x08, 0x98, 0x08, 0xAA, 0x08, 0xBC, 0x08, 0xAC, 0x07,
00939         0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xBD, 0x08, 0xAB, 0x07, 0xAB, 0x08, 0xDE, 0x0B, 0xFF, 0x0E,
00940         0xFE, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xEF, 0x0E, 0xEF, 0x0D, 0xAC, 0x09, 0xAB, 0x07, 0xBC, 0x08,
00941         0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xBA, 0x08, 0xA9, 0x08, 0x85, 0x06,
00942         0x94, 0x07, 0x93, 0x07, 0x85, 0x07, 0x95, 0x07, 0x93, 0x07, 0x80, 0x07, 0xA0, 0x08, 0xC1, 0x0A,
00943         0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xD1, 0x0C, 0xC1, 0x0B, 0xC1, 0x0B, 0xD4, 0x0D, 0xD6, 0x0D,
00944         0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0D, 0xD6, 0x0D, 0xD6, 0x0D, 0xD6, 0x0D, 0xD6, 0x0C, 0xD6, 0x0C,
00945         0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C,
00946         0xD6, 0x0C, 0xD5, 0x0C, 0xD5, 0x0C, 0xD5, 0x0C, 0xD5, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C,
00947         0xD6, 0x0C, 0xD7, 0x0D, 0xD8, 0x0D, 0xE8, 0x0D, 0xE9, 0x0E, 0xEA, 0x0E, 0xFB, 0x0F, 0xFC, 0x0F,
00948         0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F,
00949         0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0E, 0xB4, 0x0D, 0xE9, 0x0F,
00950         0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0E, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
00951         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xEC, 0x0F, 0xD8, 0x0F, 0xB5, 0x0D,
00952         0xA2, 0x0D, 0xB1, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
00953         0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA1, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E,
00954         0xA2, 0x0C, 0x81, 0x0A, 0x71, 0x09, 0x83, 0x09, 0x73, 0x09, 0x74, 0x09, 0x75, 0x08, 0x86, 0x08,
00955         0x98, 0x08, 0xAA, 0x08, 0xBC, 0x08, 0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xBD, 0x08,
00956         0xAC, 0x08, 0x9B, 0x07, 0xCD, 0x0A, 0xEF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xEF, 0x0D,
00957         0xDE, 0x0B, 0x9B, 0x08, 0xAC, 0x08, 0xBD, 0x08, 0xAD, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
00958         0xAC, 0x07, 0xBA, 0x08, 0xA9, 0x08, 0x85, 0x06, 0x94, 0x07, 0x93, 0x07, 0x84, 0x07, 0x95, 0x07,
00959         0x92, 0x07, 0x90, 0x07, 0xA0, 0x09, 0xD1, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0C, 0xD2, 0x0C,
00960         0xC0, 0x0B, 0xC1, 0x0B, 0xC2, 0x0C, 0xC2, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B,
00961         0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B,
00962         0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B,
00963         0xC2, 0x0B, 0xC2, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B,
00964         0xC5, 0x0C, 0xD6, 0x0C, 0xE8, 0x0E, 0xFA, 0x0F, 0xFC, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
00965         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
00966         0xB0, 0x0E, 0xB1, 0x0E, 0xB4, 0x0D, 0xE9, 0x0F, 0xED, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0E,
00967         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
00968         0xEC, 0x0F, 0xD9, 0x0F, 0xB5, 0x0E, 0xA3, 0x0D, 0xA1, 0x0D, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F,
00969         0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
00970         0xA0, 0x0F, 0xA0, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E, 0xA2, 0x0D, 0x92, 0x0B, 0x81, 0x0A, 0x82, 0x09,
00971         0x73, 0x09, 0x74, 0x09, 0x74, 0x08, 0x86, 0x08, 0x98, 0x08, 0xAA, 0x08, 0xBC, 0x08, 0xAC, 0x07,
00972         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAD, 0x08, 0xAC, 0x08, 0xAC, 0x08, 0xCE, 0x0A,
00973         0xEE, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xDF, 0x0C, 0xBD, 0x09, 0xAC, 0x08, 0xAD, 0x08, 0xBD, 0x08,
00974         0xAD, 0x07, 0xBE, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xBA, 0x08, 0xA9, 0x08, 0x85, 0x06,
00975         0x94, 0x07, 0x94, 0x07, 0x84, 0x07, 0x84, 0x07, 0x92, 0x08, 0xA1, 0x08, 0xC0, 0x0A, 0xD1, 0x0B,
00976         0xC1, 0x0B, 0xC1, 0x0B, 0xC2, 0x0C, 0xD2, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0B,
00977         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xD1, 0x0C, 0xD1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0B,
00978         0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B,
00979         0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC2, 0x0B,
00980         0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC4, 0x0C, 0xD6, 0x0C,
00981         0xE9, 0x0E, 0xFB, 0x0E, 0xFC, 0x0F, 0xFD, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F,
00982         0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0E, 0xB4, 0x0D, 0xE9, 0x0F,
00983         0xED, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
00984         0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFC, 0x0F, 0xD9, 0x0F, 0xC6, 0x0E, 0xA2, 0x0D, 0xA1, 0x0D,
00985         0xB1, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
00986         0xA0, 0x0F, 0xA0, 0x0E, 0xA0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA1, 0x0E, 0xB1, 0x0E,
00987         0xB2, 0x0D, 0xA2, 0x0C, 0x91, 0x0A, 0x71, 0x09, 0x82, 0x0A, 0x73, 0x09, 0x74, 0x08, 0x86, 0x08,
00988         0x98, 0x08, 0xAA, 0x08, 0xBC, 0x08, 0xAC, 0x07, 0xAC, 0x07, 0xBD, 0x07, 0xAC, 0x07, 0xAC, 0x07,
00989         0xAD, 0x08, 0xAC, 0x08, 0xAC, 0x08, 0xBC, 0x09, 0xDD, 0x0B, 0xEF, 0x0D, 0xEF, 0x0C, 0xCE, 0x0B,
00990         0x9B, 0x07, 0xAD, 0x08, 0xBD, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xBE, 0x07, 0xAE, 0x07, 0xAD, 0x07,
00991         0xAC, 0x07, 0xBB, 0x08, 0xA9, 0x08, 0x85, 0x06, 0x83, 0x07, 0x94, 0x07, 0x94, 0x08, 0x83, 0x07,
00992         0x91, 0x08, 0xB1, 0x0A, 0xC0, 0x0B, 0xD0, 0x0B, 0xD0, 0x0B, 0xC1, 0x0B, 0xC2, 0x0C, 0xC2, 0x0C,
00993         0xC0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C,
00994         0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
00995         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
00996         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0B, 0xC1, 0x0C, 0xC2, 0x0C, 0xC2, 0x0C,
00997         0xC2, 0x0C, 0xC2, 0x0B, 0xC2, 0x0B, 0xB3, 0x0B, 0xD7, 0x0C, 0xE9, 0x0D, 0xFB, 0x0E, 0xFC, 0x0F,
00998         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
00999         0xB0, 0x0E, 0xB2, 0x0E, 0xB4, 0x0D, 0xEA, 0x0F, 0xED, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0E,
01000         0xFF, 0x0F, 0xFF, 0x0F, 0xEF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xED, 0x0F, 0xEC, 0x0F, 0xEA, 0x0F,
01001         0xC6, 0x0E, 0xB3, 0x0E, 0xB2, 0x0D, 0xB1, 0x0E, 0xB1, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01002         0xA0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F,
01003         0xB0, 0x0F, 0xB1, 0x0F, 0xB1, 0x0F, 0xA1, 0x0E, 0xB2, 0x0E, 0xB3, 0x0E, 0xA2, 0x0C, 0x70, 0x09,
01004         0x72, 0x0A, 0x73, 0x09, 0x74, 0x09, 0x85, 0x08, 0x98, 0x08, 0xAA, 0x08, 0xBC, 0x08, 0xBC, 0x07,
01005         0xBD, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x08, 0xAC, 0x08,
01006         0xBC, 0x09, 0xFF, 0x0D, 0xDE, 0x0B, 0x9B, 0x07, 0xAC, 0x08, 0xAD, 0x08, 0xAC, 0x07, 0xAD, 0x07,
01007         0xAD, 0x07, 0xBE, 0x07, 0xAE, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xBB, 0x08, 0xA9, 0x08, 0x85, 0x06,
01008         0x83, 0x07, 0x93, 0x08, 0x83, 0x07, 0x82, 0x07, 0xA2, 0x09, 0xC2, 0x0B, 0xD0, 0x0B, 0xC0, 0x0B,
01009         0xD0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C,
01010         0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01011         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01012         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01013         0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC2, 0x0C,
01014         0xB4, 0x0B, 0xC6, 0x0B, 0xD8, 0x0D, 0xFA, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F,
01015         0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB2, 0x0E, 0xB4, 0x0D, 0xEA, 0x0F,
01016         0xED, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F,
01017         0xFD, 0x0F, 0xFC, 0x0F, 0xEA, 0x0F, 0xC6, 0x0E, 0xB3, 0x0D, 0xB2, 0x0D, 0xB1, 0x0E, 0xB1, 0x0F,
01018         0xB1, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB1, 0x0F,
01019         0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA1, 0x0E,
01020         0xB1, 0x0E, 0xB2, 0x0E, 0xA2, 0x0D, 0x91, 0x0B, 0x71, 0x0A, 0x73, 0x0A, 0x84, 0x09, 0x85, 0x08,
01021         0x98, 0x08, 0xAA, 0x08, 0xBC, 0x08, 0xBC, 0x07, 0xBD, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01022         0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x08, 0xAC, 0x08, 0xBC, 0x08, 0xDD, 0x0A, 0xBD, 0x09, 0x9C, 0x07,
01023         0xAD, 0x08, 0xAD, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xBE, 0x07, 0xAE, 0x07, 0xAD, 0x07,
01024         0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06, 0x94, 0x07, 0x92, 0x07, 0x82, 0x07, 0x92, 0x08,
01025         0xB2, 0x0A, 0xC2, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xD0, 0x0C, 0xD0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01026         0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01027         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C,
01028         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01029         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01030         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC2, 0x0C, 0xC3, 0x0B, 0xC4, 0x0B, 0xD6, 0x0C, 0xE8, 0x0D,
01031         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
01032         0xB0, 0x0E, 0xB2, 0x0E, 0xB4, 0x0D, 0xEA, 0x0F, 0xED, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
01033         0xFF, 0x0F, 0xFF, 0x0F, 0xEF, 0x0F, 0xED, 0x0F, 0xFC, 0x0F, 0xEA, 0x0F, 0xC6, 0x0F, 0xB3, 0x0D,
01034         0xA2, 0x0D, 0xA1, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA1, 0x0F,
01035         0xA0, 0x0F, 0xA0, 0x0E, 0xA0, 0x0E, 0xB1, 0x0F, 0xB1, 0x0F, 0xA1, 0x0E, 0xA0, 0x0E, 0xB1, 0x0F,
01036         0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB2, 0x0D, 0xA2, 0x0D,
01037         0x70, 0x0A, 0x82, 0x0A, 0x83, 0x09, 0x85, 0x08, 0x98, 0x08, 0xBB, 0x09, 0xBC, 0x08, 0xAC, 0x07,
01038         0xAD, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAD, 0x08, 0xAC, 0x08,
01039         0xAC, 0x07, 0xBC, 0x08, 0xAC, 0x07, 0xAC, 0x07, 0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xBD, 0x07,
01040         0xAD, 0x07, 0xBE, 0x07, 0xAE, 0x07, 0xAD, 0x07, 0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06,
01041         0xA4, 0x08, 0x81, 0x07, 0x81, 0x07, 0xB3, 0x0A, 0xC3, 0x0B, 0xC1, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B,
01042         0xD0, 0x0C, 0xD0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01043         0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01044         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01045         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01046         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C,
01047         0xC2, 0x0B, 0xC3, 0x0B, 0xC4, 0x0B, 0xD5, 0x0C, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F,
01048         0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB2, 0x0E, 0xB4, 0x0D, 0xEA, 0x0F,
01049         0xED, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEF, 0x0F, 0xEE, 0x0F, 0xFD, 0x0F,
01050         0xEA, 0x0F, 0xC7, 0x0E, 0xB3, 0x0D, 0xA2, 0x0D, 0xB1, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F,
01051         0xA0, 0x0F, 0xA0, 0x0F, 0xA1, 0x0F, 0xB1, 0x0F, 0xB1, 0x0F, 0xA0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E,
01052         0xB1, 0x0E, 0xA1, 0x0E, 0xA1, 0x0E, 0xB1, 0x0F, 0xB1, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01053         0xB1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E, 0x91, 0x0B, 0x82, 0x0A, 0x72, 0x09, 0x84, 0x08,
01054         0x98, 0x08, 0xAB, 0x09, 0xBC, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xBD, 0x07,
01055         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAC, 0x08, 0xBC, 0x08, 0xAC, 0x07, 0xAC, 0x07, 0xAD, 0x08,
01056         0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAD, 0x07, 0xBE, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01057         0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06, 0x93, 0x08, 0x80, 0x07, 0x91, 0x08, 0xC3, 0x0B,
01058         0xD2, 0x0B, 0xC1, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01059         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01060         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01061         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01062         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01063         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD1, 0x0C, 0xC2, 0x0B, 0xC2, 0x0B, 0xC3, 0x0B,
01064         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
01065         0xB0, 0x0E, 0xB2, 0x0E, 0xB4, 0x0D, 0xEA, 0x0F, 0xED, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01066         0xFF, 0x0F, 0xEE, 0x0F, 0xED, 0x0F, 0xEB, 0x0F, 0xD8, 0x0F, 0xB4, 0x0D, 0xA1, 0x0D, 0xB1, 0x0E,
01067         0xB1, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0F,
01068         0xA1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xA1, 0x0E, 0xA1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0F, 0xA1, 0x0E,
01069         0xB1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0F, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E,
01070         0xA2, 0x0D, 0x81, 0x0B, 0x72, 0x09, 0x84, 0x08, 0x98, 0x09, 0xAA, 0x08, 0xAC, 0x08, 0xAC, 0x07,
01071         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xAC, 0x07, 0xAD, 0x08, 0xAC, 0x07,
01072         0xBD, 0x08, 0xAC, 0x07, 0xBD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAD, 0x08, 0xBD, 0x08, 0xAC, 0x07,
01073         0xAD, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06,
01074         0x92, 0x07, 0x90, 0x07, 0xB1, 0x09, 0xD2, 0x0B, 0xC2, 0x0B, 0xC1, 0x0B, 0xD1, 0x0B, 0xC0, 0x0B,
01075         0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01076         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01077         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01078         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01079         0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C,
01080         0xC1, 0x0B, 0xC1, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F,
01081         0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB2, 0x0E, 0xB4, 0x0D, 0xEA, 0x0F,
01082         0xED, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFC, 0x0F, 0xD8, 0x0F,
01083         0xC5, 0x0E, 0xB2, 0x0D, 0xB1, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F,
01084         0xB1, 0x0F, 0xB1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E,
01085         0xB2, 0x0E, 0xB2, 0x0E, 0xB2, 0x0E, 0xA1, 0x0E, 0xA1, 0x0E, 0xA0, 0x0E, 0xA0, 0x0F, 0xB0, 0x0F,
01086         0xB0, 0x0F, 0xB1, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E, 0x91, 0x0C, 0x82, 0x09, 0x84, 0x08,
01087         0x97, 0x09, 0xAA, 0x08, 0xAC, 0x08, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x07,
01088         0xAC, 0x07, 0xAC, 0x07, 0xAC, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xBD, 0x07, 0xBE, 0x08, 0xAD, 0x07,
01089         0xAD, 0x07, 0xAD, 0x07, 0xBD, 0x08, 0xAC, 0x07, 0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01090         0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06, 0x92, 0x07, 0xA1, 0x09, 0xC2, 0x0B, 0xD2, 0x0B,
01091         0xC1, 0x0B, 0xC1, 0x0B, 0xD1, 0x0C, 0xC1, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xD0, 0x0C, 0xD0, 0x0C,
01092         0xD0, 0x0C, 0xC1, 0x0C, 0xC2, 0x0C, 0xC2, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01093         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01094         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01095         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01096         0xC0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0B, 0xC1, 0x0B, 0xC1, 0x0C, 0xC1, 0x0B,
01097         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
01098         0xB0, 0x0E, 0xB2, 0x0E, 0xA4, 0x0D, 0xEA, 0x0F, 0xED, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01099         0xFE, 0x0F, 0xFC, 0x0F, 0xD9, 0x0F, 0xC6, 0x0D, 0xB3, 0x0D, 0xB1, 0x0E, 0xB1, 0x0E, 0xB0, 0x0F,
01100         0xA0, 0x0E, 0xB0, 0x0F, 0xB1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0E,
01101         0xB1, 0x0E, 0xA1, 0x0D, 0xB2, 0x0E, 0xC3, 0x0F, 0xD4, 0x0F, 0xC3, 0x0F, 0xB1, 0x0E, 0xA1, 0x0E,
01102         0xA0, 0x0E, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0E,
01103         0xB1, 0x0E, 0xA2, 0x0D, 0x92, 0x0A, 0x84, 0x09, 0x97, 0x08, 0xAA, 0x09, 0xAC, 0x08, 0xAD, 0x07,
01104         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xBC, 0x07, 0xAC, 0x07, 0xAC, 0x07, 0xAC, 0x08, 0xAC, 0x07,
01105         0xAC, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xBC, 0x08, 0xBC, 0x07,
01106         0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAC, 0x08, 0xAB, 0x08, 0xAA, 0x08, 0x85, 0x06,
01107         0x92, 0x08, 0xC2, 0x0A, 0xD2, 0x0B, 0xD1, 0x0B, 0xC1, 0x0B, 0xD1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B,
01108         0xC0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xC1, 0x0C, 0xC2, 0x0C, 0xC2, 0x0C,
01109         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01110         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01111         0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0B, 0xC0, 0x0B, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xD1, 0x0C,
01112         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01113         0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0B, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F,
01114         0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB2, 0x0E, 0xA4, 0x0D, 0xEA, 0x0F,
01115         0xED, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFC, 0x0F, 0xEA, 0x0F, 0xC6, 0x0E, 0xB4, 0x0D,
01116         0xB1, 0x0D, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xB1, 0x0F, 0xB1, 0x0F, 0xA1, 0x0F,
01117         0xA0, 0x0E, 0xA0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0F, 0xB2, 0x0E, 0xA2, 0x0C, 0xB3, 0x0D, 0xE6, 0x0F,
01118         0xE7, 0x0F, 0xC4, 0x0F, 0xA1, 0x0D, 0xA1, 0x0E, 0xA0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F,
01119         0xA0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0E, 0xA0, 0x0E, 0xB2, 0x0E, 0xA3, 0x0C, 0x83, 0x09,
01120         0x86, 0x08, 0xAA, 0x09, 0xBC, 0x09, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01121         0xAC, 0x07, 0xAC, 0x07, 0xAC, 0x07, 0xAC, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01122         0xBD, 0x08, 0xAD, 0x08, 0xAC, 0x07, 0xBC, 0x07, 0xAC, 0x07, 0xBC, 0x07, 0xAD, 0x07, 0xAD, 0x08,
01123         0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x07, 0xA2, 0x09, 0xD2, 0x0B, 0xD2, 0x0B, 0xC1, 0x0B,
01124         0xD1, 0x0B, 0xD1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C,
01125         0xC1, 0x0C, 0xC2, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B,
01126         0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B,
01127         0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC1, 0x0B,
01128         0xC1, 0x0B, 0xC1, 0x0C, 0xC1, 0x0C, 0xD1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01129         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B,
01130         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01131         0xB2, 0x0F, 0xA2, 0x0D, 0xA4, 0x0C, 0xEA, 0x0F, 0xFC, 0x0F, 0xED, 0x0F, 0xED, 0x0F, 0xFC, 0x0F,
01132         0xE9, 0x0F, 0xC5, 0x0E, 0xB3, 0x0D, 0xB2, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F,
01133         0xB0, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xB1, 0x0F, 0xB1, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0E,
01134         0xA3, 0x0C, 0xB6, 0x0D, 0xD8, 0x0F, 0xEA, 0x0F, 0xF9, 0x0F, 0xB3, 0x0D, 0xA1, 0x0D, 0xB1, 0x0E,
01135         0xB1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F,
01136         0xA0, 0x0E, 0xB2, 0x0F, 0xB3, 0x0D, 0x94, 0x0A, 0x96, 0x09, 0xA9, 0x09, 0xBC, 0x08, 0xAC, 0x07,
01137         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01138         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAC, 0x07,
01139         0xBC, 0x07, 0xAC, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAC, 0x08, 0xAB, 0x08, 0xA8, 0x08, 0xA5, 0x08,
01140         0xC2, 0x0A, 0xD1, 0x0B, 0xD1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xD0, 0x0C, 0xC0, 0x0C,
01141         0xD0, 0x0C, 0xD0, 0x0C, 0xC1, 0x0B, 0xD1, 0x0C, 0xD2, 0x0C, 0xB1, 0x0A, 0xD6, 0x0D, 0xD6, 0x0C,
01142         0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C,
01143         0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD5, 0x0C, 0xD6, 0x0C,
01144         0xD6, 0x0D, 0xD6, 0x0C, 0xD5, 0x0D, 0xD5, 0x0D, 0xD4, 0x0C, 0xC2, 0x0B, 0xC1, 0x0B, 0xC1, 0x0C,
01145         0xD1, 0x0C, 0xD1, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01146         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F,
01147         0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0E, 0xB3, 0x0D, 0xB5, 0x0D, 0xEA, 0x0F,
01148         0xEB, 0x0F, 0xEC, 0x0F, 0xFC, 0x0F, 0xEA, 0x0F, 0xD6, 0x0F, 0xB3, 0x0E, 0xA2, 0x0D, 0xB1, 0x0E,
01149         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB1, 0x0F, 0xB1, 0x0F, 0xA1, 0x0E,
01150         0xA1, 0x0E, 0xB1, 0x0E, 0xB0, 0x0E, 0xA1, 0x0D, 0xC5, 0x0D, 0xD9, 0x0E, 0xEB, 0x0F, 0xFB, 0x0F,
01151         0xEA, 0x0F, 0xB5, 0x0D, 0xB2, 0x0D, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
01152         0xB0, 0x0F, 0xA0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA1, 0x0F, 0xB2, 0x0F, 0xB3, 0x0D, 0xA5, 0x0B,
01153         0xA7, 0x09, 0xA9, 0x08, 0xAB, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01154         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xAC, 0x08,
01155         0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAC, 0x07, 0xAC, 0x07, 0xBC, 0x07, 0xBD, 0x07, 0xAD, 0x08,
01156         0xAD, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0xB6, 0x09, 0xC2, 0x0B, 0xC0, 0x0B, 0xC1, 0x0B, 0xC2, 0x0B,
01157         0xC2, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0B, 0xC1, 0x0B,
01158         0xD2, 0x0C, 0xC3, 0x0B, 0xF9, 0x0F, 0xFA, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F,
01159         0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F,
01160         0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFA, 0x0F, 0xFA, 0x0F,
01161         0xF8, 0x0E, 0xE6, 0x0D, 0xC3, 0x0C, 0xC2, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC0, 0x0C, 0xC0, 0x0C,
01162         0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01163         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01164         0xA1, 0x0E, 0xB3, 0x0E, 0xB5, 0x0D, 0xE9, 0x0F, 0xEA, 0x0F, 0xFB, 0x0F, 0xEA, 0x0F, 0xD8, 0x0E,
01165         0xB4, 0x0E, 0xA1, 0x0D, 0xA1, 0x0D, 0xB1, 0x0E, 0xB1, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F,
01166         0xA0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0F, 0xB1, 0x0E, 0xA1, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E, 0xA3, 0x0D,
01167         0xD8, 0x0E, 0xEB, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F, 0xFA, 0x0F, 0xC5, 0x0E, 0xB2, 0x0D, 0xB0, 0x0D,
01168         0xB0, 0x0E, 0xB1, 0x0F, 0xB1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E,
01169         0xB1, 0x0F, 0xA2, 0x0E, 0xA3, 0x0D, 0xA5, 0x0C, 0xA7, 0x0A, 0xA9, 0x08, 0xAB, 0x08, 0xAC, 0x07,
01170         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01171         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAD, 0x07,
01172         0xBC, 0x07, 0xBC, 0x07, 0xBD, 0x07, 0xAD, 0x08, 0xAC, 0x08, 0xAB, 0x08, 0xB9, 0x09, 0xB6, 0x09,
01173         0xD4, 0x0C, 0xC1, 0x0B, 0xC1, 0x0B, 0xC2, 0x0B, 0xD2, 0x0C, 0xC1, 0x0C, 0xC0, 0x0B, 0xD0, 0x0C,
01174         0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0C, 0xC3, 0x0B, 0xF9, 0x0F, 0xFC, 0x0F,
01175         0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01176         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
01177         0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F, 0xFA, 0x0F, 0xD7, 0x0D, 0xC4, 0x0C,
01178         0xC2, 0x0B, 0xC1, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01179         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F,
01180         0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0E, 0xB2, 0x0E, 0xA4, 0x0D, 0xD8, 0x0F,
01181         0xEA, 0x0F, 0xFA, 0x0F, 0xD8, 0x0F, 0xB4, 0x0C, 0xB2, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E,
01182         0xB1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0F,
01183         0xB2, 0x0E, 0xA2, 0x0D, 0xB4, 0x0D, 0xC7, 0x0E, 0xEA, 0x0F, 0xFC, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
01184         0xFB, 0x0F, 0xC6, 0x0D, 0xB3, 0x0D, 0xB1, 0x0D, 0xB1, 0x0E, 0xB1, 0x0F, 0xB1, 0x0F, 0xA0, 0x0E,
01185         0xA0, 0x0E, 0xB0, 0x0F, 0xB1, 0x0E, 0xB0, 0x0E, 0xA1, 0x0F, 0xA2, 0x0E, 0xA4, 0x0D, 0xA5, 0x0B,
01186         0xA7, 0x09, 0xA9, 0x09, 0xAB, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01187         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01188         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xBC, 0x07, 0xBC, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01189         0xAC, 0x08, 0xAB, 0x08, 0xA8, 0x08, 0xA5, 0x08, 0xD4, 0x0B, 0xD2, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B,
01190         0xC2, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01191         0xC1, 0x0B, 0xC2, 0x0B, 0xF9, 0x0E, 0xFC, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xEF, 0x0F, 0xEF, 0x0F,
01192         0xEF, 0x0F, 0xEF, 0x0F, 0xEF, 0x0F, 0xEF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01193         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F, 0xEE, 0x0F,
01194         0xFD, 0x0F, 0xFC, 0x0F, 0xE9, 0x0E, 0xD6, 0x0D, 0xC3, 0x0B, 0xC1, 0x0B, 0xC0, 0x0C, 0xC0, 0x0C,
01195         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C,
01196         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01197         0xB1, 0x0E, 0xA2, 0x0E, 0xA3, 0x0D, 0xD7, 0x0F, 0xE8, 0x0F, 0xE8, 0x0F, 0xC5, 0x0E, 0xA2, 0x0C,
01198         0xB1, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xA1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F,
01199         0xB0, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB2, 0x0D, 0xA4, 0x0D, 0xC7, 0x0E, 0xEB, 0x0F,
01200         0xFC, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFB, 0x0F, 0xB6, 0x0D, 0xB3, 0x0D, 0xB2, 0x0D,
01201         0xB1, 0x0E, 0xB1, 0x0E, 0xA0, 0x0E, 0xA0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB1, 0x0E, 0xA1, 0x0E,
01202         0xA1, 0x0E, 0xA2, 0x0E, 0xA3, 0x0C, 0x94, 0x0A, 0x97, 0x09, 0xAA, 0x09, 0xBC, 0x08, 0xAC, 0x07,
01203         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01204         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01205         0xBC, 0x07, 0xBC, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x08, 0xAB, 0x08, 0xA8, 0x07, 0x94, 0x07,
01206         0xC3, 0x0A, 0xC2, 0x0B, 0xD2, 0x0C, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C,
01207         0xC0, 0x0B, 0xC0, 0x0C, 0xC1, 0x0C, 0xD1, 0x0C, 0xD1, 0x0C, 0xC3, 0x0B, 0xFA, 0x0F, 0xFD, 0x0F,
01208         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01209         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01210         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEF, 0x0F, 0xEF, 0x0F, 0xFE, 0x0F, 0xEB, 0x0F, 0xD8, 0x0D,
01211         0xC4, 0x0C, 0xC2, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01212         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F,
01213         0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0E, 0xA1, 0x0E, 0xB3, 0x0E, 0xE7, 0x0F,
01214         0xD6, 0x0F, 0xC5, 0x0E, 0xB3, 0x0D, 0xB2, 0x0D, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xA1, 0x0E,
01215         0xA1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0D,
01216         0xB3, 0x0D, 0xC7, 0x0E, 0xEA, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01217         0xFC, 0x0F, 0xB6, 0x0C, 0xB3, 0x0D, 0xB2, 0x0D, 0xB1, 0x0E, 0xB1, 0x0E, 0xA0, 0x0E, 0xA0, 0x0E,
01218         0xB0, 0x0E, 0xB0, 0x0F, 0xB1, 0x0E, 0xA1, 0x0E, 0xA2, 0x0E, 0xA3, 0x0E, 0x93, 0x0C, 0x84, 0x09,
01219         0x86, 0x08, 0xAA, 0x09, 0xBC, 0x08, 0x9C, 0x06, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01220         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01221         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xBD, 0x07, 0xAC, 0x07, 0xBC, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01222         0xBD, 0x08, 0xBB, 0x08, 0xA8, 0x07, 0x84, 0x06, 0xA2, 0x09, 0xC2, 0x0B, 0xD2, 0x0C, 0xC1, 0x0B,
01223         0xC1, 0x0B, 0xD1, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0B, 0xC0, 0x0B,
01224         0xC1, 0x0C, 0xC3, 0x0B, 0xFB, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01225         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01226         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01227         0xFF, 0x0F, 0xFF, 0x0F, 0xFC, 0x0F, 0xE9, 0x0E, 0xC4, 0x0C, 0xC2, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C,
01228         0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01229         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01230         0xB0, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E, 0xD5, 0x0F, 0xC4, 0x0E, 0xB2, 0x0D, 0xB2, 0x0D, 0xB1, 0x0E,
01231         0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0E, 0xA0, 0x0E, 0xA1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
01232         0xA0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB2, 0x0D, 0xC5, 0x0D, 0xEA, 0x0F, 0xED, 0x0F, 0xEE, 0x0F,
01233         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFC, 0x0F, 0xB6, 0x0D, 0xB3, 0x0D, 0xB1, 0x0D,
01234         0xB1, 0x0E, 0xA1, 0x0E, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E,
01235         0xA2, 0x0E, 0x92, 0x0D, 0x82, 0x0A, 0x73, 0x08, 0x97, 0x08, 0xAA, 0x09, 0xBC, 0x08, 0xAC, 0x07,
01236         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01237         0xAD, 0x07, 0xAD, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01238         0xAC, 0x07, 0xBC, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x08, 0xBB, 0x08, 0xA8, 0x08, 0x94, 0x07,
01239         0x92, 0x07, 0xB2, 0x09, 0xC2, 0x0B, 0xD1, 0x0B, 0xC1, 0x0B, 0xD1, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C,
01240         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0B, 0xC0, 0x0B, 0xC1, 0x0B, 0xC3, 0x0B, 0xEB, 0x0F, 0xFE, 0x0F,
01241         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01242         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01243         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFC, 0x0F, 0xFA, 0x0F,
01244         0xC4, 0x0B, 0xC2, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01245         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xA1, 0x0F,
01246         0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0E, 0xA1, 0x0D, 0xC3, 0x0F,
01247         0xB2, 0x0E, 0xA1, 0x0E, 0xB1, 0x0E, 0xB0, 0x0E, 0xA0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0E, 0xA0, 0x0E,
01248         0xB1, 0x0F, 0xB1, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0F, 0xB0, 0x0E, 0xA1, 0x0D, 0xB4, 0x0D,
01249         0xD8, 0x0E, 0xEC, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xEE, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F,
01250         0xEC, 0x0F, 0xB6, 0x0D, 0xB3, 0x0D, 0xB1, 0x0D, 0xB1, 0x0E, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01251         0xA0, 0x0E, 0xA0, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E, 0xA2, 0x0E, 0x92, 0x0C, 0x72, 0x09, 0x74, 0x08,
01252         0x97, 0x08, 0xAA, 0x09, 0xBC, 0x08, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01253         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xBD, 0x07, 0xAD, 0x07,
01254         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xBC, 0x07, 0xBC, 0x07, 0xAD, 0x07, 0xAC, 0x07,
01255         0xAC, 0x07, 0xAB, 0x08, 0xA8, 0x08, 0x95, 0x07, 0x92, 0x07, 0xA2, 0x09, 0xC2, 0x0A, 0xD2, 0x0B,
01256         0xD1, 0x0C, 0xC1, 0x0B, 0xC0, 0x0B, 0xC0, 0x0C, 0xC0, 0x0B, 0xC0, 0x0C, 0xC0, 0x0B, 0xD0, 0x0C,
01257         0xD1, 0x0C, 0xC3, 0x0C, 0xFB, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01258         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01259         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xEF, 0x0F,
01260         0xEF, 0x0F, 0xFE, 0x0F, 0xFC, 0x0F, 0xFA, 0x0F, 0xC4, 0x0B, 0xC1, 0x0B, 0xC0, 0x0B, 0xC0, 0x0C,
01261         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01262         0xB0, 0x0E, 0xB0, 0x0E, 0xA0, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01263         0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E,
01264         0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0E, 0xA0, 0x0E, 0xA0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0F, 0xB1, 0x0E,
01265         0xB1, 0x0E, 0xA2, 0x0D, 0xB4, 0x0D, 0xD8, 0x0F, 0xFB, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
01266         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F, 0xEC, 0x0F, 0xB6, 0x0D, 0xB3, 0x0D, 0xB1, 0x0E,
01267         0xB1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0E, 0xB1, 0x0E, 0xB3, 0x0F,
01268         0x92, 0x0D, 0x82, 0x0B, 0x72, 0x09, 0x74, 0x08, 0x97, 0x08, 0xBB, 0x09, 0xBC, 0x08, 0xAD, 0x07,
01269         0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xBE, 0x08, 0xAD, 0x08, 0xAC, 0x07, 0xBE, 0x08, 0xBD, 0x08,
01270         0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xAD, 0x07, 0xAE, 0x08, 0xBE, 0x08, 0xBE, 0x08, 0xAD, 0x07,
01271         0xAC, 0x07, 0xBC, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xAC, 0x07, 0xBB, 0x08, 0xA8, 0x08, 0x95, 0x07,
01272         0x82, 0x07, 0x91, 0x07, 0xA1, 0x09, 0xC1, 0x0A, 0xD2, 0x0B, 0xC1, 0x0B, 0xC0, 0x0B, 0xD0, 0x0C,
01273         0xC0, 0x0B, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xC1, 0x0B, 0xC4, 0x0C, 0xEB, 0x0E, 0xFE, 0x0F,
01274         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01275         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01276         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEF, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xE9, 0x0E,
01277         0xC4, 0x0B, 0xC2, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C,
01278         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xB0, 0x0E, 0xB0, 0x0E, 0xA0, 0x0F, 0xA1, 0x0F,
01279         0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E,
01280         0xB1, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F,
01281         0xA0, 0x0E, 0xB0, 0x0F, 0xB1, 0x0F, 0xB1, 0x0E, 0xB3, 0x0D, 0xB4, 0x0D, 0xC7, 0x0E, 0xEA, 0x0F,
01282         0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F,
01283         0xEB, 0x0F, 0xB6, 0x0D, 0xB2, 0x0D, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F,
01284         0xA0, 0x0F, 0xB1, 0x0E, 0xB1, 0x0E, 0xA2, 0x0D, 0x81, 0x0C, 0x72, 0x0A, 0x73, 0x09, 0x74, 0x08,
01285         0x98, 0x08, 0xAB, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xBD, 0x08,
01286         0xAC, 0x07, 0xAC, 0x07, 0xBD, 0x08, 0xAD, 0x07, 0xAC, 0x07, 0xAC, 0x07, 0xAC, 0x07, 0xAC, 0x08,
01287         0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01288         0xAC, 0x07, 0xBB, 0x08, 0xA8, 0x07, 0x95, 0x07, 0x83, 0x07, 0x92, 0x07, 0xA1, 0x08, 0xB1, 0x0A,
01289         0xC2, 0x0B, 0xD2, 0x0B, 0xD1, 0x0B, 0xC0, 0x0B, 0xD1, 0x0C, 0xD1, 0x0C, 0xC0, 0x0B, 0xC0, 0x0B,
01290         0xC0, 0x0B, 0xC3, 0x0C, 0xEB, 0x0E, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01291         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01292         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01293         0xEF, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFA, 0x0F, 0xC4, 0x0B, 0xC2, 0x0B, 0xD0, 0x0C, 0xD0, 0x0C,
01294         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01295         0xB0, 0x0E, 0xB0, 0x0E, 0xA0, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01296         0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01297         0xA0, 0x0E, 0xB1, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB2, 0x0D,
01298         0xB4, 0x0D, 0xC7, 0x0E, 0xEA, 0x0F, 0xFC, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01299         0xFE, 0x0E, 0xFE, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F, 0xEB, 0x0F, 0xB5, 0x0D, 0xB2, 0x0E, 0xB0, 0x0E,
01300         0xA0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0E, 0xA0, 0x0E, 0xB1, 0x0F, 0xA2, 0x0E, 0x91, 0x0C,
01301         0x71, 0x0A, 0x72, 0x09, 0x84, 0x09, 0x85, 0x08, 0x98, 0x08, 0xAB, 0x08, 0xAC, 0x07, 0xAD, 0x07,
01302         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xBD, 0x08, 0xAC, 0x08, 0xAC, 0x07, 0xBD, 0x08, 0xAC, 0x07,
01303         0xAC, 0x08, 0xBC, 0x08, 0xBC, 0x08, 0xAC, 0x08, 0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAD, 0x07,
01304         0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xBB, 0x08, 0xA8, 0x07, 0x95, 0x06,
01305         0x94, 0x07, 0x92, 0x07, 0x91, 0x07, 0xA1, 0x08, 0xC2, 0x0A, 0xD2, 0x0B, 0xD1, 0x0C, 0xC0, 0x0B,
01306         0xD1, 0x0C, 0xD1, 0x0C, 0xC0, 0x0B, 0xC0, 0x0C, 0xC1, 0x0B, 0xD4, 0x0C, 0xEA, 0x0F, 0xFE, 0x0F,
01307         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01308         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01309         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEF, 0x0F, 0xFE, 0x0F, 0xFC, 0x0F, 0xE9, 0x0E,
01310         0xC4, 0x0B, 0xC2, 0x0B, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01311         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xB0, 0x0E, 0xB0, 0x0E, 0xA0, 0x0F, 0xA1, 0x0F,
01312         0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E,
01313         0xB1, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0E, 0xB0, 0x0E,
01314         0xB0, 0x0E, 0xB1, 0x0E, 0xB2, 0x0D, 0xB3, 0x0D, 0xC7, 0x0E, 0xDA, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F,
01315         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0E, 0xFE, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F,
01316         0xEB, 0x0F, 0xB5, 0x0D, 0xB2, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0E,
01317         0xA1, 0x0E, 0xB2, 0x0E, 0xA1, 0x0D, 0x81, 0x0B, 0x71, 0x0A, 0x72, 0x09, 0x84, 0x09, 0x86, 0x08,
01318         0x98, 0x08, 0xAB, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAD, 0x08,
01319         0xAC, 0x08, 0xAC, 0x08, 0xAD, 0x08, 0xAC, 0x07, 0xCD, 0x09, 0xCE, 0x0A, 0xCD, 0x0A, 0xAC, 0x08,
01320         0xAC, 0x07, 0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01321         0xAD, 0x08, 0xBC, 0x08, 0xA8, 0x07, 0x95, 0x06, 0x94, 0x07, 0x93, 0x07, 0x92, 0x07, 0x91, 0x07,
01322         0xB2, 0x09, 0xC2, 0x0B, 0xD2, 0x0B, 0xD0, 0x0B, 0xC0, 0x0B, 0xD0, 0x0B, 0xC0, 0x0B, 0xD1, 0x0C,
01323         0xC1, 0x0B, 0xC3, 0x0C, 0xEA, 0x0E, 0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01324         0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01325         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01326         0xFE, 0x0F, 0xFD, 0x0F, 0xFB, 0x0F, 0xE8, 0x0D, 0xC3, 0x0B, 0xC2, 0x0B, 0xD0, 0x0C, 0xD0, 0x0C,
01327         0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01328         0xB0, 0x0E, 0xB0, 0x0E, 0xA1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01329         0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0F, 0xB1, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01330         0xB1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0D, 0xB3, 0x0D, 0xC6, 0x0D,
01331         0xD9, 0x0E, 0xEC, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0E,
01332         0xFE, 0x0E, 0xFE, 0x0F, 0xFF, 0x0F, 0xFD, 0x0F, 0xEB, 0x0F, 0xB5, 0x0D, 0xB2, 0x0D, 0xB0, 0x0E,
01333         0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA1, 0x0F, 0xB2, 0x0F, 0xA2, 0x0D, 0x91, 0x0B, 0x71, 0x0A,
01334         0x82, 0x0A, 0x73, 0x09, 0x84, 0x08, 0x86, 0x07, 0x98, 0x07, 0xBB, 0x08, 0xBC, 0x07, 0xAD, 0x07,
01335         0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAC, 0x08, 0xAD, 0x08, 0xAD, 0x08, 0xAC, 0x08, 0xAC, 0x08,
01336         0xDE, 0x0B, 0xEF, 0x0C, 0xEE, 0x0B, 0xBC, 0x09, 0x9B, 0x07, 0xAD, 0x08, 0xBD, 0x08, 0xAC, 0x07,
01337         0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xBC, 0x08, 0xA9, 0x07, 0x96, 0x06,
01338         0x94, 0x06, 0x93, 0x07, 0x92, 0x07, 0x92, 0x07, 0xA2, 0x08, 0xB2, 0x0A, 0xD1, 0x0B, 0xD1, 0x0B,
01339         0xC0, 0x0B, 0xD0, 0x0B, 0xD1, 0x0B, 0xD1, 0x0C, 0xC1, 0x0B, 0xC3, 0x0B, 0xE9, 0x0E, 0xFC, 0x0F,
01340         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01341         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01342         0xFE, 0x0F, 0xED, 0x0E, 0xFD, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFC, 0x0F, 0xFA, 0x0F, 0xE6, 0x0D,
01343         0xC3, 0x0B, 0xC1, 0x0B, 0xD0, 0x0B, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01344         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xB0, 0x0E, 0xA0, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F,
01345         0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E,
01346         0xA1, 0x0E, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xB1, 0x0F, 0xB1, 0x0E,
01347         0xB1, 0x0D, 0xA2, 0x0C, 0xC5, 0x0D, 0xE9, 0x0F, 0xEB, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
01348         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0E, 0xFE, 0x0E, 0xFE, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01349         0xFB, 0x0F, 0xB5, 0x0D, 0xB2, 0x0D, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0E, 0xA1, 0x0F, 0xB2, 0x0F,
01350         0xB2, 0x0E, 0x92, 0x0C, 0x81, 0x0A, 0x71, 0x09, 0x82, 0x0A, 0x73, 0x09, 0x84, 0x08, 0x86, 0x07,
01351         0x98, 0x07, 0xBB, 0x08, 0xBC, 0x07, 0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x08, 0xAC, 0x08,
01352         0xAD, 0x08, 0xAC, 0x08, 0xAC, 0x07, 0xBD, 0x09, 0xEF, 0x0C, 0xFF, 0x0D, 0xFF, 0x0D, 0xCD, 0x0A,
01353         0xAC, 0x08, 0xAC, 0x08, 0xAD, 0x08, 0xAC, 0x07, 0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07,
01354         0xAD, 0x07, 0xBC, 0x08, 0xA9, 0x07, 0x96, 0x06, 0x94, 0x06, 0x93, 0x07, 0x93, 0x07, 0x92, 0x07,
01355         0x92, 0x07, 0xA2, 0x09, 0xC1, 0x0A, 0xD1, 0x0B, 0xD0, 0x0B, 0xD0, 0x0B, 0xC1, 0x0B, 0xD1, 0x0B,
01356         0xC1, 0x0B, 0xD3, 0x0C, 0xF9, 0x0F, 0xFC, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
01357         0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
01358         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F,
01359         0xFA, 0x0F, 0xF9, 0x0E, 0xE6, 0x0D, 0xC4, 0x0C, 0xC2, 0x0B, 0xC1, 0x0B, 0xD0, 0x0B, 0xD0, 0x0B,
01360         0xD0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0B,
01361         0xA0, 0x0F, 0xA0, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E,
01362         0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xA1, 0x0E, 0xA1, 0x0E, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F,
01363         0xA0, 0x0F, 0xA1, 0x0F, 0xB1, 0x0F, 0xB1, 0x0E, 0xB2, 0x0D, 0xC4, 0x0D, 0xD7, 0x0E, 0xFB, 0x0F,
01364         0xFC, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01365         0xFE, 0x0E, 0xFE, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F, 0xFB, 0x0F, 0xC5, 0x0D, 0xB2, 0x0D, 0xB0, 0x0E,
01366         0xB0, 0x0E, 0xA0, 0x0E, 0xB1, 0x0F, 0xB2, 0x0E, 0xA2, 0x0D, 0x81, 0x0B, 0x71, 0x0A, 0x82, 0x09,
01367         0x83, 0x09, 0x83, 0x09, 0x85, 0x08, 0x86, 0x07, 0x98, 0x07, 0xBB, 0x08, 0xBC, 0x07, 0xAC, 0x07,
01368         0xBD, 0x08, 0xAD, 0x07, 0xAD, 0x08, 0xAC, 0x08, 0xAC, 0x08, 0xAC, 0x08, 0xAD, 0x08, 0xDF, 0x0B,
01369         0xFF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xEE, 0x0C, 0xBD, 0x0A, 0xAC, 0x08, 0xAC, 0x08, 0xAD, 0x08,
01370         0xAC, 0x07, 0xBD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xAD, 0x07, 0xBC, 0x08, 0xA9, 0x07, 0x96, 0x06,
01371         0x94, 0x06, 0x94, 0x07, 0x93, 0x07, 0x93, 0x07, 0x92, 0x07, 0x91, 0x08, 0xB0, 0x09, 0xD0, 0x0B,
01372         0xD0, 0x0B, 0xD0, 0x0B, 0xC1, 0x0B, 0xD1, 0x0B, 0xC1, 0x0B, 0xD3, 0x0C, 0xE8, 0x0E, 0xFA, 0x0F,
01373         0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFA, 0x0F, 0xFA, 0x0F, 0xFA, 0x0F,
01374         0xFA, 0x0F, 0xFA, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F,
01375         0xFA, 0x0F, 0xFA, 0x0E, 0xF9, 0x0E, 0xF8, 0x0E, 0xE6, 0x0D, 0xD4, 0x0C, 0xC3, 0x0B, 0xC1, 0x0B,
01376         0xC1, 0x0B, 0xD0, 0x0B, 0xD0, 0x0B, 0xD0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B,
01377         0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0B, 0xA0, 0x0F, 0xA0, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F,
01378         0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xA1, 0x0E,
01379         0xA1, 0x0E, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB1, 0x0F, 0xA1, 0x0E, 0xA2, 0x0D,
01380         0xB4, 0x0D, 0xD7, 0x0F, 0xFA, 0x0F, 0xFC, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01381         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFD, 0x0F,
01382         0xFB, 0x0F, 0xC5, 0x0D, 0xB2, 0x0D, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB2, 0x0F, 0xA2, 0x0E,
01383         0x92, 0x0C, 0x81, 0x0A, 0x82, 0x09, 0x83, 0x09, 0x83, 0x09, 0x83, 0x09, 0x85, 0x08, 0x86, 0x07,
01384         0x98, 0x07, 0xBB, 0x08, 0xAC, 0x07, 0xAC, 0x07, 0xAD, 0x07, 0xAC, 0x07, 0xAD, 0x08, 0xAC, 0x08,
01385         0xAC, 0x08, 0xAC, 0x08, 0xBD, 0x09, 0xFF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E,
01386         0xDE, 0x0B, 0xAC, 0x08, 0x9B, 0x08, 0xBD, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xAE, 0x07, 0xAD, 0x07,
01387         0xAD, 0x07, 0xBC, 0x08, 0xA9, 0x07, 0x95, 0x06, 0x94, 0x06, 0x93, 0x07, 0x94, 0x07, 0x93, 0x07,
01388         0x93, 0x07, 0x92, 0x07, 0xA1, 0x09, 0xC1, 0x0A, 0xD1, 0x0B, 0xD1, 0x0B, 0xC1, 0x0B, 0xD1, 0x0C,
01389         0xC1, 0x0B, 0xC1, 0x0B, 0xC4, 0x0C, 0xC5, 0x0C, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B,
01390         0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B,
01391         0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xC4, 0x0B, 0xD4, 0x0C, 0xD4, 0x0C,
01392         0xC2, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xD1, 0x0B, 0xD0, 0x0C, 0xC0, 0x0B,
01393         0xC0, 0x0B, 0xC0, 0x0B, 0xC1, 0x0B, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01394         0xB1, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01395         0xB1, 0x0F, 0xB1, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
01396         0xB0, 0x0F, 0xB0, 0x0E, 0xB2, 0x0D, 0xB4, 0x0D, 0xD7, 0x0E, 0xEB, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
01397         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E,
01398         0xFF, 0x0E, 0xFF, 0x0E, 0xFE, 0x0F, 0xFD, 0x0F, 0xFA, 0x0F, 0xB5, 0x0D, 0xB2, 0x0D, 0xB1, 0x0E,
01399         0xB0, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E, 0x92, 0x0C, 0x81, 0x0A, 0x72, 0x09, 0x82, 0x09, 0x83, 0x09,
01400         0x83, 0x09, 0x83, 0x09, 0x84, 0x08, 0x86, 0x07, 0x98, 0x08, 0xAB, 0x08, 0xBC, 0x08, 0xAC, 0x07,
01401         0xBD, 0x08, 0x9C, 0x07, 0xBD, 0x09, 0x9B, 0x07, 0xBC, 0x09, 0xAB, 0x09, 0xFF, 0x0D, 0xFF, 0x0D,
01402         0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xCD, 0x0B, 0x9A, 0x07, 0xAB, 0x08,
01403         0xBD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAE, 0x08, 0xBD, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x95, 0x06,
01404         0x94, 0x07, 0x93, 0x07, 0x94, 0x07, 0x83, 0x07, 0x83, 0x07, 0x93, 0x07, 0x92, 0x08, 0xA1, 0x08,
01405         0xD3, 0x0B, 0xD2, 0x0B, 0xC1, 0x0B, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0B, 0xC2, 0x0C, 0xC2, 0x0C,
01406         0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0C, 0xC2, 0x0C, 0xC2, 0x0C, 0xC2, 0x0C, 0xC1, 0x0B,
01407         0xC2, 0x0C, 0xC2, 0x0C, 0xC2, 0x0C, 0xC2, 0x0C, 0xC2, 0x0C, 0xC2, 0x0B, 0xC2, 0x0B, 0xC2, 0x0B,
01408         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01409         0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0B, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xD1, 0x0C, 0xD1, 0x0C,
01410         0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xA0, 0x0E, 0xA0, 0x0E, 0xA0, 0x0E, 0xB0, 0x0E,
01411         0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0F, 0xB0, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F,
01412         0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB1, 0x0D, 0xB3, 0x0D, 0xC6, 0x0E,
01413         0xEA, 0x0F, 0xEC, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01414         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFC, 0x0F,
01415         0xEA, 0x0F, 0xB4, 0x0D, 0xB2, 0x0D, 0xB1, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xA2, 0x0D, 0x92, 0x0B,
01416         0x72, 0x09, 0x72, 0x09, 0x83, 0x09, 0x83, 0x09, 0x83, 0x09, 0x83, 0x09, 0x84, 0x08, 0x86, 0x08,
01417         0x98, 0x08, 0xAB, 0x09, 0xBC, 0x08, 0xAC, 0x07, 0xAC, 0x07, 0xBD, 0x08, 0xAC, 0x08, 0xAC, 0x08,
01418         0xAB, 0x08, 0xDE, 0x0B, 0xFF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E,
01419         0xFF, 0x0F, 0xDE, 0x0C, 0xAB, 0x09, 0xAB, 0x08, 0xAD, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAE, 0x07,
01420         0xAC, 0x08, 0xAB, 0x08, 0xA8, 0x08, 0x95, 0x06, 0x94, 0x07, 0x93, 0x07, 0x93, 0x07, 0x84, 0x07,
01421         0x84, 0x07, 0x93, 0x07, 0x93, 0x07, 0x92, 0x08, 0xC3, 0x0A, 0xC2, 0x0B, 0xD1, 0x0B, 0xC1, 0x0B,
01422         0xC0, 0x0B, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0B, 0xD0, 0x0C, 0xD0, 0x0C,
01423         0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C,
01424         0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01425         0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01426         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01427         0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F,
01428         0xA0, 0x0F, 0xA0, 0x0F, 0xB1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0E, 0xA0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0E,
01429         0xA1, 0x0E, 0xB3, 0x0D, 0xC6, 0x0E, 0xE9, 0x0F, 0xFC, 0x0F, 0xFD, 0x0F, 0xEE, 0x0E, 0xFF, 0x0F,
01430         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01431         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFC, 0x0F, 0xEA, 0x0F, 0xB5, 0x0D, 0xB2, 0x0D, 0xB1, 0x0E,
01432         0xB1, 0x0E, 0xA1, 0x0D, 0x91, 0x0C, 0x82, 0x0A, 0x72, 0x09, 0x72, 0x09, 0x83, 0x09, 0x83, 0x09,
01433         0x72, 0x09, 0x83, 0x09, 0x74, 0x08, 0x85, 0x07, 0x98, 0x08, 0xAB, 0x08, 0xAC, 0x08, 0xAC, 0x07,
01434         0xAC, 0x07, 0xBE, 0x09, 0x9B, 0x07, 0xAC, 0x08, 0xAB, 0x09, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E,
01435         0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xEF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xDD, 0x0B, 0xAB, 0x08,
01436         0xAC, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAD, 0x07, 0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06,
01437         0x94, 0x07, 0x93, 0x07, 0x93, 0x07, 0x94, 0x07, 0x94, 0x07, 0x93, 0x07, 0x92, 0x07, 0x81, 0x07,
01438         0xA1, 0x09, 0xC2, 0x0A, 0xD1, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01439         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01440         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01441         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01442         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C,
01443         0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F,
01444         0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F,
01445         0xA0, 0x0F, 0xB1, 0x0F, 0xB1, 0x0F, 0xA1, 0x0E, 0xB3, 0x0E, 0xC6, 0x0E, 0xD9, 0x0F, 0xFB, 0x0F,
01446         0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01447         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F,
01448         0xFA, 0x0F, 0xB5, 0x0D, 0xB3, 0x0D, 0xB1, 0x0D, 0xB2, 0x0E, 0xA1, 0x0D, 0x81, 0x0B, 0x81, 0x0A,
01449         0x72, 0x09, 0x82, 0x09, 0x83, 0x09, 0x82, 0x09, 0x72, 0x09, 0x83, 0x09, 0x84, 0x08, 0x85, 0x08,
01450         0x98, 0x08, 0xAB, 0x08, 0xBC, 0x08, 0xAC, 0x07, 0xAD, 0x07, 0xBD, 0x08, 0xAC, 0x08, 0xAC, 0x09,
01451         0xDE, 0x0B, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEF, 0x0E,
01452         0xEF, 0x0E, 0xFF, 0x0E, 0xEF, 0x0D, 0xBC, 0x0A, 0xAC, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAD, 0x08,
01453         0xAC, 0x08, 0xBB, 0x08, 0xA9, 0x08, 0x85, 0x06, 0x94, 0x07, 0x93, 0x07, 0x93, 0x07, 0x94, 0x07,
01454         0x94, 0x07, 0x93, 0x07, 0x93, 0x07, 0x91, 0x07, 0x91, 0x08, 0xB1, 0x09, 0xC1, 0x0B, 0xD1, 0x0B,
01455         0xC0, 0x0B, 0xC0, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01456         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01457         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01458         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01459         0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD1, 0x0C, 0xC1, 0x0B, 0xC1, 0x0B, 0xC2, 0x0B,
01460         0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F,
01461         0xA0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0F, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xA2, 0x0D,
01462         0xC6, 0x0E, 0xD9, 0x0F, 0xEC, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01463         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01464         0xFF, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xEB, 0x0F, 0xB6, 0x0D, 0xB3, 0x0D, 0xB2, 0x0E,
01465         0xB1, 0x0D, 0x90, 0x0C, 0x81, 0x0A, 0x71, 0x0A, 0x72, 0x09, 0x83, 0x09, 0x83, 0x09, 0x82, 0x08,
01466         0x82, 0x09, 0x83, 0x09, 0x84, 0x09, 0x86, 0x08, 0x98, 0x08, 0xAB, 0x09, 0xBC, 0x08, 0xAC, 0x07,
01467         0xAD, 0x07, 0xAC, 0x08, 0xAC, 0x08, 0xBD, 0x0A, 0xFF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xFE, 0x0E,
01468         0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0E, 0xDE, 0x0C,
01469         0xAC, 0x08, 0xAD, 0x08, 0xAD, 0x07, 0xAD, 0x08, 0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06,
01470         0x93, 0x06, 0x93, 0x07, 0x93, 0x07, 0x93, 0x07, 0x94, 0x06, 0x93, 0x07, 0x93, 0x07, 0x92, 0x07,
01471         0x91, 0x07, 0xA0, 0x08, 0xB1, 0x0A, 0xD1, 0x0B, 0xD1, 0x0C, 0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0C,
01472         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01473         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01474         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01475         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C,
01476         0xD2, 0x0C, 0xC2, 0x0C, 0xC3, 0x0C, 0xD3, 0x0C, 0xB0, 0x0E, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F,
01477         0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F, 0xB0, 0x0F, 0xA0, 0x0F, 0xA0, 0x0E, 0xB0, 0x0E,
01478         0xB1, 0x0E, 0xB2, 0x0E, 0xB2, 0x0E, 0xB5, 0x0E, 0xD9, 0x0F, 0xEC, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01479         0xEF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01480         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xEC, 0x0F,
01481         0xEB, 0x0F, 0xB6, 0x0D, 0xB4, 0x0D, 0xB3, 0x0D, 0xA1, 0x0C, 0x80, 0x0B, 0x71, 0x0A, 0x72, 0x0A,
01482         0x73, 0x09, 0x83, 0x09, 0x83, 0x09, 0x72, 0x08, 0x72, 0x09, 0x83, 0x09, 0x84, 0x08, 0x85, 0x08,
01483         0x98, 0x08, 0xAB, 0x08, 0xBC, 0x08, 0xAC, 0x07, 0xAC, 0x07, 0xAC, 0x08, 0xBD, 0x09, 0xEF, 0x0C,
01484         0xFF, 0x0E, 0xFF, 0x0F, 0xFE, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01485         0xEF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0D, 0xBD, 0x0A, 0xBD, 0x09, 0xAD, 0x07, 0xAD, 0x08,
01486         0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x85, 0x06, 0x93, 0x06, 0x93, 0x06, 0x93, 0x06, 0x93, 0x06,
01487         0x93, 0x06, 0x93, 0x06, 0x93, 0x07, 0x93, 0x07, 0x91, 0x07, 0x90, 0x07, 0xB0, 0x09, 0xC1, 0x0B,
01488         0xD1, 0x0C, 0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01489         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01490         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C,
01491         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01492         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC2, 0x0C, 0xC3, 0x0B, 0xC4, 0x0B, 0xD5, 0x0C, 0xE6, 0x0D,
01493         0xB0, 0x0E, 0xB0, 0x0E, 0xA0, 0x0F, 0xA0, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xA0, 0x0F, 0xA0, 0x0F,
01494         0xB0, 0x0F, 0xA0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xB1, 0x0E, 0xA2, 0x0D, 0xB4, 0x0E, 0xD8, 0x0F,
01495         0xEC, 0x0F, 0xEE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F,
01496         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01497         0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F, 0xED, 0x0F, 0xEB, 0x0F, 0xB7, 0x0D, 0xB4, 0x0D, 0xA3, 0x0D,
01498         0x91, 0x0B, 0x80, 0x0A, 0x71, 0x09, 0x72, 0x09, 0x73, 0x09, 0x83, 0x09, 0x83, 0x09, 0x72, 0x08,
01499         0x72, 0x09, 0x73, 0x09, 0x74, 0x08, 0x85, 0x07, 0x98, 0x08, 0xAA, 0x08, 0xAC, 0x08, 0xAC, 0x07,
01500         0xAC, 0x07, 0xBD, 0x09, 0xDE, 0x0B, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01501         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E,
01502         0xEF, 0x0C, 0xCE, 0x0A, 0xAC, 0x08, 0xAD, 0x08, 0xAC, 0x08, 0xAB, 0x08, 0xA9, 0x08, 0x96, 0x06,
01503         0x93, 0x06, 0x93, 0x06, 0x93, 0x06, 0x93, 0x06, 0x94, 0x06, 0x94, 0x06, 0x93, 0x07, 0x93, 0x07,
01504         0x91, 0x07, 0x90, 0x07, 0xA0, 0x08, 0xB1, 0x0A, 0xC1, 0x0B, 0xC1, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B,
01505         0xD1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01506         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01507         0xC1, 0x0C, 0xC1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01508         0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC3, 0x0C,
01509         0xB4, 0x0B, 0xC6, 0x0C, 0xD8, 0x0D, 0xFA, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0F,
01510         0xA1, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xA1, 0x0F, 0xB0, 0x0F, 0xA0, 0x0E, 0xB0, 0x0E, 0xC2, 0x0E,
01511         0xB3, 0x0D, 0xA3, 0x0C, 0xC7, 0x0E, 0xEB, 0x0F, 0xFD, 0x0F, 0xEE, 0x0F, 0xEE, 0x0F, 0xFF, 0x0F,
01512         0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01513         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F,
01514         0xFC, 0x0F, 0xC7, 0x0D, 0xB5, 0x0C, 0x93, 0x0B, 0x81, 0x0A, 0x71, 0x09, 0x72, 0x09, 0x73, 0x09,
01515         0x73, 0x09, 0x73, 0x08, 0x83, 0x08, 0x83, 0x08, 0x83, 0x09, 0x83, 0x09, 0x84, 0x09, 0x85, 0x08,
01516         0x98, 0x08, 0xAB, 0x09, 0xBC, 0x08, 0xAC, 0x08, 0xAC, 0x08, 0xBD, 0x09, 0xFF, 0x0D, 0xFF, 0x0E,
01517         0xFF, 0x0F, 0xEE, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01518         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xDE, 0x0B, 0xAC, 0x08, 0xAD, 0x08,
01519         0xAC, 0x08, 0xAB, 0x08, 0xAA, 0x08, 0x97, 0x07, 0x94, 0x06, 0x93, 0x06, 0x93, 0x06, 0x93, 0x06,
01520         0x94, 0x06, 0x94, 0x07, 0x94, 0x07, 0x93, 0x06, 0x92, 0x07, 0x91, 0x07, 0x91, 0x08, 0xA1, 0x09,
01521         0xC1, 0x0A, 0xD2, 0x0C, 0xD1, 0x0C, 0xC1, 0x0B, 0xD1, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01522         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01523         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xD1, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C,
01524         0xC0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xC1, 0x0C,
01525         0xC1, 0x0C, 0xC1, 0x0B, 0xC2, 0x0B, 0xB3, 0x0B, 0xC6, 0x0B, 0xD9, 0x0D, 0xFB, 0x0E, 0xFC, 0x0F,
01526         0xB0, 0x0E, 0xB0, 0x0E, 0xB1, 0x0E, 0xA1, 0x0E, 0xA2, 0x0E, 0xA2, 0x0E, 0xA2, 0x0F, 0xA1, 0x0F,
01527         0xA1, 0x0E, 0xB1, 0x0E, 0xB2, 0x0E, 0xA2, 0x0D, 0xB4, 0x0D, 0xD8, 0x0F, 0xEA, 0x0F, 0xEC, 0x0F,
01528         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E,
01529         0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01530         0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xED, 0x0F, 0xEC, 0x0F, 0xB8, 0x0D, 0x94, 0x0B, 0x82, 0x0A,
01531         0x82, 0x09, 0x82, 0x09, 0x83, 0x09, 0x84, 0x09, 0x84, 0x09, 0x84, 0x09, 0x84, 0x08, 0x83, 0x09,
01532         0x83, 0x09, 0x84, 0x09, 0x74, 0x08, 0x85, 0x08, 0x98, 0x08, 0xAA, 0x08, 0xAB, 0x08, 0x9B, 0x07,
01533         0xBD, 0x09, 0xDF, 0x0C, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFE, 0x0F, 0xEE, 0x0F,
01534         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E,
01535         0xFF, 0x0E, 0xEF, 0x0C, 0xCE, 0x0A, 0xAC, 0x08, 0x9B, 0x08, 0xAA, 0x08, 0x99, 0x08, 0x96, 0x07,
01536         0x94, 0x06, 0x93, 0x06, 0x94, 0x06, 0x94, 0x07, 0x94, 0x07, 0x94, 0x07, 0x94, 0x07, 0x94, 0x07,
01537         0x93, 0x07, 0x92, 0x07, 0x91, 0x07, 0x90, 0x07, 0xA1, 0x09, 0xC2, 0x0B, 0xD2, 0x0C, 0xC1, 0x0B,
01538         0xC1, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C, 0xC0, 0x0C, 0xD0, 0x0C,
01539         0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
01540         0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0C, 0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B, 0xC0, 0x0B,
01541         0xC0, 0x0C, 0xD1, 0x0C, 0xD1, 0x0C, 0xD2, 0x0C, 0xC2, 0x0C, 0xC2, 0x0B, 0xC3, 0x0C, 0xC5, 0x0C,
01542         0xEB, 0x0E, 0xFC, 0x0E, 0xFD, 0x0F, 0xFE, 0x0F, 0xB1, 0x0D, 0xB2, 0x0D, 0xB2, 0x0D, 0xB3, 0x0E,
01543         0xA3, 0x0E, 0xA3, 0x0E, 0xA3, 0x0E, 0xB3, 0x0E, 0xA2, 0x0D, 0xA2, 0x0D, 0xA3, 0x0D, 0xB4, 0x0D,
01544         0xC7, 0x0D, 0xEA, 0x0F, 0xFC, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01545         0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
01546         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0E, 0xFE, 0x0F, 0xFE, 0x0F,
01547         0xFD, 0x0F, 0xB8, 0x0C, 0x94, 0x0A, 0x83, 0x09, 0x83, 0x09, 0x83, 0x09, 0x84, 0x09, 0x75, 0x09,
01548         0x85, 0x09, 0x85, 0x08, 0x84, 0x08, 0x84, 0x08, 0x84, 0x09, 0x84, 0x09, 0x75, 0x08, 0x86, 0x08,
01549         0x98, 0x08, 0xAA, 0x09, 0xAB, 0x09, 0xAB, 0x08, 0xDE, 0x0B, 0xEF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E,
01550         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01551         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xDF, 0x0C, 0xBD, 0x0A,
01552         0xAC, 0x09, 0xAB, 0x09, 0xA9, 0x08, 0x97, 0x07, 0x95, 0x07, 0x94, 0x07, 0x94, 0x07, 0x95, 0x07,
01553         0x95, 0x07, 0x85, 0x07, 0x95, 0x07, 0x94, 0x07, 0x94, 0x07, 0x94, 0x07, 0x93, 0x08, 0x92, 0x08,
01554         0xA2, 0x09, 0xC3, 0x0B, 0xD4, 0x0C, 0xD3, 0x0C, 0xC2, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01555         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C,
01556         0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xC1, 0x0C, 0xD2, 0x0C, 0xD2, 0x0C, 0xD2, 0x0C, 0xD1, 0x0C,
01557         0xD1, 0x0C, 0xD1, 0x0C, 0xD1, 0x0C, 0xD1, 0x0C, 0xC1, 0x0B, 0xC1, 0x0B, 0xC2, 0x0B, 0xB3, 0x0B,
01558         0xC4, 0x0B, 0xD5, 0x0C, 0xE7, 0x0E, 0xF9, 0x0F, 0xFC, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01559         0xB2, 0x0C, 0xB3, 0x0C, 0xA3, 0x0C, 0xA4, 0x0D, 0xA4, 0x0D, 0xA4, 0x0D, 0xA4, 0x0D, 0xA4, 0x0D,
01560         0xB4, 0x0D, 0xB4, 0x0D, 0xB5, 0x0D, 0xC7, 0x0D, 0xDA, 0x0E, 0xFC, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01561         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0E, 0xFE, 0x0E, 0xFE, 0x0E, 0xFE, 0x0F,
01562         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01563         0xFF, 0x0F, 0xEE, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xED, 0x0F, 0xA8, 0x0B, 0x84, 0x09, 0x73, 0x08,
01564         0x73, 0x08, 0x73, 0x08, 0x74, 0x08, 0x75, 0x08, 0x75, 0x08, 0x75, 0x08, 0x74, 0x07, 0x74, 0x08,
01565         0x74, 0x08, 0x74, 0x08, 0x74, 0x07, 0x75, 0x07, 0x88, 0x08, 0x99, 0x08, 0xAA, 0x08, 0xAB, 0x09,
01566         0xEF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01567         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01568         0xFE, 0x0E, 0xFF, 0x0E, 0xEF, 0x0D, 0xBD, 0x0A, 0xAB, 0x09, 0xAA, 0x09, 0x99, 0x08, 0x86, 0x06,
01569         0x85, 0x06, 0x84, 0x07, 0x85, 0x07, 0x85, 0x07, 0x85, 0x06, 0x85, 0x06, 0x85, 0x06, 0x85, 0x06,
01570         0x84, 0x07, 0x84, 0x07, 0x84, 0x07, 0x83, 0x07, 0x93, 0x08, 0xA3, 0x09, 0xB4, 0x0A, 0xB4, 0x0B,
01571         0xC4, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B, 0xC3, 0x0B,
01572         0xB3, 0x0B, 0xB3, 0x0B, 0xB3, 0x0B, 0xB3, 0x0B, 0xB3, 0x0B, 0xB3, 0x0B, 0xB3, 0x0B, 0xB3, 0x0B,
01573         0xB3, 0x0B, 0xB3, 0x0B, 0xB3, 0x0B, 0xB3, 0x0B, 0xB3, 0x0B, 0xB3, 0x0B, 0xC3, 0x0B, 0xB4, 0x0B,
01574         0xC5, 0x0C, 0xD6, 0x0C, 0xD6, 0x0C, 0xD7, 0x0D, 0xE8, 0x0D, 0xEA, 0x0E, 0xFB, 0x0F, 0xFC, 0x0F,
01575         0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xE8, 0x0F, 0xE8, 0x0F, 0xE8, 0x0F, 0xE8, 0x0F,
01576         0xD9, 0x0F, 0xD9, 0x0F, 0xD8, 0x0F, 0xD8, 0x0F, 0xD8, 0x0F, 0xD8, 0x0E, 0xD9, 0x0E, 0xEA, 0x0F,
01577         0xFC, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01578         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01579         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01580         0xFE, 0x0F, 0xDB, 0x0D, 0xC9, 0x0D, 0xC9, 0x0D, 0xC9, 0x0D, 0xCA, 0x0D, 0xCA, 0x0D, 0xCB, 0x0D,
01581         0xCB, 0x0D, 0xCB, 0x0D, 0xCA, 0x0D, 0xCA, 0x0D, 0xC9, 0x0D, 0xCA, 0x0D, 0xCA, 0x0C, 0xCB, 0x0C,
01582         0xDC, 0x0C, 0xDD, 0x0C, 0xEE, 0x0D, 0xEF, 0x0D, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F,
01583         0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01584         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xEF, 0x0D,
01585         0xDE, 0x0C, 0xEE, 0x0D, 0xDD, 0x0D, 0xDB, 0x0C, 0xCA, 0x0B, 0xDA, 0x0C, 0xDA, 0x0C, 0xDA, 0x0C,
01586         0xDA, 0x0C, 0xDA, 0x0C, 0xDB, 0x0C, 0xDB, 0x0C, 0xDA, 0x0C, 0xDA, 0x0C, 0xDA, 0x0C, 0xC9, 0x0C,
01587         0xD8, 0x0C, 0xD9, 0x0D, 0xE9, 0x0D, 0xE9, 0x0E, 0xE9, 0x0E, 0xE8, 0x0E, 0xE8, 0x0E, 0xE8, 0x0E,
01588         0xE8, 0x0E, 0xE8, 0x0E, 0xE8, 0x0E, 0xE8, 0x0E, 0xE9, 0x0E, 0xE9, 0x0E, 0xE9, 0x0E, 0xE9, 0x0E,
01589         0xE9, 0x0E, 0xE9, 0x0E, 0xE9, 0x0E, 0xE9, 0x0E, 0xE9, 0x0E, 0xE9, 0x0E, 0xE9, 0x0E, 0xE9, 0x0E,
01590         0xE9, 0x0E, 0xE9, 0x0E, 0xFA, 0x0E, 0xFA, 0x0E, 0xEA, 0x0E, 0xFB, 0x0E, 0xFB, 0x0F, 0xFC, 0x0F,
01591         0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01592         0xFB, 0x0F, 0xFB, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F, 0xFB, 0x0F,
01593         0xFC, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01594         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01595         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01596         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
01597         0xFC, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
01598         0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFE, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F,
01599         0xFF, 0x0F, 0xEF, 0x0F, 0xEF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
01600         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01601         0xFE, 0x0E, 0xFE, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFE, 0x0F,
01602         0xFD, 0x0E, 0xFD, 0x0E, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0E, 0xFE, 0x0E, 0xFE, 0x0F,
01603         0xFE, 0x0E, 0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0E, 0xFD, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F, 0xFC, 0x0F,
01604         0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
01605         0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
01606         0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F,
01607         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01608         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01609         0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01610         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01611         0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01612         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xEE, 0x0E,
01613         0xFF, 0x0F, 0xEE, 0x0F, 0xFD, 0x0F, 0xED, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01614         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFD, 0x0F, 0xFD, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01615         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01616         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01617         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F,
01618         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01619         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01620         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01621         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01622         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01623         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01624         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01625         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01626         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F,
01627         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01628         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0E, 0xFF, 0x0F,
01629         0xFE, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01630         0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01631         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01632         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01633         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01634         0xFE, 0x0F, 0xFE, 0x0E, 0xFF, 0x0E, 0xFF, 0x0E, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01635         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01636         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01637         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01638         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01639         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01640         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01641         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01642         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01643         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01644         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01645         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01646         0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01647         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01648         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F,
01649         0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01650         0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01651         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01652         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01653         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01654         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01655         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01656         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F,
01657         0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFE, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01658         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01659         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01660         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01661         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01662         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01663         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01664         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01665         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01666         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01667         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01668         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01669         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01670         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01671         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01672         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01673         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01674         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01675         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01676         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01677         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01678         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01679         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01680         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01681         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01682         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01683         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01684         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01685         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01686         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01687         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01688         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01689         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01690         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01691         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01692         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01693         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01694         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01695         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01696         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01697         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01698         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01699         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01700         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01701         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01702         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01703         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01704         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01705         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01706         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01707         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01708         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01709         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01710         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01711         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01712         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01713         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01714         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01715         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01716         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01717         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01718         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01719         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01720         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01721         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01722         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01723         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01724         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01725         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01726         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01727         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01728         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01729         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01730         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01731         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01732         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01733         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01734         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01735         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01736         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01737         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01738         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01739         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01740         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01741         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01742         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01743         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01744         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01745         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01746         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01747         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01748         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01749         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01750         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01751         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01752         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01753         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01754         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01755         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01756         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01757         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01758         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01759         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01760         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01761         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01762         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01763         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01764         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01765         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01766         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01767         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01768         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01769         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01770         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01771         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01772         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01773         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01774         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01775         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01776         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01777         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01778         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01779         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01780         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01781         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01782         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01783         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01784         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01785         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01786         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01787         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01788         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01789         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01790         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01791         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01792         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01793         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01794         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01795         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01796         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01797         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01798         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01799         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01800         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01801         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01802         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01803         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01804         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01805         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01806         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01807         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01808         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01809         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01810         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01811         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01812         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01813         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01814         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01815         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01816         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01817         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01818         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01819         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01820         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01821         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01822         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01823         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01824         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01825         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01826         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01827         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01828         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01829         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01830         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01831         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01832         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01833         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01834         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01835         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01836         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01837         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01838         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01839         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01840         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01841         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01842         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01843         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01844         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01845         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01846         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01847         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01848         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01849         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01850         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01851         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01852         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01853         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01854         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01855         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01856         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01857         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01858         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01859         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01860         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01861         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01862         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01863         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01864         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01865         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01866         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01867         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01868         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01869         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01870         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01871         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01872         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01873         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01874         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01875         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01876         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01877         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01878         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01879         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01880         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01881         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01882         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01883         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01884         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01885         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01886         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01887         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01888         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01889         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01890         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01891         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01892         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01893         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01894         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01895         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01896         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01897         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01898         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01899         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01900         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01901         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01902         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01903         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01904         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01905         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01906         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01907         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01908         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01909         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01910         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01911         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01912         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01913         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01914         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01915         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01916         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01917         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01918         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01919         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01920         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01921         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01922         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01923         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01924         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01925         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01926         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01927         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01928         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01929         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01930         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01931         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01932         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01933         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01934         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01935         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01936         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01937         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01938         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01939         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01940         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01941         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01942         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01943         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01944         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01945         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01946         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01947         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01948         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01949         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01950         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01951         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01952         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01953         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01954         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01955         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01956         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01957         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01958         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01959         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01960         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01961         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01962         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01963         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01964         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01965         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01966         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01967         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01968         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01969         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01970         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01971         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01972         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01973         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01974         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01975         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01976         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01977         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01978         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01979         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01980         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01981         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01982         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01983         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01984         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01985         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01986         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01987         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01988         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01989         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01990         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01991         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01992         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01993         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01994         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01995         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01996         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01997         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01998         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
01999         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02000         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02001         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02002         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02003         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02004         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02005         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02006         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02007         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02008         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02009         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02010         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02011         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02012         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02013         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02014         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02015         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02016         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02017         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02018         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02019         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02020         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02021         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02022         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02023         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02024         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02025         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02026         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02027         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02028         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02029         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02030         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02031         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02032         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02033         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02034         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02035         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02036         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02037         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02038         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02039         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02040         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02041         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02042         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02043         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02044         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02045         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02046         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02047         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02048         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02049         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02050         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02051         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02052         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02053         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02054         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02055         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02056         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02057         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02058         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02059         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02060         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02061         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02062         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02063         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02064         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02065         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02066         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02067         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02068         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02069         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02070         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02071         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02072         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02073         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02074         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02075         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02076         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02077         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02078         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02079         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02080         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02081         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02082         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02083         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02084         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02085         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02086         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02087         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02088         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02089         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02090         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02091         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02092         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02093         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02094         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02095         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02096         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02097         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02098         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02099         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02100         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02101         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02102         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02103         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02104         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02105         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02106         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02107         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02108         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02109         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02110         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02111         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02112         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02113         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02114         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02115         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02116         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02117         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02118         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02119         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02120         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02121         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02122         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02123         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02124         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02125         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02126         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02127         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02128         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02129         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02130         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02131         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02132         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02133         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02134         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02135         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02136         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02137         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02138         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02139         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02140         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02141         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02142         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02143         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02144         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02145         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02146         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02147         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02148         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02149         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02150         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02151         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02152         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02153         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02154         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02155         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02156         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02157         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02158         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02159         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02160         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02161         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02162         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02163         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02164         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02165         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02166         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02167         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02168         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02169         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02170         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02171         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02172         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02173         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02174         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02175         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02176         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02177         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02178         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02179         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02180         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02181         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02182         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02183         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02184         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02185         0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F,
02186         0x00, 0x00
02187 };
02188
02189 Bmp_t NXP_Logo =
02190 {
02191   132,
02192   132,
02193   12,
02194   2,
02195   NULL,
02196   (unsigned int *)&NXP_LogoStream
02197 };
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/NXP_logo.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/NXP_logo.h
Go to the documentation of this file.
00001 /*************************************************************************
00002  *    File name   : NXP_logo.h
00003  *    Description : NXP Logo include file
00004  **************************************************************************/
00005 #include "drv_glcd.h"
00006
00007
00008 #ifndef __NXP_LOGO_H
00009 #define __NXP_LOGO_H
00010
00011 extern Bmp_t NXP_Logo;
00012
00013 #endif // __NXP_LOGO_H
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Dual_Edge/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Dual_Edge/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 #define _PWM
00096 #define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:44 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Match_Interrupt/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Match_Interrupt/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 #define _PWM
00096 #define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:44 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Single_Edge/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Single_Edge/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 //#define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 //#define _UART
00053 //#define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 #define _PWM
00095 #define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:44 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/EXTINT_Sleep/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/EXTINT_Sleep/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 #define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:44 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/NMI_PowerDown/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/NMI_PowerDown/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046
00047 /* GPIO ------------------------------- */
00048 #define _GPIO
00049
00050 /* EXTI ------------------------------- */
00051 //#define _EXTI
00052
00053 /* UART ------------------------------- */
00054 #define _UART
00055 #define _UART0
00056 //#define _UART1
00057 //#define _UART2
00058 //#define _UART3
00059
00060 /* SPI ------------------------------- */
00061 //#define _SPI
00062
00063 /* SSP ------------------------------- */
00064 //#define _SSP
00065 //#define _SSP0
00066 //#define _SSP1
00067
00068 /* SYSTICK --------------------------- */
00069 //#define _SYSTICK
00070
00071 /* I2C ------------------------------- */
00072 //#define _I2C
00073 //#define _I2C0
00074 //#define _I2C1
00075 //#define _I2C2
00076
00077 /* TIMER ------------------------------- */
00078 //#define _TIM
00079
00080 /* WDT ------------------------------- */
00081 //#define _WDT
00082
00083
00084 /* GPDMA ------------------------------- */
00085 //#define _GPDMA
00086
00087
00088 /* DAC ------------------------------- */
00089 //#define _DAC
00090
00091 /* DAC ------------------------------- */
00092 //#define _ADC
00093
00094
00095 /* PWM ------------------------------- */
00096 //#define _PWM
00097 //#define _PWM1
00098
00099 /* RTC ------------------------------- */
00100 //#define _RTC
00101
00102 /* I2S ------------------------------- */
00103 //#define _I2S
00104
00105 /* USB device ------------------------------- */
00106 //#define _USBDEV
00107 //#define _USB_DMA
00108
00109 /* QEI ------------------------------- */
00110 //#define _QEI
00111
00112 /* MCPWM ------------------------------- */
00113 //#define _MCPWM
00114
00115 /* CAN--------------------------------*/
00116 //#define _CAN
00117
00118 /* RIT ------------------------------- */
00119 //#define _RIT
00120
00121 /* EMAC ------------------------------ */
00122 //#define _EMAC
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:44 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/RTC_DeepPWD/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/RTC_DeepPWD/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046
00047 /* GPIO ------------------------------- */
00048 #define _GPIO
00049
00050 /* EXTI ------------------------------- */
00051 //#define _EXTI
00052
00053 /* UART ------------------------------- */
00054 #define _UART
00055 #define _UART0
00056 //#define _UART1
00057 //#define _UART2
00058 //#define _UART3
00059
00060 /* SPI ------------------------------- */
00061 //#define _SPI
00062
00063 /* SSP ------------------------------- */
00064 //#define _SSP
00065 //#define _SSP0
00066 //#define _SSP1
00067
00068 /* SYSTICK --------------------------- */
00069 //#define _SYSTICK
00070
00071 /* I2C ------------------------------- */
00072 //#define _I2C
00073 //#define _I2C0
00074 //#define _I2C1
00075 //#define _I2C2
00076
00077 /* TIMER ------------------------------- */
00078 //#define _TIM
00079
00080 /* WDT ------------------------------- */
00081 //#define _WDT
00082
00083
00084 /* GPDMA ------------------------------- */
00085 //#define _GPDMA
00086
00087
00088 /* DAC ------------------------------- */
00089 //#define _DAC
00090
00091 /* DAC ------------------------------- */
00092 //#define _ADC
00093
00094
00095 /* PWM ------------------------------- */
00096 //#define _PWM
00097 //#define _PWM1
00098
00099 /* RTC ------------------------------- */
00100 #define _RTC
00101
00102 /* I2S ------------------------------- */
00103 //#define _I2S
00104
00105 /* USB device ------------------------------- */
00106 //#define _USBDEV
00107 //#define _USB_DMA
00108
00109 /* QEI ------------------------------- */
00110 //#define _QEI
00111
00112 /* MCPWM ------------------------------- */
00113 //#define _MCPWM
00114
00115 /* CAN--------------------------------*/
00116 //#define _CAN
00117
00118 /* RIT ------------------------------- */
00119 //#define _RIT
00120
00121 /* EMAC ------------------------------ */
00122 //#define _EMAC
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:44 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/WDT_DeepSleep/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/WDT_DeepSleep/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 #define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:44 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Project_Template/Eclipse_GNU/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/Project_Template/Eclipse_GNU/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:44 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/QEI/QEI_Velo/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/QEI/QEI_Velo/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00034
00035 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00036    the "CHECK_PARAM" macro in the FW library code */
00037
00038 #define DEBUG
00039
00040
00041 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00042
00043 /* Comment the line below to disable the specific peripheral inclusion */
00044
00045 /* DEBUG_FRAMWORK ------------------------------ */
00046 #define _DBGFWK
00047
00048
00049 /* GPIO ------------------------------- */
00050 #define _GPIO
00051
00052 /* EXTI ------------------------------- */
00053 //#define _EXTI
00054
00055 /* UART ------------------------------- */
00056 #define _UART
00057 #define _UART0
00058 //#define _UART1
00059 //#define _UART2
00060 //#define _UART3
00061
00062 /* SPI ------------------------------- */
00063 //#define _SPI
00064
00065 /* SSP ------------------------------- */
00066 //#define _SSP
00067 //#define _SSP0
00068 //#define _SSP1
00069
00070 /* SYSTICK --------------------------- */
00071 //#define _SYSTICK
00072
00073 /* I2C ------------------------------- */
00074 //#define _I2C
00075 //#define _I2C0
00076 //#define _I2C1
00077 //#define _I2C2
00078
00079 /* TIMER ------------------------------- */
00080 #define _TIM
00081
00082 /* WDT ------------------------------- */
00083 //#define _WDT
00084
00085
00086 /* GPDMA ------------------------------- */
00087 //#define _GPDMA
00088
00089
00090 /* DAC ------------------------------- */
00091 //#define _DAC
00092
00093 /* DAC ------------------------------- */
00094 //#define _ADC
00095
00096
00097 /* PWM ------------------------------- */
00098 //#define _PWM
00099 //#define _PWM1
00100
00101 /* RTC ------------------------------- */
00102 //#define _RTC
00103
00104 /* I2S ------------------------------- */
00105 //#define _I2S
00106
00107 /* USB device ------------------------------- */
00108 //#define _USBDEV
00109 //#define _USB_DMA
00110
00111 /* QEI ------------------------------- */
00112 #define _QEI
00113
00114 /* MCPWM ------------------------------- */
00115 //#define _MCPWM
00116
00117 /* CAN--------------------------------*/
00118 //#define _CAN
00119
00120 /* RIT ------------------------------- */
00121 //#define _RIT
00122
00123 /* EMAC ------------------------------ */
00124 //#define _EMAC
00125
00126 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00127
00128 #ifdef  DEBUG
00129 /*******************************************************************************
00130 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00131 *                               It is used only if the library is compiled in DEBUG mode.
00132 * @param[in]    expr - If expr is false, it calls check_failed() function
00133 *                       which reports the name of the source file and the source
00134 *                       line number of the call that failed.
00135 *                    - If expr is true, it returns no value.
00136 * @return               None
00137 *******************************************************************************/
00138 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00139 #else
00140 #define CHECK_PARAM(expr)
00141 #endif /* DEBUG */
00142
00143
00144
00145 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00146
00147 #ifdef  DEBUG
00148 void check_failed(uint8_t *file, uint32_t line);
00149 #endif
00150
00151
00152 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:44 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/lcdtest.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/QVGA_TFT_LCD/lcdtest.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lcdtest.c                               2010-05-21
00003 */
00025 #include "lpc17xx_gpio.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "GLCD.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINITIONS ********************/
00037 // Time out definition - used in blocking mode in read/write function
00038 #define TIME_OUT        10000
00039
00040
00041 /************************** PRIVATE VARIABLES *************************/
00042 //uint8_t menu1[] =
00043 //"********************************************************************************\n\r"
00044 //"Hello NXP Semiconductors \n\r"
00045 //" 4-bit LCD demo \n\r"
00046 //"\t - MCU: LPC17xx \n\r"
00047 //"\t - Core: ARM Cortex-M3 \n\r"
00048 //"\t - Communicate via: UART0 - 115200bps \n\r"
00049 //" This example used to test LCD via GPIO peripheral on LPC1768 \n\r"
00050 //"********************************************************************************\n\r";
00051 //uint8_t menu2[] = "Demo terminated! \n\r";
00052
00053 // UART Configuration structure variable
00054 //UART_CFG_Type UARTConfigStruct;
00055
00056 uint8_t lcd_text[2][16+1] = {"   NXP SEMI.    ",      /* Buffer for LCD text      */
00057                           "  LPC1768/CM3" };
00058
00059 /************************** PRIVATE FUNCTIONS *************************/
00060 void print_menu(void);
00061
00062 /*********************************************************************/
00067 //void print_menu(void)
00068 //{
00069 //      _DBG(menu1);
00070 //}
00071
00072
00073 /*-------------------------MAIN FUNCTION------------------------------*/
00074 /*********************************************************************/
00079 int c_entry(void)
00080 {
00081 //      /* Initialize debug via UART0
00082 //       * – 115200bps
00083 //       * – 8 data bit
00084 //       * – No parity
00085 //       * – 1 stop bit
00086 //       * – No flow control
00087 //       */
00088 //      debug_frmwrk_init();
00089 //
00090 //      // print welcome screen
00091 //      print_menu();
00092
00093         /* LCD block section -------------------------------------------- */
00094         GLCD_Init();
00095         GLCD_Clear(White);
00096
00097         /* Update LCD Module display text. */
00098         GLCD_DisplayString(0,0, lcd_text[0] );
00099         GLCD_DisplayString(1,2, lcd_text[1] );
00100
00101     /* Loop forever */
00102     while(1);
00103 }
00104
00105 /* With ARM and GHS toolsets, the entry point is main() - this will
00106    allow the linker to generate wrapper code to setup stacks, allocate
00107    heap area, and initialize and copy code and data segments. For GNU
00108    toolsets, the entry point is through __start() in the crt0_gnu.asm
00109    file, and that startup code will setup stacks and data */
00110 int main(void)
00111 {
00112     return c_entry();
00113 }
00114
00115
00116 #ifdef  DEBUG
00117 /*******************************************************************************
00118 * @brief                Reports the name of the source file and the source line number
00119 *                               where the CHECK_PARAM error has occurred.
00120 * @param[in]    file Pointer to the source file name
00121 * @param[in]    line assert_param error line source number
00122 * @return               None
00123 *******************************************************************************/
00124 void check_failed(uint8_t *file, uint32_t line)
00125 {
00126         /* User can add his own implementation to report the file name and line number,
00127          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00128
00129         /* Infinite loop */
00130         while(1);
00131 }
00132 #endif
00133
00134 /*
00135  * @}
00136  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RIT/Interrupt/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/RIT/Interrupt/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 #define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RTC/AlarmCntIncrInterrupt/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/RTC/AlarmCntIncrInterrupt/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 #define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RTC/Calibration/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/RTC/Calibration/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 #define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/LoopBack/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/LoopBack/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 #define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Master/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Master/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 #define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/SDCard/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/SDCard/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 #define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Slave/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Slave/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 #define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_int/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_int/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 #define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_polling/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_polling/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 #define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 #define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Master/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Master/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 #define _SSP
00064 #define _SSP0
00065 #define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/MicroWire/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/MicroWire/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 #define _SSP
00064 #define _SSP0
00065 #define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Slave/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Slave/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 #define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/TI/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/TI/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 #define _SSP
00064 #define _SSP0
00065 #define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/dma/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/dma/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 #define _SSP
00064 #define _SSP0
00065 #define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 #define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_int/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_int/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 #define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_polling/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_polling/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 #define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 #define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/STCLK/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/STCLK/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 //#define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 #define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 //#define _UART
00053 //#define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK ----------------------------*/
00067 #define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 #define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 #define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/10ms_base/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/10ms_base/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 //#define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 #define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 //#define _UART
00053 //#define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK ----------------------------*/
00067 #define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Capture/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Capture/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 #define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/FreqMeasure/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/FreqMeasure/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 #define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Delay/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Delay/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 #define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Freqs/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Freqs/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 #define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Interrupt_Match/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Interrupt_Match/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 #define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 #define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 #define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00123
00124 #ifdef  DEBUG
00125 /*******************************************************************************
00126 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00127 *                               It is used only if the library is compiled in DEBUG mode.
00128 * @param[in]    expr - If expr is false, it calls check_failed() function
00129 *                       which reports the name of the source file and the source
00130 *                       line number of the call that failed.
00131 *                    - If expr is true, it returns no value.
00132 * @return               None
00133 *******************************************************************************/
00134 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00135 #else
00136 #define CHECK_PARAM(expr)
00137 #endif /* DEBUG */
00138
00139
00140
00141 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00142
00143 #ifdef  DEBUG
00144 void check_failed(uint8_t *file, uint32_t line);
00145 #endif
00146
00147
00148 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/PWMSignal/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/PWMSignal/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK ----------------------------*/
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 #define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Polling_Match/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Polling_Match/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 #define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/Terminal_9_12x6.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/Terminal_9_12x6.c
Go to the documentation of this file.
00001 /*************************************************************************
00002  *
00003  *    Used with ICCARM and AARM.
00004  *
00005  *    (c) Copyright IAR Systems 2006
00006  *
00007  *    File name   : Terminal_9_12x6.c
00008  *    Description : Font Terminal 9 (12x6)
00009  *
00010  *    History :
00011  *    1. Date        : December 2, 2006
00012  *       Author      : Stanimir Bonev
00013  *       Description : Create
00014  *
00015  *    $Revision: 28532 $
00016  **************************************************************************/
00017 #include "drv_glcd.h"
00018
00019 static const unsigned char TextStream [] = {
00020                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00021                 0x00, 0x00, 0x00, 0x00, 0x0e, 0x11, 0x11, 0x1b,
00022                 0x11, 0x11, 0x1b, 0x15, 0x11, 0x0e, 0x00, 0x00,
00023                 0x0e, 0x1f, 0x1f, 0x15, 0x1f, 0x1f, 0x15, 0x1b,
00024                 0x1f, 0x0e, 0x00, 0x00, 0x00, 0x0a, 0x1b, 0x1f,
00025                 0x1f, 0x1f, 0x1f, 0x0e, 0x0e, 0x04, 0x04, 0x00,
00026                 0x04, 0x04, 0x0e, 0x0e, 0x1f, 0x1f, 0x1f, 0x0e,
00027                 0x0e, 0x04, 0x04, 0x00, 0x04, 0x0e, 0x0e, 0x0e,
00028                 0x04, 0x1f, 0x1f, 0x0e, 0x04, 0x0e, 0x00, 0x00,
00029                 0x04, 0x04, 0x0e, 0x0e, 0x1f, 0x1f, 0x1f, 0x0e,
00030                 0x04, 0x0e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00031                 0x00, 0x06, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00,
00032                 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x19, 0x19, 0x1f,
00033                 0x1f, 0x1f, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00,
00034                 0x0e, 0x0a, 0x0a, 0x0e, 0x00, 0x00, 0x00, 0x00,
00035                 0x1f, 0x1f, 0x1f, 0x1f, 0x11, 0x15, 0x15, 0x11,
00036                 0x1f, 0x1f, 0x1f, 0x1f, 0x00, 0x00, 0x1c, 0x18,
00037                 0x14, 0x06, 0x09, 0x09, 0x09, 0x06, 0x00, 0x00,
00038                 0x00, 0x06, 0x09, 0x09, 0x09, 0x06, 0x02, 0x02,
00039                 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x0c,
00040                 0x0c, 0x04, 0x04, 0x04, 0x07, 0x03, 0x00, 0x00,
00041                 0x0c, 0x0a, 0x0e, 0x0a, 0x0a, 0x0a, 0x0e, 0x0e,
00042                 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00043                 0x15, 0x0e, 0x11, 0x0e, 0x15, 0x00, 0x00, 0x00,
00044                 0x00, 0x00, 0x01, 0x03, 0x07, 0x0f, 0x07, 0x03,
00045                 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c,
00046                 0x0e, 0x0f, 0x0e, 0x0c, 0x08, 0x00, 0x00, 0x00,
00047                 0x00, 0x04, 0x0e, 0x15, 0x04, 0x04, 0x04, 0x15,
00048                 0x0e, 0x04, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x0a,
00049                 0x0a, 0x0a, 0x0a, 0x00, 0x0a, 0x0a, 0x00, 0x00,
00050                 0x00, 0x0e, 0x0b, 0x0b, 0x0b, 0x0b, 0x0a, 0x0a,
00051                 0x0a, 0x0a, 0x00, 0x00, 0x00, 0x06, 0x09, 0x01,
00052                 0x06, 0x09, 0x06, 0x08, 0x09, 0x06, 0x00, 0x00,
00053                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00054                 0x0f, 0x0f, 0x00, 0x00, 0x00, 0x04, 0x0e, 0x15,
00055                 0x04, 0x04, 0x04, 0x15, 0x0e, 0x04, 0x1f, 0x00,
00056                 0x00, 0x04, 0x0e, 0x15, 0x04, 0x04, 0x04, 0x04,
00057                 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x04, 0x04,
00058                 0x04, 0x04, 0x04, 0x15, 0x0e, 0x04, 0x00, 0x00,
00059                 0x00, 0x00, 0x00, 0x02, 0x04, 0x0f, 0x04, 0x02,
00060                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04,
00061                 0x02, 0x0f, 0x02, 0x04, 0x00, 0x00, 0x00, 0x00,
00062                 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x0f,
00063                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a,
00064                 0x0a, 0x1f, 0x0a, 0x0a, 0x00, 0x00, 0x00, 0x00,
00065                 0x00, 0x00, 0x00, 0x04, 0x04, 0x0e, 0x0e, 0x1f,
00066                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f,
00067                 0x0e, 0x0e, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00,
00068                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00069                 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x04, 0x04,
00070                 0x04, 0x04, 0x04, 0x00, 0x04, 0x04, 0x00, 0x00,
00071                 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00, 0x00, 0x00,
00072                 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x0a, 0x1f,
00073                 0x0a, 0x0a, 0x1f, 0x0a, 0x0a, 0x00, 0x00, 0x00,
00074                 0x00, 0x02, 0x06, 0x09, 0x01, 0x02, 0x04, 0x08,
00075                 0x09, 0x06, 0x04, 0x00, 0x00, 0x0b, 0x0b, 0x04,
00076                 0x04, 0x02, 0x02, 0x02, 0x0d, 0x0d, 0x00, 0x00,
00077                 0x00, 0x02, 0x05, 0x05, 0x05, 0x02, 0x15, 0x09,
00078                 0x09, 0x16, 0x00, 0x00, 0x0c, 0x0c, 0x08, 0x04,
00079                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00080                 0x00, 0x04, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02,
00081                 0x02, 0x04, 0x00, 0x00, 0x00, 0x02, 0x04, 0x04,
00082                 0x04, 0x04, 0x04, 0x04, 0x04, 0x02, 0x00, 0x00,
00083                 0x00, 0x00, 0x04, 0x15, 0x0e, 0x0e, 0x15, 0x04,
00084                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04,
00085                 0x04, 0x1f, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00,
00086                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00087                 0x06, 0x06, 0x04, 0x02, 0x00, 0x00, 0x00, 0x00,
00088                 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00089                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00090                 0x06, 0x06, 0x00, 0x00, 0x00, 0x08, 0x08, 0x04,
00091                 0x04, 0x02, 0x02, 0x02, 0x01, 0x01, 0x00, 0x00,
00092                 0x00, 0x0e, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09,
00093                 0x09, 0x07, 0x00, 0x00, 0x00, 0x04, 0x06, 0x05,
00094                 0x04, 0x04, 0x04, 0x04, 0x04, 0x0f, 0x00, 0x00,
00095                 0x00, 0x06, 0x09, 0x09, 0x08, 0x04, 0x02, 0x01,
00096                 0x01, 0x0f, 0x00, 0x00, 0x00, 0x06, 0x09, 0x08,
00097                 0x08, 0x06, 0x08, 0x08, 0x09, 0x06, 0x00, 0x00,
00098                 0x00, 0x08, 0x0c, 0x0a, 0x0a, 0x09, 0x0f, 0x08,
00099                 0x08, 0x08, 0x00, 0x00, 0x00, 0x0f, 0x01, 0x01,
00100                 0x01, 0x07, 0x08, 0x08, 0x09, 0x06, 0x00, 0x00,
00101                 0x00, 0x0c, 0x02, 0x01, 0x07, 0x09, 0x09, 0x09,
00102                 0x09, 0x06, 0x00, 0x00, 0x00, 0x0f, 0x08, 0x08,
00103                 0x08, 0x04, 0x04, 0x02, 0x02, 0x02, 0x00, 0x00,
00104                 0x00, 0x06, 0x09, 0x09, 0x09, 0x06, 0x09, 0x09,
00105                 0x09, 0x06, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09,
00106                 0x09, 0x09, 0x0e, 0x08, 0x04, 0x03, 0x00, 0x00,
00107                 0x00, 0x00, 0x00, 0x00, 0x06, 0x06, 0x00, 0x00,
00108                 0x06, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00109                 0x06, 0x06, 0x00, 0x00, 0x06, 0x06, 0x04, 0x02,
00110                 0x00, 0x00, 0x08, 0x04, 0x02, 0x01, 0x01, 0x02,
00111                 0x04, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00112                 0x00, 0x0f, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00,
00113                 0x00, 0x00, 0x01, 0x02, 0x04, 0x08, 0x08, 0x04,
00114                 0x02, 0x01, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09,
00115                 0x08, 0x04, 0x04, 0x00, 0x04, 0x04, 0x00, 0x00,
00116                 0x00, 0x06, 0x09, 0x09, 0x09, 0x0d, 0x0d, 0x01,
00117                 0x01, 0x0e, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09,
00118                 0x09, 0x0f, 0x09, 0x09, 0x09, 0x09, 0x00, 0x00,
00119                 0x00, 0x07, 0x09, 0x09, 0x09, 0x07, 0x09, 0x09,
00120                 0x09, 0x07, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09,
00121                 0x01, 0x01, 0x01, 0x01, 0x09, 0x06, 0x00, 0x00,
00122                 0x00, 0x07, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09,
00123                 0x09, 0x07, 0x00, 0x00, 0x00, 0x0f, 0x01, 0x01,
00124                 0x01, 0x0f, 0x01, 0x01, 0x01, 0x0f, 0x00, 0x00,
00125                 0x00, 0x0f, 0x01, 0x01, 0x01, 0x0f, 0x01, 0x01,
00126                 0x01, 0x01, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09,
00127                 0x01, 0x01, 0x0d, 0x09, 0x09, 0x06, 0x00, 0x00,
00128                 0x00, 0x09, 0x09, 0x09, 0x09, 0x0f, 0x09, 0x09,
00129                 0x09, 0x09, 0x00, 0x00, 0x00, 0x0e, 0x04, 0x04,
00130                 0x04, 0x04, 0x04, 0x04, 0x04, 0x0e, 0x00, 0x00,
00131                 0x00, 0x0e, 0x04, 0x04, 0x04, 0x04, 0x04, 0x05,
00132                 0x05, 0x02, 0x00, 0x00, 0x00, 0x09, 0x09, 0x05,
00133                 0x05, 0x03, 0x05, 0x05, 0x09, 0x09, 0x00, 0x00,
00134                 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
00135                 0x01, 0x0f, 0x00, 0x00, 0x00, 0x09, 0x09, 0x0f,
00136                 0x0f, 0x09, 0x09, 0x09, 0x09, 0x09, 0x00, 0x00,
00137                 0x00, 0x09, 0x09, 0x0b, 0x0b, 0x0d, 0x0d, 0x09,
00138                 0x09, 0x09, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09,
00139                 0x09, 0x09, 0x09, 0x09, 0x09, 0x06, 0x00, 0x00,
00140                 0x00, 0x07, 0x09, 0x09, 0x09, 0x07, 0x01, 0x01,
00141                 0x01, 0x01, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09,
00142                 0x09, 0x09, 0x09, 0x09, 0x09, 0x06, 0x04, 0x08,
00143                 0x00, 0x07, 0x09, 0x09, 0x09, 0x07, 0x03, 0x05,
00144                 0x09, 0x09, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09,
00145                 0x01, 0x06, 0x08, 0x09, 0x09, 0x06, 0x00, 0x00,
00146                 0x00, 0x1f, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00147                 0x04, 0x04, 0x00, 0x00, 0x00, 0x09, 0x09, 0x09,
00148                 0x09, 0x09, 0x09, 0x09, 0x09, 0x06, 0x00, 0x00,
00149                 0x00, 0x09, 0x09, 0x09, 0x09, 0x09, 0x0a, 0x0a,
00150                 0x04, 0x04, 0x00, 0x00, 0x00, 0x09, 0x09, 0x09,
00151                 0x09, 0x09, 0x09, 0x0f, 0x09, 0x09, 0x00, 0x00,
00152                 0x00, 0x09, 0x09, 0x09, 0x06, 0x06, 0x06, 0x09,
00153                 0x09, 0x09, 0x00, 0x00, 0x00, 0x11, 0x11, 0x11,
00154                 0x0a, 0x0a, 0x04, 0x04, 0x04, 0x04, 0x00, 0x00,
00155                 0x00, 0x0f, 0x08, 0x04, 0x04, 0x02, 0x02, 0x01,
00156                 0x01, 0x0f, 0x00, 0x00, 0x00, 0x06, 0x02, 0x02,
00157                 0x02, 0x02, 0x02, 0x02, 0x02, 0x06, 0x00, 0x00,
00158                 0x00, 0x01, 0x01, 0x02, 0x02, 0x04, 0x04, 0x04,
00159                 0x08, 0x08, 0x00, 0x00, 0x00, 0x06, 0x04, 0x04,
00160                 0x04, 0x04, 0x04, 0x04, 0x04, 0x06, 0x00, 0x00,
00161                 0x00, 0x04, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00,
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00163                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f,
00164                 0x06, 0x06, 0x02, 0x04, 0x00, 0x00, 0x00, 0x00,
00165                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00166                 0x06, 0x08, 0x0e, 0x09, 0x09, 0x0e, 0x00, 0x00,
00167                 0x00, 0x01, 0x01, 0x01, 0x07, 0x09, 0x09, 0x09,
00168                 0x09, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00169                 0x0e, 0x01, 0x01, 0x01, 0x01, 0x0e, 0x00, 0x00,
00170                 0x00, 0x08, 0x08, 0x08, 0x0e, 0x09, 0x09, 0x09,
00171                 0x09, 0x0e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00172                 0x06, 0x09, 0x09, 0x0f, 0x01, 0x0e, 0x00, 0x00,
00173                 0x00, 0x04, 0x02, 0x02, 0x07, 0x02, 0x02, 0x02,
00174                 0x02, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00175                 0x0e, 0x09, 0x09, 0x09, 0x09, 0x0e, 0x08, 0x06,
00176                 0x00, 0x01, 0x01, 0x01, 0x07, 0x09, 0x09, 0x09,
00177                 0x09, 0x09, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00,
00178                 0x04, 0x04, 0x04, 0x04, 0x04, 0x0e, 0x00, 0x00,
00179                 0x00, 0x00, 0x04, 0x00, 0x04, 0x04, 0x04, 0x04,
00180                 0x04, 0x04, 0x05, 0x02, 0x00, 0x01, 0x01, 0x01,
00181                 0x09, 0x05, 0x03, 0x03, 0x05, 0x09, 0x00, 0x00,
00182                 0x00, 0x06, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00183                 0x04, 0x0e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00184                 0x09, 0x0f, 0x09, 0x09, 0x09, 0x09, 0x00, 0x00,
00185                 0x00, 0x00, 0x00, 0x00, 0x05, 0x0b, 0x09, 0x09,
00186                 0x09, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00187                 0x06, 0x09, 0x09, 0x09, 0x09, 0x06, 0x00, 0x00,
00188                 0x00, 0x00, 0x00, 0x00, 0x07, 0x09, 0x09, 0x09,
00189                 0x09, 0x07, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00,
00190                 0x0e, 0x09, 0x09, 0x09, 0x09, 0x0e, 0x08, 0x08,
00191                 0x00, 0x00, 0x00, 0x00, 0x0d, 0x0a, 0x02, 0x02,
00192                 0x02, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00193                 0x06, 0x09, 0x02, 0x04, 0x09, 0x06, 0x00, 0x00,
00194                 0x00, 0x00, 0x02, 0x02, 0x07, 0x02, 0x02, 0x02,
00195                 0x02, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00196                 0x09, 0x09, 0x09, 0x09, 0x09, 0x0e, 0x00, 0x00,
00197                 0x00, 0x00, 0x00, 0x00, 0x09, 0x09, 0x0a, 0x0a,
00198                 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00199                 0x09, 0x09, 0x09, 0x09, 0x0f, 0x09, 0x00, 0x00,
00200                 0x00, 0x00, 0x00, 0x00, 0x09, 0x09, 0x06, 0x06,
00201                 0x09, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00202                 0x09, 0x09, 0x09, 0x09, 0x09, 0x0e, 0x08, 0x07,
00203                 0x00, 0x00, 0x00, 0x00, 0x0f, 0x08, 0x04, 0x02,
00204                 0x01, 0x0f, 0x00, 0x00, 0x00, 0x04, 0x02, 0x02,
00205                 0x02, 0x01, 0x02, 0x02, 0x02, 0x04, 0x00, 0x00,
00206                 0x04, 0x04, 0x04, 0x04, 0x00, 0x04, 0x04, 0x04,
00207                 0x04, 0x04, 0x00, 0x00, 0x00, 0x02, 0x04, 0x04,
00208                 0x04, 0x08, 0x04, 0x04, 0x04, 0x02, 0x00, 0x00,
00209                 0x00, 0x0a, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
00210                 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x04, 0x0a,
00211                 0x0a, 0x11, 0x11, 0x11, 0x11, 0x1f, 0x00, 0x00,
00212                 0x00, 0x0e, 0x09, 0x09, 0x09, 0x0f, 0x09, 0x09,
00213                 0x09, 0x09, 0x00, 0x00, 0x00, 0x0f, 0x01, 0x01,
00214                 0x01, 0x07, 0x09, 0x09, 0x09, 0x07, 0x00, 0x00,
00215                 0x00, 0x07, 0x09, 0x09, 0x09, 0x07, 0x09, 0x09,
00216                 0x09, 0x07, 0x00, 0x00, 0x00, 0x0f, 0x01, 0x01,
00217                 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00,
00218                 0x00, 0x0c, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00219                 0x0a, 0x1f, 0x11, 0x00, 0x00, 0x0f, 0x01, 0x01,
00220                 0x01, 0x0f, 0x01, 0x01, 0x01, 0x0f, 0x00, 0x00,
00221                 0x00, 0x15, 0x15, 0x15, 0x15, 0x0e, 0x15, 0x15,
00222                 0x15, 0x15, 0x00, 0x00, 0x00, 0x06, 0x09, 0x08,
00223                 0x08, 0x06, 0x08, 0x08, 0x09, 0x06, 0x00, 0x00,
00224                 0x00, 0x09, 0x09, 0x09, 0x0d, 0x0d, 0x0b, 0x0b,
00225                 0x09, 0x09, 0x00, 0x00, 0x06, 0x09, 0x09, 0x09,
00226                 0x0d, 0x0d, 0x0b, 0x0b, 0x09, 0x09, 0x00, 0x00,
00227                 0x00, 0x09, 0x09, 0x05, 0x05, 0x03, 0x05, 0x05,
00228                 0x09, 0x09, 0x00, 0x00, 0x00, 0x0e, 0x09, 0x09,
00229                 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x00, 0x00,
00230                 0x00, 0x09, 0x09, 0x0f, 0x0f, 0x09, 0x09, 0x09,
00231                 0x09, 0x09, 0x00, 0x00, 0x00, 0x09, 0x09, 0x09,
00232                 0x09, 0x0f, 0x09, 0x09, 0x09, 0x09, 0x00, 0x00,
00233                 0x00, 0x06, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09,
00234                 0x09, 0x06, 0x00, 0x00, 0x00, 0x0f, 0x09, 0x09,
00235                 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x00, 0x00,
00236                 0x00, 0x07, 0x09, 0x09, 0x09, 0x07, 0x01, 0x01,
00237                 0x01, 0x01, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09,
00238                 0x01, 0x01, 0x01, 0x01, 0x09, 0x06, 0x00, 0x00,
00239                 0x00, 0x1f, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00240                 0x04, 0x04, 0x00, 0x00, 0x00, 0x09, 0x09, 0x09,
00241                 0x09, 0x0e, 0x08, 0x08, 0x09, 0x06, 0x00, 0x00,
00242                 0x00, 0x04, 0x0e, 0x15, 0x15, 0x15, 0x15, 0x0e,
00243                 0x04, 0x04, 0x00, 0x00, 0x00, 0x09, 0x09, 0x09,
00244                 0x06, 0x06, 0x06, 0x09, 0x09, 0x09, 0x00, 0x00,
00245                 0x00, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09,
00246                 0x09, 0x1f, 0x10, 0x10, 0x00, 0x09, 0x09, 0x09,
00247                 0x09, 0x0e, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00,
00248                 0x00, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
00249                 0x15, 0x1f, 0x00, 0x00, 0x00, 0x15, 0x15, 0x15,
00250                 0x15, 0x15, 0x15, 0x15, 0x15, 0x1f, 0x10, 0x10,
00251                 0x00, 0x03, 0x03, 0x02, 0x02, 0x0e, 0x12, 0x12,
00252                 0x12, 0x0e, 0x00, 0x00, 0x00, 0x09, 0x09, 0x09,
00253                 0x09, 0x0b, 0x0d, 0x0d, 0x0d, 0x0b, 0x00, 0x00,
00254                 0x00, 0x01, 0x01, 0x01, 0x01, 0x07, 0x09, 0x09,
00255                 0x09, 0x07, 0x00, 0x00, 0x00, 0x06, 0x09, 0x08,
00256                 0x08, 0x0e, 0x08, 0x08, 0x09, 0x06, 0x00, 0x00,
00257                 0x00, 0x09, 0x15, 0x15, 0x15, 0x17, 0x15, 0x15,
00258                 0x15, 0x09, 0x00, 0x00, 0x00, 0x0e, 0x09, 0x09,
00259                 0x09, 0x0e, 0x0c, 0x0a, 0x09, 0x09, 0x00, 0x00,
00260                 0x00, 0x00, 0x00, 0x00, 0x06, 0x08, 0x0e, 0x09,
00261                 0x09, 0x0e, 0x00, 0x00, 0x00, 0x00, 0x08, 0x06,
00262                 0x01, 0x07, 0x09, 0x09, 0x09, 0x06, 0x00, 0x00,
00263                 0x00, 0x00, 0x00, 0x00, 0x07, 0x09, 0x07, 0x09,
00264                 0x09, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00265                 0x0f, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00,
00266                 0x00, 0x00, 0x00, 0x00, 0x0c, 0x0a, 0x0a, 0x0a,
00267                 0x0a, 0x1f, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00,
00268                 0x06, 0x09, 0x09, 0x0f, 0x01, 0x0e, 0x00, 0x00,
00269                 0x00, 0x00, 0x00, 0x00, 0x15, 0x15, 0x0e, 0x15,
00270                 0x15, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00271                 0x06, 0x09, 0x04, 0x08, 0x09, 0x06, 0x00, 0x00,
00272                 0x00, 0x00, 0x00, 0x00, 0x09, 0x09, 0x0d, 0x0b,
00273                 0x09, 0x09, 0x00, 0x00, 0x00, 0x00, 0x04, 0x02,
00274                 0x09, 0x09, 0x0d, 0x0b, 0x09, 0x09, 0x00, 0x00,
00275                 0x00, 0x00, 0x00, 0x00, 0x09, 0x05, 0x03, 0x03,
00276                 0x05, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00277                 0x0e, 0x09, 0x09, 0x09, 0x09, 0x09, 0x00, 0x00,
00278                 0x00, 0x00, 0x00, 0x00, 0x09, 0x0f, 0x09, 0x09,
00279                 0x09, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00280                 0x09, 0x09, 0x0f, 0x09, 0x09, 0x09, 0x00, 0x00,
00281                 0x00, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09, 0x09,
00282                 0x09, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00283                 0x0f, 0x09, 0x09, 0x09, 0x09, 0x09, 0x00, 0x00,
00284                 0x00, 0x00, 0x15, 0x00, 0x00, 0x0a, 0x00, 0x00,
00285                 0x15, 0x00, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x15,
00286                 0x00, 0x0a, 0x00, 0x15, 0x00, 0x0a, 0x00, 0x15,
00287                 0x0a, 0x15, 0x0a, 0x15, 0x0a, 0x15, 0x0a, 0x15,
00288                 0x0a, 0x15, 0x0a, 0x15, 0x04, 0x04, 0x04, 0x04,
00289                 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00290                 0x04, 0x04, 0x04, 0x04, 0x04, 0x07, 0x04, 0x04,
00291                 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00292                 0x07, 0x04, 0x07, 0x04, 0x04, 0x04, 0x04, 0x04,
00293                 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0b, 0x0a, 0x0a,
00294                 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00, 0x00, 0x00,
00295                 0x00, 0x0f, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00296                 0x00, 0x00, 0x00, 0x00, 0x07, 0x04, 0x07, 0x04,
00297                 0x04, 0x04, 0x04, 0x04, 0x0a, 0x0a, 0x0a, 0x0a,
00298                 0x0b, 0x08, 0x0b, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00299                 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00300                 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00, 0x00, 0x00,
00301                 0x0f, 0x08, 0x0b, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00302                 0x0a, 0x0a, 0x0a, 0x0a, 0x0b, 0x08, 0x0f, 0x00,
00303                 0x00, 0x00, 0x00, 0x00, 0x0a, 0x0a, 0x0a, 0x0a,
00304                 0x0a, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00305                 0x04, 0x04, 0x04, 0x04, 0x07, 0x04, 0x07, 0x00,
00306                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00307                 0x00, 0x07, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00308                 0x04, 0x04, 0x04, 0x04, 0x04, 0x1c, 0x00, 0x00,
00309                 0x00, 0x00, 0x00, 0x00, 0x04, 0x04, 0x04, 0x04,
00310                 0x04, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00311                 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x04, 0x04,
00312                 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00313                 0x04, 0x1c, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00314                 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x00, 0x00,
00315                 0x00, 0x00, 0x00, 0x00, 0x04, 0x04, 0x04, 0x04,
00316                 0x04, 0x1f, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00317                 0x04, 0x04, 0x04, 0x04, 0x1c, 0x04, 0x1c, 0x04,
00318                 0x04, 0x04, 0x04, 0x04, 0x0a, 0x0a, 0x0a, 0x0a,
00319                 0x0a, 0x1a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00320                 0x0a, 0x0a, 0x0a, 0x0a, 0x1a, 0x02, 0x1e, 0x00,
00321                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00322                 0x1e, 0x02, 0x1a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00323                 0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x00, 0x1f, 0x00,
00324                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00325                 0x1f, 0x00, 0x1b, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00326                 0x0a, 0x0a, 0x0a, 0x0a, 0x1a, 0x02, 0x1a, 0x0a,
00327                 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00, 0x00, 0x00,
00328                 0x1f, 0x00, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00,
00329                 0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x00, 0x1b, 0x0a,
00330                 0x0a, 0x0a, 0x0a, 0x0a, 0x04, 0x04, 0x04, 0x04,
00331                 0x1f, 0x00, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00,
00332                 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x1f, 0x00, 0x00,
00333                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00334                 0x1f, 0x00, 0x1f, 0x04, 0x04, 0x04, 0x04, 0x04,
00335                 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x0a, 0x0a,
00336                 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00337                 0x0a, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00338                 0x04, 0x04, 0x04, 0x04, 0x1c, 0x04, 0x1c, 0x00,
00339                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00340                 0x1c, 0x04, 0x1c, 0x04, 0x04, 0x04, 0x04, 0x04,
00341                 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x0a, 0x0a,
00342                 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00343                 0x0a, 0x1b, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
00344                 0x04, 0x04, 0x04, 0x04, 0x1f, 0x00, 0x1f, 0x04,
00345                 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00346                 0x04, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00347                 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x04, 0x04,
00348                 0x04, 0x04, 0x04, 0x04, 0x1f, 0x1f, 0x1f, 0x1f,
00349                 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f,
00350                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f,
00351                 0x1f, 0x1f, 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07,
00352                 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
00353                 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c,
00354                 0x1c, 0x1c, 0x1c, 0x1c, 0x1f, 0x1f, 0x1f, 0x1f,
00355                 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00356                 0x00, 0x00, 0x00, 0x00, 0x07, 0x09, 0x09, 0x09,
00357                 0x09, 0x07, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00,
00358                 0x0e, 0x01, 0x01, 0x01, 0x01, 0x0e, 0x00, 0x00,
00359                 0x00, 0x00, 0x00, 0x00, 0x1f, 0x04, 0x04, 0x04,
00360                 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00361                 0x09, 0x09, 0x09, 0x09, 0x09, 0x0e, 0x08, 0x07,
00362                 0x00, 0x00, 0x00, 0x00, 0x04, 0x0e, 0x15, 0x15,
00363                 0x15, 0x0e, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00,
00364                 0x09, 0x09, 0x06, 0x06, 0x09, 0x09, 0x00, 0x00,
00365                 0x00, 0x00, 0x00, 0x00, 0x09, 0x09, 0x09, 0x09,
00366                 0x09, 0x1f, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00,
00367                 0x09, 0x09, 0x09, 0x0e, 0x08, 0x08, 0x00, 0x00,
00368                 0x00, 0x00, 0x00, 0x00, 0x15, 0x15, 0x15, 0x15,
00369                 0x15, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00370                 0x15, 0x15, 0x15, 0x15, 0x15, 0x1f, 0x10, 0x10,
00371                 0x00, 0x00, 0x00, 0x00, 0x03, 0x02, 0x06, 0x0a,
00372                 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00373                 0x09, 0x09, 0x0b, 0x0d, 0x0d, 0x0b, 0x00, 0x00,
00374                 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x07, 0x09,
00375                 0x09, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00376                 0x07, 0x08, 0x0e, 0x08, 0x08, 0x07, 0x00, 0x00,
00377                 0x00, 0x00, 0x00, 0x00, 0x09, 0x15, 0x17, 0x15,
00378                 0x15, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00379                 0x0e, 0x09, 0x09, 0x0e, 0x09, 0x09, 0x00, 0x00,
00380                 0x09, 0x0f, 0x01, 0x01, 0x01, 0x0f, 0x01, 0x01,
00381                 0x01, 0x0f, 0x00, 0x00, 0x00, 0x0a, 0x0a, 0x00,
00382                 0x06, 0x09, 0x09, 0x0f, 0x01, 0x0e, 0x00, 0x00,
00383                 0x00, 0x06, 0x09, 0x01, 0x01, 0x07, 0x01, 0x01,
00384                 0x09, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00385                 0x0e, 0x01, 0x07, 0x01, 0x01, 0x0e, 0x00, 0x00,
00386                 0x11, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
00387                 0x04, 0x0e, 0x00, 0x00, 0x00, 0x0a, 0x0a, 0x00,
00388                 0x06, 0x04, 0x04, 0x04, 0x04, 0x0e, 0x00, 0x00,
00389                 0x06, 0x09, 0x09, 0x09, 0x09, 0x0e, 0x08, 0x08,
00390                 0x09, 0x06, 0x00, 0x00, 0x00, 0x00, 0x09, 0x06,
00391                 0x09, 0x09, 0x09, 0x09, 0x09, 0x0e, 0x08, 0x07,
00392                 0x06, 0x09, 0x09, 0x06, 0x00, 0x00, 0x00, 0x00,
00393                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00394                 0x04, 0x0e, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
00395                 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x04, 0x00,
00396                 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x04, 0x04,
00397                 0x04, 0x04, 0x05, 0x05, 0x06, 0x04, 0x00, 0x00,
00398                 0x00, 0x1d, 0x1d, 0x05, 0x05, 0x1f, 0x07, 0x05,
00399                 0x05, 0x05, 0x00, 0x00, 0x00, 0x09, 0x06, 0x09,
00400                 0x09, 0x09, 0x09, 0x09, 0x06, 0x09, 0x00, 0x00,
00401                 0x00, 0x00, 0x00, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e,
00402                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00403                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
00404 };
00405
00406 FontType_t Terminal_9_12_6 =
00407 {
00408   6,
00409   12,
00410   0,
00411   255,
00412   (unsigned char*)TextStream,
00413   (unsigned char*)"Terminal 9 (12x6)"
00414 };
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/AutoBaud/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/AutoBaud/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/DMA/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/DMA/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /* GPDMA ------------------------------- */
00125 #define _GPDMA
00126
00127
00128 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00129
00130 #ifdef  DEBUG
00131 /*******************************************************************************
00132 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00133 *                               It is used only if the library is compiled in DEBUG mode.
00134 * @param[in]    expr - If expr is false, it calls check_failed() function
00135 *                       which reports the name of the source file and the source
00136 *                       line number of the call that failed.
00137 *                    - If expr is true, it returns no value.
00138 * @return               None
00139 *******************************************************************************/
00140 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00141 #else
00142 #define CHECK_PARAM(expr)
00143 #endif /* DEBUG */
00144
00145
00146
00147 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00148
00149 #ifdef  DEBUG
00150 void check_failed(uint8_t *file, uint32_t line);
00151 #endif
00152
00153
00154 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:45 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/HWFlowControl/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/HWFlowControl/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039 /* Comment the line below to disable the specific peripheral inclusion */
00040
00041 /* GPIO ------------------------------- */
00042 //#define _GPIO
00043
00044 /* EXTI ------------------------------- */
00045 //#define _EXTI
00046
00047 /* UART ------------------------------- */
00048 #define _UART
00049 #define _UART0
00050 #define _UART1
00051 #define _UART2
00052 #define _UART3
00053
00054 /* SPI ------------------------------- */
00055 //#define _SPI
00056
00057 /* SSP ------------------------------- */
00058 //#define _SSP
00059 //#define _SSP0
00060 //#define _SSP1
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* I2C ------------------------------- */
00066 //#define _I2C
00067 //#define _I2C0
00068 //#define _I2C1
00069 //#define _I2C2
00070
00071 /* TIMER ------------------------------- */
00072 //#define _TIM
00073
00074 /* WDT ------------------------------- */
00075 //#define _WDT
00076
00077
00078 /* GPDMA ------------------------------- */
00079 //#define _GPDMA
00080
00081
00082 /* DAC ------------------------------- */
00083 //#define _DAC
00084
00085 /* DAC ------------------------------- */
00086 //#define _ADC
00087
00088
00089 /* PWM ------------------------------- */
00090 //#define _PWM
00091 //#define _PWM1
00092
00093 /* RTC ------------------------------- */
00094 //#define _RTC
00095
00096 /* I2S ------------------------------- */
00097 //#define _I2S
00098
00099 /* USB device ------------------------------- */
00100 //#define _USBDEV
00101 //#define _USB_DMA
00102
00103 /* QEI ------------------------------- */
00104 //#define _QEI
00105
00106 /* MCPWM ------------------------------- */
00107 //#define _MCPWM
00108
00109 /* CAN--------------------------------*/
00110 //#define _CAN
00111
00112 /* RIT ------------------------------- */
00113 //#define _RIT
00114
00115 /* EMAC ------------------------------ */
00116 //#define _EMAC
00117
00118
00119
00120 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00121
00122 #ifdef  DEBUG
00123 /*******************************************************************************
00124 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00125 *                               It is used only if the library is compiled in DEBUG mode.
00126 * @param[in]    expr - If expr is false, it calls check_failed() function
00127 *                       which reports the name of the source file and the source
00128 *                       line number of the call that failed.
00129 *                    - If expr is true, it returns no value.
00130 * @return               None
00131 *******************************************************************************/
00132 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00133 #else
00134 #define CHECK_PARAM(expr)
00135 #endif /* DEBUG */
00136
00137
00138
00139 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00140
00141 #ifdef  DEBUG
00142 void check_failed(uint8_t *file, uint32_t line);
00143 #endif
00144
00145
00146 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Receive/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Receive/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039 /* Comment the line below to disable the specific peripheral inclusion */
00040
00041 /* GPIO ------------------------------- */
00042 #define _GPIO
00043
00044 /* EXTI ------------------------------- */
00045 //#define _EXTI
00046
00047 /* UART ------------------------------- */
00048 #define _UART
00049 #define _UART0
00050 #define _UART1
00051 #define _UART2
00052 #define _UART3
00053
00054 /* SPI ------------------------------- */
00055 //#define _SPI
00056
00057 /* SSP ------------------------------- */
00058 //#define _SSP
00059 //#define _SSP0
00060 //#define _SSP1
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* I2C ------------------------------- */
00066 //#define _I2C
00067 //#define _I2C0
00068 //#define _I2C1
00069 //#define _I2C2
00070
00071 /* TIMER ------------------------------- */
00072 //#define _TIM
00073
00074 /* WDT ------------------------------- */
00075 //#define _WDT
00076
00077
00078 /* GPDMA ------------------------------- */
00079 //#define _GPDMA
00080
00081
00082 /* DAC ------------------------------- */
00083 //#define _DAC
00084
00085 /* DAC ------------------------------- */
00086 //#define _ADC
00087
00088
00089 /* PWM ------------------------------- */
00090 //#define _PWM
00091 //#define _PWM1
00092
00093 /* RTC ------------------------------- */
00094 //#define _RTC
00095
00096 /* I2S ------------------------------- */
00097 //#define _I2S
00098
00099 /* USB device ------------------------------- */
00100 //#define _USBDEV
00101 //#define _USB_DMA
00102
00103 /* QEI ------------------------------- */
00104 //#define _QEI
00105
00106 /* MCPWM ------------------------------- */
00107 //#define _MCPWM
00108
00109 /* CAN--------------------------------*/
00110 //#define _CAN
00111
00112 /* RIT ------------------------------- */
00113 //#define _RIT
00114
00115 /* EMAC ------------------------------ */
00116 //#define _EMAC
00117
00118
00119
00120 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00121
00122 #ifdef  DEBUG
00123 /*******************************************************************************
00124 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00125 *                               It is used only if the library is compiled in DEBUG mode.
00126 * @param[in]    expr - If expr is false, it calls check_failed() function
00127 *                       which reports the name of the source file and the source
00128 *                       line number of the call that failed.
00129 *                    - If expr is true, it returns no value.
00130 * @return               None
00131 *******************************************************************************/
00132 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00133 #else
00134 #define CHECK_PARAM(expr)
00135 #endif /* DEBUG */
00136
00137
00138
00139 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00140
00141 #ifdef  DEBUG
00142 void check_failed(uint8_t *file, uint32_t line);
00143 #endif
00144
00145
00146 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Transmit/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Transmit/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039 /* Comment the line below to disable the specific peripheral inclusion */
00040
00041 /* GPIO ------------------------------- */
00042 //#define _GPIO
00043
00044 /* EXTI ------------------------------- */
00045 //#define _EXTI
00046
00047 /* UART ------------------------------- */
00048 #define _UART
00049 #define _UART0
00050 #define _UART1
00051 #define _UART2
00052 #define _UART3
00053
00054 /* SPI ------------------------------- */
00055 //#define _SPI
00056
00057 /* SSP ------------------------------- */
00058 //#define _SSP
00059 //#define _SSP0
00060 //#define _SSP1
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* I2C ------------------------------- */
00066 //#define _I2C
00067 //#define _I2C0
00068 //#define _I2C1
00069 //#define _I2C2
00070
00071 /* TIMER ------------------------------- */
00072 //#define _TIM
00073
00074 /* WDT ------------------------------- */
00075 //#define _WDT
00076
00077
00078 /* GPDMA ------------------------------- */
00079 //#define _GPDMA
00080
00081
00082 /* DAC ------------------------------- */
00083 //#define _DAC
00084
00085 /* DAC ------------------------------- */
00086 //#define _ADC
00087
00088
00089 /* PWM ------------------------------- */
00090 //#define _PWM
00091 //#define _PWM1
00092
00093 /* RTC ------------------------------- */
00094 //#define _RTC
00095
00096 /* I2S ------------------------------- */
00097 //#define _I2S
00098
00099 /* USB device ------------------------------- */
00100 //#define _USBDEV
00101 //#define _USB_DMA
00102
00103 /* QEI ------------------------------- */
00104 //#define _QEI
00105
00106 /* MCPWM ------------------------------- */
00107 //#define _MCPWM
00108
00109 /* CAN--------------------------------*/
00110 //#define _CAN
00111
00112 /* RIT ------------------------------- */
00113 //#define _RIT
00114
00115 /* EMAC ------------------------------ */
00116 //#define _EMAC
00117
00118
00119
00120 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00121
00122 #ifdef  DEBUG
00123 /*******************************************************************************
00124 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00125 *                               It is used only if the library is compiled in DEBUG mode.
00126 * @param[in]    expr - If expr is false, it calls check_failed() function
00127 *                       which reports the name of the source file and the source
00128 *                       line number of the call that failed.
00129 *                    - If expr is true, it returns no value.
00130 * @return               None
00131 *******************************************************************************/
00132 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00133 #else
00134 #define CHECK_PARAM(expr)
00135 #endif /* DEBUG */
00136
00137
00138
00139 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00140
00141 #ifdef  DEBUG
00142 void check_failed(uint8_t *file, uint32_t line);
00143 #endif
00144
00145
00146 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/Polling/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/Polling/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039 /* Comment the line below to disable the specific peripheral inclusion */
00040
00041 /* DEBUG_FRAMWORK ------------------------------ */
00042 //#define _DBGFWK
00043
00044 /* GPIO ------------------------------- */
00045 //#define _GPIO
00046
00047 /* EXTI ------------------------------- */
00048 //#define _EXTI
00049
00050 /* UART ------------------------------- */
00051 #define _UART
00052 #define _UART0
00053 #define _UART1
00054 #define _UART2
00055 #define _UART3
00056
00057 /* SPI ------------------------------- */
00058 //#define _SPI
00059
00060 /* SSP ------------------------------- */
00061 //#define _SSP
00062 //#define _SSP0
00063 //#define _SSP1
00064
00065 /* SYSTICK --------------------------- */
00066 //#define _SYSTICK
00067
00068 /* I2C ------------------------------- */
00069 //#define _I2C
00070 //#define _I2C0
00071 //#define _I2C1
00072 //#define _I2C2
00073
00074 /* TIMER ------------------------------- */
00075 //#define _TIM
00076
00077 /* WDT ------------------------------- */
00078 //#define _WDT
00079
00080
00081 /* GPDMA ------------------------------- */
00082 //#define _GPDMA
00083
00084
00085 /* DAC ------------------------------- */
00086 //#define _DAC
00087
00088 /* DAC ------------------------------- */
00089 //#define _ADC
00090
00091
00092 /* PWM ------------------------------- */
00093 //#define _PWM
00094 //#define _PWM1
00095
00096 /* RTC ------------------------------- */
00097 //#define _RTC
00098
00099 /* I2S ------------------------------- */
00100 //#define _I2S
00101
00102 /* USB device ------------------------------- */
00103 //#define _USBDEV
00104 //#define _USB_DMA
00105
00106 /* QEI ------------------------------- */
00107 //#define _QEI
00108
00109 /* MCPWM ------------------------------- */
00110 //#define _MCPWM
00111
00112 /* CAN--------------------------------*/
00113 //#define _CAN
00114
00115 /* RIT ------------------------------- */
00116 //#define _RIT
00117
00118 /* EMAC ------------------------------ */
00119 //#define _EMAC
00120
00121
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00025 #ifndef LPC17XX_LIBCFG_H_
00026 #define LPC17XX_LIBCFG_H_
00027
00028 #include "lpc_types.h"
00029
00030
00031 /************************** DEBUG MODE DEFINITIONS *********************************/
00032 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00033    the "CHECK_PARAM" macro in the FW library code */
00034
00035 #define DEBUG
00036
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 //#define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 #define _UART
00053 #define _UART0
00054 #define _UART1
00055 #define _UART2
00056 #define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122
00123
00124
00125 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00126
00127 #ifdef  DEBUG
00128 /*******************************************************************************
00129 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00130 *                               It is used only if the library is compiled in DEBUG mode.
00131 * @param[in]    expr - If expr is false, it calls check_failed() function
00132 *                       which reports the name of the source file and the source
00133 *                       line number of the call that failed.
00134 *                    - If expr is true, it returns no value.
00135 * @return               None
00136 *******************************************************************************/
00137 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00138 #else
00139 #define CHECK_PARAM(expr)
00140 #endif /* DEBUG */
00141
00142
00143
00144 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00145
00146 #ifdef  DEBUG
00147 void check_failed(uint8_t *file, uint32_t line);
00148 #endif
00149
00150
00151 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 #define _UART1
00056 #define _UART2
00057 #define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124
00125 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00126
00127 #ifdef  DEBUG
00128 /*******************************************************************************
00129 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00130 *                               It is used only if the library is compiled in DEBUG mode.
00131 * @param[in]    expr - If expr is false, it calls check_failed() function
00132 *                       which reports the name of the source file and the source
00133 *                       line number of the call that failed.
00134 *                    - If expr is true, it returns no value.
00135 * @return               None
00136 *******************************************************************************/
00137 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00138 #else
00139 #define CHECK_PARAM(expr)
00140 #endif /* DEBUG */
00141
00142
00143
00144 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00145
00146 #ifdef  DEBUG
00147 void check_failed(uint8_t *file, uint32_t line);
00148 #endif
00149
00150
00151 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 //#define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 #define _UART1
00056 #define _UART2
00057 #define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 //#define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usb.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usb.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usb.h
00005  * Purpose: USB Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USB_H__
00020 #define __USB_H__
00021 #include "lpc_types.h"
00022 #if defined   (  __GNUC__  )
00023 #define __packed __attribute__((__packed__))
00024 #endif
00025
00026 #if defined     (  __CC_ARM  )
00027 typedef __packed union {
00028 #elif defined   (  __GNUC__  )
00029 typedef union __packed {
00030 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00031 #pragma pack(1)
00032 typedef union {
00033 #endif
00034   uint16_t W;
00035 #if defined     (  __CC_ARM  )
00036   __packed struct {
00037 #elif defined   (  __GNUC__  )
00038   struct __packed {
00039 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00040 #pragma pack(1)
00041   struct {
00042 #endif
00043     uint8_t L;
00044     uint8_t H;
00045   } WB;
00046 #ifdef __IAR_SYSTEMS_ICC__
00047 #pragma pack()
00048 #endif
00049 } WORD_BYTE;
00050 #ifdef __IAR_SYSTEMS_ICC__
00051 #pragma pack()
00052 #endif
00053
00054
00055 /* bmRequestType.Dir */
00056 #define REQUEST_HOST_TO_DEVICE     0
00057 #define REQUEST_DEVICE_TO_HOST     1
00058
00059 /* bmRequestType.Type */
00060 #define REQUEST_STANDARD           0
00061 #define REQUEST_CLASS              1
00062 #define REQUEST_VENDOR             2
00063 #define REQUEST_RESERVED           3
00064
00065 /* bmRequestType.Recipient */
00066 #define REQUEST_TO_DEVICE          0
00067 #define REQUEST_TO_INTERFACE       1
00068 #define REQUEST_TO_ENDPOINT        2
00069 #define REQUEST_TO_OTHER           3
00070
00071 /* bmRequestType Definition */
00072 #if defined     (  __CC_ARM  )
00073 typedef __packed union _REQUEST_TYPE {
00074 #elif defined   (  __GNUC__  )
00075 typedef union __packed _REQUEST_TYPE {
00076 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00077 #pragma pack(1)
00078 typedef union _REQUEST_TYPE {
00079 #endif
00080 #if defined     (  __CC_ARM  )
00081         __packed struct _BM {
00082 #elif defined   (  __GNUC__  )
00083         struct __packed _BM {
00084 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00085 #pragma pack(1)
00086         struct _BM {
00087 #endif
00088     uint8_t Recipient : 5;
00089     uint8_t Type      : 2;
00090     uint8_t Dir       : 1;
00091   } BM;
00092 #ifdef __IAR_SYSTEMS_ICC__
00093 #pragma pack()
00094 #endif
00095   uint8_t B;
00096 } REQUEST_TYPE;
00097 #ifdef __IAR_SYSTEMS_ICC__
00098 #pragma pack()
00099 #endif
00100
00101 /* USB Standard Request Codes */
00102 #define USB_REQUEST_GET_STATUS                 0
00103 #define USB_REQUEST_CLEAR_FEATURE              1
00104 #define USB_REQUEST_SET_FEATURE                3
00105 #define USB_REQUEST_SET_ADDRESS                5
00106 #define USB_REQUEST_GET_DESCRIPTOR             6
00107 #define USB_REQUEST_SET_DESCRIPTOR             7
00108 #define USB_REQUEST_GET_CONFIGURATION          8
00109 #define USB_REQUEST_SET_CONFIGURATION          9
00110 #define USB_REQUEST_GET_INTERFACE              10
00111 #define USB_REQUEST_SET_INTERFACE              11
00112 #define USB_REQUEST_SYNC_FRAME                 12
00113
00114 /* USB GET_STATUS Bit Values */
00115 #define USB_GETSTATUS_SELF_POWERED             0x01
00116 #define USB_GETSTATUS_REMOTE_WAKEUP            0x02
00117 #define USB_GETSTATUS_ENDPOINT_STALL           0x01
00118
00119 /* USB Standard Feature selectors */
00120 #define USB_FEATURE_ENDPOINT_STALL             0
00121 #define USB_FEATURE_REMOTE_WAKEUP              1
00122
00123 /* USB Default Control Pipe Setup Packet */
00124 #if defined     (  __CC_ARM  )
00125 typedef __packed struct _USB_SETUP_PACKET {
00126 #elif defined   (  __GNUC__  )
00127 typedef struct __packed _USB_SETUP_PACKET {
00128 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00129 #pragma pack(1)
00130 typedef struct _USB_SETUP_PACKET {
00131 #endif
00132   REQUEST_TYPE bmRequestType;
00133   uint8_t         bRequest;
00134   WORD_BYTE    wValue;
00135   WORD_BYTE    wIndex;
00136   uint16_t         wLength;
00137 } USB_SETUP_PACKET;
00138 #ifdef __IAR_SYSTEMS_ICC__
00139 #pragma pack()
00140 #endif
00141
00142
00143 /* USB Descriptor Types */
00144 #define USB_DEVICE_DESCRIPTOR_TYPE                  1
00145 #define USB_CONFIGURATION_DESCRIPTOR_TYPE           2
00146 #define USB_STRING_DESCRIPTOR_TYPE                  3
00147 #define USB_INTERFACE_DESCRIPTOR_TYPE               4
00148 #define USB_ENDPOINT_DESCRIPTOR_TYPE                5
00149 #define USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE        6
00150 #define USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE      7
00151 #define USB_INTERFACE_POWER_DESCRIPTOR_TYPE         8
00152 #define USB_OTG_DESCRIPTOR_TYPE                     9
00153 #define USB_DEBUG_DESCRIPTOR_TYPE                  10
00154 #define USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE  11
00155
00156 /* USB Device Classes */
00157 #define USB_DEVICE_CLASS_RESERVED              0x00
00158 #define USB_DEVICE_CLASS_AUDIO                 0x01
00159 #define USB_DEVICE_CLASS_COMMUNICATIONS        0x02
00160 #define USB_DEVICE_CLASS_HUMAN_INTERFACE       0x03
00161 #define USB_DEVICE_CLASS_MONITOR               0x04
00162 #define USB_DEVICE_CLASS_PHYSICAL_INTERFACE    0x05
00163 #define USB_DEVICE_CLASS_POWER                 0x06
00164 #define USB_DEVICE_CLASS_PRINTER               0x07
00165 #define USB_DEVICE_CLASS_STORAGE               0x08
00166 #define USB_DEVICE_CLASS_HUB                   0x09
00167 #define USB_DEVICE_CLASS_MISCELLANEOUS         0xEF
00168 #define USB_DEVICE_CLASS_VENDOR_SPECIFIC       0xFF
00169
00170 /* bmAttributes in Configuration Descriptor */
00171 #define USB_CONFIG_POWERED_MASK                0x40
00172 #define USB_CONFIG_BUS_POWERED                 0x80
00173 #define USB_CONFIG_SELF_POWERED                0xC0
00174 #define USB_CONFIG_REMOTE_WAKEUP               0x20
00175
00176 /* bMaxPower in Configuration Descriptor */
00177 #define USB_CONFIG_POWER_MA(mA)                ((mA)/2)
00178
00179 /* bEndpointAddress in Endpoint Descriptor */
00180 #define USB_ENDPOINT_DIRECTION_MASK            0x80
00181 #define USB_ENDPOINT_OUT(addr)                 ((addr) | 0x00)
00182 #define USB_ENDPOINT_IN(addr)                  ((addr) | 0x80)
00183
00184 /* bmAttributes in Endpoint Descriptor */
00185 #define USB_ENDPOINT_TYPE_MASK                 0x03
00186 #define USB_ENDPOINT_TYPE_CONTROL              0x00
00187 #define USB_ENDPOINT_TYPE_ISOCHRONOUS          0x01
00188 #define USB_ENDPOINT_TYPE_BULK                 0x02
00189 #define USB_ENDPOINT_TYPE_INTERRUPT            0x03
00190 #define USB_ENDPOINT_SYNC_MASK                 0x0C
00191 #define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION   0x00
00192 #define USB_ENDPOINT_SYNC_ASYNCHRONOUS         0x04
00193 #define USB_ENDPOINT_SYNC_ADAPTIVE             0x08
00194 #define USB_ENDPOINT_SYNC_SYNCHRONOUS          0x0C
00195 #define USB_ENDPOINT_USAGE_MASK                0x30
00196 #define USB_ENDPOINT_USAGE_DATA                0x00
00197 #define USB_ENDPOINT_USAGE_FEEDBACK            0x10
00198 #define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK   0x20
00199 #define USB_ENDPOINT_USAGE_RESERVED            0x30
00200
00201 /* USB Standard Device Descriptor */
00202 #if defined     (  __CC_ARM  )
00203 typedef __packed struct _USB_DEVICE_DESCRIPTOR {
00204 #elif defined   (  __GNUC__  )
00205 typedef struct __packed _USB_DEVICE_DESCRIPTOR {
00206 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00207 #pragma pack(1)
00208 typedef struct _USB_DEVICE_DESCRIPTOR {
00209 #endif
00210   uint8_t  bLength;
00211   uint8_t  bDescriptorType;
00212   uint16_t  bcdUSB;
00213   uint8_t  bDeviceClass;
00214   uint8_t  bDeviceSubClass;
00215   uint8_t  bDeviceProtocol;
00216   uint8_t  bMaxPacketSize0;
00217   uint16_t  idVendor;
00218   uint16_t  idProduct;
00219   uint16_t  bcdDevice;
00220   uint8_t  iManufacturer;
00221   uint8_t  iProduct;
00222   uint8_t  iSerialNumber;
00223   uint8_t  bNumConfigurations;
00224 } USB_DEVICE_DESCRIPTOR;
00225 #ifdef __IAR_SYSTEMS_ICC__
00226 #pragma pack()
00227 #endif
00228
00229 /* USB 2.0 Device Qualifier Descriptor */
00230 #if defined     (  __CC_ARM  )
00231 typedef __packed struct _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00232 #elif defined   (  __GNUC__  )
00233 typedef struct __packed _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00234 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00235 #pragma pack(1)
00236 typedef struct _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00237 #endif
00238   uint8_t  bLength;
00239   uint8_t  bDescriptorType;
00240   uint16_t  bcdUSB;
00241   uint8_t  bDeviceClass;
00242   uint8_t  bDeviceSubClass;
00243   uint8_t  bDeviceProtocol;
00244   uint8_t  bMaxPacketSize0;
00245   uint8_t  bNumConfigurations;
00246   uint8_t  bReserved;
00247 } USB_DEVICE_QUALIFIER_DESCRIPTOR;
00248 #ifdef __IAR_SYSTEMS_ICC__
00249 #pragma pack()
00250 #endif
00251
00252 /* USB Standard Configuration Descriptor */
00253 #if defined     (  __CC_ARM  )
00254 typedef __packed struct _USB_CONFIGURATION_DESCRIPTOR {
00255 #elif defined   (  __GNUC__  )
00256 typedef struct __packed _USB_CONFIGURATION_DESCRIPTOR {
00257 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00258 #pragma pack(1)
00259 typedef struct _USB_CONFIGURATION_DESCRIPTOR {
00260 #endif
00261   uint8_t  bLength;
00262   uint8_t  bDescriptorType;
00263   uint16_t  wTotalLength;
00264   uint8_t  bNumInterfaces;
00265   uint8_t  bConfigurationValue;
00266   uint8_t  iConfiguration;
00267   uint8_t  bmAttributes;
00268   uint8_t  bMaxPower;
00269 } USB_CONFIGURATION_DESCRIPTOR;
00270 #ifdef __IAR_SYSTEMS_ICC__
00271 #pragma pack()
00272 #endif
00273
00274 /* USB Standard Interface Descriptor */
00275 #if defined     (  __CC_ARM  )
00276 typedef __packed struct _USB_INTERFACE_DESCRIPTOR {
00277 #elif defined   (  __GNUC__  )
00278 typedef struct __packed _USB_INTERFACE_DESCRIPTOR {
00279 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00280 #pragma pack(1)
00281 typedef struct _USB_INTERFACE_DESCRIPTOR {
00282 #endif
00283   uint8_t  bLength;
00284   uint8_t  bDescriptorType;
00285   uint8_t  bInterfaceNumber;
00286   uint8_t  bAlternateSetting;
00287   uint8_t  bNumEndpoints;
00288   uint8_t  bInterfaceClass;
00289   uint8_t  bInterfaceSubClass;
00290   uint8_t  bInterfaceProtocol;
00291   uint8_t  iInterface;
00292 } USB_INTERFACE_DESCRIPTOR;
00293 #ifdef __IAR_SYSTEMS_ICC__
00294 #pragma pack()
00295 #endif
00296
00297 /* USB Standard Endpoint Descriptor */
00298 #if defined     (  __CC_ARM  )
00299 typedef __packed struct _USB_ENDPOINT_DESCRIPTOR {
00300 #elif defined   (  __GNUC__  )
00301 typedef struct __packed _USB_ENDPOINT_DESCRIPTOR {
00302 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00303 #pragma pack(1)
00304 typedef struct _USB_ENDPOINT_DESCRIPTOR {
00305 #endif
00306   uint8_t  bLength;
00307   uint8_t  bDescriptorType;
00308   uint8_t  bEndpointAddress;
00309   uint8_t  bmAttributes;
00310   uint16_t  wMaxPacketSize;
00311   uint8_t  bInterval;
00312 } USB_ENDPOINT_DESCRIPTOR;
00313 #ifdef __IAR_SYSTEMS_ICC__
00314 #pragma pack()
00315 #endif
00316
00317 /* USB String Descriptor */
00318 #if defined     (  __CC_ARM  )
00319 typedef __packed struct _USB_STRING_DESCRIPTOR {
00320 #elif defined   (  __GNUC__  )
00321 typedef struct __packed _USB_STRING_DESCRIPTOR {
00322 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00323 #pragma pack(1)
00324 typedef struct _USB_STRING_DESCRIPTOR {
00325 #endif
00326   uint8_t  bLength;
00327   uint8_t  bDescriptorType;
00328   uint16_t  bString/*[]*/;
00329 } USB_STRING_DESCRIPTOR;
00330 #ifdef __IAR_SYSTEMS_ICC__
00331 #pragma pack()
00332 #endif
00333
00334 /* USB Common Descriptor */
00335 #if defined     (  __CC_ARM  )
00336 typedef __packed struct _USB_COMMON_DESCRIPTOR {
00337 #elif defined   (  __GNUC__  )
00338 typedef struct __packed _USB_COMMON_DESCRIPTOR {
00339 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00340 #pragma pack(1)
00341 typedef struct _USB_COMMON_DESCRIPTOR {
00342 #endif
00343   uint8_t  bLength;
00344   uint8_t  bDescriptorType;
00345 } USB_COMMON_DESCRIPTOR;
00346 #ifdef __IAR_SYSTEMS_ICC__
00347 #pragma pack()
00348 #endif
00349
00350
00351 #endif  /* __USB_H__ */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcfg.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbcfg.h
00005  * Purpose: USB Custom Configuration
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *----------------------------------------------------------------------------
00018  * History:
00019  *          V1.20 Added vendor specific support
00020  *          V1.00 Initial Version
00021  *----------------------------------------------------------------------------*/
00022
00023 #ifndef __USBCFG_H__
00024 #define __USBCFG_H__
00025
00026
00027 //*** <<< Use Configuration Wizard in Context Menu >>> ***
00028
00029
00030 /*
00031 // <h> USB Configuration
00032 //   <o0> USB Power
00033 //        <i> Default Power Setting
00034 //        <0=> Bus-powered
00035 //        <1=> Self-powered
00036 //   <o1> Max Number of Interfaces <1-256>
00037 //   <o2> Max Number of Endpoints  <1-32>
00038 //   <o3> Max Endpoint 0 Packet Size
00039 //        <8=> 8 Bytes <16=> 16 Bytes <32=> 32 Bytes <64=> 64 Bytes
00040 //   <e4> DMA Transfer
00041 //     <i> Use DMA for selected Endpoints
00042 //     <o5.0>  Endpoint 0 Out
00043 //     <o5.1>  Endpoint 0 In
00044 //     <o5.2>  Endpoint 1 Out
00045 //     <o5.3>  Endpoint 1 In
00046 //     <o5.4>  Endpoint 2 Out
00047 //     <o5.5>  Endpoint 2 In
00048 //     <o5.6>  Endpoint 3 Out
00049 //     <o5.7>  Endpoint 3 In
00050 //     <o5.8>  Endpoint 4 Out
00051 //     <o5.9>  Endpoint 4 In
00052 //     <o5.10> Endpoint 5 Out
00053 //     <o5.11> Endpoint 5 In
00054 //     <o5.12> Endpoint 6 Out
00055 //     <o5.13> Endpoint 6 In
00056 //     <o5.14> Endpoint 7 Out
00057 //     <o5.15> Endpoint 7 In
00058 //     <o5.16> Endpoint 8 Out
00059 //     <o5.17> Endpoint 8 In
00060 //     <o5.18> Endpoint 9 Out
00061 //     <o5.19> Endpoint 9 In
00062 //     <o5.20> Endpoint 10 Out
00063 //     <o5.21> Endpoint 10 In
00064 //     <o5.22> Endpoint 11 Out
00065 //     <o5.23> Endpoint 11 In
00066 //     <o5.24> Endpoint 12 Out
00067 //     <o5.25> Endpoint 12 In
00068 //     <o5.26> Endpoint 13 Out
00069 //     <o5.27> Endpoint 13 In
00070 //     <o5.28> Endpoint 14 Out
00071 //     <o5.29> Endpoint 14 In
00072 //     <o5.30> Endpoint 15 Out
00073 //     <o5.31> Endpoint 15 In
00074 //   </e>
00075 // </h>
00076 */
00077
00078 #define USB_POWER           0
00079 #define USB_IF_NUM          4
00080 #define USB_EP_NUM          32
00081 #define USB_MAX_PACKET0     64
00082 #define USB_DMA             0
00083 #define USB_DMA_EP          0x00000040
00084
00085
00086 /*
00087 // <h> USB Event Handlers
00088 //   <h> Device Events
00089 //     <o0.0> Power Event
00090 //     <o1.0> Reset Event
00091 //     <o2.0> Suspend Event
00092 //     <o3.0> Resume Event
00093 //     <o4.0> Remote Wakeup Event
00094 //     <o5.0> Start of Frame Event
00095 //     <o6.0> Error Event
00096 //   </h>
00097 //   <h> Endpoint Events
00098 //     <o7.0>  Endpoint 0 Event
00099 //     <o7.1>  Endpoint 1 Event
00100 //     <o7.2>  Endpoint 2 Event
00101 //     <o7.3>  Endpoint 3 Event
00102 //     <o7.4>  Endpoint 4 Event
00103 //     <o7.5>  Endpoint 5 Event
00104 //     <o7.6>  Endpoint 6 Event
00105 //     <o7.7>  Endpoint 7 Event
00106 //     <o7.8>  Endpoint 8 Event
00107 //     <o7.9>  Endpoint 9 Event
00108 //     <o7.10> Endpoint 10 Event
00109 //     <o7.11> Endpoint 11 Event
00110 //     <o7.12> Endpoint 12 Event
00111 //     <o7.13> Endpoint 13 Event
00112 //     <o7.14> Endpoint 14 Event
00113 //     <o7.15> Endpoint 15 Event
00114 //   </h>
00115 //   <h> USB Core Events
00116 //     <o8.0>  Set Configuration Event
00117 //     <o9.0>  Set Interface Event
00118 //     <o10.0> Set/Clear Feature Event
00119 //   </h>
00120 // </h>
00121 */
00122
00123 #define USB_POWER_EVENT     0
00124 #define USB_RESET_EVENT     1
00125 #define USB_SUSPEND_EVENT   0
00126 #define USB_RESUME_EVENT    0
00127 #define USB_WAKEUP_EVENT    0
00128 #define USB_SOF_EVENT       1
00129 #define USB_ERROR_EVENT     0
00130 #define USB_EP_EVENT        0x0009
00131 #define USB_CONFIGURE_EVENT 0
00132 #define USB_INTERFACE_EVENT 0
00133 #define USB_FEATURE_EVENT   0
00134
00135
00136 /*
00137 // <e0> USB Class Support
00138 //   <i> enables USB Class specific Requests
00139 //   <e1> Human Interface Device (HID)
00140 //     <o2> Interface Number <0-255>
00141 //   </e>
00142 //   <e3> Mass Storage
00143 //     <o4> Interface Number <0-255>
00144 //   </e>
00145 //   <e5> Audio Device
00146 //     <o6> Control Interface Number <0-255>
00147 //     <o7> Streaming Interface 1 Number <0-255>
00148 //     <o8> Streaming Interface 2 Number <0-255>
00149 //   </e>
00150 //   <e9> Communication Device
00151 //     <o10> Control Interface Number <0-255>
00152 //     <o11> Bulk Interface Number <0-255>
00153 //     <o12> Max Communication Device Buffer Size
00154 //        <8=> 8 Bytes <16=> 16 Bytes <32=> 32 Bytes <64=> 64 Bytes
00155 //   </e>
00156 // </e>
00157 */
00158
00159 #define USB_CLASS           1
00160 #define USB_HID             0
00161 #define USB_HID_IF_NUM      0
00162 #define USB_MSC             0
00163 #define USB_MSC_IF_NUM      0
00164 #define USB_AUDIO           1
00165 #define USB_ADC_CIF_NUM     0
00166 #define USB_ADC_SIF1_NUM    1
00167 #define USB_ADC_SIF2_NUM    2
00168 #define USB_CDC                         0
00169 #define USB_CDC_CIF_NUM     0
00170 #define USB_CDC_DIF_NUM     1
00171 #define USB_CDC_BUFSIZE     64
00172
00173 /*
00174 // <e0> USB Vendor Support
00175 //   <i> enables USB Vendor specific Requests
00176 // </e>
00177 */
00178 #define USB_VENDOR          0
00179
00180
00181 #endif  /* __USBCFG_H__ */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbcore.c
00005  * Purpose: USB Core Module
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *----------------------------------------------------------------------------
00018  * History:
00019  *          V1.20 Added vendor specific requests
00020  *                Changed string descriptor handling
00021  *                Reworked Endpoint0
00022  *          V1.00 Initial Version
00023  *----------------------------------------------------------------------------*/
00024
00025 #include "lpc_types.h"
00026
00027 #include "usb.h"
00028 #include "usbcfg.h"
00029 #include "usbhw.h"
00030 #include "usbcore.h"
00031 #include "usbdesc.h"
00032 #include "usbuser.h"
00033
00034 #if (USB_CLASS)
00035
00036 #if (USB_AUDIO)
00037 #include "audio.h"
00038 #include "adcuser.h"
00039 #endif
00040
00041 #if (USB_HID)
00042 #include "hid.h"
00043 #include "hiduser.h"
00044 #endif
00045
00046 #if (USB_MSC)
00047 #include "msc.h"
00048 #include "mscuser.h"
00049 extern MSC_CSW CSW;
00050 #endif
00051
00052 #if (USB_CDC)
00053 #include "cdc.h"
00054 #include "cdcuser.h"
00055 #endif
00056
00057 #endif
00058
00059 #if (USB_VENDOR)
00060 #include "vendor.h"
00061 #endif
00062
00063 #if defined (  __CC_ARM__  )
00064 #pragma diag_suppress 111,177,1441
00065 #endif
00066
00067 #if defined   (  __GNUC__  )
00068 #define __packed __attribute__((__packed__))
00069 #endif
00070
00071 #if defined   (  __IAR_SYSTEMS_ICC__  )
00072 #define   __inline     inline
00073 #endif
00074
00075
00076 uint16_t  USB_DeviceStatus;
00077 uint8_t  USB_DeviceAddress;
00078 uint8_t  USB_Configuration;
00079 uint32_t USB_EndPointMask;
00080 uint32_t USB_EndPointHalt;
00081 uint32_t USB_EndPointStall;                         /* EP must stay stalled */
00082 uint8_t  USB_NumInterfaces;
00083 uint8_t  USB_AltSetting[USB_IF_NUM];
00084
00085 uint8_t  EP0Buf[USB_MAX_PACKET0];
00086
00087
00088 USB_EP_DATA EP0Data;
00089
00090 USB_SETUP_PACKET SetupPacket;
00091
00092
00093 /*
00094  *  Reset USB Core
00095  *    Parameters:      None
00096  *    Return Value:    None
00097  */
00098
00099 void USB_ResetCore (void) {
00100
00101   USB_DeviceStatus  = USB_POWER;
00102   USB_DeviceAddress = 0;
00103   USB_Configuration = 0;
00104   USB_EndPointMask  = 0x00010001;
00105   USB_EndPointHalt  = 0x00000000;
00106   USB_EndPointStall = 0x00000000;
00107 }
00108
00109
00110 /*
00111  *  USB Request - Setup Stage
00112  *    Parameters:      None (global SetupPacket)
00113  *    Return Value:    None
00114  */
00115
00116 void USB_SetupStage (void) {
00117   USB_ReadEP(0x00, (uint8_t *)&SetupPacket);
00118 }
00119
00120
00121 /*
00122  *  USB Request - Data In Stage
00123  *    Parameters:      None (global EP0Data)
00124  *    Return Value:    None
00125  */
00126
00127 void USB_DataInStage (void) {
00128   uint32_t cnt;
00129
00130   if (EP0Data.Count > USB_MAX_PACKET0) {
00131     cnt = USB_MAX_PACKET0;
00132   } else {
00133     cnt = EP0Data.Count;
00134   }
00135   cnt = USB_WriteEP(0x80, EP0Data.pData, cnt);
00136   EP0Data.pData += cnt;
00137   EP0Data.Count -= cnt;
00138 }
00139
00140
00141 /*
00142  *  USB Request - Data Out Stage
00143  *    Parameters:      None (global EP0Data)
00144  *    Return Value:    None
00145  */
00146
00147 void USB_DataOutStage (void) {
00148   uint32_t cnt;
00149
00150   cnt = USB_ReadEP(0x00, EP0Data.pData);
00151   EP0Data.pData += cnt;
00152   EP0Data.Count -= cnt;
00153 }
00154
00155
00156 /*
00157  *  USB Request - Status In Stage
00158  *    Parameters:      None
00159  *    Return Value:    None
00160  */
00161
00162 void USB_StatusInStage (void) {
00163   USB_WriteEP(0x80, NULL, 0);
00164 }
00165
00166
00167 /*
00168  *  USB Request - Status Out Stage
00169  *    Parameters:      None
00170  *    Return Value:    None
00171  */
00172
00173 void USB_StatusOutStage (void) {
00174   USB_ReadEP(0x00, EP0Buf);
00175 }
00176
00177
00178 /*
00179  *  Get Status USB Request
00180  *    Parameters:      None (global SetupPacket)
00181  *    Return Value:    TRUE - Success, FALSE - Error
00182  */
00183
00184 __inline uint32_t USB_ReqGetStatus (void) {
00185   uint32_t n, m;
00186
00187   switch (SetupPacket.bmRequestType.BM.Recipient) {
00188     case REQUEST_TO_DEVICE:
00189       EP0Data.pData = (uint8_t *)&USB_DeviceStatus;
00190       break;
00191     case REQUEST_TO_INTERFACE:
00192       if ((USB_Configuration != 0) && (SetupPacket.wIndex.WB.L < USB_NumInterfaces)) {
00193         *((__packed uint16_t *)EP0Buf) = 0;
00194         EP0Data.pData = EP0Buf;
00195       } else {
00196         return (FALSE);
00197       }
00198       break;
00199     case REQUEST_TO_ENDPOINT:
00200       n = SetupPacket.wIndex.WB.L & 0x8F;
00201       m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00202       if (((USB_Configuration != 0) || ((n & 0x0F) == 0)) && (USB_EndPointMask & m)) {
00203         *((__packed uint16_t *)EP0Buf) = (USB_EndPointHalt & m) ? 1 : 0;
00204         EP0Data.pData = EP0Buf;
00205       } else {
00206         return (FALSE);
00207       }
00208       break;
00209     default:
00210       return (FALSE);
00211   }
00212   return (TRUE);
00213 }
00214
00215
00216 /*
00217  *  Set/Clear Feature USB Request
00218  *    Parameters:      sc:    0 - Clear, 1 - Set
00219  *                            (global SetupPacket)
00220  *    Return Value:    TRUE - Success, FALSE - Error
00221  */
00222
00223 __inline uint32_t USB_ReqSetClrFeature (uint32_t sc) {
00224   uint32_t n, m;
00225
00226   switch (SetupPacket.bmRequestType.BM.Recipient) {
00227     case REQUEST_TO_DEVICE:
00228       if (SetupPacket.wValue.W == USB_FEATURE_REMOTE_WAKEUP) {
00229         if (sc) {
00230           USB_WakeUpCfg(TRUE);
00231           USB_DeviceStatus |=  USB_GETSTATUS_REMOTE_WAKEUP;
00232         } else {
00233           USB_WakeUpCfg(FALSE);
00234           USB_DeviceStatus &= ~USB_GETSTATUS_REMOTE_WAKEUP;
00235         }
00236       } else {
00237         return (FALSE);
00238       }
00239       break;
00240     case REQUEST_TO_INTERFACE:
00241       return (FALSE);
00242     case REQUEST_TO_ENDPOINT:
00243       n = SetupPacket.wIndex.WB.L & 0x8F;
00244       m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00245       if ((USB_Configuration != 0) && ((n & 0x0F) != 0) && (USB_EndPointMask & m)) {
00246         if (SetupPacket.wValue.W == USB_FEATURE_ENDPOINT_STALL) {
00247           if (sc) {
00248             USB_SetStallEP(n);
00249             USB_EndPointHalt |=  m;
00250           } else {
00251             if ((USB_EndPointStall & m) != 0) {
00252               return (TRUE);
00253             }
00254             USB_ClrStallEP(n);
00255 #if (USB_MSC)
00256             if ((n == MSC_EP_IN) && ((USB_EndPointHalt & m) != 0)) {
00257               /* Compliance Test: rewrite CSW after unstall */
00258               if (CSW.dSignature == MSC_CSW_Signature) {
00259                 USB_WriteEP(MSC_EP_IN, (uint8_t *)&CSW, sizeof(CSW));
00260               }
00261             }
00262 #endif
00263             USB_EndPointHalt &= ~m;
00264           }
00265         } else {
00266           return (FALSE);
00267         }
00268       } else {
00269         return (FALSE);
00270       }
00271       break;
00272     default:
00273       return (FALSE);
00274   }
00275   return (TRUE);
00276 }
00277
00278
00279 /*
00280  *  Set Address USB Request
00281  *    Parameters:      None (global SetupPacket)
00282  *    Return Value:    TRUE - Success, FALSE - Error
00283  */
00284
00285 __inline uint32_t USB_ReqSetAddress (void) {
00286
00287   switch (SetupPacket.bmRequestType.BM.Recipient) {
00288     case REQUEST_TO_DEVICE:
00289       USB_DeviceAddress = 0x80 | SetupPacket.wValue.WB.L;
00290       break;
00291     default:
00292       return (FALSE);
00293   }
00294   return (TRUE);
00295 }
00296
00297
00298 /*
00299  *  Get Descriptor USB Request
00300  *    Parameters:      None (global SetupPacket)
00301  *    Return Value:    TRUE - Success, FALSE - Error
00302  */
00303
00304 __inline uint32_t USB_ReqGetDescriptor (void) {
00305   uint8_t  *pD;
00306   uint32_t len, n;
00307
00308   switch (SetupPacket.bmRequestType.BM.Recipient) {
00309     case REQUEST_TO_DEVICE:
00310       switch (SetupPacket.wValue.WB.H) {
00311         case USB_DEVICE_DESCRIPTOR_TYPE:
00312           EP0Data.pData = (uint8_t *)USB_DeviceDescriptor;
00313           len = USB_DEVICE_DESC_SIZE;
00314           break;
00315         case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00316           pD = (uint8_t *)USB_ConfigDescriptor;
00317           for (n = 0; n != SetupPacket.wValue.WB.L; n++) {
00318             if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bLength != 0) {
00319               pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00320             }
00321           }
00322           if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bLength == 0) {
00323             return (FALSE);
00324           }
00325           EP0Data.pData = pD;
00326           len = ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00327           break;
00328         case USB_STRING_DESCRIPTOR_TYPE:
00329           pD = (uint8_t *)USB_StringDescriptor;
00330           for (n = 0; n != SetupPacket.wValue.WB.L; n++) {
00331             if (((USB_STRING_DESCRIPTOR *)pD)->bLength != 0) {
00332               pD += ((USB_STRING_DESCRIPTOR *)pD)->bLength;
00333             }
00334           }
00335           if (((USB_STRING_DESCRIPTOR *)pD)->bLength == 0) {
00336             return (FALSE);
00337           }
00338           EP0Data.pData = pD;
00339                   len = ((USB_STRING_DESCRIPTOR *)EP0Data.pData)->bLength;
00340           break;
00341         default:
00342           return (FALSE);
00343       }
00344       break;
00345     case REQUEST_TO_INTERFACE:
00346       switch (SetupPacket.wValue.WB.H) {
00347 #if USB_HID
00348         case HID_HID_DESCRIPTOR_TYPE:
00349           if (SetupPacket.wIndex.WB.L != USB_HID_IF_NUM) {
00350             return (FALSE);    /* Only Single HID Interface is supported */
00351           }
00352           EP0Data.pData = (uint8_t *)USB_ConfigDescriptor + HID_DESC_OFFSET;
00353           len = HID_DESC_SIZE;
00354           break;
00355         case HID_REPORT_DESCRIPTOR_TYPE:
00356           if (SetupPacket.wIndex.WB.L != USB_HID_IF_NUM) {
00357             return (FALSE);    /* Only Single HID Interface is supported */
00358           }
00359           EP0Data.pData = (uint8_t *)HID_ReportDescriptor;
00360           len = HID_ReportDescSize;
00361           break;
00362         case HID_PHYSICAL_DESCRIPTOR_TYPE:
00363           return (FALSE);      /* HID Physical Descriptor is not supported */
00364 #endif
00365         default:
00366           return (FALSE);
00367       }
00368 //      break;
00369     default:
00370       return (FALSE);
00371   }
00372
00373   if (EP0Data.Count > len) {
00374     EP0Data.Count = len;
00375   }
00376
00377   return (TRUE);
00378 }
00379
00380
00381 /*
00382  *  Get Configuration USB Request
00383  *    Parameters:      None (global SetupPacket)
00384  *    Return Value:    TRUE - Success, FALSE - Error
00385  */
00386
00387 __inline uint32_t USB_ReqGetConfiguration (void) {
00388
00389   switch (SetupPacket.bmRequestType.BM.Recipient) {
00390     case REQUEST_TO_DEVICE:
00391       EP0Data.pData = &USB_Configuration;
00392       break;
00393     default:
00394       return (FALSE);
00395   }
00396   return (TRUE);
00397 }
00398
00399
00400 /*
00401  *  Set Configuration USB Request
00402  *    Parameters:      None (global SetupPacket)
00403  *    Return Value:    TRUE - Success, FALSE - Error
00404  */
00405
00406 __inline uint32_t USB_ReqSetConfiguration (void) {
00407   USB_COMMON_DESCRIPTOR *pD;
00408   uint32_t alt = 0;
00409   uint32_t n, m;
00410   uint32_t tmp;
00411
00412   switch (SetupPacket.bmRequestType.BM.Recipient) {
00413     case REQUEST_TO_DEVICE:
00414
00415       if (SetupPacket.wValue.WB.L) {
00416         pD = (USB_COMMON_DESCRIPTOR *)USB_ConfigDescriptor;
00417         while (pD->bLength) {
00418           switch (pD->bDescriptorType) {
00419             case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00420               if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bConfigurationValue == SetupPacket.wValue.WB.L) {
00421                 USB_Configuration = SetupPacket.wValue.WB.L;
00422                 USB_NumInterfaces = ((USB_CONFIGURATION_DESCRIPTOR *)pD)->bNumInterfaces;
00423                 for (n = 0; n < USB_IF_NUM; n++) {
00424                   USB_AltSetting[n] = 0;
00425                 }
00426                 for (n = 1; n < 16; n++) {
00427                   if (USB_EndPointMask & (1 << n)) {
00428                     USB_DisableEP(n);
00429                   }
00430                   if (USB_EndPointMask & ((1 << 16) << n)) {
00431                     USB_DisableEP(n | 0x80);
00432                   }
00433                 }
00434                 USB_EndPointMask = 0x00010001;
00435                 USB_EndPointHalt = 0x00000000;
00436                 USB_EndPointStall= 0x00000000;
00437                 USB_Configure(TRUE);
00438                 if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bmAttributes & USB_CONFIG_POWERED_MASK) {
00439                   USB_DeviceStatus |=  USB_GETSTATUS_SELF_POWERED;
00440                 } else {
00441                   USB_DeviceStatus &= ~USB_GETSTATUS_SELF_POWERED;
00442                 }
00443               } else {
00444 //                (uint8_t *)pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00445                 tmp = (uint32_t)pD;
00446                 tmp += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00447                 pD = (USB_COMMON_DESCRIPTOR *)tmp;
00448                 continue;
00449               }
00450               break;
00451             case USB_INTERFACE_DESCRIPTOR_TYPE:
00452               alt = ((USB_INTERFACE_DESCRIPTOR *)pD)->bAlternateSetting;
00453               break;
00454             case USB_ENDPOINT_DESCRIPTOR_TYPE:
00455               if (alt == 0) {
00456                 n = ((USB_ENDPOINT_DESCRIPTOR *)pD)->bEndpointAddress & 0x8F;
00457                 m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00458                 USB_EndPointMask |= m;
00459                 USB_ConfigEP((USB_ENDPOINT_DESCRIPTOR *)pD);
00460                 USB_EnableEP(n);
00461                 USB_ResetEP(n);
00462               }
00463               break;
00464           }
00465 //          (uint8_t *)pD += pD->bLength;
00466                         tmp = (uint32_t)pD;
00467                         tmp += pD->bLength;
00468                         pD = (USB_COMMON_DESCRIPTOR *)tmp;
00469         }
00470       }
00471       else {
00472         USB_Configuration = 0;
00473         for (n = 1; n < 16; n++) {
00474           if (USB_EndPointMask & (1 << n)) {
00475             USB_DisableEP(n);
00476           }
00477           if (USB_EndPointMask & ((1 << 16) << n)) {
00478             USB_DisableEP(n | 0x80);
00479           }
00480         }
00481         USB_EndPointMask  = 0x00010001;
00482         USB_EndPointHalt  = 0x00000000;
00483         USB_EndPointStall = 0x00000000;
00484         USB_Configure(FALSE);
00485       }
00486
00487       if (USB_Configuration != SetupPacket.wValue.WB.L) {
00488         return (FALSE);
00489       }
00490       break;
00491     default:
00492       return (FALSE);
00493   }
00494   return (TRUE);
00495 }
00496
00497
00498 /*
00499  *  Get Interface USB Request
00500  *    Parameters:      None (global SetupPacket)
00501  *    Return Value:    TRUE - Success, FALSE - Error
00502  */
00503
00504 __inline uint32_t USB_ReqGetInterface (void) {
00505
00506   switch (SetupPacket.bmRequestType.BM.Recipient) {
00507     case REQUEST_TO_INTERFACE:
00508       if ((USB_Configuration != 0) && (SetupPacket.wIndex.WB.L < USB_NumInterfaces)) {
00509         EP0Data.pData = USB_AltSetting + SetupPacket.wIndex.WB.L;
00510       } else {
00511         return (FALSE);
00512       }
00513       break;
00514     default:
00515       return (FALSE);
00516   }
00517   return (TRUE);
00518 }
00519
00520
00521 /*
00522  *  Set Interface USB Request
00523  *    Parameters:      None (global SetupPacket)
00524  *    Return Value:    TRUE - Success, FALSE - Error
00525  */
00526
00527 __inline uint32_t USB_ReqSetInterface (void) {
00528   USB_COMMON_DESCRIPTOR *pD;
00529   uint32_t ifn = 0, alt = 0, old = 0, msk = 0;
00530   uint32_t n, m;
00531   uint32_t set;
00532   uint32_t tmp;
00533
00534   switch (SetupPacket.bmRequestType.BM.Recipient) {
00535     case REQUEST_TO_INTERFACE:
00536       if (USB_Configuration == 0) return (FALSE);
00537       set = FALSE;
00538       pD  = (USB_COMMON_DESCRIPTOR *)USB_ConfigDescriptor;
00539       while (pD->bLength) {
00540         switch (pD->bDescriptorType) {
00541           case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00542             if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bConfigurationValue != USB_Configuration) {
00543 //              (uint8_t *)pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00544                 tmp = (uint32_t)pD;
00545                 tmp += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00546                 pD = (USB_COMMON_DESCRIPTOR *)tmp;
00547                 continue;
00548             }
00549             break;
00550           case USB_INTERFACE_DESCRIPTOR_TYPE:
00551             ifn = ((USB_INTERFACE_DESCRIPTOR *)pD)->bInterfaceNumber;
00552             alt = ((USB_INTERFACE_DESCRIPTOR *)pD)->bAlternateSetting;
00553             msk = 0;
00554             if ((ifn == SetupPacket.wIndex.WB.L) && (alt == SetupPacket.wValue.WB.L)) {
00555               set = TRUE;
00556               old = USB_AltSetting[ifn];
00557               USB_AltSetting[ifn] = (uint8_t)alt;
00558             }
00559             break;
00560           case USB_ENDPOINT_DESCRIPTOR_TYPE:
00561             if (ifn == SetupPacket.wIndex.WB.L) {
00562               n = ((USB_ENDPOINT_DESCRIPTOR *)pD)->bEndpointAddress & 0x8F;
00563               m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00564               if (alt == SetupPacket.wValue.WB.L) {
00565                 USB_EndPointMask |=  m;
00566                 USB_EndPointHalt &= ~m;
00567                 USB_ConfigEP((USB_ENDPOINT_DESCRIPTOR *)pD);
00568                 USB_EnableEP(n);
00569                 USB_ResetEP(n);
00570                 msk |= m;
00571               }
00572               else if ((alt == old) && ((msk & m) == 0)) {
00573                 USB_EndPointMask &= ~m;
00574                 USB_EndPointHalt &= ~m;
00575                 USB_DisableEP(n);
00576               }
00577             }
00578            break;
00579         }
00580 //        (uint8_t *)pD += pD->bLength;
00581                         tmp = (uint32_t)pD;
00582                         tmp += pD->bLength;
00583                         pD = (USB_COMMON_DESCRIPTOR *)tmp;
00584       }
00585       break;
00586     default:
00587       return (FALSE);
00588   }
00589
00590   return (set);
00591 }
00592
00593
00594 /*
00595  *  USB Endpoint 0 Event Callback
00596  *    Parameters:      event
00597  *    Return Value:    none
00598  */
00599
00600 void USB_EndPoint0 (uint32_t event) {
00601
00602   switch (event) {
00603     case USB_EVT_SETUP:
00604       USB_SetupStage();
00605       USB_DirCtrlEP(SetupPacket.bmRequestType.BM.Dir);
00606       EP0Data.Count = SetupPacket.wLength;     /* Number of bytes to transfer */
00607       switch (SetupPacket.bmRequestType.BM.Type) {
00608
00609         case REQUEST_STANDARD:
00610           switch (SetupPacket.bRequest) {
00611             case USB_REQUEST_GET_STATUS:
00612               if (!USB_ReqGetStatus()) {
00613                 goto stall_i;
00614               }
00615               USB_DataInStage();
00616               break;
00617
00618             case USB_REQUEST_CLEAR_FEATURE:
00619               if (!USB_ReqSetClrFeature(0)) {
00620                 goto stall_i;
00621               }
00622               USB_StatusInStage();
00623 #if USB_FEATURE_EVENT
00624               USB_Feature_Event();
00625 #endif
00626               break;
00627
00628             case USB_REQUEST_SET_FEATURE:
00629               if (!USB_ReqSetClrFeature(1)) {
00630                 goto stall_i;
00631               }
00632               USB_StatusInStage();
00633 #if USB_FEATURE_EVENT
00634               USB_Feature_Event();
00635 #endif
00636               break;
00637
00638             case USB_REQUEST_SET_ADDRESS:
00639               if (!USB_ReqSetAddress()) {
00640                 goto stall_i;
00641               }
00642               USB_StatusInStage();
00643               break;
00644
00645             case USB_REQUEST_GET_DESCRIPTOR:
00646               if (!USB_ReqGetDescriptor()) {
00647                 goto stall_i;
00648               }
00649               USB_DataInStage();
00650               break;
00651
00652             case USB_REQUEST_SET_DESCRIPTOR:
00653 /*stall_o:*/  USB_SetStallEP(0x00);            /* not supported */
00654               EP0Data.Count = 0;
00655               break;
00656
00657             case USB_REQUEST_GET_CONFIGURATION:
00658               if (!USB_ReqGetConfiguration()) {
00659                 goto stall_i;
00660               }
00661               USB_DataInStage();
00662               break;
00663
00664             case USB_REQUEST_SET_CONFIGURATION:
00665               if (!USB_ReqSetConfiguration()) {
00666                 goto stall_i;
00667               }
00668               USB_StatusInStage();
00669 #if USB_CONFIGURE_EVENT
00670               USB_Configure_Event();
00671 #endif
00672               break;
00673
00674             case USB_REQUEST_GET_INTERFACE:
00675               if (!USB_ReqGetInterface()) {
00676                 goto stall_i;
00677               }
00678               USB_DataInStage();
00679               break;
00680
00681             case USB_REQUEST_SET_INTERFACE:
00682               if (!USB_ReqSetInterface()) {
00683                 goto stall_i;
00684               }
00685               USB_StatusInStage();
00686 #if USB_INTERFACE_EVENT
00687               USB_Interface_Event();
00688 #endif
00689               break;
00690
00691             default:
00692               goto stall_i;
00693           }
00694           break;  /* end case REQUEST_STANDARD */
00695
00696 #if USB_CLASS
00697         case REQUEST_CLASS:
00698           switch (SetupPacket.bmRequestType.BM.Recipient) {
00699
00700             case REQUEST_TO_DEVICE:
00701               goto stall_i;                                              /* not supported */
00702
00703             case REQUEST_TO_INTERFACE:
00704 #if USB_HID
00705               if (SetupPacket.wIndex.WB.L == USB_HID_IF_NUM) {           /* IF number correct? */
00706                 switch (SetupPacket.bRequest) {
00707                   case HID_REQUEST_GET_REPORT:
00708                     if (HID_GetReport()) {
00709                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00710                       USB_DataInStage();                                 /* send requested data */
00711                       goto setup_class_ok;
00712                     }
00713                     break;
00714                   case HID_REQUEST_SET_REPORT:
00715                     EP0Data.pData = EP0Buf;                              /* data to be received */
00716                     goto setup_class_ok;
00717                   case HID_REQUEST_GET_IDLE:
00718                     if (HID_GetIdle()) {
00719                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00720                       USB_DataInStage();                                 /* send requested data */
00721                       goto setup_class_ok;
00722                     }
00723                     break;
00724                   case HID_REQUEST_SET_IDLE:
00725                     if (HID_SetIdle()) {
00726                       USB_StatusInStage();                               /* send Acknowledge */
00727                       goto setup_class_ok;
00728                     }
00729                     break;
00730                   case HID_REQUEST_GET_PROTOCOL:
00731                     if (HID_GetProtocol()) {
00732                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00733                       USB_DataInStage();                                 /* send requested data */
00734                       goto setup_class_ok;
00735                     }
00736                     break;
00737                   case HID_REQUEST_SET_PROTOCOL:
00738                     if (HID_SetProtocol()) {
00739                       USB_StatusInStage();                               /* send Acknowledge */
00740                       goto setup_class_ok;
00741                     }
00742                     break;
00743                 }
00744               }
00745 #endif  /* USB_HID */
00746 #if USB_MSC
00747               if (SetupPacket.wIndex.WB.L == USB_MSC_IF_NUM) {           /* IF number correct? */
00748                 switch (SetupPacket.bRequest) {
00749                   case MSC_REQUEST_RESET:
00750                     if ((SetupPacket.wValue.W == 0) &&                   /* RESET with invalid parameters -> STALL */
00751                         (SetupPacket.wLength  == 0)) {
00752                       if (MSC_Reset()) {
00753                         USB_StatusInStage();
00754                         goto setup_class_ok;
00755                       }
00756                     }
00757                     break;
00758                   case MSC_REQUEST_GET_MAX_LUN:
00759                     if ((SetupPacket.wValue.W == 0) &&                   /* GET_MAX_LUN with invalid parameters -> STALL */
00760                         (SetupPacket.wLength  == 1)) {
00761                       if (MSC_GetMaxLUN()) {
00762                         EP0Data.pData = EP0Buf;
00763                         USB_DataInStage();
00764                         goto setup_class_ok;
00765                       }
00766                     }
00767                     break;
00768                 }
00769               }
00770 #endif  /* USB_MSC */
00771 #if USB_AUDIO
00772               if ((SetupPacket.wIndex.WB.L == USB_ADC_CIF_NUM)  ||       /* IF number correct? */
00773                   (SetupPacket.wIndex.WB.L == USB_ADC_SIF1_NUM) ||
00774                   (SetupPacket.wIndex.WB.L == USB_ADC_SIF2_NUM)) {
00775                 switch (SetupPacket.bRequest) {
00776                   case AUDIO_REQUEST_GET_CUR:
00777                   case AUDIO_REQUEST_GET_MIN:
00778                   case AUDIO_REQUEST_GET_MAX:
00779                   case AUDIO_REQUEST_GET_RES:
00780                     if (ADC_IF_GetRequest()) {
00781                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00782                       USB_DataInStage();                                 /* send requested data */
00783                       goto setup_class_ok;
00784                     }
00785                     break;
00786                   case AUDIO_REQUEST_SET_CUR:
00787 //                case AUDIO_REQUEST_SET_MIN:
00788 //                case AUDIO_REQUEST_SET_MAX:
00789 //                case AUDIO_REQUEST_SET_RES:
00790                     EP0Data.pData = EP0Buf;                              /* data to be received */
00791                     goto setup_class_ok;
00792                 }
00793               }
00794 #endif  /* USB_AUDIO */
00795 #if USB_CDC
00796               if ((SetupPacket.wIndex.WB.L == USB_CDC_CIF_NUM)  ||       /* IF number correct? */
00797                   (SetupPacket.wIndex.WB.L == USB_CDC_DIF_NUM)) {
00798                 switch (SetupPacket.bRequest) {
00799                   case CDC_SEND_ENCAPSULATED_COMMAND:
00800                     EP0Data.pData = EP0Buf;                              /* data to be received, see USB_EVT_OUT */
00801                     goto setup_class_ok;
00802                   case CDC_GET_ENCAPSULATED_RESPONSE:
00803                     if (CDC_GetEncapsulatedResponse()) {
00804                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00805                       USB_DataInStage();                                 /* send requested data */
00806                       goto setup_class_ok;
00807                     }
00808                     break;
00809                   case CDC_SET_COMM_FEATURE:
00810                     EP0Data.pData = EP0Buf;                              /* data to be received, see USB_EVT_OUT */
00811                     goto setup_class_ok;
00812                   case CDC_GET_COMM_FEATURE:
00813                     if (CDC_GetCommFeature(SetupPacket.wValue.W)) {
00814                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00815                       USB_DataInStage();                                 /* send requested data */
00816                       goto setup_class_ok;
00817                     }
00818                     break;
00819                   case CDC_CLEAR_COMM_FEATURE:
00820                     if (CDC_ClearCommFeature(SetupPacket.wValue.W)) {
00821                       USB_StatusInStage();                               /* send Acknowledge */
00822                       goto setup_class_ok;
00823                     }
00824                     break;
00825                   case CDC_SET_LINE_CODING:
00826                     EP0Data.pData = EP0Buf;                              /* data to be received, see USB_EVT_OUT */
00827                     goto setup_class_ok;
00828                   case CDC_GET_LINE_CODING:
00829                     if (CDC_GetLineCoding()) {
00830                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00831                       USB_DataInStage();                                 /* send requested data */
00832                       goto setup_class_ok;
00833                     }
00834                     break;
00835                   case CDC_SET_CONTROL_LINE_STATE:
00836                     if (CDC_SetControlLineState(SetupPacket.wValue.W)) {
00837                       USB_StatusInStage();                               /* send Acknowledge */
00838                       goto setup_class_ok;
00839                     }
00840                     break;
00841                   case CDC_SEND_BREAK:
00842                     if (CDC_SendBreak(SetupPacket.wValue.W)) {
00843                       USB_StatusInStage();                               /* send Acknowledge */
00844                       goto setup_class_ok;
00845                     }
00846                     break;
00847                 }
00848               }
00849 #endif  /* USB_CDC */
00850               goto stall_i;                                              /* not supported */
00851               /* end case REQUEST_TO_INTERFACE */
00852
00853             case REQUEST_TO_ENDPOINT:
00854 #if USB_AUDIO
00855               switch (SetupPacket.bRequest) {
00856                 case AUDIO_REQUEST_GET_CUR:
00857                 case AUDIO_REQUEST_GET_MIN:
00858                 case AUDIO_REQUEST_GET_MAX:
00859                 case AUDIO_REQUEST_GET_RES:
00860                   if (ADC_EP_GetRequest()) {
00861                     EP0Data.pData = EP0Buf;                              /* point to data to be sent */
00862                     USB_DataInStage();                                   /* send requested data */
00863                     goto setup_class_ok;
00864                   }
00865                   break;
00866                 case AUDIO_REQUEST_SET_CUR:
00867 //              case AUDIO_REQUEST_SET_MIN:
00868 //              case AUDIO_REQUEST_SET_MAX:
00869 //              case AUDIO_REQUEST_SET_RES:
00870                   EP0Data.pData = EP0Buf;                                /* data to be received */
00871                   goto setup_class_ok;
00872               }
00873 #endif  /* USB_AUDIO */
00874               goto stall_i;
00875               /* end case REQUEST_TO_ENDPOINT */
00876
00877             default:
00878               goto stall_i;
00879           }
00880 setup_class_ok:                                                          /* request finished successfully */
00881           break;  /* end case REQUEST_CLASS */
00882 #endif  /* USB_CLASS */
00883
00884 #if USB_VENDOR
00885         case REQUEST_VENDOR:
00886           switch (SetupPacket.bmRequestType.BM.Recipient) {
00887
00888             case REQUEST_TO_DEVICE:
00889               if (!USB_ReqVendorDev(TRUE)) {
00890                 goto stall_i;                                            /* not supported */
00891               }
00892               break;
00893
00894             case REQUEST_TO_INTERFACE:
00895               if (!USB_ReqVendorIF(TRUE)) {
00896                 goto stall_i;                                            /* not supported */
00897               }
00898               break;
00899
00900             case REQUEST_TO_ENDPOINT:
00901               if (!USB_ReqVendorEP(TRUE)) {
00902                 goto stall_i;                                            /* not supported */
00903               }
00904               break;
00905
00906             default:
00907               goto stall_i;
00908           }
00909
00910           if (SetupPacket.wLength) {
00911             if (SetupPacket.bmRequestType.BM.Dir == REQUEST_DEVICE_TO_HOST) {
00912               USB_DataInStage();
00913             }
00914           } else {
00915             USB_StatusInStage();
00916           }
00917
00918           break;  /* end case REQUEST_VENDOR */
00919 #endif  /* USB_VENDOR */
00920
00921         default:
00922 stall_i:  USB_SetStallEP(0x80);
00923           EP0Data.Count = 0;
00924           break;
00925       }
00926       break;  /* end case USB_EVT_SETUP */
00927
00928     case USB_EVT_OUT:
00929       if (SetupPacket.bmRequestType.BM.Dir == REQUEST_HOST_TO_DEVICE) {
00930         if (EP0Data.Count) {                                             /* still data to receive ? */
00931           USB_DataOutStage();                                            /* receive data */
00932           if (EP0Data.Count == 0) {                                      /* data complete ? */
00933             switch (SetupPacket.bmRequestType.BM.Type) {
00934
00935               case REQUEST_STANDARD:
00936                 goto stall_i;                                            /* not supported */
00937
00938 #if (USB_CLASS)
00939               case REQUEST_CLASS:
00940                 switch (SetupPacket.bmRequestType.BM.Recipient) {
00941                   case REQUEST_TO_DEVICE:
00942                     goto stall_i;                                        /* not supported */
00943
00944                   case REQUEST_TO_INTERFACE:
00945 #if USB_HID
00946                     if (SetupPacket.wIndex.WB.L == USB_HID_IF_NUM) {     /* IF number correct? */
00947                       switch (SetupPacket.bRequest) {
00948                         case HID_REQUEST_SET_REPORT:
00949                           if (HID_SetReport()) {
00950                             USB_StatusInStage();                         /* send Acknowledge */
00951                             goto out_class_ok;
00952                           }
00953                           break;
00954                       }
00955                     }
00956 #endif  /* USB_HID */
00957 #if USB_AUDIO
00958                     if ((SetupPacket.wIndex.WB.L == USB_ADC_CIF_NUM)  || /* IF number correct? */
00959                         (SetupPacket.wIndex.WB.L == USB_ADC_SIF1_NUM) ||
00960                         (SetupPacket.wIndex.WB.L == USB_ADC_SIF2_NUM)) {
00961                       switch (SetupPacket.bRequest) {
00962                         case AUDIO_REQUEST_SET_CUR:
00963 //                      case AUDIO_REQUEST_SET_MIN:
00964 //                      case AUDIO_REQUEST_SET_MAX:
00965 //                      case AUDIO_REQUEST_SET_RES:
00966                           if (ADC_IF_SetRequest()) {
00967                             USB_StatusInStage();                         /* send Acknowledge */
00968                             goto out_class_ok;
00969                           }
00970                           break;
00971                       }
00972                     }
00973 #endif  /* USB_AUDIO */
00974 #if USB_CDC
00975                     if ((SetupPacket.wIndex.WB.L == USB_CDC_CIF_NUM)  || /* IF number correct? */
00976                         (SetupPacket.wIndex.WB.L == USB_CDC_DIF_NUM)) {
00977                       switch (SetupPacket.bRequest) {
00978                         case CDC_SEND_ENCAPSULATED_COMMAND:
00979                           if (CDC_SendEncapsulatedCommand()) {
00980                             USB_StatusInStage();                         /* send Acknowledge */
00981                             goto out_class_ok;
00982                           }
00983                           break;
00984                         case CDC_SET_COMM_FEATURE:
00985                           if (CDC_SetCommFeature(SetupPacket.wValue.W)) {
00986                             USB_StatusInStage();                         /* send Acknowledge */
00987                             goto out_class_ok;
00988                           }
00989                           break;
00990                         case CDC_SET_LINE_CODING:
00991                           if (CDC_SetLineCoding()) {
00992                             USB_StatusInStage();                         /* send Acknowledge */
00993                             goto out_class_ok;
00994                           }
00995                           break;
00996                       }
00997                     }
00998 #endif  /* USB_CDC */
00999                     goto stall_i;
01000                     /* end case REQUEST_TO_INTERFACE */
01001
01002                   case REQUEST_TO_ENDPOINT:
01003 #if USB_AUDIO
01004                     switch (SetupPacket.bRequest) {
01005                       case AUDIO_REQUEST_SET_CUR:
01006 //                    case AUDIO_REQUEST_SET_MIN:
01007 //                    case AUDIO_REQUEST_SET_MAX:
01008 //                    case AUDIO_REQUEST_SET_RES:
01009                         if (ADC_EP_SetRequest()) {
01010                           USB_StatusInStage();                           /* send Acknowledge */
01011                           goto out_class_ok;
01012                         }
01013                         break;
01014                     }
01015 #endif  /* USB_AUDIO */
01016                     goto stall_i;
01017                     /* end case REQUEST_TO_ENDPOINT */
01018
01019                   default:
01020                     goto stall_i;
01021                 }
01022 out_class_ok:                                                            /* request finished successfully */
01023                 break; /* end case REQUEST_CLASS */
01024 #endif  /* USB_CLASS */
01025
01026 #if USB_VENDOR
01027               case REQUEST_VENDOR:
01028                 switch (SetupPacket.bmRequestType.BM.Recipient) {
01029
01030                   case REQUEST_TO_DEVICE:
01031                     if (!USB_ReqVendorDev(FALSE)) {
01032                       goto stall_i;                                      /* not supported */
01033                     }
01034                     break;
01035
01036                   case REQUEST_TO_INTERFACE:
01037                     if (!USB_ReqVendorIF(FALSE)) {
01038                       goto stall_i;                                      /* not supported */
01039                     }
01040                     break;
01041
01042                   case REQUEST_TO_ENDPOINT:
01043                     if (!USB_ReqVendorEP(FALSE)) {
01044                       goto stall_i;                                      /* not supported */
01045                     }
01046                     break;
01047
01048                   default:
01049                     goto stall_i;
01050                 }
01051
01052                 USB_StatusInStage();
01053
01054                 break;  /* end case REQUEST_VENDOR */
01055 #endif  /* USB_VENDOR */
01056
01057               default:
01058                 goto stall_i;
01059             }
01060           }
01061         }
01062       } else {
01063         USB_StatusOutStage();                                            /* receive Acknowledge */
01064       }
01065       break;  /* end case USB_EVT_OUT */
01066
01067     case USB_EVT_IN :
01068       if (SetupPacket.bmRequestType.BM.Dir == REQUEST_DEVICE_TO_HOST) {
01069         USB_DataInStage();                                               /* send data */
01070       } else {
01071         if (USB_DeviceAddress & 0x80) {
01072           USB_DeviceAddress &= 0x7F;
01073           USB_SetAddress(USB_DeviceAddress);
01074         }
01075       }
01076       break;  /* end case USB_EVT_IN */
01077
01078     case USB_EVT_OUT_STALL:
01079       USB_ClrStallEP(0x00);
01080       break;
01081
01082     case USB_EVT_IN_STALL:
01083       USB_ClrStallEP(0x80);
01084       break;
01085
01086   }
01087 }
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbcore.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbcore.h
00005  * Purpose: USB Core Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBCORE_H__
00020 #define __USBCORE_H__
00021
00022
00023 /* USB Endpoint Data Structure */
00024 typedef struct _USB_EP_DATA {
00025   uint8_t  *pData;
00026   uint16_t Count;
00027 } USB_EP_DATA;
00028
00029 /* USB Core Global Variables */
00030 extern uint16_t USB_DeviceStatus;
00031 extern uint8_t  USB_DeviceAddress;
00032 extern uint8_t  USB_Configuration;
00033 extern uint32_t USB_EndPointMask;
00034 extern uint32_t USB_EndPointHalt;
00035 extern uint32_t USB_EndPointStall;
00036 extern uint8_t  USB_AltSetting[USB_IF_NUM];
00037
00038 /* USB Endpoint 0 Buffer */
00039 extern uint8_t  EP0Buf[USB_MAX_PACKET0];
00040
00041 /* USB Endpoint 0 Data Info */
00042 extern USB_EP_DATA EP0Data;
00043
00044 /* USB Setup Packet */
00045 extern USB_SETUP_PACKET SetupPacket;
00046
00047 /* USB Core Functions */
00048 extern void USB_ResetCore (void);
00049
00050
00051
00052 #endif  /* __USBCORE_H__ */
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdesc.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdesc.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbdesc.c
00005  * Purpose: USB Descriptors
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *----------------------------------------------------------------------------
00018  * History:
00019  *          V1.20 Changed string descriptor handling
00020  *          V1.00 Initial Version
00021  *----------------------------------------------------------------------------*/
00022 #include "lpc_types.h"
00023
00024 #include "usb.h"
00025 #include "audio.h"
00026 #include "usbcfg.h"
00027 #include "usbdesc.h"
00028
00029
00030 /* USB Standard Device Descriptor */
00031 const uint8_t USB_DeviceDescriptor[] = {
00032   USB_DEVICE_DESC_SIZE,              /* bLength */
00033   USB_DEVICE_DESCRIPTOR_TYPE,        /* bDescriptorType */
00034   WBVAL(0x0200), /* 2.00 */          /* bcdUSB */
00035   0x00,                              /* bDeviceClass */
00036   0x00,                              /* bDeviceSubClass */
00037   0x00,                              /* bDeviceProtocol */
00038   USB_MAX_PACKET0,                   /* bMaxPacketSize0 */
00039   WBVAL(0x1FC9),                     /* idVendor */
00040   WBVAL(0x4002),                     /* idProduct */
00041   WBVAL(0x0100), /* 1.00 */          /* bcdDevice */
00042   0x01,                              /* iManufacturer */
00043   0x02,                              /* iProduct */
00044   0x03,                              /* iSerialNumber */
00045   0x01                               /* bNumConfigurations: one possible configuration*/
00046 };
00047
00048 /* USB Configuration Descriptor */
00049 /*   All Descriptors (Configuration, Interface, Endpoint, Class, Vendor */
00050 const uint8_t USB_ConfigDescriptor[] = {
00051 /* Configuration 1 */
00052   USB_CONFIGUARTION_DESC_SIZE,          /* bLength */
00053   USB_CONFIGURATION_DESCRIPTOR_TYPE,    /* bDescriptorType */
00054   WBVAL(                                /* wTotalLength */
00055     USB_CONFIGUARTION_DESC_SIZE         +
00056     USB_INTERFACE_DESC_SIZE             +
00057     AUDIO_CONTROL_INTERFACE_DESC_SZ(1)  +
00058     AUDIO_INPUT_TERMINAL_DESC_SIZE      +
00059     AUDIO_FEATURE_UNIT_DESC_SZ(1,1)     +
00060     AUDIO_OUTPUT_TERMINAL_DESC_SIZE     +
00061     USB_INTERFACE_DESC_SIZE             +
00062     USB_INTERFACE_DESC_SIZE             +
00063     AUDIO_STREAMING_INTERFACE_DESC_SIZE +
00064     AUDIO_FORMAT_TYPE_I_DESC_SZ(1)      +
00065     AUDIO_STANDARD_ENDPOINT_DESC_SIZE   +
00066     AUDIO_STREAMING_ENDPOINT_DESC_SIZE
00067   ),
00068   0x02,                                 /* bNumInterfaces */
00069   0x01,                                 /* bConfigurationValue */
00070   0x00,                                 /* iConfiguration */
00071   USB_CONFIG_BUS_POWERED,               /* bmAttributes */
00072   USB_CONFIG_POWER_MA(100),             /* bMaxPower */
00073 /* Interface 0, Alternate Setting 0, Audio Control */
00074   USB_INTERFACE_DESC_SIZE,              /* bLength */
00075   USB_INTERFACE_DESCRIPTOR_TYPE,        /* bDescriptorType */
00076   0x00,                                 /* bInterfaceNumber */
00077   0x00,                                 /* bAlternateSetting */
00078   0x00,                                 /* bNumEndpoints */
00079   USB_DEVICE_CLASS_AUDIO,               /* bInterfaceClass */
00080   AUDIO_SUBCLASS_AUDIOCONTROL,          /* bInterfaceSubClass */
00081   AUDIO_PROTOCOL_UNDEFINED,             /* bInterfaceProtocol */
00082   0x00,                                 /* iInterface */
00083 /* Audio Control Interface */
00084   AUDIO_CONTROL_INTERFACE_DESC_SZ(1),   /* bLength */
00085   AUDIO_INTERFACE_DESCRIPTOR_TYPE,      /* bDescriptorType */
00086   AUDIO_CONTROL_HEADER,                 /* bDescriptorSubtype */
00087   WBVAL(0x0100), /* 1.00 */             /* bcdADC */
00088   WBVAL(                                /* wTotalLength */
00089     AUDIO_CONTROL_INTERFACE_DESC_SZ(1) +
00090     AUDIO_INPUT_TERMINAL_DESC_SIZE     +
00091     AUDIO_FEATURE_UNIT_DESC_SZ(1,1)    +
00092     AUDIO_OUTPUT_TERMINAL_DESC_SIZE
00093   ),
00094   0x01,                                 /* bInCollection */
00095   0x01,                                 /* baInterfaceNr */
00096 /* Audio Input Terminal */
00097   AUDIO_INPUT_TERMINAL_DESC_SIZE,       /* bLength */
00098   AUDIO_INTERFACE_DESCRIPTOR_TYPE,      /* bDescriptorType */
00099   AUDIO_CONTROL_INPUT_TERMINAL,         /* bDescriptorSubtype */
00100   0x01,                                 /* bTerminalID */
00101   WBVAL(AUDIO_TERMINAL_USB_STREAMING),  /* wTerminalType */
00102   0x00,                                 /* bAssocTerminal */
00103   0x01,                                 /* bNrChannels */
00104   WBVAL(AUDIO_CHANNEL_M),               /* wChannelConfig */
00105   0x00,                                 /* iChannelNames */
00106   0x00,                                 /* iTerminal */
00107 /* Audio Feature Unit */
00108   AUDIO_FEATURE_UNIT_DESC_SZ(1,1),      /* bLength */
00109   AUDIO_INTERFACE_DESCRIPTOR_TYPE,      /* bDescriptorType */
00110   AUDIO_CONTROL_FEATURE_UNIT,           /* bDescriptorSubtype */
00111   0x02,                                 /* bUnitID */
00112   0x01,                                 /* bSourceID */
00113   0x01,                                 /* bControlSize */
00114   AUDIO_CONTROL_MUTE |
00115   AUDIO_CONTROL_VOLUME,                 /* bmaControls(0) */
00116   0x00,                                 /* bmaControls(1) */
00117   0x00,                                 /* iTerminal */
00118 /* Audio Output Terminal */
00119   AUDIO_OUTPUT_TERMINAL_DESC_SIZE,      /* bLength */
00120   AUDIO_INTERFACE_DESCRIPTOR_TYPE,      /* bDescriptorType */
00121   AUDIO_CONTROL_OUTPUT_TERMINAL,        /* bDescriptorSubtype */
00122   0x03,                                 /* bTerminalID */
00123   WBVAL(AUDIO_TERMINAL_SPEAKER),        /* wTerminalType */
00124   0x00,                                 /* bAssocTerminal */
00125   0x02,                                 /* bSourceID */
00126   0x00,                                 /* iTerminal */
00127 /* Interface 1, Alternate Setting 0, Audio Streaming - Zero Bandwith */
00128   USB_INTERFACE_DESC_SIZE,              /* bLength */
00129   USB_INTERFACE_DESCRIPTOR_TYPE,        /* bDescriptorType */
00130   0x01,                                 /* bInterfaceNumber */
00131   0x00,                                 /* bAlternateSetting */
00132   0x00,                                 /* bNumEndpoints */
00133   USB_DEVICE_CLASS_AUDIO,               /* bInterfaceClass */
00134   AUDIO_SUBCLASS_AUDIOSTREAMING,        /* bInterfaceSubClass */
00135   AUDIO_PROTOCOL_UNDEFINED,             /* bInterfaceProtocol */
00136   0x00,                                 /* iInterface */
00137 /* Interface 1, Alternate Setting 1, Audio Streaming - Operational */
00138   USB_INTERFACE_DESC_SIZE,              /* bLength */
00139   USB_INTERFACE_DESCRIPTOR_TYPE,        /* bDescriptorType */
00140   0x01,                                 /* bInterfaceNumber */
00141   0x01,                                 /* bAlternateSetting */
00142   0x01,                                 /* bNumEndpoints */
00143   USB_DEVICE_CLASS_AUDIO,               /* bInterfaceClass */
00144   AUDIO_SUBCLASS_AUDIOSTREAMING,        /* bInterfaceSubClass */
00145   AUDIO_PROTOCOL_UNDEFINED,             /* bInterfaceProtocol */
00146   0x00,                                 /* iInterface */
00147 /* Audio Streaming Interface */
00148   AUDIO_STREAMING_INTERFACE_DESC_SIZE,  /* bLength */
00149   AUDIO_INTERFACE_DESCRIPTOR_TYPE,      /* bDescriptorType */
00150   AUDIO_STREAMING_GENERAL,              /* bDescriptorSubtype */
00151   0x01,                                 /* bTerminalLink */
00152   0x01,                                 /* bDelay */
00153   WBVAL(AUDIO_FORMAT_PCM),              /* wFormatTag */
00154 /* Audio Type I Format */
00155   AUDIO_FORMAT_TYPE_I_DESC_SZ(1),       /* bLength */
00156   AUDIO_INTERFACE_DESCRIPTOR_TYPE,      /* bDescriptorType */
00157   AUDIO_STREAMING_FORMAT_TYPE,          /* bDescriptorSubtype */
00158   AUDIO_FORMAT_TYPE_I,                  /* bFormatType */
00159   0x01,                                 /* bNrChannels */
00160   0x02,                                 /* bSubFrameSize */
00161   16,                                   /* bBitResolution */
00162   0x01,                                 /* bSamFreqType */
00163   B3VAL(32000),                         /* tSamFreq */
00164 /* Endpoint - Standard Descriptor */
00165   AUDIO_STANDARD_ENDPOINT_DESC_SIZE,    /* bLength */
00166   USB_ENDPOINT_DESCRIPTOR_TYPE,         /* bDescriptorType */
00167   USB_ENDPOINT_OUT(3),                  /* bEndpointAddress */
00168   USB_ENDPOINT_TYPE_ISOCHRONOUS,        /* bmAttributes */
00169   WBVAL(64),                            /* wMaxPacketSize */
00170   0x01,                                 /* bInterval */
00171   0x00,                                 /* bRefresh */
00172   0x00,                                 /* bSynchAddress */
00173 /* Endpoint - Audio Streaming */
00174   AUDIO_STREAMING_ENDPOINT_DESC_SIZE,   /* bLength */
00175   AUDIO_ENDPOINT_DESCRIPTOR_TYPE,       /* bDescriptorType */
00176   AUDIO_ENDPOINT_GENERAL,               /* bDescriptor */
00177   0x00,                                 /* bmAttributes */
00178   0x00,                                 /* bLockDelayUnits */
00179   WBVAL(0x0000),                        /* wLockDelay */
00180 /* Terminator */
00181   0                                     /* bLength */
00182 };
00183
00184 /* USB String Descriptor (optional) */
00185 const uint8_t USB_StringDescriptor[] = {
00186 /* Index 0x00: LANGID Codes */
00187   0x04,                              /* bLength */
00188   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00189   WBVAL(0x0409), /* US English */    /* wLANGID */
00190 /* Index 0x01: Manufacturer */
00191   (13*2 + 2),                        /* bLength (13 Char + Type + lenght) */
00192   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00193   'N',0,
00194   'X',0,
00195   'P',0,
00196   ' ',0,
00197   'S',0,
00198   'e',0,
00199   'm',0,
00200   'i',0,
00201   'c',0,
00202   'o',0,
00203   'n',0,
00204   'd',0,
00205   ' ',0,
00206 /* Index 0x02: Product */
00207   (20*2 + 2),                        /* bLength ( 20 Char + Type + lenght) */
00208   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00209   'N',0,
00210   'X',0,
00211   'P',0,
00212   ' ',0,
00213   'L',0,
00214   'P',0,
00215   'C',0,
00216   '1',0,
00217   '7',0,
00218   'x',0,
00219   'x',0,
00220   ' ',0,
00221   'S',0,
00222   'p',0,
00223   'e',0,
00224   'a',0,
00225   'k',0,
00226   'e',0,
00227   'r',0,
00228   ' ',0,
00229 /* Index 0x03: Serial Number */
00230   (12*2 + 2),                        /* bLength (12 Char + Type + lenght) */
00231   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00232   'D',0,
00233   'E',0,
00234   'M',0,
00235   'O',0,
00236   '0',0,
00237   '0',0,
00238   '0',0,
00239   '0',0,
00240   '0',0,
00241   '0',0,
00242   '0',0,
00243   '0',0,
00244 };
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdesc.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdesc.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbdesc.h
00005  * Purpose: USB Descriptors Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBDESC_H__
00020 #define __USBDESC_H__
00021
00022
00023 #define WBVAL(x) (x & 0xFF),((x >> 8) & 0xFF)
00024 #define B3VAL(x) (x & 0xFF),((x >> 8) & 0xFF),((x >> 16) & 0xFF)
00025
00026 #define USB_DEVICE_DESC_SIZE        (sizeof(USB_DEVICE_DESCRIPTOR))
00027 #define USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))
00028 #define USB_INTERFACE_DESC_SIZE     (sizeof(USB_INTERFACE_DESCRIPTOR))
00029 #define USB_ENDPOINT_DESC_SIZE      (sizeof(USB_ENDPOINT_DESCRIPTOR))
00030
00031 extern const uint8_t USB_DeviceDescriptor[];
00032 extern const uint8_t USB_ConfigDescriptor[];
00033 extern const uint8_t USB_StringDescriptor[];
00034
00035
00036 #endif  /* __USBDESC_H__ */
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbhw.c
00005  * Purpose: USB Hardware Layer Module for NXP's LPC17xx MCU
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *----------------------------------------------------------------------------
00018  * History:
00019  *          V1.20 Added USB_ClearEPBuf
00020  *          V1.00 Initial Version
00021  *----------------------------------------------------------------------------*/
00022 #include "LPC17xx.h"                        /* LPC17xx definitions */
00023 #include "lpc_types.h"
00024
00025 #include "usb.h"
00026 #include "usbcfg.h"
00027 #include "usbreg.h"
00028 #include "usbhw.h"
00029 #include "usbcore.h"
00030 #include "usbuser.h"
00031
00032 #if defined  (  __CC_ARM__  )
00033 #pragma diag_suppress 1441
00034 #endif
00035
00036
00037 #define EP_MSK_CTRL 0x0001      /* Control Endpoint Logical Address Mask */
00038 #define EP_MSK_BULK 0xC924      /* Bulk Endpoint Logical Address Mask */
00039 #define EP_MSK_INT  0x4492      /* Interrupt Endpoint Logical Address Mask */
00040 #define EP_MSK_ISO  0x1248      /* Isochronous Endpoint Logical Address Mask */
00041
00042
00043 #if USB_DMA
00044
00045 #pragma arm section zidata = "USB_RAM"
00046 uint32_t UDCA[USB_EP_NUM];                     /* UDCA in USB RAM */
00047
00048 uint32_t DD_NISO_Mem[4*DD_NISO_CNT];           /* Non-Iso DMA Descriptor Memory */
00049 uint32_t DD_ISO_Mem [5*DD_ISO_CNT];            /* Iso DMA Descriptor Memory */
00050 #pragma arm section zidata
00051 uint32_t udca[USB_EP_NUM];                     /* UDCA saved values */
00052
00053 uint32_t DDMemMap[2];                          /* DMA Descriptor Memory Usage */
00054
00055 #endif
00056
00057
00058 /*
00059  *  Get Endpoint Physical Address
00060  *    Parameters:      EPNum: Endpoint Number
00061  *                       EPNum.0..3: Address
00062  *                       EPNum.7:    Dir
00063  *    Return Value:    Endpoint Physical Address
00064  */
00065
00066 uint32_t EPAdr (uint32_t EPNum) {
00067   uint32_t val;
00068
00069   val = (EPNum & 0x0F) << 1;
00070   if (EPNum & 0x80) {
00071     val += 1;
00072   }
00073   return (val);
00074 }
00075
00076
00077 /*
00078  *  Write Command
00079  *    Parameters:      cmd:   Command
00080  *    Return Value:    None
00081  */
00082
00083 void WrCmd (uint32_t cmd) {
00084
00085   LPC_USB->USBDevIntClr = CCEMTY_INT;
00086   LPC_USB->USBCmdCode = cmd;
00087   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00088 }
00089
00090
00091 /*
00092  *  Write Command Data
00093  *    Parameters:      cmd:   Command
00094  *                     val:   Data
00095  *    Return Value:    None
00096  */
00097
00098 void WrCmdDat (uint32_t cmd, uint32_t val) {
00099
00100   LPC_USB->USBDevIntClr = CCEMTY_INT;
00101   LPC_USB->USBCmdCode = cmd;
00102   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00103   LPC_USB->USBDevIntClr = CCEMTY_INT;
00104   LPC_USB->USBCmdCode = val;
00105   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00106 }
00107
00108
00109 /*
00110  *  Write Command to Endpoint
00111  *    Parameters:      cmd:   Command
00112  *                     val:   Data
00113  *    Return Value:    None
00114  */
00115
00116 void WrCmdEP (uint32_t EPNum, uint32_t cmd){
00117
00118   LPC_USB->USBDevIntClr = CCEMTY_INT;
00119   LPC_USB->USBCmdCode = CMD_SEL_EP(EPAdr(EPNum));
00120   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00121   LPC_USB->USBDevIntClr = CCEMTY_INT;
00122   LPC_USB->USBCmdCode = cmd;
00123   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00124 }
00125
00126
00127 /*
00128  *  Read Command Data
00129  *    Parameters:      cmd:   Command
00130  *    Return Value:    Data Value
00131  */
00132
00133 uint32_t RdCmdDat (uint32_t cmd) {
00134
00135   LPC_USB->USBDevIntClr = CCEMTY_INT | CDFULL_INT;
00136   LPC_USB->USBCmdCode = cmd;
00137   while ((LPC_USB->USBDevIntSt & CDFULL_INT) == 0);
00138   return (LPC_USB->USBCmdData);
00139 }
00140
00141
00142 /*
00143  *  USB Initialize Function
00144  *   Called by the User to initialize USB
00145  *    Return Value:    None
00146  */
00147
00148 void USB_Init (void) {
00149
00150   LPC_PINCON->PINSEL1 &= ~((3<<26)|(3<<28));   /* P0.29 D+, P0.30 D- */
00151   LPC_PINCON->PINSEL1 |=  ((1<<26)|(1<<28));   /* PINSEL1 26.27, 28.29  = 01 */
00152
00153   LPC_PINCON->PINSEL3 &= ~((3<< 4)|(3<<28));   /* P1.18 GoodLink, P1.30 VBUS */
00154   LPC_PINCON->PINSEL3 |=  ((1<< 4)|(2<<28));   /* PINSEL3 4.5 = 01, 28.29 = 10 */
00155
00156   LPC_PINCON->PINSEL4 &= ~((3<<18)        );   /* P2.9 SoftConnect */
00157   LPC_PINCON->PINSEL4 |=  ((1<<18)        );   /* PINSEL4 18.19 = 01 */
00158
00159   LPC_SC->PCONP |= (1UL<<31);                /* USB PCLK -> enable USB Per.       */
00160
00161   LPC_USB->USBClkCtrl = 0x1A;                /* Dev, PortSel, AHB clock enable */
00162   while ((LPC_USB->USBClkSt & 0x1A) != 0x1A);
00163
00164   NVIC_EnableIRQ(USB_IRQn);               /* enable USB interrupt */
00165
00166   USB_Reset();
00167   USB_SetAddress(0);
00168 }
00169
00170
00171 /*
00172  *  USB Connect Function
00173  *   Called by the User to Connect/Disconnect USB
00174  *    Parameters:      con:   Connect/Disconnect
00175  *    Return Value:    None
00176  */
00177
00178 void USB_Connect (uint32_t con) {
00179   WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(con ? DEV_CON : 0));
00180 }
00181
00182
00183 /*
00184  *  USB Reset Function
00185  *   Called automatically on USB Reset
00186  *    Return Value:    None
00187  */
00188
00189 void USB_Reset (void) {
00190 #if USB_DMA
00191   uint32_t n;
00192 #endif
00193
00194   LPC_USB->USBEpInd = 0;
00195   LPC_USB->USBMaxPSize = USB_MAX_PACKET0;
00196   LPC_USB->USBEpInd = 1;
00197   LPC_USB->USBMaxPSize = USB_MAX_PACKET0;
00198   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00199
00200   LPC_USB->USBEpIntClr  = 0xFFFFFFFF;
00201   LPC_USB->USBEpIntEn   = 0xFFFFFFFF ^ USB_DMA_EP;
00202   LPC_USB->USBDevIntClr = 0xFFFFFFFF;
00203   LPC_USB->USBDevIntEn  = DEV_STAT_INT    | EP_SLOW_INT    |
00204                (USB_SOF_EVENT   ? FRAME_INT : 0) |
00205                (USB_ERROR_EVENT ? ERR_INT   : 0);
00206
00207 #if USB_DMA
00208   LPC_USB->USBUDCAH   = USB_RAM_ADR;
00209   LPC_USB->USBDMARClr = 0xFFFFFFFF;
00210   LPC_USB->USBEpDMADis  = 0xFFFFFFFF;
00211   LPC_USB->USBEpDMAEn   = USB_DMA_EP;
00212   LPC_USB->USBEoTIntClr = 0xFFFFFFFF;
00213   LPC_USB->USBNDDRIntClr = 0xFFFFFFFF;
00214   LPC_USB->USBSysErrIntClr = 0xFFFFFFFF;
00215   LPC_USB->USBDMAIntEn  = 0x00000007;
00216   DDMemMap[0] = 0x00000000;
00217   DDMemMap[1] = 0x00000000;
00218   for (n = 0; n < USB_EP_NUM; n++) {
00219     udca[n] = 0;
00220     UDCA[n] = 0;
00221   }
00222 #endif
00223 }
00224
00225
00226 /*
00227  *  USB Suspend Function
00228  *   Called automatically on USB Suspend
00229  *    Return Value:    None
00230  */
00231
00232 void USB_Suspend (void) {
00233   /* Performed by Hardware */
00234 }
00235
00236
00237 /*
00238  *  USB Resume Function
00239  *   Called automatically on USB Resume
00240  *    Return Value:    None
00241  */
00242
00243 void USB_Resume (void) {
00244   /* Performed by Hardware */
00245 }
00246
00247
00248 /*
00249  *  USB Remote Wakeup Function
00250  *   Called automatically on USB Remote Wakeup
00251  *    Return Value:    None
00252  */
00253
00254 void USB_WakeUp (void) {
00255
00256   if (USB_DeviceStatus & USB_GETSTATUS_REMOTE_WAKEUP) {
00257     WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(DEV_CON));
00258   }
00259 }
00260
00261
00262 /*
00263  *  USB Remote Wakeup Configuration Function
00264  *    Parameters:      cfg:   Enable/Disable
00265  *    Return Value:    None
00266  */
00267
00268 void USB_WakeUpCfg (uint32_t cfg) {
00269   /* Not needed */
00270 }
00271
00272
00273 /*
00274  *  USB Set Address Function
00275  *    Parameters:      adr:   USB Address
00276  *    Return Value:    None
00277  */
00278
00279 void USB_SetAddress (uint32_t adr) {
00280   WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /* Don't wait for next */
00281   WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /*  Setup Status Phase */
00282 }
00283
00284
00285 /*
00286  *  USB Configure Function
00287  *    Parameters:      cfg:   Configure/Deconfigure
00288  *    Return Value:    None
00289  */
00290
00291 void USB_Configure (uint32_t cfg) {
00292
00293   WrCmdDat(CMD_CFG_DEV, DAT_WR_BYTE(cfg ? CONF_DVICE : 0));
00294
00295   LPC_USB->USBReEp = 0x00000003;
00296   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00297   LPC_USB->USBDevIntClr = EP_RLZED_INT;
00298 }
00299
00300
00301 /*
00302  *  Configure USB Endpoint according to Descriptor
00303  *    Parameters:      pEPD:  Pointer to Endpoint Descriptor
00304  *    Return Value:    None
00305  */
00306
00307 void USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD) {
00308   uint32_t num;
00309
00310   num = EPAdr(pEPD->bEndpointAddress);
00311   LPC_USB->USBReEp |= (1 << num);
00312   LPC_USB->USBEpInd = num;
00313   LPC_USB->USBMaxPSize = pEPD->wMaxPacketSize;
00314   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00315   LPC_USB->USBDevIntClr = EP_RLZED_INT;
00316 }
00317
00318
00319 /*
00320  *  Set Direction for USB Control Endpoint
00321  *    Parameters:      dir:   Out (dir == 0), In (dir <> 0)
00322  *    Return Value:    None
00323  */
00324
00325 void USB_DirCtrlEP (uint32_t dir) {
00326   /* Not needed */
00327 }
00328
00329
00330 /*
00331  *  Enable USB Endpoint
00332  *    Parameters:      EPNum: Endpoint Number
00333  *                       EPNum.0..3: Address
00334  *                       EPNum.7:    Dir
00335  *    Return Value:    None
00336  */
00337
00338 void USB_EnableEP (uint32_t EPNum) {
00339   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00340 }
00341
00342
00343 /*
00344  *  Disable USB Endpoint
00345  *    Parameters:      EPNum: Endpoint Number
00346  *                       EPNum.0..3: Address
00347  *                       EPNum.7:    Dir
00348  *    Return Value:    None
00349  */
00350
00351 void USB_DisableEP (uint32_t EPNum) {
00352   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_DA));
00353 }
00354
00355
00356 /*
00357  *  Reset USB Endpoint
00358  *    Parameters:      EPNum: Endpoint Number
00359  *                       EPNum.0..3: Address
00360  *                       EPNum.7:    Dir
00361  *    Return Value:    None
00362  */
00363
00364 void USB_ResetEP (uint32_t EPNum) {
00365   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00366 }
00367
00368
00369 /*
00370  *  Set Stall for USB Endpoint
00371  *    Parameters:      EPNum: Endpoint Number
00372  *                       EPNum.0..3: Address
00373  *                       EPNum.7:    Dir
00374  *    Return Value:    None
00375  */
00376
00377 void USB_SetStallEP (uint32_t EPNum) {
00378   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_ST));
00379 }
00380
00381
00382 /*
00383  *  Clear Stall for USB Endpoint
00384  *    Parameters:      EPNum: Endpoint Number
00385  *                       EPNum.0..3: Address
00386  *                       EPNum.7:    Dir
00387  *    Return Value:    None
00388  */
00389
00390 void USB_ClrStallEP (uint32_t EPNum) {
00391   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00392 }
00393
00394
00395 /*
00396  *  Clear USB Endpoint Buffer
00397  *    Parameters:      EPNum: Endpoint Number
00398  *                       EPNum.0..3: Address
00399  *                       EPNum.7:    Dir
00400  *    Return Value:    None
00401  */
00402
00403 void USB_ClearEPBuf (uint32_t EPNum) {
00404   WrCmdEP(EPNum, CMD_CLR_BUF);
00405 }
00406
00407
00408 /*
00409  *  Read USB Endpoint Data
00410  *    Parameters:      EPNum: Endpoint Number
00411  *                       EPNum.0..3: Address
00412  *                       EPNum.7:    Dir
00413  *                     pData: Pointer to Data Buffer
00414  *    Return Value:    Number of bytes read
00415  */
00416
00417 uint32_t USB_ReadEP (uint32_t EPNum, uint8_t *pData) {
00418   uint32_t cnt, n;
00419
00420   LPC_USB->USBCtrl = ((EPNum & 0x0F) << 2) | CTRL_RD_EN;
00421
00422   do {
00423     cnt = LPC_USB->USBRxPLen;
00424   } while ((cnt & PKT_RDY) == 0);
00425   cnt &= PKT_LNGTH_MASK;
00426
00427   for (n = 0; n < (cnt + 3) / 4; n++) {
00428     *((__packed uint32_t *)pData) = LPC_USB->USBRxData;
00429     pData += 4;
00430   }
00431   LPC_USB->USBCtrl = 0;
00432
00433   if (((EP_MSK_ISO >> EPNum) & 1) == 0) {   /* Non-Isochronous Endpoint */
00434     WrCmdEP(EPNum, CMD_CLR_BUF);
00435   }
00436   return (cnt);
00437 }
00438
00439
00440 /*
00441  *  Write USB Endpoint Data
00442  *    Parameters:      EPNum: Endpoint Number
00443  *                       EPNum.0..3: Address
00444  *                       EPNum.7:    Dir
00445  *                     pData: Pointer to Data Buffer
00446  *                     cnt:   Number of bytes to write
00447  *    Return Value:    Number of bytes written
00448  */
00449
00450 uint32_t USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt) {
00451   uint32_t n;
00452
00453   LPC_USB->USBCtrl = ((EPNum & 0x0F) << 2) | CTRL_WR_EN;
00454
00455   LPC_USB->USBTxPLen = cnt;
00456
00457   for (n = 0; n < (cnt + 3) / 4; n++) {
00458     LPC_USB->USBTxData = *((__packed uint32_t *)pData);
00459     pData += 4;
00460   }
00461   LPC_USB->USBCtrl = 0;
00462   WrCmdEP(EPNum, CMD_VALID_BUF);
00463   return (cnt);
00464 }
00465
00466 #if USB_DMA
00467
00468 /* DMA Descriptor Memory Layout */
00469 const uint32_t DDAdr[2] = { DD_NISO_ADR, DD_ISO_ADR };
00470 const uint32_t DDSz [2] = { 16,          20         };
00471
00472
00473 /*
00474  *  Setup USB DMA Transfer for selected Endpoint
00475  *    Parameters:      EPNum: Endpoint Number
00476  *                     pDD: Pointer to DMA Descriptor
00477  *    Return Value:    TRUE - Success, FALSE - Error
00478  */
00479
00480 uint32_t USB_DMA_Setup(uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD) {
00481   uint32_t num, ptr, nxt, iso, n;
00482   uint32_t *t;
00483
00484   iso = pDD->Cfg.Type.IsoEP;                /* Iso or Non-Iso Descriptor */
00485   num = EPAdr(EPNum);                       /* Endpoint's Physical Address */
00486
00487   ptr = 0;                                  /* Current Descriptor */
00488   nxt = udca[num];                          /* Initial Descriptor */
00489   while (nxt) {                             /* Go through Descriptor List */
00490     ptr = nxt;                              /* Current Descriptor */
00491     if (!pDD->Cfg.Type.Link) {              /* Check for Linked Descriptors */
00492       n = (ptr - DDAdr[iso]) / DDSz[iso];   /* Descriptor Index */
00493       DDMemMap[iso] &= ~(1 << n);           /* Unmark Memory Usage */
00494     }
00495     nxt = *((uint32_t *)ptr);                  /* Next Descriptor */
00496   }
00497
00498   for (n = 0; n < 32; n++) {                /* Search for available Memory */
00499     if ((DDMemMap[iso] & (1 << n)) == 0) {
00500       break;                                /* Memory found */
00501     }
00502   }
00503   if (n == 32) return (FALSE);              /* Memory not available */
00504
00505   DDMemMap[iso] |= 1 << n;                  /* Mark Memory Usage */
00506   nxt = DDAdr[iso] + n * DDSz[iso];         /* Next Descriptor */
00507
00508   if (ptr && pDD->Cfg.Type.Link) {
00509     *((uint32_t *)(ptr + 0))  = nxt;           /* Link in new Descriptor */
00510     *((uint32_t *)(ptr + 4)) |= 0x00000004;    /* Next DD is Valid */
00511   } else {
00512     udca[num] = nxt;                        /* Save new Descriptor */
00513     UDCA[num] = nxt;                        /* Update UDCA in USB */
00514   }
00515
00516   /* Fill in DMA Descriptor */
00517   *(((uint32_t *)nxt)++) =  0;                 /* Next DD Pointer */
00518   *(((uint32_t *)nxt)++) =  pDD->Cfg.Type.ATLE |
00519                        (pDD->Cfg.Type.IsoEP << 4) |
00520                        (pDD->MaxSize <<  5) |
00521                        (pDD->BufLen  << 16);
00522   *(((uint32_t *)nxt)++) =  pDD->BufAdr;
00523   *(((uint32_t *)nxt)++) =  pDD->Cfg.Type.LenPos << 8;
00524
00525   if (iso) {
00526     *((uint32_t *)nxt) =  pDD->InfoAdr;
00527   }
00528
00529   return (TRUE); /* Success */
00530 }
00531
00532
00533 /*
00534  *  Enable USB DMA Endpoint
00535  *    Parameters:      EPNum: Endpoint Number
00536  *                       EPNum.0..3: Address
00537  *                       EPNum.7:    Dir
00538  *    Return Value:    None
00539  */
00540
00541 void USB_DMA_Enable (uint32_t EPNum) {
00542   LPC_USB->USBEpDMAEn = 1 << EPAdr(EPNum);
00543 }
00544
00545
00546 /*
00547  *  Disable USB DMA Endpoint
00548  *    Parameters:      EPNum: Endpoint Number
00549  *                       EPNum.0..3: Address
00550  *                       EPNum.7:    Dir
00551  *    Return Value:    None
00552  */
00553
00554 void USB_DMA_Disable (uint32_t EPNum) {
00555   LPC_USB->USBEpDMADis = 1 << EPAdr(EPNum);
00556 }
00557
00558
00559 /*
00560  *  Get USB DMA Endpoint Status
00561  *    Parameters:      EPNum: Endpoint Number
00562  *                       EPNum.0..3: Address
00563  *                       EPNum.7:    Dir
00564  *    Return Value:    DMA Status
00565  */
00566
00567 uint32_t USB_DMA_Status (uint32_t EPNum) {
00568   uint32_t ptr, val;
00569
00570   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00571   if (ptr == 0)
00572         return (USB_DMA_INVALID);
00573
00574   val = *((uint32_t *)(ptr + 3*4));            /* Status Information */
00575   switch ((val >> 1) & 0x0F) {
00576     case 0x00:                              /* Not serviced */
00577       return (USB_DMA_IDLE);
00578     case 0x01:                              /* Being serviced */
00579       return (USB_DMA_BUSY);
00580     case 0x02:                              /* Normal Completition */
00581       return (USB_DMA_DONE);
00582     case 0x03:                              /* Data Under Run */
00583       return (USB_DMA_UNDER_RUN);
00584     case 0x08:                              /* Data Over Run */
00585       return (USB_DMA_OVER_RUN);
00586     case 0x09:                              /* System Error */
00587       return (USB_DMA_ERROR);
00588   }
00589
00590   return (USB_DMA_UNKNOWN);
00591 }
00592
00593
00594 /*
00595  *  Get USB DMA Endpoint Current Buffer Address
00596  *    Parameters:      EPNum: Endpoint Number
00597  *                       EPNum.0..3: Address
00598  *                       EPNum.7:    Dir
00599  *    Return Value:    DMA Address (or -1 when DMA is Invalid)
00600  */
00601
00602 uint32_t USB_DMA_BufAdr (uint32_t EPNum) {
00603   uint32_t ptr, val;
00604
00605   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00606   if (ptr == 0)
00607   {
00608         return ((uint32_t)(-1));                /* DMA Invalid */
00609   }
00610
00611   val = *((uint32_t *)(ptr + 2*4));         /* Buffer Address */
00612   return (val);                             /* Current Address */
00613 }
00614
00615
00616 /*
00617  *  Get USB DMA Endpoint Current Buffer Count
00618  *   Number of transfered Bytes or Iso Packets
00619  *    Parameters:      EPNum: Endpoint Number
00620  *                       EPNum.0..3: Address
00621  *                       EPNum.7:    Dir
00622  *    Return Value:    DMA Count (or -1 when DMA is Invalid)
00623  */
00624
00625 uint32_t USB_DMA_BufCnt (uint32_t EPNum) {
00626   uint32_t ptr, val;
00627
00628   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00629   if (ptr == 0)
00630   {
00631         return ((uint32_t)(-1));                /* DMA Invalid */
00632   }
00633   val = *((uint32_t *)(ptr + 3*4));         /* Status Information */
00634   return (val >> 16);                       /* Current Count */
00635 }
00636
00637
00638 #endif /* USB_DMA */
00639
00640
00641 /*
00642  *  Get USB Last Frame Number
00643  *    Parameters:      None
00644  *    Return Value:    Frame Number
00645  */
00646
00647 uint32_t USB_GetFrame (void) {
00648   uint32_t val;
00649
00650   WrCmd(CMD_RD_FRAME);
00651   val = RdCmdDat(DAT_RD_FRAME);
00652   val = val | (RdCmdDat(DAT_RD_FRAME) << 8);
00653
00654   return (val);
00655 }
00656
00657
00658 /*
00659  *  USB Interrupt Service Routine
00660  */
00661
00662 void USB_IRQHandler (void) {
00663   uint32_t disr, val, n, m;
00664   uint32_t episr, episrCur;
00665
00666   disr = LPC_USB->USBDevIntSt;       /* Device Interrupt Status */
00667
00668   /* Device Status Interrupt (Reset, Connect change, Suspend/Resume) */
00669   if (disr & DEV_STAT_INT) {
00670     LPC_USB->USBDevIntClr = DEV_STAT_INT;
00671     WrCmd(CMD_GET_DEV_STAT);
00672     val = RdCmdDat(DAT_GET_DEV_STAT);       /* Device Status */
00673     if (val & DEV_RST) {                    /* Reset */
00674       USB_Reset();
00675 #if   USB_RESET_EVENT
00676       USB_Reset_Event();
00677 #endif
00678     }
00679     if (val & DEV_CON_CH) {                 /* Connect change */
00680 #if   USB_POWER_EVENT
00681       USB_Power_Event(val & DEV_CON);
00682 #endif
00683     }
00684     if (val & DEV_SUS_CH) {                 /* Suspend/Resume */
00685       if (val & DEV_SUS) {                  /* Suspend */
00686         USB_Suspend();
00687 #if     USB_SUSPEND_EVENT
00688         USB_Suspend_Event();
00689 #endif
00690       } else {                              /* Resume */
00691         USB_Resume();
00692 #if     USB_RESUME_EVENT
00693         USB_Resume_Event();
00694 #endif
00695       }
00696     }
00697     goto isr_end;
00698   }
00699
00700 #if USB_SOF_EVENT
00701   /* Start of Frame Interrupt */
00702   if (disr & FRAME_INT) {
00703           //Clear interrupt for SOF
00704           LPC_USB->USBDevIntClr = FRAME_INT;
00705           USB_SOF_Event();
00706   }
00707 #endif
00708
00709 #if USB_ERROR_EVENT
00710   /* Error Interrupt */
00711   if (disr & ERR_INT) {
00712         LPC_USB->USBDevIntClr = ERR_INT;
00713         WrCmd(CMD_RD_ERR_STAT);
00714         val = RdCmdDat(DAT_RD_ERR_STAT);
00715         USB_Error_Event(val);
00716   }
00717 #endif
00718
00719   /* Endpoint's Slow Interrupt */
00720   if (disr & EP_SLOW_INT) {
00721     episrCur = 0;
00722     episr    = LPC_USB->USBEpIntSt;
00723     for (n = 0; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00724       if (episr == episrCur) break;         /* break if all EP interrupts handled */
00725       if (episr & (1 << n)) {
00726         episrCur |= (1 << n);
00727         m = n >> 1;
00728
00729         LPC_USB->USBEpIntClr = (1 << n);
00730         while ((LPC_USB->USBDevIntSt & CDFULL_INT) == 0);
00731         val = LPC_USB->USBCmdData;
00732
00733         if ((n & 1) == 0) {                 /* OUT Endpoint */
00734           if (n == 0) {                     /* Control OUT Endpoint */
00735             if (val & EP_SEL_STP) {         /* Setup Packet */
00736               if (USB_P_EP[0]) {
00737                 USB_P_EP[0](USB_EVT_SETUP);
00738                 continue;
00739               }
00740             }
00741           }
00742           if (USB_P_EP[m]) {
00743             USB_P_EP[m](USB_EVT_OUT);
00744           }
00745         } else {                            /* IN Endpoint */
00746           if (USB_P_EP[m]) {
00747             USB_P_EP[m](USB_EVT_IN);
00748           }
00749         }
00750       }
00751     }
00752     LPC_USB->USBDevIntClr = EP_SLOW_INT;
00753   }
00754
00755 #if USB_DMA
00756
00757   if (LPC_USB->USBDMAIntSt & 0x00000001) {          /* End of Transfer Interrupt */
00758     val = LPC_USB->USBEoTIntSt;
00759     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00760       if (val & (1 << n)) {
00761         m = n >> 1;
00762         if ((n & 1) == 0) {                 /* OUT Endpoint */
00763           if (USB_P_EP[m]) {
00764             USB_P_EP[m](USB_EVT_OUT_DMA_EOT);
00765           }
00766         } else {                            /* IN Endpoint */
00767           if (USB_P_EP[m]) {
00768             USB_P_EP[m](USB_EVT_IN_DMA_EOT);
00769           }
00770         }
00771       }
00772     }
00773     LPC_USB->USBEoTIntClr = val;
00774   }
00775
00776   if (LPC_USB->USBDMAIntSt & 0x00000002) {          /* New DD Request Interrupt */
00777     val = LPC_USB->USBNDDRIntSt;
00778     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00779       if (val & (1 << n)) {
00780         m = n >> 1;
00781         if ((n & 1) == 0) {                 /* OUT Endpoint */
00782           if (USB_P_EP[m]) {
00783             USB_P_EP[m](USB_EVT_OUT_DMA_NDR);
00784           }
00785         } else {                            /* IN Endpoint */
00786           if (USB_P_EP[m]) {
00787             USB_P_EP[m](USB_EVT_IN_DMA_NDR);
00788           }
00789         }
00790       }
00791     }
00792     LPC_USB->USBNDDRIntClr = val;
00793   }
00794
00795   if (LPC_USB->USBDMAIntSt & 0x00000004) {          /* System Error Interrupt */
00796     val = LPC_USB->USBSysErrIntSt;
00797     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00798       if (val & (1 << n)) {
00799         m = n >> 1;
00800         if ((n & 1) == 0) {                 /* OUT Endpoint */
00801           if (USB_P_EP[m]) {
00802             USB_P_EP[m](USB_EVT_OUT_DMA_ERR);
00803           }
00804         } else {                            /* IN Endpoint */
00805           if (USB_P_EP[m]) {
00806             USB_P_EP[m](USB_EVT_IN_DMA_ERR);
00807           }
00808         }
00809       }
00810     }
00811     LPC_USB->USBSysErrIntClr = val;
00812   }
00813
00814 #endif /* USB_DMA */
00815
00816 isr_end:
00817   return;
00818 }
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbhw.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbhw.h
00005  * Purpose: USB Hardware Layer Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *----------------------------------------------------------------------------
00018  * History:
00019  *          V1.20 Added USB_ClearEPBuf
00020  *          V1.00 Initial Version
00021  *----------------------------------------------------------------------------*/
00022
00023 #ifndef __USBHW_H__
00024 #define __USBHW_H__
00025
00026
00027 /* USB RAM Definitions */
00028 #define USB_RAM_ADR     0x20080000  /* USB RAM Start Address */
00029 #define USB_RAM_SZ      0x00004000  /* USB RAM Size (4kB) */
00030
00031 /* DMA Endpoint Descriptors */
00032 #define DD_NISO_CNT             16  /* Non-Iso EP DMA Descr. Count (max. 32) */
00033 #define DD_ISO_CNT               8  /* Iso EP DMA Descriptor Count (max. 32) */
00034 #define DD_NISO_SZ    (DD_NISO_CNT * 16)    /* Non-Iso DMA Descr. Size */
00035 #define DD_ISO_SZ     (DD_ISO_CNT  * 20)    /* Iso DMA Descriptor Size */
00036 #define DD_NISO_ADR   (USB_RAM_ADR + 128)   /* Non-Iso DMA Descr. Address */
00037 #define DD_ISO_ADR    (DD_NISO_ADR + DD_NISO_SZ) /* Iso DMA Descr. Address */
00038 #define DD_SZ                 (128 + DD_NISO_SZ + DD_ISO_SZ) /* Descr. Size */
00039
00040 /* DMA Buffer Memory Definitions */
00041 #define DMA_BUF_ADR   (USB_RAM_ADR + DD_SZ) /* DMA Buffer Start Address */
00042 #define DMA_BUF_SZ    (USB_RAM_SZ  - DD_SZ) /* DMA Buffer Size */
00043
00044 /* USB Error Codes */
00045 #define USB_ERR_PID         0x0001  /* PID Error */
00046 #define USB_ERR_UEPKT       0x0002  /* Unexpected Packet */
00047 #define USB_ERR_DCRC        0x0004  /* Data CRC Error */
00048 #define USB_ERR_TIMOUT      0x0008  /* Bus Time-out Error */
00049 #define USB_ERR_EOP         0x0010  /* End of Packet Error */
00050 #define USB_ERR_B_OVRN      0x0020  /* Buffer Overrun */
00051 #define USB_ERR_BTSTF       0x0040  /* Bit Stuff Error */
00052 #define USB_ERR_TGL         0x0080  /* Toggle Bit Error */
00053
00054 /* USB DMA Status Codes */
00055 #define USB_DMA_INVALID     0x0000  /* DMA Invalid - Not Configured */
00056 #define USB_DMA_IDLE        0x0001  /* DMA Idle - Waiting for Trigger */
00057 #define USB_DMA_BUSY        0x0002  /* DMA Busy - Transfer in progress */
00058 #define USB_DMA_DONE        0x0003  /* DMA Transfer Done (no Errors)*/
00059 #define USB_DMA_OVER_RUN    0x0004  /* Data Over Run */
00060 #define USB_DMA_UNDER_RUN   0x0005  /* Data Under Run (Short Packet) */
00061 #define USB_DMA_ERROR       0x0006  /* Error */
00062 #define USB_DMA_UNKNOWN     0xFFFF  /* Unknown State */
00063
00064 /* USB DMA Descriptor */
00065 typedef struct _USB_DMA_DESCRIPTOR {
00066   uint32_t BufAdr;                     /* DMA Buffer Address */
00067   uint16_t  BufLen;                     /* DMA Buffer Length */
00068   uint16_t  MaxSize;                    /* Maximum Packet Size */
00069   uint32_t InfoAdr;                    /* Packet Info Memory Address */
00070   union {                           /* DMA Configuration */
00071     struct {
00072       uint32_t Link   : 1;             /* Link to existing Descriptors */
00073       uint32_t IsoEP  : 1;             /* Isonchronous Endpoint */
00074       uint32_t ATLE   : 1;             /* ATLE (Auto Transfer Length Extract) */
00075       uint32_t Rsrvd  : 5;             /* Reserved */
00076       uint32_t LenPos : 8;             /* Length Position (ATLE) */
00077     } Type;
00078     uint32_t Val;
00079   } Cfg;
00080 } USB_DMA_DESCRIPTOR;
00081
00082 /* USB Hardware Functions */
00083 extern void  USB_Init       (void);
00084 extern void  USB_Connect    (uint32_t  con);
00085 extern void  USB_Reset      (void);
00086 extern void  USB_Suspend    (void);
00087 extern void  USB_Resume     (void);
00088 extern void  USB_WakeUp     (void);
00089 extern void  USB_WakeUpCfg  (uint32_t  cfg);
00090 extern void  USB_SetAddress (uint32_t adr);
00091 extern void  USB_Configure  (uint32_t  cfg);
00092 extern void  USB_ConfigEP   (USB_ENDPOINT_DESCRIPTOR *pEPD);
00093 extern void  USB_DirCtrlEP  (uint32_t dir);
00094 extern void  USB_EnableEP   (uint32_t EPNum);
00095 extern void  USB_DisableEP  (uint32_t EPNum);
00096 extern void  USB_ResetEP    (uint32_t EPNum);
00097 extern void  USB_SetStallEP (uint32_t EPNum);
00098 extern void  USB_ClrStallEP (uint32_t EPNum);
00099 extern void USB_ClearEPBuf  (uint32_t  EPNum);
00100 extern uint32_t USB_ReadEP     (uint32_t EPNum, uint8_t *pData);
00101 extern uint32_t USB_WriteEP    (uint32_t EPNum, uint8_t *pData, uint32_t cnt);
00102 extern uint32_t  USB_DMA_Setup  (uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD);
00103 extern void  USB_DMA_Enable (uint32_t EPNum);
00104 extern void  USB_DMA_Disable(uint32_t EPNum);
00105 extern uint32_t USB_DMA_Status (uint32_t EPNum);
00106 extern uint32_t USB_DMA_BufAdr (uint32_t EPNum);
00107 extern uint32_t USB_DMA_BufCnt (uint32_t EPNum);
00108 extern uint32_t USB_GetFrame   (void);
00109 extern void  USB_IRQHandler (void);
00110
00111
00112 #endif  /* __USBHW_H__ */
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbreg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbreg.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbreg.h
00005  * Purpose: USB Hardware Layer Definitions for NXP LPC Family MCUs
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBREG_H
00020 #define __USBREG_H
00021
00022 /* Device Interrupt Bit Definitions */
00023 #define FRAME_INT           0x00000001
00024 #define EP_FAST_INT         0x00000002
00025 #define EP_SLOW_INT         0x00000004
00026 #define DEV_STAT_INT        0x00000008
00027 #define CCEMTY_INT          0x00000010
00028 #define CDFULL_INT          0x00000020
00029 #define RxENDPKT_INT        0x00000040
00030 #define TxENDPKT_INT        0x00000080
00031 #define EP_RLZED_INT        0x00000100
00032 #define ERR_INT             0x00000200
00033
00034 /* Rx & Tx Packet Length Definitions */
00035 #define PKT_LNGTH_MASK      0x000003FF
00036 #define PKT_DV              0x00000400
00037 #define PKT_RDY             0x00000800
00038
00039 /* USB Control Definitions */
00040 #define CTRL_RD_EN          0x00000001
00041 #define CTRL_WR_EN          0x00000002
00042
00043 /* Command Codes */
00044 #define CMD_SET_ADDR        0x00D00500
00045 #define CMD_CFG_DEV         0x00D80500
00046 #define CMD_SET_MODE        0x00F30500
00047 #define CMD_RD_FRAME        0x00F50500
00048 #define DAT_RD_FRAME        0x00F50200
00049 #define CMD_RD_TEST         0x00FD0500
00050 #define DAT_RD_TEST         0x00FD0200
00051 #define CMD_SET_DEV_STAT    0x00FE0500
00052 #define CMD_GET_DEV_STAT    0x00FE0500
00053 #define DAT_GET_DEV_STAT    0x00FE0200
00054 #define CMD_GET_ERR_CODE    0x00FF0500
00055 #define DAT_GET_ERR_CODE    0x00FF0200
00056 #define CMD_RD_ERR_STAT     0x00FB0500
00057 #define DAT_RD_ERR_STAT     0x00FB0200
00058 #define DAT_WR_BYTE(x)     (0x00000100 | ((x) << 16))
00059 #define CMD_SEL_EP(x)      (0x00000500 | ((x) << 16))
00060 #define DAT_SEL_EP(x)      (0x00000200 | ((x) << 16))
00061 #define CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16))
00062 #define DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16))
00063 #define CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16))
00064 #define CMD_CLR_BUF         0x00F20500
00065 #define DAT_CLR_BUF         0x00F20200
00066 #define CMD_VALID_BUF       0x00FA0500
00067
00068 /* Device Address Register Definitions */
00069 #define DEV_ADDR_MASK       0x7F
00070 #define DEV_EN              0x80
00071
00072 /* Device Configure Register Definitions */
00073 #define CONF_DVICE          0x01
00074
00075 /* Device Mode Register Definitions */
00076 #define AP_CLK              0x01
00077 #define INAK_CI             0x02
00078 #define INAK_CO             0x04
00079 #define INAK_II             0x08
00080 #define INAK_IO             0x10
00081 #define INAK_BI             0x20
00082 #define INAK_BO             0x40
00083
00084 /* Device Status Register Definitions */
00085 #define DEV_CON             0x01
00086 #define DEV_CON_CH          0x02
00087 #define DEV_SUS             0x04
00088 #define DEV_SUS_CH          0x08
00089 #define DEV_RST             0x10
00090
00091 /* Error Code Register Definitions */
00092 #define ERR_EC_MASK         0x0F
00093 #define ERR_EA              0x10
00094
00095 /* Error Status Register Definitions */
00096 #define ERR_PID             0x01
00097 #define ERR_UEPKT           0x02
00098 #define ERR_DCRC            0x04
00099 #define ERR_TIMOUT          0x08
00100 #define ERR_EOP             0x10
00101 #define ERR_B_OVRN          0x20
00102 #define ERR_BTSTF           0x40
00103 #define ERR_TGL             0x80
00104
00105 /* Endpoint Select Register Definitions */
00106 #define EP_SEL_F            0x01
00107 #define EP_SEL_ST           0x02
00108 #define EP_SEL_STP          0x04
00109 #define EP_SEL_PO           0x08
00110 #define EP_SEL_EPN          0x10
00111 #define EP_SEL_B_1_FULL     0x20
00112 #define EP_SEL_B_2_FULL     0x40
00113
00114 /* Endpoint Status Register Definitions */
00115 #define EP_STAT_ST          0x01
00116 #define EP_STAT_DA          0x20
00117 #define EP_STAT_RF_MO       0x40
00118 #define EP_STAT_CND_ST      0x80
00119
00120 /* Clear Buffer Register Definitions */
00121 #define CLR_BUF_PO          0x01
00122
00123
00124 /* DMA Interrupt Bit Definitions */
00125 #define EOT_INT             0x01
00126 #define NDD_REQ_INT         0x02
00127 #define SYS_ERR_INT         0x04
00128
00129
00130 #endif  /* __USBREG_H */
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbuser.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbuser.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbuser.c
00005  * Purpose: USB Custom User Module
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include "lpc_types.h"
00020
00021 #include "usb.h"
00022 #include "usbcfg.h"
00023 #include "usbhw.h"
00024 #include "usbcore.h"
00025 #include "usbuser.h"
00026
00027 #include "usbaudio.h"
00028
00029
00030 /*
00031  *  USB Power Event Callback
00032  *   Called automatically on USB Power Event
00033  *    Parameter:       power: On(TRUE)/Off(FALSE)
00034  */
00035
00036 #if USB_POWER_EVENT
00037 void USB_Power_Event (uint32_t  power) {
00038 }
00039 #endif
00040
00041
00042 /*
00043  *  USB Reset Event Callback
00044  *   Called automatically on USB Reset Event
00045  */
00046
00047 #if USB_RESET_EVENT
00048 void USB_Reset_Event (void) {
00049   USB_ResetCore();
00050 }
00051 #endif
00052
00053
00054 /*
00055  *  USB Suspend Event Callback
00056  *   Called automatically on USB Suspend Event
00057  */
00058
00059 #if USB_SUSPEND_EVENT
00060 void USB_Suspend_Event (void) {
00061 }
00062 #endif
00063
00064
00065 /*
00066  *  USB Resume Event Callback
00067  *   Called automatically on USB Resume Event
00068  */
00069
00070 #if USB_RESUME_EVENT
00071 void USB_Resume_Event (void) {
00072 }
00073 #endif
00074
00075
00076 /*
00077  *  USB Remote Wakeup Event Callback
00078  *   Called automatically on USB Remote Wakeup Event
00079  */
00080
00081 #if USB_WAKEUP_EVENT
00082 void USB_WakeUp_Event (void) {
00083 }
00084 #endif
00085
00086
00087 /*
00088  *  USB Start of Frame Event Callback
00089  *   Called automatically on USB Start of Frame Event
00090  */
00091
00092 #if USB_SOF_EVENT
00093 void USB_SOF_Event (void) {
00094 #if USB_DMA == 0
00095   if (USB_ReadEP(0x03, (uint8_t *)&DataBuf[DataIn])) {
00096     /* Data Available */
00097     DataIn += P_S;                          /* Update Data In Index */
00098     DataIn &= B_S - 1;                      /* Adjust Data In Index */
00099     if (((DataIn - DataOut) & (B_S - 1)) == (B_S/2)) {
00100       DataRun = 1;                          /* Data Stream running */
00101     }
00102   } else {
00103     /* No Data */
00104     DataRun  = 0;                           /* Data Stream not running */
00105     DataOut  = DataIn;                      /* Initialize Data Indexes */
00106   }
00107 #endif
00108 }
00109 #endif
00110
00111
00112 /*
00113  *  USB Error Event Callback
00114  *   Called automatically on USB Error Event
00115  *    Parameter:       error: Error Code
00116  */
00117
00118 #if USB_ERROR_EVENT
00119 void USB_Error_Event (uint32_t error) {
00120 }
00121 #endif
00122
00123
00124 /*
00125  *  USB Set Configuration Event Callback
00126  *   Called automatically on USB Set Configuration Request
00127  */
00128
00129 #if USB_CONFIGURE_EVENT
00130 void USB_Configure_Event (void) {
00131
00132   if (USB_Configuration) {                  /* Check if USB is configured */
00133     /* add your code here */
00134   }
00135 }
00136 #endif
00137
00138
00139 /*
00140  *  USB Set Interface Event Callback
00141  *   Called automatically on USB Set Interface Request
00142  */
00143
00144 #if USB_INTERFACE_EVENT
00145 void USB_Interface_Event (void) {
00146 }
00147 #endif
00148
00149
00150 /*
00151  *  USB Set/Clear Feature Event Callback
00152  *   Called automatically on USB Set/Clear Feature Request
00153  */
00154
00155 #if USB_FEATURE_EVENT
00156 void USB_Feature_Event (void) {
00157 }
00158 #endif
00159
00160
00161 #define P_EP(n) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)
00162
00163 /* USB Endpoint Events Callback Pointers */
00164 void (* const USB_P_EP[16]) (uint32_t event) = {
00165   P_EP(0),
00166   P_EP(1),
00167   P_EP(2),
00168   P_EP(3),
00169   P_EP(4),
00170   P_EP(5),
00171   P_EP(6),
00172   P_EP(7),
00173   P_EP(8),
00174   P_EP(9),
00175   P_EP(10),
00176   P_EP(11),
00177   P_EP(12),
00178   P_EP(13),
00179   P_EP(14),
00180   P_EP(15),
00181 };
00182
00183
00184 /*
00185  *  USB Endpoint 1 Event Callback
00186  *   Called automatically on USB Endpoint 1 Event
00187  *    Parameter:       event
00188  */
00189
00190 void USB_EndPoint1 (uint32_t event) {
00191 }
00192
00193
00194 /*
00195  *  USB Endpoint 2 Event Callback
00196  *   Called automatically on USB Endpoint 2 Event
00197  *    Parameter:       event
00198  */
00199
00200 void USB_EndPoint2 (uint32_t event) {
00201 }
00202
00203 /*
00204  *  USB Endpoint 3 Event Callback
00205  *   Called automatically on USB Endpoint 3 Event
00206  *    Parameter:       event
00207  */
00208
00209 void USB_EndPoint3 (uint32_t event) {
00210 #if USB_DMA
00211   USB_DMA_DESCRIPTOR DD;
00212
00213   if (event & USB_EVT_OUT_DMA_EOT) {
00214     /* End of Transfer */
00215     if (USB_DMA_BufAdr(0x03) != ((uint32_t)DataBuf + 2*DataIn)) {
00216       /* Data Available */
00217       DataIn += P_C*P_S;                    /* Update Data In Index */
00218       DataIn &= B_S - 1;                    /* Adjust Data In Index */
00219       if (((DataIn - DataOut) & (B_S - 1)) == (B_S/2)) {
00220         DataRun = 1;                        /* Data Stream running */
00221       }
00222     } else {
00223       /* No Data */
00224       DataRun = 0;                          /* Data Stream not running */
00225       DataOut = DataIn;                     /* Initialize Data Indexes */
00226     }
00227   }
00228   if (event & (USB_EVT_OUT_DMA_EOT) | (USB_EVT_OUT_DMA_NDR)) {
00229     /* End of Transfer or New Descriptor Request */
00230     DD.BufAdr  = (uint32_t)DataBuf + 2*DataIn; /* DMA Buffer Address */
00231     DD.BufLen  = P_C;                       /* DMA Packet Count */
00232     DD.MaxSize = 0;                         /* Must be 0 for Iso Transfer */
00233     DD.InfoAdr = (uint32_t)InfoBuf;            /* Packet Info Buffer Address */
00234     DD.Cfg.Val = 0;                         /* Initial DMA Configuration */
00235     DD.Cfg.Type.IsoEP = 1;                  /* Iso Endpoint */
00236     USB_DMA_Setup (0x03, &DD);              /* Setup DMA */
00237     USB_DMA_Enable(0x03);                   /* Enable DMA */
00238   }
00239 #else
00240   event = event;
00241 #endif
00242 }
00243
00244
00245 /*
00246  *  USB Endpoint 4 Event Callback
00247  *   Called automatically on USB Endpoint 4 Event
00248  *    Parameter:       event
00249  */
00250
00251 void USB_EndPoint4 (uint32_t event) {
00252 }
00253
00254
00255 /*
00256  *  USB Endpoint 5 Event Callback
00257  *   Called automatically on USB Endpoint 5 Event
00258  *    Parameter:       event
00259  */
00260
00261 void USB_EndPoint5 (uint32_t event) {
00262 }
00263
00264
00265 /*
00266  *  USB Endpoint 6 Event Callback
00267  *   Called automatically on USB Endpoint 6 Event
00268  *    Parameter:       event
00269  */
00270
00271 void USB_EndPoint6 (uint32_t event) {
00272 }
00273
00274
00275 /*
00276  *  USB Endpoint 7 Event Callback
00277  *   Called automatically on USB Endpoint 7 Event
00278  *    Parameter:       event
00279  */
00280
00281 void USB_EndPoint7 (uint32_t event) {
00282 }
00283
00284
00285 /*
00286  *  USB Endpoint 8 Event Callback
00287  *   Called automatically on USB Endpoint 8 Event
00288  *    Parameter:       event
00289  */
00290
00291 void USB_EndPoint8 (uint32_t event) {
00292 }
00293
00294
00295 /*
00296  *  USB Endpoint 9 Event Callback
00297  *   Called automatically on USB Endpoint 9 Event
00298  *    Parameter:       event
00299  */
00300
00301 void USB_EndPoint9 (uint32_t event) {
00302 }
00303
00304
00305 /*
00306  *  USB Endpoint 10 Event Callback
00307  *   Called automatically on USB Endpoint 10 Event
00308  *    Parameter:       event
00309  */
00310
00311 void USB_EndPoint10 (uint32_t event) {
00312 }
00313
00314
00315 /*
00316  *  USB Endpoint 11 Event Callback
00317  *   Called automatically on USB Endpoint 11 Event
00318  *    Parameter:       event
00319  */
00320
00321 void USB_EndPoint11 (uint32_t event) {
00322 }
00323
00324
00325 /*
00326  *  USB Endpoint 12 Event Callback
00327  *   Called automatically on USB Endpoint 12 Event
00328  *    Parameter:       event
00329  */
00330
00331 void USB_EndPoint12 (uint32_t event) {
00332 }
00333
00334
00335 /*
00336  *  USB Endpoint 13 Event Callback
00337  *   Called automatically on USB Endpoint 13 Event
00338  *    Parameter:       event
00339  */
00340
00341 void USB_EndPoint13 (uint32_t event) {
00342 }
00343
00344
00345 /*
00346  *  USB Endpoint 14 Event Callback
00347  *   Called automatically on USB Endpoint 14 Event
00348  *    Parameter:       event
00349  */
00350
00351 void USB_EndPoint14 (uint32_t event) {
00352 }
00353
00354
00355 /*
00356  *  USB Endpoint 15 Event Callback
00357  *   Called automatically on USB Endpoint 15 Event
00358  *    Parameter:       event
00359  */
00360
00361 void USB_EndPoint15 (uint32_t event) {
00362 }
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbuser.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbuser.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbuser.h
00005  * Purpose: USB Custom User Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBUSER_H__
00020 #define __USBUSER_H__
00021
00022
00023 /* USB Device Events Callback Functions */
00024 extern void USB_Power_Event     (uint32_t  power);
00025 extern void USB_Reset_Event     (void);
00026 extern void USB_Suspend_Event   (void);
00027 extern void USB_Resume_Event    (void);
00028 extern void USB_WakeUp_Event    (void);
00029 extern void USB_SOF_Event       (void);
00030 extern void USB_Error_Event     (uint32_t error);
00031
00032 /* USB Endpoint Callback Events */
00033 #define USB_EVT_SETUP       1   /* Setup Packet */
00034 #define USB_EVT_OUT         2   /* OUT Packet */
00035 #define USB_EVT_IN          3   /*  IN Packet */
00036 #define USB_EVT_OUT_NAK     4   /* OUT Packet - Not Acknowledged */
00037 #define USB_EVT_IN_NAK      5   /*  IN Packet - Not Acknowledged */
00038 #define USB_EVT_OUT_STALL   6   /* OUT Packet - Stalled */
00039 #define USB_EVT_IN_STALL    7   /*  IN Packet - Stalled */
00040 #define USB_EVT_OUT_DMA_EOT 8   /* DMA OUT EP - End of Transfer */
00041 #define USB_EVT_IN_DMA_EOT  9   /* DMA  IN EP - End of Transfer */
00042 #define USB_EVT_OUT_DMA_NDR 10  /* DMA OUT EP - New Descriptor Request */
00043 #define USB_EVT_IN_DMA_NDR  11  /* DMA  IN EP - New Descriptor Request */
00044 #define USB_EVT_OUT_DMA_ERR 12  /* DMA OUT EP - Error */
00045 #define USB_EVT_IN_DMA_ERR  13  /* DMA  IN EP - Error */
00046
00047 /* USB Endpoint Events Callback Pointers */
00048 extern void (* const USB_P_EP[16])(uint32_t event);
00049
00050 /* USB Endpoint Events Callback Functions */
00051 extern void USB_EndPoint0  (uint32_t event);
00052 extern void USB_EndPoint1  (uint32_t event);
00053 extern void USB_EndPoint2  (uint32_t event);
00054 extern void USB_EndPoint3  (uint32_t event);
00055 extern void USB_EndPoint4  (uint32_t event);
00056 extern void USB_EndPoint5  (uint32_t event);
00057 extern void USB_EndPoint6  (uint32_t event);
00058 extern void USB_EndPoint7  (uint32_t event);
00059 extern void USB_EndPoint8  (uint32_t event);
00060 extern void USB_EndPoint9  (uint32_t event);
00061 extern void USB_EndPoint10 (uint32_t event);
00062 extern void USB_EndPoint11 (uint32_t event);
00063 extern void USB_EndPoint12 (uint32_t event);
00064 extern void USB_EndPoint13 (uint32_t event);
00065 extern void USB_EndPoint14 (uint32_t event);
00066 extern void USB_EndPoint15 (uint32_t event);
00067
00068 /* USB Core Events Callback Functions */
00069 extern void USB_Configure_Event (void);
00070 extern void USB_Interface_Event (void);
00071 extern void USB_Feature_Event   (void);
00072
00073
00074 #endif  /* __USBUSER_H__ */
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usb.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usb.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usb.h
00005  * Purpose: USB Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USB_H__
00020 #define __USB_H__
00021 #include "lpc_types.h"
00022
00023 #if defined   (  __GNUC__  )
00024 #define __packed __attribute__((__packed__))
00025 #endif
00026
00027 #if defined     (  __CC_ARM  )
00028 typedef __packed union {
00029 #elif defined   (  __GNUC__  )
00030 typedef union __packed {
00031 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00032 #pragma pack(1)
00033 typedef union {
00034 #endif
00035   uint16_t W;
00036 #if defined     (  __CC_ARM  )
00037   __packed struct {
00038 #elif defined   (  __GNUC__  )
00039   struct __packed {
00040 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00041 #pragma pack(1)
00042   struct {
00043 #endif
00044     uint8_t L;
00045     uint8_t H;
00046   } WB;
00047 #ifdef __IAR_SYSTEMS_ICC__
00048 #pragma pack()
00049 #endif
00050 } WORD_BYTE;
00051 #ifdef __IAR_SYSTEMS_ICC__
00052 #pragma pack()
00053 #endif
00054
00055
00056 /* bmRequestType.Dir */
00057 #define REQUEST_HOST_TO_DEVICE     0
00058 #define REQUEST_DEVICE_TO_HOST     1
00059
00060 /* bmRequestType.Type */
00061 #define REQUEST_STANDARD           0
00062 #define REQUEST_CLASS              1
00063 #define REQUEST_VENDOR             2
00064 #define REQUEST_RESERVED           3
00065
00066 /* bmRequestType.Recipient */
00067 #define REQUEST_TO_DEVICE          0
00068 #define REQUEST_TO_INTERFACE       1
00069 #define REQUEST_TO_ENDPOINT        2
00070 #define REQUEST_TO_OTHER           3
00071
00072 /* bmRequestType Definition */
00073 #if defined     (  __CC_ARM  )
00074 typedef __packed union _REQUEST_TYPE {
00075 #elif defined   (  __GNUC__  )
00076 typedef union __packed _REQUEST_TYPE {
00077 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00078 #pragma pack(1)
00079 typedef union _REQUEST_TYPE {
00080 #endif
00081 #if defined     (  __CC_ARM  )
00082         __packed struct _BM {
00083 #elif defined   (  __GNUC__  )
00084         struct __packed _BM {
00085 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00086 #pragma pack(1)
00087         struct _BM {
00088 #endif
00089     uint8_t Recipient : 5;
00090     uint8_t Type      : 2;
00091     uint8_t Dir       : 1;
00092   } BM;
00093 #ifdef __IAR_SYSTEMS_ICC__
00094 #pragma pack()
00095 #endif
00096   uint8_t B;
00097 } REQUEST_TYPE;
00098 #ifdef __IAR_SYSTEMS_ICC__
00099 #pragma pack()
00100 #endif
00101
00102 /* USB Standard Request Codes */
00103 #define USB_REQUEST_GET_STATUS                 0
00104 #define USB_REQUEST_CLEAR_FEATURE              1
00105 #define USB_REQUEST_SET_FEATURE                3
00106 #define USB_REQUEST_SET_ADDRESS                5
00107 #define USB_REQUEST_GET_DESCRIPTOR             6
00108 #define USB_REQUEST_SET_DESCRIPTOR             7
00109 #define USB_REQUEST_GET_CONFIGURATION          8
00110 #define USB_REQUEST_SET_CONFIGURATION          9
00111 #define USB_REQUEST_GET_INTERFACE              10
00112 #define USB_REQUEST_SET_INTERFACE              11
00113 #define USB_REQUEST_SYNC_FRAME                 12
00114
00115 /* USB GET_STATUS Bit Values */
00116 #define USB_GETSTATUS_SELF_POWERED             0x01
00117 #define USB_GETSTATUS_REMOTE_WAKEUP            0x02
00118 #define USB_GETSTATUS_ENDPOINT_STALL           0x01
00119
00120 /* USB Standard Feature selectors */
00121 #define USB_FEATURE_ENDPOINT_STALL             0
00122 #define USB_FEATURE_REMOTE_WAKEUP              1
00123
00124 /* USB Default Control Pipe Setup Packet */
00125 #if defined     (  __CC_ARM  )
00126 typedef __packed struct _USB_SETUP_PACKET {
00127 #elif defined   (  __GNUC__  )
00128 typedef struct __packed _USB_SETUP_PACKET {
00129 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00130 #pragma pack(1)
00131 typedef struct _USB_SETUP_PACKET {
00132 #endif
00133   REQUEST_TYPE bmRequestType;
00134   uint8_t         bRequest;
00135   WORD_BYTE    wValue;
00136   WORD_BYTE    wIndex;
00137   uint16_t         wLength;
00138 } USB_SETUP_PACKET;
00139 #ifdef __IAR_SYSTEMS_ICC__
00140 #pragma pack()
00141 #endif
00142
00143
00144 /* USB Descriptor Types */
00145 #define USB_DEVICE_DESCRIPTOR_TYPE             1
00146 #define USB_CONFIGURATION_DESCRIPTOR_TYPE      2
00147 #define USB_STRING_DESCRIPTOR_TYPE             3
00148 #define USB_INTERFACE_DESCRIPTOR_TYPE          4
00149 #define USB_ENDPOINT_DESCRIPTOR_TYPE           5
00150 #define USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE   6
00151 #define USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7
00152 #define USB_INTERFACE_POWER_DESCRIPTOR_TYPE    8
00153 #define USB_OTG_DESCRIPTOR_TYPE                     9
00154 #define USB_DEBUG_DESCRIPTOR_TYPE                  10
00155 #define USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE  11
00156
00157 /* USB Device Classes */
00158 #define USB_DEVICE_CLASS_RESERVED              0x00
00159 #define USB_DEVICE_CLASS_AUDIO                 0x01
00160 #define USB_DEVICE_CLASS_COMMUNICATIONS        0x02
00161 #define USB_DEVICE_CLASS_HUMAN_INTERFACE       0x03
00162 #define USB_DEVICE_CLASS_MONITOR               0x04
00163 #define USB_DEVICE_CLASS_PHYSICAL_INTERFACE    0x05
00164 #define USB_DEVICE_CLASS_POWER                 0x06
00165 #define USB_DEVICE_CLASS_PRINTER               0x07
00166 #define USB_DEVICE_CLASS_STORAGE               0x08
00167 #define USB_DEVICE_CLASS_HUB                   0x09
00168 #define USB_DEVICE_CLASS_MISCELLANEOUS         0xEF
00169 #define USB_DEVICE_CLASS_VENDOR_SPECIFIC       0xFF
00170
00171 /* bmAttributes in Configuration Descriptor */
00172 #define USB_CONFIG_POWERED_MASK                0x40
00173 #define USB_CONFIG_BUS_POWERED                 0x80
00174 #define USB_CONFIG_SELF_POWERED                0xC0
00175 #define USB_CONFIG_REMOTE_WAKEUP               0x20
00176
00177 /* bMaxPower in Configuration Descriptor */
00178 #define USB_CONFIG_POWER_MA(mA)                ((mA)/2)
00179
00180 /* bEndpointAddress in Endpoint Descriptor */
00181 #define USB_ENDPOINT_DIRECTION_MASK            0x80
00182 #define USB_ENDPOINT_OUT(addr)                 ((addr) | 0x00)
00183 #define USB_ENDPOINT_IN(addr)                  ((addr) | 0x80)
00184
00185 /* bmAttributes in Endpoint Descriptor */
00186 #define USB_ENDPOINT_TYPE_MASK                 0x03
00187 #define USB_ENDPOINT_TYPE_CONTROL              0x00
00188 #define USB_ENDPOINT_TYPE_ISOCHRONOUS          0x01
00189 #define USB_ENDPOINT_TYPE_BULK                 0x02
00190 #define USB_ENDPOINT_TYPE_INTERRUPT            0x03
00191 #define USB_ENDPOINT_SYNC_MASK                 0x0C
00192 #define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION   0x00
00193 #define USB_ENDPOINT_SYNC_ASYNCHRONOUS         0x04
00194 #define USB_ENDPOINT_SYNC_ADAPTIVE             0x08
00195 #define USB_ENDPOINT_SYNC_SYNCHRONOUS          0x0C
00196 #define USB_ENDPOINT_USAGE_MASK                0x30
00197 #define USB_ENDPOINT_USAGE_DATA                0x00
00198 #define USB_ENDPOINT_USAGE_FEEDBACK            0x10
00199 #define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK   0x20
00200 #define USB_ENDPOINT_USAGE_RESERVED            0x30
00201
00202 /* USB Standard Device Descriptor */
00203 #if defined     (  __CC_ARM  )
00204 typedef __packed struct _USB_DEVICE_DESCRIPTOR {
00205 #elif defined   (  __GNUC__  )
00206 typedef struct __packed _USB_DEVICE_DESCRIPTOR {
00207 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00208 #pragma pack(1)
00209 typedef struct _USB_DEVICE_DESCRIPTOR {
00210 #endif
00211   uint8_t  bLength;
00212   uint8_t  bDescriptorType;
00213   uint16_t  bcdUSB;
00214   uint8_t  bDeviceClass;
00215   uint8_t  bDeviceSubClass;
00216   uint8_t  bDeviceProtocol;
00217   uint8_t  bMaxPacketSize0;
00218   uint16_t  idVendor;
00219   uint16_t  idProduct;
00220   uint16_t  bcdDevice;
00221   uint8_t  iManufacturer;
00222   uint8_t  iProduct;
00223   uint8_t  iSerialNumber;
00224   uint8_t  bNumConfigurations;
00225 } USB_DEVICE_DESCRIPTOR;
00226 #ifdef __IAR_SYSTEMS_ICC__
00227 #pragma pack()
00228 #endif
00229
00230 /* USB 2.0 Device Qualifier Descriptor */
00231 #if defined     (  __CC_ARM  )
00232 typedef __packed struct _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00233 #elif defined   (  __GNUC__  )
00234 typedef struct __packed _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00235 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00236 #pragma pack(1)
00237 typedef struct _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00238 #endif
00239   uint8_t  bLength;
00240   uint8_t  bDescriptorType;
00241   uint16_t  bcdUSB;
00242   uint8_t  bDeviceClass;
00243   uint8_t  bDeviceSubClass;
00244   uint8_t  bDeviceProtocol;
00245   uint8_t  bMaxPacketSize0;
00246   uint8_t  bNumConfigurations;
00247   uint8_t  bReserved;
00248 } USB_DEVICE_QUALIFIER_DESCRIPTOR;
00249 #ifdef __IAR_SYSTEMS_ICC__
00250 #pragma pack()
00251 #endif
00252
00253 #if defined     (  __CC_ARM  )
00254 typedef __packed struct _USB_CONFIGURATION_DESCRIPTOR {
00255 #elif defined   (  __GNUC__  )
00256 typedef struct __packed _USB_CONFIGURATION_DESCRIPTOR {
00257 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00258 #pragma pack(1)
00259 typedef struct _USB_CONFIGURATION_DESCRIPTOR {
00260 #endif
00261   uint8_t  bLength;
00262   uint8_t  bDescriptorType;
00263   uint16_t  wTotalLength;
00264   uint8_t  bNumInterfaces;
00265   uint8_t  bConfigurationValue;
00266   uint8_t  iConfiguration;
00267   uint8_t  bmAttributes;
00268   uint8_t  bMaxPower;
00269 } USB_CONFIGURATION_DESCRIPTOR;
00270 #ifdef __IAR_SYSTEMS_ICC__
00271 #pragma pack()
00272 #endif
00273
00274 /* USB Standard Interface Descriptor */
00275 #if defined     (  __CC_ARM  )
00276 typedef __packed struct _USB_INTERFACE_DESCRIPTOR {
00277 #elif defined   (  __GNUC__  )
00278 typedef struct __packed _USB_INTERFACE_DESCRIPTOR {
00279 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00280 #pragma pack(1)
00281 typedef struct _USB_INTERFACE_DESCRIPTOR {
00282 #endif
00283   uint8_t  bLength;
00284   uint8_t  bDescriptorType;
00285   uint8_t  bInterfaceNumber;
00286   uint8_t  bAlternateSetting;
00287   uint8_t  bNumEndpoints;
00288   uint8_t  bInterfaceClass;
00289   uint8_t  bInterfaceSubClass;
00290   uint8_t  bInterfaceProtocol;
00291   uint8_t  iInterface;
00292 } USB_INTERFACE_DESCRIPTOR;
00293 #ifdef __IAR_SYSTEMS_ICC__
00294 #pragma pack()
00295 #endif
00296
00297 /* USB Standard Endpoint Descriptor */
00298 #if defined     (  __CC_ARM  )
00299 typedef __packed struct _USB_ENDPOINT_DESCRIPTOR {
00300 #elif defined   (  __GNUC__  )
00301 typedef struct __packed _USB_ENDPOINT_DESCRIPTOR {
00302 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00303 #pragma pack(1)
00304 typedef struct _USB_ENDPOINT_DESCRIPTOR {
00305 #endif
00306   uint8_t  bLength;
00307   uint8_t  bDescriptorType;
00308   uint8_t  bEndpointAddress;
00309   uint8_t  bmAttributes;
00310   uint16_t  wMaxPacketSize;
00311   uint8_t  bInterval;
00312 } USB_ENDPOINT_DESCRIPTOR;
00313 #ifdef __IAR_SYSTEMS_ICC__
00314 #pragma pack()
00315 #endif
00316
00317 /* USB String Descriptor */
00318 #if defined     (  __CC_ARM  )
00319 typedef __packed struct _USB_STRING_DESCRIPTOR {
00320 #elif defined   (  __GNUC__  )
00321 typedef struct __packed _USB_STRING_DESCRIPTOR {
00322 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00323 #pragma pack(1)
00324 typedef struct _USB_STRING_DESCRIPTOR {
00325 #endif
00326   uint8_t  bLength;
00327   uint8_t  bDescriptorType;
00328   uint16_t  bString/*[]*/;
00329 } USB_STRING_DESCRIPTOR;
00330 #ifdef __IAR_SYSTEMS_ICC__
00331 #pragma pack()
00332 #endif
00333
00334 /* USB Common Descriptor */
00335 #if defined     (  __CC_ARM  )
00336 typedef __packed struct _USB_COMMON_DESCRIPTOR {
00337 #elif defined   (  __GNUC__  )
00338 typedef struct __packed _USB_COMMON_DESCRIPTOR {
00339 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00340 #pragma pack(1)
00341 typedef struct _USB_COMMON_DESCRIPTOR {
00342 #endif
00343   uint8_t  bLength;
00344   uint8_t  bDescriptorType;
00345 } USB_COMMON_DESCRIPTOR;
00346 #ifdef __IAR_SYSTEMS_ICC__
00347 #pragma pack()
00348 #endif
00349
00350
00351
00352 #endif  /* __USB_H__ */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcfg.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbcfg.h
00005  * Purpose: USB Custom Configuration
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *----------------------------------------------------------------------------
00018  * History:
00019  *          V1.20 Added vendor specific support
00020  *          V1.00 Initial Version
00021  *---------------------------------------------------------------------------*/
00022
00023 #ifndef __USBCFG_H__
00024 #define __USBCFG_H__
00025
00026
00027 //*** <<< Use Configuration Wizard in Context Menu >>> ***
00028
00029
00030 /*
00031 // <h> USB Configuration
00032 //   <o0> USB Power
00033 //        <i> Default Power Setting
00034 //        <0=> Bus-powered
00035 //        <1=> Self-powered
00036 //   <o1> Max Number of Interfaces <1-256>
00037 //   <o2> Max Number of Endpoints  <1-32>
00038 //   <o3> Max Endpoint 0 Packet Size
00039 //        <8=> 8 Bytes <16=> 16 Bytes <32=> 32 Bytes <64=> 64 Bytes
00040 //   <e4> DMA Transfer
00041 //     <i> Use DMA for selected Endpoints
00042 //     <o5.0>  Endpoint 0 Out
00043 //     <o5.1>  Endpoint 0 In
00044 //     <o5.2>  Endpoint 1 Out
00045 //     <o5.3>  Endpoint 1 In
00046 //     <o5.4>  Endpoint 2 Out
00047 //     <o5.5>  Endpoint 2 In
00048 //     <o5.6>  Endpoint 3 Out
00049 //     <o5.7>  Endpoint 3 In
00050 //     <o5.8>  Endpoint 4 Out
00051 //     <o5.9>  Endpoint 4 In
00052 //     <o5.10> Endpoint 5 Out
00053 //     <o5.11> Endpoint 5 In
00054 //     <o5.12> Endpoint 6 Out
00055 //     <o5.13> Endpoint 6 In
00056 //     <o5.14> Endpoint 7 Out
00057 //     <o5.15> Endpoint 7 In
00058 //     <o5.16> Endpoint 8 Out
00059 //     <o5.17> Endpoint 8 In
00060 //     <o5.18> Endpoint 9 Out
00061 //     <o5.19> Endpoint 9 In
00062 //     <o5.20> Endpoint 10 Out
00063 //     <o5.21> Endpoint 10 In
00064 //     <o5.22> Endpoint 11 Out
00065 //     <o5.23> Endpoint 11 In
00066 //     <o5.24> Endpoint 12 Out
00067 //     <o5.25> Endpoint 12 In
00068 //     <o5.26> Endpoint 13 Out
00069 //     <o5.27> Endpoint 13 In
00070 //     <o5.28> Endpoint 14 Out
00071 //     <o5.29> Endpoint 14 In
00072 //     <o5.30> Endpoint 15 Out
00073 //     <o5.31> Endpoint 15 In
00074 //   </e>
00075 // </h>
00076 */
00077
00078 #define USB_POWER           0
00079 #define USB_IF_NUM          4
00080 #define USB_EP_NUM          32
00081 #define USB_MAX_PACKET0     8
00082 #define USB_DMA             0
00083 #define USB_DMA_EP          0x00000000
00084
00085
00086 /*
00087 // <h> USB Event Handlers
00088 //   <h> Device Events
00089 //     <o0.0> Power Event
00090 //     <o1.0> Reset Event
00091 //     <o2.0> Suspend Event
00092 //     <o3.0> Resume Event
00093 //     <o4.0> Remote Wakeup Event
00094 //     <o5.0> Start of Frame Event
00095 //     <o6.0> Error Event
00096 //   </h>
00097 //   <h> Endpoint Events
00098 //     <o7.0>  Endpoint 0 Event
00099 //     <o7.1>  Endpoint 1 Event
00100 //     <o7.2>  Endpoint 2 Event
00101 //     <o7.3>  Endpoint 3 Event
00102 //     <o7.4>  Endpoint 4 Event
00103 //     <o7.5>  Endpoint 5 Event
00104 //     <o7.6>  Endpoint 6 Event
00105 //     <o7.7>  Endpoint 7 Event
00106 //     <o7.8>  Endpoint 8 Event
00107 //     <o7.9>  Endpoint 9 Event
00108 //     <o7.10> Endpoint 10 Event
00109 //     <o7.11> Endpoint 11 Event
00110 //     <o7.12> Endpoint 12 Event
00111 //     <o7.13> Endpoint 13 Event
00112 //     <o7.14> Endpoint 14 Event
00113 //     <o7.15> Endpoint 15 Event
00114 //   </h>
00115 //   <h> USB Core Events
00116 //     <o8.0>  Set Configuration Event
00117 //     <o9.0>  Set Interface Event
00118 //     <o10.0> Set/Clear Feature Event
00119 //   </h>
00120 // </h>
00121 */
00122
00123 #define USB_POWER_EVENT     0
00124 #define USB_RESET_EVENT     1
00125 #define USB_SUSPEND_EVENT   0
00126 #define USB_RESUME_EVENT    0
00127 #define USB_WAKEUP_EVENT    0
00128 #define USB_SOF_EVENT       0
00129 #define USB_ERROR_EVENT     0
00130 #define USB_EP_EVENT        0x0007
00131 #define USB_CONFIGURE_EVENT 1
00132 #define USB_INTERFACE_EVENT 0
00133 #define USB_FEATURE_EVENT   0
00134
00135
00136 /*
00137 // <e0> USB Class Support
00138 //   <i> enables USB Class specific Requests
00139 //   <e1> Human Interface Device (HID)
00140 //     <o2> Interface Number <0-255>
00141 //   </e>
00142 //   <e3> Mass Storage
00143 //     <o4> Interface Number <0-255>
00144 //   </e>
00145 //   <e5> Audio Device
00146 //     <o6> Control Interface Number <0-255>
00147 //     <o7> Streaming Interface 1 Number <0-255>
00148 //     <o8> Streaming Interface 2 Number <0-255>
00149 //   </e>
00150 //   <e9> Communication Device
00151 //     <o10> Control Interface Number <0-255>
00152 //     <o11> Bulk Interface Number <0-255>
00153 //     <o12> Max Communication Device Buffer Size
00154 //        <8=> 8 Bytes <16=> 16 Bytes <32=> 32 Bytes <64=> 64 Bytes
00155 //   </e>
00156 // </e>
00157 */
00158
00159 #define USB_CLASS           1
00160 #define USB_HID             0
00161 #define USB_HID_IF_NUM      0
00162 #define USB_MSC             0
00163 #define USB_MSC_IF_NUM      0
00164 #define USB_AUDIO           0
00165 #define USB_ADC_CIF_NUM     0
00166 #define USB_ADC_SIF1_NUM    1
00167 #define USB_ADC_SIF2_NUM    2
00168 #define USB_CDC                         1
00169 #define USB_CDC_CIF_NUM     0
00170 #define USB_CDC_DIF_NUM     1
00171 #define USB_CDC_BUFSIZE     64
00172
00173 /*
00174 // <e0> USB Vendor Support
00175 //   <i> enables USB Vendor specific Requests
00176 // </e>
00177 */
00178 #define USB_VENDOR          0
00179
00180
00181 #endif  /* __USBCFG_H__ */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbcore.c
00005  * Purpose: USB Core Module
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *----------------------------------------------------------------------------
00018  * History:
00019  *          V1.20 Added vendor specific requests
00020  *                Changed string descriptor handling
00021  *                Reworked Endpoint0
00022  *          V1.00 Initial Version
00023  *----------------------------------------------------------------------------*/
00024 #include "lpc_types.h"
00025
00026 #include "usb.h"
00027 #include "usbcfg.h"
00028 #include "usbhw.h"
00029 #include "usbcore.h"
00030 #include "usbdesc.h"
00031 #include "usbuser.h"
00032
00033 #if (USB_CLASS)
00034
00035 #if (USB_AUDIO)
00036 #include "audio.h"
00037 #include "adcuser.h"
00038 #endif
00039
00040 #if (USB_HID)
00041 #include "hid.h"
00042 #include "hiduser.h"
00043 #endif
00044
00045 #if (USB_MSC)
00046 #include "msc.h"
00047 #include "mscuser.h"
00048 extern MSC_CSW CSW;
00049 #endif
00050
00051 #if (USB_CDC)
00052 #include "cdc.h"
00053 #include "cdcuser.h"
00054 #endif
00055
00056 #endif
00057
00058 #if (USB_VENDOR)
00059 #include "vendor.h"
00060 #endif
00061
00062 #if defined   (  __CC_ARM  )
00063 #pragma diag_suppress 111,1441
00064 #endif
00065
00066 #if defined   (  __GNUC__  )
00067 #define __packed __attribute__((__packed__))
00068 #endif
00069
00070 uint16_t  USB_DeviceStatus;
00071 uint8_t  USB_DeviceAddress;
00072 uint8_t  USB_Configuration;
00073 uint32_t USB_EndPointMask;
00074 uint32_t USB_EndPointHalt;
00075 uint32_t USB_EndPointStall;                         /* EP must stay stalled */
00076 uint8_t  USB_NumInterfaces;
00077 uint8_t  USB_AltSetting[USB_IF_NUM];
00078
00079 uint8_t  EP0Buf[USB_MAX_PACKET0];
00080
00081
00082 USB_EP_DATA EP0Data;
00083
00084 USB_SETUP_PACKET SetupPacket;
00085
00086
00087 /*
00088  *  Reset USB Core
00089  *    Parameters:      None
00090  *    Return Value:    None
00091  */
00092
00093 void USB_ResetCore (void) {
00094
00095   USB_DeviceStatus  = USB_POWER;
00096   USB_DeviceAddress = 0;
00097   USB_Configuration = 0;
00098   USB_EndPointMask  = 0x00010001;
00099   USB_EndPointHalt  = 0x00000000;
00100   USB_EndPointStall = 0x00000000;
00101 }
00102
00103
00104 /*
00105  *  USB Request - Setup Stage
00106  *    Parameters:      None (global SetupPacket)
00107  *    Return Value:    None
00108  */
00109
00110 void USB_SetupStage (void) {
00111   USB_ReadEP(0x00, (uint8_t *)&SetupPacket);
00112 }
00113
00114
00115 /*
00116  *  USB Request - Data In Stage
00117  *    Parameters:      None (global EP0Data)
00118  *    Return Value:    None
00119  */
00120
00121 void USB_DataInStage (void) {
00122   uint32_t cnt;
00123
00124   if (EP0Data.Count > USB_MAX_PACKET0) {
00125     cnt = USB_MAX_PACKET0;
00126   } else {
00127     cnt = EP0Data.Count;
00128   }
00129   cnt = USB_WriteEP(0x80, EP0Data.pData, cnt);
00130   EP0Data.pData += cnt;
00131   EP0Data.Count -= cnt;
00132 }
00133
00134
00135 /*
00136  *  USB Request - Data Out Stage
00137  *    Parameters:      None (global EP0Data)
00138  *    Return Value:    None
00139  */
00140
00141 void USB_DataOutStage (void) {
00142   uint32_t cnt;
00143
00144   cnt = USB_ReadEP(0x00, EP0Data.pData);
00145   EP0Data.pData += cnt;
00146   EP0Data.Count -= cnt;
00147 }
00148
00149
00150 /*
00151  *  USB Request - Status In Stage
00152  *    Parameters:      None
00153  *    Return Value:    None
00154  */
00155
00156 void USB_StatusInStage (void) {
00157   USB_WriteEP(0x80, NULL, 0);
00158 }
00159
00160
00161 /*
00162  *  USB Request - Status Out Stage
00163  *    Parameters:      None
00164  *    Return Value:    None
00165  */
00166
00167 void USB_StatusOutStage (void) {
00168   USB_ReadEP(0x00, EP0Buf);
00169 }
00170
00171
00172 /*
00173  *  Get Status USB Request
00174  *    Parameters:      None (global SetupPacket)
00175  *    Return Value:    TRUE - Success, FALSE - Error
00176  */
00177
00178 #if defined (  __IAR_SYSTEMS_ICC__  )
00179 inline uint32_t USB_ReqGetStatus (void) {
00180 #else
00181 __inline uint32_t USB_ReqGetStatus (void) {
00182 #endif
00183   uint32_t n, m;
00184
00185   switch (SetupPacket.bmRequestType.BM.Recipient) {
00186     case REQUEST_TO_DEVICE:
00187       EP0Data.pData = (uint8_t *)&USB_DeviceStatus;
00188       break;
00189     case REQUEST_TO_INTERFACE:
00190       if ((USB_Configuration != 0) && (SetupPacket.wIndex.WB.L < USB_NumInterfaces)) {
00191         *((__packed uint16_t *)EP0Buf) = 0;
00192           *((uint16_t *)EP0Buf) = 0;
00193         EP0Data.pData = EP0Buf;
00194       } else {
00195         return (FALSE);
00196       }
00197       break;
00198     case REQUEST_TO_ENDPOINT:
00199       n = SetupPacket.wIndex.WB.L & 0x8F;
00200       m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00201       if (((USB_Configuration != 0) || ((n & 0x0F) == 0)) && (USB_EndPointMask & m)) {
00202         *((__packed uint16_t *)EP0Buf) = (USB_EndPointHalt & m) ? 1 : 0;
00203           *((uint16_t *)EP0Buf) = (USB_EndPointHalt & m) ? 1 : 0;
00204         EP0Data.pData = EP0Buf;
00205       } else {
00206         return (FALSE);
00207       }
00208       break;
00209     default:
00210       return (FALSE);
00211   }
00212   return (TRUE);
00213 }
00214
00215
00216 /*
00217  *  Set/Clear Feature USB Request
00218  *    Parameters:      sc:    0 - Clear, 1 - Set
00219  *                            (global SetupPacket)
00220  *    Return Value:    TRUE - Success, FALSE - Error
00221  */
00222
00223 #if defined (  __IAR_SYSTEMS_ICC__  )
00224 inline uint32_t USB_ReqSetClrFeature (uint32_t sc) {
00225 #else
00226 __inline uint32_t USB_ReqSetClrFeature (uint32_t sc) {
00227 #endif
00228   uint32_t n, m;
00229
00230   switch (SetupPacket.bmRequestType.BM.Recipient) {
00231     case REQUEST_TO_DEVICE:
00232       if (SetupPacket.wValue.W == USB_FEATURE_REMOTE_WAKEUP) {
00233         if (sc) {
00234           USB_WakeUpCfg(TRUE);
00235           USB_DeviceStatus |=  USB_GETSTATUS_REMOTE_WAKEUP;
00236         } else {
00237           USB_WakeUpCfg(FALSE);
00238           USB_DeviceStatus &= ~USB_GETSTATUS_REMOTE_WAKEUP;
00239         }
00240       } else {
00241         return (FALSE);
00242       }
00243       break;
00244     case REQUEST_TO_INTERFACE:
00245       return (FALSE);
00246     case REQUEST_TO_ENDPOINT:
00247       n = SetupPacket.wIndex.WB.L & 0x8F;
00248       m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00249       if ((USB_Configuration != 0) && ((n & 0x0F) != 0) && (USB_EndPointMask & m)) {
00250         if (SetupPacket.wValue.W == USB_FEATURE_ENDPOINT_STALL) {
00251           if (sc) {
00252             USB_SetStallEP(n);
00253             USB_EndPointHalt |=  m;
00254           } else {
00255             if ((USB_EndPointStall & m) != 0) {
00256               return (TRUE);
00257             }
00258             USB_ClrStallEP(n);
00259 #if (USB_MSC)
00260             if ((n == MSC_EP_IN) && ((USB_EndPointHalt & m) != 0)) {
00261               /* Compliance Test: rewrite CSW after unstall */
00262               if (CSW.dSignature == MSC_CSW_Signature) {
00263                 USB_WriteEP(MSC_EP_IN, (uint8_t *)&CSW, sizeof(CSW));
00264               }
00265             }
00266 #endif
00267             USB_EndPointHalt &= ~m;
00268           }
00269         } else {
00270           return (FALSE);
00271         }
00272       } else {
00273         return (FALSE);
00274       }
00275       break;
00276     default:
00277       return (FALSE);
00278   }
00279   return (TRUE);
00280 }
00281
00282
00283 /*
00284  *  Set Address USB Request
00285  *    Parameters:      None (global SetupPacket)
00286  *    Return Value:    TRUE - Success, FALSE - Error
00287  */
00288
00289 #if defined (  __IAR_SYSTEMS_ICC__  )
00290 inline uint32_t USB_ReqSetAddress (void) {
00291 #else
00292 __inline uint32_t USB_ReqSetAddress (void) {
00293 #endif
00294   switch (SetupPacket.bmRequestType.BM.Recipient) {
00295     case REQUEST_TO_DEVICE:
00296       USB_DeviceAddress = 0x80 | SetupPacket.wValue.WB.L;
00297       break;
00298     default:
00299       return (FALSE);
00300   }
00301   return (TRUE);
00302 }
00303
00304
00305 /*
00306  *  Get Descriptor USB Request
00307  *    Parameters:      None (global SetupPacket)
00308  *    Return Value:    TRUE - Success, FALSE - Error
00309  */
00310
00311 #if defined (  __IAR_SYSTEMS_ICC__  )
00312 inline uint32_t USB_ReqGetDescriptor (void) {
00313 #else
00314 __inline uint32_t USB_ReqGetDescriptor (void) {
00315 #endif
00316   uint8_t  *pD;
00317   uint32_t len, n;
00318
00319   switch (SetupPacket.bmRequestType.BM.Recipient) {
00320     case REQUEST_TO_DEVICE:
00321       switch (SetupPacket.wValue.WB.H) {
00322         case USB_DEVICE_DESCRIPTOR_TYPE:
00323           EP0Data.pData = (uint8_t *)USB_DeviceDescriptor;
00324           len = USB_DEVICE_DESC_SIZE;
00325           break;
00326         case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00327           pD = (uint8_t *)USB_ConfigDescriptor;
00328           for (n = 0; n != SetupPacket.wValue.WB.L; n++) {
00329             if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bLength != 0) {
00330               pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00331             }
00332           }
00333           if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bLength == 0) {
00334             return (FALSE);
00335           }
00336           EP0Data.pData = pD;
00337           len = ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00338           break;
00339         case USB_STRING_DESCRIPTOR_TYPE:
00340           pD = (uint8_t *)USB_StringDescriptor;
00341           for (n = 0; n != SetupPacket.wValue.WB.L; n++) {
00342             if (((USB_STRING_DESCRIPTOR *)pD)->bLength != 0) {
00343               pD += ((USB_STRING_DESCRIPTOR *)pD)->bLength;
00344             }
00345           }
00346           if (((USB_STRING_DESCRIPTOR *)pD)->bLength == 0) {
00347             return (FALSE);
00348           }
00349           EP0Data.pData = pD;
00350           len = ((USB_STRING_DESCRIPTOR *)EP0Data.pData)->bLength;
00351           break;
00352         default:
00353           return (FALSE);
00354       }
00355       break;
00356     case REQUEST_TO_INTERFACE:
00357       switch (SetupPacket.wValue.WB.H) {
00358 #if USB_HID
00359         case HID_HID_DESCRIPTOR_TYPE:
00360           if (SetupPacket.wIndex.WB.L != USB_HID_IF_NUM) {
00361             return (FALSE);    /* Only Single HID Interface is supported */
00362           }
00363           EP0Data.pData = (uint8_t *)USB_ConfigDescriptor + HID_DESC_OFFSET;
00364           len = HID_DESC_SIZE;
00365           break;
00366         case HID_REPORT_DESCRIPTOR_TYPE:
00367           if (SetupPacket.wIndex.WB.L != USB_HID_IF_NUM) {
00368             return (FALSE);    /* Only Single HID Interface is supported */
00369           }
00370           EP0Data.pData = (uint8_t *)HID_ReportDescriptor;
00371           len = HID_ReportDescSize;
00372           break;
00373         case HID_PHYSICAL_DESCRIPTOR_TYPE:
00374           return (FALSE);      /* HID Physical Descriptor is not supported */
00375 #endif
00376         default:
00377           return (FALSE);
00378       }
00379 //      break;
00380     default:
00381       return (FALSE);
00382   }
00383
00384   if (EP0Data.Count > len) {
00385     EP0Data.Count = len;
00386   }
00387
00388   return (TRUE);
00389 }
00390
00391
00392 /*
00393  *  Get Configuration USB Request
00394  *    Parameters:      None (global SetupPacket)
00395  *    Return Value:    TRUE - Success, FALSE - Error
00396  */
00397
00398 #if defined (  __IAR_SYSTEMS_ICC__  )
00399 inline uint32_t USB_ReqGetConfiguration (void) {
00400 #else
00401 __inline uint32_t USB_ReqGetConfiguration (void) {
00402 #endif
00403   switch (SetupPacket.bmRequestType.BM.Recipient) {
00404     case REQUEST_TO_DEVICE:
00405       EP0Data.pData = &USB_Configuration;
00406       break;
00407     default:
00408       return (FALSE);
00409   }
00410   return (TRUE);
00411 }
00412
00413
00414 /*
00415  *  Set Configuration USB Request
00416  *    Parameters:      None (global SetupPacket)
00417  *    Return Value:    TRUE - Success, FALSE - Error
00418  */
00419
00420 #if defined (  __IAR_SYSTEMS_ICC__  )
00421 inline uint32_t USB_ReqSetConfiguration (void) {
00422 #else
00423 __inline uint32_t USB_ReqSetConfiguration (void) {
00424 #endif
00425   USB_COMMON_DESCRIPTOR *pD;
00426   uint32_t alt = 0;
00427   uint32_t n, m;
00428   uint32_t tmp;
00429
00430   switch (SetupPacket.bmRequestType.BM.Recipient) {
00431     case REQUEST_TO_DEVICE:
00432
00433       if (SetupPacket.wValue.WB.L) {
00434         pD = (USB_COMMON_DESCRIPTOR *)USB_ConfigDescriptor;
00435         while (pD->bLength) {
00436           switch (pD->bDescriptorType) {
00437             case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00438               if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bConfigurationValue == SetupPacket.wValue.WB.L) {
00439                 USB_Configuration = SetupPacket.wValue.WB.L;
00440                 USB_NumInterfaces = ((USB_CONFIGURATION_DESCRIPTOR *)pD)->bNumInterfaces;
00441                 for (n = 0; n < USB_IF_NUM; n++) {
00442                   USB_AltSetting[n] = 0;
00443                 }
00444                 for (n = 1; n < 16; n++) {
00445                   if (USB_EndPointMask & (1 << n)) {
00446                     USB_DisableEP(n);
00447                   }
00448                   if (USB_EndPointMask & ((1 << 16) << n)) {
00449                     USB_DisableEP(n | 0x80);
00450                   }
00451                 }
00452                 USB_EndPointMask = 0x00010001;
00453                 USB_EndPointHalt = 0x00000000;
00454                 USB_EndPointStall= 0x00000000;
00455                 USB_Configure(TRUE);
00456                 if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bmAttributes & USB_CONFIG_POWERED_MASK) {
00457                   USB_DeviceStatus |=  USB_GETSTATUS_SELF_POWERED;
00458                 } else {
00459                   USB_DeviceStatus &= ~USB_GETSTATUS_SELF_POWERED;
00460                 }
00461               } else {
00462 //                (uint8_t *)pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00463                   tmp = (uint32_t)pD;
00464                   tmp += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00465                   pD = (USB_COMMON_DESCRIPTOR *)tmp;
00466                   continue;
00467               }
00468               break;
00469             case USB_INTERFACE_DESCRIPTOR_TYPE:
00470               alt = ((USB_INTERFACE_DESCRIPTOR *)pD)->bAlternateSetting;
00471               break;
00472             case USB_ENDPOINT_DESCRIPTOR_TYPE:
00473               if (alt == 0) {
00474                 n = ((USB_ENDPOINT_DESCRIPTOR *)pD)->bEndpointAddress & 0x8F;
00475                 m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00476                 USB_EndPointMask |= m;
00477                 USB_ConfigEP((USB_ENDPOINT_DESCRIPTOR *)pD);
00478                 USB_EnableEP(n);
00479                 USB_ResetEP(n);
00480               }
00481               break;
00482           }
00483 //          (uint8_t *)pD += pD->bLength;
00484                         tmp = (uint32_t)pD;
00485                         tmp += pD->bLength;
00486                         pD = (USB_COMMON_DESCRIPTOR *)tmp;
00487         }
00488       }
00489       else {
00490         USB_Configuration = 0;
00491         for (n = 1; n < 16; n++) {
00492           if (USB_EndPointMask & (1 << n)) {
00493             USB_DisableEP(n);
00494           }
00495           if (USB_EndPointMask & ((1 << 16) << n)) {
00496             USB_DisableEP(n | 0x80);
00497           }
00498         }
00499         USB_EndPointMask  = 0x00010001;
00500         USB_EndPointHalt  = 0x00000000;
00501         USB_EndPointStall = 0x00000000;
00502         USB_Configure(FALSE);
00503       }
00504
00505       if (USB_Configuration != SetupPacket.wValue.WB.L) {
00506         return (FALSE);
00507       }
00508       break;
00509     default:
00510       return (FALSE);
00511   }
00512   return (TRUE);
00513 }
00514
00515
00516 /*
00517  *  Get Interface USB Request
00518  *    Parameters:      None (global SetupPacket)
00519  *    Return Value:    TRUE - Success, FALSE - Error
00520  */
00521
00522 #if defined (  __IAR_SYSTEMS_ICC__  )
00523 inline uint32_t USB_ReqGetInterface (void) {
00524 #else
00525 __inline uint32_t USB_ReqGetInterface (void) {
00526 #endif
00527   switch (SetupPacket.bmRequestType.BM.Recipient) {
00528     case REQUEST_TO_INTERFACE:
00529       if ((USB_Configuration != 0) && (SetupPacket.wIndex.WB.L < USB_NumInterfaces)) {
00530         EP0Data.pData = USB_AltSetting + SetupPacket.wIndex.WB.L;
00531       } else {
00532         return (FALSE);
00533       }
00534       break;
00535     default:
00536       return (FALSE);
00537   }
00538   return (TRUE);
00539 }
00540
00541
00542 /*
00543  *  Set Interface USB Request
00544  *    Parameters:      None (global SetupPacket)
00545  *    Return Value:    TRUE - Success, FALSE - Error
00546  */
00547 #if defined (  __IAR_SYSTEMS_ICC__  )
00548 inline uint32_t USB_ReqSetInterface (void) {
00549 #else
00550 __inline uint32_t USB_ReqSetInterface (void) {
00551 #endif
00552   USB_COMMON_DESCRIPTOR *pD;
00553   uint32_t ifn = 0, alt = 0, old = 0, msk = 0;
00554   uint32_t n, m;
00555   uint32_t set;
00556   uint32_t tmp;
00557
00558   switch (SetupPacket.bmRequestType.BM.Recipient) {
00559     case REQUEST_TO_INTERFACE:
00560       if (USB_Configuration == 0) return (FALSE);
00561       set = FALSE;
00562       pD  = (USB_COMMON_DESCRIPTOR *)USB_ConfigDescriptor;
00563       while (pD->bLength) {
00564         switch (pD->bDescriptorType) {
00565           case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00566             if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bConfigurationValue != USB_Configuration) {
00567 //              (uint8_t *)pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00568                 tmp = (uint32_t)pD;
00569                 tmp += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00570                 pD = (USB_COMMON_DESCRIPTOR *)tmp;
00571
00572               continue;
00573             }
00574             break;
00575           case USB_INTERFACE_DESCRIPTOR_TYPE:
00576             ifn = ((USB_INTERFACE_DESCRIPTOR *)pD)->bInterfaceNumber;
00577             alt = ((USB_INTERFACE_DESCRIPTOR *)pD)->bAlternateSetting;
00578             msk = 0;
00579             if ((ifn == SetupPacket.wIndex.WB.L) && (alt == SetupPacket.wValue.WB.L)) {
00580               set = TRUE;
00581               old = USB_AltSetting[ifn];
00582               USB_AltSetting[ifn] = (uint8_t)alt;
00583             }
00584             break;
00585           case USB_ENDPOINT_DESCRIPTOR_TYPE:
00586             if (ifn == SetupPacket.wIndex.WB.L) {
00587               n = ((USB_ENDPOINT_DESCRIPTOR *)pD)->bEndpointAddress & 0x8F;
00588               m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00589               if (alt == SetupPacket.wValue.WB.L) {
00590                 USB_EndPointMask |=  m;
00591                 USB_EndPointHalt &= ~m;
00592                 USB_ConfigEP((USB_ENDPOINT_DESCRIPTOR *)pD);
00593                 USB_EnableEP(n);
00594                 USB_ResetEP(n);
00595                 msk |= m;
00596               }
00597               else if ((alt == old) && ((msk & m) == 0)) {
00598                 USB_EndPointMask &= ~m;
00599                 USB_EndPointHalt &= ~m;
00600                 USB_DisableEP(n);
00601               }
00602             }
00603            break;
00604         }
00605 //        (uint8_t *)pD += pD->bLength;
00606                         tmp = (uint32_t)pD;
00607                         tmp += pD->bLength;
00608                         pD = (USB_COMMON_DESCRIPTOR *)tmp;
00609       }
00610       break;
00611     default:
00612       return (FALSE);
00613   }
00614
00615   return (set);
00616 }
00617
00618
00619 /*
00620  *  USB Endpoint 0 Event Callback
00621  *    Parameters:      event
00622  *    Return Value:    none
00623  */
00624
00625 void USB_EndPoint0 (uint32_t event) {
00626
00627   switch (event) {
00628     case USB_EVT_SETUP:
00629       USB_SetupStage();
00630       USB_DirCtrlEP(SetupPacket.bmRequestType.BM.Dir);
00631       EP0Data.Count = SetupPacket.wLength;     /* Number of bytes to transfer */
00632       switch (SetupPacket.bmRequestType.BM.Type) {
00633
00634         case REQUEST_STANDARD:
00635           switch (SetupPacket.bRequest) {
00636             case USB_REQUEST_GET_STATUS:
00637               if (!USB_ReqGetStatus()) {
00638                 goto stall_i;
00639               }
00640               USB_DataInStage();
00641               break;
00642
00643             case USB_REQUEST_CLEAR_FEATURE:
00644               if (!USB_ReqSetClrFeature(0)) {
00645                 goto stall_i;
00646               }
00647               USB_StatusInStage();
00648 #if USB_FEATURE_EVENT
00649               USB_Feature_Event();
00650 #endif
00651               break;
00652
00653             case USB_REQUEST_SET_FEATURE:
00654               if (!USB_ReqSetClrFeature(1)) {
00655                 goto stall_i;
00656               }
00657               USB_StatusInStage();
00658 #if USB_FEATURE_EVENT
00659               USB_Feature_Event();
00660 #endif
00661               break;
00662
00663             case USB_REQUEST_SET_ADDRESS:
00664               if (!USB_ReqSetAddress()) {
00665                 goto stall_i;
00666               }
00667               USB_StatusInStage();
00668               break;
00669
00670             case USB_REQUEST_GET_DESCRIPTOR:
00671               if (!USB_ReqGetDescriptor()) {
00672                 goto stall_i;
00673               }
00674               USB_DataInStage();
00675               break;
00676
00677             case USB_REQUEST_SET_DESCRIPTOR:
00678 /*stall_o:*/  USB_SetStallEP(0x00);            /* not supported */
00679               EP0Data.Count = 0;
00680               break;
00681
00682             case USB_REQUEST_GET_CONFIGURATION:
00683               if (!USB_ReqGetConfiguration()) {
00684                 goto stall_i;
00685               }
00686               USB_DataInStage();
00687               break;
00688
00689             case USB_REQUEST_SET_CONFIGURATION:
00690               if (!USB_ReqSetConfiguration()) {
00691                 goto stall_i;
00692               }
00693               USB_StatusInStage();
00694 #if USB_CONFIGURE_EVENT
00695               USB_Configure_Event();
00696 #endif
00697               break;
00698
00699             case USB_REQUEST_GET_INTERFACE:
00700               if (!USB_ReqGetInterface()) {
00701                 goto stall_i;
00702               }
00703               USB_DataInStage();
00704               break;
00705
00706             case USB_REQUEST_SET_INTERFACE:
00707               if (!USB_ReqSetInterface()) {
00708                 goto stall_i;
00709               }
00710               USB_StatusInStage();
00711 #if USB_INTERFACE_EVENT
00712               USB_Interface_Event();
00713 #endif
00714               break;
00715
00716             default:
00717               goto stall_i;
00718           }
00719           break;  /* end case REQUEST_STANDARD */
00720
00721 #if USB_CLASS
00722         case REQUEST_CLASS:
00723           switch (SetupPacket.bmRequestType.BM.Recipient) {
00724
00725             case REQUEST_TO_DEVICE:
00726               goto stall_i;                                              /* not supported */
00727
00728             case REQUEST_TO_INTERFACE:
00729 #if USB_HID
00730               if (SetupPacket.wIndex.WB.L == USB_HID_IF_NUM) {           /* IF number correct? */
00731                 switch (SetupPacket.bRequest) {
00732                   case HID_REQUEST_GET_REPORT:
00733                     if (HID_GetReport()) {
00734                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00735                       USB_DataInStage();                                 /* send requested data */
00736                       goto setup_class_ok;
00737                     }
00738                     break;
00739                   case HID_REQUEST_SET_REPORT:
00740                     EP0Data.pData = EP0Buf;                              /* data to be received */
00741                     goto setup_class_ok;
00742                   case HID_REQUEST_GET_IDLE:
00743                     if (HID_GetIdle()) {
00744                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00745                       USB_DataInStage();                                 /* send requested data */
00746                       goto setup_class_ok;
00747                     }
00748                     break;
00749                   case HID_REQUEST_SET_IDLE:
00750                     if (HID_SetIdle()) {
00751                       USB_StatusInStage();                               /* send Acknowledge */
00752                       goto setup_class_ok;
00753                     }
00754                     break;
00755                   case HID_REQUEST_GET_PROTOCOL:
00756                     if (HID_GetProtocol()) {
00757                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00758                       USB_DataInStage();                                 /* send requested data */
00759                       goto setup_class_ok;
00760                     }
00761                     break;
00762                   case HID_REQUEST_SET_PROTOCOL:
00763                     if (HID_SetProtocol()) {
00764                       USB_StatusInStage();                               /* send Acknowledge */
00765                       goto setup_class_ok;
00766                     }
00767                     break;
00768                 }
00769               }
00770 #endif  /* USB_HID */
00771 #if USB_MSC
00772               if (SetupPacket.wIndex.WB.L == USB_MSC_IF_NUM) {           /* IF number correct? */
00773                 switch (SetupPacket.bRequest) {
00774                   case MSC_REQUEST_RESET:
00775                     if ((SetupPacket.wValue.W == 0) &&                   /* RESET with invalid parameters -> STALL */
00776                         (SetupPacket.wLength  == 0)) {
00777                       if (MSC_Reset()) {
00778                         USB_StatusInStage();
00779                         goto setup_class_ok;
00780                       }
00781                     }
00782                     break;
00783                   case MSC_REQUEST_GET_MAX_LUN:
00784                     if ((SetupPacket.wValue.W == 0) &&                   /* GET_MAX_LUN with invalid parameters -> STALL */
00785                         (SetupPacket.wLength  == 1)) {
00786                       if (MSC_GetMaxLUN()) {
00787                         EP0Data.pData = EP0Buf;
00788                         USB_DataInStage();
00789                         goto setup_class_ok;
00790                       }
00791                     }
00792                     break;
00793                 }
00794               }
00795 #endif  /* USB_MSC */
00796 #if USB_AUDIO
00797               if ((SetupPacket.wIndex.WB.L == USB_ADC_CIF_NUM)  ||       /* IF number correct? */
00798                   (SetupPacket.wIndex.WB.L == USB_ADC_SIF1_NUM) ||
00799                   (SetupPacket.wIndex.WB.L == USB_ADC_SIF2_NUM)) {
00800                 switch (SetupPacket.bRequest) {
00801                   case AUDIO_REQUEST_GET_CUR:
00802                   case AUDIO_REQUEST_GET_MIN:
00803                   case AUDIO_REQUEST_GET_MAX:
00804                   case AUDIO_REQUEST_GET_RES:
00805                     if (ADC_IF_GetRequest()) {
00806                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00807                       USB_DataInStage();                                 /* send requested data */
00808                       goto setup_class_ok;
00809                     }
00810                     break;
00811                   case AUDIO_REQUEST_SET_CUR:
00812 //                case AUDIO_REQUEST_SET_MIN:
00813 //                case AUDIO_REQUEST_SET_MAX:
00814 //                case AUDIO_REQUEST_SET_RES:
00815                     EP0Data.pData = EP0Buf;                              /* data to be received */
00816                     goto setup_class_ok;
00817                 }
00818               }
00819 #endif  /* USB_AUDIO */
00820 #if USB_CDC
00821               if ((SetupPacket.wIndex.WB.L == USB_CDC_CIF_NUM)  ||       /* IF number correct? */
00822                   (SetupPacket.wIndex.WB.L == USB_CDC_DIF_NUM)) {
00823                 switch (SetupPacket.bRequest) {
00824                   case CDC_SEND_ENCAPSULATED_COMMAND:
00825                     EP0Data.pData = EP0Buf;                              /* data to be received, see USB_EVT_OUT */
00826                     goto setup_class_ok;
00827                   case CDC_GET_ENCAPSULATED_RESPONSE:
00828                     if (CDC_GetEncapsulatedResponse()) {
00829                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00830                       USB_DataInStage();                                 /* send requested data */
00831                       goto setup_class_ok;
00832                     }
00833                     break;
00834                   case CDC_SET_COMM_FEATURE:
00835                     EP0Data.pData = EP0Buf;                              /* data to be received, see USB_EVT_OUT */
00836                     goto setup_class_ok;
00837                   case CDC_GET_COMM_FEATURE:
00838                     if (CDC_GetCommFeature(SetupPacket.wValue.W)) {
00839                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00840                       USB_DataInStage();                                 /* send requested data */
00841                       goto setup_class_ok;
00842                     }
00843                     break;
00844                   case CDC_CLEAR_COMM_FEATURE:
00845                     if (CDC_ClearCommFeature(SetupPacket.wValue.W)) {
00846                       USB_StatusInStage();                               /* send Acknowledge */
00847                       goto setup_class_ok;
00848                     }
00849                     break;
00850                   case CDC_SET_LINE_CODING:
00851                     EP0Data.pData = EP0Buf;                              /* data to be received, see USB_EVT_OUT */
00852                     goto setup_class_ok;
00853                   case CDC_GET_LINE_CODING:
00854                     if (CDC_GetLineCoding()) {
00855                       EP0Data.pData = EP0Buf;                            /* point to data to be sent */
00856                       USB_DataInStage();                                 /* send requested data */
00857                       goto setup_class_ok;
00858                     }
00859                     break;
00860                   case CDC_SET_CONTROL_LINE_STATE:
00861                     if (CDC_SetControlLineState(SetupPacket.wValue.W)) {
00862                       USB_StatusInStage();                               /* send Acknowledge */
00863                       goto setup_class_ok;
00864                     }
00865                     break;
00866                   case CDC_SEND_BREAK:
00867                     if (CDC_SendBreak(SetupPacket.wValue.W)) {
00868                       USB_StatusInStage();                               /* send Acknowledge */
00869                       goto setup_class_ok;
00870                     }
00871                     break;
00872                 }
00873               }
00874 #endif  /* USB_CDC */
00875               goto stall_i;                                              /* not supported */
00876               /* end case REQUEST_TO_INTERFACE */
00877
00878             case REQUEST_TO_ENDPOINT:
00879 #if USB_AUDIO
00880               switch (SetupPacket.bRequest) {
00881                 case AUDIO_REQUEST_GET_CUR:
00882                 case AUDIO_REQUEST_GET_MIN:
00883                 case AUDIO_REQUEST_GET_MAX:
00884                 case AUDIO_REQUEST_GET_RES:
00885                   if (ADC_EP_GetRequest()) {
00886                     EP0Data.pData = EP0Buf;                              /* point to data to be sent */
00887                     USB_DataInStage();                                   /* send requested data */
00888                     goto setup_class_ok;
00889                   }
00890                   break;
00891                 case AUDIO_REQUEST_SET_CUR:
00892 //              case AUDIO_REQUEST_SET_MIN:
00893 //              case AUDIO_REQUEST_SET_MAX:
00894 //              case AUDIO_REQUEST_SET_RES:
00895                   EP0Data.pData = EP0Buf;                                /* data to be received */
00896                   goto setup_class_ok;
00897               }
00898 #endif  /* USB_AUDIO */
00899               goto stall_i;
00900               /* end case REQUEST_TO_ENDPOINT */
00901
00902             default:
00903               goto stall_i;
00904           }
00905 setup_class_ok:                                                          /* request finished successfully */
00906           break;  /* end case REQUEST_CLASS */
00907 #endif  /* USB_CLASS */
00908
00909 #if USB_VENDOR
00910         case REQUEST_VENDOR:
00911           switch (SetupPacket.bmRequestType.BM.Recipient) {
00912
00913             case REQUEST_TO_DEVICE:
00914               if (!USB_ReqVendorDev(TRUE)) {
00915                 goto stall_i;                                            /* not supported */
00916               }
00917               break;
00918
00919             case REQUEST_TO_INTERFACE:
00920               if (!USB_ReqVendorIF(TRUE)) {
00921                 goto stall_i;                                            /* not supported */
00922               }
00923               break;
00924
00925             case REQUEST_TO_ENDPOINT:
00926               if (!USB_ReqVendorEP(TRUE)) {
00927                 goto stall_i;                                            /* not supported */
00928               }
00929               break;
00930
00931             default:
00932               goto stall_i;
00933           }
00934
00935           if (SetupPacket.wLength) {
00936             if (SetupPacket.bmRequestType.BM.Dir == REQUEST_DEVICE_TO_HOST) {
00937               USB_DataInStage();
00938             }
00939           } else {
00940             USB_StatusInStage();
00941           }
00942
00943           break;  /* end case REQUEST_VENDOR */
00944 #endif  /* USB_VENDOR */
00945
00946         default:
00947 stall_i:  USB_SetStallEP(0x80);
00948           EP0Data.Count = 0;
00949           break;
00950       }
00951       break;  /* end case USB_EVT_SETUP */
00952
00953     case USB_EVT_OUT:
00954       if (SetupPacket.bmRequestType.BM.Dir == REQUEST_HOST_TO_DEVICE) {
00955         if (EP0Data.Count) {                                             /* still data to receive ? */
00956           USB_DataOutStage();                                            /* receive data */
00957           if (EP0Data.Count == 0) {                                      /* data complete ? */
00958             switch (SetupPacket.bmRequestType.BM.Type) {
00959
00960               case REQUEST_STANDARD:
00961                 goto stall_i;                                            /* not supported */
00962
00963 #if (USB_CLASS)
00964               case REQUEST_CLASS:
00965                 switch (SetupPacket.bmRequestType.BM.Recipient) {
00966                   case REQUEST_TO_DEVICE:
00967                     goto stall_i;                                        /* not supported */
00968
00969                   case REQUEST_TO_INTERFACE:
00970 #if USB_HID
00971                     if (SetupPacket.wIndex.WB.L == USB_HID_IF_NUM) {     /* IF number correct? */
00972                       switch (SetupPacket.bRequest) {
00973                         case HID_REQUEST_SET_REPORT:
00974                           if (HID_SetReport()) {
00975                             USB_StatusInStage();                         /* send Acknowledge */
00976                             goto out_class_ok;
00977                           }
00978                           break;
00979                       }
00980                     }
00981 #endif  /* USB_HID */
00982 #if USB_AUDIO
00983                     if ((SetupPacket.wIndex.WB.L == USB_ADC_CIF_NUM)  || /* IF number correct? */
00984                         (SetupPacket.wIndex.WB.L == USB_ADC_SIF1_NUM) ||
00985                         (SetupPacket.wIndex.WB.L == USB_ADC_SIF2_NUM)) {
00986                       switch (SetupPacket.bRequest) {
00987                         case AUDIO_REQUEST_SET_CUR:
00988 //                      case AUDIO_REQUEST_SET_MIN:
00989 //                      case AUDIO_REQUEST_SET_MAX:
00990 //                      case AUDIO_REQUEST_SET_RES:
00991                           if (ADC_IF_SetRequest()) {
00992                             USB_StatusInStage();                         /* send Acknowledge */
00993                             goto out_class_ok;
00994                           }
00995                           break;
00996                       }
00997                     }
00998 #endif  /* USB_AUDIO */
00999 #if USB_CDC
01000                     if ((SetupPacket.wIndex.WB.L == USB_CDC_CIF_NUM)  || /* IF number correct? */
01001                         (SetupPacket.wIndex.WB.L == USB_CDC_DIF_NUM)) {
01002                       switch (SetupPacket.bRequest) {
01003                         case CDC_SEND_ENCAPSULATED_COMMAND:
01004                           if (CDC_SendEncapsulatedCommand()) {
01005                             USB_StatusInStage();                         /* send Acknowledge */
01006                             goto out_class_ok;
01007                           }
01008                           break;
01009                         case CDC_SET_COMM_FEATURE:
01010                           if (CDC_SetCommFeature(SetupPacket.wValue.W)) {
01011                             USB_StatusInStage();                         /* send Acknowledge */
01012                             goto out_class_ok;
01013                           }
01014                           break;
01015                         case CDC_SET_LINE_CODING:
01016                           if (CDC_SetLineCoding()) {
01017                             USB_StatusInStage();                         /* send Acknowledge */
01018                             goto out_class_ok;
01019                           }
01020                           break;
01021                       }
01022                     }
01023 #endif  /* USB_CDC */
01024                     goto stall_i;
01025                     /* end case REQUEST_TO_INTERFACE */
01026
01027                   case REQUEST_TO_ENDPOINT:
01028 #if USB_AUDIO
01029                     switch (SetupPacket.bRequest) {
01030                       case AUDIO_REQUEST_SET_CUR:
01031 //                    case AUDIO_REQUEST_SET_MIN:
01032 //                    case AUDIO_REQUEST_SET_MAX:
01033 //                    case AUDIO_REQUEST_SET_RES:
01034                         if (ADC_EP_SetRequest()) {
01035                           USB_StatusInStage();                           /* send Acknowledge */
01036                           goto out_class_ok;
01037                         }
01038                         break;
01039                     }
01040 #endif  /* USB_AUDIO */
01041                     goto stall_i;
01042                     /* end case REQUEST_TO_ENDPOINT */
01043
01044                   default:
01045                     goto stall_i;
01046                 }
01047 out_class_ok:                                                            /* request finished successfully */
01048                 break; /* end case REQUEST_CLASS */
01049 #endif  /* USB_CLASS */
01050
01051 #if USB_VENDOR
01052               case REQUEST_VENDOR:
01053                 switch (SetupPacket.bmRequestType.BM.Recipient) {
01054
01055                   case REQUEST_TO_DEVICE:
01056                     if (!USB_ReqVendorDev(FALSE)) {
01057                       goto stall_i;                                      /* not supported */
01058                     }
01059                     break;
01060
01061                   case REQUEST_TO_INTERFACE:
01062                     if (!USB_ReqVendorIF(FALSE)) {
01063                       goto stall_i;                                      /* not supported */
01064                     }
01065                     break;
01066
01067                   case REQUEST_TO_ENDPOINT:
01068                     if (!USB_ReqVendorEP(FALSE)) {
01069                       goto stall_i;                                      /* not supported */
01070                     }
01071                     break;
01072
01073                   default:
01074                     goto stall_i;
01075                 }
01076
01077                 USB_StatusInStage();
01078
01079                 break;  /* end case REQUEST_VENDOR */
01080 #endif  /* USB_VENDOR */
01081
01082               default:
01083                 goto stall_i;
01084             }
01085           }
01086         }
01087       } else {
01088         USB_StatusOutStage();                                            /* receive Acknowledge */
01089       }
01090       break;  /* end case USB_EVT_OUT */
01091
01092     case USB_EVT_IN :
01093       if (SetupPacket.bmRequestType.BM.Dir == REQUEST_DEVICE_TO_HOST) {
01094         USB_DataInStage();                                               /* send data */
01095       } else {
01096         if (USB_DeviceAddress & 0x80) {
01097           USB_DeviceAddress &= 0x7F;
01098           USB_SetAddress(USB_DeviceAddress);
01099         }
01100       }
01101       break;  /* end case USB_EVT_IN */
01102
01103     case USB_EVT_OUT_STALL:
01104       USB_ClrStallEP(0x00);
01105       break;
01106
01107     case USB_EVT_IN_STALL:
01108       USB_ClrStallEP(0x80);
01109       break;
01110
01111   }
01112 }
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbcore.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbcore.h
00005  * Purpose: USB Core Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC microcontroller devices only. Nothing else
00014  *      gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBCORE_H__
00020 #define __USBCORE_H__
00021
00022
00023 /* USB Endpoint Data Structure */
00024 typedef struct _USB_EP_DATA {
00025   uint8_t  *pData;
00026   uint16_t Count;
00027 } USB_EP_DATA;
00028
00029 /* USB Core Global Variables */
00030 extern uint16_t USB_DeviceStatus;
00031 extern uint8_t  USB_DeviceAddress;
00032 extern uint8_t  USB_Configuration;
00033 extern uint32_t USB_EndPointMask;
00034 extern uint32_t USB_EndPointHalt;
00035 extern uint32_t USB_EndPointStall;
00036 extern uint8_t  USB_AltSetting[USB_IF_NUM];
00037
00038 /* USB Endpoint 0 Buffer */
00039 extern uint8_t  EP0Buf[USB_MAX_PACKET0];
00040
00041 /* USB Endpoint 0 Data Info */
00042 extern USB_EP_DATA EP0Data;
00043
00044 /* USB Setup Packet */
00045 extern USB_SETUP_PACKET SetupPacket;
00046
00047 /* USB Core Functions */
00048 extern void USB_ResetCore (void);
00049
00050
00051
00052 #endif  /* __USBCORE_H__ */
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbdesc.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbdesc.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbdesc.c
00005  * Purpose: USB Descriptors
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC microcontroller devices only. Nothing else
00014  *      gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *----------------------------------------------------------------------------
00018  * History:
00019  *          V1.20 Changed string descriptor handling
00020  *          V1.00 Initial Version
00021  *---------------------------------------------------------------------------*/
00022 #include "lpc_types.h"
00023 #include "usb.h"
00024 #include "cdc.h"
00025 #include "usbcfg.h"
00026 #include "usbdesc.h"
00027
00028
00029 /* USB Standard Device Descriptor */
00030 const uint8_t USB_DeviceDescriptor[] = {
00031   USB_DEVICE_DESC_SIZE,              /* bLength */
00032   USB_DEVICE_DESCRIPTOR_TYPE,        /* bDescriptorType */
00033   WBVAL(0x0200), /* 2.0 */           /* bcdUSB */
00034   USB_DEVICE_CLASS_COMMUNICATIONS,   /* bDeviceClass CDC*/
00035   0x00,                              /* bDeviceSubClass */
00036   0x00,                              /* bDeviceProtocol */
00037   USB_MAX_PACKET0,                   /* bMaxPacketSize0 */
00038   WBVAL(0x1FC9),                     /* idVendor */
00039   WBVAL(0x2002),                     /* idProduct */
00040   WBVAL(0x0100), /* 1.00 */          /* bcdDevice */
00041   0x01,                              /* iManufacturer */
00042   0x02,                              /* iProduct */
00043   0x03,                              /* iSerialNumber */
00044   0x01                               /* bNumConfigurations: one possible configuration*/
00045 };
00046
00047 /* USB Configuration Descriptor */
00048 /*   All Descriptors (Configuration, Interface, Endpoint, Class, Vendor */
00049 const uint8_t USB_ConfigDescriptor[] = {
00050 /* Configuration 1 */
00051   USB_CONFIGUARTION_DESC_SIZE,       /* bLength */
00052   USB_CONFIGURATION_DESCRIPTOR_TYPE, /* bDescriptorType */
00053   WBVAL(                             /* wTotalLength */
00054     1*USB_CONFIGUARTION_DESC_SIZE +
00055     1*USB_INTERFACE_DESC_SIZE     +  /* communication interface */
00056     0x0013                        +  /* CDC functions */
00057     1*USB_ENDPOINT_DESC_SIZE      +  /* interrupt endpoint */
00058     1*USB_INTERFACE_DESC_SIZE     +  /* data interface */
00059     2*USB_ENDPOINT_DESC_SIZE         /* bulk endpoints */
00060       ),
00061   0x02,                              /* bNumInterfaces */
00062   0x01,                              /* bConfigurationValue: 0x01 is used to select this configuration */
00063   0x00,                              /* iConfiguration: no string to describe this configuration */
00064   USB_CONFIG_BUS_POWERED /*|*/       /* bmAttributes */
00065 /*USB_CONFIG_REMOTE_WAKEUP*/,
00066   USB_CONFIG_POWER_MA(100),          /* bMaxPower, device power consumption is 100 mA */
00067 /* Interface 0, Alternate Setting 0, Communication class interface descriptor */
00068   USB_INTERFACE_DESC_SIZE,           /* bLength */
00069   USB_INTERFACE_DESCRIPTOR_TYPE,     /* bDescriptorType */
00070   USB_CDC_CIF_NUM,                   /* bInterfaceNumber: Number of Interface */
00071   0x00,                              /* bAlternateSetting: Alternate setting */
00072   0x01,                              /* bNumEndpoints: One endpoint used */
00073   CDC_COMMUNICATION_INTERFACE_CLASS, /* bInterfaceClass: Communication Interface Class */
00074   CDC_ABSTRACT_CONTROL_MODEL,        /* bInterfaceSubClass: Abstract Control Model */
00075   0x00,                              /* bInterfaceProtocol: no protocol used */
00076   0x5E,                              /* iInterface: */
00077 /*Header Functional Descriptor*/
00078   0x05,                              /* bLength: Endpoint Descriptor size */
00079   CDC_CS_INTERFACE,                  /* bDescriptorType: CS_INTERFACE */
00080   CDC_HEADER,                        /* bDescriptorSubtype: Header Func Desc */
00081   WBVAL(CDC_V1_10), /* 1.10 */       /* bcdCDC */
00082 /*Call Management Functional Descriptor*/
00083   0x05,                              /* bFunctionLength */
00084   CDC_CS_INTERFACE,                  /* bDescriptorType: CS_INTERFACE */
00085   CDC_CALL_MANAGEMENT,               /* bDescriptorSubtype: Call Management Func Desc */
00086   0x01,                              /* bmCapabilities: device handles call management */
00087   0x01,                              /* bDataInterface: CDC data IF ID */
00088 /*Abstract Control Management Functional Descriptor*/
00089   0x04,                              /* bFunctionLength */
00090   CDC_CS_INTERFACE,                  /* bDescriptorType: CS_INTERFACE */
00091   CDC_ABSTRACT_CONTROL_MANAGEMENT,   /* bDescriptorSubtype: Abstract Control Management desc */
00092   0x02,                              /* bmCapabilities: SET_LINE_CODING, GET_LINE_CODING, SET_CONTROL_LINE_STATE supported */
00093 /*Union Functional Descriptor*/
00094   0x05,                              /* bFunctionLength */
00095   CDC_CS_INTERFACE,                  /* bDescriptorType: CS_INTERFACE */
00096   CDC_UNION,                         /* bDescriptorSubtype: Union func desc */
00097   USB_CDC_CIF_NUM,                   /* bMasterInterface: Communication class interface is master */
00098   USB_CDC_DIF_NUM,                   /* bSlaveInterface0: Data class interface is slave 0 */
00099 /*Endpoint 1 Descriptor*/            /* event notification (optional) */
00100   USB_ENDPOINT_DESC_SIZE,            /* bLength */
00101   USB_ENDPOINT_DESCRIPTOR_TYPE,      /* bDescriptorType */
00102   USB_ENDPOINT_IN(1),                /* bEndpointAddress */
00103   USB_ENDPOINT_TYPE_INTERRUPT,       /* bmAttributes */
00104   WBVAL(0x0010),                     /* wMaxPacketSize */
00105   0x02,          /* 2ms */           /* bInterval */
00106 /* Interface 1, Alternate Setting 0, Data class interface descriptor*/
00107   USB_INTERFACE_DESC_SIZE,           /* bLength */
00108   USB_INTERFACE_DESCRIPTOR_TYPE,     /* bDescriptorType */
00109   USB_CDC_DIF_NUM,                   /* bInterfaceNumber: Number of Interface */
00110   0x00,                              /* bAlternateSetting: no alternate setting */
00111   0x02,                              /* bNumEndpoints: two endpoints used */
00112   CDC_DATA_INTERFACE_CLASS,          /* bInterfaceClass: Data Interface Class */
00113   0x00,                              /* bInterfaceSubClass: no subclass available */
00114   0x00,                              /* bInterfaceProtocol: no protocol used */
00115   0x5E,                              /* iInterface: */
00116 /* Endpoint, EP2 Bulk Out */
00117   USB_ENDPOINT_DESC_SIZE,            /* bLength */
00118   USB_ENDPOINT_DESCRIPTOR_TYPE,      /* bDescriptorType */
00119   USB_ENDPOINT_OUT(2),               /* bEndpointAddress */
00120   USB_ENDPOINT_TYPE_BULK,            /* bmAttributes */
00121   WBVAL(USB_CDC_BUFSIZE),            /* wMaxPacketSize */
00122   0x00,                              /* bInterval: ignore for Bulk transfer */
00123 /* Endpoint, EP2 Bulk In */
00124   USB_ENDPOINT_DESC_SIZE,            /* bLength */
00125   USB_ENDPOINT_DESCRIPTOR_TYPE,      /* bDescriptorType */
00126   USB_ENDPOINT_IN(2),                /* bEndpointAddress */
00127   USB_ENDPOINT_TYPE_BULK,            /* bmAttributes */
00128   WBVAL(USB_CDC_BUFSIZE),            /* wMaxPacketSize */
00129   0x00,                              /* bInterval: ignore for Bulk transfer */
00130 /* Terminator */
00131   0                                  /* bLength */
00132 };
00133
00134
00135
00136
00137 /* USB String Descriptor (optional) */
00138 const uint8_t USB_StringDescriptor[] = {
00139 /* Index 0x00: LANGID Codes */
00140   0x04,                              /* bLength */
00141   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00142   WBVAL(0x0409), /* US English */    /* wLANGID */
00143 /* Index 0x01: Manufacturer */
00144   (13*2 + 2),                        /* bLength (13 Char + Type + lenght) */
00145   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00146   'N',0,
00147   'X',0,
00148   'P',0,
00149   ' ',0,
00150   'S',0,
00151   'E',0,
00152   'M',0,
00153   'I',0,
00154   'C',0,
00155   'O',0,
00156   'N',0,
00157   'D',0,
00158   ' ',0,
00159 /* Index 0x02: Product */
00160   (17*2 + 2),                        /* bLength ( 17 Char + Type + lenght) */
00161   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00162   'N',0,
00163   'X',0,
00164   'P',0,
00165   ' ',0,
00166   'L',0,
00167   'P',0,
00168   'C',0,
00169   '1',0,
00170   '7',0,
00171   'x',0,
00172   'x',0,
00173   ' ',0,
00174   'V',0,
00175   'C',0,
00176   'O',0,
00177   'M',0,
00178   ' ',0,
00179 /* Index 0x03: Serial Number */
00180   (12*2 + 2),                        /* bLength (12 Char + Type + lenght) */
00181   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00182   'D',0,
00183   'E',0,
00184   'M',0,
00185   'O',0,
00186   '0',0,
00187   '0',0,
00188   '0',0,
00189   '0',0,
00190   '0',0,
00191   '0',0,
00192   '0',0,
00193   '0',0,
00194 /* Index 0x04: Interface 0, Alternate Setting 0 */
00195   ( 4*2 + 2),                        /* bLength (4 Char + Type + lenght) */
00196   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00197   'V',0,
00198   'C',0,
00199   'O',0,
00200   'M',0,
00201 };
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbdesc.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbdesc.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbdesc.h
00005  * Purpose: USB Descriptors Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC microcontroller devices only. Nothing else
00014  *      gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBDESC_H__
00020 #define __USBDESC_H__
00021
00022
00023 #define WBVAL(x) (x & 0xFF),((x >> 8) & 0xFF)
00024
00025 #define USB_DEVICE_DESC_SIZE        (sizeof(USB_DEVICE_DESCRIPTOR))
00026 #define USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))
00027 #define USB_INTERFACE_DESC_SIZE     (sizeof(USB_INTERFACE_DESCRIPTOR))
00028 #define USB_ENDPOINT_DESC_SIZE      (sizeof(USB_ENDPOINT_DESCRIPTOR))
00029
00030 extern const uint8_t USB_DeviceDescriptor[];
00031 extern const uint8_t USB_ConfigDescriptor[];
00032 extern const uint8_t USB_StringDescriptor[];
00033
00034
00035 #endif  /* __USBDESC_H__ */
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbhw.c
00005  * Purpose: USB Hardware Layer Module for NXP's LPC17xx MCU
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *----------------------------------------------------------------------------
00018  * History:
00019  *          V1.20 Added USB_ClearEPBuf
00020  *          V1.00 Initial Version
00021  *----------------------------------------------------------------------------*/
00022 #include "LPC17xx.h"                        /* LPC17xx definitions */
00023 #include "usb.h"
00024 #include "usbcfg.h"
00025 #include "usbreg.h"
00026 #include "usbhw.h"
00027 #include "usbcore.h"
00028 #include "usbuser.h"
00029
00030 #if defined (  __CC_ARM__  )
00031 #pragma diag_suppress 1441
00032 #endif
00033
00034
00035 #define EP_MSK_CTRL 0x0001      /* Control Endpoint Logical Address Mask */
00036 #define EP_MSK_BULK 0xC924      /* Bulk Endpoint Logical Address Mask */
00037 #define EP_MSK_INT  0x4492      /* Interrupt Endpoint Logical Address Mask */
00038 #define EP_MSK_ISO  0x1248      /* Isochronous Endpoint Logical Address Mask */
00039
00040
00041 #if USB_DMA
00042
00043 #pragma arm section zidata = "USB_RAM"
00044 uint32_t UDCA[USB_EP_NUM];                     /* UDCA in USB RAM */
00045 uint32_t DD_NISO_Mem[4*DD_NISO_CNT];           /* Non-Iso DMA Descriptor Memory */
00046 uint32_t DD_ISO_Mem [5*DD_ISO_CNT];            /* Iso DMA Descriptor Memory */
00047 #pragma arm section zidata
00048 uint32_t udca[USB_EP_NUM];                     /* UDCA saved values */
00049
00050 uint32_t DDMemMap[2];                          /* DMA Descriptor Memory Usage */
00051
00052 #endif
00053
00054
00055 /*
00056  *  Get Endpoint Physical Address
00057  *    Parameters:      EPNum: Endpoint Number
00058  *                       EPNum.0..3: Address
00059  *                       EPNum.7:    Dir
00060  *    Return Value:    Endpoint Physical Address
00061  */
00062
00063 uint32_t EPAdr (uint32_t EPNum) {
00064   uint32_t val;
00065
00066   val = (EPNum & 0x0F) << 1;
00067   if (EPNum & 0x80) {
00068     val += 1;
00069   }
00070   return (val);
00071 }
00072
00073
00074 /*
00075  *  Write Command
00076  *    Parameters:      cmd:   Command
00077  *    Return Value:    None
00078  */
00079
00080 void WrCmd (uint32_t cmd) {
00081
00082   LPC_USB->USBDevIntClr = CCEMTY_INT;
00083   LPC_USB->USBCmdCode = cmd;
00084   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00085 }
00086
00087
00088 /*
00089  *  Write Command Data
00090  *    Parameters:      cmd:   Command
00091  *                     val:   Data
00092  *    Return Value:    None
00093  */
00094
00095 void WrCmdDat (uint32_t cmd, uint32_t val) {
00096
00097   LPC_USB->USBDevIntClr = CCEMTY_INT;
00098   LPC_USB->USBCmdCode = cmd;
00099   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00100   LPC_USB->USBDevIntClr = CCEMTY_INT;
00101   LPC_USB->USBCmdCode = val;
00102   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00103 }
00104
00105
00106 /*
00107  *  Write Command to Endpoint
00108  *    Parameters:      cmd:   Command
00109  *                     val:   Data
00110  *    Return Value:    None
00111  */
00112
00113 void WrCmdEP (uint32_t EPNum, uint32_t cmd){
00114
00115   LPC_USB->USBDevIntClr = CCEMTY_INT;
00116   LPC_USB->USBCmdCode = CMD_SEL_EP(EPAdr(EPNum));
00117   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00118   LPC_USB->USBDevIntClr = CCEMTY_INT;
00119   LPC_USB->USBCmdCode = cmd;
00120   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00121 }
00122
00123
00124 /*
00125  *  Read Command Data
00126  *    Parameters:      cmd:   Command
00127  *    Return Value:    Data Value
00128  */
00129
00130 uint32_t RdCmdDat (uint32_t cmd) {
00131
00132   LPC_USB->USBDevIntClr = CCEMTY_INT | CDFULL_INT;
00133   LPC_USB->USBCmdCode = cmd;
00134   while ((LPC_USB->USBDevIntSt & CDFULL_INT) == 0);
00135   return (LPC_USB->USBCmdData);
00136 }
00137
00138
00139 /*
00140  *  USB Initialize Function
00141  *   Called by the User to initialize USB
00142  *    Return Value:    None
00143  */
00144
00145 void USB_Init (void) {
00146
00147   LPC_PINCON->PINSEL1 &= ~((3<<26)|(3<<28));   /* P0.29 D+, P0.30 D- */
00148   LPC_PINCON->PINSEL1 |=  ((1<<26)|(1<<28));   /* PINSEL1 26.27, 28.29  = 01 */
00149
00150   LPC_PINCON->PINSEL3 &= ~((3<< 4)|(3<<28));   /* P1.18 GoodLink, P1.30 VBUS */
00151   LPC_PINCON->PINSEL3 |=  ((1<< 4)|(2<<28));   /* PINSEL3 4.5 = 01, 28.29 = 10 */
00152
00153   LPC_PINCON->PINSEL4 &= ~((3<<18)        );   /* P2.9 SoftConnect */
00154   LPC_PINCON->PINSEL4 |=  ((1<<18)        );   /* PINSEL4 18.19 = 01 */
00155
00156   LPC_SC->PCONP |= (1UL<<31);                /* USB PCLK -> enable USB Per.       */
00157
00158   LPC_USB->USBClkCtrl = 0x1A;                /* Dev, PortSel, AHB clock enable */
00159   while ((LPC_USB->USBClkSt & 0x1A) != 0x1A);
00160
00161   NVIC_EnableIRQ(USB_IRQn);               /* enable USB interrupt */
00162
00163   USB_Reset();
00164   USB_SetAddress(0);
00165 }
00166
00167
00168 /*
00169  *  USB Connect Function
00170  *   Called by the User to Connect/Disconnect USB
00171  *    Parameters:      con:   Connect/Disconnect
00172  *    Return Value:    None
00173  */
00174
00175 void USB_Connect (uint32_t con) {
00176   WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(con ? DEV_CON : 0));
00177 }
00178
00179
00180 /*
00181  *  USB Reset Function
00182  *   Called automatically on USB Reset
00183  *    Return Value:    None
00184  */
00185
00186 void USB_Reset (void) {
00187 #if USB_DMA
00188   uint32_t n;
00189 #endif
00190
00191   LPC_USB->USBEpInd = 0;
00192   LPC_USB->USBMaxPSize = USB_MAX_PACKET0;
00193   LPC_USB->USBEpInd = 1;
00194   LPC_USB->USBMaxPSize = USB_MAX_PACKET0;
00195   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00196
00197   LPC_USB->USBEpIntClr  = 0xFFFFFFFF;
00198   LPC_USB->USBEpIntEn   = 0xFFFFFFFF ^ USB_DMA_EP;
00199   LPC_USB->USBDevIntClr = 0xFFFFFFFF;
00200   LPC_USB->USBDevIntEn  = DEV_STAT_INT    | EP_SLOW_INT    |
00201                (USB_SOF_EVENT   ? FRAME_INT : 0) |
00202                (USB_ERROR_EVENT ? ERR_INT   : 0);
00203
00204 #if USB_DMA
00205   LPC_USB->USBUDCAH   = USB_RAM_ADR;
00206   LPC_USB->USBDMARClr = 0xFFFFFFFF;
00207   LPC_USB->USBEpDMADis  = 0xFFFFFFFF;
00208   LPC_USB->USBEpDMAEn   = USB_DMA_EP;
00209   LPC_USB->USBEoTIntClr = 0xFFFFFFFF;
00210   LPC_USB->USBNDDRIntClr = 0xFFFFFFFF;
00211   LPC_USB->USBSysErrIntClr = 0xFFFFFFFF;
00212   LPC_USB->USBDMAIntEn  = 0x00000007;
00213   DDMemMap[0] = 0x00000000;
00214   DDMemMap[1] = 0x00000000;
00215   for (n = 0; n < USB_EP_NUM; n++) {
00216     udca[n] = 0;
00217     UDCA[n] = 0;
00218   }
00219 #endif
00220 }
00221
00222
00223 /*
00224  *  USB Suspend Function
00225  *   Called automatically on USB Suspend
00226  *    Return Value:    None
00227  */
00228
00229 void USB_Suspend (void) {
00230   /* Performed by Hardware */
00231 }
00232
00233
00234 /*
00235  *  USB Resume Function
00236  *   Called automatically on USB Resume
00237  *    Return Value:    None
00238  */
00239
00240 void USB_Resume (void) {
00241   /* Performed by Hardware */
00242 }
00243
00244
00245 /*
00246  *  USB Remote Wakeup Function
00247  *   Called automatically on USB Remote Wakeup
00248  *    Return Value:    None
00249  */
00250
00251 void USB_WakeUp (void) {
00252
00253   if (USB_DeviceStatus & USB_GETSTATUS_REMOTE_WAKEUP) {
00254     WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(DEV_CON));
00255   }
00256 }
00257
00258
00259 /*
00260  *  USB Remote Wakeup Configuration Function
00261  *    Parameters:      cfg:   Enable/Disable
00262  *    Return Value:    None
00263  */
00264
00265 void USB_WakeUpCfg (uint32_t cfg) {
00266   /* Not needed */
00267 }
00268
00269
00270 /*
00271  *  USB Set Address Function
00272  *    Parameters:      adr:   USB Address
00273  *    Return Value:    None
00274  */
00275
00276 void USB_SetAddress (uint32_t adr) {
00277   WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /* Don't wait for next */
00278   WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /*  Setup Status Phase */
00279 }
00280
00281
00282 /*
00283  *  USB Configure Function
00284  *    Parameters:      cfg:   Configure/Deconfigure
00285  *    Return Value:    None
00286  */
00287
00288 void USB_Configure (uint32_t cfg) {
00289
00290   WrCmdDat(CMD_CFG_DEV, DAT_WR_BYTE(cfg ? CONF_DVICE : 0));
00291
00292   LPC_USB->USBReEp = 0x00000003;
00293   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00294   LPC_USB->USBDevIntClr = EP_RLZED_INT;
00295 }
00296
00297
00298 /*
00299  *  Configure USB Endpoint according to Descriptor
00300  *    Parameters:      pEPD:  Pointer to Endpoint Descriptor
00301  *    Return Value:    None
00302  */
00303
00304 void USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD) {
00305   uint32_t num;
00306
00307   num = EPAdr(pEPD->bEndpointAddress);
00308   LPC_USB->USBReEp |= (1 << num);
00309   LPC_USB->USBEpInd = num;
00310   LPC_USB->USBMaxPSize = pEPD->wMaxPacketSize;
00311   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00312   LPC_USB->USBDevIntClr = EP_RLZED_INT;
00313 }
00314
00315
00316 /*
00317  *  Set Direction for USB Control Endpoint
00318  *    Parameters:      dir:   Out (dir == 0), In (dir <> 0)
00319  *    Return Value:    None
00320  */
00321
00322 void USB_DirCtrlEP (uint32_t dir) {
00323   /* Not needed */
00324 }
00325
00326
00327 /*
00328  *  Enable USB Endpoint
00329  *    Parameters:      EPNum: Endpoint Number
00330  *                       EPNum.0..3: Address
00331  *                       EPNum.7:    Dir
00332  *    Return Value:    None
00333  */
00334
00335 void USB_EnableEP (uint32_t EPNum) {
00336   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00337 }
00338
00339
00340 /*
00341  *  Disable USB Endpoint
00342  *    Parameters:      EPNum: Endpoint Number
00343  *                       EPNum.0..3: Address
00344  *                       EPNum.7:    Dir
00345  *    Return Value:    None
00346  */
00347
00348 void USB_DisableEP (uint32_t EPNum) {
00349   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_DA));
00350 }
00351
00352
00353 /*
00354  *  Reset USB Endpoint
00355  *    Parameters:      EPNum: Endpoint Number
00356  *                       EPNum.0..3: Address
00357  *                       EPNum.7:    Dir
00358  *    Return Value:    None
00359  */
00360
00361 void USB_ResetEP (uint32_t EPNum) {
00362   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00363 }
00364
00365
00366 /*
00367  *  Set Stall for USB Endpoint
00368  *    Parameters:      EPNum: Endpoint Number
00369  *                       EPNum.0..3: Address
00370  *                       EPNum.7:    Dir
00371  *    Return Value:    None
00372  */
00373
00374 void USB_SetStallEP (uint32_t EPNum) {
00375   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_ST));
00376 }
00377
00378
00379 /*
00380  *  Clear Stall for USB Endpoint
00381  *    Parameters:      EPNum: Endpoint Number
00382  *                       EPNum.0..3: Address
00383  *                       EPNum.7:    Dir
00384  *    Return Value:    None
00385  */
00386
00387 void USB_ClrStallEP (uint32_t EPNum) {
00388   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00389 }
00390
00391
00392 /*
00393  *  Clear USB Endpoint Buffer
00394  *    Parameters:      EPNum: Endpoint Number
00395  *                       EPNum.0..3: Address
00396  *                       EPNum.7:    Dir
00397  *    Return Value:    None
00398  */
00399
00400 void USB_ClearEPBuf (uint32_t EPNum) {
00401   WrCmdEP(EPNum, CMD_CLR_BUF);
00402 }
00403
00404
00405 /*
00406  *  Read USB Endpoint Data
00407  *    Parameters:      EPNum: Endpoint Number
00408  *                       EPNum.0..3: Address
00409  *                       EPNum.7:    Dir
00410  *                     pData: Pointer to Data Buffer
00411  *    Return Value:    Number of bytes read
00412  */
00413
00414 uint32_t USB_ReadEP (uint32_t EPNum, uint8_t *pData) {
00415   uint32_t cnt, n;
00416
00417   LPC_USB->USBCtrl = ((EPNum & 0x0F) << 2) | CTRL_RD_EN;
00418
00419   do {
00420     cnt = LPC_USB->USBRxPLen;
00421   } while ((cnt & PKT_RDY) == 0);
00422   cnt &= PKT_LNGTH_MASK;
00423
00424   for (n = 0; n < (cnt + 3) / 4; n++) {
00425     *((__packed uint32_t *)pData) = LPC_USB->USBRxData;
00426     pData += 4;
00427   }
00428   LPC_USB->USBCtrl = 0;
00429
00430   if (((EP_MSK_ISO >> EPNum) & 1) == 0) {   /* Non-Isochronous Endpoint */
00431     WrCmdEP(EPNum, CMD_CLR_BUF);
00432   }
00433
00434   return (cnt);
00435 }
00436
00437
00438 /*
00439  *  Write USB Endpoint Data
00440  *    Parameters:      EPNum: Endpoint Number
00441  *                       EPNum.0..3: Address
00442  *                       EPNum.7:    Dir
00443  *                     pData: Pointer to Data Buffer
00444  *                     cnt:   Number of bytes to write
00445  *    Return Value:    Number of bytes written
00446  */
00447
00448 uint32_t USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt) {
00449   uint32_t n;
00450
00451   LPC_USB->USBCtrl = ((EPNum & 0x0F) << 2) | CTRL_WR_EN;
00452
00453   LPC_USB->USBTxPLen = cnt;
00454
00455   for (n = 0; n < (cnt + 3) / 4; n++) {
00456     LPC_USB->USBTxData = *((__packed uint32_t *)pData);
00457     pData += 4;
00458   }
00459   LPC_USB->USBCtrl = 0;
00460   WrCmdEP(EPNum, CMD_VALID_BUF);
00461   return (cnt);
00462 }
00463
00464 #if USB_DMA
00465
00466 /* DMA Descriptor Memory Layout */
00467 const uint32_t DDAdr[2] = { DD_NISO_ADR, DD_ISO_ADR };
00468 const uint32_t DDSz [2] = { 16,          20         };
00469
00470
00471 /*
00472  *  Setup USB DMA Transfer for selected Endpoint
00473  *    Parameters:      EPNum: Endpoint Number
00474  *                     pDD: Pointer to DMA Descriptor
00475  *    Return Value:    TRUE - Success, FALSE - Error
00476  */
00477
00478 uint32_t USB_DMA_Setup(uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD) {
00479   uint32_t num, ptr, nxt, iso, n;
00480
00481   iso = pDD->Cfg.Type.IsoEP;                /* Iso or Non-Iso Descriptor */
00482   num = EPAdr(EPNum);                       /* Endpoint's Physical Address */
00483
00484   ptr = 0;                                  /* Current Descriptor */
00485   nxt = udca[num];                          /* Initial Descriptor */
00486   while (nxt) {                             /* Go through Descriptor List */
00487     ptr = nxt;                              /* Current Descriptor */
00488     if (!pDD->Cfg.Type.Link) {              /* Check for Linked Descriptors */
00489       n = (ptr - DDAdr[iso]) / DDSz[iso];   /* Descriptor Index */
00490       DDMemMap[iso] &= ~(1 << n);           /* Unmark Memory Usage */
00491     }
00492     nxt = *((uint32_t *)ptr);                  /* Next Descriptor */
00493   }
00494
00495   for (n = 0; n < 32; n++) {                /* Search for available Memory */
00496     if ((DDMemMap[iso] & (1 << n)) == 0) {
00497       break;                                /* Memory found */
00498     }
00499   }
00500   if (n == 32) return (FALSE);              /* Memory not available */
00501
00502   DDMemMap[iso] |= 1 << n;                  /* Mark Memory Usage */
00503   nxt = DDAdr[iso] + n * DDSz[iso];         /* Next Descriptor */
00504
00505   if (ptr && pDD->Cfg.Type.Link) {
00506     *((uint32_t *)(ptr + 0))  = nxt;           /* Link in new Descriptor */
00507     *((uint32_t *)(ptr + 4)) |= 0x00000004;    /* Next DD is Valid */
00508   } else {
00509     udca[num] = nxt;                        /* Save new Descriptor */
00510     UDCA[num] = nxt;                        /* Update UDCA in USB */
00511   }
00512
00513   /* Fill in DMA Descriptor */
00514   *(((uint32_t *)nxt)++) =  0;                 /* Next DD Pointer */
00515   *(((uint32_t *)nxt)++) =  pDD->Cfg.Type.ATLE |
00516                        (pDD->Cfg.Type.IsoEP << 4) |
00517                        (pDD->MaxSize <<  5) |
00518                        (pDD->BufLen  << 16);
00519   *(((uint32_t *)nxt)++) =  pDD->BufAdr;
00520   *(((uint32_t *)nxt)++) =  pDD->Cfg.Type.LenPos << 8;
00521   if (iso) {
00522     *((uint32_t *)nxt) =  pDD->InfoAdr;
00523   }
00524
00525   return (TRUE); /* Success */
00526 }
00527
00528
00529 /*
00530  *  Enable USB DMA Endpoint
00531  *    Parameters:      EPNum: Endpoint Number
00532  *                       EPNum.0..3: Address
00533  *                       EPNum.7:    Dir
00534  *    Return Value:    None
00535  */
00536
00537 void USB_DMA_Enable (uint32_t EPNum) {
00538   LPC_USB->USBEpDMAEn = 1 << EPAdr(EPNum);
00539 }
00540
00541
00542 /*
00543  *  Disable USB DMA Endpoint
00544  *    Parameters:      EPNum: Endpoint Number
00545  *                       EPNum.0..3: Address
00546  *                       EPNum.7:    Dir
00547  *    Return Value:    None
00548  */
00549
00550 void USB_DMA_Disable (uint32_t EPNum) {
00551   LPC_USB->USBEpDMADis = 1 << EPAdr(EPNum);
00552 }
00553
00554
00555 /*
00556  *  Get USB DMA Endpoint Status
00557  *    Parameters:      EPNum: Endpoint Number
00558  *                       EPNum.0..3: Address
00559  *                       EPNum.7:    Dir
00560  *    Return Value:    DMA Status
00561  */
00562
00563 uint32_t USB_DMA_Status (uint32_t EPNum) {
00564   uint32_t ptr, val;
00565
00566   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00567   if (ptr == 0)
00568         return (USB_DMA_INVALID);
00569
00570   val = *((uint32_t *)(ptr + 3*4));            /* Status Information */
00571   switch ((val >> 1) & 0x0F) {
00572     case 0x00:                              /* Not serviced */
00573       return (USB_DMA_IDLE);
00574     case 0x01:                              /* Being serviced */
00575       return (USB_DMA_BUSY);
00576     case 0x02:                              /* Normal Completition */
00577       return (USB_DMA_DONE);
00578     case 0x03:                              /* Data Under Run */
00579       return (USB_DMA_UNDER_RUN);
00580     case 0x08:                              /* Data Over Run */
00581       return (USB_DMA_OVER_RUN);
00582     case 0x09:                              /* System Error */
00583       return (USB_DMA_ERROR);
00584   }
00585
00586   return (USB_DMA_UNKNOWN);
00587 }
00588
00589
00590 /*
00591  *  Get USB DMA Endpoint Current Buffer Address
00592  *    Parameters:      EPNum: Endpoint Number
00593  *                       EPNum.0..3: Address
00594  *                       EPNum.7:    Dir
00595  *    Return Value:    DMA Address (or -1 when DMA is Invalid)
00596  */
00597
00598 uint32_t USB_DMA_BufAdr (uint32_t EPNum) {
00599   uint32_t ptr, val;
00600
00601   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00602   if (ptr == 0)
00603   {
00604         return ((uint32_t)(-1));                /* DMA Invalid */
00605   }
00606
00607   val = *((uint32_t *)(ptr + 2*4));         /* Buffer Address */
00608   return (val);                             /* Current Address */
00609 }
00610
00611
00612 /*
00613  *  Get USB DMA Endpoint Current Buffer Count
00614  *   Number of transfered Bytes or Iso Packets
00615  *    Parameters:      EPNum: Endpoint Number
00616  *                       EPNum.0..3: Address
00617  *                       EPNum.7:    Dir
00618  *    Return Value:    DMA Count (or -1 when DMA is Invalid)
00619  */
00620
00621 uint32_t USB_DMA_BufCnt (uint32_t EPNum) {
00622   uint32_t ptr, val;
00623
00624   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00625   if (ptr == 0)
00626   {
00627         return ((uint32_t)(-1));                /* DMA Invalid */
00628   }
00629   val = *((uint32_t *)(ptr + 3*4));         /* Status Information */
00630   return (val >> 16);                       /* Current Count */
00631 }
00632
00633
00634 #endif /* USB_DMA */
00635
00636
00637 /*
00638  *  Get USB Last Frame Number
00639  *    Parameters:      None
00640  *    Return Value:    Frame Number
00641  */
00642
00643 uint32_t USB_GetFrame (void) {
00644   uint32_t val;
00645
00646   WrCmd(CMD_RD_FRAME);
00647   val = RdCmdDat(DAT_RD_FRAME);
00648   val = val | (RdCmdDat(DAT_RD_FRAME) << 8);
00649
00650   return (val);
00651 }
00652
00653
00654 /*
00655  *  USB Interrupt Service Routine
00656  */
00657
00658 void USB_IRQHandler (void) {
00659   uint32_t disr, val, n, m;
00660   uint32_t episr, episrCur;
00661
00662   disr = LPC_USB->USBDevIntSt;       /* Device Interrupt Status */
00663
00664   /* Device Status Interrupt (Reset, Connect change, Suspend/Resume) */
00665   if (disr & DEV_STAT_INT) {
00666     LPC_USB->USBDevIntClr = DEV_STAT_INT;
00667     WrCmd(CMD_GET_DEV_STAT);
00668     val = RdCmdDat(DAT_GET_DEV_STAT);       /* Device Status */
00669     if (val & DEV_RST) {                    /* Reset */
00670       USB_Reset();
00671 #if   USB_RESET_EVENT
00672       USB_Reset_Event();
00673 #endif
00674     }
00675     if (val & DEV_CON_CH) {                 /* Connect change */
00676 #if   USB_POWER_EVENT
00677       USB_Power_Event(val & DEV_CON);
00678 #endif
00679     }
00680     if (val & DEV_SUS_CH) {                 /* Suspend/Resume */
00681       if (val & DEV_SUS) {                  /* Suspend */
00682         USB_Suspend();
00683 #if     USB_SUSPEND_EVENT
00684         USB_Suspend_Event();
00685 #endif
00686       } else {                              /* Resume */
00687         USB_Resume();
00688 #if     USB_RESUME_EVENT
00689         USB_Resume_Event();
00690 #endif
00691       }
00692     }
00693     goto isr_end;
00694   }
00695
00696 #if USB_SOF_EVENT
00697   /* Start of Frame Interrupt */
00698   if (disr & FRAME_INT) {
00699         LPC_USB->USBDevIntClr = FRAME_INT;
00700     USB_SOF_Event();
00701   }
00702 #endif
00703
00704 #if USB_ERROR_EVENT
00705   /* Error Interrupt */
00706   if (disr & ERR_INT) {
00707         LPC_USB->USBDevIntClr = ERR_INT;
00708     WrCmd(CMD_RD_ERR_STAT);
00709     val = RdCmdDat(DAT_RD_ERR_STAT);
00710     USB_Error_Event(val);
00711   }
00712 #endif
00713
00714   /* Endpoint's Slow Interrupt */
00715   if (disr & EP_SLOW_INT) {
00716     episrCur = 0;
00717     episr    = LPC_USB->USBEpIntSt;
00718     for (n = 0; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00719       if (episr == episrCur) break;         /* break if all EP interrupts handled */
00720       if (episr & (1 << n)) {
00721         episrCur |= (1 << n);
00722         m = n >> 1;
00723
00724         LPC_USB->USBEpIntClr = (1 << n);
00725         while ((LPC_USB->USBDevIntSt & CDFULL_INT) == 0);
00726         val = LPC_USB->USBCmdData;
00727
00728         if ((n & 1) == 0) {                 /* OUT Endpoint */
00729           if (n == 0) {                     /* Control OUT Endpoint */
00730             if (val & EP_SEL_STP) {         /* Setup Packet */
00731               if (USB_P_EP[0]) {
00732                 USB_P_EP[0](USB_EVT_SETUP);
00733                 continue;
00734               }
00735             }
00736           }
00737           if (USB_P_EP[m]) {
00738             USB_P_EP[m](USB_EVT_OUT);
00739           }
00740         } else {                            /* IN Endpoint */
00741           if (USB_P_EP[m]) {
00742             USB_P_EP[m](USB_EVT_IN);
00743           }
00744         }
00745       }
00746     }
00747     LPC_USB->USBDevIntClr = EP_SLOW_INT;
00748   }
00749
00750 #if USB_DMA
00751
00752   if (LPC_USB->USBDMAIntSt & 0x00000001) {          /* End of Transfer Interrupt */
00753     val = LPC_USB->USBEoTIntSt;
00754     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00755       if (val & (1 << n)) {
00756         m = n >> 1;
00757         if ((n & 1) == 0) {                 /* OUT Endpoint */
00758           if (USB_P_EP[m]) {
00759             USB_P_EP[m](USB_EVT_OUT_DMA_EOT);
00760           }
00761         } else {                            /* IN Endpoint */
00762           if (USB_P_EP[m]) {
00763             USB_P_EP[m](USB_EVT_IN_DMA_EOT);
00764           }
00765         }
00766       }
00767     }
00768     LPC_USB->USBEoTIntClr = val;
00769   }
00770
00771   if (LPC_USB->USBDMAIntSt & 0x00000002) {          /* New DD Request Interrupt */
00772     val = LPC_USB->USBNDDRIntSt;
00773     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00774       if (val & (1 << n)) {
00775         m = n >> 1;
00776         if ((n & 1) == 0) {                 /* OUT Endpoint */
00777           if (USB_P_EP[m]) {
00778             USB_P_EP[m](USB_EVT_OUT_DMA_NDR);
00779           }
00780         } else {                            /* IN Endpoint */
00781           if (USB_P_EP[m]) {
00782             USB_P_EP[m](USB_EVT_IN_DMA_NDR);
00783           }
00784         }
00785       }
00786     }
00787     LPC_USB->USBNDDRIntClr = val;
00788   }
00789
00790   if (LPC_USB->USBDMAIntSt & 0x00000004) {          /* System Error Interrupt */
00791     val = LPC_USB->USBSysErrIntSt;
00792     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00793       if (val & (1 << n)) {
00794         m = n >> 1;
00795         if ((n & 1) == 0) {                 /* OUT Endpoint */
00796           if (USB_P_EP[m]) {
00797             USB_P_EP[m](USB_EVT_OUT_DMA_ERR);
00798           }
00799         } else {                            /* IN Endpoint */
00800           if (USB_P_EP[m]) {
00801             USB_P_EP[m](USB_EVT_IN_DMA_ERR);
00802           }
00803         }
00804       }
00805     }
00806     LPC_USB->USBSysErrIntClr = val;
00807   }
00808
00809 #endif /* USB_DMA */
00810
00811 isr_end:
00812   return;
00813 }
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbhw.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbhw.h
00005  * Purpose: USB Hardware Layer Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *----------------------------------------------------------------------------
00018  * History:
00019  *          V1.20 Added USB_ClearEPBuf
00020  *          V1.00 Initial Version
00021  *----------------------------------------------------------------------------*/
00022
00023 #ifndef __USBHW_H__
00024 #define __USBHW_H__
00025 #include "lpc_types.h"
00026
00027 /* USB RAM Definitions */
00028 #define USB_RAM_ADR     0x20080000  /* USB RAM Start Address */
00029 #define USB_RAM_SZ      0x00004000  /* USB RAM Size (4kB) */
00030
00031 /* DMA Endpoint Descriptors */
00032 #define DD_NISO_CNT             16  /* Non-Iso EP DMA Descr. Count (max. 32) */
00033 #define DD_ISO_CNT               8  /* Iso EP DMA Descriptor Count (max. 32) */
00034 #define DD_NISO_SZ    (DD_NISO_CNT * 16)    /* Non-Iso DMA Descr. Size */
00035 #define DD_ISO_SZ     (DD_ISO_CNT  * 20)    /* Iso DMA Descriptor Size */
00036 #define DD_NISO_ADR   (USB_RAM_ADR + 128)   /* Non-Iso DMA Descr. Address */
00037 #define DD_ISO_ADR    (DD_NISO_ADR + DD_NISO_SZ) /* Iso DMA Descr. Address */
00038 #define DD_SZ                 (128 + DD_NISO_SZ + DD_ISO_SZ) /* Descr. Size */
00039
00040 /* DMA Buffer Memory Definitions */
00041 #define DMA_BUF_ADR   (USB_RAM_ADR + DD_SZ) /* DMA Buffer Start Address */
00042 #define DMA_BUF_SZ    (USB_RAM_SZ  - DD_SZ) /* DMA Buffer Size */
00043
00044 /* USB Error Codes */
00045 #define USB_ERR_PID         0x0001  /* PID Error */
00046 #define USB_ERR_UEPKT       0x0002  /* Unexpected Packet */
00047 #define USB_ERR_DCRC        0x0004  /* Data CRC Error */
00048 #define USB_ERR_TIMOUT      0x0008  /* Bus Time-out Error */
00049 #define USB_ERR_EOP         0x0010  /* End of Packet Error */
00050 #define USB_ERR_B_OVRN      0x0020  /* Buffer Overrun */
00051 #define USB_ERR_BTSTF       0x0040  /* Bit Stuff Error */
00052 #define USB_ERR_TGL         0x0080  /* Toggle Bit Error */
00053
00054 /* USB DMA Status Codes */
00055 #define USB_DMA_INVALID     0x0000  /* DMA Invalid - Not Configured */
00056 #define USB_DMA_IDLE        0x0001  /* DMA Idle - Waiting for Trigger */
00057 #define USB_DMA_BUSY        0x0002  /* DMA Busy - Transfer in progress */
00058 #define USB_DMA_DONE        0x0003  /* DMA Transfer Done (no Errors)*/
00059 #define USB_DMA_OVER_RUN    0x0004  /* Data Over Run */
00060 #define USB_DMA_UNDER_RUN   0x0005  /* Data Under Run (Short Packet) */
00061 #define USB_DMA_ERROR       0x0006  /* Error */
00062 #define USB_DMA_UNKNOWN     0xFFFF  /* Unknown State */
00063
00064 /* USB DMA Descriptor */
00065 typedef struct _USB_DMA_DESCRIPTOR {
00066   uint32_t BufAdr;                     /* DMA Buffer Address */
00067   uint16_t  BufLen;                     /* DMA Buffer Length */
00068   uint16_t  MaxSize;                    /* Maximum Packet Size */
00069   uint32_t InfoAdr;                    /* Packet Info Memory Address */
00070   union {                           /* DMA Configuration */
00071     struct {
00072       uint32_t Link   : 1;             /* Link to existing Descriptors */
00073       uint32_t IsoEP  : 1;             /* Isonchronous Endpoint */
00074       uint32_t ATLE   : 1;             /* ATLE (Auto Transfer Length Extract) */
00075       uint32_t Rsrvd  : 5;             /* Reserved */
00076       uint32_t LenPos : 8;             /* Length Position (ATLE) */
00077     } Type;
00078     uint32_t Val;
00079   } Cfg;
00080 } USB_DMA_DESCRIPTOR;
00081
00082 /* USB Hardware Functions */
00083 extern void  USB_Init       (void);
00084 extern void  USB_Connect    (uint32_t  con);
00085 extern void  USB_Reset      (void);
00086 extern void  USB_Suspend    (void);
00087 extern void  USB_Resume     (void);
00088 extern void  USB_WakeUp     (void);
00089 extern void  USB_WakeUpCfg  (uint32_t  cfg);
00090 extern void  USB_SetAddress (uint32_t adr);
00091 extern void  USB_Configure  (uint32_t  cfg);
00092 extern void  USB_ConfigEP   (USB_ENDPOINT_DESCRIPTOR *pEPD);
00093 extern void  USB_DirCtrlEP  (uint32_t dir);
00094 extern void  USB_EnableEP   (uint32_t EPNum);
00095 extern void  USB_DisableEP  (uint32_t EPNum);
00096 extern void  USB_ResetEP    (uint32_t EPNum);
00097 extern void  USB_SetStallEP (uint32_t EPNum);
00098 extern void  USB_ClrStallEP (uint32_t EPNum);
00099 extern void USB_ClearEPBuf  (uint32_t  EPNum);
00100 extern uint32_t USB_ReadEP     (uint32_t EPNum, uint8_t *pData);
00101 extern uint32_t USB_WriteEP    (uint32_t EPNum, uint8_t *pData, uint32_t cnt);
00102 extern uint32_t  USB_DMA_Setup  (uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD);
00103 extern void  USB_DMA_Enable (uint32_t EPNum);
00104 extern void  USB_DMA_Disable(uint32_t EPNum);
00105 extern uint32_t USB_DMA_Status (uint32_t EPNum);
00106 extern uint32_t USB_DMA_BufAdr (uint32_t EPNum);
00107 extern uint32_t USB_DMA_BufCnt (uint32_t EPNum);
00108 extern uint32_t USB_GetFrame   (void);
00109 extern void  USB_IRQHandler (void);
00110
00111
00112 #endif  /* __USBHW_H__ */
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbreg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbreg.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbreg.h
00005  * Purpose: USB Hardware Layer Definitions for NXP LPC Family MCUs
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBREG_H
00020 #define __USBREG_H
00021
00022 /* Device Interrupt Bit Definitions */
00023 #define FRAME_INT           0x00000001
00024 #define EP_FAST_INT         0x00000002
00025 #define EP_SLOW_INT         0x00000004
00026 #define DEV_STAT_INT        0x00000008
00027 #define CCEMTY_INT          0x00000010
00028 #define CDFULL_INT          0x00000020
00029 #define RxENDPKT_INT        0x00000040
00030 #define TxENDPKT_INT        0x00000080
00031 #define EP_RLZED_INT        0x00000100
00032 #define ERR_INT             0x00000200
00033
00034 /* Rx & Tx Packet Length Definitions */
00035 #define PKT_LNGTH_MASK      0x000003FF
00036 #define PKT_DV              0x00000400
00037 #define PKT_RDY             0x00000800
00038
00039 /* USB Control Definitions */
00040 #define CTRL_RD_EN          0x00000001
00041 #define CTRL_WR_EN          0x00000002
00042
00043 /* Command Codes */
00044 #define CMD_SET_ADDR        0x00D00500
00045 #define CMD_CFG_DEV         0x00D80500
00046 #define CMD_SET_MODE        0x00F30500
00047 #define CMD_RD_FRAME        0x00F50500
00048 #define DAT_RD_FRAME        0x00F50200
00049 #define CMD_RD_TEST         0x00FD0500
00050 #define DAT_RD_TEST         0x00FD0200
00051 #define CMD_SET_DEV_STAT    0x00FE0500
00052 #define CMD_GET_DEV_STAT    0x00FE0500
00053 #define DAT_GET_DEV_STAT    0x00FE0200
00054 #define CMD_GET_ERR_CODE    0x00FF0500
00055 #define DAT_GET_ERR_CODE    0x00FF0200
00056 #define CMD_RD_ERR_STAT     0x00FB0500
00057 #define DAT_RD_ERR_STAT     0x00FB0200
00058 #define DAT_WR_BYTE(x)     (0x00000100 | ((x) << 16))
00059 #define CMD_SEL_EP(x)      (0x00000500 | ((x) << 16))
00060 #define DAT_SEL_EP(x)      (0x00000200 | ((x) << 16))
00061 #define CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16))
00062 #define DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16))
00063 #define CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16))
00064 #define CMD_CLR_BUF         0x00F20500
00065 #define DAT_CLR_BUF         0x00F20200
00066 #define CMD_VALID_BUF       0x00FA0500
00067
00068 /* Device Address Register Definitions */
00069 #define DEV_ADDR_MASK       0x7F
00070 #define DEV_EN              0x80
00071
00072 /* Device Configure Register Definitions */
00073 #define CONF_DVICE          0x01
00074
00075 /* Device Mode Register Definitions */
00076 #define AP_CLK              0x01
00077 #define INAK_CI             0x02
00078 #define INAK_CO             0x04
00079 #define INAK_II             0x08
00080 #define INAK_IO             0x10
00081 #define INAK_BI             0x20
00082 #define INAK_BO             0x40
00083
00084 /* Device Status Register Definitions */
00085 #define DEV_CON             0x01
00086 #define DEV_CON_CH          0x02
00087 #define DEV_SUS             0x04
00088 #define DEV_SUS_CH          0x08
00089 #define DEV_RST             0x10
00090
00091 /* Error Code Register Definitions */
00092 #define ERR_EC_MASK         0x0F
00093 #define ERR_EA              0x10
00094
00095 /* Error Status Register Definitions */
00096 #define ERR_PID             0x01
00097 #define ERR_UEPKT           0x02
00098 #define ERR_DCRC            0x04
00099 #define ERR_TIMOUT          0x08
00100 #define ERR_EOP             0x10
00101 #define ERR_B_OVRN          0x20
00102 #define ERR_BTSTF           0x40
00103 #define ERR_TGL             0x80
00104
00105 /* Endpoint Select Register Definitions */
00106 #define EP_SEL_F            0x01
00107 #define EP_SEL_ST           0x02
00108 #define EP_SEL_STP          0x04
00109 #define EP_SEL_PO           0x08
00110 #define EP_SEL_EPN          0x10
00111 #define EP_SEL_B_1_FULL     0x20
00112 #define EP_SEL_B_2_FULL     0x40
00113
00114 /* Endpoint Status Register Definitions */
00115 #define EP_STAT_ST          0x01
00116 #define EP_STAT_DA          0x20
00117 #define EP_STAT_RF_MO       0x40
00118 #define EP_STAT_CND_ST      0x80
00119
00120 /* Clear Buffer Register Definitions */
00121 #define CLR_BUF_PO          0x01
00122
00123
00124 /* DMA Interrupt Bit Definitions */
00125 #define EOT_INT             0x01
00126 #define NDD_REQ_INT         0x02
00127 #define SYS_ERR_INT         0x04
00128
00129
00130 #endif  /* __USBREG_H */
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbuser.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbuser.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbuser.c
00005  * Purpose: USB Custom User Module
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018 #include "lpc_types.h"
00019
00020 #include "usb.h"
00021 #include "usbcfg.h"
00022 #include "usbhw.h"
00023 #include "usbcore.h"
00024 #include "usbuser.h"
00025 #include "cdcuser.h"
00026
00027
00028 /*
00029  *  USB Power Event Callback
00030  *   Called automatically on USB Power Event
00031  *    Parameter:       power: On(TRUE)/Off(FALSE)
00032  */
00033
00034 #if USB_POWER_EVENT
00035 void USB_Power_Event (uint32_t  power) {
00036 }
00037 #endif
00038
00039
00040 /*
00041  *  USB Reset Event Callback
00042  *   Called automatically on USB Reset Event
00043  */
00044
00045 #if USB_RESET_EVENT
00046 void USB_Reset_Event (void) {
00047   USB_ResetCore();
00048 }
00049 #endif
00050
00051
00052 /*
00053  *  USB Suspend Event Callback
00054  *   Called automatically on USB Suspend Event
00055  */
00056
00057 #if USB_SUSPEND_EVENT
00058 void USB_Suspend_Event (void) {
00059 }
00060 #endif
00061
00062
00063 /*
00064  *  USB Resume Event Callback
00065  *   Called automatically on USB Resume Event
00066  */
00067
00068 #if USB_RESUME_EVENT
00069 void USB_Resume_Event (void) {
00070 }
00071 #endif
00072
00073
00074 /*
00075  *  USB Remote Wakeup Event Callback
00076  *   Called automatically on USB Remote Wakeup Event
00077  */
00078
00079 #if USB_WAKEUP_EVENT
00080 void USB_WakeUp_Event (void) {
00081 }
00082 #endif
00083
00084
00085 /*
00086  *  USB Start of Frame Event Callback
00087  *   Called automatically on USB Start of Frame Event
00088  */
00089
00090 #if USB_SOF_EVENT
00091 void USB_SOF_Event (void) {
00092 }
00093 #endif
00094
00095
00096 /*
00097  *  USB Error Event Callback
00098  *   Called automatically on USB Error Event
00099  *    Parameter:       error: Error Code
00100  */
00101
00102 #if USB_ERROR_EVENT
00103 void USB_Error_Event (uint32_t error) {
00104 }
00105 #endif
00106
00107
00108 /*
00109  *  USB Set Configuration Event Callback
00110  *   Called automatically on USB Set Configuration Request
00111  */
00112
00113 #if USB_CONFIGURE_EVENT
00114 void USB_Configure_Event (void) {
00115
00116   if (USB_Configuration) {                  /* Check if USB is configured */
00117     /* add your code here */
00118   }
00119 }
00120 #endif
00121
00122
00123 /*
00124  *  USB Set Interface Event Callback
00125  *   Called automatically on USB Set Interface Request
00126  */
00127
00128 #if USB_INTERFACE_EVENT
00129 void USB_Interface_Event (void) {
00130 }
00131 #endif
00132
00133
00134 /*
00135  *  USB Set/Clear Feature Event Callback
00136  *   Called automatically on USB Set/Clear Feature Request
00137  */
00138
00139 #if USB_FEATURE_EVENT
00140 void USB_Feature_Event (void) {
00141 }
00142 #endif
00143
00144
00145 #define P_EP(n) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)
00146
00147 /* USB Endpoint Events Callback Pointers */
00148 void (* const USB_P_EP[16]) (uint32_t event) = {
00149   P_EP(0),
00150   P_EP(1),
00151   P_EP(2),
00152   P_EP(3),
00153   P_EP(4),
00154   P_EP(5),
00155   P_EP(6),
00156   P_EP(7),
00157   P_EP(8),
00158   P_EP(9),
00159   P_EP(10),
00160   P_EP(11),
00161   P_EP(12),
00162   P_EP(13),
00163   P_EP(14),
00164   P_EP(15),
00165 };
00166
00167
00168 /*
00169  *  USB Endpoint 1 Event Callback
00170  *   Called automatically on USB Endpoint 1 Event
00171  *    Parameter:       event
00172  */
00173
00174 void USB_EndPoint1 (uint32_t event) {
00175   uint16_t temp;
00176   static uint16_t serialState;
00177
00178   switch (event) {
00179     case USB_EVT_IN:
00180       temp = CDC_GetSerialState();
00181       if (serialState != temp) {
00182          serialState = temp;
00183          CDC_NotificationIn();            /* send SERIAL_STATE notification */
00184       }
00185       break;
00186   }
00187 }
00188
00189
00190 /*
00191  *  USB Endpoint 2 Event Callback
00192  *   Called automatically on USB Endpoint 2 Event
00193  *    Parameter:       event
00194  */
00195
00196 void USB_EndPoint2 (uint32_t event) {
00197
00198   switch (event) {
00199     case USB_EVT_OUT:
00200       CDC_BulkOut ();                /* data received from Host */
00201       break;
00202     case USB_EVT_IN:
00203       CDC_BulkIn ();                 /* data expected from Host */
00204       break;
00205   }
00206 }
00207
00208
00209 /*
00210  *  USB Endpoint 3 Event Callback
00211  *   Called automatically on USB Endpoint 3 Event
00212  *    Parameter:       event
00213  */
00214
00215 void USB_EndPoint3 (uint32_t event) {
00216 }
00217
00218
00219 /*
00220  *  USB Endpoint 4 Event Callback
00221  *   Called automatically on USB Endpoint 4 Event
00222  *    Parameter:       event
00223  */
00224
00225 void USB_EndPoint4 (uint32_t event) {
00226 }
00227
00228
00229 /*
00230  *  USB Endpoint 5 Event Callback
00231  *   Called automatically on USB Endpoint 5 Event
00232  *    Parameter:       event
00233  */
00234
00235 void USB_EndPoint5 (uint32_t event) {
00236 }
00237
00238
00239 /*
00240  *  USB Endpoint 6 Event Callback
00241  *   Called automatically on USB Endpoint 6 Event
00242  *    Parameter:       event
00243  */
00244
00245 void USB_EndPoint6 (uint32_t event) {
00246 }
00247
00248
00249 /*
00250  *  USB Endpoint 7 Event Callback
00251  *   Called automatically on USB Endpoint 7 Event
00252  *    Parameter:       event
00253  */
00254
00255 void USB_EndPoint7 (uint32_t event) {
00256 }
00257
00258
00259 /*
00260  *  USB Endpoint 8 Event Callback
00261  *   Called automatically on USB Endpoint 8 Event
00262  *    Parameter:       event
00263  */
00264
00265 void USB_EndPoint8 (uint32_t event) {
00266 }
00267
00268
00269 /*
00270  *  USB Endpoint 9 Event Callback
00271  *   Called automatically on USB Endpoint 9 Event
00272  *    Parameter:       event
00273  */
00274
00275 void USB_EndPoint9 (uint32_t event) {
00276 }
00277
00278
00279 /*
00280  *  USB Endpoint 10 Event Callback
00281  *   Called automatically on USB Endpoint 10 Event
00282  *    Parameter:       event
00283  */
00284
00285 void USB_EndPoint10 (uint32_t event) {
00286 }
00287
00288
00289 /*
00290  *  USB Endpoint 11 Event Callback
00291  *   Called automatically on USB Endpoint 11 Event
00292  *    Parameter:       event
00293  */
00294
00295 void USB_EndPoint11 (uint32_t event) {
00296 }
00297
00298
00299 /*
00300  *  USB Endpoint 12 Event Callback
00301  *   Called automatically on USB Endpoint 12 Event
00302  *    Parameter:       event
00303  */
00304
00305 void USB_EndPoint12 (uint32_t event) {
00306 }
00307
00308
00309 /*
00310  *  USB Endpoint 13 Event Callback
00311  *   Called automatically on USB Endpoint 13 Event
00312  *    Parameter:       event
00313  */
00314
00315 void USB_EndPoint13 (uint32_t event) {
00316 }
00317
00318
00319 /*
00320  *  USB Endpoint 14 Event Callback
00321  *   Called automatically on USB Endpoint 14 Event
00322  *    Parameter:       event
00323  */
00324
00325 void USB_EndPoint14 (uint32_t event) {
00326 }
00327
00328
00329 /*
00330  *  USB Endpoint 15 Event Callback
00331  *   Called automatically on USB Endpoint 15 Event
00332  *    Parameter:       event
00333  */
00334
00335 void USB_EndPoint15 (uint32_t event) {
00336 }
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbuser.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/usbuser.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  * Name:    usbuser.h
00005  * Purpose: USB Custom User Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBUSER_H__
00020 #define __USBUSER_H__
00021
00022
00023 /* USB Device Events Callback Functions */
00024 extern void USB_Power_Event     (uint32_t power);
00025 extern void USB_Reset_Event     (void);
00026 extern void USB_Suspend_Event   (void);
00027 extern void USB_Resume_Event    (void);
00028 extern void USB_WakeUp_Event    (void);
00029 extern void USB_SOF_Event       (void);
00030 extern void USB_Error_Event     (uint32_t error);
00031
00032 /* USB Endpoint Callback Events */
00033 #define USB_EVT_SETUP       1   /* Setup Packet */
00034 #define USB_EVT_OUT         2   /* OUT Packet */
00035 #define USB_EVT_IN          3   /*  IN Packet */
00036 #define USB_EVT_OUT_NAK     4   /* OUT Packet - Not Acknowledged */
00037 #define USB_EVT_IN_NAK      5   /*  IN Packet - Not Acknowledged */
00038 #define USB_EVT_OUT_STALL   6   /* OUT Packet - Stalled */
00039 #define USB_EVT_IN_STALL    7   /*  IN Packet - Stalled */
00040 #define USB_EVT_OUT_DMA_EOT 8   /* DMA OUT EP - End of Transfer */
00041 #define USB_EVT_IN_DMA_EOT  9   /* DMA  IN EP - End of Transfer */
00042 #define USB_EVT_OUT_DMA_NDR 10  /* DMA OUT EP - New Descriptor Request */
00043 #define USB_EVT_IN_DMA_NDR  11  /* DMA  IN EP - New Descriptor Request */
00044 #define USB_EVT_OUT_DMA_ERR 12  /* DMA OUT EP - Error */
00045 #define USB_EVT_IN_DMA_ERR  13  /* DMA  IN EP - Error */
00046
00047 /* USB Endpoint Events Callback Pointers */
00048 extern void (* const USB_P_EP[16])(uint32_t event);
00049
00050 /* USB Endpoint Events Callback Functions */
00051 extern void USB_EndPoint0  (uint32_t event);
00052 extern void USB_EndPoint1  (uint32_t event);
00053 extern void USB_EndPoint2  (uint32_t event);
00054 extern void USB_EndPoint3  (uint32_t event);
00055 extern void USB_EndPoint4  (uint32_t event);
00056 extern void USB_EndPoint5  (uint32_t event);
00057 extern void USB_EndPoint6  (uint32_t event);
00058 extern void USB_EndPoint7  (uint32_t event);
00059 extern void USB_EndPoint8  (uint32_t event);
00060 extern void USB_EndPoint9  (uint32_t event);
00061 extern void USB_EndPoint10 (uint32_t event);
00062 extern void USB_EndPoint11 (uint32_t event);
00063 extern void USB_EndPoint12 (uint32_t event);
00064 extern void USB_EndPoint13 (uint32_t event);
00065 extern void USB_EndPoint14 (uint32_t event);
00066 extern void USB_EndPoint15 (uint32_t event);
00067
00068 /* USB Core Events Callback Functions */
00069 extern void USB_Configure_Event (void);
00070 extern void USB_Interface_Event (void);
00071 extern void USB_Feature_Event   (void);
00072
00073
00074 #endif  /* __USBUSER_H__ */
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK -------------------- */
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* SSP ------------------------------- */
00066 //#define _SSP
00067 //#define _SSP0
00068 //#define _SSP1
00069
00070
00071 /* I2C ------------------------------- */
00072 //#define _I2C
00073 //#define _I2C0
00074 //#define _I2C1
00075 //#define _I2C2
00076
00077 /* TIMER ------------------------------- */
00078 //#define _TIM
00079
00080 /* WDT ------------------------------- */
00081 //#define _WDT
00082
00083
00084 /* GPDMA ------------------------------- */
00085 //#define _GPDMA
00086
00087
00088 /* DAC ------------------------------- */
00089 //#define _DAC
00090
00091 /* DAC ------------------------------- */
00092 //#define _ADC
00093
00094
00095 /* PWM ------------------------------- */
00096 //#define _PWM
00097 //#define _PWM1
00098
00099 /* RTC ------------------------------- */
00100 //#define _RTC
00101
00102 /* I2S ------------------------------- */
00103 //#define _I2S
00104
00105 /* USB device ------------------------------- */
00106 //#define _USBDEV
00107 //#define _USB_DMA
00108
00109 /* QEI ------------------------------- */
00110 //#define _QEI
00111
00112 /* MCPWM ------------------------------- */
00113 //#define _MCPWM
00114
00115 /* CAN--------------------------------*/
00116 //#define _CAN
00117
00118 /* RIT ------------------------------- */
00119 //#define _RIT
00120
00121 /* EMAC ------------------------------ */
00122 //#define _EMAC
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      Name:    serial.c
00003  *      Purpose: serial port handling for LPC17xx
00004  *      Version: V1.20
00005  *----------------------------------------------------------------------------
00006  *      This software is supplied "AS IS" without any warranties, express,
00007  *      implied or statutory, including but not limited to the implied
00008  *      warranties of fitness for purpose, satisfactory quality and
00009  *      noninfringement. Keil extends you a royalty-free right to reproduce
00010  *      and distribute executable files created using this software for use
00011  *      on NXP Semiconductors LPC microcontroller devices only. Nothing else
00012  *      gives you the right to use this software.
00013  *
00014  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00015  *---------------------------------------------------------------------------*/
00016 #include "LPC17xx.h"                                   // LPC17xx definitions
00017 #include "lpc_types.h"
00018 #include "serial.h"
00019
00020
00021 /*----------------------------------------------------------------------------
00022   Defines for ring buffers
00023  *---------------------------------------------------------------------------*/
00024 #define SER_BUF_SIZE               (128)               // serial buffer in bytes (power 2)
00025 #define SER_BUF_MASK               (SER_BUF_SIZE-1ul)  // buffer size mask
00026
00027 /* Buffer read / write macros */
00028 #define SER_BUF_RESET(serBuf)      (serBuf.rdIdx = serBuf.wrIdx = 0)
00029 #define SER_BUF_WR(serBuf, dataIn) (serBuf.data[SER_BUF_MASK & serBuf.wrIdx++] = (dataIn))
00030 #define SER_BUF_RD(serBuf)         (serBuf.data[SER_BUF_MASK & serBuf.rdIdx++])
00031 #define SER_BUF_EMPTY(serBuf)      (serBuf.rdIdx == serBuf.wrIdx)
00032 #define SER_BUF_FULL(serBuf)       (serBuf.rdIdx == serBuf.wrIdx+1)
00033 #define SER_BUF_COUNT(serBuf)      (SER_BUF_MASK & (serBuf.wrIdx - serBuf.rdIdx))
00034
00035 // buffer type
00036 typedef struct __SER_BUF_T {
00037   unsigned char data[SER_BUF_SIZE];
00038   unsigned int wrIdx;
00039   unsigned int rdIdx;
00040 } SER_BUF_T;
00041
00042 unsigned long          ser_txRestart;                  // NZ if TX restart is required
00043 unsigned short         ser_lineState;                  // ((msr << 8) | (lsr))
00044 SER_BUF_T              ser_out;                        // Serial data buffers
00045 SER_BUF_T              ser_in;
00046
00047 /*----------------------------------------------------------------------------
00048   open the serial port
00049  *---------------------------------------------------------------------------*/
00050 void ser_OpenPort (char portNum) {
00051
00052   if ( portNum == 0 )
00053   {
00054         /* Port 0 */
00055         NVIC_DisableIRQ(UART0_IRQn);
00056         LPC_PINCON->PINSEL0 &= ~0x000000F0;
00057         LPC_PINCON->PINSEL0 |= 0x00000050;     /* RxD0 is P0.3 and TxD0 is P0.2 */
00058   }
00059   else
00060   {
00061         /* Port 1 */
00062         NVIC_DisableIRQ(UART1_IRQn);
00063         LPC_PINCON->PINSEL4 &= ~0x0000000F;
00064         LPC_PINCON->PINSEL4 |= 0x0000000A;    /* Enable RxD1 P2.1, TxD1 P2.0 */
00065   }
00066   return;
00067 }
00068
00069 /*----------------------------------------------------------------------------
00070   close the serial port
00071  *---------------------------------------------------------------------------*/
00072 void ser_ClosePort (char portNum ) {
00073   if ( portNum == 0 )
00074   {
00075         /* POrt 0 */
00076         LPC_PINCON->PINSEL0 &= ~0x000000F0;
00077         /* Disable the interrupt in the VIC and UART controllers */
00078         LPC_UART0->IER = 0;
00079         NVIC_DisableIRQ(UART0_IRQn);
00080   }
00081   else
00082   {
00083         /* Port 1 */
00084         LPC_PINCON->PINSEL4 &= ~0x0000000F;
00085         /* Disable the interrupt in the VIC and UART controllers */
00086         LPC_UART1->IER = 0;
00087         NVIC_DisableIRQ(UART1_IRQn);
00088   }
00089   return;
00090 }
00091
00092 /*----------------------------------------------------------------------------
00093   initialize the serial port
00094  *---------------------------------------------------------------------------*/
00095 void ser_InitPort0 (unsigned long baudrate, unsigned int  databits,
00096                   unsigned int  parity,   unsigned int  stopbits) {
00097
00098   unsigned char lcr_p, lcr_s, lcr_d;
00099   unsigned int dll;
00100   unsigned int pclkdiv, pclk;
00101
00102   switch (databits) {
00103     case 5:                                            // 5 Data bits
00104       lcr_d = 0x00;
00105     break;
00106     case 6:                                            // 6 Data bits
00107       lcr_d = 0x01;
00108     break;
00109     case 7:                                            // 7 Data bits
00110       lcr_d = 0x02;
00111     break;
00112     case 8:                                            // 8 Data bits
00113     default:
00114       lcr_d = 0x03;
00115     break;
00116   }
00117
00118   switch (stopbits) {
00119     case 1:                                            // 1,5 Stop bits
00120     case 2:                                            // 2   Stop bits
00121       lcr_s = 0x04;
00122     break;
00123     case 0:                                            // 1   Stop bit
00124     default:
00125       lcr_s = 0x00;
00126     break;
00127   }
00128
00129   switch (parity) {
00130     case 1:                                            // Parity Odd
00131       lcr_p = 0x08;
00132     break;
00133     case 2:                                            // Parity Even
00134       lcr_p = 0x18;
00135     break;
00136     case 3:                                            // Parity Mark
00137       lcr_p = 0x28;
00138     break;
00139     case 4:                                            // Parity Space
00140       lcr_p = 0x38;
00141     break;
00142     case 0:                                            // Parity None
00143     default:
00144       lcr_p = 0x00;
00145     break;
00146   }
00147
00148   SER_BUF_RESET(ser_out);                              // reset out buffer
00149   SER_BUF_RESET(ser_in);                               // reset in buffer
00150
00151   /* Bit 6~7 is for UART0 */
00152   pclkdiv = (LPC_SC->PCLKSEL0 >> 6) & 0x03;
00153
00154   switch ( pclkdiv )
00155   {
00156         case 0x00:
00157         default:
00158           pclk = SystemCoreClock/4;
00159           break;
00160         case 0x01:
00161           pclk = SystemCoreClock;
00162           break;
00163         case 0x02:
00164           pclk = SystemCoreClock/2;
00165           break;
00166         case 0x03:
00167           pclk = SystemCoreClock/8;
00168           break;
00169   }
00170
00171   dll = (pclk/16)/baudrate ;    /*baud rate */
00172   LPC_UART0->FDR = 0;                             // Fractional divider not used
00173   LPC_UART0->LCR = 0x80 | lcr_d | lcr_p | lcr_s;  // Data bits, Parity,   Stop bit
00174   LPC_UART0->DLL = dll;                           // Baud Rate depending on PCLK
00175   LPC_UART0->DLM = (dll >> 8);                    // High divisor latch
00176   LPC_UART0->LCR = 0x00 | lcr_d | lcr_p | lcr_s;  // DLAB = 0
00177   LPC_UART0->IER = 0x03;                          // Enable TX/RX interrupts
00178
00179   LPC_UART0->FCR = 0x07;                                /* Enable and reset TX and RX FIFO. */
00180   ser_txRestart = 1;                                   // TX fifo is empty
00181
00182   /* Enable the UART Interrupt */
00183   NVIC_EnableIRQ(UART0_IRQn);
00184   return;
00185 }
00186
00187 /*----------------------------------------------------------------------------
00188   initialize the serial port
00189  *---------------------------------------------------------------------------*/
00190 void ser_InitPort1 (unsigned long baudrate, unsigned int  databits,
00191                   unsigned int  parity,   unsigned int  stopbits) {
00192
00193   unsigned char lcr_p, lcr_s, lcr_d;
00194   unsigned int dll;
00195   unsigned int pclkdiv, pclk;
00196
00197   switch (databits) {
00198     case 5:                                            // 5 Data bits
00199       lcr_d = 0x00;
00200     break;
00201     case 6:                                            // 6 Data bits
00202       lcr_d = 0x01;
00203     break;
00204     case 7:                                            // 7 Data bits
00205       lcr_d = 0x02;
00206     break;
00207     case 8:                                            // 8 Data bits
00208     default:
00209       lcr_d = 0x03;
00210     break;
00211   }
00212
00213   switch (stopbits) {
00214     case 1:                                            // 1,5 Stop bits
00215     case 2:                                            // 2   Stop bits
00216       lcr_s = 0x04;
00217     break;
00218     case 0:                                            // 1   Stop bit
00219     default:
00220       lcr_s = 0x00;
00221     break;
00222   }
00223
00224   switch (parity) {
00225     case 1:                                            // Parity Odd
00226       lcr_p = 0x08;
00227     break;
00228     case 2:                                            // Parity Even
00229       lcr_p = 0x18;
00230     break;
00231     case 3:                                            // Parity Mark
00232       lcr_p = 0x28;
00233     break;
00234     case 4:                                            // Parity Space
00235       lcr_p = 0x38;
00236     break;
00237     case 0:                                            // Parity None
00238     default:
00239       lcr_p = 0x00;
00240     break;
00241   }
00242
00243   SER_BUF_RESET(ser_out);                              // reset out buffer
00244   SER_BUF_RESET(ser_in);                               // reset in buffer
00245
00246   /* Bit 8,9 are for UART1 */
00247   pclkdiv = (LPC_SC->PCLKSEL0 >> 8) & 0x03;
00248
00249   switch ( pclkdiv )
00250   {
00251         case 0x00:
00252         default:
00253           pclk = SystemCoreClock/4;
00254           break;
00255         case 0x01:
00256           pclk = SystemCoreClock;
00257           break;
00258         case 0x02:
00259           pclk = SystemCoreClock/2;
00260           break;
00261         case 0x03:
00262           pclk = SystemCoreClock/8;
00263           break;
00264   }
00265
00266   dll = (pclk/16)/baudrate ;    /*baud rate */
00267   LPC_UART1->FDR = 0;                             // Fractional divider not used
00268   LPC_UART1->LCR = 0x80 | lcr_d | lcr_p | lcr_s;  // Data bits, Parity,   Stop bit
00269   LPC_UART1->DLL = dll;                           // Baud Rate depending on PCLK
00270   LPC_UART1->DLM = (dll >> 8);                    // High divisor latch
00271   LPC_UART1->LCR = 0x00 | lcr_d | lcr_p | lcr_s;  // DLAB = 0
00272   LPC_UART1->IER = 0x03;                          // Enable TX/RX interrupts
00273
00274   LPC_UART1->FCR = 0x07;                                /* Enable and reset TX and RX FIFO. */
00275   ser_txRestart = 1;                                   // TX fifo is empty
00276
00277   /* Enable the UART Interrupt */
00278   NVIC_EnableIRQ(UART1_IRQn);
00279   return;
00280 }
00281
00282 /*----------------------------------------------------------------------------
00283   read data from serial port
00284  *---------------------------------------------------------------------------*/
00285 int ser_Read (char *buffer, const int *length) {
00286   int bytesToRead, bytesRead;
00287
00288   /* Read *length bytes, block if *bytes are not avaialable     */
00289   bytesToRead = *length;
00290   bytesToRead = (bytesToRead < (*length)) ? bytesToRead : (*length);
00291   bytesRead = bytesToRead;
00292
00293   while (bytesToRead--) {
00294     while (SER_BUF_EMPTY(ser_in));                     // Block until data is available if none
00295     *buffer++ = SER_BUF_RD(ser_in);
00296   }
00297   return (bytesRead);
00298 }
00299
00300 /*----------------------------------------------------------------------------
00301   write data to the serial port
00302  *---------------------------------------------------------------------------*/
00303 int ser_Write (char portNum, const char *buffer, int *length) {
00304   int  bytesToWrite, bytesWritten;
00305
00306   // Write *length bytes
00307   bytesToWrite = *length;
00308   bytesWritten = bytesToWrite;
00309
00310   while (!SER_BUF_EMPTY(ser_out));               // Block until space is available if none
00311   while (bytesToWrite) {
00312       SER_BUF_WR(ser_out, *buffer++);            // Read Rx FIFO to buffer
00313       bytesToWrite--;
00314   }
00315
00316   if (ser_txRestart) {
00317     ser_txRestart = 0;
00318         if ( portNum == 0 )
00319         {
00320           LPC_UART0->THR = SER_BUF_RD(ser_out);             // Write to the Tx Register
00321     }
00322         else
00323         {
00324       LPC_UART1->THR = SER_BUF_RD(ser_out);             // Write to the Tx Register
00325         }
00326   }
00327
00328   return (bytesWritten);
00329 }
00330
00331 /*----------------------------------------------------------------------------
00332   check if character(s) are available at the serial interface
00333  *---------------------------------------------------------------------------*/
00334 void ser_AvailChar (int *availChar) {
00335
00336   *availChar = SER_BUF_COUNT(ser_in);
00337
00338 }
00339
00340 /*----------------------------------------------------------------------------
00341   read the line state of the serial port
00342  *---------------------------------------------------------------------------*/
00343 void ser_LineState (unsigned short *lineState) {
00344
00345   *lineState = ser_lineState;
00346   ser_lineState = 0;
00347
00348 }
00349
00350 /*----------------------------------------------------------------------------
00351   serial port 0 interrupt
00352  *---------------------------------------------------------------------------*/
00353 void UART0_IRQHandler(void)
00354 {
00355   volatile unsigned long iir;
00356
00357   iir = LPC_UART0->IIR;
00358
00359   if ((iir & 0x4) || (iir & 0xC)) {            // RDA or CTI pending
00360     while (LPC_UART0->LSR & 0x01) {                 // Rx FIFO is not empty
00361       SER_BUF_WR(ser_in, LPC_UART0->RBR);           // Read Rx FIFO to buffer
00362     }
00363   }
00364   if ((iir & 0x2)) {                           // TXMIS pending
00365         if (SER_BUF_COUNT(ser_out) != 0) {
00366       LPC_UART0->THR = SER_BUF_RD(ser_out);         // Write to the Tx FIFO
00367       ser_txRestart = 0;
00368     }
00369         else {
00370       ser_txRestart = 1;
00371         }
00372   }
00373   ser_lineState = LPC_UART0->LSR & 0x1E;            // update linestate
00374   return;
00375 }
00376
00377 /*----------------------------------------------------------------------------
00378   serial port 1 interrupt
00379  *---------------------------------------------------------------------------*/
00380 void UART1_IRQHandler(void)
00381 {
00382   volatile unsigned long iir;
00383
00384   iir = LPC_UART1->IIR;
00385
00386   if ((iir & 0x4) || (iir & 0xC)) {            // RDA or CTI pending
00387     while (LPC_UART1->LSR & 0x01) {                 // Rx FIFO is not empty
00388       SER_BUF_WR(ser_in, LPC_UART1->RBR);           // Read Rx FIFO to buffer
00389     }
00390   }
00391   if ((iir & 0x2)) {                           // TXMIS pending
00392         if (SER_BUF_COUNT(ser_out) != 0) {
00393       LPC_UART1->THR = SER_BUF_RD(ser_out);         // Write to the Tx FIFO
00394       ser_txRestart = 0;
00395     }
00396         else {
00397       ser_txRestart = 1;
00398         }
00399   }
00400   ser_lineState = ((LPC_UART1->MSR<<8)|LPC_UART1->LSR) & 0xE01E;    // update linestate
00401   return;
00402 }
00403
00404
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK -------------------- */
00045
00046 /* GPIO ------------------------------- */
00047 //#define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 //#define _UART
00054 //#define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SYSTICK --------------------------- */
00063 //#define _SYSTICK
00064
00065 /* SSP ------------------------------- */
00066 //#define _SSP
00067 //#define _SSP0
00068 //#define _SSP1
00069
00070
00071 /* I2C ------------------------------- */
00072 //#define _I2C
00073 //#define _I2C0
00074 //#define _I2C1
00075 //#define _I2C2
00076
00077 /* TIMER ------------------------------- */
00078 //#define _TIM
00079
00080 /* WDT ------------------------------- */
00081 //#define _WDT
00082
00083
00084 /* GPDMA ------------------------------- */
00085 //#define _GPDMA
00086
00087
00088 /* DAC ------------------------------- */
00089 //#define _DAC
00090
00091 /* DAC ------------------------------- */
00092 //#define _ADC
00093
00094
00095 /* PWM ------------------------------- */
00096 //#define _PWM
00097 //#define _PWM1
00098
00099 /* RTC ------------------------------- */
00100 //#define _RTC
00101
00102 /* I2S ------------------------------- */
00103 //#define _I2S
00104
00105 /* USB device ------------------------------- */
00106 //#define _USBDEV
00107 //#define _USB_DMA
00108
00109 /* QEI ------------------------------- */
00110 //#define _QEI
00111
00112 /* MCPWM ------------------------------- */
00113 //#define _MCPWM
00114
00115 /* CAN--------------------------------*/
00116 //#define _CAN
00117
00118 /* RIT ------------------------------- */
00119 //#define _RIT
00120
00121 /* EMAC ------------------------------ */
00122 //#define _EMAC
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 //#define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 //#define _UART
00053 //#define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00039
00040 /* Comment the line below to disable the specific peripheral inclusion */
00041
00042 /* DEBUG_FRAMWORK ------------------------------ */
00043 //#define _DBGFWK
00044
00045 /* GPIO ------------------------------- */
00046 //#define _GPIO
00047
00048 /* EXTI ------------------------------- */
00049 //#define _EXTI
00050
00051 /* UART ------------------------------- */
00052 //#define _UART
00053 //#define _UART0
00054 //#define _UART1
00055 //#define _UART2
00056 //#define _UART3
00057
00058 /* SPI ------------------------------- */
00059 //#define _SPI
00060
00061 /* SSP ------------------------------- */
00062 //#define _SSP
00063 //#define _SSP0
00064 //#define _SSP1
00065
00066 /* SYSTICK --------------------------- */
00067 //#define _SYSTICK
00068
00069 /* I2C ------------------------------- */
00070 //#define _I2C
00071 //#define _I2C0
00072 //#define _I2C1
00073 //#define _I2C2
00074
00075 /* TIMER ------------------------------- */
00076 //#define _TIM
00077
00078 /* WDT ------------------------------- */
00079 //#define _WDT
00080
00081
00082 /* GPDMA ------------------------------- */
00083 //#define _GPDMA
00084
00085
00086 /* DAC ------------------------------- */
00087 //#define _DAC
00088
00089 /* DAC ------------------------------- */
00090 //#define _ADC
00091
00092
00093 /* PWM ------------------------------- */
00094 //#define _PWM
00095 //#define _PWM1
00096
00097 /* RTC ------------------------------- */
00098 //#define _RTC
00099
00100 /* I2S ------------------------------- */
00101 //#define _I2S
00102
00103 /* USB device ------------------------------- */
00104 //#define _USBDEV
00105 //#define _USB_DMA
00106
00107 /* QEI ------------------------------- */
00108 //#define _QEI
00109
00110 /* MCPWM ------------------------------- */
00111 //#define _MCPWM
00112
00113 /* CAN--------------------------------*/
00114 //#define _CAN
00115
00116 /* RIT ------------------------------- */
00117 //#define _RIT
00118
00119 /* EMAC ------------------------------ */
00120 //#define _EMAC
00121
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usb.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usb.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USB.H
00005  *      Purpose: USB Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USB_H__
00020 #define __USB_H__
00021
00022
00023 #if defined   (  __GNUC__  )
00024 #define __packed __attribute__((__packed__))
00025 #endif
00026
00027
00028 #if defined     (  __CC_ARM  )
00029 typedef __packed union {
00030 #elif defined   (  __GNUC__  )
00031 typedef union __packed {
00032 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00033 #pragma pack(1)
00034 typedef union {
00035 #endif
00036   uint16_t W;
00037 #if defined     (  __CC_ARM  )
00038   __packed struct {
00039 #elif defined   (  __GNUC__  )
00040   struct __packed {
00041 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00042 #pragma pack(1)
00043   struct {
00044 #endif
00045     uint8_t L;
00046     uint8_t H;
00047   } WB;
00048 #ifdef __IAR_SYSTEMS_ICC__
00049 #pragma pack()
00050 #endif
00051 } WORD_BYTE;
00052 #ifdef __IAR_SYSTEMS_ICC__
00053 #pragma pack()
00054 #endif
00055
00056 /* bmRequestType.Dir */
00057 #define REQUEST_HOST_TO_DEVICE     0
00058 #define REQUEST_DEVICE_TO_HOST     1
00059
00060 /* bmRequestType.Type */
00061 #define REQUEST_STANDARD           0
00062 #define REQUEST_CLASS              1
00063 #define REQUEST_VENDOR             2
00064 #define REQUEST_RESERVED           3
00065
00066 /* bmRequestType.Recipient */
00067 #define REQUEST_TO_DEVICE          0
00068 #define REQUEST_TO_INTERFACE       1
00069 #define REQUEST_TO_ENDPOINT        2
00070 #define REQUEST_TO_OTHER           3
00071
00072 /* bmRequestType Definition */
00073 #if defined     (  __CC_ARM  )
00074 typedef __packed union _REQUEST_TYPE {
00075 #elif defined   (  __GNUC__  )
00076 typedef union __packed _REQUEST_TYPE {
00077 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00078 #pragma pack(1)
00079 typedef union _REQUEST_TYPE {
00080 #endif
00081 #if defined     (  __CC_ARM  )
00082         __packed struct _BM {
00083 #elif defined   (  __GNUC__  )
00084         struct __packed _BM {
00085 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00086 #pragma pack(1)
00087         struct _BM {
00088 #endif
00089     uint8_t Recipient : 5;
00090     uint8_t Type      : 2;
00091     uint8_t Dir       : 1;
00092   } BM;
00093 #ifdef __IAR_SYSTEMS_ICC__
00094 #pragma pack()
00095 #endif
00096   uint8_t B;
00097 } REQUEST_TYPE;
00098 #ifdef __IAR_SYSTEMS_ICC__
00099 #pragma pack()
00100 #endif
00101
00102 /* USB Standard Request Codes */
00103 #define USB_REQUEST_GET_STATUS                 0
00104 #define USB_REQUEST_CLEAR_FEATURE              1
00105 #define USB_REQUEST_SET_FEATURE                3
00106 #define USB_REQUEST_SET_ADDRESS                5
00107 #define USB_REQUEST_GET_DESCRIPTOR             6
00108 #define USB_REQUEST_SET_DESCRIPTOR             7
00109 #define USB_REQUEST_GET_CONFIGURATION          8
00110 #define USB_REQUEST_SET_CONFIGURATION          9
00111 #define USB_REQUEST_GET_INTERFACE              10
00112 #define USB_REQUEST_SET_INTERFACE              11
00113 #define USB_REQUEST_SYNC_FRAME                 12
00114
00115 /* USB GET_STATUS Bit Values */
00116 #define USB_GETSTATUS_SELF_POWERED             0x01
00117 #define USB_GETSTATUS_REMOTE_WAKEUP            0x02
00118 #define USB_GETSTATUS_ENDPOINT_STALL           0x01
00119
00120 /* USB Standard Feature selectors */
00121 #define USB_FEATURE_ENDPOINT_STALL             0
00122 #define USB_FEATURE_REMOTE_WAKEUP              1
00123
00124 /* USB Default Control Pipe Setup Packet */
00125 #if defined     (  __CC_ARM  )
00126 typedef __packed struct _USB_SETUP_PACKET {
00127 #elif defined   (  __GNUC__  )
00128 typedef struct __packed _USB_SETUP_PACKET {
00129 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00130 #pragma pack(1)
00131 typedef struct _USB_SETUP_PACKET {
00132 #endif
00133   REQUEST_TYPE bmRequestType;
00134   uint8_t         bRequest;
00135   WORD_BYTE    wValue;
00136   WORD_BYTE    wIndex;
00137   uint16_t         wLength;
00138 } USB_SETUP_PACKET;
00139 #ifdef __IAR_SYSTEMS_ICC__
00140 #pragma pack()
00141 #endif
00142
00143 /* USB Descriptor Types */
00144 #define USB_DEVICE_DESCRIPTOR_TYPE             1
00145 #define USB_CONFIGURATION_DESCRIPTOR_TYPE      2
00146 #define USB_STRING_DESCRIPTOR_TYPE             3
00147 #define USB_INTERFACE_DESCRIPTOR_TYPE          4
00148 #define USB_ENDPOINT_DESCRIPTOR_TYPE           5
00149 #define USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE   6
00150 #define USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7
00151 #define USB_INTERFACE_POWER_DESCRIPTOR_TYPE    8
00152 #define USB_OTG_DESCRIPTOR_TYPE                     9
00153 #define USB_DEBUG_DESCRIPTOR_TYPE                  10
00154 #define USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE  11
00155
00156 /* USB Device Classes */
00157 #define USB_DEVICE_CLASS_RESERVED              0x00
00158 #define USB_DEVICE_CLASS_AUDIO                 0x01
00159 #define USB_DEVICE_CLASS_COMMUNICATIONS        0x02
00160 #define USB_DEVICE_CLASS_HUMAN_INTERFACE       0x03
00161 #define USB_DEVICE_CLASS_MONITOR               0x04
00162 #define USB_DEVICE_CLASS_PHYSICAL_INTERFACE    0x05
00163 #define USB_DEVICE_CLASS_POWER                 0x06
00164 #define USB_DEVICE_CLASS_PRINTER               0x07
00165 #define USB_DEVICE_CLASS_STORAGE               0x08
00166 #define USB_DEVICE_CLASS_HUB                   0x09
00167 #define USB_DEVICE_CLASS_MISCELLANEOUS         0xEF
00168 #define USB_DEVICE_CLASS_VENDOR_SPECIFIC       0xFF
00169
00170 /* bmAttributes in Configuration Descriptor */
00171 #define USB_CONFIG_POWERED_MASK                0xC0
00172 #define USB_CONFIG_BUS_POWERED                 0x80
00173 #define USB_CONFIG_SELF_POWERED                0xC0
00174 #define USB_CONFIG_REMOTE_WAKEUP               0x20
00175
00176 /* bMaxPower in Configuration Descriptor */
00177 #define USB_CONFIG_POWER_MA(mA)                ((mA)/2)
00178
00179 /* bEndpointAddress in Endpoint Descriptor */
00180 #define USB_ENDPOINT_DIRECTION_MASK            0x80
00181 #define USB_ENDPOINT_OUT(addr)                 ((addr) | 0x00)
00182 #define USB_ENDPOINT_IN(addr)                  ((addr) | 0x80)
00183
00184 /* bmAttributes in Endpoint Descriptor */
00185 #define USB_ENDPOINT_TYPE_MASK                 0x03
00186 #define USB_ENDPOINT_TYPE_CONTROL              0x00
00187 #define USB_ENDPOINT_TYPE_ISOCHRONOUS          0x01
00188 #define USB_ENDPOINT_TYPE_BULK                 0x02
00189 #define USB_ENDPOINT_TYPE_INTERRUPT            0x03
00190 #define USB_ENDPOINT_SYNC_MASK                 0x0C
00191 #define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION   0x00
00192 #define USB_ENDPOINT_SYNC_ASYNCHRONOUS         0x04
00193 #define USB_ENDPOINT_SYNC_ADAPTIVE             0x08
00194 #define USB_ENDPOINT_SYNC_SYNCHRONOUS          0x0C
00195 #define USB_ENDPOINT_USAGE_MASK                0x30
00196 #define USB_ENDPOINT_USAGE_DATA                0x00
00197 #define USB_ENDPOINT_USAGE_FEEDBACK            0x10
00198 #define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK   0x20
00199 #define USB_ENDPOINT_USAGE_RESERVED            0x30
00200
00201 /* USB Standard Device Descriptor */
00202 #if defined     (  __CC_ARM  )
00203 typedef __packed struct _USB_DEVICE_DESCRIPTOR {
00204 #elif defined   (  __GNUC__  )
00205 typedef struct __packed _USB_DEVICE_DESCRIPTOR {
00206 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00207 #pragma pack(1)
00208 typedef struct _USB_DEVICE_DESCRIPTOR {
00209 #endif
00210   uint8_t  bLength;
00211   uint8_t  bDescriptorType;
00212   uint16_t  bcdUSB;
00213   uint8_t  bDeviceClass;
00214   uint8_t  bDeviceSubClass;
00215   uint8_t  bDeviceProtocol;
00216   uint8_t  bMaxPacketSize0;
00217   uint16_t  idVendor;
00218   uint16_t  idProduct;
00219   uint16_t  bcdDevice;
00220   uint8_t  iManufacturer;
00221   uint8_t  iProduct;
00222   uint8_t  iSerialNumber;
00223   uint8_t  bNumConfigurations;
00224 } USB_DEVICE_DESCRIPTOR;
00225 #ifdef __IAR_SYSTEMS_ICC__
00226 #pragma pack()
00227 #endif
00228
00229 /* USB 2.0 Device Qualifier Descriptor */
00230 #if defined     (  __CC_ARM  )
00231 typedef __packed struct _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00232 #elif defined   (  __GNUC__  )
00233 typedef struct __packed _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00234 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00235 #pragma pack(1)
00236 typedef struct _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00237 #endif
00238   uint8_t  bLength;
00239   uint8_t  bDescriptorType;
00240   uint16_t  bcdUSB;
00241   uint8_t  bDeviceClass;
00242   uint8_t  bDeviceSubClass;
00243   uint8_t  bDeviceProtocol;
00244   uint8_t  bMaxPacketSize0;
00245   uint8_t  bNumConfigurations;
00246   uint8_t  bReserved;
00247 } USB_DEVICE_QUALIFIER_DESCRIPTOR;
00248 #ifdef __IAR_SYSTEMS_ICC__
00249 #pragma pack()
00250 #endif
00251
00252 /* USB Standard Configuration Descriptor */
00253 #if defined     (  __CC_ARM  )
00254 typedef __packed struct _USB_CONFIGURATION_DESCRIPTOR {
00255 #elif defined   (  __GNUC__  )
00256 typedef struct __packed _USB_CONFIGURATION_DESCRIPTOR {
00257 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00258 #pragma pack(1)
00259 typedef struct _USB_CONFIGURATION_DESCRIPTOR {
00260 #endif
00261   uint8_t  bLength;
00262   uint8_t  bDescriptorType;
00263   uint16_t  wTotalLength;
00264   uint8_t  bNumInterfaces;
00265   uint8_t  bConfigurationValue;
00266   uint8_t  iConfiguration;
00267   uint8_t  bmAttributes;
00268   uint8_t  bMaxPower;
00269 } USB_CONFIGURATION_DESCRIPTOR;
00270 #ifdef __IAR_SYSTEMS_ICC__
00271 #pragma pack()
00272 #endif
00273
00274 /* USB Standard Interface Descriptor */
00275 #if defined     (  __CC_ARM  )
00276 typedef __packed struct _USB_INTERFACE_DESCRIPTOR {
00277 #elif defined   (  __GNUC__  )
00278 typedef struct __packed _USB_INTERFACE_DESCRIPTOR {
00279 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00280 #pragma pack(1)
00281 typedef struct _USB_INTERFACE_DESCRIPTOR {
00282 #endif
00283   uint8_t  bLength;
00284   uint8_t  bDescriptorType;
00285   uint8_t  bInterfaceNumber;
00286   uint8_t  bAlternateSetting;
00287   uint8_t  bNumEndpoints;
00288   uint8_t  bInterfaceClass;
00289   uint8_t  bInterfaceSubClass;
00290   uint8_t  bInterfaceProtocol;
00291   uint8_t  iInterface;
00292 } USB_INTERFACE_DESCRIPTOR;
00293 #ifdef __IAR_SYSTEMS_ICC__
00294 #pragma pack()
00295 #endif
00296
00297 /* USB Standard Endpoint Descriptor */
00298 #if defined     (  __CC_ARM  )
00299 typedef __packed struct _USB_ENDPOINT_DESCRIPTOR {
00300 #elif defined   (  __GNUC__  )
00301 typedef struct __packed _USB_ENDPOINT_DESCRIPTOR {
00302 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00303 #pragma pack(1)
00304 typedef struct _USB_ENDPOINT_DESCRIPTOR {
00305 #endif
00306   uint8_t  bLength;
00307   uint8_t  bDescriptorType;
00308   uint8_t  bEndpointAddress;
00309   uint8_t  bmAttributes;
00310   uint16_t  wMaxPacketSize;
00311   uint8_t  bInterval;
00312 } USB_ENDPOINT_DESCRIPTOR;
00313 #ifdef __IAR_SYSTEMS_ICC__
00314 #pragma pack()
00315 #endif
00316
00317 /* USB String Descriptor */
00318 #if defined     (  __CC_ARM  )
00319 typedef __packed struct _USB_STRING_DESCRIPTOR {
00320 #elif defined   (  __GNUC__  )
00321 typedef struct __packed _USB_STRING_DESCRIPTOR {
00322 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00323 #pragma pack(1)
00324 typedef struct _USB_STRING_DESCRIPTOR {
00325 #endif
00326   uint8_t  bLength;
00327   uint8_t  bDescriptorType;
00328   uint16_t  bString/*[]*/;
00329 } USB_STRING_DESCRIPTOR;
00330 #ifdef __IAR_SYSTEMS_ICC__
00331 #pragma pack()
00332 #endif
00333
00334 /* USB Common Descriptor */
00335 #if defined     (  __CC_ARM  )
00336 typedef __packed struct _USB_COMMON_DESCRIPTOR {
00337 #elif defined   (  __GNUC__  )
00338 typedef struct __packed _USB_COMMON_DESCRIPTOR {
00339 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00340 #pragma pack(1)
00341 typedef struct _USB_COMMON_DESCRIPTOR {
00342 #endif
00343   uint8_t  bLength;
00344   uint8_t  bDescriptorType;
00345 } USB_COMMON_DESCRIPTOR;
00346 #ifdef __IAR_SYSTEMS_ICC__
00347 #pragma pack()
00348 #endif
00349
00350 #endif  /* __USB_H__ */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcfg.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBCFG.H
00005  *      Purpose: USB Custom Configuration
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBCFG_H__
00020 #define __USBCFG_H__
00021
00022
00023 //*** <<< Use Configuration Wizard in Context Menu >>> ***
00024
00025
00026 /*
00027 // <h> USB Configuration
00028 //   <o0> USB Power
00029 //        <i> Default Power Setting
00030 //        <0=> Bus-powered
00031 //        <1=> Self-powered
00032 //   <o1> Max Number of Interfaces <1-256>
00033 //   <o2> Max Number of Endpoints  <1-32>
00034 //   <o3> Max Endpoint 0 Packet Size
00035 //        <8=> 8 Bytes <16=> 16 Bytes <32=> 32 Bytes <64=> 64 Bytes
00036 //   <e4> DMA Transfer
00037 //     <i> Use DMA for selected Endpoints
00038 //     <o5.0>  Endpoint 0 Out
00039 //     <o5.1>  Endpoint 0 In
00040 //     <o5.2>  Endpoint 1 Out
00041 //     <o5.3>  Endpoint 1 In
00042 //     <o5.4>  Endpoint 2 Out
00043 //     <o5.5>  Endpoint 2 In
00044 //     <o5.6>  Endpoint 3 Out
00045 //     <o5.7>  Endpoint 3 In
00046 //     <o5.8>  Endpoint 4 Out
00047 //     <o5.9>  Endpoint 4 In
00048 //     <o5.10> Endpoint 5 Out
00049 //     <o5.11> Endpoint 5 In
00050 //     <o5.12> Endpoint 6 Out
00051 //     <o5.13> Endpoint 6 In
00052 //     <o5.14> Endpoint 7 Out
00053 //     <o5.15> Endpoint 7 In
00054 //     <o5.16> Endpoint 8 Out
00055 //     <o5.17> Endpoint 8 In
00056 //     <o5.18> Endpoint 9 Out
00057 //     <o5.19> Endpoint 9 In
00058 //     <o5.20> Endpoint 10 Out
00059 //     <o5.21> Endpoint 10 In
00060 //     <o5.22> Endpoint 11 Out
00061 //     <o5.23> Endpoint 11 In
00062 //     <o5.24> Endpoint 12 Out
00063 //     <o5.25> Endpoint 12 In
00064 //     <o5.26> Endpoint 13 Out
00065 //     <o5.27> Endpoint 13 In
00066 //     <o5.28> Endpoint 14 Out
00067 //     <o5.29> Endpoint 14 In
00068 //     <o5.30> Endpoint 15 Out
00069 //     <o5.31> Endpoint 15 In
00070 //   </e>
00071 // </h>
00072 */
00073
00074 #define USB_POWER           0
00075 #define USB_IF_NUM          1
00076 #define USB_EP_NUM          32
00077 //#define USB_MAX_PACKET0     64
00078 #define USB_MAX_PACKET0     8
00079 #define USB_DMA             1
00080 #define USB_DMA_EP          0x00000000
00081
00082
00083 /*
00084 // <h> USB Event Handlers
00085 //   <h> Device Events
00086 //     <o0.0> Power Event
00087 //     <o1.0> Reset Event
00088 //     <o2.0> Suspend Event
00089 //     <o3.0> Resume Event
00090 //     <o4.0> Remote Wakeup Event
00091 //     <o5.0> Start of Frame Event
00092 //     <o6.0> Error Event
00093 //   </h>
00094 //   <h> Endpoint Events
00095 //     <o7.0>  Endpoint 0 Event
00096 //     <o7.1>  Endpoint 1 Event
00097 //     <o7.2>  Endpoint 2 Event
00098 //     <o7.3>  Endpoint 3 Event
00099 //     <o7.4>  Endpoint 4 Event
00100 //     <o7.5>  Endpoint 5 Event
00101 //     <o7.6>  Endpoint 6 Event
00102 //     <o7.7>  Endpoint 7 Event
00103 //     <o7.8>  Endpoint 8 Event
00104 //     <o7.9>  Endpoint 9 Event
00105 //     <o7.10> Endpoint 10 Event
00106 //     <o7.11> Endpoint 11 Event
00107 //     <o7.12> Endpoint 12 Event
00108 //     <o7.13> Endpoint 13 Event
00109 //     <o7.14> Endpoint 14 Event
00110 //     <o7.15> Endpoint 15 Event
00111 //   </h>
00112 //   <h> USB Core Events
00113 //     <o8.0>  Set Configuration Event
00114 //     <o9.0>  Set Interface Event
00115 //     <o10.0> Set/Clear Feature Event
00116 //   </h>
00117 // </h>
00118 */
00119
00120 #define USB_POWER_EVENT     0
00121 #define USB_RESET_EVENT     1
00122 #define USB_SUSPEND_EVENT   0
00123 #define USB_RESUME_EVENT    0
00124 #define USB_WAKEUP_EVENT    0
00125 #define USB_SOF_EVENT       0
00126 #define USB_ERROR_EVENT     0
00127 //#define USB_EP_EVENT        0x0003
00128 #define USB_EP_EVENT        0x0007
00129 #define USB_CONFIGURE_EVENT 1
00130 #define USB_INTERFACE_EVENT 0
00131 #define USB_FEATURE_EVENT   0
00132
00133
00134 /*
00135 // <e0> USB Class Support
00136 //   <e1> Human Interface Device (HID)
00137 //     <o2> Interface Number <0-255>
00138 //   </e>
00139 //   <e3> Mass Storage
00140 //     <o4> Interface Number <0-255>
00141 //   </e>
00142 //   <e5> Audio Device
00143 //     <o6> Control Interface Number <0-255>
00144 //     <o7> Streaming Interface 1 Number <0-255>
00145 //     <o8> Streaming Interface 2 Number <0-255>
00146 //   </e>
00147 // </e>
00148 */
00149
00150 #define USB_CLASS           1
00151 #define USB_HID             1
00152 #define USB_HID_IF_NUM      0
00153 #define USB_MSC             0
00154 #define USB_MSC_IF_NUM      0
00155 #define USB_AUDIO           0
00156 #define USB_ADC_CIF_NUM     0
00157 #define USB_ADC_SIF1_NUM    1
00158 #define USB_ADC_SIF2_NUM    2
00159 #define USB_CDC                         0
00160 #define USB_CDC_CIF_NUM     0
00161 #define USB_CDC_DIF_NUM     1
00162 #define USB_CDC_BUFSIZE     64
00163
00164
00165 #endif  /* __USBCFG_H__ */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBCORE.C
00005  *      Purpose: USB Core Module
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019
00020 #include "lpc_types.h"
00021
00022 #include "usb.h"
00023 #include "usbcfg.h"
00024 #include "usbhw.h"
00025 #include "usbcore.h"
00026 #include "usbdesc.h"
00027 #include "usbuser.h"
00028
00029 #if (USB_CLASS)
00030
00031 #if (USB_AUDIO)
00032 #include "audio.h"
00033 #include "adcuser.h"
00034 #endif
00035
00036 #if (USB_HID)
00037 #include "hid.h"
00038 #include "hiduser.h"
00039 #endif
00040
00041 #if (USB_MSC)
00042 #include "msc.h"
00043 #include "mscuser.h"
00044 extern MSC_CSW CSW;
00045 #endif
00046
00047 #if (USB_CDC)
00048 #include "cdc.h"
00049 #include "cdcuser.h"
00050 #endif
00051
00052 #endif
00053
00054 #if (USB_VENDOR)
00055 #include "vendor.h"
00056 #endif
00057
00058 #ifndef __IAR_SYSTEMS_ICC__
00059 #pragma diag_suppress 111,1441
00060 #endif
00061
00062 uint16_t  USB_DeviceStatus;
00063 uint8_t  USB_DeviceAddress;
00064 uint8_t  USB_Configuration;
00065 uint32_t USB_EndPointMask;
00066 uint32_t USB_EndPointHalt;
00067 uint8_t  USB_NumInterfaces;
00068 uint8_t  USB_AltSetting[USB_IF_NUM];
00069
00070 uint8_t  EP0Buf[USB_MAX_PACKET0];
00071
00072
00073 USB_EP_DATA EP0Data;
00074
00075 USB_SETUP_PACKET SetupPacket;
00076
00077
00078 /*
00079  *  Reset USB Core
00080  *    Parameters:      None
00081  *    Return Value:    None
00082  */
00083
00084 void USB_ResetCore (void) {
00085
00086   USB_DeviceStatus  = USB_POWER;
00087   USB_DeviceAddress = 0;
00088   USB_Configuration = 0;
00089   USB_EndPointMask  = 0x00010001;
00090   USB_EndPointHalt  = 0x00000000;
00091 }
00092
00093
00094 /*
00095  *  USB Request - Setup Stage
00096  *    Parameters:      None (global SetupPacket)
00097  *    Return Value:    None
00098  */
00099
00100 void USB_SetupStage (void) {
00101   USB_ReadEP(0x00, (uint8_t *)&SetupPacket);
00102 }
00103
00104
00105 /*
00106  *  USB Request - Data In Stage
00107  *    Parameters:      None (global EP0Data)
00108  *    Return Value:    None
00109  */
00110
00111 void USB_DataInStage (void) {
00112   uint32_t cnt;
00113
00114   if (EP0Data.Count > USB_MAX_PACKET0) {
00115     cnt = USB_MAX_PACKET0;
00116   } else {
00117     cnt = EP0Data.Count;
00118   }
00119   cnt = USB_WriteEP(0x80, EP0Data.pData, cnt);
00120   EP0Data.pData += cnt;
00121   EP0Data.Count -= cnt;
00122 }
00123
00124
00125 /*
00126  *  USB Request - Data Out Stage
00127  *    Parameters:      None (global EP0Data)
00128  *    Return Value:    None
00129  */
00130
00131 void USB_DataOutStage (void) {
00132   uint32_t cnt;
00133
00134   cnt = USB_ReadEP(0x00, EP0Data.pData);
00135   EP0Data.pData += cnt;
00136   EP0Data.Count -= cnt;
00137 }
00138
00139
00140 /*
00141  *  USB Request - Status In Stage
00142  *    Parameters:      None
00143  *    Return Value:    None
00144  */
00145
00146 void USB_StatusInStage (void) {
00147   USB_WriteEP(0x80, NULL, 0);
00148 }
00149
00150
00151 /*
00152  *  USB Request - Status Out Stage
00153  *    Parameters:      None
00154  *    Return Value:    None
00155  */
00156
00157 void USB_StatusOutStage (void) {
00158   USB_ReadEP(0x00, EP0Buf);
00159 }
00160
00161
00162 /*
00163  *  Get Descriptor USB Request
00164  *    Parameters:      None (global SetupPacket)
00165  *    Return Value:    TRUE - Success, FALSE - Error
00166  */
00167
00168 #ifdef __IAR_SYSTEMS_ICC__
00169 inline uint32_t USB_GetDescriptor (void) {
00170 #else
00171 __inline uint32_t USB_GetDescriptor (void) {
00172 #endif
00173         uint8_t  *pD;
00174         uint32_t len, n;
00175
00176         switch (SetupPacket.bmRequestType.BM.Recipient)
00177         {
00178                 case REQUEST_TO_DEVICE:
00179                         switch (SetupPacket.wValue.WB.H)
00180                         {
00181                                 case USB_DEVICE_DESCRIPTOR_TYPE:
00182                                         EP0Data.pData = (uint8_t *)USB_DeviceDescriptor;
00183                                         len = USB_DEVICE_DESC_SIZE;
00184                                         break;
00185                                 case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00186                                         pD = (uint8_t *)USB_ConfigDescriptor;
00187                                         for (n = 0; n != SetupPacket.wValue.WB.L; n++)
00188                                         {
00189                                                 if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bLength != 0)
00190                                                 {
00191                                                         pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00192                                                 }
00193                                         }
00194                                         if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bLength == 0)
00195                                         {
00196                                                 return (FALSE);
00197                                         }
00198                                         EP0Data.pData = pD;
00199                                         len = ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00200                                         break;
00201                                 case USB_STRING_DESCRIPTOR_TYPE:
00202                                         EP0Data.pData = (uint8_t *)USB_StringDescriptor + SetupPacket.wValue.WB.L;
00203                                         len = ((USB_STRING_DESCRIPTOR *)EP0Data.pData)->bLength;
00204                                         break;
00205                                 default:
00206                                         return (FALSE);
00207                         }
00208                         break;
00209                 case REQUEST_TO_INTERFACE:
00210                         switch (SetupPacket.wValue.WB.H)
00211                         {
00212 #if USB_HID
00213                                 case HID_HID_DESCRIPTOR_TYPE:
00214                                         if (SetupPacket.wIndex.WB.L != USB_HID_IF_NUM)
00215                                         {
00216                                                 return (FALSE);    /* Only Single HID Interface is supported */
00217                                         }
00218                                         EP0Data.pData = (uint8_t *)USB_ConfigDescriptor + HID_DESC_OFFSET;
00219                                         len = HID_DESC_SIZE;
00220                                         break;
00221                                 case HID_REPORT_DESCRIPTOR_TYPE:
00222                                         if (SetupPacket.wIndex.WB.L != USB_HID_IF_NUM)
00223                                         {
00224                                                 return (FALSE);    /* Only Single HID Interface is supported */
00225                                         }
00226                                         EP0Data.pData = (uint8_t *)HID_ReportDescriptor;
00227                                         len = HID_ReportDescSize;
00228                                         break;
00229                                 case HID_PHYSICAL_DESCRIPTOR_TYPE:
00230                                         return (FALSE);      /* HID Physical Descriptor is not supported */
00231 #endif
00232                                 default:
00233                                         return (FALSE);
00234                         }
00235                         break;
00236                 default:
00237                         return (FALSE);
00238         }
00239
00240         if (EP0Data.Count > len)
00241         {
00242                 EP0Data.Count = len;
00243         }
00244         USB_DataInStage();
00245
00246         return (TRUE);
00247 }
00248
00249
00250 /*
00251  *  Set Configuration USB Request
00252  *    Parameters:      None (global SetupPacket)
00253  *    Return Value:    TRUE - Success, FALSE - Error
00254  */
00255
00256 #ifdef __IAR_SYSTEMS_ICC__
00257 inline uint32_t USB_SetConfiguration (void) {
00258 #else
00259 __inline uint32_t USB_SetConfiguration (void) {
00260 #endif
00261         USB_COMMON_DESCRIPTOR *pD;
00262         uint32_t  alt, n;
00263         uint32_t tmp;
00264
00265         if (SetupPacket.wValue.WB.L)
00266         {
00267                 pD = (USB_COMMON_DESCRIPTOR *)USB_ConfigDescriptor;
00268                 while (pD->bLength)
00269                 {
00270                         switch (pD->bDescriptorType)
00271                         {
00272                                 case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00273                                         if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bConfigurationValue == SetupPacket.wValue.WB.L)
00274                                         {
00275                                                 USB_Configuration = SetupPacket.wValue.WB.L;
00276                                                 USB_Configure(TRUE);
00277                                         /*      if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bmAttributes & USB_CONFIG_SELF_POWERED)
00278                                                 {
00279                                                         USB_DeviceStatus |=  USB_GETSTATUS_SELF_POWERED;
00280                                                 }
00281                                                 else
00282                                                 {
00283                                                         USB_DeviceStatus &= ~USB_GETSTATUS_SELF_POWERED;
00284                                                 }        */
00285                                         }
00286                                         else
00287                                         {
00288 //                                              (uint8_t *)pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00289                                                 tmp = (uint32_t)pD;
00290                                                 tmp += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00291                                                 pD = (USB_COMMON_DESCRIPTOR *)tmp;
00292                                                 continue;
00293                                         }
00294                                         break;
00295                                 case USB_INTERFACE_DESCRIPTOR_TYPE:
00296                                         alt = ((USB_INTERFACE_DESCRIPTOR *)pD)->bAlternateSetting;
00297                                         break;
00298                                 case USB_ENDPOINT_DESCRIPTOR_TYPE:
00299                                         if (alt == 0)
00300                                         {
00301                                                 n = ((USB_ENDPOINT_DESCRIPTOR *)pD)->bEndpointAddress & 0x8F;
00302                                                 USB_ConfigEP((USB_ENDPOINT_DESCRIPTOR *)pD);
00303                                                 USB_EnableEP(n);
00304                                                 USB_ResetEP(n);
00305                                         }
00306                                         break;
00307                         }
00308 //                      (uint8_t *)pD += pD->bLength;
00309                         tmp = (uint32_t)pD;
00310                         tmp += pD->bLength;
00311                         pD = (USB_COMMON_DESCRIPTOR *)tmp;
00312                 }
00313         }
00314         else
00315         {
00316                 USB_Configuration = 0;
00317                 USB_Configure(FALSE);
00318         }
00319
00320         if (USB_Configuration == SetupPacket.wValue.WB.L)
00321         {
00322                 return (TRUE);
00323         }
00324         else
00325         {
00326                 return (FALSE);
00327         }
00328 }
00329
00330 /*
00331  *  USB Endpoint 0 Event Callback
00332  *    Parameter:       event
00333  */
00334
00335 void USB_EndPoint0 (uint32_t event)
00336 {
00337         switch (event)
00338         {
00339                 case USB_EVT_SETUP:
00340                         USB_SetupStage();
00341                         EP0Data.Count = SetupPacket.wLength;
00342                         switch (SetupPacket.bmRequestType.BM.Type)
00343                         {
00344                                 case REQUEST_STANDARD:
00345                                         switch (SetupPacket.bRequest)
00346                                         {
00347                                                 case USB_REQUEST_SET_ADDRESS:
00348                                                         switch (SetupPacket.bmRequestType.BM.Recipient)
00349                                                         {
00350                                                                 case REQUEST_TO_DEVICE:
00351                                                                         USB_DeviceAddress = SetupPacket.wValue.WB.L;//0x80 | SetupPacket.wValue.WB.L;
00352                                                                         USB_StatusInStage();
00353                                                                         USB_SetAddress(USB_DeviceAddress);
00354                                                                         break;
00355                                                                 default:
00356                                                                         break;
00357                                         }
00358                                         break;
00359
00360                                                 case USB_REQUEST_GET_DESCRIPTOR:
00361                                                         USB_GetDescriptor();
00362                                                         break;
00363
00364                                         /*      case USB_REQUEST_GET_CONFIGURATION:
00365                                                         switch (SetupPacket.bmRequestType.BM.Recipient)
00366                                                         {
00367                                                                 case REQUEST_TO_DEVICE:
00368                                                                         EP0Data.pData = &USB_Configuration;
00369                                                                         USB_DataInStage();
00370                                                                         break;
00371                                                                 default:
00372                                                                         break;
00373                                                         }
00374                                                         break;  */
00375
00376                                                 case USB_REQUEST_SET_CONFIGURATION:
00377                                                         switch (SetupPacket.bmRequestType.BM.Recipient)
00378                                                         {
00379                                                                 case REQUEST_TO_DEVICE:
00380                                                                         if (!USB_SetConfiguration())
00381                                                                         {
00382                                                                                 USB_SetStallEP(0x80);
00383                                                                                 EP0Data.Count = 0;
00384                                                                                 break;
00385                                                                         }
00386                                                                         USB_StatusInStage();
00387 #if USB_CONFIGURE_EVENT
00388                                                         USB_Configure_Event();
00389 #endif
00390                                                                         break;
00391                                                                 default:
00392                                                                         break;
00393                                                         }
00394                                                         break;
00395
00396                                         default:
00397                                                 break;
00398
00399                                         }
00400                                         break;
00401
00402                                 case REQUEST_CLASS:
00403 #if USB_CLASS
00404                                         switch (SetupPacket.bmRequestType.BM.Recipient)
00405                                         {
00406                                                 case REQUEST_TO_INTERFACE:
00407 #if USB_HID
00408                                                         if (SetupPacket.wIndex.WB.L == USB_HID_IF_NUM)
00409                                                         {
00410                                                                 switch (SetupPacket.bRequest)
00411                                                                 {
00412                                                                         case HID_REQUEST_GET_REPORT:
00413                                                                                 if (HID_GetReport())
00414                                                                                 {
00415                                                                                         EP0Data.pData = EP0Buf;
00416                                                                                         USB_DataInStage();
00417                                                                                 }
00418                                                                                 break;
00419                                                                         case HID_REQUEST_SET_REPORT:
00420                                                                                 EP0Data.pData = EP0Buf;
00421                                                                                 break;
00422                                                                         case HID_REQUEST_GET_IDLE:
00423                                                                                 if (HID_GetIdle())
00424                                                                                 {
00425                                                                                         EP0Data.pData = EP0Buf;
00426                                                                                         USB_DataInStage();
00427                                                                                 }
00428                                                                                 break;
00429                                                                         case HID_REQUEST_SET_IDLE:
00430                                                                                 if (HID_SetIdle())
00431                                                                                 {
00432                                                                                         USB_StatusInStage();
00433                                                                                 }
00434                                                                                 break;
00435                                                                         case HID_REQUEST_GET_PROTOCOL:
00436                                                                                 if (HID_GetProtocol())
00437                                                                                 {
00438                                                                                         EP0Data.pData = EP0Buf;
00439                                                                                         USB_DataInStage();
00440                                                                                 }
00441                                                                                 break;
00442                                                                         case HID_REQUEST_SET_PROTOCOL:
00443                                                                                 if (HID_SetProtocol())
00444                                                                                 {
00445                                                                                         USB_StatusInStage();
00446                                                                                 }
00447                                                                                 break;
00448                                                                         default:
00449                                                                                 break;
00450                                                                 }
00451                                                         }
00452 #endif  /* USB_HID */
00453                                                 default:
00454                                                         break;
00455                                         }
00456                                         break;
00457 #else
00458 #endif  /* USB_CLASS */
00459
00460                                 case REQUEST_VENDOR:
00461                                         break;
00462
00463                                 default:
00464                                         USB_SetStallEP(0x80);
00465                                         EP0Data.Count = 0;
00466                                         break;
00467                         }
00468                         break;
00469
00470                 case USB_EVT_OUT:
00471                         if (SetupPacket.bmRequestType.BM.Dir == 0)
00472                         {
00473                                 if (EP0Data.Count)
00474                                 {
00475                                         USB_DataOutStage();
00476                                         if (EP0Data.Count == 0)
00477                                         {
00478                                                 switch (SetupPacket.bmRequestType.BM.Type)
00479                                                 {
00480                                                         case REQUEST_STANDARD:
00481                                                                 USB_SetStallEP(0x80);
00482                                                                 //EP0Data.Count = 0;
00483                                                                 break;
00484 #if (USB_CLASS)
00485                                                         case REQUEST_CLASS:
00486                                                                 switch (SetupPacket.bmRequestType.BM.Recipient)
00487                                                                 {
00488                                                                         case REQUEST_TO_INTERFACE:
00489 #if USB_HID
00490                                                                                 if (SetupPacket.wIndex.WB.L == USB_HID_IF_NUM)
00491                                                                                 {
00492                                                                                         if (!HID_SetReport())
00493                                                                                         {
00494                                                                                                 USB_SetStallEP(0x80);
00495                                                                                                 //EP0Data.Count = 0;
00496                                                                                                 //break;
00497                                                                                         }
00498                                                                                         break;
00499                                                                                         //HID_SetReport();
00500                                                                                 }
00501 #endif
00502                                                                                 USB_SetStallEP(0x80);
00503                                                                                 //EP0Data.Count = 0;
00504                                                                                 break;
00505                                                                         case REQUEST_TO_ENDPOINT:
00506                                                                                 USB_SetStallEP(0x80);
00507                                                                                 //EP0Data.Count = 0;
00508                                                                                 break;
00509                                                                         default:
00510                                                                                 USB_SetStallEP(0x80);
00511                                                                                 //EP0Data.Count = 0;
00512                                                                                 break;
00513                                                                 }
00514                                                                 break;
00515 #endif
00516                                                         default:
00517                                                                 USB_SetStallEP(0x80);
00518                                                                 //EP0Data.Count = 0;
00519                                                                 break;
00520                                                 }
00521                                                 USB_StatusInStage();
00522                                         }
00523                                 }
00524                         }
00525                         else
00526                         {
00527                                 ;//USB_StatusOutStage();
00528                         }
00529
00530
00531                         break;
00532
00533                 case USB_EVT_IN:
00534                         if (SetupPacket.bmRequestType.BM.Dir == 1)
00535                         {
00536                                 if(EP0Data.Count > 0) // ysq add
00537                                         USB_DataInStage();
00538                         }
00539                         //else
00540                         //{
00541                         //      if (USB_DeviceAddress & 0x80)
00542                         //      {
00543                         //              USB_DeviceAddress &= 0x7F;
00544                         //              USB_SetAddress(USB_DeviceAddress);
00545                         //      }
00546                         //}
00547                         break;
00548
00549                 case USB_EVT_IN_STALL:
00550                         USB_ClrStallEP(0x80);
00551                         break;
00552
00553                 case USB_EVT_OUT_STALL:
00554                         USB_ClrStallEP(0x00);
00555                         break;
00556         }
00557 }
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbcore.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBCORE.H
00005  *      Purpose: USB Core Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBCORE_H__
00020 #define __USBCORE_H__
00021
00022
00023 /* USB Endpoint Data Structure */
00024 typedef struct _USB_EP_DATA {
00025   uint8_t  *pData;
00026   uint16_t   Count;
00027 } USB_EP_DATA;
00028
00029 /* USB Core Global Variables */
00030 extern uint16_t  USB_DeviceStatus;
00031 extern uint8_t  USB_DeviceAddress;
00032 extern uint8_t  USB_Configuration;
00033 extern uint32_t USB_EndPointMask;
00034 extern uint32_t USB_EndPointHalt;
00035 extern uint8_t  USB_AltSetting[USB_IF_NUM];
00036
00037 /* USB Endpoint 0 Buffer */
00038 extern uint8_t  EP0Buf[USB_MAX_PACKET0];
00039
00040 /* USB Endpoint 0 Data Info */
00041 extern USB_EP_DATA EP0Data;
00042
00043 /* USB Setup Packet */
00044 extern USB_SETUP_PACKET SetupPacket;
00045
00046 /* USB Core Functions */
00047 extern void  USB_ResetCore (void);
00048
00049
00050 #endif  /* __USBCORE_H__ */
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbdesc.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbdesc.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBDESC.C
00005  *      Purpose: USB Descriptors
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include "lpc_types.h"
00020
00021 #include "usb.h"
00022 #include "usbcfg.h"
00023 #include "usbdesc.h"
00024
00025 #include "hid.h"
00026
00027 /* HID Report Descriptor */
00028 const uint8_t HID_ReportDescriptor[] = {
00029   HID_UsagePageVendor(0x00),
00030   HID_Usage(0x01),
00031   HID_Collection(HID_Application),
00032     HID_UsagePage(HID_USAGE_PAGE_BUTTON),
00033     HID_UsageMin(1),
00034     HID_UsageMax(3),
00035     HID_LogicalMin(0),
00036     HID_LogicalMax(1),
00037     HID_ReportCount(3),
00038     HID_ReportSize(1),
00039     HID_Input(HID_Data | HID_Variable | HID_Absolute),
00040     HID_ReportCount(1),
00041     HID_ReportSize(5),
00042     HID_Input(HID_Constant),
00043     HID_UsagePage(HID_USAGE_PAGE_LED),
00044     HID_Usage(HID_USAGE_LED_GENERIC_INDICATOR),
00045     HID_LogicalMin(0),
00046     HID_LogicalMax(1),
00047     HID_ReportCount(8),
00048     HID_ReportSize(1),
00049     HID_Output(HID_Data | HID_Variable | HID_Absolute),
00050   HID_EndCollection,
00051 };
00052
00053 const uint16_t HID_ReportDescSize = sizeof(HID_ReportDescriptor);
00054
00055
00056 /* USB Standard Device Descriptor */
00057 const uint8_t USB_DeviceDescriptor[] = {
00058   USB_DEVICE_DESC_SIZE,              /* bLength */
00059   USB_DEVICE_DESCRIPTOR_TYPE,        /* bDescriptorType */
00060   WBVAL(0x0200), /* 2.00 */          /* bcdUSB */
00061   0x00,                              /* bDeviceClass */
00062   0x00,                              /* bDeviceSubClass */
00063   0x00,                              /* bDeviceProtocol */
00064   USB_MAX_PACKET0,                   /* bMaxPacketSize0 */
00065   WBVAL(0xC251),                     /* idVendor */
00066   WBVAL(0x2201),                     /* idProduct */
00067   WBVAL(0x0100), /* 1.00 */          /* bcdDevice */
00068   0x04,                              /* iManufacturer */
00069   0x20,                              /* iProduct */
00070   0x42,                              /* iSerialNumber */
00071   0x01                               /* bNumConfigurations */
00072 };
00073
00074 /* USB Configuration Descriptor */
00075 /*   All Descriptors (Configuration, Interface, Endpoint, Class, Vendor */
00076 const uint8_t USB_ConfigDescriptor[] = {
00077 /* Configuration 1 */
00078   USB_CONFIGUARTION_DESC_SIZE,       /* bDescriptorType */
00079   USB_CONFIGURATION_DESCRIPTOR_TYPE, /* bDescriptorType */
00080   WBVAL(                             /* wTotalLength */
00081     USB_CONFIGUARTION_DESC_SIZE +
00082     USB_INTERFACE_DESC_SIZE     +
00083     HID_DESC_SIZE               +
00084     USB_ENDPOINT_DESC_SIZE
00085   ),
00086   0x01,                              /* bNumInterfaces */
00087   0x01,                              /* bConfigurationValue */
00088   0x00,                              /* iConfiguration */
00089   USB_CONFIG_BUS_POWERED /*|*/       /* bmAttributes */
00090 /*USB_CONFIG_REMOTE_WAKEUP*/,
00091   USB_CONFIG_POWER_MA(100),          /* bMaxPower */
00092 /* Interface 0, Alternate Setting 0, HID Class */
00093   USB_INTERFACE_DESC_SIZE,           /* bLength */
00094   USB_INTERFACE_DESCRIPTOR_TYPE,     /* bDescriptorType */
00095   0x00,                              /* bInterfaceNumber */
00096   0x00,                              /* bAlternateSetting */
00097   0x01,                              /* bNumEndpoints */
00098   USB_DEVICE_CLASS_HUMAN_INTERFACE,  /* bInterfaceClass */
00099   HID_SUBCLASS_NONE,                 /* bInterfaceSubClass */
00100   HID_PROTOCOL_NONE,                 /* bInterfaceProtocol */
00101   0x5C,                              /* iInterface */
00102 /* HID Class Descriptor */
00103 /* HID_DESC_OFFSET = 0x0012 */
00104   HID_DESC_SIZE,                     /* bLength */
00105   HID_HID_DESCRIPTOR_TYPE,           /* bDescriptorType */
00106   WBVAL(0x0100), /* 1.00 */          /* bcdHID */
00107   0x00,                              /* bCountryCode */
00108   0x01,                              /* bNumDescriptors */
00109   HID_REPORT_DESCRIPTOR_TYPE,        /* bDescriptorType */
00110   WBVAL(HID_REPORT_DESC_SIZE),       /* wDescriptorLength */
00111 /* Endpoint, HID Interrupt In */
00112   USB_ENDPOINT_DESC_SIZE,            /* bLength */
00113   USB_ENDPOINT_DESCRIPTOR_TYPE,      /* bDescriptorType */
00114   USB_ENDPOINT_IN(1),                /* bEndpointAddress */
00115   USB_ENDPOINT_TYPE_INTERRUPT,       /* bmAttributes */
00116   WBVAL(0x0004),                     /* wMaxPacketSize */
00117   0x20,          /* 32ms */          /* bInterval */
00118 /* Terminator */
00119   0                                  /* bLength */
00120 };
00121
00122 /* USB String Descriptor (optional) */
00123 const uint8_t USB_StringDescriptor[] = {
00124 /* Index 0x00: LANGID Codes */
00125   0x04,                              /* bLength */
00126   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00127   WBVAL(0x0409), /* US English */    /* wLANGID */
00128 /* Index 0x04: Manufacturer */
00129   0x1C,                              /* bLength */
00130   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00131   'N',0,
00132   'X',0,
00133   'P',0,
00134   ' ',0,
00135   'S',0,
00136   'E',0,
00137   'M',0,
00138   'I',0,
00139   'C',0,
00140   'O',0,
00141   'N',0,
00142   'D',0,
00143   ' ',0,
00144 /* Index 0x20: Product */
00145   0x22,                              /* bLength */
00146   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00147   'L',0,
00148   'P',0,
00149   'C',0,
00150   '1',0,
00151   '7',0,
00152   'x',0,
00153   'x',0,
00154   ' ',0,
00155   'H',0,
00156   'I',0,
00157   'D',0,
00158   ' ',0,
00159   ' ',0,
00160   ' ',0,
00161   ' ',0,
00162   ' ',0,
00163 /* Index 0x42: Serial Number */
00164   0x1A,                              /* bLength */
00165   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00166   'D',0,
00167   'E',0,
00168   'M',0,
00169   'O',0,
00170   '0',0,
00171   '0',0,
00172   '0',0,
00173   '0',0,
00174   '0',0,
00175   '0',0,
00176   '0',0,
00177   '0',0,
00178 /* Index 0x5C: Interface 0, Alternate Setting 0 */
00179   0x08,                              /* bLength */
00180   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00181   'H',0,
00182   'I',0,
00183   'D',0,
00184 };
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbdesc.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbdesc.h
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00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBDESC.H
00005  *      Purpose: USB Descriptors Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *---------------------------------------------------------------------------*/
00016
00017 #ifndef __USBDESC_H__
00018 #define __USBDESC_H__
00019
00020
00021 #define WBVAL(x) (x & 0xFF),((x >> 8) & 0xFF)
00022
00023 #define USB_DEVICE_DESC_SIZE        (sizeof(USB_DEVICE_DESCRIPTOR))
00024 #define USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))
00025 #define USB_INTERFACE_DESC_SIZE     (sizeof(USB_INTERFACE_DESCRIPTOR))
00026 #define USB_ENDPOINT_DESC_SIZE      (sizeof(USB_ENDPOINT_DESCRIPTOR))
00027
00028 #define HID_DESC_OFFSET              0x0012
00029 #define HID_DESC_SIZE               (sizeof(HID_DESCRIPTOR))
00030 #define HID_REPORT_DESC_SIZE        (sizeof(HID_ReportDescriptor))
00031
00032 extern const uint8_t USB_DeviceDescriptor[];
00033 extern const uint8_t USB_ConfigDescriptor[];
00034 extern const uint8_t USB_StringDescriptor[];
00035
00036 extern const uint8_t HID_ReportDescriptor[];
00037 extern const uint16_t HID_ReportDescSize;
00038
00039
00040 #endif  /* __USBDESC_H__ */
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBHW.C
00005  *      Purpose: USB Hardware Layer Module for NXP Semiconductor LPC family MCUs
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include "LPC17xx.h"                        /* LPC17xx definitions */
00020
00021 #include "lpc_types.h"
00022
00023 #include "usb.h"
00024 #include "usbcfg.h"
00025 #include "usbreg.h"
00026 #include "usbhw.h"
00027 #include "usbcore.h"
00028 #include "usbuser.h"
00029
00030 #ifndef __IAR_SYSTEMS_ICC__
00031 #pragma diag_suppress 1441
00032 #endif
00033
00034 #define EP_MSK_CTRL 0x0001      /* Control Endpoint Logical Address Mask */
00035 #define EP_MSK_BULK 0xC924      /* Bulk Endpoint Logical Address Mask */
00036 #define EP_MSK_INT  0x4492      /* Interrupt Endpoint Logical Address Mask */
00037 #define EP_MSK_ISO  0x1248      /* Isochronous Endpoint Logical Address Mask */
00038
00039
00040 #if USB_DMA
00041
00042 #if defined (  __CC_ARM  )
00043 #pragma arm section zidata = "USB_RAM"
00044 uint32_t UDCA[USB_EP_NUM];                     /* UDCA in USB RAM */
00045 uint32_t DD_NISO_Mem[4*DD_NISO_CNT];           /* Non-Iso DMA Descriptor Memory */
00046 uint32_t DD_ISO_Mem [5*DD_ISO_CNT];            /* Iso DMA Descriptor Memory */
00047 #pragma arm section zidata
00048 uint32_t udca[USB_EP_NUM];                     /* UDCA saved values */
00049 uint32_t DDMemMap[2];                          /* DMA Descriptor Memory Usage */
00050 #endif
00051
00052 #if defined (  __IAR_SYSTEMS_ICC__  )
00053 #pragma location = "USB_RAM"
00054 uint32_t UDCA[USB_EP_NUM];                     /* UDCA in USB RAM */
00055 #pragma location = "USB_RAM"
00056 uint32_t DD_NISO_Mem[4*DD_NISO_CNT];           /* Non-Iso DMA Descriptor Memory */
00057 #pragma location = "USB_RAM"
00058 uint32_t DD_ISO_Mem [5*DD_ISO_CNT];            /* Iso DMA Descriptor Memory */
00059
00060 uint32_t udca[USB_EP_NUM];                     /* UDCA saved values */
00061 uint32_t DDMemMap[2];                          /* DMA Descriptor Memory Usage */
00062 #endif
00063
00064 #if defined (  __GNUC__  )
00065 uint32_t UDCA[USB_EP_NUM] __attribute__((section("USB_RAM")));                          /* UDCA in USB RAM */
00066 uint32_t DD_NISO_Mem[4*DD_NISO_CNT] __attribute__((section("USB_RAM")));    /* Non-Iso DMA Descriptor Memory */
00067 uint32_t DD_ISO_Mem [5*DD_ISO_CNT] __attribute__((section("USB_RAM")));     /* Iso DMA Descriptor Memory */
00068 uint32_t udca[USB_EP_NUM];                                                                              /* UDCA saved values */
00069 uint32_t DDMemMap[2];                                                                                   /* DMA Descriptor Memory Usage */
00070 #endif
00071
00072 #endif
00073
00074
00075 /*
00076  *  Get Endpoint Physical Address
00077  *    Parameters:      EPNum: Endpoint Number
00078  *                       EPNum.0..3: Address
00079  *                       EPNum.7:    Dir
00080  *    Return Value:    Endpoint Physical Address
00081  */
00082
00083 uint32_t EPAdr (uint32_t EPNum) {
00084   uint32_t val;
00085
00086   val = (EPNum & 0x0F) << 1;
00087   if (EPNum & 0x80) {
00088     val += 1;
00089   }
00090   return (val);
00091 }
00092
00093
00094 /*
00095  *  Write Command
00096  *    Parameters:      cmd:   Command
00097  *    Return Value:    None
00098  */
00099
00100 void WrCmd (uint32_t cmd) {
00101
00102         LPC_USB->USBDevIntClr = CCEMTY_INT;
00103         LPC_USB->USBCmdCode = cmd;
00104         while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00105 }
00106
00107
00108 /*
00109  *  Write Command Data
00110  *    Parameters:      cmd:   Command
00111  *                     val:   Data
00112  *    Return Value:    None
00113  */
00114
00115 void WrCmdDat (uint32_t cmd, uint32_t val) {
00116
00117   LPC_USB->USBDevIntClr = CCEMTY_INT;
00118   LPC_USB->USBCmdCode = cmd;
00119   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00120   LPC_USB->USBDevIntClr = CCEMTY_INT;
00121   LPC_USB->USBCmdCode = val;
00122   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00123 }
00124
00125
00126 /*
00127  *  Read Command Data
00128  *    Parameters:      cmd:   Command
00129  *    Return Value:    Data Value
00130  */
00131
00132 uint32_t RdCmdDat (uint32_t cmd) {
00133
00134         LPC_USB->USBDevIntClr = CCEMTY_INT | CDFULL_INT;
00135         LPC_USB->USBCmdCode = cmd;
00136         while ((LPC_USB->USBDevIntSt & CDFULL_INT) == 0);
00137         return (LPC_USB->USBCmdData);
00138 }
00139
00140
00141 /*
00142  *  USB Initialize Function
00143  *   Called by the User to initialize USB
00144  *    Return Value:    None
00145  */
00146
00147 void USB_Init (void) {
00148
00149         LPC_PINCON->PINSEL1 &= ~((3<<26)|(3<<28));   /* P0.29 D+, P0.30 D- */
00150         LPC_PINCON->PINSEL1 |=  ((1<<26)|(1<<28));   /* PINSEL1 26.27, 28.29  = 01 */
00151
00152         LPC_PINCON->PINSEL3 &= ~((3<< 4)|(3<<28));   /* P1.18 GoodLink, P1.30 VBUS */
00153         LPC_PINCON->PINSEL3 |=  ((1<< 4)|(2<<28));   /* PINSEL3 4.5 = 01, 28.29 = 10 */
00154
00155         LPC_PINCON->PINSEL4 &= ~((3<<18)        );   /* P2.9 SoftConnect */
00156         LPC_PINCON->PINSEL4 |=  ((1<<18)        );   /* PINSEL4 18.19 = 01 */
00157
00158         LPC_SC->PCONP |= (1UL<<31);                /* USB PCLK -> enable USB Per.       */
00159
00160         LPC_USB->USBClkCtrl = 0x1A;                  /* Dev, PortSel, AHB clock enable */
00161         while ((LPC_USB->USBClkSt & 0x1A) != 0x1A);
00162
00163         NVIC_EnableIRQ(USB_IRQn);               /* enable USB interrupt */
00164
00165         USB_Reset();
00166         USB_SetAddress(0);
00167 }
00168
00169
00170 /*
00171  *  USB Connect Function
00172  *   Called by the User to Connect/Disconnect USB
00173  *    Parameters:      con:   Connect/Disconnect
00174  *    Return Value:    None
00175  */
00176
00177 void USB_Connect (uint32_t con) {
00178   WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(con ? DEV_CON : 0));
00179 }
00180
00181
00182 /*
00183  *  USB Reset Function
00184  *   Called automatically on USB Reset
00185  *    Return Value:    None
00186  */
00187
00188 void USB_Reset (void) {
00189 #if USB_DMA
00190   uint32_t n;
00191 #endif
00192
00193   LPC_USB->USBEpInd = 0;
00194   LPC_USB->USBMaxPSize = USB_MAX_PACKET0;
00195   LPC_USB->USBEpInd = 1;
00196   LPC_USB->USBMaxPSize = USB_MAX_PACKET0;
00197   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00198
00199   LPC_USB->USBEpIntClr  = 0xFFFFFFFF;
00200   LPC_USB->USBEpIntEn   = 0xFFFFFFFF ^ USB_DMA_EP;
00201   LPC_USB->USBDevIntClr = 0xFFFFFFFF;
00202   LPC_USB->USBDevIntEn  = DEV_STAT_INT    | EP_SLOW_INT    |
00203                (USB_SOF_EVENT   ? FRAME_INT : 0) |
00204                (USB_ERROR_EVENT ? ERR_INT   : 0);
00205
00206 #if USB_DMA
00207   LPC_USB->USBUDCAH   = USB_RAM_ADR;
00208   LPC_USB->USBDMARClr = 0xFFFFFFFF;
00209   LPC_USB->USBEpDMADis  = 0xFFFFFFFF;
00210   LPC_USB->USBEpDMAEn   = USB_DMA_EP;
00211   LPC_USB->USBEoTIntClr = 0xFFFFFFFF;
00212   LPC_USB->USBNDDRIntClr = 0xFFFFFFFF;
00213   LPC_USB->USBSysErrIntClr = 0xFFFFFFFF;
00214   LPC_USB->USBDMAIntEn  = 0x00000007;
00215   DDMemMap[0] = 0x00000000;
00216   DDMemMap[1] = 0x00000000;
00217   for (n = 0; n < USB_EP_NUM; n++) {
00218     udca[n] = 0;
00219     UDCA[n] = 0;
00220   }
00221 #endif
00222 }
00223
00224
00225 /*
00226  *  USB Suspend Function
00227  *   Called automatically on USB Suspend
00228  *    Return Value:    None
00229  */
00230
00231 void USB_Suspend (void) {
00232   /* Performed by Hardware */
00233 }
00234
00235
00236 /*
00237  *  USB Resume Function
00238  *   Called automatically on USB Resume
00239  *    Return Value:    None
00240  */
00241
00242 void USB_Resume (void) {
00243   /* Performed by Hardware */
00244 }
00245
00246
00247 /*
00248  *  USB Remote Wakeup Function
00249  *   Called automatically on USB Remote Wakeup
00250  *    Return Value:    None
00251  */
00252
00253 void USB_WakeUp (void) {
00254
00255   if (USB_DeviceStatus & USB_GETSTATUS_REMOTE_WAKEUP) {
00256     WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(DEV_CON));
00257   }
00258 }
00259
00260
00261 /*
00262  *  USB Remote Wakeup Configuration Function
00263  *    Parameters:      cfg:   Enable/Disable
00264  *    Return Value:    None
00265  */
00266
00267 void USB_WakeUpCfg (uint32_t cfg) {
00268   /* Not needed */
00269 }
00270
00271
00272 /*
00273  *  USB Set Address Function
00274  *    Parameters:      adr:   USB Address
00275  *    Return Value:    None
00276  */
00277
00278 void USB_SetAddress (uint32_t adr) {
00279   WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /* Don't wait for next */
00280   //WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /*  Setup Status Phase */
00281 }
00282
00283
00284 /*
00285  *  USB Configure Function
00286  *    Parameters:      cfg:   Configure/Deconfigure
00287  *    Return Value:    None
00288  */
00289
00290 void USB_Configure (uint32_t cfg) {
00291
00292   WrCmdDat(CMD_CFG_DEV, DAT_WR_BYTE(cfg ? CONF_DVICE : 0));
00293
00294   LPC_USB->USBReEp = 0x00000003;
00295   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00296   LPC_USB->USBDevIntClr = EP_RLZED_INT;
00297 }
00298
00299
00300 /*
00301  *  Configure USB Endpoint according to Descriptor
00302  *    Parameters:      pEPD:  Pointer to Endpoint Descriptor
00303  *    Return Value:    None
00304  */
00305
00306 void USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD) {
00307   uint32_t num;
00308
00309   num = EPAdr(pEPD->bEndpointAddress);
00310   LPC_USB->USBReEp |= (1 << num);
00311   LPC_USB->USBEpInd = num;
00312   LPC_USB->USBMaxPSize = pEPD->wMaxPacketSize;
00313   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00314   LPC_USB->USBDevIntClr = EP_RLZED_INT;
00315 }
00316
00317
00318 /*
00319  *  Set Direction for USB Control Endpoint
00320  *    Parameters:      dir:   Out (dir == 0), In (dir <> 0)
00321  *    Return Value:    None
00322  */
00323
00324 void USB_DirCtrlEP (uint32_t dir) {
00325   /* Not needed */
00326 }
00327
00328
00329 /*
00330  *  Enable USB Endpoint
00331  *    Parameters:      EPNum: Endpoint Number
00332  *                       EPNum.0..3: Address
00333  *                       EPNum.7:    Dir
00334  *    Return Value:    None
00335  */
00336
00337 void USB_EnableEP (uint32_t EPNum) {
00338   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00339 }
00340
00341
00342 /*
00343  *  Disable USB Endpoint
00344  *    Parameters:      EPNum: Endpoint Number
00345  *                       EPNum.0..3: Address
00346  *                       EPNum.7:    Dir
00347  *    Return Value:    None
00348  */
00349
00350 void USB_DisableEP (uint32_t EPNum) {
00351   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_DA));
00352 }
00353
00354
00355 /*
00356  *  Reset USB Endpoint
00357  *    Parameters:      EPNum: Endpoint Number
00358  *                       EPNum.0..3: Address
00359  *                       EPNum.7:    Dir
00360  *    Return Value:    None
00361  */
00362
00363 void USB_ResetEP (uint32_t EPNum) {
00364   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00365 }
00366
00367
00368 /*
00369  *  Set Stall for USB Endpoint
00370  *    Parameters:      EPNum: Endpoint Number
00371  *                       EPNum.0..3: Address
00372  *                       EPNum.7:    Dir
00373  *    Return Value:    None
00374  */
00375
00376 void USB_SetStallEP (uint32_t EPNum) {
00377   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_ST));
00378 }
00379
00380
00381 /*
00382  *  Clear Stall for USB Endpoint
00383  *    Parameters:      EPNum: Endpoint Number
00384  *                       EPNum.0..3: Address
00385  *                       EPNum.7:    Dir
00386  *    Return Value:    None
00387  */
00388
00389 void USB_ClrStallEP (uint32_t EPNum) {
00390   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00391 }
00392
00393
00394 /*
00395  *  Read USB Endpoint Data
00396  *    Parameters:      EPNum: Endpoint Number
00397  *                       EPNum.0..3: Address
00398  *                       EPNum.7:    Dir
00399  *                     pData: Pointer to Data Buffer
00400  *    Return Value:    Number of bytes read
00401  */
00402
00403 uint32_t USB_ReadEP (uint32_t EPNum, uint8_t *pData) {
00404   uint32_t cnt, n;
00405
00406   LPC_USB->USBCtrl = ((EPNum & 0x0F) << 2) | CTRL_RD_EN;
00407
00408   do {
00409     cnt = LPC_USB->USBRxPLen;
00410   } while ((cnt & PKT_RDY) == 0);
00411   cnt &= PKT_LNGTH_MASK;
00412
00413   for (n = 0; n < (cnt + 3) / 4; n++) {
00414     *((__packed uint32_t *)pData) = LPC_USB->USBRxData;
00415     pData += 4;
00416   }
00417   LPC_USB->USBCtrl = 0;
00418
00419   if (((EP_MSK_ISO >> EPNum) & 1) == 0) {   /* Non-Isochronous Endpoint */
00420     WrCmd(CMD_SEL_EP(EPAdr(EPNum)));
00421     WrCmd(CMD_CLR_BUF);
00422   }
00423   return (cnt);
00424 }
00425
00426
00427 /*
00428  *  Write USB Endpoint Data
00429  *    Parameters:      EPNum: Endpoint Number
00430  *                       EPNum.0..3: Address
00431  *                       EPNum.7:    Dir
00432  *                     pData: Pointer to Data Buffer
00433  *                     cnt:   Number of bytes to write
00434  *    Return Value:    Number of bytes written
00435  */
00436
00437 uint32_t USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt) {
00438   uint32_t n;
00439
00440   LPC_USB->USBCtrl = ((EPNum & 0x0F) << 2) | CTRL_WR_EN;
00441
00442   LPC_USB->USBTxPLen = cnt;
00443
00444   for (n = 0; n < (cnt + 3) / 4; n++) {
00445           LPC_USB->USBTxData = *((__packed uint32_t *)pData);
00446     pData += 4;
00447   }
00448   LPC_USB->USBCtrl = 0;
00449
00450   WrCmd(CMD_SEL_EP(EPAdr(EPNum)));
00451   WrCmd(CMD_VALID_BUF);
00452   return (cnt);
00453 }
00454
00455
00456 #if USB_DMA
00457
00458
00459 /* DMA Descriptor Memory Layout */
00460 const uint32_t DDAdr[2] = { DD_NISO_ADR, DD_ISO_ADR };
00461 const uint32_t DDSz [2] = { 16,          20         };
00462
00463
00464 /*
00465  *  Setup USB DMA Transfer for selected Endpoint
00466  *    Parameters:      EPNum: Endpoint Number
00467  *                     pDD: Pointer to DMA Descriptor
00468  *    Return Value:    TRUE - Success, FALSE - Error
00469  */
00470
00471 uint32_t USB_DMA_Setup(uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD) {
00472   uint32_t num, ptr, nxt, iso, n;
00473   uint32_t *tmp;
00474
00475   iso = pDD->Cfg.Type.IsoEP;                /* Iso or Non-Iso Descriptor */
00476   num = EPAdr(EPNum);                       /* Endpoint's Physical Address */
00477
00478   ptr = 0;                                  /* Current Descriptor */
00479   nxt = udca[num];                          /* Initial Descriptor */
00480   while (nxt) {                             /* Go through Descriptor List */
00481     ptr = nxt;                              /* Current Descriptor */
00482     if (!pDD->Cfg.Type.Link) {              /* Check for Linked Descriptors */
00483       n = (ptr - DDAdr[iso]) / DDSz[iso];   /* Descriptor Index */
00484       DDMemMap[iso] &= ~(1 << n);           /* Unmark Memory Usage */
00485     }
00486     nxt = *((uint32_t *)ptr);                  /* Next Descriptor */
00487   }
00488
00489   for (n = 0; n < 32; n++) {                /* Search for available Memory */
00490     if ((DDMemMap[iso] & (1 << n)) == 0) {
00491       break;                                /* Memory found */
00492     }
00493   }
00494   if (n == 32) return (FALSE);              /* Memory not available */
00495
00496   DDMemMap[iso] |= 1 << n;                  /* Mark Memory Usage */
00497   nxt = DDAdr[iso] + n * DDSz[iso];         /* Next Descriptor */
00498
00499   if (ptr && pDD->Cfg.Type.Link) {
00500     *((uint32_t *)(ptr + 0))  = nxt;           /* Link in new Descriptor */
00501     *((uint32_t *)(ptr + 4)) |= 0x00000004;    /* Next DD is Valid */
00502   } else {
00503     udca[num] = nxt;                        /* Save new Descriptor */
00504     UDCA[num] = nxt;                        /* Update UDCA in USB */
00505   }
00506
00507   /* Fill in DMA Descriptor */
00508   //*(((uint32_t *)nxt)++) =  0;                 /* Next DD Pointer */
00509   tmp = (uint32_t *)nxt;
00510   *tmp++ = 0;
00511 //  *(((uint32_t *)nxt)++) =  pDD->Cfg.Type.ATLE |
00512 //                       (pDD->Cfg.Type.IsoEP << 4) |
00513 //                       (pDD->MaxSize <<  5) |
00514 //                       (pDD->BufLen  << 16);
00515   *tmp++ =  pDD->Cfg.Type.ATLE |
00516                        (pDD->Cfg.Type.IsoEP << 4) |
00517                        (pDD->MaxSize <<  5) |
00518                        (pDD->BufLen  << 16);
00519 //  *(((uint32_t *)nxt)++) =  pDD->BufAdr;
00520   *tmp++ =  pDD->BufAdr;
00521 //  *(((uint32_t *)nxt)++) =  pDD->Cfg.Type.LenPos << 8;
00522   *tmp++ =  pDD->Cfg.Type.LenPos << 8;
00523   if (iso) {
00524 //    *((uint32_t *)nxt) =  pDD->InfoAdr;
00525           *tmp =  pDD->InfoAdr;
00526   }
00527
00528   return (TRUE); /* Success */
00529 }
00530
00531
00532 /*
00533  *  Enable USB DMA Endpoint
00534  *    Parameters:      EPNum: Endpoint Number
00535  *                       EPNum.0..3: Address
00536  *                       EPNum.7:    Dir
00537  *    Return Value:    None
00538  */
00539
00540 void USB_DMA_Enable (uint32_t EPNum) {
00541         LPC_USB->USBEpDMAEn = 1 << EPAdr(EPNum);
00542 }
00543
00544
00545 /*
00546  *  Disable USB DMA Endpoint
00547  *    Parameters:      EPNum: Endpoint Number
00548  *                       EPNum.0..3: Address
00549  *                       EPNum.7:    Dir
00550  *    Return Value:    None
00551  */
00552
00553 void USB_DMA_Disable (uint32_t EPNum) {
00554         LPC_USB->USBEpDMADis = 1 << EPAdr(EPNum);
00555 }
00556
00557
00558 /*
00559  *  Get USB DMA Endpoint Status
00560  *    Parameters:      EPNum: Endpoint Number
00561  *                       EPNum.0..3: Address
00562  *                       EPNum.7:    Dir
00563  *    Return Value:    DMA Status
00564  */
00565
00566 uint32_t USB_DMA_Status (uint32_t EPNum) {
00567   uint32_t ptr, val;
00568
00569   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00570   if (ptr == 0) return (USB_DMA_INVALID);
00571
00572   val = *((uint32_t *)(ptr + 3*4));            /* Status Information */
00573   switch ((val >> 1) & 0x0F) {
00574     case 0x00:                              /* Not serviced */
00575       return (USB_DMA_IDLE);
00576     case 0x01:                              /* Being serviced */
00577       return (USB_DMA_BUSY);
00578     case 0x02:                              /* Normal Completition */
00579       return (USB_DMA_DONE);
00580     case 0x03:                              /* Data Under Run */
00581       return (USB_DMA_UNDER_RUN);
00582     case 0x08:                              /* Data Over Run */
00583       return (USB_DMA_OVER_RUN);
00584     case 0x09:                              /* System Error */
00585       return (USB_DMA_ERROR);
00586   }
00587   return (USB_DMA_UNKNOWN);
00588 }
00589
00590
00591 /*
00592  *  Get USB DMA Endpoint Current Buffer Address
00593  *    Parameters:      EPNum: Endpoint Number
00594  *                       EPNum.0..3: Address
00595  *                       EPNum.7:    Dir
00596  *    Return Value:    DMA Address (or -1 when DMA is Invalid)
00597  */
00598
00599 uint32_t USB_DMA_BufAdr (uint32_t EPNum) {
00600   uint32_t ptr, val;
00601
00602   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00603   if (ptr == 0)
00604   {
00605         return ((uint32_t)(-1));                /* DMA Invalid */
00606   }
00607
00608   val = *((uint32_t *)(ptr + 2*4));         /* Buffer Address */
00609   return (val);                             /* Current Address */
00610 }
00611
00612
00613 /*
00614  *  Get USB DMA Endpoint Current Buffer Count
00615  *   Number of transfered Bytes or Iso Packets
00616  *    Parameters:      EPNum: Endpoint Number
00617  *                       EPNum.0..3: Address
00618  *                       EPNum.7:    Dir
00619  *    Return Value:    DMA Count (or -1 when DMA is Invalid)
00620  */
00621
00622 uint32_t USB_DMA_BufCnt (uint32_t EPNum) {
00623   uint32_t ptr, val;
00624
00625   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00626   if (ptr == 0)
00627   {
00628         return ((uint32_t)(-1));                /* DMA Invalid */
00629   }
00630   val = *((uint32_t *)(ptr + 3*4));         /* Status Information */
00631   return (val >> 16);                       /* Current Count */
00632 }
00633
00634
00635 #endif /* USB_DMA */
00636
00637
00638 /*
00639  *  Get USB Last Frame Number
00640  *    Parameters:      None
00641  *    Return Value:    Frame Number
00642  */
00643
00644 uint32_t USB_GetFrame (void) {
00645   uint32_t val;
00646
00647   WrCmd(CMD_RD_FRAME);
00648   val = RdCmdDat(DAT_RD_FRAME);
00649   val = val | (RdCmdDat(DAT_RD_FRAME) << 8);
00650   return (val);
00651 }
00652
00653
00654 /*
00655  *  USB Interrupt Service Routine
00656  */
00657
00658 void USB_IRQHandler (void) {
00659   uint32_t disr, val, n, m;
00660
00661   disr = LPC_USB->USBDevIntSt;                      /* Device Interrupt Status */
00662   LPC_USB->USBDevIntClr = disr;
00663
00664   /* Device Status Interrupt (Reset, Connect change, Suspend/Resume) */
00665   if (disr & DEV_STAT_INT) {
00666     WrCmd(CMD_GET_DEV_STAT);
00667     val = RdCmdDat(DAT_GET_DEV_STAT);       /* Device Status */
00668     if (val & DEV_RST) {                    /* Reset */
00669       USB_Reset();
00670 #if   USB_RESET_EVENT
00671       USB_Reset_Event();
00672 #endif
00673     }
00674     if (val & DEV_CON_CH) {                 /* Connect change */
00675 #if   USB_POWER_EVENT
00676       USB_Power_Event(val & DEV_CON);
00677 #endif
00678     }
00679     if (val & DEV_SUS_CH) {                 /* Suspend/Resume */
00680       if (val & DEV_SUS) {                  /* Suspend */
00681         USB_Suspend();
00682 #if     USB_SUSPEND_EVENT
00683         USB_Suspend_Event();
00684 #endif
00685       } else {                              /* Resume */
00686         USB_Resume();
00687 #if     USB_RESUME_EVENT
00688         USB_Resume_Event();
00689 #endif
00690       }
00691     }
00692     goto isr_end;
00693   }
00694
00695 #if USB_SOF_EVENT
00696   /* Start of Frame Interrupt */
00697   if (disr & FRAME_INT) {
00698         LPC_USB->USBDevIntClr = FRAME_INT;
00699     USB_SOF_Event();
00700   }
00701 #endif
00702
00703 #if USB_ERROR_EVENT
00704   /* Error Interrupt */
00705   if (disr & ERR_INT) {
00706         LPC_USB->USBDevIntClr = ERR_INT;
00707     WrCmd(CMD_RD_ERR_STAT);
00708     val = RdCmdDat(DAT_RD_ERR_STAT);
00709     USB_Error_Event(val);
00710   }
00711 #endif
00712
00713   /* Endpoint's Slow Interrupt */
00714   if (disr & EP_SLOW_INT) {
00715     while (LPC_USB->USBEpIntSt) {                   /* Endpoint Interrupt Status */
00716
00717       for (n = 0; n < USB_EP_NUM; n++) {    /* Check All Endpoints */
00718         if (LPC_USB->USBEpIntSt & (1 << n)) {
00719           m = n >> 1;
00720           LPC_USB->USBEpIntClr = 1 << n;
00721           while ((LPC_USB->USBDevIntSt & CDFULL_INT) == 0);
00722           val = LPC_USB->USBCmdData;
00723
00724           if ((n & 1) == 0) {               /* OUT Endpoint */
00725             if (n == 0) {                   /* Control OUT Endpoint */
00726               if (val & EP_SEL_STP) {       /* Setup Packet */
00727                 if (USB_P_EP[0]) {
00728                   USB_P_EP[0](USB_EVT_SETUP);
00729                   continue;
00730                 }
00731               }
00732             }
00733             if (USB_P_EP[m]) {
00734               USB_P_EP[m](USB_EVT_OUT);
00735             }
00736           } else {                          /* IN Endpoint */
00737                         //if (USB_P_EP[m]) {
00738               //USB_P_EP[m](USB_EVT_IN);
00739                           if(m==0)
00740                             USB_EndPoint0(USB_EVT_IN);
00741                           if(m==1)
00742                                 USB_EndPoint1(USB_EVT_IN);
00743                           if(m==2)
00744                                 USB_EndPoint2(USB_EVT_IN);
00745                           /* ............. */
00746             //}
00747           }
00748         }
00749       }
00750     }
00751   }
00752
00753 #if USB_DMA
00754   if (LPC_USB->USBDMAIntSt & 0x00000001) {          /* End of Transfer Interrupt */
00755     val = LPC_USB->USBEoTIntSt;
00756     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00757       if (val & (1 << n)) {
00758         m = n >> 1;
00759         if ((n & 1) == 0) {                 /* OUT Endpoint */
00760           if (USB_P_EP[m]) {
00761             USB_P_EP[m](USB_EVT_OUT_DMA_EOT);
00762           }
00763         } else {                            /* IN Endpoint */
00764           if (USB_P_EP[m]) {
00765             USB_P_EP[m](USB_EVT_IN_DMA_EOT);
00766           }
00767         }
00768       }
00769     }
00770     LPC_USB->USBEoTIntClr = val;
00771   }
00772
00773   if (LPC_USB->USBDMAIntSt & 0x00000002) {          /* New DD Request Interrupt */
00774     val = LPC_USB->USBNDDRIntSt;
00775     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00776       if (val & (1 << n)) {
00777         m = n >> 1;
00778         if ((n & 1) == 0) {                 /* OUT Endpoint */
00779           if (USB_P_EP[m]) {
00780             USB_P_EP[m](USB_EVT_OUT_DMA_NDR);
00781           }
00782         } else {                            /* IN Endpoint */
00783           if (USB_P_EP[m]) {
00784             USB_P_EP[m](USB_EVT_IN_DMA_NDR);
00785           }
00786         }
00787       }
00788     }
00789     LPC_USB->USBNDDRIntClr = val;
00790   }
00791
00792   if (LPC_USB->USBDMAIntSt & 0x00000004) {          /* System Error Interrupt */
00793     val = LPC_USB->USBSysErrIntSt;
00794     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00795       if (val & (1 << n)) {
00796         m = n >> 1;
00797         if ((n & 1) == 0) {                 /* OUT Endpoint */
00798           if (USB_P_EP[m]) {
00799             USB_P_EP[m](USB_EVT_OUT_DMA_ERR);
00800           }
00801         } else {                            /* IN Endpoint */
00802           if (USB_P_EP[m]) {
00803             USB_P_EP[m](USB_EVT_IN_DMA_ERR);
00804           }
00805         }
00806       }
00807     }
00808     LPC_USB->USBSysErrIntClr = val;
00809   }
00810 #endif /* USB_DMA */
00811
00812 isr_end:
00813   return;
00814 }
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbhw.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBHW.H
00005  *      Purpose: USB Hardware Layer Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBHW_H__
00020 #define __USBHW_H__
00021
00022
00023 /* USB RAM Definitions */
00024 #define USB_RAM_ADR     0x20080000  /* USB RAM Start Address */
00025 #define USB_RAM_SZ      0x00004000  /* USB RAM Size (4kB) */
00026
00027 /* DMA Endpoint Descriptors */
00028 #define DD_NISO_CNT             16  /* Non-Iso EP DMA Descr. Count (max. 32) */
00029 #define DD_ISO_CNT               8  /* Iso EP DMA Descriptor Count (max. 32) */
00030 #define DD_NISO_SZ    (DD_NISO_CNT * 16)    /* Non-Iso DMA Descr. Size */
00031 #define DD_ISO_SZ     (DD_ISO_CNT  * 20)    /* Iso DMA Descriptor Size */
00032 #define DD_NISO_ADR   (USB_RAM_ADR + 128)   /* Non-Iso DMA Descr. Address */
00033 #define DD_ISO_ADR    (DD_NISO_ADR + DD_NISO_SZ) /* Iso DMA Descr. Address */
00034 #define DD_SZ                 (128 + DD_NISO_SZ + DD_ISO_SZ) /* Descr. Size */
00035
00036 /* DMA Buffer Memory Definitions */
00037 #define DMA_BUF_ADR   (USB_RAM_ADR + DD_SZ) /* DMA Buffer Start Address */
00038 #define DMA_BUF_SZ    (USB_RAM_SZ  - DD_SZ) /* DMA Buffer Size */
00039
00040 /* USB Error Codes */
00041 #define USB_ERR_PID         0x0001  /* PID Error */
00042 #define USB_ERR_UEPKT       0x0002  /* Unexpected Packet */
00043 #define USB_ERR_DCRC        0x0004  /* Data CRC Error */
00044 #define USB_ERR_TIMOUT      0x0008  /* Bus Time-out Error */
00045 #define USB_ERR_EOP         0x0010  /* End of Packet Error */
00046 #define USB_ERR_B_OVRN      0x0020  /* Buffer Overrun */
00047 #define USB_ERR_BTSTF       0x0040  /* Bit Stuff Error */
00048 #define USB_ERR_TGL         0x0080  /* Toggle Bit Error */
00049
00050 /* USB DMA Status Codes */
00051 #define USB_DMA_INVALID     0x0000  /* DMA Invalid - Not Configured */
00052 #define USB_DMA_IDLE        0x0001  /* DMA Idle - Waiting for Trigger */
00053 #define USB_DMA_BUSY        0x0002  /* DMA Busy - Transfer in progress */
00054 #define USB_DMA_DONE        0x0003  /* DMA Transfer Done (no Errors)*/
00055 #define USB_DMA_OVER_RUN    0x0004  /* Data Over Run */
00056 #define USB_DMA_UNDER_RUN   0x0005  /* Data Under Run (Short Packet) */
00057 #define USB_DMA_ERROR       0x0006  /* Error */
00058 #define USB_DMA_UNKNOWN     0xFFFF  /* Unknown State */
00059
00060 /* USB DMA Descriptor */
00061 typedef struct _USB_DMA_DESCRIPTOR {
00062   uint32_t BufAdr;                     /* DMA Buffer Address */
00063   uint16_t  BufLen;                     /* DMA Buffer Length */
00064   uint16_t  MaxSize;                    /* Maximum Packet Size */
00065   uint32_t InfoAdr;                    /* Packet Info Memory Address */
00066   union {                           /* DMA Configuration */
00067     struct {
00068       uint32_t Link   : 1;             /* Link to existing Descriptors */
00069       uint32_t IsoEP  : 1;             /* Isonchronous Endpoint */
00070       uint32_t ATLE   : 1;             /* ATLE (Auto Transfer Length Extract) */
00071       uint32_t Rsrvd  : 5;             /* Reserved */
00072       uint32_t LenPos : 8;             /* Length Position (ATLE) */
00073     } Type;
00074     uint32_t Val;
00075   } Cfg;
00076 } USB_DMA_DESCRIPTOR;
00077
00078 /* USB Hardware Functions */
00079 extern void  USB_Init       (void);
00080 extern void  USB_Connect    (uint32_t  con);
00081 extern void  USB_Reset      (void);
00082 extern void  USB_Suspend    (void);
00083 extern void  USB_Resume     (void);
00084 extern void  USB_WakeUp     (void);
00085 extern void  USB_WakeUpCfg  (uint32_t  cfg);
00086 extern void  USB_SetAddress (uint32_t adr);
00087 extern void  USB_Configure  (uint32_t  cfg);
00088 extern void  USB_ConfigEP   (USB_ENDPOINT_DESCRIPTOR *pEPD);
00089 extern void  USB_DirCtrlEP  (uint32_t dir);
00090 extern void  USB_EnableEP   (uint32_t EPNum);
00091 extern void  USB_DisableEP  (uint32_t EPNum);
00092 extern void  USB_ResetEP    (uint32_t EPNum);
00093 extern void  USB_SetStallEP (uint32_t EPNum);
00094 extern void  USB_ClrStallEP (uint32_t EPNum);
00095 extern uint32_t USB_ReadEP     (uint32_t EPNum, uint8_t *pData);
00096 extern uint32_t USB_WriteEP    (uint32_t EPNum, uint8_t *pData, uint32_t cnt);
00097 extern uint32_t  USB_DMA_Setup  (uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD);
00098 extern void  USB_DMA_Enable (uint32_t EPNum);
00099 extern void  USB_DMA_Disable(uint32_t EPNum);
00100 extern uint32_t USB_DMA_Status (uint32_t EPNum);
00101 extern uint32_t USB_DMA_BufAdr (uint32_t EPNum);
00102 extern uint32_t USB_DMA_BufCnt (uint32_t EPNum);
00103 extern uint32_t USB_GetFrame   (void);
00104 extern void  USB_IRQHandler(void);
00105
00106
00107 #endif  /* __USBHW_H__ */
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbreg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbreg.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBREG.H
00005  *      Purpose: USB Hardware Layer Definitions for NXP Semiconductors LPC
00006  *      family MCUs
00007  *      Version: V1.10
00008  *----------------------------------------------------------------------------
00009  *      This software is supplied "AS IS" without any warranties, express,
00010  *      implied or statutory, including but not limited to the implied
00011  *      warranties of fitness for purpose, satisfactory quality and
00012  *      noninfringement. Keil extends you a royalty-free right to reproduce
00013  *      and distribute executable files created using this software for use
00014  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00015  *      else gives you the right to use this software.
00016  *
00017  *      Copyright (c) 2005-2009 Keil Software.
00018  *---------------------------------------------------------------------------*/
00019
00020 #ifndef __USBREG_H
00021 #define __USBREG_H
00022
00023 /* Device Interrupt Bit Definitions */
00024 #define FRAME_INT           0x00000001
00025 #define EP_FAST_INT         0x00000002
00026 #define EP_SLOW_INT         0x00000004
00027 #define DEV_STAT_INT        0x00000008
00028 #define CCEMTY_INT          0x00000010
00029 #define CDFULL_INT          0x00000020
00030 #define RxENDPKT_INT        0x00000040
00031 #define TxENDPKT_INT        0x00000080
00032 #define EP_RLZED_INT        0x00000100
00033 #define ERR_INT             0x00000200
00034
00035 /* Rx & Tx Packet Length Definitions */
00036 #define PKT_LNGTH_MASK      0x000003FF
00037 #define PKT_DV              0x00000400
00038 #define PKT_RDY             0x00000800
00039
00040 /* USB Control Definitions */
00041 #define CTRL_RD_EN          0x00000001
00042 #define CTRL_WR_EN          0x00000002
00043
00044 /* Command Codes */
00045 #define CMD_SET_ADDR        0x00D00500
00046 #define CMD_CFG_DEV         0x00D80500
00047 #define CMD_SET_MODE        0x00F30500
00048 #define CMD_RD_FRAME        0x00F50500
00049 #define DAT_RD_FRAME        0x00F50200
00050 #define CMD_RD_TEST         0x00FD0500
00051 #define DAT_RD_TEST         0x00FD0200
00052 #define CMD_SET_DEV_STAT    0x00FE0500
00053 #define CMD_GET_DEV_STAT    0x00FE0500
00054 #define DAT_GET_DEV_STAT    0x00FE0200
00055 #define CMD_GET_ERR_CODE    0x00FF0500
00056 #define DAT_GET_ERR_CODE    0x00FF0200
00057 #define CMD_RD_ERR_STAT     0x00FB0500
00058 #define DAT_RD_ERR_STAT     0x00FB0200
00059 #define DAT_WR_BYTE(x)     (0x00000100 | ((x) << 16))
00060 #define CMD_SEL_EP(x)      (0x00000500 | ((x) << 16))
00061 #define DAT_SEL_EP(x)      (0x00000200 | ((x) << 16))
00062 #define CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16))
00063 #define DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16))
00064 #define CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16))
00065 #define CMD_CLR_BUF         0x00F20500
00066 #define DAT_CLR_BUF         0x00F20200
00067 #define CMD_VALID_BUF       0x00FA0500
00068
00069 /* Device Address Register Definitions */
00070 #define DEV_ADDR_MASK       0x7F
00071 #define DEV_EN              0x80
00072
00073 /* Device Configure Register Definitions */
00074 #define CONF_DVICE          0x01
00075
00076 /* Device Mode Register Definitions */
00077 #define AP_CLK              0x01
00078 #define INAK_CI             0x02
00079 #define INAK_CO             0x04
00080 #define INAK_II             0x08
00081 #define INAK_IO             0x10
00082 #define INAK_BI             0x20
00083 #define INAK_BO             0x40
00084
00085 /* Device Status Register Definitions */
00086 #define DEV_CON             0x01
00087 #define DEV_CON_CH          0x02
00088 #define DEV_SUS             0x04
00089 #define DEV_SUS_CH          0x08
00090 #define DEV_RST             0x10
00091
00092 /* Error Code Register Definitions */
00093 #define ERR_EC_MASK         0x0F
00094 #define ERR_EA              0x10
00095
00096 /* Error Status Register Definitions */
00097 #define ERR_PID             0x01
00098 #define ERR_UEPKT           0x02
00099 #define ERR_DCRC            0x04
00100 #define ERR_TIMOUT          0x08
00101 #define ERR_EOP             0x10
00102 #define ERR_B_OVRN          0x20
00103 #define ERR_BTSTF           0x40
00104 #define ERR_TGL             0x80
00105
00106 /* Endpoint Select Register Definitions */
00107 #define EP_SEL_F            0x01
00108 #define EP_SEL_ST           0x02
00109 #define EP_SEL_STP          0x04
00110 #define EP_SEL_PO           0x08
00111 #define EP_SEL_EPN          0x10
00112 #define EP_SEL_B_1_FULL     0x20
00113 #define EP_SEL_B_2_FULL     0x40
00114
00115 /* Endpoint Status Register Definitions */
00116 #define EP_STAT_ST          0x01
00117 #define EP_STAT_DA          0x20
00118 #define EP_STAT_RF_MO       0x40
00119 #define EP_STAT_CND_ST      0x80
00120
00121 /* Clear Buffer Register Definitions */
00122 #define CLR_BUF_PO          0x01
00123
00124
00125 /* DMA Interrupt Bit Definitions */
00126 #define EOT_INT             0x01
00127 #define NDD_REQ_INT         0x02
00128 #define SYS_ERR_INT         0x04
00129
00130
00131 #endif  /* __USBREG_H */
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbuser.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbuser.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBUSER.C
00005  *      Purpose: USB Custom User Module
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include "LPC17xx.h"
00020 #include "lpc_types.h"
00021
00022 #include "usb.h"
00023 #include "usbcfg.h"
00024 #include "usbhw.h"
00025 #include "usbcore.h"
00026 #include "usbuser.h"
00027
00028 #include "demo.h"
00029
00030
00031 /*
00032  *  USB Power Event Callback
00033  *   Called automatically on USB Power Event
00034  *    Parameter:       power: On(TRUE)/Off(FALSE)
00035  */
00036
00037 #if USB_POWER_EVENT
00038 void USB_Power_Event (uint32_t  power) {
00039 }
00040 #endif
00041
00042
00043 /*
00044  *  USB Reset Event Callback
00045  *   Called automatically on USB Reset Event
00046  */
00047
00048 #if USB_RESET_EVENT
00049 void USB_Reset_Event (void) {
00050   USB_ResetCore();
00051 }
00052 #endif
00053
00054
00055 /*
00056  *  USB Suspend Event Callback
00057  *   Called automatically on USB Suspend Event
00058  */
00059
00060 #if USB_SUSPEND_EVENT
00061 void USB_Suspend_Event (void) {
00062 }
00063 #endif
00064
00065
00066 /*
00067  *  USB Resume Event Callback
00068  *   Called automatically on USB Resume Event
00069  */
00070
00071 #if USB_RESUME_EVENT
00072 void USB_Resume_Event (void) {
00073 }
00074 #endif
00075
00076
00077 /*
00078  *  USB Remote Wakeup Event Callback
00079  *   Called automatically on USB Remote Wakeup Event
00080  */
00081
00082 #if USB_WAKEUP_EVENT
00083 void USB_WakeUp_Event (void) {
00084 }
00085 #endif
00086
00087
00088 /*
00089  *  USB Start of Frame Event Callback
00090  *   Called automatically on USB Start of Frame Event
00091  */
00092
00093 #if USB_SOF_EVENT
00094 void USB_SOF_Event (void) {
00095 }
00096 #endif
00097
00098
00099 /*
00100  *  USB Error Event Callback
00101  *   Called automatically on USB Error Event
00102  *    Parameter:       error: Error Code
00103  */
00104
00105 #if USB_ERROR_EVENT
00106 void USB_Error_Event (uint32_t error) {
00107 }
00108 #endif
00109
00110
00111 /*
00112  *  USB Set Configuration Event Callback
00113  *   Called automatically on USB Set Configuration Request
00114  */
00115
00116 #if USB_CONFIGURE_EVENT
00117 void USB_Configure_Event (void) {
00118
00119   if (USB_Configuration) {                  /* Check if USB is configured */
00120     GetInReport();
00121     USB_WriteEP(0x81, &InReport, sizeof(InReport));
00122   }
00123 }
00124 #endif
00125
00126
00127 /*
00128  *  USB Set Interface Event Callback
00129  *   Called automatically on USB Set Interface Request
00130  */
00131
00132 #if USB_INTERFACE_EVENT
00133 void USB_Interface_Event (void) {
00134 }
00135 #endif
00136
00137
00138 /*
00139  *  USB Set/Clear Feature Event Callback
00140  *   Called automatically on USB Set/Clear Feature Request
00141  */
00142
00143 #if USB_FEATURE_EVENT
00144 void USB_Feature_Event (void) {
00145 }
00146 #endif
00147
00148
00149 #define P_EP(n) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)
00150
00151 /* USB Endpoint Events Callback Pointers */
00152 void (* const USB_P_EP[16]) (uint32_t event) = {
00153   P_EP(0),
00154   P_EP(1),
00155   P_EP(2),
00156   P_EP(3),
00157   P_EP(4),
00158   P_EP(5),
00159   P_EP(6),
00160   P_EP(7),
00161   P_EP(8),
00162   P_EP(9),
00163   P_EP(10),
00164   P_EP(11),
00165   P_EP(12),
00166   P_EP(13),
00167   P_EP(14),
00168   P_EP(15),
00169 };
00170
00171
00172 /*
00173  *  USB Endpoint 1 Event Callback
00174  *   Called automatically on USB Endpoint 1 Event
00175  *    Parameter:       event
00176  */
00177
00178 void USB_EndPoint1 (uint32_t event) {
00179
00180   switch (event) {
00181     case USB_EVT_IN:
00182       GetInReport();
00183       USB_WriteEP(0x81, &InReport, sizeof(InReport));
00184       break;
00185   }
00186 }
00187
00188
00189 /*
00190  *  USB Endpoint 2 Event Callback
00191  *   Called automatically on USB Endpoint 2 Event
00192  *    Parameter:       event
00193  */
00194
00195 void USB_EndPoint2 (uint32_t event) {
00196   switch (event) {
00197     case USB_EVT_IN:
00198       GetInReport();
00199       USB_WriteEP(0x82, &InReport, sizeof(InReport));
00200       break;
00201   }
00202 }
00203
00204
00205 /*
00206  *  USB Endpoint 3 Event Callback
00207  *   Called automatically on USB Endpoint 3 Event
00208  *    Parameter:       event
00209  */
00210
00211 void USB_EndPoint3 (uint32_t event) {
00212   switch (event) {
00213     case USB_EVT_IN:
00214       GetInReport();
00215       USB_WriteEP(0x83, &InReport, sizeof(InReport));
00216       break;
00217   }
00218 }
00219
00220
00221 /*
00222  *  USB Endpoint 4 Event Callback
00223  *   Called automatically on USB Endpoint 4 Event
00224  *    Parameter:       event
00225  */
00226
00227 void USB_EndPoint4 (uint32_t event) {
00228 }
00229
00230
00231 /*
00232  *  USB Endpoint 5 Event Callback
00233  *   Called automatically on USB Endpoint 5 Event
00234  *    Parameter:       event
00235  */
00236
00237 void USB_EndPoint5 (uint32_t event) {
00238 }
00239
00240
00241 /*
00242  *  USB Endpoint 6 Event Callback
00243  *   Called automatically on USB Endpoint 6 Event
00244  *    Parameter:       event
00245  */
00246
00247 void USB_EndPoint6 (uint32_t event) {
00248 }
00249
00250
00251 /*
00252  *  USB Endpoint 7 Event Callback
00253  *   Called automatically on USB Endpoint 7 Event
00254  *    Parameter:       event
00255  */
00256
00257 void USB_EndPoint7 (uint32_t event) {
00258 }
00259
00260
00261 /*
00262  *  USB Endpoint 8 Event Callback
00263  *   Called automatically on USB Endpoint 8 Event
00264  *    Parameter:       event
00265  */
00266
00267 void USB_EndPoint8 (uint32_t event) {
00268 }
00269
00270
00271 /*
00272  *  USB Endpoint 9 Event Callback
00273  *   Called automatically on USB Endpoint 9 Event
00274  *    Parameter:       event
00275  */
00276
00277 void USB_EndPoint9 (uint32_t event) {
00278 }
00279
00280
00281 /*
00282  *  USB Endpoint 10 Event Callback
00283  *   Called automatically on USB Endpoint 10 Event
00284  *    Parameter:       event
00285  */
00286
00287 void USB_EndPoint10 (uint32_t event) {
00288 }
00289
00290
00291 /*
00292  *  USB Endpoint 11 Event Callback
00293  *   Called automatically on USB Endpoint 11 Event
00294  *    Parameter:       event
00295  */
00296
00297 void USB_EndPoint11 (uint32_t event) {
00298 }
00299
00300
00301 /*
00302  *  USB Endpoint 12 Event Callback
00303  *   Called automatically on USB Endpoint 12 Event
00304  *    Parameter:       event
00305  */
00306
00307 void USB_EndPoint12 (uint32_t event) {
00308 }
00309
00310
00311 /*
00312  *  USB Endpoint 13 Event Callback
00313  *   Called automatically on USB Endpoint 13 Event
00314  *    Parameter:       event
00315  */
00316
00317 void USB_EndPoint13 (uint32_t event) {
00318 }
00319
00320
00321 /*
00322  *  USB Endpoint 14 Event Callback
00323  *   Called automatically on USB Endpoint 14 Event
00324  *    Parameter:       event
00325  */
00326
00327 void USB_EndPoint14 (uint32_t event) {
00328 }
00329
00330
00331 /*
00332  *  USB Endpoint 15 Event Callback
00333  *   Called automatically on USB Endpoint 15 Event
00334  *    Parameter:       event
00335  */
00336
00337 void USB_EndPoint15 (uint32_t event) {
00338 }
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbuser.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/usbuser.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBUSER.H
00005  *      Purpose: USB Custom User Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBUSER_H__
00020 #define __USBUSER_H__
00021
00022
00023 /* USB Device Events Callback Functions */
00024 extern void USB_Power_Event     (uint32_t  power);
00025 extern void USB_Reset_Event     (void);
00026 extern void USB_Suspend_Event   (void);
00027 extern void USB_Resume_Event    (void);
00028 extern void USB_WakeUp_Event    (void);
00029 extern void USB_SOF_Event       (void);
00030 extern void USB_Error_Event     (uint32_t error);
00031
00032 /* USB Endpoint Callback Events */
00033 #define USB_EVT_SETUP       1   /* Setup Packet */
00034 #define USB_EVT_OUT         2   /* OUT Packet */
00035 #define USB_EVT_IN          3   /*  IN Packet */
00036 #define USB_EVT_OUT_NAK     4   /* OUT Packet - Not Acknowledged */
00037 #define USB_EVT_IN_NAK      5   /*  IN Packet - Not Acknowledged */
00038 #define USB_EVT_OUT_STALL   6   /* OUT Packet - Stalled */
00039 #define USB_EVT_IN_STALL    7   /*  IN Packet - Stalled */
00040 #define USB_EVT_OUT_DMA_EOT 8   /* DMA OUT EP - End of Transfer */
00041 #define USB_EVT_IN_DMA_EOT  9   /* DMA  IN EP - End of Transfer */
00042 #define USB_EVT_OUT_DMA_NDR 10  /* DMA OUT EP - New Descriptor Request */
00043 #define USB_EVT_IN_DMA_NDR  11  /* DMA  IN EP - New Descriptor Request */
00044 #define USB_EVT_OUT_DMA_ERR 12  /* DMA OUT EP - Error */
00045 #define USB_EVT_IN_DMA_ERR  13  /* DMA  IN EP - Error */
00046
00047 /* USB Endpoint Events Callback Pointers */
00048 extern void (* const USB_P_EP[16])(uint32_t event);
00049
00050 /* USB Endpoint Events Callback Functions */
00051 extern void USB_EndPoint0  (uint32_t event);
00052 extern void USB_EndPoint1  (uint32_t event);
00053 extern void USB_EndPoint2  (uint32_t event);
00054 extern void USB_EndPoint3  (uint32_t event);
00055 extern void USB_EndPoint4  (uint32_t event);
00056 extern void USB_EndPoint5  (uint32_t event);
00057 extern void USB_EndPoint6  (uint32_t event);
00058 extern void USB_EndPoint7  (uint32_t event);
00059 extern void USB_EndPoint8  (uint32_t event);
00060 extern void USB_EndPoint9  (uint32_t event);
00061 extern void USB_EndPoint10 (uint32_t event);
00062 extern void USB_EndPoint11 (uint32_t event);
00063 extern void USB_EndPoint12 (uint32_t event);
00064 extern void USB_EndPoint13 (uint32_t event);
00065 extern void USB_EndPoint14 (uint32_t event);
00066 extern void USB_EndPoint15 (uint32_t event);
00067
00068 /* USB Core Events Callback Functions */
00069 extern void USB_Configure_Event (void);
00070 extern void USB_Interface_Event (void);
00071 extern void USB_Feature_Event   (void);
00072
00073
00074 #endif  /* __USBUSER_H__ */
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usb.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usb.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USB.H
00005  *      Purpose: USB Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USB_H__
00020 #define __USB_H__
00021
00022
00023 #if defined   (  __GNUC__  )
00024 #define __packed __attribute__((__packed__))
00025 #endif
00026
00027
00028 #if defined     (  __CC_ARM  )
00029 typedef __packed union {
00030 #elif defined   (  __GNUC__  )
00031 typedef union __packed {
00032 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00033 typedef __packed union {
00034 #endif
00035   uint16_t W;
00036 #if defined     (  __CC_ARM  )
00037   __packed struct {
00038 #elif defined   (  __GNUC__  )
00039   struct __packed {
00040 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00041   __packed struct {
00042 #endif
00043     uint8_t L;
00044     uint8_t H;
00045   } WB;
00046 } WORD_BYTE;
00047
00048
00049 /* bmRequestType.Dir */
00050 #define REQUEST_HOST_TO_DEVICE     0
00051 #define REQUEST_DEVICE_TO_HOST     1
00052
00053 /* bmRequestType.Type */
00054 #define REQUEST_STANDARD           0
00055 #define REQUEST_CLASS              1
00056 #define REQUEST_VENDOR             2
00057 #define REQUEST_RESERVED           3
00058
00059 /* bmRequestType.Recipient */
00060 #define REQUEST_TO_DEVICE          0
00061 #define REQUEST_TO_INTERFACE       1
00062 #define REQUEST_TO_ENDPOINT        2
00063 #define REQUEST_TO_OTHER           3
00064
00065 /* bmRequestType Definition */
00066 #if defined     (  __CC_ARM  )
00067 typedef __packed union _REQUEST_TYPE {
00068 #elif defined   (  __GNUC__  )
00069 typedef union __packed _REQUEST_TYPE {
00070 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00071 typedef __packed union _REQUEST_TYPE {
00072 #endif
00073 #if defined     (  __CC_ARM  )
00074         __packed struct _BM {
00075 #elif defined   (  __GNUC__  )
00076         struct __packed _BM {
00077 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00078         __packed struct _BM {
00079 #endif
00080     uint8_t Recipient : 5;
00081     uint8_t Type      : 2;
00082     uint8_t Dir       : 1;
00083   } BM;
00084   uint8_t B;
00085 } REQUEST_TYPE;
00086
00087 /* USB Standard Request Codes */
00088 #define USB_REQUEST_GET_STATUS                 0
00089 #define USB_REQUEST_CLEAR_FEATURE              1
00090 #define USB_REQUEST_SET_FEATURE                3
00091 #define USB_REQUEST_SET_ADDRESS                5
00092 #define USB_REQUEST_GET_DESCRIPTOR             6
00093 #define USB_REQUEST_SET_DESCRIPTOR             7
00094 #define USB_REQUEST_GET_CONFIGURATION          8
00095 #define USB_REQUEST_SET_CONFIGURATION          9
00096 #define USB_REQUEST_GET_INTERFACE              10
00097 #define USB_REQUEST_SET_INTERFACE              11
00098 #define USB_REQUEST_SYNC_FRAME                 12
00099
00100 /* USB GET_STATUS Bit Values */
00101 #define USB_GETSTATUS_SELF_POWERED             0x01
00102 #define USB_GETSTATUS_REMOTE_WAKEUP            0x02
00103 #define USB_GETSTATUS_ENDPOINT_STALL           0x01
00104
00105 /* USB Standard Feature selectors */
00106 #define USB_FEATURE_ENDPOINT_STALL             0
00107 #define USB_FEATURE_REMOTE_WAKEUP              1
00108
00109 /* USB Default Control Pipe Setup Packet */
00110 #if defined     (  __CC_ARM  )
00111 typedef __packed struct _USB_SETUP_PACKET {
00112 #elif defined   (  __GNUC__  )
00113 typedef struct __packed _USB_SETUP_PACKET {
00114 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00115 typedef __packed struct _USB_SETUP_PACKET {
00116 #endif
00117   REQUEST_TYPE bmRequestType;
00118   uint8_t         bRequest;
00119   WORD_BYTE    wValue;
00120   WORD_BYTE    wIndex;
00121   uint16_t         wLength;
00122 } USB_SETUP_PACKET;
00123
00124
00125 /* USB Descriptor Types */
00126 #define USB_DEVICE_DESCRIPTOR_TYPE             1
00127 #define USB_CONFIGURATION_DESCRIPTOR_TYPE      2
00128 #define USB_STRING_DESCRIPTOR_TYPE             3
00129 #define USB_INTERFACE_DESCRIPTOR_TYPE          4
00130 #define USB_ENDPOINT_DESCRIPTOR_TYPE           5
00131 #define USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE   6
00132 #define USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7
00133 #define USB_INTERFACE_POWER_DESCRIPTOR_TYPE    8
00134 #define USB_OTG_DESCRIPTOR_TYPE                     9
00135 #define USB_DEBUG_DESCRIPTOR_TYPE                  10
00136 #define USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE  11
00137
00138 /* USB Device Classes */
00139 #define USB_DEVICE_CLASS_RESERVED              0x00
00140 #define USB_DEVICE_CLASS_AUDIO                 0x01
00141 #define USB_DEVICE_CLASS_COMMUNICATIONS        0x02
00142 #define USB_DEVICE_CLASS_HUMAN_INTERFACE       0x03
00143 #define USB_DEVICE_CLASS_MONITOR               0x04
00144 #define USB_DEVICE_CLASS_PHYSICAL_INTERFACE    0x05
00145 #define USB_DEVICE_CLASS_POWER                 0x06
00146 #define USB_DEVICE_CLASS_PRINTER               0x07
00147 #define USB_DEVICE_CLASS_STORAGE               0x08
00148 #define USB_DEVICE_CLASS_HUB                   0x09
00149 #define USB_DEVICE_CLASS_MISCELLANEOUS         0xEF
00150 #define USB_DEVICE_CLASS_VENDOR_SPECIFIC       0xFF
00151
00152 /* bmAttributes in Configuration Descriptor */
00153 #define USB_CONFIG_POWERED_MASK                0xC0
00154 #define USB_CONFIG_BUS_POWERED                 0x80
00155 #define USB_CONFIG_SELF_POWERED                0xC0
00156 #define USB_CONFIG_REMOTE_WAKEUP               0x20
00157
00158 /* bMaxPower in Configuration Descriptor */
00159 #define USB_CONFIG_POWER_MA(mA)                ((mA)/2)
00160
00161 /* bEndpointAddress in Endpoint Descriptor */
00162 #define USB_ENDPOINT_DIRECTION_MASK            0x80
00163 #define USB_ENDPOINT_OUT(addr)                 ((addr) | 0x00)
00164 #define USB_ENDPOINT_IN(addr)                  ((addr) | 0x80)
00165
00166 /* bmAttributes in Endpoint Descriptor */
00167 #define USB_ENDPOINT_TYPE_MASK                 0x03
00168 #define USB_ENDPOINT_TYPE_CONTROL              0x00
00169 #define USB_ENDPOINT_TYPE_ISOCHRONOUS          0x01
00170 #define USB_ENDPOINT_TYPE_BULK                 0x02
00171 #define USB_ENDPOINT_TYPE_INTERRUPT            0x03
00172 #define USB_ENDPOINT_SYNC_MASK                 0x0C
00173 #define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION   0x00
00174 #define USB_ENDPOINT_SYNC_ASYNCHRONOUS         0x04
00175 #define USB_ENDPOINT_SYNC_ADAPTIVE             0x08
00176 #define USB_ENDPOINT_SYNC_SYNCHRONOUS          0x0C
00177 #define USB_ENDPOINT_USAGE_MASK                0x30
00178 #define USB_ENDPOINT_USAGE_DATA                0x00
00179 #define USB_ENDPOINT_USAGE_FEEDBACK            0x10
00180 #define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK   0x20
00181 #define USB_ENDPOINT_USAGE_RESERVED            0x30
00182
00183 /* USB Standard Device Descriptor */
00184 #if defined     (  __CC_ARM  )
00185 typedef __packed struct _USB_DEVICE_DESCRIPTOR {
00186 #elif defined   (  __GNUC__  )
00187 typedef struct __packed _USB_DEVICE_DESCRIPTOR {
00188 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00189 typedef __packed struct _USB_DEVICE_DESCRIPTOR {
00190 #endif
00191   uint8_t  bLength;
00192   uint8_t  bDescriptorType;
00193   uint16_t  bcdUSB;
00194   uint8_t  bDeviceClass;
00195   uint8_t  bDeviceSubClass;
00196   uint8_t  bDeviceProtocol;
00197   uint8_t  bMaxPacketSize0;
00198   uint16_t  idVendor;
00199   uint16_t  idProduct;
00200   uint16_t  bcdDevice;
00201   uint8_t  iManufacturer;
00202   uint8_t  iProduct;
00203   uint8_t  iSerialNumber;
00204   uint8_t  bNumConfigurations;
00205 } USB_DEVICE_DESCRIPTOR;
00206
00207 /* USB 2.0 Device Qualifier Descriptor */
00208 #if defined     (  __CC_ARM  )
00209 typedef __packed struct _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00210 #elif defined   (  __GNUC__  )
00211 typedef struct __packed _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00212 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00213 typedef __packed struct _USB_DEVICE_QUALIFIER_DESCRIPTOR {
00214 #endif
00215   uint8_t  bLength;
00216   uint8_t  bDescriptorType;
00217   uint16_t  bcdUSB;
00218   uint8_t  bDeviceClass;
00219   uint8_t  bDeviceSubClass;
00220   uint8_t  bDeviceProtocol;
00221   uint8_t  bMaxPacketSize0;
00222   uint8_t  bNumConfigurations;
00223   uint8_t  bReserved;
00224 } USB_DEVICE_QUALIFIER_DESCRIPTOR;
00225
00226 /* USB Standard Configuration Descriptor */
00227 #if defined     (  __CC_ARM  )
00228 typedef __packed struct _USB_CONFIGURATION_DESCRIPTOR {
00229 #elif defined   (  __GNUC__  )
00230 typedef struct __packed _USB_CONFIGURATION_DESCRIPTOR {
00231 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00232 typedef __packed struct _USB_CONFIGURATION_DESCRIPTOR {
00233 #endif
00234   uint8_t  bLength;
00235   uint8_t  bDescriptorType;
00236   uint16_t  wTotalLength;
00237   uint8_t  bNumInterfaces;
00238   uint8_t  bConfigurationValue;
00239   uint8_t  iConfiguration;
00240   uint8_t  bmAttributes;
00241   uint8_t  bMaxPower;
00242 } USB_CONFIGURATION_DESCRIPTOR;
00243
00244 /* USB Standard Interface Descriptor */
00245 #if defined     (  __CC_ARM  )
00246 typedef __packed struct _USB_INTERFACE_DESCRIPTOR {
00247 #elif defined   (  __GNUC__  )
00248 typedef struct __packed _USB_INTERFACE_DESCRIPTOR {
00249 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00250 typedef __packed struct _USB_INTERFACE_DESCRIPTOR {
00251 #endif
00252   uint8_t  bLength;
00253   uint8_t  bDescriptorType;
00254   uint8_t  bInterfaceNumber;
00255   uint8_t  bAlternateSetting;
00256   uint8_t  bNumEndpoints;
00257   uint8_t  bInterfaceClass;
00258   uint8_t  bInterfaceSubClass;
00259   uint8_t  bInterfaceProtocol;
00260   uint8_t  iInterface;
00261 } USB_INTERFACE_DESCRIPTOR;
00262
00263 /* USB Standard Endpoint Descriptor */
00264 #if defined     (  __CC_ARM  )
00265 typedef __packed struct _USB_ENDPOINT_DESCRIPTOR {
00266 #elif defined   (  __GNUC__  )
00267 typedef struct __packed _USB_ENDPOINT_DESCRIPTOR {
00268 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00269 typedef __packed struct _USB_ENDPOINT_DESCRIPTOR {
00270 #endif
00271   uint8_t  bLength;
00272   uint8_t  bDescriptorType;
00273   uint8_t  bEndpointAddress;
00274   uint8_t  bmAttributes;
00275   uint16_t  wMaxPacketSize;
00276   uint8_t  bInterval;
00277 } USB_ENDPOINT_DESCRIPTOR;
00278
00279 /* USB String Descriptor */
00280 #if defined     (  __CC_ARM  )
00281 typedef __packed struct _USB_STRING_DESCRIPTOR {
00282 #elif defined   (  __GNUC__  )
00283 typedef struct __packed _USB_STRING_DESCRIPTOR {
00284 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00285 typedef __packed struct _USB_STRING_DESCRIPTOR {
00286 #endif
00287   uint8_t  bLength;
00288   uint8_t  bDescriptorType;
00289   uint16_t  bString/*[]*/;
00290 } USB_STRING_DESCRIPTOR;
00291
00292 /* USB Common Descriptor */
00293 #if defined     (  __CC_ARM  )
00294 typedef __packed struct _USB_COMMON_DESCRIPTOR {
00295 #elif defined   (  __GNUC__  )
00296 typedef struct __packed _USB_COMMON_DESCRIPTOR {
00297 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00298 typedef __packed struct _USB_COMMON_DESCRIPTOR {
00299 #endif
00300   uint8_t  bLength;
00301   uint8_t  bDescriptorType;
00302 } USB_COMMON_DESCRIPTOR;
00303
00304
00305 #endif  /* __USB_H__ */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcfg.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBCFG.H
00005  *      Purpose: USB Custom Configuration
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBCFG_H__
00020 #define __USBCFG_H__
00021
00022
00023 //*** <<< Use Configuration Wizard in Context Menu >>> ***
00024
00025
00026 /*
00027 // <h> USB Configuration
00028 //   <o0> USB Power
00029 //        <i> Default Power Setting
00030 //        <0=> Bus-powered
00031 //        <1=> Self-powered
00032 //   <o1> Max Number of Interfaces <1-256>
00033 //   <o2> Max Number of Endpoints  <1-32>
00034 //   <o3> Max Endpoint 0 Packet Size
00035 //        <8=> 8 Bytes <16=> 16 Bytes <32=> 32 Bytes <64=> 64 Bytes
00036 //   <e4> DMA Transfer
00037 //     <i> Use DMA for selected Endpoints
00038 //     <o5.0>  Endpoint 0 Out
00039 //     <o5.1>  Endpoint 0 In
00040 //     <o5.2>  Endpoint 1 Out
00041 //     <o5.3>  Endpoint 1 In
00042 //     <o5.4>  Endpoint 2 Out
00043 //     <o5.5>  Endpoint 2 In
00044 //     <o5.6>  Endpoint 3 Out
00045 //     <o5.7>  Endpoint 3 In
00046 //     <o5.8>  Endpoint 4 Out
00047 //     <o5.9>  Endpoint 4 In
00048 //     <o5.10> Endpoint 5 Out
00049 //     <o5.11> Endpoint 5 In
00050 //     <o5.12> Endpoint 6 Out
00051 //     <o5.13> Endpoint 6 In
00052 //     <o5.14> Endpoint 7 Out
00053 //     <o5.15> Endpoint 7 In
00054 //     <o5.16> Endpoint 8 Out
00055 //     <o5.17> Endpoint 8 In
00056 //     <o5.18> Endpoint 9 Out
00057 //     <o5.19> Endpoint 9 In
00058 //     <o5.20> Endpoint 10 Out
00059 //     <o5.21> Endpoint 10 In
00060 //     <o5.22> Endpoint 11 Out
00061 //     <o5.23> Endpoint 11 In
00062 //     <o5.24> Endpoint 12 Out
00063 //     <o5.25> Endpoint 12 In
00064 //     <o5.26> Endpoint 13 Out
00065 //     <o5.27> Endpoint 13 In
00066 //     <o5.28> Endpoint 14 Out
00067 //     <o5.29> Endpoint 14 In
00068 //     <o5.30> Endpoint 15 Out
00069 //     <o5.31> Endpoint 15 In
00070 //   </e>
00071 // </h>
00072 */
00073
00074 #define USB_POWER           0
00075 #define USB_IF_NUM          4
00076 #define USB_EP_NUM          32
00077 #define USB_MAX_PACKET0     64
00078 #define USB_DMA             1
00079 #define USB_DMA_EP          0x00000000
00080
00081
00082 /*
00083 // <h> USB Event Handlers
00084 //   <h> Device Events
00085 //     <o0.0> Power Event
00086 //     <o1.0> Reset Event
00087 //     <o2.0> Suspend Event
00088 //     <o3.0> Resume Event
00089 //     <o4.0> Remote Wakeup Event
00090 //     <o5.0> Start of Frame Event
00091 //     <o6.0> Error Event
00092 //   </h>
00093 //   <h> Endpoint Events
00094 //     <o7.0>  Endpoint 0 Event
00095 //     <o7.1>  Endpoint 1 Event
00096 //     <o7.2>  Endpoint 2 Event
00097 //     <o7.3>  Endpoint 3 Event
00098 //     <o7.4>  Endpoint 4 Event
00099 //     <o7.5>  Endpoint 5 Event
00100 //     <o7.6>  Endpoint 6 Event
00101 //     <o7.7>  Endpoint 7 Event
00102 //     <o7.8>  Endpoint 8 Event
00103 //     <o7.9>  Endpoint 9 Event
00104 //     <o7.10> Endpoint 10 Event
00105 //     <o7.11> Endpoint 11 Event
00106 //     <o7.12> Endpoint 12 Event
00107 //     <o7.13> Endpoint 13 Event
00108 //     <o7.14> Endpoint 14 Event
00109 //     <o7.15> Endpoint 15 Event
00110 //   </h>
00111 //   <h> USB Core Events
00112 //     <o8.0>  Set Configuration Event
00113 //     <o9.0>  Set Interface Event
00114 //     <o10.0> Set/Clear Feature Event
00115 //   </h>
00116 // </h>
00117 */
00118
00119 #define USB_POWER_EVENT     0
00120 #define USB_RESET_EVENT     1
00121 #define USB_SUSPEND_EVENT   0
00122 #define USB_RESUME_EVENT    0
00123 #define USB_WAKEUP_EVENT    0
00124 #define USB_SOF_EVENT       0
00125 #define USB_ERROR_EVENT     0
00126 #define USB_EP_EVENT        0x0005
00127 #define USB_CONFIGURE_EVENT 1
00128 #define USB_INTERFACE_EVENT 0
00129 #define USB_FEATURE_EVENT   0
00130
00131
00132 /*
00133 // <e0> USB Class Support
00134 //   <e1> Human Interface Device (HID)
00135 //     <o2> Interface Number <0-255>
00136 //   </e>
00137 //   <e3> Mass Storage
00138 //     <o4> Interface Number <0-255>
00139 //   </e>
00140 //   <e5> Audio Device
00141 //     <o6> Control Interface Number <0-255>
00142 //     <o7> Streaming Interface 1 Number <0-255>
00143 //     <o8> Streaming Interface 2 Number <0-255>
00144 //   </e>
00145 // </e>
00146 */
00147
00148 #define USB_CLASS           1
00149 #define USB_HID             0
00150 #define USB_HID_IF_NUM      0
00151 #define USB_MSC             1
00152 #define USB_MSC_IF_NUM      0
00153 #define USB_AUDIO           0
00154 #define USB_ADC_CIF_NUM     0
00155 #define USB_ADC_SIF1_NUM    1
00156 #define USB_ADC_SIF2_NUM    2
00157 #define USB_CDC                         0
00158 #define USB_CDC_CIF_NUM     0
00159 #define USB_CDC_DIF_NUM     1
00160 #define USB_CDC_BUFSIZE     64
00161
00162
00163 #endif  /* __USBCFG_H__ */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBCORE.C
00005  *      Purpose: USB Core Module
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include "lpc_types.h"
00020
00021 #include "usb.h"
00022 #include "usbcfg.h"
00023 #include "usbhw.h"
00024 #include "usbcore.h"
00025 #include "usbdesc.h"
00026 #include "usbuser.h"
00027
00028 #if (USB_CLASS)
00029
00030 #if (USB_AUDIO)
00031 #include "audio.h"
00032 #include "adcuser.h"
00033 #endif
00034
00035 #if (USB_HID)
00036 #include "hid.h"
00037 #include "hiduser.h"
00038 #endif
00039
00040 #if (USB_MSC)
00041 #include "msc.h"
00042 #include "mscuser.h"
00043 extern MSC_CSW CSW;
00044 #endif
00045
00046 #if (USB_CDC)
00047 #include "cdc.h"
00048 #include "cdcuser.h"
00049 #endif
00050
00051 #endif
00052
00053 #if (USB_VENDOR)
00054 #include "vendor.h"
00055 #endif
00056
00057 #ifndef __IAR_SYSTEMS_ICC__
00058 #pragma diag_suppress 111,1441
00059 #endif
00060
00061 uint16_t  USB_DeviceStatus;
00062 uint8_t  USB_DeviceAddress;
00063 uint8_t  USB_Configuration;
00064 uint32_t USB_EndPointMask;
00065 uint32_t USB_EndPointHalt;
00066 uint8_t  USB_NumInterfaces;
00067 uint8_t  USB_AltSetting[USB_IF_NUM];
00068
00069 uint8_t  EP0Buf[USB_MAX_PACKET0];
00070
00071
00072 USB_EP_DATA EP0Data;
00073
00074 USB_SETUP_PACKET SetupPacket;
00075
00076
00077 /*
00078  *  Reset USB Core
00079  *    Parameters:      None
00080  *    Return Value:    None
00081  */
00082
00083 void USB_ResetCore (void) {
00084
00085   USB_DeviceStatus  = USB_POWER;
00086   USB_DeviceAddress = 0;
00087   USB_Configuration = 0;
00088   USB_EndPointMask  = 0x00010001;
00089   USB_EndPointHalt  = 0x00000000;
00090 }
00091
00092
00093 /*
00094  *  USB Request - Setup Stage
00095  *    Parameters:      None (global SetupPacket)
00096  *    Return Value:    None
00097  */
00098
00099 void USB_SetupStage (void) {
00100   USB_ReadEP(0x00, (uint8_t *)&SetupPacket);
00101 }
00102
00103
00104 /*
00105  *  USB Request - Data In Stage
00106  *    Parameters:      None (global EP0Data)
00107  *    Return Value:    None
00108  */
00109
00110 void USB_DataInStage (void) {
00111   uint32_t cnt;
00112
00113   if (EP0Data.Count > USB_MAX_PACKET0) {
00114     cnt = USB_MAX_PACKET0;
00115   } else {
00116     cnt = EP0Data.Count;
00117   }
00118   cnt = USB_WriteEP(0x80, EP0Data.pData, cnt);
00119   EP0Data.pData += cnt;
00120   EP0Data.Count -= cnt;
00121 }
00122
00123
00124 /*
00125  *  USB Request - Data Out Stage
00126  *    Parameters:      None (global EP0Data)
00127  *    Return Value:    None
00128  */
00129
00130 void USB_DataOutStage (void) {
00131   uint32_t cnt;
00132
00133   cnt = USB_ReadEP(0x00, EP0Data.pData);
00134   EP0Data.pData += cnt;
00135   EP0Data.Count -= cnt;
00136 }
00137
00138
00139 /*
00140  *  USB Request - Status In Stage
00141  *    Parameters:      None
00142  *    Return Value:    None
00143  */
00144
00145 void USB_StatusInStage (void) {
00146   USB_WriteEP(0x80, NULL, 0);
00147 }
00148
00149
00150 /*
00151  *  USB Request - Status Out Stage
00152  *    Parameters:      None
00153  *    Return Value:    None
00154  */
00155
00156 void USB_StatusOutStage (void) {
00157   USB_ReadEP(0x00, EP0Buf);
00158 }
00159
00160
00161 /*
00162  *  Get Status USB Request
00163  *    Parameters:      None (global SetupPacket)
00164  *    Return Value:    TRUE - Success, FALSE - Error
00165  */
00166
00167 #ifdef __IAR_SYSTEMS_ICC__
00168 inline uint32_t USB_GetStatus (void) {
00169 #else
00170 __inline uint32_t USB_GetStatus (void) {
00171 #endif
00172   uint32_t n, m;
00173
00174   switch (SetupPacket.bmRequestType.BM.Recipient) {
00175     case REQUEST_TO_DEVICE:
00176       EP0Data.pData = (uint8_t *)&USB_DeviceStatus;
00177       USB_DataInStage();
00178       break;
00179     case REQUEST_TO_INTERFACE:
00180       if ((USB_Configuration != 0) && (SetupPacket.wIndex.WB.L < USB_NumInterfaces)) {
00181         *((__packed uint16_t *)EP0Buf) = 0;
00182         EP0Data.pData = EP0Buf;
00183         USB_DataInStage();
00184       } else {
00185         return (FALSE);
00186       }
00187       break;
00188     case REQUEST_TO_ENDPOINT:
00189       n = SetupPacket.wIndex.WB.L & 0x8F;
00190       m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00191       if (((USB_Configuration != 0) || ((n & 0x0F) == 0)) && (USB_EndPointMask & m)) {
00192         *((__packed uint16_t *)EP0Buf) = (USB_EndPointHalt & m) ? 1 : 0;
00193         EP0Data.pData = EP0Buf;
00194         USB_DataInStage();
00195       } else {
00196         return (FALSE);
00197       }
00198       break;
00199     default:
00200       return (FALSE);
00201   }
00202   return (TRUE);
00203 }
00204
00205
00206 /*
00207  *  Set/Clear Feature USB Request
00208  *    Parameters:      sc:    0 - Clear, 1 - Set
00209  *                            None (global SetupPacket)
00210  *    Return Value:    TRUE - Success, FALSE - Error
00211  */
00212
00213 #ifdef __IAR_SYSTEMS_ICC__
00214 inline uint32_t USB_SetClrFeature (uint32_t sc) {
00215 #else
00216 __inline uint32_t USB_SetClrFeature (uint32_t sc) {
00217 #endif
00218   uint32_t n, m;
00219
00220   switch (SetupPacket.bmRequestType.BM.Recipient) {
00221     case REQUEST_TO_DEVICE:
00222       if (SetupPacket.wValue.W == USB_FEATURE_REMOTE_WAKEUP) {
00223         if (sc) {
00224           USB_WakeUpCfg(TRUE);
00225           USB_DeviceStatus |=  USB_GETSTATUS_REMOTE_WAKEUP;
00226         } else {
00227           USB_WakeUpCfg(FALSE);
00228           USB_DeviceStatus &= ~USB_GETSTATUS_REMOTE_WAKEUP;
00229         }
00230       } else {
00231         return (FALSE);
00232       }
00233       break;
00234     case REQUEST_TO_INTERFACE:
00235       return (FALSE);
00236     case REQUEST_TO_ENDPOINT:
00237       n = SetupPacket.wIndex.WB.L & 0x8F;
00238       m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00239       if ((USB_Configuration != 0) && ((n & 0x0F) != 0) && (USB_EndPointMask & m)) {
00240         if (SetupPacket.wValue.W == USB_FEATURE_ENDPOINT_STALL) {
00241           if (sc) {
00242             USB_SetStallEP(n);
00243             USB_EndPointHalt |=  m;
00244           } else {
00245             USB_ClrStallEP(n);
00246             USB_EndPointHalt &= ~m;
00247           }
00248         } else {
00249           return (FALSE);
00250         }
00251       } else {
00252         return (FALSE);
00253       }
00254       break;
00255     default:
00256       return (FALSE);
00257   }
00258   return (TRUE);
00259 }
00260
00261
00262 /*
00263  *  Get Descriptor USB Request
00264  *    Parameters:      None (global SetupPacket)
00265  *    Return Value:    TRUE - Success, FALSE - Error
00266  */
00267
00268 #ifdef __IAR_SYSTEMS_ICC__
00269 inline uint32_t USB_GetDescriptor (void) {
00270 #else
00271 __inline uint32_t USB_GetDescriptor (void) {
00272 #endif
00273   uint8_t  *pD;
00274   uint32_t len, n;
00275
00276   switch (SetupPacket.bmRequestType.BM.Recipient) {
00277     case REQUEST_TO_DEVICE:
00278       switch (SetupPacket.wValue.WB.H) {
00279         case USB_DEVICE_DESCRIPTOR_TYPE:
00280           EP0Data.pData = (uint8_t *)USB_DeviceDescriptor;
00281           len = USB_DEVICE_DESC_SIZE;
00282           break;
00283         case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00284           pD = (uint8_t *)USB_ConfigDescriptor;
00285           for (n = 0; n != SetupPacket.wValue.WB.L; n++) {
00286             if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bLength != 0) {
00287               pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00288             }
00289           }
00290           if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bLength == 0) {
00291             return (FALSE);
00292           }
00293           EP0Data.pData = pD;
00294           len = ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00295           break;
00296         case USB_STRING_DESCRIPTOR_TYPE:
00297           EP0Data.pData = (uint8_t *)USB_StringDescriptor + SetupPacket.wValue.WB.L;
00298           len = ((USB_STRING_DESCRIPTOR *)EP0Data.pData)->bLength;
00299           break;
00300         default:
00301           return (FALSE);
00302       }
00303       break;
00304     case REQUEST_TO_INTERFACE:
00305       switch (SetupPacket.wValue.WB.H) {
00306 #if USB_HID
00307         case HID_HID_DESCRIPTOR_TYPE:
00308           if (SetupPacket.wIndex.WB.L != USB_HID_IF_NUM) {
00309             return (FALSE);    /* Only Single HID Interface is supported */
00310           }
00311           EP0Data.pData = (uint8_t *)USB_ConfigDescriptor + HID_DESC_OFFSET;
00312           len = HID_DESC_SIZE;
00313           break;
00314         case HID_REPORT_DESCRIPTOR_TYPE:
00315           if (SetupPacket.wIndex.WB.L != USB_HID_IF_NUM) {
00316             return (FALSE);    /* Only Single HID Interface is supported */
00317           }
00318           EP0Data.pData = (uint8_t *)HID_ReportDescriptor;
00319           len = HID_ReportDescSize;
00320           break;
00321         case HID_PHYSICAL_DESCRIPTOR_TYPE:
00322           return (FALSE);      /* HID Physical Descriptor is not supported */
00323 #endif
00324         default:
00325           return (FALSE);
00326       }
00327     default:
00328       return (FALSE);
00329   }
00330
00331   if (EP0Data.Count > len) {
00332     EP0Data.Count = len;
00333   }
00334   USB_DataInStage();
00335
00336   return (TRUE);
00337 }
00338
00339
00340 /*
00341  *  Set Configuration USB Request
00342  *    Parameters:      None (global SetupPacket)
00343  *    Return Value:    TRUE - Success, FALSE - Error
00344  */
00345
00346 #ifdef __IAR_SYSTEMS_ICC__
00347 inline uint32_t USB_SetConfiguration (void) {
00348 #else
00349 __inline uint32_t USB_SetConfiguration (void) {
00350 #endif
00351   USB_COMMON_DESCRIPTOR *pD;
00352         uint32_t  alt, n, m;
00353         uint32_t tmp;
00354
00355   if (SetupPacket.wValue.WB.L) {
00356     pD = (USB_COMMON_DESCRIPTOR *)USB_ConfigDescriptor;
00357     while (pD->bLength) {
00358       switch (pD->bDescriptorType) {
00359         case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00360           if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bConfigurationValue == SetupPacket.wValue.WB.L) {
00361             USB_Configuration = SetupPacket.wValue.WB.L;
00362             USB_NumInterfaces = ((USB_CONFIGURATION_DESCRIPTOR *)pD)->bNumInterfaces;
00363             for (n = 0; n < USB_IF_NUM; n++) {
00364               USB_AltSetting[n] = 0;
00365             }
00366             for (n = 1; n < 16; n++) {
00367               if (USB_EndPointMask & (1 << n)) {
00368                 USB_DisableEP(n);
00369               }
00370               if (USB_EndPointMask & ((1 << 16) << n)) {
00371                 USB_DisableEP(n | 0x80);
00372               }
00373             }
00374             USB_EndPointMask = 0x00010001;
00375             USB_EndPointHalt = 0x00000000;
00376             USB_Configure(TRUE);
00377             if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bmAttributes & USB_CONFIG_SELF_POWERED) {
00378               USB_DeviceStatus |=  USB_GETSTATUS_SELF_POWERED;
00379             } else {
00380               USB_DeviceStatus &= ~USB_GETSTATUS_SELF_POWERED;
00381             }
00382           } else {
00383             //(uint8_t *)pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00384             tmp = (uint32_t) pD;
00385             tmp += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00386             pD = (USB_COMMON_DESCRIPTOR *)tmp;
00387             continue;
00388           }
00389           break;
00390         case USB_INTERFACE_DESCRIPTOR_TYPE:
00391           alt = ((USB_INTERFACE_DESCRIPTOR *)pD)->bAlternateSetting;
00392           break;
00393         case USB_ENDPOINT_DESCRIPTOR_TYPE:
00394           if (alt == 0) {
00395             n = ((USB_ENDPOINT_DESCRIPTOR *)pD)->bEndpointAddress & 0x8F;
00396             m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00397             USB_EndPointMask |= m;
00398             USB_ConfigEP((USB_ENDPOINT_DESCRIPTOR *)pD);
00399             USB_EnableEP(n);
00400             USB_ResetEP(n);
00401           }
00402           break;
00403       }
00404       //(uint8_t *)pD += pD->bLength;
00405       tmp = (uint32_t) pD;
00406       tmp += pD->bLength;
00407       pD = (USB_COMMON_DESCRIPTOR *)tmp;
00408     }
00409   }
00410   else {
00411     USB_Configuration = 0;
00412     for (n = 1; n < 16; n++) {
00413       if (USB_EndPointMask & (1 << n)) {
00414         USB_DisableEP(n);
00415       }
00416       if (USB_EndPointMask & ((1 << 16) << n)) {
00417         USB_DisableEP(n | 0x80);
00418       }
00419     }
00420     USB_EndPointMask  = 0x00010001;
00421     USB_EndPointHalt  = 0x00000000;
00422     USB_Configure(FALSE);
00423   }
00424
00425   if (USB_Configuration == SetupPacket.wValue.WB.L) {
00426     return (TRUE);
00427   } else {
00428     return (FALSE);
00429   }
00430 }
00431
00432
00433 /*
00434  *  Set Interface USB Request
00435  *    Parameters:      None (global SetupPacket)
00436  *    Return Value:    TRUE - Success, FALSE - Error
00437  */
00438
00439 #ifdef __IAR_SYSTEMS_ICC__
00440 inline uint32_t USB_SetInterface (void) {
00441 #else
00442 __inline uint32_t USB_SetInterface (void) {
00443 #endif
00444   USB_COMMON_DESCRIPTOR *pD;
00445   uint32_t                  ifn, alt, old, msk, n, m;
00446   uint32_t                   set;
00447   uint32_t tmp;
00448
00449   if (USB_Configuration == 0) return (FALSE);
00450
00451   set = FALSE;
00452   pD  = (USB_COMMON_DESCRIPTOR *)USB_ConfigDescriptor;
00453   while (pD->bLength) {
00454     switch (pD->bDescriptorType) {
00455       case USB_CONFIGURATION_DESCRIPTOR_TYPE:
00456         if (((USB_CONFIGURATION_DESCRIPTOR *)pD)->bConfigurationValue != USB_Configuration) {
00457           //(uint8_t *)pD += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00458                 tmp = (uint32_t)pD;
00459                 tmp += ((USB_CONFIGURATION_DESCRIPTOR *)pD)->wTotalLength;
00460                 pD = (USB_COMMON_DESCRIPTOR *)tmp;
00461           continue;
00462         }
00463         break;
00464       case USB_INTERFACE_DESCRIPTOR_TYPE:
00465         ifn = ((USB_INTERFACE_DESCRIPTOR *)pD)->bInterfaceNumber;
00466         alt = ((USB_INTERFACE_DESCRIPTOR *)pD)->bAlternateSetting;
00467         msk = 0;
00468         if ((ifn == SetupPacket.wIndex.WB.L) && (alt == SetupPacket.wValue.WB.L)) {
00469           set = TRUE;
00470           old = USB_AltSetting[ifn];
00471           USB_AltSetting[ifn] = (uint8_t)alt;
00472         }
00473         break;
00474       case USB_ENDPOINT_DESCRIPTOR_TYPE:
00475         if (ifn == SetupPacket.wIndex.WB.L) {
00476           n = ((USB_ENDPOINT_DESCRIPTOR *)pD)->bEndpointAddress & 0x8F;
00477           m = (n & 0x80) ? ((1 << 16) << (n & 0x0F)) : (1 << n);
00478           if (alt == SetupPacket.wValue.WB.L) {
00479             USB_EndPointMask |=  m;
00480             USB_EndPointHalt &= ~m;
00481             USB_ConfigEP((USB_ENDPOINT_DESCRIPTOR *)pD);
00482             USB_EnableEP(n);
00483             USB_ResetEP(n);
00484             msk |= m;
00485           }
00486           else if ((alt == old) && ((msk & m) == 0)) {
00487             USB_EndPointMask &= ~m;
00488             USB_EndPointHalt &= ~m;
00489             USB_DisableEP(n);
00490           }
00491         }
00492         break;
00493     }
00494     //(uint8_t *)pD += pD->bLength;
00495     tmp = (uint32_t)pD;
00496     tmp += pD->bLength;
00497     pD = (USB_COMMON_DESCRIPTOR *) tmp;
00498   }
00499   return (set);
00500 }
00501
00502
00503 /*
00504  *  USB Endpoint 0 Event Callback
00505  *    Parameter:       event
00506  */
00507
00508 void USB_EndPoint0 (uint32_t event) {
00509
00510   switch (event) {
00511
00512     case USB_EVT_SETUP:
00513       USB_SetupStage();
00514       USB_DirCtrlEP(SetupPacket.bmRequestType.BM.Dir);
00515       EP0Data.Count = SetupPacket.wLength;
00516       switch (SetupPacket.bmRequestType.BM.Type) {
00517
00518         case REQUEST_STANDARD:
00519           switch (SetupPacket.bRequest) {
00520
00521             case USB_REQUEST_GET_STATUS:
00522               if (!USB_GetStatus()) {
00523                 goto stall_i;
00524               }
00525               break;
00526
00527             case USB_REQUEST_CLEAR_FEATURE:
00528               if (!USB_SetClrFeature(0)) {
00529                 goto stall_i;
00530               }
00531               USB_StatusInStage();
00532 #if USB_FEATURE_EVENT
00533               USB_Feature_Event();
00534 #endif
00535               break;
00536
00537             case USB_REQUEST_SET_FEATURE:
00538               if (!USB_SetClrFeature(1)) {
00539                 goto stall_i;
00540               }
00541               USB_StatusInStage();
00542 #if USB_FEATURE_EVENT
00543               USB_Feature_Event();
00544 #endif
00545               break;
00546
00547             case USB_REQUEST_SET_ADDRESS:
00548               switch (SetupPacket.bmRequestType.BM.Recipient) {
00549                 case REQUEST_TO_DEVICE:
00550                   USB_DeviceAddress = 0x80 | SetupPacket.wValue.WB.L;
00551                   USB_StatusInStage();
00552                   break;
00553                 default:
00554                   goto stall_i;
00555               }
00556               break;
00557
00558             case USB_REQUEST_GET_DESCRIPTOR:
00559               if (!USB_GetDescriptor()) {
00560                 goto stall_i;
00561               }
00562               break;
00563
00564             case USB_REQUEST_SET_DESCRIPTOR:
00565 /*stall_o:*/  USB_SetStallEP(0x00);
00566               EP0Data.Count = 0;
00567               break;
00568
00569             case USB_REQUEST_GET_CONFIGURATION:
00570               switch (SetupPacket.bmRequestType.BM.Recipient) {
00571                 case REQUEST_TO_DEVICE:
00572                   EP0Data.pData = &USB_Configuration;
00573                   USB_DataInStage();
00574                   break;
00575                 default:
00576                   goto stall_i;
00577               }
00578               break;
00579
00580             case USB_REQUEST_SET_CONFIGURATION:
00581               switch (SetupPacket.bmRequestType.BM.Recipient) {
00582                 case REQUEST_TO_DEVICE:
00583                   if (!USB_SetConfiguration()) {
00584                     goto stall_i;
00585                   }
00586                   USB_StatusInStage();
00587 #if USB_CONFIGURE_EVENT
00588                   USB_Configure_Event();
00589 #endif
00590                   break;
00591                 default:
00592                   goto stall_i;
00593               }
00594               break;
00595
00596             case USB_REQUEST_GET_INTERFACE:
00597               switch (SetupPacket.bmRequestType.BM.Recipient) {
00598                 case REQUEST_TO_INTERFACE:
00599                   if ((USB_Configuration != 0) &&
00600                       (SetupPacket.wIndex.WB.L < USB_NumInterfaces)) {
00601                     EP0Data.pData = USB_AltSetting + SetupPacket.wIndex.WB.L;
00602                     USB_DataInStage();
00603                   } else {
00604                     goto stall_i;
00605                   }
00606                   break;
00607                 default:
00608                   goto stall_i;
00609               }
00610               break;
00611
00612             case USB_REQUEST_SET_INTERFACE:
00613               switch (SetupPacket.bmRequestType.BM.Recipient) {
00614                 case REQUEST_TO_INTERFACE:
00615                   if (!USB_SetInterface()) {
00616                     goto stall_i;
00617                   }
00618                   USB_StatusInStage();
00619 #if USB_INTERFACE_EVENT
00620                   USB_Interface_Event();
00621 #endif
00622                   break;
00623                 default:
00624                   goto stall_i;
00625               }
00626               break;
00627
00628             default:
00629               goto stall_i;
00630
00631           }
00632           break;
00633
00634         case REQUEST_CLASS:
00635 #if USB_CLASS
00636           switch (SetupPacket.bmRequestType.BM.Recipient) {
00637             case REQUEST_TO_INTERFACE:
00638 #if USB_HID
00639               if (SetupPacket.wIndex.WB.L == USB_HID_IF_NUM) {
00640                 switch (SetupPacket.bRequest) {
00641                   case HID_REQUEST_GET_REPORT:
00642                     if (HID_GetReport()) {
00643                       EP0Data.pData = EP0Buf;
00644                       USB_DataInStage();
00645                       goto class_ok;
00646                     }
00647                     break;
00648                   case HID_REQUEST_SET_REPORT:
00649                     EP0Data.pData = EP0Buf;
00650                     goto class_ok;
00651                   case HID_REQUEST_GET_IDLE:
00652                     if (HID_GetIdle()) {
00653                       EP0Data.pData = EP0Buf;
00654                       USB_DataInStage();
00655                       goto class_ok;
00656                     }
00657                     break;
00658                   case HID_REQUEST_SET_IDLE:
00659                     if (HID_SetIdle()) {
00660                       USB_StatusInStage();
00661                       goto class_ok;
00662                     }
00663                     break;
00664                   case HID_REQUEST_GET_PROTOCOL:
00665                     if (HID_GetProtocol()) {
00666                       EP0Data.pData = EP0Buf;
00667                       USB_DataInStage();
00668                       goto class_ok;
00669                     }
00670                     break;
00671                   case HID_REQUEST_SET_PROTOCOL:
00672                     if (HID_SetProtocol()) {
00673                       USB_StatusInStage();
00674                       goto class_ok;
00675                     }
00676                     break;
00677                 }
00678               }
00679 #endif  /* USB_HID */
00680 #if USB_MSC
00681               if (SetupPacket.wIndex.WB.L == USB_MSC_IF_NUM) {
00682                 switch (SetupPacket.bRequest) {
00683                   case MSC_REQUEST_RESET:
00684                     if (MSC_Reset()) {
00685                       USB_StatusInStage();
00686                       goto class_ok;
00687                     }
00688                     break;
00689                   case MSC_REQUEST_GET_MAX_LUN:
00690                     if (MSC_GetMaxLUN()) {
00691                       EP0Data.pData = EP0Buf;
00692                       USB_DataInStage();
00693                       goto class_ok;
00694                     }
00695                     break;
00696                 }
00697               }
00698 #endif  /* USB_MSC */
00699 #if USB_AUDIO
00700               if ((SetupPacket.wIndex.WB.L == USB_ADC_CIF_NUM)  ||
00701                   (SetupPacket.wIndex.WB.L == USB_ADC_SIF1_NUM) ||
00702                   (SetupPacket.wIndex.WB.L == USB_ADC_SIF2_NUM)) {
00703                 if (SetupPacket.bmRequestType.BM.Dir) {
00704                   if (ADC_IF_GetRequest()) {
00705                     EP0Data.pData = EP0Buf;
00706                     USB_DataInStage();
00707                     goto class_ok;
00708                   }
00709                 } else {
00710                   EP0Data.pData = EP0Buf;
00711                   goto class_ok;
00712                 }
00713               }
00714 #endif  /* USB_AUDIO */
00715               goto stall_i;
00716 #if USB_AUDIO
00717             case REQUEST_TO_ENDPOINT:
00718               if (SetupPacket.bmRequestType.BM.Dir) {
00719                 if (ADC_EP_GetRequest()) {
00720                   EP0Data.pData = EP0Buf;
00721                   USB_DataInStage();
00722                   goto class_ok;
00723                 }
00724               } else {
00725                 EP0Data.pData = EP0Buf;
00726                 goto class_ok;
00727               }
00728               goto stall_i;
00729 #endif  /* USB_AUDIO */
00730             default:
00731               goto stall_i;
00732           }
00733 class_ok: break;
00734 #else
00735           goto stall_i;
00736 #endif  /* USB_CLASS */
00737
00738         case REQUEST_VENDOR:
00739           goto stall_i;
00740
00741         default:
00742 stall_i:  USB_SetStallEP(0x80);
00743           EP0Data.Count = 0;
00744           break;
00745
00746       }
00747       break;
00748
00749     case USB_EVT_OUT:
00750       if (SetupPacket.bmRequestType.BM.Dir == 0) {
00751         if (EP0Data.Count) {
00752           USB_DataOutStage();
00753           if (EP0Data.Count == 0) {
00754             switch (SetupPacket.bmRequestType.BM.Type) {
00755               case REQUEST_STANDARD:
00756                 goto stall_i;
00757 #if (USB_CLASS)
00758               case REQUEST_CLASS:
00759                 switch (SetupPacket.bmRequestType.BM.Recipient) {
00760                   case REQUEST_TO_INTERFACE:
00761 #if USB_HID
00762                     if (SetupPacket.wIndex.WB.L == USB_HID_IF_NUM) {
00763                       if (!HID_SetReport()) {
00764                         goto stall_i;
00765                       }
00766                       break;
00767                     }
00768 #endif
00769 #if USB_AUDIO
00770                     if ((SetupPacket.wIndex.WB.L == USB_ADC_CIF_NUM)  ||
00771                         (SetupPacket.wIndex.WB.L == USB_ADC_SIF1_NUM) ||
00772                         (SetupPacket.wIndex.WB.L == USB_ADC_SIF2_NUM)) {
00773                       if (!ADC_IF_SetRequest()) {
00774                         goto stall_i;
00775                       }
00776                       break;
00777                     }
00778 #endif
00779                     goto stall_i;
00780                   case REQUEST_TO_ENDPOINT:
00781 #if USB_AUDIO
00782                     if (ADC_EP_SetRequest()) break;
00783 #endif
00784                     goto stall_i;
00785                   default:
00786                     goto stall_i;
00787                 }
00788 #endif
00789               default:
00790                 goto stall_i;
00791             }
00792 //           USB_StatusInStage();
00793           }
00794         }
00795       } else {
00796         USB_StatusOutStage();
00797       }
00798       break;
00799
00800     case USB_EVT_IN:
00801       if (SetupPacket.bmRequestType.BM.Dir == 1) {
00802         USB_DataInStage();
00803       } else {
00804         if (USB_DeviceAddress & 0x80) {
00805           USB_DeviceAddress &= 0x7F;
00806           USB_SetAddress(USB_DeviceAddress);
00807         }
00808       }
00809       break;
00810
00811     case USB_EVT_IN_STALL:
00812       USB_ClrStallEP(0x80);
00813       break;
00814
00815     case USB_EVT_OUT_STALL:
00816       USB_ClrStallEP(0x00);
00817       break;
00818
00819   }
00820 }
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbcore.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBCORE.H
00005  *      Purpose: USB Core Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBCORE_H__
00020 #define __USBCORE_H__
00021
00022
00023 /* USB Endpoint Data Structure */
00024 typedef struct _USB_EP_DATA {
00025   uint8_t  *pData;
00026   uint16_t   Count;
00027 } USB_EP_DATA;
00028
00029 /* USB Core Global Variables */
00030 extern uint16_t  USB_DeviceStatus;
00031 extern uint8_t  USB_DeviceAddress;
00032 extern uint8_t  USB_Configuration;
00033 extern uint32_t USB_EndPointMask;
00034 extern uint32_t USB_EndPointHalt;
00035 extern uint8_t  USB_AltSetting[USB_IF_NUM];
00036
00037 /* USB Endpoint 0 Buffer */
00038 extern uint8_t  EP0Buf[USB_MAX_PACKET0];
00039
00040 /* USB Endpoint 0 Data Info */
00041 extern USB_EP_DATA EP0Data;
00042
00043 /* USB Setup Packet */
00044 extern USB_SETUP_PACKET SetupPacket;
00045
00046 /* USB Core Functions */
00047 extern void  USB_ResetCore (void);
00048
00049
00050 #endif  /* __USBCORE_H__ */
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbdesc.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbdesc.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBDESC.C
00005  *      Purpose: USB Descriptors
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include "lpc_types.h"
00020
00021 #include "usb.h"
00022 #include "msc.h"
00023 #include "usbcfg.h"
00024 #include "usbdesc.h"
00025
00026
00027 /* USB Standard Device Descriptor */
00028 const uint8_t USB_DeviceDescriptor[] = {
00029   USB_DEVICE_DESC_SIZE,              /* bLength */
00030   USB_DEVICE_DESCRIPTOR_TYPE,        /* bDescriptorType */
00031   WBVAL(0x0200), /* 2.00 */          /* bcdUSB */
00032   0x00,                              /* bDeviceClass */
00033   0x00,                              /* bDeviceSubClass */
00034   0x00,                              /* bDeviceProtocol */
00035   USB_MAX_PACKET0,                   /* bMaxPacketSize0 */
00036   WBVAL(0xC251),                     /* idVendor */
00037   WBVAL(0x1303),                     /* idProduct */
00038   WBVAL(0x0100), /* 1.00 */          /* bcdDevice */
00039   0x04,                              /* iManufacturer */
00040   0x20,                              /* iProduct */
00041   0x48,                              /* iSerialNumber */
00042   0x01                               /* bNumConfigurations */
00043 };
00044
00045 /* USB Configuration Descriptor */
00046 /*   All Descriptors (Configuration, Interface, Endpoint, Class, Vendor */
00047 const uint8_t USB_ConfigDescriptor[] = {
00048 /* Configuration 1 */
00049   USB_CONFIGUARTION_DESC_SIZE,       /* bDescriptorType */
00050   USB_CONFIGURATION_DESCRIPTOR_TYPE, /* bDescriptorType */
00051   WBVAL(                             /* wTotalLength */
00052     1*USB_CONFIGUARTION_DESC_SIZE +
00053     1*USB_INTERFACE_DESC_SIZE     +
00054     2*USB_ENDPOINT_DESC_SIZE
00055   ),
00056   0x01,                              /* bNumInterfaces */
00057   0x01,                              /* bConfigurationValue */
00058   0x00,                              /* iConfiguration */
00059   USB_CONFIG_BUS_POWERED /*|*/       /* bmAttributes */
00060 /*USB_CONFIG_REMOTE_WAKEUP*/,
00061   USB_CONFIG_POWER_MA(100),          /* bMaxPower */
00062 /* Interface 0, Alternate Setting 0, MSC Class */
00063   USB_INTERFACE_DESC_SIZE,           /* bLength */
00064   USB_INTERFACE_DESCRIPTOR_TYPE,     /* bDescriptorType */
00065   0x00,                              /* bInterfaceNumber */
00066   0x00,                              /* bAlternateSetting */
00067   0x02,                              /* bNumEndpoints */
00068   USB_DEVICE_CLASS_STORAGE,          /* bInterfaceClass */
00069   MSC_SUBCLASS_SCSI,                 /* bInterfaceSubClass */
00070   MSC_PROTOCOL_BULK_ONLY,            /* bInterfaceProtocol */
00071   0x62,                              /* iInterface */
00072 /* Bulk In Endpoint */
00073   USB_ENDPOINT_DESC_SIZE,            /* bLength */
00074   USB_ENDPOINT_DESCRIPTOR_TYPE,      /* bDescriptorType */
00075   USB_ENDPOINT_IN(2),                /* bEndpointAddress */
00076   USB_ENDPOINT_TYPE_BULK,            /* bmAttributes */
00077   WBVAL(0x0040),                     /* wMaxPacketSize */
00078   0,                                 /* bInterval */
00079 /* Bulk Out Endpoint */
00080   USB_ENDPOINT_DESC_SIZE,            /* bLength */
00081   USB_ENDPOINT_DESCRIPTOR_TYPE,      /* bDescriptorType */
00082   USB_ENDPOINT_OUT(2),               /* bEndpointAddress */
00083   USB_ENDPOINT_TYPE_BULK,            /* bmAttributes */
00084   WBVAL(0x0040),                     /* wMaxPacketSize */
00085   0,                                 /* bInterval */
00086 /* Terminator */
00087   0                                  /* bLength */
00088 };
00089
00090 /* USB String Descriptor (optional) */
00091 const uint8_t USB_StringDescriptor[] = {
00092 /* Index 0x00: LANGID Codes */
00093   0x04,                              /* bLength */
00094   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00095   WBVAL(0x0409), /* US English */    /* wLANGID */
00096 /* Index 0x04: Manufacturer */
00097   0x1C,                              /* bLength */
00098   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00099   'N',0,
00100   'X',0,
00101   'P',0,
00102   ' ',0,
00103   'S',0,
00104   'e',0,
00105   'm',0,
00106   'i',0,
00107   'c',0,
00108   'o',0,
00109   'n',0,
00110   'd',0,
00111   ' ',0,
00112 /* Index 0x20: Product */
00113   0x28,                              /* bLength */
00114   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00115   'N',0,
00116   'X',0,
00117   'P',0,
00118   ' ',0,
00119   'L',0,
00120   'P',0,
00121   'C',0,
00122   '1',0,
00123   '7',0,
00124   'x',0,
00125   'x',0,
00126   ' ',0,
00127   'M',0,
00128   'e',0,
00129   'm',0,
00130   'o',0,
00131   'r',0,
00132   'y',0,
00133   ' ',0,
00134 /* Index 0x48: Serial Number */
00135   0x1A,                              /* bLength */
00136   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00137   'D',0,
00138   'E',0,
00139   'M',0,
00140   'O',0,
00141   '0',0,
00142   '0',0,
00143   '0',0,
00144   '0',0,
00145   '0',0,
00146   '0',0,
00147   '0',0,
00148   '0',0,
00149 /* Index 0x62: Interface 0, Alternate Setting 0 */
00150   0x0E,                              /* bLength */
00151   USB_STRING_DESCRIPTOR_TYPE,        /* bDescriptorType */
00152   'M',0,
00153   'e',0,
00154   'm',0,
00155   'o',0,
00156   'r',0,
00157   'y',0,
00158 };
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbdesc.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbdesc.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBDESC.H
00005  *      Purpose: USB Descriptors Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *---------------------------------------------------------------------------*/
00016
00017 #ifndef __USBDESC_H__
00018 #define __USBDESC_H__
00019
00020
00021 #define WBVAL(x) (x & 0xFF),((x >> 8) & 0xFF)
00022
00023 #define USB_DEVICE_DESC_SIZE        (sizeof(USB_DEVICE_DESCRIPTOR))
00024 #define USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))
00025 #define USB_INTERFACE_DESC_SIZE     (sizeof(USB_INTERFACE_DESCRIPTOR))
00026 #define USB_ENDPOINT_DESC_SIZE      (sizeof(USB_ENDPOINT_DESCRIPTOR))
00027
00028 extern const uint8_t USB_DeviceDescriptor[];
00029 extern const uint8_t USB_ConfigDescriptor[];
00030 extern const uint8_t USB_StringDescriptor[];
00031
00032
00033 #endif  /* __USBDESC_H__ */
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBHW.C
00005  *      Purpose: USB Hardware Layer Module for NXP Semiconductor LPC family MCUs
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include <LPC17xx.h>                        /* LPC17xx definitions */
00020
00021 #include "lpc_types.h"
00022
00023 #include "usb.h"
00024 #include "usbcfg.h"
00025 #include "usbreg.h"
00026 #include "usbhw.h"
00027 #include "usbcore.h"
00028 #include "usbuser.h"
00029
00030 #ifndef __IAR_SYSTEMS_ICC__
00031 #pragma diag_suppress 1441
00032 #endif
00033
00034 #define EP_MSK_CTRL 0x0001      /* Control Endpoint Logical Address Mask */
00035 #define EP_MSK_BULK 0xC924      /* Bulk Endpoint Logical Address Mask */
00036 #define EP_MSK_INT  0x4492      /* Interrupt Endpoint Logical Address Mask */
00037 #define EP_MSK_ISO  0x1248      /* Isochronous Endpoint Logical Address Mask */
00038
00039
00040 #if USB_DMA
00041
00042 #if defined (  __CC_ARM  )
00043 #pragma arm section zidata = "USB_RAM"
00044 uint32_t UDCA[USB_EP_NUM];                     /* UDCA in USB RAM */
00045 uint32_t DD_NISO_Mem[4*DD_NISO_CNT];           /* Non-Iso DMA Descriptor Memory */
00046 uint32_t DD_ISO_Mem [5*DD_ISO_CNT];            /* Iso DMA Descriptor Memory */
00047 #pragma arm section zidata
00048 uint32_t udca[USB_EP_NUM];                     /* UDCA saved values */
00049 uint32_t DDMemMap[2];                          /* DMA Descriptor Memory Usage */
00050 #endif
00051
00052 #if defined (  __IAR_SYSTEMS_ICC__  )
00053 #pragma location = "USB_RAM"
00054 uint32_t UDCA[USB_EP_NUM];                     /* UDCA in USB RAM */
00055 #pragma location = "USB_RAM"
00056 uint32_t DD_NISO_Mem[4*DD_NISO_CNT];           /* Non-Iso DMA Descriptor Memory */
00057 #pragma location = "USB_RAM"
00058 uint32_t DD_ISO_Mem [5*DD_ISO_CNT];            /* Iso DMA Descriptor Memory */
00059
00060 uint32_t udca[USB_EP_NUM];                     /* UDCA saved values */
00061 uint32_t DDMemMap[2];                          /* DMA Descriptor Memory Usage */
00062 #endif
00063
00064 #if defined (  __GNUC__  )
00065 uint32_t UDCA[USB_EP_NUM] __attribute__((section("USB_RAM")));                          /* UDCA in USB RAM */
00066 uint32_t DD_NISO_Mem[4*DD_NISO_CNT] __attribute__((section("USB_RAM")));    /* Non-Iso DMA Descriptor Memory */
00067 uint32_t DD_ISO_Mem [5*DD_ISO_CNT] __attribute__((section("USB_RAM")));     /* Iso DMA Descriptor Memory */
00068 uint32_t udca[USB_EP_NUM];                                                                              /* UDCA saved values */
00069 uint32_t DDMemMap[2];                                                                                   /* DMA Descriptor Memory Usage */
00070 #endif
00071 #endif
00072
00073
00074 /*
00075  *  Get Endpoint Physical Address
00076  *    Parameters:      EPNum: Endpoint Number
00077  *                       EPNum.0..3: Address
00078  *                       EPNum.7:    Dir
00079  *    Return Value:    Endpoint Physical Address
00080  */
00081
00082 uint32_t EPAdr (uint32_t EPNum) {
00083   uint32_t val;
00084
00085   val = (EPNum & 0x0F) << 1;
00086   if (EPNum & 0x80) {
00087     val += 1;
00088   }
00089   return (val);
00090 }
00091
00092
00093 /*
00094  *  Write Command
00095  *    Parameters:      cmd:   Command
00096  *    Return Value:    None
00097  */
00098
00099 void WrCmd (uint32_t cmd) {
00100
00101   LPC_USB->USBDevIntClr = CCEMTY_INT;
00102   LPC_USB->USBCmdCode = cmd;
00103   while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00104 }
00105
00106
00107 /*
00108  *  Write Command Data
00109  *    Parameters:      cmd:   Command
00110  *                     val:   Data
00111  *    Return Value:    None
00112  */
00113
00114 void WrCmdDat (uint32_t cmd, uint32_t val) {
00115
00116         LPC_USB->USBDevIntClr = CCEMTY_INT;
00117         LPC_USB->USBCmdCode = cmd;
00118         while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00119         LPC_USB->USBDevIntClr = CCEMTY_INT;
00120         LPC_USB->USBCmdCode = val;
00121         while ((LPC_USB->USBDevIntSt & CCEMTY_INT) == 0);
00122 }
00123
00124
00125 /*
00126  *  Read Command Data
00127  *    Parameters:      cmd:   Command
00128  *    Return Value:    Data Value
00129  */
00130
00131 uint32_t RdCmdDat (uint32_t cmd) {
00132
00133         LPC_USB->USBDevIntClr = CCEMTY_INT | CDFULL_INT;
00134         LPC_USB->USBCmdCode = cmd;
00135         while ((LPC_USB->USBDevIntSt & CDFULL_INT) == 0);
00136         return (LPC_USB->USBCmdData);
00137 }
00138
00139
00140 /*
00141  *  USB Initialize Function
00142  *   Called by the User to initialize USB
00143  *    Return Value:    None
00144  */
00145
00146 void USB_Init (void) {
00147
00148         LPC_PINCON->PINSEL1 &= ~((3<<26)|(3<<28));   /* P0.29 D+, P0.30 D- */
00149         LPC_PINCON->PINSEL1 |=  ((1<<26)|(1<<28));   /* PINSEL1 26.27, 28.29  = 01 */
00150
00151         LPC_PINCON->PINSEL3 &= ~((3<< 4)|(3<<28));   /* P1.18 GoodLink, P1.30 VBUS */
00152         LPC_PINCON->PINSEL3 |=  ((1<< 4)|(2<<28));   /* PINSEL3 4.5 = 01, 28.29 = 10 */
00153
00154         LPC_PINCON->PINSEL4 &= ~((3<<18)        );   /* P2.9 SoftConnect */
00155         LPC_PINCON->PINSEL4 |=  ((1<<18)        );   /* PINSEL4 18.19 = 01 */
00156
00157         LPC_SC->PCONP |= (1UL<<31);                /* USB PCLK -> enable USB Per.       */
00158
00159         LPC_USB->USBClkCtrl = 0x1A;                  /* Dev, PortSel, AHB clock enable */
00160         while ((LPC_USB->USBClkSt & 0x1A) != 0x1A);
00161
00162         NVIC_EnableIRQ(USB_IRQn);               /* enable USB interrupt */
00163
00164         USB_Reset();
00165         USB_SetAddress(0);
00166 }
00167
00168
00169 /*
00170  *  USB Connect Function
00171  *   Called by the User to Connect/Disconnect USB
00172  *    Parameters:      con:   Connect/Disconnect
00173  *    Return Value:    None
00174  */
00175
00176 void USB_Connect (uint32_t con) {
00177   WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(con ? DEV_CON : 0));
00178 }
00179
00180
00181 /*
00182  *  USB Reset Function
00183  *   Called automatically on USB Reset
00184  *    Return Value:    None
00185  */
00186
00187 void USB_Reset (void) {
00188 #if USB_DMA
00189   uint32_t n;
00190 #endif
00191
00192   LPC_USB->USBEpInd = 0;
00193   LPC_USB->USBMaxPSize = USB_MAX_PACKET0;
00194   LPC_USB->USBEpInd = 1;
00195   LPC_USB->USBMaxPSize = USB_MAX_PACKET0;
00196   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00197
00198   LPC_USB->USBEpIntClr  = 0xFFFFFFFF;
00199   LPC_USB->USBEpIntEn   = 0xFFFFFFFF ^ USB_DMA_EP;
00200   LPC_USB->USBDevIntClr = 0xFFFFFFFF;
00201   LPC_USB->USBDevIntEn  = DEV_STAT_INT    | EP_SLOW_INT    |
00202                (USB_SOF_EVENT   ? FRAME_INT : 0) |
00203                (USB_ERROR_EVENT ? ERR_INT   : 0);
00204
00205 #if USB_DMA
00206   LPC_USB->USBUDCAH   = USB_RAM_ADR;
00207   LPC_USB->USBDMARClr = 0xFFFFFFFF;
00208   LPC_USB->USBEpDMADis  = 0xFFFFFFFF;
00209   LPC_USB->USBEpDMAEn   = USB_DMA_EP;
00210   LPC_USB->USBEoTIntClr = 0xFFFFFFFF;
00211   LPC_USB->USBNDDRIntClr = 0xFFFFFFFF;
00212   LPC_USB->USBSysErrIntClr = 0xFFFFFFFF;
00213   LPC_USB->USBDMAIntEn  = 0x00000007;
00214   DDMemMap[0] = 0x00000000;
00215   DDMemMap[1] = 0x00000000;
00216   for (n = 0; n < USB_EP_NUM; n++) {
00217     udca[n] = 0;
00218     UDCA[n] = 0;
00219   }
00220 #endif
00221 }
00222
00223
00224 /*
00225  *  USB Suspend Function
00226  *   Called automatically on USB Suspend
00227  *    Return Value:    None
00228  */
00229
00230 void USB_Suspend (void) {
00231   /* Performed by Hardware */
00232 }
00233
00234
00235 /*
00236  *  USB Resume Function
00237  *   Called automatically on USB Resume
00238  *    Return Value:    None
00239  */
00240
00241 void USB_Resume (void) {
00242   /* Performed by Hardware */
00243 }
00244
00245
00246 /*
00247  *  USB Remote Wakeup Function
00248  *   Called automatically on USB Remote Wakeup
00249  *    Return Value:    None
00250  */
00251
00252 void USB_WakeUp (void) {
00253
00254   if (USB_DeviceStatus & USB_GETSTATUS_REMOTE_WAKEUP) {
00255     WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(DEV_CON));
00256   }
00257 }
00258
00259
00260 /*
00261  *  USB Remote Wakeup Configuration Function
00262  *    Parameters:      cfg:   Enable/Disable
00263  *    Return Value:    None
00264  */
00265
00266 void USB_WakeUpCfg (uint32_t cfg) {
00267   /* Not needed */
00268 }
00269
00270
00271 /*
00272  *  USB Set Address Function
00273  *    Parameters:      adr:   USB Address
00274  *    Return Value:    None
00275  */
00276
00277 void USB_SetAddress (uint32_t adr) {
00278   WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /* Don't wait for next */
00279   WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /*  Setup Status Phase */
00280 }
00281
00282
00283 /*
00284  *  USB Configure Function
00285  *    Parameters:      cfg:   Configure/Deconfigure
00286  *    Return Value:    None
00287  */
00288
00289 void USB_Configure (uint32_t cfg) {
00290
00291   WrCmdDat(CMD_CFG_DEV, DAT_WR_BYTE(cfg ? CONF_DVICE : 0));
00292
00293   LPC_USB->USBReEp = 0x00000003;
00294   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00295   LPC_USB->USBDevIntClr = EP_RLZED_INT;
00296 }
00297
00298
00299 /*
00300  *  Configure USB Endpoint according to Descriptor
00301  *    Parameters:      pEPD:  Pointer to Endpoint Descriptor
00302  *    Return Value:    None
00303  */
00304
00305 void USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD) {
00306   uint32_t num;
00307
00308   num = EPAdr(pEPD->bEndpointAddress);
00309   LPC_USB->USBReEp |= (1 << num);
00310   LPC_USB->USBEpInd = num;
00311   LPC_USB->USBMaxPSize = pEPD->wMaxPacketSize;
00312   while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
00313   LPC_USB->USBDevIntClr = EP_RLZED_INT;
00314 }
00315
00316
00317 /*
00318  *  Set Direction for USB Control Endpoint
00319  *    Parameters:      dir:   Out (dir == 0), In (dir <> 0)
00320  *    Return Value:    None
00321  */
00322
00323 void USB_DirCtrlEP (uint32_t dir) {
00324   /* Not needed */
00325 }
00326
00327
00328 /*
00329  *  Enable USB Endpoint
00330  *    Parameters:      EPNum: Endpoint Number
00331  *                       EPNum.0..3: Address
00332  *                       EPNum.7:    Dir
00333  *    Return Value:    None
00334  */
00335
00336 void USB_EnableEP (uint32_t EPNum) {
00337   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00338 }
00339
00340
00341 /*
00342  *  Disable USB Endpoint
00343  *    Parameters:      EPNum: Endpoint Number
00344  *                       EPNum.0..3: Address
00345  *                       EPNum.7:    Dir
00346  *    Return Value:    None
00347  */
00348
00349 void USB_DisableEP (uint32_t EPNum) {
00350   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_DA));
00351 }
00352
00353
00354 /*
00355  *  Reset USB Endpoint
00356  *    Parameters:      EPNum: Endpoint Number
00357  *                       EPNum.0..3: Address
00358  *                       EPNum.7:    Dir
00359  *    Return Value:    None
00360  */
00361
00362 void USB_ResetEP (uint32_t EPNum) {
00363   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00364 }
00365
00366
00367 /*
00368  *  Set Stall for USB Endpoint
00369  *    Parameters:      EPNum: Endpoint Number
00370  *                       EPNum.0..3: Address
00371  *                       EPNum.7:    Dir
00372  *    Return Value:    None
00373  */
00374
00375 void USB_SetStallEP (uint32_t EPNum) {
00376   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_ST));
00377 }
00378
00379
00380 /*
00381  *  Clear Stall for USB Endpoint
00382  *    Parameters:      EPNum: Endpoint Number
00383  *                       EPNum.0..3: Address
00384  *                       EPNum.7:    Dir
00385  *    Return Value:    None
00386  */
00387
00388 void USB_ClrStallEP (uint32_t EPNum) {
00389   WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
00390 }
00391
00392
00393 /*
00394  *  Read USB Endpoint Data
00395  *    Parameters:      EPNum: Endpoint Number
00396  *                       EPNum.0..3: Address
00397  *                       EPNum.7:    Dir
00398  *                     pData: Pointer to Data Buffer
00399  *    Return Value:    Number of bytes read
00400  */
00401
00402 uint32_t USB_ReadEP (uint32_t EPNum, uint8_t *pData) {
00403   uint32_t cnt, n;
00404
00405   LPC_USB->USBCtrl = ((EPNum & 0x0F) << 2) | CTRL_RD_EN;
00406
00407   do {
00408     cnt = LPC_USB->USBRxPLen;
00409   } while ((cnt & PKT_RDY) == 0);
00410   cnt &= PKT_LNGTH_MASK;
00411
00412   for (n = 0; n < (cnt + 3) / 4; n++) {
00413     *((__packed uint32_t *)pData) = LPC_USB->USBRxData;
00414     pData += 4;
00415   }
00416   LPC_USB->USBCtrl = 0;
00417
00418   if (((EP_MSK_ISO >> EPNum) & 1) == 0) {   /* Non-Isochronous Endpoint */
00419     WrCmd(CMD_SEL_EP(EPAdr(EPNum)));
00420     WrCmd(CMD_CLR_BUF);
00421   }
00422   return (cnt);
00423 }
00424
00425
00426 /*
00427  *  Write USB Endpoint Data
00428  *    Parameters:      EPNum: Endpoint Number
00429  *                       EPNum.0..3: Address
00430  *                       EPNum.7:    Dir
00431  *                     pData: Pointer to Data Buffer
00432  *                     cnt:   Number of bytes to write
00433  *    Return Value:    Number of bytes written
00434  */
00435
00436 uint32_t USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt) {
00437   uint32_t n;
00438
00439   LPC_USB->USBCtrl = ((EPNum & 0x0F) << 2) | CTRL_WR_EN;
00440
00441   LPC_USB->USBTxPLen = cnt;
00442
00443   for (n = 0; n < (cnt + 3) / 4; n++) {
00444           LPC_USB->USBTxData = *((__packed uint32_t *)pData);
00445     pData += 4;
00446   }
00447   LPC_USB->USBCtrl = 0;
00448
00449   WrCmd(CMD_SEL_EP(EPAdr(EPNum)));
00450   WrCmd(CMD_VALID_BUF);
00451   return (cnt);
00452 }
00453
00454
00455 #if USB_DMA
00456
00457
00458 /* DMA Descriptor Memory Layout */
00459 const uint32_t DDAdr[2] = { DD_NISO_ADR, DD_ISO_ADR };
00460 const uint32_t DDSz [2] = { 16,          20         };
00461
00462
00463 /*
00464  *  Setup USB DMA Transfer for selected Endpoint
00465  *    Parameters:      EPNum: Endpoint Number
00466  *                     pDD: Pointer to DMA Descriptor
00467  *    Return Value:    TRUE - Success, FALSE - Error
00468  */
00469
00470 uint32_t USB_DMA_Setup(uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD) {
00471   uint32_t num, ptr, nxt, iso, n;
00472   uint32_t *tmp;
00473
00474   iso = pDD->Cfg.Type.IsoEP;                /* Iso or Non-Iso Descriptor */
00475   num = EPAdr(EPNum);                       /* Endpoint's Physical Address */
00476
00477   ptr = 0;                                  /* Current Descriptor */
00478   nxt = udca[num];                          /* Initial Descriptor */
00479   while (nxt) {                             /* Go through Descriptor List */
00480     ptr = nxt;                              /* Current Descriptor */
00481     if (!pDD->Cfg.Type.Link) {              /* Check for Linked Descriptors */
00482       n = (ptr - DDAdr[iso]) / DDSz[iso];   /* Descriptor Index */
00483       DDMemMap[iso] &= ~(1 << n);           /* Unmark Memory Usage */
00484     }
00485     nxt = *((uint32_t *)ptr);                  /* Next Descriptor */
00486   }
00487
00488   for (n = 0; n < 32; n++) {                /* Search for available Memory */
00489     if ((DDMemMap[iso] & (1 << n)) == 0) {
00490       break;                                /* Memory found */
00491     }
00492   }
00493   if (n == 32) return (FALSE);              /* Memory not available */
00494
00495   DDMemMap[iso] |= 1 << n;                  /* Mark Memory Usage */
00496   nxt = DDAdr[iso] + n * DDSz[iso];         /* Next Descriptor */
00497
00498   if (ptr && pDD->Cfg.Type.Link) {
00499     *((uint32_t *)(ptr + 0))  = nxt;           /* Link in new Descriptor */
00500     *((uint32_t *)(ptr + 4)) |= 0x00000004;    /* Next DD is Valid */
00501   } else {
00502     udca[num] = nxt;                        /* Save new Descriptor */
00503     UDCA[num] = nxt;                        /* Update UDCA in USB */
00504   }
00505
00506   /* Fill in DMA Descriptor */
00507   //*(((uint32_t *)nxt)++) =  0;                 /* Next DD Pointer */
00508   tmp = (uint32_t *)nxt;
00509   *tmp++ = 0;
00510 //  *(((uint32_t *)nxt)++) =  pDD->Cfg.Type.ATLE |
00511 //                       (pDD->Cfg.Type.IsoEP << 4) |
00512 //                       (pDD->MaxSize <<  5) |
00513 //                       (pDD->BufLen  << 16);
00514   *tmp++ =  pDD->Cfg.Type.ATLE |
00515                        (pDD->Cfg.Type.IsoEP << 4) |
00516                        (pDD->MaxSize <<  5) |
00517                        (pDD->BufLen  << 16);
00518 //  *(((uint32_t *)nxt)++) =  pDD->BufAdr;
00519   *tmp++ =  pDD->BufAdr;
00520 //  *(((uint32_t *)nxt)++) =  pDD->Cfg.Type.LenPos << 8;
00521   *tmp++ =  pDD->Cfg.Type.LenPos << 8;
00522   if (iso) {
00523 //    *((uint32_t *)nxt) =  pDD->InfoAdr;
00524           *tmp =  pDD->InfoAdr;
00525   }
00526
00527   return (TRUE); /* Success */
00528 }
00529
00530
00531 /*
00532  *  Enable USB DMA Endpoint
00533  *    Parameters:      EPNum: Endpoint Number
00534  *                       EPNum.0..3: Address
00535  *                       EPNum.7:    Dir
00536  *    Return Value:    None
00537  */
00538
00539 void USB_DMA_Enable (uint32_t EPNum) {
00540         LPC_USB->USBEpDMAEn = 1 << EPAdr(EPNum);
00541 }
00542
00543
00544 /*
00545  *  Disable USB DMA Endpoint
00546  *    Parameters:      EPNum: Endpoint Number
00547  *                       EPNum.0..3: Address
00548  *                       EPNum.7:    Dir
00549  *    Return Value:    None
00550  */
00551
00552 void USB_DMA_Disable (uint32_t EPNum) {
00553         LPC_USB->USBEpDMADis = 1 << EPAdr(EPNum);
00554 }
00555
00556
00557 /*
00558  *  Get USB DMA Endpoint Status
00559  *    Parameters:      EPNum: Endpoint Number
00560  *                       EPNum.0..3: Address
00561  *                       EPNum.7:    Dir
00562  *    Return Value:    DMA Status
00563  */
00564
00565 uint32_t USB_DMA_Status (uint32_t EPNum) {
00566   uint32_t ptr, val;
00567
00568   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00569   if (ptr == 0) return (USB_DMA_INVALID);
00570
00571   val = *((uint32_t *)(ptr + 3*4));            /* Status Information */
00572   switch ((val >> 1) & 0x0F) {
00573     case 0x00:                              /* Not serviced */
00574       return (USB_DMA_IDLE);
00575     case 0x01:                              /* Being serviced */
00576       return (USB_DMA_BUSY);
00577     case 0x02:                              /* Normal Completition */
00578       return (USB_DMA_DONE);
00579     case 0x03:                              /* Data Under Run */
00580       return (USB_DMA_UNDER_RUN);
00581     case 0x08:                              /* Data Over Run */
00582       return (USB_DMA_OVER_RUN);
00583     case 0x09:                              /* System Error */
00584       return (USB_DMA_ERROR);
00585   }
00586
00587   return (USB_DMA_UNKNOWN);
00588 }
00589
00590
00591 /*
00592  *  Get USB DMA Endpoint Current Buffer Address
00593  *    Parameters:      EPNum: Endpoint Number
00594  *                       EPNum.0..3: Address
00595  *                       EPNum.7:    Dir
00596  *    Return Value:    DMA Address (or -1 when DMA is Invalid)
00597  */
00598
00599 uint32_t USB_DMA_BufAdr (uint32_t EPNum) {
00600   uint32_t ptr, val;
00601
00602   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00603   if (ptr == 0)
00604   {
00605         return ((uint32_t)(-1));                /* DMA Invalid */
00606   }
00607
00608   val = *((uint32_t *)(ptr + 2*4));         /* Buffer Address */
00609   return (val);                             /* Current Address */
00610 }
00611
00612
00613 /*
00614  *  Get USB DMA Endpoint Current Buffer Count
00615  *   Number of transfered Bytes or Iso Packets
00616  *    Parameters:      EPNum: Endpoint Number
00617  *                       EPNum.0..3: Address
00618  *                       EPNum.7:    Dir
00619  *    Return Value:    DMA Count (or -1 when DMA is Invalid)
00620  */
00621
00622 uint32_t USB_DMA_BufCnt (uint32_t EPNum) {
00623   uint32_t ptr, val;
00624
00625   ptr = UDCA[EPAdr(EPNum)];                 /* Current Descriptor */
00626   if (ptr == 0)
00627   {
00628         return ((uint32_t)(-1));                /* DMA Invalid */
00629   }
00630   val = *((uint32_t *)(ptr + 3*4));         /* Status Information */
00631   return (val >> 16);                       /* Current Count */
00632 }
00633
00634
00635 #endif /* USB_DMA */
00636
00637
00638 /*
00639  *  Get USB Last Frame Number
00640  *    Parameters:      None
00641  *    Return Value:    Frame Number
00642  */
00643
00644 uint32_t USB_GetFrame (void) {
00645   uint32_t val;
00646
00647   WrCmd(CMD_RD_FRAME);
00648   val = RdCmdDat(DAT_RD_FRAME);
00649   val = val | (RdCmdDat(DAT_RD_FRAME) << 8);
00650
00651   return (val);
00652 }
00653
00654
00655 /*
00656  *  USB Interrupt Service Routine
00657  */
00658
00659 void USB_IRQHandler (void) {
00660   uint32_t disr, val, n, m;
00661
00662   disr = LPC_USB->USBDevIntSt;                      /* Device Interrupt Status */
00663   LPC_USB->USBDevIntClr = disr;
00664
00665   /* Device Status Interrupt (Reset, Connect change, Suspend/Resume) */
00666   if (disr & DEV_STAT_INT) {
00667     WrCmd(CMD_GET_DEV_STAT);
00668     val = RdCmdDat(DAT_GET_DEV_STAT);       /* Device Status */
00669     if (val & DEV_RST) {                    /* Reset */
00670       USB_Reset();
00671 #if   USB_RESET_EVENT
00672       USB_Reset_Event();
00673 #endif
00674     }
00675     if (val & DEV_CON_CH) {                 /* Connect change */
00676 #if   USB_POWER_EVENT
00677       USB_Power_Event(val & DEV_CON);
00678 #endif
00679     }
00680     if (val & DEV_SUS_CH) {                 /* Suspend/Resume */
00681       if (val & DEV_SUS) {                  /* Suspend */
00682         USB_Suspend();
00683 #if     USB_SUSPEND_EVENT
00684         USB_Suspend_Event();
00685 #endif
00686       } else {                              /* Resume */
00687         USB_Resume();
00688 #if     USB_RESUME_EVENT
00689         USB_Resume_Event();
00690 #endif
00691       }
00692     }
00693     goto isr_end;
00694   }
00695
00696 #if USB_SOF_EVENT
00697   /* Start of Frame Interrupt */
00698   if (disr & FRAME_INT) {
00699         LPC_USB->USBDevIntClr = FRAME_INT;
00700     USB_SOF_Event();
00701   }
00702 #endif
00703
00704 #if USB_ERROR_EVENT
00705   /* Error Interrupt */
00706   if (disr & ERR_INT) {
00707         LPC_USB->USBDevIntClr = ERR_INT;
00708     WrCmd(CMD_RD_ERR_STAT);
00709     val = RdCmdDat(DAT_RD_ERR_STAT);
00710     USB_Error_Event(val);
00711   }
00712 #endif
00713
00714   /* Endpoint's Slow Interrupt */
00715   if (disr & EP_SLOW_INT) {
00716     while (LPC_USB->USBEpIntSt) {                   /* Endpoint Interrupt Status */
00717
00718       for (n = 0; n < USB_EP_NUM; n++) {    /* Check All Endpoints */
00719         if (LPC_USB->USBEpIntSt & (1 << n)) {
00720           m = n >> 1;
00721           LPC_USB->USBEpIntClr = 1 << n;
00722           while ((LPC_USB->USBDevIntSt & CDFULL_INT) == 0);
00723           val = LPC_USB->USBCmdData;
00724
00725           if ((n & 1) == 0) {               /* OUT Endpoint */
00726             if (n == 0) {                   /* Control OUT Endpoint */
00727               if (val & EP_SEL_STP) {       /* Setup Packet */
00728                 if (USB_P_EP[0]) {
00729                   USB_P_EP[0](USB_EVT_SETUP);
00730                   continue;
00731                 }
00732               }
00733             }
00734             if (USB_P_EP[m]) {
00735               USB_P_EP[m](USB_EVT_OUT);
00736             }
00737           } else {                          /* IN Endpoint */
00738             if (USB_P_EP[m]) {
00739               USB_P_EP[m](USB_EVT_IN);
00740             }
00741           }
00742         }
00743       }
00744     }
00745   }
00746
00747 #if USB_DMA
00748
00749   if (LPC_USB->USBDMAIntSt & 0x00000001) {          /* End of Transfer Interrupt */
00750     val = LPC_USB->USBEoTIntSt;
00751     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00752       if (val & (1 << n)) {
00753         m = n >> 1;
00754         if ((n & 1) == 0) {                 /* OUT Endpoint */
00755           if (USB_P_EP[m]) {
00756             USB_P_EP[m](USB_EVT_OUT_DMA_EOT);
00757           }
00758         } else {                            /* IN Endpoint */
00759           if (USB_P_EP[m]) {
00760             USB_P_EP[m](USB_EVT_IN_DMA_EOT);
00761           }
00762         }
00763       }
00764     }
00765     LPC_USB->USBEoTIntClr = val;
00766   }
00767
00768   if (LPC_USB->USBDMAIntSt & 0x00000002) {          /* New DD Request Interrupt */
00769     val = LPC_USB->USBNDDRIntSt;
00770     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00771       if (val & (1 << n)) {
00772         m = n >> 1;
00773         if ((n & 1) == 0) {                 /* OUT Endpoint */
00774           if (USB_P_EP[m]) {
00775             USB_P_EP[m](USB_EVT_OUT_DMA_NDR);
00776           }
00777         } else {                            /* IN Endpoint */
00778           if (USB_P_EP[m]) {
00779             USB_P_EP[m](USB_EVT_IN_DMA_NDR);
00780           }
00781         }
00782       }
00783     }
00784     LPC_USB->USBNDDRIntClr = val;
00785   }
00786
00787   if (LPC_USB->USBDMAIntSt & 0x00000004) {          /* System Error Interrupt */
00788     val = LPC_USB->USBSysErrIntSt;
00789     for (n = 2; n < USB_EP_NUM; n++) {      /* Check All Endpoints */
00790       if (val & (1 << n)) {
00791         m = n >> 1;
00792         if ((n & 1) == 0) {                 /* OUT Endpoint */
00793           if (USB_P_EP[m]) {
00794             USB_P_EP[m](USB_EVT_OUT_DMA_ERR);
00795           }
00796         } else {                            /* IN Endpoint */
00797           if (USB_P_EP[m]) {
00798             USB_P_EP[m](USB_EVT_IN_DMA_ERR);
00799           }
00800         }
00801       }
00802     }
00803     LPC_USB->USBSysErrIntClr = val;
00804   }
00805
00806 #endif /* USB_DMA */
00807
00808 isr_end:
00809   return;
00810 }
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbhw.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBHW.H
00005  *      Purpose: USB Hardware Layer Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBHW_H__
00020 #define __USBHW_H__
00021
00022
00023 /* USB RAM Definitions */
00024 #define USB_RAM_ADR     0x20080000  /* USB RAM Start Address */
00025 #define USB_RAM_SZ      0x00004000  /* USB RAM Size (4kB) */
00026
00027 /* DMA Endpoint Descriptors */
00028 #define DD_NISO_CNT             16  /* Non-Iso EP DMA Descr. Count (max. 32) */
00029 #define DD_ISO_CNT               8  /* Iso EP DMA Descriptor Count (max. 32) */
00030 #define DD_NISO_SZ    (DD_NISO_CNT * 16)    /* Non-Iso DMA Descr. Size */
00031 #define DD_ISO_SZ     (DD_ISO_CNT  * 20)    /* Iso DMA Descriptor Size */
00032 #define DD_NISO_ADR   (USB_RAM_ADR + 128)   /* Non-Iso DMA Descr. Address */
00033 #define DD_ISO_ADR    (DD_NISO_ADR + DD_NISO_SZ) /* Iso DMA Descr. Address */
00034 #define DD_SZ                 (128 + DD_NISO_SZ + DD_ISO_SZ) /* Descr. Size */
00035
00036 /* DMA Buffer Memory Definitions */
00037 #define DMA_BUF_ADR   (USB_RAM_ADR + DD_SZ) /* DMA Buffer Start Address */
00038 #define DMA_BUF_SZ    (USB_RAM_SZ  - DD_SZ) /* DMA Buffer Size */
00039
00040 /* USB Error Codes */
00041 #define USB_ERR_PID         0x0001  /* PID Error */
00042 #define USB_ERR_UEPKT       0x0002  /* Unexpected Packet */
00043 #define USB_ERR_DCRC        0x0004  /* Data CRC Error */
00044 #define USB_ERR_TIMOUT      0x0008  /* Bus Time-out Error */
00045 #define USB_ERR_EOP         0x0010  /* End of Packet Error */
00046 #define USB_ERR_B_OVRN      0x0020  /* Buffer Overrun */
00047 #define USB_ERR_BTSTF       0x0040  /* Bit Stuff Error */
00048 #define USB_ERR_TGL         0x0080  /* Toggle Bit Error */
00049
00050 /* USB DMA Status Codes */
00051 #define USB_DMA_INVALID     0x0000  /* DMA Invalid - Not Configured */
00052 #define USB_DMA_IDLE        0x0001  /* DMA Idle - Waiting for Trigger */
00053 #define USB_DMA_BUSY        0x0002  /* DMA Busy - Transfer in progress */
00054 #define USB_DMA_DONE        0x0003  /* DMA Transfer Done (no Errors)*/
00055 #define USB_DMA_OVER_RUN    0x0004  /* Data Over Run */
00056 #define USB_DMA_UNDER_RUN   0x0005  /* Data Under Run (Short Packet) */
00057 #define USB_DMA_ERROR       0x0006  /* Error */
00058 #define USB_DMA_UNKNOWN     0xFFFF  /* Unknown State */
00059
00060 /* USB DMA Descriptor */
00061 typedef struct _USB_DMA_DESCRIPTOR {
00062   uint32_t BufAdr;                     /* DMA Buffer Address */
00063   uint16_t  BufLen;                     /* DMA Buffer Length */
00064   uint16_t  MaxSize;                    /* Maximum Packet Size */
00065   uint32_t InfoAdr;                    /* Packet Info Memory Address */
00066   union {                           /* DMA Configuration */
00067     struct {
00068       uint32_t Link   : 1;             /* Link to existing Descriptors */
00069       uint32_t IsoEP  : 1;             /* Isonchronous Endpoint */
00070       uint32_t ATLE   : 1;             /* ATLE (Auto Transfer Length Extract) */
00071       uint32_t Rsrvd  : 5;             /* Reserved */
00072       uint32_t LenPos : 8;             /* Length Position (ATLE) */
00073     } Type;
00074     uint32_t Val;
00075   } Cfg;
00076 } USB_DMA_DESCRIPTOR;
00077
00078 /* USB Hardware Functions */
00079 extern void  USB_Init       (void);
00080 extern void  USB_Connect    (uint32_t  con);
00081 extern void  USB_Reset      (void);
00082 extern void  USB_Suspend    (void);
00083 extern void  USB_Resume     (void);
00084 extern void  USB_WakeUp     (void);
00085 extern void  USB_WakeUpCfg  (uint32_t  cfg);
00086 extern void  USB_SetAddress (uint32_t adr);
00087 extern void  USB_Configure  (uint32_t  cfg);
00088 extern void  USB_ConfigEP   (USB_ENDPOINT_DESCRIPTOR *pEPD);
00089 extern void  USB_DirCtrlEP  (uint32_t dir);
00090 extern void  USB_EnableEP   (uint32_t EPNum);
00091 extern void  USB_DisableEP  (uint32_t EPNum);
00092 extern void  USB_ResetEP    (uint32_t EPNum);
00093 extern void  USB_SetStallEP (uint32_t EPNum);
00094 extern void  USB_ClrStallEP (uint32_t EPNum);
00095 extern uint32_t USB_ReadEP     (uint32_t EPNum, uint8_t *pData);
00096 extern uint32_t USB_WriteEP    (uint32_t EPNum, uint8_t *pData, uint32_t cnt);
00097 extern uint32_t  USB_DMA_Setup  (uint32_t EPNum, USB_DMA_DESCRIPTOR *pDD);
00098 extern void  USB_DMA_Enable (uint32_t EPNum);
00099 extern void  USB_DMA_Disable(uint32_t EPNum);
00100 extern uint32_t USB_DMA_Status (uint32_t EPNum);
00101 extern uint32_t USB_DMA_BufAdr (uint32_t EPNum);
00102 extern uint32_t USB_DMA_BufCnt (uint32_t EPNum);
00103 extern uint32_t USB_GetFrame   (void);
00104 extern void  USB_IRQHandler (void);
00105
00106
00107 #endif  /* __USBHW_H__ */
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbreg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbreg.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBREG.H
00005  *      Purpose: USB Hardware Layer Definitions for NXP Semiconductors LPC
00006  *      family MCUs
00007  *      Version: V1.10
00008  *----------------------------------------------------------------------------
00009  *      This software is supplied "AS IS" without any warranties, express,
00010  *      implied or statutory, including but not limited to the implied
00011  *      warranties of fitness for purpose, satisfactory quality and
00012  *      noninfringement. Keil extends you a royalty-free right to reproduce
00013  *      and distribute executable files created using this software for use
00014  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00015  *      else gives you the right to use this software.
00016  *
00017  *      Copyright (c) 2005-2009 Keil Software.
00018  *---------------------------------------------------------------------------*/
00019
00020 #ifndef __USBREG_H
00021 #define __USBREG_H
00022
00023 /* Device Interrupt Bit Definitions */
00024 #define FRAME_INT           0x00000001
00025 #define EP_FAST_INT         0x00000002
00026 #define EP_SLOW_INT         0x00000004
00027 #define DEV_STAT_INT        0x00000008
00028 #define CCEMTY_INT          0x00000010
00029 #define CDFULL_INT          0x00000020
00030 #define RxENDPKT_INT        0x00000040
00031 #define TxENDPKT_INT        0x00000080
00032 #define EP_RLZED_INT        0x00000100
00033 #define ERR_INT             0x00000200
00034
00035 /* Rx & Tx Packet Length Definitions */
00036 #define PKT_LNGTH_MASK      0x000003FF
00037 #define PKT_DV              0x00000400
00038 #define PKT_RDY             0x00000800
00039
00040 /* USB Control Definitions */
00041 #define CTRL_RD_EN          0x00000001
00042 #define CTRL_WR_EN          0x00000002
00043
00044 /* Command Codes */
00045 #define CMD_SET_ADDR        0x00D00500
00046 #define CMD_CFG_DEV         0x00D80500
00047 #define CMD_SET_MODE        0x00F30500
00048 #define CMD_RD_FRAME        0x00F50500
00049 #define DAT_RD_FRAME        0x00F50200
00050 #define CMD_RD_TEST         0x00FD0500
00051 #define DAT_RD_TEST         0x00FD0200
00052 #define CMD_SET_DEV_STAT    0x00FE0500
00053 #define CMD_GET_DEV_STAT    0x00FE0500
00054 #define DAT_GET_DEV_STAT    0x00FE0200
00055 #define CMD_GET_ERR_CODE    0x00FF0500
00056 #define DAT_GET_ERR_CODE    0x00FF0200
00057 #define CMD_RD_ERR_STAT     0x00FB0500
00058 #define DAT_RD_ERR_STAT     0x00FB0200
00059 #define DAT_WR_BYTE(x)     (0x00000100 | ((x) << 16))
00060 #define CMD_SEL_EP(x)      (0x00000500 | ((x) << 16))
00061 #define DAT_SEL_EP(x)      (0x00000200 | ((x) << 16))
00062 #define CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16))
00063 #define DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16))
00064 #define CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16))
00065 #define CMD_CLR_BUF         0x00F20500
00066 #define DAT_CLR_BUF         0x00F20200
00067 #define CMD_VALID_BUF       0x00FA0500
00068
00069 /* Device Address Register Definitions */
00070 #define DEV_ADDR_MASK       0x7F
00071 #define DEV_EN              0x80
00072
00073 /* Device Configure Register Definitions */
00074 #define CONF_DVICE          0x01
00075
00076 /* Device Mode Register Definitions */
00077 #define AP_CLK              0x01
00078 #define INAK_CI             0x02
00079 #define INAK_CO             0x04
00080 #define INAK_II             0x08
00081 #define INAK_IO             0x10
00082 #define INAK_BI             0x20
00083 #define INAK_BO             0x40
00084
00085 /* Device Status Register Definitions */
00086 #define DEV_CON             0x01
00087 #define DEV_CON_CH          0x02
00088 #define DEV_SUS             0x04
00089 #define DEV_SUS_CH          0x08
00090 #define DEV_RST             0x10
00091
00092 /* Error Code Register Definitions */
00093 #define ERR_EC_MASK         0x0F
00094 #define ERR_EA              0x10
00095
00096 /* Error Status Register Definitions */
00097 #define ERR_PID             0x01
00098 #define ERR_UEPKT           0x02
00099 #define ERR_DCRC            0x04
00100 #define ERR_TIMOUT          0x08
00101 #define ERR_EOP             0x10
00102 #define ERR_B_OVRN          0x20
00103 #define ERR_BTSTF           0x40
00104 #define ERR_TGL             0x80
00105
00106 /* Endpoint Select Register Definitions */
00107 #define EP_SEL_F            0x01
00108 #define EP_SEL_ST           0x02
00109 #define EP_SEL_STP          0x04
00110 #define EP_SEL_PO           0x08
00111 #define EP_SEL_EPN          0x10
00112 #define EP_SEL_B_1_FULL     0x20
00113 #define EP_SEL_B_2_FULL     0x40
00114
00115 /* Endpoint Status Register Definitions */
00116 #define EP_STAT_ST          0x01
00117 #define EP_STAT_DA          0x20
00118 #define EP_STAT_RF_MO       0x40
00119 #define EP_STAT_CND_ST      0x80
00120
00121 /* Clear Buffer Register Definitions */
00122 #define CLR_BUF_PO          0x01
00123
00124
00125 /* DMA Interrupt Bit Definitions */
00126 #define EOT_INT             0x01
00127 #define NDD_REQ_INT         0x02
00128 #define SYS_ERR_INT         0x04
00129
00130
00131 #endif  /* __USBREG_H */
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbuser.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbuser.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBUSER.C
00005  *      Purpose: USB Custom User Module
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include "LPC17xx.h"
00020 #include "lpc_types.h"
00021
00022 #include "usb.h"
00023 #include "usbcfg.h"
00024 #include "usbhw.h"
00025 #include "usbcore.h"
00026 #include "usbuser.h"
00027 #include "mscuser.h"
00028
00029 #include "memory.h"
00030
00031
00032 /*
00033  *  USB Power Event Callback
00034  *   Called automatically on USB Power Event
00035  *    Parameter:       power: On(TRUE)/Off(FALSE)
00036  */
00037
00038 #if USB_POWER_EVENT
00039 void USB_Power_Event (uint32_t  power) {
00040 }
00041 #endif
00042
00043
00044 /*
00045  *  USB Reset Event Callback
00046  *   Called automatically on USB Reset Event
00047  */
00048
00049 #if USB_RESET_EVENT
00050 void USB_Reset_Event (void) {
00051   USB_ResetCore();
00052 }
00053 #endif
00054
00055
00056 /*
00057  *  USB Suspend Event Callback
00058  *   Called automatically on USB Suspend Event
00059  */
00060
00061 #if USB_SUSPEND_EVENT
00062 void USB_Suspend_Event (void) {
00063 }
00064 #endif
00065
00066
00067 /*
00068  *  USB Resume Event Callback
00069  *   Called automatically on USB Resume Event
00070  */
00071
00072 #if USB_RESUME_EVENT
00073 void USB_Resume_Event (void) {
00074 }
00075 #endif
00076
00077
00078 /*
00079  *  USB Remote Wakeup Event Callback
00080  *   Called automatically on USB Remote Wakeup Event
00081  */
00082
00083 #if USB_WAKEUP_EVENT
00084 void USB_WakeUp_Event (void) {
00085 }
00086 #endif
00087
00088
00089 /*
00090  *  USB Start of Frame Event Callback
00091  *   Called automatically on USB Start of Frame Event
00092  */
00093
00094 #if USB_SOF_EVENT
00095 void USB_SOF_Event (void) {
00096 }
00097 #endif
00098
00099
00100 /*
00101  *  USB Error Event Callback
00102  *   Called automatically on USB Error Event
00103  *    Parameter:       error: Error Code
00104  */
00105
00106 #if USB_ERROR_EVENT
00107 void USB_Error_Event (uint32_t error) {
00108 }
00109 #endif
00110
00111
00112 /*
00113  *  USB Set Configuration Event Callback
00114  *   Called automatically on USB Set Configuration Request
00115  */
00116
00117 #if USB_CONFIGURE_EVENT
00118 void USB_Configure_Event (void) {
00119
00120   if (USB_Configuration) {                  /* Check if USB is configured */
00121     /* add your code here */
00122   }
00123 }
00124 #endif
00125
00126
00127 /*
00128  *  USB Set Interface Event Callback
00129  *   Called automatically on USB Set Interface Request
00130  */
00131
00132 #if USB_INTERFACE_EVENT
00133 void USB_Interface_Event (void) {
00134 }
00135 #endif
00136
00137
00138 /*
00139  *  USB Set/Clear Feature Event Callback
00140  *   Called automatically on USB Set/Clear Feature Request
00141  */
00142
00143 #if USB_FEATURE_EVENT
00144 void USB_Feature_Event (void) {
00145 }
00146 #endif
00147
00148
00149 #define P_EP(n) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)
00150
00151 /* USB Endpoint Events Callback Pointers */
00152 void (* const USB_P_EP[16]) (uint32_t event) = {
00153   P_EP(0),
00154   P_EP(1),
00155   P_EP(2),
00156   P_EP(3),
00157   P_EP(4),
00158   P_EP(5),
00159   P_EP(6),
00160   P_EP(7),
00161   P_EP(8),
00162   P_EP(9),
00163   P_EP(10),
00164   P_EP(11),
00165   P_EP(12),
00166   P_EP(13),
00167   P_EP(14),
00168   P_EP(15),
00169 };
00170
00171
00172 /*
00173  *  USB Endpoint 1 Event Callback
00174  *   Called automatically on USB Endpoint 1 Event
00175  *    Parameter:       event
00176  */
00177
00178 void USB_EndPoint1 (uint32_t event) {
00179 }
00180
00181
00182 /*
00183  *  USB Endpoint 2 Event Callback
00184  *   Called automatically on USB Endpoint 2 Event
00185  *    Parameter:       event
00186  */
00187
00188 void USB_EndPoint2 (uint32_t event) {
00189
00190   switch (event) {
00191     case USB_EVT_OUT:
00192       MSC_BulkOut();
00193       break;
00194     case USB_EVT_IN:
00195       MSC_BulkIn();
00196       break;
00197   }
00198 }
00199
00200
00201 /*
00202  *  USB Endpoint 3 Event Callback
00203  *   Called automatically on USB Endpoint 3 Event
00204  *    Parameter:       event
00205  */
00206
00207 void USB_EndPoint3 (uint32_t event) {
00208 }
00209
00210
00211 /*
00212  *  USB Endpoint 4 Event Callback
00213  *   Called automatically on USB Endpoint 4 Event
00214  *    Parameter:       event
00215  */
00216
00217 void USB_EndPoint4 (uint32_t event) {
00218 }
00219
00220
00221 /*
00222  *  USB Endpoint 5 Event Callback
00223  *   Called automatically on USB Endpoint 5 Event
00224  *    Parameter:       event
00225  */
00226
00227 void USB_EndPoint5 (uint32_t event) {
00228 }
00229
00230
00231 /*
00232  *  USB Endpoint 6 Event Callback
00233  *   Called automatically on USB Endpoint 6 Event
00234  *    Parameter:       event
00235  */
00236
00237 void USB_EndPoint6 (uint32_t event) {
00238 }
00239
00240
00241 /*
00242  *  USB Endpoint 7 Event Callback
00243  *   Called automatically on USB Endpoint 7 Event
00244  *    Parameter:       event
00245  */
00246
00247 void USB_EndPoint7 (uint32_t event) {
00248 }
00249
00250
00251 /*
00252  *  USB Endpoint 8 Event Callback
00253  *   Called automatically on USB Endpoint 8 Event
00254  *    Parameter:       event
00255  */
00256
00257 void USB_EndPoint8 (uint32_t event) {
00258 }
00259
00260
00261 /*
00262  *  USB Endpoint 9 Event Callback
00263  *   Called automatically on USB Endpoint 9 Event
00264  *    Parameter:       event
00265  */
00266
00267 void USB_EndPoint9 (uint32_t event) {
00268 }
00269
00270
00271 /*
00272  *  USB Endpoint 10 Event Callback
00273  *   Called automatically on USB Endpoint 10 Event
00274  *    Parameter:       event
00275  */
00276
00277 void USB_EndPoint10 (uint32_t event) {
00278 }
00279
00280
00281 /*
00282  *  USB Endpoint 11 Event Callback
00283  *   Called automatically on USB Endpoint 11 Event
00284  *    Parameter:       event
00285  */
00286
00287 void USB_EndPoint11 (uint32_t event) {
00288 }
00289
00290
00291 /*
00292  *  USB Endpoint 12 Event Callback
00293  *   Called automatically on USB Endpoint 12 Event
00294  *    Parameter:       event
00295  */
00296
00297 void USB_EndPoint12 (uint32_t event) {
00298 }
00299
00300
00301 /*
00302  *  USB Endpoint 13 Event Callback
00303  *   Called automatically on USB Endpoint 13 Event
00304  *    Parameter:       event
00305  */
00306
00307 void USB_EndPoint13 (uint32_t event) {
00308 }
00309
00310
00311 /*
00312  *  USB Endpoint 14 Event Callback
00313  *   Called automatically on USB Endpoint 14 Event
00314  *    Parameter:       event
00315  */
00316
00317 void USB_EndPoint14 (uint32_t event) {
00318 }
00319
00320
00321 /*
00322  *  USB Endpoint 15 Event Callback
00323  *   Called automatically on USB Endpoint 15 Event
00324  *    Parameter:       event
00325  */
00326
00327 void USB_EndPoint15 (uint32_t event) {
00328 }
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbuser.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/usbuser.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    USBUSER.H
00005  *      Purpose: USB Custom User Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __USBUSER_H__
00020 #define __USBUSER_H__
00021
00022
00023 /* USB Device Events Callback Functions */
00024 extern void USB_Power_Event     (uint32_t  power);
00025 extern void USB_Reset_Event     (void);
00026 extern void USB_Suspend_Event   (void);
00027 extern void USB_Resume_Event    (void);
00028 extern void USB_WakeUp_Event    (void);
00029 extern void USB_SOF_Event       (void);
00030 extern void USB_Error_Event     (uint32_t error);
00031
00032 /* USB Endpoint Callback Events */
00033 #define USB_EVT_SETUP       1   /* Setup Packet */
00034 #define USB_EVT_OUT         2   /* OUT Packet */
00035 #define USB_EVT_IN          3   /*  IN Packet */
00036 #define USB_EVT_OUT_NAK     4   /* OUT Packet - Not Acknowledged */
00037 #define USB_EVT_IN_NAK      5   /*  IN Packet - Not Acknowledged */
00038 #define USB_EVT_OUT_STALL   6   /* OUT Packet - Stalled */
00039 #define USB_EVT_IN_STALL    7   /*  IN Packet - Stalled */
00040 #define USB_EVT_OUT_DMA_EOT 8   /* DMA OUT EP - End of Transfer */
00041 #define USB_EVT_IN_DMA_EOT  9   /* DMA  IN EP - End of Transfer */
00042 #define USB_EVT_OUT_DMA_NDR 10  /* DMA OUT EP - New Descriptor Request */
00043 #define USB_EVT_IN_DMA_NDR  11  /* DMA  IN EP - New Descriptor Request */
00044 #define USB_EVT_OUT_DMA_ERR 12  /* DMA OUT EP - Error */
00045 #define USB_EVT_IN_DMA_ERR  13  /* DMA  IN EP - Error */
00046
00047 /* USB Endpoint Events Callback Pointers */
00048 extern void (* const USB_P_EP[16])(uint32_t event);
00049
00050 /* USB Endpoint Events Callback Functions */
00051 extern void USB_EndPoint0  (uint32_t event);
00052 extern void USB_EndPoint1  (uint32_t event);
00053 extern void USB_EndPoint2  (uint32_t event);
00054 extern void USB_EndPoint3  (uint32_t event);
00055 extern void USB_EndPoint4  (uint32_t event);
00056 extern void USB_EndPoint5  (uint32_t event);
00057 extern void USB_EndPoint6  (uint32_t event);
00058 extern void USB_EndPoint7  (uint32_t event);
00059 extern void USB_EndPoint8  (uint32_t event);
00060 extern void USB_EndPoint9  (uint32_t event);
00061 extern void USB_EndPoint10 (uint32_t event);
00062 extern void USB_EndPoint11 (uint32_t event);
00063 extern void USB_EndPoint12 (uint32_t event);
00064 extern void USB_EndPoint13 (uint32_t event);
00065 extern void USB_EndPoint14 (uint32_t event);
00066 extern void USB_EndPoint15 (uint32_t event);
00067
00068 /* USB Core Events Callback Functions */
00069 extern void USB_Configure_Event (void);
00070 extern void USB_Interface_Event (void);
00071 extern void USB_Feature_Event   (void);
00072
00073
00074 #endif  /* __USBUSER_H__ */
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/WDT/INTERRUPT/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/WDT/INTERRUPT/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 #define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123
00124 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00125
00126 #ifdef  DEBUG
00127 /*******************************************************************************
00128 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00129 *                               It is used only if the library is compiled in DEBUG mode.
00130 * @param[in]    expr - If expr is false, it calls check_failed() function
00131 *                       which reports the name of the source file and the source
00132 *                       line number of the call that failed.
00133 *                    - If expr is true, it returns no value.
00134 * @return               None
00135 *******************************************************************************/
00136 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00137 #else
00138 #define CHECK_PARAM(expr)
00139 #endif /* DEBUG */
00140
00141
00142
00143 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00144
00145 #ifdef  DEBUG
00146 void check_failed(uint8_t *file, uint32_t line);
00147 #endif
00148
00149
00150 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/WDT/RESET/lpc17xx_libcfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/WDT/RESET/lpc17xx_libcfg.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg.h                        2010-05-21
00003 */
00026 #ifndef LPC17XX_LIBCFG_H_
00027 #define LPC17XX_LIBCFG_H_
00028
00029 #include "lpc_types.h"
00030
00031
00032 /************************** DEBUG MODE DEFINITIONS *********************************/
00033 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00034    the "CHECK_PARAM" macro in the FW library code */
00035
00036 #define DEBUG
00037
00038
00039 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00040
00041 /* Comment the line below to disable the specific peripheral inclusion */
00042
00043 /* DEBUG_FRAMWORK ------------------------------ */
00044 #define _DBGFWK
00045
00046 /* GPIO ------------------------------- */
00047 #define _GPIO
00048
00049 /* EXTI ------------------------------- */
00050 //#define _EXTI
00051
00052 /* UART ------------------------------- */
00053 #define _UART
00054 #define _UART0
00055 //#define _UART1
00056 //#define _UART2
00057 //#define _UART3
00058
00059 /* SPI ------------------------------- */
00060 //#define _SPI
00061
00062 /* SSP ------------------------------- */
00063 //#define _SSP
00064 //#define _SSP0
00065 //#define _SSP1
00066
00067 /* SYSTICK --------------------------- */
00068 //#define _SYSTICK
00069
00070 /* I2C ------------------------------- */
00071 //#define _I2C
00072 //#define _I2C0
00073 //#define _I2C1
00074 //#define _I2C2
00075
00076 /* TIMER ------------------------------- */
00077 //#define _TIM
00078
00079 /* WDT ------------------------------- */
00080 #define _WDT
00081
00082
00083 /* GPDMA ------------------------------- */
00084 //#define _GPDMA
00085
00086
00087 /* DAC ------------------------------- */
00088 //#define _DAC
00089
00090 /* DAC ------------------------------- */
00091 //#define _ADC
00092
00093
00094 /* PWM ------------------------------- */
00095 //#define _PWM
00096 //#define _PWM1
00097
00098 /* RTC ------------------------------- */
00099 //#define _RTC
00100
00101 /* I2S ------------------------------- */
00102 //#define _I2S
00103
00104 /* USB device ------------------------------- */
00105 //#define _USBDEV
00106 //#define _USB_DMA
00107
00108 /* QEI ------------------------------- */
00109 //#define _QEI
00110
00111 /* MCPWM ------------------------------- */
00112 //#define _MCPWM
00113
00114 /* CAN--------------------------------*/
00115 //#define _CAN
00116
00117 /* RIT ------------------------------- */
00118 //#define _RIT
00119
00120 /* EMAC ------------------------------ */
00121 //#define _EMAC
00122
00123 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00124
00125 #ifdef  DEBUG
00126 /*******************************************************************************
00127 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00128 *                               It is used only if the library is compiled in DEBUG mode.
00129 * @param[in]    expr - If expr is false, it calls check_failed() function
00130 *                       which reports the name of the source file and the source
00131 *                       line number of the call that failed.
00132 *                    - If expr is true, it returns no value.
00133 * @return               None
00134 *******************************************************************************/
00135 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00136 #else
00137 #define CHECK_PARAM(expr)
00138 #endif /* DEBUG */
00139
00140
00141
00142 /************************** GLOBAL/PUBLIC FUNCTION DECLARATION *********************************/
00143
00144 #ifdef  DEBUG
00145 void check_failed(uint8_t *file, uint32_t line);
00146 #endif
00147
00148
00149 #endif /* LPC17XX_LIBCFG_H_ */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Burst/adc_burst_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Burst/adc_burst_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          adc_interrupt_test.c                    2010-07-16
00003 */
00026 #include "lpc17xx_adc.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_gpio.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINITIONS ***********************/
00039 #define MCB_LPC_1768
00040 //#define IAR_LPC_1768
00041 #define MCB_LPC17XX_ADC_INJECT_TEST
00042
00043 #ifdef MCB_LPC_1768
00044 #define MCB_LPC_1768_ADC_BURST_MULTI
00045 #endif
00046
00047 #ifdef MCB_LPC_1768
00048 #define _ADC_INT                        ADC_ADINTEN2
00049 #define _ADC_CHANNEL            ADC_CHANNEL_2
00050
00051 #ifdef MCB_LPC_1768_ADC_BURST_MULTI
00052 #define _ADC_INT_3                      ADC_ADINTEN3
00053 #define _ADC_CHANNEL_3          ADC_CHANNEL_3
00054 #endif
00055
00056 #elif defined(IAR_LPC_1768)
00057 #define _ADC_INT                        ADC_ADINTEN5
00058 #define _ADC_CHANNEL            ADC_CHANNEL_5
00059 #endif
00060
00062 #define DMA_SIZE                8
00063
00064 #ifdef MCB_LPC17XX_ADC_INJECT_TEST
00065 #define GPIO_INT        (1<<10)
00066 #define POLL_LED        (1<<4)          // P1.28
00067 #endif
00068 /************************** PRIVATE VARIABLES *************************/
00069 uint8_t menu1[] =
00070 "********************************************************************************\n\r"
00071 "Hello NXP Semiconductors \n\r"
00072 " ADC burst demo \n\r"
00073 "\t - MCU: LPC17xx \n\r"
00074 "\t - Core: ARM CORTEX-M3 \n\r"
00075 "\t - Communicate via: UART0 - 115200 bps \n\r"
00076 " Use ADC with 12-bit resolution rate of 200KHz, running burst mode (single or multiple input)\n\r"
00077 " Display ADC value via UART0\n\r"
00078 " Turn the potentiometer to see how ADC value changes\n\r"
00079 "********************************************************************************\n\r";
00080
00081 #ifdef MCB_LPC17XX_ADC_INJECT_TEST
00082 static BOOL_8 toggle=FALSE;
00083 #endif
00084 /************************** PRIVATE FUNCTION *************************/
00085 void print_menu(void);
00086
00087 #ifdef MCB_LPC17XX_ADC_INJECT_TEST
00088 void EINT3_IRQHandler(void);
00089 #endif
00090
00091 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00092 #ifdef MCB_LPC17XX_ADC_INJECT_TEST
00093 void EINT3_IRQHandler(void)
00094 {
00095           if (GPIO_GetIntStatus(1, 10, 1))
00096           {
00097                   GPIO_ClearInt(2,(1<<10));
00098                   if(toggle == TRUE) toggle = FALSE;
00099                   else
00100                         toggle = TRUE;
00101 #ifdef MCB_LPC_1768_ADC_BURST_MULTI
00102                   if(toggle)
00103                   {
00104                           ADC_ChannelCmd(LPC_ADC,_ADC_CHANNEL_3,ENABLE);
00105                           FIO_ByteSetValue(1, 3, POLL_LED);
00106                   }
00107                   else
00108                   {
00109                           ADC_ChannelCmd(LPC_ADC,_ADC_CHANNEL_3,DISABLE);
00110                           FIO_ByteClearValue(1, 3, POLL_LED);
00111                   }
00112 #endif
00113           }
00114 }
00115 #endif
00116 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00117 /*********************************************************************/
00122 void print_menu(void)
00123 {
00124         _DBG(menu1);
00125 }
00126
00127
00128 /*-------------------------MAIN FUNCTION------------------------------*/
00129 /*********************************************************************/
00134 int c_entry(void)
00135 {
00136         PINSEL_CFG_Type PinCfg;
00137 #ifdef MCB_LPC_1768_ADC_BURST_MULTI
00138         PINSEL_CFG_Type PinCfg1;
00139 #endif
00140         uint32_t tmp;
00141         uint32_t adc_value;
00142         /* Initialize debug via UART0
00143          * – 115200bps
00144          * – 8 data bit
00145          * – No parity
00146          * – 1 stop bit
00147          * – No flow control
00148          */
00149         debug_frmwrk_init();
00150
00151         // print welcome screen
00152         print_menu();
00153
00154         /* Because the potentiometer on different boards (MCB & IAR) connect
00155          * with different ADC channel, so we have to configure correct ADC channel
00156          * on each board respectively.
00157          * If you want to check other ADC channels, you have to wire this ADC pin directly
00158          * to potentiometer pin (please see schematic doc for more reference)
00159          */
00160 #ifdef MCB_LPC_1768
00161         /*
00162          * Init ADC pin connect
00163          * AD0.2 on P0.25
00164          */
00165         PinCfg.Funcnum = 1;
00166         PinCfg.OpenDrain = 0;
00167         PinCfg.Pinmode = 0;
00168         PinCfg.Pinnum = 25;
00169         PinCfg.Portnum = 0;
00170         PINSEL_ConfigPin(&PinCfg);
00171 #ifdef MCB_LPC_1768_ADC_BURST_MULTI
00172         /*
00173          * Init ADC pin connect
00174          * AD0.3 on P0.26
00175          */
00176         PinCfg1.Funcnum = 1;
00177         PinCfg1.OpenDrain = 0;
00178         PinCfg1.Pinmode = 0;
00179         PinCfg1.Pinnum = 26;
00180         PinCfg1.Portnum = 0;
00181         PINSEL_ConfigPin(&PinCfg1);
00182 #endif
00183 #elif defined (IAR_LPC_1768)
00184         /* select P1.31 as AD0.5 */
00185         PinCfg.Funcnum = 3;
00186         PinCfg.OpenDrain = 0;
00187         PinCfg.Pinmode = 0;
00188         PinCfg.Pinnum = 31;
00189         PinCfg.Portnum = 1;
00190         PINSEL_ConfigPin(&PinCfg);
00191 #endif
00192
00193
00194         /* Configuration for ADC:
00195          *  select: ADC channel 2 (if using MCB1700 board)
00196          *              ADC channel 5 (if using IAR-LPC1768 board)
00197          *  ADC conversion rate = 200KHz
00198          */
00199         ADC_Init(LPC_ADC, 200000);
00200         ADC_ChannelCmd(LPC_ADC,_ADC_CHANNEL,ENABLE);
00201 #ifdef MCB_LPC_1768_ADC_BURST_MULTI
00202         ADC_ChannelCmd(LPC_ADC,_ADC_CHANNEL_3,ENABLE);
00203 #endif
00204
00205 #ifdef MCB_LPC17XX_ADC_INJECT_TEST
00206         FIO_ByteSetDir(1, 3, POLL_LED, 1);
00207         FIO_ByteClearValue(1, 3, POLL_LED);
00208         // Enable GPIO interrupt P2.10
00209         GPIO_IntCmd(2,(1<<10),1);
00210         NVIC_EnableIRQ(EINT3_IRQn);
00211 #endif
00212
00213         //Start burst conversion
00214         ADC_BurstCmd(LPC_ADC,ENABLE);
00215         while(1)
00216         {
00217 #ifdef MCB_LPC_1768
00218                 adc_value =  ADC_ChannelGetData(LPC_ADC,ADC_CHANNEL_2);
00219                 _DBG("ADC value on channel 2: ");
00220 #elif defined (IAR_LPC_1768)
00221                 adc_value =  ADC_ChannelGetData(LPC_ADC,ADC_CHANNEL_5);
00222                 _DBG("ADC value on channel 5: ");
00223 #endif
00224                 _DBD32(adc_value);
00225                 _DBG_("");
00226 #ifdef MCB_LPC_1768_ADC_BURST_MULTI
00227                 adc_value =  ADC_ChannelGetData(LPC_ADC,ADC_CHANNEL_3);
00228                 _DBG("ADC value on channel 3: ");
00229                 _DBD32(adc_value);
00230                 _DBG_("");
00231 #endif
00232                 // Wait for a while
00233                 for(tmp = 0; tmp < 1500000; tmp++);
00234         }
00235 }
00236
00237 /* Support required entry point for other toolchain */
00238 int main (void)
00239 {
00240         return c_entry();
00241 }
00242 #ifdef  DEBUG
00243 /*******************************************************************************
00244 * @brief                Reports the name of the source file and the source line number
00245 *                               where the CHECK_PARAM error has occurred.
00246 * @param[in]    file Pointer to the source file name
00247 * @param[in]    line assert_param error line source number
00248 * @return               None
00249 *******************************************************************************/
00250 void check_failed(uint8_t *file, uint32_t line)
00251 {
00252         /* User can add his own implementation to report the file name and line number,
00253          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00254
00255         /* Infinite loop */
00256         while(1);
00257 }
00258 #endif
00259
00260 /*
00261  * @}
00262  */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/DMA/adc_dma_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/DMA/adc_dma_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          adc_dma_test.c                  2010-05-21
00003 */
00026 #include "lpc17xx_adc.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "lpc17xx_nvic.h"
00030 #include "lpc17xx_gpdma.h"
00031 #include "debug_frmwrk.h"
00032
00033 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINITIONS *************************/
00039 #define MCB_LPC_1768
00040 //#define IAR_LPC_1768
00041
00042 #ifdef MCB_LPC_1768
00043 #define _ADC_INT                ADC_ADINTEN2
00044 #define _ADC_CHANNEL    ADC_CHANNEL_2
00045 #elif defined(IAR_LPC_1768)
00046 #define _ADC_INT                ADC_ADINTEN5
00047 #define _ADC_CHANNEL    ADC_CHANNEL_5
00048 #endif
00049
00051 #define DMA_SIZE                1
00052
00053 /************************** PRIVATE VARIABLES *************************/
00054 uint8_t  menu1[] =
00055                 "********************************************************************************\n\r"
00056                 "Hello NXP Semiconductors \n\r"
00057                 " ADC demo \n\r"
00058                 "\t - MCU: LPC17xx \n\r"
00059                 "\t - Core: ARM CORTEX-M3 \n\r"
00060                 "\t - Communicate via: UART0 - 115200bps \n\r"
00061                 " DMA testing : ADC peripheral to memory\n\r"
00062                 " Use ADC with 12-bit resolution rate of 200KHz\n\r"
00063                 " Value ADC channel is displayed by UART, this value is taken from destination memory value of DMA function \n\r"
00064                 " Turn the potentiometer to see how ADC value changes\n\r"
00065                 "********************************************************************************\n\r";
00066 #ifdef MCB_LPC_1768
00067 uint8_t menu2[] = "ADC value on channel 2: ";
00068 #elif defined(IAR_LPC_1768)
00069 uint8_t menu2[] = "ADC value on channel 5: ";
00070 #endif
00071
00072 /* Terminal Counter flag for Channel 0 */
00073 __IO uint32_t Channel0_TC;
00074
00075 /* Error Counter flag for Channel 0 */
00076 __IO uint32_t Channel0_Err;
00077
00078 /************************** PRIVATE FUNCTION *************************/
00079 void DMA_IRQHandler (void);
00080
00081 void print_menu(void);
00082
00083 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00084 /*********************************************************************/
00089 void DMA_IRQHandler (void)
00090 {
00091         // check GPDMA interrupt on channel 0
00092         if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 0)){
00093                 // Check counter terminal status
00094                 if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 0)){
00095                         // Clear terminate counter Interrupt pending
00096                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 0);
00097                                 Channel0_TC++;
00098                 }
00099                 // Check error terminal status
00100                 if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, 0)){
00101                         // Clear error counter Interrupt pending
00102                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 0);
00103                         Channel0_Err++;
00104                 }
00105         }
00106 }
00107
00108 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00109 /*********************************************************************/
00114 void print_menu(void)
00115 {
00116         _DBG(menu1);
00117 }
00118
00119 /*-------------------------MAIN FUNCTION------------------------------*/
00120 /*********************************************************************/
00125 int c_entry(void)
00126 {
00127         PINSEL_CFG_Type PinCfg;
00128         GPDMA_Channel_CFG_Type GPDMACfg;
00129         uint32_t adc_value, tmp;
00130
00131         /* Initialize ADC ----------------------------------------------------*/
00132
00133         /* Because the potentiometer on different boards (MCB & IAR) connect
00134          * with different ADC channel, so we have to configure correct ADC channel
00135          * on each board respectively.
00136          * If you want to check other ADC channels, you have to wire this ADC pin directly
00137          * to potentiometer pin (please see schematic doc for more reference)
00138          */
00139 #ifdef MCB_LPC_1768
00140         /* If using MCB1700 v.1 board
00141          * select P0.25 as AD0.2
00142          */
00143         PinCfg.Funcnum = 1;
00144         PinCfg.OpenDrain = 0;
00145         PinCfg.Pinmode = 0;
00146         PinCfg.Pinnum = 25;
00147         PinCfg.Portnum = 0;
00148         PINSEL_ConfigPin(&PinCfg);
00149 #elif defined(IAR_LPC_1768)
00150         /* If using IAR LPC1768 KS v.A board:
00151          * select P1.31 as AD0.5
00152          */
00153         PinCfg.Funcnum = 3;
00154         PinCfg.OpenDrain = 0;
00155         PinCfg.Pinmode = 0;
00156         PinCfg.Pinnum = 31;
00157         PinCfg.Portnum = 1;
00158         PINSEL_ConfigPin(&PinCfg);
00159 #endif
00160
00161         /* Initialize debug via UART0
00162          * – 115200bps
00163          * – 8 data bit
00164          * – No parity
00165          * – 1 stop bit
00166          * – No flow control
00167          */
00168         debug_frmwrk_init();
00169
00170         // print welcome screen
00171         print_menu();
00172
00173         /*  Configuration for ADC :
00174          *  Select: ADC channel 2 (if using MCB1700 board)
00175          *          ADC channel 5 (if using IAR-LPC1768 board)
00176          *      ADC conversion rate = 200KHz
00177          */
00178         ADC_Init(LPC_ADC, 200000);
00179         ADC_IntConfig(LPC_ADC,_ADC_INT,ENABLE);
00180         ADC_ChannelCmd(LPC_ADC,_ADC_CHANNEL,ENABLE);
00181
00182         /* GPDMA block section -------------------------------------------- */
00183         /* Disable GPDMA interrupt */
00184         NVIC_DisableIRQ(DMA_IRQn);
00185         /* preemption = 1, sub-priority = 1 */
00186         NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
00187
00188         /* Initialize GPDMA controller */
00189         GPDMA_Init();
00190
00191         // Setup GPDMA channel --------------------------------
00192         // channel 0
00193         GPDMACfg.ChannelNum = 0;
00194         // Source memory - unused
00195         GPDMACfg.SrcMemAddr = 0;
00196         // Destination memory
00197         GPDMACfg.DstMemAddr = (uint32_t) &adc_value;
00198         // Transfer size
00199         GPDMACfg.TransferSize = DMA_SIZE;
00200         // Transfer width - unused
00201         GPDMACfg.TransferWidth = 0;
00202         // Transfer type
00203         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_P2M;
00204         // Source connection
00205         GPDMACfg.SrcConn = GPDMA_CONN_ADC;
00206         // Destination connection - unused
00207         GPDMACfg.DstConn = 0;
00208         // Linker List Item - unused
00209         GPDMACfg.DMALLI = 0;
00210         GPDMA_Setup(&GPDMACfg);
00211
00212         /* Reset terminal counter */
00213         Channel0_TC = 0;
00214         /* Reset Error counter */
00215         Channel0_Err = 0;
00216
00217         /* Enable GPDMA interrupt */
00218         NVIC_EnableIRQ(DMA_IRQn);
00219
00220         while (1) {
00221
00222                 // Enable GPDMA channel 0
00223                 GPDMA_ChannelCmd(0, ENABLE);
00224
00225                 ADC_StartCmd(LPC_ADC,ADC_START_NOW);
00226                 /* Wait for GPDMA processing complete */;
00227                 while ((Channel0_TC == 0) );
00228
00229                 // Disable GPDMA channel 0
00230                 GPDMA_ChannelCmd(0, DISABLE);
00231
00232                 //Display the result of conversion on the UART0
00233                 _DBG(menu2);
00234                 _DBD32(ADC_DR_RESULT(adc_value));
00235                 _DBG_("");
00236
00237                 // Wait for a while
00238                 for(tmp = 0; tmp < 1000000; tmp++);
00239
00240                 /* GPDMA Re-setup */
00241                 GPDMA_Setup(&GPDMACfg);
00242
00243                 /* Reset terminal counter */
00244                 Channel0_TC = 0;
00245                 /* Reset Error counter */
00246                 Channel0_Err = 0;
00247         }
00248 }
00249
00250 /* Support required entry point for other toolchain */
00251 int main (void)
00252 {
00253         return c_entry();
00254 }
00255
00256 #ifdef  DEBUG
00257 /*******************************************************************************
00258 * @brief                Reports the name of the source file and the source line number
00259 *                               where the CHECK_PARAM error has occurred.
00260 * @param[in]    file Pointer to the source file name
00261 * @param[in]    line assert_param error line source number
00262 * @return               None
00263 *******************************************************************************/
00264 void check_failed(uint8_t *file, uint32_t line)
00265 {
00266         /* User can add his own implementation to report the file name and line number,
00267          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00268
00269         /* Infinite loop */
00270         while(1);
00271 }
00272 #endif
00273
00274 /*
00275  * @}
00276  */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/HardwareTrigger/adc_hardware_trigger_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/HardwareTrigger/adc_hardware_trigger_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          adc_hardware_trigger_test.c                     2010-06-18
00003 */
00026 #include "lpc17xx_adc.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS ***********************/
00038 #define _ADC_INT                        ADC_ADINTEN2
00039 #define _ADC_CHANNEL            ADC_CHANNEL_2
00040
00041 /************************** PRIVATE VARIABLES *************************/
00042 uint8_t menu1[] =
00043 "********************************************************************************\n\r"
00044 "Hello NXP Semiconductors \n\r"
00045 " ADC demo \n\r"
00046 "\t - MCU: LPC17xx \n\r"
00047 "\t - Core: ARM CORTEX-M3 \n\r"
00048 "\t - Communicate via: UART0 - 115200 bps \n\r"
00049 " Use ADC with 12-bit resolution rate of 200KHz, read in hardware-triggred mode\n\r"
00050 " Press INT0 button to start ADC conversion, ADC interrupt when conversion completed\n\r"
00051 " ADC channel value is read back and displayed via UART0\n\r"
00052 " Turn the potentiometer to see how ADC value changes\n\r"
00053 "********************************************************************************\n\r";
00054
00055 uint32_t adc_value;
00056
00057 /************************** PRIVATE FUNCTION *************************/
00058 void ADC_IRQHandler(void);
00059
00060 void print_menu(void);
00061
00062 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00063 /*********************************************************************/
00068 void ADC_IRQHandler(void)
00069 {
00070         adc_value = 0;
00071         if (ADC_ChannelGetStatus(LPC_ADC,ADC_CHANNEL_2,ADC_DATA_DONE))
00072         {
00073                 adc_value =  ADC_ChannelGetData(LPC_ADC,ADC_CHANNEL_2);
00074                 NVIC_DisableIRQ(ADC_IRQn);
00075         }
00076 }
00077
00078 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00079 /*********************************************************************/
00084 void print_menu(void)
00085 {
00086         _DBG(menu1);
00087 }
00088
00089
00090 /*-------------------------MAIN FUNCTION------------------------------*/
00091 /*********************************************************************/
00096 int c_entry(void)
00097 {
00098         PINSEL_CFG_Type PinCfg;
00099
00100         /* Initialize debug via UART0
00101          * – 115200bps
00102          * – 8 data bit
00103          * – No parity
00104          * – 1 stop bit
00105          * – No flow control
00106          */
00107         debug_frmwrk_init();
00108
00109         // print welcome screen
00110         print_menu();
00111
00112         /*
00113          * Init ADC pin connect
00114          * AD0.2 on P0.25
00115          */
00116         PinCfg.Funcnum = 1;
00117         PinCfg.OpenDrain = 0;
00118         PinCfg.Pinmode = 0;
00119         PinCfg.Pinnum = 25;
00120         PinCfg.Portnum = 0;
00121         PINSEL_ConfigPin(&PinCfg);
00122
00123         /*
00124          * Init P2.10
00125          *
00126          */
00127         PinCfg.Funcnum = 1; //EINT0
00128         PinCfg.OpenDrain = 0;
00129         PinCfg.Pinmode = 0;
00130         PinCfg.Pinnum = 10;
00131         PinCfg.Portnum = 2;
00132         PINSEL_ConfigPin(&PinCfg);
00133
00134         /* Configuration for ADC:
00135          *  select: ADC channel 2 (if using MCB1700 board)
00136          *              ADC channel 5 (if using IAR-LPC1768 board)
00137          *  ADC conversion rate = 200KHz
00138          */
00139         ADC_Init(LPC_ADC, 200000);
00140         ADC_IntConfig(LPC_ADC,_ADC_INT,ENABLE);
00141         ADC_ChannelCmd(LPC_ADC,_ADC_CHANNEL,ENABLE);
00142         ADC_EdgeStartConfig(LPC_ADC,ADC_START_ON_FALLING);
00143
00144         /* preemption = 1, sub-priority = 1 */
00145         NVIC_SetPriority(ADC_IRQn, ((0x01<<3)|0x01));
00146
00147         while(1)
00148         {
00149                 adc_value = 0;
00150
00151                 // Start conversion on EINT0 falling edge
00152                 ADC_StartCmd(LPC_ADC,ADC_START_ON_EINT0);
00153
00154                 /* Enable ADC in NVIC */
00155                 NVIC_EnableIRQ(ADC_IRQn);
00156
00157                 _DBG("Press INT0 button to start ADC conversion on AD0.2...");_DBG_("");
00158                 while(adc_value==0);
00159
00160                 //Display the result of conversion on the UART0
00161                 _DBG("ADC value on channel 2: ");
00162
00163                 _DBD32(adc_value);
00164                 _DBG_("");
00165         }
00166 }
00167
00168 /* Support required entry point for other toolchain */
00169 int main (void)
00170 {
00171         return c_entry();
00172 }
00173 #ifdef  DEBUG
00174 /*******************************************************************************
00175 * @brief                Reports the name of the source file and the source line number
00176 *                               where the CHECK_PARAM error has occurred.
00177 * @param[in]    file Pointer to the source file name
00178 * @param[in]    line assert_param error line source number
00179 * @return               None
00180 *******************************************************************************/
00181 void check_failed(uint8_t *file, uint32_t line)
00182 {
00183         /* User can add his own implementation to report the file name and line number,
00184          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00185
00186         /* Infinite loop */
00187         while(1);
00188 }
00189 #endif
00190 /*
00191  * @}
00192  */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/INTERRUPT/adc_interrupt_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/INTERRUPT/adc_interrupt_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          adc_interrupt_test.c                    2010-05-21
00003 */
00026 #include "lpc17xx_adc.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS ***********************/
00038 #define MCB_LPC_1768
00039 //#define IAR_LPC_1768
00040
00041 #ifdef MCB_LPC_1768
00042 #define _ADC_INT                        ADC_ADINTEN2
00043 #define _ADC_CHANNEL            ADC_CHANNEL_2
00044 #elif defined(IAR_LPC_1768)
00045 #define _ADC_INT                        ADC_ADINTEN5
00046 #define _ADC_CHANNEL            ADC_CHANNEL_5
00047 #endif
00048
00049 /************************** PRIVATE VARIABLES *************************/
00050 uint8_t menu1[] =
00051 "********************************************************************************\n\r"
00052 "Hello NXP Semiconductors \n\r"
00053 " ADC demo \n\r"
00054 "\t - MCU: LPC17xx \n\r"
00055 "\t - Core: ARM CORTEX-M3 \n\r"
00056 "\t - Communicate via: UART0 - 115200 bps \n\r"
00057 " Use ADC with 12-bit resolution rate of 200KHz, read in interrupt mode\n\r"
00058 " To get ADC channel value and display via UART0\n\r"
00059 " Turn the potentiometer to see how ADC value changes\n\r"
00060 "********************************************************************************\n\r";
00061
00062 uint32_t adc_value;
00063
00064 /************************** PRIVATE FUNCTION *************************/
00065 void ADC_IRQHandler(void);
00066
00067 void print_menu(void);
00068
00069 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00070 /*********************************************************************/
00075 void ADC_IRQHandler(void)
00076 {
00077         adc_value = 0;
00078 #ifdef MCB_LPC_1768
00079         if (ADC_ChannelGetStatus(LPC_ADC,ADC_CHANNEL_2,ADC_DATA_DONE))
00080         {
00081                 adc_value =  ADC_ChannelGetData(LPC_ADC,ADC_CHANNEL_2);
00082                 NVIC_DisableIRQ(ADC_IRQn);
00083         }
00084 #elif defined(IAR_LPC_1768)
00085         if (ADC_ChannelGetStatus(LPC_ADC,ADC_CHANNEL_5,ADC_DATA_DONE))
00086         {
00087                 adc_value =  ADC_ChannelGetData(LPC_ADC,ADC_CHANNEL_5);
00088                 NVIC_DisableIRQ(ADC_IRQn);
00089         }
00090 #endif
00091 }
00092
00093 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00094 /*********************************************************************/
00099 void print_menu(void)
00100 {
00101         _DBG(menu1);
00102 }
00103
00104
00105 /*-------------------------MAIN FUNCTION------------------------------*/
00106 /*********************************************************************/
00111 int c_entry(void)
00112 {
00113         PINSEL_CFG_Type PinCfg;
00114         uint32_t tmp;
00115
00116         /* Initialize debug via UART0
00117          * – 115200bps
00118          * – 8 data bit
00119          * – No parity
00120          * – 1 stop bit
00121          * – No flow control
00122          */
00123         debug_frmwrk_init();
00124
00125         // print welcome screen
00126         print_menu();
00127
00128         /* Because the potentiometer on different boards (MCB & IAR) connect
00129          * with different ADC channel, so we have to configure correct ADC channel
00130          * on each board respectively.
00131          * If you want to check other ADC channels, you have to wire this ADC pin directly
00132          * to potentiometer pin (please see schematic doc for more reference)
00133          */
00134 #ifdef MCB_LPC_1768
00135         /*
00136          * Init ADC pin connect
00137          * AD0.2 on P0.25
00138          */
00139         PinCfg.Funcnum = 1;
00140         PinCfg.OpenDrain = 0;
00141         PinCfg.Pinmode = 0;
00142         PinCfg.Pinnum = 25;
00143         PinCfg.Portnum = 0;
00144         PINSEL_ConfigPin(&PinCfg);
00145 #elif defined (IAR_LPC_1768)
00146         /* select P1.31 as AD0.5 */
00147         PinCfg.Funcnum = 3;
00148         PinCfg.OpenDrain = 0;
00149         PinCfg.Pinmode = 0;
00150         PinCfg.Pinnum = 31;
00151         PinCfg.Portnum = 1;
00152         PINSEL_ConfigPin(&PinCfg);
00153 #endif
00154
00155
00156         /* Configuration for ADC:
00157          *  select: ADC channel 2 (if using MCB1700 board)
00158          *              ADC channel 5 (if using IAR-LPC1768 board)
00159          *  ADC conversion rate = 200KHz
00160          */
00161         ADC_Init(LPC_ADC, 200000);
00162         ADC_IntConfig(LPC_ADC,_ADC_INT,ENABLE);
00163         ADC_ChannelCmd(LPC_ADC,_ADC_CHANNEL,ENABLE);
00164
00165         /* preemption = 1, sub-priority = 1 */
00166         NVIC_SetPriority(ADC_IRQn, ((0x01<<3)|0x01));
00167
00168         while(1)
00169         {
00170                 // Start conversion
00171                 ADC_StartCmd(LPC_ADC,ADC_START_NOW);
00172
00173                 /* Enable ADC in NVIC */
00174                 NVIC_EnableIRQ(ADC_IRQn);
00175
00176                 //Display the result of conversion on the UART0
00177 #ifdef MCB_LPC_1768
00178                 _DBG("ADC value on channel 2: ");
00179 #elif defined (IAR_LPC_1768)
00180                 _DBG("ADC value on channel 5: ");
00181 #endif
00182                 _DBD32(adc_value);
00183                 _DBG_("");
00184                 for(tmp = 0; tmp < 1000000; tmp++);
00185         }
00186 }
00187
00188 /* Support required entry point for other toolchain */
00189 int main (void)
00190 {
00191         return c_entry();
00192 }
00193 #ifdef  DEBUG
00194 /*******************************************************************************
00195 * @brief                Reports the name of the source file and the source line number
00196 *                               where the CHECK_PARAM error has occurred.
00197 * @param[in]    file Pointer to the source file name
00198 * @param[in]    line assert_param error line source number
00199 * @return               None
00200 *******************************************************************************/
00201 void check_failed(uint8_t *file, uint32_t line)
00202 {
00203         /* User can add his own implementation to report the file name and line number,
00204          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00205
00206         /* Infinite loop */
00207         while(1);
00208 }
00209 #endif
00210
00211 /*
00212  * @}
00213  */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Polling/adc_polling_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/ADC/Polling/adc_polling_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          adc_polling_test.c                      2010-05-21
00003 */
00026 #include "lpc17xx_adc.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS ***********************/
00038 #define MCB_LPC_1768
00039 //#define IAR_LPC_1768
00040
00041 #ifdef MCB_LPC_1768
00042 #define _ADC_INT                        ADC_ADINTEN2
00043 #define _ADC_CHANNEL            ADC_CHANNEL_2
00044 #elif defined (IAR_LPC_1768)
00045 #define _ADC_INT                        ADC_ADINTEN5
00046 #define _ADC_CHANNEL            ADC_CHANNEL_5
00047 #endif
00048
00049 /************************** PRIVATE VARIABLES *************************/
00050 uint8_t menu1[] =
00051 "********************************************************************************\n\r"
00052 "Hello NXP Semiconductors \n\r"
00053 " ADC demo \n\r"
00054 "\t - MCU: LPC1768 \n\r"
00055 "\t - Core: ARM CORTEX-M3 \n\r"
00056 "\t - Communicate via: UART0 - 115200 bps \n\r"
00057 " Use ADC with 12-bit resolution rate of 200KHz, read in polling mode\n\r"
00058 " To get ADC value and display via UART0\n\r"
00059 " Turn the potentiometer to see how ADC value changes\n\r"
00060 "********************************************************************************\n\r";
00061
00062
00063 /************************** PRIVATE FUNCTION *************************/
00064 void print_menu(void);
00065
00066 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00067 /*********************************************************************/
00072 void print_menu(void)
00073 {
00074         _DBG(menu1);
00075 }
00076
00077
00078 /*-------------------------MAIN FUNCTION------------------------------*/
00079 /*********************************************************************/
00084 int c_entry(void)
00085 {
00086         PINSEL_CFG_Type PinCfg;
00087         uint32_t adc_value, tmp;
00088
00089         /* Initialize debug via UART0
00090          * – 115200bps
00091          * – 8 data bit
00092          * – No parity
00093          * – 1 stop bit
00094          * – No flow control
00095          */
00096         debug_frmwrk_init();
00097
00098         // print welcome screen
00099         print_menu();
00100
00101         /* Initialize ADC ----------------------------------------------------*/
00102
00103         /* Because the potentiometer on different boards (MCB & IAR) connect
00104          * with different ADC channel, so we have to configure correct ADC channel
00105          * on each board respectively.
00106          * If you want to check other ADC channels, you have to wire this ADC pin directly
00107          * to potentiometer pin (please see schematic doc for more reference)
00108          */
00109 #ifdef MCB_LPC_1768
00110         /*
00111          * Init ADC pin connect
00112          * AD0.2 on P0.25
00113          */
00114         PinCfg.Funcnum = 1;
00115         PinCfg.OpenDrain = 0;
00116         PinCfg.Pinmode = 0;
00117         PinCfg.Pinnum = 25;
00118         PinCfg.Portnum = 0;
00119         PINSEL_ConfigPin(&PinCfg);
00120 #elif defined (IAR_LPC_1768)
00121         /*
00122          * Init ADC pin connect
00123          * AD0.5 on P1.31
00124          */
00125         PinCfg.Funcnum = 3;
00126         PinCfg.OpenDrain = 0;
00127         PinCfg.Pinmode = 0;
00128         PinCfg.Pinnum = 31;
00129         PinCfg.Portnum = 1;
00130         PINSEL_ConfigPin(&PinCfg);
00131 #endif
00132
00133         /* Configuration for ADC :
00134          *  Select: ADC channel 2 (if using MCB1700 board)
00135          *              ADC channel 5 (if using IAR-LPC1768 board)
00136          *  ADC conversion rate = 200Khz
00137          */
00138         ADC_Init(LPC_ADC, 200000);
00139         ADC_IntConfig(LPC_ADC,_ADC_INT,DISABLE);
00140         ADC_ChannelCmd(LPC_ADC,_ADC_CHANNEL,ENABLE);
00141
00142         while(1)
00143         {
00144                 // Start conversion
00145                 ADC_StartCmd(LPC_ADC,ADC_START_NOW);
00146                 //Wait conversion complete
00147                 while (!(ADC_ChannelGetStatus(LPC_ADC,_ADC_CHANNEL,ADC_DATA_DONE)));
00148                 adc_value = ADC_ChannelGetData(LPC_ADC,_ADC_CHANNEL);
00149                 //Display the result of conversion on the UART0
00150 #ifdef MCB_LPC_1768
00151                 _DBG("ADC value on channel 2: ");
00152 #elif defined (IAR_LPC_1768)
00153                 _DBG("ADC value on channel 5: ");
00154 #endif
00155                 _DBD32(adc_value);
00156                 _DBG_("");
00157                 //delay
00158                 for(tmp = 0; tmp < 1000000; tmp++);
00159         }
00160 }
00161
00162 /* Support required entry point for other toolchain */
00163 int main (void)
00164 {
00165         return c_entry();
00166 }
00167 #ifdef  DEBUG
00168 /*******************************************************************************
00169 * @brief                Reports the name of the source file and the source line number
00170 *                               where the CHECK_PARAM error has occurred.
00171 * @param[in]    file Pointer to the source file name
00172 * @param[in]    line assert_param error line source number
00173 * @return               None
00174 *******************************************************************************/
00175 void check_failed(uint8_t *file, uint32_t line)
00176 {
00177         /* User can add his own implementation to report the file name and line number,
00178          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00179
00180         /* Infinite loop */
00181         while(1);
00182 }
00183 #endif
00184
00185 /*
00186  * @}
00187  */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/adcuser.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/adcuser.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    ADCUSER.C
00005  *      Purpose: Audio Device Class Custom User Module
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include "lpc_types.h"
00020
00021 #include "usb.h"
00022 #include "audio.h"
00023 #include "usbcfg.h"
00024 #include "usbcore.h"
00025 #include "adcuser.h"
00026
00027 #include "usbaudio.h"
00028
00029       uint16_t VolCur = 0x0100;     /* Volume Current Value */
00030 const uint16_t VolMin = 0x0000;     /* Volume Minimum Value */
00031 const uint16_t VolMax = 0x0100;     /* Volume Maximum Value */
00032 const uint16_t VolRes = 0x0004;     /* Volume Resolution */
00033
00034 /*
00035  *  Audio Device Class Interface Get Request Callback
00036  *   Called automatically on ADC Interface Get Request
00037  *    Parameters:      None (global SetupPacket and EP0Buf)
00038  *    Return Value:    TRUE - Success, FALSE - Error
00039  */
00040
00041 uint32_t ADC_IF_GetRequest (void) {
00042
00043 /*
00044   Interface = SetupPacket.wIndex.WB.L;
00045   EntityID  = SetupPacket.wIndex.WB.H;
00046   Request   = SetupPacket.bRequest;
00047   Value     = SetupPacket.wValue.W;
00048   ...
00049 */
00050
00051   if (SetupPacket.wIndex.W == 0x0200) {
00052     /* Feature Unit: Interface = 0, ID = 2 */
00053     if (SetupPacket.wValue.WB.L == 0) {
00054       /* Master Channel */
00055       switch (SetupPacket.wValue.WB.H) {
00056         case AUDIO_MUTE_CONTROL:
00057           switch (SetupPacket.bRequest) {
00058             case AUDIO_REQUEST_GET_CUR:
00059               EP0Buf[0] = Mute;
00060               return (TRUE);
00061           }
00062           break;
00063         case AUDIO_VOLUME_CONTROL:
00064           switch (SetupPacket.bRequest) {
00065             case AUDIO_REQUEST_GET_CUR:
00066               *((__packed uint16_t *)EP0Buf) = VolCur;
00067               return (TRUE);
00068             case AUDIO_REQUEST_GET_MIN:
00069               *((__packed uint16_t *)EP0Buf) = VolMin;
00070               return (TRUE);
00071             case AUDIO_REQUEST_GET_MAX:
00072               *((__packed uint16_t *)EP0Buf) = VolMax;
00073               return (TRUE);
00074             case AUDIO_REQUEST_GET_RES:
00075               *((__packed uint16_t *)EP0Buf) = VolRes;
00076               return (TRUE);
00077           }
00078           break;
00079       }
00080     }
00081   }
00082   return (FALSE);  /* Not Supported */
00083 }
00084
00085
00086 /*
00087  *  Audio Device Class Interface Set Request Callback
00088  *   Called automatically on ADC Interface Set Request
00089  *    Parameters:      None (global SetupPacket and EP0Buf)
00090  *    Return Value:    TRUE - Success, FALSE - Error
00091  */
00092
00093 uint32_t ADC_IF_SetRequest (void) {
00094
00095 /*
00096   Interface = SetupPacket.wIndex.WB.L;
00097   EntityID  = SetupPacket.wIndex.WB.H;
00098   Request   = SetupPacket.bRequest;
00099   Value     = SetupPacket.wValue.W;
00100   ...
00101 */
00102
00103   if (SetupPacket.wIndex.W == 0x0200) {
00104     /* Feature Unit: Interface = 0, ID = 2 */
00105     if (SetupPacket.wValue.WB.L == 0) {
00106       /* Master Channel */
00107       switch (SetupPacket.wValue.WB.H) {
00108         case AUDIO_MUTE_CONTROL:
00109           switch (SetupPacket.bRequest) {
00110             case AUDIO_REQUEST_SET_CUR:
00111               Mute = EP0Buf[0];
00112               return (TRUE);
00113           }
00114           break;
00115         case AUDIO_VOLUME_CONTROL:
00116           switch (SetupPacket.bRequest) {
00117             case AUDIO_REQUEST_SET_CUR:
00118               VolCur = *((__packed uint16_t *)EP0Buf);
00119               return (TRUE);
00120           }
00121           break;
00122       }
00123     }
00124   }
00125   return (FALSE);  /* Not Supported */
00126 }
00127
00128
00129 /*
00130  *  Audio Device Class EndPoint Get Request Callback
00131  *   Called automatically on ADC EndPoint Get Request
00132  *    Parameters:      None (global SetupPacket and EP0Buf)
00133  *    Return Value:    TRUE - Success, FALSE - Error
00134  */
00135
00136 uint32_t ADC_EP_GetRequest (void) {
00137
00138 /*
00139   EndPoint = SetupPacket.wIndex.WB.L;
00140   Request  = SetupPacket.bRequest;
00141   Value    = SetupPacket.wValue.W;
00142   ...
00143 */
00144   return (FALSE);  /* Not Supported */
00145 }
00146
00147
00148 /*
00149  *  Audio Device Class EndPoint Set Request Callback
00150  *   Called automatically on ADC EndPoint Set Request
00151  *    Parameters:      None (global SetupPacket and EP0Buf)
00152  *    Return Value:    TRUE - Success, FALSE - Error
00153  */
00154
00155 uint32_t ADC_EP_SetRequest (void) {
00156
00157 /*
00158   EndPoint = SetupPacket.wIndex.WB.L;
00159   Request  = SetupPacket.bRequest;
00160   Value    = SetupPacket.wValue.W;
00161   ...
00162 */
00163   return (FALSE);  /* Not Supported */
00164 }
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/adcuser.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/adcuser.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    ADCUSER.H
00005  *      Purpose: Audio Device Class Custom User Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on Philips LPC2xxx microcontroller devices only. Nothing else gives
00014  *      you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2006 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __ADCUSER_H__
00020 #define __ADCUSER_H__
00021
00022
00023 /* Audio Device Class Requests Callback Functions */
00024 extern uint32_t ADC_IF_GetRequest (void);
00025 extern uint32_t ADC_IF_SetRequest (void);
00026 extern uint32_t ADC_EP_GetRequest (void);
00027 extern uint32_t ADC_EP_SetRequest (void);
00028
00029
00030 #endif  /* __ADCUSER_H__ */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_abs_f32.c
00009 *
00010 * Description:  Vector absolute value.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034 #include <math.h>
00035
00066 void arm_abs_f32(
00067   float32_t * pSrc,
00068   float32_t * pDst,
00069   uint32_t blockSize)
00070 {
00071   uint32_t blkCnt;                               /* loop counter */
00072
00073 #ifndef ARM_MATH_CM0
00074
00075   /* Run the below code for Cortex-M4 and Cortex-M3 */
00076
00077   /*loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079
00080   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00081    ** a second loop below computes the remaining 1 to 3 samples. */
00082   while(blkCnt > 0u)
00083   {
00084     /* C = |A| */
00085     /* Calculate absolute and then store the results in the destination buffer. */
00086     *pDst++ = fabsf(*pSrc++);
00087     *pDst++ = fabsf(*pSrc++);
00088     *pDst++ = fabsf(*pSrc++);
00089     *pDst++ = fabsf(*pSrc++);
00090
00091     /* Decrement the loop counter */
00092     blkCnt--;
00093   }
00094
00095   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00096    ** No loop unrolling is used. */
00097   blkCnt = blockSize % 0x4u;
00098
00099 #else
00100
00101   /* Run the below code for Cortex-M0 */
00102
00103   /* Initialize blkCnt with number of samples */
00104   blkCnt = blockSize;
00105
00106 #endif /*   #ifndef ARM_MATH_CM0   */
00107
00108   while(blkCnt > 0u)
00109   {
00110     /* C = |A| */
00111     /* Calculate absolute and then store the results in the destination buffer. */
00112     *pDst++ = fabsf(*pSrc++);
00113
00114     /* Decrement the loop counter */
00115     blkCnt--;
00116   }
00117
00118 }
00119
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_abs_q7.c
00009 *
00010 * Description:  Q7 vector absolute value.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00057 void arm_abs_q7(
00058   q7_t * pSrc,
00059   q7_t * pDst,
00060   uint32_t blockSize)
00061 {
00062   uint32_t blkCnt;                               /* loop counter */
00063
00064 #ifndef ARM_MATH_CM0
00065
00066   /* Run the below code for Cortex-M4 and Cortex-M3 */
00067   q7_t in1;                                      /* Input value1 */
00068   q7_t in2;                                      /* Input value2 */
00069   q7_t in3;                                      /* Input value3 */
00070   q7_t in4;                                      /* Input value4 */
00071
00072
00073   /*loop Unrolling */
00074   blkCnt = blockSize >> 2u;
00075
00076   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00077    ** a second loop below computes the remaining 1 to 3 samples. */
00078   while(blkCnt > 0u)
00079   {
00080     /* C = |A| */
00081     /* Read 4 inputs */
00082     in1 = *pSrc++;
00083     in2 = *pSrc++;
00084     in3 = *pSrc++;
00085     in4 = *pSrc++;
00086
00087     /* Store the Absolute result in the destination buffer by packing the 4 values in single cycle */
00088     *__SIMD32(pDst)++ =
00089       __PACKq7(((in1 > 0) ? in1 : __SSAT(-in1, 8)),
00090                ((in2 > 0) ? in2 : __SSAT(-in2, 8)),
00091                ((in3 > 0) ? in3 : __SSAT(-in3, 8)),
00092                ((in4 > 0) ? in4 : __SSAT(-in4, 8)));
00093
00094     /* Decrement the loop counter */
00095     blkCnt--;
00096   }
00097
00098   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00099    ** No loop unrolling is used. */
00100   blkCnt = blockSize % 0x4u;
00101
00102   while(blkCnt > 0u)
00103   {
00104     /* C = |A| */
00105     /* Read the input */
00106     in1 = *pSrc++;
00107
00108     /* Store the Absolute result in the destination buffer */
00109     *pDst++ = (in1 > 0) ? in1 : __SSAT(-in1, 8);
00110
00111     /* Decrement the loop counter */
00112     blkCnt--;
00113   }
00114
00115 #else
00116
00117   /* Run the below code for Cortex-M0 */
00118
00119   q7_t in;                                       /* Temporary input varible */
00120
00121   /* Initialize blkCnt with number of samples */
00122   blkCnt = blockSize;
00123
00124   while(blkCnt > 0u)
00125   {
00126     /* C = |A| */
00127     /* Read the input */
00128     in = *pSrc++;
00129
00130     /* Store the Absolute result in the destination buffer */
00131     *pDst++ = (in > 0) ? in : __SSAT(-in, 8);
00132
00133     /* Decrement the loop counter */
00134     blkCnt--;
00135   }
00136
00137 #endif /*   #ifndef ARM_MATH_CM0   */
00138
00139 }
00140
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_abs_q15.c
00009 *
00010 * Description:  Q15 vector absolute value.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00057 void arm_abs_q15(
00058   q15_t * pSrc,
00059   q15_t * pDst,
00060   uint32_t blockSize)
00061 {
00062   uint32_t blkCnt;                               /* loop counter */
00063
00064 #ifndef ARM_MATH_CM0
00065
00066 /* Run the below code for Cortex-M4 and Cortex-M3 */
00067
00068   q15_t in1;                                     /* Input value1 */
00069   q15_t in2;                                     /* Input value2 */
00070
00071
00072   /*loop Unrolling */
00073   blkCnt = blockSize >> 2u;
00074
00075   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00076    ** a second loop below computes the remaining 1 to 3 samples. */
00077   while(blkCnt > 0u)
00078   {
00079     /* C = |A| */
00080     /* Read two inputs */
00081     in1 = *pSrc++;
00082     in2 = *pSrc++;
00083
00084
00085     /* Store the Absolute result in the destination buffer by packing the two values, in a single cycle */
00086
00087 #ifndef  ARM_MATH_BIG_ENDIAN
00088
00089     *__SIMD32(pDst)++ =
00090       __PKHBT(((in1 > 0) ? in1 : __SSAT(-in1, 16)),
00091               ((in2 > 0) ? in2 : __SSAT(-in2, 16)), 16);
00092
00093 #else
00094
00095
00096     *__SIMD32(pDst)++ =
00097       __PKHBT(((in2 > 0) ? in2 : __SSAT(-in2, 16)),
00098               ((in1 > 0) ? in1 : __SSAT(-in1, 16)), 16);
00099
00100 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
00101
00102     in1 = *pSrc++;
00103     in2 = *pSrc++;
00104
00105
00106 #ifndef  ARM_MATH_BIG_ENDIAN
00107
00108     *__SIMD32(pDst)++ =
00109       __PKHBT(((in1 > 0) ? in1 : __SSAT(-in1, 16)),
00110               ((in2 > 0) ? in2 : __SSAT(-in2, 16)), 16);
00111
00112
00113 #else
00114
00115     *__SIMD32(pDst)++ =
00116       __PKHBT(((in2 > 0) ? in2 : __SSAT(-in2, 16)),
00117               ((in1 > 0) ? in1 : __SSAT(-in1, 16)), 16);
00118
00119 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
00120
00121     /* Decrement the loop counter */
00122     blkCnt--;
00123   }
00124
00125   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00126    ** No loop unrolling is used. */
00127   blkCnt = blockSize % 0x4u;
00128
00129   while(blkCnt > 0u)
00130   {
00131     /* C = |A| */
00132     /* Read the input */
00133     in1 = *pSrc++;
00134
00135     /* Calculate absolute value of input and then store the result in the destination buffer. */
00136     *pDst++ = (in1 > 0) ? in1 : __SSAT(-in1, 16);
00137
00138     /* Decrement the loop counter */
00139     blkCnt--;
00140   }
00141
00142 #else
00143
00144   /* Run the below code for Cortex-M0 */
00145
00146   q15_t in;                                      /* Temporary input variable */
00147
00148   /* Initialize blkCnt with number of samples */
00149   blkCnt = blockSize;
00150
00151   while(blkCnt > 0u)
00152   {
00153     /* C = |A| */
00154     /* Read the input */
00155     in = *pSrc++;
00156
00157     /* Calculate absolute value of input and then store the result in the destination buffer. */
00158     *pDst++ = (in > 0) ? in : __SSAT(-in, 16);
00159
00160     /* Decrement the loop counter */
00161     blkCnt--;
00162   }
00163
00164 #endif /* #ifndef ARM_MATH_CM0 */
00165
00166 }
00167
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_abs_q31.c
00009 *
00010 * Description:  Q31 vector absolute value.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_abs_q31(
00059   q31_t * pSrc,
00060   q31_t * pDst,
00061   uint32_t blockSize)
00062 {
00063   uint32_t blkCnt;                               /* loop counter */
00064   q31_t in;                                      /* Input value */
00065
00066 #ifndef ARM_MATH_CM0
00067
00068   /* Run the below code for Cortex-M4 and Cortex-M3 */
00069
00070   /*loop Unrolling */
00071   blkCnt = blockSize >> 2u;
00072
00073   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00074    ** a second loop below computes the remaining 1 to 3 samples. */
00075   while(blkCnt > 0u)
00076   {
00077     /* C = |A| */
00078     /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
00079     in = *pSrc++;
00080     *pDst++ = (in > 0) ? in : ((in == 0x80000000) ? 0x7fffffff : -in);
00081     in = *pSrc++;
00082     *pDst++ = (in > 0) ? in : ((in == 0x80000000) ? 0x7fffffff : -in);
00083     in = *pSrc++;
00084     *pDst++ = (in > 0) ? in : ((in == 0x80000000) ? 0x7fffffff : -in);
00085     in = *pSrc++;
00086     *pDst++ = (in > 0) ? in : ((in == 0x80000000) ? 0x7fffffff : -in);
00087
00088     /* Decrement the loop counter */
00089     blkCnt--;
00090   }
00091
00092   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00093    ** No loop unrolling is used. */
00094   blkCnt = blockSize % 0x4u;
00095
00096 #else
00097
00098   /* Run the below code for Cortex-M0 */
00099
00100   /* Initialize blkCnt with number of samples */
00101   blkCnt = blockSize;
00102
00103 #endif /*   #ifndef ARM_MATH_CM0   */
00104
00105   while(blkCnt > 0u)
00106   {
00107     /* C = |A| */
00108     /* Calculate absolute value of the input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
00109     in = *pSrc++;
00110     *pDst++ = (in > 0) ? in : ((in == 0x80000000) ? 0x7fffffff : -in);
00111
00112     /* Decrement the loop counter */
00113     blkCnt--;
00114   }
00115
00116 }
00117
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_add_f32.c
00009 *
00010 * Description:  Floating-point vector addition.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00065 void arm_add_f32(
00066   float32_t * pSrcA,
00067   float32_t * pSrcB,
00068   float32_t * pDst,
00069   uint32_t blockSize)
00070 {
00071   uint32_t blkCnt;                               /* loop counter */
00072
00073 #ifndef ARM_MATH_CM0
00074
00075 /* Run the below code for Cortex-M4 and Cortex-M3 */
00076
00077   /*loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079
00080   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00081    ** a second loop below computes the remaining 1 to 3 samples. */
00082   while(blkCnt > 0u)
00083   {
00084     /* C = A + B */
00085     /* Add and then store the results in the destination buffer. */
00086     *pDst++ = (*pSrcA++) + (*pSrcB++);
00087     *pDst++ = (*pSrcA++) + (*pSrcB++);
00088     *pDst++ = (*pSrcA++) + (*pSrcB++);
00089     *pDst++ = (*pSrcA++) + (*pSrcB++);
00090
00091     /* Decrement the loop counter */
00092     blkCnt--;
00093   }
00094
00095   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00096    ** No loop unrolling is used. */
00097   blkCnt = blockSize % 0x4u;
00098
00099 #else
00100
00101   /* Run the below code for Cortex-M0 */
00102
00103   /* Initialize blkCnt with number of samples */
00104   blkCnt = blockSize;
00105
00106 #endif /* #ifndef ARM_MATH_CM0 */
00107
00108   while(blkCnt > 0u)
00109   {
00110     /* C = A + B */
00111     /* Add and then store the results in the destination buffer. */
00112     *pDst++ = (*pSrcA++) + (*pSrcB++);
00113
00114     /* Decrement the loop counter */
00115     blkCnt--;
00116   }
00117 }
00118
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_add_q7.c
00009 *
00010 * Description:  Q7 vector addition.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_add_q7(
00059   q7_t * pSrcA,
00060   q7_t * pSrcB,
00061   q7_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   uint32_t blkCnt;                               /* loop counter */
00065
00066 #ifndef ARM_MATH_CM0
00067
00068 /* Run the below code for Cortex-M4 and Cortex-M3 */
00069
00070
00071   /*loop Unrolling */
00072   blkCnt = blockSize >> 2u;
00073
00074   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00075    ** a second loop below computes the remaining 1 to 3 samples. */
00076   while(blkCnt > 0u)
00077   {
00078     /* C = A + B */
00079     /* Add and then store the results in the destination buffer. */
00080     *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
00081
00082     /* Decrement the loop counter */
00083     blkCnt--;
00084   }
00085
00086   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00087    ** No loop unrolling is used. */
00088   blkCnt = blockSize % 0x4u;
00089
00090   while(blkCnt > 0u)
00091   {
00092     /* C = A + B */
00093     /* Add and then store the results in the destination buffer. */
00094     *pDst++ = (q7_t) __SSAT(*pSrcA++ + *pSrcB++, 8);
00095
00096     /* Decrement the loop counter */
00097     blkCnt--;
00098   }
00099
00100 #else
00101
00102   /* Run the below code for Cortex-M0 */
00103
00104
00105
00106   /* Initialize blkCnt with number of samples */
00107   blkCnt = blockSize;
00108
00109   while(blkCnt > 0u)
00110   {
00111     /* C = A + B */
00112     /* Add and then store the results in the destination buffer. */
00113     *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ + *pSrcB++, 8);
00114
00115     /* Decrement the loop counter */
00116     blkCnt--;
00117   }
00118
00119 #endif /* #ifndef ARM_MATH_CM0 */
00120
00121
00122 }
00123
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_add_q15.c
00009 *
00010 * Description:  Q15 vector addition
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_add_q15(
00059   q15_t * pSrcA,
00060   q15_t * pSrcB,
00061   q15_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   uint32_t blkCnt;                               /* loop counter */
00065
00066 #ifndef ARM_MATH_CM0
00067
00068 /* Run the below code for Cortex-M4 and Cortex-M3 */
00069
00070
00071   /*loop Unrolling */
00072   blkCnt = blockSize >> 2u;
00073
00074   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00075    ** a second loop below computes the remaining 1 to 3 samples. */
00076   while(blkCnt > 0u)
00077   {
00078     /* C = A + B */
00079     /* Add and then store the results in the destination buffer. */
00080     *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
00081     *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
00082
00083     /* Decrement the loop counter */
00084     blkCnt--;
00085   }
00086
00087   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00088    ** No loop unrolling is used. */
00089   blkCnt = blockSize % 0x4u;
00090
00091   while(blkCnt > 0u)
00092   {
00093     /* C = A + B */
00094     /* Add and then store the results in the destination buffer. */
00095     *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++);
00096
00097     /* Decrement the loop counter */
00098     blkCnt--;
00099   }
00100
00101 #else
00102
00103   /* Run the below code for Cortex-M0 */
00104
00105
00106
00107   /* Initialize blkCnt with number of samples */
00108   blkCnt = blockSize;
00109
00110   while(blkCnt > 0u)
00111   {
00112     /* C = A + B */
00113     /* Add and then store the results in the destination buffer. */
00114     *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ + *pSrcB++), 16);
00115
00116     /* Decrement the loop counter */
00117     blkCnt--;
00118   }
00119
00120 #endif /* #ifndef ARM_MATH_CM0 */
00121
00122
00123 }
00124
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_add_q31.c
00009 *
00010 * Description:  Q31 vector addition.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00059 void arm_add_q31(
00060   q31_t * pSrcA,
00061   q31_t * pSrcB,
00062   q31_t * pDst,
00063   uint32_t blockSize)
00064 {
00065   uint32_t blkCnt;                               /* loop counter */
00066
00067 #ifndef ARM_MATH_CM0
00068
00069 /* Run the below code for Cortex-M4 and Cortex-M3 */
00070
00071
00072   /*loop Unrolling */
00073   blkCnt = blockSize >> 2u;
00074
00075   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00076    ** a second loop below computes the remaining 1 to 3 samples. */
00077   while(blkCnt > 0u)
00078   {
00079     /* C = A + B */
00080     /* Add and then store the results in the destination buffer. */
00081     *pDst++ = __QADD(*pSrcA++, *pSrcB++);
00082     *pDst++ = __QADD(*pSrcA++, *pSrcB++);
00083     *pDst++ = __QADD(*pSrcA++, *pSrcB++);
00084     *pDst++ = __QADD(*pSrcA++, *pSrcB++);
00085
00086     /* Decrement the loop counter */
00087     blkCnt--;
00088   }
00089
00090   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00091    ** No loop unrolling is used. */
00092   blkCnt = blockSize % 0x4u;
00093
00094   while(blkCnt > 0u)
00095   {
00096     /* C = A + B */
00097     /* Add and then store the results in the destination buffer. */
00098     *pDst++ = __QADD(*pSrcA++, *pSrcB++);
00099
00100     /* Decrement the loop counter */
00101     blkCnt--;
00102   }
00103
00104 #else
00105
00106   /* Run the below code for Cortex-M0 */
00107
00108
00109
00110   /* Initialize blkCnt with number of samples */
00111   blkCnt = blockSize;
00112
00113   while(blkCnt > 0u)
00114   {
00115     /* C = A + B */
00116     /* Add and then store the results in the destination buffer. */
00117     *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ + *pSrcB++);
00118
00119     /* Decrement the loop counter */
00120     blkCnt--;
00121   }
00122
00123 #endif /* #ifndef ARM_MATH_CM0 */
00124
00125 }
00126
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_biquad_cascade_df1_32x64_init_q31.c
00009 *
00010 * Description:  High precision Q31 Biquad cascade filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00077 void arm_biquad_cas_df1_32x64_init_q31(
00078   arm_biquad_cas_df1_32x64_ins_q31 * S,
00079   uint8_t numStages,
00080   q31_t * pCoeffs,
00081   q63_t * pState,
00082   uint8_t postShift)
00083 {
00084   /* Assign filter stages */
00085   S->numStages = numStages;
00086
00087   /* Assign postShift to be applied to the output */
00088   S->postShift = postShift;
00089
00090   /* Assign coefficient pointer */
00091   S->pCoeffs = pCoeffs;
00092
00093   /* Clear state buffer and size is always 4 * numStages */
00094   memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q63_t));
00095
00096   /* Assign state pointer */
00097   S->pState = pState;
00098 }
00099
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_biquad_cascade_df1_32x64_q31.c
00009 *
00010 * Description:  High precision Q31 Biquad cascade filter processing function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00176 void arm_biquad_cas_df1_32x64_q31(
00177   const arm_biquad_cas_df1_32x64_ins_q31 * S,
00178   q31_t * pSrc,
00179   q31_t * pDst,
00180   uint32_t blockSize)
00181 {
00182   q31_t *pIn = pSrc;                             /*  input pointer initialization  */
00183   q31_t *pOut = pDst;                            /*  output pointer initialization */
00184   q63_t *pState = S->pState;                     /*  state pointer initialization  */
00185   q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
00186   q63_t acc;                                     /*  accumulator                   */
00187   q63_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
00188   q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
00189   q63_t Xn;                                      /*  temporary input               */
00190   int32_t shift = (int32_t) S->postShift + 1;    /*  Shift to be applied to the output */
00191   uint32_t sample, stage = S->numStages;         /*  loop counters                     */
00192
00193
00194 #ifndef ARM_MATH_CM0
00195
00196   /* Run the below code for Cortex-M4 and Cortex-M3 */
00197
00198   do
00199   {
00200     /* Reading the coefficients */
00201     b0 = *pCoeffs++;
00202     b1 = *pCoeffs++;
00203     b2 = *pCoeffs++;
00204     a1 = *pCoeffs++;
00205     a2 = *pCoeffs++;
00206
00207     /* Reading the state values */
00208     Xn1 = pState[0];
00209     Xn2 = pState[1];
00210     Yn1 = pState[2];
00211     Yn2 = pState[3];
00212
00213     /* Apply loop unrolling and compute 4 output values simultaneously. */
00214     /* The variable acc hold output value that is being computed and
00215      * stored in the destination buffer
00216      * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
00217      */
00218
00219     sample = blockSize >> 2u;
00220
00221     /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
00222      ** a second loop below computes the remaining 1 to 3 samples. */
00223     while(sample > 0u)
00224     {
00225       /* Read the input */
00226       Xn = *pIn++;
00227
00228       /* The value is shifted to the MSB to perform 32x64 multiplication */
00229       Xn = Xn << 32;
00230
00231       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00232
00233       /* acc =  b0 * x[n] */
00234       acc = mult32x64(Xn, b0);
00235       /* acc +=  b1 * x[n-1] */
00236       acc += mult32x64(Xn1, b1);
00237       /* acc +=  b[2] * x[n-2] */
00238       acc += mult32x64(Xn2, b2);
00239       /* acc +=  a1 * y[n-1] */
00240       acc += mult32x64(Yn1, a1);
00241       /* acc +=  a2 * y[n-2] */
00242       acc += mult32x64(Yn2, a2);
00243
00244       /* The result is converted to 1.63 , Yn2 variable is reused */
00245       Yn2 = acc << shift;
00246
00247       /* Store the output in the destination buffer in 1.31 format. */
00248       *pOut++ = (q31_t) (acc >> (32 - shift));
00249
00250       /* Read the second input into Xn2, to reuse the value */
00251       Xn2 = *pIn++;
00252
00253       /* The value is shifted to the MSB to perform 32x64 multiplication */
00254       Xn2 = Xn2 << 32;
00255
00256       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00257
00258       /* acc =  b0 * x[n] */
00259       acc = mult32x64(Xn2, b0);
00260       /* acc +=  b1 * x[n-1] */
00261       acc += mult32x64(Xn, b1);
00262       /* acc +=  b[2] * x[n-2] */
00263       acc += mult32x64(Xn1, b2);
00264       /* acc +=  a1 * y[n-1] */
00265       acc += mult32x64(Yn2, a1);
00266       /* acc +=  a2 * y[n-2] */
00267       acc += mult32x64(Yn1, a2);
00268
00269       /* The result is converted to 1.63, Yn1 variable is reused */
00270       Yn1 = acc << shift;
00271
00272       /* The result is converted to 1.31 */
00273       /* Store the output in the destination buffer. */
00274       *pOut++ = (q31_t) (acc >> (32 - shift));
00275
00276       /* Read the third input into Xn1, to reuse the value */
00277       Xn1 = *pIn++;
00278
00279       /* The value is shifted to the MSB to perform 32x64 multiplication */
00280       Xn1 = Xn1 << 32;
00281
00282       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00283       /* acc =  b0 * x[n] */
00284       acc = mult32x64(Xn1, b0);
00285       /* acc +=  b1 * x[n-1] */
00286       acc += mult32x64(Xn2, b1);
00287       /* acc +=  b[2] * x[n-2] */
00288       acc += mult32x64(Xn, b2);
00289       /* acc +=  a1 * y[n-1] */
00290       acc += mult32x64(Yn1, a1);
00291       /* acc +=  a2 * y[n-2] */
00292       acc += mult32x64(Yn2, a2);
00293
00294       /* The result is converted to 1.63, Yn2 variable is reused  */
00295       Yn2 = acc << shift;
00296
00297       /* Store the output in the destination buffer in 1.31 format. */
00298       *pOut++ = (q31_t) (acc >> (32 - shift));
00299
00300       /* Read the fourth input into Xn, to reuse the value */
00301       Xn = *pIn++;
00302
00303       /* The value is shifted to the MSB to perform 32x64 multiplication */
00304       Xn = Xn << 32;
00305
00306       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00307       /* acc =  b0 * x[n] */
00308       acc = mult32x64(Xn, b0);
00309       /* acc +=  b1 * x[n-1] */
00310       acc += mult32x64(Xn1, b1);
00311       /* acc +=  b[2] * x[n-2] */
00312       acc += mult32x64(Xn2, b2);
00313       /* acc +=  a1 * y[n-1] */
00314       acc += mult32x64(Yn2, a1);
00315       /* acc +=  a2 * y[n-2] */
00316       acc += mult32x64(Yn1, a2);
00317
00318       /* The result is converted to 1.63, Yn1 variable is reused  */
00319       Yn1 = acc << shift;
00320
00321       /* Every time after the output is computed state should be updated. */
00322       /* The states should be updated as:  */
00323       /* Xn2 = Xn1    */
00324       /* Xn1 = Xn     */
00325       /* Yn2 = Yn1    */
00326       /* Yn1 = acc    */
00327       Xn2 = Xn1;
00328       Xn1 = Xn;
00329
00330       /* Store the output in the destination buffer in 1.31 format. */
00331       *pOut++ = (q31_t) (acc >> (32 - shift));
00332
00333       /* decrement the loop counter */
00334       sample--;
00335     }
00336
00337     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00338      ** No loop unrolling is used. */
00339     sample = (blockSize & 0x3u);
00340
00341     while(sample > 0u)
00342     {
00343       /* Read the input */
00344       Xn = *pIn++;
00345
00346       /* The value is shifted to the MSB to perform 32x64 multiplication */
00347       Xn = Xn << 32;
00348
00349       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00350       /* acc =  b0 * x[n] */
00351       acc = mult32x64(Xn, b0);
00352       /* acc +=  b1 * x[n-1] */
00353       acc += mult32x64(Xn1, b1);
00354       /* acc +=  b[2] * x[n-2] */
00355       acc += mult32x64(Xn2, b2);
00356       /* acc +=  a1 * y[n-1] */
00357       acc += mult32x64(Yn1, a1);
00358       /* acc +=  a2 * y[n-2] */
00359       acc += mult32x64(Yn2, a2);
00360
00361       /* Every time after the output is computed state should be updated. */
00362       /* The states should be updated as:  */
00363       /* Xn2 = Xn1    */
00364       /* Xn1 = Xn     */
00365       /* Yn2 = Yn1    */
00366       /* Yn1 = acc    */
00367       Xn2 = Xn1;
00368       Xn1 = Xn;
00369       Yn2 = Yn1;
00370       Yn1 = acc << shift;
00371
00372       /* Store the output in the destination buffer in 1.31 format. */
00373       *pOut++ = (q31_t) (acc >> (32 - shift));
00374
00375       /* decrement the loop counter */
00376       sample--;
00377     }
00378
00379     /*  The first stage output is given as input to the second stage. */
00380     pIn = pDst;
00381
00382     /* Reset to destination buffer working pointer */
00383     pOut = pDst;
00384
00385     /*  Store the updated state variables back into the pState array */
00386     *pState++ = Xn1;
00387     *pState++ = Xn2;
00388     *pState++ = Yn1;
00389     *pState++ = Yn2;
00390
00391   } while(--stage);
00392
00393 #else
00394
00395   /* Run the below code for Cortex-M0 */
00396
00397   do
00398   {
00399     /* Reading the coefficients */
00400     b0 = *pCoeffs++;
00401     b1 = *pCoeffs++;
00402     b2 = *pCoeffs++;
00403     a1 = *pCoeffs++;
00404     a2 = *pCoeffs++;
00405
00406     /* Reading the state values */
00407     Xn1 = pState[0];
00408     Xn2 = pState[1];
00409     Yn1 = pState[2];
00410     Yn2 = pState[3];
00411
00412     /* The variable acc hold output value that is being computed and
00413      * stored in the destination buffer
00414      * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
00415      */
00416
00417     sample = blockSize;
00418
00419     while(sample > 0u)
00420     {
00421       /* Read the input */
00422       Xn = *pIn++;
00423
00424       /* The value is shifted to the MSB to perform 32x64 multiplication */
00425       Xn = Xn << 32;
00426
00427       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00428       /* acc =  b0 * x[n] */
00429       acc = mult32x64(Xn, b0);
00430       /* acc +=  b1 * x[n-1] */
00431       acc += mult32x64(Xn1, b1);
00432       /* acc +=  b[2] * x[n-2] */
00433       acc += mult32x64(Xn2, b2);
00434       /* acc +=  a1 * y[n-1] */
00435       acc += mult32x64(Yn1, a1);
00436       /* acc +=  a2 * y[n-2] */
00437       acc += mult32x64(Yn2, a2);
00438
00439       /* Every time after the output is computed state should be updated. */
00440       /* The states should be updated as:  */
00441       /* Xn2 = Xn1    */
00442       /* Xn1 = Xn     */
00443       /* Yn2 = Yn1    */
00444       /* Yn1 = acc    */
00445       Xn2 = Xn1;
00446       Xn1 = Xn;
00447       Yn2 = Yn1;
00448       Yn1 = acc << shift;
00449
00450       /* Store the output in the destination buffer in 1.31 format. */
00451       *pOut++ = (q31_t) (acc >> (32 - shift));
00452
00453       /* decrement the loop counter */
00454       sample--;
00455     }
00456
00457     /*  The first stage output is given as input to the second stage. */
00458     pIn = pDst;
00459
00460     /* Reset to destination buffer working pointer */
00461     pOut = pDst;
00462
00463     /*  Store the updated state variables back into the pState array */
00464     *pState++ = Xn1;
00465     *pState++ = Xn2;
00466     *pState++ = Yn1;
00467     *pState++ = Yn2;
00468
00469   } while(--stage);
00470
00471 #endif /*    #ifndef ARM_MATH_CM0     */
00472 }
00473
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_biquad_cascade_df1_f32.c
00009 *
00010 * Description:  Processing function for the
00011 *               floating-point Biquad cascade DirectFormI(DF1) filter.
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 *
00030 * Version 0.0.5  2010/04/26
00031 *        incorporated review comments and updated with latest CMSIS layer
00032 *
00033 * Version 0.0.3  2010/03/10
00034 *    Initial version
00035 * -------------------------------------------------------------------- */
00036
00037 #include "arm_math.h"
00038
00171 void arm_biquad_cascade_df1_f32(
00172   const arm_biquad_casd_df1_inst_f32 * S,
00173   float32_t * pSrc,
00174   float32_t * pDst,
00175   uint32_t blockSize)
00176 {
00177   float32_t *pIn = pSrc;                         /*  source pointer            */
00178   float32_t *pOut = pDst;                        /*  destination pointer       */
00179   float32_t *pState = S->pState;                 /*  pState pointer            */
00180   float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
00181   float32_t acc;                                 /*  Simulates the accumulator */
00182   float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
00183   float32_t Xn1, Xn2, Yn1, Yn2;                  /*  Filter pState variables   */
00184   float32_t Xn;                                  /*  temporary input           */
00185   uint32_t sample, stage = S->numStages;         /*  loop counters             */
00186
00187
00188 #ifndef ARM_MATH_CM0
00189
00190   /* Run the below code for Cortex-M4 and Cortex-M3 */
00191
00192   do
00193   {
00194     /* Reading the coefficients */
00195     b0 = *pCoeffs++;
00196     b1 = *pCoeffs++;
00197     b2 = *pCoeffs++;
00198     a1 = *pCoeffs++;
00199     a2 = *pCoeffs++;
00200
00201     /* Reading the pState values */
00202     Xn1 = pState[0];
00203     Xn2 = pState[1];
00204     Yn1 = pState[2];
00205     Yn2 = pState[3];
00206
00207     /* Apply loop unrolling and compute 4 output values simultaneously. */
00208     /*      The variable acc hold output values that are being computed:
00209      *
00210      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]
00211      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]
00212      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]
00213      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]
00214      */
00215
00216     sample = blockSize >> 2u;
00217
00218     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00219      ** a second loop below computes the remaining 1 to 3 samples. */
00220     while(sample > 0u)
00221     {
00222       /* Read the first input */
00223       Xn = *pIn++;
00224
00225       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00226       Yn2 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
00227
00228       /* Store the result in the accumulator in the destination buffer. */
00229       *pOut++ = Yn2;
00230
00231       /* Every time after the output is computed state should be updated. */
00232       /* The states should be updated as:  */
00233       /* Xn2 = Xn1    */
00234       /* Xn1 = Xn     */
00235       /* Yn2 = Yn1    */
00236       /* Yn1 = acc   */
00237
00238       /* Read the second input */
00239       Xn2 = *pIn++;
00240
00241       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00242       Yn1 = (b0 * Xn2) + (b1 * Xn) + (b2 * Xn1) + (a1 * Yn2) + (a2 * Yn1);
00243
00244       /* Store the result in the accumulator in the destination buffer. */
00245       *pOut++ = Yn1;
00246
00247       /* Every time after the output is computed state should be updated. */
00248       /* The states should be updated as:  */
00249       /* Xn2 = Xn1    */
00250       /* Xn1 = Xn     */
00251       /* Yn2 = Yn1    */
00252       /* Yn1 = acc   */
00253
00254       /* Read the third input */
00255       Xn1 = *pIn++;
00256
00257       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00258       Yn2 = (b0 * Xn1) + (b1 * Xn2) + (b2 * Xn) + (a1 * Yn1) + (a2 * Yn2);
00259
00260       /* Store the result in the accumulator in the destination buffer. */
00261       *pOut++ = Yn2;
00262
00263       /* Every time after the output is computed state should be updated. */
00264       /* The states should be updated as: */
00265       /* Xn2 = Xn1    */
00266       /* Xn1 = Xn     */
00267       /* Yn2 = Yn1    */
00268       /* Yn1 = acc   */
00269
00270       /* Read the forth input */
00271       Xn = *pIn++;
00272
00273       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00274       Yn1 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn2) + (a2 * Yn1);
00275
00276       /* Store the result in the accumulator in the destination buffer. */
00277       *pOut++ = Yn1;
00278
00279       /* Every time after the output is computed state should be updated. */
00280       /* The states should be updated as:  */
00281       /* Xn2 = Xn1    */
00282       /* Xn1 = Xn     */
00283       /* Yn2 = Yn1    */
00284       /* Yn1 = acc   */
00285       Xn2 = Xn1;
00286       Xn1 = Xn;
00287
00288       /* decrement the loop counter */
00289       sample--;
00290
00291     }
00292
00293     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00294      ** No loop unrolling is used. */
00295     sample = blockSize & 0x3u;
00296
00297     while(sample > 0u)
00298     {
00299       /* Read the input */
00300       Xn = *pIn++;
00301
00302       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00303       acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
00304
00305       /* Store the result in the accumulator in the destination buffer. */
00306       *pOut++ = acc;
00307
00308       /* Every time after the output is computed state should be updated. */
00309       /* The states should be updated as:    */
00310       /* Xn2 = Xn1    */
00311       /* Xn1 = Xn     */
00312       /* Yn2 = Yn1    */
00313       /* Yn1 = acc   */
00314       Xn2 = Xn1;
00315       Xn1 = Xn;
00316       Yn2 = Yn1;
00317       Yn1 = acc;
00318
00319       /* decrement the loop counter */
00320       sample--;
00321
00322     }
00323
00324     /*  Store the updated state variables back into the pState array */
00325     *pState++ = Xn1;
00326     *pState++ = Xn2;
00327     *pState++ = Yn1;
00328     *pState++ = Yn2;
00329
00330     /*  The first stage goes from the input buffer to the output buffer. */
00331     /*  Subsequent numStages  occur in-place in the output buffer */
00332     pIn = pDst;
00333
00334     /* Reset the output pointer */
00335     pOut = pDst;
00336
00337     /* decrement the loop counter */
00338     stage--;
00339
00340   } while(stage > 0u);
00341
00342 #else
00343
00344   /* Run the below code for Cortex-M0 */
00345
00346   do
00347   {
00348     /* Reading the coefficients */
00349     b0 = *pCoeffs++;
00350     b1 = *pCoeffs++;
00351     b2 = *pCoeffs++;
00352     a1 = *pCoeffs++;
00353     a2 = *pCoeffs++;
00354
00355     /* Reading the pState values */
00356     Xn1 = pState[0];
00357     Xn2 = pState[1];
00358     Yn1 = pState[2];
00359     Yn2 = pState[3];
00360
00361     /*      The variables acc holds the output value that is computed:
00362      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]
00363      */
00364
00365     sample = blockSize;
00366
00367     while(sample > 0u)
00368     {
00369       /* Read the input */
00370       Xn = *pIn++;
00371
00372       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00373       acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
00374
00375       /* Store the result in the accumulator in the destination buffer. */
00376       *pOut++ = acc;
00377
00378       /* Every time after the output is computed state should be updated. */
00379       /* The states should be updated as:    */
00380       /* Xn2 = Xn1    */
00381       /* Xn1 = Xn     */
00382       /* Yn2 = Yn1    */
00383       /* Yn1 = acc   */
00384       Xn2 = Xn1;
00385       Xn1 = Xn;
00386       Yn2 = Yn1;
00387       Yn1 = acc;
00388
00389       /* decrement the loop counter */
00390       sample--;
00391     }
00392
00393     /*  Store the updated state variables back into the pState array */
00394     *pState++ = Xn1;
00395     *pState++ = Xn2;
00396     *pState++ = Yn1;
00397     *pState++ = Yn2;
00398
00399     /*  The first stage goes from the input buffer to the output buffer. */
00400     /*  Subsequent numStages  occur in-place in the output buffer */
00401     pIn = pDst;
00402
00403     /* Reset the output pointer */
00404     pOut = pDst;
00405
00406     /* decrement the loop counter */
00407     stage--;
00408
00409   } while(stage > 0u);
00410
00411 #endif /*   #ifndef ARM_MATH_CM0         */
00412
00413 }
00414
00415
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_biquad_cascade_df1_fast_q15.c
00009 *
00010 * Description:  Fast processing function for the
00011 *                               Q15 Biquad cascade filter.
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 *
00030 * Version 0.0.9  2010/08/16
00031 *    Initial version
00032 *
00033 *
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00069 void arm_biquad_cascade_df1_fast_q15(
00070   const arm_biquad_casd_df1_inst_q15 * S,
00071   q15_t * pSrc,
00072   q15_t * pDst,
00073   uint32_t blockSize)
00074 {
00075   q15_t *pIn = pSrc;                             /*  Source pointer                               */
00076   q15_t *pOut = pDst;                            /*  Destination pointer                          */
00077   q31_t in;                                      /*  Temporary variable to hold input value       */
00078   q31_t out;                                     /*  Temporary variable to hold output value      */
00079   q31_t b0;                                      /*  Temporary variable to hold bo value          */
00080   q31_t b1, a1;                                  /*  Filter coefficients                          */
00081   q31_t state_in, state_out;                     /*  Filter state variables                       */
00082   q31_t acc0;                                    /*  Accumulator                                  */
00083   int32_t shift = (int32_t) (15 - S->postShift); /*  Post shift                                   */
00084   q15_t *pState = S->pState;                     /*  State pointer                                */
00085   q15_t *pCoeffs = S->pCoeffs;                   /*  Coefficient pointer                          */
00086   q31_t *pState_q31;                             /*  32-bit state pointer for SIMD implementation */
00087   uint32_t sample, stage = S->numStages;         /*  Stage loop counter                           */
00088
00089
00090
00091   do
00092   {
00093     /* Initialize state pointer of type q31 */
00094     pState_q31 = (q31_t *) (pState);
00095
00096     /* Read the b0 and 0 coefficients using SIMD  */
00097     b0 = *__SIMD32(pCoeffs)++;
00098
00099     /* Read the b1 and b2 coefficients using SIMD */
00100     b1 = *__SIMD32(pCoeffs)++;
00101
00102     /* Read the a1 and a2 coefficients using SIMD */
00103     a1 = *__SIMD32(pCoeffs)++;
00104
00105     /* Read the input state values from the state buffer:  x[n-1], x[n-2] */
00106     state_in = (q31_t) (*pState_q31++);
00107
00108     /* Read the output state values from the state buffer:  y[n-1], y[n-2] */
00109     state_out = (q31_t) (*pState_q31);
00110
00111     /* Apply loop unrolling and compute 2 output values simultaneously. */
00112     /*      The variables acc0 ... acc3 hold output values that are being computed:
00113      *
00114      *    acc0 =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
00115      *    acc0 =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
00116      */
00117     sample = blockSize >> 1u;
00118
00119     /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.
00120      ** a second loop below computes the remaining 1 sample. */
00121     while(sample > 0u)
00122     {
00123
00124       /* Read the input */
00125       in = *__SIMD32(pIn)++;
00126
00127       /* out =  b0 * x[n] + 0 * 0 */
00128       out = __SMUAD(b0, in);
00129       /* acc0 =  b1 * x[n-1] + acc0 +=  b2 * x[n-2] + out */
00130       acc0 = __SMLAD(b1, state_in, out);
00131       /* acc0 +=  a1 * y[n-1] + acc0 +=  a2 * y[n-2] */
00132       acc0 = __SMLAD(a1, state_out, acc0);
00133
00134       /* The result is converted from 3.29 to 1.31 and then saturation is applied */
00135       out = __SSAT((acc0 >> shift), 16);
00136
00137       /* Every time after the output is computed state should be updated. */
00138       /* The states should be updated as:  */
00139       /* Xn2 = Xn1    */
00140       /* Xn1 = Xn     */
00141       /* Yn2 = Yn1    */
00142       /* Yn1 = acc0   */
00143       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
00144       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
00145
00146 #ifndef  ARM_MATH_BIG_ENDIAN
00147
00148       state_in = __PKHBT(in, state_in, 16);
00149       state_out = __PKHBT(out, state_out, 16);
00150
00151 #else
00152
00153       state_in = __PKHBT(state_in >> 16, (in >> 16), 16);
00154       state_out = __PKHBT(state_out >> 16, (out), 16);
00155
00156 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00157
00158       /* out =  b0 * x[n] + 0 * 0 */
00159       out = __SMUADX(b0, in);
00160       /* acc0 =  b1 * x[n-1] + acc0 +=  b2 * x[n-2] + out */
00161       acc0 = __SMLAD(b1, state_in, out);
00162       /* acc0 +=  a1 * y[n-1] + acc0 +=  a2 * y[n-2] */
00163       acc0 = __SMLAD(a1, state_out, acc0);
00164
00165       /* The result is converted from 3.29 to 1.31 and then saturation is applied */
00166       out = __SSAT((acc0 >> shift), 16);
00167
00168
00169       /* Store the output in the destination buffer. */
00170
00171 #ifndef  ARM_MATH_BIG_ENDIAN
00172
00173       *__SIMD32(pOut)++ = __PKHBT(state_out, out, 16);
00174
00175 #else
00176
00177       *__SIMD32(pOut)++ = __PKHBT(out, state_out >> 16, 16);
00178
00179 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00180
00181       /* Every time after the output is computed state should be updated. */
00182       /* The states should be updated as:  */
00183       /* Xn2 = Xn1    */
00184       /* Xn1 = Xn     */
00185       /* Yn2 = Yn1    */
00186       /* Yn1 = acc0   */
00187       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
00188       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
00189
00190 #ifndef  ARM_MATH_BIG_ENDIAN
00191
00192       state_in = __PKHBT(in >> 16, state_in, 16);
00193       state_out = __PKHBT(out, state_out, 16);
00194
00195 #else
00196
00197       state_in = __PKHBT(state_in >> 16, in, 16);
00198       state_out = __PKHBT(state_out >> 16, out, 16);
00199
00200 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00201
00202
00203       /* Decrement the loop counter */
00204       sample--;
00205
00206     }
00207
00208     /* If the blockSize is not a multiple of 2, compute any remaining output samples here.
00209      ** No loop unrolling is used. */
00210
00211     if((blockSize & 0x1u) != 0u)
00212     {
00213       /* Read the input */
00214       in = *pIn++;
00215
00216       /* out =  b0 * x[n] + 0 * 0 */
00217
00218 #ifndef  ARM_MATH_BIG_ENDIAN
00219
00220       out = __SMUAD(b0, in);
00221
00222 #else
00223
00224       out = __SMUADX(b0, in);
00225
00226 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00227
00228       /* acc0 =  b1 * x[n-1] + acc0 +=  b2 * x[n-2] + out */
00229       acc0 = __SMLAD(b1, state_in, out);
00230       /* acc0 +=  a1 * y[n-1] + acc0 +=  a2 * y[n-2] */
00231       acc0 = __SMLAD(a1, state_out, acc0);
00232
00233       /* The result is converted from 3.29 to 1.31 and then saturation is applied */
00234       out = __SSAT((acc0 >> shift), 16);
00235
00236       /* Store the output in the destination buffer. */
00237       *pOut++ = (q15_t) out;
00238
00239       /* Every time after the output is computed state should be updated. */
00240       /* The states should be updated as:  */
00241       /* Xn2 = Xn1    */
00242       /* Xn1 = Xn     */
00243       /* Yn2 = Yn1    */
00244       /* Yn1 = acc0   */
00245       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
00246       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
00247
00248 #ifndef  ARM_MATH_BIG_ENDIAN
00249
00250       state_in = __PKHBT(in, state_in, 16);
00251       state_out = __PKHBT(out, state_out, 16);
00252
00253 #else
00254
00255       state_in = __PKHBT(state_in >> 16, in, 16);
00256       state_out = __PKHBT(state_out >> 16, out, 16);
00257
00258 #endif /*   #ifndef  ARM_MATH_BIG_ENDIAN    */
00259
00260     }
00261
00262     /*  The first stage goes from the input buffer to the output buffer.  */
00263     /*  Subsequent (numStages - 1) occur in-place in the output buffer  */
00264     pIn = pDst;
00265
00266     /* Reset the output pointer */
00267     pOut = pDst;
00268
00269     /*  Store the updated state variables back into the state array */
00270     *__SIMD32(pState)++ = state_in;
00271     *__SIMD32(pState)++ = state_out;
00272
00273
00274     /* Decrement the loop counter */
00275     stage--;
00276
00277   } while(stage > 0u);
00278 }
00279
00280
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_biquad_cascade_df1_fast_q31.c
00009 *
00010 * Description:  Processing function for the
00011 *                               Q31 Fast Biquad cascade DirectFormI(DF1) filter.
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 *
00030 * Version 0.0.9  2010/08/27
00031 *    Initial version
00032 *
00033 * -------------------------------------------------------------------- */
00034
00035 #include "arm_math.h"
00036
00070 void arm_biquad_cascade_df1_fast_q31(
00071   const arm_biquad_casd_df1_inst_q31 * S,
00072   q31_t * pSrc,
00073   q31_t * pDst,
00074   uint32_t blockSize)
00075 {
00076   q31_t *pIn = pSrc;                             /*  input pointer initialization  */
00077   q31_t *pOut = pDst;                            /*  output pointer initialization */
00078   q31_t *pState = S->pState;                     /*  pState pointer initialization */
00079   q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
00080   q31_t acc;                                     /*  accumulator                   */
00081   q31_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
00082   q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
00083   q31_t Xn;                                      /*  temporary input               */
00084   int32_t shift = (int32_t) S->postShift + 1;    /*  Shift to be applied to the output */
00085   uint32_t sample, stage = S->numStages;         /*  loop counters                     */
00086
00087
00088   do
00089   {
00090     /* Reading the coefficients */
00091     b0 = *pCoeffs++;
00092     b1 = *pCoeffs++;
00093     b2 = *pCoeffs++;
00094     a1 = *pCoeffs++;
00095     a2 = *pCoeffs++;
00096
00097     /* Reading the state values */
00098     Xn1 = pState[0];
00099     Xn2 = pState[1];
00100     Yn1 = pState[2];
00101     Yn2 = pState[3];
00102
00103     /* Apply loop unrolling and compute 4 output values simultaneously. */
00104     /*      The variables acc ... acc3 hold output values that are being computed:
00105      *
00106      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
00107      */
00108
00109     sample = blockSize >> 2u;
00110
00111     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00112      ** a second loop below computes the remaining 1 to 3 samples. */
00113     while(sample > 0u)
00114     {
00115       /* Read the input */
00116       Xn = *pIn++;
00117
00118       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00119       /* acc =  b0 * x[n] */
00120       acc = (q31_t) (((q63_t) b0 * Xn) >> 32);
00121       /* acc +=  b1 * x[n-1] */
00122       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);
00123       /* acc +=  b[2] * x[n-2] */
00124       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);
00125       /* acc +=  a1 * y[n-1] */
00126       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);
00127       /* acc +=  a2 * y[n-2] */
00128       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);
00129
00130       /* The result is converted to 1.31 , Yn2 variable is reused */
00131       Yn2 = acc << shift;
00132
00133       /* Store the output in the destination buffer. */
00134       *pOut++ = Yn2;
00135
00136       /* Read the second input */
00137       Xn2 = *pIn++;
00138
00139       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00140       /* acc =  b0 * x[n] */
00141       acc = (q31_t) (((q63_t) b0 * (Xn2)) >> 32);
00142       /* acc +=  b1 * x[n-1] */
00143       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn))) >> 32);
00144       /* acc +=  b[2] * x[n-2] */
00145       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn1))) >> 32);
00146       /* acc +=  a1 * y[n-1] */
00147       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);
00148       /* acc +=  a2 * y[n-2] */
00149       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);
00150
00151       /* The result is converted to 1.31, Yn1 variable is reused  */
00152       Yn1 = acc << shift;
00153
00154       /* Store the output in the destination buffer. */
00155       *pOut++ = Yn1;
00156
00157       /* Read the third input  */
00158       Xn1 = *pIn++;
00159
00160       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00161       /* acc =  b0 * x[n] */
00162       acc = (q31_t) (((q63_t) b0 * (Xn1)) >> 32);
00163       /* acc +=  b1 * x[n-1] */
00164       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn2))) >> 32);
00165       /* acc +=  b[2] * x[n-2] */
00166       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn))) >> 32);
00167       /* acc +=  a1 * y[n-1] */
00168       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);
00169       /* acc +=  a2 * y[n-2] */
00170       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);
00171
00172       /* The result is converted to 1.31, Yn2 variable is reused  */
00173       Yn2 = acc << shift;
00174
00175       /* Store the output in the destination buffer. */
00176       *pOut++ = Yn2;
00177
00178       /* Read the forth input */
00179       Xn = *pIn++;
00180
00181       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00182       /* acc =  b0 * x[n] */
00183       acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);
00184       /* acc +=  b1 * x[n-1] */
00185       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);
00186       /* acc +=  b[2] * x[n-2] */
00187       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);
00188       /* acc +=  a1 * y[n-1] */
00189       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);
00190       /* acc +=  a2 * y[n-2] */
00191       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);
00192
00193       /* The result is converted to 1.31, Yn1 variable is reused  */
00194       Yn1 = acc << shift;
00195
00196       /* Every time after the output is computed state should be updated. */
00197       /* The states should be updated as:  */
00198       /* Xn2 = Xn1    */
00199       /* Xn1 = Xn     */
00200       /* Yn2 = Yn1    */
00201       /* Yn1 = acc    */
00202       Xn2 = Xn1;
00203       Xn1 = Xn;
00204
00205       /* Store the output in the destination buffer. */
00206       *pOut++ = Yn1;
00207
00208       /* decrement the loop counter */
00209       sample--;
00210     }
00211
00212     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00213      ** No loop unrolling is used. */
00214     sample = (blockSize & 0x3u);
00215
00216     while(sample > 0u)
00217     {
00218       /* Read the input */
00219       Xn = *pIn++;
00220
00221       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00222       /* acc =  b0 * x[n] */
00223       acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);
00224       /* acc +=  b1 * x[n-1] */
00225       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);
00226       /* acc +=  b[2] * x[n-2] */
00227       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);
00228       /* acc +=  a1 * y[n-1] */
00229       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);
00230       /* acc +=  a2 * y[n-2] */
00231       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);
00232       /* The result is converted to 1.31  */
00233       acc = acc << shift;
00234
00235       /* Every time after the output is computed state should be updated. */
00236       /* The states should be updated as:  */
00237       /* Xn2 = Xn1    */
00238       /* Xn1 = Xn     */
00239       /* Yn2 = Yn1    */
00240       /* Yn1 = acc    */
00241       Xn2 = Xn1;
00242       Xn1 = Xn;
00243       Yn2 = Yn1;
00244       Yn1 = acc;
00245
00246       /* Store the output in the destination buffer. */
00247       *pOut++ = acc;
00248
00249       /* decrement the loop counter */
00250       sample--;
00251     }
00252
00253     /*  The first stage goes from the input buffer to the output buffer. */
00254     /*  Subsequent stages occur in-place in the output buffer */
00255     pIn = pDst;
00256
00257     /* Reset to destination pointer */
00258     pOut = pDst;
00259
00260     /*  Store the updated state variables back into the pState array */
00261     *pState++ = Xn1;
00262     *pState++ = Xn2;
00263     *pState++ = Yn1;
00264     *pState++ = Yn2;
00265
00266   } while(--stage);
00267 }
00268
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_biquad_cascade_df1_init_f32.c
00009 *
00010 * Description:  floating-point Biquad cascade DirectFormI(DF1) filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *        incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * ---------------------------------------------------------------------------*/
00035
00036 #include "arm_math.h"
00037
00083 void arm_biquad_cascade_df1_init_f32(
00084   arm_biquad_casd_df1_inst_f32 * S,
00085   uint8_t numStages,
00086   float32_t * pCoeffs,
00087   float32_t * pState)
00088 {
00089   /* Assign filter stages */
00090   S->numStages = numStages;
00091
00092   /* Assign coefficient pointer */
00093   S->pCoeffs = pCoeffs;
00094
00095   /* Clear state buffer and size is always 4 * numStages */
00096   memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(float32_t));
00097
00098   /* Assign state pointer */
00099   S->pState = pState;
00100 }
00101
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_biquad_cascade_df1_init_q15.c
00009 *
00010 * Description:  Q15 Biquad cascade DirectFormI(DF1) filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *        incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * ---------------------------------------------------------------------------*/
00035
00036 #include "arm_math.h"
00037
00081 void arm_biquad_cascade_df1_init_q15(
00082   arm_biquad_casd_df1_inst_q15 * S,
00083   uint8_t numStages,
00084   q15_t * pCoeffs,
00085   q15_t * pState,
00086   int8_t postShift)
00087 {
00088   /* Assign filter stages */
00089   S->numStages = numStages;
00090
00091   /* Assign postShift to be applied to the output */
00092   S->postShift = postShift;
00093
00094   /* Assign coefficient pointer */
00095   S->pCoeffs = pCoeffs;
00096
00097   /* Clear state buffer and size is always 4 * numStages */
00098   memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q15_t));
00099
00100   /* Assign state pointer */
00101   S->pState = pState;
00102 }
00103
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_biquad_cascade_df1_init_q31.c
00009 *
00010 * Description:  Q31 Biquad cascade DirectFormI(DF1) filter initialization function.
00011 *
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 *
00030 * Version 0.0.5  2010/04/26
00031 *        incorporated review comments and updated with latest CMSIS layer
00032 *
00033 * Version 0.0.3  2010/03/10
00034 *    Initial version
00035 * -------------------------------------------------------------------- */
00036
00037 #include "arm_math.h"
00038
00081 void arm_biquad_cascade_df1_init_q31(
00082   arm_biquad_casd_df1_inst_q31 * S,
00083   uint8_t numStages,
00084   q31_t * pCoeffs,
00085   q31_t * pState,
00086   int8_t postShift)
00087 {
00088   /* Assign filter stages */
00089   S->numStages = numStages;
00090
00091   /* Assign postShift to be applied to the output */
00092   S->postShift = postShift;
00093
00094   /* Assign coefficient pointer */
00095   S->pCoeffs = pCoeffs;
00096
00097   /* Clear state buffer and size is always 4 * numStages */
00098   memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q31_t));
00099
00100   /* Assign state pointer */
00101   S->pState = pState;
00102 }
00103
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_biquad_cascade_df1_q15.c
00009 *
00010 * Description:  Processing function for the
00011 *                               Q15 Biquad cascade DirectFormI(DF1) filter.
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 *
00030 * Version 0.0.5  2010/04/26
00031 *        incorporated review comments and updated with latest CMSIS layer
00032 *
00033 * Version 0.0.3  2010/03/10
00034 *    Initial version
00035 * -------------------------------------------------------------------- */
00036
00037 #include "arm_math.h"
00038
00070 void arm_biquad_cascade_df1_q15(
00071   const arm_biquad_casd_df1_inst_q15 * S,
00072   q15_t * pSrc,
00073   q15_t * pDst,
00074   uint32_t blockSize)
00075 {
00076
00077
00078 #ifndef ARM_MATH_CM0
00079
00080   /* Run the below code for Cortex-M4 and Cortex-M3 */
00081
00082   q15_t *pIn = pSrc;                             /*  Source pointer                               */
00083   q15_t *pOut = pDst;                            /*  Destination pointer                          */
00084   q31_t in;                                      /*  Temporary variable to hold input value       */
00085   q31_t out;                                     /*  Temporary variable to hold output value      */
00086   q31_t b0;                                      /*  Temporary variable to hold bo value          */
00087   q31_t b1, a1;                                  /*  Filter coefficients                          */
00088   q31_t state_in, state_out;                     /*  Filter state variables                       */
00089   q63_t acc;                                     /*  Accumulator                                  */
00090   int32_t shift = (15 - (int32_t) S->postShift); /*  Post shift                                   */
00091   q15_t *pState = S->pState;                     /*  State pointer                                */
00092   q15_t *pCoeffs = S->pCoeffs;                   /*  Coefficient pointer                          */
00093   q31_t *pState_q31;                             /*  32-bit state pointer for SIMD implementation */
00094   uint32_t sample, stage = (uint32_t) S->numStages;     /*  Stage loop counter                           */
00095
00096   do
00097   {
00098     /* Initialize state pointer of type q31 */
00099     pState_q31 = (q31_t *) (pState);
00100
00101     /* Read the b0 and 0 coefficients using SIMD  */
00102     b0 = *__SIMD32(pCoeffs)++;
00103
00104     /* Read the b1 and b2 coefficients using SIMD */
00105     b1 = *__SIMD32(pCoeffs)++;
00106
00107     /* Read the a1 and a2 coefficients using SIMD */
00108     a1 = *__SIMD32(pCoeffs)++;
00109
00110     /* Read the input state values from the state buffer:  x[n-1], x[n-2] */
00111     state_in = (q31_t) (*pState_q31++);
00112
00113     /* Read the output state values from the state buffer:  y[n-1], y[n-2] */
00114     state_out = (q31_t) (*pState_q31);
00115
00116     /* Apply loop unrolling and compute 2 output values simultaneously. */
00117     /*      The variable acc hold output values that are being computed:
00118      *
00119      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
00120      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
00121      */
00122     sample = blockSize >> 1u;
00123
00124     /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.
00125      ** a second loop below computes the remaining 1 sample. */
00126     while(sample > 0u)
00127     {
00128
00129       /* Read the input */
00130       in = *__SIMD32(pIn)++;
00131
00132       /* out =  b0 * x[n] + 0 * 0 */
00133       out = __SMUAD(b0, in);
00134
00135       /* acc +=  b1 * x[n-1] +  b2 * x[n-2] + out */
00136       acc = __SMLALD(b1, state_in, out);
00137       /* acc +=  a1 * y[n-1] +  a2 * y[n-2] */
00138       acc = __SMLALD(a1, state_out, acc);
00139
00140       /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
00141       out = __SSAT((acc >> shift), 16);
00142
00143       /* Every time after the output is computed state should be updated. */
00144       /* The states should be updated as:  */
00145       /* Xn2 = Xn1    */
00146       /* Xn1 = Xn     */
00147       /* Yn2 = Yn1    */
00148       /* Yn1 = acc   */
00149       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
00150       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
00151
00152 #ifndef  ARM_MATH_BIG_ENDIAN
00153
00154       state_in = __PKHBT(in, state_in, 16);
00155       state_out = __PKHBT(out, state_out, 16);
00156
00157 #else
00158
00159       state_in = __PKHBT(state_in >> 16, (in >> 16), 16);
00160       state_out = __PKHBT(state_out >> 16, (out), 16);
00161
00162 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00163
00164       /* out =  b0 * x[n] + 0 * 0 */
00165       out = __SMUADX(b0, in);
00166       /* acc +=  b1 * x[n-1] +  b2 * x[n-2] + out */
00167       acc = __SMLALD(b1, state_in, out);
00168       /* acc +=  a1 * y[n-1] + a2 * y[n-2] */
00169       acc = __SMLALD(a1, state_out, acc);
00170
00171       /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
00172       out = __SSAT((acc >> shift), 16);
00173
00174       /* Store the output in the destination buffer. */
00175
00176 #ifndef  ARM_MATH_BIG_ENDIAN
00177
00178       *__SIMD32(pOut)++ = __PKHBT(state_out, out, 16);
00179
00180 #else
00181
00182       *__SIMD32(pOut)++ = __PKHBT(out, state_out >> 16, 16);
00183
00184 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00185
00186       /* Every time after the output is computed state should be updated. */
00187       /* The states should be updated as:  */
00188       /* Xn2 = Xn1    */
00189       /* Xn1 = Xn     */
00190       /* Yn2 = Yn1    */
00191       /* Yn1 = acc   */
00192       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
00193       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
00194 #ifndef  ARM_MATH_BIG_ENDIAN
00195
00196       state_in = __PKHBT(in >> 16, state_in, 16);
00197       state_out = __PKHBT(out, state_out, 16);
00198
00199 #else
00200
00201       state_in = __PKHBT(state_in >> 16, in, 16);
00202       state_out = __PKHBT(state_out >> 16, out, 16);
00203
00204 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00205
00206
00207       /* Decrement the loop counter */
00208       sample--;
00209
00210     }
00211
00212     /* If the blockSize is not a multiple of 2, compute any remaining output samples here.
00213      ** No loop unrolling is used. */
00214
00215     if((blockSize & 0x1u) != 0u)
00216     {
00217       /* Read the input */
00218       in = *pIn++;
00219
00220       /* out =  b0 * x[n] + 0 * 0 */
00221
00222 #ifndef  ARM_MATH_BIG_ENDIAN
00223
00224       out = __SMUAD(b0, in);
00225
00226 #else
00227
00228       out = __SMUADX(b0, in);
00229
00230 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00231
00232       /* acc =  b1 * x[n-1] + b2 * x[n-2] + out */
00233       acc = __SMLALD(b1, state_in, out);
00234       /* acc +=  a1 * y[n-1] + a2 * y[n-2] */
00235       acc = __SMLALD(a1, state_out, acc);
00236
00237       /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
00238       out = __SSAT((acc >> shift), 16);
00239
00240       /* Store the output in the destination buffer. */
00241       *pOut++ = (q15_t) out;
00242
00243       /* Every time after the output is computed state should be updated. */
00244       /* The states should be updated as:  */
00245       /* Xn2 = Xn1    */
00246       /* Xn1 = Xn     */
00247       /* Yn2 = Yn1    */
00248       /* Yn1 = acc   */
00249       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
00250       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
00251
00252 #ifndef  ARM_MATH_BIG_ENDIAN
00253
00254       state_in = __PKHBT(in, state_in, 16);
00255       state_out = __PKHBT(out, state_out, 16);
00256
00257 #else
00258
00259       state_in = __PKHBT(state_in >> 16, in, 16);
00260       state_out = __PKHBT(state_out >> 16, out, 16);
00261
00262 #endif /*   #ifndef  ARM_MATH_BIG_ENDIAN    */
00263
00264     }
00265
00266     /*  The first stage goes from the input wire to the output wire.  */
00267     /*  Subsequent numStages occur in-place in the output wire  */
00268     pIn = pDst;
00269
00270     /* Reset the output pointer */
00271     pOut = pDst;
00272
00273     /*  Store the updated state variables back into the state array */
00274     *__SIMD32(pState)++ = state_in;
00275     *__SIMD32(pState)++ = state_out;
00276
00277
00278     /* Decrement the loop counter */
00279     stage--;
00280
00281   } while(stage > 0u);
00282
00283 #else
00284
00285   /* Run the below code for Cortex-M0 */
00286
00287   q15_t *pIn = pSrc;                             /*  Source pointer                               */
00288   q15_t *pOut = pDst;                            /*  Destination pointer                          */
00289   q15_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
00290   q15_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
00291   q15_t Xn;                                      /*  temporary input               */
00292   q63_t acc;                                     /*  Accumulator                                  */
00293   int32_t shift = (15 - (int32_t) S->postShift); /*  Post shift                                   */
00294   q15_t *pState = S->pState;                     /*  State pointer                                */
00295   q15_t *pCoeffs = S->pCoeffs;                   /*  Coefficient pointer                          */
00296   uint32_t sample, stage = (uint32_t) S->numStages;     /*  Stage loop counter                           */
00297
00298   do
00299   {
00300     /* Reading the coefficients */
00301     b0 = *pCoeffs++;
00302     b1 = *pCoeffs++;
00303     b2 = *pCoeffs++;
00304     a1 = *pCoeffs++;
00305     a2 = *pCoeffs++;
00306
00307     /* Reading the state values */
00308     Xn1 = pState[0];
00309     Xn2 = pState[1];
00310     Yn1 = pState[2];
00311     Yn2 = pState[3];
00312
00313     /*      The variables acc holds the output value that is computed:
00314      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
00315      */
00316
00317     sample = blockSize;
00318
00319     while(sample > 0u)
00320     {
00321       /* Read the input */
00322       Xn = *pIn++;
00323
00324       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00325       /* acc =  b0 * x[n] */
00326       acc = (q31_t) b0 *Xn;
00327
00328       /* acc +=  b1 * x[n-1] */
00329       acc += (q31_t) b1 *Xn1;
00330       /* acc +=  b[2] * x[n-2] */
00331       acc += (q31_t) b2 *Xn2;
00332       /* acc +=  a1 * y[n-1] */
00333       acc += (q31_t) a1 *Yn1;
00334       /* acc +=  a2 * y[n-2] */
00335       acc += (q31_t) a2 *Yn2;
00336
00337       /* The result is converted to 1.31  */
00338       acc = __SSAT((acc >> shift), 16);
00339
00340       /* Every time after the output is computed state should be updated. */
00341       /* The states should be updated as:  */
00342       /* Xn2 = Xn1    */
00343       /* Xn1 = Xn     */
00344       /* Yn2 = Yn1    */
00345       /* Yn1 = acc    */
00346       Xn2 = Xn1;
00347       Xn1 = Xn;
00348       Yn2 = Yn1;
00349       Yn1 = (q15_t) acc;
00350
00351       /* Store the output in the destination buffer. */
00352       *pOut++ = (q15_t) acc;
00353
00354       /* decrement the loop counter */
00355       sample--;
00356     }
00357
00358     /*  The first stage goes from the input buffer to the output buffer. */
00359     /*  Subsequent stages occur in-place in the output buffer */
00360     pIn = pDst;
00361
00362     /* Reset to destination pointer */
00363     pOut = pDst;
00364
00365     /*  Store the updated state variables back into the pState array */
00366     *pState++ = Xn1;
00367     *pState++ = Xn2;
00368     *pState++ = Yn1;
00369     *pState++ = Yn2;
00370
00371   } while(--stage);
00372
00373 #endif /*     #ifndef ARM_MATH_CM0 */
00374
00375 }
00376
00377
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_biquad_cascade_df1_q31.c
00009 *
00010 * Description:  Processing function for the
00011 *                               Q31 Biquad cascade filter
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 *
00030 * Version 0.0.5  2010/04/26
00031 *        incorporated review comments and updated with latest CMSIS layer
00032 *
00033 * Version 0.0.3  2010/03/10
00034 *    Initial version
00035 * -------------------------------------------------------------------- */
00036
00037 #include "arm_math.h"
00038
00069 void arm_biquad_cascade_df1_q31(
00070   const arm_biquad_casd_df1_inst_q31 * S,
00071   q31_t * pSrc,
00072   q31_t * pDst,
00073   uint32_t blockSize)
00074 {
00075   q31_t *pIn = pSrc;                             /*  input pointer initialization  */
00076   q31_t *pOut = pDst;                            /*  output pointer initialization */
00077   q31_t *pState = S->pState;                     /*  pState pointer initialization */
00078   q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
00079   q63_t acc;                                     /*  accumulator                   */
00080   q31_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
00081   q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
00082   q31_t Xn;                                      /*  temporary input               */
00083   uint32_t shift = 32u - ((uint32_t) S->postShift + 1u);        /*  Shift to be applied to the output */
00084   uint32_t sample, stage = S->numStages;         /*  loop counters                     */
00085
00086
00087 #ifndef ARM_MATH_CM0
00088
00089   /* Run the below code for Cortex-M4 and Cortex-M3 */
00090
00091   do
00092   {
00093     /* Reading the coefficients */
00094     b0 = *pCoeffs++;
00095     b1 = *pCoeffs++;
00096     b2 = *pCoeffs++;
00097     a1 = *pCoeffs++;
00098     a2 = *pCoeffs++;
00099
00100     /* Reading the state values */
00101     Xn1 = pState[0];
00102     Xn2 = pState[1];
00103     Yn1 = pState[2];
00104     Yn2 = pState[3];
00105
00106     /* Apply loop unrolling and compute 4 output values simultaneously. */
00107     /*      The variable acc hold output values that are being computed:
00108      *
00109      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
00110      */
00111
00112     sample = blockSize >> 2u;
00113
00114     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00115      ** a second loop below computes the remaining 1 to 3 samples. */
00116     while(sample > 0u)
00117     {
00118       /* Read the input */
00119       Xn = *pIn++;
00120
00121       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00122
00123       /* acc =  b0 * x[n] */
00124       acc = (q63_t) b0 *Xn;
00125       /* acc +=  b1 * x[n-1] */
00126       acc += (q63_t) b1 *Xn1;
00127       /* acc +=  b[2] * x[n-2] */
00128       acc += (q63_t) b2 *Xn2;
00129       /* acc +=  a1 * y[n-1] */
00130       acc += (q63_t) a1 *Yn1;
00131       /* acc +=  a2 * y[n-2] */
00132       acc += (q63_t) a2 *Yn2;
00133
00134       /* The result is converted to 1.31 , Yn2 variable is reused */
00135       Yn2 = (q31_t) (acc >> shift);
00136
00137       /* Store the output in the destination buffer. */
00138       *pOut++ = Yn2;
00139
00140       /* Read the second input */
00141       Xn2 = *pIn++;
00142
00143       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00144
00145       /* acc =  b0 * x[n] */
00146       acc = (q63_t) b0 *Xn2;
00147       /* acc +=  b1 * x[n-1] */
00148       acc += (q63_t) b1 *Xn;
00149       /* acc +=  b[2] * x[n-2] */
00150       acc += (q63_t) b2 *Xn1;
00151       /* acc +=  a1 * y[n-1] */
00152       acc += (q63_t) a1 *Yn2;
00153       /* acc +=  a2 * y[n-2] */
00154       acc += (q63_t) a2 *Yn1;
00155
00156
00157       /* The result is converted to 1.31, Yn1 variable is reused  */
00158       Yn1 = (q31_t) (acc >> shift);
00159
00160       /* Store the output in the destination buffer. */
00161       *pOut++ = Yn1;
00162
00163       /* Read the third input  */
00164       Xn1 = *pIn++;
00165
00166       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00167
00168       /* acc =  b0 * x[n] */
00169       acc = (q63_t) b0 *Xn1;
00170       /* acc +=  b1 * x[n-1] */
00171       acc += (q63_t) b1 *Xn2;
00172       /* acc +=  b[2] * x[n-2] */
00173       acc += (q63_t) b2 *Xn;
00174       /* acc +=  a1 * y[n-1] */
00175       acc += (q63_t) a1 *Yn1;
00176       /* acc +=  a2 * y[n-2] */
00177       acc += (q63_t) a2 *Yn2;
00178
00179       /* The result is converted to 1.31, Yn2 variable is reused  */
00180       Yn2 = (q31_t) (acc >> shift);
00181
00182       /* Store the output in the destination buffer. */
00183       *pOut++ = Yn2;
00184
00185       /* Read the forth input */
00186       Xn = *pIn++;
00187
00188       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00189
00190       /* acc =  b0 * x[n] */
00191       acc = (q63_t) b0 *Xn;
00192       /* acc +=  b1 * x[n-1] */
00193       acc += (q63_t) b1 *Xn1;
00194       /* acc +=  b[2] * x[n-2] */
00195       acc += (q63_t) b2 *Xn2;
00196       /* acc +=  a1 * y[n-1] */
00197       acc += (q63_t) a1 *Yn2;
00198       /* acc +=  a2 * y[n-2] */
00199       acc += (q63_t) a2 *Yn1;
00200
00201       /* The result is converted to 1.31, Yn1 variable is reused  */
00202       Yn1 = (q31_t) (acc >> shift);
00203
00204       /* Every time after the output is computed state should be updated. */
00205       /* The states should be updated as:  */
00206       /* Xn2 = Xn1    */
00207       /* Xn1 = Xn     */
00208       /* Yn2 = Yn1    */
00209       /* Yn1 = acc    */
00210       Xn2 = Xn1;
00211       Xn1 = Xn;
00212
00213       /* Store the output in the destination buffer. */
00214       *pOut++ = Yn1;
00215
00216       /* decrement the loop counter */
00217       sample--;
00218     }
00219
00220     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00221      ** No loop unrolling is used. */
00222     sample = (blockSize & 0x3u);
00223
00224     while(sample > 0u)
00225     {
00226       /* Read the input */
00227       Xn = *pIn++;
00228
00229       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00230
00231       /* acc =  b0 * x[n] */
00232       acc = (q63_t) b0 *Xn;
00233       /* acc +=  b1 * x[n-1] */
00234       acc += (q63_t) b1 *Xn1;
00235       /* acc +=  b[2] * x[n-2] */
00236       acc += (q63_t) b2 *Xn2;
00237       /* acc +=  a1 * y[n-1] */
00238       acc += (q63_t) a1 *Yn1;
00239       /* acc +=  a2 * y[n-2] */
00240       acc += (q63_t) a2 *Yn2;
00241
00242       /* The result is converted to 1.31  */
00243       acc = acc >> shift;
00244
00245       /* Every time after the output is computed state should be updated. */
00246       /* The states should be updated as:  */
00247       /* Xn2 = Xn1    */
00248       /* Xn1 = Xn     */
00249       /* Yn2 = Yn1    */
00250       /* Yn1 = acc    */
00251       Xn2 = Xn1;
00252       Xn1 = Xn;
00253       Yn2 = Yn1;
00254       Yn1 = (q31_t) acc;
00255
00256       /* Store the output in the destination buffer. */
00257       *pOut++ = (q31_t) acc;
00258
00259       /* decrement the loop counter */
00260       sample--;
00261     }
00262
00263     /*  The first stage goes from the input buffer to the output buffer. */
00264     /*  Subsequent stages occur in-place in the output buffer */
00265     pIn = pDst;
00266
00267     /* Reset to destination pointer */
00268     pOut = pDst;
00269
00270     /*  Store the updated state variables back into the pState array */
00271     *pState++ = Xn1;
00272     *pState++ = Xn2;
00273     *pState++ = Yn1;
00274     *pState++ = Yn2;
00275
00276   } while(--stage);
00277
00278 #else
00279
00280   /* Run the below code for Cortex-M0 */
00281
00282   do
00283   {
00284     /* Reading the coefficients */
00285     b0 = *pCoeffs++;
00286     b1 = *pCoeffs++;
00287     b2 = *pCoeffs++;
00288     a1 = *pCoeffs++;
00289     a2 = *pCoeffs++;
00290
00291     /* Reading the state values */
00292     Xn1 = pState[0];
00293     Xn2 = pState[1];
00294     Yn1 = pState[2];
00295     Yn2 = pState[3];
00296
00297     /*      The variables acc holds the output value that is computed:
00298      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
00299      */
00300
00301     sample = blockSize;
00302
00303     while(sample > 0u)
00304     {
00305       /* Read the input */
00306       Xn = *pIn++;
00307
00308       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00309       /* acc =  b0 * x[n] */
00310       acc = (q63_t) b0 *Xn;
00311
00312       /* acc +=  b1 * x[n-1] */
00313       acc += (q63_t) b1 *Xn1;
00314       /* acc +=  b[2] * x[n-2] */
00315       acc += (q63_t) b2 *Xn2;
00316       /* acc +=  a1 * y[n-1] */
00317       acc += (q63_t) a1 *Yn1;
00318       /* acc +=  a2 * y[n-2] */
00319       acc += (q63_t) a2 *Yn2;
00320
00321       /* The result is converted to 1.31  */
00322       acc = acc >> shift;
00323
00324       /* Every time after the output is computed state should be updated. */
00325       /* The states should be updated as:  */
00326       /* Xn2 = Xn1    */
00327       /* Xn1 = Xn     */
00328       /* Yn2 = Yn1    */
00329       /* Yn1 = acc    */
00330       Xn2 = Xn1;
00331       Xn1 = Xn;
00332       Yn2 = Yn1;
00333       Yn1 = (q31_t) acc;
00334
00335       /* Store the output in the destination buffer. */
00336       *pOut++ = (q31_t) acc;
00337
00338       /* decrement the loop counter */
00339       sample--;
00340     }
00341
00342     /*  The first stage goes from the input buffer to the output buffer. */
00343     /*  Subsequent stages occur in-place in the output buffer */
00344     pIn = pDst;
00345
00346     /* Reset to destination pointer */
00347     pOut = pDst;
00348
00349     /*  Store the updated state variables back into the pState array */
00350     *pState++ = Xn1;
00351     *pState++ = Xn2;
00352     *pState++ = Yn1;
00353     *pState++ = Yn2;
00354
00355   } while(--stage);
00356
00357 #endif /*  #ifndef ARM_MATH_CM0 */
00358 }
00359
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_biquad_cascade_df2T_f32.c
00009 *
00010 * Description:  Processing function for the floating-point transposed
00011 *               direct form II Biquad cascade filter.
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated
00029 *
00030 * Version 0.0.7  2010/06/10
00031 *    Misra-C changes done
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00143 void arm_biquad_cascade_df2T_f32(
00144   const arm_biquad_cascade_df2T_instance_f32 * S,
00145   float32_t * pSrc,
00146   float32_t * pDst,
00147   uint32_t blockSize)
00148 {
00149
00150   float32_t *pIn = pSrc;                         /*  source pointer            */
00151   float32_t *pOut = pDst;                        /*  destination pointer       */
00152   float32_t *pState = S->pState;                 /*  State pointer            */
00153   float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
00154   float32_t acc0;                                /*  Simulates the accumulator */
00155   float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
00156   float32_t Xn;                                  /*  temporary input           */
00157   float32_t d1, d2;                              /*  state variables          */
00158   uint32_t sample, stage = S->numStages;         /*  loop counters             */
00159
00160
00161 #ifndef ARM_MATH_CM0
00162
00163   /* Run the below code for Cortex-M4 and Cortex-M3 */
00164
00165   do
00166   {
00167     /* Reading the coefficients */
00168     b0 = *pCoeffs++;
00169     b1 = *pCoeffs++;
00170     b2 = *pCoeffs++;
00171     a1 = *pCoeffs++;
00172     a2 = *pCoeffs++;
00173
00174     /*Reading the state values */
00175     d1 = pState[0];
00176     d2 = pState[1];
00177
00178     /* Apply loop unrolling and compute 4 output values simultaneously. */
00179     sample = blockSize >> 2u;
00180
00181     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00182      ** a second loop below computes the remaining 1 to 3 samples. */
00183     while(sample > 0u)
00184     {
00185       /* Read the first input */
00186       Xn = *pIn++;
00187
00188       /* y[n] = b0 * x[n] + d1 */
00189       acc0 = (b0 * Xn) + d1;
00190
00191       /* Store the result in the accumulator in the destination buffer. */
00192       *pOut++ = acc0;
00193
00194       /* Every time after the output is computed state should be updated. */
00195       /* d1 = b1 * x[n] + a1 * y[n] + d2 */
00196       d1 = ((b1 * Xn) + (a1 * acc0)) + d2;
00197
00198       /* d2 = b2 * x[n] + a2 * y[n] */
00199       d2 = (b2 * Xn) + (a2 * acc0);
00200
00201       /* Read the second input */
00202       Xn = *pIn++;
00203
00204       /* y[n] = b0 * x[n] + d1 */
00205       acc0 = (b0 * Xn) + d1;
00206
00207       /* Store the result in the accumulator in the destination buffer. */
00208       *pOut++ = acc0;
00209
00210       /* Every time after the output is computed state should be updated. */
00211       /* d1 = b1 * x[n] + a1 * y[n] + d2 */
00212       d1 = ((b1 * Xn) + (a1 * acc0)) + d2;
00213
00214       /* d2 = b2 * x[n] + a2 * y[n] */
00215       d2 = (b2 * Xn) + (a2 * acc0);
00216
00217       /* Read the third input */
00218       Xn = *pIn++;
00219
00220       /* y[n] = b0 * x[n] + d1 */
00221       acc0 = (b0 * Xn) + d1;
00222
00223       /* Store the result in the accumulator in the destination buffer. */
00224       *pOut++ = acc0;
00225
00226       /* Every time after the output is computed state should be updated. */
00227       /* d1 = b1 * x[n] + a1 * y[n] + d2 */
00228       d1 = ((b1 * Xn) + (a1 * acc0)) + d2;
00229
00230       /* d2 = b2 * x[n] + a2 * y[n] */
00231       d2 = (b2 * Xn) + (a2 * acc0);
00232
00233       /* Read the fourth input */
00234       Xn = *pIn++;
00235
00236       /* y[n] = b0 * x[n] + d1 */
00237       acc0 = (b0 * Xn) + d1;
00238
00239       /* Store the result in the accumulator in the destination buffer. */
00240       *pOut++ = acc0;
00241
00242       /* Every time after the output is computed state should be updated. */
00243       /* d1 = b1 * x[n] + a1 * y[n] + d2 */
00244       d1 = (b1 * Xn) + (a1 * acc0) + d2;
00245
00246       /* d2 = b2 * x[n] + a2 * y[n] */
00247       d2 = (b2 * Xn) + (a2 * acc0);
00248
00249       /* decrement the loop counter */
00250       sample--;
00251
00252     }
00253
00254     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00255      ** No loop unrolling is used. */
00256     sample = blockSize & 0x3u;
00257
00258     while(sample > 0u)
00259     {
00260       /* Read the input */
00261       Xn = *pIn++;
00262
00263       /* y[n] = b0 * x[n] + d1 */
00264       acc0 = (b0 * Xn) + d1;
00265
00266       /* Store the result in the accumulator in the destination buffer. */
00267       *pOut++ = acc0;
00268
00269       /* Every time after the output is computed state should be updated. */
00270       /* d1 = b1 * x[n] + a1 * y[n] + d2 */
00271       d1 = ((b1 * Xn) + (a1 * acc0)) + d2;
00272
00273       /* d2 = b2 * x[n] + a2 * y[n] */
00274       d2 = (b2 * Xn) + (a2 * acc0);
00275
00276       /* decrement the loop counter */
00277       sample--;
00278     }
00279
00280     /* Store the updated state variables back into the state array */
00281     *pState++ = d1;
00282     *pState++ = d2;
00283
00284     /* The current stage input is given as the output to the next stage */
00285     pIn = pDst;
00286
00287     /*Reset the output working pointer */
00288     pOut = pDst;
00289
00290     /* decrement the loop counter */
00291     stage--;
00292
00293   } while(stage > 0u);
00294
00295 #else
00296
00297   /* Run the below code for Cortex-M0 */
00298
00299   do
00300   {
00301     /* Reading the coefficients */
00302     b0 = *pCoeffs++;
00303     b1 = *pCoeffs++;
00304     b2 = *pCoeffs++;
00305     a1 = *pCoeffs++;
00306     a2 = *pCoeffs++;
00307
00308     /*Reading the state values */
00309     d1 = pState[0];
00310     d2 = pState[1];
00311
00312
00313     sample = blockSize;
00314
00315     while(sample > 0u)
00316     {
00317       /* Read the input */
00318       Xn = *pIn++;
00319
00320       /* y[n] = b0 * x[n] + d1 */
00321       acc0 = (b0 * Xn) + d1;
00322
00323       /* Store the result in the accumulator in the destination buffer. */
00324       *pOut++ = acc0;
00325
00326       /* Every time after the output is computed state should be updated. */
00327       /* d1 = b1 * x[n] + a1 * y[n] + d2 */
00328       d1 = ((b1 * Xn) + (a1 * acc0)) + d2;
00329
00330       /* d2 = b2 * x[n] + a2 * y[n] */
00331       d2 = (b2 * Xn) + (a2 * acc0);
00332
00333       /* decrement the loop counter */
00334       sample--;
00335     }
00336
00337     /* Store the updated state variables back into the state array */
00338     *pState++ = d1;
00339     *pState++ = d2;
00340
00341     /* The current stage input is given as the output to the next stage */
00342     pIn = pDst;
00343
00344     /*Reset the output working pointer */
00345     pOut = pDst;
00346
00347     /* decrement the loop counter */
00348     stage--;
00349
00350   } while(stage > 0u);
00351
00352 #endif /*  #ifndef ARM_MATH_CM0         */
00353
00354 }
00355
00356
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_biquad_cascade_df2T_init_f32.c
00009 *
00010 * Description:  Initialization function for the floating-point transposed
00011 *               direct form II Biquad cascade filter.
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated
00029 *
00030 * Version 0.0.7  2010/06/10
00031 *    Misra-C changes done
00032 * ---------------------------------------------------------------------------*/
00033
00034 #include "arm_math.h"
00035
00073 void arm_biquad_cascade_df2T_init_f32(
00074   arm_biquad_cascade_df2T_instance_f32 * S,
00075   uint8_t numStages,
00076   float32_t * pCoeffs,
00077   float32_t * pState)
00078 {
00079   /* Assign filter stages */
00080   S->numStages = numStages;
00081
00082   /* Assign coefficient pointer */
00083   S->pCoeffs = pCoeffs;
00084
00085   /* Clear state buffer and size is always 2 * numStages */
00086   memset(pState, 0, (2u * (uint32_t) numStages) * sizeof(float32_t));
00087
00088   /* Assign state pointer */
00089   S->pState = pState;
00090 }
00091
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c
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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_cfft_radix4_f32.c
00009 *
00010 * Description:  Radix-4 Decimation in Frequency CFFT & CIFFT Floating point processing function
00011 *
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 *
00030 * Version 0.0.5  2010/04/26
00031 *        incorporated review comments and updated with latest CMSIS layer
00032 *
00033 * Version 0.0.3  2010/03/10
00034 *    Initial version
00035 * -------------------------------------------------------------------- */
00036
00037 #include "arm_math.h"
00038
00177 void arm_cfft_radix4_f32(
00178   const arm_cfft_radix4_instance_f32 * S,
00179   float32_t * pSrc)
00180 {
00181
00182   if(S->ifftFlag == 1u)
00183   {
00184     /*  Complex IFFT radix-4  */
00185     arm_radix4_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle,
00186                                      S->twidCoefModifier, S->onebyfftLen);
00187   }
00188   else
00189   {
00190     /*  Complex FFT radix-4  */
00191     arm_radix4_butterfly_f32(pSrc, S->fftLen, S->pTwiddle,
00192                              S->twidCoefModifier);
00193   }
00194
00195   if(S->bitReverseFlag == 1u)
00196   {
00197     /*  Bit Reversal */
00198     arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
00199   }
00200
00201 }
00202
00203
00210 /* ----------------------------------------------------------------------
00211 ** Internal helper function used by the FFTs
00212 ** ------------------------------------------------------------------- */
00213
00214 /*
00215  * @brief  Core function for the floating-point CFFT butterfly process.
00216  * @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.
00217  * @param[in]      fftLen           length of the FFT.
00218  * @param[in]      *pCoef           points to the twiddle coefficient buffer.
00219  * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
00220  * @return none.
00221  */
00222
00223 void arm_radix4_butterfly_f32(
00224   float32_t * pSrc,
00225   uint16_t fftLen,
00226   float32_t * pCoef,
00227   uint16_t twidCoefModifier)
00228 {
00229
00230   float32_t co1, co2, co3, si1, si2, si3;
00231   float32_t t1, t2, r1, r2, s1, s2;
00232   uint32_t ia1, ia2, ia3;
00233   uint32_t i0, i1, i2, i3;
00234   uint32_t n1, n2, j, k;
00235
00236 #ifndef ARM_MATH_CM0
00237
00238   /* Run the below code for Cortex-M4 and Cortex-M3 */
00239
00240   /*  Initializations for the first stage */
00241   n2 = fftLen;
00242   n1 = n2;
00243
00244   /* n2 = fftLen/4 */
00245   n2 >>= 2u;
00246   i0 = 0u;
00247   ia1 = 0u;
00248
00249   j = n2;
00250
00251   /*  Calculation of first stage */
00252   do
00253   {
00254     /*  index calculation for the input as, */
00255     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
00256     i1 = i0 + n2;
00257     i2 = i1 + n2;
00258     i3 = i2 + n2;
00259
00260     /*  Butterfly implementation */
00261
00262     /* xa + xc */
00263     r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
00264
00265     /* xa - xc */
00266     r2 = pSrc[2u * i0] - pSrc[2u * i2];
00267
00268     /* ya + yc */
00269     s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00270
00271     /* ya - yc */
00272     s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00273
00274     /* xb + xd */
00275     t1 = pSrc[2u * i1] + pSrc[2u * i3];
00276
00277     /* xa' = xa + xb + xc + xd */
00278     pSrc[2u * i0] = r1 + t1;
00279
00280     /* (xa + xc) - (xb + xd) */
00281     r1 = r1 - t1;
00282
00283     /* yb + yd */
00284     t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00285
00286     /* ya' = ya + yb + yc + yd */
00287     pSrc[(2u * i0) + 1u] = s1 + t2;
00288
00289     /* (ya + yc) - (yb + yd) */
00290     s1 = s1 - t2;
00291
00292     /* yb - yd */
00293     t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00294
00295     /* xb - xd */
00296     t2 = pSrc[2u * i1] - pSrc[2u * i3];
00297
00298     /*  index calculation for the coefficients */
00299     ia2 = ia1 + ia1;
00300     co2 = pCoef[ia2 * 2u];
00301     si2 = pCoef[(ia2 * 2u) + 1u];
00302
00303     /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
00304     pSrc[2u * i1] = (r1 * co2) + (s1 * si2);
00305
00306     /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
00307     pSrc[(2u * i1) + 1u] = (s1 * co2) - (r1 * si2);
00308
00309     /* (xa - xc) + (yb - yd) */
00310     r1 = r2 + t1;
00311
00312     /* (xa - xc) - (yb - yd) */
00313     r2 = r2 - t1;
00314
00315     /* (ya - yc) - (xb - xd) */
00316     s1 = s2 - t2;
00317
00318     /* (ya - yc) + (xb - xd) */
00319     s2 = s2 + t2;
00320
00321     co1 = pCoef[ia1 * 2u];
00322     si1 = pCoef[(ia1 * 2u) + 1u];
00323
00324     /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
00325     pSrc[2u * i2] = (r1 * co1) + (s1 * si1);
00326
00327     /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
00328     pSrc[(2u * i2) + 1u] = (s1 * co1) - (r1 * si1);
00329
00330     /*  index calculation for the coefficients */
00331     ia3 = ia2 + ia1;
00332     co3 = pCoef[ia3 * 2u];
00333     si3 = pCoef[(ia3 * 2u) + 1u];
00334
00335
00336     /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
00337     pSrc[2u * i3] = (r2 * co3) + (s2 * si3);
00338
00339     /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
00340     pSrc[(2u * i3) + 1u] = (s2 * co3) - (r2 * si3);
00341
00342     /*  Twiddle coefficients index modifier */
00343     ia1 = ia1 + twidCoefModifier;
00344
00345     /*  Updating input index */
00346     i0 = i0 + 1u;
00347
00348   }
00349   while(--j);
00350
00351   twidCoefModifier <<= 2u;
00352
00353   /*  Calculation of second stage to excluding last stage */
00354   for (k = fftLen / 4; k > 4u; k >>= 2u)
00355   {
00356     /*  Initializations for the first stage */
00357     n1 = n2;
00358     n2 >>= 2u;
00359     ia1 = 0u;
00360
00361     /*  Calculation of first stage */
00362     for (j = 0u; j <= (n2 - 1u); j++)
00363     {
00364       /*  index calculation for the coefficients */
00365       ia2 = ia1 + ia1;
00366       ia3 = ia2 + ia1;
00367       co1 = pCoef[ia1 * 2u];
00368       si1 = pCoef[(ia1 * 2u) + 1u];
00369       co2 = pCoef[ia2 * 2u];
00370       si2 = pCoef[(ia2 * 2u) + 1u];
00371       co3 = pCoef[ia3 * 2u];
00372       si3 = pCoef[(ia3 * 2u) + 1u];
00373
00374       /*  Twiddle coefficients index modifier */
00375       ia1 = ia1 + twidCoefModifier;
00376
00377       for (i0 = j; i0 < fftLen; i0 += n1)
00378       {
00379         /*  index calculation for the input as, */
00380         /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
00381         i1 = i0 + n2;
00382         i2 = i1 + n2;
00383         i3 = i2 + n2;
00384
00385         /* xa + xc */
00386         r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
00387
00388         /* xa - xc */
00389         r2 = pSrc[(2u * i0)] - pSrc[(2u * i2)];
00390
00391         /* ya + yc */
00392         s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00393
00394         /* ya - yc */
00395         s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00396
00397         /* xb + xd */
00398         t1 = pSrc[2u * i1] + pSrc[2u * i3];
00399
00400         /* xa' = xa + xb + xc + xd */
00401         pSrc[2u * i0] = r1 + t1;
00402
00403         /* xa + xc -(xb + xd) */
00404         r1 = r1 - t1;
00405
00406         /* yb + yd */
00407         t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00408
00409         /* ya' = ya + yb + yc + yd */
00410         pSrc[(2u * i0) + 1u] = s1 + t2;
00411
00412         /* (ya + yc) - (yb + yd) */
00413         s1 = s1 - t2;
00414
00415         /* (yb - yd) */
00416         t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00417
00418         /* (xb - xd) */
00419         t2 = pSrc[2u * i1] - pSrc[2u * i3];
00420
00421         /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
00422         pSrc[2u * i1] = (r1 * co2) + (s1 * si2);
00423
00424         /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
00425         pSrc[(2u * i1) + 1u] = (s1 * co2) - (r1 * si2);
00426
00427         /* (xa - xc) + (yb - yd) */
00428         r1 = r2 + t1;
00429
00430         /* (xa - xc) - (yb - yd) */
00431         r2 = r2 - t1;
00432
00433         /* (ya - yc) -  (xb - xd) */
00434         s1 = s2 - t2;
00435
00436         /* (ya - yc) +  (xb - xd) */
00437         s2 = s2 + t2;
00438
00439         /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
00440         pSrc[2u * i2] = (r1 * co1) + (s1 * si1);
00441
00442         /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
00443         pSrc[(2u * i2) + 1u] = (s1 * co1) - (r1 * si1);
00444
00445         /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
00446         pSrc[2u * i3] = (r2 * co3) + (s2 * si3);
00447
00448         /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
00449         pSrc[(2u * i3) + 1u] = (s2 * co3) - (r2 * si3);
00450       }
00451     }
00452     twidCoefModifier <<= 2u;
00453   }
00454
00455   /*  Initializations of last stage */
00456   n1 = n2;
00457   n2 >>= 2u;
00458
00459   /*  Calculations of last stage */
00460   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
00461   {
00462     /*  index calculation for the input as, */
00463     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
00464     i1 = i0 + n2;
00465     i2 = i1 + n2;
00466     i3 = i2 + n2;
00467
00468     /*  Butterfly implementation */
00469
00470     /* xa + xb */
00471     r1 = pSrc[2u * i0] + pSrc[2u * i2];
00472
00473     /* xa - xb */
00474     r2 = pSrc[2u * i0] - pSrc[2u * i2];
00475
00476     /* ya + yc */
00477     s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00478
00479     /* ya - yc */
00480     s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00481
00482     /* xc + xd */
00483     t1 = pSrc[2u * i1] + pSrc[2u * i3];
00484
00485     /* xa' = xa + xb + xc + xd */
00486     pSrc[2u * i0] = r1 + t1;
00487
00488     /* (xa + xb) - (xc + xd) */
00489     r1 = r1 - t1;
00490
00491     /* yb + yd */
00492     t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00493
00494     /* ya' = ya + yb + yc + yd */
00495     pSrc[(2u * i0) + 1u] = s1 + t2;
00496
00497     /* (ya + yc) - (yb + yd) */
00498     s1 = s1 - t2;
00499
00500     /* (yb-yd) */
00501     t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00502
00503     /* (xb-xd) */
00504     t2 = pSrc[2u * i1] - pSrc[2u * i3];
00505
00506     /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
00507     pSrc[2u * i1] = r1;
00508
00509     /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
00510     pSrc[(2u * i1) + 1u] = s1;
00511
00512     /* (xa+yb-xc-yd) */
00513     r1 = r2 + t1;
00514
00515     /* (xa-yb-xc+yd) */
00516     r2 = r2 - t1;
00517
00518     /* (ya-xb-yc+xd) */
00519     s1 = s2 - t2;
00520
00521     /* (ya+xb-yc-xd) */
00522     s2 = s2 + t2;
00523
00524     /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
00525     pSrc[2u * i2] = r1;
00526
00527     /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
00528     pSrc[(2u * i2) + 1u] = s1;
00529
00530     /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
00531     pSrc[2u * i3] = r2;
00532
00533     /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
00534     pSrc[(2u * i3) + 1u] = s2;
00535   }
00536
00537
00538 #else
00539
00540   /* Run the below code for Cortex-M0 */
00541
00542   /*  Initializations for the fft calculation */
00543   n2 = fftLen;
00544   n1 = n2;
00545   for (k = fftLen; k > 1u; k >>= 2u)
00546   {
00547     /*  Initializations for the fft calculation */
00548     n1 = n2;
00549     n2 >>= 2u;
00550     ia1 = 0u;
00551
00552     /*  FFT Calculation */
00553     for (j = 0u; j <= (n2 - 1u); j++)
00554     {
00555       /*  index calculation for the coefficients */
00556       ia2 = ia1 + ia1;
00557       ia3 = ia2 + ia1;
00558       co1 = pCoef[ia1 * 2u];
00559       si1 = pCoef[(ia1 * 2u) + 1u];
00560       co2 = pCoef[ia2 * 2u];
00561       si2 = pCoef[(ia2 * 2u) + 1u];
00562       co3 = pCoef[ia3 * 2u];
00563       si3 = pCoef[(ia3 * 2u) + 1u];
00564
00565       /*  Twiddle coefficients index modifier */
00566       ia1 = ia1 + twidCoefModifier;
00567
00568       for (i0 = j; i0 < fftLen; i0 += n1)
00569       {
00570         /*  index calculation for the input as, */
00571         /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
00572         i1 = i0 + n2;
00573         i2 = i1 + n2;
00574         i3 = i2 + n2;
00575
00576         /* xa + xc */
00577         r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
00578
00579         /* xa - xc */
00580         r2 = pSrc[(2u * i0)] - pSrc[(2u * i2)];
00581
00582         /* ya + yc */
00583         s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00584
00585         /* ya - yc */
00586         s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00587
00588         /* xb + xd */
00589         t1 = pSrc[2u * i1] + pSrc[2u * i3];
00590
00591         /* xa' = xa + xb + xc + xd */
00592         pSrc[2u * i0] = r1 + t1;
00593
00594         /* xa + xc -(xb + xd) */
00595         r1 = r1 - t1;
00596
00597         /* yb + yd */
00598         t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00599
00600         /* ya' = ya + yb + yc + yd */
00601         pSrc[(2u * i0) + 1u] = s1 + t2;
00602
00603         /* (ya + yc) - (yb + yd) */
00604         s1 = s1 - t2;
00605
00606         /* (yb - yd) */
00607         t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00608
00609         /* (xb - xd) */
00610         t2 = pSrc[2u * i1] - pSrc[2u * i3];
00611
00612         /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
00613         pSrc[2u * i1] = (r1 * co2) + (s1 * si2);
00614
00615         /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
00616         pSrc[(2u * i1) + 1u] = (s1 * co2) - (r1 * si2);
00617
00618         /* (xa - xc) + (yb - yd) */
00619         r1 = r2 + t1;
00620
00621         /* (xa - xc) - (yb - yd) */
00622         r2 = r2 - t1;
00623
00624         /* (ya - yc) -  (xb - xd) */
00625         s1 = s2 - t2;
00626
00627         /* (ya - yc) +  (xb - xd) */
00628         s2 = s2 + t2;
00629
00630         /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
00631         pSrc[2u * i2] = (r1 * co1) + (s1 * si1);
00632
00633         /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
00634         pSrc[(2u * i2) + 1u] = (s1 * co1) - (r1 * si1);
00635
00636         /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
00637         pSrc[2u * i3] = (r2 * co3) + (s2 * si3);
00638
00639         /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
00640         pSrc[(2u * i3) + 1u] = (s2 * co3) - (r2 * si3);
00641       }
00642     }
00643     twidCoefModifier <<= 2u;
00644   }
00645
00646 #endif /* #ifndef ARM_MATH_CM0 */
00647
00648 }
00649
00650 /*
00651  * @brief  Core function for the floating-point CIFFT butterfly process.
00652  * @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.
00653  * @param[in]      fftLen           length of the FFT.
00654  * @param[in]      *pCoef           points to twiddle coefficient buffer.
00655  * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
00656  * @param[in]      onebyfftLen      value of 1/fftLen.
00657  * @return none.
00658  */
00659
00660 void arm_radix4_butterfly_inverse_f32(
00661   float32_t * pSrc,
00662   uint16_t fftLen,
00663   float32_t * pCoef,
00664   uint16_t twidCoefModifier,
00665   float32_t onebyfftLen)
00666 {
00667   float32_t co1, co2, co3, si1, si2, si3;
00668   float32_t t1, t2, r1, r2, s1, s2;
00669   uint32_t ia1, ia2, ia3;
00670   uint32_t i0, i1, i2, i3;
00671   uint32_t n1, n2, j, k;
00672
00673 #ifndef ARM_MATH_CM0
00674
00675   /* Run the below code for Cortex-M4 and Cortex-M3 */
00676
00677   /*  Initializations for the first stage */
00678   n2 = fftLen;
00679   n1 = n2;
00680
00681   /* n2 = fftLen/4 */
00682   n2 >>= 2u;
00683   i0 = 0u;
00684   ia1 = 0u;
00685
00686   j = n2;
00687
00688   /*  Calculation of first stage */
00689   do
00690   {
00691     /*  index calculation for the input as, */
00692     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
00693     i1 = i0 + n2;
00694     i2 = i1 + n2;
00695     i3 = i2 + n2;
00696
00697     /*  Butterfly implementation */
00698     /* xa + xc */
00699     r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
00700
00701     /* xa - xc */
00702     r2 = pSrc[2u * i0] - pSrc[2u * i2];
00703
00704     /* ya + yc */
00705     s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00706
00707     /* ya - yc */
00708     s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00709
00710     /* xb + xd */
00711     t1 = pSrc[2u * i1] + pSrc[2u * i3];
00712
00713     /* xa' = xa + xb + xc + xd */
00714     pSrc[2u * i0] = r1 + t1;
00715
00716     /* (xa + xc) - (xb + xd) */
00717     r1 = r1 - t1;
00718
00719     /* yb + yd */
00720     t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00721
00722     /* ya' = ya + yb + yc + yd */
00723     pSrc[(2u * i0) + 1u] = s1 + t2;
00724
00725     /* (ya + yc) - (yb + yd) */
00726     s1 = s1 - t2;
00727
00728     /* yb - yd */
00729     t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00730
00731     /* xb - xd */
00732     t2 = pSrc[2u * i1] - pSrc[2u * i3];
00733
00734     /*  index calculation for the coefficients */
00735     ia2 = ia1 + ia1;
00736     co2 = pCoef[ia2 * 2u];
00737     si2 = pCoef[(ia2 * 2u) + 1u];
00738
00739     /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
00740     pSrc[2u * i1] = (r1 * co2) - (s1 * si2);
00741
00742     /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
00743     pSrc[(2u * i1) + 1u] = (s1 * co2) + (r1 * si2);
00744
00745     /* (xa - xc) - (yb - yd) */
00746     r1 = r2 - t1;
00747
00748     /* (xa - xc) + (yb - yd) */
00749     r2 = r2 + t1;
00750
00751     /* (ya - yc) + (xb - xd) */
00752     s1 = s2 + t2;
00753
00754     /* (ya - yc) - (xb - xd) */
00755     s2 = s2 - t2;
00756
00757     co1 = pCoef[ia1 * 2u];
00758     si1 = pCoef[(ia1 * 2u) + 1u];
00759
00760     /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
00761     pSrc[2u * i2] = (r1 * co1) - (s1 * si1);
00762
00763     /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
00764     pSrc[(2u * i2) + 1u] = (s1 * co1) + (r1 * si1);
00765
00766     /*  index calculation for the coefficients */
00767     ia3 = ia2 + ia1;
00768     co3 = pCoef[ia3 * 2u];
00769     si3 = pCoef[(ia3 * 2u) + 1u];
00770
00771     /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
00772     pSrc[2u * i3] = (r2 * co3) - (s2 * si3);
00773
00774     /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
00775     pSrc[(2u * i3) + 1u] = (s2 * co3) + (r2 * si3);
00776
00777     /*  Twiddle coefficients index modifier */
00778     ia1 = ia1 + twidCoefModifier;
00779
00780     /*  Updating input index */
00781     i0 = i0 + 1u;
00782
00783   }
00784   while(--j);
00785
00786   twidCoefModifier <<= 2u;
00787
00788   /*  Calculation of second stage to excluding last stage */
00789   for (k = fftLen / 4; k > 4u; k >>= 2u)
00790   {
00791     /*  Initializations for the first stage */
00792     n1 = n2;
00793     n2 >>= 2u;
00794     ia1 = 0u;
00795
00796     /*  Calculation of first stage */
00797     for (j = 0u; j <= (n2 - 1u); j++)
00798     {
00799       /*  index calculation for the coefficients */
00800       ia2 = ia1 + ia1;
00801       ia3 = ia2 + ia1;
00802       co1 = pCoef[ia1 * 2u];
00803       si1 = pCoef[(ia1 * 2u) + 1u];
00804       co2 = pCoef[ia2 * 2u];
00805       si2 = pCoef[(ia2 * 2u) + 1u];
00806       co3 = pCoef[ia3 * 2u];
00807       si3 = pCoef[(ia3 * 2u) + 1u];
00808
00809       /*  Twiddle coefficients index modifier */
00810       ia1 = ia1 + twidCoefModifier;
00811
00812       for (i0 = j; i0 < fftLen; i0 += n1)
00813       {
00814         /*  index calculation for the input as, */
00815         /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
00816         i1 = i0 + n2;
00817         i2 = i1 + n2;
00818         i3 = i2 + n2;
00819
00820         /* xa + xc */
00821         r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
00822
00823         /* xa - xc */
00824         r2 = pSrc[(2u * i0)] - pSrc[(2u * i2)];
00825
00826         /* ya + yc */
00827         s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00828
00829         /* ya - yc */
00830         s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00831
00832         /* xb + xd */
00833         t1 = pSrc[2u * i1] + pSrc[2u * i3];
00834
00835         /* xa' = xa + xb + xc + xd */
00836         pSrc[2u * i0] = r1 + t1;
00837
00838         /* xa + xc -(xb + xd) */
00839         r1 = r1 - t1;
00840
00841         /* yb + yd */
00842         t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00843
00844         /* ya' = ya + yb + yc + yd */
00845         pSrc[(2u * i0) + 1u] = s1 + t2;
00846
00847         /* (ya + yc) - (yb + yd) */
00848         s1 = s1 - t2;
00849
00850         /* (yb - yd) */
00851         t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00852
00853         /* (xb - xd) */
00854         t2 = pSrc[2u * i1] - pSrc[2u * i3];
00855
00856         /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
00857         pSrc[2u * i1] = (r1 * co2) - (s1 * si2);
00858
00859         /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
00860         pSrc[(2u * i1) + 1u] = (s1 * co2) + (r1 * si2);
00861
00862         /* (xa - xc) - (yb - yd) */
00863         r1 = r2 - t1;
00864
00865         /* (xa - xc) + (yb - yd) */
00866         r2 = r2 + t1;
00867
00868         /* (ya - yc) +  (xb - xd) */
00869         s1 = s2 + t2;
00870
00871         /* (ya - yc) -  (xb - xd) */
00872         s2 = s2 - t2;
00873
00874         /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
00875         pSrc[2u * i2] = (r1 * co1) - (s1 * si1);
00876
00877         /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
00878         pSrc[(2u * i2) + 1u] = (s1 * co1) + (r1 * si1);
00879
00880         /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
00881         pSrc[2u * i3] = (r2 * co3) - (s2 * si3);
00882
00883         /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
00884         pSrc[(2u * i3) + 1u] = (s2 * co3) + (r2 * si3);
00885       }
00886     }
00887     twidCoefModifier <<= 2u;
00888   }
00889
00890   /*  Initializations of last stage */
00891   n1 = n2;
00892   n2 >>= 2u;
00893
00894   /*  Calculations of last stage */
00895   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
00896   {
00897     /*  index calculation for the input as, */
00898     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
00899     i1 = i0 + n2;
00900     i2 = i1 + n2;
00901     i3 = i2 + n2;
00902
00903     /*  Butterfly implementation */
00904     /* xa + xc */
00905     r1 = pSrc[2u * i0] + pSrc[2u * i2];
00906
00907     /* xa - xc */
00908     r2 = pSrc[2u * i0] - pSrc[2u * i2];
00909
00910     /* ya + yc */
00911     s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00912
00913     /* ya - yc */
00914     s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00915
00916     /* xc + xd */
00917     t1 = pSrc[2u * i1] + pSrc[2u * i3];
00918
00919     /* xa' = xa + xb + xc + xd */
00920     pSrc[2u * i0] = (r1 + t1) * onebyfftLen;
00921
00922     /* (xa + xb) - (xc + xd) */
00923     r1 = r1 - t1;
00924
00925     /* yb + yd */
00926     t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00927
00928     /* ya' = ya + yb + yc + yd */
00929     pSrc[(2u * i0) + 1u] = (s1 + t2) * onebyfftLen;
00930
00931     /* (ya + yc) - (yb + yd) */
00932     s1 = s1 - t2;
00933
00934     /* (yb-yd) */
00935     t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00936
00937     /* (xb-xd) */
00938     t2 = pSrc[2u * i1] - pSrc[2u * i3];
00939
00940     /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
00941     pSrc[2u * i1] = r1 * onebyfftLen;
00942
00943     /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
00944     pSrc[(2u * i1) + 1u] = s1 * onebyfftLen;
00945
00946
00947     /* (xa - xc) - (yb-yd) */
00948     r1 = r2 - t1;
00949
00950     /* (xa - xc) + (yb-yd) */
00951     r2 = r2 + t1;
00952
00953     /* (ya - yc) + (xb-xd) */
00954     s1 = s2 + t2;
00955
00956     /* (ya - yc) - (xb-xd) */
00957     s2 = s2 - t2;
00958
00959     /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
00960     pSrc[2u * i2] = r1 * onebyfftLen;
00961
00962     /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
00963     pSrc[(2u * i2) + 1u] = s1 * onebyfftLen;
00964
00965     /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
00966     pSrc[2u * i3] = r2 * onebyfftLen;
00967
00968     /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
00969     pSrc[(2u * i3) + 1u] = s2 * onebyfftLen;
00970   }
00971
00972
00973 #else
00974
00975   /* Run the below code for Cortex-M0 */
00976
00977   /*  Initializations for the first stage */
00978   n2 = fftLen;
00979   n1 = n2;
00980
00981   /*  Calculation of first stage */
00982   for (k = fftLen; k > 4u; k >>= 2u)
00983   {
00984     /*  Initializations for the first stage */
00985     n1 = n2;
00986     n2 >>= 2u;
00987     ia1 = 0u;
00988
00989     /*  Calculation of first stage */
00990     for (j = 0u; j <= (n2 - 1u); j++)
00991     {
00992       /*  index calculation for the coefficients */
00993       ia2 = ia1 + ia1;
00994       ia3 = ia2 + ia1;
00995       co1 = pCoef[ia1 * 2u];
00996       si1 = pCoef[(ia1 * 2u) + 1u];
00997       co2 = pCoef[ia2 * 2u];
00998       si2 = pCoef[(ia2 * 2u) + 1u];
00999       co3 = pCoef[ia3 * 2u];
01000       si3 = pCoef[(ia3 * 2u) + 1u];
01001
01002       /*  Twiddle coefficients index modifier */
01003       ia1 = ia1 + twidCoefModifier;
01004
01005       for (i0 = j; i0 < fftLen; i0 += n1)
01006       {
01007         /*  index calculation for the input as, */
01008         /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
01009         i1 = i0 + n2;
01010         i2 = i1 + n2;
01011         i3 = i2 + n2;
01012
01013         /* xa + xc */
01014         r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
01015
01016         /* xa - xc */
01017         r2 = pSrc[(2u * i0)] - pSrc[(2u * i2)];
01018
01019         /* ya + yc */
01020         s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
01021
01022         /* ya - yc */
01023         s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
01024
01025         /* xb + xd */
01026         t1 = pSrc[2u * i1] + pSrc[2u * i3];
01027
01028         /* xa' = xa + xb + xc + xd */
01029         pSrc[2u * i0] = r1 + t1;
01030
01031         /* xa + xc -(xb + xd) */
01032         r1 = r1 - t1;
01033
01034         /* yb + yd */
01035         t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
01036
01037         /* ya' = ya + yb + yc + yd */
01038         pSrc[(2u * i0) + 1u] = s1 + t2;
01039
01040         /* (ya + yc) - (yb + yd) */
01041         s1 = s1 - t2;
01042
01043         /* (yb - yd) */
01044         t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
01045
01046         /* (xb - xd) */
01047         t2 = pSrc[2u * i1] - pSrc[2u * i3];
01048
01049         /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
01050         pSrc[2u * i1] = (r1 * co2) - (s1 * si2);
01051
01052         /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
01053         pSrc[(2u * i1) + 1u] = (s1 * co2) + (r1 * si2);
01054
01055         /* (xa - xc) - (yb - yd) */
01056         r1 = r2 - t1;
01057
01058         /* (xa - xc) + (yb - yd) */
01059         r2 = r2 + t1;
01060
01061         /* (ya - yc) +  (xb - xd) */
01062         s1 = s2 + t2;
01063
01064         /* (ya - yc) -  (xb - xd) */
01065         s2 = s2 - t2;
01066
01067         /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
01068         pSrc[2u * i2] = (r1 * co1) - (s1 * si1);
01069
01070         /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
01071         pSrc[(2u * i2) + 1u] = (s1 * co1) + (r1 * si1);
01072
01073         /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
01074         pSrc[2u * i3] = (r2 * co3) - (s2 * si3);
01075
01076         /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
01077         pSrc[(2u * i3) + 1u] = (s2 * co3) + (r2 * si3);
01078       }
01079     }
01080     twidCoefModifier <<= 2u;
01081   }
01082   /*  Initializations of last stage */
01083   n1 = n2;
01084   n2 >>= 2u;
01085
01086   /*  Calculations of last stage */
01087   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
01088   {
01089     /*  index calculation for the input as, */
01090     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
01091     i1 = i0 + n2;
01092     i2 = i1 + n2;
01093     i3 = i2 + n2;
01094
01095     /*  Butterfly implementation */
01096     /* xa + xc */
01097     r1 = pSrc[2u * i0] + pSrc[2u * i2];
01098
01099     /* xa - xc */
01100     r2 = pSrc[2u * i0] - pSrc[2u * i2];
01101
01102     /* ya + yc */
01103     s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
01104
01105     /* ya - yc */
01106     s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
01107
01108     /* xc + xd */
01109     t1 = pSrc[2u * i1] + pSrc[2u * i3];
01110
01111     /* xa' = xa + xb + xc + xd */
01112     pSrc[2u * i0] = (r1 + t1) * onebyfftLen;
01113
01114     /* (xa + xb) - (xc + xd) */
01115     r1 = r1 - t1;
01116
01117     /* yb + yd */
01118     t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
01119
01120     /* ya' = ya + yb + yc + yd */
01121     pSrc[(2u * i0) + 1u] = (s1 + t2) * onebyfftLen;
01122
01123     /* (ya + yc) - (yb + yd) */
01124     s1 = s1 - t2;
01125
01126     /* (yb-yd) */
01127     t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
01128
01129     /* (xb-xd) */
01130     t2 = pSrc[2u * i1] - pSrc[2u * i3];
01131
01132     /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
01133     pSrc[2u * i1] = r1 * onebyfftLen;
01134
01135     /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
01136     pSrc[(2u * i1) + 1u] = s1 * onebyfftLen;
01137
01138
01139     /* (xa - xc) - (yb-yd) */
01140     r1 = r2 - t1;
01141
01142     /* (xa - xc) + (yb-yd) */
01143     r2 = r2 + t1;
01144
01145     /* (ya - yc) + (xb-xd) */
01146     s1 = s2 + t2;
01147
01148     /* (ya - yc) - (xb-xd) */
01149     s2 = s2 - t2;
01150
01151     /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
01152     pSrc[2u * i2] = r1 * onebyfftLen;
01153
01154     /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
01155     pSrc[(2u * i2) + 1u] = s1 * onebyfftLen;
01156
01157     /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
01158     pSrc[2u * i3] = r2 * onebyfftLen;
01159
01160     /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
01161     pSrc[(2u * i3) + 1u] = s2 * onebyfftLen;
01162   }
01163
01164 #endif /* #ifndef ARM_MATH_CM0 */
01165
01166 }
01167
01168 /*
01169  * @brief  In-place bit reversal function.
01170  * @param[in, out] *pSrc        points to the in-place buffer of floating-point data type.
01171  * @param[in]      fftSize      length of the FFT.
01172  * @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table.
01173  * @param[in]      *pBitRevTab  points to the bit reversal table.
01174  * @return none.
01175  */
01176
01177 void arm_bitreversal_f32(
01178   float32_t * pSrc,
01179   uint16_t fftSize,
01180   uint16_t bitRevFactor,
01181   uint16_t * pBitRevTab)
01182 {
01183   uint16_t fftLenBy2, fftLenBy2p1;
01184   uint16_t i, j;
01185   float32_t in;
01186
01187   /*  Initializations */
01188   j = 0u;
01189   fftLenBy2 = fftSize >> 1u;
01190   fftLenBy2p1 = (fftSize >> 1u) + 1u;
01191
01192   /* Bit Reversal Implementation */
01193   for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
01194   {
01195     if(i < j)
01196     {
01197       /*  pSrc[i] <-> pSrc[j]; */
01198       in = pSrc[2u * i];
01199       pSrc[2u * i] = pSrc[2u * j];
01200       pSrc[2u * j] = in;
01201
01202       /*  pSrc[i+1u] <-> pSrc[j+1u] */
01203       in = pSrc[(2u * i) + 1u];
01204       pSrc[(2u * i) + 1u] = pSrc[(2u * j) + 1u];
01205       pSrc[(2u * j) + 1u] = in;
01206
01207       /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
01208       in = pSrc[2u * (i + fftLenBy2p1)];
01209       pSrc[2u * (i + fftLenBy2p1)] = pSrc[2u * (j + fftLenBy2p1)];
01210       pSrc[2u * (j + fftLenBy2p1)] = in;
01211
01212       /*  pSrc[i+fftLenBy2p1+1u] <-> pSrc[j+fftLenBy2p1+1u] */
01213       in = pSrc[(2u * (i + fftLenBy2p1)) + 1u];
01214       pSrc[(2u * (i + fftLenBy2p1)) + 1u] =
01215         pSrc[(2u * (j + fftLenBy2p1)) + 1u];
01216       pSrc[(2u * (j + fftLenBy2p1)) + 1u] = in;
01217
01218     }
01219
01220     /*  pSrc[i+1u] <-> pSrc[j+1u] */
01221     in = pSrc[2u * (i + 1u)];
01222     pSrc[2u * (i + 1u)] = pSrc[2u * (j + fftLenBy2)];
01223     pSrc[2u * (j + fftLenBy2)] = in;
01224
01225     /*  pSrc[i+2u] <-> pSrc[j+2u] */
01226     in = pSrc[(2u * (i + 1u)) + 1u];
01227     pSrc[(2u * (i + 1u)) + 1u] = pSrc[(2u * (j + fftLenBy2)) + 1u];
01228     pSrc[(2u * (j + fftLenBy2)) + 1u] = in;
01229
01230     /*  Reading the index for the bit reversal */
01231     j = *pBitRevTab;
01232
01233     /*  Updating the bit reversal index depending on the fft length  */
01234     pBitRevTab += bitRevFactor;
01235   }
01236 }
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_cfft_radix4_init_q15.c
00009 *
00010 * Description:  Radix-4 Decimation in Frequency Q15 FFT & IFFT initialization function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *        incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037 #include "arm_common_tables.h"
00038
00049 /*
00050 * @brief  Twiddle factors Table
00051 */
00052
00072 static const q15_t twiddleCoefQ15[2048] = {
00073   0x7fff, 0x0, 0x7fff, 0xc9, 0x7ffe, 0x192, 0x7ffa, 0x25b,
00074   0x7ff6, 0x324, 0x7ff1, 0x3ed, 0x7fea, 0x4b6, 0x7fe2, 0x57f,
00075   0x7fd9, 0x648, 0x7fce, 0x711, 0x7fc2, 0x7d9, 0x7fb5, 0x8a2,
00076   0x7fa7, 0x96b, 0x7f98, 0xa33, 0x7f87, 0xafb, 0x7f75, 0xbc4,
00077   0x7f62, 0xc8c, 0x7f4e, 0xd54, 0x7f38, 0xe1c, 0x7f22, 0xee4,
00078   0x7f0a, 0xfab, 0x7ef0, 0x1073, 0x7ed6, 0x113a, 0x7eba, 0x1201,
00079   0x7e9d, 0x12c8, 0x7e7f, 0x138f, 0x7e60, 0x1455, 0x7e3f, 0x151c,
00080   0x7e1e, 0x15e2, 0x7dfb, 0x16a8, 0x7dd6, 0x176e, 0x7db1, 0x1833,
00081   0x7d8a, 0x18f9, 0x7d63, 0x19be, 0x7d3a, 0x1a83, 0x7d0f, 0x1b47,
00082   0x7ce4, 0x1c0c, 0x7cb7, 0x1cd0, 0x7c89, 0x1d93, 0x7c5a, 0x1e57,
00083   0x7c2a, 0x1f1a, 0x7bf9, 0x1fdd, 0x7bc6, 0x209f, 0x7b92, 0x2162,
00084   0x7b5d, 0x2224, 0x7b27, 0x22e5, 0x7aef, 0x23a7, 0x7ab7, 0x2467,
00085   0x7a7d, 0x2528, 0x7a42, 0x25e8, 0x7a06, 0x26a8, 0x79c9, 0x2768,
00086   0x798a, 0x2827, 0x794a, 0x28e5, 0x790a, 0x29a4, 0x78c8, 0x2a62,
00087   0x7885, 0x2b1f, 0x7840, 0x2bdc, 0x77fb, 0x2c99, 0x77b4, 0x2d55,
00088   0x776c, 0x2e11, 0x7723, 0x2ecc, 0x76d9, 0x2f87, 0x768e, 0x3042,
00089   0x7642, 0x30fc, 0x75f4, 0x31b5, 0x75a6, 0x326e, 0x7556, 0x3327,
00090   0x7505, 0x33df, 0x74b3, 0x3497, 0x7460, 0x354e, 0x740b, 0x3604,
00091   0x73b6, 0x36ba, 0x735f, 0x3770, 0x7308, 0x3825, 0x72af, 0x38d9,
00092   0x7255, 0x398d, 0x71fa, 0x3a40, 0x719e, 0x3af3, 0x7141, 0x3ba5,
00093   0x70e3, 0x3c57, 0x7083, 0x3d08, 0x7023, 0x3db8, 0x6fc2, 0x3e68,
00094   0x6f5f, 0x3f17, 0x6efb, 0x3fc6, 0x6e97, 0x4074, 0x6e31, 0x4121,
00095   0x6dca, 0x41ce, 0x6d62, 0x427a, 0x6cf9, 0x4326, 0x6c8f, 0x43d1,
00096   0x6c24, 0x447b, 0x6bb8, 0x4524, 0x6b4b, 0x45cd, 0x6add, 0x4675,
00097   0x6a6e, 0x471d, 0x69fd, 0x47c4, 0x698c, 0x486a, 0x691a, 0x490f,
00098   0x68a7, 0x49b4, 0x6832, 0x4a58, 0x67bd, 0x4afb, 0x6747, 0x4b9e,
00099   0x66d0, 0x4c40, 0x6657, 0x4ce1, 0x65de, 0x4d81, 0x6564, 0x4e21,
00100   0x64e9, 0x4ec0, 0x646c, 0x4f5e, 0x63ef, 0x4ffb, 0x6371, 0x5098,
00101   0x62f2, 0x5134, 0x6272, 0x51cf, 0x61f1, 0x5269, 0x616f, 0x5303,
00102   0x60ec, 0x539b, 0x6068, 0x5433, 0x5fe4, 0x54ca, 0x5f5e, 0x5560,
00103   0x5ed7, 0x55f6, 0x5e50, 0x568a, 0x5dc8, 0x571e, 0x5d3e, 0x57b1,
00104   0x5cb4, 0x5843, 0x5c29, 0x58d4, 0x5b9d, 0x5964, 0x5b10, 0x59f4,
00105   0x5a82, 0x5a82, 0x59f4, 0x5b10, 0x5964, 0x5b9d, 0x58d4, 0x5c29,
00106   0x5843, 0x5cb4, 0x57b1, 0x5d3e, 0x571e, 0x5dc8, 0x568a, 0x5e50,
00107   0x55f6, 0x5ed7, 0x5560, 0x5f5e, 0x54ca, 0x5fe4, 0x5433, 0x6068,
00108   0x539b, 0x60ec, 0x5303, 0x616f, 0x5269, 0x61f1, 0x51cf, 0x6272,
00109   0x5134, 0x62f2, 0x5098, 0x6371, 0x4ffb, 0x63ef, 0x4f5e, 0x646c,
00110   0x4ec0, 0x64e9, 0x4e21, 0x6564, 0x4d81, 0x65de, 0x4ce1, 0x6657,
00111   0x4c40, 0x66d0, 0x4b9e, 0x6747, 0x4afb, 0x67bd, 0x4a58, 0x6832,
00112   0x49b4, 0x68a7, 0x490f, 0x691a, 0x486a, 0x698c, 0x47c4, 0x69fd,
00113   0x471d, 0x6a6e, 0x4675, 0x6add, 0x45cd, 0x6b4b, 0x4524, 0x6bb8,
00114   0x447b, 0x6c24, 0x43d1, 0x6c8f, 0x4326, 0x6cf9, 0x427a, 0x6d62,
00115   0x41ce, 0x6dca, 0x4121, 0x6e31, 0x4074, 0x6e97, 0x3fc6, 0x6efb,
00116   0x3f17, 0x6f5f, 0x3e68, 0x6fc2, 0x3db8, 0x7023, 0x3d08, 0x7083,
00117   0x3c57, 0x70e3, 0x3ba5, 0x7141, 0x3af3, 0x719e, 0x3a40, 0x71fa,
00118   0x398d, 0x7255, 0x38d9, 0x72af, 0x3825, 0x7308, 0x3770, 0x735f,
00119   0x36ba, 0x73b6, 0x3604, 0x740b, 0x354e, 0x7460, 0x3497, 0x74b3,
00120   0x33df, 0x7505, 0x3327, 0x7556, 0x326e, 0x75a6, 0x31b5, 0x75f4,
00121   0x30fc, 0x7642, 0x3042, 0x768e, 0x2f87, 0x76d9, 0x2ecc, 0x7723,
00122   0x2e11, 0x776c, 0x2d55, 0x77b4, 0x2c99, 0x77fb, 0x2bdc, 0x7840,
00123   0x2b1f, 0x7885, 0x2a62, 0x78c8, 0x29a4, 0x790a, 0x28e5, 0x794a,
00124   0x2827, 0x798a, 0x2768, 0x79c9, 0x26a8, 0x7a06, 0x25e8, 0x7a42,
00125   0x2528, 0x7a7d, 0x2467, 0x7ab7, 0x23a7, 0x7aef, 0x22e5, 0x7b27,
00126   0x2224, 0x7b5d, 0x2162, 0x7b92, 0x209f, 0x7bc6, 0x1fdd, 0x7bf9,
00127   0x1f1a, 0x7c2a, 0x1e57, 0x7c5a, 0x1d93, 0x7c89, 0x1cd0, 0x7cb7,
00128   0x1c0c, 0x7ce4, 0x1b47, 0x7d0f, 0x1a83, 0x7d3a, 0x19be, 0x7d63,
00129   0x18f9, 0x7d8a, 0x1833, 0x7db1, 0x176e, 0x7dd6, 0x16a8, 0x7dfb,
00130   0x15e2, 0x7e1e, 0x151c, 0x7e3f, 0x1455, 0x7e60, 0x138f, 0x7e7f,
00131   0x12c8, 0x7e9d, 0x1201, 0x7eba, 0x113a, 0x7ed6, 0x1073, 0x7ef0,
00132   0xfab, 0x7f0a, 0xee4, 0x7f22, 0xe1c, 0x7f38, 0xd54, 0x7f4e,
00133   0xc8c, 0x7f62, 0xbc4, 0x7f75, 0xafb, 0x7f87, 0xa33, 0x7f98,
00134   0x96b, 0x7fa7, 0x8a2, 0x7fb5, 0x7d9, 0x7fc2, 0x711, 0x7fce,
00135   0x648, 0x7fd9, 0x57f, 0x7fe2, 0x4b6, 0x7fea, 0x3ed, 0x7ff1,
00136   0x324, 0x7ff6, 0x25b, 0x7ffa, 0x192, 0x7ffe, 0xc9, 0x7fff,
00137   0x0, 0x7fff, 0xff37, 0x7fff, 0xfe6e, 0x7ffe, 0xfda5, 0x7ffa,
00138   0xfcdc, 0x7ff6, 0xfc13, 0x7ff1, 0xfb4a, 0x7fea, 0xfa81, 0x7fe2,
00139   0xf9b8, 0x7fd9, 0xf8ef, 0x7fce, 0xf827, 0x7fc2, 0xf75e, 0x7fb5,
00140   0xf695, 0x7fa7, 0xf5cd, 0x7f98, 0xf505, 0x7f87, 0xf43c, 0x7f75,
00141   0xf374, 0x7f62, 0xf2ac, 0x7f4e, 0xf1e4, 0x7f38, 0xf11c, 0x7f22,
00142   0xf055, 0x7f0a, 0xef8d, 0x7ef0, 0xeec6, 0x7ed6, 0xedff, 0x7eba,
00143   0xed38, 0x7e9d, 0xec71, 0x7e7f, 0xebab, 0x7e60, 0xeae4, 0x7e3f,
00144   0xea1e, 0x7e1e, 0xe958, 0x7dfb, 0xe892, 0x7dd6, 0xe7cd, 0x7db1,
00145   0xe707, 0x7d8a, 0xe642, 0x7d63, 0xe57d, 0x7d3a, 0xe4b9, 0x7d0f,
00146   0xe3f4, 0x7ce4, 0xe330, 0x7cb7, 0xe26d, 0x7c89, 0xe1a9, 0x7c5a,
00147   0xe0e6, 0x7c2a, 0xe023, 0x7bf9, 0xdf61, 0x7bc6, 0xde9e, 0x7b92,
00148   0xdddc, 0x7b5d, 0xdd1b, 0x7b27, 0xdc59, 0x7aef, 0xdb99, 0x7ab7,
00149   0xdad8, 0x7a7d, 0xda18, 0x7a42, 0xd958, 0x7a06, 0xd898, 0x79c9,
00150   0xd7d9, 0x798a, 0xd71b, 0x794a, 0xd65c, 0x790a, 0xd59e, 0x78c8,
00151   0xd4e1, 0x7885, 0xd424, 0x7840, 0xd367, 0x77fb, 0xd2ab, 0x77b4,
00152   0xd1ef, 0x776c, 0xd134, 0x7723, 0xd079, 0x76d9, 0xcfbe, 0x768e,
00153   0xcf04, 0x7642, 0xce4b, 0x75f4, 0xcd92, 0x75a6, 0xccd9, 0x7556,
00154   0xcc21, 0x7505, 0xcb69, 0x74b3, 0xcab2, 0x7460, 0xc9fc, 0x740b,
00155   0xc946, 0x73b6, 0xc890, 0x735f, 0xc7db, 0x7308, 0xc727, 0x72af,
00156   0xc673, 0x7255, 0xc5c0, 0x71fa, 0xc50d, 0x719e, 0xc45b, 0x7141,
00157   0xc3a9, 0x70e3, 0xc2f8, 0x7083, 0xc248, 0x7023, 0xc198, 0x6fc2,
00158   0xc0e9, 0x6f5f, 0xc03a, 0x6efb, 0xbf8c, 0x6e97, 0xbedf, 0x6e31,
00159   0xbe32, 0x6dca, 0xbd86, 0x6d62, 0xbcda, 0x6cf9, 0xbc2f, 0x6c8f,
00160   0xbb85, 0x6c24, 0xbadc, 0x6bb8, 0xba33, 0x6b4b, 0xb98b, 0x6add,
00161   0xb8e3, 0x6a6e, 0xb83c, 0x69fd, 0xb796, 0x698c, 0xb6f1, 0x691a,
00162   0xb64c, 0x68a7, 0xb5a8, 0x6832, 0xb505, 0x67bd, 0xb462, 0x6747,
00163   0xb3c0, 0x66d0, 0xb31f, 0x6657, 0xb27f, 0x65de, 0xb1df, 0x6564,
00164   0xb140, 0x64e9, 0xb0a2, 0x646c, 0xb005, 0x63ef, 0xaf68, 0x6371,
00165   0xaecc, 0x62f2, 0xae31, 0x6272, 0xad97, 0x61f1, 0xacfd, 0x616f,
00166   0xac65, 0x60ec, 0xabcd, 0x6068, 0xab36, 0x5fe4, 0xaaa0, 0x5f5e,
00167   0xaa0a, 0x5ed7, 0xa976, 0x5e50, 0xa8e2, 0x5dc8, 0xa84f, 0x5d3e,
00168   0xa7bd, 0x5cb4, 0xa72c, 0x5c29, 0xa69c, 0x5b9d, 0xa60c, 0x5b10,
00169   0xa57e, 0x5a82, 0xa4f0, 0x59f4, 0xa463, 0x5964, 0xa3d7, 0x58d4,
00170   0xa34c, 0x5843, 0xa2c2, 0x57b1, 0xa238, 0x571e, 0xa1b0, 0x568a,
00171   0xa129, 0x55f6, 0xa0a2, 0x5560, 0xa01c, 0x54ca, 0x9f98, 0x5433,
00172   0x9f14, 0x539b, 0x9e91, 0x5303, 0x9e0f, 0x5269, 0x9d8e, 0x51cf,
00173   0x9d0e, 0x5134, 0x9c8f, 0x5098, 0x9c11, 0x4ffb, 0x9b94, 0x4f5e,
00174   0x9b17, 0x4ec0, 0x9a9c, 0x4e21, 0x9a22, 0x4d81, 0x99a9, 0x4ce1,
00175   0x9930, 0x4c40, 0x98b9, 0x4b9e, 0x9843, 0x4afb, 0x97ce, 0x4a58,
00176   0x9759, 0x49b4, 0x96e6, 0x490f, 0x9674, 0x486a, 0x9603, 0x47c4,
00177   0x9592, 0x471d, 0x9523, 0x4675, 0x94b5, 0x45cd, 0x9448, 0x4524,
00178   0x93dc, 0x447b, 0x9371, 0x43d1, 0x9307, 0x4326, 0x929e, 0x427a,
00179   0x9236, 0x41ce, 0x91cf, 0x4121, 0x9169, 0x4074, 0x9105, 0x3fc6,
00180   0x90a1, 0x3f17, 0x903e, 0x3e68, 0x8fdd, 0x3db8, 0x8f7d, 0x3d08,
00181   0x8f1d, 0x3c57, 0x8ebf, 0x3ba5, 0x8e62, 0x3af3, 0x8e06, 0x3a40,
00182   0x8dab, 0x398d, 0x8d51, 0x38d9, 0x8cf8, 0x3825, 0x8ca1, 0x3770,
00183   0x8c4a, 0x36ba, 0x8bf5, 0x3604, 0x8ba0, 0x354e, 0x8b4d, 0x3497,
00184   0x8afb, 0x33df, 0x8aaa, 0x3327, 0x8a5a, 0x326e, 0x8a0c, 0x31b5,
00185   0x89be, 0x30fc, 0x8972, 0x3042, 0x8927, 0x2f87, 0x88dd, 0x2ecc,
00186   0x8894, 0x2e11, 0x884c, 0x2d55, 0x8805, 0x2c99, 0x87c0, 0x2bdc,
00187   0x877b, 0x2b1f, 0x8738, 0x2a62, 0x86f6, 0x29a4, 0x86b6, 0x28e5,
00188   0x8676, 0x2827, 0x8637, 0x2768, 0x85fa, 0x26a8, 0x85be, 0x25e8,
00189   0x8583, 0x2528, 0x8549, 0x2467, 0x8511, 0x23a7, 0x84d9, 0x22e5,
00190   0x84a3, 0x2224, 0x846e, 0x2162, 0x843a, 0x209f, 0x8407, 0x1fdd,
00191   0x83d6, 0x1f1a, 0x83a6, 0x1e57, 0x8377, 0x1d93, 0x8349, 0x1cd0,
00192   0x831c, 0x1c0c, 0x82f1, 0x1b47, 0x82c6, 0x1a83, 0x829d, 0x19be,
00193   0x8276, 0x18f9, 0x824f, 0x1833, 0x822a, 0x176e, 0x8205, 0x16a8,
00194   0x81e2, 0x15e2, 0x81c1, 0x151c, 0x81a0, 0x1455, 0x8181, 0x138f,
00195   0x8163, 0x12c8, 0x8146, 0x1201, 0x812a, 0x113a, 0x8110, 0x1073,
00196   0x80f6, 0xfab, 0x80de, 0xee4, 0x80c8, 0xe1c, 0x80b2, 0xd54,
00197   0x809e, 0xc8c, 0x808b, 0xbc4, 0x8079, 0xafb, 0x8068, 0xa33,
00198   0x8059, 0x96b, 0x804b, 0x8a2, 0x803e, 0x7d9, 0x8032, 0x711,
00199   0x8027, 0x648, 0x801e, 0x57f, 0x8016, 0x4b6, 0x800f, 0x3ed,
00200   0x800a, 0x324, 0x8006, 0x25b, 0x8002, 0x192, 0x8001, 0xc9,
00201   0x8000, 0x0, 0x8001, 0xff37, 0x8002, 0xfe6e, 0x8006, 0xfda5,
00202   0x800a, 0xfcdc, 0x800f, 0xfc13, 0x8016, 0xfb4a, 0x801e, 0xfa81,
00203   0x8027, 0xf9b8, 0x8032, 0xf8ef, 0x803e, 0xf827, 0x804b, 0xf75e,
00204   0x8059, 0xf695, 0x8068, 0xf5cd, 0x8079, 0xf505, 0x808b, 0xf43c,
00205   0x809e, 0xf374, 0x80b2, 0xf2ac, 0x80c8, 0xf1e4, 0x80de, 0xf11c,
00206   0x80f6, 0xf055, 0x8110, 0xef8d, 0x812a, 0xeec6, 0x8146, 0xedff,
00207   0x8163, 0xed38, 0x8181, 0xec71, 0x81a0, 0xebab, 0x81c1, 0xeae4,
00208   0x81e2, 0xea1e, 0x8205, 0xe958, 0x822a, 0xe892, 0x824f, 0xe7cd,
00209   0x8276, 0xe707, 0x829d, 0xe642, 0x82c6, 0xe57d, 0x82f1, 0xe4b9,
00210   0x831c, 0xe3f4, 0x8349, 0xe330, 0x8377, 0xe26d, 0x83a6, 0xe1a9,
00211   0x83d6, 0xe0e6, 0x8407, 0xe023, 0x843a, 0xdf61, 0x846e, 0xde9e,
00212   0x84a3, 0xdddc, 0x84d9, 0xdd1b, 0x8511, 0xdc59, 0x8549, 0xdb99,
00213   0x8583, 0xdad8, 0x85be, 0xda18, 0x85fa, 0xd958, 0x8637, 0xd898,
00214   0x8676, 0xd7d9, 0x86b6, 0xd71b, 0x86f6, 0xd65c, 0x8738, 0xd59e,
00215   0x877b, 0xd4e1, 0x87c0, 0xd424, 0x8805, 0xd367, 0x884c, 0xd2ab,
00216   0x8894, 0xd1ef, 0x88dd, 0xd134, 0x8927, 0xd079, 0x8972, 0xcfbe,
00217   0x89be, 0xcf04, 0x8a0c, 0xce4b, 0x8a5a, 0xcd92, 0x8aaa, 0xccd9,
00218   0x8afb, 0xcc21, 0x8b4d, 0xcb69, 0x8ba0, 0xcab2, 0x8bf5, 0xc9fc,
00219   0x8c4a, 0xc946, 0x8ca1, 0xc890, 0x8cf8, 0xc7db, 0x8d51, 0xc727,
00220   0x8dab, 0xc673, 0x8e06, 0xc5c0, 0x8e62, 0xc50d, 0x8ebf, 0xc45b,
00221   0x8f1d, 0xc3a9, 0x8f7d, 0xc2f8, 0x8fdd, 0xc248, 0x903e, 0xc198,
00222   0x90a1, 0xc0e9, 0x9105, 0xc03a, 0x9169, 0xbf8c, 0x91cf, 0xbedf,
00223   0x9236, 0xbe32, 0x929e, 0xbd86, 0x9307, 0xbcda, 0x9371, 0xbc2f,
00224   0x93dc, 0xbb85, 0x9448, 0xbadc, 0x94b5, 0xba33, 0x9523, 0xb98b,
00225   0x9592, 0xb8e3, 0x9603, 0xb83c, 0x9674, 0xb796, 0x96e6, 0xb6f1,
00226   0x9759, 0xb64c, 0x97ce, 0xb5a8, 0x9843, 0xb505, 0x98b9, 0xb462,
00227   0x9930, 0xb3c0, 0x99a9, 0xb31f, 0x9a22, 0xb27f, 0x9a9c, 0xb1df,
00228   0x9b17, 0xb140, 0x9b94, 0xb0a2, 0x9c11, 0xb005, 0x9c8f, 0xaf68,
00229   0x9d0e, 0xaecc, 0x9d8e, 0xae31, 0x9e0f, 0xad97, 0x9e91, 0xacfd,
00230   0x9f14, 0xac65, 0x9f98, 0xabcd, 0xa01c, 0xab36, 0xa0a2, 0xaaa0,
00231   0xa129, 0xaa0a, 0xa1b0, 0xa976, 0xa238, 0xa8e2, 0xa2c2, 0xa84f,
00232   0xa34c, 0xa7bd, 0xa3d7, 0xa72c, 0xa463, 0xa69c, 0xa4f0, 0xa60c,
00233   0xa57e, 0xa57e, 0xa60c, 0xa4f0, 0xa69c, 0xa463, 0xa72c, 0xa3d7,
00234   0xa7bd, 0xa34c, 0xa84f, 0xa2c2, 0xa8e2, 0xa238, 0xa976, 0xa1b0,
00235   0xaa0a, 0xa129, 0xaaa0, 0xa0a2, 0xab36, 0xa01c, 0xabcd, 0x9f98,
00236   0xac65, 0x9f14, 0xacfd, 0x9e91, 0xad97, 0x9e0f, 0xae31, 0x9d8e,
00237   0xaecc, 0x9d0e, 0xaf68, 0x9c8f, 0xb005, 0x9c11, 0xb0a2, 0x9b94,
00238   0xb140, 0x9b17, 0xb1df, 0x9a9c, 0xb27f, 0x9a22, 0xb31f, 0x99a9,
00239   0xb3c0, 0x9930, 0xb462, 0x98b9, 0xb505, 0x9843, 0xb5a8, 0x97ce,
00240   0xb64c, 0x9759, 0xb6f1, 0x96e6, 0xb796, 0x9674, 0xb83c, 0x9603,
00241   0xb8e3, 0x9592, 0xb98b, 0x9523, 0xba33, 0x94b5, 0xbadc, 0x9448,
00242   0xbb85, 0x93dc, 0xbc2f, 0x9371, 0xbcda, 0x9307, 0xbd86, 0x929e,
00243   0xbe32, 0x9236, 0xbedf, 0x91cf, 0xbf8c, 0x9169, 0xc03a, 0x9105,
00244   0xc0e9, 0x90a1, 0xc198, 0x903e, 0xc248, 0x8fdd, 0xc2f8, 0x8f7d,
00245   0xc3a9, 0x8f1d, 0xc45b, 0x8ebf, 0xc50d, 0x8e62, 0xc5c0, 0x8e06,
00246   0xc673, 0x8dab, 0xc727, 0x8d51, 0xc7db, 0x8cf8, 0xc890, 0x8ca1,
00247   0xc946, 0x8c4a, 0xc9fc, 0x8bf5, 0xcab2, 0x8ba0, 0xcb69, 0x8b4d,
00248   0xcc21, 0x8afb, 0xccd9, 0x8aaa, 0xcd92, 0x8a5a, 0xce4b, 0x8a0c,
00249   0xcf04, 0x89be, 0xcfbe, 0x8972, 0xd079, 0x8927, 0xd134, 0x88dd,
00250   0xd1ef, 0x8894, 0xd2ab, 0x884c, 0xd367, 0x8805, 0xd424, 0x87c0,
00251   0xd4e1, 0x877b, 0xd59e, 0x8738, 0xd65c, 0x86f6, 0xd71b, 0x86b6,
00252   0xd7d9, 0x8676, 0xd898, 0x8637, 0xd958, 0x85fa, 0xda18, 0x85be,
00253   0xdad8, 0x8583, 0xdb99, 0x8549, 0xdc59, 0x8511, 0xdd1b, 0x84d9,
00254   0xdddc, 0x84a3, 0xde9e, 0x846e, 0xdf61, 0x843a, 0xe023, 0x8407,
00255   0xe0e6, 0x83d6, 0xe1a9, 0x83a6, 0xe26d, 0x8377, 0xe330, 0x8349,
00256   0xe3f4, 0x831c, 0xe4b9, 0x82f1, 0xe57d, 0x82c6, 0xe642, 0x829d,
00257   0xe707, 0x8276, 0xe7cd, 0x824f, 0xe892, 0x822a, 0xe958, 0x8205,
00258   0xea1e, 0x81e2, 0xeae4, 0x81c1, 0xebab, 0x81a0, 0xec71, 0x8181,
00259   0xed38, 0x8163, 0xedff, 0x8146, 0xeec6, 0x812a, 0xef8d, 0x8110,
00260   0xf055, 0x80f6, 0xf11c, 0x80de, 0xf1e4, 0x80c8, 0xf2ac, 0x80b2,
00261   0xf374, 0x809e, 0xf43c, 0x808b, 0xf505, 0x8079, 0xf5cd, 0x8068,
00262   0xf695, 0x8059, 0xf75e, 0x804b, 0xf827, 0x803e, 0xf8ef, 0x8032,
00263   0xf9b8, 0x8027, 0xfa81, 0x801e, 0xfb4a, 0x8016, 0xfc13, 0x800f,
00264   0xfcdc, 0x800a, 0xfda5, 0x8006, 0xfe6e, 0x8002, 0xff37, 0x8001,
00265   0x0, 0x8000, 0xc9, 0x8001, 0x192, 0x8002, 0x25b, 0x8006,
00266   0x324, 0x800a, 0x3ed, 0x800f, 0x4b6, 0x8016, 0x57f, 0x801e,
00267   0x648, 0x8027, 0x711, 0x8032, 0x7d9, 0x803e, 0x8a2, 0x804b,
00268   0x96b, 0x8059, 0xa33, 0x8068, 0xafb, 0x8079, 0xbc4, 0x808b,
00269   0xc8c, 0x809e, 0xd54, 0x80b2, 0xe1c, 0x80c8, 0xee4, 0x80de,
00270   0xfab, 0x80f6, 0x1073, 0x8110, 0x113a, 0x812a, 0x1201, 0x8146,
00271   0x12c8, 0x8163, 0x138f, 0x8181, 0x1455, 0x81a0, 0x151c, 0x81c1,
00272   0x15e2, 0x81e2, 0x16a8, 0x8205, 0x176e, 0x822a, 0x1833, 0x824f,
00273   0x18f9, 0x8276, 0x19be, 0x829d, 0x1a83, 0x82c6, 0x1b47, 0x82f1,
00274   0x1c0c, 0x831c, 0x1cd0, 0x8349, 0x1d93, 0x8377, 0x1e57, 0x83a6,
00275   0x1f1a, 0x83d6, 0x1fdd, 0x8407, 0x209f, 0x843a, 0x2162, 0x846e,
00276   0x2224, 0x84a3, 0x22e5, 0x84d9, 0x23a7, 0x8511, 0x2467, 0x8549,
00277   0x2528, 0x8583, 0x25e8, 0x85be, 0x26a8, 0x85fa, 0x2768, 0x8637,
00278   0x2827, 0x8676, 0x28e5, 0x86b6, 0x29a4, 0x86f6, 0x2a62, 0x8738,
00279   0x2b1f, 0x877b, 0x2bdc, 0x87c0, 0x2c99, 0x8805, 0x2d55, 0x884c,
00280   0x2e11, 0x8894, 0x2ecc, 0x88dd, 0x2f87, 0x8927, 0x3042, 0x8972,
00281   0x30fc, 0x89be, 0x31b5, 0x8a0c, 0x326e, 0x8a5a, 0x3327, 0x8aaa,
00282   0x33df, 0x8afb, 0x3497, 0x8b4d, 0x354e, 0x8ba0, 0x3604, 0x8bf5,
00283   0x36ba, 0x8c4a, 0x3770, 0x8ca1, 0x3825, 0x8cf8, 0x38d9, 0x8d51,
00284   0x398d, 0x8dab, 0x3a40, 0x8e06, 0x3af3, 0x8e62, 0x3ba5, 0x8ebf,
00285   0x3c57, 0x8f1d, 0x3d08, 0x8f7d, 0x3db8, 0x8fdd, 0x3e68, 0x903e,
00286   0x3f17, 0x90a1, 0x3fc6, 0x9105, 0x4074, 0x9169, 0x4121, 0x91cf,
00287   0x41ce, 0x9236, 0x427a, 0x929e, 0x4326, 0x9307, 0x43d1, 0x9371,
00288   0x447b, 0x93dc, 0x4524, 0x9448, 0x45cd, 0x94b5, 0x4675, 0x9523,
00289   0x471d, 0x9592, 0x47c4, 0x9603, 0x486a, 0x9674, 0x490f, 0x96e6,
00290   0x49b4, 0x9759, 0x4a58, 0x97ce, 0x4afb, 0x9843, 0x4b9e, 0x98b9,
00291   0x4c40, 0x9930, 0x4ce1, 0x99a9, 0x4d81, 0x9a22, 0x4e21, 0x9a9c,
00292   0x4ec0, 0x9b17, 0x4f5e, 0x9b94, 0x4ffb, 0x9c11, 0x5098, 0x9c8f,
00293   0x5134, 0x9d0e, 0x51cf, 0x9d8e, 0x5269, 0x9e0f, 0x5303, 0x9e91,
00294   0x539b, 0x9f14, 0x5433, 0x9f98, 0x54ca, 0xa01c, 0x5560, 0xa0a2,
00295   0x55f6, 0xa129, 0x568a, 0xa1b0, 0x571e, 0xa238, 0x57b1, 0xa2c2,
00296   0x5843, 0xa34c, 0x58d4, 0xa3d7, 0x5964, 0xa463, 0x59f4, 0xa4f0,
00297   0x5a82, 0xa57e, 0x5b10, 0xa60c, 0x5b9d, 0xa69c, 0x5c29, 0xa72c,
00298   0x5cb4, 0xa7bd, 0x5d3e, 0xa84f, 0x5dc8, 0xa8e2, 0x5e50, 0xa976,
00299   0x5ed7, 0xaa0a, 0x5f5e, 0xaaa0, 0x5fe4, 0xab36, 0x6068, 0xabcd,
00300   0x60ec, 0xac65, 0x616f, 0xacfd, 0x61f1, 0xad97, 0x6272, 0xae31,
00301   0x62f2, 0xaecc, 0x6371, 0xaf68, 0x63ef, 0xb005, 0x646c, 0xb0a2,
00302   0x64e9, 0xb140, 0x6564, 0xb1df, 0x65de, 0xb27f, 0x6657, 0xb31f,
00303   0x66d0, 0xb3c0, 0x6747, 0xb462, 0x67bd, 0xb505, 0x6832, 0xb5a8,
00304   0x68a7, 0xb64c, 0x691a, 0xb6f1, 0x698c, 0xb796, 0x69fd, 0xb83c,
00305   0x6a6e, 0xb8e3, 0x6add, 0xb98b, 0x6b4b, 0xba33, 0x6bb8, 0xbadc,
00306   0x6c24, 0xbb85, 0x6c8f, 0xbc2f, 0x6cf9, 0xbcda, 0x6d62, 0xbd86,
00307   0x6dca, 0xbe32, 0x6e31, 0xbedf, 0x6e97, 0xbf8c, 0x6efb, 0xc03a,
00308   0x6f5f, 0xc0e9, 0x6fc2, 0xc198, 0x7023, 0xc248, 0x7083, 0xc2f8,
00309   0x70e3, 0xc3a9, 0x7141, 0xc45b, 0x719e, 0xc50d, 0x71fa, 0xc5c0,
00310   0x7255, 0xc673, 0x72af, 0xc727, 0x7308, 0xc7db, 0x735f, 0xc890,
00311   0x73b6, 0xc946, 0x740b, 0xc9fc, 0x7460, 0xcab2, 0x74b3, 0xcb69,
00312   0x7505, 0xcc21, 0x7556, 0xccd9, 0x75a6, 0xcd92, 0x75f4, 0xce4b,
00313   0x7642, 0xcf04, 0x768e, 0xcfbe, 0x76d9, 0xd079, 0x7723, 0xd134,
00314   0x776c, 0xd1ef, 0x77b4, 0xd2ab, 0x77fb, 0xd367, 0x7840, 0xd424,
00315   0x7885, 0xd4e1, 0x78c8, 0xd59e, 0x790a, 0xd65c, 0x794a, 0xd71b,
00316   0x798a, 0xd7d9, 0x79c9, 0xd898, 0x7a06, 0xd958, 0x7a42, 0xda18,
00317   0x7a7d, 0xdad8, 0x7ab7, 0xdb99, 0x7aef, 0xdc59, 0x7b27, 0xdd1b,
00318   0x7b5d, 0xdddc, 0x7b92, 0xde9e, 0x7bc6, 0xdf61, 0x7bf9, 0xe023,
00319   0x7c2a, 0xe0e6, 0x7c5a, 0xe1a9, 0x7c89, 0xe26d, 0x7cb7, 0xe330,
00320   0x7ce4, 0xe3f4, 0x7d0f, 0xe4b9, 0x7d3a, 0xe57d, 0x7d63, 0xe642,
00321   0x7d8a, 0xe707, 0x7db1, 0xe7cd, 0x7dd6, 0xe892, 0x7dfb, 0xe958,
00322   0x7e1e, 0xea1e, 0x7e3f, 0xeae4, 0x7e60, 0xebab, 0x7e7f, 0xec71,
00323   0x7e9d, 0xed38, 0x7eba, 0xedff, 0x7ed6, 0xeec6, 0x7ef0, 0xef8d,
00324   0x7f0a, 0xf055, 0x7f22, 0xf11c, 0x7f38, 0xf1e4, 0x7f4e, 0xf2ac,
00325   0x7f62, 0xf374, 0x7f75, 0xf43c, 0x7f87, 0xf505, 0x7f98, 0xf5cd,
00326   0x7fa7, 0xf695, 0x7fb5, 0xf75e, 0x7fc2, 0xf827, 0x7fce, 0xf8ef,
00327   0x7fd9, 0xf9b8, 0x7fe2, 0xfa81, 0x7fea, 0xfb4a, 0x7ff1, 0xfc13,
00328   0x7ff6, 0xfcdc, 0x7ffa, 0xfda5, 0x7ffe, 0xfe6e, 0x7fff, 0xff37
00329 };
00330
00331
00353 arm_status arm_cfft_radix4_init_q15(
00354   arm_cfft_radix4_instance_q15 * S,
00355   uint16_t fftLen,
00356   uint8_t ifftFlag,
00357   uint8_t bitReverseFlag)
00358 {
00359   /*  Initialise the default arm status */
00360   arm_status status = ARM_MATH_SUCCESS;
00361   /*  Initialise the FFT length */
00362   S->fftLen = fftLen;
00363   /*  Initialise the Twiddle coefficient pointer */
00364   S->pTwiddle = (q15_t *) twiddleCoefQ15;
00365   /*  Initialise the Flag for selection of CFFT or CIFFT */
00366   S->ifftFlag = ifftFlag;
00367   /*  Initialise the Flag for calculation Bit reversal or not */
00368   S->bitReverseFlag = bitReverseFlag;
00369
00370   /*  Initializations of structure parameters depending on the FFT length */
00371   switch (S->fftLen)
00372   {
00373     /*  Initializations of structure parameters for 1024 point FFT */
00374   case 1024u:
00375     /*  Initialise the twiddle coef modifier value */
00376     S->twidCoefModifier = 1u;
00377     /*  Initialise the bit reversal table modifier */
00378     S->bitRevFactor = 1u;
00379     /*  Initialise the bit reversal table pointer */
00380     S->pBitRevTable = armBitRevTable;
00381
00382     break;
00383   case 256u:
00384     /*  Initializations of structure parameters for 2566 point FFT */
00385     S->twidCoefModifier = 4u;
00386     S->bitRevFactor = 4u;
00387     S->pBitRevTable = &armBitRevTable[3];
00388
00389     break;
00390   case 64u:
00391     /*  Initializations of structure parameters for 64 point FFT */
00392     S->twidCoefModifier = 16u;
00393     S->bitRevFactor = 16u;
00394     S->pBitRevTable = &armBitRevTable[15];
00395
00396     break;
00397   case 16u:
00398     /*  Initializations of structure parameters for 16 point FFT */
00399     S->twidCoefModifier = 64u;
00400     S->bitRevFactor = 64u;
00401     S->pBitRevTable = &armBitRevTable[63];
00402
00403     break;
00404   default:
00405     /*  Reporting argument error if fftSize is not valid value */
00406     status = ARM_MATH_ARGUMENT_ERROR;
00407     break;
00408   }
00409
00410   return (status);
00411 }
00412
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_cfft_radix4_init_q31.c
00009 *
00010 * Description:  Radix-4 Decimation in Frequency Q31 FFT & IFFT initialization function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *        incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037 #include "arm_common_tables.h"
00038
00048 /*
00049 * @brief  Twiddle factors Table
00050 */
00051
00071 static const q31_t twiddleCoefQ31[2048] = {
00072   0x7fffffff, 0x0, 0x7fff6216, 0xc90f88, 0x7ffd885a, 0x1921d20, 0x7ffa72d1,
00073   0x25b26d7,
00074   0x7ff62182, 0x3242abf, 0x7ff09478, 0x3ed26e6, 0x7fe9cbc0, 0x4b6195d,
00075   0x7fe1c76b, 0x57f0035,
00076   0x7fd8878e, 0x647d97c, 0x7fce0c3e, 0x710a345, 0x7fc25596, 0x7d95b9e,
00077   0x7fb563b3, 0x8a2009a,
00078   0x7fa736b4, 0x96a9049, 0x7f97cebd, 0xa3308bd, 0x7f872bf3, 0xafb6805,
00079   0x7f754e80, 0xbc3ac35,
00080   0x7f62368f, 0xc8bd35e, 0x7f4de451, 0xd53db92, 0x7f3857f6, 0xe1bc2e4,
00081   0x7f2191b4, 0xee38766,
00082   0x7f0991c4, 0xfab272b, 0x7ef05860, 0x1072a048, 0x7ed5e5c6, 0x1139f0cf,
00083   0x7eba3a39, 0x120116d5,
00084   0x7e9d55fc, 0x12c8106f, 0x7e7f3957, 0x138edbb1, 0x7e5fe493, 0x145576b1,
00085   0x7e3f57ff, 0x151bdf86,
00086   0x7e1d93ea, 0x15e21445, 0x7dfa98a8, 0x16a81305, 0x7dd6668f, 0x176dd9de,
00087   0x7db0fdf8, 0x183366e9,
00088   0x7d8a5f40, 0x18f8b83c, 0x7d628ac6, 0x19bdcbf3, 0x7d3980ec, 0x1a82a026,
00089   0x7d0f4218, 0x1b4732ef,
00090   0x7ce3ceb2, 0x1c0b826a, 0x7cb72724, 0x1ccf8cb3, 0x7c894bde, 0x1d934fe5,
00091   0x7c5a3d50, 0x1e56ca1e,
00092   0x7c29fbee, 0x1f19f97b, 0x7bf88830, 0x1fdcdc1b, 0x7bc5e290, 0x209f701c,
00093   0x7b920b89, 0x2161b3a0,
00094   0x7b5d039e, 0x2223a4c5, 0x7b26cb4f, 0x22e541af, 0x7aef6323, 0x23a6887f,
00095   0x7ab6cba4, 0x24677758,
00096   0x7a7d055b, 0x25280c5e, 0x7a4210d8, 0x25e845b6, 0x7a05eead, 0x26a82186,
00097   0x79c89f6e, 0x27679df4,
00098   0x798a23b1, 0x2826b928, 0x794a7c12, 0x28e5714b, 0x7909a92d, 0x29a3c485,
00099   0x78c7aba2, 0x2a61b101,
00100   0x78848414, 0x2b1f34eb, 0x78403329, 0x2bdc4e6f, 0x77fab989, 0x2c98fbba,
00101   0x77b417df, 0x2d553afc,
00102   0x776c4edb, 0x2e110a62, 0x77235f2d, 0x2ecc681e, 0x76d94989, 0x2f875262,
00103   0x768e0ea6, 0x3041c761,
00104   0x7641af3d, 0x30fbc54d, 0x75f42c0b, 0x31b54a5e, 0x75a585cf, 0x326e54c7,
00105   0x7555bd4c, 0x3326e2c3,
00106   0x7504d345, 0x33def287, 0x74b2c884, 0x34968250, 0x745f9dd1, 0x354d9057,
00107   0x740b53fb, 0x36041ad9,
00108   0x73b5ebd1, 0x36ba2014, 0x735f6626, 0x376f9e46, 0x7307c3d0, 0x382493b0,
00109   0x72af05a7, 0x38d8fe93,
00110   0x72552c85, 0x398cdd32, 0x71fa3949, 0x3a402dd2, 0x719e2cd2, 0x3af2eeb7,
00111   0x71410805, 0x3ba51e29,
00112   0x70e2cbc6, 0x3c56ba70, 0x708378ff, 0x3d07c1d6, 0x7023109a, 0x3db832a6,
00113   0x6fc19385, 0x3e680b2c,
00114   0x6f5f02b2, 0x3f1749b8, 0x6efb5f12, 0x3fc5ec98, 0x6e96a99d, 0x4073f21d,
00115   0x6e30e34a, 0x4121589b,
00116   0x6dca0d14, 0x41ce1e65, 0x6d6227fa, 0x427a41d0, 0x6cf934fc, 0x4325c135,
00117   0x6c8f351c, 0x43d09aed,
00118   0x6c242960, 0x447acd50, 0x6bb812d1, 0x452456bd, 0x6b4af279, 0x45cd358f,
00119   0x6adcc964, 0x46756828,
00120   0x6a6d98a4, 0x471cece7, 0x69fd614a, 0x47c3c22f, 0x698c246c, 0x4869e665,
00121   0x6919e320, 0x490f57ee,
00122   0x68a69e81, 0x49b41533, 0x683257ab, 0x4a581c9e, 0x67bd0fbd, 0x4afb6c98,
00123   0x6746c7d8, 0x4b9e0390,
00124   0x66cf8120, 0x4c3fdff4, 0x66573cbb, 0x4ce10034, 0x65ddfbd3, 0x4d8162c4,
00125   0x6563bf92, 0x4e210617,
00126   0x64e88926, 0x4ebfe8a5, 0x646c59bf, 0x4f5e08e3, 0x63ef3290, 0x4ffb654d,
00127   0x637114cc, 0x5097fc5e,
00128   0x62f201ac, 0x5133cc94, 0x6271fa69, 0x51ced46e, 0x61f1003f, 0x5269126e,
00129   0x616f146c, 0x53028518,
00130   0x60ec3830, 0x539b2af0, 0x60686ccf, 0x5433027d, 0x5fe3b38d, 0x54ca0a4b,
00131   0x5f5e0db3, 0x556040e2,
00132   0x5ed77c8a, 0x55f5a4d2, 0x5e50015d, 0x568a34a9, 0x5dc79d7c, 0x571deefa,
00133   0x5d3e5237, 0x57b0d256,
00134   0x5cb420e0, 0x5842dd54, 0x5c290acc, 0x58d40e8c, 0x5b9d1154, 0x59646498,
00135   0x5b1035cf, 0x59f3de12,
00136   0x5a82799a, 0x5a82799a, 0x59f3de12, 0x5b1035cf, 0x59646498, 0x5b9d1154,
00137   0x58d40e8c, 0x5c290acc,
00138   0x5842dd54, 0x5cb420e0, 0x57b0d256, 0x5d3e5237, 0x571deefa, 0x5dc79d7c,
00139   0x568a34a9, 0x5e50015d,
00140   0x55f5a4d2, 0x5ed77c8a, 0x556040e2, 0x5f5e0db3, 0x54ca0a4b, 0x5fe3b38d,
00141   0x5433027d, 0x60686ccf,
00142   0x539b2af0, 0x60ec3830, 0x53028518, 0x616f146c, 0x5269126e, 0x61f1003f,
00143   0x51ced46e, 0x6271fa69,
00144   0x5133cc94, 0x62f201ac, 0x5097fc5e, 0x637114cc, 0x4ffb654d, 0x63ef3290,
00145   0x4f5e08e3, 0x646c59bf,
00146   0x4ebfe8a5, 0x64e88926, 0x4e210617, 0x6563bf92, 0x4d8162c4, 0x65ddfbd3,
00147   0x4ce10034, 0x66573cbb,
00148   0x4c3fdff4, 0x66cf8120, 0x4b9e0390, 0x6746c7d8, 0x4afb6c98, 0x67bd0fbd,
00149   0x4a581c9e, 0x683257ab,
00150   0x49b41533, 0x68a69e81, 0x490f57ee, 0x6919e320, 0x4869e665, 0x698c246c,
00151   0x47c3c22f, 0x69fd614a,
00152   0x471cece7, 0x6a6d98a4, 0x46756828, 0x6adcc964, 0x45cd358f, 0x6b4af279,
00153   0x452456bd, 0x6bb812d1,
00154   0x447acd50, 0x6c242960, 0x43d09aed, 0x6c8f351c, 0x4325c135, 0x6cf934fc,
00155   0x427a41d0, 0x6d6227fa,
00156   0x41ce1e65, 0x6dca0d14, 0x4121589b, 0x6e30e34a, 0x4073f21d, 0x6e96a99d,
00157   0x3fc5ec98, 0x6efb5f12,
00158   0x3f1749b8, 0x6f5f02b2, 0x3e680b2c, 0x6fc19385, 0x3db832a6, 0x7023109a,
00159   0x3d07c1d6, 0x708378ff,
00160   0x3c56ba70, 0x70e2cbc6, 0x3ba51e29, 0x71410805, 0x3af2eeb7, 0x719e2cd2,
00161   0x3a402dd2, 0x71fa3949,
00162   0x398cdd32, 0x72552c85, 0x38d8fe93, 0x72af05a7, 0x382493b0, 0x7307c3d0,
00163   0x376f9e46, 0x735f6626,
00164   0x36ba2014, 0x73b5ebd1, 0x36041ad9, 0x740b53fb, 0x354d9057, 0x745f9dd1,
00165   0x34968250, 0x74b2c884,
00166   0x33def287, 0x7504d345, 0x3326e2c3, 0x7555bd4c, 0x326e54c7, 0x75a585cf,
00167   0x31b54a5e, 0x75f42c0b,
00168   0x30fbc54d, 0x7641af3d, 0x3041c761, 0x768e0ea6, 0x2f875262, 0x76d94989,
00169   0x2ecc681e, 0x77235f2d,
00170   0x2e110a62, 0x776c4edb, 0x2d553afc, 0x77b417df, 0x2c98fbba, 0x77fab989,
00171   0x2bdc4e6f, 0x78403329,
00172   0x2b1f34eb, 0x78848414, 0x2a61b101, 0x78c7aba2, 0x29a3c485, 0x7909a92d,
00173   0x28e5714b, 0x794a7c12,
00174   0x2826b928, 0x798a23b1, 0x27679df4, 0x79c89f6e, 0x26a82186, 0x7a05eead,
00175   0x25e845b6, 0x7a4210d8,
00176   0x25280c5e, 0x7a7d055b, 0x24677758, 0x7ab6cba4, 0x23a6887f, 0x7aef6323,
00177   0x22e541af, 0x7b26cb4f,
00178   0x2223a4c5, 0x7b5d039e, 0x2161b3a0, 0x7b920b89, 0x209f701c, 0x7bc5e290,
00179   0x1fdcdc1b, 0x7bf88830,
00180   0x1f19f97b, 0x7c29fbee, 0x1e56ca1e, 0x7c5a3d50, 0x1d934fe5, 0x7c894bde,
00181   0x1ccf8cb3, 0x7cb72724,
00182   0x1c0b826a, 0x7ce3ceb2, 0x1b4732ef, 0x7d0f4218, 0x1a82a026, 0x7d3980ec,
00183   0x19bdcbf3, 0x7d628ac6,
00184   0x18f8b83c, 0x7d8a5f40, 0x183366e9, 0x7db0fdf8, 0x176dd9de, 0x7dd6668f,
00185   0x16a81305, 0x7dfa98a8,
00186   0x15e21445, 0x7e1d93ea, 0x151bdf86, 0x7e3f57ff, 0x145576b1, 0x7e5fe493,
00187   0x138edbb1, 0x7e7f3957,
00188   0x12c8106f, 0x7e9d55fc, 0x120116d5, 0x7eba3a39, 0x1139f0cf, 0x7ed5e5c6,
00189   0x1072a048, 0x7ef05860,
00190   0xfab272b, 0x7f0991c4, 0xee38766, 0x7f2191b4, 0xe1bc2e4, 0x7f3857f6,
00191   0xd53db92, 0x7f4de451,
00192   0xc8bd35e, 0x7f62368f, 0xbc3ac35, 0x7f754e80, 0xafb6805, 0x7f872bf3,
00193   0xa3308bd, 0x7f97cebd,
00194   0x96a9049, 0x7fa736b4, 0x8a2009a, 0x7fb563b3, 0x7d95b9e, 0x7fc25596,
00195   0x710a345, 0x7fce0c3e,
00196   0x647d97c, 0x7fd8878e, 0x57f0035, 0x7fe1c76b, 0x4b6195d, 0x7fe9cbc0,
00197   0x3ed26e6, 0x7ff09478,
00198   0x3242abf, 0x7ff62182, 0x25b26d7, 0x7ffa72d1, 0x1921d20, 0x7ffd885a,
00199   0xc90f88, 0x7fff6216,
00200   0x0, 0x7fffffff, 0xff36f078, 0x7fff6216, 0xfe6de2e0, 0x7ffd885a, 0xfda4d929,
00201   0x7ffa72d1,
00202   0xfcdbd541, 0x7ff62182, 0xfc12d91a, 0x7ff09478, 0xfb49e6a3, 0x7fe9cbc0,
00203   0xfa80ffcb, 0x7fe1c76b,
00204   0xf9b82684, 0x7fd8878e, 0xf8ef5cbb, 0x7fce0c3e, 0xf826a462, 0x7fc25596,
00205   0xf75dff66, 0x7fb563b3,
00206   0xf6956fb7, 0x7fa736b4, 0xf5ccf743, 0x7f97cebd, 0xf50497fb, 0x7f872bf3,
00207   0xf43c53cb, 0x7f754e80,
00208   0xf3742ca2, 0x7f62368f, 0xf2ac246e, 0x7f4de451, 0xf1e43d1c, 0x7f3857f6,
00209   0xf11c789a, 0x7f2191b4,
00210   0xf054d8d5, 0x7f0991c4, 0xef8d5fb8, 0x7ef05860, 0xeec60f31, 0x7ed5e5c6,
00211   0xedfee92b, 0x7eba3a39,
00212   0xed37ef91, 0x7e9d55fc, 0xec71244f, 0x7e7f3957, 0xebaa894f, 0x7e5fe493,
00213   0xeae4207a, 0x7e3f57ff,
00214   0xea1debbb, 0x7e1d93ea, 0xe957ecfb, 0x7dfa98a8, 0xe8922622, 0x7dd6668f,
00215   0xe7cc9917, 0x7db0fdf8,
00216   0xe70747c4, 0x7d8a5f40, 0xe642340d, 0x7d628ac6, 0xe57d5fda, 0x7d3980ec,
00217   0xe4b8cd11, 0x7d0f4218,
00218   0xe3f47d96, 0x7ce3ceb2, 0xe330734d, 0x7cb72724, 0xe26cb01b, 0x7c894bde,
00219   0xe1a935e2, 0x7c5a3d50,
00220   0xe0e60685, 0x7c29fbee, 0xe02323e5, 0x7bf88830, 0xdf608fe4, 0x7bc5e290,
00221   0xde9e4c60, 0x7b920b89,
00222   0xdddc5b3b, 0x7b5d039e, 0xdd1abe51, 0x7b26cb4f, 0xdc597781, 0x7aef6323,
00223   0xdb9888a8, 0x7ab6cba4,
00224   0xdad7f3a2, 0x7a7d055b, 0xda17ba4a, 0x7a4210d8, 0xd957de7a, 0x7a05eead,
00225   0xd898620c, 0x79c89f6e,
00226   0xd7d946d8, 0x798a23b1, 0xd71a8eb5, 0x794a7c12, 0xd65c3b7b, 0x7909a92d,
00227   0xd59e4eff, 0x78c7aba2,
00228   0xd4e0cb15, 0x78848414, 0xd423b191, 0x78403329, 0xd3670446, 0x77fab989,
00229   0xd2aac504, 0x77b417df,
00230   0xd1eef59e, 0x776c4edb, 0xd13397e2, 0x77235f2d, 0xd078ad9e, 0x76d94989,
00231   0xcfbe389f, 0x768e0ea6,
00232   0xcf043ab3, 0x7641af3d, 0xce4ab5a2, 0x75f42c0b, 0xcd91ab39, 0x75a585cf,
00233   0xccd91d3d, 0x7555bd4c,
00234   0xcc210d79, 0x7504d345, 0xcb697db0, 0x74b2c884, 0xcab26fa9, 0x745f9dd1,
00235   0xc9fbe527, 0x740b53fb,
00236   0xc945dfec, 0x73b5ebd1, 0xc89061ba, 0x735f6626, 0xc7db6c50, 0x7307c3d0,
00237   0xc727016d, 0x72af05a7,
00238   0xc67322ce, 0x72552c85, 0xc5bfd22e, 0x71fa3949, 0xc50d1149, 0x719e2cd2,
00239   0xc45ae1d7, 0x71410805,
00240   0xc3a94590, 0x70e2cbc6, 0xc2f83e2a, 0x708378ff, 0xc247cd5a, 0x7023109a,
00241   0xc197f4d4, 0x6fc19385,
00242   0xc0e8b648, 0x6f5f02b2, 0xc03a1368, 0x6efb5f12, 0xbf8c0de3, 0x6e96a99d,
00243   0xbedea765, 0x6e30e34a,
00244   0xbe31e19b, 0x6dca0d14, 0xbd85be30, 0x6d6227fa, 0xbcda3ecb, 0x6cf934fc,
00245   0xbc2f6513, 0x6c8f351c,
00246   0xbb8532b0, 0x6c242960, 0xbadba943, 0x6bb812d1, 0xba32ca71, 0x6b4af279,
00247   0xb98a97d8, 0x6adcc964,
00248   0xb8e31319, 0x6a6d98a4, 0xb83c3dd1, 0x69fd614a, 0xb796199b, 0x698c246c,
00249   0xb6f0a812, 0x6919e320,
00250   0xb64beacd, 0x68a69e81, 0xb5a7e362, 0x683257ab, 0xb5049368, 0x67bd0fbd,
00251   0xb461fc70, 0x6746c7d8,
00252   0xb3c0200c, 0x66cf8120, 0xb31effcc, 0x66573cbb, 0xb27e9d3c, 0x65ddfbd3,
00253   0xb1def9e9, 0x6563bf92,
00254   0xb140175b, 0x64e88926, 0xb0a1f71d, 0x646c59bf, 0xb0049ab3, 0x63ef3290,
00255   0xaf6803a2, 0x637114cc,
00256   0xaecc336c, 0x62f201ac, 0xae312b92, 0x6271fa69, 0xad96ed92, 0x61f1003f,
00257   0xacfd7ae8, 0x616f146c,
00258   0xac64d510, 0x60ec3830, 0xabccfd83, 0x60686ccf, 0xab35f5b5, 0x5fe3b38d,
00259   0xaa9fbf1e, 0x5f5e0db3,
00260   0xaa0a5b2e, 0x5ed77c8a, 0xa975cb57, 0x5e50015d, 0xa8e21106, 0x5dc79d7c,
00261   0xa84f2daa, 0x5d3e5237,
00262   0xa7bd22ac, 0x5cb420e0, 0xa72bf174, 0x5c290acc, 0xa69b9b68, 0x5b9d1154,
00263   0xa60c21ee, 0x5b1035cf,
00264   0xa57d8666, 0x5a82799a, 0xa4efca31, 0x59f3de12, 0xa462eeac, 0x59646498,
00265   0xa3d6f534, 0x58d40e8c,
00266   0xa34bdf20, 0x5842dd54, 0xa2c1adc9, 0x57b0d256, 0xa2386284, 0x571deefa,
00267   0xa1affea3, 0x568a34a9,
00268   0xa1288376, 0x55f5a4d2, 0xa0a1f24d, 0x556040e2, 0xa01c4c73, 0x54ca0a4b,
00269   0x9f979331, 0x5433027d,
00270   0x9f13c7d0, 0x539b2af0, 0x9e90eb94, 0x53028518, 0x9e0effc1, 0x5269126e,
00271   0x9d8e0597, 0x51ced46e,
00272   0x9d0dfe54, 0x5133cc94, 0x9c8eeb34, 0x5097fc5e, 0x9c10cd70, 0x4ffb654d,
00273   0x9b93a641, 0x4f5e08e3,
00274   0x9b1776da, 0x4ebfe8a5, 0x9a9c406e, 0x4e210617, 0x9a22042d, 0x4d8162c4,
00275   0x99a8c345, 0x4ce10034,
00276   0x99307ee0, 0x4c3fdff4, 0x98b93828, 0x4b9e0390, 0x9842f043, 0x4afb6c98,
00277   0x97cda855, 0x4a581c9e,
00278   0x9759617f, 0x49b41533, 0x96e61ce0, 0x490f57ee, 0x9673db94, 0x4869e665,
00279   0x96029eb6, 0x47c3c22f,
00280   0x9592675c, 0x471cece7, 0x9523369c, 0x46756828, 0x94b50d87, 0x45cd358f,
00281   0x9447ed2f, 0x452456bd,
00282   0x93dbd6a0, 0x447acd50, 0x9370cae4, 0x43d09aed, 0x9306cb04, 0x4325c135,
00283   0x929dd806, 0x427a41d0,
00284   0x9235f2ec, 0x41ce1e65, 0x91cf1cb6, 0x4121589b, 0x91695663, 0x4073f21d,
00285   0x9104a0ee, 0x3fc5ec98,
00286   0x90a0fd4e, 0x3f1749b8, 0x903e6c7b, 0x3e680b2c, 0x8fdcef66, 0x3db832a6,
00287   0x8f7c8701, 0x3d07c1d6,
00288   0x8f1d343a, 0x3c56ba70, 0x8ebef7fb, 0x3ba51e29, 0x8e61d32e, 0x3af2eeb7,
00289   0x8e05c6b7, 0x3a402dd2,
00290   0x8daad37b, 0x398cdd32, 0x8d50fa59, 0x38d8fe93, 0x8cf83c30, 0x382493b0,
00291   0x8ca099da, 0x376f9e46,
00292   0x8c4a142f, 0x36ba2014, 0x8bf4ac05, 0x36041ad9, 0x8ba0622f, 0x354d9057,
00293   0x8b4d377c, 0x34968250,
00294   0x8afb2cbb, 0x33def287, 0x8aaa42b4, 0x3326e2c3, 0x8a5a7a31, 0x326e54c7,
00295   0x8a0bd3f5, 0x31b54a5e,
00296   0x89be50c3, 0x30fbc54d, 0x8971f15a, 0x3041c761, 0x8926b677, 0x2f875262,
00297   0x88dca0d3, 0x2ecc681e,
00298   0x8893b125, 0x2e110a62, 0x884be821, 0x2d553afc, 0x88054677, 0x2c98fbba,
00299   0x87bfccd7, 0x2bdc4e6f,
00300   0x877b7bec, 0x2b1f34eb, 0x8738545e, 0x2a61b101, 0x86f656d3, 0x29a3c485,
00301   0x86b583ee, 0x28e5714b,
00302   0x8675dc4f, 0x2826b928, 0x86376092, 0x27679df4, 0x85fa1153, 0x26a82186,
00303   0x85bdef28, 0x25e845b6,
00304   0x8582faa5, 0x25280c5e, 0x8549345c, 0x24677758, 0x85109cdd, 0x23a6887f,
00305   0x84d934b1, 0x22e541af,
00306   0x84a2fc62, 0x2223a4c5, 0x846df477, 0x2161b3a0, 0x843a1d70, 0x209f701c,
00307   0x840777d0, 0x1fdcdc1b,
00308   0x83d60412, 0x1f19f97b, 0x83a5c2b0, 0x1e56ca1e, 0x8376b422, 0x1d934fe5,
00309   0x8348d8dc, 0x1ccf8cb3,
00310   0x831c314e, 0x1c0b826a, 0x82f0bde8, 0x1b4732ef, 0x82c67f14, 0x1a82a026,
00311   0x829d753a, 0x19bdcbf3,
00312   0x8275a0c0, 0x18f8b83c, 0x824f0208, 0x183366e9, 0x82299971, 0x176dd9de,
00313   0x82056758, 0x16a81305,
00314   0x81e26c16, 0x15e21445, 0x81c0a801, 0x151bdf86, 0x81a01b6d, 0x145576b1,
00315   0x8180c6a9, 0x138edbb1,
00316   0x8162aa04, 0x12c8106f, 0x8145c5c7, 0x120116d5, 0x812a1a3a, 0x1139f0cf,
00317   0x810fa7a0, 0x1072a048,
00318   0x80f66e3c, 0xfab272b, 0x80de6e4c, 0xee38766, 0x80c7a80a, 0xe1bc2e4,
00319   0x80b21baf, 0xd53db92,
00320   0x809dc971, 0xc8bd35e, 0x808ab180, 0xbc3ac35, 0x8078d40d, 0xafb6805,
00321   0x80683143, 0xa3308bd,
00322   0x8058c94c, 0x96a9049, 0x804a9c4d, 0x8a2009a, 0x803daa6a, 0x7d95b9e,
00323   0x8031f3c2, 0x710a345,
00324   0x80277872, 0x647d97c, 0x801e3895, 0x57f0035, 0x80163440, 0x4b6195d,
00325   0x800f6b88, 0x3ed26e6,
00326   0x8009de7e, 0x3242abf, 0x80058d2f, 0x25b26d7, 0x800277a6, 0x1921d20,
00327   0x80009dea, 0xc90f88,
00328   0x80000000, 0x0, 0x80009dea, 0xff36f078, 0x800277a6, 0xfe6de2e0, 0x80058d2f,
00329   0xfda4d929,
00330   0x8009de7e, 0xfcdbd541, 0x800f6b88, 0xfc12d91a, 0x80163440, 0xfb49e6a3,
00331   0x801e3895, 0xfa80ffcb,
00332   0x80277872, 0xf9b82684, 0x8031f3c2, 0xf8ef5cbb, 0x803daa6a, 0xf826a462,
00333   0x804a9c4d, 0xf75dff66,
00334   0x8058c94c, 0xf6956fb7, 0x80683143, 0xf5ccf743, 0x8078d40d, 0xf50497fb,
00335   0x808ab180, 0xf43c53cb,
00336   0x809dc971, 0xf3742ca2, 0x80b21baf, 0xf2ac246e, 0x80c7a80a, 0xf1e43d1c,
00337   0x80de6e4c, 0xf11c789a,
00338   0x80f66e3c, 0xf054d8d5, 0x810fa7a0, 0xef8d5fb8, 0x812a1a3a, 0xeec60f31,
00339   0x8145c5c7, 0xedfee92b,
00340   0x8162aa04, 0xed37ef91, 0x8180c6a9, 0xec71244f, 0x81a01b6d, 0xebaa894f,
00341   0x81c0a801, 0xeae4207a,
00342   0x81e26c16, 0xea1debbb, 0x82056758, 0xe957ecfb, 0x82299971, 0xe8922622,
00343   0x824f0208, 0xe7cc9917,
00344   0x8275a0c0, 0xe70747c4, 0x829d753a, 0xe642340d, 0x82c67f14, 0xe57d5fda,
00345   0x82f0bde8, 0xe4b8cd11,
00346   0x831c314e, 0xe3f47d96, 0x8348d8dc, 0xe330734d, 0x8376b422, 0xe26cb01b,
00347   0x83a5c2b0, 0xe1a935e2,
00348   0x83d60412, 0xe0e60685, 0x840777d0, 0xe02323e5, 0x843a1d70, 0xdf608fe4,
00349   0x846df477, 0xde9e4c60,
00350   0x84a2fc62, 0xdddc5b3b, 0x84d934b1, 0xdd1abe51, 0x85109cdd, 0xdc597781,
00351   0x8549345c, 0xdb9888a8,
00352   0x8582faa5, 0xdad7f3a2, 0x85bdef28, 0xda17ba4a, 0x85fa1153, 0xd957de7a,
00353   0x86376092, 0xd898620c,
00354   0x8675dc4f, 0xd7d946d8, 0x86b583ee, 0xd71a8eb5, 0x86f656d3, 0xd65c3b7b,
00355   0x8738545e, 0xd59e4eff,
00356   0x877b7bec, 0xd4e0cb15, 0x87bfccd7, 0xd423b191, 0x88054677, 0xd3670446,
00357   0x884be821, 0xd2aac504,
00358   0x8893b125, 0xd1eef59e, 0x88dca0d3, 0xd13397e2, 0x8926b677, 0xd078ad9e,
00359   0x8971f15a, 0xcfbe389f,
00360   0x89be50c3, 0xcf043ab3, 0x8a0bd3f5, 0xce4ab5a2, 0x8a5a7a31, 0xcd91ab39,
00361   0x8aaa42b4, 0xccd91d3d,
00362   0x8afb2cbb, 0xcc210d79, 0x8b4d377c, 0xcb697db0, 0x8ba0622f, 0xcab26fa9,
00363   0x8bf4ac05, 0xc9fbe527,
00364   0x8c4a142f, 0xc945dfec, 0x8ca099da, 0xc89061ba, 0x8cf83c30, 0xc7db6c50,
00365   0x8d50fa59, 0xc727016d,
00366   0x8daad37b, 0xc67322ce, 0x8e05c6b7, 0xc5bfd22e, 0x8e61d32e, 0xc50d1149,
00367   0x8ebef7fb, 0xc45ae1d7,
00368   0x8f1d343a, 0xc3a94590, 0x8f7c8701, 0xc2f83e2a, 0x8fdcef66, 0xc247cd5a,
00369   0x903e6c7b, 0xc197f4d4,
00370   0x90a0fd4e, 0xc0e8b648, 0x9104a0ee, 0xc03a1368, 0x91695663, 0xbf8c0de3,
00371   0x91cf1cb6, 0xbedea765,
00372   0x9235f2ec, 0xbe31e19b, 0x929dd806, 0xbd85be30, 0x9306cb04, 0xbcda3ecb,
00373   0x9370cae4, 0xbc2f6513,
00374   0x93dbd6a0, 0xbb8532b0, 0x9447ed2f, 0xbadba943, 0x94b50d87, 0xba32ca71,
00375   0x9523369c, 0xb98a97d8,
00376   0x9592675c, 0xb8e31319, 0x96029eb6, 0xb83c3dd1, 0x9673db94, 0xb796199b,
00377   0x96e61ce0, 0xb6f0a812,
00378   0x9759617f, 0xb64beacd, 0x97cda855, 0xb5a7e362, 0x9842f043, 0xb5049368,
00379   0x98b93828, 0xb461fc70,
00380   0x99307ee0, 0xb3c0200c, 0x99a8c345, 0xb31effcc, 0x9a22042d, 0xb27e9d3c,
00381   0x9a9c406e, 0xb1def9e9,
00382   0x9b1776da, 0xb140175b, 0x9b93a641, 0xb0a1f71d, 0x9c10cd70, 0xb0049ab3,
00383   0x9c8eeb34, 0xaf6803a2,
00384   0x9d0dfe54, 0xaecc336c, 0x9d8e0597, 0xae312b92, 0x9e0effc1, 0xad96ed92,
00385   0x9e90eb94, 0xacfd7ae8,
00386   0x9f13c7d0, 0xac64d510, 0x9f979331, 0xabccfd83, 0xa01c4c73, 0xab35f5b5,
00387   0xa0a1f24d, 0xaa9fbf1e,
00388   0xa1288376, 0xaa0a5b2e, 0xa1affea3, 0xa975cb57, 0xa2386284, 0xa8e21106,
00389   0xa2c1adc9, 0xa84f2daa,
00390   0xa34bdf20, 0xa7bd22ac, 0xa3d6f534, 0xa72bf174, 0xa462eeac, 0xa69b9b68,
00391   0xa4efca31, 0xa60c21ee,
00392   0xa57d8666, 0xa57d8666, 0xa60c21ee, 0xa4efca31, 0xa69b9b68, 0xa462eeac,
00393   0xa72bf174, 0xa3d6f534,
00394   0xa7bd22ac, 0xa34bdf20, 0xa84f2daa, 0xa2c1adc9, 0xa8e21106, 0xa2386284,
00395   0xa975cb57, 0xa1affea3,
00396   0xaa0a5b2e, 0xa1288376, 0xaa9fbf1e, 0xa0a1f24d, 0xab35f5b5, 0xa01c4c73,
00397   0xabccfd83, 0x9f979331,
00398   0xac64d510, 0x9f13c7d0, 0xacfd7ae8, 0x9e90eb94, 0xad96ed92, 0x9e0effc1,
00399   0xae312b92, 0x9d8e0597,
00400   0xaecc336c, 0x9d0dfe54, 0xaf6803a2, 0x9c8eeb34, 0xb0049ab3, 0x9c10cd70,
00401   0xb0a1f71d, 0x9b93a641,
00402   0xb140175b, 0x9b1776da, 0xb1def9e9, 0x9a9c406e, 0xb27e9d3c, 0x9a22042d,
00403   0xb31effcc, 0x99a8c345,
00404   0xb3c0200c, 0x99307ee0, 0xb461fc70, 0x98b93828, 0xb5049368, 0x9842f043,
00405   0xb5a7e362, 0x97cda855,
00406   0xb64beacd, 0x9759617f, 0xb6f0a812, 0x96e61ce0, 0xb796199b, 0x9673db94,
00407   0xb83c3dd1, 0x96029eb6,
00408   0xb8e31319, 0x9592675c, 0xb98a97d8, 0x9523369c, 0xba32ca71, 0x94b50d87,
00409   0xbadba943, 0x9447ed2f,
00410   0xbb8532b0, 0x93dbd6a0, 0xbc2f6513, 0x9370cae4, 0xbcda3ecb, 0x9306cb04,
00411   0xbd85be30, 0x929dd806,
00412   0xbe31e19b, 0x9235f2ec, 0xbedea765, 0x91cf1cb6, 0xbf8c0de3, 0x91695663,
00413   0xc03a1368, 0x9104a0ee,
00414   0xc0e8b648, 0x90a0fd4e, 0xc197f4d4, 0x903e6c7b, 0xc247cd5a, 0x8fdcef66,
00415   0xc2f83e2a, 0x8f7c8701,
00416   0xc3a94590, 0x8f1d343a, 0xc45ae1d7, 0x8ebef7fb, 0xc50d1149, 0x8e61d32e,
00417   0xc5bfd22e, 0x8e05c6b7,
00418   0xc67322ce, 0x8daad37b, 0xc727016d, 0x8d50fa59, 0xc7db6c50, 0x8cf83c30,
00419   0xc89061ba, 0x8ca099da,
00420   0xc945dfec, 0x8c4a142f, 0xc9fbe527, 0x8bf4ac05, 0xcab26fa9, 0x8ba0622f,
00421   0xcb697db0, 0x8b4d377c,
00422   0xcc210d79, 0x8afb2cbb, 0xccd91d3d, 0x8aaa42b4, 0xcd91ab39, 0x8a5a7a31,
00423   0xce4ab5a2, 0x8a0bd3f5,
00424   0xcf043ab3, 0x89be50c3, 0xcfbe389f, 0x8971f15a, 0xd078ad9e, 0x8926b677,
00425   0xd13397e2, 0x88dca0d3,
00426   0xd1eef59e, 0x8893b125, 0xd2aac504, 0x884be821, 0xd3670446, 0x88054677,
00427   0xd423b191, 0x87bfccd7,
00428   0xd4e0cb15, 0x877b7bec, 0xd59e4eff, 0x8738545e, 0xd65c3b7b, 0x86f656d3,
00429   0xd71a8eb5, 0x86b583ee,
00430   0xd7d946d8, 0x8675dc4f, 0xd898620c, 0x86376092, 0xd957de7a, 0x85fa1153,
00431   0xda17ba4a, 0x85bdef28,
00432   0xdad7f3a2, 0x8582faa5, 0xdb9888a8, 0x8549345c, 0xdc597781, 0x85109cdd,
00433   0xdd1abe51, 0x84d934b1,
00434   0xdddc5b3b, 0x84a2fc62, 0xde9e4c60, 0x846df477, 0xdf608fe4, 0x843a1d70,
00435   0xe02323e5, 0x840777d0,
00436   0xe0e60685, 0x83d60412, 0xe1a935e2, 0x83a5c2b0, 0xe26cb01b, 0x8376b422,
00437   0xe330734d, 0x8348d8dc,
00438   0xe3f47d96, 0x831c314e, 0xe4b8cd11, 0x82f0bde8, 0xe57d5fda, 0x82c67f14,
00439   0xe642340d, 0x829d753a,
00440   0xe70747c4, 0x8275a0c0, 0xe7cc9917, 0x824f0208, 0xe8922622, 0x82299971,
00441   0xe957ecfb, 0x82056758,
00442   0xea1debbb, 0x81e26c16, 0xeae4207a, 0x81c0a801, 0xebaa894f, 0x81a01b6d,
00443   0xec71244f, 0x8180c6a9,
00444   0xed37ef91, 0x8162aa04, 0xedfee92b, 0x8145c5c7, 0xeec60f31, 0x812a1a3a,
00445   0xef8d5fb8, 0x810fa7a0,
00446   0xf054d8d5, 0x80f66e3c, 0xf11c789a, 0x80de6e4c, 0xf1e43d1c, 0x80c7a80a,
00447   0xf2ac246e, 0x80b21baf,
00448   0xf3742ca2, 0x809dc971, 0xf43c53cb, 0x808ab180, 0xf50497fb, 0x8078d40d,
00449   0xf5ccf743, 0x80683143,
00450   0xf6956fb7, 0x8058c94c, 0xf75dff66, 0x804a9c4d, 0xf826a462, 0x803daa6a,
00451   0xf8ef5cbb, 0x8031f3c2,
00452   0xf9b82684, 0x80277872, 0xfa80ffcb, 0x801e3895, 0xfb49e6a3, 0x80163440,
00453   0xfc12d91a, 0x800f6b88,
00454   0xfcdbd541, 0x8009de7e, 0xfda4d929, 0x80058d2f, 0xfe6de2e0, 0x800277a6,
00455   0xff36f078, 0x80009dea,
00456   0x0, 0x80000000, 0xc90f88, 0x80009dea, 0x1921d20, 0x800277a6, 0x25b26d7,
00457   0x80058d2f,
00458   0x3242abf, 0x8009de7e, 0x3ed26e6, 0x800f6b88, 0x4b6195d, 0x80163440,
00459   0x57f0035, 0x801e3895,
00460   0x647d97c, 0x80277872, 0x710a345, 0x8031f3c2, 0x7d95b9e, 0x803daa6a,
00461   0x8a2009a, 0x804a9c4d,
00462   0x96a9049, 0x8058c94c, 0xa3308bd, 0x80683143, 0xafb6805, 0x8078d40d,
00463   0xbc3ac35, 0x808ab180,
00464   0xc8bd35e, 0x809dc971, 0xd53db92, 0x80b21baf, 0xe1bc2e4, 0x80c7a80a,
00465   0xee38766, 0x80de6e4c,
00466   0xfab272b, 0x80f66e3c, 0x1072a048, 0x810fa7a0, 0x1139f0cf, 0x812a1a3a,
00467   0x120116d5, 0x8145c5c7,
00468   0x12c8106f, 0x8162aa04, 0x138edbb1, 0x8180c6a9, 0x145576b1, 0x81a01b6d,
00469   0x151bdf86, 0x81c0a801,
00470   0x15e21445, 0x81e26c16, 0x16a81305, 0x82056758, 0x176dd9de, 0x82299971,
00471   0x183366e9, 0x824f0208,
00472   0x18f8b83c, 0x8275a0c0, 0x19bdcbf3, 0x829d753a, 0x1a82a026, 0x82c67f14,
00473   0x1b4732ef, 0x82f0bde8,
00474   0x1c0b826a, 0x831c314e, 0x1ccf8cb3, 0x8348d8dc, 0x1d934fe5, 0x8376b422,
00475   0x1e56ca1e, 0x83a5c2b0,
00476   0x1f19f97b, 0x83d60412, 0x1fdcdc1b, 0x840777d0, 0x209f701c, 0x843a1d70,
00477   0x2161b3a0, 0x846df477,
00478   0x2223a4c5, 0x84a2fc62, 0x22e541af, 0x84d934b1, 0x23a6887f, 0x85109cdd,
00479   0x24677758, 0x8549345c,
00480   0x25280c5e, 0x8582faa5, 0x25e845b6, 0x85bdef28, 0x26a82186, 0x85fa1153,
00481   0x27679df4, 0x86376092,
00482   0x2826b928, 0x8675dc4f, 0x28e5714b, 0x86b583ee, 0x29a3c485, 0x86f656d3,
00483   0x2a61b101, 0x8738545e,
00484   0x2b1f34eb, 0x877b7bec, 0x2bdc4e6f, 0x87bfccd7, 0x2c98fbba, 0x88054677,
00485   0x2d553afc, 0x884be821,
00486   0x2e110a62, 0x8893b125, 0x2ecc681e, 0x88dca0d3, 0x2f875262, 0x8926b677,
00487   0x3041c761, 0x8971f15a,
00488   0x30fbc54d, 0x89be50c3, 0x31b54a5e, 0x8a0bd3f5, 0x326e54c7, 0x8a5a7a31,
00489   0x3326e2c3, 0x8aaa42b4,
00490   0x33def287, 0x8afb2cbb, 0x34968250, 0x8b4d377c, 0x354d9057, 0x8ba0622f,
00491   0x36041ad9, 0x8bf4ac05,
00492   0x36ba2014, 0x8c4a142f, 0x376f9e46, 0x8ca099da, 0x382493b0, 0x8cf83c30,
00493   0x38d8fe93, 0x8d50fa59,
00494   0x398cdd32, 0x8daad37b, 0x3a402dd2, 0x8e05c6b7, 0x3af2eeb7, 0x8e61d32e,
00495   0x3ba51e29, 0x8ebef7fb,
00496   0x3c56ba70, 0x8f1d343a, 0x3d07c1d6, 0x8f7c8701, 0x3db832a6, 0x8fdcef66,
00497   0x3e680b2c, 0x903e6c7b,
00498   0x3f1749b8, 0x90a0fd4e, 0x3fc5ec98, 0x9104a0ee, 0x4073f21d, 0x91695663,
00499   0x4121589b, 0x91cf1cb6,
00500   0x41ce1e65, 0x9235f2ec, 0x427a41d0, 0x929dd806, 0x4325c135, 0x9306cb04,
00501   0x43d09aed, 0x9370cae4,
00502   0x447acd50, 0x93dbd6a0, 0x452456bd, 0x9447ed2f, 0x45cd358f, 0x94b50d87,
00503   0x46756828, 0x9523369c,
00504   0x471cece7, 0x9592675c, 0x47c3c22f, 0x96029eb6, 0x4869e665, 0x9673db94,
00505   0x490f57ee, 0x96e61ce0,
00506   0x49b41533, 0x9759617f, 0x4a581c9e, 0x97cda855, 0x4afb6c98, 0x9842f043,
00507   0x4b9e0390, 0x98b93828,
00508   0x4c3fdff4, 0x99307ee0, 0x4ce10034, 0x99a8c345, 0x4d8162c4, 0x9a22042d,
00509   0x4e210617, 0x9a9c406e,
00510   0x4ebfe8a5, 0x9b1776da, 0x4f5e08e3, 0x9b93a641, 0x4ffb654d, 0x9c10cd70,
00511   0x5097fc5e, 0x9c8eeb34,
00512   0x5133cc94, 0x9d0dfe54, 0x51ced46e, 0x9d8e0597, 0x5269126e, 0x9e0effc1,
00513   0x53028518, 0x9e90eb94,
00514   0x539b2af0, 0x9f13c7d0, 0x5433027d, 0x9f979331, 0x54ca0a4b, 0xa01c4c73,
00515   0x556040e2, 0xa0a1f24d,
00516   0x55f5a4d2, 0xa1288376, 0x568a34a9, 0xa1affea3, 0x571deefa, 0xa2386284,
00517   0x57b0d256, 0xa2c1adc9,
00518   0x5842dd54, 0xa34bdf20, 0x58d40e8c, 0xa3d6f534, 0x59646498, 0xa462eeac,
00519   0x59f3de12, 0xa4efca31,
00520   0x5a82799a, 0xa57d8666, 0x5b1035cf, 0xa60c21ee, 0x5b9d1154, 0xa69b9b68,
00521   0x5c290acc, 0xa72bf174,
00522   0x5cb420e0, 0xa7bd22ac, 0x5d3e5237, 0xa84f2daa, 0x5dc79d7c, 0xa8e21106,
00523   0x5e50015d, 0xa975cb57,
00524   0x5ed77c8a, 0xaa0a5b2e, 0x5f5e0db3, 0xaa9fbf1e, 0x5fe3b38d, 0xab35f5b5,
00525   0x60686ccf, 0xabccfd83,
00526   0x60ec3830, 0xac64d510, 0x616f146c, 0xacfd7ae8, 0x61f1003f, 0xad96ed92,
00527   0x6271fa69, 0xae312b92,
00528   0x62f201ac, 0xaecc336c, 0x637114cc, 0xaf6803a2, 0x63ef3290, 0xb0049ab3,
00529   0x646c59bf, 0xb0a1f71d,
00530   0x64e88926, 0xb140175b, 0x6563bf92, 0xb1def9e9, 0x65ddfbd3, 0xb27e9d3c,
00531   0x66573cbb, 0xb31effcc,
00532   0x66cf8120, 0xb3c0200c, 0x6746c7d8, 0xb461fc70, 0x67bd0fbd, 0xb5049368,
00533   0x683257ab, 0xb5a7e362,
00534   0x68a69e81, 0xb64beacd, 0x6919e320, 0xb6f0a812, 0x698c246c, 0xb796199b,
00535   0x69fd614a, 0xb83c3dd1,
00536   0x6a6d98a4, 0xb8e31319, 0x6adcc964, 0xb98a97d8, 0x6b4af279, 0xba32ca71,
00537   0x6bb812d1, 0xbadba943,
00538   0x6c242960, 0xbb8532b0, 0x6c8f351c, 0xbc2f6513, 0x6cf934fc, 0xbcda3ecb,
00539   0x6d6227fa, 0xbd85be30,
00540   0x6dca0d14, 0xbe31e19b, 0x6e30e34a, 0xbedea765, 0x6e96a99d, 0xbf8c0de3,
00541   0x6efb5f12, 0xc03a1368,
00542   0x6f5f02b2, 0xc0e8b648, 0x6fc19385, 0xc197f4d4, 0x7023109a, 0xc247cd5a,
00543   0x708378ff, 0xc2f83e2a,
00544   0x70e2cbc6, 0xc3a94590, 0x71410805, 0xc45ae1d7, 0x719e2cd2, 0xc50d1149,
00545   0x71fa3949, 0xc5bfd22e,
00546   0x72552c85, 0xc67322ce, 0x72af05a7, 0xc727016d, 0x7307c3d0, 0xc7db6c50,
00547   0x735f6626, 0xc89061ba,
00548   0x73b5ebd1, 0xc945dfec, 0x740b53fb, 0xc9fbe527, 0x745f9dd1, 0xcab26fa9,
00549   0x74b2c884, 0xcb697db0,
00550   0x7504d345, 0xcc210d79, 0x7555bd4c, 0xccd91d3d, 0x75a585cf, 0xcd91ab39,
00551   0x75f42c0b, 0xce4ab5a2,
00552   0x7641af3d, 0xcf043ab3, 0x768e0ea6, 0xcfbe389f, 0x76d94989, 0xd078ad9e,
00553   0x77235f2d, 0xd13397e2,
00554   0x776c4edb, 0xd1eef59e, 0x77b417df, 0xd2aac504, 0x77fab989, 0xd3670446,
00555   0x78403329, 0xd423b191,
00556   0x78848414, 0xd4e0cb15, 0x78c7aba2, 0xd59e4eff, 0x7909a92d, 0xd65c3b7b,
00557   0x794a7c12, 0xd71a8eb5,
00558   0x798a23b1, 0xd7d946d8, 0x79c89f6e, 0xd898620c, 0x7a05eead, 0xd957de7a,
00559   0x7a4210d8, 0xda17ba4a,
00560   0x7a7d055b, 0xdad7f3a2, 0x7ab6cba4, 0xdb9888a8, 0x7aef6323, 0xdc597781,
00561   0x7b26cb4f, 0xdd1abe51,
00562   0x7b5d039e, 0xdddc5b3b, 0x7b920b89, 0xde9e4c60, 0x7bc5e290, 0xdf608fe4,
00563   0x7bf88830, 0xe02323e5,
00564   0x7c29fbee, 0xe0e60685, 0x7c5a3d50, 0xe1a935e2, 0x7c894bde, 0xe26cb01b,
00565   0x7cb72724, 0xe330734d,
00566   0x7ce3ceb2, 0xe3f47d96, 0x7d0f4218, 0xe4b8cd11, 0x7d3980ec, 0xe57d5fda,
00567   0x7d628ac6, 0xe642340d,
00568   0x7d8a5f40, 0xe70747c4, 0x7db0fdf8, 0xe7cc9917, 0x7dd6668f, 0xe8922622,
00569   0x7dfa98a8, 0xe957ecfb,
00570   0x7e1d93ea, 0xea1debbb, 0x7e3f57ff, 0xeae4207a, 0x7e5fe493, 0xebaa894f,
00571   0x7e7f3957, 0xec71244f,
00572   0x7e9d55fc, 0xed37ef91, 0x7eba3a39, 0xedfee92b, 0x7ed5e5c6, 0xeec60f31,
00573   0x7ef05860, 0xef8d5fb8,
00574   0x7f0991c4, 0xf054d8d5, 0x7f2191b4, 0xf11c789a, 0x7f3857f6, 0xf1e43d1c,
00575   0x7f4de451, 0xf2ac246e,
00576   0x7f62368f, 0xf3742ca2, 0x7f754e80, 0xf43c53cb, 0x7f872bf3, 0xf50497fb,
00577   0x7f97cebd, 0xf5ccf743,
00578   0x7fa736b4, 0xf6956fb7, 0x7fb563b3, 0xf75dff66, 0x7fc25596, 0xf826a462,
00579   0x7fce0c3e, 0xf8ef5cbb,
00580   0x7fd8878e, 0xf9b82684, 0x7fe1c76b, 0xfa80ffcb, 0x7fe9cbc0, 0xfb49e6a3,
00581   0x7ff09478, 0xfc12d91a,
00582   0x7ff62182, 0xfcdbd541, 0x7ffa72d1, 0xfda4d929, 0x7ffd885a, 0xfe6de2e0,
00583   0x7fff6216, 0xff36f078
00584 };
00585
00608 arm_status arm_cfft_radix4_init_q31(
00609   arm_cfft_radix4_instance_q31 * S,
00610   uint16_t fftLen,
00611   uint8_t ifftFlag,
00612   uint8_t bitReverseFlag)
00613 {
00614   /*  Initialise the default arm status */
00615   arm_status status = ARM_MATH_SUCCESS;
00616   /*  Initialise the FFT length */
00617   S->fftLen = fftLen;
00618   /*  Initialise the Twiddle coefficient pointer */
00619   S->pTwiddle = (q31_t *) twiddleCoefQ31;
00620   /*  Initialise the Flag for selection of CFFT or CIFFT */
00621   S->ifftFlag = ifftFlag;
00622   /*  Initialise the Flag for calculation Bit reversal or not */
00623   S->bitReverseFlag = bitReverseFlag;
00624
00625   /*  Initializations of Instance structure depending on the FFT length */
00626   switch (S->fftLen)
00627   {
00628     /*  Initializations of structure parameters for 1024 point FFT */
00629   case 1024u:
00630     /*  Initialise the twiddle coef modifier value */
00631     S->twidCoefModifier = 1u;
00632     /*  Initialise the bit reversal table modifier */
00633     S->bitRevFactor = 1u;
00634     /*  Initialise the bit reversal table pointer */
00635     S->pBitRevTable = armBitRevTable;
00636     break;
00637
00638   case 256u:
00639     /*  Initializations of structure parameters for 256 point FFT */
00640     S->twidCoefModifier = 4u;
00641     S->bitRevFactor = 4u;
00642     S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
00643     break;
00644
00645   case 64u:
00646     /*  Initializations of structure parameters for 64 point FFT */
00647     S->twidCoefModifier = 16u;
00648     S->bitRevFactor = 16u;
00649     S->pBitRevTable = &armBitRevTable[15];
00650     break;
00651
00652   case 16u:
00653     /*  Initializations of structure parameters for 16 point FFT */
00654     S->twidCoefModifier = 64u;
00655     S->bitRevFactor = 64u;
00656     S->pBitRevTable = &armBitRevTable[63];
00657     break;
00658
00659   default:
00660     /*  Reporting argument error if fftSize is not valid value */
00661     status = ARM_MATH_ARGUMENT_ERROR;
00662     break;
00663   }
00664
00665   return (status);
00666 }
00667
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c
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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_cfft_radix4_q15.c
00009 *
00010 * Description:  This file has function definition of Radix-4 FFT & IFFT function and
00011 *                               In-place bit reversal using bit reversal table
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 *
00030 * Version 0.0.5  2010/04/26
00031 *        incorporated review comments and updated with latest CMSIS layer
00032 *
00033 * Version 0.0.3  2010/03/10
00034 *    Initial version
00035 * -------------------------------------------------------------------- */
00036
00037 #include "arm_math.h"
00038
00066 void arm_cfft_radix4_q15(
00067   const arm_cfft_radix4_instance_q15 * S,
00068   q15_t * pSrc)
00069 {
00070   if(S->ifftFlag == 1u)
00071   {
00072     /*  Complex IFFT radix-4  */
00073     arm_radix4_butterfly_inverse_q15(pSrc, S->fftLen, S->pTwiddle,
00074                                      S->twidCoefModifier);
00075   }
00076   else
00077   {
00078     /*  Complex FFT radix-4  */
00079     arm_radix4_butterfly_q15(pSrc, S->fftLen, S->pTwiddle,
00080                              S->twidCoefModifier);
00081   }
00082
00083   if(S->bitReverseFlag == 1u)
00084   {
00085     /*  Bit Reversal */
00086     arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
00087   }
00088
00089 }
00090
00095 /*
00096 * Radix-4 FFT algorithm used is :
00097 *
00098 * Input real and imaginary data:
00099 * x(n) = xa + j * ya
00100 * x(n+N/4 ) = xb + j * yb
00101 * x(n+N/2 ) = xc + j * yc
00102 * x(n+3N 4) = xd + j * yd
00103 *
00104 *
00105 * Output real and imaginary data:
00106 * x(4r) = xa'+ j * ya'
00107 * x(4r+1) = xb'+ j * yb'
00108 * x(4r+2) = xc'+ j * yc'
00109 * x(4r+3) = xd'+ j * yd'
00110 *
00111 *
00112 * Twiddle factors for radix-4 FFT:
00113 * Wn = co1 + j * (- si1)
00114 * W2n = co2 + j * (- si2)
00115 * W3n = co3 + j * (- si3)
00116
00117 * The real and imaginary output values for the radix-4 butterfly are
00118 * xa' = xa + xb + xc + xd
00119 * ya' = ya + yb + yc + yd
00120 * xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)
00121 * yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)
00122 * xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)
00123 * yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)
00124 * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)
00125 * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)
00126 *
00127 */
00128
00138 void arm_radix4_butterfly_q15(
00139   q15_t * pSrc16,
00140   uint32_t fftLen,
00141   q15_t * pCoef16,
00142   uint32_t twidCoefModifier)
00143 {
00144
00145 #ifndef ARM_MATH_CM0
00146
00147   /* Run the below code for Cortex-M4 and Cortex-M3 */
00148
00149   q31_t R, S, T, U;
00150   q31_t C1, C2, C3, out1, out2;
00151   q31_t *pSrc, *pCoeff;
00152   uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
00153   q15_t in;
00154
00155   /* Total process is divided into three stages */
00156
00157   /* process first stage, middle stages, & last stage */
00158
00159   /*  pointer initializations for SIMD calculations */
00160   pSrc = (q31_t *) pSrc16;
00161   pCoeff = (q31_t *) pCoef16;
00162
00163   /*  Initializations for the first stage */
00164   n2 = fftLen;
00165   n1 = n2;
00166
00167   /* n2 = fftLen/4 */
00168   n2 >>= 2u;
00169
00170   /* Index for twiddle coefficient */
00171   ic = 0u;
00172
00173   /* Index for input read and output write */
00174   i0 = 0u;
00175   j = n2;
00176
00177   /* Input is in 1.15(q15) format */
00178
00179   /*  start of first stage process */
00180   do
00181   {
00182     /*  Butterfly implementation */
00183
00184     /*  index calculation for the input as, */
00185     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
00186     i1 = i0 + n2;
00187     i2 = i1 + n2;
00188     i3 = i2 + n2;
00189
00190     /*  Reading i0, i0+fftLen/2 inputs */
00191     /* Read ya (real), xa(imag) input */
00192     T = pSrc[i0];
00193     in = ((int16_t) (T & 0xFFFF)) >> 2;
00194     T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
00195     /* Read yc (real), xc(imag) input */
00196     S = pSrc[i2];
00197     in = ((int16_t) (S & 0xFFFF)) >> 2;
00198     S = ((S >> 2) & 0xFFFF0000) | (in & 0xFFFF);
00199     /* R = packed((ya + yc), (xa + xc) ) */
00200     R = __QADD16(T, S);
00201     /* S = packed((ya - yc), (xa - xc) ) */
00202     S = __QSUB16(T, S);
00203
00204     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
00205     /* Read yb (real), xb(imag) input */
00206     T = pSrc[i1];
00207     in = ((int16_t) (T & 0xFFFF)) >> 2;
00208     T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
00209     /* Read yd (real), xd(imag) input */
00210     U = pSrc[i3];
00211     in = ((int16_t) (U & 0xFFFF)) >> 2;
00212     U = ((U >> 2) & 0xFFFF0000) | (in & 0xFFFF);
00213     /* T = packed((yb + yd), (xb + xd) ) */
00214     T = __QADD16(T, U);
00215
00216     /*  writing the butterfly processed i0 sample */
00217     /* xa' = xa + xb + xc + xd */
00218     /* ya' = ya + yb + yc + yd */
00219     pSrc[i0] = __SHADD16(R, T);
00220
00221     /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */
00222     R = __QSUB16(R, T);
00223
00224     /* co2 & si2 are read from SIMD Coefficient pointer */
00225     C2 = pCoeff[2u * ic];
00226
00227
00228 #ifndef ARM_MATH_BIG_ENDIAN
00229
00230     /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
00231     out1 = __SMUAD(C2, R) >> 16u;
00232     /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
00233     out2 = __SMUSDX(C2, R);
00234
00235 #else
00236
00237     /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
00238     out1 = __SMUSDX(R, C2) >> 16u;
00239     /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
00240     out2 = __SMUAD(C2, R);
00241
00242 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00243
00244     /*  Reading i0+fftLen/4 */
00245     /* T = packed(yb, xb) */
00246     T = pSrc[i1];
00247     in = ((int16_t) (T & 0xFFFF)) >> 2;
00248     T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
00249
00250     /* writing the butterfly processed i0 + fftLen/4 sample */
00251     /* writing output(xc', yc') in little endian format */
00252     pSrc[i1] = (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
00253
00254     /*  Butterfly calculations */
00255     /* U = packed(yd, xd) */
00256     U = pSrc[i3];
00257     in = ((int16_t) (U & 0xFFFF)) >> 2;
00258     U = ((U >> 2) & 0xFFFF0000) | (in & 0xFFFF);
00259     /* T = packed(yb-yd, xb-xd) */
00260     T = __QSUB16(T, U);
00261
00262
00263 #ifndef ARM_MATH_BIG_ENDIAN
00264
00265     /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
00266     R = __QASX(S, T);
00267     /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
00268     S = __QSAX(S, T);
00269
00270 #else
00271
00272     /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
00273     R = __QSAX(S, T);
00274     /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
00275     S = __QASX(S, T);
00276
00277 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00278
00279     /* co1 & si1 are read from SIMD Coefficient pointer */
00280     C1 = pCoeff[ic];
00281     /*  Butterfly process for the i0+fftLen/2 sample */
00282
00283 #ifndef ARM_MATH_BIG_ENDIAN
00284
00285     /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
00286     out1 = __SMUAD(C1, S) >> 16u;
00287     /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
00288     out2 = __SMUSDX(C1, S);
00289
00290 #else
00291
00292     /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
00293     out1 = __SMUSDX(S, C1) >> 16u;
00294     /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
00295     out2 = __SMUAD(C1, S);
00296
00297 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00298
00299     /* writing output(xb', yb') in little endian format */
00300     pSrc[i2] = ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF);
00301
00302
00303     /* co3 & si3 are read from SIMD Coefficient pointer */
00304     C3 = pCoeff[3u * ic];
00305     /*  Butterfly process for the i0+3fftLen/4 sample */
00306
00307 #ifndef ARM_MATH_BIG_ENDIAN
00308
00309     /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
00310     out1 = __SMUAD(C3, R) >> 16u;
00311     /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
00312     out2 = __SMUSDX(C3, R);
00313
00314 #else
00315
00316     /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
00317     out1 = __SMUSDX(R, C3) >> 16u;
00318     /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
00319     out2 = __SMUAD(C3, R);
00320
00321 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00322
00323     /* writing output(xd', yd') in little endian format */
00324     pSrc[i3] = ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
00325
00326     /*  Twiddle coefficients index modifier */
00327     ic = ic + twidCoefModifier;
00328
00329     /*  Updating input index */
00330     i0 = i0 + 1u;
00331
00332   } while(--j);
00333   /* data is in 4.11(q11) format */
00334
00335   /* end of first stage process */
00336
00337
00338   /* start of middle stage process */
00339
00340   /*  Twiddle coefficients index modifier */
00341   twidCoefModifier <<= 2u;
00342
00343   /*  Calculation of Middle stage */
00344   for (k = fftLen / 4u; k > 4u; k >>= 2u)
00345   {
00346     /*  Initializations for the middle stage */
00347     n1 = n2;
00348     n2 >>= 2u;
00349     ic = 0u;
00350
00351     for (j = 0u; j <= (n2 - 1u); j++)
00352     {
00353       /*  index calculation for the coefficients */
00354       C1 = pCoeff[ic];
00355       C2 = pCoeff[2u * ic];
00356       C3 = pCoeff[3u * ic];
00357
00358       /*  Twiddle coefficients index modifier */
00359       ic = ic + twidCoefModifier;
00360
00361       /*  Butterfly implementation */
00362       for (i0 = j; i0 < fftLen; i0 += n1)
00363       {
00364         /*  index calculation for the input as, */
00365         /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
00366         i1 = i0 + n2;
00367         i2 = i1 + n2;
00368         i3 = i2 + n2;
00369
00370         /*  Reading i0, i0+fftLen/2 inputs */
00371         /* Read ya (real), xa(imag) input */
00372         T = pSrc[i0];
00373
00374         /* Read yc (real), xc(imag) input */
00375         S = pSrc[i2];
00376
00377         /* R = packed( (ya + yc), (xa + xc)) */
00378         R = __QADD16(T, S);
00379
00380         /* S = packed((ya - yc), (xa - xc)) */
00381         S = __QSUB16(T, S);
00382
00383         /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
00384         /* Read yb (real), xb(imag) input */
00385         T = pSrc[i1];
00386
00387         /* Read yd (real), xd(imag) input */
00388         U = pSrc[i3];
00389
00390
00391         /* T = packed( (yb + yd), (xb + xd)) */
00392         T = __QADD16(T, U);
00393
00394
00395         /*  writing the butterfly processed i0 sample */
00396
00397         /* xa' = xa + xb + xc + xd */
00398         /* ya' = ya + yb + yc + yd */
00399         out1 = __SHADD16(R, T);
00400         in = ((int16_t) (out1 & 0xFFFF)) >> 1;
00401         out1 = ((out1 >> 1) & 0xFFFF0000) | (in & 0xFFFF);
00402         pSrc[i0] = out1;
00403
00404         /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
00405         R = __SHSUB16(R, T);
00406
00407
00408 #ifndef ARM_MATH_BIG_ENDIAN
00409
00410         /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
00411         out1 = __SMUAD(C2, R) >> 16u;
00412
00413         /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
00414         out2 = __SMUSDX(C2, R);
00415
00416 #else
00417
00418         /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
00419         out1 = __SMUSDX(R, C2) >> 16u;
00420
00421         /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
00422         out2 = __SMUAD(C2, R);
00423
00424 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00425
00426         /*  Reading i0+3fftLen/4 */
00427         /* Read yb (real), xb(imag) input */
00428         T = pSrc[i1];
00429
00430         /*  writing the butterfly processed i0 + fftLen/4 sample */
00431         /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
00432         /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
00433         pSrc[i1] = ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
00434
00435         /*  Butterfly calculations */
00436
00437         /* Read yd (real), xd(imag) input */
00438         U = pSrc[i3];
00439
00440         /* T = packed(yb-yd, xb-xd) */
00441         T = __QSUB16(T, U);
00442
00443
00444 #ifndef ARM_MATH_BIG_ENDIAN
00445
00446         /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
00447         R = __SHASX(S, T);
00448
00449         /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
00450         S = __SHSAX(S, T);
00451
00452
00453         /*  Butterfly process for the i0+fftLen/2 sample */
00454         out1 = __SMUAD(C1, S) >> 16u;
00455         out2 = __SMUSDX(C1, S);
00456
00457 #else
00458
00459         /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
00460         R = __SHSAX(S, T);
00461
00462         /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
00463         S = __SHASX(S, T);
00464
00465
00466         /*  Butterfly process for the i0+fftLen/2 sample */
00467         out1 = __SMUSDX(S, C1) >> 16u;
00468         out2 = __SMUAD(C1, S);
00469
00470 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00471
00472         /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
00473         /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
00474         pSrc[i2] = ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
00475
00476         /*  Butterfly process for the i0+3fftLen/4 sample */
00477
00478 #ifndef ARM_MATH_BIG_ENDIAN
00479
00480         out1 = __SMUAD(C3, R) >> 16u;
00481         out2 = __SMUSDX(C3, R);
00482
00483 #else
00484
00485         out1 = __SMUSDX(R, C3) >> 16u;
00486         out2 = __SMUAD(C3, R);
00487
00488 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00489
00490         /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
00491         /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
00492         pSrc[i3] = ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
00493       }
00494     }
00495     /*  Twiddle coefficients index modifier */
00496     twidCoefModifier <<= 2u;
00497   }
00498   /* end of middle stage process */
00499
00500
00501   /* data is in 10.6(q6) format for the 1024 point */
00502   /* data is in 8.8(q8) format for the 256 point */
00503   /* data is in 6.10(q10) format for the 64 point */
00504   /* data is in 4.12(q12) format for the 16 point */
00505
00506   /*  Initializations for the last stage */
00507   n1 = n2;
00508   n2 >>= 2u;
00509
00510   /* start of last stage process */
00511
00512   /*  Butterfly implementation */
00513   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
00514   {
00515     /*  index calculation for the input as, */
00516     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
00517     i1 = i0 + n2;
00518     i2 = i1 + n2;
00519     i3 = i2 + n2;
00520
00521     /*  Reading i0, i0+fftLen/2 inputs */
00522     /* Read ya (real), xa(imag) input */
00523     T = pSrc[i0];
00524     /* Read yc (real), xc(imag) input */
00525     S = pSrc[i2];
00526
00527     /* R = packed((ya + yc), (xa + xc)) */
00528     R = __QADD16(T, S);
00529     /* S = packed((ya - yc), (xa - xc)) */
00530     S = __QSUB16(T, S);
00531
00532     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
00533     /* Read yb (real), xb(imag) input */
00534     T = pSrc[i1];
00535     /* Read yd (real), xd(imag) input */
00536     U = pSrc[i3];
00537
00538     /* T = packed((yb + yd), (xb + xd)) */
00539     T = __QADD16(T, U);
00540
00541     /*  writing the butterfly processed i0 sample */
00542     /* xa' = xa + xb + xc + xd */
00543     /* ya' = ya + yb + yc + yd */
00544     pSrc[i0] = __SHADD16(R, T);
00545
00546     /* R = packed((ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
00547     R = __SHSUB16(R, T);
00548
00549     /* Read yb (real), xb(imag) input */
00550     T = pSrc[i1];
00551
00552     /*  writing the butterfly processed i0 + fftLen/4 sample */
00553     /* xc' = (xa-xb+xc-xd) */
00554     /* yc' = (ya-yb+yc-yd) */
00555     pSrc[i1] = R;
00556
00557     /* Read yd (real), xd(imag) input */
00558     U = pSrc[i3];
00559     /* T = packed( (yb - yd), (xb - xd))  */
00560     T = __QSUB16(T, U);
00561
00562
00563 #ifndef ARM_MATH_BIG_ENDIAN
00564
00565     /*  writing the butterfly processed i0 + fftLen/2 sample */
00566     /* xb' = (xa+yb-xc-yd) */
00567     /* yb' = (ya-xb-yc+xd) */
00568     pSrc[i2] = __SHSAX(S, T);
00569
00570     /*  writing the butterfly processed i0 + 3fftLen/4 sample */
00571     /* xd' = (xa-yb-xc+yd) */
00572     /* yd' = (ya+xb-yc-xd) */
00573     pSrc[i3] = __SHASX(S, T);
00574
00575 #else
00576
00577     /*  writing the butterfly processed i0 + fftLen/2 sample */
00578     /* xb' = (xa+yb-xc-yd) */
00579     /* yb' = (ya-xb-yc+xd) */
00580     pSrc[i2] = __SHASX(S, T);
00581
00582     /*  writing the butterfly processed i0 + 3fftLen/4 sample */
00583     /* xd' = (xa-yb-xc+yd) */
00584     /* yd' = (ya+xb-yc-xd) */
00585     pSrc[i3] = __SHSAX(S, T);
00586
00587 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00588
00589   }
00590
00591   /* end of last stage process */
00592
00593   /* output is in 11.5(q5) format for the 1024 point */
00594   /* output is in 9.7(q7) format for the 256 point   */
00595   /* output is in 7.9(q9) format for the 64 point  */
00596   /* output is in 5.11(q11) format for the 16 point  */
00597
00598
00599 #else
00600
00601   /* Run the below code for Cortex-M0 */
00602
00603   q15_t R0, R1, S0, S1, T0, T1, U0, U1;
00604   q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
00605   uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
00606
00607   /* Total process is divided into three stages */
00608
00609   /* process first stage, middle stages, & last stage */
00610
00611   /*  Initializations for the first stage */
00612   n2 = fftLen;
00613   n1 = n2;
00614
00615   /* n2 = fftLen/4 */
00616   n2 >>= 2u;
00617
00618   /* Index for twiddle coefficient */
00619   ic = 0u;
00620
00621   /* Index for input read and output write */
00622   i0 = 0u;
00623   j = n2;
00624
00625   /* Input is in 1.15(q15) format */
00626
00627   /*  start of first stage process */
00628   do
00629   {
00630     /*  Butterfly implementation */
00631
00632     /*  index calculation for the input as, */
00633     /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
00634     i1 = i0 + n2;
00635     i2 = i1 + n2;
00636     i3 = i2 + n2;
00637
00638     /*  Reading i0, i0+fftLen/2 inputs */
00639
00640     /* input is down scale by 4 to avoid overflow */
00641     /* Read ya (real), xa(imag) input */
00642     T0 = pSrc16[i0 * 2u] >> 2u;
00643     T1 = pSrc16[(i0 * 2u) + 1u] >> 2u;
00644
00645     /* input is down scale by 4 to avoid overflow */
00646     /* Read yc (real), xc(imag) input */
00647     S0 = pSrc16[i2 * 2u] >> 2u;
00648     S1 = pSrc16[(i2 * 2u) + 1u] >> 2u;
00649
00650     /* R0 = (ya + yc) */
00651     R0 = __SSAT(T0 + S0, 16u);
00652     /* R1 = (xa + xc) */
00653     R1 = __SSAT(T1 + S1, 16u);
00654
00655     /* S0 = (ya - yc) */
00656     S0 = __SSAT(T0 - S0, 16);
00657     /* S1 = (xa - xc) */
00658     S1 = __SSAT(T1 - S1, 16);
00659
00660     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
00661     /* input is down scale by 4 to avoid overflow */
00662     /* Read yb (real), xb(imag) input */
00663     T0 = pSrc16[i1 * 2u] >> 2u;
00664     T1 = pSrc16[(i1 * 2u) + 1u] >> 2u;
00665
00666     /* input is down scale by 4 to avoid overflow */
00667     /* Read yd (real), xd(imag) input */
00668     U0 = pSrc16[i3 * 2u] >> 2u;
00669     U1 = pSrc16[(i3 * 2u) + 1] >> 2u;
00670
00671     /* T0 = (yb + yd) */
00672     T0 = __SSAT(T0 + U0, 16u);
00673     /* T1 = (xb + xd) */
00674     T1 = __SSAT(T1 + U1, 16u);
00675
00676     /*  writing the butterfly processed i0 sample */
00677     /* ya' = ya + yb + yc + yd */
00678     /* xa' = xa + xb + xc + xd */
00679     pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u);
00680     pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u);
00681
00682     /* R0 = (ya + yc) - (yb + yd) */
00683     /* R1 = (xa + xc) - (xb + xd) */
00684     R0 = __SSAT(R0 - T0, 16u);
00685     R1 = __SSAT(R1 - T1, 16u);
00686
00687     /* co2 & si2 are read from Coefficient pointer */
00688     Co2 = pCoef16[2u * ic * 2u];
00689     Si2 = pCoef16[(2u * ic * 2u) + 1];
00690
00691     /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
00692     out1 = (short) ((Co2 * R0 + Si2 * R1) >> 16u);
00693     /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
00694     out2 = (short) ((-Si2 * R0 + Co2 * R1) >> 16u);
00695
00696     /*  Reading i0+fftLen/4 */
00697     /* input is down scale by 4 to avoid overflow */
00698     /* T0 = yb, T1 =  xb */
00699     T0 = pSrc16[i1 * 2u] >> 2;
00700     T1 = pSrc16[(i1 * 2u) + 1] >> 2;
00701
00702     /* writing the butterfly processed i0 + fftLen/4 sample */
00703     /* writing output(xc', yc') in little endian format */
00704     pSrc16[i1 * 2u] = out1;
00705     pSrc16[(i1 * 2u) + 1] = out2;
00706
00707     /*  Butterfly calculations */
00708     /* input is down scale by 4 to avoid overflow */
00709     /* U0 = yd, U1 = xd */
00710     U0 = pSrc16[i3 * 2u] >> 2;
00711     U1 = pSrc16[(i3 * 2u) + 1] >> 2;
00712     /* T0 = yb-yd */
00713     T0 = __SSAT(T0 - U0, 16);
00714     /* T1 = xb-xd */
00715     T1 = __SSAT(T1 - U1, 16);
00716
00717     /* R1 = (ya-yc) + (xb- xd),  R0 = (xa-xc) - (yb-yd)) */
00718     R0 = (short) __SSAT((q31_t) (S0 - T1), 16);
00719     R1 = (short) __SSAT((q31_t) (S1 + T0), 16);
00720
00721     /* S1 = (ya-yc) - (xb- xd), S0 = (xa-xc) + (yb-yd)) */
00722     S0 = (short) __SSAT(((q31_t) S0 + T1), 16u);
00723     S1 = (short) __SSAT(((q31_t) S1 - T0), 16u);
00724
00725     /* co1 & si1 are read from Coefficient pointer */
00726     Co1 = pCoef16[ic * 2u];
00727     Si1 = pCoef16[(ic * 2u) + 1];
00728     /*  Butterfly process for the i0+fftLen/2 sample */
00729     /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
00730     out1 = (short) ((Si1 * S1 + Co1 * S0) >> 16);
00731     /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
00732     out2 = (short) ((-Si1 * S0 + Co1 * S1) >> 16);
00733
00734     /* writing output(xb', yb') in little endian format */
00735     pSrc16[i2 * 2u] = out1;
00736     pSrc16[(i2 * 2u) + 1] = out2;
00737
00738     /* Co3 & si3 are read from Coefficient pointer */
00739     Co3 = pCoef16[3u * (ic * 2u)];
00740     Si3 = pCoef16[(3u * (ic * 2u)) + 1];
00741     /*  Butterfly process for the i0+3fftLen/4 sample */
00742     /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */
00743     out1 = (short) ((Si3 * R1 + Co3 * R0) >> 16u);
00744     /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */
00745     out2 = (short) ((-Si3 * R0 + Co3 * R1) >> 16u);
00746     /* writing output(xd', yd') in little endian format */
00747     pSrc16[i3 * 2u] = out1;
00748     pSrc16[(i3 * 2u) + 1] = out2;
00749
00750     /*  Twiddle coefficients index modifier */
00751     ic = ic + twidCoefModifier;
00752
00753     /*  Updating input index */
00754     i0 = i0 + 1u;
00755
00756   } while(--j);
00757   /* data is in 4.11(q11) format */
00758
00759   /* end of first stage process */
00760
00761
00762   /* start of middle stage process */
00763
00764   /*  Twiddle coefficients index modifier */
00765   twidCoefModifier <<= 2u;
00766
00767   /*  Calculation of Middle stage */
00768   for (k = fftLen / 4u; k > 4u; k >>= 2u)
00769   {
00770     /*  Initializations for the middle stage */
00771     n1 = n2;
00772     n2 >>= 2u;
00773     ic = 0u;
00774
00775     for (j = 0u; j <= (n2 - 1u); j++)
00776     {
00777       /*  index calculation for the coefficients */
00778       Co1 = pCoef16[ic * 2u];
00779       Si1 = pCoef16[(ic * 2u) + 1u];
00780       Co2 = pCoef16[2u * (ic * 2u)];
00781       Si2 = pCoef16[(2u * (ic * 2u)) + 1u];
00782       Co3 = pCoef16[3u * (ic * 2u)];
00783       Si3 = pCoef16[(3u * (ic * 2u)) + 1u];
00784
00785       /*  Twiddle coefficients index modifier */
00786       ic = ic + twidCoefModifier;
00787
00788       /*  Butterfly implementation */
00789       for (i0 = j; i0 < fftLen; i0 += n1)
00790       {
00791         /*  index calculation for the input as, */
00792         /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
00793         i1 = i0 + n2;
00794         i2 = i1 + n2;
00795         i3 = i2 + n2;
00796
00797         /*  Reading i0, i0+fftLen/2 inputs */
00798         /* Read ya (real), xa(imag) input */
00799         T0 = pSrc16[i0 * 2u];
00800         T1 = pSrc16[(i0 * 2u) + 1u];
00801
00802         /* Read yc (real), xc(imag) input */
00803         S0 = pSrc16[i2 * 2u];
00804         S1 = pSrc16[(i2 * 2u) + 1u];
00805
00806         /* R0 = (ya + yc), R1 = (xa + xc) */
00807         R0 = __SSAT(T0 + S0, 16);
00808         R1 = __SSAT(T1 + S1, 16);
00809
00810         /* S0 = (ya - yc), S1 =(xa - xc) */
00811         S0 = __SSAT(T0 - S0, 16);
00812         S1 = __SSAT(T1 - S1, 16);
00813
00814         /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
00815         /* Read yb (real), xb(imag) input */
00816         T0 = pSrc16[i1 * 2u];
00817         T1 = pSrc16[(i1 * 2u) + 1u];
00818
00819         /* Read yd (real), xd(imag) input */
00820         U0 = pSrc16[i3 * 2u];
00821         U1 = pSrc16[(i3 * 2u) + 1u];
00822
00823
00824         /* T0 = (yb + yd), T1 = (xb + xd) */
00825         T0 = __SSAT(T0 + U0, 16);
00826         T1 = __SSAT(T1 + U1, 16);
00827
00828         /*  writing the butterfly processed i0 sample */
00829
00830         /* xa' = xa + xb + xc + xd */
00831         /* ya' = ya + yb + yc + yd */
00832         out1 = ((R0 >> 1u) + (T0 >> 1u)) >> 1u;
00833         out2 = ((R1 >> 1u) + (T1 >> 1u)) >> 1u;
00834
00835         pSrc16[i0 * 2u] = out1;
00836         pSrc16[(2u * i0) + 1u] = out2;
00837
00838         /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
00839         R0 = (R0 >> 1u) - (T0 >> 1u);
00840         R1 = (R1 >> 1u) - (T1 >> 1u);
00841
00842         /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
00843         out1 = (short) ((Co2 * R0 + Si2 * R1) >> 16u);
00844
00845         /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
00846         out2 = (short) ((-Si2 * R0 + Co2 * R1) >> 16u);
00847
00848         /*  Reading i0+3fftLen/4 */
00849         /* Read yb (real), xb(imag) input */
00850         T0 = pSrc16[i1 * 2u];
00851         T1 = pSrc16[(i1 * 2u) + 1u];
00852
00853         /*  writing the butterfly processed i0 + fftLen/4 sample */
00854         /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
00855         /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
00856         pSrc16[i1 * 2u] = out1;
00857         pSrc16[(i1 * 2u) + 1u] = out2;
00858
00859         /*  Butterfly calculations */
00860
00861         /* Read yd (real), xd(imag) input */
00862         U0 = pSrc16[i3 * 2u];
00863         U1 = pSrc16[(i3 * 2u) + 1u];
00864
00865         /* T0 = yb-yd, T1 = xb-xd */
00866         T0 = __SSAT(T0 - U0, 16);
00867         T1 = __SSAT(T1 - U1, 16);
00868
00869         /* R0 = (ya-yc) + (xb- xd), R1 = (xa-xc) - (yb-yd)) */
00870         R0 = (S0 >> 1u) - (T1 >> 1u);
00871         R1 = (S1 >> 1u) + (T0 >> 1u);
00872
00873         /* S0 = (ya-yc) - (xb- xd), S1 = (xa-xc) + (yb-yd)) */
00874         S0 = (S0 >> 1u) + (T1 >> 1u);
00875         S1 = (S1 >> 1u) - (T0 >> 1u);
00876
00877         /*  Butterfly process for the i0+fftLen/2 sample */
00878         out1 = (short) ((Co1 * S0 + Si1 * S1) >> 16u);
00879
00880         out2 = (short) ((-Si1 * S0 + Co1 * S1) >> 16u);
00881
00882         /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
00883         /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
00884         pSrc16[i2 * 2u] = out1;
00885         pSrc16[(i2 * 2u) + 1u] = out2;
00886
00887         /*  Butterfly process for the i0+3fftLen/4 sample */
00888         out1 = (short) ((Si3 * R1 + Co3 * R0) >> 16u);
00889
00890         out2 = (short) ((-Si3 * R0 + Co3 * R1) >> 16u);
00891         /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */
00892         /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */
00893         pSrc16[i3 * 2u] = out1;
00894         pSrc16[(i3 * 2u) + 1u] = out2;
00895       }
00896     }
00897     /*  Twiddle coefficients index modifier */
00898     twidCoefModifier <<= 2u;
00899   }
00900   /* end of middle stage process */
00901
00902
00903   /* data is in 10.6(q6) format for the 1024 point */
00904   /* data is in 8.8(q8) format for the 256 point */
00905   /* data is in 6.10(q10) format for the 64 point */
00906   /* data is in 4.12(q12) format for the 16 point */
00907
00908   /*  Initializations for the last stage */
00909   n1 = n2;
00910   n2 >>= 2u;
00911
00912   /* start of last stage process */
00913
00914   /*  Butterfly implementation */
00915   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
00916   {
00917     /*  index calculation for the input as, */
00918     /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
00919     i1 = i0 + n2;
00920     i2 = i1 + n2;
00921     i3 = i2 + n2;
00922
00923     /*  Reading i0, i0+fftLen/2 inputs */
00924     /* Read ya (real), xa(imag) input */
00925     T0 = pSrc16[i0 * 2u];
00926     T1 = pSrc16[(i0 * 2u) + 1u];
00927
00928     /* Read yc (real), xc(imag) input */
00929     S0 = pSrc16[i2 * 2u];
00930     S1 = pSrc16[(i2 * 2u) + 1u];
00931
00932     /* R0 = (ya + yc), R1 = (xa + xc) */
00933     R0 = __SSAT(T0 + S0, 16u);
00934     R1 = __SSAT(T1 + S1, 16u);
00935
00936     /* S0 = (ya - yc), S1 = (xa - xc) */
00937     S0 = __SSAT(T0 - S0, 16u);
00938     S1 = __SSAT(T1 - S1, 16u);
00939
00940     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
00941     /* Read yb (real), xb(imag) input */
00942     T0 = pSrc16[i1 * 2u];
00943     T1 = pSrc16[(i1 * 2u) + 1u];
00944     /* Read yd (real), xd(imag) input */
00945     U0 = pSrc16[i3 * 2u];
00946     U1 = pSrc16[(i3 * 2u) + 1u];
00947
00948     /* T0 = (yb + yd), T1 = (xb + xd)) */
00949     T0 = __SSAT(T0 + U0, 16u);
00950     T1 = __SSAT(T1 + U1, 16u);
00951
00952     /*  writing the butterfly processed i0 sample */
00953     /* xa' = xa + xb + xc + xd */
00954     /* ya' = ya + yb + yc + yd */
00955     pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u);
00956     pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u);
00957
00958     /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
00959     R0 = (R0 >> 1u) - (T0 >> 1u);
00960     R1 = (R1 >> 1u) - (T1 >> 1u);
00961     /* Read yb (real), xb(imag) input */
00962     T0 = pSrc16[i1 * 2u];
00963     T1 = pSrc16[(i1 * 2u) + 1u];
00964
00965     /*  writing the butterfly processed i0 + fftLen/4 sample */
00966     /* xc' = (xa-xb+xc-xd) */
00967     /* yc' = (ya-yb+yc-yd) */
00968     pSrc16[i1 * 2u] = R0;
00969     pSrc16[(i1 * 2u) + 1u] = R1;
00970
00971     /* Read yd (real), xd(imag) input */
00972     U0 = pSrc16[i3 * 2u];
00973     U1 = pSrc16[(i3 * 2u) + 1u];
00974     /* T0 = (yb - yd), T1 = (xb - xd)  */
00975     T0 = __SSAT(T0 - U0, 16u);
00976     T1 = __SSAT(T1 - U1, 16u);
00977
00978     /*  writing the butterfly processed i0 + fftLen/2 sample */
00979     /* xb' = (xa+yb-xc-yd) */
00980     /* yb' = (ya-xb-yc+xd) */
00981     pSrc16[i2 * 2u] = (S0 >> 1u) + (T1 >> 1u);
00982     pSrc16[(i2 * 2u) + 1u] = (S1 >> 1u) - (T0 >> 1u);
00983
00984     /*  writing the butterfly processed i0 + 3fftLen/4 sample */
00985     /* xd' = (xa-yb-xc+yd) */
00986     /* yd' = (ya+xb-yc-xd) */
00987     pSrc16[i3 * 2u] = (S0 >> 1u) - (T1 >> 1u);
00988     pSrc16[(i3 * 2u) + 1u] = (S1 >> 1u) + (T0 >> 1u);
00989
00990   }
00991
00992   /* end of last stage process */
00993
00994   /* output is in 11.5(q5) format for the 1024 point */
00995   /* output is in 9.7(q7) format for the 256 point   */
00996   /* output is in 7.9(q9) format for the 64 point  */
00997   /* output is in 5.11(q11) format for the 16 point  */
00998
00999 #endif /* #ifndef ARM_MATH_CM0 */
01000
01001 }
01002
01003
01013 /*
01014 * Radix-4 IFFT algorithm used is :
01015 *
01016 * CIFFT uses same twiddle coefficients as CFFT function
01017 *  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]
01018 *
01019 *
01020 * IFFT is implemented with following changes in equations from FFT
01021 *
01022 * Input real and imaginary data:
01023 * x(n) = xa + j * ya
01024 * x(n+N/4 ) = xb + j * yb
01025 * x(n+N/2 ) = xc + j * yc
01026 * x(n+3N 4) = xd + j * yd
01027 *
01028 *
01029 * Output real and imaginary data:
01030 * x(4r) = xa'+ j * ya'
01031 * x(4r+1) = xb'+ j * yb'
01032 * x(4r+2) = xc'+ j * yc'
01033 * x(4r+3) = xd'+ j * yd'
01034 *
01035 *
01036 * Twiddle factors for radix-4 IFFT:
01037 * Wn = co1 + j * (si1)
01038 * W2n = co2 + j * (si2)
01039 * W3n = co3 + j * (si3)
01040
01041 * The real and imaginary output values for the radix-4 butterfly are
01042 * xa' = xa + xb + xc + xd
01043 * ya' = ya + yb + yc + yd
01044 * xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)
01045 * yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)
01046 * xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)
01047 * yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)
01048 * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)
01049 * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)
01050 *
01051 */
01052
01053 void arm_radix4_butterfly_inverse_q15(
01054   q15_t * pSrc16,
01055   uint32_t fftLen,
01056   q15_t * pCoef16,
01057   uint32_t twidCoefModifier)
01058 {
01059
01060 #ifndef ARM_MATH_CM0
01061
01062   /* Run the below code for Cortex-M4 and Cortex-M3 */
01063
01064   q31_t R, S, T, U;
01065   q31_t C1, C2, C3, out1, out2;
01066   q31_t *pSrc, *pCoeff;
01067   uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
01068   q15_t in;
01069
01070   /* Total process is divided into three stages */
01071
01072   /* process first stage, middle stages, & last stage */
01073
01074   /*  pointer initializations for SIMD calculations */
01075   pSrc = (q31_t *) pSrc16;
01076   pCoeff = (q31_t *) pCoef16;
01077
01078   /*  Initializations for the first stage */
01079   n2 = fftLen;
01080   n1 = n2;
01081
01082   /* n2 = fftLen/4 */
01083   n2 >>= 2u;
01084
01085   /* Index for twiddle coefficient */
01086   ic = 0u;
01087
01088   /* Index for input read and output write */
01089   i0 = 0u;
01090
01091   j = n2;
01092
01093   /* Input is in 1.15(q15) format */
01094
01095   /*  Start of first stage process */
01096   do
01097   {
01098     /*  Butterfly implementation */
01099
01100     /*  index calculation for the input as, */
01101     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
01102     i1 = i0 + n2;
01103     i2 = i1 + n2;
01104     i3 = i2 + n2;
01105
01106     /*  Reading i0, i0+fftLen/2 inputs */
01107     /* Read ya (real), xa(imag) input */
01108     T = pSrc[i0];
01109     in = ((int16_t) (T & 0xFFFF)) >> 2;
01110     T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
01111     /* Read yc (real), xc(imag) input */
01112     S = pSrc[i2];
01113     in = ((int16_t) (S & 0xFFFF)) >> 2;
01114     S = ((S >> 2) & 0xFFFF0000) | (in & 0xFFFF);
01115
01116     /* R = packed((ya + yc), (xa + xc) ) */
01117     R = __QADD16(T, S);
01118     /* S = packed((ya - yc), (xa - xc) ) */
01119     S = __QSUB16(T, S);
01120
01121     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
01122     /* Read yb (real), xb(imag) input */
01123     T = pSrc[i1];
01124     in = ((int16_t) (T & 0xFFFF)) >> 2;
01125     T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
01126     /* Read yd (real), xd(imag) input */
01127     U = pSrc[i3];
01128     in = ((int16_t) (U & 0xFFFF)) >> 2;
01129     U = ((U >> 2) & 0xFFFF0000) | (in & 0xFFFF);
01130
01131     /* T = packed((yb + yd), (xb + xd) ) */
01132     T = __QADD16(T, U);
01133
01134     /*  writing the butterfly processed i0 sample */
01135     /* xa' = xa + xb + xc + xd */
01136     /* ya' = ya + yb + yc + yd */
01137     pSrc[i0] = __SHADD16(R, T);
01138
01139     /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */
01140     R = __QSUB16(R, T);
01141     /* co2 & si2 are read from SIMD Coefficient pointer */
01142     C2 = pCoeff[2u * ic];
01143
01144 #ifndef ARM_MATH_BIG_ENDIAN
01145
01146     /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */
01147     out1 = __SMUSD(C2, R) >> 16u;
01148     /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
01149     out2 = __SMUADX(C2, R);
01150
01151 #else
01152
01153     /* xc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
01154     out1 = __SMUADX(C2, R) >> 16u;
01155     /* yc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */
01156     out2 = __SMUSD(-C2, R);
01157
01158 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
01159
01160     /*  Reading i0+fftLen/4 */
01161     /* T = packed(yb, xb) */
01162     T = pSrc[i1];
01163     in = ((int16_t) (T & 0xFFFF)) >> 2;
01164     T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
01165
01166     /* writing the butterfly processed i0 + fftLen/4 sample */
01167     /* writing output(xc', yc') in little endian format */
01168     pSrc[i1] = (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
01169
01170     /*  Butterfly calculations */
01171     /* U = packed(yd, xd) */
01172     U = pSrc[i3];
01173     in = ((int16_t) (U & 0xFFFF)) >> 2;
01174     U = ((U >> 2) & 0xFFFF0000) | (in & 0xFFFF);
01175
01176     /* T = packed(yb-yd, xb-xd) */
01177     T = __QSUB16(T, U);
01178
01179 #ifndef ARM_MATH_BIG_ENDIAN
01180
01181     /* R = packed((ya-yc) - (xb- xd) , (xa-xc) + (yb-yd)) */
01182     R = __QSAX(S, T);
01183     /* S = packed((ya-yc) + (xb- xd),  (xa-xc) - (yb-yd)) */
01184     S = __QASX(S, T);
01185
01186 #else
01187
01188     /* R = packed((ya-yc) - (xb- xd) , (xa-xc) + (yb-yd)) */
01189     R = __QASX(S, T);
01190     /* S = packed((ya-yc) + (xb- xd),  (xa-xc) - (yb-yd)) */
01191     S = __QSAX(S, T);
01192
01193 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
01194
01195     /* co1 & si1 are read from SIMD Coefficient pointer */
01196     C1 = pCoeff[ic];
01197     /*  Butterfly process for the i0+fftLen/2 sample */
01198
01199 #ifndef ARM_MATH_BIG_ENDIAN
01200
01201     /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */
01202     out1 = __SMUSD(C1, S) >> 16u;
01203     /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */
01204     out2 = __SMUADX(C1, S);
01205
01206 #else
01207
01208     /* xb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */
01209     out1 = __SMUADX(C1, S) >> 16u;
01210     /* yb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */
01211     out2 = __SMUSD(-C1, S);
01212
01213 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
01214
01215     /* writing output(xb', yb') in little endian format */
01216     pSrc[i2] = ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF);
01217
01218     /* co3 & si3 are read from SIMD Coefficient pointer */
01219     C3 = pCoeff[3u * ic];
01220     /*  Butterfly process for the i0+3fftLen/4 sample */
01221
01222 #ifndef ARM_MATH_BIG_ENDIAN
01223
01224     /* xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3) */
01225     out1 = __SMUSD(C3, R) >> 16u;
01226     /* yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3) */
01227     out2 = __SMUADX(C3, R);
01228
01229 #else
01230
01231     /* xd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3) */
01232     out1 = __SMUADX(C3, R) >> 16u;
01233     /* yd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3) */
01234     out2 = __SMUSD(-C3, R);
01235
01236 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
01237
01238     /* writing output(xd', yd') in little endian format */
01239     pSrc[i3] = ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
01240
01241     /*  Twiddle coefficients index modifier */
01242     ic = ic + twidCoefModifier;
01243
01244     /*  Updating input index */
01245     i0 = i0 + 1u;
01246
01247   } while(--j);
01248
01249   /*  End of first stage process */
01250
01251   /* data is in 4.11(q11) format */
01252
01253
01254   /*  Start of Middle stage process */
01255
01256   /*  Twiddle coefficients index modifier */
01257   twidCoefModifier <<= 2u;
01258
01259   /*  Calculation of Middle stage */
01260   for (k = fftLen / 4u; k > 4u; k >>= 2u)
01261   {
01262     /*  Initializations for the middle stage */
01263     n1 = n2;
01264     n2 >>= 2u;
01265     ic = 0u;
01266
01267     for (j = 0u; j <= (n2 - 1u); j++)
01268     {
01269       /*  index calculation for the coefficients */
01270       C1 = pCoeff[ic];
01271       C2 = pCoeff[2u * ic];
01272       C3 = pCoeff[3u * ic];
01273
01274       /*  Twiddle coefficients index modifier */
01275       ic = ic + twidCoefModifier;
01276
01277       /*  Butterfly implementation */
01278       for (i0 = j; i0 < fftLen; i0 += n1)
01279       {
01280         /*  index calculation for the input as, */
01281         /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
01282         i1 = i0 + n2;
01283         i2 = i1 + n2;
01284         i3 = i2 + n2;
01285
01286         /*  Reading i0, i0+fftLen/2 inputs */
01287         /* Read ya (real), xa(imag) input */
01288         T = pSrc[i0];
01289
01290         /* Read yc (real), xc(imag) input */
01291         S = pSrc[i2];
01292
01293
01294         /* R = packed( (ya + yc), (xa + xc)) */
01295         R = __QADD16(T, S);
01296         /* S = packed((ya - yc), (xa - xc)) */
01297         S = __QSUB16(T, S);
01298
01299         /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
01300         /* Read yb (real), xb(imag) input */
01301         T = pSrc[i1];
01302
01303         /* Read yd (real), xd(imag) input */
01304         U = pSrc[i3];
01305
01306
01307         /* T = packed( (yb + yd), (xb + xd)) */
01308         T = __QADD16(T, U);
01309
01310         /*  writing the butterfly processed i0 sample */
01311         /* xa' = xa + xb + xc + xd */
01312         /* ya' = ya + yb + yc + yd */
01313         out1 = __SHADD16(R, T);
01314         in = ((int16_t) (out1 & 0xFFFF)) >> 1;
01315         out1 = ((out1 >> 1) & 0xFFFF0000) | (in & 0xFFFF);
01316         pSrc[i0] = out1;
01317
01318
01319
01320         /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
01321         R = __SHSUB16(R, T);
01322
01323
01324 #ifndef ARM_MATH_BIG_ENDIAN
01325
01326         /* (ya-yb+yc-yd)* (si2) - (xa-xb+xc-xd)* co2 */
01327         out1 = __SMUSD(C2, R) >> 16u;
01328         /* (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
01329         out2 = __SMUADX(C2, R);
01330
01331 #else
01332
01333         /* (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
01334         out1 = __SMUADX(R, C2) >> 16u;
01335         /* (ya-yb+yc-yd)* (si2) - (xa-xb+xc-xd)* co2 */
01336         out2 = __SMUSD(-C2, R);
01337
01338 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
01339
01340         /*  Reading i0+3fftLen/4 */
01341         /* Read yb (real), xb(imag) input */
01342         T = pSrc[i1];
01343
01344         /*  writing the butterfly processed i0 + fftLen/4 sample */
01345         /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */
01346         /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
01347         pSrc[i1] = ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
01348
01349         /*  Butterfly calculations */
01350         /* Read yd (real), xd(imag) input */
01351         U = pSrc[i3];
01352
01353         /* T = packed(yb-yd, xb-xd) */
01354         T = __QSUB16(T, U);
01355
01356
01357 #ifndef ARM_MATH_BIG_ENDIAN
01358
01359         /* R = packed((ya-yc) - (xb- xd) , (xa-xc) + (yb-yd)) */
01360         R = __SHSAX(S, T);
01361
01362         /* S = packed((ya-yc) + (xb- xd),  (xa-xc) - (yb-yd)) */
01363         S = __SHASX(S, T);
01364         /*  Butterfly process for the i0+fftLen/2 sample */
01365         out1 = __SMUSD(C1, S) >> 16u;
01366         out2 = __SMUADX(C1, S);
01367
01368 #else
01369
01370         /* R = packed((ya-yc) - (xb- xd) , (xa-xc) + (yb-yd)) */
01371         R = __SHASX(S, T);
01372
01373         /* S = packed((ya-yc) + (xb- xd),  (xa-xc) - (yb-yd)) */
01374         S = __SHSAX(S, T);
01375         /*  Butterfly process for the i0+fftLen/2 sample */
01376         out1 = __SMUADX(S, C1) >> 16u;
01377         out2 = __SMUSD(-C1, S);
01378
01379 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
01380
01381         /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */
01382         /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */
01383         pSrc[i2] = ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
01384
01385         /*  Butterfly process for the i0+3fftLen/4 sample */
01386
01387 #ifndef ARM_MATH_BIG_ENDIAN
01388
01389         out1 = __SMUSD(C3, R) >> 16u;
01390         out2 = __SMUADX(C3, R);
01391
01392 #else
01393
01394         out1 = __SMUADX(C3, R) >> 16u;
01395         out2 = __SMUSD(-C3, R);
01396
01397 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
01398
01399         /* xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3) */
01400         /* yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3) */
01401         pSrc[i3] = ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
01402
01403
01404       }
01405     }
01406     /*  Twiddle coefficients index modifier */
01407     twidCoefModifier <<= 2u;
01408   }
01409   /*  End of Middle stages process */
01410
01411
01412   /* data is in 10.6(q6) format for the 1024 point */
01413   /* data is in 8.8(q8) format for the 256 point   */
01414   /* data is in 6.10(q10) format for the 64 point  */
01415   /* data is in 4.12(q12) format for the 16 point  */
01416
01417   /* start of last stage process */
01418
01419
01420   /*  Initializations for the last stage */
01421   n1 = n2;
01422   n2 >>= 2u;
01423
01424   /*  Butterfly implementation */
01425   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
01426   {
01427     /*  index calculation for the input as, */
01428     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
01429     i1 = i0 + n2;
01430     i2 = i1 + n2;
01431     i3 = i2 + n2;
01432
01433     /*  Reading i0, i0+fftLen/2 inputs */
01434     /* Read ya (real), xa(imag) input */
01435     T = pSrc[i0];
01436     /* Read yc (real), xc(imag) input */
01437     S = pSrc[i2];
01438
01439     /* R = packed((ya + yc), (xa + xc)) */
01440     R = __QADD16(T, S);
01441     /* S = packed((ya - yc), (xa - xc)) */
01442     S = __QSUB16(T, S);
01443
01444     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
01445     /* Read yb (real), xb(imag) input */
01446     T = pSrc[i1];
01447     /* Read yd (real), xd(imag) input */
01448     U = pSrc[i3];
01449
01450     /* T = packed((yb + yd), (xb + xd)) */
01451     T = __QADD16(T, U);
01452
01453     /*  writing the butterfly processed i0 sample */
01454     /* xa' = xa + xb + xc + xd */
01455     /* ya' = ya + yb + yc + yd */
01456     pSrc[i0] = __SHADD16(R, T);
01457
01458     /* R = packed((ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
01459     R = __SHSUB16(R, T);
01460
01461     /* Read yb (real), xb(imag) input */
01462     T = pSrc[i1];
01463
01464     /*  writing the butterfly processed i0 + fftLen/4 sample */
01465     /* xc' = (xa-xb+xc-xd) */
01466     /* yc' = (ya-yb+yc-yd) */
01467     pSrc[i1] = R;
01468
01469     /* Read yd (real), xd(imag) input */
01470     U = pSrc[i3];
01471     /* T = packed( (yb - yd), (xb - xd))  */
01472     T = __QSUB16(T, U);
01473
01474
01475 #ifndef ARM_MATH_BIG_ENDIAN
01476
01477     /*  writing the butterfly processed i0 + fftLen/2 sample */
01478     /* xb' = (xa-yb-xc+yd) */
01479     /* yb' = (ya+xb-yc-xd) */
01480     pSrc[i2] = __SHASX(S, T);
01481
01482     /*  writing the butterfly processed i0 + 3fftLen/4 sample */
01483     /* xd' = (xa+yb-xc-yd) */
01484     /* yd' = (ya-xb-yc+xd) */
01485     pSrc[i3] = __SHSAX(S, T);
01486
01487
01488 #else
01489
01490     /*  writing the butterfly processed i0 + fftLen/2 sample */
01491     /* xb' = (xa-yb-xc+yd) */
01492     /* yb' = (ya+xb-yc-xd) */
01493     pSrc[i2] = __SHSAX(S, T);
01494
01495     /*  writing the butterfly processed i0 + 3fftLen/4 sample */
01496     /* xd' = (xa+yb-xc-yd) */
01497     /* yd' = (ya-xb-yc+xd) */
01498     pSrc[i3] = __SHASX(S, T);
01499
01500 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
01501
01502   }
01503   /* end of last stage  process */
01504
01505   /* output is in 11.5(q5) format for the 1024 point */
01506   /* output is in 9.7(q7) format for the 256 point   */
01507   /* output is in 7.9(q9) format for the 64 point  */
01508   /* output is in 5.11(q11) format for the 16 point  */
01509
01510
01511 #else
01512
01513   /* Run the below code for Cortex-M0 */
01514
01515   q15_t R0, R1, S0, S1, T0, T1, U0, U1;
01516   q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
01517   uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
01518
01519   /* Total process is divided into three stages */
01520
01521   /* process first stage, middle stages, & last stage */
01522
01523   /*  Initializations for the first stage */
01524   n2 = fftLen;
01525   n1 = n2;
01526
01527   /* n2 = fftLen/4 */
01528   n2 >>= 2u;
01529
01530   /* Index for twiddle coefficient */
01531   ic = 0u;
01532
01533   /* Index for input read and output write */
01534   i0 = 0u;
01535
01536   j = n2;
01537
01538   /* Input is in 1.15(q15) format */
01539
01540   /*  Start of first stage process */
01541   do
01542   {
01543     /*  Butterfly implementation */
01544
01545     /*  index calculation for the input as, */
01546     /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
01547     i1 = i0 + n2;
01548     i2 = i1 + n2;
01549     i3 = i2 + n2;
01550
01551     /*  Reading i0, i0+fftLen/2 inputs */
01552     /* input is down scale by 4 to avoid overflow */
01553     /* Read ya (real), xa(imag) input */
01554     T0 = pSrc16[i0 * 2u] >> 2u;
01555     T1 = pSrc16[(i0 * 2u) + 1u] >> 2u;
01556     /* input is down scale by 4 to avoid overflow */
01557     /* Read yc (real), xc(imag) input */
01558     S0 = pSrc16[i2 * 2u] >> 2u;
01559     S1 = pSrc16[(i2 * 2u) + 1u] >> 2u;
01560
01561     /* R0 = (ya + yc), R1 = (xa + xc) */
01562     R0 = __SSAT(T0 + S0, 16u);
01563     R1 = __SSAT(T1 + S1, 16u);
01564     /* S0 = (ya - yc), S1 = (xa - xc) */
01565     S0 = __SSAT(T0 - S0, 16u);
01566     S1 = __SSAT(T1 - S1, 16u);
01567
01568     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
01569     /* input is down scale by 4 to avoid overflow */
01570     /* Read yb (real), xb(imag) input */
01571     T0 = pSrc16[i1 * 2u] >> 2u;
01572     T1 = pSrc16[(i1 * 2u) + 1u] >> 2u;
01573     /* Read yd (real), xd(imag) input */
01574     /* input is down scale by 4 to avoid overflow */
01575     U0 = pSrc16[i3 * 2u] >> 2u;
01576     U1 = pSrc16[(i3 * 2u) + 1u] >> 2u;
01577
01578     /* T0 = (yb + yd), T1 = (xb + xd) */
01579     T0 = __SSAT(T0 + U0, 16u);
01580     T1 = __SSAT(T1 + U1, 16u);
01581
01582     /*  writing the butterfly processed i0 sample */
01583     /* xa' = xa + xb + xc + xd */
01584     /* ya' = ya + yb + yc + yd */
01585     pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u);
01586     pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u);
01587
01588     /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc)- (xb + xd) */
01589     R0 = __SSAT(R0 - T0, 16u);
01590     R1 = __SSAT(R1 - T1, 16u);
01591     /* co2 & si2 are read from Coefficient pointer */
01592     Co2 = pCoef16[2u * ic * 2u];
01593     Si2 = pCoef16[(2u * ic * 2u) + 1u];
01594     /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */
01595     out1 = (short) ((Co2 * R0 - Si2 * R1) >> 16u);
01596     /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
01597     out2 = (short) ((Si2 * R0 + Co2 * R1) >> 16u);
01598
01599     /*  Reading i0+fftLen/4 */
01600     /* input is down scale by 4 to avoid overflow */
01601     /* T0 = yb, T1 = xb */
01602     T0 = pSrc16[i1 * 2u] >> 2u;
01603     T1 = pSrc16[(i1 * 2u) + 1u] >> 2u;
01604
01605     /* writing the butterfly processed i0 + fftLen/4 sample */
01606     /* writing output(xc', yc') in little endian format */
01607     pSrc16[i1 * 2u] = out1;
01608     pSrc16[(i1 * 2u) + 1u] = out2;
01609
01610     /*  Butterfly calculations */
01611     /* input is down scale by 4 to avoid overflow */
01612     /* U0 = yd, U1 = xd) */
01613     U0 = pSrc16[i3 * 2u] >> 2u;
01614     U1 = pSrc16[(i3 * 2u) + 1u] >> 2u;
01615
01616     /* T0 = yb-yd, T1 = xb-xd) */
01617     T0 = __SSAT(T0 - U0, 16u);
01618     T1 = __SSAT(T1 - U1, 16u);
01619     /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */
01620     R0 = (short) __SSAT((q31_t) (S0 + T1), 16);
01621     R1 = (short) __SSAT((q31_t) (S1 - T0), 16);
01622     /* S = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */
01623     S0 = (short) __SSAT((q31_t) (S0 - T1), 16);
01624     S1 = (short) __SSAT((q31_t) (S1 + T0), 16);
01625
01626     /* co1 & si1 are read from Coefficient pointer */
01627     Co1 = pCoef16[ic * 2u];
01628     Si1 = pCoef16[(ic * 2u) + 1u];
01629     /*  Butterfly process for the i0+fftLen/2 sample */
01630     /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */
01631     out1 = (short) ((Co1 * S0 - Si1 * S1) >> 16u);
01632     /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */
01633     out2 = (short) ((Si1 * S0 + Co1 * S1) >> 16u);
01634     /* writing output(xb', yb') in little endian format */
01635     pSrc16[i2 * 2u] = out1;
01636     pSrc16[(i2 * 2u) + 1u] = out2;
01637
01638     /* Co3 & si3 are read from Coefficient pointer */
01639     Co3 = pCoef16[3u * ic * 2u];
01640     Si3 = pCoef16[(3u * ic * 2u) + 1u];
01641     /*  Butterfly process for the i0+3fftLen/4 sample */
01642     /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */
01643     out1 = (short) ((Co3 * R0 - Si3 * R1) >> 16u);
01644     /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */
01645     out2 = (short) ((Si3 * R0 + Co3 * R1) >> 16u);
01646     /* writing output(xd', yd') in little endian format */
01647     pSrc16[i3 * 2u] = out1;
01648     pSrc16[(i3 * 2u) + 1u] = out2;
01649
01650     /*  Twiddle coefficients index modifier */
01651     ic = ic + twidCoefModifier;
01652
01653     /*  Updating input index */
01654     i0 = i0 + 1u;
01655
01656   } while(--j);
01657
01658   /*  End of first stage process */
01659
01660   /* data is in 4.11(q11) format */
01661
01662
01663   /*  Start of Middle stage process */
01664
01665   /*  Twiddle coefficients index modifier */
01666   twidCoefModifier <<= 2u;
01667
01668   /*  Calculation of Middle stage */
01669   for (k = fftLen / 4u; k > 4u; k >>= 2u)
01670   {
01671     /*  Initializations for the middle stage */
01672     n1 = n2;
01673     n2 >>= 2u;
01674     ic = 0u;
01675
01676     for (j = 0u; j <= (n2 - 1u); j++)
01677     {
01678       /*  index calculation for the coefficients */
01679       Co1 = pCoef16[ic * 2u];
01680       Si1 = pCoef16[(ic * 2u) + 1u];
01681       Co2 = pCoef16[2u * ic * 2u];
01682       Si2 = pCoef16[2u * ic * 2u + 1u];
01683       Co3 = pCoef16[3u * ic * 2u];
01684       Si3 = pCoef16[(3u * ic * 2u) + 1u];
01685
01686       /*  Twiddle coefficients index modifier */
01687       ic = ic + twidCoefModifier;
01688
01689       /*  Butterfly implementation */
01690       for (i0 = j; i0 < fftLen; i0 += n1)
01691       {
01692         /*  index calculation for the input as, */
01693         /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
01694         i1 = i0 + n2;
01695         i2 = i1 + n2;
01696         i3 = i2 + n2;
01697
01698         /*  Reading i0, i0+fftLen/2 inputs */
01699         /* Read ya (real), xa(imag) input */
01700         T0 = pSrc16[i0 * 2u];
01701         T1 = pSrc16[(i0 * 2u) + 1u];
01702
01703         /* Read yc (real), xc(imag) input */
01704         S0 = pSrc16[i2 * 2u];
01705         S1 = pSrc16[(i2 * 2u) + 1u];
01706
01707
01708         /* R0 = (ya + yc), R1 = (xa + xc) */
01709         R0 = __SSAT(T0 + S0, 16u);
01710         R1 = __SSAT(T1 + S1, 16u);
01711         /* S0 = (ya - yc), S1 = (xa - xc) */
01712         S0 = __SSAT(T0 - S0, 16u);
01713         S1 = __SSAT(T1 - S1, 16u);
01714
01715         /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
01716         /* Read yb (real), xb(imag) input */
01717         T0 = pSrc16[i1 * 2u];
01718         T1 = pSrc16[(i1 * 2u) + 1u];
01719
01720         /* Read yd (real), xd(imag) input */
01721         U0 = pSrc16[i3 * 2u];
01722         U1 = pSrc16[(i3 * 2u) + 1u];
01723
01724         /* T0 = (yb + yd), T1 = (xb + xd) */
01725         T0 = __SSAT(T0 + U0, 16u);
01726         T1 = __SSAT(T1 + U1, 16u);
01727
01728         /*  writing the butterfly processed i0 sample */
01729         /* xa' = xa + xb + xc + xd */
01730         /* ya' = ya + yb + yc + yd */
01731         pSrc16[i0 * 2u] = ((R0 >> 1u) + (T0 >> 1u)) >> 1u;
01732         pSrc16[(i0 * 2u) + 1u] = ((R1 >> 1u) + (T1 >> 1u)) >> 1u;
01733
01734         /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
01735         R0 = (R0 >> 1u) - (T0 >> 1u);
01736         R1 = (R1 >> 1u) - (T1 >> 1u);
01737
01738         /* (ya-yb+yc-yd)* (si2) - (xa-xb+xc-xd)* co2 */
01739         out1 = (short) ((Co2 * R0 - Si2 * R1) >> 16);
01740         /* (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
01741         out2 = (short) ((Si2 * R0 + Co2 * R1) >> 16);
01742
01743         /*  Reading i0+3fftLen/4 */
01744         /* Read yb (real), xb(imag) input */
01745         T0 = pSrc16[i1 * 2u];
01746         T1 = pSrc16[(i1 * 2u) + 1u];
01747
01748         /*  writing the butterfly processed i0 + fftLen/4 sample */
01749         /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */
01750         /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
01751         pSrc16[i1 * 2u] = out1;
01752         pSrc16[(i1 * 2u) + 1u] = out2;
01753
01754         /*  Butterfly calculations */
01755         /* Read yd (real), xd(imag) input */
01756         U0 = pSrc16[i3 * 2u];
01757         U1 = pSrc16[(i3 * 2u) + 1u];
01758
01759         /* T0 = yb-yd, T1 = xb-xd) */
01760         T0 = __SSAT(T0 - U0, 16u);
01761         T1 = __SSAT(T1 - U1, 16u);
01762
01763         /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */
01764         R0 = (S0 >> 1u) + (T1 >> 1u);
01765         R1 = (S1 >> 1u) - (T0 >> 1u);
01766
01767         /* S1 = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */
01768         S0 = (S0 >> 1u) - (T1 >> 1u);
01769         S1 = (S1 >> 1u) + (T0 >> 1u);
01770
01771         /*  Butterfly process for the i0+fftLen/2 sample */
01772         out1 = (short) ((Co1 * S0 - Si1 * S1) >> 16u);
01773         out2 = (short) ((Si1 * S0 + Co1 * S1) >> 16u);
01774         /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */
01775         /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */
01776         pSrc16[i2 * 2u] = out1;
01777         pSrc16[(i2 * 2u) + 1u] = out2;
01778
01779         /*  Butterfly process for the i0+3fftLen/4 sample */
01780         out1 = (short) ((Co3 * R0 - Si3 * R1) >> 16u);
01781
01782         out2 = (short) ((Si3 * R0 + Co3 * R1) >> 16u);
01783         /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */
01784         /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */
01785         pSrc16[i3 * 2u] = out1;
01786         pSrc16[(i3 * 2u) + 1u] = out2;
01787
01788
01789       }
01790     }
01791     /*  Twiddle coefficients index modifier */
01792     twidCoefModifier <<= 2u;
01793   }
01794   /*  End of Middle stages process */
01795
01796
01797   /* data is in 10.6(q6) format for the 1024 point */
01798   /* data is in 8.8(q8) format for the 256 point   */
01799   /* data is in 6.10(q10) format for the 64 point  */
01800   /* data is in 4.12(q12) format for the 16 point  */
01801
01802   /* start of last stage process */
01803
01804
01805   /*  Initializations for the last stage */
01806   n1 = n2;
01807   n2 >>= 2u;
01808
01809   /*  Butterfly implementation */
01810   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
01811   {
01812     /*  index calculation for the input as, */
01813     /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
01814     i1 = i0 + n2;
01815     i2 = i1 + n2;
01816     i3 = i2 + n2;
01817
01818     /*  Reading i0, i0+fftLen/2 inputs */
01819     /* Read ya (real), xa(imag) input */
01820     T0 = pSrc16[i0 * 2u];
01821     T1 = pSrc16[(i0 * 2u) + 1u];
01822     /* Read yc (real), xc(imag) input */
01823     S0 = pSrc16[i2 * 2u];
01824     S1 = pSrc16[(i2 * 2u) + 1u];
01825
01826     /* R0 = (ya + yc), R1 = (xa + xc) */
01827     R0 = __SSAT(T0 + S0, 16u);
01828     R1 = __SSAT(T1 + S1, 16u);
01829     /* S0 = (ya - yc), S1 = (xa - xc) */
01830     S0 = __SSAT(T0 - S0, 16u);
01831     S1 = __SSAT(T1 - S1, 16u);
01832
01833     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
01834     /* Read yb (real), xb(imag) input */
01835     T0 = pSrc16[i1 * 2u];
01836     T1 = pSrc16[(i1 * 2u) + 1u];
01837     /* Read yd (real), xd(imag) input */
01838     U0 = pSrc16[i3 * 2u];
01839     U1 = pSrc16[(i3 * 2u) + 1u];
01840
01841     /* T0 = (yb + yd), T1 = (xb + xd) */
01842     T0 = __SSAT(T0 + U0, 16u);
01843     T1 = __SSAT(T1 + U1, 16u);
01844
01845     /*  writing the butterfly processed i0 sample */
01846     /* xa' = xa + xb + xc + xd */
01847     /* ya' = ya + yb + yc + yd */
01848     pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u);
01849     pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u);
01850
01851     /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
01852     R0 = (R0 >> 1u) - (T0 >> 1u);
01853     R1 = (R1 >> 1u) - (T1 >> 1u);
01854
01855     /* Read yb (real), xb(imag) input */
01856     T0 = pSrc16[i1 * 2u];
01857     T1 = pSrc16[(i1 * 2u) + 1u];
01858
01859     /*  writing the butterfly processed i0 + fftLen/4 sample */
01860     /* xc' = (xa-xb+xc-xd) */
01861     /* yc' = (ya-yb+yc-yd) */
01862     pSrc16[i1 * 2u] = R0;
01863     pSrc16[(i1 * 2u) + 1u] = R1;
01864
01865     /* Read yd (real), xd(imag) input */
01866     U0 = pSrc16[i3 * 2u];
01867     U1 = pSrc16[(i3 * 2u) + 1u];
01868     /* T0 = (yb - yd), T1 = (xb - xd) */
01869     T0 = __SSAT(T0 - U0, 16u);
01870     T1 = __SSAT(T1 - U1, 16u);
01871
01872     /*  writing the butterfly processed i0 + fftLen/2 sample */
01873     /* xb' = (xa-yb-xc+yd) */
01874     /* yb' = (ya+xb-yc-xd) */
01875     pSrc16[i2 * 2u] = (S0 >> 1u) - (T1 >> 1u);
01876     pSrc16[(i2 * 2u) + 1u] = (S1 >> 1u) + (T0 >> 1u);
01877
01878
01879     /*  writing the butterfly processed i0 + 3fftLen/4 sample */
01880     /* xd' = (xa+yb-xc-yd) */
01881     /* yd' = (ya-xb-yc+xd) */
01882     pSrc16[i3 * 2u] = (S0 >> 1u) + (T1 >> 1u);
01883     pSrc16[(i3 * 2u) + 1u] = (S1 >> 1u) - (T0 >> 1u);
01884   }
01885   /* end of last stage  process */
01886
01887   /* output is in 11.5(q5) format for the 1024 point */
01888   /* output is in 9.7(q7) format for the 256 point   */
01889   /* output is in 7.9(q9) format for the 64 point  */
01890   /* output is in 5.11(q11) format for the 16 point  */
01891
01892 #endif /* #ifndef ARM_MATH_CM0 */
01893
01894 }
01895
01896
01897 /*
01898    * @brief  In-place bit reversal function.
01899    * @param[in, out] *pSrc        points to the in-place buffer of Q15 data type.
01900    * @param[in]      fftLen       length of the FFT.
01901    * @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
01902    * @param[in]      *pBitRevTab  points to bit reversal table.
01903    * @return none.
01904  */
01905
01906 void arm_bitreversal_q15(
01907   q15_t * pSrc16,
01908   uint32_t fftLen,
01909   uint16_t bitRevFactor,
01910   uint16_t * pBitRevTab)
01911 {
01912   q31_t *pSrc = (q31_t *) pSrc16;
01913   q31_t in;
01914   uint32_t fftLenBy2, fftLenBy2p1;
01915   uint32_t i, j;
01916
01917   /*  Initializations */
01918   j = 0u;
01919   fftLenBy2 = fftLen / 2u;
01920   fftLenBy2p1 = (fftLen / 2u) + 1u;
01921
01922   /* Bit Reversal Implementation */
01923   for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
01924   {
01925     if(i < j)
01926     {
01927       /*  pSrc[i] <-> pSrc[j]; */
01928       /*  pSrc[i+1u] <-> pSrc[j+1u] */
01929       in = pSrc[i];
01930       pSrc[i] = pSrc[j];
01931       pSrc[j] = in;
01932
01933       /*  pSrc[i + fftLenBy2p1] <-> pSrc[j + fftLenBy2p1];  */
01934       /*  pSrc[i + fftLenBy2p1+1u] <-> pSrc[j + fftLenBy2p1+1u] */
01935       in = pSrc[i + fftLenBy2p1];
01936       pSrc[i + fftLenBy2p1] = pSrc[j + fftLenBy2p1];
01937       pSrc[j + fftLenBy2p1] = in;
01938     }
01939
01940     /*  pSrc[i+1u] <-> pSrc[j+fftLenBy2];         */
01941     /*  pSrc[i+2] <-> pSrc[j+fftLenBy2+1u]  */
01942     in = pSrc[i + 1u];
01943     pSrc[i + 1u] = pSrc[j + fftLenBy2];
01944     pSrc[j + fftLenBy2] = in;
01945
01946     /*  Reading the index for the bit reversal */
01947     j = *pBitRevTab;
01948
01949     /*  Updating the bit reversal index depending on the fft length  */
01950     pBitRevTab += bitRevFactor;
01951   }
01952 }
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c
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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_cfft_radix4_q31.c
00009 *
00010 * Description:  This file has function definition of Radix-4 FFT & IFFT function and
00011 *                               In-place bit reversal using bit reversal table
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 *
00030 * Version 0.0.5  2010/04/26
00031 *        incorporated review comments and updated with latest CMSIS layer
00032 *
00033 * Version 0.0.3  2010/03/10
00034 *    Initial version
00035 * -------------------------------------------------------------------- */
00036 #include "arm_math.h"
00037
00038
00066 void arm_cfft_radix4_q31(
00067   const arm_cfft_radix4_instance_q31 * S,
00068   q31_t * pSrc)
00069 {
00070   if(S->ifftFlag == 1u)
00071   {
00072     /* Complex IFFT radix-4 */
00073     arm_radix4_butterfly_inverse_q31(pSrc, S->fftLen, S->pTwiddle,
00074                                      S->twidCoefModifier);
00075   }
00076   else
00077   {
00078     /* Complex FFT radix-4 */
00079     arm_radix4_butterfly_q31(pSrc, S->fftLen, S->pTwiddle,
00080                              S->twidCoefModifier);
00081   }
00082
00083
00084   if(S->bitReverseFlag == 1u)
00085   {
00086     /*  Bit Reversal */
00087     arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
00088   }
00089
00090 }
00091
00096 /*
00097 * Radix-4 FFT algorithm used is :
00098 *
00099 * Input real and imaginary data:
00100 * x(n) = xa + j * ya
00101 * x(n+N/4 ) = xb + j * yb
00102 * x(n+N/2 ) = xc + j * yc
00103 * x(n+3N 4) = xd + j * yd
00104 *
00105 *
00106 * Output real and imaginary data:
00107 * x(4r) = xa'+ j * ya'
00108 * x(4r+1) = xb'+ j * yb'
00109 * x(4r+2) = xc'+ j * yc'
00110 * x(4r+3) = xd'+ j * yd'
00111 *
00112 *
00113 * Twiddle factors for radix-4 FFT:
00114 * Wn = co1 + j * (- si1)
00115 * W2n = co2 + j * (- si2)
00116 * W3n = co3 + j * (- si3)
00117 *
00118 *  Butterfly implementation:
00119 * xa' = xa + xb + xc + xd
00120 * ya' = ya + yb + yc + yd
00121 * xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)
00122 * yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)
00123 * xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)
00124 * yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)
00125 * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)
00126 * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)
00127 *
00128 */
00129
00139 void arm_radix4_butterfly_q31(
00140   q31_t * pSrc,
00141   uint32_t fftLen,
00142   q31_t * pCoef,
00143   uint32_t twidCoefModifier)
00144 {
00145   uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
00146   q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
00147
00148
00149   /* Total process is divided into three stages */
00150
00151   /* process first stage, middle stages, & last stage */
00152
00153
00154   /* start of first stage process */
00155
00156   /*  Initializations for the first stage */
00157   n2 = fftLen;
00158   n1 = n2;
00159   /* n2 = fftLen/4 */
00160   n2 >>= 2u;
00161   i0 = 0u;
00162   ia1 = 0u;
00163
00164   j = n2;
00165
00166   /*  Calculation of first stage */
00167   do
00168   {
00169     /*  index calculation for the input as, */
00170     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
00171     i1 = i0 + n2;
00172     i2 = i1 + n2;
00173     i3 = i2 + n2;
00174
00175     /* input is in 1.31(q31) format and provide 4 guard bits for the input */
00176
00177     /*  Butterfly implementation */
00178     /* xa + xc */
00179     r1 = (pSrc[(2u * i0)] >> 4u) + (pSrc[(2u * i2)] >> 4u);
00180     /* xa - xc */
00181     r2 = (pSrc[2u * i0] >> 4u) - (pSrc[2u * i2] >> 4u);
00182
00183     /* ya + yc */
00184     s1 = (pSrc[(2u * i0) + 1u] >> 4u) + (pSrc[(2u * i2) + 1u] >> 4u);
00185     /* ya - yc */
00186     s2 = (pSrc[(2u * i0) + 1u] >> 4u) - (pSrc[(2u * i2) + 1u] >> 4u);
00187
00188     /* xb + xd */
00189     t1 = (pSrc[2u * i1] >> 4u) + (pSrc[2u * i3] >> 4u);
00190
00191     /* xa' = xa + xb + xc + xd */
00192     pSrc[2u * i0] = (r1 + t1);
00193     /* (xa + xc) - (xb + xd) */
00194     r1 = r1 - t1;
00195     /* yb + yd */
00196     t2 = (pSrc[(2u * i1) + 1u] >> 4u) + (pSrc[(2u * i3) + 1u] >> 4u);
00197     /* ya' = ya + yb + yc + yd */
00198     pSrc[(2u * i0) + 1u] = (s1 + t2);
00199
00200     /* (ya + yc) - (yb + yd) */
00201     s1 = s1 - t2;
00202
00203     /* yb - yd */
00204     t1 = (pSrc[(2u * i1) + 1u] >> 4u) - (pSrc[(2u * i3) + 1u] >> 4u);
00205     /* xb - xd */
00206     t2 = (pSrc[2u * i1] >> 4u) - (pSrc[2u * i3] >> 4u);
00207
00208     /*  index calculation for the coefficients */
00209     ia2 = 2u * ia1;
00210     co2 = pCoef[ia2 * 2u];
00211     si2 = pCoef[(ia2 * 2u) + 1u];
00212
00213     /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
00214     pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
00215                      ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1u;
00216
00217     /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
00218     pSrc[(2u * i1) + 1u] = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
00219                             ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1u;
00220
00221     /* (xa - xc) + (yb - yd) */
00222     r1 = r2 + t1;
00223     /* (xa - xc) - (yb - yd) */
00224     r2 = r2 - t1;
00225
00226     /* (ya - yc) - (xb - xd) */
00227     s1 = s2 - t2;
00228     /* (ya - yc) + (xb - xd) */
00229     s2 = s2 + t2;
00230
00231     co1 = pCoef[ia1 * 2u];
00232     si1 = pCoef[(ia1 * 2u) + 1u];
00233
00234     /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
00235     pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
00236                      ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1u;
00237
00238     /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
00239     pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
00240                             ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1u;
00241
00242     /*  index calculation for the coefficients */
00243     ia3 = 3u * ia1;
00244     co3 = pCoef[ia3 * 2u];
00245     si3 = pCoef[(ia3 * 2u) + 1u];
00246
00247     /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
00248     pSrc[2u * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
00249                      ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1u;
00250
00251     /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
00252     pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
00253                             ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1u;
00254
00255     /*  Twiddle coefficients index modifier */
00256     ia1 = ia1 + twidCoefModifier;
00257
00258     /*  Updating input index */
00259     i0 = i0 + 1u;
00260
00261   } while(--j);
00262
00263   /* end of first stage process */
00264
00265   /* data is in 5.27(q27) format */
00266
00267
00268   /* start of Middle stages process */
00269
00270
00271   /* each stage in middle stages provides two down scaling of the input */
00272
00273   twidCoefModifier <<= 2u;
00274
00275
00276   for (k = fftLen / 4u; k > 4u; k >>= 2u)
00277   {
00278     /*  Initializations for the first stage */
00279     n1 = n2;
00280     n2 >>= 2u;
00281     ia1 = 0u;
00282
00283     /*  Calculation of first stage */
00284     for (j = 0u; j <= (n2 - 1u); j++)
00285     {
00286       /*  index calculation for the coefficients */
00287       ia2 = ia1 + ia1;
00288       ia3 = ia2 + ia1;
00289       co1 = pCoef[ia1 * 2u];
00290       si1 = pCoef[(ia1 * 2u) + 1u];
00291       co2 = pCoef[ia2 * 2u];
00292       si2 = pCoef[(ia2 * 2u) + 1u];
00293       co3 = pCoef[ia3 * 2u];
00294       si3 = pCoef[(ia3 * 2u) + 1u];
00295       /*  Twiddle coefficients index modifier */
00296       ia1 = ia1 + twidCoefModifier;
00297
00298       for (i0 = j; i0 < fftLen; i0 += n1)
00299       {
00300         /*  index calculation for the input as, */
00301         /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
00302         i1 = i0 + n2;
00303         i2 = i1 + n2;
00304         i3 = i2 + n2;
00305
00306         /*  Butterfly implementation */
00307         /* xa + xc */
00308         r1 = pSrc[2u * i0] + pSrc[2u * i2];
00309         /* xa - xc */
00310         r2 = pSrc[2u * i0] - pSrc[2u * i2];
00311
00312         /* ya + yc */
00313         s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00314         /* ya - yc */
00315         s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00316
00317         /* xb + xd */
00318         t1 = pSrc[2u * i1] + pSrc[2u * i3];
00319
00320         /* xa' = xa + xb + xc + xd */
00321         pSrc[2u * i0] = (r1 + t1) >> 2u;
00322         /* xa + xc -(xb + xd) */
00323         r1 = r1 - t1;
00324
00325         /* yb + yd */
00326         t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00327         /* ya' = ya + yb + yc + yd */
00328         pSrc[(2u * i0) + 1u] = (s1 + t2) >> 2u;
00329
00330         /* (ya + yc) - (yb + yd) */
00331         s1 = s1 - t2;
00332
00333         /* (yb - yd) */
00334         t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00335         /* (xb - xd) */
00336         t2 = pSrc[2u * i1] - pSrc[2u * i3];
00337
00338         /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
00339         pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
00340                          ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1u;
00341
00342         /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
00343         pSrc[(2u * i1) + 1u] = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
00344                                 ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1u;
00345
00346         /* (xa - xc) + (yb - yd) */
00347         r1 = r2 + t1;
00348         /* (xa - xc) - (yb - yd) */
00349         r2 = r2 - t1;
00350
00351         /* (ya - yc) -  (xb - xd) */
00352         s1 = s2 - t2;
00353         /* (ya - yc) +  (xb - xd) */
00354         s2 = s2 + t2;
00355
00356         /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
00357         pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
00358                          ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1u;
00359
00360         /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
00361         pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
00362                                 ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1u;
00363
00364         /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
00365         pSrc[2u * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
00366                          ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1u;
00367
00368         /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
00369         pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
00370                                 ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1u;
00371       }
00372     }
00373     twidCoefModifier <<= 2u;
00374   }
00375
00376   /* End of Middle stages process */
00377
00378   /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */
00379   /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */
00380   /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */
00381   /* data is in 5.27(q27) format for the 16 point as there are no middle stages */
00382
00383
00384   /* start of Last stage process */
00385
00386   /*  Initializations of last stage */
00387   n1 = n2;
00388   n2 >>= 2u;
00389
00390   /*  Calculations of last stage */
00391   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
00392   {
00393     /*  index calculation for the input as, */
00394     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
00395     i1 = i0 + n2;
00396     i2 = i1 + n2;
00397     i3 = i2 + n2;
00398
00399     /*  Butterfly implementation */
00400     /* xa + xb */
00401     r1 = pSrc[2u * i0] + pSrc[2u * i2];
00402     /* xa - xb */
00403     r2 = pSrc[2u * i0] - pSrc[2u * i2];
00404
00405     /* ya + yc */
00406     s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00407     /* ya - yc */
00408     s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00409
00410     /* xc + xd */
00411     t1 = pSrc[2u * i1] + pSrc[2u * i3];
00412     /* xa' = xa + xb + xc + xd */
00413     pSrc[2u * i0] = (r1 + t1);
00414     /* (xa + xb) - (xc + xd) */
00415     r1 = r1 - t1;
00416
00417     /* yb + yd */
00418     t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00419     /* ya' = ya + yb + yc + yd */
00420     pSrc[(2u * i0) + 1u] = (s1 + t2);
00421     /* (ya + yc) - (yb + yd) */
00422     s1 = s1 - t2;
00423
00424     /* (yb-yd) */
00425     t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00426     /* (xb-xd) */
00427     t2 = pSrc[2u * i1] - pSrc[2u * i3];
00428
00429     /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
00430     pSrc[2u * i1] = r1;
00431     /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
00432     pSrc[(2u * i1) + 1u] = s1;
00433
00434     /* (xa+yb-xc-yd) */
00435     r1 = r2 + t1;
00436     /* (xa-yb-xc+yd) */
00437     r2 = r2 - t1;
00438
00439     /* (ya-xb-yc+xd) */
00440     s1 = s2 - t2;
00441     /* (ya+xb-yc-xd) */
00442     s2 = s2 + t2;
00443
00444     /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
00445     pSrc[2u * i2] = r1;
00446     /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
00447     pSrc[(2u * i2) + 1u] = s1;
00448
00449     /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
00450     pSrc[2u * i3] = r2;
00451     /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
00452     pSrc[(2u * i3) + 1u] = s2;
00453
00454
00455   }
00456
00457   /* output is in 11.21(q21) format for the 1024 point */
00458   /* output is in 9.23(q23) format for the 256 point */
00459   /* output is in 7.25(q25) format for the 64 point */
00460   /* output is in 5.27(q27) format for the 16 point */
00461
00462   /* End of last stage process */
00463
00464 }
00465
00466
00477 /*
00478 * Radix-4 IFFT algorithm used is :
00479 *
00480 * CIFFT uses same twiddle coefficients as CFFT Function
00481 *  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]
00482 *
00483 *
00484 * IFFT is implemented with following changes in equations from FFT
00485 *
00486 * Input real and imaginary data:
00487 * x(n) = xa + j * ya
00488 * x(n+N/4 ) = xb + j * yb
00489 * x(n+N/2 ) = xc + j * yc
00490 * x(n+3N 4) = xd + j * yd
00491 *
00492 *
00493 * Output real and imaginary data:
00494 * x(4r) = xa'+ j * ya'
00495 * x(4r+1) = xb'+ j * yb'
00496 * x(4r+2) = xc'+ j * yc'
00497 * x(4r+3) = xd'+ j * yd'
00498 *
00499 *
00500 * Twiddle factors for radix-4 IFFT:
00501 * Wn = co1 + j * (si1)
00502 * W2n = co2 + j * (si2)
00503 * W3n = co3 + j * (si3)
00504
00505 * The real and imaginary output values for the radix-4 butterfly are
00506 * xa' = xa + xb + xc + xd
00507 * ya' = ya + yb + yc + yd
00508 * xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)
00509 * yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)
00510 * xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)
00511 * yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)
00512 * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)
00513 * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)
00514 *
00515 */
00516
00517 void arm_radix4_butterfly_inverse_q31(
00518   q31_t * pSrc,
00519   uint32_t fftLen,
00520   q31_t * pCoef,
00521   uint32_t twidCoefModifier)
00522 {
00523   uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
00524   q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
00525
00526   /* input is be 1.31(q31) format for all FFT sizes */
00527   /* Total process is divided into three stages */
00528   /* process first stage, middle stages, & last stage */
00529
00530   /* Start of first stage process */
00531
00532   /* Initializations for the first stage */
00533   n2 = fftLen;
00534   n1 = n2;
00535   /* n2 = fftLen/4 */
00536   n2 >>= 2u;
00537   i0 = 0u;
00538   ia1 = 0u;
00539
00540   j = n2;
00541
00542   do
00543   {
00544
00545     /* input is in 1.31(q31) format and provide 4 guard bits for the input */
00546
00547     /*  index calculation for the input as, */
00548     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
00549     i1 = i0 + n2;
00550     i2 = i1 + n2;
00551     i3 = i2 + n2;
00552
00553     /*  Butterfly implementation */
00554     /* xa + xc */
00555     r1 = (pSrc[2u * i0] >> 4u) + (pSrc[2u * i2] >> 4u);
00556     /* xa - xc */
00557     r2 = (pSrc[2u * i0] >> 4u) - (pSrc[2u * i2] >> 4u);
00558
00559     /* ya + yc */
00560     s1 = (pSrc[(2u * i0) + 1u] >> 4u) + (pSrc[(2u * i2) + 1u] >> 4u);
00561     /* ya - yc */
00562     s2 = (pSrc[(2u * i0) + 1u] >> 4u) - (pSrc[(2u * i2) + 1u] >> 4u);
00563
00564     /* xb + xd */
00565     t1 = (pSrc[2u * i1] >> 4u) + (pSrc[2u * i3] >> 4u);
00566
00567     /* xa' = xa + xb + xc + xd */
00568     pSrc[2u * i0] = (r1 + t1);
00569     /* (xa + xc) - (xb + xd) */
00570     r1 = r1 - t1;
00571     /* yb + yd */
00572     t2 = (pSrc[(2u * i1) + 1u] >> 4u) + (pSrc[(2u * i3) + 1u] >> 4u);
00573     /* ya' = ya + yb + yc + yd */
00574     pSrc[(2u * i0) + 1u] = (s1 + t2);
00575
00576     /* (ya + yc) - (yb + yd) */
00577     s1 = s1 - t2;
00578
00579     /* yb - yd */
00580     t1 = (pSrc[(2u * i1) + 1u] >> 4u) - (pSrc[(2u * i3) + 1u] >> 4u);
00581     /* xb - xd */
00582     t2 = (pSrc[2u * i1] >> 4u) - (pSrc[2u * i3] >> 4u);
00583
00584     /*  index calculation for the coefficients */
00585     ia2 = 2u * ia1;
00586     co2 = pCoef[ia2 * 2u];
00587     si2 = pCoef[(ia2 * 2u) + 1u];
00588
00589     /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
00590     pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) -
00591                      ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1u;
00592
00593     /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
00594     pSrc[2u * i1 + 1u] = (((int32_t) (((q63_t) s1 * co2) >> 32)) +
00595                           ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1u;
00596
00597     /* (xa - xc) - (yb - yd) */
00598     r1 = r2 - t1;
00599     /* (xa - xc) + (yb - yd) */
00600     r2 = r2 + t1;
00601
00602     /* (ya - yc) + (xb - xd) */
00603     s1 = s2 + t2;
00604     /* (ya - yc) - (xb - xd) */
00605     s2 = s2 - t2;
00606
00607     co1 = pCoef[ia1 * 2u];
00608     si1 = pCoef[(ia1 * 2u) + 1u];
00609
00610     /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
00611     pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
00612                      ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1u;
00613
00614     /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
00615     pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
00616                             ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1u;
00617
00618     /*  index calculation for the coefficients */
00619     ia3 = 3u * ia1;
00620     co3 = pCoef[ia3 * 2u];
00621     si3 = pCoef[(ia3 * 2u) + 1u];
00622
00623     /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
00624     pSrc[2u * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
00625                      ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1u;
00626
00627     /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
00628     pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
00629                             ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1u;
00630
00631     /*  Twiddle coefficients index modifier */
00632     ia1 = ia1 + twidCoefModifier;
00633
00634     /*  Updating input index */
00635     i0 = i0 + 1u;
00636
00637   } while(--j);
00638
00639   /* data is in 5.27(q27) format */
00640   /* each stage provides two down scaling of the input */
00641
00642
00643   /* Start of Middle stages process */
00644
00645   twidCoefModifier <<= 2u;
00646
00647   /*  Calculation of second stage to excluding last stage */
00648   for (k = fftLen / 4u; k > 4u; k >>= 2u)
00649   {
00650     /*  Initializations for the first stage */
00651     n1 = n2;
00652     n2 >>= 2u;
00653     ia1 = 0u;
00654
00655     for (j = 0; j <= (n2 - 1u); j++)
00656     {
00657       /*  index calculation for the coefficients */
00658       ia2 = ia1 + ia1;
00659       ia3 = ia2 + ia1;
00660       co1 = pCoef[ia1 * 2u];
00661       si1 = pCoef[(ia1 * 2u) + 1u];
00662       co2 = pCoef[ia2 * 2u];
00663       si2 = pCoef[(ia2 * 2u) + 1u];
00664       co3 = pCoef[ia3 * 2u];
00665       si3 = pCoef[(ia3 * 2u) + 1u];
00666       /*  Twiddle coefficients index modifier */
00667       ia1 = ia1 + twidCoefModifier;
00668
00669       for (i0 = j; i0 < fftLen; i0 += n1)
00670       {
00671         /*  index calculation for the input as, */
00672         /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
00673         i1 = i0 + n2;
00674         i2 = i1 + n2;
00675         i3 = i2 + n2;
00676
00677         /*  Butterfly implementation */
00678         /* xa + xc */
00679         r1 = pSrc[2u * i0] + pSrc[2u * i2];
00680         /* xa - xc */
00681         r2 = pSrc[2u * i0] - pSrc[2u * i2];
00682
00683         /* ya + yc */
00684         s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00685         /* ya - yc */
00686         s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00687
00688         /* xb + xd */
00689         t1 = pSrc[2u * i1] + pSrc[2u * i3];
00690
00691         /* xa' = xa + xb + xc + xd */
00692         pSrc[2u * i0] = (r1 + t1) >> 2u;
00693         /* xa + xc -(xb + xd) */
00694         r1 = r1 - t1;
00695         /* yb + yd */
00696         t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00697         /* ya' = ya + yb + yc + yd */
00698         pSrc[(2u * i0) + 1u] = (s1 + t2) >> 2u;
00699
00700         /* (ya + yc) - (yb + yd) */
00701         s1 = s1 - t2;
00702
00703         /* (yb - yd) */
00704         t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00705         /* (xb - xd) */
00706         t2 = pSrc[2u * i1] - pSrc[2u * i3];
00707
00708         /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
00709         pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32u)) -
00710                          ((int32_t) (((q63_t) s1 * si2) >> 32u))) >> 1u;
00711
00712         /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
00713         pSrc[(2u * i1) + 1u] =
00714           (((int32_t) (((q63_t) s1 * co2) >> 32u)) +
00715            ((int32_t) (((q63_t) r1 * si2) >> 32u))) >> 1u;
00716
00717         /* (xa - xc) - (yb - yd) */
00718         r1 = r2 - t1;
00719         /* (xa - xc) + (yb - yd) */
00720         r2 = r2 + t1;
00721
00722         /* (ya - yc) +  (xb - xd) */
00723         s1 = s2 + t2;
00724         /* (ya - yc) -  (xb - xd) */
00725         s2 = s2 - t2;
00726
00727         /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
00728         pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
00729                          ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1u;
00730
00731         /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
00732         pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
00733                                 ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1u;
00734
00735         /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
00736         pSrc[(2u * i3)] = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
00737                            ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1u;
00738
00739         /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
00740         pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
00741                                 ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1u;
00742       }
00743     }
00744     twidCoefModifier <<= 2u;
00745   }
00746
00747   /* End of Middle stages process */
00748
00749   /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */
00750   /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */
00751   /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */
00752   /* data is in 5.27(q27) format for the 16 point as there are no middle stages */
00753
00754
00755   /* Start of last stage process */
00756
00757
00758   /*  Initializations of last stage */
00759   n1 = n2;
00760   n2 >>= 2u;
00761
00762   /*  Calculations of last stage */
00763   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
00764   {
00765     /*  index calculation for the input as, */
00766     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
00767     i1 = i0 + n2;
00768     i2 = i1 + n2;
00769     i3 = i2 + n2;
00770
00771     /*  Butterfly implementation */
00772     /* xa + xc */
00773     r1 = pSrc[2u * i0] + pSrc[2u * i2];
00774     /* xa - xc */
00775     r2 = pSrc[2u * i0] - pSrc[2u * i2];
00776
00777     /* ya + yc */
00778     s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00779     /* ya - yc */
00780     s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00781
00782     /* xc + xd */
00783     t1 = pSrc[2u * i1] + pSrc[2u * i3];
00784     /* xa' = xa + xb + xc + xd */
00785     pSrc[2u * i0] = (r1 + t1);
00786     /* (xa + xb) - (xc + xd) */
00787     r1 = r1 - t1;
00788
00789     /* yb + yd */
00790     t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00791     /* ya' = ya + yb + yc + yd */
00792     pSrc[(2u * i0) + 1u] = (s1 + t2);
00793     /* (ya + yc) - (yb + yd) */
00794     s1 = s1 - t2;
00795
00796     /* (yb-yd) */
00797     t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00798     /* (xb-xd) */
00799     t2 = pSrc[2u * i1] - pSrc[2u * i3];
00800
00801     /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
00802     pSrc[2u * i1] = r1;
00803     /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
00804     pSrc[(2u * i1) + 1u] = s1;
00805
00806     /* (xa - xc) - (yb-yd) */
00807     r1 = r2 - t1;
00808
00809     /* (xa - xc) + (yb-yd) */
00810     r2 = r2 + t1;
00811
00812     /* (ya - yc) + (xb-xd) */
00813     s1 = s2 + t2;
00814
00815     /* (ya - yc) - (xb-xd) */
00816     s2 = s2 - t2;
00817
00818     /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
00819     pSrc[2u * i2] = r1;
00820     /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
00821     pSrc[(2u * i2) + 1u] = s1;
00822
00823     /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
00824     pSrc[2u * i3] = r2;
00825     /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
00826     pSrc[(2u * i3) + 1u] = s2;
00827
00828   }
00829
00830   /* output is in 11.21(q21) format for the 1024 point */
00831   /* output is in 9.23(q23) format for the 256 point */
00832   /* output is in 7.25(q25) format for the 64 point */
00833   /* output is in 5.27(q27) format for the 16 point */
00834
00835   /* End of last stage process */
00836 }
00837
00838
00839 /*
00840  * @brief  In-place bit reversal function.
00841  * @param[in, out] *pSrc        points to the in-place buffer of Q31 data type.
00842  * @param[in]      fftLen       length of the FFT.
00843  * @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
00844  * @param[in]      *pBitRevTab  points to bit reversal table.
00845  * @return none.
00846  */
00847
00848 void arm_bitreversal_q31(
00849   q31_t * pSrc,
00850   uint32_t fftLen,
00851   uint16_t bitRevFactor,
00852   uint16_t * pBitRevTable)
00853 {
00854   uint32_t fftLenBy2, fftLenBy2p1, i, j;
00855   q31_t in;
00856
00857   /*  Initializations      */
00858   j = 0u;
00859   fftLenBy2 = fftLen / 2u;
00860   fftLenBy2p1 = (fftLen / 2u) + 1u;
00861
00862   /* Bit Reversal Implementation */
00863   for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
00864   {
00865     if(i < j)
00866     {
00867       /*  pSrc[i] <-> pSrc[j]; */
00868       in = pSrc[2u * i];
00869       pSrc[2u * i] = pSrc[2u * j];
00870       pSrc[2u * j] = in;
00871
00872       /*  pSrc[i+1u] <-> pSrc[j+1u] */
00873       in = pSrc[(2u * i) + 1u];
00874       pSrc[(2u * i) + 1u] = pSrc[(2u * j) + 1u];
00875       pSrc[(2u * j) + 1u] = in;
00876
00877       /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
00878       in = pSrc[2u * (i + fftLenBy2p1)];
00879       pSrc[2u * (i + fftLenBy2p1)] = pSrc[2u * (j + fftLenBy2p1)];
00880       pSrc[2u * (j + fftLenBy2p1)] = in;
00881
00882       /*  pSrc[i+fftLenBy2p1+1u] <-> pSrc[j+fftLenBy2p1+1u] */
00883       in = pSrc[(2u * (i + fftLenBy2p1)) + 1u];
00884       pSrc[(2u * (i + fftLenBy2p1)) + 1u] =
00885         pSrc[(2u * (j + fftLenBy2p1)) + 1u];
00886       pSrc[(2u * (j + fftLenBy2p1)) + 1u] = in;
00887
00888     }
00889
00890     /*  pSrc[i+1u] <-> pSrc[j+1u] */
00891     in = pSrc[2u * (i + 1u)];
00892     pSrc[2u * (i + 1u)] = pSrc[2u * (j + fftLenBy2)];
00893     pSrc[2u * (j + fftLenBy2)] = in;
00894
00895     /*  pSrc[i+2u] <-> pSrc[j+2u] */
00896     in = pSrc[(2u * (i + 1u)) + 1u];
00897     pSrc[(2u * (i + 1u)) + 1u] = pSrc[(2u * (j + fftLenBy2)) + 1u];
00898     pSrc[(2u * (j + fftLenBy2)) + 1u] = in;
00899
00900     /*  Reading the index for the bit reversal */
00901     j = *pBitRevTable;
00902
00903     /*  Updating the bit reversal index depending on the fft length */
00904     pBitRevTable += bitRevFactor;
00905   }
00906 }
Generated on Mon Nov 28 2011 11:14:40 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_class_marks_example/system_ARMCM0.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_class_marks_example/system_ARMCM0.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM0.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_class_marks_example/system_ARMCM3.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_class_marks_example/system_ARMCM3.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM3.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_class_marks_example/system_ARMCM4.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_class_marks_example/system_ARMCM4.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM4.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
00062     SCB->CPACR |= ((3UL << 10*2) |                 /* set CP10 Full Access */
00063                    (3UL << 11*2)  );               /* set CP11 Full Access */
00064   #endif
00065
00066   SystemCoreClock = __SYSTEM_CLOCK;
00067
00068 #ifdef __USE_GPIO
00069   ARM_GPIO0->DATA[0].WORD = 0;
00070   ARM_GPIO0->IE = 0;
00071   ARM_GPIO0->DIR = 0xff83;
00072
00073   ARM_GPIO1->DATA[0].WORD = 0;
00074   ARM_GPIO1->IE = 0;
00075   ARM_GPIO1->DIR = 0;
00076
00077   ARM_GPIO2->DATA[0].WORD = 0;
00078   ARM_GPIO2->IE = 0;
00079   ARM_GPIO2->DIR = 0;
00080 #endif
00081 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_class_marks_example/arm_class_marks_example_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_class_marks_example/arm_class_marks_example_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        29. November 2010
00005 * $Revision:    V1.0.3
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_class_marks_example_f32.c
00009 *
00010 * Description:  Example code to calculate Minimum, Maximum
00011 *               Mean, std and variance of marks obtained in a class
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3
00014 *
00015 * Version 1.0.3 2010/11/29
00016 *    Re-organized the CMSIS folders and updated documentation.
00017 *
00018 * Version 1.0.1 2010/10/05 KK
00019 *    Production release and review comments incorporated.
00020 *
00021 * Version 1.0.0 2010/09/20 KK
00022 *    Production release and review comments incorporated.
00023 * ------------------------------------------------------------------- */
00024
00065 #include "arm_math.h"
00066
00067 #define USE_STATIC_INIT
00068
00069  /* ----------------------------------------------------------------------
00070 ** Global defines
00071 ** ------------------------------------------------------------------- */
00072
00073 #define TEST_LENGTH_SAMPLES     (20*4)
00074
00075 /* ----------------------------------------------------------------------
00076 ** List of Marks scored by 20 students for 4 subjects
00077 ** ------------------------------------------------------------------- */
00078 const float32_t testMarks_f32[TEST_LENGTH_SAMPLES] =
00079 {
00080         42.000000,      37.000000,      81.000000,      28.000000,
00081         83.000000,      72.000000,      36.000000,      38.000000,
00082         32.000000,      51.000000,      63.000000,      64.000000,
00083         97.000000,      82.000000,      95.000000,      90.000000,
00084         66.000000,      51.000000,      54.000000,      42.000000,
00085         67.000000,      56.000000,      45.000000,      57.000000,
00086         67.000000,      69.000000,      35.000000,      52.000000,
00087         29.000000,      81.000000,      58.000000,      47.000000,
00088         38.000000,      76.000000,      100.000000,     29.000000,
00089         33.000000,      47.000000,      29.000000,      50.000000,
00090         34.000000,      41.000000,      61.000000,      46.000000,
00091         52.000000,      50.000000,      48.000000,      36.000000,
00092         47.000000,      55.000000,      44.000000,      40.000000,
00093         100.000000,     94.000000,      84.000000,      37.000000,
00094         32.000000,      71.000000,      47.000000,      77.000000,
00095         31.000000,      50.000000,      49.000000,      35.000000,
00096         63.000000,      67.000000,      40.000000,      31.000000,
00097         29.000000,      68.000000,      61.000000,      38.000000,
00098         31.000000,      28.000000,      28.000000,      76.000000,
00099         55.000000,      33.000000,      29.000000,      39.000000
00100 };
00101
00102
00103 /* ----------------------------------------------------------------------
00104 * Number of subjects X 1
00105 * ------------------------------------------------------------------- */
00106 const float32_t testUnity_f32[4] =
00107 {
00108         1.000,  1.000,  1.000,  1.000
00109 };
00110
00111
00112 /* ----------------------------------------------------------------------
00113 ** f32 Output buffer
00114 ** ------------------------------------------------------------------- */
00115 static float32_t testOutput[TEST_LENGTH_SAMPLES];
00116
00117
00118 /* ------------------------------------------------------------------
00119 * Global defines
00120 *------------------------------------------------------------------- */
00121 #define         NUMSTUDENTS  20
00122 #define     NUMSUBJECTS  4
00123
00124 /* ------------------------------------------------------------------
00125 * Global variables
00126 *------------------------------------------------------------------- */
00127
00128 uint32_t        numStudents = 20;
00129 uint32_t        numSubjects = 4;
00130 float32_t       max_marks, min_marks, mean, std, var;
00131 uint32_t        student_num;
00132
00133 /* ----------------------------------------------------------------------------------
00134 * Main f32 test function.  It returns maximum marks secured and student number
00135 * ------------------------------------------------------------------------------- */
00136
00137 int32_t main()
00138 {
00139
00140 #ifndef  USE_STATIC_INIT
00141
00142         arm_matrix_instance_f32 srcA;
00143         arm_matrix_instance_f32 srcB;
00144         arm_matrix_instance_f32 dstC;
00145
00146         /* Input and output matrices initializations */
00147         arm_mat_init_f32(&srcA, numStudents, numSubjects, (float32_t *)testMarks_f32);
00148         arm_mat_init_f32(&srcB, numSubjects, 1, (float32_t *)testUnity_f32);
00149         arm_mat_init_f32(&dstC, numStudents, 1, testOutput);
00150
00151 #else
00152
00153         /* Static Initializations of Input and output matrix sizes and array */
00154         arm_matrix_instance_f32 srcA = {NUMSTUDENTS, NUMSUBJECTS, (float32_t *)testMarks_f32};
00155         arm_matrix_instance_f32 srcB = {NUMSUBJECTS, 1, (float32_t *)testUnity_f32};
00156         arm_matrix_instance_f32 dstC = {NUMSTUDENTS, 1, testOutput};
00157
00158 #endif
00159
00160
00161         /* ----------------------------------------------------------------------
00162         *Call the Matrix multiplication process function
00163         * ------------------------------------------------------------------- */
00164         arm_mat_mult_f32(&srcA, &srcB, &dstC);
00165
00166         /* ----------------------------------------------------------------------
00167         ** Call the Max function to calculate max marks among numStudents
00168         ** ------------------------------------------------------------------- */
00169         arm_max_f32(testOutput, numStudents, &max_marks, &student_num);
00170
00171         /* ----------------------------------------------------------------------
00172         ** Call the Min function to calculate min marks among numStudents
00173         ** ------------------------------------------------------------------- */
00174         arm_min_f32(testOutput, numStudents, &min_marks, &student_num);
00175
00176         /* ----------------------------------------------------------------------
00177         ** Call the Mean function to calculate mean
00178         ** ------------------------------------------------------------------- */
00179         arm_mean_f32(testOutput, numStudents, &mean);
00180
00181         /* ----------------------------------------------------------------------
00182         ** Call the std function to calculate standard deviation
00183         ** ------------------------------------------------------------------- */
00184         arm_std_f32(testOutput, numStudents, &std);
00185
00186         /* ----------------------------------------------------------------------
00187         ** Call the var function to calculate variance
00188         ** ------------------------------------------------------------------- */
00189         arm_var_f32(testOutput, numStudents, &var);
00190
00191     while(1);                             /* main function does not return */
00192 }
00193
00194
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_cmplx_conj_f32.c
00009 *
00010 * Description:  Floating-point complex conjugate.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00072 void arm_cmplx_conj_f32(
00073   float32_t * pSrc,
00074   float32_t * pDst,
00075   uint32_t numSamples)
00076 {
00077
00078 #ifndef ARM_MATH_CM0
00079
00080   /* Run the below code for Cortex-M4 and Cortex-M3 */
00081   uint32_t blkCnt;                               /* loop counter */
00082
00083   /*loop Unrolling */
00084   blkCnt = numSamples >> 2u;
00085
00086   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00087    ** a second loop below computes the remaining 1 to 3 samples. */
00088   while(blkCnt > 0u)
00089   {
00090     /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
00091     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
00092     *pDst++ = *pSrc++;
00093     *pDst++ = -*pSrc++;
00094     *pDst++ = *pSrc++;
00095     *pDst++ = -*pSrc++;
00096     *pDst++ = *pSrc++;
00097     *pDst++ = -*pSrc++;
00098     *pDst++ = *pSrc++;
00099     *pDst++ = -*pSrc++;
00100
00101     /* Decrement the loop counter */
00102     blkCnt--;
00103   }
00104
00105   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00106    ** No loop unrolling is used. */
00107   blkCnt = numSamples % 0x4u;
00108
00109   while(blkCnt > 0u)
00110   {
00111     /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
00112     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
00113     *pDst++ = *pSrc++;
00114     *pDst++ = -*pSrc++;
00115
00116     /* Decrement the loop counter */
00117     blkCnt--;
00118   }
00119
00120 #else
00121
00122   /* Run the below code for Cortex-M0 */
00123
00124   while(numSamples > 0u)
00125   {
00126     /* realOut + j (imagOut) = realIn + j (-1) imagIn */
00127     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
00128     *pDst++ = *pSrc++;
00129     *pDst++ = -*pSrc++;
00130
00131     /* Decrement the loop counter */
00132     numSamples--;
00133   }
00134
00135 #endif /* #ifndef ARM_MATH_CM0 */
00136
00137 }
00138
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_cmplx_conj_q15.c
00009 *
00010 * Description:  Q15 complex conjugate.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00054 void arm_cmplx_conj_q15(
00055   q15_t * pSrc,
00056   q15_t * pDst,
00057   uint32_t numSamples)
00058 {
00059
00060 #ifndef ARM_MATH_CM0
00061
00062   /* Run the below code for Cortex-M4 and Cortex-M3 */
00063   uint32_t blkCnt;                               /* loop counter */
00064
00065   /*loop Unrolling */
00066   blkCnt = numSamples >> 2u;
00067
00068   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00069    ** a second loop below computes the remaining 1 to 3 samples. */
00070   while(blkCnt > 0u)
00071   {
00072     /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
00073     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
00074     *pDst++ = *pSrc++;
00075     *pDst++ = __SSAT(-*pSrc++, 16);
00076     *pDst++ = *pSrc++;
00077     *pDst++ = __SSAT(-*pSrc++, 16);
00078     *pDst++ = *pSrc++;
00079     *pDst++ = __SSAT(-*pSrc++, 16);
00080     *pDst++ = *pSrc++;
00081     *pDst++ = __SSAT(-*pSrc++, 16);
00082
00083     /* Decrement the loop counter */
00084     blkCnt--;
00085   }
00086
00087   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00088    ** No loop unrolling is used. */
00089   blkCnt = numSamples % 0x4u;
00090
00091   while(blkCnt > 0u)
00092   {
00093     /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
00094     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
00095     *pDst++ = *pSrc++;
00096     *pDst++ = __SSAT(-*pSrc++, 16);
00097
00098     /* Decrement the loop counter */
00099     blkCnt--;
00100   }
00101
00102 #else
00103
00104   /* Run the below code for Cortex-M0 */
00105
00106   while(numSamples > 0u)
00107   {
00108     /* realOut + j (imagOut) = realIn+ j (-1) imagIn */
00109     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
00110     *pDst++ = *pSrc++;
00111     *pDst++ = -*pSrc++;
00112
00113     /* Decrement the loop counter */
00114     numSamples--;
00115   }
00116
00117 #endif /* #ifndef ARM_MATH_CM0 */
00118
00119 }
00120
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_cmplx_conj_q31.c
00009 *
00010 * Description:  Q31 complex conjugate.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00054 void arm_cmplx_conj_q31(
00055   q31_t * pSrc,
00056   q31_t * pDst,
00057   uint32_t numSamples)
00058 {
00059
00060 #ifndef ARM_MATH_CM0
00061
00062   /* Run the below code for Cortex-M4 and Cortex-M3 */
00063   uint32_t blkCnt;                               /* loop counter */
00064   q31_t in;                                      /* Input value */
00065
00066   /*loop Unrolling */
00067   blkCnt = numSamples >> 2u;
00068
00069   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00070    ** a second loop below computes the remaining 1 to 3 samples. */
00071   while(blkCnt > 0u)
00072   {
00073     /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
00074     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
00075     /* Saturated to 0x7fffffff if the input is -1(0x80000000) */
00076     *pDst++ = *pSrc++;
00077     in = *pSrc++;
00078     *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
00079     *pDst++ = *pSrc++;
00080     in = *pSrc++;
00081     *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
00082     *pDst++ = *pSrc++;
00083     in = *pSrc++;
00084     *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
00085     *pDst++ = *pSrc++;
00086     in = *pSrc++;
00087     *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
00088
00089     /* Decrement the loop counter */
00090     blkCnt--;
00091   }
00092
00093   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00094    ** No loop unrolling is used. */
00095   blkCnt = numSamples % 0x4u;
00096
00097   while(blkCnt > 0u)
00098   {
00099     /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
00100     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
00101     /* Saturated to 0x7fffffff if the input is -1(0x80000000) */
00102     *pDst++ = *pSrc++;
00103     in = *pSrc++;
00104     *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
00105
00106     /* Decrement the loop counter */
00107     blkCnt--;
00108   }
00109
00110 #else
00111
00112   /* Run the below code for Cortex-M0 */
00113
00114   while(numSamples > 0u)
00115   {
00116     /* realOut + j (imagOut) = realIn+ j (-1) imagIn */
00117     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
00118     *pDst++ = *pSrc++;
00119     *pDst++ = -*pSrc++;
00120
00121     /* Decrement the loop counter */
00122     numSamples--;
00123   }
00124
00125 #endif /* #ifndef ARM_MATH_CM0 */
00126
00127 }
00128
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_cmplx_dot_prod_f32.c
00009 *
00010 * Description:  Floating-point complex dot product
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00077 void arm_cmplx_dot_prod_f32(
00078   float32_t * pSrcA,
00079   float32_t * pSrcB,
00080   uint32_t numSamples,
00081   float32_t * realResult,
00082   float32_t * imagResult)
00083 {
00084   float32_t real_sum = 0.0f, imag_sum = 0.0f;    /* Temporary result storage */
00085
00086 #ifndef ARM_MATH_CM0
00087
00088   /* Run the below code for Cortex-M4 and Cortex-M3 */
00089   uint32_t blkCnt;                               /* loop counter */
00090
00091   /*loop Unrolling */
00092   blkCnt = numSamples >> 2u;
00093
00094   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00095    ** a second loop below computes the remaining 1 to 3 samples. */
00096   while(blkCnt > 0u)
00097   {
00098     /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
00099     real_sum += (*pSrcA++) * (*pSrcB++);
00100     /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
00101     imag_sum += (*pSrcA++) * (*pSrcB++);
00102
00103     real_sum += (*pSrcA++) * (*pSrcB++);
00104     imag_sum += (*pSrcA++) * (*pSrcB++);
00105
00106     real_sum += (*pSrcA++) * (*pSrcB++);
00107     imag_sum += (*pSrcA++) * (*pSrcB++);
00108
00109     real_sum += (*pSrcA++) * (*pSrcB++);
00110     imag_sum += (*pSrcA++) * (*pSrcB++);
00111
00112     /* Decrement the loop counter */
00113     blkCnt--;
00114   }
00115
00116   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00117    ** No loop unrolling is used. */
00118   blkCnt = numSamples % 0x4u;
00119
00120   while(blkCnt > 0u)
00121   {
00122     /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
00123     real_sum += (*pSrcA++) * (*pSrcB++);
00124     /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
00125     imag_sum += (*pSrcA++) * (*pSrcB++);
00126
00127
00128     /* Decrement the loop counter */
00129     blkCnt--;
00130   }
00131
00132 #else
00133
00134   /* Run the below code for Cortex-M0 */
00135
00136   while(numSamples > 0u)
00137   {
00138     /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
00139     real_sum += (*pSrcA++) * (*pSrcB++);
00140     /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
00141     imag_sum += (*pSrcA++) * (*pSrcB++);
00142
00143
00144     /* Decrement the loop counter */
00145     numSamples--;
00146   }
00147
00148 #endif /* #ifndef ARM_MATH_CM0 */
00149
00150   /* Store the real and imaginary results in the destination buffers */
00151   *realResult = real_sum;
00152   *imagResult = imag_sum;
00153 }
00154
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_cmplx_dot_prod_q15.c
00009 *
00010 * Description:  Processing function for the Q15 Complex Dot product
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00059 void arm_cmplx_dot_prod_q15(
00060   q15_t * pSrcA,
00061   q15_t * pSrcB,
00062   uint32_t numSamples,
00063   q31_t * realResult,
00064   q31_t * imagResult)
00065 {
00066   q63_t real_sum = 0, imag_sum = 0;              /* Temporary result storage */
00067
00068 #ifndef ARM_MATH_CM0
00069
00070   /* Run the below code for Cortex-M4 and Cortex-M3 */
00071   uint32_t blkCnt;                               /* loop counter */
00072
00073
00074   /*loop Unrolling */
00075   blkCnt = numSamples >> 2u;
00076
00077   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00078    ** a second loop below computes the remaining 1 to 3 samples. */
00079   while(blkCnt > 0u)
00080   {
00081     /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
00082     real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00083
00084     /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
00085     imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00086
00087     real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00088     imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00089
00090     real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00091     imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00092
00093     real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00094     imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00095
00096     /* Decrement the loop counter */
00097     blkCnt--;
00098   }
00099
00100   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00101    ** No loop unrolling is used. */
00102   blkCnt = numSamples % 0x4u;
00103
00104   while(blkCnt > 0u)
00105   {
00106     /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
00107     real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00108     /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
00109     imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00110
00111     /* Decrement the loop counter */
00112     blkCnt--;
00113   }
00114
00115 #else
00116
00117   /* Run the below code for Cortex-M0 */
00118
00119   while(numSamples > 0u)
00120   {
00121     /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
00122     real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00123     /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
00124     imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00125
00126     /* Decrement the loop counter */
00127     numSamples--;
00128   }
00129
00130 #endif /* #ifndef ARM_MATH_CM0 */
00131
00132   /* Store the real and imaginary results in 8.24 format  */
00133   /* Convert real data in 34.30 to 8.24 by 6 right shifts */
00134   *realResult = (q31_t) (real_sum) >> 6;
00135   /* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */
00136   *imagResult = (q31_t) (imag_sum) >> 6;
00137 }
00138
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_cmplx_dot_prod_q31.c
00009 *
00010 * Description:  Q31 complex dot product
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00060 void arm_cmplx_dot_prod_q31(
00061   q31_t * pSrcA,
00062   q31_t * pSrcB,
00063   uint32_t numSamples,
00064   q63_t * realResult,
00065   q63_t * imagResult)
00066 {
00067   q63_t real_sum = 0, imag_sum = 0;              /* Temporary result storage */
00068
00069 #ifndef ARM_MATH_CM0
00070
00071   /* Run the below code for Cortex-M4 and Cortex-M3 */
00072   uint32_t blkCnt;                               /* loop counter */
00073
00074
00075   /*loop Unrolling */
00076   blkCnt = numSamples >> 2u;
00077
00078   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00079    ** a second loop below computes the remaining 1 to 3 samples. */
00080   while(blkCnt > 0u)
00081   {
00082     /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
00083     /* Convert real data in 2.62 to 16.48 by 14 right shifts */
00084     real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00085     /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
00086     /* Convert imag data in 2.62 to 16.48 by 14 right shifts */
00087     imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00088
00089     real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00090     imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00091
00092     real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00093     imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00094
00095     real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00096     imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00097
00098
00099     /* Decrement the loop counter */
00100     blkCnt--;
00101   }
00102
00103   /* If the numSamples  is not a multiple of 4, compute any remaining output samples here.
00104    ** No loop unrolling is used. */
00105   blkCnt = numSamples % 0x4u;
00106
00107   while(blkCnt > 0u)
00108   {
00109     /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
00110     real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00111     /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
00112     imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00113
00114     /* Decrement the loop counter */
00115     blkCnt--;
00116   }
00117
00118 #else
00119
00120   /* Run the below code for Cortex-M0 */
00121
00122   while(numSamples > 0u)
00123   {
00124     /* outReal = realA[0]* realB[0] + realA[2]* realB[2] + realA[4]* realB[4] + .....+ realA[numSamples-2]* realB[numSamples-2] */
00125     real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00126     /* outImag = imagA[1]* imagB[1] + imagA[3]* imagB[3] + imagA[5]* imagB[5] + .....+ imagA[numSamples-1]* imagB[numSamples-1] */
00127     imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00128
00129     /* Decrement the loop counter */
00130     numSamples--;
00131   }
00132
00133 #endif /* #ifndef ARM_MATH_CM0 */
00134
00135   /* Store the real and imaginary results in 16.48 format  */
00136   *realResult = real_sum;
00137   *imagResult = imag_sum;
00138 }
00139
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_cmplx_mag_f32.c
00009 *
00010 * Description:  Floating-point complex magnitude.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00073 void arm_cmplx_mag_f32(
00074   float32_t * pSrc,
00075   float32_t * pDst,
00076   uint32_t numSamples)
00077 {
00078   float32_t realIn, imagIn;                      /* Temporary variables to hold input values */
00079
00080 #ifndef ARM_MATH_CM0
00081
00082   /* Run the below code for Cortex-M4 and Cortex-M3 */
00083   uint32_t blkCnt;                               /* loop counter */
00084
00085   /*loop Unrolling */
00086   blkCnt = numSamples >> 2u;
00087
00088   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00089    ** a second loop below computes the remaining 1 to 3 samples. */
00090   while(blkCnt > 0u)
00091   {
00092
00093     /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
00094     realIn = *pSrc++;
00095     imagIn = *pSrc++;
00096     /* store the result in the destination buffer. */
00097     arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
00098
00099     realIn = *pSrc++;
00100     imagIn = *pSrc++;
00101     arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
00102
00103     realIn = *pSrc++;
00104     imagIn = *pSrc++;
00105     arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
00106
00107     realIn = *pSrc++;
00108     imagIn = *pSrc++;
00109     arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
00110
00111
00112     /* Decrement the loop counter */
00113     blkCnt--;
00114   }
00115
00116   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00117    ** No loop unrolling is used. */
00118   blkCnt = numSamples % 0x4u;
00119
00120   while(blkCnt > 0u)
00121   {
00122     /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
00123     realIn = *pSrc++;
00124     imagIn = *pSrc++;
00125     /* store the result in the destination buffer. */
00126     arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
00127
00128     /* Decrement the loop counter */
00129     blkCnt--;
00130   }
00131
00132 #else
00133
00134   /* Run the below code for Cortex-M0 */
00135
00136   while(numSamples > 0u)
00137   {
00138     /* out = sqrt((real * real) + (imag * imag)) */
00139     realIn = *pSrc++;
00140     imagIn = *pSrc++;
00141     /* store the result in the destination buffer. */
00142     arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
00143
00144     /* Decrement the loop counter */
00145     numSamples--;
00146   }
00147
00148 #endif /* #ifndef ARM_MATH_CM0 */
00149
00150 }
00151
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_cmplx_mag_q15.c
00009 *
00010 * Description:  Q15 complex magnitude.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00054 void arm_cmplx_mag_q15(
00055   q15_t * pSrc,
00056   q15_t * pDst,
00057   uint32_t numSamples)
00058 {
00059   q15_t real, imag;                              /* Temporary variables to hold input values */
00060   q31_t acc0, acc1;                              /* Accumulators */
00061
00062 #ifndef ARM_MATH_CM0
00063
00064   /* Run the below code for Cortex-M4 and Cortex-M3 */
00065   uint32_t blkCnt;                               /* loop counter */
00066
00067
00068   /*loop Unrolling */
00069   blkCnt = numSamples >> 2u;
00070
00071   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00072    ** a second loop below computes the remaining 1 to 3 samples. */
00073   while(blkCnt > 0u)
00074   {
00075
00076     /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
00077     real = *pSrc++;
00078     imag = *pSrc++;
00079     acc0 = __SMUAD(real, real);
00080     acc1 = __SMUAD(imag, imag);
00081     /* store the result in 2.14 format in the destination buffer. */
00082     arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
00083
00084     real = *pSrc++;
00085     imag = *pSrc++;
00086     acc0 = __SMUAD(real, real);
00087     acc1 = __SMUAD(imag, imag);
00088     /* store the result in 2.14 format in the destination buffer. */
00089     arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
00090
00091     real = *pSrc++;
00092     imag = *pSrc++;
00093     acc0 = __SMUAD(real, real);
00094     acc1 = __SMUAD(imag, imag);
00095     /* store the result in 2.14 format in the destination buffer. */
00096     arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
00097
00098     real = *pSrc++;
00099     imag = *pSrc++;
00100     acc0 = __SMUAD(real, real);
00101     acc1 = __SMUAD(imag, imag);
00102     /* store the result in 2.14 format in the destination buffer. */
00103     arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
00104
00105     /* Decrement the loop counter */
00106     blkCnt--;
00107   }
00108
00109   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00110    ** No loop unrolling is used. */
00111   blkCnt = numSamples % 0x4u;
00112
00113   while(blkCnt > 0u)
00114   {
00115     /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
00116     real = *pSrc++;
00117     imag = *pSrc++;
00118     acc0 = __SMUAD(real, real);
00119     acc1 = __SMUAD(imag, imag);
00120     /* store the result in 2.14 format in the destination buffer. */
00121     arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
00122
00123     /* Decrement the loop counter */
00124     blkCnt--;
00125   }
00126
00127 #else
00128
00129   /* Run the below code for Cortex-M0 */
00130
00131   while(numSamples > 0u)
00132   {
00133     /* out = sqrt(real * real + imag * imag) */
00134     real = *pSrc++;
00135     imag = *pSrc++;
00136
00137     acc0 = (real * real);
00138     acc1 = (imag * imag);
00139
00140     /* store the result in 2.14 format in the destination buffer. */
00141     arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
00142
00143     /* Decrement the loop counter */
00144     numSamples--;
00145   }
00146
00147 #endif /* #ifndef ARM_MATH_CM0 */
00148
00149 }
00150
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_cmplx_mag_q31.c
00009 *
00010 * Description:  Q31 complex magnitude
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00054 void arm_cmplx_mag_q31(
00055   q31_t * pSrc,
00056   q31_t * pDst,
00057   uint32_t numSamples)
00058 {
00059   q31_t real, imag;                              /* Temporary variables to hold input values */
00060   q31_t acc0, acc1;                              /* Accumulators */
00061
00062 #ifndef ARM_MATH_CM0
00063
00064   /* Run the below code for Cortex-M4 and Cortex-M3 */
00065   uint32_t blkCnt;                               /* loop counter */
00066
00067
00068   /*loop Unrolling */
00069   blkCnt = numSamples >> 2u;
00070
00071   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00072    ** a second loop below computes the remaining 1 to 3 samples. */
00073   while(blkCnt > 0u)
00074   {
00075
00076     /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
00077     real = *pSrc++;
00078     imag = *pSrc++;
00079     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00080     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00081     /* store the result in 2.30 format in the destination buffer. */
00082     arm_sqrt_q31(acc0 + acc1, pDst++);
00083
00084     real = *pSrc++;
00085     imag = *pSrc++;
00086     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00087     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00088     /* store the result in 2.30 format in the destination buffer. */
00089     arm_sqrt_q31(acc0 + acc1, pDst++);
00090
00091     real = *pSrc++;
00092     imag = *pSrc++;
00093     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00094     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00095     /* store the result in 2.30 format in the destination buffer. */
00096     arm_sqrt_q31(acc0 + acc1, pDst++);
00097
00098     real = *pSrc++;
00099     imag = *pSrc++;
00100     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00101     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00102     /* store the result in 2.30 format in the destination buffer. */
00103     arm_sqrt_q31(acc0 + acc1, pDst++);
00104
00105     /* Decrement the loop counter */
00106     blkCnt--;
00107   }
00108
00109   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00110    ** No loop unrolling is used. */
00111   blkCnt = numSamples % 0x4u;
00112
00113   while(blkCnt > 0u)
00114   {
00115     /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
00116     real = *pSrc++;
00117     imag = *pSrc++;
00118     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00119     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00120     /* store the result in 2.30 format in the destination buffer. */
00121     arm_sqrt_q31(acc0 + acc1, pDst++);
00122
00123     /* Decrement the loop counter */
00124     blkCnt--;
00125   }
00126
00127 #else
00128
00129   /* Run the below code for Cortex-M0 */
00130
00131   while(numSamples > 0u)
00132   {
00133     /* out = sqrt((real * real) + (imag * imag)) */
00134     real = *pSrc++;
00135     imag = *pSrc++;
00136     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00137     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00138     /* store the result in 2.30 format in the destination buffer. */
00139     arm_sqrt_q31(acc0 + acc1, pDst++);
00140
00141     /* Decrement the loop counter */
00142     numSamples--;
00143   }
00144
00145 #endif /* #ifndef ARM_MATH_CM0 */
00146
00147 }
00148
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_cmplx_mag_squared_f32.c
00009 *
00010 * Description:  Floating-point complex magnitude squared.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00074 void arm_cmplx_mag_squared_f32(
00075   float32_t * pSrc,
00076   float32_t * pDst,
00077   uint32_t numSamples)
00078 {
00079   float32_t real, imag;                          /* Temporary variables to store real and imaginary values */
00080
00081 #ifndef ARM_MATH_CM0
00082
00083   /* Run the below code for Cortex-M4 and Cortex-M3 */
00084   uint32_t blkCnt;                               /* loop counter */
00085
00086   /*loop Unrolling */
00087   blkCnt = numSamples >> 2u;
00088
00089   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00090    ** a second loop below computes the remaining 1 to 3 samples. */
00091   while(blkCnt > 0u)
00092   {
00093     /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
00094     real = *pSrc++;
00095     imag = *pSrc++;
00096     /* store the result in the destination buffer. */
00097     *pDst++ = (real * real) + (imag * imag);
00098
00099     real = *pSrc++;
00100     imag = *pSrc++;
00101     *pDst++ = (real * real) + (imag * imag);
00102
00103     real = *pSrc++;
00104     imag = *pSrc++;
00105     *pDst++ = (real * real) + (imag * imag);
00106
00107     real = *pSrc++;
00108     imag = *pSrc++;
00109     *pDst++ = (real * real) + (imag * imag);
00110
00111     /* Decrement the loop counter */
00112     blkCnt--;
00113   }
00114
00115   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00116    ** No loop unrolling is used. */
00117   blkCnt = numSamples % 0x4u;
00118
00119   while(blkCnt > 0u)
00120   {
00121     /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
00122     real = *pSrc++;
00123     imag = *pSrc++;
00124     /* store the result in the destination buffer. */
00125     *pDst++ = (real * real) + (imag * imag);
00126
00127     /* Decrement the loop counter */
00128     blkCnt--;
00129   }
00130
00131 #else
00132
00133   /* Run the below code for Cortex-M0 */
00134
00135   while(numSamples > 0u)
00136   {
00137     /* reading real and imaginary values */
00138     real = *pSrc++;
00139     imag = *pSrc++;
00140
00141     /* out = (real * real) + (imag * imag) */
00142     /* store the result in the destination buffer. */
00143     *pDst++ = (real * real) + (imag * imag);
00144
00145     /* Decrement the loop counter */
00146     numSamples--;
00147   }
00148
00149 #endif /* #ifndef ARM_MATH_CM0 */
00150
00151 }
00152
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_cmplx_mag_squared_q15.c
00009 *
00010 * Description:  Q15 complex magnitude squared.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00053 void arm_cmplx_mag_squared_q15(
00054   q15_t * pSrc,
00055   q15_t * pDst,
00056   uint32_t numSamples)
00057 {
00058   q15_t real, imag;                              /* Temporary variables to store real and imaginary values */
00059   q31_t acc0, acc1;                              /* Accumulators */
00060
00061 #ifndef ARM_MATH_CM0
00062
00063   /* Run the below code for Cortex-M4 and Cortex-M3 */
00064   uint32_t blkCnt;                               /* loop counter */
00065
00066   /*loop Unrolling */
00067   blkCnt = numSamples >> 2u;
00068
00069   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00070    ** a second loop below computes the remaining 1 to 3 samples. */
00071   while(blkCnt > 0u)
00072   {
00073     /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
00074     real = *pSrc++;
00075     imag = *pSrc++;
00076     acc0 = __SMUAD(real, real);
00077     acc1 = __SMUAD(imag, imag);
00078     /* store the result in 3.13 format in the destination buffer. */
00079     *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
00080
00081     real = *pSrc++;
00082     imag = *pSrc++;
00083     acc0 = __SMUAD(real, real);
00084     acc1 = __SMUAD(imag, imag);
00085     /* store the result in 3.13 format in the destination buffer. */
00086     *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
00087
00088     real = *pSrc++;
00089     imag = *pSrc++;
00090     acc0 = __SMUAD(real, real);
00091     acc1 = __SMUAD(imag, imag);
00092     /* store the result in 3.13 format in the destination buffer. */
00093     *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
00094
00095     real = *pSrc++;
00096     imag = *pSrc++;
00097     acc0 = __SMUAD(real, real);
00098     acc1 = __SMUAD(imag, imag);
00099     /* store the result in 3.13 format in the destination buffer. */
00100     *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
00101
00102     /* Decrement the loop counter */
00103     blkCnt--;
00104   }
00105
00106   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00107    ** No loop unrolling is used. */
00108   blkCnt = numSamples % 0x4u;
00109
00110   while(blkCnt > 0u)
00111   {
00112     /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
00113     real = *pSrc++;
00114     imag = *pSrc++;
00115     acc0 = __SMUAD(real, real);
00116     acc1 = __SMUAD(imag, imag);
00117     /* store the result in 3.13 format in the destination buffer. */
00118     *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
00119
00120     /* Decrement the loop counter */
00121     blkCnt--;
00122   }
00123
00124 #else
00125
00126   /* Run the below code for Cortex-M0 */
00127
00128   while(numSamples > 0u)
00129   {
00130     /* out = ((real * real) + (imag * imag)) */
00131     real = *pSrc++;
00132     imag = *pSrc++;
00133     acc0 = (real * real);
00134     acc1 = (imag * imag);
00135     /* store the result in 3.13 format in the destination buffer. */
00136     *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
00137
00138     /* Decrement the loop counter */
00139     numSamples--;
00140   }
00141
00142 #endif /* #ifndef ARM_MATH_CM0 */
00143
00144 }
00145
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_cmplx_mag_squared_q31.c
00009 *
00010 * Description:  Q31 complex magnitude squared.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00055 void arm_cmplx_mag_squared_q31(
00056   q31_t * pSrc,
00057   q31_t * pDst,
00058   uint32_t numSamples)
00059 {
00060   q31_t real, imag;                              /* Temporary variables to store real and imaginary values */
00061   q31_t acc0, acc1;                              /* Accumulators */
00062
00063 #ifndef ARM_MATH_CM0
00064
00065   /* Run the below code for Cortex-M4 and Cortex-M3 */
00066   uint32_t blkCnt;                               /* loop counter */
00067
00068   /* loop Unrolling */
00069   blkCnt = numSamples >> 2u;
00070
00071   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00072    ** a second loop below computes the remaining 1 to 3 samples. */
00073   while(blkCnt > 0u)
00074   {
00075     /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
00076     real = *pSrc++;
00077     imag = *pSrc++;
00078     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00079     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00080     /* store the result in 3.29 format in the destination buffer. */
00081     *pDst++ = acc0 + acc1;
00082
00083     real = *pSrc++;
00084     imag = *pSrc++;
00085     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00086     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00087     /* store the result in 3.29 format in the destination buffer. */
00088     *pDst++ = acc0 + acc1;
00089
00090     real = *pSrc++;
00091     imag = *pSrc++;
00092     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00093     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00094     /* store the result in 3.29 format in the destination buffer. */
00095     *pDst++ = acc0 + acc1;
00096
00097     real = *pSrc++;
00098     imag = *pSrc++;
00099     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00100     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00101     /* store the result in 3.29 format in the destination buffer. */
00102     *pDst++ = acc0 + acc1;
00103
00104     /* Decrement the loop counter */
00105     blkCnt--;
00106   }
00107
00108   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00109    ** No loop unrolling is used. */
00110   blkCnt = numSamples % 0x4u;
00111
00112   while(blkCnt > 0u)
00113   {
00114     /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
00115     real = *pSrc++;
00116     imag = *pSrc++;
00117     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00118     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00119     /* store the result in 3.29 format in the destination buffer. */
00120     *pDst++ = acc0 + acc1;
00121
00122     /* Decrement the loop counter */
00123     blkCnt--;
00124   }
00125
00126 #else
00127
00128   /* Run the below code for Cortex-M0 */
00129
00130   while(numSamples > 0u)
00131   {
00132     /* out = ((real * real) + (imag * imag)) */
00133     real = *pSrc++;
00134     imag = *pSrc++;
00135     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00136     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00137     /* store the result in 3.29 format in the destination buffer. */
00138     *pDst++ = acc0 + acc1;
00139
00140     /* Decrement the loop counter */
00141     numSamples--;
00142   }
00143
00144 #endif /* #ifndef ARM_MATH_CM0 */
00145
00146 }
00147
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_cmplx_mult_cmplx_f32.c
00009 *
00010 * Description:  Floating-point complex-by-complex multiplication
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00073 void arm_cmplx_mult_cmplx_f32(
00074   float32_t * pSrcA,
00075   float32_t * pSrcB,
00076   float32_t * pDst,
00077   uint32_t numSamples)
00078 {
00079   float32_t a, b, c, d;                          /* Temporary variables to store real and imaginary values */
00080
00081 #ifndef ARM_MATH_CM0
00082
00083   /* Run the below code for Cortex-M4 and Cortex-M3 */
00084   uint32_t blkCnt;                               /* loop counters */
00085
00086   /* loop Unrolling */
00087   blkCnt = numSamples >> 2u;
00088
00089   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00090    ** a second loop below computes the remaining 1 to 3 samples. */
00091   while(blkCnt > 0u)
00092   {
00093     /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
00094     /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
00095     a = *pSrcA++;
00096     b = *pSrcA++;
00097     c = *pSrcB++;
00098     d = *pSrcB++;
00099
00100     /* store the result in the destination buffer. */
00101     *pDst++ = (a * c) - (b * d);
00102     *pDst++ = (a * d) + (b * c);
00103
00104     a = *pSrcA++;
00105     b = *pSrcA++;
00106     c = *pSrcB++;
00107     d = *pSrcB++;
00108
00109     *pDst++ = (a * c) - (b * d);
00110     *pDst++ = (a * d) + (b * c);
00111
00112     a = *pSrcA++;
00113     b = *pSrcA++;
00114     c = *pSrcB++;
00115     d = *pSrcB++;
00116
00117     *pDst++ = (a * c) - (b * d);
00118     *pDst++ = (a * d) + (b * c);
00119
00120     a = *pSrcA++;
00121     b = *pSrcA++;
00122     c = *pSrcB++;
00123     d = *pSrcB++;
00124
00125     *pDst++ = (a * c) - (b * d);
00126     *pDst++ = (a * d) + (b * c);
00127
00128     /* Decrement the numSamples loop counter */
00129     blkCnt--;
00130   }
00131
00132   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00133    ** No loop unrolling is used. */
00134   blkCnt = numSamples % 0x4u;
00135
00136   while(blkCnt > 0u)
00137   {
00138     /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
00139     /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
00140     a = *pSrcA++;
00141     b = *pSrcA++;
00142     c = *pSrcB++;
00143     d = *pSrcB++;
00144
00145     /* store the result in the destination buffer. */
00146     *pDst++ = (a * c) - (b * d);
00147     *pDst++ = (a * d) + (b * c);
00148
00149     /* Decrement the numSamples loop counter */
00150     blkCnt--;
00151   }
00152
00153 #else
00154
00155   /* Run the below code for Cortex-M0 */
00156
00157   while(numSamples > 0u)
00158   {
00159     /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
00160     /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
00161     a = *pSrcA++;
00162     b = *pSrcA++;
00163     c = *pSrcB++;
00164     d = *pSrcB++;
00165
00166     /* store the result in the destination buffer. */
00167     *pDst++ = (a * c) - (b * d);
00168     *pDst++ = (a * d) + (b * c);
00169
00170     /* Decrement the numSamples loop counter */
00171     numSamples--;
00172   }
00173
00174 #endif /* #ifndef ARM_MATH_CM0 */
00175
00176 }
00177
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_cmplx_mult_cmplx_q15.c
00009 *
00010 * Description:  Q15 complex-by-complex multiplication
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00054 void arm_cmplx_mult_cmplx_q15(
00055   q15_t * pSrcA,
00056   q15_t * pSrcB,
00057   q15_t * pDst,
00058   uint32_t numSamples)
00059 {
00060   q15_t a, b, c, d;                              /* Temporary variables to store real and imaginary values */
00061
00062 #ifndef ARM_MATH_CM0
00063
00064   /* Run the below code for Cortex-M4 and Cortex-M3 */
00065   uint32_t blkCnt;                               /* loop counters */
00066
00067   /* loop Unrolling */
00068   blkCnt = numSamples >> 2u;
00069
00070   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00071    ** a second loop below computes the remaining 1 to 3 samples. */
00072   while(blkCnt > 0u)
00073   {
00074     /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
00075     /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
00076     a = *pSrcA++;
00077     b = *pSrcA++;
00078     c = *pSrcB++;
00079     d = *pSrcB++;
00080
00081     /* store the result in 3.13 format in the destination buffer. */
00082     *pDst++ =
00083       (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
00084     /* store the result in 3.13 format in the destination buffer. */
00085     *pDst++ =
00086       (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
00087
00088     a = *pSrcA++;
00089     b = *pSrcA++;
00090     c = *pSrcB++;
00091     d = *pSrcB++;
00092
00093     /* store the result in 3.13 format in the destination buffer. */
00094     *pDst++ =
00095       (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
00096     /* store the result in 3.13 format in the destination buffer. */
00097     *pDst++ =
00098       (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
00099
00100     a = *pSrcA++;
00101     b = *pSrcA++;
00102     c = *pSrcB++;
00103     d = *pSrcB++;
00104
00105     /* store the result in 3.13 format in the destination buffer. */
00106     *pDst++ =
00107       (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
00108     /* store the result in 3.13 format in the destination buffer. */
00109     *pDst++ =
00110       (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
00111
00112     a = *pSrcA++;
00113     b = *pSrcA++;
00114     c = *pSrcB++;
00115     d = *pSrcB++;
00116
00117     /* store the result in 3.13 format in the destination buffer. */
00118     *pDst++ =
00119       (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
00120     /* store the result in 3.13 format in the destination buffer. */
00121     *pDst++ =
00122       (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
00123
00124     /* Decrement the blockSize loop counter */
00125     blkCnt--;
00126   }
00127
00128   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00129    ** No loop unrolling is used. */
00130   blkCnt = numSamples % 0x4u;
00131
00132   while(blkCnt > 0u)
00133   {
00134     /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
00135     /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
00136     a = *pSrcA++;
00137     b = *pSrcA++;
00138     c = *pSrcB++;
00139     d = *pSrcB++;
00140
00141     /* store the result in 3.13 format in the destination buffer. */
00142     *pDst++ =
00143       (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
00144     /* store the result in 3.13 format in the destination buffer. */
00145     *pDst++ =
00146       (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
00147
00148     /* Decrement the blockSize loop counter */
00149     blkCnt--;
00150   }
00151
00152 #else
00153
00154   /* Run the below code for Cortex-M0 */
00155
00156   while(numSamples > 0u)
00157   {
00158     /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
00159     /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
00160     a = *pSrcA++;
00161     b = *pSrcA++;
00162     c = *pSrcB++;
00163     d = *pSrcB++;
00164
00165     /* store the result in 3.13 format in the destination buffer. */
00166     *pDst++ =
00167       (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
00168     /* store the result in 3.13 format in the destination buffer. */
00169     *pDst++ =
00170       (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
00171
00172     /* Decrement the blockSize loop counter */
00173     numSamples--;
00174   }
00175
00176 #endif /* #ifndef ARM_MATH_CM0 */
00177
00178 }
00179
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_cmplx_mult_cmplx_q31.c
00009 *
00010 * Description:  Q31 complex-by-complex multiplication
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00056 void arm_cmplx_mult_cmplx_q31(
00057   q31_t * pSrcA,
00058   q31_t * pSrcB,
00059   q31_t * pDst,
00060   uint32_t numSamples)
00061 {
00062   q31_t a, b, c, d;                              /* Temporary variables to store real and imaginary values */
00063   uint32_t blkCnt;                               /* loop counters */
00064
00065 #ifndef ARM_MATH_CM0
00066
00067   /* Run the below code for Cortex-M4 and Cortex-M3 */
00068
00069   /* loop Unrolling */
00070   blkCnt = numSamples >> 2u;
00071
00072   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00073    ** a second loop below computes the remaining 1 to 3 samples. */
00074   while(blkCnt > 0u)
00075   {
00076     /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
00077     /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
00078     a = *pSrcA++;
00079     b = *pSrcA++;
00080     c = *pSrcB++;
00081     d = *pSrcB++;
00082
00083     /* store the real result in 3.29 format in the destination buffer. */
00084     *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
00085     /* store the imag result in 3.29 format in the destination buffer. */
00086     *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
00087
00088     a = *pSrcA++;
00089     b = *pSrcA++;
00090     c = *pSrcB++;
00091     d = *pSrcB++;
00092
00093     /* store the result in 3.29 format in the destination buffer. */
00094     *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
00095     /* store the result in 3.29 format in the destination buffer. */
00096     *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
00097
00098     a = *pSrcA++;
00099     b = *pSrcA++;
00100     c = *pSrcB++;
00101     d = *pSrcB++;
00102
00103     /* store the result in 3.29 format in the destination buffer. */
00104     *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
00105     /* store the result in 3.29 format in the destination buffer. */
00106     *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
00107
00108     a = *pSrcA++;
00109     b = *pSrcA++;
00110     c = *pSrcB++;
00111     d = *pSrcB++;
00112
00113     /* store the result in 3.29 format in the destination buffer. */
00114     *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
00115     /* store the result in 3.29 format in the destination buffer. */
00116     *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
00117
00118     /* Decrement the blockSize loop counter */
00119     blkCnt--;
00120   }
00121
00122   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00123    ** No loop unrolling is used. */
00124   blkCnt = numSamples % 0x4u;
00125
00126   while(blkCnt > 0u)
00127   {
00128     /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
00129     /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
00130     a = *pSrcA++;
00131     b = *pSrcA++;
00132     c = *pSrcB++;
00133     d = *pSrcB++;
00134
00135     /* store the result in 3.29 format in the destination buffer. */
00136     *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
00137     /* store the result in 3.29 format in the destination buffer. */
00138     *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
00139
00140     /* Decrement the blockSize loop counter */
00141     blkCnt--;
00142   }
00143
00144 #else
00145
00146   /* Run the below code for Cortex-M0 */
00147
00148   /* loop Unrolling */
00149   blkCnt = numSamples >> 1u;
00150
00151   /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.
00152    ** a second loop below computes the remaining 1 sample. */
00153   while(blkCnt > 0u)
00154   {
00155     /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
00156     /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
00157     a = *pSrcA++;
00158     b = *pSrcA++;
00159     c = *pSrcB++;
00160     d = *pSrcB++;
00161
00162     /* store the real result in 3.29 format in the destination buffer. */
00163     *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
00164     /* store the imag result in 3.29 format in the destination buffer. */
00165     *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
00166
00167     a = *pSrcA++;
00168     b = *pSrcA++;
00169     c = *pSrcB++;
00170     d = *pSrcB++;
00171
00172     /* store the result in 3.29 format in the destination buffer. */
00173     *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
00174     /* store the result in 3.29 format in the destination buffer. */
00175     *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
00176
00177     /* Decrement the blockSize loop counter */
00178     blkCnt--;
00179   }
00180
00181   /* If the blockSize is not a multiple of 2, compute any remaining output samples here.
00182    ** No loop unrolling is used. */
00183   blkCnt = numSamples % 0x2u;
00184
00185   while(blkCnt > 0u)
00186   {
00187     /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
00188     /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
00189     a = *pSrcA++;
00190     b = *pSrcA++;
00191     c = *pSrcB++;
00192     d = *pSrcB++;
00193
00194     /* store the result in 3.29 format in the destination buffer. */
00195     *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
00196     /* store the result in 3.29 format in the destination buffer. */
00197     *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
00198
00199     /* Decrement the blockSize loop counter */
00200     blkCnt--;
00201   }
00202
00203 #endif /* #ifndef ARM_MATH_CM0 */
00204
00205 }
00206
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_cmplx_mult_real_f32.c
00009 *
00010 * Description:  Floating-point complex by real multiplication
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00074 void arm_cmplx_mult_real_f32(
00075   float32_t * pSrcCmplx,
00076   float32_t * pSrcReal,
00077   float32_t * pCmplxDst,
00078   uint32_t numSamples)
00079 {
00080   float32_t in;                                  /* Temporary variable to store input value */
00081
00082 #ifndef ARM_MATH_CM0
00083
00084   /* Run the below code for Cortex-M4 and Cortex-M3 */
00085   uint32_t blkCnt;                               /* loop counters */
00086
00087   /* loop Unrolling */
00088   blkCnt = numSamples >> 2u;
00089
00090   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00091    ** a second loop below computes the remaining 1 to 3 samples. */
00092   while(blkCnt > 0u)
00093   {
00094     /* C[2 * i] = A[2 * i] * B[i].            */
00095     /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
00096     in = *pSrcReal++;
00097     /* store the result in the destination buffer. */
00098     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00099     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00100
00101     in = *pSrcReal++;
00102     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00103     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00104
00105     in = *pSrcReal++;
00106     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00107     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00108
00109     in = *pSrcReal++;
00110     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00111     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00112
00113     /* Decrement the numSamples loop counter */
00114     blkCnt--;
00115   }
00116
00117   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00118    ** No loop unrolling is used. */
00119   blkCnt = numSamples % 0x4u;
00120
00121   while(blkCnt > 0u)
00122   {
00123     /* C[2 * i] = A[2 * i] * B[i].            */
00124     /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
00125     in = *pSrcReal++;
00126     /* store the result in the destination buffer. */
00127     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00128     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00129
00130     /* Decrement the numSamples loop counter */
00131     blkCnt--;
00132   }
00133
00134 #else
00135
00136   /* Run the below code for Cortex-M0 */
00137
00138   while(numSamples > 0u)
00139   {
00140     /* realOut = realA * realB.            */
00141     /* imagOut = imagA * realB.                */
00142     in = *pSrcReal++;
00143     /* store the result in the destination buffer. */
00144     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00145     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00146
00147     /* Decrement the numSamples loop counter */
00148     numSamples--;
00149   }
00150
00151 #endif /* #ifndef ARM_MATH_CM0 */
00152
00153 }
00154
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_cmplx_mult_real_q15.c
00009 *
00010 * Description:  Q15 complex by real multiplication
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00056 void arm_cmplx_mult_real_q15(
00057   q15_t * pSrcCmplx,
00058   q15_t * pSrcReal,
00059   q15_t * pCmplxDst,
00060   uint32_t numSamples)
00061 {
00062   q15_t in;                                      /* Temporary variable to store input value */
00063
00064 #ifndef ARM_MATH_CM0
00065
00066   /* Run the below code for Cortex-M4 and Cortex-M3 */
00067   uint32_t blkCnt;                               /* loop counters */
00068
00069   /* loop Unrolling */
00070   blkCnt = numSamples >> 2u;
00071
00072   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00073    ** a second loop below computes the remaining 1 to 3 samples. */
00074   while(blkCnt > 0u)
00075   {
00076     /* C[2 * i] = A[2 * i] * B[i].            */
00077     /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
00078     in = *pSrcReal++;
00079     /* store the result in the destination buffer. */
00080     *pCmplxDst++ =
00081       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00082     *pCmplxDst++ =
00083       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00084
00085     in = *pSrcReal++;
00086     *pCmplxDst++ =
00087       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00088     *pCmplxDst++ =
00089       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00090
00091     in = *pSrcReal++;
00092     *pCmplxDst++ =
00093       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00094     *pCmplxDst++ =
00095       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00096
00097     in = *pSrcReal++;
00098     *pCmplxDst++ =
00099       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00100     *pCmplxDst++ =
00101       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00102
00103     /* Decrement the numSamples loop counter */
00104     blkCnt--;
00105   }
00106
00107   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00108    ** No loop unrolling is used. */
00109   blkCnt = numSamples % 0x4u;
00110
00111   while(blkCnt > 0u)
00112   {
00113     /* C[2 * i] = A[2 * i] * B[i].            */
00114     /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
00115     in = *pSrcReal++;
00116     /* store the result in the destination buffer. */
00117     *pCmplxDst++ =
00118       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00119     *pCmplxDst++ =
00120       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00121
00122     /* Decrement the numSamples loop counter */
00123     blkCnt--;
00124   }
00125
00126 #else
00127
00128   /* Run the below code for Cortex-M0 */
00129
00130   while(numSamples > 0u)
00131   {
00132     /* realOut = realA * realB.            */
00133     /* imagOut = imagA * realB.                */
00134     in = *pSrcReal++;
00135     /* store the result in the destination buffer. */
00136     *pCmplxDst++ =
00137       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00138     *pCmplxDst++ =
00139       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00140
00141     /* Decrement the numSamples loop counter */
00142     numSamples--;
00143   }
00144
00145 #endif /* #ifndef ARM_MATH_CM0 */
00146
00147 }
00148
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_cmplx_mult_real_q31.c
00009 *
00010 * Description:  Q31 complex by real multiplication
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00056 void arm_cmplx_mult_real_q31(
00057   q31_t * pSrcCmplx,
00058   q31_t * pSrcReal,
00059   q31_t * pCmplxDst,
00060   uint32_t numSamples)
00061 {
00062   q31_t in;                                      /* Temporary variable to store input value */
00063
00064 #ifndef ARM_MATH_CM0
00065
00066   /* Run the below code for Cortex-M4 and Cortex-M3 */
00067   uint32_t blkCnt;                               /* loop counters */
00068
00069   /* loop Unrolling */
00070   blkCnt = numSamples >> 2u;
00071
00072   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00073    ** a second loop below computes the remaining 1 to 3 samples. */
00074   while(blkCnt > 0u)
00075   {
00076     /* C[2 * i] = A[2 * i] * B[i].            */
00077     /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
00078     in = *pSrcReal++;
00079     /* store the result in the destination buffer. */
00080     *pCmplxDst++ =
00081       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00082     *pCmplxDst++ =
00083       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00084
00085     in = *pSrcReal++;
00086     *pCmplxDst++ =
00087       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00088     *pCmplxDst++ =
00089       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00090
00091     in = *pSrcReal++;
00092     *pCmplxDst++ =
00093       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00094     *pCmplxDst++ =
00095       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00096
00097     in = *pSrcReal++;
00098     *pCmplxDst++ =
00099       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00100     *pCmplxDst++ =
00101       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00102
00103     /* Decrement the numSamples loop counter */
00104     blkCnt--;
00105   }
00106
00107   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00108    ** No loop unrolling is used. */
00109   blkCnt = numSamples % 0x4u;
00110
00111   while(blkCnt > 0u)
00112   {
00113     /* C[2 * i] = A[2 * i] * B[i].            */
00114     /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
00115     in = *pSrcReal++;
00116     /* store the result in the destination buffer. */
00117     *pCmplxDst++ =
00118       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00119     *pCmplxDst++ =
00120       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00121
00122     /* Decrement the numSamples loop counter */
00123     blkCnt--;
00124   }
00125
00126 #else
00127
00128   /* Run the below code for Cortex-M0 */
00129
00130   while(numSamples > 0u)
00131   {
00132     /* realOut = realA * realB.            */
00133     /* imagReal = imagA * realB.               */
00134     in = *pSrcReal++;
00135     /* store the result in the destination buffer. */
00136     *pCmplxDst++ =
00137       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00138     *pCmplxDst++ =
00139       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00140
00141     /* Decrement the numSamples loop counter */
00142     numSamples--;
00143   }
00144
00145 #endif /* #ifndef ARM_MATH_CM0 */
00146
00147 }
00148
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_common_tables.c
00009 *
00010 * Description:  This file has common tables like Bitreverse, reciprocal etc which are used across different functions
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030
00031 #include "arm_math.h"
00032
00065 /*
00066 * @brief  Table for bit reversal process
00067 */
00068 const uint16_t armBitRevTable[256] = {
00069   0x100, 0x80, 0x180, 0x40, 0x140, 0xc0, 0x1c0,
00070   0x20, 0x120, 0xa0, 0x1a0, 0x60, 0x160, 0xe0,
00071   0x1e0, 0x10, 0x110, 0x90, 0x190, 0x50, 0x150,
00072   0xd0, 0x1d0, 0x30, 0x130, 0xb0, 0x1b0, 0x70,
00073   0x170, 0xf0, 0x1f0, 0x8, 0x108, 0x88, 0x188,
00074   0x48, 0x148, 0xc8, 0x1c8, 0x28, 0x128, 0xa8,
00075   0x1a8, 0x68, 0x168, 0xe8, 0x1e8, 0x18, 0x118,
00076   0x98, 0x198, 0x58, 0x158, 0xd8, 0x1d8, 0x38,
00077   0x138, 0xb8, 0x1b8, 0x78, 0x178, 0xf8, 0x1f8,
00078   0x4, 0x104, 0x84, 0x184, 0x44, 0x144, 0xc4,
00079   0x1c4, 0x24, 0x124, 0xa4, 0x1a4, 0x64, 0x164,
00080   0xe4, 0x1e4, 0x14, 0x114, 0x94, 0x194, 0x54,
00081   0x154, 0xd4, 0x1d4, 0x34, 0x134, 0xb4, 0x1b4,
00082   0x74, 0x174, 0xf4, 0x1f4, 0xc, 0x10c, 0x8c,
00083   0x18c, 0x4c, 0x14c, 0xcc, 0x1cc, 0x2c, 0x12c,
00084   0xac, 0x1ac, 0x6c, 0x16c, 0xec, 0x1ec, 0x1c,
00085   0x11c, 0x9c, 0x19c, 0x5c, 0x15c, 0xdc, 0x1dc,
00086   0x3c, 0x13c, 0xbc, 0x1bc, 0x7c, 0x17c, 0xfc,
00087   0x1fc, 0x2, 0x102, 0x82, 0x182, 0x42, 0x142,
00088   0xc2, 0x1c2, 0x22, 0x122, 0xa2, 0x1a2, 0x62,
00089   0x162, 0xe2, 0x1e2, 0x12, 0x112, 0x92, 0x192,
00090   0x52, 0x152, 0xd2, 0x1d2, 0x32, 0x132, 0xb2,
00091   0x1b2, 0x72, 0x172, 0xf2, 0x1f2, 0xa, 0x10a,
00092   0x8a, 0x18a, 0x4a, 0x14a, 0xca, 0x1ca, 0x2a,
00093   0x12a, 0xaa, 0x1aa, 0x6a, 0x16a, 0xea, 0x1ea,
00094   0x1a, 0x11a, 0x9a, 0x19a, 0x5a, 0x15a, 0xda,
00095   0x1da, 0x3a, 0x13a, 0xba, 0x1ba, 0x7a, 0x17a,
00096   0xfa, 0x1fa, 0x6, 0x106, 0x86, 0x186, 0x46,
00097   0x146, 0xc6, 0x1c6, 0x26, 0x126, 0xa6, 0x1a6,
00098   0x66, 0x166, 0xe6, 0x1e6, 0x16, 0x116, 0x96,
00099   0x196, 0x56, 0x156, 0xd6, 0x1d6, 0x36, 0x136,
00100   0xb6, 0x1b6, 0x76, 0x176, 0xf6, 0x1f6, 0xe,
00101   0x10e, 0x8e, 0x18e, 0x4e, 0x14e, 0xce, 0x1ce,
00102   0x2e, 0x12e, 0xae, 0x1ae, 0x6e, 0x16e, 0xee,
00103   0x1ee, 0x1e, 0x11e, 0x9e, 0x19e, 0x5e, 0x15e,
00104   0xde, 0x1de, 0x3e, 0x13e, 0xbe, 0x1be, 0x7e,
00105   0x17e, 0xfe, 0x1fe, 0x1
00106 };
00107
00112 /*
00113 * @brief  Q15 table for reciprocal
00114 */
00115 const q15_t armRecipTableQ15[64] = {
00116   0x7F03, 0x7D13, 0x7B31, 0x795E, 0x7798, 0x75E0,
00117   0x7434, 0x7294, 0x70FF, 0x6F76, 0x6DF6, 0x6C82,
00118   0x6B16, 0x69B5, 0x685C, 0x670C, 0x65C4, 0x6484,
00119   0x634C, 0x621C, 0x60F3, 0x5FD0, 0x5EB5, 0x5DA0,
00120   0x5C91, 0x5B88, 0x5A85, 0x5988, 0x5890, 0x579E,
00121   0x56B0, 0x55C8, 0x54E4, 0x5405, 0x532B, 0x5255,
00122   0x5183, 0x50B6, 0x4FEC, 0x4F26, 0x4E64, 0x4DA6,
00123   0x4CEC, 0x4C34, 0x4B81, 0x4AD0, 0x4A23, 0x4978,
00124   0x48D1, 0x482D, 0x478C, 0x46ED, 0x4651, 0x45B8,
00125   0x4521, 0x448D, 0x43FC, 0x436C, 0x42DF, 0x4255,
00126   0x41CC, 0x4146, 0x40C2, 0x4040
00127 };
00128
00129 /*
00130 * @brief  Q31 table for reciprocal
00131 */
00132 const q31_t armRecipTableQ31[64] = {
00133   0x7F03F03F, 0x7D137420, 0x7B31E739, 0x795E9F94, 0x7798FD29, 0x75E06928,
00134   0x7434554D, 0x72943B4B, 0x70FF9C40, 0x6F760031, 0x6DF6F593, 0x6C8210E3,
00135   0x6B16EC3A, 0x69B526F6, 0x685C655F, 0x670C505D, 0x65C4952D, 0x6484E519,
00136   0x634CF53E, 0x621C7E4F, 0x60F33C61, 0x5FD0EEB3, 0x5EB55785, 0x5DA03BEB,
00137   0x5C9163A1, 0x5B8898E6, 0x5A85A85A, 0x598860DF, 0x58909373, 0x579E1318,
00138   0x56B0B4B8, 0x55C84F0B, 0x54E4BA80, 0x5405D124, 0x532B6E8F, 0x52556FD0,
00139   0x5183B35A, 0x50B618F3, 0x4FEC81A2, 0x4F26CFA2, 0x4E64E64E, 0x4DA6AA1D,
00140   0x4CEC008B, 0x4C34D010, 0x4B810016, 0x4AD078EF, 0x4A2323C4, 0x4978EA96,
00141   0x48D1B827, 0x482D77FE, 0x478C1657, 0x46ED801D, 0x4651A2E5, 0x45B86CE2,
00142   0x4521CCE1, 0x448DB244, 0x43FC0CFA, 0x436CCD78, 0x42DFE4B4, 0x42554426,
00143   0x41CCDDB6, 0x4146A3C6, 0x40C28923, 0x40408102
00144 };
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_common_tables.h Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_common_tables.h
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        11. November 2010
00005 * $Revision:    V1.0.2
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_common_tables.h
00009 *
00010 * Description:  This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.2 2010/11/11
00015 *    Documentation updated.
00016 *
00017 * Version 1.0.1 2010/10/05
00018 *    Production release and review comments incorporated.
00019 *
00020 * Version 1.0.0 2010/09/20
00021 *    Production release and review comments incorporated.
00022 * -------------------------------------------------------------------- */
00023
00024 #ifndef _ARM_COMMON_TABLES_H
00025 #define _ARM_COMMON_TABLES_H
00026
00027 #include "arm_math.h"
00028
00029 extern uint16_t armBitRevTable[256];
00030 extern q15_t armRecipTableQ15[64];
00031 extern q31_t armRecipTableQ31[64];
00032 extern const q31_t realCoefAQ31[1024];
00033 extern const q31_t realCoefBQ31[1024];
00034
00035 #endif /*  ARM_COMMON_TABLES_H */
Generated on Mon Nov 28 2011 11:14:40 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_conv_f32.c
00009 *
00010 * Description:  Convolution of floating-point sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00103 void arm_conv_f32(
00104   float32_t * pSrcA,
00105   uint32_t srcALen,
00106   float32_t * pSrcB,
00107   uint32_t srcBLen,
00108   float32_t * pDst)
00109 {
00110
00111
00112 #ifndef ARM_MATH_CM0
00113
00114   /* Run the below code for Cortex-M4 and Cortex-M3 */
00115
00116   float32_t *pIn1;                               /* inputA pointer */
00117   float32_t *pIn2;                               /* inputB pointer */
00118   float32_t *pOut = pDst;                        /* output pointer */
00119   float32_t *px;                                 /* Intermediate inputA pointer */
00120   float32_t *py;                                 /* Intermediate inputB pointer */
00121   float32_t *pSrc1, *pSrc2;                      /* Intermediate pointers */
00122   float32_t sum, acc0, acc1, acc2, acc3;         /* Accumulator */
00123   float32_t x0, x1, x2, x3, c0;                  /* Temporary variables to hold state and coefficient values */
00124   uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counters */
00125
00126   /* The algorithm implementation is based on the lengths of the inputs. */
00127   /* srcB is always made to slide across srcA. */
00128   /* So srcBLen is always considered as shorter or equal to srcALen */
00129   if(srcALen >= srcBLen)
00130   {
00131     /* Initialization of inputA pointer */
00132     pIn1 = pSrcA;
00133
00134     /* Initialization of inputB pointer */
00135     pIn2 = pSrcB;
00136   }
00137   else
00138   {
00139     /* Initialization of inputA pointer */
00140     pIn1 = pSrcB;
00141
00142     /* Initialization of inputB pointer */
00143     pIn2 = pSrcA;
00144
00145     /* srcBLen is always considered as shorter or equal to srcALen */
00146     j = srcBLen;
00147     srcBLen = srcALen;
00148     srcALen = j;
00149   }
00150
00151   /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00152   /* The function is internally
00153    * divided into three stages according to the number of multiplications that has to be
00154    * taken place between inputA samples and inputB samples. In the first stage of the
00155    * algorithm, the multiplications increase by one for every iteration.
00156    * In the second stage of the algorithm, srcBLen number of multiplications are done.
00157    * In the third stage of the algorithm, the multiplications decrease by one
00158    * for every iteration. */
00159
00160   /* The algorithm is implemented in three stages.
00161      The loop counters of each stage is initiated here. */
00162   blockSize1 = srcBLen - 1u;
00163   blockSize2 = srcALen - (srcBLen - 1u);
00164   blockSize3 = blockSize1;
00165
00166   /* --------------------------
00167    * initializations of stage1
00168    * -------------------------*/
00169
00170   /* sum = x[0] * y[0]
00171    * sum = x[0] * y[1] + x[1] * y[0]
00172    * ....
00173    * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00174    */
00175
00176   /* In this stage the MAC operations are increased by 1 for every iteration.
00177      The count variable holds the number of MAC operations performed */
00178   count = 1u;
00179
00180   /* Working pointer of inputA */
00181   px = pIn1;
00182
00183   /* Working pointer of inputB */
00184   py = pIn2;
00185
00186
00187   /* ------------------------
00188    * Stage1 process
00189    * ----------------------*/
00190
00191   /* The first stage starts here */
00192   while(blockSize1 > 0u)
00193   {
00194     /* Accumulator is made zero for every iteration */
00195     sum = 0.0f;
00196
00197     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00198     k = count >> 2u;
00199
00200     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00201      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00202     while(k > 0u)
00203     {
00204       /* x[0] * y[srcBLen - 1] */
00205       sum += *px++ * *py--;
00206
00207       /* x[1] * y[srcBLen - 2] */
00208       sum += *px++ * *py--;
00209
00210       /* x[2] * y[srcBLen - 3] */
00211       sum += *px++ * *py--;
00212
00213       /* x[3] * y[srcBLen - 4] */
00214       sum += *px++ * *py--;
00215
00216       /* Decrement the loop counter */
00217       k--;
00218     }
00219
00220     /* If the count is not a multiple of 4, compute any remaining MACs here.
00221      ** No loop unrolling is used. */
00222     k = count % 0x4u;
00223
00224     while(k > 0u)
00225     {
00226       /* Perform the multiply-accumulate */
00227       sum += *px++ * *py--;
00228
00229       /* Decrement the loop counter */
00230       k--;
00231     }
00232
00233     /* Store the result in the accumulator in the destination buffer. */
00234     *pOut++ = sum;
00235
00236     /* Update the inputA and inputB pointers for next MAC calculation */
00237     py = pIn2 + count;
00238     px = pIn1;
00239
00240     /* Increment the MAC count */
00241     count++;
00242
00243     /* Decrement the loop counter */
00244     blockSize1--;
00245   }
00246
00247   /* --------------------------
00248    * Initializations of stage2
00249    * ------------------------*/
00250
00251   /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00252    * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00253    * ....
00254    * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00255    */
00256
00257   /* Working pointer of inputA */
00258   px = pIn1;
00259
00260   /* Working pointer of inputB */
00261   pSrc2 = pIn2 + (srcBLen - 1u);
00262   py = pSrc2;
00263
00264   /* count is index by which the pointer pIn1 to be incremented */
00265   count = 1u;
00266
00267   /* -------------------
00268    * Stage2 process
00269    * ------------------*/
00270
00271   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00272    * So, to loop unroll over blockSize2,
00273    * srcBLen should be greater than or equal to 4 */
00274   if(srcBLen >= 4u)
00275   {
00276     /* Loop unroll over blockSize2, by 4 */
00277     blkCnt = blockSize2 >> 2u;
00278
00279     while(blkCnt > 0u)
00280     {
00281       /* Set all accumulators to zero */
00282       acc0 = 0.0f;
00283       acc1 = 0.0f;
00284       acc2 = 0.0f;
00285       acc3 = 0.0f;
00286
00287       /* read x[0], x[1], x[2] samples */
00288       x0 = *(px++);
00289       x1 = *(px++);
00290       x2 = *(px++);
00291
00292       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00293       k = srcBLen >> 2u;
00294
00295       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00296        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00297       do
00298       {
00299         /* Read y[srcBLen - 1] sample */
00300         c0 = *(py--);
00301
00302         /* Read x[3] sample */
00303         x3 = *(px++);
00304
00305         /* Perform the multiply-accumulate */
00306         /* acc0 +=  x[0] * y[srcBLen - 1] */
00307         acc0 += x0 * c0;
00308
00309         /* acc1 +=  x[1] * y[srcBLen - 1] */
00310         acc1 += x1 * c0;
00311
00312         /* acc2 +=  x[2] * y[srcBLen - 1] */
00313         acc2 += x2 * c0;
00314
00315         /* acc3 +=  x[3] * y[srcBLen - 1] */
00316         acc3 += x3 * c0;
00317
00318         /* Read y[srcBLen - 2] sample */
00319         c0 = *(py--);
00320
00321         /* Read x[4] sample */
00322         x0 = *(px++);
00323
00324         /* Perform the multiply-accumulate */
00325         /* acc0 +=  x[1] * y[srcBLen - 2] */
00326         acc0 += x1 * c0;
00327         /* acc1 +=  x[2] * y[srcBLen - 2] */
00328         acc1 += x2 * c0;
00329         /* acc2 +=  x[3] * y[srcBLen - 2] */
00330         acc2 += x3 * c0;
00331         /* acc3 +=  x[4] * y[srcBLen - 2] */
00332         acc3 += x0 * c0;
00333
00334         /* Read y[srcBLen - 3] sample */
00335         c0 = *(py--);
00336
00337         /* Read x[5] sample */
00338         x1 = *(px++);
00339
00340         /* Perform the multiply-accumulates */
00341         /* acc0 +=  x[2] * y[srcBLen - 3] */
00342         acc0 += x2 * c0;
00343         /* acc1 +=  x[3] * y[srcBLen - 2] */
00344         acc1 += x3 * c0;
00345         /* acc2 +=  x[4] * y[srcBLen - 2] */
00346         acc2 += x0 * c0;
00347         /* acc3 +=  x[5] * y[srcBLen - 2] */
00348         acc3 += x1 * c0;
00349
00350         /* Read y[srcBLen - 4] sample */
00351         c0 = *(py--);
00352
00353         /* Read x[6] sample */
00354         x2 = *(px++);
00355
00356         /* Perform the multiply-accumulates */
00357         /* acc0 +=  x[3] * y[srcBLen - 4] */
00358         acc0 += x3 * c0;
00359         /* acc1 +=  x[4] * y[srcBLen - 4] */
00360         acc1 += x0 * c0;
00361         /* acc2 +=  x[5] * y[srcBLen - 4] */
00362         acc2 += x1 * c0;
00363         /* acc3 +=  x[6] * y[srcBLen - 4] */
00364         acc3 += x2 * c0;
00365
00366
00367       } while(--k);
00368
00369       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00370        ** No loop unrolling is used. */
00371       k = srcBLen % 0x4u;
00372
00373       while(k > 0u)
00374       {
00375         /* Read y[srcBLen - 5] sample */
00376         c0 = *(py--);
00377
00378         /* Read x[7] sample */
00379         x3 = *(px++);
00380
00381         /* Perform the multiply-accumulates */
00382         /* acc0 +=  x[4] * y[srcBLen - 5] */
00383         acc0 += x0 * c0;
00384         /* acc1 +=  x[5] * y[srcBLen - 5] */
00385         acc1 += x1 * c0;
00386         /* acc2 +=  x[6] * y[srcBLen - 5] */
00387         acc2 += x2 * c0;
00388         /* acc3 +=  x[7] * y[srcBLen - 5] */
00389         acc3 += x3 * c0;
00390
00391         /* Reuse the present samples for the next MAC */
00392         x0 = x1;
00393         x1 = x2;
00394         x2 = x3;
00395
00396         /* Decrement the loop counter */
00397         k--;
00398       }
00399
00400       /* Store the result in the accumulator in the destination buffer. */
00401       *pOut++ = acc0;
00402       *pOut++ = acc1;
00403       *pOut++ = acc2;
00404       *pOut++ = acc3;
00405
00406       /* Update the inputA and inputB pointers for next MAC calculation */
00407       px = pIn1 + (count * 4u);
00408       py = pSrc2;
00409
00410       /* Increment the pointer pIn1 index, count by 1 */
00411       count++;
00412
00413       /* Decrement the loop counter */
00414       blkCnt--;
00415     }
00416
00417     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00418      ** No loop unrolling is used. */
00419     blkCnt = blockSize2 % 0x4u;
00420
00421     while(blkCnt > 0u)
00422     {
00423       /* Accumulator is made zero for every iteration */
00424       sum = 0.0f;
00425
00426       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00427       k = srcBLen >> 2u;
00428
00429       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00430        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00431       while(k > 0u)
00432       {
00433         /* Perform the multiply-accumulates */
00434         sum += *px++ * *py--;
00435         sum += *px++ * *py--;
00436         sum += *px++ * *py--;
00437         sum += *px++ * *py--;
00438
00439         /* Decrement the loop counter */
00440         k--;
00441       }
00442
00443       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00444        ** No loop unrolling is used. */
00445       k = srcBLen % 0x4u;
00446
00447       while(k > 0u)
00448       {
00449         /* Perform the multiply-accumulate */
00450         sum += *px++ * *py--;
00451
00452         /* Decrement the loop counter */
00453         k--;
00454       }
00455
00456       /* Store the result in the accumulator in the destination buffer. */
00457       *pOut++ = sum;
00458
00459       /* Update the inputA and inputB pointers for next MAC calculation */
00460       px = pIn1 + count;
00461       py = pSrc2;
00462
00463       /* Increment the MAC count */
00464       count++;
00465
00466       /* Decrement the loop counter */
00467       blkCnt--;
00468     }
00469   }
00470   else
00471   {
00472     /* If the srcBLen is not a multiple of 4,
00473      * the blockSize2 loop cannot be unrolled by 4 */
00474     blkCnt = blockSize2;
00475
00476     while(blkCnt > 0u)
00477     {
00478       /* Accumulator is made zero for every iteration */
00479       sum = 0.0f;
00480
00481       /* srcBLen number of MACS should be performed */
00482       k = srcBLen;
00483
00484       while(k > 0u)
00485       {
00486         /* Perform the multiply-accumulate */
00487         sum += *px++ * *py--;
00488
00489         /* Decrement the loop counter */
00490         k--;
00491       }
00492
00493       /* Store the result in the accumulator in the destination buffer. */
00494       *pOut++ = sum;
00495
00496       /* Update the inputA and inputB pointers for next MAC calculation */
00497       px = pIn1 + count;
00498       py = pSrc2;
00499
00500       /* Increment the MAC count */
00501       count++;
00502
00503       /* Decrement the loop counter */
00504       blkCnt--;
00505     }
00506   }
00507
00508
00509   /* --------------------------
00510    * Initializations of stage3
00511    * -------------------------*/
00512
00513   /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00514    * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00515    * ....
00516    * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00517    * sum +=  x[srcALen-1] * y[srcBLen-1]
00518    */
00519
00520   /* In this stage the MAC operations are decreased by 1 for every iteration.
00521      The blockSize3 variable holds the number of MAC operations performed */
00522
00523   /* Working pointer of inputA */
00524   pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00525   px = pSrc1;
00526
00527   /* Working pointer of inputB */
00528   pSrc2 = pIn2 + (srcBLen - 1u);
00529   py = pSrc2;
00530
00531   /* -------------------
00532    * Stage3 process
00533    * ------------------*/
00534
00535   while(blockSize3 > 0u)
00536   {
00537     /* Accumulator is made zero for every iteration */
00538     sum = 0.0f;
00539
00540     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00541     k = blockSize3 >> 2u;
00542
00543     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00544      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00545     while(k > 0u)
00546     {
00547       /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
00548       sum += *px++ * *py--;
00549
00550       /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
00551       sum += *px++ * *py--;
00552
00553       /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
00554       sum += *px++ * *py--;
00555
00556       /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
00557       sum += *px++ * *py--;
00558
00559       /* Decrement the loop counter */
00560       k--;
00561     }
00562
00563     /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
00564      ** No loop unrolling is used. */
00565     k = blockSize3 % 0x4u;
00566
00567     while(k > 0u)
00568     {
00569       /* Perform the multiply-accumulates */
00570       /* sum +=  x[srcALen-1] * y[srcBLen-1] */
00571       sum += *px++ * *py--;
00572
00573       /* Decrement the loop counter */
00574       k--;
00575     }
00576
00577     /* Store the result in the accumulator in the destination buffer. */
00578     *pOut++ = sum;
00579
00580     /* Update the inputA and inputB pointers for next MAC calculation */
00581     px = ++pSrc1;
00582     py = pSrc2;
00583
00584     /* Decrement the loop counter */
00585     blockSize3--;
00586   }
00587
00588 #else
00589
00590   /* Run the below code for Cortex-M0 */
00591
00592   float32_t *pIn1 = pSrcA;                       /* inputA pointer */
00593   float32_t *pIn2 = pSrcB;                       /* inputB pointer */
00594   float32_t sum;                                 /* Accumulator */
00595   uint32_t i, j;                                 /* loop counters */
00596
00597   /* Loop to calculate convolution for output length number of times */
00598   for (i = 0u; i < ((srcALen + srcBLen) - 1u); i++)
00599   {
00600     /* Initialize sum with zero to carry out MAC operations */
00601     sum = 0.0f;
00602
00603     /* Loop to perform MAC operations according to convolution equation */
00604     for (j = 0u; j <= i; j++)
00605     {
00606       /* Check the array limitations */
00607       if((((i - j) < srcBLen) && (j < srcALen)))
00608       {
00609         /* z[i] += x[i-j] * y[j] */
00610         sum += pIn1[j] * pIn2[i - j];
00611       }
00612     }
00613     /* Store the output in the destination buffer */
00614     pDst[i] = sum;
00615   }
00616
00617 #endif /*   #ifndef ARM_MATH_CM0        */
00618
00619 }
00620
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_conv_fast_q15.c
00009 *
00010 * Description:  Fast Q15 Convolution.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00066 void arm_conv_fast_q15(
00067   q15_t * pSrcA,
00068   uint32_t srcALen,
00069   q15_t * pSrcB,
00070   uint32_t srcBLen,
00071   q15_t * pDst)
00072 {
00073   q15_t *pIn1;                                   /* inputA pointer */
00074   q15_t *pIn2;                                   /* inputB pointer */
00075   q15_t *pOut = pDst;                            /* output pointer */
00076   q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
00077   q15_t *px;                                     /* Intermediate inputA pointer  */
00078   q15_t *py;                                     /* Intermediate inputB pointer  */
00079   q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
00080   q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
00081   uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt;     /* loop counter */
00082   q31_t *pb;                                     /* 32 bit pointer for inputB buffer */
00083
00084
00085   /* The algorithm implementation is based on the lengths of the inputs. */
00086   /* srcB is always made to slide across srcA. */
00087   /* So srcBLen is always considered as shorter or equal to srcALen */
00088   if(srcALen >= srcBLen)
00089   {
00090     /* Initialization of inputA pointer */
00091     pIn1 = pSrcA;
00092
00093     /* Initialization of inputB pointer */
00094     pIn2 = pSrcB;
00095   }
00096   else
00097   {
00098     /* Initialization of inputA pointer */
00099     pIn1 = pSrcB;
00100
00101     /* Initialization of inputB pointer */
00102     pIn2 = pSrcA;
00103
00104     /* srcBLen is always considered as shorter or equal to srcALen */
00105     j = srcBLen;
00106     srcBLen = srcALen;
00107     srcALen = j;
00108   }
00109
00110   /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00111   /* The function is internally
00112    * divided into three stages according to the number of multiplications that has to be
00113    * taken place between inputA samples and inputB samples. In the first stage of the
00114    * algorithm, the multiplications increase by one for every iteration.
00115    * In the second stage of the algorithm, srcBLen number of multiplications are done.
00116    * In the third stage of the algorithm, the multiplications decrease by one
00117    * for every iteration. */
00118
00119   /* The algorithm is implemented in three stages.
00120      The loop counters of each stage is initiated here. */
00121   blockSize1 = srcBLen - 1u;
00122   blockSize2 = srcALen - (srcBLen - 1u);
00123   blockSize3 = blockSize1;
00124
00125   /* --------------------------
00126    * Initializations of stage1
00127    * -------------------------*/
00128
00129   /* sum = x[0] * y[0]
00130    * sum = x[0] * y[1] + x[1] * y[0]
00131    * ....
00132    * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00133    */
00134
00135   /* In this stage the MAC operations are increased by 1 for every iteration.
00136      The count variable holds the number of MAC operations performed */
00137   count = 1u;
00138
00139   /* Working pointer of inputA */
00140   px = pIn1;
00141
00142   /* Working pointer of inputB */
00143   py = pIn2;
00144
00145
00146   /* ------------------------
00147    * Stage1 process
00148    * ----------------------*/
00149
00150   /* For loop unrolling by 4, this stage is divided into two. */
00151   /* First part of this stage computes the MAC operations less than 4 */
00152   /* Second part of this stage computes the MAC operations greater than or equal to 4 */
00153
00154   /* The first part of the stage starts here */
00155   while((count < 4u) && (blockSize1 > 0u))
00156   {
00157     /* Accumulator is made zero for every iteration */
00158     sum = 0;
00159
00160     /* Loop over number of MAC operations between
00161      * inputA samples and inputB samples */
00162     k = count;
00163
00164     while(k > 0u)
00165     {
00166       /* Perform the multiply-accumulates */
00167       sum = __SMLAD(*px++, *py--, sum);
00168
00169       /* Decrement the loop counter */
00170       k--;
00171     }
00172
00173     /* Store the result in the accumulator in the destination buffer. */
00174     *pOut++ = (q15_t) (sum >> 15);
00175
00176     /* Update the inputA and inputB pointers for next MAC calculation */
00177     py = pIn2 + count;
00178     px = pIn1;
00179
00180     /* Increment the MAC count */
00181     count++;
00182
00183     /* Decrement the loop counter */
00184     blockSize1--;
00185   }
00186
00187   /* The second part of the stage starts here */
00188   /* The internal loop, over count, is unrolled by 4 */
00189   /* To, read the last two inputB samples using SIMD:
00190    * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
00191   py = py - 1;
00192
00193   while(blockSize1 > 0u)
00194   {
00195     /* Accumulator is made zero for every iteration */
00196     sum = 0;
00197
00198     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00199     k = count >> 2u;
00200
00201     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00202      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00203     while(k > 0u)
00204     {
00205       /* Perform the multiply-accumulates */
00206       /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
00207       sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00208       /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
00209       sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00210
00211       /* Decrement the loop counter */
00212       k--;
00213     }
00214
00215     /* For the next MAC operations, the pointer py is used without SIMD
00216      * So, py is incremented by 1 */
00217     py = py + 1u;
00218
00219     /* If the count is not a multiple of 4, compute any remaining MACs here.
00220      ** No loop unrolling is used. */
00221     k = count % 0x4u;
00222
00223     while(k > 0u)
00224     {
00225       /* Perform the multiply-accumulates */
00226       sum = __SMLAD(*px++, *py--, sum);
00227
00228       /* Decrement the loop counter */
00229       k--;
00230     }
00231
00232     /* Store the result in the accumulator in the destination buffer. */
00233     *pOut++ = (q15_t) (sum >> 15);
00234
00235     /* Update the inputA and inputB pointers for next MAC calculation */
00236     py = pIn2 + (count - 1u);
00237     px = pIn1;
00238
00239     /* Increment the MAC count */
00240     count++;
00241
00242     /* Decrement the loop counter */
00243     blockSize1--;
00244   }
00245
00246   /* --------------------------
00247    * Initializations of stage2
00248    * ------------------------*/
00249
00250   /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00251    * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00252    * ....
00253    * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00254    */
00255
00256   /* Working pointer of inputA */
00257   px = pIn1;
00258
00259   /* Working pointer of inputB */
00260   pSrc2 = pIn2 + (srcBLen - 1u);
00261   py = pSrc2;
00262
00263   /* Initialize inputB pointer of type q31 */
00264   pb = (q31_t *) (py - 1u);
00265
00266   /* count is the index by which the pointer pIn1 to be incremented */
00267   count = 1u;
00268
00269
00270   /* --------------------
00271    * Stage2 process
00272    * -------------------*/
00273
00274   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00275    * So, to loop unroll over blockSize2,
00276    * srcBLen should be greater than or equal to 4 */
00277   if(srcBLen >= 4u)
00278   {
00279     /* Loop unroll over blockSize2, by 4 */
00280     blkCnt = blockSize2 >> 2u;
00281
00282     while(blkCnt > 0u)
00283     {
00284       /* Set all accumulators to zero */
00285       acc0 = 0;
00286       acc1 = 0;
00287       acc2 = 0;
00288       acc3 = 0;
00289
00290
00291       /* read x[0], x[1] samples */
00292       x0 = *(q31_t *) (px++);
00293       /* read x[1], x[2] samples */
00294       x1 = *(q31_t *) (px++);
00295
00296
00297       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00298       k = srcBLen >> 2u;
00299
00300       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00301        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00302       do
00303       {
00304         /* Read the last two inputB samples using SIMD:
00305          * y[srcBLen - 1] and y[srcBLen - 2] */
00306         c0 = *(pb--);
00307
00308         /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
00309         acc0 = __SMLADX(x0, c0, acc0);
00310
00311         /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
00312         acc1 = __SMLADX(x1, c0, acc1);
00313
00314         /* Read x[2], x[3] */
00315         x2 = *(q31_t *) (px++);
00316
00317         /* Read x[3], x[4] */
00318         x3 = *(q31_t *) (px++);
00319
00320         /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
00321         acc2 = __SMLADX(x2, c0, acc2);
00322
00323         /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
00324         acc3 = __SMLADX(x3, c0, acc3);
00325
00326         /* Read y[srcBLen - 3] and y[srcBLen - 4] */
00327         c0 = *(pb--);
00328
00329         /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
00330         acc0 = __SMLADX(x2, c0, acc0);
00331
00332         /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
00333         acc1 = __SMLADX(x3, c0, acc1);
00334
00335         /* Read x[4], x[5] */
00336         x0 = *(q31_t *) (px++);
00337
00338         /* Read x[5], x[6] */
00339         x1 = *(q31_t *) (px++);
00340
00341         /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
00342         acc2 = __SMLADX(x0, c0, acc2);
00343
00344         /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
00345         acc3 = __SMLADX(x1, c0, acc3);
00346
00347       } while(--k);
00348
00349       /* For the next MAC operations, SIMD is not used
00350        * So, the 16 bit pointer if inputB, py is updated */
00351       py = (q15_t *) pb;
00352       py = py + 1;
00353
00354       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00355        ** No loop unrolling is used. */
00356       k = srcBLen % 0x4u;
00357
00358       if(k == 1u)
00359       {
00360         /* Read y[srcBLen - 5] */
00361         c0 = *(py);
00362 #ifdef  ARM_MATH_BIG_ENDIAN
00363
00364 //          c0 = unallign_rev(p, c0);
00365         c0 = c0 << 16;
00366 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00367
00368         /* Read x[7] */
00369         x3 = *(q31_t *) px++;
00370
00371         /* Perform the multiply-accumulates */
00372         acc0 = __SMLAD(x0, c0, acc0);
00373         acc1 = __SMLAD(x1, c0, acc1);
00374         acc2 = __SMLADX(x1, c0, acc2);
00375         acc3 = __SMLADX(x3, c0, acc3);
00376       }
00377
00378       if(k == 2u)
00379       {
00380         /* Read y[srcBLen - 5], y[srcBLen - 6] */
00381         c0 = *(pb);
00382
00383         /* Read x[7], x[8] */
00384         x3 = *(q31_t *) px++;
00385
00386         /* Read x[9] */
00387         x2 = *(q31_t *) px++;
00388
00389         /* Perform the multiply-accumulates */
00390         acc0 = __SMLADX(x0, c0, acc0);
00391         acc1 = __SMLADX(x1, c0, acc1);
00392         acc2 = __SMLADX(x3, c0, acc2);
00393         acc3 = __SMLADX(x2, c0, acc3);
00394       }
00395
00396       if(k == 3u)
00397       {
00398         /* Read y[srcBLen - 5], y[srcBLen - 6] */
00399         c0 = *pb--;
00400
00401         /* Read x[7], x[8] */
00402         x3 = *(q31_t *) px++;
00403
00404         /* Read x[9] */
00405         x2 = *(q31_t *) px++;
00406
00407         /* Perform the multiply-accumulates */
00408         acc0 = __SMLADX(x0, c0, acc0);
00409         acc1 = __SMLADX(x1, c0, acc1);
00410         acc2 = __SMLADX(x3, c0, acc2);
00411         acc3 = __SMLADX(x2, c0, acc3);
00412
00413         /* Read y[srcBLen - 7] */
00414 #ifdef  ARM_MATH_BIG_ENDIAN
00415
00416         c0 = (*pb);
00417 //              c0 = (c0 & 0x0000FFFF)<<16;
00418         c0 = (c0) << 16;
00419
00420 #else
00421
00422         c0 = (q15_t) (*pb >> 16);
00423
00424 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00425
00426         /* Read x[10] */
00427         x3 = *(q31_t *) px++;
00428
00429         /* Perform the multiply-accumulates */
00430         acc0 = __SMLADX(x1, c0, acc0);
00431         acc1 = __SMLAD(x2, c0, acc1);
00432         acc2 = __SMLADX(x2, c0, acc2);
00433         acc3 = __SMLADX(x3, c0, acc3);
00434       }
00435
00436       /* Store the results in the accumulators in the destination buffer. */
00437 #ifndef ARM_MATH_BIG_ENDIAN
00438
00439       *__SIMD32(pOut)++ = __PKHBT((acc0 >> 15), (acc1 >> 15), 16);
00440       *__SIMD32(pOut)++ = __PKHBT((acc2 >> 15), (acc3 >> 15), 16);
00441
00442 #else
00443
00444       *__SIMD32(pOut)++ = __PKHBT((acc1 >> 15), (acc0 >> 15), 16);
00445       *__SIMD32(pOut)++ = __PKHBT((acc3 >> 15), (acc2 >> 15), 16);
00446
00447 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00448       /* Update the inputA and inputB pointers for next MAC calculation */
00449       px = pIn1 + (count * 4u);
00450       py = pSrc2;
00451       pb = (q31_t *) (py - 1);
00452
00453       /* Increment the pointer pIn1 index, count by 1 */
00454       count++;
00455
00456       /* Decrement the loop counter */
00457       blkCnt--;
00458     }
00459
00460     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00461      ** No loop unrolling is used. */
00462     blkCnt = blockSize2 % 0x4u;
00463
00464     while(blkCnt > 0u)
00465     {
00466       /* Accumulator is made zero for every iteration */
00467       sum = 0;
00468
00469       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00470       k = srcBLen >> 2u;
00471
00472       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00473        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00474       while(k > 0u)
00475       {
00476         /* Perform the multiply-accumulates */
00477         sum += ((q31_t) * px++ * *py--);
00478         sum += ((q31_t) * px++ * *py--);
00479         sum += ((q31_t) * px++ * *py--);
00480         sum += ((q31_t) * px++ * *py--);
00481
00482         /* Decrement the loop counter */
00483         k--;
00484       }
00485
00486       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00487        ** No loop unrolling is used. */
00488       k = srcBLen % 0x4u;
00489
00490       while(k > 0u)
00491       {
00492         /* Perform the multiply-accumulates */
00493         sum += ((q31_t) * px++ * *py--);
00494
00495         /* Decrement the loop counter */
00496         k--;
00497       }
00498
00499       /* Store the result in the accumulator in the destination buffer. */
00500       *pOut++ = (q15_t) (sum >> 15);
00501
00502       /* Update the inputA and inputB pointers for next MAC calculation */
00503       px = pIn1 + count;
00504       py = pSrc2;
00505
00506       /* Increment the pointer pIn1 index, count by 1 */
00507       count++;
00508
00509       /* Decrement the loop counter */
00510       blkCnt--;
00511     }
00512   }
00513   else
00514   {
00515     /* If the srcBLen is not a multiple of 4,
00516      * the blockSize2 loop cannot be unrolled by 4 */
00517     blkCnt = blockSize2;
00518
00519     while(blkCnt > 0u)
00520     {
00521       /* Accumulator is made zero for every iteration */
00522       sum = 0;
00523
00524       /* srcBLen number of MACS should be performed */
00525       k = srcBLen;
00526
00527       while(k > 0u)
00528       {
00529         /* Perform the multiply-accumulate */
00530         sum += ((q31_t) * px++ * *py--);
00531
00532         /* Decrement the loop counter */
00533         k--;
00534       }
00535
00536       /* Store the result in the accumulator in the destination buffer. */
00537       *pOut++ = (q15_t) (sum >> 15);
00538
00539       /* Update the inputA and inputB pointers for next MAC calculation */
00540       px = pIn1 + count;
00541       py = pSrc2;
00542
00543       /* Increment the MAC count */
00544       count++;
00545
00546       /* Decrement the loop counter */
00547       blkCnt--;
00548     }
00549   }
00550
00551
00552   /* --------------------------
00553    * Initializations of stage3
00554    * -------------------------*/
00555
00556   /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00557    * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00558    * ....
00559    * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00560    * sum +=  x[srcALen-1] * y[srcBLen-1]
00561    */
00562
00563   /* In this stage the MAC operations are decreased by 1 for every iteration.
00564      The blockSize3 variable holds the number of MAC operations performed */
00565
00566   /* Working pointer of inputA */
00567   pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00568   px = pSrc1;
00569
00570   /* Working pointer of inputB */
00571   pSrc2 = pIn2 + (srcBLen - 1u);
00572   pIn2 = pSrc2 - 1u;
00573   py = pIn2;
00574
00575   /* -------------------
00576    * Stage3 process
00577    * ------------------*/
00578
00579   /* For loop unrolling by 4, this stage is divided into two. */
00580   /* First part of this stage computes the MAC operations greater than 4 */
00581   /* Second part of this stage computes the MAC operations less than or equal to 4 */
00582
00583   /* The first part of the stage starts here */
00584   j = blockSize3 >> 2u;
00585
00586   while((j > 0u) && (blockSize3 > 0u))
00587   {
00588     /* Accumulator is made zero for every iteration */
00589     sum = 0;
00590
00591     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00592     k = blockSize3 >> 2u;
00593
00594     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00595      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00596     while(k > 0u)
00597     {
00598       /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
00599        * with y[srcBLen - 1], y[srcBLen - 2] respectively */
00600       sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00601       /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
00602        * with y[srcBLen - 3], y[srcBLen - 4] respectively */
00603       sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00604
00605       /* Decrement the loop counter */
00606       k--;
00607     }
00608
00609     /* For the next MAC operations, the pointer py is used without SIMD
00610      * So, py is incremented by 1 */
00611     py = py + 1u;
00612
00613     /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
00614      ** No loop unrolling is used. */
00615     k = blockSize3 % 0x4u;
00616
00617     while(k > 0u)
00618     {
00619       /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
00620       sum = __SMLAD(*px++, *py--, sum);
00621
00622       /* Decrement the loop counter */
00623       k--;
00624     }
00625
00626     /* Store the result in the accumulator in the destination buffer. */
00627     *pOut++ = (q15_t) (sum >> 15);
00628
00629     /* Update the inputA and inputB pointers for next MAC calculation */
00630     px = ++pSrc1;
00631     py = pIn2;
00632
00633     /* Decrement the loop counter */
00634     blockSize3--;
00635
00636     j--;
00637   }
00638
00639   /* The second part of the stage starts here */
00640   /* SIMD is not used for the next MAC operations,
00641    * so pointer py is updated to read only one sample at a time */
00642   py = py + 1u;
00643
00644   while(blockSize3 > 0u)
00645   {
00646     /* Accumulator is made zero for every iteration */
00647     sum = 0;
00648
00649     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00650     k = blockSize3;
00651
00652     while(k > 0u)
00653     {
00654       /* Perform the multiply-accumulates */
00655       /* sum +=  x[srcALen-1] * y[srcBLen-1] */
00656       sum = __SMLAD(*px++, *py--, sum);
00657
00658       /* Decrement the loop counter */
00659       k--;
00660     }
00661
00662     /* Store the result in the accumulator in the destination buffer. */
00663     *pOut++ = (q15_t) (sum >> 15);
00664
00665     /* Update the inputA and inputB pointers for next MAC calculation */
00666     px = ++pSrc1;
00667     py = pSrc2;
00668
00669     /* Decrement the loop counter */
00670     blockSize3--;
00671   }
00672
00673 }
00674
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c
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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_conv_fast_q31.c
00009 *
00010 * Description:  Q31 Convolution (fast version).
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00068 void arm_conv_fast_q31(
00069   q31_t * pSrcA,
00070   uint32_t srcALen,
00071   q31_t * pSrcB,
00072   uint32_t srcBLen,
00073   q31_t * pDst)
00074 {
00075   q31_t *pIn1;                                   /* inputA pointer */
00076   q31_t *pIn2;                                   /* inputB pointer */
00077   q31_t *pOut = pDst;                            /* output pointer */
00078   q31_t *px;                                     /* Intermediate inputA pointer  */
00079   q31_t *py;                                     /* Intermediate inputB pointer  */
00080   q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
00081   q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
00082   q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
00083   uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counter */
00084
00085
00086   /* The algorithm implementation is based on the lengths of the inputs. */
00087   /* srcB is always made to slide across srcA. */
00088   /* So srcBLen is always considered as shorter or equal to srcALen */
00089   if(srcALen >= srcBLen)
00090   {
00091     /* Initialization of inputA pointer */
00092     pIn1 = pSrcA;
00093
00094     /* Initialization of inputB pointer */
00095     pIn2 = pSrcB;
00096   }
00097   else
00098   {
00099     /* Initialization of inputA pointer */
00100     pIn1 = pSrcB;
00101
00102     /* Initialization of inputB pointer */
00103     pIn2 = pSrcA;
00104
00105     /* srcBLen is always considered as shorter or equal to srcALen */
00106     j = srcBLen;
00107     srcBLen = srcALen;
00108     srcALen = j;
00109   }
00110
00111   /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00112   /* The function is internally
00113    * divided into three stages according to the number of multiplications that has to be
00114    * taken place between inputA samples and inputB samples. In the first stage of the
00115    * algorithm, the multiplications increase by one for every iteration.
00116    * In the second stage of the algorithm, srcBLen number of multiplications are done.
00117    * In the third stage of the algorithm, the multiplications decrease by one
00118    * for every iteration. */
00119
00120   /* The algorithm is implemented in three stages.
00121      The loop counters of each stage is initiated here. */
00122   blockSize1 = srcBLen - 1u;
00123   blockSize2 = srcALen - (srcBLen - 1u);
00124   blockSize3 = blockSize1;
00125
00126   /* --------------------------
00127    * Initializations of stage1
00128    * -------------------------*/
00129
00130   /* sum = x[0] * y[0]
00131    * sum = x[0] * y[1] + x[1] * y[0]
00132    * ....
00133    * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00134    */
00135
00136   /* In this stage the MAC operations are increased by 1 for every iteration.
00137      The count variable holds the number of MAC operations performed */
00138   count = 1u;
00139
00140   /* Working pointer of inputA */
00141   px = pIn1;
00142
00143   /* Working pointer of inputB */
00144   py = pIn2;
00145
00146
00147   /* ------------------------
00148    * Stage1 process
00149    * ----------------------*/
00150
00151   /* The first stage starts here */
00152   while(blockSize1 > 0u)
00153   {
00154     /* Accumulator is made zero for every iteration */
00155     sum = 0;
00156
00157     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00158     k = count >> 2u;
00159
00160     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00161      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00162     while(k > 0u)
00163     {
00164       /* x[0] * y[srcBLen - 1] */
00165       sum = (q31_t) ((((q63_t) sum << 32) +
00166                       ((q63_t) * px++ * (*py--))) >> 32);
00167
00168       /* x[1] * y[srcBLen - 2] */
00169       sum = (q31_t) ((((q63_t) sum << 32) +
00170                       ((q63_t) * px++ * (*py--))) >> 32);
00171
00172       /* x[2] * y[srcBLen - 3] */
00173       sum = (q31_t) ((((q63_t) sum << 32) +
00174                       ((q63_t) * px++ * (*py--))) >> 32);
00175
00176       /* x[3] * y[srcBLen - 4] */
00177       sum = (q31_t) ((((q63_t) sum << 32) +
00178                       ((q63_t) * px++ * (*py--))) >> 32);
00179
00180       /* Decrement the loop counter */
00181       k--;
00182     }
00183
00184     /* If the count is not a multiple of 4, compute any remaining MACs here.
00185      ** No loop unrolling is used. */
00186     k = count % 0x4u;
00187
00188     while(k > 0u)
00189     {
00190       /* Perform the multiply-accumulate */
00191       sum = (q31_t) ((((q63_t) sum << 32) +
00192                       ((q63_t) * px++ * (*py--))) >> 32);
00193
00194       /* Decrement the loop counter */
00195       k--;
00196     }
00197
00198     /* Store the result in the accumulator in the destination buffer. */
00199     *pOut++ = sum << 1;
00200
00201     /* Update the inputA and inputB pointers for next MAC calculation */
00202     py = pIn2 + count;
00203     px = pIn1;
00204
00205     /* Increment the MAC count */
00206     count++;
00207
00208     /* Decrement the loop counter */
00209     blockSize1--;
00210   }
00211
00212   /* --------------------------
00213    * Initializations of stage2
00214    * ------------------------*/
00215
00216   /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00217    * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00218    * ....
00219    * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00220    */
00221
00222   /* Working pointer of inputA */
00223   px = pIn1;
00224
00225   /* Working pointer of inputB */
00226   pSrc2 = pIn2 + (srcBLen - 1u);
00227   py = pSrc2;
00228
00229   /* count is index by which the pointer pIn1 to be incremented */
00230   count = 1u;
00231
00232   /* -------------------
00233    * Stage2 process
00234    * ------------------*/
00235
00236   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00237    * So, to loop unroll over blockSize2,
00238    * srcBLen should be greater than or equal to 4 */
00239   if(srcBLen >= 4u)
00240   {
00241     /* Loop unroll over blockSize2, by 4 */
00242     blkCnt = blockSize2 >> 2u;
00243
00244     while(blkCnt > 0u)
00245     {
00246       /* Set all accumulators to zero */
00247       acc0 = 0;
00248       acc1 = 0;
00249       acc2 = 0;
00250       acc3 = 0;
00251
00252       /* read x[0], x[1], x[2] samples */
00253       x0 = *(px++);
00254       x1 = *(px++);
00255       x2 = *(px++);
00256
00257       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00258       k = srcBLen >> 2u;
00259
00260       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00261        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00262       do
00263       {
00264         /* Read y[srcBLen - 1] sample */
00265         c0 = *(py--);
00266
00267         /* Read x[3] sample */
00268         x3 = *(px++);
00269
00270         /* Perform the multiply-accumulates */
00271         /* acc0 +=  x[0] * y[srcBLen - 1] */
00272         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
00273
00274         /* acc1 +=  x[1] * y[srcBLen - 1] */
00275         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
00276
00277         /* acc2 +=  x[2] * y[srcBLen - 1] */
00278         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
00279
00280         /* acc3 +=  x[3] * y[srcBLen - 1] */
00281         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
00282
00283         /* Read y[srcBLen - 2] sample */
00284         c0 = *(py--);
00285
00286         /* Read x[4] sample */
00287         x0 = *(px++);
00288
00289         /* Perform the multiply-accumulate */
00290         /* acc0 +=  x[1] * y[srcBLen - 2] */
00291         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
00292         /* acc1 +=  x[2] * y[srcBLen - 2] */
00293         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32);
00294         /* acc2 +=  x[3] * y[srcBLen - 2] */
00295         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32);
00296         /* acc3 +=  x[4] * y[srcBLen - 2] */
00297         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
00298
00299         /* Read y[srcBLen - 3] sample */
00300         c0 = *(py--);
00301
00302         /* Read x[5] sample */
00303         x1 = *(px++);
00304
00305         /* Perform the multiply-accumulates */
00306         /* acc0 +=  x[2] * y[srcBLen - 3] */
00307         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32);
00308         /* acc1 +=  x[3] * y[srcBLen - 2] */
00309         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32);
00310         /* acc2 +=  x[4] * y[srcBLen - 2] */
00311         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32);
00312         /* acc3 +=  x[5] * y[srcBLen - 2] */
00313         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
00314
00315         /* Read y[srcBLen - 4] sample */
00316         c0 = *(py--);
00317
00318         /* Read x[6] sample */
00319         x2 = *(px++);
00320
00321         /* Perform the multiply-accumulates */
00322         /* acc0 +=  x[3] * y[srcBLen - 4] */
00323         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32);
00324         /* acc1 +=  x[4] * y[srcBLen - 4] */
00325         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32);
00326         /* acc2 +=  x[5] * y[srcBLen - 4] */
00327         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32);
00328         /* acc3 +=  x[6] * y[srcBLen - 4] */
00329         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
00330
00331
00332       } while(--k);
00333
00334       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00335        ** No loop unrolling is used. */
00336       k = srcBLen % 0x4u;
00337
00338       while(k > 0u)
00339       {
00340         /* Read y[srcBLen - 5] sample */
00341         c0 = *(py--);
00342
00343         /* Read x[7] sample */
00344         x3 = *(px++);
00345
00346         /* Perform the multiply-accumulates */
00347         /* acc0 +=  x[4] * y[srcBLen - 5] */
00348         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
00349         /* acc1 +=  x[5] * y[srcBLen - 5] */
00350         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
00351         /* acc2 +=  x[6] * y[srcBLen - 5] */
00352         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
00353         /* acc3 +=  x[7] * y[srcBLen - 5] */
00354         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
00355
00356         /* Reuse the present samples for the next MAC */
00357         x0 = x1;
00358         x1 = x2;
00359         x2 = x3;
00360
00361         /* Decrement the loop counter */
00362         k--;
00363       }
00364
00365       /* Store the results in the accumulators in the destination buffer. */
00366       *pOut++ = (q31_t) (acc0 << 1);
00367       *pOut++ = (q31_t) (acc1 << 1);
00368       *pOut++ = (q31_t) (acc2 << 1);
00369       *pOut++ = (q31_t) (acc3 << 1);
00370
00371       /* Update the inputA and inputB pointers for next MAC calculation */
00372       px = pIn1 + (count * 4u);
00373       py = pSrc2;
00374
00375       /* Increment the pointer pIn1 index, count by 1 */
00376       count++;
00377
00378       /* Decrement the loop counter */
00379       blkCnt--;
00380     }
00381
00382     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00383      ** No loop unrolling is used. */
00384     blkCnt = blockSize2 % 0x4u;
00385
00386     while(blkCnt > 0u)
00387     {
00388       /* Accumulator is made zero for every iteration */
00389       sum = 0;
00390
00391       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00392       k = srcBLen >> 2u;
00393
00394       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00395        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00396       while(k > 0u)
00397       {
00398         /* Perform the multiply-accumulates */
00399         sum = (q31_t) ((((q63_t) sum << 32) +
00400                         ((q63_t) * px++ * (*py--))) >> 32);
00401         sum = (q31_t) ((((q63_t) sum << 32) +
00402                         ((q63_t) * px++ * (*py--))) >> 32);
00403         sum = (q31_t) ((((q63_t) sum << 32) +
00404                         ((q63_t) * px++ * (*py--))) >> 32);
00405         sum = (q31_t) ((((q63_t) sum << 32) +
00406                         ((q63_t) * px++ * (*py--))) >> 32);
00407
00408         /* Decrement the loop counter */
00409         k--;
00410       }
00411
00412       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00413        ** No loop unrolling is used. */
00414       k = srcBLen % 0x4u;
00415
00416       while(k > 0u)
00417       {
00418         /* Perform the multiply-accumulate */
00419         sum = (q31_t) ((((q63_t) sum << 32) +
00420                         ((q63_t) * px++ * (*py--))) >> 32);
00421
00422         /* Decrement the loop counter */
00423         k--;
00424       }
00425
00426       /* Store the result in the accumulator in the destination buffer. */
00427       *pOut++ = sum << 1;
00428
00429       /* Update the inputA and inputB pointers for next MAC calculation */
00430       px = pIn1 + count;
00431       py = pSrc2;
00432
00433       /* Increment the MAC count */
00434       count++;
00435
00436       /* Decrement the loop counter */
00437       blkCnt--;
00438     }
00439   }
00440   else
00441   {
00442     /* If the srcBLen is not a multiple of 4,
00443      * the blockSize2 loop cannot be unrolled by 4 */
00444     blkCnt = blockSize2;
00445
00446     while(blkCnt > 0u)
00447     {
00448       /* Accumulator is made zero for every iteration */
00449       sum = 0;
00450
00451       /* srcBLen number of MACS should be performed */
00452       k = srcBLen;
00453
00454       while(k > 0u)
00455       {
00456         /* Perform the multiply-accumulate */
00457         sum = (q31_t) ((((q63_t) sum << 32) +
00458                         ((q63_t) * px++ * (*py--))) >> 32);
00459
00460         /* Decrement the loop counter */
00461         k--;
00462       }
00463
00464       /* Store the result in the accumulator in the destination buffer. */
00465       *pOut++ = sum << 1;
00466
00467       /* Update the inputA and inputB pointers for next MAC calculation */
00468       px = pIn1 + count;
00469       py = pSrc2;
00470
00471       /* Increment the MAC count */
00472       count++;
00473
00474       /* Decrement the loop counter */
00475       blkCnt--;
00476     }
00477   }
00478
00479
00480   /* --------------------------
00481    * Initializations of stage3
00482    * -------------------------*/
00483
00484   /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00485    * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00486    * ....
00487    * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00488    * sum +=  x[srcALen-1] * y[srcBLen-1]
00489    */
00490
00491   /* In this stage the MAC operations are decreased by 1 for every iteration.
00492      The blockSize3 variable holds the number of MAC operations performed */
00493
00494   /* Working pointer of inputA */
00495   pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00496   px = pSrc1;
00497
00498   /* Working pointer of inputB */
00499   pSrc2 = pIn2 + (srcBLen - 1u);
00500   py = pSrc2;
00501
00502   /* -------------------
00503    * Stage3 process
00504    * ------------------*/
00505
00506   while(blockSize3 > 0u)
00507   {
00508     /* Accumulator is made zero for every iteration */
00509     sum = 0;
00510
00511     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00512     k = blockSize3 >> 2u;
00513
00514     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00515      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00516     while(k > 0u)
00517     {
00518       /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
00519       sum = (q31_t) ((((q63_t) sum << 32) +
00520                       ((q63_t) * px++ * (*py--))) >> 32);
00521
00522       /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
00523       sum = (q31_t) ((((q63_t) sum << 32) +
00524                       ((q63_t) * px++ * (*py--))) >> 32);
00525
00526       /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
00527       sum = (q31_t) ((((q63_t) sum << 32) +
00528                       ((q63_t) * px++ * (*py--))) >> 32);
00529
00530       /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
00531       sum = (q31_t) ((((q63_t) sum << 32) +
00532                       ((q63_t) * px++ * (*py--))) >> 32);
00533
00534       /* Decrement the loop counter */
00535       k--;
00536     }
00537
00538     /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
00539      ** No loop unrolling is used. */
00540     k = blockSize3 % 0x4u;
00541
00542     while(k > 0u)
00543     {
00544       /* Perform the multiply-accumulate */
00545       sum = (q31_t) ((((q63_t) sum << 32) +
00546                       ((q63_t) * px++ * (*py--))) >> 32);
00547
00548       /* Decrement the loop counter */
00549       k--;
00550     }
00551
00552     /* Store the result in the accumulator in the destination buffer. */
00553     *pOut++ = sum << 1;
00554
00555     /* Update the inputA and inputB pointers for next MAC calculation */
00556     px = ++pSrc1;
00557     py = pSrc2;
00558
00559     /* Decrement the loop counter */
00560     blockSize3--;
00561   }
00562
00563 }
00564
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_conv_partial_f32.c
00009 *
00010 * Description:  Partial convolution of floating-point sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00074 arm_status arm_conv_partial_f32(
00075   float32_t * pSrcA,
00076   uint32_t srcALen,
00077   float32_t * pSrcB,
00078   uint32_t srcBLen,
00079   float32_t * pDst,
00080   uint32_t firstIndex,
00081   uint32_t numPoints)
00082 {
00083
00084
00085 #ifndef ARM_MATH_CM0
00086
00087   /* Run the below code for Cortex-M4 and Cortex-M3 */
00088
00089   float32_t *pIn1 = pSrcA;                       /* inputA pointer */
00090   float32_t *pIn2 = pSrcB;                       /* inputB pointer */
00091   float32_t *pOut = pDst;                        /* output pointer */
00092   float32_t *px;                                 /* Intermediate inputA pointer */
00093   float32_t *py;                                 /* Intermediate inputB pointer */
00094   float32_t *pSrc1, *pSrc2;                      /* Intermediate pointers */
00095   float32_t sum, acc0, acc1, acc2, acc3;         /* Accumulator */
00096   float32_t x0, x1, x2, x3, c0;                  /* Temporary variables to hold state and coefficient values */
00097   uint32_t j, k, count = 0u, blkCnt, check;
00098   int32_t blockSize1, blockSize2, blockSize3;    /* loop counters */
00099   arm_status status;                             /* status of Partial convolution */
00100
00101
00102   /* Check for range of output samples to be calculated */
00103   if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
00104   {
00105     /* Set status as ARM_MATH_ARGUMENT_ERROR */
00106     status = ARM_MATH_ARGUMENT_ERROR;
00107   }
00108   else
00109   {
00110
00111     /* The algorithm implementation is based on the lengths of the inputs. */
00112     /* srcB is always made to slide across srcA. */
00113     /* So srcBLen is always considered as shorter or equal to srcALen */
00114     if(srcALen >= srcBLen)
00115     {
00116       /* Initialization of inputA pointer */
00117       pIn1 = pSrcA;
00118
00119       /* Initialization of inputB pointer */
00120       pIn2 = pSrcB;
00121     }
00122     else
00123     {
00124       /* Initialization of inputA pointer */
00125       pIn1 = pSrcB;
00126
00127       /* Initialization of inputB pointer */
00128       pIn2 = pSrcA;
00129
00130       /* srcBLen is always considered as shorter or equal to srcALen */
00131       j = srcBLen;
00132       srcBLen = srcALen;
00133       srcALen = j;
00134     }
00135
00136     /* Conditions to check which loopCounter holds
00137      * the first and last indices of the output samples to be calculated. */
00138     check = firstIndex + numPoints;
00139     blockSize3 = (int32_t) check - (int32_t) srcALen;
00140     blockSize3 = (blockSize3 > 0) ? blockSize3 : 0;
00141     blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
00142     blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
00143                                      (int32_t) numPoints) : 0;
00144     blockSize2 = ((int32_t) check - blockSize3) -
00145       (blockSize1 + (int32_t) firstIndex);
00146     blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
00147
00148     /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00149     /* The function is internally
00150      * divided into three stages according to the number of multiplications that has to be
00151      * taken place between inputA samples and inputB samples. In the first stage of the
00152      * algorithm, the multiplications increase by one for every iteration.
00153      * In the second stage of the algorithm, srcBLen number of multiplications are done.
00154      * In the third stage of the algorithm, the multiplications decrease by one
00155      * for every iteration. */
00156
00157     /* Set the output pointer to point to the firstIndex
00158      * of the output sample to be calculated. */
00159     pOut = pDst + firstIndex;
00160
00161     /* --------------------------
00162      * Initializations of stage1
00163      * -------------------------*/
00164
00165     /* sum = x[0] * y[0]
00166      * sum = x[0] * y[1] + x[1] * y[0]
00167      * ....
00168      * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00169      */
00170
00171     /* In this stage the MAC operations are increased by 1 for every iteration.
00172        The count variable holds the number of MAC operations performed.
00173        Since the partial convolution starts from from firstIndex
00174        Number of Macs to be performed is firstIndex + 1 */
00175     count = 1u + firstIndex;
00176
00177     /* Working pointer of inputA */
00178     px = pIn1;
00179
00180     /* Working pointer of inputB */
00181     pSrc1 = pIn2 + firstIndex;
00182     py = pSrc1;
00183
00184     /* ------------------------
00185      * Stage1 process
00186      * ----------------------*/
00187
00188     /* The first stage starts here */
00189     while(blockSize1 > 0)
00190     {
00191       /* Accumulator is made zero for every iteration */
00192       sum = 0.0f;
00193
00194       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00195       k = count >> 2u;
00196
00197       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00198        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00199       while(k > 0u)
00200       {
00201         /* x[0] * y[srcBLen - 1] */
00202         sum += *px++ * *py--;
00203
00204         /* x[1] * y[srcBLen - 2] */
00205         sum += *px++ * *py--;
00206
00207         /* x[2] * y[srcBLen - 3] */
00208         sum += *px++ * *py--;
00209
00210         /* x[3] * y[srcBLen - 4] */
00211         sum += *px++ * *py--;
00212
00213         /* Decrement the loop counter */
00214         k--;
00215       }
00216
00217       /* If the count is not a multiple of 4, compute any remaining MACs here.
00218        ** No loop unrolling is used. */
00219       k = count % 0x4u;
00220
00221       while(k > 0u)
00222       {
00223         /* Perform the multiply-accumulates */
00224         sum += *px++ * *py--;
00225
00226         /* Decrement the loop counter */
00227         k--;
00228       }
00229
00230       /* Store the result in the accumulator in the destination buffer. */
00231       *pOut++ = sum;
00232
00233       /* Update the inputA and inputB pointers for next MAC calculation */
00234       py = ++pSrc1;
00235       px = pIn1;
00236
00237       /* Increment the MAC count */
00238       count++;
00239
00240       /* Decrement the loop counter */
00241       blockSize1--;
00242     }
00243
00244     /* --------------------------
00245      * Initializations of stage2
00246      * ------------------------*/
00247
00248     /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00249      * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00250      * ....
00251      * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00252      */
00253
00254     /* Working pointer of inputA */
00255     px = pIn1;
00256
00257     /* Working pointer of inputB */
00258     pSrc2 = pIn2 + (srcBLen - 1u);
00259     py = pSrc2;
00260
00261     /* count is index by which the pointer pIn1 to be incremented */
00262     count = 1u;
00263
00264     /* -------------------
00265      * Stage2 process
00266      * ------------------*/
00267
00268     /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00269      * So, to loop unroll over blockSize2,
00270      * srcBLen should be greater than or equal to 4 */
00271     if(srcBLen >= 4u)
00272     {
00273       /* Loop unroll over blockSize2, by 4 */
00274       blkCnt = ((uint32_t) blockSize2 >> 2u);
00275
00276       while(blkCnt > 0u)
00277       {
00278         /* Set all accumulators to zero */
00279         acc0 = 0.0f;
00280         acc1 = 0.0f;
00281         acc2 = 0.0f;
00282         acc3 = 0.0f;
00283
00284         /* read x[0], x[1], x[2] samples */
00285         x0 = *(px++);
00286         x1 = *(px++);
00287         x2 = *(px++);
00288
00289         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00290         k = srcBLen >> 2u;
00291
00292         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00293          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00294         do
00295         {
00296           /* Read y[srcBLen - 1] sample */
00297           c0 = *(py--);
00298
00299           /* Read x[3] sample */
00300           x3 = *(px++);
00301
00302           /* Perform the multiply-accumulate */
00303           /* acc0 +=  x[0] * y[srcBLen - 1] */
00304           acc0 += x0 * c0;
00305
00306           /* acc1 +=  x[1] * y[srcBLen - 1] */
00307           acc1 += x1 * c0;
00308
00309           /* acc2 +=  x[2] * y[srcBLen - 1] */
00310           acc2 += x2 * c0;
00311
00312           /* acc3 +=  x[3] * y[srcBLen - 1] */
00313           acc3 += x3 * c0;
00314
00315           /* Read y[srcBLen - 2] sample */
00316           c0 = *(py--);
00317
00318           /* Read x[4] sample */
00319           x0 = *(px++);
00320
00321           /* Perform the multiply-accumulate */
00322           /* acc0 +=  x[1] * y[srcBLen - 2] */
00323           acc0 += x1 * c0;
00324           /* acc1 +=  x[2] * y[srcBLen - 2] */
00325           acc1 += x2 * c0;
00326           /* acc2 +=  x[3] * y[srcBLen - 2] */
00327           acc2 += x3 * c0;
00328           /* acc3 +=  x[4] * y[srcBLen - 2] */
00329           acc3 += x0 * c0;
00330
00331           /* Read y[srcBLen - 3] sample */
00332           c0 = *(py--);
00333
00334           /* Read x[5] sample */
00335           x1 = *(px++);
00336
00337           /* Perform the multiply-accumulates */
00338           /* acc0 +=  x[2] * y[srcBLen - 3] */
00339           acc0 += x2 * c0;
00340           /* acc1 +=  x[3] * y[srcBLen - 2] */
00341           acc1 += x3 * c0;
00342           /* acc2 +=  x[4] * y[srcBLen - 2] */
00343           acc2 += x0 * c0;
00344           /* acc3 +=  x[5] * y[srcBLen - 2] */
00345           acc3 += x1 * c0;
00346
00347           /* Read y[srcBLen - 4] sample */
00348           c0 = *(py--);
00349
00350           /* Read x[6] sample */
00351           x2 = *(px++);
00352
00353           /* Perform the multiply-accumulates */
00354           /* acc0 +=  x[3] * y[srcBLen - 4] */
00355           acc0 += x3 * c0;
00356           /* acc1 +=  x[4] * y[srcBLen - 4] */
00357           acc1 += x0 * c0;
00358           /* acc2 +=  x[5] * y[srcBLen - 4] */
00359           acc2 += x1 * c0;
00360           /* acc3 +=  x[6] * y[srcBLen - 4] */
00361           acc3 += x2 * c0;
00362
00363
00364         } while(--k);
00365
00366         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00367          ** No loop unrolling is used. */
00368         k = srcBLen % 0x4u;
00369
00370         while(k > 0u)
00371         {
00372           /* Read y[srcBLen - 5] sample */
00373           c0 = *(py--);
00374
00375           /* Read x[7] sample */
00376           x3 = *(px++);
00377
00378           /* Perform the multiply-accumulates */
00379           /* acc0 +=  x[4] * y[srcBLen - 5] */
00380           acc0 += x0 * c0;
00381           /* acc1 +=  x[5] * y[srcBLen - 5] */
00382           acc1 += x1 * c0;
00383           /* acc2 +=  x[6] * y[srcBLen - 5] */
00384           acc2 += x2 * c0;
00385           /* acc3 +=  x[7] * y[srcBLen - 5] */
00386           acc3 += x3 * c0;
00387
00388           /* Reuse the present samples for the next MAC */
00389           x0 = x1;
00390           x1 = x2;
00391           x2 = x3;
00392
00393           /* Decrement the loop counter */
00394           k--;
00395         }
00396
00397         /* Store the result in the accumulator in the destination buffer. */
00398         *pOut++ = acc0;
00399         *pOut++ = acc1;
00400         *pOut++ = acc2;
00401         *pOut++ = acc3;
00402
00403         /* Update the inputA and inputB pointers for next MAC calculation */
00404         px = pIn1 + (count * 4u);
00405         py = pSrc2;
00406
00407         /* Increment the pointer pIn1 index, count by 1 */
00408         count++;
00409
00410         /* Decrement the loop counter */
00411         blkCnt--;
00412       }
00413
00414       /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00415        ** No loop unrolling is used. */
00416       blkCnt = (uint32_t) blockSize2 % 0x4u;
00417
00418       while(blkCnt > 0u)
00419       {
00420         /* Accumulator is made zero for every iteration */
00421         sum = 0.0f;
00422
00423         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00424         k = srcBLen >> 2u;
00425
00426         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00427          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00428         while(k > 0u)
00429         {
00430           /* Perform the multiply-accumulates */
00431           sum += *px++ * *py--;
00432           sum += *px++ * *py--;
00433           sum += *px++ * *py--;
00434           sum += *px++ * *py--;
00435
00436           /* Decrement the loop counter */
00437           k--;
00438         }
00439
00440         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00441          ** No loop unrolling is used. */
00442         k = srcBLen % 0x4u;
00443
00444         while(k > 0u)
00445         {
00446           /* Perform the multiply-accumulate */
00447           sum += *px++ * *py--;
00448
00449           /* Decrement the loop counter */
00450           k--;
00451         }
00452
00453         /* Store the result in the accumulator in the destination buffer. */
00454         *pOut++ = sum;
00455
00456         /* Update the inputA and inputB pointers for next MAC calculation */
00457         px = pIn1 + count;
00458         py = pSrc2;
00459
00460         /* Increment the MAC count */
00461         count++;
00462
00463         /* Decrement the loop counter */
00464         blkCnt--;
00465       }
00466     }
00467     else
00468     {
00469       /* If the srcBLen is not a multiple of 4,
00470        * the blockSize2 loop cannot be unrolled by 4 */
00471       blkCnt = (uint32_t) blockSize2;
00472
00473       while(blkCnt > 0u)
00474       {
00475         /* Accumulator is made zero for every iteration */
00476         sum = 0.0f;
00477
00478         /* srcBLen number of MACS should be performed */
00479         k = srcBLen;
00480
00481         while(k > 0u)
00482         {
00483           /* Perform the multiply-accumulate */
00484           sum += *px++ * *py--;
00485
00486           /* Decrement the loop counter */
00487           k--;
00488         }
00489
00490         /* Store the result in the accumulator in the destination buffer. */
00491         *pOut++ = sum;
00492
00493         /* Update the inputA and inputB pointers for next MAC calculation */
00494         px = pIn1 + count;
00495         py = pSrc2;
00496
00497         /* Increment the MAC count */
00498         count++;
00499
00500         /* Decrement the loop counter */
00501         blkCnt--;
00502       }
00503     }
00504
00505
00506     /* --------------------------
00507      * Initializations of stage3
00508      * -------------------------*/
00509
00510     /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00511      * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00512      * ....
00513      * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00514      * sum +=  x[srcALen-1] * y[srcBLen-1]
00515      */
00516
00517     /* In this stage the MAC operations are decreased by 1 for every iteration.
00518        The count variable holds the number of MAC operations performed */
00519     count = srcBLen - 1u;
00520
00521     /* Working pointer of inputA */
00522     pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00523     px = pSrc1;
00524
00525     /* Working pointer of inputB */
00526     pSrc2 = pIn2 + (srcBLen - 1u);
00527     py = pSrc2;
00528
00529     while(blockSize3 > 0)
00530     {
00531       /* Accumulator is made zero for every iteration */
00532       sum = 0.0f;
00533
00534       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00535       k = count >> 2u;
00536
00537       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00538        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00539       while(k > 0u)
00540       {
00541         /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
00542         sum += *px++ * *py--;
00543
00544         /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
00545         sum += *px++ * *py--;
00546
00547         /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
00548         sum += *px++ * *py--;
00549
00550         /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
00551         sum += *px++ * *py--;
00552
00553         /* Decrement the loop counter */
00554         k--;
00555       }
00556
00557       /* If the count is not a multiple of 4, compute any remaining MACs here.
00558        ** No loop unrolling is used. */
00559       k = count % 0x4u;
00560
00561       while(k > 0u)
00562       {
00563         /* Perform the multiply-accumulates */
00564         /* sum +=  x[srcALen-1] * y[srcBLen-1] */
00565         sum += *px++ * *py--;
00566
00567         /* Decrement the loop counter */
00568         k--;
00569       }
00570
00571       /* Store the result in the accumulator in the destination buffer. */
00572       *pOut++ = sum;
00573
00574       /* Update the inputA and inputB pointers for next MAC calculation */
00575       px = ++pSrc1;
00576       py = pSrc2;
00577
00578       /* Decrement the MAC count */
00579       count--;
00580
00581       /* Decrement the loop counter */
00582       blockSize3--;
00583
00584     }
00585
00586     /* set status as ARM_MATH_SUCCESS */
00587     status = ARM_MATH_SUCCESS;
00588   }
00589
00590   /* Return to application */
00591   return (status);
00592
00593 #else
00594
00595   /* Run the below code for Cortex-M0 */
00596
00597   float32_t *pIn1 = pSrcA;                       /* inputA pointer */
00598   float32_t *pIn2 = pSrcB;                       /* inputB pointer */
00599   float32_t sum;                                 /* Accumulator */
00600   uint32_t i, j;                                 /* loop counters */
00601   arm_status status;                             /* status of Partial convolution */
00602
00603   /* Check for range of output samples to be calculated */
00604   if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
00605   {
00606     /* Set status as ARM_ARGUMENT_ERROR */
00607     status = ARM_MATH_ARGUMENT_ERROR;
00608   }
00609   else
00610   {
00611     /* Loop to calculate convolution for output length number of values */
00612     for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
00613     {
00614       /* Initialize sum with zero to carry on MAC operations */
00615       sum = 0.0f;
00616
00617       /* Loop to perform MAC operations according to convolution equation */
00618       for (j = 0u; j <= i; j++)
00619       {
00620         /* Check the array limitations for inputs */
00621         if((((i - j) < srcBLen) && (j < srcALen)))
00622         {
00623           /* z[i] += x[i-j] * y[j] */
00624           sum += pIn1[j] * pIn2[i - j];
00625         }
00626       }
00627       /* Store the output in the destination buffer */
00628       pDst[i] = sum;
00629     }
00630     /* set status as ARM_SUCCESS as there are no argument errors */
00631     status = ARM_MATH_SUCCESS;
00632   }
00633   return (status);
00634
00635 #endif /*   #ifndef ARM_MATH_CM0 */
00636
00637 }
00638
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c
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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_conv_partial_fast_q15.c
00009 *
00010 * Description:  Fast Q15 Partial convolution.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00056 arm_status arm_conv_partial_fast_q15(
00057   q15_t * pSrcA,
00058   uint32_t srcALen,
00059   q15_t * pSrcB,
00060   uint32_t srcBLen,
00061   q15_t * pDst,
00062   uint32_t firstIndex,
00063   uint32_t numPoints)
00064 {
00065   q15_t *pIn1;                                   /* inputA pointer               */
00066   q15_t *pIn2;                                   /* inputB pointer               */
00067   q15_t *pOut = pDst;                            /* output pointer               */
00068   q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator                  */
00069   q15_t *px;                                     /* Intermediate inputA pointer  */
00070   q15_t *py;                                     /* Intermediate inputB pointer  */
00071   q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
00072   q31_t x0, x1, x2, x3, c0;
00073   uint32_t j, k, count, check, blkCnt;
00074   int32_t blockSize1, blockSize2, blockSize3;    /* loop counters                 */
00075   arm_status status;                             /* status of Partial convolution */
00076   q31_t *pb;                                     /* 32 bit pointer for inputB buffer */
00077
00078   /* Check for range of output samples to be calculated */
00079   if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
00080   {
00081     /* Set status as ARM_MATH_ARGUMENT_ERROR */
00082     status = ARM_MATH_ARGUMENT_ERROR;
00083   }
00084   else
00085   {
00086
00087     /* The algorithm implementation is based on the lengths of the inputs. */
00088     /* srcB is always made to slide across srcA. */
00089     /* So srcBLen is always considered as shorter or equal to srcALen */
00090     if(srcALen >= srcBLen)
00091     {
00092       /* Initialization of inputA pointer */
00093       pIn1 = pSrcA;
00094
00095       /* Initialization of inputB pointer */
00096       pIn2 = pSrcB;
00097     }
00098     else
00099     {
00100       /* Initialization of inputA pointer */
00101       pIn1 = pSrcB;
00102
00103       /* Initialization of inputB pointer */
00104       pIn2 = pSrcA;
00105
00106       /* srcBLen is always considered as shorter or equal to srcALen */
00107       j = srcBLen;
00108       srcBLen = srcALen;
00109       srcALen = j;
00110     }
00111
00112     /* Conditions to check which loopCounter holds
00113      * the first and last indices of the output samples to be calculated. */
00114     check = firstIndex + numPoints;
00115     blockSize3 = ((int32_t) check - (int32_t) srcALen);
00116     blockSize3 = (blockSize3 > 0) ? blockSize3 : 0;
00117     blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
00118     blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
00119                                      (int32_t) numPoints) : 0;
00120     blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
00121                                     (int32_t) firstIndex);
00122     blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
00123
00124     /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00125     /* The function is internally
00126      * divided into three stages according to the number of multiplications that has to be
00127      * taken place between inputA samples and inputB samples. In the first stage of the
00128      * algorithm, the multiplications increase by one for every iteration.
00129      * In the second stage of the algorithm, srcBLen number of multiplications are done.
00130      * In the third stage of the algorithm, the multiplications decrease by one
00131      * for every iteration. */
00132
00133     /* Set the output pointer to point to the firstIndex
00134      * of the output sample to be calculated. */
00135     pOut = pDst + firstIndex;
00136
00137     /* --------------------------
00138      * Initializations of stage1
00139      * -------------------------*/
00140
00141     /* sum = x[0] * y[0]
00142      * sum = x[0] * y[1] + x[1] * y[0]
00143      * ....
00144      * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00145      */
00146
00147     /* In this stage the MAC operations are increased by 1 for every iteration.
00148        The count variable holds the number of MAC operations performed.
00149        Since the partial convolution starts from firstIndex
00150        Number of Macs to be performed is firstIndex + 1 */
00151     count = 1u + firstIndex;
00152
00153     /* Working pointer of inputA */
00154     px = pIn1;
00155
00156     /* Working pointer of inputB */
00157     pSrc2 = pIn2 + firstIndex;
00158     py = pSrc2;
00159
00160     /* ------------------------
00161      * Stage1 process
00162      * ----------------------*/
00163
00164     /* For loop unrolling by 4, this stage is divided into two. */
00165     /* First part of this stage computes the MAC operations less than 4 */
00166     /* Second part of this stage computes the MAC operations greater than or equal to 4 */
00167
00168     /* The first part of the stage starts here */
00169     while((count < 4u) && (blockSize1 > 0))
00170     {
00171       /* Accumulator is made zero for every iteration */
00172       sum = 0;
00173
00174       /* Loop over number of MAC operations between
00175        * inputA samples and inputB samples */
00176       k = count;
00177
00178       while(k > 0u)
00179       {
00180         /* Perform the multiply-accumulates */
00181         sum = __SMLAD(*px++, *py--, sum);
00182
00183         /* Decrement the loop counter */
00184         k--;
00185       }
00186
00187       /* Store the result in the accumulator in the destination buffer. */
00188       *pOut++ = (q15_t) (sum >> 15);
00189
00190       /* Update the inputA and inputB pointers for next MAC calculation */
00191       py = ++pSrc2;
00192       px = pIn1;
00193
00194       /* Increment the MAC count */
00195       count++;
00196
00197       /* Decrement the loop counter */
00198       blockSize1--;
00199     }
00200
00201     /* The second part of the stage starts here */
00202     /* The internal loop, over count, is unrolled by 4 */
00203     /* To, read the last two inputB samples using SIMD:
00204      * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
00205     py = py - 1;
00206
00207     while(blockSize1 > 0)
00208     {
00209       /* Accumulator is made zero for every iteration */
00210       sum = 0;
00211
00212       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00213       k = count >> 2u;
00214
00215       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00216        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00217       while(k > 0u)
00218       {
00219         /* Perform the multiply-accumulates */
00220         /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
00221         sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00222         /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
00223         sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00224
00225         /* Decrement the loop counter */
00226         k--;
00227       }
00228
00229       /* For the next MAC operations, the pointer py is used without SIMD
00230        * So, py is incremented by 1 */
00231       py = py + 1u;
00232
00233       /* If the count is not a multiple of 4, compute any remaining MACs here.
00234        ** No loop unrolling is used. */
00235       k = count % 0x4u;
00236
00237       while(k > 0u)
00238       {
00239         /* Perform the multiply-accumulates */
00240         sum = __SMLAD(*px++, *py--, sum);
00241
00242         /* Decrement the loop counter */
00243         k--;
00244       }
00245
00246       /* Store the result in the accumulator in the destination buffer. */
00247       *pOut++ = (q15_t) (sum >> 15);
00248
00249       /* Update the inputA and inputB pointers for next MAC calculation */
00250       py = ++pSrc2 - 1u;
00251       px = pIn1;
00252
00253       /* Increment the MAC count */
00254       count++;
00255
00256       /* Decrement the loop counter */
00257       blockSize1--;
00258     }
00259
00260     /* --------------------------
00261      * Initializations of stage2
00262      * ------------------------*/
00263
00264     /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00265      * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00266      * ....
00267      * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00268      */
00269
00270     /* Working pointer of inputA */
00271     px = pIn1;
00272
00273     /* Working pointer of inputB */
00274     pSrc2 = pIn2 + (srcBLen - 1u);
00275     py = pSrc2;
00276
00277     /* Initialize inputB pointer of type q31 */
00278     pb = (q31_t *) (py - 1u);
00279
00280     /* count is the index by which the pointer pIn1 to be incremented */
00281     count = 1u;
00282
00283
00284     /* --------------------
00285      * Stage2 process
00286      * -------------------*/
00287
00288     /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00289      * So, to loop unroll over blockSize2,
00290      * srcBLen should be greater than or equal to 4 */
00291     if(srcBLen >= 4u)
00292     {
00293       /* Loop unroll over blockSize2, by 4 */
00294       blkCnt = ((uint32_t) blockSize2 >> 2u);
00295
00296       while(blkCnt > 0u)
00297       {
00298         /* Set all accumulators to zero */
00299         acc0 = 0;
00300         acc1 = 0;
00301         acc2 = 0;
00302         acc3 = 0;
00303
00304
00305         /* read x[0], x[1] samples */
00306         x0 = *(q31_t *) (px++);
00307         /* read x[1], x[2] samples */
00308         x1 = *(q31_t *) (px++);
00309
00310
00311         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00312         k = srcBLen >> 2u;
00313
00314         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00315          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00316         do
00317         {
00318           /* Read the last two inputB samples using SIMD:
00319            * y[srcBLen - 1] and y[srcBLen - 2] */
00320           c0 = *(pb--);
00321
00322           /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
00323           acc0 = __SMLADX(x0, c0, acc0);
00324
00325           /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
00326           acc1 = __SMLADX(x1, c0, acc1);
00327
00328           /* Read x[2], x[3] */
00329           x2 = *(q31_t *) (px++);
00330
00331           /* Read x[3], x[4] */
00332           x3 = *(q31_t *) (px++);
00333
00334           /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
00335           acc2 = __SMLADX(x2, c0, acc2);
00336
00337           /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
00338           acc3 = __SMLADX(x3, c0, acc3);
00339
00340           /* Read y[srcBLen - 3] and y[srcBLen - 4] */
00341           c0 = *(pb--);
00342
00343           /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
00344           acc0 = __SMLADX(x2, c0, acc0);
00345
00346           /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
00347           acc1 = __SMLADX(x3, c0, acc1);
00348
00349           /* Read x[4], x[5] */
00350           x0 = *(q31_t *) (px++);
00351
00352           /* Read x[5], x[6] */
00353           x1 = *(q31_t *) (px++);
00354
00355           /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
00356           acc2 = __SMLADX(x0, c0, acc2);
00357
00358           /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
00359           acc3 = __SMLADX(x1, c0, acc3);
00360
00361         } while(--k);
00362
00363         /* For the next MAC operations, SIMD is not used
00364          * So, the 16 bit pointer if inputB, py is updated */
00365         py = (q15_t *) pb;
00366         py = py + 1;
00367
00368         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00369          ** No loop unrolling is used. */
00370         k = srcBLen % 0x4u;
00371
00372         if(k == 1u)
00373         {
00374           /* Read y[srcBLen - 5] */
00375           c0 = *(py);
00376 #ifdef  ARM_MATH_BIG_ENDIAN
00377
00378           c0 = c0 << 16;
00379
00380 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00381
00382           /* Read x[7] */
00383           x3 = *(q31_t *) px++;
00384
00385           /* Perform the multiply-accumulates */
00386           acc0 = __SMLAD(x0, c0, acc0);
00387           acc1 = __SMLAD(x1, c0, acc1);
00388           acc2 = __SMLADX(x1, c0, acc2);
00389           acc3 = __SMLADX(x3, c0, acc3);
00390         }
00391
00392         if(k == 2u)
00393         {
00394           /* Read y[srcBLen - 5], y[srcBLen - 6] */
00395           c0 = *(pb);
00396
00397           /* Read x[7], x[8] */
00398           x3 = *(q31_t *) px++;
00399
00400           /* Read x[9] */
00401           x2 = *(q31_t *) px++;
00402
00403           /* Perform the multiply-accumulates */
00404           acc0 = __SMLADX(x0, c0, acc0);
00405           acc1 = __SMLADX(x1, c0, acc1);
00406           acc2 = __SMLADX(x3, c0, acc2);
00407           acc3 = __SMLADX(x2, c0, acc3);
00408         }
00409
00410         if(k == 3u)
00411         {
00412           /* Read y[srcBLen - 5], y[srcBLen - 6] */
00413           c0 = *pb--;
00414
00415           /* Read x[7], x[8] */
00416           x3 = *(q31_t *) px++;
00417
00418           /* Read x[9] */
00419           x2 = *(q31_t *) px++;
00420
00421           /* Perform the multiply-accumulates */
00422           acc0 = __SMLADX(x0, c0, acc0);
00423           acc1 = __SMLADX(x1, c0, acc1);
00424           acc2 = __SMLADX(x3, c0, acc2);
00425           acc3 = __SMLADX(x2, c0, acc3);
00426
00427           /* Read y[srcBLen - 7] */
00428 #ifdef  ARM_MATH_BIG_ENDIAN
00429
00430           c0 = (*pb);
00431           c0 = (c0) << 16;
00432
00433 #else
00434
00435           c0 = (q15_t) (*pb >> 16);
00436
00437 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00438
00439           /* Read x[10] */
00440           x3 = *(q31_t *) px++;
00441
00442           /* Perform the multiply-accumulates */
00443           acc0 = __SMLADX(x1, c0, acc0);
00444           acc1 = __SMLAD(x2, c0, acc1);
00445           acc2 = __SMLADX(x2, c0, acc2);
00446           acc3 = __SMLADX(x3, c0, acc3);
00447         }
00448
00449         /* Store the results in the accumulators in the destination buffer. */
00450 #ifndef ARM_MATH_BIG_ENDIAN
00451
00452         *__SIMD32(pOut)++ = __PKHBT(acc0 >> 15, acc1 >> 15, 16);
00453         *__SIMD32(pOut)++ = __PKHBT(acc2 >> 15, acc3 >> 15, 16);
00454
00455 #else
00456
00457         *__SIMD32(pOut)++ = __PKHBT(acc1 >> 15, acc0 >> 15, 16);
00458         *__SIMD32(pOut)++ = __PKHBT(acc3 >> 15, acc2 >> 15, 16);
00459
00460 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00461
00462         /* Update the inputA and inputB pointers for next MAC calculation */
00463         px = pIn1 + (count * 4u);
00464         py = pSrc2;
00465         pb = (q31_t *) (py - 1);
00466
00467         /* Increment the pointer pIn1 index, count by 1 */
00468         count++;
00469
00470         /* Decrement the loop counter */
00471         blkCnt--;
00472       }
00473
00474       /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00475        ** No loop unrolling is used. */
00476       blkCnt = (uint32_t) blockSize2 % 0x4u;
00477
00478       while(blkCnt > 0u)
00479       {
00480         /* Accumulator is made zero for every iteration */
00481         sum = 0;
00482
00483         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00484         k = srcBLen >> 2u;
00485
00486         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00487          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00488         while(k > 0u)
00489         {
00490           /* Perform the multiply-accumulates */
00491           sum += ((q31_t) * px++ * *py--);
00492           sum += ((q31_t) * px++ * *py--);
00493           sum += ((q31_t) * px++ * *py--);
00494           sum += ((q31_t) * px++ * *py--);
00495
00496           /* Decrement the loop counter */
00497           k--;
00498         }
00499
00500         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00501          ** No loop unrolling is used. */
00502         k = srcBLen % 0x4u;
00503
00504         while(k > 0u)
00505         {
00506           /* Perform the multiply-accumulates */
00507           sum += ((q31_t) * px++ * *py--);
00508
00509           /* Decrement the loop counter */
00510           k--;
00511         }
00512
00513         /* Store the result in the accumulator in the destination buffer. */
00514         *pOut++ = (q15_t) (sum >> 15);
00515
00516         /* Update the inputA and inputB pointers for next MAC calculation */
00517         px = pIn1 + count;
00518         py = pSrc2;
00519
00520         /* Increment the pointer pIn1 index, count by 1 */
00521         count++;
00522
00523         /* Decrement the loop counter */
00524         blkCnt--;
00525       }
00526     }
00527     else
00528     {
00529       /* If the srcBLen is not a multiple of 4,
00530        * the blockSize2 loop cannot be unrolled by 4 */
00531       blkCnt = (uint32_t) blockSize2;
00532
00533       while(blkCnt > 0u)
00534       {
00535         /* Accumulator is made zero for every iteration */
00536         sum = 0;
00537
00538         /* srcBLen number of MACS should be performed */
00539         k = srcBLen;
00540
00541         while(k > 0u)
00542         {
00543           /* Perform the multiply-accumulate */
00544           sum += ((q31_t) * px++ * *py--);
00545
00546           /* Decrement the loop counter */
00547           k--;
00548         }
00549
00550         /* Store the result in the accumulator in the destination buffer. */
00551         *pOut++ = (q15_t) (sum >> 15);
00552
00553         /* Update the inputA and inputB pointers for next MAC calculation */
00554         px = pIn1 + count;
00555         py = pSrc2;
00556
00557         /* Increment the MAC count */
00558         count++;
00559
00560         /* Decrement the loop counter */
00561         blkCnt--;
00562       }
00563     }
00564
00565
00566     /* --------------------------
00567      * Initializations of stage3
00568      * -------------------------*/
00569
00570     /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00571      * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00572      * ....
00573      * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00574      * sum +=  x[srcALen-1] * y[srcBLen-1]
00575      */
00576
00577     /* In this stage the MAC operations are decreased by 1 for every iteration.
00578        The count variable holds the number of MAC operations performed */
00579     count = srcBLen - 1u;
00580
00581     /* Working pointer of inputA */
00582     pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00583     px = pSrc1;
00584
00585     /* Working pointer of inputB */
00586     pSrc2 = pIn2 + (srcBLen - 1u);
00587     pIn2 = pSrc2 - 1u;
00588     py = pIn2;
00589
00590     /* -------------------
00591      * Stage3 process
00592      * ------------------*/
00593
00594     /* For loop unrolling by 4, this stage is divided into two. */
00595     /* First part of this stage computes the MAC operations greater than 4 */
00596     /* Second part of this stage computes the MAC operations less than or equal to 4 */
00597
00598     /* The first part of the stage starts here */
00599     j = count >> 2u;
00600
00601     while((j > 0u) && (blockSize3 > 0))
00602     {
00603       /* Accumulator is made zero for every iteration */
00604       sum = 0;
00605
00606       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00607       k = count >> 2u;
00608
00609       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00610        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00611       while(k > 0u)
00612       {
00613         /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
00614          * with y[srcBLen - 1], y[srcBLen - 2] respectively */
00615         sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00616         /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
00617          * with y[srcBLen - 3], y[srcBLen - 4] respectively */
00618         sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00619
00620         /* Decrement the loop counter */
00621         k--;
00622       }
00623
00624       /* For the next MAC operations, the pointer py is used without SIMD
00625        * So, py is incremented by 1 */
00626       py = py + 1u;
00627
00628       /* If the count is not a multiple of 4, compute any remaining MACs here.
00629        ** No loop unrolling is used. */
00630       k = count % 0x4u;
00631
00632       while(k > 0u)
00633       {
00634         /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
00635         sum = __SMLAD(*px++, *py--, sum);
00636
00637         /* Decrement the loop counter */
00638         k--;
00639       }
00640
00641       /* Store the result in the accumulator in the destination buffer. */
00642       *pOut++ = (q15_t) (sum >> 15);
00643
00644       /* Update the inputA and inputB pointers for next MAC calculation */
00645       px = ++pSrc1;
00646       py = pIn2;
00647
00648       /* Decrement the MAC count */
00649       count--;
00650
00651       /* Decrement the loop counter */
00652       blockSize3--;
00653
00654       j--;
00655     }
00656
00657     /* The second part of the stage starts here */
00658     /* SIMD is not used for the next MAC operations,
00659      * so pointer py is updated to read only one sample at a time */
00660     py = py + 1u;
00661
00662     while(blockSize3 > 0)
00663     {
00664       /* Accumulator is made zero for every iteration */
00665       sum = 0;
00666
00667       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00668       k = count;
00669
00670       while(k > 0u)
00671       {
00672         /* Perform the multiply-accumulates */
00673         /* sum +=  x[srcALen-1] * y[srcBLen-1] */
00674         sum = __SMLAD(*px++, *py--, sum);
00675
00676         /* Decrement the loop counter */
00677         k--;
00678       }
00679
00680       /* Store the result in the accumulator in the destination buffer. */
00681       *pOut++ = (q15_t) (sum >> 15);
00682
00683       /* Update the inputA and inputB pointers for next MAC calculation */
00684       px = ++pSrc1;
00685       py = pSrc2;
00686
00687       /* Decrement the MAC count */
00688       count--;
00689
00690       /* Decrement the loop counter */
00691       blockSize3--;
00692     }
00693
00694     /* set status as ARM_MATH_SUCCESS */
00695     status = ARM_MATH_SUCCESS;
00696   }
00697
00698   /* Return to application */
00699   return (status);
00700
00701 }
00702
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c
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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_conv_partial_fast_q31.c
00009 *
00010 * Description:  Fast Q31 Partial convolution.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00056 arm_status arm_conv_partial_fast_q31(
00057   q31_t * pSrcA,
00058   uint32_t srcALen,
00059   q31_t * pSrcB,
00060   uint32_t srcBLen,
00061   q31_t * pDst,
00062   uint32_t firstIndex,
00063   uint32_t numPoints)
00064 {
00065   q31_t *pIn1;                                   /* inputA pointer               */
00066   q31_t *pIn2;                                   /* inputB pointer               */
00067   q31_t *pOut = pDst;                            /* output pointer               */
00068   q31_t *px;                                     /* Intermediate inputA pointer  */
00069   q31_t *py;                                     /* Intermediate inputB pointer  */
00070   q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
00071   q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
00072   q31_t x0, x1, x2, x3, c0;
00073   uint32_t j, k, count, check, blkCnt;
00074   int32_t blockSize1, blockSize2, blockSize3;    /* loop counters                 */
00075   arm_status status;                             /* status of Partial convolution */
00076
00077
00078   /* Check for range of output samples to be calculated */
00079   if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
00080   {
00081     /* Set status as ARM_MATH_ARGUMENT_ERROR */
00082     status = ARM_MATH_ARGUMENT_ERROR;
00083   }
00084   else
00085   {
00086
00087     /* The algorithm implementation is based on the lengths of the inputs. */
00088     /* srcB is always made to slide across srcA. */
00089     /* So srcBLen is always considered as shorter or equal to srcALen */
00090     if(srcALen >= srcBLen)
00091     {
00092       /* Initialization of inputA pointer */
00093       pIn1 = pSrcA;
00094
00095       /* Initialization of inputB pointer */
00096       pIn2 = pSrcB;
00097     }
00098     else
00099     {
00100       /* Initialization of inputA pointer */
00101       pIn1 = pSrcB;
00102
00103       /* Initialization of inputB pointer */
00104       pIn2 = pSrcA;
00105
00106       /* srcBLen is always considered as shorter or equal to srcALen */
00107       j = srcBLen;
00108       srcBLen = srcALen;
00109       srcALen = j;
00110     }
00111
00112     /* Conditions to check which loopCounter holds
00113      * the first and last indices of the output samples to be calculated. */
00114     check = firstIndex + numPoints;
00115     blockSize3 = ((int32_t) check - (int32_t) srcALen);
00116     blockSize3 = (blockSize3 > 0) ? blockSize3 : 0;
00117     blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
00118     blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
00119                                      (int32_t) numPoints) : 0;
00120     blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
00121                                     (int32_t) firstIndex);
00122     blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
00123
00124     /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00125     /* The function is internally
00126      * divided into three stages according to the number of multiplications that has to be
00127      * taken place between inputA samples and inputB samples. In the first stage of the
00128      * algorithm, the multiplications increase by one for every iteration.
00129      * In the second stage of the algorithm, srcBLen number of multiplications are done.
00130      * In the third stage of the algorithm, the multiplications decrease by one
00131      * for every iteration. */
00132
00133     /* Set the output pointer to point to the firstIndex
00134      * of the output sample to be calculated. */
00135     pOut = pDst + firstIndex;
00136
00137     /* --------------------------
00138      * Initializations of stage1
00139      * -------------------------*/
00140
00141     /* sum = x[0] * y[0]
00142      * sum = x[0] * y[1] + x[1] * y[0]
00143      * ....
00144      * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00145      */
00146
00147     /* In this stage the MAC operations are increased by 1 for every iteration.
00148        The count variable holds the number of MAC operations performed.
00149        Since the partial convolution starts from firstIndex
00150        Number of Macs to be performed is firstIndex + 1 */
00151     count = 1u + firstIndex;
00152
00153     /* Working pointer of inputA */
00154     px = pIn1;
00155
00156     /* Working pointer of inputB */
00157     pSrc2 = pIn2 + firstIndex;
00158     py = pSrc2;
00159
00160     /* ------------------------
00161      * Stage1 process
00162      * ----------------------*/
00163
00164     /* The first loop starts here */
00165     while(blockSize1 > 0)
00166     {
00167       /* Accumulator is made zero for every iteration */
00168       sum = 0;
00169
00170       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00171       k = count >> 2u;
00172
00173       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00174        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00175       while(k > 0u)
00176       {
00177         /* x[0] * y[srcBLen - 1] */
00178         sum = (q31_t) ((((q63_t) sum << 32) +
00179                         ((q63_t) * px++ * (*py--))) >> 32);
00180
00181         /* x[1] * y[srcBLen - 2] */
00182         sum = (q31_t) ((((q63_t) sum << 32) +
00183                         ((q63_t) * px++ * (*py--))) >> 32);
00184
00185         /* x[2] * y[srcBLen - 3] */
00186         sum = (q31_t) ((((q63_t) sum << 32) +
00187                         ((q63_t) * px++ * (*py--))) >> 32);
00188
00189         /* x[3] * y[srcBLen - 4] */
00190         sum = (q31_t) ((((q63_t) sum << 32) +
00191                         ((q63_t) * px++ * (*py--))) >> 32);
00192
00193         /* Decrement the loop counter */
00194         k--;
00195       }
00196
00197       /* If the count is not a multiple of 4, compute any remaining MACs here.
00198        ** No loop unrolling is used. */
00199       k = count % 0x4u;
00200
00201       while(k > 0u)
00202       {
00203         /* Perform the multiply-accumulates */
00204         sum = (q31_t) ((((q63_t) sum << 32) +
00205                         ((q63_t) * px++ * (*py--))) >> 32);
00206
00207         /* Decrement the loop counter */
00208         k--;
00209       }
00210
00211       /* Store the result in the accumulator in the destination buffer. */
00212       *pOut++ = sum << 1;
00213
00214       /* Update the inputA and inputB pointers for next MAC calculation */
00215       py = ++pSrc2;
00216       px = pIn1;
00217
00218       /* Increment the MAC count */
00219       count++;
00220
00221       /* Decrement the loop counter */
00222       blockSize1--;
00223     }
00224
00225     /* --------------------------
00226      * Initializations of stage2
00227      * ------------------------*/
00228
00229     /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00230      * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00231      * ....
00232      * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00233      */
00234
00235     /* Working pointer of inputA */
00236     px = pIn1;
00237
00238     /* Working pointer of inputB */
00239     pSrc2 = pIn2 + (srcBLen - 1u);
00240     py = pSrc2;
00241
00242     /* count is index by which the pointer pIn1 to be incremented */
00243     count = 1u;
00244
00245     /* -------------------
00246      * Stage2 process
00247      * ------------------*/
00248
00249     /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00250      * So, to loop unroll over blockSize2,
00251      * srcBLen should be greater than or equal to 4 */
00252     if(srcBLen >= 4u)
00253     {
00254       /* Loop unroll over blockSize2 */
00255       blkCnt = ((uint32_t) blockSize2 >> 2u);
00256
00257       while(blkCnt > 0u)
00258       {
00259         /* Set all accumulators to zero */
00260         acc0 = 0;
00261         acc1 = 0;
00262         acc2 = 0;
00263         acc3 = 0;
00264
00265         /* read x[0], x[1], x[2] samples */
00266         x0 = *(px++);
00267         x1 = *(px++);
00268         x2 = *(px++);
00269
00270         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00271         k = srcBLen >> 2u;
00272
00273         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00274          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00275         do
00276         {
00277           /* Read y[srcBLen - 1] sample */
00278           c0 = *(py--);
00279
00280           /* Read x[3] sample */
00281           x3 = *(px++);
00282
00283           /* Perform the multiply-accumulate */
00284           /* acc0 +=  x[0] * y[srcBLen - 1] */
00285           acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
00286
00287           /* acc1 +=  x[1] * y[srcBLen - 1] */
00288           acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
00289
00290           /* acc2 +=  x[2] * y[srcBLen - 1] */
00291           acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
00292
00293           /* acc3 +=  x[3] * y[srcBLen - 1] */
00294           acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
00295
00296           /* Read y[srcBLen - 2] sample */
00297           c0 = *(py--);
00298
00299           /* Read x[4] sample */
00300           x0 = *(px++);
00301
00302           /* Perform the multiply-accumulate */
00303           /* acc0 +=  x[1] * y[srcBLen - 2] */
00304           acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
00305           /* acc1 +=  x[2] * y[srcBLen - 2] */
00306           acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32);
00307           /* acc2 +=  x[3] * y[srcBLen - 2] */
00308           acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32);
00309           /* acc3 +=  x[4] * y[srcBLen - 2] */
00310           acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
00311
00312           /* Read y[srcBLen - 3] sample */
00313           c0 = *(py--);
00314
00315           /* Read x[5] sample */
00316           x1 = *(px++);
00317
00318           /* Perform the multiply-accumulates */
00319           /* acc0 +=  x[2] * y[srcBLen - 3] */
00320           acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32);
00321           /* acc1 +=  x[3] * y[srcBLen - 2] */
00322           acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32);
00323           /* acc2 +=  x[4] * y[srcBLen - 2] */
00324           acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32);
00325           /* acc3 +=  x[5] * y[srcBLen - 2] */
00326           acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
00327
00328           /* Read y[srcBLen - 4] sample */
00329           c0 = *(py--);
00330
00331           /* Read x[6] sample */
00332           x2 = *(px++);
00333
00334           /* Perform the multiply-accumulates */
00335           /* acc0 +=  x[3] * y[srcBLen - 4] */
00336           acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32);
00337           /* acc1 +=  x[4] * y[srcBLen - 4] */
00338           acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32);
00339           /* acc2 +=  x[5] * y[srcBLen - 4] */
00340           acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32);
00341           /* acc3 +=  x[6] * y[srcBLen - 4] */
00342           acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
00343
00344
00345         } while(--k);
00346
00347         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00348          ** No loop unrolling is used. */
00349         k = srcBLen % 0x4u;
00350
00351         while(k > 0u)
00352         {
00353           /* Read y[srcBLen - 5] sample */
00354           c0 = *(py--);
00355
00356           /* Read x[7] sample */
00357           x3 = *(px++);
00358
00359           /* Perform the multiply-accumulates */
00360           /* acc0 +=  x[4] * y[srcBLen - 5] */
00361           acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
00362           /* acc1 +=  x[5] * y[srcBLen - 5] */
00363           acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
00364           /* acc2 +=  x[6] * y[srcBLen - 5] */
00365           acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
00366           /* acc3 +=  x[7] * y[srcBLen - 5] */
00367           acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
00368
00369           /* Reuse the present samples for the next MAC */
00370           x0 = x1;
00371           x1 = x2;
00372           x2 = x3;
00373
00374           /* Decrement the loop counter */
00375           k--;
00376         }
00377
00378         /* Store the result in the accumulator in the destination buffer. */
00379         *pOut++ = (q31_t) (acc0 << 1);
00380         *pOut++ = (q31_t) (acc1 << 1);
00381         *pOut++ = (q31_t) (acc2 << 1);
00382         *pOut++ = (q31_t) (acc3 << 1);
00383
00384         /* Update the inputA and inputB pointers for next MAC calculation */
00385         px = pIn1 + (count * 4u);
00386         py = pSrc2;
00387
00388         /* Increment the pointer pIn1 index, count by 1 */
00389         count++;
00390
00391         /* Decrement the loop counter */
00392         blkCnt--;
00393       }
00394
00395       /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00396        ** No loop unrolling is used. */
00397       blkCnt = (uint32_t) blockSize2 % 0x4u;
00398
00399       while(blkCnt > 0u)
00400       {
00401         /* Accumulator is made zero for every iteration */
00402         sum = 0;
00403
00404         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00405         k = srcBLen >> 2u;
00406
00407         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00408          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00409         while(k > 0u)
00410         {
00411           /* Perform the multiply-accumulates */
00412           sum = (q31_t) ((((q63_t) sum << 32) +
00413                           ((q63_t) * px++ * (*py--))) >> 32);
00414           sum = (q31_t) ((((q63_t) sum << 32) +
00415                           ((q63_t) * px++ * (*py--))) >> 32);
00416           sum = (q31_t) ((((q63_t) sum << 32) +
00417                           ((q63_t) * px++ * (*py--))) >> 32);
00418           sum = (q31_t) ((((q63_t) sum << 32) +
00419                           ((q63_t) * px++ * (*py--))) >> 32);
00420
00421           /* Decrement the loop counter */
00422           k--;
00423         }
00424
00425         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00426          ** No loop unrolling is used. */
00427         k = srcBLen % 0x4u;
00428
00429         while(k > 0u)
00430         {
00431           /* Perform the multiply-accumulate */
00432           sum = (q31_t) ((((q63_t) sum << 32) +
00433                           ((q63_t) * px++ * (*py--))) >> 32);
00434
00435           /* Decrement the loop counter */
00436           k--;
00437         }
00438
00439         /* Store the result in the accumulator in the destination buffer. */
00440         *pOut++ = sum << 1;
00441
00442         /* Update the inputA and inputB pointers for next MAC calculation */
00443         px = pIn1 + count;
00444         py = pSrc2;
00445
00446         /* Increment the MAC count */
00447         count++;
00448
00449         /* Decrement the loop counter */
00450         blkCnt--;
00451       }
00452     }
00453     else
00454     {
00455       /* If the srcBLen is not a multiple of 4,
00456        * the blockSize2 loop cannot be unrolled by 4 */
00457       blkCnt = (uint32_t) blockSize2;
00458
00459       while(blkCnt > 0u)
00460       {
00461         /* Accumulator is made zero for every iteration */
00462         sum = 0;
00463
00464         /* srcBLen number of MACS should be performed */
00465         k = srcBLen;
00466
00467         while(k > 0u)
00468         {
00469           /* Perform the multiply-accumulate */
00470           sum = (q31_t) ((((q63_t) sum << 32) +
00471                           ((q63_t) * px++ * (*py--))) >> 32);
00472
00473           /* Decrement the loop counter */
00474           k--;
00475         }
00476
00477         /* Store the result in the accumulator in the destination buffer. */
00478         *pOut++ = sum << 1;
00479
00480         /* Update the inputA and inputB pointers for next MAC calculation */
00481         px = pIn1 + count;
00482         py = pSrc2;
00483
00484         /* Increment the MAC count */
00485         count++;
00486
00487         /* Decrement the loop counter */
00488         blkCnt--;
00489       }
00490     }
00491
00492
00493     /* --------------------------
00494      * Initializations of stage3
00495      * -------------------------*/
00496
00497     /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00498      * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00499      * ....
00500      * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00501      * sum +=  x[srcALen-1] * y[srcBLen-1]
00502      */
00503
00504     /* In this stage the MAC operations are decreased by 1 for every iteration.
00505        The count variable holds the number of MAC operations performed */
00506     count = srcBLen - 1u;
00507
00508     /* Working pointer of inputA */
00509     pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00510     px = pSrc1;
00511
00512     /* Working pointer of inputB */
00513     pSrc2 = pIn2 + (srcBLen - 1u);
00514     py = pSrc2;
00515
00516     /* -------------------
00517      * Stage3 process
00518      * ------------------*/
00519
00520     while(blockSize3 > 0)
00521     {
00522       /* Accumulator is made zero for every iteration */
00523       sum = 0;
00524
00525       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00526       k = count >> 2u;
00527
00528       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00529        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00530       while(k > 0u)
00531       {
00532         /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
00533         sum = (q31_t) ((((q63_t) sum << 32) +
00534                         ((q63_t) * px++ * (*py--))) >> 32);
00535
00536         /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
00537         sum = (q31_t) ((((q63_t) sum << 32) +
00538                         ((q63_t) * px++ * (*py--))) >> 32);
00539
00540         /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
00541         sum = (q31_t) ((((q63_t) sum << 32) +
00542                         ((q63_t) * px++ * (*py--))) >> 32);
00543
00544         /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
00545         sum = (q31_t) ((((q63_t) sum << 32) +
00546                         ((q63_t) * px++ * (*py--))) >> 32);
00547
00548         /* Decrement the loop counter */
00549         k--;
00550       }
00551
00552       /* If the count is not a multiple of 4, compute any remaining MACs here.
00553        ** No loop unrolling is used. */
00554       k = count % 0x4u;
00555
00556       while(k > 0u)
00557       {
00558         /* Perform the multiply-accumulates */
00559         /* sum +=  x[srcALen-1] * y[srcBLen-1] */
00560         sum = (q31_t) ((((q63_t) sum << 32) +
00561                         ((q63_t) * px++ * (*py--))) >> 32);
00562
00563         /* Decrement the loop counter */
00564         k--;
00565       }
00566
00567       /* Store the result in the accumulator in the destination buffer. */
00568       *pOut++ = sum << 1;
00569
00570       /* Update the inputA and inputB pointers for next MAC calculation */
00571       px = ++pSrc1;
00572       py = pSrc2;
00573
00574       /* Decrement the MAC count */
00575       count--;
00576
00577       /* Decrement the loop counter */
00578       blockSize3--;
00579
00580     }
00581
00582     /* set status as ARM_MATH_SUCCESS */
00583     status = ARM_MATH_SUCCESS;
00584   }
00585
00586   /* Return to application */
00587   return (status);
00588
00589 }
00590
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c
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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_conv_partial_q7.c
00009 *
00010 * Description:  Partial convolution of Q7 sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00058 arm_status arm_conv_partial_q7(
00059   q7_t * pSrcA,
00060   uint32_t srcALen,
00061   q7_t * pSrcB,
00062   uint32_t srcBLen,
00063   q7_t * pDst,
00064   uint32_t firstIndex,
00065   uint32_t numPoints)
00066 {
00067
00068
00069 #ifndef ARM_MATH_CM0
00070
00071   /* Run the below code for Cortex-M4 and Cortex-M3 */
00072
00073   q7_t *pIn1;                                    /* inputA pointer */
00074   q7_t *pIn2;                                    /* inputB pointer */
00075   q7_t *pOut = pDst;                             /* output pointer */
00076   q7_t *px;                                      /* Intermediate inputA pointer */
00077   q7_t *py;                                      /* Intermediate inputB pointer */
00078   q7_t *pSrc1, *pSrc2;                           /* Intermediate pointers */
00079   q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
00080   q31_t input1, input2;
00081   q15_t in1, in2;
00082   q7_t x0, x1, x2, x3, c0, c1;
00083   uint32_t j, k, count, check, blkCnt;
00084   int32_t blockSize1, blockSize2, blockSize3;    /* loop counter */
00085   arm_status status;
00086
00087
00088   /* Check for range of output samples to be calculated */
00089   if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
00090   {
00091     /* Set status as ARM_MATH_ARGUMENT_ERROR */
00092     status = ARM_MATH_ARGUMENT_ERROR;
00093   }
00094   else
00095   {
00096
00097     /* The algorithm implementation is based on the lengths of the inputs. */
00098     /* srcB is always made to slide across srcA. */
00099     /* So srcBLen is always considered as shorter or equal to srcALen */
00100     if(srcALen >= srcBLen)
00101     {
00102       /* Initialization of inputA pointer */
00103       pIn1 = pSrcA;
00104
00105       /* Initialization of inputB pointer */
00106       pIn2 = pSrcB;
00107     }
00108     else
00109     {
00110       /* Initialization of inputA pointer */
00111       pIn1 = pSrcB;
00112
00113       /* Initialization of inputB pointer */
00114       pIn2 = pSrcA;
00115
00116       /* srcBLen is always considered as shorter or equal to srcALen */
00117       j = srcBLen;
00118       srcBLen = srcALen;
00119       srcALen = j;
00120     }
00121
00122     /* Conditions to check which loopCounter holds
00123      * the first and last indices of the output samples to be calculated. */
00124     check = firstIndex + numPoints;
00125     blockSize3 = ((int32_t) check - (int32_t) srcALen);
00126     blockSize3 = (blockSize3 > 0) ? blockSize3 : 0;
00127     blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
00128     blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
00129                                      (int32_t) numPoints) : 0;
00130     blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
00131                                     (int32_t) firstIndex);
00132     blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
00133
00134     /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00135     /* The function is internally
00136      * divided into three stages according to the number of multiplications that has to be
00137      * taken place between inputA samples and inputB samples. In the first stage of the
00138      * algorithm, the multiplications increase by one for every iteration.
00139      * In the second stage of the algorithm, srcBLen number of multiplications are done.
00140      * In the third stage of the algorithm, the multiplications decrease by one
00141      * for every iteration. */
00142
00143     /* Set the output pointer to point to the firstIndex
00144      * of the output sample to be calculated. */
00145     pOut = pDst + firstIndex;
00146
00147     /* --------------------------
00148      * Initializations of stage1
00149      * -------------------------*/
00150
00151     /* sum = x[0] * y[0]
00152      * sum = x[0] * y[1] + x[1] * y[0]
00153      * ....
00154      * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00155      */
00156
00157     /* In this stage the MAC operations are increased by 1 for every iteration.
00158        The count variable holds the number of MAC operations performed.
00159        Since the partial convolution starts from from firstIndex
00160        Number of Macs to be performed is firstIndex + 1 */
00161     count = 1u + firstIndex;
00162
00163     /* Working pointer of inputA */
00164     px = pIn1;
00165
00166     /* Working pointer of inputB */
00167     pSrc2 = pIn2 + firstIndex;
00168     py = pSrc2;
00169
00170     /* ------------------------
00171      * Stage1 process
00172      * ----------------------*/
00173
00174     /* The first stage starts here */
00175     while(blockSize1 > 0)
00176     {
00177       /* Accumulator is made zero for every iteration */
00178       sum = 0;
00179
00180       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00181       k = count >> 2u;
00182
00183       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00184        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00185       while(k > 0u)
00186       {
00187         /* x[0] , x[1] */
00188         in1 = (q15_t) * px++;
00189         in2 = (q15_t) * px++;
00190         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00191
00192         /* y[srcBLen - 1] , y[srcBLen - 2] */
00193         in1 = (q15_t) * py--;
00194         in2 = (q15_t) * py--;
00195         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00196
00197         /* x[0] * y[srcBLen - 1] */
00198         /* x[1] * y[srcBLen - 2] */
00199         sum = __SMLAD(input1, input2, sum);
00200
00201         /* x[2] , x[3] */
00202         in1 = (q15_t) * px++;
00203         in2 = (q15_t) * px++;
00204         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00205
00206         /* y[srcBLen - 3] , y[srcBLen - 4] */
00207         in1 = (q15_t) * py--;
00208         in2 = (q15_t) * py--;
00209         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00210
00211         /* x[2] * y[srcBLen - 3] */
00212         /* x[3] * y[srcBLen - 4] */
00213         sum = __SMLAD(input1, input2, sum);
00214
00215         /* Decrement the loop counter */
00216         k--;
00217       }
00218
00219       /* If the count is not a multiple of 4, compute any remaining MACs here.
00220        ** No loop unrolling is used. */
00221       k = count % 0x4u;
00222
00223       while(k > 0u)
00224       {
00225         /* Perform the multiply-accumulates */
00226         sum += ((q31_t) * px++ * *py--);
00227
00228         /* Decrement the loop counter */
00229         k--;
00230       }
00231
00232       /* Store the result in the accumulator in the destination buffer. */
00233       *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
00234
00235       /* Update the inputA and inputB pointers for next MAC calculation */
00236       py = ++pSrc2;
00237       px = pIn1;
00238
00239       /* Increment the MAC count */
00240       count++;
00241
00242       /* Decrement the loop counter */
00243       blockSize1--;
00244     }
00245
00246     /* --------------------------
00247      * Initializations of stage2
00248      * ------------------------*/
00249
00250     /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00251      * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00252      * ....
00253      * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00254      */
00255
00256     /* Working pointer of inputA */
00257     px = pIn1;
00258
00259     /* Working pointer of inputB */
00260     pSrc2 = pIn2 + (srcBLen - 1u);
00261     py = pSrc2;
00262
00263     /* count is index by which the pointer pIn1 to be incremented */
00264     count = 1u;
00265
00266     /* -------------------
00267      * Stage2 process
00268      * ------------------*/
00269
00270     /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00271      * So, to loop unroll over blockSize2,
00272      * srcBLen should be greater than or equal to 4 */
00273     if(srcBLen >= 4u)
00274     {
00275       /* Loop unroll over blockSize2, by 4 */
00276       blkCnt = ((uint32_t) blockSize2 >> 2u);
00277
00278       while(blkCnt > 0u)
00279       {
00280         /* Set all accumulators to zero */
00281         acc0 = 0;
00282         acc1 = 0;
00283         acc2 = 0;
00284         acc3 = 0;
00285
00286         /* read x[0], x[1], x[2] samples */
00287         x0 = *(px++);
00288         x1 = *(px++);
00289         x2 = *(px++);
00290
00291         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00292         k = srcBLen >> 2u;
00293
00294         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00295          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00296         do
00297         {
00298           /* Read y[srcBLen - 1] sample */
00299           c0 = *(py--);
00300           /* Read y[srcBLen - 2] sample */
00301           c1 = *(py--);
00302
00303           /* Read x[3] sample */
00304           x3 = *(px++);
00305
00306           /* x[0] and x[1] are packed */
00307           in1 = (q15_t) x0;
00308           in2 = (q15_t) x1;
00309
00310           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00311
00312           /* y[srcBLen - 1]   and y[srcBLen - 2] are packed */
00313           in1 = (q15_t) c0;
00314           in2 = (q15_t) c1;
00315
00316           input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00317
00318           /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2]  */
00319           acc0 = __SMLAD(input1, input2, acc0);
00320
00321           /* x[1] and x[2] are packed */
00322           in1 = (q15_t) x1;
00323           in2 = (q15_t) x2;
00324
00325           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00326
00327           /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2]  */
00328           acc1 = __SMLAD(input1, input2, acc1);
00329
00330           /* x[2] and x[3] are packed */
00331           in1 = (q15_t) x2;
00332           in2 = (q15_t) x3;
00333
00334           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00335
00336           /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2]  */
00337           acc2 = __SMLAD(input1, input2, acc2);
00338
00339           /* Read x[4] sample */
00340           x0 = *(px++);
00341
00342           /* x[3] and x[4] are packed */
00343           in1 = (q15_t) x3;
00344           in2 = (q15_t) x0;
00345
00346           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00347
00348           /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2]  */
00349           acc3 = __SMLAD(input1, input2, acc3);
00350
00351           /* Read y[srcBLen - 3] sample */
00352           c0 = *(py--);
00353           /* Read y[srcBLen - 4] sample */
00354           c1 = *(py--);
00355
00356           /* Read x[5] sample */
00357           x1 = *(px++);
00358
00359           /* x[2] and x[3] are packed */
00360           in1 = (q15_t) x2;
00361           in2 = (q15_t) x3;
00362
00363           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00364
00365           /* y[srcBLen - 3] and y[srcBLen - 4] are packed */
00366           in1 = (q15_t) c0;
00367           in2 = (q15_t) c1;
00368
00369           input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00370
00371           /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4]  */
00372           acc0 = __SMLAD(input1, input2, acc0);
00373
00374           /* x[3] and x[4] are packed */
00375           in1 = (q15_t) x3;
00376           in2 = (q15_t) x0;
00377
00378           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00379
00380           /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4]  */
00381           acc1 = __SMLAD(input1, input2, acc1);
00382
00383           /* x[4] and x[5] are packed */
00384           in1 = (q15_t) x0;
00385           in2 = (q15_t) x1;
00386
00387           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00388
00389           /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4]  */
00390           acc2 = __SMLAD(input1, input2, acc2);
00391
00392           /* Read x[6] sample */
00393           x2 = *(px++);
00394
00395           /* x[5] and x[6] are packed */
00396           in1 = (q15_t) x1;
00397           in2 = (q15_t) x2;
00398
00399           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00400
00401           /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4]  */
00402           acc3 = __SMLAD(input1, input2, acc3);
00403
00404         } while(--k);
00405
00406         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00407          ** No loop unrolling is used. */
00408         k = srcBLen % 0x4u;
00409
00410         while(k > 0u)
00411         {
00412           /* Read y[srcBLen - 5] sample */
00413           c0 = *(py--);
00414
00415           /* Read x[7] sample */
00416           x3 = *(px++);
00417
00418           /* Perform the multiply-accumulates */
00419           /* acc0 +=  x[4] * y[srcBLen - 5] */
00420           acc0 += ((q31_t) x0 * c0);
00421           /* acc1 +=  x[5] * y[srcBLen - 5] */
00422           acc1 += ((q31_t) x1 * c0);
00423           /* acc2 +=  x[6] * y[srcBLen - 5] */
00424           acc2 += ((q31_t) x2 * c0);
00425           /* acc3 +=  x[7] * y[srcBLen - 5] */
00426           acc3 += ((q31_t) x3 * c0);
00427
00428           /* Reuse the present samples for the next MAC */
00429           x0 = x1;
00430           x1 = x2;
00431           x2 = x3;
00432
00433           /* Decrement the loop counter */
00434           k--;
00435         }
00436
00437         /* Store the result in the accumulator in the destination buffer. */
00438         *pOut++ = (q7_t) (__SSAT(acc0 >> 7, 8));
00439         *pOut++ = (q7_t) (__SSAT(acc1 >> 7, 8));
00440         *pOut++ = (q7_t) (__SSAT(acc2 >> 7, 8));
00441         *pOut++ = (q7_t) (__SSAT(acc3 >> 7, 8));
00442
00443         /* Update the inputA and inputB pointers for next MAC calculation */
00444         px = pIn1 + count * 4u;
00445         py = pSrc2;
00446
00447         /* Increment the pointer pIn1 index, count by 1 */
00448         count++;
00449
00450         /* Decrement the loop counter */
00451         blkCnt--;
00452       }
00453
00454       /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00455        ** No loop unrolling is used. */
00456       blkCnt = (uint32_t) blockSize2 % 0x4u;
00457
00458       while(blkCnt > 0u)
00459       {
00460         /* Accumulator is made zero for every iteration */
00461         sum = 0;
00462
00463         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00464         k = srcBLen >> 2u;
00465
00466         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00467          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00468         while(k > 0u)
00469         {
00470
00471           /* Reading two inputs of SrcA buffer and packing */
00472           in1 = (q15_t) * px++;
00473           in2 = (q15_t) * px++;
00474           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00475
00476           /* Reading two inputs of SrcB buffer and packing */
00477           in1 = (q15_t) * py--;
00478           in2 = (q15_t) * py--;
00479           input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00480
00481           /* Perform the multiply-accumulates */
00482           sum = __SMLAD(input1, input2, sum);
00483
00484           /* Reading two inputs of SrcA buffer and packing */
00485           in1 = (q15_t) * px++;
00486           in2 = (q15_t) * px++;
00487           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00488
00489           /* Reading two inputs of SrcB buffer and packing */
00490           in1 = (q15_t) * py--;
00491           in2 = (q15_t) * py--;
00492           input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00493
00494           /* Perform the multiply-accumulates */
00495           sum = __SMLAD(input1, input2, sum);
00496
00497           /* Decrement the loop counter */
00498           k--;
00499         }
00500
00501         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00502          ** No loop unrolling is used. */
00503         k = srcBLen % 0x4u;
00504
00505         while(k > 0u)
00506         {
00507           /* Perform the multiply-accumulates */
00508           sum += ((q31_t) * px++ * *py--);
00509
00510           /* Decrement the loop counter */
00511           k--;
00512         }
00513
00514         /* Store the result in the accumulator in the destination buffer. */
00515         *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
00516
00517         /* Update the inputA and inputB pointers for next MAC calculation */
00518         px = pIn1 + count;
00519         py = pSrc2;
00520
00521         /* Increment the pointer pIn1 index, count by 1 */
00522         count++;
00523
00524         /* Decrement the loop counter */
00525         blkCnt--;
00526       }
00527     }
00528     else
00529     {
00530       /* If the srcBLen is not a multiple of 4,
00531        * the blockSize2 loop cannot be unrolled by 4 */
00532       blkCnt = (uint32_t) blockSize2;
00533
00534       while(blkCnt > 0u)
00535       {
00536         /* Accumulator is made zero for every iteration */
00537         sum = 0;
00538
00539         /* srcBLen number of MACS should be performed */
00540         k = srcBLen;
00541
00542         while(k > 0u)
00543         {
00544           /* Perform the multiply-accumulate */
00545           sum += ((q31_t) * px++ * *py--);
00546
00547           /* Decrement the loop counter */
00548           k--;
00549         }
00550
00551         /* Store the result in the accumulator in the destination buffer. */
00552         *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
00553
00554         /* Update the inputA and inputB pointers for next MAC calculation */
00555         px = pIn1 + count;
00556         py = pSrc2;
00557
00558         /* Increment the MAC count */
00559         count++;
00560
00561         /* Decrement the loop counter */
00562         blkCnt--;
00563       }
00564     }
00565
00566
00567     /* --------------------------
00568      * Initializations of stage3
00569      * -------------------------*/
00570
00571     /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00572      * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00573      * ....
00574      * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00575      * sum +=  x[srcALen-1] * y[srcBLen-1]
00576      */
00577
00578     /* In this stage the MAC operations are decreased by 1 for every iteration.
00579        The count variable holds the number of MAC operations performed */
00580     count = srcBLen - 1u;
00581
00582     /* Working pointer of inputA */
00583     pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00584     px = pSrc1;
00585
00586     /* Working pointer of inputB */
00587     pSrc2 = pIn2 + (srcBLen - 1u);
00588     py = pSrc2;
00589
00590     /* -------------------
00591      * Stage3 process
00592      * ------------------*/
00593
00594     while(blockSize3 > 0)
00595     {
00596       /* Accumulator is made zero for every iteration */
00597       sum = 0;
00598
00599       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00600       k = count >> 2u;
00601
00602       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00603        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00604       while(k > 0u)
00605       {
00606         /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */
00607         in1 = (q15_t) * px++;
00608         in2 = (q15_t) * px++;
00609         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00610
00611         /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */
00612         in1 = (q15_t) * py--;
00613         in2 = (q15_t) * py--;
00614         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00615
00616         /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
00617         /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
00618         sum = __SMLAD(input1, input2, sum);
00619
00620         /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */
00621         in1 = (q15_t) * px++;
00622         in2 = (q15_t) * px++;
00623         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00624
00625         /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */
00626         in1 = (q15_t) * py--;
00627         in2 = (q15_t) * py--;
00628         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00629
00630         /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
00631         /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
00632         sum = __SMLAD(input1, input2, sum);
00633
00634         /* Decrement the loop counter */
00635         k--;
00636       }
00637
00638       /* If the count is not a multiple of 4, compute any remaining MACs here.
00639        ** No loop unrolling is used. */
00640       k = count % 0x4u;
00641
00642       while(k > 0u)
00643       {
00644         /* Perform the multiply-accumulates */
00645         /* sum +=  x[srcALen-1] * y[srcBLen-1] */
00646         sum += ((q31_t) * px++ * *py--);
00647
00648         /* Decrement the loop counter */
00649         k--;
00650       }
00651
00652       /* Store the result in the accumulator in the destination buffer. */
00653       *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
00654
00655       /* Update the inputA and inputB pointers for next MAC calculation */
00656       px = ++pSrc1;
00657       py = pSrc2;
00658
00659       /* Decrement the MAC count */
00660       count--;
00661
00662       /* Decrement the loop counter */
00663       blockSize3--;
00664
00665     }
00666
00667     /* set status as ARM_MATH_SUCCESS */
00668     status = ARM_MATH_SUCCESS;
00669   }
00670
00671   /* Return to application */
00672   return (status);
00673
00674 #else
00675
00676   /* Run the below code for Cortex-M0 */
00677
00678   q7_t *pIn1 = pSrcA;                            /* inputA pointer */
00679   q7_t *pIn2 = pSrcB;                            /* inputB pointer */
00680   q31_t sum;                                     /* Accumulator */
00681   uint32_t i, j;                                 /* loop counters */
00682   arm_status status;                             /* status of Partial convolution */
00683
00684   /* Check for range of output samples to be calculated */
00685   if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
00686   {
00687     /* Set status as ARM_ARGUMENT_ERROR */
00688     status = ARM_MATH_ARGUMENT_ERROR;
00689   }
00690   else
00691   {
00692     /* Loop to calculate convolution for output length number of values */
00693     for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
00694     {
00695       /* Initialize sum with zero to carry on MAC operations */
00696       sum = 0;
00697
00698       /* Loop to perform MAC operations according to convolution equation */
00699       for (j = 0; j <= i; j++)
00700       {
00701         /* Check the array limitations */
00702         if(((i - j) < srcBLen) && (j < srcALen))
00703         {
00704           /* z[i] += x[i-j] * y[j] */
00705           sum += ((q15_t) pIn1[j] * (pIn2[i - j]));
00706         }
00707       }
00708
00709       /* Store the output in the destination buffer */
00710       pDst[i] = (q7_t) __SSAT((sum >> 7u), 8u);
00711     }
00712     /* set status as ARM_SUCCESS as there are no argument errors */
00713     status = ARM_MATH_SUCCESS;
00714   }
00715   return (status);
00716
00717 #endif /*  #ifndef ARM_MATH_CM0 */
00718
00719 }
00720
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c
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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_conv_partial_q15.c
00009 *
00010 * Description:  Partial convolution of Q15 sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00060 arm_status arm_conv_partial_q15(
00061   q15_t * pSrcA,
00062   uint32_t srcALen,
00063   q15_t * pSrcB,
00064   uint32_t srcBLen,
00065   q15_t * pDst,
00066   uint32_t firstIndex,
00067   uint32_t numPoints)
00068 {
00069
00070
00071 #ifndef ARM_MATH_CM0
00072
00073   /* Run the below code for Cortex-M4 and Cortex-M3 */
00074
00075   q15_t *pIn1;                                   /* inputA pointer               */
00076   q15_t *pIn2;                                   /* inputB pointer               */
00077   q15_t *pOut = pDst;                            /* output pointer               */
00078   q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulator                  */
00079   q15_t *px;                                     /* Intermediate inputA pointer  */
00080   q15_t *py;                                     /* Intermediate inputB pointer  */
00081   q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
00082   q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables */
00083   uint32_t j, k, count, check, blkCnt;
00084   int32_t blockSize1, blockSize2, blockSize3;    /* loop counter                 */
00085   arm_status status;                             /* status of Partial convolution */
00086   q31_t *pb;                                     /* 32 bit pointer for inputB buffer */
00087
00088   /* Check for range of output samples to be calculated */
00089   if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
00090   {
00091     /* Set status as ARM_MATH_ARGUMENT_ERROR */
00092     status = ARM_MATH_ARGUMENT_ERROR;
00093   }
00094   else
00095   {
00096
00097     /* The algorithm implementation is based on the lengths of the inputs. */
00098     /* srcB is always made to slide across srcA. */
00099     /* So srcBLen is always considered as shorter or equal to srcALen */
00100     if(srcALen >= srcBLen)
00101     {
00102       /* Initialization of inputA pointer */
00103       pIn1 = pSrcA;
00104
00105       /* Initialization of inputB pointer */
00106       pIn2 = pSrcB;
00107     }
00108     else
00109     {
00110       /* Initialization of inputA pointer */
00111       pIn1 = pSrcB;
00112
00113       /* Initialization of inputB pointer */
00114       pIn2 = pSrcA;
00115
00116       /* srcBLen is always considered as shorter or equal to srcALen */
00117       j = srcBLen;
00118       srcBLen = srcALen;
00119       srcALen = j;
00120     }
00121
00122     /* Conditions to check which loopCounter holds
00123      * the first and last indices of the output samples to be calculated. */
00124     check = firstIndex + numPoints;
00125     blockSize3 = ((int32_t) check - (int32_t) srcALen);
00126     blockSize3 = (blockSize3 > 0) ? blockSize3 : 0;
00127     blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
00128     blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
00129                                      (int32_t) numPoints) : 0;
00130     blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
00131                                     (int32_t) firstIndex);
00132     blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
00133
00134     /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00135     /* The function is internally
00136      * divided into three stages according to the number of multiplications that has to be
00137      * taken place between inputA samples and inputB samples. In the first stage of the
00138      * algorithm, the multiplications increase by one for every iteration.
00139      * In the second stage of the algorithm, srcBLen number of multiplications are done.
00140      * In the third stage of the algorithm, the multiplications decrease by one
00141      * for every iteration. */
00142
00143     /* Set the output pointer to point to the firstIndex
00144      * of the output sample to be calculated. */
00145     pOut = pDst + firstIndex;
00146
00147     /* --------------------------
00148      * Initializations of stage1
00149      * -------------------------*/
00150
00151     /* sum = x[0] * y[0]
00152      * sum = x[0] * y[1] + x[1] * y[0]
00153      * ....
00154      * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00155      */
00156
00157     /* In this stage the MAC operations are increased by 1 for every iteration.
00158        The count variable holds the number of MAC operations performed.
00159        Since the partial convolution starts from firstIndex
00160        Number of Macs to be performed is firstIndex + 1 */
00161     count = 1u + firstIndex;
00162
00163     /* Working pointer of inputA */
00164     px = pIn1;
00165
00166     /* Working pointer of inputB */
00167     pSrc2 = pIn2 + firstIndex;
00168     py = pSrc2;
00169
00170     /* ------------------------
00171      * Stage1 process
00172      * ----------------------*/
00173
00174     /* For loop unrolling by 4, this stage is divided into two. */
00175     /* First part of this stage computes the MAC operations less than 4 */
00176     /* Second part of this stage computes the MAC operations greater than or equal to 4 */
00177
00178     /* The first part of the stage starts here */
00179     while((count < 4u) && (blockSize1 > 0))
00180     {
00181       /* Accumulator is made zero for every iteration */
00182       sum = 0;
00183
00184       /* Loop over number of MAC operations between
00185        * inputA samples and inputB samples */
00186       k = count;
00187
00188       while(k > 0u)
00189       {
00190         /* Perform the multiply-accumulates */
00191         sum = __SMLALD(*px++, *py--, sum);
00192
00193         /* Decrement the loop counter */
00194         k--;
00195       }
00196
00197       /* Store the result in the accumulator in the destination buffer. */
00198       *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
00199
00200       /* Update the inputA and inputB pointers for next MAC calculation */
00201       py = ++pSrc2;
00202       px = pIn1;
00203
00204       /* Increment the MAC count */
00205       count++;
00206
00207       /* Decrement the loop counter */
00208       blockSize1--;
00209     }
00210
00211     /* The second part of the stage starts here */
00212     /* The internal loop, over count, is unrolled by 4 */
00213     /* To, read the last two inputB samples using SIMD:
00214      * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
00215     py = py - 1;
00216
00217     while(blockSize1 > 0)
00218     {
00219       /* Accumulator is made zero for every iteration */
00220       sum = 0;
00221
00222       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00223       k = count >> 2u;
00224
00225       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00226        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00227       while(k > 0u)
00228       {
00229         /* Perform the multiply-accumulates */
00230         /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
00231         sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00232         /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
00233         sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00234
00235         /* Decrement the loop counter */
00236         k--;
00237       }
00238
00239       /* For the next MAC operations, the pointer py is used without SIMD
00240        * So, py is incremented by 1 */
00241       py = py + 1u;
00242
00243       /* If the count is not a multiple of 4, compute any remaining MACs here.
00244        ** No loop unrolling is used. */
00245       k = count % 0x4u;
00246
00247       while(k > 0u)
00248       {
00249         /* Perform the multiply-accumulates */
00250         sum = __SMLALD(*px++, *py--, sum);
00251
00252         /* Decrement the loop counter */
00253         k--;
00254       }
00255
00256       /* Store the result in the accumulator in the destination buffer. */
00257       *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
00258
00259       /* Update the inputA and inputB pointers for next MAC calculation */
00260       py = ++pSrc2 - 1u;
00261       px = pIn1;
00262
00263       /* Increment the MAC count */
00264       count++;
00265
00266       /* Decrement the loop counter */
00267       blockSize1--;
00268     }
00269
00270     /* --------------------------
00271      * Initializations of stage2
00272      * ------------------------*/
00273
00274     /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00275      * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00276      * ....
00277      * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00278      */
00279
00280     /* Working pointer of inputA */
00281     px = pIn1;
00282
00283     /* Working pointer of inputB */
00284     pSrc2 = pIn2 + (srcBLen - 1u);
00285     py = pSrc2;
00286
00287     /* Initialize inputB pointer of type q31 */
00288     pb = (q31_t *) (py - 1u);
00289
00290     /* count is the index by which the pointer pIn1 to be incremented */
00291     count = 1u;
00292
00293
00294     /* --------------------
00295      * Stage2 process
00296      * -------------------*/
00297
00298     /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00299      * So, to loop unroll over blockSize2,
00300      * srcBLen should be greater than or equal to 4 */
00301     if(srcBLen >= 4u)
00302     {
00303       /* Loop unroll over blockSize2, by 4 */
00304       blkCnt = ((uint32_t) blockSize2 >> 2u);
00305
00306       while(blkCnt > 0u)
00307       {
00308         /* Set all accumulators to zero */
00309         acc0 = 0;
00310         acc1 = 0;
00311         acc2 = 0;
00312         acc3 = 0;
00313
00314
00315         /* read x[0], x[1] samples */
00316         x0 = *(q31_t *) (px++);
00317         /* read x[1], x[2] samples */
00318         x1 = *(q31_t *) (px++);
00319
00320
00321         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00322         k = srcBLen >> 2u;
00323
00324         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00325          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00326         do
00327         {
00328           /* Read the last two inputB samples using SIMD:
00329            * y[srcBLen - 1] and y[srcBLen - 2] */
00330           c0 = *(pb--);
00331
00332           /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
00333           acc0 = __SMLALDX(x0, c0, acc0);
00334
00335           /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
00336           acc1 = __SMLALDX(x1, c0, acc1);
00337
00338           /* Read x[2], x[3] */
00339           x2 = *(q31_t *) (px++);
00340
00341           /* Read x[3], x[4] */
00342           x3 = *(q31_t *) (px++);
00343
00344           /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
00345           acc2 = __SMLALDX(x2, c0, acc2);
00346
00347           /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
00348           acc3 = __SMLALDX(x3, c0, acc3);
00349
00350           /* Read y[srcBLen - 3] and y[srcBLen - 4] */
00351           c0 = *(pb--);
00352
00353           /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
00354           acc0 = __SMLALDX(x2, c0, acc0);
00355
00356           /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
00357           acc1 = __SMLALDX(x3, c0, acc1);
00358
00359           /* Read x[4], x[5] */
00360           x0 = *(q31_t *) (px++);
00361
00362           /* Read x[5], x[6] */
00363           x1 = *(q31_t *) (px++);
00364
00365           /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
00366           acc2 = __SMLALDX(x0, c0, acc2);
00367
00368           /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
00369           acc3 = __SMLALDX(x1, c0, acc3);
00370
00371         } while(--k);
00372
00373         /* For the next MAC operations, SIMD is not used
00374          * So, the 16 bit pointer if inputB, py is updated */
00375         py = (q15_t *) pb;
00376         py = py + 1;
00377
00378         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00379          ** No loop unrolling is used. */
00380         k = srcBLen % 0x4u;
00381
00382         if(k == 1u)
00383         {
00384           /* Read y[srcBLen - 5] */
00385           c0 = *(py);
00386
00387 #ifdef  ARM_MATH_BIG_ENDIAN
00388
00389           c0 = c0 << 16u;
00390
00391 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00392           /* Read x[7] */
00393           x3 = *(q31_t *) px++;
00394
00395           /* Perform the multiply-accumulates */
00396           acc0 = __SMLALD(x0, c0, acc0);
00397           acc1 = __SMLALD(x1, c0, acc1);
00398           acc2 = __SMLALDX(x1, c0, acc2);
00399           acc3 = __SMLALDX(x3, c0, acc3);
00400         }
00401
00402         if(k == 2u)
00403         {
00404           /* Read y[srcBLen - 5], y[srcBLen - 6] */
00405           c0 = *(pb);
00406
00407           /* Read x[7], x[8] */
00408           x3 = *(q31_t *) px++;
00409
00410           /* Read x[9] */
00411           x2 = *(q31_t *) px++;
00412
00413           /* Perform the multiply-accumulates */
00414           acc0 = __SMLALDX(x0, c0, acc0);
00415           acc1 = __SMLALDX(x1, c0, acc1);
00416           acc2 = __SMLALDX(x3, c0, acc2);
00417           acc3 = __SMLALDX(x2, c0, acc3);
00418         }
00419
00420         if(k == 3u)
00421         {
00422           /* Read y[srcBLen - 5], y[srcBLen - 6] */
00423           c0 = *pb--;
00424
00425           /* Read x[7], x[8] */
00426           x3 = *(q31_t *) px++;
00427
00428           /* Read x[9] */
00429           x2 = *(q31_t *) px++;
00430
00431           /* Perform the multiply-accumulates */
00432           acc0 = __SMLALDX(x0, c0, acc0);
00433           acc1 = __SMLALDX(x1, c0, acc1);
00434           acc2 = __SMLALDX(x3, c0, acc2);
00435           acc3 = __SMLALDX(x2, c0, acc3);
00436
00437 #ifdef  ARM_MATH_BIG_ENDIAN
00438
00439           /* Read y[srcBLen - 7] */
00440           c0 = (*pb);
00441           c0 = (c0) << 16;
00442
00443 #else
00444
00445           /* Read y[srcBLen - 7] */
00446           c0 = (q15_t) (*pb >> 16);
00447
00448 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00449
00450           /* Read x[10] */
00451           x3 = *(q31_t *) px++;
00452
00453           /* Perform the multiply-accumulates */
00454           acc0 = __SMLALDX(x1, c0, acc0);
00455           acc1 = __SMLALD(x2, c0, acc1);
00456           acc2 = __SMLALDX(x2, c0, acc2);
00457           acc3 = __SMLALDX(x3, c0, acc3);
00458         }
00459
00460         /* Store the results in the accumulators in the destination buffer. */
00461 #ifndef  ARM_MATH_BIG_ENDIAN
00462
00463         *__SIMD32(pOut)++ =
00464           __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
00465         *__SIMD32(pOut)++ =
00466           __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
00467
00468 #else
00469
00470         *__SIMD32(pOut)++ =
00471           __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
00472         *__SIMD32(pOut)++ =
00473           __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
00474
00475 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00476
00477         /* Update the inputA and inputB pointers for next MAC calculation */
00478         px = pIn1 + (count * 4u);
00479         py = pSrc2;
00480         pb = (q31_t *) (py - 1);
00481
00482         /* Increment the pointer pIn1 index, count by 1 */
00483         count++;
00484
00485         /* Decrement the loop counter */
00486         blkCnt--;
00487       }
00488
00489       /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00490        ** No loop unrolling is used. */
00491       blkCnt = (uint32_t) blockSize2 % 0x4u;
00492
00493       while(blkCnt > 0u)
00494       {
00495         /* Accumulator is made zero for every iteration */
00496         sum = 0;
00497
00498         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00499         k = srcBLen >> 2u;
00500
00501         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00502          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00503         while(k > 0u)
00504         {
00505           /* Perform the multiply-accumulates */
00506           sum += (q63_t) ((q31_t) * px++ * *py--);
00507           sum += (q63_t) ((q31_t) * px++ * *py--);
00508           sum += (q63_t) ((q31_t) * px++ * *py--);
00509           sum += (q63_t) ((q31_t) * px++ * *py--);
00510
00511           /* Decrement the loop counter */
00512           k--;
00513         }
00514
00515         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00516          ** No loop unrolling is used. */
00517         k = srcBLen % 0x4u;
00518
00519         while(k > 0u)
00520         {
00521           /* Perform the multiply-accumulates */
00522           sum += (q63_t) ((q31_t) * px++ * *py--);
00523
00524           /* Decrement the loop counter */
00525           k--;
00526         }
00527
00528         /* Store the result in the accumulator in the destination buffer. */
00529         *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
00530
00531         /* Update the inputA and inputB pointers for next MAC calculation */
00532         px = pIn1 + count;
00533         py = pSrc2;
00534
00535         /* Increment the pointer pIn1 index, count by 1 */
00536         count++;
00537
00538         /* Decrement the loop counter */
00539         blkCnt--;
00540       }
00541     }
00542     else
00543     {
00544       /* If the srcBLen is not a multiple of 4,
00545        * the blockSize2 loop cannot be unrolled by 4 */
00546       blkCnt = (uint32_t) blockSize2;
00547
00548       while(blkCnt > 0u)
00549       {
00550         /* Accumulator is made zero for every iteration */
00551         sum = 0;
00552
00553         /* srcBLen number of MACS should be performed */
00554         k = srcBLen;
00555
00556         while(k > 0u)
00557         {
00558           /* Perform the multiply-accumulate */
00559           sum += (q63_t) ((q31_t) * px++ * *py--);
00560
00561           /* Decrement the loop counter */
00562           k--;
00563         }
00564
00565         /* Store the result in the accumulator in the destination buffer. */
00566         *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
00567
00568         /* Update the inputA and inputB pointers for next MAC calculation */
00569         px = pIn1 + count;
00570         py = pSrc2;
00571
00572         /* Increment the MAC count */
00573         count++;
00574
00575         /* Decrement the loop counter */
00576         blkCnt--;
00577       }
00578     }
00579
00580
00581     /* --------------------------
00582      * Initializations of stage3
00583      * -------------------------*/
00584
00585     /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00586      * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00587      * ....
00588      * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00589      * sum +=  x[srcALen-1] * y[srcBLen-1]
00590      */
00591
00592     /* In this stage the MAC operations are decreased by 1 for every iteration.
00593        The count variable holds the number of MAC operations performed */
00594     count = srcBLen - 1u;
00595
00596     /* Working pointer of inputA */
00597     pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00598     px = pSrc1;
00599
00600     /* Working pointer of inputB */
00601     pSrc2 = pIn2 + (srcBLen - 1u);
00602     pIn2 = pSrc2 - 1u;
00603     py = pIn2;
00604
00605     /* -------------------
00606      * Stage3 process
00607      * ------------------*/
00608
00609     /* For loop unrolling by 4, this stage is divided into two. */
00610     /* First part of this stage computes the MAC operations greater than 4 */
00611     /* Second part of this stage computes the MAC operations less than or equal to 4 */
00612
00613     /* The first part of the stage starts here */
00614     j = count >> 2u;
00615
00616     while((j > 0u) && (blockSize3 > 0))
00617     {
00618       /* Accumulator is made zero for every iteration */
00619       sum = 0;
00620
00621       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00622       k = count >> 2u;
00623
00624       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00625        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00626       while(k > 0u)
00627       {
00628         /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
00629          * with y[srcBLen - 1], y[srcBLen - 2] respectively */
00630         sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00631         /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
00632          * with y[srcBLen - 3], y[srcBLen - 4] respectively */
00633         sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00634
00635         /* Decrement the loop counter */
00636         k--;
00637       }
00638
00639       /* For the next MAC operations, the pointer py is used without SIMD
00640        * So, py is incremented by 1 */
00641       py = py + 1u;
00642
00643       /* If the count is not a multiple of 4, compute any remaining MACs here.
00644        ** No loop unrolling is used. */
00645       k = count % 0x4u;
00646
00647       while(k > 0u)
00648       {
00649         /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
00650         sum = __SMLALD(*px++, *py--, sum);
00651
00652         /* Decrement the loop counter */
00653         k--;
00654       }
00655
00656       /* Store the result in the accumulator in the destination buffer. */
00657       *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
00658
00659       /* Update the inputA and inputB pointers for next MAC calculation */
00660       px = ++pSrc1;
00661       py = pIn2;
00662
00663       /* Decrement the MAC count */
00664       count--;
00665
00666       /* Decrement the loop counter */
00667       blockSize3--;
00668
00669       j--;
00670     }
00671
00672     /* The second part of the stage starts here */
00673     /* SIMD is not used for the next MAC operations,
00674      * so pointer py is updated to read only one sample at a time */
00675     py = py + 1u;
00676
00677     while(blockSize3 > 0)
00678     {
00679       /* Accumulator is made zero for every iteration */
00680       sum = 0;
00681
00682       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00683       k = count;
00684
00685       while(k > 0u)
00686       {
00687         /* Perform the multiply-accumulates */
00688         /* sum +=  x[srcALen-1] * y[srcBLen-1] */
00689         sum = __SMLALD(*px++, *py--, sum);
00690
00691         /* Decrement the loop counter */
00692         k--;
00693       }
00694
00695       /* Store the result in the accumulator in the destination buffer. */
00696       *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
00697
00698       /* Update the inputA and inputB pointers for next MAC calculation */
00699       px = ++pSrc1;
00700       py = pSrc2;
00701
00702       /* Decrement the MAC count */
00703       count--;
00704
00705       /* Decrement the loop counter */
00706       blockSize3--;
00707     }
00708
00709     /* set status as ARM_MATH_SUCCESS */
00710     status = ARM_MATH_SUCCESS;
00711   }
00712
00713   /* Return to application */
00714   return (status);
00715
00716 #else
00717
00718   /* Run the below code for Cortex-M0 */
00719
00720   q15_t *pIn1 = pSrcA;                           /* inputA pointer */
00721   q15_t *pIn2 = pSrcB;                           /* inputB pointer */
00722   q63_t sum;                                     /* Accumulator */
00723   uint32_t i, j;                                 /* loop counters */
00724   arm_status status;                             /* status of Partial convolution */
00725
00726   /* Check for range of output samples to be calculated */
00727   if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
00728   {
00729     /* Set status as ARM_ARGUMENT_ERROR */
00730     status = ARM_MATH_ARGUMENT_ERROR;
00731   }
00732   else
00733   {
00734     /* Loop to calculate convolution for output length number of values */
00735     for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
00736     {
00737       /* Initialize sum with zero to carry on MAC operations */
00738       sum = 0;
00739
00740       /* Loop to perform MAC operations according to convolution equation */
00741       for (j = 0; j <= i; j++)
00742       {
00743         /* Check the array limitations */
00744         if(((i - j) < srcBLen) && (j < srcALen))
00745         {
00746           /* z[i] += x[i-j] * y[j] */
00747           sum += ((q31_t) pIn1[j] * (pIn2[i - j]));
00748         }
00749       }
00750
00751       /* Store the output in the destination buffer */
00752       pDst[i] = (q15_t) __SSAT((sum >> 15u), 16u);
00753     }
00754     /* set status as ARM_SUCCESS as there are no argument errors */
00755     status = ARM_MATH_SUCCESS;
00756   }
00757   return (status);
00758
00759 #endif /*     #ifndef ARM_MATH_CM0      */
00760
00761 }
00762
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_conv_partial_q31.c
00009 *
00010 * Description:  Partial convolution of Q31 sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00059 arm_status arm_conv_partial_q31(
00060   q31_t * pSrcA,
00061   uint32_t srcALen,
00062   q31_t * pSrcB,
00063   uint32_t srcBLen,
00064   q31_t * pDst,
00065   uint32_t firstIndex,
00066   uint32_t numPoints)
00067 {
00068
00069
00070 #ifndef ARM_MATH_CM0
00071
00072   /* Run the below code for Cortex-M4 and Cortex-M3 */
00073
00074   q31_t *pIn1;                                   /* inputA pointer               */
00075   q31_t *pIn2;                                   /* inputB pointer               */
00076   q31_t *pOut = pDst;                            /* output pointer               */
00077   q31_t *px;                                     /* Intermediate inputA pointer  */
00078   q31_t *py;                                     /* Intermediate inputB pointer  */
00079   q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
00080   q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulator                  */
00081   q31_t x0, x1, x2, x3, c0;
00082   uint32_t j, k, count, check, blkCnt;
00083   int32_t blockSize1, blockSize2, blockSize3;    /* loop counter                 */
00084   arm_status status;                             /* status of Partial convolution */
00085
00086
00087   /* Check for range of output samples to be calculated */
00088   if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
00089   {
00090     /* Set status as ARM_MATH_ARGUMENT_ERROR */
00091     status = ARM_MATH_ARGUMENT_ERROR;
00092   }
00093   else
00094   {
00095
00096     /* The algorithm implementation is based on the lengths of the inputs. */
00097     /* srcB is always made to slide across srcA. */
00098     /* So srcBLen is always considered as shorter or equal to srcALen */
00099     if(srcALen >= srcBLen)
00100     {
00101       /* Initialization of inputA pointer */
00102       pIn1 = pSrcA;
00103
00104       /* Initialization of inputB pointer */
00105       pIn2 = pSrcB;
00106     }
00107     else
00108     {
00109       /* Initialization of inputA pointer */
00110       pIn1 = pSrcB;
00111
00112       /* Initialization of inputB pointer */
00113       pIn2 = pSrcA;
00114
00115       /* srcBLen is always considered as shorter or equal to srcALen */
00116       j = srcBLen;
00117       srcBLen = srcALen;
00118       srcALen = j;
00119     }
00120
00121     /* Conditions to check which loopCounter holds
00122      * the first and last indices of the output samples to be calculated. */
00123     check = firstIndex + numPoints;
00124     blockSize3 = ((int32_t) check - (int32_t) srcALen);
00125     blockSize3 = (blockSize3 > 0) ? blockSize3 : 0;
00126     blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
00127     blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
00128                                      (int32_t) numPoints) : 0;
00129     blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
00130                                     (int32_t) firstIndex);
00131     blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
00132
00133     /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00134     /* The function is internally
00135      * divided into three stages according to the number of multiplications that has to be
00136      * taken place between inputA samples and inputB samples. In the first stage of the
00137      * algorithm, the multiplications increase by one for every iteration.
00138      * In the second stage of the algorithm, srcBLen number of multiplications are done.
00139      * In the third stage of the algorithm, the multiplications decrease by one
00140      * for every iteration. */
00141
00142     /* Set the output pointer to point to the firstIndex
00143      * of the output sample to be calculated. */
00144     pOut = pDst + firstIndex;
00145
00146     /* --------------------------
00147      * Initializations of stage1
00148      * -------------------------*/
00149
00150     /* sum = x[0] * y[0]
00151      * sum = x[0] * y[1] + x[1] * y[0]
00152      * ....
00153      * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00154      */
00155
00156     /* In this stage the MAC operations are increased by 1 for every iteration.
00157        The count variable holds the number of MAC operations performed.
00158        Since the partial convolution starts from firstIndex
00159        Number of Macs to be performed is firstIndex + 1 */
00160     count = 1u + firstIndex;
00161
00162     /* Working pointer of inputA */
00163     px = pIn1;
00164
00165     /* Working pointer of inputB */
00166     pSrc2 = pIn2 + firstIndex;
00167     py = pSrc2;
00168
00169     /* ------------------------
00170      * Stage1 process
00171      * ----------------------*/
00172
00173     /* The first loop starts here */
00174     while(blockSize1 > 0)
00175     {
00176       /* Accumulator is made zero for every iteration */
00177       sum = 0;
00178
00179       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00180       k = count >> 2u;
00181
00182       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00183        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00184       while(k > 0u)
00185       {
00186         /* x[0] * y[srcBLen - 1] */
00187         sum += (q63_t) * px++ * (*py--);
00188         /* x[1] * y[srcBLen - 2] */
00189         sum += (q63_t) * px++ * (*py--);
00190         /* x[2] * y[srcBLen - 3] */
00191         sum += (q63_t) * px++ * (*py--);
00192         /* x[3] * y[srcBLen - 4] */
00193         sum += (q63_t) * px++ * (*py--);
00194
00195         /* Decrement the loop counter */
00196         k--;
00197       }
00198
00199       /* If the count is not a multiple of 4, compute any remaining MACs here.
00200        ** No loop unrolling is used. */
00201       k = count % 0x4u;
00202
00203       while(k > 0u)
00204       {
00205         /* Perform the multiply-accumulate */
00206         sum += (q63_t) * px++ * (*py--);
00207
00208         /* Decrement the loop counter */
00209         k--;
00210       }
00211
00212       /* Store the result in the accumulator in the destination buffer. */
00213       *pOut++ = (q31_t) (sum >> 31);
00214
00215       /* Update the inputA and inputB pointers for next MAC calculation */
00216       py = ++pSrc2;
00217       px = pIn1;
00218
00219       /* Increment the MAC count */
00220       count++;
00221
00222       /* Decrement the loop counter */
00223       blockSize1--;
00224     }
00225
00226     /* --------------------------
00227      * Initializations of stage2
00228      * ------------------------*/
00229
00230     /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00231      * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00232      * ....
00233      * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00234      */
00235
00236     /* Working pointer of inputA */
00237     px = pIn1;
00238
00239     /* Working pointer of inputB */
00240     pSrc2 = pIn2 + (srcBLen - 1u);
00241     py = pSrc2;
00242
00243     /* count is index by which the pointer pIn1 to be incremented */
00244     count = 1u;
00245
00246     /* -------------------
00247      * Stage2 process
00248      * ------------------*/
00249
00250     /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00251      * So, to loop unroll over blockSize2,
00252      * srcBLen should be greater than or equal to 4 */
00253     if(srcBLen >= 4u)
00254     {
00255       /* Loop unroll over blockSize2 */
00256       blkCnt = ((uint32_t) blockSize2 >> 2u);
00257
00258       while(blkCnt > 0u)
00259       {
00260         /* Set all accumulators to zero */
00261         acc0 = 0;
00262         acc1 = 0;
00263         acc2 = 0;
00264         acc3 = 0;
00265
00266         /* read x[0], x[1], x[2] samples */
00267         x0 = *(px++);
00268         x1 = *(px++);
00269         x2 = *(px++);
00270
00271         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00272         k = srcBLen >> 2u;
00273
00274         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00275          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00276         do
00277         {
00278           /* Read y[srcBLen - 1] sample */
00279           c0 = *(py--);
00280
00281           /* Read x[3] sample */
00282           x3 = *(px++);
00283
00284           /* Perform the multiply-accumulates */
00285           /* acc0 +=  x[0] * y[srcBLen - 1] */
00286           acc0 += (q63_t) x0 *c0;
00287           /* acc1 +=  x[1] * y[srcBLen - 1] */
00288           acc1 += (q63_t) x1 *c0;
00289           /* acc2 +=  x[2] * y[srcBLen - 1] */
00290           acc2 += (q63_t) x2 *c0;
00291           /* acc3 +=  x[3] * y[srcBLen - 1] */
00292           acc3 += (q63_t) x3 *c0;
00293
00294           /* Read y[srcBLen - 2] sample */
00295           c0 = *(py--);
00296
00297           /* Read x[4] sample */
00298           x0 = *(px++);
00299
00300           /* Perform the multiply-accumulate */
00301           /* acc0 +=  x[1] * y[srcBLen - 2] */
00302           acc0 += (q63_t) x1 *c0;
00303           /* acc1 +=  x[2] * y[srcBLen - 2] */
00304           acc1 += (q63_t) x2 *c0;
00305           /* acc2 +=  x[3] * y[srcBLen - 2] */
00306           acc2 += (q63_t) x3 *c0;
00307           /* acc3 +=  x[4] * y[srcBLen - 2] */
00308           acc3 += (q63_t) x0 *c0;
00309
00310           /* Read y[srcBLen - 3] sample */
00311           c0 = *(py--);
00312
00313           /* Read x[5] sample */
00314           x1 = *(px++);
00315
00316           /* Perform the multiply-accumulates */
00317           /* acc0 +=  x[2] * y[srcBLen - 3] */
00318           acc0 += (q63_t) x2 *c0;
00319           /* acc1 +=  x[3] * y[srcBLen - 2] */
00320           acc1 += (q63_t) x3 *c0;
00321           /* acc2 +=  x[4] * y[srcBLen - 2] */
00322           acc2 += (q63_t) x0 *c0;
00323           /* acc3 +=  x[5] * y[srcBLen - 2] */
00324           acc3 += (q63_t) x1 *c0;
00325
00326           /* Read y[srcBLen - 4] sample */
00327           c0 = *(py--);
00328
00329           /* Read x[6] sample */
00330           x2 = *(px++);
00331
00332           /* Perform the multiply-accumulates */
00333           /* acc0 +=  x[3] * y[srcBLen - 4] */
00334           acc0 += (q63_t) x3 *c0;
00335           /* acc1 +=  x[4] * y[srcBLen - 4] */
00336           acc1 += (q63_t) x0 *c0;
00337           /* acc2 +=  x[5] * y[srcBLen - 4] */
00338           acc2 += (q63_t) x1 *c0;
00339           /* acc3 +=  x[6] * y[srcBLen - 4] */
00340           acc3 += (q63_t) x2 *c0;
00341
00342         } while(--k);
00343
00344         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00345          ** No loop unrolling is used. */
00346         k = srcBLen % 0x4u;
00347
00348         while(k > 0u)
00349         {
00350           /* Read y[srcBLen - 5] sample */
00351           c0 = *(py--);
00352
00353           /* Read x[7] sample */
00354           x3 = *(px++);
00355
00356           /* Perform the multiply-accumulates */
00357           /* acc0 +=  x[4] * y[srcBLen - 5] */
00358           acc0 += (q63_t) x0 *c0;
00359           /* acc1 +=  x[5] * y[srcBLen - 5] */
00360           acc1 += (q63_t) x1 *c0;
00361           /* acc2 +=  x[6] * y[srcBLen - 5] */
00362           acc2 += (q63_t) x2 *c0;
00363           /* acc3 +=  x[7] * y[srcBLen - 5] */
00364           acc3 += (q63_t) x3 *c0;
00365
00366           /* Reuse the present samples for the next MAC */
00367           x0 = x1;
00368           x1 = x2;
00369           x2 = x3;
00370
00371           /* Decrement the loop counter */
00372           k--;
00373         }
00374
00375         /* Store the result in the accumulator in the destination buffer. */
00376         *pOut++ = (q31_t) (acc0 >> 31);
00377         *pOut++ = (q31_t) (acc1 >> 31);
00378         *pOut++ = (q31_t) (acc2 >> 31);
00379         *pOut++ = (q31_t) (acc3 >> 31);
00380
00381         /* Update the inputA and inputB pointers for next MAC calculation */
00382         px = pIn1 + (count * 4u);
00383         py = pSrc2;
00384
00385         /* Increment the pointer pIn1 index, count by 1 */
00386         count++;
00387
00388         /* Decrement the loop counter */
00389         blkCnt--;
00390       }
00391
00392       /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00393        ** No loop unrolling is used. */
00394       blkCnt = (uint32_t) blockSize2 % 0x4u;
00395
00396       while(blkCnt > 0u)
00397       {
00398         /* Accumulator is made zero for every iteration */
00399         sum = 0;
00400
00401         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00402         k = srcBLen >> 2u;
00403
00404         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00405          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00406         while(k > 0u)
00407         {
00408           /* Perform the multiply-accumulates */
00409           sum += (q63_t) * px++ * (*py--);
00410           sum += (q63_t) * px++ * (*py--);
00411           sum += (q63_t) * px++ * (*py--);
00412           sum += (q63_t) * px++ * (*py--);
00413
00414           /* Decrement the loop counter */
00415           k--;
00416         }
00417
00418         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00419          ** No loop unrolling is used. */
00420         k = srcBLen % 0x4u;
00421
00422         while(k > 0u)
00423         {
00424           /* Perform the multiply-accumulate */
00425           sum += (q63_t) * px++ * (*py--);
00426
00427           /* Decrement the loop counter */
00428           k--;
00429         }
00430
00431         /* Store the result in the accumulator in the destination buffer. */
00432         *pOut++ = (q31_t) (sum >> 31);
00433
00434         /* Update the inputA and inputB pointers for next MAC calculation */
00435         px = pIn1 + count;
00436         py = pSrc2;
00437
00438         /* Increment the MAC count */
00439         count++;
00440
00441         /* Decrement the loop counter */
00442         blkCnt--;
00443       }
00444     }
00445     else
00446     {
00447       /* If the srcBLen is not a multiple of 4,
00448        * the blockSize2 loop cannot be unrolled by 4 */
00449       blkCnt = (uint32_t) blockSize2;
00450
00451       while(blkCnt > 0u)
00452       {
00453         /* Accumulator is made zero for every iteration */
00454         sum = 0;
00455
00456         /* srcBLen number of MACS should be performed */
00457         k = srcBLen;
00458
00459         while(k > 0u)
00460         {
00461           /* Perform the multiply-accumulate */
00462           sum += (q63_t) * px++ * (*py--);
00463
00464           /* Decrement the loop counter */
00465           k--;
00466         }
00467
00468         /* Store the result in the accumulator in the destination buffer. */
00469         *pOut++ = (q31_t) (sum >> 31);
00470
00471         /* Update the inputA and inputB pointers for next MAC calculation */
00472         px = pIn1 + count;
00473         py = pSrc2;
00474
00475         /* Increment the MAC count */
00476         count++;
00477
00478         /* Decrement the loop counter */
00479         blkCnt--;
00480       }
00481     }
00482
00483
00484     /* --------------------------
00485      * Initializations of stage3
00486      * -------------------------*/
00487
00488     /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00489      * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00490      * ....
00491      * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00492      * sum +=  x[srcALen-1] * y[srcBLen-1]
00493      */
00494
00495     /* In this stage the MAC operations are decreased by 1 for every iteration.
00496        The blockSize3 variable holds the number of MAC operations performed */
00497     count = srcBLen - 1u;
00498
00499     /* Working pointer of inputA */
00500     pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00501     px = pSrc1;
00502
00503     /* Working pointer of inputB */
00504     pSrc2 = pIn2 + (srcBLen - 1u);
00505     py = pSrc2;
00506
00507     /* -------------------
00508      * Stage3 process
00509      * ------------------*/
00510
00511     while(blockSize3 > 0)
00512     {
00513       /* Accumulator is made zero for every iteration */
00514       sum = 0;
00515
00516       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00517       k = count >> 2u;
00518
00519       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00520        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00521       while(k > 0u)
00522       {
00523         sum += (q63_t) * px++ * (*py--);
00524         sum += (q63_t) * px++ * (*py--);
00525         sum += (q63_t) * px++ * (*py--);
00526         sum += (q63_t) * px++ * (*py--);
00527
00528         /* Decrement the loop counter */
00529         k--;
00530       }
00531
00532       /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
00533        ** No loop unrolling is used. */
00534       k = count % 0x4u;
00535
00536       while(k > 0u)
00537       {
00538         /* Perform the multiply-accumulate */
00539         sum += (q63_t) * px++ * (*py--);
00540
00541         /* Decrement the loop counter */
00542         k--;
00543       }
00544
00545       /* Store the result in the accumulator in the destination buffer. */
00546       *pOut++ = (q31_t) (sum >> 31);
00547
00548       /* Update the inputA and inputB pointers for next MAC calculation */
00549       px = ++pSrc1;
00550       py = pSrc2;
00551
00552       /* Decrement the MAC count */
00553       count--;
00554
00555       /* Decrement the loop counter */
00556       blockSize3--;
00557
00558     }
00559
00560     /* set status as ARM_MATH_SUCCESS */
00561     status = ARM_MATH_SUCCESS;
00562   }
00563
00564   /* Return to application */
00565   return (status);
00566
00567 #else
00568
00569   /* Run the below code for Cortex-M0 */
00570
00571   q31_t *pIn1 = pSrcA;                           /* inputA pointer */
00572   q31_t *pIn2 = pSrcB;                           /* inputB pointer */
00573   q63_t sum;                                     /* Accumulator */
00574   uint32_t i, j;                                 /* loop counters */
00575   arm_status status;                             /* status of Partial convolution */
00576
00577   /* Check for range of output samples to be calculated */
00578   if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
00579   {
00580     /* Set status as ARM_ARGUMENT_ERROR */
00581     status = ARM_MATH_ARGUMENT_ERROR;
00582   }
00583   else
00584   {
00585     /* Loop to calculate convolution for output length number of values */
00586     for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
00587     {
00588       /* Initialize sum with zero to carry on MAC operations */
00589       sum = 0;
00590
00591       /* Loop to perform MAC operations according to convolution equation */
00592       for (j = 0; j <= i; j++)
00593       {
00594         /* Check the array limitations */
00595         if(((i - j) < srcBLen) && (j < srcALen))
00596         {
00597           /* z[i] += x[i-j] * y[j] */
00598           sum += ((q63_t) pIn1[j] * (pIn2[i - j]));
00599         }
00600       }
00601
00602       /* Store the output in the destination buffer */
00603       pDst[i] = (q31_t) (sum >> 31u);
00604     }
00605     /* set status as ARM_SUCCESS as there are no argument errors */
00606     status = ARM_MATH_SUCCESS;
00607   }
00608   return (status);
00609
00610 #endif /*    #ifndef ARM_MATH_CM0      */
00611
00612 }
00613
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_conv_q7.c
00009 *
00010 * Description:  Convolution of Q7 sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00065 void arm_conv_q7(
00066   q7_t * pSrcA,
00067   uint32_t srcALen,
00068   q7_t * pSrcB,
00069   uint32_t srcBLen,
00070   q7_t * pDst)
00071 {
00072
00073
00074 #ifndef ARM_MATH_CM0
00075
00076   /* Run the below code for Cortex-M4 and Cortex-M3 */
00077
00078   q7_t *pIn1;                                    /* inputA pointer */
00079   q7_t *pIn2;                                    /* inputB pointer */
00080   q7_t *pOut = pDst;                             /* output pointer */
00081   q7_t *px;                                      /* Intermediate inputA pointer */
00082   q7_t *py;                                      /* Intermediate inputB pointer */
00083   q7_t *pSrc1, *pSrc2;                           /* Intermediate pointers */
00084   q7_t x0, x1, x2, x3, c0, c1;                   /* Temporary variables to hold state and coefficient values */
00085   q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
00086   q31_t input1, input2;                          /* Temporary input variables */
00087   q15_t in1, in2;                                /* Temporary input variables */
00088   uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counter */
00089
00090
00091   /* The algorithm implementation is based on the lengths of the inputs. */
00092   /* srcB is always made to slide across srcA. */
00093   /* So srcBLen is always considered as shorter or equal to srcALen */
00094   if(srcALen >= srcBLen)
00095   {
00096     /* Initialization of inputA pointer */
00097     pIn1 = pSrcA;
00098
00099     /* Initialization of inputB pointer */
00100     pIn2 = pSrcB;
00101   }
00102   else
00103   {
00104     /* Initialization of inputA pointer */
00105     pIn1 = pSrcB;
00106
00107     /* Initialization of inputB pointer */
00108     pIn2 = pSrcA;
00109
00110     /* srcBLen is always considered as shorter or equal to srcALen */
00111     j = srcBLen;
00112     srcBLen = srcALen;
00113     srcALen = j;
00114   }
00115
00116   /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00117   /* The function is internally
00118    * divided into three stages according to the number of multiplications that has to be
00119    * taken place between inputA samples and inputB samples. In the first stage of the
00120    * algorithm, the multiplications increase by one for every iteration.
00121    * In the second stage of the algorithm, srcBLen number of multiplications are done.
00122    * In the third stage of the algorithm, the multiplications decrease by one
00123    * for every iteration. */
00124
00125   /* The algorithm is implemented in three stages.
00126      The loop counters of each stage is initiated here. */
00127   blockSize1 = srcBLen - 1u;
00128   blockSize2 = (srcALen - srcBLen) + 1u;
00129   blockSize3 = blockSize1;
00130
00131   /* --------------------------
00132    * Initializations of stage1
00133    * -------------------------*/
00134
00135   /* sum = x[0] * y[0]
00136    * sum = x[0] * y[1] + x[1] * y[0]
00137    * ....
00138    * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00139    */
00140
00141   /* In this stage the MAC operations are increased by 1 for every iteration.
00142      The count variable holds the number of MAC operations performed */
00143   count = 1u;
00144
00145   /* Working pointer of inputA */
00146   px = pIn1;
00147
00148   /* Working pointer of inputB */
00149   py = pIn2;
00150
00151
00152   /* ------------------------
00153    * Stage1 process
00154    * ----------------------*/
00155
00156   /* The first stage starts here */
00157   while(blockSize1 > 0u)
00158   {
00159     /* Accumulator is made zero for every iteration */
00160     sum = 0;
00161
00162     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00163     k = count >> 2u;
00164
00165     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00166      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00167     while(k > 0u)
00168     {
00169       /* x[0] , x[1] */
00170       in1 = (q15_t) * px++;
00171       in2 = (q15_t) * px++;
00172       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00173
00174       /* y[srcBLen - 1] , y[srcBLen - 2] */
00175       in1 = (q15_t) * py--;
00176       in2 = (q15_t) * py--;
00177       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00178
00179       /* x[0] * y[srcBLen - 1] */
00180       /* x[1] * y[srcBLen - 2] */
00181       sum = __SMLAD(input1, input2, sum);
00182
00183       /* x[2] , x[3] */
00184       in1 = (q15_t) * px++;
00185       in2 = (q15_t) * px++;
00186       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00187
00188       /* y[srcBLen - 3] , y[srcBLen - 4] */
00189       in1 = (q15_t) * py--;
00190       in2 = (q15_t) * py--;
00191       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00192
00193       /* x[2] * y[srcBLen - 3] */
00194       /* x[3] * y[srcBLen - 4] */
00195       sum = __SMLAD(input1, input2, sum);
00196
00197       /* Decrement the loop counter */
00198       k--;
00199     }
00200
00201     /* If the count is not a multiple of 4, compute any remaining MACs here.
00202      ** No loop unrolling is used. */
00203     k = count % 0x4u;
00204
00205     while(k > 0u)
00206     {
00207       /* Perform the multiply-accumulates */
00208       sum += ((q15_t) * px++ * *py--);
00209
00210       /* Decrement the loop counter */
00211       k--;
00212     }
00213
00214     /* Store the result in the accumulator in the destination buffer. */
00215     *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8));
00216
00217     /* Update the inputA and inputB pointers for next MAC calculation */
00218     py = pIn2 + count;
00219     px = pIn1;
00220
00221     /* Increment the MAC count */
00222     count++;
00223
00224     /* Decrement the loop counter */
00225     blockSize1--;
00226   }
00227
00228   /* --------------------------
00229    * Initializations of stage2
00230    * ------------------------*/
00231
00232   /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00233    * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00234    * ....
00235    * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00236    */
00237
00238   /* Working pointer of inputA */
00239   px = pIn1;
00240
00241   /* Working pointer of inputB */
00242   pSrc2 = pIn2 + (srcBLen - 1u);
00243   py = pSrc2;
00244
00245   /* count is index by which the pointer pIn1 to be incremented */
00246   count = 1u;
00247
00248   /* -------------------
00249    * Stage2 process
00250    * ------------------*/
00251
00252   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00253    * So, to loop unroll over blockSize2,
00254    * srcBLen should be greater than or equal to 4 */
00255   if(srcBLen >= 4u)
00256   {
00257     /* Loop unroll over blockSize2, by 4 */
00258     blkCnt = blockSize2 >> 2u;
00259
00260     while(blkCnt > 0u)
00261     {
00262       /* Set all accumulators to zero */
00263       acc0 = 0;
00264       acc1 = 0;
00265       acc2 = 0;
00266       acc3 = 0;
00267
00268       /* read x[0], x[1], x[2] samples */
00269       x0 = *(px++);
00270       x1 = *(px++);
00271       x2 = *(px++);
00272
00273       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00274       k = srcBLen >> 2u;
00275
00276       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00277        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00278       do
00279       {
00280         /* Read y[srcBLen - 1] sample */
00281         c0 = *(py--);
00282         /* Read y[srcBLen - 2] sample */
00283         c1 = *(py--);
00284
00285         /* Read x[3] sample */
00286         x3 = *(px++);
00287
00288         /* x[0] and x[1] are packed */
00289         in1 = (q15_t) x0;
00290         in2 = (q15_t) x1;
00291
00292         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00293
00294         /* y[srcBLen - 1]   and y[srcBLen - 2] are packed */
00295         in1 = (q15_t) c0;
00296         in2 = (q15_t) c1;
00297
00298         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00299
00300         /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2]  */
00301         acc0 = __SMLAD(input1, input2, acc0);
00302
00303         /* x[1] and x[2] are packed */
00304         in1 = (q15_t) x1;
00305         in2 = (q15_t) x2;
00306
00307         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00308
00309         /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2]  */
00310         acc1 = __SMLAD(input1, input2, acc1);
00311
00312         /* x[2] and x[3] are packed */
00313         in1 = (q15_t) x2;
00314         in2 = (q15_t) x3;
00315
00316         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00317
00318         /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2]  */
00319         acc2 = __SMLAD(input1, input2, acc2);
00320
00321         /* Read x[4] sample */
00322         x0 = *(px++);
00323
00324         /* x[3] and x[4] are packed */
00325         in1 = (q15_t) x3;
00326         in2 = (q15_t) x0;
00327
00328         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00329
00330         /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2]  */
00331         acc3 = __SMLAD(input1, input2, acc3);
00332
00333         /* Read y[srcBLen - 3] sample */
00334         c0 = *(py--);
00335         /* Read y[srcBLen - 4] sample */
00336         c1 = *(py--);
00337
00338         /* Read x[5] sample */
00339         x1 = *(px++);
00340
00341         /* x[2] and x[3] are packed */
00342         in1 = (q15_t) x2;
00343         in2 = (q15_t) x3;
00344
00345         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00346
00347         /* y[srcBLen - 3] and y[srcBLen - 4] are packed */
00348         in1 = (q15_t) c0;
00349         in2 = (q15_t) c1;
00350
00351         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00352
00353         /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4]  */
00354         acc0 = __SMLAD(input1, input2, acc0);
00355
00356         /* x[3] and x[4] are packed */
00357         in1 = (q15_t) x3;
00358         in2 = (q15_t) x0;
00359
00360         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00361
00362         /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4]  */
00363         acc1 = __SMLAD(input1, input2, acc1);
00364
00365         /* x[4] and x[5] are packed */
00366         in1 = (q15_t) x0;
00367         in2 = (q15_t) x1;
00368
00369         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00370
00371         /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4]  */
00372         acc2 = __SMLAD(input1, input2, acc2);
00373
00374         /* Read x[6] sample */
00375         x2 = *(px++);
00376
00377         /* x[5] and x[6] are packed */
00378         in1 = (q15_t) x1;
00379         in2 = (q15_t) x2;
00380
00381         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00382
00383         /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4]  */
00384         acc3 = __SMLAD(input1, input2, acc3);
00385
00386       } while(--k);
00387
00388       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00389        ** No loop unrolling is used. */
00390       k = srcBLen % 0x4u;
00391
00392       while(k > 0u)
00393       {
00394         /* Read y[srcBLen - 5] sample */
00395         c0 = *(py--);
00396
00397         /* Read x[7] sample */
00398         x3 = *(px++);
00399
00400         /* Perform the multiply-accumulates */
00401         /* acc0 +=  x[4] * y[srcBLen - 5] */
00402         acc0 += ((q15_t) x0 * c0);
00403         /* acc1 +=  x[5] * y[srcBLen - 5] */
00404         acc1 += ((q15_t) x1 * c0);
00405         /* acc2 +=  x[6] * y[srcBLen - 5] */
00406         acc2 += ((q15_t) x2 * c0);
00407         /* acc3 +=  x[7] * y[srcBLen - 5] */
00408         acc3 += ((q15_t) x3 * c0);
00409
00410         /* Reuse the present samples for the next MAC */
00411         x0 = x1;
00412         x1 = x2;
00413         x2 = x3;
00414
00415         /* Decrement the loop counter */
00416         k--;
00417       }
00418
00419
00420       /* Store the result in the accumulator in the destination buffer. */
00421       *pOut++ = (q7_t) (__SSAT(acc0 >> 7u, 8));
00422       *pOut++ = (q7_t) (__SSAT(acc1 >> 7u, 8));
00423       *pOut++ = (q7_t) (__SSAT(acc2 >> 7u, 8));
00424       *pOut++ = (q7_t) (__SSAT(acc3 >> 7u, 8));
00425
00426       /* Update the inputA and inputB pointers for next MAC calculation */
00427       px = pIn1 + (count * 4u);
00428       py = pSrc2;
00429
00430       /* Increment the pointer pIn1 index, count by 1 */
00431       count++;
00432
00433       /* Decrement the loop counter */
00434       blkCnt--;
00435     }
00436
00437     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00438      ** No loop unrolling is used. */
00439     blkCnt = blockSize2 % 0x4u;
00440
00441     while(blkCnt > 0u)
00442     {
00443       /* Accumulator is made zero for every iteration */
00444       sum = 0;
00445
00446       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00447       k = srcBLen >> 2u;
00448
00449       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00450        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00451       while(k > 0u)
00452       {
00453
00454         /* Reading two inputs of SrcA buffer and packing */
00455         in1 = (q15_t) * px++;
00456         in2 = (q15_t) * px++;
00457         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00458
00459         /* Reading two inputs of SrcB buffer and packing */
00460         in1 = (q15_t) * py--;
00461         in2 = (q15_t) * py--;
00462         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00463
00464         /* Perform the multiply-accumulates */
00465         sum = __SMLAD(input1, input2, sum);
00466
00467         /* Reading two inputs of SrcA buffer and packing */
00468         in1 = (q15_t) * px++;
00469         in2 = (q15_t) * px++;
00470         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00471
00472         /* Reading two inputs of SrcB buffer and packing */
00473         in1 = (q15_t) * py--;
00474         in2 = (q15_t) * py--;
00475         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00476
00477         /* Perform the multiply-accumulates */
00478         sum = __SMLAD(input1, input2, sum);
00479
00480         /* Decrement the loop counter */
00481         k--;
00482       }
00483
00484       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00485        ** No loop unrolling is used. */
00486       k = srcBLen % 0x4u;
00487
00488       while(k > 0u)
00489       {
00490         /* Perform the multiply-accumulates */
00491         sum += ((q15_t) * px++ * *py--);
00492
00493         /* Decrement the loop counter */
00494         k--;
00495       }
00496
00497       /* Store the result in the accumulator in the destination buffer. */
00498       *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8));
00499
00500       /* Update the inputA and inputB pointers for next MAC calculation */
00501       px = pIn1 + count;
00502       py = pSrc2;
00503
00504       /* Increment the pointer pIn1 index, count by 1 */
00505       count++;
00506
00507       /* Decrement the loop counter */
00508       blkCnt--;
00509     }
00510   }
00511   else
00512   {
00513     /* If the srcBLen is not a multiple of 4,
00514      * the blockSize2 loop cannot be unrolled by 4 */
00515     blkCnt = blockSize2;
00516
00517     while(blkCnt > 0u)
00518     {
00519       /* Accumulator is made zero for every iteration */
00520       sum = 0;
00521
00522       /* srcBLen number of MACS should be performed */
00523       k = srcBLen;
00524
00525       while(k > 0u)
00526       {
00527         /* Perform the multiply-accumulate */
00528         sum += ((q15_t) * px++ * *py--);
00529
00530         /* Decrement the loop counter */
00531         k--;
00532       }
00533
00534       /* Store the result in the accumulator in the destination buffer. */
00535       *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8));
00536
00537       /* Update the inputA and inputB pointers for next MAC calculation */
00538       px = pIn1 + count;
00539       py = pSrc2;
00540
00541       /* Increment the MAC count */
00542       count++;
00543
00544       /* Decrement the loop counter */
00545       blkCnt--;
00546     }
00547   }
00548
00549
00550   /* --------------------------
00551    * Initializations of stage3
00552    * -------------------------*/
00553
00554   /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00555    * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00556    * ....
00557    * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00558    * sum +=  x[srcALen-1] * y[srcBLen-1]
00559    */
00560
00561   /* In this stage the MAC operations are decreased by 1 for every iteration.
00562      The blockSize3 variable holds the number of MAC operations performed */
00563
00564   /* Working pointer of inputA */
00565   pSrc1 = pIn1 + (srcALen - (srcBLen - 1u));
00566   px = pSrc1;
00567
00568   /* Working pointer of inputB */
00569   pSrc2 = pIn2 + (srcBLen - 1u);
00570   py = pSrc2;
00571
00572   /* -------------------
00573    * Stage3 process
00574    * ------------------*/
00575
00576   while(blockSize3 > 0u)
00577   {
00578     /* Accumulator is made zero for every iteration */
00579     sum = 0;
00580
00581     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00582     k = blockSize3 >> 2u;
00583
00584     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00585      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00586     while(k > 0u)
00587     {
00588       /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */
00589       in1 = (q15_t) * px++;
00590       in2 = (q15_t) * px++;
00591       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00592
00593       /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */
00594       in1 = (q15_t) * py--;
00595       in2 = (q15_t) * py--;
00596       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00597
00598       /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
00599       /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
00600       sum = __SMLAD(input1, input2, sum);
00601
00602       /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */
00603       in1 = (q15_t) * px++;
00604       in2 = (q15_t) * px++;
00605       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00606
00607       /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */
00608       in1 = (q15_t) * py--;
00609       in2 = (q15_t) * py--;
00610       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00611
00612       /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
00613       /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
00614       sum = __SMLAD(input1, input2, sum);
00615
00616       /* Decrement the loop counter */
00617       k--;
00618     }
00619
00620     /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
00621      ** No loop unrolling is used. */
00622     k = blockSize3 % 0x4u;
00623
00624     while(k > 0u)
00625     {
00626       /* Perform the multiply-accumulates */
00627       sum += ((q15_t) * px++ * *py--);
00628
00629       /* Decrement the loop counter */
00630       k--;
00631     }
00632
00633     /* Store the result in the accumulator in the destination buffer. */
00634     *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8));
00635
00636     /* Update the inputA and inputB pointers for next MAC calculation */
00637     px = ++pSrc1;
00638     py = pSrc2;
00639
00640     /* Decrement the loop counter */
00641     blockSize3--;
00642   }
00643
00644 #else
00645
00646   /* Run the below code for Cortex-M0 */
00647
00648   q7_t *pIn1 = pSrcA;                            /* input pointer */
00649   q7_t *pIn2 = pSrcB;                            /* coefficient pointer */
00650   q31_t sum;                                     /* Accumulator */
00651   uint32_t i, j;                                 /* loop counter */
00652
00653   /* Loop to calculate output of convolution for output length number of times */
00654   for (i = 0; i < (srcALen + srcBLen - 1); i++)
00655   {
00656     /* Initialize sum with zero to carry on MAC operations */
00657     sum = 0;
00658
00659     /* Loop to perform MAC operations according to convolution equation */
00660     for (j = 0; j <= i; j++)
00661     {
00662       /* Check the array limitations */
00663       if(((i - j) < srcBLen) && (j < srcALen))
00664       {
00665         /* z[i] += x[i-j] * y[j] */
00666         sum += (q15_t) pIn1[j] * (pIn2[i - j]);
00667       }
00668     }
00669
00670     /* Store the output in the destination buffer */
00671     pDst[i] = (q7_t) __SSAT((sum >> 7u), 8u);
00672   }
00673
00674 #endif /*   #ifndef ARM_MATH_CM0        */
00675
00676 }
00677
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_conv_q15.c
00009 *
00010 * Description:  Convolution of Q15 sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00068 void arm_conv_q15(
00069   q15_t * pSrcA,
00070   uint32_t srcALen,
00071   q15_t * pSrcB,
00072   uint32_t srcBLen,
00073   q15_t * pDst)
00074 {
00075
00076 #ifndef ARM_MATH_CM0
00077
00078   /* Run the below code for Cortex-M4 and Cortex-M3 */
00079
00080   q15_t *pIn1;                                   /* inputA pointer */
00081   q15_t *pIn2;                                   /* inputB pointer */
00082   q15_t *pOut = pDst;                            /* output pointer */
00083   q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
00084   q15_t *px;                                     /* Intermediate inputA pointer  */
00085   q15_t *py;                                     /* Intermediate inputB pointer  */
00086   q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
00087   q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
00088   uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt;     /* loop counter */
00089   q31_t *pb;                                     /* 32 bit pointer for inputB buffer */
00090
00091
00092   /* The algorithm implementation is based on the lengths of the inputs. */
00093   /* srcB is always made to slide across srcA. */
00094   /* So srcBLen is always considered as shorter or equal to srcALen */
00095   if(srcALen >= srcBLen)
00096   {
00097     /* Initialization of inputA pointer */
00098     pIn1 = pSrcA;
00099
00100     /* Initialization of inputB pointer */
00101     pIn2 = pSrcB;
00102   }
00103   else
00104   {
00105     /* Initialization of inputA pointer */
00106     pIn1 = pSrcB;
00107
00108     /* Initialization of inputB pointer */
00109     pIn2 = pSrcA;
00110
00111     /* srcBLen is always considered as shorter or equal to srcALen */
00112     j = srcBLen;
00113     srcBLen = srcALen;
00114     srcALen = j;
00115   }
00116
00117   /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00118   /* The function is internally
00119    * divided into three stages according to the number of multiplications that has to be
00120    * taken place between inputA samples and inputB samples. In the first stage of the
00121    * algorithm, the multiplications increase by one for every iteration.
00122    * In the second stage of the algorithm, srcBLen number of multiplications are done.
00123    * In the third stage of the algorithm, the multiplications decrease by one
00124    * for every iteration. */
00125
00126   /* The algorithm is implemented in three stages.
00127      The loop counters of each stage is initiated here. */
00128   blockSize1 = srcBLen - 1u;
00129   blockSize2 = srcALen - (srcBLen - 1u);
00130
00131   /* --------------------------
00132    * Initializations of stage1
00133    * -------------------------*/
00134
00135   /* sum = x[0] * y[0]
00136    * sum = x[0] * y[1] + x[1] * y[0]
00137    * ....
00138    * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00139    */
00140
00141   /* In this stage the MAC operations are increased by 1 for every iteration.
00142      The count variable holds the number of MAC operations performed */
00143   count = 1u;
00144
00145   /* Working pointer of inputA */
00146   px = pIn1;
00147
00148   /* Working pointer of inputB */
00149   py = pIn2;
00150
00151
00152   /* ------------------------
00153    * Stage1 process
00154    * ----------------------*/
00155
00156   /* For loop unrolling by 4, this stage is divided into two. */
00157   /* First part of this stage computes the MAC operations less than 4 */
00158   /* Second part of this stage computes the MAC operations greater than or equal to 4 */
00159
00160   /* The first part of the stage starts here */
00161   while((count < 4u) && (blockSize1 > 0u))
00162   {
00163     /* Accumulator is made zero for every iteration */
00164     sum = 0;
00165
00166     /* Loop over number of MAC operations between
00167      * inputA samples and inputB samples */
00168     k = count;
00169
00170     while(k > 0u)
00171     {
00172       /* Perform the multiply-accumulates */
00173       sum = __SMLALD(*px++, *py--, sum);
00174
00175       /* Decrement the loop counter */
00176       k--;
00177     }
00178
00179     /* Store the result in the accumulator in the destination buffer. */
00180     *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
00181
00182     /* Update the inputA and inputB pointers for next MAC calculation */
00183     py = pIn2 + count;
00184     px = pIn1;
00185
00186     /* Increment the MAC count */
00187     count++;
00188
00189     /* Decrement the loop counter */
00190     blockSize1--;
00191   }
00192
00193   /* The second part of the stage starts here */
00194   /* The internal loop, over count, is unrolled by 4 */
00195   /* To, read the last two inputB samples using SIMD:
00196    * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
00197   py = py - 1;
00198
00199   while(blockSize1 > 0u)
00200   {
00201     /* Accumulator is made zero for every iteration */
00202     sum = 0;
00203
00204     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00205     k = count >> 2u;
00206
00207     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00208      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00209     while(k > 0u)
00210     {
00211       /* Perform the multiply-accumulates */
00212       /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
00213       sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00214       /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
00215       sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00216
00217       /* Decrement the loop counter */
00218       k--;
00219     }
00220
00221     /* For the next MAC operations, the pointer py is used without SIMD
00222      * So, py is incremented by 1 */
00223     py = py + 1u;
00224
00225     /* If the count is not a multiple of 4, compute any remaining MACs here.
00226      ** No loop unrolling is used. */
00227     k = count % 0x4u;
00228
00229     while(k > 0u)
00230     {
00231       /* Perform the multiply-accumulates */
00232       sum = __SMLALD(*px++, *py--, sum);
00233
00234       /* Decrement the loop counter */
00235       k--;
00236     }
00237
00238     /* Store the result in the accumulator in the destination buffer. */
00239     *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
00240
00241     /* Update the inputA and inputB pointers for next MAC calculation */
00242     py = pIn2 + (count - 1u);
00243     px = pIn1;
00244
00245     /* Increment the MAC count */
00246     count++;
00247
00248     /* Decrement the loop counter */
00249     blockSize1--;
00250   }
00251
00252   /* --------------------------
00253    * Initializations of stage2
00254    * ------------------------*/
00255
00256   /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00257    * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00258    * ....
00259    * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00260    */
00261
00262   /* Working pointer of inputA */
00263   px = pIn1;
00264
00265   /* Working pointer of inputB */
00266   pSrc2 = pIn2 + (srcBLen - 1u);
00267   py = pSrc2;
00268
00269   /* Initialize inputB pointer of type q31 */
00270   pb = (q31_t *) (py - 1u);
00271
00272   /* count is the index by which the pointer pIn1 to be incremented */
00273   count = 1u;
00274
00275
00276   /* --------------------
00277    * Stage2 process
00278    * -------------------*/
00279
00280   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00281    * So, to loop unroll over blockSize2,
00282    * srcBLen should be greater than or equal to 4 */
00283   if(srcBLen >= 4u)
00284   {
00285     /* Loop unroll over blockSize2, by 4 */
00286     blkCnt = blockSize2 >> 2u;
00287
00288     while(blkCnt > 0u)
00289     {
00290       /* Set all accumulators to zero */
00291       acc0 = 0;
00292       acc1 = 0;
00293       acc2 = 0;
00294       acc3 = 0;
00295
00296
00297       /* read x[0], x[1] samples */
00298       x0 = *(q31_t *) (px++);
00299       /* read x[1], x[2] samples */
00300       x1 = *(q31_t *) (px++);
00301
00302
00303       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00304       k = srcBLen >> 2u;
00305
00306       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00307        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00308       do
00309       {
00310         /* Read the last two inputB samples using SIMD:
00311          * y[srcBLen - 1] and y[srcBLen - 2] */
00312         c0 = *(pb--);
00313
00314         /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
00315         acc0 = __SMLALDX(x0, c0, acc0);
00316
00317         /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
00318         acc1 = __SMLALDX(x1, c0, acc1);
00319
00320         /* Read x[2], x[3] */
00321         x2 = *(q31_t *) (px++);
00322
00323         /* Read x[3], x[4] */
00324         x3 = *(q31_t *) (px++);
00325
00326         /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
00327         acc2 = __SMLALDX(x2, c0, acc2);
00328
00329         /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
00330         acc3 = __SMLALDX(x3, c0, acc3);
00331
00332         /* Read y[srcBLen - 3] and y[srcBLen - 4] */
00333         c0 = *(pb--);
00334
00335         /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
00336         acc0 = __SMLALDX(x2, c0, acc0);
00337
00338         /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
00339         acc1 = __SMLALDX(x3, c0, acc1);
00340
00341         /* Read x[4], x[5] */
00342         x0 = *(q31_t *) (px++);
00343
00344         /* Read x[5], x[6] */
00345         x1 = *(q31_t *) (px++);
00346
00347         /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
00348         acc2 = __SMLALDX(x0, c0, acc2);
00349
00350         /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
00351         acc3 = __SMLALDX(x1, c0, acc3);
00352
00353       } while(--k);
00354
00355       /* For the next MAC operations, SIMD is not used
00356        * So, the 16 bit pointer if inputB, py is updated */
00357       py = (q15_t *) pb;
00358       py = py + 1;
00359
00360       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00361        ** No loop unrolling is used. */
00362       k = srcBLen % 0x4u;
00363
00364       if(k == 1u)
00365       {
00366         /* Read y[srcBLen - 5] */
00367         c0 = *(py);
00368
00369 #ifdef  ARM_MATH_BIG_ENDIAN
00370
00371         c0 = c0 << 16u;
00372
00373 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00374
00375         /* Read x[7] */
00376         x3 = *(q31_t *) px++;
00377
00378         /* Perform the multiply-accumulates */
00379         acc0 = __SMLALD(x0, c0, acc0);
00380         acc1 = __SMLALD(x1, c0, acc1);
00381         acc2 = __SMLALDX(x1, c0, acc2);
00382         acc3 = __SMLALDX(x3, c0, acc3);
00383       }
00384
00385       if(k == 2u)
00386       {
00387         /* Read y[srcBLen - 5], y[srcBLen - 6] */
00388         c0 = *(pb);
00389
00390         /* Read x[7], x[8] */
00391         x3 = *(q31_t *) px++;
00392
00393         /* Read x[9] */
00394         x2 = *(q31_t *) px++;
00395
00396         /* Perform the multiply-accumulates */
00397         acc0 = __SMLALDX(x0, c0, acc0);
00398         acc1 = __SMLALDX(x1, c0, acc1);
00399         acc2 = __SMLALDX(x3, c0, acc2);
00400         acc3 = __SMLALDX(x2, c0, acc3);
00401       }
00402
00403       if(k == 3u)
00404       {
00405         /* Read y[srcBLen - 5], y[srcBLen - 6] */
00406         c0 = *pb--;
00407
00408         /* Read x[7], x[8] */
00409         x3 = *(q31_t *) px++;
00410
00411         /* Read x[9] */
00412         x2 = *(q31_t *) px++;
00413
00414         /* Perform the multiply-accumulates */
00415         acc0 = __SMLALDX(x0, c0, acc0);
00416         acc1 = __SMLALDX(x1, c0, acc1);
00417         acc2 = __SMLALDX(x3, c0, acc2);
00418         acc3 = __SMLALDX(x2, c0, acc3);
00419
00420 #ifdef  ARM_MATH_BIG_ENDIAN
00421
00422         /* Read y[srcBLen - 7] */
00423         c0 = (*pb);
00424
00425         //c0 = (c0 & 0x0000FFFF)<<16;
00426         c0 = (c0) << 16;
00427
00428 #else
00429
00430         /* Read y[srcBLen - 7] */
00431         c0 = (q15_t) (*pb >> 16);
00432
00433 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00434
00435         /* Read x[10] */
00436         x3 = *(q31_t *) px++;
00437
00438         /* Perform the multiply-accumulates */
00439         acc0 = __SMLALDX(x1, c0, acc0);
00440         acc1 = __SMLALD(x2, c0, acc1);
00441         acc2 = __SMLALDX(x2, c0, acc2);
00442         acc3 = __SMLALDX(x3, c0, acc3);
00443       }
00444
00445
00446       /* Store the results in the accumulators in the destination buffer. */
00447
00448 #ifndef  ARM_MATH_BIG_ENDIAN
00449
00450       *__SIMD32(pOut)++ =
00451         __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
00452       *__SIMD32(pOut)++ =
00453         __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
00454
00455 #else
00456
00457       *__SIMD32(pOut)++ =
00458         __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
00459       *__SIMD32(pOut)++ =
00460         __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
00461
00462 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00463
00464       /* Update the inputA and inputB pointers for next MAC calculation */
00465       px = pIn1 + (count * 4u);
00466       py = pSrc2;
00467       pb = (q31_t *) (py - 1);
00468
00469       /* Increment the pointer pIn1 index, count by 1 */
00470       count++;
00471
00472       /* Decrement the loop counter */
00473       blkCnt--;
00474     }
00475
00476     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00477      ** No loop unrolling is used. */
00478     blkCnt = blockSize2 % 0x4u;
00479
00480     while(blkCnt > 0u)
00481     {
00482       /* Accumulator is made zero for every iteration */
00483       sum = 0;
00484
00485       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00486       k = srcBLen >> 2u;
00487
00488       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00489        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00490       while(k > 0u)
00491       {
00492         /* Perform the multiply-accumulates */
00493         sum += (q63_t) ((q31_t) * px++ * *py--);
00494         sum += (q63_t) ((q31_t) * px++ * *py--);
00495         sum += (q63_t) ((q31_t) * px++ * *py--);
00496         sum += (q63_t) ((q31_t) * px++ * *py--);
00497
00498         /* Decrement the loop counter */
00499         k--;
00500       }
00501
00502       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00503        ** No loop unrolling is used. */
00504       k = srcBLen % 0x4u;
00505
00506       while(k > 0u)
00507       {
00508         /* Perform the multiply-accumulates */
00509         sum += (q63_t) ((q31_t) * px++ * *py--);
00510
00511         /* Decrement the loop counter */
00512         k--;
00513       }
00514
00515       /* Store the result in the accumulator in the destination buffer. */
00516       *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
00517
00518       /* Update the inputA and inputB pointers for next MAC calculation */
00519       px = pIn1 + count;
00520       py = pSrc2;
00521
00522       /* Increment the pointer pIn1 index, count by 1 */
00523       count++;
00524
00525       /* Decrement the loop counter */
00526       blkCnt--;
00527     }
00528   }
00529   else
00530   {
00531     /* If the srcBLen is not a multiple of 4,
00532      * the blockSize2 loop cannot be unrolled by 4 */
00533     blkCnt = blockSize2;
00534
00535     while(blkCnt > 0u)
00536     {
00537       /* Accumulator is made zero for every iteration */
00538       sum = 0;
00539
00540       /* srcBLen number of MACS should be performed */
00541       k = srcBLen;
00542
00543       while(k > 0u)
00544       {
00545         /* Perform the multiply-accumulate */
00546         sum += (q63_t) ((q31_t) * px++ * *py--);
00547
00548         /* Decrement the loop counter */
00549         k--;
00550       }
00551
00552       /* Store the result in the accumulator in the destination buffer. */
00553       *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
00554
00555       /* Update the inputA and inputB pointers for next MAC calculation */
00556       px = pIn1 + count;
00557       py = pSrc2;
00558
00559       /* Increment the MAC count */
00560       count++;
00561
00562       /* Decrement the loop counter */
00563       blkCnt--;
00564     }
00565   }
00566
00567
00568   /* --------------------------
00569    * Initializations of stage3
00570    * -------------------------*/
00571
00572   /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00573    * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00574    * ....
00575    * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00576    * sum +=  x[srcALen-1] * y[srcBLen-1]
00577    */
00578
00579   /* In this stage the MAC operations are decreased by 1 for every iteration.
00580      The blockSize3 variable holds the number of MAC operations performed */
00581
00582   blockSize3 = srcBLen - 1u;
00583
00584   /* Working pointer of inputA */
00585   pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00586   px = pSrc1;
00587
00588   /* Working pointer of inputB */
00589   pSrc2 = pIn2 + (srcBLen - 1u);
00590   pIn2 = pSrc2 - 1u;
00591   py = pIn2;
00592
00593   /* -------------------
00594    * Stage3 process
00595    * ------------------*/
00596
00597   /* For loop unrolling by 4, this stage is divided into two. */
00598   /* First part of this stage computes the MAC operations greater than 4 */
00599   /* Second part of this stage computes the MAC operations less than or equal to 4 */
00600
00601   /* The first part of the stage starts here */
00602   j = blockSize3 >> 2u;
00603
00604   while((j > 0u) && (blockSize3 > 0u))
00605   {
00606     /* Accumulator is made zero for every iteration */
00607     sum = 0;
00608
00609     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00610     k = blockSize3 >> 2u;
00611
00612     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00613      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00614     while(k > 0u)
00615     {
00616       /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
00617        * with y[srcBLen - 1], y[srcBLen - 2] respectively */
00618       sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00619       /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
00620        * with y[srcBLen - 3], y[srcBLen - 4] respectively */
00621       sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00622
00623       /* Decrement the loop counter */
00624       k--;
00625     }
00626
00627     /* For the next MAC operations, the pointer py is used without SIMD
00628      * So, py is incremented by 1 */
00629     py = py + 1u;
00630
00631     /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
00632      ** No loop unrolling is used. */
00633     k = blockSize3 % 0x4u;
00634
00635     while(k > 0u)
00636     {
00637       /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
00638       sum = __SMLALD(*px++, *py--, sum);
00639
00640       /* Decrement the loop counter */
00641       k--;
00642     }
00643
00644     /* Store the result in the accumulator in the destination buffer. */
00645     *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
00646
00647     /* Update the inputA and inputB pointers for next MAC calculation */
00648     px = ++pSrc1;
00649     py = pIn2;
00650
00651     /* Decrement the loop counter */
00652     blockSize3--;
00653
00654     j--;
00655   }
00656
00657   /* The second part of the stage starts here */
00658   /* SIMD is not used for the next MAC operations,
00659    * so pointer py is updated to read only one sample at a time */
00660   py = py + 1u;
00661
00662   while(blockSize3 > 0u)
00663   {
00664     /* Accumulator is made zero for every iteration */
00665     sum = 0;
00666
00667     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00668     k = blockSize3;
00669
00670     while(k > 0u)
00671     {
00672       /* Perform the multiply-accumulates */
00673       /* sum +=  x[srcALen-1] * y[srcBLen-1] */
00674       sum = __SMLALD(*px++, *py--, sum);
00675
00676       /* Decrement the loop counter */
00677       k--;
00678     }
00679
00680     /* Store the result in the accumulator in the destination buffer. */
00681     *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
00682
00683     /* Update the inputA and inputB pointers for next MAC calculation */
00684     px = ++pSrc1;
00685     py = pSrc2;
00686
00687     /* Decrement the loop counter */
00688     blockSize3--;
00689   }
00690
00691 #else
00692
00693 /* Run the below code for Cortex-M0 */
00694
00695   q15_t *pIn1 = pSrcA;                           /* input pointer */
00696   q15_t *pIn2 = pSrcB;                           /* coefficient pointer */
00697   q63_t sum;                                     /* Accumulator */
00698   uint32_t i, j;                                 /* loop counter */
00699
00700   /* Loop to calculate output of convolution for output length number of times */
00701   for (i = 0; i < (srcALen + srcBLen - 1); i++)
00702   {
00703     /* Initialize sum with zero to carry on MAC operations */
00704     sum = 0;
00705
00706     /* Loop to perform MAC operations according to convolution equation */
00707     for (j = 0; j <= i; j++)
00708     {
00709       /* Check the array limitations */
00710       if(((i - j) < srcBLen) && (j < srcALen))
00711       {
00712         /* z[i] += x[i-j] * y[j] */
00713         sum += (q31_t) pIn1[j] * (pIn2[i - j]);
00714       }
00715     }
00716
00717     /* Store the output in the destination buffer */
00718     pDst[i] = (q15_t) __SSAT((sum >> 15u), 16u);
00719   }
00720
00721 #endif /*   #ifndef ARM_MATH_CM0 */
00722
00723 }
00724
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_conv_q31.c
00009 *
00010 * Description:  Convolution of Q31 sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00071 void arm_conv_q31(
00072   q31_t * pSrcA,
00073   uint32_t srcALen,
00074   q31_t * pSrcB,
00075   uint32_t srcBLen,
00076   q31_t * pDst)
00077 {
00078
00079
00080 #ifndef ARM_MATH_CM0
00081
00082   /* Run the below code for Cortex-M4 and Cortex-M3 */
00083
00084   q31_t *pIn1;                                   /* inputA pointer */
00085   q31_t *pIn2;                                   /* inputB pointer */
00086   q31_t *pOut = pDst;                            /* output pointer */
00087   q31_t *px;                                     /* Intermediate inputA pointer  */
00088   q31_t *py;                                     /* Intermediate inputB pointer  */
00089   q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
00090   q63_t sum;                                     /* Accumulator */
00091   q63_t acc0, acc1, acc2, acc3;                  /* Accumulator */
00092   q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
00093   uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counter */
00094
00095
00096   /* The algorithm implementation is based on the lengths of the inputs. */
00097   /* srcB is always made to slide across srcA. */
00098   /* So srcBLen is always considered as shorter or equal to srcALen */
00099   if(srcALen >= srcBLen)
00100   {
00101     /* Initialization of inputA pointer */
00102     pIn1 = pSrcA;
00103
00104     /* Initialization of inputB pointer */
00105     pIn2 = pSrcB;
00106   }
00107   else
00108   {
00109     /* Initialization of inputA pointer */
00110     pIn1 = (q31_t *) pSrcB;
00111
00112     /* Initialization of inputB pointer */
00113     pIn2 = (q31_t *) pSrcA;
00114
00115     /* srcBLen is always considered as shorter or equal to srcALen */
00116     j = srcBLen;
00117     srcBLen = srcALen;
00118     srcALen = j;
00119   }
00120
00121   /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00122   /* The function is internally
00123    * divided into three stages according to the number of multiplications that has to be
00124    * taken place between inputA samples and inputB samples. In the first stage of the
00125    * algorithm, the multiplications increase by one for every iteration.
00126    * In the second stage of the algorithm, srcBLen number of multiplications are done.
00127    * In the third stage of the algorithm, the multiplications decrease by one
00128    * for every iteration. */
00129
00130   /* The algorithm is implemented in three stages.
00131      The loop counters of each stage is initiated here. */
00132   blockSize1 = srcBLen - 1u;
00133   blockSize2 = srcALen - (srcBLen - 1u);
00134   blockSize3 = blockSize1;
00135
00136   /* --------------------------
00137    * Initializations of stage1
00138    * -------------------------*/
00139
00140   /* sum = x[0] * y[0]
00141    * sum = x[0] * y[1] + x[1] * y[0]
00142    * ....
00143    * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00144    */
00145
00146   /* In this stage the MAC operations are increased by 1 for every iteration.
00147      The count variable holds the number of MAC operations performed */
00148   count = 1u;
00149
00150   /* Working pointer of inputA */
00151   px = pIn1;
00152
00153   /* Working pointer of inputB */
00154   py = pIn2;
00155
00156
00157   /* ------------------------
00158    * Stage1 process
00159    * ----------------------*/
00160
00161   /* The first stage starts here */
00162   while(blockSize1 > 0u)
00163   {
00164     /* Accumulator is made zero for every iteration */
00165     sum = 0;
00166
00167     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00168     k = count >> 2u;
00169
00170     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00171      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00172     while(k > 0u)
00173     {
00174       /* x[0] * y[srcBLen - 1] */
00175       sum += (q63_t) * px++ * (*py--);
00176       /* x[1] * y[srcBLen - 2] */
00177       sum += (q63_t) * px++ * (*py--);
00178       /* x[2] * y[srcBLen - 3] */
00179       sum += (q63_t) * px++ * (*py--);
00180       /* x[3] * y[srcBLen - 4] */
00181       sum += (q63_t) * px++ * (*py--);
00182
00183       /* Decrement the loop counter */
00184       k--;
00185     }
00186
00187     /* If the count is not a multiple of 4, compute any remaining MACs here.
00188      ** No loop unrolling is used. */
00189     k = count % 0x4u;
00190
00191     while(k > 0u)
00192     {
00193       /* Perform the multiply-accumulate */
00194       sum += (q63_t) * px++ * (*py--);
00195
00196       /* Decrement the loop counter */
00197       k--;
00198     }
00199
00200     /* Store the result in the accumulator in the destination buffer. */
00201     *pOut++ = (q31_t) (sum >> 31);
00202
00203     /* Update the inputA and inputB pointers for next MAC calculation */
00204     py = pIn2 + count;
00205     px = pIn1;
00206
00207     /* Increment the MAC count */
00208     count++;
00209
00210     /* Decrement the loop counter */
00211     blockSize1--;
00212   }
00213
00214   /* --------------------------
00215    * Initializations of stage2
00216    * ------------------------*/
00217
00218   /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00219    * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00220    * ....
00221    * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00222    */
00223
00224   /* Working pointer of inputA */
00225   px = pIn1;
00226
00227   /* Working pointer of inputB */
00228   pSrc2 = pIn2 + (srcBLen - 1u);
00229   py = pSrc2;
00230
00231   /* count is index by which the pointer pIn1 to be incremented */
00232   count = 1u;
00233
00234   /* -------------------
00235    * Stage2 process
00236    * ------------------*/
00237
00238   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00239    * So, to loop unroll over blockSize2,
00240    * srcBLen should be greater than or equal to 4 */
00241   if(srcBLen >= 4u)
00242   {
00243     /* Loop unroll over blockSize2, by 4 */
00244     blkCnt = blockSize2 >> 2u;
00245
00246     while(blkCnt > 0u)
00247     {
00248       /* Set all accumulators to zero */
00249       acc0 = 0;
00250       acc1 = 0;
00251       acc2 = 0;
00252       acc3 = 0;
00253
00254       /* read x[0], x[1], x[2] samples */
00255       x0 = *(px++);
00256       x1 = *(px++);
00257       x2 = *(px++);
00258
00259       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00260       k = srcBLen >> 2u;
00261
00262       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00263        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00264       do
00265       {
00266         /* Read y[srcBLen - 1] sample */
00267         c0 = *(py--);
00268
00269         /* Read x[3] sample */
00270         x3 = *(px++);
00271
00272         /* Perform the multiply-accumulates */
00273         /* acc0 +=  x[0] * y[srcBLen - 1] */
00274         acc0 += ((q63_t) x0 * c0);
00275         /* acc1 +=  x[1] * y[srcBLen - 1] */
00276         acc1 += ((q63_t) x1 * c0);
00277         /* acc2 +=  x[2] * y[srcBLen - 1] */
00278         acc2 += ((q63_t) x2 * c0);
00279         /* acc3 +=  x[3] * y[srcBLen - 1] */
00280         acc3 += ((q63_t) x3 * c0);
00281
00282         /* Read y[srcBLen - 2] sample */
00283         c0 = *(py--);
00284
00285         /* Read x[4] sample */
00286         x0 = *(px++);
00287
00288         /* Perform the multiply-accumulate */
00289         /* acc0 +=  x[1] * y[srcBLen - 2] */
00290         acc0 += ((q63_t) x1 * c0);
00291         /* acc1 +=  x[2] * y[srcBLen - 2] */
00292         acc1 += ((q63_t) x2 * c0);
00293         /* acc2 +=  x[3] * y[srcBLen - 2] */
00294         acc2 += ((q63_t) x3 * c0);
00295         /* acc3 +=  x[4] * y[srcBLen - 2] */
00296         acc3 += ((q63_t) x0 * c0);
00297
00298         /* Read y[srcBLen - 3] sample */
00299         c0 = *(py--);
00300
00301         /* Read x[5] sample */
00302         x1 = *(px++);
00303
00304         /* Perform the multiply-accumulates */
00305         /* acc0 +=  x[2] * y[srcBLen - 3] */
00306         acc0 += ((q63_t) x2 * c0);
00307         /* acc1 +=  x[3] * y[srcBLen - 2] */
00308         acc1 += ((q63_t) x3 * c0);
00309         /* acc2 +=  x[4] * y[srcBLen - 2] */
00310         acc2 += ((q63_t) x0 * c0);
00311         /* acc3 +=  x[5] * y[srcBLen - 2] */
00312         acc3 += ((q63_t) x1 * c0);
00313
00314         /* Read y[srcBLen - 4] sample */
00315         c0 = *(py--);
00316
00317         /* Read x[6] sample */
00318         x2 = *(px++);
00319
00320         /* Perform the multiply-accumulates */
00321         /* acc0 +=  x[3] * y[srcBLen - 4] */
00322         acc0 += ((q63_t) x3 * c0);
00323         /* acc1 +=  x[4] * y[srcBLen - 4] */
00324         acc1 += ((q63_t) x0 * c0);
00325         /* acc2 +=  x[5] * y[srcBLen - 4] */
00326         acc2 += ((q63_t) x1 * c0);
00327         /* acc3 +=  x[6] * y[srcBLen - 4] */
00328         acc3 += ((q63_t) x2 * c0);
00329
00330       } while(--k);
00331
00332       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00333        ** No loop unrolling is used. */
00334       k = srcBLen % 0x4u;
00335
00336       while(k > 0u)
00337       {
00338         /* Read y[srcBLen - 5] sample */
00339         c0 = *(py--);
00340
00341         /* Read x[7] sample */
00342         x3 = *(px++);
00343
00344         /* Perform the multiply-accumulates */
00345         /* acc0 +=  x[4] * y[srcBLen - 5] */
00346         acc0 += ((q63_t) x0 * c0);
00347         /* acc1 +=  x[5] * y[srcBLen - 5] */
00348         acc1 += ((q63_t) x1 * c0);
00349         /* acc2 +=  x[6] * y[srcBLen - 5] */
00350         acc2 += ((q63_t) x2 * c0);
00351         /* acc3 +=  x[7] * y[srcBLen - 5] */
00352         acc3 += ((q63_t) x3 * c0);
00353
00354         /* Reuse the present samples for the next MAC */
00355         x0 = x1;
00356         x1 = x2;
00357         x2 = x3;
00358
00359         /* Decrement the loop counter */
00360         k--;
00361       }
00362
00363       /* Store the results in the accumulators in the destination buffer. */
00364       *pOut++ = (q31_t) (acc0 >> 31);
00365       *pOut++ = (q31_t) (acc1 >> 31);
00366       *pOut++ = (q31_t) (acc2 >> 31);
00367       *pOut++ = (q31_t) (acc3 >> 31);
00368
00369       /* Update the inputA and inputB pointers for next MAC calculation */
00370       px = pIn1 + (count * 4u);
00371       py = pSrc2;
00372
00373       /* Increment the pointer pIn1 index, count by 1 */
00374       count++;
00375
00376       /* Decrement the loop counter */
00377       blkCnt--;
00378     }
00379
00380     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00381      ** No loop unrolling is used. */
00382     blkCnt = blockSize2 % 0x4u;
00383
00384     while(blkCnt > 0u)
00385     {
00386       /* Accumulator is made zero for every iteration */
00387       sum = 0;
00388
00389       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00390       k = srcBLen >> 2u;
00391
00392       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00393        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00394       while(k > 0u)
00395       {
00396         /* Perform the multiply-accumulates */
00397         sum += (q63_t) * px++ * (*py--);
00398         sum += (q63_t) * px++ * (*py--);
00399         sum += (q63_t) * px++ * (*py--);
00400         sum += (q63_t) * px++ * (*py--);
00401
00402         /* Decrement the loop counter */
00403         k--;
00404       }
00405
00406       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00407        ** No loop unrolling is used. */
00408       k = srcBLen % 0x4u;
00409
00410       while(k > 0u)
00411       {
00412         /* Perform the multiply-accumulate */
00413         sum += (q63_t) * px++ * (*py--);
00414
00415         /* Decrement the loop counter */
00416         k--;
00417       }
00418
00419       /* Store the result in the accumulator in the destination buffer. */
00420       *pOut++ = (q31_t) (sum >> 31);
00421
00422       /* Update the inputA and inputB pointers for next MAC calculation */
00423       px = pIn1 + count;
00424       py = pSrc2;
00425
00426       /* Increment the MAC count */
00427       count++;
00428
00429       /* Decrement the loop counter */
00430       blkCnt--;
00431     }
00432   }
00433   else
00434   {
00435     /* If the srcBLen is not a multiple of 4,
00436      * the blockSize2 loop cannot be unrolled by 4 */
00437     blkCnt = blockSize2;
00438
00439     while(blkCnt > 0u)
00440     {
00441       /* Accumulator is made zero for every iteration */
00442       sum = 0;
00443
00444       /* srcBLen number of MACS should be performed */
00445       k = srcBLen;
00446
00447       while(k > 0u)
00448       {
00449         /* Perform the multiply-accumulate */
00450         sum += (q63_t) * px++ * (*py--);
00451
00452         /* Decrement the loop counter */
00453         k--;
00454       }
00455
00456       /* Store the result in the accumulator in the destination buffer. */
00457       *pOut++ = (q31_t) (sum >> 31);
00458
00459       /* Update the inputA and inputB pointers for next MAC calculation */
00460       px = pIn1 + count;
00461       py = pSrc2;
00462
00463       /* Increment the MAC count */
00464       count++;
00465
00466       /* Decrement the loop counter */
00467       blkCnt--;
00468     }
00469   }
00470
00471
00472   /* --------------------------
00473    * Initializations of stage3
00474    * -------------------------*/
00475
00476   /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00477    * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00478    * ....
00479    * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00480    * sum +=  x[srcALen-1] * y[srcBLen-1]
00481    */
00482
00483   /* In this stage the MAC operations are decreased by 1 for every iteration.
00484      The blockSize3 variable holds the number of MAC operations performed */
00485
00486   /* Working pointer of inputA */
00487   pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00488   px = pSrc1;
00489
00490   /* Working pointer of inputB */
00491   pSrc2 = pIn2 + (srcBLen - 1u);
00492   py = pSrc2;
00493
00494   /* -------------------
00495    * Stage3 process
00496    * ------------------*/
00497
00498   while(blockSize3 > 0u)
00499   {
00500     /* Accumulator is made zero for every iteration */
00501     sum = 0;
00502
00503     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00504     k = blockSize3 >> 2u;
00505
00506     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00507      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00508     while(k > 0u)
00509     {
00510       /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
00511       sum += (q63_t) * px++ * (*py--);
00512       /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
00513       sum += (q63_t) * px++ * (*py--);
00514       /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
00515       sum += (q63_t) * px++ * (*py--);
00516       /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
00517       sum += (q63_t) * px++ * (*py--);
00518
00519       /* Decrement the loop counter */
00520       k--;
00521     }
00522
00523     /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
00524      ** No loop unrolling is used. */
00525     k = blockSize3 % 0x4u;
00526
00527     while(k > 0u)
00528     {
00529       /* Perform the multiply-accumulate */
00530       sum += (q63_t) * px++ * (*py--);
00531
00532       /* Decrement the loop counter */
00533       k--;
00534     }
00535
00536     /* Store the result in the accumulator in the destination buffer. */
00537     *pOut++ = (q31_t) (sum >> 31);
00538
00539     /* Update the inputA and inputB pointers for next MAC calculation */
00540     px = ++pSrc1;
00541     py = pSrc2;
00542
00543     /* Decrement the loop counter */
00544     blockSize3--;
00545   }
00546
00547 #else
00548
00549   /* Run the below code for Cortex-M0 */
00550
00551   q31_t *pIn1 = pSrcA;                           /* input pointer */
00552   q31_t *pIn2 = pSrcB;                           /* coefficient pointer */
00553   q63_t sum;                                     /* Accumulator */
00554   uint32_t i, j;                                 /* loop counter */
00555
00556   /* Loop to calculate output of convolution for output length number of times */
00557   for (i = 0; i < (srcALen + srcBLen - 1); i++)
00558   {
00559     /* Initialize sum with zero to carry on MAC operations */
00560     sum = 0;
00561
00562     /* Loop to perform MAC operations according to convolution equation */
00563     for (j = 0; j <= i; j++)
00564     {
00565       /* Check the array limitations */
00566       if(((i - j) < srcBLen) && (j < srcALen))
00567       {
00568         /* z[i] += x[i-j] * y[j] */
00569         sum += ((q63_t) pIn1[j] * (pIn2[i - j]));
00570       }
00571     }
00572
00573     /* Store the output in the destination buffer */
00574     pDst[i] = (q31_t) (sum >> 31u);
00575   }
00576
00577 #endif /*     #ifndef ARM_MATH_CM0 */
00578
00579 }
00580
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM0.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM0.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM0.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM3.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM3.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM3.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM4.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_convolution_example/system_ARMCM4.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM4.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
00062     SCB->CPACR |= ((3UL << 10*2) |                 /* set CP10 Full Access */
00063                    (3UL << 11*2)  );               /* set CP11 Full Access */
00064   #endif
00065
00066   SystemCoreClock = __SYSTEM_CLOCK;
00067
00068 #ifdef __USE_GPIO
00069   ARM_GPIO0->DATA[0].WORD = 0;
00070   ARM_GPIO0->IE = 0;
00071   ARM_GPIO0->DIR = 0xff83;
00072
00073   ARM_GPIO1->DATA[0].WORD = 0;
00074   ARM_GPIO1->IE = 0;
00075   ARM_GPIO1->DIR = 0;
00076
00077   ARM_GPIO2->DATA[0].WORD = 0;
00078   ARM_GPIO2->IE = 0;
00079   ARM_GPIO2->DIR = 0;
00080 #endif
00081 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_convolution_example/arm_convolution_example_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_convolution_example/arm_convolution_example_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        29. November 2010
00005 * $Revision:    V1.0.3
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_convolution_example_f32.c
00009 *
00010 * Description:  Example code demonstrating Convolution of two input signals using fft.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 *
00015 * Version 1.0.3 2010/11/29
00016 *    Re-organized the CMSIS folders and updated documentation.
00017 *
00018 * Version 1.0.1 2010/10/05 KK
00019 *    Production release and review comments incorporated.
00020 *
00021 * Version 1.0.0 2010/09/20 KK
00022 *    Production release and review comments incorporated.
00023 * ------------------------------------------------------------------- */
00024
00086 #include "arm_math.h"
00087 #include "math_helper.h"
00088
00089 /* ----------------------------------------------------------------------
00090 * Defines each of the tests performed
00091 * ------------------------------------------------------------------- */
00092 #define MAX_BLOCKSIZE   128
00093 #define DELTA           (0.000001f)
00094 #define SNR_THRESHOLD   90
00095
00096 /* ----------------------------------------------------------------------
00097 * Declare I/O buffers
00098 * ------------------------------------------------------------------- */
00099 float32_t Ak[MAX_BLOCKSIZE];            /* Input A */
00100 float32_t Bk[MAX_BLOCKSIZE];            /* Input B */
00101 float32_t AxB[MAX_BLOCKSIZE * 2];       /* Output */
00102
00103 /* ----------------------------------------------------------------------
00104 * Test input data for Floating point Convolution example for 32-blockSize
00105 * Generated by the MATLAB randn() function
00106 * ------------------------------------------------------------------- */
00107 float32_t testInputA_f32[64] =
00108 {
00109 -0.808920,      1.357369,       1.180861,       -0.504544,      1.762637,       -0.703285,
00110 1.696966,       0.620571,       -0.151093,      -0.100235,      -0.872382,      -0.403579,
00111 -0.860749,      -0.382648,      -1.052338,      0.128113,       -0.646269,      1.093377,
00112 -2.209198,      0.471706,       0.408901,       1.266242,       0.598252,       1.176827,
00113 -0.203421,      0.213596,       -0.851964,      -0.466958,      0.021841,       -0.698938,
00114 -0.604107,      0.461778,       -0.318219,      0.942520,       0.577585,       0.417619,
00115 0.614665,       0.563679,       -1.295073,      -0.764437,      0.952194,       -0.859222,
00116 -0.618554,      -2.268542,      -1.210592,      1.655853,       -2.627219,      -0.994249,
00117 -1.374704,      0.343799,       0.025619,       1.227481,       -0.708031,      0.069355,
00118 -1.845228,      -1.570886,      1.010668,       -1.802084,      1.630088,       1.286090,
00119 -0.161050,      -0.940794,      0.367961,       0.291907
00120
00121 };
00122
00123 float32_t testInputB_f32[64] =
00124 {
00125 0.933724,       0.046881,       1.316470,       0.438345,       0.332682,       2.094885,
00126 0.512081,       0.035546,       0.050894,       -2.320371,      0.168711,       -1.830493,
00127 -0.444834,      -1.003242,      -0.531494,      -1.365600,      -0.155420,      -0.757692,
00128 -0.431880,      -0.380021,      0.096243,       -0.695835,      0.558850,       -1.648962,
00129 0.020369,       -0.363630,      0.887146,       0.845503,       -0.252864,      -0.330397,
00130 1.269131,       -1.109295,      -1.027876,      0.135940,       0.116721,       -0.293399,
00131 -1.349799,      0.166078,       -0.802201,      0.369367,       -0.964568,      -2.266011,
00132 0.465178,       0.651222,       -0.325426,      0.320245,       -0.784178,      -0.579456,
00133 0.093374,       0.604778,       -0.048225,      0.376297,       -0.394412,      0.578182,
00134 -1.218141,      -1.387326,      0.692462,       -0.631297,      0.153137,       -0.638952,
00135 0.635474,       -0.970468,      1.334057,       -0.111370
00136 };
00137
00138 const float testRefOutput_f32[126] =
00139 {
00140 -0.818943,      1.229484,       -0.533664,      1.016604,       0.341875,       -1.963656,
00141 5.171476,       3.478033,       7.616361,       6.648384,       0.479069,       1.792012,
00142 -1.295591,      -7.447818,      0.315830,       -10.657445,     -2.483469,      -6.524236,
00143 -7.380591,      -3.739005,      -8.388957,      0.184147,       -1.554888,      3.786508,
00144 -1.684421,      5.400610,       -1.578126,      7.403361,       8.315999,       2.080267,
00145 11.077776,      2.749673,       7.138962,       2.748762,       0.660363,       0.981552,
00146 1.442275,       0.552721,       -2.576892,      4.703989,       0.989156,       8.759344,
00147 -0.564825,      -3.994680,      0.954710,       -5.014144,      6.592329,       1.599488,
00148 -13.979146,     -0.391891,      -4.453369,      -2.311242,      -2.948764,      1.761415,
00149 -0.138322,      10.433007,      -2.309103,      4.297153,       8.535523,       3.209462,
00150 8.695819,       5.569919,       2.514304,       5.582029,       2.060199,       0.642280,
00151 7.024616,       1.686615,       -6.481756,      1.343084,       -3.526451,      1.099073,
00152 -2.965764,      -0.173723,      -4.111484,      6.528384,       -6.965658,      1.726291,
00153 1.535172,       11.023435,      2.338401,       -4.690188,      1.298210,       3.943885,
00154 8.407885,       5.168365,       0.684131,       1.559181,       1.859998,       2.852417,
00155 8.574070,       -6.369078,      6.023458,       11.837963,      -6.027632,      4.469678,
00156 -6.799093,      -2.674048,      6.250367,       -6.809971,      -3.459360,      9.112410,
00157 -2.711621,      -1.336678,      1.564249,       -1.564297,      -1.296760,      8.904013,
00158 -3.230109,      6.878013,       -7.819823,      3.369909,       -1.657410,      -2.007358,
00159 -4.112825,      1.370685,       -3.420525,      -6.276605,      3.244873,       -3.352638,
00160 1.545372,       0.902211,       0.197489,       -1.408732,      0.523390,       0.348440
00161 };
00162
00163
00164 /* ----------------------------------------------------------------------
00165 * Declare Global variables
00166 * ------------------------------------------------------------------- */
00167 uint32_t srcALen = 64;   /* Length of Input A */
00168 uint32_t srcBLen = 64;   /* Length of Input B */
00169 uint32_t outLen;                 /* Length of convolution output */
00170 float32_t snr;                   /* output SNR */
00171
00172 int32_t main(void)
00173 {
00174         arm_status status;         /* Status of the example */
00175         arm_cfft_radix4_instance_f32 cfft_instance;     /* CFFT Structure instance */
00176
00177         /* CFFT Structure instance pointer */
00178     arm_cfft_radix4_instance_f32 *cfft_instance_ptr =
00179                         (arm_cfft_radix4_instance_f32*) &cfft_instance;
00180
00181         /* output length of convolution */
00182         outLen = srcALen + srcBLen - 1;
00183
00184         /* Initialise the fft input buffers with all zeros */
00185         arm_fill_f32(0.0,  Ak, MAX_BLOCKSIZE);
00186         arm_fill_f32(0.0,  Bk, MAX_BLOCKSIZE);
00187
00188         /* Copy the input values to the fft input buffers */
00189         arm_copy_f32(testInputA_f32,  Ak, MAX_BLOCKSIZE/2);
00190         arm_copy_f32(testInputB_f32,  Bk, MAX_BLOCKSIZE/2);
00191
00192         /* Initialize the CFFT function to compute 64 point fft */
00193     status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 0, 1);
00194
00195         /* Transform input a[n] from time domain to frequency domain A[k] */
00196         arm_cfft_radix4_f32(cfft_instance_ptr, Ak);
00197         /* Transform input b[n] from time domain to frequency domain B[k] */
00198         arm_cfft_radix4_f32(cfft_instance_ptr, Bk);
00199
00200         /* Complex Multiplication of the two input buffers in frequency domain */
00201         arm_cmplx_mult_cmplx_f32(Ak, Bk, AxB, MAX_BLOCKSIZE/2);
00202
00203     /* Initialize the CIFFT function to compute 64 point ifft */
00204         status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 1, 1);
00205
00206         /* Transform the multiplication output from frequency domain to time domain,
00207            that gives the convolved output  */
00208         arm_cfft_radix4_f32(cfft_instance_ptr, AxB);
00209
00210         /* SNR Calculation */
00211         snr = arm_snr_f32((float32_t *)testRefOutput_f32, AxB, srcALen + srcBLen - 1);
00212
00213         /* Compare the SNR with threshold to test whether the
00214            computed output is matched with the reference output values. */
00215         if( snr > SNR_THRESHOLD)
00216         {
00217                 status = ARM_MATH_SUCCESS;
00218         }
00219
00220         if( status != ARM_MATH_SUCCESS)
00221         {
00222           while(1);
00223         }
00224
00225     while(1);                             /* main function does not return */
00226 }
00227
00228
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_copy_f32.c
00009 *
00010 * Description:  Copies the elements of a floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00066 void arm_copy_f32(
00067   float32_t * pSrc,
00068   float32_t * pDst,
00069   uint32_t blockSize)
00070 {
00071   uint32_t blkCnt;                               /* loop counter */
00072
00073 #ifndef ARM_MATH_CM0
00074
00075   /* Run the below code for Cortex-M4 and Cortex-M3 */
00076
00077   /*loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079
00080   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00081    ** a second loop below computes the remaining 1 to 3 samples. */
00082   while(blkCnt > 0u)
00083   {
00084     /* C = A */
00085     /* Copy and then store the results in the destination buffer */
00086     *pDst++ = *pSrc++;
00087     *pDst++ = *pSrc++;
00088     *pDst++ = *pSrc++;
00089     *pDst++ = *pSrc++;
00090
00091     /* Decrement the loop counter */
00092     blkCnt--;
00093   }
00094
00095   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00096    ** No loop unrolling is used. */
00097   blkCnt = blockSize % 0x4u;
00098
00099 #else
00100
00101   /* Run the below code for Cortex-M0 */
00102
00103   /* Loop over blockSize number of values */
00104   blkCnt = blockSize;
00105
00106 #endif /* #ifndef ARM_MATH_CM0 */
00107
00108   while(blkCnt > 0u)
00109   {
00110     /* C = A */
00111     /* Copy and then store the results in the destination buffer */
00112     *pDst++ = *pSrc++;
00113
00114     /* Decrement the loop counter */
00115     blkCnt--;
00116   }
00117 }
00118
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_copy_q7.c
00009 *
00010 * Description:  Copies the elements of a Q7 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00053 void arm_copy_q7(
00054   q7_t * pSrc,
00055   q7_t * pDst,
00056   uint32_t blockSize)
00057 {
00058   uint32_t blkCnt;                               /* loop counter */
00059
00060 #ifndef ARM_MATH_CM0
00061
00062   /* Run the below code for Cortex-M4 and Cortex-M3 */
00063
00064   /*loop Unrolling */
00065   blkCnt = blockSize >> 2u;
00066
00067   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00068    ** a second loop below computes the remaining 1 to 3 samples. */
00069   while(blkCnt > 0u)
00070   {
00071     /* C = A */
00072     /* Copy and then store the results in the destination buffer */
00073     /* 4 samples are copied and stored at a time using SIMD */
00074     *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
00075
00076     /* Decrement the loop counter */
00077     blkCnt--;
00078   }
00079
00080   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00081    ** No loop unrolling is used. */
00082   blkCnt = blockSize % 0x4u;
00083
00084 #else
00085
00086   /* Run the below code for Cortex-M0 */
00087
00088   /* Loop over blockSize number of values */
00089   blkCnt = blockSize;
00090
00091 #endif /* #ifndef ARM_MATH_CM0 */
00092
00093
00094   while(blkCnt > 0u)
00095   {
00096     /* C = A */
00097     /* Copy and then store the results in the destination buffer */
00098     *pDst++ = *pSrc++;
00099
00100     /* Decrement the loop counter */
00101     blkCnt--;
00102   }
00103 }
00104
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_copy_q15.c
00009 *
00010 * Description:  Copies the elements of a Q15 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00052 void arm_copy_q15(
00053   q15_t * pSrc,
00054   q15_t * pDst,
00055   uint32_t blockSize)
00056 {
00057   uint32_t blkCnt;                               /* loop counter */
00058
00059 #ifndef ARM_MATH_CM0
00060
00061   /* Run the below code for Cortex-M4 and Cortex-M3 */
00062
00063   q15_t in1, in2;                                /* Temporary variables */
00064
00065
00066   /*loop Unrolling */
00067   blkCnt = blockSize >> 2u;
00068
00069   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00070    ** a second loop below computes the remaining 1 to 3 samples. */
00071   while(blkCnt > 0u)
00072   {
00073     /* C = A */
00074     /* Read two inputs */
00075     in1 = *pSrc++;
00076     in2 = *pSrc++;
00077
00078 #ifndef ARM_MATH_BIG_ENDIAN
00079
00080     /* Store the values in the destination buffer by packing the two inputs */
00081     *__SIMD32(pDst)++ = __PKHBT(in1, in2, 16);
00082
00083     in1 = *pSrc++;
00084     in2 = *pSrc++;
00085     *__SIMD32(pDst)++ = __PKHBT(in1, in2, 16);
00086
00087 #else
00088
00089     /* Store the values in the destination buffer by packing the two inputs */
00090     *__SIMD32(pDst)++ = __PKHBT(in2, in1, 16);
00091
00092     in1 = *pSrc++;
00093     in2 = *pSrc++;
00094     *__SIMD32(pDst)++ = __PKHBT(in2, in1, 16);
00095
00096
00097 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00098
00099     /* Decrement the loop counter */
00100     blkCnt--;
00101   }
00102
00103   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00104    ** No loop unrolling is used. */
00105   blkCnt = blockSize % 0x4u;
00106
00107
00108 #else
00109
00110   /* Run the below code for Cortex-M0 */
00111
00112   /* Loop over blockSize number of values */
00113   blkCnt = blockSize;
00114
00115 #endif /* #ifndef ARM_MATH_CM0 */
00116
00117   while(blkCnt > 0u)
00118   {
00119     /* C = A */
00120     /* Copy and then store the value in the destination buffer */
00121     *pDst++ = *pSrc++;
00122
00123     /* Decrement the loop counter */
00124     blkCnt--;
00125   }
00126 }
00127
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_copy_q31.c
00009 *
00010 * Description:  Copies the elements of a Q31 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00053 void arm_copy_q31(
00054   q31_t * pSrc,
00055   q31_t * pDst,
00056   uint32_t blockSize)
00057 {
00058   uint32_t blkCnt;                               /* loop counter */
00059
00060
00061 #ifndef ARM_MATH_CM0
00062
00063   /* Run the below code for Cortex-M4 and Cortex-M3 */
00064
00065   /*loop Unrolling */
00066   blkCnt = blockSize >> 2u;
00067
00068   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00069    ** a second loop below computes the remaining 1 to 3 samples. */
00070   while(blkCnt > 0u)
00071   {
00072     /* C = A */
00073     /* Copy and then store the values in the destination buffer */
00074     *pDst++ = *pSrc++;
00075     *pDst++ = *pSrc++;
00076     *pDst++ = *pSrc++;
00077     *pDst++ = *pSrc++;
00078
00079     /* Decrement the loop counter */
00080     blkCnt--;
00081   }
00082
00083   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00084    ** No loop unrolling is used. */
00085   blkCnt = blockSize % 0x4u;
00086
00087 #else
00088
00089   /* Run the below code for Cortex-M0 */
00090
00091   /* Loop over blockSize number of values */
00092   blkCnt = blockSize;
00093
00094 #endif /* #ifndef ARM_MATH_CM0 */
00095
00096   while(blkCnt > 0u)
00097   {
00098     /* C = A */
00099     /* Copy and then store the value in the destination buffer */
00100     *pDst++ = *pSrc++;
00101
00102     /* Decrement the loop counter */
00103     blkCnt--;
00104   }
00105 }
00106
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_correlate_f32.c
00009 *
00010 * Description:   Correlation of floating-point sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00095 void arm_correlate_f32(
00096   float32_t * pSrcA,
00097   uint32_t srcALen,
00098   float32_t * pSrcB,
00099   uint32_t srcBLen,
00100   float32_t * pDst)
00101 {
00102
00103
00104 #ifndef ARM_MATH_CM0
00105
00106   /* Run the below code for Cortex-M4 and Cortex-M3 */
00107
00108   float32_t *pIn1;                               /* inputA pointer */
00109   float32_t *pIn2;                               /* inputB pointer */
00110   float32_t *pOut = pDst;                        /* output pointer */
00111   float32_t *px;                                 /* Intermediate inputA pointer */
00112   float32_t *py;                                 /* Intermediate inputB pointer */
00113   float32_t *pSrc1;                              /* Intermediate pointers */
00114   float32_t sum, acc0, acc1, acc2, acc3;         /* Accumulators */
00115   float32_t x0, x1, x2, x3, c0;                  /* temporary variables for holding input and coefficient values */
00116   uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counters */
00117   int32_t inc = 1;                               /* Destination address modifier */
00118
00119
00120   /* The algorithm implementation is based on the lengths of the inputs. */
00121   /* srcB is always made to slide across srcA. */
00122   /* So srcBLen is always considered as shorter or equal to srcALen */
00123   /* But CORR(x, y) is reverse of CORR(y, x) */
00124   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
00125   /* and the destination pointer modifier, inc is set to -1 */
00126   /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
00127   /* But to improve the performance,
00128    * we include zeroes in the output instead of zero padding either of the the inputs*/
00129   /* If srcALen > srcBLen,
00130    * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
00131   /* If srcALen < srcBLen,
00132    * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
00133   if(srcALen >= srcBLen)
00134   {
00135     /* Initialization of inputA pointer */
00136     pIn1 = pSrcA;
00137
00138     /* Initialization of inputB pointer */
00139     pIn2 = pSrcB;
00140
00141     /* Number of output samples is calculated */
00142     outBlockSize = (2u * srcALen) - 1u;
00143
00144     /* When srcALen > srcBLen, zero padding has to be done to srcB
00145      * to make their lengths equal.
00146      * Instead, (outBlockSize - (srcALen + srcBLen - 1))
00147      * number of output samples are made zero */
00148     j = outBlockSize - (srcALen + (srcBLen - 1u));
00149
00150     /* Updating the pointer position to non zero value */
00151     pOut += j;
00152
00153     //while(j > 0u)
00154     //{
00155     //  /* Zero is stored in the destination buffer */
00156     //  *pOut++ = 0.0f;
00157
00158     //  /* Decrement the loop counter */
00159     //  j--;
00160     //}
00161
00162   }
00163   else
00164   {
00165     /* Initialization of inputA pointer */
00166     pIn1 = pSrcB;
00167
00168     /* Initialization of inputB pointer */
00169     pIn2 = pSrcA;
00170
00171     /* srcBLen is always considered as shorter or equal to srcALen */
00172     j = srcBLen;
00173     srcBLen = srcALen;
00174     srcALen = j;
00175
00176     /* CORR(x, y) = Reverse order(CORR(y, x)) */
00177     /* Hence set the destination pointer to point to the last output sample */
00178     pOut = pDst + ((srcALen + srcBLen) - 2u);
00179
00180     /* Destination address modifier is set to -1 */
00181     inc = -1;
00182
00183   }
00184
00185   /* The function is internally
00186    * divided into three parts according to the number of multiplications that has to be
00187    * taken place between inputA samples and inputB samples. In the first part of the
00188    * algorithm, the multiplications increase by one for every iteration.
00189    * In the second part of the algorithm, srcBLen number of multiplications are done.
00190    * In the third part of the algorithm, the multiplications decrease by one
00191    * for every iteration.*/
00192   /* The algorithm is implemented in three stages.
00193    * The loop counters of each stage is initiated here. */
00194   blockSize1 = srcBLen - 1u;
00195   blockSize2 = srcALen - (srcBLen - 1u);
00196   blockSize3 = blockSize1;
00197
00198   /* --------------------------
00199    * Initializations of stage1
00200    * -------------------------*/
00201
00202   /* sum = x[0] * y[srcBlen - 1]
00203    * sum = x[0] * y[srcBlen-2] + x[1] * y[srcBlen - 1]
00204    * ....
00205    * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
00206    */
00207
00208   /* In this stage the MAC operations are increased by 1 for every iteration.
00209      The count variable holds the number of MAC operations performed */
00210   count = 1u;
00211
00212   /* Working pointer of inputA */
00213   px = pIn1;
00214
00215   /* Working pointer of inputB */
00216   pSrc1 = pIn2 + (srcBLen - 1u);
00217   py = pSrc1;
00218
00219   /* ------------------------
00220    * Stage1 process
00221    * ----------------------*/
00222
00223   /* The first stage starts here */
00224   while(blockSize1 > 0u)
00225   {
00226     /* Accumulator is made zero for every iteration */
00227     sum = 0.0f;
00228
00229     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00230     k = count >> 2u;
00231
00232     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00233      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00234     while(k > 0u)
00235     {
00236       /* x[0] * y[srcBLen - 4] */
00237       sum += *px++ * *py++;
00238       /* x[1] * y[srcBLen - 3] */
00239       sum += *px++ * *py++;
00240       /* x[2] * y[srcBLen - 2] */
00241       sum += *px++ * *py++;
00242       /* x[3] * y[srcBLen - 1] */
00243       sum += *px++ * *py++;
00244
00245       /* Decrement the loop counter */
00246       k--;
00247     }
00248
00249     /* If the count is not a multiple of 4, compute any remaining MACs here.
00250      ** No loop unrolling is used. */
00251     k = count % 0x4u;
00252
00253     while(k > 0u)
00254     {
00255       /* Perform the multiply-accumulate */
00256       /* x[0] * y[srcBLen - 1] */
00257       sum += *px++ * *py++;
00258
00259       /* Decrement the loop counter */
00260       k--;
00261     }
00262
00263     /* Store the result in the accumulator in the destination buffer. */
00264     *pOut = sum;
00265     /* Destination pointer is updated according to the address modifier, inc */
00266     pOut += inc;
00267
00268     /* Update the inputA and inputB pointers for next MAC calculation */
00269     py = pSrc1 - count;
00270     px = pIn1;
00271
00272     /* Increment the MAC count */
00273     count++;
00274
00275     /* Decrement the loop counter */
00276     blockSize1--;
00277   }
00278
00279   /* --------------------------
00280    * Initializations of stage2
00281    * ------------------------*/
00282
00283   /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
00284    * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
00285    * ....
00286    * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00287    */
00288
00289   /* Working pointer of inputA */
00290   px = pIn1;
00291
00292   /* Working pointer of inputB */
00293   py = pIn2;
00294
00295   /* count is index by which the pointer pIn1 to be incremented */
00296   count = 1u;
00297
00298   /* -------------------
00299    * Stage2 process
00300    * ------------------*/
00301
00302   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00303    * So, to loop unroll over blockSize2,
00304    * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
00305   if(srcBLen >= 4u)
00306   {
00307     /* Loop unroll over blockSize2, by 4 */
00308     blkCnt = blockSize2 >> 2u;
00309
00310     while(blkCnt > 0u)
00311     {
00312       /* Set all accumulators to zero */
00313       acc0 = 0.0f;
00314       acc1 = 0.0f;
00315       acc2 = 0.0f;
00316       acc3 = 0.0f;
00317
00318       /* read x[0], x[1], x[2] samples */
00319       x0 = *(px++);
00320       x1 = *(px++);
00321       x2 = *(px++);
00322
00323       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00324       k = srcBLen >> 2u;
00325
00326       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00327        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00328       do
00329       {
00330         /* Read y[0] sample */
00331         c0 = *(py++);
00332
00333         /* Read x[3] sample */
00334         x3 = *(px++);
00335
00336         /* Perform the multiply-accumulate */
00337         /* acc0 +=  x[0] * y[0] */
00338         acc0 += x0 * c0;
00339         /* acc1 +=  x[1] * y[0] */
00340         acc1 += x1 * c0;
00341         /* acc2 +=  x[2] * y[0] */
00342         acc2 += x2 * c0;
00343         /* acc3 +=  x[3] * y[0] */
00344         acc3 += x3 * c0;
00345
00346         /* Read y[1] sample */
00347         c0 = *(py++);
00348
00349         /* Read x[4] sample */
00350         x0 = *(px++);
00351
00352         /* Perform the multiply-accumulate */
00353         /* acc0 +=  x[1] * y[1] */
00354         acc0 += x1 * c0;
00355         /* acc1 +=  x[2] * y[1] */
00356         acc1 += x2 * c0;
00357         /* acc2 +=  x[3] * y[1] */
00358         acc2 += x3 * c0;
00359         /* acc3 +=  x[4] * y[1] */
00360         acc3 += x0 * c0;
00361
00362         /* Read y[2] sample */
00363         c0 = *(py++);
00364
00365         /* Read x[5] sample */
00366         x1 = *(px++);
00367
00368         /* Perform the multiply-accumulates */
00369         /* acc0 +=  x[2] * y[2] */
00370         acc0 += x2 * c0;
00371         /* acc1 +=  x[3] * y[2] */
00372         acc1 += x3 * c0;
00373         /* acc2 +=  x[4] * y[2] */
00374         acc2 += x0 * c0;
00375         /* acc3 +=  x[5] * y[2] */
00376         acc3 += x1 * c0;
00377
00378         /* Read y[3] sample */
00379         c0 = *(py++);
00380
00381         /* Read x[6] sample */
00382         x2 = *(px++);
00383
00384         /* Perform the multiply-accumulates */
00385         /* acc0 +=  x[3] * y[3] */
00386         acc0 += x3 * c0;
00387         /* acc1 +=  x[4] * y[3] */
00388         acc1 += x0 * c0;
00389         /* acc2 +=  x[5] * y[3] */
00390         acc2 += x1 * c0;
00391         /* acc3 +=  x[6] * y[3] */
00392         acc3 += x2 * c0;
00393
00394
00395       } while(--k);
00396
00397       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00398        ** No loop unrolling is used. */
00399       k = srcBLen % 0x4u;
00400
00401       while(k > 0u)
00402       {
00403         /* Read y[4] sample */
00404         c0 = *(py++);
00405
00406         /* Read x[7] sample */
00407         x3 = *(px++);
00408
00409         /* Perform the multiply-accumulates */
00410         /* acc0 +=  x[4] * y[4] */
00411         acc0 += x0 * c0;
00412         /* acc1 +=  x[5] * y[4] */
00413         acc1 += x1 * c0;
00414         /* acc2 +=  x[6] * y[4] */
00415         acc2 += x2 * c0;
00416         /* acc3 +=  x[7] * y[4] */
00417         acc3 += x3 * c0;
00418
00419         /* Reuse the present samples for the next MAC */
00420         x0 = x1;
00421         x1 = x2;
00422         x2 = x3;
00423
00424         /* Decrement the loop counter */
00425         k--;
00426       }
00427
00428       /* Store the result in the accumulator in the destination buffer. */
00429       *pOut = acc0;
00430       /* Destination pointer is updated according to the address modifier, inc */
00431       pOut += inc;
00432
00433       *pOut = acc1;
00434       pOut += inc;
00435
00436       *pOut = acc2;
00437       pOut += inc;
00438
00439       *pOut = acc3;
00440       pOut += inc;
00441
00442       /* Update the inputA and inputB pointers for next MAC calculation */
00443       px = pIn1 + (count * 4u);
00444       py = pIn2;
00445
00446       /* Increment the pointer pIn1 index, count by 1 */
00447       count++;
00448
00449       /* Decrement the loop counter */
00450       blkCnt--;
00451     }
00452
00453     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00454      ** No loop unrolling is used. */
00455     blkCnt = blockSize2 % 0x4u;
00456
00457     while(blkCnt > 0u)
00458     {
00459       /* Accumulator is made zero for every iteration */
00460       sum = 0.0f;
00461
00462       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00463       k = srcBLen >> 2u;
00464
00465       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00466        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00467       while(k > 0u)
00468       {
00469         /* Perform the multiply-accumulates */
00470         sum += *px++ * *py++;
00471         sum += *px++ * *py++;
00472         sum += *px++ * *py++;
00473         sum += *px++ * *py++;
00474
00475         /* Decrement the loop counter */
00476         k--;
00477       }
00478
00479       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00480        ** No loop unrolling is used. */
00481       k = srcBLen % 0x4u;
00482
00483       while(k > 0u)
00484       {
00485         /* Perform the multiply-accumulate */
00486         sum += *px++ * *py++;
00487
00488         /* Decrement the loop counter */
00489         k--;
00490       }
00491
00492       /* Store the result in the accumulator in the destination buffer. */
00493       *pOut = sum;
00494       /* Destination pointer is updated according to the address modifier, inc */
00495       pOut += inc;
00496
00497       /* Update the inputA and inputB pointers for next MAC calculation */
00498       px = pIn1 + count;
00499       py = pIn2;
00500
00501       /* Increment the pointer pIn1 index, count by 1 */
00502       count++;
00503
00504       /* Decrement the loop counter */
00505       blkCnt--;
00506     }
00507   }
00508   else
00509   {
00510     /* If the srcBLen is not a multiple of 4,
00511      * the blockSize2 loop cannot be unrolled by 4 */
00512     blkCnt = blockSize2;
00513
00514     while(blkCnt > 0u)
00515     {
00516       /* Accumulator is made zero for every iteration */
00517       sum = 0.0f;
00518
00519       /* Loop over srcBLen */
00520       k = srcBLen;
00521
00522       while(k > 0u)
00523       {
00524         /* Perform the multiply-accumulate */
00525         sum += *px++ * *py++;
00526
00527         /* Decrement the loop counter */
00528         k--;
00529       }
00530
00531       /* Store the result in the accumulator in the destination buffer. */
00532       *pOut = sum;
00533       /* Destination pointer is updated according to the address modifier, inc */
00534       pOut += inc;
00535
00536       /* Update the inputA and inputB pointers for next MAC calculation */
00537       px = pIn1 + count;
00538       py = pIn2;
00539
00540       /* Increment the pointer pIn1 index, count by 1 */
00541       count++;
00542
00543       /* Decrement the loop counter */
00544       blkCnt--;
00545     }
00546   }
00547
00548   /* --------------------------
00549    * Initializations of stage3
00550    * -------------------------*/
00551
00552   /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00553    * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00554    * ....
00555    * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
00556    * sum +=  x[srcALen-1] * y[0]
00557    */
00558
00559   /* In this stage the MAC operations are decreased by 1 for every iteration.
00560      The count variable holds the number of MAC operations performed */
00561   count = srcBLen - 1u;
00562
00563   /* Working pointer of inputA */
00564   pSrc1 = pIn1 + (srcALen - (srcBLen - 1u));
00565   px = pSrc1;
00566
00567   /* Working pointer of inputB */
00568   py = pIn2;
00569
00570   /* -------------------
00571    * Stage3 process
00572    * ------------------*/
00573
00574   while(blockSize3 > 0u)
00575   {
00576     /* Accumulator is made zero for every iteration */
00577     sum = 0.0f;
00578
00579     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00580     k = count >> 2u;
00581
00582     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00583      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00584     while(k > 0u)
00585     {
00586       /* Perform the multiply-accumulates */
00587       /* sum += x[srcALen - srcBLen + 4] * y[3] */
00588       sum += *px++ * *py++;
00589       /* sum += x[srcALen - srcBLen + 3] * y[2] */
00590       sum += *px++ * *py++;
00591       /* sum += x[srcALen - srcBLen + 2] * y[1] */
00592       sum += *px++ * *py++;
00593       /* sum += x[srcALen - srcBLen + 1] * y[0] */
00594       sum += *px++ * *py++;
00595
00596       /* Decrement the loop counter */
00597       k--;
00598     }
00599
00600     /* If the count is not a multiple of 4, compute any remaining MACs here.
00601      ** No loop unrolling is used. */
00602     k = count % 0x4u;
00603
00604     while(k > 0u)
00605     {
00606       /* Perform the multiply-accumulates */
00607       sum += *px++ * *py++;
00608
00609       /* Decrement the loop counter */
00610       k--;
00611     }
00612
00613     /* Store the result in the accumulator in the destination buffer. */
00614     *pOut = sum;
00615     /* Destination pointer is updated according to the address modifier, inc */
00616     pOut += inc;
00617
00618     /* Update the inputA and inputB pointers for next MAC calculation */
00619     px = ++pSrc1;
00620     py = pIn2;
00621
00622     /* Decrement the MAC count */
00623     count--;
00624
00625     /* Decrement the loop counter */
00626     blockSize3--;
00627   }
00628
00629 #else
00630
00631   /* Run the below code for Cortex-M0 */
00632
00633   float32_t *pIn1 = pSrcA;                       /* inputA pointer */
00634   float32_t *pIn2 = pSrcB + (srcBLen - 1u);      /* inputB pointer */
00635   float32_t sum;                                 /* Accumulator */
00636   uint32_t i = 0u, j;                            /* loop counters */
00637   uint32_t inv = 0u;                             /* Reverse order flag */
00638   uint32_t tot = 0u;                             /* Length */
00639
00640   /* The algorithm implementation is based on the lengths of the inputs. */
00641   /* srcB is always made to slide across srcA. */
00642   /* So srcBLen is always considered as shorter or equal to srcALen */
00643   /* But CORR(x, y) is reverse of CORR(y, x) */
00644   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
00645   /* and a varaible, inv is set to 1 */
00646   /* If lengths are not equal then zero pad has to be done to  make the two
00647    * inputs of same length. But to improve the performance, we include zeroes
00648    * in the output instead of zero padding either of the the inputs*/
00649   /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
00650    * starting of the output buffer */
00651   /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
00652    * ending of the output buffer */
00653   /* Once the zero padding is done the remaining of the output is calcualted
00654    * using convolution but with the shorter signal time shifted. */
00655
00656   /* Calculate the length of the remaining sequence */
00657   tot = ((srcALen + srcBLen) - 2u);
00658
00659   if(srcALen > srcBLen)
00660   {
00661     /* Calculating the number of zeros to be padded to the output */
00662     j = srcALen - srcBLen;
00663
00664     /* Initialise the pointer after zero padding */
00665     pDst += j;
00666   }
00667
00668   else if(srcALen < srcBLen)
00669   {
00670     /* Initialization to inputB pointer */
00671     pIn1 = pSrcB;
00672
00673     /* Initialization to the end of inputA pointer */
00674     pIn2 = pSrcA + (srcALen - 1u);
00675
00676     /* Initialisation of the pointer after zero padding */
00677     pDst = pDst + tot;
00678
00679     /* Swapping the lengths */
00680     j = srcALen;
00681     srcALen = srcBLen;
00682     srcBLen = j;
00683
00684     /* Setting the reverse flag */
00685     inv = 1;
00686
00687   }
00688
00689   /* Loop to calculate convolution for output length number of times */
00690   for (i = 0u; i <= tot; i++)
00691   {
00692     /* Initialize sum with zero to carry on MAC operations */
00693     sum = 0.0f;
00694
00695     /* Loop to perform MAC operations according to convolution equation */
00696     for (j = 0u; j <= i; j++)
00697     {
00698       /* Check the array limitations */
00699       if((((i - j) < srcBLen) && (j < srcALen)))
00700       {
00701         /* z[i] += x[i-j] * y[j] */
00702         sum += pIn1[j] * pIn2[-((int32_t) i - j)];
00703       }
00704     }
00705     /* Store the output in the destination buffer */
00706     if(inv == 1)
00707       *pDst-- = sum;
00708     else
00709       *pDst++ = sum;
00710   }
00711
00712 #endif /*   #ifndef ARM_MATH_CM0 */
00713
00714 }
00715
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c
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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_correlate_fast_q15.c
00009 *
00010 * Description:  Fast Q15 Correlation.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00066 void arm_correlate_fast_q15(
00067   q15_t * pSrcA,
00068   uint32_t srcALen,
00069   q15_t * pSrcB,
00070   uint32_t srcBLen,
00071   q15_t * pDst)
00072 {
00073   q15_t *pIn1;                                   /* inputA pointer               */
00074   q15_t *pIn2;                                   /* inputB pointer               */
00075   q15_t *pOut = pDst;                            /* output pointer               */
00076   q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
00077   q15_t *px;                                     /* Intermediate inputA pointer  */
00078   q15_t *py;                                     /* Intermediate inputB pointer  */
00079   q15_t *pSrc1;                                  /* Intermediate pointers        */
00080   q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
00081   uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
00082   int32_t inc = 1;                               /* Destination address modifier */
00083   q31_t *pb;                                     /* 32 bit pointer for inputB buffer */
00084
00085
00086   /* The algorithm implementation is based on the lengths of the inputs. */
00087   /* srcB is always made to slide across srcA. */
00088   /* So srcBLen is always considered as shorter or equal to srcALen */
00089   /* But CORR(x, y) is reverse of CORR(y, x) */
00090   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
00091   /* and the destination pointer modifier, inc is set to -1 */
00092   /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
00093   /* But to improve the performance,
00094    * we include zeroes in the output instead of zero padding either of the the inputs*/
00095   /* If srcALen > srcBLen,
00096    * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
00097   /* If srcALen < srcBLen,
00098    * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
00099   if(srcALen >= srcBLen)
00100   {
00101     /* Initialization of inputA pointer */
00102     pIn1 = (pSrcA);
00103
00104     /* Initialization of inputB pointer */
00105     pIn2 = (pSrcB);
00106
00107     /* Number of output samples is calculated */
00108     outBlockSize = (2u * srcALen) - 1u;
00109
00110     /* When srcALen > srcBLen, zero padding is done to srcB
00111      * to make their lengths equal.
00112      * Instead, (outBlockSize - (srcALen + srcBLen - 1))
00113      * number of output samples are made zero */
00114     j = outBlockSize - (srcALen + (srcBLen - 1u));
00115
00116     /* Updating the pointer position to non zero value */
00117     pOut += j;
00118
00119   }
00120   else
00121   {
00122     /* Initialization of inputA pointer */
00123     pIn1 = (pSrcB);
00124
00125     /* Initialization of inputB pointer */
00126     pIn2 = (pSrcA);
00127
00128     /* srcBLen is always considered as shorter or equal to srcALen */
00129     j = srcBLen;
00130     srcBLen = srcALen;
00131     srcALen = j;
00132
00133     /* CORR(x, y) = Reverse order(CORR(y, x)) */
00134     /* Hence set the destination pointer to point to the last output sample */
00135     pOut = pDst + ((srcALen + srcBLen) - 2u);
00136
00137     /* Destination address modifier is set to -1 */
00138     inc = -1;
00139
00140   }
00141
00142   /* The function is internally
00143    * divided into three parts according to the number of multiplications that has to be
00144    * taken place between inputA samples and inputB samples. In the first part of the
00145    * algorithm, the multiplications increase by one for every iteration.
00146    * In the second part of the algorithm, srcBLen number of multiplications are done.
00147    * In the third part of the algorithm, the multiplications decrease by one
00148    * for every iteration.*/
00149   /* The algorithm is implemented in three stages.
00150    * The loop counters of each stage is initiated here. */
00151   blockSize1 = srcBLen - 1u;
00152   blockSize2 = srcALen - (srcBLen - 1u);
00153   blockSize3 = blockSize1;
00154
00155   /* --------------------------
00156    * Initializations of stage1
00157    * -------------------------*/
00158
00159   /* sum = x[0] * y[srcBlen - 1]
00160    * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
00161    * ....
00162    * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
00163    */
00164
00165   /* In this stage the MAC operations are increased by 1 for every iteration.
00166      The count variable holds the number of MAC operations performed */
00167   count = 1u;
00168
00169   /* Working pointer of inputA */
00170   px = pIn1;
00171
00172   /* Working pointer of inputB */
00173   pSrc1 = pIn2 + (srcBLen - 1u);
00174   py = pSrc1;
00175
00176   /* ------------------------
00177    * Stage1 process
00178    * ----------------------*/
00179
00180   /* The first loop starts here */
00181   while(blockSize1 > 0u)
00182   {
00183     /* Accumulator is made zero for every iteration */
00184     sum = 0;
00185
00186     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00187     k = count >> 2;
00188
00189     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00190      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00191     while(k > 0u)
00192     {
00193       /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
00194       sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
00195       /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */
00196       sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
00197
00198       /* Decrement the loop counter */
00199       k--;
00200     }
00201
00202     /* If the count is not a multiple of 4, compute any remaining MACs here.
00203      ** No loop unrolling is used. */
00204     k = count % 0x4u;
00205
00206     while(k > 0u)
00207     {
00208       /* Perform the multiply-accumulates */
00209       /* x[0] * y[srcBLen - 1] */
00210       sum = __SMLAD(*px++, *py++, sum);
00211
00212       /* Decrement the loop counter */
00213       k--;
00214     }
00215
00216     /* Store the result in the accumulator in the destination buffer. */
00217     *pOut = (q15_t) (sum >> 15);
00218     /* Destination pointer is updated according to the address modifier, inc */
00219     pOut += inc;
00220
00221     /* Update the inputA and inputB pointers for next MAC calculation */
00222     py = pSrc1 - count;
00223     px = pIn1;
00224
00225     /* Increment the MAC count */
00226     count++;
00227
00228     /* Decrement the loop counter */
00229     blockSize1--;
00230   }
00231
00232   /* --------------------------
00233    * Initializations of stage2
00234    * ------------------------*/
00235
00236   /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
00237    * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
00238    * ....
00239    * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00240    */
00241
00242   /* Working pointer of inputA */
00243   px = pIn1;
00244
00245   /* Working pointer of inputB */
00246   py = pIn2;
00247
00248   /* Initialize inputB pointer of type q31 */
00249   pb = (q31_t *) (py);
00250
00251   /* count is index by which the pointer pIn1 to be incremented */
00252   count = 0u;
00253
00254   /* -------------------
00255    * Stage2 process
00256    * ------------------*/
00257
00258   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00259    * So, to loop unroll over blockSize2,
00260    * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
00261   if(srcBLen >= 4u)
00262   {
00263     /* Loop unroll over blockSize2, by 4 */
00264     blkCnt = blockSize2 >> 2u;
00265
00266     while(blkCnt > 0u)
00267     {
00268       /* Set all accumulators to zero */
00269       acc0 = 0;
00270       acc1 = 0;
00271       acc2 = 0;
00272       acc3 = 0;
00273
00274       /* read x[0], x[1] samples */
00275       x0 = *(q31_t *) (px++);
00276       /* read x[1], x[2] samples */
00277       x1 = *(q31_t *) (px++);
00278
00279       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00280       k = srcBLen >> 2u;
00281
00282       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00283        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00284       do
00285       {
00286         /* Read the first two inputB samples using SIMD:
00287          * y[0] and y[1] */
00288         c0 = *(pb++);
00289
00290         /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
00291         acc0 = __SMLAD(x0, c0, acc0);
00292
00293         /* acc1 +=  x[1] * y[0] + x[2] * y[1] */
00294         acc1 = __SMLAD(x1, c0, acc1);
00295
00296         /* Read x[2], x[3] */
00297         x2 = *(q31_t *) (px++);
00298
00299         /* Read x[3], x[4] */
00300         x3 = *(q31_t *) (px++);
00301
00302         /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
00303         acc2 = __SMLAD(x2, c0, acc2);
00304
00305         /* acc3 +=  x[3] * y[0] + x[4] * y[1] */
00306         acc3 = __SMLAD(x3, c0, acc3);
00307
00308         /* Read y[2] and y[3] */
00309         c0 = *(pb++);
00310
00311         /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
00312         acc0 = __SMLAD(x2, c0, acc0);
00313
00314         /* acc1 +=  x[3] * y[2] + x[4] * y[3] */
00315         acc1 = __SMLAD(x3, c0, acc1);
00316
00317         /* Read x[4], x[5] */
00318         x0 = *(q31_t *) (px++);
00319
00320         /* Read x[5], x[6] */
00321         x1 = *(q31_t *) (px++);
00322
00323         /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
00324         acc2 = __SMLAD(x0, c0, acc2);
00325
00326         /* acc3 +=  x[5] * y[2] + x[6] * y[3] */
00327         acc3 = __SMLAD(x1, c0, acc3);
00328
00329       } while(--k);
00330
00331       /* For the next MAC operations, SIMD is not used
00332        * So, the 16 bit pointer if inputB, py is updated */
00333       py = (q15_t *) (pb);
00334
00335       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00336        ** No loop unrolling is used. */
00337       k = srcBLen % 0x4u;
00338
00339       if(k == 1u)
00340       {
00341         /* Read y[4] */
00342         c0 = *py;
00343 #ifdef  ARM_MATH_BIG_ENDIAN
00344
00345         c0 = c0 << 16u;
00346
00347 #else
00348
00349         c0 = c0 & 0x0000FFFF;
00350
00351 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00352
00353         /* Read x[7] */
00354         x3 = *(q31_t *) px++;
00355
00356         /* Perform the multiply-accumulates */
00357         acc0 = __SMLAD(x0, c0, acc0);
00358         acc1 = __SMLAD(x1, c0, acc1);
00359         acc2 = __SMLADX(x1, c0, acc2);
00360         acc3 = __SMLADX(x3, c0, acc3);
00361       }
00362
00363       if(k == 2u)
00364       {
00365         /* Read y[4], y[5] */
00366         c0 = *(pb);
00367
00368         /* Read x[7], x[8] */
00369         x3 = *(q31_t *) px++;
00370
00371         /* Read x[9] */
00372         x2 = *(q31_t *) px++;
00373
00374         /* Perform the multiply-accumulates */
00375         acc0 = __SMLAD(x0, c0, acc0);
00376         acc1 = __SMLAD(x1, c0, acc1);
00377         acc2 = __SMLAD(x3, c0, acc2);
00378         acc3 = __SMLAD(x2, c0, acc3);
00379       }
00380
00381       if(k == 3u)
00382       {
00383         /* Read y[4], y[5] */
00384         c0 = *pb++;
00385
00386         /* Read x[7], x[8] */
00387         x3 = *(q31_t *) px++;
00388
00389         /* Read x[9] */
00390         x2 = *(q31_t *) px++;
00391
00392         /* Perform the multiply-accumulates */
00393         acc0 = __SMLAD(x0, c0, acc0);
00394         acc1 = __SMLAD(x1, c0, acc1);
00395         acc2 = __SMLAD(x3, c0, acc2);
00396         acc3 = __SMLAD(x2, c0, acc3);
00397
00398         /* Read y[6] */
00399 #ifdef  ARM_MATH_BIG_ENDIAN
00400         c0 = (*pb);
00401         c0 = c0 & 0xFFFF0000;
00402
00403 #else
00404         c0 = (q15_t) (*pb);
00405         c0 = c0 & 0x0000FFFF;
00406
00407 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00408
00409         /* Read x[10] */
00410         x3 = *(q31_t *) px++;
00411
00412         /* Perform the multiply-accumulates */
00413         acc0 = __SMLADX(x1, c0, acc0);
00414         acc1 = __SMLAD(x2, c0, acc1);
00415         acc2 = __SMLADX(x2, c0, acc2);
00416         acc3 = __SMLADX(x3, c0, acc3);
00417       }
00418
00419       /* Store the result in the accumulator in the destination buffer. */
00420       *pOut = (q15_t) (acc0 >> 15);
00421       /* Destination pointer is updated according to the address modifier, inc */
00422       pOut += inc;
00423
00424       *pOut = (q15_t) (acc1 >> 15);
00425       pOut += inc;
00426
00427       *pOut = (q15_t) (acc2 >> 15);
00428       pOut += inc;
00429
00430       *pOut = (q15_t) (acc3 >> 15);
00431       pOut += inc;
00432
00433       /* Increment the pointer pIn1 index, count by 1 */
00434       count += 4u;
00435
00436       /* Update the inputA and inputB pointers for next MAC calculation */
00437       px = pIn1 + count;
00438       py = pIn2;
00439       pb = (q31_t *) (py);
00440
00441
00442       /* Decrement the loop counter */
00443       blkCnt--;
00444     }
00445
00446     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00447      ** No loop unrolling is used. */
00448     blkCnt = blockSize2 % 0x4u;
00449
00450     while(blkCnt > 0u)
00451     {
00452       /* Accumulator is made zero for every iteration */
00453       sum = 0;
00454
00455       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00456       k = srcBLen >> 2u;
00457
00458       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00459        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00460       while(k > 0u)
00461       {
00462         /* Perform the multiply-accumulates */
00463         sum += ((q31_t) * px++ * *py++);
00464         sum += ((q31_t) * px++ * *py++);
00465         sum += ((q31_t) * px++ * *py++);
00466         sum += ((q31_t) * px++ * *py++);
00467
00468         /* Decrement the loop counter */
00469         k--;
00470       }
00471
00472       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00473        ** No loop unrolling is used. */
00474       k = srcBLen % 0x4u;
00475
00476       while(k > 0u)
00477       {
00478         /* Perform the multiply-accumulates */
00479         sum += ((q31_t) * px++ * *py++);
00480
00481         /* Decrement the loop counter */
00482         k--;
00483       }
00484
00485       /* Store the result in the accumulator in the destination buffer. */
00486       *pOut = (q15_t) (sum >> 15);
00487       /* Destination pointer is updated according to the address modifier, inc */
00488       pOut += inc;
00489
00490       /* Increment the pointer pIn1 index, count by 1 */
00491       count++;
00492
00493       /* Update the inputA and inputB pointers for next MAC calculation */
00494       px = pIn1 + count;
00495       py = pIn2;
00496
00497       /* Decrement the loop counter */
00498       blkCnt--;
00499     }
00500   }
00501   else
00502   {
00503     /* If the srcBLen is not a multiple of 4,
00504      * the blockSize2 loop cannot be unrolled by 4 */
00505     blkCnt = blockSize2;
00506
00507     while(blkCnt > 0u)
00508     {
00509       /* Accumulator is made zero for every iteration */
00510       sum = 0;
00511
00512       /* Loop over srcBLen */
00513       k = srcBLen;
00514
00515       while(k > 0u)
00516       {
00517         /* Perform the multiply-accumulate */
00518         sum += ((q31_t) * px++ * *py++);
00519
00520         /* Decrement the loop counter */
00521         k--;
00522       }
00523
00524       /* Store the result in the accumulator in the destination buffer. */
00525       *pOut = (q15_t) (sum >> 15);
00526       /* Destination pointer is updated according to the address modifier, inc */
00527       pOut += inc;
00528
00529       /* Increment the MAC count */
00530       count++;
00531
00532       /* Update the inputA and inputB pointers for next MAC calculation */
00533       px = pIn1 + count;
00534       py = pIn2;
00535
00536       /* Decrement the loop counter */
00537       blkCnt--;
00538     }
00539   }
00540
00541   /* --------------------------
00542    * Initializations of stage3
00543    * -------------------------*/
00544
00545   /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00546    * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00547    * ....
00548    * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
00549    * sum +=  x[srcALen-1] * y[0]
00550    */
00551
00552   /* In this stage the MAC operations are decreased by 1 for every iteration.
00553      The count variable holds the number of MAC operations performed */
00554   count = srcBLen - 1u;
00555
00556   /* Working pointer of inputA */
00557   pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00558   px = pSrc1;
00559
00560   /* Working pointer of inputB */
00561   py = pIn2;
00562
00563   /* -------------------
00564    * Stage3 process
00565    * ------------------*/
00566
00567   while(blockSize3 > 0u)
00568   {
00569     /* Accumulator is made zero for every iteration */
00570     sum = 0;
00571
00572     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00573     k = count >> 2u;
00574
00575     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00576      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00577     while(k > 0u)
00578     {
00579       /* Perform the multiply-accumulates */
00580       /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */
00581       sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
00582       /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */
00583       sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
00584
00585       /* Decrement the loop counter */
00586       k--;
00587     }
00588
00589     /* If the count is not a multiple of 4, compute any remaining MACs here.
00590      ** No loop unrolling is used. */
00591     k = count % 0x4u;
00592
00593     while(k > 0u)
00594     {
00595       /* Perform the multiply-accumulates */
00596       sum = __SMLAD(*px++, *py++, sum);
00597
00598       /* Decrement the loop counter */
00599       k--;
00600     }
00601
00602     /* Store the result in the accumulator in the destination buffer. */
00603     *pOut = (q15_t) (sum >> 15);
00604     /* Destination pointer is updated according to the address modifier, inc */
00605     pOut += inc;
00606
00607     /* Update the inputA and inputB pointers for next MAC calculation */
00608     px = ++pSrc1;
00609     py = pIn2;
00610
00611     /* Decrement the MAC count */
00612     count--;
00613
00614     /* Decrement the loop counter */
00615     blockSize3--;
00616   }
00617
00618 }
00619
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c
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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_correlate_fast_q31.c
00009 *
00010 * Description:  Fast Q31 Correlation.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00070 void arm_correlate_fast_q31(
00071   q31_t * pSrcA,
00072   uint32_t srcALen,
00073   q31_t * pSrcB,
00074   uint32_t srcBLen,
00075   q31_t * pDst)
00076 {
00077   q31_t *pIn1;                                   /* inputA pointer               */
00078   q31_t *pIn2;                                   /* inputB pointer               */
00079   q31_t *pOut = pDst;                            /* output pointer               */
00080   q31_t *px;                                     /* Intermediate inputA pointer  */
00081   q31_t *py;                                     /* Intermediate inputB pointer  */
00082   q31_t *pSrc1;                                  /* Intermediate pointers        */
00083   q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
00084   q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
00085   uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
00086   int32_t inc = 1;                               /* Destination address modifier */
00087
00088
00089   /* The algorithm implementation is based on the lengths of the inputs. */
00090   /* srcB is always made to slide across srcA. */
00091   /* So srcBLen is always considered as shorter or equal to srcALen */
00092   if(srcALen >= srcBLen)
00093   {
00094     /* Initialization of inputA pointer */
00095     pIn1 = (pSrcA);
00096
00097     /* Initialization of inputB pointer */
00098     pIn2 = (pSrcB);
00099
00100     /* Number of output samples is calculated */
00101     outBlockSize = (2u * srcALen) - 1u;
00102
00103     /* When srcALen > srcBLen, zero padding is done to srcB
00104      * to make their lengths equal.
00105      * Instead, (outBlockSize - (srcALen + srcBLen - 1))
00106      * number of output samples are made zero */
00107     j = outBlockSize - (srcALen + (srcBLen - 1u));
00108
00109     /* Updating the pointer position to non zero value */
00110     pOut += j;
00111
00112   }
00113   else
00114   {
00115     /* Initialization of inputA pointer */
00116     pIn1 = (pSrcB);
00117
00118     /* Initialization of inputB pointer */
00119     pIn2 = (pSrcA);
00120
00121     /* srcBLen is always considered as shorter or equal to srcALen */
00122     j = srcBLen;
00123     srcBLen = srcALen;
00124     srcALen = j;
00125
00126     /* CORR(x, y) = Reverse order(CORR(y, x)) */
00127     /* Hence set the destination pointer to point to the last output sample */
00128     pOut = pDst + ((srcALen + srcBLen) - 2u);
00129
00130     /* Destination address modifier is set to -1 */
00131     inc = -1;
00132
00133   }
00134
00135   /* The function is internally
00136    * divided into three parts according to the number of multiplications that has to be
00137    * taken place between inputA samples and inputB samples. In the first part of the
00138    * algorithm, the multiplications increase by one for every iteration.
00139    * In the second part of the algorithm, srcBLen number of multiplications are done.
00140    * In the third part of the algorithm, the multiplications decrease by one
00141    * for every iteration.*/
00142   /* The algorithm is implemented in three stages.
00143    * The loop counters of each stage is initiated here. */
00144   blockSize1 = srcBLen - 1u;
00145   blockSize2 = srcALen - (srcBLen - 1u);
00146   blockSize3 = blockSize1;
00147
00148   /* --------------------------
00149    * Initializations of stage1
00150    * -------------------------*/
00151
00152   /* sum = x[0] * y[srcBlen - 1]
00153    * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
00154    * ....
00155    * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
00156    */
00157
00158   /* In this stage the MAC operations are increased by 1 for every iteration.
00159      The count variable holds the number of MAC operations performed */
00160   count = 1u;
00161
00162   /* Working pointer of inputA */
00163   px = pIn1;
00164
00165   /* Working pointer of inputB */
00166   pSrc1 = pIn2 + (srcBLen - 1u);
00167   py = pSrc1;
00168
00169   /* ------------------------
00170    * Stage1 process
00171    * ----------------------*/
00172
00173   /* The first stage starts here */
00174   while(blockSize1 > 0u)
00175   {
00176     /* Accumulator is made zero for every iteration */
00177     sum = 0;
00178
00179     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00180     k = count >> 2;
00181
00182     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00183      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00184     while(k > 0u)
00185     {
00186       /* x[0] * y[srcBLen - 4] */
00187       sum = (q31_t) ((((q63_t) sum << 32) +
00188                       ((q63_t) * px++ * (*py++))) >> 32);
00189       /* x[1] * y[srcBLen - 3] */
00190       sum = (q31_t) ((((q63_t) sum << 32) +
00191                       ((q63_t) * px++ * (*py++))) >> 32);
00192       /* x[2] * y[srcBLen - 2] */
00193       sum = (q31_t) ((((q63_t) sum << 32) +
00194                       ((q63_t) * px++ * (*py++))) >> 32);
00195       /* x[3] * y[srcBLen - 1] */
00196       sum = (q31_t) ((((q63_t) sum << 32) +
00197                       ((q63_t) * px++ * (*py++))) >> 32);
00198
00199       /* Decrement the loop counter */
00200       k--;
00201     }
00202
00203     /* If the count is not a multiple of 4, compute any remaining MACs here.
00204      ** No loop unrolling is used. */
00205     k = count % 0x4u;
00206
00207     while(k > 0u)
00208     {
00209       /* Perform the multiply-accumulates */
00210       /* x[0] * y[srcBLen - 1] */
00211       sum = (q31_t) ((((q63_t) sum << 32) +
00212                       ((q63_t) * px++ * (*py++))) >> 32);
00213
00214       /* Decrement the loop counter */
00215       k--;
00216     }
00217
00218     /* Store the result in the accumulator in the destination buffer. */
00219     *pOut = sum << 1;
00220     /* Destination pointer is updated according to the address modifier, inc */
00221     pOut += inc;
00222
00223     /* Update the inputA and inputB pointers for next MAC calculation */
00224     py = pSrc1 - count;
00225     px = pIn1;
00226
00227     /* Increment the MAC count */
00228     count++;
00229
00230     /* Decrement the loop counter */
00231     blockSize1--;
00232   }
00233
00234   /* --------------------------
00235    * Initializations of stage2
00236    * ------------------------*/
00237
00238   /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
00239    * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
00240    * ....
00241    * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00242    */
00243
00244   /* Working pointer of inputA */
00245   px = pIn1;
00246
00247   /* Working pointer of inputB */
00248   py = pIn2;
00249
00250   /* count is index by which the pointer pIn1 to be incremented */
00251   count = 1u;
00252
00253   /* -------------------
00254    * Stage2 process
00255    * ------------------*/
00256
00257   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00258    * So, to loop unroll over blockSize2,
00259    * srcBLen should be greater than or equal to 4 */
00260   if(srcBLen >= 4u)
00261   {
00262     /* Loop unroll over blockSize2, by 4 */
00263     blkCnt = blockSize2 >> 2u;
00264
00265     while(blkCnt > 0u)
00266     {
00267       /* Set all accumulators to zero */
00268       acc0 = 0;
00269       acc1 = 0;
00270       acc2 = 0;
00271       acc3 = 0;
00272
00273       /* read x[0], x[1], x[2] samples */
00274       x0 = *(px++);
00275       x1 = *(px++);
00276       x2 = *(px++);
00277
00278       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00279       k = srcBLen >> 2u;
00280
00281       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00282        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00283       do
00284       {
00285         /* Read y[0] sample */
00286         c0 = *(py++);
00287
00288         /* Read x[3] sample */
00289         x3 = *(px++);
00290
00291         /* Perform the multiply-accumulate */
00292         /* acc0 +=  x[0] * y[0] */
00293         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
00294         /* acc1 +=  x[1] * y[0] */
00295         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
00296         /* acc2 +=  x[2] * y[0] */
00297         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
00298         /* acc3 +=  x[3] * y[0] */
00299         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
00300
00301         /* Read y[1] sample */
00302         c0 = *(py++);
00303
00304         /* Read x[4] sample */
00305         x0 = *(px++);
00306
00307         /* Perform the multiply-accumulates */
00308         /* acc0 +=  x[1] * y[1] */
00309         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
00310         /* acc1 +=  x[2] * y[1] */
00311         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32);
00312         /* acc2 +=  x[3] * y[1] */
00313         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32);
00314         /* acc3 +=  x[4] * y[1] */
00315         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
00316
00317         /* Read y[2] sample */
00318         c0 = *(py++);
00319
00320         /* Read x[5] sample */
00321         x1 = *(px++);
00322
00323         /* Perform the multiply-accumulates */
00324         /* acc0 +=  x[2] * y[2] */
00325         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32);
00326         /* acc1 +=  x[3] * y[2] */
00327         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32);
00328         /* acc2 +=  x[4] * y[2] */
00329         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32);
00330         /* acc3 +=  x[5] * y[2] */
00331         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
00332
00333         /* Read y[3] sample */
00334         c0 = *(py++);
00335
00336         /* Read x[6] sample */
00337         x2 = *(px++);
00338
00339         /* Perform the multiply-accumulates */
00340         /* acc0 +=  x[3] * y[3] */
00341         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32);
00342         /* acc1 +=  x[4] * y[3] */
00343         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32);
00344         /* acc2 +=  x[5] * y[3] */
00345         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32);
00346         /* acc3 +=  x[6] * y[3] */
00347         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
00348
00349
00350       } while(--k);
00351
00352       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00353        ** No loop unrolling is used. */
00354       k = srcBLen % 0x4u;
00355
00356       while(k > 0u)
00357       {
00358         /* Read y[4] sample */
00359         c0 = *(py++);
00360
00361         /* Read x[7] sample */
00362         x3 = *(px++);
00363
00364         /* Perform the multiply-accumulates */
00365         /* acc0 +=  x[4] * y[4] */
00366         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
00367         /* acc1 +=  x[5] * y[4] */
00368         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
00369         /* acc2 +=  x[6] * y[4] */
00370         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
00371         /* acc3 +=  x[7] * y[4] */
00372         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
00373
00374         /* Reuse the present samples for the next MAC */
00375         x0 = x1;
00376         x1 = x2;
00377         x2 = x3;
00378
00379         /* Decrement the loop counter */
00380         k--;
00381       }
00382
00383       /* Store the result in the accumulator in the destination buffer. */
00384       *pOut = (q31_t) (acc0 << 1);
00385       /* Destination pointer is updated according to the address modifier, inc */
00386       pOut += inc;
00387
00388       *pOut = (q31_t) (acc1 << 1);
00389       pOut += inc;
00390
00391       *pOut = (q31_t) (acc2 << 1);
00392       pOut += inc;
00393
00394       *pOut = (q31_t) (acc3 << 1);
00395       pOut += inc;
00396
00397       /* Update the inputA and inputB pointers for next MAC calculation */
00398       px = pIn1 + (count * 4u);
00399       py = pIn2;
00400
00401       /* Increment the pointer pIn1 index, count by 1 */
00402       count++;
00403
00404       /* Decrement the loop counter */
00405       blkCnt--;
00406     }
00407
00408     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00409      ** No loop unrolling is used. */
00410     blkCnt = blockSize2 % 0x4u;
00411
00412     while(blkCnt > 0u)
00413     {
00414       /* Accumulator is made zero for every iteration */
00415       sum = 0;
00416
00417       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00418       k = srcBLen >> 2u;
00419
00420       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00421        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00422       while(k > 0u)
00423       {
00424         /* Perform the multiply-accumulates */
00425         sum = (q31_t) ((((q63_t) sum << 32) +
00426                         ((q63_t) * px++ * (*py++))) >> 32);
00427         sum = (q31_t) ((((q63_t) sum << 32) +
00428                         ((q63_t) * px++ * (*py++))) >> 32);
00429         sum = (q31_t) ((((q63_t) sum << 32) +
00430                         ((q63_t) * px++ * (*py++))) >> 32);
00431         sum = (q31_t) ((((q63_t) sum << 32) +
00432                         ((q63_t) * px++ * (*py++))) >> 32);
00433
00434         /* Decrement the loop counter */
00435         k--;
00436       }
00437
00438       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00439        ** No loop unrolling is used. */
00440       k = srcBLen % 0x4u;
00441
00442       while(k > 0u)
00443       {
00444         /* Perform the multiply-accumulate */
00445         sum = (q31_t) ((((q63_t) sum << 32) +
00446                         ((q63_t) * px++ * (*py++))) >> 32);
00447
00448         /* Decrement the loop counter */
00449         k--;
00450       }
00451
00452       /* Store the result in the accumulator in the destination buffer. */
00453       *pOut = sum << 1;
00454       /* Destination pointer is updated according to the address modifier, inc */
00455       pOut += inc;
00456
00457       /* Update the inputA and inputB pointers for next MAC calculation */
00458       px = pIn1 + count;
00459       py = pIn2;
00460
00461       /* Increment the MAC count */
00462       count++;
00463
00464       /* Decrement the loop counter */
00465       blkCnt--;
00466     }
00467   }
00468   else
00469   {
00470     /* If the srcBLen is not a multiple of 4,
00471      * the blockSize2 loop cannot be unrolled by 4 */
00472     blkCnt = blockSize2;
00473
00474     while(blkCnt > 0u)
00475     {
00476       /* Accumulator is made zero for every iteration */
00477       sum = 0;
00478
00479       /* Loop over srcBLen */
00480       k = srcBLen;
00481
00482       while(k > 0u)
00483       {
00484         /* Perform the multiply-accumulate */
00485         sum = (q31_t) ((((q63_t) sum << 32) +
00486                         ((q63_t) * px++ * (*py++))) >> 32);
00487
00488         /* Decrement the loop counter */
00489         k--;
00490       }
00491
00492       /* Store the result in the accumulator in the destination buffer. */
00493       *pOut = sum << 1;
00494       /* Destination pointer is updated according to the address modifier, inc */
00495       pOut += inc;
00496
00497       /* Update the inputA and inputB pointers for next MAC calculation */
00498       px = pIn1 + count;
00499       py = pIn2;
00500
00501       /* Increment the MAC count */
00502       count++;
00503
00504       /* Decrement the loop counter */
00505       blkCnt--;
00506     }
00507   }
00508
00509   /* --------------------------
00510    * Initializations of stage3
00511    * -------------------------*/
00512
00513   /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00514    * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00515    * ....
00516    * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
00517    * sum +=  x[srcALen-1] * y[0]
00518    */
00519
00520   /* In this stage the MAC operations are decreased by 1 for every iteration.
00521      The count variable holds the number of MAC operations performed */
00522   count = srcBLen - 1u;
00523
00524   /* Working pointer of inputA */
00525   pSrc1 = ((pIn1 + srcALen) - srcBLen) + 1u;
00526   px = pSrc1;
00527
00528   /* Working pointer of inputB */
00529   py = pIn2;
00530
00531   /* -------------------
00532    * Stage3 process
00533    * ------------------*/
00534
00535   while(blockSize3 > 0u)
00536   {
00537     /* Accumulator is made zero for every iteration */
00538     sum = 0;
00539
00540     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00541     k = count >> 2u;
00542
00543     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00544      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00545     while(k > 0u)
00546     {
00547       /* Perform the multiply-accumulates */
00548       /* sum += x[srcALen - srcBLen + 4] * y[3] */
00549       sum = (q31_t) ((((q63_t) sum << 32) +
00550                       ((q63_t) * px++ * (*py++))) >> 32);
00551       /* sum += x[srcALen - srcBLen + 3] * y[2] */
00552       sum = (q31_t) ((((q63_t) sum << 32) +
00553                       ((q63_t) * px++ * (*py++))) >> 32);
00554       /* sum += x[srcALen - srcBLen + 2] * y[1] */
00555       sum = (q31_t) ((((q63_t) sum << 32) +
00556                       ((q63_t) * px++ * (*py++))) >> 32);
00557       /* sum += x[srcALen - srcBLen + 1] * y[0] */
00558       sum = (q31_t) ((((q63_t) sum << 32) +
00559                       ((q63_t) * px++ * (*py++))) >> 32);
00560
00561       /* Decrement the loop counter */
00562       k--;
00563     }
00564
00565     /* If the count is not a multiple of 4, compute any remaining MACs here.
00566      ** No loop unrolling is used. */
00567     k = count % 0x4u;
00568
00569     while(k > 0u)
00570     {
00571       /* Perform the multiply-accumulates */
00572       sum = (q31_t) ((((q63_t) sum << 32) +
00573                       ((q63_t) * px++ * (*py++))) >> 32);
00574
00575       /* Decrement the loop counter */
00576       k--;
00577     }
00578
00579     /* Store the result in the accumulator in the destination buffer. */
00580     *pOut = sum << 1;
00581     /* Destination pointer is updated according to the address modifier, inc */
00582     pOut += inc;
00583
00584     /* Update the inputA and inputB pointers for next MAC calculation */
00585     px = ++pSrc1;
00586     py = pIn2;
00587
00588     /* Decrement the MAC count */
00589     count--;
00590
00591     /* Decrement the loop counter */
00592     blockSize3--;
00593   }
00594
00595 }
00596
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_correlate_q7.c
00009 *
00010 * Description:  Correlation of Q7 sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00065 void arm_correlate_q7(
00066   q7_t * pSrcA,
00067   uint32_t srcALen,
00068   q7_t * pSrcB,
00069   uint32_t srcBLen,
00070   q7_t * pDst)
00071 {
00072
00073
00074 #ifndef ARM_MATH_CM0
00075
00076   /* Run the below code for Cortex-M4 and Cortex-M3 */
00077
00078   q7_t *pIn1;                                    /* inputA pointer               */
00079   q7_t *pIn2;                                    /* inputB pointer               */
00080   q7_t *pOut = pDst;                             /* output pointer               */
00081   q7_t *px;                                      /* Intermediate inputA pointer  */
00082   q7_t *py;                                      /* Intermediate inputB pointer  */
00083   q7_t *pSrc1;                                   /* Intermediate pointers        */
00084   q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
00085   q31_t input1, input2;                          /* temporary variables */
00086   q15_t in1, in2;                                /* temporary variables */
00087   q7_t x0, x1, x2, x3, c0, c1;                   /* temporary variables for holding input and coefficient values */
00088   uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
00089   int32_t inc = 1;
00090
00091
00092   /* The algorithm implementation is based on the lengths of the inputs. */
00093   /* srcB is always made to slide across srcA. */
00094   /* So srcBLen is always considered as shorter or equal to srcALen */
00095   /* But CORR(x, y) is reverse of CORR(y, x) */
00096   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
00097   /* and the destination pointer modifier, inc is set to -1 */
00098   /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
00099   /* But to improve the performance,
00100    * we include zeroes in the output instead of zero padding either of the the inputs*/
00101   /* If srcALen > srcBLen,
00102    * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
00103   /* If srcALen < srcBLen,
00104    * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
00105   if(srcALen >= srcBLen)
00106   {
00107     /* Initialization of inputA pointer */
00108     pIn1 = (pSrcA);
00109
00110     /* Initialization of inputB pointer */
00111     pIn2 = (pSrcB);
00112
00113     /* Number of output samples is calculated */
00114     outBlockSize = (2u * srcALen) - 1u;
00115
00116     /* When srcALen > srcBLen, zero padding is done to srcB
00117      * to make their lengths equal.
00118      * Instead, (outBlockSize - (srcALen + srcBLen - 1))
00119      * number of output samples are made zero */
00120     j = outBlockSize - (srcALen + (srcBLen - 1u));
00121
00122     /* Updating the pointer position to non zero value */
00123     pOut += j;
00124
00125   }
00126   else
00127   {
00128     /* Initialization of inputA pointer */
00129     pIn1 = (pSrcB);
00130
00131     /* Initialization of inputB pointer */
00132     pIn2 = (pSrcA);
00133
00134     /* srcBLen is always considered as shorter or equal to srcALen */
00135     j = srcBLen;
00136     srcBLen = srcALen;
00137     srcALen = j;
00138
00139     /* CORR(x, y) = Reverse order(CORR(y, x)) */
00140     /* Hence set the destination pointer to point to the last output sample */
00141     pOut = pDst + ((srcALen + srcBLen) - 2u);
00142
00143     /* Destination address modifier is set to -1 */
00144     inc = -1;
00145
00146   }
00147
00148   /* The function is internally
00149    * divided into three parts according to the number of multiplications that has to be
00150    * taken place between inputA samples and inputB samples. In the first part of the
00151    * algorithm, the multiplications increase by one for every iteration.
00152    * In the second part of the algorithm, srcBLen number of multiplications are done.
00153    * In the third part of the algorithm, the multiplications decrease by one
00154    * for every iteration.*/
00155   /* The algorithm is implemented in three stages.
00156    * The loop counters of each stage is initiated here. */
00157   blockSize1 = srcBLen - 1u;
00158   blockSize2 = srcALen - (srcBLen - 1u);
00159   blockSize3 = blockSize1;
00160
00161   /* --------------------------
00162    * Initializations of stage1
00163    * -------------------------*/
00164
00165   /* sum = x[0] * y[srcBlen - 1]
00166    * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
00167    * ....
00168    * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
00169    */
00170
00171   /* In this stage the MAC operations are increased by 1 for every iteration.
00172      The count variable holds the number of MAC operations performed */
00173   count = 1u;
00174
00175   /* Working pointer of inputA */
00176   px = pIn1;
00177
00178   /* Working pointer of inputB */
00179   pSrc1 = pIn2 + (srcBLen - 1u);
00180   py = pSrc1;
00181
00182   /* ------------------------
00183    * Stage1 process
00184    * ----------------------*/
00185
00186   /* The first stage starts here */
00187   while(blockSize1 > 0u)
00188   {
00189     /* Accumulator is made zero for every iteration */
00190     sum = 0;
00191
00192     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00193     k = count >> 2;
00194
00195     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00196      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00197     while(k > 0u)
00198     {
00199       /* x[0] , x[1] */
00200       in1 = (q15_t) * px++;
00201       in2 = (q15_t) * px++;
00202       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00203
00204       /* y[srcBLen - 4] , y[srcBLen - 3] */
00205       in1 = (q15_t) * py++;
00206       in2 = (q15_t) * py++;
00207       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00208
00209       /* x[0] * y[srcBLen - 4] */
00210       /* x[1] * y[srcBLen - 3] */
00211       sum = __SMLAD(input1, input2, sum);
00212
00213       /* x[2] , x[3] */
00214       in1 = (q15_t) * px++;
00215       in2 = (q15_t) * px++;
00216       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00217
00218       /* y[srcBLen - 2] , y[srcBLen - 1] */
00219       in1 = (q15_t) * py++;
00220       in2 = (q15_t) * py++;
00221       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00222
00223       /* x[2] * y[srcBLen - 2] */
00224       /* x[3] * y[srcBLen - 1] */
00225       sum = __SMLAD(input1, input2, sum);
00226
00227
00228       /* Decrement the loop counter */
00229       k--;
00230     }
00231
00232     /* If the count is not a multiple of 4, compute any remaining MACs here.
00233      ** No loop unrolling is used. */
00234     k = count % 0x4u;
00235
00236     while(k > 0u)
00237     {
00238       /* Perform the multiply-accumulates */
00239       /* x[0] * y[srcBLen - 1] */
00240       sum += (q31_t) ((q15_t) * px++ * *py++);
00241
00242       /* Decrement the loop counter */
00243       k--;
00244     }
00245
00246     /* Store the result in the accumulator in the destination buffer. */
00247     *pOut = (q7_t) (__SSAT(sum >> 7, 8));
00248     /* Destination pointer is updated according to the address modifier, inc */
00249     pOut += inc;
00250
00251     /* Update the inputA and inputB pointers for next MAC calculation */
00252     py = pSrc1 - count;
00253     px = pIn1;
00254
00255     /* Increment the MAC count */
00256     count++;
00257
00258     /* Decrement the loop counter */
00259     blockSize1--;
00260   }
00261
00262   /* --------------------------
00263    * Initializations of stage2
00264    * ------------------------*/
00265
00266   /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
00267    * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
00268    * ....
00269    * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00270    */
00271
00272   /* Working pointer of inputA */
00273   px = pIn1;
00274
00275   /* Working pointer of inputB */
00276   py = pIn2;
00277
00278   /* count is index by which the pointer pIn1 to be incremented */
00279   count = 1u;
00280
00281   /* -------------------
00282    * Stage2 process
00283    * ------------------*/
00284
00285   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00286    * So, to loop unroll over blockSize2,
00287    * srcBLen should be greater than or equal to 4 */
00288   if(srcBLen >= 4u)
00289   {
00290     /* Loop unroll over blockSize2, by 4 */
00291     blkCnt = blockSize2 >> 2u;
00292
00293     while(blkCnt > 0u)
00294     {
00295       /* Set all accumulators to zero */
00296       acc0 = 0;
00297       acc1 = 0;
00298       acc2 = 0;
00299       acc3 = 0;
00300
00301       /* read x[0], x[1], x[2] samples */
00302       x0 = *px++;
00303       x1 = *px++;
00304       x2 = *px++;
00305
00306       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00307       k = srcBLen >> 2u;
00308
00309       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00310        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00311       do
00312       {
00313         /* Read y[0] sample */
00314         c0 = *py++;
00315         /* Read y[1] sample */
00316         c1 = *py++;
00317
00318         /* Read x[3] sample */
00319         x3 = *px++;
00320
00321         /* x[0] and x[1] are packed */
00322         in1 = (q15_t) x0;
00323         in2 = (q15_t) x1;
00324
00325         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00326
00327         /* y[0] and y[1] are packed */
00328         in1 = (q15_t) c0;
00329         in2 = (q15_t) c1;
00330
00331         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00332
00333         /* acc0 += x[0] * y[0] + x[1] * y[1]  */
00334         acc0 = __SMLAD(input1, input2, acc0);
00335
00336         /* x[1] and x[2] are packed */
00337         in1 = (q15_t) x1;
00338         in2 = (q15_t) x2;
00339
00340         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00341
00342         /* acc1 += x[1] * y[0] + x[2] * y[1] */
00343         acc1 = __SMLAD(input1, input2, acc1);
00344
00345         /* x[2] and x[3] are packed */
00346         in1 = (q15_t) x2;
00347         in2 = (q15_t) x3;
00348
00349         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00350
00351         /* acc2 += x[2] * y[0] + x[3] * y[1]  */
00352         acc2 = __SMLAD(input1, input2, acc2);
00353
00354         /* Read x[4] sample */
00355         x0 = *(px++);
00356
00357         /* x[3] and x[4] are packed */
00358         in1 = (q15_t) x3;
00359         in2 = (q15_t) x0;
00360
00361         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00362
00363         /* acc3 += x[3] * y[0] + x[4] * y[1]  */
00364         acc3 = __SMLAD(input1, input2, acc3);
00365
00366         /* Read y[2] sample */
00367         c0 = *py++;
00368         /* Read y[3] sample */
00369         c1 = *py++;
00370
00371         /* Read x[5] sample */
00372         x1 = *px++;
00373
00374         /* x[2] and x[3] are packed */
00375         in1 = (q15_t) x2;
00376         in2 = (q15_t) x3;
00377
00378         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00379
00380         /* y[2] and y[3] are packed */
00381         in1 = (q15_t) c0;
00382         in2 = (q15_t) c1;
00383
00384         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00385
00386         /* acc0 += x[2] * y[2] + x[3] * y[3]  */
00387         acc0 = __SMLAD(input1, input2, acc0);
00388
00389         /* x[3] and x[4] are packed */
00390         in1 = (q15_t) x3;
00391         in2 = (q15_t) x0;
00392
00393         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00394
00395         /* acc1 += x[3] * y[2] + x[4] * y[3]  */
00396         acc1 = __SMLAD(input1, input2, acc1);
00397
00398         /* x[4] and x[5] are packed */
00399         in1 = (q15_t) x0;
00400         in2 = (q15_t) x1;
00401
00402         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00403
00404         /* acc2 += x[4] * y[2] + x[5] * y[3]  */
00405         acc2 = __SMLAD(input1, input2, acc2);
00406
00407         /* Read x[6] sample */
00408         x2 = *px++;
00409
00410         /* x[5] and x[6] are packed */
00411         in1 = (q15_t) x1;
00412         in2 = (q15_t) x2;
00413
00414         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00415
00416         /* acc3 += x[5] * y[2] + x[6] * y[3]  */
00417         acc3 = __SMLAD(input1, input2, acc3);
00418
00419       } while(--k);
00420
00421       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00422        ** No loop unrolling is used. */
00423       k = srcBLen % 0x4u;
00424
00425       while(k > 0u)
00426       {
00427         /* Read y[4] sample */
00428         c0 = *py++;
00429
00430         /* Read x[7] sample */
00431         x3 = *px++;
00432
00433         /* Perform the multiply-accumulates */
00434         /* acc0 +=  x[4] * y[4] */
00435         acc0 += ((q15_t) x0 * c0);
00436         /* acc1 +=  x[5] * y[4] */
00437         acc1 += ((q15_t) x1 * c0);
00438         /* acc2 +=  x[6] * y[4] */
00439         acc2 += ((q15_t) x2 * c0);
00440         /* acc3 +=  x[7] * y[4] */
00441         acc3 += ((q15_t) x3 * c0);
00442
00443         /* Reuse the present samples for the next MAC */
00444         x0 = x1;
00445         x1 = x2;
00446         x2 = x3;
00447
00448         /* Decrement the loop counter */
00449         k--;
00450       }
00451
00452       /* Store the result in the accumulator in the destination buffer. */
00453       *pOut = (q7_t) (__SSAT(acc0 >> 7, 8));
00454       /* Destination pointer is updated according to the address modifier, inc */
00455       pOut += inc;
00456
00457       *pOut = (q7_t) (__SSAT(acc1 >> 7, 8));
00458       pOut += inc;
00459
00460       *pOut = (q7_t) (__SSAT(acc2 >> 7, 8));
00461       pOut += inc;
00462
00463       *pOut = (q7_t) (__SSAT(acc3 >> 7, 8));
00464       pOut += inc;
00465
00466       /* Update the inputA and inputB pointers for next MAC calculation */
00467       px = pIn1 + (count * 4u);
00468       py = pIn2;
00469
00470       /* Increment the pointer pIn1 index, count by 1 */
00471       count++;
00472
00473       /* Decrement the loop counter */
00474       blkCnt--;
00475     }
00476
00477     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00478      ** No loop unrolling is used. */
00479     blkCnt = blockSize2 % 0x4u;
00480
00481     while(blkCnt > 0u)
00482     {
00483       /* Accumulator is made zero for every iteration */
00484       sum = 0;
00485
00486       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00487       k = srcBLen >> 2u;
00488
00489       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00490        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00491       while(k > 0u)
00492       {
00493         /* Reading two inputs of SrcA buffer and packing */
00494         in1 = (q15_t) * px++;
00495         in2 = (q15_t) * px++;
00496         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00497
00498         /* Reading two inputs of SrcB buffer and packing */
00499         in1 = (q15_t) * py++;
00500         in2 = (q15_t) * py++;
00501         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00502
00503         /* Perform the multiply-accumulates */
00504         sum = __SMLAD(input1, input2, sum);
00505
00506         /* Reading two inputs of SrcA buffer and packing */
00507         in1 = (q15_t) * px++;
00508         in2 = (q15_t) * px++;
00509         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00510
00511         /* Reading two inputs of SrcB buffer and packing */
00512         in1 = (q15_t) * py++;
00513         in2 = (q15_t) * py++;
00514         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00515
00516         /* Perform the multiply-accumulates */
00517         sum = __SMLAD(input1, input2, sum);
00518
00519         /* Decrement the loop counter */
00520         k--;
00521       }
00522
00523       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00524        ** No loop unrolling is used. */
00525       k = srcBLen % 0x4u;
00526
00527       while(k > 0u)
00528       {
00529         /* Perform the multiply-accumulates */
00530         sum += ((q15_t) * px++ * *py++);
00531
00532         /* Decrement the loop counter */
00533         k--;
00534       }
00535
00536       /* Store the result in the accumulator in the destination buffer. */
00537       *pOut = (q7_t) (__SSAT(sum >> 7, 8));
00538       /* Destination pointer is updated according to the address modifier, inc */
00539       pOut += inc;
00540
00541       /* Update the inputA and inputB pointers for next MAC calculation */
00542       px = pIn1 + count;
00543       py = pIn2;
00544
00545       /* Increment the pointer pIn1 index, count by 1 */
00546       count++;
00547
00548       /* Decrement the loop counter */
00549       blkCnt--;
00550     }
00551   }
00552   else
00553   {
00554     /* If the srcBLen is not a multiple of 4,
00555      * the blockSize2 loop cannot be unrolled by 4 */
00556     blkCnt = blockSize2;
00557
00558     while(blkCnt > 0u)
00559     {
00560       /* Accumulator is made zero for every iteration */
00561       sum = 0;
00562
00563       /* Loop over srcBLen */
00564       k = srcBLen;
00565
00566       while(k > 0u)
00567       {
00568         /* Perform the multiply-accumulate */
00569         sum += ((q15_t) * px++ * *py++);
00570
00571         /* Decrement the loop counter */
00572         k--;
00573       }
00574
00575       /* Store the result in the accumulator in the destination buffer. */
00576       *pOut = (q7_t) (__SSAT(sum >> 7, 8));
00577       /* Destination pointer is updated according to the address modifier, inc */
00578       pOut += inc;
00579
00580       /* Update the inputA and inputB pointers for next MAC calculation */
00581       px = pIn1 + count;
00582       py = pIn2;
00583
00584       /* Increment the MAC count */
00585       count++;
00586
00587       /* Decrement the loop counter */
00588       blkCnt--;
00589     }
00590   }
00591
00592   /* --------------------------
00593    * Initializations of stage3
00594    * -------------------------*/
00595
00596   /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00597    * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00598    * ....
00599    * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
00600    * sum +=  x[srcALen-1] * y[0]
00601    */
00602
00603   /* In this stage the MAC operations are decreased by 1 for every iteration.
00604      The count variable holds the number of MAC operations performed */
00605   count = srcBLen - 1u;
00606
00607   /* Working pointer of inputA */
00608   pSrc1 = pIn1 + (srcALen - (srcBLen - 1u));
00609   px = pSrc1;
00610
00611   /* Working pointer of inputB */
00612   py = pIn2;
00613
00614   /* -------------------
00615    * Stage3 process
00616    * ------------------*/
00617
00618   while(blockSize3 > 0u)
00619   {
00620     /* Accumulator is made zero for every iteration */
00621     sum = 0;
00622
00623     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00624     k = count >> 2u;
00625
00626     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00627      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00628     while(k > 0u)
00629     {
00630       /* x[srcALen - srcBLen + 1] , x[srcALen - srcBLen + 2]  */
00631       in1 = (q15_t) * px++;
00632       in2 = (q15_t) * px++;
00633       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00634
00635       /* y[0] , y[1] */
00636       in1 = (q15_t) * py++;
00637       in2 = (q15_t) * py++;
00638       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00639
00640       /* sum += x[srcALen - srcBLen + 1] * y[0] */
00641       /* sum += x[srcALen - srcBLen + 2] * y[1] */
00642       sum = __SMLAD(input1, input2, sum);
00643
00644       /* x[srcALen - srcBLen + 3] , x[srcALen - srcBLen + 4] */
00645       in1 = (q15_t) * px++;
00646       in2 = (q15_t) * px++;
00647       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00648
00649       /* y[2] , y[3] */
00650       in1 = (q15_t) * py++;
00651       in2 = (q15_t) * py++;
00652       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00653
00654       /* sum += x[srcALen - srcBLen + 3] * y[2] */
00655       /* sum += x[srcALen - srcBLen + 4] * y[3] */
00656       sum = __SMLAD(input1, input2, sum);
00657
00658       /* Decrement the loop counter */
00659       k--;
00660     }
00661
00662     /* If the count is not a multiple of 4, compute any remaining MACs here.
00663      ** No loop unrolling is used. */
00664     k = count % 0x4u;
00665
00666     while(k > 0u)
00667     {
00668       /* Perform the multiply-accumulates */
00669       sum += ((q15_t) * px++ * *py++);
00670
00671       /* Decrement the loop counter */
00672       k--;
00673     }
00674
00675     /* Store the result in the accumulator in the destination buffer. */
00676     *pOut = (q7_t) (__SSAT(sum >> 7, 8));
00677     /* Destination pointer is updated according to the address modifier, inc */
00678     pOut += inc;
00679
00680     /* Update the inputA and inputB pointers for next MAC calculation */
00681     px = ++pSrc1;
00682     py = pIn2;
00683
00684     /* Decrement the MAC count */
00685     count--;
00686
00687     /* Decrement the loop counter */
00688     blockSize3--;
00689   }
00690
00691 #else
00692
00693 /* Run the below code for Cortex-M0 */
00694
00695   q7_t *pIn1 = pSrcA;                            /* inputA pointer */
00696   q7_t *pIn2 = pSrcB + (srcBLen - 1u);           /* inputB pointer */
00697   q31_t sum;                                     /* Accumulator */
00698   uint32_t i = 0u, j;                            /* loop counters */
00699   uint32_t inv = 0u;                             /* Reverse order flag */
00700   uint32_t tot = 0u;                             /* Length */
00701
00702   /* The algorithm implementation is based on the lengths of the inputs. */
00703   /* srcB is always made to slide across srcA. */
00704   /* So srcBLen is always considered as shorter or equal to srcALen */
00705   /* But CORR(x, y) is reverse of CORR(y, x) */
00706   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
00707   /* and a varaible, inv is set to 1 */
00708   /* If lengths are not equal then zero pad has to be done to  make the two
00709    * inputs of same length. But to improve the performance, we include zeroes
00710    * in the output instead of zero padding either of the the inputs*/
00711   /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
00712    * starting of the output buffer */
00713   /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
00714    * ending of the output buffer */
00715   /* Once the zero padding is done the remaining of the output is calcualted
00716    * using convolution but with the shorter signal time shifted. */
00717
00718   /* Calculate the length of the remaining sequence */
00719   tot = ((srcALen + srcBLen) - 2u);
00720
00721   if(srcALen > srcBLen)
00722   {
00723     /* Calculating the number of zeros to be padded to the output */
00724     j = srcALen - srcBLen;
00725
00726     /* Initialise the pointer after zero padding */
00727     pDst += j;
00728   }
00729
00730   else if(srcALen < srcBLen)
00731   {
00732     /* Initialization to inputB pointer */
00733     pIn1 = pSrcB;
00734
00735     /* Initialization to the end of inputA pointer */
00736     pIn2 = pSrcA + (srcALen - 1u);
00737
00738     /* Initialisation of the pointer after zero padding */
00739     pDst = pDst + tot;
00740
00741     /* Swapping the lengths */
00742     j = srcALen;
00743     srcALen = srcBLen;
00744     srcBLen = j;
00745
00746     /* Setting the reverse flag */
00747     inv = 1;
00748
00749   }
00750
00751   /* Loop to calculate convolution for output length number of times */
00752   for (i = 0u; i <= tot; i++)
00753   {
00754     /* Initialize sum with zero to carry on MAC operations */
00755     sum = 0;
00756
00757     /* Loop to perform MAC operations according to convolution equation */
00758     for (j = 0u; j <= i; j++)
00759     {
00760       /* Check the array limitations */
00761       if((((i - j) < srcBLen) && (j < srcALen)))
00762       {
00763         /* z[i] += x[i-j] * y[j] */
00764         sum += ((q15_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
00765       }
00766     }
00767     /* Store the output in the destination buffer */
00768     if(inv == 1)
00769       *pDst-- = (q7_t) __SSAT((sum >> 7u), 8u);
00770     else
00771       *pDst++ = (q7_t) __SSAT((sum >> 7u), 8u);
00772   }
00773
00774 #endif /*   #ifndef ARM_MATH_CM0 */
00775
00776 }
00777
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_correlate_q15.c
00009 *
00010 * Description:  Correlation of Q15 sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00068 void arm_correlate_q15(
00069   q15_t * pSrcA,
00070   uint32_t srcALen,
00071   q15_t * pSrcB,
00072   uint32_t srcBLen,
00073   q15_t * pDst)
00074 {
00075
00076 #ifndef ARM_MATH_CM0
00077
00078   /* Run the below code for Cortex-M4 and Cortex-M3 */
00079
00080   q15_t *pIn1;                                   /* inputA pointer               */
00081   q15_t *pIn2;                                   /* inputB pointer               */
00082   q15_t *pOut = pDst;                            /* output pointer               */
00083   q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
00084   q15_t *px;                                     /* Intermediate inputA pointer  */
00085   q15_t *py;                                     /* Intermediate inputB pointer  */
00086   q15_t *pSrc1;                                  /* Intermediate pointers        */
00087   q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
00088   uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
00089   int32_t inc = 1;                               /* Destination address modifier */
00090   q31_t *pb;                                     /* 32 bit pointer for inputB buffer */
00091
00092
00093   /* The algorithm implementation is based on the lengths of the inputs. */
00094   /* srcB is always made to slide across srcA. */
00095   /* So srcBLen is always considered as shorter or equal to srcALen */
00096   /* But CORR(x, y) is reverse of CORR(y, x) */
00097   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
00098   /* and the destination pointer modifier, inc is set to -1 */
00099   /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
00100   /* But to improve the performance,
00101    * we include zeroes in the output instead of zero padding either of the the inputs*/
00102   /* If srcALen > srcBLen,
00103    * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
00104   /* If srcALen < srcBLen,
00105    * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
00106   if(srcALen >= srcBLen)
00107   {
00108     /* Initialization of inputA pointer */
00109     pIn1 = (pSrcA);
00110
00111     /* Initialization of inputB pointer */
00112     pIn2 = (pSrcB);
00113
00114     /* Number of output samples is calculated */
00115     outBlockSize = (2u * srcALen) - 1u;
00116
00117     /* When srcALen > srcBLen, zero padding is done to srcB
00118      * to make their lengths equal.
00119      * Instead, (outBlockSize - (srcALen + srcBLen - 1))
00120      * number of output samples are made zero */
00121     j = outBlockSize - (srcALen + (srcBLen - 1u));
00122
00123     /* Updating the pointer position to non zero value */
00124     pOut += j;
00125
00126   }
00127   else
00128   {
00129     /* Initialization of inputA pointer */
00130     pIn1 = (pSrcB);
00131
00132     /* Initialization of inputB pointer */
00133     pIn2 = (pSrcA);
00134
00135     /* srcBLen is always considered as shorter or equal to srcALen */
00136     j = srcBLen;
00137     srcBLen = srcALen;
00138     srcALen = j;
00139
00140     /* CORR(x, y) = Reverse order(CORR(y, x)) */
00141     /* Hence set the destination pointer to point to the last output sample */
00142     pOut = pDst + ((srcALen + srcBLen) - 2u);
00143
00144     /* Destination address modifier is set to -1 */
00145     inc = -1;
00146
00147   }
00148
00149   /* The function is internally
00150    * divided into three parts according to the number of multiplications that has to be
00151    * taken place between inputA samples and inputB samples. In the first part of the
00152    * algorithm, the multiplications increase by one for every iteration.
00153    * In the second part of the algorithm, srcBLen number of multiplications are done.
00154    * In the third part of the algorithm, the multiplications decrease by one
00155    * for every iteration.*/
00156   /* The algorithm is implemented in three stages.
00157    * The loop counters of each stage is initiated here. */
00158   blockSize1 = srcBLen - 1u;
00159   blockSize2 = srcALen - (srcBLen - 1u);
00160   blockSize3 = blockSize1;
00161
00162   /* --------------------------
00163    * Initializations of stage1
00164    * -------------------------*/
00165
00166   /* sum = x[0] * y[srcBlen - 1]
00167    * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
00168    * ....
00169    * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
00170    */
00171
00172   /* In this stage the MAC operations are increased by 1 for every iteration.
00173      The count variable holds the number of MAC operations performed */
00174   count = 1u;
00175
00176   /* Working pointer of inputA */
00177   px = pIn1;
00178
00179   /* Working pointer of inputB */
00180   pSrc1 = pIn2 + (srcBLen - 1u);
00181   py = pSrc1;
00182
00183   /* ------------------------
00184    * Stage1 process
00185    * ----------------------*/
00186
00187   /* The first loop starts here */
00188   while(blockSize1 > 0u)
00189   {
00190     /* Accumulator is made zero for every iteration */
00191     sum = 0;
00192
00193     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00194     k = count >> 2;
00195
00196     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00197      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00198     while(k > 0u)
00199     {
00200       /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
00201       sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
00202       /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */
00203       sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
00204
00205       /* Decrement the loop counter */
00206       k--;
00207     }
00208
00209     /* If the count is not a multiple of 4, compute any remaining MACs here.
00210      ** No loop unrolling is used. */
00211     k = count % 0x4u;
00212
00213     while(k > 0u)
00214     {
00215       /* Perform the multiply-accumulates */
00216       /* x[0] * y[srcBLen - 1] */
00217       sum = __SMLALD(*px++, *py++, sum);
00218
00219       /* Decrement the loop counter */
00220       k--;
00221     }
00222
00223     /* Store the result in the accumulator in the destination buffer. */
00224     *pOut = (q15_t) (__SSAT((sum >> 15), 16));
00225     /* Destination pointer is updated according to the address modifier, inc */
00226     pOut += inc;
00227
00228     /* Update the inputA and inputB pointers for next MAC calculation */
00229     py = pSrc1 - count;
00230     px = pIn1;
00231
00232     /* Increment the MAC count */
00233     count++;
00234
00235     /* Decrement the loop counter */
00236     blockSize1--;
00237   }
00238
00239   /* --------------------------
00240    * Initializations of stage2
00241    * ------------------------*/
00242
00243   /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
00244    * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
00245    * ....
00246    * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00247    */
00248
00249   /* Working pointer of inputA */
00250   px = pIn1;
00251
00252   /* Working pointer of inputB */
00253   py = pIn2;
00254
00255   /* Initialize inputB pointer of type q31 */
00256   pb = (q31_t *) (py);
00257
00258   /* count is index by which the pointer pIn1 to be incremented */
00259   count = 0u;
00260
00261   /* -------------------
00262    * Stage2 process
00263    * ------------------*/
00264
00265   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00266    * So, to loop unroll over blockSize2,
00267    * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
00268   if(srcBLen >= 4u)
00269   {
00270     /* Loop unroll over blockSize2, by 4 */
00271     blkCnt = blockSize2 >> 2u;
00272
00273     while(blkCnt > 0u)
00274     {
00275       /* Set all accumulators to zero */
00276       acc0 = 0;
00277       acc1 = 0;
00278       acc2 = 0;
00279       acc3 = 0;
00280
00281       /* read x[0], x[1] samples */
00282       x0 = *(q31_t *) (px++);
00283       /* read x[1], x[2] samples */
00284       x1 = *(q31_t *) (px++);
00285
00286       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00287       k = srcBLen >> 2u;
00288
00289       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00290        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00291       do
00292       {
00293         /* Read the first two inputB samples using SIMD:
00294          * y[0] and y[1] */
00295         c0 = *(pb++);
00296
00297         /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
00298         acc0 = __SMLALD(x0, c0, acc0);
00299
00300         /* acc1 +=  x[1] * y[0] + x[2] * y[1] */
00301         acc1 = __SMLALD(x1, c0, acc1);
00302
00303         /* Read x[2], x[3] */
00304         x2 = *(q31_t *) (px++);
00305
00306         /* Read x[3], x[4] */
00307         x3 = *(q31_t *) (px++);
00308
00309         /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
00310         acc2 = __SMLALD(x2, c0, acc2);
00311
00312         /* acc3 +=  x[3] * y[0] + x[4] * y[1] */
00313         acc3 = __SMLALD(x3, c0, acc3);
00314
00315         /* Read y[2] and y[3] */
00316         c0 = *(pb++);
00317
00318         /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
00319         acc0 = __SMLALD(x2, c0, acc0);
00320
00321         /* acc1 +=  x[3] * y[2] + x[4] * y[3] */
00322         acc1 = __SMLALD(x3, c0, acc1);
00323
00324         /* Read x[4], x[5] */
00325         x0 = *(q31_t *) (px++);
00326
00327         /* Read x[5], x[6] */
00328         x1 = *(q31_t *) (px++);
00329
00330         /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
00331         acc2 = __SMLALD(x0, c0, acc2);
00332
00333         /* acc3 +=  x[5] * y[2] + x[6] * y[3] */
00334         acc3 = __SMLALD(x1, c0, acc3);
00335
00336       } while(--k);
00337
00338       /* For the next MAC operations, SIMD is not used
00339        * So, the 16 bit pointer if inputB, py is updated */
00340       py = (q15_t *) (pb);
00341
00342       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00343        ** No loop unrolling is used. */
00344       k = srcBLen % 0x4u;
00345
00346       if(k == 1u)
00347       {
00348         /* Read y[4] */
00349         c0 = *py;
00350 #ifdef  ARM_MATH_BIG_ENDIAN
00351
00352         c0 = c0 << 16u;
00353
00354 #else
00355
00356         c0 = c0 & 0x0000FFFF;
00357
00358 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00359         /* Read x[7] */
00360         x3 = *(q31_t *) px++;
00361
00362         /* Perform the multiply-accumulates */
00363         acc0 = __SMLALD(x0, c0, acc0);
00364         acc1 = __SMLALD(x1, c0, acc1);
00365         acc2 = __SMLALDX(x1, c0, acc2);
00366         acc3 = __SMLALDX(x3, c0, acc3);
00367       }
00368
00369       if(k == 2u)
00370       {
00371         /* Read y[4], y[5] */
00372         c0 = *(pb);
00373
00374         /* Read x[7], x[8] */
00375         x3 = *(q31_t *) px++;
00376
00377         /* Read x[9] */
00378         x2 = *(q31_t *) px++;
00379
00380         /* Perform the multiply-accumulates */
00381         acc0 = __SMLALD(x0, c0, acc0);
00382         acc1 = __SMLALD(x1, c0, acc1);
00383         acc2 = __SMLALD(x3, c0, acc2);
00384         acc3 = __SMLALD(x2, c0, acc3);
00385       }
00386
00387       if(k == 3u)
00388       {
00389         /* Read y[4], y[5] */
00390         c0 = *pb++;
00391
00392         /* Read x[7], x[8] */
00393         x3 = *(q31_t *) px++;
00394
00395         /* Read x[9] */
00396         x2 = *(q31_t *) px++;
00397
00398         /* Perform the multiply-accumulates */
00399         acc0 = __SMLALD(x0, c0, acc0);
00400         acc1 = __SMLALD(x1, c0, acc1);
00401         acc2 = __SMLALD(x3, c0, acc2);
00402         acc3 = __SMLALD(x2, c0, acc3);
00403
00404         /* Read y[6] */
00405 #ifdef  ARM_MATH_BIG_ENDIAN
00406
00407         c0 = (*pb);
00408         c0 = c0 & 0xFFFF0000;
00409
00410 #else
00411
00412         c0 = (q15_t) (*pb);
00413         c0 = c0 & 0x0000FFFF;
00414
00415 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00416         /* Read x[10] */
00417         x3 = *(q31_t *) px++;
00418
00419         /* Perform the multiply-accumulates */
00420         acc0 = __SMLALDX(x1, c0, acc0);
00421         acc1 = __SMLALD(x2, c0, acc1);
00422         acc2 = __SMLALDX(x2, c0, acc2);
00423         acc3 = __SMLALDX(x3, c0, acc3);
00424       }
00425
00426       /* Store the result in the accumulator in the destination buffer. */
00427       *pOut = (q15_t) (__SSAT(acc0 >> 15, 16));
00428       /* Destination pointer is updated according to the address modifier, inc */
00429       pOut += inc;
00430
00431       *pOut = (q15_t) (__SSAT(acc1 >> 15, 16));
00432       pOut += inc;
00433
00434       *pOut = (q15_t) (__SSAT(acc2 >> 15, 16));
00435       pOut += inc;
00436
00437       *pOut = (q15_t) (__SSAT(acc3 >> 15, 16));
00438       pOut += inc;
00439
00440       /* Increment the count by 4 as 4 output values are computed */
00441       count += 4u;
00442
00443       /* Update the inputA and inputB pointers for next MAC calculation */
00444       px = pIn1 + count;
00445       py = pIn2;
00446       pb = (q31_t *) (py);
00447
00448
00449       /* Decrement the loop counter */
00450       blkCnt--;
00451     }
00452
00453     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00454      ** No loop unrolling is used. */
00455     blkCnt = blockSize2 % 0x4u;
00456
00457     while(blkCnt > 0u)
00458     {
00459       /* Accumulator is made zero for every iteration */
00460       sum = 0;
00461
00462       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00463       k = srcBLen >> 2u;
00464
00465       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00466        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00467       while(k > 0u)
00468       {
00469         /* Perform the multiply-accumulates */
00470         sum += ((q63_t) * px++ * *py++);
00471         sum += ((q63_t) * px++ * *py++);
00472         sum += ((q63_t) * px++ * *py++);
00473         sum += ((q63_t) * px++ * *py++);
00474
00475         /* Decrement the loop counter */
00476         k--;
00477       }
00478
00479       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00480        ** No loop unrolling is used. */
00481       k = srcBLen % 0x4u;
00482
00483       while(k > 0u)
00484       {
00485         /* Perform the multiply-accumulates */
00486         sum += ((q63_t) * px++ * *py++);
00487
00488         /* Decrement the loop counter */
00489         k--;
00490       }
00491
00492       /* Store the result in the accumulator in the destination buffer. */
00493       *pOut = (q15_t) (__SSAT(sum >> 15, 16));
00494       /* Destination pointer is updated according to the address modifier, inc */
00495       pOut += inc;
00496
00497       /* Increment count by 1, as one output value is computed */
00498       count++;
00499
00500       /* Update the inputA and inputB pointers for next MAC calculation */
00501       px = pIn1 + count;
00502       py = pIn2;
00503
00504       /* Decrement the loop counter */
00505       blkCnt--;
00506     }
00507   }
00508   else
00509   {
00510     /* If the srcBLen is not a multiple of 4,
00511      * the blockSize2 loop cannot be unrolled by 4 */
00512     blkCnt = blockSize2;
00513
00514     while(blkCnt > 0u)
00515     {
00516       /* Accumulator is made zero for every iteration */
00517       sum = 0;
00518
00519       /* Loop over srcBLen */
00520       k = srcBLen;
00521
00522       while(k > 0u)
00523       {
00524         /* Perform the multiply-accumulate */
00525         sum += ((q63_t) * px++ * *py++);
00526
00527         /* Decrement the loop counter */
00528         k--;
00529       }
00530
00531       /* Store the result in the accumulator in the destination buffer. */
00532       *pOut = (q15_t) (__SSAT(sum >> 15, 16));
00533       /* Destination pointer is updated according to the address modifier, inc */
00534       pOut += inc;
00535
00536       /* Increment the MAC count */
00537       count++;
00538
00539       /* Update the inputA and inputB pointers for next MAC calculation */
00540       px = pIn1 + count;
00541       py = pIn2;
00542
00543       /* Decrement the loop counter */
00544       blkCnt--;
00545     }
00546   }
00547
00548   /* --------------------------
00549    * Initializations of stage3
00550    * -------------------------*/
00551
00552   /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00553    * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00554    * ....
00555    * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
00556    * sum +=  x[srcALen-1] * y[0]
00557    */
00558
00559   /* In this stage the MAC operations are decreased by 1 for every iteration.
00560      The count variable holds the number of MAC operations performed */
00561   count = srcBLen - 1u;
00562
00563   /* Working pointer of inputA */
00564   pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00565   px = pSrc1;
00566
00567   /* Working pointer of inputB */
00568   py = pIn2;
00569
00570   /* -------------------
00571    * Stage3 process
00572    * ------------------*/
00573
00574   while(blockSize3 > 0u)
00575   {
00576     /* Accumulator is made zero for every iteration */
00577     sum = 0;
00578
00579     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00580     k = count >> 2u;
00581
00582     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00583      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00584     while(k > 0u)
00585     {
00586       /* Perform the multiply-accumulates */
00587       /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */
00588       sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
00589       /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */
00590       sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
00591
00592       /* Decrement the loop counter */
00593       k--;
00594     }
00595
00596     /* If the count is not a multiple of 4, compute any remaining MACs here.
00597      ** No loop unrolling is used. */
00598     k = count % 0x4u;
00599
00600     while(k > 0u)
00601     {
00602       /* Perform the multiply-accumulates */
00603       sum = __SMLALD(*px++, *py++, sum);
00604
00605       /* Decrement the loop counter */
00606       k--;
00607     }
00608
00609     /* Store the result in the accumulator in the destination buffer. */
00610     *pOut = (q15_t) (__SSAT((sum >> 15), 16));
00611     /* Destination pointer is updated according to the address modifier, inc */
00612     pOut += inc;
00613
00614     /* Update the inputA and inputB pointers for next MAC calculation */
00615     px = ++pSrc1;
00616     py = pIn2;
00617
00618     /* Decrement the MAC count */
00619     count--;
00620
00621     /* Decrement the loop counter */
00622     blockSize3--;
00623   }
00624
00625 #else
00626
00627 /* Run the below code for Cortex-M0 */
00628
00629   q15_t *pIn1 = pSrcA;                           /* inputA pointer               */
00630   q15_t *pIn2 = pSrcB + (srcBLen - 1u);          /* inputB pointer               */
00631   q63_t sum;                                     /* Accumulators                  */
00632   uint32_t i = 0u, j;                            /* loop counters */
00633   uint32_t inv = 0u;                             /* Reverse order flag */
00634   uint32_t tot = 0u;                             /* Length */
00635
00636   /* The algorithm implementation is based on the lengths of the inputs. */
00637   /* srcB is always made to slide across srcA. */
00638   /* So srcBLen is always considered as shorter or equal to srcALen */
00639   /* But CORR(x, y) is reverse of CORR(y, x) */
00640   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
00641   /* and a varaible, inv is set to 1 */
00642   /* If lengths are not equal then zero pad has to be done to  make the two
00643    * inputs of same length. But to improve the performance, we include zeroes
00644    * in the output instead of zero padding either of the the inputs*/
00645   /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
00646    * starting of the output buffer */
00647   /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
00648    * ending of the output buffer */
00649   /* Once the zero padding is done the remaining of the output is calcualted
00650    * using convolution but with the shorter signal time shifted. */
00651
00652   /* Calculate the length of the remaining sequence */
00653   tot = ((srcALen + srcBLen) - 2u);
00654
00655   if(srcALen > srcBLen)
00656   {
00657     /* Calculating the number of zeros to be padded to the output */
00658     j = srcALen - srcBLen;
00659
00660     /* Initialise the pointer after zero padding */
00661     pDst += j;
00662   }
00663
00664   else if(srcALen < srcBLen)
00665   {
00666     /* Initialization to inputB pointer */
00667     pIn1 = pSrcB;
00668
00669     /* Initialization to the end of inputA pointer */
00670     pIn2 = pSrcA + (srcALen - 1u);
00671
00672     /* Initialisation of the pointer after zero padding */
00673     pDst = pDst + tot;
00674
00675     /* Swapping the lengths */
00676     j = srcALen;
00677     srcALen = srcBLen;
00678     srcBLen = j;
00679
00680     /* Setting the reverse flag */
00681     inv = 1;
00682
00683   }
00684
00685   /* Loop to calculate convolution for output length number of times */
00686   for (i = 0u; i <= tot; i++)
00687   {
00688     /* Initialize sum with zero to carry on MAC operations */
00689     sum = 0;
00690
00691     /* Loop to perform MAC operations according to convolution equation */
00692     for (j = 0u; j <= i; j++)
00693     {
00694       /* Check the array limitations */
00695       if((((i - j) < srcBLen) && (j < srcALen)))
00696       {
00697         /* z[i] += x[i-j] * y[j] */
00698         sum += ((q31_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
00699       }
00700     }
00701     /* Store the output in the destination buffer */
00702     if(inv == 1)
00703       *pDst-- = (q15_t) __SSAT((sum >> 15u), 16u);
00704     else
00705       *pDst++ = (q15_t) __SSAT((sum >> 15u), 16u);
00706   }
00707
00708 #endif /*   #ifndef ARM_MATH_CM0 */
00709
00710 }
00711
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c
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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_correlate_q31.c
00009 *
00010 * Description:  Correlation of Q31 sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00071 void arm_correlate_q31(
00072   q31_t * pSrcA,
00073   uint32_t srcALen,
00074   q31_t * pSrcB,
00075   uint32_t srcBLen,
00076   q31_t * pDst)
00077 {
00078
00079 #ifndef ARM_MATH_CM0
00080
00081   /* Run the below code for Cortex-M4 and Cortex-M3 */
00082
00083   q31_t *pIn1;                                   /* inputA pointer               */
00084   q31_t *pIn2;                                   /* inputB pointer               */
00085   q31_t *pOut = pDst;                            /* output pointer               */
00086   q31_t *px;                                     /* Intermediate inputA pointer  */
00087   q31_t *py;                                     /* Intermediate inputB pointer  */
00088   q31_t *pSrc1;                                  /* Intermediate pointers        */
00089   q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
00090   q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
00091   uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
00092   int32_t inc = 1;                               /* Destination address modifier */
00093
00094
00095   /* The algorithm implementation is based on the lengths of the inputs. */
00096   /* srcB is always made to slide across srcA. */
00097   /* So srcBLen is always considered as shorter or equal to srcALen */
00098   /* But CORR(x, y) is reverse of CORR(y, x) */
00099   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
00100   /* and the destination pointer modifier, inc is set to -1 */
00101   /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
00102   /* But to improve the performance,
00103    * we include zeroes in the output instead of zero padding either of the the inputs*/
00104   /* If srcALen > srcBLen,
00105    * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
00106   /* If srcALen < srcBLen,
00107    * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
00108   if(srcALen >= srcBLen)
00109   {
00110     /* Initialization of inputA pointer */
00111     pIn1 = (pSrcA);
00112
00113     /* Initialization of inputB pointer */
00114     pIn2 = (pSrcB);
00115
00116     /* Number of output samples is calculated */
00117     outBlockSize = (2u * srcALen) - 1u;
00118
00119     /* When srcALen > srcBLen, zero padding is done to srcB
00120      * to make their lengths equal.
00121      * Instead, (outBlockSize - (srcALen + srcBLen - 1))
00122      * number of output samples are made zero */
00123     j = outBlockSize - (srcALen + (srcBLen - 1u));
00124
00125     /* Updating the pointer position to non zero value */
00126     pOut += j;
00127
00128   }
00129   else
00130   {
00131     /* Initialization of inputA pointer */
00132     pIn1 = (pSrcB);
00133
00134     /* Initialization of inputB pointer */
00135     pIn2 = (pSrcA);
00136
00137     /* srcBLen is always considered as shorter or equal to srcALen */
00138     j = srcBLen;
00139     srcBLen = srcALen;
00140     srcALen = j;
00141
00142     /* CORR(x, y) = Reverse order(CORR(y, x)) */
00143     /* Hence set the destination pointer to point to the last output sample */
00144     pOut = pDst + ((srcALen + srcBLen) - 2u);
00145
00146     /* Destination address modifier is set to -1 */
00147     inc = -1;
00148
00149   }
00150
00151   /* The function is internally
00152    * divided into three parts according to the number of multiplications that has to be
00153    * taken place between inputA samples and inputB samples. In the first part of the
00154    * algorithm, the multiplications increase by one for every iteration.
00155    * In the second part of the algorithm, srcBLen number of multiplications are done.
00156    * In the third part of the algorithm, the multiplications decrease by one
00157    * for every iteration.*/
00158   /* The algorithm is implemented in three stages.
00159    * The loop counters of each stage is initiated here. */
00160   blockSize1 = srcBLen - 1u;
00161   blockSize2 = srcALen - (srcBLen - 1u);
00162   blockSize3 = blockSize1;
00163
00164   /* --------------------------
00165    * Initializations of stage1
00166    * -------------------------*/
00167
00168   /* sum = x[0] * y[srcBlen - 1]
00169    * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
00170    * ....
00171    * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
00172    */
00173
00174   /* In this stage the MAC operations are increased by 1 for every iteration.
00175      The count variable holds the number of MAC operations performed */
00176   count = 1u;
00177
00178   /* Working pointer of inputA */
00179   px = pIn1;
00180
00181   /* Working pointer of inputB */
00182   pSrc1 = pIn2 + (srcBLen - 1u);
00183   py = pSrc1;
00184
00185   /* ------------------------
00186    * Stage1 process
00187    * ----------------------*/
00188
00189   /* The first stage starts here */
00190   while(blockSize1 > 0u)
00191   {
00192     /* Accumulator is made zero for every iteration */
00193     sum = 0;
00194
00195     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00196     k = count >> 2;
00197
00198     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00199      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00200     while(k > 0u)
00201     {
00202       /* x[0] * y[srcBLen - 4] */
00203       sum += (q63_t) * px++ * (*py++);
00204       /* x[1] * y[srcBLen - 3] */
00205       sum += (q63_t) * px++ * (*py++);
00206       /* x[2] * y[srcBLen - 2] */
00207       sum += (q63_t) * px++ * (*py++);
00208       /* x[3] * y[srcBLen - 1] */
00209       sum += (q63_t) * px++ * (*py++);
00210
00211       /* Decrement the loop counter */
00212       k--;
00213     }
00214
00215     /* If the count is not a multiple of 4, compute any remaining MACs here.
00216      ** No loop unrolling is used. */
00217     k = count % 0x4u;
00218
00219     while(k > 0u)
00220     {
00221       /* Perform the multiply-accumulates */
00222       /* x[0] * y[srcBLen - 1] */
00223       sum += (q63_t) * px++ * (*py++);
00224
00225       /* Decrement the loop counter */
00226       k--;
00227     }
00228
00229     /* Store the result in the accumulator in the destination buffer. */
00230     *pOut = (q31_t) (sum >> 31);
00231     /* Destination pointer is updated according to the address modifier, inc */
00232     pOut += inc;
00233
00234     /* Update the inputA and inputB pointers for next MAC calculation */
00235     py = pSrc1 - count;
00236     px = pIn1;
00237
00238     /* Increment the MAC count */
00239     count++;
00240
00241     /* Decrement the loop counter */
00242     blockSize1--;
00243   }
00244
00245   /* --------------------------
00246    * Initializations of stage2
00247    * ------------------------*/
00248
00249   /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
00250    * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
00251    * ....
00252    * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00253    */
00254
00255   /* Working pointer of inputA */
00256   px = pIn1;
00257
00258   /* Working pointer of inputB */
00259   py = pIn2;
00260
00261   /* count is index by which the pointer pIn1 to be incremented */
00262   count = 1u;
00263
00264   /* -------------------
00265    * Stage2 process
00266    * ------------------*/
00267
00268   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00269    * So, to loop unroll over blockSize2,
00270    * srcBLen should be greater than or equal to 4 */
00271   if(srcBLen >= 4u)
00272   {
00273     /* Loop unroll over blockSize2, by 4 */
00274     blkCnt = blockSize2 >> 2u;
00275
00276     while(blkCnt > 0u)
00277     {
00278       /* Set all accumulators to zero */
00279       acc0 = 0;
00280       acc1 = 0;
00281       acc2 = 0;
00282       acc3 = 0;
00283
00284       /* read x[0], x[1], x[2] samples */
00285       x0 = *(px++);
00286       x1 = *(px++);
00287       x2 = *(px++);
00288
00289       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00290       k = srcBLen >> 2u;
00291
00292       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00293        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00294       do
00295       {
00296         /* Read y[0] sample */
00297         c0 = *(py++);
00298
00299         /* Read x[3] sample */
00300         x3 = *(px++);
00301
00302         /* Perform the multiply-accumulate */
00303         /* acc0 +=  x[0] * y[0] */
00304         acc0 += ((q63_t) x0 * c0);
00305         /* acc1 +=  x[1] * y[0] */
00306         acc1 += ((q63_t) x1 * c0);
00307         /* acc2 +=  x[2] * y[0] */
00308         acc2 += ((q63_t) x2 * c0);
00309         /* acc3 +=  x[3] * y[0] */
00310         acc3 += ((q63_t) x3 * c0);
00311
00312         /* Read y[1] sample */
00313         c0 = *(py++);
00314
00315         /* Read x[4] sample */
00316         x0 = *(px++);
00317
00318         /* Perform the multiply-accumulates */
00319         /* acc0 +=  x[1] * y[1] */
00320         acc0 += ((q63_t) x1 * c0);
00321         /* acc1 +=  x[2] * y[1] */
00322         acc1 += ((q63_t) x2 * c0);
00323         /* acc2 +=  x[3] * y[1] */
00324         acc2 += ((q63_t) x3 * c0);
00325         /* acc3 +=  x[4] * y[1] */
00326         acc3 += ((q63_t) x0 * c0);
00327         /* Read y[2] sample */
00328         c0 = *(py++);
00329
00330         /* Read x[5] sample */
00331         x1 = *(px++);
00332
00333         /* Perform the multiply-accumulates */
00334         /* acc0 +=  x[2] * y[2] */
00335         acc0 += ((q63_t) x2 * c0);
00336         /* acc1 +=  x[3] * y[2] */
00337         acc1 += ((q63_t) x3 * c0);
00338         /* acc2 +=  x[4] * y[2] */
00339         acc2 += ((q63_t) x0 * c0);
00340         /* acc3 +=  x[5] * y[2] */
00341         acc3 += ((q63_t) x1 * c0);
00342
00343         /* Read y[3] sample */
00344         c0 = *(py++);
00345
00346         /* Read x[6] sample */
00347         x2 = *(px++);
00348
00349         /* Perform the multiply-accumulates */
00350         /* acc0 +=  x[3] * y[3] */
00351         acc0 += ((q63_t) x3 * c0);
00352         /* acc1 +=  x[4] * y[3] */
00353         acc1 += ((q63_t) x0 * c0);
00354         /* acc2 +=  x[5] * y[3] */
00355         acc2 += ((q63_t) x1 * c0);
00356         /* acc3 +=  x[6] * y[3] */
00357         acc3 += ((q63_t) x2 * c0);
00358
00359
00360       } while(--k);
00361
00362       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00363        ** No loop unrolling is used. */
00364       k = srcBLen % 0x4u;
00365
00366       while(k > 0u)
00367       {
00368         /* Read y[4] sample */
00369         c0 = *(py++);
00370
00371         /* Read x[7] sample */
00372         x3 = *(px++);
00373
00374         /* Perform the multiply-accumulates */
00375         /* acc0 +=  x[4] * y[4] */
00376         acc0 += ((q63_t) x0 * c0);
00377         /* acc1 +=  x[5] * y[4] */
00378         acc1 += ((q63_t) x1 * c0);
00379         /* acc2 +=  x[6] * y[4] */
00380         acc2 += ((q63_t) x2 * c0);
00381         /* acc3 +=  x[7] * y[4] */
00382         acc3 += ((q63_t) x3 * c0);
00383
00384         /* Reuse the present samples for the next MAC */
00385         x0 = x1;
00386         x1 = x2;
00387         x2 = x3;
00388
00389         /* Decrement the loop counter */
00390         k--;
00391       }
00392
00393       /* Store the result in the accumulator in the destination buffer. */
00394       *pOut = (q31_t) (acc0 >> 31);
00395       /* Destination pointer is updated according to the address modifier, inc */
00396       pOut += inc;
00397
00398       *pOut = (q31_t) (acc1 >> 31);
00399       pOut += inc;
00400
00401       *pOut = (q31_t) (acc2 >> 31);
00402       pOut += inc;
00403
00404       *pOut = (q31_t) (acc3 >> 31);
00405       pOut += inc;
00406
00407       /* Update the inputA and inputB pointers for next MAC calculation */
00408       px = pIn1 + (count * 4u);
00409       py = pIn2;
00410
00411       /* Increment the pointer pIn1 index, count by 1 */
00412       count++;
00413
00414       /* Decrement the loop counter */
00415       blkCnt--;
00416     }
00417
00418     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00419      ** No loop unrolling is used. */
00420     blkCnt = blockSize2 % 0x4u;
00421
00422     while(blkCnt > 0u)
00423     {
00424       /* Accumulator is made zero for every iteration */
00425       sum = 0;
00426
00427       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00428       k = srcBLen >> 2u;
00429
00430       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00431        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00432       while(k > 0u)
00433       {
00434         /* Perform the multiply-accumulates */
00435         sum += (q63_t) * px++ * (*py++);
00436         sum += (q63_t) * px++ * (*py++);
00437         sum += (q63_t) * px++ * (*py++);
00438         sum += (q63_t) * px++ * (*py++);
00439
00440         /* Decrement the loop counter */
00441         k--;
00442       }
00443
00444       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00445        ** No loop unrolling is used. */
00446       k = srcBLen % 0x4u;
00447
00448       while(k > 0u)
00449       {
00450         /* Perform the multiply-accumulate */
00451         sum += (q63_t) * px++ * (*py++);
00452
00453         /* Decrement the loop counter */
00454         k--;
00455       }
00456
00457       /* Store the result in the accumulator in the destination buffer. */
00458       *pOut = (q31_t) (sum >> 31);
00459       /* Destination pointer is updated according to the address modifier, inc */
00460       pOut += inc;
00461
00462       /* Update the inputA and inputB pointers for next MAC calculation */
00463       px = pIn1 + count;
00464       py = pIn2;
00465
00466       /* Increment the MAC count */
00467       count++;
00468
00469       /* Decrement the loop counter */
00470       blkCnt--;
00471     }
00472   }
00473   else
00474   {
00475     /* If the srcBLen is not a multiple of 4,
00476      * the blockSize2 loop cannot be unrolled by 4 */
00477     blkCnt = blockSize2;
00478
00479     while(blkCnt > 0u)
00480     {
00481       /* Accumulator is made zero for every iteration */
00482       sum = 0;
00483
00484       /* Loop over srcBLen */
00485       k = srcBLen;
00486
00487       while(k > 0u)
00488       {
00489         /* Perform the multiply-accumulate */
00490         sum += (q63_t) * px++ * (*py++);
00491
00492         /* Decrement the loop counter */
00493         k--;
00494       }
00495
00496       /* Store the result in the accumulator in the destination buffer. */
00497       *pOut = (q31_t) (sum >> 31);
00498       /* Destination pointer is updated according to the address modifier, inc */
00499       pOut += inc;
00500
00501       /* Update the inputA and inputB pointers for next MAC calculation */
00502       px = pIn1 + count;
00503       py = pIn2;
00504
00505       /* Increment the MAC count */
00506       count++;
00507
00508       /* Decrement the loop counter */
00509       blkCnt--;
00510     }
00511   }
00512
00513   /* --------------------------
00514    * Initializations of stage3
00515    * -------------------------*/
00516
00517   /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00518    * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00519    * ....
00520    * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
00521    * sum +=  x[srcALen-1] * y[0]
00522    */
00523
00524   /* In this stage the MAC operations are decreased by 1 for every iteration.
00525      The count variable holds the number of MAC operations performed */
00526   count = srcBLen - 1u;
00527
00528   /* Working pointer of inputA */
00529   pSrc1 = pIn1 + (srcALen - (srcBLen - 1u));
00530   px = pSrc1;
00531
00532   /* Working pointer of inputB */
00533   py = pIn2;
00534
00535   /* -------------------
00536    * Stage3 process
00537    * ------------------*/
00538
00539   while(blockSize3 > 0u)
00540   {
00541     /* Accumulator is made zero for every iteration */
00542     sum = 0;
00543
00544     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00545     k = count >> 2u;
00546
00547     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00548      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00549     while(k > 0u)
00550     {
00551       /* Perform the multiply-accumulates */
00552       /* sum += x[srcALen - srcBLen + 4] * y[3] */
00553       sum += (q63_t) * px++ * (*py++);
00554       /* sum += x[srcALen - srcBLen + 3] * y[2] */
00555       sum += (q63_t) * px++ * (*py++);
00556       /* sum += x[srcALen - srcBLen + 2] * y[1] */
00557       sum += (q63_t) * px++ * (*py++);
00558       /* sum += x[srcALen - srcBLen + 1] * y[0] */
00559       sum += (q63_t) * px++ * (*py++);
00560
00561       /* Decrement the loop counter */
00562       k--;
00563     }
00564
00565     /* If the count is not a multiple of 4, compute any remaining MACs here.
00566      ** No loop unrolling is used. */
00567     k = count % 0x4u;
00568
00569     while(k > 0u)
00570     {
00571       /* Perform the multiply-accumulates */
00572       sum += (q63_t) * px++ * (*py++);
00573
00574       /* Decrement the loop counter */
00575       k--;
00576     }
00577
00578     /* Store the result in the accumulator in the destination buffer. */
00579     *pOut = (q31_t) (sum >> 31);
00580     /* Destination pointer is updated according to the address modifier, inc */
00581     pOut += inc;
00582
00583     /* Update the inputA and inputB pointers for next MAC calculation */
00584     px = ++pSrc1;
00585     py = pIn2;
00586
00587     /* Decrement the MAC count */
00588     count--;
00589
00590     /* Decrement the loop counter */
00591     blockSize3--;
00592   }
00593
00594 #else
00595
00596   /* Run the below code for Cortex-M0 */
00597
00598   q31_t *pIn1 = pSrcA;                           /* inputA pointer               */
00599   q31_t *pIn2 = pSrcB + (srcBLen - 1u);          /* inputB pointer               */
00600   q63_t sum;                                     /* Accumulators                  */
00601   uint32_t i = 0u, j;                            /* loop counters */
00602   uint32_t inv = 0u;                             /* Reverse order flag */
00603   uint32_t tot = 0u;                             /* Length */
00604
00605   /* The algorithm implementation is based on the lengths of the inputs. */
00606   /* srcB is always made to slide across srcA. */
00607   /* So srcBLen is always considered as shorter or equal to srcALen */
00608   /* But CORR(x, y) is reverse of CORR(y, x) */
00609   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
00610   /* and a varaible, inv is set to 1 */
00611   /* If lengths are not equal then zero pad has to be done to  make the two
00612    * inputs of same length. But to improve the performance, we include zeroes
00613    * in the output instead of zero padding either of the the inputs*/
00614   /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
00615    * starting of the output buffer */
00616   /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
00617    * ending of the output buffer */
00618   /* Once the zero padding is done the remaining of the output is calcualted
00619    * using convolution but with the shorter signal time shifted. */
00620
00621   /* Calculate the length of the remaining sequence */
00622   tot = ((srcALen + srcBLen) - 2u);
00623
00624   if(srcALen > srcBLen)
00625   {
00626     /* Calculating the number of zeros to be padded to the output */
00627     j = srcALen - srcBLen;
00628
00629     /* Initialise the pointer after zero padding */
00630     pDst += j;
00631   }
00632
00633   else if(srcALen < srcBLen)
00634   {
00635     /* Initialization to inputB pointer */
00636     pIn1 = pSrcB;
00637
00638     /* Initialization to the end of inputA pointer */
00639     pIn2 = pSrcA + (srcALen - 1u);
00640
00641     /* Initialisation of the pointer after zero padding */
00642     pDst = pDst + tot;
00643
00644     /* Swapping the lengths */
00645     j = srcALen;
00646     srcALen = srcBLen;
00647     srcBLen = j;
00648
00649     /* Setting the reverse flag */
00650     inv = 1;
00651
00652   }
00653
00654   /* Loop to calculate convolution for output length number of times */
00655   for (i = 0u; i <= tot; i++)
00656   {
00657     /* Initialize sum with zero to carry on MAC operations */
00658     sum = 0;
00659
00660     /* Loop to perform MAC operations according to convolution equation */
00661     for (j = 0u; j <= i; j++)
00662     {
00663       /* Check the array limitations */
00664       if((((i - j) < srcBLen) && (j < srcALen)))
00665       {
00666         /* z[i] += x[i-j] * y[j] */
00667         sum += ((q63_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
00668       }
00669     }
00670     /* Store the output in the destination buffer */
00671     if(inv == 1)
00672       *pDst-- = (q31_t) (sum >> 31u);
00673     else
00674       *pDst++ = (q31_t) (sum >> 31u);
00675   }
00676
00677 #endif /*   #ifndef ARM_MATH_CM0 */
00678
00679 }
00680
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_cos_f32.c
00009 *
00010 * Description:  Fast cosine calculation for floating-point values.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00086 static const float32_t cosTable[259] = {
00087   0.999698817729949950f, 1.000000000000000000f, 0.999698817729949950f,
00088   0.998795449733734130f, 0.997290432453155520f, 0.995184719562530520f,
00089   0.992479562759399410f, 0.989176511764526370f,
00090   0.985277652740478520f, 0.980785250663757320f, 0.975702106952667240f,
00091   0.970031261444091800f, 0.963776051998138430f, 0.956940352916717530f,
00092   0.949528157711029050f, 0.941544055938720700f,
00093   0.932992815971374510f, 0.923879504203796390f, 0.914209783077239990f,
00094   0.903989315032958980f, 0.893224298954010010f, 0.881921291351318360f,
00095   0.870086967945098880f, 0.857728600502014160f,
00096   0.844853579998016360f, 0.831469595432281490f, 0.817584812641143800f,
00097   0.803207516670227050f, 0.788346409797668460f, 0.773010432720184330f,
00098   0.757208824157714840f, 0.740951120853424070f,
00099   0.724247097969055180f, 0.707106769084930420f, 0.689540565013885500f,
00100   0.671558976173400880f, 0.653172850608825680f, 0.634393274784088130f,
00101   0.615231573581695560f, 0.595699310302734380f,
00102   0.575808167457580570f, 0.555570244789123540f, 0.534997642040252690f,
00103   0.514102756977081300f, 0.492898195981979370f, 0.471396744251251220f,
00104   0.449611335992813110f, 0.427555084228515630f,
00105   0.405241310596466060f, 0.382683426141738890f, 0.359895050525665280f,
00106   0.336889863014221190f, 0.313681751489639280f, 0.290284663438797000f,
00107   0.266712754964828490f, 0.242980182170867920f,
00108   0.219101235270500180f, 0.195090323686599730f, 0.170961886644363400f,
00109   0.146730467677116390f, 0.122410677373409270f, 0.098017141222953796f,
00110   0.073564566671848297f, 0.049067676067352295f,
00111   0.024541229009628296f, 0.000000000000000061f, -0.024541229009628296f,
00112   -0.049067676067352295f, -0.073564566671848297f, -0.098017141222953796f,
00113   -0.122410677373409270f, -0.146730467677116390f,
00114   -0.170961886644363400f, -0.195090323686599730f, -0.219101235270500180f,
00115   -0.242980182170867920f, -0.266712754964828490f, -0.290284663438797000f,
00116   -0.313681751489639280f, -0.336889863014221190f,
00117   -0.359895050525665280f, -0.382683426141738890f, -0.405241310596466060f,
00118   -0.427555084228515630f, -0.449611335992813110f, -0.471396744251251220f,
00119   -0.492898195981979370f, -0.514102756977081300f,
00120   -0.534997642040252690f, -0.555570244789123540f, -0.575808167457580570f,
00121   -0.595699310302734380f, -0.615231573581695560f, -0.634393274784088130f,
00122   -0.653172850608825680f, -0.671558976173400880f,
00123   -0.689540565013885500f, -0.707106769084930420f, -0.724247097969055180f,
00124   -0.740951120853424070f, -0.757208824157714840f, -0.773010432720184330f,
00125   -0.788346409797668460f, -0.803207516670227050f,
00126   -0.817584812641143800f, -0.831469595432281490f, -0.844853579998016360f,
00127   -0.857728600502014160f, -0.870086967945098880f, -0.881921291351318360f,
00128   -0.893224298954010010f, -0.903989315032958980f,
00129   -0.914209783077239990f, -0.923879504203796390f, -0.932992815971374510f,
00130   -0.941544055938720700f, -0.949528157711029050f, -0.956940352916717530f,
00131   -0.963776051998138430f, -0.970031261444091800f,
00132   -0.975702106952667240f, -0.980785250663757320f, -0.985277652740478520f,
00133   -0.989176511764526370f, -0.992479562759399410f, -0.995184719562530520f,
00134   -0.997290432453155520f, -0.998795449733734130f,
00135   -0.999698817729949950f, -1.000000000000000000f, -0.999698817729949950f,
00136   -0.998795449733734130f, -0.997290432453155520f, -0.995184719562530520f,
00137   -0.992479562759399410f, -0.989176511764526370f,
00138   -0.985277652740478520f, -0.980785250663757320f, -0.975702106952667240f,
00139   -0.970031261444091800f, -0.963776051998138430f, -0.956940352916717530f,
00140   -0.949528157711029050f, -0.941544055938720700f,
00141   -0.932992815971374510f, -0.923879504203796390f, -0.914209783077239990f,
00142   -0.903989315032958980f, -0.893224298954010010f, -0.881921291351318360f,
00143   -0.870086967945098880f, -0.857728600502014160f,
00144   -0.844853579998016360f, -0.831469595432281490f, -0.817584812641143800f,
00145   -0.803207516670227050f, -0.788346409797668460f, -0.773010432720184330f,
00146   -0.757208824157714840f, -0.740951120853424070f,
00147   -0.724247097969055180f, -0.707106769084930420f, -0.689540565013885500f,
00148   -0.671558976173400880f, -0.653172850608825680f, -0.634393274784088130f,
00149   -0.615231573581695560f, -0.595699310302734380f,
00150   -0.575808167457580570f, -0.555570244789123540f, -0.534997642040252690f,
00151   -0.514102756977081300f, -0.492898195981979370f, -0.471396744251251220f,
00152   -0.449611335992813110f, -0.427555084228515630f,
00153   -0.405241310596466060f, -0.382683426141738890f, -0.359895050525665280f,
00154   -0.336889863014221190f, -0.313681751489639280f, -0.290284663438797000f,
00155   -0.266712754964828490f, -0.242980182170867920f,
00156   -0.219101235270500180f, -0.195090323686599730f, -0.170961886644363400f,
00157   -0.146730467677116390f, -0.122410677373409270f, -0.098017141222953796f,
00158   -0.073564566671848297f, -0.049067676067352295f,
00159   -0.024541229009628296f, -0.000000000000000184f, 0.024541229009628296f,
00160   0.049067676067352295f, 0.073564566671848297f, 0.098017141222953796f,
00161   0.122410677373409270f, 0.146730467677116390f,
00162   0.170961886644363400f, 0.195090323686599730f, 0.219101235270500180f,
00163   0.242980182170867920f, 0.266712754964828490f, 0.290284663438797000f,
00164   0.313681751489639280f, 0.336889863014221190f,
00165   0.359895050525665280f, 0.382683426141738890f, 0.405241310596466060f,
00166   0.427555084228515630f, 0.449611335992813110f, 0.471396744251251220f,
00167   0.492898195981979370f, 0.514102756977081300f,
00168   0.534997642040252690f, 0.555570244789123540f, 0.575808167457580570f,
00169   0.595699310302734380f, 0.615231573581695560f, 0.634393274784088130f,
00170   0.653172850608825680f, 0.671558976173400880f,
00171   0.689540565013885500f, 0.707106769084930420f, 0.724247097969055180f,
00172   0.740951120853424070f, 0.757208824157714840f, 0.773010432720184330f,
00173   0.788346409797668460f, 0.803207516670227050f,
00174   0.817584812641143800f, 0.831469595432281490f, 0.844853579998016360f,
00175   0.857728600502014160f, 0.870086967945098880f, 0.881921291351318360f,
00176   0.893224298954010010f, 0.903989315032958980f,
00177   0.914209783077239990f, 0.923879504203796390f, 0.932992815971374510f,
00178   0.941544055938720700f, 0.949528157711029050f, 0.956940352916717530f,
00179   0.963776051998138430f, 0.970031261444091800f,
00180   0.975702106952667240f, 0.980785250663757320f, 0.985277652740478520f,
00181   0.989176511764526370f, 0.992479562759399410f, 0.995184719562530520f,
00182   0.997290432453155520f, 0.998795449733734130f,
00183   0.999698817729949950f, 1.000000000000000000f, 0.999698817729949950f
00184 };
00185
00192 float32_t arm_cos_f32(
00193   float32_t x)
00194 {
00195   float32_t cosVal, fract, in;
00196   uint32_t index;
00197   uint32_t tableSize = (uint32_t) TABLE_SIZE;
00198   float32_t wa, wb, wc, wd;
00199   float32_t a, b, c, d;
00200   float32_t *tablePtr;
00201   int32_t n;
00202
00203   /* input x is in radians */
00204   /* Scale the input to [0 1] range from [0 2*PI] , divide input by 2*pi */
00205   in = x * 0.159154943092f;
00206
00207   /* Calculation of floor value of input */
00208   n = (int32_t) in;
00209
00210   /* Make negative values towards -infinity */
00211   if(x < 0.0f)
00212   {
00213     n = n - 1;
00214   }
00215
00216   /* Map input value to [0 1] */
00217   in = in - (float32_t) n;
00218
00219   /* Calculation of index of the table */
00220   index = (uint32_t) (tableSize * in);
00221
00222   /* fractional value calculation */
00223   fract = ((float32_t) tableSize * in) - (float32_t) index;
00224
00225   /* Initialise table pointer */
00226   tablePtr = (float32_t *) & cosTable[index];
00227
00228   /* Read four nearest values of input value from the cos table */
00229   a = *tablePtr++;
00230   b = *tablePtr++;
00231   c = *tablePtr++;
00232   d = *tablePtr++;
00233
00234   /* Cubic interpolation process */
00235   wa = -(((0.166666667f) * fract) * (fract * fract)) +
00236     (((0.5f) * (fract * fract)) - ((0.3333333333333f) * fract));
00237   wb = ((((0.5f) * fract) * (fract * fract)) - (fract * fract)) +
00238     (-((0.5f) * fract) + 1.0f);
00239   wc = -(((0.5f) * fract) * (fract * fract)) +
00240     (((0.5f) * (fract * fract)) + fract);
00241   wd = (((0.166666667f) * fract) * (fract * fract)) -
00242     ((0.166666667f) * fract);
00243
00244   /* Calculate cos value */
00245   cosVal = ((a * wa) + (b * wb)) + ((c * wc) + (d * wd));
00246
00247   /* Return the output value */
00248   return (cosVal);
00249
00250 }
00251
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_cos_q15.c
00009 *
00010 * Description:  Fast cosine calculation for Q15 values.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00060 static const q15_t cosTableQ15[259] = {
00061   0x7ff6, 0x7fff, 0x7ff6, 0x7fd9, 0x7fa7, 0x7f62, 0x7f0a, 0x7e9d,
00062   0x7e1e, 0x7d8a, 0x7ce4, 0x7c2a, 0x7b5d, 0x7a7d, 0x798a, 0x7885,
00063   0x776c, 0x7642, 0x7505, 0x73b6, 0x7255, 0x70e3, 0x6f5f, 0x6dca,
00064   0x6c24, 0x6a6e, 0x68a7, 0x66d0, 0x64e9, 0x62f2, 0x60ec, 0x5ed7,
00065   0x5cb4, 0x5a82, 0x5843, 0x55f6, 0x539b, 0x5134, 0x4ec0, 0x4c40,
00066   0x49b4, 0x471d, 0x447b, 0x41ce, 0x3f17, 0x3c57, 0x398d, 0x36ba,
00067   0x33df, 0x30fc, 0x2e11, 0x2b1f, 0x2827, 0x2528, 0x2224, 0x1f1a,
00068   0x1c0c, 0x18f9, 0x15e2, 0x12c8, 0xfab, 0xc8c, 0x96b, 0x648,
00069   0x324, 0x0, 0xfcdc, 0xf9b8, 0xf695, 0xf374, 0xf055, 0xed38,
00070   0xea1e, 0xe707, 0xe3f4, 0xe0e6, 0xdddc, 0xdad8, 0xd7d9, 0xd4e1,
00071   0xd1ef, 0xcf04, 0xcc21, 0xc946, 0xc673, 0xc3a9, 0xc0e9, 0xbe32,
00072   0xbb85, 0xb8e3, 0xb64c, 0xb3c0, 0xb140, 0xaecc, 0xac65, 0xaa0a,
00073   0xa7bd, 0xa57e, 0xa34c, 0xa129, 0x9f14, 0x9d0e, 0x9b17, 0x9930,
00074   0x9759, 0x9592, 0x93dc, 0x9236, 0x90a1, 0x8f1d, 0x8dab, 0x8c4a,
00075   0x8afb, 0x89be, 0x8894, 0x877b, 0x8676, 0x8583, 0x84a3, 0x83d6,
00076   0x831c, 0x8276, 0x81e2, 0x8163, 0x80f6, 0x809e, 0x8059, 0x8027,
00077   0x800a, 0x8000, 0x800a, 0x8027, 0x8059, 0x809e, 0x80f6, 0x8163,
00078   0x81e2, 0x8276, 0x831c, 0x83d6, 0x84a3, 0x8583, 0x8676, 0x877b,
00079   0x8894, 0x89be, 0x8afb, 0x8c4a, 0x8dab, 0x8f1d, 0x90a1, 0x9236,
00080   0x93dc, 0x9592, 0x9759, 0x9930, 0x9b17, 0x9d0e, 0x9f14, 0xa129,
00081   0xa34c, 0xa57e, 0xa7bd, 0xaa0a, 0xac65, 0xaecc, 0xb140, 0xb3c0,
00082   0xb64c, 0xb8e3, 0xbb85, 0xbe32, 0xc0e9, 0xc3a9, 0xc673, 0xc946,
00083   0xcc21, 0xcf04, 0xd1ef, 0xd4e1, 0xd7d9, 0xdad8, 0xdddc, 0xe0e6,
00084   0xe3f4, 0xe707, 0xea1e, 0xed38, 0xf055, 0xf374, 0xf695, 0xf9b8,
00085   0xfcdc, 0x0, 0x324, 0x648, 0x96b, 0xc8c, 0xfab, 0x12c8,
00086   0x15e2, 0x18f9, 0x1c0c, 0x1f1a, 0x2224, 0x2528, 0x2827, 0x2b1f,
00087   0x2e11, 0x30fc, 0x33df, 0x36ba, 0x398d, 0x3c57, 0x3f17, 0x41ce,
00088   0x447b, 0x471d, 0x49b4, 0x4c40, 0x4ec0, 0x5134, 0x539b, 0x55f6,
00089   0x5843, 0x5a82, 0x5cb4, 0x5ed7, 0x60ec, 0x62f2, 0x64e9, 0x66d0,
00090   0x68a7, 0x6a6e, 0x6c24, 0x6dca, 0x6f5f, 0x70e3, 0x7255, 0x73b6,
00091   0x7505, 0x7642, 0x776c, 0x7885, 0x798a, 0x7a7d, 0x7b5d, 0x7c2a,
00092   0x7ce4, 0x7d8a, 0x7e1e, 0x7e9d, 0x7f0a, 0x7f62, 0x7fa7, 0x7fd9,
00093   0x7ff6, 0x7fff, 0x7ff6
00094 };
00095
00096
00105 q15_t arm_cos_q15(
00106   q15_t x)
00107 {
00108   q31_t cosVal;                                  /* Temporary variable for output */
00109   q15_t *tablePtr;                               /* Pointer to table */
00110   q15_t in, in2;                                 /* Temporary variables for input */
00111   q31_t wa, wb, wc, wd;                          /* Cubic interpolation coefficients */
00112   q15_t a, b, c, d;                              /* Four nearest output values */
00113   q15_t fract, fractCube, fractSquare;           /* Variables for fractional value */
00114   q15_t oneBy6 = 0x1555;                         /* Fixed point value of 1/6 */
00115   q15_t tableSpacing = TABLE_SPACING_Q15;        /* Table spacing */
00116   int32_t index;                                 /* Index variable */
00117
00118   in = x;
00119
00120   /* Calculate the nearest index */
00121   index = (int32_t) in / tableSpacing;
00122
00123   /* Calculate the nearest value of input */
00124   in2 = (q15_t) index *tableSpacing;
00125
00126   /* Calculation of fractional value */
00127   fract = (in - in2) << 8;
00128
00129   /* fractSquare = fract * fract */
00130   fractSquare = (q15_t) ((fract * fract) >> 15);
00131
00132   /* fractCube = fract * fract * fract */
00133   fractCube = (q15_t) ((fractSquare * fract) >> 15);
00134
00135   /* Initialise table pointer */
00136   tablePtr = (q15_t *) & cosTableQ15[index];
00137
00138   /* Cubic interpolation process */
00139   /* Calculation of wa */
00140   /* wa = -(oneBy6)*fractCube + (fractSquare >> 1u) - (0x2AAA)*fract; */
00141   wa = (q31_t) oneBy6 *fractCube;
00142   wa += (q31_t) 0x2AAA *fract;
00143   wa = -(wa >> 15);
00144   wa += (fractSquare >> 1u);
00145
00146   /* Read first nearest value of output from the cos table */
00147   a = *tablePtr++;
00148
00149   /* cosVal = a * wa */
00150   cosVal = a * wa;
00151
00152   /* Calculation of wb */
00153   wb = (((fractCube >> 1u) - fractSquare) - (fract >> 1u)) + 0x7FFF;
00154
00155   /* Read second nearest value of output from the cos table */
00156   b = *tablePtr++;
00157
00158   /*      cosVal += b*wb */
00159   cosVal += b * wb;
00160
00161   /* Calculation of wc */
00162   wc = -(q31_t) fractCube + fractSquare;
00163   wc = (wc >> 1u) + fract;
00164
00165   /* Read third nearest value of output from the cos table */
00166   c = *tablePtr++;
00167
00168   /*      cosVal += c*wc */
00169   cosVal += c * wc;
00170
00171   /* Calculation of wd */
00172   /* wd = (oneBy6)*fractCube - (oneBy6)*fract; */
00173   fractCube = fractCube - fract;
00174   wd = ((q15_t) (((q31_t) oneBy6 * fractCube) >> 15));
00175
00176   /* Read fourth nearest value of output from the cos table */
00177   d = *tablePtr++;
00178
00179   /* cosVal += d*wd; */
00180   cosVal += d * wd;
00181
00182   /* Return the output value in 1.15(q15) format */
00183   return ((q15_t) (cosVal >> 15u));
00184
00185 }
00186
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_cos_q31.c
00009 *
00010 * Description:  Fast cosine calculation for Q31 values.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00060 static const q31_t cosTableQ31[259] = {
00061   0x7ff62182, 0x7fffffff, 0x7ff62182, 0x7fd8878e, 0x7fa736b4, 0x7f62368f,
00062   0x7f0991c4, 0x7e9d55fc,
00063   0x7e1d93ea, 0x7d8a5f40, 0x7ce3ceb2, 0x7c29fbee, 0x7b5d039e, 0x7a7d055b,
00064   0x798a23b1, 0x78848414,
00065   0x776c4edb, 0x7641af3d, 0x7504d345, 0x73b5ebd1, 0x72552c85, 0x70e2cbc6,
00066   0x6f5f02b2, 0x6dca0d14,
00067   0x6c242960, 0x6a6d98a4, 0x68a69e81, 0x66cf8120, 0x64e88926, 0x62f201ac,
00068   0x60ec3830, 0x5ed77c8a,
00069   0x5cb420e0, 0x5a82799a, 0x5842dd54, 0x55f5a4d2, 0x539b2af0, 0x5133cc94,
00070   0x4ebfe8a5, 0x4c3fdff4,
00071   0x49b41533, 0x471cece7, 0x447acd50, 0x41ce1e65, 0x3f1749b8, 0x3c56ba70,
00072   0x398cdd32, 0x36ba2014,
00073   0x33def287, 0x30fbc54d, 0x2e110a62, 0x2b1f34eb, 0x2826b928, 0x25280c5e,
00074   0x2223a4c5, 0x1f19f97b,
00075   0x1c0b826a, 0x18f8b83c, 0x15e21445, 0x12c8106f, 0xfab272b, 0xc8bd35e,
00076   0x96a9049, 0x647d97c,
00077   0x3242abf, 0x0, 0xfcdbd541, 0xf9b82684, 0xf6956fb7, 0xf3742ca2, 0xf054d8d5,
00078   0xed37ef91,
00079   0xea1debbb, 0xe70747c4, 0xe3f47d96, 0xe0e60685, 0xdddc5b3b, 0xdad7f3a2,
00080   0xd7d946d8, 0xd4e0cb15,
00081   0xd1eef59e, 0xcf043ab3, 0xcc210d79, 0xc945dfec, 0xc67322ce, 0xc3a94590,
00082   0xc0e8b648, 0xbe31e19b,
00083   0xbb8532b0, 0xb8e31319, 0xb64beacd, 0xb3c0200c, 0xb140175b, 0xaecc336c,
00084   0xac64d510, 0xaa0a5b2e,
00085   0xa7bd22ac, 0xa57d8666, 0xa34bdf20, 0xa1288376, 0x9f13c7d0, 0x9d0dfe54,
00086   0x9b1776da, 0x99307ee0,
00087   0x9759617f, 0x9592675c, 0x93dbd6a0, 0x9235f2ec, 0x90a0fd4e, 0x8f1d343a,
00088   0x8daad37b, 0x8c4a142f,
00089   0x8afb2cbb, 0x89be50c3, 0x8893b125, 0x877b7bec, 0x8675dc4f, 0x8582faa5,
00090   0x84a2fc62, 0x83d60412,
00091   0x831c314e, 0x8275a0c0, 0x81e26c16, 0x8162aa04, 0x80f66e3c, 0x809dc971,
00092   0x8058c94c, 0x80277872,
00093   0x8009de7e, 0x80000000, 0x8009de7e, 0x80277872, 0x8058c94c, 0x809dc971,
00094   0x80f66e3c, 0x8162aa04,
00095   0x81e26c16, 0x8275a0c0, 0x831c314e, 0x83d60412, 0x84a2fc62, 0x8582faa5,
00096   0x8675dc4f, 0x877b7bec,
00097   0x8893b125, 0x89be50c3, 0x8afb2cbb, 0x8c4a142f, 0x8daad37b, 0x8f1d343a,
00098   0x90a0fd4e, 0x9235f2ec,
00099   0x93dbd6a0, 0x9592675c, 0x9759617f, 0x99307ee0, 0x9b1776da, 0x9d0dfe54,
00100   0x9f13c7d0, 0xa1288376,
00101   0xa34bdf20, 0xa57d8666, 0xa7bd22ac, 0xaa0a5b2e, 0xac64d510, 0xaecc336c,
00102   0xb140175b, 0xb3c0200c,
00103   0xb64beacd, 0xb8e31319, 0xbb8532b0, 0xbe31e19b, 0xc0e8b648, 0xc3a94590,
00104   0xc67322ce, 0xc945dfec,
00105   0xcc210d79, 0xcf043ab3, 0xd1eef59e, 0xd4e0cb15, 0xd7d946d8, 0xdad7f3a2,
00106   0xdddc5b3b, 0xe0e60685,
00107   0xe3f47d96, 0xe70747c4, 0xea1debbb, 0xed37ef91, 0xf054d8d5, 0xf3742ca2,
00108   0xf6956fb7, 0xf9b82684,
00109   0xfcdbd541, 0x0, 0x3242abf, 0x647d97c, 0x96a9049, 0xc8bd35e, 0xfab272b,
00110   0x12c8106f,
00111   0x15e21445, 0x18f8b83c, 0x1c0b826a, 0x1f19f97b, 0x2223a4c5, 0x25280c5e,
00112   0x2826b928, 0x2b1f34eb,
00113   0x2e110a62, 0x30fbc54d, 0x33def287, 0x36ba2014, 0x398cdd32, 0x3c56ba70,
00114   0x3f1749b8, 0x41ce1e65,
00115   0x447acd50, 0x471cece7, 0x49b41533, 0x4c3fdff4, 0x4ebfe8a5, 0x5133cc94,
00116   0x539b2af0, 0x55f5a4d2,
00117   0x5842dd54, 0x5a82799a, 0x5cb420e0, 0x5ed77c8a, 0x60ec3830, 0x62f201ac,
00118   0x64e88926, 0x66cf8120,
00119   0x68a69e81, 0x6a6d98a4, 0x6c242960, 0x6dca0d14, 0x6f5f02b2, 0x70e2cbc6,
00120   0x72552c85, 0x73b5ebd1,
00121   0x7504d345, 0x7641af3d, 0x776c4edb, 0x78848414, 0x798a23b1, 0x7a7d055b,
00122   0x7b5d039e, 0x7c29fbee,
00123   0x7ce3ceb2, 0x7d8a5f40, 0x7e1d93ea, 0x7e9d55fc, 0x7f0991c4, 0x7f62368f,
00124   0x7fa736b4, 0x7fd8878e,
00125   0x7ff62182, 0x7fffffff, 0x7ff62182
00126 };
00127
00136 q31_t arm_cos_q31(
00137   q31_t x)
00138 {
00139   q31_t cosVal, in, in2;                         /* Temporary variables for input, output */
00140   q31_t wa, wb, wc, wd;                          /* Cubic interpolation coefficients */
00141   q31_t a, b, c, d;                              /* Four nearest output values */
00142   q31_t *tablePtr;                               /* Pointer to table */
00143   q31_t fract, fractCube, fractSquare;           /* Temporary values for fractional values */
00144   q31_t oneBy6 = 0x15555555;                     /* Fixed point value of 1/6 */
00145   q31_t tableSpacing = TABLE_SPACING_Q31;        /* Table spacing */
00146   q31_t temp;                                    /* Temporary variable for intermediate process */
00147   uint32_t index;                                /* Index variable */
00148
00149   in = x;
00150
00151   /* Calculate the nearest index */
00152   index = in / tableSpacing;
00153
00154   /* Calculate the nearest value of input */
00155   in2 = ((q31_t) index) * tableSpacing;
00156
00157   /* Calculation of fractional value */
00158   fract = (in - in2) << 8;
00159
00160   /* fractSquare = fract * fract */
00161   fractSquare = ((q31_t) (((q63_t) fract * fract) >> 32));
00162   fractSquare = fractSquare << 1;
00163
00164   /* fractCube = fract * fract * fract */
00165   fractCube = ((q31_t) (((q63_t) fractSquare * fract) >> 32));
00166   fractCube = fractCube << 1;
00167
00168   /* Initialise table pointer */
00169   tablePtr = (q31_t *) & cosTableQ31[index];
00170
00171   /* Cubic interpolation process */
00172   /* Calculation of wa */
00173   /* wa = -(oneBy6)*fractCube + (fractSquare >> 1u) - (0x2AAAAAAA)*fract; */
00174   wa = ((q31_t) (((q63_t) oneBy6 * fractCube) >> 32));
00175   temp = 0x2AAAAAAA;
00176   wa = (q31_t) ((((q63_t) wa << 32) + ((q63_t) temp * fract)) >> 32);
00177   wa = -(wa << 1u);
00178   wa += (fractSquare >> 1u);
00179
00180   /* Read first nearest value of output from the cos table */
00181   a = *tablePtr++;
00182
00183   /* cosVal = a*wa */
00184   cosVal = ((q31_t) (((q63_t) a * wa) >> 32));
00185
00186   /* q31(1.31) Fixed point value of 1 */
00187   temp = 0x7FFFFFFF;
00188
00189   /* Calculation of wb */
00190   wb = ((fractCube >> 1u) - (fractSquare + (fract >> 1u))) + temp;
00191   /* Read second nearest value of output from the cos table */
00192   b = *tablePtr++;
00193
00194   /*      cosVal += b*wb */
00195   cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) b * (wb))) >> 32);
00196
00197   /* Calculation of wc */
00198   wc = -fractCube + fractSquare;
00199   wc = (wc >> 1u) + fract;
00200   /* Read third nearest values of output value from the cos table */
00201   c = *tablePtr++;
00202
00203   /*      cosVal += c*wc */
00204   cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) c * (wc))) >> 32);
00205
00206   /* Calculation of wd */
00207   /* wd = (oneBy6)*fractCube - (oneBy6)*fract; */
00208   fractCube = fractCube - fract;
00209   wd = ((q31_t) (((q63_t) oneBy6 * fractCube) >> 32));
00210   wd = (wd << 1u);
00211
00212   /* Read fourth nearest value of output from the cos table */
00213   d = *tablePtr++;
00214
00215   /* cosVal += d*wd; */
00216   cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) d * (wd))) >> 32);
00217
00218   /* convert cosVal in 2.30 format to 1.31 format */
00219   return (cosVal << 1u);
00220
00221 }
00222
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_dct4_f32.c
00009 *
00010 * Description:  Processing function of DCT4 & IDCT4 F32.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00126 void arm_dct4_f32(
00127   const arm_dct4_instance_f32 * S,
00128   float32_t * pState,
00129   float32_t * pInlineBuffer)
00130 {
00131   uint32_t i;                                    /* Loop counter */
00132   float32_t *weights = S->pTwiddle;              /* Pointer to the Weights table */
00133   float32_t *cosFact = S->pCosFactor;            /* Pointer to the cos factors table */
00134   float32_t *pS1, *pS2, *pbuff;                  /* Temporary pointers for input buffer and pState buffer */
00135   float32_t in;                                  /* Temporary variable */
00136
00137
00138   /* DCT4 computation involves DCT2 (which is calculated using RFFT)
00139    * along with some pre-processing and post-processing.
00140    * Computational procedure is explained as follows:
00141    * (a) Pre-processing involves multiplying input with cos factor,
00142    *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))
00143    *              where,
00144    *                 r(n) -- output of preprocessing
00145    *                 u(n) -- input to preprocessing(actual Source buffer)
00146    * (b) Calculation of DCT2 using FFT is divided into three steps:
00147    *                  Step1: Re-ordering of even and odd elements of input.
00148    *                  Step2: Calculating FFT of the re-ordered input.
00149    *                  Step3: Taking the real part of the product of FFT output and weights.
00150    * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:
00151    *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
00152    *                        where,
00153    *                           Y4 -- DCT4 output,   Y2 -- DCT2 output
00154    * (d) Multiplying the output with the normalizing factor sqrt(2/N).
00155    */
00156
00157         /*-------- Pre-processing ------------*/
00158   /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
00159   arm_scale_f32(pInlineBuffer, 2.0f, pInlineBuffer, S->N);
00160   arm_mult_f32(pInlineBuffer, cosFact, pInlineBuffer, S->N);
00161
00162   /* ----------------------------------------------------------------
00163    * Step1: Re-ordering of even and odd elements as,
00164    *             pState[i] =  pInlineBuffer[2*i] and
00165    *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2
00166    ---------------------------------------------------------------------*/
00167
00168   /* pS1 initialized to pState */
00169   pS1 = pState;
00170
00171   /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
00172   pS2 = pState + (S->N - 1u);
00173
00174   /* pbuff initialized to input buffer */
00175   pbuff = pInlineBuffer;
00176
00177 #ifndef ARM_MATH_CM0
00178
00179   /* Run the below code for Cortex-M4 and Cortex-M3 */
00180
00181   /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
00182   i = (uint32_t) S->Nby2 >> 2u;
00183
00184   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00185    ** a second loop below computes the remaining 1 to 3 samples. */
00186   do
00187   {
00188     /* Re-ordering of even and odd elements */
00189     /* pState[i] =  pInlineBuffer[2*i] */
00190     *pS1++ = *pbuff++;
00191     /* pState[N-i-1] = pInlineBuffer[2*i+1] */
00192     *pS2-- = *pbuff++;
00193
00194     *pS1++ = *pbuff++;
00195     *pS2-- = *pbuff++;
00196
00197     *pS1++ = *pbuff++;
00198     *pS2-- = *pbuff++;
00199
00200     *pS1++ = *pbuff++;
00201     *pS2-- = *pbuff++;
00202
00203     /* Decrement the loop counter */
00204     i--;
00205   } while(i > 0u);
00206
00207   /* pbuff initialized to input buffer */
00208   pbuff = pInlineBuffer;
00209
00210   /* pS1 initialized to pState */
00211   pS1 = pState;
00212
00213   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
00214   i = (uint32_t) S->N >> 2u;
00215
00216   /* Processing with loop unrolling 4 times as N is always multiple of 4.
00217    * Compute 4 outputs at a time */
00218   do
00219   {
00220     /* Writing the re-ordered output back to inplace input buffer */
00221     *pbuff++ = *pS1++;
00222     *pbuff++ = *pS1++;
00223     *pbuff++ = *pS1++;
00224     *pbuff++ = *pS1++;
00225
00226     /* Decrement the loop counter */
00227     i--;
00228   } while(i > 0u);
00229
00230
00231   /* ---------------------------------------------------------
00232    *     Step2: Calculate RFFT for N-point input
00233    * ---------------------------------------------------------- */
00234   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
00235   arm_rfft_f32(S->pRfft, pInlineBuffer, pState);
00236
00237         /*----------------------------------------------------------------------
00238          *  Step3: Multiply the FFT output with the weights.
00239          *----------------------------------------------------------------------*/
00240   arm_cmplx_mult_cmplx_f32(pState, weights, pState, S->N);
00241
00242   /* ----------- Post-processing ---------- */
00243   /* DCT-IV can be obtained from DCT-II by the equation,
00244    *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
00245    *       Hence, Y4(0) = Y2(0)/2  */
00246   /* Getting only real part from the output and Converting to DCT-IV */
00247
00248   /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
00249   i = ((uint32_t) S->N - 1u) >> 2u;
00250
00251   /* pbuff initialized to input buffer. */
00252   pbuff = pInlineBuffer;
00253
00254   /* pS1 initialized to pState */
00255   pS1 = pState;
00256
00257   /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
00258   in = *pS1++ * (float32_t) 0.5;
00259   /* input buffer acts as inplace, so output values are stored in the input itself. */
00260   *pbuff++ = in;
00261
00262   /* pState pointer is incremented twice as the real values are located alternatively in the array */
00263   pS1++;
00264
00265   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00266    ** a second loop below computes the remaining 1 to 3 samples. */
00267   do
00268   {
00269     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
00270     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
00271     in = *pS1++ - in;
00272     *pbuff++ = in;
00273     /* points to the next real value */
00274     pS1++;
00275
00276     in = *pS1++ - in;
00277     *pbuff++ = in;
00278     pS1++;
00279
00280     in = *pS1++ - in;
00281     *pbuff++ = in;
00282     pS1++;
00283
00284     in = *pS1++ - in;
00285     *pbuff++ = in;
00286     pS1++;
00287
00288     /* Decrement the loop counter */
00289     i--;
00290   } while(i > 0u);
00291
00292   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00293    ** No loop unrolling is used. */
00294   i = ((uint32_t) S->N - 1u) % 0x4u;
00295
00296   while(i > 0u)
00297   {
00298     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
00299     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
00300     in = *pS1++ - in;
00301     *pbuff++ = in;
00302     /* points to the next real value */
00303     pS1++;
00304
00305     /* Decrement the loop counter */
00306     i--;
00307   }
00308
00309
00310         /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
00311
00312   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
00313   i = (uint32_t) S->N >> 2u;
00314
00315   /* pbuff initialized to the pInlineBuffer(now contains the output values) */
00316   pbuff = pInlineBuffer;
00317
00318   /* Processing with loop unrolling 4 times as N is always multiple of 4.  Compute 4 outputs at a time */
00319   do
00320   {
00321     /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
00322     in = *pbuff;
00323     *pbuff++ = in * S->normalize;
00324
00325     in = *pbuff;
00326     *pbuff++ = in * S->normalize;
00327
00328     in = *pbuff;
00329     *pbuff++ = in * S->normalize;
00330
00331     in = *pbuff;
00332     *pbuff++ = in * S->normalize;
00333
00334     /* Decrement the loop counter */
00335     i--;
00336   } while(i > 0u);
00337
00338
00339 #else
00340
00341   /* Run the below code for Cortex-M0 */
00342
00343   /* Initializing the loop counter to N/2 */
00344   i = (uint32_t) S->Nby2;
00345
00346   do
00347   {
00348     /* Re-ordering of even and odd elements */
00349     /* pState[i] =  pInlineBuffer[2*i] */
00350     *pS1++ = *pbuff++;
00351     /* pState[N-i-1] = pInlineBuffer[2*i+1] */
00352     *pS2-- = *pbuff++;
00353
00354     /* Decrement the loop counter */
00355     i--;
00356   } while(i > 0u);
00357
00358   /* pbuff initialized to input buffer */
00359   pbuff = pInlineBuffer;
00360
00361   /* pS1 initialized to pState */
00362   pS1 = pState;
00363
00364   /* Initializing the loop counter */
00365   i = (uint32_t) S->N;
00366
00367   do
00368   {
00369     /* Writing the re-ordered output back to inplace input buffer */
00370     *pbuff++ = *pS1++;
00371
00372     /* Decrement the loop counter */
00373     i--;
00374   } while(i > 0u);
00375
00376
00377   /* ---------------------------------------------------------
00378    *     Step2: Calculate RFFT for N-point input
00379    * ---------------------------------------------------------- */
00380   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
00381   arm_rfft_f32(S->pRfft, pInlineBuffer, pState);
00382
00383         /*----------------------------------------------------------------------
00384          *  Step3: Multiply the FFT output with the weights.
00385          *----------------------------------------------------------------------*/
00386   arm_cmplx_mult_cmplx_f32(pState, weights, pState, S->N);
00387
00388   /* ----------- Post-processing ---------- */
00389   /* DCT-IV can be obtained from DCT-II by the equation,
00390    *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
00391    *       Hence, Y4(0) = Y2(0)/2  */
00392   /* Getting only real part from the output and Converting to DCT-IV */
00393
00394   /* pbuff initialized to input buffer. */
00395   pbuff = pInlineBuffer;
00396
00397   /* pS1 initialized to pState */
00398   pS1 = pState;
00399
00400   /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
00401   in = *pS1++ * (float32_t) 0.5;
00402   /* input buffer acts as inplace, so output values are stored in the input itself. */
00403   *pbuff++ = in;
00404
00405   /* pState pointer is incremented twice as the real values are located alternatively in the array */
00406   pS1++;
00407
00408   /* Initializing the loop counter */
00409   i = ((uint32_t) S->N - 1u);
00410
00411   do
00412   {
00413     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
00414     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
00415     in = *pS1++ - in;
00416     *pbuff++ = in;
00417     /* points to the next real value */
00418     pS1++;
00419
00420
00421     /* Decrement the loop counter */
00422     i--;
00423   } while(i > 0u);
00424
00425
00426         /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
00427
00428   /* Initializing the loop counter */
00429   i = (uint32_t) S->N;
00430
00431   /* pbuff initialized to the pInlineBuffer(now contains the output values) */
00432   pbuff = pInlineBuffer;
00433
00434   do
00435   {
00436     /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
00437     in = *pbuff;
00438     *pbuff++ = in * S->normalize;
00439
00440     /* Decrement the loop counter */
00441     i--;
00442   } while(i > 0u);
00443
00444 #endif /* #ifndef ARM_MATH_CM0 */
00445
00446 }
00447
Generated on Mon Nov 28 2011 11:14:40 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c
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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_dct4_init_q15.c
00009 *
00010 * Description:  Initialization function of DCT-4 & IDCT4 Q15
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030
00031 #include "arm_math.h"
00032
00042 /*
00043 * @brief  Weights Table
00044 */
00045
00066 static const q15_t WeightsQ15_128[256] = {
00067   0x7fff, 0x0, 0x7ffd, 0xfe6e, 0x7ff6, 0xfcdc, 0x7fe9, 0xfb4a,
00068   0x7fd8, 0xf9b9, 0x7fc2, 0xf827, 0x7fa7, 0xf696, 0x7f87, 0xf505,
00069   0x7f62, 0xf375, 0x7f38, 0xf1e5, 0x7f09, 0xf055, 0x7ed5, 0xeec7,
00070   0x7e9d, 0xed38, 0x7e5f, 0xebab, 0x7e1d, 0xea1e, 0x7dd6, 0xe893,
00071   0x7d8a, 0xe708, 0x7d39, 0xe57e, 0x7ce3, 0xe3f5, 0x7c89, 0xe26d,
00072   0x7c29, 0xe0e7, 0x7bc5, 0xdf61, 0x7b5d, 0xdddd, 0x7aef, 0xdc5a,
00073   0x7a7d, 0xdad8, 0x7a05, 0xd958, 0x798a, 0xd7da, 0x7909, 0xd65d,
00074   0x7884, 0xd4e1, 0x77fa, 0xd368, 0x776c, 0xd1ef, 0x76d9, 0xd079,
00075   0x7641, 0xcf05, 0x75a5, 0xcd92, 0x7504, 0xcc22, 0x745f, 0xcab3,
00076   0x73b5, 0xc946, 0x7307, 0xc7dc, 0x7255, 0xc674, 0x719e, 0xc50e,
00077   0x70e2, 0xc3aa, 0x7023, 0xc248, 0x6f5f, 0xc0e9, 0x6e96, 0xbf8d,
00078   0x6dca, 0xbe32, 0x6cf9, 0xbcdb, 0x6c24, 0xbb86, 0x6b4a, 0xba33,
00079   0x6a6d, 0xb8e4, 0x698c, 0xb797, 0x68a6, 0xb64c, 0x67bd, 0xb505,
00080   0x66cf, 0xb3c1, 0x65dd, 0xb27f, 0x64e8, 0xb141, 0x63ef, 0xb005,
00081   0x62f2, 0xaecd, 0x61f1, 0xad97, 0x60ec, 0xac65, 0x5fe3, 0xab36,
00082   0x5ed7, 0xaa0b, 0x5dc7, 0xa8e3, 0x5cb4, 0xa7be, 0x5b9d, 0xa69c,
00083   0x5a82, 0xa57e, 0x5964, 0xa463, 0x5842, 0xa34c, 0x571d, 0xa239,
00084   0x55f5, 0xa129, 0x54ca, 0xa01d, 0x539b, 0x9f14, 0x5269, 0x9e0f,
00085   0x5133, 0x9d0e, 0x4ffb, 0x9c11, 0x4ebf, 0x9b18, 0x4d81, 0x9a23,
00086   0x4c3f, 0x9931, 0x4afb, 0x9843, 0x49b4, 0x975a, 0x4869, 0x9674,
00087   0x471c, 0x9593, 0x45cd, 0x94b6, 0x447a, 0x93dc, 0x4325, 0x9307,
00088   0x41ce, 0x9236, 0x4073, 0x916a, 0x3f17, 0x90a1, 0x3db8, 0x8fdd,
00089   0x3c56, 0x8f1e, 0x3af2, 0x8e62, 0x398c, 0x8dab, 0x3824, 0x8cf9,
00090   0x36ba, 0x8c4b, 0x354d, 0x8ba1, 0x33de, 0x8afc, 0x326e, 0x8a5b,
00091   0x30fb, 0x89bf, 0x2f87, 0x8927, 0x2e11, 0x8894, 0x2c98, 0x8806,
00092   0x2b1f, 0x877c, 0x29a3, 0x86f7, 0x2826, 0x8676, 0x26a8, 0x85fb,
00093   0x2528, 0x8583, 0x23a6, 0x8511, 0x2223, 0x84a3, 0x209f, 0x843b,
00094   0x1f19, 0x83d7, 0x1d93, 0x8377, 0x1c0b, 0x831d, 0x1a82, 0x82c7,
00095   0x18f8, 0x8276, 0x176d, 0x822a, 0x15e2, 0x81e3, 0x1455, 0x81a1,
00096   0x12c8, 0x8163, 0x1139, 0x812b, 0xfab, 0x80f7, 0xe1b, 0x80c8,
00097   0xc8b, 0x809e, 0xafb, 0x8079, 0x96a, 0x8059, 0x7d9, 0x803e,
00098   0x647, 0x8028, 0x4b6, 0x8017, 0x324, 0x800a, 0x192, 0x8003,
00099 };
00100
00101 static const q15_t WeightsQ15_512[1024] = {
00102   0x7fff, 0x0, 0x7fff, 0xff9c, 0x7fff, 0xff37, 0x7ffe, 0xfed3,
00103   0x7ffd, 0xfe6e, 0x7ffc, 0xfe0a, 0x7ffa, 0xfda5, 0x7ff8, 0xfd41,
00104   0x7ff6, 0xfcdc, 0x7ff3, 0xfc78, 0x7ff0, 0xfc13, 0x7fed, 0xfbaf,
00105   0x7fe9, 0xfb4a, 0x7fe5, 0xfae6, 0x7fe1, 0xfa81, 0x7fdd, 0xfa1d,
00106   0x7fd8, 0xf9b9, 0x7fd3, 0xf954, 0x7fce, 0xf8f0, 0x7fc8, 0xf88b,
00107   0x7fc2, 0xf827, 0x7fbc, 0xf7c3, 0x7fb5, 0xf75e, 0x7fae, 0xf6fa,
00108   0x7fa7, 0xf696, 0x7f9f, 0xf632, 0x7f97, 0xf5cd, 0x7f8f, 0xf569,
00109   0x7f87, 0xf505, 0x7f7e, 0xf4a1, 0x7f75, 0xf43d, 0x7f6b, 0xf3d9,
00110   0x7f62, 0xf375, 0x7f58, 0xf311, 0x7f4d, 0xf2ad, 0x7f43, 0xf249,
00111   0x7f38, 0xf1e5, 0x7f2d, 0xf181, 0x7f21, 0xf11d, 0x7f15, 0xf0b9,
00112   0x7f09, 0xf055, 0x7efd, 0xeff2, 0x7ef0, 0xef8e, 0x7ee3, 0xef2a,
00113   0x7ed5, 0xeec7, 0x7ec8, 0xee63, 0x7eba, 0xedff, 0x7eab, 0xed9c,
00114   0x7e9d, 0xed38, 0x7e8e, 0xecd5, 0x7e7f, 0xec72, 0x7e6f, 0xec0e,
00115   0x7e5f, 0xebab, 0x7e4f, 0xeb48, 0x7e3f, 0xeae5, 0x7e2e, 0xea81,
00116   0x7e1d, 0xea1e, 0x7e0c, 0xe9bb, 0x7dfa, 0xe958, 0x7de8, 0xe8f6,
00117   0x7dd6, 0xe893, 0x7dc3, 0xe830, 0x7db0, 0xe7cd, 0x7d9d, 0xe76a,
00118   0x7d8a, 0xe708, 0x7d76, 0xe6a5, 0x7d62, 0xe643, 0x7d4e, 0xe5e0,
00119   0x7d39, 0xe57e, 0x7d24, 0xe51c, 0x7d0f, 0xe4b9, 0x7cf9, 0xe457,
00120   0x7ce3, 0xe3f5, 0x7ccd, 0xe393, 0x7cb7, 0xe331, 0x7ca0, 0xe2cf,
00121   0x7c89, 0xe26d, 0x7c71, 0xe20b, 0x7c5a, 0xe1aa, 0x7c42, 0xe148,
00122   0x7c29, 0xe0e7, 0x7c11, 0xe085, 0x7bf8, 0xe024, 0x7bdf, 0xdfc2,
00123   0x7bc5, 0xdf61, 0x7bac, 0xdf00, 0x7b92, 0xde9f, 0x7b77, 0xde3e,
00124   0x7b5d, 0xdddd, 0x7b42, 0xdd7c, 0x7b26, 0xdd1b, 0x7b0b, 0xdcbb,
00125   0x7aef, 0xdc5a, 0x7ad3, 0xdbf9, 0x7ab6, 0xdb99, 0x7a9a, 0xdb39,
00126   0x7a7d, 0xdad8, 0x7a5f, 0xda78, 0x7a42, 0xda18, 0x7a24, 0xd9b8,
00127   0x7a05, 0xd958, 0x79e7, 0xd8f9, 0x79c8, 0xd899, 0x79a9, 0xd839,
00128   0x798a, 0xd7da, 0x796a, 0xd77a, 0x794a, 0xd71b, 0x792a, 0xd6bc,
00129   0x7909, 0xd65d, 0x78e8, 0xd5fe, 0x78c7, 0xd59f, 0x78a6, 0xd540,
00130   0x7884, 0xd4e1, 0x7862, 0xd483, 0x7840, 0xd424, 0x781d, 0xd3c6,
00131   0x77fa, 0xd368, 0x77d7, 0xd309, 0x77b4, 0xd2ab, 0x7790, 0xd24d,
00132   0x776c, 0xd1ef, 0x7747, 0xd192, 0x7723, 0xd134, 0x76fe, 0xd0d7,
00133   0x76d9, 0xd079, 0x76b3, 0xd01c, 0x768e, 0xcfbf, 0x7668, 0xcf62,
00134   0x7641, 0xcf05, 0x761b, 0xcea8, 0x75f4, 0xce4b, 0x75cc, 0xcdef,
00135   0x75a5, 0xcd92, 0x757d, 0xcd36, 0x7555, 0xccda, 0x752d, 0xcc7e,
00136   0x7504, 0xcc22, 0x74db, 0xcbc6, 0x74b2, 0xcb6a, 0x7489, 0xcb0e,
00137   0x745f, 0xcab3, 0x7435, 0xca58, 0x740b, 0xc9fc, 0x73e0, 0xc9a1,
00138   0x73b5, 0xc946, 0x738a, 0xc8ec, 0x735f, 0xc891, 0x7333, 0xc836,
00139   0x7307, 0xc7dc, 0x72db, 0xc782, 0x72af, 0xc728, 0x7282, 0xc6ce,
00140   0x7255, 0xc674, 0x7227, 0xc61a, 0x71fa, 0xc5c0, 0x71cc, 0xc567,
00141   0x719e, 0xc50e, 0x716f, 0xc4b4, 0x7141, 0xc45b, 0x7112, 0xc403,
00142   0x70e2, 0xc3aa, 0x70b3, 0xc351, 0x7083, 0xc2f9, 0x7053, 0xc2a0,
00143   0x7023, 0xc248, 0x6ff2, 0xc1f0, 0x6fc1, 0xc198, 0x6f90, 0xc141,
00144   0x6f5f, 0xc0e9, 0x6f2d, 0xc092, 0x6efb, 0xc03b, 0x6ec9, 0xbfe3,
00145   0x6e96, 0xbf8d, 0x6e63, 0xbf36, 0x6e30, 0xbedf, 0x6dfd, 0xbe89,
00146   0x6dca, 0xbe32, 0x6d96, 0xbddc, 0x6d62, 0xbd86, 0x6d2d, 0xbd30,
00147   0x6cf9, 0xbcdb, 0x6cc4, 0xbc85, 0x6c8f, 0xbc30, 0x6c59, 0xbbdb,
00148   0x6c24, 0xbb86, 0x6bee, 0xbb31, 0x6bb8, 0xbadc, 0x6b81, 0xba88,
00149   0x6b4a, 0xba33, 0x6b13, 0xb9df, 0x6adc, 0xb98b, 0x6aa5, 0xb937,
00150   0x6a6d, 0xb8e4, 0x6a35, 0xb890, 0x69fd, 0xb83d, 0x69c4, 0xb7ea,
00151   0x698c, 0xb797, 0x6953, 0xb744, 0x6919, 0xb6f1, 0x68e0, 0xb69f,
00152   0x68a6, 0xb64c, 0x686c, 0xb5fa, 0x6832, 0xb5a8, 0x67f7, 0xb557,
00153   0x67bd, 0xb505, 0x6782, 0xb4b4, 0x6746, 0xb462, 0x670b, 0xb411,
00154   0x66cf, 0xb3c1, 0x6693, 0xb370, 0x6657, 0xb31f, 0x661a, 0xb2cf,
00155   0x65dd, 0xb27f, 0x65a0, 0xb22f, 0x6563, 0xb1df, 0x6526, 0xb190,
00156   0x64e8, 0xb141, 0x64aa, 0xb0f1, 0x646c, 0xb0a2, 0x642d, 0xb054,
00157   0x63ef, 0xb005, 0x63b0, 0xafb7, 0x6371, 0xaf69, 0x6331, 0xaf1b,
00158   0x62f2, 0xaecd, 0x62b2, 0xae7f, 0x6271, 0xae32, 0x6231, 0xade4,
00159   0x61f1, 0xad97, 0x61b0, 0xad4b, 0x616f, 0xacfe, 0x612d, 0xacb2,
00160   0x60ec, 0xac65, 0x60aa, 0xac19, 0x6068, 0xabcd, 0x6026, 0xab82,
00161   0x5fe3, 0xab36, 0x5fa0, 0xaaeb, 0x5f5e, 0xaaa0, 0x5f1a, 0xaa55,
00162   0x5ed7, 0xaa0b, 0x5e93, 0xa9c0, 0x5e50, 0xa976, 0x5e0b, 0xa92c,
00163   0x5dc7, 0xa8e3, 0x5d83, 0xa899, 0x5d3e, 0xa850, 0x5cf9, 0xa807,
00164   0x5cb4, 0xa7be, 0x5c6e, 0xa775, 0x5c29, 0xa72c, 0x5be3, 0xa6e4,
00165   0x5b9d, 0xa69c, 0x5b56, 0xa654, 0x5b10, 0xa60d, 0x5ac9, 0xa5c5,
00166   0x5a82, 0xa57e, 0x5a3b, 0xa537, 0x59f3, 0xa4f0, 0x59ac, 0xa4aa,
00167   0x5964, 0xa463, 0x591c, 0xa41d, 0x58d4, 0xa3d7, 0x588b, 0xa392,
00168   0x5842, 0xa34c, 0x57f9, 0xa307, 0x57b0, 0xa2c2, 0x5767, 0xa27d,
00169   0x571d, 0xa239, 0x56d4, 0xa1f5, 0x568a, 0xa1b0, 0x5640, 0xa16d,
00170   0x55f5, 0xa129, 0x55ab, 0xa0e6, 0x5560, 0xa0a2, 0x5515, 0xa060,
00171   0x54ca, 0xa01d, 0x547e, 0x9fda, 0x5433, 0x9f98, 0x53e7, 0x9f56,
00172   0x539b, 0x9f14, 0x534e, 0x9ed3, 0x5302, 0x9e91, 0x52b5, 0x9e50,
00173   0x5269, 0x9e0f, 0x521c, 0x9dcf, 0x51ce, 0x9d8f, 0x5181, 0x9d4e,
00174   0x5133, 0x9d0e, 0x50e5, 0x9ccf, 0x5097, 0x9c8f, 0x5049, 0x9c50,
00175   0x4ffb, 0x9c11, 0x4fac, 0x9bd3, 0x4f5e, 0x9b94, 0x4f0f, 0x9b56,
00176   0x4ebf, 0x9b18, 0x4e70, 0x9ada, 0x4e21, 0x9a9d, 0x4dd1, 0x9a60,
00177   0x4d81, 0x9a23, 0x4d31, 0x99e6, 0x4ce1, 0x99a9, 0x4c90, 0x996d,
00178   0x4c3f, 0x9931, 0x4bef, 0x98f5, 0x4b9e, 0x98ba, 0x4b4c, 0x987e,
00179   0x4afb, 0x9843, 0x4aa9, 0x9809, 0x4a58, 0x97ce, 0x4a06, 0x9794,
00180   0x49b4, 0x975a, 0x4961, 0x9720, 0x490f, 0x96e7, 0x48bc, 0x96ad,
00181   0x4869, 0x9674, 0x4816, 0x963c, 0x47c3, 0x9603, 0x4770, 0x95cb,
00182   0x471c, 0x9593, 0x46c9, 0x955b, 0x4675, 0x9524, 0x4621, 0x94ed,
00183   0x45cd, 0x94b6, 0x4578, 0x947f, 0x4524, 0x9448, 0x44cf, 0x9412,
00184   0x447a, 0x93dc, 0x4425, 0x93a7, 0x43d0, 0x9371, 0x437b, 0x933c,
00185   0x4325, 0x9307, 0x42d0, 0x92d3, 0x427a, 0x929e, 0x4224, 0x926a,
00186   0x41ce, 0x9236, 0x4177, 0x9203, 0x4121, 0x91d0, 0x40ca, 0x919d,
00187   0x4073, 0x916a, 0x401d, 0x9137, 0x3fc5, 0x9105, 0x3f6e, 0x90d3,
00188   0x3f17, 0x90a1, 0x3ebf, 0x9070, 0x3e68, 0x903f, 0x3e10, 0x900e,
00189   0x3db8, 0x8fdd, 0x3d60, 0x8fad, 0x3d07, 0x8f7d, 0x3caf, 0x8f4d,
00190   0x3c56, 0x8f1e, 0x3bfd, 0x8eee, 0x3ba5, 0x8ebf, 0x3b4c, 0x8e91,
00191   0x3af2, 0x8e62, 0x3a99, 0x8e34, 0x3a40, 0x8e06, 0x39e6, 0x8dd9,
00192   0x398c, 0x8dab, 0x3932, 0x8d7e, 0x38d8, 0x8d51, 0x387e, 0x8d25,
00193   0x3824, 0x8cf9, 0x37ca, 0x8ccd, 0x376f, 0x8ca1, 0x3714, 0x8c76,
00194   0x36ba, 0x8c4b, 0x365f, 0x8c20, 0x3604, 0x8bf5, 0x35a8, 0x8bcb,
00195   0x354d, 0x8ba1, 0x34f2, 0x8b77, 0x3496, 0x8b4e, 0x343a, 0x8b25,
00196   0x33de, 0x8afc, 0x3382, 0x8ad3, 0x3326, 0x8aab, 0x32ca, 0x8a83,
00197   0x326e, 0x8a5b, 0x3211, 0x8a34, 0x31b5, 0x8a0c, 0x3158, 0x89e5,
00198   0x30fb, 0x89bf, 0x309e, 0x8998, 0x3041, 0x8972, 0x2fe4, 0x894d,
00199   0x2f87, 0x8927, 0x2f29, 0x8902, 0x2ecc, 0x88dd, 0x2e6e, 0x88b9,
00200   0x2e11, 0x8894, 0x2db3, 0x8870, 0x2d55, 0x884c, 0x2cf7, 0x8829,
00201   0x2c98, 0x8806, 0x2c3a, 0x87e3, 0x2bdc, 0x87c0, 0x2b7d, 0x879e,
00202   0x2b1f, 0x877c, 0x2ac0, 0x875a, 0x2a61, 0x8739, 0x2a02, 0x8718,
00203   0x29a3, 0x86f7, 0x2944, 0x86d6, 0x28e5, 0x86b6, 0x2886, 0x8696,
00204   0x2826, 0x8676, 0x27c7, 0x8657, 0x2767, 0x8638, 0x2707, 0x8619,
00205   0x26a8, 0x85fb, 0x2648, 0x85dc, 0x25e8, 0x85be, 0x2588, 0x85a1,
00206   0x2528, 0x8583, 0x24c7, 0x8566, 0x2467, 0x854a, 0x2407, 0x852d,
00207   0x23a6, 0x8511, 0x2345, 0x84f5, 0x22e5, 0x84da, 0x2284, 0x84be,
00208   0x2223, 0x84a3, 0x21c2, 0x8489, 0x2161, 0x846e, 0x2100, 0x8454,
00209   0x209f, 0x843b, 0x203e, 0x8421, 0x1fdc, 0x8408, 0x1f7b, 0x83ef,
00210   0x1f19, 0x83d7, 0x1eb8, 0x83be, 0x1e56, 0x83a6, 0x1df5, 0x838f,
00211   0x1d93, 0x8377, 0x1d31, 0x8360, 0x1ccf, 0x8349, 0x1c6d, 0x8333,
00212   0x1c0b, 0x831d, 0x1ba9, 0x8307, 0x1b47, 0x82f1, 0x1ae4, 0x82dc,
00213   0x1a82, 0x82c7, 0x1a20, 0x82b2, 0x19bd, 0x829e, 0x195b, 0x828a,
00214   0x18f8, 0x8276, 0x1896, 0x8263, 0x1833, 0x8250, 0x17d0, 0x823d,
00215   0x176d, 0x822a, 0x170a, 0x8218, 0x16a8, 0x8206, 0x1645, 0x81f4,
00216   0x15e2, 0x81e3, 0x157f, 0x81d2, 0x151b, 0x81c1, 0x14b8, 0x81b1,
00217   0x1455, 0x81a1, 0x13f2, 0x8191, 0x138e, 0x8181, 0x132b, 0x8172,
00218   0x12c8, 0x8163, 0x1264, 0x8155, 0x1201, 0x8146, 0x119d, 0x8138,
00219   0x1139, 0x812b, 0x10d6, 0x811d, 0x1072, 0x8110, 0x100e, 0x8103,
00220   0xfab, 0x80f7, 0xf47, 0x80eb, 0xee3, 0x80df, 0xe7f, 0x80d3,
00221   0xe1b, 0x80c8, 0xdb7, 0x80bd, 0xd53, 0x80b3, 0xcef, 0x80a8,
00222   0xc8b, 0x809e, 0xc27, 0x8095, 0xbc3, 0x808b, 0xb5f, 0x8082,
00223   0xafb, 0x8079, 0xa97, 0x8071, 0xa33, 0x8069, 0x9ce, 0x8061,
00224   0x96a, 0x8059, 0x906, 0x8052, 0x8a2, 0x804b, 0x83d, 0x8044,
00225   0x7d9, 0x803e, 0x775, 0x8038, 0x710, 0x8032, 0x6ac, 0x802d,
00226   0x647, 0x8028, 0x5e3, 0x8023, 0x57f, 0x801f, 0x51a, 0x801b,
00227   0x4b6, 0x8017, 0x451, 0x8013, 0x3ed, 0x8010, 0x388, 0x800d,
00228   0x324, 0x800a, 0x2bf, 0x8008, 0x25b, 0x8006, 0x1f6, 0x8004,
00229   0x192, 0x8003, 0x12d, 0x8002, 0xc9, 0x8001, 0x64, 0x8001,
00230 };
00231
00232 static const q15_t WeightsQ15_2048[4096] = {
00233   0x7fff, 0x0, 0x7fff, 0xffe7, 0x7fff, 0xffce, 0x7fff, 0xffb5,
00234   0x7fff, 0xff9c, 0x7fff, 0xff83, 0x7fff, 0xff6a, 0x7fff, 0xff51,
00235   0x7fff, 0xff37, 0x7fff, 0xff1e, 0x7fff, 0xff05, 0x7ffe, 0xfeec,
00236   0x7ffe, 0xfed3, 0x7ffe, 0xfeba, 0x7ffe, 0xfea1, 0x7ffd, 0xfe88,
00237   0x7ffd, 0xfe6e, 0x7ffd, 0xfe55, 0x7ffc, 0xfe3c, 0x7ffc, 0xfe23,
00238   0x7ffc, 0xfe0a, 0x7ffb, 0xfdf1, 0x7ffb, 0xfdd8, 0x7ffa, 0xfdbe,
00239   0x7ffa, 0xfda5, 0x7ff9, 0xfd8c, 0x7ff9, 0xfd73, 0x7ff8, 0xfd5a,
00240   0x7ff8, 0xfd41, 0x7ff7, 0xfd28, 0x7ff7, 0xfd0f, 0x7ff6, 0xfcf5,
00241   0x7ff6, 0xfcdc, 0x7ff5, 0xfcc3, 0x7ff4, 0xfcaa, 0x7ff4, 0xfc91,
00242   0x7ff3, 0xfc78, 0x7ff2, 0xfc5f, 0x7ff2, 0xfc46, 0x7ff1, 0xfc2c,
00243   0x7ff0, 0xfc13, 0x7fef, 0xfbfa, 0x7fee, 0xfbe1, 0x7fee, 0xfbc8,
00244   0x7fed, 0xfbaf, 0x7fec, 0xfb96, 0x7feb, 0xfb7d, 0x7fea, 0xfb64,
00245   0x7fe9, 0xfb4a, 0x7fe8, 0xfb31, 0x7fe7, 0xfb18, 0x7fe6, 0xfaff,
00246   0x7fe5, 0xfae6, 0x7fe4, 0xfacd, 0x7fe3, 0xfab4, 0x7fe2, 0xfa9b,
00247   0x7fe1, 0xfa81, 0x7fe0, 0xfa68, 0x7fdf, 0xfa4f, 0x7fde, 0xfa36,
00248   0x7fdd, 0xfa1d, 0x7fdc, 0xfa04, 0x7fda, 0xf9eb, 0x7fd9, 0xf9d2,
00249   0x7fd8, 0xf9b9, 0x7fd7, 0xf9a0, 0x7fd6, 0xf986, 0x7fd4, 0xf96d,
00250   0x7fd3, 0xf954, 0x7fd2, 0xf93b, 0x7fd0, 0xf922, 0x7fcf, 0xf909,
00251   0x7fce, 0xf8f0, 0x7fcc, 0xf8d7, 0x7fcb, 0xf8be, 0x7fc9, 0xf8a5,
00252   0x7fc8, 0xf88b, 0x7fc6, 0xf872, 0x7fc5, 0xf859, 0x7fc3, 0xf840,
00253   0x7fc2, 0xf827, 0x7fc0, 0xf80e, 0x7fbf, 0xf7f5, 0x7fbd, 0xf7dc,
00254   0x7fbc, 0xf7c3, 0x7fba, 0xf7aa, 0x7fb8, 0xf791, 0x7fb7, 0xf778,
00255   0x7fb5, 0xf75e, 0x7fb3, 0xf745, 0x7fb1, 0xf72c, 0x7fb0, 0xf713,
00256   0x7fae, 0xf6fa, 0x7fac, 0xf6e1, 0x7faa, 0xf6c8, 0x7fa9, 0xf6af,
00257   0x7fa7, 0xf696, 0x7fa5, 0xf67d, 0x7fa3, 0xf664, 0x7fa1, 0xf64b,
00258   0x7f9f, 0xf632, 0x7f9d, 0xf619, 0x7f9b, 0xf600, 0x7f99, 0xf5e7,
00259   0x7f97, 0xf5cd, 0x7f95, 0xf5b4, 0x7f93, 0xf59b, 0x7f91, 0xf582,
00260   0x7f8f, 0xf569, 0x7f8d, 0xf550, 0x7f8b, 0xf537, 0x7f89, 0xf51e,
00261   0x7f87, 0xf505, 0x7f85, 0xf4ec, 0x7f82, 0xf4d3, 0x7f80, 0xf4ba,
00262   0x7f7e, 0xf4a1, 0x7f7c, 0xf488, 0x7f79, 0xf46f, 0x7f77, 0xf456,
00263   0x7f75, 0xf43d, 0x7f72, 0xf424, 0x7f70, 0xf40b, 0x7f6e, 0xf3f2,
00264   0x7f6b, 0xf3d9, 0x7f69, 0xf3c0, 0x7f67, 0xf3a7, 0x7f64, 0xf38e,
00265   0x7f62, 0xf375, 0x7f5f, 0xf35c, 0x7f5d, 0xf343, 0x7f5a, 0xf32a,
00266   0x7f58, 0xf311, 0x7f55, 0xf2f8, 0x7f53, 0xf2df, 0x7f50, 0xf2c6,
00267   0x7f4d, 0xf2ad, 0x7f4b, 0xf294, 0x7f48, 0xf27b, 0x7f45, 0xf262,
00268   0x7f43, 0xf249, 0x7f40, 0xf230, 0x7f3d, 0xf217, 0x7f3b, 0xf1fe,
00269   0x7f38, 0xf1e5, 0x7f35, 0xf1cc, 0x7f32, 0xf1b3, 0x7f2f, 0xf19a,
00270   0x7f2d, 0xf181, 0x7f2a, 0xf168, 0x7f27, 0xf14f, 0x7f24, 0xf136,
00271   0x7f21, 0xf11d, 0x7f1e, 0xf104, 0x7f1b, 0xf0eb, 0x7f18, 0xf0d2,
00272   0x7f15, 0xf0b9, 0x7f12, 0xf0a0, 0x7f0f, 0xf087, 0x7f0c, 0xf06e,
00273   0x7f09, 0xf055, 0x7f06, 0xf03c, 0x7f03, 0xf023, 0x7f00, 0xf00b,
00274   0x7efd, 0xeff2, 0x7ef9, 0xefd9, 0x7ef6, 0xefc0, 0x7ef3, 0xefa7,
00275   0x7ef0, 0xef8e, 0x7eed, 0xef75, 0x7ee9, 0xef5c, 0x7ee6, 0xef43,
00276   0x7ee3, 0xef2a, 0x7edf, 0xef11, 0x7edc, 0xeef8, 0x7ed9, 0xeedf,
00277   0x7ed5, 0xeec7, 0x7ed2, 0xeeae, 0x7ecf, 0xee95, 0x7ecb, 0xee7c,
00278   0x7ec8, 0xee63, 0x7ec4, 0xee4a, 0x7ec1, 0xee31, 0x7ebd, 0xee18,
00279   0x7eba, 0xedff, 0x7eb6, 0xede7, 0x7eb3, 0xedce, 0x7eaf, 0xedb5,
00280   0x7eab, 0xed9c, 0x7ea8, 0xed83, 0x7ea4, 0xed6a, 0x7ea1, 0xed51,
00281   0x7e9d, 0xed38, 0x7e99, 0xed20, 0x7e95, 0xed07, 0x7e92, 0xecee,
00282   0x7e8e, 0xecd5, 0x7e8a, 0xecbc, 0x7e86, 0xeca3, 0x7e83, 0xec8a,
00283   0x7e7f, 0xec72, 0x7e7b, 0xec59, 0x7e77, 0xec40, 0x7e73, 0xec27,
00284   0x7e6f, 0xec0e, 0x7e6b, 0xebf5, 0x7e67, 0xebdd, 0x7e63, 0xebc4,
00285   0x7e5f, 0xebab, 0x7e5b, 0xeb92, 0x7e57, 0xeb79, 0x7e53, 0xeb61,
00286   0x7e4f, 0xeb48, 0x7e4b, 0xeb2f, 0x7e47, 0xeb16, 0x7e43, 0xeafd,
00287   0x7e3f, 0xeae5, 0x7e3b, 0xeacc, 0x7e37, 0xeab3, 0x7e32, 0xea9a,
00288   0x7e2e, 0xea81, 0x7e2a, 0xea69, 0x7e26, 0xea50, 0x7e21, 0xea37,
00289   0x7e1d, 0xea1e, 0x7e19, 0xea06, 0x7e14, 0xe9ed, 0x7e10, 0xe9d4,
00290   0x7e0c, 0xe9bb, 0x7e07, 0xe9a3, 0x7e03, 0xe98a, 0x7dff, 0xe971,
00291   0x7dfa, 0xe958, 0x7df6, 0xe940, 0x7df1, 0xe927, 0x7ded, 0xe90e,
00292   0x7de8, 0xe8f6, 0x7de4, 0xe8dd, 0x7ddf, 0xe8c4, 0x7dda, 0xe8ab,
00293   0x7dd6, 0xe893, 0x7dd1, 0xe87a, 0x7dcd, 0xe861, 0x7dc8, 0xe849,
00294   0x7dc3, 0xe830, 0x7dbf, 0xe817, 0x7dba, 0xe7fe, 0x7db5, 0xe7e6,
00295   0x7db0, 0xe7cd, 0x7dac, 0xe7b4, 0x7da7, 0xe79c, 0x7da2, 0xe783,
00296   0x7d9d, 0xe76a, 0x7d98, 0xe752, 0x7d94, 0xe739, 0x7d8f, 0xe720,
00297   0x7d8a, 0xe708, 0x7d85, 0xe6ef, 0x7d80, 0xe6d6, 0x7d7b, 0xe6be,
00298   0x7d76, 0xe6a5, 0x7d71, 0xe68d, 0x7d6c, 0xe674, 0x7d67, 0xe65b,
00299   0x7d62, 0xe643, 0x7d5d, 0xe62a, 0x7d58, 0xe611, 0x7d53, 0xe5f9,
00300   0x7d4e, 0xe5e0, 0x7d49, 0xe5c8, 0x7d43, 0xe5af, 0x7d3e, 0xe596,
00301   0x7d39, 0xe57e, 0x7d34, 0xe565, 0x7d2f, 0xe54d, 0x7d29, 0xe534,
00302   0x7d24, 0xe51c, 0x7d1f, 0xe503, 0x7d19, 0xe4ea, 0x7d14, 0xe4d2,
00303   0x7d0f, 0xe4b9, 0x7d09, 0xe4a1, 0x7d04, 0xe488, 0x7cff, 0xe470,
00304   0x7cf9, 0xe457, 0x7cf4, 0xe43f, 0x7cee, 0xe426, 0x7ce9, 0xe40e,
00305   0x7ce3, 0xe3f5, 0x7cde, 0xe3dc, 0x7cd8, 0xe3c4, 0x7cd3, 0xe3ab,
00306   0x7ccd, 0xe393, 0x7cc8, 0xe37a, 0x7cc2, 0xe362, 0x7cbc, 0xe349,
00307   0x7cb7, 0xe331, 0x7cb1, 0xe318, 0x7cab, 0xe300, 0x7ca6, 0xe2e8,
00308   0x7ca0, 0xe2cf, 0x7c9a, 0xe2b7, 0x7c94, 0xe29e, 0x7c8f, 0xe286,
00309   0x7c89, 0xe26d, 0x7c83, 0xe255, 0x7c7d, 0xe23c, 0x7c77, 0xe224,
00310   0x7c71, 0xe20b, 0x7c6c, 0xe1f3, 0x7c66, 0xe1db, 0x7c60, 0xe1c2,
00311   0x7c5a, 0xe1aa, 0x7c54, 0xe191, 0x7c4e, 0xe179, 0x7c48, 0xe160,
00312   0x7c42, 0xe148, 0x7c3c, 0xe130, 0x7c36, 0xe117, 0x7c30, 0xe0ff,
00313   0x7c29, 0xe0e7, 0x7c23, 0xe0ce, 0x7c1d, 0xe0b6, 0x7c17, 0xe09d,
00314   0x7c11, 0xe085, 0x7c0b, 0xe06d, 0x7c05, 0xe054, 0x7bfe, 0xe03c,
00315   0x7bf8, 0xe024, 0x7bf2, 0xe00b, 0x7beb, 0xdff3, 0x7be5, 0xdfdb,
00316   0x7bdf, 0xdfc2, 0x7bd9, 0xdfaa, 0x7bd2, 0xdf92, 0x7bcc, 0xdf79,
00317   0x7bc5, 0xdf61, 0x7bbf, 0xdf49, 0x7bb9, 0xdf30, 0x7bb2, 0xdf18,
00318   0x7bac, 0xdf00, 0x7ba5, 0xdee8, 0x7b9f, 0xdecf, 0x7b98, 0xdeb7,
00319   0x7b92, 0xde9f, 0x7b8b, 0xde87, 0x7b84, 0xde6e, 0x7b7e, 0xde56,
00320   0x7b77, 0xde3e, 0x7b71, 0xde26, 0x7b6a, 0xde0d, 0x7b63, 0xddf5,
00321   0x7b5d, 0xdddd, 0x7b56, 0xddc5, 0x7b4f, 0xddac, 0x7b48, 0xdd94,
00322   0x7b42, 0xdd7c, 0x7b3b, 0xdd64, 0x7b34, 0xdd4c, 0x7b2d, 0xdd33,
00323   0x7b26, 0xdd1b, 0x7b1f, 0xdd03, 0x7b19, 0xdceb, 0x7b12, 0xdcd3,
00324   0x7b0b, 0xdcbb, 0x7b04, 0xdca2, 0x7afd, 0xdc8a, 0x7af6, 0xdc72,
00325   0x7aef, 0xdc5a, 0x7ae8, 0xdc42, 0x7ae1, 0xdc2a, 0x7ada, 0xdc12,
00326   0x7ad3, 0xdbf9, 0x7acc, 0xdbe1, 0x7ac5, 0xdbc9, 0x7abd, 0xdbb1,
00327   0x7ab6, 0xdb99, 0x7aaf, 0xdb81, 0x7aa8, 0xdb69, 0x7aa1, 0xdb51,
00328   0x7a9a, 0xdb39, 0x7a92, 0xdb21, 0x7a8b, 0xdb09, 0x7a84, 0xdaf1,
00329   0x7a7d, 0xdad8, 0x7a75, 0xdac0, 0x7a6e, 0xdaa8, 0x7a67, 0xda90,
00330   0x7a5f, 0xda78, 0x7a58, 0xda60, 0x7a50, 0xda48, 0x7a49, 0xda30,
00331   0x7a42, 0xda18, 0x7a3a, 0xda00, 0x7a33, 0xd9e8, 0x7a2b, 0xd9d0,
00332   0x7a24, 0xd9b8, 0x7a1c, 0xd9a0, 0x7a15, 0xd988, 0x7a0d, 0xd970,
00333   0x7a05, 0xd958, 0x79fe, 0xd940, 0x79f6, 0xd928, 0x79ef, 0xd911,
00334   0x79e7, 0xd8f9, 0x79df, 0xd8e1, 0x79d8, 0xd8c9, 0x79d0, 0xd8b1,
00335   0x79c8, 0xd899, 0x79c0, 0xd881, 0x79b9, 0xd869, 0x79b1, 0xd851,
00336   0x79a9, 0xd839, 0x79a1, 0xd821, 0x7999, 0xd80a, 0x7992, 0xd7f2,
00337   0x798a, 0xd7da, 0x7982, 0xd7c2, 0x797a, 0xd7aa, 0x7972, 0xd792,
00338   0x796a, 0xd77a, 0x7962, 0xd763, 0x795a, 0xd74b, 0x7952, 0xd733,
00339   0x794a, 0xd71b, 0x7942, 0xd703, 0x793a, 0xd6eb, 0x7932, 0xd6d4,
00340   0x792a, 0xd6bc, 0x7922, 0xd6a4, 0x7919, 0xd68c, 0x7911, 0xd675,
00341   0x7909, 0xd65d, 0x7901, 0xd645, 0x78f9, 0xd62d, 0x78f1, 0xd615,
00342   0x78e8, 0xd5fe, 0x78e0, 0xd5e6, 0x78d8, 0xd5ce, 0x78cf, 0xd5b7,
00343   0x78c7, 0xd59f, 0x78bf, 0xd587, 0x78b6, 0xd56f, 0x78ae, 0xd558,
00344   0x78a6, 0xd540, 0x789d, 0xd528, 0x7895, 0xd511, 0x788c, 0xd4f9,
00345   0x7884, 0xd4e1, 0x787c, 0xd4ca, 0x7873, 0xd4b2, 0x786b, 0xd49a,
00346   0x7862, 0xd483, 0x7859, 0xd46b, 0x7851, 0xd453, 0x7848, 0xd43c,
00347   0x7840, 0xd424, 0x7837, 0xd40d, 0x782e, 0xd3f5, 0x7826, 0xd3dd,
00348   0x781d, 0xd3c6, 0x7814, 0xd3ae, 0x780c, 0xd397, 0x7803, 0xd37f,
00349   0x77fa, 0xd368, 0x77f1, 0xd350, 0x77e9, 0xd338, 0x77e0, 0xd321,
00350   0x77d7, 0xd309, 0x77ce, 0xd2f2, 0x77c5, 0xd2da, 0x77bc, 0xd2c3,
00351   0x77b4, 0xd2ab, 0x77ab, 0xd294, 0x77a2, 0xd27c, 0x7799, 0xd265,
00352   0x7790, 0xd24d, 0x7787, 0xd236, 0x777e, 0xd21e, 0x7775, 0xd207,
00353   0x776c, 0xd1ef, 0x7763, 0xd1d8, 0x775a, 0xd1c1, 0x7751, 0xd1a9,
00354   0x7747, 0xd192, 0x773e, 0xd17a, 0x7735, 0xd163, 0x772c, 0xd14b,
00355   0x7723, 0xd134, 0x771a, 0xd11d, 0x7710, 0xd105, 0x7707, 0xd0ee,
00356   0x76fe, 0xd0d7, 0x76f5, 0xd0bf, 0x76eb, 0xd0a8, 0x76e2, 0xd091,
00357   0x76d9, 0xd079, 0x76cf, 0xd062, 0x76c6, 0xd04b, 0x76bd, 0xd033,
00358   0x76b3, 0xd01c, 0x76aa, 0xd005, 0x76a0, 0xcfed, 0x7697, 0xcfd6,
00359   0x768e, 0xcfbf, 0x7684, 0xcfa7, 0x767b, 0xcf90, 0x7671, 0xcf79,
00360   0x7668, 0xcf62, 0x765e, 0xcf4a, 0x7654, 0xcf33, 0x764b, 0xcf1c,
00361   0x7641, 0xcf05, 0x7638, 0xceee, 0x762e, 0xced6, 0x7624, 0xcebf,
00362   0x761b, 0xcea8, 0x7611, 0xce91, 0x7607, 0xce7a, 0x75fd, 0xce62,
00363   0x75f4, 0xce4b, 0x75ea, 0xce34, 0x75e0, 0xce1d, 0x75d6, 0xce06,
00364   0x75cc, 0xcdef, 0x75c3, 0xcdd8, 0x75b9, 0xcdc0, 0x75af, 0xcda9,
00365   0x75a5, 0xcd92, 0x759b, 0xcd7b, 0x7591, 0xcd64, 0x7587, 0xcd4d,
00366   0x757d, 0xcd36, 0x7573, 0xcd1f, 0x7569, 0xcd08, 0x755f, 0xccf1,
00367   0x7555, 0xccda, 0x754b, 0xccc3, 0x7541, 0xccac, 0x7537, 0xcc95,
00368   0x752d, 0xcc7e, 0x7523, 0xcc67, 0x7519, 0xcc50, 0x750f, 0xcc39,
00369   0x7504, 0xcc22, 0x74fa, 0xcc0b, 0x74f0, 0xcbf4, 0x74e6, 0xcbdd,
00370   0x74db, 0xcbc6, 0x74d1, 0xcbaf, 0x74c7, 0xcb98, 0x74bd, 0xcb81,
00371   0x74b2, 0xcb6a, 0x74a8, 0xcb53, 0x749e, 0xcb3c, 0x7493, 0xcb25,
00372   0x7489, 0xcb0e, 0x747e, 0xcaf8, 0x7474, 0xcae1, 0x746a, 0xcaca,
00373   0x745f, 0xcab3, 0x7455, 0xca9c, 0x744a, 0xca85, 0x7440, 0xca6e,
00374   0x7435, 0xca58, 0x742b, 0xca41, 0x7420, 0xca2a, 0x7415, 0xca13,
00375   0x740b, 0xc9fc, 0x7400, 0xc9e6, 0x73f6, 0xc9cf, 0x73eb, 0xc9b8,
00376   0x73e0, 0xc9a1, 0x73d6, 0xc98b, 0x73cb, 0xc974, 0x73c0, 0xc95d,
00377   0x73b5, 0xc946, 0x73ab, 0xc930, 0x73a0, 0xc919, 0x7395, 0xc902,
00378   0x738a, 0xc8ec, 0x737f, 0xc8d5, 0x7375, 0xc8be, 0x736a, 0xc8a8,
00379   0x735f, 0xc891, 0x7354, 0xc87a, 0x7349, 0xc864, 0x733e, 0xc84d,
00380   0x7333, 0xc836, 0x7328, 0xc820, 0x731d, 0xc809, 0x7312, 0xc7f3,
00381   0x7307, 0xc7dc, 0x72fc, 0xc7c5, 0x72f1, 0xc7af, 0x72e6, 0xc798,
00382   0x72db, 0xc782, 0x72d0, 0xc76b, 0x72c5, 0xc755, 0x72ba, 0xc73e,
00383   0x72af, 0xc728, 0x72a3, 0xc711, 0x7298, 0xc6fa, 0x728d, 0xc6e4,
00384   0x7282, 0xc6ce, 0x7276, 0xc6b7, 0x726b, 0xc6a1, 0x7260, 0xc68a,
00385   0x7255, 0xc674, 0x7249, 0xc65d, 0x723e, 0xc647, 0x7233, 0xc630,
00386   0x7227, 0xc61a, 0x721c, 0xc603, 0x7211, 0xc5ed, 0x7205, 0xc5d7,
00387   0x71fa, 0xc5c0, 0x71ee, 0xc5aa, 0x71e3, 0xc594, 0x71d7, 0xc57d,
00388   0x71cc, 0xc567, 0x71c0, 0xc551, 0x71b5, 0xc53a, 0x71a9, 0xc524,
00389   0x719e, 0xc50e, 0x7192, 0xc4f7, 0x7186, 0xc4e1, 0x717b, 0xc4cb,
00390   0x716f, 0xc4b4, 0x7164, 0xc49e, 0x7158, 0xc488, 0x714c, 0xc472,
00391   0x7141, 0xc45b, 0x7135, 0xc445, 0x7129, 0xc42f, 0x711d, 0xc419,
00392   0x7112, 0xc403, 0x7106, 0xc3ec, 0x70fa, 0xc3d6, 0x70ee, 0xc3c0,
00393   0x70e2, 0xc3aa, 0x70d6, 0xc394, 0x70cb, 0xc37d, 0x70bf, 0xc367,
00394   0x70b3, 0xc351, 0x70a7, 0xc33b, 0x709b, 0xc325, 0x708f, 0xc30f,
00395   0x7083, 0xc2f9, 0x7077, 0xc2e3, 0x706b, 0xc2cd, 0x705f, 0xc2b7,
00396   0x7053, 0xc2a0, 0x7047, 0xc28a, 0x703b, 0xc274, 0x702f, 0xc25e,
00397   0x7023, 0xc248, 0x7016, 0xc232, 0x700a, 0xc21c, 0x6ffe, 0xc206,
00398   0x6ff2, 0xc1f0, 0x6fe6, 0xc1da, 0x6fda, 0xc1c4, 0x6fcd, 0xc1ae,
00399   0x6fc1, 0xc198, 0x6fb5, 0xc183, 0x6fa9, 0xc16d, 0x6f9c, 0xc157,
00400   0x6f90, 0xc141, 0x6f84, 0xc12b, 0x6f77, 0xc115, 0x6f6b, 0xc0ff,
00401   0x6f5f, 0xc0e9, 0x6f52, 0xc0d3, 0x6f46, 0xc0bd, 0x6f39, 0xc0a8,
00402   0x6f2d, 0xc092, 0x6f20, 0xc07c, 0x6f14, 0xc066, 0x6f07, 0xc050,
00403   0x6efb, 0xc03b, 0x6eee, 0xc025, 0x6ee2, 0xc00f, 0x6ed5, 0xbff9,
00404   0x6ec9, 0xbfe3, 0x6ebc, 0xbfce, 0x6eaf, 0xbfb8, 0x6ea3, 0xbfa2,
00405   0x6e96, 0xbf8d, 0x6e89, 0xbf77, 0x6e7d, 0xbf61, 0x6e70, 0xbf4b,
00406   0x6e63, 0xbf36, 0x6e57, 0xbf20, 0x6e4a, 0xbf0a, 0x6e3d, 0xbef5,
00407   0x6e30, 0xbedf, 0x6e24, 0xbeca, 0x6e17, 0xbeb4, 0x6e0a, 0xbe9e,
00408   0x6dfd, 0xbe89, 0x6df0, 0xbe73, 0x6de3, 0xbe5e, 0x6dd6, 0xbe48,
00409   0x6dca, 0xbe32, 0x6dbd, 0xbe1d, 0x6db0, 0xbe07, 0x6da3, 0xbdf2,
00410   0x6d96, 0xbddc, 0x6d89, 0xbdc7, 0x6d7c, 0xbdb1, 0x6d6f, 0xbd9c,
00411   0x6d62, 0xbd86, 0x6d55, 0xbd71, 0x6d48, 0xbd5b, 0x6d3a, 0xbd46,
00412   0x6d2d, 0xbd30, 0x6d20, 0xbd1b, 0x6d13, 0xbd06, 0x6d06, 0xbcf0,
00413   0x6cf9, 0xbcdb, 0x6cec, 0xbcc5, 0x6cde, 0xbcb0, 0x6cd1, 0xbc9b,
00414   0x6cc4, 0xbc85, 0x6cb7, 0xbc70, 0x6ca9, 0xbc5b, 0x6c9c, 0xbc45,
00415   0x6c8f, 0xbc30, 0x6c81, 0xbc1b, 0x6c74, 0xbc05, 0x6c67, 0xbbf0,
00416   0x6c59, 0xbbdb, 0x6c4c, 0xbbc5, 0x6c3f, 0xbbb0, 0x6c31, 0xbb9b,
00417   0x6c24, 0xbb86, 0x6c16, 0xbb70, 0x6c09, 0xbb5b, 0x6bfb, 0xbb46,
00418   0x6bee, 0xbb31, 0x6be0, 0xbb1c, 0x6bd3, 0xbb06, 0x6bc5, 0xbaf1,
00419   0x6bb8, 0xbadc, 0x6baa, 0xbac7, 0x6b9c, 0xbab2, 0x6b8f, 0xba9d,
00420   0x6b81, 0xba88, 0x6b73, 0xba73, 0x6b66, 0xba5d, 0x6b58, 0xba48,
00421   0x6b4a, 0xba33, 0x6b3d, 0xba1e, 0x6b2f, 0xba09, 0x6b21, 0xb9f4,
00422   0x6b13, 0xb9df, 0x6b06, 0xb9ca, 0x6af8, 0xb9b5, 0x6aea, 0xb9a0,
00423   0x6adc, 0xb98b, 0x6ace, 0xb976, 0x6ac1, 0xb961, 0x6ab3, 0xb94c,
00424   0x6aa5, 0xb937, 0x6a97, 0xb922, 0x6a89, 0xb90d, 0x6a7b, 0xb8f8,
00425   0x6a6d, 0xb8e4, 0x6a5f, 0xb8cf, 0x6a51, 0xb8ba, 0x6a43, 0xb8a5,
00426   0x6a35, 0xb890, 0x6a27, 0xb87b, 0x6a19, 0xb866, 0x6a0b, 0xb852,
00427   0x69fd, 0xb83d, 0x69ef, 0xb828, 0x69e1, 0xb813, 0x69d3, 0xb7fe,
00428   0x69c4, 0xb7ea, 0x69b6, 0xb7d5, 0x69a8, 0xb7c0, 0x699a, 0xb7ab,
00429   0x698c, 0xb797, 0x697d, 0xb782, 0x696f, 0xb76d, 0x6961, 0xb758,
00430   0x6953, 0xb744, 0x6944, 0xb72f, 0x6936, 0xb71a, 0x6928, 0xb706,
00431   0x6919, 0xb6f1, 0x690b, 0xb6dd, 0x68fd, 0xb6c8, 0x68ee, 0xb6b3,
00432   0x68e0, 0xb69f, 0x68d1, 0xb68a, 0x68c3, 0xb676, 0x68b5, 0xb661,
00433   0x68a6, 0xb64c, 0x6898, 0xb638, 0x6889, 0xb623, 0x687b, 0xb60f,
00434   0x686c, 0xb5fa, 0x685e, 0xb5e6, 0x684f, 0xb5d1, 0x6840, 0xb5bd,
00435   0x6832, 0xb5a8, 0x6823, 0xb594, 0x6815, 0xb57f, 0x6806, 0xb56b,
00436   0x67f7, 0xb557, 0x67e9, 0xb542, 0x67da, 0xb52e, 0x67cb, 0xb519,
00437   0x67bd, 0xb505, 0x67ae, 0xb4f1, 0x679f, 0xb4dc, 0x6790, 0xb4c8,
00438   0x6782, 0xb4b4, 0x6773, 0xb49f, 0x6764, 0xb48b, 0x6755, 0xb477,
00439   0x6746, 0xb462, 0x6737, 0xb44e, 0x6729, 0xb43a, 0x671a, 0xb426,
00440   0x670b, 0xb411, 0x66fc, 0xb3fd, 0x66ed, 0xb3e9, 0x66de, 0xb3d5,
00441   0x66cf, 0xb3c1, 0x66c0, 0xb3ac, 0x66b1, 0xb398, 0x66a2, 0xb384,
00442   0x6693, 0xb370, 0x6684, 0xb35c, 0x6675, 0xb348, 0x6666, 0xb334,
00443   0x6657, 0xb31f, 0x6648, 0xb30b, 0x6639, 0xb2f7, 0x6629, 0xb2e3,
00444   0x661a, 0xb2cf, 0x660b, 0xb2bb, 0x65fc, 0xb2a7, 0x65ed, 0xb293,
00445   0x65dd, 0xb27f, 0x65ce, 0xb26b, 0x65bf, 0xb257, 0x65b0, 0xb243,
00446   0x65a0, 0xb22f, 0x6591, 0xb21b, 0x6582, 0xb207, 0x6573, 0xb1f3,
00447   0x6563, 0xb1df, 0x6554, 0xb1cc, 0x6545, 0xb1b8, 0x6535, 0xb1a4,
00448   0x6526, 0xb190, 0x6516, 0xb17c, 0x6507, 0xb168, 0x64f7, 0xb154,
00449   0x64e8, 0xb141, 0x64d9, 0xb12d, 0x64c9, 0xb119, 0x64ba, 0xb105,
00450   0x64aa, 0xb0f1, 0x649b, 0xb0de, 0x648b, 0xb0ca, 0x647b, 0xb0b6,
00451   0x646c, 0xb0a2, 0x645c, 0xb08f, 0x644d, 0xb07b, 0x643d, 0xb067,
00452   0x642d, 0xb054, 0x641e, 0xb040, 0x640e, 0xb02c, 0x63fe, 0xb019,
00453   0x63ef, 0xb005, 0x63df, 0xaff1, 0x63cf, 0xafde, 0x63c0, 0xafca,
00454   0x63b0, 0xafb7, 0x63a0, 0xafa3, 0x6390, 0xaf90, 0x6380, 0xaf7c,
00455   0x6371, 0xaf69, 0x6361, 0xaf55, 0x6351, 0xaf41, 0x6341, 0xaf2e,
00456   0x6331, 0xaf1b, 0x6321, 0xaf07, 0x6311, 0xaef4, 0x6301, 0xaee0,
00457   0x62f2, 0xaecd, 0x62e2, 0xaeb9, 0x62d2, 0xaea6, 0x62c2, 0xae92,
00458   0x62b2, 0xae7f, 0x62a2, 0xae6c, 0x6292, 0xae58, 0x6282, 0xae45,
00459   0x6271, 0xae32, 0x6261, 0xae1e, 0x6251, 0xae0b, 0x6241, 0xadf8,
00460   0x6231, 0xade4, 0x6221, 0xadd1, 0x6211, 0xadbe, 0x6201, 0xadab,
00461   0x61f1, 0xad97, 0x61e0, 0xad84, 0x61d0, 0xad71, 0x61c0, 0xad5e,
00462   0x61b0, 0xad4b, 0x619f, 0xad37, 0x618f, 0xad24, 0x617f, 0xad11,
00463   0x616f, 0xacfe, 0x615e, 0xaceb, 0x614e, 0xacd8, 0x613e, 0xacc5,
00464   0x612d, 0xacb2, 0x611d, 0xac9e, 0x610d, 0xac8b, 0x60fc, 0xac78,
00465   0x60ec, 0xac65, 0x60db, 0xac52, 0x60cb, 0xac3f, 0x60ba, 0xac2c,
00466   0x60aa, 0xac19, 0x6099, 0xac06, 0x6089, 0xabf3, 0x6078, 0xabe0,
00467   0x6068, 0xabcd, 0x6057, 0xabbb, 0x6047, 0xaba8, 0x6036, 0xab95,
00468   0x6026, 0xab82, 0x6015, 0xab6f, 0x6004, 0xab5c, 0x5ff4, 0xab49,
00469   0x5fe3, 0xab36, 0x5fd3, 0xab24, 0x5fc2, 0xab11, 0x5fb1, 0xaafe,
00470   0x5fa0, 0xaaeb, 0x5f90, 0xaad8, 0x5f7f, 0xaac6, 0x5f6e, 0xaab3,
00471   0x5f5e, 0xaaa0, 0x5f4d, 0xaa8e, 0x5f3c, 0xaa7b, 0x5f2b, 0xaa68,
00472   0x5f1a, 0xaa55, 0x5f0a, 0xaa43, 0x5ef9, 0xaa30, 0x5ee8, 0xaa1d,
00473   0x5ed7, 0xaa0b, 0x5ec6, 0xa9f8, 0x5eb5, 0xa9e6, 0x5ea4, 0xa9d3,
00474   0x5e93, 0xa9c0, 0x5e82, 0xa9ae, 0x5e71, 0xa99b, 0x5e60, 0xa989,
00475   0x5e50, 0xa976, 0x5e3f, 0xa964, 0x5e2d, 0xa951, 0x5e1c, 0xa93f,
00476   0x5e0b, 0xa92c, 0x5dfa, 0xa91a, 0x5de9, 0xa907, 0x5dd8, 0xa8f5,
00477   0x5dc7, 0xa8e3, 0x5db6, 0xa8d0, 0x5da5, 0xa8be, 0x5d94, 0xa8ab,
00478   0x5d83, 0xa899, 0x5d71, 0xa887, 0x5d60, 0xa874, 0x5d4f, 0xa862,
00479   0x5d3e, 0xa850, 0x5d2d, 0xa83d, 0x5d1b, 0xa82b, 0x5d0a, 0xa819,
00480   0x5cf9, 0xa807, 0x5ce8, 0xa7f4, 0x5cd6, 0xa7e2, 0x5cc5, 0xa7d0,
00481   0x5cb4, 0xa7be, 0x5ca2, 0xa7ab, 0x5c91, 0xa799, 0x5c80, 0xa787,
00482   0x5c6e, 0xa775, 0x5c5d, 0xa763, 0x5c4b, 0xa751, 0x5c3a, 0xa73f,
00483   0x5c29, 0xa72c, 0x5c17, 0xa71a, 0x5c06, 0xa708, 0x5bf4, 0xa6f6,
00484   0x5be3, 0xa6e4, 0x5bd1, 0xa6d2, 0x5bc0, 0xa6c0, 0x5bae, 0xa6ae,
00485   0x5b9d, 0xa69c, 0x5b8b, 0xa68a, 0x5b79, 0xa678, 0x5b68, 0xa666,
00486   0x5b56, 0xa654, 0x5b45, 0xa642, 0x5b33, 0xa630, 0x5b21, 0xa61f,
00487   0x5b10, 0xa60d, 0x5afe, 0xa5fb, 0x5aec, 0xa5e9, 0x5adb, 0xa5d7,
00488   0x5ac9, 0xa5c5, 0x5ab7, 0xa5b3, 0x5aa5, 0xa5a2, 0x5a94, 0xa590,
00489   0x5a82, 0xa57e, 0x5a70, 0xa56c, 0x5a5e, 0xa55b, 0x5a4d, 0xa549,
00490   0x5a3b, 0xa537, 0x5a29, 0xa525, 0x5a17, 0xa514, 0x5a05, 0xa502,
00491   0x59f3, 0xa4f0, 0x59e1, 0xa4df, 0x59d0, 0xa4cd, 0x59be, 0xa4bb,
00492   0x59ac, 0xa4aa, 0x599a, 0xa498, 0x5988, 0xa487, 0x5976, 0xa475,
00493   0x5964, 0xa463, 0x5952, 0xa452, 0x5940, 0xa440, 0x592e, 0xa42f,
00494   0x591c, 0xa41d, 0x590a, 0xa40c, 0x58f8, 0xa3fa, 0x58e6, 0xa3e9,
00495   0x58d4, 0xa3d7, 0x58c1, 0xa3c6, 0x58af, 0xa3b5, 0x589d, 0xa3a3,
00496   0x588b, 0xa392, 0x5879, 0xa380, 0x5867, 0xa36f, 0x5855, 0xa35e,
00497   0x5842, 0xa34c, 0x5830, 0xa33b, 0x581e, 0xa32a, 0x580c, 0xa318,
00498   0x57f9, 0xa307, 0x57e7, 0xa2f6, 0x57d5, 0xa2e5, 0x57c3, 0xa2d3,
00499   0x57b0, 0xa2c2, 0x579e, 0xa2b1, 0x578c, 0xa2a0, 0x5779, 0xa28f,
00500   0x5767, 0xa27d, 0x5755, 0xa26c, 0x5742, 0xa25b, 0x5730, 0xa24a,
00501   0x571d, 0xa239, 0x570b, 0xa228, 0x56f9, 0xa217, 0x56e6, 0xa206,
00502   0x56d4, 0xa1f5, 0x56c1, 0xa1e4, 0x56af, 0xa1d3, 0x569c, 0xa1c1,
00503   0x568a, 0xa1b0, 0x5677, 0xa1a0, 0x5665, 0xa18f, 0x5652, 0xa17e,
00504   0x5640, 0xa16d, 0x562d, 0xa15c, 0x561a, 0xa14b, 0x5608, 0xa13a,
00505   0x55f5, 0xa129, 0x55e3, 0xa118, 0x55d0, 0xa107, 0x55bd, 0xa0f6,
00506   0x55ab, 0xa0e6, 0x5598, 0xa0d5, 0x5585, 0xa0c4, 0x5572, 0xa0b3,
00507   0x5560, 0xa0a2, 0x554d, 0xa092, 0x553a, 0xa081, 0x5528, 0xa070,
00508   0x5515, 0xa060, 0x5502, 0xa04f, 0x54ef, 0xa03e, 0x54dc, 0xa02d,
00509   0x54ca, 0xa01d, 0x54b7, 0xa00c, 0x54a4, 0x9ffc, 0x5491, 0x9feb,
00510   0x547e, 0x9fda, 0x546b, 0x9fca, 0x5458, 0x9fb9, 0x5445, 0x9fa9,
00511   0x5433, 0x9f98, 0x5420, 0x9f88, 0x540d, 0x9f77, 0x53fa, 0x9f67,
00512   0x53e7, 0x9f56, 0x53d4, 0x9f46, 0x53c1, 0x9f35, 0x53ae, 0x9f25,
00513   0x539b, 0x9f14, 0x5388, 0x9f04, 0x5375, 0x9ef3, 0x5362, 0x9ee3,
00514   0x534e, 0x9ed3, 0x533b, 0x9ec2, 0x5328, 0x9eb2, 0x5315, 0x9ea2,
00515   0x5302, 0x9e91, 0x52ef, 0x9e81, 0x52dc, 0x9e71, 0x52c9, 0x9e61,
00516   0x52b5, 0x9e50, 0x52a2, 0x9e40, 0x528f, 0x9e30, 0x527c, 0x9e20,
00517   0x5269, 0x9e0f, 0x5255, 0x9dff, 0x5242, 0x9def, 0x522f, 0x9ddf,
00518   0x521c, 0x9dcf, 0x5208, 0x9dbf, 0x51f5, 0x9daf, 0x51e2, 0x9d9f,
00519   0x51ce, 0x9d8f, 0x51bb, 0x9d7e, 0x51a8, 0x9d6e, 0x5194, 0x9d5e,
00520   0x5181, 0x9d4e, 0x516e, 0x9d3e, 0x515a, 0x9d2e, 0x5147, 0x9d1e,
00521   0x5133, 0x9d0e, 0x5120, 0x9cff, 0x510c, 0x9cef, 0x50f9, 0x9cdf,
00522   0x50e5, 0x9ccf, 0x50d2, 0x9cbf, 0x50bf, 0x9caf, 0x50ab, 0x9c9f,
00523   0x5097, 0x9c8f, 0x5084, 0x9c80, 0x5070, 0x9c70, 0x505d, 0x9c60,
00524   0x5049, 0x9c50, 0x5036, 0x9c40, 0x5022, 0x9c31, 0x500f, 0x9c21,
00525   0x4ffb, 0x9c11, 0x4fe7, 0x9c02, 0x4fd4, 0x9bf2, 0x4fc0, 0x9be2,
00526   0x4fac, 0x9bd3, 0x4f99, 0x9bc3, 0x4f85, 0x9bb3, 0x4f71, 0x9ba4,
00527   0x4f5e, 0x9b94, 0x4f4a, 0x9b85, 0x4f36, 0x9b75, 0x4f22, 0x9b65,
00528   0x4f0f, 0x9b56, 0x4efb, 0x9b46, 0x4ee7, 0x9b37, 0x4ed3, 0x9b27,
00529   0x4ebf, 0x9b18, 0x4eac, 0x9b09, 0x4e98, 0x9af9, 0x4e84, 0x9aea,
00530   0x4e70, 0x9ada, 0x4e5c, 0x9acb, 0x4e48, 0x9abb, 0x4e34, 0x9aac,
00531   0x4e21, 0x9a9d, 0x4e0d, 0x9a8d, 0x4df9, 0x9a7e, 0x4de5, 0x9a6f,
00532   0x4dd1, 0x9a60, 0x4dbd, 0x9a50, 0x4da9, 0x9a41, 0x4d95, 0x9a32,
00533   0x4d81, 0x9a23, 0x4d6d, 0x9a13, 0x4d59, 0x9a04, 0x4d45, 0x99f5,
00534   0x4d31, 0x99e6, 0x4d1d, 0x99d7, 0x4d09, 0x99c7, 0x4cf5, 0x99b8,
00535   0x4ce1, 0x99a9, 0x4ccc, 0x999a, 0x4cb8, 0x998b, 0x4ca4, 0x997c,
00536   0x4c90, 0x996d, 0x4c7c, 0x995e, 0x4c68, 0x994f, 0x4c54, 0x9940,
00537   0x4c3f, 0x9931, 0x4c2b, 0x9922, 0x4c17, 0x9913, 0x4c03, 0x9904,
00538   0x4bef, 0x98f5, 0x4bda, 0x98e6, 0x4bc6, 0x98d7, 0x4bb2, 0x98c9,
00539   0x4b9e, 0x98ba, 0x4b89, 0x98ab, 0x4b75, 0x989c, 0x4b61, 0x988d,
00540   0x4b4c, 0x987e, 0x4b38, 0x9870, 0x4b24, 0x9861, 0x4b0f, 0x9852,
00541   0x4afb, 0x9843, 0x4ae7, 0x9835, 0x4ad2, 0x9826, 0x4abe, 0x9817,
00542   0x4aa9, 0x9809, 0x4a95, 0x97fa, 0x4a81, 0x97eb, 0x4a6c, 0x97dd,
00543   0x4a58, 0x97ce, 0x4a43, 0x97c0, 0x4a2f, 0x97b1, 0x4a1a, 0x97a2,
00544   0x4a06, 0x9794, 0x49f1, 0x9785, 0x49dd, 0x9777, 0x49c8, 0x9768,
00545   0x49b4, 0x975a, 0x499f, 0x974b, 0x498a, 0x973d, 0x4976, 0x972f,
00546   0x4961, 0x9720, 0x494d, 0x9712, 0x4938, 0x9703, 0x4923, 0x96f5,
00547   0x490f, 0x96e7, 0x48fa, 0x96d8, 0x48e6, 0x96ca, 0x48d1, 0x96bc,
00548   0x48bc, 0x96ad, 0x48a8, 0x969f, 0x4893, 0x9691, 0x487e, 0x9683,
00549   0x4869, 0x9674, 0x4855, 0x9666, 0x4840, 0x9658, 0x482b, 0x964a,
00550   0x4816, 0x963c, 0x4802, 0x962d, 0x47ed, 0x961f, 0x47d8, 0x9611,
00551   0x47c3, 0x9603, 0x47ae, 0x95f5, 0x479a, 0x95e7, 0x4785, 0x95d9,
00552   0x4770, 0x95cb, 0x475b, 0x95bd, 0x4746, 0x95af, 0x4731, 0x95a1,
00553   0x471c, 0x9593, 0x4708, 0x9585, 0x46f3, 0x9577, 0x46de, 0x9569,
00554   0x46c9, 0x955b, 0x46b4, 0x954d, 0x469f, 0x953f, 0x468a, 0x9532,
00555   0x4675, 0x9524, 0x4660, 0x9516, 0x464b, 0x9508, 0x4636, 0x94fa,
00556   0x4621, 0x94ed, 0x460c, 0x94df, 0x45f7, 0x94d1, 0x45e2, 0x94c3,
00557   0x45cd, 0x94b6, 0x45b8, 0x94a8, 0x45a3, 0x949a, 0x458d, 0x948d,
00558   0x4578, 0x947f, 0x4563, 0x9471, 0x454e, 0x9464, 0x4539, 0x9456,
00559   0x4524, 0x9448, 0x450f, 0x943b, 0x44fa, 0x942d, 0x44e4, 0x9420,
00560   0x44cf, 0x9412, 0x44ba, 0x9405, 0x44a5, 0x93f7, 0x4490, 0x93ea,
00561   0x447a, 0x93dc, 0x4465, 0x93cf, 0x4450, 0x93c1, 0x443b, 0x93b4,
00562   0x4425, 0x93a7, 0x4410, 0x9399, 0x43fb, 0x938c, 0x43e5, 0x937f,
00563   0x43d0, 0x9371, 0x43bb, 0x9364, 0x43a5, 0x9357, 0x4390, 0x9349,
00564   0x437b, 0x933c, 0x4365, 0x932f, 0x4350, 0x9322, 0x433b, 0x9314,
00565   0x4325, 0x9307, 0x4310, 0x92fa, 0x42fa, 0x92ed, 0x42e5, 0x92e0,
00566   0x42d0, 0x92d3, 0x42ba, 0x92c6, 0x42a5, 0x92b8, 0x428f, 0x92ab,
00567   0x427a, 0x929e, 0x4264, 0x9291, 0x424f, 0x9284, 0x4239, 0x9277,
00568   0x4224, 0x926a, 0x420e, 0x925d, 0x41f9, 0x9250, 0x41e3, 0x9243,
00569   0x41ce, 0x9236, 0x41b8, 0x922a, 0x41a2, 0x921d, 0x418d, 0x9210,
00570   0x4177, 0x9203, 0x4162, 0x91f6, 0x414c, 0x91e9, 0x4136, 0x91dc,
00571   0x4121, 0x91d0, 0x410b, 0x91c3, 0x40f6, 0x91b6, 0x40e0, 0x91a9,
00572   0x40ca, 0x919d, 0x40b5, 0x9190, 0x409f, 0x9183, 0x4089, 0x9177,
00573   0x4073, 0x916a, 0x405e, 0x915d, 0x4048, 0x9151, 0x4032, 0x9144,
00574   0x401d, 0x9137, 0x4007, 0x912b, 0x3ff1, 0x911e, 0x3fdb, 0x9112,
00575   0x3fc5, 0x9105, 0x3fb0, 0x90f9, 0x3f9a, 0x90ec, 0x3f84, 0x90e0,
00576   0x3f6e, 0x90d3, 0x3f58, 0x90c7, 0x3f43, 0x90ba, 0x3f2d, 0x90ae,
00577   0x3f17, 0x90a1, 0x3f01, 0x9095, 0x3eeb, 0x9089, 0x3ed5, 0x907c,
00578   0x3ebf, 0x9070, 0x3ea9, 0x9064, 0x3e93, 0x9057, 0x3e7d, 0x904b,
00579   0x3e68, 0x903f, 0x3e52, 0x9033, 0x3e3c, 0x9026, 0x3e26, 0x901a,
00580   0x3e10, 0x900e, 0x3dfa, 0x9002, 0x3de4, 0x8ff6, 0x3dce, 0x8fea,
00581   0x3db8, 0x8fdd, 0x3da2, 0x8fd1, 0x3d8c, 0x8fc5, 0x3d76, 0x8fb9,
00582   0x3d60, 0x8fad, 0x3d49, 0x8fa1, 0x3d33, 0x8f95, 0x3d1d, 0x8f89,
00583   0x3d07, 0x8f7d, 0x3cf1, 0x8f71, 0x3cdb, 0x8f65, 0x3cc5, 0x8f59,
00584   0x3caf, 0x8f4d, 0x3c99, 0x8f41, 0x3c83, 0x8f35, 0x3c6c, 0x8f2a,
00585   0x3c56, 0x8f1e, 0x3c40, 0x8f12, 0x3c2a, 0x8f06, 0x3c14, 0x8efa,
00586   0x3bfd, 0x8eee, 0x3be7, 0x8ee3, 0x3bd1, 0x8ed7, 0x3bbb, 0x8ecb,
00587   0x3ba5, 0x8ebf, 0x3b8e, 0x8eb4, 0x3b78, 0x8ea8, 0x3b62, 0x8e9c,
00588   0x3b4c, 0x8e91, 0x3b35, 0x8e85, 0x3b1f, 0x8e7a, 0x3b09, 0x8e6e,
00589   0x3af2, 0x8e62, 0x3adc, 0x8e57, 0x3ac6, 0x8e4b, 0x3aaf, 0x8e40,
00590   0x3a99, 0x8e34, 0x3a83, 0x8e29, 0x3a6c, 0x8e1d, 0x3a56, 0x8e12,
00591   0x3a40, 0x8e06, 0x3a29, 0x8dfb, 0x3a13, 0x8def, 0x39fd, 0x8de4,
00592   0x39e6, 0x8dd9, 0x39d0, 0x8dcd, 0x39b9, 0x8dc2, 0x39a3, 0x8db7,
00593   0x398c, 0x8dab, 0x3976, 0x8da0, 0x395f, 0x8d95, 0x3949, 0x8d8a,
00594   0x3932, 0x8d7e, 0x391c, 0x8d73, 0x3906, 0x8d68, 0x38ef, 0x8d5d,
00595   0x38d8, 0x8d51, 0x38c2, 0x8d46, 0x38ab, 0x8d3b, 0x3895, 0x8d30,
00596   0x387e, 0x8d25, 0x3868, 0x8d1a, 0x3851, 0x8d0f, 0x383b, 0x8d04,
00597   0x3824, 0x8cf9, 0x380d, 0x8cee, 0x37f7, 0x8ce3, 0x37e0, 0x8cd8,
00598   0x37ca, 0x8ccd, 0x37b3, 0x8cc2, 0x379c, 0x8cb7, 0x3786, 0x8cac,
00599   0x376f, 0x8ca1, 0x3758, 0x8c96, 0x3742, 0x8c8b, 0x372b, 0x8c81,
00600   0x3714, 0x8c76, 0x36fe, 0x8c6b, 0x36e7, 0x8c60, 0x36d0, 0x8c55,
00601   0x36ba, 0x8c4b, 0x36a3, 0x8c40, 0x368c, 0x8c35, 0x3675, 0x8c2a,
00602   0x365f, 0x8c20, 0x3648, 0x8c15, 0x3631, 0x8c0a, 0x361a, 0x8c00,
00603   0x3604, 0x8bf5, 0x35ed, 0x8beb, 0x35d6, 0x8be0, 0x35bf, 0x8bd5,
00604   0x35a8, 0x8bcb, 0x3592, 0x8bc0, 0x357b, 0x8bb6, 0x3564, 0x8bab,
00605   0x354d, 0x8ba1, 0x3536, 0x8b96, 0x351f, 0x8b8c, 0x3508, 0x8b82,
00606   0x34f2, 0x8b77, 0x34db, 0x8b6d, 0x34c4, 0x8b62, 0x34ad, 0x8b58,
00607   0x3496, 0x8b4e, 0x347f, 0x8b43, 0x3468, 0x8b39, 0x3451, 0x8b2f,
00608   0x343a, 0x8b25, 0x3423, 0x8b1a, 0x340c, 0x8b10, 0x33f5, 0x8b06,
00609   0x33de, 0x8afc, 0x33c7, 0x8af1, 0x33b0, 0x8ae7, 0x3399, 0x8add,
00610   0x3382, 0x8ad3, 0x336b, 0x8ac9, 0x3354, 0x8abf, 0x333d, 0x8ab5,
00611   0x3326, 0x8aab, 0x330f, 0x8aa1, 0x32f8, 0x8a97, 0x32e1, 0x8a8d,
00612   0x32ca, 0x8a83, 0x32b3, 0x8a79, 0x329c, 0x8a6f, 0x3285, 0x8a65,
00613   0x326e, 0x8a5b, 0x3257, 0x8a51, 0x3240, 0x8a47, 0x3228, 0x8a3d,
00614   0x3211, 0x8a34, 0x31fa, 0x8a2a, 0x31e3, 0x8a20, 0x31cc, 0x8a16,
00615   0x31b5, 0x8a0c, 0x319e, 0x8a03, 0x3186, 0x89f9, 0x316f, 0x89ef,
00616   0x3158, 0x89e5, 0x3141, 0x89dc, 0x312a, 0x89d2, 0x3112, 0x89c8,
00617   0x30fb, 0x89bf, 0x30e4, 0x89b5, 0x30cd, 0x89ac, 0x30b6, 0x89a2,
00618   0x309e, 0x8998, 0x3087, 0x898f, 0x3070, 0x8985, 0x3059, 0x897c,
00619   0x3041, 0x8972, 0x302a, 0x8969, 0x3013, 0x8960, 0x2ffb, 0x8956,
00620   0x2fe4, 0x894d, 0x2fcd, 0x8943, 0x2fb5, 0x893a, 0x2f9e, 0x8931,
00621   0x2f87, 0x8927, 0x2f6f, 0x891e, 0x2f58, 0x8915, 0x2f41, 0x890b,
00622   0x2f29, 0x8902, 0x2f12, 0x88f9, 0x2efb, 0x88f0, 0x2ee3, 0x88e6,
00623   0x2ecc, 0x88dd, 0x2eb5, 0x88d4, 0x2e9d, 0x88cb, 0x2e86, 0x88c2,
00624   0x2e6e, 0x88b9, 0x2e57, 0x88af, 0x2e3f, 0x88a6, 0x2e28, 0x889d,
00625   0x2e11, 0x8894, 0x2df9, 0x888b, 0x2de2, 0x8882, 0x2dca, 0x8879,
00626   0x2db3, 0x8870, 0x2d9b, 0x8867, 0x2d84, 0x885e, 0x2d6c, 0x8855,
00627   0x2d55, 0x884c, 0x2d3d, 0x8844, 0x2d26, 0x883b, 0x2d0e, 0x8832,
00628   0x2cf7, 0x8829, 0x2cdf, 0x8820, 0x2cc8, 0x8817, 0x2cb0, 0x880f,
00629   0x2c98, 0x8806, 0x2c81, 0x87fd, 0x2c69, 0x87f4, 0x2c52, 0x87ec,
00630   0x2c3a, 0x87e3, 0x2c23, 0x87da, 0x2c0b, 0x87d2, 0x2bf3, 0x87c9,
00631   0x2bdc, 0x87c0, 0x2bc4, 0x87b8, 0x2bad, 0x87af, 0x2b95, 0x87a7,
00632   0x2b7d, 0x879e, 0x2b66, 0x8795, 0x2b4e, 0x878d, 0x2b36, 0x8784,
00633   0x2b1f, 0x877c, 0x2b07, 0x8774, 0x2aef, 0x876b, 0x2ad8, 0x8763,
00634   0x2ac0, 0x875a, 0x2aa8, 0x8752, 0x2a91, 0x874a, 0x2a79, 0x8741,
00635   0x2a61, 0x8739, 0x2a49, 0x8731, 0x2a32, 0x8728, 0x2a1a, 0x8720,
00636   0x2a02, 0x8718, 0x29eb, 0x870f, 0x29d3, 0x8707, 0x29bb, 0x86ff,
00637   0x29a3, 0x86f7, 0x298b, 0x86ef, 0x2974, 0x86e7, 0x295c, 0x86de,
00638   0x2944, 0x86d6, 0x292c, 0x86ce, 0x2915, 0x86c6, 0x28fd, 0x86be,
00639   0x28e5, 0x86b6, 0x28cd, 0x86ae, 0x28b5, 0x86a6, 0x289d, 0x869e,
00640   0x2886, 0x8696, 0x286e, 0x868e, 0x2856, 0x8686, 0x283e, 0x867e,
00641   0x2826, 0x8676, 0x280e, 0x866e, 0x27f6, 0x8667, 0x27df, 0x865f,
00642   0x27c7, 0x8657, 0x27af, 0x864f, 0x2797, 0x8647, 0x277f, 0x8640,
00643   0x2767, 0x8638, 0x274f, 0x8630, 0x2737, 0x8628, 0x271f, 0x8621,
00644   0x2707, 0x8619, 0x26ef, 0x8611, 0x26d8, 0x860a, 0x26c0, 0x8602,
00645   0x26a8, 0x85fb, 0x2690, 0x85f3, 0x2678, 0x85eb, 0x2660, 0x85e4,
00646   0x2648, 0x85dc, 0x2630, 0x85d5, 0x2618, 0x85cd, 0x2600, 0x85c6,
00647   0x25e8, 0x85be, 0x25d0, 0x85b7, 0x25b8, 0x85b0, 0x25a0, 0x85a8,
00648   0x2588, 0x85a1, 0x2570, 0x8599, 0x2558, 0x8592, 0x2540, 0x858b,
00649   0x2528, 0x8583, 0x250f, 0x857c, 0x24f7, 0x8575, 0x24df, 0x856e,
00650   0x24c7, 0x8566, 0x24af, 0x855f, 0x2497, 0x8558, 0x247f, 0x8551,
00651   0x2467, 0x854a, 0x244f, 0x8543, 0x2437, 0x853b, 0x241f, 0x8534,
00652   0x2407, 0x852d, 0x23ee, 0x8526, 0x23d6, 0x851f, 0x23be, 0x8518,
00653   0x23a6, 0x8511, 0x238e, 0x850a, 0x2376, 0x8503, 0x235e, 0x84fc,
00654   0x2345, 0x84f5, 0x232d, 0x84ee, 0x2315, 0x84e7, 0x22fd, 0x84e1,
00655   0x22e5, 0x84da, 0x22cd, 0x84d3, 0x22b4, 0x84cc, 0x229c, 0x84c5,
00656   0x2284, 0x84be, 0x226c, 0x84b8, 0x2254, 0x84b1, 0x223b, 0x84aa,
00657   0x2223, 0x84a3, 0x220b, 0x849d, 0x21f3, 0x8496, 0x21da, 0x848f,
00658   0x21c2, 0x8489, 0x21aa, 0x8482, 0x2192, 0x847c, 0x2179, 0x8475,
00659   0x2161, 0x846e, 0x2149, 0x8468, 0x2131, 0x8461, 0x2118, 0x845b,
00660   0x2100, 0x8454, 0x20e8, 0x844e, 0x20d0, 0x8447, 0x20b7, 0x8441,
00661   0x209f, 0x843b, 0x2087, 0x8434, 0x206e, 0x842e, 0x2056, 0x8427,
00662   0x203e, 0x8421, 0x2025, 0x841b, 0x200d, 0x8415, 0x1ff5, 0x840e,
00663   0x1fdc, 0x8408, 0x1fc4, 0x8402, 0x1fac, 0x83fb, 0x1f93, 0x83f5,
00664   0x1f7b, 0x83ef, 0x1f63, 0x83e9, 0x1f4a, 0x83e3, 0x1f32, 0x83dd,
00665   0x1f19, 0x83d7, 0x1f01, 0x83d0, 0x1ee9, 0x83ca, 0x1ed0, 0x83c4,
00666   0x1eb8, 0x83be, 0x1ea0, 0x83b8, 0x1e87, 0x83b2, 0x1e6f, 0x83ac,
00667   0x1e56, 0x83a6, 0x1e3e, 0x83a0, 0x1e25, 0x839a, 0x1e0d, 0x8394,
00668   0x1df5, 0x838f, 0x1ddc, 0x8389, 0x1dc4, 0x8383, 0x1dab, 0x837d,
00669   0x1d93, 0x8377, 0x1d7a, 0x8371, 0x1d62, 0x836c, 0x1d49, 0x8366,
00670   0x1d31, 0x8360, 0x1d18, 0x835a, 0x1d00, 0x8355, 0x1ce8, 0x834f,
00671   0x1ccf, 0x8349, 0x1cb7, 0x8344, 0x1c9e, 0x833e, 0x1c86, 0x8338,
00672   0x1c6d, 0x8333, 0x1c55, 0x832d, 0x1c3c, 0x8328, 0x1c24, 0x8322,
00673   0x1c0b, 0x831d, 0x1bf2, 0x8317, 0x1bda, 0x8312, 0x1bc1, 0x830c,
00674   0x1ba9, 0x8307, 0x1b90, 0x8301, 0x1b78, 0x82fc, 0x1b5f, 0x82f7,
00675   0x1b47, 0x82f1, 0x1b2e, 0x82ec, 0x1b16, 0x82e7, 0x1afd, 0x82e1,
00676   0x1ae4, 0x82dc, 0x1acc, 0x82d7, 0x1ab3, 0x82d1, 0x1a9b, 0x82cc,
00677   0x1a82, 0x82c7, 0x1a6a, 0x82c2, 0x1a51, 0x82bd, 0x1a38, 0x82b7,
00678   0x1a20, 0x82b2, 0x1a07, 0x82ad, 0x19ef, 0x82a8, 0x19d6, 0x82a3,
00679   0x19bd, 0x829e, 0x19a5, 0x8299, 0x198c, 0x8294, 0x1973, 0x828f,
00680   0x195b, 0x828a, 0x1942, 0x8285, 0x192a, 0x8280, 0x1911, 0x827b,
00681   0x18f8, 0x8276, 0x18e0, 0x8271, 0x18c7, 0x826c, 0x18ae, 0x8268,
00682   0x1896, 0x8263, 0x187d, 0x825e, 0x1864, 0x8259, 0x184c, 0x8254,
00683   0x1833, 0x8250, 0x181a, 0x824b, 0x1802, 0x8246, 0x17e9, 0x8241,
00684   0x17d0, 0x823d, 0x17b7, 0x8238, 0x179f, 0x8233, 0x1786, 0x822f,
00685   0x176d, 0x822a, 0x1755, 0x8226, 0x173c, 0x8221, 0x1723, 0x821c,
00686   0x170a, 0x8218, 0x16f2, 0x8213, 0x16d9, 0x820f, 0x16c0, 0x820a,
00687   0x16a8, 0x8206, 0x168f, 0x8201, 0x1676, 0x81fd, 0x165d, 0x81f9,
00688   0x1645, 0x81f4, 0x162c, 0x81f0, 0x1613, 0x81ec, 0x15fa, 0x81e7,
00689   0x15e2, 0x81e3, 0x15c9, 0x81df, 0x15b0, 0x81da, 0x1597, 0x81d6,
00690   0x157f, 0x81d2, 0x1566, 0x81ce, 0x154d, 0x81c9, 0x1534, 0x81c5,
00691   0x151b, 0x81c1, 0x1503, 0x81bd, 0x14ea, 0x81b9, 0x14d1, 0x81b5,
00692   0x14b8, 0x81b1, 0x149f, 0x81ad, 0x1487, 0x81a9, 0x146e, 0x81a5,
00693   0x1455, 0x81a1, 0x143c, 0x819d, 0x1423, 0x8199, 0x140b, 0x8195,
00694   0x13f2, 0x8191, 0x13d9, 0x818d, 0x13c0, 0x8189, 0x13a7, 0x8185,
00695   0x138e, 0x8181, 0x1376, 0x817d, 0x135d, 0x817a, 0x1344, 0x8176,
00696   0x132b, 0x8172, 0x1312, 0x816e, 0x12f9, 0x816b, 0x12e0, 0x8167,
00697   0x12c8, 0x8163, 0x12af, 0x815f, 0x1296, 0x815c, 0x127d, 0x8158,
00698   0x1264, 0x8155, 0x124b, 0x8151, 0x1232, 0x814d, 0x1219, 0x814a,
00699   0x1201, 0x8146, 0x11e8, 0x8143, 0x11cf, 0x813f, 0x11b6, 0x813c,
00700   0x119d, 0x8138, 0x1184, 0x8135, 0x116b, 0x8131, 0x1152, 0x812e,
00701   0x1139, 0x812b, 0x1121, 0x8127, 0x1108, 0x8124, 0x10ef, 0x8121,
00702   0x10d6, 0x811d, 0x10bd, 0x811a, 0x10a4, 0x8117, 0x108b, 0x8113,
00703   0x1072, 0x8110, 0x1059, 0x810d, 0x1040, 0x810a, 0x1027, 0x8107,
00704   0x100e, 0x8103, 0xff5, 0x8100, 0xfdd, 0x80fd, 0xfc4, 0x80fa,
00705   0xfab, 0x80f7, 0xf92, 0x80f4, 0xf79, 0x80f1, 0xf60, 0x80ee,
00706   0xf47, 0x80eb, 0xf2e, 0x80e8, 0xf15, 0x80e5, 0xefc, 0x80e2,
00707   0xee3, 0x80df, 0xeca, 0x80dc, 0xeb1, 0x80d9, 0xe98, 0x80d6,
00708   0xe7f, 0x80d3, 0xe66, 0x80d1, 0xe4d, 0x80ce, 0xe34, 0x80cb,
00709   0xe1b, 0x80c8, 0xe02, 0x80c5, 0xde9, 0x80c3, 0xdd0, 0x80c0,
00710   0xdb7, 0x80bd, 0xd9e, 0x80bb, 0xd85, 0x80b8, 0xd6c, 0x80b5,
00711   0xd53, 0x80b3, 0xd3a, 0x80b0, 0xd21, 0x80ad, 0xd08, 0x80ab,
00712   0xcef, 0x80a8, 0xcd6, 0x80a6, 0xcbd, 0x80a3, 0xca4, 0x80a1,
00713   0xc8b, 0x809e, 0xc72, 0x809c, 0xc59, 0x8099, 0xc40, 0x8097,
00714   0xc27, 0x8095, 0xc0e, 0x8092, 0xbf5, 0x8090, 0xbdc, 0x808e,
00715   0xbc3, 0x808b, 0xbaa, 0x8089, 0xb91, 0x8087, 0xb78, 0x8084,
00716   0xb5f, 0x8082, 0xb46, 0x8080, 0xb2d, 0x807e, 0xb14, 0x807b,
00717   0xafb, 0x8079, 0xae2, 0x8077, 0xac9, 0x8075, 0xab0, 0x8073,
00718   0xa97, 0x8071, 0xa7e, 0x806f, 0xa65, 0x806d, 0xa4c, 0x806b,
00719   0xa33, 0x8069, 0xa19, 0x8067, 0xa00, 0x8065, 0x9e7, 0x8063,
00720   0x9ce, 0x8061, 0x9b5, 0x805f, 0x99c, 0x805d, 0x983, 0x805b,
00721   0x96a, 0x8059, 0x951, 0x8057, 0x938, 0x8056, 0x91f, 0x8054,
00722   0x906, 0x8052, 0x8ed, 0x8050, 0x8d4, 0x804f, 0x8bb, 0x804d,
00723   0x8a2, 0x804b, 0x888, 0x8049, 0x86f, 0x8048, 0x856, 0x8046,
00724   0x83d, 0x8044, 0x824, 0x8043, 0x80b, 0x8041, 0x7f2, 0x8040,
00725   0x7d9, 0x803e, 0x7c0, 0x803d, 0x7a7, 0x803b, 0x78e, 0x803a,
00726   0x775, 0x8038, 0x75b, 0x8037, 0x742, 0x8035, 0x729, 0x8034,
00727   0x710, 0x8032, 0x6f7, 0x8031, 0x6de, 0x8030, 0x6c5, 0x802e,
00728   0x6ac, 0x802d, 0x693, 0x802c, 0x67a, 0x802a, 0x660, 0x8029,
00729   0x647, 0x8028, 0x62e, 0x8027, 0x615, 0x8026, 0x5fc, 0x8024,
00730   0x5e3, 0x8023, 0x5ca, 0x8022, 0x5b1, 0x8021, 0x598, 0x8020,
00731   0x57f, 0x801f, 0x565, 0x801e, 0x54c, 0x801d, 0x533, 0x801c,
00732   0x51a, 0x801b, 0x501, 0x801a, 0x4e8, 0x8019, 0x4cf, 0x8018,
00733   0x4b6, 0x8017, 0x49c, 0x8016, 0x483, 0x8015, 0x46a, 0x8014,
00734   0x451, 0x8013, 0x438, 0x8012, 0x41f, 0x8012, 0x406, 0x8011,
00735   0x3ed, 0x8010, 0x3d4, 0x800f, 0x3ba, 0x800e, 0x3a1, 0x800e,
00736   0x388, 0x800d, 0x36f, 0x800c, 0x356, 0x800c, 0x33d, 0x800b,
00737   0x324, 0x800a, 0x30b, 0x800a, 0x2f1, 0x8009, 0x2d8, 0x8009,
00738   0x2bf, 0x8008, 0x2a6, 0x8008, 0x28d, 0x8007, 0x274, 0x8007,
00739   0x25b, 0x8006, 0x242, 0x8006, 0x228, 0x8005, 0x20f, 0x8005,
00740   0x1f6, 0x8004, 0x1dd, 0x8004, 0x1c4, 0x8004, 0x1ab, 0x8003,
00741   0x192, 0x8003, 0x178, 0x8003, 0x15f, 0x8002, 0x146, 0x8002,
00742   0x12d, 0x8002, 0x114, 0x8002, 0xfb, 0x8001, 0xe2, 0x8001,
00743   0xc9, 0x8001, 0xaf, 0x8001, 0x96, 0x8001, 0x7d, 0x8001,
00744   0x64, 0x8001, 0x4b, 0x8001, 0x32, 0x8001, 0x19, 0x8001,
00745 };
00746
00764 static const q15_t cos_factorsQ15_128[128] = {
00765   0x7fff, 0x7ffa, 0x7ff0, 0x7fe1, 0x7fce, 0x7fb5, 0x7f97, 0x7f75,
00766   0x7f4d, 0x7f21, 0x7ef0, 0x7eba, 0x7e7f, 0x7e3f, 0x7dfa, 0x7db0,
00767   0x7d62, 0x7d0f, 0x7cb7, 0x7c5a, 0x7bf8, 0x7b92, 0x7b26, 0x7ab6,
00768   0x7a42, 0x79c8, 0x794a, 0x78c7, 0x7840, 0x77b4, 0x7723, 0x768e,
00769   0x75f4, 0x7555, 0x74b2, 0x740b, 0x735f, 0x72af, 0x71fa, 0x7141,
00770   0x7083, 0x6fc1, 0x6efb, 0x6e30, 0x6d62, 0x6c8f, 0x6bb8, 0x6adc,
00771   0x69fd, 0x6919, 0x6832, 0x6746, 0x6657, 0x6563, 0x646c, 0x6371,
00772   0x6271, 0x616f, 0x6068, 0x5f5e, 0x5e50, 0x5d3e, 0x5c29, 0x5b10,
00773   0x59f3, 0x58d4, 0x57b0, 0x568a, 0x5560, 0x5433, 0x5302, 0x51ce,
00774   0x5097, 0x4f5e, 0x4e21, 0x4ce1, 0x4b9e, 0x4a58, 0x490f, 0x47c3,
00775   0x4675, 0x4524, 0x43d0, 0x427a, 0x4121, 0x3fc5, 0x3e68, 0x3d07,
00776   0x3ba5, 0x3a40, 0x38d8, 0x376f, 0x3604, 0x3496, 0x3326, 0x31b5,
00777   0x3041, 0x2ecc, 0x2d55, 0x2bdc, 0x2a61, 0x28e5, 0x2767, 0x25e8,
00778   0x2467, 0x22e5, 0x2161, 0x1fdc, 0x1e56, 0x1ccf, 0x1b47, 0x19bd,
00779   0x1833, 0x16a8, 0x151b, 0x138e, 0x1201, 0x1072, 0xee3, 0xd53,
00780   0xbc3, 0xa33, 0x8a2, 0x710, 0x57f, 0x3ed, 0x25b, 0xc9
00781 };
00782
00783 static const q15_t cos_factorsQ15_512[512] = {
00784   0x7fff, 0x7fff, 0x7fff, 0x7ffe, 0x7ffc, 0x7ffb, 0x7ff9, 0x7ff7,
00785   0x7ff4, 0x7ff2, 0x7fee, 0x7feb, 0x7fe7, 0x7fe3, 0x7fdf, 0x7fda,
00786   0x7fd6, 0x7fd0, 0x7fcb, 0x7fc5, 0x7fbf, 0x7fb8, 0x7fb1, 0x7faa,
00787   0x7fa3, 0x7f9b, 0x7f93, 0x7f8b, 0x7f82, 0x7f79, 0x7f70, 0x7f67,
00788   0x7f5d, 0x7f53, 0x7f48, 0x7f3d, 0x7f32, 0x7f27, 0x7f1b, 0x7f0f,
00789   0x7f03, 0x7ef6, 0x7ee9, 0x7edc, 0x7ecf, 0x7ec1, 0x7eb3, 0x7ea4,
00790   0x7e95, 0x7e86, 0x7e77, 0x7e67, 0x7e57, 0x7e47, 0x7e37, 0x7e26,
00791   0x7e14, 0x7e03, 0x7df1, 0x7ddf, 0x7dcd, 0x7dba, 0x7da7, 0x7d94,
00792   0x7d80, 0x7d6c, 0x7d58, 0x7d43, 0x7d2f, 0x7d19, 0x7d04, 0x7cee,
00793   0x7cd8, 0x7cc2, 0x7cab, 0x7c94, 0x7c7d, 0x7c66, 0x7c4e, 0x7c36,
00794   0x7c1d, 0x7c05, 0x7beb, 0x7bd2, 0x7bb9, 0x7b9f, 0x7b84, 0x7b6a,
00795   0x7b4f, 0x7b34, 0x7b19, 0x7afd, 0x7ae1, 0x7ac5, 0x7aa8, 0x7a8b,
00796   0x7a6e, 0x7a50, 0x7a33, 0x7a15, 0x79f6, 0x79d8, 0x79b9, 0x7999,
00797   0x797a, 0x795a, 0x793a, 0x7919, 0x78f9, 0x78d8, 0x78b6, 0x7895,
00798   0x7873, 0x7851, 0x782e, 0x780c, 0x77e9, 0x77c5, 0x77a2, 0x777e,
00799   0x775a, 0x7735, 0x7710, 0x76eb, 0x76c6, 0x76a0, 0x767b, 0x7654,
00800   0x762e, 0x7607, 0x75e0, 0x75b9, 0x7591, 0x7569, 0x7541, 0x7519,
00801   0x74f0, 0x74c7, 0x749e, 0x7474, 0x744a, 0x7420, 0x73f6, 0x73cb,
00802   0x73a0, 0x7375, 0x7349, 0x731d, 0x72f1, 0x72c5, 0x7298, 0x726b,
00803   0x723e, 0x7211, 0x71e3, 0x71b5, 0x7186, 0x7158, 0x7129, 0x70fa,
00804   0x70cb, 0x709b, 0x706b, 0x703b, 0x700a, 0x6fda, 0x6fa9, 0x6f77,
00805   0x6f46, 0x6f14, 0x6ee2, 0x6eaf, 0x6e7d, 0x6e4a, 0x6e17, 0x6de3,
00806   0x6db0, 0x6d7c, 0x6d48, 0x6d13, 0x6cde, 0x6ca9, 0x6c74, 0x6c3f,
00807   0x6c09, 0x6bd3, 0x6b9c, 0x6b66, 0x6b2f, 0x6af8, 0x6ac1, 0x6a89,
00808   0x6a51, 0x6a19, 0x69e1, 0x69a8, 0x696f, 0x6936, 0x68fd, 0x68c3,
00809   0x6889, 0x684f, 0x6815, 0x67da, 0x679f, 0x6764, 0x6729, 0x66ed,
00810   0x66b1, 0x6675, 0x6639, 0x65fc, 0x65bf, 0x6582, 0x6545, 0x6507,
00811   0x64c9, 0x648b, 0x644d, 0x640e, 0x63cf, 0x6390, 0x6351, 0x6311,
00812   0x62d2, 0x6292, 0x6251, 0x6211, 0x61d0, 0x618f, 0x614e, 0x610d,
00813   0x60cb, 0x6089, 0x6047, 0x6004, 0x5fc2, 0x5f7f, 0x5f3c, 0x5ef9,
00814   0x5eb5, 0x5e71, 0x5e2d, 0x5de9, 0x5da5, 0x5d60, 0x5d1b, 0x5cd6,
00815   0x5c91, 0x5c4b, 0x5c06, 0x5bc0, 0x5b79, 0x5b33, 0x5aec, 0x5aa5,
00816   0x5a5e, 0x5a17, 0x59d0, 0x5988, 0x5940, 0x58f8, 0x58af, 0x5867,
00817   0x581e, 0x57d5, 0x578c, 0x5742, 0x56f9, 0x56af, 0x5665, 0x561a,
00818   0x55d0, 0x5585, 0x553a, 0x54ef, 0x54a4, 0x5458, 0x540d, 0x53c1,
00819   0x5375, 0x5328, 0x52dc, 0x528f, 0x5242, 0x51f5, 0x51a8, 0x515a,
00820   0x510c, 0x50bf, 0x5070, 0x5022, 0x4fd4, 0x4f85, 0x4f36, 0x4ee7,
00821   0x4e98, 0x4e48, 0x4df9, 0x4da9, 0x4d59, 0x4d09, 0x4cb8, 0x4c68,
00822   0x4c17, 0x4bc6, 0x4b75, 0x4b24, 0x4ad2, 0x4a81, 0x4a2f, 0x49dd,
00823   0x498a, 0x4938, 0x48e6, 0x4893, 0x4840, 0x47ed, 0x479a, 0x4746,
00824   0x46f3, 0x469f, 0x464b, 0x45f7, 0x45a3, 0x454e, 0x44fa, 0x44a5,
00825   0x4450, 0x43fb, 0x43a5, 0x4350, 0x42fa, 0x42a5, 0x424f, 0x41f9,
00826   0x41a2, 0x414c, 0x40f6, 0x409f, 0x4048, 0x3ff1, 0x3f9a, 0x3f43,
00827   0x3eeb, 0x3e93, 0x3e3c, 0x3de4, 0x3d8c, 0x3d33, 0x3cdb, 0x3c83,
00828   0x3c2a, 0x3bd1, 0x3b78, 0x3b1f, 0x3ac6, 0x3a6c, 0x3a13, 0x39b9,
00829   0x395f, 0x3906, 0x38ab, 0x3851, 0x37f7, 0x379c, 0x3742, 0x36e7,
00830   0x368c, 0x3631, 0x35d6, 0x357b, 0x351f, 0x34c4, 0x3468, 0x340c,
00831   0x33b0, 0x3354, 0x32f8, 0x329c, 0x3240, 0x31e3, 0x3186, 0x312a,
00832   0x30cd, 0x3070, 0x3013, 0x2fb5, 0x2f58, 0x2efb, 0x2e9d, 0x2e3f,
00833   0x2de2, 0x2d84, 0x2d26, 0x2cc8, 0x2c69, 0x2c0b, 0x2bad, 0x2b4e,
00834   0x2aef, 0x2a91, 0x2a32, 0x29d3, 0x2974, 0x2915, 0x28b5, 0x2856,
00835   0x27f6, 0x2797, 0x2737, 0x26d8, 0x2678, 0x2618, 0x25b8, 0x2558,
00836   0x24f7, 0x2497, 0x2437, 0x23d6, 0x2376, 0x2315, 0x22b4, 0x2254,
00837   0x21f3, 0x2192, 0x2131, 0x20d0, 0x206e, 0x200d, 0x1fac, 0x1f4a,
00838   0x1ee9, 0x1e87, 0x1e25, 0x1dc4, 0x1d62, 0x1d00, 0x1c9e, 0x1c3c,
00839   0x1bda, 0x1b78, 0x1b16, 0x1ab3, 0x1a51, 0x19ef, 0x198c, 0x192a,
00840   0x18c7, 0x1864, 0x1802, 0x179f, 0x173c, 0x16d9, 0x1676, 0x1613,
00841   0x15b0, 0x154d, 0x14ea, 0x1487, 0x1423, 0x13c0, 0x135d, 0x12f9,
00842   0x1296, 0x1232, 0x11cf, 0x116b, 0x1108, 0x10a4, 0x1040, 0xfdd,
00843   0xf79, 0xf15, 0xeb1, 0xe4d, 0xde9, 0xd85, 0xd21, 0xcbd,
00844   0xc59, 0xbf5, 0xb91, 0xb2d, 0xac9, 0xa65, 0xa00, 0x99c,
00845   0x938, 0x8d4, 0x86f, 0x80b, 0x7a7, 0x742, 0x6de, 0x67a,
00846   0x615, 0x5b1, 0x54c, 0x4e8, 0x483, 0x41f, 0x3ba, 0x356,
00847   0x2f1, 0x28d, 0x228, 0x1c4, 0x15f, 0xfb, 0x96, 0x32,
00848 };
00849
00850 static const q15_t cos_factorsQ15_2048[2048] = {
00851   0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
00852   0x7fff, 0x7fff, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffd, 0x7ffd,
00853   0x7ffd, 0x7ffd, 0x7ffc, 0x7ffc, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffa,
00854   0x7ffa, 0x7ff9, 0x7ff9, 0x7ff8, 0x7ff8, 0x7ff7, 0x7ff7, 0x7ff6,
00855   0x7ff5, 0x7ff5, 0x7ff4, 0x7ff3, 0x7ff3, 0x7ff2, 0x7ff1, 0x7ff0,
00856   0x7ff0, 0x7fef, 0x7fee, 0x7fed, 0x7fec, 0x7fec, 0x7feb, 0x7fea,
00857   0x7fe9, 0x7fe8, 0x7fe7, 0x7fe6, 0x7fe5, 0x7fe4, 0x7fe3, 0x7fe2,
00858   0x7fe1, 0x7fe0, 0x7fdf, 0x7fdd, 0x7fdc, 0x7fdb, 0x7fda, 0x7fd9,
00859   0x7fd7, 0x7fd6, 0x7fd5, 0x7fd4, 0x7fd2, 0x7fd1, 0x7fd0, 0x7fce,
00860   0x7fcd, 0x7fcb, 0x7fca, 0x7fc9, 0x7fc7, 0x7fc6, 0x7fc4, 0x7fc3,
00861   0x7fc1, 0x7fc0, 0x7fbe, 0x7fbc, 0x7fbb, 0x7fb9, 0x7fb7, 0x7fb6,
00862   0x7fb4, 0x7fb2, 0x7fb1, 0x7faf, 0x7fad, 0x7fab, 0x7fa9, 0x7fa8,
00863   0x7fa6, 0x7fa4, 0x7fa2, 0x7fa0, 0x7f9e, 0x7f9c, 0x7f9a, 0x7f98,
00864   0x7f96, 0x7f94, 0x7f92, 0x7f90, 0x7f8e, 0x7f8c, 0x7f8a, 0x7f88,
00865   0x7f86, 0x7f83, 0x7f81, 0x7f7f, 0x7f7d, 0x7f7b, 0x7f78, 0x7f76,
00866   0x7f74, 0x7f71, 0x7f6f, 0x7f6d, 0x7f6a, 0x7f68, 0x7f65, 0x7f63,
00867   0x7f60, 0x7f5e, 0x7f5b, 0x7f59, 0x7f56, 0x7f54, 0x7f51, 0x7f4f,
00868   0x7f4c, 0x7f49, 0x7f47, 0x7f44, 0x7f41, 0x7f3f, 0x7f3c, 0x7f39,
00869   0x7f36, 0x7f34, 0x7f31, 0x7f2e, 0x7f2b, 0x7f28, 0x7f25, 0x7f23,
00870   0x7f20, 0x7f1d, 0x7f1a, 0x7f17, 0x7f14, 0x7f11, 0x7f0e, 0x7f0b,
00871   0x7f08, 0x7f04, 0x7f01, 0x7efe, 0x7efb, 0x7ef8, 0x7ef5, 0x7ef1,
00872   0x7eee, 0x7eeb, 0x7ee8, 0x7ee4, 0x7ee1, 0x7ede, 0x7eda, 0x7ed7,
00873   0x7ed4, 0x7ed0, 0x7ecd, 0x7ec9, 0x7ec6, 0x7ec3, 0x7ebf, 0x7ebb,
00874   0x7eb8, 0x7eb4, 0x7eb1, 0x7ead, 0x7eaa, 0x7ea6, 0x7ea2, 0x7e9f,
00875   0x7e9b, 0x7e97, 0x7e94, 0x7e90, 0x7e8c, 0x7e88, 0x7e84, 0x7e81,
00876   0x7e7d, 0x7e79, 0x7e75, 0x7e71, 0x7e6d, 0x7e69, 0x7e65, 0x7e61,
00877   0x7e5d, 0x7e59, 0x7e55, 0x7e51, 0x7e4d, 0x7e49, 0x7e45, 0x7e41,
00878   0x7e3d, 0x7e39, 0x7e34, 0x7e30, 0x7e2c, 0x7e28, 0x7e24, 0x7e1f,
00879   0x7e1b, 0x7e17, 0x7e12, 0x7e0e, 0x7e0a, 0x7e05, 0x7e01, 0x7dfc,
00880   0x7df8, 0x7df3, 0x7def, 0x7dea, 0x7de6, 0x7de1, 0x7ddd, 0x7dd8,
00881   0x7dd4, 0x7dcf, 0x7dca, 0x7dc6, 0x7dc1, 0x7dbc, 0x7db8, 0x7db3,
00882   0x7dae, 0x7da9, 0x7da5, 0x7da0, 0x7d9b, 0x7d96, 0x7d91, 0x7d8c,
00883   0x7d87, 0x7d82, 0x7d7e, 0x7d79, 0x7d74, 0x7d6f, 0x7d6a, 0x7d65,
00884   0x7d60, 0x7d5a, 0x7d55, 0x7d50, 0x7d4b, 0x7d46, 0x7d41, 0x7d3c,
00885   0x7d36, 0x7d31, 0x7d2c, 0x7d27, 0x7d21, 0x7d1c, 0x7d17, 0x7d11,
00886   0x7d0c, 0x7d07, 0x7d01, 0x7cfc, 0x7cf6, 0x7cf1, 0x7cec, 0x7ce6,
00887   0x7ce1, 0x7cdb, 0x7cd5, 0x7cd0, 0x7cca, 0x7cc5, 0x7cbf, 0x7cb9,
00888   0x7cb4, 0x7cae, 0x7ca8, 0x7ca3, 0x7c9d, 0x7c97, 0x7c91, 0x7c8c,
00889   0x7c86, 0x7c80, 0x7c7a, 0x7c74, 0x7c6e, 0x7c69, 0x7c63, 0x7c5d,
00890   0x7c57, 0x7c51, 0x7c4b, 0x7c45, 0x7c3f, 0x7c39, 0x7c33, 0x7c2d,
00891   0x7c26, 0x7c20, 0x7c1a, 0x7c14, 0x7c0e, 0x7c08, 0x7c01, 0x7bfb,
00892   0x7bf5, 0x7bef, 0x7be8, 0x7be2, 0x7bdc, 0x7bd5, 0x7bcf, 0x7bc9,
00893   0x7bc2, 0x7bbc, 0x7bb5, 0x7baf, 0x7ba8, 0x7ba2, 0x7b9b, 0x7b95,
00894   0x7b8e, 0x7b88, 0x7b81, 0x7b7a, 0x7b74, 0x7b6d, 0x7b67, 0x7b60,
00895   0x7b59, 0x7b52, 0x7b4c, 0x7b45, 0x7b3e, 0x7b37, 0x7b31, 0x7b2a,
00896   0x7b23, 0x7b1c, 0x7b15, 0x7b0e, 0x7b07, 0x7b00, 0x7af9, 0x7af2,
00897   0x7aeb, 0x7ae4, 0x7add, 0x7ad6, 0x7acf, 0x7ac8, 0x7ac1, 0x7aba,
00898   0x7ab3, 0x7aac, 0x7aa4, 0x7a9d, 0x7a96, 0x7a8f, 0x7a87, 0x7a80,
00899   0x7a79, 0x7a72, 0x7a6a, 0x7a63, 0x7a5c, 0x7a54, 0x7a4d, 0x7a45,
00900   0x7a3e, 0x7a36, 0x7a2f, 0x7a27, 0x7a20, 0x7a18, 0x7a11, 0x7a09,
00901   0x7a02, 0x79fa, 0x79f2, 0x79eb, 0x79e3, 0x79db, 0x79d4, 0x79cc,
00902   0x79c4, 0x79bc, 0x79b5, 0x79ad, 0x79a5, 0x799d, 0x7995, 0x798e,
00903   0x7986, 0x797e, 0x7976, 0x796e, 0x7966, 0x795e, 0x7956, 0x794e,
00904   0x7946, 0x793e, 0x7936, 0x792e, 0x7926, 0x791e, 0x7915, 0x790d,
00905   0x7905, 0x78fd, 0x78f5, 0x78ec, 0x78e4, 0x78dc, 0x78d4, 0x78cb,
00906   0x78c3, 0x78bb, 0x78b2, 0x78aa, 0x78a2, 0x7899, 0x7891, 0x7888,
00907   0x7880, 0x7877, 0x786f, 0x7866, 0x785e, 0x7855, 0x784d, 0x7844,
00908   0x783b, 0x7833, 0x782a, 0x7821, 0x7819, 0x7810, 0x7807, 0x77ff,
00909   0x77f6, 0x77ed, 0x77e4, 0x77db, 0x77d3, 0x77ca, 0x77c1, 0x77b8,
00910   0x77af, 0x77a6, 0x779d, 0x7794, 0x778b, 0x7782, 0x7779, 0x7770,
00911   0x7767, 0x775e, 0x7755, 0x774c, 0x7743, 0x773a, 0x7731, 0x7727,
00912   0x771e, 0x7715, 0x770c, 0x7703, 0x76f9, 0x76f0, 0x76e7, 0x76dd,
00913   0x76d4, 0x76cb, 0x76c1, 0x76b8, 0x76af, 0x76a5, 0x769c, 0x7692,
00914   0x7689, 0x767f, 0x7676, 0x766c, 0x7663, 0x7659, 0x7650, 0x7646,
00915   0x763c, 0x7633, 0x7629, 0x761f, 0x7616, 0x760c, 0x7602, 0x75f9,
00916   0x75ef, 0x75e5, 0x75db, 0x75d1, 0x75c8, 0x75be, 0x75b4, 0x75aa,
00917   0x75a0, 0x7596, 0x758c, 0x7582, 0x7578, 0x756e, 0x7564, 0x755a,
00918   0x7550, 0x7546, 0x753c, 0x7532, 0x7528, 0x751e, 0x7514, 0x7509,
00919   0x74ff, 0x74f5, 0x74eb, 0x74e1, 0x74d6, 0x74cc, 0x74c2, 0x74b7,
00920   0x74ad, 0x74a3, 0x7498, 0x748e, 0x7484, 0x7479, 0x746f, 0x7464,
00921   0x745a, 0x744f, 0x7445, 0x743a, 0x7430, 0x7425, 0x741b, 0x7410,
00922   0x7406, 0x73fb, 0x73f0, 0x73e6, 0x73db, 0x73d0, 0x73c6, 0x73bb,
00923   0x73b0, 0x73a5, 0x739b, 0x7390, 0x7385, 0x737a, 0x736f, 0x7364,
00924   0x7359, 0x734f, 0x7344, 0x7339, 0x732e, 0x7323, 0x7318, 0x730d,
00925   0x7302, 0x72f7, 0x72ec, 0x72e1, 0x72d5, 0x72ca, 0x72bf, 0x72b4,
00926   0x72a9, 0x729e, 0x7293, 0x7287, 0x727c, 0x7271, 0x7266, 0x725a,
00927   0x724f, 0x7244, 0x7238, 0x722d, 0x7222, 0x7216, 0x720b, 0x71ff,
00928   0x71f4, 0x71e9, 0x71dd, 0x71d2, 0x71c6, 0x71bb, 0x71af, 0x71a3,
00929   0x7198, 0x718c, 0x7181, 0x7175, 0x7169, 0x715e, 0x7152, 0x7146,
00930   0x713b, 0x712f, 0x7123, 0x7117, 0x710c, 0x7100, 0x70f4, 0x70e8,
00931   0x70dc, 0x70d1, 0x70c5, 0x70b9, 0x70ad, 0x70a1, 0x7095, 0x7089,
00932   0x707d, 0x7071, 0x7065, 0x7059, 0x704d, 0x7041, 0x7035, 0x7029,
00933   0x701d, 0x7010, 0x7004, 0x6ff8, 0x6fec, 0x6fe0, 0x6fd3, 0x6fc7,
00934   0x6fbb, 0x6faf, 0x6fa2, 0x6f96, 0x6f8a, 0x6f7d, 0x6f71, 0x6f65,
00935   0x6f58, 0x6f4c, 0x6f3f, 0x6f33, 0x6f27, 0x6f1a, 0x6f0e, 0x6f01,
00936   0x6ef5, 0x6ee8, 0x6edc, 0x6ecf, 0x6ec2, 0x6eb6, 0x6ea9, 0x6e9c,
00937   0x6e90, 0x6e83, 0x6e76, 0x6e6a, 0x6e5d, 0x6e50, 0x6e44, 0x6e37,
00938   0x6e2a, 0x6e1d, 0x6e10, 0x6e04, 0x6df7, 0x6dea, 0x6ddd, 0x6dd0,
00939   0x6dc3, 0x6db6, 0x6da9, 0x6d9c, 0x6d8f, 0x6d82, 0x6d75, 0x6d68,
00940   0x6d5b, 0x6d4e, 0x6d41, 0x6d34, 0x6d27, 0x6d1a, 0x6d0c, 0x6cff,
00941   0x6cf2, 0x6ce5, 0x6cd8, 0x6cca, 0x6cbd, 0x6cb0, 0x6ca3, 0x6c95,
00942   0x6c88, 0x6c7b, 0x6c6d, 0x6c60, 0x6c53, 0x6c45, 0x6c38, 0x6c2a,
00943   0x6c1d, 0x6c0f, 0x6c02, 0x6bf5, 0x6be7, 0x6bd9, 0x6bcc, 0x6bbe,
00944   0x6bb1, 0x6ba3, 0x6b96, 0x6b88, 0x6b7a, 0x6b6d, 0x6b5f, 0x6b51,
00945   0x6b44, 0x6b36, 0x6b28, 0x6b1a, 0x6b0d, 0x6aff, 0x6af1, 0x6ae3,
00946   0x6ad5, 0x6ac8, 0x6aba, 0x6aac, 0x6a9e, 0x6a90, 0x6a82, 0x6a74,
00947   0x6a66, 0x6a58, 0x6a4a, 0x6a3c, 0x6a2e, 0x6a20, 0x6a12, 0x6a04,
00948   0x69f6, 0x69e8, 0x69da, 0x69cb, 0x69bd, 0x69af, 0x69a1, 0x6993,
00949   0x6985, 0x6976, 0x6968, 0x695a, 0x694b, 0x693d, 0x692f, 0x6921,
00950   0x6912, 0x6904, 0x68f5, 0x68e7, 0x68d9, 0x68ca, 0x68bc, 0x68ad,
00951   0x689f, 0x6890, 0x6882, 0x6873, 0x6865, 0x6856, 0x6848, 0x6839,
00952   0x682b, 0x681c, 0x680d, 0x67ff, 0x67f0, 0x67e1, 0x67d3, 0x67c4,
00953   0x67b5, 0x67a6, 0x6798, 0x6789, 0x677a, 0x676b, 0x675d, 0x674e,
00954   0x673f, 0x6730, 0x6721, 0x6712, 0x6703, 0x66f4, 0x66e5, 0x66d6,
00955   0x66c8, 0x66b9, 0x66aa, 0x669b, 0x668b, 0x667c, 0x666d, 0x665e,
00956   0x664f, 0x6640, 0x6631, 0x6622, 0x6613, 0x6603, 0x65f4, 0x65e5,
00957   0x65d6, 0x65c7, 0x65b7, 0x65a8, 0x6599, 0x658a, 0x657a, 0x656b,
00958   0x655c, 0x654c, 0x653d, 0x652d, 0x651e, 0x650f, 0x64ff, 0x64f0,
00959   0x64e0, 0x64d1, 0x64c1, 0x64b2, 0x64a2, 0x6493, 0x6483, 0x6474,
00960   0x6464, 0x6454, 0x6445, 0x6435, 0x6426, 0x6416, 0x6406, 0x63f7,
00961   0x63e7, 0x63d7, 0x63c7, 0x63b8, 0x63a8, 0x6398, 0x6388, 0x6378,
00962   0x6369, 0x6359, 0x6349, 0x6339, 0x6329, 0x6319, 0x6309, 0x62f9,
00963   0x62ea, 0x62da, 0x62ca, 0x62ba, 0x62aa, 0x629a, 0x628a, 0x627a,
00964   0x6269, 0x6259, 0x6249, 0x6239, 0x6229, 0x6219, 0x6209, 0x61f9,
00965   0x61e8, 0x61d8, 0x61c8, 0x61b8, 0x61a8, 0x6197, 0x6187, 0x6177,
00966   0x6166, 0x6156, 0x6146, 0x6135, 0x6125, 0x6115, 0x6104, 0x60f4,
00967   0x60e4, 0x60d3, 0x60c3, 0x60b2, 0x60a2, 0x6091, 0x6081, 0x6070,
00968   0x6060, 0x604f, 0x603f, 0x602e, 0x601d, 0x600d, 0x5ffc, 0x5fec,
00969   0x5fdb, 0x5fca, 0x5fba, 0x5fa9, 0x5f98, 0x5f87, 0x5f77, 0x5f66,
00970   0x5f55, 0x5f44, 0x5f34, 0x5f23, 0x5f12, 0x5f01, 0x5ef0, 0x5edf,
00971   0x5ecf, 0x5ebe, 0x5ead, 0x5e9c, 0x5e8b, 0x5e7a, 0x5e69, 0x5e58,
00972   0x5e47, 0x5e36, 0x5e25, 0x5e14, 0x5e03, 0x5df2, 0x5de1, 0x5dd0,
00973   0x5dbf, 0x5dad, 0x5d9c, 0x5d8b, 0x5d7a, 0x5d69, 0x5d58, 0x5d46,
00974   0x5d35, 0x5d24, 0x5d13, 0x5d01, 0x5cf0, 0x5cdf, 0x5cce, 0x5cbc,
00975   0x5cab, 0x5c9a, 0x5c88, 0x5c77, 0x5c66, 0x5c54, 0x5c43, 0x5c31,
00976   0x5c20, 0x5c0e, 0x5bfd, 0x5beb, 0x5bda, 0x5bc8, 0x5bb7, 0x5ba5,
00977   0x5b94, 0x5b82, 0x5b71, 0x5b5f, 0x5b4d, 0x5b3c, 0x5b2a, 0x5b19,
00978   0x5b07, 0x5af5, 0x5ae4, 0x5ad2, 0x5ac0, 0x5aae, 0x5a9d, 0x5a8b,
00979   0x5a79, 0x5a67, 0x5a56, 0x5a44, 0x5a32, 0x5a20, 0x5a0e, 0x59fc,
00980   0x59ea, 0x59d9, 0x59c7, 0x59b5, 0x59a3, 0x5991, 0x597f, 0x596d,
00981   0x595b, 0x5949, 0x5937, 0x5925, 0x5913, 0x5901, 0x58ef, 0x58dd,
00982   0x58cb, 0x58b8, 0x58a6, 0x5894, 0x5882, 0x5870, 0x585e, 0x584b,
00983   0x5839, 0x5827, 0x5815, 0x5803, 0x57f0, 0x57de, 0x57cc, 0x57b9,
00984   0x57a7, 0x5795, 0x5783, 0x5770, 0x575e, 0x574b, 0x5739, 0x5727,
00985   0x5714, 0x5702, 0x56ef, 0x56dd, 0x56ca, 0x56b8, 0x56a5, 0x5693,
00986   0x5680, 0x566e, 0x565b, 0x5649, 0x5636, 0x5624, 0x5611, 0x55fe,
00987   0x55ec, 0x55d9, 0x55c7, 0x55b4, 0x55a1, 0x558f, 0x557c, 0x5569,
00988   0x5556, 0x5544, 0x5531, 0x551e, 0x550b, 0x54f9, 0x54e6, 0x54d3,
00989   0x54c0, 0x54ad, 0x549a, 0x5488, 0x5475, 0x5462, 0x544f, 0x543c,
00990   0x5429, 0x5416, 0x5403, 0x53f0, 0x53dd, 0x53ca, 0x53b7, 0x53a4,
00991   0x5391, 0x537e, 0x536b, 0x5358, 0x5345, 0x5332, 0x531f, 0x530c,
00992   0x52f8, 0x52e5, 0x52d2, 0x52bf, 0x52ac, 0x5299, 0x5285, 0x5272,
00993   0x525f, 0x524c, 0x5238, 0x5225, 0x5212, 0x51ff, 0x51eb, 0x51d8,
00994   0x51c5, 0x51b1, 0x519e, 0x518b, 0x5177, 0x5164, 0x5150, 0x513d,
00995   0x512a, 0x5116, 0x5103, 0x50ef, 0x50dc, 0x50c8, 0x50b5, 0x50a1,
00996   0x508e, 0x507a, 0x5067, 0x5053, 0x503f, 0x502c, 0x5018, 0x5005,
00997   0x4ff1, 0x4fdd, 0x4fca, 0x4fb6, 0x4fa2, 0x4f8f, 0x4f7b, 0x4f67,
00998   0x4f54, 0x4f40, 0x4f2c, 0x4f18, 0x4f05, 0x4ef1, 0x4edd, 0x4ec9,
00999   0x4eb6, 0x4ea2, 0x4e8e, 0x4e7a, 0x4e66, 0x4e52, 0x4e3e, 0x4e2a,
01000   0x4e17, 0x4e03, 0x4def, 0x4ddb, 0x4dc7, 0x4db3, 0x4d9f, 0x4d8b,
01001   0x4d77, 0x4d63, 0x4d4f, 0x4d3b, 0x4d27, 0x4d13, 0x4cff, 0x4ceb,
01002   0x4cd6, 0x4cc2, 0x4cae, 0x4c9a, 0x4c86, 0x4c72, 0x4c5e, 0x4c49,
01003   0x4c35, 0x4c21, 0x4c0d, 0x4bf9, 0x4be4, 0x4bd0, 0x4bbc, 0x4ba8,
01004   0x4b93, 0x4b7f, 0x4b6b, 0x4b56, 0x4b42, 0x4b2e, 0x4b19, 0x4b05,
01005   0x4af1, 0x4adc, 0x4ac8, 0x4ab4, 0x4a9f, 0x4a8b, 0x4a76, 0x4a62,
01006   0x4a4d, 0x4a39, 0x4a24, 0x4a10, 0x49fb, 0x49e7, 0x49d2, 0x49be,
01007   0x49a9, 0x4995, 0x4980, 0x496c, 0x4957, 0x4942, 0x492e, 0x4919,
01008   0x4905, 0x48f0, 0x48db, 0x48c7, 0x48b2, 0x489d, 0x4888, 0x4874,
01009   0x485f, 0x484a, 0x4836, 0x4821, 0x480c, 0x47f7, 0x47e2, 0x47ce,
01010   0x47b9, 0x47a4, 0x478f, 0x477a, 0x4765, 0x4751, 0x473c, 0x4727,
01011   0x4712, 0x46fd, 0x46e8, 0x46d3, 0x46be, 0x46a9, 0x4694, 0x467f,
01012   0x466a, 0x4655, 0x4640, 0x462b, 0x4616, 0x4601, 0x45ec, 0x45d7,
01013   0x45c2, 0x45ad, 0x4598, 0x4583, 0x456e, 0x4559, 0x4544, 0x452e,
01014   0x4519, 0x4504, 0x44ef, 0x44da, 0x44c5, 0x44af, 0x449a, 0x4485,
01015   0x4470, 0x445a, 0x4445, 0x4430, 0x441b, 0x4405, 0x43f0, 0x43db,
01016   0x43c5, 0x43b0, 0x439b, 0x4385, 0x4370, 0x435b, 0x4345, 0x4330,
01017   0x431b, 0x4305, 0x42f0, 0x42da, 0x42c5, 0x42af, 0x429a, 0x4284,
01018   0x426f, 0x425a, 0x4244, 0x422f, 0x4219, 0x4203, 0x41ee, 0x41d8,
01019   0x41c3, 0x41ad, 0x4198, 0x4182, 0x416d, 0x4157, 0x4141, 0x412c,
01020   0x4116, 0x4100, 0x40eb, 0x40d5, 0x40bf, 0x40aa, 0x4094, 0x407e,
01021   0x4069, 0x4053, 0x403d, 0x4027, 0x4012, 0x3ffc, 0x3fe6, 0x3fd0,
01022   0x3fbb, 0x3fa5, 0x3f8f, 0x3f79, 0x3f63, 0x3f4d, 0x3f38, 0x3f22,
01023   0x3f0c, 0x3ef6, 0x3ee0, 0x3eca, 0x3eb4, 0x3e9e, 0x3e88, 0x3e73,
01024   0x3e5d, 0x3e47, 0x3e31, 0x3e1b, 0x3e05, 0x3def, 0x3dd9, 0x3dc3,
01025   0x3dad, 0x3d97, 0x3d81, 0x3d6b, 0x3d55, 0x3d3e, 0x3d28, 0x3d12,
01026   0x3cfc, 0x3ce6, 0x3cd0, 0x3cba, 0x3ca4, 0x3c8e, 0x3c77, 0x3c61,
01027   0x3c4b, 0x3c35, 0x3c1f, 0x3c09, 0x3bf2, 0x3bdc, 0x3bc6, 0x3bb0,
01028   0x3b99, 0x3b83, 0x3b6d, 0x3b57, 0x3b40, 0x3b2a, 0x3b14, 0x3afe,
01029   0x3ae7, 0x3ad1, 0x3abb, 0x3aa4, 0x3a8e, 0x3a78, 0x3a61, 0x3a4b,
01030   0x3a34, 0x3a1e, 0x3a08, 0x39f1, 0x39db, 0x39c4, 0x39ae, 0x3998,
01031   0x3981, 0x396b, 0x3954, 0x393e, 0x3927, 0x3911, 0x38fa, 0x38e4,
01032   0x38cd, 0x38b7, 0x38a0, 0x388a, 0x3873, 0x385d, 0x3846, 0x382f,
01033   0x3819, 0x3802, 0x37ec, 0x37d5, 0x37be, 0x37a8, 0x3791, 0x377a,
01034   0x3764, 0x374d, 0x3736, 0x3720, 0x3709, 0x36f2, 0x36dc, 0x36c5,
01035   0x36ae, 0x3698, 0x3681, 0x366a, 0x3653, 0x363d, 0x3626, 0x360f,
01036   0x35f8, 0x35e1, 0x35cb, 0x35b4, 0x359d, 0x3586, 0x356f, 0x3558,
01037   0x3542, 0x352b, 0x3514, 0x34fd, 0x34e6, 0x34cf, 0x34b8, 0x34a1,
01038   0x348b, 0x3474, 0x345d, 0x3446, 0x342f, 0x3418, 0x3401, 0x33ea,
01039   0x33d3, 0x33bc, 0x33a5, 0x338e, 0x3377, 0x3360, 0x3349, 0x3332,
01040   0x331b, 0x3304, 0x32ed, 0x32d6, 0x32bf, 0x32a8, 0x3290, 0x3279,
01041   0x3262, 0x324b, 0x3234, 0x321d, 0x3206, 0x31ef, 0x31d8, 0x31c0,
01042   0x31a9, 0x3192, 0x317b, 0x3164, 0x314c, 0x3135, 0x311e, 0x3107,
01043   0x30f0, 0x30d8, 0x30c1, 0x30aa, 0x3093, 0x307b, 0x3064, 0x304d,
01044   0x3036, 0x301e, 0x3007, 0x2ff0, 0x2fd8, 0x2fc1, 0x2faa, 0x2f92,
01045   0x2f7b, 0x2f64, 0x2f4c, 0x2f35, 0x2f1e, 0x2f06, 0x2eef, 0x2ed8,
01046   0x2ec0, 0x2ea9, 0x2e91, 0x2e7a, 0x2e63, 0x2e4b, 0x2e34, 0x2e1c,
01047   0x2e05, 0x2ded, 0x2dd6, 0x2dbe, 0x2da7, 0x2d8f, 0x2d78, 0x2d60,
01048   0x2d49, 0x2d31, 0x2d1a, 0x2d02, 0x2ceb, 0x2cd3, 0x2cbc, 0x2ca4,
01049   0x2c8d, 0x2c75, 0x2c5e, 0x2c46, 0x2c2e, 0x2c17, 0x2bff, 0x2be8,
01050   0x2bd0, 0x2bb8, 0x2ba1, 0x2b89, 0x2b71, 0x2b5a, 0x2b42, 0x2b2b,
01051   0x2b13, 0x2afb, 0x2ae4, 0x2acc, 0x2ab4, 0x2a9c, 0x2a85, 0x2a6d,
01052   0x2a55, 0x2a3e, 0x2a26, 0x2a0e, 0x29f6, 0x29df, 0x29c7, 0x29af,
01053   0x2997, 0x2980, 0x2968, 0x2950, 0x2938, 0x2920, 0x2909, 0x28f1,
01054   0x28d9, 0x28c1, 0x28a9, 0x2892, 0x287a, 0x2862, 0x284a, 0x2832,
01055   0x281a, 0x2802, 0x27eb, 0x27d3, 0x27bb, 0x27a3, 0x278b, 0x2773,
01056   0x275b, 0x2743, 0x272b, 0x2713, 0x26fb, 0x26e4, 0x26cc, 0x26b4,
01057   0x269c, 0x2684, 0x266c, 0x2654, 0x263c, 0x2624, 0x260c, 0x25f4,
01058   0x25dc, 0x25c4, 0x25ac, 0x2594, 0x257c, 0x2564, 0x254c, 0x2534,
01059   0x251c, 0x2503, 0x24eb, 0x24d3, 0x24bb, 0x24a3, 0x248b, 0x2473,
01060   0x245b, 0x2443, 0x242b, 0x2413, 0x23fa, 0x23e2, 0x23ca, 0x23b2,
01061   0x239a, 0x2382, 0x236a, 0x2352, 0x2339, 0x2321, 0x2309, 0x22f1,
01062   0x22d9, 0x22c0, 0x22a8, 0x2290, 0x2278, 0x2260, 0x2247, 0x222f,
01063   0x2217, 0x21ff, 0x21e7, 0x21ce, 0x21b6, 0x219e, 0x2186, 0x216d,
01064   0x2155, 0x213d, 0x2125, 0x210c, 0x20f4, 0x20dc, 0x20c3, 0x20ab,
01065   0x2093, 0x207a, 0x2062, 0x204a, 0x2032, 0x2019, 0x2001, 0x1fe9,
01066   0x1fd0, 0x1fb8, 0x1f9f, 0x1f87, 0x1f6f, 0x1f56, 0x1f3e, 0x1f26,
01067   0x1f0d, 0x1ef5, 0x1edd, 0x1ec4, 0x1eac, 0x1e93, 0x1e7b, 0x1e62,
01068   0x1e4a, 0x1e32, 0x1e19, 0x1e01, 0x1de8, 0x1dd0, 0x1db7, 0x1d9f,
01069   0x1d87, 0x1d6e, 0x1d56, 0x1d3d, 0x1d25, 0x1d0c, 0x1cf4, 0x1cdb,
01070   0x1cc3, 0x1caa, 0x1c92, 0x1c79, 0x1c61, 0x1c48, 0x1c30, 0x1c17,
01071   0x1bff, 0x1be6, 0x1bce, 0x1bb5, 0x1b9d, 0x1b84, 0x1b6c, 0x1b53,
01072   0x1b3a, 0x1b22, 0x1b09, 0x1af1, 0x1ad8, 0x1ac0, 0x1aa7, 0x1a8e,
01073   0x1a76, 0x1a5d, 0x1a45, 0x1a2c, 0x1a13, 0x19fb, 0x19e2, 0x19ca,
01074   0x19b1, 0x1998, 0x1980, 0x1967, 0x194e, 0x1936, 0x191d, 0x1905,
01075   0x18ec, 0x18d3, 0x18bb, 0x18a2, 0x1889, 0x1871, 0x1858, 0x183f,
01076   0x1827, 0x180e, 0x17f5, 0x17dd, 0x17c4, 0x17ab, 0x1792, 0x177a,
01077   0x1761, 0x1748, 0x1730, 0x1717, 0x16fe, 0x16e5, 0x16cd, 0x16b4,
01078   0x169b, 0x1682, 0x166a, 0x1651, 0x1638, 0x161f, 0x1607, 0x15ee,
01079   0x15d5, 0x15bc, 0x15a4, 0x158b, 0x1572, 0x1559, 0x1541, 0x1528,
01080   0x150f, 0x14f6, 0x14dd, 0x14c5, 0x14ac, 0x1493, 0x147a, 0x1461,
01081   0x1449, 0x1430, 0x1417, 0x13fe, 0x13e5, 0x13cc, 0x13b4, 0x139b,
01082   0x1382, 0x1369, 0x1350, 0x1337, 0x131f, 0x1306, 0x12ed, 0x12d4,
01083   0x12bb, 0x12a2, 0x1289, 0x1271, 0x1258, 0x123f, 0x1226, 0x120d,
01084   0x11f4, 0x11db, 0x11c2, 0x11a9, 0x1191, 0x1178, 0x115f, 0x1146,
01085   0x112d, 0x1114, 0x10fb, 0x10e2, 0x10c9, 0x10b0, 0x1098, 0x107f,
01086   0x1066, 0x104d, 0x1034, 0x101b, 0x1002, 0xfe9, 0xfd0, 0xfb7,
01087   0xf9e, 0xf85, 0xf6c, 0xf53, 0xf3a, 0xf21, 0xf08, 0xef0,
01088   0xed7, 0xebe, 0xea5, 0xe8c, 0xe73, 0xe5a, 0xe41, 0xe28,
01089   0xe0f, 0xdf6, 0xddd, 0xdc4, 0xdab, 0xd92, 0xd79, 0xd60,
01090   0xd47, 0xd2e, 0xd15, 0xcfc, 0xce3, 0xcca, 0xcb1, 0xc98,
01091   0xc7f, 0xc66, 0xc4d, 0xc34, 0xc1b, 0xc02, 0xbe9, 0xbd0,
01092   0xbb7, 0xb9e, 0xb85, 0xb6c, 0xb53, 0xb3a, 0xb20, 0xb07,
01093   0xaee, 0xad5, 0xabc, 0xaa3, 0xa8a, 0xa71, 0xa58, 0xa3f,
01094   0xa26, 0xa0d, 0x9f4, 0x9db, 0x9c2, 0x9a9, 0x990, 0x977,
01095   0x95e, 0x944, 0x92b, 0x912, 0x8f9, 0x8e0, 0x8c7, 0x8ae,
01096   0x895, 0x87c, 0x863, 0x84a, 0x831, 0x818, 0x7fe, 0x7e5,
01097   0x7cc, 0x7b3, 0x79a, 0x781, 0x768, 0x74f, 0x736, 0x71d,
01098   0x704, 0x6ea, 0x6d1, 0x6b8, 0x69f, 0x686, 0x66d, 0x654,
01099   0x63b, 0x622, 0x609, 0x5ef, 0x5d6, 0x5bd, 0x5a4, 0x58b,
01100   0x572, 0x559, 0x540, 0x527, 0x50d, 0x4f4, 0x4db, 0x4c2,
01101   0x4a9, 0x490, 0x477, 0x45e, 0x445, 0x42b, 0x412, 0x3f9,
01102   0x3e0, 0x3c7, 0x3ae, 0x395, 0x37c, 0x362, 0x349, 0x330,
01103   0x317, 0x2fe, 0x2e5, 0x2cc, 0x2b3, 0x299, 0x280, 0x267,
01104   0x24e, 0x235, 0x21c, 0x203, 0x1ea, 0x1d0, 0x1b7, 0x19e,
01105   0x185, 0x16c, 0x153, 0x13a, 0x121, 0x107, 0xee, 0xd5,
01106   0xbc, 0xa3, 0x8a, 0x71, 0x57, 0x3e, 0x25, 0xc,
01107
01108 };
01109
01125 arm_status arm_dct4_init_q15(
01126   arm_dct4_instance_q15 * S,
01127   arm_rfft_instance_q15 * S_RFFT,
01128   arm_cfft_radix4_instance_q15 * S_CFFT,
01129   uint16_t N,
01130   uint16_t Nby2,
01131   q15_t normalize)
01132 {
01133   /*  Initialise the default arm status */
01134   arm_status status = ARM_MATH_SUCCESS;
01135
01136   /* Initializing the pointer array with the weight table base addresses of different lengths */
01137   q15_t *twiddlePtr[3] = { (q15_t *) WeightsQ15_128, (q15_t *) WeightsQ15_512,
01138     (q15_t *) WeightsQ15_2048
01139   };
01140
01141   /* Initializing the pointer array with the cos factor table base addresses of different lengths */
01142   q15_t *pCosFactor[3] =
01143     { (q15_t *) cos_factorsQ15_128, (q15_t *) cos_factorsQ15_512,
01144     (q15_t *) cos_factorsQ15_2048
01145   };
01146
01147   /* Initialize the DCT4 length */
01148   S->N = N;
01149
01150   /* Initialize the half of DCT4 length */
01151   S->Nby2 = Nby2;
01152
01153   /* Initialize the DCT4 Normalizing factor */
01154   S->normalize = normalize;
01155
01156   /* Initialize Real FFT Instance */
01157   S->pRfft = S_RFFT;
01158
01159   /* Initialize Complex FFT Instance */
01160   S->pCfft = S_CFFT;
01161
01162   switch (N)
01163   {
01164     /* Initialize the table modifier values */
01165   case 2048u:
01166     S->pTwiddle = twiddlePtr[2];
01167     S->pCosFactor = pCosFactor[2];
01168     break;
01169   case 512u:
01170     S->pTwiddle = twiddlePtr[1];
01171     S->pCosFactor = pCosFactor[1];
01172     break;
01173   case 128u:
01174     S->pTwiddle = twiddlePtr[0];
01175     S->pCosFactor = pCosFactor[0];
01176     break;
01177   default:
01178     status = ARM_MATH_ARGUMENT_ERROR;
01179   }
01180
01181   /* Initialize the RFFT/RIFFT */
01182   arm_rfft_init_q15(S->pRfft, S->pCfft, S->N, 0u, 1u);
01183
01184   /* return the status of DCT4 Init function */
01185   return (status);
01186 }
01187
Generated on Mon Nov 28 2011 11:14:40 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c
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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_dct4_init_q31.c
00009 *
00010 * Description:  Initialization function of DCT-4 & IDCT4 Q31
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030
00031 #include "arm_math.h"
00032
00042 /*
00043 * @brief  Weights Table
00044 */
00045
00066 static const q31_t WeightsQ31_128[256] = {
00067   0x7fffffff, 0x0, 0x7ffd885a, 0xfe6de2e0, 0x7ff62182, 0xfcdbd541, 0x7fe9cbc0,
00068   0xfb49e6a3,
00069   0x7fd8878e, 0xf9b82684, 0x7fc25596, 0xf826a462, 0x7fa736b4, 0xf6956fb7,
00070   0x7f872bf3, 0xf50497fb,
00071   0x7f62368f, 0xf3742ca2, 0x7f3857f6, 0xf1e43d1c, 0x7f0991c4, 0xf054d8d5,
00072   0x7ed5e5c6, 0xeec60f31,
00073   0x7e9d55fc, 0xed37ef91, 0x7e5fe493, 0xebaa894f, 0x7e1d93ea, 0xea1debbb,
00074   0x7dd6668f, 0xe8922622,
00075   0x7d8a5f40, 0xe70747c4, 0x7d3980ec, 0xe57d5fda, 0x7ce3ceb2, 0xe3f47d96,
00076   0x7c894bde, 0xe26cb01b,
00077   0x7c29fbee, 0xe0e60685, 0x7bc5e290, 0xdf608fe4, 0x7b5d039e, 0xdddc5b3b,
00078   0x7aef6323, 0xdc597781,
00079   0x7a7d055b, 0xdad7f3a2, 0x7a05eead, 0xd957de7a, 0x798a23b1, 0xd7d946d8,
00080   0x7909a92d, 0xd65c3b7b,
00081   0x78848414, 0xd4e0cb15, 0x77fab989, 0xd3670446, 0x776c4edb, 0xd1eef59e,
00082   0x76d94989, 0xd078ad9e,
00083   0x7641af3d, 0xcf043ab3, 0x75a585cf, 0xcd91ab39, 0x7504d345, 0xcc210d79,
00084   0x745f9dd1, 0xcab26fa9,
00085   0x73b5ebd1, 0xc945dfec, 0x7307c3d0, 0xc7db6c50, 0x72552c85, 0xc67322ce,
00086   0x719e2cd2, 0xc50d1149,
00087   0x70e2cbc6, 0xc3a94590, 0x7023109a, 0xc247cd5a, 0x6f5f02b2, 0xc0e8b648,
00088   0x6e96a99d, 0xbf8c0de3,
00089   0x6dca0d14, 0xbe31e19b, 0x6cf934fc, 0xbcda3ecb, 0x6c242960, 0xbb8532b0,
00090   0x6b4af279, 0xba32ca71,
00091   0x6a6d98a4, 0xb8e31319, 0x698c246c, 0xb796199b, 0x68a69e81, 0xb64beacd,
00092   0x67bd0fbd, 0xb5049368,
00093   0x66cf8120, 0xb3c0200c, 0x65ddfbd3, 0xb27e9d3c, 0x64e88926, 0xb140175b,
00094   0x63ef3290, 0xb0049ab3,
00095   0x62f201ac, 0xaecc336c, 0x61f1003f, 0xad96ed92, 0x60ec3830, 0xac64d510,
00096   0x5fe3b38d, 0xab35f5b5,
00097   0x5ed77c8a, 0xaa0a5b2e, 0x5dc79d7c, 0xa8e21106, 0x5cb420e0, 0xa7bd22ac,
00098   0x5b9d1154, 0xa69b9b68,
00099   0x5a82799a, 0xa57d8666, 0x59646498, 0xa462eeac, 0x5842dd54, 0xa34bdf20,
00100   0x571deefa, 0xa2386284,
00101   0x55f5a4d2, 0xa1288376, 0x54ca0a4b, 0xa01c4c73, 0x539b2af0, 0x9f13c7d0,
00102   0x5269126e, 0x9e0effc1,
00103   0x5133cc94, 0x9d0dfe54, 0x4ffb654d, 0x9c10cd70, 0x4ebfe8a5, 0x9b1776da,
00104   0x4d8162c4, 0x9a22042d,
00105   0x4c3fdff4, 0x99307ee0, 0x4afb6c98, 0x9842f043, 0x49b41533, 0x9759617f,
00106   0x4869e665, 0x9673db94,
00107   0x471cece7, 0x9592675c, 0x45cd358f, 0x94b50d87, 0x447acd50, 0x93dbd6a0,
00108   0x4325c135, 0x9306cb04,
00109   0x41ce1e65, 0x9235f2ec, 0x4073f21d, 0x91695663, 0x3f1749b8, 0x90a0fd4e,
00110   0x3db832a6, 0x8fdcef66,
00111   0x3c56ba70, 0x8f1d343a, 0x3af2eeb7, 0x8e61d32e, 0x398cdd32, 0x8daad37b,
00112   0x382493b0, 0x8cf83c30,
00113   0x36ba2014, 0x8c4a142f, 0x354d9057, 0x8ba0622f, 0x33def287, 0x8afb2cbb,
00114   0x326e54c7, 0x8a5a7a31,
00115   0x30fbc54d, 0x89be50c3, 0x2f875262, 0x8926b677, 0x2e110a62, 0x8893b125,
00116   0x2c98fbba, 0x88054677,
00117   0x2b1f34eb, 0x877b7bec, 0x29a3c485, 0x86f656d3, 0x2826b928, 0x8675dc4f,
00118   0x26a82186, 0x85fa1153,
00119   0x25280c5e, 0x8582faa5, 0x23a6887f, 0x85109cdd, 0x2223a4c5, 0x84a2fc62,
00120   0x209f701c, 0x843a1d70,
00121   0x1f19f97b, 0x83d60412, 0x1d934fe5, 0x8376b422, 0x1c0b826a, 0x831c314e,
00122   0x1a82a026, 0x82c67f14,
00123   0x18f8b83c, 0x8275a0c0, 0x176dd9de, 0x82299971, 0x15e21445, 0x81e26c16,
00124   0x145576b1, 0x81a01b6d,
00125   0x12c8106f, 0x8162aa04, 0x1139f0cf, 0x812a1a3a, 0xfab272b, 0x80f66e3c,
00126   0xe1bc2e4, 0x80c7a80a,
00127   0xc8bd35e, 0x809dc971, 0xafb6805, 0x8078d40d, 0x96a9049, 0x8058c94c,
00128   0x7d95b9e, 0x803daa6a,
00129   0x647d97c, 0x80277872, 0x4b6195d, 0x80163440, 0x3242abf, 0x8009de7e,
00130   0x1921d20, 0x800277a6,
00131 };
00132
00133 static const q31_t WeightsQ31_512[1024] = {
00134   0x7fffffff, 0x0, 0x7fffd886, 0xff9b781d, 0x7fff6216, 0xff36f078, 0x7ffe9cb2,
00135   0xfed2694f,
00136   0x7ffd885a, 0xfe6de2e0, 0x7ffc250f, 0xfe095d69, 0x7ffa72d1, 0xfda4d929,
00137   0x7ff871a2, 0xfd40565c,
00138   0x7ff62182, 0xfcdbd541, 0x7ff38274, 0xfc775616, 0x7ff09478, 0xfc12d91a,
00139   0x7fed5791, 0xfbae5e89,
00140   0x7fe9cbc0, 0xfb49e6a3, 0x7fe5f108, 0xfae571a4, 0x7fe1c76b, 0xfa80ffcb,
00141   0x7fdd4eec, 0xfa1c9157,
00142   0x7fd8878e, 0xf9b82684, 0x7fd37153, 0xf953bf91, 0x7fce0c3e, 0xf8ef5cbb,
00143   0x7fc85854, 0xf88afe42,
00144   0x7fc25596, 0xf826a462, 0x7fbc040a, 0xf7c24f59, 0x7fb563b3, 0xf75dff66,
00145   0x7fae7495, 0xf6f9b4c6,
00146   0x7fa736b4, 0xf6956fb7, 0x7f9faa15, 0xf6313077, 0x7f97cebd, 0xf5ccf743,
00147   0x7f8fa4b0, 0xf568c45b,
00148   0x7f872bf3, 0xf50497fb, 0x7f7e648c, 0xf4a07261, 0x7f754e80, 0xf43c53cb,
00149   0x7f6be9d4, 0xf3d83c77,
00150   0x7f62368f, 0xf3742ca2, 0x7f5834b7, 0xf310248a, 0x7f4de451, 0xf2ac246e,
00151   0x7f434563, 0xf2482c8a,
00152   0x7f3857f6, 0xf1e43d1c, 0x7f2d1c0e, 0xf1805662, 0x7f2191b4, 0xf11c789a,
00153   0x7f15b8ee, 0xf0b8a401,
00154   0x7f0991c4, 0xf054d8d5, 0x7efd1c3c, 0xeff11753, 0x7ef05860, 0xef8d5fb8,
00155   0x7ee34636, 0xef29b243,
00156   0x7ed5e5c6, 0xeec60f31, 0x7ec8371a, 0xee6276bf, 0x7eba3a39, 0xedfee92b,
00157   0x7eabef2c, 0xed9b66b2,
00158   0x7e9d55fc, 0xed37ef91, 0x7e8e6eb2, 0xecd48407, 0x7e7f3957, 0xec71244f,
00159   0x7e6fb5f4, 0xec0dd0a8,
00160   0x7e5fe493, 0xebaa894f, 0x7e4fc53e, 0xeb474e81, 0x7e3f57ff, 0xeae4207a,
00161   0x7e2e9cdf, 0xea80ff7a,
00162   0x7e1d93ea, 0xea1debbb, 0x7e0c3d29, 0xe9bae57d, 0x7dfa98a8, 0xe957ecfb,
00163   0x7de8a670, 0xe8f50273,
00164   0x7dd6668f, 0xe8922622, 0x7dc3d90d, 0xe82f5844, 0x7db0fdf8, 0xe7cc9917,
00165   0x7d9dd55a, 0xe769e8d8,
00166   0x7d8a5f40, 0xe70747c4, 0x7d769bb5, 0xe6a4b616, 0x7d628ac6, 0xe642340d,
00167   0x7d4e2c7f, 0xe5dfc1e5,
00168   0x7d3980ec, 0xe57d5fda, 0x7d24881b, 0xe51b0e2a, 0x7d0f4218, 0xe4b8cd11,
00169   0x7cf9aef0, 0xe4569ccb,
00170   0x7ce3ceb2, 0xe3f47d96, 0x7ccda169, 0xe3926fad, 0x7cb72724, 0xe330734d,
00171   0x7ca05ff1, 0xe2ce88b3,
00172   0x7c894bde, 0xe26cb01b, 0x7c71eaf9, 0xe20ae9c1, 0x7c5a3d50, 0xe1a935e2,
00173   0x7c4242f2, 0xe14794ba,
00174   0x7c29fbee, 0xe0e60685, 0x7c116853, 0xe0848b7f, 0x7bf88830, 0xe02323e5,
00175   0x7bdf5b94, 0xdfc1cff3,
00176   0x7bc5e290, 0xdf608fe4, 0x7bac1d31, 0xdeff63f4, 0x7b920b89, 0xde9e4c60,
00177   0x7b77ada8, 0xde3d4964,
00178   0x7b5d039e, 0xdddc5b3b, 0x7b420d7a, 0xdd7b8220, 0x7b26cb4f, 0xdd1abe51,
00179   0x7b0b3d2c, 0xdcba1008,
00180   0x7aef6323, 0xdc597781, 0x7ad33d45, 0xdbf8f4f8, 0x7ab6cba4, 0xdb9888a8,
00181   0x7a9a0e50, 0xdb3832cd,
00182   0x7a7d055b, 0xdad7f3a2, 0x7a5fb0d8, 0xda77cb63, 0x7a4210d8, 0xda17ba4a,
00183   0x7a24256f, 0xd9b7c094,
00184   0x7a05eead, 0xd957de7a, 0x79e76ca7, 0xd8f81439, 0x79c89f6e, 0xd898620c,
00185   0x79a98715, 0xd838c82d,
00186   0x798a23b1, 0xd7d946d8, 0x796a7554, 0xd779de47, 0x794a7c12, 0xd71a8eb5,
00187   0x792a37fe, 0xd6bb585e,
00188   0x7909a92d, 0xd65c3b7b, 0x78e8cfb2, 0xd5fd3848, 0x78c7aba2, 0xd59e4eff,
00189   0x78a63d11, 0xd53f7fda,
00190   0x78848414, 0xd4e0cb15, 0x786280bf, 0xd48230e9, 0x78403329, 0xd423b191,
00191   0x781d9b65, 0xd3c54d47,
00192   0x77fab989, 0xd3670446, 0x77d78daa, 0xd308d6c7, 0x77b417df, 0xd2aac504,
00193   0x7790583e, 0xd24ccf39,
00194   0x776c4edb, 0xd1eef59e, 0x7747fbce, 0xd191386e, 0x77235f2d, 0xd13397e2,
00195   0x76fe790e, 0xd0d61434,
00196   0x76d94989, 0xd078ad9e, 0x76b3d0b4, 0xd01b6459, 0x768e0ea6, 0xcfbe389f,
00197   0x76680376, 0xcf612aaa,
00198   0x7641af3d, 0xcf043ab3, 0x761b1211, 0xcea768f2, 0x75f42c0b, 0xce4ab5a2,
00199   0x75ccfd42, 0xcdee20fc,
00200   0x75a585cf, 0xcd91ab39, 0x757dc5ca, 0xcd355491, 0x7555bd4c, 0xccd91d3d,
00201   0x752d6c6c, 0xcc7d0578,
00202   0x7504d345, 0xcc210d79, 0x74dbf1ef, 0xcbc53579, 0x74b2c884, 0xcb697db0,
00203   0x7489571c, 0xcb0de658,
00204   0x745f9dd1, 0xcab26fa9, 0x74359cbd, 0xca5719db, 0x740b53fb, 0xc9fbe527,
00205   0x73e0c3a3, 0xc9a0d1c5,
00206   0x73b5ebd1, 0xc945dfec, 0x738acc9e, 0xc8eb0fd6, 0x735f6626, 0xc89061ba,
00207   0x7333b883, 0xc835d5d0,
00208   0x7307c3d0, 0xc7db6c50, 0x72db8828, 0xc7812572, 0x72af05a7, 0xc727016d,
00209   0x72823c67, 0xc6cd0079,
00210   0x72552c85, 0xc67322ce, 0x7227d61c, 0xc61968a2, 0x71fa3949, 0xc5bfd22e,
00211   0x71cc5626, 0xc5665fa9,
00212   0x719e2cd2, 0xc50d1149, 0x716fbd68, 0xc4b3e746, 0x71410805, 0xc45ae1d7,
00213   0x71120cc5, 0xc4020133,
00214   0x70e2cbc6, 0xc3a94590, 0x70b34525, 0xc350af26, 0x708378ff, 0xc2f83e2a,
00215   0x70536771, 0xc29ff2d4,
00216   0x7023109a, 0xc247cd5a, 0x6ff27497, 0xc1efcdf3, 0x6fc19385, 0xc197f4d4,
00217   0x6f906d84, 0xc1404233,
00218   0x6f5f02b2, 0xc0e8b648, 0x6f2d532c, 0xc0915148, 0x6efb5f12, 0xc03a1368,
00219   0x6ec92683, 0xbfe2fcdf,
00220   0x6e96a99d, 0xbf8c0de3, 0x6e63e87f, 0xbf3546a8, 0x6e30e34a, 0xbedea765,
00221   0x6dfd9a1c, 0xbe88304f,
00222   0x6dca0d14, 0xbe31e19b, 0x6d963c54, 0xbddbbb7f, 0x6d6227fa, 0xbd85be30,
00223   0x6d2dd027, 0xbd2fe9e2,
00224   0x6cf934fc, 0xbcda3ecb, 0x6cc45698, 0xbc84bd1f, 0x6c8f351c, 0xbc2f6513,
00225   0x6c59d0a9, 0xbbda36dd,
00226   0x6c242960, 0xbb8532b0, 0x6bee3f62, 0xbb3058c0, 0x6bb812d1, 0xbadba943,
00227   0x6b81a3cd, 0xba87246d,
00228   0x6b4af279, 0xba32ca71, 0x6b13fef5, 0xb9de9b83, 0x6adcc964, 0xb98a97d8,
00229   0x6aa551e9, 0xb936bfa4,
00230   0x6a6d98a4, 0xb8e31319, 0x6a359db9, 0xb88f926d, 0x69fd614a, 0xb83c3dd1,
00231   0x69c4e37a, 0xb7e9157a,
00232   0x698c246c, 0xb796199b, 0x69532442, 0xb7434a67, 0x6919e320, 0xb6f0a812,
00233   0x68e06129, 0xb69e32cd,
00234   0x68a69e81, 0xb64beacd, 0x686c9b4b, 0xb5f9d043, 0x683257ab, 0xb5a7e362,
00235   0x67f7d3c5, 0xb556245e,
00236   0x67bd0fbd, 0xb5049368, 0x67820bb7, 0xb4b330b3, 0x6746c7d8, 0xb461fc70,
00237   0x670b4444, 0xb410f6d3,
00238   0x66cf8120, 0xb3c0200c, 0x66937e91, 0xb36f784f, 0x66573cbb, 0xb31effcc,
00239   0x661abbc5, 0xb2ceb6b5,
00240   0x65ddfbd3, 0xb27e9d3c, 0x65a0fd0b, 0xb22eb392, 0x6563bf92, 0xb1def9e9,
00241   0x6526438f, 0xb18f7071,
00242   0x64e88926, 0xb140175b, 0x64aa907f, 0xb0f0eeda, 0x646c59bf, 0xb0a1f71d,
00243   0x642de50d, 0xb0533055,
00244   0x63ef3290, 0xb0049ab3, 0x63b0426d, 0xafb63667, 0x637114cc, 0xaf6803a2,
00245   0x6331a9d4, 0xaf1a0293,
00246   0x62f201ac, 0xaecc336c, 0x62b21c7b, 0xae7e965b, 0x6271fa69, 0xae312b92,
00247   0x62319b9d, 0xade3f33e,
00248   0x61f1003f, 0xad96ed92, 0x61b02876, 0xad4a1aba, 0x616f146c, 0xacfd7ae8,
00249   0x612dc447, 0xacb10e4b,
00250   0x60ec3830, 0xac64d510, 0x60aa7050, 0xac18cf69, 0x60686ccf, 0xabccfd83,
00251   0x60262dd6, 0xab815f8d,
00252   0x5fe3b38d, 0xab35f5b5, 0x5fa0fe1f, 0xaaeac02c, 0x5f5e0db3, 0xaa9fbf1e,
00253   0x5f1ae274, 0xaa54f2ba,
00254   0x5ed77c8a, 0xaa0a5b2e, 0x5e93dc1f, 0xa9bff8a8, 0x5e50015d, 0xa975cb57,
00255   0x5e0bec6e, 0xa92bd367,
00256   0x5dc79d7c, 0xa8e21106, 0x5d8314b1, 0xa8988463, 0x5d3e5237, 0xa84f2daa,
00257   0x5cf95638, 0xa8060d08,
00258   0x5cb420e0, 0xa7bd22ac, 0x5c6eb258, 0xa7746ec0, 0x5c290acc, 0xa72bf174,
00259   0x5be32a67, 0xa6e3aaf2,
00260   0x5b9d1154, 0xa69b9b68, 0x5b56bfbd, 0xa653c303, 0x5b1035cf, 0xa60c21ee,
00261   0x5ac973b5, 0xa5c4b855,
00262   0x5a82799a, 0xa57d8666, 0x5a3b47ab, 0xa5368c4b, 0x59f3de12, 0xa4efca31,
00263   0x59ac3cfd, 0xa4a94043,
00264   0x59646498, 0xa462eeac, 0x591c550e, 0xa41cd599, 0x58d40e8c, 0xa3d6f534,
00265   0x588b9140, 0xa3914da8,
00266   0x5842dd54, 0xa34bdf20, 0x57f9f2f8, 0xa306a9c8, 0x57b0d256, 0xa2c1adc9,
00267   0x57677b9d, 0xa27ceb4f,
00268   0x571deefa, 0xa2386284, 0x56d42c99, 0xa1f41392, 0x568a34a9, 0xa1affea3,
00269   0x56400758, 0xa16c23e1,
00270   0x55f5a4d2, 0xa1288376, 0x55ab0d46, 0xa0e51d8c, 0x556040e2, 0xa0a1f24d,
00271   0x55153fd4, 0xa05f01e1,
00272   0x54ca0a4b, 0xa01c4c73, 0x547ea073, 0x9fd9d22a, 0x5433027d, 0x9f979331,
00273   0x53e73097, 0x9f558fb0,
00274   0x539b2af0, 0x9f13c7d0, 0x534ef1b5, 0x9ed23bb9, 0x53028518, 0x9e90eb94,
00275   0x52b5e546, 0x9e4fd78a,
00276   0x5269126e, 0x9e0effc1, 0x521c0cc2, 0x9dce6463, 0x51ced46e, 0x9d8e0597,
00277   0x518169a5, 0x9d4de385,
00278   0x5133cc94, 0x9d0dfe54, 0x50e5fd6d, 0x9cce562c, 0x5097fc5e, 0x9c8eeb34,
00279   0x5049c999, 0x9c4fbd93,
00280   0x4ffb654d, 0x9c10cd70, 0x4faccfab, 0x9bd21af3, 0x4f5e08e3, 0x9b93a641,
00281   0x4f0f1126, 0x9b556f81,
00282   0x4ebfe8a5, 0x9b1776da, 0x4e708f8f, 0x9ad9bc71, 0x4e210617, 0x9a9c406e,
00283   0x4dd14c6e, 0x9a5f02f5,
00284   0x4d8162c4, 0x9a22042d, 0x4d31494b, 0x99e5443b, 0x4ce10034, 0x99a8c345,
00285   0x4c9087b1, 0x996c816f,
00286   0x4c3fdff4, 0x99307ee0, 0x4bef092d, 0x98f4bbbc, 0x4b9e0390, 0x98b93828,
00287   0x4b4ccf4d, 0x987df449,
00288   0x4afb6c98, 0x9842f043, 0x4aa9dba2, 0x98082c3b, 0x4a581c9e, 0x97cda855,
00289   0x4a062fbd, 0x979364b5,
00290   0x49b41533, 0x9759617f, 0x4961cd33, 0x971f9ed7, 0x490f57ee, 0x96e61ce0,
00291   0x48bcb599, 0x96acdbbe,
00292   0x4869e665, 0x9673db94, 0x4816ea86, 0x963b1c86, 0x47c3c22f, 0x96029eb6,
00293   0x47706d93, 0x95ca6247,
00294   0x471cece7, 0x9592675c, 0x46c9405c, 0x955aae17, 0x46756828, 0x9523369c,
00295   0x4621647d, 0x94ec010b,
00296   0x45cd358f, 0x94b50d87, 0x4578db93, 0x947e5c33, 0x452456bd, 0x9447ed2f,
00297   0x44cfa740, 0x9411c09e,
00298   0x447acd50, 0x93dbd6a0, 0x4425c923, 0x93a62f57, 0x43d09aed, 0x9370cae4,
00299   0x437b42e1, 0x933ba968,
00300   0x4325c135, 0x9306cb04, 0x42d0161e, 0x92d22fd9, 0x427a41d0, 0x929dd806,
00301   0x42244481, 0x9269c3ac,
00302   0x41ce1e65, 0x9235f2ec, 0x4177cfb1, 0x920265e4, 0x4121589b, 0x91cf1cb6,
00303   0x40cab958, 0x919c1781,
00304   0x4073f21d, 0x91695663, 0x401d0321, 0x9136d97d, 0x3fc5ec98, 0x9104a0ee,
00305   0x3f6eaeb8, 0x90d2acd4,
00306   0x3f1749b8, 0x90a0fd4e, 0x3ebfbdcd, 0x906f927c, 0x3e680b2c, 0x903e6c7b,
00307   0x3e10320d, 0x900d8b69,
00308   0x3db832a6, 0x8fdcef66, 0x3d600d2c, 0x8fac988f, 0x3d07c1d6, 0x8f7c8701,
00309   0x3caf50da, 0x8f4cbadb,
00310   0x3c56ba70, 0x8f1d343a, 0x3bfdfecd, 0x8eedf33b, 0x3ba51e29, 0x8ebef7fb,
00311   0x3b4c18ba, 0x8e904298,
00312   0x3af2eeb7, 0x8e61d32e, 0x3a99a057, 0x8e33a9da, 0x3a402dd2, 0x8e05c6b7,
00313   0x39e6975e, 0x8dd829e4,
00314   0x398cdd32, 0x8daad37b, 0x3932ff87, 0x8d7dc399, 0x38d8fe93, 0x8d50fa59,
00315   0x387eda8e, 0x8d2477d8,
00316   0x382493b0, 0x8cf83c30, 0x37ca2a30, 0x8ccc477d, 0x376f9e46, 0x8ca099da,
00317   0x3714f02a, 0x8c753362,
00318   0x36ba2014, 0x8c4a142f, 0x365f2e3b, 0x8c1f3c5d, 0x36041ad9, 0x8bf4ac05,
00319   0x35a8e625, 0x8bca6343,
00320   0x354d9057, 0x8ba0622f, 0x34f219a8, 0x8b76a8e4, 0x34968250, 0x8b4d377c,
00321   0x343aca87, 0x8b240e11,
00322   0x33def287, 0x8afb2cbb, 0x3382fa88, 0x8ad29394, 0x3326e2c3, 0x8aaa42b4,
00323   0x32caab6f, 0x8a823a36,
00324   0x326e54c7, 0x8a5a7a31, 0x3211df04, 0x8a3302be, 0x31b54a5e, 0x8a0bd3f5,
00325   0x3158970e, 0x89e4edef,
00326   0x30fbc54d, 0x89be50c3, 0x309ed556, 0x8997fc8a, 0x3041c761, 0x8971f15a,
00327   0x2fe49ba7, 0x894c2f4c,
00328   0x2f875262, 0x8926b677, 0x2f29ebcc, 0x890186f2, 0x2ecc681e, 0x88dca0d3,
00329   0x2e6ec792, 0x88b80432,
00330   0x2e110a62, 0x8893b125, 0x2db330c7, 0x886fa7c2, 0x2d553afc, 0x884be821,
00331   0x2cf72939, 0x88287256,
00332   0x2c98fbba, 0x88054677, 0x2c3ab2b9, 0x87e2649b, 0x2bdc4e6f, 0x87bfccd7,
00333   0x2b7dcf17, 0x879d7f41,
00334   0x2b1f34eb, 0x877b7bec, 0x2ac08026, 0x8759c2ef, 0x2a61b101, 0x8738545e,
00335   0x2a02c7b8, 0x8717304e,
00336   0x29a3c485, 0x86f656d3, 0x2944a7a2, 0x86d5c802, 0x28e5714b, 0x86b583ee,
00337   0x288621b9, 0x86958aac,
00338   0x2826b928, 0x8675dc4f, 0x27c737d3, 0x865678eb, 0x27679df4, 0x86376092,
00339   0x2707ebc7, 0x86189359,
00340   0x26a82186, 0x85fa1153, 0x26483f6c, 0x85dbda91, 0x25e845b6, 0x85bdef28,
00341   0x2588349d, 0x85a04f28,
00342   0x25280c5e, 0x8582faa5, 0x24c7cd33, 0x8565f1b0, 0x24677758, 0x8549345c,
00343   0x24070b08, 0x852cc2bb,
00344   0x23a6887f, 0x85109cdd, 0x2345eff8, 0x84f4c2d4, 0x22e541af, 0x84d934b1,
00345   0x22847de0, 0x84bdf286,
00346   0x2223a4c5, 0x84a2fc62, 0x21c2b69c, 0x84885258, 0x2161b3a0, 0x846df477,
00347   0x21009c0c, 0x8453e2cf,
00348   0x209f701c, 0x843a1d70, 0x203e300d, 0x8420a46c, 0x1fdcdc1b, 0x840777d0,
00349   0x1f7b7481, 0x83ee97ad,
00350   0x1f19f97b, 0x83d60412, 0x1eb86b46, 0x83bdbd0e, 0x1e56ca1e, 0x83a5c2b0,
00351   0x1df5163f, 0x838e1507,
00352   0x1d934fe5, 0x8376b422, 0x1d31774d, 0x835fa00f, 0x1ccf8cb3, 0x8348d8dc,
00353   0x1c6d9053, 0x83325e97,
00354   0x1c0b826a, 0x831c314e, 0x1ba96335, 0x83065110, 0x1b4732ef, 0x82f0bde8,
00355   0x1ae4f1d6, 0x82db77e5,
00356   0x1a82a026, 0x82c67f14, 0x1a203e1b, 0x82b1d381, 0x19bdcbf3, 0x829d753a,
00357   0x195b49ea, 0x8289644b,
00358   0x18f8b83c, 0x8275a0c0, 0x18961728, 0x82622aa6, 0x183366e9, 0x824f0208,
00359   0x17d0a7bc, 0x823c26f3,
00360   0x176dd9de, 0x82299971, 0x170afd8d, 0x82175990, 0x16a81305, 0x82056758,
00361   0x16451a83, 0x81f3c2d7,
00362   0x15e21445, 0x81e26c16, 0x157f0086, 0x81d16321, 0x151bdf86, 0x81c0a801,
00363   0x14b8b17f, 0x81b03ac2,
00364   0x145576b1, 0x81a01b6d, 0x13f22f58, 0x81904a0c, 0x138edbb1, 0x8180c6a9,
00365   0x132b7bf9, 0x8171914e,
00366   0x12c8106f, 0x8162aa04, 0x1264994e, 0x815410d4, 0x120116d5, 0x8145c5c7,
00367   0x119d8941, 0x8137c8e6,
00368   0x1139f0cf, 0x812a1a3a, 0x10d64dbd, 0x811cb9ca, 0x1072a048, 0x810fa7a0,
00369   0x100ee8ad, 0x8102e3c4,
00370   0xfab272b, 0x80f66e3c, 0xf475bff, 0x80ea4712, 0xee38766, 0x80de6e4c,
00371   0xe7fa99e, 0x80d2e3f2,
00372   0xe1bc2e4, 0x80c7a80a, 0xdb7d376, 0x80bcba9d, 0xd53db92, 0x80b21baf,
00373   0xcefdb76, 0x80a7cb49,
00374   0xc8bd35e, 0x809dc971, 0xc27c389, 0x8094162c, 0xbc3ac35, 0x808ab180,
00375   0xb5f8d9f, 0x80819b74,
00376   0xafb6805, 0x8078d40d, 0xa973ba5, 0x80705b50, 0xa3308bd, 0x80683143,
00377   0x9cecf89, 0x806055eb,
00378   0x96a9049, 0x8058c94c, 0x9064b3a, 0x80518b6b, 0x8a2009a, 0x804a9c4d,
00379   0x83db0a7, 0x8043fbf6,
00380   0x7d95b9e, 0x803daa6a, 0x77501be, 0x8037a7ac, 0x710a345, 0x8031f3c2,
00381   0x6ac406f, 0x802c8ead,
00382   0x647d97c, 0x80277872, 0x5e36ea9, 0x8022b114, 0x57f0035, 0x801e3895,
00383   0x51a8e5c, 0x801a0ef8,
00384   0x4b6195d, 0x80163440, 0x451a177, 0x8012a86f, 0x3ed26e6, 0x800f6b88,
00385   0x388a9ea, 0x800c7d8c,
00386   0x3242abf, 0x8009de7e, 0x2bfa9a4, 0x80078e5e, 0x25b26d7, 0x80058d2f,
00387   0x1f6a297, 0x8003daf1,
00388   0x1921d20, 0x800277a6, 0x12d96b1, 0x8001634e, 0xc90f88, 0x80009dea,
00389   0x6487e3, 0x8000277a,
00390 };
00391
00392 static const q31_t WeightsQ31_2048[4096] = {
00393   0x7fffffff, 0x0, 0x7ffffd88, 0xffe6de05, 0x7ffff621, 0xffcdbc0b, 0x7fffe9cb,
00394   0xffb49a12,
00395   0x7fffd886, 0xff9b781d, 0x7fffc251, 0xff82562c, 0x7fffa72c, 0xff69343f,
00396   0x7fff8719, 0xff501258,
00397   0x7fff6216, 0xff36f078, 0x7fff3824, 0xff1dcea0, 0x7fff0943, 0xff04acd0,
00398   0x7ffed572, 0xfeeb8b0a,
00399   0x7ffe9cb2, 0xfed2694f, 0x7ffe5f03, 0xfeb947a0, 0x7ffe1c65, 0xfea025fd,
00400   0x7ffdd4d7, 0xfe870467,
00401   0x7ffd885a, 0xfe6de2e0, 0x7ffd36ee, 0xfe54c169, 0x7ffce093, 0xfe3ba002,
00402   0x7ffc8549, 0xfe227eac,
00403   0x7ffc250f, 0xfe095d69, 0x7ffbbfe6, 0xfdf03c3a, 0x7ffb55ce, 0xfdd71b1e,
00404   0x7ffae6c7, 0xfdbdfa18,
00405   0x7ffa72d1, 0xfda4d929, 0x7ff9f9ec, 0xfd8bb850, 0x7ff97c18, 0xfd729790,
00406   0x7ff8f954, 0xfd5976e9,
00407   0x7ff871a2, 0xfd40565c, 0x7ff7e500, 0xfd2735ea, 0x7ff75370, 0xfd0e1594,
00408   0x7ff6bcf0, 0xfcf4f55c,
00409   0x7ff62182, 0xfcdbd541, 0x7ff58125, 0xfcc2b545, 0x7ff4dbd9, 0xfca9956a,
00410   0x7ff4319d, 0xfc9075af,
00411   0x7ff38274, 0xfc775616, 0x7ff2ce5b, 0xfc5e36a0, 0x7ff21553, 0xfc45174e,
00412   0x7ff1575d, 0xfc2bf821,
00413   0x7ff09478, 0xfc12d91a, 0x7fefcca4, 0xfbf9ba39, 0x7feeffe1, 0xfbe09b80,
00414   0x7fee2e30, 0xfbc77cf0,
00415   0x7fed5791, 0xfbae5e89, 0x7fec7c02, 0xfb95404d, 0x7feb9b85, 0xfb7c223d,
00416   0x7feab61a, 0xfb630459,
00417   0x7fe9cbc0, 0xfb49e6a3, 0x7fe8dc78, 0xfb30c91b, 0x7fe7e841, 0xfb17abc2,
00418   0x7fe6ef1c, 0xfafe8e9b,
00419   0x7fe5f108, 0xfae571a4, 0x7fe4ee06, 0xfacc54e0, 0x7fe3e616, 0xfab3384f,
00420   0x7fe2d938, 0xfa9a1bf3,
00421   0x7fe1c76b, 0xfa80ffcb, 0x7fe0b0b1, 0xfa67e3da, 0x7fdf9508, 0xfa4ec821,
00422   0x7fde7471, 0xfa35ac9f,
00423   0x7fdd4eec, 0xfa1c9157, 0x7fdc247a, 0xfa037648, 0x7fdaf519, 0xf9ea5b75,
00424   0x7fd9c0ca, 0xf9d140de,
00425   0x7fd8878e, 0xf9b82684, 0x7fd74964, 0xf99f0c68, 0x7fd6064c, 0xf985f28a,
00426   0x7fd4be46, 0xf96cd8ed,
00427   0x7fd37153, 0xf953bf91, 0x7fd21f72, 0xf93aa676, 0x7fd0c8a3, 0xf9218d9e,
00428   0x7fcf6ce8, 0xf908750a,
00429   0x7fce0c3e, 0xf8ef5cbb, 0x7fcca6a7, 0xf8d644b2, 0x7fcb3c23, 0xf8bd2cef,
00430   0x7fc9ccb2, 0xf8a41574,
00431   0x7fc85854, 0xf88afe42, 0x7fc6df08, 0xf871e759, 0x7fc560cf, 0xf858d0bb,
00432   0x7fc3dda9, 0xf83fba68,
00433   0x7fc25596, 0xf826a462, 0x7fc0c896, 0xf80d8ea9, 0x7fbf36aa, 0xf7f4793e,
00434   0x7fbd9fd0, 0xf7db6423,
00435   0x7fbc040a, 0xf7c24f59, 0x7fba6357, 0xf7a93ae0, 0x7fb8bdb8, 0xf79026b9,
00436   0x7fb7132b, 0xf77712e5,
00437   0x7fb563b3, 0xf75dff66, 0x7fb3af4e, 0xf744ec3b, 0x7fb1f5fc, 0xf72bd967,
00438   0x7fb037bf, 0xf712c6ea,
00439   0x7fae7495, 0xf6f9b4c6, 0x7facac7f, 0xf6e0a2fa, 0x7faadf7c, 0xf6c79188,
00440   0x7fa90d8e, 0xf6ae8071,
00441   0x7fa736b4, 0xf6956fb7, 0x7fa55aee, 0xf67c5f59, 0x7fa37a3c, 0xf6634f59,
00442   0x7fa1949e, 0xf64a3fb8,
00443   0x7f9faa15, 0xf6313077, 0x7f9dbaa0, 0xf6182196, 0x7f9bc640, 0xf5ff1318,
00444   0x7f99ccf4, 0xf5e604fc,
00445   0x7f97cebd, 0xf5ccf743, 0x7f95cb9a, 0xf5b3e9f0, 0x7f93c38c, 0xf59add02,
00446   0x7f91b694, 0xf581d07b,
00447   0x7f8fa4b0, 0xf568c45b, 0x7f8d8de1, 0xf54fb8a4, 0x7f8b7227, 0xf536ad56,
00448   0x7f895182, 0xf51da273,
00449   0x7f872bf3, 0xf50497fb, 0x7f850179, 0xf4eb8def, 0x7f82d214, 0xf4d28451,
00450   0x7f809dc5, 0xf4b97b21,
00451   0x7f7e648c, 0xf4a07261, 0x7f7c2668, 0xf4876a10, 0x7f79e35a, 0xf46e6231,
00452   0x7f779b62, 0xf4555ac5,
00453   0x7f754e80, 0xf43c53cb, 0x7f72fcb4, 0xf4234d45, 0x7f70a5fe, 0xf40a4735,
00454   0x7f6e4a5e, 0xf3f1419a,
00455   0x7f6be9d4, 0xf3d83c77, 0x7f698461, 0xf3bf37cb, 0x7f671a05, 0xf3a63398,
00456   0x7f64aabf, 0xf38d2fe0,
00457   0x7f62368f, 0xf3742ca2, 0x7f5fbd77, 0xf35b29e0, 0x7f5d3f75, 0xf342279b,
00458   0x7f5abc8a, 0xf32925d3,
00459   0x7f5834b7, 0xf310248a, 0x7f55a7fa, 0xf2f723c1, 0x7f531655, 0xf2de2379,
00460   0x7f507fc7, 0xf2c523b2,
00461   0x7f4de451, 0xf2ac246e, 0x7f4b43f2, 0xf29325ad, 0x7f489eaa, 0xf27a2771,
00462   0x7f45f47b, 0xf26129ba,
00463   0x7f434563, 0xf2482c8a, 0x7f409164, 0xf22f2fe1, 0x7f3dd87c, 0xf21633c0,
00464   0x7f3b1aad, 0xf1fd3829,
00465   0x7f3857f6, 0xf1e43d1c, 0x7f359057, 0xf1cb429a, 0x7f32c3d1, 0xf1b248a5,
00466   0x7f2ff263, 0xf1994f3d,
00467   0x7f2d1c0e, 0xf1805662, 0x7f2a40d2, 0xf1675e17, 0x7f2760af, 0xf14e665c,
00468   0x7f247ba5, 0xf1356f32,
00469   0x7f2191b4, 0xf11c789a, 0x7f1ea2dc, 0xf1038295, 0x7f1baf1e, 0xf0ea8d24,
00470   0x7f18b679, 0xf0d19848,
00471   0x7f15b8ee, 0xf0b8a401, 0x7f12b67c, 0xf09fb051, 0x7f0faf25, 0xf086bd39,
00472   0x7f0ca2e7, 0xf06dcaba,
00473   0x7f0991c4, 0xf054d8d5, 0x7f067bba, 0xf03be78a, 0x7f0360cb, 0xf022f6da,
00474   0x7f0040f6, 0xf00a06c8,
00475   0x7efd1c3c, 0xeff11753, 0x7ef9f29d, 0xefd8287c, 0x7ef6c418, 0xefbf3a45,
00476   0x7ef390ae, 0xefa64cae,
00477   0x7ef05860, 0xef8d5fb8, 0x7eed1b2c, 0xef747365, 0x7ee9d914, 0xef5b87b5,
00478   0x7ee69217, 0xef429caa,
00479   0x7ee34636, 0xef29b243, 0x7edff570, 0xef10c883, 0x7edc9fc6, 0xeef7df6a,
00480   0x7ed94538, 0xeedef6f9,
00481   0x7ed5e5c6, 0xeec60f31, 0x7ed28171, 0xeead2813, 0x7ecf1837, 0xee9441a0,
00482   0x7ecbaa1a, 0xee7b5bd9,
00483   0x7ec8371a, 0xee6276bf, 0x7ec4bf36, 0xee499253, 0x7ec14270, 0xee30ae96,
00484   0x7ebdc0c6, 0xee17cb88,
00485   0x7eba3a39, 0xedfee92b, 0x7eb6aeca, 0xede60780, 0x7eb31e78, 0xedcd2687,
00486   0x7eaf8943, 0xedb44642,
00487   0x7eabef2c, 0xed9b66b2, 0x7ea85033, 0xed8287d7, 0x7ea4ac58, 0xed69a9b3,
00488   0x7ea1039b, 0xed50cc46,
00489   0x7e9d55fc, 0xed37ef91, 0x7e99a37c, 0xed1f1396, 0x7e95ec1a, 0xed063856,
00490   0x7e922fd6, 0xeced5dd0,
00491   0x7e8e6eb2, 0xecd48407, 0x7e8aa8ac, 0xecbbaafb, 0x7e86ddc6, 0xeca2d2ad,
00492   0x7e830dff, 0xec89fb1e,
00493   0x7e7f3957, 0xec71244f, 0x7e7b5fce, 0xec584e41, 0x7e778166, 0xec3f78f6,
00494   0x7e739e1d, 0xec26a46d,
00495   0x7e6fb5f4, 0xec0dd0a8, 0x7e6bc8eb, 0xebf4fda8, 0x7e67d703, 0xebdc2b6e,
00496   0x7e63e03b, 0xebc359fb,
00497   0x7e5fe493, 0xebaa894f, 0x7e5be40c, 0xeb91b96c, 0x7e57dea7, 0xeb78ea52,
00498   0x7e53d462, 0xeb601c04,
00499   0x7e4fc53e, 0xeb474e81, 0x7e4bb13c, 0xeb2e81ca, 0x7e47985b, 0xeb15b5e1,
00500   0x7e437a9c, 0xeafceac6,
00501   0x7e3f57ff, 0xeae4207a, 0x7e3b3083, 0xeacb56ff, 0x7e37042a, 0xeab28e56,
00502   0x7e32d2f4, 0xea99c67e,
00503   0x7e2e9cdf, 0xea80ff7a, 0x7e2a61ed, 0xea683949, 0x7e26221f, 0xea4f73ee,
00504   0x7e21dd73, 0xea36af69,
00505   0x7e1d93ea, 0xea1debbb, 0x7e194584, 0xea0528e5, 0x7e14f242, 0xe9ec66e8,
00506   0x7e109a24, 0xe9d3a5c5,
00507   0x7e0c3d29, 0xe9bae57d, 0x7e07db52, 0xe9a22610, 0x7e0374a0, 0xe9896781,
00508   0x7dff0911, 0xe970a9ce,
00509   0x7dfa98a8, 0xe957ecfb, 0x7df62362, 0xe93f3107, 0x7df1a942, 0xe92675f4,
00510   0x7ded2a47, 0xe90dbbc2,
00511   0x7de8a670, 0xe8f50273, 0x7de41dc0, 0xe8dc4a07, 0x7ddf9034, 0xe8c39280,
00512   0x7ddafdce, 0xe8aadbde,
00513   0x7dd6668f, 0xe8922622, 0x7dd1ca75, 0xe879714d, 0x7dcd2981, 0xe860bd61,
00514   0x7dc883b4, 0xe8480a5d,
00515   0x7dc3d90d, 0xe82f5844, 0x7dbf298d, 0xe816a716, 0x7dba7534, 0xe7fdf6d4,
00516   0x7db5bc02, 0xe7e5477f,
00517   0x7db0fdf8, 0xe7cc9917, 0x7dac3b15, 0xe7b3eb9f, 0x7da77359, 0xe79b3f16,
00518   0x7da2a6c6, 0xe782937e,
00519   0x7d9dd55a, 0xe769e8d8, 0x7d98ff17, 0xe7513f25, 0x7d9423fc, 0xe7389665,
00520   0x7d8f4409, 0xe71fee99,
00521   0x7d8a5f40, 0xe70747c4, 0x7d85759f, 0xe6eea1e4, 0x7d808728, 0xe6d5fcfc,
00522   0x7d7b93da, 0xe6bd590d,
00523   0x7d769bb5, 0xe6a4b616, 0x7d719eba, 0xe68c141a, 0x7d6c9ce9, 0xe6737319,
00524   0x7d679642, 0xe65ad315,
00525   0x7d628ac6, 0xe642340d, 0x7d5d7a74, 0xe6299604, 0x7d58654d, 0xe610f8f9,
00526   0x7d534b50, 0xe5f85cef,
00527   0x7d4e2c7f, 0xe5dfc1e5, 0x7d4908d9, 0xe5c727dd, 0x7d43e05e, 0xe5ae8ed8,
00528   0x7d3eb30f, 0xe595f6d7,
00529   0x7d3980ec, 0xe57d5fda, 0x7d3449f5, 0xe564c9e3, 0x7d2f0e2b, 0xe54c34f3,
00530   0x7d29cd8c, 0xe533a10a,
00531   0x7d24881b, 0xe51b0e2a, 0x7d1f3dd6, 0xe5027c53, 0x7d19eebf, 0xe4e9eb87,
00532   0x7d149ad5, 0xe4d15bc6,
00533   0x7d0f4218, 0xe4b8cd11, 0x7d09e489, 0xe4a03f69, 0x7d048228, 0xe487b2d0,
00534   0x7cff1af5, 0xe46f2745,
00535   0x7cf9aef0, 0xe4569ccb, 0x7cf43e1a, 0xe43e1362, 0x7ceec873, 0xe4258b0a,
00536   0x7ce94dfb, 0xe40d03c6,
00537   0x7ce3ceb2, 0xe3f47d96, 0x7cde4a98, 0xe3dbf87a, 0x7cd8c1ae, 0xe3c37474,
00538   0x7cd333f3, 0xe3aaf184,
00539   0x7ccda169, 0xe3926fad, 0x7cc80a0f, 0xe379eeed, 0x7cc26de5, 0xe3616f48,
00540   0x7cbcccec, 0xe348f0bd,
00541   0x7cb72724, 0xe330734d, 0x7cb17c8d, 0xe317f6fa, 0x7cabcd28, 0xe2ff7bc3,
00542   0x7ca618f3, 0xe2e701ac,
00543   0x7ca05ff1, 0xe2ce88b3, 0x7c9aa221, 0xe2b610da, 0x7c94df83, 0xe29d9a23,
00544   0x7c8f1817, 0xe285248d,
00545   0x7c894bde, 0xe26cb01b, 0x7c837ad8, 0xe2543ccc, 0x7c7da505, 0xe23bcaa2,
00546   0x7c77ca65, 0xe223599e,
00547   0x7c71eaf9, 0xe20ae9c1, 0x7c6c06c0, 0xe1f27b0b, 0x7c661dbc, 0xe1da0d7e,
00548   0x7c602fec, 0xe1c1a11b,
00549   0x7c5a3d50, 0xe1a935e2, 0x7c5445e9, 0xe190cbd4, 0x7c4e49b7, 0xe17862f3,
00550   0x7c4848ba, 0xe15ffb3f,
00551   0x7c4242f2, 0xe14794ba, 0x7c3c3860, 0xe12f2f63, 0x7c362904, 0xe116cb3d,
00552   0x7c3014de, 0xe0fe6848,
00553   0x7c29fbee, 0xe0e60685, 0x7c23de35, 0xe0cda5f5, 0x7c1dbbb3, 0xe0b54698,
00554   0x7c179467, 0xe09ce871,
00555   0x7c116853, 0xe0848b7f, 0x7c0b3777, 0xe06c2fc4, 0x7c0501d2, 0xe053d541,
00556   0x7bfec765, 0xe03b7bf6,
00557   0x7bf88830, 0xe02323e5, 0x7bf24434, 0xe00acd0e, 0x7bebfb70, 0xdff27773,
00558   0x7be5ade6, 0xdfda2314,
00559   0x7bdf5b94, 0xdfc1cff3, 0x7bd9047c, 0xdfa97e0f, 0x7bd2a89e, 0xdf912d6b,
00560   0x7bcc47fa, 0xdf78de07,
00561   0x7bc5e290, 0xdf608fe4, 0x7bbf7860, 0xdf484302, 0x7bb9096b, 0xdf2ff764,
00562   0x7bb295b0, 0xdf17ad0a,
00563   0x7bac1d31, 0xdeff63f4, 0x7ba59fee, 0xdee71c24, 0x7b9f1de6, 0xdeced59b,
00564   0x7b989719, 0xdeb69059,
00565   0x7b920b89, 0xde9e4c60, 0x7b8b7b36, 0xde8609b1, 0x7b84e61f, 0xde6dc84b,
00566   0x7b7e4c45, 0xde558831,
00567   0x7b77ada8, 0xde3d4964, 0x7b710a49, 0xde250be3, 0x7b6a6227, 0xde0ccfb1,
00568   0x7b63b543, 0xddf494ce,
00569   0x7b5d039e, 0xdddc5b3b, 0x7b564d36, 0xddc422f8, 0x7b4f920e, 0xddabec08,
00570   0x7b48d225, 0xdd93b66a,
00571   0x7b420d7a, 0xdd7b8220, 0x7b3b4410, 0xdd634f2b, 0x7b3475e5, 0xdd4b1d8c,
00572   0x7b2da2fa, 0xdd32ed43,
00573   0x7b26cb4f, 0xdd1abe51, 0x7b1feee5, 0xdd0290b8, 0x7b190dbc, 0xdcea6478,
00574   0x7b1227d3, 0xdcd23993,
00575   0x7b0b3d2c, 0xdcba1008, 0x7b044dc7, 0xdca1e7da, 0x7afd59a4, 0xdc89c109,
00576   0x7af660c2, 0xdc719b96,
00577   0x7aef6323, 0xdc597781, 0x7ae860c7, 0xdc4154cd, 0x7ae159ae, 0xdc293379,
00578   0x7ada4dd8, 0xdc111388,
00579   0x7ad33d45, 0xdbf8f4f8, 0x7acc27f7, 0xdbe0d7cd, 0x7ac50dec, 0xdbc8bc06,
00580   0x7abdef25, 0xdbb0a1a4,
00581   0x7ab6cba4, 0xdb9888a8, 0x7aafa367, 0xdb807114, 0x7aa8766f, 0xdb685ae9,
00582   0x7aa144bc, 0xdb504626,
00583   0x7a9a0e50, 0xdb3832cd, 0x7a92d329, 0xdb2020e0, 0x7a8b9348, 0xdb08105e,
00584   0x7a844eae, 0xdaf00149,
00585   0x7a7d055b, 0xdad7f3a2, 0x7a75b74f, 0xdabfe76a, 0x7a6e648a, 0xdaa7dca1,
00586   0x7a670d0d, 0xda8fd349,
00587   0x7a5fb0d8, 0xda77cb63, 0x7a584feb, 0xda5fc4ef, 0x7a50ea47, 0xda47bfee,
00588   0x7a497feb, 0xda2fbc61,
00589   0x7a4210d8, 0xda17ba4a, 0x7a3a9d0f, 0xd9ffb9a9, 0x7a332490, 0xd9e7ba7f,
00590   0x7a2ba75a, 0xd9cfbccd,
00591   0x7a24256f, 0xd9b7c094, 0x7a1c9ece, 0xd99fc5d4, 0x7a151378, 0xd987cc90,
00592   0x7a0d836d, 0xd96fd4c7,
00593   0x7a05eead, 0xd957de7a, 0x79fe5539, 0xd93fe9ab, 0x79f6b711, 0xd927f65b,
00594   0x79ef1436, 0xd910048a,
00595   0x79e76ca7, 0xd8f81439, 0x79dfc064, 0xd8e0256a, 0x79d80f6f, 0xd8c8381d,
00596   0x79d059c8, 0xd8b04c52,
00597   0x79c89f6e, 0xd898620c, 0x79c0e062, 0xd880794b, 0x79b91ca4, 0xd868920f,
00598   0x79b15435, 0xd850ac5a,
00599   0x79a98715, 0xd838c82d, 0x79a1b545, 0xd820e589, 0x7999dec4, 0xd809046e,
00600   0x79920392, 0xd7f124dd,
00601   0x798a23b1, 0xd7d946d8, 0x79823f20, 0xd7c16a5f, 0x797a55e0, 0xd7a98f73,
00602   0x797267f2, 0xd791b616,
00603   0x796a7554, 0xd779de47, 0x79627e08, 0xd7620808, 0x795a820e, 0xd74a335b,
00604   0x79528167, 0xd732603f,
00605   0x794a7c12, 0xd71a8eb5, 0x79427210, 0xd702bec0, 0x793a6361, 0xd6eaf05f,
00606   0x79325006, 0xd6d32393,
00607   0x792a37fe, 0xd6bb585e, 0x79221b4b, 0xd6a38ec0, 0x7919f9ec, 0xd68bc6ba,
00608   0x7911d3e2, 0xd674004e,
00609   0x7909a92d, 0xd65c3b7b, 0x790179cd, 0xd6447844, 0x78f945c3, 0xd62cb6a8,
00610   0x78f10d0f, 0xd614f6a9,
00611   0x78e8cfb2, 0xd5fd3848, 0x78e08dab, 0xd5e57b85, 0x78d846fb, 0xd5cdc062,
00612   0x78cffba3, 0xd5b606e0,
00613   0x78c7aba2, 0xd59e4eff, 0x78bf56f9, 0xd58698c0, 0x78b6fda8, 0xd56ee424,
00614   0x78ae9fb0, 0xd557312d,
00615   0x78a63d11, 0xd53f7fda, 0x789dd5cb, 0xd527d02e, 0x789569df, 0xd5102228,
00616   0x788cf94c, 0xd4f875ca,
00617   0x78848414, 0xd4e0cb15, 0x787c0a36, 0xd4c92209, 0x78738bb3, 0xd4b17aa8,
00618   0x786b088c, 0xd499d4f2,
00619   0x786280bf, 0xd48230e9, 0x7859f44f, 0xd46a8e8d, 0x7851633b, 0xd452eddf,
00620   0x7848cd83, 0xd43b4ee0,
00621   0x78403329, 0xd423b191, 0x7837942b, 0xd40c15f3, 0x782ef08b, 0xd3f47c06,
00622   0x78264849, 0xd3dce3cd,
00623   0x781d9b65, 0xd3c54d47, 0x7814e9df, 0xd3adb876, 0x780c33b8, 0xd396255a,
00624   0x780378f1, 0xd37e93f4,
00625   0x77fab989, 0xd3670446, 0x77f1f581, 0xd34f764f, 0x77e92cd9, 0xd337ea12,
00626   0x77e05f91, 0xd3205f8f,
00627   0x77d78daa, 0xd308d6c7, 0x77ceb725, 0xd2f14fba, 0x77c5dc01, 0xd2d9ca6a,
00628   0x77bcfc3f, 0xd2c246d8,
00629   0x77b417df, 0xd2aac504, 0x77ab2ee2, 0xd29344f0, 0x77a24148, 0xd27bc69c,
00630   0x77994f11, 0xd2644a0a,
00631   0x7790583e, 0xd24ccf39, 0x77875cce, 0xd235562b, 0x777e5cc3, 0xd21ddee2,
00632   0x7775581d, 0xd206695d,
00633   0x776c4edb, 0xd1eef59e, 0x776340ff, 0xd1d783a6, 0x775a2e89, 0xd1c01375,
00634   0x77511778, 0xd1a8a50d,
00635   0x7747fbce, 0xd191386e, 0x773edb8b, 0xd179cd99, 0x7735b6af, 0xd1626490,
00636   0x772c8d3a, 0xd14afd52,
00637   0x77235f2d, 0xd13397e2, 0x771a2c88, 0xd11c343f, 0x7710f54c, 0xd104d26b,
00638   0x7707b979, 0xd0ed7267,
00639   0x76fe790e, 0xd0d61434, 0x76f5340e, 0xd0beb7d2, 0x76ebea77, 0xd0a75d42,
00640   0x76e29c4b, 0xd0900486,
00641   0x76d94989, 0xd078ad9e, 0x76cff232, 0xd061588b, 0x76c69647, 0xd04a054e,
00642   0x76bd35c7, 0xd032b3e7,
00643   0x76b3d0b4, 0xd01b6459, 0x76aa670d, 0xd00416a3, 0x76a0f8d2, 0xcfeccac7,
00644   0x76978605, 0xcfd580c6,
00645   0x768e0ea6, 0xcfbe389f, 0x768492b4, 0xcfa6f255, 0x767b1231, 0xcf8fade9,
00646   0x76718d1c, 0xcf786b5a,
00647   0x76680376, 0xcf612aaa, 0x765e7540, 0xcf49ebda, 0x7654e279, 0xcf32aeeb,
00648   0x764b4b23, 0xcf1b73de,
00649   0x7641af3d, 0xcf043ab3, 0x76380ec8, 0xceed036b, 0x762e69c4, 0xced5ce08,
00650   0x7624c031, 0xcebe9a8a,
00651   0x761b1211, 0xcea768f2, 0x76115f63, 0xce903942, 0x7607a828, 0xce790b79,
00652   0x75fdec60, 0xce61df99,
00653   0x75f42c0b, 0xce4ab5a2, 0x75ea672a, 0xce338d97, 0x75e09dbd, 0xce1c6777,
00654   0x75d6cfc5, 0xce054343,
00655   0x75ccfd42, 0xcdee20fc, 0x75c32634, 0xcdd700a4, 0x75b94a9c, 0xcdbfe23a,
00656   0x75af6a7b, 0xcda8c5c1,
00657   0x75a585cf, 0xcd91ab39, 0x759b9c9b, 0xcd7a92a2, 0x7591aedd, 0xcd637bfe,
00658   0x7587bc98, 0xcd4c674d,
00659   0x757dc5ca, 0xcd355491, 0x7573ca75, 0xcd1e43ca, 0x7569ca99, 0xcd0734f9,
00660   0x755fc635, 0xccf0281f,
00661   0x7555bd4c, 0xccd91d3d, 0x754bafdc, 0xccc21455, 0x75419de7, 0xccab0d65,
00662   0x7537876c, 0xcc940871,
00663   0x752d6c6c, 0xcc7d0578, 0x75234ce8, 0xcc66047b, 0x751928e0, 0xcc4f057c,
00664   0x750f0054, 0xcc38087b,
00665   0x7504d345, 0xcc210d79, 0x74faa1b3, 0xcc0a1477, 0x74f06b9e, 0xcbf31d75,
00666   0x74e63108, 0xcbdc2876,
00667   0x74dbf1ef, 0xcbc53579, 0x74d1ae55, 0xcbae447f, 0x74c7663a, 0xcb97558a,
00668   0x74bd199f, 0xcb80689a,
00669   0x74b2c884, 0xcb697db0, 0x74a872e8, 0xcb5294ce, 0x749e18cd, 0xcb3badf3,
00670   0x7493ba34, 0xcb24c921,
00671   0x7489571c, 0xcb0de658, 0x747eef85, 0xcaf7059a, 0x74748371, 0xcae026e8,
00672   0x746a12df, 0xcac94a42,
00673   0x745f9dd1, 0xcab26fa9, 0x74552446, 0xca9b971e, 0x744aa63f, 0xca84c0a3,
00674   0x744023bc, 0xca6dec37,
00675   0x74359cbd, 0xca5719db, 0x742b1144, 0xca404992, 0x74208150, 0xca297b5a,
00676   0x7415ece2, 0xca12af37,
00677   0x740b53fb, 0xc9fbe527, 0x7400b69a, 0xc9e51d2d, 0x73f614c0, 0xc9ce5748,
00678   0x73eb6e6e, 0xc9b7937a,
00679   0x73e0c3a3, 0xc9a0d1c5, 0x73d61461, 0xc98a1227, 0x73cb60a8, 0xc97354a4,
00680   0x73c0a878, 0xc95c993a,
00681   0x73b5ebd1, 0xc945dfec, 0x73ab2ab4, 0xc92f28ba, 0x73a06522, 0xc91873a5,
00682   0x73959b1b, 0xc901c0ae,
00683   0x738acc9e, 0xc8eb0fd6, 0x737ff9ae, 0xc8d4611d, 0x73752249, 0xc8bdb485,
00684   0x736a4671, 0xc8a70a0e,
00685   0x735f6626, 0xc89061ba, 0x73548168, 0xc879bb89, 0x73499838, 0xc863177b,
00686   0x733eaa96, 0xc84c7593,
00687   0x7333b883, 0xc835d5d0, 0x7328c1ff, 0xc81f3834, 0x731dc70a, 0xc8089cbf,
00688   0x7312c7a5, 0xc7f20373,
00689   0x7307c3d0, 0xc7db6c50, 0x72fcbb8c, 0xc7c4d757, 0x72f1aed9, 0xc7ae4489,
00690   0x72e69db7, 0xc797b3e7,
00691   0x72db8828, 0xc7812572, 0x72d06e2b, 0xc76a992a, 0x72c54fc1, 0xc7540f11,
00692   0x72ba2cea, 0xc73d8727,
00693   0x72af05a7, 0xc727016d, 0x72a3d9f7, 0xc7107de4, 0x7298a9dd, 0xc6f9fc8d,
00694   0x728d7557, 0xc6e37d69,
00695   0x72823c67, 0xc6cd0079, 0x7276ff0d, 0xc6b685bd, 0x726bbd48, 0xc6a00d37,
00696   0x7260771b, 0xc68996e7,
00697   0x72552c85, 0xc67322ce, 0x7249dd86, 0xc65cb0ed, 0x723e8a20, 0xc6464144,
00698   0x72333251, 0xc62fd3d6,
00699   0x7227d61c, 0xc61968a2, 0x721c7580, 0xc602ffaa, 0x7211107e, 0xc5ec98ee,
00700   0x7205a716, 0xc5d6346f,
00701   0x71fa3949, 0xc5bfd22e, 0x71eec716, 0xc5a9722c, 0x71e35080, 0xc593146a,
00702   0x71d7d585, 0xc57cb8e9,
00703   0x71cc5626, 0xc5665fa9, 0x71c0d265, 0xc55008ab, 0x71b54a41, 0xc539b3f1,
00704   0x71a9bdba, 0xc523617a,
00705   0x719e2cd2, 0xc50d1149, 0x71929789, 0xc4f6c35d, 0x7186fdde, 0xc4e077b8,
00706   0x717b5fd3, 0xc4ca2e5b,
00707   0x716fbd68, 0xc4b3e746, 0x7164169d, 0xc49da27a, 0x71586b74, 0xc4875ff9,
00708   0x714cbbeb, 0xc4711fc2,
00709   0x71410805, 0xc45ae1d7, 0x71354fc0, 0xc444a639, 0x7129931f, 0xc42e6ce8,
00710   0x711dd220, 0xc41835e6,
00711   0x71120cc5, 0xc4020133, 0x7106430e, 0xc3ebced0, 0x70fa74fc, 0xc3d59ebe,
00712   0x70eea28e, 0xc3bf70fd,
00713   0x70e2cbc6, 0xc3a94590, 0x70d6f0a4, 0xc3931c76, 0x70cb1128, 0xc37cf5b0,
00714   0x70bf2d53, 0xc366d140,
00715   0x70b34525, 0xc350af26, 0x70a7589f, 0xc33a8f62, 0x709b67c0, 0xc32471f7,
00716   0x708f728b, 0xc30e56e4,
00717   0x708378ff, 0xc2f83e2a, 0x70777b1c, 0xc2e227cb, 0x706b78e3, 0xc2cc13c7,
00718   0x705f7255, 0xc2b6021f,
00719   0x70536771, 0xc29ff2d4, 0x70475839, 0xc289e5e7, 0x703b44ad, 0xc273db58,
00720   0x702f2ccd, 0xc25dd329,
00721   0x7023109a, 0xc247cd5a, 0x7016f014, 0xc231c9ec, 0x700acb3c, 0xc21bc8e1,
00722   0x6ffea212, 0xc205ca38,
00723   0x6ff27497, 0xc1efcdf3, 0x6fe642ca, 0xc1d9d412, 0x6fda0cae, 0xc1c3dc97,
00724   0x6fcdd241, 0xc1ade781,
00725   0x6fc19385, 0xc197f4d4, 0x6fb5507a, 0xc182048d, 0x6fa90921, 0xc16c16b0,
00726   0x6f9cbd79, 0xc1562b3d,
00727   0x6f906d84, 0xc1404233, 0x6f841942, 0xc12a5b95, 0x6f77c0b3, 0xc1147764,
00728   0x6f6b63d8, 0xc0fe959f,
00729   0x6f5f02b2, 0xc0e8b648, 0x6f529d40, 0xc0d2d960, 0x6f463383, 0xc0bcfee7,
00730   0x6f39c57d, 0xc0a726df,
00731   0x6f2d532c, 0xc0915148, 0x6f20dc92, 0xc07b7e23, 0x6f1461b0, 0xc065ad70,
00732   0x6f07e285, 0xc04fdf32,
00733   0x6efb5f12, 0xc03a1368, 0x6eeed758, 0xc0244a14, 0x6ee24b57, 0xc00e8336,
00734   0x6ed5bb10, 0xbff8bece,
00735   0x6ec92683, 0xbfe2fcdf, 0x6ebc8db0, 0xbfcd3d69, 0x6eaff099, 0xbfb7806c,
00736   0x6ea34f3d, 0xbfa1c5ea,
00737   0x6e96a99d, 0xbf8c0de3, 0x6e89ffb9, 0xbf765858, 0x6e7d5193, 0xbf60a54a,
00738   0x6e709f2a, 0xbf4af4ba,
00739   0x6e63e87f, 0xbf3546a8, 0x6e572d93, 0xbf1f9b16, 0x6e4a6e66, 0xbf09f205,
00740   0x6e3daaf8, 0xbef44b74,
00741   0x6e30e34a, 0xbedea765, 0x6e24175c, 0xbec905d9, 0x6e174730, 0xbeb366d1,
00742   0x6e0a72c5, 0xbe9dca4e,
00743   0x6dfd9a1c, 0xbe88304f, 0x6df0bd35, 0xbe7298d7, 0x6de3dc11, 0xbe5d03e6,
00744   0x6dd6f6b1, 0xbe47717c,
00745   0x6dca0d14, 0xbe31e19b, 0x6dbd1f3c, 0xbe1c5444, 0x6db02d29, 0xbe06c977,
00746   0x6da336dc, 0xbdf14135,
00747   0x6d963c54, 0xbddbbb7f, 0x6d893d93, 0xbdc63856, 0x6d7c3a98, 0xbdb0b7bb,
00748   0x6d6f3365, 0xbd9b39ad,
00749   0x6d6227fa, 0xbd85be30, 0x6d551858, 0xbd704542, 0x6d48047e, 0xbd5acee5,
00750   0x6d3aec6e, 0xbd455b1a,
00751   0x6d2dd027, 0xbd2fe9e2, 0x6d20afac, 0xbd1a7b3d, 0x6d138afb, 0xbd050f2c,
00752   0x6d066215, 0xbcefa5b0,
00753   0x6cf934fc, 0xbcda3ecb, 0x6cec03af, 0xbcc4da7b, 0x6cdece2f, 0xbcaf78c4,
00754   0x6cd1947c, 0xbc9a19a5,
00755   0x6cc45698, 0xbc84bd1f, 0x6cb71482, 0xbc6f6333, 0x6ca9ce3b, 0xbc5a0be2,
00756   0x6c9c83c3, 0xbc44b72c,
00757   0x6c8f351c, 0xbc2f6513, 0x6c81e245, 0xbc1a1598, 0x6c748b3f, 0xbc04c8ba,
00758   0x6c67300b, 0xbbef7e7c,
00759   0x6c59d0a9, 0xbbda36dd, 0x6c4c6d1a, 0xbbc4f1df, 0x6c3f055d, 0xbbafaf82,
00760   0x6c319975, 0xbb9a6fc7,
00761   0x6c242960, 0xbb8532b0, 0x6c16b521, 0xbb6ff83c, 0x6c093cb6, 0xbb5ac06d,
00762   0x6bfbc021, 0xbb458b43,
00763   0x6bee3f62, 0xbb3058c0, 0x6be0ba7b, 0xbb1b28e4, 0x6bd3316a, 0xbb05fbb0,
00764   0x6bc5a431, 0xbaf0d125,
00765   0x6bb812d1, 0xbadba943, 0x6baa7d49, 0xbac6840c, 0x6b9ce39b, 0xbab16180,
00766   0x6b8f45c7, 0xba9c41a0,
00767   0x6b81a3cd, 0xba87246d, 0x6b73fdae, 0xba7209e7, 0x6b66536b, 0xba5cf210,
00768   0x6b58a503, 0xba47dce8,
00769   0x6b4af279, 0xba32ca71, 0x6b3d3bcb, 0xba1dbaaa, 0x6b2f80fb, 0xba08ad95,
00770   0x6b21c208, 0xb9f3a332,
00771   0x6b13fef5, 0xb9de9b83, 0x6b0637c1, 0xb9c99688, 0x6af86c6c, 0xb9b49442,
00772   0x6aea9cf8, 0xb99f94b2,
00773   0x6adcc964, 0xb98a97d8, 0x6acef1b2, 0xb9759db6, 0x6ac115e2, 0xb960a64c,
00774   0x6ab335f4, 0xb94bb19b,
00775   0x6aa551e9, 0xb936bfa4, 0x6a9769c1, 0xb921d067, 0x6a897d7d, 0xb90ce3e6,
00776   0x6a7b8d1e, 0xb8f7fa21,
00777   0x6a6d98a4, 0xb8e31319, 0x6a5fa010, 0xb8ce2ecf, 0x6a51a361, 0xb8b94d44,
00778   0x6a43a29a, 0xb8a46e78,
00779   0x6a359db9, 0xb88f926d, 0x6a2794c1, 0xb87ab922, 0x6a1987b0, 0xb865e299,
00780   0x6a0b7689, 0xb8510ed4,
00781   0x69fd614a, 0xb83c3dd1, 0x69ef47f6, 0xb8276f93, 0x69e12a8c, 0xb812a41a,
00782   0x69d3090e, 0xb7fddb67,
00783   0x69c4e37a, 0xb7e9157a, 0x69b6b9d3, 0xb7d45255, 0x69a88c19, 0xb7bf91f8,
00784   0x699a5a4c, 0xb7aad465,
00785   0x698c246c, 0xb796199b, 0x697dea7b, 0xb781619c, 0x696fac78, 0xb76cac69,
00786   0x69616a65, 0xb757fa01,
00787   0x69532442, 0xb7434a67, 0x6944da10, 0xb72e9d9b, 0x69368bce, 0xb719f39e,
00788   0x6928397e, 0xb7054c6f,
00789   0x6919e320, 0xb6f0a812, 0x690b88b5, 0xb6dc0685, 0x68fd2a3d, 0xb6c767ca,
00790   0x68eec7b9, 0xb6b2cbe2,
00791   0x68e06129, 0xb69e32cd, 0x68d1f68f, 0xb6899c8d, 0x68c387e9, 0xb6750921,
00792   0x68b5153a, 0xb660788c,
00793   0x68a69e81, 0xb64beacd, 0x689823bf, 0xb6375fe5, 0x6889a4f6, 0xb622d7d6,
00794   0x687b2224, 0xb60e529f,
00795   0x686c9b4b, 0xb5f9d043, 0x685e106c, 0xb5e550c1, 0x684f8186, 0xb5d0d41a,
00796   0x6840ee9b, 0xb5bc5a50,
00797   0x683257ab, 0xb5a7e362, 0x6823bcb7, 0xb5936f53, 0x68151dbe, 0xb57efe22,
00798   0x68067ac3, 0xb56a8fd0,
00799   0x67f7d3c5, 0xb556245e, 0x67e928c5, 0xb541bbcd, 0x67da79c3, 0xb52d561e,
00800   0x67cbc6c0, 0xb518f351,
00801   0x67bd0fbd, 0xb5049368, 0x67ae54ba, 0xb4f03663, 0x679f95b7, 0xb4dbdc42,
00802   0x6790d2b6, 0xb4c78507,
00803   0x67820bb7, 0xb4b330b3, 0x677340ba, 0xb49edf45, 0x676471c0, 0xb48a90c0,
00804   0x67559eca, 0xb4764523,
00805   0x6746c7d8, 0xb461fc70, 0x6737ecea, 0xb44db6a8, 0x67290e02, 0xb43973ca,
00806   0x671a2b20, 0xb42533d8,
00807   0x670b4444, 0xb410f6d3, 0x66fc596f, 0xb3fcbcbb, 0x66ed6aa1, 0xb3e88592,
00808   0x66de77dc, 0xb3d45157,
00809   0x66cf8120, 0xb3c0200c, 0x66c0866d, 0xb3abf1b2, 0x66b187c3, 0xb397c649,
00810   0x66a28524, 0xb3839dd3,
00811   0x66937e91, 0xb36f784f, 0x66847408, 0xb35b55bf, 0x6675658c, 0xb3473623,
00812   0x6666531d, 0xb333197c,
00813   0x66573cbb, 0xb31effcc, 0x66482267, 0xb30ae912, 0x66390422, 0xb2f6d550,
00814   0x6629e1ec, 0xb2e2c486,
00815   0x661abbc5, 0xb2ceb6b5, 0x660b91af, 0xb2baabde, 0x65fc63a9, 0xb2a6a402,
00816   0x65ed31b5, 0xb2929f21,
00817   0x65ddfbd3, 0xb27e9d3c, 0x65cec204, 0xb26a9e54, 0x65bf8447, 0xb256a26a,
00818   0x65b0429f, 0xb242a97e,
00819   0x65a0fd0b, 0xb22eb392, 0x6591b38c, 0xb21ac0a6, 0x65826622, 0xb206d0ba,
00820   0x657314cf, 0xb1f2e3d0,
00821   0x6563bf92, 0xb1def9e9, 0x6554666d, 0xb1cb1304, 0x6545095f, 0xb1b72f23,
00822   0x6535a86b, 0xb1a34e47,
00823   0x6526438f, 0xb18f7071, 0x6516dacd, 0xb17b95a0, 0x65076e25, 0xb167bdd7,
00824   0x64f7fd98, 0xb153e915,
00825   0x64e88926, 0xb140175b, 0x64d910d1, 0xb12c48ab, 0x64c99498, 0xb1187d05,
00826   0x64ba147d, 0xb104b46a,
00827   0x64aa907f, 0xb0f0eeda, 0x649b08a0, 0xb0dd2c56, 0x648b7ce0, 0xb0c96ce0,
00828   0x647bed3f, 0xb0b5b077,
00829   0x646c59bf, 0xb0a1f71d, 0x645cc260, 0xb08e40d2, 0x644d2722, 0xb07a8d97,
00830   0x643d8806, 0xb066dd6d,
00831   0x642de50d, 0xb0533055, 0x641e3e38, 0xb03f864f, 0x640e9386, 0xb02bdf5c,
00832   0x63fee4f8, 0xb0183b7d,
00833   0x63ef3290, 0xb0049ab3, 0x63df7c4d, 0xaff0fcfe, 0x63cfc231, 0xafdd625f,
00834   0x63c0043b, 0xafc9cad7,
00835   0x63b0426d, 0xafb63667, 0x63a07cc7, 0xafa2a50f, 0x6390b34a, 0xaf8f16d1,
00836   0x6380e5f6, 0xaf7b8bac,
00837   0x637114cc, 0xaf6803a2, 0x63613fcd, 0xaf547eb3, 0x635166f9, 0xaf40fce1,
00838   0x63418a50, 0xaf2d7e2b,
00839   0x6331a9d4, 0xaf1a0293, 0x6321c585, 0xaf068a1a, 0x6311dd64, 0xaef314c0,
00840   0x6301f171, 0xaedfa285,
00841   0x62f201ac, 0xaecc336c, 0x62e20e17, 0xaeb8c774, 0x62d216b3, 0xaea55e9e,
00842   0x62c21b7e, 0xae91f8eb,
00843   0x62b21c7b, 0xae7e965b, 0x62a219aa, 0xae6b36f0, 0x6292130c, 0xae57daab,
00844   0x628208a1, 0xae44818b,
00845   0x6271fa69, 0xae312b92, 0x6261e866, 0xae1dd8c0, 0x6251d298, 0xae0a8916,
00846   0x6241b8ff, 0xadf73c96,
00847   0x62319b9d, 0xade3f33e, 0x62217a72, 0xadd0ad12, 0x6211557e, 0xadbd6a10,
00848   0x62012cc2, 0xadaa2a3b,
00849   0x61f1003f, 0xad96ed92, 0x61e0cff5, 0xad83b416, 0x61d09be5, 0xad707dc8,
00850   0x61c06410, 0xad5d4aaa,
00851   0x61b02876, 0xad4a1aba, 0x619fe918, 0xad36edfc, 0x618fa5f7, 0xad23c46e,
00852   0x617f5f12, 0xad109e12,
00853   0x616f146c, 0xacfd7ae8, 0x615ec603, 0xacea5af2, 0x614e73da, 0xacd73e30,
00854   0x613e1df0, 0xacc424a3,
00855   0x612dc447, 0xacb10e4b, 0x611d66de, 0xac9dfb29, 0x610d05b7, 0xac8aeb3e,
00856   0x60fca0d2, 0xac77de8b,
00857   0x60ec3830, 0xac64d510, 0x60dbcbd1, 0xac51cecf, 0x60cb5bb7, 0xac3ecbc7,
00858   0x60bae7e1, 0xac2bcbfa,
00859   0x60aa7050, 0xac18cf69, 0x6099f505, 0xac05d613, 0x60897601, 0xabf2dffb,
00860   0x6078f344, 0xabdfed1f,
00861   0x60686ccf, 0xabccfd83, 0x6057e2a2, 0xabba1125, 0x604754bf, 0xaba72807,
00862   0x6036c325, 0xab944229,
00863   0x60262dd6, 0xab815f8d, 0x601594d1, 0xab6e8032, 0x6004f819, 0xab5ba41a,
00864   0x5ff457ad, 0xab48cb46,
00865   0x5fe3b38d, 0xab35f5b5, 0x5fd30bbc, 0xab23236a, 0x5fc26038, 0xab105464,
00866   0x5fb1b104, 0xaafd88a4,
00867   0x5fa0fe1f, 0xaaeac02c, 0x5f90478a, 0xaad7fafb, 0x5f7f8d46, 0xaac53912,
00868   0x5f6ecf53, 0xaab27a73,
00869   0x5f5e0db3, 0xaa9fbf1e, 0x5f4d4865, 0xaa8d0713, 0x5f3c7f6b, 0xaa7a5253,
00870   0x5f2bb2c5, 0xaa67a0e0,
00871   0x5f1ae274, 0xaa54f2ba, 0x5f0a0e77, 0xaa4247e1, 0x5ef936d1, 0xaa2fa056,
00872   0x5ee85b82, 0xaa1cfc1a,
00873   0x5ed77c8a, 0xaa0a5b2e, 0x5ec699e9, 0xa9f7bd92, 0x5eb5b3a2, 0xa9e52347,
00874   0x5ea4c9b3, 0xa9d28c4e,
00875   0x5e93dc1f, 0xa9bff8a8, 0x5e82eae5, 0xa9ad6855, 0x5e71f606, 0xa99adb56,
00876   0x5e60fd84, 0xa98851ac,
00877   0x5e50015d, 0xa975cb57, 0x5e3f0194, 0xa9634858, 0x5e2dfe29, 0xa950c8b0,
00878   0x5e1cf71c, 0xa93e4c5f,
00879   0x5e0bec6e, 0xa92bd367, 0x5dfade20, 0xa9195dc7, 0x5de9cc33, 0xa906eb82,
00880   0x5dd8b6a7, 0xa8f47c97,
00881   0x5dc79d7c, 0xa8e21106, 0x5db680b4, 0xa8cfa8d2, 0x5da5604f, 0xa8bd43fa,
00882   0x5d943c4e, 0xa8aae280,
00883   0x5d8314b1, 0xa8988463, 0x5d71e979, 0xa88629a5, 0x5d60baa7, 0xa873d246,
00884   0x5d4f883b, 0xa8617e48,
00885   0x5d3e5237, 0xa84f2daa, 0x5d2d189a, 0xa83ce06e, 0x5d1bdb65, 0xa82a9693,
00886   0x5d0a9a9a, 0xa818501c,
00887   0x5cf95638, 0xa8060d08, 0x5ce80e41, 0xa7f3cd59, 0x5cd6c2b5, 0xa7e1910f,
00888   0x5cc57394, 0xa7cf582a,
00889   0x5cb420e0, 0xa7bd22ac, 0x5ca2ca99, 0xa7aaf094, 0x5c9170bf, 0xa798c1e5,
00890   0x5c801354, 0xa786969e,
00891   0x5c6eb258, 0xa7746ec0, 0x5c5d4dcc, 0xa7624a4d, 0x5c4be5b0, 0xa7502943,
00892   0x5c3a7a05, 0xa73e0ba5,
00893   0x5c290acc, 0xa72bf174, 0x5c179806, 0xa719daae, 0x5c0621b2, 0xa707c757,
00894   0x5bf4a7d2, 0xa6f5b76d,
00895   0x5be32a67, 0xa6e3aaf2, 0x5bd1a971, 0xa6d1a1e7, 0x5bc024f0, 0xa6bf9c4b,
00896   0x5bae9ce7, 0xa6ad9a21,
00897   0x5b9d1154, 0xa69b9b68, 0x5b8b8239, 0xa689a022, 0x5b79ef96, 0xa677a84e,
00898   0x5b68596d, 0xa665b3ee,
00899   0x5b56bfbd, 0xa653c303, 0x5b452288, 0xa641d58c, 0x5b3381ce, 0xa62feb8b,
00900   0x5b21dd90, 0xa61e0501,
00901   0x5b1035cf, 0xa60c21ee, 0x5afe8a8b, 0xa5fa4252, 0x5aecdbc5, 0xa5e8662f,
00902   0x5adb297d, 0xa5d68d85,
00903   0x5ac973b5, 0xa5c4b855, 0x5ab7ba6c, 0xa5b2e6a0, 0x5aa5fda5, 0xa5a11866,
00904   0x5a943d5e, 0xa58f4da8,
00905   0x5a82799a, 0xa57d8666, 0x5a70b258, 0xa56bc2a2, 0x5a5ee79a, 0xa55a025b,
00906   0x5a4d1960, 0xa5484594,
00907   0x5a3b47ab, 0xa5368c4b, 0x5a29727b, 0xa524d683, 0x5a1799d1, 0xa513243b,
00908   0x5a05bdae, 0xa5017575,
00909   0x59f3de12, 0xa4efca31, 0x59e1faff, 0xa4de2270, 0x59d01475, 0xa4cc7e32,
00910   0x59be2a74, 0xa4badd78,
00911   0x59ac3cfd, 0xa4a94043, 0x599a4c12, 0xa497a693, 0x598857b2, 0xa486106a,
00912   0x59765fde, 0xa4747dc7,
00913   0x59646498, 0xa462eeac, 0x595265df, 0xa4516319, 0x594063b5, 0xa43fdb10,
00914   0x592e5e19, 0xa42e568f,
00915   0x591c550e, 0xa41cd599, 0x590a4893, 0xa40b582e, 0x58f838a9, 0xa3f9de4e,
00916   0x58e62552, 0xa3e867fa,
00917   0x58d40e8c, 0xa3d6f534, 0x58c1f45b, 0xa3c585fb, 0x58afd6bd, 0xa3b41a50,
00918   0x589db5b3, 0xa3a2b234,
00919   0x588b9140, 0xa3914da8, 0x58796962, 0xa37fecac, 0x58673e1b, 0xa36e8f41,
00920   0x58550f6c, 0xa35d3567,
00921   0x5842dd54, 0xa34bdf20, 0x5830a7d6, 0xa33a8c6c, 0x581e6ef1, 0xa3293d4b,
00922   0x580c32a7, 0xa317f1bf,
00923   0x57f9f2f8, 0xa306a9c8, 0x57e7afe4, 0xa2f56566, 0x57d5696d, 0xa2e4249b,
00924   0x57c31f92, 0xa2d2e766,
00925   0x57b0d256, 0xa2c1adc9, 0x579e81b8, 0xa2b077c5, 0x578c2dba, 0xa29f4559,
00926   0x5779d65b, 0xa28e1687,
00927   0x57677b9d, 0xa27ceb4f, 0x57551d80, 0xa26bc3b2, 0x5742bc06, 0xa25a9fb1,
00928   0x5730572e, 0xa2497f4c,
00929   0x571deefa, 0xa2386284, 0x570b8369, 0xa2274959, 0x56f9147e, 0xa21633cd,
00930   0x56e6a239, 0xa20521e0,
00931   0x56d42c99, 0xa1f41392, 0x56c1b3a1, 0xa1e308e4, 0x56af3750, 0xa1d201d7,
00932   0x569cb7a8, 0xa1c0fe6c,
00933   0x568a34a9, 0xa1affea3, 0x5677ae54, 0xa19f027c, 0x566524aa, 0xa18e09fa,
00934   0x565297ab, 0xa17d151b,
00935   0x56400758, 0xa16c23e1, 0x562d73b2, 0xa15b364d, 0x561adcb9, 0xa14a4c5e,
00936   0x5608426e, 0xa1396617,
00937   0x55f5a4d2, 0xa1288376, 0x55e303e6, 0xa117a47e, 0x55d05faa, 0xa106c92f,
00938   0x55bdb81f, 0xa0f5f189,
00939   0x55ab0d46, 0xa0e51d8c, 0x55985f20, 0xa0d44d3b, 0x5585adad, 0xa0c38095,
00940   0x5572f8ed, 0xa0b2b79b,
00941   0x556040e2, 0xa0a1f24d, 0x554d858d, 0xa09130ad, 0x553ac6ee, 0xa08072ba,
00942   0x55280505, 0xa06fb876,
00943   0x55153fd4, 0xa05f01e1, 0x5502775c, 0xa04e4efc, 0x54efab9c, 0xa03d9fc8,
00944   0x54dcdc96, 0xa02cf444,
00945   0x54ca0a4b, 0xa01c4c73, 0x54b734ba, 0xa00ba853, 0x54a45be6, 0x9ffb07e7,
00946   0x54917fce, 0x9fea6b2f,
00947   0x547ea073, 0x9fd9d22a, 0x546bbdd7, 0x9fc93cdb, 0x5458d7f9, 0x9fb8ab41,
00948   0x5445eedb, 0x9fa81d5e,
00949   0x5433027d, 0x9f979331, 0x542012e1, 0x9f870cbc, 0x540d2005, 0x9f7689ff,
00950   0x53fa29ed, 0x9f660afb,
00951   0x53e73097, 0x9f558fb0, 0x53d43406, 0x9f45181f, 0x53c13439, 0x9f34a449,
00952   0x53ae3131, 0x9f24342f,
00953   0x539b2af0, 0x9f13c7d0, 0x53882175, 0x9f035f2e, 0x537514c2, 0x9ef2fa49,
00954   0x536204d7, 0x9ee29922,
00955   0x534ef1b5, 0x9ed23bb9, 0x533bdb5d, 0x9ec1e210, 0x5328c1d0, 0x9eb18c26,
00956   0x5315a50e, 0x9ea139fd,
00957   0x53028518, 0x9e90eb94, 0x52ef61ee, 0x9e80a0ee, 0x52dc3b92, 0x9e705a09,
00958   0x52c91204, 0x9e6016e8,
00959   0x52b5e546, 0x9e4fd78a, 0x52a2b556, 0x9e3f9bf0, 0x528f8238, 0x9e2f641b,
00960   0x527c4bea, 0x9e1f300b,
00961   0x5269126e, 0x9e0effc1, 0x5255d5c5, 0x9dfed33e, 0x524295f0, 0x9deeaa82,
00962   0x522f52ee, 0x9dde858e,
00963   0x521c0cc2, 0x9dce6463, 0x5208c36a, 0x9dbe4701, 0x51f576ea, 0x9dae2d68,
00964   0x51e22740, 0x9d9e179a,
00965   0x51ced46e, 0x9d8e0597, 0x51bb7e75, 0x9d7df75f, 0x51a82555, 0x9d6decf4,
00966   0x5194c910, 0x9d5de656,
00967   0x518169a5, 0x9d4de385, 0x516e0715, 0x9d3de482, 0x515aa162, 0x9d2de94d,
00968   0x5147388c, 0x9d1df1e9,
00969   0x5133cc94, 0x9d0dfe54, 0x51205d7b, 0x9cfe0e8f, 0x510ceb40, 0x9cee229c,
00970   0x50f975e6, 0x9cde3a7b,
00971   0x50e5fd6d, 0x9cce562c, 0x50d281d5, 0x9cbe75b0, 0x50bf031f, 0x9cae9907,
00972   0x50ab814d, 0x9c9ec033,
00973   0x5097fc5e, 0x9c8eeb34, 0x50847454, 0x9c7f1a0a, 0x5070e92f, 0x9c6f4cb6,
00974   0x505d5af1, 0x9c5f8339,
00975   0x5049c999, 0x9c4fbd93, 0x50363529, 0x9c3ffbc5, 0x50229da1, 0x9c303dcf,
00976   0x500f0302, 0x9c2083b3,
00977   0x4ffb654d, 0x9c10cd70, 0x4fe7c483, 0x9c011b08, 0x4fd420a4, 0x9bf16c7a,
00978   0x4fc079b1, 0x9be1c1c8,
00979   0x4faccfab, 0x9bd21af3, 0x4f992293, 0x9bc277fa, 0x4f857269, 0x9bb2d8de,
00980   0x4f71bf2e, 0x9ba33da0,
00981   0x4f5e08e3, 0x9b93a641, 0x4f4a4f89, 0x9b8412c1, 0x4f369320, 0x9b748320,
00982   0x4f22d3aa, 0x9b64f760,
00983   0x4f0f1126, 0x9b556f81, 0x4efb4b96, 0x9b45eb83, 0x4ee782fb, 0x9b366b68,
00984   0x4ed3b755, 0x9b26ef2f,
00985   0x4ebfe8a5, 0x9b1776da, 0x4eac16eb, 0x9b080268, 0x4e984229, 0x9af891db,
00986   0x4e846a60, 0x9ae92533,
00987   0x4e708f8f, 0x9ad9bc71, 0x4e5cb1b9, 0x9aca5795, 0x4e48d0dd, 0x9abaf6a1,
00988   0x4e34ecfc, 0x9aab9993,
00989   0x4e210617, 0x9a9c406e, 0x4e0d1c30, 0x9a8ceb31, 0x4df92f46, 0x9a7d99de,
00990   0x4de53f5a, 0x9a6e4c74,
00991   0x4dd14c6e, 0x9a5f02f5, 0x4dbd5682, 0x9a4fbd61, 0x4da95d96, 0x9a407bb9,
00992   0x4d9561ac, 0x9a313dfc,
00993   0x4d8162c4, 0x9a22042d, 0x4d6d60df, 0x9a12ce4b, 0x4d595bfe, 0x9a039c57,
00994   0x4d455422, 0x99f46e51,
00995   0x4d31494b, 0x99e5443b, 0x4d1d3b7a, 0x99d61e14, 0x4d092ab0, 0x99c6fbde,
00996   0x4cf516ee, 0x99b7dd99,
00997   0x4ce10034, 0x99a8c345, 0x4ccce684, 0x9999ace3, 0x4cb8c9dd, 0x998a9a74,
00998   0x4ca4aa41, 0x997b8bf8,
00999   0x4c9087b1, 0x996c816f, 0x4c7c622d, 0x995d7adc, 0x4c6839b7, 0x994e783d,
01000   0x4c540e4e, 0x993f7993,
01001   0x4c3fdff4, 0x99307ee0, 0x4c2baea9, 0x99218824, 0x4c177a6e, 0x9912955f,
01002   0x4c034345, 0x9903a691,
01003   0x4bef092d, 0x98f4bbbc, 0x4bdacc28, 0x98e5d4e0, 0x4bc68c36, 0x98d6f1fe,
01004   0x4bb24958, 0x98c81316,
01005   0x4b9e0390, 0x98b93828, 0x4b89badd, 0x98aa6136, 0x4b756f40, 0x989b8e40,
01006   0x4b6120bb, 0x988cbf46,
01007   0x4b4ccf4d, 0x987df449, 0x4b387af9, 0x986f2d4a, 0x4b2423be, 0x98606a49,
01008   0x4b0fc99d, 0x9851ab46,
01009   0x4afb6c98, 0x9842f043, 0x4ae70caf, 0x98343940, 0x4ad2a9e2, 0x9825863d,
01010   0x4abe4433, 0x9816d73b,
01011   0x4aa9dba2, 0x98082c3b, 0x4a957030, 0x97f9853d, 0x4a8101de, 0x97eae242,
01012   0x4a6c90ad, 0x97dc4349,
01013   0x4a581c9e, 0x97cda855, 0x4a43a5b0, 0x97bf1165, 0x4a2f2be6, 0x97b07e7a,
01014   0x4a1aaf3f, 0x97a1ef94,
01015   0x4a062fbd, 0x979364b5, 0x49f1ad61, 0x9784dddc, 0x49dd282a, 0x97765b0a,
01016   0x49c8a01b, 0x9767dc41,
01017   0x49b41533, 0x9759617f, 0x499f8774, 0x974aeac6, 0x498af6df, 0x973c7817,
01018   0x49766373, 0x972e0971,
01019   0x4961cd33, 0x971f9ed7, 0x494d341e, 0x97113847, 0x49389836, 0x9702d5c3,
01020   0x4923f97b, 0x96f4774b,
01021   0x490f57ee, 0x96e61ce0, 0x48fab391, 0x96d7c682, 0x48e60c62, 0x96c97432,
01022   0x48d16265, 0x96bb25f0,
01023   0x48bcb599, 0x96acdbbe, 0x48a805ff, 0x969e959b, 0x48935397, 0x96905388,
01024   0x487e9e64, 0x96821585,
01025   0x4869e665, 0x9673db94, 0x48552b9b, 0x9665a5b4, 0x48406e08, 0x965773e7,
01026   0x482badab, 0x9649462d,
01027   0x4816ea86, 0x963b1c86, 0x48022499, 0x962cf6f2, 0x47ed5be6, 0x961ed574,
01028   0x47d8906d, 0x9610b80a,
01029   0x47c3c22f, 0x96029eb6, 0x47aef12c, 0x95f48977, 0x479a1d67, 0x95e67850,
01030   0x478546de, 0x95d86b3f,
01031   0x47706d93, 0x95ca6247, 0x475b9188, 0x95bc5d66, 0x4746b2bc, 0x95ae5c9f,
01032   0x4731d131, 0x95a05ff0,
01033   0x471cece7, 0x9592675c, 0x470805df, 0x958472e2, 0x46f31c1a, 0x95768283,
01034   0x46de2f99, 0x9568963f,
01035   0x46c9405c, 0x955aae17, 0x46b44e65, 0x954cca0c, 0x469f59b4, 0x953eea1e,
01036   0x468a624a, 0x95310e4e,
01037   0x46756828, 0x9523369c, 0x46606b4e, 0x95156308, 0x464b6bbe, 0x95079394,
01038   0x46366978, 0x94f9c83f,
01039   0x4621647d, 0x94ec010b, 0x460c5cce, 0x94de3df8, 0x45f7526b, 0x94d07f05,
01040   0x45e24556, 0x94c2c435,
01041   0x45cd358f, 0x94b50d87, 0x45b82318, 0x94a75afd, 0x45a30df0, 0x9499ac95,
01042   0x458df619, 0x948c0252,
01043   0x4578db93, 0x947e5c33, 0x4563be60, 0x9470ba39, 0x454e9e80, 0x94631c65,
01044   0x45397bf4, 0x945582b7,
01045   0x452456bd, 0x9447ed2f, 0x450f2edb, 0x943a5bcf, 0x44fa0450, 0x942cce96,
01046   0x44e4d71c, 0x941f4585,
01047   0x44cfa740, 0x9411c09e, 0x44ba74bd, 0x94043fdf, 0x44a53f93, 0x93f6c34a,
01048   0x449007c4, 0x93e94adf,
01049   0x447acd50, 0x93dbd6a0, 0x44659039, 0x93ce668b, 0x4450507e, 0x93c0faa3,
01050   0x443b0e21, 0x93b392e6,
01051   0x4425c923, 0x93a62f57, 0x44108184, 0x9398cff5, 0x43fb3746, 0x938b74c1,
01052   0x43e5ea68, 0x937e1dbb,
01053   0x43d09aed, 0x9370cae4, 0x43bb48d4, 0x93637c3d, 0x43a5f41e, 0x935631c5,
01054   0x43909ccd, 0x9348eb7e,
01055   0x437b42e1, 0x933ba968, 0x4365e65b, 0x932e6b84, 0x4350873c, 0x932131d1,
01056   0x433b2585, 0x9313fc51,
01057   0x4325c135, 0x9306cb04, 0x43105a50, 0x92f99deb, 0x42faf0d4, 0x92ec7505,
01058   0x42e584c3, 0x92df5054,
01059   0x42d0161e, 0x92d22fd9, 0x42baa4e6, 0x92c51392, 0x42a5311b, 0x92b7fb82,
01060   0x428fbabe, 0x92aae7a8,
01061   0x427a41d0, 0x929dd806, 0x4264c653, 0x9290cc9b, 0x424f4845, 0x9283c568,
01062   0x4239c7aa, 0x9276c26d,
01063   0x42244481, 0x9269c3ac, 0x420ebecb, 0x925cc924, 0x41f93689, 0x924fd2d7,
01064   0x41e3abbc, 0x9242e0c4,
01065   0x41ce1e65, 0x9235f2ec, 0x41b88e84, 0x9229094f, 0x41a2fc1a, 0x921c23ef,
01066   0x418d6729, 0x920f42cb,
01067   0x4177cfb1, 0x920265e4, 0x416235b2, 0x91f58d3b, 0x414c992f, 0x91e8b8d0,
01068   0x4136fa27, 0x91dbe8a4,
01069   0x4121589b, 0x91cf1cb6, 0x410bb48c, 0x91c25508, 0x40f60dfb, 0x91b5919a,
01070   0x40e064ea, 0x91a8d26d,
01071   0x40cab958, 0x919c1781, 0x40b50b46, 0x918f60d6, 0x409f5ab6, 0x9182ae6d,
01072   0x4089a7a8, 0x91760047,
01073   0x4073f21d, 0x91695663, 0x405e3a16, 0x915cb0c3, 0x40487f94, 0x91500f67,
01074   0x4032c297, 0x91437250,
01075   0x401d0321, 0x9136d97d, 0x40074132, 0x912a44f0, 0x3ff17cca, 0x911db4a9,
01076   0x3fdbb5ec, 0x911128a8,
01077   0x3fc5ec98, 0x9104a0ee, 0x3fb020ce, 0x90f81d7b, 0x3f9a5290, 0x90eb9e50,
01078   0x3f8481dd, 0x90df236e,
01079   0x3f6eaeb8, 0x90d2acd4, 0x3f58d921, 0x90c63a83, 0x3f430119, 0x90b9cc7d,
01080   0x3f2d26a0, 0x90ad62c0,
01081   0x3f1749b8, 0x90a0fd4e, 0x3f016a61, 0x90949c28, 0x3eeb889c, 0x90883f4d,
01082   0x3ed5a46b, 0x907be6be,
01083   0x3ebfbdcd, 0x906f927c, 0x3ea9d4c3, 0x90634287, 0x3e93e950, 0x9056f6df,
01084   0x3e7dfb73, 0x904aaf86,
01085   0x3e680b2c, 0x903e6c7b, 0x3e52187f, 0x90322dbf, 0x3e3c2369, 0x9025f352,
01086   0x3e262bee, 0x9019bd36,
01087   0x3e10320d, 0x900d8b69, 0x3dfa35c8, 0x90015dee, 0x3de4371f, 0x8ff534c4,
01088   0x3dce3614, 0x8fe90fec,
01089   0x3db832a6, 0x8fdcef66, 0x3da22cd7, 0x8fd0d333, 0x3d8c24a8, 0x8fc4bb53,
01090   0x3d761a19, 0x8fb8a7c7,
01091   0x3d600d2c, 0x8fac988f, 0x3d49fde1, 0x8fa08dab, 0x3d33ec39, 0x8f94871d,
01092   0x3d1dd835, 0x8f8884e4,
01093   0x3d07c1d6, 0x8f7c8701, 0x3cf1a91c, 0x8f708d75, 0x3cdb8e09, 0x8f649840,
01094   0x3cc5709e, 0x8f58a761,
01095   0x3caf50da, 0x8f4cbadb, 0x3c992ec0, 0x8f40d2ad, 0x3c830a50, 0x8f34eed8,
01096   0x3c6ce38a, 0x8f290f5c,
01097   0x3c56ba70, 0x8f1d343a, 0x3c408f03, 0x8f115d72, 0x3c2a6142, 0x8f058b04,
01098   0x3c143130, 0x8ef9bcf2,
01099   0x3bfdfecd, 0x8eedf33b, 0x3be7ca1a, 0x8ee22de0, 0x3bd19318, 0x8ed66ce1,
01100   0x3bbb59c7, 0x8ecab040,
01101   0x3ba51e29, 0x8ebef7fb, 0x3b8ee03e, 0x8eb34415, 0x3b78a007, 0x8ea7948c,
01102   0x3b625d86, 0x8e9be963,
01103   0x3b4c18ba, 0x8e904298, 0x3b35d1a5, 0x8e84a02d, 0x3b1f8848, 0x8e790222,
01104   0x3b093ca3, 0x8e6d6877,
01105   0x3af2eeb7, 0x8e61d32e, 0x3adc9e86, 0x8e564246, 0x3ac64c0f, 0x8e4ab5bf,
01106   0x3aaff755, 0x8e3f2d9b,
01107   0x3a99a057, 0x8e33a9da, 0x3a834717, 0x8e282a7b, 0x3a6ceb96, 0x8e1caf80,
01108   0x3a568dd4, 0x8e1138ea,
01109   0x3a402dd2, 0x8e05c6b7, 0x3a29cb91, 0x8dfa58ea, 0x3a136712, 0x8deeef82,
01110   0x39fd0056, 0x8de38a80,
01111   0x39e6975e, 0x8dd829e4, 0x39d02c2a, 0x8dcccdaf, 0x39b9bebc, 0x8dc175e0,
01112   0x39a34f13, 0x8db6227a,
01113   0x398cdd32, 0x8daad37b, 0x39766919, 0x8d9f88e5, 0x395ff2c9, 0x8d9442b8,
01114   0x39497a43, 0x8d8900f3,
01115   0x3932ff87, 0x8d7dc399, 0x391c8297, 0x8d728aa9, 0x39060373, 0x8d675623,
01116   0x38ef821c, 0x8d5c2609,
01117   0x38d8fe93, 0x8d50fa59, 0x38c278d9, 0x8d45d316, 0x38abf0ef, 0x8d3ab03f,
01118   0x389566d6, 0x8d2f91d5,
01119   0x387eda8e, 0x8d2477d8, 0x38684c19, 0x8d196249, 0x3851bb77, 0x8d0e5127,
01120   0x383b28a9, 0x8d034474,
01121   0x382493b0, 0x8cf83c30, 0x380dfc8d, 0x8ced385b, 0x37f76341, 0x8ce238f6,
01122   0x37e0c7cc, 0x8cd73e01,
01123   0x37ca2a30, 0x8ccc477d, 0x37b38a6d, 0x8cc1556a, 0x379ce885, 0x8cb667c8,
01124   0x37864477, 0x8cab7e98,
01125   0x376f9e46, 0x8ca099da, 0x3758f5f2, 0x8c95b98f, 0x37424b7b, 0x8c8addb7,
01126   0x372b9ee3, 0x8c800652,
01127   0x3714f02a, 0x8c753362, 0x36fe3f52, 0x8c6a64e5, 0x36e78c5b, 0x8c5f9ade,
01128   0x36d0d746, 0x8c54d54c,
01129   0x36ba2014, 0x8c4a142f, 0x36a366c6, 0x8c3f5788, 0x368cab5c, 0x8c349f58,
01130   0x3675edd9, 0x8c29eb9f,
01131   0x365f2e3b, 0x8c1f3c5d, 0x36486c86, 0x8c149192, 0x3631a8b8, 0x8c09eb40,
01132   0x361ae2d3, 0x8bff4966,
01133   0x36041ad9, 0x8bf4ac05, 0x35ed50c9, 0x8bea131e, 0x35d684a6, 0x8bdf7eb0,
01134   0x35bfb66e, 0x8bd4eebc,
01135   0x35a8e625, 0x8bca6343, 0x359213c9, 0x8bbfdc44, 0x357b3f5d, 0x8bb559c1,
01136   0x356468e2, 0x8baadbba,
01137   0x354d9057, 0x8ba0622f, 0x3536b5be, 0x8b95ed21, 0x351fd918, 0x8b8b7c8f,
01138   0x3508fa66, 0x8b81107b,
01139   0x34f219a8, 0x8b76a8e4, 0x34db36df, 0x8b6c45cc, 0x34c4520d, 0x8b61e733,
01140   0x34ad6b32, 0x8b578d18,
01141   0x34968250, 0x8b4d377c, 0x347f9766, 0x8b42e661, 0x3468aa76, 0x8b3899c6,
01142   0x3451bb81, 0x8b2e51ab,
01143   0x343aca87, 0x8b240e11, 0x3423d78a, 0x8b19cef8, 0x340ce28b, 0x8b0f9462,
01144   0x33f5eb89, 0x8b055e4d,
01145   0x33def287, 0x8afb2cbb, 0x33c7f785, 0x8af0ffac, 0x33b0fa84, 0x8ae6d720,
01146   0x3399fb85, 0x8adcb318,
01147   0x3382fa88, 0x8ad29394, 0x336bf78f, 0x8ac87894, 0x3354f29b, 0x8abe6219,
01148   0x333debab, 0x8ab45024,
01149   0x3326e2c3, 0x8aaa42b4, 0x330fd7e1, 0x8aa039cb, 0x32f8cb07, 0x8a963567,
01150   0x32e1bc36, 0x8a8c358b,
01151   0x32caab6f, 0x8a823a36, 0x32b398b3, 0x8a784368, 0x329c8402, 0x8a6e5123,
01152   0x32856d5e, 0x8a646365,
01153   0x326e54c7, 0x8a5a7a31, 0x32573a3f, 0x8a509585, 0x32401dc6, 0x8a46b564,
01154   0x3228ff5c, 0x8a3cd9cc,
01155   0x3211df04, 0x8a3302be, 0x31fabcbd, 0x8a29303b, 0x31e39889, 0x8a1f6243,
01156   0x31cc7269, 0x8a1598d6,
01157   0x31b54a5e, 0x8a0bd3f5, 0x319e2067, 0x8a0213a0, 0x3186f487, 0x89f857d8,
01158   0x316fc6be, 0x89eea09d,
01159   0x3158970e, 0x89e4edef, 0x31416576, 0x89db3fcf, 0x312a31f8, 0x89d1963c,
01160   0x3112fc95, 0x89c7f138,
01161   0x30fbc54d, 0x89be50c3, 0x30e48c22, 0x89b4b4dd, 0x30cd5115, 0x89ab1d87,
01162   0x30b61426, 0x89a18ac0,
01163   0x309ed556, 0x8997fc8a, 0x308794a6, 0x898e72e4, 0x30705217, 0x8984edcf,
01164   0x30590dab, 0x897b6d4c,
01165   0x3041c761, 0x8971f15a, 0x302a7f3a, 0x896879fb, 0x30133539, 0x895f072e,
01166   0x2ffbe95d, 0x895598f3,
01167   0x2fe49ba7, 0x894c2f4c, 0x2fcd4c19, 0x8942ca39, 0x2fb5fab2, 0x893969b9,
01168   0x2f9ea775, 0x89300dce,
01169   0x2f875262, 0x8926b677, 0x2f6ffb7a, 0x891d63b5, 0x2f58a2be, 0x89141589,
01170   0x2f41482e, 0x890acbf2,
01171   0x2f29ebcc, 0x890186f2, 0x2f128d99, 0x88f84687, 0x2efb2d95, 0x88ef0ab4,
01172   0x2ee3cbc1, 0x88e5d378,
01173   0x2ecc681e, 0x88dca0d3, 0x2eb502ae, 0x88d372c6, 0x2e9d9b70, 0x88ca4951,
01174   0x2e863267, 0x88c12475,
01175   0x2e6ec792, 0x88b80432, 0x2e575af3, 0x88aee888, 0x2e3fec8b, 0x88a5d177,
01176   0x2e287c5a, 0x889cbf01,
01177   0x2e110a62, 0x8893b125, 0x2df996a3, 0x888aa7e3, 0x2de2211e, 0x8881a33d,
01178   0x2dcaa9d5, 0x8878a332,
01179   0x2db330c7, 0x886fa7c2, 0x2d9bb5f6, 0x8866b0ef, 0x2d843964, 0x885dbeb8,
01180   0x2d6cbb10, 0x8854d11e,
01181   0x2d553afc, 0x884be821, 0x2d3db928, 0x884303c1, 0x2d263596, 0x883a23ff,
01182   0x2d0eb046, 0x883148db,
01183   0x2cf72939, 0x88287256, 0x2cdfa071, 0x881fa06f, 0x2cc815ee, 0x8816d327,
01184   0x2cb089b1, 0x880e0a7f,
01185   0x2c98fbba, 0x88054677, 0x2c816c0c, 0x87fc870f, 0x2c69daa6, 0x87f3cc48,
01186   0x2c52478a, 0x87eb1621,
01187   0x2c3ab2b9, 0x87e2649b, 0x2c231c33, 0x87d9b7b7, 0x2c0b83fa, 0x87d10f75,
01188   0x2bf3ea0d, 0x87c86bd5,
01189   0x2bdc4e6f, 0x87bfccd7, 0x2bc4b120, 0x87b7327d, 0x2bad1221, 0x87ae9cc5,
01190   0x2b957173, 0x87a60bb1,
01191   0x2b7dcf17, 0x879d7f41, 0x2b662b0e, 0x8794f774, 0x2b4e8558, 0x878c744d,
01192   0x2b36ddf7, 0x8783f5ca,
01193   0x2b1f34eb, 0x877b7bec, 0x2b078a36, 0x877306b4, 0x2aefddd8, 0x876a9621,
01194   0x2ad82fd2, 0x87622a35,
01195   0x2ac08026, 0x8759c2ef, 0x2aa8ced3, 0x87516050, 0x2a911bdc, 0x87490258,
01196   0x2a796740, 0x8740a907,
01197   0x2a61b101, 0x8738545e, 0x2a49f920, 0x8730045d, 0x2a323f9e, 0x8727b905,
01198   0x2a1a847b, 0x871f7255,
01199   0x2a02c7b8, 0x8717304e, 0x29eb0957, 0x870ef2f1, 0x29d34958, 0x8706ba3d,
01200   0x29bb87bc, 0x86fe8633,
01201   0x29a3c485, 0x86f656d3, 0x298bffb2, 0x86ee2c1e, 0x29743946, 0x86e60614,
01202   0x295c7140, 0x86dde4b5,
01203   0x2944a7a2, 0x86d5c802, 0x292cdc6d, 0x86cdaffa, 0x29150fa1, 0x86c59c9f,
01204   0x28fd4140, 0x86bd8df0,
01205   0x28e5714b, 0x86b583ee, 0x28cd9fc1, 0x86ad7e99, 0x28b5cca5, 0x86a57df2,
01206   0x289df7f8, 0x869d81f8,
01207   0x288621b9, 0x86958aac, 0x286e49ea, 0x868d980e, 0x2856708d, 0x8685aa20,
01208   0x283e95a1, 0x867dc0e0,
01209   0x2826b928, 0x8675dc4f, 0x280edb23, 0x866dfc6e, 0x27f6fb92, 0x8666213c,
01210   0x27df1a77, 0x865e4abb,
01211   0x27c737d3, 0x865678eb, 0x27af53a6, 0x864eabcb, 0x27976df1, 0x8646e35c,
01212   0x277f86b5, 0x863f1f9e,
01213   0x27679df4, 0x86376092, 0x274fb3ae, 0x862fa638, 0x2737c7e3, 0x8627f091,
01214   0x271fda96, 0x86203f9c,
01215   0x2707ebc7, 0x86189359, 0x26effb76, 0x8610ebca, 0x26d809a5, 0x860948ef,
01216   0x26c01655, 0x8601aac7,
01217   0x26a82186, 0x85fa1153, 0x26902b39, 0x85f27c93, 0x26783370, 0x85eaec88,
01218   0x26603a2c, 0x85e36132,
01219   0x26483f6c, 0x85dbda91, 0x26304333, 0x85d458a6, 0x26184581, 0x85ccdb70,
01220   0x26004657, 0x85c562f1,
01221   0x25e845b6, 0x85bdef28, 0x25d0439f, 0x85b68015, 0x25b84012, 0x85af15b9,
01222   0x25a03b11, 0x85a7b015,
01223   0x2588349d, 0x85a04f28, 0x25702cb7, 0x8598f2f3, 0x2558235f, 0x85919b76,
01224   0x25401896, 0x858a48b1,
01225   0x25280c5e, 0x8582faa5, 0x250ffeb7, 0x857bb152, 0x24f7efa2, 0x85746cb8,
01226   0x24dfdf20, 0x856d2cd7,
01227   0x24c7cd33, 0x8565f1b0, 0x24afb9da, 0x855ebb44, 0x2497a517, 0x85578991,
01228   0x247f8eec, 0x85505c99,
01229   0x24677758, 0x8549345c, 0x244f5e5c, 0x854210db, 0x243743fa, 0x853af214,
01230   0x241f2833, 0x8533d809,
01231   0x24070b08, 0x852cc2bb, 0x23eeec78, 0x8525b228, 0x23d6cc87, 0x851ea652,
01232   0x23beab33, 0x85179f39,
01233   0x23a6887f, 0x85109cdd, 0x238e646a, 0x85099f3e, 0x23763ef7, 0x8502a65c,
01234   0x235e1826, 0x84fbb239,
01235   0x2345eff8, 0x84f4c2d4, 0x232dc66d, 0x84edd82d, 0x23159b88, 0x84e6f244,
01236   0x22fd6f48, 0x84e0111b,
01237   0x22e541af, 0x84d934b1, 0x22cd12bd, 0x84d25d06, 0x22b4e274, 0x84cb8a1b,
01238   0x229cb0d5, 0x84c4bbf0,
01239   0x22847de0, 0x84bdf286, 0x226c4996, 0x84b72ddb, 0x225413f8, 0x84b06df2,
01240   0x223bdd08, 0x84a9b2ca,
01241   0x2223a4c5, 0x84a2fc62, 0x220b6b32, 0x849c4abd, 0x21f3304f, 0x84959dd9,
01242   0x21daf41d, 0x848ef5b7,
01243   0x21c2b69c, 0x84885258, 0x21aa77cf, 0x8481b3bb, 0x219237b5, 0x847b19e1,
01244   0x2179f64f, 0x847484ca,
01245   0x2161b3a0, 0x846df477, 0x21496fa7, 0x846768e7, 0x21312a65, 0x8460e21a,
01246   0x2118e3dc, 0x845a6012,
01247   0x21009c0c, 0x8453e2cf, 0x20e852f6, 0x844d6a50, 0x20d0089c, 0x8446f695,
01248   0x20b7bcfe, 0x844087a0,
01249   0x209f701c, 0x843a1d70, 0x208721f9, 0x8433b806, 0x206ed295, 0x842d5762,
01250   0x205681f1, 0x8426fb84,
01251   0x203e300d, 0x8420a46c, 0x2025dcec, 0x841a521a, 0x200d888d, 0x84140490,
01252   0x1ff532f2, 0x840dbbcc,
01253   0x1fdcdc1b, 0x840777d0, 0x1fc4840a, 0x8401389b, 0x1fac2abf, 0x83fafe2e,
01254   0x1f93d03c, 0x83f4c889,
01255   0x1f7b7481, 0x83ee97ad, 0x1f63178f, 0x83e86b99, 0x1f4ab968, 0x83e2444d,
01256   0x1f325a0b, 0x83dc21cb,
01257   0x1f19f97b, 0x83d60412, 0x1f0197b8, 0x83cfeb22, 0x1ee934c3, 0x83c9d6fc,
01258   0x1ed0d09d, 0x83c3c7a0,
01259   0x1eb86b46, 0x83bdbd0e, 0x1ea004c1, 0x83b7b746, 0x1e879d0d, 0x83b1b649,
01260   0x1e6f342c, 0x83abba17,
01261   0x1e56ca1e, 0x83a5c2b0, 0x1e3e5ee5, 0x839fd014, 0x1e25f282, 0x8399e244,
01262   0x1e0d84f5, 0x8393f940,
01263   0x1df5163f, 0x838e1507, 0x1ddca662, 0x8388359b, 0x1dc4355e, 0x83825afb,
01264   0x1dabc334, 0x837c8528,
01265   0x1d934fe5, 0x8376b422, 0x1d7adb73, 0x8370e7e9, 0x1d6265dd, 0x836b207d,
01266   0x1d49ef26, 0x83655ddf,
01267   0x1d31774d, 0x835fa00f, 0x1d18fe54, 0x8359e70d, 0x1d00843d, 0x835432d8,
01268   0x1ce80906, 0x834e8373,
01269   0x1ccf8cb3, 0x8348d8dc, 0x1cb70f43, 0x83433314, 0x1c9e90b8, 0x833d921b,
01270   0x1c861113, 0x8337f5f1,
01271   0x1c6d9053, 0x83325e97, 0x1c550e7c, 0x832ccc0d, 0x1c3c8b8c, 0x83273e52,
01272   0x1c240786, 0x8321b568,
01273   0x1c0b826a, 0x831c314e, 0x1bf2fc3a, 0x8316b205, 0x1bda74f6, 0x8311378d,
01274   0x1bc1ec9e, 0x830bc1e6,
01275   0x1ba96335, 0x83065110, 0x1b90d8bb, 0x8300e50b, 0x1b784d30, 0x82fb7dd8,
01276   0x1b5fc097, 0x82f61b77,
01277   0x1b4732ef, 0x82f0bde8, 0x1b2ea43a, 0x82eb652b, 0x1b161479, 0x82e61141,
01278   0x1afd83ad, 0x82e0c22a,
01279   0x1ae4f1d6, 0x82db77e5, 0x1acc5ef6, 0x82d63274, 0x1ab3cb0d, 0x82d0f1d5,
01280   0x1a9b361d, 0x82cbb60b,
01281   0x1a82a026, 0x82c67f14, 0x1a6a0929, 0x82c14cf1, 0x1a517128, 0x82bc1fa2,
01282   0x1a38d823, 0x82b6f727,
01283   0x1a203e1b, 0x82b1d381, 0x1a07a311, 0x82acb4b0, 0x19ef0707, 0x82a79ab3,
01284   0x19d669fc, 0x82a2858c,
01285   0x19bdcbf3, 0x829d753a, 0x19a52ceb, 0x829869be, 0x198c8ce7, 0x82936317,
01286   0x1973ebe6, 0x828e6146,
01287   0x195b49ea, 0x8289644b, 0x1942a6f3, 0x82846c26, 0x192a0304, 0x827f78d8,
01288   0x19115e1c, 0x827a8a61,
01289   0x18f8b83c, 0x8275a0c0, 0x18e01167, 0x8270bbf7, 0x18c7699b, 0x826bdc04,
01290   0x18aec0db, 0x826700e9,
01291   0x18961728, 0x82622aa6, 0x187d6c82, 0x825d593a, 0x1864c0ea, 0x82588ca7,
01292   0x184c1461, 0x8253c4eb,
01293   0x183366e9, 0x824f0208, 0x181ab881, 0x824a43fe, 0x1802092c, 0x82458acc,
01294   0x17e958ea, 0x8240d673,
01295   0x17d0a7bc, 0x823c26f3, 0x17b7f5a3, 0x82377c4c, 0x179f429f, 0x8232d67f,
01296   0x17868eb3, 0x822e358b,
01297   0x176dd9de, 0x82299971, 0x17552422, 0x82250232, 0x173c6d80, 0x82206fcc,
01298   0x1723b5f9, 0x821be240,
01299   0x170afd8d, 0x82175990, 0x16f2443e, 0x8212d5b9, 0x16d98a0c, 0x820e56be,
01300   0x16c0cef9, 0x8209dc9e,
01301   0x16a81305, 0x82056758, 0x168f5632, 0x8200f6ef, 0x1676987f, 0x81fc8b60,
01302   0x165dd9f0, 0x81f824ae,
01303   0x16451a83, 0x81f3c2d7, 0x162c5a3b, 0x81ef65dc, 0x16139918, 0x81eb0dbe,
01304   0x15fad71b, 0x81e6ba7c,
01305   0x15e21445, 0x81e26c16, 0x15c95097, 0x81de228d, 0x15b08c12, 0x81d9dde1,
01306   0x1597c6b7, 0x81d59e13,
01307   0x157f0086, 0x81d16321, 0x15663982, 0x81cd2d0c, 0x154d71aa, 0x81c8fbd6,
01308   0x1534a901, 0x81c4cf7d,
01309   0x151bdf86, 0x81c0a801, 0x1503153a, 0x81bc8564, 0x14ea4a1f, 0x81b867a5,
01310   0x14d17e36, 0x81b44ec4,
01311   0x14b8b17f, 0x81b03ac2, 0x149fe3fc, 0x81ac2b9e, 0x148715ae, 0x81a82159,
01312   0x146e4694, 0x81a41bf4,
01313   0x145576b1, 0x81a01b6d, 0x143ca605, 0x819c1fc5, 0x1423d492, 0x819828fd,
01314   0x140b0258, 0x81943715,
01315   0x13f22f58, 0x81904a0c, 0x13d95b93, 0x818c61e3, 0x13c0870a, 0x81887e9a,
01316   0x13a7b1bf, 0x8184a032,
01317   0x138edbb1, 0x8180c6a9, 0x137604e2, 0x817cf201, 0x135d2d53, 0x8179223a,
01318   0x13445505, 0x81755754,
01319   0x132b7bf9, 0x8171914e, 0x1312a230, 0x816dd02a, 0x12f9c7aa, 0x816a13e6,
01320   0x12e0ec6a, 0x81665c84,
01321   0x12c8106f, 0x8162aa04, 0x12af33ba, 0x815efc65, 0x1296564d, 0x815b53a8,
01322   0x127d7829, 0x8157afcd,
01323   0x1264994e, 0x815410d4, 0x124bb9be, 0x815076bd, 0x1232d979, 0x814ce188,
01324   0x1219f880, 0x81495136,
01325   0x120116d5, 0x8145c5c7, 0x11e83478, 0x81423f3a, 0x11cf516a, 0x813ebd90,
01326   0x11b66dad, 0x813b40ca,
01327   0x119d8941, 0x8137c8e6, 0x1184a427, 0x813455e6, 0x116bbe60, 0x8130e7c9,
01328   0x1152d7ed, 0x812d7e8f,
01329   0x1139f0cf, 0x812a1a3a, 0x11210907, 0x8126bac8, 0x11082096, 0x8123603a,
01330   0x10ef377d, 0x81200a90,
01331   0x10d64dbd, 0x811cb9ca, 0x10bd6356, 0x81196de9, 0x10a4784b, 0x811626ec,
01332   0x108b8c9b, 0x8112e4d4,
01333   0x1072a048, 0x810fa7a0, 0x1059b352, 0x810c6f52, 0x1040c5bb, 0x81093be8,
01334   0x1027d784, 0x81060d63,
01335   0x100ee8ad, 0x8102e3c4, 0xff5f938, 0x80ffbf0a, 0xfdd0926, 0x80fc9f35,
01336   0xfc41876, 0x80f98446,
01337   0xfab272b, 0x80f66e3c, 0xf923546, 0x80f35d19, 0xf7942c7, 0x80f050db,
01338   0xf604faf, 0x80ed4984,
01339   0xf475bff, 0x80ea4712, 0xf2e67b8, 0x80e74987, 0xf1572dc, 0x80e450e2,
01340   0xefc7d6b, 0x80e15d24,
01341   0xee38766, 0x80de6e4c, 0xeca90ce, 0x80db845b, 0xeb199a4, 0x80d89f51,
01342   0xe98a1e9, 0x80d5bf2e,
01343   0xe7fa99e, 0x80d2e3f2, 0xe66b0c3, 0x80d00d9d, 0xe4db75b, 0x80cd3c2f,
01344   0xe34bd66, 0x80ca6fa9,
01345   0xe1bc2e4, 0x80c7a80a, 0xe02c7d7, 0x80c4e553, 0xde9cc40, 0x80c22784,
01346   0xdd0d01f, 0x80bf6e9c,
01347   0xdb7d376, 0x80bcba9d, 0xd9ed646, 0x80ba0b85, 0xd85d88f, 0x80b76156,
01348   0xd6cda53, 0x80b4bc0e,
01349   0xd53db92, 0x80b21baf, 0xd3adc4e, 0x80af8039, 0xd21dc87, 0x80ace9ab,
01350   0xd08dc3f, 0x80aa5806,
01351   0xcefdb76, 0x80a7cb49, 0xcd6da2d, 0x80a54376, 0xcbdd865, 0x80a2c08b,
01352   0xca4d620, 0x80a04289,
01353   0xc8bd35e, 0x809dc971, 0xc72d020, 0x809b5541, 0xc59cc68, 0x8098e5fb,
01354   0xc40c835, 0x80967b9f,
01355   0xc27c389, 0x8094162c, 0xc0ebe66, 0x8091b5a2, 0xbf5b8cb, 0x808f5a02,
01356   0xbdcb2bb, 0x808d034c,
01357   0xbc3ac35, 0x808ab180, 0xbaaa53b, 0x8088649e, 0xb919dcf, 0x80861ca6,
01358   0xb7895f0, 0x8083d998,
01359   0xb5f8d9f, 0x80819b74, 0xb4684df, 0x807f623b, 0xb2d7baf, 0x807d2dec,
01360   0xb147211, 0x807afe87,
01361   0xafb6805, 0x8078d40d, 0xae25d8d, 0x8076ae7e, 0xac952aa, 0x80748dd9,
01362   0xab0475c, 0x8072721f,
01363   0xa973ba5, 0x80705b50, 0xa7e2f85, 0x806e496c, 0xa6522fe, 0x806c3c74,
01364   0xa4c1610, 0x806a3466,
01365   0xa3308bd, 0x80683143, 0xa19fb04, 0x8066330c, 0xa00ece8, 0x806439c0,
01366   0x9e7de6a, 0x80624560,
01367   0x9cecf89, 0x806055eb, 0x9b5c048, 0x805e6b62, 0x99cb0a7, 0x805c85c4,
01368   0x983a0a7, 0x805aa512,
01369   0x96a9049, 0x8058c94c, 0x9517f8f, 0x8056f272, 0x9386e78, 0x80552084,
01370   0x91f5d06, 0x80535381,
01371   0x9064b3a, 0x80518b6b, 0x8ed3916, 0x804fc841, 0x8d42699, 0x804e0a04,
01372   0x8bb13c5, 0x804c50b2,
01373   0x8a2009a, 0x804a9c4d, 0x888ed1b, 0x8048ecd5, 0x86fd947, 0x80474248,
01374   0x856c520, 0x80459ca9,
01375   0x83db0a7, 0x8043fbf6, 0x8249bdd, 0x80426030, 0x80b86c2, 0x8040c956,
01376   0x7f27157, 0x803f376a,
01377   0x7d95b9e, 0x803daa6a, 0x7c04598, 0x803c2257, 0x7a72f45, 0x803a9f31,
01378   0x78e18a7, 0x803920f8,
01379   0x77501be, 0x8037a7ac, 0x75bea8c, 0x8036334e, 0x742d311, 0x8034c3dd,
01380   0x729bb4e, 0x80335959,
01381   0x710a345, 0x8031f3c2, 0x6f78af6, 0x80309318, 0x6de7262, 0x802f375d,
01382   0x6c5598a, 0x802de08e,
01383   0x6ac406f, 0x802c8ead, 0x6932713, 0x802b41ba, 0x67a0d76, 0x8029f9b4,
01384   0x660f398, 0x8028b69c,
01385   0x647d97c, 0x80277872, 0x62ebf22, 0x80263f36, 0x615a48b, 0x80250ae7,
01386   0x5fc89b8, 0x8023db86,
01387   0x5e36ea9, 0x8022b114, 0x5ca5361, 0x80218b8f, 0x5b137df, 0x80206af8,
01388   0x5981c26, 0x801f4f4f,
01389   0x57f0035, 0x801e3895, 0x565e40d, 0x801d26c8, 0x54cc7b1, 0x801c19ea,
01390   0x533ab20, 0x801b11fa,
01391   0x51a8e5c, 0x801a0ef8, 0x5017165, 0x801910e4, 0x4e8543e, 0x801817bf,
01392   0x4cf36e5, 0x80172388,
01393   0x4b6195d, 0x80163440, 0x49cfba7, 0x801549e6, 0x483ddc3, 0x8014647b,
01394   0x46abfb3, 0x801383fe,
01395   0x451a177, 0x8012a86f, 0x4388310, 0x8011d1d0, 0x41f6480, 0x8011001f,
01396   0x40645c7, 0x8010335c,
01397   0x3ed26e6, 0x800f6b88, 0x3d407df, 0x800ea8a3, 0x3bae8b2, 0x800deaad,
01398   0x3a1c960, 0x800d31a5,
01399   0x388a9ea, 0x800c7d8c, 0x36f8a51, 0x800bce63, 0x3566a96, 0x800b2427,
01400   0x33d4abb, 0x800a7edb,
01401   0x3242abf, 0x8009de7e, 0x30b0aa4, 0x80094310, 0x2f1ea6c, 0x8008ac90,
01402   0x2d8ca16, 0x80081b00,
01403   0x2bfa9a4, 0x80078e5e, 0x2a68917, 0x800706ac, 0x28d6870, 0x800683e8,
01404   0x27447b0, 0x80060614,
01405   0x25b26d7, 0x80058d2f, 0x24205e8, 0x80051939, 0x228e4e2, 0x8004aa32,
01406   0x20fc3c6, 0x8004401a,
01407   0x1f6a297, 0x8003daf1, 0x1dd8154, 0x80037ab7, 0x1c45ffe, 0x80031f6d,
01408   0x1ab3e97, 0x8002c912,
01409   0x1921d20, 0x800277a6, 0x178fb99, 0x80022b29, 0x15fda03, 0x8001e39b,
01410   0x146b860, 0x8001a0fd,
01411   0x12d96b1, 0x8001634e, 0x11474f6, 0x80012a8e, 0xfb5330, 0x8000f6bd,
01412   0xe23160, 0x8000c7dc,
01413   0xc90f88, 0x80009dea, 0xafeda8, 0x800078e7, 0x96cbc1, 0x800058d4, 0x7da9d4,
01414   0x80003daf,
01415   0x6487e3, 0x8000277a, 0x4b65ee, 0x80001635, 0x3243f5, 0x800009df, 0x1921fb,
01416   0x80000278,
01417 };
01418
01436 static const q31_t cos_factorsQ31_128[128] = {
01437   0x7fff6216, 0x7ffa72d1, 0x7ff09478, 0x7fe1c76b, 0x7fce0c3e, 0x7fb563b3,
01438   0x7f97cebd, 0x7f754e80,
01439   0x7f4de451, 0x7f2191b4, 0x7ef05860, 0x7eba3a39, 0x7e7f3957, 0x7e3f57ff,
01440   0x7dfa98a8, 0x7db0fdf8,
01441   0x7d628ac6, 0x7d0f4218, 0x7cb72724, 0x7c5a3d50, 0x7bf88830, 0x7b920b89,
01442   0x7b26cb4f, 0x7ab6cba4,
01443   0x7a4210d8, 0x79c89f6e, 0x794a7c12, 0x78c7aba2, 0x78403329, 0x77b417df,
01444   0x77235f2d, 0x768e0ea6,
01445   0x75f42c0b, 0x7555bd4c, 0x74b2c884, 0x740b53fb, 0x735f6626, 0x72af05a7,
01446   0x71fa3949, 0x71410805,
01447   0x708378ff, 0x6fc19385, 0x6efb5f12, 0x6e30e34a, 0x6d6227fa, 0x6c8f351c,
01448   0x6bb812d1, 0x6adcc964,
01449   0x69fd614a, 0x6919e320, 0x683257ab, 0x6746c7d8, 0x66573cbb, 0x6563bf92,
01450   0x646c59bf, 0x637114cc,
01451   0x6271fa69, 0x616f146c, 0x60686ccf, 0x5f5e0db3, 0x5e50015d, 0x5d3e5237,
01452   0x5c290acc, 0x5b1035cf,
01453   0x59f3de12, 0x58d40e8c, 0x57b0d256, 0x568a34a9, 0x556040e2, 0x5433027d,
01454   0x53028518, 0x51ced46e,
01455   0x5097fc5e, 0x4f5e08e3, 0x4e210617, 0x4ce10034, 0x4b9e0390, 0x4a581c9e,
01456   0x490f57ee, 0x47c3c22f,
01457   0x46756828, 0x452456bd, 0x43d09aed, 0x427a41d0, 0x4121589b, 0x3fc5ec98,
01458   0x3e680b2c, 0x3d07c1d6,
01459   0x3ba51e29, 0x3a402dd2, 0x38d8fe93, 0x376f9e46, 0x36041ad9, 0x34968250,
01460   0x3326e2c3, 0x31b54a5e,
01461   0x3041c761, 0x2ecc681e, 0x2d553afc, 0x2bdc4e6f, 0x2a61b101, 0x28e5714b,
01462   0x27679df4, 0x25e845b6,
01463   0x24677758, 0x22e541af, 0x2161b3a0, 0x1fdcdc1b, 0x1e56ca1e, 0x1ccf8cb3,
01464   0x1b4732ef, 0x19bdcbf3,
01465   0x183366e9, 0x16a81305, 0x151bdf86, 0x138edbb1, 0x120116d5, 0x1072a048,
01466   0xee38766, 0xd53db92,
01467   0xbc3ac35, 0xa3308bd, 0x8a2009a, 0x710a345, 0x57f0035, 0x3ed26e6, 0x25b26d7,
01468   0xc90f88,
01469 };
01470
01471 static const q31_t cos_factorsQ31_512[512] = {
01472   0x7ffff621, 0x7fffa72c, 0x7fff0943, 0x7ffe1c65, 0x7ffce093, 0x7ffb55ce,
01473   0x7ff97c18, 0x7ff75370,
01474   0x7ff4dbd9, 0x7ff21553, 0x7feeffe1, 0x7feb9b85, 0x7fe7e841, 0x7fe3e616,
01475   0x7fdf9508, 0x7fdaf519,
01476   0x7fd6064c, 0x7fd0c8a3, 0x7fcb3c23, 0x7fc560cf, 0x7fbf36aa, 0x7fb8bdb8,
01477   0x7fb1f5fc, 0x7faadf7c,
01478   0x7fa37a3c, 0x7f9bc640, 0x7f93c38c, 0x7f8b7227, 0x7f82d214, 0x7f79e35a,
01479   0x7f70a5fe, 0x7f671a05,
01480   0x7f5d3f75, 0x7f531655, 0x7f489eaa, 0x7f3dd87c, 0x7f32c3d1, 0x7f2760af,
01481   0x7f1baf1e, 0x7f0faf25,
01482   0x7f0360cb, 0x7ef6c418, 0x7ee9d914, 0x7edc9fc6, 0x7ecf1837, 0x7ec14270,
01483   0x7eb31e78, 0x7ea4ac58,
01484   0x7e95ec1a, 0x7e86ddc6, 0x7e778166, 0x7e67d703, 0x7e57dea7, 0x7e47985b,
01485   0x7e37042a, 0x7e26221f,
01486   0x7e14f242, 0x7e0374a0, 0x7df1a942, 0x7ddf9034, 0x7dcd2981, 0x7dba7534,
01487   0x7da77359, 0x7d9423fc,
01488   0x7d808728, 0x7d6c9ce9, 0x7d58654d, 0x7d43e05e, 0x7d2f0e2b, 0x7d19eebf,
01489   0x7d048228, 0x7ceec873,
01490   0x7cd8c1ae, 0x7cc26de5, 0x7cabcd28, 0x7c94df83, 0x7c7da505, 0x7c661dbc,
01491   0x7c4e49b7, 0x7c362904,
01492   0x7c1dbbb3, 0x7c0501d2, 0x7bebfb70, 0x7bd2a89e, 0x7bb9096b, 0x7b9f1de6,
01493   0x7b84e61f, 0x7b6a6227,
01494   0x7b4f920e, 0x7b3475e5, 0x7b190dbc, 0x7afd59a4, 0x7ae159ae, 0x7ac50dec,
01495   0x7aa8766f, 0x7a8b9348,
01496   0x7a6e648a, 0x7a50ea47, 0x7a332490, 0x7a151378, 0x79f6b711, 0x79d80f6f,
01497   0x79b91ca4, 0x7999dec4,
01498   0x797a55e0, 0x795a820e, 0x793a6361, 0x7919f9ec, 0x78f945c3, 0x78d846fb,
01499   0x78b6fda8, 0x789569df,
01500   0x78738bb3, 0x7851633b, 0x782ef08b, 0x780c33b8, 0x77e92cd9, 0x77c5dc01,
01501   0x77a24148, 0x777e5cc3,
01502   0x775a2e89, 0x7735b6af, 0x7710f54c, 0x76ebea77, 0x76c69647, 0x76a0f8d2,
01503   0x767b1231, 0x7654e279,
01504   0x762e69c4, 0x7607a828, 0x75e09dbd, 0x75b94a9c, 0x7591aedd, 0x7569ca99,
01505   0x75419de7, 0x751928e0,
01506   0x74f06b9e, 0x74c7663a, 0x749e18cd, 0x74748371, 0x744aa63f, 0x74208150,
01507   0x73f614c0, 0x73cb60a8,
01508   0x73a06522, 0x73752249, 0x73499838, 0x731dc70a, 0x72f1aed9, 0x72c54fc1,
01509   0x7298a9dd, 0x726bbd48,
01510   0x723e8a20, 0x7211107e, 0x71e35080, 0x71b54a41, 0x7186fdde, 0x71586b74,
01511   0x7129931f, 0x70fa74fc,
01512   0x70cb1128, 0x709b67c0, 0x706b78e3, 0x703b44ad, 0x700acb3c, 0x6fda0cae,
01513   0x6fa90921, 0x6f77c0b3,
01514   0x6f463383, 0x6f1461b0, 0x6ee24b57, 0x6eaff099, 0x6e7d5193, 0x6e4a6e66,
01515   0x6e174730, 0x6de3dc11,
01516   0x6db02d29, 0x6d7c3a98, 0x6d48047e, 0x6d138afb, 0x6cdece2f, 0x6ca9ce3b,
01517   0x6c748b3f, 0x6c3f055d,
01518   0x6c093cb6, 0x6bd3316a, 0x6b9ce39b, 0x6b66536b, 0x6b2f80fb, 0x6af86c6c,
01519   0x6ac115e2, 0x6a897d7d,
01520   0x6a51a361, 0x6a1987b0, 0x69e12a8c, 0x69a88c19, 0x696fac78, 0x69368bce,
01521   0x68fd2a3d, 0x68c387e9,
01522   0x6889a4f6, 0x684f8186, 0x68151dbe, 0x67da79c3, 0x679f95b7, 0x676471c0,
01523   0x67290e02, 0x66ed6aa1,
01524   0x66b187c3, 0x6675658c, 0x66390422, 0x65fc63a9, 0x65bf8447, 0x65826622,
01525   0x6545095f, 0x65076e25,
01526   0x64c99498, 0x648b7ce0, 0x644d2722, 0x640e9386, 0x63cfc231, 0x6390b34a,
01527   0x635166f9, 0x6311dd64,
01528   0x62d216b3, 0x6292130c, 0x6251d298, 0x6211557e, 0x61d09be5, 0x618fa5f7,
01529   0x614e73da, 0x610d05b7,
01530   0x60cb5bb7, 0x60897601, 0x604754bf, 0x6004f819, 0x5fc26038, 0x5f7f8d46,
01531   0x5f3c7f6b, 0x5ef936d1,
01532   0x5eb5b3a2, 0x5e71f606, 0x5e2dfe29, 0x5de9cc33, 0x5da5604f, 0x5d60baa7,
01533   0x5d1bdb65, 0x5cd6c2b5,
01534   0x5c9170bf, 0x5c4be5b0, 0x5c0621b2, 0x5bc024f0, 0x5b79ef96, 0x5b3381ce,
01535   0x5aecdbc5, 0x5aa5fda5,
01536   0x5a5ee79a, 0x5a1799d1, 0x59d01475, 0x598857b2, 0x594063b5, 0x58f838a9,
01537   0x58afd6bd, 0x58673e1b,
01538   0x581e6ef1, 0x57d5696d, 0x578c2dba, 0x5742bc06, 0x56f9147e, 0x56af3750,
01539   0x566524aa, 0x561adcb9,
01540   0x55d05faa, 0x5585adad, 0x553ac6ee, 0x54efab9c, 0x54a45be6, 0x5458d7f9,
01541   0x540d2005, 0x53c13439,
01542   0x537514c2, 0x5328c1d0, 0x52dc3b92, 0x528f8238, 0x524295f0, 0x51f576ea,
01543   0x51a82555, 0x515aa162,
01544   0x510ceb40, 0x50bf031f, 0x5070e92f, 0x50229da1, 0x4fd420a4, 0x4f857269,
01545   0x4f369320, 0x4ee782fb,
01546   0x4e984229, 0x4e48d0dd, 0x4df92f46, 0x4da95d96, 0x4d595bfe, 0x4d092ab0,
01547   0x4cb8c9dd, 0x4c6839b7,
01548   0x4c177a6e, 0x4bc68c36, 0x4b756f40, 0x4b2423be, 0x4ad2a9e2, 0x4a8101de,
01549   0x4a2f2be6, 0x49dd282a,
01550   0x498af6df, 0x49389836, 0x48e60c62, 0x48935397, 0x48406e08, 0x47ed5be6,
01551   0x479a1d67, 0x4746b2bc,
01552   0x46f31c1a, 0x469f59b4, 0x464b6bbe, 0x45f7526b, 0x45a30df0, 0x454e9e80,
01553   0x44fa0450, 0x44a53f93,
01554   0x4450507e, 0x43fb3746, 0x43a5f41e, 0x4350873c, 0x42faf0d4, 0x42a5311b,
01555   0x424f4845, 0x41f93689,
01556   0x41a2fc1a, 0x414c992f, 0x40f60dfb, 0x409f5ab6, 0x40487f94, 0x3ff17cca,
01557   0x3f9a5290, 0x3f430119,
01558   0x3eeb889c, 0x3e93e950, 0x3e3c2369, 0x3de4371f, 0x3d8c24a8, 0x3d33ec39,
01559   0x3cdb8e09, 0x3c830a50,
01560   0x3c2a6142, 0x3bd19318, 0x3b78a007, 0x3b1f8848, 0x3ac64c0f, 0x3a6ceb96,
01561   0x3a136712, 0x39b9bebc,
01562   0x395ff2c9, 0x39060373, 0x38abf0ef, 0x3851bb77, 0x37f76341, 0x379ce885,
01563   0x37424b7b, 0x36e78c5b,
01564   0x368cab5c, 0x3631a8b8, 0x35d684a6, 0x357b3f5d, 0x351fd918, 0x34c4520d,
01565   0x3468aa76, 0x340ce28b,
01566   0x33b0fa84, 0x3354f29b, 0x32f8cb07, 0x329c8402, 0x32401dc6, 0x31e39889,
01567   0x3186f487, 0x312a31f8,
01568   0x30cd5115, 0x30705217, 0x30133539, 0x2fb5fab2, 0x2f58a2be, 0x2efb2d95,
01569   0x2e9d9b70, 0x2e3fec8b,
01570   0x2de2211e, 0x2d843964, 0x2d263596, 0x2cc815ee, 0x2c69daa6, 0x2c0b83fa,
01571   0x2bad1221, 0x2b4e8558,
01572   0x2aefddd8, 0x2a911bdc, 0x2a323f9e, 0x29d34958, 0x29743946, 0x29150fa1,
01573   0x28b5cca5, 0x2856708d,
01574   0x27f6fb92, 0x27976df1, 0x2737c7e3, 0x26d809a5, 0x26783370, 0x26184581,
01575   0x25b84012, 0x2558235f,
01576   0x24f7efa2, 0x2497a517, 0x243743fa, 0x23d6cc87, 0x23763ef7, 0x23159b88,
01577   0x22b4e274, 0x225413f8,
01578   0x21f3304f, 0x219237b5, 0x21312a65, 0x20d0089c, 0x206ed295, 0x200d888d,
01579   0x1fac2abf, 0x1f4ab968,
01580   0x1ee934c3, 0x1e879d0d, 0x1e25f282, 0x1dc4355e, 0x1d6265dd, 0x1d00843d,
01581   0x1c9e90b8, 0x1c3c8b8c,
01582   0x1bda74f6, 0x1b784d30, 0x1b161479, 0x1ab3cb0d, 0x1a517128, 0x19ef0707,
01583   0x198c8ce7, 0x192a0304,
01584   0x18c7699b, 0x1864c0ea, 0x1802092c, 0x179f429f, 0x173c6d80, 0x16d98a0c,
01585   0x1676987f, 0x16139918,
01586   0x15b08c12, 0x154d71aa, 0x14ea4a1f, 0x148715ae, 0x1423d492, 0x13c0870a,
01587   0x135d2d53, 0x12f9c7aa,
01588   0x1296564d, 0x1232d979, 0x11cf516a, 0x116bbe60, 0x11082096, 0x10a4784b,
01589   0x1040c5bb, 0xfdd0926,
01590   0xf7942c7, 0xf1572dc, 0xeb199a4, 0xe4db75b, 0xde9cc40, 0xd85d88f, 0xd21dc87,
01591   0xcbdd865,
01592   0xc59cc68, 0xbf5b8cb, 0xb919dcf, 0xb2d7baf, 0xac952aa, 0xa6522fe, 0xa00ece8,
01593   0x99cb0a7,
01594   0x9386e78, 0x8d42699, 0x86fd947, 0x80b86c2, 0x7a72f45, 0x742d311, 0x6de7262,
01595   0x67a0d76,
01596   0x615a48b, 0x5b137df, 0x54cc7b1, 0x4e8543e, 0x483ddc3, 0x41f6480, 0x3bae8b2,
01597   0x3566a96,
01598   0x2f1ea6c, 0x28d6870, 0x228e4e2, 0x1c45ffe, 0x15fda03, 0xfb5330, 0x96cbc1,
01599   0x3243f5,
01600 };
01601
01602 static const q31_t cos_factorsQ31_2048[2048] = {
01603   0x7fffff62, 0x7ffffa73, 0x7ffff094, 0x7fffe1c6, 0x7fffce09, 0x7fffb55c,
01604   0x7fff97c1, 0x7fff7536,
01605   0x7fff4dbb, 0x7fff2151, 0x7ffeeff8, 0x7ffeb9b0, 0x7ffe7e79, 0x7ffe3e52,
01606   0x7ffdf93c, 0x7ffdaf37,
01607   0x7ffd6042, 0x7ffd0c5f, 0x7ffcb38c, 0x7ffc55ca, 0x7ffbf319, 0x7ffb8b78,
01608   0x7ffb1ee9, 0x7ffaad6a,
01609   0x7ffa36fc, 0x7ff9bba0, 0x7ff93b54, 0x7ff8b619, 0x7ff82bef, 0x7ff79cd6,
01610   0x7ff708ce, 0x7ff66fd7,
01611   0x7ff5d1f1, 0x7ff52f1d, 0x7ff48759, 0x7ff3daa6, 0x7ff32905, 0x7ff27275,
01612   0x7ff1b6f6, 0x7ff0f688,
01613   0x7ff0312c, 0x7fef66e1, 0x7fee97a7, 0x7fedc37e, 0x7fecea67, 0x7fec0c62,
01614   0x7feb296d, 0x7fea418b,
01615   0x7fe954ba, 0x7fe862fa, 0x7fe76c4c, 0x7fe670b0, 0x7fe57025, 0x7fe46aac,
01616   0x7fe36045, 0x7fe250ef,
01617   0x7fe13cac, 0x7fe0237a, 0x7fdf055a, 0x7fdde24d, 0x7fdcba51, 0x7fdb8d67,
01618   0x7fda5b8f, 0x7fd924ca,
01619   0x7fd7e917, 0x7fd6a875, 0x7fd562e7, 0x7fd4186a, 0x7fd2c900, 0x7fd174a8,
01620   0x7fd01b63, 0x7fcebd31,
01621   0x7fcd5a11, 0x7fcbf203, 0x7fca8508, 0x7fc91320, 0x7fc79c4b, 0x7fc62089,
01622   0x7fc49fda, 0x7fc31a3d,
01623   0x7fc18fb4, 0x7fc0003e, 0x7fbe6bdb, 0x7fbcd28b, 0x7fbb344e, 0x7fb99125,
01624   0x7fb7e90f, 0x7fb63c0d,
01625   0x7fb48a1e, 0x7fb2d343, 0x7fb1177b, 0x7faf56c7, 0x7fad9127, 0x7fabc69b,
01626   0x7fa9f723, 0x7fa822bf,
01627   0x7fa6496e, 0x7fa46b32, 0x7fa2880b, 0x7fa09ff7, 0x7f9eb2f8, 0x7f9cc10d,
01628   0x7f9aca37, 0x7f98ce76,
01629   0x7f96cdc9, 0x7f94c831, 0x7f92bdad, 0x7f90ae3f, 0x7f8e99e6, 0x7f8c80a1,
01630   0x7f8a6272, 0x7f883f58,
01631   0x7f861753, 0x7f83ea64, 0x7f81b88a, 0x7f7f81c6, 0x7f7d4617, 0x7f7b057e,
01632   0x7f78bffb, 0x7f76758e,
01633   0x7f742637, 0x7f71d1f6, 0x7f6f78cb, 0x7f6d1ab6, 0x7f6ab7b8, 0x7f684fd0,
01634   0x7f65e2ff, 0x7f637144,
01635   0x7f60faa0, 0x7f5e7f13, 0x7f5bfe9d, 0x7f59793e, 0x7f56eef5, 0x7f545fc5,
01636   0x7f51cbab, 0x7f4f32a9,
01637   0x7f4c94be, 0x7f49f1eb, 0x7f474a30, 0x7f449d8c, 0x7f41ec01, 0x7f3f358d,
01638   0x7f3c7a31, 0x7f39b9ee,
01639   0x7f36f4c3, 0x7f342ab1, 0x7f315bb7, 0x7f2e87d6, 0x7f2baf0d, 0x7f28d15d,
01640   0x7f25eec7, 0x7f230749,
01641   0x7f201ae5, 0x7f1d299a, 0x7f1a3368, 0x7f173850, 0x7f143852, 0x7f11336d,
01642   0x7f0e29a3, 0x7f0b1af2,
01643   0x7f08075c, 0x7f04eedf, 0x7f01d17d, 0x7efeaf36, 0x7efb8809, 0x7ef85bf7,
01644   0x7ef52b00, 0x7ef1f524,
01645   0x7eeeba62, 0x7eeb7abc, 0x7ee83632, 0x7ee4ecc3, 0x7ee19e6f, 0x7ede4b38,
01646   0x7edaf31c, 0x7ed7961c,
01647   0x7ed43438, 0x7ed0cd70, 0x7ecd61c5, 0x7ec9f137, 0x7ec67bc5, 0x7ec3016f,
01648   0x7ebf8237, 0x7ebbfe1c,
01649   0x7eb8751e, 0x7eb4e73d, 0x7eb1547a, 0x7eadbcd4, 0x7eaa204c, 0x7ea67ee2,
01650   0x7ea2d896, 0x7e9f2d68,
01651   0x7e9b7d58, 0x7e97c867, 0x7e940e94, 0x7e904fe0, 0x7e8c8c4b, 0x7e88c3d5,
01652   0x7e84f67e, 0x7e812447,
01653   0x7e7d4d2f, 0x7e797136, 0x7e75905d, 0x7e71aaa4, 0x7e6dc00c, 0x7e69d093,
01654   0x7e65dc3b, 0x7e61e303,
01655   0x7e5de4ec, 0x7e59e1f5, 0x7e55da20, 0x7e51cd6c, 0x7e4dbbd9, 0x7e49a567,
01656   0x7e458a17, 0x7e4169e9,
01657   0x7e3d44dd, 0x7e391af3, 0x7e34ec2b, 0x7e30b885, 0x7e2c8002, 0x7e2842a2,
01658   0x7e240064, 0x7e1fb94a,
01659   0x7e1b6d53, 0x7e171c7f, 0x7e12c6ce, 0x7e0e6c42, 0x7e0a0cd9, 0x7e05a894,
01660   0x7e013f74, 0x7dfcd178,
01661   0x7df85ea0, 0x7df3e6ee, 0x7def6a60, 0x7deae8f7, 0x7de662b3, 0x7de1d795,
01662   0x7ddd479d, 0x7dd8b2ca,
01663   0x7dd4191d, 0x7dcf7a96, 0x7dcad736, 0x7dc62efc, 0x7dc181e8, 0x7dbccffc,
01664   0x7db81936, 0x7db35d98,
01665   0x7dae9d21, 0x7da9d7d2, 0x7da50dab, 0x7da03eab, 0x7d9b6ad3, 0x7d969224,
01666   0x7d91b49e, 0x7d8cd240,
01667   0x7d87eb0a, 0x7d82fefe, 0x7d7e0e1c, 0x7d791862, 0x7d741dd2, 0x7d6f1e6c,
01668   0x7d6a1a31, 0x7d65111f,
01669   0x7d600338, 0x7d5af07b, 0x7d55d8e9, 0x7d50bc82, 0x7d4b9b46, 0x7d467536,
01670   0x7d414a51, 0x7d3c1a98,
01671   0x7d36e60b, 0x7d31acaa, 0x7d2c6e76, 0x7d272b6e, 0x7d21e393, 0x7d1c96e5,
01672   0x7d174564, 0x7d11ef11,
01673   0x7d0c93eb, 0x7d0733f3, 0x7d01cf29, 0x7cfc658d, 0x7cf6f720, 0x7cf183e1,
01674   0x7cec0bd1, 0x7ce68ef0,
01675   0x7ce10d3f, 0x7cdb86bd, 0x7cd5fb6a, 0x7cd06b48, 0x7ccad656, 0x7cc53c94,
01676   0x7cbf9e03, 0x7cb9faa2,
01677   0x7cb45272, 0x7caea574, 0x7ca8f3a7, 0x7ca33d0c, 0x7c9d81a3, 0x7c97c16b,
01678   0x7c91fc66, 0x7c8c3294,
01679   0x7c8663f4, 0x7c809088, 0x7c7ab84e, 0x7c74db48, 0x7c6ef976, 0x7c6912d7,
01680   0x7c63276d, 0x7c5d3737,
01681   0x7c574236, 0x7c514869, 0x7c4b49d2, 0x7c45466f, 0x7c3f3e42, 0x7c39314b,
01682   0x7c331f8a, 0x7c2d08ff,
01683   0x7c26edab, 0x7c20cd8d, 0x7c1aa8a6, 0x7c147ef6, 0x7c0e507e, 0x7c081d3d,
01684   0x7c01e534, 0x7bfba863,
01685   0x7bf566cb, 0x7bef206b, 0x7be8d544, 0x7be28556, 0x7bdc30a1, 0x7bd5d726,
01686   0x7bcf78e5, 0x7bc915dd,
01687   0x7bc2ae10, 0x7bbc417e, 0x7bb5d026, 0x7baf5a09, 0x7ba8df28, 0x7ba25f82,
01688   0x7b9bdb18, 0x7b9551ea,
01689   0x7b8ec3f8, 0x7b883143, 0x7b8199ca, 0x7b7afd8f, 0x7b745c91, 0x7b6db6d0,
01690   0x7b670c4d, 0x7b605d09,
01691   0x7b59a902, 0x7b52f03a, 0x7b4c32b1, 0x7b457068, 0x7b3ea95d, 0x7b37dd92,
01692   0x7b310d07, 0x7b2a37bc,
01693   0x7b235db2, 0x7b1c7ee8, 0x7b159b5f, 0x7b0eb318, 0x7b07c612, 0x7b00d44d,
01694   0x7af9ddcb, 0x7af2e28b,
01695   0x7aebe28d, 0x7ae4ddd2, 0x7addd45b, 0x7ad6c626, 0x7acfb336, 0x7ac89b89,
01696   0x7ac17f20, 0x7aba5dfc,
01697   0x7ab3381d, 0x7aac0d82, 0x7aa4de2d, 0x7a9daa1d, 0x7a967153, 0x7a8f33d0,
01698   0x7a87f192, 0x7a80aa9c,
01699   0x7a795eec, 0x7a720e84, 0x7a6ab963, 0x7a635f8a, 0x7a5c00f9, 0x7a549db0,
01700   0x7a4d35b0, 0x7a45c8f9,
01701   0x7a3e578b, 0x7a36e166, 0x7a2f668c, 0x7a27e6fb, 0x7a2062b5, 0x7a18d9b9,
01702   0x7a114c09, 0x7a09b9a4,
01703   0x7a02228a, 0x79fa86bc, 0x79f2e63a, 0x79eb4105, 0x79e3971c, 0x79dbe880,
01704   0x79d43532, 0x79cc7d31,
01705   0x79c4c07e, 0x79bcff19, 0x79b53903, 0x79ad6e3c, 0x79a59ec3, 0x799dca9a,
01706   0x7995f1c1, 0x798e1438,
01707   0x798631ff, 0x797e4b16, 0x79765f7f, 0x796e6f39, 0x79667a44, 0x795e80a1,
01708   0x79568250, 0x794e7f52,
01709   0x794677a6, 0x793e6b4e, 0x79365a49, 0x792e4497, 0x79262a3a, 0x791e0b31,
01710   0x7915e77c, 0x790dbf1d,
01711   0x79059212, 0x78fd605d, 0x78f529fe, 0x78eceef6, 0x78e4af44, 0x78dc6ae8,
01712   0x78d421e4, 0x78cbd437,
01713   0x78c381e2, 0x78bb2ae5, 0x78b2cf41, 0x78aa6ef5, 0x78a20a03, 0x7899a06a,
01714   0x7891322a, 0x7888bf45,
01715   0x788047ba, 0x7877cb89, 0x786f4ab4, 0x7866c53a, 0x785e3b1c, 0x7855ac5a,
01716   0x784d18f4, 0x784480ea,
01717   0x783be43e, 0x783342ef, 0x782a9cfe, 0x7821f26b, 0x78194336, 0x78108f60,
01718   0x7807d6e9, 0x77ff19d1,
01719   0x77f65819, 0x77ed91c0, 0x77e4c6c9, 0x77dbf732, 0x77d322fc, 0x77ca4a27,
01720   0x77c16cb4, 0x77b88aa3,
01721   0x77afa3f5, 0x77a6b8a9, 0x779dc8c0, 0x7794d43b, 0x778bdb19, 0x7782dd5c,
01722   0x7779db03, 0x7770d40f,
01723   0x7767c880, 0x775eb857, 0x7755a394, 0x774c8a36, 0x77436c40, 0x773a49b0,
01724   0x77312287, 0x7727f6c6,
01725   0x771ec66e, 0x7715917d, 0x770c57f5, 0x770319d6, 0x76f9d721, 0x76f08fd5,
01726   0x76e743f4, 0x76ddf37c,
01727   0x76d49e70, 0x76cb44cf, 0x76c1e699, 0x76b883d0, 0x76af1c72, 0x76a5b082,
01728   0x769c3ffe, 0x7692cae8,
01729   0x7689513f, 0x767fd304, 0x76765038, 0x766cc8db, 0x76633ced, 0x7659ac6f,
01730   0x76501760, 0x76467dc2,
01731   0x763cdf94, 0x76333cd8, 0x7629958c, 0x761fe9b3, 0x7616394c, 0x760c8457,
01732   0x7602cad5, 0x75f90cc7,
01733   0x75ef4a2c, 0x75e58305, 0x75dbb753, 0x75d1e715, 0x75c8124d, 0x75be38fa,
01734   0x75b45b1d, 0x75aa78b6,
01735   0x75a091c6, 0x7596a64d, 0x758cb64c, 0x7582c1c2, 0x7578c8b0, 0x756ecb18,
01736   0x7564c8f8, 0x755ac251,
01737   0x7550b725, 0x7546a772, 0x753c933a, 0x75327a7d, 0x75285d3b, 0x751e3b75,
01738   0x7514152b, 0x7509ea5d,
01739   0x74ffbb0d, 0x74f58739, 0x74eb4ee3, 0x74e1120c, 0x74d6d0b2, 0x74cc8ad8,
01740   0x74c2407d, 0x74b7f1a1,
01741   0x74ad9e46, 0x74a3466b, 0x7498ea11, 0x748e8938, 0x748423e0, 0x7479ba0b,
01742   0x746f4bb8, 0x7464d8e8,
01743   0x745a619b, 0x744fe5d2, 0x7445658d, 0x743ae0cc, 0x74305790, 0x7425c9da,
01744   0x741b37a9, 0x7410a0fe,
01745   0x740605d9, 0x73fb663c, 0x73f0c226, 0x73e61997, 0x73db6c91, 0x73d0bb13,
01746   0x73c6051f, 0x73bb4ab3,
01747   0x73b08bd1, 0x73a5c87a, 0x739b00ad, 0x7390346b, 0x738563b5, 0x737a8e8a,
01748   0x736fb4ec, 0x7364d6da,
01749   0x7359f456, 0x734f0d5f, 0x734421f6, 0x7339321b, 0x732e3dcf, 0x73234512,
01750   0x731847e5, 0x730d4648,
01751   0x7302403c, 0x72f735c0, 0x72ec26d6, 0x72e1137d, 0x72d5fbb7, 0x72cadf83,
01752   0x72bfbee3, 0x72b499d6,
01753   0x72a9705c, 0x729e4277, 0x72931027, 0x7287d96c, 0x727c9e47, 0x72715eb8,
01754   0x72661abf, 0x725ad25d,
01755   0x724f8593, 0x72443460, 0x7238dec5, 0x722d84c4, 0x7222265b, 0x7216c38c,
01756   0x720b5c57, 0x71fff0bc,
01757   0x71f480bc, 0x71e90c57, 0x71dd938f, 0x71d21662, 0x71c694d2, 0x71bb0edf,
01758   0x71af848a, 0x71a3f5d2,
01759   0x719862b9, 0x718ccb3f, 0x71812f65, 0x71758f29, 0x7169ea8f, 0x715e4194,
01760   0x7152943b, 0x7146e284,
01761   0x713b2c6e, 0x712f71fb, 0x7123b32b, 0x7117effe, 0x710c2875, 0x71005c90,
01762   0x70f48c50, 0x70e8b7b5,
01763   0x70dcdec0, 0x70d10171, 0x70c51fc8, 0x70b939c7, 0x70ad4f6d, 0x70a160ba,
01764   0x70956db1, 0x70897650,
01765   0x707d7a98, 0x70717a8a, 0x70657626, 0x70596d6d, 0x704d6060, 0x70414efd,
01766   0x70353947, 0x70291f3e,
01767   0x701d00e1, 0x7010de32, 0x7004b731, 0x6ff88bde, 0x6fec5c3b, 0x6fe02846,
01768   0x6fd3f001, 0x6fc7b36d,
01769   0x6fbb728a, 0x6faf2d57, 0x6fa2e3d7, 0x6f969608, 0x6f8a43ed, 0x6f7ded84,
01770   0x6f7192cf, 0x6f6533ce,
01771   0x6f58d082, 0x6f4c68eb, 0x6f3ffd09, 0x6f338cde, 0x6f271868, 0x6f1a9faa,
01772   0x6f0e22a3, 0x6f01a155,
01773   0x6ef51bbe, 0x6ee891e1, 0x6edc03bc, 0x6ecf7152, 0x6ec2daa2, 0x6eb63fad,
01774   0x6ea9a073, 0x6e9cfcf5,
01775   0x6e905534, 0x6e83a92f, 0x6e76f8e7, 0x6e6a445d, 0x6e5d8b91, 0x6e50ce84,
01776   0x6e440d37, 0x6e3747a9,
01777   0x6e2a7ddb, 0x6e1dafce, 0x6e10dd82, 0x6e0406f8, 0x6df72c30, 0x6dea4d2b,
01778   0x6ddd69e9, 0x6dd0826a,
01779   0x6dc396b0, 0x6db6a6ba, 0x6da9b28a, 0x6d9cba1f, 0x6d8fbd7a, 0x6d82bc9d,
01780   0x6d75b786, 0x6d68ae37,
01781   0x6d5ba0b0, 0x6d4e8ef2, 0x6d4178fd, 0x6d345ed1, 0x6d274070, 0x6d1a1dda,
01782   0x6d0cf70f, 0x6cffcc0f,
01783   0x6cf29cdc, 0x6ce56975, 0x6cd831dc, 0x6ccaf610, 0x6cbdb613, 0x6cb071e4,
01784   0x6ca32985, 0x6c95dcf6,
01785   0x6c888c36, 0x6c7b3748, 0x6c6dde2b, 0x6c6080e0, 0x6c531f67, 0x6c45b9c1,
01786   0x6c384fef, 0x6c2ae1f0,
01787   0x6c1d6fc6, 0x6c0ff971, 0x6c027ef1, 0x6bf50047, 0x6be77d74, 0x6bd9f677,
01788   0x6bcc6b53, 0x6bbedc06,
01789   0x6bb14892, 0x6ba3b0f7, 0x6b961536, 0x6b88754f, 0x6b7ad142, 0x6b6d2911,
01790   0x6b5f7cbc, 0x6b51cc42,
01791   0x6b4417a6, 0x6b365ee7, 0x6b28a206, 0x6b1ae103, 0x6b0d1bdf, 0x6aff529a,
01792   0x6af18536, 0x6ae3b3b2,
01793   0x6ad5de0f, 0x6ac8044e, 0x6aba266e, 0x6aac4472, 0x6a9e5e58, 0x6a907423,
01794   0x6a8285d1, 0x6a749365,
01795   0x6a669cdd, 0x6a58a23c, 0x6a4aa381, 0x6a3ca0ad, 0x6a2e99c0, 0x6a208ebb,
01796   0x6a127f9f, 0x6a046c6c,
01797   0x69f65523, 0x69e839c4, 0x69da1a50, 0x69cbf6c7, 0x69bdcf29, 0x69afa378,
01798   0x69a173b5, 0x69933fde,
01799   0x698507f6, 0x6976cbfc, 0x69688bf1, 0x695a47d6, 0x694bffab, 0x693db371,
01800   0x692f6328, 0x69210ed1,
01801   0x6912b66c, 0x690459fb, 0x68f5f97d, 0x68e794f3, 0x68d92c5d, 0x68cabfbd,
01802   0x68bc4f13, 0x68adda5f,
01803   0x689f61a1, 0x6890e4dc, 0x6882640e, 0x6873df38, 0x6865565c, 0x6856c979,
01804   0x68483891, 0x6839a3a4,
01805   0x682b0ab1, 0x681c6dbb, 0x680dccc1, 0x67ff27c4, 0x67f07ec5, 0x67e1d1c4,
01806   0x67d320c1, 0x67c46bbe,
01807   0x67b5b2bb, 0x67a6f5b8, 0x679834b6, 0x67896fb6, 0x677aa6b8, 0x676bd9bd,
01808   0x675d08c4, 0x674e33d0,
01809   0x673f5ae0, 0x67307df5, 0x67219d10, 0x6712b831, 0x6703cf58, 0x66f4e287,
01810   0x66e5f1be, 0x66d6fcfd,
01811   0x66c80445, 0x66b90797, 0x66aa06f3, 0x669b0259, 0x668bf9cb, 0x667ced49,
01812   0x666ddcd3, 0x665ec86b,
01813   0x664fb010, 0x664093c3, 0x66317385, 0x66224f56, 0x66132738, 0x6603fb2a,
01814   0x65f4cb2d, 0x65e59742,
01815   0x65d65f69, 0x65c723a3, 0x65b7e3f1, 0x65a8a052, 0x659958c9, 0x658a0d54,
01816   0x657abdf6, 0x656b6aae,
01817   0x655c137d, 0x654cb863, 0x653d5962, 0x652df679, 0x651e8faa, 0x650f24f5,
01818   0x64ffb65b, 0x64f043dc,
01819   0x64e0cd78, 0x64d15331, 0x64c1d507, 0x64b252fa, 0x64a2cd0c, 0x6493433c,
01820   0x6483b58c, 0x647423fb,
01821   0x64648e8c, 0x6454f53d, 0x64455810, 0x6435b706, 0x6426121e, 0x6416695a,
01822   0x6406bcba, 0x63f70c3f,
01823   0x63e757ea, 0x63d79fba, 0x63c7e3b1, 0x63b823cf, 0x63a86015, 0x63989884,
01824   0x6388cd1b, 0x6378fddc,
01825   0x63692ac7, 0x635953dd, 0x6349791f, 0x63399a8d, 0x6329b827, 0x6319d1ef,
01826   0x6309e7e4, 0x62f9fa09,
01827   0x62ea085c, 0x62da12df, 0x62ca1992, 0x62ba1c77, 0x62aa1b8d, 0x629a16d5,
01828   0x628a0e50, 0x627a01fe,
01829   0x6269f1e1, 0x6259ddf8, 0x6249c645, 0x6239aac7, 0x62298b81, 0x62196871,
01830   0x62094199, 0x61f916f9,
01831   0x61e8e893, 0x61d8b666, 0x61c88074, 0x61b846bc, 0x61a80940, 0x6197c800,
01832   0x618782fd, 0x61773a37,
01833   0x6166edb0, 0x61569d67, 0x6146495d, 0x6135f193, 0x6125960a, 0x611536c2,
01834   0x6104d3bc, 0x60f46cf9,
01835   0x60e40278, 0x60d3943b, 0x60c32243, 0x60b2ac8f, 0x60a23322, 0x6091b5fa,
01836   0x60813519, 0x6070b080,
01837   0x6060282f, 0x604f9c27, 0x603f0c69, 0x602e78f4, 0x601de1ca, 0x600d46ec,
01838   0x5ffca859, 0x5fec0613,
01839   0x5fdb601b, 0x5fcab670, 0x5fba0914, 0x5fa95807, 0x5f98a34a, 0x5f87eade,
01840   0x5f772ec2, 0x5f666ef9,
01841   0x5f55ab82, 0x5f44e45e, 0x5f34198e, 0x5f234b12, 0x5f1278eb, 0x5f01a31a,
01842   0x5ef0c99f, 0x5edfec7b,
01843   0x5ecf0baf, 0x5ebe273b, 0x5ead3f1f, 0x5e9c535e, 0x5e8b63f7, 0x5e7a70ea,
01844   0x5e697a39, 0x5e587fe5,
01845   0x5e4781ed, 0x5e368053, 0x5e257b17, 0x5e147239, 0x5e0365bb, 0x5df2559e,
01846   0x5de141e1, 0x5dd02a85,
01847   0x5dbf0f8c, 0x5dadf0f5, 0x5d9ccec2, 0x5d8ba8f3, 0x5d7a7f88, 0x5d695283,
01848   0x5d5821e4, 0x5d46edac,
01849   0x5d35b5db, 0x5d247a72, 0x5d133b72, 0x5d01f8dc, 0x5cf0b2af, 0x5cdf68ed,
01850   0x5cce1b97, 0x5cbccaac,
01851   0x5cab762f, 0x5c9a1e1e, 0x5c88c27c, 0x5c776348, 0x5c660084, 0x5c549a30,
01852   0x5c43304d, 0x5c31c2db,
01853   0x5c2051db, 0x5c0edd4e, 0x5bfd6534, 0x5bebe98e, 0x5bda6a5d, 0x5bc8e7a2,
01854   0x5bb7615d, 0x5ba5d78e,
01855   0x5b944a37, 0x5b82b958, 0x5b7124f2, 0x5b5f8d06, 0x5b4df193, 0x5b3c529c,
01856   0x5b2ab020, 0x5b190a20,
01857   0x5b07609d, 0x5af5b398, 0x5ae40311, 0x5ad24f09, 0x5ac09781, 0x5aaedc78,
01858   0x5a9d1df1, 0x5a8b5bec,
01859   0x5a799669, 0x5a67cd69, 0x5a5600ec, 0x5a4430f5, 0x5a325d82, 0x5a208695,
01860   0x5a0eac2e, 0x59fcce4f,
01861   0x59eaecf8, 0x59d90829, 0x59c71fe3, 0x59b53427, 0x59a344f6, 0x59915250,
01862   0x597f5c36, 0x596d62a9,
01863   0x595b65aa, 0x59496538, 0x59376155, 0x59255a02, 0x59134f3e, 0x5901410c,
01864   0x58ef2f6b, 0x58dd1a5d,
01865   0x58cb01e1, 0x58b8e5f9, 0x58a6c6a5, 0x5894a3e7, 0x58827dbe, 0x5870542c,
01866   0x585e2730, 0x584bf6cd,
01867   0x5839c302, 0x58278bd1, 0x58155139, 0x5803133c, 0x57f0d1da, 0x57de8d15,
01868   0x57cc44ec, 0x57b9f960,
01869   0x57a7aa73, 0x57955825, 0x57830276, 0x5770a968, 0x575e4cfa, 0x574bed2f,
01870   0x57398a05, 0x5727237f,
01871   0x5714b99d, 0x57024c5f, 0x56efdbc7, 0x56dd67d4, 0x56caf088, 0x56b875e4,
01872   0x56a5f7e7, 0x56937694,
01873   0x5680f1ea, 0x566e69ea, 0x565bde95, 0x56494fec, 0x5636bdef, 0x5624289f,
01874   0x56118ffe, 0x55fef40a,
01875   0x55ec54c6, 0x55d9b232, 0x55c70c4f, 0x55b4631d, 0x55a1b69d, 0x558f06d0,
01876   0x557c53b6, 0x55699d51,
01877   0x5556e3a1, 0x554426a7, 0x55316663, 0x551ea2d6, 0x550bdc01, 0x54f911e5,
01878   0x54e64482, 0x54d373d9,
01879   0x54c09feb, 0x54adc8b8, 0x549aee42, 0x54881089, 0x54752f8d, 0x54624b50,
01880   0x544f63d2, 0x543c7914,
01881   0x54298b17, 0x541699db, 0x5403a561, 0x53f0adaa, 0x53ddb2b6, 0x53cab486,
01882   0x53b7b31c, 0x53a4ae77,
01883   0x5391a699, 0x537e9b82, 0x536b8d33, 0x53587bad, 0x534566f0, 0x53324efd,
01884   0x531f33d5, 0x530c1579,
01885   0x52f8f3e9, 0x52e5cf27, 0x52d2a732, 0x52bf7c0b, 0x52ac4db4, 0x52991c2d,
01886   0x5285e777, 0x5272af92,
01887   0x525f7480, 0x524c3640, 0x5238f4d4, 0x5225b03d, 0x5212687b, 0x51ff1d8f,
01888   0x51ebcf7a, 0x51d87e3c,
01889   0x51c529d7, 0x51b1d24a, 0x519e7797, 0x518b19bf, 0x5177b8c2, 0x516454a0,
01890   0x5150ed5c, 0x513d82f4,
01891   0x512a156b, 0x5116a4c1, 0x510330f7, 0x50efba0d, 0x50dc4005, 0x50c8c2de,
01892   0x50b5429a, 0x50a1bf39,
01893   0x508e38bd, 0x507aaf25, 0x50672273, 0x505392a8, 0x503fffc4, 0x502c69c8,
01894   0x5018d0b4, 0x5005348a,
01895   0x4ff1954b, 0x4fddf2f6, 0x4fca4d8d, 0x4fb6a510, 0x4fa2f981, 0x4f8f4ae0,
01896   0x4f7b992d, 0x4f67e46a,
01897   0x4f542c98, 0x4f4071b6, 0x4f2cb3c7, 0x4f18f2c9, 0x4f052ec0, 0x4ef167aa,
01898   0x4edd9d89, 0x4ec9d05e,
01899   0x4eb60029, 0x4ea22ceb, 0x4e8e56a5, 0x4e7a7d58, 0x4e66a105, 0x4e52c1ab,
01900   0x4e3edf4d, 0x4e2af9ea,
01901   0x4e171184, 0x4e03261b, 0x4def37b0, 0x4ddb4644, 0x4dc751d8, 0x4db35a6c,
01902   0x4d9f6001, 0x4d8b6298,
01903   0x4d776231, 0x4d635ece, 0x4d4f5870, 0x4d3b4f16, 0x4d2742c2, 0x4d133374,
01904   0x4cff212e, 0x4ceb0bf0,
01905   0x4cd6f3bb, 0x4cc2d88f, 0x4caeba6e, 0x4c9a9958, 0x4c86754e, 0x4c724e50,
01906   0x4c5e2460, 0x4c49f77f,
01907   0x4c35c7ac, 0x4c2194e9, 0x4c0d5f37, 0x4bf92697, 0x4be4eb08, 0x4bd0ac8d,
01908   0x4bbc6b25, 0x4ba826d1,
01909   0x4b93df93, 0x4b7f956b, 0x4b6b485a, 0x4b56f861, 0x4b42a580, 0x4b2e4fb8,
01910   0x4b19f70a, 0x4b059b77,
01911   0x4af13d00, 0x4adcdba5, 0x4ac87767, 0x4ab41046, 0x4a9fa645, 0x4a8b3963,
01912   0x4a76c9a2, 0x4a625701,
01913   0x4a4de182, 0x4a396926, 0x4a24edee, 0x4a106fda, 0x49fbeeea, 0x49e76b21,
01914   0x49d2e47e, 0x49be5b02,
01915   0x49a9ceaf, 0x49953f84, 0x4980ad84, 0x496c18ae, 0x49578103, 0x4942e684,
01916   0x492e4933, 0x4919a90f,
01917   0x4905061a, 0x48f06054, 0x48dbb7be, 0x48c70c59, 0x48b25e25, 0x489dad25,
01918   0x4888f957, 0x487442be,
01919   0x485f8959, 0x484acd2a, 0x48360e32, 0x48214c71, 0x480c87e8, 0x47f7c099,
01920   0x47e2f682, 0x47ce29a7,
01921   0x47b95a06, 0x47a487a2, 0x478fb27b, 0x477ada91, 0x4765ffe6, 0x4751227a,
01922   0x473c424e, 0x47275f63,
01923   0x471279ba, 0x46fd9154, 0x46e8a631, 0x46d3b852, 0x46bec7b8, 0x46a9d464,
01924   0x4694de56, 0x467fe590,
01925   0x466aea12, 0x4655ebdd, 0x4640eaf2, 0x462be751, 0x4616e0fc, 0x4601d7f3,
01926   0x45eccc37, 0x45d7bdc9,
01927   0x45c2acaa, 0x45ad98da, 0x4598825a, 0x4583692c, 0x456e4d4f, 0x45592ec6,
01928   0x45440d90, 0x452ee9ae,
01929   0x4519c321, 0x450499eb, 0x44ef6e0b, 0x44da3f83, 0x44c50e53, 0x44afda7d,
01930   0x449aa400, 0x44856adf,
01931   0x44702f19, 0x445af0b0, 0x4445afa4, 0x44306bf6, 0x441b25a8, 0x4405dcb9,
01932   0x43f0912b, 0x43db42fe,
01933   0x43c5f234, 0x43b09ecc, 0x439b48c9, 0x4385f02a, 0x437094f1, 0x435b371f,
01934   0x4345d6b3, 0x433073b0,
01935   0x431b0e15, 0x4305a5e5, 0x42f03b1e, 0x42dacdc3, 0x42c55dd4, 0x42afeb53,
01936   0x429a763f, 0x4284fe99,
01937   0x426f8463, 0x425a079e, 0x42448849, 0x422f0667, 0x421981f7, 0x4203fafb,
01938   0x41ee7174, 0x41d8e561,
01939   0x41c356c5, 0x41adc5a0, 0x419831f3, 0x41829bbe, 0x416d0302, 0x415767c1,
01940   0x4141c9fb, 0x412c29b1,
01941   0x411686e4, 0x4100e194, 0x40eb39c3, 0x40d58f71, 0x40bfe29f, 0x40aa334e,
01942   0x4094817f, 0x407ecd32,
01943   0x40691669, 0x40535d24, 0x403da165, 0x4027e32b, 0x40122278, 0x3ffc5f4d,
01944   0x3fe699aa, 0x3fd0d191,
01945   0x3fbb0702, 0x3fa539fd, 0x3f8f6a85, 0x3f799899, 0x3f63c43b, 0x3f4ded6b,
01946   0x3f38142a, 0x3f22387a,
01947   0x3f0c5a5a, 0x3ef679cc, 0x3ee096d1, 0x3ecab169, 0x3eb4c995, 0x3e9edf57,
01948   0x3e88f2ae, 0x3e73039d,
01949   0x3e5d1222, 0x3e471e41, 0x3e3127f9, 0x3e1b2f4a, 0x3e053437, 0x3def36c0,
01950   0x3dd936e6, 0x3dc334a9,
01951   0x3dad300b, 0x3d97290b, 0x3d811fac, 0x3d6b13ee, 0x3d5505d2, 0x3d3ef559,
01952   0x3d28e282, 0x3d12cd51,
01953   0x3cfcb5c4, 0x3ce69bde, 0x3cd07f9f, 0x3cba6107, 0x3ca44018, 0x3c8e1cd3,
01954   0x3c77f737, 0x3c61cf48,
01955   0x3c4ba504, 0x3c35786d, 0x3c1f4983, 0x3c091849, 0x3bf2e4be, 0x3bdcaee3,
01956   0x3bc676b9, 0x3bb03c42,
01957   0x3b99ff7d, 0x3b83c06c, 0x3b6d7f10, 0x3b573b69, 0x3b40f579, 0x3b2aad3f,
01958   0x3b1462be, 0x3afe15f6,
01959   0x3ae7c6e7, 0x3ad17593, 0x3abb21fb, 0x3aa4cc1e, 0x3a8e7400, 0x3a78199f,
01960   0x3a61bcfd, 0x3a4b5e1b,
01961   0x3a34fcf9, 0x3a1e9999, 0x3a0833fc, 0x39f1cc21, 0x39db620b, 0x39c4f5ba,
01962   0x39ae872f, 0x3998166a,
01963   0x3981a36d, 0x396b2e38, 0x3954b6cd, 0x393e3d2c, 0x3927c155, 0x3911434b,
01964   0x38fac30e, 0x38e4409e,
01965   0x38cdbbfc, 0x38b7352a, 0x38a0ac29, 0x388a20f8, 0x38739399, 0x385d040d,
01966   0x38467255, 0x382fde72,
01967   0x38194864, 0x3802b02c, 0x37ec15cb, 0x37d57943, 0x37beda93, 0x37a839be,
01968   0x379196c3, 0x377af1a3,
01969   0x37644a60, 0x374da0fa, 0x3736f573, 0x372047ca, 0x37099802, 0x36f2e61a,
01970   0x36dc3214, 0x36c57bf0,
01971   0x36aec3b0, 0x36980954, 0x36814cde, 0x366a8e4d, 0x3653cda3, 0x363d0ae2,
01972   0x36264609, 0x360f7f19,
01973   0x35f8b614, 0x35e1eafa, 0x35cb1dcc, 0x35b44e8c, 0x359d7d39, 0x3586a9d5,
01974   0x356fd461, 0x3558fcde,
01975   0x3542234c, 0x352b47ad, 0x35146a00, 0x34fd8a48, 0x34e6a885, 0x34cfc4b7,
01976   0x34b8dee1, 0x34a1f702,
01977   0x348b0d1c, 0x3474212f, 0x345d333c, 0x34464345, 0x342f5149, 0x34185d4b,
01978   0x3401674a, 0x33ea6f48,
01979   0x33d37546, 0x33bc7944, 0x33a57b44, 0x338e7b46, 0x3377794b, 0x33607554,
01980   0x33496f62, 0x33326776,
01981   0x331b5d91, 0x330451b3, 0x32ed43de, 0x32d63412, 0x32bf2250, 0x32a80e99,
01982   0x3290f8ef, 0x3279e151,
01983   0x3262c7c1, 0x324bac40, 0x32348ecf, 0x321d6f6e, 0x32064e1e, 0x31ef2ae1,
01984   0x31d805b7, 0x31c0dea1,
01985   0x31a9b5a0, 0x31928ab4, 0x317b5de0, 0x31642f23, 0x314cfe7f, 0x3135cbf4,
01986   0x311e9783, 0x3107612e,
01987   0x30f028f4, 0x30d8eed8, 0x30c1b2da, 0x30aa74fa, 0x3093353a, 0x307bf39b,
01988   0x3064b01d, 0x304d6ac1,
01989   0x30362389, 0x301eda75, 0x30078f86, 0x2ff042bd, 0x2fd8f41b, 0x2fc1a3a0,
01990   0x2faa514f, 0x2f92fd26,
01991   0x2f7ba729, 0x2f644f56, 0x2f4cf5b0, 0x2f359a37, 0x2f1e3ced, 0x2f06ddd1,
01992   0x2eef7ce5, 0x2ed81a29,
01993   0x2ec0b5a0, 0x2ea94f49, 0x2e91e725, 0x2e7a7d36, 0x2e63117c, 0x2e4ba3f8,
01994   0x2e3434ac, 0x2e1cc397,
01995   0x2e0550bb, 0x2deddc19, 0x2dd665b2, 0x2dbeed86, 0x2da77397, 0x2d8ff7e5,
01996   0x2d787a72, 0x2d60fb3e,
01997   0x2d497a4a, 0x2d31f797, 0x2d1a7325, 0x2d02ecf7, 0x2ceb650d, 0x2cd3db67,
01998   0x2cbc5006, 0x2ca4c2ed,
01999   0x2c8d341a, 0x2c75a390, 0x2c5e114f, 0x2c467d58, 0x2c2ee7ad, 0x2c17504d,
02000   0x2bffb73a, 0x2be81c74,
02001   0x2bd07ffe, 0x2bb8e1d7, 0x2ba14200, 0x2b89a07b, 0x2b71fd48, 0x2b5a5868,
02002   0x2b42b1dd, 0x2b2b09a6,
02003   0x2b135fc6, 0x2afbb43c, 0x2ae4070a, 0x2acc5831, 0x2ab4a7b1, 0x2a9cf58c,
02004   0x2a8541c3, 0x2a6d8c55,
02005   0x2a55d545, 0x2a3e1c93, 0x2a266240, 0x2a0ea64d, 0x29f6e8bb, 0x29df298b,
02006   0x29c768be, 0x29afa654,
02007   0x2997e24f, 0x29801caf, 0x29685576, 0x29508ca4, 0x2938c23a, 0x2920f63a,
02008   0x290928a3, 0x28f15978,
02009   0x28d988b8, 0x28c1b666, 0x28a9e281, 0x28920d0a, 0x287a3604, 0x28625d6d,
02010   0x284a8349, 0x2832a796,
02011   0x281aca57, 0x2802eb8c, 0x27eb0b36, 0x27d32956, 0x27bb45ed, 0x27a360fc,
02012   0x278b7a84, 0x27739285,
02013   0x275ba901, 0x2743bdf9, 0x272bd16d, 0x2713e35f, 0x26fbf3ce, 0x26e402bd,
02014   0x26cc102d, 0x26b41c1d,
02015   0x269c268f, 0x26842f84, 0x266c36fe, 0x26543cfb, 0x263c417f, 0x26244489,
02016   0x260c461b, 0x25f44635,
02017   0x25dc44d9, 0x25c44207, 0x25ac3dc0, 0x25943806, 0x257c30d8, 0x25642839,
02018   0x254c1e28, 0x253412a8,
02019   0x251c05b8, 0x2503f75a, 0x24ebe78f, 0x24d3d657, 0x24bbc3b4, 0x24a3afa6,
02020   0x248b9a2f, 0x2473834f,
02021   0x245b6b07, 0x24435158, 0x242b3644, 0x241319ca, 0x23fafbec, 0x23e2dcac,
02022   0x23cabc09, 0x23b29a05,
02023   0x239a76a0, 0x238251dd, 0x236a2bba, 0x2352043b, 0x2339db5e, 0x2321b126,
02024   0x23098593, 0x22f158a7,
02025   0x22d92a61, 0x22c0fac4, 0x22a8c9cf, 0x22909785, 0x227863e5, 0x22602ef1,
02026   0x2247f8aa, 0x222fc111,
02027   0x22178826, 0x21ff4dea, 0x21e71260, 0x21ced586, 0x21b6975f, 0x219e57eb,
02028   0x2186172b, 0x216dd521,
02029   0x215591cc, 0x213d4d2f, 0x21250749, 0x210cc01d, 0x20f477aa, 0x20dc2df2,
02030   0x20c3e2f5, 0x20ab96b5,
02031   0x20934933, 0x207afa6f, 0x2062aa6b, 0x204a5927, 0x203206a4, 0x2019b2e4,
02032   0x20015de7, 0x1fe907ae,
02033   0x1fd0b03a, 0x1fb8578b, 0x1f9ffda4, 0x1f87a285, 0x1f6f462f, 0x1f56e8a2,
02034   0x1f3e89e0, 0x1f2629ea,
02035   0x1f0dc8c0, 0x1ef56664, 0x1edd02d6, 0x1ec49e17, 0x1eac3829, 0x1e93d10c,
02036   0x1e7b68c2, 0x1e62ff4a,
02037   0x1e4a94a7, 0x1e3228d9, 0x1e19bbe0, 0x1e014dbf, 0x1de8de75, 0x1dd06e04,
02038   0x1db7fc6d, 0x1d9f89b1,
02039   0x1d8715d0, 0x1d6ea0cc, 0x1d562aa6, 0x1d3db35e, 0x1d253af5, 0x1d0cc16c,
02040   0x1cf446c5, 0x1cdbcb00,
02041   0x1cc34e1f, 0x1caad021, 0x1c925109, 0x1c79d0d6, 0x1c614f8b, 0x1c48cd27,
02042   0x1c3049ac, 0x1c17c51b,
02043   0x1bff3f75, 0x1be6b8ba, 0x1bce30ec, 0x1bb5a80c, 0x1b9d1e1a, 0x1b849317,
02044   0x1b6c0705, 0x1b5379e5,
02045   0x1b3aebb6, 0x1b225c7b, 0x1b09cc34, 0x1af13ae3, 0x1ad8a887, 0x1ac01522,
02046   0x1aa780b6, 0x1a8eeb42,
02047   0x1a7654c8, 0x1a5dbd49, 0x1a4524c6, 0x1a2c8b3f, 0x1a13f0b6, 0x19fb552c,
02048   0x19e2b8a2, 0x19ca1b17,
02049   0x19b17c8f, 0x1998dd09, 0x19803c86, 0x19679b07, 0x194ef88e, 0x1936551b,
02050   0x191db0af, 0x19050b4b,
02051   0x18ec64f0, 0x18d3bda0, 0x18bb155a, 0x18a26c20, 0x1889c1f3, 0x187116d4,
02052   0x18586ac3, 0x183fbdc3,
02053   0x18270fd3, 0x180e60f4, 0x17f5b129, 0x17dd0070, 0x17c44ecd, 0x17ab9c3e,
02054   0x1792e8c6, 0x177a3466,
02055   0x17617f1d, 0x1748c8ee, 0x173011d9, 0x171759df, 0x16fea102, 0x16e5e741,
02056   0x16cd2c9f, 0x16b4711b,
02057   0x169bb4b7, 0x1682f774, 0x166a3953, 0x16517a55, 0x1638ba7a, 0x161ff9c4,
02058   0x16073834, 0x15ee75cb,
02059   0x15d5b288, 0x15bcee6f, 0x15a4297f, 0x158b63b9, 0x15729d1f, 0x1559d5b1,
02060   0x15410d70, 0x1528445d,
02061   0x150f7a7a, 0x14f6afc7, 0x14dde445, 0x14c517f4, 0x14ac4ad7, 0x14937cee,
02062   0x147aae3a, 0x1461debc,
02063   0x14490e74, 0x14303d65, 0x14176b8e, 0x13fe98f1, 0x13e5c58e, 0x13ccf167,
02064   0x13b41c7d, 0x139b46d0,
02065   0x13827062, 0x13699933, 0x1350c144, 0x1337e897, 0x131f0f2c, 0x13063505,
02066   0x12ed5a21, 0x12d47e83,
02067   0x12bba22b, 0x12a2c51b, 0x1289e752, 0x127108d2, 0x1258299c, 0x123f49b2,
02068   0x12266913, 0x120d87c1,
02069   0x11f4a5bd, 0x11dbc307, 0x11c2dfa2, 0x11a9fb8d, 0x119116c9, 0x11783159,
02070   0x115f4b3c, 0x11466473,
02071   0x112d7d00, 0x111494e4, 0x10fbac1e, 0x10e2c2b2, 0x10c9d89e, 0x10b0ede5,
02072   0x10980287, 0x107f1686,
02073   0x106629e1, 0x104d3c9b, 0x10344eb4, 0x101b602d, 0x10027107, 0xfe98143,
02074   0xfd090e1, 0xfb79fe4,
02075   0xf9eae4c, 0xf85bc19, 0xf6cc94e, 0xf53d5ea, 0xf3ae1ee, 0xf21ed5d, 0xf08f836,
02076   0xef0027b,
02077   0xed70c2c, 0xebe154b, 0xea51dd8, 0xe8c25d5, 0xe732d42, 0xe5a3421, 0xe413a72,
02078   0xe284036,
02079   0xe0f456f, 0xdf64a1c, 0xddd4e40, 0xdc451dc, 0xdab54ef, 0xd92577b, 0xd795982,
02080   0xd605b03,
02081   0xd475c00, 0xd2e5c7b, 0xd155c73, 0xcfc5bea, 0xce35ae1, 0xcca5959, 0xcb15752,
02082   0xc9854cf,
02083   0xc7f51cf, 0xc664e53, 0xc4d4a5d, 0xc3445ee, 0xc1b4107, 0xc023ba7, 0xbe935d2,
02084   0xbd02f87,
02085   0xbb728c7, 0xb9e2193, 0xb8519ed, 0xb6c11d5, 0xb53094d, 0xb3a0055, 0xb20f6ee,
02086   0xb07ed19,
02087   0xaeee2d7, 0xad5d829, 0xabccd11, 0xaa3c18e, 0xa8ab5a2, 0xa71a94f, 0xa589c94,
02088   0xa3f8f73,
02089   0xa2681ed, 0xa0d7403, 0x9f465b5, 0x9db5706, 0x9c247f5, 0x9a93884, 0x99028b3,
02090   0x9771884,
02091   0x95e07f8, 0x944f70f, 0x92be5ca, 0x912d42c, 0x8f9c233, 0x8e0afe2, 0x8c79d3a,
02092   0x8ae8a3a,
02093   0x89576e5, 0x87c633c, 0x8634f3e, 0x84a3aee, 0x831264c, 0x8181159, 0x7fefc16,
02094   0x7e5e685,
02095   0x7ccd0a5, 0x7b3ba78, 0x79aa400, 0x7818d3c, 0x768762e, 0x74f5ed7, 0x7364738,
02096   0x71d2f52,
02097   0x7041726, 0x6eafeb4, 0x6d1e5fe, 0x6b8cd05, 0x69fb3c9, 0x6869a4c, 0x66d808f,
02098   0x6546692,
02099   0x63b4c57, 0x62231de, 0x6091729, 0x5effc38, 0x5d6e10c, 0x5bdc5a7, 0x5a4aa09,
02100   0x58b8e34,
02101   0x5727228, 0x55955e6, 0x540396f, 0x5271cc4, 0x50dffe7, 0x4f4e2d8, 0x4dbc597,
02102   0x4c2a827,
02103   0x4a98a88, 0x4906cbb, 0x4774ec1, 0x45e309a, 0x4451249, 0x42bf3cd, 0x412d528,
02104   0x3f9b65b,
02105   0x3e09767, 0x3c7784d, 0x3ae590d, 0x39539a9, 0x37c1a22, 0x362fa78, 0x349daac,
02106   0x330bac1,
02107   0x3179ab5, 0x2fe7a8c, 0x2e55a44, 0x2cc39e1, 0x2b31961, 0x299f8c7, 0x280d813,
02108   0x267b747,
02109   0x24e9662, 0x2357567, 0x21c5457, 0x2033331, 0x1ea11f7, 0x1d0f0ab, 0x1b7cf4d,
02110   0x19eaddd,
02111   0x1858c5e, 0x16c6ad0, 0x1534934, 0x13a278a, 0x12105d5, 0x107e414, 0xeec249,
02112   0xd5a075,
02113   0xbc7e99, 0xa35cb5, 0x8a3acb, 0x7118dc, 0x57f6e9, 0x3ed4f2, 0x25b2f8,
02114   0xc90fe,
02115
02116 };
02117
02133 arm_status arm_dct4_init_q31(
02134   arm_dct4_instance_q31 * S,
02135   arm_rfft_instance_q31 * S_RFFT,
02136   arm_cfft_radix4_instance_q31 * S_CFFT,
02137   uint16_t N,
02138   uint16_t Nby2,
02139   q31_t normalize)
02140 {
02141   /*  Initialise the default arm status */
02142   arm_status status = ARM_MATH_SUCCESS;
02143
02144   /* Initializing the pointer array with the weight table base addresses of different lengths */
02145   q31_t *twiddlePtr[3] = { (q31_t *) WeightsQ31_128, (q31_t *) WeightsQ31_512,
02146     (q31_t *) WeightsQ31_2048
02147   };
02148
02149   /* Initializing the pointer array with the cos factor table base addresses of different lengths */
02150   q31_t *pCosFactor[3] =
02151     { (q31_t *) cos_factorsQ31_128, (q31_t *) cos_factorsQ31_512,
02152     (q31_t *) cos_factorsQ31_2048
02153   };
02154
02155   /* Initialize the DCT4 length */
02156   S->N = N;
02157
02158   /* Initialize the half of DCT4 length */
02159   S->Nby2 = Nby2;
02160
02161   /* Initialize the DCT4 Normalizing factor */
02162   S->normalize = normalize;
02163
02164   /* Initialize Real FFT Instance */
02165   S->pRfft = S_RFFT;
02166
02167   /* Initialize Complex FFT Instance */
02168   S->pCfft = S_CFFT;
02169
02170   switch (N)
02171   {
02172     /* Initialize the table modifier values */
02173   case 2048u:
02174     S->pTwiddle = twiddlePtr[2];
02175     S->pCosFactor = pCosFactor[2];
02176     break;
02177   case 512u:
02178     S->pTwiddle = twiddlePtr[1];
02179     S->pCosFactor = pCosFactor[1];
02180     break;
02181   case 128u:
02182     S->pTwiddle = twiddlePtr[0];
02183     S->pCosFactor = pCosFactor[0];
02184     break;
02185   default:
02186     status = ARM_MATH_ARGUMENT_ERROR;
02187   }
02188
02189   /* Initialize the RFFT/RIFFT Function */
02190   arm_rfft_init_q31(S->pRfft, S->pCfft, S->N, 0, 1);
02191
02192   /* return the status of DCT4 Init function */
02193   return (status);
02194 }
02195
Generated on Mon Nov 28 2011 11:14:40 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_dct4_q15.c
00009 *
00010 * Description:  Processing function of DCT4 & IDCT4 Q15.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00052 void arm_dct4_q15(
00053   const arm_dct4_instance_q15 * S,
00054   q15_t * pState,
00055   q15_t * pInlineBuffer)
00056 {
00057   uint32_t i;                                    /* Loop counter */
00058   q15_t *weights = S->pTwiddle;                  /* Pointer to the Weights table */
00059   q15_t *cosFact = S->pCosFactor;                /* Pointer to the cos factors table */
00060   q15_t *pS1, *pS2, *pbuff;                      /* Temporary pointers for input buffer and pState buffer */
00061   q15_t in;                                      /* Temporary variable */
00062
00063
00064   /* DCT4 computation involves DCT2 (which is calculated using RFFT)
00065    * along with some pre-processing and post-processing.
00066    * Computational procedure is explained as follows:
00067    * (a) Pre-processing involves multiplying input with cos factor,
00068    *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))
00069    *              where,
00070    *                 r(n) -- output of preprocessing
00071    *                 u(n) -- input to preprocessing(actual Source buffer)
00072    * (b) Calculation of DCT2 using FFT is divided into three steps:
00073    *                  Step1: Re-ordering of even and odd elements of input.
00074    *                  Step2: Calculating FFT of the re-ordered input.
00075    *                  Step3: Taking the real part of the product of FFT output and weights.
00076    * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:
00077    *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
00078    *                        where,
00079    *                           Y4 -- DCT4 output,   Y2 -- DCT2 output
00080    * (d) Multiplying the output with the normalizing factor sqrt(2/N).
00081    */
00082
00083         /*-------- Pre-processing ------------*/
00084   /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
00085   arm_mult_q15(pInlineBuffer, cosFact, pInlineBuffer, S->N);
00086   arm_shift_q15(pInlineBuffer, 1, pInlineBuffer, S->N);
00087
00088   /* ----------------------------------------------------------------
00089    * Step1: Re-ordering of even and odd elements as
00090    *             pState[i] =  pInlineBuffer[2*i] and
00091    *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2
00092    ---------------------------------------------------------------------*/
00093
00094   /* pS1 initialized to pState */
00095   pS1 = pState;
00096
00097   /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
00098   pS2 = pState + (S->N - 1u);
00099
00100   /* pbuff initialized to input buffer */
00101   pbuff = pInlineBuffer;
00102
00103
00104 #ifndef ARM_MATH_CM0
00105
00106   /* Run the below code for Cortex-M4 and Cortex-M3 */
00107
00108   /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
00109   i = (uint32_t) S->Nby2 >> 2u;
00110
00111   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00112    ** a second loop below computes the remaining 1 to 3 samples. */
00113   do
00114   {
00115     /* Re-ordering of even and odd elements */
00116     /* pState[i] =  pInlineBuffer[2*i] */
00117     *pS1++ = *pbuff++;
00118     /* pState[N-i-1] = pInlineBuffer[2*i+1] */
00119     *pS2-- = *pbuff++;
00120
00121     *pS1++ = *pbuff++;
00122     *pS2-- = *pbuff++;
00123
00124     *pS1++ = *pbuff++;
00125     *pS2-- = *pbuff++;
00126
00127     *pS1++ = *pbuff++;
00128     *pS2-- = *pbuff++;
00129
00130     /* Decrement the loop counter */
00131     i--;
00132   } while(i > 0u);
00133
00134   /* pbuff initialized to input buffer */
00135   pbuff = pInlineBuffer;
00136
00137   /* pS1 initialized to pState */
00138   pS1 = pState;
00139
00140   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
00141   i = (uint32_t) S->N >> 2u;
00142
00143   /* Processing with loop unrolling 4 times as N is always multiple of 4.
00144    * Compute 4 outputs at a time */
00145   do
00146   {
00147     /* Writing the re-ordered output back to inplace input buffer */
00148     *pbuff++ = *pS1++;
00149     *pbuff++ = *pS1++;
00150     *pbuff++ = *pS1++;
00151     *pbuff++ = *pS1++;
00152
00153     /* Decrement the loop counter */
00154     i--;
00155   } while(i > 0u);
00156
00157
00158   /* ---------------------------------------------------------
00159    *     Step2: Calculate RFFT for N-point input
00160    * ---------------------------------------------------------- */
00161   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
00162   arm_rfft_q15(S->pRfft, pInlineBuffer, pState);
00163
00164  /*----------------------------------------------------------------------
00165   *  Step3: Multiply the FFT output with the weights.
00166   *----------------------------------------------------------------------*/
00167   arm_cmplx_mult_cmplx_q15(pState, weights, pState, S->N);
00168
00169   /* The output of complex multiplication is in 3.13 format.
00170    * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */
00171   arm_shift_q15(pState, 2, pState, S->N * 2);
00172
00173   /* ----------- Post-processing ---------- */
00174   /* DCT-IV can be obtained from DCT-II by the equation,
00175    *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
00176    *       Hence, Y4(0) = Y2(0)/2  */
00177   /* Getting only real part from the output and Converting to DCT-IV */
00178
00179   /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
00180   i = ((uint32_t) S->N - 1u) >> 2u;
00181
00182   /* pbuff initialized to input buffer. */
00183   pbuff = pInlineBuffer;
00184
00185   /* pS1 initialized to pState */
00186   pS1 = pState;
00187
00188   /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
00189   in = *pS1++ >> 1u;
00190   /* input buffer acts as inplace, so output values are stored in the input itself. */
00191   *pbuff++ = in;
00192
00193   /* pState pointer is incremented twice as the real values are located alternatively in the array */
00194   pS1++;
00195
00196   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00197    ** a second loop below computes the remaining 1 to 3 samples. */
00198   do
00199   {
00200     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
00201     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
00202     in = *pS1++ - in;
00203     *pbuff++ = in;
00204     /* points to the next real value */
00205     pS1++;
00206
00207     in = *pS1++ - in;
00208     *pbuff++ = in;
00209     pS1++;
00210
00211     in = *pS1++ - in;
00212     *pbuff++ = in;
00213     pS1++;
00214
00215     in = *pS1++ - in;
00216     *pbuff++ = in;
00217     pS1++;
00218
00219     /* Decrement the loop counter */
00220     i--;
00221   } while(i > 0u);
00222
00223   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00224    ** No loop unrolling is used. */
00225   i = ((uint32_t) S->N - 1u) % 0x4u;
00226
00227   while(i > 0u)
00228   {
00229     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
00230     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
00231     in = *pS1++ - in;
00232     *pbuff++ = in;
00233     /* points to the next real value */
00234     pS1++;
00235
00236     /* Decrement the loop counter */
00237     i--;
00238   }
00239
00240
00241    /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
00242
00243   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
00244   i = (uint32_t) S->N >> 2u;
00245
00246   /* pbuff initialized to the pInlineBuffer(now contains the output values) */
00247   pbuff = pInlineBuffer;
00248
00249   /* Processing with loop unrolling 4 times as N is always multiple of 4.  Compute 4 outputs at a time */
00250   do
00251   {
00252     /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
00253     in = *pbuff;
00254     *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
00255
00256     in = *pbuff;
00257     *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
00258
00259     in = *pbuff;
00260     *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
00261
00262     in = *pbuff;
00263     *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
00264
00265     /* Decrement the loop counter */
00266     i--;
00267   } while(i > 0u);
00268
00269
00270 #else
00271
00272   /* Run the below code for Cortex-M0 */
00273
00274   /* Initializing the loop counter to N/2 */
00275   i = (uint32_t) S->Nby2;
00276
00277   do
00278   {
00279     /* Re-ordering of even and odd elements */
00280     /* pState[i] =  pInlineBuffer[2*i] */
00281     *pS1++ = *pbuff++;
00282     /* pState[N-i-1] = pInlineBuffer[2*i+1] */
00283     *pS2-- = *pbuff++;
00284
00285     /* Decrement the loop counter */
00286     i--;
00287   } while(i > 0u);
00288
00289   /* pbuff initialized to input buffer */
00290   pbuff = pInlineBuffer;
00291
00292   /* pS1 initialized to pState */
00293   pS1 = pState;
00294
00295   /* Initializing the loop counter */
00296   i = (uint32_t) S->N;
00297
00298   do
00299   {
00300     /* Writing the re-ordered output back to inplace input buffer */
00301     *pbuff++ = *pS1++;
00302
00303     /* Decrement the loop counter */
00304     i--;
00305   } while(i > 0u);
00306
00307
00308   /* ---------------------------------------------------------
00309    *     Step2: Calculate RFFT for N-point input
00310    * ---------------------------------------------------------- */
00311   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
00312   arm_rfft_q15(S->pRfft, pInlineBuffer, pState);
00313
00314  /*----------------------------------------------------------------------
00315   *  Step3: Multiply the FFT output with the weights.
00316   *----------------------------------------------------------------------*/
00317   arm_cmplx_mult_cmplx_q15(pState, weights, pState, S->N);
00318
00319   /* The output of complex multiplication is in 3.13 format.
00320    * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */
00321   arm_shift_q15(pState, 2, pState, S->N * 2);
00322
00323   /* ----------- Post-processing ---------- */
00324   /* DCT-IV can be obtained from DCT-II by the equation,
00325    *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
00326    *       Hence, Y4(0) = Y2(0)/2  */
00327   /* Getting only real part from the output and Converting to DCT-IV */
00328
00329   /* Initializing the loop counter */
00330   i = ((uint32_t) S->N - 1u);
00331
00332   /* pbuff initialized to input buffer. */
00333   pbuff = pInlineBuffer;
00334
00335   /* pS1 initialized to pState */
00336   pS1 = pState;
00337
00338   /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
00339   in = *pS1++ >> 1u;
00340   /* input buffer acts as inplace, so output values are stored in the input itself. */
00341   *pbuff++ = in;
00342
00343   /* pState pointer is incremented twice as the real values are located alternatively in the array */
00344   pS1++;
00345
00346   do
00347   {
00348     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
00349     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
00350     in = *pS1++ - in;
00351     *pbuff++ = in;
00352     /* points to the next real value */
00353     pS1++;
00354
00355     /* Decrement the loop counter */
00356     i--;
00357   } while(i > 0u);
00358
00359    /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
00360
00361   /* Initializing the loop counter */
00362   i = (uint32_t) S->N;
00363
00364   /* pbuff initialized to the pInlineBuffer(now contains the output values) */
00365   pbuff = pInlineBuffer;
00366
00367   do
00368   {
00369     /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
00370     in = *pbuff;
00371     *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
00372
00373     /* Decrement the loop counter */
00374     i--;
00375   } while(i > 0u);
00376
00377 #endif /* #ifndef ARM_MATH_CM0 */
00378
00379 }
00380
Generated on Mon Nov 28 2011 11:14:40 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_dct4_q31.c
00009 *
00010 * Description:  Processing function of DCT4 & IDCT4 Q31.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00053 void arm_dct4_q31(
00054   const arm_dct4_instance_q31 * S,
00055   q31_t * pState,
00056   q31_t * pInlineBuffer)
00057 {
00058   uint16_t i;                                    /* Loop counter */
00059   q31_t *weights = S->pTwiddle;                  /* Pointer to the Weights table */
00060   q31_t *cosFact = S->pCosFactor;                /* Pointer to the cos factors table */
00061   q31_t *pS1, *pS2, *pbuff;                      /* Temporary pointers for input buffer and pState buffer */
00062   q31_t in;                                      /* Temporary variable */
00063
00064
00065   /* DCT4 computation involves DCT2 (which is calculated using RFFT)
00066    * along with some pre-processing and post-processing.
00067    * Computational procedure is explained as follows:
00068    * (a) Pre-processing involves multiplying input with cos factor,
00069    *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))
00070    *              where,
00071    *                 r(n) -- output of preprocessing
00072    *                 u(n) -- input to preprocessing(actual Source buffer)
00073    * (b) Calculation of DCT2 using FFT is divided into three steps:
00074    *                  Step1: Re-ordering of even and odd elements of input.
00075    *                  Step2: Calculating FFT of the re-ordered input.
00076    *                  Step3: Taking the real part of the product of FFT output and weights.
00077    * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:
00078    *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
00079    *                        where,
00080    *                           Y4 -- DCT4 output,   Y2 -- DCT2 output
00081    * (d) Multiplying the output with the normalizing factor sqrt(2/N).
00082    */
00083
00084         /*-------- Pre-processing ------------*/
00085   /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
00086   arm_mult_q31(pInlineBuffer, cosFact, pInlineBuffer, S->N);
00087   arm_shift_q31(pInlineBuffer, 1, pInlineBuffer, S->N);
00088
00089   /* ----------------------------------------------------------------
00090    * Step1: Re-ordering of even and odd elements as
00091    *             pState[i] =  pInlineBuffer[2*i] and
00092    *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2
00093    ---------------------------------------------------------------------*/
00094
00095   /* pS1 initialized to pState */
00096   pS1 = pState;
00097
00098   /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
00099   pS2 = pState + (S->N - 1u);
00100
00101   /* pbuff initialized to input buffer */
00102   pbuff = pInlineBuffer;
00103
00104 #ifndef ARM_MATH_CM0
00105
00106   /* Run the below code for Cortex-M4 and Cortex-M3 */
00107
00108   /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
00109   i = S->Nby2 >> 2u;
00110
00111   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00112    ** a second loop below computes the remaining 1 to 3 samples. */
00113   do
00114   {
00115     /* Re-ordering of even and odd elements */
00116     /* pState[i] =  pInlineBuffer[2*i] */
00117     *pS1++ = *pbuff++;
00118     /* pState[N-i-1] = pInlineBuffer[2*i+1] */
00119     *pS2-- = *pbuff++;
00120
00121     *pS1++ = *pbuff++;
00122     *pS2-- = *pbuff++;
00123
00124     *pS1++ = *pbuff++;
00125     *pS2-- = *pbuff++;
00126
00127     *pS1++ = *pbuff++;
00128     *pS2-- = *pbuff++;
00129
00130     /* Decrement the loop counter */
00131     i--;
00132   } while(i > 0u);
00133
00134   /* pbuff initialized to input buffer */
00135   pbuff = pInlineBuffer;
00136
00137   /* pS1 initialized to pState */
00138   pS1 = pState;
00139
00140   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
00141   i = S->N >> 2u;
00142
00143   /* Processing with loop unrolling 4 times as N is always multiple of 4.
00144    * Compute 4 outputs at a time */
00145   do
00146   {
00147     /* Writing the re-ordered output back to inplace input buffer */
00148     *pbuff++ = *pS1++;
00149     *pbuff++ = *pS1++;
00150     *pbuff++ = *pS1++;
00151     *pbuff++ = *pS1++;
00152
00153     /* Decrement the loop counter */
00154     i--;
00155   } while(i > 0u);
00156
00157
00158   /* ---------------------------------------------------------
00159    *     Step2: Calculate RFFT for N-point input
00160    * ---------------------------------------------------------- */
00161   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
00162   arm_rfft_q31(S->pRfft, pInlineBuffer, pState);
00163
00164   /*----------------------------------------------------------------------
00165    *  Step3: Multiply the FFT output with the weights.
00166    *----------------------------------------------------------------------*/
00167   arm_cmplx_mult_cmplx_q31(pState, weights, pState, S->N);
00168
00169   /* The output of complex multiplication is in 3.29 format.
00170    * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */
00171   arm_shift_q31(pState, 2, pState, S->N * 2);
00172
00173   /* ----------- Post-processing ---------- */
00174   /* DCT-IV can be obtained from DCT-II by the equation,
00175    *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
00176    *       Hence, Y4(0) = Y2(0)/2  */
00177   /* Getting only real part from the output and Converting to DCT-IV */
00178
00179   /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
00180   i = (S->N - 1u) >> 2u;
00181
00182   /* pbuff initialized to input buffer. */
00183   pbuff = pInlineBuffer;
00184
00185   /* pS1 initialized to pState */
00186   pS1 = pState;
00187
00188   /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
00189   in = *pS1++ >> 1u;
00190   /* input buffer acts as inplace, so output values are stored in the input itself. */
00191   *pbuff++ = in;
00192
00193   /* pState pointer is incremented twice as the real values are located alternatively in the array */
00194   pS1++;
00195
00196   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00197    ** a second loop below computes the remaining 1 to 3 samples. */
00198   do
00199   {
00200     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
00201     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
00202     in = *pS1++ - in;
00203     *pbuff++ = in;
00204     /* points to the next real value */
00205     pS1++;
00206
00207     in = *pS1++ - in;
00208     *pbuff++ = in;
00209     pS1++;
00210
00211     in = *pS1++ - in;
00212     *pbuff++ = in;
00213     pS1++;
00214
00215     in = *pS1++ - in;
00216     *pbuff++ = in;
00217     pS1++;
00218
00219     /* Decrement the loop counter */
00220     i--;
00221   } while(i > 0u);
00222
00223   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00224    ** No loop unrolling is used. */
00225   i = (S->N - 1u) % 0x4u;
00226
00227   while(i > 0u)
00228   {
00229     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
00230     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
00231     in = *pS1++ - in;
00232     *pbuff++ = in;
00233     /* points to the next real value */
00234     pS1++;
00235
00236     /* Decrement the loop counter */
00237     i--;
00238   }
00239
00240
00241         /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
00242
00243   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
00244   i = S->N >> 2u;
00245
00246   /* pbuff initialized to the pInlineBuffer(now contains the output values) */
00247   pbuff = pInlineBuffer;
00248
00249   /* Processing with loop unrolling 4 times as N is always multiple of 4.  Compute 4 outputs at a time */
00250   do
00251   {
00252     /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
00253     in = *pbuff;
00254     *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
00255
00256     in = *pbuff;
00257     *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
00258
00259     in = *pbuff;
00260     *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
00261
00262     in = *pbuff;
00263     *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
00264
00265     /* Decrement the loop counter */
00266     i--;
00267   } while(i > 0u);
00268
00269
00270 #else
00271
00272   /* Run the below code for Cortex-M0 */
00273
00274   /* Initializing the loop counter to N/2 */
00275   i = S->Nby2;
00276
00277   do
00278   {
00279     /* Re-ordering of even and odd elements */
00280     /* pState[i] =  pInlineBuffer[2*i] */
00281     *pS1++ = *pbuff++;
00282     /* pState[N-i-1] = pInlineBuffer[2*i+1] */
00283     *pS2-- = *pbuff++;
00284
00285     /* Decrement the loop counter */
00286     i--;
00287   } while(i > 0u);
00288
00289   /* pbuff initialized to input buffer */
00290   pbuff = pInlineBuffer;
00291
00292   /* pS1 initialized to pState */
00293   pS1 = pState;
00294
00295   /* Initializing the loop counter */
00296   i = S->N;
00297
00298   do
00299   {
00300     /* Writing the re-ordered output back to inplace input buffer */
00301     *pbuff++ = *pS1++;
00302
00303     /* Decrement the loop counter */
00304     i--;
00305   } while(i > 0u);
00306
00307
00308   /* ---------------------------------------------------------
00309    *     Step2: Calculate RFFT for N-point input
00310    * ---------------------------------------------------------- */
00311   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
00312   arm_rfft_q31(S->pRfft, pInlineBuffer, pState);
00313
00314   /*----------------------------------------------------------------------
00315    *  Step3: Multiply the FFT output with the weights.
00316    *----------------------------------------------------------------------*/
00317   arm_cmplx_mult_cmplx_q31(pState, weights, pState, S->N);
00318
00319   /* The output of complex multiplication is in 3.29 format.
00320    * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */
00321   arm_shift_q31(pState, 2, pState, S->N * 2);
00322
00323   /* ----------- Post-processing ---------- */
00324   /* DCT-IV can be obtained from DCT-II by the equation,
00325    *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
00326    *       Hence, Y4(0) = Y2(0)/2  */
00327   /* Getting only real part from the output and Converting to DCT-IV */
00328
00329   /* pbuff initialized to input buffer. */
00330   pbuff = pInlineBuffer;
00331
00332   /* pS1 initialized to pState */
00333   pS1 = pState;
00334
00335   /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
00336   in = *pS1++ >> 1u;
00337   /* input buffer acts as inplace, so output values are stored in the input itself. */
00338   *pbuff++ = in;
00339
00340   /* pState pointer is incremented twice as the real values are located alternatively in the array */
00341   pS1++;
00342
00343   /* Initializing the loop counter */
00344   i = (S->N - 1u);
00345
00346   while(i > 0u)
00347   {
00348     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
00349     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
00350     in = *pS1++ - in;
00351     *pbuff++ = in;
00352     /* points to the next real value */
00353     pS1++;
00354
00355     /* Decrement the loop counter */
00356     i--;
00357   }
00358
00359
00360         /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
00361
00362   /* Initializing the loop counter */
00363   i = S->N;
00364
00365   /* pbuff initialized to the pInlineBuffer(now contains the output values) */
00366   pbuff = pInlineBuffer;
00367
00368   do
00369   {
00370     /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
00371     in = *pbuff;
00372     *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
00373
00374     /* Decrement the loop counter */
00375     i--;
00376   } while(i > 0u);
00377
00378 #endif /* #ifndef ARM_MATH_CM0 */
00379
00380 }
00381
Generated on Mon Nov 28 2011 11:14:40 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_dot_prod_f32.c
00009 *
00010 * Description:  Floating-point dot product.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00062 void arm_dot_prod_f32(
00063   float32_t * pSrcA,
00064   float32_t * pSrcB,
00065   uint32_t blockSize,
00066   float32_t * result)
00067 {
00068   float32_t sum = 0.0f;                          /* Temporary result storage */
00069   uint32_t blkCnt;                               /* loop counter */
00070
00071
00072 #ifndef ARM_MATH_CM0
00073
00074 /* Run the below code for Cortex-M4 and Cortex-M3 */
00075   /*loop Unrolling */
00076   blkCnt = blockSize >> 2u;
00077
00078   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00079    ** a second loop below computes the remaining 1 to 3 samples. */
00080   while(blkCnt > 0u)
00081   {
00082     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00083     /* Calculate dot product and then store the result in a temporary buffer */
00084     sum += (*pSrcA++) * (*pSrcB++);
00085     sum += (*pSrcA++) * (*pSrcB++);
00086     sum += (*pSrcA++) * (*pSrcB++);
00087     sum += (*pSrcA++) * (*pSrcB++);
00088
00089     /* Decrement the loop counter */
00090     blkCnt--;
00091   }
00092
00093   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00094    ** No loop unrolling is used. */
00095   blkCnt = blockSize % 0x4u;
00096
00097 #else
00098
00099   /* Run the below code for Cortex-M0 */
00100
00101   /* Initialize blkCnt with number of samples */
00102   blkCnt = blockSize;
00103
00104 #endif /* #ifndef ARM_MATH_CM0 */
00105
00106
00107   while(blkCnt > 0u)
00108   {
00109     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00110     /* Calculate dot product and then store the result in a temporary buffer. */
00111     sum += (*pSrcA++) * (*pSrcB++);
00112
00113     /* Decrement the loop counter */
00114     blkCnt--;
00115   }
00116   /* Store the result back in the destination buffer */
00117   *result = sum;
00118 }
00119
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_dot_prod_q7.c
00009 *
00010 * Description:  Q7 dot product.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00061 void arm_dot_prod_q7(
00062   q7_t * pSrcA,
00063   q7_t * pSrcB,
00064   uint32_t blockSize,
00065   q31_t * result)
00066 {
00067   uint32_t blkCnt;                               /* loop counter */
00068
00069   q31_t sum = 0;                                 /* Temporary variables to store output */
00070
00071 #ifndef ARM_MATH_CM0
00072
00073 /* Run the below code for Cortex-M4 and Cortex-M3 */
00074
00075   q31_t input1, input2;                          /* Temporary variables to store input */
00076   q15_t in1, in2;                                /* Temporary variables to store input */
00077
00078
00079
00080   /*loop Unrolling */
00081   blkCnt = blockSize >> 2u;
00082
00083   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00084    ** a second loop below computes the remaining 1 to 3 samples. */
00085   while(blkCnt > 0u)
00086   {
00087     /* Reading two inputs of SrcA buffer and packing */
00088     in1 = (q15_t) * pSrcA++;
00089     in2 = (q15_t) * pSrcA++;
00090     input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00091
00092     /* Reading two inputs of SrcB buffer and packing */
00093     in1 = (q15_t) * pSrcB++;
00094     in2 = (q15_t) * pSrcB++;
00095     input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00096
00097     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00098     /* Perform Dot product of 2 packed inputs using SMLALD and store the result in a temporary variable. */
00099     sum = __SMLAD(input1, input2, sum);
00100
00101     /* Reading two inputs of SrcA buffer and packing */
00102     in1 = (q15_t) * pSrcA++;
00103     in2 = (q15_t) * pSrcA++;
00104     input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00105
00106     /* Reading two inputs of SrcB buffer and packing */
00107     in1 = (q15_t) * pSrcB++;
00108     in2 = (q15_t) * pSrcB++;
00109     input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00110
00111     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00112     /* Perform Dot product of 2 packed inputs using SMLALD and store the result in a temporary variable. */
00113     sum = __SMLAD(input1, input2, sum);
00114
00115
00116
00117     /* Decrement the loop counter */
00118     blkCnt--;
00119   }
00120
00121   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00122    ** No loop unrolling is used. */
00123   blkCnt = blockSize % 0x4u;
00124
00125   while(blkCnt > 0u)
00126   {
00127     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00128     /* Dot product and then store the results in a temporary buffer. */
00129     sum = __SMLAD(*pSrcA++, *pSrcB++, sum);
00130
00131     /* Decrement the loop counter */
00132     blkCnt--;
00133   }
00134
00135 #else
00136
00137   /* Run the below code for Cortex-M0 */
00138
00139
00140
00141   /* Initialize blkCnt with number of samples */
00142   blkCnt = blockSize;
00143
00144   while(blkCnt > 0u)
00145   {
00146     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00147     /* Dot product and then store the results in a temporary buffer. */
00148     sum += (q31_t) ((q15_t) * pSrcA++ * *pSrcB++);
00149
00150     /* Decrement the loop counter */
00151     blkCnt--;
00152   }
00153
00154 #endif /* #ifndef ARM_MATH_CM0 */
00155
00156
00157   /* Store the result in the destination buffer in 18.14 format */
00158   *result = sum;
00159 }
00160
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_dot_prod_q15.c
00009 *
00010 * Description:  Q15 dot product.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00061 void arm_dot_prod_q15(
00062   q15_t * pSrcA,
00063   q15_t * pSrcB,
00064   uint32_t blockSize,
00065   q63_t * result)
00066 {
00067   q63_t sum = 0;                                 /* Temporary result storage */
00068   uint32_t blkCnt;                               /* loop counter */
00069
00070 #ifndef ARM_MATH_CM0
00071
00072 /* Run the below code for Cortex-M4 and Cortex-M3 */
00073
00074
00075   /*loop Unrolling */
00076   blkCnt = blockSize >> 2u;
00077
00078   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00079    ** a second loop below computes the remaining 1 to 3 samples. */
00080   while(blkCnt > 0u)
00081   {
00082     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00083     /* Calculate dot product and then store the result in a temporary buffer. */
00084     sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
00085     sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
00086
00087     /* Decrement the loop counter */
00088     blkCnt--;
00089   }
00090
00091   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00092    ** No loop unrolling is used. */
00093   blkCnt = blockSize % 0x4u;
00094
00095   while(blkCnt > 0u)
00096   {
00097     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00098     /* Calculate dot product and then store the results in a temporary buffer. */
00099     sum = __SMLALD(*pSrcA++, *pSrcB++, sum);
00100
00101     /* Decrement the loop counter */
00102     blkCnt--;
00103   }
00104
00105
00106 #else
00107
00108   /* Run the below code for Cortex-M0 */
00109
00110   /* Initialize blkCnt with number of samples */
00111   blkCnt = blockSize;
00112
00113   while(blkCnt > 0u)
00114   {
00115     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00116     /* Calculate dot product and then store the results in a temporary buffer. */
00117     sum += (q63_t) ((q31_t) * pSrcA++ * *pSrcB++);
00118
00119     /* Decrement the loop counter */
00120     blkCnt--;
00121   }
00122
00123 #endif /* #ifndef ARM_MATH_CM0 */
00124
00125   /* Store the result in the destination buffer in 34.30 format */
00126   *result = sum;
00127
00128 }
00129
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_dot_prod_q31.c
00009 *
00010 * Description:  Q31 dot product.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00062 void arm_dot_prod_q31(
00063   q31_t * pSrcA,
00064   q31_t * pSrcB,
00065   uint32_t blockSize,
00066   q63_t * result)
00067 {
00068   q63_t sum = 0;                                 /* Temporary result storage */
00069   uint32_t blkCnt;                               /* loop counter */
00070
00071
00072 #ifndef ARM_MATH_CM0
00073
00074 /* Run the below code for Cortex-M4 and Cortex-M3 */
00075
00076   /*loop Unrolling */
00077   blkCnt = blockSize >> 2u;
00078
00079   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00080    ** a second loop below computes the remaining 1 to 3 samples. */
00081   while(blkCnt > 0u)
00082   {
00083     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00084     /* Calculate dot product and then store the result in a temporary buffer. */
00085     sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u;
00086     sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u;
00087     sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u;
00088     sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u;
00089
00090     /* Decrement the loop counter */
00091     blkCnt--;
00092   }
00093
00094   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00095    ** No loop unrolling is used. */
00096   blkCnt = blockSize % 0x4u;
00097
00098 #else
00099
00100   /* Run the below code for Cortex-M0 */
00101
00102   /* Initialize blkCnt with number of samples */
00103   blkCnt = blockSize;
00104
00105 #endif /* #ifndef ARM_MATH_CM0 */
00106
00107
00108   while(blkCnt > 0u)
00109   {
00110     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00111     /* Calculate dot product and then store the result in a temporary buffer. */
00112     sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u;
00113
00114     /* Decrement the loop counter */
00115     blkCnt--;
00116   }
00117
00118   /* Store the result in the destination buffer in 16.48 format */
00119   *result = sum;
00120 }
00121
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_dotproduct_example/system_ARMCM0.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_dotproduct_example/system_ARMCM0.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM0.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_dotproduct_example/system_ARMCM3.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_dotproduct_example/system_ARMCM3.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM3.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_dotproduct_example/system_ARMCM4.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_dotproduct_example/system_ARMCM4.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM4.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
00062     SCB->CPACR |= ((3UL << 10*2) |                 /* set CP10 Full Access */
00063                    (3UL << 11*2)  );               /* set CP11 Full Access */
00064   #endif
00065
00066   SystemCoreClock = __SYSTEM_CLOCK;
00067
00068 #ifdef __USE_GPIO
00069   ARM_GPIO0->DATA[0].WORD = 0;
00070   ARM_GPIO0->IE = 0;
00071   ARM_GPIO0->DIR = 0xff83;
00072
00073   ARM_GPIO1->DATA[0].WORD = 0;
00074   ARM_GPIO1->IE = 0;
00075   ARM_GPIO1->DIR = 0;
00076
00077   ARM_GPIO2->DATA[0].WORD = 0;
00078   ARM_GPIO2->IE = 0;
00079   ARM_GPIO2->DIR = 0;
00080 #endif
00081 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_dotproduct_example/arm_dotproduct_example_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_dotproduct_example/arm_dotproduct_example_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        29. November 2010
00005 * $Revision:    V1.0.3
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_dotproduct_example_f32.c
00009 *
00010 * Description:  Example code computing dot product of two vectors.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 *
00015 * Version 1.0.3 2010/11/29
00016 *    Re-organized the CMSIS folders and updated documentation.
00017 *
00018 * Version 1.0.1 2010/10/05 KK
00019 *    Production release and review comments incorporated.
00020 *
00021 * Version 1.0.0 2010/09/20 KK
00022 *    Production release and review comments incorporated.
00023 * ------------------------------------------------------------------- */
00024
00066 #include <math.h>
00067 #include "arm_math.h"
00068
00069 /* ----------------------------------------------------------------------
00070 * Defines each of the tests performed
00071 * ------------------------------------------------------------------- */
00072 #define MAX_BLOCKSIZE   32
00073 #define DELTA           (0.000001f)
00074
00075 /* ----------------------------------------------------------------------
00076 * Test input data for Floating point Dot Product example for 32-blockSize
00077 * Generated by the MATLAB randn() function
00078 * ------------------------------------------------------------------- */
00079 /* ----------------------------------------------------------------------
00080 ** Test input data of srcA for blockSize 32
00081 ** ------------------------------------------------------------------- */
00082 float32_t srcA_buf_f32[MAX_BLOCKSIZE] =
00083 {
00084 -0.4325648115282207,    -1.6655843782380970,    0.1253323064748307,
00085  0.2876764203585489,    -1.1464713506814637,    1.1909154656429988,
00086  1.1891642016521031,    -0.0376332765933176,    0.3272923614086541,
00087  0.1746391428209245,    -0.1867085776814394,    0.7257905482933027,
00088 -0.5883165430141887,     2.1831858181971011,   -0.1363958830865957,
00089  0.1139313135208096,     1.0667682113591888,    0.0592814605236053,
00090 -0.0956484054836690,    -0.8323494636500225,    0.2944108163926404,
00091 -1.3361818579378040,     0.7143245518189522,    1.6235620644462707,
00092 -0.6917757017022868,     0.8579966728282626,    1.2540014216025324,
00093 -1.5937295764474768,    -1.4409644319010200,    0.5711476236581780,
00094 -0.3998855777153632,     0.6899973754643451
00095 };
00096
00097 /* ----------------------------------------------------------------------
00098 ** Test input data of srcB for blockSize 32
00099 ** ------------------------------------------------------------------- */
00100 float32_t srcB_buf_f32[MAX_BLOCKSIZE] =
00101 {
00102  1.7491401329284098,    0.1325982188803279,      0.3252281811989881,
00103 -0.7938091410349637,    0.3149236145048914,     -0.5272704888029532,
00104  0.9322666565031119,    1.1646643544607362,     -2.0456694357357357,
00105 -0.6443728590041911,    1.7410657940825480,      0.4867684246821860,
00106  1.0488288293660140,    1.4885752747099299,      1.2705014969484090,
00107 -1.8561241921210170,    2.1343209047321410,  1.4358467535865909,
00108 -0.9173023332875400,   -1.1060770780029008,      0.8105708062681296,
00109  0.6985430696369063,   -0.4015827425012831,      1.2687512030669628,
00110 -0.7836083053674872,    0.2132664971465569,      0.7878984786088954,
00111  0.8966819356782295,   -0.1869172943544062,      1.0131816724341454,
00112  0.2484350696132857,    0.0596083377937976
00113 };
00114
00115 /* Reference dot product output */
00116 float32_t  refDotProdOut = 5.9273644806352142;
00117
00118 /* ----------------------------------------------------------------------
00119 * Declare Global variables
00120 * ------------------------------------------------------------------- */
00121 float32_t multOutput[MAX_BLOCKSIZE];  /* Intermediate output */
00122 float32_t testOutput;  /* Final ouput */
00123
00124 arm_status status;       /* Status of the example */
00125
00126 int32_t main(void)
00127 {
00128         uint32_t i;                      /* Loop counter */
00129         float32_t diff;          /* Difference between reference and test outputs */
00130
00131         /* Multiplication of two input buffers */
00132         arm_mult_f32(srcA_buf_f32, srcB_buf_f32, multOutput, MAX_BLOCKSIZE);
00133
00134         /* Accumulate the multiplication output values to
00135            get the dot product of the two inputs */
00136         for(i=0; i< MAX_BLOCKSIZE; i++)
00137     {
00138                 arm_add_f32(&testOutput, &multOutput[i], &testOutput, 1);
00139     }
00140
00141         /* absolute value of difference between ref and test */
00142         diff = fabsf(refDotProdOut - testOutput);
00143
00144         /* Comparison of dot product value with reference */
00145         if(diff > DELTA)
00146         {
00147                 status = ARM_MATH_TEST_FAILURE;
00148         }
00149
00150         if( status == ARM_MATH_TEST_FAILURE)
00151         {
00152           while(1);
00153         }
00154
00155     while(1);                             /* main function does not return */
00156 }
00157
00158
Generated on Mon Nov 28 2011 11:14:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM0.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM0.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM0.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM3.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM3.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM3.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM4.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/system_ARMCM4.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM4.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
00062     SCB->CPACR |= ((3UL << 10*2) |                 /* set CP10 Full Access */
00063                    (3UL << 11*2)  );               /* set CP11 Full Access */
00064   #endif
00065
00066   SystemCoreClock = __SYSTEM_CLOCK;
00067
00068 #ifdef __USE_GPIO
00069   ARM_GPIO0->DATA[0].WORD = 0;
00070   ARM_GPIO0->IE = 0;
00071   ARM_GPIO0->DIR = 0xff83;
00072
00073   ARM_GPIO1->DATA[0].WORD = 0;
00074   ARM_GPIO1->IE = 0;
00075   ARM_GPIO1->DIR = 0;
00076
00077   ARM_GPIO2->DATA[0].WORD = 0;
00078   ARM_GPIO2->IE = 0;
00079   ARM_GPIO2->DIR = 0;
00080 #endif
00081 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/arm_fft_bin_example_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fft_bin_example/arm_fft_bin_example_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        29. November 2010
00005 * $Revision:    V1.0.3
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_fft_bin_example_f32.c
00009 *
00010 * Description:  Example code demonstrating calculation of Max energy bin of
00011 *                               frequency domain of input signal.
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3
00014 *
00015 *
00016 * Version 1.0.3 2010/11/29
00017 *    Re-organized the CMSIS folders and updated documentation.
00018 *
00019 * Version 1.0.1 2010/10/05 KK
00020 *    Production release and review comments incorporated.
00021 *
00022 * Version 1.0.0 2010/09/20 KK
00023 *    Production release and review comments incorporated.
00024 * ------------------------------------------------------------------- */
00025
00077 #include "arm_math.h"
00078
00079 #define TEST_LENGTH_SAMPLES 2048
00080
00081 /* -------------------------------------------------------------------
00082 * External Input and Output buffer Declarations for FFT Bin Example
00083 * ------------------------------------------------------------------- */
00084 extern float32_t testInput_f32_10khz[TEST_LENGTH_SAMPLES];
00085 static float32_t testOutput[TEST_LENGTH_SAMPLES/2];
00086
00087 /* ------------------------------------------------------------------
00088 * Global variables for FFT Bin Example
00089 * ------------------------------------------------------------------- */
00090 uint32_t fftSize = 1024;
00091 uint32_t ifftFlag = 0;
00092 uint32_t doBitReverse = 1;
00093
00094 /* Reference index at which max energy of bin ocuurs */
00095 uint32_t refIndex = 213, testIndex = 0;
00096
00097 /* ----------------------------------------------------------------------
00098 * Max magnitude FFT Bin test
00099 * ------------------------------------------------------------------- */
00100
00101 int32_t main(void)
00102 {
00103
00104         arm_status status;
00105         arm_cfft_radix4_instance_f32 S;
00106         float32_t maxValue;
00107
00108         status = ARM_MATH_SUCCESS;
00109
00110         /* Initialize the CFFT/CIFFT module */
00111         status = arm_cfft_radix4_init_f32(&S, fftSize,
00112                                                                         ifftFlag, doBitReverse);
00113
00114         /* Process the data through the CFFT/CIFFT module */
00115         arm_cfft_radix4_f32(&S, testInput_f32_10khz);
00116
00117
00118         /* Process the data through the Complex Magnitude Module for
00119         calculating the magnitude at each bin */
00120         arm_cmplx_mag_f32(testInput_f32_10khz, testOutput,
00121                                         fftSize);
00122
00123         /* Calculates maxValue and returns corresponding BIN value */
00124         arm_max_f32(testOutput, fftSize, &maxValue, &testIndex);
00125
00126         if(testIndex !=  refIndex)
00127         {
00128                 status = ARM_MATH_TEST_FAILURE;
00129         }
00130
00131         /* ----------------------------------------------------------------------
00132         ** Loop here if the signals fail the PASS check.
00133         ** This denotes a test failure
00134         ** ------------------------------------------------------------------- */
00135
00136         if( status != ARM_MATH_SUCCESS)
00137         {
00138                 while(1);
00139         }
00140
00141     while(1);                             /* main function does not return */
00142 }
00143
Generated on Mon Nov 28 2011 11:14:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_fill_f32.c
00009 *
00010 * Description:  Fills a constant value into a floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00066 void arm_fill_f32(
00067   float32_t value,
00068   float32_t * pDst,
00069   uint32_t blockSize)
00070 {
00071   uint32_t blkCnt;                               /* loop counter */
00072
00073 #ifndef ARM_MATH_CM0
00074
00075   /* Run the below code for Cortex-M4 and Cortex-M3 */
00076
00077   /*loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079
00080   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00081    ** a second loop below computes the remaining 1 to 3 samples. */
00082   while(blkCnt > 0u)
00083   {
00084     /* C = value */
00085     /* Fill the value in the destination buffer */
00086     *pDst++ = value;
00087     *pDst++ = value;
00088     *pDst++ = value;
00089     *pDst++ = value;
00090
00091     /* Decrement the loop counter */
00092     blkCnt--;
00093   }
00094
00095   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00096    ** No loop unrolling is used. */
00097   blkCnt = blockSize % 0x4u;
00098
00099 #else
00100
00101   /* Run the below code for Cortex-M0 */
00102
00103   /* Loop over blockSize number of values */
00104   blkCnt = blockSize;
00105
00106 #endif /* #ifndef ARM_MATH_CM0 */
00107
00108
00109   while(blkCnt > 0u)
00110   {
00111     /* C = value */
00112     /* Fill the value in the destination buffer */
00113     *pDst++ = value;
00114
00115     /* Decrement the loop counter */
00116     blkCnt--;
00117   }
00118 }
00119
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_fill_q7.c
00009 *
00010 * Description:  Fills a constant value into a Q7 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00053 void arm_fill_q7(
00054   q7_t value,
00055   q7_t * pDst,
00056   uint32_t blockSize)
00057 {
00058   uint32_t blkCnt;                               /* loop counter */
00059
00060 #ifndef ARM_MATH_CM0
00061
00062   /* Run the below code for Cortex-M4 and Cortex-M3 */
00063
00064   q31_t packedValue;                             /* value packed to 32 bits */
00065
00066   /*loop Unrolling */
00067   blkCnt = blockSize >> 2u;
00068
00069   /* Packing four 8 bit values to 32 bit value in order to use SIMD */
00070   packedValue = __PACKq7(value, value, value, value);
00071
00072   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00073    ** a second loop below computes the remaining 1 to 3 samples. */
00074   while(blkCnt > 0u)
00075   {
00076     /* C = value */
00077     /* Fill the value in the destination buffer */
00078     *__SIMD32(pDst)++ = packedValue;
00079
00080     /* Decrement the loop counter */
00081     blkCnt--;
00082   }
00083
00084   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00085    ** No loop unrolling is used. */
00086   blkCnt = blockSize % 0x4u;
00087
00088 #else
00089
00090   /* Run the below code for Cortex-M0 */
00091
00092   /* Loop over blockSize number of values */
00093   blkCnt = blockSize;
00094
00095 #endif /* #ifndef ARM_MATH_CM0 */
00096
00097   while(blkCnt > 0u)
00098   {
00099     /* C = value */
00100     /* Fill the value in the destination buffer */
00101     *pDst++ = value;
00102
00103     /* Decrement the loop counter */
00104     blkCnt--;
00105   }
00106 }
00107
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_fill_q15.c
00009 *
00010 * Description:  Fills a constant value into a Q15 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00053 void arm_fill_q15(
00054   q15_t value,
00055   q15_t * pDst,
00056   uint32_t blockSize)
00057 {
00058   uint32_t blkCnt;                               /* loop counter */
00059
00060 #ifndef ARM_MATH_CM0
00061
00062   /* Run the below code for Cortex-M4 and Cortex-M3 */
00063
00064   q31_t packedValue;                             /* value packed to 32 bits */
00065
00066
00067   /*loop Unrolling */
00068   blkCnt = blockSize >> 2u;
00069
00070   /* Packing two 16 bit values to 32 bit value in order to use SIMD */
00071   packedValue = __PKHBT(value, value, 16u);
00072
00073   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00074    ** a second loop below computes the remaining 1 to 3 samples. */
00075   while(blkCnt > 0u)
00076   {
00077     /* C = value */
00078     /* Fill the value in the destination buffer */
00079     *__SIMD32(pDst)++ = packedValue;
00080     *__SIMD32(pDst)++ = packedValue;
00081
00082     /* Decrement the loop counter */
00083     blkCnt--;
00084   }
00085
00086   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00087    ** No loop unrolling is used. */
00088   blkCnt = blockSize % 0x4u;
00089
00090 #else
00091
00092   /* Run the below code for Cortex-M0 */
00093
00094   /* Loop over blockSize number of values */
00095   blkCnt = blockSize;
00096
00097 #endif /* #ifndef ARM_MATH_CM0 */
00098
00099   while(blkCnt > 0u)
00100   {
00101     /* C = value */
00102     /* Fill the value in the destination buffer */
00103     *pDst++ = value;
00104
00105     /* Decrement the loop counter */
00106     blkCnt--;
00107   }
00108 }
00109
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_fill_q31.c
00009 *
00010 * Description:  Fills a constant value into a Q31 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00053 void arm_fill_q31(
00054   q31_t value,
00055   q31_t * pDst,
00056   uint32_t blockSize)
00057 {
00058   uint32_t blkCnt;                               /* loop counter */
00059
00060
00061 #ifndef ARM_MATH_CM0
00062
00063   /* Run the below code for Cortex-M4 and Cortex-M3 */
00064
00065   /*loop Unrolling */
00066   blkCnt = blockSize >> 2u;
00067
00068   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00069    ** a second loop below computes the remaining 1 to 3 samples. */
00070   while(blkCnt > 0u)
00071   {
00072     /* C = value */
00073     /* Fill the value in the destination buffer */
00074     *pDst++ = value;
00075     *pDst++ = value;
00076     *pDst++ = value;
00077     *pDst++ = value;
00078
00079     /* Decrement the loop counter */
00080     blkCnt--;
00081   }
00082
00083   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00084    ** No loop unrolling is used. */
00085   blkCnt = blockSize % 0x4u;
00086
00087 #else
00088
00089   /* Run the below code for Cortex-M0 */
00090
00091   /* Loop over blockSize number of values */
00092   blkCnt = blockSize;
00093
00094 #endif /* #ifndef ARM_MATH_CM0 */
00095
00096   while(blkCnt > 0u)
00097   {
00098     /* C = value */
00099     /* Fill the value in the destination buffer */
00100     *pDst++ = value;
00101
00102     /* Decrement the loop counter */
00103     blkCnt--;
00104   }
00105 }
00106
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_fir_decimate_f32.c
00009 *
00010 * Description:  FIR decimation for floating-point sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00132 void arm_fir_decimate_f32(
00133   const arm_fir_decimate_instance_f32 * S,
00134   float32_t * pSrc,
00135   float32_t * pDst,
00136   uint32_t blockSize)
00137 {
00138   float32_t *pState = S->pState;                 /* State pointer */
00139   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
00140   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
00141   float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
00142   float32_t sum0;                                /* Accumulator */
00143   float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
00144   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00145   uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
00146
00147 #ifndef ARM_MATH_CM0
00148
00149   /* Run the below code for Cortex-M4 and Cortex-M3 */
00150
00151   /* S->pState buffer contains previous frame (numTaps - 1) samples */
00152   /* pStateCurnt points to the location where the new input data should be written */
00153   pStateCurnt = S->pState + (numTaps - 1u);
00154
00155   /* Total number of output samples to be computed */
00156   blkCnt = outBlockSize;
00157
00158   while(blkCnt > 0u)
00159   {
00160     /* Copy decimation factor number of new input samples into the state buffer */
00161     i = S->M;
00162
00163     do
00164     {
00165       *pStateCurnt++ = *pSrc++;
00166
00167     } while(--i);
00168
00169     /* Set accumulator to zero */
00170     sum0 = 0.0f;
00171
00172     /* Initialize state pointer */
00173     px = pState;
00174
00175     /* Initialize coeff pointer */
00176     pb = pCoeffs;
00177
00178     /* Loop unrolling.  Process 4 taps at a time. */
00179     tapCnt = numTaps >> 2;
00180
00181     /* Loop over the number of taps.  Unroll by a factor of 4.
00182      ** Repeat until we've computed numTaps-4 coefficients. */
00183     while(tapCnt > 0u)
00184     {
00185       /* Read the b[numTaps-1] coefficient */
00186       c0 = *(pb++);
00187
00188       /* Read x[n-numTaps-1] sample */
00189       x0 = *(px++);
00190
00191       /* Perform the multiply-accumulate */
00192       sum0 += x0 * c0;
00193
00194       /* Read the b[numTaps-2] coefficient */
00195       c0 = *(pb++);
00196
00197       /* Read x[n-numTaps-2] sample */
00198       x0 = *(px++);
00199
00200       /* Perform the multiply-accumulate */
00201       sum0 += x0 * c0;
00202
00203       /* Read the b[numTaps-3] coefficient */
00204       c0 = *(pb++);
00205
00206       /* Read x[n-numTaps-3] sample */
00207       x0 = *(px++);
00208
00209       /* Perform the multiply-accumulate */
00210       sum0 += x0 * c0;
00211
00212       /* Read the b[numTaps-4] coefficient */
00213       c0 = *(pb++);
00214
00215       /* Read x[n-numTaps-4] sample */
00216       x0 = *(px++);
00217
00218       /* Perform the multiply-accumulate */
00219       sum0 += x0 * c0;
00220
00221       /* Decrement the loop counter */
00222       tapCnt--;
00223     }
00224
00225     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00226     tapCnt = numTaps % 0x4u;
00227
00228     while(tapCnt > 0u)
00229     {
00230       /* Read coefficients */
00231       c0 = *(pb++);
00232
00233       /* Fetch 1 state variable */
00234       x0 = *(px++);
00235
00236       /* Perform the multiply-accumulate */
00237       sum0 += x0 * c0;
00238
00239       /* Decrement the loop counter */
00240       tapCnt--;
00241     }
00242
00243     /* Advance the state pointer by the decimation factor
00244      * to process the next group of decimation factor number samples */
00245     pState = pState + S->M;
00246
00247     /* The result is in the accumulator, store in the destination buffer. */
00248     *pDst++ = sum0;
00249
00250     /* Decrement the loop counter */
00251     blkCnt--;
00252   }
00253
00254   /* Processing is complete.
00255    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00256    ** This prepares the state buffer for the next function call. */
00257
00258   /* Points to the start of the state buffer */
00259   pStateCurnt = S->pState;
00260
00261   i = (numTaps - 1u) >> 2;
00262
00263   /* copy data */
00264   while(i > 0u)
00265   {
00266     *pStateCurnt++ = *pState++;
00267     *pStateCurnt++ = *pState++;
00268     *pStateCurnt++ = *pState++;
00269     *pStateCurnt++ = *pState++;
00270
00271     /* Decrement the loop counter */
00272     i--;
00273   }
00274
00275   i = (numTaps - 1u) % 0x04u;
00276
00277   /* copy data */
00278   while(i > 0u)
00279   {
00280     *pStateCurnt++ = *pState++;
00281
00282     /* Decrement the loop counter */
00283     i--;
00284   }
00285
00286 #else
00287
00288 /* Run the below code for Cortex-M0 */
00289
00290   /* S->pState buffer contains previous frame (numTaps - 1) samples */
00291   /* pStateCurnt points to the location where the new input data should be written */
00292   pStateCurnt = S->pState + (numTaps - 1u);
00293
00294   /* Total number of output samples to be computed */
00295   blkCnt = outBlockSize;
00296
00297   while(blkCnt > 0u)
00298   {
00299     /* Copy decimation factor number of new input samples into the state buffer */
00300     i = S->M;
00301
00302     do
00303     {
00304       *pStateCurnt++ = *pSrc++;
00305
00306     } while(--i);
00307
00308     /* Set accumulator to zero */
00309     sum0 = 0.0f;
00310
00311     /* Initialize state pointer */
00312     px = pState;
00313
00314     /* Initialize coeff pointer */
00315     pb = pCoeffs;
00316
00317     tapCnt = numTaps;
00318
00319     while(tapCnt > 0u)
00320     {
00321       /* Read coefficients */
00322       c0 = *pb++;
00323
00324       /* Fetch 1 state variable */
00325       x0 = *px++;
00326
00327       /* Perform the multiply-accumulate */
00328       sum0 += x0 * c0;
00329
00330       /* Decrement the loop counter */
00331       tapCnt--;
00332     }
00333
00334     /* Advance the state pointer by the decimation factor
00335      * to process the next group of decimation factor number samples */
00336     pState = pState + S->M;
00337
00338     /* The result is in the accumulator, store in the destination buffer. */
00339     *pDst++ = sum0;
00340
00341     /* Decrement the loop counter */
00342     blkCnt--;
00343   }
00344
00345   /* Processing is complete.
00346    ** Now copy the last numTaps - 1 samples to the start of the state buffer.
00347    ** This prepares the state buffer for the next function call. */
00348
00349   /* Points to the start of the state buffer */
00350   pStateCurnt = S->pState;
00351
00352   /* Copy numTaps number of values */
00353   i = (numTaps - 1u);
00354
00355   /* copy data */
00356   while(i > 0u)
00357   {
00358     *pStateCurnt++ = *pState++;
00359
00360     /* Decrement the loop counter */
00361     i--;
00362   }
00363
00364 #endif /*   #ifndef ARM_MATH_CM0        */
00365
00366 }
00367
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_fir_decimate_fast_q15.c
00009 *
00010 * Description:  Fast Q15 FIR Decimator.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00063 void arm_fir_decimate_fast_q15(
00064   const arm_fir_decimate_instance_q15 * S,
00065   q15_t * pSrc,
00066   q15_t * pDst,
00067   uint32_t blockSize)
00068 {
00069   q15_t *pState = S->pState;                     /* State pointer */
00070   q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00071   q15_t *pStateCurnt;                            /* Points to the current sample of the state */
00072   q15_t *px;                                     /* Temporary pointer for state buffer */
00073   q15_t *pb;                                     /* Temporary pointer coefficient buffer */
00074   q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
00075   q31_t sum0;                                    /* Accumulators */
00076   uint32_t numTaps = S->numTaps;                 /* Number of taps */
00077   uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
00078
00079
00080   /* S->pState buffer contains previous frame (numTaps - 1) samples */
00081   /* pStateCurnt points to the location where the new input data should be written */
00082   pStateCurnt = S->pState + (numTaps - 1u);
00083
00084   /* Total number of output samples to be computed */
00085   blkCnt = outBlockSize;
00086
00087   while(blkCnt > 0u)
00088   {
00089     /* Copy decimation factor number of new input samples into the state buffer */
00090     i = S->M;
00091
00092     do
00093     {
00094       *pStateCurnt++ = *pSrc++;
00095
00096     } while(--i);
00097
00098     /*Set sum to zero */
00099     sum0 = 0;
00100
00101     /* Initialize state pointer */
00102     px = pState;
00103
00104     /* Initialize coeff pointer */
00105     pb = pCoeffs;
00106
00107     /* Loop unrolling.  Process 4 taps at a time. */
00108     tapCnt = numTaps >> 2;
00109
00110     /* Loop over the number of taps.  Unroll by a factor of 4.
00111      ** Repeat until we've computed numTaps-4 coefficients. */
00112     while(tapCnt > 0u)
00113     {
00114       /* Read the Read b[numTaps-1] and b[numTaps-2]  coefficients */
00115       c0 = *__SIMD32(pb)++;
00116
00117       /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
00118       x0 = *__SIMD32(px)++;
00119
00120       /* Perform the multiply-accumulate */
00121       sum0 = __SMLAD(x0, c0, sum0);
00122
00123       /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
00124       c0 = *__SIMD32(pb)++;
00125
00126       /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
00127       x0 = *__SIMD32(px)++;
00128
00129       /* Perform the multiply-accumulate */
00130       sum0 = __SMLAD(x0, c0, sum0);
00131
00132       /* Decrement the loop counter */
00133       tapCnt--;
00134     }
00135
00136     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00137     tapCnt = numTaps % 0x4u;
00138
00139     while(tapCnt > 0u)
00140     {
00141       /* Read coefficients */
00142       c0 = *pb++;
00143
00144       /* Fetch 1 state variable */
00145       x0 = *px++;
00146
00147       /* Perform the multiply-accumulate */
00148       sum0 = __SMLAD(x0, c0, sum0);
00149
00150       /* Decrement the loop counter */
00151       tapCnt--;
00152     }
00153
00154     /* Advance the state pointer by the decimation factor
00155      * to process the next group of decimation factor number samples */
00156     pState = pState + S->M;
00157
00158     /* Store filter output , smlad returns the values in 2.14 format */
00159     /* so downsacle by 15 to get output in 1.15 */
00160     *pDst++ = (q15_t) ((sum0 >> 15));
00161
00162     /* Decrement the loop counter */
00163     blkCnt--;
00164   }
00165
00166   /* Processing is complete.
00167    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00168    ** This prepares the state buffer for the next function call. */
00169
00170   /* Points to the start of the state buffer */
00171   pStateCurnt = S->pState;
00172
00173   i = (numTaps - 1u) >> 2u;
00174
00175   /* copy data */
00176   while(i > 0u)
00177   {
00178     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00179     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00180
00181     /* Decrement the loop counter */
00182     i--;
00183   }
00184
00185   i = (numTaps - 1u) % 0x04u;
00186
00187   /* copy data */
00188   while(i > 0u)
00189   {
00190     *pStateCurnt++ = *pState++;
00191
00192     /* Decrement the loop counter */
00193     i--;
00194   }
00195 }
00196
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_fir_decimate_fast_q31.c
00009 *
00010 * Description:  Fast Q31 FIR Decimator.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00065 void arm_fir_decimate_fast_q31(
00066   arm_fir_decimate_instance_q31 * S,
00067   q31_t * pSrc,
00068   q31_t * pDst,
00069   uint32_t blockSize)
00070 {
00071   q31_t *pState = S->pState;                     /* State pointer */
00072   q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00073   q31_t *pStateCurnt;                            /* Points to the current sample of the state */
00074   q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
00075   q31_t *px;                                     /* Temporary pointers for state buffer */
00076   q31_t *pb;                                     /* Temporary pointers for coefficient buffer */
00077   q63_t sum0;                                    /* Accumulator */
00078   uint32_t numTaps = S->numTaps;                 /* Number of taps */
00079   uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
00080
00081
00082   /* S->pState buffer contains previous frame (numTaps - 1) samples */
00083   /* pStateCurnt points to the location where the new input data should be written */
00084   pStateCurnt = S->pState + (numTaps - 1u);
00085
00086   /* Total number of output samples to be computed */
00087   blkCnt = outBlockSize;
00088
00089   while(blkCnt > 0u)
00090   {
00091     /* Copy decimation factor number of new input samples into the state buffer */
00092     i = S->M;
00093
00094     do
00095     {
00096       *pStateCurnt++ = *pSrc++;
00097
00098     } while(--i);
00099
00100     /* Set accumulator to zero */
00101     sum0 = 0;
00102
00103     /* Initialize state pointer */
00104     px = pState;
00105
00106     /* Initialize coeff pointer */
00107     pb = pCoeffs;
00108
00109     /* Loop unrolling.  Process 4 taps at a time. */
00110     tapCnt = numTaps >> 2;
00111
00112     /* Loop over the number of taps.  Unroll by a factor of 4.
00113      ** Repeat until we've computed numTaps-4 coefficients. */
00114     while(tapCnt > 0u)
00115     {
00116       /* Read the b[numTaps-1] coefficient */
00117       c0 = *(pb++);
00118
00119       /* Read x[n-numTaps-1] sample */
00120       x0 = *(px++);
00121
00122       /* Perform the multiply-accumulate */
00123       sum0 = (q31_t) ((((q63_t) x0 * c0) + (sum0 << 32)) >> 32);
00124
00125       /* Read the b[numTaps-2] coefficient */
00126       c0 = *(pb++);
00127
00128       /* Read x[n-numTaps-2] sample */
00129       x0 = *(px++);
00130
00131       /* Perform the multiply-accumulate */
00132       sum0 = (q31_t) ((((q63_t) x0 * c0) + (sum0 << 32)) >> 32);
00133
00134       /* Read the b[numTaps-3] coefficient */
00135       c0 = *(pb++);
00136
00137       /* Read x[n-numTaps-3] sample */
00138       x0 = *(px++);
00139
00140       /* Perform the multiply-accumulate */
00141       sum0 = (q31_t) ((((q63_t) x0 * c0) + (sum0 << 32)) >> 32);
00142
00143       /* Read the b[numTaps-4] coefficient */
00144       c0 = *(pb++);
00145
00146       /* Read x[n-numTaps-4] sample */
00147       x0 = *(px++);
00148
00149       /* Perform the multiply-accumulate */
00150       sum0 = (q31_t) ((((q63_t) x0 * c0) + (sum0 << 32)) >> 32);
00151
00152       /* Decrement the loop counter */
00153       tapCnt--;
00154     }
00155
00156     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00157     tapCnt = numTaps % 0x4u;
00158
00159     while(tapCnt > 0u)
00160     {
00161       /* Read coefficients */
00162       c0 = *(pb++);
00163
00164       /* Fetch 1 state variable */
00165       x0 = *(px++);
00166
00167       /* Perform the multiply-accumulate */
00168       sum0 = (q31_t) ((((q63_t) x0 * c0) + (sum0 << 32)) >> 32);
00169
00170       /* Decrement the loop counter */
00171       tapCnt--;
00172     }
00173
00174     /* Advance the state pointer by the decimation factor
00175      * to process the next group of decimation factor number samples */
00176     pState = pState + S->M;
00177
00178     /* The result is in the accumulator, store in the destination buffer. */
00179     *pDst++ = (q31_t) (sum0 << 1);
00180
00181     /* Decrement the loop counter */
00182     blkCnt--;
00183   }
00184
00185   /* Processing is complete.
00186    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00187    ** This prepares the state buffer for the next function call. */
00188
00189   /* Points to the start of the state buffer */
00190   pStateCurnt = S->pState;
00191
00192   i = (numTaps - 1u) >> 2u;
00193
00194   /* copy data */
00195   while(i > 0u)
00196   {
00197     *pStateCurnt++ = *pState++;
00198     *pStateCurnt++ = *pState++;
00199     *pStateCurnt++ = *pState++;
00200     *pStateCurnt++ = *pState++;
00201
00202     /* Decrement the loop counter */
00203     i--;
00204   }
00205
00206   i = (numTaps - 1u) % 0x04u;
00207
00208   /* copy data */
00209   while(i > 0u)
00210   {
00211     *pStateCurnt++ = *pState++;
00212
00213     /* Decrement the loop counter */
00214     i--;
00215   }
00216 }
00217
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_fir_decimate_init_f32.c
00009 *
00010 * Description:  Floating-point FIR Decimator initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00067 arm_status arm_fir_decimate_init_f32(
00068   arm_fir_decimate_instance_f32 * S,
00069   uint16_t numTaps,
00070   uint8_t M,
00071   float32_t * pCoeffs,
00072   float32_t * pState,
00073   uint32_t blockSize)
00074 {
00075   arm_status status;
00076
00077   /* The size of the input block must be a multiple of the decimation factor */
00078   if((blockSize % M) != 0u)
00079   {
00080     /* Set status as ARM_MATH_LENGTH_ERROR */
00081     status = ARM_MATH_LENGTH_ERROR;
00082   }
00083   else
00084   {
00085     /* Assign filter taps */
00086     S->numTaps = numTaps;
00087
00088     /* Assign coefficient pointer */
00089     S->pCoeffs = pCoeffs;
00090
00091     /* Clear state buffer and size is always (blockSize + numTaps - 1) */
00092     memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
00093
00094     /* Assign state pointer */
00095     S->pState = pState;
00096
00097     /* Assign Decimation Factor */
00098     S->M = M;
00099
00100     status = ARM_MATH_SUCCESS;
00101   }
00102
00103   return (status);
00104
00105 }
00106
Generated on Mon Nov 28 2011 11:14:36 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_fir_decimate_init_q15.c
00009 *
00010 * Description:  Initialization function for the Q15 FIR Decimator.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00068 arm_status arm_fir_decimate_init_q15(
00069   arm_fir_decimate_instance_q15 * S,
00070   uint16_t numTaps,
00071   uint8_t M,
00072   q15_t * pCoeffs,
00073   q15_t * pState,
00074   uint32_t blockSize)
00075 {
00076
00077   arm_status status;
00078
00079   /* The size of the input block must be a multiple of the decimation factor */
00080   if((blockSize % M) != 0u)
00081   {
00082     /* Set status as ARM_MATH_LENGTH_ERROR */
00083     status = ARM_MATH_LENGTH_ERROR;
00084   }
00085   else
00086   {
00087     /* Assign filter taps */
00088     S->numTaps = numTaps;
00089
00090     /* Assign coefficient pointer */
00091     S->pCoeffs = pCoeffs;
00092
00093     /* Clear the state buffer.  The size of buffer is always (blockSize + numTaps - 1) */
00094     memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
00095
00096     /* Assign state pointer */
00097     S->pState = pState;
00098
00099     /* Assign Decimation factor */
00100     S->M = M;
00101
00102     status = ARM_MATH_SUCCESS;
00103   }
00104
00105   return (status);
00106
00107 }
00108
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_fir_decimate_init_q31.c
00009 *
00010 * Description:  Initialization function for Q31 FIR Decimation filter.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00067 arm_status arm_fir_decimate_init_q31(
00068   arm_fir_decimate_instance_q31 * S,
00069   uint16_t numTaps,
00070   uint8_t M,
00071   q31_t * pCoeffs,
00072   q31_t * pState,
00073   uint32_t blockSize)
00074 {
00075   arm_status status;
00076
00077   /* The size of the input block must be a multiple of the decimation factor */
00078   if((blockSize % M) != 0u)
00079   {
00080     /* Set status as ARM_MATH_LENGTH_ERROR */
00081     status = ARM_MATH_LENGTH_ERROR;
00082   }
00083   else
00084   {
00085     /* Assign filter taps */
00086     S->numTaps = numTaps;
00087
00088     /* Assign coefficient pointer */
00089     S->pCoeffs = pCoeffs;
00090
00091     /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
00092     memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(q31_t));
00093
00094     /* Assign state pointer */
00095     S->pState = pState;
00096
00097     /* Assign Decimation factor */
00098     S->M = M;
00099
00100     status = ARM_MATH_SUCCESS;
00101   }
00102
00103   return (status);
00104
00105 }
00106
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_fir_decimate_q15.c
00009 *
00010 * Description:  Q15 FIR Decimator.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00065 void arm_fir_decimate_q15(
00066   const arm_fir_decimate_instance_q15 * S,
00067   q15_t * pSrc,
00068   q15_t * pDst,
00069   uint32_t blockSize)
00070 {
00071   q15_t *pState = S->pState;                     /* State pointer */
00072   q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00073   q15_t *pStateCurnt;                            /* Points to the current sample of the state */
00074   q15_t *px;                                     /* Temporary pointer for state buffer */
00075   q15_t *pb;                                     /* Temporary pointer coefficient buffer */
00076   q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
00077   q63_t sum0;                                    /* Accumulators */
00078   uint32_t numTaps = S->numTaps;                 /* Number of taps */
00079   uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
00080
00081 #ifndef ARM_MATH_CM0
00082
00083   /* Run the below code for Cortex-M4 and Cortex-M3 */
00084
00085   /* S->pState buffer contains previous frame (numTaps - 1) samples */
00086   /* pStateCurnt points to the location where the new input data should be written */
00087   pStateCurnt = S->pState + (numTaps - 1u);
00088
00089   /* Total number of output samples to be computed */
00090   blkCnt = outBlockSize;
00091
00092   while(blkCnt > 0u)
00093   {
00094     /* Copy decimation factor number of new input samples into the state buffer */
00095     i = S->M;
00096
00097     do
00098     {
00099       *pStateCurnt++ = *pSrc++;
00100
00101     } while(--i);
00102
00103     /*Set sum to zero */
00104     sum0 = 0;
00105
00106     /* Initialize state pointer */
00107     px = pState;
00108
00109     /* Initialize coeff pointer */
00110     pb = pCoeffs;
00111
00112     /* Loop unrolling.  Process 4 taps at a time. */
00113     tapCnt = numTaps >> 2;
00114
00115     /* Loop over the number of taps.  Unroll by a factor of 4.
00116      ** Repeat until we've computed numTaps-4 coefficients. */
00117     while(tapCnt > 0u)
00118     {
00119       /* Read the Read b[numTaps-1] and b[numTaps-2]  coefficients */
00120       c0 = *__SIMD32(pb)++;
00121
00122       /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
00123       x0 = *__SIMD32(px)++;
00124
00125       /* Perform the multiply-accumulate */
00126       sum0 = __SMLALD(x0, c0, sum0);
00127
00128       /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
00129       c0 = *__SIMD32(pb)++;
00130
00131       /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
00132       x0 = *__SIMD32(px)++;
00133
00134       /* Perform the multiply-accumulate */
00135       sum0 = __SMLALD(x0, c0, sum0);
00136
00137       /* Decrement the loop counter */
00138       tapCnt--;
00139     }
00140
00141     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00142     tapCnt = numTaps % 0x4u;
00143
00144     while(tapCnt > 0u)
00145     {
00146       /* Read coefficients */
00147       c0 = *pb++;
00148
00149       /* Fetch 1 state variable */
00150       x0 = *px++;
00151
00152       /* Perform the multiply-accumulate */
00153       sum0 = __SMLALD(x0, c0, sum0);
00154
00155       /* Decrement the loop counter */
00156       tapCnt--;
00157     }
00158
00159     /* Advance the state pointer by the decimation factor
00160      * to process the next group of decimation factor number samples */
00161     pState = pState + S->M;
00162
00163     /* Store filter output, smlad returns the values in 2.14 format */
00164     /* so downsacle by 15 to get output in 1.15 */
00165     *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
00166
00167     /* Decrement the loop counter */
00168     blkCnt--;
00169   }
00170
00171   /* Processing is complete.
00172    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00173    ** This prepares the state buffer for the next function call. */
00174
00175   /* Points to the start of the state buffer */
00176   pStateCurnt = S->pState;
00177
00178   i = (numTaps - 1u) >> 2u;
00179
00180   /* copy data */
00181   while(i > 0u)
00182   {
00183     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00184     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00185
00186     /* Decrement the loop counter */
00187     i--;
00188   }
00189
00190   i = (numTaps - 1u) % 0x04u;
00191
00192   /* copy data */
00193   while(i > 0u)
00194   {
00195     *pStateCurnt++ = *pState++;
00196
00197     /* Decrement the loop counter */
00198     i--;
00199   }
00200
00201 #else
00202
00203 /* Run the below code for Cortex-M0 */
00204
00205   /* S->pState buffer contains previous frame (numTaps - 1) samples */
00206   /* pStateCurnt points to the location where the new input data should be written */
00207   pStateCurnt = S->pState + (numTaps - 1u);
00208
00209   /* Total number of output samples to be computed */
00210   blkCnt = outBlockSize;
00211
00212   while(blkCnt > 0u)
00213   {
00214     /* Copy decimation factor number of new input samples into the state buffer */
00215     i = S->M;
00216
00217     do
00218     {
00219       *pStateCurnt++ = *pSrc++;
00220
00221     } while(--i);
00222
00223     /*Set sum to zero */
00224     sum0 = 0;
00225
00226     /* Initialize state pointer */
00227     px = pState;
00228
00229     /* Initialize coeff pointer */
00230     pb = pCoeffs;
00231
00232     tapCnt = numTaps;
00233
00234     while(tapCnt > 0u)
00235     {
00236       /* Read coefficients */
00237       c0 = *pb++;
00238
00239       /* Fetch 1 state variable */
00240       x0 = *px++;
00241
00242       /* Perform the multiply-accumulate */
00243       sum0 += (q31_t) x0 *c0;
00244
00245       /* Decrement the loop counter */
00246       tapCnt--;
00247     }
00248
00249     /* Advance the state pointer by the decimation factor
00250      * to process the next group of decimation factor number samples */
00251     pState = pState + S->M;
00252
00253     /*Store filter output , smlad will return the values in 2.14 format */
00254     /* so downsacle by 15 to get output in 1.15 */
00255     *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
00256
00257     /* Decrement the loop counter */
00258     blkCnt--;
00259   }
00260
00261   /* Processing is complete.
00262    ** Now copy the last numTaps - 1 samples to the start of the state buffer.
00263    ** This prepares the state buffer for the next function call. */
00264
00265   /* Points to the start of the state buffer */
00266   pStateCurnt = S->pState;
00267
00268   i = numTaps - 1u;
00269
00270   /* copy data */
00271   while(i > 0u)
00272   {
00273     *pStateCurnt++ = *pState++;
00274
00275     /* Decrement the loop counter */
00276     i--;
00277   }
00278
00279 #endif /*   #ifndef ARM_MATH_CM0 */
00280
00281 }
00282
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_fir_decimate_q31.c
00009 *
00010 * Description:  Q31 FIR Decimator.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00064 void arm_fir_decimate_q31(
00065   const arm_fir_decimate_instance_q31 * S,
00066   q31_t * pSrc,
00067   q31_t * pDst,
00068   uint32_t blockSize)
00069 {
00070   q31_t *pState = S->pState;                     /* State pointer */
00071   q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00072   q31_t *pStateCurnt;                            /* Points to the current sample of the state */
00073   q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
00074   q31_t *px;                                     /* Temporary pointers for state buffer */
00075   q31_t *pb;                                     /* Temporary pointers for coefficient buffer */
00076   q63_t sum0;                                    /* Accumulator */
00077   uint32_t numTaps = S->numTaps;                 /* Number of taps */
00078   uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
00079
00080
00081 #ifndef ARM_MATH_CM0
00082
00083   /* Run the below code for Cortex-M4 and Cortex-M3 */
00084
00085   /* S->pState buffer contains previous frame (numTaps - 1) samples */
00086   /* pStateCurnt points to the location where the new input data should be written */
00087   pStateCurnt = S->pState + (numTaps - 1u);
00088
00089   /* Total number of output samples to be computed */
00090   blkCnt = outBlockSize;
00091
00092   while(blkCnt > 0u)
00093   {
00094     /* Copy decimation factor number of new input samples into the state buffer */
00095     i = S->M;
00096
00097     do
00098     {
00099       *pStateCurnt++ = *pSrc++;
00100
00101     } while(--i);
00102
00103     /* Set accumulator to zero */
00104     sum0 = 0;
00105
00106     /* Initialize state pointer */
00107     px = pState;
00108
00109     /* Initialize coeff pointer */
00110     pb = pCoeffs;
00111
00112     /* Loop unrolling.  Process 4 taps at a time. */
00113     tapCnt = numTaps >> 2;
00114
00115     /* Loop over the number of taps.  Unroll by a factor of 4.
00116      ** Repeat until we've computed numTaps-4 coefficients. */
00117     while(tapCnt > 0u)
00118     {
00119       /* Read the b[numTaps-1] coefficient */
00120       c0 = *(pb++);
00121
00122       /* Read x[n-numTaps-1] sample */
00123       x0 = *(px++);
00124
00125       /* Perform the multiply-accumulate */
00126       sum0 += (q63_t) x0 *c0;
00127
00128       /* Read the b[numTaps-2] coefficient */
00129       c0 = *(pb++);
00130
00131       /* Read x[n-numTaps-2] sample */
00132       x0 = *(px++);
00133
00134       /* Perform the multiply-accumulate */
00135       sum0 += (q63_t) x0 *c0;
00136
00137       /* Read the b[numTaps-3] coefficient */
00138       c0 = *(pb++);
00139
00140       /* Read x[n-numTaps-3] sample */
00141       x0 = *(px++);
00142
00143       /* Perform the multiply-accumulate */
00144       sum0 += (q63_t) x0 *c0;
00145
00146       /* Read the b[numTaps-4] coefficient */
00147       c0 = *(pb++);
00148
00149       /* Read x[n-numTaps-4] sample */
00150       x0 = *(px++);
00151
00152       /* Perform the multiply-accumulate */
00153       sum0 += (q63_t) x0 *c0;
00154
00155       /* Decrement the loop counter */
00156       tapCnt--;
00157     }
00158
00159     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00160     tapCnt = numTaps % 0x4u;
00161
00162     while(tapCnt > 0u)
00163     {
00164       /* Read coefficients */
00165       c0 = *(pb++);
00166
00167       /* Fetch 1 state variable */
00168       x0 = *(px++);
00169
00170       /* Perform the multiply-accumulate */
00171       sum0 += (q63_t) x0 *c0;
00172
00173       /* Decrement the loop counter */
00174       tapCnt--;
00175     }
00176
00177     /* Advance the state pointer by the decimation factor
00178      * to process the next group of decimation factor number samples */
00179     pState = pState + S->M;
00180
00181     /* The result is in the accumulator, store in the destination buffer. */
00182     *pDst++ = (q31_t) (sum0 >> 31);
00183
00184     /* Decrement the loop counter */
00185     blkCnt--;
00186   }
00187
00188   /* Processing is complete.
00189    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00190    ** This prepares the state buffer for the next function call. */
00191
00192   /* Points to the start of the state buffer */
00193   pStateCurnt = S->pState;
00194
00195   i = (numTaps - 1u) >> 2u;
00196
00197   /* copy data */
00198   while(i > 0u)
00199   {
00200     *pStateCurnt++ = *pState++;
00201     *pStateCurnt++ = *pState++;
00202     *pStateCurnt++ = *pState++;
00203     *pStateCurnt++ = *pState++;
00204
00205     /* Decrement the loop counter */
00206     i--;
00207   }
00208
00209   i = (numTaps - 1u) % 0x04u;
00210
00211   /* copy data */
00212   while(i > 0u)
00213   {
00214     *pStateCurnt++ = *pState++;
00215
00216     /* Decrement the loop counter */
00217     i--;
00218   }
00219
00220 #else
00221
00222 /* Run the below code for Cortex-M0 */
00223
00224   /* S->pState buffer contains previous frame (numTaps - 1) samples */
00225   /* pStateCurnt points to the location where the new input data should be written */
00226   pStateCurnt = S->pState + (numTaps - 1u);
00227
00228   /* Total number of output samples to be computed */
00229   blkCnt = outBlockSize;
00230
00231   while(blkCnt > 0u)
00232   {
00233     /* Copy decimation factor number of new input samples into the state buffer */
00234     i = S->M;
00235
00236     do
00237     {
00238       *pStateCurnt++ = *pSrc++;
00239
00240     } while(--i);
00241
00242     /* Set accumulator to zero */
00243     sum0 = 0;
00244
00245     /* Initialize state pointer */
00246     px = pState;
00247
00248     /* Initialize coeff pointer */
00249     pb = pCoeffs;
00250
00251     tapCnt = numTaps;
00252
00253     while(tapCnt > 0u)
00254     {
00255       /* Read coefficients */
00256       c0 = *pb++;
00257
00258       /* Fetch 1 state variable */
00259       x0 = *px++;
00260
00261       /* Perform the multiply-accumulate */
00262       sum0 += (q63_t) x0 *c0;
00263
00264       /* Decrement the loop counter */
00265       tapCnt--;
00266     }
00267
00268     /* Advance the state pointer by the decimation factor
00269      * to process the next group of decimation factor number samples */
00270     pState = pState + S->M;
00271
00272     /* The result is in the accumulator, store in the destination buffer. */
00273     *pDst++ = (q31_t) (sum0 >> 31);
00274
00275     /* Decrement the loop counter */
00276     blkCnt--;
00277   }
00278
00279   /* Processing is complete.
00280    ** Now copy the last numTaps - 1 samples to the start of the state buffer.
00281    ** This prepares the state buffer for the next function call. */
00282
00283   /* Points to the start of the state buffer */
00284   pStateCurnt = S->pState;
00285
00286   i = numTaps - 1u;
00287
00288   /* copy data */
00289   while(i > 0u)
00290   {
00291     *pStateCurnt++ = *pState++;
00292
00293     /* Decrement the loop counter */
00294     i--;
00295   }
00296
00297 #endif /*   #ifndef ARM_MATH_CM0 */
00298
00299 }
00300
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM0.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM0.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM0.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM3.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM3.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM3.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM4.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/system_ARMCM4.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM4.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
00062     SCB->CPACR |= ((3UL << 10*2) |                 /* set CP10 Full Access */
00063                    (3UL << 11*2)  );               /* set CP11 Full Access */
00064   #endif
00065
00066   SystemCoreClock = __SYSTEM_CLOCK;
00067
00068 #ifdef __USE_GPIO
00069   ARM_GPIO0->DATA[0].WORD = 0;
00070   ARM_GPIO0->IE = 0;
00071   ARM_GPIO0->DIR = 0xff83;
00072
00073   ARM_GPIO1->DATA[0].WORD = 0;
00074   ARM_GPIO1->IE = 0;
00075   ARM_GPIO1->DIR = 0;
00076
00077   ARM_GPIO2->DATA[0].WORD = 0;
00078   ARM_GPIO2->IE = 0;
00079   ARM_GPIO2->DIR = 0;
00080 #endif
00081 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/arm_fir_example_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_fir_example/arm_fir_example_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002  * Copyright (C) 2010 ARM Limited. All rights reserved.
00003  *
00004  * $Date:           29. November 2010
00005  * $Revision:       V1.0.3
00006  *
00007  * Project:         CMSIS DSP Library
00008  * Title:               arm_fir_example_f32.c
00009  *
00010  * Description: Example code demonstrating how an FIR filter can be used
00011  *               as a low pass filter.
00012  *
00013  * Target Processor: Cortex-M4/Cortex-M3
00014  *
00015  *
00016  * Version 1.0.3 2010/11/29
00017  *    Re-organized the CMSIS folders and updated documentation.
00018  *
00019  * Version 1.0.1 2010/10/05 KK
00020  *    Production release and review comments incorporated.
00021  *
00022  * Version 1.0.0 2010/09/20 KK
00023  *    Production release and review comments incorporated.
00024  * ------------------------------------------------------------------- */
00025
00102 /* ----------------------------------------------------------------------
00103 ** Include Files
00104 ** ------------------------------------------------------------------- */
00105
00106 #include "arm_math.h"
00107 #include "math_helper.h"
00108
00109 /* ----------------------------------------------------------------------
00110 ** Macro Defines
00111 ** ------------------------------------------------------------------- */
00112
00113 #define TEST_LENGTH_SAMPLES 320
00114 #define SNR_THRESHOLD_F32       140.0f
00115 #define BLOCK_SIZE                      32
00116 #define NUM_TAPS                        29
00117
00118 /* -------------------------------------------------------------------
00119  * The input signal and reference output (computed with MATLAB)
00120  * are defined externally in arm_fir_lpf_data.c.
00121  * ------------------------------------------------------------------- */
00122
00123 extern float32_t testInput_f32_1kHz_15kHz[TEST_LENGTH_SAMPLES];
00124 extern float32_t refOutput[TEST_LENGTH_SAMPLES];
00125
00126 /* -------------------------------------------------------------------
00127  * Declare Test output buffer
00128  * ------------------------------------------------------------------- */
00129
00130 static float32_t testOutput[TEST_LENGTH_SAMPLES];
00131
00132 /* -------------------------------------------------------------------
00133  * Declare State buffer of size (numTaps + blockSize - 1)
00134  * ------------------------------------------------------------------- */
00135
00136 static float32_t firStateF32[BLOCK_SIZE + NUM_TAPS - 1];
00137
00138 /* ----------------------------------------------------------------------
00139 ** FIR Coefficients buffer generated using fir1() MATLAB function.
00140 ** fir1(28, 6/24)
00141 ** ------------------------------------------------------------------- */
00142
00143 const float32_t firCoeffs32[NUM_TAPS] = {
00144 -0.0018225230f, -0.0015879294f, +0.0000000000f, +0.0036977508f, +0.0080754303f, +0.0085302217f, -0.0000000000f, -0.0173976984f,
00145 -0.0341458607f, -0.0333591565f, +0.0000000000f, +0.0676308395f, +0.1522061835f, +0.2229246956f, +0.2504960933f, +0.2229246956f,
00146 +0.1522061835f, +0.0676308395f, +0.0000000000f, -0.0333591565f, -0.0341458607f, -0.0173976984f, -0.0000000000f, +0.0085302217f,
00147 +0.0080754303f, +0.0036977508f, +0.0000000000f, -0.0015879294f, -0.0018225230f
00148 };
00149
00150 /* ------------------------------------------------------------------
00151  * Global variables for FIR LPF Example
00152  * ------------------------------------------------------------------- */
00153
00154 uint32_t blockSize = BLOCK_SIZE;
00155 uint32_t numBlocks = TEST_LENGTH_SAMPLES/BLOCK_SIZE;
00156
00157 float32_t  snr;
00158
00159 /* ----------------------------------------------------------------------
00160  * FIR LPF Example
00161  * ------------------------------------------------------------------- */
00162
00163 int32_t main(void)
00164 {
00165   uint32_t i;
00166   arm_fir_instance_f32 S;
00167   arm_status status;
00168   float32_t  *inputF32, *outputF32;
00169
00170   /* Initialize input and output buffer pointers */
00171   inputF32 = &testInput_f32_1kHz_15kHz[0];
00172   outputF32 = &testOutput[0];
00173
00174   /* Call FIR init function to initialize the instance structure. */
00175   arm_fir_init_f32(&S, NUM_TAPS, (float32_t *)&firCoeffs32[0], &firStateF32[0], blockSize);
00176
00177   /* ----------------------------------------------------------------------
00178   ** Call the FIR process function for every blockSize samples
00179   ** ------------------------------------------------------------------- */
00180
00181   for(i=0; i < numBlocks; i++)
00182     {
00183       arm_fir_f32(&S, inputF32 + (i * blockSize), outputF32 + (i * blockSize), blockSize);
00184     }
00185
00186   /* ----------------------------------------------------------------------
00187   ** Compare the generated output against the reference output computed
00188   ** in MATLAB.
00189   ** ------------------------------------------------------------------- */
00190
00191   snr = arm_snr_f32(&refOutput[0], &testOutput[0], TEST_LENGTH_SAMPLES);
00192
00193   if (snr < SNR_THRESHOLD_F32)
00194     {
00195       status = ARM_MATH_TEST_FAILURE;
00196     }
00197   else
00198     {
00199       status = ARM_MATH_SUCCESS;
00200     }
00201
00202   /* ----------------------------------------------------------------------
00203   ** Loop here if the signal does not match the reference output.
00204   ** ------------------------------------------------------------------- */
00205
00206   if( status != ARM_MATH_SUCCESS)
00207     {
00208       while(1);
00209     }
00210
00211     while(1);                             /* main function does not return */
00212 }
00213
00214
00215
00216
Generated on Mon Nov 28 2011 11:14:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_fir_f32.c
00009 *
00010 * Description:  Floating-point FIR filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *        incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00128 void arm_fir_f32(
00129   const arm_fir_instance_f32 * S,
00130   float32_t * pSrc,
00131   float32_t * pDst,
00132   uint32_t blockSize)
00133 {
00134
00135   float32_t *pState = S->pState;                 /* State pointer */
00136   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
00137   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
00138   float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
00139   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00140   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
00141
00142
00143 #ifndef ARM_MATH_CM0
00144
00145   /* Run the below code for Cortex-M4 and Cortex-M3 */
00146
00147   float32_t acc0, acc1, acc2, acc3;              /* Accumulators */
00148   float32_t x0, x1, x2, x3, c0;                  /* Temporary variables to hold state and coefficient values */
00149
00150
00151   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
00152   /* pStateCurnt points to the location where the new input data should be written */
00153   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00154
00155   /* Apply loop unrolling and compute 4 output values simultaneously.
00156    * The variables acc0 ... acc3 hold output values that are being computed:
00157    *
00158    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
00159    *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
00160    *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
00161    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
00162    */
00163   blkCnt = blockSize >> 2;
00164
00165   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00166    ** a second loop below computes the remaining 1 to 3 samples. */
00167   while(blkCnt > 0u)
00168   {
00169     /* Copy four new input samples into the state buffer */
00170     *pStateCurnt++ = *pSrc++;
00171     *pStateCurnt++ = *pSrc++;
00172     *pStateCurnt++ = *pSrc++;
00173     *pStateCurnt++ = *pSrc++;
00174
00175     /* Set all accumulators to zero */
00176     acc0 = 0.0f;
00177     acc1 = 0.0f;
00178     acc2 = 0.0f;
00179     acc3 = 0.0f;
00180
00181     /* Initialize state pointer */
00182     px = pState;
00183
00184     /* Initialize coeff pointer */
00185     pb = (pCoeffs);
00186
00187     /* Read the first three samples from the state buffer:  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
00188     x0 = *px++;
00189     x1 = *px++;
00190     x2 = *px++;
00191
00192     /* Loop unrolling.  Process 4 taps at a time. */
00193     tapCnt = numTaps >> 2u;
00194
00195     /* Loop over the number of taps.  Unroll by a factor of 4.
00196      ** Repeat until we've computed numTaps-4 coefficients. */
00197     while(tapCnt > 0u)
00198     {
00199       /* Read the b[numTaps-1] coefficient */
00200       c0 = *(pb++);
00201
00202       /* Read x[n-numTaps-3] sample */
00203       x3 = *(px++);
00204
00205       /* acc0 +=  b[numTaps-1] * x[n-numTaps] */
00206       acc0 += x0 * c0;
00207
00208       /* acc1 +=  b[numTaps-1] * x[n-numTaps-1] */
00209       acc1 += x1 * c0;
00210
00211       /* acc2 +=  b[numTaps-1] * x[n-numTaps-2] */
00212       acc2 += x2 * c0;
00213
00214       /* acc3 +=  b[numTaps-1] * x[n-numTaps-3] */
00215       acc3 += x3 * c0;
00216
00217       /* Read the b[numTaps-2] coefficient */
00218       c0 = *(pb++);
00219
00220       /* Read x[n-numTaps-4] sample */
00221       x0 = *(px++);
00222
00223       /* Perform the multiply-accumulate */
00224       acc0 += x1 * c0;
00225       acc1 += x2 * c0;
00226       acc2 += x3 * c0;
00227       acc3 += x0 * c0;
00228
00229       /* Read the b[numTaps-3] coefficient */
00230       c0 = *(pb++);
00231
00232       /* Read x[n-numTaps-5] sample */
00233       x1 = *(px++);
00234
00235       /* Perform the multiply-accumulates */
00236       acc0 += x2 * c0;
00237       acc1 += x3 * c0;
00238       acc2 += x0 * c0;
00239       acc3 += x1 * c0;
00240
00241       /* Read the b[numTaps-4] coefficient */
00242       c0 = *(pb++);
00243
00244       /* Read x[n-numTaps-6] sample */
00245       x2 = *(px++);
00246
00247       /* Perform the multiply-accumulates */
00248       acc0 += x3 * c0;
00249       acc1 += x0 * c0;
00250       acc2 += x1 * c0;
00251       acc3 += x2 * c0;
00252
00253       tapCnt--;
00254     }
00255
00256     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00257     tapCnt = numTaps % 0x4u;
00258
00259     while(tapCnt > 0u)
00260     {
00261       /* Read coefficients */
00262       c0 = *(pb++);
00263
00264       /* Fetch 1 state variable */
00265       x3 = *(px++);
00266
00267       /* Perform the multiply-accumulates */
00268       acc0 += x0 * c0;
00269       acc1 += x1 * c0;
00270       acc2 += x2 * c0;
00271       acc3 += x3 * c0;
00272
00273       /* Reuse the present sample states for next sample */
00274       x0 = x1;
00275       x1 = x2;
00276       x2 = x3;
00277
00278       /* Decrement the loop counter */
00279       tapCnt--;
00280     }
00281
00282     /* Advance the state pointer by 4 to process the next group of 4 samples */
00283     pState = pState + 4;
00284
00285     /* The results in the 4 accumulators, store in the destination buffer. */
00286     *pDst++ = acc0;
00287     *pDst++ = acc1;
00288     *pDst++ = acc2;
00289     *pDst++ = acc3;
00290
00291     blkCnt--;
00292   }
00293
00294   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00295    ** No loop unrolling is used. */
00296   blkCnt = blockSize % 0x4u;
00297
00298   while(blkCnt > 0u)
00299   {
00300     /* Copy one sample at a time into state buffer */
00301     *pStateCurnt++ = *pSrc++;
00302
00303     /* Set the accumulator to zero */
00304     acc0 = 0.0f;
00305
00306     /* Initialize state pointer */
00307     px = pState;
00308
00309     /* Initialize Coefficient pointer */
00310     pb = (pCoeffs);
00311
00312     i = numTaps;
00313
00314     /* Perform the multiply-accumulates */
00315     do
00316     {
00317       acc0 += *px++ * *pb++;
00318       i--;
00319
00320     } while(i > 0u);
00321
00322     /* The result is store in the destination buffer. */
00323     *pDst++ = acc0;
00324
00325     /* Advance state pointer by 1 for the next sample */
00326     pState = pState + 1;
00327
00328     blkCnt--;
00329   }
00330
00331   /* Processing is complete.
00332    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00333    ** This prepares the state buffer for the next function call. */
00334
00335   /* Points to the start of the state buffer */
00336   pStateCurnt = S->pState;
00337
00338   tapCnt = (numTaps - 1u) >> 2u;
00339
00340   /* copy data */
00341   while(tapCnt > 0u)
00342   {
00343     *pStateCurnt++ = *pState++;
00344     *pStateCurnt++ = *pState++;
00345     *pStateCurnt++ = *pState++;
00346     *pStateCurnt++ = *pState++;
00347
00348     /* Decrement the loop counter */
00349     tapCnt--;
00350   }
00351
00352   /* Calculate remaining number of copies */
00353   tapCnt = (numTaps - 1u) % 0x4u;
00354
00355   /* Copy the remaining q31_t data */
00356   while(tapCnt > 0u)
00357   {
00358     *pStateCurnt++ = *pState++;
00359
00360     /* Decrement the loop counter */
00361     tapCnt--;
00362   }
00363
00364 #else
00365
00366   /* Run the below code for Cortex-M0 */
00367
00368   float32_t acc;
00369
00370   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
00371   /* pStateCurnt points to the location where the new input data should be written */
00372   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00373
00374   /* Initialize blkCnt with blockSize */
00375   blkCnt = blockSize;
00376
00377   while(blkCnt > 0u)
00378   {
00379     /* Copy one sample at a time into state buffer */
00380     *pStateCurnt++ = *pSrc++;
00381
00382     /* Set the accumulator to zero */
00383     acc = 0.0f;
00384
00385     /* Initialize state pointer */
00386     px = pState;
00387
00388     /* Initialize Coefficient pointer */
00389     pb = pCoeffs;
00390
00391     i = numTaps;
00392
00393     /* Perform the multiply-accumulates */
00394     do
00395     {
00396       /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
00397       acc += *px++ * *pb++;
00398       i--;
00399
00400     } while(i > 0u);
00401
00402     /* The result is store in the destination buffer. */
00403     *pDst++ = acc;
00404
00405     /* Advance state pointer by 1 for the next sample */
00406     pState = pState + 1;
00407
00408     blkCnt--;
00409   }
00410
00411   /* Processing is complete.
00412    ** Now copy the last numTaps - 1 samples to the starting of the state buffer.
00413    ** This prepares the state buffer for the next function call. */
00414
00415   /* Points to the start of the state buffer */
00416   pStateCurnt = S->pState;
00417
00418   /* Copy numTaps number of values */
00419   tapCnt = numTaps - 1u;
00420
00421   /* Copy data */
00422   while(tapCnt > 0u)
00423   {
00424     *pStateCurnt++ = *pState++;
00425
00426     /* Decrement the loop counter */
00427     tapCnt--;
00428   }
00429
00430 #endif /*   #ifndef ARM_MATH_CM0 */
00431
00432 }
00433
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_fir_fast_q15.c
00009 *
00010 * Description:  Q15 Fast FIR filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.9  2010/08/16
00030 *    Initial version
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00065 void arm_fir_fast_q15(
00066   const arm_fir_instance_q15 * S,
00067   q15_t * pSrc,
00068   q15_t * pDst,
00069   uint32_t blockSize)
00070 {
00071   q15_t *pState = S->pState;                     /* State pointer */
00072   q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00073   q15_t *pStateCurnt;                            /* Points to the current sample of the state */
00074   q15_t *px1;                                    /* Temporary q15 pointer for state buffer */
00075   q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
00076   q31_t *px2;                                    /* Temporary q31 pointer for SIMD state buffer accesses */
00077   q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold SIMD state and coefficient values */
00078   q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
00079   uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
00080   uint32_t tapCnt, blkCnt;                       /* Loop counters */
00081
00082   /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
00083   /* pStateCurnt points to the location where the new input data should be written */
00084   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00085
00086   /* Apply loop unrolling and compute 4 output values simultaneously.
00087    * The variables acc0 ... acc3 hold output values that are being computed:
00088    *
00089    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
00090    *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
00091    *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
00092    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
00093    */
00094   blkCnt = blockSize >> 2;
00095
00096   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00097    ** a second loop below computes the remaining 1 to 3 samples. */
00098   while(blkCnt > 0u)
00099   {
00100     /* Copy four new input samples into the state buffer.
00101      ** Use 32-bit SIMD to move the 16-bit data.  Only requires two copies. */
00102     *__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++;
00103     *__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++;
00104
00105     /* Set all accumulators to zero */
00106     acc0 = 0;
00107     acc1 = 0;
00108     acc2 = 0;
00109     acc3 = 0;
00110
00111     /* Initialize state pointer of type q15 */
00112     px1 = pState;
00113
00114     /* Initialize coeff pointer of type q31 */
00115     pb = (q31_t *) (pCoeffs);
00116
00117     /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
00118     x0 = *(q31_t *) (px1++);
00119
00120     /* Read the third and forth samples from the state buffer: x[n-N-1], x[n-N-2] */
00121     x1 = *(q31_t *) (px1++);
00122
00123     /* Loop over the number of taps.  Unroll by a factor of 4.
00124      ** Repeat until we've computed numTaps-4 coefficients. */
00125     tapCnt = numTaps >> 2;
00126     do
00127     {
00128       /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
00129       c0 = *(pb++);
00130
00131       /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
00132       acc0 = __SMLAD(x0, c0, acc0);
00133
00134       /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
00135       acc1 = __SMLAD(x1, c0, acc1);
00136
00137       /* Read state x[n-N-2], x[n-N-3] */
00138       x2 = *(q31_t *) (px1++);
00139
00140       /* Read state x[n-N-3], x[n-N-4] */
00141       x3 = *(q31_t *) (px1++);
00142
00143       /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
00144       acc2 = __SMLAD(x2, c0, acc2);
00145
00146       /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
00147       acc3 = __SMLAD(x3, c0, acc3);
00148
00149       /* Read coefficients b[N-2], b[N-3] */
00150       c0 = *(pb++);
00151
00152       /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
00153       acc0 = __SMLAD(x2, c0, acc0);
00154
00155       /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
00156       acc1 = __SMLAD(x3, c0, acc1);
00157
00158       /* Read state x[n-N-4], x[n-N-5] */
00159       x0 = *(q31_t *) (px1++);
00160
00161       /* Read state x[n-N-5], x[n-N-6] */
00162       x1 = *(q31_t *) (px1++);
00163
00164       /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
00165       acc2 = __SMLAD(x0, c0, acc2);
00166
00167       /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
00168       acc3 = __SMLAD(x1, c0, acc3);
00169       tapCnt--;
00170
00171     }
00172     while(tapCnt > 0u);
00173
00174     /* If the filter length is not a multiple of 4, compute the remaining filter taps.
00175      ** This is always 2 taps since the filter length is always even. */
00176     if((numTaps & 0x3u) != 0u)
00177     {
00178       /* Read 2 coefficients */
00179       c0 = *(pb++);
00180       /* Fetch 4 state variables */
00181       x2 = *(q31_t *) (px1++);
00182       x3 = *(q31_t *) (px1++);
00183
00184       /* Perform the multiply-accumulates */
00185       acc0 = __SMLAD(x0, c0, acc0);
00186       acc1 = __SMLAD(x1, c0, acc1);
00187       acc2 = __SMLAD(x2, c0, acc2);
00188       acc3 = __SMLAD(x3, c0, acc3);
00189     }
00190
00191     /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.15 with saturation.
00192      ** Then store the 4 outputs in the destination buffer. */
00193
00194 #ifndef ARM_MATH_BIG_ENDIAN
00195
00196     *__SIMD32(pDst)++ = __PKHBT((acc0 >> 15), (acc1 >> 15), 16u);
00197     *__SIMD32(pDst)++ = __PKHBT((acc2 >> 15), (acc3 >> 15), 16u);
00198
00199 #else
00200
00201     *__SIMD32(pDst)++ = __PKHBT((acc1 >> 15), (acc0 >> 15), 16u);
00202     *__SIMD32(pDst)++ = __PKHBT((acc3 >> 15), (acc2 >> 15), 16u);
00203
00204 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00205
00206     /* Advance the state pointer by 4 to process the next group of 4 samples */
00207     pState = pState + 4;
00208
00209     /* Decrement the loop counter */
00210     blkCnt--;
00211   }
00212
00213   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00214    ** No loop unrolling is used. */
00215   blkCnt = blockSize % 0x4u;
00216   while(blkCnt > 0u)
00217   {
00218     /* Copy two samples into state buffer */
00219     *pStateCurnt++ = *pSrc++;
00220
00221     /* Set the accumulator to zero */
00222     acc0 = 0;
00223
00224     /* Use SIMD to hold states and coefficients */
00225     px2 = (q31_t *) pState;
00226     pb = (q31_t *) (pCoeffs);
00227     tapCnt = numTaps >> 1;
00228
00229     do
00230     {
00231       acc0 = __SMLAD(*px2++, *(pb++), acc0);
00232       tapCnt--;
00233     }
00234     while(tapCnt > 0u);
00235
00236     /* The result is in 2.30 format.  Convert to 1.15 with saturation.
00237      ** Then store the output in the destination buffer. */
00238     *pDst++ = (q15_t) ((acc0 >> 15));
00239
00240     /* Advance state pointer by 1 for the next sample */
00241     pState = pState + 1;
00242
00243     /* Decrement the loop counter */
00244     blkCnt--;
00245   }
00246
00247   /* Processing is complete.
00248    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00249    ** This prepares the state buffer for the next function call. */
00250
00251   /* Points to the start of the state buffer */
00252   pStateCurnt = S->pState;
00253   /* Calculation of count for copying integer writes */
00254   tapCnt = (numTaps - 1u) >> 2;
00255
00256   while(tapCnt > 0u)
00257   {
00258     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00259     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00260
00261     tapCnt--;
00262   }
00263
00264   /* Calculation of count for remaining q15_t data */
00265   tapCnt = (numTaps - 1u) % 0x4u;
00266
00267   /* copy remaining data */
00268   while(tapCnt > 0u)
00269   {
00270     *pStateCurnt++ = *pState++;
00271
00272     /* Decrement the loop counter */
00273     tapCnt--;
00274   }
00275 }
00276
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_fir_fast_q31.c
00009 *
00010 * Description:  Processing function for the Q31 Fast FIR filter.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.9  2010/08/27
00030 *    Initial version
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00066 void arm_fir_fast_q31(
00067   const arm_fir_instance_q31 * S,
00068   q31_t * pSrc,
00069   q31_t * pDst,
00070   uint32_t blockSize)
00071 {
00072   q31_t *pState = S->pState;                     /* State pointer */
00073   q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00074   q31_t *pStateCurnt;                            /* Points to the current sample of the state */
00075   q31_t x0, x1, x2, x3;                          /* Temporary variables to hold state */
00076   q31_t c0;                                      /* Temporary variable to hold coefficient value */
00077   q31_t *px;                                     /* Temporary pointer for state */
00078   q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
00079   q63_t acc0, acc1, acc2, acc3;                  /* Accumulators */
00080   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00081   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
00082
00083   /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
00084   /* pStateCurnt points to the location where the new input data should be written */
00085   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00086
00087   /* Apply loop unrolling and compute 4 output values simultaneously.
00088    * The variables acc0 ... acc3 hold output values that are being computed:
00089    *
00090    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
00091    *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
00092    *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
00093    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
00094    */
00095   blkCnt = blockSize >> 2;
00096
00097   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00098    ** a second loop below computes the remaining 1 to 3 samples. */
00099   while(blkCnt > 0u)
00100   {
00101     /* Copy four new input samples into the state buffer */
00102     *pStateCurnt++ = *pSrc++;
00103     *pStateCurnt++ = *pSrc++;
00104     *pStateCurnt++ = *pSrc++;
00105     *pStateCurnt++ = *pSrc++;
00106
00107     /* Set all accumulators to zero */
00108     acc0 = 0;
00109     acc1 = 0;
00110     acc2 = 0;
00111     acc3 = 0;
00112
00113     /* Initialize state pointer */
00114     px = pState;
00115
00116     /* Initialize coefficient pointer */
00117     pb = pCoeffs;
00118
00119     /* Read the first three samples from the state buffer:
00120      *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
00121     x0 = *(px++);
00122     x1 = *(px++);
00123     x2 = *(px++);
00124
00125     /* Loop unrolling.  Process 4 taps at a time. */
00126     tapCnt = numTaps >> 2;
00127     i = tapCnt;
00128
00129     while(i > 0u)
00130     {
00131       /* Read the b[numTaps] coefficient */
00132       c0 = *(pb++);
00133
00134       /* Read x[n-numTaps-3] sample */
00135       x3 = *(px++);
00136
00137       /* acc0 +=  b[numTaps] * x[n-numTaps] */
00138       acc0 = (q31_t) ((((q63_t) x0 * c0) + (acc0 << 32)) >> 32);
00139
00140       /* acc1 +=  b[numTaps] * x[n-numTaps-1] */
00141       acc1 = (q31_t) ((((q63_t) x1 * c0) + (acc1 << 32)) >> 32);
00142
00143       /* acc2 +=  b[numTaps] * x[n-numTaps-2] */
00144       acc2 = (q31_t) ((((q63_t) x2 * c0) + (acc2 << 32)) >> 32);
00145
00146       /* acc3 +=  b[numTaps] * x[n-numTaps-3] */
00147       acc3 = (q31_t) ((((q63_t) x3 * c0) + (acc3 << 32)) >> 32);
00148
00149       /* Read the b[numTaps-1] coefficient */
00150       c0 = *(pb++);
00151
00152       /* Read x[n-numTaps-4] sample */
00153       x0 = *(px++);
00154
00155       /* Perform the multiply-accumulates */
00156       acc0 = (q31_t) ((((q63_t) x1 * c0) + (acc0 << 32)) >> 32);
00157       acc1 = (q31_t) ((((q63_t) x2 * c0) + (acc1 << 32)) >> 32);
00158       acc2 = (q31_t) ((((q63_t) x3 * c0) + (acc2 << 32)) >> 32);
00159       acc3 = (q31_t) ((((q63_t) x0 * c0) + (acc3 << 32)) >> 32);
00160
00161       /* Read the b[numTaps-2] coefficient */
00162       c0 = *(pb++);
00163
00164       /* Read x[n-numTaps-5] sample */
00165       x1 = *(px++);
00166
00167       /* Perform the multiply-accumulates */
00168       acc0 = (q31_t) ((((q63_t) x2 * c0) + (acc0 << 32)) >> 32);
00169       acc1 = (q31_t) ((((q63_t) x3 * c0) + (acc1 << 32)) >> 32);
00170       acc2 = (q31_t) ((((q63_t) x0 * c0) + (acc2 << 32)) >> 32);
00171       acc3 = (q31_t) ((((q63_t) x1 * c0) + (acc3 << 32)) >> 32);
00172
00173       /* Read the b[numTaps-3] coefficients */
00174       c0 = *(pb++);
00175
00176       /* Read x[n-numTaps-6] sample */
00177       x2 = *(px++);
00178
00179       /* Perform the multiply-accumulates */
00180       acc0 = (q31_t) ((((q63_t) x3 * c0) + (acc0 << 32)) >> 32);
00181       acc1 = (q31_t) ((((q63_t) x0 * c0) + (acc1 << 32)) >> 32);
00182       acc2 = (q31_t) ((((q63_t) x1 * c0) + (acc2 << 32)) >> 32);
00183       acc3 = (q31_t) ((((q63_t) x2 * c0) + (acc3 << 32)) >> 32);
00184       i--;
00185     }
00186
00187     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00188
00189     i = numTaps - (tapCnt * 4u);
00190     while(i > 0u)
00191     {
00192       /* Read coefficients */
00193       c0 = *(pb++);
00194
00195       /* Fetch 1 state variable */
00196       x3 = *(px++);
00197
00198       /* Perform the multiply-accumulates */
00199       acc0 = (q31_t) ((((q63_t) x0 * c0) + (acc0 << 32)) >> 32);
00200       acc1 = (q31_t) ((((q63_t) x1 * c0) + (acc1 << 32)) >> 32);
00201       acc2 = (q31_t) ((((q63_t) x2 * c0) + (acc2 << 32)) >> 32);
00202       acc3 = (q31_t) ((((q63_t) x3 * c0) + (acc3 << 32)) >> 32);
00203
00204       /* Reuse the present sample states for next sample */
00205       x0 = x1;
00206       x1 = x2;
00207       x2 = x3;
00208
00209       /* Decrement the loop counter */
00210       i--;
00211     }
00212
00213     /* Advance the state pointer by 4 to process the next group of 4 samples */
00214     pState = pState + 4;
00215
00216     /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.31
00217      ** Then store the 4 outputs in the destination buffer. */
00218     *pDst++ = (q31_t) (acc0 << 1);
00219     *pDst++ = (q31_t) (acc1 << 1);
00220     *pDst++ = (q31_t) (acc2 << 1);
00221     *pDst++ = (q31_t) (acc3 << 1);
00222
00223     /* Decrement the samples loop counter */
00224     blkCnt--;
00225   }
00226
00227
00228   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00229    ** No loop unrolling is used. */
00230   blkCnt = blockSize % 4u;
00231
00232   while(blkCnt > 0u)
00233   {
00234     /* Copy one sample at a time into state buffer */
00235     *pStateCurnt++ = *pSrc++;
00236
00237     /* Set the accumulator to zero */
00238     acc0 = 0;
00239
00240     /* Initialize state pointer */
00241     px = pState;
00242
00243     /* Initialize Coefficient pointer */
00244     pb = (pCoeffs);
00245
00246     i = numTaps;
00247
00248     /* Perform the multiply-accumulates */
00249     do
00250     {
00251       acc0 = (q31_t) ((((q63_t) * (px++) * (*(pb++))) + (acc0 << 32)) >> 32);
00252       i--;
00253     } while(i > 0u);
00254
00255     /* The result is in 2.30 format.  Convert to 1.31
00256      ** Then store the output in the destination buffer. */
00257     *pDst++ = (q31_t) (acc0 << 1);
00258
00259     /* Advance state pointer by 1 for the next sample */
00260     pState = pState + 1;
00261
00262     /* Decrement the samples loop counter */
00263     blkCnt--;
00264   }
00265
00266   /* Processing is complete.
00267    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00268    ** This prepares the state buffer for the next function call. */
00269
00270   /* Points to the start of the state buffer */
00271   pStateCurnt = S->pState;
00272
00273   tapCnt = (numTaps - 1u) >> 2u;
00274
00275   /* copy data */
00276   while(tapCnt > 0u)
00277   {
00278     *pStateCurnt++ = *pState++;
00279     *pStateCurnt++ = *pState++;
00280     *pStateCurnt++ = *pState++;
00281     *pStateCurnt++ = *pState++;
00282
00283     /* Decrement the loop counter */
00284     tapCnt--;
00285   }
00286
00287   /* Calculate remaining number of copies */
00288   tapCnt = (numTaps - 1u) % 0x4u;
00289
00290   /* Copy the remaining q31_t data */
00291   while(tapCnt > 0u)
00292   {
00293     *pStateCurnt++ = *pState++;
00294
00295     /* Decrement the loop counter */
00296     tapCnt--;
00297   }
00298
00299 }
00300
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_fir_init_f32.c
00009 *
00010 * Description:  Floating-point FIR filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *        incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * ---------------------------------------------------------------------------*/
00035
00036 #include "arm_math.h"
00037
00068 void arm_fir_init_f32(
00069   arm_fir_instance_f32 * S,
00070   uint16_t numTaps,
00071   float32_t * pCoeffs,
00072   float32_t * pState,
00073   uint32_t blockSize)
00074 {
00075   /* Assign filter taps */
00076   S->numTaps = numTaps;
00077
00078   /* Assign coefficient pointer */
00079   S->pCoeffs = pCoeffs;
00080
00081   /* Clear state buffer and the size of state buffer is (blockSize + numTaps - 1) */
00082   memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
00083
00084   /* Assign state pointer */
00085   S->pState = pState;
00086
00087 }
00088
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_fir_init_q7.c
00009 *
00010 * Description:  Q7 FIR filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *        incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * ------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00065 void arm_fir_init_q7(
00066   arm_fir_instance_q7 * S,
00067   uint16_t numTaps,
00068   q7_t * pCoeffs,
00069   q7_t * pState,
00070   uint32_t blockSize)
00071 {
00072
00073   /* Assign filter taps */
00074   S->numTaps = numTaps;
00075
00076   /* Assign coefficient pointer */
00077   S->pCoeffs = pCoeffs;
00078
00079   /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
00080   memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q7_t));
00081
00082   /* Assign state pointer */
00083   S->pState = pState;
00084
00085 }
00086
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_fir_init_q15.c
00009 *
00010 * Description:  Q15 FIR filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *        incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * ------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00085 arm_status arm_fir_init_q15(
00086   arm_fir_instance_q15 * S,
00087   uint16_t numTaps,
00088   q15_t * pCoeffs,
00089   q15_t * pState,
00090   uint32_t blockSize)
00091 {
00092   arm_status status;
00093
00094
00095 #ifndef ARM_MATH_CM0
00096
00097   /* Run the below code for Cortex-M4 and Cortex-M3 */
00098
00099   /* The Number of filter coefficients in the filter must be even and at least 4 */
00100   if((numTaps < 4u) || (numTaps & 0x1u))
00101   {
00102     status = ARM_MATH_ARGUMENT_ERROR;
00103   }
00104   else
00105   {
00106     /* Assign filter taps */
00107     S->numTaps = numTaps;
00108
00109     /* Assign coefficient pointer */
00110     S->pCoeffs = pCoeffs;
00111
00112     /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
00113     memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
00114
00115     /* Assign state pointer */
00116     S->pState = pState;
00117
00118     status = ARM_MATH_SUCCESS;
00119   }
00120
00121   return (status);
00122
00123 #else
00124
00125   /* Run the below code for Cortex-M0 */
00126
00127   /* Assign filter taps */
00128   S->numTaps = numTaps;
00129
00130   /* Assign coefficient pointer */
00131   S->pCoeffs = pCoeffs;
00132
00133   /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
00134   memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
00135
00136   /* Assign state pointer */
00137   S->pState = pState;
00138
00139   status = ARM_MATH_SUCCESS;
00140
00141   return (status);
00142
00143 #endif /*  #ifndef ARM_MATH_CM0 */
00144
00145 }
00146
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_fir_init_q31.c
00009 *
00010 * Description:  Q31 FIR filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *        incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00068 void arm_fir_init_q31(
00069   arm_fir_instance_q31 * S,
00070   uint16_t numTaps,
00071   q31_t * pCoeffs,
00072   q31_t * pState,
00073   uint32_t blockSize)
00074 {
00075   /* Assign filter taps */
00076   S->numTaps = numTaps;
00077
00078   /* Assign coefficient pointer */
00079   S->pCoeffs = pCoeffs;
00080
00081   /* Clear state buffer and state array size is (blockSize + numTaps - 1) */
00082   memset(pState, 0, (blockSize + ((uint32_t) numTaps - 1u)) * sizeof(q31_t));
00083
00084   /* Assign state pointer */
00085   S->pState = pState;
00086
00087 }
00088
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_fir_interpolate_f32.c
00009 *
00010 * Description:  FIR interpolation for floating-point sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00135 void arm_fir_interpolate_f32(
00136   const arm_fir_interpolate_instance_f32 * S,
00137   float32_t * pSrc,
00138   float32_t * pDst,
00139   uint32_t blockSize)
00140 {
00141   float32_t *pState = S->pState;                 /* State pointer */
00142   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
00143   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
00144   float32_t *ptr1, *ptr2;                        /* Temporary pointers for state and coefficient buffers */
00145
00146
00147 #ifndef ARM_MATH_CM0
00148
00149   /* Run the below code for Cortex-M4 and Cortex-M3 */
00150
00151   float32_t sum0;                                /* Accumulators */
00152   float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
00153   uint32_t i, blkCnt, j;                         /* Loop counters */
00154   uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
00155
00156
00157   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
00158   /* pStateCurnt points to the location where the new input data should be written */
00159   pStateCurnt = S->pState + (phaseLen - 1u);
00160
00161   /* Total number of intput samples */
00162   blkCnt = blockSize;
00163
00164   /* Loop over the blockSize. */
00165   while(blkCnt > 0u)
00166   {
00167     /* Copy new input sample into the state buffer */
00168     *pStateCurnt++ = *pSrc++;
00169
00170     /* Address modifier index of coefficient buffer */
00171     j = 1u;
00172
00173     /* Loop over the Interpolation factor. */
00174     i = S->L;
00175     while(i > 0u)
00176     {
00177       /* Set accumulator to zero */
00178       sum0 = 0.0f;
00179
00180       /* Initialize state pointer */
00181       ptr1 = pState;
00182
00183       /* Initialize coefficient pointer */
00184       ptr2 = pCoeffs + (S->L - j);
00185
00186       /* Loop over the polyPhase length. Unroll by a factor of 4.
00187        ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
00188       tapCnt = phaseLen >> 2u;
00189       while(tapCnt > 0u)
00190       {
00191
00192         /* Read the coefficient */
00193         c0 = *(ptr2);
00194
00195         /* Upsampling is done by stuffing L-1 zeros between each sample.
00196          * So instead of multiplying zeros with coefficients,
00197          * Increment the coefficient pointer by interpolation factor times. */
00198         ptr2 += S->L;
00199
00200         /* Read the input sample */
00201         x0 = *(ptr1++);
00202
00203         /* Perform the multiply-accumulate */
00204         sum0 += x0 * c0;
00205
00206         /* Read the coefficient */
00207         c0 = *(ptr2);
00208
00209         /* Increment the coefficient pointer by interpolation factor times. */
00210         ptr2 += S->L;
00211
00212         /* Read the input sample */
00213         x0 = *(ptr1++);
00214
00215         /* Perform the multiply-accumulate */
00216         sum0 += x0 * c0;
00217
00218         /* Read the coefficient */
00219         c0 = *(ptr2);
00220
00221         /* Increment the coefficient pointer by interpolation factor times. */
00222         ptr2 += S->L;
00223
00224         /* Read the input sample */
00225         x0 = *(ptr1++);
00226
00227         /* Perform the multiply-accumulate */
00228         sum0 += x0 * c0;
00229
00230         /* Read the coefficient */
00231         c0 = *(ptr2);
00232
00233         /* Increment the coefficient pointer by interpolation factor times. */
00234         ptr2 += S->L;
00235
00236         /* Read the input sample */
00237         x0 = *(ptr1++);
00238
00239         /* Perform the multiply-accumulate */
00240         sum0 += x0 * c0;
00241
00242         /* Decrement the loop counter */
00243         tapCnt--;
00244       }
00245
00246       /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
00247       tapCnt = phaseLen % 0x4u;
00248
00249       while(tapCnt > 0u)
00250       {
00251         /* Perform the multiply-accumulate */
00252         sum0 += *(ptr1++) * (*ptr2);
00253
00254         /* Increment the coefficient pointer by interpolation factor times. */
00255         ptr2 += S->L;
00256
00257         /* Decrement the loop counter */
00258         tapCnt--;
00259       }
00260
00261       /* The result is in the accumulator, store in the destination buffer. */
00262       *pDst++ = sum0;
00263
00264       /* Increment the address modifier index of coefficient buffer */
00265       j++;
00266
00267       /* Decrement the loop counter */
00268       i--;
00269     }
00270
00271     /* Advance the state pointer by 1
00272      * to process the next group of interpolation factor number samples */
00273     pState = pState + 1;
00274
00275     /* Decrement the loop counter */
00276     blkCnt--;
00277   }
00278
00279   /* Processing is complete.
00280    ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
00281    ** This prepares the state buffer for the next function call. */
00282
00283   /* Points to the start of the state buffer */
00284   pStateCurnt = S->pState;
00285
00286   tapCnt = (phaseLen - 1u) >> 2u;
00287
00288   /* copy data */
00289   while(tapCnt > 0u)
00290   {
00291     *pStateCurnt++ = *pState++;
00292     *pStateCurnt++ = *pState++;
00293     *pStateCurnt++ = *pState++;
00294     *pStateCurnt++ = *pState++;
00295
00296     /* Decrement the loop counter */
00297     tapCnt--;
00298   }
00299
00300   tapCnt = (phaseLen - 1u) % 0x04u;
00301
00302   while(tapCnt > 0u)
00303   {
00304     *pStateCurnt++ = *pState++;
00305
00306     /* Decrement the loop counter */
00307     tapCnt--;
00308   }
00309
00310 #else
00311
00312   /* Run the below code for Cortex-M0 */
00313
00314   float32_t sum;                                 /* Accumulator */
00315   uint32_t i, blkCnt;                            /* Loop counters */
00316   uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
00317
00318
00319   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
00320   /* pStateCurnt points to the location where the new input data should be written */
00321   pStateCurnt = S->pState + (phaseLen - 1u);
00322
00323   /* Total number of intput samples */
00324   blkCnt = blockSize;
00325
00326   /* Loop over the blockSize. */
00327   while(blkCnt > 0u)
00328   {
00329     /* Copy new input sample into the state buffer */
00330     *pStateCurnt++ = *pSrc++;
00331
00332     /* Loop over the Interpolation factor. */
00333     i = S->L;
00334
00335     while(i > 0u)
00336     {
00337       /* Set accumulator to zero */
00338       sum = 0.0f;
00339
00340       /* Initialize state pointer */
00341       ptr1 = pState;
00342
00343       /* Initialize coefficient pointer */
00344       ptr2 = pCoeffs + (i - 1u);
00345
00346       /* Loop over the polyPhase length */
00347       tapCnt = phaseLen;
00348
00349       while(tapCnt > 0u)
00350       {
00351         /* Perform the multiply-accumulate */
00352         sum += *ptr1++ * *ptr2;
00353
00354         /* Increment the coefficient pointer by interpolation factor times. */
00355         ptr2 += S->L;
00356
00357         /* Decrement the loop counter */
00358         tapCnt--;
00359       }
00360
00361       /* The result is in the accumulator, store in the destination buffer. */
00362       *pDst++ = sum;
00363
00364       /* Decrement the loop counter */
00365       i--;
00366     }
00367
00368     /* Advance the state pointer by 1
00369      * to process the next group of interpolation factor number samples */
00370     pState = pState + 1;
00371
00372     /* Decrement the loop counter */
00373     blkCnt--;
00374   }
00375
00376   /* Processing is complete.
00377    ** Now copy the last phaseLen - 1 samples to the start of the state buffer.
00378    ** This prepares the state buffer for the next function call. */
00379
00380   /* Points to the start of the state buffer */
00381   pStateCurnt = S->pState;
00382
00383   tapCnt = phaseLen - 1u;
00384
00385   while(tapCnt > 0u)
00386   {
00387     *pStateCurnt++ = *pState++;
00388
00389     /* Decrement the loop counter */
00390     tapCnt--;
00391   }
00392
00393 #endif /*   #ifndef ARM_MATH_CM0 */
00394
00395 }
00396
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_fir_interpolate_init_f32.c
00009 *
00010 * Description:  Floating-point FIR interpolator initialization function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00068 arm_status arm_fir_interpolate_init_f32(
00069   arm_fir_interpolate_instance_f32 * S,
00070   uint8_t L,
00071   uint16_t numTaps,
00072   float32_t * pCoeffs,
00073   float32_t * pState,
00074   uint32_t blockSize)
00075 {
00076   arm_status status;
00077
00078   /* The filter length must be a multiple of the interpolation factor */
00079   if((numTaps % L) != 0u)
00080   {
00081     /* Set status as ARM_MATH_LENGTH_ERROR */
00082     status = ARM_MATH_LENGTH_ERROR;
00083   }
00084   else
00085   {
00086
00087     /* Assign coefficient pointer */
00088     S->pCoeffs = pCoeffs;
00089
00090     /* Assign Interpolation factor */
00091     S->L = L;
00092
00093     /* Assign polyPhaseLength */
00094     S->phaseLength = numTaps / L;
00095
00096     /* Clear state buffer and size of state array is always phaseLength + blockSize - 1 */
00097     memset(pState, 0,
00098            (blockSize +
00099             ((uint32_t) S->phaseLength - 1u)) * sizeof(float32_t));
00100
00101     /* Assign state pointer */
00102     S->pState = pState;
00103
00104     status = ARM_MATH_SUCCESS;
00105   }
00106
00107   return (status);
00108
00109 }
00110
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_fir_interpolate_init_q15.c
00009 *
00010 * Description:  Q15 FIR interpolator initialization function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00068 arm_status arm_fir_interpolate_init_q15(
00069   arm_fir_interpolate_instance_q15 * S,
00070   uint8_t L,
00071   uint16_t numTaps,
00072   q15_t * pCoeffs,
00073   q15_t * pState,
00074   uint32_t blockSize)
00075 {
00076   arm_status status;
00077
00078   /* The filter length must be a multiple of the interpolation factor */
00079   if((numTaps % L) != 0u)
00080   {
00081     /* Set status as ARM_MATH_LENGTH_ERROR */
00082     status = ARM_MATH_LENGTH_ERROR;
00083   }
00084   else
00085   {
00086
00087     /* Assign coefficient pointer */
00088     S->pCoeffs = pCoeffs;
00089
00090     /* Assign Interpolation factor */
00091     S->L = L;
00092
00093     /* Assign polyPhaseLength */
00094     S->phaseLength = numTaps / L;
00095
00096     /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
00097     memset(pState, 0,
00098            (blockSize + ((uint32_t) S->phaseLength - 1u)) * sizeof(q15_t));
00099
00100     /* Assign state pointer */
00101     S->pState = pState;
00102
00103     status = ARM_MATH_SUCCESS;
00104   }
00105
00106   return (status);
00107
00108 }
00109
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_fir_interpolate_init_q31.c
00009 *
00010 * Description:  Q31 FIR interpolator initialization function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00069 arm_status arm_fir_interpolate_init_q31(
00070   arm_fir_interpolate_instance_q31 * S,
00071   uint8_t L,
00072   uint16_t numTaps,
00073   q31_t * pCoeffs,
00074   q31_t * pState,
00075   uint32_t blockSize)
00076 {
00077   arm_status status;
00078
00079   /* The filter length must be a multiple of the interpolation factor */
00080   if((numTaps % L) != 0u)
00081   {
00082     /* Set status as ARM_MATH_LENGTH_ERROR */
00083     status = ARM_MATH_LENGTH_ERROR;
00084   }
00085   else
00086   {
00087
00088     /* Assign coefficient pointer */
00089     S->pCoeffs = pCoeffs;
00090
00091     /* Assign Interpolation factor */
00092     S->L = L;
00093
00094     /* Assign polyPhaseLength */
00095     S->phaseLength = numTaps / L;
00096
00097     /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
00098     memset(pState, 0,
00099            (blockSize + ((uint32_t) S->phaseLength - 1u)) * sizeof(q31_t));
00100
00101     /* Assign state pointer */
00102     S->pState = pState;
00103
00104     status = ARM_MATH_SUCCESS;
00105   }
00106
00107   return (status);
00108
00109 }
00110
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_fir_interpolate_q15.c
00009 *
00010 * Description:  Q15 FIR interpolation.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00062 void arm_fir_interpolate_q15(
00063   const arm_fir_interpolate_instance_q15 * S,
00064   q15_t * pSrc,
00065   q15_t * pDst,
00066   uint32_t blockSize)
00067 {
00068   q15_t *pState = S->pState;                     /* State pointer                                            */
00069   q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer                                      */
00070   q15_t *pStateCurnt;                            /* Points to the current sample of the state                */
00071   q15_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers     */
00072
00073
00074 #ifndef ARM_MATH_CM0
00075
00076   /* Run the below code for Cortex-M4 and Cortex-M3 */
00077
00078   q63_t sum0;                                    /* Accumulators                                             */
00079   q15_t x0, c0, c1;                              /* Temporary variables to hold state and coefficient values */
00080   q31_t c, x;
00081   uint32_t i, blkCnt, j, tapCnt;                 /* Loop counters                                            */
00082   uint16_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
00083
00084
00085   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
00086   /* pStateCurnt points to the location where the new input data should be written */
00087   pStateCurnt = S->pState + (phaseLen - 1u);
00088
00089   /* Total number of intput samples */
00090   blkCnt = blockSize;
00091
00092   /* Loop over the blockSize. */
00093   while(blkCnt > 0u)
00094   {
00095     /* Copy new input sample into the state buffer */
00096     *pStateCurnt++ = *pSrc++;
00097
00098     /* Address modifier index of coefficient buffer */
00099     j = 1u;
00100
00101     /* Loop over the Interpolation factor. */
00102     i = S->L;
00103     while(i > 0u)
00104     {
00105       /* Set accumulator to zero */
00106       sum0 = 0;
00107
00108       /* Initialize state pointer */
00109       ptr1 = pState;
00110
00111       /* Initialize coefficient pointer */
00112       ptr2 = pCoeffs + (S->L - j);
00113
00114       /* Loop over the polyPhase length. Unroll by a factor of 4.
00115        ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
00116       tapCnt = (uint32_t) phaseLen >> 2u;
00117       while(tapCnt > 0u)
00118       {
00119         /* Read the coefficient */
00120         c0 = *(ptr2);
00121
00122         /* Upsampling is done by stuffing L-1 zeros between each sample.
00123          * So instead of multiplying zeros with coefficients,
00124          * Increment the coefficient pointer by interpolation factor times. */
00125         ptr2 += S->L;
00126
00127         /* Read the coefficient */
00128         c1 = *(ptr2);
00129
00130         /* Increment the coefficient pointer by interpolation factor times. */
00131         ptr2 += S->L;
00132
00133         /* Pack the coefficients */
00134 #ifndef  ARM_MATH_BIG_ENDIAN
00135
00136         c = __PKHBT(c0, c1, 16);
00137
00138 #else
00139
00140         c = __PKHBT(c1, c0, 16);
00141
00142 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00143
00144         /* Read twp consecutive input samples */
00145         x = *__SIMD32(ptr1)++;
00146
00147         /* Perform the multiply-accumulate */
00148         sum0 = __SMLALD(x, c, sum0);
00149
00150         /* Read the coefficient */
00151         c0 = *(ptr2);
00152
00153         /* Upsampling is done by stuffing L-1 zeros between each sample.
00154          * So insted of multiplying zeros with coefficients,
00155          * Increment the coefficient pointer by interpolation factor times. */
00156         ptr2 += S->L;
00157
00158         /* Read the coefficient */
00159         c1 = *(ptr2);
00160
00161         /* Increment the coefficient pointer by interpolation factor times. */
00162         ptr2 += S->L;
00163
00164         /* Pack the coefficients */
00165 #ifndef  ARM_MATH_BIG_ENDIAN
00166
00167         c = __PKHBT(c0, c1, 16);
00168
00169 #else
00170
00171         c = __PKHBT(c1, c0, 16);
00172
00173 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN            */
00174
00175         /* Read twp consecutive input samples */
00176         x = *__SIMD32(ptr1)++;
00177
00178         /* Perform the multiply-accumulate */
00179         sum0 = __SMLALD(x, c, sum0);
00180
00181         /* Decrement the loop counter */
00182         tapCnt--;
00183       }
00184
00185       /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
00186       tapCnt = (uint32_t) phaseLen & 0x3u;
00187
00188       while(tapCnt > 0u)
00189       {
00190         /* Read the coefficient */
00191         c0 = *(ptr2);
00192
00193         /* Increment the coefficient pointer by interpolation factor times. */
00194         ptr2 += S->L;
00195
00196         /* Read the input sample */
00197         x0 = *(ptr1++);
00198
00199         /* Perform the multiply-accumulate */
00200         sum0 = __SMLALD(x0, c0, sum0);
00201
00202         /* Decrement the loop counter */
00203         tapCnt--;
00204       }
00205
00206       /* The result is in the accumulator, store in the destination buffer. */
00207       *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
00208
00209       /* Increment the address modifier index of coefficient buffer */
00210       j++;
00211
00212       /* Decrement the loop counter */
00213       i--;
00214     }
00215
00216     /* Advance the state pointer by 1
00217      * to process the next group of interpolation factor number samples */
00218     pState = pState + 1;
00219
00220     /* Decrement the loop counter */
00221     blkCnt--;
00222   }
00223
00224   /* Processing is complete.
00225    ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
00226    ** This prepares the state buffer for the next function call. */
00227
00228   /* Points to the start of the state buffer */
00229   pStateCurnt = S->pState;
00230
00231   i = ((uint32_t) phaseLen - 1u) >> 2u;
00232
00233   /* copy data */
00234   while(i > 0u)
00235   {
00236     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00237     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00238
00239     /* Decrement the loop counter */
00240     i--;
00241   }
00242
00243   i = ((uint32_t) phaseLen - 1u) % 0x04u;
00244
00245   while(i > 0u)
00246   {
00247     *pStateCurnt++ = *pState++;
00248
00249     /* Decrement the loop counter */
00250     i--;
00251   }
00252
00253 #else
00254
00255   /* Run the below code for Cortex-M0 */
00256
00257   q63_t sum;                                     /* Accumulator */
00258   q15_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
00259   uint32_t i, blkCnt, tapCnt;                    /* Loop counters                                            */
00260   uint16_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
00261
00262
00263   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
00264   /* pStateCurnt points to the location where the new input data should be written */
00265   pStateCurnt = S->pState + (phaseLen - 1u);
00266
00267   /* Total number of intput samples */
00268   blkCnt = blockSize;
00269
00270   /* Loop over the blockSize. */
00271   while(blkCnt > 0u)
00272   {
00273     /* Copy new input sample into the state buffer */
00274     *pStateCurnt++ = *pSrc++;
00275
00276     /* Loop over the Interpolation factor. */
00277     i = S->L;
00278
00279     while(i > 0u)
00280     {
00281       /* Set accumulator to zero */
00282       sum = 0;
00283
00284       /* Initialize state pointer */
00285       ptr1 = pState;
00286
00287       /* Initialize coefficient pointer */
00288       ptr2 = pCoeffs + (i - 1u);
00289
00290       /* Loop over the polyPhase length */
00291       tapCnt = (uint32_t) phaseLen;
00292
00293       while(tapCnt > 0u)
00294       {
00295         /* Read the coefficient */
00296         c0 = *ptr2;
00297
00298         /* Increment the coefficient pointer by interpolation factor times. */
00299         ptr2 += S->L;
00300
00301         /* Read the input sample */
00302         x0 = *ptr1++;
00303
00304         /* Perform the multiply-accumulate */
00305         sum += ((q31_t) x0 * c0);
00306
00307         /* Decrement the loop counter */
00308         tapCnt--;
00309       }
00310
00311       /* Store the result after converting to 1.15 format in the destination buffer */
00312       *pDst++ = (q15_t) (__SSAT((sum >> 15), 16));
00313
00314       /* Decrement the loop counter */
00315       i--;
00316     }
00317
00318     /* Advance the state pointer by 1
00319      * to process the next group of interpolation factor number samples */
00320     pState = pState + 1;
00321
00322     /* Decrement the loop counter */
00323     blkCnt--;
00324   }
00325
00326   /* Processing is complete.
00327    ** Now copy the last phaseLen - 1 samples to the start of the state buffer.
00328    ** This prepares the state buffer for the next function call. */
00329
00330   /* Points to the start of the state buffer */
00331   pStateCurnt = S->pState;
00332
00333   i = (uint32_t) phaseLen - 1u;
00334
00335   while(i > 0u)
00336   {
00337     *pStateCurnt++ = *pState++;
00338
00339     /* Decrement the loop counter */
00340     i--;
00341   }
00342
00343 #endif /*   #ifndef ARM_MATH_CM0 */
00344
00345 }
00346
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_fir_interpolate_q31.c
00009 *
00010 * Description:  Q31 FIR interpolation.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00063 void arm_fir_interpolate_q31(
00064   const arm_fir_interpolate_instance_q31 * S,
00065   q31_t * pSrc,
00066   q31_t * pDst,
00067   uint32_t blockSize)
00068 {
00069   q31_t *pState = S->pState;                     /* State pointer */
00070   q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00071   q31_t *pStateCurnt;                            /* Points to the current sample of the state */
00072   q31_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers */
00073
00074 #ifndef ARM_MATH_CM0
00075
00076   /* Run the below code for Cortex-M4 and Cortex-M3 */
00077
00078   q63_t sum0;                                    /* Accumulators */
00079   q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
00080   uint32_t i, blkCnt, j;                         /* Loop counters */
00081   uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
00082
00083
00084   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
00085   /* pStateCurnt points to the location where the new input data should be written */
00086   pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
00087
00088   /* Total number of intput samples */
00089   blkCnt = blockSize;
00090
00091   /* Loop over the blockSize. */
00092   while(blkCnt > 0u)
00093   {
00094     /* Copy new input sample into the state buffer */
00095     *pStateCurnt++ = *pSrc++;
00096
00097     /* Address modifier index of coefficient buffer */
00098     j = 1u;
00099
00100     /* Loop over the Interpolation factor. */
00101     i = S->L;
00102     while(i > 0u)
00103     {
00104       /* Set accumulator to zero */
00105       sum0 = 0;
00106
00107       /* Initialize state pointer */
00108       ptr1 = pState;
00109
00110       /* Initialize coefficient pointer */
00111       ptr2 = pCoeffs + (S->L - j);
00112
00113       /* Loop over the polyPhase length. Unroll by a factor of 4.
00114        ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
00115       tapCnt = phaseLen >> 2;
00116       while(tapCnt > 0u)
00117       {
00118
00119         /* Read the coefficient */
00120         c0 = *(ptr2);
00121
00122         /* Upsampling is done by stuffing L-1 zeros between each sample.
00123          * So instead of multiplying zeros with coefficients,
00124          * Increment the coefficient pointer by interpolation factor times. */
00125         ptr2 += S->L;
00126
00127         /* Read the input sample */
00128         x0 = *(ptr1++);
00129
00130         /* Perform the multiply-accumulate */
00131         sum0 += (q63_t) x0 *c0;
00132
00133         /* Read the coefficient */
00134         c0 = *(ptr2);
00135
00136         /* Increment the coefficient pointer by interpolation factor times. */
00137         ptr2 += S->L;
00138
00139         /* Read the input sample */
00140         x0 = *(ptr1++);
00141
00142         /* Perform the multiply-accumulate */
00143         sum0 += (q63_t) x0 *c0;
00144
00145         /* Read the coefficient */
00146         c0 = *(ptr2);
00147
00148         /* Increment the coefficient pointer by interpolation factor times. */
00149         ptr2 += S->L;
00150
00151         /* Read the input sample */
00152         x0 = *(ptr1++);
00153
00154         /* Perform the multiply-accumulate */
00155         sum0 += (q63_t) x0 *c0;
00156
00157         /* Read the coefficient */
00158         c0 = *(ptr2);
00159
00160         /* Increment the coefficient pointer by interpolation factor times. */
00161         ptr2 += S->L;
00162
00163         /* Read the input sample */
00164         x0 = *(ptr1++);
00165
00166         /* Perform the multiply-accumulate */
00167         sum0 += (q63_t) x0 *c0;
00168
00169         /* Decrement the loop counter */
00170         tapCnt--;
00171       }
00172
00173       /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
00174       tapCnt = phaseLen & 0x3u;
00175
00176       while(tapCnt > 0u)
00177       {
00178         /* Read the coefficient */
00179         c0 = *(ptr2);
00180
00181         /* Increment the coefficient pointer by interpolation factor times. */
00182         ptr2 += S->L;
00183
00184         /* Read the input sample */
00185         x0 = *(ptr1++);
00186
00187         /* Perform the multiply-accumulate */
00188         sum0 += (q63_t) x0 *c0;
00189
00190         /* Decrement the loop counter */
00191         tapCnt--;
00192       }
00193
00194       /* The result is in the accumulator, store in the destination buffer. */
00195       *pDst++ = (q31_t) (sum0 >> 31);
00196
00197       /* Increment the address modifier index of coefficient buffer */
00198       j++;
00199
00200       /* Decrement the loop counter */
00201       i--;
00202     }
00203
00204     /* Advance the state pointer by 1
00205      * to process the next group of interpolation factor number samples */
00206     pState = pState + 1;
00207
00208     /* Decrement the loop counter */
00209     blkCnt--;
00210   }
00211
00212   /* Processing is complete.
00213    ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
00214    ** This prepares the state buffer for the next function call. */
00215
00216   /* Points to the start of the state buffer */
00217   pStateCurnt = S->pState;
00218
00219   tapCnt = (phaseLen - 1u) >> 2u;
00220
00221   /* copy data */
00222   while(tapCnt > 0u)
00223   {
00224     *pStateCurnt++ = *pState++;
00225     *pStateCurnt++ = *pState++;
00226     *pStateCurnt++ = *pState++;
00227     *pStateCurnt++ = *pState++;
00228
00229     /* Decrement the loop counter */
00230     tapCnt--;
00231   }
00232
00233   tapCnt = (phaseLen - 1u) % 0x04u;
00234
00235   /* copy data */
00236   while(tapCnt > 0u)
00237   {
00238     *pStateCurnt++ = *pState++;
00239
00240     /* Decrement the loop counter */
00241     tapCnt--;
00242   }
00243
00244 #else
00245
00246   /* Run the below code for Cortex-M0 */
00247
00248   q63_t sum;                                     /* Accumulator */
00249   q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
00250   uint32_t i, blkCnt;                            /* Loop counters */
00251   uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
00252
00253
00254   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
00255   /* pStateCurnt points to the location where the new input data should be written */
00256   pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
00257
00258   /* Total number of intput samples */
00259   blkCnt = blockSize;
00260
00261   /* Loop over the blockSize. */
00262   while(blkCnt > 0u)
00263   {
00264     /* Copy new input sample into the state buffer */
00265     *pStateCurnt++ = *pSrc++;
00266
00267     /* Loop over the Interpolation factor. */
00268     i = S->L;
00269
00270     while(i > 0u)
00271     {
00272       /* Set accumulator to zero */
00273       sum = 0;
00274
00275       /* Initialize state pointer */
00276       ptr1 = pState;
00277
00278       /* Initialize coefficient pointer */
00279       ptr2 = pCoeffs + (i - 1u);
00280
00281       tapCnt = phaseLen;
00282
00283       while(tapCnt > 0u)
00284       {
00285         /* Read the coefficient */
00286         c0 = *(ptr2);
00287
00288         /* Increment the coefficient pointer by interpolation factor times. */
00289         ptr2 += S->L;
00290
00291         /* Read the input sample */
00292         x0 = *ptr1++;
00293
00294         /* Perform the multiply-accumulate */
00295         sum += (q63_t) x0 *c0;
00296
00297         /* Decrement the loop counter */
00298         tapCnt--;
00299       }
00300
00301       /* The result is in the accumulator, store in the destination buffer. */
00302       *pDst++ = (q31_t) (sum >> 31);
00303
00304       /* Decrement the loop counter */
00305       i--;
00306     }
00307
00308     /* Advance the state pointer by 1
00309      * to process the next group of interpolation factor number samples */
00310     pState = pState + 1;
00311
00312     /* Decrement the loop counter */
00313     blkCnt--;
00314   }
00315
00316   /* Processing is complete.
00317    ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
00318    ** This prepares the state buffer for the next function call. */
00319
00320   /* Points to the start of the state buffer */
00321   pStateCurnt = S->pState;
00322
00323   tapCnt = phaseLen - 1u;
00324
00325   /* copy data */
00326   while(tapCnt > 0u)
00327   {
00328     *pStateCurnt++ = *pState++;
00329
00330     /* Decrement the loop counter */
00331     tapCnt--;
00332   }
00333
00334 #endif /*   #ifndef ARM_MATH_CM0 */
00335
00336 }
00337
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_fir_lattice_f32.c
00009 *
00010 * Description:  Processing function for the floating-point FIR Lattice filter.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00121 void arm_fir_lattice_f32(
00122   const arm_fir_lattice_instance_f32 * S,
00123   float32_t * pSrc,
00124   float32_t * pDst,
00125   uint32_t blockSize)
00126 {
00127   float32_t *pState;                             /* State pointer */
00128   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
00129   float32_t *px;                                 /* temporary state pointer */
00130   float32_t *pk;                                 /* temporary coefficient pointer */
00131
00132
00133 #ifndef ARM_MATH_CM0
00134
00135   /* Run the below code for Cortex-M4 and Cortex-M3 */
00136
00137   float32_t fcurr1, fnext1, gcurr1, gnext1;      /* temporary variables for first sample in loop unrolling */
00138   float32_t fcurr2, fnext2, gnext2;              /* temporary variables for second sample in loop unrolling */
00139   float32_t fcurr3, fnext3, gnext3;              /* temporary variables for third sample in loop unrolling */
00140   float32_t fcurr4, fnext4, gnext4;              /* temporary variables for fourth sample in loop unrolling */
00141   uint32_t numStages = S->numStages;             /* Number of stages in the filter */
00142   uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
00143
00144   gcurr1 = 0.0f;
00145   pState = &S->pState[0];
00146
00147   blkCnt = blockSize >> 2;
00148
00149   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00150      a second loop below computes the remaining 1 to 3 samples. */
00151   while(blkCnt > 0u)
00152   {
00153
00154     /* Read two samples from input buffer */
00155     /* f0(n) = x(n) */
00156     fcurr1 = *pSrc++;
00157     fcurr2 = *pSrc++;
00158
00159     /* Initialize coeff pointer */
00160     pk = (pCoeffs);
00161
00162     /* Initialize state pointer */
00163     px = pState;
00164
00165     /* Read g0(n-1) from state */
00166     gcurr1 = *px;
00167
00168     /* Process first sample for first tap */
00169     /* f1(n) = f0(n) +  K1 * g0(n-1) */
00170     fnext1 = fcurr1 + ((*pk) * gcurr1);
00171     /* g1(n) = f0(n) * K1  +  g0(n-1) */
00172     gnext1 = (fcurr1 * (*pk)) + gcurr1;
00173
00174     /* Process second sample for first tap */
00175     /* for sample 2 processing */
00176     fnext2 = fcurr2 + ((*pk) * fcurr1);
00177     gnext2 = (fcurr2 * (*pk)) + fcurr1;
00178
00179     /* Read next two samples from input buffer */
00180     /* f0(n+2) = x(n+2) */
00181     fcurr3 = *pSrc++;
00182     fcurr4 = *pSrc++;
00183
00184     /* Copy only last input samples into the state buffer
00185        which will be used for next four samples processing */
00186     *px++ = fcurr4;
00187
00188     /* Process third sample for first tap */
00189     fnext3 = fcurr3 + ((*pk) * fcurr2);
00190     gnext3 = (fcurr3 * (*pk)) + fcurr2;
00191
00192     /* Process fourth sample for first tap */
00193     fnext4 = fcurr4 + ((*pk) * fcurr3);
00194     gnext4 = (fcurr4 * (*pk++)) + fcurr3;
00195
00196     /* Update of f values for next coefficient set processing */
00197     fcurr1 = fnext1;
00198     fcurr2 = fnext2;
00199     fcurr3 = fnext3;
00200     fcurr4 = fnext4;
00201
00202     /* Loop unrolling.  Process 4 taps at a time . */
00203     stageCnt = (numStages - 1u) >> 2u;
00204
00205     /* Loop over the number of taps.  Unroll by a factor of 4.
00206      ** Repeat until we've computed numStages-3 coefficients. */
00207
00208     /* Process 2nd, 3rd, 4th and 5th taps ... here */
00209     while(stageCnt > 0u)
00210     {
00211       /* Read g1(n-1), g3(n-1) .... from state */
00212       gcurr1 = *px;
00213
00214       /* save g1(n) in state buffer */
00215       *px++ = gnext4;
00216
00217       /* Process first sample for 2nd, 6th .. tap */
00218       /* Sample processing for K2, K6.... */
00219       /* f2(n) = f1(n) +  K2 * g1(n-1) */
00220       fnext1 = fcurr1 + ((*pk) * gcurr1);
00221       /* Process second sample for 2nd, 6th .. tap */
00222       /* for sample 2 processing */
00223       fnext2 = fcurr2 + ((*pk) * gnext1);
00224       /* Process third sample for 2nd, 6th .. tap */
00225       fnext3 = fcurr3 + ((*pk) * gnext2);
00226       /* Process fourth sample for 2nd, 6th .. tap */
00227       fnext4 = fcurr4 + ((*pk) * gnext3);
00228
00229       /* g2(n) = f1(n) * K2  +  g1(n-1) */
00230       /* Calculation of state values for next stage */
00231       gnext4 = (fcurr4 * (*pk)) + gnext3;
00232       gnext3 = (fcurr3 * (*pk)) + gnext2;
00233       gnext2 = (fcurr2 * (*pk)) + gnext1;
00234       gnext1 = (fcurr1 * (*pk++)) + gcurr1;
00235
00236
00237       /* Read g2(n-1), g4(n-1) .... from state */
00238       gcurr1 = *px;
00239
00240       /* save g2(n) in state buffer */
00241       *px++ = gnext4;
00242
00243       /* Sample processing for K3, K7.... */
00244       /* Process first sample for 3rd, 7th .. tap */
00245       /* f3(n) = f2(n) +  K3 * g2(n-1) */
00246       fcurr1 = fnext1 + ((*pk) * gcurr1);
00247       /* Process second sample for 3rd, 7th .. tap */
00248       fcurr2 = fnext2 + ((*pk) * gnext1);
00249       /* Process third sample for 3rd, 7th .. tap */
00250       fcurr3 = fnext3 + ((*pk) * gnext2);
00251       /* Process fourth sample for 3rd, 7th .. tap */
00252       fcurr4 = fnext4 + ((*pk) * gnext3);
00253
00254       /* Calculation of state values for next stage */
00255       /* g3(n) = f2(n) * K3  +  g2(n-1) */
00256       gnext4 = (fnext4 * (*pk)) + gnext3;
00257       gnext3 = (fnext3 * (*pk)) + gnext2;
00258       gnext2 = (fnext2 * (*pk)) + gnext1;
00259       gnext1 = (fnext1 * (*pk++)) + gcurr1;
00260
00261
00262       /* Read g1(n-1), g3(n-1) .... from state */
00263       gcurr1 = *px;
00264
00265       /* save g3(n) in state buffer */
00266       *px++ = gnext4;
00267
00268       /* Sample processing for K4, K8.... */
00269       /* Process first sample for 4th, 8th .. tap */
00270       /* f4(n) = f3(n) +  K4 * g3(n-1) */
00271       fnext1 = fcurr1 + ((*pk) * gcurr1);
00272       /* Process second sample for 4th, 8th .. tap */
00273       /* for sample 2 processing */
00274       fnext2 = fcurr2 + ((*pk) * gnext1);
00275       /* Process third sample for 4th, 8th .. tap */
00276       fnext3 = fcurr3 + ((*pk) * gnext2);
00277       /* Process fourth sample for 4th, 8th .. tap */
00278       fnext4 = fcurr4 + ((*pk) * gnext3);
00279
00280       /* g4(n) = f3(n) * K4  +  g3(n-1) */
00281       /* Calculation of state values for next stage */
00282       gnext4 = (fcurr4 * (*pk)) + gnext3;
00283       gnext3 = (fcurr3 * (*pk)) + gnext2;
00284       gnext2 = (fcurr2 * (*pk)) + gnext1;
00285       gnext1 = (fcurr1 * (*pk++)) + gcurr1;
00286
00287       /* Read g2(n-1), g4(n-1) .... from state */
00288       gcurr1 = *px;
00289
00290       /* save g4(n) in state buffer */
00291       *px++ = gnext4;
00292
00293       /* Sample processing for K5, K9.... */
00294       /* Process first sample for 5th, 9th .. tap */
00295       /* f5(n) = f4(n) +  K5 * g4(n-1) */
00296       fcurr1 = fnext1 + ((*pk) * gcurr1);
00297       /* Process second sample for 5th, 9th .. tap */
00298       fcurr2 = fnext2 + ((*pk) * gnext1);
00299       /* Process third sample for 5th, 9th .. tap */
00300       fcurr3 = fnext3 + ((*pk) * gnext2);
00301       /* Process fourth sample for 5th, 9th .. tap */
00302       fcurr4 = fnext4 + ((*pk) * gnext3);
00303
00304       /* Calculation of state values for next stage */
00305       /* g5(n) = f4(n) * K5  +  g4(n-1) */
00306       gnext4 = (fnext4 * (*pk)) + gnext3;
00307       gnext3 = (fnext3 * (*pk)) + gnext2;
00308       gnext2 = (fnext2 * (*pk)) + gnext1;
00309       gnext1 = (fnext1 * (*pk++)) + gcurr1;
00310
00311       stageCnt--;
00312     }
00313
00314     /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
00315     stageCnt = (numStages - 1u) % 0x4u;
00316
00317     while(stageCnt > 0u)
00318     {
00319       gcurr1 = *px;
00320
00321       /* save g value in state buffer */
00322       *px++ = gnext4;
00323
00324       /* Process four samples for last three taps here */
00325       fnext1 = fcurr1 + ((*pk) * gcurr1);
00326       fnext2 = fcurr2 + ((*pk) * gnext1);
00327       fnext3 = fcurr3 + ((*pk) * gnext2);
00328       fnext4 = fcurr4 + ((*pk) * gnext3);
00329
00330       /* g1(n) = f0(n) * K1  +  g0(n-1) */
00331       gnext4 = (fcurr4 * (*pk)) + gnext3;
00332       gnext3 = (fcurr3 * (*pk)) + gnext2;
00333       gnext2 = (fcurr2 * (*pk)) + gnext1;
00334       gnext1 = (fcurr1 * (*pk++)) + gcurr1;
00335
00336       /* Update of f values for next coefficient set processing */
00337       fcurr1 = fnext1;
00338       fcurr2 = fnext2;
00339       fcurr3 = fnext3;
00340       fcurr4 = fnext4;
00341
00342       stageCnt--;
00343
00344     }
00345
00346     /* The results in the 4 accumulators, store in the destination buffer. */
00347     /* y(n) = fN(n) */
00348     *pDst++ = fcurr1;
00349     *pDst++ = fcurr2;
00350     *pDst++ = fcurr3;
00351     *pDst++ = fcurr4;
00352
00353     blkCnt--;
00354   }
00355
00356   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00357    ** No loop unrolling is used. */
00358   blkCnt = blockSize % 0x4u;
00359
00360   while(blkCnt > 0u)
00361   {
00362     /* f0(n) = x(n) */
00363     fcurr1 = *pSrc++;
00364
00365     /* Initialize coeff pointer */
00366     pk = (pCoeffs);
00367
00368     /* Initialize state pointer */
00369     px = pState;
00370
00371     /* read g2(n) from state buffer */
00372     gcurr1 = *px;
00373
00374     /* for sample 1 processing */
00375     /* f1(n) = f0(n) +  K1 * g0(n-1) */
00376     fnext1 = fcurr1 + ((*pk) * gcurr1);
00377     /* g1(n) = f0(n) * K1  +  g0(n-1) */
00378     gnext1 = (fcurr1 * (*pk++)) + gcurr1;
00379
00380     /* save g1(n) in state buffer */
00381     *px++ = fcurr1;
00382
00383     /* f1(n) is saved in fcurr1
00384        for next stage processing */
00385     fcurr1 = fnext1;
00386
00387     stageCnt = (numStages - 1u);
00388
00389     /* stage loop */
00390     while(stageCnt > 0u)
00391     {
00392       /* read g2(n) from state buffer */
00393       gcurr1 = *px;
00394
00395       /* save g1(n) in state buffer */
00396       *px++ = gnext1;
00397
00398       /* Sample processing for K2, K3.... */
00399       /* f2(n) = f1(n) +  K2 * g1(n-1) */
00400       fnext1 = fcurr1 + ((*pk) * gcurr1);
00401       /* g2(n) = f1(n) * K2  +  g1(n-1) */
00402       gnext1 = (fcurr1 * (*pk++)) + gcurr1;
00403
00404       /* f1(n) is saved in fcurr1
00405          for next stage processing */
00406       fcurr1 = fnext1;
00407
00408       stageCnt--;
00409
00410     }
00411
00412     /* y(n) = fN(n) */
00413     *pDst++ = fcurr1;
00414
00415     blkCnt--;
00416
00417   }
00418
00419 #else
00420
00421   /* Run the below code for Cortex-M0 */
00422
00423   float32_t fcurr, fnext, gcurr, gnext;          /* temporary variables */
00424   uint32_t numStages = S->numStages;             /* Length of the filter */
00425   uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
00426
00427   pState = &S->pState[0];
00428
00429   blkCnt = blockSize;
00430
00431   while(blkCnt > 0u)
00432   {
00433     /* f0(n) = x(n) */
00434     fcurr = *pSrc++;
00435
00436     /* Initialize coeff pointer */
00437     pk = pCoeffs;
00438
00439     /* Initialize state pointer */
00440     px = pState;
00441
00442     /* read g0(n-1) from state buffer */
00443     gcurr = *px;
00444
00445     /* for sample 1 processing */
00446     /* f1(n) = f0(n) +  K1 * g0(n-1) */
00447     fnext = fcurr + ((*pk) * gcurr);
00448     /* g1(n) = f0(n) * K1  +  g0(n-1) */
00449     gnext = (fcurr * (*pk++)) + gcurr;
00450
00451     /* save f0(n) in state buffer */
00452     *px++ = fcurr;
00453
00454     /* f1(n) is saved in fcurr
00455        for next stage processing */
00456     fcurr = fnext;
00457
00458     stageCnt = (numStages - 1u);
00459
00460     /* stage loop */
00461     while(stageCnt > 0u)
00462     {
00463       /* read g2(n) from state buffer */
00464       gcurr = *px;
00465
00466       /* save g1(n) in state buffer */
00467       *px++ = gnext;
00468
00469       /* Sample processing for K2, K3.... */
00470       /* f2(n) = f1(n) +  K2 * g1(n-1) */
00471       fnext = fcurr + ((*pk) * gcurr);
00472       /* g2(n) = f1(n) * K2  +  g1(n-1) */
00473       gnext = (fcurr * (*pk++)) + gcurr;
00474
00475       /* f1(n) is saved in fcurr1
00476          for next stage processing */
00477       fcurr = fnext;
00478
00479       stageCnt--;
00480
00481     }
00482
00483     /* y(n) = fN(n) */
00484     *pDst++ = fcurr;
00485
00486     blkCnt--;
00487
00488   }
00489
00490 #endif /*   #ifndef ARM_MATH_CM0 */
00491
00492 }
00493
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_fir_lattice_init_f32.c
00009 *
00010 * Description:  Floating-point FIR Lattice filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00053 void arm_fir_lattice_init_f32(
00054   arm_fir_lattice_instance_f32 * S,
00055   uint16_t numStages,
00056   float32_t * pCoeffs,
00057   float32_t * pState)
00058 {
00059   /* Assign filter taps */
00060   S->numStages = numStages;
00061
00062   /* Assign coefficient pointer */
00063   S->pCoeffs = pCoeffs;
00064
00065   /* Clear state buffer and size is always numStages */
00066   memset(pState, 0, (numStages) * sizeof(float32_t));
00067
00068   /* Assign state pointer */
00069   S->pState = pState;
00070
00071 }
00072
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_fir_lattice_init_q15.c
00009 *
00010 * Description:  Q15 FIR Lattice filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00053 void arm_fir_lattice_init_q15(
00054   arm_fir_lattice_instance_q15 * S,
00055   uint16_t numStages,
00056   q15_t * pCoeffs,
00057   q15_t * pState)
00058 {
00059   /* Assign filter taps */
00060   S->numStages = numStages;
00061
00062   /* Assign coefficient pointer */
00063   S->pCoeffs = pCoeffs;
00064
00065   /* Clear state buffer and size is always numStages */
00066   memset(pState, 0, (numStages) * sizeof(q15_t));
00067
00068   /* Assign state pointer */
00069   S->pState = pState;
00070
00071 }
00072
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_fir_lattice_init_q31.c
00009 *
00010 * Description:  Q31 FIR lattice filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00053 void arm_fir_lattice_init_q31(
00054   arm_fir_lattice_instance_q31 * S,
00055   uint16_t numStages,
00056   q31_t * pCoeffs,
00057   q31_t * pState)
00058 {
00059   /* Assign filter taps */
00060   S->numStages = numStages;
00061
00062   /* Assign coefficient pointer */
00063   S->pCoeffs = pCoeffs;
00064
00065   /* Clear state buffer and size is always numStages */
00066   memset(pState, 0, (numStages) * sizeof(q31_t));
00067
00068   /* Assign state pointer */
00069   S->pState = pState;
00070
00071 }
00072
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_fir_lattice_q15.c
00009 *
00010 * Description:  Q15 FIR lattice filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00054 void arm_fir_lattice_q15(
00055   const arm_fir_lattice_instance_q15 * S,
00056   q15_t * pSrc,
00057   q15_t * pDst,
00058   uint32_t blockSize)
00059 {
00060   q15_t *pState;                                 /* State pointer */
00061   q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00062   q15_t *px;                                     /* temporary state pointer */
00063   q15_t *pk;                                     /* temporary coefficient pointer */
00064
00065
00066 #ifndef ARM_MATH_CM0
00067
00068   /* Run the below code for Cortex-M4 and Cortex-M3 */
00069
00070   q31_t fcurnt1, fnext1, gcurnt1 = 0, gnext1;    /* temporary variables for first sample in loop unrolling */
00071   q31_t fcurnt2, fnext2, gnext2;                 /* temporary variables for second sample in loop unrolling */
00072   q31_t fcurnt3, fnext3, gnext3;                 /* temporary variables for third sample in loop unrolling */
00073   q31_t fcurnt4, fnext4, gnext4;                 /* temporary variables for fourth sample in loop unrolling */
00074   uint32_t numStages = S->numStages;             /* Number of stages in the filter */
00075   uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
00076
00077   pState = &S->pState[0];
00078
00079   blkCnt = blockSize >> 2u;
00080
00081   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00082    ** a second loop below computes the remaining 1 to 3 samples. */
00083   while(blkCnt > 0u)
00084   {
00085
00086     /* Read two samples from input buffer */
00087     /* f0(n) = x(n) */
00088     fcurnt1 = *pSrc++;
00089     fcurnt2 = *pSrc++;
00090
00091     /* Initialize coeff pointer */
00092     pk = (pCoeffs);
00093
00094     /* Initialize state pointer */
00095     px = pState;
00096
00097     /* Read g0(n-1) from state */
00098     gcurnt1 = *px;
00099
00100     /* Process first sample for first tap */
00101     /* f1(n) = f0(n) +  K1 * g0(n-1) */
00102     fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
00103     fnext1 = __SSAT(fnext1, 16);
00104
00105     /* g1(n) = f0(n) * K1  +  g0(n-1) */
00106     gnext1 = (q31_t) ((fcurnt1 * (*pk)) >> 15u) + gcurnt1;
00107     gnext1 = __SSAT(gnext1, 16);
00108
00109     /* Process second sample for first tap */
00110     /* for sample 2 processing */
00111     fnext2 = (q31_t) ((fcurnt1 * (*pk)) >> 15u) + fcurnt2;
00112     fnext2 = __SSAT(fnext2, 16);
00113
00114     gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + fcurnt1;
00115     gnext2 = __SSAT(gnext2, 16);
00116
00117
00118     /* Read next two samples from input buffer */
00119     /* f0(n+2) = x(n+2) */
00120     fcurnt3 = *pSrc++;
00121     fcurnt4 = *pSrc++;
00122
00123     /* Copy only last input samples into the state buffer
00124        which is used for next four samples processing */
00125     *px++ = (q15_t) fcurnt4;
00126
00127     /* Process third sample for first tap */
00128     fnext3 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + fcurnt3;
00129     fnext3 = __SSAT(fnext3, 16);
00130     gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + fcurnt2;
00131     gnext3 = __SSAT(gnext3, 16);
00132
00133     /* Process fourth sample for first tap */
00134     fnext4 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + fcurnt4;
00135     fnext4 = __SSAT(fnext4, 16);
00136     gnext4 = (q31_t) ((fcurnt4 * (*pk++)) >> 15u) + fcurnt3;
00137     gnext4 = __SSAT(gnext4, 16);
00138
00139     /* Update of f values for next coefficient set processing */
00140     fcurnt1 = fnext1;
00141     fcurnt2 = fnext2;
00142     fcurnt3 = fnext3;
00143     fcurnt4 = fnext4;
00144
00145
00146     /* Loop unrolling.  Process 4 taps at a time . */
00147     stageCnt = (numStages - 1u) >> 2;
00148
00149
00150     /* Loop over the number of taps.  Unroll by a factor of 4.
00151      ** Repeat until we've computed numStages-3 coefficients. */
00152
00153     /* Process 2nd, 3rd, 4th and 5th taps ... here */
00154     while(stageCnt > 0u)
00155     {
00156       /* Read g1(n-1), g3(n-1) .... from state */
00157       gcurnt1 = *px;
00158
00159       /* save g1(n) in state buffer */
00160       *px++ = (q15_t) gnext4;
00161
00162       /* Process first sample for 2nd, 6th .. tap */
00163       /* Sample processing for K2, K6.... */
00164       /* f1(n) = f0(n) +  K1 * g0(n-1) */
00165       fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
00166       fnext1 = __SSAT(fnext1, 16);
00167
00168
00169       /* Process second sample for 2nd, 6th .. tap */
00170       /* for sample 2 processing */
00171       fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2;
00172       fnext2 = __SSAT(fnext2, 16);
00173       /* Process third sample for 2nd, 6th .. tap */
00174       fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3;
00175       fnext3 = __SSAT(fnext3, 16);
00176       /* Process fourth sample for 2nd, 6th .. tap */
00177       /* fnext4 = fcurnt4 + (*pk) * gnext3; */
00178       fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4;
00179       fnext4 = __SSAT(fnext4, 16);
00180
00181       /* g1(n) = f0(n) * K1  +  g0(n-1) */
00182       /* Calculation of state values for next stage */
00183       gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3;
00184       gnext4 = __SSAT(gnext4, 16);
00185       gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2;
00186       gnext3 = __SSAT(gnext3, 16);
00187
00188       gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1;
00189       gnext2 = __SSAT(gnext2, 16);
00190
00191       gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
00192       gnext1 = __SSAT(gnext1, 16);
00193
00194
00195       /* Read g2(n-1), g4(n-1) .... from state */
00196       gcurnt1 = *px;
00197
00198       /* save g1(n) in state buffer */
00199       *px++ = (q15_t) gnext4;
00200
00201       /* Sample processing for K3, K7.... */
00202       /* Process first sample for 3rd, 7th .. tap */
00203       /* f3(n) = f2(n) +  K3 * g2(n-1) */
00204       fcurnt1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fnext1;
00205       fcurnt1 = __SSAT(fcurnt1, 16);
00206
00207       /* Process second sample for 3rd, 7th .. tap */
00208       fcurnt2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fnext2;
00209       fcurnt2 = __SSAT(fcurnt2, 16);
00210
00211       /* Process third sample for 3rd, 7th .. tap */
00212       fcurnt3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fnext3;
00213       fcurnt3 = __SSAT(fcurnt3, 16);
00214
00215       /* Process fourth sample for 3rd, 7th .. tap */
00216       fcurnt4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fnext4;
00217       fcurnt4 = __SSAT(fcurnt4, 16);
00218
00219       /* Calculation of state values for next stage */
00220       /* g3(n) = f2(n) * K3  +  g2(n-1) */
00221       gnext4 = (q31_t) ((fnext4 * (*pk)) >> 15u) + gnext3;
00222       gnext4 = __SSAT(gnext4, 16);
00223
00224       gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15u) + gnext2;
00225       gnext3 = __SSAT(gnext3, 16);
00226
00227       gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15u) + gnext1;
00228       gnext2 = __SSAT(gnext2, 16);
00229
00230       gnext1 = (q31_t) ((fnext1 * (*pk++)) >> 15u) + gcurnt1;
00231       gnext1 = __SSAT(gnext1, 16);
00232
00233       /* Read g1(n-1), g3(n-1) .... from state */
00234       gcurnt1 = *px;
00235
00236       /* save g1(n) in state buffer */
00237       *px++ = (q15_t) gnext4;
00238
00239       /* Sample processing for K4, K8.... */
00240       /* Process first sample for 4th, 8th .. tap */
00241       /* f4(n) = f3(n) +  K4 * g3(n-1) */
00242       fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
00243       fnext1 = __SSAT(fnext1, 16);
00244
00245       /* Process second sample for 4th, 8th .. tap */
00246       /* for sample 2 processing */
00247       fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2;
00248       fnext2 = __SSAT(fnext2, 16);
00249
00250       /* Process third sample for 4th, 8th .. tap */
00251       fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3;
00252       fnext3 = __SSAT(fnext3, 16);
00253
00254       /* Process fourth sample for 4th, 8th .. tap */
00255       fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4;
00256       fnext4 = __SSAT(fnext4, 16);
00257
00258       /* g4(n) = f3(n) * K4  +  g3(n-1) */
00259       /* Calculation of state values for next stage */
00260       gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3;
00261       gnext4 = __SSAT(gnext4, 16);
00262
00263       gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2;
00264       gnext3 = __SSAT(gnext3, 16);
00265
00266       gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1;
00267       gnext2 = __SSAT(gnext2, 16);
00268       gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
00269       gnext1 = __SSAT(gnext1, 16);
00270
00271
00272       /* Read g2(n-1), g4(n-1) .... from state */
00273       gcurnt1 = *px;
00274
00275       /* save g4(n) in state buffer */
00276       *px++ = (q15_t) gnext4;
00277
00278       /* Sample processing for K5, K9.... */
00279       /* Process first sample for 5th, 9th .. tap */
00280       /* f5(n) = f4(n) +  K5 * g4(n-1) */
00281       fcurnt1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fnext1;
00282       fcurnt1 = __SSAT(fcurnt1, 16);
00283
00284       /* Process second sample for 5th, 9th .. tap */
00285       fcurnt2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fnext2;
00286       fcurnt2 = __SSAT(fcurnt2, 16);
00287
00288       /* Process third sample for 5th, 9th .. tap */
00289       fcurnt3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fnext3;
00290       fcurnt3 = __SSAT(fcurnt3, 16);
00291
00292       /* Process fourth sample for 5th, 9th .. tap */
00293       fcurnt4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fnext4;
00294       fcurnt4 = __SSAT(fcurnt4, 16);
00295
00296       /* Calculation of state values for next stage */
00297       /* g5(n) = f4(n) * K5  +  g4(n-1) */
00298       gnext4 = (q31_t) ((fnext4 * (*pk)) >> 15u) + gnext3;
00299       gnext4 = __SSAT(gnext4, 16);
00300       gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15u) + gnext2;
00301       gnext3 = __SSAT(gnext3, 16);
00302       gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15u) + gnext1;
00303       gnext2 = __SSAT(gnext2, 16);
00304       gnext1 = (q31_t) ((fnext1 * (*pk++)) >> 15u) + gcurnt1;
00305       gnext1 = __SSAT(gnext1, 16);
00306
00307       stageCnt--;
00308     }
00309
00310     /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
00311     stageCnt = (numStages - 1u) % 0x4u;
00312
00313     while(stageCnt > 0u)
00314     {
00315       gcurnt1 = *px;
00316
00317       /* save g value in state buffer */
00318       *px++ = (q15_t) gnext4;
00319
00320       /* Process four samples for last three taps here */
00321       fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
00322       fnext1 = __SSAT(fnext1, 16);
00323       fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2;
00324       fnext2 = __SSAT(fnext2, 16);
00325
00326       fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3;
00327       fnext3 = __SSAT(fnext3, 16);
00328
00329       fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4;
00330       fnext4 = __SSAT(fnext4, 16);
00331
00332       /* g1(n) = f0(n) * K1  +  g0(n-1) */
00333       gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3;
00334       gnext4 = __SSAT(gnext4, 16);
00335       gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2;
00336       gnext3 = __SSAT(gnext3, 16);
00337       gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1;
00338       gnext2 = __SSAT(gnext2, 16);
00339       gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
00340       gnext1 = __SSAT(gnext1, 16);
00341
00342       /* Update of f values for next coefficient set processing */
00343       fcurnt1 = fnext1;
00344       fcurnt2 = fnext2;
00345       fcurnt3 = fnext3;
00346       fcurnt4 = fnext4;
00347
00348       stageCnt--;
00349
00350     }
00351
00352     /* The results in the 4 accumulators, store in the destination buffer. */
00353     /* y(n) = fN(n) */
00354
00355 #ifndef  ARM_MATH_BIG_ENDIAN
00356
00357     *__SIMD32(pDst)++ = __PKHBT(fcurnt1, fcurnt2, 16);
00358     *__SIMD32(pDst)++ = __PKHBT(fcurnt3, fcurnt4, 16);
00359
00360 #else
00361
00362     *__SIMD32(pDst)++ = __PKHBT(fcurnt2, fcurnt1, 16);
00363     *__SIMD32(pDst)++ = __PKHBT(fcurnt4, fcurnt3, 16);
00364
00365 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00366
00367     blkCnt--;
00368   }
00369
00370   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00371    ** No loop unrolling is used. */
00372   blkCnt = blockSize % 0x4u;
00373
00374   while(blkCnt > 0u)
00375   {
00376     /* f0(n) = x(n) */
00377     fcurnt1 = *pSrc++;
00378
00379     /* Initialize coeff pointer */
00380     pk = (pCoeffs);
00381
00382     /* Initialize state pointer */
00383     px = pState;
00384
00385     /* read g2(n) from state buffer */
00386     gcurnt1 = *px;
00387
00388     /* for sample 1 processing */
00389     /* f1(n) = f0(n) +  K1 * g0(n-1) */
00390     fnext1 = (((q31_t) gcurnt1 * (*pk)) >> 15u) + fcurnt1;
00391     fnext1 = __SSAT(fnext1, 16);
00392
00393
00394     /* g1(n) = f0(n) * K1  +  g0(n-1) */
00395     gnext1 = (((q31_t) fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
00396     gnext1 = __SSAT(gnext1, 16);
00397
00398     /* save g1(n) in state buffer */
00399     *px++ = (q15_t) fcurnt1;
00400
00401     /* f1(n) is saved in fcurnt1
00402        for next stage processing */
00403     fcurnt1 = fnext1;
00404
00405     stageCnt = (numStages - 1u);
00406
00407     /* stage loop */
00408     while(stageCnt > 0u)
00409     {
00410       /* read g2(n) from state buffer */
00411       gcurnt1 = *px;
00412
00413       /* save g1(n) in state buffer */
00414       *px++ = (q15_t) gnext1;
00415
00416       /* Sample processing for K2, K3.... */
00417       /* f2(n) = f1(n) +  K2 * g1(n-1) */
00418       fnext1 = (((q31_t) gcurnt1 * (*pk)) >> 15u) + fcurnt1;
00419       fnext1 = __SSAT(fnext1, 16);
00420
00421       /* g2(n) = f1(n) * K2  +  g1(n-1) */
00422       gnext1 = (((q31_t) fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
00423       gnext1 = __SSAT(gnext1, 16);
00424
00425
00426       /* f1(n) is saved in fcurnt1
00427          for next stage processing */
00428       fcurnt1 = fnext1;
00429
00430       stageCnt--;
00431
00432     }
00433
00434     /* y(n) = fN(n) */
00435     *pDst++ = __SSAT(fcurnt1, 16);
00436
00437
00438     blkCnt--;
00439
00440   }
00441
00442 #else
00443
00444   /* Run the below code for Cortex-M0 */
00445
00446   q31_t fcurnt, fnext, gcurnt, gnext;            /* temporary variables */
00447   uint32_t numStages = S->numStages;             /* Length of the filter */
00448   uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
00449
00450   pState = &S->pState[0];
00451
00452   blkCnt = blockSize;
00453
00454   while(blkCnt > 0u)
00455   {
00456     /* f0(n) = x(n) */
00457     fcurnt = *pSrc++;
00458
00459     /* Initialize coeff pointer */
00460     pk = (pCoeffs);
00461
00462     /* Initialize state pointer */
00463     px = pState;
00464
00465     /* read g0(n-1) from state buffer */
00466     gcurnt = *px;
00467
00468     /* for sample 1 processing */
00469     /* f1(n) = f0(n) +  K1 * g0(n-1) */
00470     fnext = ((gcurnt * (*pk)) >> 15u) + fcurnt;
00471     fnext = __SSAT(fnext, 16);
00472
00473
00474     /* g1(n) = f0(n) * K1  +  g0(n-1) */
00475     gnext = ((fcurnt * (*pk++)) >> 15u) + gcurnt;
00476     gnext = __SSAT(gnext, 16);
00477
00478     /* save f0(n) in state buffer */
00479     *px++ = (q15_t) fcurnt;
00480
00481     /* f1(n) is saved in fcurnt
00482        for next stage processing */
00483     fcurnt = fnext;
00484
00485     stageCnt = (numStages - 1u);
00486
00487     /* stage loop */
00488     while(stageCnt > 0u)
00489     {
00490       /* read g1(n-1) from state buffer */
00491       gcurnt = *px;
00492
00493       /* save g0(n-1) in state buffer */
00494       *px++ = (q15_t) gnext;
00495
00496       /* Sample processing for K2, K3.... */
00497       /* f2(n) = f1(n) +  K2 * g1(n-1) */
00498       fnext = ((gcurnt * (*pk)) >> 15u) + fcurnt;
00499       fnext = __SSAT(fnext, 16);
00500
00501       /* g2(n) = f1(n) * K2  +  g1(n-1) */
00502       gnext = ((fcurnt * (*pk++)) >> 15u) + gcurnt;
00503       gnext = __SSAT(gnext, 16);
00504
00505
00506       /* f1(n) is saved in fcurnt
00507          for next stage processing */
00508       fcurnt = fnext;
00509
00510       stageCnt--;
00511
00512     }
00513
00514     /* y(n) = fN(n) */
00515     *pDst++ = __SSAT(fcurnt, 16);
00516
00517
00518     blkCnt--;
00519
00520   }
00521
00522 #endif /*   #ifndef ARM_MATH_CM0 */
00523
00524 }
00525
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_fir_lattice_q31.c
00009 *
00010 * Description:  Q31 FIR lattice filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_fir_lattice_q31(
00059   const arm_fir_lattice_instance_q31 * S,
00060   q31_t * pSrc,
00061   q31_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   q31_t *pState;                                 /* State pointer */
00065   q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00066   q31_t *px;                                     /* temporary state pointer */
00067   q31_t *pk;                                     /* temporary coefficient pointer */
00068
00069
00070 #ifndef ARM_MATH_CM0
00071
00072   /* Run the below code for Cortex-M4 and Cortex-M3 */
00073
00074   q31_t fcurr1, fnext1, gcurr1 = 0, gnext1;      /* temporary variables for first sample in loop unrolling */
00075   q63_t fcurr2, fnext2, gnext2;                  /* temporary variables for second sample in loop unrolling */
00076   q63_t fcurr3, fnext3, gnext3;                  /* temporary variables for third sample in loop unrolling */
00077   q63_t fcurr4, fnext4, gnext4;                  /* temporary variables for fourth sample in loop unrolling */
00078   uint32_t numStages = S->numStages;             /* Length of the filter */
00079   uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
00080
00081   pState = &S->pState[0];
00082
00083   blkCnt = blockSize >> 2u;
00084
00085   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00086    ** a second loop below computes the remaining 1 to 3 samples. */
00087   while(blkCnt > 0u)
00088   {
00089
00090     /* Read two samples from input buffer */
00091     /* f0(n) = x(n) */
00092     fcurr1 = *pSrc++;
00093     /* f0(n) = x(n) */
00094     fcurr2 = *pSrc++;
00095
00096     /* Initialize coeff pointer */
00097     pk = (pCoeffs);
00098
00099     /* Initialize state pointer */
00100     px = pState;
00101
00102     /* Read g0(n-1) from state */
00103     gcurr1 = *px;
00104
00105     /* Process first sample for first tap */
00106     /* f1(n) = f0(n) +  K1 * g0(n-1) */
00107     fnext1 = (q31_t) (((q63_t) gcurr1 * (*pk)) >> 31) + fcurr1;
00108     /* g1(n) = f0(n) * K1  +  g0(n-1) */
00109     gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 31) + gcurr1;
00110
00111     /* Process second sample for first tap */
00112     /* for sample 2 processing */
00113     fnext2 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 31) + fcurr2;
00114     gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 31) + fcurr1;
00115
00116
00117     /* Read next two samples from input buffer */
00118     /* f0(n+2) = x(n+2) */
00119     fcurr3 = *pSrc++;
00120     fcurr4 = *pSrc++;
00121
00122     /* Copy only last input samples into the state buffer
00123        which will be used for next four samples processing */
00124     *px++ = (q31_t) fcurr4;
00125
00126     /* Process third sample for first tap */
00127     fnext3 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 31) + fcurr3;
00128     gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 31) + fcurr2;
00129
00130     /* Process fourth sample for first tap */
00131     fnext4 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 31) + fcurr4;
00132     gnext4 = (q31_t) (((q63_t) fcurr4 * (*pk++)) >> 31) + fcurr3;
00133
00134     /* save g1(n) in state buffer for next sample processing */
00135     /* *px++ = gnext4;       */
00136
00137     /* Update of f values for next coefficient set processing */
00138     fcurr1 = fnext1;
00139     fcurr2 = fnext2;
00140     fcurr3 = fnext3;
00141     fcurr4 = fnext4;
00142
00143
00144     /* Loop unrolling.  Process 4 taps at a time . */
00145     stageCnt = (numStages - 1u) >> 2u;
00146
00147
00148     /* Loop over the number of taps.  Unroll by a factor of 4.
00149      ** Repeat until we've computed numStages-3 coefficients. */
00150
00151     /* Process 2nd, 3rd, 4th and 5th taps ... here */
00152     while(stageCnt > 0u)
00153     {
00154       /* Read g1(n-1), g3(n-1) .... from state */
00155       gcurr1 = *px;
00156
00157       /* save g1(n) in state buffer */
00158       *px++ = (q31_t) gnext4;
00159
00160       /* Process first sample for 2nd, 6th .. tap */
00161       /* Sample processing for K2, K6.... */
00162       /* f2(n) = f1(n) +  K2 * g1(n-1) */
00163       fnext1 = (q31_t) (((q63_t) gcurr1 * (*pk)) >> 31) + fcurr1;
00164       /* Process second sample for 2nd, 6th .. tap */
00165       /* for sample 2 processing */
00166       fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 31) + fcurr2;
00167       /* Process third sample for 2nd, 6th .. tap */
00168       fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 31) + fcurr3;
00169       /* Process fourth sample for 2nd, 6th .. tap */
00170       fnext4 = (q31_t) (((q63_t) gnext3 * (*pk)) >> 31) + fcurr4;
00171
00172       /* g2(n) = f1(n) * K2  +  g1(n-1) */
00173       /* Calculation of state values for next stage */
00174       gnext4 = (q31_t) (((q63_t) fcurr4 * (*pk)) >> 31) + gnext3;
00175       gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 31) + gnext2;
00176       gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 31) + gnext1;
00177       gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk++)) >> 31) + gcurr1;
00178
00179
00180       /* Read g2(n-1), g4(n-1) .... from state */
00181       gcurr1 = *px;
00182
00183       /* save g2(n) in state buffer */
00184       *px++ = (q31_t) gnext4;
00185
00186       /* Sample processing for K3, K7.... */
00187       /* Process first sample for 3rd, 7th .. tap */
00188       /* f3(n) = f2(n) +  K3 * g2(n-1) */
00189       fcurr1 = (q31_t) (((q63_t) gcurr1 * (*pk)) >> 31) + fnext1;
00190       /* Process second sample for 3rd, 7th .. tap */
00191       fcurr2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 31) + fnext2;
00192       /* Process third sample for 3rd, 7th .. tap */
00193       fcurr3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 31) + fnext3;
00194       /* Process fourth sample for 3rd, 7th .. tap */
00195       fcurr4 = (q31_t) (((q63_t) gnext3 * (*pk)) >> 31) + fnext4;
00196
00197       /* Calculation of state values for next stage */
00198       /*  gnext4 = fnext4 * (*pk) +  gnext3; */
00199       gnext4 = (q31_t) (((q63_t) fnext4 * (*pk)) >> 31) + gnext3;
00200       gnext3 = (q31_t) (((q63_t) fnext3 * (*pk)) >> 31) + gnext2;
00201       /*  gnext2 = fnext2 * (*pk) +  gnext1; */
00202       gnext2 = (q31_t) (((q63_t) fnext2 * (*pk)) >> 31) + gnext1;
00203
00204       /* g1(n) = f0(n) * K1  +  g0(n-1) */
00205       /*  gnext1 = fnext1 * (*pk++) +  gcurr1; */
00206       gnext1 = (q31_t) (((q63_t) fnext1 * (*pk++)) >> 31) + gcurr1;
00207
00208       /* Read g1(n-1), g3(n-1) .... from state */
00209       gcurr1 = *px;
00210
00211       /* save g1(n) in state buffer */
00212       *px++ = (q31_t) gnext4;
00213
00214       /* Sample processing for K4, K8.... */
00215       /* Process first sample for 4th, 8th .. tap */
00216       /* f4(n) = f3(n) +  K4 * g3(n-1) */
00217       fnext1 = (q31_t) (((q63_t) gcurr1 * (*pk)) >> 31) + fcurr1;
00218       /* Process second sample for 4th, 8th .. tap */
00219       /* for sample 2 processing */
00220       fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 31) + fcurr2;
00221       /* Process third sample for 4th, 8th .. tap */
00222       fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 31) + fcurr3;
00223       /* Process fourth sample for 4th, 8th .. tap */
00224       fnext4 = (q31_t) (((q63_t) gnext3 * (*pk)) >> 31) + fcurr4;
00225
00226       /* g4(n) = f3(n) * K4  +  g3(n-1) */
00227       /* Calculation of state values for next stage */
00228       gnext4 = (q31_t) (((q63_t) fcurr4 * (*pk)) >> 31) + gnext3;
00229       gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 31) + gnext2;
00230       gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 31) + gnext1;
00231       gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk++)) >> 31) + gcurr1;
00232
00233       /* Read g2(n-1), g4(n-1) .... from state */
00234       gcurr1 = *px;
00235
00236       /* save g4(n) in state buffer */
00237       *px++ = (q31_t) gnext4;
00238
00239       /* Sample processing for K5, K9.... */
00240       /* Process first sample for 5th, 9th .. tap */
00241       /* f5(n) = f4(n) +  K5 * g4(n-1) */
00242       fcurr1 = (q31_t) (((q63_t) gcurr1 * (*pk)) >> 31) + fnext1;
00243       /* Process second sample for 5th, 9th .. tap */
00244       fcurr2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 31) + fnext2;
00245       /* Process third sample for 5th, 9th .. tap */
00246       fcurr3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 31) + fnext3;
00247       /* Process fourth sample for 5th, 9th .. tap */
00248       fcurr4 = (q31_t) (((q63_t) gnext3 * (*pk)) >> 31) + fnext4;
00249
00250       /* Calculation of state values for next stage */
00251       /* g5(n) = f4(n) * K5  +  g4(n-1) */
00252       gnext4 = (q31_t) (((q63_t) fnext4 * (*pk)) >> 31) + gnext3;
00253       gnext3 = (q31_t) (((q63_t) fnext3 * (*pk)) >> 31) + gnext2;
00254       gnext2 = (q31_t) (((q63_t) fnext2 * (*pk)) >> 31) + gnext1;
00255       gnext1 = (q31_t) (((q63_t) fnext1 * (*pk++)) >> 31) + gcurr1;
00256
00257       stageCnt--;
00258     }
00259
00260     /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
00261     stageCnt = (numStages - 1u) % 0x4u;
00262
00263     while(stageCnt > 0u)
00264     {
00265       gcurr1 = *px;
00266
00267       /* save g value in state buffer */
00268       *px++ = (q31_t) gnext4;
00269
00270       /* Process four samples for last three taps here */
00271       fnext1 = (q31_t) (((q63_t) gcurr1 * (*pk)) >> 31) + fcurr1;
00272       fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 31) + fcurr2;
00273       fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 31) + fcurr3;
00274       fnext4 = (q31_t) (((q63_t) gnext3 * (*pk)) >> 31) + fcurr4;
00275
00276       /* g1(n) = f0(n) * K1  +  g0(n-1) */
00277       gnext4 = (q31_t) (((q63_t) fcurr4 * (*pk)) >> 31) + gnext3;
00278       gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 31) + gnext2;
00279       gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 31) + gnext1;
00280       gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk++)) >> 31) + gcurr1;
00281
00282       /* Update of f values for next coefficient set processing */
00283       fcurr1 = fnext1;
00284       fcurr2 = fnext2;
00285       fcurr3 = fnext3;
00286       fcurr4 = fnext4;
00287
00288       stageCnt--;
00289
00290     }
00291
00292     /* The results in the 4 accumulators, store in the destination buffer. */
00293     /* y(n) = fN(n) */
00294     *pDst++ = fcurr1;
00295     *pDst++ = (q31_t) fcurr2;
00296     *pDst++ = (q31_t) fcurr3;
00297     *pDst++ = (q31_t) fcurr4;
00298
00299     blkCnt--;
00300   }
00301
00302   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00303    ** No loop unrolling is used. */
00304   blkCnt = blockSize % 0x4u;
00305
00306   while(blkCnt > 0u)
00307   {
00308     /* f0(n) = x(n) */
00309     fcurr1 = *pSrc++;
00310
00311     /* Initialize coeff pointer */
00312     pk = (pCoeffs);
00313
00314     /* Initialize state pointer */
00315     px = pState;
00316
00317     /* read g2(n) from state buffer */
00318     gcurr1 = *px;
00319
00320     /* for sample 1 processing */
00321     /* f1(n) = f0(n) +  K1 * g0(n-1) */
00322     fnext1 = (q31_t) (((q63_t) gcurr1 * (*pk)) >> 31) + fcurr1;
00323     /* g1(n) = f0(n) * K1  +  g0(n-1) */
00324     gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk++)) >> 31) + gcurr1;
00325     /* save g1(n) in state buffer */
00326     *px++ = fcurr1;
00327
00328     /* f1(n) is saved in fcurr1
00329        for next stage processing */
00330     fcurr1 = fnext1;
00331
00332     stageCnt = (numStages - 1u);
00333
00334     /* stage loop */
00335     while(stageCnt > 0u)
00336     {
00337       /* read g2(n) from state buffer */
00338       gcurr1 = *px;
00339
00340       /* save g1(n) in state buffer */
00341       *px++ = gnext1;
00342
00343       /* Sample processing for K2, K3.... */
00344       /* f2(n) = f1(n) +  K2 * g1(n-1) */
00345       fnext1 = (q31_t) (((q63_t) gcurr1 * (*pk)) >> 31) + fcurr1;
00346       /* g2(n) = f1(n) * K2  +  g1(n-1) */
00347       gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk++)) >> 31) + gcurr1;
00348
00349       /* f1(n) is saved in fcurr1
00350          for next stage processing */
00351       fcurr1 = fnext1;
00352
00353       stageCnt--;
00354
00355     }
00356
00357     /* y(n) = fN(n) */
00358     *pDst++ = fcurr1;
00359
00360     blkCnt--;
00361
00362   }
00363
00364 #else
00365
00366 /* Run the below code for Cortex-M0 */
00367
00368   q31_t fcurr, fnext, gcurr, gnext;              /* temporary variables */
00369   uint32_t numStages = S->numStages;             /* Length of the filter */
00370   uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
00371
00372   pState = &S->pState[0];
00373
00374   blkCnt = blockSize;
00375
00376   while(blkCnt > 0u)
00377   {
00378     /* f0(n) = x(n) */
00379     fcurr = *pSrc++;
00380
00381     /* Initialize coeff pointer */
00382     pk = (pCoeffs);
00383
00384     /* Initialize state pointer */
00385     px = pState;
00386
00387     /* read g0(n-1) from state buffer */
00388     gcurr = *px;
00389
00390     /* for sample 1 processing */
00391     /* f1(n) = f0(n) +  K1 * g0(n-1) */
00392     fnext = (q31_t) (((q63_t) gcurr * (*pk)) >> 31) + fcurr;
00393     /* g1(n) = f0(n) * K1  +  g0(n-1) */
00394     gnext = (q31_t) (((q63_t) fcurr * (*pk++)) >> 31) + gcurr;
00395     /* save g1(n) in state buffer */
00396     *px++ = fcurr;
00397
00398     /* f1(n) is saved in fcurr1
00399        for next stage processing */
00400     fcurr = fnext;
00401
00402     stageCnt = (numStages - 1u);
00403
00404     /* stage loop */
00405     while(stageCnt > 0u)
00406     {
00407       /* read g2(n) from state buffer */
00408       gcurr = *px;
00409
00410       /* save g1(n) in state buffer */
00411       *px++ = gnext;
00412
00413       /* Sample processing for K2, K3.... */
00414       /* f2(n) = f1(n) +  K2 * g1(n-1) */
00415       fnext = (q31_t) (((q63_t) gcurr * (*pk)) >> 31) + fcurr;
00416       /* g2(n) = f1(n) * K2  +  g1(n-1) */
00417       gnext = (q31_t) (((q63_t) fcurr * (*pk++)) >> 31) + gcurr;
00418
00419       /* f1(n) is saved in fcurr1
00420          for next stage processing */
00421       fcurr = fnext;
00422
00423       stageCnt--;
00424
00425     }
00426
00427     /* y(n) = fN(n) */
00428     *pDst++ = fcurr;
00429
00430     blkCnt--;
00431
00432   }
00433
00434 #endif /*   #ifndef ARM_MATH_CM0 */
00435
00436 }
00437
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_fir_q7.c
00009 *
00010 * Description:  Q7 FIR filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *        incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00064 void arm_fir_q7(
00065   const arm_fir_instance_q7 * S,
00066   q7_t * pSrc,
00067   q7_t * pDst,
00068   uint32_t blockSize)
00069 {
00070
00071 #ifndef ARM_MATH_CM0
00072
00073   /* Run the below code for Cortex-M4 and Cortex-M3 */
00074
00075   q7_t *pState = S->pState;                      /* State pointer */
00076   q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
00077   q7_t *pStateCurnt;                             /* Points to the current sample of the state */
00078   q7_t x0, x1, x2, x3;                           /* Temporary variables to hold state */
00079   q7_t c0;                                       /* Temporary variable to hold coefficient value */
00080   q7_t *px;                                      /* Temporary pointer for state */
00081   q7_t *pb;                                      /* Temporary pointer for coefficient buffer */
00082   q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
00083   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00084   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
00085
00086   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
00087   /* pStateCurnt points to the location where the new input data should be written */
00088   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00089
00090   /* Apply loop unrolling and compute 4 output values simultaneously.
00091    * The variables acc0 ... acc3 hold output values that are being computed:
00092    *
00093    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
00094    *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
00095    *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
00096    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
00097    */
00098   blkCnt = blockSize >> 2;
00099
00100   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00101    ** a second loop below computes the remaining 1 to 3 samples. */
00102   while(blkCnt > 0u)
00103   {
00104     /* Copy four new input samples into the state buffer */
00105     *pStateCurnt++ = *pSrc++;
00106     *pStateCurnt++ = *pSrc++;
00107     *pStateCurnt++ = *pSrc++;
00108     *pStateCurnt++ = *pSrc++;
00109
00110     /* Set all accumulators to zero */
00111     acc0 = 0;
00112     acc1 = 0;
00113     acc2 = 0;
00114     acc3 = 0;
00115
00116     /* Initialize state pointer */
00117     px = pState;
00118
00119     /* Initialize coefficient pointer */
00120     pb = pCoeffs;
00121
00122     /* Read the first three samples from the state buffer:
00123      *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
00124     x0 = *(px++);
00125     x1 = *(px++);
00126     x2 = *(px++);
00127
00128     /* Loop unrolling.  Process 4 taps at a time. */
00129     tapCnt = numTaps >> 2;
00130     i = tapCnt;
00131
00132     while(i > 0u)
00133     {
00134       /* Read the b[numTaps] coefficient */
00135       c0 = *(pb++);
00136
00137       /* Read x[n-numTaps-3] sample */
00138       x3 = *(px++);
00139
00140       /* acc0 +=  b[numTaps] * x[n-numTaps] */
00141       acc0 += ((q15_t) x0 * c0);
00142
00143       /* acc1 +=  b[numTaps] * x[n-numTaps-1] */
00144       acc1 += ((q15_t) x1 * c0);
00145
00146       /* acc2 +=  b[numTaps] * x[n-numTaps-2] */
00147       acc2 += ((q15_t) x2 * c0);
00148
00149       /* acc3 +=  b[numTaps] * x[n-numTaps-3] */
00150       acc3 += ((q15_t) x3 * c0);
00151
00152       /* Read the b[numTaps-1] coefficient */
00153       c0 = *(pb++);
00154
00155       /* Read x[n-numTaps-4] sample */
00156       x0 = *(px++);
00157
00158       /* Perform the multiply-accumulates */
00159       acc0 += ((q15_t) x1 * c0);
00160       acc1 += ((q15_t) x2 * c0);
00161       acc2 += ((q15_t) x3 * c0);
00162       acc3 += ((q15_t) x0 * c0);
00163
00164       /* Read the b[numTaps-2] coefficient */
00165       c0 = *(pb++);
00166
00167       /* Read x[n-numTaps-5] sample */
00168       x1 = *(px++);
00169
00170       /* Perform the multiply-accumulates */
00171       acc0 += ((q15_t) x2 * c0);
00172       acc1 += ((q15_t) x3 * c0);
00173       acc2 += ((q15_t) x0 * c0);
00174       acc3 += ((q15_t) x1 * c0);
00175       /* Read the b[numTaps-3] coefficients */
00176       c0 = *(pb++);
00177
00178       /* Read x[n-numTaps-6] sample */
00179       x2 = *(px++);
00180
00181       /* Perform the multiply-accumulates */
00182       acc0 += ((q15_t) x3 * c0);
00183       acc1 += ((q15_t) x0 * c0);
00184       acc2 += ((q15_t) x1 * c0);
00185       acc3 += ((q15_t) x2 * c0);
00186       i--;
00187     }
00188
00189     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00190
00191     i = numTaps - (tapCnt * 4u);
00192     while(i > 0u)
00193     {
00194       /* Read coefficients */
00195       c0 = *(pb++);
00196
00197       /* Fetch 1 state variable */
00198       x3 = *(px++);
00199
00200       /* Perform the multiply-accumulates */
00201       acc0 += ((q15_t) x0 * c0);
00202       acc1 += ((q15_t) x1 * c0);
00203       acc2 += ((q15_t) x2 * c0);
00204       acc3 += ((q15_t) x3 * c0);
00205
00206       /* Reuse the present sample states for next sample */
00207       x0 = x1;
00208       x1 = x2;
00209       x2 = x3;
00210
00211       /* Decrement the loop counter */
00212       i--;
00213     }
00214
00215     /* Advance the state pointer by 4 to process the next group of 4 samples */
00216     pState = pState + 4;
00217
00218     /* The results in the 4 accumulators are in 2.62 format.  Convert to 1.31
00219      ** Then store the 4 outputs in the destination buffer. */
00220     acc0 = __SSAT((acc0 >> 7u), 8);
00221     *pDst++ = acc0;
00222     acc1 = __SSAT((acc1 >> 7u), 8);
00223     *pDst++ = acc1;
00224     acc2 = __SSAT((acc2 >> 7u), 8);
00225     *pDst++ = acc2;
00226     acc3 = __SSAT((acc3 >> 7u), 8);
00227     *pDst++ = acc3;
00228
00229     /* Decrement the samples loop counter */
00230     blkCnt--;
00231   }
00232
00233
00234   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00235    ** No loop unrolling is used. */
00236   blkCnt = blockSize % 4u;
00237
00238   while(blkCnt > 0u)
00239   {
00240     /* Copy one sample at a time into state buffer */
00241     *pStateCurnt++ = *pSrc++;
00242
00243     /* Set the accumulator to zero */
00244     acc0 = 0;
00245
00246     /* Initialize state pointer */
00247     px = pState;
00248
00249     /* Initialize Coefficient pointer */
00250     pb = (pCoeffs);
00251
00252     i = numTaps;
00253
00254     /* Perform the multiply-accumulates */
00255     do
00256     {
00257       acc0 += (q15_t) * (px++) * (*(pb++));
00258       i--;
00259     } while(i > 0u);
00260
00261     /* The result is in 2.14 format.  Convert to 1.7
00262      ** Then store the output in the destination buffer. */
00263     *pDst++ = __SSAT((acc0 >> 7u), 8);
00264
00265     /* Advance state pointer by 1 for the next sample */
00266     pState = pState + 1;
00267
00268     /* Decrement the samples loop counter */
00269     blkCnt--;
00270   }
00271
00272   /* Processing is complete.
00273    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00274    ** This prepares the state buffer for the next function call. */
00275
00276   /* Points to the start of the state buffer */
00277   pStateCurnt = S->pState;
00278
00279   tapCnt = (numTaps - 1u) >> 2u;
00280
00281   /* copy data */
00282   while(tapCnt > 0u)
00283   {
00284     *pStateCurnt++ = *pState++;
00285     *pStateCurnt++ = *pState++;
00286     *pStateCurnt++ = *pState++;
00287     *pStateCurnt++ = *pState++;
00288
00289     /* Decrement the loop counter */
00290     tapCnt--;
00291   }
00292
00293   /* Calculate remaining number of copies */
00294   tapCnt = (numTaps - 1u) % 0x4u;
00295
00296   /* Copy the remaining q31_t data */
00297   while(tapCnt > 0u)
00298   {
00299     *pStateCurnt++ = *pState++;
00300
00301     /* Decrement the loop counter */
00302     tapCnt--;
00303   }
00304
00305 #else
00306
00307 /* Run the below code for Cortex-M0 */
00308
00309   uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
00310   uint32_t i, blkCnt;                            /* Loop counters */
00311   q7_t *pState = S->pState;                      /* State pointer */
00312   q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
00313   q7_t *px, *pb;                                 /* Temporary pointers to state and coeff */
00314   q31_t acc = 0;                                 /* Accumlator */
00315   q7_t *pStateCurnt;                             /* Points to the current sample of the state */
00316
00317
00318   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
00319   /* pStateCurnt points to the location where the new input data should be written */
00320   pStateCurnt = S->pState + (numTaps - 1u);
00321
00322   /* Initialize blkCnt with blockSize */
00323   blkCnt = blockSize;
00324
00325   /* Perform filtering upto BlockSize - BlockSize%4  */
00326   while(blkCnt > 0u)
00327   {
00328     /* Copy one sample at a time into state buffer */
00329     *pStateCurnt++ = *pSrc++;
00330
00331     /* Set accumulator to zero */
00332     acc = 0;
00333
00334     /* Initialize state pointer of type q7 */
00335     px = pState;
00336
00337     /* Initialize coeff pointer of type q7 */
00338     pb = pCoeffs;
00339
00340
00341     i = numTaps;
00342
00343     while(i > 0u)
00344     {
00345       /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
00346       acc += (q15_t) * px++ * *pb++;
00347       i--;
00348     }
00349
00350     /* Store the 1.7 format filter output in destination buffer */
00351     *pDst++ = (q7_t) __SSAT((acc >> 7), 8);
00352
00353     /* Advance the state pointer by 1 to process the next sample */
00354     pState = pState + 1;
00355
00356     /* Decrement the loop counter */
00357     blkCnt--;
00358   }
00359
00360   /* Processing is complete.
00361    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00362    ** This prepares the state buffer for the next function call. */
00363
00364
00365   /* Points to the start of the state buffer */
00366   pStateCurnt = S->pState;
00367
00368
00369   /* Copy numTaps number of values */
00370   i = (numTaps - 1u);
00371
00372   /* Copy q7_t data */
00373   while(i > 0u)
00374   {
00375     *pStateCurnt++ = *pState++;
00376     i--;
00377   }
00378
00379 #endif /*   #ifndef ARM_MATH_CM0 */
00380
00381 }
00382
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_fir_q15.c
00009 *
00010 * Description:  Q15 FIR filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *        incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00068 void arm_fir_q15(
00069   const arm_fir_instance_q15 * S,
00070   q15_t * pSrc,
00071   q15_t * pDst,
00072   uint32_t blockSize)
00073 {
00074   q15_t *pState = S->pState;                     /* State pointer */
00075   q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00076   q15_t *pStateCurnt;                            /* Points to the current sample of the state */
00077
00078
00079 #ifndef ARM_MATH_CM0
00080
00081   /* Run the below code for Cortex-M4 and Cortex-M3 */
00082
00083   q15_t *px1;                                    /* Temporary q15 pointer for state buffer */
00084   q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
00085   q31_t *px2;                                    /* Temporary q31 pointer for SIMD state buffer accesses */
00086   q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold SIMD state and coefficient values */
00087   q63_t acc0, acc1, acc2, acc3;                  /* Accumulators */
00088   uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
00089   uint32_t tapCnt, blkCnt;                       /* Loop counters */
00090
00091   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
00092   /* pStateCurnt points to the location where the new input data should be written */
00093   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00094
00095   /* Apply loop unrolling and compute 4 output values simultaneously.
00096    * The variables acc0 ... acc3 hold output values that are being computed:
00097    *
00098    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
00099    *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
00100    *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
00101    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
00102    */
00103   blkCnt = blockSize >> 2;
00104
00105   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00106    ** a second loop below computes the remaining 1 to 3 samples. */
00107   while(blkCnt > 0u)
00108   {
00109     /* Copy four new input samples into the state buffer.
00110      ** Use 32-bit SIMD to move the 16-bit data.  Only requires two copies. */
00111     *__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++;
00112     *__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++;
00113
00114     /* Set all accumulators to zero */
00115     acc0 = 0;
00116     acc1 = 0;
00117     acc2 = 0;
00118     acc3 = 0;
00119
00120     /* Initialize state pointer of type q15 */
00121     px1 = pState;
00122
00123     /* Initialize coeff pointer of type q31 */
00124     pb = (q31_t *) (pCoeffs);
00125
00126     /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
00127     x0 = *(q31_t *) (px1++);
00128
00129     /* Read the third and forth samples from the state buffer: x[n-N-1], x[n-N-2] */
00130     x1 = *(q31_t *) (px1++);
00131
00132     /* Loop over the number of taps.  Unroll by a factor of 4.
00133      ** Repeat until we've computed numTaps-4 coefficients. */
00134     tapCnt = numTaps >> 2;
00135     do
00136     {
00137       /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
00138       c0 = *(pb++);
00139
00140       /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
00141       acc0 = __SMLALD(x0, c0, acc0);
00142
00143       /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
00144       acc1 = __SMLALD(x1, c0, acc1);
00145
00146       /* Read state x[n-N-2], x[n-N-3] */
00147       x2 = *(q31_t *) (px1++);
00148
00149       /* Read state x[n-N-3], x[n-N-4] */
00150       x3 = *(q31_t *) (px1++);
00151
00152       /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
00153       acc2 = __SMLALD(x2, c0, acc2);
00154
00155       /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
00156       acc3 = __SMLALD(x3, c0, acc3);
00157
00158       /* Read coefficients b[N-2], b[N-3] */
00159       c0 = *(pb++);
00160
00161       /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
00162       acc0 = __SMLALD(x2, c0, acc0);
00163
00164       /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
00165       acc1 = __SMLALD(x3, c0, acc1);
00166
00167       /* Read state x[n-N-4], x[n-N-5] */
00168       x0 = *(q31_t *) (px1++);
00169
00170       /* Read state x[n-N-5], x[n-N-6] */
00171       x1 = *(q31_t *) (px1++);
00172
00173       /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
00174       acc2 = __SMLALD(x0, c0, acc2);
00175
00176       /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
00177       acc3 = __SMLALD(x1, c0, acc3);
00178       tapCnt--;
00179
00180     }
00181     while(tapCnt > 0u);
00182
00183     /* If the filter length is not a multiple of 4, compute the remaining filter taps.
00184      ** This is always be 2 taps since the filter length is even. */
00185     if((numTaps & 0x3u) != 0u)
00186     {
00187       /* Read 2 coefficients */
00188       c0 = *(pb++);
00189       /* Fetch 4 state variables */
00190       x2 = *(q31_t *) (px1++);
00191       x3 = *(q31_t *) (px1++);
00192
00193       /* Perform the multiply-accumulates */
00194       acc0 = __SMLALD(x0, c0, acc0);
00195       acc1 = __SMLALD(x1, c0, acc1);
00196       acc2 = __SMLALD(x2, c0, acc2);
00197       acc3 = __SMLALD(x3, c0, acc3);
00198     }
00199
00200     /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.15 with saturation.
00201      ** Then store the 4 outputs in the destination buffer. */
00202
00203 #ifndef ARM_MATH_BIG_ENDIAN
00204
00205     *__SIMD32(pDst)++ =
00206       __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
00207     *__SIMD32(pDst)++ =
00208       __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
00209
00210 #else
00211
00212     *__SIMD32(pDst)++ =
00213       __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
00214     *__SIMD32(pDst)++ =
00215       __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
00216
00217 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
00218
00219     /* Advance the state pointer by 4 to process the next group of 4 samples */
00220     pState = pState + 4;
00221
00222     /* Decrement the loop counter */
00223     blkCnt--;
00224   }
00225
00226   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00227    ** No loop unrolling is used. */
00228   blkCnt = blockSize % 0x4u;
00229   while(blkCnt > 0u)
00230   {
00231     /* Copy two samples into state buffer */
00232     *pStateCurnt++ = *pSrc++;
00233
00234     /* Set the accumulator to zero */
00235     acc0 = 0;
00236
00237     /* Use SIMD to hold states and coefficients */
00238     px2 = (q31_t *) pState;
00239     pb = (q31_t *) (pCoeffs);
00240     tapCnt = numTaps >> 1;
00241
00242     do
00243     {
00244       acc0 = __SMLALD(*px2++, *(pb++), acc0);
00245       tapCnt--;
00246     }
00247     while(tapCnt > 0u);
00248
00249     /* The result is in 2.30 format.  Convert to 1.15 with saturation.
00250      ** Then store the output in the destination buffer. */
00251     *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
00252
00253     /* Advance state pointer by 1 for the next sample */
00254     pState = pState + 1;
00255
00256     /* Decrement the loop counter */
00257     blkCnt--;
00258   }
00259
00260   /* Processing is complete.
00261    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00262    ** This prepares the state buffer for the next function call. */
00263
00264   /* Points to the start of the state buffer */
00265   pStateCurnt = S->pState;
00266
00267   /* Calculation of count for copying integer writes */
00268   tapCnt = (numTaps - 1u) >> 2;
00269
00270   while(tapCnt > 0u)
00271   {
00272     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00273     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00274
00275     tapCnt--;
00276
00277   }
00278
00279   /* Calculation of count for remaining q15_t data */
00280   tapCnt = (numTaps - 1u) % 0x4u;
00281
00282   /* copy remaining data */
00283   while(tapCnt > 0u)
00284   {
00285     *pStateCurnt++ = *pState++;
00286
00287     /* Decrement the loop counter */
00288     tapCnt--;
00289   }
00290
00291 #else
00292
00293   /* Run the below code for Cortex-M0 */
00294
00295   q15_t *px;                                     /* Temporary pointer for state buffer */
00296   q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
00297   q63_t acc;                                     /* Accumulator */
00298   uint32_t numTaps = S->numTaps;                 /* Number of nTaps in the filter */
00299   uint32_t tapCnt, blkCnt;                       /* Loop counters */
00300
00301   /* S->pState buffer contains previous frame (numTaps - 1) samples */
00302   /* pStateCurnt points to the location where the new input data should be written */
00303   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00304
00305   /* Initialize blkCnt with blockSize */
00306   blkCnt = blockSize;
00307
00308   while(blkCnt > 0u)
00309   {
00310     /* Copy one sample at a time into state buffer */
00311     *pStateCurnt++ = *pSrc++;
00312
00313     /* Set the accumulator to zero */
00314     acc = 0;
00315
00316     /* Initialize state pointer */
00317     px = pState;
00318
00319     /* Initialize Coefficient pointer */
00320     pb = pCoeffs;
00321
00322     tapCnt = numTaps;
00323
00324     /* Perform the multiply-accumulates */
00325     do
00326     {
00327       /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
00328       acc += (q31_t) * px++ * *pb++;
00329       tapCnt--;
00330     } while(tapCnt > 0u);
00331
00332     /* The result is in 2.30 format.  Convert to 1.15
00333      ** Then store the output in the destination buffer. */
00334     *pDst++ = (q15_t) __SSAT((acc >> 15u), 16);
00335
00336     /* Advance state pointer by 1 for the next sample */
00337     pState = pState + 1;
00338
00339     /* Decrement the samples loop counter */
00340     blkCnt--;
00341   }
00342
00343   /* Processing is complete.
00344    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00345    ** This prepares the state buffer for the next function call. */
00346
00347   /* Points to the start of the state buffer */
00348   pStateCurnt = S->pState;
00349
00350   /* Copy numTaps number of values */
00351   tapCnt = (numTaps - 1u);
00352
00353   /* copy data */
00354   while(tapCnt > 0u)
00355   {
00356     *pStateCurnt++ = *pState++;
00357
00358     /* Decrement the loop counter */
00359     tapCnt--;
00360   }
00361
00362 #endif /* #ifndef ARM_MATH_CM0 */
00363
00364 }
00365
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_fir_q31.c
00009 *
00010 * Description:  Q31 FIR filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *        incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00067 void arm_fir_q31(
00068   const arm_fir_instance_q31 * S,
00069   q31_t * pSrc,
00070   q31_t * pDst,
00071   uint32_t blockSize)
00072 {
00073   q31_t *pState = S->pState;                     /* State pointer */
00074   q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00075   q31_t *pStateCurnt;                            /* Points to the current sample of the state */
00076
00077
00078 #ifndef ARM_MATH_CM0
00079
00080   /* Run the below code for Cortex-M4 and Cortex-M3 */
00081
00082   q31_t x0, x1, x2, x3;                          /* Temporary variables to hold state */
00083   q31_t c0;                                      /* Temporary variable to hold coefficient value */
00084   q31_t *px;                                     /* Temporary pointer for state */
00085   q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
00086   q63_t acc0, acc1, acc2, acc3;                  /* Accumulators */
00087   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00088   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
00089
00090   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
00091   /* pStateCurnt points to the location where the new input data should be written */
00092   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00093
00094   /* Apply loop unrolling and compute 4 output values simultaneously.
00095    * The variables acc0 ... acc3 hold output values that are being computed:
00096    *
00097    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
00098    *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
00099    *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
00100    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
00101    */
00102   blkCnt = blockSize >> 2;
00103
00104   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00105    ** a second loop below computes the remaining 1 to 3 samples. */
00106   while(blkCnt > 0u)
00107   {
00108     /* Copy four new input samples into the state buffer */
00109     *pStateCurnt++ = *pSrc++;
00110     *pStateCurnt++ = *pSrc++;
00111     *pStateCurnt++ = *pSrc++;
00112     *pStateCurnt++ = *pSrc++;
00113
00114     /* Set all accumulators to zero */
00115     acc0 = 0;
00116     acc1 = 0;
00117     acc2 = 0;
00118     acc3 = 0;
00119
00120     /* Initialize state pointer */
00121     px = pState;
00122
00123     /* Initialize coefficient pointer */
00124     pb = pCoeffs;
00125
00126     /* Read the first three samples from the state buffer:
00127      *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
00128     x0 = *(px++);
00129     x1 = *(px++);
00130     x2 = *(px++);
00131
00132     /* Loop unrolling.  Process 4 taps at a time. */
00133     tapCnt = numTaps >> 2;
00134     i = tapCnt;
00135
00136     while(i > 0u)
00137     {
00138       /* Read the b[numTaps] coefficient */
00139       c0 = *(pb++);
00140
00141       /* Read x[n-numTaps-3] sample */
00142       x3 = *(px++);
00143
00144       /* acc0 +=  b[numTaps] * x[n-numTaps] */
00145       acc0 += ((q63_t) x0 * c0);
00146
00147       /* acc1 +=  b[numTaps] * x[n-numTaps-1] */
00148       acc1 += ((q63_t) x1 * c0);
00149
00150       /* acc2 +=  b[numTaps] * x[n-numTaps-2] */
00151       acc2 += ((q63_t) x2 * c0);
00152
00153       /* acc3 +=  b[numTaps] * x[n-numTaps-3] */
00154       acc3 += ((q63_t) x3 * c0);
00155
00156       /* Read the b[numTaps-1] coefficient */
00157       c0 = *(pb++);
00158
00159       /* Read x[n-numTaps-4] sample */
00160       x0 = *(px++);
00161
00162       /* Perform the multiply-accumulates */
00163       acc0 += ((q63_t) x1 * c0);
00164       acc1 += ((q63_t) x2 * c0);
00165       acc2 += ((q63_t) x3 * c0);
00166       acc3 += ((q63_t) x0 * c0);
00167
00168       /* Read the b[numTaps-2] coefficient */
00169       c0 = *(pb++);
00170
00171       /* Read x[n-numTaps-5] sample */
00172       x1 = *(px++);
00173
00174       /* Perform the multiply-accumulates */
00175       acc0 += ((q63_t) x2 * c0);
00176       acc1 += ((q63_t) x3 * c0);
00177       acc2 += ((q63_t) x0 * c0);
00178       acc3 += ((q63_t) x1 * c0);
00179       /* Read the b[numTaps-3] coefficients */
00180       c0 = *(pb++);
00181
00182       /* Read x[n-numTaps-6] sample */
00183       x2 = *(px++);
00184
00185       /* Perform the multiply-accumulates */
00186       acc0 += ((q63_t) x3 * c0);
00187       acc1 += ((q63_t) x0 * c0);
00188       acc2 += ((q63_t) x1 * c0);
00189       acc3 += ((q63_t) x2 * c0);
00190       i--;
00191     }
00192
00193     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00194
00195     i = numTaps - (tapCnt * 4u);
00196     while(i > 0u)
00197     {
00198       /* Read coefficients */
00199       c0 = *(pb++);
00200
00201       /* Fetch 1 state variable */
00202       x3 = *(px++);
00203
00204       /* Perform the multiply-accumulates */
00205       acc0 += ((q63_t) x0 * c0);
00206       acc1 += ((q63_t) x1 * c0);
00207       acc2 += ((q63_t) x2 * c0);
00208       acc3 += ((q63_t) x3 * c0);
00209
00210       /* Reuse the present sample states for next sample */
00211       x0 = x1;
00212       x1 = x2;
00213       x2 = x3;
00214
00215       /* Decrement the loop counter */
00216       i--;
00217     }
00218
00219     /* Advance the state pointer by 4 to process the next group of 4 samples */
00220     pState = pState + 4;
00221
00222     /* The results in the 4 accumulators are in 2.62 format.  Convert to 1.31
00223      ** Then store the 4 outputs in the destination buffer. */
00224     *pDst++ = (q31_t) (acc0 >> 31u);
00225     *pDst++ = (q31_t) (acc1 >> 31u);
00226     *pDst++ = (q31_t) (acc2 >> 31u);
00227     *pDst++ = (q31_t) (acc3 >> 31u);
00228
00229     /* Decrement the samples loop counter */
00230     blkCnt--;
00231   }
00232
00233
00234   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00235    ** No loop unrolling is used. */
00236   blkCnt = blockSize % 4u;
00237
00238   while(blkCnt > 0u)
00239   {
00240     /* Copy one sample at a time into state buffer */
00241     *pStateCurnt++ = *pSrc++;
00242
00243     /* Set the accumulator to zero */
00244     acc0 = 0;
00245
00246     /* Initialize state pointer */
00247     px = pState;
00248
00249     /* Initialize Coefficient pointer */
00250     pb = (pCoeffs);
00251
00252     i = numTaps;
00253
00254     /* Perform the multiply-accumulates */
00255     do
00256     {
00257       acc0 += (q63_t) * (px++) * (*(pb++));
00258       i--;
00259     } while(i > 0u);
00260
00261     /* The result is in 2.62 format.  Convert to 1.31
00262      ** Then store the output in the destination buffer. */
00263     *pDst++ = (q31_t) (acc0 >> 31u);
00264
00265     /* Advance state pointer by 1 for the next sample */
00266     pState = pState + 1;
00267
00268     /* Decrement the samples loop counter */
00269     blkCnt--;
00270   }
00271
00272   /* Processing is complete.
00273    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00274    ** This prepares the state buffer for the next function call. */
00275
00276   /* Points to the start of the state buffer */
00277   pStateCurnt = S->pState;
00278
00279   tapCnt = (numTaps - 1u) >> 2u;
00280
00281   /* copy data */
00282   while(tapCnt > 0u)
00283   {
00284     *pStateCurnt++ = *pState++;
00285     *pStateCurnt++ = *pState++;
00286     *pStateCurnt++ = *pState++;
00287     *pStateCurnt++ = *pState++;
00288
00289     /* Decrement the loop counter */
00290     tapCnt--;
00291   }
00292
00293   /* Calculate remaining number of copies */
00294   tapCnt = (numTaps - 1u) % 0x4u;
00295
00296   /* Copy the remaining q31_t data */
00297   while(tapCnt > 0u)
00298   {
00299     *pStateCurnt++ = *pState++;
00300
00301     /* Decrement the loop counter */
00302     tapCnt--;
00303   }
00304
00305 #else
00306
00307 /* Run the below code for Cortex-M0 */
00308
00309   q31_t *px;                                     /* Temporary pointer for state */
00310   q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
00311   q63_t acc;                                     /* Accumulator */
00312   uint32_t numTaps = S->numTaps;                 /* Length of the filter */
00313   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
00314
00315   /* S->pState buffer contains previous frame (numTaps - 1) samples */
00316   /* pStateCurnt points to the location where the new input data should be written */
00317   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00318
00319   /* Initialize blkCnt with blockSize */
00320   blkCnt = blockSize;
00321
00322   while(blkCnt > 0u)
00323   {
00324     /* Copy one sample at a time into state buffer */
00325     *pStateCurnt++ = *pSrc++;
00326
00327     /* Set the accumulator to zero */
00328     acc = 0;
00329
00330     /* Initialize state pointer */
00331     px = pState;
00332
00333     /* Initialize Coefficient pointer */
00334     pb = pCoeffs;
00335
00336     i = numTaps;
00337
00338     /* Perform the multiply-accumulates */
00339     do
00340     {
00341       /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
00342       acc += (q63_t) * px++ * *pb++;
00343       i--;
00344     } while(i > 0u);
00345
00346     /* The result is in 2.62 format.  Convert to 1.31
00347      ** Then store the output in the destination buffer. */
00348     *pDst++ = (q31_t) (acc >> 31u);
00349
00350     /* Advance state pointer by 1 for the next sample */
00351     pState = pState + 1;
00352
00353     /* Decrement the samples loop counter */
00354     blkCnt--;
00355   }
00356
00357   /* Processing is complete.
00358    ** Now copy the last numTaps - 1 samples to the starting of the state buffer.
00359    ** This prepares the state buffer for the next function call. */
00360
00361   /* Points to the start of the state buffer */
00362   pStateCurnt = S->pState;
00363
00364   /* Copy numTaps number of values */
00365   tapCnt = numTaps - 1u;
00366
00367   /* Copy the data */
00368   while(tapCnt > 0u)
00369   {
00370     *pStateCurnt++ = *pState++;
00371
00372     /* Decrement the loop counter */
00373     tapCnt--;
00374   }
00375
00376
00377 #endif /*  #ifndef ARM_MATH_CM0 */
00378
00379 }
00380
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_fir_sparse_f32.c
00009 *
00010 * Description:  Floating-point sparse FIR filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ------------------------------------------------------------------- */
00032 #include "arm_math.h"
00033
00113 void arm_fir_sparse_f32(
00114   arm_fir_sparse_instance_f32 * S,
00115   float32_t * pSrc,
00116   float32_t * pDst,
00117   float32_t * pScratchIn,
00118   uint32_t blockSize)
00119 {
00120
00121   float32_t *pState = S->pState;                 /* State pointer */
00122   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
00123   float32_t *px;                                 /* Scratch buffer pointer */
00124   float32_t *py = pState;                        /* Temporary pointers for state buffer */
00125   float32_t *pb = pScratchIn;                    /* Temporary pointers for scratch buffer */
00126   float32_t *pOut;                               /* Destination pointer */
00127   int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
00128   uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
00129   uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
00130   int32_t readIndex;                             /* Read index of the state buffer */
00131   uint32_t tapCnt, blkCnt;                       /* loop counters */
00132   float32_t coeff = *pCoeffs++;                  /* Read the first coefficient value */
00133
00134
00135
00136   /* BlockSize of Input samples are copied into the state buffer */
00137   /* StateIndex points to the starting position to write in the state buffer */
00138   arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1,
00139                         (int32_t *) pSrc, 1, blockSize);
00140
00141
00142   /* Read Index, from where the state buffer should be read, is calculated. */
00143   readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
00144
00145   /* Wraparound of readIndex */
00146   if(readIndex < 0)
00147   {
00148     readIndex += (int32_t) delaySize;
00149   }
00150
00151   /* Working pointer for state buffer is updated */
00152   py = pState;
00153
00154   /* blockSize samples are read from the state buffer */
00155   arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
00156                        (int32_t *) pb, (int32_t *) pb, blockSize, 1,
00157                        blockSize);
00158
00159   /* Working pointer for the scratch buffer */
00160   px = pb;
00161
00162   /* Working pointer for destination buffer */
00163   pOut = pDst;
00164
00165
00166 #ifndef ARM_MATH_CM0
00167
00168   /* Run the below code for Cortex-M4 and Cortex-M3 */
00169
00170   /* Loop over the blockSize. Unroll by a factor of 4.
00171    * Compute 4 Multiplications at a time. */
00172   blkCnt = blockSize >> 2u;
00173
00174   while(blkCnt > 0u)
00175   {
00176     /* Perform Multiplications and store in destination buffer */
00177     *pOut++ = *px++ * coeff;
00178     *pOut++ = *px++ * coeff;
00179     *pOut++ = *px++ * coeff;
00180     *pOut++ = *px++ * coeff;
00181
00182     /* Decrement the loop counter */
00183     blkCnt--;
00184   }
00185
00186   /* If the blockSize is not a multiple of 4,
00187    * compute the remaining samples */
00188   blkCnt = blockSize % 0x4u;
00189
00190   while(blkCnt > 0u)
00191   {
00192     /* Perform Multiplications and store in destination buffer */
00193     *pOut++ = *px++ * coeff;
00194
00195     /* Decrement the loop counter */
00196     blkCnt--;
00197   }
00198
00199   /* Load the coefficient value and
00200    * increment the coefficient buffer for the next set of state values */
00201   coeff = *pCoeffs++;
00202
00203   /* Read Index, from where the state buffer should be read, is calculated. */
00204   readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
00205
00206   /* Wraparound of readIndex */
00207   if(readIndex < 0)
00208   {
00209     readIndex += (int32_t) delaySize;
00210   }
00211
00212   /* Loop over the number of taps. */
00213   tapCnt = (uint32_t) numTaps - 1u;
00214
00215   while(tapCnt > 0u)
00216   {
00217
00218     /* Working pointer for state buffer is updated */
00219     py = pState;
00220
00221     /* blockSize samples are read from the state buffer */
00222     arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
00223                          (int32_t *) pb, (int32_t *) pb, blockSize, 1,
00224                          blockSize);
00225
00226     /* Working pointer for the scratch buffer */
00227     px = pb;
00228
00229     /* Working pointer for destination buffer */
00230     pOut = pDst;
00231
00232     /* Loop over the blockSize. Unroll by a factor of 4.
00233      * Compute 4 MACS at a time. */
00234     blkCnt = blockSize >> 2u;
00235
00236     while(blkCnt > 0u)
00237     {
00238       /* Perform Multiply-Accumulate */
00239       *pOut++ += *px++ * coeff;
00240       *pOut++ += *px++ * coeff;
00241       *pOut++ += *px++ * coeff;
00242       *pOut++ += *px++ * coeff;
00243
00244       /* Decrement the loop counter */
00245       blkCnt--;
00246     }
00247
00248     /* If the blockSize is not a multiple of 4,
00249      * compute the remaining samples */
00250     blkCnt = blockSize % 0x4u;
00251
00252     while(blkCnt > 0u)
00253     {
00254       /* Perform Multiply-Accumulate */
00255       *pOut++ += *px++ * coeff;
00256
00257       /* Decrement the loop counter */
00258       blkCnt--;
00259     }
00260
00261     /* Load the coefficient value and
00262      * increment the coefficient buffer for the next set of state values */
00263     coeff = *pCoeffs++;
00264
00265     /* Read Index, from where the state buffer should be read, is calculated. */
00266     readIndex = ((int32_t) S->stateIndex -
00267                  (int32_t) blockSize) - *pTapDelay++;
00268
00269     /* Wraparound of readIndex */
00270     if(readIndex < 0)
00271     {
00272       readIndex += (int32_t) delaySize;
00273     }
00274
00275     /* Decrement the tap loop counter */
00276     tapCnt--;
00277   }
00278
00279 #else
00280
00281 /* Run the below code for Cortex-M0 */
00282
00283   blkCnt = blockSize;
00284
00285   while(blkCnt > 0u)
00286   {
00287     /* Perform Multiplications and store in destination buffer */
00288     *pOut++ = *px++ * coeff;
00289
00290     /* Decrement the loop counter */
00291     blkCnt--;
00292   }
00293
00294   /* Load the coefficient value and
00295    * increment the coefficient buffer for the next set of state values */
00296   coeff = *pCoeffs++;
00297
00298   /* Read Index, from where the state buffer should be read, is calculated. */
00299   readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
00300
00301   /* Wraparound of readIndex */
00302   if(readIndex < 0)
00303   {
00304     readIndex += (int32_t) delaySize;
00305   }
00306
00307   /* Loop over the number of taps. */
00308   tapCnt = (uint32_t) numTaps - 1u;
00309
00310   while(tapCnt > 0u)
00311   {
00312
00313     /* Working pointer for state buffer is updated */
00314     py = pState;
00315
00316     /* blockSize samples are read from the state buffer */
00317     arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
00318                          (int32_t *) pb, (int32_t *) pb, blockSize, 1,
00319                          blockSize);
00320
00321     /* Working pointer for the scratch buffer */
00322     px = pb;
00323
00324     /* Working pointer for destination buffer */
00325     pOut = pDst;
00326
00327     blkCnt = blockSize;
00328
00329     while(blkCnt > 0u)
00330     {
00331       /* Perform Multiply-Accumulate */
00332       *pOut++ += *px++ * coeff;
00333
00334       /* Decrement the loop counter */
00335       blkCnt--;
00336     }
00337
00338     /* Load the coefficient value and
00339      * increment the coefficient buffer for the next set of state values */
00340     coeff = *pCoeffs++;
00341
00342     /* Read Index, from where the state buffer should be read, is calculated. */
00343     readIndex =
00344       ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
00345
00346     /* Wraparound of readIndex */
00347     if(readIndex < 0)
00348     {
00349       readIndex += (int32_t) delaySize;
00350     }
00351
00352     /* Decrement the tap loop counter */
00353     tapCnt--;
00354   }
00355
00356 #endif /*   #ifndef ARM_MATH_CM0        */
00357
00358 }
00359
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_fir_sparse_init_f32.c
00009 *
00010 * Description:  Floating-point sparse FIR filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00065 void arm_fir_sparse_init_f32(
00066   arm_fir_sparse_instance_f32 * S,
00067   uint16_t numTaps,
00068   float32_t * pCoeffs,
00069   float32_t * pState,
00070   int32_t * pTapDelay,
00071   uint16_t maxDelay,
00072   uint32_t blockSize)
00073 {
00074   /* Assign filter taps */
00075   S->numTaps = numTaps;
00076
00077   /* Assign coefficient pointer */
00078   S->pCoeffs = pCoeffs;
00079
00080   /* Assign TapDelay pointer */
00081   S->pTapDelay = pTapDelay;
00082
00083   /* Assign MaxDelay */
00084   S->maxDelay = maxDelay;
00085
00086   /* reset the stateIndex to 0 */
00087   S->stateIndex = 0u;
00088
00089   /* Clear state buffer and size is always maxDelay + blockSize */
00090   memset(pState, 0, (maxDelay + blockSize) * sizeof(float32_t));
00091
00092   /* Assign state pointer */
00093   S->pState = pState;
00094
00095 }
00096
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_fir_sparse_init_q7.c
00009 *
00010 * Description:  Q7 sparse FIR filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00065 void arm_fir_sparse_init_q7(
00066   arm_fir_sparse_instance_q7 * S,
00067   uint16_t numTaps,
00068   q7_t * pCoeffs,
00069   q7_t * pState,
00070   int32_t * pTapDelay,
00071   uint16_t maxDelay,
00072   uint32_t blockSize)
00073 {
00074   /* Assign filter taps */
00075   S->numTaps = numTaps;
00076
00077   /* Assign coefficient pointer */
00078   S->pCoeffs = pCoeffs;
00079
00080   /* Assign TapDelay pointer */
00081   S->pTapDelay = pTapDelay;
00082
00083   /* Assign MaxDelay */
00084   S->maxDelay = maxDelay;
00085
00086   /* reset the stateIndex to 0 */
00087   S->stateIndex = 0u;
00088
00089   /* Clear state buffer and size is always maxDelay + blockSize */
00090   memset(pState, 0, (maxDelay + blockSize) * sizeof(q7_t));
00091
00092   /* Assign state pointer */
00093   S->pState = pState;
00094
00095 }
00096
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_fir_sparse_init_q15.c
00009 *
00010 * Description:  Q15 sparse FIR filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00065 void arm_fir_sparse_init_q15(
00066   arm_fir_sparse_instance_q15 * S,
00067   uint16_t numTaps,
00068   q15_t * pCoeffs,
00069   q15_t * pState,
00070   int32_t * pTapDelay,
00071   uint16_t maxDelay,
00072   uint32_t blockSize)
00073 {
00074   /* Assign filter taps */
00075   S->numTaps = numTaps;
00076
00077   /* Assign coefficient pointer */
00078   S->pCoeffs = pCoeffs;
00079
00080   /* Assign TapDelay pointer */
00081   S->pTapDelay = pTapDelay;
00082
00083   /* Assign MaxDelay */
00084   S->maxDelay = maxDelay;
00085
00086   /* reset the stateIndex to 0 */
00087   S->stateIndex = 0u;
00088
00089   /* Clear state buffer and size is always maxDelay + blockSize */
00090   memset(pState, 0, (maxDelay + blockSize) * sizeof(q15_t));
00091
00092   /* Assign state pointer */
00093   S->pState = pState;
00094
00095 }
00096
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_fir_sparse_init_q31.c
00009 *
00010 * Description:  Q31 sparse FIR filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00064 void arm_fir_sparse_init_q31(
00065   arm_fir_sparse_instance_q31 * S,
00066   uint16_t numTaps,
00067   q31_t * pCoeffs,
00068   q31_t * pState,
00069   int32_t * pTapDelay,
00070   uint16_t maxDelay,
00071   uint32_t blockSize)
00072 {
00073   /* Assign filter taps */
00074   S->numTaps = numTaps;
00075
00076   /* Assign coefficient pointer */
00077   S->pCoeffs = pCoeffs;
00078
00079   /* Assign TapDelay pointer */
00080   S->pTapDelay = pTapDelay;
00081
00082   /* Assign MaxDelay */
00083   S->maxDelay = maxDelay;
00084
00085   /* reset the stateIndex to 0 */
00086   S->stateIndex = 0u;
00087
00088   /* Clear state buffer and size is always maxDelay + blockSize */
00089   memset(pState, 0, (maxDelay + blockSize) * sizeof(q31_t));
00090
00091   /* Assign state pointer */
00092   S->pState = pState;
00093
00094 }
00095
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_fir_sparse_q7.c
00009 *
00010 * Description:  Q7 sparse FIR filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ------------------------------------------------------------------- */
00032 #include "arm_math.h"
00033
00034
00065 void arm_fir_sparse_q7(
00066   arm_fir_sparse_instance_q7 * S,
00067   q7_t * pSrc,
00068   q7_t * pDst,
00069   q7_t * pScratchIn,
00070   q31_t * pScratchOut,
00071   uint32_t blockSize)
00072 {
00073
00074   q7_t *pState = S->pState;                      /* State pointer */
00075   q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
00076   q7_t *px;                                      /* Scratch buffer pointer */
00077   q7_t *py = pState;                             /* Temporary pointers for state buffer */
00078   q7_t *pb = pScratchIn;                         /* Temporary pointers for scratch buffer */
00079   q7_t *pOut = pDst;                             /* Destination pointer */
00080   int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
00081   uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
00082   uint16_t numTaps = S->numTaps;                 /* Filter order */
00083   int32_t readIndex;                             /* Read index of the state buffer */
00084   uint32_t tapCnt, blkCnt;                       /* loop counters */
00085   q7_t coeff = *pCoeffs++;                       /* Read the coefficient value */
00086   q31_t *pScr2 = pScratchOut;                    /* Working pointer for scratch buffer of output values */
00087   q31_t in;
00088
00089
00090 #ifndef ARM_MATH_CM0
00091
00092   /* Run the below code for Cortex-M4 and Cortex-M3 */
00093
00094   q7_t in1, in2, in3, in4;
00095
00096   /* BlockSize of Input samples are copied into the state buffer */
00097   /* StateIndex points to the starting position to write in the state buffer */
00098   arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1,
00099                        blockSize);
00100
00101   /* Loop over the number of taps. */
00102   tapCnt = numTaps;
00103
00104   /* Read Index, from where the state buffer should be read, is calculated. */
00105   readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
00106
00107   /* Wraparound of readIndex */
00108   if(readIndex < 0)
00109   {
00110     readIndex += (int32_t) delaySize;
00111   }
00112
00113   /* Working pointer for state buffer is updated */
00114   py = pState;
00115
00116   /* blockSize samples are read from the state buffer */
00117   arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
00118                       (int32_t) blockSize, 1, blockSize);
00119
00120   /* Working pointer for the scratch buffer of state values */
00121   px = pb;
00122
00123   /* Working pointer for scratch buffer of output values */
00124   pScratchOut = pScr2;
00125
00126   /* Loop over the blockSize. Unroll by a factor of 4.
00127    * Compute 4 multiplications at a time. */
00128   blkCnt = blockSize >> 2;
00129
00130   while(blkCnt > 0u)
00131   {
00132     /* Perform multiplication and store in the scratch buffer */
00133     *pScratchOut++ = ((q31_t) * px++ * coeff);
00134     *pScratchOut++ = ((q31_t) * px++ * coeff);
00135     *pScratchOut++ = ((q31_t) * px++ * coeff);
00136     *pScratchOut++ = ((q31_t) * px++ * coeff);
00137
00138     /* Decrement the loop counter */
00139     blkCnt--;
00140   }
00141
00142   /* If the blockSize is not a multiple of 4,
00143    * compute the remaining samples */
00144   blkCnt = blockSize % 0x4u;
00145
00146   while(blkCnt > 0u)
00147   {
00148     /* Perform multiplication and store in the scratch buffer */
00149     *pScratchOut++ = ((q31_t) * px++ * coeff);
00150
00151     /* Decrement the loop counter */
00152     blkCnt--;
00153   }
00154
00155   /* Load the coefficient value and
00156    * increment the coefficient buffer for the next set of state values */
00157   coeff = *pCoeffs++;
00158
00159   /* Read Index, from where the state buffer should be read, is calculated. */
00160   readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
00161
00162   /* Wraparound of readIndex */
00163   if(readIndex < 0)
00164   {
00165     readIndex += (int32_t) delaySize;
00166   }
00167
00168   /* Loop over the number of taps. */
00169   tapCnt = (uint32_t) numTaps - 1u;
00170
00171   while(tapCnt > 0u)
00172   {
00173     /* Working pointer for state buffer is updated */
00174     py = pState;
00175
00176     /* blockSize samples are read from the state buffer */
00177     arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
00178                         (int32_t) blockSize, 1, blockSize);
00179
00180     /* Working pointer for the scratch buffer of state values */
00181     px = pb;
00182
00183     /* Working pointer for scratch buffer of output values */
00184     pScratchOut = pScr2;
00185
00186     /* Loop over the blockSize. Unroll by a factor of 4.
00187      * Compute 4 MACS at a time. */
00188     blkCnt = blockSize >> 2;
00189
00190     while(blkCnt > 0u)
00191     {
00192       /* Perform Multiply-Accumulate */
00193       in = *pScratchOut + ((q31_t) * px++ * coeff);
00194       *pScratchOut++ = in;
00195       in = *pScratchOut + ((q31_t) * px++ * coeff);
00196       *pScratchOut++ = in;
00197       in = *pScratchOut + ((q31_t) * px++ * coeff);
00198       *pScratchOut++ = in;
00199       in = *pScratchOut + ((q31_t) * px++ * coeff);
00200       *pScratchOut++ = in;
00201
00202       /* Decrement the loop counter */
00203       blkCnt--;
00204     }
00205
00206     /* If the blockSize is not a multiple of 4,
00207      * compute the remaining samples */
00208     blkCnt = blockSize % 0x4u;
00209
00210     while(blkCnt > 0u)
00211     {
00212       /* Perform Multiply-Accumulate */
00213       in = *pScratchOut + ((q31_t) * px++ * coeff);
00214       *pScratchOut++ = in;
00215
00216       /* Decrement the loop counter */
00217       blkCnt--;
00218     }
00219
00220     /* Load the coefficient value and
00221      * increment the coefficient buffer for the next set of state values */
00222     coeff = *pCoeffs++;
00223
00224     /* Read Index, from where the state buffer should be read, is calculated. */
00225     readIndex = ((int32_t) S->stateIndex -
00226                  (int32_t) blockSize) - *pTapDelay++;
00227
00228     /* Wraparound of readIndex */
00229     if(readIndex < 0)
00230     {
00231       readIndex += (int32_t) delaySize;
00232     }
00233
00234     /* Decrement the tap loop counter */
00235     tapCnt--;
00236   }
00237
00238   /* All the output values are in pScratchOut buffer.
00239      Convert them into 1.15 format, saturate and store in the destination buffer. */
00240   /* Loop over the blockSize. */
00241   blkCnt = blockSize >> 2;
00242
00243   while(blkCnt > 0u)
00244   {
00245     in1 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
00246     in2 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
00247     in3 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
00248     in4 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
00249
00250     *__SIMD32(pOut)++ = __PACKq7(in1, in2, in3, in4);
00251
00252     /* Decrement the blockSize loop counter */
00253     blkCnt--;
00254   }
00255
00256   /* If the blockSize is not a multiple of 4,
00257      remaining samples are processed in the below loop */
00258   blkCnt = blockSize % 0x4u;
00259
00260   while(blkCnt > 0u)
00261   {
00262     *pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8);
00263
00264     /* Decrement the blockSize loop counter */
00265     blkCnt--;
00266   }
00267
00268 #else
00269
00270   /* Run the below code for Cortex-M0 */
00271
00272   /* BlockSize of Input samples are copied into the state buffer */
00273   /* StateIndex points to the starting position to write in the state buffer */
00274   arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1,
00275                        blockSize);
00276
00277   /* Loop over the number of taps. */
00278   tapCnt = numTaps;
00279
00280   /* Read Index, from where the state buffer should be read, is calculated. */
00281   readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
00282
00283   /* Wraparound of readIndex */
00284   if(readIndex < 0)
00285   {
00286     readIndex += (int32_t) delaySize;
00287   }
00288
00289   /* Working pointer for state buffer is updated */
00290   py = pState;
00291
00292   /* blockSize samples are read from the state buffer */
00293   arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
00294                       (int32_t) blockSize, 1, blockSize);
00295
00296   /* Working pointer for the scratch buffer of state values */
00297   px = pb;
00298
00299   /* Working pointer for scratch buffer of output values */
00300   pScratchOut = pScr2;
00301
00302   /* Loop over the blockSize */
00303   blkCnt = blockSize;
00304
00305   while(blkCnt > 0u)
00306   {
00307     /* Perform multiplication and store in the scratch buffer */
00308     *pScratchOut++ = ((q31_t) * px++ * coeff);
00309
00310     /* Decrement the loop counter */
00311     blkCnt--;
00312   }
00313
00314   /* Load the coefficient value and
00315    * increment the coefficient buffer for the next set of state values */
00316   coeff = *pCoeffs++;
00317
00318   /* Read Index, from where the state buffer should be read, is calculated. */
00319   readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
00320
00321   /* Wraparound of readIndex */
00322   if(readIndex < 0)
00323   {
00324     readIndex += (int32_t) delaySize;
00325   }
00326
00327   /* Loop over the number of taps. */
00328   tapCnt = (uint32_t) numTaps - 1u;
00329
00330   while(tapCnt > 0u)
00331   {
00332     /* Working pointer for state buffer is updated */
00333     py = pState;
00334
00335     /* blockSize samples are read from the state buffer */
00336     arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
00337                         (int32_t) blockSize, 1, blockSize);
00338
00339     /* Working pointer for the scratch buffer of state values */
00340     px = pb;
00341
00342     /* Working pointer for scratch buffer of output values */
00343     pScratchOut = pScr2;
00344
00345     /* Loop over the blockSize */
00346     blkCnt = blockSize;
00347
00348     while(blkCnt > 0u)
00349     {
00350       /* Perform Multiply-Accumulate */
00351       in = *pScratchOut + ((q31_t) * px++ * coeff);
00352       *pScratchOut++ = in;
00353
00354       /* Decrement the loop counter */
00355       blkCnt--;
00356     }
00357
00358     /* Load the coefficient value and
00359      * increment the coefficient buffer for the next set of state values */
00360     coeff = *pCoeffs++;
00361
00362     /* Read Index, from where the state buffer should be read, is calculated. */
00363     readIndex =
00364       ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
00365
00366     /* Wraparound of readIndex */
00367     if(readIndex < 0)
00368     {
00369       readIndex += (int32_t) delaySize;
00370     }
00371
00372     /* Decrement the tap loop counter */
00373     tapCnt--;
00374   }
00375
00376   /* All the output values are in pScratchOut buffer.
00377      Convert them into 1.15 format, saturate and store in the destination buffer. */
00378   /* Loop over the blockSize. */
00379   blkCnt = blockSize;
00380
00381   while(blkCnt > 0u)
00382   {
00383     *pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8);
00384
00385     /* Decrement the blockSize loop counter */
00386     blkCnt--;
00387   }
00388
00389 #endif /*   #ifndef ARM_MATH_CM0 */
00390
00391 }
00392
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_fir_sparse_q15.c
00009 *
00010 * Description:  Q15 sparse FIR filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ------------------------------------------------------------------- */
00032 #include "arm_math.h"
00033
00060 void arm_fir_sparse_q15(
00061   arm_fir_sparse_instance_q15 * S,
00062   q15_t * pSrc,
00063   q15_t * pDst,
00064   q15_t * pScratchIn,
00065   q31_t * pScratchOut,
00066   uint32_t blockSize)
00067 {
00068
00069   q15_t *pState = S->pState;                     /* State pointer */
00070   q15_t *pIn = pSrc;                             /* Working pointer for input */
00071   q15_t *pOut = pDst;                            /* Working pointer for output */
00072   q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00073   q15_t *px;                                     /* Temporary pointers for scratch buffer */
00074   q15_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
00075   q15_t *py = pState;                            /* Temporary pointers for state buffer */
00076   int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
00077   uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
00078   uint16_t numTaps = S->numTaps;                 /* Filter order */
00079   int32_t readIndex;                             /* Read index of the state buffer */
00080   uint32_t tapCnt, blkCnt;                       /* loop counters */
00081   q15_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
00082   q31_t *pScr2 = pScratchOut;                    /* Working pointer for pScratchOut */
00083
00084
00085 #ifndef ARM_MATH_CM0
00086
00087   /* Run the below code for Cortex-M4 and Cortex-M3 */
00088
00089   q31_t in1, in2;                                /* Temporary variables */
00090
00091
00092   /* BlockSize of Input samples are copied into the state buffer */
00093   /* StateIndex points to the starting position to write in the state buffer */
00094   arm_circularWrite_q15(py, delaySize, &S->stateIndex, 1, pIn, 1, blockSize);
00095
00096   /* Loop over the number of taps. */
00097   tapCnt = numTaps;
00098
00099   /* Read Index, from where the state buffer should be read, is calculated. */
00100   readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
00101
00102   /* Wraparound of readIndex */
00103   if(readIndex < 0)
00104   {
00105     readIndex += (int32_t) delaySize;
00106   }
00107
00108   /* Working pointer for state buffer is updated */
00109   py = pState;
00110
00111   /* blockSize samples are read from the state buffer */
00112   arm_circularRead_q15(py, delaySize, &readIndex, 1,
00113                        pb, pb, blockSize, 1, blockSize);
00114
00115   /* Working pointer for the scratch buffer of state values */
00116   px = pb;
00117
00118   /* Working pointer for scratch buffer of output values */
00119   pScratchOut = pScr2;
00120
00121   /* Loop over the blockSize. Unroll by a factor of 4.
00122    * Compute 4 multiplications at a time. */
00123   blkCnt = blockSize >> 2;
00124
00125   while(blkCnt > 0u)
00126   {
00127     /* Perform multiplication and store in the scratch buffer */
00128     *pScratchOut++ = ((q31_t) * px++ * coeff);
00129     *pScratchOut++ = ((q31_t) * px++ * coeff);
00130     *pScratchOut++ = ((q31_t) * px++ * coeff);
00131     *pScratchOut++ = ((q31_t) * px++ * coeff);
00132
00133     /* Decrement the loop counter */
00134     blkCnt--;
00135   }
00136
00137   /* If the blockSize is not a multiple of 4,
00138    * compute the remaining samples */
00139   blkCnt = blockSize % 0x4u;
00140
00141   while(blkCnt > 0u)
00142   {
00143     /* Perform multiplication and store in the scratch buffer */
00144     *pScratchOut++ = ((q31_t) * px++ * coeff);
00145
00146     /* Decrement the loop counter */
00147     blkCnt--;
00148   }
00149
00150   /* Load the coefficient value and
00151    * increment the coefficient buffer for the next set of state values */
00152   coeff = *pCoeffs++;
00153
00154   /* Read Index, from where the state buffer should be read, is calculated. */
00155   readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
00156
00157   /* Wraparound of readIndex */
00158   if(readIndex < 0)
00159   {
00160     readIndex += (int32_t) delaySize;
00161   }
00162
00163   /* Loop over the number of taps. */
00164   tapCnt = (uint32_t) numTaps - 1u;
00165
00166   while(tapCnt > 0u)
00167   {
00168     /* Working pointer for state buffer is updated */
00169     py = pState;
00170
00171     /* blockSize samples are read from the state buffer */
00172     arm_circularRead_q15(py, delaySize, &readIndex, 1,
00173                          pb, pb, blockSize, 1, blockSize);
00174
00175     /* Working pointer for the scratch buffer of state values */
00176     px = pb;
00177
00178     /* Working pointer for scratch buffer of output values */
00179     pScratchOut = pScr2;
00180
00181     /* Loop over the blockSize. Unroll by a factor of 4.
00182      * Compute 4 MACS at a time. */
00183     blkCnt = blockSize >> 2;
00184
00185     while(blkCnt > 0u)
00186     {
00187       /* Perform Multiply-Accumulate */
00188       *pScratchOut++ += (q31_t) * px++ * coeff;
00189       *pScratchOut++ += (q31_t) * px++ * coeff;
00190       *pScratchOut++ += (q31_t) * px++ * coeff;
00191       *pScratchOut++ += (q31_t) * px++ * coeff;
00192
00193       /* Decrement the loop counter */
00194       blkCnt--;
00195     }
00196
00197     /* If the blockSize is not a multiple of 4,
00198      * compute the remaining samples */
00199     blkCnt = blockSize % 0x4u;
00200
00201     while(blkCnt > 0u)
00202     {
00203       /* Perform Multiply-Accumulate */
00204       *pScratchOut++ += (q31_t) * px++ * coeff;
00205
00206       /* Decrement the loop counter */
00207       blkCnt--;
00208     }
00209
00210     /* Load the coefficient value and
00211      * increment the coefficient buffer for the next set of state values */
00212     coeff = *pCoeffs++;
00213
00214     /* Read Index, from where the state buffer should be read, is calculated. */
00215     readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
00216
00217     /* Wraparound of readIndex */
00218     if(readIndex < 0)
00219     {
00220       readIndex += (int32_t) delaySize;
00221     }
00222
00223     /* Decrement the tap loop counter */
00224     tapCnt--;
00225   }
00226
00227   /* All the output values are in pScratchOut buffer.
00228      Convert them into 1.15 format, saturate and store in the destination buffer. */
00229   /* Loop over the blockSize. */
00230   blkCnt = blockSize >> 2;
00231
00232   while(blkCnt > 0u)
00233   {
00234     in1 = *pScr2++;
00235     in2 = *pScr2++;
00236
00237 #ifndef  ARM_MATH_BIG_ENDIAN
00238
00239     *__SIMD32(pOut)++ =
00240       __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16),
00241               16);
00242
00243 #else
00244     *__SIMD32(pOut)++ =
00245       __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16),
00246               16);
00247
00248 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00249
00250     in1 = *pScr2++;
00251
00252     in2 = *pScr2++;
00253
00254 #ifndef  ARM_MATH_BIG_ENDIAN
00255
00256     *__SIMD32(pOut)++ =
00257       __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16),
00258               16);
00259
00260 #else
00261
00262     *__SIMD32(pOut)++ =
00263       __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16),
00264               16);
00265
00266 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00267
00268
00269     blkCnt--;
00270
00271   }
00272
00273   /* If the blockSize is not a multiple of 4,
00274      remaining samples are processed in the below loop */
00275   blkCnt = blockSize % 0x4u;
00276
00277   while(blkCnt > 0u)
00278   {
00279     *pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16);
00280     blkCnt--;
00281   }
00282
00283 #else
00284
00285   /* Run the below code for Cortex-M0 */
00286
00287   /* BlockSize of Input samples are copied into the state buffer */
00288   /* StateIndex points to the starting position to write in the state buffer */
00289   arm_circularWrite_q15(py, delaySize, &S->stateIndex, 1, pIn, 1, blockSize);
00290
00291   /* Loop over the number of taps. */
00292   tapCnt = numTaps;
00293
00294   /* Read Index, from where the state buffer should be read, is calculated. */
00295   readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
00296
00297   /* Wraparound of readIndex */
00298   if(readIndex < 0)
00299   {
00300     readIndex += (int32_t) delaySize;
00301   }
00302
00303   /* Working pointer for state buffer is updated */
00304   py = pState;
00305
00306   /* blockSize samples are read from the state buffer */
00307   arm_circularRead_q15(py, delaySize, &readIndex, 1,
00308                        pb, pb, blockSize, 1, blockSize);
00309
00310   /* Working pointer for the scratch buffer of state values */
00311   px = pb;
00312
00313   /* Working pointer for scratch buffer of output values */
00314   pScratchOut = pScr2;
00315
00316   blkCnt = blockSize;
00317
00318   while(blkCnt > 0u)
00319   {
00320     /* Perform multiplication and store in the scratch buffer */
00321     *pScratchOut++ = ((q31_t) * px++ * coeff);
00322
00323     /* Decrement the loop counter */
00324     blkCnt--;
00325   }
00326
00327   /* Load the coefficient value and
00328    * increment the coefficient buffer for the next set of state values */
00329   coeff = *pCoeffs++;
00330
00331   /* Read Index, from where the state buffer should be read, is calculated. */
00332   readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
00333
00334   /* Wraparound of readIndex */
00335   if(readIndex < 0)
00336   {
00337     readIndex += (int32_t) delaySize;
00338   }
00339
00340   /* Loop over the number of taps. */
00341   tapCnt = (uint32_t) numTaps - 1u;
00342
00343   while(tapCnt > 0u)
00344   {
00345     /* Working pointer for state buffer is updated */
00346     py = pState;
00347
00348     /* blockSize samples are read from the state buffer */
00349     arm_circularRead_q15(py, delaySize, &readIndex, 1,
00350                          pb, pb, blockSize, 1, blockSize);
00351
00352     /* Working pointer for the scratch buffer of state values */
00353     px = pb;
00354
00355     /* Working pointer for scratch buffer of output values */
00356     pScratchOut = pScr2;
00357
00358     blkCnt = blockSize;
00359
00360     while(blkCnt > 0u)
00361     {
00362       /* Perform Multiply-Accumulate */
00363       *pScratchOut++ += (q31_t) * px++ * coeff;
00364
00365       /* Decrement the loop counter */
00366       blkCnt--;
00367     }
00368
00369     /* Load the coefficient value and
00370      * increment the coefficient buffer for the next set of state values */
00371     coeff = *pCoeffs++;
00372
00373     /* Read Index, from where the state buffer should be read, is calculated. */
00374     readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
00375
00376     /* Wraparound of readIndex */
00377     if(readIndex < 0)
00378     {
00379       readIndex += (int32_t) delaySize;
00380     }
00381
00382     /* Decrement the tap loop counter */
00383     tapCnt--;
00384   }
00385
00386   /* All the output values are in pScratchOut buffer.
00387      Convert them into 1.15 format, saturate and store in the destination buffer. */
00388   /* Loop over the blockSize. */
00389   blkCnt = blockSize;
00390
00391   while(blkCnt > 0u)
00392   {
00393     *pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16);
00394     blkCnt--;
00395   }
00396
00397 #endif /*   #ifndef ARM_MATH_CM0 */
00398
00399 }
00400
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_fir_sparse_q31.c
00009 *
00010 * Description:  Q31 sparse FIR filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ------------------------------------------------------------------- */
00032 #include "arm_math.h"
00033
00034
00058 void arm_fir_sparse_q31(
00059   arm_fir_sparse_instance_q31 * S,
00060   q31_t * pSrc,
00061   q31_t * pDst,
00062   q31_t * pScratchIn,
00063   uint32_t blockSize)
00064 {
00065
00066   q31_t *pState = S->pState;                     /* State pointer */
00067   q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00068   q31_t *px;                                     /* Scratch buffer pointer */
00069   q31_t *py = pState;                            /* Temporary pointers for state buffer */
00070   q31_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
00071   q31_t *pOut;                                   /* Destination pointer */
00072   q63_t out;                                     /* Temporary output variable */
00073   int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
00074   uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
00075   uint16_t numTaps = S->numTaps;                 /* Filter order */
00076   int32_t readIndex;                             /* Read index of the state buffer */
00077   uint32_t tapCnt, blkCnt;                       /* loop counters */
00078   q31_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
00079   q31_t in;
00080
00081
00082   /* BlockSize of Input samples are copied into the state buffer */
00083   /* StateIndex points to the starting position to write in the state buffer */
00084   arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1,
00085                         (int32_t *) pSrc, 1, blockSize);
00086
00087   /* Read Index, from where the state buffer should be read, is calculated. */
00088   readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
00089
00090   /* Wraparound of readIndex */
00091   if(readIndex < 0)
00092   {
00093     readIndex += (int32_t) delaySize;
00094   }
00095
00096   /* Working pointer for state buffer is updated */
00097   py = pState;
00098
00099   /* blockSize samples are read from the state buffer */
00100   arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
00101                        (int32_t *) pb, (int32_t *) pb, blockSize, 1,
00102                        blockSize);
00103
00104   /* Working pointer for the scratch buffer of state values */
00105   px = pb;
00106
00107   /* Working pointer for scratch buffer of output values */
00108   pOut = pDst;
00109
00110
00111 #ifndef ARM_MATH_CM0
00112
00113   /* Run the below code for Cortex-M4 and Cortex-M3 */
00114
00115   /* Loop over the blockSize. Unroll by a factor of 4.
00116    * Compute 4 Multiplications at a time. */
00117   blkCnt = blockSize >> 2;
00118
00119   while(blkCnt > 0u)
00120   {
00121     /* Perform Multiplications and store in the destination buffer */
00122     *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
00123     *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
00124     *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
00125     *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
00126
00127     /* Decrement the loop counter */
00128     blkCnt--;
00129   }
00130
00131   /* If the blockSize is not a multiple of 4,
00132    * compute the remaining samples */
00133   blkCnt = blockSize % 0x4u;
00134
00135   while(blkCnt > 0u)
00136   {
00137     /* Perform Multiplications and store in the destination buffer */
00138     *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
00139
00140     /* Decrement the loop counter */
00141     blkCnt--;
00142   }
00143
00144   /* Load the coefficient value and
00145    * increment the coefficient buffer for the next set of state values */
00146   coeff = *pCoeffs++;
00147
00148   /* Read Index, from where the state buffer should be read, is calculated. */
00149   readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
00150
00151   /* Wraparound of readIndex */
00152   if(readIndex < 0)
00153   {
00154     readIndex += (int32_t) delaySize;
00155   }
00156
00157   /* Loop over the number of taps. */
00158   tapCnt = (uint32_t) numTaps - 1u;
00159
00160   while(tapCnt > 0u)
00161   {
00162     /* Working pointer for state buffer is updated */
00163     py = pState;
00164
00165     /* blockSize samples are read from the state buffer */
00166     arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
00167                          (int32_t *) pb, (int32_t *) pb, blockSize, 1,
00168                          blockSize);
00169
00170     /* Working pointer for the scratch buffer of state values */
00171     px = pb;
00172
00173     /* Working pointer for scratch buffer of output values */
00174     pOut = pDst;
00175
00176     /* Loop over the blockSize. Unroll by a factor of 4.
00177      * Compute 4 MACS at a time. */
00178     blkCnt = blockSize >> 2;
00179
00180     while(blkCnt > 0u)
00181     {
00182       out = *pOut;
00183       out += ((q63_t) * px++ * coeff) >> 32;
00184       *pOut++ = (q31_t) (out);
00185
00186       out = *pOut;
00187       out += ((q63_t) * px++ * coeff) >> 32;
00188       *pOut++ = (q31_t) (out);
00189
00190       out = *pOut;
00191       out += ((q63_t) * px++ * coeff) >> 32;
00192       *pOut++ = (q31_t) (out);
00193
00194       out = *pOut;
00195       out += ((q63_t) * px++ * coeff) >> 32;
00196       *pOut++ = (q31_t) (out);
00197
00198       /* Decrement the loop counter */
00199       blkCnt--;
00200     }
00201
00202     /* If the blockSize is not a multiple of 4,
00203      * compute the remaining samples */
00204     blkCnt = blockSize % 0x4u;
00205
00206     while(blkCnt > 0u)
00207     {
00208       /* Perform Multiply-Accumulate */
00209       out = *pOut;
00210       out += ((q63_t) * px++ * coeff) >> 32;
00211       *pOut++ = (q31_t) (out);
00212
00213       /* Decrement the loop counter */
00214       blkCnt--;
00215     }
00216
00217     /* Load the coefficient value and
00218      * increment the coefficient buffer for the next set of state values */
00219     coeff = *pCoeffs++;
00220
00221     /* Read Index, from where the state buffer should be read, is calculated. */
00222     readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
00223
00224     /* Wraparound of readIndex */
00225     if(readIndex < 0)
00226     {
00227       readIndex += (int32_t) delaySize;
00228     }
00229
00230     /* Decrement the tap loop counter */
00231     tapCnt--;
00232   }
00233
00234   /* Working output pointer is updated */
00235   pOut = pDst;
00236
00237   /* Output is converted into 1.31 format. */
00238   /* Loop over the blockSize. Unroll by a factor of 4.
00239    * process 4 output samples at a time. */
00240   blkCnt = blockSize >> 2;
00241
00242   while(blkCnt > 0u)
00243   {
00244     in = *pOut << 1;
00245     *pOut++ = in;
00246     in = *pOut << 1;
00247     *pOut++ = in;
00248     in = *pOut << 1;
00249     *pOut++ = in;
00250     in = *pOut << 1;
00251     *pOut++ = in;
00252
00253     /* Decrement the loop counter */
00254     blkCnt--;
00255   }
00256
00257   /* If the blockSize is not a multiple of 4,
00258    * process the remaining output samples */
00259   blkCnt = blockSize % 0x4u;
00260
00261   while(blkCnt > 0u)
00262   {
00263     in = *pOut << 1;
00264     *pOut++ = in;
00265
00266     /* Decrement the loop counter */
00267     blkCnt--;
00268   }
00269
00270 #else
00271
00272   /* Run the below code for Cortex-M0 */
00273   blkCnt = blockSize;
00274
00275   while(blkCnt > 0u)
00276   {
00277     /* Perform Multiplications and store in the destination buffer */
00278     *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
00279
00280     /* Decrement the loop counter */
00281     blkCnt--;
00282   }
00283
00284   /* Load the coefficient value and
00285    * increment the coefficient buffer for the next set of state values */
00286   coeff = *pCoeffs++;
00287
00288   /* Read Index, from where the state buffer should be read, is calculated. */
00289   readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
00290
00291   /* Wraparound of readIndex */
00292   if(readIndex < 0)
00293   {
00294     readIndex += (int32_t) delaySize;
00295   }
00296
00297   /* Loop over the number of taps. */
00298   tapCnt = (uint32_t) numTaps - 1u;
00299
00300   while(tapCnt > 0u)
00301   {
00302     /* Working pointer for state buffer is updated */
00303     py = pState;
00304
00305     /* blockSize samples are read from the state buffer */
00306     arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
00307                          (int32_t *) pb, (int32_t *) pb, blockSize, 1,
00308                          blockSize);
00309
00310     /* Working pointer for the scratch buffer of state values */
00311     px = pb;
00312
00313     /* Working pointer for scratch buffer of output values */
00314     pOut = pDst;
00315
00316     blkCnt = blockSize;
00317
00318     while(blkCnt > 0u)
00319     {
00320       /* Perform Multiply-Accumulate */
00321       out = *pOut;
00322       out += ((q63_t) * px++ * coeff) >> 32;
00323       *pOut++ = (q31_t) (out);
00324
00325       /* Decrement the loop counter */
00326       blkCnt--;
00327     }
00328
00329     /* Load the coefficient value and
00330      * increment the coefficient buffer for the next set of state values */
00331     coeff = *pCoeffs++;
00332
00333     /* Read Index, from where the state buffer should be read, is calculated. */
00334     readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
00335
00336     /* Wraparound of readIndex */
00337     if(readIndex < 0)
00338     {
00339       readIndex += (int32_t) delaySize;
00340     }
00341
00342     /* Decrement the tap loop counter */
00343     tapCnt--;
00344   }
00345
00346   /* Working output pointer is updated */
00347   pOut = pDst;
00348
00349   /* Output is converted into 1.31 format. */
00350   blkCnt = blockSize;
00351
00352   while(blkCnt > 0u)
00353   {
00354     in = *pOut << 1;
00355     *pOut++ = in;
00356
00357     /* Decrement the loop counter */
00358     blkCnt--;
00359   }
00360
00361 #endif /*   #ifndef ARM_MATH_CM0 */
00362
00363 }
00364
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_float_to_q7.c
00009 *
00010 * Description:  Converts the elements of the floating-point vector to Q7 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00064 void arm_float_to_q7(
00065   float32_t * pSrc,
00066   q7_t * pDst,
00067   uint32_t blockSize)
00068 {
00069   float32_t *pIn = pSrc;                         /* Src pointer */
00070   uint32_t blkCnt;                               /* loop counter */
00071
00072 #ifdef ARM_MATH_ROUNDING
00073
00074   float32_t in;
00075
00076 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00077
00078 #ifndef ARM_MATH_CM0
00079
00080   /* Run the below code for Cortex-M4 and Cortex-M3 */
00081
00082   /*loop Unrolling */
00083   blkCnt = blockSize >> 2u;
00084
00085   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00086    ** a second loop below computes the remaining 1 to 3 samples. */
00087   while(blkCnt > 0u)
00088   {
00089
00090 #ifdef ARM_MATH_ROUNDING
00091     /* C = A * 128 */
00092     /* convert from float to q7 and then store the results in the destination buffer */
00093     in = *pIn++;
00094     in = (in * 128);
00095     in += in > 0 ? 0.5 : -0.5;
00096     *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
00097
00098     in = *pIn++;
00099     in = (in * 128);
00100     in += in > 0 ? 0.5 : -0.5;
00101     *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
00102
00103     in = *pIn++;
00104     in = (in * 128);
00105     in += in > 0 ? 0.5 : -0.5;
00106     *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
00107
00108     in = *pIn++;
00109     in = (in * 128);
00110     in += in > 0 ? 0.5 : -0.5;
00111     *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
00112
00113 #else
00114
00115     /* C = A * 128 */
00116     /* convert from float to q7 and then store the results in the destination buffer */
00117     *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
00118     *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
00119     *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
00120     *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
00121
00122 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00123
00124     /* Decrement the loop counter */
00125     blkCnt--;
00126   }
00127
00128   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00129    ** No loop unrolling is used. */
00130   blkCnt = blockSize % 0x4u;
00131
00132   while(blkCnt > 0u)
00133   {
00134
00135 #ifdef ARM_MATH_ROUNDING
00136     /* C = A * 128 */
00137     /* convert from float to q7 and then store the results in the destination buffer */
00138     in = *pIn++;
00139     in = (in * 128);
00140     in += in > 0 ? 0.5 : -0.5;
00141     *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
00142
00143 #else
00144
00145     /* C = A * 128 */
00146     /* convert from float to q7 and then store the results in the destination buffer */
00147     *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
00148
00149 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00150
00151     /* Decrement the loop counter */
00152     blkCnt--;
00153   }
00154
00155
00156 #else
00157
00158   /* Run the below code for Cortex-M0 */
00159
00160
00161   /* Loop over blockSize number of values */
00162   blkCnt = blockSize;
00163
00164   while(blkCnt > 0u)
00165   {
00166 #ifdef ARM_MATH_ROUNDING
00167     /* C = A * 128 */
00168     /* convert from float to q7 and then store the results in the destination buffer */
00169     in = *pIn++;
00170     in = (in * 128.0f);
00171     in += in > 0 ? 0.5f : -0.5f;
00172     *pDst++ = (q7_t) (__SSAT((q31_t) (in), 8));
00173
00174 #else
00175
00176     /* C = A * 128 */
00177     /* convert from float to q7 and then store the results in the destination buffer */
00178     *pDst++ = (q7_t) __SSAT((q31_t) (*pIn++ * 128.0f), 8);
00179
00180 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00181
00182     /* Decrement the loop counter */
00183     blkCnt--;
00184   }
00185
00186 #endif /* #ifndef ARM_MATH_CM0 */
00187
00188 }
00189
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_float_to_q15.c
00009 *
00010 * Description:  Converts the elements of the floating-point vector to Q15 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00065 void arm_float_to_q15(
00066   float32_t * pSrc,
00067   q15_t * pDst,
00068   uint32_t blockSize)
00069 {
00070   float32_t *pIn = pSrc;                         /* Src pointer */
00071   uint32_t blkCnt;                               /* loop counter */
00072
00073 #ifdef ARM_MATH_ROUNDING
00074
00075   float32_t in;
00076
00077 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00078
00079 #ifndef ARM_MATH_CM0
00080
00081   /* Run the below code for Cortex-M4 and Cortex-M3 */
00082
00083   /*loop Unrolling */
00084   blkCnt = blockSize >> 2u;
00085
00086   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00087    ** a second loop below computes the remaining 1 to 3 samples. */
00088   while(blkCnt > 0u)
00089   {
00090
00091 #ifdef ARM_MATH_ROUNDING
00092     /* C = A * 32768 */
00093     /* convert from float to q15 and then store the results in the destination buffer */
00094     in = *pIn++;
00095     in = (in * 32768.0f);
00096     in += in > 0 ? 0.5 : -0.5;
00097     *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
00098
00099     in = *pIn++;
00100     in = (in * 32768.0f);
00101     in += in > 0 ? 0.5 : -0.5;
00102     *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
00103
00104     in = *pIn++;
00105     in = (in * 32768.0f);
00106     in += in > 0 ? 0.5 : -0.5;
00107     *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
00108
00109     in = *pIn++;
00110     in = (in * 32768.0f);
00111     in += in > 0 ? 0.5 : -0.5;
00112     *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
00113
00114 #else
00115
00116     /* C = A * 32768 */
00117     /* convert from float to q15 and then store the results in the destination buffer */
00118     *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
00119     *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
00120     *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
00121     *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
00122
00123 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00124
00125     /* Decrement the loop counter */
00126     blkCnt--;
00127   }
00128
00129   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00130    ** No loop unrolling is used. */
00131   blkCnt = blockSize % 0x4u;
00132
00133   while(blkCnt > 0u)
00134   {
00135
00136 #ifdef ARM_MATH_ROUNDING
00137     /* C = A * 32768 */
00138     /* convert from float to q15 and then store the results in the destination buffer */
00139     in = *pIn++;
00140     in = (in * 32768.0f);
00141     in += in > 0 ? 0.5 : -0.5;
00142     *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
00143
00144 #else
00145
00146     /* C = A * 32768 */
00147     /* convert from float to q15 and then store the results in the destination buffer */
00148     *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
00149
00150 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00151
00152     /* Decrement the loop counter */
00153     blkCnt--;
00154   }
00155
00156
00157 #else
00158
00159   /* Run the below code for Cortex-M0 */
00160
00161   /* Loop over blockSize number of values */
00162   blkCnt = blockSize;
00163
00164   while(blkCnt > 0u)
00165   {
00166
00167 #ifdef ARM_MATH_ROUNDING
00168     /* C = A * 32768 */
00169     /* convert from float to q15 and then store the results in the destination buffer */
00170     in = *pIn++;
00171     in = (in * 32768.0f);
00172     in += in > 0 ? 0.5f : -0.5f;
00173     *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
00174
00175 #else
00176
00177     /* C = A * 32768 */
00178     /* convert from float to q15 and then store the results in the destination buffer */
00179     *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
00180
00181 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00182
00183     /* Decrement the loop counter */
00184     blkCnt--;
00185   }
00186
00187 #endif /* #ifndef ARM_MATH_CM0 */
00188
00189 }
00190
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_float_to_q31.c
00009 *
00010 * Description:  Converts the elements of the floating-point vector to Q31 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00069 void arm_float_to_q31(
00070   float32_t * pSrc,
00071   q31_t * pDst,
00072   uint32_t blockSize)
00073 {
00074   float32_t *pIn = pSrc;                         /* Src pointer */
00075   uint32_t blkCnt;                               /* loop counter */
00076
00077 #ifdef ARM_MATH_ROUNDING
00078
00079   float32_t in;
00080
00081 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00082
00083 #ifndef ARM_MATH_CM0
00084
00085   /* Run the below code for Cortex-M4 and Cortex-M3 */
00086
00087   /*loop Unrolling */
00088   blkCnt = blockSize >> 2u;
00089
00090   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00091    ** a second loop below computes the remaining 1 to 3 samples. */
00092   while(blkCnt > 0u)
00093   {
00094
00095 #ifdef ARM_MATH_ROUNDING
00096
00097     /* C = A * 32768 */
00098     /* convert from float to Q31 and then store the results in the destination buffer */
00099     in = *pIn++;
00100     in = (in * 2147483648.0f);
00101     in += in > 0 ? 0.5 : -0.5;
00102     *pDst++ = clip_q63_to_q31((q63_t) (in));
00103
00104     in = *pIn++;
00105     in = (in * 2147483648.0f);
00106     in += in > 0 ? 0.5 : -0.5;
00107     *pDst++ = clip_q63_to_q31((q63_t) (in));
00108
00109     in = *pIn++;
00110     in = (in * 2147483648.0f);
00111     in += in > 0 ? 0.5 : -0.5;
00112     *pDst++ = clip_q63_to_q31((q63_t) (in));
00113
00114     in = *pIn++;
00115     in = (in * 2147483648.0f);
00116     in += in > 0 ? 0.5 : -0.5;
00117     *pDst++ = clip_q63_to_q31((q63_t) (in));
00118
00119 #else
00120
00121     /* C = A * 2147483648 */
00122     /* convert from float to Q31 and then store the results in the destination buffer */
00123     *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
00124     *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
00125     *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
00126     *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
00127
00128 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00129
00130     /* Decrement the loop counter */
00131     blkCnt--;
00132   }
00133
00134   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00135    ** No loop unrolling is used. */
00136   blkCnt = blockSize % 0x4u;
00137
00138   while(blkCnt > 0u)
00139   {
00140
00141 #ifdef ARM_MATH_ROUNDING
00142
00143     /* C = A * 2147483648 */
00144     /* convert from float to Q31 and then store the results in the destination buffer */
00145     in = *pIn++;
00146     in = (in * 2147483648.0f);
00147     in += in > 0 ? 0.5 : -0.5;
00148     *pDst++ = clip_q63_to_q31((q63_t) (in));
00149
00150 #else
00151
00152     /* C = A * 2147483648 */
00153     /* convert from float to Q31 and then store the results in the destination buffer */
00154     *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
00155
00156 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00157
00158     /* Decrement the loop counter */
00159     blkCnt--;
00160   }
00161
00162
00163 #else
00164
00165   /* Run the below code for Cortex-M0 */
00166
00167   /* Loop over blockSize number of values */
00168   blkCnt = blockSize;
00169
00170   while(blkCnt > 0u)
00171   {
00172
00173 #ifdef ARM_MATH_ROUNDING
00174
00175     /* C = A * 2147483648 */
00176     /* convert from float to Q31 and then store the results in the destination buffer */
00177     in = *pIn++;
00178     in = (in * 2147483648.0f);
00179     in += in > 0 ? 0.5f : -0.5f;
00180     *pDst++ = clip_q63_to_q31((q63_t) (in));
00181
00182 #else
00183
00184     /* C = A * 2147483648 */
00185     /* convert from float to Q31 and then store the results in the destination buffer */
00186     *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
00187
00188 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00189
00190     /* Decrement the loop counter */
00191     blkCnt--;
00192   }
00193
00194 #endif /* #ifndef ARM_MATH_CM0 */
00195
00196 }
00197
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM0.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM0.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM0.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM3.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM3.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM3.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM4.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/system_ARMCM4.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM4.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
00062     SCB->CPACR |= ((3UL << 10*2) |                 /* set CP10 Full Access */
00063                    (3UL << 11*2)  );               /* set CP11 Full Access */
00064   #endif
00065
00066   SystemCoreClock = __SYSTEM_CLOCK;
00067
00068 #ifdef __USE_GPIO
00069   ARM_GPIO0->DATA[0].WORD = 0;
00070   ARM_GPIO0->IE = 0;
00071   ARM_GPIO0->DIR = 0xff83;
00072
00073   ARM_GPIO1->DATA[0].WORD = 0;
00074   ARM_GPIO1->IE = 0;
00075   ARM_GPIO1->DIR = 0;
00076
00077   ARM_GPIO2->DATA[0].WORD = 0;
00078   ARM_GPIO2->IE = 0;
00079   ARM_GPIO2->DIR = 0;
00080 #endif
00081 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/arm_graphic_equalizer_example_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_graphic_equalizer_example/arm_graphic_equalizer_example_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:         29. November 2010
00005 * $Revision:      V1.0.3
00006 *
00007 * Project:        CMSIS DSP Library
00008 * Title:              arm_graphic_equalizer_example_q31.c
00009 *
00010 * Description:  Example showing an audio graphic equalizer constructed
00011 *              out of Biquad filters.
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3
00014 *
00015 *
00016 * Version 1.0.3 2010/11/29
00017 *    Re-organized the CMSIS folders and updated documentation.
00018 *
00019 * Version 1.0.1 2010/10/05 KK
00020 *    Production release and review comments incorporated.
00021 *
00022 * Version 1.0.0 2010/09/20 KK
00023 *    Production release and review comments incorporated.
00024 * ------------------------------------------------------------------- */
00025
00109 #include "arm_math.h"
00110 #include "math_helper.h"
00111
00112 /* Length of the overall data in the test */
00113 #define TESTLENGTH 320
00114
00115 /* Block size for the underlying processing */
00116 #define BLOCKSIZE 32
00117
00118 /* Total number of blocks to run */
00119 #define NUMBLOCKS (TESTLENGTH/BLOCKSIZE)
00120
00121 /* Number of 2nd order Biquad stages per filter */
00122 #define NUMSTAGES 2
00123
00124 #define SNR_THRESHOLD_F32  98
00125
00126 /* -------------------------------------------------------------------
00127  * External Declarations for Input and Output buffers
00128  * ------------------------------------------------------------------- */
00129
00130 extern float32_t testInput_f32[TESTLENGTH];
00131 static float32_t testOutput[TESTLENGTH];
00132
00133 extern float32_t testRefOutput_f32[TESTLENGTH];
00134
00135 /* ----------------------------------------------------------------------
00136 ** Q31 state buffers for Band1, Band2, Band3, Band4, Band5
00137 ** ------------------------------------------------------------------- */
00138
00139 static q63_t biquadStateBand1Q31[4 * 2];
00140 static q63_t biquadStateBand2Q31[4 * 2];
00141 static q31_t biquadStateBand3Q31[4 * 2];
00142 static q31_t biquadStateBand4Q31[4 * 2];
00143 static q31_t biquadStateBand5Q31[4 * 2];
00144
00145 /* ----------------------------------------------------------------------
00146 ** Q31 input and output buffers
00147 ** ------------------------------------------------------------------- */
00148
00149 q31_t inputQ31[BLOCKSIZE];
00150 q31_t outputQ31[BLOCKSIZE];
00151
00152 /* ----------------------------------------------------------------------
00153 ** Entire coefficient table.  There are 10 coefficients per 4th order Biquad
00154 ** cascade filter.  The first 10 coefficients correspond to the -9 dB gain
00155 ** setting of band 1; the next 10 coefficient correspond to the -8 dB gain
00156 ** setting of band 1; and so on.  There are 10*19=190 coefficients in total
00157 ** for band 1 (gains = -9, -8, -7, ..., 9).  After this come the 190 coefficients
00158 ** for band 2.
00159 **
00160 ** The coefficients are in Q29 format and require a postShift of 2.
00161 ** ------------------------------------------------------------------- */
00162
00163 const q31_t coeffTable[950] = {
00164
00165         /* Band 1, -9 dB gain */
00166         535576962, -1071153923, 535576962, 1073741824, -536870912, 535576962, -1063501998, 527979313, 1060865294, -524146981,
00167         /* Band 1, -8 dB gain */
00168         535723226, -1071446451, 535723226, 1073741824, -536870912, 535723226, -1063568947, 527903217, 1061230578, -524503778,
00169         535868593, -1071737186, 535868593, 1073741824, -536870912, 535868593, -1063627467, 527819780, 1061585502, -524850686,
00170         536013181, -1072026363, 536013181, 1073741824, -536870912, 536013181, -1063677598, 527728935, 1061930361, -525187972,
00171         536157109, -1072314217, 536157109, 1073741824, -536870912, 536157109, -1063719372, 527630607, 1062265438, -525515897,
00172         536300492, -1072600983, 536300492, 1073741824, -536870912, 536300492, -1063752815, 527524720, 1062591011, -525834716,
00173         536443447, -1072886894, 536443447, 1073741824, -536870912, 536443447, -1063777945, 527411186, 1062907350, -526144676,
00174         536586091, -1073172183, 536586091, 1073741824, -536870912, 536586091, -1063794775, 527289917, 1063214717, -526446017,
00175         536728541, -1073457082, 536728541, 1073741824, -536870912, 536728541, -1063803308, 527160815, 1063513366, -526738975,
00176         536870912, -1073741824, 536870912, 1073741824, -536870912, 536870912, -1063803543, 527023777, 1063803543, -527023777,
00177         537013321, -1074026642, 537013321, 1073741824, -536870912, 537013321, -1063795470, 526878696, 1064085490, -527300648,
00178         537155884, -1074311768, 537155884, 1073741824, -536870912, 537155884, -1063779073, 526725455, 1064359439, -527569803,
00179         537298718, -1074597435, 537298718, 1073741824, -536870912, 537298718, -1063754328, 526563934, 1064625617, -527831454,
00180         537441939, -1074883878, 537441939, 1073741824, -536870912, 537441939, -1063721205, 526394005, 1064884245, -528085806,
00181         537585666, -1075171331, 537585666, 1073741824, -536870912, 537585666, -1063679666, 526215534, 1065135536, -528333059,
00182         537730015, -1075460030, 537730015, 1073741824, -536870912, 537730015, -1063629666, 526028380, 1065379699, -528573409,
00183         537875106, -1075750212, 537875106, 1073741824, -536870912, 537875106, -1063571152, 525832396, 1065616936, -528807045,
00184         538021057, -1076042114, 538021057, 1073741824, -536870912, 538021057, -1063504065, 525627429, 1065847444, -529034151,
00185         538167989, -1076335977, 538167989, 1073741824, -536870912, 538167989, -1063428338, 525413317, 1066071412, -529254907,
00186
00187         /* Band 2, -9 dB gain */
00188         531784976, -1055497692, 523873415, 1066213307, -529420241, 531784976, -1040357886, 509828014, 1028908252, -494627367,
00189         /* Band 2, -8 dB gain */
00190         532357636, -1056601982, 524400080, 1066115844, -529326645, 532357636, -1040623406, 509562600, 1030462237, -496062122,
00191         532927392, -1057707729, 524931110, 1066024274, -529239070, 532927392, -1040848253, 509262081, 1031969246, -497457090,
00192         533494678, -1058816094, 525467240, 1065939047, -529157961, 533494678, -1041032161, 508925950, 1033429976, -498812573,
00193         534059929, -1059928204, 526009170, 1065860582, -529083734, 534059929, -1041174868, 508553717, 1034845124, -500128887,
00194         534623580, -1061045148, 526557561, 1065789260, -529016764, 534623580, -1041276126, 508144920, 1036215393, -501406373,
00195         535186068, -1062167969, 527113032, 1065725420, -528957385, 535186068, -1041335703, 507699125, 1037541500, -502645399,
00196         535747827, -1063297666, 527676151, 1065669351, -528905879, 535747827, -1041353386, 507215934, 1038824183, -503846368,
00197         536309295, -1064435183, 528247436, 1065621289, -528862476, 536309295, -1041328990, 506694984, 1040064203, -505009724,
00198         536870912, -1065581413, 528827349, 1065581413, -528827349, 536870912, -1041262354, 506135953, 1041262354, -506135953,
00199         537433117, -1066737194, 529416295, 1065549847, -528800610, 537433117, -1041153346, 505538564, 1042419457, -507225588,
00200         537996352, -1067903307, 530014622, 1065526651, -528782316, 537996352, -1041001864, 504902578, 1043536370, -508279208,
00201         538561061, -1069080480, 530622620, 1065511830, -528772462, 538561061, -1040807833, 504227800, 1044613981, -509297437,
00202         539127690, -1070269387, 531240527, 1065505333, -528770987, 539127690, -1040571205, 503514074, 1045653211, -510280946,
00203         539696690, -1071470656, 531868525, 1065507054, -528777778, 539696690, -1040291951, 502761277, 1046655011, -511230450,
00204         540268512, -1072684867, 532506750, 1065516837, -528792672, 540268512, -1039970063, 501969320, 1047620358, -512146700,
00205         540843613, -1073912567, 533155297, 1065534483, -528815459, 540843613, -1039605542, 501138139, 1048550251, -513030484,
00206         541422451, -1075154268, 533814224, 1065559750, -528845892, 541422451, -1039198394, 500267687, 1049445708, -513882621,
00207         542005489, -1076410460, 534483561, 1065592362, -528883686, 542005489, -1038748624, 499357932, 1050307760, -514703956,
00208         518903861, -1001986830, 486725277, 1037235801, -502367695, 518903861, -945834422, 446371043, 902366163, -400700571,
00209         520899989, -1005630916, 488289126, 1036926846, -502147311, 520899989, -946490935, 445581846, 907921945, -404936158,
00210         522893209, -1009290002, 489869792, 1036650484, -501961419, 522893209, -947006359, 444685310, 913306106, -409075225,
00211         524884763, -1012968199, 491470256, 1036407567, -501810737, 524884763, -947377809, 443679533, 918521018, -413116221,
00212         526875910, -1016669649, 493093518, 1036198712, -501695739, 526875910, -947602324, 442562672, 923569247, -417057897,
00213         528867927, -1020398503, 494742575, 1036024293, -501616651, 528867927, -947676875, 441332970, 928453558, -420899319,
00214         530862111, -1024158905, 496420407, 1035884447, -501573457, 530862111, -947598385, 439988777, 933176909, -424639872,
00215         532859778, -1027954970, 498129955, 1035779077, -501565907, 532859778, -947363742, 438528571, 937742446, -428279254,
00216         534862260, -1031790763, 499874098, 1035707863, -501593525, 534862260, -946969823, 436950987, 942153486, -431817474,
00217         536870912, -1035670279, 501655630, 1035670279, -501655630, 536870912, -946413508, 435254839, 946413508, -435254839,
00218         538887107, -1039597419, 503477238, 1035665609, -501751354, 538887107, -945691703, 433439146, 950526127, -438591937,
00219         540912240, -1043575967, 505341475, 1035692963, -501879659, 540912240, -944801359, 431503152, 954495080, -441829621,
00220         542947726, -1047609569, 507250741, 1035751307, -502039364, 542947726, -943739490, 429446349, 958324201, -444968987,
00221         544995000, -1051701717, 509207261, 1035839473, -502229165, 544995000, -942503190, 427268492, 962017400, -448011351,
00222         547055523, -1055855728, 511213065, 1035956193, -502447657, 547055523, -941089647, 424969617, 965578640, -450958226,
00223         549130774, -1060074734, 513269973, 1036100110, -502693359, 549130774, -939496155, 422550049, 969011913, -453811298,
00224         551222259, -1064361672, 515379585, 1036269804, -502964731, 551222259, -937720119, 420010407, 972321228, -456572401,
00225         553331507, -1068719280, 517543273, 1036463810, -503260192, 553331507, -935759057, 417351601, 975510582, -459243495,
00226         555460072, -1073150100, 519762181, 1036680633, -503578144, 555460072, -933610600, 414574832, 978583948, -461826644,
00227         494084017, -851422604, 404056273, 930151631, -423619864, 494084017, -673714108, 339502486, 561843007, -265801750,
00228         498713542, -859177141, 406587077, 929211656, -423786402, 498713542, -673274906, 338185129, 573719128, -272222942,
00229         503369016, -867012190, 409148384, 928362985, -424054784, 503369016, -672533059, 336693984, 585290277, -278599028,
00230         508052536, -874935599, 411746438, 927604291, -424422151, 508052536, -671478538, 335026905, 596558312, -284920289,
00231         512766286, -882955583, 414387826, 926933782, -424885216, 512766286, -670100998, 333182045, 607525792, -291177811,
00232         517512534, -891080712, 417079474, 926349262, -425440318, 517512534, -668389789, 331157902, 618195914, -297363485,
00233         522293635, -899319903, 419828635, 925848177, -426083491, 522293635, -666333963, 328953368, 628572440, -303470012,
00234         527112032, -907682405, 422642886, 925427679, -426810526, 527112032, -663922286, 326567785, 638659631, -309490882,
00235         531970251, -916177781, 425530105, 925084675, -427617023, 531970251, -661143261, 324000998, 648462180, -315420352,
00236         536870912, -924815881, 428498454, 924815881, -428498454, 536870912, -657985147, 321253420, 657985147, -321253420,
00237         541816719, -933606817, 431556352, 924617870, -429450209, 541816719, -654435997, 318326093, 667233900, -326985786,
00238         546810467, -942560921, 434712438, 924487114, -430467639, 546810467, -650483688, 315220754, 676214053, -332613816,
00239         551855042, -951688708, 437975532, 924420027, -431546101, 551855042, -646115970, 311939896, 684931422, -338134495,
00240         556953421, -961000826, 441354588, 924413001, -432680993, 556953421, -641320513, 308486839, 693391970, -343545389,
00241         562108672, -970508005, 444858642, 924462435, -433867780, 562108672, -636084967, 304865786, 701601770, -348844597,
00242         567323959, -980220994, 448496743, 924564764, -435102022, 567323959, -630397020, 301081886, 709566963, -354030710,
00243         572602539, -990150500, 452277894, 924716482, -436379394, 572602539, -624244471, 297141281, 717293726, -359102767,
00244         577947763, -1000307125, 456210977, 924914158, -437695705, 577947763, -617615296, 293051155, 724788245, -364060214,
00245         583363084, -1010701292, 460304674, 925154455, -439046908, 583363084, -610497723, 288819761, 732056685, -368902865,
00246         387379495, -506912469, 196933274, 840112184, -347208270, 387379495, 506912469, 196933274, -840112184, -347208270,
00247         401658082, -532275898, 207149427, 833765363, -343175316, 401658082, 532275898, 207149427, -833765363, -343175316,
00248         416472483, -558722695, 217902617, 827270154, -339107319, 416472483, 558722695, 217902617, -827270154, -339107319,
00249         431841949, -586290861, 229212798, 820624988, -335007540, 431841949, 586290861, 229212798, -820624988, -335007540,
00250         447786335, -615019650, 241100489, 813828443, -330879528, 447786335, 615019650, 241100489, -813828443, -330879528,
00251         464326111, -644949597, 253586805, 806879270, -326727141, 464326111, 644949597, 253586805, -806879270, -326727141,
00252         481482377, -676122557, 266693475, 799776409, -322554559, 481482377, 676122557, 266693475, -799776409, -322554559,
00253         499276882, -708581728, 280442865, 792519013, -318366296, 499276882, 708581728, 280442865, -792519013, -318366296,
00254         517732032, -742371685, 294857996, 785106465, -314167221, 517732032, 742371685, 294857996, -785106465, -314167221,
00255         536870912, -777538408, 309962566, 777538408, -309962566, 536870912, 777538408, 309962566, -777538408, -309962566,
00256         556717294, -814129313, 325780968, 769814766, -305757943, 556717294, 814129313, 325780968, -769814766, -305757943,
00257         577295658, -852193284, 342338310, 761935777, -301559360, 577295658, 852193284, 342338310, -761935777, -301559360,
00258         598631206, -891780698, 359660433, 753902014, -297373230, 598631206, 891780698, 359660433, -753902014, -297373230,
00259         620749877, -932943463, 377773927, 745714425, -293206383, 620749877, 932943463, 377773927, -745714425, -293206383,
00260         643678365, -975735041, 396706151, 737374355, -289066077, 643678365, 975735041, 396706151, -737374355, -289066077,
00261         667444134, -1020210487, 416485252, 728883588, -284960004, 667444134, 1020210487, 416485252, -728883588, -284960004,
00262         692075438, -1066426476, 437140179, 720244375, -280896294, 692075438, 1066426476, 437140179, -720244375, -280896294,
00263         717601336, -1114441339, 458700704, 711459472, -276883515, 717601336, 1114441339, 458700704, -711459472, -276883515,
00264         744051710, -1164315096, 481197437, 702532174, -272930673, 744051710, 1164315096, 481197437, -702532174, -272930673
00265
00266 };
00267
00268 /* ----------------------------------------------------------------------
00269 ** Desired gains, in dB, per band
00270 ** ------------------------------------------------------------------- */
00271
00272 int gainDB[5] = {0, -3, 6, 4, -6};
00273
00274 float32_t snr;
00275
00276
00277 /* ----------------------------------------------------------------------
00278  * Graphic equalizer Example
00279  * ------------------------------------------------------------------- */
00280
00281 int32_t main(void)
00282 {
00283   float32_t  *inputF32, *outputF32;
00284   arm_biquad_cas_df1_32x64_ins_q31 S1;
00285   arm_biquad_cas_df1_32x64_ins_q31 S2;
00286   arm_biquad_casd_df1_inst_q31 S3;
00287   arm_biquad_casd_df1_inst_q31 S4;
00288   arm_biquad_casd_df1_inst_q31 S5;
00289   int i;
00290   int32_t status;
00291
00292   inputF32 = &testInput_f32[0];
00293   outputF32 = &testOutput[0];
00294
00295   /* Initialize the state and coefficient buffers for all Biquad sections */
00296
00297   arm_biquad_cas_df1_32x64_init_q31(&S1, NUMSTAGES,
00298                                     (q31_t *) &coeffTable[190*0 + 10*(gainDB[0] + 9)],
00299                                     &biquadStateBand1Q31[0], 2);
00300
00301   arm_biquad_cas_df1_32x64_init_q31(&S2, NUMSTAGES,
00302                                     (q31_t *) &coeffTable[190*1 + 10*(gainDB[1] + 9)],
00303                                     &biquadStateBand2Q31[0], 2);
00304
00305   arm_biquad_cascade_df1_init_q31(&S3, NUMSTAGES,
00306                                   (q31_t *) &coeffTable[190*2 + 10*(gainDB[2] + 9)],
00307                                   &biquadStateBand3Q31[0], 2);
00308
00309   arm_biquad_cascade_df1_init_q31(&S4, NUMSTAGES,
00310                                   (q31_t *) &coeffTable[190*3 + 10*(gainDB[3] + 9)],
00311                                   &biquadStateBand4Q31[0], 2);
00312
00313   arm_biquad_cascade_df1_init_q31(&S5, NUMSTAGES,
00314                                   (q31_t *) &coeffTable[190*4 + 10*(gainDB[4] + 9)],
00315                                   &biquadStateBand5Q31[0], 2);
00316
00317
00318   /* Call the process functions and needs to change filter coefficients
00319      for varying the gain of each band */
00320
00321   for(i=0; i < NUMBLOCKS; i++)
00322     {
00323
00324       /* ----------------------------------------------------------------------
00325       ** Convert block of input data from float to Q31
00326       ** ------------------------------------------------------------------- */
00327
00328       arm_float_to_q31(inputF32 + (i*BLOCKSIZE), inputQ31, BLOCKSIZE);
00329
00330       /* ----------------------------------------------------------------------
00331       ** Scale down by 1/8.  This provides additional headroom so that the
00332       ** graphic EQ can apply gain.
00333       ** ------------------------------------------------------------------- */
00334
00335       arm_scale_q31(inputQ31, 0x7FFFFFFF, -3, inputQ31, BLOCKSIZE);
00336
00337       /* ----------------------------------------------------------------------
00338       ** Call the Q31 Biquad Cascade DF1 32x64 process function for band1, band2
00339       ** ------------------------------------------------------------------- */
00340
00341       arm_biquad_cas_df1_32x64_q31(&S1, inputQ31, outputQ31, BLOCKSIZE);
00342       arm_biquad_cas_df1_32x64_q31(&S2, outputQ31, outputQ31, BLOCKSIZE);
00343
00344       /* ----------------------------------------------------------------------
00345       ** Call the Q31 Biquad Cascade DF1 process function for band3, band4, band5
00346       ** ------------------------------------------------------------------- */
00347
00348       arm_biquad_cascade_df1_q31(&S3, outputQ31, outputQ31, BLOCKSIZE);
00349       arm_biquad_cascade_df1_q31(&S4, outputQ31, outputQ31, BLOCKSIZE);
00350       arm_biquad_cascade_df1_q31(&S5, outputQ31, outputQ31, BLOCKSIZE);
00351
00352       /* ----------------------------------------------------------------------
00353       ** Convert Q31 result back to float
00354       ** ------------------------------------------------------------------- */
00355
00356       arm_q31_to_float(outputQ31, outputF32 + (i * BLOCKSIZE), BLOCKSIZE);
00357
00358       /* ----------------------------------------------------------------------
00359       ** Scale back up
00360       ** ------------------------------------------------------------------- */
00361
00362       arm_scale_f32(outputF32 + (i * BLOCKSIZE), 8.0f, outputF32 + (i * BLOCKSIZE), BLOCKSIZE);
00363     };
00364
00365         snr = arm_snr_f32(testRefOutput_f32, testOutput, TESTLENGTH);
00366
00367         if (snr < SNR_THRESHOLD_F32)
00368         {
00369             status = ARM_MATH_TEST_FAILURE;
00370         }
00371         else
00372         {
00373             status = ARM_MATH_SUCCESS;
00374         }
00375
00376   /* ----------------------------------------------------------------------
00377   ** Loop here if the signal does not match the reference output.
00378   ** ------------------------------------------------------------------- */
00379
00380   if( status != ARM_MATH_SUCCESS)
00381     {
00382       while(1);
00383     }
00384
00385     while(1);                             /* main function does not return */
00386 }
00387
00388
00389
00390
Generated on Mon Nov 28 2011 11:14:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_iir_lattice_f32.c
00009 *
00010 * Description:  Floating-point IIR Lattice filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00120 void arm_iir_lattice_f32(
00121   const arm_iir_lattice_instance_f32 * S,
00122   float32_t * pSrc,
00123   float32_t * pDst,
00124   uint32_t blockSize)
00125 {
00126   float32_t fcurr, fnext = 0, gcurr, gnext;      /* Temporary variables for lattice stages */
00127   float32_t acc;                                 /* Accumlator */
00128   uint32_t blkCnt, tapCnt;                       /* temporary variables for counts */
00129   float32_t *px1, *px2, *pk, *pv;                /* temporary pointers for state and coef */
00130   uint32_t numStages = S->numStages;             /* number of stages */
00131   float32_t *pState;                             /* State pointer */
00132   float32_t *pStateCurnt;                        /* State current pointer */
00133
00134
00135 #ifndef ARM_MATH_CM0
00136
00137   /* Run the below code for Cortex-M4 and Cortex-M3 */
00138
00139   gcurr = 0.0f;
00140   blkCnt = blockSize;
00141
00142   pState = &S->pState[0];
00143
00144   /* Sample processing */
00145   while(blkCnt > 0u)
00146   {
00147     /* Read Sample from input buffer */
00148     /* fN(n) = x(n) */
00149     fcurr = *pSrc++;
00150
00151     /* Initialize state read pointer */
00152     px1 = pState;
00153     /* Initialize state write pointer */
00154     px2 = pState;
00155     /* Set accumulator to zero */
00156     acc = 0.0f;
00157     /* Initialize Ladder coeff pointer */
00158     pv = &S->pvCoeffs[0];
00159     /* Initialize Reflection coeff pointer */
00160     pk = &S->pkCoeffs[0];
00161
00162
00163     /* Process sample for first tap */
00164     gcurr = *px1++;
00165     /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
00166     fnext = fcurr - ((*pk) * gcurr);
00167     /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
00168     gnext = (fnext * (*pk++)) + gcurr;
00169     /* write gN(n) into state for next sample processing */
00170     *px2++ = gnext;
00171     /* y(n) += gN(n) * vN  */
00172     acc += (gnext * (*pv++));
00173
00174     /* Update f values for next coefficient processing */
00175     fcurr = fnext;
00176
00177     /* Loop unrolling.  Process 4 taps at a time. */
00178     tapCnt = (numStages - 1u) >> 2;
00179
00180     while(tapCnt > 0u)
00181     {
00182       /* Process sample for 2nd, 6th ...taps */
00183       /* Read gN-2(n-1) from state buffer */
00184       gcurr = *px1++;
00185       /* Process sample for 2nd, 6th .. taps */
00186       /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
00187       fnext = fcurr - ((*pk) * gcurr);
00188       /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
00189       gnext = (fnext * (*pk++)) + gcurr;
00190       /* y(n) += gN-1(n) * vN-1  */
00191       /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
00192       acc += (gnext * (*pv++));
00193       /* write gN-1(n) into state for next sample processing */
00194       *px2++ = gnext;
00195
00196
00197       /* Process sample for 3nd, 7th ...taps */
00198       /* Read gN-3(n-1) from state buffer */
00199       gcurr = *px1++;
00200       /* Process sample for 3rd, 7th .. taps */
00201       /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
00202       fcurr = fnext - ((*pk) * gcurr);
00203       /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
00204       gnext = (fcurr * (*pk++)) + gcurr;
00205       /* y(n) += gN-2(n) * vN-2  */
00206       /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
00207       acc += (gnext * (*pv++));
00208       /* write gN-2(n) into state for next sample processing */
00209       *px2++ = gnext;
00210
00211
00212       /* Process sample for 4th, 8th ...taps */
00213       /* Read gN-4(n-1) from state buffer */
00214       gcurr = *px1++;
00215       /* Process sample for 4th, 8th .. taps */
00216       /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
00217       fnext = fcurr - ((*pk) * gcurr);
00218       /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
00219       gnext = (fnext * (*pk++)) + gcurr;
00220       /* y(n) += gN-3(n) * vN-3  */
00221       /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
00222       acc += (gnext * (*pv++));
00223       /* write gN-3(n) into state for next sample processing */
00224       *px2++ = gnext;
00225
00226
00227       /* Process sample for 5th, 9th ...taps */
00228       /* Read gN-5(n-1) from state buffer */
00229       gcurr = *px1++;
00230       /* Process sample for 5th, 9th .. taps */
00231       /* fN-5(n) = fN-4(n) - kN-4 * gN-1(n-1) */
00232       fcurr = fnext - ((*pk) * gcurr);
00233       /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
00234       gnext = (fcurr * (*pk++)) + gcurr;
00235       /* y(n) += gN-4(n) * vN-4  */
00236       /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
00237       acc += (gnext * (*pv++));
00238       /* write gN-4(n) into state for next sample processing */
00239       *px2++ = gnext;
00240
00241       tapCnt--;
00242
00243     }
00244
00245     fnext = fcurr;
00246
00247     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00248     tapCnt = (numStages - 1u) % 0x4u;
00249
00250     while(tapCnt > 0u)
00251     {
00252       gcurr = *px1++;
00253       /* Process sample for last taps */
00254       fnext = fcurr - ((*pk) * gcurr);
00255       gnext = (fnext * (*pk++)) + gcurr;
00256       /* Output samples for last taps */
00257       acc += (gnext * (*pv++));
00258       *px2++ = gnext;
00259       fcurr = fnext;
00260
00261       tapCnt--;
00262
00263     }
00264
00265
00266     /* y(n) += g0(n) * v0 */
00267     acc += (fnext * (*pv));
00268
00269     *px2++ = fnext;
00270
00271     /* write out into pDst */
00272     *pDst++ = acc;
00273
00274     /* Advance the state pointer by 4 to process the next group of 4 samples */
00275     pState = pState + 1u;
00276     blkCnt--;
00277
00278   }
00279
00280   /* Processing is complete. Now copy last S->numStages samples to start of the buffer
00281      for the preperation of next frame process */
00282
00283   /* Points to the start of the state buffer */
00284   pStateCurnt = &S->pState[0];
00285   pState = &S->pState[blockSize];
00286
00287   tapCnt = numStages >> 2u;
00288
00289   /* copy data */
00290   while(tapCnt > 0u)
00291   {
00292     *pStateCurnt++ = *pState++;
00293     *pStateCurnt++ = *pState++;
00294     *pStateCurnt++ = *pState++;
00295     *pStateCurnt++ = *pState++;
00296
00297     /* Decrement the loop counter */
00298     tapCnt--;
00299
00300   }
00301
00302   /* Calculate remaining number of copies */
00303   tapCnt = (numStages) % 0x4u;
00304
00305   /* Copy the remaining q31_t data */
00306   while(tapCnt > 0u)
00307   {
00308     *pStateCurnt++ = *pState++;
00309
00310     /* Decrement the loop counter */
00311     tapCnt--;
00312   }
00313
00314 #else
00315
00316   /* Run the below code for Cortex-M0 */
00317
00318   blkCnt = blockSize;
00319
00320   pState = &S->pState[0];
00321
00322   /* Sample processing */
00323   while(blkCnt > 0u)
00324   {
00325     /* Read Sample from input buffer */
00326     /* fN(n) = x(n) */
00327     fcurr = *pSrc++;
00328
00329     /* Initialize state read pointer */
00330     px1 = pState;
00331     /* Initialize state write pointer */
00332     px2 = pState;
00333     /* Set accumulator to zero */
00334     acc = 0.0f;
00335     /* Initialize Ladder coeff pointer */
00336     pv = &S->pvCoeffs[0];
00337     /* Initialize Reflection coeff pointer */
00338     pk = &S->pkCoeffs[0];
00339
00340
00341     /* Process sample for numStages */
00342     tapCnt = numStages;
00343
00344     while(tapCnt > 0u)
00345     {
00346       gcurr = *px1++;
00347       /* Process sample for last taps */
00348       fnext = fcurr - ((*pk) * gcurr);
00349       gnext = (fnext * (*pk++)) + gcurr;
00350
00351       /* Output samples for last taps */
00352       acc += (gnext * (*pv++));
00353       *px2++ = gnext;
00354       fcurr = fnext;
00355
00356       /* Decrementing loop counter */
00357       tapCnt--;
00358
00359     }
00360
00361     /* y(n) += g0(n) * v0 */
00362     acc += (fnext * (*pv));
00363
00364     *px2++ = fnext;
00365
00366     /* write out into pDst */
00367     *pDst++ = acc;
00368
00369     /* Advance the state pointer by 1 to process the next group of samples */
00370     pState = pState + 1u;
00371     blkCnt--;
00372
00373   }
00374
00375   /* Processing is complete. Now copy last S->numStages samples to start of the buffer
00376      for the preperation of next frame process */
00377
00378   /* Points to the start of the state buffer */
00379   pStateCurnt = &S->pState[0];
00380   pState = &S->pState[blockSize];
00381
00382   tapCnt = numStages;
00383
00384   /* Copy the data */
00385   while(tapCnt > 0u)
00386   {
00387     *pStateCurnt++ = *pState++;
00388
00389     /* Decrement the loop counter */
00390     tapCnt--;
00391   }
00392
00393 #endif /*   #ifndef ARM_MATH_CM0 */
00394
00395 }
00396
00397
00398
00399
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_iir_lattice_init_f32.c
00009 *
00010 * Description:  Floating-point IIR lattice filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00055 void arm_iir_lattice_init_f32(
00056   arm_iir_lattice_instance_f32 * S,
00057   uint16_t numStages,
00058   float32_t * pkCoeffs,
00059   float32_t * pvCoeffs,
00060   float32_t * pState,
00061   uint32_t blockSize)
00062 {
00063   /* Assign filter taps */
00064   S->numStages = numStages;
00065
00066   /* Assign reflection coefficient pointer */
00067   S->pkCoeffs = pkCoeffs;
00068
00069   /* Assign ladder coefficient pointer */
00070   S->pvCoeffs = pvCoeffs;
00071
00072   /* Clear state buffer and size is always blockSize + numStages */
00073   memset(pState, 0, (numStages + blockSize) * sizeof(float32_t));
00074
00075   /* Assign state pointer */
00076   S->pState = pState;
00077
00078
00079 }
00080
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_iir_lattice_init_q15.c
00009 *
00010 * Description:  Q15 IIR lattice filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00055 void arm_iir_lattice_init_q15(
00056   arm_iir_lattice_instance_q15 * S,
00057   uint16_t numStages,
00058   q15_t * pkCoeffs,
00059   q15_t * pvCoeffs,
00060   q15_t * pState,
00061   uint32_t blockSize)
00062 {
00063   /* Assign filter taps */
00064   S->numStages = numStages;
00065
00066   /* Assign reflection coefficient pointer */
00067   S->pkCoeffs = pkCoeffs;
00068
00069   /* Assign ladder coefficient pointer */
00070   S->pvCoeffs = pvCoeffs;
00071
00072   /* Clear state buffer and size is always blockSize + numStages */
00073   memset(pState, 0, (numStages + blockSize) * sizeof(q15_t));
00074
00075   /* Assign state pointer */
00076   S->pState = pState;
00077
00078
00079 }
00080
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_iir_lattice_init_q31.c
00009 *
00010 * Description:  Initialization function for the Q31 IIR lattice filter.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00055 void arm_iir_lattice_init_q31(
00056   arm_iir_lattice_instance_q31 * S,
00057   uint16_t numStages,
00058   q31_t * pkCoeffs,
00059   q31_t * pvCoeffs,
00060   q31_t * pState,
00061   uint32_t blockSize)
00062 {
00063   /* Assign filter taps */
00064   S->numStages = numStages;
00065
00066   /* Assign reflection coefficient pointer */
00067   S->pkCoeffs = pkCoeffs;
00068
00069   /* Assign ladder coefficient pointer */
00070   S->pvCoeffs = pvCoeffs;
00071
00072   /* Clear state buffer and size is always blockSize + numStages */
00073   memset(pState, 0, (numStages + blockSize) * sizeof(q31_t));
00074
00075   /* Assign state pointer */
00076   S->pState = pState;
00077
00078
00079 }
00080
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_iir_lattice_q15.c
00009 *
00010 * Description:  Q15 IIR lattice filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00063 void arm_iir_lattice_q15(
00064   const arm_iir_lattice_instance_q15 * S,
00065   q15_t * pSrc,
00066   q15_t * pDst,
00067   uint32_t blockSize)
00068 {
00069
00070
00071 #ifndef ARM_MATH_CM0
00072
00073   /* Run the below code for Cortex-M4 and Cortex-M3 */
00074
00075   q31_t fcurr, fnext, gcurr = 0, gnext;          /* Temporary variables for lattice stages */
00076   q15_t gnext1, gnext2;                          /* Temporary variables for lattice stages */
00077   uint32_t stgCnt;                               /* Temporary variables for counts */
00078   q63_t acc;                                     /* Accumlator */
00079   uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
00080   q15_t *px1, *px2, *pk, *pv;                    /* temporary pointers for state and coef */
00081   uint32_t numStages = S->numStages;             /* number of stages */
00082   q15_t *pState;                                 /* State pointer */
00083   q15_t *pStateCurnt;                            /* State current pointer */
00084   q15_t out;                                     /* Temporary variable for output */
00085   q31_t v;                                       /* Temporary variable for ladder coefficient */
00086
00087
00088   blkCnt = blockSize;
00089
00090   pState = &S->pState[0];
00091
00092   /* Sample processing */
00093   while(blkCnt > 0u)
00094   {
00095     /* Read Sample from input buffer */
00096     /* fN(n) = x(n) */
00097     fcurr = *pSrc++;
00098
00099     /* Initialize state read pointer */
00100     px1 = pState;
00101     /* Initialize state write pointer */
00102     px2 = pState;
00103     /* Set accumulator to zero */
00104     acc = 0;
00105     /* Initialize Ladder coeff pointer */
00106     pv = &S->pvCoeffs[0];
00107     /* Initialize Reflection coeff pointer */
00108     pk = &S->pkCoeffs[0];
00109
00110
00111     /* Process sample for first tap */
00112     gcurr = *px1++;
00113     /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
00114     fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
00115     fnext = __SSAT(fnext, 16);
00116     /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
00117     gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
00118     gnext = __SSAT(gnext, 16);
00119     /* write gN(n) into state for next sample processing */
00120     *px2++ = (q15_t) gnext;
00121     /* y(n) += gN(n) * vN  */
00122     acc += (q31_t) ((gnext * (*pv++)));
00123
00124
00125     /* Update f values for next coefficient processing */
00126     fcurr = fnext;
00127
00128     /* Loop unrolling.  Process 4 taps at a time. */
00129     tapCnt = (numStages - 1u) >> 2;
00130
00131     while(tapCnt > 0u)
00132     {
00133
00134       /* Process sample for 2nd, 6th ...taps */
00135       /* Read gN-2(n-1) from state buffer */
00136       gcurr = *px1++;
00137       /* Process sample for 2nd, 6th .. taps */
00138       /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
00139       fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
00140       fnext = __SSAT(fnext, 16);
00141       /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
00142       gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
00143       gnext1 = (q15_t) __SSAT(gnext, 16);
00144       /* write gN-1(n) into state */
00145       *px2++ = (q15_t) gnext1;
00146
00147
00148       /* Process sample for 3nd, 7th ...taps */
00149       /* Read gN-3(n-1) from state */
00150       gcurr = *px1++;
00151       /* Process sample for 3rd, 7th .. taps */
00152       /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
00153       fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15);
00154       fcurr = __SSAT(fcurr, 16);
00155       /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
00156       gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr;
00157       gnext2 = (q15_t) __SSAT(gnext, 16);
00158       /* write gN-2(n) into state */
00159       *px2++ = (q15_t) gnext2;
00160
00161       /* Read vN-1 and vN-2 at a time */
00162       v = *__SIMD32(pv)++;
00163
00164
00165       /* Pack gN-1(n) and gN-2(n) */
00166
00167 #ifndef  ARM_MATH_BIG_ENDIAN
00168
00169       gnext = __PKHBT(gnext1, gnext2, 16);
00170
00171 #else
00172
00173       gnext = __PKHBT(gnext2, gnext1, 16);
00174
00175 #endif /*   #ifndef  ARM_MATH_BIG_ENDIAN    */
00176
00177       /* y(n) += gN-1(n) * vN-1  */
00178       /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
00179       /* y(n) += gN-2(n) * vN-2  */
00180       /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
00181       acc = __SMLALD(gnext, v, acc);
00182
00183
00184       /* Process sample for 4th, 8th ...taps */
00185       /* Read gN-4(n-1) from state */
00186       gcurr = *px1++;
00187       /* Process sample for 4th, 8th .. taps */
00188       /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
00189       fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
00190       fnext = __SSAT(fnext, 16);
00191       /* gN-3(n) = kN-3 * fN-1(n) + gN-1(n-1) */
00192       gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
00193       gnext1 = (q15_t) __SSAT(gnext, 16);
00194       /* write  gN-3(n) for the next sample process */
00195       *px2++ = (q15_t) gnext1;
00196
00197
00198       /* Process sample for 5th, 9th ...taps */
00199       /* Read gN-5(n-1) from state */
00200       gcurr = *px1++;
00201       /* Process sample for 5th, 9th .. taps */
00202       /* fN-5(n) = fN-4(n) - kN-4 * gN-5(n-1) */
00203       fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15);
00204       fcurr = __SSAT(fcurr, 16);
00205       /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
00206       gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr;
00207       gnext2 = (q15_t) __SSAT(gnext, 16);
00208       /* write      gN-4(n) for the next sample process */
00209       *px2++ = (q15_t) gnext2;
00210
00211       /* Read vN-3 and vN-4 at a time */
00212       v = *__SIMD32(pv)++;
00213
00214       /* Pack gN-3(n) and gN-4(n) */
00215 #ifndef  ARM_MATH_BIG_ENDIAN
00216
00217       gnext = __PKHBT(gnext1, gnext2, 16);
00218
00219 #else
00220
00221       gnext = __PKHBT(gnext2, gnext1, 16);
00222
00223 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00224
00225       /* y(n) += gN-4(n) * vN-4  */
00226       /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
00227       /* y(n) += gN-3(n) * vN-3  */
00228       /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
00229       acc = __SMLALD(gnext, v, acc);
00230
00231       tapCnt--;
00232
00233     }
00234
00235     fnext = fcurr;
00236
00237     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00238     tapCnt = (numStages - 1u) % 0x4u;
00239
00240     while(tapCnt > 0u)
00241     {
00242       gcurr = *px1++;
00243       /* Process sample for last taps */
00244       fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
00245       fnext = __SSAT(fnext, 16);
00246       gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
00247       gnext = __SSAT(gnext, 16);
00248       /* Output samples for last taps */
00249       acc += (q31_t) (((q31_t) gnext * (*pv++)));
00250       *px2++ = (q15_t) gnext;
00251       fcurr = fnext;
00252
00253       tapCnt--;
00254     }
00255
00256     /* y(n) += g0(n) * v0 */
00257     acc += (q31_t) (((q31_t) fnext * (*pv++)));
00258
00259     out = (q15_t) __SSAT(acc >> 15, 16);
00260     *px2++ = (q15_t) fnext;
00261
00262     /* write out into pDst */
00263     *pDst++ = out;
00264
00265     /* Advance the state pointer by 4 to process the next group of 4 samples */
00266     pState = pState + 1u;
00267     blkCnt--;
00268
00269   }
00270
00271   /* Processing is complete. Now copy last S->numStages samples to start of the buffer
00272      for the preperation of next frame process */
00273   /* Points to the start of the state buffer */
00274   pStateCurnt = &S->pState[0];
00275   pState = &S->pState[blockSize];
00276
00277   stgCnt = (numStages >> 2u);
00278
00279   /* copy data */
00280   while(stgCnt > 0u)
00281   {
00282     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00283     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00284
00285     /* Decrement the loop counter */
00286     stgCnt--;
00287
00288   }
00289
00290   /* Calculation of count for remaining q15_t data */
00291   stgCnt = (numStages) % 0x4u;
00292
00293   /* copy data */
00294   while(stgCnt > 0u)
00295   {
00296     *pStateCurnt++ = *pState++;
00297
00298     /* Decrement the loop counter */
00299     stgCnt--;
00300   }
00301
00302 #else
00303
00304   /* Run the below code for Cortex-M0 */
00305
00306   q31_t fcurr, fnext = 0, gcurr = 0, gnext;      /* Temporary variables for lattice stages */
00307   uint32_t stgCnt;                               /* Temporary variables for counts */
00308   q63_t acc;                                     /* Accumlator */
00309   uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
00310   q15_t *px1, *px2, *pk, *pv;                    /* temporary pointers for state and coef */
00311   uint32_t numStages = S->numStages;             /* number of stages */
00312   q15_t *pState;                                 /* State pointer */
00313   q15_t *pStateCurnt;                            /* State current pointer */
00314   q15_t out;                                     /* Temporary variable for output */
00315
00316
00317   blkCnt = blockSize;
00318
00319   pState = &S->pState[0];
00320
00321   /* Sample processing */
00322   while(blkCnt > 0u)
00323   {
00324     /* Read Sample from input buffer */
00325     /* fN(n) = x(n) */
00326     fcurr = *pSrc++;
00327
00328     /* Initialize state read pointer */
00329     px1 = pState;
00330     /* Initialize state write pointer */
00331     px2 = pState;
00332     /* Set accumulator to zero */
00333     acc = 0;
00334     /* Initialize Ladder coeff pointer */
00335     pv = &S->pvCoeffs[0];
00336     /* Initialize Reflection coeff pointer */
00337     pk = &S->pkCoeffs[0];
00338
00339     tapCnt = numStages;
00340
00341     while(tapCnt > 0u)
00342     {
00343       gcurr = *px1++;
00344       /* Process sample */
00345       /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
00346       fnext = fcurr - ((gcurr * (*pk)) >> 15);
00347       fnext = __SSAT(fnext, 16);
00348       /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
00349       gnext = ((fnext * (*pk++)) >> 15) + gcurr;
00350       gnext = __SSAT(gnext, 16);
00351       /* Output samples */
00352       /* y(n) += gN(n) * vN */
00353       acc += (q31_t) ((gnext * (*pv++)));
00354       /* write gN(n) into state for next sample processing */
00355       *px2++ = (q15_t) gnext;
00356       /* Update f values for next coefficient processing */
00357       fcurr = fnext;
00358
00359       tapCnt--;
00360     }
00361
00362     /* y(n) += g0(n) * v0 */
00363     acc += (q31_t) ((fnext * (*pv++)));
00364
00365     out = (q15_t) __SSAT(acc >> 15, 16);
00366     *px2++ = (q15_t) fnext;
00367
00368     /* write out into pDst */
00369     *pDst++ = out;
00370
00371     /* Advance the state pointer by 1 to process the next group of samples */
00372     pState = pState + 1u;
00373     blkCnt--;
00374
00375   }
00376
00377   /* Processing is complete. Now copy last S->numStages samples to start of the buffer
00378      for the preperation of next frame process */
00379   /* Points to the start of the state buffer */
00380   pStateCurnt = &S->pState[0];
00381   pState = &S->pState[blockSize];
00382
00383   stgCnt = numStages;
00384
00385   /* copy data */
00386   while(stgCnt > 0u)
00387   {
00388     *pStateCurnt++ = *pState++;
00389
00390     /* Decrement the loop counter */
00391     stgCnt--;
00392   }
00393
00394 #endif /*   #ifndef ARM_MATH_CM0 */
00395
00396 }
00397
00398
00399
00400
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_iir_lattice_q31.c
00009 *
00010 * Description:  Q31 IIR lattice filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00062 void arm_iir_lattice_q31(
00063   const arm_iir_lattice_instance_q31 * S,
00064   q31_t * pSrc,
00065   q31_t * pDst,
00066   uint32_t blockSize)
00067 {
00068   q31_t fcurr, fnext = 0, gcurr = 0, gnext;      /* Temporary variables for lattice stages */
00069   q63_t acc;                                     /* Accumlator */
00070   uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
00071   q31_t *px1, *px2, *pk, *pv;                    /* Temporary pointers for state and coef */
00072   uint32_t numStages = S->numStages;             /* number of stages */
00073   q31_t *pState;                                 /* State pointer */
00074   q31_t *pStateCurnt;                            /* State current pointer */
00075
00076   blkCnt = blockSize;
00077
00078   pState = &S->pState[0];
00079
00080
00081 #ifndef ARM_MATH_CM0
00082
00083   /* Run the below code for Cortex-M4 and Cortex-M3 */
00084
00085   /* Sample processing */
00086   while(blkCnt > 0u)
00087   {
00088     /* Read Sample from input buffer */
00089     /* fN(n) = x(n) */
00090     fcurr = *pSrc++;
00091
00092     /* Initialize state read pointer */
00093     px1 = pState;
00094     /* Initialize state write pointer */
00095     px2 = pState;
00096     /* Set accumulator to zero */
00097     acc = 0;
00098     /* Initialize Ladder coeff pointer */
00099     pv = &S->pvCoeffs[0];
00100     /* Initialize Reflection coeff pointer */
00101     pk = &S->pkCoeffs[0];
00102
00103
00104     /* Process sample for first tap */
00105     gcurr = *px1++;
00106     /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
00107     fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
00108     /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
00109     gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
00110     /* write gN-1(n-1) into state for next sample processing */
00111     *px2++ = gnext;
00112     /* y(n) += gN(n) * vN  */
00113     acc += ((q63_t) gnext * *pv++);
00114
00115     /* Update f values for next coefficient processing */
00116     fcurr = fnext;
00117
00118     /* Loop unrolling.  Process 4 taps at a time. */
00119     tapCnt = (numStages - 1u) >> 2;
00120
00121     while(tapCnt > 0u)
00122     {
00123
00124       /* Process sample for 2nd, 6th .. taps */
00125       /* Read gN-2(n-1) from state buffer */
00126       gcurr = *px1++;
00127       /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
00128       fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
00129       /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
00130       gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
00131       /* y(n) += gN-1(n) * vN-1  */
00132       /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
00133       acc += ((q63_t) gnext * *pv++);
00134       /* write gN-1(n) into state for next sample processing */
00135       *px2++ = gnext;
00136
00137       /* Process sample for 3nd, 7th ...taps */
00138       /* Read gN-3(n-1) from state buffer */
00139       gcurr = *px1++;
00140       /* Process sample for 3rd, 7th .. taps */
00141       /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
00142       fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
00143       /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
00144       gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
00145       /* y(n) += gN-2(n) * vN-2  */
00146       /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
00147       acc += ((q63_t) gnext * *pv++);
00148       /* write gN-2(n) into state for next sample processing */
00149       *px2++ = gnext;
00150
00151
00152       /* Process sample for 4th, 8th ...taps */
00153       /* Read gN-4(n-1) from state buffer */
00154       gcurr = *px1++;
00155       /* Process sample for 4th, 8th .. taps */
00156       /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
00157       fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
00158       /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
00159       gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
00160       /* y(n) += gN-3(n) * vN-3  */
00161       /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
00162       acc += ((q63_t) gnext * *pv++);
00163       /* write gN-3(n) into state for next sample processing */
00164       *px2++ = gnext;
00165
00166
00167       /* Process sample for 5th, 9th ...taps */
00168       /* Read gN-5(n-1) from state buffer */
00169       gcurr = *px1++;
00170       /* Process sample for 5th, 9th .. taps */
00171       /* fN-5(n) = fN-4(n) - kN-4 * gN-1(n-1) */
00172       fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
00173       /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
00174       gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
00175       /* y(n) += gN-4(n) * vN-4  */
00176       /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
00177       acc += ((q63_t) gnext * *pv++);
00178       /* write gN-4(n) into state for next sample processing */
00179       *px2++ = gnext;
00180
00181       tapCnt--;
00182
00183     }
00184
00185     fnext = fcurr;
00186
00187     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00188     tapCnt = (numStages - 1u) % 0x4u;
00189
00190     while(tapCnt > 0u)
00191     {
00192       gcurr = *px1++;
00193       /* Process sample for last taps */
00194       fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
00195       gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
00196       /* Output samples for last taps */
00197       acc += ((q63_t) gnext * *pv++);
00198       *px2++ = gnext;
00199       fcurr = fnext;
00200
00201       tapCnt--;
00202
00203     }
00204
00205     /* y(n) += g0(n) * v0 */
00206     acc += (q63_t) fnext *(
00207   *pv++);
00208
00209     *px2++ = fnext;
00210
00211     /* write out into pDst */
00212     *pDst++ = (q31_t) (acc >> 31u);
00213
00214     /* Advance the state pointer by 4 to process the next group of 4 samples */
00215     pState = pState + 1u;
00216     blkCnt--;
00217
00218   }
00219
00220   /* Processing is complete. Now copy last S->numStages samples to start of the buffer
00221      for the preperation of next frame process */
00222
00223   /* Points to the start of the state buffer */
00224   pStateCurnt = &S->pState[0];
00225   pState = &S->pState[blockSize];
00226
00227   tapCnt = numStages >> 2u;
00228
00229   /* copy data */
00230   while(tapCnt > 0u)
00231   {
00232     *pStateCurnt++ = *pState++;
00233     *pStateCurnt++ = *pState++;
00234     *pStateCurnt++ = *pState++;
00235     *pStateCurnt++ = *pState++;
00236
00237     /* Decrement the loop counter */
00238     tapCnt--;
00239
00240   }
00241
00242   /* Calculate remaining number of copies */
00243   tapCnt = (numStages) % 0x4u;
00244
00245   /* Copy the remaining q31_t data */
00246   while(tapCnt > 0u)
00247   {
00248     *pStateCurnt++ = *pState++;
00249
00250     /* Decrement the loop counter */
00251     tapCnt--;
00252   };
00253
00254 #else
00255
00256   /* Run the below code for Cortex-M0 */
00257   /* Sample processing */
00258   while(blkCnt > 0u)
00259   {
00260     /* Read Sample from input buffer */
00261     /* fN(n) = x(n) */
00262     fcurr = *pSrc++;
00263
00264     /* Initialize state read pointer */
00265     px1 = pState;
00266     /* Initialize state write pointer */
00267     px2 = pState;
00268     /* Set accumulator to zero */
00269     acc = 0;
00270     /* Initialize Ladder coeff pointer */
00271     pv = &S->pvCoeffs[0];
00272     /* Initialize Reflection coeff pointer */
00273     pk = &S->pkCoeffs[0];
00274
00275     tapCnt = numStages;
00276
00277     while(tapCnt > 0u)
00278     {
00279       gcurr = *px1++;
00280       /* Process sample */
00281       /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
00282       fnext =
00283         clip_q63_to_q31(((q63_t) fcurr -
00284                          ((q31_t) (((q63_t) gcurr * (*pk)) >> 31))));
00285       /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
00286       gnext =
00287         clip_q63_to_q31(((q63_t) gcurr +
00288                          ((q31_t) (((q63_t) fnext * (*pk++)) >> 31))));
00289       /* Output samples */
00290       /* y(n) += gN(n) * vN  */
00291       acc += ((q63_t) gnext * *pv++);
00292       /* write gN-1(n-1) into state for next sample processing */
00293       *px2++ = gnext;
00294       /* Update f values for next coefficient processing */
00295       fcurr = fnext;
00296
00297       tapCnt--;
00298     }
00299
00300     /* y(n) += g0(n) * v0 */
00301     acc += (q63_t) fnext *(
00302   *pv++);
00303
00304     *px2++ = fnext;
00305
00306     /* write out into pDst */
00307     *pDst++ = (q31_t) (acc >> 31u);
00308
00309     /* Advance the state pointer by 1 to process the next group of samples */
00310     pState = pState + 1u;
00311     blkCnt--;
00312
00313   }
00314
00315   /* Processing is complete. Now copy last S->numStages samples to start of the buffer
00316      for the preperation of next frame process */
00317
00318   /* Points to the start of the state buffer */
00319   pStateCurnt = &S->pState[0];
00320   pState = &S->pState[blockSize];
00321
00322   tapCnt = numStages;
00323
00324   /* Copy the remaining q31_t data */
00325   while(tapCnt > 0u)
00326   {
00327     *pStateCurnt++ = *pState++;
00328
00329     /* Decrement the loop counter */
00330     tapCnt--;
00331   }
00332
00333 #endif /*   #ifndef ARM_MATH_CM0 */
00334
00335 }
00336
00337
00338
00339
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM0.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM0.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM0.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM3.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM3.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM3.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM4.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/system_ARMCM4.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM4.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
00062     SCB->CPACR |= ((3UL << 10*2) |                 /* set CP10 Full Access */
00063                    (3UL << 11*2)  );               /* set CP11 Full Access */
00064   #endif
00065
00066   SystemCoreClock = __SYSTEM_CLOCK;
00067
00068 #ifdef __USE_GPIO
00069   ARM_GPIO0->DATA[0].WORD = 0;
00070   ARM_GPIO0->IE = 0;
00071   ARM_GPIO0->DIR = 0xff83;
00072
00073   ARM_GPIO1->DATA[0].WORD = 0;
00074   ARM_GPIO1->IE = 0;
00075   ARM_GPIO1->DIR = 0;
00076
00077   ARM_GPIO2->DATA[0].WORD = 0;
00078   ARM_GPIO2->IE = 0;
00079   ARM_GPIO2->DIR = 0;
00080 #endif
00081 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/arm_linear_interp_example_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_linear_interp_example/arm_linear_interp_example_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        29. November 2010
00005 * $Revision:    V1.0.3
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_linear_interp_example_f32.c
00009 *
00010 * Description:  Example code demonstrating usage of sin function
00011 *               and uses linear interpolation to get higher precision
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3
00014 *
00015 *
00016 * Version 1.0.3 2010/11/29
00017 *    Re-organized the CMSIS folders and updated documentation.
00018 *
00019 * Version 1.0.1 2010/10/05 KK
00020 *    Production release and review comments incorporated.
00021 *
00022 * Version 1.0.0 2010/09/20 KK
00023 *    Production release and review comments incorporated.
00024 * ------------------------------------------------------------------- */
00025
00067 #include "arm_math.h"
00068 #include "math_helper.h"
00069
00070 #define SNR_THRESHOLD                   90
00071 #define TEST_LENGTH_SAMPLES     10
00072 #define XSPACING                                (0.00005f)
00073
00074 /* ----------------------------------------------------------------------
00075 * Test input data for F32 SIN function
00076 * Generated by the MATLAB rand() function
00077 * randn('state', 0)
00078 * xi = (((1/4.18318581819710)* randn(blockSize, 1) * 2* pi));
00079 * --------------------------------------------------------------------*/
00080 float32_t testInputSin_f32[TEST_LENGTH_SAMPLES] =
00081 {
00082         -0.649716504673081170,  -2.501723745497831200,  0.188250329003310100,   0.432092748487532540,   -1.722010988459680800,  1.788766476323060600,   1.786136060975809500,   -0.056525543169408797,
00083         0.491596272728153760,   0.262309671126153390
00084 };
00085
00086 /*------------------------------------------------------------------------------
00087 *  Reference out of SIN F32 function for Block Size = 10
00088 *  Calculated from sin(testInputSin_f32)
00089 *------------------------------------------------------------------------------*/
00090 float32_t testRefSinOutput32_f32[TEST_LENGTH_SAMPLES] =
00091 {
00092         -0.604960695383043530,  -0.597090287967934840,  0.187140422442966500,   0.418772124875992690,   -0.988588831792106880,  0.976338412038794010,   0.976903856413481100,   -0.056495446835214236,
00093         0.472033731854734240,   0.259311907228582830
00094 };
00095
00096 /*------------------------------------------------------------------------------
00097 *  Method 1: Test out Buffer Calculated from Cubic Interpolation
00098 *------------------------------------------------------------------------------*/
00099 float32_t testOutput[TEST_LENGTH_SAMPLES];
00100
00101 /*------------------------------------------------------------------------------
00102 *  Method 2: Test out buffer Calculated from Linear Interpolation
00103 *------------------------------------------------------------------------------*/
00104 float32_t testLinIntOutput[TEST_LENGTH_SAMPLES];
00105
00106 /*------------------------------------------------------------------------------
00107 *  External table used for linear interpolation
00108 *------------------------------------------------------------------------------*/
00109 extern float32_t arm_linear_interep_table[188495];
00110
00111 /* ----------------------------------------------------------------------
00112 * Global Variables for caluclating SNR's for Method1 & Method 2
00113 * ------------------------------------------------------------------- */
00114 float32_t snr1;
00115 float32_t snr2;
00116
00117 /* ----------------------------------------------------------------------------
00118 * Calculation of Sine values from Cubic Interpolation and Linear interpolation
00119 * ---------------------------------------------------------------------------- */
00120 int32_t main(void)
00121 {
00122         uint32_t i;
00123         arm_status status;
00124
00125         arm_linear_interp_instance_f32 S = {188495, -3.141592653589793238, XSPACING, &arm_linear_interep_table[0]};
00126
00127         /*------------------------------------------------------------------------------
00128         *  Method 1: Test out Calculated from Cubic Interpolation
00129         *------------------------------------------------------------------------------*/
00130         for(i=0; i< TEST_LENGTH_SAMPLES; i++)
00131         {
00132                 testOutput[i] = arm_sin_f32(testInputSin_f32[i]);
00133         }
00134
00135         /*------------------------------------------------------------------------------
00136         *  Method 2: Test out Calculated from Cubic Interpolation and Linear interpolation
00137         *------------------------------------------------------------------------------*/
00138
00139         for(i=0; i< TEST_LENGTH_SAMPLES; i++)
00140         {
00141                 testLinIntOutput[i] = arm_linear_interp_f32(&S, testInputSin_f32[i]);
00142         }
00143
00144         /*------------------------------------------------------------------------------
00145         *                                       SNR calculation for method 1
00146         *------------------------------------------------------------------------------*/
00147         snr1 = arm_snr_f32(testRefSinOutput32_f32, testOutput, 2);
00148
00149         /*------------------------------------------------------------------------------
00150         *                                       SNR calculation for method 2
00151         *------------------------------------------------------------------------------*/
00152         snr2 = arm_snr_f32(testRefSinOutput32_f32, testLinIntOutput, 2);
00153
00154         /*------------------------------------------------------------------------------
00155         *                                       Initialise status depending on SNR calculations
00156         *------------------------------------------------------------------------------*/
00157         if( snr2 > snr1)
00158         {
00159                 status = ARM_MATH_SUCCESS;
00160         }
00161         else
00162         {
00163                 status = ARM_MATH_TEST_FAILURE;
00164         }
00165
00166         /* ----------------------------------------------------------------------
00167         ** Loop here if the signals fail the PASS check.
00168         ** This denotes a test failure
00169         ** ------------------------------------------------------------------- */
00170         if( status != ARM_MATH_SUCCESS)
00171         {
00172                 while(1);
00173         }
00174
00175     while(1);                             /* main function does not return */
00176 }
00177
00178
Generated on Mon Nov 28 2011 11:14:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_lms_f32.c
00009 *
00010 * Description:  Processing function for the floating-point LMS filter.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00170 void arm_lms_f32(
00171   const arm_lms_instance_f32 * S,
00172   float32_t * pSrc,
00173   float32_t * pRef,
00174   float32_t * pOut,
00175   float32_t * pErr,
00176   uint32_t blockSize)
00177 {
00178   float32_t *pState = S->pState;                 /* State pointer */
00179   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
00180   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
00181   float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
00182   float32_t mu = S->mu;                          /* Adaptive factor */
00183   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00184   uint32_t tapCnt, blkCnt;                       /* Loop counters */
00185   float32_t sum, e, d;                           /* accumulator, error, reference data sample */
00186   float32_t w = 0.0f;                            /* weight factor */
00187
00188   e = 0.0f;
00189   d = 0.0f;
00190
00191   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
00192   /* pStateCurnt points to the location where the new input data should be written */
00193   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00194
00195   blkCnt = blockSize;
00196
00197
00198 #ifndef ARM_MATH_CM0
00199
00200   /* Run the below code for Cortex-M4 and Cortex-M3 */
00201
00202   while(blkCnt > 0u)
00203   {
00204     /* Copy the new input sample into the state buffer */
00205     *pStateCurnt++ = *pSrc++;
00206
00207     /* Initialize pState pointer */
00208     px = pState;
00209
00210     /* Initialize coeff pointer */
00211     pb = (pCoeffs);
00212
00213     /* Set the accumulator to zero */
00214     sum = 0.0f;
00215
00216     /* Loop unrolling.  Process 4 taps at a time. */
00217     tapCnt = numTaps >> 2;
00218
00219     while(tapCnt > 0u)
00220     {
00221       /* Perform the multiply-accumulate */
00222       sum += (*px++) * (*pb++);
00223       sum += (*px++) * (*pb++);
00224       sum += (*px++) * (*pb++);
00225       sum += (*px++) * (*pb++);
00226
00227       /* Decrement the loop counter */
00228       tapCnt--;
00229     }
00230
00231     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00232     tapCnt = numTaps % 0x4u;
00233
00234     while(tapCnt > 0u)
00235     {
00236       /* Perform the multiply-accumulate */
00237       sum += (*px++) * (*pb++);
00238
00239       /* Decrement the loop counter */
00240       tapCnt--;
00241     }
00242
00243     /* The result in the accumulator, store in the destination buffer. */
00244     *pOut++ = sum;
00245
00246     /* Compute and store error */
00247     d = (float32_t) (*pRef++);
00248     e = d - sum;
00249     *pErr++ = e;
00250
00251     /* Calculation of Weighting factor for the updating filter coefficients */
00252     w = e * mu;
00253
00254     /* Initialize pState pointer */
00255     px = pState;
00256
00257     /* Initialize coeff pointer */
00258     pb = (pCoeffs);
00259
00260     /* Loop unrolling.  Process 4 taps at a time. */
00261     tapCnt = numTaps >> 2;
00262
00263     /* Update filter coefficients */
00264     while(tapCnt > 0u)
00265     {
00266       /* Perform the multiply-accumulate */
00267       *pb = *pb + (w * (*px++));
00268       pb++;
00269
00270       *pb = *pb + (w * (*px++));
00271       pb++;
00272
00273       *pb = *pb + (w * (*px++));
00274       pb++;
00275
00276       *pb = *pb + (w * (*px++));
00277       pb++;
00278
00279       /* Decrement the loop counter */
00280       tapCnt--;
00281     }
00282
00283     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00284     tapCnt = numTaps % 0x4u;
00285
00286     while(tapCnt > 0u)
00287     {
00288       /* Perform the multiply-accumulate */
00289       *pb = *pb + (w * (*px++));
00290       pb++;
00291
00292       /* Decrement the loop counter */
00293       tapCnt--;
00294     }
00295
00296     /* Advance state pointer by 1 for the next sample */
00297     pState = pState + 1;
00298
00299     /* Decrement the loop counter */
00300     blkCnt--;
00301   }
00302
00303
00304   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00305      satrt of the state buffer. This prepares the state buffer for the
00306      next function call. */
00307
00308   /* Points to the start of the pState buffer */
00309   pStateCurnt = S->pState;
00310
00311   /* Loop unrolling for (numTaps - 1u) samples copy */
00312   tapCnt = (numTaps - 1u) >> 2u;
00313
00314   /* copy data */
00315   while(tapCnt > 0u)
00316   {
00317     *pStateCurnt++ = *pState++;
00318     *pStateCurnt++ = *pState++;
00319     *pStateCurnt++ = *pState++;
00320     *pStateCurnt++ = *pState++;
00321
00322     /* Decrement the loop counter */
00323     tapCnt--;
00324   }
00325
00326   /* Calculate remaining number of copies */
00327   tapCnt = (numTaps - 1u) % 0x4u;
00328
00329   /* Copy the remaining q31_t data */
00330   while(tapCnt > 0u)
00331   {
00332     *pStateCurnt++ = *pState++;
00333
00334     /* Decrement the loop counter */
00335     tapCnt--;
00336   }
00337
00338 #else
00339
00340   /* Run the below code for Cortex-M0 */
00341
00342   while(blkCnt > 0u)
00343   {
00344     /* Copy the new input sample into the state buffer */
00345     *pStateCurnt++ = *pSrc++;
00346
00347     /* Initialize pState pointer */
00348     px = pState;
00349
00350     /* Initialize pCoeffs pointer */
00351     pb = pCoeffs;
00352
00353     /* Set the accumulator to zero */
00354     sum = 0.0f;
00355
00356     /* Loop over numTaps number of values */
00357     tapCnt = numTaps;
00358
00359     while(tapCnt > 0u)
00360     {
00361       /* Perform the multiply-accumulate */
00362       sum += (*px++) * (*pb++);
00363
00364       /* Decrement the loop counter */
00365       tapCnt--;
00366     }
00367
00368     /* The result is stored in the destination buffer. */
00369     *pOut++ = sum;
00370
00371     /* Compute and store error */
00372     d = (float32_t) (*pRef++);
00373     e = d - sum;
00374     *pErr++ = e;
00375
00376     /* Weighting factor for the LMS version */
00377     w = e * mu;
00378
00379     /* Initialize pState pointer */
00380     px = pState;
00381
00382     /* Initialize pCoeffs pointer */
00383     pb = pCoeffs;
00384
00385     /* Loop over numTaps number of values */
00386     tapCnt = numTaps;
00387
00388     while(tapCnt > 0u)
00389     {
00390       /* Perform the multiply-accumulate */
00391       *pb = *pb + (w * (*px++));
00392       pb++;
00393
00394       /* Decrement the loop counter */
00395       tapCnt--;
00396     }
00397
00398     /* Advance state pointer by 1 for the next sample */
00399     pState = pState + 1;
00400
00401     /* Decrement the loop counter */
00402     blkCnt--;
00403   }
00404
00405
00406   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00407    * start of the state buffer. This prepares the state buffer for the
00408    * next function call. */
00409
00410   /* Points to the start of the pState buffer */
00411   pStateCurnt = S->pState;
00412
00413   /*  Copy (numTaps - 1u) samples  */
00414   tapCnt = (numTaps - 1u);
00415
00416   /* Copy the data */
00417   while(tapCnt > 0u)
00418   {
00419     *pStateCurnt++ = *pState++;
00420
00421     /* Decrement the loop counter */
00422     tapCnt--;
00423   }
00424
00425 #endif /*   #ifndef ARM_MATH_CM0 */
00426
00427 }
00428
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_lms_init_f32.c
00009 *
00010 * Description:  Floating-point LMS filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00061 void arm_lms_init_f32(
00062   arm_lms_instance_f32 * S,
00063   uint16_t numTaps,
00064   float32_t * pCoeffs,
00065   float32_t * pState,
00066   float32_t mu,
00067   uint32_t blockSize)
00068 {
00069   /* Assign filter taps */
00070   S->numTaps = numTaps;
00071
00072   /* Assign coefficient pointer */
00073   S->pCoeffs = pCoeffs;
00074
00075   /* Clear state buffer and size is always blockSize + numTaps */
00076   memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(float32_t));
00077
00078   /* Assign state pointer */
00079   S->pState = pState;
00080
00081   /* Assign Step size value */
00082   S->mu = mu;
00083 }
00084
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_lms_init_q15.c
00009 *
00010 * Description:  Q15 LMS filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00066 void arm_lms_init_q15(
00067   arm_lms_instance_q15 * S,
00068   uint16_t numTaps,
00069   q15_t * pCoeffs,
00070   q15_t * pState,
00071   q15_t mu,
00072   uint32_t blockSize,
00073   uint32_t postShift)
00074 {
00075   /* Assign filter taps */
00076   S->numTaps = numTaps;
00077
00078   /* Assign coefficient pointer */
00079   S->pCoeffs = pCoeffs;
00080
00081   /* Clear state buffer and size is always blockSize + numTaps - 1 */
00082   memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
00083
00084   /* Assign state pointer */
00085   S->pState = pState;
00086
00087   /* Assign Step size value */
00088   S->mu = mu;
00089
00090   /* Assign postShift value to be applied */
00091   S->postShift = postShift;
00092
00093 }
00094
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_lms_init_q31.c
00009 *
00010 * Description:  Q31 LMS filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00066 void arm_lms_init_q31(
00067   arm_lms_instance_q31 * S,
00068   uint16_t numTaps,
00069   q31_t * pCoeffs,
00070   q31_t * pState,
00071   q31_t mu,
00072   uint32_t blockSize,
00073   uint32_t postShift)
00074 {
00075   /* Assign filter taps */
00076   S->numTaps = numTaps;
00077
00078   /* Assign coefficient pointer */
00079   S->pCoeffs = pCoeffs;
00080
00081   /* Clear state buffer and size is always blockSize + numTaps - 1 */
00082   memset(pState, 0, ((uint32_t) numTaps + (blockSize - 1u)) * sizeof(q31_t));
00083
00084   /* Assign state pointer */
00085   S->pState = pState;
00086
00087   /* Assign Step size value */
00088   S->mu = mu;
00089
00090   /* Assign postShift value to be applied */
00091   S->postShift = postShift;
00092
00093 }
00094
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_lms_norm_f32.c
00009 *
00010 * Description:  Processing function for the floating-point Normalised LMS.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00160 void arm_lms_norm_f32(
00161   arm_lms_norm_instance_f32 * S,
00162   float32_t * pSrc,
00163   float32_t * pRef,
00164   float32_t * pOut,
00165   float32_t * pErr,
00166   uint32_t blockSize)
00167 {
00168   float32_t *pState = S->pState;                 /* State pointer */
00169   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
00170   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
00171   float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
00172   float32_t mu = S->mu;                          /* Adaptive factor */
00173   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00174   uint32_t tapCnt, blkCnt;                       /* Loop counters */
00175   float32_t energy;                              /* Energy of the input */
00176   float32_t sum, e, d;                           /* accumulator, error, reference data sample */
00177   float32_t w, x0, in;                           /* weight factor, temporary variable to hold input sample and state */
00178
00179   /* Initializations of error,  difference, Coefficient update */
00180   e = 0.0f;
00181   d = 0.0f;
00182   w = 0.0f;
00183
00184   energy = S->energy;
00185   x0 = S->x0;
00186
00187   /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
00188   /* pStateCurnt points to the location where the new input data should be written */
00189   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00190
00191   /* Loop over blockSize number of values */
00192   blkCnt = blockSize;
00193
00194
00195 #ifndef ARM_MATH_CM0
00196
00197   /* Run the below code for Cortex-M4 and Cortex-M3 */
00198
00199   while(blkCnt > 0u)
00200   {
00201     /* Copy the new input sample into the state buffer */
00202     *pStateCurnt++ = *pSrc;
00203
00204     /* Initialize pState pointer */
00205     px = pState;
00206
00207     /* Initialize coeff pointer */
00208     pb = (pCoeffs);
00209
00210     /* Read the sample from input buffer */
00211     in = *pSrc++;
00212
00213     /* Update the energy calculation */
00214     energy -= x0 * x0;
00215     energy += in * in;
00216
00217     /* Set the accumulator to zero */
00218     sum = 0.0f;
00219
00220     /* Loop unrolling.  Process 4 taps at a time. */
00221     tapCnt = numTaps >> 2;
00222
00223     while(tapCnt > 0u)
00224     {
00225       /* Perform the multiply-accumulate */
00226       sum += (*px++) * (*pb++);
00227       sum += (*px++) * (*pb++);
00228       sum += (*px++) * (*pb++);
00229       sum += (*px++) * (*pb++);
00230
00231       /* Decrement the loop counter */
00232       tapCnt--;
00233     }
00234
00235     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00236     tapCnt = numTaps % 0x4u;
00237
00238     while(tapCnt > 0u)
00239     {
00240       /* Perform the multiply-accumulate */
00241       sum += (*px++) * (*pb++);
00242
00243       /* Decrement the loop counter */
00244       tapCnt--;
00245     }
00246
00247     /* The result in the accumulator, store in the destination buffer. */
00248     *pOut++ = sum;
00249
00250     /* Compute and store error */
00251     d = (float32_t) (*pRef++);
00252     e = d - sum;
00253     *pErr++ = e;
00254
00255     /* Calculation of Weighting factor for updating filter coefficients */
00256     /* epsilon value 0.000000119209289f */
00257     w = (e * mu) / (energy + 0.000000119209289f);
00258
00259     /* Initialize pState pointer */
00260     px = pState;
00261
00262     /* Initialize coeff pointer */
00263     pb = (pCoeffs);
00264
00265     /* Loop unrolling.  Process 4 taps at a time. */
00266     tapCnt = numTaps >> 2;
00267
00268     /* Update filter coefficients */
00269     while(tapCnt > 0u)
00270     {
00271       /* Perform the multiply-accumulate */
00272       *pb += w * (*px++);
00273       pb++;
00274
00275       *pb += w * (*px++);
00276       pb++;
00277
00278       *pb += w * (*px++);
00279       pb++;
00280
00281       *pb += w * (*px++);
00282       pb++;
00283
00284
00285       /* Decrement the loop counter */
00286       tapCnt--;
00287     }
00288
00289     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00290     tapCnt = numTaps % 0x4u;
00291
00292     while(tapCnt > 0u)
00293     {
00294       /* Perform the multiply-accumulate */
00295       *pb += w * (*px++);
00296       pb++;
00297
00298       /* Decrement the loop counter */
00299       tapCnt--;
00300     }
00301
00302     x0 = *pState;
00303
00304     /* Advance state pointer by 1 for the next sample */
00305     pState = pState + 1;
00306
00307     /* Decrement the loop counter */
00308     blkCnt--;
00309   }
00310
00311   S->energy = energy;
00312   S->x0 = x0;
00313
00314   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00315      satrt of the state buffer. This prepares the state buffer for the
00316      next function call. */
00317
00318   /* Points to the start of the pState buffer */
00319   pStateCurnt = S->pState;
00320
00321   /* Loop unrolling for (numTaps - 1u)/4 samples copy */
00322   tapCnt = (numTaps - 1u) >> 2u;
00323
00324   /* copy data */
00325   while(tapCnt > 0u)
00326   {
00327     *pStateCurnt++ = *pState++;
00328     *pStateCurnt++ = *pState++;
00329     *pStateCurnt++ = *pState++;
00330     *pStateCurnt++ = *pState++;
00331
00332     /* Decrement the loop counter */
00333     tapCnt--;
00334   }
00335
00336   /* Calculate remaining number of copies */
00337   tapCnt = (numTaps - 1u) % 0x4u;
00338
00339   /* Copy the remaining q31_t data */
00340   while(tapCnt > 0u)
00341   {
00342     *pStateCurnt++ = *pState++;
00343
00344     /* Decrement the loop counter */
00345     tapCnt--;
00346   }
00347
00348 #else
00349
00350   /* Run the below code for Cortex-M0 */
00351
00352   while(blkCnt > 0u)
00353   {
00354     /* Copy the new input sample into the state buffer */
00355     *pStateCurnt++ = *pSrc;
00356
00357     /* Initialize pState pointer */
00358     px = pState;
00359
00360     /* Initialize pCoeffs pointer */
00361     pb = pCoeffs;
00362
00363     /* Read the sample from input buffer */
00364     in = *pSrc++;
00365
00366     /* Update the energy calculation */
00367     energy -= x0 * x0;
00368     energy += in * in;
00369
00370     /* Set the accumulator to zero */
00371     sum = 0.0f;
00372
00373     /* Loop over numTaps number of values */
00374     tapCnt = numTaps;
00375
00376     while(tapCnt > 0u)
00377     {
00378       /* Perform the multiply-accumulate */
00379       sum += (*px++) * (*pb++);
00380
00381       /* Decrement the loop counter */
00382       tapCnt--;
00383     }
00384
00385     /* The result in the accumulator is stored in the destination buffer. */
00386     *pOut++ = sum;
00387
00388     /* Compute and store error */
00389     d = (float32_t) (*pRef++);
00390     e = d - sum;
00391     *pErr++ = e;
00392
00393     /* Calculation of Weighting factor for updating filter coefficients */
00394     /* epsilon value 0.000000119209289f */
00395     w = (e * mu) / (energy + 0.000000119209289f);
00396
00397     /* Initialize pState pointer */
00398     px = pState;
00399
00400     /* Initialize pCcoeffs pointer */
00401     pb = pCoeffs;
00402
00403     /* Loop over numTaps number of values */
00404     tapCnt = numTaps;
00405
00406     while(tapCnt > 0u)
00407     {
00408       /* Perform the multiply-accumulate */
00409       *pb += w * (*px++);
00410       pb++;
00411
00412       /* Decrement the loop counter */
00413       tapCnt--;
00414     }
00415
00416     x0 = *pState;
00417
00418     /* Advance state pointer by 1 for the next sample */
00419     pState = pState + 1;
00420
00421     /* Decrement the loop counter */
00422     blkCnt--;
00423   }
00424
00425   S->energy = energy;
00426   S->x0 = x0;
00427
00428   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00429      satrt of the state buffer. This prepares the state buffer for the
00430      next function call. */
00431
00432   /* Points to the start of the pState buffer */
00433   pStateCurnt = S->pState;
00434
00435   /* Copy (numTaps - 1u) samples  */
00436   tapCnt = (numTaps - 1u);
00437
00438   /* Copy the remaining q31_t data */
00439   while(tapCnt > 0u)
00440   {
00441     *pStateCurnt++ = *pState++;
00442
00443     /* Decrement the loop counter */
00444     tapCnt--;
00445   }
00446
00447 #endif /*   #ifndef ARM_MATH_CM0 */
00448
00449 }
00450
Generated on Mon Nov 28 2011 11:14:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_lms_norm_init_f32.c
00009 *
00010 * Description:  Floating-point NLMS filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00064 void arm_lms_norm_init_f32(
00065   arm_lms_norm_instance_f32 * S,
00066   uint16_t numTaps,
00067   float32_t * pCoeffs,
00068   float32_t * pState,
00069   float32_t mu,
00070   uint32_t blockSize)
00071 {
00072   /* Assign filter taps */
00073   S->numTaps = numTaps;
00074
00075   /* Assign coefficient pointer */
00076   S->pCoeffs = pCoeffs;
00077
00078   /* Clear state buffer and size is always blockSize + numTaps - 1 */
00079   memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
00080
00081   /* Assign state pointer */
00082   S->pState = pState;
00083
00084   /* Assign Step size value */
00085   S->mu = mu;
00086
00087   /* Initialise Energy to zero */
00088   S->energy = 0.0f;
00089
00090   /* Initialise x0 to zero */
00091   S->x0 = 0.0f;
00092
00093 }
00094
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_lms_norm_init_q15.c
00009 *
00010 * Description:  Q15 NLMS initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034 #include "arm_common_tables.h"
00035
00064 void arm_lms_norm_init_q15(
00065   arm_lms_norm_instance_q15 * S,
00066   uint16_t numTaps,
00067   q15_t * pCoeffs,
00068   q15_t * pState,
00069   q15_t mu,
00070   uint32_t blockSize,
00071   uint8_t postShift)
00072 {
00073   /* Assign filter taps */
00074   S->numTaps = numTaps;
00075
00076   /* Assign coefficient pointer */
00077   S->pCoeffs = pCoeffs;
00078
00079   /* Clear state buffer and size is always blockSize + numTaps - 1 */
00080   memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
00081
00082   /* Assign post Shift value applied to coefficients */
00083   S->postShift = postShift;
00084
00085   /* Assign state pointer */
00086   S->pState = pState;
00087
00088   /* Assign Step size value */
00089   S->mu = mu;
00090
00091   /* Initialize reciprocal pointer table */
00092   S->recipTable = armRecipTableQ15;
00093
00094   /* Initialise Energy to zero */
00095   S->energy = 0;
00096
00097   /* Initialise x0 to zero */
00098   S->x0 = 0;
00099
00100 }
00101
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c
Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_lms_norm_init_q31.c
00009 *
00010 * Description:  Q31 NLMS initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034 #include "arm_common_tables.h"
00035
00063 void arm_lms_norm_init_q31(
00064   arm_lms_norm_instance_q31 * S,
00065   uint16_t numTaps,
00066   q31_t * pCoeffs,
00067   q31_t * pState,
00068   q31_t mu,
00069   uint32_t blockSize,
00070   uint8_t postShift)
00071 {
00072   /* Assign filter taps */
00073   S->numTaps = numTaps;
00074
00075   /* Assign coefficient pointer */
00076   S->pCoeffs = pCoeffs;
00077
00078   /* Clear state buffer and size is always blockSize + numTaps - 1  */
00079   memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q31_t));
00080
00081   /* Assign post Shift value applied to coefficients */
00082   S->postShift = postShift;
00083
00084   /* Assign state pointer */
00085   S->pState = pState;
00086
00087   /* Assign Step size value */
00088   S->mu = mu;
00089
00090   /* Initialize reciprocal pointer table */
00091   S->recipTable = armRecipTableQ31;
00092
00093   /* Initialise Energy to zero */
00094   S->energy = 0;
00095
00096   /* Initialise x0 to zero */
00097   S->x0 = 0;
00098
00099 }
00100
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_lms_norm_q15.c
00009 *
00010 * Description:  Q15 NLMS filter.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00071 void arm_lms_norm_q15(
00072   arm_lms_norm_instance_q15 * S,
00073   q15_t * pSrc,
00074   q15_t * pRef,
00075   q15_t * pOut,
00076   q15_t * pErr,
00077   uint32_t blockSize)
00078 {
00079   q15_t *pState = S->pState;                     /* State pointer */
00080   q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00081   q15_t *pStateCurnt;                            /* Points to the current sample of the state */
00082   q15_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
00083   q15_t mu = S->mu;                              /* Adaptive factor */
00084   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00085   uint32_t tapCnt, blkCnt;                       /* Loop counters */
00086   q31_t energy;                                  /* Energy of the input */
00087   q63_t acc;                                     /* Accumulator */
00088   q15_t e = 0, d = 0;                            /* error, reference data sample */
00089   q15_t w = 0, in;                               /* weight factor and state */
00090   q15_t x0;                                      /* temporary variable to hold input sample */
00091   uint32_t shift = (uint32_t) S->postShift + 1u; /* Shift to be applied to the output */
00092   q15_t errorXmu, oneByEnergy;                   /* Temporary variables to store error and mu product and reciprocal of energy */
00093   q15_t postShift;                               /* Post shift to be applied to weight after reciprocal calculation */
00094   q31_t coef;                                    /* Teporary variable for coefficient */
00095
00096   energy = S->energy;
00097   x0 = S->x0;
00098
00099   /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
00100   /* pStateCurnt points to the location where the new input data should be written */
00101   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00102
00103   /* Loop over blockSize number of values */
00104   blkCnt = blockSize;
00105
00106
00107 #ifndef ARM_MATH_CM0
00108
00109   /* Run the below code for Cortex-M4 and Cortex-M3 */
00110
00111   while(blkCnt > 0u)
00112   {
00113     /* Copy the new input sample into the state buffer */
00114     *pStateCurnt++ = *pSrc;
00115
00116     /* Initialize pState pointer */
00117     px = pState;
00118
00119     /* Initialize coeff pointer */
00120     pb = (pCoeffs);
00121
00122     /* Read the sample from input buffer */
00123     in = *pSrc++;
00124
00125     /* Update the energy calculation */
00126     energy -= (((q31_t) x0 * (x0)) >> 15);
00127     energy += (((q31_t) in * (in)) >> 15);
00128
00129     /* Set the accumulator to zero */
00130     acc = 0;
00131
00132     /* Loop unrolling.  Process 4 taps at a time. */
00133     tapCnt = numTaps >> 2;
00134
00135     while(tapCnt > 0u)
00136     {
00137
00138       /* Perform the multiply-accumulate */
00139       acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
00140       acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
00141
00142       /* Decrement the loop counter */
00143       tapCnt--;
00144     }
00145
00146     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00147     tapCnt = numTaps % 0x4u;
00148
00149     while(tapCnt > 0u)
00150     {
00151       /* Perform the multiply-accumulate */
00152       acc += (((q31_t) * px++ * (*pb++)));
00153
00154       /* Decrement the loop counter */
00155       tapCnt--;
00156     }
00157
00158     /* Converting the result to 1.15 format */
00159     acc = __SSAT((acc >> (16u - shift)), 16u);
00160
00161     /* Store the result from accumulator into the destination buffer. */
00162     *pOut++ = (q15_t) acc;
00163
00164     /* Compute and store error */
00165     d = *pRef++;
00166     e = d - (q15_t) acc;
00167     *pErr++ = e;
00168
00169     /* Calculation of 1/energy */
00170     postShift = arm_recip_q15((q15_t) energy + DELTA_Q15,
00171                               &oneByEnergy, S->recipTable);
00172
00173     /* Calculation of e * mu value */
00174     errorXmu = (q15_t) (((q31_t) e * mu) >> 15);
00175
00176     /* Calculation of (e * mu) * (1/energy) value */
00177     acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift));
00178
00179     /* Weighting factor for the normalized version */
00180     w = (q15_t) __SSAT((q31_t) acc, 16);
00181
00182     /* Initialize pState pointer */
00183     px = pState;
00184
00185     /* Initialize coeff pointer */
00186     pb = (pCoeffs);
00187
00188     /* Loop unrolling.  Process 4 taps at a time. */
00189     tapCnt = numTaps >> 2;
00190
00191     /* Update filter coefficients */
00192     while(tapCnt > 0u)
00193     {
00194       coef = *pb + (((q31_t) w * (*px++)) >> 15);
00195       *pb++ = (q15_t) __SSAT((coef), 16);
00196       coef = *pb + (((q31_t) w * (*px++)) >> 15);
00197       *pb++ = (q15_t) __SSAT((coef), 16);
00198       coef = *pb + (((q31_t) w * (*px++)) >> 15);
00199       *pb++ = (q15_t) __SSAT((coef), 16);
00200       coef = *pb + (((q31_t) w * (*px++)) >> 15);
00201       *pb++ = (q15_t) __SSAT((coef), 16);
00202
00203       /* Decrement the loop counter */
00204       tapCnt--;
00205     }
00206
00207     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00208     tapCnt = numTaps % 0x4u;
00209
00210     while(tapCnt > 0u)
00211     {
00212       /* Perform the multiply-accumulate */
00213       coef = *pb + (((q31_t) w * (*px++)) >> 15);
00214       *pb++ = (q15_t) __SSAT((coef), 16);
00215
00216       /* Decrement the loop counter */
00217       tapCnt--;
00218     }
00219
00220     /* Read the sample from state buffer */
00221     x0 = *pState;
00222
00223     /* Advance state pointer by 1 for the next sample */
00224     pState = pState + 1u;
00225
00226     /* Decrement the loop counter */
00227     blkCnt--;
00228   }
00229
00230   /* Save energy and x0 values for the next frame */
00231   S->energy = (q15_t) energy;
00232   S->x0 = x0;
00233
00234   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00235      satrt of the state buffer. This prepares the state buffer for the
00236      next function call. */
00237
00238   /* Points to the start of the pState buffer */
00239   pStateCurnt = S->pState;
00240
00241   /* Calculation of count for copying integer writes */
00242   tapCnt = (numTaps - 1u) >> 2;
00243
00244   while(tapCnt > 0u)
00245   {
00246
00247     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00248     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00249
00250     tapCnt--;
00251
00252   }
00253
00254   /* Calculation of count for remaining q15_t data */
00255   tapCnt = (numTaps - 1u) % 0x4u;
00256
00257   /* copy data */
00258   while(tapCnt > 0u)
00259   {
00260     *pStateCurnt++ = *pState++;
00261
00262     /* Decrement the loop counter */
00263     tapCnt--;
00264   }
00265
00266 #else
00267
00268   /* Run the below code for Cortex-M0 */
00269
00270   while(blkCnt > 0u)
00271   {
00272     /* Copy the new input sample into the state buffer */
00273     *pStateCurnt++ = *pSrc;
00274
00275     /* Initialize pState pointer */
00276     px = pState;
00277
00278     /* Initialize pCoeffs pointer */
00279     pb = pCoeffs;
00280
00281     /* Read the sample from input buffer */
00282     in = *pSrc++;
00283
00284     /* Update the energy calculation */
00285     energy -= (((q31_t) x0 * (x0)) >> 15);
00286     energy += (((q31_t) in * (in)) >> 15);
00287
00288     /* Set the accumulator to zero */
00289     acc = 0;
00290
00291     /* Loop over numTaps number of values */
00292     tapCnt = numTaps;
00293
00294     while(tapCnt > 0u)
00295     {
00296       /* Perform the multiply-accumulate */
00297       acc += (((q31_t) * px++ * (*pb++)));
00298
00299       /* Decrement the loop counter */
00300       tapCnt--;
00301     }
00302
00303     /* Converting the result to 1.15 format */
00304     acc = __SSAT((acc >> (16u - shift)), 16u);
00305
00306     /* Store the result from accumulator into the destination buffer. */
00307     *pOut++ = (q15_t) acc;
00308
00309     /* Compute and store error */
00310     d = *pRef++;
00311     e = d - (q15_t) acc;
00312     *pErr++ = e;
00313
00314     /* Calculation of 1/energy */
00315     postShift = arm_recip_q15((q15_t) energy + DELTA_Q15,
00316                               &oneByEnergy, S->recipTable);
00317
00318     /* Calculation of e * mu value */
00319     errorXmu = (q15_t) (((q31_t) e * mu) >> 15);
00320
00321     /* Calculation of (e * mu) * (1/energy) value */
00322     acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift));
00323
00324     /* Weighting factor for the normalized version */
00325     w = (q15_t) __SSAT((q31_t) acc, 16);
00326
00327     /* Initialize pState pointer */
00328     px = pState;
00329
00330     /* Initialize coeff pointer */
00331     pb = (pCoeffs);
00332
00333     /* Loop over numTaps number of values */
00334     tapCnt = numTaps;
00335
00336     while(tapCnt > 0u)
00337     {
00338       /* Perform the multiply-accumulate */
00339       coef = *pb + (((q31_t) w * (*px++)) >> 15);
00340       *pb++ = (q15_t) __SSAT((coef), 16);
00341
00342       /* Decrement the loop counter */
00343       tapCnt--;
00344     }
00345
00346     /* Read the sample from state buffer */
00347     x0 = *pState;
00348
00349     /* Advance state pointer by 1 for the next sample */
00350     pState = pState + 1u;
00351
00352     /* Decrement the loop counter */
00353     blkCnt--;
00354   }
00355
00356   /* Save energy and x0 values for the next frame */
00357   S->energy = (q15_t) energy;
00358   S->x0 = x0;
00359
00360   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00361      satrt of the state buffer. This prepares the state buffer for the
00362      next function call. */
00363
00364   /* Points to the start of the pState buffer */
00365   pStateCurnt = S->pState;
00366
00367   /* copy (numTaps - 1u) data */
00368   tapCnt = (numTaps - 1u);
00369
00370   /* copy data */
00371   while(tapCnt > 0u)
00372   {
00373     *pStateCurnt++ = *pState++;
00374
00375     /* Decrement the loop counter */
00376     tapCnt--;
00377   }
00378
00379 #endif /*   #ifndef ARM_MATH_CM0 */
00380
00381 }
00382
00383
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_lms_norm_q31.c
00009 *
00010 * Description:  Processing function for the Q31 NLMS filter.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00072 void arm_lms_norm_q31(
00073   arm_lms_norm_instance_q31 * S,
00074   q31_t * pSrc,
00075   q31_t * pRef,
00076   q31_t * pOut,
00077   q31_t * pErr,
00078   uint32_t blockSize)
00079 {
00080   q31_t *pState = S->pState;                     /* State pointer */
00081   q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00082   q31_t *pStateCurnt;                            /* Points to the current sample of the state */
00083   q31_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
00084   q31_t mu = S->mu;                              /* Adaptive factor */
00085   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00086   uint32_t tapCnt, blkCnt;                       /* Loop counters */
00087   q63_t energy;                                  /* Energy of the input */
00088   q63_t acc;                                     /* Accumulator */
00089   q31_t e = 0, d = 0;                            /* error, reference data sample */
00090   q31_t w = 0, in;                               /* weight factor and state */
00091   q31_t x0;                                      /* temporary variable to hold input sample */
00092   uint32_t shift = 32u - ((uint32_t) S->postShift + 1u);        /* Shift to be applied to the output */
00093   q31_t errorXmu, oneByEnergy;                   /* Temporary variables to store error and mu product and reciprocal of energy */
00094   q31_t postShift;                               /* Post shift to be applied to weight after reciprocal calculation */
00095   q31_t coef;                                    /* Temporary variable for coef */
00096
00097   energy = S->energy;
00098   x0 = S->x0;
00099
00100   /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
00101   /* pStateCurnt points to the location where the new input data should be written */
00102   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00103
00104   /* Loop over blockSize number of values */
00105   blkCnt = blockSize;
00106
00107
00108 #ifndef ARM_MATH_CM0
00109
00110   /* Run the below code for Cortex-M4 and Cortex-M3 */
00111
00112   while(blkCnt > 0u)
00113   {
00114
00115     /* Copy the new input sample into the state buffer */
00116     *pStateCurnt++ = *pSrc;
00117
00118     /* Initialize pState pointer */
00119     px = pState;
00120
00121     /* Initialize coeff pointer */
00122     pb = (pCoeffs);
00123
00124     /* Read the sample from input buffer */
00125     in = *pSrc++;
00126
00127     /* Update the energy calculation */
00128     energy = (q31_t) ((((q63_t) energy << 32) -
00129                        (((q63_t) x0 * x0) << 1)) >> 32);
00130     energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32);
00131
00132     /* Set the accumulator to zero */
00133     acc = 0;
00134
00135     /* Loop unrolling.  Process 4 taps at a time. */
00136     tapCnt = numTaps >> 2;
00137
00138     while(tapCnt > 0u)
00139     {
00140       /* Perform the multiply-accumulate */
00141       acc += ((q63_t) (*px++)) * (*pb++);
00142       acc += ((q63_t) (*px++)) * (*pb++);
00143       acc += ((q63_t) (*px++)) * (*pb++);
00144       acc += ((q63_t) (*px++)) * (*pb++);
00145
00146       /* Decrement the loop counter */
00147       tapCnt--;
00148     }
00149
00150     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00151     tapCnt = numTaps % 0x4u;
00152
00153     while(tapCnt > 0u)
00154     {
00155       /* Perform the multiply-accumulate */
00156       acc += ((q63_t) (*px++)) * (*pb++);
00157
00158       /* Decrement the loop counter */
00159       tapCnt--;
00160     }
00161
00162     /* Converting the result to 1.31 format */
00163     acc = (q31_t) (acc >> shift);
00164
00165     /* Store the result from accumulator into the destination buffer. */
00166     *pOut++ = (q31_t) acc;
00167
00168     /* Compute and store error */
00169     d = *pRef++;
00170     e = d - (q31_t) acc;
00171     *pErr++ = e;
00172
00173     /* Calculates the reciprocal of energy */
00174     postShift = arm_recip_q31(energy + DELTA_Q31,
00175                               &oneByEnergy, &S->recipTable[0]);
00176
00177     /* Calculation of product of (e * mu) */
00178     errorXmu = (q31_t) (((q63_t) e * mu) >> 31);
00179
00180     /* Weighting factor for the normalized version */
00181     w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift));
00182
00183     /* Initialize pState pointer */
00184     px = pState;
00185
00186     /* Initialize coeff pointer */
00187     pb = (pCoeffs);
00188
00189     /* Loop unrolling.  Process 4 taps at a time. */
00190     tapCnt = numTaps >> 2;
00191
00192     /* Update filter coefficients */
00193     while(tapCnt > 0u)
00194     {
00195       /* Perform the multiply-accumulate */
00196
00197       /* coef is in 2.30 format */
00198       coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
00199       /* get coef in 1.31 format by left shifting */
00200       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00201       /* update coefficient buffer to next coefficient */
00202       pb++;
00203
00204       coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
00205       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00206       pb++;
00207
00208       coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
00209       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00210       pb++;
00211
00212       coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
00213       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00214       pb++;
00215
00216       /* Decrement the loop counter */
00217       tapCnt--;
00218     }
00219
00220     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00221     tapCnt = numTaps % 0x4u;
00222
00223     while(tapCnt > 0u)
00224     {
00225       /* Perform the multiply-accumulate */
00226       coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
00227       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00228       pb++;
00229
00230       /* Decrement the loop counter */
00231       tapCnt--;
00232     }
00233
00234     /* Read the sample from state buffer */
00235     x0 = *pState;
00236
00237     /* Advance state pointer by 1 for the next sample */
00238     pState = pState + 1;
00239
00240     /* Decrement the loop counter */
00241     blkCnt--;
00242   }
00243
00244   /* Save energy and x0 values for the next frame */
00245   S->energy = (q31_t) energy;
00246   S->x0 = x0;
00247
00248   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00249      satrt of the state buffer. This prepares the state buffer for the
00250      next function call. */
00251
00252   /* Points to the start of the pState buffer */
00253   pStateCurnt = S->pState;
00254
00255   /* Loop unrolling for (numTaps - 1u) samples copy */
00256   tapCnt = (numTaps - 1u) >> 2u;
00257
00258   /* copy data */
00259   while(tapCnt > 0u)
00260   {
00261     *pStateCurnt++ = *pState++;
00262     *pStateCurnt++ = *pState++;
00263     *pStateCurnt++ = *pState++;
00264     *pStateCurnt++ = *pState++;
00265
00266     /* Decrement the loop counter */
00267     tapCnt--;
00268   }
00269
00270   /* Calculate remaining number of copies */
00271   tapCnt = (numTaps - 1u) % 0x4u;
00272
00273   /* Copy the remaining q31_t data */
00274   while(tapCnt > 0u)
00275   {
00276     *pStateCurnt++ = *pState++;
00277
00278     /* Decrement the loop counter */
00279     tapCnt--;
00280   }
00281
00282 #else
00283
00284   /* Run the below code for Cortex-M0 */
00285
00286   while(blkCnt > 0u)
00287   {
00288
00289     /* Copy the new input sample into the state buffer */
00290     *pStateCurnt++ = *pSrc;
00291
00292     /* Initialize pState pointer */
00293     px = pState;
00294
00295     /* Initialize pCoeffs pointer */
00296     pb = pCoeffs;
00297
00298     /* Read the sample from input buffer */
00299     in = *pSrc++;
00300
00301     /* Update the energy calculation */
00302     energy =
00303       (q31_t) ((((q63_t) energy << 32) - (((q63_t) x0 * x0) << 1)) >> 32);
00304     energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32);
00305
00306     /* Set the accumulator to zero */
00307     acc = 0;
00308
00309     /* Loop over numTaps number of values */
00310     tapCnt = numTaps;
00311
00312     while(tapCnt > 0u)
00313     {
00314       /* Perform the multiply-accumulate */
00315       acc += ((q63_t) (*px++)) * (*pb++);
00316
00317       /* Decrement the loop counter */
00318       tapCnt--;
00319     }
00320
00321     /* Converting the result to 1.31 format */
00322     acc = (q31_t) (acc >> shift);
00323
00324     /* Store the result from accumulator into the destination buffer. */
00325     *pOut++ = (q31_t) acc;
00326
00327     /* Compute and store error */
00328     d = *pRef++;
00329     e = d - (q31_t) acc;
00330     *pErr++ = e;
00331
00332     /* Calculates the reciprocal of energy */
00333     postShift =
00334       arm_recip_q31(energy + DELTA_Q31, &oneByEnergy, &S->recipTable[0]);
00335
00336     /* Calculation of product of (e * mu) */
00337     errorXmu = (q31_t) (((q63_t) e * mu) >> 31);
00338
00339     /* Weighting factor for the normalized version */
00340     w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift));
00341
00342     /* Initialize pState pointer */
00343     px = pState;
00344
00345     /* Initialize coeff pointer */
00346     pb = (pCoeffs);
00347
00348     /* Loop over numTaps number of values */
00349     tapCnt = numTaps;
00350
00351     while(tapCnt > 0u)
00352     {
00353       /* Perform the multiply-accumulate */
00354       /* coef is in 2.30 format */
00355       coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
00356       /* get coef in 1.31 format by left shifting */
00357       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00358       /* update coefficient buffer to next coefficient */
00359       pb++;
00360
00361       /* Decrement the loop counter */
00362       tapCnt--;
00363     }
00364
00365     /* Read the sample from state buffer */
00366     x0 = *pState;
00367
00368     /* Advance state pointer by 1 for the next sample */
00369     pState = pState + 1;
00370
00371     /* Decrement the loop counter */
00372     blkCnt--;
00373   }
00374
00375   /* Save energy and x0 values for the next frame */
00376   S->energy = (q31_t) energy;
00377   S->x0 = x0;
00378
00379   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00380      start of the state buffer. This prepares the state buffer for the
00381      next function call. */
00382
00383   /* Points to the start of the pState buffer */
00384   pStateCurnt = S->pState;
00385
00386   /* Loop for (numTaps - 1u) samples copy */
00387   tapCnt = (numTaps - 1u);
00388
00389   /* Copy the remaining q31_t data */
00390   while(tapCnt > 0u)
00391   {
00392     *pStateCurnt++ = *pState++;
00393
00394     /* Decrement the loop counter */
00395     tapCnt--;
00396   }
00397
00398 #endif /*   #ifndef ARM_MATH_CM0 */
00399
00400 }
00401
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_lms_q15.c
00009 *
00010 * Description:  Processing function for the Q15 LMS filter.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00066 void arm_lms_q15(
00067   const arm_lms_instance_q15 * S,
00068   q15_t * pSrc,
00069   q15_t * pRef,
00070   q15_t * pOut,
00071   q15_t * pErr,
00072   uint32_t blockSize)
00073 {
00074   q15_t *pState = S->pState;                     /* State pointer */
00075   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00076   q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00077   q15_t *pStateCurnt;                            /* Points to the current sample of the state */
00078   q15_t mu = S->mu;                              /* Adaptive factor */
00079   q15_t *px;                                     /* Temporary pointer for state */
00080   q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
00081   uint32_t tapCnt, blkCnt;                       /* Loop counters */
00082   q63_t acc;                                     /* Accumulator */
00083   q15_t e = 0;                                   /* error of data sample */
00084   q15_t alpha;                                   /* Intermediate constant for taps update */
00085   uint32_t shift = S->postShift + 1u;            /* Shift to be applied to the output */
00086
00087
00088 #ifndef ARM_MATH_CM0
00089
00090   /* Run the below code for Cortex-M4 and Cortex-M3 */
00091
00092   q31_t coef;                                    /* Teporary variable for coefficient */
00093
00094   /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
00095   /* pStateCurnt points to the location where the new input data should be written */
00096   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00097
00098   /* Initializing blkCnt with blockSize */
00099   blkCnt = blockSize;
00100
00101   while(blkCnt > 0u)
00102   {
00103     /* Copy the new input sample into the state buffer */
00104     *pStateCurnt++ = *pSrc++;
00105
00106     /* Initialize state pointer */
00107     px = pState;
00108
00109     /* Initialize coefficient pointer */
00110     pb = pCoeffs;
00111
00112     /* Set the accumulator to zero */
00113     acc = 0;
00114
00115     /* Loop unrolling.  Process 4 taps at a time. */
00116     tapCnt = numTaps >> 2u;
00117
00118     while(tapCnt > 0u)
00119     {
00120       /* acc +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
00121       /* Perform the multiply-accumulate */
00122       acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
00123       acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
00124
00125       /* Decrement the loop counter */
00126       tapCnt--;
00127     }
00128
00129     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00130     tapCnt = numTaps % 0x4u;
00131
00132     while(tapCnt > 0u)
00133     {
00134       /* Perform the multiply-accumulate */
00135       acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
00136
00137       /* Decrement the loop counter */
00138       tapCnt--;
00139     }
00140
00141     /* Converting the result to 1.15 format and saturate the output */
00142     acc = __SSAT((acc >> (16 - shift)), 16);
00143
00144     /* Store the result from accumulator into the destination buffer. */
00145     *pOut++ = (q15_t) acc;
00146
00147     /* Compute and store error */
00148     e = *pRef++ - (q15_t) acc;
00149
00150     *pErr++ = (q15_t) e;
00151
00152     /* Compute alpha i.e. intermediate constant for taps update */
00153     alpha = (q15_t) (((q31_t) e * (mu)) >> 15);
00154
00155     /* Initialize state pointer */
00156     /* Advance state pointer by 1 for the next sample */
00157     px = pState++;
00158
00159     /* Initialize coefficient pointer */
00160     pb = pCoeffs;
00161
00162     /* Loop unrolling.  Process 4 taps at a time. */
00163     tapCnt = numTaps >> 2u;
00164
00165     /* Update filter coefficients */
00166     while(tapCnt > 0u)
00167     {
00168       coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
00169       *pb++ = (q15_t) __SSAT((coef), 16);
00170       coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
00171       *pb++ = (q15_t) __SSAT((coef), 16);
00172       coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
00173       *pb++ = (q15_t) __SSAT((coef), 16);
00174       coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
00175       *pb++ = (q15_t) __SSAT((coef), 16);
00176
00177       /* Decrement the loop counter */
00178       tapCnt--;
00179     }
00180
00181     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00182     tapCnt = numTaps % 0x4u;
00183
00184     while(tapCnt > 0u)
00185     {
00186       /* Perform the multiply-accumulate */
00187       coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
00188       *pb++ = (q15_t) __SSAT((coef), 16);
00189
00190       /* Decrement the loop counter */
00191       tapCnt--;
00192     }
00193
00194     /* Decrement the loop counter */
00195     blkCnt--;
00196
00197   }
00198
00199   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00200      satrt of the state buffer. This prepares the state buffer for the
00201      next function call. */
00202
00203   /* Points to the start of the pState buffer */
00204   pStateCurnt = S->pState;
00205
00206   /* Calculation of count for copying integer writes */
00207   tapCnt = (numTaps - 1u) >> 2;
00208
00209   while(tapCnt > 0u)
00210   {
00211
00212     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00213     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00214
00215     tapCnt--;
00216
00217   }
00218
00219   /* Calculation of count for remaining q15_t data */
00220   tapCnt = (numTaps - 1u) % 0x4u;
00221
00222   /* copy data */
00223   while(tapCnt > 0u)
00224   {
00225     *pStateCurnt++ = *pState++;
00226
00227     /* Decrement the loop counter */
00228     tapCnt--;
00229   }
00230
00231 #else
00232
00233   /* Run the below code for Cortex-M0 */
00234
00235   /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
00236   /* pStateCurnt points to the location where the new input data should be written */
00237   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00238
00239   /* Loop over blockSize number of values */
00240   blkCnt = blockSize;
00241
00242   while(blkCnt > 0u)
00243   {
00244     /* Copy the new input sample into the state buffer */
00245     *pStateCurnt++ = *pSrc++;
00246
00247     /* Initialize pState pointer */
00248     px = pState;
00249
00250     /* Initialize pCoeffs pointer */
00251     pb = pCoeffs;
00252
00253     /* Set the accumulator to zero */
00254     acc = 0;
00255
00256     /* Loop over numTaps number of values */
00257     tapCnt = numTaps;
00258
00259     while(tapCnt > 0u)
00260     {
00261       /* Perform the multiply-accumulate */
00262       acc += (q63_t) ((q31_t) (*px++) * (*pb++));
00263
00264       /* Decrement the loop counter */
00265       tapCnt--;
00266     }
00267
00268     /* Converting the result to 1.15 format and saturate the output */
00269     acc = __SSAT((acc >> (16 - shift)), 16);
00270
00271     /* Store the result from accumulator into the destination buffer. */
00272     *pOut++ = (q15_t) acc;
00273
00274     /* Compute and store error */
00275     e = *pRef++ - (q15_t) acc;
00276
00277     *pErr++ = (q15_t) e;
00278
00279     /* Compute alpha i.e. intermediate constant for taps update */
00280     alpha = (q15_t) (((q31_t) e * (mu)) >> 15);
00281
00282     /* Initialize pState pointer */
00283     /* Advance state pointer by 1 for the next sample */
00284     px = pState++;
00285
00286     /* Initialize pCoeffs pointer */
00287     pb = pCoeffs;
00288
00289     /* Loop over numTaps number of values */
00290     tapCnt = numTaps;
00291
00292     while(tapCnt > 0u)
00293     {
00294       /* Perform the multiply-accumulate */
00295       *pb++ += (q15_t) (((q31_t) alpha * (*px++)) >> 15);
00296
00297       /* Decrement the loop counter */
00298       tapCnt--;
00299     }
00300
00301     /* Decrement the loop counter */
00302     blkCnt--;
00303
00304   }
00305
00306   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00307      start of the state buffer. This prepares the state buffer for the
00308      next function call. */
00309
00310   /* Points to the start of the pState buffer */
00311   pStateCurnt = S->pState;
00312
00313   /*  Copy (numTaps - 1u) samples  */
00314   tapCnt = (numTaps - 1u);
00315
00316   /* Copy the data */
00317   while(tapCnt > 0u)
00318   {
00319     *pStateCurnt++ = *pState++;
00320
00321     /* Decrement the loop counter */
00322     tapCnt--;
00323   }
00324
00325 #endif /*   #ifndef ARM_MATH_CM0 */
00326
00327 }
00328
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_lms_q31.c
00009 *
00010 * Description:  Processing function for the Q31 LMS filter.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00069 void arm_lms_q31(
00070   const arm_lms_instance_q31 * S,
00071   q31_t * pSrc,
00072   q31_t * pRef,
00073   q31_t * pOut,
00074   q31_t * pErr,
00075   uint32_t blockSize)
00076 {
00077   q31_t *pState = S->pState;                     /* State pointer */
00078   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00079   q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00080   q31_t *pStateCurnt;                            /* Points to the current sample of the state */
00081   q31_t mu = S->mu;                              /* Adaptive factor */
00082   q31_t *px;                                     /* Temporary pointer for state */
00083   q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
00084   uint32_t tapCnt, blkCnt;                       /* Loop counters */
00085   q63_t acc;                                     /* Accumulator */
00086   q31_t e = 0;                                   /* error of data sample */
00087   q31_t alpha;                                   /* Intermediate constant for taps update */
00088   uint8_t shift = (uint8_t) (32u - (S->postShift + 1u));        /* Shift to be applied to the output */
00089   q31_t coef;                                    /* Temporary variable for coef */
00090
00091   /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
00092   /* pStateCurnt points to the location where the new input data should be written */
00093   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00094
00095   /* Initializing blkCnt with blockSize */
00096   blkCnt = blockSize;
00097
00098
00099 #ifndef ARM_MATH_CM0
00100
00101   /* Run the below code for Cortex-M4 and Cortex-M3 */
00102
00103   while(blkCnt > 0u)
00104   {
00105     /* Copy the new input sample into the state buffer */
00106     *pStateCurnt++ = *pSrc++;
00107
00108     /* Initialize state pointer */
00109     px = pState;
00110
00111     /* Initialize coefficient pointer */
00112     pb = pCoeffs;
00113
00114     /* Set the accumulator to zero */
00115     acc = 0;
00116
00117     /* Loop unrolling.  Process 4 taps at a time. */
00118     tapCnt = numTaps >> 2;
00119
00120     while(tapCnt > 0u)
00121     {
00122       /* Perform the multiply-accumulate */
00123       /* acc +=  b[N] * x[n-N] */
00124       acc += ((q63_t) (*px++)) * (*pb++);
00125
00126       /* acc +=  b[N-1] * x[n-N-1] */
00127       acc += ((q63_t) (*px++)) * (*pb++);
00128
00129       /* acc +=  b[N-2] * x[n-N-2] */
00130       acc += ((q63_t) (*px++)) * (*pb++);
00131
00132       /* acc +=  b[N-3] * x[n-N-3] */
00133       acc += ((q63_t) (*px++)) * (*pb++);
00134
00135       /* Decrement the loop counter */
00136       tapCnt--;
00137     }
00138
00139     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00140     tapCnt = numTaps % 0x4u;
00141
00142     while(tapCnt > 0u)
00143     {
00144       /* Perform the multiply-accumulate */
00145       acc += ((q63_t) (*px++)) * (*pb++);
00146
00147       /* Decrement the loop counter */
00148       tapCnt--;
00149     }
00150
00151     /* Converting the result to 1.31 format */
00152     /* Store the result from accumulator into the destination buffer. */
00153     acc = (q31_t) (acc >> shift);
00154
00155     *pOut++ = (q31_t) acc;
00156
00157     /* Compute and store error */
00158     e = *pRef++ - (q31_t) acc;
00159
00160     *pErr++ = (q31_t) e;
00161
00162     /* Compute alpha i.e. intermediate constant for taps update */
00163     alpha = (q31_t) (((q63_t) e * mu) >> 31);
00164
00165     /* Initialize state pointer */
00166     /* Advance state pointer by 1 for the next sample */
00167     px = pState++;
00168
00169     /* Initialize coefficient pointer */
00170     pb = pCoeffs;
00171
00172     /* Loop unrolling.  Process 4 taps at a time. */
00173     tapCnt = numTaps >> 2;
00174
00175     /* Update filter coefficients */
00176     while(tapCnt > 0u)
00177     {
00178       /* coef is in 2.30 format */
00179       coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
00180       /* get coef in 1.31 format by left shifting */
00181       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00182       /* update coefficient buffer to next coefficient */
00183       pb++;
00184
00185       coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
00186       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00187       pb++;
00188
00189       coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
00190       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00191       pb++;
00192
00193       coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
00194       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00195       pb++;
00196
00197       /* Decrement the loop counter */
00198       tapCnt--;
00199     }
00200
00201     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00202     tapCnt = numTaps % 0x4u;
00203
00204     while(tapCnt > 0u)
00205     {
00206       /* Perform the multiply-accumulate */
00207       coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
00208       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00209       pb++;
00210
00211       /* Decrement the loop counter */
00212       tapCnt--;
00213     }
00214
00215     /* Decrement the loop counter */
00216     blkCnt--;
00217   }
00218
00219   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00220      satrt of the state buffer. This prepares the state buffer for the
00221      next function call. */
00222
00223   /* Points to the start of the pState buffer */
00224   pStateCurnt = S->pState;
00225
00226   /* Loop unrolling for (numTaps - 1u) samples copy */
00227   tapCnt = (numTaps - 1u) >> 2u;
00228
00229   /* copy data */
00230   while(tapCnt > 0u)
00231   {
00232     *pStateCurnt++ = *pState++;
00233     *pStateCurnt++ = *pState++;
00234     *pStateCurnt++ = *pState++;
00235     *pStateCurnt++ = *pState++;
00236
00237     /* Decrement the loop counter */
00238     tapCnt--;
00239   }
00240
00241   /* Calculate remaining number of copies */
00242   tapCnt = (numTaps - 1u) % 0x4u;
00243
00244   /* Copy the remaining q31_t data */
00245   while(tapCnt > 0u)
00246   {
00247     *pStateCurnt++ = *pState++;
00248
00249     /* Decrement the loop counter */
00250     tapCnt--;
00251   }
00252
00253 #else
00254
00255   /* Run the below code for Cortex-M0 */
00256
00257   while(blkCnt > 0u)
00258   {
00259     /* Copy the new input sample into the state buffer */
00260     *pStateCurnt++ = *pSrc++;
00261
00262     /* Initialize pState pointer */
00263     px = pState;
00264
00265     /* Initialize pCoeffs pointer */
00266     pb = pCoeffs;
00267
00268     /* Set the accumulator to zero */
00269     acc = 0;
00270
00271     /* Loop over numTaps number of values */
00272     tapCnt = numTaps;
00273
00274     while(tapCnt > 0u)
00275     {
00276       /* Perform the multiply-accumulate */
00277       acc += ((q63_t) (*px++)) * (*pb++);
00278
00279       /* Decrement the loop counter */
00280       tapCnt--;
00281     }
00282
00283     /* Converting the result to 1.31 format */
00284     /* Store the result from accumulator into the destination buffer. */
00285     acc = (q31_t) (acc >> shift);
00286
00287     *pOut++ = (q31_t) acc;
00288
00289     /* Compute and store error */
00290     e = *pRef++ - (q31_t) acc;
00291
00292     *pErr++ = (q31_t) e;
00293
00294     /* Weighting factor for the LMS version */
00295     alpha = (q31_t) (((q63_t) e * mu) >> 31);
00296
00297     /* Initialize pState pointer */
00298     /* Advance state pointer by 1 for the next sample */
00299     px = pState++;
00300
00301     /* Initialize pCoeffs pointer */
00302     pb = pCoeffs;
00303
00304     /* Loop over numTaps number of values */
00305     tapCnt = numTaps;
00306
00307     while(tapCnt > 0u)
00308     {
00309       /* Perform the multiply-accumulate */
00310       coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
00311       *pb += (coef << 1u);
00312       pb++;
00313
00314       /* Decrement the loop counter */
00315       tapCnt--;
00316     }
00317
00318     /* Decrement the loop counter */
00319     blkCnt--;
00320   }
00321
00322   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00323      start of the state buffer. This prepares the state buffer for the
00324      next function call. */
00325
00326   /* Points to the start of the pState buffer */
00327   pStateCurnt = S->pState;
00328
00329   /*  Copy (numTaps - 1u) samples  */
00330   tapCnt = (numTaps - 1u);
00331
00332   /* Copy the data */
00333   while(tapCnt > 0u)
00334   {
00335     *pStateCurnt++ = *pState++;
00336
00337     /* Decrement the loop counter */
00338     tapCnt--;
00339   }
00340
00341 #endif /*   #ifndef ARM_MATH_CM0 */
00342
00343 }
00344
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_mat_add_f32.c
00009 *
00010 * Description:  Floating-point matrix addition
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00068 arm_status arm_mat_add_f32(
00069   const arm_matrix_instance_f32 * pSrcA,
00070   const arm_matrix_instance_f32 * pSrcB,
00071   arm_matrix_instance_f32 * pDst)
00072 {
00073   float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A  */
00074   float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B  */
00075   float32_t *pOut = pDst->pData;                 /* output data matrix pointer   */
00076   uint32_t numSamples;                           /* total number of elements in the matrix  */
00077   uint32_t blkCnt;                               /* loop counters */
00078   arm_status status;                             /* status of matrix addition */
00079
00080 #ifdef ARM_MATH_MATRIX_CHECK
00081
00082
00083   /* Check for matrix mismatch condition */
00084   if((pSrcA->numRows != pSrcB->numRows) ||
00085      (pSrcA->numCols != pSrcB->numCols) ||
00086      (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
00087   {
00088     /* Set status as ARM_MATH_SIZE_MISMATCH */
00089     status = ARM_MATH_SIZE_MISMATCH;
00090   }
00091   else
00092 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00093
00094   {
00095
00096     /* Total number of samples in the input matrix */
00097     numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
00098
00099 #ifndef ARM_MATH_CM0
00100
00101     /* Run the below code for Cortex-M4 and Cortex-M3 */
00102
00103     /* Loop unrolling */
00104     blkCnt = numSamples >> 2u;
00105
00106     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00107      ** a second loop below computes the remaining 1 to 3 samples. */
00108     while(blkCnt > 0u)
00109     {
00110       /* C(m,n) = A(m,n) + B(m,n) */
00111       /* Add and then store the results in the destination buffer. */
00112       *pOut++ = (*pIn1++) + (*pIn2++);
00113       *pOut++ = (*pIn1++) + (*pIn2++);
00114       *pOut++ = (*pIn1++) + (*pIn2++);
00115       *pOut++ = (*pIn1++) + (*pIn2++);
00116
00117       /* Decrement the loop counter */
00118       blkCnt--;
00119     }
00120
00121     /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00122      ** No loop unrolling is used. */
00123     blkCnt = numSamples % 0x4u;
00124
00125 #else
00126
00127     /* Run the below code for Cortex-M0 */
00128
00129     /* Initialize blkCnt with number of samples */
00130     blkCnt = numSamples;
00131
00132 #endif /* #ifndef ARM_MATH_CM0 */
00133
00134     while(blkCnt > 0u)
00135     {
00136       /* C(m,n) = A(m,n) + B(m,n) */
00137       /* Add and then store the results in the destination buffer. */
00138       *pOut++ = (*pIn1++) + (*pIn2++);
00139
00140       /* Decrement the loop counter */
00141       blkCnt--;
00142     }
00143     /* set status as ARM_MATH_SUCCESS */
00144     status = ARM_MATH_SUCCESS;
00145
00146   }
00147
00148   /* Return to application */
00149   return (status);
00150 }
00151
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_mat_add_q15.c
00009 *
00010 * Description:  Q15 matrix addition
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00061 arm_status arm_mat_add_q15(
00062   const arm_matrix_instance_q15 * pSrcA,
00063   const arm_matrix_instance_q15 * pSrcB,
00064   arm_matrix_instance_q15 * pDst)
00065 {
00066   q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A  */
00067   q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
00068   q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
00069   uint16_t numSamples;                           /* total number of elements in the matrix  */
00070   uint32_t blkCnt;                               /* loop counters  */
00071   arm_status status;                             /* status of matrix addition  */
00072
00073 #ifdef ARM_MATH_MATRIX_CHECK
00074
00075
00076   /* Check for matrix mismatch condition */
00077   if((pSrcA->numRows != pSrcB->numRows) ||
00078      (pSrcA->numCols != pSrcB->numCols) ||
00079      (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
00080   {
00081     /* Set status as ARM_MATH_SIZE_MISMATCH */
00082     status = ARM_MATH_SIZE_MISMATCH;
00083   }
00084   else
00085 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00086
00087   {
00088     /* Total number of samples in the input matrix */
00089     numSamples = (uint16_t) (pSrcA->numRows * pSrcA->numCols);
00090
00091 #ifndef ARM_MATH_CM0
00092
00093     /* Run the below code for Cortex-M4 and Cortex-M3 */
00094
00095     /* Loop unrolling */
00096     blkCnt = (uint32_t) numSamples >> 2u;
00097
00098     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00099      ** a second loop below computes the remaining 1 to 3 samples. */
00100     while(blkCnt > 0u)
00101     {
00102       /* C(m,n) = A(m,n) + B(m,n) */
00103       /* Add, Saturate and then store the results in the destination buffer. */
00104       *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
00105       *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
00106
00107       /* Decrement the loop counter */
00108       blkCnt--;
00109     }
00110
00111     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00112      ** No loop unrolling is used. */
00113     blkCnt = (uint32_t) numSamples % 0x4u;
00114
00115     /* q15 pointers of input and output are initialized */
00116
00117     while(blkCnt > 0u)
00118     {
00119       /* C(m,n) = A(m,n) + B(m,n) */
00120       /* Add, Saturate and then store the results in the destination buffer. */
00121       *pOut++ = (q15_t) __QADD16(*pInA++, *pInB++);
00122
00123       /* Decrement the loop counter */
00124       blkCnt--;
00125     }
00126
00127 #else
00128
00129     /* Run the below code for Cortex-M0 */
00130
00131     /* Initialize blkCnt with number of samples */
00132     blkCnt = (uint32_t) numSamples;
00133
00134
00135     /* q15 pointers of input and output are initialized */
00136     while(blkCnt > 0u)
00137     {
00138       /* C(m,n) = A(m,n) + B(m,n) */
00139       /* Add, Saturate and then store the results in the destination buffer. */
00140       *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ + *pInB++), 16);
00141
00142       /* Decrement the loop counter */
00143       blkCnt--;
00144     }
00145
00146 #endif /* #ifndef ARM_MATH_CM0 */
00147
00148     /* set status as ARM_MATH_SUCCESS */
00149     status = ARM_MATH_SUCCESS;
00150   }
00151
00152   /* Return to application */
00153   return (status);
00154 }
00155
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_mat_add_q31.c
00009 *
00010 * Description:  Q31 matrix addition
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00061 arm_status arm_mat_add_q31(
00062   const arm_matrix_instance_q31 * pSrcA,
00063   const arm_matrix_instance_q31 * pSrcB,
00064   arm_matrix_instance_q31 * pDst)
00065 {
00066   q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
00067   q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
00068   q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
00069   uint32_t numSamples;                           /* total number of elements in the matrix  */
00070   uint32_t blkCnt;                               /* loop counters */
00071   arm_status status;                             /* status of matrix addition */
00072
00073 #ifdef ARM_MATH_MATRIX_CHECK
00074
00075
00076   /* Check for matrix mismatch condition */
00077   if((pSrcA->numRows != pSrcB->numRows) ||
00078      (pSrcA->numCols != pSrcB->numCols) ||
00079      (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
00080   {
00081     /* Set status as ARM_MATH_SIZE_MISMATCH */
00082     status = ARM_MATH_SIZE_MISMATCH;
00083   }
00084   else
00085 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00086
00087   {
00088     /* Total number of samples in the input matrix */
00089     numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
00090
00091 #ifndef ARM_MATH_CM0
00092
00093     /* Run the below code for Cortex-M4 and Cortex-M3 */
00094
00095     /* Loop Unrolling */
00096     blkCnt = numSamples >> 2u;
00097
00098
00099     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00100      ** a second loop below computes the remaining 1 to 3 samples. */
00101     while(blkCnt > 0u)
00102     {
00103       /* C(m,n) = A(m,n) + B(m,n) */
00104       /* Add, saturate and then store the results in the destination buffer. */
00105       *pOut++ = __QADD(*pIn1++, *pIn2++);
00106       *pOut++ = __QADD(*pIn1++, *pIn2++);
00107       *pOut++ = __QADD(*pIn1++, *pIn2++);
00108       *pOut++ = __QADD(*pIn1++, *pIn2++);
00109
00110       /* Decrement the loop counter */
00111       blkCnt--;
00112     }
00113
00114     /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00115      ** No loop unrolling is used. */
00116     blkCnt = numSamples % 0x4u;
00117
00118     while(blkCnt > 0u)
00119     {
00120       /* C(m,n) = A(m,n) + B(m,n) */
00121       /* Add, saturate and then store the results in the destination buffer. */
00122       *pOut++ = __QADD(*pIn1++, *pIn2++);
00123
00124       /* Decrement the loop counter */
00125       blkCnt--;
00126     }
00127
00128 #else
00129
00130     /* Run the below code for Cortex-M0 */
00131
00132     /* Initialize blkCnt with number of samples */
00133     blkCnt = numSamples;
00134
00135     while(blkCnt > 0u)
00136     {
00137       /* C(m,n) = A(m,n) + B(m,n) */
00138       /* Add, saturate and then store the results in the destination buffer. */
00139       *pOut++ = clip_q63_to_q31(((q63_t) (*pIn1++)) + (*pIn2++));
00140
00141       /* Decrement the loop counter */
00142       blkCnt--;
00143     }
00144
00145 #endif /* #ifndef ARM_MATH_CM0 */
00146
00147     /* set status as ARM_MATH_SUCCESS */
00148     status = ARM_MATH_SUCCESS;
00149   }
00150
00151   /* Return to application */
00152   return (status);
00153 }
00154
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_mat_init_f32.c
00009 *
00010 * Description:  Floating-point matrix initialization.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00065 void arm_mat_init_f32(
00066   arm_matrix_instance_f32 * S,
00067   uint16_t nRows,
00068   uint16_t nColumns,
00069   float32_t * pData)
00070 {
00071   /* Assign Number of Rows */
00072   S->numRows = nRows;
00073
00074   /* Assign Number of Columns */
00075   S->numCols = nColumns;
00076
00077   /* Assign Data pointer */
00078   S->pData = pData;
00079 }
00080
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_mat_init_q15.c
00009 *
00010 * Description:  Q15 matrix initialization.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------------- */
00035
00036
00037 #include "arm_math.h"
00038
00057 void arm_mat_init_q15(
00058   arm_matrix_instance_q15 * S,
00059   uint16_t nRows,
00060   uint16_t nColumns,
00061   q15_t * pData)
00062 {
00063   /* Assign Number of Rows */
00064   S->numRows = nRows;
00065
00066   /* Assign Number of Columns */
00067   S->numCols = nColumns;
00068
00069   /* Assign Data pointer */
00070   S->pData = pData;
00071 }
00072
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_mat_init_q31.c
00009 *
00010 * Description:  Q31 matrix initialization.
00011 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00012 *
00013 * Version 1.0.10 2011/7/15
00014 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00015 *
00016 * Version 1.0.3 2010/11/29
00017 *    Re-organized the CMSIS folders and updated documentation.
00018 *
00019 * Version 1.0.2 2010/11/11
00020 *    Documentation updated.
00021 *
00022 * Version 1.0.1 2010/10/05
00023 *    Production release and review comments incorporated.
00024 *
00025 * Version 1.0.0 2010/09/20
00026 *    Production release and review comments incorporated.
00027 *
00028 * Version 0.0.5  2010/04/26
00029 *    incorporated review comments and updated with latest CMSIS layer
00030 *
00031 * Version 0.0.3  2010/03/10
00032 *    Initial version
00033 * -------------------------------------------------------------------------- */
00034
00035
00036 #include "arm_math.h"
00037
00061 void arm_mat_init_q31(
00062   arm_matrix_instance_q31 * S,
00063   uint16_t nRows,
00064   uint16_t nColumns,
00065   q31_t * pData)
00066 {
00067   /* Assign Number of Rows */
00068   S->numRows = nRows;
00069
00070   /* Assign Number of Columns */
00071   S->numCols = nColumns;
00072
00073   /* Assign Data pointer */
00074   S->pData = pData;
00075 }
00076
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_mat_inverse_f32.c
00009 *
00010 * Description:  Floating-point matrix inverse.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00074 arm_status arm_mat_inverse_f32(
00075   const arm_matrix_instance_f32 * pSrc,
00076   arm_matrix_instance_f32 * pDst)
00077 {
00078   float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
00079   float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
00080   float32_t *pInT1, *pInT2;                      /* Temporary input data matrix pointer */
00081   float32_t *pInT3, *pInT4;                      /* Temporary output data matrix pointer */
00082   float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst;  /* Temporary input and output data matrix pointer */
00083   uint32_t numRows = pSrc->numRows;              /* Number of rows in the matrix  */
00084   uint32_t numCols = pSrc->numCols;              /* Number of Cols in the matrix  */
00085
00086 #ifndef ARM_MATH_CM0
00087
00088   /* Run the below code for Cortex-M4 and Cortex-M3 */
00089
00090   float32_t Xchg, in = 0.0f, in1;                /* Temporary input values  */
00091   uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l;      /* loop counters */
00092   arm_status status;                             /* status of matrix inverse */
00093
00094 #ifdef ARM_MATH_MATRIX_CHECK
00095
00096
00097   /* Check for matrix mismatch condition */
00098   if((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
00099      || (pSrc->numRows != pDst->numRows))
00100   {
00101     /* Set status as ARM_MATH_SIZE_MISMATCH */
00102     status = ARM_MATH_SIZE_MISMATCH;
00103   }
00104   else
00105 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00106
00107   {
00108
00109     /*--------------------------------------------------------------------------------------------------------------
00110          * Matrix Inverse can be solved using elementary row operations.
00111          *
00112          *      Gauss-Jordan Method:
00113          *
00114          *         1. First combine the identity matrix and the input matrix separated by a bar to form an
00115          *        augmented matrix as follows:
00116          *                                      _                      _         _             _
00117          *                                         |  a11  a12 | 1   0  |       |  X11 X12  |
00118          *                                         |           |        |   =   |           |
00119          *                                         |_ a21  a22 | 0   1 _|       |_ X21 X21 _|
00120          *
00121          *              2. In our implementation, pDst Matrix is used as identity matrix.
00122          *
00123          *              3. Begin with the first row. Let i = 1.
00124          *
00125          *          4. Check to see if the pivot for row i is zero.
00126          *                 The pivot is the element of the main diagonal that is on the current row.
00127          *                 For instance, if working with row i, then the pivot element is aii.
00128          *                 If the pivot is zero, exchange that row with a row below it that does not
00129          *                 contain a zero in column i. If this is not possible, then an inverse
00130          *                 to that matrix does not exist.
00131          *
00132          *          5. Divide every element of row i by the pivot.
00133          *
00134          *          6. For every row below and  row i, replace that row with the sum of that row and
00135          *                 a multiple of row i so that each new element in column i below row i is zero.
00136          *
00137          *          7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
00138          *                 for every element below and above the main diagonal.
00139          *
00140          *              8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
00141          *                 Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
00142          *----------------------------------------------------------------------------------------------------------------*/
00143
00144     /* Working pointer for destination matrix */
00145     pInT2 = pOut;
00146
00147     /* Loop over the number of rows */
00148     rowCnt = numRows;
00149
00150     /* Making the destination matrix as identity matrix */
00151     while(rowCnt > 0u)
00152     {
00153       /* Writing all zeroes in lower triangle of the destination matrix */
00154       j = numRows - rowCnt;
00155       while(j > 0u)
00156       {
00157         *pInT2++ = 0.0f;
00158         j--;
00159       }
00160
00161       /* Writing all ones in the diagonal of the destination matrix */
00162       *pInT2++ = 1.0f;
00163
00164       /* Writing all zeroes in upper triangle of the destination matrix */
00165       j = rowCnt - 1u;
00166       while(j > 0u)
00167       {
00168         *pInT2++ = 0.0f;
00169         j--;
00170       }
00171
00172       /* Decrement the loop counter */
00173       rowCnt--;
00174     }
00175
00176     /* Loop over the number of columns of the input matrix.
00177        All the elements in each column are processed by the row operations */
00178     loopCnt = numCols;
00179
00180     /* Index modifier to navigate through the columns */
00181     l = 0u;
00182
00183     while(loopCnt > 0u)
00184     {
00185       /* Check if the pivot element is zero..
00186        * If it is zero then interchange the row with non zero row below.
00187        * If there is no non zero element to replace in the rows below,
00188        * then the matrix is Singular. */
00189
00190       /* Working pointer for the input matrix that points
00191        * to the pivot element of the particular row  */
00192       pInT1 = pIn + (l * numCols);
00193
00194       /* Working pointer for the destination matrix that points
00195        * to the pivot element of the particular row  */
00196       pInT3 = pOut + (l * numCols);
00197
00198       /* Temporary variable to hold the pivot value */
00199       in = *pInT1;
00200
00201       /* Destination pointer modifier */
00202       k = 1u;
00203
00204       /* Check if the pivot element is zero */
00205       if(*pInT1 == 0.0f)
00206       {
00207         /* Loop over the number rows present below */
00208         i = numRows - (l + 1u);
00209
00210         while(i > 0u)
00211         {
00212           /* Update the input and destination pointers */
00213           pInT2 = pInT1 + (numCols * l);
00214           pInT4 = pInT3 + (numCols * k);
00215
00216           /* Check if there is a non zero pivot element to
00217            * replace in the rows below */
00218           if(*pInT2 != 0.0f)
00219           {
00220             /* Loop over number of columns
00221              * to the right of the pilot element */
00222             j = numCols - l;
00223
00224             while(j > 0u)
00225             {
00226               /* Exchange the row elements of the input matrix */
00227               Xchg = *pInT2;
00228               *pInT2++ = *pInT1;
00229               *pInT1++ = Xchg;
00230
00231               /* Decrement the loop counter */
00232               j--;
00233             }
00234
00235             /* Loop over number of columns of the destination matrix */
00236             j = numCols;
00237
00238             while(j > 0u)
00239             {
00240               /* Exchange the row elements of the destination matrix */
00241               Xchg = *pInT4;
00242               *pInT4++ = *pInT3;
00243               *pInT3++ = Xchg;
00244
00245               /* Decrement the loop counter */
00246               j--;
00247             }
00248
00249             /* Flag to indicate whether exchange is done or not */
00250             flag = 1u;
00251
00252             /* Break after exchange is done */
00253             break;
00254           }
00255
00256           /* Update the destination pointer modifier */
00257           k++;
00258
00259           /* Decrement the loop counter */
00260           i--;
00261         }
00262       }
00263
00264       /* Update the status if the matrix is singular */
00265       if((flag != 1u) && (in == 0.0f))
00266       {
00267         status = ARM_MATH_SINGULAR;
00268
00269         break;
00270       }
00271
00272       /* Points to the pivot row of input and destination matrices */
00273       pPivotRowIn = pIn + (l * numCols);
00274       pPivotRowDst = pOut + (l * numCols);
00275
00276       /* Temporary pointers to the pivot row pointers */
00277       pInT1 = pPivotRowIn;
00278       pInT2 = pPivotRowDst;
00279
00280       /* Pivot element of the row */
00281       in = *(pIn + (l * numCols));
00282
00283       /* Loop over number of columns
00284        * to the right of the pilot element */
00285       j = (numCols - l);
00286
00287       while(j > 0u)
00288       {
00289         /* Divide each element of the row of the input matrix
00290          * by the pivot element */
00291         in1 = *pInT1;
00292         *pInT1++ = in1 / in;
00293
00294         /* Decrement the loop counter */
00295         j--;
00296       }
00297
00298       /* Loop over number of columns of the destination matrix */
00299       j = numCols;
00300
00301       while(j > 0u)
00302       {
00303         /* Divide each element of the row of the destination matrix
00304          * by the pivot element */
00305         in1 = *pInT2;
00306         *pInT2++ = in1 / in;
00307
00308         /* Decrement the loop counter */
00309         j--;
00310       }
00311
00312       /* Replace the rows with the sum of that row and a multiple of row i
00313        * so that each new element in column i above row i is zero.*/
00314
00315       /* Temporary pointers for input and destination matrices */
00316       pInT1 = pIn;
00317       pInT2 = pOut;
00318
00319       /* index used to check for pivot element */
00320       i = 0u;
00321
00322       /* Loop over number of rows */
00323       /*  to be replaced by the sum of that row and a multiple of row i */
00324       k = numRows;
00325
00326       while(k > 0u)
00327       {
00328         /* Check for the pivot element */
00329         if(i == l)
00330         {
00331           /* If the processing element is the pivot element,
00332              only the columns to the right are to be processed */
00333           pInT1 += numCols - l;
00334
00335           pInT2 += numCols;
00336         }
00337         else
00338         {
00339           /* Element of the reference row */
00340           in = *pInT1;
00341
00342           /* Working pointers for input and destination pivot rows */
00343           pPRT_in = pPivotRowIn;
00344           pPRT_pDst = pPivotRowDst;
00345
00346           /* Loop over the number of columns to the right of the pivot element,
00347              to replace the elements in the input matrix */
00348           j = (numCols - l);
00349
00350           while(j > 0u)
00351           {
00352             /* Replace the element by the sum of that row
00353                and a multiple of the reference row  */
00354             in1 = *pInT1;
00355             *pInT1++ = in1 - (in * *pPRT_in++);
00356
00357             /* Decrement the loop counter */
00358             j--;
00359           }
00360
00361           /* Loop over the number of columns to
00362              replace the elements in the destination matrix */
00363           j = numCols;
00364
00365           while(j > 0u)
00366           {
00367             /* Replace the element by the sum of that row
00368                and a multiple of the reference row  */
00369             in1 = *pInT2;
00370             *pInT2++ = in1 - (in * *pPRT_pDst++);
00371
00372             /* Decrement the loop counter */
00373             j--;
00374           }
00375
00376         }
00377
00378         /* Increment the temporary input pointer */
00379         pInT1 = pInT1 + l;
00380
00381         /* Decrement the loop counter */
00382         k--;
00383
00384         /* Increment the pivot index */
00385         i++;
00386       }
00387
00388       /* Increment the input pointer */
00389       pIn++;
00390
00391       /* Decrement the loop counter */
00392       loopCnt--;
00393
00394       /* Increment the index modifier */
00395       l++;
00396     }
00397
00398
00399 #else
00400
00401   /* Run the below code for Cortex-M0 */
00402
00403   float32_t Xchg, in = 0.0f;                     /* Temporary input values  */
00404   uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l;      /* loop counters */
00405   arm_status status;                             /* status of matrix inverse */
00406
00407 #ifdef ARM_MATH_MATRIX_CHECK
00408
00409   /* Check for matrix mismatch condition */
00410   if((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
00411      || (pSrc->numRows != pDst->numRows))
00412   {
00413     /* Set status as ARM_MATH_SIZE_MISMATCH */
00414     status = ARM_MATH_SIZE_MISMATCH;
00415   }
00416   else
00417 #endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
00418   {
00419
00420     /*--------------------------------------------------------------------------------------------------------------
00421          * Matrix Inverse can be solved using elementary row operations.
00422          *
00423          *      Gauss-Jordan Method:
00424          *
00425          *         1. First combine the identity matrix and the input matrix separated by a bar to form an
00426          *        augmented matrix as follows:
00427          *                                      _  _          _     _      _   _         _             _
00428          *                                         |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |
00429          *                                         |  |            | | |        |   |   =   |           |
00430          *                                         |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|
00431          *
00432          *              2. In our implementation, pDst Matrix is used as identity matrix.
00433          *
00434          *              3. Begin with the first row. Let i = 1.
00435          *
00436          *          4. Check to see if the pivot for row i is zero.
00437          *                 The pivot is the element of the main diagonal that is on the current row.
00438          *                 For instance, if working with row i, then the pivot element is aii.
00439          *                 If the pivot is zero, exchange that row with a row below it that does not
00440          *                 contain a zero in column i. If this is not possible, then an inverse
00441          *                 to that matrix does not exist.
00442          *
00443          *          5. Divide every element of row i by the pivot.
00444          *
00445          *          6. For every row below and  row i, replace that row with the sum of that row and
00446          *                 a multiple of row i so that each new element in column i below row i is zero.
00447          *
00448          *          7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
00449          *                 for every element below and above the main diagonal.
00450          *
00451          *              8. Now an identical matrix is formed to the left of the bar(input matrix, src).
00452          *                 Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).
00453          *----------------------------------------------------------------------------------------------------------------*/
00454
00455     /* Working pointer for destination matrix */
00456     pInT2 = pOut;
00457
00458     /* Loop over the number of rows */
00459     rowCnt = numRows;
00460
00461     /* Making the destination matrix as identity matrix */
00462     while(rowCnt > 0u)
00463     {
00464       /* Writing all zeroes in lower triangle of the destination matrix */
00465       j = numRows - rowCnt;
00466       while(j > 0u)
00467       {
00468         *pInT2++ = 0.0f;
00469         j--;
00470       }
00471
00472       /* Writing all ones in the diagonal of the destination matrix */
00473       *pInT2++ = 1.0f;
00474
00475       /* Writing all zeroes in upper triangle of the destination matrix */
00476       j = rowCnt - 1u;
00477       while(j > 0u)
00478       {
00479         *pInT2++ = 0.0f;
00480         j--;
00481       }
00482
00483       /* Decrement the loop counter */
00484       rowCnt--;
00485     }
00486
00487     /* Loop over the number of columns of the input matrix.
00488        All the elements in each column are processed by the row operations */
00489     loopCnt = numCols;
00490
00491     /* Index modifier to navigate through the columns */
00492     l = 0u;
00493     //for(loopCnt = 0u; loopCnt < numCols; loopCnt++)
00494     while(loopCnt > 0u)
00495     {
00496       /* Check if the pivot element is zero..
00497        * If it is zero then interchange the row with non zero row below.
00498        * If there is no non zero element to replace in the rows below,
00499        * then the matrix is Singular. */
00500
00501       /* Working pointer for the input matrix that points
00502        * to the pivot element of the particular row  */
00503       pInT1 = pIn + (l * numCols);
00504
00505       /* Working pointer for the destination matrix that points
00506        * to the pivot element of the particular row  */
00507       pInT3 = pOut + (l * numCols);
00508
00509       /* Temporary variable to hold the pivot value */
00510       in = *pInT1;
00511
00512       /* Destination pointer modifier */
00513       k = 1u;
00514
00515       /* Check if the pivot element is zero */
00516       if(*pInT1 == 0.0f)
00517       {
00518         /* Loop over the number rows present below */
00519         for (i = (l + 1u); i < numRows; i++)
00520         {
00521           /* Update the input and destination pointers */
00522           pInT2 = pInT1 + (numCols * l);
00523           pInT4 = pInT3 + (numCols * k);
00524
00525           /* Check if there is a non zero pivot element to
00526            * replace in the rows below */
00527           if(*pInT2 != 0.0f)
00528           {
00529             /* Loop over number of columns
00530              * to the right of the pilot element */
00531             for (j = 0u; j < (numCols - l); j++)
00532             {
00533               /* Exchange the row elements of the input matrix */
00534               Xchg = *pInT2;
00535               *pInT2++ = *pInT1;
00536               *pInT1++ = Xchg;
00537             }
00538
00539             for (j = 0u; j < numCols; j++)
00540             {
00541               Xchg = *pInT4;
00542               *pInT4++ = *pInT3;
00543               *pInT3++ = Xchg;
00544             }
00545
00546             /* Flag to indicate whether exchange is done or not */
00547             flag = 1u;
00548
00549             /* Break after exchange is done */
00550             break;
00551           }
00552
00553           /* Update the destination pointer modifier */
00554           k++;
00555         }
00556       }
00557
00558       /* Update the status if the matrix is singular */
00559       if((flag != 1u) && (in == 0.0f))
00560       {
00561         status = ARM_MATH_SINGULAR;
00562
00563         break;
00564       }
00565
00566       /* Points to the pivot row of input and destination matrices */
00567       pPivotRowIn = pIn + (l * numCols);
00568       pPivotRowDst = pOut + (l * numCols);
00569
00570       /* Temporary pointers to the pivot row pointers */
00571       pInT1 = pPivotRowIn;
00572       pInT2 = pPivotRowDst;
00573
00574       /* Pivot element of the row */
00575       in = *(pIn + (l * numCols));
00576
00577       /* Loop over number of columns
00578        * to the right of the pilot element */
00579       for (j = 0u; j < (numCols - l); j++)
00580       {
00581         /* Divide each element of the row of the input matrix
00582          * by the pivot element */
00583         *pInT1++ = *pInT1 / in;
00584       }
00585       for (j = 0u; j < numCols; j++)
00586       {
00587         /* Divide each element of the row of the destination matrix
00588          * by the pivot element */
00589         *pInT2++ = *pInT2 / in;
00590       }
00591
00592       /* Replace the rows with the sum of that row and a multiple of row i
00593        * so that each new element in column i above row i is zero.*/
00594
00595       /* Temporary pointers for input and destination matrices */
00596       pInT1 = pIn;
00597       pInT2 = pOut;
00598
00599       for (i = 0u; i < numRows; i++)
00600       {
00601         /* Check for the pivot element */
00602         if(i == l)
00603         {
00604           /* If the processing element is the pivot element,
00605              only the columns to the right are to be processed */
00606           pInT1 += numCols - l;
00607           pInT2 += numCols;
00608         }
00609         else
00610         {
00611           /* Element of the reference row */
00612           in = *pInT1;
00613
00614           /* Working pointers for input and destination pivot rows */
00615           pPRT_in = pPivotRowIn;
00616           pPRT_pDst = pPivotRowDst;
00617
00618           /* Loop over the number of columns to the right of the pivot element,
00619              to replace the elements in the input matrix */
00620           for (j = 0u; j < (numCols - l); j++)
00621           {
00622             /* Replace the element by the sum of that row
00623                and a multiple of the reference row  */
00624             *pInT1++ = *pInT1 - (in * *pPRT_in++);
00625           }
00626           /* Loop over the number of columns to
00627              replace the elements in the destination matrix */
00628           for (j = 0u; j < numCols; j++)
00629           {
00630             /* Replace the element by the sum of that row
00631                and a multiple of the reference row  */
00632             *pInT2++ = *pInT2 - (in * *pPRT_pDst++);
00633           }
00634
00635         }
00636         /* Increment the temporary input pointer */
00637         pInT1 = pInT1 + l;
00638       }
00639       /* Increment the input pointer */
00640       pIn++;
00641
00642       /* Decrement the loop counter */
00643       loopCnt--;
00644       /* Increment the index modifier */
00645       l++;
00646     }
00647
00648
00649 #endif /* #ifndef ARM_MATH_CM0 */
00650
00651     /* Set status as ARM_MATH_SUCCESS */
00652     status = ARM_MATH_SUCCESS;
00653
00654     if((flag != 1u) && (in == 0.0f))
00655     {
00656       status = ARM_MATH_SINGULAR;
00657     }
00658   }
00659   /* Return to application */
00660   return (status);
00661 }
00662
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_mat_mult_f32.c
00009 *
00010 * Description:  Floating-point matrix multiplication.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00073 arm_status arm_mat_mult_f32(
00074   const arm_matrix_instance_f32 * pSrcA,
00075   const arm_matrix_instance_f32 * pSrcB,
00076   arm_matrix_instance_f32 * pDst)
00077 {
00078   float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
00079   float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
00080   float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A  */
00081   float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
00082   float32_t *px;                                 /* Temporary output data matrix pointer */
00083   float32_t sum;                                 /* Accumulator */
00084   uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
00085   uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
00086   uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
00087
00088 #ifndef ARM_MATH_CM0
00089
00090   /* Run the below code for Cortex-M4 and Cortex-M3 */
00091
00092   uint16_t col, i = 0u, j, row = numRowsA, colCnt;      /* loop counters */
00093   arm_status status;                             /* status of matrix multiplication */
00094
00095 #ifdef ARM_MATH_MATRIX_CHECK
00096
00097
00098   /* Check for matrix mismatch condition */
00099   if((pSrcA->numCols != pSrcB->numRows) ||
00100      (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
00101   {
00102
00103     /* Set status as ARM_MATH_SIZE_MISMATCH */
00104     status = ARM_MATH_SIZE_MISMATCH;
00105   }
00106   else
00107 #endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
00108
00109   {
00110     /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
00111     /* row loop */
00112     do
00113     {
00114       /* Output pointer is set to starting address of the row being processed */
00115       px = pOut + i;
00116
00117       /* For every row wise process, the column loop counter is to be initiated */
00118       col = numColsB;
00119
00120       /* For every row wise process, the pIn2 pointer is set
00121        ** to the starting address of the pSrcB data */
00122       pIn2 = pSrcB->pData;
00123
00124       j = 0u;
00125
00126       /* column loop */
00127       do
00128       {
00129         /* Set the variable sum, that acts as accumulator, to zero */
00130         sum = 0.0f;
00131
00132         /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
00133         pIn1 = pInA;
00134
00135         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00136         colCnt = numColsA >> 2;
00137
00138         /* matrix multiplication        */
00139         while(colCnt > 0u)
00140         {
00141           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00142           sum += *pIn1++ * (*pIn2);
00143           pIn2 += numColsB;
00144           sum += *pIn1++ * (*pIn2);
00145           pIn2 += numColsB;
00146           sum += *pIn1++ * (*pIn2);
00147           pIn2 += numColsB;
00148           sum += *pIn1++ * (*pIn2);
00149           pIn2 += numColsB;
00150
00151           /* Decrement the loop count */
00152           colCnt--;
00153         }
00154
00155         /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
00156          ** No loop unrolling is used. */
00157         colCnt = numColsA % 0x4u;
00158
00159         while(colCnt > 0u)
00160         {
00161           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00162           sum += *pIn1++ * (*pIn2);
00163           pIn2 += numColsB;
00164
00165           /* Decrement the loop counter */
00166           colCnt--;
00167         }
00168
00169         /* Store the result in the destination buffer */
00170         *px++ = sum;
00171
00172         /* Update the pointer pIn2 to point to the  starting address of the next column */
00173         j++;
00174         pIn2 = pSrcB->pData + j;
00175
00176         /* Decrement the column loop counter */
00177         col--;
00178
00179       } while(col > 0u);
00180
00181 #else
00182
00183   /* Run the below code for Cortex-M0 */
00184
00185   float32_t *pInB = pSrcB->pData;                /* input data matrix pointer B */
00186   uint16_t col, i = 0u, row = numRowsA, colCnt;  /* loop counters */
00187   arm_status status;                             /* status of matrix multiplication */
00188
00189 #ifdef ARM_MATH_MATRIX_CHECK
00190
00191   /* Check for matrix mismatch condition */
00192   if((pSrcA->numCols != pSrcB->numRows) ||
00193      (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
00194   {
00195
00196     /* Set status as ARM_MATH_SIZE_MISMATCH */
00197     status = ARM_MATH_SIZE_MISMATCH;
00198   }
00199   else
00200 #endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
00201
00202   {
00203     /* The following loop performs the dot-product of each row in pInA with each column in pInB */
00204     /* row loop */
00205     do
00206     {
00207       /* Output pointer is set to starting address of the row being processed */
00208       px = pOut + i;
00209
00210       /* For every row wise process, the column loop counter is to be initiated */
00211       col = numColsB;
00212
00213       /* For every row wise process, the pIn2 pointer is set
00214        ** to the starting address of the pSrcB data */
00215       pIn2 = pSrcB->pData;
00216
00217       /* column loop */
00218       do
00219       {
00220         /* Set the variable sum, that acts as accumulator, to zero */
00221         sum = 0.0f;
00222
00223         /* Initialize the pointer pIn1 to point to the starting address of the row being processed */
00224         pIn1 = pInA;
00225
00226         /* Matrix A columns number of MAC operations are to be performed */
00227         colCnt = numColsA;
00228
00229         while(colCnt > 0u)
00230         {
00231           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00232           sum += *pIn1++ * (*pIn2);
00233           pIn2 += numColsB;
00234
00235           /* Decrement the loop counter */
00236           colCnt--;
00237         }
00238
00239         /* Store the result in the destination buffer */
00240         *px++ = sum;
00241
00242         /* Decrement the column loop counter */
00243         col--;
00244
00245         /* Update the pointer pIn2 to point to the  starting address of the next column */
00246         pIn2 = pInB + (numColsB - col);
00247
00248       } while(col > 0u);
00249
00250 #endif /* #ifndef ARM_MATH_CM0 */
00251
00252       /* Update the pointer pInA to point to the  starting address of the next row */
00253       i = i + numColsB;
00254       pInA = pInA + numColsA;
00255
00256       /* Decrement the row loop counter */
00257       row--;
00258
00259     } while(row > 0u);
00260     /* Set status as ARM_MATH_SUCCESS */
00261     status = ARM_MATH_SUCCESS;
00262   }
00263
00264   /* Return to application */
00265   return (status);
00266 }
00267
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_mat_mult_fast_q15.c
00009 *
00010 * Description:   Q15 matrix multiplication (fast variant)
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00074 arm_status arm_mat_mult_fast_q15(
00075   const arm_matrix_instance_q15 * pSrcA,
00076   const arm_matrix_instance_q15 * pSrcB,
00077   arm_matrix_instance_q15 * pDst,
00078   q15_t * pState)
00079 {
00080   q31_t sum;                                     /* accumulator */
00081   q31_t in;                                      /* Temporary variable to hold the input value */
00082   q15_t *pSrcBT = pState;                        /* input data matrix pointer for transpose */
00083   q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
00084   q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
00085 //  q15_t *pDst = pDst->pData;                   /* output data matrix pointer */
00086   q15_t *px;                                     /* Temporary output data matrix pointer */
00087   uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
00088   uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
00089   uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
00090   uint16_t numRowsB = pSrcB->numRows;            /* number of rows of input matrix A    */
00091   uint16_t col, i = 0u, row = numRowsB, colCnt;  /* loop counters */
00092   arm_status status;                             /* status of matrix multiplication */
00093
00094 #ifdef ARM_MATH_MATRIX_CHECK
00095
00096
00097   /* Check for matrix mismatch condition */
00098
00099   if((pSrcA->numCols != pSrcB->numRows) ||
00100      (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
00101   {
00102     /* Set status as ARM_MATH_SIZE_MISMATCH */
00103     status = ARM_MATH_SIZE_MISMATCH;
00104   }
00105   else
00106 #endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
00107
00108   {
00109     /* Matrix transpose */
00110     do
00111     {
00112       /* Apply loop unrolling and exchange the columns with row elements */
00113       col = numColsB >> 2;
00114
00115       /* The pointer px is set to starting address of the column being processed */
00116       px = pSrcBT + i;
00117
00118       /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00119        ** a second loop below computes the remaining 1 to 3 samples. */
00120       while(col > 0u)
00121       {
00122         /* Read two elements from the row */
00123         in = *__SIMD32(pInB)++;
00124
00125         /* Unpack and store one element in the destination */
00126 #ifndef ARM_MATH_BIG_ENDIAN
00127
00128         *px = (q15_t) in;
00129
00130 #else
00131
00132         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00133
00134 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00135
00136         /* Update the pointer px to point to the next row of the transposed matrix */
00137         px += numRowsB;
00138
00139         /* Unpack and store the second element in the destination */
00140 #ifndef ARM_MATH_BIG_ENDIAN
00141
00142         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00143
00144 #else
00145
00146         *px = (q15_t) in;
00147
00148 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00149
00150
00151         /* Update the pointer px to point to the next row of the transposed matrix */
00152         px += numRowsB;
00153
00154         /* Read two elements from the row */
00155         in = *__SIMD32(pInB)++;
00156
00157         /* Unpack and store one element in the destination */
00158 #ifndef ARM_MATH_BIG_ENDIAN
00159
00160         *px = (q15_t) in;
00161
00162 #else
00163
00164         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00165
00166 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00167
00168         /* Update the pointer px to point to the next row of the transposed matrix */
00169         px += numRowsB;
00170
00171         /* Unpack and store the second element in the destination */
00172
00173 #ifndef ARM_MATH_BIG_ENDIAN
00174
00175         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00176
00177 #else
00178
00179         *px = (q15_t) in;
00180
00181 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00182
00183         /* Update the pointer px to point to the next row of the transposed matrix */
00184         px += numRowsB;
00185
00186         /* Decrement the column loop counter */
00187         col--;
00188       }
00189
00190       /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
00191        ** No loop unrolling is used. */
00192       col = numColsB % 0x4u;
00193
00194       while(col > 0u)
00195       {
00196         /* Read and store the input element in the destination */
00197         *px = *pInB++;
00198
00199         /* Update the pointer px to point to the next row of the transposed matrix */
00200         px += numRowsB;
00201
00202         /* Decrement the column loop counter */
00203         col--;
00204       }
00205
00206       i++;
00207
00208       /* Decrement the row loop counter */
00209       row--;
00210
00211     } while(row > 0u);
00212
00213     /* Reset the variables for the usage in the following multiplication process */
00214     row = numRowsA;
00215     i = 0u;
00216     px = pDst->pData;
00217
00218     /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
00219     /* row loop */
00220     do
00221     {
00222       /* For every row wise process, the column loop counter is to be initiated */
00223       col = numColsB;
00224
00225       /* For every row wise process, the pIn2 pointer is set
00226        ** to the starting address of the transposed pSrcB data */
00227       pInB = pSrcBT;
00228
00229       /* column loop */
00230       do
00231       {
00232         /* Set the variable sum, that acts as accumulator, to zero */
00233         sum = 0;
00234
00235         /* Apply loop unrolling and compute 2 MACs simultaneously. */
00236         colCnt = numColsA >> 1;
00237
00238         /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
00239         pInA = pSrcA->pData + i;
00240
00241         /* matrix multiplication */
00242         while(colCnt > 0u)
00243         {
00244           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00245           sum = __SMLAD(*__SIMD32(pInA)++, *__SIMD32(pInB)++, sum);
00246
00247           /* Decrement the loop counter */
00248           colCnt--;
00249         }
00250
00251         /* process odd column samples */
00252         if((numColsA & 0x1u) > 0u)
00253         {
00254           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00255           sum += ((q31_t) * pInA * (*pInB++));
00256         }
00257
00258         /* Saturate and store the result in the destination buffer */
00259         *px = (q15_t) (sum >> 15);
00260         px++;
00261
00262         /* Decrement the column loop counter */
00263         col--;
00264
00265       } while(col > 0u);
00266
00267       i = i + numColsA;
00268
00269       /* Decrement the row loop counter */
00270       row--;
00271
00272     } while(row > 0u);
00273
00274     /* set status as ARM_MATH_SUCCESS */
00275     status = ARM_MATH_SUCCESS;
00276   }
00277
00278   /* Return to application */
00279   return (status);
00280 }
00281
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_mat_mult_fast_q31.c
00009 *
00010 * Description:   Q31 matrix multiplication (fast variant).
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00072 arm_status arm_mat_mult_fast_q31(
00073   const arm_matrix_instance_q31 * pSrcA,
00074   const arm_matrix_instance_q31 * pSrcB,
00075   arm_matrix_instance_q31 * pDst)
00076 {
00077   q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
00078   q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
00079   q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
00080 //  q31_t *pSrcB = pSrcB->pData;                    /* input data matrix pointer B */
00081   q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
00082   q31_t *px;                                     /* Temporary output data matrix pointer */
00083   q31_t sum;                                     /* Accumulator */
00084   uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
00085   uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
00086   uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
00087   uint16_t col, i = 0u, j, row = numRowsA, colCnt;      /* loop counters */
00088   arm_status status;                             /* status of matrix multiplication */
00089
00090
00091 #ifdef ARM_MATH_MATRIX_CHECK
00092
00093
00094   /* Check for matrix mismatch condition */
00095   if((pSrcA->numCols != pSrcB->numRows) ||
00096      (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
00097   {
00098     /* Set status as ARM_MATH_SIZE_MISMATCH */
00099     status = ARM_MATH_SIZE_MISMATCH;
00100   }
00101   else
00102 #endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
00103
00104   {
00105     /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
00106     /* row loop */
00107     do
00108     {
00109       /* Output pointer is set to starting address of the row being processed */
00110       px = pOut + i;
00111
00112       /* For every row wise process, the column loop counter is to be initiated */
00113       col = numColsB;
00114
00115       /* For every row wise process, the pIn2 pointer is set
00116        ** to the starting address of the pSrcB data */
00117       pIn2 = pSrcB->pData;
00118
00119       j = 0u;
00120
00121       /* column loop */
00122       do
00123       {
00124         /* Set the variable sum, that acts as accumulator, to zero */
00125         sum = 0;
00126
00127         /* Initiate the pointer pIn1 to point to the starting address of pInA */
00128         pIn1 = pInA;
00129
00130         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00131         colCnt = numColsA >> 2;
00132
00133
00134         /* matrix multiplication */
00135         while(colCnt > 0u)
00136         {
00137           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00138           /* Perform the multiply-accumulates */
00139           sum = (q31_t) ((((q63_t) sum << 32) +
00140                           ((q63_t) * pIn1++ * (*pIn2))) >> 32);
00141           pIn2 += numColsB;
00142           sum = (q31_t) ((((q63_t) sum << 32) +
00143                           ((q63_t) * pIn1++ * (*pIn2))) >> 32);
00144           pIn2 += numColsB;
00145           sum = (q31_t) ((((q63_t) sum << 32) +
00146                           ((q63_t) * pIn1++ * (*pIn2))) >> 32);
00147           pIn2 += numColsB;
00148           sum = (q31_t) ((((q63_t) sum << 32) +
00149                           ((q63_t) * pIn1++ * (*pIn2))) >> 32);
00150           pIn2 += numColsB;
00151
00152           /* Decrement the loop counter */
00153           colCnt--;
00154         }
00155
00156         /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here.
00157          ** No loop unrolling is used. */
00158         colCnt = numColsA % 0x4u;
00159
00160         while(colCnt > 0u)
00161         {
00162           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00163           /* Perform the multiply-accumulates */
00164           sum = (q31_t) ((((q63_t) sum << 32) +
00165                           ((q63_t) * pIn1++ * (*pIn2))) >> 32);
00166           pIn2 += numColsB;
00167
00168           /* Decrement the loop counter */
00169           colCnt--;
00170         }
00171
00172         /* Convert the result from 2.30 to 1.31 format and store in destination buffer */
00173         *px++ = sum << 1;
00174
00175         /* Update the pointer pIn2 to point to the  starting address of the next column */
00176         j++;
00177         pIn2 = pSrcB->pData + j;
00178
00179         /* Decrement the column loop counter */
00180         col--;
00181
00182       } while(col > 0u);
00183
00184       /* Update the pointer pInA to point to the  starting address of the next row */
00185       i = i + numColsB;
00186       pInA = pInA + numColsA;
00187
00188       /* Decrement the row loop counter */
00189       row--;
00190
00191     } while(row > 0u);
00192
00193     /* set status as ARM_MATH_SUCCESS */
00194     status = ARM_MATH_SUCCESS;
00195   }
00196   /* Return to application */
00197   return (status);
00198 }
00199
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_mat_mult_q15.c
00009 *
00010 * Description:   Q15 matrix multiplication.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00074 arm_status arm_mat_mult_q15(
00075   const arm_matrix_instance_q15 * pSrcA,
00076   const arm_matrix_instance_q15 * pSrcB,
00077   arm_matrix_instance_q15 * pDst,
00078   q15_t * pState)
00079 {
00080   q63_t sum;                                     /* accumulator */
00081
00082 #ifndef ARM_MATH_CM0
00083
00084   /* Run the below code for Cortex-M4 and Cortex-M3 */
00085
00086   q31_t in;                                      /* Temporary variable to hold the input value */
00087   q15_t *pSrcBT = pState;                        /* input data matrix pointer for transpose */
00088   q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
00089   q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
00090   q15_t *px;                                     /* Temporary output data matrix pointer */
00091   uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
00092   uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
00093   uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
00094   uint16_t numRowsB = pSrcB->numRows;            /* number of rows of input matrix A    */
00095   uint16_t col, i = 0u, row = numRowsB, colCnt;  /* loop counters */
00096   arm_status status;                             /* status of matrix multiplication */
00097
00098 #ifdef ARM_MATH_MATRIX_CHECK
00099
00100
00101   /* Check for matrix mismatch condition */
00102
00103   if((pSrcA->numCols != pSrcB->numRows) ||
00104      (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
00105   {
00106     /* Set status as ARM_MATH_SIZE_MISMATCH */
00107     status = ARM_MATH_SIZE_MISMATCH;
00108   }
00109   else
00110 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00111
00112   {
00113     /* Matrix transpose */
00114     do
00115     {
00116       /* Apply loop unrolling and exchange the columns with row elements */
00117       col = numColsB >> 2;
00118
00119       /* The pointer px is set to starting address of the column being processed */
00120       px = pSrcBT + i;
00121
00122       /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00123        ** a second loop below computes the remaining 1 to 3 samples. */
00124       while(col > 0u)
00125       {
00126         /* Read two elements from the row */
00127         in = *__SIMD32(pInB)++;
00128
00129         /* Unpack and store one element in the destination */
00130 #ifndef ARM_MATH_BIG_ENDIAN
00131
00132         *px = (q15_t) in;
00133
00134 #else
00135
00136         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00137
00138 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00139
00140         /* Update the pointer px to point to the next row of the transposed matrix */
00141         px += numRowsB;
00142
00143         /* Unpack and store the second element in the destination */
00144 #ifndef ARM_MATH_BIG_ENDIAN
00145
00146         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00147
00148 #else
00149
00150         *px = (q15_t) in;
00151
00152 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00153
00154
00155         /* Update the pointer px to point to the next row of the transposed matrix */
00156         px += numRowsB;
00157
00158         /* Read two elements from the row */
00159         in = *__SIMD32(pInB)++;
00160
00161         /* Unpack and store one element in the destination */
00162 #ifndef ARM_MATH_BIG_ENDIAN
00163
00164         *px = (q15_t) in;
00165
00166 #else
00167
00168         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00169
00170 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00171
00172         /* Update the pointer px to point to the next row of the transposed matrix */
00173         px += numRowsB;
00174
00175         /* Unpack and store the second element in the destination */
00176
00177 #ifndef ARM_MATH_BIG_ENDIAN
00178
00179         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00180
00181 #else
00182
00183         *px = (q15_t) in;
00184
00185 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00186
00187         /* Update the pointer px to point to the next row of the transposed matrix */
00188         px += numRowsB;
00189
00190         /* Decrement the column loop counter */
00191         col--;
00192       }
00193
00194       /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
00195        ** No loop unrolling is used. */
00196       col = numColsB % 0x4u;
00197
00198       while(col > 0u)
00199       {
00200         /* Read and store the input element in the destination */
00201         *px = *pInB++;
00202
00203         /* Update the pointer px to point to the next row of the transposed matrix */
00204         px += numRowsB;
00205
00206         /* Decrement the column loop counter */
00207         col--;
00208       }
00209
00210       i++;
00211
00212       /* Decrement the row loop counter */
00213       row--;
00214
00215     } while(row > 0u);
00216
00217     /* Reset the variables for the usage in the following multiplication process */
00218     row = numRowsA;
00219     i = 0u;
00220     px = pDst->pData;
00221
00222     /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
00223     /* row loop */
00224     do
00225     {
00226       /* For every row wise process, the column loop counter is to be initiated */
00227       col = numColsB;
00228
00229       /* For every row wise process, the pIn2 pointer is set
00230        ** to the starting address of the transposed pSrcB data */
00231       pInB = pSrcBT;
00232
00233       /* column loop */
00234       do
00235       {
00236         /* Set the variable sum, that acts as accumulator, to zero */
00237         sum = 0;
00238
00239         /* Apply loop unrolling and compute 2 MACs simultaneously. */
00240         colCnt = numColsA >> 1;
00241
00242         /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
00243         pInA = pSrcA->pData + i;
00244
00245         /* matrix multiplication */
00246         while(colCnt > 0u)
00247         {
00248           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00249           sum = __SMLALD(*__SIMD32(pInA)++, *__SIMD32(pInB)++, sum);
00250
00251           /* Decrement the loop counter */
00252           colCnt--;
00253         }
00254
00255         /* process odd column samples */
00256         if((numColsA & 0x1u) > 0u)
00257         {
00258           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00259           sum += ((q31_t) * pInA * (*pInB++));
00260         }
00261
00262         /* Saturate and store the result in the destination buffer */
00263         *px = (q15_t) (__SSAT((sum >> 15), 16));
00264         px++;
00265
00266         /* Decrement the column loop counter */
00267         col--;
00268
00269       } while(col > 0u);
00270
00271       i = i + numColsA;
00272
00273       /* Decrement the row loop counter */
00274       row--;
00275
00276     } while(row > 0u);
00277
00278 #else
00279
00280   /* Run the below code for Cortex-M0 */
00281
00282   q15_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
00283   q15_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
00284   q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
00285   q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
00286   q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
00287   q15_t *px;                                     /* Temporary output data matrix pointer */
00288   uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
00289   uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
00290   uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
00291   uint16_t col, i = 0u, row = numRowsA, colCnt;  /* loop counters */
00292   arm_status status;                             /* status of matrix multiplication */
00293
00294 #ifdef ARM_MATH_MATRIX_CHECK
00295
00296   /* Check for matrix mismatch condition */
00297   if((pSrcA->numCols != pSrcB->numRows) ||
00298      (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
00299   {
00300     /* Set status as ARM_MATH_SIZE_MISMATCH */
00301     status = ARM_MATH_SIZE_MISMATCH;
00302   }
00303   else
00304 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00305
00306   {
00307     /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
00308     /* row loop */
00309     do
00310     {
00311       /* Output pointer is set to starting address of the row being processed */
00312       px = pOut + i;
00313
00314       /* For every row wise process, the column loop counter is to be initiated */
00315       col = numColsB;
00316
00317       /* For every row wise process, the pIn2 pointer is set
00318        ** to the starting address of the pSrcB data */
00319       pIn2 = pSrcB->pData;
00320
00321       /* column loop */
00322       do
00323       {
00324         /* Set the variable sum, that acts as accumulator, to zero */
00325         sum = 0;
00326
00327         /* Initiate the pointer pIn1 to point to the starting address of pSrcA */
00328         pIn1 = pInA;
00329
00330         /* Matrix A columns number of MAC operations are to be performed */
00331         colCnt = numColsA;
00332
00333         /* matrix multiplication */
00334         while(colCnt > 0u)
00335         {
00336           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00337           /* Perform the multiply-accumulates */
00338           sum += (q31_t) * pIn1++ * *pIn2;
00339           pIn2 += numColsB;
00340
00341           /* Decrement the loop counter */
00342           colCnt--;
00343         }
00344
00345         /* Convert the result from 34.30 to 1.15 format and store the saturated value in destination buffer */
00346         /* Saturate and store the result in the destination buffer */
00347         *px++ = (q15_t) __SSAT((sum >> 15), 16);
00348
00349         /* Decrement the column loop counter */
00350         col--;
00351
00352         /* Update the pointer pIn2 to point to the  starting address of the next column */
00353         pIn2 = pInB + (numColsB - col);
00354
00355       } while(col > 0u);
00356
00357       /* Update the pointer pSrcA to point to the  starting address of the next row */
00358       i = i + numColsB;
00359       pInA = pInA + numColsA;
00360
00361       /* Decrement the row loop counter */
00362       row--;
00363
00364     } while(row > 0u);
00365
00366 #endif /* #ifndef ARM_MATH_CM0 */
00367
00368     /* set status as ARM_MATH_SUCCESS */
00369     status = ARM_MATH_SUCCESS;
00370   }
00371
00372   /* Return to application */
00373   return (status);
00374 }
00375
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_mat_mult_q31.c
00009 *
00010 * Description:   Q31 matrix multiplication.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00073 arm_status arm_mat_mult_q31(
00074   const arm_matrix_instance_q31 * pSrcA,
00075   const arm_matrix_instance_q31 * pSrcB,
00076   arm_matrix_instance_q31 * pDst)
00077 {
00078   q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
00079   q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
00080   q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
00081   q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
00082   q31_t *px;                                     /* Temporary output data matrix pointer */
00083   q63_t sum;                                     /* Accumulator */
00084   uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
00085   uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
00086   uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
00087
00088 #ifndef ARM_MATH_CM0
00089
00090   /* Run the below code for Cortex-M4 and Cortex-M3 */
00091
00092   uint16_t col, i = 0u, j, row = numRowsA, colCnt;      /* loop counters */
00093   arm_status status;                             /* status of matrix multiplication */
00094
00095
00096 #ifdef ARM_MATH_MATRIX_CHECK
00097
00098
00099   /* Check for matrix mismatch condition */
00100   if((pSrcA->numCols != pSrcB->numRows) ||
00101      (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
00102   {
00103     /* Set status as ARM_MATH_SIZE_MISMATCH */
00104     status = ARM_MATH_SIZE_MISMATCH;
00105   }
00106   else
00107 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00108
00109   {
00110     /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
00111     /* row loop */
00112     do
00113     {
00114       /* Output pointer is set to starting address of the row being processed */
00115       px = pOut + i;
00116
00117       /* For every row wise process, the column loop counter is to be initiated */
00118       col = numColsB;
00119
00120       /* For every row wise process, the pIn2 pointer is set
00121        ** to the starting address of the pSrcB data */
00122       pIn2 = pSrcB->pData;
00123
00124       j = 0u;
00125
00126       /* column loop */
00127       do
00128       {
00129         /* Set the variable sum, that acts as accumulator, to zero */
00130         sum = 0;
00131
00132         /* Initiate the pointer pIn1 to point to the starting address of pInA */
00133         pIn1 = pInA;
00134
00135         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00136         colCnt = numColsA >> 2;
00137
00138
00139         /* matrix multiplication */
00140         while(colCnt > 0u)
00141         {
00142           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00143           /* Perform the multiply-accumulates */
00144           sum += (q63_t) * pIn1++ * *pIn2;
00145           pIn2 += numColsB;
00146
00147           sum += (q63_t) * pIn1++ * *pIn2;
00148           pIn2 += numColsB;
00149
00150           sum += (q63_t) * pIn1++ * *pIn2;
00151           pIn2 += numColsB;
00152
00153           sum += (q63_t) * pIn1++ * *pIn2;
00154           pIn2 += numColsB;
00155
00156           /* Decrement the loop counter */
00157           colCnt--;
00158         }
00159
00160         /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here.
00161          ** No loop unrolling is used. */
00162         colCnt = numColsA % 0x4u;
00163
00164         while(colCnt > 0u)
00165         {
00166           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00167           /* Perform the multiply-accumulates */
00168           sum += (q63_t) * pIn1++ * *pIn2;
00169           pIn2 += numColsB;
00170
00171           /* Decrement the loop counter */
00172           colCnt--;
00173         }
00174
00175         /* Convert the result from 2.62 to 1.31 format and store in destination buffer */
00176         *px++ = (q31_t) (sum >> 31);
00177
00178         /* Update the pointer pIn2 to point to the  starting address of the next column */
00179         j++;
00180         pIn2 = (pSrcB->pData) + j;
00181
00182         /* Decrement the column loop counter */
00183         col--;
00184
00185       } while(col > 0u);
00186
00187 #else
00188
00189   /* Run the below code for Cortex-M0 */
00190
00191   q31_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
00192   uint16_t col, i = 0u, row = numRowsA, colCnt;  /* loop counters */
00193   arm_status status;                             /* status of matrix multiplication */
00194
00195
00196 #ifdef ARM_MATH_MATRIX_CHECK
00197
00198   /* Check for matrix mismatch condition */
00199   if((pSrcA->numCols != pSrcB->numRows) ||
00200      (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
00201   {
00202     /* Set status as ARM_MATH_SIZE_MISMATCH */
00203     status = ARM_MATH_SIZE_MISMATCH;
00204   }
00205   else
00206 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00207
00208   {
00209     /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
00210     /* row loop */
00211     do
00212     {
00213       /* Output pointer is set to starting address of the row being processed */
00214       px = pOut + i;
00215
00216       /* For every row wise process, the column loop counter is to be initiated */
00217       col = numColsB;
00218
00219       /* For every row wise process, the pIn2 pointer is set
00220        ** to the starting address of the pSrcB data */
00221       pIn2 = pSrcB->pData;
00222
00223       /* column loop */
00224       do
00225       {
00226         /* Set the variable sum, that acts as accumulator, to zero */
00227         sum = 0;
00228
00229         /* Initiate the pointer pIn1 to point to the starting address of pInA */
00230         pIn1 = pInA;
00231
00232         /* Matrix A columns number of MAC operations are to be performed */
00233         colCnt = numColsA;
00234
00235         /* matrix multiplication */
00236         while(colCnt > 0u)
00237         {
00238           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00239           /* Perform the multiply-accumulates */
00240           sum += (q63_t) * pIn1++ * *pIn2;
00241           pIn2 += numColsB;
00242
00243           /* Decrement the loop counter */
00244           colCnt--;
00245         }
00246
00247         /* Convert the result from 2.62 to 1.31 format and store in destination buffer */
00248         *px++ = (q31_t) (sum >> 31);
00249
00250         /* Decrement the column loop counter */
00251         col--;
00252
00253         /* Update the pointer pIn2 to point to the  starting address of the next column */
00254         pIn2 = pInB + (numColsB - col);
00255
00256       } while(col > 0u);
00257
00258 #endif
00259
00260       /* Update the pointer pInA to point to the  starting address of the next row */
00261       i = i + numColsB;
00262       pInA = pInA + numColsA;
00263
00264       /* Decrement the row loop counter */
00265       row--;
00266
00267     } while(row > 0u);
00268
00269     /* set status as ARM_MATH_SUCCESS */
00270     status = ARM_MATH_SUCCESS;
00271   }
00272   /* Return to application */
00273   return (status);
00274 }
00275
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:        arm_mat_scale_f32.c
00009 *
00010 * Description:  Multiplies a floating-point matrix by a scalar.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00075 arm_status arm_mat_scale_f32(
00076   const arm_matrix_instance_f32 * pSrc,
00077   float32_t scale,
00078   arm_matrix_instance_f32 * pDst)
00079 {
00080   float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
00081   float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
00082   uint32_t numSamples;                           /* total number of elements in the matrix */
00083   uint32_t blkCnt;                               /* loop counters */
00084   arm_status status;                             /* status of matrix scaling     */
00085
00086 #ifdef ARM_MATH_MATRIX_CHECK
00087
00088
00089   /* Check for matrix mismatch condition */
00090   if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
00091   {
00092     /* Set status as ARM_MATH_SIZE_MISMATCH */
00093     status = ARM_MATH_SIZE_MISMATCH;
00094   }
00095   else
00096 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00097
00098   {
00099     /* Total number of samples in the input matrix */
00100     numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
00101
00102 #ifndef ARM_MATH_CM0
00103
00104     /* Run the below code for Cortex-M4 and Cortex-M3 */
00105
00106     /* Loop Unrolling */
00107     blkCnt = numSamples >> 2;
00108
00109     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00110      ** a second loop below computes the remaining 1 to 3 samples. */
00111     while(blkCnt > 0u)
00112     {
00113       /* C(m,n) = A(m,n) * scale */
00114       /* Scaling and results are stored in the destination buffer. */
00115       *pOut++ = (*pIn++) * scale;
00116       *pOut++ = (*pIn++) * scale;
00117       *pOut++ = (*pIn++) * scale;
00118       *pOut++ = (*pIn++) * scale;
00119
00120       /* Decrement the numSamples loop counter */
00121       blkCnt--;
00122     }
00123
00124     /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00125      ** No loop unrolling is used. */
00126     blkCnt = numSamples % 0x4u;
00127
00128 #else
00129
00130     /* Run the below code for Cortex-M0 */
00131
00132     /* Initialize blkCnt with number of samples */
00133     blkCnt = numSamples;
00134
00135 #endif /* #ifndef ARM_MATH_CM0 */
00136
00137     while(blkCnt > 0u)
00138     {
00139       /* C(m,n) = A(m,n) * scale */
00140       /* The results are stored in the destination buffer. */
00141       *pOut++ = (*pIn++) * scale;
00142
00143       /* Decrement the loop counter */
00144       blkCnt--;
00145     }
00146     /* Set status as ARM_MATH_SUCCESS */
00147     status = ARM_MATH_SUCCESS;
00148   }
00149
00150   /* Return to application */
00151   return (status);
00152 }
00153
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_mat_scale_q15.c
00009 *
00010 * Description:  Multiplies a Q15 matrix by a scalar.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00063 arm_status arm_mat_scale_q15(
00064   const arm_matrix_instance_q15 * pSrc,
00065   q15_t scaleFract,
00066   int32_t shift,
00067   arm_matrix_instance_q15 * pDst)
00068 {
00069   q15_t *pIn = pSrc->pData;                      /* input data matrix pointer */
00070   q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
00071   uint32_t numSamples;                           /* total number of elements in the matrix */
00072   int32_t totShift = 15 - shift;                 /* total shift to apply after scaling */
00073   uint32_t blkCnt;                               /* loop counters */
00074   arm_status status;                             /* status of matrix scaling     */
00075
00076 #ifdef ARM_MATH_MATRIX_CHECK
00077
00078
00079   /* Check for matrix mismatch */
00080   if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
00081   {
00082     /* Set status as ARM_MATH_SIZE_MISMATCH */
00083     status = ARM_MATH_SIZE_MISMATCH;
00084   }
00085   else
00086 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00087
00088   {
00089     /* Total number of samples in the input matrix */
00090     numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
00091
00092 #ifndef ARM_MATH_CM0
00093
00094     /* Run the below code for Cortex-M4 and Cortex-M3 */
00095     /* Loop Unrolling */
00096     blkCnt = numSamples >> 2;
00097
00098     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00099      ** a second loop below computes the remaining 1 to 3 samples. */
00100     while(blkCnt > 0u)
00101     {
00102       /* C(m,n) = A(m,n) * k */
00103       /* Scale, saturate and then store the results in the destination buffer. */
00104       *pOut++ =
00105         (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16));
00106       *pOut++ =
00107         (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16));
00108       *pOut++ =
00109         (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16));
00110       *pOut++ =
00111         (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16));
00112
00113       /* Decrement the numSamples loop counter */
00114       blkCnt--;
00115     }
00116
00117     /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00118      ** No loop unrolling is used. */
00119     blkCnt = numSamples % 0x4u;
00120
00121 #else
00122
00123     /* Run the below code for Cortex-M0 */
00124
00125     /* Initialize blkCnt with number of samples */
00126     blkCnt = numSamples;
00127
00128 #endif /* #ifndef ARM_MATH_CM0 */
00129
00130     while(blkCnt > 0u)
00131     {
00132       /* C(m,n) = A(m,n) * k */
00133       /* Scale, saturate and then store the results in the destination buffer. */
00134       *pOut++ =
00135         (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16));
00136
00137       /* Decrement the numSamples loop counter */
00138       blkCnt--;
00139     }
00140     /* Set status as ARM_MATH_SUCCESS */
00141     status = ARM_MATH_SUCCESS;
00142   }
00143
00144   /* Return to application */
00145   return (status);
00146 }
00147
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_mat_scale_q31.c
00009 *
00010 * Description:  Multiplies a Q31 matrix by a scalar.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00063 arm_status arm_mat_scale_q31(
00064   const arm_matrix_instance_q31 * pSrc,
00065   q31_t scaleFract,
00066   int32_t shift,
00067   arm_matrix_instance_q31 * pDst)
00068 {
00069   q31_t *pIn = pSrc->pData;                      /* input data matrix pointer */
00070   q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
00071   q63_t out;                                     /* temporary variable to hold output value */
00072   uint32_t numSamples;                           /* total number of elements in the matrix */
00073   int32_t totShift = 31 - shift;                 /* shift to apply after scaling */
00074   uint32_t blkCnt;                               /* loop counters  */
00075   arm_status status;                             /* status of matrix scaling      */
00076
00077 #ifdef ARM_MATH_MATRIX_CHECK
00078
00079
00080   /* Check for matrix mismatch  */
00081   if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
00082   {
00083     /* Set status as ARM_MATH_SIZE_MISMATCH */
00084     status = ARM_MATH_SIZE_MISMATCH;
00085   }
00086   else
00087 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00088
00089   {
00090     /* Total number of samples in the input matrix */
00091     numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
00092
00093 #ifndef ARM_MATH_CM0
00094
00095     /* Run the below code for Cortex-M4 and Cortex-M3 */
00096
00097     /* Loop Unrolling */
00098     blkCnt = numSamples >> 2u;
00099
00100     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00101      ** a second loop below computes the remaining 1 to 3 samples. */
00102     while(blkCnt > 0u)
00103     {
00104       /* C(m,n) = A(m,n) * k */
00105       /* Scale, saturate and then store the results in the destination buffer. */
00106       out = ((q63_t) * pIn++ * scaleFract) >> totShift;
00107       *pOut++ = clip_q63_to_q31(out);
00108       out = ((q63_t) * pIn++ * scaleFract) >> totShift;
00109       *pOut++ = clip_q63_to_q31(out);
00110       out = ((q63_t) * pIn++ * scaleFract) >> totShift;
00111       *pOut++ = clip_q63_to_q31(out);
00112       out = ((q63_t) * pIn++ * scaleFract) >> totShift;
00113       *pOut++ = clip_q63_to_q31(out);
00114
00115       /* Decrement the numSamples loop counter */
00116       blkCnt--;
00117     }
00118
00119     /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00120      ** No loop unrolling is used. */
00121     blkCnt = numSamples % 0x4u;
00122
00123 #else
00124
00125     /* Run the below code for Cortex-M0 */
00126
00127     /* Initialize blkCnt with number of samples */
00128     blkCnt = numSamples;
00129
00130 #endif /* #ifndef ARM_MATH_CM0 */
00131
00132     while(blkCnt > 0u)
00133     {
00134       /* C(m,n) = A(m,n) * k */
00135       /* Scale, saturate and then store the results in the destination buffer. */
00136       out = ((q63_t) * pIn++ * scaleFract) >> totShift;
00137       *pOut++ = clip_q63_to_q31(out);
00138
00139       /* Decrement the numSamples loop counter */
00140       blkCnt--;
00141     }
00142     /* Set status as ARM_MATH_SUCCESS */
00143     status = ARM_MATH_SUCCESS;
00144   }
00145
00146   /* Return to application */
00147   return (status);
00148 }
00149
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_mat_sub_f32.c
00009 *
00010 * Description:  Floating-point matrix subtraction.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00067 arm_status arm_mat_sub_f32(
00068   const arm_matrix_instance_f32 * pSrcA,
00069   const arm_matrix_instance_f32 * pSrcB,
00070   arm_matrix_instance_f32 * pDst)
00071 {
00072   float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
00073   float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
00074   float32_t *pOut = pDst->pData;                 /* output data matrix pointer  */
00075   uint32_t numSamples;                           /* total number of elements in the matrix  */
00076   uint32_t blkCnt;                               /* loop counters */
00077   arm_status status;                             /* status of matrix subtraction */
00078
00079 #ifdef ARM_MATH_MATRIX_CHECK
00080
00081
00082   /* Check for matrix mismatch condition */
00083   if((pSrcA->numRows != pSrcB->numRows) ||
00084      (pSrcA->numCols != pSrcB->numCols) ||
00085      (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
00086   {
00087     /* Set status as ARM_MATH_SIZE_MISMATCH */
00088     status = ARM_MATH_SIZE_MISMATCH;
00089   }
00090   else
00091 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00092
00093   {
00094     /* Total number of samples in the input matrix */
00095     numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
00096
00097 #ifndef ARM_MATH_CM0
00098
00099     /* Run the below code for Cortex-M4 and Cortex-M3 */
00100
00101     /* Loop Unrolling */
00102     blkCnt = numSamples >> 2u;
00103
00104     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00105      ** a second loop below computes the remaining 1 to 3 samples. */
00106     while(blkCnt > 0u)
00107     {
00108       /* C(m,n) = A(m,n) - B(m,n) */
00109       /* Subtract and then store the results in the destination buffer. */
00110       *pOut++ = (*pIn1++) - (*pIn2++);
00111       *pOut++ = (*pIn1++) - (*pIn2++);
00112       *pOut++ = (*pIn1++) - (*pIn2++);
00113       *pOut++ = (*pIn1++) - (*pIn2++);
00114
00115       /* Decrement the loop counter */
00116       blkCnt--;
00117     }
00118
00119     /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00120      ** No loop unrolling is used. */
00121     blkCnt = numSamples % 0x4u;
00122
00123 #else
00124
00125     /* Run the below code for Cortex-M0 */
00126
00127     /* Initialize blkCnt with number of samples */
00128     blkCnt = numSamples;
00129
00130 #endif /* #ifndef ARM_MATH_CM0 */
00131
00132     while(blkCnt > 0u)
00133     {
00134       /* C(m,n) = A(m,n) - B(m,n) */
00135       /* Subtract and then store the results in the destination buffer. */
00136       *pOut++ = (*pIn1++) - (*pIn2++);
00137
00138       /* Decrement the loop counter */
00139       blkCnt--;
00140     }
00141     /* Set status as ARM_MATH_SUCCESS */
00142     status = ARM_MATH_SUCCESS;
00143   }
00144
00145   /* Return to application */
00146   return (status);
00147 }
00148
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_mat_sub_q15.c
00009 *
00010 * Description:  Q15 Matrix subtraction
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00061 arm_status arm_mat_sub_q15(
00062   const arm_matrix_instance_q15 * pSrcA,
00063   const arm_matrix_instance_q15 * pSrcB,
00064   arm_matrix_instance_q15 * pDst)
00065 {
00066   q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
00067   q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
00068   q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
00069   uint32_t numSamples;                           /* total number of elements in the matrix */
00070   uint32_t blkCnt;                               /* loop counters  */
00071   arm_status status;                             /* status of matrix subtraction  */
00072
00073
00074 #ifdef ARM_MATH_MATRIX_CHECK
00075
00076
00077   /* Check for matrix mismatch condition */
00078   if((pSrcA->numRows != pSrcB->numRows) ||
00079      (pSrcA->numCols != pSrcB->numCols) ||
00080      (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
00081   {
00082     /* Set status as ARM_MATH_SIZE_MISMATCH */
00083     status = ARM_MATH_SIZE_MISMATCH;
00084   }
00085   else
00086 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00087
00088   {
00089     /* Total number of samples in the input matrix */
00090     numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
00091
00092 #ifndef ARM_MATH_CM0
00093
00094     /* Run the below code for Cortex-M4 and Cortex-M3 */
00095
00096     /* Apply loop unrolling */
00097     blkCnt = numSamples >> 2u;
00098
00099     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00100      ** a second loop below computes the remaining 1 to 3 samples. */
00101     while(blkCnt > 0u)
00102     {
00103       /* C(m,n) = A(m,n) - B(m,n) */
00104       /* Subtract, Saturate and then store the results in the destination buffer. */
00105       *__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
00106       *__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
00107
00108       /* Decrement the loop counter */
00109       blkCnt--;
00110     }
00111
00112     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00113      ** No loop unrolling is used. */
00114     blkCnt = numSamples % 0x4u;
00115
00116     while(blkCnt > 0u)
00117     {
00118       /* C(m,n) = A(m,n) - B(m,n) */
00119       /* Subtract and then store the results in the destination buffer. */
00120       *pOut++ = (q15_t) __QSUB16(*pInA++, *pInB++);
00121
00122       /* Decrement the loop counter */
00123       blkCnt--;
00124     }
00125
00126 #else
00127
00128     /* Run the below code for Cortex-M0 */
00129
00130     /* Initialize blkCnt with number of samples */
00131     blkCnt = numSamples;
00132
00133     while(blkCnt > 0u)
00134     {
00135       /* C(m,n) = A(m,n) - B(m,n) */
00136       /* Subtract and then store the results in the destination buffer. */
00137       *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
00138
00139       /* Decrement the loop counter */
00140       blkCnt--;
00141     }
00142
00143 #endif /* #ifndef ARM_MATH_CM0 */
00144
00145     /* Set status as ARM_MATH_SUCCESS */
00146     status = ARM_MATH_SUCCESS;
00147   }
00148
00149   /* Return to application */
00150   return (status);
00151 }
00152
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_mat_sub_q31.c
00009 *
00010 * Description:  Q31 matrix subtraction
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00062 arm_status arm_mat_sub_q31(
00063   const arm_matrix_instance_q31 * pSrcA,
00064   const arm_matrix_instance_q31 * pSrcB,
00065   arm_matrix_instance_q31 * pDst)
00066 {
00067   q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
00068   q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
00069   q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
00070   uint32_t numSamples;                           /* total number of elements in the matrix  */
00071   uint32_t blkCnt;                               /* loop counters */
00072   arm_status status;                             /* status of matrix subtraction */
00073
00074
00075 #ifdef ARM_MATH_MATRIX_CHECK
00076
00077
00078   /* Check for matrix mismatch condition  */
00079   if((pSrcA->numRows != pSrcB->numRows) ||
00080      (pSrcA->numCols != pSrcB->numCols) ||
00081      (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
00082   {
00083     /* Set status as ARM_MATH_SIZE_MISMATCH */
00084     status = ARM_MATH_SIZE_MISMATCH;
00085   }
00086   else
00087 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00088
00089   {
00090     /* Total number of samples in the input matrix */
00091     numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
00092
00093 #ifndef ARM_MATH_CM0
00094
00095     /* Run the below code for Cortex-M4 and Cortex-M3 */
00096
00097     /* Loop Unrolling */
00098     blkCnt = numSamples >> 2u;
00099
00100     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00101      ** a second loop below computes the remaining 1 to 3 samples. */
00102     while(blkCnt > 0u)
00103     {
00104       /* C(m,n) = A(m,n) - B(m,n) */
00105       /* Subtract, saturate and then store the results in the destination buffer. */
00106       *pOut++ = __QSUB(*pIn1++, *pIn2++);
00107       *pOut++ = __QSUB(*pIn1++, *pIn2++);
00108       *pOut++ = __QSUB(*pIn1++, *pIn2++);
00109       *pOut++ = __QSUB(*pIn1++, *pIn2++);
00110
00111       /* Decrement the loop counter */
00112       blkCnt--;
00113     }
00114
00115     /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00116      ** No loop unrolling is used. */
00117     blkCnt = numSamples % 0x4u;
00118
00119     while(blkCnt > 0u)
00120     {
00121       /* C(m,n) = A(m,n) - B(m,n) */
00122       /* Subtract, saturate and then store the results in the destination buffer. */
00123       *pOut++ = __QSUB(*pIn1++, *pIn2++);
00124
00125       /* Decrement the loop counter */
00126       blkCnt--;
00127     }
00128
00129 #else
00130
00131     /* Run the below code for Cortex-M0 */
00132
00133     /* Initialize blkCnt with number of samples */
00134     blkCnt = numSamples;
00135
00136     while(blkCnt > 0u)
00137     {
00138       /* C(m,n) = A(m,n) - B(m,n) */
00139       /* Subtract, saturate and then store the results in the destination buffer. */
00140       *pOut++ = clip_q63_to_q31(((q63_t) (*pIn1++)) - (*pIn2++));
00141
00142       /* Decrement the loop counter */
00143       blkCnt--;
00144     }
00145
00146 #endif /* #ifndef ARM_MATH_CM0 */
00147
00148     /* Set status as ARM_MATH_SUCCESS */
00149     status = ARM_MATH_SUCCESS;
00150   }
00151
00152   /* Return to application */
00153   return (status);
00154 }
00155
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_mat_trans_f32.c
00009 *
00010 * Description:  Floating-point matrix transpose.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00044 #include "arm_math.h"
00045
00064 arm_status arm_mat_trans_f32(
00065   const arm_matrix_instance_f32 * pSrc,
00066   arm_matrix_instance_f32 * pDst)
00067 {
00068   float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
00069   float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
00070   float32_t *px;                                 /* Temporary output data matrix pointer */
00071   uint16_t nRows = pSrc->numRows;                /* number of rows */
00072   uint16_t nColumns = pSrc->numCols;             /* number of columns */
00073
00074 #ifndef ARM_MATH_CM0
00075
00076   /* Run the below code for Cortex-M4 and Cortex-M3 */
00077
00078   uint16_t blkCnt, i = 0u, row = nRows;          /* loop counters */
00079   arm_status status;                             /* status of matrix transpose  */
00080
00081
00082 #ifdef ARM_MATH_MATRIX_CHECK
00083
00084
00085   /* Check for matrix mismatch condition */
00086   if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
00087   {
00088     /* Set status as ARM_MATH_SIZE_MISMATCH */
00089     status = ARM_MATH_SIZE_MISMATCH;
00090   }
00091   else
00092 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00093
00094   {
00095     /* Matrix transpose by exchanging the rows with columns */
00096     /* row loop     */
00097     do
00098     {
00099       /* Loop Unrolling */
00100       blkCnt = nColumns >> 2;
00101
00102       /* The pointer px is set to starting address of the column being processed */
00103       px = pOut + i;
00104
00105       /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00106        ** a second loop below computes the remaining 1 to 3 samples. */
00107       while(blkCnt > 0u)        /* column loop */
00108       {
00109         /* Read and store the input element in the destination */
00110         *px = *pIn++;
00111
00112         /* Update the pointer px to point to the next row of the transposed matrix */
00113         px += nRows;
00114
00115         /* Read and store the input element in the destination */
00116         *px = *pIn++;
00117
00118         /* Update the pointer px to point to the next row of the transposed matrix */
00119         px += nRows;
00120
00121         /* Read and store the input element in the destination */
00122         *px = *pIn++;
00123
00124         /* Update the pointer px to point to the next row of the transposed matrix */
00125         px += nRows;
00126
00127         /* Read and store the input element in the destination */
00128         *px = *pIn++;
00129
00130         /* Update the pointer px to point to the next row of the transposed matrix */
00131         px += nRows;
00132
00133         /* Decrement the column loop counter */
00134         blkCnt--;
00135       }
00136
00137       /* Perform matrix transpose for last 3 samples here. */
00138       blkCnt = nColumns % 0x4u;
00139
00140       while(blkCnt > 0u)
00141       {
00142         /* Read and store the input element in the destination */
00143         *px = *pIn++;
00144
00145         /* Update the pointer px to point to the next row of the transposed matrix */
00146         px += nRows;
00147
00148         /* Decrement the column loop counter */
00149         blkCnt--;
00150       }
00151
00152 #else
00153
00154   /* Run the below code for Cortex-M0 */
00155
00156   uint16_t col, i = 0u, row = nRows;             /* loop counters */
00157   arm_status status;                             /* status of matrix transpose  */
00158
00159
00160 #ifdef ARM_MATH_MATRIX_CHECK
00161
00162   /* Check for matrix mismatch condition */
00163   if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
00164   {
00165     /* Set status as ARM_MATH_SIZE_MISMATCH */
00166     status = ARM_MATH_SIZE_MISMATCH;
00167   }
00168   else
00169 #endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
00170
00171   {
00172     /* Matrix transpose by exchanging the rows with columns */
00173     /* row loop     */
00174     do
00175     {
00176       /* The pointer px is set to starting address of the column being processed */
00177       px = pOut + i;
00178
00179       /* Initialize column loop counter */
00180       col = nColumns;
00181
00182       while(col > 0u)
00183       {
00184         /* Read and store the input element in the destination */
00185         *px = *pIn++;
00186
00187         /* Update the pointer px to point to the next row of the transposed matrix */
00188         px += nRows;
00189
00190         /* Decrement the column loop counter */
00191         col--;
00192       }
00193
00194 #endif /* #ifndef ARM_MATH_CM0 */
00195
00196       i++;
00197
00198       /* Decrement the row loop counter */
00199       row--;
00200
00201     } while(row > 0u);          /* row loop end  */
00202
00203     /* Set status as ARM_MATH_SUCCESS */
00204     status = ARM_MATH_SUCCESS;
00205   }
00206
00207   /* Return to application */
00208   return (status);
00209 }
00210
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_mat_trans_q15.c
00009 *
00010 * Description:  Q15 matrix transpose.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00047 /*
00048  * @brief Q15 matrix transpose.
00049  * @param[in]  *pSrc points to the input matrix
00050  * @param[out] *pDst points to the output matrix
00051  * @return      The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
00052  * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
00053  */
00054
00055 arm_status arm_mat_trans_q15(
00056   const arm_matrix_instance_q15 * pSrc,
00057   arm_matrix_instance_q15 * pDst)
00058 {
00059   q15_t *pSrcA = pSrc->pData;                    /* input data matrix pointer */
00060   q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
00061   uint16_t nRows = pSrc->numRows;                /* number of nRows */
00062   uint16_t nColumns = pSrc->numCols;             /* number of nColumns */
00063   uint16_t col, row = nRows, i = 0u;             /* row and column loop counters */
00064   arm_status status;                             /* status of matrix transpose */
00065
00066 #ifndef ARM_MATH_CM0
00067
00068   /* Run the below code for Cortex-M4 and Cortex-M3 */
00069
00070   q31_t in;                                      /* variable to hold temporary output  */
00071
00072
00073 #ifdef ARM_MATH_MATRIX_CHECK
00074
00075
00076   /* Check for matrix mismatch condition */
00077   if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
00078   {
00079     /* Set status as ARM_MATH_SIZE_MISMATCH */
00080     status = ARM_MATH_SIZE_MISMATCH;
00081   }
00082   else
00083 #endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
00084
00085   {
00086     /* Matrix transpose by exchanging the rows with columns */
00087     /* row loop     */
00088     do
00089     {
00090       /* Apply loop unrolling and exchange the columns with row elements */
00091       col = nColumns >> 2u;
00092
00093       /* The pointer pOut is set to starting address of the column being processed */
00094       pOut = pDst->pData + i;
00095
00096       /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00097        ** a second loop below computes the remaining 1 to 3 samples. */
00098       while(col > 0u)
00099       {
00100         /* Read two elements from the row */
00101         in = *__SIMD32(pSrcA)++;
00102
00103         /* Unpack and store one element in the destination */
00104 #ifndef ARM_MATH_BIG_ENDIAN
00105
00106         *pOut = (q15_t) in;
00107
00108 #else
00109
00110         *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00111
00112 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00113
00114         /* Update the pointer pOut to point to the next row of the transposed matrix */
00115         pOut += nRows;
00116
00117         /* Unpack and store the second element in the destination */
00118
00119 #ifndef ARM_MATH_BIG_ENDIAN
00120
00121         *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00122
00123 #else
00124
00125         *pOut = (q15_t) in;
00126
00127 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00128
00129         /* Update the pointer pOut to point to the next row of the transposed matrix */
00130         pOut += nRows;
00131
00132         /* Read two elements from the row */
00133 #ifndef ARM_MATH_BIG_ENDIAN
00134
00135         in = *__SIMD32(pSrcA)++;
00136
00137 #else
00138
00139         in = *__SIMD32(pSrcA)++;
00140
00141 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00142
00143         /* Unpack and store one element in the destination */
00144 #ifndef ARM_MATH_BIG_ENDIAN
00145
00146         *pOut = (q15_t) in;
00147
00148 #else
00149
00150         *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00151
00152 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00153
00154         /* Update the pointer pOut to point to the next row of the transposed matrix */
00155         pOut += nRows;
00156
00157         /* Unpack and store the second element in the destination */
00158 #ifndef ARM_MATH_BIG_ENDIAN
00159
00160         *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00161
00162 #else
00163
00164         *pOut = (q15_t) in;
00165
00166 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00167
00168         /* Update the pointer pOut to point to the next row of the transposed matrix */
00169         pOut += nRows;
00170
00171         /* Decrement the column loop counter */
00172         col--;
00173       }
00174
00175       /* Perform matrix transpose for last 3 samples here. */
00176       col = nColumns % 0x4u;
00177
00178 #else
00179
00180   /* Run the below code for Cortex-M0 */
00181
00182 #ifdef ARM_MATH_MATRIX_CHECK
00183
00184   /* Check for matrix mismatch condition */
00185   if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
00186   {
00187     /* Set status as ARM_MATH_SIZE_MISMATCH */
00188     status = ARM_MATH_SIZE_MISMATCH;
00189   }
00190   else
00191 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00192
00193   {
00194     /* Matrix transpose by exchanging the rows with columns */
00195     /* row loop     */
00196     do
00197     {
00198       /* The pointer pOut is set to starting address of the column being processed */
00199       pOut = pDst->pData + i;
00200
00201       /* Initialize column loop counter */
00202       col = nColumns;
00203
00204 #endif /* #ifndef ARM_MATH_CM0 */
00205
00206       while(col > 0u)
00207       {
00208         /* Read and store the input element in the destination */
00209         *pOut = *pSrcA++;
00210
00211         /* Update the pointer pOut to point to the next row of the transposed matrix */
00212         pOut += nRows;
00213
00214         /* Decrement the column loop counter */
00215         col--;
00216       }
00217
00218       i++;
00219
00220       /* Decrement the row loop counter */
00221       row--;
00222
00223     } while(row > 0u);
00224
00225     /* set status as ARM_MATH_SUCCESS */
00226     status = ARM_MATH_SUCCESS;
00227   }
00228   /* Return to application */
00229   return (status);
00230 }
00231
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_mat_trans_q31.c
00009 *
00010 * Description:  Q31 matrix transpose.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00047 /*
00048   * @brief Q31 matrix transpose.
00049   * @param[in]  *pSrc points to the input matrix
00050   * @param[out] *pDst points to the output matrix
00051   * @return     The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
00052   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
00053  */
00054
00055 arm_status arm_mat_trans_q31(
00056   const arm_matrix_instance_q31 * pSrc,
00057   arm_matrix_instance_q31 * pDst)
00058 {
00059   q31_t *pIn = pSrc->pData;                      /* input data matrix pointer  */
00060   q31_t *pOut = pDst->pData;                     /* output data matrix pointer  */
00061   q31_t *px;                                     /* Temporary output data matrix pointer */
00062   uint16_t nRows = pSrc->numRows;                /* number of nRows */
00063   uint16_t nColumns = pSrc->numCols;             /* number of nColumns  */
00064
00065 #ifndef ARM_MATH_CM0
00066
00067   /* Run the below code for Cortex-M4 and Cortex-M3 */
00068
00069   uint16_t blkCnt, i = 0u, row = nRows;          /* loop counters */
00070   arm_status status;                             /* status of matrix transpose */
00071
00072
00073 #ifdef ARM_MATH_MATRIX_CHECK
00074
00075
00076   /* Check for matrix mismatch condition */
00077   if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
00078   {
00079     /* Set status as ARM_MATH_SIZE_MISMATCH */
00080     status = ARM_MATH_SIZE_MISMATCH;
00081   }
00082   else
00083 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00084
00085   {
00086     /* Matrix transpose by exchanging the rows with columns */
00087     /* row loop     */
00088     do
00089     {
00090       /* Apply loop unrolling and exchange the columns with row elements */
00091       blkCnt = nColumns >> 2u;
00092
00093       /* The pointer px is set to starting address of the column being processed */
00094       px = pOut + i;
00095
00096       /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00097        ** a second loop below computes the remaining 1 to 3 samples. */
00098       while(blkCnt > 0u)
00099       {
00100         /* Read and store the input element in the destination */
00101         *px = *pIn++;
00102
00103         /* Update the pointer px to point to the next row of the transposed matrix */
00104         px += nRows;
00105
00106         /* Read and store the input element in the destination */
00107         *px = *pIn++;
00108
00109         /* Update the pointer px to point to the next row of the transposed matrix */
00110         px += nRows;
00111
00112         /* Read and store the input element in the destination */
00113         *px = *pIn++;
00114
00115         /* Update the pointer px to point to the next row of the transposed matrix */
00116         px += nRows;
00117
00118         /* Read and store the input element in the destination */
00119         *px = *pIn++;
00120
00121         /* Update the pointer px to point to the next row of the transposed matrix */
00122         px += nRows;
00123
00124         /* Decrement the column loop counter */
00125         blkCnt--;
00126       }
00127
00128       /* Perform matrix transpose for last 3 samples here. */
00129       blkCnt = nColumns % 0x4u;
00130
00131       while(blkCnt > 0u)
00132       {
00133         /* Read and store the input element in the destination */
00134         *px = *pIn++;
00135
00136         /* Update the pointer px to point to the next row of the transposed matrix */
00137         px += nRows;
00138
00139         /* Decrement the column loop counter */
00140         blkCnt--;
00141       }
00142
00143 #else
00144
00145   /* Run the below code for Cortex-M0 */
00146
00147   uint16_t col, i = 0u, row = nRows;             /* loop counters */
00148   arm_status status;                             /* status of matrix transpose */
00149
00150
00151 #ifdef ARM_MATH_MATRIX_CHECK
00152
00153   /* Check for matrix mismatch condition */
00154   if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
00155   {
00156     /* Set status as ARM_MATH_SIZE_MISMATCH */
00157     status = ARM_MATH_SIZE_MISMATCH;
00158   }
00159   else
00160 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00161
00162   {
00163     /* Matrix transpose by exchanging the rows with columns */
00164     /* row loop     */
00165     do
00166     {
00167       /* The pointer px is set to starting address of the column being processed */
00168       px = pOut + i;
00169
00170       /* Initialize column loop counter */
00171       col = nColumns;
00172
00173       while(col > 0u)
00174       {
00175         /* Read and store the input element in the destination */
00176         *px = *pIn++;
00177
00178         /* Update the pointer px to point to the next row of the transposed matrix */
00179         px += nRows;
00180
00181         /* Decrement the column loop counter */
00182         col--;
00183       }
00184
00185 #endif /* #ifndef ARM_MATH_CM0 */
00186
00187       i++;
00188
00189       /* Decrement the row loop counter */
00190       row--;
00191
00192     }
00193     while(row > 0u);            /* row loop end */
00194
00195     /* set status as ARM_MATH_SUCCESS */
00196     status = ARM_MATH_SUCCESS;
00197   }
00198
00199   /* Return to application */
00200   return (status);
00201 }
00202
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/arm_math.h
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002  * Copyright (C) 2010 ARM Limited. All rights reserved.
00003  *
00004  * $Date:        15. July 2011
00005  * $Revision:   V1.0.10
00006  *
00007  * Project:         CMSIS DSP Library
00008  * Title:            arm_math.h
00009  *
00010  * Description:  Public header file for CMSIS DSP Library
00011  *
00012  * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013  *
00014  * Version 1.0.10 2011/7/15
00015  *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016  *
00017  * Version 1.0.3 2010/11/29
00018  *    Re-organized the CMSIS folders and updated documentation.
00019  *
00020  * Version 1.0.2 2010/11/11
00021  *    Documentation updated.
00022  *
00023  * Version 1.0.1 2010/10/05
00024  *    Production release and review comments incorporated.
00025  *
00026  * Version 1.0.0 2010/09/20
00027  *    Production release and review comments incorporated.
00028  * -------------------------------------------------------------------- */
00029
00264 #ifndef _ARM_MATH_H
00265 #define _ARM_MATH_H
00266
00267 #define __CMSIS_GENERIC              /* disable NVIC and Systick functions */
00268
00269 #if defined (ARM_MATH_CM4)
00270   #include "core_cm4.h"
00271 #elif defined (ARM_MATH_CM3)
00272   #include "core_cm3.h"
00273 #elif defined (ARM_MATH_CM0)
00274   #include "core_cm0.h"
00275 #else
00276 #include "ARMCM4.h"
00277 #warning "Define either ARM_MATH_CM4 OR ARM_MATH_CM3...By Default building on ARM_MATH_CM4....."
00278 #endif
00279
00280 #undef  __CMSIS_GENERIC              /* enable NVIC and Systick functions */
00281 #include "string.h"
00282     #include "math.h"
00283 #ifdef  __cplusplus
00284 extern "C"
00285 {
00286 #endif
00287
00288
00293 #define DELTA_Q31                       (0x100)
00294 #define DELTA_Q15                       0x5
00295 #define INDEX_MASK                      0x0000003F
00296 #define PI                                      3.14159265358979f
00297
00302 #define TABLE_SIZE                      256
00303 #define TABLE_SPACING_Q31       0x800000
00304 #define TABLE_SPACING_Q15       0x80
00305
00309   /* 1.31(q31) Fixed value of 2/360 */
00310   /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
00311 #define INPUT_SPACING                   0xB60B61
00312
00313
00318   typedef enum
00319     {
00320       ARM_MATH_SUCCESS = 0,
00321       ARM_MATH_ARGUMENT_ERROR = -1,
00322       ARM_MATH_LENGTH_ERROR = -2,
00323       ARM_MATH_SIZE_MISMATCH = -3,
00324       ARM_MATH_NANINF = -4,
00325       ARM_MATH_SINGULAR = -5,
00326       ARM_MATH_TEST_FAILURE = -6
00327     } arm_status;
00328
00332   typedef int8_t q7_t;
00333
00337   typedef int16_t q15_t;
00338
00342   typedef int32_t q31_t;
00343
00347   typedef int64_t q63_t;
00348
00352   typedef float float32_t;
00353
00357   typedef double float64_t;
00358
00362 #define __SIMD32(addr)  (*(int32_t **) & (addr))
00363
00364 #if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0)
00365
00368 #define __PKHBT(ARG1, ARG2, ARG3)      ( (((int32_t)(ARG1) <<  0) & (int32_t)0x0000FFFF) | \
00369                                          (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000)  )
00370
00371 #endif
00372
00373
00377 #ifndef ARM_MATH_BIG_ENDIAN
00378
00379 #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) <<  0) & (int32_t)0x000000FF) | \
00380                                 (((int32_t)(v1) <<  8) & (int32_t)0x0000FF00) | \
00381                                                             (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) |     \
00382                                                             (((int32_t)(v3) << 24) & (int32_t)0xFF000000)  )
00383 #else
00384
00385 #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) <<  0) & (int32_t)0x000000FF) | \
00386                                 (((int32_t)(v2) <<  8) & (int32_t)0x0000FF00) | \
00387                                                             (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) |     \
00388                                                             (((int32_t)(v0) << 24) & (int32_t)0xFF000000)  )
00389
00390 #endif
00391
00392
00396   static __INLINE q31_t clip_q63_to_q31(
00397                                         q63_t x)
00398   {
00399     return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
00400       ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x;
00401   }
00402
00406   static __INLINE q15_t clip_q63_to_q15(
00407                                         q63_t x)
00408   {
00409     return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
00410       ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15);
00411   }
00412
00416   static __INLINE q7_t clip_q31_to_q7(
00417                                       q31_t x)
00418   {
00419     return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ?
00420       ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x;
00421   }
00422
00426   static __INLINE q15_t clip_q31_to_q15(
00427                                         q31_t x)
00428   {
00429     return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ?
00430       ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x;
00431   }
00432
00437   static __INLINE q63_t mult32x64(
00438                                   q63_t x,
00439                                   q31_t y)
00440   {
00441     return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) +
00442             (((q63_t) (x >> 32) * y)));
00443   }
00444
00445
00446 #if defined (ARM_MATH_CM0) && defined ( __CC_ARM   )
00447 #define __CLZ __clz
00448 #endif
00449
00450 #if defined (ARM_MATH_CM0) && ((defined (__ICCARM__)) ||(defined (__GNUC__)) || defined (__TASKING__) )
00451
00452   static __INLINE  uint32_t __CLZ(q31_t data);
00453
00454
00455   static __INLINE uint32_t __CLZ(q31_t data)
00456   {
00457           uint32_t count = 0;
00458           uint32_t mask = 0x80000000;
00459
00460           while((data & mask) ==  0)
00461           {
00462                   count += 1u;
00463                   mask = mask >> 1u;
00464           }
00465
00466           return(count);
00467
00468   }
00469
00470 #endif
00471
00476   static __INLINE uint32_t arm_recip_q31(
00477                                          q31_t in,
00478                                          q31_t * dst,
00479                                          q31_t * pRecipTable)
00480   {
00481
00482     uint32_t out, tempVal;
00483     uint32_t index, i;
00484     uint32_t signBits;
00485
00486     if(in > 0)
00487       {
00488         signBits = __CLZ(in) - 1;
00489       }
00490     else
00491       {
00492         signBits = __CLZ(-in) - 1;
00493       }
00494
00495     /* Convert input sample to 1.31 format */
00496     in = in << signBits;
00497
00498     /* calculation of index for initial approximated Val */
00499     index = (uint32_t) (in >> 24u);
00500     index = (index & INDEX_MASK);
00501
00502     /* 1.31 with exp 1 */
00503     out = pRecipTable[index];
00504
00505     /* calculation of reciprocal value */
00506     /* running approximation for two iterations */
00507     for (i = 0u; i < 2u; i++)
00508       {
00509         tempVal = (q31_t) (((q63_t) in * out) >> 31u);
00510         tempVal = 0x7FFFFFFF - tempVal;
00511         /*      1.31 with exp 1 */
00512         //out = (q31_t) (((q63_t) out * tempVal) >> 30u);
00513         out = (q31_t) clip_q63_to_q31(((q63_t) out * tempVal) >> 30u);
00514       }
00515
00516     /* write output */
00517     *dst = out;
00518
00519     /* return num of signbits of out = 1/in value */
00520     return (signBits + 1u);
00521
00522   }
00523
00527   static __INLINE uint32_t arm_recip_q15(
00528                                          q15_t in,
00529                                          q15_t * dst,
00530                                          q15_t * pRecipTable)
00531   {
00532
00533     uint32_t out = 0, tempVal = 0;
00534     uint32_t index = 0, i = 0;
00535     uint32_t signBits = 0;
00536
00537     if(in > 0)
00538       {
00539         signBits = __CLZ(in) - 17;
00540       }
00541     else
00542       {
00543         signBits = __CLZ(-in) - 17;
00544       }
00545
00546     /* Convert input sample to 1.15 format */
00547     in = in << signBits;
00548
00549     /* calculation of index for initial approximated Val */
00550     index = in >> 8;
00551     index = (index & INDEX_MASK);
00552
00553     /*      1.15 with exp 1  */
00554     out = pRecipTable[index];
00555
00556     /* calculation of reciprocal value */
00557     /* running approximation for two iterations */
00558     for (i = 0; i < 2; i++)
00559       {
00560         tempVal = (q15_t) (((q31_t) in * out) >> 15);
00561         tempVal = 0x7FFF - tempVal;
00562         /*      1.15 with exp 1 */
00563         out = (q15_t) (((q31_t) out * tempVal) >> 14);
00564       }
00565
00566     /* write output */
00567     *dst = out;
00568
00569     /* return num of signbits of out = 1/in value */
00570     return (signBits + 1);
00571
00572   }
00573
00574
00575   /*
00576    * @brief C custom defined intrinisic function for only M0 processors
00577    */
00578 #if defined(ARM_MATH_CM0)
00579
00580   static __INLINE q31_t __SSAT(
00581                                q31_t x,
00582                                uint32_t y)
00583   {
00584     int32_t posMax, negMin;
00585     uint32_t i;
00586
00587     posMax = 1;
00588     for (i = 0; i < (y - 1); i++)
00589       {
00590         posMax = posMax * 2;
00591       }
00592
00593     if(x > 0)
00594       {
00595         posMax = (posMax - 1);
00596
00597         if(x > posMax)
00598           {
00599             x = posMax;
00600           }
00601       }
00602     else
00603       {
00604         negMin = -posMax;
00605
00606         if(x < negMin)
00607           {
00608             x = negMin;
00609           }
00610       }
00611     return (x);
00612
00613
00614   }
00615
00616 #endif /* end of ARM_MATH_CM0 */
00617
00618
00619
00620   /*
00621    * @brief C custom defined intrinsic function for M3 and M0 processors
00622    */
00623 #if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0)
00624
00625   /*
00626    * @brief C custom defined QADD8 for M3 and M0 processors
00627    */
00628   static __INLINE q31_t __QADD8(
00629                                 q31_t x,
00630                                 q31_t y)
00631   {
00632
00633     q31_t sum;
00634     q7_t r, s, t, u;
00635
00636     r = (char) x;
00637     s = (char) y;
00638
00639     r = __SSAT((q31_t) (r + s), 8);
00640     s = __SSAT(((q31_t) (((x << 16) >> 24) + ((y << 16) >> 24))), 8);
00641     t = __SSAT(((q31_t) (((x << 8) >> 24) + ((y << 8) >> 24))), 8);
00642     u = __SSAT(((q31_t) ((x >> 24) + (y >> 24))), 8);
00643
00644     sum = (((q31_t) u << 24) & 0xFF000000) | (((q31_t) t << 16) & 0x00FF0000) |
00645       (((q31_t) s << 8) & 0x0000FF00) | (r & 0x000000FF);
00646
00647     return sum;
00648
00649   }
00650
00651   /*
00652    * @brief C custom defined QSUB8 for M3 and M0 processors
00653    */
00654   static __INLINE q31_t __QSUB8(
00655                                 q31_t x,
00656                                 q31_t y)
00657   {
00658
00659     q31_t sum;
00660     q31_t r, s, t, u;
00661
00662     r = (char) x;
00663     s = (char) y;
00664
00665     r = __SSAT((r - s), 8);
00666     s = __SSAT(((q31_t) (((x << 16) >> 24) - ((y << 16) >> 24))), 8) << 8;
00667     t = __SSAT(((q31_t) (((x << 8) >> 24) - ((y << 8) >> 24))), 8) << 16;
00668     u = __SSAT(((q31_t) ((x >> 24) - (y >> 24))), 8) << 24;
00669
00670     sum =
00671       (u & 0xFF000000) | (t & 0x00FF0000) | (s & 0x0000FF00) | (r & 0x000000FF);
00672
00673     return sum;
00674   }
00675
00676   /*
00677    * @brief C custom defined QADD16 for M3 and M0 processors
00678    */
00679
00680   /*
00681    * @brief C custom defined QADD16 for M3 and M0 processors
00682    */
00683   static __INLINE q31_t __QADD16(
00684                                  q31_t x,
00685                                  q31_t y)
00686   {
00687
00688     q31_t sum;
00689     q31_t r, s;
00690
00691     r = (short) x;
00692     s = (short) y;
00693
00694     r = __SSAT(r + s, 16);
00695     s = __SSAT(((q31_t) ((x >> 16) + (y >> 16))), 16) << 16;
00696
00697     sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
00698
00699     return sum;
00700
00701   }
00702
00703   /*
00704    * @brief C custom defined SHADD16 for M3 and M0 processors
00705    */
00706   static __INLINE q31_t __SHADD16(
00707                                   q31_t x,
00708                                   q31_t y)
00709   {
00710
00711     q31_t sum;
00712     q31_t r, s;
00713
00714     r = (short) x;
00715     s = (short) y;
00716
00717     r = ((r >> 1) + (s >> 1));
00718     s = ((q31_t) ((x >> 17) + (y >> 17))) << 16;
00719
00720     sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
00721
00722     return sum;
00723
00724   }
00725
00726   /*
00727    * @brief C custom defined QSUB16 for M3 and M0 processors
00728    */
00729   static __INLINE q31_t __QSUB16(
00730                                  q31_t x,
00731                                  q31_t y)
00732   {
00733
00734     q31_t sum;
00735     q31_t r, s;
00736
00737     r = (short) x;
00738     s = (short) y;
00739
00740     r = __SSAT(r - s, 16);
00741     s = __SSAT(((q31_t) ((x >> 16) - (y >> 16))), 16) << 16;
00742
00743     sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
00744
00745     return sum;
00746   }
00747
00748   /*
00749    * @brief C custom defined SHSUB16 for M3 and M0 processors
00750    */
00751   static __INLINE q31_t __SHSUB16(
00752                                   q31_t x,
00753                                   q31_t y)
00754   {
00755
00756     q31_t diff;
00757     q31_t r, s;
00758
00759     r = (short) x;
00760     s = (short) y;
00761
00762     r = ((r >> 1) - (s >> 1));
00763     s = (((x >> 17) - (y >> 17)) << 16);
00764
00765     diff = (s & 0xFFFF0000) | (r & 0x0000FFFF);
00766
00767     return diff;
00768   }
00769
00770   /*
00771    * @brief C custom defined QASX for M3 and M0 processors
00772    */
00773   static __INLINE q31_t __QASX(
00774                                q31_t x,
00775                                q31_t y)
00776   {
00777
00778     q31_t sum = 0;
00779
00780     sum = ((sum + clip_q31_to_q15((q31_t) ((short) (x >> 16) + (short) y))) << 16) +
00781       clip_q31_to_q15((q31_t) ((short) x - (short) (y >> 16)));
00782
00783     return sum;
00784   }
00785
00786   /*
00787    * @brief C custom defined SHASX for M3 and M0 processors
00788    */
00789   static __INLINE q31_t __SHASX(
00790                                 q31_t x,
00791                                 q31_t y)
00792   {
00793
00794     q31_t sum;
00795     q31_t r, s;
00796
00797     r = (short) x;
00798     s = (short) y;
00799
00800     r = ((r >> 1) - (y >> 17));
00801     s = (((x >> 17) + (s >> 1)) << 16);
00802
00803     sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
00804
00805     return sum;
00806   }
00807
00808
00809   /*
00810    * @brief C custom defined QSAX for M3 and M0 processors
00811    */
00812   static __INLINE q31_t __QSAX(
00813                                q31_t x,
00814                                q31_t y)
00815   {
00816
00817     q31_t sum = 0;
00818
00819     sum = ((sum + clip_q31_to_q15((q31_t) ((short) (x >> 16) - (short) y))) << 16) +
00820       clip_q31_to_q15((q31_t) ((short) x + (short) (y >> 16)));
00821
00822     return sum;
00823   }
00824
00825   /*
00826    * @brief C custom defined SHSAX for M3 and M0 processors
00827    */
00828   static __INLINE q31_t __SHSAX(
00829                                 q31_t x,
00830                                 q31_t y)
00831   {
00832
00833     q31_t sum;
00834     q31_t r, s;
00835
00836     r = (short) x;
00837     s = (short) y;
00838
00839     r = ((r >> 1) + (y >> 17));
00840     s = (((x >> 17) - (s >> 1)) << 16);
00841
00842     sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
00843
00844     return sum;
00845   }
00846
00847   /*
00848    * @brief C custom defined SMUSDX for M3 and M0 processors
00849    */
00850   static __INLINE q31_t __SMUSDX(
00851                                  q31_t x,
00852                                  q31_t y)
00853   {
00854
00855     return ((q31_t)(((short) x * (short) (y >> 16)) -
00856                     ((short) (x >> 16) * (short) y)));
00857   }
00858
00859   /*
00860    * @brief C custom defined SMUADX for M3 and M0 processors
00861    */
00862   static __INLINE q31_t __SMUADX(
00863                                  q31_t x,
00864                                  q31_t y)
00865   {
00866
00867     return ((q31_t)(((short) x * (short) (y >> 16)) +
00868                     ((short) (x >> 16) * (short) y)));
00869   }
00870
00871   /*
00872    * @brief C custom defined QADD for M3 and M0 processors
00873    */
00874   static __INLINE q31_t __QADD(
00875                                q31_t x,
00876                                q31_t y)
00877   {
00878     return clip_q63_to_q31((q63_t) x + y);
00879   }
00880
00881   /*
00882    * @brief C custom defined QSUB for M3 and M0 processors
00883    */
00884   static __INLINE q31_t __QSUB(
00885                                q31_t x,
00886                                q31_t y)
00887   {
00888     return clip_q63_to_q31((q63_t) x - y);
00889   }
00890
00891   /*
00892    * @brief C custom defined SMLAD for M3 and M0 processors
00893    */
00894   static __INLINE q31_t __SMLAD(
00895                                 q31_t x,
00896                                 q31_t y,
00897                                 q31_t sum)
00898   {
00899
00900     return (sum + ((short) (x >> 16) * (short) (y >> 16)) +
00901             ((short) x * (short) y));
00902   }
00903
00904   /*
00905    * @brief C custom defined SMLADX for M3 and M0 processors
00906    */
00907   static __INLINE q31_t __SMLADX(
00908                                  q31_t x,
00909                                  q31_t y,
00910                                  q31_t sum)
00911   {
00912
00913     return (sum + ((short) (x >> 16) * (short) (y)) +
00914             ((short) x * (short) (y >> 16)));
00915   }
00916
00917   /*
00918    * @brief C custom defined SMLSDX for M3 and M0 processors
00919    */
00920   static __INLINE q31_t __SMLSDX(
00921                                  q31_t x,
00922                                  q31_t y,
00923                                  q31_t sum)
00924   {
00925
00926     return (sum - ((short) (x >> 16) * (short) (y)) +
00927             ((short) x * (short) (y >> 16)));
00928   }
00929
00930   /*
00931    * @brief C custom defined SMLALD for M3 and M0 processors
00932    */
00933   static __INLINE q63_t __SMLALD(
00934                                  q31_t x,
00935                                  q31_t y,
00936                                  q63_t sum)
00937   {
00938
00939     return (sum + ((short) (x >> 16) * (short) (y >> 16)) +
00940             ((short) x * (short) y));
00941   }
00942
00943   /*
00944    * @brief C custom defined SMLALDX for M3 and M0 processors
00945    */
00946   static __INLINE q63_t __SMLALDX(
00947                                   q31_t x,
00948                                   q31_t y,
00949                                   q63_t sum)
00950   {
00951
00952     return (sum + ((short) (x >> 16) * (short) y)) +
00953       ((short) x * (short) (y >> 16));
00954   }
00955
00956   /*
00957    * @brief C custom defined SMUAD for M3 and M0 processors
00958    */
00959   static __INLINE q31_t __SMUAD(
00960                                 q31_t x,
00961                                 q31_t y)
00962   {
00963
00964     return (((x >> 16) * (y >> 16)) +
00965             (((x << 16) >> 16) * ((y << 16) >> 16)));
00966   }
00967
00968   /*
00969    * @brief C custom defined SMUSD for M3 and M0 processors
00970    */
00971   static __INLINE q31_t __SMUSD(
00972                                 q31_t x,
00973                                 q31_t y)
00974   {
00975
00976     return (-((x >> 16) * (y >> 16)) +
00977             (((x << 16) >> 16) * ((y << 16) >> 16)));
00978   }
00979
00980
00981
00982
00983 #endif /* (ARM_MATH_CM3) || defined (ARM_MATH_CM0) */
00984
00985
00989   typedef struct
00990   {
00991     uint16_t numTaps;
00992     q7_t *pState;
00993     q7_t *pCoeffs;
00994   } arm_fir_instance_q7;
00995
00999   typedef struct
01000   {
01001     uint16_t numTaps;
01002     q15_t *pState;
01003     q15_t *pCoeffs;
01004   } arm_fir_instance_q15;
01005
01009   typedef struct
01010   {
01011     uint16_t numTaps;
01012     q31_t *pState;
01013     q31_t *pCoeffs;
01014   } arm_fir_instance_q31;
01015
01019   typedef struct
01020   {
01021     uint16_t numTaps;
01022     float32_t *pState;
01023     float32_t *pCoeffs;
01024   } arm_fir_instance_f32;
01025
01026
01035   void arm_fir_q7(
01036                   const arm_fir_instance_q7 * S,
01037                    q7_t * pSrc,
01038                   q7_t * pDst,
01039                   uint32_t blockSize);
01040
01041
01051   void arm_fir_init_q7(
01052                        arm_fir_instance_q7 * S,
01053                        uint16_t numTaps,
01054                        q7_t * pCoeffs,
01055                        q7_t * pState,
01056                        uint32_t blockSize);
01057
01058
01067   void arm_fir_q15(
01068                    const arm_fir_instance_q15 * S,
01069                     q15_t * pSrc,
01070                    q15_t * pDst,
01071                    uint32_t blockSize);
01072
01081   void arm_fir_fast_q15(
01082                         const arm_fir_instance_q15 * S,
01083                          q15_t * pSrc,
01084                         q15_t * pDst,
01085                         uint32_t blockSize);
01086
01098        arm_status arm_fir_init_q15(
01099                               arm_fir_instance_q15 * S,
01100                               uint16_t numTaps,
01101                               q15_t * pCoeffs,
01102                               q15_t * pState,
01103                               uint32_t blockSize);
01104
01113   void arm_fir_q31(
01114                    const arm_fir_instance_q31 * S,
01115                     q31_t * pSrc,
01116                    q31_t * pDst,
01117                    uint32_t blockSize);
01118
01127   void arm_fir_fast_q31(
01128                         const arm_fir_instance_q31 * S,
01129                          q31_t * pSrc,
01130                         q31_t * pDst,
01131                         uint32_t blockSize);
01132
01142   void arm_fir_init_q31(
01143                         arm_fir_instance_q31 * S,
01144                         uint16_t numTaps,
01145                         q31_t * pCoeffs,
01146                         q31_t * pState,
01147                         uint32_t blockSize);
01148
01157   void arm_fir_f32(
01158                    const arm_fir_instance_f32 * S,
01159                     float32_t * pSrc,
01160                    float32_t * pDst,
01161                    uint32_t blockSize);
01162
01172   void arm_fir_init_f32(
01173                         arm_fir_instance_f32 * S,
01174                         uint16_t numTaps,
01175                         float32_t * pCoeffs,
01176                         float32_t * pState,
01177                         uint32_t blockSize);
01178
01179
01183   typedef struct
01184   {
01185     int8_t numStages;
01186     q15_t *pState;
01187     q15_t *pCoeffs;
01188     int8_t postShift;
01190   } arm_biquad_casd_df1_inst_q15;
01191
01192
01196   typedef struct
01197   {
01198     uint32_t numStages;
01199     q31_t *pState;
01200     q31_t *pCoeffs;
01201     uint8_t postShift;
01203   } arm_biquad_casd_df1_inst_q31;
01204
01208   typedef struct
01209   {
01210     uint32_t numStages;
01211     float32_t *pState;
01212     float32_t *pCoeffs;
01215   } arm_biquad_casd_df1_inst_f32;
01216
01217
01218
01228   void arm_biquad_cascade_df1_q15(
01229                                   const arm_biquad_casd_df1_inst_q15 * S,
01230                                    q15_t * pSrc,
01231                                   q15_t * pDst,
01232                                   uint32_t blockSize);
01233
01244   void arm_biquad_cascade_df1_init_q15(
01245                                        arm_biquad_casd_df1_inst_q15 * S,
01246                                        uint8_t numStages,
01247                                        q15_t * pCoeffs,
01248                                        q15_t * pState,
01249                                        int8_t postShift);
01250
01251
01261   void arm_biquad_cascade_df1_fast_q15(
01262                                        const arm_biquad_casd_df1_inst_q15 * S,
01263                                         q15_t * pSrc,
01264                                        q15_t * pDst,
01265                                        uint32_t blockSize);
01266
01267
01277   void arm_biquad_cascade_df1_q31(
01278                                   const arm_biquad_casd_df1_inst_q31 * S,
01279                                    q31_t * pSrc,
01280                                   q31_t * pDst,
01281                                   uint32_t blockSize);
01282
01292   void arm_biquad_cascade_df1_fast_q31(
01293                                        const arm_biquad_casd_df1_inst_q31 * S,
01294                                         q31_t * pSrc,
01295                                        q31_t * pDst,
01296                                        uint32_t blockSize);
01297
01308   void arm_biquad_cascade_df1_init_q31(
01309                                        arm_biquad_casd_df1_inst_q31 * S,
01310                                        uint8_t numStages,
01311                                        q31_t * pCoeffs,
01312                                        q31_t * pState,
01313                                        int8_t postShift);
01314
01324   void arm_biquad_cascade_df1_f32(
01325                                   const arm_biquad_casd_df1_inst_f32 * S,
01326                                    float32_t * pSrc,
01327                                   float32_t * pDst,
01328                                   uint32_t blockSize);
01329
01339   void arm_biquad_cascade_df1_init_f32(
01340                                        arm_biquad_casd_df1_inst_f32 * S,
01341                                        uint8_t numStages,
01342                                        float32_t * pCoeffs,
01343                                        float32_t * pState);
01344
01345
01350   typedef struct
01351   {
01352     uint16_t numRows;
01353     uint16_t numCols;
01354     float32_t *pData;
01355   } arm_matrix_instance_f32;
01356
01361   typedef struct
01362   {
01363     uint16_t numRows;
01364     uint16_t numCols;
01365     q15_t *pData;
01367   } arm_matrix_instance_q15;
01368
01373   typedef struct
01374   {
01375     uint16_t numRows;
01376     uint16_t numCols;
01377     q31_t *pData;
01379   } arm_matrix_instance_q31;
01380
01381
01382
01392   arm_status arm_mat_add_f32(
01393                              const arm_matrix_instance_f32 * pSrcA,
01394                              const arm_matrix_instance_f32 * pSrcB,
01395                              arm_matrix_instance_f32 * pDst);
01396
01406   arm_status arm_mat_add_q15(
01407                              const arm_matrix_instance_q15 * pSrcA,
01408                              const arm_matrix_instance_q15 * pSrcB,
01409                              arm_matrix_instance_q15 * pDst);
01410
01420   arm_status arm_mat_add_q31(
01421                              const arm_matrix_instance_q31 * pSrcA,
01422                              const arm_matrix_instance_q31 * pSrcB,
01423                              arm_matrix_instance_q31 * pDst);
01424
01425
01434   arm_status arm_mat_trans_f32(
01435                                const arm_matrix_instance_f32 * pSrc,
01436                                arm_matrix_instance_f32 * pDst);
01437
01438
01447   arm_status arm_mat_trans_q15(
01448                                const arm_matrix_instance_q15 * pSrc,
01449                                arm_matrix_instance_q15 * pDst);
01450
01459   arm_status arm_mat_trans_q31(
01460                                const arm_matrix_instance_q31 * pSrc,
01461                                arm_matrix_instance_q31 * pDst);
01462
01463
01473   arm_status arm_mat_mult_f32(
01474                               const arm_matrix_instance_f32 * pSrcA,
01475                               const arm_matrix_instance_f32 * pSrcB,
01476                               arm_matrix_instance_f32 * pDst);
01477
01487   arm_status arm_mat_mult_q15(
01488                               const arm_matrix_instance_q15 * pSrcA,
01489                               const arm_matrix_instance_q15 * pSrcB,
01490                               arm_matrix_instance_q15 * pDst,
01491                               q15_t * pState);
01492
01503   arm_status arm_mat_mult_fast_q15(
01504                                    const arm_matrix_instance_q15 * pSrcA,
01505                                    const arm_matrix_instance_q15 * pSrcB,
01506                                    arm_matrix_instance_q15 * pDst,
01507                                    q15_t * pState);
01508
01518   arm_status arm_mat_mult_q31(
01519                               const arm_matrix_instance_q31 * pSrcA,
01520                               const arm_matrix_instance_q31 * pSrcB,
01521                               arm_matrix_instance_q31 * pDst);
01522
01532   arm_status arm_mat_mult_fast_q31(
01533                                    const arm_matrix_instance_q31 * pSrcA,
01534                                    const arm_matrix_instance_q31 * pSrcB,
01535                                    arm_matrix_instance_q31 * pDst);
01536
01537
01547   arm_status arm_mat_sub_f32(
01548                              const arm_matrix_instance_f32 * pSrcA,
01549                              const arm_matrix_instance_f32 * pSrcB,
01550                              arm_matrix_instance_f32 * pDst);
01551
01561   arm_status arm_mat_sub_q15(
01562                              const arm_matrix_instance_q15 * pSrcA,
01563                              const arm_matrix_instance_q15 * pSrcB,
01564                              arm_matrix_instance_q15 * pDst);
01565
01575   arm_status arm_mat_sub_q31(
01576                              const arm_matrix_instance_q31 * pSrcA,
01577                              const arm_matrix_instance_q31 * pSrcB,
01578                              arm_matrix_instance_q31 * pDst);
01579
01589   arm_status arm_mat_scale_f32(
01590                                const arm_matrix_instance_f32 * pSrc,
01591                                float32_t scale,
01592                                arm_matrix_instance_f32 * pDst);
01593
01604   arm_status arm_mat_scale_q15(
01605                                const arm_matrix_instance_q15 * pSrc,
01606                                q15_t scaleFract,
01607                                int32_t shift,
01608                                arm_matrix_instance_q15 * pDst);
01609
01620   arm_status arm_mat_scale_q31(
01621                                const arm_matrix_instance_q31 * pSrc,
01622                                q31_t scaleFract,
01623                                int32_t shift,
01624                                arm_matrix_instance_q31 * pDst);
01625
01626
01636   void arm_mat_init_q31(
01637                         arm_matrix_instance_q31 * S,
01638                         uint16_t nRows,
01639                         uint16_t nColumns,
01640                         q31_t   *pData);
01641
01651   void arm_mat_init_q15(
01652                         arm_matrix_instance_q15 * S,
01653                         uint16_t nRows,
01654                         uint16_t nColumns,
01655                         q15_t    *pData);
01656
01666   void arm_mat_init_f32(
01667                         arm_matrix_instance_f32 * S,
01668                         uint16_t nRows,
01669                         uint16_t nColumns,
01670                         float32_t   *pData);
01671
01672
01673
01677   typedef struct
01678   {
01679     q15_t A0;
01680         #ifdef ARM_MATH_CM0
01681         q15_t A1;
01682         q15_t A2;
01683         #else
01684     q31_t A1;
01685         #endif
01686     q15_t state[3];
01687     q15_t Kp;
01688     q15_t Ki;
01689     q15_t Kd;
01690   } arm_pid_instance_q15;
01691
01695   typedef struct
01696   {
01697     q31_t A0;
01698     q31_t A1;
01699     q31_t A2;
01700     q31_t state[3];
01701     q31_t Kp;
01702     q31_t Ki;
01703     q31_t Kd;
01705   } arm_pid_instance_q31;
01706
01710   typedef struct
01711   {
01712     float32_t A0;
01713     float32_t A1;
01714     float32_t A2;
01715     float32_t state[3];
01716     float32_t Kp;
01717     float32_t Ki;
01718     float32_t Kd;
01719   } arm_pid_instance_f32;
01720
01721
01722
01729   void arm_pid_init_f32(
01730                         arm_pid_instance_f32 * S,
01731                         int32_t resetStateFlag);
01732
01738   void arm_pid_reset_f32(
01739                          arm_pid_instance_f32 * S);
01740
01741
01748   void arm_pid_init_q31(
01749                         arm_pid_instance_q31 * S,
01750                         int32_t resetStateFlag);
01751
01752
01759   void arm_pid_reset_q31(
01760                          arm_pid_instance_q31 * S);
01761
01768   void arm_pid_init_q15(
01769                         arm_pid_instance_q15 * S,
01770                         int32_t resetStateFlag);
01771
01777   void arm_pid_reset_q15(
01778                          arm_pid_instance_q15 * S);
01779
01780
01784   typedef struct
01785   {
01786     uint32_t nValues;
01787     float32_t x1;
01788     float32_t xSpacing;
01789     float32_t *pYData;
01790   } arm_linear_interp_instance_f32;
01791
01796   typedef struct
01797   {
01798     uint16_t numRows;
01799     uint16_t numCols;
01800     float32_t *pData;
01801   } arm_bilinear_interp_instance_f32;
01802
01807   typedef struct
01808   {
01809     uint16_t numRows;
01810     uint16_t numCols;
01811     q31_t *pData;
01812   } arm_bilinear_interp_instance_q31;
01813
01818   typedef struct
01819   {
01820     uint16_t numRows;
01821     uint16_t numCols;
01822     q15_t *pData;
01823   } arm_bilinear_interp_instance_q15;
01824
01829   typedef struct
01830   {
01831     uint16_t numRows;
01832     uint16_t numCols;
01833     q7_t *pData;
01834   } arm_bilinear_interp_instance_q7;
01835
01836
01846   void arm_mult_q7(
01847                     q7_t * pSrcA,
01848                     q7_t * pSrcB,
01849                    q7_t * pDst,
01850                    uint32_t blockSize);
01851
01861   void arm_mult_q15(
01862                      q15_t * pSrcA,
01863                      q15_t * pSrcB,
01864                     q15_t * pDst,
01865                     uint32_t blockSize);
01866
01876   void arm_mult_q31(
01877                      q31_t * pSrcA,
01878                      q31_t * pSrcB,
01879                     q31_t * pDst,
01880                     uint32_t blockSize);
01881
01891   void arm_mult_f32(
01892                      float32_t * pSrcA,
01893                      float32_t * pSrcB,
01894                     float32_t * pDst,
01895                     uint32_t blockSize);
01896
01897
01902   typedef struct
01903   {
01904     uint16_t  fftLen;
01905     uint8_t   ifftFlag;
01906     uint8_t   bitReverseFlag;
01907     q15_t     *pTwiddle;
01908     uint16_t  *pBitRevTable;
01909     uint16_t  twidCoefModifier;
01910     uint16_t  bitRevFactor;
01911   } arm_cfft_radix4_instance_q15;
01912
01917   typedef struct
01918   {
01919     uint16_t    fftLen;
01920     uint8_t     ifftFlag;
01921     uint8_t     bitReverseFlag;
01922     q31_t       *pTwiddle;
01923     uint16_t    *pBitRevTable;
01924     uint16_t    twidCoefModifier;
01925     uint16_t    bitRevFactor;
01926   } arm_cfft_radix4_instance_q31;
01927
01932   typedef struct
01933   {
01934     uint16_t     fftLen;
01935     uint8_t      ifftFlag;
01936     uint8_t      bitReverseFlag;
01937     float32_t    *pTwiddle;
01938     uint16_t     *pBitRevTable;
01939     uint16_t     twidCoefModifier;
01940     uint16_t     bitRevFactor;
01941         float32_t    onebyfftLen;
01942   } arm_cfft_radix4_instance_f32;
01943
01951   void arm_cfft_radix4_q15(
01952                            const arm_cfft_radix4_instance_q15 * S,
01953                            q15_t * pSrc);
01954
01964   arm_status arm_cfft_radix4_init_q15(
01965                                       arm_cfft_radix4_instance_q15 * S,
01966                                       uint16_t fftLen,
01967                                       uint8_t ifftFlag,
01968                                       uint8_t bitReverseFlag);
01969
01977   void arm_cfft_radix4_q31(
01978                            const arm_cfft_radix4_instance_q31 * S,
01979                            q31_t * pSrc);
01980
01990   arm_status arm_cfft_radix4_init_q31(
01991                                       arm_cfft_radix4_instance_q31 * S,
01992                                       uint16_t fftLen,
01993                                       uint8_t ifftFlag,
01994                                       uint8_t bitReverseFlag);
01995
02003   void arm_cfft_radix4_f32(
02004                            const arm_cfft_radix4_instance_f32 * S,
02005                            float32_t * pSrc);
02006
02016   arm_status arm_cfft_radix4_init_f32(
02017                                       arm_cfft_radix4_instance_f32 * S,
02018                                       uint16_t fftLen,
02019                                       uint8_t ifftFlag,
02020                                       uint8_t bitReverseFlag);
02021
02022
02023
02024   /*----------------------------------------------------------------------
02025    *            Internal functions prototypes FFT function
02026    ----------------------------------------------------------------------*/
02027
02037   void arm_radix4_butterfly_f32(
02038                                 float32_t * pSrc,
02039                                 uint16_t fftLen,
02040                                 float32_t * pCoef,
02041                                 uint16_t twidCoefModifier);
02042
02053   void arm_radix4_butterfly_inverse_f32(
02054                                         float32_t * pSrc,
02055                                         uint16_t fftLen,
02056                                         float32_t * pCoef,
02057                                         uint16_t twidCoefModifier,
02058                                         float32_t onebyfftLen);
02059
02069   void arm_bitreversal_f32(
02070                            float32_t *pSrc,
02071                            uint16_t fftSize,
02072                            uint16_t bitRevFactor,
02073                            uint16_t *pBitRevTab);
02074
02084   void arm_radix4_butterfly_q31(
02085                                 q31_t *pSrc,
02086                                 uint32_t fftLen,
02087                                 q31_t *pCoef,
02088                                 uint32_t twidCoefModifier);
02089
02099   void arm_radix4_butterfly_inverse_q31(
02100                                         q31_t * pSrc,
02101                                         uint32_t fftLen,
02102                                         q31_t * pCoef,
02103                                         uint32_t twidCoefModifier);
02104
02114   void arm_bitreversal_q31(
02115                            q31_t * pSrc,
02116                            uint32_t fftLen,
02117                            uint16_t bitRevFactor,
02118                            uint16_t *pBitRevTab);
02119
02129   void arm_radix4_butterfly_q15(
02130                                 q15_t *pSrc16,
02131                                 uint32_t fftLen,
02132                                 q15_t *pCoef16,
02133                                 uint32_t twidCoefModifier);
02134
02144   void arm_radix4_butterfly_inverse_q15(
02145                                         q15_t *pSrc16,
02146                                         uint32_t fftLen,
02147                                         q15_t *pCoef16,
02148                                         uint32_t twidCoefModifier);
02149
02159   void arm_bitreversal_q15(
02160                            q15_t * pSrc,
02161                            uint32_t fftLen,
02162                            uint16_t bitRevFactor,
02163                            uint16_t *pBitRevTab);
02164
02169   typedef struct
02170   {
02171     uint32_t fftLenReal;
02172     uint32_t fftLenBy2;
02173     uint8_t  ifftFlagR;
02174         uint8_t  bitReverseFlagR;
02175     uint32_t twidCoefRModifier;
02176     q15_t    *pTwiddleAReal;
02177     q15_t    *pTwiddleBReal;
02178     arm_cfft_radix4_instance_q15 *pCfft;
02179   } arm_rfft_instance_q15;
02180
02185   typedef struct
02186   {
02187     uint32_t fftLenReal;
02188     uint32_t fftLenBy2;
02189     uint8_t  ifftFlagR;
02190         uint8_t  bitReverseFlagR;
02191     uint32_t twidCoefRModifier;
02192     q31_t    *pTwiddleAReal;
02193     q31_t    *pTwiddleBReal;
02194     arm_cfft_radix4_instance_q31 *pCfft;
02195   } arm_rfft_instance_q31;
02196
02201   typedef struct
02202   {
02203     uint32_t  fftLenReal;
02204     uint16_t  fftLenBy2;
02205     uint8_t   ifftFlagR;
02206     uint8_t   bitReverseFlagR;
02207         uint32_t  twidCoefRModifier;
02208     float32_t *pTwiddleAReal;
02209     float32_t *pTwiddleBReal;
02210     arm_cfft_radix4_instance_f32 *pCfft;
02211   } arm_rfft_instance_f32;
02212
02221   void arm_rfft_q15(
02222                     const arm_rfft_instance_q15 * S,
02223                     q15_t * pSrc,
02224                     q15_t * pDst);
02225
02236   arm_status arm_rfft_init_q15(
02237                                arm_rfft_instance_q15 * S,
02238                                arm_cfft_radix4_instance_q15 * S_CFFT,
02239                                uint32_t fftLenReal,
02240                                uint32_t ifftFlagR,
02241                                uint32_t bitReverseFlag);
02242
02251   void arm_rfft_q31(
02252                     const arm_rfft_instance_q31 * S,
02253                     q31_t * pSrc,
02254                     q31_t * pDst);
02255
02266   arm_status arm_rfft_init_q31(
02267                                arm_rfft_instance_q31 * S,
02268                                arm_cfft_radix4_instance_q31 * S_CFFT,
02269                                uint32_t fftLenReal,
02270                                uint32_t ifftFlagR,
02271                                uint32_t bitReverseFlag);
02272
02283   arm_status arm_rfft_init_f32(
02284                                arm_rfft_instance_f32 * S,
02285                                arm_cfft_radix4_instance_f32 * S_CFFT,
02286                                uint32_t fftLenReal,
02287                                uint32_t ifftFlagR,
02288                                uint32_t bitReverseFlag);
02289
02298   void arm_rfft_f32(
02299                     const arm_rfft_instance_f32 * S,
02300                     float32_t * pSrc,
02301                     float32_t * pDst);
02302
02307   typedef struct
02308   {
02309     uint16_t N;
02310     uint16_t Nby2;
02311     float32_t normalize;
02312     float32_t *pTwiddle;
02313     float32_t *pCosFactor;
02314     arm_rfft_instance_f32 *pRfft;
02315     arm_cfft_radix4_instance_f32 *pCfft;
02316   } arm_dct4_instance_f32;
02317
02329   arm_status arm_dct4_init_f32(
02330                                arm_dct4_instance_f32 * S,
02331                                arm_rfft_instance_f32 * S_RFFT,
02332                                arm_cfft_radix4_instance_f32 * S_CFFT,
02333                                uint16_t N,
02334                                uint16_t Nby2,
02335                                float32_t normalize);
02336
02345   void arm_dct4_f32(
02346                     const arm_dct4_instance_f32 * S,
02347                     float32_t * pState,
02348                     float32_t * pInlineBuffer);
02349
02354   typedef struct
02355   {
02356     uint16_t N;
02357     uint16_t Nby2;
02358     q31_t normalize;
02359     q31_t *pTwiddle;
02360     q31_t *pCosFactor;
02361     arm_rfft_instance_q31 *pRfft;
02362     arm_cfft_radix4_instance_q31 *pCfft;
02363   } arm_dct4_instance_q31;
02364
02376   arm_status arm_dct4_init_q31(
02377                                arm_dct4_instance_q31 * S,
02378                                arm_rfft_instance_q31 * S_RFFT,
02379                                arm_cfft_radix4_instance_q31 * S_CFFT,
02380                                uint16_t N,
02381                                uint16_t Nby2,
02382                                q31_t normalize);
02383
02392   void arm_dct4_q31(
02393                     const arm_dct4_instance_q31 * S,
02394                     q31_t * pState,
02395                     q31_t * pInlineBuffer);
02396
02401   typedef struct
02402   {
02403     uint16_t N;
02404     uint16_t Nby2;
02405     q15_t normalize;
02406     q15_t *pTwiddle;
02407     q15_t *pCosFactor;
02408     arm_rfft_instance_q15 *pRfft;
02409     arm_cfft_radix4_instance_q15 *pCfft;
02410   } arm_dct4_instance_q15;
02411
02423   arm_status arm_dct4_init_q15(
02424                                arm_dct4_instance_q15 * S,
02425                                arm_rfft_instance_q15 * S_RFFT,
02426                                arm_cfft_radix4_instance_q15 * S_CFFT,
02427                                uint16_t N,
02428                                uint16_t Nby2,
02429                                q15_t normalize);
02430
02439   void arm_dct4_q15(
02440                     const arm_dct4_instance_q15 * S,
02441                     q15_t * pState,
02442                     q15_t * pInlineBuffer);
02443
02453   void arm_add_f32(
02454                    float32_t * pSrcA,
02455                    float32_t * pSrcB,
02456                    float32_t * pDst,
02457                    uint32_t blockSize);
02458
02468   void arm_add_q7(
02469                   q7_t * pSrcA,
02470                   q7_t * pSrcB,
02471                   q7_t * pDst,
02472                   uint32_t blockSize);
02473
02483   void arm_add_q15(
02484                     q15_t * pSrcA,
02485                     q15_t * pSrcB,
02486                    q15_t * pDst,
02487                    uint32_t blockSize);
02488
02498   void arm_add_q31(
02499                     q31_t * pSrcA,
02500                     q31_t * pSrcB,
02501                    q31_t * pDst,
02502                    uint32_t blockSize);
02503
02513   void arm_sub_f32(
02514                     float32_t * pSrcA,
02515                     float32_t * pSrcB,
02516                    float32_t * pDst,
02517                    uint32_t blockSize);
02518
02528   void arm_sub_q7(
02529                    q7_t * pSrcA,
02530                    q7_t * pSrcB,
02531                   q7_t * pDst,
02532                   uint32_t blockSize);
02533
02543   void arm_sub_q15(
02544                     q15_t * pSrcA,
02545                     q15_t * pSrcB,
02546                    q15_t * pDst,
02547                    uint32_t blockSize);
02548
02558   void arm_sub_q31(
02559                     q31_t * pSrcA,
02560                     q31_t * pSrcB,
02561                    q31_t * pDst,
02562                    uint32_t blockSize);
02563
02573   void arm_scale_f32(
02574                       float32_t * pSrc,
02575                      float32_t scale,
02576                      float32_t * pDst,
02577                      uint32_t blockSize);
02578
02589   void arm_scale_q7(
02590                      q7_t * pSrc,
02591                     q7_t scaleFract,
02592                     int8_t shift,
02593                     q7_t * pDst,
02594                     uint32_t blockSize);
02595
02606   void arm_scale_q15(
02607                       q15_t * pSrc,
02608                      q15_t scaleFract,
02609                      int8_t shift,
02610                      q15_t * pDst,
02611                      uint32_t blockSize);
02612
02623   void arm_scale_q31(
02624                       q31_t * pSrc,
02625                      q31_t scaleFract,
02626                      int8_t shift,
02627                      q31_t * pDst,
02628                      uint32_t blockSize);
02629
02638   void arm_abs_q7(
02639                    q7_t * pSrc,
02640                   q7_t * pDst,
02641                   uint32_t blockSize);
02642
02651   void arm_abs_f32(
02652                     float32_t * pSrc,
02653                    float32_t * pDst,
02654                    uint32_t blockSize);
02655
02664   void arm_abs_q15(
02665                     q15_t * pSrc,
02666                    q15_t * pDst,
02667                    uint32_t blockSize);
02668
02677   void arm_abs_q31(
02678                     q31_t * pSrc,
02679                    q31_t * pDst,
02680                    uint32_t blockSize);
02681
02691   void arm_dot_prod_f32(
02692                          float32_t * pSrcA,
02693                          float32_t * pSrcB,
02694                         uint32_t blockSize,
02695                         float32_t * result);
02696
02706   void arm_dot_prod_q7(
02707                         q7_t * pSrcA,
02708                         q7_t * pSrcB,
02709                        uint32_t blockSize,
02710                        q31_t * result);
02711
02721   void arm_dot_prod_q15(
02722                          q15_t * pSrcA,
02723                          q15_t * pSrcB,
02724                         uint32_t blockSize,
02725                         q63_t * result);
02726
02736   void arm_dot_prod_q31(
02737                          q31_t * pSrcA,
02738                          q31_t * pSrcB,
02739                         uint32_t blockSize,
02740                         q63_t * result);
02741
02751   void arm_shift_q7(
02752                      q7_t * pSrc,
02753                     int8_t shiftBits,
02754                     q7_t * pDst,
02755                     uint32_t blockSize);
02756
02766   void arm_shift_q15(
02767                       q15_t * pSrc,
02768                      int8_t shiftBits,
02769                      q15_t * pDst,
02770                      uint32_t blockSize);
02771
02781   void arm_shift_q31(
02782                       q31_t * pSrc,
02783                      int8_t shiftBits,
02784                      q31_t * pDst,
02785                      uint32_t blockSize);
02786
02796   void arm_offset_f32(
02797                        float32_t * pSrc,
02798                       float32_t offset,
02799                       float32_t * pDst,
02800                       uint32_t blockSize);
02801
02811   void arm_offset_q7(
02812                       q7_t * pSrc,
02813                      q7_t offset,
02814                      q7_t * pDst,
02815                      uint32_t blockSize);
02816
02826   void arm_offset_q15(
02827                        q15_t * pSrc,
02828                       q15_t offset,
02829                       q15_t * pDst,
02830                       uint32_t blockSize);
02831
02841   void arm_offset_q31(
02842                        q31_t * pSrc,
02843                       q31_t offset,
02844                       q31_t * pDst,
02845                       uint32_t blockSize);
02846
02855   void arm_negate_f32(
02856                        float32_t * pSrc,
02857                       float32_t * pDst,
02858                       uint32_t blockSize);
02859
02868   void arm_negate_q7(
02869                       q7_t * pSrc,
02870                      q7_t * pDst,
02871                      uint32_t blockSize);
02872
02881   void arm_negate_q15(
02882                        q15_t * pSrc,
02883                       q15_t * pDst,
02884                       uint32_t blockSize);
02885
02894   void arm_negate_q31(
02895                        q31_t * pSrc,
02896                       q31_t * pDst,
02897                       uint32_t blockSize);
02905   void arm_copy_f32(
02906                      float32_t * pSrc,
02907                     float32_t * pDst,
02908                     uint32_t blockSize);
02909
02917   void arm_copy_q7(
02918                     q7_t * pSrc,
02919                    q7_t * pDst,
02920                    uint32_t blockSize);
02921
02929   void arm_copy_q15(
02930                      q15_t * pSrc,
02931                     q15_t * pDst,
02932                     uint32_t blockSize);
02933
02941   void arm_copy_q31(
02942                      q31_t * pSrc,
02943                     q31_t * pDst,
02944                     uint32_t blockSize);
02952   void arm_fill_f32(
02953                      float32_t value,
02954                     float32_t * pDst,
02955                     uint32_t blockSize);
02956
02964   void arm_fill_q7(
02965                     q7_t value,
02966                    q7_t * pDst,
02967                    uint32_t blockSize);
02968
02976   void arm_fill_q15(
02977                      q15_t value,
02978                     q15_t * pDst,
02979                     uint32_t blockSize);
02980
02988   void arm_fill_q31(
02989                      q31_t value,
02990                     q31_t * pDst,
02991                     uint32_t blockSize);
02992
03003   void arm_conv_f32(
03004                      float32_t * pSrcA,
03005                     uint32_t srcALen,
03006                      float32_t * pSrcB,
03007                     uint32_t srcBLen,
03008                     float32_t * pDst);
03009
03020   void arm_conv_q15(
03021                      q15_t * pSrcA,
03022                     uint32_t srcALen,
03023                      q15_t * pSrcB,
03024                     uint32_t srcBLen,
03025                     q15_t * pDst);
03026
03037   void arm_conv_fast_q15(
03038                           q15_t * pSrcA,
03039                          uint32_t srcALen,
03040                           q15_t * pSrcB,
03041                          uint32_t srcBLen,
03042                          q15_t * pDst);
03043
03054   void arm_conv_q31(
03055                      q31_t * pSrcA,
03056                     uint32_t srcALen,
03057                      q31_t * pSrcB,
03058                     uint32_t srcBLen,
03059                     q31_t * pDst);
03060
03071   void arm_conv_fast_q31(
03072                           q31_t * pSrcA,
03073                          uint32_t srcALen,
03074                           q31_t * pSrcB,
03075                          uint32_t srcBLen,
03076                          q31_t * pDst);
03077
03088   void arm_conv_q7(
03089                     q7_t * pSrcA,
03090                    uint32_t srcALen,
03091                     q7_t * pSrcB,
03092                    uint32_t srcBLen,
03093                    q7_t * pDst);
03094
03107   arm_status arm_conv_partial_f32(
03108                                    float32_t * pSrcA,
03109                                   uint32_t srcALen,
03110                                    float32_t * pSrcB,
03111                                   uint32_t srcBLen,
03112                                   float32_t * pDst,
03113                                   uint32_t firstIndex,
03114                                   uint32_t numPoints);
03115
03128   arm_status arm_conv_partial_q15(
03129                                    q15_t * pSrcA,
03130                                   uint32_t srcALen,
03131                                    q15_t * pSrcB,
03132                                   uint32_t srcBLen,
03133                                   q15_t * pDst,
03134                                   uint32_t firstIndex,
03135                                   uint32_t numPoints);
03136
03149   arm_status arm_conv_partial_fast_q15(
03150                                         q15_t * pSrcA,
03151                                        uint32_t srcALen,
03152                                         q15_t * pSrcB,
03153                                        uint32_t srcBLen,
03154                                        q15_t * pDst,
03155                                        uint32_t firstIndex,
03156                                        uint32_t numPoints);
03157
03170   arm_status arm_conv_partial_q31(
03171                                    q31_t * pSrcA,
03172                                   uint32_t srcALen,
03173                                    q31_t * pSrcB,
03174                                   uint32_t srcBLen,
03175                                   q31_t * pDst,
03176                                   uint32_t firstIndex,
03177                                   uint32_t numPoints);
03178
03179
03192   arm_status arm_conv_partial_fast_q31(
03193                                         q31_t * pSrcA,
03194                                        uint32_t srcALen,
03195                                         q31_t * pSrcB,
03196                                        uint32_t srcBLen,
03197                                        q31_t * pDst,
03198                                        uint32_t firstIndex,
03199                                        uint32_t numPoints);
03200
03213   arm_status arm_conv_partial_q7(
03214                                   q7_t * pSrcA,
03215                                  uint32_t srcALen,
03216                                   q7_t * pSrcB,
03217                                  uint32_t srcBLen,
03218                                  q7_t * pDst,
03219                                  uint32_t firstIndex,
03220                                  uint32_t numPoints);
03221
03222
03227   typedef struct
03228   {
03229     uint8_t M;
03230     uint16_t numTaps;
03231     q15_t *pCoeffs;
03232     q15_t *pState;
03233   } arm_fir_decimate_instance_q15;
03234
03239   typedef struct
03240   {
03241     uint8_t M;
03242     uint16_t numTaps;
03243     q31_t *pCoeffs;
03244     q31_t *pState;
03246   } arm_fir_decimate_instance_q31;
03247
03252   typedef struct
03253   {
03254     uint8_t M;
03255     uint16_t numTaps;
03256     float32_t *pCoeffs;
03257     float32_t *pState;
03259   } arm_fir_decimate_instance_f32;
03260
03261
03262
03272   void arm_fir_decimate_f32(
03273                             const arm_fir_decimate_instance_f32 * S,
03274                              float32_t * pSrc,
03275                             float32_t * pDst,
03276                             uint32_t blockSize);
03277
03278
03291   arm_status arm_fir_decimate_init_f32(
03292                                        arm_fir_decimate_instance_f32 * S,
03293                                        uint16_t numTaps,
03294                                        uint8_t M,
03295                                        float32_t * pCoeffs,
03296                                        float32_t * pState,
03297                                        uint32_t blockSize);
03298
03308   void arm_fir_decimate_q15(
03309                             const arm_fir_decimate_instance_q15 * S,
03310                              q15_t * pSrc,
03311                             q15_t * pDst,
03312                             uint32_t blockSize);
03313
03323   void arm_fir_decimate_fast_q15(
03324                                  const arm_fir_decimate_instance_q15 * S,
03325                                   q15_t * pSrc,
03326                                  q15_t * pDst,
03327                                  uint32_t blockSize);
03328
03329
03330
03343   arm_status arm_fir_decimate_init_q15(
03344                                        arm_fir_decimate_instance_q15 * S,
03345                                        uint16_t numTaps,
03346                                        uint8_t M,
03347                                        q15_t * pCoeffs,
03348                                        q15_t * pState,
03349                                        uint32_t blockSize);
03350
03360   void arm_fir_decimate_q31(
03361                             const arm_fir_decimate_instance_q31 * S,
03362                              q31_t * pSrc,
03363                             q31_t * pDst,
03364                             uint32_t blockSize);
03365
03375   void arm_fir_decimate_fast_q31(
03376                                  arm_fir_decimate_instance_q31 * S,
03377                                   q31_t * pSrc,
03378                                  q31_t * pDst,
03379                                  uint32_t blockSize);
03380
03381
03394   arm_status arm_fir_decimate_init_q31(
03395                                        arm_fir_decimate_instance_q31 * S,
03396                                        uint16_t numTaps,
03397                                        uint8_t M,
03398                                        q31_t * pCoeffs,
03399                                        q31_t * pState,
03400                                        uint32_t blockSize);
03401
03402
03403
03408   typedef struct
03409   {
03410     uint8_t L;
03411     uint16_t phaseLength;
03412     q15_t *pCoeffs;
03413     q15_t *pState;
03414   } arm_fir_interpolate_instance_q15;
03415
03420   typedef struct
03421   {
03422     uint8_t L;
03423     uint16_t phaseLength;
03424     q31_t *pCoeffs;
03425     q31_t *pState;
03426   } arm_fir_interpolate_instance_q31;
03427
03432   typedef struct
03433   {
03434     uint8_t L;
03435     uint16_t phaseLength;
03436     float32_t *pCoeffs;
03437     float32_t *pState;
03438   } arm_fir_interpolate_instance_f32;
03439
03440
03450   void arm_fir_interpolate_q15(
03451                                const arm_fir_interpolate_instance_q15 * S,
03452                                 q15_t * pSrc,
03453                                q15_t * pDst,
03454                                uint32_t blockSize);
03455
03456
03469   arm_status arm_fir_interpolate_init_q15(
03470                                           arm_fir_interpolate_instance_q15 * S,
03471                                           uint8_t L,
03472                                           uint16_t numTaps,
03473                                           q15_t * pCoeffs,
03474                                           q15_t * pState,
03475                                           uint32_t blockSize);
03476
03486   void arm_fir_interpolate_q31(
03487                                const arm_fir_interpolate_instance_q31 * S,
03488                                 q31_t * pSrc,
03489                                q31_t * pDst,
03490                                uint32_t blockSize);
03491
03504   arm_status arm_fir_interpolate_init_q31(
03505                                           arm_fir_interpolate_instance_q31 * S,
03506                                           uint8_t L,
03507                                           uint16_t numTaps,
03508                                           q31_t * pCoeffs,
03509                                           q31_t * pState,
03510                                           uint32_t blockSize);
03511
03512
03522   void arm_fir_interpolate_f32(
03523                                const arm_fir_interpolate_instance_f32 * S,
03524                                 float32_t * pSrc,
03525                                float32_t * pDst,
03526                                uint32_t blockSize);
03527
03540   arm_status arm_fir_interpolate_init_f32(
03541                                           arm_fir_interpolate_instance_f32 * S,
03542                                           uint8_t L,
03543                                           uint16_t numTaps,
03544                                           float32_t * pCoeffs,
03545                                           float32_t * pState,
03546                                           uint32_t blockSize);
03547
03552   typedef struct
03553   {
03554     uint8_t numStages;
03555     q63_t *pState;
03556     q31_t *pCoeffs;
03557     uint8_t postShift;
03559   } arm_biquad_cas_df1_32x64_ins_q31;
03560
03561
03570   void arm_biquad_cas_df1_32x64_q31(
03571                                     const arm_biquad_cas_df1_32x64_ins_q31 * S,
03572                                      q31_t * pSrc,
03573                                     q31_t * pDst,
03574                                     uint32_t blockSize);
03575
03576
03586   void arm_biquad_cas_df1_32x64_init_q31(
03587                                          arm_biquad_cas_df1_32x64_ins_q31 * S,
03588                                          uint8_t numStages,
03589                                          q31_t * pCoeffs,
03590                                          q63_t * pState,
03591                                          uint8_t postShift);
03592
03593
03594
03599   typedef struct
03600   {
03601     uint8_t   numStages;
03602     float32_t *pState;
03603     float32_t *pCoeffs;
03604   } arm_biquad_cascade_df2T_instance_f32;
03605
03606
03616   void arm_biquad_cascade_df2T_f32(
03617                                    const arm_biquad_cascade_df2T_instance_f32 * S,
03618                                     float32_t * pSrc,
03619                                    float32_t * pDst,
03620                                    uint32_t blockSize);
03621
03622
03632   void arm_biquad_cascade_df2T_init_f32(
03633                                         arm_biquad_cascade_df2T_instance_f32 * S,
03634                                         uint8_t numStages,
03635                                         float32_t * pCoeffs,
03636                                         float32_t * pState);
03637
03638
03639
03644   typedef struct
03645   {
03646     uint16_t numStages;
03647     q15_t *pState;
03648     q15_t *pCoeffs;
03649   } arm_fir_lattice_instance_q15;
03650
03655   typedef struct
03656   {
03657     uint16_t numStages;
03658     q31_t *pState;
03659     q31_t *pCoeffs;
03660   } arm_fir_lattice_instance_q31;
03661
03666   typedef struct
03667   {
03668     uint16_t numStages;
03669     float32_t *pState;
03670     float32_t *pCoeffs;
03671   } arm_fir_lattice_instance_f32;
03672
03682   void arm_fir_lattice_init_q15(
03683                                 arm_fir_lattice_instance_q15 * S,
03684                                 uint16_t numStages,
03685                                 q15_t * pCoeffs,
03686                                 q15_t * pState);
03687
03688
03697   void arm_fir_lattice_q15(
03698                            const arm_fir_lattice_instance_q15 * S,
03699                             q15_t * pSrc,
03700                            q15_t * pDst,
03701                            uint32_t blockSize);
03702
03712   void arm_fir_lattice_init_q31(
03713                                 arm_fir_lattice_instance_q31 * S,
03714                                 uint16_t numStages,
03715                                 q31_t * pCoeffs,
03716                                 q31_t * pState);
03717
03718
03728   void arm_fir_lattice_q31(
03729                            const arm_fir_lattice_instance_q31 * S,
03730                             q31_t * pSrc,
03731                            q31_t * pDst,
03732                            uint32_t blockSize);
03733
03743   void arm_fir_lattice_init_f32(
03744                                 arm_fir_lattice_instance_f32 * S,
03745                                 uint16_t numStages,
03746                                 float32_t * pCoeffs,
03747                                 float32_t * pState);
03748
03758   void arm_fir_lattice_f32(
03759                            const arm_fir_lattice_instance_f32 * S,
03760                             float32_t * pSrc,
03761                            float32_t * pDst,
03762                            uint32_t blockSize);
03763
03767   typedef struct
03768   {
03769     uint16_t numStages;
03770     q15_t *pState;
03771     q15_t *pkCoeffs;
03772     q15_t *pvCoeffs;
03773   } arm_iir_lattice_instance_q15;
03774
03778   typedef struct
03779   {
03780     uint16_t numStages;
03781     q31_t *pState;
03782     q31_t *pkCoeffs;
03783     q31_t *pvCoeffs;
03784   } arm_iir_lattice_instance_q31;
03785
03789   typedef struct
03790   {
03791     uint16_t numStages;
03792     float32_t *pState;
03793     float32_t *pkCoeffs;
03794     float32_t *pvCoeffs;
03795   } arm_iir_lattice_instance_f32;
03796
03806   void arm_iir_lattice_f32(
03807                            const arm_iir_lattice_instance_f32 * S,
03808                             float32_t * pSrc,
03809                            float32_t * pDst,
03810                            uint32_t blockSize);
03811
03823   void arm_iir_lattice_init_f32(
03824                                 arm_iir_lattice_instance_f32 * S,
03825                                 uint16_t numStages,
03826                                 float32_t *pkCoeffs,
03827                                 float32_t *pvCoeffs,
03828                                 float32_t *pState,
03829                                 uint32_t blockSize);
03830
03831
03841   void arm_iir_lattice_q31(
03842                            const arm_iir_lattice_instance_q31 * S,
03843                             q31_t * pSrc,
03844                            q31_t * pDst,
03845                            uint32_t blockSize);
03846
03847
03859   void arm_iir_lattice_init_q31(
03860                                 arm_iir_lattice_instance_q31 * S,
03861                                 uint16_t numStages,
03862                                 q31_t *pkCoeffs,
03863                                 q31_t *pvCoeffs,
03864                                 q31_t *pState,
03865                                 uint32_t blockSize);
03866
03867
03877   void arm_iir_lattice_q15(
03878                            const arm_iir_lattice_instance_q15 * S,
03879                             q15_t * pSrc,
03880                            q15_t * pDst,
03881                            uint32_t blockSize);
03882
03883
03895   void arm_iir_lattice_init_q15(
03896                                 arm_iir_lattice_instance_q15 * S,
03897                                 uint16_t numStages,
03898                                 q15_t *pkCoeffs,
03899                                 q15_t *pvCoeffs,
03900                                 q15_t *pState,
03901                                 uint32_t blockSize);
03902
03907   typedef struct
03908   {
03909     uint16_t numTaps;
03910     float32_t *pState;
03911     float32_t *pCoeffs;
03912     float32_t mu;
03913   } arm_lms_instance_f32;
03914
03926   void arm_lms_f32(
03927                    const arm_lms_instance_f32 * S,
03928                     float32_t * pSrc,
03929                     float32_t * pRef,
03930                    float32_t * pOut,
03931                    float32_t * pErr,
03932                    uint32_t blockSize);
03933
03945   void arm_lms_init_f32(
03946                         arm_lms_instance_f32 * S,
03947                         uint16_t numTaps,
03948                         float32_t * pCoeffs,
03949                         float32_t * pState,
03950                         float32_t mu,
03951                         uint32_t blockSize);
03952
03957   typedef struct
03958   {
03959     uint16_t numTaps;
03960     q15_t *pState;
03961     q15_t *pCoeffs;
03962     q15_t mu;
03963     uint32_t postShift;
03964   } arm_lms_instance_q15;
03965
03966
03979   void arm_lms_init_q15(
03980                         arm_lms_instance_q15 * S,
03981                         uint16_t numTaps,
03982                         q15_t * pCoeffs,
03983                         q15_t * pState,
03984                         q15_t mu,
03985                         uint32_t blockSize,
03986                         uint32_t postShift);
03987
03999   void arm_lms_q15(
04000                    const arm_lms_instance_q15 * S,
04001                     q15_t * pSrc,
04002                     q15_t * pRef,
04003                    q15_t * pOut,
04004                    q15_t * pErr,
04005                    uint32_t blockSize);
04006
04007
04012   typedef struct
04013   {
04014     uint16_t numTaps;
04015     q31_t *pState;
04016     q31_t *pCoeffs;
04017     q31_t mu;
04018     uint32_t postShift;
04020   } arm_lms_instance_q31;
04021
04033   void arm_lms_q31(
04034                    const arm_lms_instance_q31 * S,
04035                     q31_t * pSrc,
04036                     q31_t * pRef,
04037                    q31_t * pOut,
04038                    q31_t * pErr,
04039                    uint32_t blockSize);
04040
04053   void arm_lms_init_q31(
04054                         arm_lms_instance_q31 * S,
04055                         uint16_t numTaps,
04056                         q31_t *pCoeffs,
04057                         q31_t *pState,
04058                         q31_t mu,
04059                         uint32_t blockSize,
04060                         uint32_t postShift);
04061
04066   typedef struct
04067   {
04068     uint16_t  numTaps;
04069     float32_t *pState;
04070     float32_t *pCoeffs;
04071     float32_t mu;
04072     float32_t energy;
04073     float32_t x0;
04074   } arm_lms_norm_instance_f32;
04075
04087   void arm_lms_norm_f32(
04088                         arm_lms_norm_instance_f32 * S,
04089                          float32_t * pSrc,
04090                          float32_t * pRef,
04091                         float32_t * pOut,
04092                         float32_t * pErr,
04093                         uint32_t blockSize);
04094
04106   void arm_lms_norm_init_f32(
04107                              arm_lms_norm_instance_f32 * S,
04108                              uint16_t numTaps,
04109                              float32_t * pCoeffs,
04110                              float32_t * pState,
04111                              float32_t mu,
04112                              uint32_t blockSize);
04113
04114
04118   typedef struct
04119   {
04120     uint16_t numTaps;
04121     q31_t *pState;
04122     q31_t *pCoeffs;
04123     q31_t mu;
04124     uint8_t postShift;
04125     q31_t *recipTable;
04126     q31_t energy;
04127     q31_t x0;
04128   } arm_lms_norm_instance_q31;
04129
04141   void arm_lms_norm_q31(
04142                         arm_lms_norm_instance_q31 * S,
04143                          q31_t * pSrc,
04144                          q31_t * pRef,
04145                         q31_t * pOut,
04146                         q31_t * pErr,
04147                         uint32_t blockSize);
04148
04161   void arm_lms_norm_init_q31(
04162                              arm_lms_norm_instance_q31 * S,
04163                              uint16_t numTaps,
04164                              q31_t * pCoeffs,
04165                              q31_t * pState,
04166                              q31_t mu,
04167                              uint32_t blockSize,
04168                              uint8_t postShift);
04169
04174   typedef struct
04175   {
04176     uint16_t numTaps;
04177     q15_t *pState;
04178     q15_t *pCoeffs;
04179     q15_t mu;
04180     uint8_t postShift;
04181     q15_t *recipTable;
04182     q15_t energy;
04183     q15_t x0;
04184   } arm_lms_norm_instance_q15;
04185
04197   void arm_lms_norm_q15(
04198                         arm_lms_norm_instance_q15 * S,
04199                          q15_t * pSrc,
04200                          q15_t * pRef,
04201                         q15_t * pOut,
04202                         q15_t * pErr,
04203                         uint32_t blockSize);
04204
04205
04218   void arm_lms_norm_init_q15(
04219                              arm_lms_norm_instance_q15 * S,
04220                              uint16_t numTaps,
04221                              q15_t * pCoeffs,
04222                              q15_t * pState,
04223                              q15_t mu,
04224                              uint32_t blockSize,
04225                              uint8_t postShift);
04226
04237   void arm_correlate_f32(
04238                           float32_t * pSrcA,
04239                          uint32_t srcALen,
04240                           float32_t * pSrcB,
04241                          uint32_t srcBLen,
04242                          float32_t * pDst);
04243
04254   void arm_correlate_q15(
04255                           q15_t * pSrcA,
04256                          uint32_t srcALen,
04257                           q15_t * pSrcB,
04258                          uint32_t srcBLen,
04259                          q15_t * pDst);
04260
04271   void arm_correlate_fast_q15(
04272                                q15_t * pSrcA,
04273                               uint32_t srcALen,
04274                                q15_t * pSrcB,
04275                               uint32_t srcBLen,
04276                               q15_t * pDst);
04277
04288   void arm_correlate_q31(
04289                           q31_t * pSrcA,
04290                          uint32_t srcALen,
04291                           q31_t * pSrcB,
04292                          uint32_t srcBLen,
04293                          q31_t * pDst);
04294
04305   void arm_correlate_fast_q31(
04306                                q31_t * pSrcA,
04307                               uint32_t srcALen,
04308                                q31_t * pSrcB,
04309                               uint32_t srcBLen,
04310                               q31_t * pDst);
04311
04322   void arm_correlate_q7(
04323                          q7_t * pSrcA,
04324                         uint32_t srcALen,
04325                          q7_t * pSrcB,
04326                         uint32_t srcBLen,
04327                         q7_t * pDst);
04328
04332   typedef struct
04333   {
04334     uint16_t numTaps;
04335     uint16_t stateIndex;
04336     float32_t *pState;
04337     float32_t *pCoeffs;
04338     uint16_t maxDelay;
04339     int32_t *pTapDelay;
04340   } arm_fir_sparse_instance_f32;
04341
04346   typedef struct
04347   {
04348     uint16_t numTaps;
04349     uint16_t stateIndex;
04350     q31_t *pState;
04351     q31_t *pCoeffs;
04352     uint16_t maxDelay;
04353     int32_t *pTapDelay;
04354   } arm_fir_sparse_instance_q31;
04355
04360   typedef struct
04361   {
04362     uint16_t numTaps;
04363     uint16_t stateIndex;
04364     q15_t *pState;
04365     q15_t *pCoeffs;
04366     uint16_t maxDelay;
04367     int32_t *pTapDelay;
04368   } arm_fir_sparse_instance_q15;
04369
04374   typedef struct
04375   {
04376     uint16_t numTaps;
04377     uint16_t stateIndex;
04378     q7_t *pState;
04379     q7_t *pCoeffs;
04380     uint16_t maxDelay;
04381     int32_t *pTapDelay;
04382   } arm_fir_sparse_instance_q7;
04383
04394   void arm_fir_sparse_f32(
04395                           arm_fir_sparse_instance_f32 * S,
04396                            float32_t * pSrc,
04397                           float32_t * pDst,
04398                           float32_t * pScratchIn,
04399                           uint32_t blockSize);
04400
04413   void arm_fir_sparse_init_f32(
04414                                arm_fir_sparse_instance_f32 * S,
04415                                uint16_t numTaps,
04416                                float32_t * pCoeffs,
04417                                float32_t * pState,
04418                                int32_t * pTapDelay,
04419                                uint16_t maxDelay,
04420                                uint32_t blockSize);
04421
04432   void arm_fir_sparse_q31(
04433                           arm_fir_sparse_instance_q31 * S,
04434                            q31_t * pSrc,
04435                           q31_t * pDst,
04436                           q31_t * pScratchIn,
04437                           uint32_t blockSize);
04438
04451   void arm_fir_sparse_init_q31(
04452                                arm_fir_sparse_instance_q31 * S,
04453                                uint16_t numTaps,
04454                                q31_t * pCoeffs,
04455                                q31_t * pState,
04456                                int32_t * pTapDelay,
04457                                uint16_t maxDelay,
04458                                uint32_t blockSize);
04459
04471   void arm_fir_sparse_q15(
04472                           arm_fir_sparse_instance_q15 * S,
04473                            q15_t * pSrc,
04474                           q15_t * pDst,
04475                           q15_t * pScratchIn,
04476                           q31_t * pScratchOut,
04477                           uint32_t blockSize);
04478
04479
04492   void arm_fir_sparse_init_q15(
04493                                arm_fir_sparse_instance_q15 * S,
04494                                uint16_t numTaps,
04495                                q15_t * pCoeffs,
04496                                q15_t * pState,
04497                                int32_t * pTapDelay,
04498                                uint16_t maxDelay,
04499                                uint32_t blockSize);
04500
04512   void arm_fir_sparse_q7(
04513                          arm_fir_sparse_instance_q7 * S,
04514                           q7_t * pSrc,
04515                          q7_t * pDst,
04516                          q7_t * pScratchIn,
04517                          q31_t * pScratchOut,
04518                          uint32_t blockSize);
04519
04532   void arm_fir_sparse_init_q7(
04533                               arm_fir_sparse_instance_q7 * S,
04534                               uint16_t numTaps,
04535                               q7_t * pCoeffs,
04536                               q7_t * pState,
04537                               int32_t *pTapDelay,
04538                               uint16_t maxDelay,
04539                               uint32_t blockSize);
04540
04541
04542   /*
04543    * @brief  Floating-point sin_cos function.
04544    * @param[in]  theta    input value in degrees
04545    * @param[out] *pSinVal points to the processed sine output.
04546    * @param[out] *pCosVal points to the processed cos output.
04547    * @return none.
04548    */
04549
04550   void arm_sin_cos_f32(
04551                        float32_t theta,
04552                        float32_t *pSinVal,
04553                        float32_t *pCcosVal);
04554
04555   /*
04556    * @brief  Q31 sin_cos function.
04557    * @param[in]  theta    scaled input value in degrees
04558    * @param[out] *pSinVal points to the processed sine output.
04559    * @param[out] *pCosVal points to the processed cosine output.
04560    * @return none.
04561    */
04562
04563   void arm_sin_cos_q31(
04564                        q31_t theta,
04565                        q31_t *pSinVal,
04566                        q31_t *pCosVal);
04567
04568
04577   void arm_cmplx_conj_f32(
04578                            float32_t * pSrc,
04579                           float32_t * pDst,
04580                           uint32_t numSamples);
04581
04590   void arm_cmplx_conj_q31(
04591                            q31_t * pSrc,
04592                           q31_t * pDst,
04593                           uint32_t numSamples);
04594
04603   void arm_cmplx_conj_q15(
04604                            q15_t * pSrc,
04605                           q15_t * pDst,
04606                           uint32_t numSamples);
04607
04608
04609
04618   void arm_cmplx_mag_squared_f32(
04619                                   float32_t * pSrc,
04620                                  float32_t * pDst,
04621                                  uint32_t numSamples);
04622
04631   void arm_cmplx_mag_squared_q31(
04632                                   q31_t * pSrc,
04633                                  q31_t * pDst,
04634                                  uint32_t numSamples);
04635
04644   void arm_cmplx_mag_squared_q15(
04645                                   q15_t * pSrc,
04646                                  q15_t * pDst,
04647                                  uint32_t numSamples);
04648
04649
04724   static __INLINE float32_t arm_pid_f32(
04725                                         arm_pid_instance_f32 * S,
04726                                         float32_t in)
04727   {
04728     float32_t out;
04729
04730     /* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]  */
04731     out = (S->A0 * in) +
04732       (S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]);
04733
04734     /* Update state */
04735     S->state[1] = S->state[0];
04736     S->state[0] = in;
04737     S->state[2] = out;
04738
04739     /* return to application */
04740     return (out);
04741
04742   }
04743
04759   static __INLINE q31_t arm_pid_q31(
04760                                     arm_pid_instance_q31 * S,
04761                                     q31_t in)
04762   {
04763     q63_t acc;
04764         q31_t out;
04765
04766     /* acc = A0 * x[n]  */
04767     acc = (q63_t) S->A0 * in;
04768
04769     /* acc += A1 * x[n-1] */
04770     acc += (q63_t) S->A1 * S->state[0];
04771
04772     /* acc += A2 * x[n-2]  */
04773     acc += (q63_t) S->A2 * S->state[1];
04774
04775     /* convert output to 1.31 format to add y[n-1] */
04776     out = (q31_t) (acc >> 31u);
04777
04778     /* out += y[n-1] */
04779     out += S->state[2];
04780
04781     /* Update state */
04782     S->state[1] = S->state[0];
04783     S->state[0] = in;
04784     S->state[2] = out;
04785
04786     /* return to application */
04787     return (out);
04788
04789   }
04790
04807   static __INLINE q15_t arm_pid_q15(
04808                                     arm_pid_instance_q15 * S,
04809                                     q15_t in)
04810   {
04811     q63_t acc;
04812     q15_t out;
04813
04814     /* Implementation of PID controller */
04815
04816         #ifdef ARM_MATH_CM0
04817
04818         /* acc = A0 * x[n]  */
04819         acc = ((q31_t) S->A0 )* in ;
04820
04821     #else
04822
04823     /* acc = A0 * x[n]  */
04824     acc = (q31_t) __SMUAD(S->A0, in);
04825
04826         #endif
04827
04828         #ifdef ARM_MATH_CM0
04829
04830         /* acc += A1 * x[n-1] + A2 * x[n-2]  */
04831         acc += (q31_t) S->A1  *  S->state[0] ;
04832         acc += (q31_t) S->A2  *  S->state[1] ;
04833
04834         #else
04835
04836     /* acc += A1 * x[n-1] + A2 * x[n-2]  */
04837     acc = __SMLALD(S->A1, (q31_t)__SIMD32(S->state), acc);
04838
04839         #endif
04840
04841     /* acc += y[n-1] */
04842     acc += (q31_t) S->state[2] << 15;
04843
04844     /* saturate the output */
04845     out = (q15_t) (__SSAT((acc >> 15), 16));
04846
04847     /* Update state */
04848     S->state[1] = S->state[0];
04849     S->state[0] = in;
04850     S->state[2] = out;
04851
04852     /* return to application */
04853     return (out);
04854
04855   }
04856
04870   arm_status arm_mat_inverse_f32(
04871                                  const arm_matrix_instance_f32 * src,
04872                                  arm_matrix_instance_f32 * dst);
04873
04874
04875
04918   static __INLINE void arm_clarke_f32(
04919                                       float32_t Ia,
04920                                       float32_t Ib,
04921                                       float32_t * pIalpha,
04922                                       float32_t * pIbeta)
04923   {
04924     /* Calculate pIalpha using the equation, pIalpha = Ia */
04925     *pIalpha = Ia;
04926
04927     /* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */
04928     *pIbeta = ((float32_t) 0.57735026919 * Ia + (float32_t) 1.15470053838 * Ib);
04929
04930   }
04931
04947   static __INLINE void arm_clarke_q31(
04948                                       q31_t Ia,
04949                                       q31_t Ib,
04950                                       q31_t * pIalpha,
04951                                       q31_t * pIbeta)
04952   {
04953     q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
04954
04955     /* Calculating pIalpha from Ia by equation pIalpha = Ia */
04956     *pIalpha = Ia;
04957
04958     /* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */
04959     product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30);
04960
04961     /* Intermediate product is calculated by (2/sqrt(3) * Ib) */
04962     product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30);
04963
04964     /* pIbeta is calculated by adding the intermediate products */
04965     *pIbeta = __QADD(product1, product2);
04966   }
04967
04979   void arm_q7_to_q31(
04980                      q7_t * pSrc,
04981                      q31_t * pDst,
04982                      uint32_t blockSize);
04983
04984
04985
04986
05022   static __INLINE void arm_inv_clarke_f32(
05023                                           float32_t Ialpha,
05024                                           float32_t Ibeta,
05025                                           float32_t * pIa,
05026                                           float32_t * pIb)
05027   {
05028     /* Calculating pIa from Ialpha by equation pIa = Ialpha */
05029     *pIa = Ialpha;
05030
05031     /* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibeta */
05032     *pIb = -0.5 * Ialpha + (float32_t) 0.8660254039 *Ibeta;
05033
05034   }
05035
05051   static __INLINE void arm_inv_clarke_q31(
05052                                           q31_t Ialpha,
05053                                           q31_t Ibeta,
05054                                           q31_t * pIa,
05055                                           q31_t * pIb)
05056   {
05057     q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
05058
05059     /* Calculating pIa from Ialpha by equation pIa = Ialpha */
05060     *pIa = Ialpha;
05061
05062     /* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */
05063     product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31);
05064
05065     /* Intermediate product is calculated by (1/sqrt(3) * pIb) */
05066     product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31);
05067
05068     /* pIb is calculated by subtracting the products */
05069     *pIb = __QSUB(product2, product1);
05070
05071   }
05072
05084   void arm_q7_to_q15(
05085                       q7_t * pSrc,
05086                      q15_t * pDst,
05087                      uint32_t blockSize);
05088
05089
05090
05138   static __INLINE void arm_park_f32(
05139                                     float32_t Ialpha,
05140                                     float32_t Ibeta,
05141                                     float32_t * pId,
05142                                     float32_t * pIq,
05143                                     float32_t sinVal,
05144                                     float32_t cosVal)
05145   {
05146     /* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */
05147     *pId = Ialpha * cosVal + Ibeta * sinVal;
05148
05149     /* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */
05150     *pIq = -Ialpha * sinVal + Ibeta * cosVal;
05151
05152   }
05153
05172   static __INLINE void arm_park_q31(
05173                                     q31_t Ialpha,
05174                                     q31_t Ibeta,
05175                                     q31_t * pId,
05176                                     q31_t * pIq,
05177                                     q31_t sinVal,
05178                                     q31_t cosVal)
05179   {
05180     q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
05181     q31_t product3, product4;                    /* Temporary variables used to store intermediate results */
05182
05183     /* Intermediate product is calculated by (Ialpha * cosVal) */
05184     product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31);
05185
05186     /* Intermediate product is calculated by (Ibeta * sinVal) */
05187     product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31);
05188
05189
05190     /* Intermediate product is calculated by (Ialpha * sinVal) */
05191     product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31);
05192
05193     /* Intermediate product is calculated by (Ibeta * cosVal) */
05194     product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31);
05195
05196     /* Calculate pId by adding the two intermediate products 1 and 2 */
05197     *pId = __QADD(product1, product2);
05198
05199     /* Calculate pIq by subtracting the two intermediate products 3 from 4 */
05200     *pIq = __QSUB(product4, product3);
05201   }
05202
05214   void arm_q7_to_float(
05215                         q7_t * pSrc,
05216                        float32_t * pDst,
05217                        uint32_t blockSize);
05218
05219
05257   static __INLINE void arm_inv_park_f32(
05258                                         float32_t Id,
05259                                         float32_t Iq,
05260                                         float32_t * pIalpha,
05261                                         float32_t * pIbeta,
05262                                         float32_t sinVal,
05263                                         float32_t cosVal)
05264   {
05265     /* Calculate pIalpha using the equation, pIalpha = Id * cosVal - Iq * sinVal */
05266     *pIalpha = Id * cosVal - Iq * sinVal;
05267
05268     /* Calculate pIbeta using the equation, pIbeta = Id * sinVal + Iq * cosVal */
05269     *pIbeta = Id * sinVal + Iq * cosVal;
05270
05271   }
05272
05273
05292   static __INLINE void arm_inv_park_q31(
05293                                         q31_t Id,
05294                                         q31_t Iq,
05295                                         q31_t * pIalpha,
05296                                         q31_t * pIbeta,
05297                                         q31_t sinVal,
05298                                         q31_t cosVal)
05299   {
05300     q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
05301     q31_t product3, product4;                    /* Temporary variables used to store intermediate results */
05302
05303     /* Intermediate product is calculated by (Id * cosVal) */
05304     product1 = (q31_t) (((q63_t) (Id) * (cosVal)) >> 31);
05305
05306     /* Intermediate product is calculated by (Iq * sinVal) */
05307     product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31);
05308
05309
05310     /* Intermediate product is calculated by (Id * sinVal) */
05311     product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31);
05312
05313     /* Intermediate product is calculated by (Iq * cosVal) */
05314     product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31);
05315
05316     /* Calculate pIalpha by using the two intermediate products 1 and 2 */
05317     *pIalpha = __QSUB(product1, product2);
05318
05319     /* Calculate pIbeta by using the two intermediate products 3 and 4 */
05320     *pIbeta = __QADD(product4, product3);
05321
05322   }
05323
05336   void arm_q31_to_float(
05337                          q31_t * pSrc,
05338                         float32_t * pDst,
05339                         uint32_t blockSize);
05340
05390   static __INLINE float32_t arm_linear_interp_f32(
05391                                                   arm_linear_interp_instance_f32 * S,
05392                                                   float32_t x)
05393   {
05394
05395           float32_t y;
05396           float32_t x0, x1;                                             /* Nearest input values */
05397           float32_t y0, y1;                                             /* Nearest output values */
05398           float32_t xSpacing = S->xSpacing;             /* spacing between input values */
05399           int32_t i;                                                    /* Index variable */
05400           float32_t *pYData = S->pYData;            /* pointer to output table */
05401
05402           /* Calculation of index */
05403           i =   (x - S->x1) / xSpacing;
05404
05405           if(i < 0)
05406           {
05407              /* Iniatilize output for below specified range as least output value of table */
05408                  y = pYData[0];
05409           }
05410           else if(i >= S->nValues)
05411           {
05412                   /* Iniatilize output for above specified range as last output value of table */
05413                   y = pYData[S->nValues-1];
05414           }
05415           else
05416           {
05417                   /* Calculation of nearest input values */
05418                   x0 = S->x1 + i * xSpacing;
05419                   x1 = S->x1 + (i +1) * xSpacing;
05420
05421                  /* Read of nearest output values */
05422                   y0 = pYData[i];
05423                   y1 = pYData[i + 1];
05424
05425                   /* Calculation of output */
05426                   y = y0 + (x - x0) * ((y1 - y0)/(x1-x0));
05427
05428           }
05429
05430       /* returns output value */
05431           return (y);
05432   }
05433
05449   static __INLINE q31_t arm_linear_interp_q31(q31_t *pYData,
05450                                               q31_t x, uint32_t nValues)
05451   {
05452     q31_t y;                                   /* output */
05453     q31_t y0, y1;                                /* Nearest output values */
05454     q31_t fract;                                 /* fractional part */
05455     int32_t index;                              /* Index to read nearest output values */
05456
05457     /* Input is in 12.20 format */
05458     /* 12 bits for the table index */
05459     /* Index value calculation */
05460     index = ((x & 0xFFF00000) >> 20);
05461
05462         if(index >= (nValues - 1))
05463         {
05464                 return(pYData[nValues - 1]);
05465         }
05466         else if(index < 0)
05467         {
05468                 return(pYData[0]);
05469         }
05470         else
05471         {
05472
05473             /* 20 bits for the fractional part */
05474             /* shift left by 11 to keep fract in 1.31 format */
05475             fract = (x & 0x000FFFFF) << 11;
05476
05477             /* Read two nearest output values from the index in 1.31(q31) format */
05478             y0 = pYData[index];
05479             y1 = pYData[index + 1u];
05480
05481             /* Calculation of y0 * (1-fract) and y is in 2.30 format */
05482             y = ((q31_t) ((q63_t) y0 * (0x7FFFFFFF - fract) >> 32));
05483
05484             /* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */
05485             y += ((q31_t) (((q63_t) y1 * fract) >> 32));
05486
05487             /* Convert y to 1.31 format */
05488             return (y << 1u);
05489
05490         }
05491
05492   }
05493
05509   static __INLINE q15_t arm_linear_interp_q15(q15_t *pYData, q31_t x, uint32_t nValues)
05510   {
05511     q63_t y;                                   /* output */
05512     q15_t y0, y1;                              /* Nearest output values */
05513     q31_t fract;                               /* fractional part */
05514     int32_t index;                            /* Index to read nearest output values */
05515
05516     /* Input is in 12.20 format */
05517     /* 12 bits for the table index */
05518     /* Index value calculation */
05519     index = ((x & 0xFFF00000) >> 20u);
05520
05521         if(index >= (nValues - 1))
05522         {
05523                 return(pYData[nValues - 1]);
05524         }
05525         else if(index < 0)
05526         {
05527                 return(pYData[0]);
05528         }
05529         else
05530         {
05531             /* 20 bits for the fractional part */
05532             /* fract is in 12.20 format */
05533             fract = (x & 0x000FFFFF);
05534
05535             /* Read two nearest output values from the index */
05536             y0 = pYData[index];
05537             y1 = pYData[index + 1u];
05538
05539             /* Calculation of y0 * (1-fract) and y is in 13.35 format */
05540             y = ((q63_t) y0 * (0xFFFFF - fract));
05541
05542             /* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */
05543             y += ((q63_t) y1 * (fract));
05544
05545             /* convert y to 1.15 format */
05546             return (y >> 20);
05547         }
05548
05549
05550   }
05551
05566   static __INLINE q7_t arm_linear_interp_q7(q7_t *pYData, q31_t x,  uint32_t nValues)
05567   {
05568     q31_t y;                                   /* output */
05569     q7_t y0, y1;                                 /* Nearest output values */
05570     q31_t fract;                                 /* fractional part */
05571     int32_t index;                              /* Index to read nearest output values */
05572
05573     /* Input is in 12.20 format */
05574     /* 12 bits for the table index */
05575     /* Index value calculation */
05576     index = ((x & 0xFFF00000) >> 20u);
05577
05578
05579     if(index >= (nValues - 1))
05580         {
05581                 return(pYData[nValues - 1]);
05582         }
05583         else if(index < 0)
05584         {
05585                 return(pYData[0]);
05586         }
05587         else
05588         {
05589
05590             /* 20 bits for the fractional part */
05591             /* fract is in 12.20 format */
05592             fract = (x & 0x000FFFFF);
05593
05594             /* Read two nearest output values from the index and are in 1.7(q7) format */
05595             y0 = pYData[index];
05596             y1 = pYData[index + 1u];
05597
05598             /* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */
05599             y = ((y0 * (0xFFFFF - fract)));
05600
05601             /* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */
05602             y += (y1 * fract);
05603
05604             /* convert y to 1.7(q7) format */
05605             return (y >> 20u);
05606
05607         }
05608
05609   }
05620   float32_t arm_sin_f32(
05621                          float32_t x);
05622
05629   q31_t arm_sin_q31(
05630                      q31_t x);
05631
05638   q15_t arm_sin_q15(
05639                      q15_t x);
05640
05647   float32_t arm_cos_f32(
05648                          float32_t x);
05649
05656   q31_t arm_cos_q31(
05657                      q31_t x);
05658
05665   q15_t arm_cos_q15(
05666                      q15_t x);
05667
05668
05708   static __INLINE arm_status  arm_sqrt_f32(
05709                                           float32_t in, float32_t *pOut)
05710   {
05711         if(in > 0)
05712         {
05713
05714 //      #if __FPU_USED
05715     #if (__FPU_USED == 1) && defined ( __CC_ARM   )
05716                 *pOut = __sqrtf(in);
05717         #else
05718                 *pOut = sqrtf(in);
05719         #endif
05720
05721                 return (ARM_MATH_SUCCESS);
05722         }
05723         else
05724         {
05725                 *pOut = 0.0f;
05726                 return (ARM_MATH_ARGUMENT_ERROR);
05727         }
05728
05729   }
05730
05731
05739   arm_status arm_sqrt_q31(
05740                       q31_t in, q31_t *pOut);
05741
05749   arm_status arm_sqrt_q15(
05750                       q15_t in, q15_t *pOut);
05751
05765   static __INLINE void arm_circularWrite_f32(
05766                                              int32_t * circBuffer,
05767                                              int32_t L,
05768                                              uint16_t * writeOffset,
05769                                              int32_t bufferInc,
05770                                              const int32_t * src,
05771                                              int32_t srcInc,
05772                                              uint32_t blockSize)
05773   {
05774     uint32_t i = 0u;
05775     int32_t wOffset;
05776
05777     /* Copy the value of Index pointer that points
05778      * to the current location where the input samples to be copied */
05779     wOffset = *writeOffset;
05780
05781     /* Loop over the blockSize */
05782     i = blockSize;
05783
05784     while(i > 0u)
05785       {
05786         /* copy the input sample to the circular buffer */
05787         circBuffer[wOffset] = *src;
05788
05789         /* Update the input pointer */
05790         src += srcInc;
05791
05792         /* Circularly update wOffset.  Watch out for positive and negative value */
05793         wOffset += bufferInc;
05794         if(wOffset >= L)
05795           wOffset -= L;
05796
05797         /* Decrement the loop counter */
05798         i--;
05799       }
05800
05801     /* Update the index pointer */
05802     *writeOffset = wOffset;
05803   }
05804
05805
05806
05810   static __INLINE void arm_circularRead_f32(
05811                                             int32_t * circBuffer,
05812                                             int32_t L,
05813                                             int32_t * readOffset,
05814                                             int32_t bufferInc,
05815                                             int32_t * dst,
05816                                             int32_t * dst_base,
05817                                             int32_t dst_length,
05818                                             int32_t dstInc,
05819                                             uint32_t blockSize)
05820   {
05821     uint32_t i = 0u;
05822     int32_t rOffset, dst_end;
05823
05824     /* Copy the value of Index pointer that points
05825      * to the current location from where the input samples to be read */
05826     rOffset = *readOffset;
05827     dst_end = (int32_t) (dst_base + dst_length);
05828
05829     /* Loop over the blockSize */
05830     i = blockSize;
05831
05832     while(i > 0u)
05833       {
05834         /* copy the sample from the circular buffer to the destination buffer */
05835         *dst = circBuffer[rOffset];
05836
05837         /* Update the input pointer */
05838         dst += dstInc;
05839
05840         if(dst == (int32_t *) dst_end)
05841           {
05842             dst = dst_base;
05843           }
05844
05845         /* Circularly update rOffset.  Watch out for positive and negative value  */
05846         rOffset += bufferInc;
05847
05848         if(rOffset >= L)
05849           {
05850             rOffset -= L;
05851           }
05852
05853         /* Decrement the loop counter */
05854         i--;
05855       }
05856
05857     /* Update the index pointer */
05858     *readOffset = rOffset;
05859   }
05860
05865   static __INLINE void arm_circularWrite_q15(
05866                                              q15_t * circBuffer,
05867                                              int32_t L,
05868                                              uint16_t * writeOffset,
05869                                              int32_t bufferInc,
05870                                              const q15_t * src,
05871                                              int32_t srcInc,
05872                                              uint32_t blockSize)
05873   {
05874     uint32_t i = 0u;
05875     int32_t wOffset;
05876
05877     /* Copy the value of Index pointer that points
05878      * to the current location where the input samples to be copied */
05879     wOffset = *writeOffset;
05880
05881     /* Loop over the blockSize */
05882     i = blockSize;
05883
05884     while(i > 0u)
05885       {
05886         /* copy the input sample to the circular buffer */
05887         circBuffer[wOffset] = *src;
05888
05889         /* Update the input pointer */
05890         src += srcInc;
05891
05892         /* Circularly update wOffset.  Watch out for positive and negative value */
05893         wOffset += bufferInc;
05894         if(wOffset >= L)
05895           wOffset -= L;
05896
05897         /* Decrement the loop counter */
05898         i--;
05899       }
05900
05901     /* Update the index pointer */
05902     *writeOffset = wOffset;
05903   }
05904
05905
05906
05910   static __INLINE void arm_circularRead_q15(
05911                                             q15_t * circBuffer,
05912                                             int32_t L,
05913                                             int32_t * readOffset,
05914                                             int32_t bufferInc,
05915                                             q15_t * dst,
05916                                             q15_t * dst_base,
05917                                             int32_t dst_length,
05918                                             int32_t dstInc,
05919                                             uint32_t blockSize)
05920   {
05921     uint32_t i = 0;
05922     int32_t rOffset, dst_end;
05923
05924     /* Copy the value of Index pointer that points
05925      * to the current location from where the input samples to be read */
05926     rOffset = *readOffset;
05927
05928     dst_end = (int32_t) (dst_base + dst_length);
05929
05930     /* Loop over the blockSize */
05931     i = blockSize;
05932
05933     while(i > 0u)
05934       {
05935         /* copy the sample from the circular buffer to the destination buffer */
05936         *dst = circBuffer[rOffset];
05937
05938         /* Update the input pointer */
05939         dst += dstInc;
05940
05941         if(dst == (q15_t *) dst_end)
05942           {
05943             dst = dst_base;
05944           }
05945
05946         /* Circularly update wOffset.  Watch out for positive and negative value */
05947         rOffset += bufferInc;
05948
05949         if(rOffset >= L)
05950           {
05951             rOffset -= L;
05952           }
05953
05954         /* Decrement the loop counter */
05955         i--;
05956       }
05957
05958     /* Update the index pointer */
05959     *readOffset = rOffset;
05960   }
05961
05962
05967   static __INLINE void arm_circularWrite_q7(
05968                                             q7_t * circBuffer,
05969                                             int32_t L,
05970                                             uint16_t * writeOffset,
05971                                             int32_t bufferInc,
05972                                             const q7_t * src,
05973                                             int32_t srcInc,
05974                                             uint32_t blockSize)
05975   {
05976     uint32_t i = 0u;
05977     int32_t wOffset;
05978
05979     /* Copy the value of Index pointer that points
05980      * to the current location where the input samples to be copied */
05981     wOffset = *writeOffset;
05982
05983     /* Loop over the blockSize */
05984     i = blockSize;
05985
05986     while(i > 0u)
05987       {
05988         /* copy the input sample to the circular buffer */
05989         circBuffer[wOffset] = *src;
05990
05991         /* Update the input pointer */
05992         src += srcInc;
05993
05994         /* Circularly update wOffset.  Watch out for positive and negative value */
05995         wOffset += bufferInc;
05996         if(wOffset >= L)
05997           wOffset -= L;
05998
05999         /* Decrement the loop counter */
06000         i--;
06001       }
06002
06003     /* Update the index pointer */
06004     *writeOffset = wOffset;
06005   }
06006
06007
06008
06012   static __INLINE void arm_circularRead_q7(
06013                                            q7_t * circBuffer,
06014                                            int32_t L,
06015                                            int32_t * readOffset,
06016                                            int32_t bufferInc,
06017                                            q7_t * dst,
06018                                            q7_t * dst_base,
06019                                            int32_t dst_length,
06020                                            int32_t dstInc,
06021                                            uint32_t blockSize)
06022   {
06023     uint32_t i = 0;
06024     int32_t rOffset, dst_end;
06025
06026     /* Copy the value of Index pointer that points
06027      * to the current location from where the input samples to be read */
06028     rOffset = *readOffset;
06029
06030     dst_end = (int32_t) (dst_base + dst_length);
06031
06032     /* Loop over the blockSize */
06033     i = blockSize;
06034
06035     while(i > 0u)
06036       {
06037         /* copy the sample from the circular buffer to the destination buffer */
06038         *dst = circBuffer[rOffset];
06039
06040         /* Update the input pointer */
06041         dst += dstInc;
06042
06043         if(dst == (q7_t *) dst_end)
06044           {
06045             dst = dst_base;
06046           }
06047
06048         /* Circularly update rOffset.  Watch out for positive and negative value */
06049         rOffset += bufferInc;
06050
06051         if(rOffset >= L)
06052           {
06053             rOffset -= L;
06054           }
06055
06056         /* Decrement the loop counter */
06057         i--;
06058       }
06059
06060     /* Update the index pointer */
06061     *readOffset = rOffset;
06062   }
06063
06064
06073   void arm_power_q31(
06074                       q31_t * pSrc,
06075                      uint32_t blockSize,
06076                      q63_t * pResult);
06077
06086   void arm_power_f32(
06087                       float32_t * pSrc,
06088                      uint32_t blockSize,
06089                      float32_t * pResult);
06090
06099   void arm_power_q15(
06100                       q15_t * pSrc,
06101                      uint32_t blockSize,
06102                      q63_t * pResult);
06103
06112   void arm_power_q7(
06113                      q7_t * pSrc,
06114                     uint32_t blockSize,
06115                     q31_t * pResult);
06116
06125   void arm_mean_q7(
06126                     q7_t * pSrc,
06127                    uint32_t blockSize,
06128                    q7_t * pResult);
06129
06137   void arm_mean_q15(
06138                      q15_t * pSrc,
06139                     uint32_t blockSize,
06140                     q15_t * pResult);
06141
06149   void arm_mean_q31(
06150                      q31_t * pSrc,
06151                     uint32_t blockSize,
06152                     q31_t * pResult);
06153
06161   void arm_mean_f32(
06162                      float32_t * pSrc,
06163                     uint32_t blockSize,
06164                     float32_t * pResult);
06165
06174   void arm_var_f32(
06175                     float32_t * pSrc,
06176                    uint32_t blockSize,
06177                    float32_t * pResult);
06178
06187   void arm_var_q31(
06188                     q31_t * pSrc,
06189                    uint32_t blockSize,
06190                    q63_t * pResult);
06191
06200   void arm_var_q15(
06201                     q15_t * pSrc,
06202                    uint32_t blockSize,
06203                    q31_t * pResult);
06204
06213   void arm_rms_f32(
06214                     float32_t * pSrc,
06215                    uint32_t blockSize,
06216                    float32_t * pResult);
06217
06226   void arm_rms_q31(
06227                     q31_t * pSrc,
06228                    uint32_t blockSize,
06229                    q31_t * pResult);
06230
06239   void arm_rms_q15(
06240                     q15_t * pSrc,
06241                    uint32_t blockSize,
06242                    q15_t * pResult);
06243
06252   void arm_std_f32(
06253                     float32_t * pSrc,
06254                    uint32_t blockSize,
06255                    float32_t * pResult);
06256
06265   void arm_std_q31(
06266                     q31_t * pSrc,
06267                    uint32_t blockSize,
06268                    q31_t * pResult);
06269
06278   void arm_std_q15(
06279                     q15_t * pSrc,
06280                    uint32_t blockSize,
06281                    q15_t * pResult);
06282
06291   void arm_cmplx_mag_f32(
06292                           float32_t * pSrc,
06293                          float32_t * pDst,
06294                          uint32_t numSamples);
06295
06304   void arm_cmplx_mag_q31(
06305                           q31_t * pSrc,
06306                          q31_t * pDst,
06307                          uint32_t numSamples);
06308
06317   void arm_cmplx_mag_q15(
06318                           q15_t * pSrc,
06319                          q15_t * pDst,
06320                          uint32_t numSamples);
06321
06332   void arm_cmplx_dot_prod_q15(
06333                                q15_t * pSrcA,
06334                                q15_t * pSrcB,
06335                               uint32_t numSamples,
06336                               q31_t * realResult,
06337                               q31_t * imagResult);
06338
06349   void arm_cmplx_dot_prod_q31(
06350                                q31_t * pSrcA,
06351                                q31_t * pSrcB,
06352                               uint32_t numSamples,
06353                               q63_t * realResult,
06354                               q63_t * imagResult);
06355
06366   void arm_cmplx_dot_prod_f32(
06367                                float32_t * pSrcA,
06368                                float32_t * pSrcB,
06369                               uint32_t numSamples,
06370                               float32_t * realResult,
06371                               float32_t * imagResult);
06372
06382   void arm_cmplx_mult_real_q15(
06383                                 q15_t * pSrcCmplx,
06384                                 q15_t * pSrcReal,
06385                                q15_t * pCmplxDst,
06386                                uint32_t numSamples);
06387
06397   void arm_cmplx_mult_real_q31(
06398                                 q31_t * pSrcCmplx,
06399                                 q31_t * pSrcReal,
06400                                q31_t * pCmplxDst,
06401                                uint32_t numSamples);
06402
06412   void arm_cmplx_mult_real_f32(
06413                                 float32_t * pSrcCmplx,
06414                                 float32_t * pSrcReal,
06415                                float32_t * pCmplxDst,
06416                                uint32_t numSamples);
06417
06427   void arm_min_q7(
06428                    q7_t * pSrc,
06429                   uint32_t blockSize,
06430                   q7_t * result,
06431                   uint32_t * index);
06432
06442   void arm_min_q15(
06443                     q15_t * pSrc,
06444                    uint32_t blockSize,
06445                    q15_t * pResult,
06446                    uint32_t * pIndex);
06447
06456   void arm_min_q31(
06457                     q31_t * pSrc,
06458                    uint32_t blockSize,
06459                    q31_t * pResult,
06460                    uint32_t * pIndex);
06461
06471   void arm_min_f32(
06472                     float32_t * pSrc,
06473                    uint32_t blockSize,
06474                    float32_t * pResult,
06475                    uint32_t * pIndex);
06476
06486   void arm_max_q7(
06487                    q7_t * pSrc,
06488                   uint32_t blockSize,
06489                   q7_t * pResult,
06490                   uint32_t * pIndex);
06491
06501   void arm_max_q15(
06502                     q15_t * pSrc,
06503                    uint32_t blockSize,
06504                    q15_t * pResult,
06505                    uint32_t * pIndex);
06506
06516   void arm_max_q31(
06517                     q31_t * pSrc,
06518                    uint32_t blockSize,
06519                    q31_t * pResult,
06520                    uint32_t * pIndex);
06521
06531   void arm_max_f32(
06532                     float32_t * pSrc,
06533                    uint32_t blockSize,
06534                    float32_t * pResult,
06535                    uint32_t * pIndex);
06536
06546   void arm_cmplx_mult_cmplx_q15(
06547                                 q15_t * pSrcA,
06548                                 q15_t * pSrcB,
06549                                q15_t * pDst,
06550                                uint32_t numSamples);
06551
06561   void arm_cmplx_mult_cmplx_q31(
06562                                 q31_t * pSrcA,
06563                                 q31_t * pSrcB,
06564                                q31_t * pDst,
06565                                uint32_t numSamples);
06566
06576   void arm_cmplx_mult_cmplx_f32(
06577                                 float32_t * pSrcA,
06578                                 float32_t * pSrcB,
06579                                float32_t * pDst,
06580                                uint32_t numSamples);
06581
06589   void arm_float_to_q31(
06590                                float32_t * pSrc,
06591                               q31_t * pDst,
06592                               uint32_t blockSize);
06593
06601   void arm_float_to_q15(
06602                                float32_t * pSrc,
06603                               q15_t * pDst,
06604                               uint32_t blockSize);
06605
06613   void arm_float_to_q7(
06614                               float32_t * pSrc,
06615                              q7_t * pDst,
06616                              uint32_t blockSize);
06617
06618
06626   void arm_q31_to_q15(
06627                        q31_t * pSrc,
06628                       q15_t * pDst,
06629                       uint32_t blockSize);
06630
06638   void arm_q31_to_q7(
06639                       q31_t * pSrc,
06640                      q7_t * pDst,
06641                      uint32_t blockSize);
06642
06650   void arm_q15_to_float(
06651                          q15_t * pSrc,
06652                         float32_t * pDst,
06653                         uint32_t blockSize);
06654
06655
06663   void arm_q15_to_q31(
06664                        q15_t * pSrc,
06665                       q31_t * pDst,
06666                       uint32_t blockSize);
06667
06668
06676   void arm_q15_to_q7(
06677                       q15_t * pSrc,
06678                      q7_t * pDst,
06679                      uint32_t blockSize);
06680
06681
06753   static __INLINE float32_t arm_bilinear_interp_f32(
06754                                                     const arm_bilinear_interp_instance_f32 * S,
06755                                                     float32_t X,
06756                                                     float32_t Y)
06757   {
06758     float32_t out;
06759     float32_t f00, f01, f10, f11;
06760     float32_t *pData = S->pData;
06761     int32_t xIndex, yIndex, index;
06762     float32_t xdiff, ydiff;
06763     float32_t b1, b2, b3, b4;
06764
06765     xIndex = (int32_t) X;
06766     yIndex = (int32_t) Y;
06767
06768         /* Care taken for table outside boundary */
06769         /* Returns zero output when values are outside table boundary */
06770         if(xIndex < 0 || xIndex > (S->numRows-1) || yIndex < 0  || yIndex > ( S->numCols-1))
06771         {
06772                 return(0);
06773         }
06774
06775     /* Calculation of index for two nearest points in X-direction */
06776     index = (xIndex - 1) + (yIndex-1) *  S->numCols ;
06777
06778
06779     /* Read two nearest points in X-direction */
06780     f00 = pData[index];
06781     f01 = pData[index + 1];
06782
06783     /* Calculation of index for two nearest points in Y-direction */
06784     index = (xIndex-1) + (yIndex) * S->numCols;
06785
06786
06787     /* Read two nearest points in Y-direction */
06788     f10 = pData[index];
06789     f11 = pData[index + 1];
06790
06791     /* Calculation of intermediate values */
06792     b1 = f00;
06793     b2 = f01 - f00;
06794     b3 = f10 - f00;
06795     b4 = f00 - f01 - f10 + f11;
06796
06797     /* Calculation of fractional part in X */
06798     xdiff = X - xIndex;
06799
06800     /* Calculation of fractional part in Y */
06801     ydiff = Y - yIndex;
06802
06803     /* Calculation of bi-linear interpolated output */
06804      out = b1 + b2 * xdiff + b3 * ydiff + b4 * xdiff * ydiff;
06805
06806    /* return to application */
06807     return (out);
06808
06809   }
06810
06820   static __INLINE q31_t arm_bilinear_interp_q31(
06821                                                 arm_bilinear_interp_instance_q31 * S,
06822                                                 q31_t X,
06823                                                 q31_t Y)
06824   {
06825     q31_t out;                                   /* Temporary output */
06826     q31_t acc = 0;                               /* output */
06827     q31_t xfract, yfract;                        /* X, Y fractional parts */
06828     q31_t x1, x2, y1, y2;                        /* Nearest output values */
06829     int32_t rI, cI;                             /* Row and column indices */
06830     q31_t *pYData = S->pData;                    /* pointer to output table values */
06831     uint32_t nCols = S->numCols;                 /* num of rows */
06832
06833
06834     /* Input is in 12.20 format */
06835     /* 12 bits for the table index */
06836     /* Index value calculation */
06837     rI = ((X & 0xFFF00000) >> 20u);
06838
06839     /* Input is in 12.20 format */
06840     /* 12 bits for the table index */
06841     /* Index value calculation */
06842     cI = ((Y & 0xFFF00000) >> 20u);
06843
06844         /* Care taken for table outside boundary */
06845         /* Returns zero output when values are outside table boundary */
06846         if(rI < 0 || rI > (S->numRows-1) || cI < 0  || cI > ( S->numCols-1))
06847         {
06848                 return(0);
06849         }
06850
06851     /* 20 bits for the fractional part */
06852     /* shift left xfract by 11 to keep 1.31 format */
06853     xfract = (X & 0x000FFFFF) << 11u;
06854
06855     /* Read two nearest output values from the index */
06856     x1 = pYData[(rI) + nCols * (cI)];
06857     x2 = pYData[(rI) + nCols * (cI) + 1u];
06858
06859     /* 20 bits for the fractional part */
06860     /* shift left yfract by 11 to keep 1.31 format */
06861     yfract = (Y & 0x000FFFFF) << 11u;
06862
06863     /* Read two nearest output values from the index */
06864     y1 = pYData[(rI) + nCols * (cI + 1)];
06865     y2 = pYData[(rI) + nCols * (cI + 1) + 1u];
06866
06867     /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 3.29(q29) format */
06868     out = ((q31_t) (((q63_t) x1 * (0x7FFFFFFF - xfract)) >> 32));
06869     acc = ((q31_t) (((q63_t) out * (0x7FFFFFFF - yfract)) >> 32));
06870
06871     /* x2 * (xfract) * (1-yfract)  in 3.29(q29) and adding to acc */
06872     out = ((q31_t) ((q63_t) x2 * (0x7FFFFFFF - yfract) >> 32));
06873     acc += ((q31_t) ((q63_t) out * (xfract) >> 32));
06874
06875     /* y1 * (1 - xfract) * (yfract)  in 3.29(q29) and adding to acc */
06876     out = ((q31_t) ((q63_t) y1 * (0x7FFFFFFF - xfract) >> 32));
06877     acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
06878
06879     /* y2 * (xfract) * (yfract)  in 3.29(q29) and adding to acc */
06880     out = ((q31_t) ((q63_t) y2 * (xfract) >> 32));
06881     acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
06882
06883     /* Convert acc to 1.31(q31) format */
06884     return (acc << 2u);
06885
06886   }
06887
06896   static __INLINE q15_t arm_bilinear_interp_q15(
06897                                                 arm_bilinear_interp_instance_q15 * S,
06898                                                 q31_t X,
06899                                                 q31_t Y)
06900   {
06901     q63_t acc = 0;                               /* output */
06902     q31_t out;                                   /* Temporary output */
06903     q15_t x1, x2, y1, y2;                        /* Nearest output values */
06904     q31_t xfract, yfract;                        /* X, Y fractional parts */
06905     int32_t rI, cI;                             /* Row and column indices */
06906     q15_t *pYData = S->pData;                    /* pointer to output table values */
06907     uint32_t nCols = S->numCols;                 /* num of rows */
06908
06909     /* Input is in 12.20 format */
06910     /* 12 bits for the table index */
06911     /* Index value calculation */
06912     rI = ((X & 0xFFF00000) >> 20);
06913
06914     /* Input is in 12.20 format */
06915     /* 12 bits for the table index */
06916     /* Index value calculation */
06917     cI = ((Y & 0xFFF00000) >> 20);
06918
06919         /* Care taken for table outside boundary */
06920         /* Returns zero output when values are outside table boundary */
06921         if(rI < 0 || rI > (S->numRows-1) || cI < 0  || cI > ( S->numCols-1))
06922         {
06923                 return(0);
06924         }
06925
06926     /* 20 bits for the fractional part */
06927     /* xfract should be in 12.20 format */
06928     xfract = (X & 0x000FFFFF);
06929
06930     /* Read two nearest output values from the index */
06931     x1 = pYData[(rI) + nCols * (cI)];
06932     x2 = pYData[(rI) + nCols * (cI) + 1u];
06933
06934
06935     /* 20 bits for the fractional part */
06936     /* yfract should be in 12.20 format */
06937     yfract = (Y & 0x000FFFFF);
06938
06939     /* Read two nearest output values from the index */
06940     y1 = pYData[(rI) + nCols * (cI + 1)];
06941     y2 = pYData[(rI) + nCols * (cI + 1) + 1u];
06942
06943     /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 13.51 format */
06944
06945     /* x1 is in 1.15(q15), xfract in 12.20 format and out is in 13.35 format */
06946     /* convert 13.35 to 13.31 by right shifting  and out is in 1.31 */
06947     out = (q31_t) (((q63_t) x1 * (0xFFFFF - xfract)) >> 4u);
06948     acc = ((q63_t) out * (0xFFFFF - yfract));
06949
06950     /* x2 * (xfract) * (1-yfract)  in 1.51 and adding to acc */
06951     out = (q31_t) (((q63_t) x2 * (0xFFFFF - yfract)) >> 4u);
06952     acc += ((q63_t) out * (xfract));
06953
06954     /* y1 * (1 - xfract) * (yfract)  in 1.51 and adding to acc */
06955     out = (q31_t) (((q63_t) y1 * (0xFFFFF - xfract)) >> 4u);
06956     acc += ((q63_t) out * (yfract));
06957
06958     /* y2 * (xfract) * (yfract)  in 1.51 and adding to acc */
06959     out = (q31_t) (((q63_t) y2 * (xfract)) >> 4u);
06960     acc += ((q63_t) out * (yfract));
06961
06962     /* acc is in 13.51 format and down shift acc by 36 times */
06963     /* Convert out to 1.15 format */
06964     return (acc >> 36);
06965
06966   }
06967
06976   static __INLINE q7_t arm_bilinear_interp_q7(
06977                                               arm_bilinear_interp_instance_q7 * S,
06978                                               q31_t X,
06979                                               q31_t Y)
06980   {
06981     q63_t acc = 0;                               /* output */
06982     q31_t out;                                   /* Temporary output */
06983     q31_t xfract, yfract;                        /* X, Y fractional parts */
06984     q7_t x1, x2, y1, y2;                         /* Nearest output values */
06985     int32_t rI, cI;                             /* Row and column indices */
06986     q7_t *pYData = S->pData;                     /* pointer to output table values */
06987     uint32_t nCols = S->numCols;                 /* num of rows */
06988
06989     /* Input is in 12.20 format */
06990     /* 12 bits for the table index */
06991     /* Index value calculation */
06992     rI = ((X & 0xFFF00000) >> 20);
06993
06994     /* Input is in 12.20 format */
06995     /* 12 bits for the table index */
06996     /* Index value calculation */
06997     cI = ((Y & 0xFFF00000) >> 20);
06998
06999         /* Care taken for table outside boundary */
07000         /* Returns zero output when values are outside table boundary */
07001         if(rI < 0 || rI > (S->numRows-1) || cI < 0  || cI > ( S->numCols-1))
07002         {
07003                 return(0);
07004         }
07005
07006     /* 20 bits for the fractional part */
07007     /* xfract should be in 12.20 format */
07008     xfract = (X & 0x000FFFFF);
07009
07010     /* Read two nearest output values from the index */
07011     x1 = pYData[(rI) + nCols * (cI)];
07012     x2 = pYData[(rI) + nCols * (cI) + 1u];
07013
07014
07015     /* 20 bits for the fractional part */
07016     /* yfract should be in 12.20 format */
07017     yfract = (Y & 0x000FFFFF);
07018
07019     /* Read two nearest output values from the index */
07020     y1 = pYData[(rI) + nCols * (cI + 1)];
07021     y2 = pYData[(rI) + nCols * (cI + 1) + 1u];
07022
07023     /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 16.47 format */
07024     out = ((x1 * (0xFFFFF - xfract)));
07025     acc = (((q63_t) out * (0xFFFFF - yfract)));
07026
07027     /* x2 * (xfract) * (1-yfract)  in 2.22 and adding to acc */
07028     out = ((x2 * (0xFFFFF - yfract)));
07029     acc += (((q63_t) out * (xfract)));
07030
07031     /* y1 * (1 - xfract) * (yfract)  in 2.22 and adding to acc */
07032     out = ((y1 * (0xFFFFF - xfract)));
07033     acc += (((q63_t) out * (yfract)));
07034
07035     /* y2 * (xfract) * (yfract)  in 2.22 and adding to acc */
07036     out = ((y2 * (yfract)));
07037     acc += (((q63_t) out * (xfract)));
07038
07039     /* acc in 16.47 format and down shift by 40 to convert to 1.7 format */
07040     return (acc >> 40);
07041
07042   }
07043
07053 #ifdef  __cplusplus
07054 }
07055 #endif
07056
07057
07058 #endif /* _ARM_MATH_H */
07059
07060
Generated on Mon Nov 28 2011 11:14:40 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_matrix_example/system_ARMCM0.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_matrix_example/system_ARMCM0.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM0.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_matrix_example/system_ARMCM3.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_matrix_example/system_ARMCM3.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM3.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_matrix_example/system_ARMCM4.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_matrix_example/system_ARMCM4.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM4.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
00062     SCB->CPACR |= ((3UL << 10*2) |                 /* set CP10 Full Access */
00063                    (3UL << 11*2)  );               /* set CP11 Full Access */
00064   #endif
00065
00066   SystemCoreClock = __SYSTEM_CLOCK;
00067
00068 #ifdef __USE_GPIO
00069   ARM_GPIO0->DATA[0].WORD = 0;
00070   ARM_GPIO0->IE = 0;
00071   ARM_GPIO0->DIR = 0xff83;
00072
00073   ARM_GPIO1->DATA[0].WORD = 0;
00074   ARM_GPIO1->IE = 0;
00075   ARM_GPIO1->DIR = 0;
00076
00077   ARM_GPIO2->DATA[0].WORD = 0;
00078   ARM_GPIO2->IE = 0;
00079   ARM_GPIO2->DIR = 0;
00080 #endif
00081 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_matrix_example/arm_matrix_example_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_matrix_example/arm_matrix_example_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        29. November 2010
00005 * $Revision:    V1.0.3
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_matrix_example_f32.c
00009 *
00010 * Description:  Example code demonstrating least square fit to data
00011 *                               using matrix functions
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3
00014 *
00015 *
00016 * Version 1.0.3 2010/11/29
00017 *    Re-organized the CMSIS folders and updated documentation.
00018 *
00019 * Version 1.0.1 2010/10/05 KK
00020 *    Production release and review comments incorporated.
00021 *
00022 * Version 1.0.0 2010/09/20 KK
00023 *    Production release and review comments incorporated.
00024 * ------------------------------------------------------------------- */
00025
00074 #include "arm_math.h"
00075 #include "math_helper.h"
00076
00077 #define SNR_THRESHOLD   90
00078
00079 /* --------------------------------------------------------------------------------
00080 * Test input data(Cycles) taken from FIR Q15 module for differant cases of blockSize
00081 * and tapSize
00082 * --------------------------------------------------------------------------------- */
00083
00084 const float32_t B_f32[4] =
00085 {
00086         782.0, 7577.0, 470.0, 4505.0
00087 };
00088
00089 /* --------------------------------------------------------------------------------
00090 * Formula to fit is  C1 + C2 * numTaps + C3 * blockSize + C4 * numTaps * blockSize
00091 * -------------------------------------------------------------------------------- */
00092
00093 const float32_t A_f32[16] =
00094 {
00095         /* Const,       numTaps,        blockSize,      numTaps*blockSize */
00096         1.0,            32.0,           4.0,            128.0,
00097         1.0,            32.0,           64.0,           2048.0,
00098         1.0,            16.0,           4.0,            64.0,
00099         1.0,            16.0,           64.0,           1024.0,
00100 };
00101
00102
00103 /* ----------------------------------------------------------------------
00104 * Temporary buffers  for storing intermediate values
00105 * ------------------------------------------------------------------- */
00106 /* Transpose of A Buffer */
00107 float32_t AT_f32[16];
00108 /* (Transpose of A * A) Buffer */
00109 float32_t ATMA_f32[16];
00110 /* Inverse(Transpose of A * A)  Buffer */
00111 float32_t ATMAI_f32[16];
00112 /* Test Output Buffer */
00113 float32_t X_f32[4];
00114
00115 /* ----------------------------------------------------------------------
00116 * Reference ouput buffer C1, C2, C3 and C4 taken from MATLAB
00117 * ------------------------------------------------------------------- */
00118 const float32_t xRef_f32[4] = {73.0, 8.0, 21.25, 2.875};
00119
00120 float32_t snr;
00121
00122
00123 /* ----------------------------------------------------------------------
00124 * Max magnitude FFT Bin test
00125 * ------------------------------------------------------------------- */
00126
00127 int32_t main(void)
00128 {
00129
00130         arm_matrix_instance_f32 A;              /* Matrix A Instance */
00131         arm_matrix_instance_f32 AT;             /* Matrix AT(A transpose) instance */
00132         arm_matrix_instance_f32 ATMA;   /* Matrix ATMA( AT multiply with A) instance */
00133         arm_matrix_instance_f32 ATMAI;  /* Matrix ATMAI(Inverse of ATMA) instance */
00134         arm_matrix_instance_f32 B;              /* Matrix B instance */
00135         arm_matrix_instance_f32 X;              /* Matrix X(Unknown Matrix) instance */
00136
00137         uint32_t srcRows, srcColumns;   /* Temporary variables */
00138         arm_status status;
00139
00140         /* Initialise A Matrix Instance with numRows, numCols and data array(A_f32) */
00141         srcRows = 4;
00142     srcColumns = 4;
00143         arm_mat_init_f32(&A, srcRows, srcColumns, (float32_t *)A_f32);
00144
00145         /* Initialise Matrix Instance AT with numRows, numCols and data array(AT_f32) */
00146         srcRows = 4;
00147     srcColumns = 4;
00148         arm_mat_init_f32(&AT, srcRows, srcColumns, AT_f32);
00149
00150         /* calculation of A transpose */
00151         status = arm_mat_trans_f32(&A, &AT);
00152
00153
00154         /* Initialise ATMA Matrix Instance with numRows, numCols and data array(ATMA_f32) */
00155         srcRows = 4;
00156     srcColumns = 4;
00157         arm_mat_init_f32(&ATMA, srcRows, srcColumns, ATMA_f32);
00158
00159         /* calculation of AT Multiply with A */
00160         status = arm_mat_mult_f32(&AT, &A, &ATMA);
00161
00162         /* Initialise ATMAI Matrix Instance with numRows, numCols and data array(ATMAI_f32) */
00163         srcRows = 4;
00164     srcColumns = 4;
00165         arm_mat_init_f32(&ATMAI, srcRows, srcColumns, ATMAI_f32);
00166
00167         /* calculation of Inverse((Transpose(A) * A) */
00168         status = arm_mat_inverse_f32(&ATMA, &ATMAI);
00169
00170         /* calculation of (Inverse((Transpose(A) * A)) *  Transpose(A)) */
00171         status = arm_mat_mult_f32(&ATMAI, &AT, &ATMA);
00172
00173         /* Initialise B Matrix Instance with numRows, numCols and data array(B_f32) */
00174         srcRows = 4;
00175     srcColumns = 1;
00176         arm_mat_init_f32(&B, srcRows, srcColumns, (float32_t *)B_f32);
00177
00178         /* Initialise X Matrix Instance with numRows, numCols and data array(X_f32) */
00179         srcRows = 4;
00180     srcColumns = 1;
00181         arm_mat_init_f32(&X, srcRows, srcColumns, X_f32);
00182
00183         /* calculation ((Inverse((Transpose(A) * A)) *  Transpose(A)) * B) */
00184         status = arm_mat_mult_f32(&ATMA, &B, &X);
00185
00186         /* Comparison of reference with test output */
00187         snr = arm_snr_f32((float32_t *)xRef_f32, X_f32, 4);
00188
00189         /*------------------------------------------------------------------------------
00190         *                                       Initialise status depending on SNR calculations
00191         *------------------------------------------------------------------------------*/
00192         if( snr > SNR_THRESHOLD)
00193         {
00194                 status = ARM_MATH_SUCCESS;
00195         }
00196         else
00197         {
00198                 status = ARM_MATH_TEST_FAILURE;
00199         }
00200
00201
00202         /* ----------------------------------------------------------------------
00203         ** Loop here if the signals fail the PASS check.
00204         ** This denotes a test failure
00205         ** ------------------------------------------------------------------- */
00206         if( status != ARM_MATH_SUCCESS)
00207         {
00208           while(1);
00209         }
00210
00211     while(1);                             /* main function does not return */
00212 }
00213
00214
Generated on Mon Nov 28 2011 11:14:33 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_max_f32.c
00009 *
00010 * Description:  Maximum value of a floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00059 void arm_max_f32(
00060   float32_t * pSrc,
00061   uint32_t blockSize,
00062   float32_t * pResult,
00063   uint32_t * pIndex)
00064 {
00065   float32_t maxVal, out;                         /* Temporary variables to store the output value. */
00066   uint32_t blkCnt, outIndex;                     /* loop counter */
00067
00068   /* Initialise the index value to zero. */
00069   outIndex = 0u;
00070   /* Load first input value that act as reference value for comparision */
00071   out = *pSrc++;
00072
00073   /* Loop over blockSize number of values */
00074   blkCnt = (blockSize - 1u);
00075
00076 #ifndef ARM_MATH_CM0
00077
00078   /* Run the below code for Cortex-M4 and Cortex-M3 */
00079
00080   do
00081   {
00082     /* Initialize maxVal to the next consecutive values one by one */
00083     maxVal = *pSrc++;
00084
00085     /* compare for the maximum value */
00086     if(out < maxVal)
00087     {
00088       /* Update the maximum value and it's index */
00089       out = maxVal;
00090       outIndex = blockSize - blkCnt;
00091     }
00092     /* Decrement the loop counter */
00093     blkCnt--;
00094
00095   } while(blkCnt > 0u);
00096
00097 #else
00098
00099   /* Run the below code for Cortex-M0 */
00100   while(blkCnt > 0u)
00101   {
00102     /* Initialize maxVal to the next consecutive values one by one */
00103     maxVal = *pSrc++;
00104
00105     /* compare for the maximum value */
00106     if(out < maxVal)
00107     {
00108       /* Update the maximum value and it's index */
00109       out = maxVal;
00110       outIndex = blockSize - blkCnt;
00111     }
00112     /* Decrement the loop counter */
00113     blkCnt--;
00114
00115   }
00116
00117 #endif /* #ifndef ARM_MATH_CM0 */
00118
00119
00120   /* Store the maximum value and it's index into destination pointers */
00121   *pResult = out;
00122   *pIndex = outIndex;
00123 }
00124
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_max_q7.c
00009 *
00010 * Description:  Maximum value of a Q7 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00051 void arm_max_q7(
00052   q7_t * pSrc,
00053   uint32_t blockSize,
00054   q7_t * pResult,
00055   uint32_t * pIndex)
00056 {
00057
00058 #ifndef ARM_MATH_CM0
00059
00060   /* Run the below code for Cortex-M4 and Cortex-M3 */
00061
00062   q7_t res, maxVal, x0, x1, maxVal2, maxVal1;    /* Temporary variables to store the output value. */
00063   uint32_t blkCnt, index1, index2, index3, indx, indxMod;       /* loop counter */
00064
00065   /* Initialise the index value to zero. */
00066   indx = 0u;
00067
00068   /* Load first input value that act as reference value for comparision */
00069   res = *pSrc++;
00070
00071   /* Loop unrolling */
00072   blkCnt = (blockSize - 1u) >> 2u;
00073
00074   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00075    ** a second loop below computes the remaining 1 to 3 samples. */
00076   while(blkCnt > 0u)
00077   {
00078     indxMod = blockSize - (blkCnt * 4u);
00079
00080     /* Load two input values for comparision */
00081     x0 = *pSrc++;
00082     x1 = *pSrc++;
00083
00084     if(x0 < x1)
00085     {
00086       /* Update the maximum value and its index */
00087       maxVal1 = x1;
00088       index1 = indxMod + 1u;
00089     }
00090     else
00091     {
00092       /* Update the maximum value and its index */
00093       maxVal1 = x0;
00094       index1 = indxMod;
00095     }
00096
00097     /* Load two input values for comparision */
00098     x0 = *pSrc++;
00099     x1 = *pSrc++;
00100
00101     if(x0 < x1)
00102     {
00103       /* Update the maximum value and its index */
00104       maxVal2 = x1;
00105       index2 = indxMod + 3u;
00106     }
00107     else
00108     {
00109       /* Update the maximum value and its index */
00110       maxVal2 = x0;
00111       index2 = indxMod + 2u;
00112     }
00113
00114     if(maxVal1 < maxVal2)
00115     {
00116       /* Update the maximum value and its index */
00117       maxVal = maxVal2;
00118       index3 = index2;
00119     }
00120     else
00121     {
00122       /* Update the maximum value and its index */
00123       maxVal = maxVal1;
00124       index3 = index1;
00125     }
00126
00127     if(res < maxVal)
00128     {
00129       /* Update the maximum value and its index */
00130       res = maxVal;
00131       indx = index3;
00132     }
00133
00134     /* Decrement the loop counter */
00135     blkCnt--;
00136
00137   }
00138
00139   /* If the blockSize - 1 is not a multiple of 4, compute any remaining output samples here.
00140    ** No loop unrolling is used. */
00141   blkCnt = (blockSize - 1u) % 0x04u;
00142
00143   while(blkCnt > 0u)
00144   {
00145     /* Initialize maxVal to the next consecutive values one by one */
00146     maxVal = *pSrc++;
00147
00148     /* compare for the maximum value */
00149     if(res < maxVal)
00150     {
00151       /* Update the maximum value and its index */
00152       res = maxVal;
00153       indx = blockSize - blkCnt;
00154     }
00155
00156     /* Decrement the loop counter */
00157     blkCnt--;
00158   }
00159
00160   /* Store the maximum value and its index into destination pointers */
00161   *pResult = res;
00162   *pIndex = indx;
00163
00164 #else
00165
00166   /* Run the below code for Cortex-M0 */
00167
00168   q7_t maxVal, out;                              /* Temporary variables to store the output value. */
00169   uint32_t blkCnt, outIndex;                     /* loop counter */
00170
00171   /* Initialise the index value to zero. */
00172   outIndex = 0u;
00173   /* Load first input value that act as reference value for comparision */
00174   out = *pSrc++;
00175
00176   /* Loop over blockSize - 1 number of values */
00177   blkCnt = (blockSize - 1u);
00178
00179   while(blkCnt > 0u)
00180   {
00181     /* Initialize maxVal to the next consecutive values one by one */
00182     maxVal = *pSrc++;
00183
00184     /* compare for the maximum value */
00185     if(out < maxVal)
00186     {
00187       /* Update the maximum value and its index */
00188       out = maxVal;
00189       outIndex = blockSize - blkCnt;
00190     }
00191     /* Decrement the loop counter */
00192     blkCnt--;
00193
00194   }
00195
00196   /* Store the maximum value and its index into destination pointers */
00197   *pResult = out;
00198   *pIndex = outIndex;
00199
00200 #endif /* #ifndef ARM_MATH_CM0 */
00201
00202 }
00203
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_max_q15.c
00009 *
00010 * Description:  Maximum value of a Q15 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00051 void arm_max_q15(
00052   q15_t * pSrc,
00053   uint32_t blockSize,
00054   q15_t * pResult,
00055   uint32_t * pIndex)
00056 {
00057   q15_t maxVal, out;                             /* Temporary variables to store the output value. */
00058   uint32_t blkCnt, outIndex;                     /* loop counter */
00059
00060   /* Initialise the index value to zero. */
00061   outIndex = 0u;
00062   /* Load first input value that act as reference value for comparision */
00063   out = *pSrc++;
00064
00065   /* Loop over blockSize number of values */
00066   blkCnt = (blockSize - 1u);
00067
00068 #ifndef ARM_MATH_CM0
00069
00070   /* Run the below code for Cortex-M4 and Cortex-M3 */
00071
00072   do
00073   {
00074     /* Initialize maxVal to the next consecutive values one by one */
00075     maxVal = *pSrc++;
00076
00077     /* compare for the maximum value */
00078     if(out < maxVal)
00079     {
00080       /* Update the maximum value and its index */
00081       out = maxVal;
00082       outIndex = blockSize - blkCnt;
00083     }
00084
00085     blkCnt--;
00086
00087   } while(blkCnt > 0u);
00088
00089 #else
00090
00091   /* Run the below code for Cortex-M0 */
00092
00093   while(blkCnt > 0u)
00094   {
00095     /* Initialize maxVal to the next consecutive values one by one */
00096     maxVal = *pSrc++;
00097
00098     /* compare for the maximum value */
00099     if(out < maxVal)
00100     {
00101       /* Update the maximum value and its index */
00102       out = maxVal;
00103       outIndex = blockSize - blkCnt;
00104     }
00105     /* Decrement the loop counter */
00106     blkCnt--;
00107
00108   }
00109
00110 #endif /* #ifndef ARM_MATH_CM0 */
00111
00112   /* Store the maximum value and its index into destination pointers */
00113   *pResult = out;
00114   *pIndex = outIndex;
00115 }
00116
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_max_q31.c
00009 *
00010 * Description:  Maximum value of a Q31 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00051 void arm_max_q31(
00052   q31_t * pSrc,
00053   uint32_t blockSize,
00054   q31_t * pResult,
00055   uint32_t * pIndex)
00056 {
00057   q31_t maxVal, out;                             /* Temporary variables to store the output value. */
00058   uint32_t blkCnt, outIndex;                     /* loop counter */
00059
00060   /* Initialise the index value to zero. */
00061   outIndex = 0u;
00062   /* Load first input value that act as reference value for comparision */
00063   out = *pSrc++;
00064
00065   /* Loop over blockSize number of values */
00066   blkCnt = (blockSize - 1u);
00067
00068 #ifndef ARM_MATH_CM0
00069
00070   /* Run the below code for Cortex-M4 and Cortex-M3 */
00071
00072   do
00073   {
00074     /* Initialize maxVal to the next consecutive values one by one */
00075     maxVal = *pSrc++;
00076
00077     /* compare for the maximum value */
00078     if(out < maxVal)
00079     {
00080       /* Update the maximum value and its index */
00081       out = maxVal;
00082       outIndex = blockSize - blkCnt;
00083     }
00084
00085     /* Decrement the loop counter */
00086     blkCnt--;
00087
00088   } while(blkCnt > 0u);
00089
00090 #else
00091
00092   /* Run the below code for Cortex-M0 */
00093
00094   while(blkCnt > 0u)
00095   {
00096     /* Initialize maxVal to the next consecutive values one by one */
00097     maxVal = *pSrc++;
00098
00099     /* Compare for the maximum value */
00100     if(out < maxVal)
00101     {
00102       /* Update the maximum value and its index */
00103       out = maxVal;
00104       outIndex = blockSize - blkCnt;
00105     }
00106
00107     /* Decrement the loop counter */
00108     blkCnt--;
00109
00110   }
00111
00112 #endif /* #ifndef ARM_MATH_CM0 */
00113
00114   /* Store the maximum value and its index into destination pointers */
00115   *pResult = out;
00116   *pIndex = outIndex;
00117 }
00118
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_mean_f32.c
00009 *
00010 * Description:  Mean value of a floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00064 void arm_mean_f32(
00065   float32_t * pSrc,
00066   uint32_t blockSize,
00067   float32_t * pResult)
00068 {
00069   float32_t sum = 0.0f;                          /* Temporary result storage */
00070   uint32_t blkCnt;                               /* loop counter */
00071
00072 #ifndef ARM_MATH_CM0
00073
00074   /* Run the below code for Cortex-M4 and Cortex-M3 */
00075
00076   /*loop Unrolling */
00077   blkCnt = blockSize >> 2u;
00078
00079   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00080    ** a second loop below computes the remaining 1 to 3 samples. */
00081   while(blkCnt > 0u)
00082   {
00083     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00084     sum += *pSrc++;
00085     sum += *pSrc++;
00086     sum += *pSrc++;
00087     sum += *pSrc++;
00088
00089     /* Decrement the loop counter */
00090     blkCnt--;
00091   }
00092
00093   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00094    ** No loop unrolling is used. */
00095   blkCnt = blockSize % 0x4u;
00096
00097 #else
00098
00099   /* Run the below code for Cortex-M0 */
00100
00101   /* Loop over blockSize number of values */
00102   blkCnt = blockSize;
00103
00104 #endif /* #ifndef ARM_MATH_CM0 */
00105
00106   while(blkCnt > 0u)
00107   {
00108     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00109     sum += *pSrc++;
00110
00111     /* Decrement the loop counter */
00112     blkCnt--;
00113   }
00114
00115   /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
00116   /* Store the result to the destination */
00117   *pResult = sum / (float32_t) blockSize;
00118 }
00119
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_mean_q7.c
00009 *
00010 * Description:  Mean value of a Q7 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00061 void arm_mean_q7(
00062   q7_t * pSrc,
00063   uint32_t blockSize,
00064   q7_t * pResult)
00065 {
00066   q31_t sum = 0;                                 /* Temporary result storage */
00067   uint32_t blkCnt;                               /* loop counter */
00068
00069 #ifndef ARM_MATH_CM0
00070
00071   /* Run the below code for Cortex-M4 and Cortex-M3 */
00072
00073   /*loop Unrolling */
00074   blkCnt = blockSize >> 2u;
00075
00076   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00077    ** a second loop below computes the remaining 1 to 3 samples. */
00078   while(blkCnt > 0u)
00079   {
00080     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00081     sum += *pSrc++;
00082     sum += *pSrc++;
00083     sum += *pSrc++;
00084     sum += *pSrc++;
00085
00086     /* Decrement the loop counter */
00087     blkCnt--;
00088   }
00089
00090   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00091    ** No loop unrolling is used. */
00092   blkCnt = blockSize % 0x4u;
00093
00094 #else
00095
00096   /* Run the below code for Cortex-M0 */
00097
00098   /* Loop over blockSize number of values */
00099   blkCnt = blockSize;
00100
00101 #endif /* #ifndef ARM_MATH_CM0 */
00102
00103   while(blkCnt > 0u)
00104   {
00105     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00106     sum += *pSrc++;
00107
00108     /* Decrement the loop counter */
00109     blkCnt--;
00110   }
00111
00112   /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
00113   /* Store the result to the destination */
00114   *pResult = (q7_t) (sum / (int32_t) blockSize);
00115 }
00116
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_mean_q15.c
00009 *
00010 * Description:  Mean value of a Q15 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00061 void arm_mean_q15(
00062   q15_t * pSrc,
00063   uint32_t blockSize,
00064   q15_t * pResult)
00065 {
00066   q31_t sum = 0;                                 /* Temporary result storage */
00067   uint32_t blkCnt;                               /* loop counter */
00068
00069 #ifndef ARM_MATH_CM0
00070
00071   /* Run the below code for Cortex-M4 and Cortex-M3 */
00072
00073   /*loop Unrolling */
00074   blkCnt = blockSize >> 2u;
00075
00076   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00077    ** a second loop below computes the remaining 1 to 3 samples. */
00078   while(blkCnt > 0u)
00079   {
00080     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00081     sum += *pSrc++;
00082     sum += *pSrc++;
00083     sum += *pSrc++;
00084     sum += *pSrc++;
00085
00086     /* Decrement the loop counter */
00087     blkCnt--;
00088   }
00089
00090   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00091    ** No loop unrolling is used. */
00092   blkCnt = blockSize % 0x4u;
00093
00094 #else
00095
00096   /* Run the below code for Cortex-M0 */
00097
00098   /* Loop over blockSize number of values */
00099   blkCnt = blockSize;
00100
00101 #endif /* #ifndef ARM_MATH_CM0 */
00102
00103   while(blkCnt > 0u)
00104   {
00105     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00106     sum += *pSrc++;
00107
00108     /* Decrement the loop counter */
00109     blkCnt--;
00110   }
00111
00112   /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
00113   /* Store the result to the destination */
00114   *pResult = (q15_t) (sum / blockSize);
00115 }
00116
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_mean_q31.c
00009 *
00010 * Description:  Mean value of a Q31 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00061 void arm_mean_q31(
00062   q31_t * pSrc,
00063   uint32_t blockSize,
00064   q31_t * pResult)
00065 {
00066   q63_t sum = 0;                                 /* Temporary result storage */
00067   uint32_t blkCnt;                               /* loop counter */
00068
00069 #ifndef ARM_MATH_CM0
00070
00071   /* Run the below code for Cortex-M4 and Cortex-M3 */
00072
00073   /*loop Unrolling */
00074   blkCnt = blockSize >> 2u;
00075
00076   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00077    ** a second loop below computes the remaining 1 to 3 samples. */
00078   while(blkCnt > 0u)
00079   {
00080     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00081     sum += *pSrc++;
00082     sum += *pSrc++;
00083     sum += *pSrc++;
00084     sum += *pSrc++;
00085
00086     /* Decrement the loop counter */
00087     blkCnt--;
00088   }
00089
00090   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00091    ** No loop unrolling is used. */
00092   blkCnt = blockSize % 0x4u;
00093
00094 #else
00095
00096   /* Run the below code for Cortex-M0 */
00097
00098   /* Loop over blockSize number of values */
00099   blkCnt = blockSize;
00100
00101 #endif /* #ifndef ARM_MATH_CM0 */
00102
00103   while(blkCnt > 0u)
00104   {
00105     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00106     sum += *pSrc++;
00107
00108     /* Decrement the loop counter */
00109     blkCnt--;
00110   }
00111
00112   /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
00113   /* Store the result to the destination */
00114   *pResult = (q31_t) (sum / (int32_t) blockSize);
00115 }
00116
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_min_f32.c
00009 *
00010 * Description:  Minimum value of a floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00060 void arm_min_f32(
00061   float32_t * pSrc,
00062   uint32_t blockSize,
00063   float32_t * pResult,
00064   uint32_t * pIndex)
00065 {
00066   float32_t minVal, out;                         /* Temporary variables to store the output value. */
00067   uint32_t blkCnt, outIndex;                     /* loop counter */
00068
00069   /* Initialise the index value to zero. */
00070   outIndex = 0u;
00071   /* Load first input value that act as reference value for comparision */
00072   out = *pSrc++;
00073
00074 #ifndef ARM_MATH_CM0
00075
00076   /* Run the below code for Cortex-M4 and Cortex-M3 */
00077
00078
00079   /* Loop over blockSize number of values */
00080   blkCnt = (blockSize - 1u);
00081
00082   do
00083   {
00084     /* Initialize minVal to the next consecutive values one by one */
00085     minVal = *pSrc++;
00086
00087     /* compare for the minimum value */
00088     if(out > minVal)
00089     {
00090       /* Update the minimum value and it's index */
00091       out = minVal;
00092       outIndex = blockSize - blkCnt;
00093     }
00094
00095     blkCnt--;
00096
00097   } while(blkCnt > 0u);
00098
00099 #else
00100
00101   /* Run the below code for Cortex-M0 */
00102
00103   /* Loop over blockSize - 1 number of values */
00104   blkCnt = (blockSize - 1u);
00105
00106   while(blkCnt > 0u)
00107   {
00108     /* Initialize minVal to the next consecutive values one by one */
00109     minVal = *pSrc++;
00110
00111     /* compare for the minimum value */
00112     if(out > minVal)
00113     {
00114       /* Update the minimum value and it's index */
00115       out = minVal;
00116       outIndex = blockSize - blkCnt;
00117     }
00118     /* Decrement the loop counter */
00119     blkCnt--;
00120
00121   }
00122
00123 #endif /* #ifndef ARM_MATH_CM0 */
00124
00125
00126   /* Store the minimum value and it's index into destination pointers */
00127   *pResult = out;
00128   *pIndex = outIndex;
00129 }
00130
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_min_q7.c
00009 *
00010 * Description:  Minimum value of a Q7 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00052 void arm_min_q7(
00053   q7_t * pSrc,
00054   uint32_t blockSize,
00055   q7_t * pResult,
00056   uint32_t * pIndex)
00057 {
00058
00059 #ifndef ARM_MATH_CM0
00060
00061   /* Run the below code for Cortex-M4 and Cortex-M3 */
00062
00063   q7_t minVal, minVal1, minVal2, res, x0, x1;    /* Temporary variables to store the output value. */
00064   uint32_t blkCnt, indx, index1, index2, index3, indxMod;       /* loop counter */
00065
00066   /* Initialise the index value to zero. */
00067   indx = 0u;
00068
00069   /* Load first input value that act as reference value for comparision */
00070   res = *pSrc++;
00071
00072   /* Loop over blockSize number of values */
00073   blkCnt = (blockSize - 1u) >> 2u;
00074
00075   while(blkCnt > 0u)
00076   {
00077     indxMod = blockSize - (blkCnt * 4u);
00078
00079     /* Load two input values for comparision */
00080     x0 = *pSrc++;
00081     x1 = *pSrc++;
00082
00083     if(x0 > x1)
00084     {
00085       /* Update the minimum value and its index */
00086       minVal1 = x1;
00087       index1 = indxMod + 1u;
00088     }
00089     else
00090     {
00091       /* Update the minimum value and its index */
00092       minVal1 = x0;
00093       index1 = indxMod;
00094     }
00095
00096     /* Load two input values for comparision */
00097     x0 = *pSrc++;
00098     x1 = *pSrc++;
00099
00100     if(x0 > x1)
00101     {
00102       /* Update the minimum value and its index */
00103       minVal2 = x1;
00104       index2 = indxMod + 3u;
00105     }
00106     else
00107     {
00108       /* Update the minimum value and its index */
00109       minVal2 = x0;
00110       index2 = indxMod + 2u;
00111     }
00112
00113     if(minVal1 > minVal2)
00114     {
00115       /* Update the minimum value and its index */
00116       minVal = minVal2;
00117       index3 = index2;
00118     }
00119     else
00120     {
00121       /* Update the minimum value and its index */
00122       minVal = minVal1;
00123       index3 = index1;
00124     }
00125
00126     if(res > minVal)
00127     {
00128       /* Update the minimum value and its index */
00129       res = minVal;
00130       indx = index3;
00131     }
00132
00133     /* Decrement the loop counter */
00134     blkCnt--;
00135
00136   }
00137
00138   blkCnt = (blockSize - 1u) % 0x04u;
00139
00140   while(blkCnt > 0u)
00141   {
00142     /* Initialize minVal to the next consecutive values one by one */
00143     minVal = *pSrc++;
00144
00145     /* compare for the minimum value */
00146     if(res > minVal)
00147     {
00148       /* Update the minimum value and its index */
00149       res = minVal;
00150       indx = blockSize - blkCnt;
00151     }
00152
00153     /* Decrement the loop counter */
00154     blkCnt--;
00155   }
00156
00157   /* Store the minimum value and its index into destination pointers */
00158   *pResult = res;
00159   *pIndex = indx;
00160
00161 #else
00162
00163   /* Run the below code for Cortex-M0 */
00164
00165   q7_t minVal, out;                              /* Temporary variables to store the output value. */
00166   uint32_t blkCnt, outIndex;                     /* loop counter */
00167
00168   /* Initialise the index value to zero. */
00169   outIndex = 0u;
00170
00171   /* Load first input value that act as reference value for comparision */
00172   out = *pSrc++;
00173
00174   /* Loop over blockSize - 1 number of values */
00175   blkCnt = (blockSize - 1u);
00176
00177   while(blkCnt > 0u)
00178   {
00179     /* Initialize minVal to the next consecutive values one by one */
00180     minVal = *pSrc++;
00181
00182     /* compare for the minimum value */
00183     if(out > minVal)
00184     {
00185       /* Update the minimum value and its index */
00186       out = minVal;
00187       outIndex = blockSize - blkCnt;
00188     }
00189
00190     /* Decrement the loop counter */
00191     blkCnt--;
00192   }
00193
00194   /* Store the minimum value and its index into destination pointers */
00195   *pResult = out;
00196   *pIndex = outIndex;
00197
00198 #endif /* #ifndef ARM_MATH_CM0 */
00199
00200 }
00201
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_min_q15.c
00009 *
00010 * Description:  Minimum value of a Q15 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00053 void arm_min_q15(
00054   q15_t * pSrc,
00055   uint32_t blockSize,
00056   q15_t * pResult,
00057   uint32_t * pIndex)
00058 {
00059   q15_t minVal, out;                             /* Temporary variables to store the output value. */
00060   uint32_t blkCnt, outIndex;                     /* loop counter */
00061
00062   /* Initialise the index value to zero. */
00063   outIndex = 0u;
00064   /* Load first input value that act as reference value for comparision */
00065   out = *pSrc++;
00066
00067 #ifndef ARM_MATH_CM0
00068
00069   /* Run the below code for Cortex-M4 and Cortex-M3 */
00070
00071
00072   /* Loop over blockSize number of values */
00073   blkCnt = (blockSize - 1u);
00074
00075   do
00076   {
00077     /* Initialize minVal to the next consecutive values one by one */
00078     minVal = *pSrc++;
00079
00080     /* compare for the minimum value */
00081     if(out > minVal)
00082     {
00083       /* Update the minimum value and its index */
00084       out = minVal;
00085       outIndex = blockSize - blkCnt;
00086     }
00087
00088     blkCnt--;
00089
00090   } while(blkCnt > 0u);
00091
00092 #else
00093
00094   /* Run the below code for Cortex-M0 */
00095
00096   /* Loop over blockSize - 1 number of values */
00097   blkCnt = (blockSize - 1u);
00098
00099   while(blkCnt > 0u)
00100   {
00101     /* Initialize minVal to the next consecutive values one by one */
00102     minVal = *pSrc++;
00103
00104     /* compare for the minimum value */
00105     if(out > minVal)
00106     {
00107       /* Update the minimum value and its index */
00108       out = minVal;
00109       outIndex = blockSize - blkCnt;
00110     }
00111
00112     /* Decrement the loop counter */
00113     blkCnt--;
00114
00115   }
00116
00117 #endif /* #ifndef ARM_MATH_CM0 */
00118
00119
00120   /* Store the minimum value and its index into destination pointers */
00121   *pResult = out;
00122   *pIndex = outIndex;
00123 }
00124
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_min_q31.c
00009 *
00010 * Description:  Minimum value of a Q31 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00053 void arm_min_q31(
00054   q31_t * pSrc,
00055   uint32_t blockSize,
00056   q31_t * pResult,
00057   uint32_t * pIndex)
00058 {
00059   q31_t minVal, out;                             /* Temporary variables to store the output value. */
00060   uint32_t blkCnt, outIndex;                     /* loop counter */
00061
00062   /* Initialise the index value to zero. */
00063   outIndex = 0u;
00064   /* Load first input value that act as reference value for comparision */
00065   out = *pSrc++;
00066
00067 #ifndef ARM_MATH_CM0
00068
00069   /* Run the below code for Cortex-M4 and Cortex-M3 */
00070
00071   /* Loop over blockSize number of values */
00072   blkCnt = (blockSize - 1u);
00073
00074   do
00075   {
00076     /* Initialize minVal to the next consecutive values one by one */
00077     minVal = *pSrc++;
00078
00079     /* compare for the minimum value */
00080     if(out > minVal)
00081     {
00082       /* Update the minimum value and its index */
00083       out = minVal;
00084       outIndex = blockSize - blkCnt;
00085     }
00086
00087     blkCnt--;
00088
00089   } while(blkCnt > 0u);
00090
00091 #else
00092
00093   /* Run the below code for Cortex-M0 */
00094
00095   /* Loop over blockSize -1 number of values */
00096   blkCnt = (blockSize - 1u);
00097
00098   while(blkCnt > 0u)
00099   {
00100     /* Initialize minVal to the next consecutive values one by one */
00101     minVal = *pSrc++;
00102
00103     /* compare for the minimum value */
00104     if(out > minVal)
00105     {
00106       /* Update the minimum value and its index */
00107       out = minVal;
00108       outIndex = blockSize - blkCnt;
00109     }
00110
00111     /* Decrement the loop counter */
00112     blkCnt--;
00113
00114   }
00115
00116 #endif /* #ifndef ARM_MATH_CM0 */
00117
00118   /* Store the minimum value and its index into destination pointers */
00119   *pResult = out;
00120   *pIndex = outIndex;
00121 }
00122
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_mult_f32.c
00009 *
00010 * Description:  Floating-point vector multiplication.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00068 void arm_mult_f32(
00069   float32_t * pSrcA,
00070   float32_t * pSrcB,
00071   float32_t * pDst,
00072   uint32_t blockSize)
00073 {
00074   uint32_t blkCnt;                               /* loop counters */
00075
00076 #ifndef ARM_MATH_CM0
00077
00078 /* Run the below code for Cortex-M4 and Cortex-M3 */
00079
00080   /* loop Unrolling */
00081   blkCnt = blockSize >> 2u;
00082
00083   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00084    ** a second loop below computes the remaining 1 to 3 samples. */
00085   while(blkCnt > 0u)
00086   {
00087     /* C = A * B */
00088     /* Multiply the inputs and store the results in output buffer */
00089     *pDst++ = (*pSrcA++) * (*pSrcB++);
00090     *pDst++ = (*pSrcA++) * (*pSrcB++);
00091     *pDst++ = (*pSrcA++) * (*pSrcB++);
00092     *pDst++ = (*pSrcA++) * (*pSrcB++);
00093
00094     /* Decrement the blockSize loop counter */
00095     blkCnt--;
00096   }
00097
00098   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00099    ** No loop unrolling is used. */
00100   blkCnt = blockSize % 0x4u;
00101
00102 #else
00103
00104   /* Run the below code for Cortex-M0 */
00105
00106   /* Initialize blkCnt with number of samples */
00107   blkCnt = blockSize;
00108
00109 #endif /* #ifndef ARM_MATH_CM0 */
00110
00111
00112   while(blkCnt > 0u)
00113   {
00114     /* C = A * B */
00115     /* Multiply the inputs and store the results in output buffer */
00116     *pDst++ = (*pSrcA++) * (*pSrcB++);
00117
00118     /* Decrement the blockSize loop counter */
00119     blkCnt--;
00120   }
00121
00122 }
00123
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_mult_q7.c
00009 *
00010 * Description:  Q7 vector multiplication.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * Version 0.0.5  2010/04/26
00033 *    incorporated review comments and updated with latest CMSIS layer
00034 *
00035 * Version 0.0.3  2010/03/10 DP
00036 *    Initial version
00037 * -------------------------------------------------------------------- */
00038
00039 #include "arm_math.h"
00040
00064 void arm_mult_q7(
00065   q7_t * pSrcA,
00066   q7_t * pSrcB,
00067   q7_t * pDst,
00068   uint32_t blockSize)
00069 {
00070   uint32_t blkCnt;                               /* loop counters */
00071
00072 #ifndef ARM_MATH_CM0
00073
00074 /* Run the below code for Cortex-M4 and Cortex-M3 */
00075   q7_t out1, out2, out3, out4;                   /* Temporary variables to store the product */
00076
00077   /* loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079
00080   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00081    ** a second loop below computes the remaining 1 to 3 samples. */
00082   while(blkCnt > 0u)
00083   {
00084     /* C = A * B */
00085     /* Multiply the inputs and store the results in temporary variables */
00086     out1 = (q7_t) (((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7);
00087     out2 = (q7_t) (((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7);
00088     out3 = (q7_t) (((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7);
00089     out4 = (q7_t) (((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7);
00090
00091     /* Store the results of 4 inputs in the destination buffer in single cycle by packing */
00092     *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
00093
00094     /* Decrement the blockSize loop counter */
00095     blkCnt--;
00096   }
00097
00098   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00099    ** No loop unrolling is used. */
00100   blkCnt = blockSize % 0x4u;
00101
00102 #else
00103
00104   /* Run the below code for Cortex-M0 */
00105
00106   /* Initialize blkCnt with number of samples */
00107   blkCnt = blockSize;
00108
00109 #endif /* #ifndef ARM_MATH_CM0 */
00110
00111
00112   while(blkCnt > 0u)
00113   {
00114     /* C = A * B */
00115     /* Multiply the inputs and store the result in the destination buffer */
00116     *pDst++ = (q7_t) (((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7);
00117
00118     /* Decrement the blockSize loop counter */
00119     blkCnt--;
00120   }
00121 }
00122
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_mult_q15.c
00009 *
00010 * Description:  Q15 vector multiplication.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00062 void arm_mult_q15(
00063   q15_t * pSrcA,
00064   q15_t * pSrcB,
00065   q15_t * pDst,
00066   uint32_t blockSize)
00067 {
00068   uint32_t blkCnt;                               /* loop counters */
00069
00070 #ifndef ARM_MATH_CM0
00071
00072 /* Run the below code for Cortex-M4 and Cortex-M3 */
00073
00074   /* loop Unrolling */
00075   blkCnt = blockSize >> 2u;
00076
00077   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00078    ** a second loop below computes the remaining 1 to 3 samples. */
00079   while(blkCnt > 0u)
00080   {
00081     /* C = A * B */
00082     /* Multiply the inputs and store the result in the destination buffer */
00083     *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
00084     *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
00085     *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
00086     *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
00087
00088     /* Decrement the blockSize loop counter */
00089     blkCnt--;
00090   }
00091
00092   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00093    ** No loop unrolling is used. */
00094   blkCnt = blockSize % 0x4u;
00095
00096 #else
00097
00098   /* Run the below code for Cortex-M0 */
00099
00100   /* Initialize blkCnt with number of samples */
00101   blkCnt = blockSize;
00102
00103 #endif /* #ifndef ARM_MATH_CM0 */
00104
00105
00106   while(blkCnt > 0u)
00107   {
00108     /* C = A * B */
00109     /* Multiply the inputs and store the result in the destination buffer */
00110     *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
00111
00112     /* Decrement the blockSize loop counter */
00113     blkCnt--;
00114   }
00115 }
00116
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_mult_q31.c
00009 *
00010 * Description:  Q31 vector multiplication.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00061 void arm_mult_q31(
00062   q31_t * pSrcA,
00063   q31_t * pSrcB,
00064   q31_t * pDst,
00065   uint32_t blockSize)
00066 {
00067   uint32_t blkCnt;                               /* loop counters */
00068
00069 #ifndef ARM_MATH_CM0
00070
00071 /* Run the below code for Cortex-M4 and Cortex-M3 */
00072   /* loop Unrolling */
00073   blkCnt = blockSize >> 2u;
00074
00075   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00076    ** a second loop below computes the remaining 1 to 3 samples. */
00077   while(blkCnt > 0u)
00078   {
00079     /* C = A * B */
00080     /* Multiply the inputs and then store the results in the destination buffer. */
00081     *pDst++ =
00082       (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
00083     *pDst++ =
00084       (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
00085     *pDst++ =
00086       (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
00087     *pDst++ =
00088       (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
00089
00090     /* Decrement the blockSize loop counter */
00091     blkCnt--;
00092   }
00093
00094   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00095    ** No loop unrolling is used. */
00096   blkCnt = blockSize % 0x4u;
00097
00098 #else
00099
00100   /* Run the below code for Cortex-M0 */
00101
00102   /* Initialize blkCnt with number of samples */
00103   blkCnt = blockSize;
00104
00105 #endif /* #ifndef ARM_MATH_CM0 */
00106
00107   while(blkCnt > 0u)
00108   {
00109     /* C = A * B */
00110     /* Multiply the inputs and then store the results in the destination buffer. */
00111     *pDst++ =
00112       (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
00113
00114     /* Decrement the blockSize loop counter */
00115     blkCnt--;
00116   }
00117 }
00118
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_negate_f32.c
00009 *
00010 * Description:  Negates floating-point vectors.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00062 void arm_negate_f32(
00063   float32_t * pSrc,
00064   float32_t * pDst,
00065   uint32_t blockSize)
00066 {
00067   uint32_t blkCnt;                               /* loop counter */
00068
00069
00070 #ifndef ARM_MATH_CM0
00071
00072 /* Run the below code for Cortex-M4 and Cortex-M3 */
00073   /*loop Unrolling */
00074   blkCnt = blockSize >> 2u;
00075
00076   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00077    ** a second loop below computes the remaining 1 to 3 samples. */
00078   while(blkCnt > 0u)
00079   {
00080     /* C = -A */
00081     /* Negate and then store the results in the destination buffer. */
00082     *pDst++ = -*pSrc++;
00083     *pDst++ = -*pSrc++;
00084     *pDst++ = -*pSrc++;
00085     *pDst++ = -*pSrc++;
00086
00087     /* Decrement the loop counter */
00088     blkCnt--;
00089   }
00090
00091   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00092    ** No loop unrolling is used. */
00093   blkCnt = blockSize % 0x4u;
00094
00095 #else
00096
00097   /* Run the below code for Cortex-M0 */
00098
00099   /* Initialize blkCnt with number of samples */
00100   blkCnt = blockSize;
00101
00102 #endif /* #ifndef ARM_MATH_CM0 */
00103
00104   while(blkCnt > 0u)
00105   {
00106     /* C = -A */
00107     /* Negate and then store the results in the destination buffer. */
00108     *pDst++ = -*pSrc++;
00109
00110     /* Decrement the loop counter */
00111     blkCnt--;
00112   }
00113 }
00114
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_negate_q7.c
00009 *
00010 * Description:  Negates Q7 vectors.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00057 void arm_negate_q7(
00058   q7_t * pSrc,
00059   q7_t * pDst,
00060   uint32_t blockSize)
00061 {
00062   uint32_t blkCnt;                               /* loop counter */
00063
00064 #ifndef ARM_MATH_CM0
00065
00066 /* Run the below code for Cortex-M4 and Cortex-M3 */
00067   q7_t in1;                                      /* Input value1 */
00068   q7_t in2;                                      /* Input value2 */
00069   q7_t in3;                                      /* Input value3 */
00070   q7_t in4;                                      /* Input value4 */
00071
00072
00073   /*loop Unrolling */
00074   blkCnt = blockSize >> 2u;
00075
00076   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00077    ** a second loop below computes the remaining 1 to 3 samples. */
00078   while(blkCnt > 0u)
00079   {
00080     /* C = -A */
00081     /* Read four inputs */
00082     in1 = *pSrc++;
00083     in2 = *pSrc++;
00084     in3 = *pSrc++;
00085     in4 = *pSrc++;
00086
00087     /* Store the Negated results in the destination buffer in a single cycle by packing the results */
00088     *__SIMD32(pDst)++ =
00089       __PACKq7(__SSAT(-in1, 8), __SSAT(-in2, 8), __SSAT(-in3, 8),
00090                __SSAT(-in4, 8));
00091
00092     /* Decrement the loop counter */
00093     blkCnt--;
00094   }
00095
00096   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00097    ** No loop unrolling is used. */
00098   blkCnt = blockSize % 0x4u;
00099
00100 #else
00101
00102   /* Run the below code for Cortex-M0 */
00103
00104   /* Initialize blkCnt with number of samples */
00105   blkCnt = blockSize;
00106
00107 #endif /* #ifndef ARM_MATH_CM0 */
00108
00109   while(blkCnt > 0u)
00110   {
00111     /* C = -A */
00112     /* Negate and then store the results in the destination buffer. */
00113     *pDst++ = __SSAT(-*pSrc++, 8);
00114
00115     /* Decrement the loop counter */
00116     blkCnt--;
00117   }
00118 }
00119
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_negate_q15.c
00009 *
00010 * Description:  Negates Q15 vectors.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00057 void arm_negate_q15(
00058   q15_t * pSrc,
00059   q15_t * pDst,
00060   uint32_t blockSize)
00061 {
00062   uint32_t blkCnt;                               /* loop counter */
00063
00064
00065 #ifndef ARM_MATH_CM0
00066
00067 /* Run the below code for Cortex-M4 and Cortex-M3 */
00068
00069   q15_t in1, in2;                                /* Temporary variables */
00070
00071
00072   /*loop Unrolling */
00073   blkCnt = blockSize >> 2u;
00074
00075   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00076    ** a second loop below computes the remaining 1 to 3 samples. */
00077   while(blkCnt > 0u)
00078   {
00079     /* C = -A */
00080     /* Read two inputs */
00081     in1 = *pSrc++;
00082     in2 = *pSrc++;
00083     /* Negate and then store the results in the destination buffer by packing. */
00084
00085 #ifndef  ARM_MATH_BIG_ENDIAN
00086
00087     *__SIMD32(pDst)++ = __PKHBT(__SSAT(-in1, 16), __SSAT(-in2, 16), 16);
00088
00089 #else
00090
00091     *__SIMD32(pDst)++ = __PKHBT(__SSAT(-in2, 16), __SSAT(-in1, 16), 16);
00092
00093 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
00094
00095     in1 = *pSrc++;
00096     in2 = *pSrc++;
00097
00098 #ifndef  ARM_MATH_BIG_ENDIAN
00099
00100     *__SIMD32(pDst)++ = __PKHBT(__SSAT(-in1, 16), __SSAT(-in2, 16), 16);
00101
00102 #else
00103
00104
00105     *__SIMD32(pDst)++ = __PKHBT(__SSAT(-in2, 16), __SSAT(-in1, 16), 16);
00106
00107 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
00108
00109     /* Decrement the loop counter */
00110     blkCnt--;
00111   }
00112
00113   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00114    ** No loop unrolling is used. */
00115   blkCnt = blockSize % 0x4u;
00116
00117 #else
00118
00119   /* Run the below code for Cortex-M0 */
00120
00121   /* Initialize blkCnt with number of samples */
00122   blkCnt = blockSize;
00123
00124 #endif /* #ifndef ARM_MATH_CM0 */
00125
00126   while(blkCnt > 0u)
00127   {
00128     /* C = -A */
00129     /* Negate and then store the result in the destination buffer. */
00130     *pDst++ = __SSAT(-*pSrc++, 16);
00131
00132     /* Decrement the loop counter */
00133     blkCnt--;
00134   }
00135
00136 }
00137
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_negate_q31.c
00009 *
00010 * Description:  Negates Q31 vectors.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00057 void arm_negate_q31(
00058   q31_t * pSrc,
00059   q31_t * pDst,
00060   uint32_t blockSize)
00061 {
00062   q31_t in;                                      /* Temporary variable */
00063   uint32_t blkCnt;                               /* loop counter */
00064
00065 #ifndef ARM_MATH_CM0
00066
00067 /* Run the below code for Cortex-M4 and Cortex-M3 */
00068
00069   /*loop Unrolling */
00070   blkCnt = blockSize >> 2u;
00071
00072   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00073    ** a second loop below computes the remaining 1 to 3 samples. */
00074   while(blkCnt > 0u)
00075   {
00076     /* C = -A */
00077     /* Negate and then store the results in the destination buffer. */
00078     in = *pSrc++;
00079     *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
00080     in = *pSrc++;
00081     *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
00082     in = *pSrc++;
00083     *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
00084     in = *pSrc++;
00085     *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
00086
00087     /* Decrement the loop counter */
00088     blkCnt--;
00089   }
00090
00091   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00092    ** No loop unrolling is used. */
00093   blkCnt = blockSize % 0x4u;
00094
00095 #else
00096
00097   /* Run the below code for Cortex-M0 */
00098
00099   /* Initialize blkCnt with number of samples */
00100   blkCnt = blockSize;
00101
00102 #endif /* #ifndef ARM_MATH_CM0 */
00103
00104
00105   while(blkCnt > 0u)
00106   {
00107     /* C = -A */
00108     /* Negate and then store the result in the destination buffer. */
00109     in = *pSrc++;
00110     *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
00111
00112     /* Decrement the loop counter */
00113     blkCnt--;
00114   }
00115 }
00116
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_offset_f32.c
00009 *
00010 * Description:  Floating-point vector offset.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00066 void arm_offset_f32(
00067   float32_t * pSrc,
00068   float32_t offset,
00069   float32_t * pDst,
00070   uint32_t blockSize)
00071 {
00072   uint32_t blkCnt;                               /* loop counter */
00073
00074 #ifndef ARM_MATH_CM0
00075
00076 /* Run the below code for Cortex-M4 and Cortex-M3 */
00077
00078   /*loop Unrolling */
00079   blkCnt = blockSize >> 2u;
00080
00081   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00082    ** a second loop below computes the remaining 1 to 3 samples. */
00083   while(blkCnt > 0u)
00084   {
00085     /* C = A + offset */
00086     /* Add offset and then store the results in the destination buffer. */
00087     *pDst++ = (*pSrc++) + offset;
00088     *pDst++ = (*pSrc++) + offset;
00089     *pDst++ = (*pSrc++) + offset;
00090     *pDst++ = (*pSrc++) + offset;
00091
00092     /* Decrement the loop counter */
00093     blkCnt--;
00094   }
00095
00096   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00097    ** No loop unrolling is used. */
00098   blkCnt = blockSize % 0x4u;
00099
00100 #else
00101
00102   /* Run the below code for Cortex-M0 */
00103
00104   /* Initialize blkCnt with number of samples */
00105   blkCnt = blockSize;
00106
00107 #endif /* #ifndef ARM_MATH_CM0 */
00108
00109   while(blkCnt > 0u)
00110   {
00111     /* C = A + offset */
00112     /* Add offset and then store the result in the destination buffer. */
00113     *pDst++ = (*pSrc++) + offset;
00114
00115     /* Decrement the loop counter */
00116     blkCnt--;
00117   }
00118 }
00119
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_offset_q7.c
00009 *
00010 * Description:  Q7 vector offset.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_offset_q7(
00059   q7_t * pSrc,
00060   q7_t offset,
00061   q7_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   uint32_t blkCnt;                               /* loop counter */
00065
00066 #ifndef ARM_MATH_CM0
00067
00068 /* Run the below code for Cortex-M4 and Cortex-M3 */
00069   q31_t offset_packed;                           /* Offset packed to 32 bit */
00070
00071
00072   /*loop Unrolling */
00073   blkCnt = blockSize >> 2u;
00074
00075   /* Offset is packed to 32 bit in order to use SIMD32 for addition */
00076   offset_packed = __PACKq7(offset, offset, offset, offset);
00077
00078   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00079    ** a second loop below computes the remaining 1 to 3 samples. */
00080   while(blkCnt > 0u)
00081   {
00082     /* C = A + offset */
00083     /* Add offset and then store the results in the destination bufferfor 4 samples at a time. */
00084     *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrc)++, offset_packed);
00085
00086     /* Decrement the loop counter */
00087     blkCnt--;
00088   }
00089
00090   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00091    ** No loop unrolling is used. */
00092   blkCnt = blockSize % 0x4u;
00093
00094   while(blkCnt > 0u)
00095   {
00096     /* C = A + offset */
00097     /* Add offset and then store the result in the destination buffer. */
00098     *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
00099
00100     /* Decrement the loop counter */
00101     blkCnt--;
00102   }
00103
00104 #else
00105
00106   /* Run the below code for Cortex-M0 */
00107
00108   /* Initialize blkCnt with number of samples */
00109   blkCnt = blockSize;
00110
00111   while(blkCnt > 0u)
00112   {
00113     /* C = A + offset */
00114     /* Add offset and then store the result in the destination buffer. */
00115     *pDst++ = (q7_t) __SSAT((q15_t) * pSrc++ + offset, 8);
00116
00117     /* Decrement the loop counter */
00118     blkCnt--;
00119   }
00120
00121 #endif /* #ifndef ARM_MATH_CM0 */
00122
00123 }
00124
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_offset_q15.c
00009 *
00010 * Description:  Q15 vector offset.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_offset_q15(
00059   q15_t * pSrc,
00060   q15_t offset,
00061   q15_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   uint32_t blkCnt;                               /* loop counter */
00065
00066 #ifndef ARM_MATH_CM0
00067
00068 /* Run the below code for Cortex-M4 and Cortex-M3 */
00069   q31_t offset_packed;                           /* Offset packed to 32 bit */
00070
00071
00072   /*loop Unrolling */
00073   blkCnt = blockSize >> 2u;
00074
00075   /* Offset is packed to 32 bit in order to use SIMD32 for addition */
00076   offset_packed = __PKHBT(offset, offset, 16);
00077
00078   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00079    ** a second loop below computes the remaining 1 to 3 samples. */
00080   while(blkCnt > 0u)
00081   {
00082     /* C = A + offset */
00083     /* Add offset and then store the results in the destination buffer, 2 samples at a time. */
00084     *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
00085     *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
00086
00087     /* Decrement the loop counter */
00088     blkCnt--;
00089   }
00090
00091   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00092    ** No loop unrolling is used. */
00093   blkCnt = blockSize % 0x4u;
00094
00095   while(blkCnt > 0u)
00096   {
00097     /* C = A + offset */
00098     /* Add offset and then store the results in the destination buffer. */
00099     *pDst++ = (q15_t) __QADD16(*pSrc++, offset);
00100
00101     /* Decrement the loop counter */
00102     blkCnt--;
00103   }
00104
00105 #else
00106
00107   /* Run the below code for Cortex-M0 */
00108
00109   /* Initialize blkCnt with number of samples */
00110   blkCnt = blockSize;
00111
00112   while(blkCnt > 0u)
00113   {
00114     /* C = A + offset */
00115     /* Add offset and then store the results in the destination buffer. */
00116     *pDst++ = (q15_t) __SSAT(((q31_t) * pSrc++ + offset), 16);
00117
00118     /* Decrement the loop counter */
00119     blkCnt--;
00120   }
00121
00122 #endif /* #ifndef ARM_MATH_CM0 */
00123
00124 }
00125
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_offset_q31.c
00009 *
00010 * Description:  Q31 vector offset.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_offset_q31(
00059   q31_t * pSrc,
00060   q31_t offset,
00061   q31_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   uint32_t blkCnt;                               /* loop counter */
00065
00066 #ifndef ARM_MATH_CM0
00067
00068 /* Run the below code for Cortex-M4 and Cortex-M3 */
00069
00070
00071   /*loop Unrolling */
00072   blkCnt = blockSize >> 2u;
00073
00074   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00075    ** a second loop below computes the remaining 1 to 3 samples. */
00076   while(blkCnt > 0u)
00077   {
00078     /* C = A + offset */
00079     /* Add offset and then store the results in the destination buffer. */
00080     *pDst++ = __QADD(*pSrc++, offset);
00081     *pDst++ = __QADD(*pSrc++, offset);
00082     *pDst++ = __QADD(*pSrc++, offset);
00083     *pDst++ = __QADD(*pSrc++, offset);
00084
00085     /* Decrement the loop counter */
00086     blkCnt--;
00087   }
00088
00089   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00090    ** No loop unrolling is used. */
00091   blkCnt = blockSize % 0x4u;
00092
00093   while(blkCnt > 0u)
00094   {
00095     /* C = A + offset */
00096     /* Add offset and then store the result in the destination buffer. */
00097     *pDst++ = __QADD(*pSrc++, offset);
00098
00099     /* Decrement the loop counter */
00100     blkCnt--;
00101   }
00102
00103 #else
00104
00105   /* Run the below code for Cortex-M0 */
00106
00107   /* Initialize blkCnt with number of samples */
00108   blkCnt = blockSize;
00109
00110   while(blkCnt > 0u)
00111   {
00112     /* C = A + offset */
00113     /* Add offset and then store the result in the destination buffer. */
00114     *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
00115
00116     /* Decrement the loop counter */
00117     blkCnt--;
00118   }
00119
00120 #endif /* #ifndef ARM_MATH_CM0 */
00121
00122 }
00123
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_pid_init_f32.c
00009 *
00010 * Description:  Floating-point PID Control initialization function
00011 *
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 * ------------------------------------------------------------------- */
00030
00031 #include "arm_math.h"
00032
00051 void arm_pid_init_f32(
00052   arm_pid_instance_f32 * S,
00053   int32_t resetStateFlag)
00054 {
00055
00056   /* Derived coefficient A0 */
00057   S->A0 = S->Kp + S->Ki + S->Kd;
00058
00059   /* Derived coefficient A1 */
00060   S->A1 = (-S->Kp) - ((float32_t) 2.0 * S->Kd);
00061
00062   /* Derived coefficient A2 */
00063   S->A2 = S->Kd;
00064
00065   /* Check whether state needs reset or not */
00066   if(resetStateFlag)
00067   {
00068     /* Clear the state buffer.  The size will be always 3 samples */
00069     memset(S->state, 0, 3u * sizeof(float32_t));
00070   }
00071
00072 }
00073
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_pid_init_q15.c
00009 *
00010 * Description:  Q15 PID Control initialization function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00050 void arm_pid_init_q15(
00051   arm_pid_instance_q15 * S,
00052   int32_t resetStateFlag)
00053 {
00054
00055 #ifndef ARM_MATH_CM0
00056
00057   /* Run the below code for Cortex-M4 and Cortex-M3 */
00058
00059   /* Derived coefficient A0 */
00060   S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd);
00061
00062   /* Derived coefficients and pack into A1 */
00063
00064 #ifndef  ARM_MATH_BIG_ENDIAN
00065
00066   S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16);
00067
00068 #else
00069
00070   S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16);
00071
00072 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00073
00074   /* Check whether state needs reset or not */
00075   if(resetStateFlag)
00076   {
00077     /* Clear the state buffer.  The size will be always 3 samples */
00078     memset(S->state, 0, 3u * sizeof(q15_t));
00079   }
00080
00081 #else
00082
00083   /* Run the below code for Cortex-M0 */
00084
00085   q31_t temp;                                    /*to store the sum */
00086
00087   /* Derived coefficient A0 */
00088   temp = S->Kp + S->Ki + S->Kd;
00089   S->A0 = (q15_t) __SSAT(temp, 16);
00090
00091   /* Derived coefficients and pack into A1 */
00092   temp = -(S->Kd + S->Kd + S->Kp);
00093   S->A1 = (q15_t) __SSAT(temp, 16);
00094   S->A2 = S->Kd;
00095
00096
00097
00098   /* Check whether state needs reset or not */
00099   if(resetStateFlag)
00100   {
00101     /* Clear the state buffer.  The size will be always 3 samples */
00102     memset(S->state, 0, 3u * sizeof(q15_t));
00103   }
00104
00105 #endif /* #ifndef ARM_MATH_CM0 */
00106
00107 }
00108
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_pid_init_q31.c
00009 *
00010 * Description:  Q31 PID Control initialization function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00050 void arm_pid_init_q31(
00051   arm_pid_instance_q31 * S,
00052   int32_t resetStateFlag)
00053 {
00054
00055 #ifndef ARM_MATH_CM0
00056
00057   /* Run the below code for Cortex-M4 and Cortex-M3 */
00058
00059   /* Derived coefficient A0 */
00060   S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd);
00061
00062   /* Derived coefficient A1 */
00063   S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp);
00064
00065
00066 #else
00067
00068   /* Run the below code for Cortex-M0 */
00069
00070   q31_t temp;
00071
00072   /* Derived coefficient A0 */
00073   temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki);
00074   S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd);
00075
00076   /* Derived coefficient A1 */
00077   temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd);
00078   S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp);
00079
00080 #endif /* #ifndef ARM_MATH_CM0 */
00081
00082   /* Derived coefficient A2 */
00083   S->A2 = S->Kd;
00084
00085   /* Check whether state needs reset or not */
00086   if(resetStateFlag)
00087   {
00088     /* Clear the state buffer.  The size will be always 3 samples */
00089     memset(S->state, 0, 3u * sizeof(q31_t));
00090   }
00091
00092 }
00093
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_pid_reset_f32.c
00009 *
00010 * Description:  Floating-point PID Control reset function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00044 void arm_pid_reset_f32(
00045   arm_pid_instance_f32 * S)
00046 {
00047
00048   /* Clear the state buffer.  The size will be always 3 samples */
00049   memset(S->state, 0, 3u * sizeof(float32_t));
00050 }
00051
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_pid_reset_q15.c
00009 *
00010 * Description:  Q15 PID Control reset function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00044 void arm_pid_reset_q15(
00045   arm_pid_instance_q15 * S)
00046 {
00047   /* Reset state to zero, The size will be always 3 samples */
00048   memset(S->state, 0, 3u * sizeof(q15_t));
00049 }
00050
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_pid_reset_q31.c
00009 *
00010 * Description:  Q31 PID Control reset function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00044 void arm_pid_reset_q31(
00045   arm_pid_instance_q31 * S)
00046 {
00047
00048   /* Clear the state buffer.  The size will be always 3 samples */
00049   memset(S->state, 0, 3u * sizeof(q31_t));
00050 }
00051
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_power_f32.c
00009 *
00010 * Description:  Sum of the squares of the elements of a floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00068 void arm_power_f32(
00069   float32_t * pSrc,
00070   uint32_t blockSize,
00071   float32_t * pResult)
00072 {
00073   float32_t sum = 0.0f;                          /* accumulator */
00074   float32_t in;                                  /* Temporary variable to store input value */
00075   uint32_t blkCnt;                               /* loop counter */
00076
00077 #ifndef ARM_MATH_CM0
00078
00079   /* Run the below code for Cortex-M4 and Cortex-M3 */
00080
00081   /*loop Unrolling */
00082   blkCnt = blockSize >> 2u;
00083
00084   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00085    ** a second loop below computes the remaining 1 to 3 samples. */
00086   while(blkCnt > 0u)
00087   {
00088     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00089     /* Compute Power and then store the result in a temporary variable, sum. */
00090     in = *pSrc++;
00091     sum += in * in;
00092     in = *pSrc++;
00093     sum += in * in;
00094     in = *pSrc++;
00095     sum += in * in;
00096     in = *pSrc++;
00097     sum += in * in;
00098
00099     /* Decrement the loop counter */
00100     blkCnt--;
00101   }
00102
00103   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00104    ** No loop unrolling is used. */
00105   blkCnt = blockSize % 0x4u;
00106
00107
00108 #else
00109
00110   /* Run the below code for Cortex-M0 */
00111
00112   /* Loop over blockSize number of values */
00113   blkCnt = blockSize;
00114
00115 #endif /* #ifndef ARM_MATH_CM0 */
00116
00117
00118   while(blkCnt > 0u)
00119   {
00120     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00121     /* compute power and then store the result in a temporary variable, sum. */
00122     in = *pSrc++;
00123     sum += in * in;
00124
00125     /* Decrement the loop counter */
00126     blkCnt--;
00127   }
00128
00129   /* Store the result to the destination */
00130   *pResult = sum;
00131 }
00132
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_power_q7.c
00009 *
00010 * Description:  Sum of the squares of the elements of a Q7 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00062 void arm_power_q7(
00063   q7_t * pSrc,
00064   uint32_t blockSize,
00065   q31_t * pResult)
00066 {
00067   q31_t sum = 0;                                 /* Temporary result storage */
00068   q7_t in;                                       /* Temporary variable to store input */
00069   uint32_t blkCnt;                               /* loop counter */
00070
00071 #ifndef ARM_MATH_CM0
00072
00073   /* Run the below code for Cortex-M4 and Cortex-M3 */
00074
00075   q31_t input1;                                  /* Temporary variable to store packed input */
00076   q15_t in1, in2;                                /* Temporary variables to store input */
00077
00078   /*loop Unrolling */
00079   blkCnt = blockSize >> 2u;
00080
00081   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00082    ** a second loop below computes the remaining 1 to 3 samples. */
00083   while(blkCnt > 0u)
00084   {
00085     /* Reading two inputs of pSrc vector and packing */
00086     in1 = (q15_t) * pSrc++;
00087     in2 = (q15_t) * pSrc++;
00088     input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00089
00090     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00091     /* Compute Power and then store the result in a temporary variable, sum. */
00092     sum = __SMLAD(input1, input1, sum);
00093
00094     /* Reading two inputs of pSrc vector and packing */
00095     in1 = (q15_t) * pSrc++;
00096     in2 = (q15_t) * pSrc++;
00097     input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00098
00099     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00100     /* Compute Power and then store the result in a temporary variable, sum. */
00101     sum = __SMLAD(input1, input1, sum);
00102
00103     /* Decrement the loop counter */
00104     blkCnt--;
00105   }
00106
00107   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00108    ** No loop unrolling is used. */
00109   blkCnt = blockSize % 0x4u;
00110
00111 #else
00112
00113   /* Run the below code for Cortex-M0 */
00114
00115   /* Loop over blockSize number of values */
00116   blkCnt = blockSize;
00117
00118 #endif /* #ifndef ARM_MATH_CM0 */
00119
00120   while(blkCnt > 0u)
00121   {
00122     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00123     /* Compute Power and then store the result in a temporary variable, sum. */
00124     in = *pSrc++;
00125     sum += ((q15_t) in * in);
00126
00127     /* Decrement the loop counter */
00128     blkCnt--;
00129   }
00130
00131   /* Store the result in 18.14 format  */
00132   *pResult = sum;
00133 }
00134
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_power_q15.c
00009 *
00010 * Description:  Sum of the squares of the elements of a Q15 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00062 void arm_power_q15(
00063   q15_t * pSrc,
00064   uint32_t blockSize,
00065   q63_t * pResult)
00066 {
00067   q63_t sum = 0;                                 /* Temporary result storage */
00068
00069 #ifndef ARM_MATH_CM0
00070
00071   /* Run the below code for Cortex-M4 and Cortex-M3 */
00072
00073   q31_t in32;                                    /* Temporary variable to store input value */
00074   q15_t in16;                                    /* Temporary variable to store input value */
00075   uint32_t blkCnt;                               /* loop counter */
00076
00077
00078   /* loop Unrolling */
00079   blkCnt = blockSize >> 2u;
00080
00081   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00082    ** a second loop below computes the remaining 1 to 3 samples. */
00083   while(blkCnt > 0u)
00084   {
00085     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00086     /* Compute Power and then store the result in a temporary variable, sum. */
00087     in32 = *__SIMD32(pSrc)++;
00088     sum = __SMLALD(in32, in32, sum);
00089     in32 = *__SIMD32(pSrc)++;
00090     sum = __SMLALD(in32, in32, sum);
00091
00092     /* Decrement the loop counter */
00093     blkCnt--;
00094   }
00095
00096   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00097    ** No loop unrolling is used. */
00098   blkCnt = blockSize % 0x4u;
00099
00100   while(blkCnt > 0u)
00101   {
00102     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00103     /* Compute Power and then store the result in a temporary variable, sum. */
00104     in16 = *pSrc++;
00105     sum = __SMLALD(in16, in16, sum);
00106
00107     /* Decrement the loop counter */
00108     blkCnt--;
00109   }
00110
00111 #else
00112
00113   /* Run the below code for Cortex-M0 */
00114
00115   q15_t in;                                      /* Temporary variable to store input value */
00116   uint32_t blkCnt;                               /* loop counter */
00117
00118
00119   /* Loop over blockSize number of values */
00120   blkCnt = blockSize;
00121
00122   while(blkCnt > 0u)
00123   {
00124     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00125     /* Compute Power and then store the result in a temporary variable, sum. */
00126     in = *pSrc++;
00127     sum += ((q31_t) in * in);
00128
00129     /* Decrement the loop counter */
00130     blkCnt--;
00131   }
00132
00133 #endif /* #ifndef ARM_MATH_CM0 */
00134
00135   /* Store the results in 34.30 format  */
00136   *pResult = sum;
00137 }
00138
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_power_q31.c
00009 *
00010 * Description:  Sum of the squares of the elements of a Q31 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00063 void arm_power_q31(
00064   q31_t * pSrc,
00065   uint32_t blockSize,
00066   q63_t * pResult)
00067 {
00068   q63_t sum = 0;                                 /* Temporary result storage */
00069   q31_t in;
00070   uint32_t blkCnt;                               /* loop counter */
00071
00072
00073 #ifndef ARM_MATH_CM0
00074
00075   /* Run the below code for Cortex-M4 and Cortex-M3 */
00076
00077   /*loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079
00080   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00081    ** a second loop below computes the remaining 1 to 3 samples. */
00082   while(blkCnt > 0u)
00083   {
00084     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00085     /* Compute Power then shift intermediate results by 14 bits to maintain 16.48 format and then store the result in a temporary variable sum, providing 15 guard bits. */
00086     in = *pSrc++;
00087     sum += ((q63_t) in * in) >> 14u;
00088
00089     in = *pSrc++;
00090     sum += ((q63_t) in * in) >> 14u;
00091
00092     in = *pSrc++;
00093     sum += ((q63_t) in * in) >> 14u;
00094
00095     in = *pSrc++;
00096     sum += ((q63_t) in * in) >> 14u;
00097
00098     /* Decrement the loop counter */
00099     blkCnt--;
00100   }
00101
00102   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00103    ** No loop unrolling is used. */
00104   blkCnt = blockSize % 0x4u;
00105
00106 #else
00107
00108   /* Run the below code for Cortex-M0 */
00109
00110   /* Loop over blockSize number of values */
00111   blkCnt = blockSize;
00112
00113 #endif /* #ifndef ARM_MATH_CM0 */
00114
00115   while(blkCnt > 0u)
00116   {
00117     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00118     /* Compute Power and then store the result in a temporary variable, sum. */
00119     in = *pSrc++;
00120     sum += ((q63_t) in * in) >> 14u;
00121
00122     /* Decrement the loop counter */
00123     blkCnt--;
00124   }
00125
00126   /* Store the results in 16.48 format  */
00127   *pResult = sum;
00128 }
00129
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_q7_to_float.c
00009 *
00010 * Description:  Converts the elements of the Q7 vector to floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00063 void arm_q7_to_float(
00064   q7_t * pSrc,
00065   float32_t * pDst,
00066   uint32_t blockSize)
00067 {
00068   q7_t *pIn = pSrc;                              /* Src pointer */
00069   uint32_t blkCnt;                               /* loop counter */
00070
00071
00072 #ifndef ARM_MATH_CM0
00073
00074   /* Run the below code for Cortex-M4 and Cortex-M3 */
00075
00076   /*loop Unrolling */
00077   blkCnt = blockSize >> 2u;
00078
00079   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00080    ** a second loop below computes the remaining 1 to 3 samples. */
00081   while(blkCnt > 0u)
00082   {
00083     /* C = (float32_t) A / 128 */
00084     /* convert from q7 to float and then store the results in the destination buffer */
00085     *pDst++ = ((float32_t) * pIn++ / 128.0f);
00086     *pDst++ = ((float32_t) * pIn++ / 128.0f);
00087     *pDst++ = ((float32_t) * pIn++ / 128.0f);
00088     *pDst++ = ((float32_t) * pIn++ / 128.0f);
00089
00090     /* Decrement the loop counter */
00091     blkCnt--;
00092   }
00093
00094   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00095    ** No loop unrolling is used. */
00096   blkCnt = blockSize % 0x4u;
00097
00098 #else
00099
00100   /* Run the below code for Cortex-M0 */
00101
00102   /* Loop over blockSize number of values */
00103   blkCnt = blockSize;
00104
00105 #endif /* #ifndef ARM_MATH_CM0 */
00106
00107   while(blkCnt > 0u)
00108   {
00109     /* C = (float32_t) A / 128 */
00110     /* convert from q7 to float and then store the results in the destination buffer */
00111     *pDst++ = ((float32_t) * pIn++ / 128.0f);
00112
00113     /* Decrement the loop counter */
00114     blkCnt--;
00115   }
00116 }
00117
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_q7_to_q15.c
00009 *
00010 * Description:  Converts the elements of the Q7 vector to Q15 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00062 void arm_q7_to_q15(
00063   q7_t * pSrc,
00064   q15_t * pDst,
00065   uint32_t blockSize)
00066 {
00067   q7_t *pIn = pSrc;                              /* Src pointer */
00068   uint32_t blkCnt;                               /* loop counter */
00069
00070 #ifndef ARM_MATH_CM0
00071
00072   /* Run the below code for Cortex-M4 and Cortex-M3 */
00073
00074   /*loop Unrolling */
00075   blkCnt = blockSize >> 2u;
00076
00077   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00078    ** a second loop below computes the remaining 1 to 3 samples. */
00079   while(blkCnt > 0u)
00080   {
00081     /* C = (q15_t) A << 8 */
00082     /* convert from q7 to q15 and then store the results in the destination buffer */
00083     *pDst++ = (q15_t) * pIn++ << 8;
00084     *pDst++ = (q15_t) * pIn++ << 8;
00085     *pDst++ = (q15_t) * pIn++ << 8;
00086     *pDst++ = (q15_t) * pIn++ << 8;
00087
00088     /* Decrement the loop counter */
00089     blkCnt--;
00090   }
00091
00092   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00093    ** No loop unrolling is used. */
00094   blkCnt = blockSize % 0x4u;
00095
00096 #else
00097
00098   /* Run the below code for Cortex-M0 */
00099
00100   /* Loop over blockSize number of values */
00101   blkCnt = blockSize;
00102
00103 #endif /* #ifndef ARM_MATH_CM0 */
00104
00105   while(blkCnt > 0u)
00106   {
00107     /* C = (q15_t) A << 8 */
00108     /* convert from q7 to q15 and then store the results in the destination buffer */
00109     *pDst++ = (q15_t) * pIn++ << 8;
00110
00111     /* Decrement the loop counter */
00112     blkCnt--;
00113   }
00114
00115 }
00116
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_q7_to_q31.c
00009 *
00010 * Description:  Converts the elements of the Q7 vector to Q31 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00059 void arm_q7_to_q31(
00060   q7_t * pSrc,
00061   q31_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   q7_t *pIn = pSrc;                              /* Src pointer */
00065   uint32_t blkCnt;                               /* loop counter */
00066
00067 #ifndef ARM_MATH_CM0
00068
00069   /* Run the below code for Cortex-M4 and Cortex-M3 */
00070
00071   /*loop Unrolling */
00072   blkCnt = blockSize >> 2u;
00073
00074   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00075    ** a second loop below computes the remaining 1 to 3 samples. */
00076   while(blkCnt > 0u)
00077   {
00078     /* C = (q31_t) A << 24 */
00079     /* convert from q7 to q31 and then store the results in the destination buffer */
00080     *pDst++ = (q31_t) * pIn++ << 24;
00081     *pDst++ = (q31_t) * pIn++ << 24;
00082     *pDst++ = (q31_t) * pIn++ << 24;
00083     *pDst++ = (q31_t) * pIn++ << 24;
00084
00085     /* Decrement the loop counter */
00086     blkCnt--;
00087   }
00088
00089   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00090    ** No loop unrolling is used. */
00091   blkCnt = blockSize % 0x4u;
00092
00093 #else
00094
00095   /* Run the below code for Cortex-M0 */
00096
00097   /* Loop over blockSize number of values */
00098   blkCnt = blockSize;
00099
00100 #endif /* #ifndef ARM_MATH_CM0 */
00101
00102   while(blkCnt > 0u)
00103   {
00104     /* C = (q31_t) A << 24 */
00105     /* convert from q7 to q31 and then store the results in the destination buffer */
00106     *pDst++ = (q31_t) * pIn++ << 24;
00107
00108     /* Decrement the loop counter */
00109     blkCnt--;
00110   }
00111
00112 }
00113
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_q15_to_float.c
00009 *
00010 * Description:  Converts the elements of the Q15 vector to floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00066 void arm_q15_to_float(
00067   q15_t * pSrc,
00068   float32_t * pDst,
00069   uint32_t blockSize)
00070 {
00071   q15_t *pIn = pSrc;                             /* Src pointer */
00072   uint32_t blkCnt;                               /* loop counter */
00073
00074
00075 #ifndef ARM_MATH_CM0
00076
00077   /* Run the below code for Cortex-M4 and Cortex-M3 */
00078
00079   /*loop Unrolling */
00080   blkCnt = blockSize >> 2u;
00081
00082   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00083    ** a second loop below computes the remaining 1 to 3 samples. */
00084   while(blkCnt > 0u)
00085   {
00086     /* C = (float32_t) A / 32768 */
00087     /* convert from q15 to float and then store the results in the destination buffer */
00088     *pDst++ = ((float32_t) * pIn++ / 32768.0f);
00089     *pDst++ = ((float32_t) * pIn++ / 32768.0f);
00090     *pDst++ = ((float32_t) * pIn++ / 32768.0f);
00091     *pDst++ = ((float32_t) * pIn++ / 32768.0f);
00092
00093     /* Decrement the loop counter */
00094     blkCnt--;
00095   }
00096
00097   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00098    ** No loop unrolling is used. */
00099   blkCnt = blockSize % 0x4u;
00100
00101 #else
00102
00103   /* Run the below code for Cortex-M0 */
00104
00105   /* Loop over blockSize number of values */
00106   blkCnt = blockSize;
00107
00108 #endif /* #ifndef ARM_MATH_CM0 */
00109
00110   while(blkCnt > 0u)
00111   {
00112     /* C = (float32_t) A / 32768 */
00113     /* convert from q15 to float and then store the results in the destination buffer */
00114     *pDst++ = ((float32_t) * pIn++ / 32768.0f);
00115
00116     /* Decrement the loop counter */
00117     blkCnt--;
00118   }
00119 }
00120
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_q15_to_q7.c
00009 *
00010 * Description:  Converts the elements of the Q15 vector to Q7 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00060 void arm_q15_to_q7(
00061   q15_t * pSrc,
00062   q7_t * pDst,
00063   uint32_t blockSize)
00064 {
00065   q15_t *pIn = pSrc;                             /* Src pointer */
00066   uint32_t blkCnt;                               /* loop counter */
00067
00068 #ifndef ARM_MATH_CM0
00069
00070   /* Run the below code for Cortex-M4 and Cortex-M3 */
00071
00072   /*loop Unrolling */
00073   blkCnt = blockSize >> 2u;
00074
00075   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00076    ** a second loop below computes the remaining 1 to 3 samples. */
00077   while(blkCnt > 0u)
00078   {
00079     /* C = (q7_t) A >> 8 */
00080     /* convert from q15 to q7 and then store the results in the destination buffer */
00081     *pDst++ = (q7_t) (*pIn++ >> 8);
00082     *pDst++ = (q7_t) (*pIn++ >> 8);
00083     *pDst++ = (q7_t) (*pIn++ >> 8);
00084     *pDst++ = (q7_t) (*pIn++ >> 8);
00085
00086     /* Decrement the loop counter */
00087     blkCnt--;
00088   }
00089
00090   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00091    ** No loop unrolling is used. */
00092   blkCnt = blockSize % 0x4u;
00093
00094 #else
00095
00096   /* Run the below code for Cortex-M0 */
00097
00098   /* Loop over blockSize number of values */
00099   blkCnt = blockSize;
00100
00101 #endif /* #ifndef ARM_MATH_CM0 */
00102
00103   while(blkCnt > 0u)
00104   {
00105     /* C = (q7_t) A >> 8 */
00106     /* convert from q15 to q7 and then store the results in the destination buffer */
00107     *pDst++ = (q7_t) (*pIn++ >> 8);
00108
00109     /* Decrement the loop counter */
00110     blkCnt--;
00111   }
00112
00113 }
00114
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_q15_to_q31.c
00009 *
00010 * Description:  Converts the elements of the Q15 vector to Q31 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00059 void arm_q15_to_q31(
00060   q15_t * pSrc,
00061   q31_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   q15_t *pIn = pSrc;                             /* Src pointer */
00065   uint32_t blkCnt;                               /* loop counter */
00066
00067 #ifndef ARM_MATH_CM0
00068
00069   /* Run the below code for Cortex-M4 and Cortex-M3 */
00070
00071   /*loop Unrolling */
00072   blkCnt = blockSize >> 2u;
00073
00074   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00075    ** a second loop below computes the remaining 1 to 3 samples. */
00076   while(blkCnt > 0u)
00077   {
00078     /* C = (q31_t)A << 16 */
00079     /* convert from q15 to q31 and then store the results in the destination buffer */
00080     *pDst++ = (q31_t) * pIn++ << 16;
00081     *pDst++ = (q31_t) * pIn++ << 16;
00082     *pDst++ = (q31_t) * pIn++ << 16;
00083     *pDst++ = (q31_t) * pIn++ << 16;
00084
00085     /* Decrement the loop counter */
00086     blkCnt--;
00087   }
00088
00089   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00090    ** No loop unrolling is used. */
00091   blkCnt = blockSize % 0x4u;
00092
00093 #else
00094
00095   /* Run the below code for Cortex-M0 */
00096
00097   /* Loop over blockSize number of values */
00098   blkCnt = blockSize;
00099
00100 #endif /* #ifndef ARM_MATH_CM0 */
00101
00102   while(blkCnt > 0u)
00103   {
00104     /* C = (q31_t)A << 16 */
00105     /* convert from q15 to q31 and then store the results in the destination buffer */
00106     *pDst++ = (q31_t) * pIn++ << 16;
00107
00108     /* Decrement the loop counter */
00109     blkCnt--;
00110   }
00111
00112 }
00113
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_q31_to_float.c
00009 *
00010 * Description:  Converts the elements of the Q31 vector to floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00063 void arm_q31_to_float(
00064   q31_t * pSrc,
00065   float32_t * pDst,
00066   uint32_t blockSize)
00067 {
00068   q31_t *pIn = pSrc;                             /* Src pointer */
00069   uint32_t blkCnt;                               /* loop counter */
00070
00071
00072 #ifndef ARM_MATH_CM0
00073
00074   /* Run the below code for Cortex-M4 and Cortex-M3 */
00075
00076   /*loop Unrolling */
00077   blkCnt = blockSize >> 2u;
00078
00079   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00080    ** a second loop below computes the remaining 1 to 3 samples. */
00081   while(blkCnt > 0u)
00082   {
00083     /* C = (float32_t) A / 2147483648 */
00084     /* convert from q31 to float and then store the results in the destination buffer */
00085     *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
00086     *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
00087     *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
00088     *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
00089
00090     /* Decrement the loop counter */
00091     blkCnt--;
00092   }
00093
00094   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00095    ** No loop unrolling is used. */
00096   blkCnt = blockSize % 0x4u;
00097
00098 #else
00099
00100   /* Run the below code for Cortex-M0 */
00101
00102   /* Loop over blockSize number of values */
00103   blkCnt = blockSize;
00104
00105 #endif /* #ifndef ARM_MATH_CM0 */
00106
00107   while(blkCnt > 0u)
00108   {
00109     /* C = (float32_t) A / 2147483648 */
00110     /* convert from q31 to float and then store the results in the destination buffer */
00111     *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
00112
00113     /* Decrement the loop counter */
00114     blkCnt--;
00115   }
00116 }
00117
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_q31_to_q7.c
00009 *
00010 * Description:  Converts the elements of the Q31 vector to Q7 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00059 void arm_q31_to_q7(
00060   q31_t * pSrc,
00061   q7_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   q31_t *pIn = pSrc;                             /* Src pointer */
00065   uint32_t blkCnt;                               /* loop counter */
00066
00067 #ifndef ARM_MATH_CM0
00068
00069   /* Run the below code for Cortex-M4 and Cortex-M3 */
00070
00071   /*loop Unrolling */
00072   blkCnt = blockSize >> 2u;
00073
00074   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00075    ** a second loop below computes the remaining 1 to 3 samples. */
00076   while(blkCnt > 0u)
00077   {
00078     /* C = (q7_t) A >> 24 */
00079     /* convert from q31 to q7 and then store the results in the destination buffer */
00080     *pDst++ = (q7_t) (*pIn++ >> 24);
00081     *pDst++ = (q7_t) (*pIn++ >> 24);
00082     *pDst++ = (q7_t) (*pIn++ >> 24);
00083     *pDst++ = (q7_t) (*pIn++ >> 24);
00084
00085     /* Decrement the loop counter */
00086     blkCnt--;
00087   }
00088
00089   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00090    ** No loop unrolling is used. */
00091   blkCnt = blockSize % 0x4u;
00092
00093 #else
00094
00095   /* Run the below code for Cortex-M0 */
00096
00097   /* Loop over blockSize number of values */
00098   blkCnt = blockSize;
00099
00100 #endif /* #ifndef ARM_MATH_CM0 */
00101
00102   while(blkCnt > 0u)
00103   {
00104     /* C = (q7_t) A >> 24 */
00105     /* convert from q31 to q7 and then store the results in the destination buffer */
00106     *pDst++ = (q7_t) (*pIn++ >> 24);
00107
00108     /* Decrement the loop counter */
00109     blkCnt--;
00110   }
00111
00112 }
00113
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_q31_to_q15.c
00009 *
00010 * Description:  Converts the elements of the Q31 vector to Q15 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00059 void arm_q31_to_q15(
00060   q31_t * pSrc,
00061   q15_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   q31_t *pIn = pSrc;                             /* Src pointer */
00065   uint32_t blkCnt;                               /* loop counter */
00066
00067 #ifndef ARM_MATH_CM0
00068
00069   /* Run the below code for Cortex-M4 and Cortex-M3 */
00070
00071   /*loop Unrolling */
00072   blkCnt = blockSize >> 2u;
00073
00074   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00075    ** a second loop below computes the remaining 1 to 3 samples. */
00076   while(blkCnt > 0u)
00077   {
00078     /* C = (q15_t) A >> 16 */
00079     /* convert from q31 to q15 and then store the results in the destination buffer */
00080     *pDst++ = (q15_t) (*pIn++ >> 16);
00081     *pDst++ = (q15_t) (*pIn++ >> 16);
00082     *pDst++ = (q15_t) (*pIn++ >> 16);
00083     *pDst++ = (q15_t) (*pIn++ >> 16);
00084
00085     /* Decrement the loop counter */
00086     blkCnt--;
00087   }
00088
00089   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00090    ** No loop unrolling is used. */
00091   blkCnt = blockSize % 0x4u;
00092
00093 #else
00094
00095   /* Run the below code for Cortex-M0 */
00096
00097   /* Loop over blockSize number of values */
00098   blkCnt = blockSize;
00099
00100 #endif /* #ifndef ARM_MATH_CM0 */
00101
00102   while(blkCnt > 0u)
00103   {
00104     /* C = (q15_t) A >> 16 */
00105     /* convert from q31 to q15 and then store the results in the destination buffer */
00106     *pDst++ = (q15_t) (*pIn++ >> 16);
00107
00108     /* Decrement the loop counter */
00109     blkCnt--;
00110   }
00111
00112 }
00113
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_rfft_f32.c
00009 *
00010 * Description:  RFFT & RIFFT Floating point process function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00118 /*--------------------------------------------------------------------
00119  *              Internal functions prototypes
00120  *--------------------------------------------------------------------*/
00121
00122 void arm_split_rfft_f32(
00123   float32_t * pSrc,
00124   uint32_t fftLen,
00125   float32_t * pATable,
00126   float32_t * pBTable,
00127   float32_t * pDst,
00128   uint32_t modifier);
00129 void arm_split_rifft_f32(
00130   float32_t * pSrc,
00131   uint32_t fftLen,
00132   float32_t * pATable,
00133   float32_t * pBTable,
00134   float32_t * pDst,
00135   uint32_t modifier);
00136
00150 void arm_rfft_f32(
00151   const arm_rfft_instance_f32 * S,
00152   float32_t * pSrc,
00153   float32_t * pDst)
00154 {
00155   const arm_cfft_radix4_instance_f32 *S_CFFT = S->pCfft;
00156
00157
00158   /* Calculation of Real IFFT of input */
00159   if(S->ifftFlagR == 1u)
00160   {
00161     /*  Real IFFT core process */
00162     arm_split_rifft_f32(pSrc, S->fftLenBy2, S->pTwiddleAReal,
00163                         S->pTwiddleBReal, pDst, S->twidCoefRModifier);
00164
00165
00166     /* Complex radix-4 IFFT process */
00167     arm_radix4_butterfly_inverse_f32(pDst, S_CFFT->fftLen,
00168                                      S_CFFT->pTwiddle,
00169                                      S_CFFT->twidCoefModifier,
00170                                      S_CFFT->onebyfftLen);
00171
00172     /* Bit reversal process */
00173     if(S->bitReverseFlagR == 1u)
00174     {
00175       arm_bitreversal_f32(pDst, S_CFFT->fftLen,
00176                           S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
00177     }
00178   }
00179   else
00180   {
00181
00182     /* Calculation of RFFT of input */
00183
00184     /* Complex radix-4 FFT process */
00185     arm_radix4_butterfly_f32(pSrc, S_CFFT->fftLen,
00186                              S_CFFT->pTwiddle, S_CFFT->twidCoefModifier);
00187
00188     /* Bit reversal process */
00189     if(S->bitReverseFlagR == 1u)
00190     {
00191       arm_bitreversal_f32(pSrc, S_CFFT->fftLen,
00192                           S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
00193     }
00194
00195
00196     /*  Real FFT core process */
00197     arm_split_rfft_f32(pSrc, S->fftLenBy2, S->pTwiddleAReal,
00198                        S->pTwiddleBReal, pDst, S->twidCoefRModifier);
00199   }
00200
00201 }
00202
00218 void arm_split_rfft_f32(
00219   float32_t * pSrc,
00220   uint32_t fftLen,
00221   float32_t * pATable,
00222   float32_t * pBTable,
00223   float32_t * pDst,
00224   uint32_t modifier)
00225 {
00226   uint32_t i;                                    /* Loop Counter */
00227   float32_t outR, outI;                          /* Temporary variables for output */
00228   float32_t *pCoefA, *pCoefB;                    /* Temporary pointers for twiddle factors */
00229   float32_t CoefA1, CoefA2, CoefB1;              /* Temporary variables for twiddle coefficients */
00230   float32_t *pDst1 = &pDst[2], *pDst2 = &pDst[(4u * fftLen) - 1u];      /* temp pointers for output buffer */
00231   float32_t *pSrc1 = &pSrc[2], *pSrc2 = &pSrc[(2u * fftLen) - 1u];      /* temp pointers for input buffer */
00232
00233
00234   pSrc[2u * fftLen] = pSrc[0];
00235   pSrc[(2u * fftLen) + 1u] = pSrc[1];
00236
00237   /* Init coefficient pointers */
00238   pCoefA = &pATable[modifier * 2u];
00239   pCoefB = &pBTable[modifier * 2u];
00240
00241   i = fftLen - 1u;
00242
00243   while(i > 0u)
00244   {
00245     /*
00246        outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]
00247        + pSrc[2 * n - 2 * i] * pBTable[2 * i] +
00248        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
00249      */
00250
00251     /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +
00252        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
00253        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
00254
00255     /* read pATable[2 * i] */
00256     CoefA1 = *pCoefA++;
00257     /* pATable[2 * i + 1] */
00258     CoefA2 = *pCoefA;
00259
00260     /* pSrc[2 * i] * pATable[2 * i] */
00261     outR = *pSrc1 * CoefA1;
00262     /* pSrc[2 * i] * CoefA2 */
00263     outI = *pSrc1++ * CoefA2;
00264
00265     /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */
00266     outR -= (*pSrc1 + *pSrc2) * CoefA2;
00267     /* pSrc[2 * i + 1] * CoefA1 */
00268     outI += *pSrc1++ * CoefA1;
00269
00270     CoefB1 = *pCoefB;
00271
00272     /* pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */
00273     outI -= *pSrc2-- * CoefB1;
00274     /* pSrc[2 * fftLen - 2 * i] * CoefA2 */
00275     outI -= *pSrc2 * CoefA2;
00276
00277     /* pSrc[2 * fftLen - 2 * i] * CoefB1 */
00278     outR += *pSrc2-- * CoefB1;
00279
00280     /* write output */
00281     *pDst1++ = outR;
00282     *pDst1++ = outI;
00283
00284     /* write complex conjugate output */
00285     *pDst2-- = -outI;
00286     *pDst2-- = outR;
00287
00288     /* update coefficient pointer */
00289     pCoefB = pCoefB + (modifier * 2u);
00290     pCoefA = pCoefA + ((modifier * 2u) - 1u);
00291
00292     i--;
00293
00294   }
00295
00296   pDst[2u * fftLen] = pSrc[0] - pSrc[1];
00297   pDst[(2u * fftLen) + 1u] = 0.0f;
00298
00299   pDst[0] = pSrc[0] + pSrc[1];
00300   pDst[1] = 0.0f;
00301
00302 }
00303
00304
00316 void arm_split_rifft_f32(
00317   float32_t * pSrc,
00318   uint32_t fftLen,
00319   float32_t * pATable,
00320   float32_t * pBTable,
00321   float32_t * pDst,
00322   uint32_t modifier)
00323 {
00324   float32_t outR, outI;                          /* Temporary variables for output */
00325   float32_t *pCoefA, *pCoefB;                    /* Temporary pointers for twiddle factors */
00326   float32_t CoefA1, CoefA2, CoefB1;              /* Temporary variables for twiddle coefficients */
00327   float32_t *pSrc1 = &pSrc[0], *pSrc2 = &pSrc[(2u * fftLen) + 1u];
00328
00329   pCoefA = &pATable[0];
00330   pCoefB = &pBTable[0];
00331
00332   while(fftLen > 0u)
00333   {
00334     /*
00335        outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
00336        pIn[2 * n - 2 * i] * pBTable[2 * i] -
00337        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
00338
00339        outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -
00340        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
00341        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
00342
00343      */
00344
00345     CoefA1 = *pCoefA++;
00346     CoefA2 = *pCoefA;
00347
00348     /* outR = (pSrc[2 * i] * CoefA1 */
00349     outR = *pSrc1 * CoefA1;
00350
00351     /* - pSrc[2 * i] * CoefA2 */
00352     outI = -(*pSrc1++) * CoefA2;
00353
00354     /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */
00355     outR += (*pSrc1 + *pSrc2) * CoefA2;
00356
00357     /* pSrc[2 * i + 1] * CoefA1 */
00358     outI += (*pSrc1++) * CoefA1;
00359
00360     CoefB1 = *pCoefB;
00361
00362     /* - pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */
00363     outI -= *pSrc2-- * CoefB1;
00364
00365     /* pSrc[2 * fftLen - 2 * i] * CoefB1 */
00366     outR += *pSrc2 * CoefB1;
00367
00368     /* pSrc[2 * fftLen - 2 * i] * CoefA2 */
00369     outI += *pSrc2-- * CoefA2;
00370
00371     /* write output */
00372     *pDst++ = outR;
00373     *pDst++ = outI;
00374
00375     /* update coefficient pointer */
00376     pCoefB = pCoefB + (modifier * 2u);
00377     pCoefA = pCoefA + ((modifier * 2u) - 1u);
00378
00379     /* Decrement loop count */
00380     fftLen--;
00381   }
00382
00383 }
Generated on Mon Nov 28 2011 11:14:40 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_rfft_init_q15.c
00009 *
00010 * Description:  RFFT & RIFFT Q15 initialisation function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033
00034 #include "arm_math.h"
00035
00063 static const q15_t realCoefAQ15[2048] = {
00064
00065   0x4000, 0xc000, 0x3fce, 0xc000, 0x3f9b, 0xc000, 0x3f69, 0xc001,
00066   0x3f37, 0xc001, 0x3f05, 0xc002, 0x3ed2, 0xc003, 0x3ea0, 0xc004,
00067   0x3e6e, 0xc005, 0x3e3c, 0xc006, 0x3e09, 0xc008, 0x3dd7, 0xc009,
00068   0x3da5, 0xc00b, 0x3d73, 0xc00d, 0x3d40, 0xc00f, 0x3d0e, 0xc011,
00069   0x3cdc, 0xc014, 0x3caa, 0xc016, 0x3c78, 0xc019, 0x3c45, 0xc01c,
00070   0x3c13, 0xc01f, 0x3be1, 0xc022, 0x3baf, 0xc025, 0x3b7d, 0xc029,
00071   0x3b4b, 0xc02c, 0x3b19, 0xc030, 0x3ae6, 0xc034, 0x3ab4, 0xc038,
00072   0x3a82, 0xc03c, 0x3a50, 0xc041, 0x3a1e, 0xc045, 0x39ec, 0xc04a,
00073   0x39ba, 0xc04f, 0x3988, 0xc054, 0x3956, 0xc059, 0x3924, 0xc05e,
00074   0x38f2, 0xc064, 0x38c0, 0xc069, 0x388e, 0xc06f, 0x385c, 0xc075,
00075   0x382a, 0xc07b, 0x37f9, 0xc081, 0x37c7, 0xc088, 0x3795, 0xc08e,
00076   0x3763, 0xc095, 0x3731, 0xc09c, 0x36ff, 0xc0a3, 0x36ce, 0xc0aa,
00077   0x369c, 0xc0b1, 0x366a, 0xc0b9, 0x3639, 0xc0c0, 0x3607, 0xc0c8,
00078   0x35d5, 0xc0d0, 0x35a4, 0xc0d8, 0x3572, 0xc0e0, 0x3540, 0xc0e9,
00079   0x350f, 0xc0f1, 0x34dd, 0xc0fa, 0x34ac, 0xc103, 0x347b, 0xc10c,
00080   0x3449, 0xc115, 0x3418, 0xc11e, 0x33e6, 0xc128, 0x33b5, 0xc131,
00081   0x3384, 0xc13b, 0x3352, 0xc145, 0x3321, 0xc14f, 0x32f0, 0xc159,
00082   0x32bf, 0xc163, 0x328e, 0xc16e, 0x325c, 0xc178, 0x322b, 0xc183,
00083   0x31fa, 0xc18e, 0x31c9, 0xc199, 0x3198, 0xc1a4, 0x3167, 0xc1b0,
00084   0x3136, 0xc1bb, 0x3105, 0xc1c7, 0x30d5, 0xc1d3, 0x30a4, 0xc1df,
00085   0x3073, 0xc1eb, 0x3042, 0xc1f7, 0x3012, 0xc204, 0x2fe1, 0xc210,
00086   0x2fb0, 0xc21d, 0x2f80, 0xc22a, 0x2f4f, 0xc237, 0x2f1f, 0xc244,
00087   0x2eee, 0xc251, 0x2ebe, 0xc25f, 0x2e8d, 0xc26d, 0x2e5d, 0xc27a,
00088   0x2e2d, 0xc288, 0x2dfc, 0xc296, 0x2dcc, 0xc2a5, 0x2d9c, 0xc2b3,
00089   0x2d6c, 0xc2c1, 0x2d3c, 0xc2d0, 0x2d0c, 0xc2df, 0x2cdc, 0xc2ee,
00090   0x2cac, 0xc2fd, 0x2c7c, 0xc30c, 0x2c4c, 0xc31c, 0x2c1c, 0xc32b,
00091   0x2bed, 0xc33b, 0x2bbd, 0xc34b, 0x2b8d, 0xc35b, 0x2b5e, 0xc36b,
00092   0x2b2e, 0xc37b, 0x2aff, 0xc38c, 0x2acf, 0xc39c, 0x2aa0, 0xc3ad,
00093   0x2a70, 0xc3be, 0x2a41, 0xc3cf, 0x2a12, 0xc3e0, 0x29e3, 0xc3f1,
00094   0x29b4, 0xc403, 0x2984, 0xc414, 0x2955, 0xc426, 0x2926, 0xc438,
00095   0x28f7, 0xc44a, 0x28c9, 0xc45c, 0x289a, 0xc46e, 0x286b, 0xc481,
00096   0x283c, 0xc493, 0x280e, 0xc4a6, 0x27df, 0xc4b9, 0x27b1, 0xc4cc,
00097   0x2782, 0xc4df, 0x2754, 0xc4f2, 0x2725, 0xc506, 0x26f7, 0xc51a,
00098   0x26c9, 0xc52d, 0x269b, 0xc541, 0x266d, 0xc555, 0x263f, 0xc569,
00099   0x2611, 0xc57e, 0x25e3, 0xc592, 0x25b5, 0xc5a7, 0x2587, 0xc5bb,
00100   0x2559, 0xc5d0, 0x252c, 0xc5e5, 0x24fe, 0xc5fa, 0x24d0, 0xc610,
00101   0x24a3, 0xc625, 0x2476, 0xc63b, 0x2448, 0xc650, 0x241b, 0xc666,
00102   0x23ee, 0xc67c, 0x23c1, 0xc692, 0x2394, 0xc6a8, 0x2367, 0xc6bf,
00103   0x233a, 0xc6d5, 0x230d, 0xc6ec, 0x22e0, 0xc703, 0x22b3, 0xc71a,
00104   0x2287, 0xc731, 0x225a, 0xc748, 0x222d, 0xc75f, 0x2201, 0xc777,
00105   0x21d5, 0xc78f, 0x21a8, 0xc7a6, 0x217c, 0xc7be, 0x2150, 0xc7d6,
00106   0x2124, 0xc7ee, 0x20f8, 0xc807, 0x20cc, 0xc81f, 0x20a0, 0xc838,
00107   0x2074, 0xc850, 0x2049, 0xc869, 0x201d, 0xc882, 0x1ff1, 0xc89b,
00108   0x1fc6, 0xc8b5, 0x1f9b, 0xc8ce, 0x1f6f, 0xc8e8, 0x1f44, 0xc901,
00109   0x1f19, 0xc91b, 0x1eee, 0xc935, 0x1ec3, 0xc94f, 0x1e98, 0xc969,
00110   0x1e6d, 0xc983, 0x1e42, 0xc99e, 0x1e18, 0xc9b8, 0x1ded, 0xc9d3,
00111   0x1dc3, 0xc9ee, 0x1d98, 0xca09, 0x1d6e, 0xca24, 0x1d44, 0xca3f,
00112   0x1d19, 0xca5b, 0x1cef, 0xca76, 0x1cc5, 0xca92, 0x1c9b, 0xcaad,
00113   0x1c72, 0xcac9, 0x1c48, 0xcae5, 0x1c1e, 0xcb01, 0x1bf5, 0xcb1e,
00114   0x1bcb, 0xcb3a, 0x1ba2, 0xcb56, 0x1b78, 0xcb73, 0x1b4f, 0xcb90,
00115   0x1b26, 0xcbad, 0x1afd, 0xcbca, 0x1ad4, 0xcbe7, 0x1aab, 0xcc04,
00116   0x1a82, 0xcc21, 0x1a5a, 0xcc3f, 0x1a31, 0xcc5d, 0x1a08, 0xcc7a,
00117   0x19e0, 0xcc98, 0x19b8, 0xccb6, 0x198f, 0xccd4, 0x1967, 0xccf3,
00118   0x193f, 0xcd11, 0x1917, 0xcd30, 0x18ef, 0xcd4e, 0x18c8, 0xcd6d,
00119   0x18a0, 0xcd8c, 0x1878, 0xcdab, 0x1851, 0xcdca, 0x182a, 0xcde9,
00120   0x1802, 0xce08, 0x17db, 0xce28, 0x17b4, 0xce47, 0x178d, 0xce67,
00121   0x1766, 0xce87, 0x173f, 0xcea7, 0x1719, 0xcec7, 0x16f2, 0xcee7,
00122   0x16cb, 0xcf07, 0x16a5, 0xcf28, 0x167f, 0xcf48, 0x1659, 0xcf69,
00123   0x1632, 0xcf8a, 0x160c, 0xcfab, 0x15e6, 0xcfcc, 0x15c1, 0xcfed,
00124   0x159b, 0xd00e, 0x1575, 0xd030, 0x1550, 0xd051, 0x152a, 0xd073,
00125   0x1505, 0xd094, 0x14e0, 0xd0b6, 0x14bb, 0xd0d8, 0x1496, 0xd0fa,
00126   0x1471, 0xd11c, 0x144c, 0xd13e, 0x1428, 0xd161, 0x1403, 0xd183,
00127   0x13df, 0xd1a6, 0x13ba, 0xd1c9, 0x1396, 0xd1eb, 0x1372, 0xd20e,
00128   0x134e, 0xd231, 0x132a, 0xd255, 0x1306, 0xd278, 0x12e2, 0xd29b,
00129   0x12bf, 0xd2bf, 0x129b, 0xd2e2, 0x1278, 0xd306, 0x1255, 0xd32a,
00130   0x1231, 0xd34e, 0x120e, 0xd372, 0x11eb, 0xd396, 0x11c9, 0xd3ba,
00131   0x11a6, 0xd3df, 0x1183, 0xd403, 0x1161, 0xd428, 0x113e, 0xd44c,
00132   0x111c, 0xd471, 0x10fa, 0xd496, 0x10d8, 0xd4bb, 0x10b6, 0xd4e0,
00133   0x1094, 0xd505, 0x1073, 0xd52a, 0x1051, 0xd550, 0x1030, 0xd575,
00134   0x100e, 0xd59b, 0xfed, 0xd5c1, 0xfcc, 0xd5e6, 0xfab, 0xd60c,
00135   0xf8a, 0xd632, 0xf69, 0xd659, 0xf48, 0xd67f, 0xf28, 0xd6a5,
00136   0xf07, 0xd6cb, 0xee7, 0xd6f2, 0xec7, 0xd719, 0xea7, 0xd73f,
00137   0xe87, 0xd766, 0xe67, 0xd78d, 0xe47, 0xd7b4, 0xe28, 0xd7db,
00138   0xe08, 0xd802, 0xde9, 0xd82a, 0xdca, 0xd851, 0xdab, 0xd878,
00139   0xd8c, 0xd8a0, 0xd6d, 0xd8c8, 0xd4e, 0xd8ef, 0xd30, 0xd917,
00140   0xd11, 0xd93f, 0xcf3, 0xd967, 0xcd4, 0xd98f, 0xcb6, 0xd9b8,
00141   0xc98, 0xd9e0, 0xc7a, 0xda08, 0xc5d, 0xda31, 0xc3f, 0xda5a,
00142   0xc21, 0xda82, 0xc04, 0xdaab, 0xbe7, 0xdad4, 0xbca, 0xdafd,
00143   0xbad, 0xdb26, 0xb90, 0xdb4f, 0xb73, 0xdb78, 0xb56, 0xdba2,
00144   0xb3a, 0xdbcb, 0xb1e, 0xdbf5, 0xb01, 0xdc1e, 0xae5, 0xdc48,
00145   0xac9, 0xdc72, 0xaad, 0xdc9b, 0xa92, 0xdcc5, 0xa76, 0xdcef,
00146   0xa5b, 0xdd19, 0xa3f, 0xdd44, 0xa24, 0xdd6e, 0xa09, 0xdd98,
00147   0x9ee, 0xddc3, 0x9d3, 0xdded, 0x9b8, 0xde18, 0x99e, 0xde42,
00148   0x983, 0xde6d, 0x969, 0xde98, 0x94f, 0xdec3, 0x935, 0xdeee,
00149   0x91b, 0xdf19, 0x901, 0xdf44, 0x8e8, 0xdf6f, 0x8ce, 0xdf9b,
00150   0x8b5, 0xdfc6, 0x89b, 0xdff1, 0x882, 0xe01d, 0x869, 0xe049,
00151   0x850, 0xe074, 0x838, 0xe0a0, 0x81f, 0xe0cc, 0x807, 0xe0f8,
00152   0x7ee, 0xe124, 0x7d6, 0xe150, 0x7be, 0xe17c, 0x7a6, 0xe1a8,
00153   0x78f, 0xe1d5, 0x777, 0xe201, 0x75f, 0xe22d, 0x748, 0xe25a,
00154   0x731, 0xe287, 0x71a, 0xe2b3, 0x703, 0xe2e0, 0x6ec, 0xe30d,
00155   0x6d5, 0xe33a, 0x6bf, 0xe367, 0x6a8, 0xe394, 0x692, 0xe3c1,
00156   0x67c, 0xe3ee, 0x666, 0xe41b, 0x650, 0xe448, 0x63b, 0xe476,
00157   0x625, 0xe4a3, 0x610, 0xe4d0, 0x5fa, 0xe4fe, 0x5e5, 0xe52c,
00158   0x5d0, 0xe559, 0x5bb, 0xe587, 0x5a7, 0xe5b5, 0x592, 0xe5e3,
00159   0x57e, 0xe611, 0x569, 0xe63f, 0x555, 0xe66d, 0x541, 0xe69b,
00160   0x52d, 0xe6c9, 0x51a, 0xe6f7, 0x506, 0xe725, 0x4f2, 0xe754,
00161   0x4df, 0xe782, 0x4cc, 0xe7b1, 0x4b9, 0xe7df, 0x4a6, 0xe80e,
00162   0x493, 0xe83c, 0x481, 0xe86b, 0x46e, 0xe89a, 0x45c, 0xe8c9,
00163   0x44a, 0xe8f7, 0x438, 0xe926, 0x426, 0xe955, 0x414, 0xe984,
00164   0x403, 0xe9b4, 0x3f1, 0xe9e3, 0x3e0, 0xea12, 0x3cf, 0xea41,
00165   0x3be, 0xea70, 0x3ad, 0xeaa0, 0x39c, 0xeacf, 0x38c, 0xeaff,
00166   0x37b, 0xeb2e, 0x36b, 0xeb5e, 0x35b, 0xeb8d, 0x34b, 0xebbd,
00167   0x33b, 0xebed, 0x32b, 0xec1c, 0x31c, 0xec4c, 0x30c, 0xec7c,
00168   0x2fd, 0xecac, 0x2ee, 0xecdc, 0x2df, 0xed0c, 0x2d0, 0xed3c,
00169   0x2c1, 0xed6c, 0x2b3, 0xed9c, 0x2a5, 0xedcc, 0x296, 0xedfc,
00170   0x288, 0xee2d, 0x27a, 0xee5d, 0x26d, 0xee8d, 0x25f, 0xeebe,
00171   0x251, 0xeeee, 0x244, 0xef1f, 0x237, 0xef4f, 0x22a, 0xef80,
00172   0x21d, 0xefb0, 0x210, 0xefe1, 0x204, 0xf012, 0x1f7, 0xf042,
00173   0x1eb, 0xf073, 0x1df, 0xf0a4, 0x1d3, 0xf0d5, 0x1c7, 0xf105,
00174   0x1bb, 0xf136, 0x1b0, 0xf167, 0x1a4, 0xf198, 0x199, 0xf1c9,
00175   0x18e, 0xf1fa, 0x183, 0xf22b, 0x178, 0xf25c, 0x16e, 0xf28e,
00176   0x163, 0xf2bf, 0x159, 0xf2f0, 0x14f, 0xf321, 0x145, 0xf352,
00177   0x13b, 0xf384, 0x131, 0xf3b5, 0x128, 0xf3e6, 0x11e, 0xf418,
00178   0x115, 0xf449, 0x10c, 0xf47b, 0x103, 0xf4ac, 0xfa, 0xf4dd,
00179   0xf1, 0xf50f, 0xe9, 0xf540, 0xe0, 0xf572, 0xd8, 0xf5a4,
00180   0xd0, 0xf5d5, 0xc8, 0xf607, 0xc0, 0xf639, 0xb9, 0xf66a,
00181   0xb1, 0xf69c, 0xaa, 0xf6ce, 0xa3, 0xf6ff, 0x9c, 0xf731,
00182   0x95, 0xf763, 0x8e, 0xf795, 0x88, 0xf7c7, 0x81, 0xf7f9,
00183   0x7b, 0xf82a, 0x75, 0xf85c, 0x6f, 0xf88e, 0x69, 0xf8c0,
00184   0x64, 0xf8f2, 0x5e, 0xf924, 0x59, 0xf956, 0x54, 0xf988,
00185   0x4f, 0xf9ba, 0x4a, 0xf9ec, 0x45, 0xfa1e, 0x41, 0xfa50,
00186   0x3c, 0xfa82, 0x38, 0xfab4, 0x34, 0xfae6, 0x30, 0xfb19,
00187   0x2c, 0xfb4b, 0x29, 0xfb7d, 0x25, 0xfbaf, 0x22, 0xfbe1,
00188   0x1f, 0xfc13, 0x1c, 0xfc45, 0x19, 0xfc78, 0x16, 0xfcaa,
00189   0x14, 0xfcdc, 0x11, 0xfd0e, 0xf, 0xfd40, 0xd, 0xfd73,
00190   0xb, 0xfda5, 0x9, 0xfdd7, 0x8, 0xfe09, 0x6, 0xfe3c,
00191   0x5, 0xfe6e, 0x4, 0xfea0, 0x3, 0xfed2, 0x2, 0xff05,
00192   0x1, 0xff37, 0x1, 0xff69, 0x0, 0xff9b, 0x0, 0xffce,
00193   0x0, 0x0, 0x0, 0x32, 0x0, 0x65, 0x1, 0x97,
00194   0x1, 0xc9, 0x2, 0xfb, 0x3, 0x12e, 0x4, 0x160,
00195   0x5, 0x192, 0x6, 0x1c4, 0x8, 0x1f7, 0x9, 0x229,
00196   0xb, 0x25b, 0xd, 0x28d, 0xf, 0x2c0, 0x11, 0x2f2,
00197   0x14, 0x324, 0x16, 0x356, 0x19, 0x388, 0x1c, 0x3bb,
00198   0x1f, 0x3ed, 0x22, 0x41f, 0x25, 0x451, 0x29, 0x483,
00199   0x2c, 0x4b5, 0x30, 0x4e7, 0x34, 0x51a, 0x38, 0x54c,
00200   0x3c, 0x57e, 0x41, 0x5b0, 0x45, 0x5e2, 0x4a, 0x614,
00201   0x4f, 0x646, 0x54, 0x678, 0x59, 0x6aa, 0x5e, 0x6dc,
00202   0x64, 0x70e, 0x69, 0x740, 0x6f, 0x772, 0x75, 0x7a4,
00203   0x7b, 0x7d6, 0x81, 0x807, 0x88, 0x839, 0x8e, 0x86b,
00204   0x95, 0x89d, 0x9c, 0x8cf, 0xa3, 0x901, 0xaa, 0x932,
00205   0xb1, 0x964, 0xb9, 0x996, 0xc0, 0x9c7, 0xc8, 0x9f9,
00206   0xd0, 0xa2b, 0xd8, 0xa5c, 0xe0, 0xa8e, 0xe9, 0xac0,
00207   0xf1, 0xaf1, 0xfa, 0xb23, 0x103, 0xb54, 0x10c, 0xb85,
00208   0x115, 0xbb7, 0x11e, 0xbe8, 0x128, 0xc1a, 0x131, 0xc4b,
00209   0x13b, 0xc7c, 0x145, 0xcae, 0x14f, 0xcdf, 0x159, 0xd10,
00210   0x163, 0xd41, 0x16e, 0xd72, 0x178, 0xda4, 0x183, 0xdd5,
00211   0x18e, 0xe06, 0x199, 0xe37, 0x1a4, 0xe68, 0x1b0, 0xe99,
00212   0x1bb, 0xeca, 0x1c7, 0xefb, 0x1d3, 0xf2b, 0x1df, 0xf5c,
00213   0x1eb, 0xf8d, 0x1f7, 0xfbe, 0x204, 0xfee, 0x210, 0x101f,
00214   0x21d, 0x1050, 0x22a, 0x1080, 0x237, 0x10b1, 0x244, 0x10e1,
00215   0x251, 0x1112, 0x25f, 0x1142, 0x26d, 0x1173, 0x27a, 0x11a3,
00216   0x288, 0x11d3, 0x296, 0x1204, 0x2a5, 0x1234, 0x2b3, 0x1264,
00217   0x2c1, 0x1294, 0x2d0, 0x12c4, 0x2df, 0x12f4, 0x2ee, 0x1324,
00218   0x2fd, 0x1354, 0x30c, 0x1384, 0x31c, 0x13b4, 0x32b, 0x13e4,
00219   0x33b, 0x1413, 0x34b, 0x1443, 0x35b, 0x1473, 0x36b, 0x14a2,
00220   0x37b, 0x14d2, 0x38c, 0x1501, 0x39c, 0x1531, 0x3ad, 0x1560,
00221   0x3be, 0x1590, 0x3cf, 0x15bf, 0x3e0, 0x15ee, 0x3f1, 0x161d,
00222   0x403, 0x164c, 0x414, 0x167c, 0x426, 0x16ab, 0x438, 0x16da,
00223   0x44a, 0x1709, 0x45c, 0x1737, 0x46e, 0x1766, 0x481, 0x1795,
00224   0x493, 0x17c4, 0x4a6, 0x17f2, 0x4b9, 0x1821, 0x4cc, 0x184f,
00225   0x4df, 0x187e, 0x4f2, 0x18ac, 0x506, 0x18db, 0x51a, 0x1909,
00226   0x52d, 0x1937, 0x541, 0x1965, 0x555, 0x1993, 0x569, 0x19c1,
00227   0x57e, 0x19ef, 0x592, 0x1a1d, 0x5a7, 0x1a4b, 0x5bb, 0x1a79,
00228   0x5d0, 0x1aa7, 0x5e5, 0x1ad4, 0x5fa, 0x1b02, 0x610, 0x1b30,
00229   0x625, 0x1b5d, 0x63b, 0x1b8a, 0x650, 0x1bb8, 0x666, 0x1be5,
00230   0x67c, 0x1c12, 0x692, 0x1c3f, 0x6a8, 0x1c6c, 0x6bf, 0x1c99,
00231   0x6d5, 0x1cc6, 0x6ec, 0x1cf3, 0x703, 0x1d20, 0x71a, 0x1d4d,
00232   0x731, 0x1d79, 0x748, 0x1da6, 0x75f, 0x1dd3, 0x777, 0x1dff,
00233   0x78f, 0x1e2b, 0x7a6, 0x1e58, 0x7be, 0x1e84, 0x7d6, 0x1eb0,
00234   0x7ee, 0x1edc, 0x807, 0x1f08, 0x81f, 0x1f34, 0x838, 0x1f60,
00235   0x850, 0x1f8c, 0x869, 0x1fb7, 0x882, 0x1fe3, 0x89b, 0x200f,
00236   0x8b5, 0x203a, 0x8ce, 0x2065, 0x8e8, 0x2091, 0x901, 0x20bc,
00237   0x91b, 0x20e7, 0x935, 0x2112, 0x94f, 0x213d, 0x969, 0x2168,
00238   0x983, 0x2193, 0x99e, 0x21be, 0x9b8, 0x21e8, 0x9d3, 0x2213,
00239   0x9ee, 0x223d, 0xa09, 0x2268, 0xa24, 0x2292, 0xa3f, 0x22bc,
00240   0xa5b, 0x22e7, 0xa76, 0x2311, 0xa92, 0x233b, 0xaad, 0x2365,
00241   0xac9, 0x238e, 0xae5, 0x23b8, 0xb01, 0x23e2, 0xb1e, 0x240b,
00242   0xb3a, 0x2435, 0xb56, 0x245e, 0xb73, 0x2488, 0xb90, 0x24b1,
00243   0xbad, 0x24da, 0xbca, 0x2503, 0xbe7, 0x252c, 0xc04, 0x2555,
00244   0xc21, 0x257e, 0xc3f, 0x25a6, 0xc5d, 0x25cf, 0xc7a, 0x25f8,
00245   0xc98, 0x2620, 0xcb6, 0x2648, 0xcd4, 0x2671, 0xcf3, 0x2699,
00246   0xd11, 0x26c1, 0xd30, 0x26e9, 0xd4e, 0x2711, 0xd6d, 0x2738,
00247   0xd8c, 0x2760, 0xdab, 0x2788, 0xdca, 0x27af, 0xde9, 0x27d6,
00248   0xe08, 0x27fe, 0xe28, 0x2825, 0xe47, 0x284c, 0xe67, 0x2873,
00249   0xe87, 0x289a, 0xea7, 0x28c1, 0xec7, 0x28e7, 0xee7, 0x290e,
00250   0xf07, 0x2935, 0xf28, 0x295b, 0xf48, 0x2981, 0xf69, 0x29a7,
00251   0xf8a, 0x29ce, 0xfab, 0x29f4, 0xfcc, 0x2a1a, 0xfed, 0x2a3f,
00252   0x100e, 0x2a65, 0x1030, 0x2a8b, 0x1051, 0x2ab0, 0x1073, 0x2ad6,
00253   0x1094, 0x2afb, 0x10b6, 0x2b20, 0x10d8, 0x2b45, 0x10fa, 0x2b6a,
00254   0x111c, 0x2b8f, 0x113e, 0x2bb4, 0x1161, 0x2bd8, 0x1183, 0x2bfd,
00255   0x11a6, 0x2c21, 0x11c9, 0x2c46, 0x11eb, 0x2c6a, 0x120e, 0x2c8e,
00256   0x1231, 0x2cb2, 0x1255, 0x2cd6, 0x1278, 0x2cfa, 0x129b, 0x2d1e,
00257   0x12bf, 0x2d41, 0x12e2, 0x2d65, 0x1306, 0x2d88, 0x132a, 0x2dab,
00258   0x134e, 0x2dcf, 0x1372, 0x2df2, 0x1396, 0x2e15, 0x13ba, 0x2e37,
00259   0x13df, 0x2e5a, 0x1403, 0x2e7d, 0x1428, 0x2e9f, 0x144c, 0x2ec2,
00260   0x1471, 0x2ee4, 0x1496, 0x2f06, 0x14bb, 0x2f28, 0x14e0, 0x2f4a,
00261   0x1505, 0x2f6c, 0x152a, 0x2f8d, 0x1550, 0x2faf, 0x1575, 0x2fd0,
00262   0x159b, 0x2ff2, 0x15c1, 0x3013, 0x15e6, 0x3034, 0x160c, 0x3055,
00263   0x1632, 0x3076, 0x1659, 0x3097, 0x167f, 0x30b8, 0x16a5, 0x30d8,
00264   0x16cb, 0x30f9, 0x16f2, 0x3119, 0x1719, 0x3139, 0x173f, 0x3159,
00265   0x1766, 0x3179, 0x178d, 0x3199, 0x17b4, 0x31b9, 0x17db, 0x31d8,
00266   0x1802, 0x31f8, 0x182a, 0x3217, 0x1851, 0x3236, 0x1878, 0x3255,
00267   0x18a0, 0x3274, 0x18c8, 0x3293, 0x18ef, 0x32b2, 0x1917, 0x32d0,
00268   0x193f, 0x32ef, 0x1967, 0x330d, 0x198f, 0x332c, 0x19b8, 0x334a,
00269   0x19e0, 0x3368, 0x1a08, 0x3386, 0x1a31, 0x33a3, 0x1a5a, 0x33c1,
00270   0x1a82, 0x33df, 0x1aab, 0x33fc, 0x1ad4, 0x3419, 0x1afd, 0x3436,
00271   0x1b26, 0x3453, 0x1b4f, 0x3470, 0x1b78, 0x348d, 0x1ba2, 0x34aa,
00272   0x1bcb, 0x34c6, 0x1bf5, 0x34e2, 0x1c1e, 0x34ff, 0x1c48, 0x351b,
00273   0x1c72, 0x3537, 0x1c9b, 0x3553, 0x1cc5, 0x356e, 0x1cef, 0x358a,
00274   0x1d19, 0x35a5, 0x1d44, 0x35c1, 0x1d6e, 0x35dc, 0x1d98, 0x35f7,
00275   0x1dc3, 0x3612, 0x1ded, 0x362d, 0x1e18, 0x3648, 0x1e42, 0x3662,
00276   0x1e6d, 0x367d, 0x1e98, 0x3697, 0x1ec3, 0x36b1, 0x1eee, 0x36cb,
00277   0x1f19, 0x36e5, 0x1f44, 0x36ff, 0x1f6f, 0x3718, 0x1f9b, 0x3732,
00278   0x1fc6, 0x374b, 0x1ff1, 0x3765, 0x201d, 0x377e, 0x2049, 0x3797,
00279   0x2074, 0x37b0, 0x20a0, 0x37c8, 0x20cc, 0x37e1, 0x20f8, 0x37f9,
00280   0x2124, 0x3812, 0x2150, 0x382a, 0x217c, 0x3842, 0x21a8, 0x385a,
00281   0x21d5, 0x3871, 0x2201, 0x3889, 0x222d, 0x38a1, 0x225a, 0x38b8,
00282   0x2287, 0x38cf, 0x22b3, 0x38e6, 0x22e0, 0x38fd, 0x230d, 0x3914,
00283   0x233a, 0x392b, 0x2367, 0x3941, 0x2394, 0x3958, 0x23c1, 0x396e,
00284   0x23ee, 0x3984, 0x241b, 0x399a, 0x2448, 0x39b0, 0x2476, 0x39c5,
00285   0x24a3, 0x39db, 0x24d0, 0x39f0, 0x24fe, 0x3a06, 0x252c, 0x3a1b,
00286   0x2559, 0x3a30, 0x2587, 0x3a45, 0x25b5, 0x3a59, 0x25e3, 0x3a6e,
00287   0x2611, 0x3a82, 0x263f, 0x3a97, 0x266d, 0x3aab, 0x269b, 0x3abf,
00288   0x26c9, 0x3ad3, 0x26f7, 0x3ae6, 0x2725, 0x3afa, 0x2754, 0x3b0e,
00289   0x2782, 0x3b21, 0x27b1, 0x3b34, 0x27df, 0x3b47, 0x280e, 0x3b5a,
00290   0x283c, 0x3b6d, 0x286b, 0x3b7f, 0x289a, 0x3b92, 0x28c9, 0x3ba4,
00291   0x28f7, 0x3bb6, 0x2926, 0x3bc8, 0x2955, 0x3bda, 0x2984, 0x3bec,
00292   0x29b4, 0x3bfd, 0x29e3, 0x3c0f, 0x2a12, 0x3c20, 0x2a41, 0x3c31,
00293   0x2a70, 0x3c42, 0x2aa0, 0x3c53, 0x2acf, 0x3c64, 0x2aff, 0x3c74,
00294   0x2b2e, 0x3c85, 0x2b5e, 0x3c95, 0x2b8d, 0x3ca5, 0x2bbd, 0x3cb5,
00295   0x2bed, 0x3cc5, 0x2c1c, 0x3cd5, 0x2c4c, 0x3ce4, 0x2c7c, 0x3cf4,
00296   0x2cac, 0x3d03, 0x2cdc, 0x3d12, 0x2d0c, 0x3d21, 0x2d3c, 0x3d30,
00297   0x2d6c, 0x3d3f, 0x2d9c, 0x3d4d, 0x2dcc, 0x3d5b, 0x2dfc, 0x3d6a,
00298   0x2e2d, 0x3d78, 0x2e5d, 0x3d86, 0x2e8d, 0x3d93, 0x2ebe, 0x3da1,
00299   0x2eee, 0x3daf, 0x2f1f, 0x3dbc, 0x2f4f, 0x3dc9, 0x2f80, 0x3dd6,
00300   0x2fb0, 0x3de3, 0x2fe1, 0x3df0, 0x3012, 0x3dfc, 0x3042, 0x3e09,
00301   0x3073, 0x3e15, 0x30a4, 0x3e21, 0x30d5, 0x3e2d, 0x3105, 0x3e39,
00302   0x3136, 0x3e45, 0x3167, 0x3e50, 0x3198, 0x3e5c, 0x31c9, 0x3e67,
00303   0x31fa, 0x3e72, 0x322b, 0x3e7d, 0x325c, 0x3e88, 0x328e, 0x3e92,
00304   0x32bf, 0x3e9d, 0x32f0, 0x3ea7, 0x3321, 0x3eb1, 0x3352, 0x3ebb,
00305   0x3384, 0x3ec5, 0x33b5, 0x3ecf, 0x33e6, 0x3ed8, 0x3418, 0x3ee2,
00306   0x3449, 0x3eeb, 0x347b, 0x3ef4, 0x34ac, 0x3efd, 0x34dd, 0x3f06,
00307   0x350f, 0x3f0f, 0x3540, 0x3f17, 0x3572, 0x3f20, 0x35a4, 0x3f28,
00308   0x35d5, 0x3f30, 0x3607, 0x3f38, 0x3639, 0x3f40, 0x366a, 0x3f47,
00309   0x369c, 0x3f4f, 0x36ce, 0x3f56, 0x36ff, 0x3f5d, 0x3731, 0x3f64,
00310   0x3763, 0x3f6b, 0x3795, 0x3f72, 0x37c7, 0x3f78, 0x37f9, 0x3f7f,
00311   0x382a, 0x3f85, 0x385c, 0x3f8b, 0x388e, 0x3f91, 0x38c0, 0x3f97,
00312   0x38f2, 0x3f9c, 0x3924, 0x3fa2, 0x3956, 0x3fa7, 0x3988, 0x3fac,
00313   0x39ba, 0x3fb1, 0x39ec, 0x3fb6, 0x3a1e, 0x3fbb, 0x3a50, 0x3fbf,
00314   0x3a82, 0x3fc4, 0x3ab4, 0x3fc8, 0x3ae6, 0x3fcc, 0x3b19, 0x3fd0,
00315   0x3b4b, 0x3fd4, 0x3b7d, 0x3fd7, 0x3baf, 0x3fdb, 0x3be1, 0x3fde,
00316   0x3c13, 0x3fe1, 0x3c45, 0x3fe4, 0x3c78, 0x3fe7, 0x3caa, 0x3fea,
00317   0x3cdc, 0x3fec, 0x3d0e, 0x3fef, 0x3d40, 0x3ff1, 0x3d73, 0x3ff3,
00318   0x3da5, 0x3ff5, 0x3dd7, 0x3ff7, 0x3e09, 0x3ff8, 0x3e3c, 0x3ffa,
00319   0x3e6e, 0x3ffb, 0x3ea0, 0x3ffc, 0x3ed2, 0x3ffd, 0x3f05, 0x3ffe,
00320   0x3f37, 0x3fff, 0x3f69, 0x3fff, 0x3f9b, 0x4000, 0x3fce, 0x4000
00321 };
00322
00339 static const q15_t realCoefBQ15[2048] = {
00340   0x4000, 0x4000, 0x4032, 0x4000, 0x4065, 0x4000, 0x4097, 0x3fff,
00341   0x40c9, 0x3fff, 0x40fb, 0x3ffe, 0x412e, 0x3ffd, 0x4160, 0x3ffc,
00342   0x4192, 0x3ffb, 0x41c4, 0x3ffa, 0x41f7, 0x3ff8, 0x4229, 0x3ff7,
00343   0x425b, 0x3ff5, 0x428d, 0x3ff3, 0x42c0, 0x3ff1, 0x42f2, 0x3fef,
00344   0x4324, 0x3fec, 0x4356, 0x3fea, 0x4388, 0x3fe7, 0x43bb, 0x3fe4,
00345   0x43ed, 0x3fe1, 0x441f, 0x3fde, 0x4451, 0x3fdb, 0x4483, 0x3fd7,
00346   0x44b5, 0x3fd4, 0x44e7, 0x3fd0, 0x451a, 0x3fcc, 0x454c, 0x3fc8,
00347   0x457e, 0x3fc4, 0x45b0, 0x3fbf, 0x45e2, 0x3fbb, 0x4614, 0x3fb6,
00348   0x4646, 0x3fb1, 0x4678, 0x3fac, 0x46aa, 0x3fa7, 0x46dc, 0x3fa2,
00349   0x470e, 0x3f9c, 0x4740, 0x3f97, 0x4772, 0x3f91, 0x47a4, 0x3f8b,
00350   0x47d6, 0x3f85, 0x4807, 0x3f7f, 0x4839, 0x3f78, 0x486b, 0x3f72,
00351   0x489d, 0x3f6b, 0x48cf, 0x3f64, 0x4901, 0x3f5d, 0x4932, 0x3f56,
00352   0x4964, 0x3f4f, 0x4996, 0x3f47, 0x49c7, 0x3f40, 0x49f9, 0x3f38,
00353   0x4a2b, 0x3f30, 0x4a5c, 0x3f28, 0x4a8e, 0x3f20, 0x4ac0, 0x3f17,
00354   0x4af1, 0x3f0f, 0x4b23, 0x3f06, 0x4b54, 0x3efd, 0x4b85, 0x3ef4,
00355   0x4bb7, 0x3eeb, 0x4be8, 0x3ee2, 0x4c1a, 0x3ed8, 0x4c4b, 0x3ecf,
00356   0x4c7c, 0x3ec5, 0x4cae, 0x3ebb, 0x4cdf, 0x3eb1, 0x4d10, 0x3ea7,
00357   0x4d41, 0x3e9d, 0x4d72, 0x3e92, 0x4da4, 0x3e88, 0x4dd5, 0x3e7d,
00358   0x4e06, 0x3e72, 0x4e37, 0x3e67, 0x4e68, 0x3e5c, 0x4e99, 0x3e50,
00359   0x4eca, 0x3e45, 0x4efb, 0x3e39, 0x4f2b, 0x3e2d, 0x4f5c, 0x3e21,
00360   0x4f8d, 0x3e15, 0x4fbe, 0x3e09, 0x4fee, 0x3dfc, 0x501f, 0x3df0,
00361   0x5050, 0x3de3, 0x5080, 0x3dd6, 0x50b1, 0x3dc9, 0x50e1, 0x3dbc,
00362   0x5112, 0x3daf, 0x5142, 0x3da1, 0x5173, 0x3d93, 0x51a3, 0x3d86,
00363   0x51d3, 0x3d78, 0x5204, 0x3d6a, 0x5234, 0x3d5b, 0x5264, 0x3d4d,
00364   0x5294, 0x3d3f, 0x52c4, 0x3d30, 0x52f4, 0x3d21, 0x5324, 0x3d12,
00365   0x5354, 0x3d03, 0x5384, 0x3cf4, 0x53b4, 0x3ce4, 0x53e4, 0x3cd5,
00366   0x5413, 0x3cc5, 0x5443, 0x3cb5, 0x5473, 0x3ca5, 0x54a2, 0x3c95,
00367   0x54d2, 0x3c85, 0x5501, 0x3c74, 0x5531, 0x3c64, 0x5560, 0x3c53,
00368   0x5590, 0x3c42, 0x55bf, 0x3c31, 0x55ee, 0x3c20, 0x561d, 0x3c0f,
00369   0x564c, 0x3bfd, 0x567c, 0x3bec, 0x56ab, 0x3bda, 0x56da, 0x3bc8,
00370   0x5709, 0x3bb6, 0x5737, 0x3ba4, 0x5766, 0x3b92, 0x5795, 0x3b7f,
00371   0x57c4, 0x3b6d, 0x57f2, 0x3b5a, 0x5821, 0x3b47, 0x584f, 0x3b34,
00372   0x587e, 0x3b21, 0x58ac, 0x3b0e, 0x58db, 0x3afa, 0x5909, 0x3ae6,
00373   0x5937, 0x3ad3, 0x5965, 0x3abf, 0x5993, 0x3aab, 0x59c1, 0x3a97,
00374   0x59ef, 0x3a82, 0x5a1d, 0x3a6e, 0x5a4b, 0x3a59, 0x5a79, 0x3a45,
00375   0x5aa7, 0x3a30, 0x5ad4, 0x3a1b, 0x5b02, 0x3a06, 0x5b30, 0x39f0,
00376   0x5b5d, 0x39db, 0x5b8a, 0x39c5, 0x5bb8, 0x39b0, 0x5be5, 0x399a,
00377   0x5c12, 0x3984, 0x5c3f, 0x396e, 0x5c6c, 0x3958, 0x5c99, 0x3941,
00378   0x5cc6, 0x392b, 0x5cf3, 0x3914, 0x5d20, 0x38fd, 0x5d4d, 0x38e6,
00379   0x5d79, 0x38cf, 0x5da6, 0x38b8, 0x5dd3, 0x38a1, 0x5dff, 0x3889,
00380   0x5e2b, 0x3871, 0x5e58, 0x385a, 0x5e84, 0x3842, 0x5eb0, 0x382a,
00381   0x5edc, 0x3812, 0x5f08, 0x37f9, 0x5f34, 0x37e1, 0x5f60, 0x37c8,
00382   0x5f8c, 0x37b0, 0x5fb7, 0x3797, 0x5fe3, 0x377e, 0x600f, 0x3765,
00383   0x603a, 0x374b, 0x6065, 0x3732, 0x6091, 0x3718, 0x60bc, 0x36ff,
00384   0x60e7, 0x36e5, 0x6112, 0x36cb, 0x613d, 0x36b1, 0x6168, 0x3697,
00385   0x6193, 0x367d, 0x61be, 0x3662, 0x61e8, 0x3648, 0x6213, 0x362d,
00386   0x623d, 0x3612, 0x6268, 0x35f7, 0x6292, 0x35dc, 0x62bc, 0x35c1,
00387   0x62e7, 0x35a5, 0x6311, 0x358a, 0x633b, 0x356e, 0x6365, 0x3553,
00388   0x638e, 0x3537, 0x63b8, 0x351b, 0x63e2, 0x34ff, 0x640b, 0x34e2,
00389   0x6435, 0x34c6, 0x645e, 0x34aa, 0x6488, 0x348d, 0x64b1, 0x3470,
00390   0x64da, 0x3453, 0x6503, 0x3436, 0x652c, 0x3419, 0x6555, 0x33fc,
00391   0x657e, 0x33df, 0x65a6, 0x33c1, 0x65cf, 0x33a3, 0x65f8, 0x3386,
00392   0x6620, 0x3368, 0x6648, 0x334a, 0x6671, 0x332c, 0x6699, 0x330d,
00393   0x66c1, 0x32ef, 0x66e9, 0x32d0, 0x6711, 0x32b2, 0x6738, 0x3293,
00394   0x6760, 0x3274, 0x6788, 0x3255, 0x67af, 0x3236, 0x67d6, 0x3217,
00395   0x67fe, 0x31f8, 0x6825, 0x31d8, 0x684c, 0x31b9, 0x6873, 0x3199,
00396   0x689a, 0x3179, 0x68c1, 0x3159, 0x68e7, 0x3139, 0x690e, 0x3119,
00397   0x6935, 0x30f9, 0x695b, 0x30d8, 0x6981, 0x30b8, 0x69a7, 0x3097,
00398   0x69ce, 0x3076, 0x69f4, 0x3055, 0x6a1a, 0x3034, 0x6a3f, 0x3013,
00399   0x6a65, 0x2ff2, 0x6a8b, 0x2fd0, 0x6ab0, 0x2faf, 0x6ad6, 0x2f8d,
00400   0x6afb, 0x2f6c, 0x6b20, 0x2f4a, 0x6b45, 0x2f28, 0x6b6a, 0x2f06,
00401   0x6b8f, 0x2ee4, 0x6bb4, 0x2ec2, 0x6bd8, 0x2e9f, 0x6bfd, 0x2e7d,
00402   0x6c21, 0x2e5a, 0x6c46, 0x2e37, 0x6c6a, 0x2e15, 0x6c8e, 0x2df2,
00403   0x6cb2, 0x2dcf, 0x6cd6, 0x2dab, 0x6cfa, 0x2d88, 0x6d1e, 0x2d65,
00404   0x6d41, 0x2d41, 0x6d65, 0x2d1e, 0x6d88, 0x2cfa, 0x6dab, 0x2cd6,
00405   0x6dcf, 0x2cb2, 0x6df2, 0x2c8e, 0x6e15, 0x2c6a, 0x6e37, 0x2c46,
00406   0x6e5a, 0x2c21, 0x6e7d, 0x2bfd, 0x6e9f, 0x2bd8, 0x6ec2, 0x2bb4,
00407   0x6ee4, 0x2b8f, 0x6f06, 0x2b6a, 0x6f28, 0x2b45, 0x6f4a, 0x2b20,
00408   0x6f6c, 0x2afb, 0x6f8d, 0x2ad6, 0x6faf, 0x2ab0, 0x6fd0, 0x2a8b,
00409   0x6ff2, 0x2a65, 0x7013, 0x2a3f, 0x7034, 0x2a1a, 0x7055, 0x29f4,
00410   0x7076, 0x29ce, 0x7097, 0x29a7, 0x70b8, 0x2981, 0x70d8, 0x295b,
00411   0x70f9, 0x2935, 0x7119, 0x290e, 0x7139, 0x28e7, 0x7159, 0x28c1,
00412   0x7179, 0x289a, 0x7199, 0x2873, 0x71b9, 0x284c, 0x71d8, 0x2825,
00413   0x71f8, 0x27fe, 0x7217, 0x27d6, 0x7236, 0x27af, 0x7255, 0x2788,
00414   0x7274, 0x2760, 0x7293, 0x2738, 0x72b2, 0x2711, 0x72d0, 0x26e9,
00415   0x72ef, 0x26c1, 0x730d, 0x2699, 0x732c, 0x2671, 0x734a, 0x2648,
00416   0x7368, 0x2620, 0x7386, 0x25f8, 0x73a3, 0x25cf, 0x73c1, 0x25a6,
00417   0x73df, 0x257e, 0x73fc, 0x2555, 0x7419, 0x252c, 0x7436, 0x2503,
00418   0x7453, 0x24da, 0x7470, 0x24b1, 0x748d, 0x2488, 0x74aa, 0x245e,
00419   0x74c6, 0x2435, 0x74e2, 0x240b, 0x74ff, 0x23e2, 0x751b, 0x23b8,
00420   0x7537, 0x238e, 0x7553, 0x2365, 0x756e, 0x233b, 0x758a, 0x2311,
00421   0x75a5, 0x22e7, 0x75c1, 0x22bc, 0x75dc, 0x2292, 0x75f7, 0x2268,
00422   0x7612, 0x223d, 0x762d, 0x2213, 0x7648, 0x21e8, 0x7662, 0x21be,
00423   0x767d, 0x2193, 0x7697, 0x2168, 0x76b1, 0x213d, 0x76cb, 0x2112,
00424   0x76e5, 0x20e7, 0x76ff, 0x20bc, 0x7718, 0x2091, 0x7732, 0x2065,
00425   0x774b, 0x203a, 0x7765, 0x200f, 0x777e, 0x1fe3, 0x7797, 0x1fb7,
00426   0x77b0, 0x1f8c, 0x77c8, 0x1f60, 0x77e1, 0x1f34, 0x77f9, 0x1f08,
00427   0x7812, 0x1edc, 0x782a, 0x1eb0, 0x7842, 0x1e84, 0x785a, 0x1e58,
00428   0x7871, 0x1e2b, 0x7889, 0x1dff, 0x78a1, 0x1dd3, 0x78b8, 0x1da6,
00429   0x78cf, 0x1d79, 0x78e6, 0x1d4d, 0x78fd, 0x1d20, 0x7914, 0x1cf3,
00430   0x792b, 0x1cc6, 0x7941, 0x1c99, 0x7958, 0x1c6c, 0x796e, 0x1c3f,
00431   0x7984, 0x1c12, 0x799a, 0x1be5, 0x79b0, 0x1bb8, 0x79c5, 0x1b8a,
00432   0x79db, 0x1b5d, 0x79f0, 0x1b30, 0x7a06, 0x1b02, 0x7a1b, 0x1ad4,
00433   0x7a30, 0x1aa7, 0x7a45, 0x1a79, 0x7a59, 0x1a4b, 0x7a6e, 0x1a1d,
00434   0x7a82, 0x19ef, 0x7a97, 0x19c1, 0x7aab, 0x1993, 0x7abf, 0x1965,
00435   0x7ad3, 0x1937, 0x7ae6, 0x1909, 0x7afa, 0x18db, 0x7b0e, 0x18ac,
00436   0x7b21, 0x187e, 0x7b34, 0x184f, 0x7b47, 0x1821, 0x7b5a, 0x17f2,
00437   0x7b6d, 0x17c4, 0x7b7f, 0x1795, 0x7b92, 0x1766, 0x7ba4, 0x1737,
00438   0x7bb6, 0x1709, 0x7bc8, 0x16da, 0x7bda, 0x16ab, 0x7bec, 0x167c,
00439   0x7bfd, 0x164c, 0x7c0f, 0x161d, 0x7c20, 0x15ee, 0x7c31, 0x15bf,
00440   0x7c42, 0x1590, 0x7c53, 0x1560, 0x7c64, 0x1531, 0x7c74, 0x1501,
00441   0x7c85, 0x14d2, 0x7c95, 0x14a2, 0x7ca5, 0x1473, 0x7cb5, 0x1443,
00442   0x7cc5, 0x1413, 0x7cd5, 0x13e4, 0x7ce4, 0x13b4, 0x7cf4, 0x1384,
00443   0x7d03, 0x1354, 0x7d12, 0x1324, 0x7d21, 0x12f4, 0x7d30, 0x12c4,
00444   0x7d3f, 0x1294, 0x7d4d, 0x1264, 0x7d5b, 0x1234, 0x7d6a, 0x1204,
00445   0x7d78, 0x11d3, 0x7d86, 0x11a3, 0x7d93, 0x1173, 0x7da1, 0x1142,
00446   0x7daf, 0x1112, 0x7dbc, 0x10e1, 0x7dc9, 0x10b1, 0x7dd6, 0x1080,
00447   0x7de3, 0x1050, 0x7df0, 0x101f, 0x7dfc, 0xfee, 0x7e09, 0xfbe,
00448   0x7e15, 0xf8d, 0x7e21, 0xf5c, 0x7e2d, 0xf2b, 0x7e39, 0xefb,
00449   0x7e45, 0xeca, 0x7e50, 0xe99, 0x7e5c, 0xe68, 0x7e67, 0xe37,
00450   0x7e72, 0xe06, 0x7e7d, 0xdd5, 0x7e88, 0xda4, 0x7e92, 0xd72,
00451   0x7e9d, 0xd41, 0x7ea7, 0xd10, 0x7eb1, 0xcdf, 0x7ebb, 0xcae,
00452   0x7ec5, 0xc7c, 0x7ecf, 0xc4b, 0x7ed8, 0xc1a, 0x7ee2, 0xbe8,
00453   0x7eeb, 0xbb7, 0x7ef4, 0xb85, 0x7efd, 0xb54, 0x7f06, 0xb23,
00454   0x7f0f, 0xaf1, 0x7f17, 0xac0, 0x7f20, 0xa8e, 0x7f28, 0xa5c,
00455   0x7f30, 0xa2b, 0x7f38, 0x9f9, 0x7f40, 0x9c7, 0x7f47, 0x996,
00456   0x7f4f, 0x964, 0x7f56, 0x932, 0x7f5d, 0x901, 0x7f64, 0x8cf,
00457   0x7f6b, 0x89d, 0x7f72, 0x86b, 0x7f78, 0x839, 0x7f7f, 0x807,
00458   0x7f85, 0x7d6, 0x7f8b, 0x7a4, 0x7f91, 0x772, 0x7f97, 0x740,
00459   0x7f9c, 0x70e, 0x7fa2, 0x6dc, 0x7fa7, 0x6aa, 0x7fac, 0x678,
00460   0x7fb1, 0x646, 0x7fb6, 0x614, 0x7fbb, 0x5e2, 0x7fbf, 0x5b0,
00461   0x7fc4, 0x57e, 0x7fc8, 0x54c, 0x7fcc, 0x51a, 0x7fd0, 0x4e7,
00462   0x7fd4, 0x4b5, 0x7fd7, 0x483, 0x7fdb, 0x451, 0x7fde, 0x41f,
00463   0x7fe1, 0x3ed, 0x7fe4, 0x3bb, 0x7fe7, 0x388, 0x7fea, 0x356,
00464   0x7fec, 0x324, 0x7fef, 0x2f2, 0x7ff1, 0x2c0, 0x7ff3, 0x28d,
00465   0x7ff5, 0x25b, 0x7ff7, 0x229, 0x7ff8, 0x1f7, 0x7ffa, 0x1c4,
00466   0x7ffb, 0x192, 0x7ffc, 0x160, 0x7ffd, 0x12e, 0x7ffe, 0xfb,
00467   0x7fff, 0xc9, 0x7fff, 0x97, 0x7fff, 0x65, 0x7fff, 0x32,
00468   0x7fff, 0x0, 0x7fff, 0xffce, 0x7fff, 0xff9b, 0x7fff, 0xff69,
00469   0x7fff, 0xff37, 0x7ffe, 0xff05, 0x7ffd, 0xfed2, 0x7ffc, 0xfea0,
00470   0x7ffb, 0xfe6e, 0x7ffa, 0xfe3c, 0x7ff8, 0xfe09, 0x7ff7, 0xfdd7,
00471   0x7ff5, 0xfda5, 0x7ff3, 0xfd73, 0x7ff1, 0xfd40, 0x7fef, 0xfd0e,
00472   0x7fec, 0xfcdc, 0x7fea, 0xfcaa, 0x7fe7, 0xfc78, 0x7fe4, 0xfc45,
00473   0x7fe1, 0xfc13, 0x7fde, 0xfbe1, 0x7fdb, 0xfbaf, 0x7fd7, 0xfb7d,
00474   0x7fd4, 0xfb4b, 0x7fd0, 0xfb19, 0x7fcc, 0xfae6, 0x7fc8, 0xfab4,
00475   0x7fc4, 0xfa82, 0x7fbf, 0xfa50, 0x7fbb, 0xfa1e, 0x7fb6, 0xf9ec,
00476   0x7fb1, 0xf9ba, 0x7fac, 0xf988, 0x7fa7, 0xf956, 0x7fa2, 0xf924,
00477   0x7f9c, 0xf8f2, 0x7f97, 0xf8c0, 0x7f91, 0xf88e, 0x7f8b, 0xf85c,
00478   0x7f85, 0xf82a, 0x7f7f, 0xf7f9, 0x7f78, 0xf7c7, 0x7f72, 0xf795,
00479   0x7f6b, 0xf763, 0x7f64, 0xf731, 0x7f5d, 0xf6ff, 0x7f56, 0xf6ce,
00480   0x7f4f, 0xf69c, 0x7f47, 0xf66a, 0x7f40, 0xf639, 0x7f38, 0xf607,
00481   0x7f30, 0xf5d5, 0x7f28, 0xf5a4, 0x7f20, 0xf572, 0x7f17, 0xf540,
00482   0x7f0f, 0xf50f, 0x7f06, 0xf4dd, 0x7efd, 0xf4ac, 0x7ef4, 0xf47b,
00483   0x7eeb, 0xf449, 0x7ee2, 0xf418, 0x7ed8, 0xf3e6, 0x7ecf, 0xf3b5,
00484   0x7ec5, 0xf384, 0x7ebb, 0xf352, 0x7eb1, 0xf321, 0x7ea7, 0xf2f0,
00485   0x7e9d, 0xf2bf, 0x7e92, 0xf28e, 0x7e88, 0xf25c, 0x7e7d, 0xf22b,
00486   0x7e72, 0xf1fa, 0x7e67, 0xf1c9, 0x7e5c, 0xf198, 0x7e50, 0xf167,
00487   0x7e45, 0xf136, 0x7e39, 0xf105, 0x7e2d, 0xf0d5, 0x7e21, 0xf0a4,
00488   0x7e15, 0xf073, 0x7e09, 0xf042, 0x7dfc, 0xf012, 0x7df0, 0xefe1,
00489   0x7de3, 0xefb0, 0x7dd6, 0xef80, 0x7dc9, 0xef4f, 0x7dbc, 0xef1f,
00490   0x7daf, 0xeeee, 0x7da1, 0xeebe, 0x7d93, 0xee8d, 0x7d86, 0xee5d,
00491   0x7d78, 0xee2d, 0x7d6a, 0xedfc, 0x7d5b, 0xedcc, 0x7d4d, 0xed9c,
00492   0x7d3f, 0xed6c, 0x7d30, 0xed3c, 0x7d21, 0xed0c, 0x7d12, 0xecdc,
00493   0x7d03, 0xecac, 0x7cf4, 0xec7c, 0x7ce4, 0xec4c, 0x7cd5, 0xec1c,
00494   0x7cc5, 0xebed, 0x7cb5, 0xebbd, 0x7ca5, 0xeb8d, 0x7c95, 0xeb5e,
00495   0x7c85, 0xeb2e, 0x7c74, 0xeaff, 0x7c64, 0xeacf, 0x7c53, 0xeaa0,
00496   0x7c42, 0xea70, 0x7c31, 0xea41, 0x7c20, 0xea12, 0x7c0f, 0xe9e3,
00497   0x7bfd, 0xe9b4, 0x7bec, 0xe984, 0x7bda, 0xe955, 0x7bc8, 0xe926,
00498   0x7bb6, 0xe8f7, 0x7ba4, 0xe8c9, 0x7b92, 0xe89a, 0x7b7f, 0xe86b,
00499   0x7b6d, 0xe83c, 0x7b5a, 0xe80e, 0x7b47, 0xe7df, 0x7b34, 0xe7b1,
00500   0x7b21, 0xe782, 0x7b0e, 0xe754, 0x7afa, 0xe725, 0x7ae6, 0xe6f7,
00501   0x7ad3, 0xe6c9, 0x7abf, 0xe69b, 0x7aab, 0xe66d, 0x7a97, 0xe63f,
00502   0x7a82, 0xe611, 0x7a6e, 0xe5e3, 0x7a59, 0xe5b5, 0x7a45, 0xe587,
00503   0x7a30, 0xe559, 0x7a1b, 0xe52c, 0x7a06, 0xe4fe, 0x79f0, 0xe4d0,
00504   0x79db, 0xe4a3, 0x79c5, 0xe476, 0x79b0, 0xe448, 0x799a, 0xe41b,
00505   0x7984, 0xe3ee, 0x796e, 0xe3c1, 0x7958, 0xe394, 0x7941, 0xe367,
00506   0x792b, 0xe33a, 0x7914, 0xe30d, 0x78fd, 0xe2e0, 0x78e6, 0xe2b3,
00507   0x78cf, 0xe287, 0x78b8, 0xe25a, 0x78a1, 0xe22d, 0x7889, 0xe201,
00508   0x7871, 0xe1d5, 0x785a, 0xe1a8, 0x7842, 0xe17c, 0x782a, 0xe150,
00509   0x7812, 0xe124, 0x77f9, 0xe0f8, 0x77e1, 0xe0cc, 0x77c8, 0xe0a0,
00510   0x77b0, 0xe074, 0x7797, 0xe049, 0x777e, 0xe01d, 0x7765, 0xdff1,
00511   0x774b, 0xdfc6, 0x7732, 0xdf9b, 0x7718, 0xdf6f, 0x76ff, 0xdf44,
00512   0x76e5, 0xdf19, 0x76cb, 0xdeee, 0x76b1, 0xdec3, 0x7697, 0xde98,
00513   0x767d, 0xde6d, 0x7662, 0xde42, 0x7648, 0xde18, 0x762d, 0xdded,
00514   0x7612, 0xddc3, 0x75f7, 0xdd98, 0x75dc, 0xdd6e, 0x75c1, 0xdd44,
00515   0x75a5, 0xdd19, 0x758a, 0xdcef, 0x756e, 0xdcc5, 0x7553, 0xdc9b,
00516   0x7537, 0xdc72, 0x751b, 0xdc48, 0x74ff, 0xdc1e, 0x74e2, 0xdbf5,
00517   0x74c6, 0xdbcb, 0x74aa, 0xdba2, 0x748d, 0xdb78, 0x7470, 0xdb4f,
00518   0x7453, 0xdb26, 0x7436, 0xdafd, 0x7419, 0xdad4, 0x73fc, 0xdaab,
00519   0x73df, 0xda82, 0x73c1, 0xda5a, 0x73a3, 0xda31, 0x7386, 0xda08,
00520   0x7368, 0xd9e0, 0x734a, 0xd9b8, 0x732c, 0xd98f, 0x730d, 0xd967,
00521   0x72ef, 0xd93f, 0x72d0, 0xd917, 0x72b2, 0xd8ef, 0x7293, 0xd8c8,
00522   0x7274, 0xd8a0, 0x7255, 0xd878, 0x7236, 0xd851, 0x7217, 0xd82a,
00523   0x71f8, 0xd802, 0x71d8, 0xd7db, 0x71b9, 0xd7b4, 0x7199, 0xd78d,
00524   0x7179, 0xd766, 0x7159, 0xd73f, 0x7139, 0xd719, 0x7119, 0xd6f2,
00525   0x70f9, 0xd6cb, 0x70d8, 0xd6a5, 0x70b8, 0xd67f, 0x7097, 0xd659,
00526   0x7076, 0xd632, 0x7055, 0xd60c, 0x7034, 0xd5e6, 0x7013, 0xd5c1,
00527   0x6ff2, 0xd59b, 0x6fd0, 0xd575, 0x6faf, 0xd550, 0x6f8d, 0xd52a,
00528   0x6f6c, 0xd505, 0x6f4a, 0xd4e0, 0x6f28, 0xd4bb, 0x6f06, 0xd496,
00529   0x6ee4, 0xd471, 0x6ec2, 0xd44c, 0x6e9f, 0xd428, 0x6e7d, 0xd403,
00530   0x6e5a, 0xd3df, 0x6e37, 0xd3ba, 0x6e15, 0xd396, 0x6df2, 0xd372,
00531   0x6dcf, 0xd34e, 0x6dab, 0xd32a, 0x6d88, 0xd306, 0x6d65, 0xd2e2,
00532   0x6d41, 0xd2bf, 0x6d1e, 0xd29b, 0x6cfa, 0xd278, 0x6cd6, 0xd255,
00533   0x6cb2, 0xd231, 0x6c8e, 0xd20e, 0x6c6a, 0xd1eb, 0x6c46, 0xd1c9,
00534   0x6c21, 0xd1a6, 0x6bfd, 0xd183, 0x6bd8, 0xd161, 0x6bb4, 0xd13e,
00535   0x6b8f, 0xd11c, 0x6b6a, 0xd0fa, 0x6b45, 0xd0d8, 0x6b20, 0xd0b6,
00536   0x6afb, 0xd094, 0x6ad6, 0xd073, 0x6ab0, 0xd051, 0x6a8b, 0xd030,
00537   0x6a65, 0xd00e, 0x6a3f, 0xcfed, 0x6a1a, 0xcfcc, 0x69f4, 0xcfab,
00538   0x69ce, 0xcf8a, 0x69a7, 0xcf69, 0x6981, 0xcf48, 0x695b, 0xcf28,
00539   0x6935, 0xcf07, 0x690e, 0xcee7, 0x68e7, 0xcec7, 0x68c1, 0xcea7,
00540   0x689a, 0xce87, 0x6873, 0xce67, 0x684c, 0xce47, 0x6825, 0xce28,
00541   0x67fe, 0xce08, 0x67d6, 0xcde9, 0x67af, 0xcdca, 0x6788, 0xcdab,
00542   0x6760, 0xcd8c, 0x6738, 0xcd6d, 0x6711, 0xcd4e, 0x66e9, 0xcd30,
00543   0x66c1, 0xcd11, 0x6699, 0xccf3, 0x6671, 0xccd4, 0x6648, 0xccb6,
00544   0x6620, 0xcc98, 0x65f8, 0xcc7a, 0x65cf, 0xcc5d, 0x65a6, 0xcc3f,
00545   0x657e, 0xcc21, 0x6555, 0xcc04, 0x652c, 0xcbe7, 0x6503, 0xcbca,
00546   0x64da, 0xcbad, 0x64b1, 0xcb90, 0x6488, 0xcb73, 0x645e, 0xcb56,
00547   0x6435, 0xcb3a, 0x640b, 0xcb1e, 0x63e2, 0xcb01, 0x63b8, 0xcae5,
00548   0x638e, 0xcac9, 0x6365, 0xcaad, 0x633b, 0xca92, 0x6311, 0xca76,
00549   0x62e7, 0xca5b, 0x62bc, 0xca3f, 0x6292, 0xca24, 0x6268, 0xca09,
00550   0x623d, 0xc9ee, 0x6213, 0xc9d3, 0x61e8, 0xc9b8, 0x61be, 0xc99e,
00551   0x6193, 0xc983, 0x6168, 0xc969, 0x613d, 0xc94f, 0x6112, 0xc935,
00552   0x60e7, 0xc91b, 0x60bc, 0xc901, 0x6091, 0xc8e8, 0x6065, 0xc8ce,
00553   0x603a, 0xc8b5, 0x600f, 0xc89b, 0x5fe3, 0xc882, 0x5fb7, 0xc869,
00554   0x5f8c, 0xc850, 0x5f60, 0xc838, 0x5f34, 0xc81f, 0x5f08, 0xc807,
00555   0x5edc, 0xc7ee, 0x5eb0, 0xc7d6, 0x5e84, 0xc7be, 0x5e58, 0xc7a6,
00556   0x5e2b, 0xc78f, 0x5dff, 0xc777, 0x5dd3, 0xc75f, 0x5da6, 0xc748,
00557   0x5d79, 0xc731, 0x5d4d, 0xc71a, 0x5d20, 0xc703, 0x5cf3, 0xc6ec,
00558   0x5cc6, 0xc6d5, 0x5c99, 0xc6bf, 0x5c6c, 0xc6a8, 0x5c3f, 0xc692,
00559   0x5c12, 0xc67c, 0x5be5, 0xc666, 0x5bb8, 0xc650, 0x5b8a, 0xc63b,
00560   0x5b5d, 0xc625, 0x5b30, 0xc610, 0x5b02, 0xc5fa, 0x5ad4, 0xc5e5,
00561   0x5aa7, 0xc5d0, 0x5a79, 0xc5bb, 0x5a4b, 0xc5a7, 0x5a1d, 0xc592,
00562   0x59ef, 0xc57e, 0x59c1, 0xc569, 0x5993, 0xc555, 0x5965, 0xc541,
00563   0x5937, 0xc52d, 0x5909, 0xc51a, 0x58db, 0xc506, 0x58ac, 0xc4f2,
00564   0x587e, 0xc4df, 0x584f, 0xc4cc, 0x5821, 0xc4b9, 0x57f2, 0xc4a6,
00565   0x57c4, 0xc493, 0x5795, 0xc481, 0x5766, 0xc46e, 0x5737, 0xc45c,
00566   0x5709, 0xc44a, 0x56da, 0xc438, 0x56ab, 0xc426, 0x567c, 0xc414,
00567   0x564c, 0xc403, 0x561d, 0xc3f1, 0x55ee, 0xc3e0, 0x55bf, 0xc3cf,
00568   0x5590, 0xc3be, 0x5560, 0xc3ad, 0x5531, 0xc39c, 0x5501, 0xc38c,
00569   0x54d2, 0xc37b, 0x54a2, 0xc36b, 0x5473, 0xc35b, 0x5443, 0xc34b,
00570   0x5413, 0xc33b, 0x53e4, 0xc32b, 0x53b4, 0xc31c, 0x5384, 0xc30c,
00571   0x5354, 0xc2fd, 0x5324, 0xc2ee, 0x52f4, 0xc2df, 0x52c4, 0xc2d0,
00572   0x5294, 0xc2c1, 0x5264, 0xc2b3, 0x5234, 0xc2a5, 0x5204, 0xc296,
00573   0x51d3, 0xc288, 0x51a3, 0xc27a, 0x5173, 0xc26d, 0x5142, 0xc25f,
00574   0x5112, 0xc251, 0x50e1, 0xc244, 0x50b1, 0xc237, 0x5080, 0xc22a,
00575   0x5050, 0xc21d, 0x501f, 0xc210, 0x4fee, 0xc204, 0x4fbe, 0xc1f7,
00576   0x4f8d, 0xc1eb, 0x4f5c, 0xc1df, 0x4f2b, 0xc1d3, 0x4efb, 0xc1c7,
00577   0x4eca, 0xc1bb, 0x4e99, 0xc1b0, 0x4e68, 0xc1a4, 0x4e37, 0xc199,
00578   0x4e06, 0xc18e, 0x4dd5, 0xc183, 0x4da4, 0xc178, 0x4d72, 0xc16e,
00579   0x4d41, 0xc163, 0x4d10, 0xc159, 0x4cdf, 0xc14f, 0x4cae, 0xc145,
00580   0x4c7c, 0xc13b, 0x4c4b, 0xc131, 0x4c1a, 0xc128, 0x4be8, 0xc11e,
00581   0x4bb7, 0xc115, 0x4b85, 0xc10c, 0x4b54, 0xc103, 0x4b23, 0xc0fa,
00582   0x4af1, 0xc0f1, 0x4ac0, 0xc0e9, 0x4a8e, 0xc0e0, 0x4a5c, 0xc0d8,
00583   0x4a2b, 0xc0d0, 0x49f9, 0xc0c8, 0x49c7, 0xc0c0, 0x4996, 0xc0b9,
00584   0x4964, 0xc0b1, 0x4932, 0xc0aa, 0x4901, 0xc0a3, 0x48cf, 0xc09c,
00585   0x489d, 0xc095, 0x486b, 0xc08e, 0x4839, 0xc088, 0x4807, 0xc081,
00586   0x47d6, 0xc07b, 0x47a4, 0xc075, 0x4772, 0xc06f, 0x4740, 0xc069,
00587   0x470e, 0xc064, 0x46dc, 0xc05e, 0x46aa, 0xc059, 0x4678, 0xc054,
00588   0x4646, 0xc04f, 0x4614, 0xc04a, 0x45e2, 0xc045, 0x45b0, 0xc041,
00589   0x457e, 0xc03c, 0x454c, 0xc038, 0x451a, 0xc034, 0x44e7, 0xc030,
00590   0x44b5, 0xc02c, 0x4483, 0xc029, 0x4451, 0xc025, 0x441f, 0xc022,
00591   0x43ed, 0xc01f, 0x43bb, 0xc01c, 0x4388, 0xc019, 0x4356, 0xc016,
00592   0x4324, 0xc014, 0x42f2, 0xc011, 0x42c0, 0xc00f, 0x428d, 0xc00d,
00593   0x425b, 0xc00b, 0x4229, 0xc009, 0x41f7, 0xc008, 0x41c4, 0xc006,
00594   0x4192, 0xc005, 0x4160, 0xc004, 0x412e, 0xc003, 0x40fb, 0xc002,
00595   0x40c9, 0xc001, 0x4097, 0xc001, 0x4065, 0xc000, 0x4032, 0xc000
00596 };
00597
00620 arm_status arm_rfft_init_q15(
00621   arm_rfft_instance_q15 * S,
00622   arm_cfft_radix4_instance_q15 * S_CFFT,
00623   uint32_t fftLenReal,
00624   uint32_t ifftFlagR,
00625   uint32_t bitReverseFlag)
00626 {
00627
00628   /*  Initialise the default arm status */
00629   arm_status status = ARM_MATH_SUCCESS;
00630
00631   /*  Initialize the Real FFT length */
00632   S->fftLenReal = (uint16_t) fftLenReal;
00633
00634   /*  Initialize the Complex FFT length */
00635   S->fftLenBy2 = (uint16_t) fftLenReal / 2u;
00636
00637   /*  Initialize the Twiddle coefficientA pointer */
00638   S->pTwiddleAReal = (q15_t *) realCoefAQ15;
00639
00640   /*  Initialize the Twiddle coefficientB pointer */
00641   S->pTwiddleBReal = (q15_t *) realCoefBQ15;
00642
00643   /*  Initialize the Flag for selection of RFFT or RIFFT */
00644   S->ifftFlagR = (uint8_t) ifftFlagR;
00645
00646   /*  Initialize the Flag for calculation Bit reversal or not */
00647   S->bitReverseFlagR = (uint8_t) bitReverseFlag;
00648
00649   /*  Initialization of coef modifier depending on the FFT length */
00650   switch (S->fftLenReal)
00651   {
00652   case 2048u:
00653     S->twidCoefRModifier = 1u;
00654     break;
00655   case 512u:
00656     S->twidCoefRModifier = 4u;
00657     break;
00658   case 128u:
00659     S->twidCoefRModifier = 16u;
00660     break;
00661   default:
00662     /*  Reporting argument error if rfftSize is not valid value */
00663     status = ARM_MATH_ARGUMENT_ERROR;
00664     break;
00665   }
00666
00667   /* Init Complex FFT Instance */
00668   S->pCfft = S_CFFT;
00669
00670   if(S->ifftFlagR)
00671   {
00672     /* Initializes the CIFFT Module for fftLenreal/2 length */
00673     arm_cfft_radix4_init_q15(S->pCfft, S->fftLenBy2, 1u, 1u);
00674   }
00675   else
00676   {
00677     /* Initializes the CFFT Module for fftLenreal/2 length */
00678     arm_cfft_radix4_init_q15(S->pCfft, S->fftLenBy2, 0u, 1u);
00679   }
00680
00681   /* return the status of RFFT Init function */
00682   return (status);
00683
00684 }
00685
Generated on Mon Nov 28 2011 11:14:40 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_rfft_init_q31.c
00009 *
00010 * Description:  RFFT & RIFFT Q31 initialisation function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00060 const q31_t realCoefAQ31[1024] = {
00061   0x40000000, 0xc0000000, 0x3f9b783c, 0xc0004ef5,
00062   0x3f36f170, 0xc0013bd3, 0x3ed26c94, 0xc002c697,
00063   0x3e6deaa1, 0xc004ef3f, 0x3e096c8d, 0xc007b5c4,
00064   0x3da4f351, 0xc00b1a20, 0x3d407fe6, 0xc00f1c4a,
00065   0x3cdc1342, 0xc013bc39, 0x3c77ae5e, 0xc018f9e1,
00066   0x3c135231, 0xc01ed535, 0x3baeffb3, 0xc0254e27,
00067   0x3b4ab7db, 0xc02c64a6, 0x3ae67ba2, 0xc03418a2,
00068   0x3a824bfd, 0xc03c6a07, 0x3a1e29e5, 0xc04558c0,
00069   0x39ba1651, 0xc04ee4b8, 0x39561237, 0xc0590dd8,
00070   0x38f21e8e, 0xc063d405, 0x388e3c4d, 0xc06f3726,
00071   0x382a6c6a, 0xc07b371e, 0x37c6afdc, 0xc087d3d0,
00072   0x37630799, 0xc0950d1d, 0x36ff7496, 0xc0a2e2e3,
00073   0x369bf7c9, 0xc0b15502, 0x36389228, 0xc0c06355,
00074   0x35d544a7, 0xc0d00db6, 0x3572103d, 0xc0e05401,
00075   0x350ef5de, 0xc0f1360b, 0x34abf67e, 0xc102b3ac,
00076   0x34491311, 0xc114ccb9, 0x33e64c8c, 0xc1278104,
00077   0x3383a3e2, 0xc13ad060, 0x33211a07, 0xc14eba9d,
00078   0x32beafed, 0xc1633f8a, 0x325c6688, 0xc1785ef4,
00079   0x31fa3ecb, 0xc18e18a7, 0x319839a6, 0xc1a46c6e,
00080   0x3136580d, 0xc1bb5a11, 0x30d49af1, 0xc1d2e158,
00081   0x30730342, 0xc1eb0209, 0x301191f3, 0xc203bbe8,
00082   0x2fb047f2, 0xc21d0eb8, 0x2f4f2630, 0xc236fa3b,
00083   0x2eee2d9d, 0xc2517e31, 0x2e8d5f29, 0xc26c9a58,
00084   0x2e2cbbc1, 0xc2884e6e, 0x2dcc4454, 0xc2a49a2e,
00085   0x2d6bf9d1, 0xc2c17d52, 0x2d0bdd25, 0xc2def794,
00086   0x2cabef3d, 0xc2fd08a9, 0x2c4c3106, 0xc31bb049,
00087   0x2beca36c, 0xc33aee27, 0x2b8d475b, 0xc35ac1f7,
00088   0x2b2e1dbe, 0xc37b2b6a, 0x2acf277f, 0xc39c2a2f,
00089   0x2a70658a, 0xc3bdbdf6, 0x2a11d8c8, 0xc3dfe66c,
00090   0x29b38223, 0xc402a33c, 0x29556282, 0xc425f410,
00091   0x28f77acf, 0xc449d892, 0x2899cbf1, 0xc46e5069,
00092   0x283c56cf, 0xc4935b3c, 0x27df1c50, 0xc4b8f8ad,
00093   0x27821d59, 0xc4df2862, 0x27255ad1, 0xc505e9fb,
00094   0x26c8d59c, 0xc52d3d18, 0x266c8e9f, 0xc555215a,
00095   0x261086bc, 0xc57d965d, 0x25b4bed8, 0xc5a69bbe,
00096   0x255937d5, 0xc5d03118, 0x24fdf294, 0xc5fa5603,
00097   0x24a2eff6, 0xc6250a18, 0x244830dd, 0xc6504ced,
00098   0x23edb628, 0xc67c1e18, 0x239380b6, 0xc6a87d2d,
00099   0x23399167, 0xc6d569be, 0x22dfe917, 0xc702e35c,
00100   0x228688a4, 0xc730e997, 0x222d70eb, 0xc75f7bfe,
00101   0x21d4a2c8, 0xc78e9a1d, 0x217c1f15, 0xc7be4381,
00102   0x2123e6ad, 0xc7ee77b3, 0x20cbfa6a, 0xc81f363d,
00103   0x20745b24, 0xc8507ea7, 0x201d09b4, 0xc8825077,
00104   0x1fc606f1, 0xc8b4ab32, 0x1f6f53b3, 0xc8e78e5b,
00105   0x1f18f0ce, 0xc91af976, 0x1ec2df18, 0xc94eec03,
00106   0x1e6d1f65, 0xc9836582, 0x1e17b28a, 0xc9b86572,
00107   0x1dc29958, 0xc9edeb50, 0x1d6dd4a2, 0xca23f698,
00108   0x1d196538, 0xca5a86c4, 0x1cc54bec, 0xca919b4e,
00109   0x1c71898d, 0xcac933ae, 0x1c1e1ee9, 0xcb014f5b,
00110   0x1bcb0cce, 0xcb39edca, 0x1b785409, 0xcb730e70,
00111   0x1b25f566, 0xcbacb0bf, 0x1ad3f1b1, 0xcbe6d42b,
00112   0x1a8249b4, 0xcc217822, 0x1a30fe38, 0xcc5c9c14,
00113   0x19e01006, 0xcc983f70, 0x198f7fe6, 0xccd461a2,
00114   0x193f4e9e, 0xcd110216, 0x18ef7cf4, 0xcd4e2037,
00115   0x18a00bae, 0xcd8bbb6d, 0x1850fb8e, 0xcdc9d320,
00116   0x18024d59, 0xce0866b8, 0x17b401d1, 0xce47759a,
00117   0x176619b6, 0xce86ff2a, 0x171895c9, 0xcec702cb,
00118   0x16cb76c9, 0xcf077fe1, 0x167ebd74, 0xcf4875ca,
00119   0x16326a88, 0xcf89e3e8, 0x15e67ec1, 0xcfcbc999,
00120   0x159afadb, 0xd00e2639, 0x154fdf8f, 0xd050f926,
00121   0x15052d97, 0xd09441bb, 0x14bae5ab, 0xd0d7ff51,
00122   0x14710883, 0xd11c3142, 0x142796d5, 0xd160d6e5,
00123   0x13de9156, 0xd1a5ef90, 0x1395f8ba, 0xd1eb7a9a,
00124   0x134dcdb4, 0xd2317756, 0x130610f7, 0xd277e518,
00125   0x12bec333, 0xd2bec333, 0x1277e518, 0xd30610f7,
00126   0x12317756, 0xd34dcdb4, 0x11eb7a9a, 0xd395f8ba,
00127   0x11a5ef90, 0xd3de9156, 0x1160d6e5, 0xd42796d5,
00128   0x111c3142, 0xd4710883, 0x10d7ff51, 0xd4bae5ab,
00129   0x109441bb, 0xd5052d97, 0x1050f926, 0xd54fdf8f,
00130   0x100e2639, 0xd59afadb, 0xfcbc999, 0xd5e67ec1,
00131   0xf89e3e8, 0xd6326a88, 0xf4875ca, 0xd67ebd74,
00132   0xf077fe1, 0xd6cb76c9, 0xec702cb, 0xd71895c9,
00133   0xe86ff2a, 0xd76619b6, 0xe47759a, 0xd7b401d1,
00134   0xe0866b8, 0xd8024d59, 0xdc9d320, 0xd850fb8e,
00135   0xd8bbb6d, 0xd8a00bae, 0xd4e2037, 0xd8ef7cf4,
00136   0xd110216, 0xd93f4e9e, 0xcd461a2, 0xd98f7fe6,
00137   0xc983f70, 0xd9e01006, 0xc5c9c14, 0xda30fe38,
00138   0xc217822, 0xda8249b4, 0xbe6d42b, 0xdad3f1b1,
00139   0xbacb0bf, 0xdb25f566, 0xb730e70, 0xdb785409,
00140   0xb39edca, 0xdbcb0cce, 0xb014f5b, 0xdc1e1ee9,
00141   0xac933ae, 0xdc71898d, 0xa919b4e, 0xdcc54bec,
00142   0xa5a86c4, 0xdd196538, 0xa23f698, 0xdd6dd4a2,
00143   0x9edeb50, 0xddc29958, 0x9b86572, 0xde17b28a,
00144   0x9836582, 0xde6d1f65, 0x94eec03, 0xdec2df18,
00145   0x91af976, 0xdf18f0ce, 0x8e78e5b, 0xdf6f53b3,
00146   0x8b4ab32, 0xdfc606f1, 0x8825077, 0xe01d09b4,
00147   0x8507ea7, 0xe0745b24, 0x81f363d, 0xe0cbfa6a,
00148   0x7ee77b3, 0xe123e6ad, 0x7be4381, 0xe17c1f15,
00149   0x78e9a1d, 0xe1d4a2c8, 0x75f7bfe, 0xe22d70eb,
00150   0x730e997, 0xe28688a4, 0x702e35c, 0xe2dfe917,
00151   0x6d569be, 0xe3399167, 0x6a87d2d, 0xe39380b6,
00152   0x67c1e18, 0xe3edb628, 0x6504ced, 0xe44830dd,
00153   0x6250a18, 0xe4a2eff6, 0x5fa5603, 0xe4fdf294,
00154   0x5d03118, 0xe55937d5, 0x5a69bbe, 0xe5b4bed8,
00155   0x57d965d, 0xe61086bc, 0x555215a, 0xe66c8e9f,
00156   0x52d3d18, 0xe6c8d59c, 0x505e9fb, 0xe7255ad1,
00157   0x4df2862, 0xe7821d59, 0x4b8f8ad, 0xe7df1c50,
00158   0x4935b3c, 0xe83c56cf, 0x46e5069, 0xe899cbf1,
00159   0x449d892, 0xe8f77acf, 0x425f410, 0xe9556282,
00160   0x402a33c, 0xe9b38223, 0x3dfe66c, 0xea11d8c8,
00161   0x3bdbdf6, 0xea70658a, 0x39c2a2f, 0xeacf277f,
00162   0x37b2b6a, 0xeb2e1dbe, 0x35ac1f7, 0xeb8d475b,
00163   0x33aee27, 0xebeca36c, 0x31bb049, 0xec4c3106,
00164   0x2fd08a9, 0xecabef3d, 0x2def794, 0xed0bdd25,
00165   0x2c17d52, 0xed6bf9d1, 0x2a49a2e, 0xedcc4454,
00166   0x2884e6e, 0xee2cbbc1, 0x26c9a58, 0xee8d5f29,
00167   0x2517e31, 0xeeee2d9d, 0x236fa3b, 0xef4f2630,
00168   0x21d0eb8, 0xefb047f2, 0x203bbe8, 0xf01191f3,
00169   0x1eb0209, 0xf0730342, 0x1d2e158, 0xf0d49af1,
00170   0x1bb5a11, 0xf136580d, 0x1a46c6e, 0xf19839a6,
00171   0x18e18a7, 0xf1fa3ecb, 0x1785ef4, 0xf25c6688,
00172   0x1633f8a, 0xf2beafed, 0x14eba9d, 0xf3211a07,
00173   0x13ad060, 0xf383a3e2, 0x1278104, 0xf3e64c8c,
00174   0x114ccb9, 0xf4491311, 0x102b3ac, 0xf4abf67e,
00175   0xf1360b, 0xf50ef5de, 0xe05401, 0xf572103d,
00176   0xd00db6, 0xf5d544a7, 0xc06355, 0xf6389228,
00177   0xb15502, 0xf69bf7c9, 0xa2e2e3, 0xf6ff7496,
00178   0x950d1d, 0xf7630799, 0x87d3d0, 0xf7c6afdc,
00179   0x7b371e, 0xf82a6c6a, 0x6f3726, 0xf88e3c4d,
00180   0x63d405, 0xf8f21e8e, 0x590dd8, 0xf9561237,
00181   0x4ee4b8, 0xf9ba1651, 0x4558c0, 0xfa1e29e5,
00182   0x3c6a07, 0xfa824bfd, 0x3418a2, 0xfae67ba2,
00183   0x2c64a6, 0xfb4ab7db, 0x254e27, 0xfbaeffb3,
00184   0x1ed535, 0xfc135231, 0x18f9e1, 0xfc77ae5e,
00185   0x13bc39, 0xfcdc1342, 0xf1c4a, 0xfd407fe6,
00186   0xb1a20, 0xfda4f351, 0x7b5c4, 0xfe096c8d,
00187   0x4ef3f, 0xfe6deaa1, 0x2c697, 0xfed26c94,
00188   0x13bd3, 0xff36f170, 0x4ef5, 0xff9b783c,
00189   0x0, 0x0, 0x4ef5, 0x6487c4,
00190   0x13bd3, 0xc90e90, 0x2c697, 0x12d936c,
00191   0x4ef3f, 0x192155f, 0x7b5c4, 0x1f69373,
00192   0xb1a20, 0x25b0caf, 0xf1c4a, 0x2bf801a,
00193   0x13bc39, 0x323ecbe, 0x18f9e1, 0x38851a2,
00194   0x1ed535, 0x3ecadcf, 0x254e27, 0x451004d,
00195   0x2c64a6, 0x4b54825, 0x3418a2, 0x519845e,
00196   0x3c6a07, 0x57db403, 0x4558c0, 0x5e1d61b,
00197   0x4ee4b8, 0x645e9af, 0x590dd8, 0x6a9edc9,
00198   0x63d405, 0x70de172, 0x6f3726, 0x771c3b3,
00199   0x7b371e, 0x7d59396, 0x87d3d0, 0x8395024,
00200   0x950d1d, 0x89cf867, 0xa2e2e3, 0x9008b6a,
00201   0xb15502, 0x9640837, 0xc06355, 0x9c76dd8,
00202   0xd00db6, 0xa2abb59, 0xe05401, 0xa8defc3,
00203   0xf1360b, 0xaf10a22, 0x102b3ac, 0xb540982,
00204   0x114ccb9, 0xbb6ecef, 0x1278104, 0xc19b374,
00205   0x13ad060, 0xc7c5c1e, 0x14eba9d, 0xcdee5f9,
00206   0x1633f8a, 0xd415013, 0x1785ef4, 0xda39978,
00207   0x18e18a7, 0xe05c135, 0x1a46c6e, 0xe67c65a,
00208   0x1bb5a11, 0xec9a7f3, 0x1d2e158, 0xf2b650f,
00209   0x1eb0209, 0xf8cfcbe, 0x203bbe8, 0xfee6e0d,
00210   0x21d0eb8, 0x104fb80e, 0x236fa3b, 0x10b0d9d0,
00211   0x2517e31, 0x1111d263, 0x26c9a58, 0x1172a0d7,
00212   0x2884e6e, 0x11d3443f, 0x2a49a2e, 0x1233bbac,
00213   0x2c17d52, 0x1294062f, 0x2def794, 0x12f422db,
00214   0x2fd08a9, 0x135410c3, 0x31bb049, 0x13b3cefa,
00215   0x33aee27, 0x14135c94, 0x35ac1f7, 0x1472b8a5,
00216   0x37b2b6a, 0x14d1e242, 0x39c2a2f, 0x1530d881,
00217   0x3bdbdf6, 0x158f9a76, 0x3dfe66c, 0x15ee2738,
00218   0x402a33c, 0x164c7ddd, 0x425f410, 0x16aa9d7e,
00219   0x449d892, 0x17088531, 0x46e5069, 0x1766340f,
00220   0x4935b3c, 0x17c3a931, 0x4b8f8ad, 0x1820e3b0,
00221   0x4df2862, 0x187de2a7, 0x505e9fb, 0x18daa52f,
00222   0x52d3d18, 0x19372a64, 0x555215a, 0x19937161,
00223   0x57d965d, 0x19ef7944, 0x5a69bbe, 0x1a4b4128,
00224   0x5d03118, 0x1aa6c82b, 0x5fa5603, 0x1b020d6c,
00225   0x6250a18, 0x1b5d100a, 0x6504ced, 0x1bb7cf23,
00226   0x67c1e18, 0x1c1249d8, 0x6a87d2d, 0x1c6c7f4a,
00227   0x6d569be, 0x1cc66e99, 0x702e35c, 0x1d2016e9,
00228   0x730e997, 0x1d79775c, 0x75f7bfe, 0x1dd28f15,
00229   0x78e9a1d, 0x1e2b5d38, 0x7be4381, 0x1e83e0eb,
00230   0x7ee77b3, 0x1edc1953, 0x81f363d, 0x1f340596,
00231   0x8507ea7, 0x1f8ba4dc, 0x8825077, 0x1fe2f64c,
00232   0x8b4ab32, 0x2039f90f, 0x8e78e5b, 0x2090ac4d,
00233   0x91af976, 0x20e70f32, 0x94eec03, 0x213d20e8,
00234   0x9836582, 0x2192e09b, 0x9b86572, 0x21e84d76,
00235   0x9edeb50, 0x223d66a8, 0xa23f698, 0x22922b5e,
00236   0xa5a86c4, 0x22e69ac8, 0xa919b4e, 0x233ab414,
00237   0xac933ae, 0x238e7673, 0xb014f5b, 0x23e1e117,
00238   0xb39edca, 0x2434f332, 0xb730e70, 0x2487abf7,
00239   0xbacb0bf, 0x24da0a9a, 0xbe6d42b, 0x252c0e4f,
00240   0xc217822, 0x257db64c, 0xc5c9c14, 0x25cf01c8,
00241   0xc983f70, 0x261feffa, 0xcd461a2, 0x2670801a,
00242   0xd110216, 0x26c0b162, 0xd4e2037, 0x2710830c,
00243   0xd8bbb6d, 0x275ff452, 0xdc9d320, 0x27af0472,
00244   0xe0866b8, 0x27fdb2a7, 0xe47759a, 0x284bfe2f,
00245   0xe86ff2a, 0x2899e64a, 0xec702cb, 0x28e76a37,
00246   0xf077fe1, 0x29348937, 0xf4875ca, 0x2981428c,
00247   0xf89e3e8, 0x29cd9578, 0xfcbc999, 0x2a19813f,
00248   0x100e2639, 0x2a650525, 0x1050f926, 0x2ab02071,
00249   0x109441bb, 0x2afad269, 0x10d7ff51, 0x2b451a55,
00250   0x111c3142, 0x2b8ef77d, 0x1160d6e5, 0x2bd8692b,
00251   0x11a5ef90, 0x2c216eaa, 0x11eb7a9a, 0x2c6a0746,
00252   0x12317756, 0x2cb2324c, 0x1277e518, 0x2cf9ef09,
00253   0x12bec333, 0x2d413ccd, 0x130610f7, 0x2d881ae8,
00254   0x134dcdb4, 0x2dce88aa, 0x1395f8ba, 0x2e148566,
00255   0x13de9156, 0x2e5a1070, 0x142796d5, 0x2e9f291b,
00256   0x14710883, 0x2ee3cebe, 0x14bae5ab, 0x2f2800af,
00257   0x15052d97, 0x2f6bbe45, 0x154fdf8f, 0x2faf06da,
00258   0x159afadb, 0x2ff1d9c7, 0x15e67ec1, 0x30343667,
00259   0x16326a88, 0x30761c18, 0x167ebd74, 0x30b78a36,
00260   0x16cb76c9, 0x30f8801f, 0x171895c9, 0x3138fd35,
00261   0x176619b6, 0x317900d6, 0x17b401d1, 0x31b88a66,
00262   0x18024d59, 0x31f79948, 0x1850fb8e, 0x32362ce0,
00263   0x18a00bae, 0x32744493, 0x18ef7cf4, 0x32b1dfc9,
00264   0x193f4e9e, 0x32eefdea, 0x198f7fe6, 0x332b9e5e,
00265   0x19e01006, 0x3367c090, 0x1a30fe38, 0x33a363ec,
00266   0x1a8249b4, 0x33de87de, 0x1ad3f1b1, 0x34192bd5,
00267   0x1b25f566, 0x34534f41, 0x1b785409, 0x348cf190,
00268   0x1bcb0cce, 0x34c61236, 0x1c1e1ee9, 0x34feb0a5,
00269   0x1c71898d, 0x3536cc52, 0x1cc54bec, 0x356e64b2,
00270   0x1d196538, 0x35a5793c, 0x1d6dd4a2, 0x35dc0968,
00271   0x1dc29958, 0x361214b0, 0x1e17b28a, 0x36479a8e,
00272   0x1e6d1f65, 0x367c9a7e, 0x1ec2df18, 0x36b113fd,
00273   0x1f18f0ce, 0x36e5068a, 0x1f6f53b3, 0x371871a5,
00274   0x1fc606f1, 0x374b54ce, 0x201d09b4, 0x377daf89,
00275   0x20745b24, 0x37af8159, 0x20cbfa6a, 0x37e0c9c3,
00276   0x2123e6ad, 0x3811884d, 0x217c1f15, 0x3841bc7f,
00277   0x21d4a2c8, 0x387165e3, 0x222d70eb, 0x38a08402,
00278   0x228688a4, 0x38cf1669, 0x22dfe917, 0x38fd1ca4,
00279   0x23399167, 0x392a9642, 0x239380b6, 0x395782d3,
00280   0x23edb628, 0x3983e1e8, 0x244830dd, 0x39afb313,
00281   0x24a2eff6, 0x39daf5e8, 0x24fdf294, 0x3a05a9fd,
00282   0x255937d5, 0x3a2fcee8, 0x25b4bed8, 0x3a596442,
00283   0x261086bc, 0x3a8269a3, 0x266c8e9f, 0x3aaadea6,
00284   0x26c8d59c, 0x3ad2c2e8, 0x27255ad1, 0x3afa1605,
00285   0x27821d59, 0x3b20d79e, 0x27df1c50, 0x3b470753,
00286   0x283c56cf, 0x3b6ca4c4, 0x2899cbf1, 0x3b91af97,
00287   0x28f77acf, 0x3bb6276e, 0x29556282, 0x3bda0bf0,
00288   0x29b38223, 0x3bfd5cc4, 0x2a11d8c8, 0x3c201994,
00289   0x2a70658a, 0x3c42420a, 0x2acf277f, 0x3c63d5d1,
00290   0x2b2e1dbe, 0x3c84d496, 0x2b8d475b, 0x3ca53e09,
00291   0x2beca36c, 0x3cc511d9, 0x2c4c3106, 0x3ce44fb7,
00292   0x2cabef3d, 0x3d02f757, 0x2d0bdd25, 0x3d21086c,
00293   0x2d6bf9d1, 0x3d3e82ae, 0x2dcc4454, 0x3d5b65d2,
00294   0x2e2cbbc1, 0x3d77b192, 0x2e8d5f29, 0x3d9365a8,
00295   0x2eee2d9d, 0x3dae81cf, 0x2f4f2630, 0x3dc905c5,
00296   0x2fb047f2, 0x3de2f148, 0x301191f3, 0x3dfc4418,
00297   0x30730342, 0x3e14fdf7, 0x30d49af1, 0x3e2d1ea8,
00298   0x3136580d, 0x3e44a5ef, 0x319839a6, 0x3e5b9392,
00299   0x31fa3ecb, 0x3e71e759, 0x325c6688, 0x3e87a10c,
00300   0x32beafed, 0x3e9cc076, 0x33211a07, 0x3eb14563,
00301   0x3383a3e2, 0x3ec52fa0, 0x33e64c8c, 0x3ed87efc,
00302   0x34491311, 0x3eeb3347, 0x34abf67e, 0x3efd4c54,
00303   0x350ef5de, 0x3f0ec9f5, 0x3572103d, 0x3f1fabff,
00304   0x35d544a7, 0x3f2ff24a, 0x36389228, 0x3f3f9cab,
00305   0x369bf7c9, 0x3f4eaafe, 0x36ff7496, 0x3f5d1d1d,
00306   0x37630799, 0x3f6af2e3, 0x37c6afdc, 0x3f782c30,
00307   0x382a6c6a, 0x3f84c8e2, 0x388e3c4d, 0x3f90c8da,
00308   0x38f21e8e, 0x3f9c2bfb, 0x39561237, 0x3fa6f228,
00309   0x39ba1651, 0x3fb11b48, 0x3a1e29e5, 0x3fbaa740,
00310   0x3a824bfd, 0x3fc395f9, 0x3ae67ba2, 0x3fcbe75e,
00311   0x3b4ab7db, 0x3fd39b5a, 0x3baeffb3, 0x3fdab1d9,
00312   0x3c135231, 0x3fe12acb, 0x3c77ae5e, 0x3fe7061f,
00313   0x3cdc1342, 0x3fec43c7, 0x3d407fe6, 0x3ff0e3b6,
00314   0x3da4f351, 0x3ff4e5e0, 0x3e096c8d, 0x3ff84a3c,
00315   0x3e6deaa1, 0x3ffb10c1, 0x3ed26c94, 0x3ffd3969,
00316   0x3f36f170, 0x3ffec42d, 0x3f9b783c, 0x3fffb10b
00317 };
00318
00319
00336 const q31_t realCoefBQ31[1024] = {
00337   0x40000000, 0x40000000, 0x406487c4, 0x3fffb10b,
00338   0x40c90e90, 0x3ffec42d, 0x412d936c, 0x3ffd3969,
00339   0x4192155f, 0x3ffb10c1, 0x41f69373, 0x3ff84a3c,
00340   0x425b0caf, 0x3ff4e5e0, 0x42bf801a, 0x3ff0e3b6,
00341   0x4323ecbe, 0x3fec43c7, 0x438851a2, 0x3fe7061f,
00342   0x43ecadcf, 0x3fe12acb, 0x4451004d, 0x3fdab1d9,
00343   0x44b54825, 0x3fd39b5a, 0x4519845e, 0x3fcbe75e,
00344   0x457db403, 0x3fc395f9, 0x45e1d61b, 0x3fbaa740,
00345   0x4645e9af, 0x3fb11b48, 0x46a9edc9, 0x3fa6f228,
00346   0x470de172, 0x3f9c2bfb, 0x4771c3b3, 0x3f90c8da,
00347   0x47d59396, 0x3f84c8e2, 0x48395024, 0x3f782c30,
00348   0x489cf867, 0x3f6af2e3, 0x49008b6a, 0x3f5d1d1d,
00349   0x49640837, 0x3f4eaafe, 0x49c76dd8, 0x3f3f9cab,
00350   0x4a2abb59, 0x3f2ff24a, 0x4a8defc3, 0x3f1fabff,
00351   0x4af10a22, 0x3f0ec9f5, 0x4b540982, 0x3efd4c54,
00352   0x4bb6ecef, 0x3eeb3347, 0x4c19b374, 0x3ed87efc,
00353   0x4c7c5c1e, 0x3ec52fa0, 0x4cdee5f9, 0x3eb14563,
00354   0x4d415013, 0x3e9cc076, 0x4da39978, 0x3e87a10c,
00355   0x4e05c135, 0x3e71e759, 0x4e67c65a, 0x3e5b9392,
00356   0x4ec9a7f3, 0x3e44a5ef, 0x4f2b650f, 0x3e2d1ea8,
00357   0x4f8cfcbe, 0x3e14fdf7, 0x4fee6e0d, 0x3dfc4418,
00358   0x504fb80e, 0x3de2f148, 0x50b0d9d0, 0x3dc905c5,
00359   0x5111d263, 0x3dae81cf, 0x5172a0d7, 0x3d9365a8,
00360   0x51d3443f, 0x3d77b192, 0x5233bbac, 0x3d5b65d2,
00361   0x5294062f, 0x3d3e82ae, 0x52f422db, 0x3d21086c,
00362   0x535410c3, 0x3d02f757, 0x53b3cefa, 0x3ce44fb7,
00363   0x54135c94, 0x3cc511d9, 0x5472b8a5, 0x3ca53e09,
00364   0x54d1e242, 0x3c84d496, 0x5530d881, 0x3c63d5d1,
00365   0x558f9a76, 0x3c42420a, 0x55ee2738, 0x3c201994,
00366   0x564c7ddd, 0x3bfd5cc4, 0x56aa9d7e, 0x3bda0bf0,
00367   0x57088531, 0x3bb6276e, 0x5766340f, 0x3b91af97,
00368   0x57c3a931, 0x3b6ca4c4, 0x5820e3b0, 0x3b470753,
00369   0x587de2a7, 0x3b20d79e, 0x58daa52f, 0x3afa1605,
00370   0x59372a64, 0x3ad2c2e8, 0x59937161, 0x3aaadea6,
00371   0x59ef7944, 0x3a8269a3, 0x5a4b4128, 0x3a596442,
00372   0x5aa6c82b, 0x3a2fcee8, 0x5b020d6c, 0x3a05a9fd,
00373   0x5b5d100a, 0x39daf5e8, 0x5bb7cf23, 0x39afb313,
00374   0x5c1249d8, 0x3983e1e8, 0x5c6c7f4a, 0x395782d3,
00375   0x5cc66e99, 0x392a9642, 0x5d2016e9, 0x38fd1ca4,
00376   0x5d79775c, 0x38cf1669, 0x5dd28f15, 0x38a08402,
00377   0x5e2b5d38, 0x387165e3, 0x5e83e0eb, 0x3841bc7f,
00378   0x5edc1953, 0x3811884d, 0x5f340596, 0x37e0c9c3,
00379   0x5f8ba4dc, 0x37af8159, 0x5fe2f64c, 0x377daf89,
00380   0x6039f90f, 0x374b54ce, 0x6090ac4d, 0x371871a5,
00381   0x60e70f32, 0x36e5068a, 0x613d20e8, 0x36b113fd,
00382   0x6192e09b, 0x367c9a7e, 0x61e84d76, 0x36479a8e,
00383   0x623d66a8, 0x361214b0, 0x62922b5e, 0x35dc0968,
00384   0x62e69ac8, 0x35a5793c, 0x633ab414, 0x356e64b2,
00385   0x638e7673, 0x3536cc52, 0x63e1e117, 0x34feb0a5,
00386   0x6434f332, 0x34c61236, 0x6487abf7, 0x348cf190,
00387   0x64da0a9a, 0x34534f41, 0x652c0e4f, 0x34192bd5,
00388   0x657db64c, 0x33de87de, 0x65cf01c8, 0x33a363ec,
00389   0x661feffa, 0x3367c090, 0x6670801a, 0x332b9e5e,
00390   0x66c0b162, 0x32eefdea, 0x6710830c, 0x32b1dfc9,
00391   0x675ff452, 0x32744493, 0x67af0472, 0x32362ce0,
00392   0x67fdb2a7, 0x31f79948, 0x684bfe2f, 0x31b88a66,
00393   0x6899e64a, 0x317900d6, 0x68e76a37, 0x3138fd35,
00394   0x69348937, 0x30f8801f, 0x6981428c, 0x30b78a36,
00395   0x69cd9578, 0x30761c18, 0x6a19813f, 0x30343667,
00396   0x6a650525, 0x2ff1d9c7, 0x6ab02071, 0x2faf06da,
00397   0x6afad269, 0x2f6bbe45, 0x6b451a55, 0x2f2800af,
00398   0x6b8ef77d, 0x2ee3cebe, 0x6bd8692b, 0x2e9f291b,
00399   0x6c216eaa, 0x2e5a1070, 0x6c6a0746, 0x2e148566,
00400   0x6cb2324c, 0x2dce88aa, 0x6cf9ef09, 0x2d881ae8,
00401   0x6d413ccd, 0x2d413ccd, 0x6d881ae8, 0x2cf9ef09,
00402   0x6dce88aa, 0x2cb2324c, 0x6e148566, 0x2c6a0746,
00403   0x6e5a1070, 0x2c216eaa, 0x6e9f291b, 0x2bd8692b,
00404   0x6ee3cebe, 0x2b8ef77d, 0x6f2800af, 0x2b451a55,
00405   0x6f6bbe45, 0x2afad269, 0x6faf06da, 0x2ab02071,
00406   0x6ff1d9c7, 0x2a650525, 0x70343667, 0x2a19813f,
00407   0x70761c18, 0x29cd9578, 0x70b78a36, 0x2981428c,
00408   0x70f8801f, 0x29348937, 0x7138fd35, 0x28e76a37,
00409   0x717900d6, 0x2899e64a, 0x71b88a66, 0x284bfe2f,
00410   0x71f79948, 0x27fdb2a7, 0x72362ce0, 0x27af0472,
00411   0x72744493, 0x275ff452, 0x72b1dfc9, 0x2710830c,
00412   0x72eefdea, 0x26c0b162, 0x732b9e5e, 0x2670801a,
00413   0x7367c090, 0x261feffa, 0x73a363ec, 0x25cf01c8,
00414   0x73de87de, 0x257db64c, 0x74192bd5, 0x252c0e4f,
00415   0x74534f41, 0x24da0a9a, 0x748cf190, 0x2487abf7,
00416   0x74c61236, 0x2434f332, 0x74feb0a5, 0x23e1e117,
00417   0x7536cc52, 0x238e7673, 0x756e64b2, 0x233ab414,
00418   0x75a5793c, 0x22e69ac8, 0x75dc0968, 0x22922b5e,
00419   0x761214b0, 0x223d66a8, 0x76479a8e, 0x21e84d76,
00420   0x767c9a7e, 0x2192e09b, 0x76b113fd, 0x213d20e8,
00421   0x76e5068a, 0x20e70f32, 0x771871a5, 0x2090ac4d,
00422   0x774b54ce, 0x2039f90f, 0x777daf89, 0x1fe2f64c,
00423   0x77af8159, 0x1f8ba4dc, 0x77e0c9c3, 0x1f340596,
00424   0x7811884d, 0x1edc1953, 0x7841bc7f, 0x1e83e0eb,
00425   0x787165e3, 0x1e2b5d38, 0x78a08402, 0x1dd28f15,
00426   0x78cf1669, 0x1d79775c, 0x78fd1ca4, 0x1d2016e9,
00427   0x792a9642, 0x1cc66e99, 0x795782d3, 0x1c6c7f4a,
00428   0x7983e1e8, 0x1c1249d8, 0x79afb313, 0x1bb7cf23,
00429   0x79daf5e8, 0x1b5d100a, 0x7a05a9fd, 0x1b020d6c,
00430   0x7a2fcee8, 0x1aa6c82b, 0x7a596442, 0x1a4b4128,
00431   0x7a8269a3, 0x19ef7944, 0x7aaadea6, 0x19937161,
00432   0x7ad2c2e8, 0x19372a64, 0x7afa1605, 0x18daa52f,
00433   0x7b20d79e, 0x187de2a7, 0x7b470753, 0x1820e3b0,
00434   0x7b6ca4c4, 0x17c3a931, 0x7b91af97, 0x1766340f,
00435   0x7bb6276e, 0x17088531, 0x7bda0bf0, 0x16aa9d7e,
00436   0x7bfd5cc4, 0x164c7ddd, 0x7c201994, 0x15ee2738,
00437   0x7c42420a, 0x158f9a76, 0x7c63d5d1, 0x1530d881,
00438   0x7c84d496, 0x14d1e242, 0x7ca53e09, 0x1472b8a5,
00439   0x7cc511d9, 0x14135c94, 0x7ce44fb7, 0x13b3cefa,
00440   0x7d02f757, 0x135410c3, 0x7d21086c, 0x12f422db,
00441   0x7d3e82ae, 0x1294062f, 0x7d5b65d2, 0x1233bbac,
00442   0x7d77b192, 0x11d3443f, 0x7d9365a8, 0x1172a0d7,
00443   0x7dae81cf, 0x1111d263, 0x7dc905c5, 0x10b0d9d0,
00444   0x7de2f148, 0x104fb80e, 0x7dfc4418, 0xfee6e0d,
00445   0x7e14fdf7, 0xf8cfcbe, 0x7e2d1ea8, 0xf2b650f,
00446   0x7e44a5ef, 0xec9a7f3, 0x7e5b9392, 0xe67c65a,
00447   0x7e71e759, 0xe05c135, 0x7e87a10c, 0xda39978,
00448   0x7e9cc076, 0xd415013, 0x7eb14563, 0xcdee5f9,
00449   0x7ec52fa0, 0xc7c5c1e, 0x7ed87efc, 0xc19b374,
00450   0x7eeb3347, 0xbb6ecef, 0x7efd4c54, 0xb540982,
00451   0x7f0ec9f5, 0xaf10a22, 0x7f1fabff, 0xa8defc3,
00452   0x7f2ff24a, 0xa2abb59, 0x7f3f9cab, 0x9c76dd8,
00453   0x7f4eaafe, 0x9640837, 0x7f5d1d1d, 0x9008b6a,
00454   0x7f6af2e3, 0x89cf867, 0x7f782c30, 0x8395024,
00455   0x7f84c8e2, 0x7d59396, 0x7f90c8da, 0x771c3b3,
00456   0x7f9c2bfb, 0x70de172, 0x7fa6f228, 0x6a9edc9,
00457   0x7fb11b48, 0x645e9af, 0x7fbaa740, 0x5e1d61b,
00458   0x7fc395f9, 0x57db403, 0x7fcbe75e, 0x519845e,
00459   0x7fd39b5a, 0x4b54825, 0x7fdab1d9, 0x451004d,
00460   0x7fe12acb, 0x3ecadcf, 0x7fe7061f, 0x38851a2,
00461   0x7fec43c7, 0x323ecbe, 0x7ff0e3b6, 0x2bf801a,
00462   0x7ff4e5e0, 0x25b0caf, 0x7ff84a3c, 0x1f69373,
00463   0x7ffb10c1, 0x192155f, 0x7ffd3969, 0x12d936c,
00464   0x7ffec42d, 0xc90e90, 0x7fffb10b, 0x6487c4,
00465   0x7fffffff, 0x0, 0x7fffb10b, 0xff9b783c,
00466   0x7ffec42d, 0xff36f170, 0x7ffd3969, 0xfed26c94,
00467   0x7ffb10c1, 0xfe6deaa1, 0x7ff84a3c, 0xfe096c8d,
00468   0x7ff4e5e0, 0xfda4f351, 0x7ff0e3b6, 0xfd407fe6,
00469   0x7fec43c7, 0xfcdc1342, 0x7fe7061f, 0xfc77ae5e,
00470   0x7fe12acb, 0xfc135231, 0x7fdab1d9, 0xfbaeffb3,
00471   0x7fd39b5a, 0xfb4ab7db, 0x7fcbe75e, 0xfae67ba2,
00472   0x7fc395f9, 0xfa824bfd, 0x7fbaa740, 0xfa1e29e5,
00473   0x7fb11b48, 0xf9ba1651, 0x7fa6f228, 0xf9561237,
00474   0x7f9c2bfb, 0xf8f21e8e, 0x7f90c8da, 0xf88e3c4d,
00475   0x7f84c8e2, 0xf82a6c6a, 0x7f782c30, 0xf7c6afdc,
00476   0x7f6af2e3, 0xf7630799, 0x7f5d1d1d, 0xf6ff7496,
00477   0x7f4eaafe, 0xf69bf7c9, 0x7f3f9cab, 0xf6389228,
00478   0x7f2ff24a, 0xf5d544a7, 0x7f1fabff, 0xf572103d,
00479   0x7f0ec9f5, 0xf50ef5de, 0x7efd4c54, 0xf4abf67e,
00480   0x7eeb3347, 0xf4491311, 0x7ed87efc, 0xf3e64c8c,
00481   0x7ec52fa0, 0xf383a3e2, 0x7eb14563, 0xf3211a07,
00482   0x7e9cc076, 0xf2beafed, 0x7e87a10c, 0xf25c6688,
00483   0x7e71e759, 0xf1fa3ecb, 0x7e5b9392, 0xf19839a6,
00484   0x7e44a5ef, 0xf136580d, 0x7e2d1ea8, 0xf0d49af1,
00485   0x7e14fdf7, 0xf0730342, 0x7dfc4418, 0xf01191f3,
00486   0x7de2f148, 0xefb047f2, 0x7dc905c5, 0xef4f2630,
00487   0x7dae81cf, 0xeeee2d9d, 0x7d9365a8, 0xee8d5f29,
00488   0x7d77b192, 0xee2cbbc1, 0x7d5b65d2, 0xedcc4454,
00489   0x7d3e82ae, 0xed6bf9d1, 0x7d21086c, 0xed0bdd25,
00490   0x7d02f757, 0xecabef3d, 0x7ce44fb7, 0xec4c3106,
00491   0x7cc511d9, 0xebeca36c, 0x7ca53e09, 0xeb8d475b,
00492   0x7c84d496, 0xeb2e1dbe, 0x7c63d5d1, 0xeacf277f,
00493   0x7c42420a, 0xea70658a, 0x7c201994, 0xea11d8c8,
00494   0x7bfd5cc4, 0xe9b38223, 0x7bda0bf0, 0xe9556282,
00495   0x7bb6276e, 0xe8f77acf, 0x7b91af97, 0xe899cbf1,
00496   0x7b6ca4c4, 0xe83c56cf, 0x7b470753, 0xe7df1c50,
00497   0x7b20d79e, 0xe7821d59, 0x7afa1605, 0xe7255ad1,
00498   0x7ad2c2e8, 0xe6c8d59c, 0x7aaadea6, 0xe66c8e9f,
00499   0x7a8269a3, 0xe61086bc, 0x7a596442, 0xe5b4bed8,
00500   0x7a2fcee8, 0xe55937d5, 0x7a05a9fd, 0xe4fdf294,
00501   0x79daf5e8, 0xe4a2eff6, 0x79afb313, 0xe44830dd,
00502   0x7983e1e8, 0xe3edb628, 0x795782d3, 0xe39380b6,
00503   0x792a9642, 0xe3399167, 0x78fd1ca4, 0xe2dfe917,
00504   0x78cf1669, 0xe28688a4, 0x78a08402, 0xe22d70eb,
00505   0x787165e3, 0xe1d4a2c8, 0x7841bc7f, 0xe17c1f15,
00506   0x7811884d, 0xe123e6ad, 0x77e0c9c3, 0xe0cbfa6a,
00507   0x77af8159, 0xe0745b24, 0x777daf89, 0xe01d09b4,
00508   0x774b54ce, 0xdfc606f1, 0x771871a5, 0xdf6f53b3,
00509   0x76e5068a, 0xdf18f0ce, 0x76b113fd, 0xdec2df18,
00510   0x767c9a7e, 0xde6d1f65, 0x76479a8e, 0xde17b28a,
00511   0x761214b0, 0xddc29958, 0x75dc0968, 0xdd6dd4a2,
00512   0x75a5793c, 0xdd196538, 0x756e64b2, 0xdcc54bec,
00513   0x7536cc52, 0xdc71898d, 0x74feb0a5, 0xdc1e1ee9,
00514   0x74c61236, 0xdbcb0cce, 0x748cf190, 0xdb785409,
00515   0x74534f41, 0xdb25f566, 0x74192bd5, 0xdad3f1b1,
00516   0x73de87de, 0xda8249b4, 0x73a363ec, 0xda30fe38,
00517   0x7367c090, 0xd9e01006, 0x732b9e5e, 0xd98f7fe6,
00518   0x72eefdea, 0xd93f4e9e, 0x72b1dfc9, 0xd8ef7cf4,
00519   0x72744493, 0xd8a00bae, 0x72362ce0, 0xd850fb8e,
00520   0x71f79948, 0xd8024d59, 0x71b88a66, 0xd7b401d1,
00521   0x717900d6, 0xd76619b6, 0x7138fd35, 0xd71895c9,
00522   0x70f8801f, 0xd6cb76c9, 0x70b78a36, 0xd67ebd74,
00523   0x70761c18, 0xd6326a88, 0x70343667, 0xd5e67ec1,
00524   0x6ff1d9c7, 0xd59afadb, 0x6faf06da, 0xd54fdf8f,
00525   0x6f6bbe45, 0xd5052d97, 0x6f2800af, 0xd4bae5ab,
00526   0x6ee3cebe, 0xd4710883, 0x6e9f291b, 0xd42796d5,
00527   0x6e5a1070, 0xd3de9156, 0x6e148566, 0xd395f8ba,
00528   0x6dce88aa, 0xd34dcdb4, 0x6d881ae8, 0xd30610f7,
00529   0x6d413ccd, 0xd2bec333, 0x6cf9ef09, 0xd277e518,
00530   0x6cb2324c, 0xd2317756, 0x6c6a0746, 0xd1eb7a9a,
00531   0x6c216eaa, 0xd1a5ef90, 0x6bd8692b, 0xd160d6e5,
00532   0x6b8ef77d, 0xd11c3142, 0x6b451a55, 0xd0d7ff51,
00533   0x6afad269, 0xd09441bb, 0x6ab02071, 0xd050f926,
00534   0x6a650525, 0xd00e2639, 0x6a19813f, 0xcfcbc999,
00535   0x69cd9578, 0xcf89e3e8, 0x6981428c, 0xcf4875ca,
00536   0x69348937, 0xcf077fe1, 0x68e76a37, 0xcec702cb,
00537   0x6899e64a, 0xce86ff2a, 0x684bfe2f, 0xce47759a,
00538   0x67fdb2a7, 0xce0866b8, 0x67af0472, 0xcdc9d320,
00539   0x675ff452, 0xcd8bbb6d, 0x6710830c, 0xcd4e2037,
00540   0x66c0b162, 0xcd110216, 0x6670801a, 0xccd461a2,
00541   0x661feffa, 0xcc983f70, 0x65cf01c8, 0xcc5c9c14,
00542   0x657db64c, 0xcc217822, 0x652c0e4f, 0xcbe6d42b,
00543   0x64da0a9a, 0xcbacb0bf, 0x6487abf7, 0xcb730e70,
00544   0x6434f332, 0xcb39edca, 0x63e1e117, 0xcb014f5b,
00545   0x638e7673, 0xcac933ae, 0x633ab414, 0xca919b4e,
00546   0x62e69ac8, 0xca5a86c4, 0x62922b5e, 0xca23f698,
00547   0x623d66a8, 0xc9edeb50, 0x61e84d76, 0xc9b86572,
00548   0x6192e09b, 0xc9836582, 0x613d20e8, 0xc94eec03,
00549   0x60e70f32, 0xc91af976, 0x6090ac4d, 0xc8e78e5b,
00550   0x6039f90f, 0xc8b4ab32, 0x5fe2f64c, 0xc8825077,
00551   0x5f8ba4dc, 0xc8507ea7, 0x5f340596, 0xc81f363d,
00552   0x5edc1953, 0xc7ee77b3, 0x5e83e0eb, 0xc7be4381,
00553   0x5e2b5d38, 0xc78e9a1d, 0x5dd28f15, 0xc75f7bfe,
00554   0x5d79775c, 0xc730e997, 0x5d2016e9, 0xc702e35c,
00555   0x5cc66e99, 0xc6d569be, 0x5c6c7f4a, 0xc6a87d2d,
00556   0x5c1249d8, 0xc67c1e18, 0x5bb7cf23, 0xc6504ced,
00557   0x5b5d100a, 0xc6250a18, 0x5b020d6c, 0xc5fa5603,
00558   0x5aa6c82b, 0xc5d03118, 0x5a4b4128, 0xc5a69bbe,
00559   0x59ef7944, 0xc57d965d, 0x59937161, 0xc555215a,
00560   0x59372a64, 0xc52d3d18, 0x58daa52f, 0xc505e9fb,
00561   0x587de2a7, 0xc4df2862, 0x5820e3b0, 0xc4b8f8ad,
00562   0x57c3a931, 0xc4935b3c, 0x5766340f, 0xc46e5069,
00563   0x57088531, 0xc449d892, 0x56aa9d7e, 0xc425f410,
00564   0x564c7ddd, 0xc402a33c, 0x55ee2738, 0xc3dfe66c,
00565   0x558f9a76, 0xc3bdbdf6, 0x5530d881, 0xc39c2a2f,
00566   0x54d1e242, 0xc37b2b6a, 0x5472b8a5, 0xc35ac1f7,
00567   0x54135c94, 0xc33aee27, 0x53b3cefa, 0xc31bb049,
00568   0x535410c3, 0xc2fd08a9, 0x52f422db, 0xc2def794,
00569   0x5294062f, 0xc2c17d52, 0x5233bbac, 0xc2a49a2e,
00570   0x51d3443f, 0xc2884e6e, 0x5172a0d7, 0xc26c9a58,
00571   0x5111d263, 0xc2517e31, 0x50b0d9d0, 0xc236fa3b,
00572   0x504fb80e, 0xc21d0eb8, 0x4fee6e0d, 0xc203bbe8,
00573   0x4f8cfcbe, 0xc1eb0209, 0x4f2b650f, 0xc1d2e158,
00574   0x4ec9a7f3, 0xc1bb5a11, 0x4e67c65a, 0xc1a46c6e,
00575   0x4e05c135, 0xc18e18a7, 0x4da39978, 0xc1785ef4,
00576   0x4d415013, 0xc1633f8a, 0x4cdee5f9, 0xc14eba9d,
00577   0x4c7c5c1e, 0xc13ad060, 0x4c19b374, 0xc1278104,
00578   0x4bb6ecef, 0xc114ccb9, 0x4b540982, 0xc102b3ac,
00579   0x4af10a22, 0xc0f1360b, 0x4a8defc3, 0xc0e05401,
00580   0x4a2abb59, 0xc0d00db6, 0x49c76dd8, 0xc0c06355,
00581   0x49640837, 0xc0b15502, 0x49008b6a, 0xc0a2e2e3,
00582   0x489cf867, 0xc0950d1d, 0x48395024, 0xc087d3d0,
00583   0x47d59396, 0xc07b371e, 0x4771c3b3, 0xc06f3726,
00584   0x470de172, 0xc063d405, 0x46a9edc9, 0xc0590dd8,
00585   0x4645e9af, 0xc04ee4b8, 0x45e1d61b, 0xc04558c0,
00586   0x457db403, 0xc03c6a07, 0x4519845e, 0xc03418a2,
00587   0x44b54825, 0xc02c64a6, 0x4451004d, 0xc0254e27,
00588   0x43ecadcf, 0xc01ed535, 0x438851a2, 0xc018f9e1,
00589   0x4323ecbe, 0xc013bc39, 0x42bf801a, 0xc00f1c4a,
00590   0x425b0caf, 0xc00b1a20, 0x41f69373, 0xc007b5c4,
00591   0x4192155f, 0xc004ef3f, 0x412d936c, 0xc002c697,
00592   0x40c90e90, 0xc0013bd3, 0x406487c4, 0xc0004ef5
00593 };
00594
00617 arm_status arm_rfft_init_q31(
00618   arm_rfft_instance_q31 * S,
00619   arm_cfft_radix4_instance_q31 * S_CFFT,
00620   uint32_t fftLenReal,
00621   uint32_t ifftFlagR,
00622   uint32_t bitReverseFlag)
00623 {
00624   /*  Initialise the default arm status */
00625   arm_status status = ARM_MATH_SUCCESS;
00626
00627   /*  Initialize the Real FFT length */
00628   S->fftLenReal = (uint16_t) fftLenReal;
00629
00630   /*  Initialize the Complex FFT length */
00631   S->fftLenBy2 = (uint16_t) fftLenReal / 2u;
00632
00633   /*  Initialize the Twiddle coefficientA pointer */
00634   S->pTwiddleAReal = (q31_t *) realCoefAQ31;
00635
00636   /*  Initialize the Twiddle coefficientB pointer */
00637   S->pTwiddleBReal = (q31_t *) realCoefBQ31;
00638
00639   /*  Initialize the Flag for selection of RFFT or RIFFT */
00640   S->ifftFlagR = (uint8_t) ifftFlagR;
00641
00642   /*  Initialize the Flag for calculation Bit reversal or not */
00643   S->bitReverseFlagR = (uint8_t) bitReverseFlag;
00644
00645   /*  Initialization of coef modifier depending on the FFT length */
00646   switch (S->fftLenReal)
00647   {
00648   case 512u:
00649     S->twidCoefRModifier = 2u;
00650     break;
00651   case 128u:
00652     S->twidCoefRModifier = 8u;
00653     break;
00654   default:
00655     /*  Reporting argument error if rfftSize is not valid value */
00656     status = ARM_MATH_ARGUMENT_ERROR;
00657     break;
00658   }
00659
00660   /* Init Complex FFT Instance */
00661   S->pCfft = S_CFFT;
00662
00663   if(S->ifftFlagR)
00664   {
00665     /* Initializes the CIFFT Module for fftLenreal/2 length */
00666     arm_cfft_radix4_init_q31(S->pCfft, (uint16_t) S->fftLenBy2, 1u, 1u);
00667   }
00668   else
00669   {
00670     /* Initializes the CFFT Module for fftLenreal/2 length */
00671     arm_cfft_radix4_init_q31(S->pCfft, (uint16_t) S->fftLenBy2, 0u, 1u);
00672   }
00673
00674   /* return the status of RFFT Init function */
00675   return (status);
00676
00677 }
00678
Generated on Mon Nov 28 2011 11:14:40 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_rfft_q15.c
00009 *
00010 * Description:  RFFT & RIFFT Q15 process function
00011 *
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated
00029 *
00030 * Version 0.0.7  2010/06/10
00031 *    Misra-C changes done
00032 * -------------------------------------------------------------------- */
00033
00034
00035 #include "arm_math.h"
00036
00037 /*--------------------------------------------------------------------
00038 *               Internal functions prototypes
00039 --------------------------------------------------------------------*/
00040
00041 void arm_split_rfft_q15(
00042   q15_t * pSrc,
00043   uint32_t fftLen,
00044   q15_t * pATable,
00045   q15_t * pBTable,
00046   q15_t * pDst,
00047   uint32_t modifier);
00048
00049 void arm_split_rifft_q15(
00050   q15_t * pSrc,
00051   uint32_t fftLen,
00052   q15_t * pATable,
00053   q15_t * pBTable,
00054   q15_t * pDst,
00055   uint32_t modifier);
00056
00080 void arm_rfft_q15(
00081   const arm_rfft_instance_q15 * S,
00082   q15_t * pSrc,
00083   q15_t * pDst)
00084 {
00085   const arm_cfft_radix4_instance_q15 *S_CFFT = S->pCfft;
00086
00087   /* Calculation of RIFFT of input */
00088   if(S->ifftFlagR == 1u)
00089   {
00090     /*  Real IFFT core process */
00091     arm_split_rifft_q15(pSrc, S->fftLenBy2, S->pTwiddleAReal,
00092                         S->pTwiddleBReal, pDst, S->twidCoefRModifier);
00093
00094     /* Complex readix-4 IFFT process */
00095     arm_radix4_butterfly_inverse_q15(pDst, S_CFFT->fftLen,
00096                                      S_CFFT->pTwiddle,
00097                                      S_CFFT->twidCoefModifier);
00098
00099     /* Bit reversal process */
00100     if(S->bitReverseFlagR == 1u)
00101     {
00102       arm_bitreversal_q15(pDst, S_CFFT->fftLen,
00103                           S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
00104     }
00105   }
00106   else
00107   {
00108     /* Calculation of RFFT of input */
00109
00110     /* Complex readix-4 FFT process */
00111     arm_radix4_butterfly_q15(pSrc, S_CFFT->fftLen,
00112                              S_CFFT->pTwiddle, S_CFFT->twidCoefModifier);
00113
00114     /* Bit reversal process */
00115     if(S->bitReverseFlagR == 1u)
00116     {
00117       arm_bitreversal_q15(pSrc, S_CFFT->fftLen,
00118                           S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
00119     }
00120
00121     arm_split_rfft_q15(pSrc, S->fftLenBy2, S->pTwiddleAReal,
00122                        S->pTwiddleBReal, pDst, S->twidCoefRModifier);
00123   }
00124
00125 }
00126
00143 void arm_split_rfft_q15(
00144   q15_t * pSrc,
00145   uint32_t fftLen,
00146   q15_t * pATable,
00147   q15_t * pBTable,
00148   q15_t * pDst,
00149   uint32_t modifier)
00150 {
00151   uint32_t i;                                    /* Loop Counter */
00152   q31_t outR, outI;                              /* Temporary variables for output */
00153   q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
00154   q15_t *pSrc1, *pSrc2;
00155
00156
00157   pSrc[2u * fftLen] = pSrc[0];
00158   pSrc[(2u * fftLen) + 1u] = pSrc[1];
00159
00160   pCoefA = &pATable[modifier * 2u];
00161   pCoefB = &pBTable[modifier * 2u];
00162
00163   pSrc1 = &pSrc[2];
00164   pSrc2 = &pSrc[(2u * fftLen) - 2u];
00165
00166 #ifndef ARM_MATH_CM0
00167
00168   /* Run the below code for Cortex-M4 and Cortex-M3 */
00169
00170   i = 1u;
00171
00172   while(i < fftLen)
00173   {
00174     /*
00175        outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]
00176        + pSrc[2 * n - 2 * i] * pBTable[2 * i] +
00177        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
00178      */
00179
00180     /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +
00181        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
00182        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
00183
00184
00185 #ifndef ARM_MATH_BIG_ENDIAN
00186
00187     /* pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1] */
00188     outR = __SMUSD(*__SIMD32(pSrc1), *__SIMD32(pCoefA));
00189
00190 #else
00191
00192     /* -(pSrc[2 * i + 1] * pATable[2 * i + 1] - pSrc[2 * i] * pATable[2 * i]) */
00193     outR = -(__SMUSD(*__SIMD32(pSrc1), *__SIMD32(pCoefA)));
00194
00195 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00196
00197     /* pSrc[2 * n - 2 * i] * pBTable[2 * i] +
00198        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
00199     outR = __SMLAD(*__SIMD32(pSrc2), *__SIMD32(pCoefB), outR) >> 15u;
00200
00201     /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
00202        pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
00203
00204 #ifndef ARM_MATH_BIG_ENDIAN
00205
00206     outI = __SMUSDX(*__SIMD32(pSrc2)--, *__SIMD32(pCoefB));
00207
00208 #else
00209
00210     outI = __SMUSDX(*__SIMD32(pCoefB), *__SIMD32(pSrc2)--);
00211
00212 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00213
00214     /* (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] */
00215     outI = __SMLADX(*__SIMD32(pSrc1)++, *__SIMD32(pCoefA), outI);
00216
00217     /* write output */
00218     pDst[2u * i] = (q15_t) outR;
00219     pDst[(2u * i) + 1u] = outI >> 15u;
00220
00221     /* write complex conjugate output */
00222     pDst[(4u * fftLen) - (2u * i)] = (q15_t) outR;
00223     pDst[((4u * fftLen) - (2u * i)) + 1u] = -(outI >> 15u);
00224
00225     /* update coefficient pointer */
00226     pCoefB = pCoefB + (2u * modifier);
00227     pCoefA = pCoefA + (2u * modifier);
00228
00229     i++;
00230
00231   }
00232
00233   pDst[2u * fftLen] = pSrc[0] - pSrc[1];
00234   pDst[(2u * fftLen) + 1u] = 0;
00235
00236   pDst[0] = pSrc[0] + pSrc[1];
00237   pDst[1] = 0;
00238
00239
00240 #else
00241
00242   /* Run the below code for Cortex-M0 */
00243
00244   i = 1u;
00245
00246   while(i < fftLen)
00247   {
00248     /*
00249        outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]
00250        + pSrc[2 * n - 2 * i] * pBTable[2 * i] +
00251        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
00252      */
00253
00254     outR = *pSrc1 * *pCoefA;
00255     outR = outR - (*(pSrc1 + 1) * *(pCoefA + 1));
00256     outR = outR + (*pSrc2 * *pCoefB);
00257     outR = (outR + (*(pSrc2 + 1) * *(pCoefB + 1))) >> 15;
00258
00259
00260     /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +
00261        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
00262        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
00263      */
00264
00265     outI = *pSrc2 * *(pCoefB + 1);
00266     outI = outI - (*(pSrc2 + 1) * *pCoefB);
00267     outI = outI + (*(pSrc1 + 1) * *pCoefA);
00268     outI = outI + (*pSrc1 * *(pCoefA + 1));
00269
00270     /* update input pointers */
00271     pSrc1 += 2u;
00272     pSrc2 -= 2u;
00273
00274     /* write output */
00275     pDst[2u * i] = (q15_t) outR;
00276     pDst[(2u * i) + 1u] = outI >> 15u;
00277
00278     /* write complex conjugate output */
00279     pDst[(4u * fftLen) - (2u * i)] = (q15_t) outR;
00280     pDst[((4u * fftLen) - (2u * i)) + 1u] = -(outI >> 15u);
00281
00282     /* update coefficient pointer */
00283     pCoefB = pCoefB + (2u * modifier);
00284     pCoefA = pCoefA + (2u * modifier);
00285
00286     i++;
00287
00288   }
00289
00290   pDst[2u * fftLen] = pSrc[0] - pSrc[1];
00291   pDst[(2u * fftLen) + 1u] = 0;
00292
00293   pDst[0] = pSrc[0] + pSrc[1];
00294   pDst[1] = 0;
00295
00296 #endif /* #ifndef ARM_MATH_CM0 */
00297
00298 }
00299
00300
00312 void arm_split_rifft_q15(
00313   q15_t * pSrc,
00314   uint32_t fftLen,
00315   q15_t * pATable,
00316   q15_t * pBTable,
00317   q15_t * pDst,
00318   uint32_t modifier)
00319 {
00320   uint32_t i;                                    /* Loop Counter */
00321   q31_t outR, outI;                              /* Temporary variables for output */
00322   q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
00323   q15_t *pSrc1, *pSrc2;
00324   q15_t *pDst1 = &pDst[0];
00325
00326   pCoefA = &pATable[0];
00327   pCoefB = &pBTable[0];
00328
00329   pSrc1 = &pSrc[0];
00330   pSrc2 = &pSrc[2u * fftLen];
00331
00332 #ifndef ARM_MATH_CM0
00333
00334   /* Run the below code for Cortex-M4 and Cortex-M3 */
00335
00336   i = fftLen;
00337
00338   while(i > 0u)
00339   {
00340
00341     /*
00342        outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
00343        pIn[2 * n - 2 * i] * pBTable[2 * i] -
00344        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
00345
00346        outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -
00347        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
00348        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
00349
00350      */
00351
00352
00353 #ifndef ARM_MATH_BIG_ENDIAN
00354
00355     /* pIn[2 * n - 2 * i] * pBTable[2 * i] -
00356        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
00357     outR = __SMUSD(*__SIMD32(pSrc2), *__SIMD32(pCoefB));
00358
00359 #else
00360
00361     /* -(-pIn[2 * n - 2 * i] * pBTable[2 * i] +
00362        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1])) */
00363     outR = -(__SMUSD(*__SIMD32(pSrc2), *__SIMD32(pCoefB)));
00364
00365 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00366
00367     /* pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
00368        pIn[2 * n - 2 * i] * pBTable[2 * i] */
00369     outR = __SMLAD(*__SIMD32(pSrc1), *__SIMD32(pCoefA), outR) >> 15u;
00370
00371     /*
00372        -pIn[2 * n - 2 * i] * pBTable[2 * i + 1] +
00373        pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
00374     outI = __SMUADX(*__SIMD32(pSrc2)--, *__SIMD32(pCoefB));
00375
00376     /* pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] */
00377
00378 #ifndef ARM_MATH_BIG_ENDIAN
00379
00380     outI = __SMLSDX(*__SIMD32(pCoefA), *__SIMD32(pSrc1)++, -outI);
00381
00382 #else
00383
00384     outI = __SMLSDX(*__SIMD32(pSrc1)++, *__SIMD32(pCoefA), -outI);
00385
00386 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00387     /* write output */
00388
00389 #ifndef ARM_MATH_BIG_ENDIAN
00390
00391     *__SIMD32(pDst1)++ = __PKHBT(outR, (outI >> 15u), 16);
00392
00393 #else
00394
00395     *__SIMD32(pDst1)++ = __PKHBT((outI >> 15u), outR, 16);
00396
00397 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00398
00399     /* update coefficient pointer */
00400     pCoefB = pCoefB + (2u * modifier);
00401     pCoefA = pCoefA + (2u * modifier);
00402
00403     i--;
00404
00405   }
00406
00407
00408 #else
00409
00410   /* Run the below code for Cortex-M0 */
00411
00412   i = fftLen;
00413
00414   while(i > 0u)
00415   {
00416
00417     /*
00418        outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
00419        pIn[2 * n - 2 * i] * pBTable[2 * i] -
00420        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
00421      */
00422
00423     outR = *pSrc2 * *pCoefB;
00424     outR = outR - (*(pSrc2 + 1) * *(pCoefB + 1));
00425     outR = outR + (*pSrc1 * *pCoefA);
00426     outR = (outR + (*(pSrc1 + 1) * *(pCoefA + 1))) >> 15;
00427
00428     /*
00429        outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -
00430        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
00431        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
00432      */
00433
00434     outI = *(pSrc1 + 1) * *pCoefA;
00435     outI = outI - (*pSrc1 * *(pCoefA + 1));
00436     outI = outI - (*pSrc2 * *(pCoefB + 1));
00437     outI = outI - (*(pSrc2 + 1) * *(pCoefB));
00438
00439     /* update input pointers */
00440     pSrc1 += 2u;
00441     pSrc2 -= 2u;
00442
00443     /* write output */
00444     *pDst1++ = (q15_t) outR;
00445     *pDst1++ = (q15_t) (outI >> 15);
00446
00447     /* update coefficient pointer */
00448     pCoefB = pCoefB + (2u * modifier);
00449     pCoefA = pCoefA + (2u * modifier);
00450
00451     i--;
00452
00453   }
00454
00455 #endif /* #ifndef ARM_MATH_CM0 */
00456
00457 }
Generated on Mon Nov 28 2011 11:14:40 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_rfft_q31.c
00009 *
00010 * Description:  RFFT & RIFFT Q31 process function
00011 *
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 *
00030 * Version 0.0.7  2010/06/10
00031 *    Misra-C changes done
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00036 /*--------------------------------------------------------------------
00037 *               Internal functions prototypes
00038 --------------------------------------------------------------------*/
00039
00040 void arm_split_rfft_q31(
00041   q31_t * pSrc,
00042   uint32_t fftLen,
00043   q31_t * pATable,
00044   q31_t * pBTable,
00045   q31_t * pDst,
00046   uint32_t modifier);
00047
00048 void arm_split_rifft_q31(
00049   q31_t * pSrc,
00050   uint32_t fftLen,
00051   q31_t * pATable,
00052   q31_t * pBTable,
00053   q31_t * pDst,
00054   uint32_t modifier);
00055
00080 void arm_rfft_q31(
00081   const arm_rfft_instance_q31 * S,
00082   q31_t * pSrc,
00083   q31_t * pDst)
00084 {
00085   const arm_cfft_radix4_instance_q31 *S_CFFT = S->pCfft;
00086
00087   /* Calculation of RIFFT of input */
00088   if(S->ifftFlagR == 1u)
00089   {
00090     /*  Real IFFT core process */
00091     arm_split_rifft_q31(pSrc, S->fftLenBy2, S->pTwiddleAReal,
00092                         S->pTwiddleBReal, pDst, S->twidCoefRModifier);
00093
00094     /* Complex readix-4 IFFT process */
00095     arm_radix4_butterfly_inverse_q31(pDst, S_CFFT->fftLen,
00096                                      S_CFFT->pTwiddle,
00097                                      S_CFFT->twidCoefModifier);
00098     /* Bit reversal process */
00099     if(S->bitReverseFlagR == 1u)
00100     {
00101       arm_bitreversal_q31(pDst, S_CFFT->fftLen,
00102                           S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
00103     }
00104   }
00105   else
00106   {
00107     /* Calculation of RFFT of input */
00108
00109     /* Complex readix-4 FFT process */
00110     arm_radix4_butterfly_q31(pSrc, S_CFFT->fftLen,
00111                              S_CFFT->pTwiddle, S_CFFT->twidCoefModifier);
00112
00113     /* Bit reversal process */
00114     if(S->bitReverseFlagR == 1u)
00115     {
00116       arm_bitreversal_q31(pSrc, S_CFFT->fftLen,
00117                           S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
00118     }
00119
00120     /*  Real FFT core process */
00121     arm_split_rfft_q31(pSrc, S->fftLenBy2, S->pTwiddleAReal,
00122                        S->pTwiddleBReal, pDst, S->twidCoefRModifier);
00123   }
00124
00125 }
00126
00127
00143 void arm_split_rfft_q31(
00144   q31_t * pSrc,
00145   uint32_t fftLen,
00146   q31_t * pATable,
00147   q31_t * pBTable,
00148   q31_t * pDst,
00149   uint32_t modifier)
00150 {
00151   uint32_t i;                                    /* Loop Counter */
00152   q31_t outR, outI;                              /* Temporary variables for output */
00153   q31_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
00154   q31_t CoefA1, CoefA2, CoefB1;                  /* Temporary variables for twiddle coefficients */
00155   q31_t *pOut1 = &pDst[2], *pOut2 = &pDst[(4u * fftLen) - 1u];
00156   q31_t *pIn1 = &pSrc[2], *pIn2 = &pSrc[(2u * fftLen) - 1u];
00157
00158   pSrc[2u * fftLen] = pSrc[0];
00159   pSrc[(2u * fftLen) + 1u] = pSrc[1];
00160
00161   /* Init coefficient pointers */
00162   pCoefA = &pATable[modifier * 2u];
00163   pCoefB = &pBTable[modifier * 2u];
00164
00165   i = fftLen - 1u;
00166
00167   while(i > 0u)
00168   {
00169     /*
00170        outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]
00171        + pSrc[2 * n - 2 * i] * pBTable[2 * i] +
00172        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
00173      */
00174
00175     /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +
00176        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
00177        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
00178
00179     CoefA1 = *pCoefA++;
00180     CoefA2 = *pCoefA;
00181
00182     /* outR = (pSrc[2 * i] * pATable[2 * i] */
00183     outR = ((int32_t) (((q63_t) * pIn1 * CoefA1) >> 32));
00184
00185     /* outI = pIn[2 * i] * pATable[2 * i + 1] */
00186     outI = ((int32_t) (((q63_t) * pIn1++ * CoefA2) >> 32));
00187
00188     /* - pSrc[2 * i + 1] * pATable[2 * i + 1] */
00189     outR =
00190       (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn1 * (-CoefA2))) >> 32);
00191
00192     /* (pIn[2 * i + 1] * pATable[2 * i] */
00193     outI =
00194       (q31_t) ((((q63_t) outI << 32) + ((q63_t) * pIn1++ * (CoefA1))) >> 32);
00195
00196     /* pSrc[2 * n - 2 * i] * pBTable[2 * i]  */
00197     outR =
00198       (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn2 * (-CoefA2))) >> 32);
00199     CoefB1 = *pCoefB;
00200
00201     /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
00202     outI =
00203       (q31_t) ((((q63_t) outI << 32) + ((q63_t) * pIn2-- * (-CoefB1))) >> 32);
00204
00205     /* pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
00206     outR =
00207       (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn2 * (CoefB1))) >> 32);
00208
00209     /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
00210     outI =
00211       (q31_t) ((((q63_t) outI << 32) + ((q63_t) * pIn2-- * (-CoefA2))) >> 32);
00212
00213     /* write output */
00214     *pOut1++ = (outR << 1u);
00215     *pOut1++ = (outI << 1u);
00216
00217     /* write complex conjugate output */
00218     *pOut2-- = -(outI << 1u);
00219     *pOut2-- = (outR << 1u);
00220
00221     /* update coefficient pointer */
00222     pCoefB = pCoefB + (modifier * 2u);
00223     pCoefA = pCoefA + ((modifier * 2u) - 1u);
00224
00225     i--;
00226
00227   }
00228
00229   pDst[2u * fftLen] = pSrc[0] - pSrc[1];
00230   pDst[(2u * fftLen) + 1u] = 0;
00231
00232   pDst[0] = pSrc[0] + pSrc[1];
00233   pDst[1] = 0;
00234
00235 }
00236
00237
00249 void arm_split_rifft_q31(
00250   q31_t * pSrc,
00251   uint32_t fftLen,
00252   q31_t * pATable,
00253   q31_t * pBTable,
00254   q31_t * pDst,
00255   uint32_t modifier)
00256 {
00257   q31_t outR, outI;                              /* Temporary variables for output */
00258   q31_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
00259   q31_t CoefA1, CoefA2, CoefB1;                  /* Temporary variables for twiddle coefficients */
00260   q31_t *pIn1 = &pSrc[0], *pIn2 = &pSrc[(2u * fftLen) + 1u];
00261
00262   pCoefA = &pATable[0];
00263   pCoefB = &pBTable[0];
00264
00265   while(fftLen > 0u)
00266   {
00267     /*
00268        outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
00269        pIn[2 * n - 2 * i] * pBTable[2 * i] -
00270        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
00271
00272        outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -
00273        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
00274        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
00275
00276      */
00277     CoefA1 = *pCoefA++;
00278     CoefA2 = *pCoefA;
00279
00280     /* outR = (pIn[2 * i] * pATable[2 * i] */
00281     outR = ((int32_t) (((q63_t) * pIn1 * CoefA1) >> 32));
00282
00283     /* - pIn[2 * i] * pATable[2 * i + 1] */
00284     outI = -((int32_t) (((q63_t) * pIn1++ * CoefA2) >> 32));
00285
00286     /* pIn[2 * i + 1] * pATable[2 * i + 1] */
00287     outR =
00288       (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn1 * (CoefA2))) >> 32);
00289
00290     /* pIn[2 * i + 1] * pATable[2 * i] */
00291     outI =
00292       (q31_t) ((((q63_t) outI << 32) + ((q63_t) * pIn1++ * (CoefA1))) >> 32);
00293
00294     /* pIn[2 * n - 2 * i] * pBTable[2 * i] */
00295     outR =
00296       (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn2 * (CoefA2))) >> 32);
00297
00298     CoefB1 = *pCoefB;
00299
00300     /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
00301     outI =
00302       (q31_t) ((((q63_t) outI << 32) - ((q63_t) * pIn2-- * (CoefB1))) >> 32);
00303
00304     /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
00305     outR =
00306       (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn2 * (CoefB1))) >> 32);
00307
00308     /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
00309     outI =
00310       (q31_t) ((((q63_t) outI << 32) + ((q63_t) * pIn2-- * (CoefA2))) >> 32);
00311
00312     /* write output */
00313     *pDst++ = (outR << 1u);
00314     *pDst++ = (outI << 1u);
00315
00316     /* update coefficient pointer */
00317     pCoefB = pCoefB + (modifier * 2u);
00318     pCoefA = pCoefA + ((modifier * 2u) - 1u);
00319
00320     /* Decrement loop count */
00321     fftLen--;
00322
00323   }
00324
00325
00326 }
Generated on Mon Nov 28 2011 11:14:40 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_rms_f32.c
00009 *
00010 * Description:  Root mean square value of an array of F32 type
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00065 void arm_rms_f32(
00066   float32_t * pSrc,
00067   uint32_t blockSize,
00068   float32_t * pResult)
00069 {
00070   float32_t sum = 0.0f;                          /* Accumulator */
00071   float32_t in;                                  /* Tempoprary variable to store input value */
00072   uint32_t blkCnt;                               /* loop counter */
00073
00074 #ifndef ARM_MATH_CM0
00075
00076   /* Run the below code for Cortex-M4 and Cortex-M3 */
00077
00078   /* loop Unrolling */
00079   blkCnt = blockSize >> 2u;
00080
00081   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00082    ** a second loop below computes the remaining 1 to 3 samples. */
00083   while(blkCnt > 0u)
00084   {
00085     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00086     /* Compute sum of the squares and then store the result in a temporary variable, sum  */
00087     in = *pSrc++;
00088     sum += in * in;
00089     in = *pSrc++;
00090     sum += in * in;
00091     in = *pSrc++;
00092     sum += in * in;
00093     in = *pSrc++;
00094     sum += in * in;
00095
00096     /* Decrement the loop counter */
00097     blkCnt--;
00098   }
00099
00100   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00101    ** No loop unrolling is used. */
00102   blkCnt = blockSize % 0x4u;
00103
00104 #else
00105
00106   /* Run the below code for Cortex-M0 */
00107
00108   /* Loop over blockSize number of values */
00109   blkCnt = blockSize;
00110
00111 #endif /* #ifndef ARM_MATH_CM0 */
00112
00113   while(blkCnt > 0u)
00114   {
00115     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00116     /* Compute sum of the squares and then store the results in a temporary variable, sum  */
00117     in = *pSrc++;
00118     sum += in * in;
00119
00120     /* Decrement the loop counter */
00121     blkCnt--;
00122   }
00123
00124   /* Compute Rms and store the result in the destination */
00125   arm_sqrt_f32(sum / (float32_t) blockSize, pResult);
00126 }
00127
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_rms_q15.c
00009 *
00010 * Description:  Root Mean Square of the elements of a Q15 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00059 void arm_rms_q15(
00060   q15_t * pSrc,
00061   uint32_t blockSize,
00062   q15_t * pResult)
00063 {
00064   q63_t sum = 0;                                 /* accumulator */
00065
00066 #ifndef ARM_MATH_CM0
00067
00068   /* Run the below code for Cortex-M4 and Cortex-M3 */
00069
00070   q31_t in;                                      /* temporary variable to store the input value */
00071   q15_t in1;                                     /* temporary variable to store the input value */
00072   uint32_t blkCnt;                               /* loop counter */
00073
00074   /* loop Unrolling */
00075   blkCnt = blockSize >> 2u;
00076
00077   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00078    ** a second loop below computes the remaining 1 to 3 samples. */
00079   while(blkCnt > 0u)
00080   {
00081     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00082     /* Compute sum of the squares and then store the results in a temporary variable, sum */
00083     in = *__SIMD32(pSrc)++;
00084     sum = __SMLALD(in, in, sum);
00085     in = *__SIMD32(pSrc)++;
00086     sum = __SMLALD(in, in, sum);
00087
00088     /* Decrement the loop counter */
00089     blkCnt--;
00090   }
00091
00092   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00093    ** No loop unrolling is used. */
00094   blkCnt = blockSize % 0x4u;
00095
00096   while(blkCnt > 0u)
00097   {
00098     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00099     /* Compute sum of the squares and then store the results in a temporary variable, sum */
00100     in1 = *pSrc++;
00101     sum = __SMLALD(in1, in1, sum);
00102
00103     /* Decrement the loop counter */
00104     blkCnt--;
00105   }
00106
00107   /* Truncating and saturating the accumulator to 1.15 format */
00108   sum = __SSAT((q31_t) (sum >> 15), 16);
00109
00110   in1 = (q15_t) (sum / blockSize);
00111
00112   /* Store the result in the destination */
00113   arm_sqrt_q15(in1, pResult);
00114
00115 #else
00116
00117   /* Run the below code for Cortex-M0 */
00118
00119   q15_t in;                                      /* temporary variable to store the input value */
00120   uint32_t blkCnt;                               /* loop counter */
00121
00122   /* Loop over blockSize number of values */
00123   blkCnt = blockSize;
00124
00125   while(blkCnt > 0u)
00126   {
00127     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00128     /* Compute sum of the squares and then store the results in a temporary variable, sum */
00129     in = *pSrc++;
00130     sum += ((q31_t) in * in);
00131
00132     /* Decrement the loop counter */
00133     blkCnt--;
00134   }
00135
00136   /* Truncating and saturating the accumulator to 1.15 format */
00137   sum = __SSAT((q31_t) (sum >> 15), 16);
00138
00139   in = (q15_t) (sum / blockSize);
00140
00141   /* Store the result in the destination */
00142   arm_sqrt_q15(in, pResult);
00143
00144 #endif /* #ifndef ARM_MATH_CM0 */
00145
00146 }
00147
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_rms_q31.c
00009 *
00010 * Description:  Root Mean Square of the elements of a Q31 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00062 void arm_rms_q31(
00063   q31_t * pSrc,
00064   uint32_t blockSize,
00065   q31_t * pResult)
00066 {
00067   q63_t sum = 0;                                 /* accumulator */
00068   q31_t in;                                      /* Temporary variable to store the input */
00069   uint32_t blkCnt;                               /* loop counter */
00070
00071 #ifndef ARM_MATH_CM0
00072
00073   /* Run the below code for Cortex-M4 and Cortex-M3 */
00074
00075   q31_t *pIn1 = pSrc;                            /* SrcA pointer */
00076
00077   /*loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079
00080   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00081    ** a second loop below computes the remaining 1 to 3 samples. */
00082   while(blkCnt > 0u)
00083   {
00084     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00085     /* Compute sum of the squares and then store the result in a temporary variable, sum */
00086     in = *pIn1++;
00087     sum += (q63_t) in *in;
00088     in = *pIn1++;
00089     sum += (q63_t) in *in;
00090     in = *pIn1++;
00091     sum += (q63_t) in *in;
00092     in = *pIn1++;
00093     sum += (q63_t) in *in;
00094
00095     /* Decrement the loop counter */
00096     blkCnt--;
00097   }
00098
00099   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00100    ** No loop unrolling is used. */
00101   blkCnt = blockSize % 0x4u;
00102
00103   while(blkCnt > 0u)
00104   {
00105     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00106     /* Compute sum of the squares and then store the results in a temporary variable, sum */
00107     in = *pIn1++;
00108     sum += (q63_t) in *in;
00109
00110     /* Decrement the loop counter */
00111     blkCnt--;
00112   }
00113
00114 #else
00115
00116   /* Run the below code for Cortex-M0 */
00117
00118   /* Loop over blockSize number of values */
00119   blkCnt = blockSize;
00120
00121   while(blkCnt > 0u)
00122   {
00123     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00124     /* Compute sum of the squares and then store the results in a temporary variable, sum */
00125     in = *pSrc++;
00126     sum += (q63_t) in *in;
00127
00128     /* Decrement the loop counter */
00129     blkCnt--;
00130   }
00131
00132 #endif /* #ifndef ARM_MATH_CM0 */
00133
00134   /* Convert data in 2.62 to 1.31 by 31 right shifts */
00135   sum = sum >> 31;
00136
00137   /* Compute Rms and store the result in the destination vector */
00138   arm_sqrt_q31((q31_t) (sum / (int32_t) blockSize), pResult);
00139 }
00140
Generated on Mon Nov 28 2011 11:14:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_scale_f32.c
00009 *
00010 * Description:  Multiplies a floating-point vector by a scalar.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00078 void arm_scale_f32(
00079   float32_t * pSrc,
00080   float32_t scale,
00081   float32_t * pDst,
00082   uint32_t blockSize)
00083 {
00084   uint32_t blkCnt;                               /* loop counter */
00085
00086 #ifndef ARM_MATH_CM0
00087
00088 /* Run the below code for Cortex-M4 and Cortex-M3 */
00089   /*loop Unrolling */
00090   blkCnt = blockSize >> 2u;
00091
00092   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00093    ** a second loop below computes the remaining 1 to 3 samples. */
00094   while(blkCnt > 0u)
00095   {
00096     /* C = A * scale */
00097     /* Scale the input and then store the results in the destination buffer. */
00098     *pDst++ = (*pSrc++) * scale;
00099     *pDst++ = (*pSrc++) * scale;
00100     *pDst++ = (*pSrc++) * scale;
00101     *pDst++ = (*pSrc++) * scale;
00102
00103     /* Decrement the loop counter */
00104     blkCnt--;
00105   }
00106
00107   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00108    ** No loop unrolling is used. */
00109   blkCnt = blockSize % 0x4u;
00110
00111 #else
00112
00113   /* Run the below code for Cortex-M0 */
00114
00115   /* Initialize blkCnt with number of samples */
00116   blkCnt = blockSize;
00117
00118 #endif /* #ifndef ARM_MATH_CM0 */
00119
00120   while(blkCnt > 0u)
00121   {
00122     /* C = A * scale */
00123     /* Scale the input and then store the result in the destination buffer. */
00124     *pDst++ = (*pSrc++) * scale;
00125
00126     /* Decrement the loop counter */
00127     blkCnt--;
00128   }
00129 }
00130
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_scale_q7.c
00009 *
00010 * Description:  Multiplies a Q7 vector by a scalar.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00059 void arm_scale_q7(
00060   q7_t * pSrc,
00061   q7_t scaleFract,
00062   int8_t shift,
00063   q7_t * pDst,
00064   uint32_t blockSize)
00065 {
00066   int8_t kShift = 7 - shift;                     /* shift to apply after scaling */
00067   uint32_t blkCnt;                               /* loop counter */
00068
00069 #ifndef ARM_MATH_CM0
00070
00071 /* Run the below code for Cortex-M4 and Cortex-M3 */
00072   q7_t in1, in2, in3, in4, out1, out2, out3, out4;      /* Temporary variables to store input & output */
00073
00074
00075   /*loop Unrolling */
00076   blkCnt = blockSize >> 2u;
00077
00078
00079   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00080    ** a second loop below computes the remaining 1 to 3 samples. */
00081   while(blkCnt > 0u)
00082   {
00083     /* Reading 4 inputs from memory */
00084     in1 = *pSrc++;
00085     in2 = *pSrc++;
00086     in3 = *pSrc++;
00087     in4 = *pSrc++;
00088
00089     /* C = A * scale */
00090     /* Scale the inputs and then store the results in the temporary variables. */
00091     out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8));
00092     out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8));
00093     out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8));
00094     out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8));
00095
00096     /* Packing the individual outputs into 32bit and storing in
00097      * destination buffer in single write */
00098     *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
00099
00100     /* Decrement the loop counter */
00101     blkCnt--;
00102   }
00103
00104   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00105    ** No loop unrolling is used. */
00106   blkCnt = blockSize % 0x4u;
00107
00108   while(blkCnt > 0u)
00109   {
00110     /* C = A * scale */
00111     /* Scale the input and then store the result in the destination buffer. */
00112     *pDst++ = (q7_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 8));
00113
00114     /* Decrement the loop counter */
00115     blkCnt--;
00116   }
00117
00118 #else
00119
00120   /* Run the below code for Cortex-M0 */
00121
00122   /* Initialize blkCnt with number of samples */
00123   blkCnt = blockSize;
00124
00125   while(blkCnt > 0u)
00126   {
00127     /* C = A * scale */
00128     /* Scale the input and then store the result in the destination buffer. */
00129     *pDst++ = (q7_t) (__SSAT((((q15_t) * pSrc++ * scaleFract) >> kShift), 8));
00130
00131     /* Decrement the loop counter */
00132     blkCnt--;
00133   }
00134
00135 #endif /* #ifndef ARM_MATH_CM0 */
00136
00137 }
00138
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_scale_q15.c
00009 *
00010 * Description:  Multiplies a Q15 vector by a scalar.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00060 void arm_scale_q15(
00061   q15_t * pSrc,
00062   q15_t scaleFract,
00063   int8_t shift,
00064   q15_t * pDst,
00065   uint32_t blockSize)
00066 {
00067   int8_t kShift = 15 - shift;                    /* shift to apply after scaling */
00068   uint32_t blkCnt;                               /* loop counter */
00069
00070 #ifndef ARM_MATH_CM0
00071
00072 /* Run the below code for Cortex-M4 and Cortex-M3 */
00073
00074   q15_t in1, in2;                                /* Temporary variables */
00075
00076
00077   /*loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079
00080   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00081    ** a second loop below computes the remaining 1 to 3 samples. */
00082   while(blkCnt > 0u)
00083   {
00084     /* Reading 2 inputs from memory */
00085     in1 = *pSrc++;
00086     in2 = *pSrc++;
00087     /* C = A * scale */
00088     /* Scale the inputs and then store the 2 results in the destination buffer
00089      * in single cycle by packing the outputs */
00090 #ifndef  ARM_MATH_BIG_ENDIAN
00091
00092     *__SIMD32(pDst)++ =
00093       __PKHBT(__SSAT((in1 * scaleFract) >> kShift, 16),
00094               __SSAT((in2 * scaleFract) >> kShift, 16), 16);
00095
00096 #else
00097
00098     *__SIMD32(pDst)++ =
00099       __PKHBT(__SSAT((in2 * scaleFract) >> kShift, 16),
00100               __SSAT((in1 * scaleFract) >> kShift, 16), 16);
00101
00102 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
00103
00104     in1 = *pSrc++;
00105     in2 = *pSrc++;
00106
00107 #ifndef  ARM_MATH_BIG_ENDIAN
00108
00109     *__SIMD32(pDst)++ =
00110       __PKHBT(__SSAT((in1 * scaleFract) >> kShift, 16),
00111               __SSAT((in2 * scaleFract) >> kShift, 16), 16);
00112
00113 #else
00114
00115     *__SIMD32(pDst)++ =
00116       __PKHBT(__SSAT((in2 * scaleFract) >> kShift, 16),
00117               __SSAT((in1 * scaleFract) >> kShift, 16), 16);
00118
00119 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
00120
00121     /* Decrement the loop counter */
00122     blkCnt--;
00123   }
00124
00125   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00126    ** No loop unrolling is used. */
00127   blkCnt = blockSize % 0x4u;
00128
00129   while(blkCnt > 0u)
00130   {
00131     /* C = A * scale */
00132     /* Scale the input and then store the result in the destination buffer. */
00133     *pDst++ = (q15_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 16));
00134
00135     /* Decrement the loop counter */
00136     blkCnt--;
00137   }
00138
00139 #else
00140
00141   /* Run the below code for Cortex-M0 */
00142
00143   /* Initialize blkCnt with number of samples */
00144   blkCnt = blockSize;
00145
00146   while(blkCnt > 0u)
00147   {
00148     /* C = A * scale */
00149     /* Scale the input and then store the result in the destination buffer. */
00150     *pDst++ = (q15_t) (__SSAT(((q31_t) * pSrc++ * scaleFract) >> kShift, 16));
00151
00152     /* Decrement the loop counter */
00153     blkCnt--;
00154   }
00155
00156 #endif /* #ifndef ARM_MATH_CM0 */
00157
00158 }
00159
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_scale_q31.c
00009 *
00010 * Description:  Multiplies a Q31 vector by a scalar.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00059 void arm_scale_q31(
00060   q31_t * pSrc,
00061   q31_t scaleFract,
00062   int8_t shift,
00063   q31_t * pDst,
00064   uint32_t blockSize)
00065 {
00066   int8_t kShift = 31 - shift;                    /* Shift to apply after scaling */
00067   uint32_t blkCnt;                               /* loop counter */
00068
00069 #ifndef ARM_MATH_CM0
00070
00071 /* Run the below code for Cortex-M4 and Cortex-M3 */
00072
00073   /*loop Unrolling */
00074   blkCnt = blockSize >> 2u;
00075
00076   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00077    ** a second loop below computes the remaining 1 to 3 samples. */
00078   while(blkCnt > 0u)
00079   {
00080     /* C = A * scale */
00081     /* Scale the input and then store the results in the destination buffer. */
00082     *pDst++ = clip_q63_to_q31(((q63_t) * pSrc++ * scaleFract) >> kShift);
00083     *pDst++ = clip_q63_to_q31(((q63_t) * pSrc++ * scaleFract) >> kShift);
00084     *pDst++ = clip_q63_to_q31(((q63_t) * pSrc++ * scaleFract) >> kShift);
00085     *pDst++ = clip_q63_to_q31(((q63_t) * pSrc++ * scaleFract) >> kShift);
00086
00087     /* Decrement the loop counter */
00088     blkCnt--;
00089   }
00090
00091   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00092    ** No loop unrolling is used. */
00093   blkCnt = blockSize % 0x4u;
00094
00095 #else
00096
00097   /* Run the below code for Cortex-M0 */
00098
00099   /* Initialize blkCnt with number of samples */
00100   blkCnt = blockSize;
00101
00102 #endif /* #ifndef ARM_MATH_CM0 */
00103
00104   while(blkCnt > 0u)
00105   {
00106     /* C = A * scale */
00107     /* Scale the input and then store the result in the destination buffer. */
00108     *pDst++ = clip_q63_to_q31(((q63_t) * pSrc++ * scaleFract) >> kShift);
00109
00110     /* Decrement the loop counter */
00111     blkCnt--;
00112   }
00113 }
00114
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_shift_q7.c
00009 *
00010 * Description:  Processing function for the Q7 Shifting
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00059 void arm_shift_q7(
00060   q7_t * pSrc,
00061   int8_t shiftBits,
00062   q7_t * pDst,
00063   uint32_t blockSize)
00064 {
00065   uint32_t blkCnt;                               /* loop counter */
00066   uint8_t sign;                                  /* Sign of shiftBits */
00067
00068 #ifndef ARM_MATH_CM0
00069
00070 /* Run the below code for Cortex-M4 and Cortex-M3 */
00071   q7_t in1;                                      /* Input value1 */
00072   q7_t in2;                                      /* Input value2 */
00073   q7_t in3;                                      /* Input value3 */
00074   q7_t in4;                                      /* Input value4 */
00075
00076
00077   /*loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079
00080   /* Getting the sign of shiftBits */
00081   sign = (shiftBits & 0x80);
00082
00083   /* If the shift value is positive then do right shift else left shift */
00084   if(sign == 0u)
00085   {
00086     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00087      ** a second loop below computes the remaining 1 to 3 samples. */
00088     while(blkCnt > 0u)
00089     {
00090       /* C = A << shiftBits */
00091       /* Read 4 inputs */
00092       in1 = *pSrc++;
00093       in2 = *pSrc++;
00094       in3 = *pSrc++;
00095       in4 = *pSrc++;
00096
00097       /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
00098       *__SIMD32(pDst)++ = __PACKq7(__SSAT((in1 << shiftBits), 8),
00099                                    __SSAT((in2 << shiftBits), 8),
00100                                    __SSAT((in3 << shiftBits), 8),
00101                                    __SSAT((in4 << shiftBits), 8));
00102
00103       /* Decrement the loop counter */
00104       blkCnt--;
00105     }
00106
00107     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00108      ** No loop unrolling is used. */
00109     blkCnt = blockSize % 0x4u;
00110
00111     while(blkCnt > 0u)
00112     {
00113       /* C = A << shiftBits */
00114       /* Shift the input and then store the result in the destination buffer. */
00115       *pDst++ = (q7_t) __SSAT((*pSrc++ << shiftBits), 8);
00116
00117       /* Decrement the loop counter */
00118       blkCnt--;
00119     }
00120   }
00121   else
00122   {
00123     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00124      ** a second loop below computes the remaining 1 to 3 samples. */
00125     while(blkCnt > 0u)
00126     {
00127       /* C = A >> shiftBits */
00128       /* Read 4 inputs */
00129       in1 = *pSrc++;
00130       in2 = *pSrc++;
00131       in3 = *pSrc++;
00132       in4 = *pSrc++;
00133
00134       /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
00135       *__SIMD32(pDst)++ = __PACKq7((in1 >> -shiftBits), (in2 >> -shiftBits),
00136                                    (in3 >> -shiftBits), (in4 >> -shiftBits));
00137
00138       /* Decrement the loop counter */
00139       blkCnt--;
00140     }
00141
00142     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00143      ** No loop unrolling is used. */
00144     blkCnt = blockSize % 0x4u;
00145
00146     while(blkCnt > 0u)
00147     {
00148       /* C = A >> shiftBits */
00149       /* Shift the input and then store the result in the destination buffer. */
00150       *pDst++ = (*pSrc++ >> -shiftBits);
00151
00152       /* Decrement the loop counter */
00153       blkCnt--;
00154     }
00155   }
00156
00157 #else
00158
00159   /* Run the below code for Cortex-M0 */
00160
00161   /* Getting the sign of shiftBits */
00162   sign = (shiftBits & 0x80);
00163
00164   /* If the shift value is positive then do right shift else left shift */
00165   if(sign == 0u)
00166   {
00167     /* Initialize blkCnt with number of samples */
00168     blkCnt = blockSize;
00169
00170     while(blkCnt > 0u)
00171     {
00172       /* C = A << shiftBits */
00173       /* Shift the input and then store the result in the destination buffer. */
00174       *pDst++ = (q7_t) __SSAT(((q15_t) * pSrc++ << shiftBits), 8);
00175
00176       /* Decrement the loop counter */
00177       blkCnt--;
00178     }
00179   }
00180   else
00181   {
00182     /* Initialize blkCnt with number of samples */
00183     blkCnt = blockSize;
00184
00185     while(blkCnt > 0u)
00186     {
00187       /* C = A >> shiftBits */
00188       /* Shift the input and then store the result in the destination buffer. */
00189       *pDst++ = (*pSrc++ >> -shiftBits);
00190
00191       /* Decrement the loop counter */
00192       blkCnt--;
00193     }
00194   }
00195
00196 #endif /* #ifndef ARM_MATH_CM0 */
00197
00198 }
00199
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_shift_q15.c
00009 *
00010 * Description:  Shifts the elements of a Q15 vector by a specified number of bits.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_shift_q15(
00059   q15_t * pSrc,
00060   int8_t shiftBits,
00061   q15_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   uint32_t blkCnt;                               /* loop counter */
00065   uint8_t sign;                                  /* Sign of shiftBits */
00066
00067 #ifndef ARM_MATH_CM0
00068
00069 /* Run the below code for Cortex-M4 and Cortex-M3 */
00070
00071   q15_t in1, in2;                                /* Temporary variables */
00072
00073
00074   /*loop Unrolling */
00075   blkCnt = blockSize >> 2u;
00076
00077   /* Getting the sign of shiftBits */
00078   sign = (shiftBits & 0x80);
00079
00080   /* If the shift value is positive then do right shift else left shift */
00081   if(sign == 0u)
00082   {
00083     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00084      ** a second loop below computes the remaining 1 to 3 samples. */
00085     while(blkCnt > 0u)
00086     {
00087       /* Read 2 inputs */
00088       in1 = *pSrc++;
00089       in2 = *pSrc++;
00090       /* C = A << shiftBits */
00091       /* Shift the inputs and then store the results in the destination buffer. */
00092 #ifndef  ARM_MATH_BIG_ENDIAN
00093
00094       *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
00095                                   __SSAT((in2 << shiftBits), 16), 16);
00096
00097 #else
00098
00099       *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
00100                                   __SSAT((in1 << shiftBits), 16), 16);
00101
00102 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
00103
00104       in1 = *pSrc++;
00105       in2 = *pSrc++;
00106
00107 #ifndef  ARM_MATH_BIG_ENDIAN
00108
00109       *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
00110                                   __SSAT((in2 << shiftBits), 16), 16);
00111
00112 #else
00113
00114       *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
00115                                   __SSAT((in1 << shiftBits), 16), 16);
00116
00117 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
00118
00119       /* Decrement the loop counter */
00120       blkCnt--;
00121     }
00122
00123     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00124      ** No loop unrolling is used. */
00125     blkCnt = blockSize % 0x4u;
00126
00127     while(blkCnt > 0u)
00128     {
00129       /* C = A << shiftBits */
00130       /* Shift and then store the results in the destination buffer. */
00131       *pDst++ = __SSAT((*pSrc++ << shiftBits), 16);
00132
00133       /* Decrement the loop counter */
00134       blkCnt--;
00135     }
00136   }
00137   else
00138   {
00139     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00140      ** a second loop below computes the remaining 1 to 3 samples. */
00141     while(blkCnt > 0u)
00142     {
00143       /* Read 2 inputs */
00144       in1 = *pSrc++;
00145       in2 = *pSrc++;
00146       /* C = A >> shiftBits */
00147       /* Shift the inputs and then store the results in the destination buffer. */
00148 #ifndef  ARM_MATH_BIG_ENDIAN
00149
00150       *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
00151                                   (in2 >> -shiftBits), 16);
00152
00153 #else
00154
00155       *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
00156                                   (in1 >> -shiftBits), 16);
00157
00158 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
00159
00160       in1 = *pSrc++;
00161       in2 = *pSrc++;
00162
00163 #ifndef  ARM_MATH_BIG_ENDIAN
00164
00165       *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
00166                                   (in2 >> -shiftBits), 16);
00167
00168 #else
00169
00170       *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
00171                                   (in1 >> -shiftBits), 16);
00172
00173 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
00174
00175       /* Decrement the loop counter */
00176       blkCnt--;
00177     }
00178
00179     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00180      ** No loop unrolling is used. */
00181     blkCnt = blockSize % 0x4u;
00182
00183     while(blkCnt > 0u)
00184     {
00185       /* C = A >> shiftBits */
00186       /* Shift the inputs and then store the results in the destination buffer. */
00187       *pDst++ = (*pSrc++ >> -shiftBits);
00188
00189       /* Decrement the loop counter */
00190       blkCnt--;
00191     }
00192   }
00193
00194 #else
00195
00196   /* Run the below code for Cortex-M0 */
00197
00198   /* Getting the sign of shiftBits */
00199   sign = (shiftBits & 0x80);
00200
00201   /* If the shift value is positive then do right shift else left shift */
00202   if(sign == 0u)
00203   {
00204     /* Initialize blkCnt with number of samples */
00205     blkCnt = blockSize;
00206
00207     while(blkCnt > 0u)
00208     {
00209       /* C = A << shiftBits */
00210       /* Shift and then store the results in the destination buffer. */
00211       *pDst++ = __SSAT(((q31_t) * pSrc++ << shiftBits), 16);
00212
00213       /* Decrement the loop counter */
00214       blkCnt--;
00215     }
00216   }
00217   else
00218   {
00219     /* Initialize blkCnt with number of samples */
00220     blkCnt = blockSize;
00221
00222     while(blkCnt > 0u)
00223     {
00224       /* C = A >> shiftBits */
00225       /* Shift the inputs and then store the results in the destination buffer. */
00226       *pDst++ = (*pSrc++ >> -shiftBits);
00227
00228       /* Decrement the loop counter */
00229       blkCnt--;
00230     }
00231   }
00232
00233 #endif /* #ifndef ARM_MATH_CM0 */
00234
00235 }
00236
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_shift_q31.c
00009 *
00010 * Description:  Shifts the elements of a Q31 vector by a specified number of bits.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00073 void arm_shift_q31(
00074   q31_t * pSrc,
00075   int8_t shiftBits,
00076   q31_t * pDst,
00077   uint32_t blockSize)
00078 {
00079   uint32_t blkCnt;                               /* loop counter */
00080   uint8_t sign;                                  /* Sign of shiftBits */
00081   /* Getting the sign of shiftBits */
00082   sign = (shiftBits & 0x80);
00083
00084
00085 #ifndef ARM_MATH_CM0
00086
00087 /* Run the below code for Cortex-M4 and Cortex-M3 */
00088   /*loop Unrolling */
00089   blkCnt = blockSize >> 2u;
00090
00091
00092   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00093    ** a second loop below computes the remaining 1 to 3 samples. */
00094   while(blkCnt > 0u)
00095   {
00096     /* C = A (>> or <<) shiftBits */
00097     /* Shift the input and then store the results in the destination buffer. */
00098     *pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
00099       (*pSrc++ >> -shiftBits);
00100     *pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
00101       (*pSrc++ >> -shiftBits);
00102     *pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
00103       (*pSrc++ >> -shiftBits);
00104     *pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
00105       (*pSrc++ >> -shiftBits);
00106
00107     /* Decrement the loop counter */
00108     blkCnt--;
00109   }
00110
00111   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00112    ** No loop unrolling is used. */
00113   blkCnt = blockSize % 0x4u;
00114
00115 #else
00116
00117   /* Run the below code for Cortex-M0 */
00118
00119
00120   /* Initialize blkCnt with number of samples */
00121   blkCnt = blockSize;
00122
00123 #endif /* #ifndef ARM_MATH_CM0 */
00124
00125
00126   while(blkCnt > 0u)
00127   {
00128     /* C = A (>> or <<) shiftBits */
00129     /* Shift the input and then store the result in the destination buffer. */
00130     *pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
00131       (*pSrc++ >> -shiftBits);
00132
00133     /* Decrement the loop counter */
00134     blkCnt--;
00135   }
00136
00137 }
00138
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM0.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM0.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM0.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM3.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM3.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM3.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM4.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/system_ARMCM4.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM4.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
00062     SCB->CPACR |= ((3UL << 10*2) |                 /* set CP10 Full Access */
00063                    (3UL << 11*2)  );               /* set CP11 Full Access */
00064   #endif
00065
00066   SystemCoreClock = __SYSTEM_CLOCK;
00067
00068 #ifdef __USE_GPIO
00069   ARM_GPIO0->DATA[0].WORD = 0;
00070   ARM_GPIO0->IE = 0;
00071   ARM_GPIO0->DIR = 0xff83;
00072
00073   ARM_GPIO1->DATA[0].WORD = 0;
00074   ARM_GPIO1->IE = 0;
00075   ARM_GPIO1->DIR = 0;
00076
00077   ARM_GPIO2->DATA[0].WORD = 0;
00078   ARM_GPIO2->IE = 0;
00079   ARM_GPIO2->DIR = 0;
00080 #endif
00081 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/arm_signal_converge_example_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_signal_converge_example/arm_signal_converge_example_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        29. November 2010
00005 * $Revision:    V1.0.3
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_signal_converge_example_f32.c
00009 *
00010 * Description:  Example code demonstrating convergence of an adaptive
00011 *               filter.
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3
00014 *
00015 *
00016 * Version 1.0.3 2010/11/29
00017 *    Re-organized the CMSIS folders and updated documentation.
00018 *
00019 * Version 1.0.1 2010/10/05 KK
00020 *    Production release and review comments incorporated.
00021 *
00022 * Version 1.0.0 2010/09/20 KK
00023 *    Production release and review comments incorporated.
00024 * ------------------------------------------------------------------- */
00025
00090 #include "arm_math.h"
00091 #include "math_helper.h"
00092
00093 /* ----------------------------------------------------------------------
00094 ** Global defines for the simulation
00095 * ------------------------------------------------------------------- */
00096
00097 #define TEST_LENGTH_SAMPLES 1536
00098 #define NUMTAPS                         32
00099 #define BLOCKSIZE                       32
00100 #define DELTA_ERROR         0.000001f
00101 #define DELTA_COEFF         0.0001f
00102 #define MU                                      0.5f
00103
00104 #define NUMFRAMES (TEST_LENGTH_SAMPLES / BLOCKSIZE)
00105
00106 /* ----------------------------------------------------------------------
00107 * Declare FIR state buffers and structure
00108 * ------------------------------------------------------------------- */
00109
00110 float32_t firStateF32[NUMTAPS + BLOCKSIZE];
00111 arm_fir_instance_f32 LPF_instance;
00112
00113 /* ----------------------------------------------------------------------
00114 * Declare LMSNorm state buffers and structure
00115 * ------------------------------------------------------------------- */
00116
00117 float32_t lmsStateF32[NUMTAPS + BLOCKSIZE];
00118 float32_t errOutput[TEST_LENGTH_SAMPLES];
00119 arm_lms_norm_instance_f32 lmsNorm_instance;
00120
00121
00122 /* ----------------------------------------------------------------------
00123 * Function Declarations for Signal Convergence Example
00124 * ------------------------------------------------------------------- */
00125
00126 arm_status test_signal_converge_example( void );
00127
00128
00129 /* ----------------------------------------------------------------------
00130 * Internal functions
00131 * ------------------------------------------------------------------- */
00132 arm_status test_signal_converge(float32_t* err_signal,
00133                                                      uint32_t blockSize);
00134
00135 void getinput(float32_t* input,
00136                  uint32_t fr_cnt,
00137              uint32_t blockSize);
00138
00139 /* ----------------------------------------------------------------------
00140 * External Declarations for FIR F32 module Test
00141 * ------------------------------------------------------------------- */
00142 extern float32_t testInput_f32[TEST_LENGTH_SAMPLES];
00143 extern float32_t lmsNormCoeff_f32[32];
00144 extern const float32_t FIRCoeff_f32[32];
00145 extern arm_lms_norm_instance_f32 lmsNorm_instance;
00146
00147 /* ----------------------------------------------------------------------
00148 * Declare I/O buffers
00149 * ------------------------------------------------------------------- */
00150
00151 float32_t wire1[BLOCKSIZE];
00152 float32_t wire2[BLOCKSIZE];
00153 float32_t wire3[BLOCKSIZE];
00154 float32_t err_signal[BLOCKSIZE];
00155
00156 /* ----------------------------------------------------------------------
00157 * Signal converge test
00158 * ------------------------------------------------------------------- */
00159
00160 int32_t main(void)
00161 {
00162   uint32_t i;
00163   arm_status status;
00164   uint32_t index;
00165   float32_t minValue;
00166
00167   /* Initialize the LMSNorm data structure */
00168   arm_lms_norm_init_f32(&lmsNorm_instance, NUMTAPS, lmsNormCoeff_f32, lmsStateF32, MU, BLOCKSIZE);
00169
00170   /* Initialize the FIR data structure */
00171   arm_fir_init_f32(&LPF_instance, NUMTAPS, (float32_t *)FIRCoeff_f32, firStateF32, BLOCKSIZE);
00172
00173   /* ----------------------------------------------------------------------
00174   * Loop over the frames of data and execute each of the processing
00175   * functions in the system.
00176   * ------------------------------------------------------------------- */
00177
00178   for(i=0; i < NUMFRAMES; i++)
00179     {
00180       /* Read the input data - uniformly distributed random noise - into wire1 */
00181       arm_copy_f32(testInput_f32 + (i * BLOCKSIZE), wire1, BLOCKSIZE);
00182
00183       /* Execute the FIR processing function.  Input wire1 and output wire2 */
00184       arm_fir_f32(&LPF_instance, wire1, wire2, BLOCKSIZE);
00185
00186       /* Execute the LMS Norm processing function*/
00187
00188       arm_lms_norm_f32(&lmsNorm_instance, /* LMSNorm instance */
00189                        wire1,                     /* Input signal */
00190                        wire2,                             /* Reference Signal */
00191                        wire3,                             /* Converged Signal */
00192                        err_signal,                        /* Error Signal, this will become small as the signal converges */
00193                        BLOCKSIZE);                        /* BlockSize */
00194
00195       /* apply overall gain */
00196       arm_scale_f32(wire3, 5, wire3, BLOCKSIZE);         /* in-place buffer */
00197     }
00198
00199   status = ARM_MATH_SUCCESS;
00200
00201   /* -------------------------------------------------------------------------------
00202   * Test whether the error signal has reached towards 0.
00203   * ----------------------------------------------------------------------------- */
00204
00205   arm_abs_f32(err_signal, err_signal, BLOCKSIZE);
00206   arm_min_f32(err_signal, BLOCKSIZE, &minValue, &index);
00207
00208   if (minValue > DELTA_ERROR)
00209   {
00210       status = ARM_MATH_TEST_FAILURE;
00211   }
00212
00213   /* ----------------------------------------------------------------------
00214   * Test whether the filter coefficients have converged.
00215   * ------------------------------------------------------------------- */
00216
00217   arm_sub_f32((float32_t *)FIRCoeff_f32, lmsNormCoeff_f32, lmsNormCoeff_f32, NUMTAPS);
00218
00219   arm_abs_f32(lmsNormCoeff_f32, lmsNormCoeff_f32, NUMTAPS);
00220   arm_min_f32(lmsNormCoeff_f32, NUMTAPS, &minValue, &index);
00221
00222   if (minValue > DELTA_COEFF)
00223   {
00224       status = ARM_MATH_TEST_FAILURE;
00225   }
00226
00227   /* ----------------------------------------------------------------------
00228   * Loop here if the signals did not pass the convergence check.
00229   * This denotes a test failure
00230   * ------------------------------------------------------------------- */
00231
00232   if( status != ARM_MATH_SUCCESS)
00233   {
00234       while(1);
00235   }
00236
00237     while(1);                             /* main function does not return */
00238 }
00239
00240
00241
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM0.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM0.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM0.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM3.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM3.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM3.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM4.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/system_ARMCM4.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM4.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
00062     SCB->CPACR |= ((3UL << 10*2) |                 /* set CP10 Full Access */
00063                    (3UL << 11*2)  );               /* set CP11 Full Access */
00064   #endif
00065
00066   SystemCoreClock = __SYSTEM_CLOCK;
00067
00068 #ifdef __USE_GPIO
00069   ARM_GPIO0->DATA[0].WORD = 0;
00070   ARM_GPIO0->IE = 0;
00071   ARM_GPIO0->DIR = 0xff83;
00072
00073   ARM_GPIO1->DATA[0].WORD = 0;
00074   ARM_GPIO1->IE = 0;
00075   ARM_GPIO1->DIR = 0;
00076
00077   ARM_GPIO2->DATA[0].WORD = 0;
00078   ARM_GPIO2->IE = 0;
00079   ARM_GPIO2->DIR = 0;
00080 #endif
00081 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/arm_sin_cos_example_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_sin_cos_example/arm_sin_cos_example_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        29. November 2010
00005 * $Revision:    V1.0.3
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_sin_cos_example_f32.c
00009 *
00010 * Description:  Example code demonstrating sin and cos calculation of input signal.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 *
00015 * Version 1.0.3 2010/11/29
00016 *    Re-organized the CMSIS folders and updated documentation.
00017 *
00018 * Version 1.0.1 2010/10/05 KK
00019 *    Production release and review comments incorporated.
00020 *
00021 * Version 1.0.0 2010/09/20 KK
00022 *    Production release and review comments incorporated.
00023 * ------------------------------------------------------------------- */
00024
00065 #include <math.h>
00066 #include "arm_math.h"
00067
00068 /* ----------------------------------------------------------------------
00069 * Defines each of the tests performed
00070 * ------------------------------------------------------------------- */
00071 #define MAX_BLOCKSIZE   32
00072 #define DELTA           (0.000001f)
00073
00074
00075 /* ----------------------------------------------------------------------
00076 * Test input data for Floating point sin_cos example for 32-blockSize
00077 * Generated by the MATLAB randn() function
00078 * ------------------------------------------------------------------- */
00079
00080 const float32_t testInput_f32[MAX_BLOCKSIZE] =
00081 {
00082         -1.244916875853235400,  -4.793533929171324800,  0.360705030233248850,   0.827929644170887320,   -3.299532218312426900,  3.427441903227623800,   3.422401784294607700,   -0.108308165334010680,
00083         0.941943896490312180,   0.502609575000365850,   -0.537345278736373500,  2.088817392965764500,   -1.693168684143455700,  6.283185307179590700,   -0.392545884746175080,  0.327893095115825040,
00084         3.070147440456292300,   0.170611405884662230,   -0.275275082396073010,  -2.395492805446796300,  0.847311163536506600,   -3.845517018083148800,  2.055818378415868300,   4.672594161978930800,
00085         -1.990923030266425800,  2.469305197656249500,   3.609002606064021000,   -4.586736582331667500,  -4.147080139136136300,  1.643756718868359500,   -1.150866392366494800,  1.985805026477433800
00086
00087
00088 };
00089
00090 const float32_t testRefOutput_f32 = 1.000000000;
00091
00092 /* ----------------------------------------------------------------------
00093 * Declare Global variables
00094 * ------------------------------------------------------------------- */
00095 uint32_t blockSize = 32;
00096 float32_t  testOutput;
00097 float32_t  cosOutput;
00098 float32_t  sinOutput;
00099 float32_t  cosSquareOutput;
00100 float32_t  sinSquareOutput;
00101
00102 /* ----------------------------------------------------------------------
00103 * Max magnitude FFT Bin test
00104 * ------------------------------------------------------------------- */
00105
00106 arm_status status;
00107
00108 int32_t main(void)
00109 {
00110         float32_t diff;
00111         uint32_t i;
00112
00113         for(i=0; i< blockSize; i++)
00114     {
00115         cosOutput = arm_cos_f32(testInput_f32[i]);
00116                 sinOutput = arm_sin_f32(testInput_f32[i]);
00117
00118                 arm_mult_f32(&cosOutput, &cosOutput, &cosSquareOutput, 1);
00119                 arm_mult_f32(&sinOutput, &sinOutput, &sinSquareOutput, 1);
00120
00121                 arm_add_f32(&cosSquareOutput, &sinSquareOutput, &testOutput, 1);
00122
00123                 /* absolute value of difference between ref and test */
00124             diff = fabsf(testRefOutput_f32 - testOutput);
00125
00126             /* Comparison of sin_cos value with reference */
00127             if(diff > DELTA)
00128             {
00129                    status = ARM_MATH_TEST_FAILURE;
00130             }
00131
00132             if( status == ARM_MATH_TEST_FAILURE)
00133             {
00134                while(1);
00135             }
00136
00137     }
00138
00139     while(1);                             /* main function does not return */
00140 }
00141
00142
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_sin_cos_q31.c
00009 *
00010 * Description:  Cosine & Sine calculation for Q31 values.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00051 static const int32_t sinTableQ31[360] = {
00052
00053   0x0, 0xfdc41e9b, 0xfb8869ce, 0xf94d0e2e, 0xf7123849, 0xf4d814a4, 0xf29ecfb2,
00054   0xf06695da,
00055   0xee2f9369, 0xebf9f498, 0xe9c5e582, 0xe7939223, 0xe5632654, 0xe334cdc9,
00056   0xe108b40d, 0xdedf047d,
00057   0xdcb7ea46, 0xda939061, 0xd8722192, 0xd653c860, 0xd438af17, 0xd220ffc0,
00058   0xd00ce422, 0xcdfc85bb,
00059   0xcbf00dbe, 0xc9e7a512, 0xc7e3744b, 0xc5e3a3a9, 0xc3e85b18, 0xc1f1c224,
00060   0xc0000000, 0xbe133b7c,
00061   0xbc2b9b05, 0xba4944a2, 0xb86c5df0, 0xb6950c1e, 0xb4c373ee, 0xb2f7b9af,
00062   0xb1320139, 0xaf726def,
00063   0xadb922b7, 0xac0641fb, 0xaa59eda4, 0xa8b4471a, 0xa7156f3c, 0xa57d8666,
00064   0xa3ecac65, 0xa263007d,
00065   0xa0e0a15f, 0x9f65ad2d, 0x9df24175, 0x9c867b2c, 0x9b2276b0, 0x99c64fc5,
00066   0x98722192, 0x9726069c,
00067   0x95e218c9, 0x94a6715d, 0x937328f5, 0x92485786, 0x9126145f, 0x900c7621,
00068   0x8efb92c2, 0x8df37f8b,
00069   0x8cf45113, 0x8bfe1b3f, 0x8b10f144, 0x8a2ce59f, 0x89520a1a, 0x88806fc4,
00070   0x87b826f7, 0x86f93f50,
00071   0x8643c7b3, 0x8597ce46, 0x84f56073, 0x845c8ae3, 0x83cd5982, 0x8347d77b,
00072   0x82cc0f36, 0x825a0a5b,
00073   0x81f1d1ce, 0x81936daf, 0x813ee55b, 0x80f43f69, 0x80b381ac, 0x807cb130,
00074   0x804fd23a, 0x802ce84c,
00075   0x8013f61d, 0x8004fda0, 0x80000000, 0x8004fda0, 0x8013f61d, 0x802ce84c,
00076   0x804fd23a, 0x807cb130,
00077   0x80b381ac, 0x80f43f69, 0x813ee55b, 0x81936daf, 0x81f1d1ce, 0x825a0a5b,
00078   0x82cc0f36, 0x8347d77b,
00079   0x83cd5982, 0x845c8ae3, 0x84f56073, 0x8597ce46, 0x8643c7b3, 0x86f93f50,
00080   0x87b826f7, 0x88806fc4,
00081   0x89520a1a, 0x8a2ce59f, 0x8b10f144, 0x8bfe1b3f, 0x8cf45113, 0x8df37f8b,
00082   0x8efb92c2, 0x900c7621,
00083   0x9126145f, 0x92485786, 0x937328f5, 0x94a6715d, 0x95e218c9, 0x9726069c,
00084   0x98722192, 0x99c64fc5,
00085   0x9b2276b0, 0x9c867b2c, 0x9df24175, 0x9f65ad2d, 0xa0e0a15f, 0xa263007d,
00086   0xa3ecac65, 0xa57d8666,
00087   0xa7156f3c, 0xa8b4471a, 0xaa59eda4, 0xac0641fb, 0xadb922b7, 0xaf726def,
00088   0xb1320139, 0xb2f7b9af,
00089   0xb4c373ee, 0xb6950c1e, 0xb86c5df0, 0xba4944a2, 0xbc2b9b05, 0xbe133b7c,
00090   0xc0000000, 0xc1f1c224,
00091   0xc3e85b18, 0xc5e3a3a9, 0xc7e3744b, 0xc9e7a512, 0xcbf00dbe, 0xcdfc85bb,
00092   0xd00ce422, 0xd220ffc0,
00093   0xd438af17, 0xd653c860, 0xd8722192, 0xda939061, 0xdcb7ea46, 0xdedf047d,
00094   0xe108b40d, 0xe334cdc9,
00095   0xe5632654, 0xe7939223, 0xe9c5e582, 0xebf9f498, 0xee2f9369, 0xf06695da,
00096   0xf29ecfb2, 0xf4d814a4,
00097   0xf7123849, 0xf94d0e2e, 0xfb8869ce, 0xfdc41e9b, 0x0, 0x23be165, 0x4779632,
00098   0x6b2f1d2,
00099   0x8edc7b7, 0xb27eb5c, 0xd61304e, 0xf996a26, 0x11d06c97, 0x14060b68,
00100   0x163a1a7e, 0x186c6ddd,
00101   0x1a9cd9ac, 0x1ccb3237, 0x1ef74bf3, 0x2120fb83, 0x234815ba, 0x256c6f9f,
00102   0x278dde6e, 0x29ac37a0,
00103   0x2bc750e9, 0x2ddf0040, 0x2ff31bde, 0x32037a45, 0x340ff242, 0x36185aee,
00104   0x381c8bb5, 0x3a1c5c57,
00105   0x3c17a4e8, 0x3e0e3ddc, 0x40000000, 0x41ecc484, 0x43d464fb, 0x45b6bb5e,
00106   0x4793a210, 0x496af3e2,
00107   0x4b3c8c12, 0x4d084651, 0x4ecdfec7, 0x508d9211, 0x5246dd49, 0x53f9be05,
00108   0x55a6125c, 0x574bb8e6,
00109   0x58ea90c4, 0x5a82799a, 0x5c13539b, 0x5d9cff83, 0x5f1f5ea1, 0x609a52d3,
00110   0x620dbe8b, 0x637984d4,
00111   0x64dd8950, 0x6639b03b, 0x678dde6e, 0x68d9f964, 0x6a1de737, 0x6b598ea3,
00112   0x6c8cd70b, 0x6db7a87a,
00113   0x6ed9eba1, 0x6ff389df, 0x71046d3e, 0x720c8075, 0x730baeed, 0x7401e4c1,
00114   0x74ef0ebc, 0x75d31a61,
00115   0x76adf5e6, 0x777f903c, 0x7847d909, 0x7906c0b0, 0x79bc384d, 0x7a6831ba,
00116   0x7b0a9f8d, 0x7ba3751d,
00117   0x7c32a67e, 0x7cb82885, 0x7d33f0ca, 0x7da5f5a5, 0x7e0e2e32, 0x7e6c9251,
00118   0x7ec11aa5, 0x7f0bc097,
00119   0x7f4c7e54, 0x7f834ed0, 0x7fb02dc6, 0x7fd317b4, 0x7fec09e3, 0x7ffb0260,
00120   0x7fffffff, 0x7ffb0260,
00121   0x7fec09e3, 0x7fd317b4, 0x7fb02dc6, 0x7f834ed0, 0x7f4c7e54, 0x7f0bc097,
00122   0x7ec11aa5, 0x7e6c9251,
00123   0x7e0e2e32, 0x7da5f5a5, 0x7d33f0ca, 0x7cb82885, 0x7c32a67e, 0x7ba3751d,
00124   0x7b0a9f8d, 0x7a6831ba,
00125   0x79bc384d, 0x7906c0b0, 0x7847d909, 0x777f903c, 0x76adf5e6, 0x75d31a61,
00126   0x74ef0ebc, 0x7401e4c1,
00127   0x730baeed, 0x720c8075, 0x71046d3e, 0x6ff389df, 0x6ed9eba1, 0x6db7a87a,
00128   0x6c8cd70b, 0x6b598ea3,
00129   0x6a1de737, 0x68d9f964, 0x678dde6e, 0x6639b03b, 0x64dd8950, 0x637984d4,
00130   0x620dbe8b, 0x609a52d3,
00131   0x5f1f5ea1, 0x5d9cff83, 0x5c13539b, 0x5a82799a, 0x58ea90c4, 0x574bb8e6,
00132   0x55a6125c, 0x53f9be05,
00133   0x5246dd49, 0x508d9211, 0x4ecdfec7, 0x4d084651, 0x4b3c8c12, 0x496af3e2,
00134   0x4793a210, 0x45b6bb5e,
00135   0x43d464fb, 0x41ecc484, 0x40000000, 0x3e0e3ddc, 0x3c17a4e8, 0x3a1c5c57,
00136   0x381c8bb5, 0x36185aee,
00137   0x340ff242, 0x32037a45, 0x2ff31bde, 0x2ddf0040, 0x2bc750e9, 0x29ac37a0,
00138   0x278dde6e, 0x256c6f9f,
00139   0x234815ba, 0x2120fb83, 0x1ef74bf3, 0x1ccb3237, 0x1a9cd9ac, 0x186c6ddd,
00140   0x163a1a7e, 0x14060b68,
00141   0x11d06c97, 0xf996a26, 0xd61304e, 0xb27eb5c, 0x8edc7b7, 0x6b2f1d2,
00142   0x4779632, 0x23be165,
00143
00144
00145 };
00146
00157 static const int32_t cosTableQ31[360] = {
00158   0x80000000, 0x8004fda0, 0x8013f61d, 0x802ce84c, 0x804fd23a, 0x807cb130,
00159   0x80b381ac, 0x80f43f69,
00160   0x813ee55b, 0x81936daf, 0x81f1d1ce, 0x825a0a5b, 0x82cc0f36, 0x8347d77b,
00161   0x83cd5982, 0x845c8ae3,
00162   0x84f56073, 0x8597ce46, 0x8643c7b3, 0x86f93f50, 0x87b826f7, 0x88806fc4,
00163   0x89520a1a, 0x8a2ce59f,
00164   0x8b10f144, 0x8bfe1b3f, 0x8cf45113, 0x8df37f8b, 0x8efb92c2, 0x900c7621,
00165   0x9126145f, 0x92485786,
00166   0x937328f5, 0x94a6715d, 0x95e218c9, 0x9726069c, 0x98722192, 0x99c64fc5,
00167   0x9b2276b0, 0x9c867b2c,
00168   0x9df24175, 0x9f65ad2d, 0xa0e0a15f, 0xa263007d, 0xa3ecac65, 0xa57d8666,
00169   0xa7156f3c, 0xa8b4471a,
00170   0xaa59eda4, 0xac0641fb, 0xadb922b7, 0xaf726def, 0xb1320139, 0xb2f7b9af,
00171   0xb4c373ee, 0xb6950c1e,
00172   0xb86c5df0, 0xba4944a2, 0xbc2b9b05, 0xbe133b7c, 0xc0000000, 0xc1f1c224,
00173   0xc3e85b18, 0xc5e3a3a9,
00174   0xc7e3744b, 0xc9e7a512, 0xcbf00dbe, 0xcdfc85bb, 0xd00ce422, 0xd220ffc0,
00175   0xd438af17, 0xd653c860,
00176   0xd8722192, 0xda939061, 0xdcb7ea46, 0xdedf047d, 0xe108b40d, 0xe334cdc9,
00177   0xe5632654, 0xe7939223,
00178   0xe9c5e582, 0xebf9f498, 0xee2f9369, 0xf06695da, 0xf29ecfb2, 0xf4d814a4,
00179   0xf7123849, 0xf94d0e2e,
00180   0xfb8869ce, 0xfdc41e9b, 0x0, 0x23be165, 0x4779632, 0x6b2f1d2, 0x8edc7b7,
00181   0xb27eb5c,
00182   0xd61304e, 0xf996a26, 0x11d06c97, 0x14060b68, 0x163a1a7e, 0x186c6ddd,
00183   0x1a9cd9ac, 0x1ccb3237,
00184   0x1ef74bf3, 0x2120fb83, 0x234815ba, 0x256c6f9f, 0x278dde6e, 0x29ac37a0,
00185   0x2bc750e9, 0x2ddf0040,
00186   0x2ff31bde, 0x32037a45, 0x340ff242, 0x36185aee, 0x381c8bb5, 0x3a1c5c57,
00187   0x3c17a4e8, 0x3e0e3ddc,
00188   0x40000000, 0x41ecc484, 0x43d464fb, 0x45b6bb5e, 0x4793a210, 0x496af3e2,
00189   0x4b3c8c12, 0x4d084651,
00190   0x4ecdfec7, 0x508d9211, 0x5246dd49, 0x53f9be05, 0x55a6125c, 0x574bb8e6,
00191   0x58ea90c4, 0x5a82799a,
00192   0x5c13539b, 0x5d9cff83, 0x5f1f5ea1, 0x609a52d3, 0x620dbe8b, 0x637984d4,
00193   0x64dd8950, 0x6639b03b,
00194   0x678dde6e, 0x68d9f964, 0x6a1de737, 0x6b598ea3, 0x6c8cd70b, 0x6db7a87a,
00195   0x6ed9eba1, 0x6ff389df,
00196   0x71046d3e, 0x720c8075, 0x730baeed, 0x7401e4c1, 0x74ef0ebc, 0x75d31a61,
00197   0x76adf5e6, 0x777f903c,
00198   0x7847d909, 0x7906c0b0, 0x79bc384d, 0x7a6831ba, 0x7b0a9f8d, 0x7ba3751d,
00199   0x7c32a67e, 0x7cb82885,
00200   0x7d33f0ca, 0x7da5f5a5, 0x7e0e2e32, 0x7e6c9251, 0x7ec11aa5, 0x7f0bc097,
00201   0x7f4c7e54, 0x7f834ed0,
00202   0x7fb02dc6, 0x7fd317b4, 0x7fec09e3, 0x7ffb0260, 0x7fffffff, 0x7ffb0260,
00203   0x7fec09e3, 0x7fd317b4,
00204   0x7fb02dc6, 0x7f834ed0, 0x7f4c7e54, 0x7f0bc097, 0x7ec11aa5, 0x7e6c9251,
00205   0x7e0e2e32, 0x7da5f5a5,
00206   0x7d33f0ca, 0x7cb82885, 0x7c32a67e, 0x7ba3751d, 0x7b0a9f8d, 0x7a6831ba,
00207   0x79bc384d, 0x7906c0b0,
00208   0x7847d909, 0x777f903c, 0x76adf5e6, 0x75d31a61, 0x74ef0ebc, 0x7401e4c1,
00209   0x730baeed, 0x720c8075,
00210   0x71046d3e, 0x6ff389df, 0x6ed9eba1, 0x6db7a87a, 0x6c8cd70b, 0x6b598ea3,
00211   0x6a1de737, 0x68d9f964,
00212   0x678dde6e, 0x6639b03b, 0x64dd8950, 0x637984d4, 0x620dbe8b, 0x609a52d3,
00213   0x5f1f5ea1, 0x5d9cff83,
00214   0x5c13539b, 0x5a82799a, 0x58ea90c4, 0x574bb8e6, 0x55a6125c, 0x53f9be05,
00215   0x5246dd49, 0x508d9211,
00216   0x4ecdfec7, 0x4d084651, 0x4b3c8c12, 0x496af3e2, 0x4793a210, 0x45b6bb5e,
00217   0x43d464fb, 0x41ecc484,
00218   0x40000000, 0x3e0e3ddc, 0x3c17a4e8, 0x3a1c5c57, 0x381c8bb5, 0x36185aee,
00219   0x340ff242, 0x32037a45,
00220   0x2ff31bde, 0x2ddf0040, 0x2bc750e9, 0x29ac37a0, 0x278dde6e, 0x256c6f9f,
00221   0x234815ba, 0x2120fb83,
00222   0x1ef74bf3, 0x1ccb3237, 0x1a9cd9ac, 0x186c6ddd, 0x163a1a7e, 0x14060b68,
00223   0x11d06c97, 0xf996a26,
00224   0xd61304e, 0xb27eb5c, 0x8edc7b7, 0x6b2f1d2, 0x4779632, 0x23be165, 0x0,
00225   0xfdc41e9b,
00226   0xfb8869ce, 0xf94d0e2e, 0xf7123849, 0xf4d814a4, 0xf29ecfb2, 0xf06695da,
00227   0xee2f9369, 0xebf9f498,
00228   0xe9c5e582, 0xe7939223, 0xe5632654, 0xe334cdc9, 0xe108b40d, 0xdedf047d,
00229   0xdcb7ea46, 0xda939061,
00230   0xd8722192, 0xd653c860, 0xd438af17, 0xd220ffc0, 0xd00ce422, 0xcdfc85bb,
00231   0xcbf00dbe, 0xc9e7a512,
00232   0xc7e3744b, 0xc5e3a3a9, 0xc3e85b18, 0xc1f1c224, 0xc0000000, 0xbe133b7c,
00233   0xbc2b9b05, 0xba4944a2,
00234   0xb86c5df0, 0xb6950c1e, 0xb4c373ee, 0xb2f7b9af, 0xb1320139, 0xaf726def,
00235   0xadb922b7, 0xac0641fb,
00236   0xaa59eda4, 0xa8b4471a, 0xa7156f3c, 0xa57d8666, 0xa3ecac65, 0xa263007d,
00237   0xa0e0a15f, 0x9f65ad2d,
00238   0x9df24175, 0x9c867b2c, 0x9b2276b0, 0x99c64fc5, 0x98722192, 0x9726069c,
00239   0x95e218c9, 0x94a6715d,
00240   0x937328f5, 0x92485786, 0x9126145f, 0x900c7621, 0x8efb92c2, 0x8df37f8b,
00241   0x8cf45113, 0x8bfe1b3f,
00242   0x8b10f144, 0x8a2ce59f, 0x89520a1a, 0x88806fc4, 0x87b826f7, 0x86f93f50,
00243   0x8643c7b3, 0x8597ce46,
00244   0x84f56073, 0x845c8ae3, 0x83cd5982, 0x8347d77b, 0x82cc0f36, 0x825a0a5b,
00245   0x81f1d1ce, 0x81936daf,
00246   0x813ee55b, 0x80f43f69, 0x80b381ac, 0x807cb130, 0x804fd23a, 0x802ce84c,
00247   0x8013f61d, 0x8004fda0,
00248
00249 };
00250
00251
00264 void arm_sin_cos_q31(
00265   q31_t theta,
00266   q31_t * pSinVal,
00267   q31_t * pCosVal)
00268 {
00269   q31_t x0;                                      /* Nearest input value */
00270   q31_t y0, y1;                                  /* Nearest output values */
00271   q31_t xSpacing = INPUT_SPACING;                /* Spaing between inputs */
00272   uint32_t i;                                    /* Index */
00273   q31_t oneByXSpacing;                           /* 1/ xSpacing value */
00274   q31_t out;                                     /* temporary variable */
00275   uint32_t sign_bits;                            /* No.of sign bits */
00276   uint32_t firstX = 0x80000000;                  /* First X value */
00277
00278   /* Calculation of index */
00279   i = ((uint32_t) theta - firstX) / (uint32_t) xSpacing;
00280
00281   /* Calculation of first nearest input value */
00282   x0 = (q31_t) firstX + ((q31_t) i * xSpacing);
00283
00284   /* Reading nearest sine output values from table */
00285   y0 = sinTableQ31[i];
00286   y1 = sinTableQ31[i + 1u];
00287
00288   /* Calculation of 1/(x1-x0) */
00289   /* (x1-x0) is xSpacing which is fixed value */
00290   sign_bits = 8u;
00291   oneByXSpacing = 0x5A000000;
00292
00293   /* Calculation of (theta - x0)/(x1-x0) */
00294   out =
00295     (((q31_t) (((q63_t) (theta - x0) * oneByXSpacing) >> 32)) << sign_bits);
00296
00297   /* Calculation of y0 + (y1 - y0) * ((theta - x0)/(x1-x0)) */
00298   *pSinVal = y0 + ((q31_t) (((q63_t) (y1 - y0) * out) >> 30));
00299
00300   /* Reading nearest cosine output values from table */
00301   y0 = cosTableQ31[i];
00302   y1 = cosTableQ31[i + 1u];
00303
00304   /* Calculation of y0 + (y1 - y0) * ((theta - x0)/(x1-x0)) */
00305   *pCosVal = y0 + ((q31_t) (((q63_t) (y1 - y0) * out) >> 30));
00306
00307 }
00308
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_sin_f32.c
00009 *
00010 * Description:  Fast sine calculation for floating-point values.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00088 static const float32_t sinTable[259] = {
00089   -0.024541229009628296f, 0.000000000000000000f, 0.024541229009628296f,
00090   0.049067676067352295f, 0.073564566671848297f, 0.098017141222953796f,
00091   0.122410677373409270f, 0.146730467677116390f,
00092   0.170961886644363400f, 0.195090323686599730f, 0.219101235270500180f,
00093   0.242980182170867920f, 0.266712754964828490f, 0.290284663438797000f,
00094   0.313681751489639280f, 0.336889863014221190f,
00095   0.359895050525665280f, 0.382683426141738890f, 0.405241310596466060f,
00096   0.427555084228515630f, 0.449611335992813110f, 0.471396744251251220f,
00097   0.492898195981979370f, 0.514102756977081300f,
00098   0.534997642040252690f, 0.555570244789123540f, 0.575808167457580570f,
00099   0.595699310302734380f, 0.615231573581695560f, 0.634393274784088130f,
00100   0.653172850608825680f, 0.671558976173400880f,
00101   0.689540565013885500f, 0.707106769084930420f, 0.724247097969055180f,
00102   0.740951120853424070f, 0.757208824157714840f, 0.773010432720184330f,
00103   0.788346409797668460f, 0.803207516670227050f,
00104   0.817584812641143800f, 0.831469595432281490f, 0.844853579998016360f,
00105   0.857728600502014160f, 0.870086967945098880f, 0.881921291351318360f,
00106   0.893224298954010010f, 0.903989315032958980f,
00107   0.914209783077239990f, 0.923879504203796390f, 0.932992815971374510f,
00108   0.941544055938720700f, 0.949528157711029050f, 0.956940352916717530f,
00109   0.963776051998138430f, 0.970031261444091800f,
00110   0.975702106952667240f, 0.980785250663757320f, 0.985277652740478520f,
00111   0.989176511764526370f, 0.992479562759399410f, 0.995184719562530520f,
00112   0.997290432453155520f, 0.998795449733734130f,
00113   0.999698817729949950f, 1.000000000000000000f, 0.999698817729949950f,
00114   0.998795449733734130f, 0.997290432453155520f, 0.995184719562530520f,
00115   0.992479562759399410f, 0.989176511764526370f,
00116   0.985277652740478520f, 0.980785250663757320f, 0.975702106952667240f,
00117   0.970031261444091800f, 0.963776051998138430f, 0.956940352916717530f,
00118   0.949528157711029050f, 0.941544055938720700f,
00119   0.932992815971374510f, 0.923879504203796390f, 0.914209783077239990f,
00120   0.903989315032958980f, 0.893224298954010010f, 0.881921291351318360f,
00121   0.870086967945098880f, 0.857728600502014160f,
00122   0.844853579998016360f, 0.831469595432281490f, 0.817584812641143800f,
00123   0.803207516670227050f, 0.788346409797668460f, 0.773010432720184330f,
00124   0.757208824157714840f, 0.740951120853424070f,
00125   0.724247097969055180f, 0.707106769084930420f, 0.689540565013885500f,
00126   0.671558976173400880f, 0.653172850608825680f, 0.634393274784088130f,
00127   0.615231573581695560f, 0.595699310302734380f,
00128   0.575808167457580570f, 0.555570244789123540f, 0.534997642040252690f,
00129   0.514102756977081300f, 0.492898195981979370f, 0.471396744251251220f,
00130   0.449611335992813110f, 0.427555084228515630f,
00131   0.405241310596466060f, 0.382683426141738890f, 0.359895050525665280f,
00132   0.336889863014221190f, 0.313681751489639280f, 0.290284663438797000f,
00133   0.266712754964828490f, 0.242980182170867920f,
00134   0.219101235270500180f, 0.195090323686599730f, 0.170961886644363400f,
00135   0.146730467677116390f, 0.122410677373409270f, 0.098017141222953796f,
00136   0.073564566671848297f, 0.049067676067352295f,
00137   0.024541229009628296f, 0.000000000000000122f, -0.024541229009628296f,
00138   -0.049067676067352295f, -0.073564566671848297f, -0.098017141222953796f,
00139   -0.122410677373409270f, -0.146730467677116390f,
00140   -0.170961886644363400f, -0.195090323686599730f, -0.219101235270500180f,
00141   -0.242980182170867920f, -0.266712754964828490f, -0.290284663438797000f,
00142   -0.313681751489639280f, -0.336889863014221190f,
00143   -0.359895050525665280f, -0.382683426141738890f, -0.405241310596466060f,
00144   -0.427555084228515630f, -0.449611335992813110f, -0.471396744251251220f,
00145   -0.492898195981979370f, -0.514102756977081300f,
00146   -0.534997642040252690f, -0.555570244789123540f, -0.575808167457580570f,
00147   -0.595699310302734380f, -0.615231573581695560f, -0.634393274784088130f,
00148   -0.653172850608825680f, -0.671558976173400880f,
00149   -0.689540565013885500f, -0.707106769084930420f, -0.724247097969055180f,
00150   -0.740951120853424070f, -0.757208824157714840f, -0.773010432720184330f,
00151   -0.788346409797668460f, -0.803207516670227050f,
00152   -0.817584812641143800f, -0.831469595432281490f, -0.844853579998016360f,
00153   -0.857728600502014160f, -0.870086967945098880f, -0.881921291351318360f,
00154   -0.893224298954010010f, -0.903989315032958980f,
00155   -0.914209783077239990f, -0.923879504203796390f, -0.932992815971374510f,
00156   -0.941544055938720700f, -0.949528157711029050f, -0.956940352916717530f,
00157   -0.963776051998138430f, -0.970031261444091800f,
00158   -0.975702106952667240f, -0.980785250663757320f, -0.985277652740478520f,
00159   -0.989176511764526370f, -0.992479562759399410f, -0.995184719562530520f,
00160   -0.997290432453155520f, -0.998795449733734130f,
00161   -0.999698817729949950f, -1.000000000000000000f, -0.999698817729949950f,
00162   -0.998795449733734130f, -0.997290432453155520f, -0.995184719562530520f,
00163   -0.992479562759399410f, -0.989176511764526370f,
00164   -0.985277652740478520f, -0.980785250663757320f, -0.975702106952667240f,
00165   -0.970031261444091800f, -0.963776051998138430f, -0.956940352916717530f,
00166   -0.949528157711029050f, -0.941544055938720700f,
00167   -0.932992815971374510f, -0.923879504203796390f, -0.914209783077239990f,
00168   -0.903989315032958980f, -0.893224298954010010f, -0.881921291351318360f,
00169   -0.870086967945098880f, -0.857728600502014160f,
00170   -0.844853579998016360f, -0.831469595432281490f, -0.817584812641143800f,
00171   -0.803207516670227050f, -0.788346409797668460f, -0.773010432720184330f,
00172   -0.757208824157714840f, -0.740951120853424070f,
00173   -0.724247097969055180f, -0.707106769084930420f, -0.689540565013885500f,
00174   -0.671558976173400880f, -0.653172850608825680f, -0.634393274784088130f,
00175   -0.615231573581695560f, -0.595699310302734380f,
00176   -0.575808167457580570f, -0.555570244789123540f, -0.534997642040252690f,
00177   -0.514102756977081300f, -0.492898195981979370f, -0.471396744251251220f,
00178   -0.449611335992813110f, -0.427555084228515630f,
00179   -0.405241310596466060f, -0.382683426141738890f, -0.359895050525665280f,
00180   -0.336889863014221190f, -0.313681751489639280f, -0.290284663438797000f,
00181   -0.266712754964828490f, -0.242980182170867920f,
00182   -0.219101235270500180f, -0.195090323686599730f, -0.170961886644363400f,
00183   -0.146730467677116390f, -0.122410677373409270f, -0.098017141222953796f,
00184   -0.073564566671848297f, -0.049067676067352295f,
00185   -0.024541229009628296f, -0.000000000000000245f, 0.024541229009628296f
00186 };
00187
00188
00195 float32_t arm_sin_f32(
00196   float32_t x)
00197 {
00198   float32_t sinVal, fract, in;                   /* Temporary variables for input, output */
00199   uint32_t index;                                /* Index variable */
00200   uint32_t tableSize = (uint32_t) TABLE_SIZE;    /* Initialise tablesize */
00201   float32_t wa, wb, wc, wd;                      /* Cubic interpolation coefficients */
00202   float32_t a, b, c, d;                          /* Four nearest output values */
00203   float32_t *tablePtr;                           /* Pointer to table */
00204   int32_t n;
00205
00206   /* input x is in radians */
00207   /* Scale the input to [0 1] range from [0 2*PI] , divide input by 2*pi */
00208   in = x * 0.159154943092f;
00209
00210   /* Calculation of floor value of input */
00211   n = (int32_t) in;
00212
00213   /* Make negative values towards -infinity */
00214   if(x < 0.0f)
00215   {
00216     n = n - 1;
00217   }
00218
00219   /* Map input value to [0 1] */
00220   in = in - (float32_t) n;
00221
00222   /* Calculation of index of the table */
00223   index = (uint32_t) (tableSize * in);
00224
00225   /* fractional value calculation */
00226   fract = ((float32_t) tableSize * in) - (float32_t) index;
00227
00228   /* Initialise table pointer */
00229   tablePtr = (float32_t *) & sinTable[index];
00230
00231   /* Read four nearest values of output value from the sin table */
00232   a = *tablePtr++;
00233   b = *tablePtr++;
00234   c = *tablePtr++;
00235   d = *tablePtr++;
00236
00237   /* Cubic interpolation process */
00238   wa = -(((0.166666667f) * (fract * (fract * fract))) +
00239          ((0.3333333333333f) * fract)) + ((0.5f) * (fract * fract));
00240   wb = (((0.5f) * (fract * (fract * fract))) -
00241         ((fract * fract) + ((0.5f) * fract))) + 1.0f;
00242   wc = (-((0.5f) * (fract * (fract * fract))) +
00243         ((0.5f) * (fract * fract))) + fract;
00244   wd = ((0.166666667f) * (fract * (fract * fract))) -
00245     ((0.166666667f) * fract);
00246
00247   /* Calculate sin value */
00248   sinVal = ((a * wa) + (b * wb)) + ((c * wc) + (d * wd));
00249
00250   /* Return the output value */
00251   return (sinVal);
00252
00253 }
00254
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_sin_q15.c
00009 *
00010 * Description:  Fast sine calculation for Q15 values.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00061 static const q15_t sinTableQ15[259] = {
00062   0xfcdc, 0x0, 0x324, 0x648, 0x96b, 0xc8c, 0xfab, 0x12c8,
00063   0x15e2, 0x18f9, 0x1c0c, 0x1f1a, 0x2224, 0x2528, 0x2827, 0x2b1f,
00064   0x2e11, 0x30fc, 0x33df, 0x36ba, 0x398d, 0x3c57, 0x3f17, 0x41ce,
00065   0x447b, 0x471d, 0x49b4, 0x4c40, 0x4ec0, 0x5134, 0x539b, 0x55f6,
00066   0x5843, 0x5a82, 0x5cb4, 0x5ed7, 0x60ec, 0x62f2, 0x64e9, 0x66d0,
00067   0x68a7, 0x6a6e, 0x6c24, 0x6dca, 0x6f5f, 0x70e3, 0x7255, 0x73b6,
00068   0x7505, 0x7642, 0x776c, 0x7885, 0x798a, 0x7a7d, 0x7b5d, 0x7c2a,
00069   0x7ce4, 0x7d8a, 0x7e1e, 0x7e9d, 0x7f0a, 0x7f62, 0x7fa7, 0x7fd9,
00070   0x7ff6, 0x7fff, 0x7ff6, 0x7fd9, 0x7fa7, 0x7f62, 0x7f0a, 0x7e9d,
00071   0x7e1e, 0x7d8a, 0x7ce4, 0x7c2a, 0x7b5d, 0x7a7d, 0x798a, 0x7885,
00072   0x776c, 0x7642, 0x7505, 0x73b6, 0x7255, 0x70e3, 0x6f5f, 0x6dca,
00073   0x6c24, 0x6a6e, 0x68a7, 0x66d0, 0x64e9, 0x62f2, 0x60ec, 0x5ed7,
00074   0x5cb4, 0x5a82, 0x5843, 0x55f6, 0x539b, 0x5134, 0x4ec0, 0x4c40,
00075   0x49b4, 0x471d, 0x447b, 0x41ce, 0x3f17, 0x3c57, 0x398d, 0x36ba,
00076   0x33df, 0x30fc, 0x2e11, 0x2b1f, 0x2827, 0x2528, 0x2224, 0x1f1a,
00077   0x1c0c, 0x18f9, 0x15e2, 0x12c8, 0xfab, 0xc8c, 0x96b, 0x648,
00078   0x324, 0x0, 0xfcdc, 0xf9b8, 0xf695, 0xf374, 0xf055, 0xed38,
00079   0xea1e, 0xe707, 0xe3f4, 0xe0e6, 0xdddc, 0xdad8, 0xd7d9, 0xd4e1,
00080   0xd1ef, 0xcf04, 0xcc21, 0xc946, 0xc673, 0xc3a9, 0xc0e9, 0xbe32,
00081   0xbb85, 0xb8e3, 0xb64c, 0xb3c0, 0xb140, 0xaecc, 0xac65, 0xaa0a,
00082   0xa7bd, 0xa57e, 0xa34c, 0xa129, 0x9f14, 0x9d0e, 0x9b17, 0x9930,
00083   0x9759, 0x9592, 0x93dc, 0x9236, 0x90a1, 0x8f1d, 0x8dab, 0x8c4a,
00084   0x8afb, 0x89be, 0x8894, 0x877b, 0x8676, 0x8583, 0x84a3, 0x83d6,
00085   0x831c, 0x8276, 0x81e2, 0x8163, 0x80f6, 0x809e, 0x8059, 0x8027,
00086   0x800a, 0x8000, 0x800a, 0x8027, 0x8059, 0x809e, 0x80f6, 0x8163,
00087   0x81e2, 0x8276, 0x831c, 0x83d6, 0x84a3, 0x8583, 0x8676, 0x877b,
00088   0x8894, 0x89be, 0x8afb, 0x8c4a, 0x8dab, 0x8f1d, 0x90a1, 0x9236,
00089   0x93dc, 0x9592, 0x9759, 0x9930, 0x9b17, 0x9d0e, 0x9f14, 0xa129,
00090   0xa34c, 0xa57e, 0xa7bd, 0xaa0a, 0xac65, 0xaecc, 0xb140, 0xb3c0,
00091   0xb64c, 0xb8e3, 0xbb85, 0xbe32, 0xc0e9, 0xc3a9, 0xc673, 0xc946,
00092   0xcc21, 0xcf04, 0xd1ef, 0xd4e1, 0xd7d9, 0xdad8, 0xdddc, 0xe0e6,
00093   0xe3f4, 0xe707, 0xea1e, 0xed38, 0xf055, 0xf374, 0xf695, 0xf9b8,
00094   0xfcdc, 0x0, 0x324
00095 };
00096
00097
00106 q15_t arm_sin_q15(
00107   q15_t x)
00108 {
00109   q31_t sinVal;                                  /* Temporary variables output */
00110   q15_t *tablePtr;                               /* Pointer to table */
00111   q15_t fract, in, in2;                          /* Temporary variables for input, output */
00112   q31_t wa, wb, wc, wd;                          /* Cubic interpolation coefficients */
00113   q15_t a, b, c, d;                              /* Four nearest output values */
00114   q15_t fractCube, fractSquare;                  /* Temporary values for fractional value */
00115   q15_t oneBy6 = 0x1555;                         /* Fixed point value of 1/6 */
00116   q15_t tableSpacing = TABLE_SPACING_Q15;        /* Table spacing */
00117   int32_t index;                                 /* Index variable */
00118
00119   in = x;
00120
00121   /* Calculate the nearest index */
00122   index = (int32_t) in / tableSpacing;
00123
00124   /* Calculate the nearest value of input */
00125   in2 = (q15_t) ((index) * tableSpacing);
00126
00127   /* Calculation of fractional value */
00128   fract = (in - in2) << 8;
00129
00130   /* fractSquare = fract * fract */
00131   fractSquare = (q15_t) ((fract * fract) >> 15);
00132
00133   /* fractCube = fract * fract * fract */
00134   fractCube = (q15_t) ((fractSquare * fract) >> 15);
00135
00136   /* Initialise table pointer */
00137   tablePtr = (q15_t *) & sinTableQ15[index];
00138
00139   /* Cubic interpolation process */
00140   /* Calculation of wa */
00141   /* wa = -(oneBy6)*fractCube + (fractSquare >> 1u) - (0x2AAA)*fract; */
00142   wa = (q31_t) oneBy6 *fractCube;
00143   wa += (q31_t) 0x2AAA *fract;
00144   wa = -(wa >> 15);
00145   wa += ((q31_t) fractSquare >> 1u);
00146
00147   /* Read first nearest value of output from the sin table */
00148   a = *tablePtr++;
00149
00150   /* sinVal = a * wa */
00151   sinVal = a * wa;
00152
00153   /* Calculation of wb */
00154   wb = (((q31_t) fractCube >> 1u) - (q31_t) fractSquare) -
00155     (((q31_t) fract >> 1u) - 0x7FFF);
00156
00157   /* Read second nearest value of output from the sin table */
00158   b = *tablePtr++;
00159
00160   /*      sinVal += b*wb */
00161   sinVal += b * wb;
00162
00163
00164   /* Calculation of wc */
00165   wc = -(q31_t) fractCube + fractSquare;
00166   wc = (wc >> 1u) + fract;
00167
00168   /* Read third nearest value of output from the sin table */
00169   c = *tablePtr++;
00170
00171   /*      sinVal += c*wc */
00172   sinVal += c * wc;
00173
00174   /* Calculation of wd */
00175   /* wd = (oneBy6)*fractCube - (oneBy6)*fract; */
00176   fractCube = fractCube - fract;
00177   wd = ((q15_t) (((q31_t) oneBy6 * fractCube) >> 15));
00178
00179   /* Read fourth nearest value of output from the sin table */
00180   d = *tablePtr++;
00181
00182   /* sinVal += d*wd; */
00183   sinVal += d * wd;
00184
00185   /* Return the output value in 1.15(q15) format */
00186   return ((q15_t) (sinVal >> 15u));
00187
00188 }
00189
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_sin_q31.c
00009 *
00010 * Description:  Fast sine calculation for Q31 values.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00059 static const q31_t sinTableQ31[259] = {
00060   0xfcdbd541, 0x0, 0x3242abf, 0x647d97c, 0x96a9049, 0xc8bd35e, 0xfab272b,
00061   0x12c8106f,
00062   0x15e21445, 0x18f8b83c, 0x1c0b826a, 0x1f19f97b, 0x2223a4c5, 0x25280c5e,
00063   0x2826b928, 0x2b1f34eb,
00064   0x2e110a62, 0x30fbc54d, 0x33def287, 0x36ba2014, 0x398cdd32, 0x3c56ba70,
00065   0x3f1749b8, 0x41ce1e65,
00066   0x447acd50, 0x471cece7, 0x49b41533, 0x4c3fdff4, 0x4ebfe8a5, 0x5133cc94,
00067   0x539b2af0, 0x55f5a4d2,
00068   0x5842dd54, 0x5a82799a, 0x5cb420e0, 0x5ed77c8a, 0x60ec3830, 0x62f201ac,
00069   0x64e88926, 0x66cf8120,
00070   0x68a69e81, 0x6a6d98a4, 0x6c242960, 0x6dca0d14, 0x6f5f02b2, 0x70e2cbc6,
00071   0x72552c85, 0x73b5ebd1,
00072   0x7504d345, 0x7641af3d, 0x776c4edb, 0x78848414, 0x798a23b1, 0x7a7d055b,
00073   0x7b5d039e, 0x7c29fbee,
00074   0x7ce3ceb2, 0x7d8a5f40, 0x7e1d93ea, 0x7e9d55fc, 0x7f0991c4, 0x7f62368f,
00075   0x7fa736b4, 0x7fd8878e,
00076   0x7ff62182, 0x7fffffff, 0x7ff62182, 0x7fd8878e, 0x7fa736b4, 0x7f62368f,
00077   0x7f0991c4, 0x7e9d55fc,
00078   0x7e1d93ea, 0x7d8a5f40, 0x7ce3ceb2, 0x7c29fbee, 0x7b5d039e, 0x7a7d055b,
00079   0x798a23b1, 0x78848414,
00080   0x776c4edb, 0x7641af3d, 0x7504d345, 0x73b5ebd1, 0x72552c85, 0x70e2cbc6,
00081   0x6f5f02b2, 0x6dca0d14,
00082   0x6c242960, 0x6a6d98a4, 0x68a69e81, 0x66cf8120, 0x64e88926, 0x62f201ac,
00083   0x60ec3830, 0x5ed77c8a,
00084   0x5cb420e0, 0x5a82799a, 0x5842dd54, 0x55f5a4d2, 0x539b2af0, 0x5133cc94,
00085   0x4ebfe8a5, 0x4c3fdff4,
00086   0x49b41533, 0x471cece7, 0x447acd50, 0x41ce1e65, 0x3f1749b8, 0x3c56ba70,
00087   0x398cdd32, 0x36ba2014,
00088   0x33def287, 0x30fbc54d, 0x2e110a62, 0x2b1f34eb, 0x2826b928, 0x25280c5e,
00089   0x2223a4c5, 0x1f19f97b,
00090   0x1c0b826a, 0x18f8b83c, 0x15e21445, 0x12c8106f, 0xfab272b, 0xc8bd35e,
00091   0x96a9049, 0x647d97c,
00092   0x3242abf, 0x0, 0xfcdbd541, 0xf9b82684, 0xf6956fb7, 0xf3742ca2, 0xf054d8d5,
00093   0xed37ef91,
00094   0xea1debbb, 0xe70747c4, 0xe3f47d96, 0xe0e60685, 0xdddc5b3b, 0xdad7f3a2,
00095   0xd7d946d8, 0xd4e0cb15,
00096   0xd1eef59e, 0xcf043ab3, 0xcc210d79, 0xc945dfec, 0xc67322ce, 0xc3a94590,
00097   0xc0e8b648, 0xbe31e19b,
00098   0xbb8532b0, 0xb8e31319, 0xb64beacd, 0xb3c0200c, 0xb140175b, 0xaecc336c,
00099   0xac64d510, 0xaa0a5b2e,
00100   0xa7bd22ac, 0xa57d8666, 0xa34bdf20, 0xa1288376, 0x9f13c7d0, 0x9d0dfe54,
00101   0x9b1776da, 0x99307ee0,
00102   0x9759617f, 0x9592675c, 0x93dbd6a0, 0x9235f2ec, 0x90a0fd4e, 0x8f1d343a,
00103   0x8daad37b, 0x8c4a142f,
00104   0x8afb2cbb, 0x89be50c3, 0x8893b125, 0x877b7bec, 0x8675dc4f, 0x8582faa5,
00105   0x84a2fc62, 0x83d60412,
00106   0x831c314e, 0x8275a0c0, 0x81e26c16, 0x8162aa04, 0x80f66e3c, 0x809dc971,
00107   0x8058c94c, 0x80277872,
00108   0x8009de7e, 0x80000000, 0x8009de7e, 0x80277872, 0x8058c94c, 0x809dc971,
00109   0x80f66e3c, 0x8162aa04,
00110   0x81e26c16, 0x8275a0c0, 0x831c314e, 0x83d60412, 0x84a2fc62, 0x8582faa5,
00111   0x8675dc4f, 0x877b7bec,
00112   0x8893b125, 0x89be50c3, 0x8afb2cbb, 0x8c4a142f, 0x8daad37b, 0x8f1d343a,
00113   0x90a0fd4e, 0x9235f2ec,
00114   0x93dbd6a0, 0x9592675c, 0x9759617f, 0x99307ee0, 0x9b1776da, 0x9d0dfe54,
00115   0x9f13c7d0, 0xa1288376,
00116   0xa34bdf20, 0xa57d8666, 0xa7bd22ac, 0xaa0a5b2e, 0xac64d510, 0xaecc336c,
00117   0xb140175b, 0xb3c0200c,
00118   0xb64beacd, 0xb8e31319, 0xbb8532b0, 0xbe31e19b, 0xc0e8b648, 0xc3a94590,
00119   0xc67322ce, 0xc945dfec,
00120   0xcc210d79, 0xcf043ab3, 0xd1eef59e, 0xd4e0cb15, 0xd7d946d8, 0xdad7f3a2,
00121   0xdddc5b3b, 0xe0e60685,
00122   0xe3f47d96, 0xe70747c4, 0xea1debbb, 0xed37ef91, 0xf054d8d5, 0xf3742ca2,
00123   0xf6956fb7, 0xf9b82684,
00124   0xfcdbd541, 0x0, 0x3242abf
00125 };
00126
00127
00136 q31_t arm_sin_q31(
00137   q31_t x)
00138 {
00139   q31_t sinVal, in, in2;                         /* Temporary variables for input, output */
00140   uint32_t index;                                /* Index variables */
00141   q31_t wa, wb, wc, wd;                          /* Cubic interpolation coefficients */
00142   q31_t a, b, c, d;                              /* Four nearest output values */
00143   q31_t *tablePtr;                               /* Pointer to table */
00144   q31_t fract, fractCube, fractSquare;           /* Temporary values for fractional values */
00145   q31_t oneBy6 = 0x15555555;                     /* Fixed point value of 1/6 */
00146   q31_t tableSpacing = TABLE_SPACING_Q31;        /* Table spacing */
00147   q31_t temp;                                    /* Temporary variable for intermediate process */
00148
00149   in = x;
00150
00151   /* Calculate the nearest index */
00152   index = (uint32_t) in / (uint32_t) tableSpacing;
00153
00154   /* Calculate the nearest value of input */
00155   in2 = (q31_t) index *tableSpacing;
00156
00157   /* Calculation of fractional value */
00158   fract = (in - in2) << 8;
00159
00160   /* fractSquare = fract * fract */
00161   fractSquare = ((q31_t) (((q63_t) fract * fract) >> 32));
00162   fractSquare = fractSquare << 1;
00163
00164   /* fractCube = fract * fract * fract */
00165   fractCube = ((q31_t) (((q63_t) fractSquare * fract) >> 32));
00166   fractCube = fractCube << 1;
00167
00168   /* Initialise table pointer */
00169   tablePtr = (q31_t *) & sinTableQ31[index];
00170
00171   /* Cubic interpolation process */
00172   /* Calculation of wa */
00173   /* wa = -(oneBy6)*fractCube + (fractSquare >> 1u) - (0x2AAAAAAA)*fract; */
00174   wa = ((q31_t) (((q63_t) oneBy6 * fractCube) >> 32));
00175   temp = 0x2AAAAAAA;
00176   wa = (q31_t) ((((q63_t) wa << 32) + ((q63_t) temp * fract)) >> 32);
00177   wa = -(wa << 1u);
00178   wa += (fractSquare >> 1u);
00179
00180   /* Read first nearest value of output from the sin table */
00181   a = *tablePtr++;
00182
00183   /* sinVal = a*wa */
00184   sinVal = ((q31_t) (((q63_t) a * wa) >> 32));
00185
00186   /* q31(1.31) Fixed point value of 1 */
00187   temp = 0x7FFFFFFF;
00188
00189   /* Calculation of wb */
00190   wb = ((fractCube >> 1u) - (fractSquare + (fract >> 1u))) + temp;
00191
00192   /* Read second nearest value of output from the sin table */
00193   b = *tablePtr++;
00194
00195   /*  sinVal += b*wb */
00196   sinVal = (q31_t) ((((q63_t) sinVal << 32) + (q63_t) b * (wb)) >> 32);
00197
00198   /* Calculation of wc */
00199   wc = -fractCube + fractSquare;
00200   wc = (wc >> 1u) + fract;
00201
00202   /* Read third nearest value of output from the sin table */
00203   c = *tablePtr++;
00204
00205   /*      sinVal += c*wc */
00206   sinVal = (q31_t) ((((q63_t) sinVal << 32) + ((q63_t) c * wc)) >> 32);
00207
00208   /* Calculation of wd */
00209   /* wd = (oneBy6) * fractCube - (oneBy6) * fract; */
00210   fractCube = fractCube - fract;
00211   wd = ((q31_t) (((q63_t) oneBy6 * fractCube) >> 32));
00212   wd = (wd << 1u);
00213
00214   /* Read fourth nearest value of output from the sin table */
00215   d = *tablePtr++;
00216
00217   /* sinVal += d*wd; */
00218   sinVal = (q31_t) ((((q63_t) sinVal << 32) + ((q63_t) d * wd)) >> 32);
00219
00220   /* convert sinVal in 2.30 format to 1.31 format */
00221   return (sinVal << 1u);
00222
00223 }
00224
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_sqrt_q15.c
00009 *
00010 * Description:  Q15 square root function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031 #include "arm_common_tables.h"
00032
00033
00051 arm_status arm_sqrt_q15(
00052   q15_t in,
00053   q15_t * pOut)
00054 {
00055   q31_t prevOut;
00056   q15_t oneByOut;
00057   uint32_t sign_bits;
00058
00059 #ifndef ARM_MATH_CM0
00060
00061   /* Run the below code for Cortex-M4 and Cortex-M3 */
00062
00063   q31_t out;
00064
00065   if(in > 0)
00066   {
00067     /* run for ten iterations */
00068
00069     /* Take initial guess as half of the input and first iteration */
00070     out = ((q31_t) in >> 1u) + 0x3FFF;
00071
00072     /* Calculation of reciprocal of out */
00073     /* oneByOut contains reciprocal of out which is in 2.14 format
00074        and oneByOut should be upscaled by signBits */
00075     sign_bits = arm_recip_q15((q15_t) out, &oneByOut, armRecipTableQ15);
00076
00077     /* 0.5 * (out) */
00078     out = out >> 1u;
00079     /* prevOut = 0.5 * out + (in * (oneByOut << signBits))) */
00080     prevOut = out + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00081
00082     /* Third iteration */
00083     sign_bits = arm_recip_q15((q15_t) prevOut, &oneByOut, armRecipTableQ15);
00084     prevOut = prevOut >> 1u;
00085     out = prevOut + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00086
00087     sign_bits = arm_recip_q15((q15_t) out, &oneByOut, armRecipTableQ15);
00088     out = out >> 1u;
00089     prevOut = out + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00090
00091     /* Fifth iteration */
00092     sign_bits = arm_recip_q15((q15_t) prevOut, &oneByOut, armRecipTableQ15);
00093     prevOut = prevOut >> 1u;
00094     out = prevOut + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00095
00096     sign_bits = arm_recip_q15((q15_t) out, &oneByOut, armRecipTableQ15);
00097     out = out >> 1u;
00098     prevOut = out + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00099
00100     /* Seventh iteration */
00101     sign_bits = arm_recip_q15((q15_t) prevOut, &oneByOut, armRecipTableQ15);
00102     prevOut = prevOut >> 1u;
00103     out = prevOut + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00104
00105     sign_bits = arm_recip_q15((q15_t) out, &oneByOut, armRecipTableQ15);
00106     out = out >> 1u;
00107     prevOut = out + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00108
00109     sign_bits = arm_recip_q15((q15_t) prevOut, &oneByOut, armRecipTableQ15);
00110     prevOut = prevOut >> 1u;
00111     out = prevOut + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00112
00113     /* tenth iteration */
00114     sign_bits = arm_recip_q15((q15_t) out, &oneByOut, armRecipTableQ15);
00115     out = out >> 1u;
00116     *pOut = out + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00117
00118     return (ARM_MATH_SUCCESS);
00119   }
00120
00121 #else
00122
00123   /* Run the below code for Cortex-M0 */
00124
00125   q31_t out, loopVar;                            /* Temporary variable for output, loop variable */
00126   if(in > 0)
00127   {
00128     /* run for ten iterations */
00129
00130     /* Take initial guess as half of the input and first iteration */
00131     out = ((q31_t) in >> 1u) + 0x3FFF;
00132
00133     /* Calculation of reciprocal of out */
00134
00135     /* oneByOut contains reciprocal of out which is in 2.14 format
00136        and oneByOut should be upscaled by sign bits */
00137     sign_bits = arm_recip_q15((q15_t) out, &oneByOut, armRecipTableQ15);
00138
00139     /* 0.5 * (out) */
00140     out = out >> 1u;
00141     /* prevOut = 0.5 * out + (in * oneByOut) << signbits))) */
00142     prevOut = out + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00143
00144     /* loop for third iteration to tenth iteration */
00145
00146     for (loopVar = 1; loopVar <= 8; loopVar++)
00147     {
00148
00149       sign_bits = arm_recip_q15((q15_t) prevOut, &oneByOut, armRecipTableQ15);
00150       /* 0.5 * (prevOut) */
00151       prevOut = prevOut >> 1u;
00152       /* prevOut = 0.5 * prevOut+ (in * oneByOut) << signbits))) */
00153       out =
00154         prevOut + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00155       /* prevOut      = out */
00156       prevOut = out;
00157
00158     }
00159     /* output is moved to pOut pointer */
00160     *pOut = prevOut;
00161
00162     return (ARM_MATH_SUCCESS);
00163   }
00164
00165 #endif /* #ifndef ARM_MATH_CM0 */
00166
00167   else
00168   {
00169
00170     *pOut = 0;
00171     return (ARM_MATH_ARGUMENT_ERROR);
00172   }
00173
00174 }
00175
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_sqrt_q31.c
00009 *
00010 * Description:  Q31 square root function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.2 2010/11/11
00018 *    Documentation updated.
00019 *
00020 * Version 1.0.1 2010/10/05
00021 *    Production release and review comments incorporated.
00022 *
00023 * Version 1.0.0 2010/09/20
00024 *    Production release and review comments incorporated.
00025 * -------------------------------------------------------------------- */
00026
00027 #include "arm_math.h"
00028 #include "arm_common_tables.h"
00029
00047 arm_status arm_sqrt_q31(
00048   q31_t in,
00049   q31_t * pOut)
00050 {
00051   q63_t prevOut;
00052   q31_t oneByOut;
00053   uint32_t signBits;
00054
00055 #ifndef ARM_MATH_CM0
00056
00057   /* Run the below code for Cortex-M4 and Cortex-M3 */
00058
00059   q63_t out;
00060
00061   if(in > 0)
00062   {
00063
00064     /* run for ten iterations */
00065
00066     /* Take initial guess as half of the input and first iteration */
00067     out = (in >> 1) + 0x3FFFFFFF;
00068
00069     /* Calculation of reciprocal of out */
00070     /* oneByOut contains reciprocal of out which is in 2.30 format
00071        and oneByOut should be upscaled by signBits */
00072     signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
00073
00074     /* 0.5 * (out) */
00075     out = out >> 1u;
00076
00077     /* prevOut = 0.5 * out + (in * (oneByOut << signBits))) */
00078     prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00079
00080     /* Third iteration */
00081     signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
00082     prevOut = prevOut >> 1u;
00083     out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00084
00085     signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
00086     out = out >> 1u;
00087     prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00088
00089     /* Fifth iteration */
00090     signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
00091     prevOut = prevOut >> 1u;
00092     out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00093
00094     signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
00095     out = out >> 1u;
00096     prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00097
00098     /* Seventh iteration */
00099     signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
00100     prevOut = prevOut >> 1u;
00101     out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00102
00103     signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
00104     out = out >> 1u;
00105     prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00106
00107     signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
00108     prevOut = prevOut >> 1u;
00109     out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00110
00111     signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
00112     out = out >> 1u;
00113     prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00114
00115     signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
00116     prevOut = prevOut >> 1u;
00117     out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00118
00119     signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
00120     out = out >> 1u;
00121     prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00122
00123     signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
00124     prevOut = prevOut >> 1u;
00125     out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00126
00127     signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
00128     out = out >> 1u;
00129     prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00130
00131     signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
00132     prevOut = prevOut >> 1u;
00133     out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00134
00135     /* tenth iteration */
00136     signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
00137     out = out >> 1u;
00138     *pOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00139
00140     return (ARM_MATH_SUCCESS);
00141   }
00142
00143 #else
00144
00145   /* Run the below code for Cortex-M0 */
00146
00147   q63_t out, loopVar;                            /* Temporary variable for output, loop variable */
00148   if(in > 0)
00149   {
00150
00151     /* run for ten iterations */
00152
00153     /* Take initial guess as half of the input and first iteration */
00154     out = (in >> 1) + 0x3FFFFFFF;
00155
00156     /* Calculation of reciprocal of out */
00157     /* oneByOut contains reciprocal of out which is in 2.30 format
00158        and oneByOut should be upscaled by sign bits */
00159     signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
00160
00161     /* 0.5 * (out) */
00162     out = out >> 1u;
00163
00164     /* prevOut = 0.5 * out + (in * (oneByOut) << signbits) */
00165     prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00166
00167
00168     /* loop for third iteration to tength iteration */
00169
00170     for (loopVar = 1; loopVar <= 14; loopVar++)
00171     {
00172
00173       signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
00174       /* 0.5 * (prevOut) */
00175       prevOut = prevOut >> 1u;
00176       /* out = 0.5 * prevOut + (in * oneByOut) << signbits))) */
00177       out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00178       /* prevOut      = out */
00179       prevOut = out;
00180
00181     }
00182     /* output is moved to pOut pointer */
00183     *pOut = prevOut;
00184
00185     return (ARM_MATH_SUCCESS);
00186   }
00187
00188 #endif /* #ifndef ARM_MATH_CM0 */
00189
00190   else
00191   {
00192     *pOut = 0;
00193     return (ARM_MATH_ARGUMENT_ERROR);
00194   }
00195 }
00196
Generated on Mon Nov 28 2011 11:14:35 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_std_f32.c
00009 *
00010 * Description:  Standard deviation of the elements of a floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00069 void arm_std_f32(
00070   float32_t * pSrc,
00071   uint32_t blockSize,
00072   float32_t * pResult)
00073 {
00074   float32_t sum = 0.0f;                          /* Temporary result storage */
00075
00076 #ifndef ARM_MATH_CM0
00077
00078   /* Run the below code for Cortex-M4 and Cortex-M3 */
00079
00080   float32_t meanOfSquares, mean, in, squareOfMean;
00081   uint32_t blkCnt;                               /* loop counter */
00082   float32_t *pIn;                                /* Temporary pointer */
00083
00084   pIn = pSrc;
00085
00086
00087   /*loop Unrolling */
00088   blkCnt = blockSize >> 2u;
00089
00090   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00091    ** a second loop below computes the remaining 1 to 3 samples. */
00092   while(blkCnt > 0u)
00093   {
00094     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
00095     /* Compute Sum of squares of the input samples
00096      * and then store the result in a temporary variable, sum. */
00097     in = *pSrc++;
00098     sum += in * in;
00099     in = *pSrc++;
00100     sum += in * in;
00101     in = *pSrc++;
00102     sum += in * in;
00103     in = *pSrc++;
00104     sum += in * in;
00105
00106     /* Decrement the loop counter */
00107     blkCnt--;
00108   }
00109
00110   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00111    ** No loop unrolling is used. */
00112   blkCnt = blockSize % 0x4u;
00113
00114   while(blkCnt > 0u)
00115   {
00116     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00117     /* Compute Sum of squares of the input samples
00118      * and then store the result in a temporary variable, sum. */
00119     in = *pSrc++;
00120     sum += in * in;
00121
00122     /* Decrement the loop counter */
00123     blkCnt--;
00124   }
00125
00126   /* Compute Mean of squares of the input samples
00127    * and then store the result in a temporary variable, meanOfSquares. */
00128   meanOfSquares = sum / ((float32_t) blockSize - 1.0f);
00129
00130   /* Reset the accumulator */
00131   sum = 0.0f;
00132
00133   /*loop Unrolling */
00134   blkCnt = blockSize >> 2u;
00135
00136   /* Reset the input working pointer */
00137   pSrc = pIn;
00138
00139   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00140    ** a second loop below computes the remaining 1 to 3 samples. */
00141   while(blkCnt > 0u)
00142   {
00143     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00144     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00145     sum += *pSrc++;
00146     sum += *pSrc++;
00147     sum += *pSrc++;
00148     sum += *pSrc++;
00149
00150     /* Decrement the loop counter */
00151     blkCnt--;
00152   }
00153
00154   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00155    ** No loop unrolling is used. */
00156   blkCnt = blockSize % 0x4u;
00157
00158   while(blkCnt > 0u)
00159   {
00160     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00161     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00162     sum += *pSrc++;
00163
00164     /* Decrement the loop counter */
00165     blkCnt--;
00166   }
00167   /* Compute mean of all input values */
00168   mean = sum / (float32_t) blockSize;
00169
00170   /* Compute square of mean */
00171   squareOfMean = (mean * mean) * (((float32_t) blockSize) /
00172                                   ((float32_t) blockSize - 1.0f));
00173
00174   /* Compute standard deviation and then store the result to the destination */
00175   arm_sqrt_f32((meanOfSquares - squareOfMean), pResult);
00176
00177 #else
00178
00179   /* Run the below code for Cortex-M0 */
00180
00181   float32_t sumOfSquares = 0.0f;                 /* Sum of squares */
00182   float32_t squareOfSum;                         /* Square of Sum */
00183   float32_t in;                                  /* input value */
00184   float32_t var;                                 /* Temporary varaince storage */
00185   uint32_t blkCnt;                               /* loop counter */
00186
00187   /* Loop over blockSize number of values */
00188   blkCnt = blockSize;
00189
00190   while(blkCnt > 0u)
00191   {
00192     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00193     /* Compute Sum of squares of the input samples
00194      * and then store the result in a temporary variable, sumOfSquares. */
00195     in = *pSrc++;
00196     sumOfSquares += in * in;
00197
00198     /* C = (A[0] + A[1] + ... + A[blockSize-1]) */
00199     /* Compute Sum of the input samples
00200      * and then store the result in a temporary variable, sum. */
00201     sum += in;
00202
00203     /* Decrement the loop counter */
00204     blkCnt--;
00205   }
00206
00207   /* Compute the square of sum */
00208   squareOfSum = ((sum * sum) / (float32_t) blockSize);
00209
00210   /* Compute the variance */
00211   var = ((sumOfSquares - squareOfSum) / (float32_t) (blockSize - 1.0f));
00212
00213   /* Compute standard deviation and then store the result to the destination */
00214   arm_sqrt_f32(var, pResult);
00215
00216 #endif /* #ifndef ARM_MATH_CM0 */
00217
00218 }
00219
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_std_q15.c
00009 *
00010 * Description:  Standard deviation of an array of Q15 type.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00062 void arm_std_q15(
00063   q15_t * pSrc,
00064   uint32_t blockSize,
00065   q15_t * pResult)
00066 {
00067   q63_t sum = 0;                                 /* Accumulator */
00068   q31_t meanOfSquares, squareOfMean;             /* square of mean and mean of square */
00069   q15_t mean;                                    /* mean */
00070   uint32_t blkCnt;                               /* loop counter */
00071   q15_t t;                                       /* Temporary variable */
00072
00073 #ifndef ARM_MATH_CM0
00074
00075   /* Run the below code for Cortex-M4 and Cortex-M3 */
00076
00077   q15_t *pIn;                                    /* Temporary pointer */
00078   q31_t in;                                      /* input value */
00079   q15_t in1;                                     /* input value */
00080
00081   pIn = pSrc;
00082
00083   /*loop Unrolling */
00084   blkCnt = blockSize >> 2u;
00085
00086   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00087    ** a second loop below computes the remaining 1 to 3 samples. */
00088   while(blkCnt > 0u)
00089   {
00090     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
00091     /* Compute Sum of squares of the input samples
00092      * and then store the result in a temporary variable, sum. */
00093     in = *__SIMD32(pSrc)++;
00094     sum = __SMLALD(in, in, sum);
00095     in = *__SIMD32(pSrc)++;
00096     sum = __SMLALD(in, in, sum);
00097
00098     /* Decrement the loop counter */
00099     blkCnt--;
00100   }
00101
00102   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00103    ** No loop unrolling is used. */
00104   blkCnt = blockSize % 0x4u;
00105
00106   while(blkCnt > 0u)
00107   {
00108     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00109     /* Compute Sum of squares of the input samples
00110      * and then store the result in a temporary variable, sum. */
00111     in1 = *pSrc++;
00112     sum = __SMLALD(in1, in1, sum);
00113
00114     /* Decrement the loop counter */
00115     blkCnt--;
00116   }
00117
00118   /* Compute Mean of squares of the input samples
00119    * and then store the result in a temporary variable, meanOfSquares. */
00120   t = (q15_t) ((1.0 / (blockSize - 1)) * 16384LL);
00121   sum = __SSAT((sum >> 15u), 16u);
00122
00123   meanOfSquares = (q31_t) ((sum * t) >> 14u);
00124
00125   /* Reset the accumulator */
00126   sum = 0;
00127
00128   /*loop Unrolling */
00129   blkCnt = blockSize >> 2u;
00130
00131   /* Reset the input working pointer */
00132   pSrc = pIn;
00133
00134   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00135    ** a second loop below computes the remaining 1 to 3 samples. */
00136   while(blkCnt > 0u)
00137   {
00138     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00139     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00140     sum += *pSrc++;
00141     sum += *pSrc++;
00142     sum += *pSrc++;
00143     sum += *pSrc++;
00144
00145     /* Decrement the loop counter */
00146     blkCnt--;
00147   }
00148
00149   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00150    ** No loop unrolling is used. */
00151   blkCnt = blockSize % 0x4u;
00152
00153   while(blkCnt > 0u)
00154   {
00155     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00156     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00157     sum += *pSrc++;
00158
00159     /* Decrement the loop counter */
00160     blkCnt--;
00161   }
00162   /* Compute mean of all input values */
00163   t = (q15_t) ((1.0 / (blockSize * (blockSize - 1))) * 32768LL);
00164   mean = (q15_t) __SSAT(sum, 16u);
00165
00166   /* Compute square of mean */
00167   squareOfMean = ((q31_t) mean * mean) >> 15;
00168   squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 15);
00169
00170   /* mean of the squares minus the square of the mean. */
00171   in1 = (q15_t) (meanOfSquares - squareOfMean);
00172
00173   /* Compute standard deviation and store the result to the destination */
00174   arm_sqrt_q15(in1, pResult);
00175
00176 #else
00177
00178   /* Run the below code for Cortex-M0 */
00179
00180   q63_t sumOfSquares = 0;                        /* Accumulator */
00181   q15_t in;                                      /* input value */
00182   /* Loop over blockSize number of values */
00183   blkCnt = blockSize;
00184
00185   while(blkCnt > 0u)
00186   {
00187     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00188     /* Compute Sum of squares of the input samples
00189      * and then store the result in a temporary variable, sumOfSquares. */
00190     in = *pSrc++;
00191     sumOfSquares += (in * in);
00192
00193     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00194     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00195     sum += in;
00196
00197     /* Decrement the loop counter */
00198     blkCnt--;
00199   }
00200
00201   /* Compute Mean of squares of the input samples
00202    * and then store the result in a temporary variable, meanOfSquares. */
00203   t = (q15_t) ((1.0 / (blockSize - 1)) * 16384LL);
00204   sumOfSquares = __SSAT((sumOfSquares >> 15u), 16u);
00205   meanOfSquares = (q31_t) ((sumOfSquares * t) >> 14u);
00206
00207   /* Compute mean of all input values */
00208   mean = (q15_t) __SSAT(sum, 16u);
00209
00210   /* Compute square of mean of the input samples
00211    * and then store the result in a temporary variable, squareOfMean.*/
00212   t = (q15_t) ((1.0 / (blockSize * (blockSize - 1))) * 32768LL);
00213   squareOfMean = ((q31_t) mean * mean) >> 15;
00214   squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 15);
00215
00216   /* mean of the squares minus the square of the mean. */
00217   in = (q15_t) (meanOfSquares - squareOfMean);
00218
00219   /* Compute standard deviation and store the result to the destination */
00220   arm_sqrt_q15(in, pResult);
00221
00222 #endif /* #ifndef ARM_MATH_CM0 */
00223
00224
00225 }
00226
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_std_q31.c
00009 *
00010 * Description:  Standard deviation of an array of Q31 type.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00066 void arm_std_q31(
00067   q31_t * pSrc,
00068   uint32_t blockSize,
00069   q31_t * pResult)
00070 {
00071   q63_t sum = 0;                                 /* Accumulator */
00072   q31_t meanOfSquares, squareOfMean;             /* square of mean and mean of square */
00073   q31_t mean;                                    /* mean */
00074   q31_t in;                                      /* input value */
00075   q31_t t;                                       /* Temporary variable */
00076   uint32_t blkCnt;                               /* loop counter */
00077
00078
00079 #ifndef ARM_MATH_CM0
00080
00081   /* Run the below code for Cortex-M4 and Cortex-M3 */
00082
00083   q31_t *pIn;                                    /* Temporary pointer */
00084
00085   pIn = pSrc;
00086
00087   /*loop Unrolling */
00088   blkCnt = blockSize >> 2u;
00089
00090   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00091    ** a second loop below computes the remaining 1 to 3 samples. */
00092   while(blkCnt > 0u)
00093   {
00094     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
00095     /* Compute Sum of squares of the input samples
00096      * and then store the result in a temporary variable, sum. */
00097     in = *pSrc++;
00098     sum += ((q63_t) (in) * (in));
00099     in = *pSrc++;
00100     sum += ((q63_t) (in) * (in));
00101     in = *pSrc++;
00102     sum += ((q63_t) (in) * (in));
00103     in = *pSrc++;
00104     sum += ((q63_t) (in) * (in));
00105
00106     /* Decrement the loop counter */
00107     blkCnt--;
00108   }
00109
00110   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00111    ** No loop unrolling is used. */
00112   blkCnt = blockSize % 0x4u;
00113
00114   while(blkCnt > 0u)
00115   {
00116     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00117     /* Compute Sum of squares of the input samples
00118      * and then store the result in a temporary variable, sum. */
00119     in = *pSrc++;
00120     sum += ((q63_t) (in) * (in));
00121
00122     /* Decrement the loop counter */
00123     blkCnt--;
00124   }
00125
00126   t = (q31_t) ((1.0f / (float32_t) (blockSize - 1u)) * 1073741824.0f);
00127
00128   /* Compute Mean of squares of the input samples
00129    * and then store the result in a temporary variable, meanOfSquares. */
00130   sum = (sum >> 31);
00131   meanOfSquares = (q31_t) ((sum * t) >> 30);
00132
00133   /* Reset the accumulator */
00134   sum = 0;
00135
00136   /*loop Unrolling */
00137   blkCnt = blockSize >> 2u;
00138
00139   /* Reset the input working pointer */
00140   pSrc = pIn;
00141
00142   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00143    ** a second loop below computes the remaining 1 to 3 samples. */
00144   while(blkCnt > 0u)
00145   {
00146     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00147     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00148     sum += *pSrc++;
00149     sum += *pSrc++;
00150     sum += *pSrc++;
00151     sum += *pSrc++;
00152
00153     /* Decrement the loop counter */
00154     blkCnt--;
00155   }
00156
00157   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00158    ** No loop unrolling is used. */
00159   blkCnt = blockSize % 0x4u;
00160
00161   while(blkCnt > 0u)
00162   {
00163     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00164     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00165     sum += *pSrc++;
00166
00167     /* Decrement the loop counter */
00168     blkCnt--;
00169   }
00170
00171 #else
00172
00173   /* Run the below code for Cortex-M0 */
00174
00175   q63_t sumOfSquares = 0;                        /* Accumulator */
00176   /* Loop over blockSize number of values */
00177   blkCnt = blockSize;
00178
00179   while(blkCnt > 0u)
00180   {
00181     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00182     /* Compute Sum of squares of the input samples
00183      * and then store the result in a temporary variable, sumOfSquares. */
00184     in = *pSrc++;
00185     sumOfSquares += ((q63_t) (in) * (in));
00186
00187     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00188     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00189     sum += in;
00190
00191     /* Decrement the loop counter */
00192     blkCnt--;
00193   }
00194
00195   /* Compute Mean of squares of the input samples
00196    * and then store the result in a temporary variable, meanOfSquares. */
00197   t = (q31_t) ((1.0f / (float32_t) (blockSize - 1u)) * 1073741824.0f);
00198   sumOfSquares = (sumOfSquares >> 31);
00199   meanOfSquares = (q31_t) ((sumOfSquares * t) >> 30);
00200
00201 #endif /* #ifndef ARM_MATH_CM0 */
00202
00203   /* Compute mean of all input values */
00204   t = (q31_t) ((1.0f / (blockSize * (blockSize - 1u))) * 2147483648.0f);
00205   mean = (q31_t) (sum);
00206
00207   /* Compute square of mean */
00208   squareOfMean = (q31_t) (((q63_t) mean * mean) >> 31);
00209   squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 31);
00210
00211
00212   /* Compute standard deviation and then store the result to the destination */
00213   arm_sqrt_q31(meanOfSquares - squareOfMean, pResult);
00214
00215 }
00216
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_sub_f32.c
00009 *
00010 * Description:  Floating-point vector subtraction.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00066 void arm_sub_f32(
00067   float32_t * pSrcA,
00068   float32_t * pSrcB,
00069   float32_t * pDst,
00070   uint32_t blockSize)
00071 {
00072   uint32_t blkCnt;                               /* loop counter */
00073
00074 #ifndef ARM_MATH_CM0
00075
00076 /* Run the below code for Cortex-M4 and Cortex-M3 */
00077   /*loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079
00080   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00081    ** a second loop below computes the remaining 1 to 3 samples. */
00082   while(blkCnt > 0u)
00083   {
00084     /* C = A - B */
00085     /* Subtract and then store the results in the destination buffer. */
00086     *pDst++ = (*pSrcA++) - (*pSrcB++);
00087     *pDst++ = (*pSrcA++) - (*pSrcB++);
00088     *pDst++ = (*pSrcA++) - (*pSrcB++);
00089     *pDst++ = (*pSrcA++) - (*pSrcB++);
00090
00091     /* Decrement the loop counter */
00092     blkCnt--;
00093   }
00094
00095   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00096    ** No loop unrolling is used. */
00097   blkCnt = blockSize % 0x4u;
00098
00099 #else
00100
00101   /* Run the below code for Cortex-M0 */
00102
00103   /* Initialize blkCnt with number of samples */
00104   blkCnt = blockSize;
00105
00106 #endif /* #ifndef ARM_MATH_CM0 */
00107
00108
00109   while(blkCnt > 0u)
00110   {
00111     /* C = A - B */
00112     /* Subtract and then store the results in the destination buffer. */
00113     *pDst++ = (*pSrcA++) - (*pSrcB++);
00114
00115     /* Decrement the loop counter */
00116     blkCnt--;
00117   }
00118 }
00119
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_sub_q7.c
00009 *
00010 * Description:  Q7 vector subtraction.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_sub_q7(
00059   q7_t * pSrcA,
00060   q7_t * pSrcB,
00061   q7_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   uint32_t blkCnt;                               /* loop counter */
00065
00066 #ifndef ARM_MATH_CM0
00067
00068 /* Run the below code for Cortex-M4 and Cortex-M3 */
00069
00070   /*loop Unrolling */
00071   blkCnt = blockSize >> 2u;
00072
00073   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00074    ** a second loop below computes the remaining 1 to 3 samples. */
00075   while(blkCnt > 0u)
00076   {
00077     /* C = A - B */
00078     /* Subtract and then store the results in the destination buffer 4 samples at a time. */
00079     *__SIMD32(pDst)++ = __QSUB8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
00080
00081     /* Decrement the loop counter */
00082     blkCnt--;
00083   }
00084
00085   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00086    ** No loop unrolling is used. */
00087   blkCnt = blockSize % 0x4u;
00088
00089   while(blkCnt > 0u)
00090   {
00091     /* C = A - B */
00092     /* Subtract and then store the result in the destination buffer. */
00093     *pDst++ = __SSAT(*pSrcA++ - *pSrcB++, 8);
00094
00095     /* Decrement the loop counter */
00096     blkCnt--;
00097   }
00098
00099 #else
00100
00101   /* Run the below code for Cortex-M0 */
00102
00103   /* Initialize blkCnt with number of samples */
00104   blkCnt = blockSize;
00105
00106   while(blkCnt > 0u)
00107   {
00108     /* C = A - B */
00109     /* Subtract and then store the result in the destination buffer. */
00110     *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ - *pSrcB++, 8);
00111
00112     /* Decrement the loop counter */
00113     blkCnt--;
00114   }
00115
00116 #endif /* #ifndef ARM_MATH_CM0 */
00117
00118
00119 }
00120
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_sub_q15.c
00009 *
00010 * Description:  Q15 vector subtraction.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_sub_q15(
00059   q15_t * pSrcA,
00060   q15_t * pSrcB,
00061   q15_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   uint32_t blkCnt;                               /* loop counter */
00065
00066
00067 #ifndef ARM_MATH_CM0
00068
00069 /* Run the below code for Cortex-M4 and Cortex-M3 */
00070   /*loop Unrolling */
00071   blkCnt = blockSize >> 2u;
00072
00073   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00074    ** a second loop below computes the remaining 1 to 3 samples. */
00075   while(blkCnt > 0u)
00076   {
00077     /* C = A - B */
00078     /* Subtract and then store the results in the destination buffer two samples at a time. */
00079     *__SIMD32(pDst)++ = __QSUB16(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
00080     *__SIMD32(pDst)++ = __QSUB16(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
00081
00082     /* Decrement the loop counter */
00083     blkCnt--;
00084   }
00085
00086   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00087    ** No loop unrolling is used. */
00088   blkCnt = blockSize % 0x4u;
00089
00090   while(blkCnt > 0u)
00091   {
00092     /* C = A - B */
00093     /* Subtract and then store the result in the destination buffer. */
00094     *pDst++ = (q15_t) __QSUB16(*pSrcA++, *pSrcB++);
00095
00096     /* Decrement the loop counter */
00097     blkCnt--;
00098   }
00099
00100 #else
00101
00102   /* Run the below code for Cortex-M0 */
00103
00104   /* Initialize blkCnt with number of samples */
00105   blkCnt = blockSize;
00106
00107   while(blkCnt > 0u)
00108   {
00109     /* C = A - B */
00110     /* Subtract and then store the result in the destination buffer. */
00111     *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ - *pSrcB++), 16);
00112
00113     /* Decrement the loop counter */
00114     blkCnt--;
00115   }
00116
00117 #endif /* #ifndef ARM_MATH_CM0 */
00118
00119
00120 }
00121
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_sub_q31.c
00009 *
00010 * Description:  Q31 vector subtraction.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_sub_q31(
00059   q31_t * pSrcA,
00060   q31_t * pSrcB,
00061   q31_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   uint32_t blkCnt;                               /* loop counter */
00065
00066
00067 #ifndef ARM_MATH_CM0
00068
00069 /* Run the below code for Cortex-M4 and Cortex-M3 */
00070   /*loop Unrolling */
00071   blkCnt = blockSize >> 2u;
00072
00073   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00074    ** a second loop below computes the remaining 1 to 3 samples. */
00075   while(blkCnt > 0u)
00076   {
00077     /* C = A - B */
00078     /* Subtract and then store the results in the destination buffer. */
00079     *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
00080     *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
00081     *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
00082     *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
00083
00084     /* Decrement the loop counter */
00085     blkCnt--;
00086   }
00087
00088   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00089    ** No loop unrolling is used. */
00090   blkCnt = blockSize % 0x4u;
00091
00092   while(blkCnt > 0u)
00093   {
00094     /* C = A - B */
00095     /* Subtract and then store the result in the destination buffer. */
00096     *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
00097
00098     /* Decrement the loop counter */
00099     blkCnt--;
00100   }
00101
00102 #else
00103
00104   /* Run the below code for Cortex-M0 */
00105
00106   /* Initialize blkCnt with number of samples */
00107   blkCnt = blockSize;
00108
00109   while(blkCnt > 0u)
00110   {
00111     /* C = A - B */
00112     /* Subtract and then store the result in the destination buffer. */
00113     *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ - *pSrcB++);
00114
00115     /* Decrement the loop counter */
00116     blkCnt--;
00117   }
00118
00119 #endif /* #ifndef ARM_MATH_CM0 */
00120
00121 }
00122
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_var_f32.c
00009 *
00010 * Description:  Variance of the elements of a floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00069 void arm_var_f32(
00070   float32_t * pSrc,
00071   uint32_t blockSize,
00072   float32_t * pResult)
00073 {
00074
00075 #ifndef ARM_MATH_CM0
00076
00077   /* Run the below code for Cortex-M4 and Cortex-M3 */
00078
00079   float32_t sum = (float32_t) 0.0;               /* Accumulator */
00080   float32_t meanOfSquares, mean, in, squareOfMean;      /* Temporary variables */
00081   uint32_t blkCnt;                               /* loop counter */
00082   float32_t *pIn;                                /* Temporary pointer */
00083
00084   /* updating temporary pointer */
00085   pIn = pSrc;
00086
00087   /*loop Unrolling */
00088   blkCnt = blockSize >> 2u;
00089
00090   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00091    ** a second loop below computes the remaining 1 to 3 samples. */
00092   while(blkCnt > 0u)
00093   {
00094     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
00095     /* Compute Sum of squares of the input samples
00096      * and then store the result in a temporary variable, sum. */
00097     in = *pSrc++;
00098     sum += in * in;
00099     in = *pSrc++;
00100     sum += in * in;
00101     in = *pSrc++;
00102     sum += in * in;
00103     in = *pSrc++;
00104     sum += in * in;
00105
00106     /* Decrement the loop counter */
00107     blkCnt--;
00108   }
00109
00110   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00111    ** No loop unrolling is used. */
00112   blkCnt = blockSize % 0x4u;
00113
00114   while(blkCnt > 0u)
00115   {
00116     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00117     /* Compute Sum of squares of the input samples
00118      * and then store the result in a temporary variable, sum. */
00119     in = *pSrc++;
00120     sum += in * in;
00121
00122     /* Decrement the loop counter */
00123     blkCnt--;
00124   }
00125
00126   /* Compute Mean of squares of the input samples
00127    * and then store the result in a temporary variable, meanOfSquares. */
00128   meanOfSquares = sum / ((float32_t) blockSize - 1.0f);
00129
00130   /* Reset the accumulator */
00131   sum = 0.0f;
00132
00133   /*loop Unrolling */
00134   blkCnt = blockSize >> 2u;
00135
00136   /* Reset the input working pointer */
00137   pSrc = pIn;
00138
00139   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00140    ** a second loop below computes the remaining 1 to 3 samples. */
00141   while(blkCnt > 0u)
00142   {
00143     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00144     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00145     sum += *pSrc++;
00146     sum += *pSrc++;
00147     sum += *pSrc++;
00148     sum += *pSrc++;
00149
00150     /* Decrement the loop counter */
00151     blkCnt--;
00152   }
00153
00154   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00155    ** No loop unrolling is used. */
00156   blkCnt = blockSize % 0x4u;
00157
00158   while(blkCnt > 0u)
00159   {
00160     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00161     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00162     sum += *pSrc++;
00163
00164     /* Decrement the loop counter */
00165     blkCnt--;
00166   }
00167   /* Compute mean of all input values */
00168   mean = sum / (float32_t) blockSize;
00169
00170   /* Compute square of mean */
00171   squareOfMean = (mean * mean) * (((float32_t) blockSize) /
00172                                   ((float32_t) blockSize - 1.0f));
00173
00174   /* Compute variance and then store the result to the destination */
00175   *pResult = meanOfSquares - squareOfMean;
00176
00177 #else
00178
00179   /* Run the below code for Cortex-M0 */
00180
00181   float32_t sum = 0.0f;                          /* Temporary result storage */
00182   float32_t sumOfSquares = 0.0f;                 /* Sum of squares */
00183   float32_t squareOfSum;                         /* Square of Sum */
00184   float32_t in;                                  /* input value */
00185   uint32_t blkCnt;                               /* loop counter */
00186
00187   /* Loop over blockSize number of values */
00188   blkCnt = blockSize;
00189
00190   while(blkCnt > 0u)
00191   {
00192     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00193     /* Compute Sum of squares of the input samples
00194      * and then store the result in a temporary variable, sumOfSquares. */
00195     in = *pSrc++;
00196     sumOfSquares += in * in;
00197
00198     /* C = (A[0] + A[1] + ... + A[blockSize-1]) */
00199     /* Compute Sum of the input samples
00200      * and then store the result in a temporary variable, sum. */
00201     sum += in;
00202
00203     /* Decrement the loop counter */
00204     blkCnt--;
00205   }
00206
00207   /* Compute the square of sum */
00208   squareOfSum = ((sum * sum) / (float32_t) blockSize);
00209
00210   /* Compute the variance */
00211   *pResult = ((sumOfSquares - squareOfSum) / (float32_t) (blockSize - 1.0f));
00212
00213 #endif /* #ifndef ARM_MATH_CM0 */
00214
00215 }
00216
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_var_q15.c
00009 *
00010 * Description:  Variance of an array of Q15 type.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00064 void arm_var_q15(
00065   q15_t * pSrc,
00066   uint32_t blockSize,
00067   q31_t * pResult)
00068 {
00069   q63_t sum = 0;                                 /* Accumulator */
00070   q31_t meanOfSquares, squareOfMean;             /* Mean of square and square of mean */
00071   q15_t mean;                                    /* mean */
00072   uint32_t blkCnt;                               /* loop counter */
00073   q15_t t;                                       /* Temporary variable */
00074
00075 #ifndef ARM_MATH_CM0
00076
00077   /* Run the below code for Cortex-M4 and Cortex-M3 */
00078
00079   q31_t in;                                      /* Input variable */
00080   q15_t in1;                                     /* Temporary variable */
00081   q15_t *pIn;                                    /* Temporary pointer */
00082
00083   pIn = pSrc;
00084
00085   /*loop Unrolling */
00086   blkCnt = blockSize >> 2u;
00087
00088   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00089    ** a second loop below computes the remaining 1 to 3 samples. */
00090   while(blkCnt > 0u)
00091   {
00092     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
00093     /* Compute Sum of squares of the input samples
00094      * and then store the result in a temporary variable, sum. */
00095     in = *__SIMD32(pSrc)++;
00096     sum = __SMLALD(in, in, sum);
00097     in = *__SIMD32(pSrc)++;
00098     sum = __SMLALD(in, in, sum);
00099
00100     /* Decrement the loop counter */
00101     blkCnt--;
00102   }
00103
00104   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00105    ** No loop unrolling is used. */
00106   blkCnt = blockSize % 0x4u;
00107
00108   while(blkCnt > 0u)
00109   {
00110     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00111     /* Compute Sum of squares of the input samples
00112      * and then store the result in a temporary variable, sum. */
00113     in1 = *pSrc++;
00114     sum = __SMLALD(in1, in1, sum);
00115
00116     /* Decrement the loop counter */
00117     blkCnt--;
00118   }
00119
00120   /* Compute Mean of squares of the input samples
00121    * and then store the result in a temporary variable, meanOfSquares. */
00122   t = (q15_t) ((1.0f / (float32_t) (blockSize - 1u)) * 16384);
00123   sum = __SSAT((sum >> 15u), 16u);
00124
00125   meanOfSquares = (q31_t) ((sum * t) >> 14u);
00126
00127   /* Reset the accumulator */
00128   sum = 0;
00129
00130   /*loop Unrolling */
00131   blkCnt = blockSize >> 2u;
00132
00133   /* Reset the input working pointer */
00134   pSrc = pIn;
00135
00136   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00137    ** a second loop below computes the remaining 1 to 3 samples. */
00138   while(blkCnt > 0u)
00139   {
00140     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00141     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00142     sum += *pSrc++;
00143     sum += *pSrc++;
00144     sum += *pSrc++;
00145     sum += *pSrc++;
00146
00147     /* Decrement the loop counter */
00148     blkCnt--;
00149   }
00150
00151   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00152    ** No loop unrolling is used. */
00153   blkCnt = blockSize % 0x4u;
00154
00155   while(blkCnt > 0u)
00156   {
00157     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00158     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00159     sum += *pSrc++;
00160
00161     /* Decrement the loop counter */
00162     blkCnt--;
00163   }
00164
00165 #else
00166
00167   /* Run the below code for Cortex-M0 */
00168
00169   q63_t sumOfSquares = 0;                        /* Accumulator */
00170   q15_t in;                                      /* Temporary variable */
00171   /* Loop over blockSize number of values */
00172   blkCnt = blockSize;
00173
00174   while(blkCnt > 0u)
00175   {
00176     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00177     /* Compute Sum of squares of the input samples
00178      * and then store the result in a temporary variable, sumOfSquares. */
00179     in = *pSrc++;
00180     sumOfSquares += (in * in);
00181
00182     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00183     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00184     sum += in;
00185
00186     /* Decrement the loop counter */
00187     blkCnt--;
00188   }
00189
00190   /* Compute Mean of squares of the input samples
00191    * and then store the result in a temporary variable, meanOfSquares. */
00192   t = (q15_t) ((1.0f / (float32_t) (blockSize - 1u)) * 16384);
00193   sumOfSquares = __SSAT((sumOfSquares >> 15u), 16u);
00194   meanOfSquares = (q31_t) ((sumOfSquares * t) >> 14u);
00195
00196
00197 #endif /* #ifndef ARM_MATH_CM0 */
00198
00199   /* Compute mean of all input values */
00200   t = (q15_t) ((1.0f / (float32_t) (blockSize * (blockSize - 1u))) * 32768);
00201   mean = __SSAT(sum, 16u);
00202
00203   /* Compute square of mean */
00204   squareOfMean = ((q31_t) mean * mean) >> 15;
00205   squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 15);
00206
00207   /* Compute variance and then store the result to the destination */
00208   *pResult = (meanOfSquares - squareOfMean);
00209
00210 }
00211
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:                arm_var_q31.c
00009 *
00010 * Description:  Variance of an array of Q31 type.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00066 void arm_var_q31(
00067   q31_t * pSrc,
00068   uint32_t blockSize,
00069   q63_t * pResult)
00070 {
00071   q63_t sum = 0;                                 /* Accumulator */
00072   q31_t meanOfSquares, squareOfMean;             /* Mean of square and square of mean */
00073   q31_t mean;                                    /* Mean */
00074   q31_t in;                                      /* Input variable */
00075   q31_t t;                                       /* Temporary variable */
00076   uint32_t blkCnt;                               /* loop counter */
00077
00078 #ifndef ARM_MATH_CM0
00079
00080   /* Run the below code for Cortex-M4 and Cortex-M3 */
00081
00082   q31_t *pIn;                                    /* Temporary pointer */
00083
00084   pIn = pSrc;
00085
00086   /*loop Unrolling */
00087   blkCnt = blockSize >> 2u;
00088
00089   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00090    ** a second loop below computes the remaining 1 to 3 samples. */
00091   while(blkCnt > 0u)
00092   {
00093     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
00094     /* Compute Sum of squares of the input samples
00095      * and then store the result in a temporary variable, sum. */
00096     in = *pSrc++;
00097     sum += ((q63_t) (in) * (in));
00098     in = *pSrc++;
00099     sum += ((q63_t) (in) * (in));
00100     in = *pSrc++;
00101     sum += ((q63_t) (in) * (in));
00102     in = *pSrc++;
00103     sum += ((q63_t) (in) * (in));
00104
00105     /* Decrement the loop counter */
00106     blkCnt--;
00107   }
00108
00109   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00110    ** No loop unrolling is used. */
00111   blkCnt = blockSize % 0x4u;
00112
00113   while(blkCnt > 0u)
00114   {
00115     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00116     /* Compute Sum of squares of the input samples
00117      * and then store the result in a temporary variable, sum. */
00118     in = *pSrc++;
00119     sum += ((q63_t) (in) * (in));
00120
00121     /* Decrement the loop counter */
00122     blkCnt--;
00123   }
00124
00125   /* Compute Mean of squares of the input samples
00126    * and then store the result in a temporary variable, meanOfSquares. */
00127   t = (q31_t) ((1.0 / (blockSize - 1)) * 1073741824LL);
00128   sum = (sum >> 31);
00129   meanOfSquares = (q31_t) ((sum * t) >> 30);
00130
00131   /* Reset the accumulator */
00132   sum = 0;
00133
00134   /*loop Unrolling */
00135   blkCnt = blockSize >> 2u;
00136
00137   /* Reset the input working pointer */
00138   pSrc = pIn;
00139
00140   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00141    ** a second loop below computes the remaining 1 to 3 samples. */
00142   while(blkCnt > 0u)
00143   {
00144     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00145     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00146     sum += *pSrc++;
00147     sum += *pSrc++;
00148     sum += *pSrc++;
00149     sum += *pSrc++;
00150
00151     /* Decrement the loop counter */
00152     blkCnt--;
00153   }
00154
00155   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00156    ** No loop unrolling is used. */
00157   blkCnt = blockSize % 0x4u;
00158
00159   while(blkCnt > 0u)
00160   {
00161     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00162     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00163     sum += *pSrc++;
00164
00165     /* Decrement the loop counter */
00166     blkCnt--;
00167   }
00168
00169 #else
00170
00171   /* Run the below code for Cortex-M0 */
00172
00173   q63_t sumOfSquares = 0;                        /* Accumulator */
00174   /* Loop over blockSize number of values */
00175   blkCnt = blockSize;
00176
00177   while(blkCnt > 0u)
00178   {
00179     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
00180     /* Compute Sum of squares of the input samples
00181      * and then store the result in a temporary variable, sumOfSquares. */
00182     in = *pSrc++;
00183     sumOfSquares += ((q63_t) (in) * (in));
00184
00185     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00186     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00187     sum += in;
00188
00189     /* Decrement the loop counter */
00190     blkCnt--;
00191   }
00192
00193   /* Compute Mean of squares of the input samples
00194    * and then store the result in a temporary variable, meanOfSquares. */
00195   t = (q31_t) ((1.0 / (blockSize - 1)) * 1073741824LL);
00196   sumOfSquares = (sumOfSquares >> 31);
00197   meanOfSquares = (q31_t) ((sumOfSquares * t) >> 30);
00198
00199 #endif /* #ifndef ARM_MATH_CM0 */
00200
00201   /* Compute mean of all input values */
00202   t = (q31_t) ((1.0 / (blockSize * (blockSize - 1u))) * 2147483648LL);
00203   mean = (q31_t) (sum);
00204
00205   /* Compute square of mean */
00206   squareOfMean = (q31_t) (((q63_t) mean * mean) >> 31);
00207   squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 31);
00208
00209   /* Compute variance and then store the result to the destination */
00210   *pResult = (q63_t) meanOfSquares - squareOfMean;
00211
00212 }
00213
Generated on Mon Nov 28 2011 11:14:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM0.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM0.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM0.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM3.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM3.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM3.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   SystemCoreClock = __SYSTEM_CLOCK;
00062
00063 #ifdef __USE_GPIO
00064   ARM_GPIO0->DATA[0].WORD = 0;
00065   ARM_GPIO0->IE = 0;
00066   ARM_GPIO0->DIR = 0xff83;
00067
00068   ARM_GPIO1->DATA[0].WORD = 0;
00069   ARM_GPIO1->IE = 0;
00070   ARM_GPIO1->DIR = 0;
00071
00072   ARM_GPIO2->DATA[0].WORD = 0;
00073   ARM_GPIO2->IE = 0;
00074   ARM_GPIO2->DIR = 0;
00075 #endif
00076 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM4.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_variance_example/system_ARMCM4.c
Go to the documentation of this file.
00001 /**************************************************************************/
00025 #include "ARMCM4.h"
00026
00027 /*----------------------------------------------------------------------------
00028   Define clocks
00029  *----------------------------------------------------------------------------*/
00030 #define __HSI             ( 8000000UL)
00031 #define __XTAL            (12000000UL)    /* Oscillator frequency             */
00032
00033 #define __SYSTEM_CLOCK    (4*__XTAL)
00034
00035
00036 /*----------------------------------------------------------------------------
00037   Clock Variable definitions
00038  *----------------------------------------------------------------------------*/
00039 uint32_t SystemCoreClock = __SYSTEM_CLOCK;
00042 /*----------------------------------------------------------------------------
00043   Clock functions
00044  *----------------------------------------------------------------------------*/
00045 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00046 {
00047   SystemCoreClock = __SYSTEM_CLOCK;
00048 }
00049
00059 void SystemInit (void)
00060 {
00061   #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
00062     SCB->CPACR |= ((3UL << 10*2) |                 /* set CP10 Full Access */
00063                    (3UL << 11*2)  );               /* set CP11 Full Access */
00064   #endif
00065
00066   SystemCoreClock = __SYSTEM_CLOCK;
00067
00068 #ifdef __USE_GPIO
00069   ARM_GPIO0->DATA[0].WORD = 0;
00070   ARM_GPIO0->IE = 0;
00071   ARM_GPIO0->DIR = 0xff83;
00072
00073   ARM_GPIO1->DATA[0].WORD = 0;
00074   ARM_GPIO1->IE = 0;
00075   ARM_GPIO1->DIR = 0;
00076
00077   ARM_GPIO2->DATA[0].WORD = 0;
00078   ARM_GPIO2->IE = 0;
00079   ARM_GPIO2->DIR = 0;
00080 #endif
00081 }
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_variance_example/arm_variance_example_f32.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/arm_variance_example/arm_variance_example_f32.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        29. November 2010
00005 * $Revision:    V1.0.3
00006 *
00007 * Project:          CMSIS DSP Library
00008 * Title:            arm_variance_example_f32.c
00009 *
00010 * Description:  Example code demonstrating variance calculation of input sequence.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 *
00015 * Version 1.0.3 2010/11/29
00016 *    Re-organized the CMSIS folders and updated documentation.
00017 *
00018 * Version 1.0.1 2010/10/05 KK
00019 *    Production release and review comments incorporated.
00020 *
00021 * Version 1.0.0 2010/09/20 KK
00022 *    Production release and review comments incorporated.
00023 * ------------------------------------------------------------------- */
00024
00075 #include <math.h>
00076 #include "arm_math.h"
00077
00078 /* ----------------------------------------------------------------------
00079 * Defines each of the tests performed
00080 * ------------------------------------------------------------------- */
00081 #define MAX_BLOCKSIZE   32
00082 #define DELTA           (0.000001f)
00083
00084
00085 /* ----------------------------------------------------------------------
00086 * Declare I/O buffers
00087 * ------------------------------------------------------------------- */
00088 float32_t wire1[MAX_BLOCKSIZE];
00089 float32_t wire2[MAX_BLOCKSIZE];
00090 float32_t wire3[MAX_BLOCKSIZE];
00091
00092 /* ----------------------------------------------------------------------
00093 * Test input data for Floating point Variance example for 32-blockSize
00094 * Generated by the MATLAB randn() function
00095 * ------------------------------------------------------------------- */
00096
00097 float32_t testInput_f32[32] =
00098 {
00099 -0.432564811528221,     -1.665584378238097,     0.125332306474831,              0.287676420358549,
00100 -1.146471350681464,     1.190915465642999,              1.189164201652103,              -0.037633276593318,
00101 0.327292361408654,              0.174639142820925,              -0.186708577681439,     0.725790548293303,
00102 -0.588316543014189,     2.183185818197101,              -0.136395883086596,     0.113931313520810,
00103 1.066768211359189,              0.059281460523605,              -0.095648405483669,     -0.832349463650022,
00104 0.294410816392640,              -1.336181857937804,     0.714324551818952,              1.623562064446271,
00105 -0.691775701702287,     0.857996672828263,              1.254001421602532,              -1.593729576447477,
00106 -1.440964431901020,     0.571147623658178,              -0.399885577715363,     0.689997375464345
00107
00108 };
00109
00110 /* ----------------------------------------------------------------------
00111 * Declare Global variables
00112 * ------------------------------------------------------------------- */
00113 uint32_t blockSize = 32;
00114 float32_t  refVarianceOut = 0.903941793931839;
00115
00116 /* ----------------------------------------------------------------------
00117 * Variance calculation test
00118 * ------------------------------------------------------------------- */
00119
00120 int32_t main(void)
00121 {
00122         arm_status status;
00123         float32_t mean, oneByBlockSize;
00124         float32_t variance;
00125         float32_t diff;
00126
00127         status = ARM_MATH_SUCCESS;
00128
00129         /* Calculation of mean value of input */
00130
00131         /* x' = 1/blockSize * (x(0)* 1 + x(1) * 1 + ... + x(n-1) * 1) */
00132
00133         /* Fill wire1 buffer with 1.0 value */
00134         arm_fill_f32(1.0,  wire1, blockSize);
00135
00136         /* Calculate the dot product of wire1 and wire2 */
00137         /* (x(0)* 1 + x(1) * 1 + ...+ x(n-1) * 1) */
00138         arm_dot_prod_f32(testInput_f32, wire1, blockSize, &mean);
00139
00140         /* Calculation of 1/blockSize */
00141         oneByBlockSize = 1.0 / (blockSize);
00142
00143         /* 1/blockSize * (x(0)* 1 + x(1) * 1 + ... + x(n-1) * 1)  */
00144         arm_mult_f32(&mean, &oneByBlockSize, &mean, 1);
00145
00146
00147         /* Calculation of variance value of input */
00148
00149         /* (1/blockSize) * (x(0) - x') * (x(0) - x') + (x(1) - x') * (x(1) - x') + ... + (x(n-1) - x') * (x(n-1) - x') */
00150
00151         /* Fill wire2 with mean value x' */
00152         arm_fill_f32(mean,  wire2, blockSize);
00153
00154         /* wire3 contains (x-x') */
00155         arm_sub_f32(testInput_f32, wire2, wire3, blockSize);
00156
00157         /* wire2 contains (x-x') */
00158         arm_copy_f32(wire3, wire2, blockSize);
00159
00160         /* (x(0) - x') * (x(0) - x') + (x(1) - x') * (x(1) - x') + ... + (x(n-1) - x') * (x(n-1) - x') */
00161         arm_dot_prod_f32(wire2, wire3, blockSize, &variance);
00162
00163     /* Calculation of 1/blockSize */
00164         oneByBlockSize = 1.0 / (blockSize - 1);
00165
00166         /* Calculation of variance */
00167         arm_mult_f32(&variance, &oneByBlockSize, &variance, 1);
00168
00169         /* absolute value of difference between ref and test */
00170         diff = fabsf(refVarianceOut - variance);
00171
00172         /* Comparison of variance value with reference */
00173         if(diff > DELTA)
00174         {
00175                 status = ARM_MATH_TEST_FAILURE;
00176         }
00177
00178         if( status != ARM_MATH_SUCCESS)
00179         {
00180           while(1);
00181         }
00182
00183     while(1);                             /* main function does not return */
00184 }
00185
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/audio.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/audio.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    AUDIO.H
00005  *      Purpose: USB Audio Device Class Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on Philips LPC2xxx microcontroller devices only. Nothing else gives
00014  *      you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2006 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __AUDIO_H__
00020 #define __AUDIO_H__
00021
00022
00023 /* Audio Interface Subclass Codes */
00024 #define AUDIO_SUBCLASS_UNDEFINED                0x00
00025 #define AUDIO_SUBCLASS_AUDIOCONTROL             0x01
00026 #define AUDIO_SUBCLASS_AUDIOSTREAMING           0x02
00027 #define AUDIO_SUBCLASS_MIDISTREAMING            0x03
00028
00029 /* Audio Interface Protocol Codes */
00030 #define AUDIO_PROTOCOL_UNDEFINED                0x00
00031
00032
00033 /* Audio Descriptor Types */
00034 #define AUDIO_UNDEFINED_DESCRIPTOR_TYPE         0x20
00035 #define AUDIO_DEVICE_DESCRIPTOR_TYPE            0x21
00036 #define AUDIO_CONFIGURATION_DESCRIPTOR_TYPE     0x22
00037 #define AUDIO_STRING_DESCRIPTOR_TYPE            0x23
00038 #define AUDIO_INTERFACE_DESCRIPTOR_TYPE         0x24
00039 #define AUDIO_ENDPOINT_DESCRIPTOR_TYPE          0x25
00040
00041
00042 /* Audio Control Interface Descriptor Subtypes */
00043 #define AUDIO_CONTROL_UNDEFINED                 0x00
00044 #define AUDIO_CONTROL_HEADER                    0x01
00045 #define AUDIO_CONTROL_INPUT_TERMINAL            0x02
00046 #define AUDIO_CONTROL_OUTPUT_TERMINAL           0x03
00047 #define AUDIO_CONTROL_MIXER_UNIT                0x04
00048 #define AUDIO_CONTROL_SELECTOR_UNIT             0x05
00049 #define AUDIO_CONTROL_FEATURE_UNIT              0x06
00050 #define AUDIO_CONTROL_PROCESSING_UNIT           0x07
00051 #define AUDIO_CONTROL_EXTENSION_UNIT            0x08
00052
00053 /* Audio Streaming Interface Descriptor Subtypes */
00054 #define AUDIO_STREAMING_UNDEFINED               0x00
00055 #define AUDIO_STREAMING_GENERAL                 0x01
00056 #define AUDIO_STREAMING_FORMAT_TYPE             0x02
00057 #define AUDIO_STREAMING_FORMAT_SPECIFIC         0x03
00058
00059 /* Audio Endpoint Descriptor Subtypes */
00060 #define AUDIO_ENDPOINT_UNDEFINED                0x00
00061 #define AUDIO_ENDPOINT_GENERAL                  0x01
00062
00063
00064 /* Audio Descriptor Sizes */
00065 #define AUDIO_CONTROL_INTERFACE_DESC_SZ(n)      0x08+n
00066 #define AUDIO_STREAMING_INTERFACE_DESC_SIZE     0x07
00067 #define AUDIO_INPUT_TERMINAL_DESC_SIZE          0x0C
00068 #define AUDIO_OUTPUT_TERMINAL_DESC_SIZE         0x09
00069 #define AUDIO_MIXER_UNIT_DESC_SZ(p,n)           0x0A+p+n
00070 #define AUDIO_SELECTOR_UNIT_DESC_SZ(p)          0x06+p
00071 #define AUDIO_FEATURE_UNIT_DESC_SZ(ch,n)        0x07+(ch+1)*n
00072 #define AUDIO_PROCESSING_UNIT_DESC_SZ(p,n,x)    0x0D+p+n+x
00073 #define AUDIO_EXTENSION_UNIT_DESC_SZ(p,n)       0x0D+p+n
00074 #define AUDIO_STANDARD_ENDPOINT_DESC_SIZE       0x09
00075 #define AUDIO_STREAMING_ENDPOINT_DESC_SIZE      0x07
00076
00077
00078 /* Audio Processing Unit Process Types */
00079 #define AUDIO_UNDEFINED_PROCESS                 0x00
00080 #define AUDIO_UP_DOWN_MIX_PROCESS               0x01
00081 #define AUDIO_DOLBY_PROLOGIC_PROCESS            0x02
00082 #define AUDIO_3D_STEREO_PROCESS                 0x03
00083 #define AUDIO_REVERBERATION_PROCESS             0x04
00084 #define AUDIO_CHORUS_PROCESS                    0x05
00085 #define AUDIO_DYN_RANGE_COMP_PROCESS            0x06
00086
00087
00088 /* Audio Request Codes */
00089 #define AUDIO_REQUEST_UNDEFINED                 0x00
00090 #define AUDIO_REQUEST_SET_CUR                   0x01
00091 #define AUDIO_REQUEST_GET_CUR                   0x81
00092 #define AUDIO_REQUEST_SET_MIN                   0x02
00093 #define AUDIO_REQUEST_GET_MIN                   0x82
00094 #define AUDIO_REQUEST_SET_MAX                   0x03
00095 #define AUDIO_REQUEST_GET_MAX                   0x83
00096 #define AUDIO_REQUEST_SET_RES                   0x04
00097 #define AUDIO_REQUEST_GET_RES                   0x84
00098 #define AUDIO_REQUEST_SET_MEM                   0x05
00099 #define AUDIO_REQUEST_GET_MEM                   0x85
00100 #define AUDIO_REQUEST_GET_STAT                  0xFF
00101
00102
00103 /* Audio Control Selector Codes */
00104 #define AUDIO_CONTROL_UNDEFINED                 0x00    /* Common Selector */
00105
00106 /*  Terminal Control Selectors */
00107 #define AUDIO_COPY_PROTECT_CONTROL              0x01
00108
00109 /*  Feature Unit Control Selectors */
00110 #define AUDIO_MUTE_CONTROL                      0x01
00111 #define AUDIO_VOLUME_CONTROL                    0x02
00112 #define AUDIO_BASS_CONTROL                      0x03
00113 #define AUDIO_MID_CONTROL                       0x04
00114 #define AUDIO_TREBLE_CONTROL                    0x05
00115 #define AUDIO_GRAPHIC_EQUALIZER_CONTROL         0x06
00116 #define AUDIO_AUTOMATIC_GAIN_CONTROL            0x07
00117 #define AUDIO_DELAY_CONTROL                     0x08
00118 #define AUDIO_BASS_BOOST_CONTROL                0x09
00119 #define AUDIO_LOUDNESS_CONTROL                  0x0A
00120
00121 /*  Processing Unit Control Selectors: */
00122 #define AUDIO_ENABLE_CONTROL                    0x01    /* Common Selector */
00123 #define AUDIO_MODE_SELECT_CONTROL               0x02    /* Common Selector */
00124
00125 /*  - Up/Down-mix Control Selectors */
00126 /*      AUDIO_ENABLE_CONTROL                    0x01       Common Selector */
00127 /*      AUDIO_MODE_SELECT_CONTROL               0x02       Common Selector */
00128
00129 /*  - Dolby Prologic Control Selectors */
00130 /*      AUDIO_ENABLE_CONTROL                    0x01       Common Selector */
00131 /*      AUDIO_MODE_SELECT_CONTROL               0x02       Common Selector */
00132
00133 /*  - 3D Stereo Extender Control Selectors */
00134 /*      AUDIO_ENABLE_CONTROL                    0x01       Common Selector */
00135 #define AUDIO_SPACIOUSNESS_CONTROL              0x02
00136
00137 /*  - Reverberation Control Selectors */
00138 /*      AUDIO_ENABLE_CONTROL                    0x01       Common Selector */
00139 #define AUDIO_REVERB_LEVEL_CONTROL              0x02
00140 #define AUDIO_REVERB_TIME_CONTROL               0x03
00141 #define AUDIO_REVERB_FEEDBACK_CONTROL           0x04
00142
00143 /*  - Chorus Control Selectors */
00144 /*      AUDIO_ENABLE_CONTROL                    0x01       Common Selector */
00145 #define AUDIO_CHORUS_LEVEL_CONTROL              0x02
00146 #define AUDIO_SHORUS_RATE_CONTROL               0x03
00147 #define AUDIO_CHORUS_DEPTH_CONTROL              0x04
00148
00149 /*  - Dynamic Range Compressor Control Selectors */
00150 /*      AUDIO_ENABLE_CONTROL                    0x01       Common Selector */
00151 #define AUDIO_COMPRESSION_RATE_CONTROL          0x02
00152 #define AUDIO_MAX_AMPL_CONTROL                  0x03
00153 #define AUDIO_THRESHOLD_CONTROL                 0x04
00154 #define AUDIO_ATTACK_TIME_CONTROL               0x05
00155 #define AUDIO_RELEASE_TIME_CONTROL              0x06
00156
00157 /*  Extension Unit Control Selectors */
00158 /*      AUDIO_ENABLE_CONTROL                    0x01       Common Selector */
00159
00160 /*  Endpoint Control Selectors */
00161 #define AUDIO_SAMPLING_FREQ_CONTROL             0x01
00162 #define AUDIO_PITCH_CONTROL                     0x02
00163
00164
00165 /* Audio Format Specific Control Selectors */
00166
00167 /*  MPEG Control Selectors */
00168 #define AUDIO_MPEG_CONTROL_UNDEFINED            0x00
00169 #define AUDIO_MPEG_DUAL_CHANNEL_CONTROL         0x01
00170 #define AUDIO_MPEG_SECOND_STEREO_CONTROL        0x02
00171 #define AUDIO_MPEG_MULTILINGUAL_CONTROL         0x03
00172 #define AUDIO_MPEG_DYN_RANGE_CONTROL            0x04
00173 #define AUDIO_MPEG_SCALING_CONTROL              0x05
00174 #define AUDIO_MPEG_HILO_SCALING_CONTROL         0x06
00175
00176 /*  AC-3 Control Selectors */
00177 #define AUDIO_AC3_CONTROL_UNDEFINED             0x00
00178 #define AUDIO_AC3_MODE_CONTROL                  0x01
00179 #define AUDIO_AC3_DYN_RANGE_CONTROL             0x02
00180 #define AUDIO_AC3_SCALING_CONTROL               0x03
00181 #define AUDIO_AC3_HILO_SCALING_CONTROL          0x04
00182
00183
00184 /* Audio Format Types */
00185 #define AUDIO_FORMAT_TYPE_UNDEFINED             0x00
00186 #define AUDIO_FORMAT_TYPE_I                     0x01
00187 #define AUDIO_FORMAT_TYPE_II                    0x02
00188 #define AUDIO_FORMAT_TYPE_III                   0x03
00189
00190
00191 /* Audio Format Type Descriptor Sizes */
00192 #define AUDIO_FORMAT_TYPE_I_DESC_SZ(n)          0x08+(n*3)
00193 #define AUDIO_FORMAT_TYPE_II_DESC_SZ(n)         0x09+(n*3)
00194 #define AUDIO_FORMAT_TYPE_III_DESC_SZ(n)        0x08+(n*3)
00195 #define AUDIO_FORMAT_MPEG_DESC_SIZE             0x09
00196 #define AUDIO_FORMAT_AC3_DESC_SIZE              0x0A
00197
00198
00199 /* Audio Data Format Codes */
00200
00201 /*  Audio Data Format Type I Codes */
00202 #define AUDIO_FORMAT_TYPE_I_UNDEFINED           0x0000
00203 #define AUDIO_FORMAT_PCM                        0x0001
00204 #define AUDIO_FORMAT_PCM8                       0x0002
00205 #define AUDIO_FORMAT_IEEE_FLOAT                 0x0003
00206 #define AUDIO_FORMAT_ALAW                       0x0004
00207 #define AUDIO_FORMAT_MULAW                      0x0005
00208
00209 /*  Audio Data Format Type II Codes */
00210 #define AUDIO_FORMAT_TYPE_II_UNDEFINED          0x1000
00211 #define AUDIO_FORMAT_MPEG                       0x1001
00212 #define AUDIO_FORMAT_AC3                        0x1002
00213
00214 /*  Audio Data Format Type III Codes */
00215 #define AUDIO_FORMAT_TYPE_III_UNDEFINED         0x2000
00216 #define AUDIO_FORMAT_IEC1937_AC3                0x2001
00217 #define AUDIO_FORMAT_IEC1937_MPEG1_L1           0x2002
00218 #define AUDIO_FORMAT_IEC1937_MPEG1_L2_3         0x2003
00219 #define AUDIO_FORMAT_IEC1937_MPEG2_NOEXT        0x2003
00220 #define AUDIO_FORMAT_IEC1937_MPEG2_EXT          0x2004
00221 #define AUDIO_FORMAT_IEC1937_MPEG2_L1_LS        0x2005
00222 #define AUDIO_FORMAT_IEC1937_MPEG2_L2_3         0x2006
00223
00224
00225 /* Predefined Audio Channel Configuration Bits */
00226 #define AUDIO_CHANNEL_M                         0x0000  /* Mono */
00227 #define AUDIO_CHANNEL_L                         0x0001  /* Left Front */
00228 #define AUDIO_CHANNEL_R                         0x0002  /* Right Front */
00229 #define AUDIO_CHANNEL_C                         0x0004  /* Center Front */
00230 #define AUDIO_CHANNEL_LFE                       0x0008  /* Low Freq. Enhance. */
00231 #define AUDIO_CHANNEL_LS                        0x0010  /* Left Surround */
00232 #define AUDIO_CHANNEL_RS                        0x0020  /* Right Surround */
00233 #define AUDIO_CHANNEL_LC                        0x0040  /* Left of Center */
00234 #define AUDIO_CHANNEL_RC                        0x0080  /* Right of Center */
00235 #define AUDIO_CHANNEL_S                         0x0100  /* Surround */
00236 #define AUDIO_CHANNEL_SL                        0x0200  /* Side Left */
00237 #define AUDIO_CHANNEL_SR                        0x0400  /* Side Right */
00238 #define AUDIO_CHANNEL_T                         0x0800  /* Top */
00239
00240
00241 /* Feature Unit Control Bits */
00242 #define AUDIO_CONTROL_MUTE                      0x0001
00243 #define AUDIO_CONTROL_VOLUME                    0x0002
00244 #define AUDIO_CONTROL_BASS                      0x0004
00245 #define AUDIO_CONTROL_MID                       0x0008
00246 #define AUDIO_CONTROL_TREBLE                    0x0010
00247 #define AUDIO_CONTROL_GRAPHIC_EQUALIZER         0x0020
00248 #define AUDIO_CONTROL_AUTOMATIC_GAIN            0x0040
00249 #define AUDIO_CONTROL_DEALY                     0x0080
00250 #define AUDIO_CONTROL_BASS_BOOST                0x0100
00251 #define AUDIO_CONTROL_LOUDNESS                  0x0200
00252
00253 /* Processing Unit Control Bits: */
00254 #define AUDIO_CONTROL_ENABLE                    0x0001  /* Common Bit */
00255 #define AUDIO_CONTROL_MODE_SELECT               0x0002  /* Common Bit */
00256
00257 /* - Up/Down-mix Control Bits */
00258 /*      AUDIO_CONTROL_ENABLE                    0x0001     Common Bit */
00259 /*      AUDIO_CONTROL_MODE_SELECT               0x0002     Common Bit */
00260
00261 /* - Dolby Prologic Control Bits */
00262 /*      AUDIO_CONTROL_ENABLE                    0x0001     Common Bit */
00263 /*      AUDIO_CONTROL_MODE_SELECT               0x0002     Common Bit */
00264
00265 /* - 3D Stereo Extender Control Bits */
00266 /*      AUDIO_CONTROL_ENABLE                    0x0001     Common Bit */
00267 #define AUDIO_CONTROL_SPACIOUSNESS              0x0002
00268
00269 /* - Reverberation Control Bits */
00270 /*      AUDIO_CONTROL_ENABLE                    0x0001     Common Bit */
00271 #define AUDIO_CONTROL_REVERB_TYPE               0x0002
00272 #define AUDIO_CONTROL_REVERB_LEVEL              0x0004
00273 #define AUDIO_CONTROL_REVERB_TIME               0x0008
00274 #define AUDIO_CONTROL_REVERB_FEEDBACK           0x0010
00275
00276 /* - Chorus Control Bits */
00277 /*      AUDIO_CONTROL_ENABLE                    0x0001     Common Bit */
00278 #define AUDIO_CONTROL_CHORUS_LEVEL              0x0002
00279 #define AUDIO_CONTROL_SHORUS_RATE               0x0004
00280 #define AUDIO_CONTROL_CHORUS_DEPTH              0x0008
00281
00282 /* - Dynamic Range Compressor Control Bits */
00283 /*      AUDIO_CONTROL_ENABLE                    0x0001     Common Bit */
00284 #define AUDIO_CONTROL_COMPRESSION_RATE          0x0002
00285 #define AUDIO_CONTROL_MAX_AMPL                  0x0004
00286 #define AUDIO_CONTROL_THRESHOLD                 0x0008
00287 #define AUDIO_CONTROL_ATTACK_TIME               0x0010
00288 #define AUDIO_CONTROL_RELEASE_TIME              0x0020
00289
00290 /* Extension Unit Control Bits */
00291 /*      AUDIO_CONTROL_ENABLE                    0x0001     Common Bit */
00292
00293 /* Endpoint Control Bits */
00294 #define AUDIO_CONTROL_SAMPLING_FREQ             0x01
00295 #define AUDIO_CONTROL_PITCH                     0x02
00296 #define AUDIO_MAX_PACKETS_ONLY                  0x80
00297
00298
00299 /* Audio Terminal Types */
00300
00301 /*  USB Terminal Types */
00302 #define AUDIO_TERMINAL_USB_UNDEFINED            0x0100
00303 #define AUDIO_TERMINAL_USB_STREAMING            0x0101
00304 #define AUDIO_TERMINAL_USB_VENDOR_SPECIFIC      0x01FF
00305
00306 /*  Input Terminal Types */
00307 #define AUDIO_TERMINAL_INPUT_UNDEFINED          0x0200
00308 #define AUDIO_TERMINAL_MICROPHONE               0x0201
00309 #define AUDIO_TERMINAL_DESKTOP_MICROPHONE       0x0202
00310 #define AUDIO_TERMINAL_PERSONAL_MICROPHONE      0x0203
00311 #define AUDIO_TERMINAL_OMNI_DIR_MICROPHONE      0x0204
00312 #define AUDIO_TERMINAL_MICROPHONE_ARRAY         0x0205
00313 #define AUDIO_TERMINAL_PROCESSING_MIC_ARRAY     0x0206
00314
00315 /*  Output Terminal Types */
00316 #define AUDIO_TERMINAL_OUTPUT_UNDEFINED         0x0300
00317 #define AUDIO_TERMINAL_SPEAKER                  0x0301
00318 #define AUDIO_TERMINAL_HEADPHONES               0x0302
00319 #define AUDIO_TERMINAL_HEAD_MOUNTED_AUDIO       0x0303
00320 #define AUDIO_TERMINAL_DESKTOP_SPEAKER          0x0304
00321 #define AUDIO_TERMINAL_ROOM_SPEAKER             0x0305
00322 #define AUDIO_TERMINAL_COMMUNICATION_SPEAKER    0x0306
00323 #define AUDIO_TERMINAL_LOW_FREQ_SPEAKER         0x0307
00324
00325 /*  Bi-directional Terminal Types */
00326 #define AUDIO_TERMINAL_BIDIRECTIONAL_UNDEFINED  0x0400
00327 #define AUDIO_TERMINAL_HANDSET                  0x0401
00328 #define AUDIO_TERMINAL_HEAD_MOUNTED_HANDSET     0x0402
00329 #define AUDIO_TERMINAL_SPEAKERPHONE             0x0403
00330 #define AUDIO_TERMINAL_SPEAKERPHONE_ECHOSUPRESS 0x0404
00331 #define AUDIO_TERMINAL_SPEAKERPHONE_ECHOCANCEL  0x0405
00332
00333 /*  Telephony Terminal Types */
00334 #define AUDIO_TERMINAL_TELEPHONY_UNDEFINED      0x0500
00335 #define AUDIO_TERMINAL_PHONE_LINE               0x0501
00336 #define AUDIO_TERMINAL_TELEPHONE                0x0502
00337 #define AUDIO_TERMINAL_DOWN_LINE_PHONE          0x0503
00338
00339 /*  External Terminal Types */
00340 #define AUDIO_TERMINAL_EXTERNAL_UNDEFINED       0x0600
00341 #define AUDIO_TERMINAL_ANALOG_CONNECTOR         0x0601
00342 #define AUDIO_TERMINAL_DIGITAL_AUDIO_INTERFACE  0x0602
00343 #define AUDIO_TERMINAL_LINE_CONNECTOR           0x0603
00344 #define AUDIO_TERMINAL_LEGACY_AUDIO_CONNECTOR   0x0604
00345 #define AUDIO_TERMINAL_SPDIF_INTERFACE          0x0605
00346 #define AUDIO_TERMINAL_1394_DA_STREAM           0x0606
00347 #define AUDIO_TERMINAL_1394_DA_STREAM_TRACK     0x0607
00348
00349 /*  Embedded Function Terminal Types */
00350 #define AUDIO_TERMINAL_EMBEDDED_UNDEFINED       0x0700
00351 #define AUDIO_TERMINAL_CALIBRATION_NOISE        0x0701
00352 #define AUDIO_TERMINAL_EQUALIZATION_NOISE       0x0702
00353 #define AUDIO_TERMINAL_CD_PLAYER                0x0703
00354 #define AUDIO_TERMINAL_DAT                      0x0704
00355 #define AUDIO_TERMINAL_DCC                      0x0705
00356 #define AUDIO_TERMINAL_MINI_DISK                0x0706
00357 #define AUDIO_TERMINAL_ANALOG_TAPE              0x0707
00358 #define AUDIO_TERMINAL_PHONOGRAPH               0x0708
00359 #define AUDIO_TERMINAL_VCR_AUDIO                0x0709
00360 #define AUDIO_TERMINAL_VIDEO_DISC_AUDIO         0x070A
00361 #define AUDIO_TERMINAL_DVD_AUDIO                0x070B
00362 #define AUDIO_TERMINAL_TV_TUNER_AUDIO           0x070C
00363 #define AUDIO_TERMINAL_SATELLITE_RECEIVER_AUDIO 0x070D
00364 #define AUDIO_TERMINAL_CABLE_TUNER_AUDIO        0x070E
00365 #define AUDIO_TERMINAL_DSS_AUDIO                0x070F
00366 #define AUDIO_TERMINAL_RADIO_RECEIVER           0x0710
00367 #define AUDIO_TERMINAL_RADIO_TRANSMITTER        0x0711
00368 #define AUDIO_TERMINAL_MULTI_TRACK_RECORDER     0x0712
00369 #define AUDIO_TERMINAL_SYNTHESIZER              0x0713
00370
00371
00372 #endif  /* __AUDIO_H__ */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Bit-banding/bitband.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Bit-banding/bitband.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          bitband.c                               2010-05-21
00003 */
00026 #include "lpc17xx_libcfg.h"
00027 #include "debug_frmwrk.h"
00028
00029 /* Example group ----------------------------------------------------------- */
00035 /************************** PRIVATE DEFINTIONS*************************/
00036 /* The processor memory map includes two bit-band regions. These occupy the lowest
00037  * 1MB of the SRAM and peripheral memory regions respectively.
00038  * + SRAM:      Bit-band region:        0x20000000 - 0x20100000
00039  *                      Bit-band alias:         0x22000000 - 0x23FFFFFF
00040  * + PERI:      Bit-band region:        0x40000000 - 0x40100000
00041  *                      Bit-band alias:         0x42000000 - 0x43FFFFFF
00042  * The mapping formula:
00043  *              bit_word_offset = (byte_offset * 32) + (bit_number * 4)
00044  *              bit_word_address = bit_band_base + bit_word_offset
00045  * where:
00046  *      + bit_word_offset: the position of the target bit in the bit-band memory region
00047  *      + bit_word_addr: the address of the word in the alias memory region that maps to the target bit
00048  *  + bit_band_base: the starting address of the alias region
00049  *  + byte_offset: the number of byte in the bit-band region that contains the targeted bit
00050  *  + bit_number: is the bit position (0-7) of the targeted bit
00051  *
00052  * Note: The fact, the SRAM on LPC1768 just available in two ranges:
00053  *      + 0x2007C000 - 0x2007FFFF: for SRAM - bank 0
00054  *  + 0x20080000 - 0x20083FFF: for SRAM - bank 1
00055  *  (And one range for GPIO peripheral but assigned in SRAM ranges: 0x2009C000 - 0x2009FFFF)
00056  */
00057
00058 /* Bit band SRAM definitions */
00059 #define BITBAND_SRAM_REF   0x20000000
00060 #define BITBAND_SRAM_BASE  0x22000000
00061
00062 #define BITBAND_SRAM(a,b) ((BITBAND_SRAM_BASE + ((a-BITBAND_SRAM_REF)<<5) + (b<<2)))  // Convert SRAM address
00063
00064 /* Bit band PERIPHERAL definitions */
00065 #define BITBAND_PERI_REF   0x40000000
00066 #define BITBAND_PERI_BASE  0x42000000
00067
00068 #define BITBAND_PERI(a,b) ((BITBAND_PERI_BASE + ((a-BITBAND_PERI_REF)<<5) + (b<<2)))  // Convert PERI address
00069
00070 /* Basic bit band function definitions */
00071 #define BITBAND_SRAM_ClearBit(a,b)      (*(volatile uint32_t *) (BITBAND_SRAM(a,b)) = 0)
00072 #define BITBAND_SRAM_SetBit(a,b)        (*(volatile uint32_t *) (BITBAND_SRAM(a,b)) = 1)
00073 #define BITBAND_SRAM_GetBit(a,b)        (*(volatile uint32_t *) (BITBAND_SRAM(a,b)))
00074
00075 #define BITBAND_PERI_ClearBit(a,b)      (*(volatile uint32_t *) (BITBAND_PERI(a,b)) = 0)
00076 #define BITBAND_PERI_SetBit(a,b)        (*(volatile uint32_t *) (BITBAND_PERI(a,b)) = 1)
00077 #define BITBAND_PERI_GetBit(a,b)        (*(volatile uint32_t *) (BITBAND_PERI(a,b)))
00078
00079 /* Variable address in SRAM
00080  * should be in one of two range:
00081  *      + 0x2007C000 - 0x20083FFF: for SRAM
00082  *  + 0x20080000 - 0x20083FFF: for GPIO
00083  */
00084 #define VAR_ADDRESS             0x2007C000
00085 #define VAR_BIT                 3 //Bit 3
00086
00087 /* Peripheral address
00088  * should be in range: 0x40000000 - 0x40100000
00089  */
00090 #define PERI_ADDRESS    0x40020000 // SPI Control Register (S0SPCR)
00091 #define PERI_BIT                5 //bit 5 - Master mode select
00092
00093 /************************** PRIVATE VARIABLES *************************/
00094 uint8_t menu[]=
00095         "********************************************************************************\n\r"
00096         "Hello NXP Semiconductors \n\r"
00097         "Bit-banding demo \n\r"
00098         "\t - MCU: LPC17xx \n\r"
00099         "\t - Core: ARM CORTEX-M3 \n\r"
00100         "\t - Communicate via: UART0 - 115200 bps \n\r"
00101         "This example used to test Bit-banding feature of Cortex-M3 processor\n\r"
00102         "********************************************************************************\n\r";
00103
00104 /*-------------------------MAIN FUNCTION------------------------------*/
00105 /*********************************************************************/
00110 int c_entry(void) { /* Main Program */
00111
00112         uint32_t temp;
00113
00114         /* Initialize debug via UART0
00115          * – 115200bps
00116          * – 8 data bit
00117          * – No parity
00118          * – 1 stop bit
00119          * – No flow control
00120          */
00121         debug_frmwrk_init();
00122         //print menu
00123         _DBG(menu);
00124
00125         /* test Bit-banding SRAM first --------------------------------------------------------- */
00126         _DBG_("Test bit-band SRAM... ");
00127
00128         //read variable at VAR_ADDRESS
00129         temp = (*(volatile uint32_t *)(VAR_ADDRESS));
00130         //print temp value
00131         _DBG("The value at address "); _DBH32(VAR_ADDRESS); _DBG(": ");
00132         _DBH32(temp); _DBG_("");
00133
00134         /* Use bitband function to read VAR_BIT value */
00135         temp = BITBAND_SRAM_GetBit(VAR_ADDRESS,VAR_BIT);
00136         _DBG("Use bit-band function to get value at bit 3: ");_DBG_("");
00137         _DBH32(temp); _DBG_("");
00138
00139         /* clear bit */
00140         BITBAND_SRAM_ClearBit(VAR_ADDRESS,VAR_BIT);
00141         /* re-read temp value */
00142         temp = (*(volatile uint32_t *)(VAR_ADDRESS));
00143         _DBG("Value after clear bit 3 value by using bit-band function: ");_DBG_("");
00144         _DBH32(temp); _DBG_("");
00145
00146         /* Set bit */
00147         BITBAND_SRAM_SetBit(VAR_ADDRESS,VAR_BIT);
00148         /* re-read temp value */
00149         temp = (*(volatile uint32_t *)(VAR_ADDRESS));
00150         _DBG("Value after set bit 3 value by using bit-band function: ");_DBG_("");
00151         _DBH32(temp); _DBG_("");
00152         _DBG_("");
00153
00154         /* Then, test Bit-banding PERI --------------------------------------------------------- */
00155         _DBG_("Test bit-band PERIPHERAL... ");
00156
00157         LPC_SPI->SPCR =(1<<5)|(1<<3)|(10<<8);
00158
00159         /* Read the current value of peripheral register */
00160         temp = (*(volatile uint32_t *)(PERI_ADDRESS));
00161         _DBG("The value of peripheral register at "); _DBH32(PERI_ADDRESS); _DBG(": ");_DBG_("");
00162         _DBH32(temp); _DBG_("");
00163
00164         /* Use bitband function to read VAR_BIT value */
00165         temp = BITBAND_PERI_GetBit(PERI_ADDRESS,PERI_BIT);
00166         _DBG("Use bit-band function to get value at bit 5: ");_DBG_(""); _DBH32(temp); _DBG_("");
00167
00168         /* clear bit */
00169         BITBAND_PERI_ClearBit(PERI_ADDRESS,PERI_BIT);
00170         /* re-read temp value */
00171         temp = (*(volatile uint32_t *)(PERI_ADDRESS));
00172         _DBG("Peripheral register after clear bit 5 value by using bit-band function: ");_DBG_("");
00173         _DBH32(temp); _DBG_("");
00174
00175         /* Set bit */
00176         BITBAND_PERI_SetBit(PERI_ADDRESS,PERI_BIT);
00177         /* re-read temp value */
00178         temp = (*(volatile uint32_t *)(PERI_ADDRESS));
00179         _DBG("Peripheral register after set bit 5 value by using bit-band function: ");_DBG_("");
00180         _DBH32(temp); _DBG_("");
00181
00182         while (1);
00183 }
00184
00185 /* With ARM and GHS toolsets, the entry point is main() - this will
00186  allow the linker to generate wrapper code to setup stacks, allocate
00187  heap area, and initialize and copy code and data segments. For GNU
00188  toolsets, the entry point is through __start() in the crt0_gnu.asm
00189  file, and that startup code will setup stacks and data */
00190 int main(void) {
00191         return c_entry();
00192 }
00193
00194 #ifdef  DEBUG
00195 /*******************************************************************************
00196  * @brief               Reports the name of the source file and the source line number
00197  *                              where the CHECK_PARAM error has occurred.
00198  * @param[in]   file Pointer to the source file name
00199  * @param[in]    line assert_param error line source number
00200  * @return              None
00201  *******************************************************************************/
00202 void check_failed(uint8_t *file, uint32_t line) {
00203         /* User can add his own implementation to report the file name and line number,
00204          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00205
00206         /* Infinite loop */
00207         while (1)
00208                 ;
00209 }
00210 #endif
00211
00212 /*
00213  * @}
00214  */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_LedControl/can_ledcontrol.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_LedControl/can_ledcontrol.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          can_ledcontrol.c                        2010-07-16
00003 */
00026 #include "lpc17xx_can.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_gpio.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE VARIABLES *************************/
00039 uint8_t menu[]=
00040         "*******************************************************************************\n\r"
00041         "Hello NXP Semiconductors \n\r"
00042         "CAN demo \n\r"
00043         "\t - MCU: LPC17xx \n\r"
00044         "\t - Core: ARM CORTEX-M3 \n\r"
00045         "\t - Communicate via: UART0 - 115200 bps \n\r"
00046         "Use two CAN peripherals: CAN1 and CAN2 to communicate\n\r"
00047         "Use CAN frames to control LED display\n\r"
00048         "*******************************************************************************\n\r";
00049
00051 CAN_MSG_Type TXMsg, RXMsg; // messages for test Bypass mode
00052 uint8_t LED_Value;
00053 uint32_t LED[8] = {(1<<6),(1<<5),(1<<4),(1<<3),(1<<2),(0x80000000),(1<<29),(1<<28)};
00054
00055 /************************** PRIVATE FUNCTIONS *************************/
00056 void CAN_IRQHandler(void);
00057
00058 void CAN_InitMessage(void);
00059 void print_menu(void);
00060
00061 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00062 /*********************************************************************/
00067 void CAN_IRQHandler()
00068 {
00069         uint8_t IntStatus;
00070         uint32_t data,i;
00071         /* get interrupt status
00072          * Note that: Interrupt register CANICR will be reset after read.
00073          * So function "CAN_IntGetStatus" should be call only one time
00074          */
00075         IntStatus = CAN_IntGetStatus(LPC_CAN2);
00076         //check receive interrupt
00077         if((IntStatus>>0)&0x01)
00078         {
00079                 CAN_ReceiveMsg(LPC_CAN2,&RXMsg);
00080                 data = RXMsg.dataA[0];
00081                 for(i=0;i<8;i++)
00082                 {
00083                         if ((data >> i)&0x01)
00084                         {
00085                                 if(i<5)
00086                                         GPIO_SetValue(2,LED[i]);
00087                                 else
00088                                         GPIO_SetValue(1,LED[i]);
00089                         }
00090                         else
00091                         {
00092                                 if(i<5)
00093                                         GPIO_ClearValue(2,LED[i]);
00094                                 else
00095                                         GPIO_ClearValue(1,LED[i]);
00096                         }
00097                 }
00098
00099         }
00100 }
00101
00102 /*-------------------------PRIVATE FUNCTIONS----------------------------*/
00103 /*********************************************************************/
00108 void CAN_InitMessage(void) {
00109         TXMsg.format = EXT_ID_FORMAT;
00110         TXMsg.id = 0x00001234;
00111         TXMsg.len = 8;
00112         TXMsg.type = DATA_FRAME;
00113         TXMsg.dataA[0] = TXMsg.dataA[1] = TXMsg.dataA[2] = TXMsg.dataA[3] = 0x00000000;
00114         TXMsg.dataB[0] = TXMsg.dataB[1] = TXMsg.dataB[2] = TXMsg.dataB[3] = 0x00000000;
00115
00116         RXMsg.format = 0x00;
00117         RXMsg.id = 0x00;
00118         RXMsg.len = 0x00;
00119         RXMsg.type = 0x00;
00120         RXMsg.dataA[0] = RXMsg.dataA[1] = RXMsg.dataA[2] = RXMsg.dataA[3] = 0x00000000;
00121         RXMsg.dataB[0] = RXMsg.dataB[1] = RXMsg.dataB[2] = RXMsg.dataB[3] = 0x00000000;
00122 }
00123
00124 /*********************************************************************/
00129 void print_menu()
00130 {
00131         _DBG(menu);
00132 }
00133
00134 /*-------------------------MAIN FUNCTION------------------------------*/
00135 /*********************************************************************/
00140 int c_entry(void) { /* Main Program */
00141         PINSEL_CFG_Type PinCfg;
00142         uint32_t test;
00143
00144         /* Initialize debug via UART0
00145          * – 115200bps
00146          * – 8 data bit
00147          * – No parity
00148          * – 1 stop bit
00149          * – No flow control
00150          */
00151         debug_frmwrk_init();
00152         print_menu();
00153
00154         /* LED setting */
00155         GPIO_SetDir(1,(1<<28)|(1<<29)|(0x80000000),1);
00156         GPIO_SetDir(2,(1<<2)|(1<<3)|(1<<4)|(1<<5)|(1<<6),1);
00157
00158         /* Pin configuration
00159          * CAN1: select P0.0 as RD1. P0.1 as TD1
00160          * CAN2: select P2.7 as RD2, P2.8 as RD2
00161          */
00162         PinCfg.Funcnum = 1;
00163         PinCfg.OpenDrain = 0;
00164         PinCfg.Pinmode = 0;
00165         PinCfg.Pinnum = 0;
00166         PinCfg.Portnum = 0;
00167         PINSEL_ConfigPin(&PinCfg);
00168         PinCfg.Pinnum = 1;
00169         PINSEL_ConfigPin(&PinCfg);
00170
00171         PinCfg.Pinnum = 7;
00172         PinCfg.Portnum = 2;
00173         PINSEL_ConfigPin(&PinCfg);
00174         PinCfg.Pinnum = 8;
00175         PINSEL_ConfigPin(&PinCfg);
00176
00177         //Initialize CAN1 & CAN2
00178         CAN_Init(LPC_CAN1, 125000);
00179         CAN_Init(LPC_CAN2, 125000);
00180
00181         //Enable Interrupt
00182         CAN_IRQCmd(LPC_CAN2, CANINT_RIE, ENABLE);
00183         CAN_SetAFMode(LPC_CANAF,CAN_AccBP);
00184         CAN_InitMessage();
00185
00186         //Enable CAN Interrupt
00187         NVIC_EnableIRQ(CAN_IRQn);
00188         while(1)
00189         {
00190                 _DBG("Press LED value that you want to display \n\r"
00191                           "This value should be in range from 0x00 to 0xFF: ");
00192 loop:
00193                 LED_Value = 0;
00194                 test = _DG;
00195                 switch(test)
00196                 {
00197                 case '0': LED_Value = 0; break;
00198                 case '1': LED_Value = 1; break;
00199                 case '2': LED_Value = 2; break;
00200                 case '3': LED_Value = 3; break;
00201                 case '4': LED_Value = 4; break;
00202                 case '5': LED_Value = 5; break;
00203                 case '6': LED_Value = 6; break;
00204                 case '7': LED_Value = 7; break;
00205                 case '8': LED_Value = 8; break;
00206                 case '9': LED_Value = 9; break;
00207                 case 'A': LED_Value = 0x0A; break;
00208                 case 'a': LED_Value = 0x0A; break;
00209                 case 'B': LED_Value = 0x0B; break;
00210                 case 'b': LED_Value = 0x0B; break;
00211                 case 'C': LED_Value = 0x0C; break;
00212                 case 'c': LED_Value = 0x0C; break;
00213                 case 'D': LED_Value = 0x0D; break;
00214                 case 'd': LED_Value = 0x0D; break;
00215                 case 'E': LED_Value = 0x0E; break;
00216                 case 'e': LED_Value = 0x0E; break;
00217                 case 'F': LED_Value = 0x0F; break;
00218                 case 'f': LED_Value = 0x0F; break;
00219                 default:
00220                         _DBG_("\n\rInvalid input, please type again!");
00221                         goto loop;
00222                 }
00223                 test = _DG;
00224                 switch(test)
00225                 {
00226                 case '0': LED_Value = (LED_Value<<4)|0; break;
00227                 case '1': LED_Value = (LED_Value<<4)|1; break;
00228                 case '2': LED_Value = (LED_Value<<4)|2; break;
00229                 case '3': LED_Value = (LED_Value<<4)|3; break;
00230                 case '4': LED_Value = (LED_Value<<4)|4; break;
00231                 case '5': LED_Value = (LED_Value<<4)|5; break;
00232                 case '6': LED_Value = (LED_Value<<4)|6; break;
00233                 case '7': LED_Value = (LED_Value<<4)|7; break;
00234                 case '8': LED_Value = (LED_Value<<4)|8; break;
00235                 case '9': LED_Value = (LED_Value<<4)|9; break;
00236                 case 'A': LED_Value = (LED_Value<<4)|0x0A; break;
00237                 case 'a': LED_Value = (LED_Value<<4)|0x0A; break;
00238                 case 'B': LED_Value = (LED_Value<<4)|0x0B; break;
00239                 case 'b': LED_Value = (LED_Value<<4)|0x0B; break;
00240                 case 'C': LED_Value = (LED_Value<<4)|0x0C; break;
00241                 case 'c': LED_Value = (LED_Value<<4)|0x0C; break;
00242                 case 'D': LED_Value = (LED_Value<<4)|0x0D; break;
00243                 case 'd': LED_Value = (LED_Value<<4)|0x0D; break;
00244                 case 'E': LED_Value = (LED_Value<<4)|0x0E; break;
00245                 case 'e': LED_Value = (LED_Value<<4)|0x0E; break;
00246                 case 'F': LED_Value = (LED_Value<<4)|0x0F; break;
00247                 case 'f': LED_Value = (LED_Value<<4)|0x0F; break;
00248                 default:
00249                         _DBG_("\n\rInvalid input, please type again!");
00250                         goto loop;
00251                 }
00252                 _DBH32(LED_Value);_DBG_("");
00253                 _DBG_("Display LED... ");_DBG_("");
00254                 TXMsg.dataA[0] = LED_Value;
00255                 CAN_SendMsg(LPC_CAN1, &TXMsg);
00256         }
00257 }
00258
00259 /* With ARM and GHS toolsets, the entry point is main() - this will
00260  allow the linker to generate wrapper code to setup stacks, allocate
00261  heap area, and initialize and copy code and data segments. For GNU
00262  toolsets, the entry point is through __start() in the crt0_gnu.asm
00263  file, and that startup code will setup stacks and data */
00264 int main(void) {
00265         return c_entry();
00266 }
00267
00268 #ifdef  DEBUG
00269 /*******************************************************************************
00270  * @brief               Reports the name of the source file and the source line number
00271  *                              where the CHECK_PARAM error has occurred.
00272  * @param[in]   file Pointer to the source file name
00273  * @param[in]    line assert_param error line source number
00274  * @return              None
00275  *******************************************************************************/
00276 void check_failed(uint8_t *file, uint32_t line) {
00277         /* User can add his own implementation to report the file name and line number,
00278          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00279
00280         /* Infinite loop */
00281         while (1)
00282                 ;
00283 }
00284 #endif
00285
00286 /*
00287  * @}
00288  */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_self_test/can_self_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_self_test/can_self_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          can_self_test.c                 2010-06-18
00003 */
00025 #include "lpc17xx_can.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "debug_frmwrk.h"
00028
00029 /* Example group ----------------------------------------------------------- */
00034 /************************** PRIVATE VARIABLES *************************/
00035 uint8_t menu[]=
00036         "*******************************************************************************\n\r"
00037         "Hello NXP Semiconductors \n\r"
00038         "CAN Self-test demo \n\r"
00039         "\t - MCU: LPC17xx \n\r"
00040         "\t - Core: ARM CORTEX-M3 \n\r"
00041         "\t - Communicate via: UART0 - 115200 bps \n\r"
00042         "Use only CAN1 peripherals to test\n\r"
00043         "This example used to test Self test mode\n\r"
00044         "*******************************************************************************\n\r";
00045
00047 CAN_MSG_Type TXMsg, RXMsg; // messages for test Bypass mode
00048 uint32_t CANRxCount, CANTxCount = 0;
00049
00050 /************************** PRIVATE FUNCTIONS *************************/
00051 void CAN_IRQHandler(void);
00052
00053 void CAN_InitMessage(void);
00054 void PrintMessage(CAN_MSG_Type* msg);
00055 void print_menu(void);
00056 Bool Check_Message(CAN_MSG_Type* TX_Msg, CAN_MSG_Type* RX_Msg);
00057
00058
00059 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00060 /*********************************************************************/
00065 void CAN_IRQHandler()
00066 {
00067         uint8_t IntStatus;
00068 //      uint32_t data1;
00069         /* Get CAN status */
00070         IntStatus = CAN_GetCTRLStatus(LPC_CAN1, CANCTRL_STS);
00071         //check receive buffer status
00072         if((IntStatus>>0)&0x01)
00073         {
00074                 CAN_ReceiveMsg(LPC_CAN1,&RXMsg);
00075                 _DBG_("Received buffer:");
00076                 PrintMessage(&RXMsg);
00077                 //Validate received and transmited message
00078                 if(Check_Message(&TXMsg, &RXMsg))
00079                         _DBG_("Self test is SUCCESSFUL!!!");
00080                 else
00081                         _DBG_("Self test is FAIL!!!");
00082         }
00083 }
00084
00085 /*-------------------------PRIVATE FUNCTIONS----------------------------*/
00086 /*********************************************************************/
00091 void PrintMessage(CAN_MSG_Type* CAN_Msg)
00092 {
00093         uint32_t data;
00094         _DBG("Message ID:     ");
00095         _DBH32(CAN_Msg->id);_DBG_("");
00096         _DBG("Message length: ");
00097         _DBH32(CAN_Msg->len);_DBG_(" BYTES");
00098         _DBG("Message type:   ");
00099         if(CAN_Msg->type==DATA_FRAME)
00100         {
00101                 _DBG_("DATA FRAME ");
00102         }
00103         else
00104                 _DBG_("REMOTE FRAME ");
00105         _DBG("Message format: ");
00106         if(CAN_Msg->format==STD_ID_FORMAT)
00107         {
00108                 _DBG_("STANDARD ID FRAME FORMAT");
00109         }
00110         else
00111                 _DBG_("EXTENDED ID FRAME FORMAT");
00112         _DBG("Message dataA:  ");
00113         data = (CAN_Msg->dataA[0])|(CAN_Msg->dataA[1]<<8)|(CAN_Msg->dataA[2]<<16)|(CAN_Msg->dataA[3]<<24);
00114         _DBH32(data);_DBG_("");
00115         data = (CAN_Msg->dataB[0])|(CAN_Msg->dataB[1]<<8)|(CAN_Msg->dataB[2]<<16)|(CAN_Msg->dataB[3]<<24);
00116         _DBG("Message dataB:  ");
00117         _DBH32(data);_DBG_("");
00118         _DBG_("");
00119 }
00120
00121 /*********************************************************************/
00126 void CAN_InitMessage(void) {
00127         TXMsg.format = EXT_ID_FORMAT;
00128         TXMsg.id = 0x00001234;
00129         TXMsg.len = 8;
00130         TXMsg.type = DATA_FRAME;
00131         TXMsg.dataA[0] = TXMsg.dataA[1] = TXMsg.dataA[2] = TXMsg.dataA[3] = 0x12;
00132         TXMsg.dataB[0] = TXMsg.dataB[1] = TXMsg.dataB[2] = TXMsg.dataB[3] = 0x34;
00133
00134         RXMsg.format = 0x00;
00135         RXMsg.id = 0x00;
00136         RXMsg.len = 0x00;
00137         RXMsg.type = 0x00;
00138         RXMsg.dataA[0] = RXMsg.dataA[1] = RXMsg.dataA[2] = RXMsg.dataA[3] = 0x00000000;
00139         RXMsg.dataB[0] = RXMsg.dataA[1] = RXMsg.dataA[2] = RXMsg.dataA[3] = 0x00000000;
00140 }
00141
00142 /*********************************************************************/
00147 void print_menu()
00148 {
00149         _DBG_(menu);
00150 }
00151
00152 /*********************************************************************/
00160 Bool Check_Message(CAN_MSG_Type* TX_Msg, CAN_MSG_Type* RX_Msg)
00161 {
00162         uint8_t i;
00163         if((TXMsg.format != RXMsg.format)|(TXMsg.id != RXMsg.id)|(TXMsg.len != RXMsg.len)\
00164                 |(TXMsg.type != RXMsg.type))
00165                 return FALSE;
00166         for(i=0;i<4;i++)
00167         {
00168                 if((TXMsg.dataA[i]!=RXMsg.dataA[i])|(TXMsg.dataB[i]!=RXMsg.dataB[i]))
00169                         return FALSE;
00170         }
00171         return TRUE;
00172 }
00173 /*-------------------------MAIN FUNCTION------------------------------*/
00174 /*********************************************************************/
00179 int c_entry(void) { /* Main Program */
00180
00181         /* Initialize debug via UART0
00182          * – 115200bps
00183          * – 8 data bit
00184          * – No parity
00185          * – 1 stop bit
00186          * – No flow control
00187          */
00188         debug_frmwrk_init();
00189         print_menu();
00190
00191         /* Initialize CAN1 peripheral
00192          * Note: Self-test mode doesn't require pin selection
00193          */
00194         CAN_Init(LPC_CAN1, 125000);
00195
00196         //Enable self-test mode
00197         CAN_ModeConfig(LPC_CAN1, CAN_SELFTEST_MODE, ENABLE);
00198
00199         //Enable Interrupt
00200         CAN_IRQCmd(LPC_CAN1, CANINT_RIE, ENABLE);
00201         CAN_IRQCmd(LPC_CAN1, CANINT_TIE1, ENABLE);
00202
00203         //Enable CAN Interrupt
00204         NVIC_EnableIRQ(CAN_IRQn);
00205         CAN_SetAFMode(LPC_CANAF,CAN_AccBP);
00206         CAN_InitMessage();
00207         _DBG_("Transmitted buffer:");
00208         PrintMessage(&TXMsg);
00209
00213         CAN_SendMsg(LPC_CAN1, &TXMsg);
00214         LPC_CAN1->CMR |=(1<<4); //Self Reception Request
00215
00216         while (1);
00217 }
00218
00219 /* With ARM and GHS toolsets, the entry point is main() - this will
00220  allow the linker to generate wrapper code to setup stacks, allocate
00221  heap area, and initialize and copy code and data segments. For GNU
00222  toolsets, the entry point is through __start() in the crt0_gnu.asm
00223  file, and that startup code will setup stacks and data */
00224 int main(void) {
00225         return c_entry();
00226 }
00227
00228 #ifdef  DEBUG
00229 /*******************************************************************************
00230  * @brief               Reports the name of the source file and the source line number
00231  *                              where the CHECK_PARAM error has occurred.
00232  * @param[in]   file Pointer to the source file name
00233  * @param[in]    line assert_param error line source number
00234  * @return              None
00235  *******************************************************************************/
00236 void check_failed(uint8_t *file, uint32_t line) {
00237         /* User can add his own implementation to report the file name and line number,
00238          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00239
00240         /* Infinite loop */
00241         while (1)
00242                 ;
00243 }
00244 #endif
00245
00246 /*
00247  * @}
00248  */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_aflut/can_test_aflut.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_aflut/can_test_aflut.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          can_AFLUT_dynamic.c                     2010-05-21
00003 */
00026 #include "lpc17xx_can.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINTIONS*************************/
00038 #define MAX_ENTRY                       512
00039 #define CAN_TX_MSG_CNT          10
00040 #define CAN_RX_MSG_CNT          5
00041
00042 /************************** PRIVATE VARIABLES *************************/
00043 uint8_t menu[]=
00044         "********************************************************************************\n\r"
00045         "Hello NXP Semiconductors \n\r"
00046         "CAN demo \n\r"
00047         "\t - MCU: LPC17xx \n\r"
00048         "\t - Core: ARM CORTEX-M3 \n\r"
00049         "\t - Communicate via: UART0 - 115200 bps \n\r"
00050         "Use 2 CAN peripherals: CAN1&CAN2 to transfer data\n\r"
00051         "This example tests full Acceptance Filter operation \n\r"
00052         "and load/remove AFLUT entry dynamically functions \n\r"
00053         "********************************************************************************\n\r";
00054
00055 //messages for test Acceptance Filter mode
00056 CAN_MSG_Type AFTxMsg[CAN_TX_MSG_CNT], AFRxMsg[CAN_RX_MSG_CNT];
00057 uint32_t CANRxCount = 0, CANTxCount = 0;
00058 uint32_t CANErrCount = 0;
00059
00060 AF_SectionDef AFTable;
00061 FullCAN_Entry FullCAN_Table[6];
00062 SFF_Entry SFF_Table[6];
00063 SFF_GPR_Entry SFF_GPR_Table[6];
00064 EFF_Entry EFF_Table[6];
00065 EFF_GPR_Entry EFF_GPR_Table[6];
00066
00067 /************************** PRIVATE FUNCTIONS *************************/
00068 /* CAN interrupt service routine */
00069 void CAN_IRQHandler(void);
00070
00071 void CAN_PinCfg(void);
00072 void CAN_InitMessage(void);
00073 void CAN_SetupAFTable(void);
00074 void CAN_InitAFMessage(void);
00075 void PrintMessage(CAN_MSG_Type* msg);
00076 void print_menu(void);
00077
00078 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00079 /*********************************************************************/
00084 void CAN_IRQHandler(void)
00085 {
00086         uint8_t IntStatus;
00087         //check FullCAN interrupt enable or not
00088         if(CAN_FullCANIntGetStatus(LPC_CANAF)== SET)
00089         {       //check is FullCAN interrupt occurs or not
00090                 if ((CAN_FullCANPendGetStatus(LPC_CANAF,FULLCAN_IC0))
00091                                 ||(CAN_FullCANPendGetStatus(LPC_CANAF,FULLCAN_IC1)))
00092                 {
00093                         //read received FullCAN Object in Object Section
00094                         FCAN_ReadObj(LPC_CANAF, &AFRxMsg[CANRxCount]);
00095                         CANRxCount++;
00096                 }
00097         }
00098         /* get interrupt status
00099          * Note that: Interrupt register CANICR will be reset after read.
00100          * So function "CAN_IntGetStatus" should be call only one time
00101          */
00102         IntStatus = CAN_IntGetStatus(LPC_CAN2);
00103         //check receive interrupt
00104         if((IntStatus>>0)&0x01)
00105         {
00106                 CAN_ReceiveMsg(LPC_CAN2, &AFRxMsg[CANRxCount]);
00107                 CANRxCount++;
00108         }
00109 }
00110
00111 /*-------------------------PRIVATE FUNCTIONS----------------------------*/
00112 /*********************************************************************/
00117 void PrintMessage(CAN_MSG_Type* CAN_Msg)
00118 {
00119         uint32_t data;
00120         _DBG("Message ID:     ");
00121         _DBH32(CAN_Msg->id);_DBG_("");
00122         _DBG("Message length: ");
00123         _DBH32(CAN_Msg->len);_DBG_(" BYTES");
00124         _DBG("Message type:   ");
00125         if(CAN_Msg->type==DATA_FRAME)
00126         {
00127                 _DBG_("DATA FRAME ");
00128         }
00129         else
00130                 _DBG_("REMOTE FRAME ");
00131         _DBG("Message format: ");
00132         if(CAN_Msg->format==STD_ID_FORMAT)
00133         {
00134                 _DBG_("STANDARD ID FRAME FORMAT");
00135         }
00136         else
00137                 _DBG_("EXTENDED ID FRAME FORMAT");
00138         _DBG("Message dataA:  ");
00139         data = (CAN_Msg->dataA[0])|(CAN_Msg->dataA[1]<<8)|(CAN_Msg->dataA[2]<<16)|(CAN_Msg->dataA[3]<<24);
00140         _DBH32(data);_DBG_("");
00141         data = (CAN_Msg->dataB[0])|(CAN_Msg->dataB[1]<<8)|(CAN_Msg->dataB[2]<<16)|(CAN_Msg->dataB[3]<<24);
00142         _DBG("Message dataB:  ");
00143         _DBH32(data);_DBG_("");
00144         _DBG_("");
00145 }
00146
00147 /*********************************************************************/
00158 void CAN_SetupAFTable(void) {
00159         FullCAN_Table[0].controller = CAN2_CTRL;
00160         FullCAN_Table[0].disable = MSG_ENABLE;
00161         FullCAN_Table[0].id_11 = 0x01;
00162         FullCAN_Table[1].controller = CAN2_CTRL;
00163         FullCAN_Table[1].disable = MSG_ENABLE;
00164         FullCAN_Table[1].id_11 = 0x02;
00165         FullCAN_Table[2].controller = CAN2_CTRL;
00166         FullCAN_Table[2].disable = MSG_ENABLE;
00167         FullCAN_Table[2].id_11 = 0x03;
00168         FullCAN_Table[3].controller = CAN2_CTRL;
00169         FullCAN_Table[3].disable = MSG_ENABLE;
00170         FullCAN_Table[3].id_11 = 0x06;
00171         FullCAN_Table[4].controller = CAN2_CTRL;
00172         FullCAN_Table[4].disable = MSG_ENABLE;
00173         FullCAN_Table[4].id_11 = 0x0C;
00174         FullCAN_Table[5].controller = CAN2_CTRL;
00175         FullCAN_Table[5].disable = MSG_ENABLE;
00176         FullCAN_Table[5].id_11 = 0x0D;
00177
00178         SFF_Table[0].controller = CAN2_CTRL;
00179         SFF_Table[0].disable = MSG_ENABLE;
00180         SFF_Table[0].id_11 = 0x08;
00181         SFF_Table[1].controller = CAN2_CTRL;
00182         SFF_Table[1].disable = MSG_ENABLE;
00183         SFF_Table[1].id_11 = 0x09;
00184         SFF_Table[2].controller = CAN2_CTRL;
00185         SFF_Table[2].disable = MSG_ENABLE;
00186         SFF_Table[2].id_11 = 0x0A;
00187         SFF_Table[3].controller = CAN2_CTRL;
00188         SFF_Table[3].disable = MSG_ENABLE;
00189         SFF_Table[3].id_11 = 0x0B;
00190         SFF_Table[4].controller = CAN2_CTRL;
00191         SFF_Table[4].disable = MSG_ENABLE;
00192         SFF_Table[4].id_11 = 0x0E;
00193         SFF_Table[5].controller = CAN2_CTRL;
00194         SFF_Table[5].disable = MSG_ENABLE;
00195         SFF_Table[5].id_11 = 0x0F;
00196
00197         SFF_GPR_Table[0].controller1 = SFF_GPR_Table[0].controller2 = CAN2_CTRL;
00198         SFF_GPR_Table[0].disable1 = SFF_GPR_Table[0].disable2 = MSG_ENABLE;
00199         SFF_GPR_Table[0].lowerID = 0x10;
00200         SFF_GPR_Table[0].upperID = 0x20;
00201         SFF_GPR_Table[1].controller1 = SFF_GPR_Table[1].controller2 = CAN2_CTRL;
00202         SFF_GPR_Table[1].disable1 = SFF_GPR_Table[1].disable2 = MSG_ENABLE;
00203         SFF_GPR_Table[1].lowerID = 0x20;
00204         SFF_GPR_Table[1].upperID = 0x25;
00205         SFF_GPR_Table[2].controller1 = SFF_GPR_Table[2].controller2 = CAN2_CTRL;
00206         SFF_GPR_Table[2].disable1 = SFF_GPR_Table[2].disable2 = MSG_ENABLE;
00207         SFF_GPR_Table[2].lowerID = 0x30;
00208         SFF_GPR_Table[2].upperID = 0x40;
00209         SFF_GPR_Table[3].controller1 = SFF_GPR_Table[3].controller2 = CAN2_CTRL;
00210         SFF_GPR_Table[3].disable1 = SFF_GPR_Table[3].disable2 = MSG_ENABLE;
00211         SFF_GPR_Table[3].lowerID = 0x40;
00212         SFF_GPR_Table[3].upperID = 0x50;
00213         SFF_GPR_Table[4].controller1 = SFF_GPR_Table[4].controller2 = CAN2_CTRL;
00214         SFF_GPR_Table[4].disable1 = SFF_GPR_Table[4].disable2 = MSG_ENABLE;
00215         SFF_GPR_Table[4].lowerID = 0x50;
00216         SFF_GPR_Table[4].upperID = 0x60;
00217         SFF_GPR_Table[5].controller1 = SFF_GPR_Table[5].controller2 = CAN2_CTRL;
00218         SFF_GPR_Table[5].disable1 = SFF_GPR_Table[5].disable2 = MSG_ENABLE;
00219         SFF_GPR_Table[5].lowerID = 0x60;
00220         SFF_GPR_Table[5].upperID = 0x70;
00221
00222         EFF_Table[0].controller = CAN2_CTRL;
00223         EFF_Table[0].ID_29 = (1 << 11);
00224         EFF_Table[1].controller = CAN2_CTRL;
00225         EFF_Table[1].ID_29 = (2 << 11);
00226         EFF_Table[2].controller = CAN2_CTRL;
00227         EFF_Table[2].ID_29 = (3 << 11);
00228         EFF_Table[3].controller = CAN2_CTRL;
00229         EFF_Table[3].ID_29 = (4 << 11);
00230         EFF_Table[4].controller = CAN2_CTRL;
00231         EFF_Table[4].ID_29 = (0x0e << 11);
00232         EFF_Table[5].controller = CAN2_CTRL;
00233         EFF_Table[5].ID_29 = (0x0f << 11);
00234
00235         EFF_GPR_Table[0].controller1 = EFF_GPR_Table[0].controller2 = CAN2_CTRL;
00236         EFF_GPR_Table[0].lowerEID = (5 << 11);
00237         EFF_GPR_Table[0].upperEID = (6 << 11);
00238         EFF_GPR_Table[1].controller1 = EFF_GPR_Table[1].controller2 = CAN2_CTRL;
00239         EFF_GPR_Table[1].lowerEID = (7 << 11);
00240         EFF_GPR_Table[1].upperEID = (8 << 11);
00241         EFF_GPR_Table[2].controller1 = EFF_GPR_Table[2].controller2 = CAN2_CTRL;
00242         EFF_GPR_Table[2].lowerEID = (9 << 11);
00243         EFF_GPR_Table[2].upperEID = (0x0a << 11);
00244         EFF_GPR_Table[3].controller1 = EFF_GPR_Table[3].controller2 = CAN2_CTRL;
00245         EFF_GPR_Table[3].lowerEID = (0x0b << 11);
00246         EFF_GPR_Table[3].upperEID = (0x0c << 11);
00247         EFF_GPR_Table[4].controller1 = EFF_GPR_Table[4].controller2 = CAN2_CTRL;
00248         EFF_GPR_Table[4].lowerEID = (0x11 << 11);
00249         EFF_GPR_Table[4].upperEID = (0x12 << 11);
00250         EFF_GPR_Table[5].controller1 = EFF_GPR_Table[5].controller2 = CAN2_CTRL;
00251         EFF_GPR_Table[5].lowerEID = (0x13 << 11);
00252         EFF_GPR_Table[5].upperEID = (0x14 << 11);
00253
00254         AFTable.FullCAN_Sec = &FullCAN_Table[0];
00255         AFTable.FC_NumEntry = 6;
00256         AFTable.SFF_Sec = &SFF_Table[0];
00257         AFTable.SFF_NumEntry = 6;
00258         AFTable.SFF_GPR_Sec = &SFF_GPR_Table[0];
00259         AFTable.SFF_GPR_NumEntry = 6;
00260         AFTable.EFF_Sec = &EFF_Table[0];
00261         AFTable.EFF_NumEntry = 6;
00262         AFTable.EFF_GPR_Sec = &EFF_GPR_Table[0];
00263         AFTable.EFF_GPR_NumEntry = 6;
00264 }
00265 /*********************************************************************/
00270 void CAN_ChangeAFTable(void)
00271 {
00272         CAN_LoadFullCANEntry(LPC_CAN2, 4);
00273         CAN_LoadExplicitEntry(LPC_CAN2, 5, STD_ID_FORMAT);
00274         CAN_LoadGroupEntry(LPC_CAN2,0x25,0x30, STD_ID_FORMAT);
00275         CAN_LoadExplicitEntry(LPC_CAN2, (3<<11)+0x05, EXT_ID_FORMAT);
00276         CAN_LoadGroupEntry(LPC_CAN2,(0x0a<<11),(0x0b<<11), EXT_ID_FORMAT);
00277
00278         CAN_RemoveEntry(FULLCAN_ENTRY, 0);
00279         CAN_RemoveEntry(EXPLICIT_STANDARD_ENTRY, 0);
00280         CAN_RemoveEntry(GROUP_STANDARD_ENTRY, 0);
00281         CAN_RemoveEntry(EXPLICIT_EXTEND_ENTRY, 2);
00282         CAN_RemoveEntry(GROUP_EXTEND_ENTRY, 2);
00283
00284 }
00285 /*********************************************************************/
00293 void CAN_InitAFMessage(void) {
00294         /* 1st Message with 11-bit ID which exit in AF Look-up Table in FullCAN Section */
00295         AFTxMsg[0].id = 0x01;
00296         AFTxMsg[0].len = 0x08;
00297         AFTxMsg[0].type = DATA_FRAME;
00298         AFTxMsg[0].format = STD_ID_FORMAT;
00299         AFTxMsg[0].dataA[0] = AFTxMsg[0].dataA[1] = AFTxMsg[0].dataA[2]= AFTxMsg[0].dataA[3]= 0x78;
00300         AFTxMsg[0].dataB[0] = AFTxMsg[0].dataB[1] = AFTxMsg[0].dataB[2]= AFTxMsg[0].dataB[3]= 0x21;
00301
00302         /* 2nd Message with 11-bit ID which not exit in AF Look-up Table */
00303         AFTxMsg[1].id = 0x04;
00304         AFTxMsg[1].len = 0x08;
00305         AFTxMsg[1].type = DATA_FRAME;
00306         AFTxMsg[1].format = STD_ID_FORMAT;
00307         AFTxMsg[1].dataA[0] = AFTxMsg[1].dataA[1] = AFTxMsg[1].dataA[2]= AFTxMsg[1].dataA[3]= 0x23;
00308         AFTxMsg[1].dataB[0] = AFTxMsg[1].dataB[1] = AFTxMsg[1].dataB[2]= AFTxMsg[1].dataB[3]= 0x45;
00309
00310         /* 3th Message with 11-bit ID which exit in AF Look-up Table in SFF Section*/
00311         AFTxMsg[2].id = 0x08;
00312         AFTxMsg[2].len = 0x08;
00313         AFTxMsg[2].type = DATA_FRAME;
00314         AFTxMsg[2].format = STD_ID_FORMAT;
00315         AFTxMsg[2].dataA[0] = AFTxMsg[2].dataA[1] = AFTxMsg[2].dataA[2]= AFTxMsg[2].dataA[3]= 0x15;
00316         AFTxMsg[2].dataB[0] = AFTxMsg[2].dataB[1] = AFTxMsg[2].dataB[2]= AFTxMsg[2].dataB[3]= 0x36;
00317
00318         /* 4th Message with 11-bit ID which not exit in AF Look-up Table */
00319         AFTxMsg[3].id = 0x05;
00320         AFTxMsg[3].len = 0x08;
00321         AFTxMsg[3].type = DATA_FRAME;
00322         AFTxMsg[3].format = STD_ID_FORMAT;
00323         AFTxMsg[3].dataA[0] = AFTxMsg[3].dataA[1] = AFTxMsg[3].dataA[2]= AFTxMsg[3].dataA[3]= 0x78;
00324         AFTxMsg[3].dataB[0] = AFTxMsg[3].dataB[1] = AFTxMsg[3].dataB[2]= AFTxMsg[3].dataB[3]= 0x21;
00325
00326         /* 5th Message with 11-bit ID which exit in AF Look-up Table in Group SFF Section*/
00327         AFTxMsg[4].id = 0x15;
00328         AFTxMsg[4].len = 0x08;
00329         AFTxMsg[4].type = DATA_FRAME;
00330         AFTxMsg[4].format = STD_ID_FORMAT;
00331         AFTxMsg[4].dataA[0] = AFTxMsg[4].dataA[1] = AFTxMsg[4].dataA[2]= AFTxMsg[4].dataA[3]= 0x65;
00332         AFTxMsg[4].dataB[0] = AFTxMsg[4].dataB[1] = AFTxMsg[4].dataB[2]= AFTxMsg[4].dataB[3]= 0x37;
00333
00334         /* 6th Message with 11-bit ID which not exit in AF Look-up Table */
00335         AFTxMsg[5].id = 0x26;
00336         AFTxMsg[5].len = 0x08;
00337         AFTxMsg[5].type = DATA_FRAME;
00338         AFTxMsg[5].format = STD_ID_FORMAT;
00339         AFTxMsg[5].dataA[0] = AFTxMsg[5].dataA[1] = AFTxMsg[5].dataA[2]= AFTxMsg[5].dataA[3]= 0x76;
00340         AFTxMsg[5].dataB[0] = AFTxMsg[5].dataB[1] = AFTxMsg[5].dataB[2]= AFTxMsg[5].dataB[3]= 0x32;
00341
00342         /* 7th Message with 29-bit ID which exit in AF Look-up Table in EFF Section */
00343         AFTxMsg[6].id = (3 << 11); //0x00001800
00344         AFTxMsg[6].len = 0x08;
00345         AFTxMsg[6].type = DATA_FRAME;
00346         AFTxMsg[6].format = EXT_ID_FORMAT;
00347         AFTxMsg[6].dataA[0] = AFTxMsg[6].dataA[1] = AFTxMsg[6].dataA[2]= AFTxMsg[6].dataA[3]= 0x45;
00348         AFTxMsg[6].dataB[0] = AFTxMsg[6].dataB[1] = AFTxMsg[6].dataB[2]= AFTxMsg[6].dataB[3]= 0x87;
00349
00350         /* 8th Message with 29-bit ID which not exit in AF Look-up Table */
00351         AFTxMsg[7].id = (3 << 11) + 0x05; //0x00001801
00352         AFTxMsg[7].len = 0x08;
00353         AFTxMsg[7].type = DATA_FRAME;
00354         AFTxMsg[7].format = EXT_ID_FORMAT;
00355         AFTxMsg[7].dataA[0] = AFTxMsg[7].dataA[1] = AFTxMsg[7].dataA[2]= AFTxMsg[7].dataA[3]= 0x78;
00356         AFTxMsg[7].dataB[0] = AFTxMsg[7].dataB[1] = AFTxMsg[7].dataB[2]= AFTxMsg[7].dataB[3]= 0x21;
00357
00358         /* 9th Message with 29-bit ID which exit in AF Look-up Table in Group of EFF Section*/
00359         AFTxMsg[8].id = (9 << 11) + 0x01; //0x00004801
00360         AFTxMsg[8].len = 0x08;
00361         AFTxMsg[8].type = DATA_FRAME;
00362         AFTxMsg[8].format = EXT_ID_FORMAT;
00363         AFTxMsg[8].dataA[0] = AFTxMsg[8].dataA[1] = AFTxMsg[8].dataA[2]= AFTxMsg[8].dataA[3]= 0x52;
00364         AFTxMsg[8].dataB[0] = AFTxMsg[8].dataB[1] = AFTxMsg[8].dataB[2]= AFTxMsg[8].dataB[3]= 0x06;
00365
00366         /* 10th Message with 29-bit ID which not exit in AF Look-up Table */
00367         AFTxMsg[9].id = (0x0A << 11) + 0x01; //0x00005001
00368         AFTxMsg[9].len = 0x08;
00369         AFTxMsg[9].type = DATA_FRAME;
00370         AFTxMsg[9].format = EXT_ID_FORMAT;
00371         AFTxMsg[9].dataA[0] = AFTxMsg[9].dataA[1] = AFTxMsg[9].dataA[2]= AFTxMsg[9].dataA[3]= 0x85;
00372         AFTxMsg[9].dataB[0] = AFTxMsg[9].dataB[1] = AFTxMsg[9].dataB[2]= AFTxMsg[9].dataB[3]= 0x27;
00373
00374         AFRxMsg[0].id = AFRxMsg[1].id = AFRxMsg[2].id = AFRxMsg[3].id = AFRxMsg[4].id = 0x00;
00375         AFRxMsg[0].len = AFRxMsg[1].len = AFRxMsg[2].len = AFRxMsg[3].len = AFRxMsg[4].len = 0x00;
00376         AFRxMsg[0].type = AFRxMsg[1].type = AFRxMsg[2].type = AFRxMsg[3].type = AFRxMsg[4].type = 0x00;
00377         AFRxMsg[0].format = AFRxMsg[1].format = AFRxMsg[2].format = AFRxMsg[3].format = AFRxMsg[4].format = 0x00;
00378         AFRxMsg[0].dataA[0] = AFRxMsg[1].dataA[0] = AFRxMsg[2].dataA[0] = AFRxMsg[3].dataA[0] = AFRxMsg[4].dataA[0] = 0x00;
00379         AFRxMsg[0].dataA[1] = AFRxMsg[1].dataA[1] = AFRxMsg[2].dataA[1] = AFRxMsg[3].dataA[1] = AFRxMsg[4].dataA[1] = 0x00;
00380         AFRxMsg[0].dataA[2] = AFRxMsg[1].dataA[2] = AFRxMsg[2].dataA[2] = AFRxMsg[3].dataA[2] = AFRxMsg[4].dataA[2] = 0x00;
00381         AFRxMsg[0].dataA[3] = AFRxMsg[1].dataA[3] = AFRxMsg[2].dataA[3] = AFRxMsg[3].dataA[3] = AFRxMsg[4].dataA[3] = 0x00;
00382
00383         AFRxMsg[0].dataB[0] = AFRxMsg[1].dataB[0] = AFRxMsg[2].dataB[0] = AFRxMsg[3].dataB[0] = AFRxMsg[4].dataB[0] = 0x00;
00384         AFRxMsg[0].dataB[1] = AFRxMsg[1].dataB[1] = AFRxMsg[2].dataB[1] = AFRxMsg[3].dataB[1] = AFRxMsg[4].dataB[1] = 0x00;
00385         AFRxMsg[0].dataB[2] = AFRxMsg[1].dataB[2] = AFRxMsg[2].dataB[2] = AFRxMsg[3].dataB[2] = AFRxMsg[4].dataB[2] = 0x00;
00386         AFRxMsg[0].dataB[3] = AFRxMsg[1].dataB[3] = AFRxMsg[2].dataB[3] = AFRxMsg[3].dataB[3] = AFRxMsg[4].dataB[3] = 0x00;
00387 }
00388 /*********************************************************************/
00393 void print_menu()
00394 {
00395         _DBG_(menu);
00396 }
00397
00398 /*-------------------------MAIN FUNCTION------------------------------*/
00399 /*********************************************************************/
00404 int c_entry(void) { /* Main Program */
00405         uint32_t i;
00406         uint32_t cnt;
00407         CAN_ERROR error;
00408         PINSEL_CFG_Type PinCfg;
00409
00410         /* Initialize debug via UART0
00411          * – 115200bps
00412          * – 8 data bit
00413          * – No parity
00414          * – 1 stop bit
00415          * – No flow control
00416          */
00417         debug_frmwrk_init();
00418         print_menu();
00419
00420         /* Pin configuration
00421          * CAN1: select P0.0 as RD1. P0.1 as TD1
00422          * CAN2: select P2.7 as RD2, P2.8 as RD2
00423          */
00424         PinCfg.Funcnum = 1;
00425         PinCfg.OpenDrain = 0;
00426         PinCfg.Pinmode = 0;
00427         PinCfg.Pinnum = 0;
00428         PinCfg.Portnum = 0;
00429         PINSEL_ConfigPin(&PinCfg);
00430         PinCfg.Pinnum = 1;
00431         PINSEL_ConfigPin(&PinCfg);
00432
00433         PinCfg.Pinnum = 7;
00434         PinCfg.Portnum = 2;
00435         PINSEL_ConfigPin(&PinCfg);
00436         PinCfg.Pinnum = 8;
00437         PINSEL_ConfigPin(&PinCfg);
00438
00439         //Initialize CAN1 & CAN2
00440         CAN_Init(LPC_CAN1, 125000);
00441         CAN_Init(LPC_CAN2, 125000);
00442
00443         //Enable Receive Interrupt
00444         CAN_IRQCmd(LPC_CAN2, CANINT_FCE, ENABLE);
00445         CAN_IRQCmd(LPC_CAN2, CANINT_RIE, ENABLE);
00446
00447         //Enable CAN Interrupt
00448         NVIC_EnableIRQ(CAN_IRQn);
00449
00450         /* First, we send 10 messages:
00451          * - message 0,2,4,6,8 have id in AFLUT >>> will be received
00452          * - message 1,3,5,7,9 don't have id in AFLUT >>> will be ignored
00453          * Then, we change AFLUT by load/remove entries in AFLUT and re-send messages
00454          * - message 1,3,5,7,9 have id in AFLUT >>> will be received
00455          * - message 0,2,4,6,8 don't have id in AFLUT >>> will be ignored
00456          * Note that: FullCAN Object must be read from FullCAN Object Section next to AFLUT
00457          */
00458         /*-------------------------Init Message & AF Look-up Table------------------------*/
00459
00460         _DBG_("Test Acceptance Filter function...");
00461         _DBG_("Press '1' to initialize message and AF Loop-up Table...");_DBG_("");
00462         while(_DG !='1');
00463         CAN_InitAFMessage(); /* initialize Transmit Message */
00464         _DBG_("Init message finished!!!");
00465         CAN_SetupAFTable(); /* initialize AF Look-up Table sections*/
00466         error = CAN_SetupAFLUT(LPC_CANAF,&AFTable); /* install AF Look-up Table */
00467         if (error != CAN_OK) {
00468                 _DBG_("Setup AF: ERROR...");
00469                 while (1); // AF Table has error
00470         }
00471         else _DBG_("Setup AF: SUCCESSFUL!!!");_DBG_("");
00472
00473
00474         /*-------------------------Send messages------------------------*/
00475         _DBG_("Press '2' to start CAN transferring operation...");_DBG_("");
00476         while(_DG !='2');
00477         for (i = 0; i < CAN_TX_MSG_CNT; i++) {
00478                 CAN_SendMsg(LPC_CAN1, &AFTxMsg[i]);
00479                 PrintMessage(&AFTxMsg[i]);_DBG_("");
00480                 for(cnt=0;cnt<10000;cnt++); //transmit delay
00481                 CANTxCount++;
00482         }
00483         _DBG_("Sending finished !!!");
00484
00485         /*-------------------------Display Received messages------------------------*/
00486         _DBG_("Press '3' to display received messages...");_DBG_("");
00487         while(_DG !='3');
00488         for (i = 0; i < CAN_RX_MSG_CNT; i++) {
00489                 PrintMessage(&AFRxMsg[i]);_DBG_("");
00490         }
00491
00492         /*-------------------------Change AFLUT Table --------------------*/
00493         _DBG_("Press '4' to change AF look-up table...");_DBG_("");
00494         while(_DG !='4');
00495         CAN_ChangeAFTable();
00496         _DBG_("Change AFLUT: FINISHED!!!");
00497         CAN_SetAFMode(LPC_CANAF, CAN_eFCAN);
00498         CAN_InitAFMessage();
00499         CANRxCount = CANTxCount = 0;
00500
00501         /*-------------------------Re-Send messages------------------------*/
00502         _DBG_("Press '5' to re-send messages...");_DBG_("");
00503         while(_DG !='5');
00504         for (i = 0; i < CAN_TX_MSG_CNT; i++) {
00505                 CAN_SendMsg(LPC_CAN1, &AFTxMsg[i]);
00506                 PrintMessage(&AFTxMsg[i]);_DBG_("");
00507                 for(cnt=0;cnt<10000;cnt++); //transmit delay
00508                 CANTxCount++;
00509         }
00510
00511         /*-------------------------Display received messages------------------------*/
00512         _DBG_("Re-Sending finished !!!");
00513
00514         _DBG_("Press '6' to display received messages...");_DBG_("");
00515         while(_DG !='6');
00516         for (i = 0; i < CAN_RX_MSG_CNT; i++) {
00517                 PrintMessage(&AFRxMsg[i]);_DBG_("");
00518         }
00519         _DBG_("Demo terminal !!!");
00520
00521         CAN_DeInit(LPC_CAN1);
00522         CAN_DeInit(LPC_CAN2);
00523         while (1);
00524 }
00525
00526 /* With ARM and GHS toolsets, the entry point is main() - this will
00527  allow the linker to generate wrapper code to setup stacks, allocate
00528  heap area, and initialize and copy code and data segments. For GNU
00529  toolsets, the entry point is through __start() in the crt0_gnu.asm
00530  file, and that startup code will setup stacks and data */
00531 int main(void) {
00532         return c_entry();
00533 }
00534
00535 #ifdef  DEBUG
00536 /*******************************************************************************
00537  * @brief               Reports the name of the source file and the source line number
00538  *                              where the CHECK_PARAM error has occurred.
00539  * @param[in]   file Pointer to the source file name
00540  * @param[in]    line assert_param error line source number
00541  * @return              None
00542  *******************************************************************************/
00543 void check_failed(uint8_t *file, uint32_t line) {
00544         /* User can add his own implementation to report the file name and line number,
00545          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00546
00547         /* Infinite loop */
00548         while (1)
00549                 ;
00550 }
00551 #endif
00552
00553 /*
00554  * @}
00555  */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_bypass_mode/can_test_bypass_mode.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_bypass_mode/can_test_bypass_mode.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          can_test_bypass_mode.c                  2010-05-21
00003 */
00025 #include "lpc17xx_can.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00035 /************************** PRIVATE VARIABLES *************************/
00036 uint8_t menu[]=
00037         "*******************************************************************************\n\r"
00038         "Hello NXP Semiconductors \n\r"
00039         "CAN bypass demo \n\r"
00040         "\t - MCU: LPC17xx \n\r"
00041         "\t - Core: ARM CORTEX-M3 \n\r"
00042         "\t - Communicate via: UART0 - 115200 bps \n\r"
00043         "Use two CAN peripherals: CAN1 and CAN2 to communicate\n\r"
00044         "This example used to test Bypass mode\n\r"
00045         "*******************************************************************************\n\r";
00046
00048 CAN_MSG_Type TXMsg, RXMsg; // messages for test Bypass mode
00049 uint32_t CANRxCount, CANTxCount = 0;
00050
00051 /************************** PRIVATE FUNCTIONS *************************/
00052 void CAN_IRQHandler(void);
00053
00054 void CAN_InitMessage(void);
00055 void PrintMessage(CAN_MSG_Type* msg);
00056 void print_menu(void);
00057
00058
00059 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00060 /*********************************************************************/
00065 void CAN_IRQHandler()
00066 {
00067         uint8_t IntStatus;
00068         uint32_t data1;
00069         /* get interrupt status
00070          * Note that: Interrupt register CANICR will be reset after read.
00071          * So function "CAN_IntGetStatus" should be call only one time
00072          */
00073         IntStatus = CAN_IntGetStatus(LPC_CAN2);
00074         //check receive interrupt
00075         if((IntStatus>>0)&0x01)
00076         {
00077                 CAN_ReceiveMsg(LPC_CAN2,&RXMsg);
00078                 PrintMessage(&RXMsg);
00079                 CANRxCount++; //count success received message
00080                 //increase data for next TX Message
00081                 TXMsg.id ++;
00082                 data1 = (TXMsg.dataA[0])|(((TXMsg.dataA[1]))<<8)|((TXMsg.dataA[2])<<16)|((TXMsg.dataA[3])<<24);
00083                 if(data1 == 0xFFFFFFFF) data1 = 0;
00084                 else data1++;
00085                 *((uint8_t *) &TXMsg.dataA[0])= *((uint8_t *) &TXMsg.dataB[0])= data1 & 0x000000FF;
00086                 *((uint8_t *) &TXMsg.dataA[1])= *((uint8_t *) &TXMsg.dataB[1])=(data1 & 0x0000FF00)>>8;;
00087                 *((uint8_t *) &TXMsg.dataA[2])= *((uint8_t *) &TXMsg.dataB[2])=(data1 & 0x00FF0000)>>16;
00088                 *((uint8_t *) &TXMsg.dataA[3])= *((uint8_t *) &TXMsg.dataB[3])=(data1 & 0xFF000000)>>24;
00089
00090                 CAN_SendMsg(LPC_CAN1, &TXMsg);
00091         }
00092 }
00093
00094 /*-------------------------PRIVATE FUNCTIONS----------------------------*/
00095 /*********************************************************************/
00100 void PrintMessage(CAN_MSG_Type* CAN_Msg)
00101 {
00102         uint32_t data;
00103         _DBG("Message ID:     ");
00104         _DBH32(CAN_Msg->id);_DBG_("");
00105         _DBG("Message length: ");
00106         _DBH32(CAN_Msg->len);_DBG_(" BYTES");
00107         _DBG("Message type:   ");
00108         if(CAN_Msg->type==DATA_FRAME)
00109         {
00110                 _DBG_("DATA FRAME ");
00111         }
00112         else
00113                 _DBG_("REMOTE FRAME ");
00114         _DBG("Message format: ");
00115         if(CAN_Msg->format==STD_ID_FORMAT)
00116         {
00117                 _DBG_("STANDARD ID FRAME FORMAT");
00118         }
00119         else
00120                 _DBG_("EXTENDED ID FRAME FORMAT");
00121         _DBG("Message dataA:  ");
00122         data = (CAN_Msg->dataA[0])|(CAN_Msg->dataA[1]<<8)|(CAN_Msg->dataA[2]<<16)|(CAN_Msg->dataA[3]<<24);
00123         _DBH32(data);_DBG_("");
00124         data = (CAN_Msg->dataB[0])|(CAN_Msg->dataB[1]<<8)|(CAN_Msg->dataB[2]<<16)|(CAN_Msg->dataB[3]<<24);
00125         _DBG("Message dataB:  ");
00126         _DBH32(data);_DBG_("");
00127         _DBG_("");
00128 }
00129
00130 /*********************************************************************/
00135 void CAN_InitMessage(void) {
00136         TXMsg.format = EXT_ID_FORMAT;
00137         TXMsg.id = 0x00001234;
00138         TXMsg.len = 8;
00139         TXMsg.type = DATA_FRAME;
00140         TXMsg.dataA[0] = TXMsg.dataA[1] = TXMsg.dataA[2] = TXMsg.dataA[3] = 0x00000000;
00141         TXMsg.dataB[0] = TXMsg.dataB[1] = TXMsg.dataB[2] = TXMsg.dataB[3] = 0x00000000;
00142
00143         RXMsg.format = 0x00;
00144         RXMsg.id = 0x00;
00145         RXMsg.len = 0x00;
00146         RXMsg.type = 0x00;
00147         RXMsg.dataA[0] = RXMsg.dataA[1] = RXMsg.dataA[2] = RXMsg.dataA[3] = 0x00000000;
00148         RXMsg.dataB[0] = RXMsg.dataB[1] = RXMsg.dataB[2] = RXMsg.dataB[3] = 0x00000000;
00149 }
00150
00151 /*********************************************************************/
00156 void print_menu()
00157 {
00158         _DBG_(menu);
00159 }
00160
00161 /*-------------------------MAIN FUNCTION------------------------------*/
00162 /*********************************************************************/
00167 int c_entry(void) { /* Main Program */
00168         PINSEL_CFG_Type PinCfg;
00169
00170         /* Initialize debug via UART0
00171          * – 115200bps
00172          * – 8 data bit
00173          * – No parity
00174          * – 1 stop bit
00175          * – No flow control
00176          */
00177         debug_frmwrk_init();
00178         print_menu();
00179
00180         /* Pin configuration
00181          * CAN1: select P0.0 as RD1. P0.1 as TD1
00182          * CAN2: select P2.7 as RD2, P2.8 as RD2
00183          */
00184         PinCfg.Funcnum = 1;
00185         PinCfg.OpenDrain = 0;
00186         PinCfg.Pinmode = 0;
00187         PinCfg.Pinnum = 0;
00188         PinCfg.Portnum = 0;
00189         PINSEL_ConfigPin(&PinCfg);
00190         PinCfg.Pinnum = 1;
00191         PINSEL_ConfigPin(&PinCfg);
00192
00193         PinCfg.Pinnum = 7;
00194         PinCfg.Portnum = 2;
00195         PINSEL_ConfigPin(&PinCfg);
00196         PinCfg.Pinnum = 8;
00197         PINSEL_ConfigPin(&PinCfg);
00198
00199         //Initialize CAN1 & CAN2
00200         CAN_Init(LPC_CAN1, 125000);
00201         CAN_Init(LPC_CAN2, 125000);
00202
00203         //Enable Interrupt
00204         CAN_IRQCmd(LPC_CAN2, CANINT_RIE, ENABLE);
00205
00206         //Enable CAN Interrupt
00207         NVIC_EnableIRQ(CAN_IRQn);
00208
00209         _DBG_("CAN test Bypass Mode function...");
00210         _DBG_("Press '1' to initialize CAN message...");_DBG_("");
00211         while(_DG !='1');
00212         CAN_SetAFMode(LPC_CANAF,CAN_AccBP);
00213         CAN_InitMessage();
00214         PrintMessage(&TXMsg);
00215         _DBG_("Message ID and data will be increased continuously...");
00216
00217         _DBG_("Press '2' to start CAN operation...");
00218         while(_DG !='2');
00219
00223         CAN_SendMsg(LPC_CAN1, &TXMsg);
00224
00225         while (1);
00226 }
00227
00228 /* With ARM and GHS toolsets, the entry point is main() - this will
00229  allow the linker to generate wrapper code to setup stacks, allocate
00230  heap area, and initialize and copy code and data segments. For GNU
00231  toolsets, the entry point is through __start() in the crt0_gnu.asm
00232  file, and that startup code will setup stacks and data */
00233 int main(void) {
00234         return c_entry();
00235 }
00236
00237 #ifdef  DEBUG
00238 /*******************************************************************************
00239  * @brief               Reports the name of the source file and the source line number
00240  *                              where the CHECK_PARAM error has occurred.
00241  * @param[in]   file Pointer to the source file name
00242  * @param[in]    line assert_param error line source number
00243  * @return              None
00244  *******************************************************************************/
00245 void check_failed(uint8_t *file, uint32_t line) {
00246         /* User can add his own implementation to report the file name and line number,
00247          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00248
00249         /* Infinite loop */
00250         while (1)
00251                 ;
00252 }
00253 #endif
00254
00255 /*
00256  * @}
00257  */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_two_kit/can_test_two_kit.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/CAN/CAN_test_two_kit/can_test_two_kit.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          can_test_two_kit.c                      2010-05-21
00003 */
00025 #include "lpc17xx_can.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00035 /************************** PRIVATE MACROS *************************/
00036 #define CAN_TRANSMIT                            1
00037 #define CAN_RECEIVE                                     !CAN_TRANSMIT
00038 #define TX_BUFFER_SIZE                          4
00039 #define RX_BUFFER_SIZE                          2
00040
00041 /************************** PRIVATE VARIABLES *************************/
00042 uint8_t menu[]=
00043         "********************************************************************************\n\r"
00044         "Hello NXP Semiconductors \n\r"
00045         "CAN demo \n\r"
00046         "\t - MCU: LPC17xx \n\r"
00047         "\t - Core: ARM CORTEX-M3 \n\r"
00048         "\t - Communicate via: UART0 - 115200 bps \n\r"
00049         "Use 2 CAN peripherals on 2 boards to transfer data \n\r"
00050         "********************************************************************************\n\r";
00051
00053 CAN_MSG_Type TXMsg, RXMsg; // messages for test Bypass mode
00054 CAN_MSG_Type AFTxMsg[TX_BUFFER_SIZE], AFRxMsg[RX_BUFFER_SIZE]; //messages for test Acceptance Filter mode
00055 uint32_t CANRxCount = 0, CANTxCount = 0;
00056 uint32_t CANErrCount = 0;
00057
00058 /************************** PRIVATE FUNCTIONS *************************/
00059 void CAN_IRQHandler(void);
00060
00061 void CAN_InitMessage(void);
00062 Bool CAN_VerifyMessage(CAN_MSG_Type Msg1, CAN_MSG_Type Msg2);
00063 CAN_ERROR CAN_SetupAFTable(void);
00064 void CAN_InitAFMessage(void);
00065 void PrintMessage(CAN_MSG_Type* msg);
00066
00067
00068 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00069 /*********************************************************************/
00074 void CAN_IRQHandler()
00075 {
00076         uint8_t IntStatus;
00077         /* get interrupt status
00078          * Note that: Interrupt register CANICR will be reset after read.
00079          * So function "CAN_IntGetStatus" should be call only one time
00080          */
00081         IntStatus = CAN_IntGetStatus(LPC_CAN1);
00082         //check receive interrupt
00083         if((IntStatus>>0)&0x01)
00084         {
00085                 CAN_ReceiveMsg(LPC_CAN1, &AFRxMsg[CANRxCount]);
00086                 PrintMessage(&AFRxMsg[CANRxCount]);_DBG_("");
00087                 CANRxCount++;
00088         }
00089 }
00090
00091 /*-------------------------PRIVATE FUNCTIONS----------------------------*/
00092 /*********************************************************************/
00097 void PrintMessage(CAN_MSG_Type* CAN_Msg)
00098 {
00099         uint32_t data;
00100         _DBG("Message ID:     ");
00101         _DBH32(CAN_Msg->id);_DBG_("");
00102         _DBG("Message length: ");
00103         _DBH32(CAN_Msg->len);_DBG_(" BYTES");
00104         _DBG("Message type:   ");
00105         if(CAN_Msg->type==DATA_FRAME)
00106         {
00107                 _DBG_("DATA FRAME ");
00108         }
00109         else
00110                 _DBG_("REMOTE FRAME ");
00111         _DBG("Message format: ");
00112         if(CAN_Msg->format==STD_ID_FORMAT)
00113         {
00114                 _DBG_("STANDARD ID FRAME FORMAT");
00115         }
00116         else
00117                 _DBG_("EXTENDED ID FRAME FORMAT");
00118         _DBG("Message dataA:  ");
00119         data = (CAN_Msg->dataA[0])|(CAN_Msg->dataA[1]<<8)|(CAN_Msg->dataA[2]<<16)|(CAN_Msg->dataA[3]<<24);
00120         _DBH32(data);_DBG_("");
00121         data = (CAN_Msg->dataB[0])|(CAN_Msg->dataB[1]<<8)|(CAN_Msg->dataB[2]<<16)|(CAN_Msg->dataB[3]<<24);
00122         _DBG("Message dataB:  ");
00123         _DBH32(data);_DBG_("");
00124         _DBG_("");
00125 }
00126
00127 /*********************************************************************/
00134 CAN_ERROR CAN_SetupAFTable(void) {
00135         uint32_t i = 0;
00136         CAN_ERROR result;
00137         /* Set up Explicit Standard Frame Format Identifier Section
00138          * In this simple test, it has 16 entries ID
00139          */
00140         for (i = 0; i < 16; i++) {
00141                 result = CAN_LoadExplicitEntry(LPC_CAN1, i + 1, STD_ID_FORMAT);
00142         }
00143         /* Set up Explicit Extended Frame Format Identifier Section
00144          * In this simple test, it has 16 entries ID
00145          */
00146         for (i = 0; i < 16; i++) {
00147                 result = CAN_LoadExplicitEntry(LPC_CAN1, i << 11, EXT_ID_FORMAT);
00148         }
00149         return result;
00150 }
00151
00152 /*********************************************************************/
00158 void CAN_InitAFMessage(void) {
00159         /* 1st Message with 11-bit ID which exit in AF Look-up Table */
00160         AFTxMsg[0].id = 0x08;
00161         AFTxMsg[0].len = 0x08;
00162         AFTxMsg[0].type = DATA_FRAME;
00163         AFTxMsg[0].format = STD_ID_FORMAT;
00164         AFTxMsg[0].dataA[0] = AFTxMsg[0].dataA[1] = AFTxMsg[0].dataA[2]= AFTxMsg[0].dataA[3]= 0x78;
00165         AFTxMsg[0].dataB[0] = AFTxMsg[0].dataB[1] = AFTxMsg[0].dataB[2]= AFTxMsg[0].dataB[3]= 0x21;
00166
00167         /* 2nd Message with 11-bit ID which not exit in AF Look-up Table */
00168         AFTxMsg[1].id = 0xA0;
00169         AFTxMsg[1].len = 0x08;
00170         AFTxMsg[1].type = DATA_FRAME;
00171         AFTxMsg[1].format = STD_ID_FORMAT;
00172         AFTxMsg[1].dataA[0] = AFTxMsg[1].dataA[1] = AFTxMsg[1].dataA[2]= AFTxMsg[1].dataA[3]= 0x23;
00173         AFTxMsg[1].dataB[0] = AFTxMsg[1].dataB[1] = AFTxMsg[1].dataB[2]= AFTxMsg[1].dataB[3]= 0x45;
00174
00175         /* 3th Message with 29-bit ID which exit in AF Look-up Table */
00176         AFTxMsg[2].id = (0x08 << 11);
00177         AFTxMsg[2].len = 0x08;
00178         AFTxMsg[2].type = DATA_FRAME;
00179         AFTxMsg[2].format = EXT_ID_FORMAT;
00180         AFTxMsg[2].dataA[0] = AFTxMsg[2].dataA[1] = AFTxMsg[2].dataA[2]= AFTxMsg[2].dataA[3]= 0x15;
00181         AFTxMsg[2].dataB[0] = AFTxMsg[2].dataB[1] = AFTxMsg[2].dataB[2]= AFTxMsg[2].dataB[3]= 0x36;
00182
00183         /* 4th Message with 29-bit ID which not exit in AF Look-up Table */
00184         AFTxMsg[3].id = (0xA0 << 11);
00185         AFTxMsg[3].len = 0x08;
00186         AFTxMsg[3].type = DATA_FRAME;
00187         AFTxMsg[3].format = EXT_ID_FORMAT;
00188         AFTxMsg[3].dataA[0] = AFTxMsg[3].dataA[1] = AFTxMsg[3].dataA[2]= AFTxMsg[3].dataA[3]= 0x78;
00189         AFTxMsg[3].dataB[0] = AFTxMsg[3].dataB[1] = AFTxMsg[3].dataB[2]= AFTxMsg[3].dataB[3]= 0x21;
00190
00191         AFRxMsg[0].id = AFRxMsg[1].id = 0x00;
00192         AFRxMsg[0].len = AFRxMsg[1].len = 0x00;
00193         AFRxMsg[0].type = AFRxMsg[1].type = 0x00;
00194         AFRxMsg[0].format = AFRxMsg[1].format = 0x00;
00195         AFRxMsg[0].dataA[0] = AFRxMsg[1].dataA[0] = 0x00;
00196         AFRxMsg[0].dataA[1] = AFRxMsg[1].dataA[1] = 0x00;
00197         AFRxMsg[0].dataA[2] = AFRxMsg[1].dataA[2] = 0x00;
00198         AFRxMsg[0].dataA[3] = AFRxMsg[1].dataA[3] = 0x00;
00199         AFRxMsg[0].dataB[0] = AFRxMsg[1].dataB[0] = 0x00;
00200         AFRxMsg[0].dataB[1] = AFRxMsg[1].dataB[1] = 0x00;
00201         AFRxMsg[0].dataB[2] = AFRxMsg[1].dataB[2] = 0x00;
00202         AFRxMsg[0].dataB[3] = AFRxMsg[1].dataB[3] = 0x00;
00203 }
00204 /*********************************************************************/
00209 void print_menu(void)
00210 {
00211         _DBG_(menu);
00212 }
00213
00214 /*-------------------------MAIN FUNCTION------------------------------*/
00215 /*********************************************************************/
00220 int c_entry(void) { /* Main Program */
00221         uint32_t result,i;
00222         PINSEL_CFG_Type PinCfg;
00223
00224         /* Initialize debug via UART0
00225          * – 115200bps
00226          * – 8 data bit
00227          * – No parity
00228          * – 1 stop bit
00229          * – No flow control
00230          */
00231         debug_frmwrk_init();
00232         print_menu();
00233
00234         /* Pin configuration
00235          * CAN1: select P0.0 as RD1. P0.1 as TD1
00236          */
00237         PinCfg.Funcnum = 1;
00238         PinCfg.OpenDrain = 0;
00239         PinCfg.Pinmode = 0;
00240         PinCfg.Pinnum = 0;
00241         PinCfg.Portnum = 0;
00242         PINSEL_ConfigPin(&PinCfg);
00243         PinCfg.Pinnum = 1;
00244         PINSEL_ConfigPin(&PinCfg);
00245
00246         //Initialize CAN1
00247         CAN_Init(LPC_CAN1, 125000);
00248 #if CAN_RECEIVE
00249         //Enable Interrupt
00250         CAN_IRQCmd(LPC_CAN1, CANINT_RIE, ENABLE);
00251
00252         //Enable CAN Interrupt
00253         NVIC_EnableIRQ(CAN_IRQn);
00254         CAN_SetAFMode(LPC_CANAF, CAN_Normal);
00255
00256         /* Test Acceptance Filter with a simple AF Look-up Table. It just has two sections:
00257          *              - Explicit Standard Frame Format Identifier Section
00258          *              - Explicit Extended Frame Format Identifier Section
00259          * We use 4 Message:
00260          *              - 1 Message with 11-bit ID which exit in AF Look-up Table
00261          *      - 1 Message with 11-bit ID which not exit in AF Look-up Table
00262          *      - 1 Message with 29-bit ID which exit in AF Look-up Table
00263          *      - 1 Message with 29-bit ID which not exit in AF Look-up Table
00264          *  to check Acceptance filter operation of CAN
00265          */
00266         _DBG_("Test Acceptance Filter function...");
00267         CAN_SetAFMode(LPC_CANAF, CAN_Normal);
00268         result = CAN_SetupAFTable(); /* setup AF Look-up Table */
00269         if (result != CAN_OK) {
00270                 _DBG_("Setup AF: ERROR...");
00271                 while(1);
00272         }
00273         else _DBG_("Setup AF: SUCCESSFUL...");_DBG_("");
00274         _DBG_("Recieving message...");
00275 #else
00276         CAN_InitAFMessage(); /* initialize Transmit Message */
00277         for (i = 0; i < TX_BUFFER_SIZE; i++)
00278         {
00279                 CAN_SendMsg(LPC_CAN1, &AFTxMsg[i]);
00280                 PrintMessage(&AFTxMsg[i]);_DBG_("");
00281                 for(result=0;result<10000;result++);
00282                 CANTxCount++;
00283         }
00284         _DBG_("Sending finished !!!");
00285 #endif
00286         while (1);
00287 }
00288
00289 /* With ARM and GHS toolsets, the entry point is main() - this will
00290  allow the linker to generate wrapper code to setup stacks, allocate
00291  heap area, and initialize and copy code and data segments. For GNU
00292  toolsets, the entry point is through __start() in the crt0_gnu.asm
00293  file, and that startup code will setup stacks and data */
00294 int main(void) {
00295         return c_entry();
00296 }
00297
00298 #ifdef  DEBUG
00299 /*******************************************************************************
00300  * @brief               Reports the name of the source file and the source line number
00301  *                              where the CHECK_PARAM error has occurred.
00302  * @param[in]   file Pointer to the source file name
00303  * @param[in]    line assert_param error line source number
00304  * @return              None
00305  *******************************************************************************/
00306 void check_failed(uint8_t *file, uint32_t line) {
00307         /* User can add his own implementation to report the file name and line number,
00308          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00309
00310         /* Infinite loop */
00311         while (1)
00312                 ;
00313 }
00314 #endif
00315
00316 /*
00317  * @}
00318  */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdc.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdc.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    CDC.h
00005  *      Purpose: USB Communication Device Class Definitions
00006  * Version: V1.20
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __CDC_H
00020 #define __CDC_H
00021 #include "lpc_types.h"
00022
00023 #if defined   (  __GNUC__  )
00024 #define __packed __attribute__((__packed__))
00025 #endif
00026 /*----------------------------------------------------------------------------
00027  *      Definitions  based on usbcdc11.pdf (www.usb.org)
00028  *---------------------------------------------------------------------------*/
00029 // Communication device class specification version 1.10
00030 #define CDC_V1_10                               0x0110
00031
00032 // Communication interface class code
00033 // (usbcdc11.pdf, 4.2, Table 15)
00034 #define CDC_COMMUNICATION_INTERFACE_CLASS       0x02
00035
00036 // Communication interface class subclass codes
00037 // (usbcdc11.pdf, 4.3, Table 16)
00038 #define CDC_DIRECT_LINE_CONTROL_MODEL           0x01
00039 #define CDC_ABSTRACT_CONTROL_MODEL              0x02
00040 #define CDC_TELEPHONE_CONTROL_MODEL             0x03
00041 #define CDC_MULTI_CHANNEL_CONTROL_MODEL         0x04
00042 #define CDC_CAPI_CONTROL_MODEL                  0x05
00043 #define CDC_ETHERNET_NETWORKING_CONTROL_MODEL   0x06
00044 #define CDC_ATM_NETWORKING_CONTROL_MODEL        0x07
00045
00046 // Communication interface class control protocol codes
00047 // (usbcdc11.pdf, 4.4, Table 17)
00048 #define CDC_PROTOCOL_COMMON_AT_COMMANDS         0x01
00049
00050 // Data interface class code
00051 // (usbcdc11.pdf, 4.5, Table 18)
00052 #define CDC_DATA_INTERFACE_CLASS                0x0A
00053
00054 // Data interface class protocol codes
00055 // (usbcdc11.pdf, 4.7, Table 19)
00056 #define CDC_PROTOCOL_ISDN_BRI                   0x30
00057 #define CDC_PROTOCOL_HDLC                       0x31
00058 #define CDC_PROTOCOL_TRANSPARENT                0x32
00059 #define CDC_PROTOCOL_Q921_MANAGEMENT            0x50
00060 #define CDC_PROTOCOL_Q921_DATA_LINK             0x51
00061 #define CDC_PROTOCOL_Q921_MULTIPLEXOR           0x52
00062 #define CDC_PROTOCOL_V42                        0x90
00063 #define CDC_PROTOCOL_EURO_ISDN                  0x91
00064 #define CDC_PROTOCOL_V24_RATE_ADAPTATION        0x92
00065 #define CDC_PROTOCOL_CAPI                       0x93
00066 #define CDC_PROTOCOL_HOST_BASED_DRIVER          0xFD
00067 #define CDC_PROTOCOL_DESCRIBED_IN_PUFD          0xFE
00068
00069 // Type values for bDescriptorType field of functional descriptors
00070 // (usbcdc11.pdf, 5.2.3, Table 24)
00071 #define CDC_CS_INTERFACE                        0x24
00072 #define CDC_CS_ENDPOINT                         0x25
00073
00074 // Type values for bDescriptorSubtype field of functional descriptors
00075 // (usbcdc11.pdf, 5.2.3, Table 25)
00076 #define CDC_HEADER                              0x00
00077 #define CDC_CALL_MANAGEMENT                     0x01
00078 #define CDC_ABSTRACT_CONTROL_MANAGEMENT         0x02
00079 #define CDC_DIRECT_LINE_MANAGEMENT              0x03
00080 #define CDC_TELEPHONE_RINGER                    0x04
00081 #define CDC_REPORTING_CAPABILITIES              0x05
00082 #define CDC_UNION                               0x06
00083 #define CDC_COUNTRY_SELECTION                   0x07
00084 #define CDC_TELEPHONE_OPERATIONAL_MODES         0x08
00085 #define CDC_USB_TERMINAL                        0x09
00086 #define CDC_NETWORK_CHANNEL                     0x0A
00087 #define CDC_PROTOCOL_UNIT                       0x0B
00088 #define CDC_EXTENSION_UNIT                      0x0C
00089 #define CDC_MULTI_CHANNEL_MANAGEMENT            0x0D
00090 #define CDC_CAPI_CONTROL_MANAGEMENT             0x0E
00091 #define CDC_ETHERNET_NETWORKING                 0x0F
00092 #define CDC_ATM_NETWORKING                      0x10
00093
00094 // CDC class-specific request codes
00095 // (usbcdc11.pdf, 6.2, Table 46)
00096 // see Table 45 for info about the specific requests.
00097 #define CDC_SEND_ENCAPSULATED_COMMAND           0x00
00098 #define CDC_GET_ENCAPSULATED_RESPONSE           0x01
00099 #define CDC_SET_COMM_FEATURE                    0x02
00100 #define CDC_GET_COMM_FEATURE                    0x03
00101 #define CDC_CLEAR_COMM_FEATURE                  0x04
00102 #define CDC_SET_AUX_LINE_STATE                  0x10
00103 #define CDC_SET_HOOK_STATE                      0x11
00104 #define CDC_PULSE_SETUP                         0x12
00105 #define CDC_SEND_PULSE                          0x13
00106 #define CDC_SET_PULSE_TIME                      0x14
00107 #define CDC_RING_AUX_JACK                       0x15
00108 #define CDC_SET_LINE_CODING                     0x20
00109 #define CDC_GET_LINE_CODING                     0x21
00110 #define CDC_SET_CONTROL_LINE_STATE              0x22
00111 #define CDC_SEND_BREAK                          0x23
00112 #define CDC_SET_RINGER_PARMS                    0x30
00113 #define CDC_GET_RINGER_PARMS                    0x31
00114 #define CDC_SET_OPERATION_PARMS                 0x32
00115 #define CDC_GET_OPERATION_PARMS                 0x33
00116 #define CDC_SET_LINE_PARMS                      0x34
00117 #define CDC_GET_LINE_PARMS                      0x35
00118 #define CDC_DIAL_DIGITS                         0x36
00119 #define CDC_SET_UNIT_PARAMETER                  0x37
00120 #define CDC_GET_UNIT_PARAMETER                  0x38
00121 #define CDC_CLEAR_UNIT_PARAMETER                0x39
00122 #define CDC_GET_PROFILE                         0x3A
00123 #define CDC_SET_ETHERNET_MULTICAST_FILTERS      0x40
00124 #define CDC_SET_ETHERNET_PMP_FILTER             0x41
00125 #define CDC_GET_ETHERNET_PMP_FILTER             0x42
00126 #define CDC_SET_ETHERNET_PACKET_FILTER          0x43
00127 #define CDC_GET_ETHERNET_STATISTIC              0x44
00128 #define CDC_SET_ATM_DATA_FORMAT                 0x50
00129 #define CDC_GET_ATM_DEVICE_STATISTICS           0x51
00130 #define CDC_SET_ATM_DEFAULT_VC                  0x52
00131 #define CDC_GET_ATM_VC_STATISTICS               0x53
00132
00133 // Communication feature selector codes
00134 // (usbcdc11.pdf, 6.2.2..6.2.4, Table 47)
00135 #define CDC_ABSTRACT_STATE                      0x01
00136 #define CDC_COUNTRY_SETTING                     0x02
00137
00138 // Feature Status returned for ABSTRACT_STATE Selector
00139 // (usbcdc11.pdf, 6.2.3, Table 48)
00140 #define CDC_IDLE_SETTING                        (1 << 0)
00141 #define CDC_DATA_MULTPLEXED_STATE               (1 << 1)
00142
00143
00144 // Control signal bitmap values for the SetControlLineState request
00145 // (usbcdc11.pdf, 6.2.14, Table 51)
00146 #define CDC_DTE_PRESENT                         (1 << 0)
00147 #define CDC_ACTIVATE_CARRIER                    (1 << 1)
00148
00149 // CDC class-specific notification codes
00150 // (usbcdc11.pdf, 6.3, Table 68)
00151 // see Table 67 for Info about class-specific notifications
00152 #define CDC_NOTIFICATION_NETWORK_CONNECTION     0x00
00153 #define CDC_RESPONSE_AVAILABLE                  0x01
00154 #define CDC_AUX_JACK_HOOK_STATE                 0x08
00155 #define CDC_RING_DETECT                         0x09
00156 #define CDC_NOTIFICATION_SERIAL_STATE           0x20
00157 #define CDC_CALL_STATE_CHANGE                   0x28
00158 #define CDC_LINE_STATE_CHANGE                   0x29
00159 #define CDC_CONNECTION_SPEED_CHANGE             0x2A
00160
00161 // UART state bitmap values (Serial state notification).
00162 // (usbcdc11.pdf, 6.3.5, Table 69)
00163 #define CDC_SERIAL_STATE_OVERRUN                (1 << 6)  // receive data overrun error has occurred
00164 #define CDC_SERIAL_STATE_PARITY                 (1 << 5)  // parity error has occurred
00165 #define CDC_SERIAL_STATE_FRAMING                (1 << 4)  // framing error has occurred
00166 #define CDC_SERIAL_STATE_RING                   (1 << 3)  // state of ring signal detection
00167 #define CDC_SERIAL_STATE_BREAK                  (1 << 2)  // state of break detection
00168 #define CDC_SERIAL_STATE_TX_CARRIER             (1 << 1)  // state of transmission carrier
00169 #define CDC_SERIAL_STATE_RX_CARRIER             (1 << 0)  // state of receiver carrier
00170
00171
00172 /*----------------------------------------------------------------------------
00173  *      Structures  based on usbcdc11.pdf (www.usb.org)
00174  *---------------------------------------------------------------------------*/
00175
00176 // Header functional descriptor
00177 // (usbcdc11.pdf, 5.2.3.1)
00178 // This header must precede any list of class-specific descriptors.
00179
00180 #if defined     (  __CC_ARM  )
00181 typedef __packed struct _CDC_HEADER_DESCRIPTOR{
00182 #elif defined (  __GNUC__  )
00183 typedef struct __packed  _CDC_HEADER_DESCRIPTOR{
00184 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00185 #pragma pack(1)
00186 typedef struct _CDC_HEADER_DESCRIPTOR {
00187 #endif
00188   uint8_t bFunctionLength;                     // size of this descriptor in bytes
00189   uint8_t bDescriptorType;                     // CS_INTERFACE descriptor type
00190   uint8_t bDescriptorSubtype;                  // Header functional descriptor subtype
00191   uint16_t bcdCDC;                              // USB CDC specification release version
00192 } CDC_HEADER_DESCRIPTOR;
00193
00194 //Call management functional descriptor
00195 // (usbcdc11.pdf, 5.2.3.2)
00196 // Describes the processing of calls for the communication class interface.
00197 #if defined     (  __CC_ARM  )
00198 typedef __packed struct _CDC_CALL_MANAGEMENT_DESCRIPTOR{
00199 #elif defined (  __GNUC__  )
00200 typedef struct __packed  _CDC_CALL_MANAGEMENT_DESCRIPTOR{
00201 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00202 #pragma pack(1)
00203 typedef struct _CDC_CALL_MANAGEMENT_DESCRIPTOR {
00204 #endif
00205   uint8_t bFunctionLength;                     // size of this descriptor in bytes
00206   uint8_t bDescriptorType;                     // CS_INTERFACE descriptor type
00207   uint8_t bDescriptorSubtype;                  // call management functional descriptor subtype
00208   uint8_t bmCapabilities;                      // capabilities that this configuration supports
00209   uint8_t bDataInterface;                      // interface number of the data class interface used for call management (optional)
00210 } CDC_CALL_MANAGEMENT_DESCRIPTOR;
00211
00212 // Abstract control management functional descriptor
00213 // (usbcdc11.pdf, 5.2.3.3)
00214 // Describes the command supported by the communication interface class with the Abstract Control Model subclass code.
00215 #if defined     (  __CC_ARM  )
00216 typedef __packed struct _CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR{
00217 #elif defined (  __GNUC__  )
00218 typedef struct __packed  _CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR{
00219 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00220 #pragma pack(1)
00221 typedef struct _CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR {
00222 #endif
00223   uint8_t bFunctionLength;                     // size of this descriptor in bytes
00224   uint8_t bDescriptorType;                     // CS_INTERFACE descriptor type
00225   uint8_t bDescriptorSubtype;                  // abstract control management functional descriptor subtype
00226   uint8_t bmCapabilities;                      // capabilities supported by this configuration
00227 } CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR;
00228
00229 // Union functional descriptors
00230 // (usbcdc11.pdf, 5.2.3.8)
00231 // Describes the relationship between a group of interfaces that can be considered to form a functional unit.
00232 #if defined     (  __CC_ARM  )
00233 typedef __packed struct _CDC_UNION_DESCRIPTOR{
00234 #elif defined (  __GNUC__  )
00235 typedef struct __packed  _CDC_UNION_DESCRIPTOR{
00236 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00237 #pragma pack(1)
00238 typedef struct _CDC_UNION_DESCRIPTOR {
00239 #endif
00240   uint8_t bFunctionLength;                     // size of this descriptor in bytes
00241   uint8_t bDescriptorType;                     // CS_INTERFACE descriptor type
00242   uint8_t bDescriptorSubtype;                  // union functional descriptor subtype
00243   uint8_t bMasterInterface;                    // interface number designated as master
00244 } CDC_UNION_DESCRIPTOR;
00245
00246 // Union functional descriptors with one slave interface
00247 // (usbcdc11.pdf, 5.2.3.8)
00248 #if defined     (  __CC_ARM  )
00249 typedef __packed struct _CDC_UNION_1SLAVE_DESCRIPTOR{
00250 #elif defined (  __GNUC__  )
00251 typedef struct __packed  _CDC_UNION_1SLAVE_DESCRIPTOR{
00252 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00253 #pragma pack(1)
00254 typedef struct _CDC_UNION_1SLAVE_DESCRIPTOR {
00255 #endif
00256   CDC_UNION_DESCRIPTOR sUnion;              // Union functional descriptor
00257   uint8_t                 bSlaveInterfaces[1]; // Slave interface 0
00258 } CDC_UNION_1SLAVE_DESCRIPTOR;
00259
00260 //  Line coding structure
00261 //  Format of the data returned when a GetLineCoding request is received
00262 // (usbcdc11.pdf, 6.2.13)
00263 #if defined     (  __CC_ARM  )
00264 typedef __packed struct _CDC_LINE_CODING{
00265 #elif defined (  __GNUC__  )
00266 typedef struct __packed  _CDC_LINE_CODING{
00267 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00268 #pragma pack(1)
00269 typedef struct _CDC_LINE_CODING {
00270 #endif
00271   uint32_t dwDTERate;                          // Data terminal rate in bits per second
00272   uint8_t  bCharFormat;                        // Number of stop bits
00273   uint8_t  bParityType;                        // Parity bit type
00274   uint8_t  bDataBits;                          // Number of data bits
00275 } CDC_LINE_CODING;
00276
00277 // Notification header
00278 // Data sent on the notification endpoint must follow this header.
00279 // see  USB_SETUP_PACKET in file usb.h
00280 typedef USB_SETUP_PACKET CDC_NOTIFICATION_HEADER;
00281
00282 #endif /* __CDC_H */
00283
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    cdcuser.c
00005  *      Purpose: USB Communication Device Class User module
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008 *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC microcontroller devices only. Nothing else
00014  *      gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include "lpc_types.h"
00020
00021 #include "usb.h"
00022 #include "usbhw.h"
00023 #include "usbcfg.h"
00024 #include "usbcore.h"
00025 #include "cdc.h"
00026 #include "cdcuser.h"
00027 #include "serial.h"
00028
00029
00030 unsigned char BulkBufIn  [USB_CDC_BUFSIZE];            // Buffer to store USB IN  packet
00031 unsigned char BulkBufOut [USB_CDC_BUFSIZE];            // Buffer to store USB OUT packet
00032 unsigned char NotificationBuf [10];
00033
00034 CDC_LINE_CODING CDC_LineCoding  = {9600, 0, 0, 8};
00035 unsigned short  CDC_SerialState = 0x0000;
00036 unsigned short  CDC_DepInEmpty  = 1;                   // Data IN EP is empty
00037
00038 /*----------------------------------------------------------------------------
00039   We need a buffer for incomming data on USB port because USB receives
00040   much faster than  UART transmits
00041  *---------------------------------------------------------------------------*/
00042 /* Buffer masks */
00043 #define CDC_BUF_SIZE               (64)               // Output buffer in bytes (power 2)
00044                                                        // large enough for file transfer
00045 #define CDC_BUF_MASK               (CDC_BUF_SIZE-1ul)
00046
00047 /* Buffer read / write macros */
00048 #define CDC_BUF_RESET(cdcBuf)      (cdcBuf.rdIdx = cdcBuf.wrIdx = 0)
00049 #define CDC_BUF_WR(cdcBuf, dataIn) (cdcBuf.data[CDC_BUF_MASK & cdcBuf.wrIdx++] = (dataIn))
00050 #define CDC_BUF_RD(cdcBuf)         (cdcBuf.data[CDC_BUF_MASK & cdcBuf.rdIdx++])
00051 #define CDC_BUF_EMPTY(cdcBuf)      (cdcBuf.rdIdx == cdcBuf.wrIdx)
00052 #define CDC_BUF_FULL(cdcBuf)       (cdcBuf.rdIdx == cdcBuf.wrIdx+1)
00053 #define CDC_BUF_COUNT(cdcBuf)      (CDC_BUF_MASK & (cdcBuf.wrIdx - cdcBuf.rdIdx))
00054
00055
00056 // CDC output buffer
00057 typedef struct __CDC_BUF_T {
00058   unsigned char data[CDC_BUF_SIZE];
00059   unsigned int wrIdx;
00060   unsigned int rdIdx;
00061 } CDC_BUF_T;
00062
00063 CDC_BUF_T  CDC_OutBuf;                                 // buffer for all CDC Out data
00064
00065 /*----------------------------------------------------------------------------
00066   read data from CDC_OutBuf
00067  *---------------------------------------------------------------------------*/
00068 int CDC_RdOutBuf (char *buffer, const int *length) {
00069   int bytesToRead, bytesRead;
00070
00071   /* Read *length bytes, block if *bytes are not avaialable     */
00072   bytesToRead = *length;
00073   bytesToRead = (bytesToRead < (*length)) ? bytesToRead : (*length);
00074   bytesRead = bytesToRead;
00075
00076
00077   // ... add code to check for underrun
00078
00079   while (bytesToRead--) {
00080     *buffer++ = CDC_BUF_RD(CDC_OutBuf);
00081   }
00082   return (bytesRead);
00083 }
00084
00085 /*----------------------------------------------------------------------------
00086   write data to CDC_OutBuf
00087  *---------------------------------------------------------------------------*/
00088 int CDC_WrOutBuf (const char *buffer, int *length) {
00089   int bytesToWrite, bytesWritten;
00090
00091   // Write *length bytes
00092   bytesToWrite = *length;
00093   bytesWritten = bytesToWrite;
00094
00095
00096   // ... add code to check for overwrite
00097
00098   while (bytesToWrite) {
00099       CDC_BUF_WR(CDC_OutBuf, *buffer++);           // Copy Data to buffer
00100       bytesToWrite--;
00101   }
00102
00103   return (bytesWritten);
00104 }
00105
00106 /*----------------------------------------------------------------------------
00107   check if character(s) are available at CDC_OutBuf
00108  *---------------------------------------------------------------------------*/
00109 int CDC_OutBufAvailChar (int *availChar) {
00110
00111   *availChar = CDC_BUF_COUNT(CDC_OutBuf);
00112
00113   return (0);
00114 }
00115 /* end Buffer handling */
00116
00117
00118 /*----------------------------------------------------------------------------
00119   CDC Initialisation
00120   Initializes the data structures and serial port
00121   Parameters:   None
00122   Return Value: None
00123  *---------------------------------------------------------------------------*/
00124 void CDC_Init (char portNum ) {
00125
00126   if ( portNum == 0 )
00127   {
00128         ser_OpenPort (0);
00129         ser_InitPort0 (CDC_LineCoding.dwDTERate,
00130                 CDC_LineCoding.bDataBits,
00131                 CDC_LineCoding.bParityType,
00132                 CDC_LineCoding.bCharFormat);
00133   }
00134   else
00135   {
00136         ser_OpenPort (1);
00137         ser_InitPort1 (CDC_LineCoding.dwDTERate,
00138                 CDC_LineCoding.bDataBits,
00139                 CDC_LineCoding.bParityType,
00140                 CDC_LineCoding.bCharFormat);
00141   }
00142   CDC_DepInEmpty  = 1;
00143   CDC_SerialState = CDC_GetSerialState();
00144
00145   CDC_BUF_RESET(CDC_OutBuf);
00146 }
00147
00148
00149 /*----------------------------------------------------------------------------
00150   CDC SendEncapsulatedCommand Request Callback
00151   Called automatically on CDC SEND_ENCAPSULATED_COMMAND Request
00152   Parameters:   None                          (global SetupPacket and EP0Buf)
00153   Return Value: TRUE - Success, FALSE - Error
00154  *---------------------------------------------------------------------------*/
00155 uint32_t CDC_SendEncapsulatedCommand (void) {
00156
00157   return (TRUE);
00158 }
00159
00160
00161 /*----------------------------------------------------------------------------
00162   CDC GetEncapsulatedResponse Request Callback
00163   Called automatically on CDC Get_ENCAPSULATED_RESPONSE Request
00164   Parameters:   None                          (global SetupPacket and EP0Buf)
00165   Return Value: TRUE - Success, FALSE - Error
00166  *---------------------------------------------------------------------------*/
00167 uint32_t CDC_GetEncapsulatedResponse (void) {
00168
00169   /* ... add code to handle request */
00170   return (TRUE);
00171 }
00172
00173
00174 /*----------------------------------------------------------------------------
00175   CDC SetCommFeature Request Callback
00176   Called automatically on CDC Set_COMM_FATURE Request
00177   Parameters:   FeatureSelector
00178   Return Value: TRUE - Success, FALSE - Error
00179  *---------------------------------------------------------------------------*/
00180 uint32_t CDC_SetCommFeature (unsigned short wFeatureSelector) {
00181
00182   /* ... add code to handle request */
00183   return (TRUE);
00184 }
00185
00186
00187 /*----------------------------------------------------------------------------
00188   CDC GetCommFeature Request Callback
00189   Called automatically on CDC Get_COMM_FATURE Request
00190   Parameters:   FeatureSelector
00191   Return Value: TRUE - Success, FALSE - Error
00192  *---------------------------------------------------------------------------*/
00193 uint32_t CDC_GetCommFeature (unsigned short wFeatureSelector) {
00194
00195   /* ... add code to handle request */
00196   return (TRUE);
00197 }
00198
00199
00200 /*----------------------------------------------------------------------------
00201   CDC ClearCommFeature Request Callback
00202   Called automatically on CDC CLEAR_COMM_FATURE Request
00203   Parameters:   FeatureSelector
00204   Return Value: TRUE - Success, FALSE - Error
00205  *---------------------------------------------------------------------------*/
00206 uint32_t CDC_ClearCommFeature (unsigned short wFeatureSelector) {
00207
00208   /* ... add code to handle request */
00209   return (TRUE);
00210 }
00211
00212
00213 /*----------------------------------------------------------------------------
00214   CDC SetLineCoding Request Callback
00215   Called automatically on CDC SET_LINE_CODING Request
00216   Parameters:   none                    (global SetupPacket and EP0Buf)
00217   Return Value: TRUE - Success, FALSE - Error
00218  *---------------------------------------------------------------------------*/
00219 uint32_t CDC_SetLineCoding (void) {
00220
00221   CDC_LineCoding.dwDTERate   =   (EP0Buf[0] <<  0)
00222                                | (EP0Buf[1] <<  8)
00223                                | (EP0Buf[2] << 16)
00224                                | (EP0Buf[3] << 24);
00225   CDC_LineCoding.bCharFormat =  EP0Buf[4];
00226   CDC_LineCoding.bParityType =  EP0Buf[5];
00227   CDC_LineCoding.bDataBits   =  EP0Buf[6];
00228
00229 #if PORT_NUM
00230   ser_ClosePort(1);
00231   ser_OpenPort (1);
00232   ser_InitPort1 (CDC_LineCoding.dwDTERate,
00233                 CDC_LineCoding.bDataBits,
00234                 CDC_LineCoding.bParityType,
00235                 CDC_LineCoding.bCharFormat);
00236 #else
00237   ser_ClosePort(0);
00238   ser_OpenPort (0);
00239   ser_InitPort0 (CDC_LineCoding.dwDTERate,
00240                 CDC_LineCoding.bDataBits,
00241                 CDC_LineCoding.bParityType,
00242                 CDC_LineCoding.bCharFormat);
00243 #endif
00244   return (TRUE);
00245 }
00246
00247
00248 /*----------------------------------------------------------------------------
00249   CDC GetLineCoding Request Callback
00250   Called automatically on CDC GET_LINE_CODING Request
00251   Parameters:   None                         (global SetupPacket and EP0Buf)
00252   Return Value: TRUE - Success, FALSE - Error
00253  *---------------------------------------------------------------------------*/
00254 uint32_t CDC_GetLineCoding (void) {
00255
00256   EP0Buf[0] = (CDC_LineCoding.dwDTERate >>  0) & 0xFF;
00257   EP0Buf[1] = (CDC_LineCoding.dwDTERate >>  8) & 0xFF;
00258   EP0Buf[2] = (CDC_LineCoding.dwDTERate >> 16) & 0xFF;
00259   EP0Buf[3] = (CDC_LineCoding.dwDTERate >> 24) & 0xFF;
00260   EP0Buf[4] =  CDC_LineCoding.bCharFormat;
00261   EP0Buf[5] =  CDC_LineCoding.bParityType;
00262   EP0Buf[6] =  CDC_LineCoding.bDataBits;
00263
00264   return (TRUE);
00265 }
00266
00267
00268 /*----------------------------------------------------------------------------
00269   CDC SetControlLineState Request Callback
00270   Called automatically on CDC SET_CONTROL_LINE_STATE Request
00271   Parameters:   ControlSignalBitmap
00272   Return Value: TRUE - Success, FALSE - Error
00273  *---------------------------------------------------------------------------*/
00274 uint32_t CDC_SetControlLineState (unsigned short wControlSignalBitmap) {
00275
00276   /* ... add code to handle request */
00277   return (TRUE);
00278 }
00279
00280
00281 /*----------------------------------------------------------------------------
00282   CDC SendBreak Request Callback
00283   Called automatically on CDC Set_COMM_FATURE Request
00284   Parameters:   0xFFFF  start of Break
00285                 0x0000  stop  of Break
00286                 0x####  Duration of Break
00287   Return Value: TRUE - Success, FALSE - Error
00288  *---------------------------------------------------------------------------*/
00289 uint32_t CDC_SendBreak (unsigned short wDurationOfBreak) {
00290
00291   /* ... add code to handle request */
00292   return (TRUE);
00293 }
00294
00295
00296 /*----------------------------------------------------------------------------
00297   CDC_BulkIn call on DataIn Request
00298   Parameters:   none
00299   Return Value: none
00300  *---------------------------------------------------------------------------*/
00301 void CDC_BulkIn(void) {
00302   int numBytesRead, numBytesAvail;
00303
00304   ser_AvailChar (&numBytesAvail);
00305
00306   // ... add code to check for overwrite
00307
00308   numBytesRead = ser_Read ((char *)&BulkBufIn[0], &numBytesAvail);
00309
00310   // send over USB
00311   if (numBytesRead > 0) {
00312         USB_WriteEP (CDC_DEP_IN, &BulkBufIn[0], numBytesRead);
00313   }
00314   else {
00315     CDC_DepInEmpty = 1;
00316   }
00317 }
00318
00319
00320 /*----------------------------------------------------------------------------
00321   CDC_BulkOut call on DataOut Request
00322   Parameters:   none
00323   Return Value: none
00324  *---------------------------------------------------------------------------*/
00325 void CDC_BulkOut(void) {
00326   int numBytesRead;
00327
00328   // get data from USB into intermediate buffer
00329   numBytesRead = USB_ReadEP(CDC_DEP_OUT, &BulkBufOut[0]);
00330
00331   // ... add code to check for overwrite
00332
00333   // store data in a buffer to transmit it over serial interface
00334   CDC_WrOutBuf ((char *)&BulkBufOut[0], &numBytesRead);
00335
00336 }
00337
00338
00339 /*----------------------------------------------------------------------------
00340   Get the SERIAL_STATE as defined in usbcdc11.pdf, 6.3.5, Table 69.
00341   Parameters:   none
00342   Return Value: SerialState as defined in usbcdc11.pdf
00343  *---------------------------------------------------------------------------*/
00344 unsigned short CDC_GetSerialState (void) {
00345   unsigned short temp;
00346
00347   CDC_SerialState = 0;
00348   ser_LineState (&temp);
00349
00350   if (temp & 0x8000)  CDC_SerialState |= CDC_SERIAL_STATE_RX_CARRIER;
00351   if (temp & 0x2000)  CDC_SerialState |= CDC_SERIAL_STATE_TX_CARRIER;
00352   if (temp & 0x0010)  CDC_SerialState |= CDC_SERIAL_STATE_BREAK;
00353   if (temp & 0x4000)  CDC_SerialState |= CDC_SERIAL_STATE_RING;
00354   if (temp & 0x0008)  CDC_SerialState |= CDC_SERIAL_STATE_FRAMING;
00355   if (temp & 0x0004)  CDC_SerialState |= CDC_SERIAL_STATE_PARITY;
00356   if (temp & 0x0002)  CDC_SerialState |= CDC_SERIAL_STATE_OVERRUN;
00357
00358   return (CDC_SerialState);
00359 }
00360
00361
00362 /*----------------------------------------------------------------------------
00363   Send the SERIAL_STATE notification as defined in usbcdc11.pdf, 6.3.5.
00364  *---------------------------------------------------------------------------*/
00365 void CDC_NotificationIn (void) {
00366
00367   NotificationBuf[0] = 0xA1;                           // bmRequestType
00368   NotificationBuf[1] = CDC_NOTIFICATION_SERIAL_STATE;  // bNotification (SERIAL_STATE)
00369   NotificationBuf[2] = 0x00;                           // wValue
00370   NotificationBuf[3] = 0x00;
00371   NotificationBuf[4] = 0x00;                           // wIndex (Interface #, LSB first)
00372   NotificationBuf[5] = 0x00;
00373   NotificationBuf[6] = 0x02;                           // wLength (Data length = 2 bytes, LSB first)
00374   NotificationBuf[7] = 0x00;
00375   NotificationBuf[8] = (CDC_SerialState >>  0) & 0xFF; // UART State Bitmap (16bits, LSB first)
00376   NotificationBuf[9] = (CDC_SerialState >>  8) & 0xFF;
00377
00378   USB_WriteEP (CDC_CEP_IN, &NotificationBuf[0], 10);   // send notification
00379 }
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/cdcuser.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    cdcuser.h
00005  *      Purpose: USB Communication Device Class User module Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC microcontroller devices only. Nothing else
00014  *      gives you the right to use this software.
00015  *
00016  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __CDCUSER_H__
00020 #define __CDCUSER_H__
00021
00022 /* CDC buffer handling */
00023 extern int CDC_RdOutBuf        (char *buffer, const int *length);
00024 extern int CDC_WrOutBuf        (const char *buffer, int *length);
00025 extern int CDC_OutBufAvailChar (int *availChar);
00026
00027
00028 /* CDC Data In/Out Endpoint Address */
00029 #define CDC_DEP_IN       0x82
00030 #define CDC_DEP_OUT      0x02
00031
00032 /* CDC Communication In Endpoint Address */
00033 #define CDC_CEP_IN       0x81
00034
00035 /* CDC Requests Callback Functions */
00036 extern uint32_t CDC_SendEncapsulatedCommand  (void);
00037 extern uint32_t CDC_GetEncapsulatedResponse  (void);
00038 extern uint32_t CDC_SetCommFeature           (unsigned short wFeatureSelector);
00039 extern uint32_t CDC_GetCommFeature           (unsigned short wFeatureSelector);
00040 extern uint32_t CDC_ClearCommFeature         (unsigned short wFeatureSelector);
00041 extern uint32_t CDC_GetLineCoding            (void);
00042 extern uint32_t CDC_SetLineCoding            (void);
00043 extern uint32_t CDC_SetControlLineState      (unsigned short wControlSignalBitmap);
00044 extern uint32_t CDC_SendBreak                (unsigned short wDurationOfBreak);
00045
00046 /* CDC Bulk Callback Functions */
00047 extern void CDC_BulkIn                   (void);
00048 extern void CDC_BulkOut                  (void);
00049
00050 /* CDC Notification Callback Function */
00051 extern void CDC_NotificationIn           (void);
00052
00053 /* CDC Initializtion Function */
00054 extern void CDC_Init (char portNum);
00055
00056 /* CDC prepare the SERAIAL_STATE */
00057 extern unsigned short CDC_GetSerialState (void);
00058
00059 /* flow control */
00060 extern unsigned short CDC_DepInEmpty;         // DataEndPoint IN empty
00061
00062 #endif  /* __CDCUSER_H__ */
00063
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/clock-arch.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/clock-arch.c
Go to the documentation of this file.
00001 #include "clock-arch.h"
00002 #include "LPC17xx.h"
00003
00004 __IO clock_time_t Ticks;
00005
00006 #define LED_PIN         (1<<6)
00007
00008 /* SysTick timer interrupt  handler */
00009 void SysTick_Handler (void)
00010 {
00011         ++Ticks;
00012         if (!(Ticks & 0x07)){
00013                 LPC_GPIO2->FIOPIN ^= LED_PIN;
00014         }
00015 }
00016
00017 /* Timer init */
00018 void clock_init(void)
00019 {
00020         Ticks = 0;
00021
00022         // NXP: Initialize System tick timer
00023         // Generate interrupt each SYSTICK_PERIOD microsecond
00024         if (SysTick_Config((SystemCoreClock/CLOCK_CONF_SECOND))){
00025                 // Capture error
00026                 while (1);
00027         }
00028 }
00029
00030 /* returned The current clock time, measured in system ticks */
00031 clock_time_t clock_time(void)
00032 {
00033   return(Ticks);
00034 }
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/clock-arch.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/clock-arch.h
Go to the documentation of this file.
00001 #ifndef __CLOCK_ARCH_H__
00002 #define __CLOCK_ARCH_H__
00003
00004 #include "lpc_types.h"
00005
00006 typedef unsigned int clock_time_t;
00007
00008 #define CLOCK_CONF_SECOND 100   // tick number every second
00009
00010 #endif /* __CLOCK_ARCH_H__ */
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/clock.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/clock.h
Go to the documentation of this file.
00001
00022 /*
00023  * Copyright (c) 2004, Swedish Institute of Computer Science.
00024  * All rights reserved.
00025  *
00026  * Redistribution and use in source and binary forms, with or without
00027  * modification, are permitted provided that the following conditions
00028  * are met:
00029  * 1. Redistributions of source code must retain the above copyright
00030  *    notice, this list of conditions and the following disclaimer.
00031  * 2. Redistributions in binary form must reproduce the above copyright
00032  *    notice, this list of conditions and the following disclaimer in the
00033  *    documentation and/or other materials provided with the distribution.
00034  * 3. Neither the name of the Institute nor the names of its contributors
00035  *    may be used to endorse or promote products derived from this software
00036  *    without specific prior written permission.
00037  *
00038  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00039  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00040  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00041  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00042  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00043  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00044  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00045  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00046  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00047  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00048  * SUCH DAMAGE.
00049  *
00050  * This file is part of the uIP TCP/IP stack
00051  *
00052  * Author: Adam Dunkels <adam@sics.se>
00053  *
00054  * $Id: clock.h,v 1.3 2006/06/11 21:46:39 adam Exp $
00055  */
00056 #ifndef __CLOCK_H__
00057 #define __CLOCK_H__
00058
00059 #include "clock-arch.h"
00060
00068 void clock_init(void);
00069
00077 clock_time_t clock_time(void);
00078
00084 #ifdef CLOCK_CONF_SECOND
00085 #define CLOCK_SECOND CLOCK_CONF_SECOND
00086 #else
00087 #define CLOCK_SECOND (clock_time_t)32
00088 #endif
00089
00090 #endif /* __CLOCK_H__ */
00091
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cm3.h Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cm3.h
Go to the documentation of this file.
00001 /**************************************************************************/
00023 #if defined ( __ICCARM__ )
00024  #pragma system_include  /* treat file as system include file for MISRA check */
00025 #endif
00026
00027 #ifdef __cplusplus
00028  extern "C" {
00029 #endif
00030
00031 #ifndef __CORE_CM3_H_GENERIC
00032 #define __CORE_CM3_H_GENERIC
00033
00034
00051 /*******************************************************************************
00052  *                 CMSIS definitions
00053  ******************************************************************************/
00063 /*  CMSIS CM3 definitions */
00064 #define __CM3_CMSIS_VERSION_MAIN  (0x02)
00065 #define __CM3_CMSIS_VERSION_SUB   (0x10)
00066 #define __CM3_CMSIS_VERSION       ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB)
00068 #define __CORTEX_M                (0x03)
00071 #if   defined ( __CC_ARM )
00072   #define __ASM            __asm
00073   #define __INLINE         __inline
00075 #elif defined ( __ICCARM__ )
00076   #define __ASM           __asm
00077   #define __INLINE        inline
00079 #elif defined ( __GNUC__ )
00080   #define __ASM            __asm
00081   #define __INLINE         inline
00083 #elif defined ( __TASKING__ )
00084   #define __ASM            __asm
00085   #define __INLINE         inline
00087 #endif
00088
00090 #define __FPU_USED       0
00091
00092 #if defined ( __CC_ARM )
00093   #if defined __TARGET_FPU_VFP
00094     #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
00095   #endif
00096 #elif defined ( __ICCARM__ )
00097   #if defined __ARMVFP__
00098     #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
00099   #endif
00100
00101 #elif defined ( __GNUC__ )
00102   #if defined (__VFP_FP__) && !defined(__SOFTFP__)
00103     #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
00104   #endif
00105
00106 #elif defined ( __TASKING__ )
00107     /* add preprocessor checks */
00108 #endif
00109
00110 #include <stdint.h>
00111 #include "core_cmInstr.h"
00112 #include "core_cmFunc.h"
00114 #endif /* __CORE_CM3_H_GENERIC */
00115
00116 #ifndef __CMSIS_GENERIC
00117
00118 #ifndef __CORE_CM3_H_DEPENDANT
00119 #define __CORE_CM3_H_DEPENDANT
00120
00121 /* check device defines and use defaults */
00122 #if defined __CHECK_DEVICE_DEFINES
00123   #ifndef __CM3_REV
00124     #define __CM3_REV               0x0200
00125     #warning "__CM3_REV not defined in device header file; using default!"
00126   #endif
00127
00128   #ifndef __MPU_PRESENT
00129     #define __MPU_PRESENT             0
00130     #warning "__MPU_PRESENT not defined in device header file; using default!"
00131   #endif
00132
00133   #ifndef __NVIC_PRIO_BITS
00134     #define __NVIC_PRIO_BITS          4
00135     #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
00136   #endif
00137
00138   #ifndef __Vendor_SysTickConfig
00139     #define __Vendor_SysTickConfig    0
00140     #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
00141   #endif
00142 #endif
00143
00144 /* IO definitions (access restrictions to peripheral registers) */
00145 #ifdef __cplusplus
00146   #define   __I     volatile
00147 #else
00148   #define   __I     volatile const
00149 #endif
00150 #define     __O     volatile
00151 #define     __IO    volatile
00153
00157 /*******************************************************************************
00158  *                 Register Abstraction
00159  ******************************************************************************/
00160
00179 typedef union
00180 {
00181   struct
00182   {
00183 #if (__CORTEX_M != 0x04)
00184     uint32_t _reserved0:27;
00185 #else
00186     uint32_t _reserved0:16;
00187     uint32_t GE:4;
00188     uint32_t _reserved1:7;
00189 #endif
00190     uint32_t Q:1;
00191     uint32_t V:1;
00192     uint32_t C:1;
00193     uint32_t Z:1;
00194     uint32_t N:1;
00195   } b;
00196   uint32_t w;
00197 } APSR_Type;
00198
00199
00202 typedef union
00203 {
00204   struct
00205   {
00206     uint32_t ISR:9;
00207     uint32_t _reserved0:23;
00208   } b;
00209   uint32_t w;
00210 } IPSR_Type;
00211
00212
00215 typedef union
00216 {
00217   struct
00218   {
00219     uint32_t ISR:9;
00220 #if (__CORTEX_M != 0x04)
00221     uint32_t _reserved0:15;
00222 #else
00223     uint32_t _reserved0:7;
00224     uint32_t GE:4;
00225     uint32_t _reserved1:4;
00226 #endif
00227     uint32_t T:1;
00228     uint32_t IT:2;
00229     uint32_t Q:1;
00230     uint32_t V:1;
00231     uint32_t C:1;
00232     uint32_t Z:1;
00233     uint32_t N:1;
00234   } b;
00235   uint32_t w;
00236 } xPSR_Type;
00237
00238
00241 typedef union
00242 {
00243   struct
00244   {
00245     uint32_t nPRIV:1;
00246     uint32_t SPSEL:1;
00247     uint32_t FPCA:1;
00248     uint32_t _reserved0:29;
00249   } b;
00250   uint32_t w;
00251 } CONTROL_Type;
00252
00264 typedef struct
00265 {
00266   __IO uint32_t ISER[8];
00267        uint32_t RESERVED0[24];
00268   __IO uint32_t ICER[8];
00269        uint32_t RSERVED1[24];
00270   __IO uint32_t ISPR[8];
00271        uint32_t RESERVED2[24];
00272   __IO uint32_t ICPR[8];
00273        uint32_t RESERVED3[24];
00274   __IO uint32_t IABR[8];
00275        uint32_t RESERVED4[56];
00276   __IO uint8_t  IP[240];
00277        uint32_t RESERVED5[644];
00278   __O  uint32_t STIR;
00279 }  NVIC_Type;
00280
00281 /* Software Triggered Interrupt Register Definitions */
00282 #define NVIC_STIR_INTID_Pos                 0
00283 #define NVIC_STIR_INTID_Msk                (0x1FFUL << NVIC_STIR_INTID_Pos)
00285
00296 typedef struct
00297 {
00298   __I  uint32_t CPUID;
00299   __IO uint32_t ICSR;
00300   __IO uint32_t VTOR;
00301   __IO uint32_t AIRCR;
00302   __IO uint32_t SCR;
00303   __IO uint32_t CCR;
00304   __IO uint8_t  SHP[12];
00305   __IO uint32_t SHCSR;
00306   __IO uint32_t CFSR;
00307   __IO uint32_t HFSR;
00308   __IO uint32_t DFSR;
00309   __IO uint32_t MMFAR;
00310   __IO uint32_t BFAR;
00311   __IO uint32_t AFSR;
00312   __I  uint32_t PFR[2];
00313   __I  uint32_t DFR;
00314   __I  uint32_t ADR;
00315   __I  uint32_t MMFR[4];
00316   __I  uint32_t ISAR[5];
00317        uint32_t RESERVED0[5];
00318   __IO uint32_t CPACR;
00319 } SCB_Type;
00320
00321 /* SCB CPUID Register Definitions */
00322 #define SCB_CPUID_IMPLEMENTER_Pos          24
00323 #define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)
00325 #define SCB_CPUID_VARIANT_Pos              20
00326 #define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)
00328 #define SCB_CPUID_ARCHITECTURE_Pos         16
00329 #define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)
00331 #define SCB_CPUID_PARTNO_Pos                4
00332 #define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)
00334 #define SCB_CPUID_REVISION_Pos              0
00335 #define SCB_CPUID_REVISION_Msk             (0xFUL << SCB_CPUID_REVISION_Pos)
00337 /* SCB Interrupt Control State Register Definitions */
00338 #define SCB_ICSR_NMIPENDSET_Pos            31
00339 #define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)
00341 #define SCB_ICSR_PENDSVSET_Pos             28
00342 #define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)
00344 #define SCB_ICSR_PENDSVCLR_Pos             27
00345 #define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)
00347 #define SCB_ICSR_PENDSTSET_Pos             26
00348 #define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)
00350 #define SCB_ICSR_PENDSTCLR_Pos             25
00351 #define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)
00353 #define SCB_ICSR_ISRPREEMPT_Pos            23
00354 #define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)
00356 #define SCB_ICSR_ISRPENDING_Pos            22
00357 #define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)
00359 #define SCB_ICSR_VECTPENDING_Pos           12
00360 #define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)
00362 #define SCB_ICSR_RETTOBASE_Pos             11
00363 #define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)
00365 #define SCB_ICSR_VECTACTIVE_Pos             0
00366 #define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos)
00368 /* SCB Vector Table Offset Register Definitions */
00369 #define SCB_VTOR_TBLOFF_Pos                 7
00370 #define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)
00372 /* SCB Application Interrupt and Reset Control Register Definitions */
00373 #define SCB_AIRCR_VECTKEY_Pos              16
00374 #define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)
00376 #define SCB_AIRCR_VECTKEYSTAT_Pos          16
00377 #define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)
00379 #define SCB_AIRCR_ENDIANESS_Pos            15
00380 #define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)
00382 #define SCB_AIRCR_PRIGROUP_Pos              8
00383 #define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)
00385 #define SCB_AIRCR_SYSRESETREQ_Pos           2
00386 #define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)
00388 #define SCB_AIRCR_VECTCLRACTIVE_Pos         1
00389 #define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)
00391 #define SCB_AIRCR_VECTRESET_Pos             0
00392 #define SCB_AIRCR_VECTRESET_Msk            (1UL << SCB_AIRCR_VECTRESET_Pos)
00394 /* SCB System Control Register Definitions */
00395 #define SCB_SCR_SEVONPEND_Pos               4
00396 #define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)
00398 #define SCB_SCR_SLEEPDEEP_Pos               2
00399 #define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)
00401 #define SCB_SCR_SLEEPONEXIT_Pos             1
00402 #define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)
00404 /* SCB Configuration Control Register Definitions */
00405 #define SCB_CCR_STKALIGN_Pos                9
00406 #define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)
00408 #define SCB_CCR_BFHFNMIGN_Pos               8
00409 #define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)
00411 #define SCB_CCR_DIV_0_TRP_Pos               4
00412 #define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)
00414 #define SCB_CCR_UNALIGN_TRP_Pos             3
00415 #define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)
00417 #define SCB_CCR_USERSETMPEND_Pos            1
00418 #define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)
00420 #define SCB_CCR_NONBASETHRDENA_Pos          0
00421 #define SCB_CCR_NONBASETHRDENA_Msk         (1UL << SCB_CCR_NONBASETHRDENA_Pos)
00423 /* SCB System Handler Control and State Register Definitions */
00424 #define SCB_SHCSR_USGFAULTENA_Pos          18
00425 #define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)
00427 #define SCB_SHCSR_BUSFAULTENA_Pos          17
00428 #define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)
00430 #define SCB_SHCSR_MEMFAULTENA_Pos          16
00431 #define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)
00433 #define SCB_SHCSR_SVCALLPENDED_Pos         15
00434 #define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)
00436 #define SCB_SHCSR_BUSFAULTPENDED_Pos       14
00437 #define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)
00439 #define SCB_SHCSR_MEMFAULTPENDED_Pos       13
00440 #define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)
00442 #define SCB_SHCSR_USGFAULTPENDED_Pos       12
00443 #define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)
00445 #define SCB_SHCSR_SYSTICKACT_Pos           11
00446 #define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)
00448 #define SCB_SHCSR_PENDSVACT_Pos            10
00449 #define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)
00451 #define SCB_SHCSR_MONITORACT_Pos            8
00452 #define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)
00454 #define SCB_SHCSR_SVCALLACT_Pos             7
00455 #define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)
00457 #define SCB_SHCSR_USGFAULTACT_Pos           3
00458 #define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)
00460 #define SCB_SHCSR_BUSFAULTACT_Pos           1
00461 #define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)
00463 #define SCB_SHCSR_MEMFAULTACT_Pos           0
00464 #define SCB_SHCSR_MEMFAULTACT_Msk          (1UL << SCB_SHCSR_MEMFAULTACT_Pos)
00466 /* SCB Configurable Fault Status Registers Definitions */
00467 #define SCB_CFSR_USGFAULTSR_Pos            16
00468 #define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)
00470 #define SCB_CFSR_BUSFAULTSR_Pos             8
00471 #define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)
00473 #define SCB_CFSR_MEMFAULTSR_Pos             0
00474 #define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL << SCB_CFSR_MEMFAULTSR_Pos)
00476 /* SCB Hard Fault Status Registers Definitions */
00477 #define SCB_HFSR_DEBUGEVT_Pos              31
00478 #define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)
00480 #define SCB_HFSR_FORCED_Pos                30
00481 #define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)
00483 #define SCB_HFSR_VECTTBL_Pos                1
00484 #define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)
00486 /* SCB Debug Fault Status Register Definitions */
00487 #define SCB_DFSR_EXTERNAL_Pos               4
00488 #define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)
00490 #define SCB_DFSR_VCATCH_Pos                 3
00491 #define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)
00493 #define SCB_DFSR_DWTTRAP_Pos                2
00494 #define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)
00496 #define SCB_DFSR_BKPT_Pos                   1
00497 #define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)
00499 #define SCB_DFSR_HALTED_Pos                 0
00500 #define SCB_DFSR_HALTED_Msk                (1UL << SCB_DFSR_HALTED_Pos)
00502
00513 typedef struct
00514 {
00515        uint32_t RESERVED0[1];
00516   __I  uint32_t ICTR;
00517 #if ((defined __CM3_REV) && (__CM3_REV >= 0x200))
00518   __IO uint32_t ACTLR;
00519 #else
00520        uint32_t RESERVED1[1];
00521 #endif
00522 } SCnSCB_Type;
00523
00524 /* Interrupt Controller Type Register Definitions */
00525 #define SCnSCB_ICTR_INTLINESNUM_Pos         0
00526 #define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL << SCnSCB_ICTR_INTLINESNUM_Pos)
00528 /* Auxiliary Control Register Definitions */
00529
00530 #define SCnSCB_ACTLR_DISFOLD_Pos            2
00531 #define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)
00533 #define SCnSCB_ACTLR_DISDEFWBUF_Pos         1
00534 #define SCnSCB_ACTLR_DISDEFWBUF_Msk        (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)
00536 #define SCnSCB_ACTLR_DISMCYCINT_Pos         0
00537 #define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL << SCnSCB_ACTLR_DISMCYCINT_Pos)
00539
00550 typedef struct
00551 {
00552   __IO uint32_t CTRL;
00553   __IO uint32_t LOAD;
00554   __IO uint32_t VAL;
00555   __I  uint32_t CALIB;
00556 } SysTick_Type;
00557
00558 /* SysTick Control / Status Register Definitions */
00559 #define SysTick_CTRL_COUNTFLAG_Pos         16
00560 #define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)
00562 #define SysTick_CTRL_CLKSOURCE_Pos          2
00563 #define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)
00565 #define SysTick_CTRL_TICKINT_Pos            1
00566 #define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)
00568 #define SysTick_CTRL_ENABLE_Pos             0
00569 #define SysTick_CTRL_ENABLE_Msk            (1UL << SysTick_CTRL_ENABLE_Pos)
00571 /* SysTick Reload Register Definitions */
00572 #define SysTick_LOAD_RELOAD_Pos             0
00573 #define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos)
00575 /* SysTick Current Register Definitions */
00576 #define SysTick_VAL_CURRENT_Pos             0
00577 #define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)
00579 /* SysTick Calibration Register Definitions */
00580 #define SysTick_CALIB_NOREF_Pos            31
00581 #define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)
00583 #define SysTick_CALIB_SKEW_Pos             30
00584 #define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)
00586 #define SysTick_CALIB_TENMS_Pos             0
00587 #define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)
00589
00600 typedef struct
00601 {
00602   __O  union
00603   {
00604     __O  uint8_t    u8;
00605     __O  uint16_t   u16;
00606     __O  uint32_t   u32;
00607   }  PORT [32];
00608        uint32_t RESERVED0[864];
00609   __IO uint32_t TER;
00610        uint32_t RESERVED1[15];
00611   __IO uint32_t TPR;
00612        uint32_t RESERVED2[15];
00613   __IO uint32_t TCR;
00614 } ITM_Type;
00615
00616 /* ITM Trace Privilege Register Definitions */
00617 #define ITM_TPR_PRIVMASK_Pos                0
00618 #define ITM_TPR_PRIVMASK_Msk               (0xFUL << ITM_TPR_PRIVMASK_Pos)
00620 /* ITM Trace Control Register Definitions */
00621 #define ITM_TCR_BUSY_Pos                   23
00622 #define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)
00624 #define ITM_TCR_TraceBusID_Pos             16
00625 #define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)
00627 #define ITM_TCR_GTSFREQ_Pos                10
00628 #define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)
00630 #define ITM_TCR_TSPrescale_Pos              8
00631 #define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)
00633 #define ITM_TCR_SWOENA_Pos                  4
00634 #define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)
00636 #define ITM_TCR_TXENA_Pos                   3
00637 #define ITM_TCR_TXENA_Msk                  (1UL << ITM_TCR_TXENA_Pos)
00639 #define ITM_TCR_SYNCENA_Pos                 2
00640 #define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)
00642 #define ITM_TCR_TSENA_Pos                   1
00643 #define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)
00645 #define ITM_TCR_ITMENA_Pos                  0
00646 #define ITM_TCR_ITMENA_Msk                 (1UL << ITM_TCR_ITMENA_Pos)
00648  /* end of group CMSIS_ITM */
00649
00650
00651 #if (__MPU_PRESENT == 1)
00652
00660 typedef struct
00661 {
00662   __I  uint32_t TYPE;
00663   __IO uint32_t CTRL;
00664   __IO uint32_t RNR;
00665   __IO uint32_t RBAR;
00666   __IO uint32_t RASR;
00667   __IO uint32_t RBAR_A1;
00668   __IO uint32_t RASR_A1;
00669   __IO uint32_t RBAR_A2;
00670   __IO uint32_t RASR_A2;
00671   __IO uint32_t RBAR_A3;
00672   __IO uint32_t RASR_A3;
00673 } MPU_Type;
00674
00675 /* MPU Type Register */
00676 #define MPU_TYPE_IREGION_Pos               16
00677 #define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)
00679 #define MPU_TYPE_DREGION_Pos                8
00680 #define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)
00682 #define MPU_TYPE_SEPARATE_Pos               0
00683 #define MPU_TYPE_SEPARATE_Msk              (1UL << MPU_TYPE_SEPARATE_Pos)
00685 /* MPU Control Register */
00686 #define MPU_CTRL_PRIVDEFENA_Pos             2
00687 #define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)
00689 #define MPU_CTRL_HFNMIENA_Pos               1
00690 #define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)
00692 #define MPU_CTRL_ENABLE_Pos                 0
00693 #define MPU_CTRL_ENABLE_Msk                (1UL << MPU_CTRL_ENABLE_Pos)
00695 /* MPU Region Number Register */
00696 #define MPU_RNR_REGION_Pos                  0
00697 #define MPU_RNR_REGION_Msk                 (0xFFUL << MPU_RNR_REGION_Pos)
00699 /* MPU Region Base Address Register */
00700 #define MPU_RBAR_ADDR_Pos                   5
00701 #define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)
00703 #define MPU_RBAR_VALID_Pos                  4
00704 #define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)
00706 #define MPU_RBAR_REGION_Pos                 0
00707 #define MPU_RBAR_REGION_Msk                (0xFUL << MPU_RBAR_REGION_Pos)
00709 /* MPU Region Attribute and Size Register */
00710 #define MPU_RASR_ATTRS_Pos                 16
00711 #define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)
00713 #define MPU_RASR_SRD_Pos                    8
00714 #define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)
00716 #define MPU_RASR_SIZE_Pos                   1
00717 #define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)
00719 #define MPU_RASR_ENABLE_Pos                 0
00720 #define MPU_RASR_ENABLE_Msk                (1UL << MPU_RASR_ENABLE_Pos)
00722
00723 #endif
00724
00725
00734 typedef struct
00735 {
00736   __IO uint32_t DHCSR;
00737   __O  uint32_t DCRSR;
00738   __IO uint32_t DCRDR;
00739   __IO uint32_t DEMCR;
00740 } CoreDebug_Type;
00741
00742 /* Debug Halting Control and Status Register */
00743 #define CoreDebug_DHCSR_DBGKEY_Pos         16
00744 #define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)
00746 #define CoreDebug_DHCSR_S_RESET_ST_Pos     25
00747 #define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)
00749 #define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24
00750 #define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)
00752 #define CoreDebug_DHCSR_S_LOCKUP_Pos       19
00753 #define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)
00755 #define CoreDebug_DHCSR_S_SLEEP_Pos        18
00756 #define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)
00758 #define CoreDebug_DHCSR_S_HALT_Pos         17
00759 #define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)
00761 #define CoreDebug_DHCSR_S_REGRDY_Pos       16
00762 #define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)
00764 #define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5
00765 #define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)
00767 #define CoreDebug_DHCSR_C_MASKINTS_Pos      3
00768 #define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)
00770 #define CoreDebug_DHCSR_C_STEP_Pos          2
00771 #define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)
00773 #define CoreDebug_DHCSR_C_HALT_Pos          1
00774 #define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)
00776 #define CoreDebug_DHCSR_C_DEBUGEN_Pos       0
00777 #define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos)
00779 /* Debug Core Register Selector Register */
00780 #define CoreDebug_DCRSR_REGWnR_Pos         16
00781 #define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)
00783 #define CoreDebug_DCRSR_REGSEL_Pos          0
00784 #define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos)
00786 /* Debug Exception and Monitor Control Register */
00787 #define CoreDebug_DEMCR_TRCENA_Pos         24
00788 #define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)
00790 #define CoreDebug_DEMCR_MON_REQ_Pos        19
00791 #define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)
00793 #define CoreDebug_DEMCR_MON_STEP_Pos       18
00794 #define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)
00796 #define CoreDebug_DEMCR_MON_PEND_Pos       17
00797 #define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)
00799 #define CoreDebug_DEMCR_MON_EN_Pos         16
00800 #define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)
00802 #define CoreDebug_DEMCR_VC_HARDERR_Pos     10
00803 #define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)
00805 #define CoreDebug_DEMCR_VC_INTERR_Pos       9
00806 #define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)
00808 #define CoreDebug_DEMCR_VC_BUSERR_Pos       8
00809 #define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)
00811 #define CoreDebug_DEMCR_VC_STATERR_Pos      7
00812 #define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)
00814 #define CoreDebug_DEMCR_VC_CHKERR_Pos       6
00815 #define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)
00817 #define CoreDebug_DEMCR_VC_NOCPERR_Pos      5
00818 #define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)
00820 #define CoreDebug_DEMCR_VC_MMERR_Pos        4
00821 #define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)
00823 #define CoreDebug_DEMCR_VC_CORERESET_Pos    0
00824 #define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos)
00826
00833 /* Memory mapping of Cortex-M3 Hardware */
00834 #define SCS_BASE            (0xE000E000UL)
00835 #define ITM_BASE            (0xE0000000UL)
00836 #define CoreDebug_BASE      (0xE000EDF0UL)
00837 #define SysTick_BASE        (SCS_BASE +  0x0010UL)
00838 #define NVIC_BASE           (SCS_BASE +  0x0100UL)
00839 #define SCB_BASE            (SCS_BASE +  0x0D00UL)
00841 #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )
00842 #define SCB                 ((SCB_Type       *)     SCB_BASE      )
00843 #define SysTick             ((SysTick_Type   *)     SysTick_BASE  )
00844 #define NVIC                ((NVIC_Type      *)     NVIC_BASE     )
00845 #define ITM                 ((ITM_Type       *)     ITM_BASE      )
00846 #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)
00848 #if (__MPU_PRESENT == 1)
00849   #define MPU_BASE          (SCS_BASE +  0x0D90UL)
00850   #define MPU               ((MPU_Type       *)     MPU_BASE      )
00851 #endif
00852
00857 /*******************************************************************************
00858  *                Hardware Abstraction Layer
00859  ******************************************************************************/
00871 /* ##########################   NVIC functions  #################################### */
00887 static __INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
00888 {
00889   uint32_t reg_value;
00890   uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07);               /* only values 0..7 are used          */
00891
00892   reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
00893   reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk);             /* clear bits to change               */
00894   reg_value  =  (reg_value                                 |
00895                 ((uint32_t)0x5FA << SCB_AIRCR_VECTKEY_Pos) |
00896                 (PriorityGroupTmp << 8));                                     /* Insert write key and priorty group */
00897   SCB->AIRCR =  reg_value;
00898 }
00899
00900
00908 static __INLINE uint32_t NVIC_GetPriorityGrouping(void)
00909 {
00910   return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos);   /* read priority grouping field */
00911 }
00912
00913
00921 static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
00922 {
00923   NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */
00924 }
00925
00926
00934 static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
00935 {
00936   NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */
00937 }
00938
00939
00949 static __INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
00950 {
00951   return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */
00952 }
00953
00954
00962 static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
00963 {
00964   NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */
00965 }
00966
00967
00975 static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
00976 {
00977   NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
00978 }
00979
00980
00988 static __INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
00989 {
00990   return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */
00991 }
00992
00993
01005 static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
01006 {
01007   if(IRQn < 0) {
01008     SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M  System Interrupts */
01009   else {
01010     NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff);    }        /* set Priority for device specific Interrupts  */
01011 }
01012
01013
01026 static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
01027 {
01028
01029   if(IRQn < 0) {
01030     return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for Cortex-M  system interrupts */
01031   else {
01032     return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)]           >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for device specific interrupts  */
01033 }
01034
01035
01050 static __INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
01051 {
01052   uint32_t PriorityGroupTmp = (PriorityGroup & 0x07);          /* only values 0..7 are used          */
01053   uint32_t PreemptPriorityBits;
01054   uint32_t SubPriorityBits;
01055
01056   PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
01057   SubPriorityBits     = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
01058
01059   return (
01060            ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) |
01061            ((SubPriority     & ((1 << (SubPriorityBits    )) - 1)))
01062          );
01063 }
01064
01065
01080 static __INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
01081 {
01082   uint32_t PriorityGroupTmp = (PriorityGroup & 0x07);          /* only values 0..7 are used          */
01083   uint32_t PreemptPriorityBits;
01084   uint32_t SubPriorityBits;
01085
01086   PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
01087   SubPriorityBits     = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
01088
01089   *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1);
01090   *pSubPriority     = (Priority                   ) & ((1 << (SubPriorityBits    )) - 1);
01091 }
01092
01093
01098 static __INLINE void NVIC_SystemReset(void)
01099 {
01100   __DSB();                                                     /* Ensure all outstanding memory accesses included
01101                                                                   buffered write are completed before reset */
01102   SCB->AIRCR  = ((0x5FA << SCB_AIRCR_VECTKEY_Pos)      |
01103                  (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
01104                  SCB_AIRCR_SYSRESETREQ_Msk);                   /* Keep priority group unchanged */
01105   __DSB();                                                     /* Ensure completion of memory access */
01106   while(1);                                                    /* wait until reset */
01107 }
01108
01113 /* ##################################    SysTick function  ############################################ */
01119 #if (__Vendor_SysTickConfig == 0)
01120
01130 static __INLINE uint32_t SysTick_Config(uint32_t ticks)
01131 {
01132   if (ticks > SysTick_LOAD_RELOAD_Msk)  return (1);            /* Reload value impossible */
01133
01134   SysTick->LOAD  = (ticks & SysTick_LOAD_RELOAD_Msk) - 1;      /* set reload register */
01135   NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1);  /* set Priority for Cortex-M0 System Interrupts */
01136   SysTick->VAL   = 0;                                          /* Load the SysTick Counter Value */
01137   SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
01138                    SysTick_CTRL_TICKINT_Msk   |
01139                    SysTick_CTRL_ENABLE_Msk;                    /* Enable SysTick IRQ and SysTick Timer */
01140   return (0);                                                  /* Function successful */
01141 }
01142
01143 #endif
01144
01149 /* ##################################### Debug In/Output function ########################################### */
01155 extern volatile int32_t ITM_RxBuffer;
01156 #define                 ITM_RXBUFFER_EMPTY    0x5AA55AA5
01168 static __INLINE uint32_t ITM_SendChar (uint32_t ch)
01169 {
01170   if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA_Msk)  &&      /* Trace enabled */
01171       (ITM->TCR & ITM_TCR_ITMENA_Msk)                  &&      /* ITM enabled */
01172       (ITM->TER & (1UL << 0)        )                    )     /* ITM Port #0 enabled */
01173   {
01174     while (ITM->PORT[0].u32 == 0);
01175     ITM->PORT[0].u8 = (uint8_t) ch;
01176   }
01177   return (ch);
01178 }
01179
01180
01190 static __INLINE int32_t ITM_ReceiveChar (void) {
01191   int32_t ch = -1;                           /* no character available */
01192
01193   if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
01194     ch = ITM_RxBuffer;
01195     ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
01196   }
01197
01198   return (ch);
01199 }
01200
01201
01210 static __INLINE int32_t ITM_CheckChar (void) {
01211
01212   if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
01213     return (0);                                 /* no character available */
01214   } else {
01215     return (1);                                 /*    character available */
01216   }
01217 }
01218
01221 #endif /* __CORE_CM3_H_DEPENDANT */
01222
01223 #endif /* __CMSIS_GENERIC */
01224
01225 #ifdef __cplusplus
01226 }
01227 #endif
Generated on Mon Nov 28 2011 11:14:40 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cmFunc.h Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cmFunc.h
Go to the documentation of this file.
00001 /**************************************************************************/
00024 #ifndef __CORE_CMFUNC_H
00025 #define __CORE_CMFUNC_H
00026
00027
00028 /* ###########################  Core Function Access  ########################### */
00034 #if   defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
00035 /* ARM armcc specific functions */
00036
00037 #if (__ARMCC_VERSION < 400677)
00038   #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
00039 #endif
00040
00041 /* intrinsic void __enable_irq();     */
00042 /* intrinsic void __disable_irq();    */
00043
00050 static __INLINE uint32_t __get_CONTROL(void)
00051 {
00052   register uint32_t __regControl         __ASM("control");
00053   return(__regControl);
00054 }
00055
00056
00063 static __INLINE void __set_CONTROL(uint32_t control)
00064 {
00065   register uint32_t __regControl         __ASM("control");
00066   __regControl = control;
00067 }
00068
00069
00076 static __INLINE uint32_t __get_IPSR(void)
00077 {
00078   register uint32_t __regIPSR          __ASM("ipsr");
00079   return(__regIPSR);
00080 }
00081
00082
00089 static __INLINE uint32_t __get_APSR(void)
00090 {
00091   register uint32_t __regAPSR          __ASM("apsr");
00092   return(__regAPSR);
00093 }
00094
00095
00102 static __INLINE uint32_t __get_xPSR(void)
00103 {
00104   register uint32_t __regXPSR          __ASM("xpsr");
00105   return(__regXPSR);
00106 }
00107
00108
00115 static __INLINE uint32_t __get_PSP(void)
00116 {
00117   register uint32_t __regProcessStackPointer  __ASM("psp");
00118   return(__regProcessStackPointer);
00119 }
00120
00121
00128 static __INLINE void __set_PSP(uint32_t topOfProcStack)
00129 {
00130   register uint32_t __regProcessStackPointer  __ASM("psp");
00131   __regProcessStackPointer = topOfProcStack;
00132 }
00133
00134
00141 static __INLINE uint32_t __get_MSP(void)
00142 {
00143   register uint32_t __regMainStackPointer     __ASM("msp");
00144   return(__regMainStackPointer);
00145 }
00146
00147
00154 static __INLINE void __set_MSP(uint32_t topOfMainStack)
00155 {
00156   register uint32_t __regMainStackPointer     __ASM("msp");
00157   __regMainStackPointer = topOfMainStack;
00158 }
00159
00160
00167 static __INLINE uint32_t __get_PRIMASK(void)
00168 {
00169   register uint32_t __regPriMask         __ASM("primask");
00170   return(__regPriMask);
00171 }
00172
00173
00180 static __INLINE void __set_PRIMASK(uint32_t priMask)
00181 {
00182   register uint32_t __regPriMask         __ASM("primask");
00183   __regPriMask = (priMask);
00184 }
00185
00186
00187 #if       (__CORTEX_M >= 0x03)
00188
00194 #define __enable_fault_irq                __enable_fiq
00195
00196
00202 #define __disable_fault_irq               __disable_fiq
00203
00204
00211 static __INLINE uint32_t  __get_BASEPRI(void)
00212 {
00213   register uint32_t __regBasePri         __ASM("basepri");
00214   return(__regBasePri);
00215 }
00216
00217
00224 static __INLINE void __set_BASEPRI(uint32_t basePri)
00225 {
00226   register uint32_t __regBasePri         __ASM("basepri");
00227   __regBasePri = (basePri & 0xff);
00228 }
00229
00230
00237 static __INLINE uint32_t __get_FAULTMASK(void)
00238 {
00239   register uint32_t __regFaultMask       __ASM("faultmask");
00240   return(__regFaultMask);
00241 }
00242
00243
00250 static __INLINE void __set_FAULTMASK(uint32_t faultMask)
00251 {
00252   register uint32_t __regFaultMask       __ASM("faultmask");
00253   __regFaultMask = (faultMask & (uint32_t)1);
00254 }
00255
00256 #endif /* (__CORTEX_M >= 0x03) */
00257
00258
00259 #if       (__CORTEX_M == 0x04)
00260
00267 static __INLINE uint32_t __get_FPSCR(void)
00268 {
00269 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
00270   register uint32_t __regfpscr         __ASM("fpscr");
00271   return(__regfpscr);
00272 #else
00273    return(0);
00274 #endif
00275 }
00276
00277
00284 static __INLINE void __set_FPSCR(uint32_t fpscr)
00285 {
00286 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
00287   register uint32_t __regfpscr         __ASM("fpscr");
00288   __regfpscr = (fpscr);
00289 #endif
00290 }
00291
00292 #endif /* (__CORTEX_M == 0x04) */
00293
00294
00295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
00296 /* IAR iccarm specific functions */
00297
00298 #include <cmsis_iar.h>
00299
00300 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
00301 /* GNU gcc specific functions */
00302
00308 __attribute__( ( always_inline ) ) static __INLINE void __enable_irq(void)
00309 {
00310   __ASM volatile ("cpsie i");
00311 }
00312
00313
00319 __attribute__( ( always_inline ) ) static __INLINE void __disable_irq(void)
00320 {
00321   __ASM volatile ("cpsid i");
00322 }
00323
00324
00331 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_CONTROL(void)
00332 {
00333   uint32_t result;
00334
00335   __ASM volatile ("MRS %0, control" : "=r" (result) );
00336   return(result);
00337 }
00338
00339
00346 __attribute__( ( always_inline ) ) static __INLINE void __set_CONTROL(uint32_t control)
00347 {
00348   __ASM volatile ("MSR control, %0" : : "r" (control) );
00349 }
00350
00351
00358 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_IPSR(void)
00359 {
00360   uint32_t result;
00361
00362   __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
00363   return(result);
00364 }
00365
00366
00373 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_APSR(void)
00374 {
00375   uint32_t result;
00376
00377   __ASM volatile ("MRS %0, apsr" : "=r" (result) );
00378   return(result);
00379 }
00380
00381
00388 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_xPSR(void)
00389 {
00390   uint32_t result;
00391
00392   __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
00393   return(result);
00394 }
00395
00396
00403 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_PSP(void)
00404 {
00405   register uint32_t result;
00406
00407   __ASM volatile ("MRS %0, psp\n"  : "=r" (result) );
00408   return(result);
00409 }
00410
00411
00418 __attribute__( ( always_inline ) ) static __INLINE void __set_PSP(uint32_t topOfProcStack)
00419 {
00420   __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) );
00421 }
00422
00423
00430 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_MSP(void)
00431 {
00432   register uint32_t result;
00433
00434   __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
00435   return(result);
00436 }
00437
00438
00445 __attribute__( ( always_inline ) ) static __INLINE void __set_MSP(uint32_t topOfMainStack)
00446 {
00447   __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) );
00448 }
00449
00450
00457 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_PRIMASK(void)
00458 {
00459   uint32_t result;
00460
00461   __ASM volatile ("MRS %0, primask" : "=r" (result) );
00462   return(result);
00463 }
00464
00465
00472 __attribute__( ( always_inline ) ) static __INLINE void __set_PRIMASK(uint32_t priMask)
00473 {
00474   __ASM volatile ("MSR primask, %0" : : "r" (priMask) );
00475 }
00476
00477
00478 #if       (__CORTEX_M >= 0x03)
00479
00485 __attribute__( ( always_inline ) ) static __INLINE void __enable_fault_irq(void)
00486 {
00487   __ASM volatile ("cpsie f");
00488 }
00489
00490
00496 __attribute__( ( always_inline ) ) static __INLINE void __disable_fault_irq(void)
00497 {
00498   __ASM volatile ("cpsid f");
00499 }
00500
00501
00508 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_BASEPRI(void)
00509 {
00510   uint32_t result;
00511
00512   __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
00513   return(result);
00514 }
00515
00516
00523 __attribute__( ( always_inline ) ) static __INLINE void __set_BASEPRI(uint32_t value)
00524 {
00525   __ASM volatile ("MSR basepri, %0" : : "r" (value) );
00526 }
00527
00528
00535 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_FAULTMASK(void)
00536 {
00537   uint32_t result;
00538
00539   __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
00540   return(result);
00541 }
00542
00543
00550 __attribute__( ( always_inline ) ) static __INLINE void __set_FAULTMASK(uint32_t faultMask)
00551 {
00552   __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
00553 }
00554
00555 #endif /* (__CORTEX_M >= 0x03) */
00556
00557
00558 #if       (__CORTEX_M == 0x04)
00559
00566 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_FPSCR(void)
00567 {
00568 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
00569   uint32_t result;
00570
00571   __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
00572   return(result);
00573 #else
00574    return(0);
00575 #endif
00576 }
00577
00578
00585 __attribute__( ( always_inline ) ) static __INLINE void __set_FPSCR(uint32_t fpscr)
00586 {
00587 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
00588   __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) );
00589 #endif
00590 }
00591
00592 #endif /* (__CORTEX_M == 0x04) */
00593
00594
00595 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
00596 /* TASKING carm specific functions */
00597
00598 /*
00599  * The CMSIS functions have been implemented as intrinsics in the compiler.
00600  * Please use "carm -?i" to get an up to date list of all instrinsics,
00601  * Including the CMSIS ones.
00602  */
00603
00604 #endif
00605
00609 #endif /* __CORE_CMFUNC_H */
Generated on Mon Nov 28 2011 11:14:40 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cmInstr.h Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/Include/core_cmInstr.h
Go to the documentation of this file.
00001 /**************************************************************************/
00024 #ifndef __CORE_CMINSTR_H
00025 #define __CORE_CMINSTR_H
00026
00027
00028 /* ##########################  Core Instruction Access  ######################### */
00035 #if   defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
00036 /* ARM armcc specific functions */
00037
00038 #if (__ARMCC_VERSION < 400677)
00039   #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
00040 #endif
00041
00042
00047 #define __NOP                             __nop
00048
00049
00055 #define __WFI                             __wfi
00056
00057
00063 #define __WFE                             __wfe
00064
00065
00070 #define __SEV                             __sev
00071
00072
00079 #define __ISB()                           __isb(0xF)
00080
00081
00087 #define __DSB()                           __dsb(0xF)
00088
00089
00095 #define __DMB()                           __dmb(0xF)
00096
00097
00105 #define __REV                             __rev
00106
00107
00115 static __INLINE __ASM uint32_t __REV16(uint32_t value)
00116 {
00117   rev16 r0, r0
00118   bx lr
00119 }
00120
00121
00129 static __INLINE __ASM int32_t __REVSH(int32_t value)
00130 {
00131   revsh r0, r0
00132   bx lr
00133 }
00134
00135
00136 #if       (__CORTEX_M >= 0x03)
00137
00145 #define __RBIT                            __rbit
00146
00147
00155 #define __LDREXB(ptr)                     ((uint8_t ) __ldrex(ptr))
00156
00157
00165 #define __LDREXH(ptr)                     ((uint16_t) __ldrex(ptr))
00166
00167
00175 #define __LDREXW(ptr)                     ((uint32_t ) __ldrex(ptr))
00176
00177
00187 #define __STREXB(value, ptr)              __strex(value, ptr)
00188
00189
00199 #define __STREXH(value, ptr)              __strex(value, ptr)
00200
00201
00211 #define __STREXW(value, ptr)              __strex(value, ptr)
00212
00213
00219 #define __CLREX                           __clrex
00220
00221
00230 #define __SSAT                            __ssat
00231
00232
00241 #define __USAT                            __usat
00242
00243
00251 #define __CLZ                             __clz
00252
00253 #endif /* (__CORTEX_M >= 0x03) */
00254
00255
00256
00257 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
00258 /* IAR iccarm specific functions */
00259
00260 #include <cmsis_iar.h>
00261
00262
00263 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
00264 /* GNU gcc specific functions */
00265
00270 __attribute__( ( always_inline ) ) static __INLINE void __NOP(void)
00271 {
00272   __ASM volatile ("nop");
00273 }
00274
00275
00281 __attribute__( ( always_inline ) ) static __INLINE void __WFI(void)
00282 {
00283   __ASM volatile ("wfi");
00284 }
00285
00286
00292 __attribute__( ( always_inline ) ) static __INLINE void __WFE(void)
00293 {
00294   __ASM volatile ("wfe");
00295 }
00296
00297
00302 __attribute__( ( always_inline ) ) static __INLINE void __SEV(void)
00303 {
00304   __ASM volatile ("sev");
00305 }
00306
00307
00314 __attribute__( ( always_inline ) ) static __INLINE void __ISB(void)
00315 {
00316   __ASM volatile ("isb");
00317 }
00318
00319
00325 __attribute__( ( always_inline ) ) static __INLINE void __DSB(void)
00326 {
00327   __ASM volatile ("dsb");
00328 }
00329
00330
00336 __attribute__( ( always_inline ) ) static __INLINE void __DMB(void)
00337 {
00338   __ASM volatile ("dmb");
00339 }
00340
00341
00349 __attribute__( ( always_inline ) ) static __INLINE uint32_t __REV(uint32_t value)
00350 {
00351   uint32_t result;
00352
00353   __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
00354   return(result);
00355 }
00356
00357
00365 __attribute__( ( always_inline ) ) static __INLINE uint32_t __REV16(uint32_t value)
00366 {
00367   uint32_t result;
00368
00369   __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
00370   return(result);
00371 }
00372
00373
00381 __attribute__( ( always_inline ) ) static __INLINE int32_t __REVSH(int32_t value)
00382 {
00383   uint32_t result;
00384
00385   __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
00386   return(result);
00387 }
00388
00389
00390 #if       (__CORTEX_M >= 0x03)
00391
00399 __attribute__( ( always_inline ) ) static __INLINE uint32_t __RBIT(uint32_t value)
00400 {
00401   uint32_t result;
00402
00403    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
00404    return(result);
00405 }
00406
00407
00415 __attribute__( ( always_inline ) ) static __INLINE uint8_t __LDREXB(volatile uint8_t *addr)
00416 {
00417     uint8_t result;
00418
00419    __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
00420    return(result);
00421 }
00422
00423
00431 __attribute__( ( always_inline ) ) static __INLINE uint16_t __LDREXH(volatile uint16_t *addr)
00432 {
00433     uint16_t result;
00434
00435    __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
00436    return(result);
00437 }
00438
00439
00447 __attribute__( ( always_inline ) ) static __INLINE uint32_t __LDREXW(volatile uint32_t *addr)
00448 {
00449     uint32_t result;
00450
00451    __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
00452    return(result);
00453 }
00454
00455
00465 __attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
00466 {
00467    uint32_t result;
00468
00469    __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
00470    return(result);
00471 }
00472
00473
00483 __attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
00484 {
00485    uint32_t result;
00486
00487    __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
00488    return(result);
00489 }
00490
00491
00501 __attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
00502 {
00503    uint32_t result;
00504
00505    __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
00506    return(result);
00507 }
00508
00509
00515 __attribute__( ( always_inline ) ) static __INLINE void __CLREX(void)
00516 {
00517   __ASM volatile ("clrex");
00518 }
00519
00520
00529 #define __SSAT(ARG1,ARG2) \
00530 ({                          \
00531   uint32_t __RES, __ARG1 = (ARG1); \
00532   __ASM ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
00533   __RES; \
00534  })
00535
00536
00545 #define __USAT(ARG1,ARG2) \
00546 ({                          \
00547   uint32_t __RES, __ARG1 = (ARG1); \
00548   __ASM ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
00549   __RES; \
00550  })
00551
00552
00560 __attribute__( ( always_inline ) ) static __INLINE uint8_t __CLZ(uint32_t value)
00561 {
00562   uint8_t result;
00563
00564   __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
00565   return(result);
00566 }
00567
00568 #endif /* (__CORTEX_M >= 0x03) */
00569
00570
00571
00572
00573 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
00574 /* TASKING carm specific functions */
00575
00576 /*
00577  * The CMSIS functions have been implemented as intrinsics in the compiler.
00578  * Please use "carm -?i" to get an up to date list of all intrinsics,
00579  * Including the CMSIS ones.
00580  */
00581
00582 #endif
00583  /* end of group CMSIS_Core_InstructionInterface */
00585
00586 #endif /* __CORE_CMINSTR_H */
Generated on Mon Nov 28 2011 11:14:40 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/crc32.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/crc32.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          crc32.c                                 2006-09-01
00003 */
00025 #include "lpc17xx_emac.h"                        /* LPC23xx/24xx definitions */
00026 #include "crc32.h"
00027
00028 /******************************************************************************
00029 ** Function name:               CRC_init
00030 **
00031 ** Descriptions:                Begin CRC calculation.
00032 **
00033 ** parameters:                  pointer to the CRC area.
00034 ** Returned value:              None
00035 **
00036 ******************************************************************************/
00037 void crc32_init(uint32_t *pCRC)
00038 {
00039     *pCRC = 0xffffffff;
00040 }
00041
00042 /******************************************************************************
00043 ** Function name:               CRC32_add
00044 **
00045 ** Descriptions:                Calculate CRC value one at a time
00046 **
00047 ** parameters:                  pointer to the CRC area, and passing value to get the CRC
00048 ** Returned value:              None
00049 **
00050 ******************************************************************************/
00051 void crc32_add(uint32_t *pCRC, uint8_t val8)
00052 {
00053     uint32_t i, poly;
00054     uint32_t entry;
00055     uint32_t crc_in;
00056     uint32_t crc_out;
00057
00058     crc_in = *pCRC;
00059     poly = 0xEDB88320L;
00060     entry = (crc_in ^ ((uint32_t) val8)) & 0xFF;
00061     for (i = 0; i < 8; i++)
00062     {
00063         if (entry & 1)
00064             entry = (entry >> 1) ^ poly;
00065         else
00066             entry >>= 1;
00067     }
00068     crc_out = ((crc_in>>8) & 0x00FFFFFF) ^ entry;
00069     *pCRC = crc_out;
00070     return;
00071 }
00072
00073 /******************************************************************************
00074 ** Function name:               CRC32_end
00075 **
00076 ** Descriptions:                Finish CRC calculation
00077 **
00078 ** parameters:                  pointer to the CRC area.
00079 ** Returned value:              None
00080 **
00081 ******************************************************************************/
00082 void crc32_end(uint32_t *pCRC)
00083 {
00084     *pCRC ^= 0xffffffff;
00085 }
00086
00087 /******************************************************************************
00088 ** Function name:               CRC32_bfr
00089 **
00090 ** Descriptions:                Get the CRC value based on size of the string.
00091 **
00092 ** parameters:                  Pointer to the string, size of the string.
00093 ** Returned value:              CRC value
00094 **
00095 ******************************************************************************/
00096 uint32_t crc32_bfr(void *pBfr, uint32_t size)
00097 {
00098     uint32_t crc32;
00099     uint8_t  *pu8;
00100
00101     crc32_init(&crc32);
00102     pu8 = (uint8_t *) pBfr;
00103     while (size-- != 0)
00104     {
00105         crc32_add(&crc32, *pu8);
00106         pu8++ ;
00107     }
00108     crc32_end(&crc32);
00109     return ( crc32 );
00110 }
00111
00112 /*********************************************************************************
00113 **                            End Of File
00114 *********************************************************************************/
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/crc32.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/crc32.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          crc32.h                                 2006-09-01
00003 */
00025 #ifndef __CRC32_H
00026 #define __CRC32_H
00027
00028 #include "lpc_types.h"
00029
00030 void   crc32_init(uint32_t *pCRC);
00031 void   crc32_add(uint32_t *pCRC, uint8_t val8);
00032 void   crc32_end(uint32_t *pCRC);
00033 uint32_t  crc32_bfr(void *pBfr, uint32_t size);
00034 uint32_t do_crc_behav( long long Addr );
00035
00036 #endif
00037
00038 /*-----------------------------------------------------------*/
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/DMA/dac_dma.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/DMA/dac_dma.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          dac_dma.c                               2010-05-21
00003 */
00026 #include "lpc17xx_dac.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "lpc17xx_gpdma.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE MACROS *************************/
00039 #define DMA_SIZE                1
00040
00041 /************************** PRIVATE VARIABLES *************************/
00042 // Terminal Counter flag for Channel 0
00043 __IO uint32_t Channel0_TC;
00044
00045 // Error Counter flag for Channel 0
00046 __IO uint32_t Channel0_Err;
00047
00048 GPDMA_Channel_CFG_Type GPDMACfg;
00049
00050 /************************** PRIVATE FUNCTION *************************/
00051 void DMA_IRQHandler (void);
00052
00053
00054 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00055 /*********************************************************************/
00060 void DMA_IRQHandler (void)
00061 {
00062         // check GPDMA interrupt on channel 0
00063         if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 0)){
00064                 // Check counter terminal status
00065                 if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 0)){
00066                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 0);
00067                         Channel0_TC++;
00068                 }
00069                 // Check error terminal status
00070                 if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, 0)){
00071                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 0);
00072                         Channel0_Err++;
00073                 }
00074         }
00075 }
00076
00077
00078 /*-------------------------MAIN FUNCTION------------------------------*/
00079 /*********************************************************************/
00084 int c_entry(void)
00085 {
00086         PINSEL_CFG_Type PinCfg;
00087         DAC_CONVERTER_CFG_Type DAC_ConverterConfigStruct;
00088         uint32_t dac_value =0;
00089         uint32_t i;
00090         /*
00091          * Init DAC pin connect
00092          * AOUT on P0.26
00093          */
00094         PinCfg.Funcnum = 2;
00095         PinCfg.OpenDrain = 0;
00096         PinCfg.Pinmode = 0;
00097         PinCfg.Pinnum = 26;
00098         PinCfg.Portnum = 0;
00099         PINSEL_ConfigPin(&PinCfg);
00100
00101         /* GPDMA block section -------------------------------------------- */
00102
00103         /* Disable GPDMA interrupt */
00104         NVIC_DisableIRQ(DMA_IRQn);
00105
00106         /* preemption = 1, sub-priority = 1 */
00107         NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
00108
00109         DAC_ConverterConfigStruct.CNT_ENA =SET;
00110         DAC_ConverterConfigStruct.DMA_ENA = SET;
00111         DAC_Init(LPC_DAC);
00112         /* set time out for DAC*/
00113         DAC_SetDMATimeOut(LPC_DAC,0xFFFF);
00114         DAC_ConfigDAConverterControl(LPC_DAC, &DAC_ConverterConfigStruct);
00115
00116         /* Initialize GPDMA controller */
00117         GPDMA_Init();
00118
00119         // Setup GPDMA channel --------------------------------
00120         // channel 0
00121         GPDMACfg.ChannelNum = 0;
00122         // Source memory
00123         GPDMACfg.SrcMemAddr = (uint32_t)(&dac_value);
00124         // Destination memory - unused
00125         GPDMACfg.DstMemAddr = 0;
00126         // Transfer size
00127         GPDMACfg.TransferSize = DMA_SIZE;
00128         // Transfer width - unused
00129         GPDMACfg.TransferWidth = 0;
00130         // Transfer type
00131         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2P;
00132         // Source connection - unused
00133         GPDMACfg.SrcConn = 0;
00134         // Destination connection
00135         GPDMACfg.DstConn = GPDMA_CONN_DAC;
00136         // Linker List Item - unused
00137         GPDMACfg.DMALLI = 0;
00138         // Setup channel with given parameter
00139         GPDMA_Setup(&GPDMACfg);
00140
00141         /* Reset terminal counter */
00142         Channel0_TC = 0;
00143         /* Reset Error counter */
00144         Channel0_Err = 0;
00145
00146         /* Enable GPDMA interrupt */
00147         NVIC_EnableIRQ(DMA_IRQn);
00148
00149         /* Wait for GPDMA processing complete */
00150         while (1) {
00151
00152                 // Enable GPDMA channel 0
00153                 GPDMA_ChannelCmd(0, ENABLE);
00154
00155                 while ((Channel0_TC == 0) );
00156
00157                 // Disable GPDMA channel 0
00158                 GPDMA_ChannelCmd(0, DISABLE);
00159
00160                 dac_value ++;
00161                 if (dac_value == 0x3FF) dac_value =0;
00162                 //delay
00163                 for(i=0;i<100000;i++);
00164
00165                 /* Reset terminal counter */
00166                 Channel0_TC = 0;
00167
00168                 // Re-setup channel
00169                 GPDMA_Setup(&GPDMACfg);
00170         }
00171 }
00172 /* With ARM and GHS toolsets, the entry point is main() - this will
00173    allow the linker to generate wrapper code to setup stacks, allocate
00174    heap area, and initialize and copy code and data segments. For GNU
00175    toolsets, the entry point is through __start() in the crt0_gnu.asm
00176    file, and that startup code will setup stacks and data */
00177 int main(void)
00178 {
00179     return c_entry();
00180 }
00181
00182 #ifdef  DEBUG
00183 /*******************************************************************************
00184 * @brief                Reports the name of the source file and the source line number
00185 *                               where the CHECK_PARAM error has occurred.
00186 * @param[in]    file Pointer to the source file name
00187 * @param[in]    line assert_param error line source number
00188 * @return               None
00189 *******************************************************************************/
00190 void check_failed(uint8_t *file, uint32_t line)
00191 {
00192         /* User can add his own implementation to report the file name and line number,
00193          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00194
00195         /* Infinite loop */
00196         while(1);
00197 }
00198 #endif
00199
00200 /*
00201  * @}
00202  */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/SineWave/dac_sinewave_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/SineWave/dac_sinewave_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          dac_sinewave_test.c                             2010-06-04
00003 */
00026 #include "lpc17xx_dac.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "lpc17xx_gpdma.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE MACROS *************************/
00039 #define DMA_SIZE                60
00040 #define NUM_SINE_SAMPLE 60
00041 #define SINE_FREQ_IN_HZ 60
00042 #define PCLK_DAC_IN_MHZ 25 //CCLK divided by 4
00043
00044 /************************** PRIVATE VARIABLES *************************/
00045 GPDMA_Channel_CFG_Type GPDMACfg;
00046
00047 /*-------------------------MAIN FUNCTION------------------------------*/
00048 /*********************************************************************/
00053 int c_entry(void)
00054 {
00055         PINSEL_CFG_Type PinCfg;
00056         DAC_CONVERTER_CFG_Type DAC_ConverterConfigStruct;
00057         GPDMA_LLI_Type DMA_LLI_Struct;
00058         uint32_t tmp;
00059         uint32_t i;
00060         uint32_t sin_0_to_90_16_samples[16]={\
00061                         0,1045,2079,3090,4067,\
00062                         5000,5877,6691,7431,8090,\
00063                         8660,9135,9510,9781,9945,10000\
00064         };
00065         uint32_t dac_sine_lut[NUM_SINE_SAMPLE];
00066         /*
00067          * Init DAC pin connect
00068          * AOUT on P0.26
00069          */
00070         PinCfg.Funcnum = 2;
00071         PinCfg.OpenDrain = 0;
00072         PinCfg.Pinmode = 0;
00073         PinCfg.Pinnum = 26;
00074         PinCfg.Portnum = 0;
00075         PINSEL_ConfigPin(&PinCfg);
00076
00077         //Prepare DAC sine look up table
00078         for(i=0;i<NUM_SINE_SAMPLE;i++)
00079         {
00080                 if(i<=15)
00081                 {
00082                         dac_sine_lut[i] = 512 + 512*sin_0_to_90_16_samples[i]/10000;
00083                         if(i==15) dac_sine_lut[i]= 1023;
00084                 }
00085                 else if(i<=30)
00086                 {
00087                         dac_sine_lut[i] = 512 + 512*sin_0_to_90_16_samples[30-i]/10000;
00088                 }
00089                 else if(i<=45)
00090                 {
00091                         dac_sine_lut[i] = 512 - 512*sin_0_to_90_16_samples[i-30]/10000;
00092                 }
00093                 else
00094                 {
00095                         dac_sine_lut[i] = 512 - 512*sin_0_to_90_16_samples[60-i]/10000;
00096                 }
00097                 dac_sine_lut[i] = (dac_sine_lut[i]<<6);
00098         }
00099         //Prepare DMA link list item structure
00100         DMA_LLI_Struct.SrcAddr= (uint32_t)dac_sine_lut;
00101         DMA_LLI_Struct.DstAddr= (uint32_t)&(LPC_DAC->DACR);
00102         DMA_LLI_Struct.NextLLI= (uint32_t)&DMA_LLI_Struct;
00103         DMA_LLI_Struct.Control= DMA_SIZE
00104                                                         | (2<<18) //source width 32 bit
00105                                                         | (2<<21) //dest. width 32 bit
00106                                                         | (1<<26) //source increment
00107                                                         ;
00108
00109         /* GPDMA block section -------------------------------------------- */
00110         /* Initialize GPDMA controller */
00111         GPDMA_Init();
00112
00113         // Setup GPDMA channel --------------------------------
00114         // channel 0
00115         GPDMACfg.ChannelNum = 0;
00116         // Source memory
00117         GPDMACfg.SrcMemAddr = (uint32_t)(dac_sine_lut);
00118         // Destination memory - unused
00119         GPDMACfg.DstMemAddr = 0;
00120         // Transfer size
00121         GPDMACfg.TransferSize = DMA_SIZE;
00122         // Transfer width - unused
00123         GPDMACfg.TransferWidth = 0;
00124         // Transfer type
00125         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2P;
00126         // Source connection - unused
00127         GPDMACfg.SrcConn = 0;
00128         // Destination connection
00129         GPDMACfg.DstConn = GPDMA_CONN_DAC;
00130         // Linker List Item - unused
00131         GPDMACfg.DMALLI = (uint32_t)&DMA_LLI_Struct;
00132         // Setup channel with given parameter
00133         GPDMA_Setup(&GPDMACfg);
00134
00135         DAC_ConverterConfigStruct.CNT_ENA =SET;
00136         DAC_ConverterConfigStruct.DMA_ENA = SET;
00137         DAC_Init(LPC_DAC);
00138         /* set time out for DAC*/
00139         tmp = (PCLK_DAC_IN_MHZ*1000000)/(SINE_FREQ_IN_HZ*NUM_SINE_SAMPLE);
00140         DAC_SetDMATimeOut(LPC_DAC,tmp);
00141         DAC_ConfigDAConverterControl(LPC_DAC, &DAC_ConverterConfigStruct);
00142
00143         // Enable GPDMA channel 0
00144         GPDMA_ChannelCmd(0, ENABLE);
00145
00146         while (1);
00147 }
00148 /* With ARM and GHS toolsets, the entry point is main() - this will
00149    allow the linker to generate wrapper code to setup stacks, allocate
00150    heap area, and initialize and copy code and data segments. For GNU
00151    toolsets, the entry point is through __start() in the crt0_gnu.asm
00152    file, and that startup code will setup stacks and data */
00153 int main(void)
00154 {
00155     return c_entry();
00156 }
00157
00158 #ifdef  DEBUG
00159 /*******************************************************************************
00160 * @brief                Reports the name of the source file and the source line number
00161 *                               where the CHECK_PARAM error has occurred.
00162 * @param[in]    file Pointer to the source file name
00163 * @param[in]    line assert_param error line source number
00164 * @return               None
00165 *******************************************************************************/
00166 void check_failed(uint8_t *file, uint32_t line)
00167 {
00168         /* User can add his own implementation to report the file name and line number,
00169          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00170
00171         /* Infinite loop */
00172         while(1);
00173 }
00174 #endif
00175 /*
00176  * @}
00177  */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/Speaker/dac_speaker.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/Speaker/dac_speaker.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          dac_speaker.c                           2010-05-21
00003 */
00025 #include "lpc17xx_dac.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /*-------------------------MAIN FUNCTION------------------------------*/
00037 /*********************************************************************/
00042 int c_entry(void)
00043 {
00044         PINSEL_CFG_Type PinCfg;
00045         uint32_t time;
00046         float rate =0;
00047
00048         /*
00049          * Init DAC pin connect
00050          * AOUT on P0.26
00051          */
00052         PinCfg.Funcnum = 2;
00053         PinCfg.OpenDrain = 0;
00054         PinCfg.Pinmode = 0;
00055         PinCfg.Pinnum = 26;
00056         PinCfg.Portnum = 0;
00057         PINSEL_ConfigPin(&PinCfg);
00058
00059         /* init DAC structure to default
00060          * Maximum      current is 700 uA
00061          * First value to AOUT is 0
00062          */
00063         DAC_Init(LPC_DAC);
00064
00065         // main loop
00066         while (1)
00067         {
00068                 for(time = 1; time < 0x3FF; time++)
00069                 {
00070                         DAC_UpdateValue ( LPC_DAC,(uint32_t)(time*rate));
00071                 }
00072
00073                 rate += 0.001;
00074
00075                 if(rate >= 1)
00076                 {
00077                         rate = 0;
00078                 }
00079         }
00080 }
00081 /* With ARM and GHS toolsets, the entry point is main() - this will
00082    allow the linker to generate wrapper code to setup stacks, allocate
00083    heap area, and initialize and copy code and data segments. For GNU
00084    toolsets, the entry point is through __start() in the crt0_gnu.asm
00085    file, and that startup code will setup stacks and data */
00086 int main(void)
00087 {
00088     return c_entry();
00089 }
00090
00091 #ifdef  DEBUG
00092 /*******************************************************************************
00093 * @brief                Reports the name of the source file and the source line number
00094 *                               where the CHECK_PARAM error has occurred.
00095 * @param[in]    file Pointer to the source file name
00096 * @param[in]    line assert_param error line source number
00097 * @return               None
00098 *******************************************************************************/
00099 void check_failed(uint8_t *file, uint32_t line)
00100 {
00101         /* User can add his own implementation to report the file name and line number,
00102          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00103
00104         /* Infinite loop */
00105         while(1);
00106 }
00107 #endif
00108
00109 /*
00110  * @}
00111  */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/DAC/WaveGenerate/dac_wave_generate.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/DAC/WaveGenerate/dac_wave_generate.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          dac_wave_generate.c                             2010-07-16
00003 */
00026 #include "lpc17xx_dac.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "lpc17xx_gpdma.h"
00030 #include "debug_frmwrk.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE MACROS *************************/
00040 #define DMA_SIZE_SINE           60
00041 #define NUM_SAMPLE_SINE         60
00042 #define DMA_SIZE                        64
00043 #define NUM_SAMPLE                      64
00044
00045 #define SIGNAL_FREQ_IN_HZ       60
00046 #define PCLK_DAC_IN_MHZ 25 //CCLK divided by 4
00047
00048 #define DAC_GENERATE_SINE               1
00049 #define DAC_GENERATE_TRIANGLE   2
00050 #define DAC_GENERATE_ESCALATOR  3
00051 #define DAC_GENERATE_NONE               0
00052
00053 /************************** PRIVATE VARIABLES *************************/
00054 uint8_t menu1[] =
00055 "********************************************************************************\n\r"
00056 "Hello NXP Semiconductors \n\r"
00057 " DAC generate signals demo \n\r"
00058 "\t - MCU: LPC17xx \n\r"
00059 "\t - Core: ARM Cortex-M3 \n\r"
00060 "\t - Communicate via: UART0 - 115200 kbps \n\r"
00061 " Use DAC to generate sine, triangle, escalator wave, frequency adjustable\n\r"
00062 " Signal samples are transmitted to DAC by DMA memory to peripheral\n\r"
00063 "********************************************************************************\n\r";
00064
00065 /************************** PRIVATE FUNCTION *************************/
00066 void print_menu(void);
00067
00068 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00069 /*********************************************************************/
00074 void print_menu(void)
00075 {
00076         _DBG(menu1);
00077 }
00078
00079 /*-------------------------MAIN FUNCTION------------------------------*/
00080 /*********************************************************************/
00085 int c_entry(void)
00086 {
00087         PINSEL_CFG_Type PinCfg;
00088         DAC_CONVERTER_CFG_Type DAC_ConverterConfigStruct;
00089         GPDMA_Channel_CFG_Type GPDMACfg;
00090         GPDMA_LLI_Type DMA_LLI_Struct;
00091         uint32_t tmp;
00092         uint8_t i,option;
00093         uint32_t sin_0_to_90_16_samples[16]={\
00094                         0,1045,2079,3090,4067,\
00095                         5000,5877,6691,7431,8090,\
00096                         8660,9135,9510,9781,9945,10000\
00097         };
00098         uint32_t dac_lut[NUM_SAMPLE];
00099
00100         /*
00101          * Init DAC pin connect
00102          * AOUT on P0.26
00103          */
00104         PinCfg.Funcnum = 2;
00105         PinCfg.OpenDrain = 0;
00106         PinCfg.Pinmode = 0;
00107         PinCfg.Pinnum = 26;
00108         PinCfg.Portnum = 0;
00109         PINSEL_ConfigPin(&PinCfg);
00110
00111         /* Initialize debug via UART0
00112          * – 115200bps
00113          * – 8 data bit
00114          * – No parity
00115          * – 1 stop bit
00116          * – No flow control
00117          */
00118         debug_frmwrk_init();
00119
00120         // print welcome screen
00121         print_menu();
00122
00123         while(1)
00124         {
00125                 //Select option
00126                 _DBG("Please choose signal type:\n\r");
00127                 _DBG("\t1) Sine wave.\n\r");
00128                 _DBG("\t2) Triangle wave.\n\r");
00129                 _DBG("\t3) Escalator wave.\n\r");
00130                 option = DAC_GENERATE_NONE;
00131                 while(option == DAC_GENERATE_NONE)
00132                 {
00133                         switch(_DG)
00134                         {
00135                         case '1': option = DAC_GENERATE_SINE; break;
00136                         case '2': option = DAC_GENERATE_TRIANGLE; break;
00137                         case '3': option = DAC_GENERATE_ESCALATOR; break;
00138                         default:
00139                                 _DBG("Wrong choice! Please select 1 or 2 or 3 only!\n\r");
00140                                 option = DAC_GENERATE_NONE;
00141                                 break;
00142                         }
00143                 }
00144
00145                 //Prepare DAC look up table
00146                 switch(option)
00147                 {
00148                 case DAC_GENERATE_SINE:
00149                         for(i=0;i<NUM_SAMPLE_SINE;i++)
00150                         {
00151                                 if(i<=15)
00152                                 {
00153                                         dac_lut[i] = 512 + 512*sin_0_to_90_16_samples[i]/10000;
00154                                         if(i==15) dac_lut[i]= 1023;
00155                                 }
00156                                 else if(i<=30)
00157                                 {
00158                                         dac_lut[i] = 512 + 512*sin_0_to_90_16_samples[30-i]/10000;
00159                                 }
00160                                 else if(i<=45)
00161                                 {
00162                                         dac_lut[i] = 512 - 512*sin_0_to_90_16_samples[i-30]/10000;
00163                                 }
00164                                 else
00165                                 {
00166                                         dac_lut[i] = 512 - 512*sin_0_to_90_16_samples[60-i]/10000;
00167                                 }
00168                                 dac_lut[i] = (dac_lut[i]<<6);
00169                         }
00170                         break;
00171                 case DAC_GENERATE_TRIANGLE:
00172                         for(i=0;i<NUM_SAMPLE;i++)
00173                         {
00174                                 if(i<32) dac_lut[i]= 32*i;
00175                                 else if (i==32) dac_lut[i]= 1023;
00176                                 else dac_lut[i] = 32*(NUM_SAMPLE-i);
00177                                 dac_lut[i] = (dac_lut[i]<<6);
00178                         }
00179                         break;
00180                 case DAC_GENERATE_ESCALATOR:
00181                         for(i=0;i<NUM_SAMPLE;i++)
00182                         {
00183                                 dac_lut[i] = (1023/3)*(i/16);
00184                                 dac_lut[i] = (dac_lut[i]<<6);
00185                         }
00186                         break;
00187                 default: break;
00188                 }
00189
00190                 //Prepare DMA link list item structure
00191                 DMA_LLI_Struct.SrcAddr= (uint32_t)dac_lut;
00192                 DMA_LLI_Struct.DstAddr= (uint32_t)&(LPC_DAC->DACR);
00193                 DMA_LLI_Struct.NextLLI= (uint32_t)&DMA_LLI_Struct;
00194                 DMA_LLI_Struct.Control= ((option==DAC_GENERATE_SINE)?DMA_SIZE_SINE:DMA_SIZE)
00195                                                                 | (2<<18) //source width 32 bit
00196                                                                 | (2<<21) //dest. width 32 bit
00197                                                                 | (1<<26) //source increment
00198                                                                 ;
00199
00200
00201                 /* GPDMA block section -------------------------------------------- */
00202                 /* Initialize GPDMA controller */
00203                 GPDMA_Init();
00204
00205                 // Setup GPDMA channel --------------------------------
00206                 // channel 0
00207                 GPDMACfg.ChannelNum = 0;
00208                 // Source memory
00209                 GPDMACfg.SrcMemAddr = (uint32_t)(dac_lut);
00210                 // Destination memory - unused
00211                 GPDMACfg.DstMemAddr = 0;
00212                 // Transfer size
00213                 GPDMACfg.TransferSize = ((option==DAC_GENERATE_SINE)?DMA_SIZE_SINE:DMA_SIZE);
00214                 // Transfer width - unused
00215                 GPDMACfg.TransferWidth = 0;
00216                 // Transfer type
00217                 GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2P;
00218                 // Source connection - unused
00219                 GPDMACfg.SrcConn = 0;
00220                 // Destination connection
00221                 GPDMACfg.DstConn = GPDMA_CONN_DAC;
00222                 // Linker List Item - unused
00223                 GPDMACfg.DMALLI = (uint32_t)&DMA_LLI_Struct;
00224                 // Setup channel with given parameter
00225                 GPDMA_Setup(&GPDMACfg);
00226
00227                 DAC_ConverterConfigStruct.CNT_ENA =SET;
00228                 DAC_ConverterConfigStruct.DMA_ENA = SET;
00229                 DAC_Init(LPC_DAC);
00230                 /* set time out for DAC*/
00231                 tmp = (PCLK_DAC_IN_MHZ*1000000)/(SIGNAL_FREQ_IN_HZ*((option==DAC_GENERATE_SINE)?NUM_SAMPLE_SINE:NUM_SAMPLE));
00232                 DAC_SetDMATimeOut(LPC_DAC,tmp);
00233                 DAC_ConfigDAConverterControl(LPC_DAC, &DAC_ConverterConfigStruct);
00234
00235                 //Start the demo
00236                 switch(option)
00237                 {
00238                 case DAC_GENERATE_SINE:
00239                         _DBG("\n\rDAC is generating 60Hz sine wave...");
00240                         break;
00241                 case DAC_GENERATE_TRIANGLE:
00242                         _DBG("\n\rDAC is generating 60Hz triangle wave...");
00243                         break;
00244                 case DAC_GENERATE_ESCALATOR:
00245                         _DBG("\n\rDAC is generating 60Hz escalator wave...");
00246                         break;
00247                 default: break;
00248                 }
00249
00250                 // Enable GPDMA channel 0
00251                 GPDMA_ChannelCmd(0, ENABLE);
00252
00253                 _DBG_("\n\rPreass ESC if you want to terminate!");
00254                 while(_DG!=27);
00255
00256                 // Disable GPDMA channel 0
00257                 GPDMA_ChannelCmd(0, DISABLE);
00258
00259         }
00260 }
00261 /* With ARM and GHS toolsets, the entry point is main() - this will
00262    allow the linker to generate wrapper code to setup stacks, allocate
00263    heap area, and initialize and copy code and data segments. For GNU
00264    toolsets, the entry point is through __start() in the crt0_gnu.asm
00265    file, and that startup code will setup stacks and data */
00266 int main(void)
00267 {
00268     return c_entry();
00269 }
00270
00271 #ifdef  DEBUG
00272 /*******************************************************************************
00273 * @brief                Reports the name of the source file and the source line number
00274 *                               where the CHECK_PARAM error has occurred.
00275 * @param[in]    file Pointer to the source file name
00276 * @param[in]    line assert_param error line source number
00277 * @return               None
00278 *******************************************************************************/
00279 void check_failed(uint8_t *file, uint32_t line)
00280 {
00281         /* User can add his own implementation to report the file name and line number,
00282          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00283
00284         /* Infinite loop */
00285         while(1);
00286 }
00287 #endif
00288 /*
00289  * @}
00290  */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/debug_frmwrk.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/debug_frmwrk.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          debug_frmwrk.c                          2010-05-21
00003 */
00026 #include "debug_frmwrk.h"
00027 #include "lpc17xx_pinsel.h"
00028
00029 /* If this source file built with example, the LPC17xx FW library configuration
00030  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00031  * otherwise the default FW library configuration file must be included instead
00032  */
00033 #ifdef __BUILD_WITH_EXAMPLE__
00034 #include "lpc17xx_libcfg.h"
00035 #else
00036 #include "lpc17xx_libcfg_default.h"
00037 #endif /* __BUILD_WITH_EXAMPLE__ */
00038
00039 #ifdef _DBGFWK
00040 /* Debug framework */
00041
00042 void (*_db_msg)(LPC_UART_TypeDef *UARTx, const void *s);
00043 void (*_db_msg_)(LPC_UART_TypeDef *UARTx, const void *s);
00044 void (*_db_char)(LPC_UART_TypeDef *UARTx, uint8_t ch);
00045 void (*_db_dec)(LPC_UART_TypeDef *UARTx, uint8_t decn);
00046 void (*_db_dec_16)(LPC_UART_TypeDef *UARTx, uint16_t decn);
00047 void (*_db_dec_32)(LPC_UART_TypeDef *UARTx, uint32_t decn);
00048 void (*_db_hex)(LPC_UART_TypeDef *UARTx, uint8_t hexn);
00049 void (*_db_hex_16)(LPC_UART_TypeDef *UARTx, uint16_t hexn);
00050 void (*_db_hex_32)(LPC_UART_TypeDef *UARTx, uint32_t hexn);
00051 uint8_t (*_db_get_char)(LPC_UART_TypeDef *UARTx);
00052
00053
00054 /*********************************************************************/
00060 void UARTPutChar (LPC_UART_TypeDef *UARTx, uint8_t ch)
00061 {
00062         UART_Send(UARTx, &ch, 1, BLOCKING);
00063 }
00064
00065
00066 /*********************************************************************/
00071 uint8_t UARTGetChar (LPC_UART_TypeDef *UARTx)
00072 {
00073         uint8_t tmp = 0;
00074         UART_Receive(UARTx, &tmp, 1, BLOCKING);
00075         return(tmp);
00076 }
00077
00078
00079 /*********************************************************************/
00085 void UARTPuts(LPC_UART_TypeDef *UARTx, const void *str)
00086 {
00087         uint8_t *s = (uint8_t *) str;
00088
00089         while (*s)
00090         {
00091                 UARTPutChar(UARTx, *s++);
00092         }
00093 }
00094
00095
00096 /*********************************************************************/
00102 void UARTPuts_(LPC_UART_TypeDef *UARTx, const void *str)
00103 {
00104         UARTPuts (UARTx, str);
00105         UARTPuts (UARTx, "\n\r");
00106 }
00107
00108
00109 /*********************************************************************/
00115 void UARTPutDec(LPC_UART_TypeDef *UARTx, uint8_t decnum)
00116 {
00117         uint8_t c1=decnum%10;
00118         uint8_t c2=(decnum/10)%10;
00119         uint8_t c3=(decnum/100)%10;
00120         UARTPutChar(UARTx, '0'+c3);
00121         UARTPutChar(UARTx, '0'+c2);
00122         UARTPutChar(UARTx, '0'+c1);
00123 }
00124
00125 /*********************************************************************/
00131 void UARTPutDec16(LPC_UART_TypeDef *UARTx, uint16_t decnum)
00132 {
00133         uint8_t c1=decnum%10;
00134         uint8_t c2=(decnum/10)%10;
00135         uint8_t c3=(decnum/100)%10;
00136         uint8_t c4=(decnum/1000)%10;
00137         uint8_t c5=(decnum/10000)%10;
00138         UARTPutChar(UARTx, '0'+c5);
00139         UARTPutChar(UARTx, '0'+c4);
00140         UARTPutChar(UARTx, '0'+c3);
00141         UARTPutChar(UARTx, '0'+c2);
00142         UARTPutChar(UARTx, '0'+c1);
00143 }
00144
00145 /*********************************************************************/
00151 void UARTPutDec32(LPC_UART_TypeDef *UARTx, uint32_t decnum)
00152 {
00153         uint8_t c1=decnum%10;
00154         uint8_t c2=(decnum/10)%10;
00155         uint8_t c3=(decnum/100)%10;
00156         uint8_t c4=(decnum/1000)%10;
00157         uint8_t c5=(decnum/10000)%10;
00158         uint8_t c6=(decnum/100000)%10;
00159         uint8_t c7=(decnum/1000000)%10;
00160         uint8_t c8=(decnum/10000000)%10;
00161         uint8_t c9=(decnum/100000000)%10;
00162         uint8_t c10=(decnum/1000000000)%10;
00163         UARTPutChar(UARTx, '0'+c10);
00164         UARTPutChar(UARTx, '0'+c9);
00165         UARTPutChar(UARTx, '0'+c8);
00166         UARTPutChar(UARTx, '0'+c7);
00167         UARTPutChar(UARTx, '0'+c6);
00168         UARTPutChar(UARTx, '0'+c5);
00169         UARTPutChar(UARTx, '0'+c4);
00170         UARTPutChar(UARTx, '0'+c3);
00171         UARTPutChar(UARTx, '0'+c2);
00172         UARTPutChar(UARTx, '0'+c1);
00173 }
00174
00175 /*********************************************************************/
00181 void UARTPutHex (LPC_UART_TypeDef *UARTx, uint8_t hexnum)
00182 {
00183         uint8_t nibble, i;
00184
00185         UARTPuts(UARTx, "0x");
00186         i = 1;
00187         do {
00188                 nibble = (hexnum >> (4*i)) & 0x0F;
00189                 UARTPutChar(UARTx, (nibble > 9) ? ('A' + nibble - 10) : ('0' + nibble));
00190         } while (i--);
00191 }
00192
00193
00194 /*********************************************************************/
00200 void UARTPutHex16 (LPC_UART_TypeDef *UARTx, uint16_t hexnum)
00201 {
00202         uint8_t nibble, i;
00203
00204         UARTPuts(UARTx, "0x");
00205         i = 3;
00206         do {
00207                 nibble = (hexnum >> (4*i)) & 0x0F;
00208                 UARTPutChar(UARTx, (nibble > 9) ? ('A' + nibble - 10) : ('0' + nibble));
00209         } while (i--);
00210 }
00211
00212 /*********************************************************************/
00218 void UARTPutHex32 (LPC_UART_TypeDef *UARTx, uint32_t hexnum)
00219 {
00220         uint8_t nibble, i;
00221
00222         UARTPuts(UARTx, "0x");
00223         i = 7;
00224         do {
00225                 nibble = (hexnum >> (4*i)) & 0x0F;
00226                 UARTPutChar(UARTx, (nibble > 9) ? ('A' + nibble - 10) : ('0' + nibble));
00227         } while (i--);
00228 }
00229
00231 // * @brief             print function that supports format as same as printf()
00232 // *                            function of <stdio.h> library
00233 // * @param[in] None
00234 // * @return            None
00235 // **********************************************************************/
00236 //void  _printf (const  char *format, ...)
00237 //{
00238 //    static  char  buffer[512 + 1];
00239 //            va_list     vArgs;
00240 //            char      *tmp;
00241 //    va_start(vArgs, format);
00242 //    vsprintf((char *)buffer, (char const *)format, vArgs);
00243 //    va_end(vArgs);
00244 //
00245 //    _DBG(buffer);
00246 //}
00247
00248 /*********************************************************************/
00253 void debug_frmwrk_init(void)
00254 {
00255         UART_CFG_Type UARTConfigStruct;
00256         PINSEL_CFG_Type PinCfg;
00257
00258 #if (USED_UART_DEBUG_PORT==0)
00259         /*
00260          * Initialize UART0 pin connect
00261          */
00262         PinCfg.Funcnum = 1;
00263         PinCfg.OpenDrain = 0;
00264         PinCfg.Pinmode = 0;
00265         PinCfg.Pinnum = 2;
00266         PinCfg.Portnum = 0;
00267         PINSEL_ConfigPin(&PinCfg);
00268         PinCfg.Pinnum = 3;
00269         PINSEL_ConfigPin(&PinCfg);
00270
00271 #elif (USED_UART_DEBUG_PORT==1)
00272         /*
00273          * Initialize UART1 pin connect
00274          */
00275         PinCfg.Funcnum = 1;
00276         PinCfg.OpenDrain = 0;
00277         PinCfg.Pinmode = 0;
00278         PinCfg.Pinnum = 15;
00279         PinCfg.Portnum = 0;
00280         PINSEL_ConfigPin(&PinCfg);
00281         PinCfg.Pinnum = 16;
00282         PINSEL_ConfigPin(&PinCfg);
00283 #endif
00284
00285         /* Initialize UART Configuration parameter structure to default state:
00286          * Baudrate = 9600bps
00287          * 8 data bit
00288          * 1 Stop bit
00289          * None parity
00290          */
00291         UART_ConfigStructInit(&UARTConfigStruct);
00292
00293         // Re-configure baudrate to 115200bps
00294         UARTConfigStruct.Baud_rate = 115200;
00295
00296         // Initialize DEBUG_UART_PORT peripheral with given to corresponding parameter
00297         UART_Init((LPC_UART_TypeDef *)DEBUG_UART_PORT, &UARTConfigStruct);
00298
00299         // Enable UART Transmit
00300         UART_TxCmd((LPC_UART_TypeDef *)DEBUG_UART_PORT, ENABLE);
00301
00302         _db_msg = UARTPuts;
00303         _db_msg_ = UARTPuts_;
00304         _db_char = UARTPutChar;
00305         _db_hex = UARTPutHex;
00306         _db_hex_16 = UARTPutHex16;
00307         _db_hex_32 = UARTPutHex32;
00308         _db_dec = UARTPutDec;
00309         _db_dec_16 = UARTPutDec16;
00310         _db_dec_32 = UARTPutDec32;
00311         _db_get_char = UARTGetChar;
00312 }
00313 #endif /*_DBGFWK */
00314
00315
00316 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/debug_frmwrk.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/debug_frmwrk.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          debug_frmwrk.h          2010-05-21
00003 */
00025 #ifndef DEBUG_FRMWRK_H_
00026 #define DEBUG_FRMWRK_H_
00027
00028 //#include <stdarg.h>
00029 #include "lpc17xx_uart.h"
00030
00031 #define USED_UART_DEBUG_PORT    0
00032
00033 #if (USED_UART_DEBUG_PORT==0)
00034 #define DEBUG_UART_PORT LPC_UART0
00035 #elif (USED_UART_DEBUG_PORT==1)
00036 #define DEBUG_UART_PORT LPC_UART1
00037 #endif
00038
00039 #define _DBG(x)         _db_msg(DEBUG_UART_PORT, x)
00040 #define _DBG_(x)        _db_msg_(DEBUG_UART_PORT, x)
00041 #define _DBC(x)         _db_char(DEBUG_UART_PORT, x)
00042 #define _DBD(x)         _db_dec(DEBUG_UART_PORT, x)
00043 #define _DBD16(x)        _db_dec_16(DEBUG_UART_PORT, x)
00044 #define _DBD32(x)        _db_dec_32(DEBUG_UART_PORT, x)
00045 #define _DBH(x)         _db_hex(DEBUG_UART_PORT, x)
00046 #define _DBH16(x)        _db_hex_16(DEBUG_UART_PORT, x)
00047 #define _DBH32(x)        _db_hex_32(DEBUG_UART_PORT, x)
00048 #define _DG                     _db_get_char(DEBUG_UART_PORT)
00049 //void  _printf (const  char *format, ...);
00050
00051 extern void (*_db_msg)(LPC_UART_TypeDef *UARTx, const void *s);
00052 extern void (*_db_msg_)(LPC_UART_TypeDef *UARTx, const void *s);
00053 extern void (*_db_char)(LPC_UART_TypeDef *UARTx, uint8_t ch);
00054 extern void (*_db_dec)(LPC_UART_TypeDef *UARTx, uint8_t decn);
00055 extern void (*_db_dec_16)(LPC_UART_TypeDef *UARTx, uint16_t decn);
00056 extern void (*_db_dec_32)(LPC_UART_TypeDef *UARTx, uint32_t decn);
00057 extern void (*_db_hex)(LPC_UART_TypeDef *UARTx, uint8_t hexn);
00058 extern void (*_db_hex_16)(LPC_UART_TypeDef *UARTx, uint16_t hexn);
00059 extern void (*_db_hex_32)(LPC_UART_TypeDef *UARTx, uint32_t hexn);
00060 extern uint8_t (*_db_get_char)(LPC_UART_TypeDef *UARTx);
00061
00062 void UARTPutChar (LPC_UART_TypeDef *UARTx, uint8_t ch);
00063 void UARTPuts(LPC_UART_TypeDef *UARTx, const void *str);
00064 void UARTPuts_(LPC_UART_TypeDef *UARTx, const void *str);
00065 void UARTPutDec(LPC_UART_TypeDef *UARTx, uint8_t decnum);
00066 void UARTPutDec16(LPC_UART_TypeDef *UARTx, uint16_t decnum);
00067 void UARTPutDec32(LPC_UART_TypeDef *UARTx, uint32_t decnum);
00068 void UARTPutHex (LPC_UART_TypeDef *UARTx, uint8_t hexnum);
00069 void UARTPutHex16 (LPC_UART_TypeDef *UARTx, uint16_t hexnum);
00070 void UARTPutHex32 (LPC_UART_TypeDef *UARTx, uint32_t hexnum);
00071 uint8_t UARTGetChar (LPC_UART_TypeDef *UARTx);
00072 void debug_frmwrk_init(void);
00073
00074 #endif /* DEBUG_FRMWRK_H_ */
Generated on Mon Nov 28 2011 11:14:41 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/demo.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/demo.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      Name:    DEMO.C
00003  *      Purpose: USB HID Demo
00004  *      Version: V1.10
00005  *----------------------------------------------------------------------------
00006  *      This software is supplied "AS IS" without any warranties, express,
00007  *      implied or statutory, including but not limited to the implied
00008  *      warranties of fitness for purpose, satisfactory quality and
00009  *      noninfringement. Keil extends you a royalty-free right to reproduce
00010  *      and distribute executable files created using this software for use
00011  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00012  *      else gives you the right to use this software.
00013  *
00014  *      Copyright (c) 2005-2009 Keil Software.
00015  *---------------------------------------------------------------------------*/
00016
00017 #include "LPC17xx.h"                        /* LPC17xx definitions */
00018
00019 #include "lpc_types.h"
00020
00021 #include "usb.h"
00022 #include "usbcfg.h"
00023 #include "usbhw.h"
00024
00025 #include "demo.h"
00026 #include "hid.h"
00027
00028 #include "lpc17xx_libcfg.h"
00029 #include "lpc17xx_nvic.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00038 uint8_t InReport;                              /* HID Input Report    */
00039                                             /*   Bit0   : Buttons  */
00040                                             /*   Bit1..7: Reserved */
00041
00042 uint8_t OutReport;                             /* HID Out Report      */
00043                                             /*   Bit0..7: LEDs     */
00044
00045
00046 /*
00047  *  Get HID Input Report -> InReport
00048  */
00049
00050 void GetInReport (void) {
00051
00052   if ((LPC_GPIO2 -> FIOPIN & PBINT) == 0) {             /* Check if PBINT is pressed */
00053     InReport = 0x01;
00054   } else {
00055     InReport = 0x00;
00056   }
00057 }
00058
00059
00060 /*
00061  *  Set HID Output Report <- OutReport
00062  */
00063
00064 void SetOutReport (void) {
00065         //Because 8 LEDs are not ordered, so we have check each bit
00066         //of OurReport to turn on/off LED correctly
00067         uint8_t led_num;
00068         LPC_GPIO2 -> FIOCLR = LEDMSK;
00069         LPC_GPIO1 -> FIOCLR = 0xF0000000;
00070         //LED0 (P2.6)
00071         led_num = OutReport & (1<<0);
00072         if(led_num == 0)
00073                 LPC_GPIO2 -> FIOCLR |= (1<<6);
00074         else
00075                 LPC_GPIO2 -> FIOSET |= (1<<6);
00076         //LED1 (P2.5)
00077         led_num = OutReport & (1<<1);
00078         if(led_num == 0)
00079                 LPC_GPIO2 -> FIOCLR |= (1<<5);
00080         else
00081                 LPC_GPIO2 -> FIOSET |= (1<<5);
00082         //LED2 (P2.4)
00083         led_num = OutReport & (1<<2);
00084         if(led_num == 0)
00085                 LPC_GPIO2 -> FIOCLR |= (1<<4);
00086         else
00087                 LPC_GPIO2 -> FIOSET |= (1<<4);
00088         //LED3 (P2.3)
00089         led_num = OutReport & (1<<3);
00090         if(led_num == 0)
00091                 LPC_GPIO2 -> FIOCLR |= (1<<3);
00092         else
00093                 LPC_GPIO2 -> FIOSET |= (1<<3);
00094         //LED4 (P2.2)
00095         led_num = OutReport & (1<<4);
00096         if(led_num == 0)
00097                 LPC_GPIO2 -> FIOCLR |= (1<<2);
00098         else
00099                 LPC_GPIO2 -> FIOSET |= (1<<2);
00100         //LED5 (P1.31)
00101         led_num = OutReport & (1<<5);
00102         if(led_num == 0)
00103                 LPC_GPIO1 -> FIOCLR |= (0x80000000);
00104         else
00105                 LPC_GPIO1 -> FIOSET |= (0x80000000);
00106         //LED6 (P1.29)
00107         led_num = OutReport & (1<<6);
00108         if(led_num == 0)
00109                 LPC_GPIO1 -> FIOCLR |= (1<<29);
00110         else
00111                 LPC_GPIO1 -> FIOSET |= (1<<29);
00112         //LED7 (P1.28)
00113         led_num = OutReport & (1<<7);
00114         if(led_num == 0)
00115                 LPC_GPIO1 -> FIOCLR |= (1<<28);
00116         else
00117                 LPC_GPIO1 -> FIOSET |= (1<<28);
00118 }
00119
00120
00121 /* Main Program */
00122
00123 int main (void) {
00124         LPC_GPIO2 -> FIODIR = LEDMSK;             /* LEDs, port 2, bit 0~7 output only */
00125         LPC_GPIO1 -> FIODIR = 0xF0000000;                               /* LEDs, port 1, bit 28-31 output */
00126
00127         USB_Init();                               /* USB Initialization */
00128         USB_Connect(TRUE);                        /* USB Connect */
00129
00130         while (1);                                /* Loop forever */
00131 }
00132
00133 #ifdef  DEBUG
00134 /*******************************************************************************
00135 * @brief                Reports the name of the source file and the source line number
00136 *                               where the CHECK_PARAM error has occurred.
00137 * @param[in]    file Pointer to the source file name
00138 * @param[in]    line assert_param error line source number
00139 * @return               None
00140 *******************************************************************************/
00141 void check_failed(uint8_t *file, uint32_t line)
00142 {
00143         /* User can add his own implementation to report the file name and line number,
00144          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00145
00146         /* Infinite loop */
00147         while(1);
00148 }
00149 #endif
00150
00151 /*
00152  * @}
00153  */
00154
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/demo.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/demo.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      Name:    DEMO.H
00003  *      Purpose: USB HID Demo Definitions
00004  *      Version: V1.10
00005  *----------------------------------------------------------------------------
00006  *      This software is supplied "AS IS" without any warranties, express,
00007  *      implied or statutory, including but not limited to the implied
00008  *      warranties of fitness for purpose, satisfactory quality and
00009  *      noninfringement. Keil extends you a royalty-free right to reproduce
00010  *      and distribute executable files created using this software for use
00011  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00012  *      else gives you the right to use this software.
00013  *
00014  *      Copyright (c) 2005-2009 Keil Software.
00015  *---------------------------------------------------------------------------*/
00016
00017 /* Push Button Definitions */
00018 #define PBINT  0x00000400  /* P2.10 */
00019
00020 /* LED Definitions */
00021 #define LEDMSK 0x000000FF /* P2.0..7 */
00022
00023 /* HID Demo Variables */
00024 extern uint8_t InReport;
00025 extern uint8_t OutReport;
00026
00027 /* HID Demo Functions */
00028 extern void GetInReport  (void);
00029 extern void SetOutReport (void);
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.c
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2005, Swedish Institute of Computer Science
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * @(#)$Id: dhcpc.c,v 1.2 2006/06/11 21:46:37 adam Exp $
00032  */
00033
00034 #include <stdio.h>
00035 #include <string.h>
00036
00037 #include "uip.h"
00038 #include "dhcpc.h"
00039 #include "timer.h"
00040 #include "pt.h"
00041
00042 #define STATE_INITIAL         0
00043 #define STATE_SENDING         1
00044 #define STATE_OFFER_RECEIVED  2
00045 #define STATE_CONFIG_RECEIVED 3
00046
00047 static struct dhcpc_state s;
00048
00049 struct dhcp_msg {
00050   u8_t op, htype, hlen, hops;
00051   u8_t xid[4];
00052   u16_t secs, flags;
00053   u8_t ciaddr[4];
00054   u8_t yiaddr[4];
00055   u8_t siaddr[4];
00056   u8_t giaddr[4];
00057   u8_t chaddr[16];
00058 #ifndef UIP_CONF_DHCP_LIGHT
00059   u8_t sname[64];
00060   u8_t file[128];
00061 #endif
00062   u8_t options[312];
00063 };
00064
00065 #define BOOTP_BROADCAST 0x8000
00066
00067 #define DHCP_REQUEST        1
00068 #define DHCP_REPLY          2
00069 #define DHCP_HTYPE_ETHERNET 1
00070 #define DHCP_HLEN_ETHERNET  6
00071 #define DHCP_MSG_LEN      236
00072
00073 #define DHCPC_SERVER_PORT  67
00074 #define DHCPC_CLIENT_PORT  68
00075
00076 #define DHCPDISCOVER  1
00077 #define DHCPOFFER     2
00078 #define DHCPREQUEST   3
00079 #define DHCPDECLINE   4
00080 #define DHCPACK       5
00081 #define DHCPNAK       6
00082 #define DHCPRELEASE   7
00083
00084 #define DHCP_OPTION_SUBNET_MASK   1
00085 #define DHCP_OPTION_ROUTER        3
00086 #define DHCP_OPTION_DNS_SERVER    6
00087 #define DHCP_OPTION_REQ_IPADDR   50
00088 #define DHCP_OPTION_LEASE_TIME   51
00089 #define DHCP_OPTION_MSG_TYPE     53
00090 #define DHCP_OPTION_SERVER_ID    54
00091 #define DHCP_OPTION_REQ_LIST     55
00092 #define DHCP_OPTION_END         255
00093
00094 static const u8_t xid[4] = {0xad, 0xde, 0x12, 0x23};
00095 static const u8_t magic_cookie[4] = {99, 130, 83, 99};
00096 /*---------------------------------------------------------------------------*/
00097 static u8_t *
00098 add_msg_type(u8_t *optptr, u8_t type)
00099 {
00100   *optptr++ = DHCP_OPTION_MSG_TYPE;
00101   *optptr++ = 1;
00102   *optptr++ = type;
00103   return optptr;
00104 }
00105 /*---------------------------------------------------------------------------*/
00106 static u8_t *
00107 add_server_id(u8_t *optptr)
00108 {
00109   *optptr++ = DHCP_OPTION_SERVER_ID;
00110   *optptr++ = 4;
00111   memcpy(optptr, s.serverid, 4);
00112   return optptr + 4;
00113 }
00114 /*---------------------------------------------------------------------------*/
00115 static u8_t *
00116 add_req_ipaddr(u8_t *optptr)
00117 {
00118   *optptr++ = DHCP_OPTION_REQ_IPADDR;
00119   *optptr++ = 4;
00120   memcpy(optptr, s.ipaddr, 4);
00121   return optptr + 4;
00122 }
00123 /*---------------------------------------------------------------------------*/
00124 static u8_t *
00125 add_req_options(u8_t *optptr)
00126 {
00127   *optptr++ = DHCP_OPTION_REQ_LIST;
00128   *optptr++ = 3;
00129   *optptr++ = DHCP_OPTION_SUBNET_MASK;
00130   *optptr++ = DHCP_OPTION_ROUTER;
00131   *optptr++ = DHCP_OPTION_DNS_SERVER;
00132   return optptr;
00133 }
00134 /*---------------------------------------------------------------------------*/
00135 static u8_t *
00136 add_end(u8_t *optptr)
00137 {
00138   *optptr++ = DHCP_OPTION_END;
00139   return optptr;
00140 }
00141 /*---------------------------------------------------------------------------*/
00142 static void
00143 create_msg(register struct dhcp_msg *m)
00144 {
00145   m->op = DHCP_REQUEST;
00146   m->htype = DHCP_HTYPE_ETHERNET;
00147   m->hlen = s.mac_len;
00148   m->hops = 0;
00149   memcpy(m->xid, xid, sizeof(m->xid));
00150   m->secs = 0;
00151   m->flags = HTONS(BOOTP_BROADCAST); /*  Broadcast bit. */
00152   /*  uip_ipaddr_copy(m->ciaddr, uip_hostaddr);*/
00153   memcpy(m->ciaddr, uip_hostaddr, sizeof(m->ciaddr));
00154   memset(m->yiaddr, 0, sizeof(m->yiaddr));
00155   memset(m->siaddr, 0, sizeof(m->siaddr));
00156   memset(m->giaddr, 0, sizeof(m->giaddr));
00157   memcpy(m->chaddr, s.mac_addr, s.mac_len);
00158   memset(&m->chaddr[s.mac_len], 0, sizeof(m->chaddr) - s.mac_len);
00159 #ifndef UIP_CONF_DHCP_LIGHT
00160   memset(m->sname, 0, sizeof(m->sname));
00161   memset(m->file, 0, sizeof(m->file));
00162 #endif
00163
00164   memcpy(m->options, magic_cookie, sizeof(magic_cookie));
00165 }
00166 /*---------------------------------------------------------------------------*/
00167 static void
00168 send_discover(void)
00169 {
00170   u8_t *end;
00171   struct dhcp_msg *m = (struct dhcp_msg *)uip_appdata;
00172
00173   create_msg(m);
00174
00175   end = add_msg_type(&m->options[4], DHCPDISCOVER);
00176   end = add_req_options(end);
00177   end = add_end(end);
00178
00179   uip_send(uip_appdata, end - (u8_t *)uip_appdata);
00180 }
00181 /*---------------------------------------------------------------------------*/
00182 static void
00183 send_request(void)
00184 {
00185   u8_t *end;
00186   struct dhcp_msg *m = (struct dhcp_msg *)uip_appdata;
00187
00188   create_msg(m);
00189
00190   end = add_msg_type(&m->options[4], DHCPREQUEST);
00191   end = add_server_id(end);
00192   end = add_req_ipaddr(end);
00193   end = add_end(end);
00194
00195   uip_send(uip_appdata, end - (u8_t *)uip_appdata);
00196 }
00197 /*---------------------------------------------------------------------------*/
00198 static u8_t
00199 parse_options(u8_t *optptr, int len)
00200 {
00201   u8_t *end = optptr + len;
00202   u8_t type = 0;
00203
00204   while(optptr < end) {
00205     switch(*optptr) {
00206     case DHCP_OPTION_SUBNET_MASK:
00207       memcpy(s.netmask, optptr + 2, 4);
00208       break;
00209     case DHCP_OPTION_ROUTER:
00210       memcpy(s.default_router, optptr + 2, 4);
00211       break;
00212     case DHCP_OPTION_DNS_SERVER:
00213       memcpy(s.dnsaddr, optptr + 2, 4);
00214       break;
00215     case DHCP_OPTION_MSG_TYPE:
00216       type = *(optptr + 2);
00217       break;
00218     case DHCP_OPTION_SERVER_ID:
00219       memcpy(s.serverid, optptr + 2, 4);
00220       break;
00221     case DHCP_OPTION_LEASE_TIME:
00222       memcpy(s.lease_time, optptr + 2, 4);
00223       break;
00224     case DHCP_OPTION_END:
00225       return type;
00226     }
00227
00228     optptr += optptr[1] + 2;
00229   }
00230   return type;
00231 }
00232 /*---------------------------------------------------------------------------*/
00233 static u8_t
00234 parse_msg(void)
00235 {
00236   struct dhcp_msg *m = (struct dhcp_msg *)uip_appdata;
00237
00238   if(m->op == DHCP_REPLY &&
00239      memcmp(m->xid, xid, sizeof(xid)) == 0 &&
00240      memcmp(m->chaddr, s.mac_addr, s.mac_len) == 0) {
00241     memcpy(s.ipaddr, m->yiaddr, 4);
00242     return parse_options(&m->options[4], uip_datalen());
00243   }
00244   return 0;
00245 }
00246 /*---------------------------------------------------------------------------*/
00247 static
00248 PT_THREAD(handle_dhcp(void))
00249 {
00250   PT_BEGIN(&s.pt);
00251
00252   /* try_again:*/
00253   s.state = STATE_SENDING;
00254   s.ticks = CLOCK_SECOND;
00255
00256   do {
00257     send_discover();
00258     timer_set(&s.timer, s.ticks);
00259     PT_WAIT_UNTIL(&s.pt, uip_newdata() || timer_expired(&s.timer));
00260
00261     if(uip_newdata() && parse_msg() == DHCPOFFER) {
00262       s.state = STATE_OFFER_RECEIVED;
00263       break;
00264     }
00265
00266     if(s.ticks < CLOCK_SECOND * 60) {
00267       s.ticks *= 2;
00268     }
00269   } while(s.state != STATE_OFFER_RECEIVED);
00270
00271   s.ticks = CLOCK_SECOND;
00272
00273   do {
00274     send_request();
00275     timer_set(&s.timer, s.ticks);
00276     PT_WAIT_UNTIL(&s.pt, uip_newdata() || timer_expired(&s.timer));
00277
00278     if(uip_newdata() && parse_msg() == DHCPACK) {
00279       s.state = STATE_CONFIG_RECEIVED;
00280       break;
00281     }
00282
00283     if(s.ticks <= CLOCK_SECOND * 10) {
00284       s.ticks += CLOCK_SECOND;
00285     } else {
00286       PT_RESTART(&s.pt);
00287     }
00288   } while(s.state != STATE_CONFIG_RECEIVED);
00289
00290 #if 0
00291   printf("Got IP address %d.%d.%d.%d\n",
00292          uip_ipaddr1(s.ipaddr), uip_ipaddr2(s.ipaddr),
00293          uip_ipaddr3(s.ipaddr), uip_ipaddr4(s.ipaddr));
00294   printf("Got netmask %d.%d.%d.%d\n",
00295          uip_ipaddr1(s.netmask), uip_ipaddr2(s.netmask),
00296          uip_ipaddr3(s.netmask), uip_ipaddr4(s.netmask));
00297   printf("Got DNS server %d.%d.%d.%d\n",
00298          uip_ipaddr1(s.dnsaddr), uip_ipaddr2(s.dnsaddr),
00299          uip_ipaddr3(s.dnsaddr), uip_ipaddr4(s.dnsaddr));
00300   printf("Got default router %d.%d.%d.%d\n",
00301          uip_ipaddr1(s.default_router), uip_ipaddr2(s.default_router),
00302          uip_ipaddr3(s.default_router), uip_ipaddr4(s.default_router));
00303   printf("Lease expires in %ld seconds\n",
00304          ntohs(s.lease_time[0])*65536ul + ntohs(s.lease_time[1]));
00305 #endif
00306
00307   dhcpc_configured(&s);
00308
00309   /*  timer_stop(&s.timer);*/
00310
00311   /*
00312    * PT_END restarts the thread so we do this instead. Eventually we
00313    * should reacquire expired leases here.
00314    */
00315   while(1) {
00316     PT_YIELD(&s.pt);
00317   }
00318
00319   PT_END(&s.pt);
00320 }
00321 /*---------------------------------------------------------------------------*/
00322 void
00323 dhcpc_init(const void *mac_addr, int mac_len)
00324 {
00325   uip_ipaddr_t addr;
00326
00327   s.mac_addr = mac_addr;
00328   s.mac_len  = mac_len;
00329
00330   s.state = STATE_INITIAL;
00331   uip_ipaddr(addr, 255,255,255,255);
00332   s.conn = uip_udp_new(&addr, HTONS(DHCPC_SERVER_PORT));
00333   if(s.conn != NULL) {
00334     uip_udp_bind(s.conn, HTONS(DHCPC_CLIENT_PORT));
00335   }
00336   PT_INIT(&s.pt);
00337 }
00338 /*---------------------------------------------------------------------------*/
00339 void
00340 dhcpc_appcall(void)
00341 {
00342   handle_dhcp();
00343 }
00344 /*---------------------------------------------------------------------------*/
00345 void
00346 dhcpc_request(void)
00347 {
00348   u16_t ipaddr[2];
00349
00350   if(s.state == STATE_INITIAL) {
00351     uip_ipaddr(ipaddr, 0,0,0,0);
00352     uip_sethostaddr(ipaddr);
00353     /*    handle_dhcp(PROCESS_EVENT_NONE, NULL);*/
00354   }
00355 }
00356 /*---------------------------------------------------------------------------*/
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/dhcpc/dhcpc.h
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2005, Swedish Institute of Computer Science
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * @(#)$Id: dhcpc.h,v 1.3 2006/06/11 21:46:37 adam Exp $
00032  */
00033 #ifndef __DHCPC_H__
00034 #define __DHCPC_H__
00035
00036 #include "timer.h"
00037 #include "pt.h"
00038
00039 struct dhcpc_state {
00040   struct pt pt;
00041   char state;
00042   struct uip_udp_conn *conn;
00043   struct timer timer;
00044   u16_t ticks;
00045   const void *mac_addr;
00046   int mac_len;
00047
00048   u8_t serverid[4];
00049
00050   u16_t lease_time[2];
00051   u16_t ipaddr[2];
00052   u16_t netmask[2];
00053   u16_t dnsaddr[2];
00054   u16_t default_router[2];
00055 };
00056
00057 void dhcpc_init(const void *mac_addr, int mac_len);
00058 void dhcpc_request(void);
00059
00060 void dhcpc_appcall(void);
00061
00062 void dhcpc_configured(const struct dhcpc_state *s);
00063
00064 typedef struct dhcpc_state uip_udp_appstate_t;
00065 #define UIP_UDP_APPCALL dhcpc_appcall
00066
00067
00068 #endif /* __DHCPC_H__ */
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.c
Go to the documentation of this file.
00001 /*************************************************************************
00002  *
00003  *
00004  *    (c) Copyright IAR Systems 2006
00005  *
00006  *    File name   : drv_glcd.c
00007  *    Description : Graphic LCD driver
00008  *
00009  *    History :
00010  *    1. Date        : December 2, 2006
00011  *       Author      : Stanimir Bonev
00012  *       Description : Create
00013  *
00014  *    $Revision: 28532 $
00015  **************************************************************************/
00016 #include "drv_glcd.h"
00017 #include "lpc_types.h"
00018 #include "stdarg.h"
00019 #include <assert.h>
00020 #include "glcd_ll.h"
00021
00022 /* delay definition */
00023 #define GLCD_DLY_10US                        80     // 10us
00024 #define GLCD_RESET_DLY                       50     // 5ms
00025 #define GLCD_BOOSTER_ON_DLY                1200     // 120 ms
00026
00027 static const GLCD_CmdCtrl_t GLCD_Cmd_Iss0[GLCD_CMD_NUMB] =
00028 {
00029 // (ISS=0)
00030 // NOP - No Operation
00031   {0x00, GLCD_WRITE, FALSE, 0},
00032 // SLPIN - Sleep in & booster off
00033   {0x10, GLCD_WRITE, FALSE, 0},
00034 // SLPOUT - Sleep out & booster on
00035   {0x11, GLCD_WRITE, FALSE, 0},
00036 // PTLOUT (NORON) - Partial off (Normal)
00037   {0x13, GLCD_WRITE, FALSE, 0},
00038 // INVOFF - Display inversion off (normal)
00039   {0x20, GLCD_WRITE, FALSE, 0},
00040 // INVON - Display inversion on
00041   {0x21, GLCD_WRITE, FALSE, 0},
00042 // DISPOFF - Display off
00043   {0x28, GLCD_WRITE, FALSE, 0},
00044 // DISPON - Display on
00045   {0x29, GLCD_WRITE, FALSE, 0},
00046 // CASET - Column address set
00047 // X_ADR start: 0h <= XS <= 83h
00048 // X_ADR end: 0h <= XS <= 83h
00049   {0x2A, GLCD_WRITE, FALSE, 2},
00050 // RASET - Row address set
00051 // Y_ADR start: 0h <= YS <= 83h
00052 // Y_ADR end: 0h <= YS <= 83h
00053   {0x2B, GLCD_WRITE, FALSE, 2},
00054 // RAMWR - Memory write
00055   {0x2C, GLCD_WRITE, FALSE, (uint32_t)-1},
00056 // RGBSET - Color set for 256 color display
00057   {0x2D, GLCD_WRITE, FALSE, 20},
00058 // VSCSAD - Scroll start address of RAM
00059 // SSA = 0, 1, 2, … , 131
00060   {0x37, GLCD_WRITE, FALSE, 1},
00061 // IDMOFF - Idle mode off
00062   {0x38, GLCD_WRITE, FALSE, 0},
00063 // IDMON - Idle mode on
00064   {0x39, GLCD_WRITE, FALSE, 0},
00065 // RDID1 - Interface pixel format
00066   {0xDA, GLCD_READ,  FALSE, 1},
00067 // RDID2 - Interface pixel format
00068   {0xDB, GLCD_READ,  FALSE, 1},
00069 // RDID3 - Interface pixel format
00070   {0xDC, GLCD_READ,  FALSE, 1},
00071 // FRMSEL - External oscillator select
00072 // Frame frequency in Temp range A
00073 // Frame frequency in Temp range B
00074 // Frame frequency in Temp range C
00075 // Frame frequency in Temp range D
00076   {0xB4, GLCD_WRITE, FALSE, 4},
00077 // FRM8SEL - External oscillator select
00078 // Frame frequency in Temp range A
00079 // Frame frequency in Temp range B
00080 // Frame frequency in Temp range C
00081 // Frame frequency in Temp range D
00082   {0xB5, GLCD_WRITE, FALSE, 4},
00083 // TMPRNG - External oscillator select
00084 // Temp range A
00085 // Temp range B
00086 // Temp range C
00087 // Temp range D
00088   {0xB6, GLCD_WRITE, FALSE, 4},
00089 // TMPHIS - Temp range set
00090   {0xB8, GLCD_WRITE, FALSE, 1},
00091 // TMPREAD - Temperature read back
00092   {0xB7, GLCD_READ,  FALSE, 1},
00093 // EPWRIN - EEPROM write start
00094   {0xD1, GLCD_WRITE, FALSE, 0},
00095 // EPWROUT - EEPROM write end
00096   {0xD0, GLCD_WRITE, FALSE, 0},
00097 // RDEV - Read internal contrast (EV_IN)
00098   {0xD4, GLCD_WRITE, FALSE, 1},
00099 // RDRR - Read internal resistor ratio (RR_IN)
00100   {0xD5, GLCD_READ,  FALSE, 1},
00101 // Adapted commands
00102 // PTIN - adapted command (PTLAR + PTIN)
00103   {0x00, GLCD_WRITE, FALSE, 0},
00104 // SCRLAR - Scroll area set (2-line unit)
00105 // TFA = 0,1,2, … , 132
00106 // VSA = 0,1,2, … , 132
00107 // BFA = 0,1,2, … , 132
00108   {0x33, GLCD_WRITE, FALSE, 3},
00109 // DATCTR - adapted command (MADCTR + COLMOD)
00110   {0x00, GLCD_WRITE, FALSE, 0},
00111 // SETCON - Write contrast 0 - 127
00112   {0x25, GLCD_WRITE, FALSE, 1},
00113 // Commands applicable only when ISS=1
00114 // OSCON
00115   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00116 // OSCOFF
00117   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00118 // RMWIN
00119   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00120 // RMWOUT
00121   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00122 // VOLUP
00123   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00124 // VOLDOWN
00125   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00126 // ASCSET
00127   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00128 // DISCTR
00129   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00130 // PWRCTR
00131   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00132 // VOLCTR
00133   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00134 // Commands applicable only when ISS=0
00135 // CLKINT - Internal oscillator select
00136   {0xB0, GLCD_WRITE, FALSE, 0},
00137 // CLKEXT - External oscillator select
00138   {0xB1, GLCD_WRITE, FALSE, 0},
00139 // RDDST - Read Display Status
00140   {0x09, GLCD_READ,  TRUE, 4},
00141 // SWRESET - Software reset
00142   {0x01, GLCD_WRITE, FALSE, 0},
00143 // RDDID - Read Display ID
00144   {0x04, GLCD_READ,  TRUE, 3},
00145 // PTLAR - Partial start/end address set
00146 // Start address (0,1,2, …, 131)
00147 // End address (0,1,2, …, 131)
00148   {0x30, GLCD_WRITE, FALSE, 2},
00149 // PTLON - Partial mode on
00150   {0x12, GLCD_WRITE, FALSE, 0},
00151 // MADCTR - Tearing effect mode set & on
00152   {0x36, GLCD_WRITE, FALSE, 1},
00153 // COLMOD - Interface pixel format
00154 // Interface format
00155   {0x3A, GLCD_WRITE, FALSE, 1},
00156 // APOFF - All pixel off (only for test purpose)
00157   {0x22, GLCD_WRITE, FALSE, 0},
00158 // APON - All pixel on (only for test purpose)
00159   {0x23, GLCD_WRITE, FALSE, 0},
00160 // BSTROFF - Booster off (only for test purpose)
00161   {0x02, GLCD_WRITE, FALSE, 0},
00162 // BSTRON - Booster on (only for test purpose)
00163   {0x03, GLCD_WRITE, FALSE, 0},
00164 };
00165
00166 static const GLCD_CmdCtrl_t GLCD_Cmd_Iss1[GLCD_CMD_NUMB] =
00167 {
00168 // (ISS=1)
00169 // NOP - No Operation
00170   {0x25, GLCD_WRITE, FALSE, 0},
00171 // SLPIN - Sleep in & booster off
00172   {0x95, GLCD_WRITE, FALSE, 0},
00173 // SLPOUT - Sleep out & booster on
00174   {0x94, GLCD_WRITE, FALSE, 0},
00175 // PTLOUT (NORON) - Partial off (Normal)
00176   {0xA9, GLCD_WRITE, FALSE, 0},
00177 // INVOFF - Display inversion off (normal)
00178   {0xA6, GLCD_WRITE, FALSE, 0},
00179 // INVON - Display inversion on
00180   {0xA7, GLCD_WRITE, FALSE, 0},
00181 // DISPOFF - Display off
00182   {0xAE, GLCD_WRITE, FALSE, 0},
00183 // DISPON - Display on
00184   {0xAF, GLCD_WRITE, FALSE, 0},
00185 // CASET - Column address set
00186 // X_ADR start: 0h <= XS <= 83h
00187 // X_ADR end: 0h <= XS <= 83h
00188   {0x15, GLCD_WRITE, FALSE, 2},
00189 // RASET - Row address set
00190 // Y_ADR start: 0h <= YS <= 83h
00191 // Y_ADR end: 0h <= YS <= 83h
00192   {0x75, GLCD_WRITE, FALSE, 2},
00193 // RAMWR - Memory write
00194   {0x5C, GLCD_WRITE, FALSE, (uint32_t)-1},
00195 // RGBSET - Color set for 256 color display
00196   {0xCE, GLCD_WRITE, FALSE, 20},
00197 // VSCSAD - Scroll start address of RAM
00198 // SSA = 0, 1, 2, … , 131
00199   {0xAB, GLCD_WRITE, FALSE, 1},
00200 // IDMOFF - Idle mode off
00201   {0x38, GLCD_WRITE, FALSE, 0},
00202 // IDMON - Idle mode on
00203   {0x39, GLCD_WRITE, FALSE, 0},
00204 // RDID1 - Interface pixel format
00205   {0xDA, GLCD_READ,  FALSE, 1},
00206 // RDID2 - Interface pixel format
00207   {0xDB, GLCD_READ,  FALSE, 1},
00208 // RDID3 - Interface pixel format
00209   {0xDC, GLCD_READ,  FALSE, 1},
00210 // FRMSEL - External oscillator select
00211 // Frame frequency in Temp range A
00212 // Frame frequency in Temp range B
00213 // Frame frequency in Temp range C
00214 // Frame frequency in Temp range D
00215   {0xB4, GLCD_WRITE, FALSE, 4},
00216 // FRM8SEL - External oscillator select
00217 // Frame frequency in Temp range A
00218 // Frame frequency in Temp range B
00219 // Frame frequency in Temp range C
00220 // Frame frequency in Temp range D
00221   {0xB5, GLCD_WRITE, FALSE, 4},
00222 // TMPRNG - External oscillator select
00223 // Temp range A
00224 // Temp range B
00225 // Temp range C
00226 // Temp range D
00227   {0xB6, GLCD_WRITE, FALSE, 4},
00228 // TMPHIS - Temp hysteresis range set
00229   {0xB8, GLCD_WRITE, FALSE, 1},
00230 // TMPREAD - Temperature read back
00231   {0xB7, GLCD_READ,  FALSE, 1},
00232 // EPWRIN - EEPROM write start
00233   {0xCD, GLCD_WRITE, FALSE, 0},
00234 // EPWROUT - EEPROM write end
00235   {0xCC, GLCD_WRITE, FALSE, 0},
00236 // RDEV - Read internal contrast (EV_IN)
00237   {0x7C, GLCD_WRITE, FALSE, 1},
00238 // RDRR - Read internal resistor ratio (RR_IN)
00239   {0x7D, GLCD_READ,  FALSE, 1},
00240 // Adapted commands
00241 // PTIN - Partial area set & on
00242 // Partial start line address
00243 // PSL7-0 Partial start line address
00244 // PEL7-0 Partial end line address
00245   {0xA8, GLCD_WRITE, FALSE, 2},
00246 // SCRLAR(ASCSET) - Scroll area set (2-line unit) Mode-0
00247 // SSL7-0 - Scroll start line
00248 // SEL7-0 - Scroll end line
00249 // SFL7-0 - Scroll specified line
00250 // SMD2-0 - Area scroll mode
00251   {0xAA, GLCD_WRITE, FALSE, 4},
00252 // DATCTR - adapted command (MADCTR + COLMOD)
00253 // MV MX MY                     - Row/column address control
00254 // MRGB                                 - RGB
00255 // GS2 GS1 GS0  - Gray-scale setup
00256   {0xBC, GLCD_WRITE, FALSE, 3},
00257 // SETCON - Write contrast 0 - 127
00258   {0x00, GLCD_WRITE, FALSE, 1},
00259 // Commands applicable only when ISS=1
00260 // OSCON - Oscillator on
00261   {0xD1, GLCD_WRITE, FALSE, 0},
00262 // OSCOFF - Oscillator off
00263   {0xD2, GLCD_WRITE, FALSE, 0},
00264 // RMWIN - Read & modify write on
00265   {0xE0, GLCD_WRITE, FALSE, 0},
00266 // RMWOUT - Read & modify write off
00267   {0xEE, GLCD_WRITE, FALSE, 0},
00268 // VOLUP - EV increment
00269   {0xD6, GLCD_WRITE, FALSE, 0},
00270 // VOLDOWN - EV decrement
00271   {0xD7, GLCD_WRITE, FALSE, 0},
00272 // ASCSET - Scroll area set
00273 // SSL7-0 - Scroll start line
00274 // SEL7-0 - Scroll end line
00275 // SFL7-0 - Scroll specified line
00276 // SMD1-0 - Area scroll mode
00277   {0xAA, GLCD_WRITE, FALSE, 4},
00278 // DISCTR - Display control
00279 // P1
00280 // P2
00281 // P3
00282   {0xCA, GLCD_WRITE, FALSE, 3},
00283 // PWRCTR - Power control set
00284 // P13-P10
00285   {0x20, GLCD_WRITE, FALSE, 1},
00286 // VOLCTR
00287   {0x81, GLCD_WRITE, FALSE, 2},
00288 // Commands applicable only when ISS=0
00289 // CLKINT - Internal oscillator select
00290   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00291 // CLKEXT - External oscillator select
00292   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00293 // RDDST - Read Display Status
00294   {GLCD_INV_CMD, GLCD_READ,  FALSE, 0},
00295 // SWRESET - Software reset
00296   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00297 // RDDID - Read Display ID
00298   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00299 // PTLAR - Partial start/end address set
00300 // Start address (0,1,2, …, 131)
00301 // End address (0,1,2, …, 131)
00302   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00303 // PTLON - Partial mode on
00304   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00305 // MADCTR - Tearing effect mode set & on
00306   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00307 // COLMOD - Interface pixel format
00308 // Interface format
00309   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00310 // APOFF - All pixel off (only for test purpose)
00311   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00312 // APON - All pixel on (only for test purpose)
00313   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00314 // BSTROFF - Booster off (only for test purpose)
00315   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00316 // BSTRON - Booster on (only for test purpose)
00317   {GLCD_INV_CMD, GLCD_WRITE, FALSE, 0},
00318 };
00319
00320 static GLCD_ISS_t Glcd_Iss;
00321 static Bool OddPixel = FALSE;
00322 static uint32_t PixelHold = 0;
00323
00324
00325 static pFontType_t pCurrFont = NULL;
00326 static LdcPixel_t TextColour;
00327 static LdcPixel_t TextBackgndColour;
00328
00329 static uint32_t TextX_Pos = 0;
00330 static uint32_t TextY_Pos = 0;
00331
00332 static uint32_t XL_Win = DEF_X_LEFT;
00333 static uint32_t YU_Win = DEF_Y_UP;
00334 static uint32_t XR_Win = DEF_X_RIGHT;
00335 static uint32_t YD_Win = DEF_Y_DOWN;
00336
00337 static uint32_t TabSize = TEXT_DEF_TAB_SIZE;
00338
00339 /*************************************************************************
00340  * Function Name: GLCD_SendCmd
00341  * Parameters: GLCD_SendCmd Cmd, unsigned char *pData, uint32_t Size
00342  * Return: GLCD_Status_t
00343  *
00344  * Description: Send command to the Graphic LCD
00345  *
00346  *************************************************************************/
00347 GLCD_Status_t GLCD_SendCmd (GLCD_Cmd_t Cmd, unsigned char *pData, uint32_t Size)
00348 {
00349         static Bool Write2_DRAM = FALSE; // write to DRAM mode
00350         static uint32_t ResRatio;             // Hold resistor ratio init by VOLCTR
00351                                     // and used by SETCON adapted command
00352         pDATCTR_Data_t pDATCTR_Data;
00353         uint8_t ColourSch;
00354         pASCSET_Data_t pASCSET_Data;
00355         MADCTR_Data_t DataMode = {0};
00356         // Pointer to current set of commands
00357         pGLCD_CmdCtrl_t pGLCD_CmdCtrl = (pGLCD_CmdCtrl_t)(((Glcd_Iss==GLCD_ISS_0)?
00358                                                                         GLCD_Cmd_Iss0:GLCD_Cmd_Iss1) + Cmd);
00359
00360         uint32_t Contrast;
00361
00362         if(Write2_DRAM)
00363         {
00364                 // Select LCD
00365                 GLCD_SPI_ChipSelect(TRUE);
00366                 if(Cmd != RAMWR)
00367                 {
00368                         Write2_DRAM = FALSE;
00369                         if(PixelHold & WAITED_PIXEL)
00370                         {
00371                                 // Flush pixel
00372                                 GLCD_SPI_TranserByte(PixelHold);
00373                         }
00374                         // Release CS
00375                         GLCD_SPI_ChipSelect(FALSE);
00376                 }
00377                 else
00378                 {
00379                         // pixels collection
00380                         uint32_t Pixel;
00381                         while(Size > 1)
00382                         {
00383                                 Pixel  =  *pData++;
00384                                 Pixel |= (*pData++)<<8;
00385                                 PixelHold |= WAITED_PIXEL;
00386                                 if(!OddPixel)
00387                                 {
00388                                         // Get even pixel
00389                                         PixelHold |= PIXEL_CONV(Pixel,0);
00390                                 }
00391                                 else
00392                                 {
00393                                         // Apply odd pixel
00394                                         PixelHold |= PIXEL_CONV(Pixel,1);
00395                                         // and send together both pixels
00396                                         GLCD_SPI_SendBlock((unsigned char *)&PixelHold,3);
00397                                         PixelHold = 0;
00398                                 }
00399                                 // update the even/odd flag
00400                                 OddPixel ^= 1;
00401                                 // update the counter of the remaining bytes
00402                                 Size -= 2;
00403                         }
00404                         // Release CS
00405                         GLCD_SPI_ChipSelect(FALSE);
00406                         return(GLCD_OK);
00407                 }
00408         }
00409
00410         // sanitary check of command
00411         if(pGLCD_CmdCtrl->Cmd == GLCD_INV_CMD)
00412         {
00413                 return(GLCD_UNSUPPORTED);
00414         }
00415
00416         // Implement adapted commands
00417         if(Glcd_Iss==GLCD_ISS_0)
00418         {
00419                 switch(Cmd)
00420                 {
00421                 case PTIN:
00422                         // PTLAR + PTIN
00423                         GLCD_SendCmd(PTLAR,pData,0);
00424                         GLCD_SendCmd(PTLON,NULL,0);
00425                         return(GLCD_OK);
00426                 case DATCTR:
00427                         pDATCTR_Data = (pDATCTR_Data_t)pData;
00428                                 // MADCTR + COLMOD
00429                                 // Data reconstruction
00430                         DataMode.MY = pDATCTR_Data->MY;
00431                         DataMode.MX = pDATCTR_Data->MX;
00432                         DataMode.MV = pDATCTR_Data->MV;
00433                         DataMode.ML = pDATCTR_Data->ML;
00434                         DataMode.RGB = !pDATCTR_Data->RGB;
00435                         GLCD_SendCmd(MADCTR,(unsigned char*)&DataMode,0);
00436                         // 4K colors Type A
00437                         ColourSch = 3;
00438                         return(GLCD_SendCmd(COLMOD,&ColourSch,0));
00439                 }
00440         }
00441         else
00442         {
00443                 switch(Cmd)
00444                 {
00445                 case SCRLAR:
00446                         pASCSET_Data = (pASCSET_Data_t)pData;
00447                         pASCSET_Data->Smd = 0;  // Center screen scroll mode
00448                         GLCD_SendCmd(ASCSET,pData,0);
00449                         return(GLCD_OK);
00450                 case DATCTR:
00451                         pDATCTR_Data = (pDATCTR_Data_t)pData;
00452                         pDATCTR_Data->ML  = 0;
00453                         pDATCTR_Data->MX = !pDATCTR_Data->MX;
00454                         // 4K colors Type A
00455                         pDATCTR_Data->GS  = 2;
00456                         break;
00457                 case SETCON:
00458                         Contrast = *pData | (ResRatio << 8);
00459                         return(GLCD_SendCmd(VOLCTR,(unsigned char *)&Contrast,0));
00460                 case VOLCTR:
00461                         ResRatio = *(pData+1);
00462                         break;
00463                         }
00464                 }
00465
00466         if(pGLCD_CmdCtrl->Param != (uint32_t)-1)
00467         {
00468                 // Command with fixed size of parameters
00469                 Size = pGLCD_CmdCtrl->Param;
00470         }
00471
00472         // Select LCD
00473         GLCD_SPI_ChipSelect(TRUE);
00474
00475         GLCD_SPI_TranserByte(pGLCD_CmdCtrl->Cmd);
00476         if(Cmd == RAMWR)
00477         {
00478                 // enter in write to DRAM mode
00479                 OddPixel = FALSE;
00480                 PixelHold = 0;
00481                 Write2_DRAM = TRUE;
00482                 return(GLCD_SendCmd(RAMWR,pData,Size));
00483         }
00484
00485         // Send/Receive parameters
00486         if(pGLCD_CmdCtrl->Dir == GLCD_READ)
00487         {
00488                 if(pGLCD_CmdCtrl->Pulse)
00489                 {
00490                         if(Size)
00491                         {
00492                                 *pData++ = GLCD_SPI_TranserByte(0xFFFF);
00493                                 --Size;
00494                         }
00495                 }
00496                 GLCD_SPI_SetWordWidth(8);
00497         }
00498
00499         if(pGLCD_CmdCtrl->Dir == GLCD_READ)
00500         {
00501                 GLCD_SPI_ReceiveBlock(pData,Size);
00502         }
00503         else
00504         {
00505                 GLCD_SPI_SendBlock(pData,Size);
00506         }
00507
00508         // Release CS
00509         GLCD_SPI_ChipSelect(FALSE);
00510         if(pGLCD_CmdCtrl->Dir == GLCD_READ)
00511         {
00512                 GLCD_SPI_SetWordWidth(9);
00513         }
00514         return(GLCD_OK);
00515 }
00516
00517 /*************************************************************************
00518  * Function Name: GLCD_PowerUpInit
00519  * Parameters: unsigned char *pInitData
00520  * Return: GLCD_Status_t
00521  *         GLCD_OK - init pass
00522  *         GLCD_ID_ERROR - unsupported driver type
00523  * Description: Power-up initialization of Graphic LCD
00524  *
00525  *************************************************************************/
00526 //GLCD_Status_t GLCD_PowerUpInit (unsigned char *pInitData)
00527 GLCD_Status_t GLCD_PowerUpInit (unsigned char *pInitData)
00528 {
00529         uint32_t Data;
00530         volatile uint32_t i;
00531         pDATCTR_Data_t pDATCTR_Data;
00532         // Init SPI and IO
00533         // Init low level
00534         GLCD_SPI_Init(GLCD_DEF_CLOCK,GLCD_DEF_WIDTH);
00535         GLCD_LLInit();
00536
00537         // H/W Reset
00538         // Rest L > 10us H
00539         GLCD_SetReset(FALSE);
00540         for(i = GLCD_DLY_10US; i ; --i);
00541         GLCD_SetReset(TRUE);
00542
00543         // Wait 5 ms
00544         Dly100us((void *)GLCD_RESET_DLY);
00545         // Identify LCD and command interpreter
00546         Glcd_Iss = GLCD_ISS_0;
00547         GLCD_SendCmd(RDDID,(unsigned char *)&Data,0);
00548         if(((Data & 0xFF) != GLCD_MANF_ID) ||(((Data >> 16)& 0xFF) != GLCD_MOD_ID))
00549         {
00550                 // Iss = 1 don't support RDDID command
00551                 Glcd_Iss = GLCD_ISS_1;
00552         }
00553         // Power Supply Set
00554         if(Glcd_Iss == GLCD_ISS_1)
00555         {
00556                 // Support only 4K colors
00557                 assert(GLCD_DEF_DPL_ML == 0);
00558                 //  DISCTR (Display Control)
00559                 //       - F1/F2 switching period set
00560                 //       - Line inversion set
00561                 Data = 0 | (0x20UL << 8) | (0x11UL << 16);
00562                 GLCD_SendCmd(DISCTR,(unsigned char *)&Data,0);
00563                 //  OSCON (Oscillator ON)
00564                 GLCD_SendCmd(OSCON,NULL,0);
00565                 // Set contrast
00566                 Data = 0x20 | (0x0UL << 8);
00567                 GLCD_SendCmd(VOLCTR,(unsigned char *)&Data,0);
00568         }
00569         else
00570         {
00571                 // Set contrast
00572                 Data = 0x30;
00573                 GLCD_SendCmd(SETCON,(unsigned char *)&Data,0);
00574         }
00575         // SLPOUT (Sleep mode OFF & OSC/Booster On)
00576         GLCD_SendCmd(SLPOUT,NULL,0); // Sleep out
00577         if(Glcd_Iss == GLCD_ISS_0)
00578         {
00579                 GLCD_SendCmd(BSTRON,NULL,0); // Booster voltage on
00580         }
00581         // Display Environment Set
00582         // Display inversion setting
00583         GLCD_SendCmd(GLCD_DEF_DPL_INV?INVON:INVOFF,NULL,0);
00584         // Display color scheme setting
00585         GLCD_SendCmd(GLCD_DEF_DPL_8_COLOR?IDMON:IDMOFF,NULL,0);
00586         // Display partial setting
00587         if(GLCD_DEF_DPL_PARTIAL_MODE)
00588         {
00589                 GLCD_SendCmd(PTLOUT,NULL,0);
00590         }
00591         else
00592         {
00593 #if GLCD_DEF_DPL_PARTIAL_MODE > 0
00594 #error "PARTIAL_MODE not supported yet"
00595 #endif // GLCD_DEF_DPL_PARTIAL_MODE > 0
00596         }
00597         // Memory Data Access Control
00598         Data = 0;
00599         pDATCTR_Data = (pDATCTR_Data_t)&Data;
00600         pDATCTR_Data->RGB = GLCD_DEF_DPL_RGB_ORD;               // BGR / RGB order
00601         /* Because NXP_logo data was generated by reverse row direction so have to set MY = 1 */
00602         pDATCTR_Data->MY = 1;                                                   // no mirror Y
00603         pDATCTR_Data->MX = GLCD_DEF_DPL_MX;                     // no mirror X
00604         pDATCTR_Data->MV = GLCD_DEF_DPL_V;                              // vertical RAM write in Y/X direction
00605         pDATCTR_Data->ML = GLCD_DEF_DPL_ML;                     // line address order (bottom to top) / (top to bottom)
00606         // support only 4k type A colored scheme
00607         GLCD_SendCmd(DATCTR,(unsigned char *)&Data,0);
00608         // Display Data Write & Display On
00609         // COLUMN ADDRESS SET and PAGE ADDRESS SET
00610         Data = 0 | ((GLCD_HORIZONTAL_SIZE - 1)<<8);
00611         GLCD_SendCmd(RASET,(unsigned char *)&Data,0);
00612         GLCD_SendCmd(CASET,(unsigned char *)&Data,0);
00613
00614         // Init display memory
00615         if(pInitData == NULL)
00616         {
00617                 Data = DEF_BACKGND_COLOUR;
00618                 for(i = 0; i < (GLCD_HORIZONTAL_SIZE * GLCD_VERTICAL_SIZE); ++i)
00619     {
00620                         LCD_WRITE_PIXEL(Data);
00621     }
00622                 LCD_FLUSH_PIXELS();
00623         }
00624         else
00625         {
00626                 GLCD_SendCmd(RAMWR,pInitData,GLCD_HORIZONTAL_SIZE * GLCD_VERTICAL_SIZE * 2);
00627         }
00628         if(Glcd_Iss == GLCD_ISS_1)
00629         {
00630                 // PWRCTR
00631                 Data = 0x1F;
00632                 GLCD_SendCmd(PWRCTR,(unsigned char *)&Data,0);
00633         }
00634         // Memory Data Access Control
00635         /* Reset default control mode after drawing */
00636         pDATCTR_Data = (pDATCTR_Data_t)&Data;
00637         pDATCTR_Data->RGB = GLCD_DEF_DPL_RGB_ORD;               // BGR / RGB order
00638         pDATCTR_Data->MY = GLCD_DEF_DPL_MY;                     // no mirror Y
00639         pDATCTR_Data->MX = GLCD_DEF_DPL_MX;                     // no mirror X
00640         pDATCTR_Data->MV = GLCD_DEF_DPL_V;                              // vertical RAM write in Y/X direction
00641         pDATCTR_Data->ML = GLCD_DEF_DPL_ML;                     // line address order (bottom to top) / (top to bottom)
00642         // support only 4k type A colored scheme
00643         GLCD_SendCmd(DATCTR,(unsigned char *)&Data,0);
00644
00645         // Wait for more than 120ms after power control command
00646         Dly100us((void *)GLCD_BOOSTER_ON_DLY);
00647         GLCD_SendCmd(GLCD_DISPLAY_STATE?DISPON:DISPOFF,NULL,0);
00648         return(GLCD_OK);
00649 }
00650
00651 /*************************************************************************
00652  * Function Name: GLCD_SetFont
00653  * Parameters: pFontType_t pFont, LdcPixel_t Color
00654  *              LdcPixel_t BackgndColor
00655  *
00656  * Return: none
00657  *
00658  * Description: Set current font, font color and background color
00659  *
00660  *************************************************************************/
00661 void GLCD_SetFont(pFontType_t pFont, LdcPixel_t Color, LdcPixel_t BackgndColor)
00662 {
00663         pCurrFont = pFont;
00664         TextColour = Color;
00665         TextBackgndColour = BackgndColor;
00666 }
00667
00668 /*************************************************************************
00669  * Function Name: GLCD_SetWindow
00670  * Parameters: uint32_t X_Left, uint32_t Y_Up,
00671  *             uint32_t X_Right, uint32_t Y_Down
00672  *
00673  * Return: none
00674  *
00675  * Description: Set draw window XY coordinate in pixels
00676  *
00677  *************************************************************************/
00678 void GLCD_SetWindow(uint32_t X_Left, uint32_t Y_Up,
00679                     uint32_t X_Right, uint32_t Y_Down)
00680 {
00681         assert(X_Right < GLCD_HORIZONTAL_SIZE);
00682         assert(Y_Down < GLCD_VERTICAL_SIZE);
00683         assert(X_Left < X_Right);
00684         assert(Y_Up < Y_Down);
00685         XL_Win = X_Left;
00686         YU_Win = Y_Up;
00687         XR_Win = X_Right;
00688         YD_Win = Y_Down;
00689 }
00690
00691 /*************************************************************************
00692  * Function Name: GLCD_TextSetPos
00693  * Parameters: uint32_t X_UpLeft, uint32_t Y_UpLeft,
00694  *             uint32_t X_DownLeft, uint32_t Y_DownLeft
00695  *
00696  * Return: none
00697  *
00698  * Description: Set text X,Y coordinate in characters
00699  *
00700  *************************************************************************/
00701 void GLCD_TextSetPos(uint32_t X, uint32_t Y)
00702 {
00703         TextX_Pos = X;
00704         TextY_Pos = Y;
00705 }
00706
00707 /*************************************************************************
00708  * Function Name: GLCD_TextSetTabSize
00709  * Parameters: uint32_t Size
00710  *
00711  * Return: none
00712  *
00713  * Description: Set text tab size in characters
00714  *
00715  *************************************************************************/
00716 void GLCD_TextSetTabSize(uint32_t Size)
00717 {
00718         TabSize = Size;
00719 }
00720
00721 /*************************************************************************
00722  * Function Name: GLCD_TextCalcWindow
00723  * Parameters: pInt32U pXL, pInt32U pXR,
00724  *             pInt32U pYU, pInt32U pYD,
00725  *             pInt32U pH_Size, pInt32U pV_Size
00726  *
00727  * Return: Bool
00728  *          FALSE - out of window coordinate aren't valid
00729  *          TRUE  - the returned coordinate are valid
00730  *
00731  * Description: Calculate character window
00732  *
00733  *************************************************************************/
00734 static Bool GLCD_TextCalcWindow (unsigned int *pXL, unsigned int *pXR,
00735                              unsigned int *pYU, unsigned int *pYD,
00736                              unsigned int *pH_Size, unsigned int *pV_Size)
00737 {
00738         *pH_Size = pCurrFont->H_Size;
00739         *pV_Size = pCurrFont->V_Size;
00740         *pXL = XL_Win + (TextX_Pos*pCurrFont->H_Size);
00741         if(*pXL > XR_Win)
00742         {
00743                 return(FALSE);
00744         }
00745         *pYU = YU_Win + (TextY_Pos*pCurrFont->V_Size);
00746         if(*pYU > YD_Win)
00747         {
00748                 return(FALSE);
00749         }
00750
00751         *pXR   = XL_Win + ((TextX_Pos+1)*pCurrFont->H_Size) - 1;
00752         if(*pXR > XR_Win)
00753         {
00754                 *pH_Size -= *pXR - XR_Win;
00755                 *pXR = XR_Win;
00756         }
00757
00758         *pYD = YU_Win + ((TextY_Pos+1)*pCurrFont->V_Size) - 1;
00759         if(*pYD > YD_Win)
00760         {
00761                 *pV_Size -= *pYD - YD_Win;
00762                 *pYD = YD_Win;
00763         }
00764
00765         return(TRUE);
00766 }
00767
00768 /*************************************************************************
00769  * Function Name: GLCD_putchar
00770  * Parameters: int c
00771  *
00772  * Return: none
00773  *
00774  * Description: Put char function
00775  *
00776  *************************************************************************/
00777 int GLCD_putchar (int c)
00778 {
00779         unsigned char *pSrc;
00780         uint32_t H_Line, i, j, k;
00781         uint32_t xl,xr,yu,yd,Temp,V_Size, H_Size, SrcInc = 1;
00782         uint32_t WhiteSpaceNumb;
00783         if(pCurrFont == NULL)
00784         {
00785                 return(-1);
00786         }
00787         H_Line = (pCurrFont->H_Size / 8) + ((pCurrFont->H_Size % 8)?1:0);
00788         switch(c)
00789         {
00790         case '\n':  // go to start of next line (NewLine)
00791                 ++TextY_Pos;
00792                 break;
00793         case '\r':  // go to start of this line (Carriage Return)
00794                 // clear from current position to end of line
00795                 while(GLCD_TextCalcWindow(&xl,&xr,&yu,&yd,&H_Size,&V_Size))
00796                 {
00797                         LCD_SET_WINDOW(xl,xr,yu,yd);
00798                         for(i = 0; i < V_Size; ++i)
00799                         {
00800                                 for(j = 0; j < H_Size; ++j)
00801                                 {
00802                                         LCD_WRITE_PIXEL(TextBackgndColour);
00803                                 }
00804                         }
00805                         ++TextX_Pos;
00806                 }
00807                 TextX_Pos = 0;
00808                 break;
00809         case '\b': // go back one position (BackSpace)
00810                 if(TextX_Pos)
00811                 {
00812                         --TextX_Pos;
00813                         // del current position
00814                         if(GLCD_TextCalcWindow(&xl,&xr,&yu,&yd,&H_Size,&V_Size))
00815                         {
00816                                 LCD_SET_WINDOW(xl,xr,yu,yd);
00817                                 for(i = 0; i < V_Size; ++i)
00818                                 {
00819                                         for(j = 0; j < H_Size; ++j)
00820                                         {
00821                                                 LCD_WRITE_PIXEL(TextBackgndColour);
00822                                         }
00823                                 }
00824                         }
00825                 }
00826                 break;
00827         case '\t':  // go to next Horizontal Tab stop
00828                 WhiteSpaceNumb = TabSize - (TextX_Pos%TabSize);
00829                 for(k = 0; k < WhiteSpaceNumb; ++k)
00830                 {
00831                         LCD_SET_WINDOW(xl,xr,yu,yd);
00832                         if(GLCD_TextCalcWindow(&xl,&xr,&yu,&yd,&H_Size,&V_Size))
00833                         {
00834                                 for(i = 0; i < V_Size; ++i)
00835                                 {
00836                                         for(j = 0; j < H_Size; ++j)
00837                                         {
00838                                                 LCD_WRITE_PIXEL(TextBackgndColour);
00839                                         }
00840                                 }
00841                                 ++TextX_Pos;
00842                         }
00843                         else
00844                         {
00845                                 break;
00846                         }
00847                 }
00848                 break;
00849         case '\f':  // go to top of page (Form Feed)
00850                 // clear entire window
00851                 H_Size = XR_Win - XL_Win;
00852                 V_Size = YD_Win - YU_Win;
00853                 // set character window X left, Y right
00854                 LCD_SET_WINDOW(XL_Win,XR_Win,YU_Win,YD_Win);
00855                 // Fill window with background font color
00856                 for(i = 0; i <= V_Size; ++i)
00857                 {
00858                         for(j = 0; j <= H_Size; ++j)
00859                         {
00860                                 LCD_WRITE_PIXEL(TextBackgndColour);
00861                         }
00862                 }
00863
00864                 TextX_Pos = TextY_Pos = 0;
00865                 break;
00866         case '\a':  // signal an alert (BELl)
00867                 TEXT_BEL1_FUNC();
00868                 break;
00869         default:
00870                 // Calculate the current character base address from stream
00871                 // and the character position
00872                 if((c <  pCurrFont->CharacterOffset) && (c >= pCurrFont->CharactersNuber))
00873                 {
00874                         c = 0;
00875                 }
00876                 else
00877                 {
00878                         c -= pCurrFont->CharacterOffset;
00879                 }
00880                 pSrc = pCurrFont->pFontStream + (H_Line * pCurrFont->V_Size * c);
00881                 // Calculate character window and fit it in the text window
00882                 if(GLCD_TextCalcWindow(&xl,&xr,&yu,&yd,&H_Size,&V_Size))
00883                 {
00884                         // set character window X left, Y right
00885                         LCD_SET_WINDOW(xl,xr,yu,yd);
00886                         // Send char data
00887                         for(i = 0; i < V_Size; ++i)
00888                         {
00889                                 SrcInc = H_Line;
00890                                 for(j = 0; j < H_Size; ++j)
00891                                 {
00892                                         Temp = (*pSrc & (1UL << (j&0x7)))?TextColour:TextBackgndColour;
00893                                         LCD_WRITE_PIXEL(Temp);
00894                                         if((j&0x7) == 7)
00895                                         {
00896                                                 ++pSrc;
00897                                                 --SrcInc;
00898                                         }
00899                                 }
00900                                 // next line of character
00901                                 pSrc += SrcInc;
00902                         }
00903                 }
00904                 ++TextX_Pos;
00905         }
00906         LCD_FLUSH_PIXELS();
00907         return(c);
00908 }
00909
00910 /*************************************************************************
00911  * Function Name: GLCD_print
00912  * Parameters: int c
00913  *
00914  * Return: none
00915  *
00916  * Description: Put char function
00917  *
00918  *************************************************************************/
00919 void GLCD_print (const char *fmt)
00920 {
00921         while(0 != *fmt)
00922         {
00923                 if(-1 == GLCD_putchar(*fmt++))
00924                 {
00925                         break;
00926                 }
00927         }
00928 }
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd.h
Go to the documentation of this file.
00001 /*************************************************************************
00002  *
00003  *
00004  *    (c) Copyright IAR Systems 2006
00005  *
00006  *    File name   : drv_glcd.h
00007  *    Description : Graphic LCD driver include file
00008  *
00009  *    History :
00010  *    1. Date        : December 2, 2006
00011  *       Author      : Stanimir Bonev
00012  *       Description : Create
00013  *
00014  *    $Revision: 28532 $
00015  **************************************************************************/
00016 #include "drv_glcd_cnfg.h"
00017 #include "lpc_types.h"
00018
00019 #ifndef  __DRV_GLCD_H
00020 #define  __DRV_GLCD_H
00021
00022 #define DEF_X_LEFT              0
00023 #define DEF_Y_UP                0
00024 #define DEF_X_RIGHT             GLCD_HORIZONTAL_SIZE
00025 #define DEF_Y_DOWN              GLCD_VERTICAL_SIZE
00026 #define DEF_FONT_COLOUR         0x000000
00027 #define DEF_BACKGND_COLOUR      0x00FF0
00028 #define TEXT_DEF_TAB_SIZE       4
00029
00030 #define MAX_GLCD_STR_SIZE   256
00031 // External function
00032 #define TEXT_BEL1_FUNC()         // generate BEL signal
00033
00034 // Set window
00035 #define LCD_SET_WINDOW(xl,xr,yu,yd) \
00036 {\
00037 uint32_t Temp;\
00038   Temp = xl | (xr<<8);\
00039   GLCD_SendCmd(CASET,(unsigned char*)&Temp,0);\
00040   Temp = (yu+2) | ((yd+2)<<8);\
00041   GLCD_SendCmd(RASET,(unsigned char*)&Temp,0);\
00042 }
00043
00044 // Send pixel
00045 #define LCD_WRITE_PIXEL(c) GLCD_SendCmd(RAMWR,(unsigned char*)&c,2)
00046
00047 // Flush pixels
00048 #define LCD_FLUSH_PIXELS() GLCD_SendCmd(NOP,NULL,0)
00049
00050 #define GLCD_MANF_ID 0x45
00051 #define GLCD_MOD_ID  0x03
00052
00053 #define WAITED_PIXEL 0x80000000
00054
00055 #define PIXEL_CONV(Pixel,Order) (!Order)?(((Pixel >> 4) & 0xFF) | ((Pixel << 12) & 0xF000)):(((Pixel << 16) & 0xFF0000) | ((Pixel) & 0xF00))
00056 // PCF8833 status register
00057 #define PCF8833_ST_BOOSTER_ON     (1UL <<  7)
00058 #define PCF8833_ST_Y_ADDR_ODR     (1UL <<  6)
00059 #define PCF8833_ST_X_ADDR_ODR     (1UL <<  5)
00060 #define PCF8833_ST_ADDR_MODE      (1UL <<  4)
00061 #define PCF8833_ST_LINE_ADDR_ORD  (1UL <<  3)
00062 #define PCF8833_ST_RGB_ORD        (1UL <<  2)
00063 #define PCF8833_ST_PIXEL_FORM     (7UL << 12)
00064 #define PCF8833_ST_IDLE_MODE      (1UL << 11)
00065 #define PCF8833_ST_PARTIAL_MODE   (1UL << 10)
00066 #define PCF8833_ST_SLEEP_MODE     (1UL <<  9)
00067 #define PCF8833_ST_NORM_MODE      (1UL <<  8)
00068 #define PCF8833_ST_V_SCROLL_MODE  (1UL << 23)
00069 #define PCF8833_ST_INV_MODE       (1UL << 21)
00070 #define PCF8833_ST_ALL_PIXELS_ON  (1UL << 20)
00071 #define PCF8833_ST_ALL_PIXELS_OFF (1UL << 19)
00072 #define PCF8833_ST_DISPLAY_MODE   (1UL << 18)
00073 #define PCF8833_ST_TEARING_MODE   (1UL << 17)
00074
00075 // GLCD command interpreter type
00076 typedef enum _GLCD_ISS_t {
00077         GLCD_ISS_0 = 0, GLCD_ISS_1
00078 } GLCD_ISS_t;
00079
00080 // execution status
00081 typedef enum _GLCD_Status_t {
00082         GLCD_OK = 0, GLCD_ID_ERROR, GLCD_UNSUPPORTED, GLCD_ERROR
00083 } GLCD_Status_t;
00084
00085 // GCLD command set
00086 typedef enum _GLCD_Cmd_t {
00087         // Equal commands
00088         NOP, SLPIN, SLPOUT, PTLOUT, INVOFF, INVON,
00089         DISPOFF, DISPON, CASET, RASET, RAMWR, RGBSET, VSCSAD,
00090         IDMOFF, IDMON, RDID1, RDID2, RDID3, FRMSEL, FRM8SEL, TMPRNG,
00091         TMPHIS, TMPREAD, EPWRIN, EPWROUT, RDEV, RDRR,
00092   // Adapted commands
00093   PTIN,         // ISS=0 equal on PTLAR + PTIN
00094   SCRLAR,       // ISS=1 ASCSET mode 0
00095   DATCTR,       // ISS=0 equal on MADCTR + COLMOD
00096   SETCON, //
00097   // Commands applicable only when ISS=1
00098   OSCON, OSCOFF, RMWIN, RMWOUT, VOLUP, VOLDOWN, ASCSET, DISCTR,
00099   PWRCTR, VOLCTR,
00100   // Commands applicable only when ISS=0
00101   CLKINT, CLKEXT, RDDST, SWRESET, RDDID, PTLAR, PTLON, MADCTR,
00102   COLMOD, APOFF, APON, BSTROFF, BSTRON,
00103         GLCD_CMD_NUMB
00104 } GLCD_Cmd_t;
00105
00106 // Command direction
00107 typedef enum _GLCD_CmdDir_t {
00108         GLCD_WRITE = 0, GLCD_READ
00109 } GLCD_CmdDir_t;
00110
00111 // Data flag
00112 #define GLCD_DATA                                     0x100
00113
00114 // Invalid command (some commands don't have analog in other
00115 // command mode interpreter)
00116 #define GLCD_INV_CMD                                    ((uint32_t)(-1))
00117
00118 #define GLCD_MAX_COTRAST   63
00119 #define GLCD_MIN_COTRAST  -64
00120
00121 typedef struct _GLCD_CmdCtrl_t {
00122         uint32_t        Cmd;
00123         GLCD_CmdDir_t   Dir;
00124         Bool            Pulse;
00125         uint32_t                Param;
00126 } GLCD_CmdCtrl_t, *pGLCD_CmdCtrl_t;
00127
00128 #pragma pack(1)
00129 typedef struct _ASCSET_Data_t {
00130         uint8_t Ssl;
00131         uint8_t Sel;
00132         uint8_t Sfl;
00133         uint8_t Smd;
00134 } ASCSET_Data_t, *pASCSET_Data_t;
00135
00136 #if defined ( __CC_ARM   )
00137 #pragma anon_unions
00138 #endif
00139
00140 typedef struct _DATCTR_Data_t {
00141         union
00142         {
00143                 uint8_t RC_AddMode;
00144                 struct
00145                 {
00146                         uint8_t MY : 1;
00147                         uint8_t MX : 1;
00148                         uint8_t MV : 1;
00149                         uint8_t ML : 1;
00150                         uint8_t : 4;
00151                 };
00152         };
00153         union
00154         {
00155                 uint8_t RGB_Mode;
00156                 struct
00157                 {
00158                         uint8_t RGB : 1;
00159                         uint8_t : 7;
00160                 };
00161         };
00162         union
00163         {
00164                 uint8_t GrayScale;
00165                 struct
00166                 {
00167                         uint8_t GS  : 3;
00168                         uint8_t Reversed: 5;
00169                 };
00170         };
00171 } DATCTR_Data_t, *pDATCTR_Data_t;
00172
00173 typedef struct _MADCTR_Data_t {
00174         union
00175         {
00176                 uint8_t MemDataAccCtrl;
00177                 struct
00178                 {
00179                         uint8_t Reversed: 3;
00180                         uint8_t RGB : 1;
00181                         uint8_t ML  : 1;
00182                         uint8_t MV  : 1;
00183                         uint8_t MX  : 1;
00184                         uint8_t MY  : 1;
00185                 };
00186         };
00187 } MADCTR_Data_t, *pMADCTR_Data_t;
00188
00189
00190 typedef struct _COLMOD_Data_t {
00191         union
00192         {
00193                 uint8_t ColourMode;
00194                 struct
00195                 {
00196                         uint8_t Mode    : 3;
00197                         uint8_t Reversed : 5;
00198                 };
00199         };
00200 } COLMOD_Data_t, *pCOLMOD_Data_t;
00201 #pragma pack()
00202
00203 typedef uint32_t LdcPixel_t, *pLdcPixel_t;
00204
00205 typedef struct _FontType_t {
00206   uint32_t H_Size;
00207   uint32_t V_Size;
00208   uint32_t CharacterOffset;
00209   uint32_t CharactersNuber;
00210   unsigned char *pFontStream;
00211   unsigned char *pFontDesc;
00212 } FontType_t, *pFontType_t;
00213
00214 typedef struct _Bmp_t {
00215   uint32_t  H_Size;
00216   uint32_t  V_Size;
00217   uint32_t  BitsPP;
00218   uint32_t  BytesPP;
00219   unsigned int *pPalette;
00220   unsigned int *pPicStream;
00221   unsigned char *pPicDesc;
00222 } Bmp_t, *pBmp_t;
00223
00224 extern void Dly100us(void *arg);
00225
00226 /*************************************************************************
00227  * Function Name: GLCD_SendCmd
00228  * Parameters: GLCD_Cmd_t Cmd, unsigned char* pData, uint32_t Size
00229  * Return: GLCD_Status_t
00230  *
00231  * Description: Send command to the Graphic LCD
00232  *
00233  *************************************************************************/
00234 GLCD_Status_t GLCD_SendCmd (GLCD_Cmd_t Cmd, unsigned char *pData, uint32_t Size);
00235
00236 /*************************************************************************
00237  * Function Name: GLCD_PowerUpInit
00238  * Parameters: unsigned char* pInitData
00239  * Return: GLCD_Status_t
00240  *         GLCD_OK - init pass
00241  *                               GLCD_ID_ERROR - unsupported driver type
00242  * Description: Power-up initialization of Graphic LCD
00243  *
00244  *************************************************************************/
00245 //GLCD_Status_t GLCD_PowerUpInit (unsigned char *pInitData);
00246 GLCD_Status_t GLCD_PowerUpInit (unsigned char *pInitData);
00247
00248 /*************************************************************************
00249  * Function Name: GLCD_SetFont
00250  * Parameters: pFontType_t pFont, LdcPixel_t Color
00251  *              LdcPixel_t BackgndColor
00252  *
00253  * Return: none
00254  *
00255  * Description: Set current font, font color and background color
00256  *
00257  *************************************************************************/
00258 void GLCD_SetFont(pFontType_t pFont,
00259                   LdcPixel_t Color, LdcPixel_t BackgndColor);
00260
00261 /*************************************************************************
00262  * Function Name: GLCD_SetWindow
00263  * Parameters: uint32_t X_Left, uint32_t Y_Up,
00264  *             uint32_t X_Right, uint32_t Y_Down
00265  *
00266  * Return: none
00267  *
00268  * Description: Set draw window XY coordinate in pixels
00269  *
00270  *************************************************************************/
00271 void GLCD_SetWindow(uint32_t X_Left, uint32_t Y_Up,
00272                     uint32_t X_Right, uint32_t Y_Down);
00273
00274 /*************************************************************************
00275  * Function Name: GLCD_TextSetPos
00276  * Parameters: uint32_t X_UpLeft, uint32_t Y_UpLeft,
00277  *             uint32_t X_DownLeft, uint32_t Y_DownLeft
00278  *
00279  * Return: none
00280  *
00281  * Description: Set text X,Y coordinate in characters
00282  *
00283  *************************************************************************/
00284 void GLCD_TextSetPos(uint32_t X, uint32_t Y);
00285
00286 /*************************************************************************
00287  * Function Name: GLCD_TextSetTabSize
00288  * Parameters: uint32_t Size
00289  *
00290  * Return: none
00291  *
00292  * Description: Set text tab size in characters
00293  *
00294  *************************************************************************/
00295 void GLCD_TextSetTabSize(uint32_t Size);
00296
00297 /*************************************************************************
00298  * Function Name: GLCD_TextCalcWindow
00299  * Parameters: pInt32U pXL, pInt32U pXR,
00300  *             pInt32U pYU, pInt32U pYD,
00301  *             pInt32U pH_Size, pInt32U pV_Size
00302  *
00303  * Return: Boolean
00304  *          FALSE - out of window coordinate aren't valid
00305  *          TRUE  - the returned coordinate are valid
00306  *
00307  * Description: Calculate character window
00308  *
00309  *************************************************************************/
00310 static Bool GLCD_TextCalcWindow (unsigned int *pXL, unsigned int *pXR,
00311                 unsigned int *pYU, unsigned int *pYD,
00312                 unsigned int *pH_Size, unsigned int *pV_Size);
00313
00314 /*************************************************************************
00315  * Function Name: GLCD_putchar
00316  * Parameters: int c
00317  *
00318  * Return: none
00319  *
00320  * Description: Put char function
00321  *
00322  *************************************************************************/
00323 int GLCD_putchar (int c);
00324
00325 /*************************************************************************
00326  * Function Name: GLCD_print
00327  * Parameters: int c
00328  *
00329  * Return: none
00330  *
00331  * Description: Put char function
00332  *
00333  *************************************************************************/
00334 void GLCD_print (const char *fmt);
00335
00336 #endif  /* __DRV_GLCD_H */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd_cnfg.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/drv_glcd_cnfg.h
Go to the documentation of this file.
00001 /*************************************************************************
00002  *
00003  *
00004  *    (c) Copyright IAR Systems 2006
00005  *
00006  *    File name   : drv_glcd_cnfg.h
00007  *    Description : Graphic LCD config file
00008  *
00009  *    History :
00010  *    1. Date        : December 2, 2006
00011  *       Author      : Stanimir Bonev
00012  *       Description : Create
00013  *
00014  *    $Revision: 28532 $
00015  **************************************************************************/
00016
00017 #ifndef  __DRV_GLCD_CNFG_H
00018 #define  __DRV_GLCD_CNFG_H
00019
00020 // GLCD DRV Default setup data
00021 // SPI0 default clock
00022 #define GLCD_DEF_CLOCK            (1000000UL)
00023 // SPI0 default data width
00024 #define GLCD_DEF_WIDTH             9
00025 // Horizontal Size of display [Pixels]
00026 #define GLCD_HORIZONTAL_SIZE       132
00027 // Vertical Size of display [Pixels]
00028 #define GLCD_VERTICAL_SIZE           132
00029 // Display On/Off 1/0
00030 #define GLCD_DISPLAY_STATE         1
00031 // Default Display inversion setting
00032 #define GLCD_DEF_DPL_INV           1
00033 // Default Display color scheme
00034 #define GLCD_DEF_DPL_8_COLOR       0
00035 // Default Display Partial mode
00036 #define GLCD_DEF_DPL_PARTIAL_MODE  0
00037 // Default Display Row direction
00038 #define GLCD_DEF_DPL_MY            0
00039 // Default Display column direction
00040 #define GLCD_DEF_DPL_MX            1
00041 // Default Display address direction
00042 #define GLCD_DEF_DPL_V             0
00043 // Default Display scan direction
00044 #define GLCD_DEF_DPL_ML            0
00045 // Default Display RGB order
00046 #define GLCD_DEF_DPL_RGB_ORD       0
00047
00048 #endif  /* __DRV_GLCD_CNFG_H */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/easyweb.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/easyweb.c
Go to the documentation of this file.
00001 /******************************************************************
00002  *****                                                        *****
00003  *****  Name: easyweb.c                                       *****
00004  *****  Ver.: 1.0                                             *****
00005  *****  Date: 07/05/2001                                      *****
00006  *****  Auth: Andreas Dannenberg                              *****
00007  *****        HTWK Leipzig                                    *****
00008  *****        university of applied sciences                  *****
00009  *****        Germany                                         *****
00010  *****  Func: implements a dynamic HTTP-server by using       *****
00011  *****        the easyWEB-API                                 *****
00012  *****                                                        *****
00013  ******************************************************************/
00014
00015 #include <stdlib.h>
00016 #include <stdio.h>
00017 #include <string.h>
00018 #include "adc.h"
00019 #include "lpc17xx_libcfg.h"
00020 #include "EMAC.h"         // Keil: *.c -> *.h    // ethernet packet driver
00021 #define extern            // Keil: Line added for modular project management
00022
00023 #include "easyweb.h"
00024 #include "tcpip.h"        // Keil: *.c -> *.h    // easyWEB TCP/IP stack
00025 #include "webpage.h"                             // webside for our HTTP server (HTML)
00026
00027 /* Example group ----------------------------------------------------------- */
00033 // NXP: Include some header files that differs from the origin
00034 int main(void)
00035 {
00036   TCPLowLevelInit();
00037   HTTPStatus = 0;                                // clear HTTP-server's flag register
00038
00039   TCPLocalPort = TCP_PORT_HTTP;                  // set port we want to listen to
00040
00041   while (1)                                      // repeat forever
00042   {
00043     if (!(SocketStatus & SOCK_ACTIVE)) TCPPassiveOpen();   // listen for incoming TCP-connection
00044     DoNetworkStuff();                                      // handle network and easyWEB-stack
00045                                                            // events
00046     HTTPServer();
00047   }
00048 }
00049
00050 // This function implements a very simple dynamic HTTP-server.
00051 // It waits until connected, then sends a HTTP-header and the
00052 // HTML-code stored in memory. Before sending, it replaces
00053 // some special strings with dynamic values.
00054 // NOTE: For strings crossing page boundaries, replacing will
00055 // not work. In this case, simply add some extra lines
00056 // (e.g. CR and LFs) to the HTML-code.
00057
00058 void HTTPServer(void)
00059 {
00060   if (SocketStatus & SOCK_CONNECTED)             // check if somebody has connected to our TCP
00061   {
00062     if (SocketStatus & SOCK_DATA_AVAILABLE)      // check if remote TCP sent data
00063       TCPReleaseRxBuffer();                      // and throw it away
00064
00065     if (SocketStatus & SOCK_TX_BUF_RELEASED)     // check if buffer is free for TX
00066     {
00067       if (!(HTTPStatus & HTTP_SEND_PAGE))        // init byte-counter and pointer to webside
00068       {                                          // if called the 1st time
00069         HTTPBytesToSend = sizeof(WebSide) - 1;   // get HTML length, ignore trailing zero
00070         PWebSide = (unsigned char *)WebSide;     // pointer to HTML-code
00071       }
00072
00073       if (HTTPBytesToSend > MAX_TCP_TX_DATA_SIZE)     // transmit a segment of MAX_SIZE
00074       {
00075         if (!(HTTPStatus & HTTP_SEND_PAGE))           // 1st time, include HTTP-header
00076         {
00077           memcpy(TCP_TX_BUF, GetResponse, sizeof(GetResponse) - 1);
00078           memcpy(TCP_TX_BUF + sizeof(GetResponse) - 1, PWebSide, MAX_TCP_TX_DATA_SIZE - sizeof(GetResponse) + 1);
00079           HTTPBytesToSend -= MAX_TCP_TX_DATA_SIZE - sizeof(GetResponse) + 1;
00080           PWebSide += MAX_TCP_TX_DATA_SIZE - sizeof(GetResponse) + 1;
00081         }
00082         else
00083         {
00084           memcpy(TCP_TX_BUF, PWebSide, MAX_TCP_TX_DATA_SIZE);
00085           HTTPBytesToSend -= MAX_TCP_TX_DATA_SIZE;
00086           PWebSide += MAX_TCP_TX_DATA_SIZE;
00087         }
00088
00089         TCPTxDataCount = MAX_TCP_TX_DATA_SIZE;   // bytes to xfer
00090         InsertDynamicValues();                   // exchange some strings...
00091         TCPTransmitTxBuffer();                   // xfer buffer
00092       }
00093       else if (HTTPBytesToSend)                  // transmit leftover bytes
00094       {
00095         memcpy(TCP_TX_BUF, PWebSide, HTTPBytesToSend);
00096         TCPTxDataCount = HTTPBytesToSend;        // bytes to xfer
00097         InsertDynamicValues();                   // exchange some strings...
00098         TCPTransmitTxBuffer();                   // send last segment
00099         TCPClose();                              // and close connection
00100         HTTPBytesToSend = 0;                     // all data sent
00101       }
00102
00103       HTTPStatus |= HTTP_SEND_PAGE;              // ok, 1st loop executed
00104     }
00105   }
00106   else
00107     HTTPStatus &= ~HTTP_SEND_PAGE;               // reset help-flag if not connected
00108 }
00109
00110 // samples and returns the AD-converter value of channel 2 (MCB1700 board) or channel 5 (IAR board)
00111
00112 unsigned int GetAD7Val(void)
00113 {
00114         unsigned int val;
00115         ADC_startCnv();
00116         val = ADC_getCnv();
00117         ADC_stopCnv();
00118         return (val/40);
00119 }
00120
00121 // samples and returns AD-converter value of channel 1
00122
00123 unsigned int GetTempVal(void)
00124 {
00125         // Always return (0)
00126         return (0);
00127 }
00128
00129
00130 // searches the TX-buffer for special strings and replaces them
00131 // with dynamic values (AD-converter results)
00132
00133 void InsertDynamicValues(void)
00134 {
00135   unsigned char *Key;
00136            char NewKey[5];
00137   unsigned int i;
00138
00139   if (TCPTxDataCount < 4) return;                     // there can't be any special string
00140
00141   Key = TCP_TX_BUF;
00142
00143   for (i = 0; i < (TCPTxDataCount - 3); i++)
00144   {
00145     if (*Key == 'A')
00146      if (*(Key + 1) == 'D')
00147        if (*(Key + 3) == '%')
00148          switch (*(Key + 2))
00149          {
00150            case '7' :                                 // "AD7%"?
00151            {
00152              sprintf(NewKey, "%3u", GetAD7Val());     // insert AD converter value
00153              memcpy(Key, NewKey, 3);                  // channel 7 (P6.7)
00154              break;
00155            }
00156            case 'A' :                                 // "ADA%"?
00157            {
00158              sprintf(NewKey, "%3u", GetTempVal());    // insert AD converter value
00159              memcpy(Key, NewKey, 3);                  // channel 10 (temp.-diode)
00160              break;
00161            }
00162          }
00163     Key++;
00164   }
00165 }
00166
00167 #ifdef  DEBUG
00168 /*******************************************************************************
00169 * @brief                Reports the name of the source file and the source line number
00170 *                               where the CHECK_PARAM error has occurred.
00171 * @param[in]    file Pointer to the source file name
00172 * @param[in]    line assert_param error line source number
00173 * @return               None
00174 *******************************************************************************/
00175 void check_failed(uint8_t *file, uint32_t line)
00176 {
00177         /* User can add his own implementation to report the file name and line number,
00178          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00179
00180         /* Infinite loop */
00181         while(1);
00182 }
00183 #endif
00184
00185 /*
00186  * @}
00187  */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/easyweb.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/easyweb.h
Go to the documentation of this file.
00001 /******************************************************************
00002  *****                                                        *****
00003  *****  Name: easyweb.h                                       *****
00004  *****  Ver.: 1.0                                             *****
00005  *****  Date: 07/05/2001                                      *****
00006  *****  Auth: Andreas Dannenberg                              *****
00007  *****        HTWK Leipzig                                    *****
00008  *****        university of applied sciences                  *****
00009  *****        Germany                                         *****
00010  *****  Func: header-file for easyweb.c                       *****
00011  *****                                                        *****
00012  ******************************************************************/
00013
00014 #ifndef __EASYWEB_H
00015 #define __EASYWEB_H
00016
00017 const unsigned char GetResponse[] =              // 1st thing our server sends to a client
00018 {
00019   "HTTP/1.0 200 OK\r\n"                          // protocol ver 1.0, code 200, reason OK
00020   "Content-Type: text/html\r\n"                  // type of data we want to send
00021   "\r\n"                                         // indicate end of HTTP-header
00022 };
00023
00024 void InitOsc(void);                              // prototypes
00025 void InitPorts(void);
00026 void HTTPServer(void);
00027 void InsertDynamicValues(void);
00028 unsigned int GetAD7Val(void);
00029 unsigned int GetTempVal(void);
00030
00031 unsigned char *PWebSide;                         // pointer to webside
00032 unsigned int HTTPBytesToSend;                    // bytes left to send
00033
00034 unsigned char HTTPStatus;                        // status byte
00035 #define HTTP_SEND_PAGE               0x01        // help flag
00036
00037 #endif
00038
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/emactest.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/emactest.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          emactest.c                              2010-05-21
00003 */
00025 #include "string.h"
00026 #include "crc32.h"
00027 #include "lpc17xx_emac.h"
00028 #include "lpc17xx_gpio.h"
00029 #include "lpc17xx_pinsel.h"
00030 #include "lpc17xx_libcfg.h"
00031
00032 /* For debugging... */
00033 #include "debug_frmwrk.h"
00034 #include <stdio.h>
00035
00036 /* Example group ----------------------------------------------------------- */
00042 /* CONFIGURABLE MACROS ----------------------------------------------- */
00043 /* For the EMAC test, there are two ways to test:
00044         - TX_ONLY and BOUNCE_RX flags can be set one at a time, not both.
00045         When TX_ONLY is set to 1, it's a TX_ONLY packet from the MCB1700
00046         board to the LAN. Use the traffic analyzer such as ethereal, once
00047         the program is running, the packets can be monitored on the traffic
00048         analyzer.
00049         - When BOUNCE_RX is set to 1 (TX_ONLY needs to reset to 0), it's a
00050         test to test both TX and RX, use the traffic generator/analyzer,
00051         you can creat a packet with the destination address as that on the
00052         MCB1700 board, use the traffic generator to send packets, as long
00053         as the destination address matches, MCB1700 will reverse the source
00054         and destination address and send the packets back on the network.
00055         ENABLE_WOL flag is used to test power down and WOL functionality.
00056         BOUNCE_RX flag needs to be set to 1 when WOL is being tested.
00057 */
00058 #define TX_ONLY                         0
00059 #define BOUNCE_RX                       1
00060 #define ENABLE_WOL                      1
00061 #define ENABLE_HASH                     1
00062
00063
00064 #if TX_ONLY
00065 /* This is the MAC address of LPC1768 */
00066 #define EMAC_ADDR12             0x0000101F
00067 #define EMAC_ADDR34             0x0000E012
00068 #define EMAC_ADDR56             0x00001D0C
00069 /* A pseudo destination MAC address is defined for
00070  * both TX_ONLY and BOUNCE_RX test */
00071 #define EMAC_DST_ADDR12         0x0000E386
00072 #define EMAC_DST_ADDR34         0x00006BDA
00073 #define EMAC_DST_ADDR56         0x00005000
00074 #endif
00075
00076 #if BOUNCE_RX
00077 /* This is the MAC address of LPC1768 */
00078 #define EMAC_ADDR12             0x0000E386
00079 #define EMAC_ADDR34             0x00006BDA
00080 #define EMAC_ADDR56             0x00005000
00081 /* A pseudo destination MAC address is defined for
00082  * both TX_ONLY and BOUNCE_RX test */
00083 #define EMAC_DST_ADDR12         0x0000101F
00084 #define EMAC_DST_ADDR34         0x0000E012
00085 #define EMAC_DST_ADDR56         0x00001D0C
00086 #endif
00087
00088 /* LED definitions */
00089 #define PD_LED_PIN              (1<<6)
00090 #define TX_LED_PIN              (1<<5)
00091 #define RX_LED_PIN              (1<<4)
00092 #define KB_LED_PIN              (1<<3)
00093 #define BLINK_LED_PIN   (1<<2)
00094 #define LED2_MASK               ((1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6))
00095 #define LED1_MASK               ((1<<28) | (1<<29) | (0x80000000))
00096
00097
00098 /* INTERNAL MACROS ----------------------------------------------- */
00099
00100 #define TX_PACKET_SIZE          114
00101
00102 #define MYMAC_1         ((EMAC_ADDR12 & 0xFF00) >> 8)
00103 #define MYMAC_2         ((EMAC_ADDR12 & 0xFF))
00104 #define MYMAC_3         ((EMAC_ADDR34 & 0xFF00) >> 8)
00105 #define MYMAC_4         ((EMAC_ADDR34 & 0xFF))
00106 #define MYMAC_5         ((EMAC_ADDR56 & 0xFF00) >> 8)
00107 #define MYMAC_6         ((EMAC_ADDR56 & 0xFF))
00108
00109 #define DB      _DBG((uint8_t *)db_)
00110
00111
00112 /*  PRIVATE VARIABLES ----------------------------------------------- */
00113 char db_[64];
00114
00115 #ifdef __IAR_SYSTEMS_ICC__
00116 /* Global Tx Buffer data */
00117 #pragma data_alignment=4
00118 uint8_t gTxBuf[TX_PACKET_SIZE + 0x10];
00119 /* Global Rx Buffer data */
00120 #pragma data_alignment=4
00121 uint8_t gRxBuf[TX_PACKET_SIZE + 0x10];
00122 #else
00123 /* Global Tx Buffer data */
00124 uint8_t __attribute__ ((aligned (4))) gTxBuf[TX_PACKET_SIZE + 0x10];
00125 /* Global Rx Buffer data */
00126 uint8_t __attribute__ ((aligned (4))) gRxBuf[TX_PACKET_SIZE + 0x10];
00127 #endif
00128
00129 /* EMAC address */
00130 uint8_t EMACAddr[] = {MYMAC_6, MYMAC_5, MYMAC_4, MYMAC_3, MYMAC_2, MYMAC_1};
00131
00132 /* Tx, Rx Counters */
00133 __IO uint32_t RXOverrunCount = 0;
00134 __IO uint32_t RXErrorCount = 0;
00135 __IO uint32_t TXUnderrunCount = 0;
00136 __IO uint32_t TXErrorCount = 0;
00137 __IO uint32_t RxFinishedCount = 0;
00138 __IO uint32_t TxFinishedCount = 0;
00139 __IO uint32_t TxDoneCount = 0;
00140 __IO uint32_t RxDoneCount = 0;
00141 __IO uint32_t ReceiveLength = 0;
00142 __IO Bool PacketReceived = FALSE;
00143
00144 /* Tx Only variables */
00145 #if TX_ONLY
00146 __IO FlagStatus Pressed = RESET;
00147 #endif
00148
00149 #if ENABLE_WOL
00150 __IO uint32_t WOLCount = 0;
00151 #endif
00152
00153 /************************** PRIVATE FUNCTON **********************************/
00154 /* Interrupt service routines */
00155 void ENET_IRQHandler (void);
00156 #if TX_ONLY
00157 #ifdef MCB_LPC_1768
00158 void EINT0_Init(void);
00159 void EINT0_IRQHandler(void);
00160 #elif
00161 void EINT3_Init(void);
00162 void EINT3_IRQHandler(void);
00163 #endif
00164 #endif
00165
00166 void PacketGen(uint8_t *txptr);
00167 void LED_Init (void);
00168 void LED_Blink(uint32_t pattern);
00169 void Usr_Init_Emac(void);
00170
00171 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00172 /*********************************************************************/
00177 void ENET_IRQHandler (void)
00178 {
00179         EMAC_PACKETBUF_Type RxDatbuf;
00180         uint32_t RxLen;
00181
00182         /* EMAC Ethernet Controller Interrupt function. */
00183         uint32_t int_stat;
00184         // Get EMAC interrupt status
00185         while ((int_stat = (LPC_EMAC->IntStatus & LPC_EMAC->IntEnable)) != 0) {
00186                 // Clear interrupt status
00187                 LPC_EMAC->IntClear = int_stat;
00188                 /* scan interrupt status source */
00189
00190                 /* ---------- receive overrun ------------*/
00191                 if((int_stat & EMAC_INT_RX_OVERRUN))
00192                 {
00193                         RXOverrunCount++;
00194                         _DBG_("Rx overrun");
00195                 }
00196
00197                 /*-----------  receive error -------------*/
00198                 /* Note:
00199                  * The EMAC doesn't distinguish the frame type and frame length,
00200                  * so, e.g. when the IP(0x8000) or ARP(0x0806) packets are received,
00201                  * it compares the frame type with the max length and gives the
00202                  * "Range" error. In fact, this bit is not an error indication,
00203                  * but simply a statement by the chip regarding the status of
00204                  * the received frame
00205                  */
00206                 if ((int_stat & EMAC_INT_RX_ERR))
00207                 {
00208                         if (EMAC_CheckReceiveDataStatus(EMAC_RINFO_RANGE_ERR) == RESET){
00209                                 RXErrorCount++;
00210                                 _DBG_("Rx error: ");
00211                         }
00212                 }
00213
00214                 /* ---------- RX Finished Process Descriptors ----------*/
00215                 if ((int_stat & EMAC_INT_RX_FIN))
00216                 {
00217                         RxFinishedCount++;
00218                         _DBG_("Rx finish");
00219                 }
00220
00221                 /* ---------- Receive Done -----------------------------*/
00222                 /* Note: All packets are greater than (TX_PACKET_SIZE + 4)
00223                  * will be ignore!
00224                  */
00225                 if ((int_stat & EMAC_INT_RX_DONE))
00226                 {
00227                         /* Packet received, check if packet is valid. */
00228                         if (EMAC_CheckReceiveIndex()){
00229                                 if (!EMAC_CheckReceiveDataStatus(EMAC_RINFO_LAST_FLAG)){
00230                                         goto rel;
00231                                 }
00232                                 // Get data size, trip out 4-bytes CRC field, note that length in (-1) style format
00233                                 RxLen = EMAC_GetReceiveDataSize() - 3;
00234                                 // Note that packet added 4-bytes CRC created by yourself
00235                                 if ((RxLen > (TX_PACKET_SIZE + 4)) || (EMAC_CheckReceiveDataStatus(EMAC_RINFO_ERR_MASK))) {
00236                                         /* Invalid frame, ignore it and free buffer */
00237                                         goto rel;
00238                                 }
00239                                 ReceiveLength = RxLen;
00240                                 // Valid Frame, just copy it
00241                                 RxDatbuf.pbDataBuf = (uint32_t *)gRxBuf;
00242                                 RxDatbuf.ulDataLen = RxLen;
00243                                 EMAC_ReadPacketBuffer(&RxDatbuf);
00244                                 PacketReceived = TRUE;
00245
00246                 rel:
00247                                 /* Release frame from EMAC buffer */
00248                                 EMAC_UpdateRxConsumeIndex();
00249                         }
00250                         _DBG_("Rx done");
00251                         RxDoneCount++;
00252                 }
00253
00254                 /*------------------- Transmit Underrun -----------------------*/
00255                 if ((int_stat & EMAC_INT_TX_UNDERRUN))
00256                 {
00257                         TXUnderrunCount++;
00258                         _DBG_("Tx under-run");
00259                 }
00260
00261                 /*------------------- Transmit Error --------------------------*/
00262                 if ((int_stat & EMAC_INT_TX_ERR))
00263                 {
00264                         TXErrorCount++;
00265                         _DBG_("Tx error");
00266                 }
00267
00268                 /* ----------------- TX Finished Process Descriptors ----------*/
00269                 if ((int_stat & EMAC_INT_TX_FIN))
00270                 {
00271                         TxFinishedCount++;
00272                         _DBG_("Tx finish");
00273                 }
00274
00275                 /* ----------------- Transmit Done ----------------------------*/
00276                 if ((int_stat & EMAC_INT_TX_DONE))
00277                 {
00278                         TxDoneCount++;
00279                         _DBG_("Tx done");
00280                 }
00281 #if ENABLE_WOL
00282                 /* ------------------ Wakeup Event Interrupt ------------------*/
00283                 /* Never gone here since interrupt in this
00284                  * functionality has been disable, even if in wake-up mode
00285                  */
00286                 if ((int_stat & EMAC_INT_WAKEUP))
00287                 {
00288                         WOLCount++;
00289                 }
00290 #endif
00291         }
00292 }
00293
00294 #if TX_ONLY
00295 #ifdef MCB_LPC_1768
00296 /*********************************************************************/
00301 void EINT0_IRQHandler(void)
00302 {
00303         LPC_SC->EXTINT |= 0x1;  //clear the EINT0 flag
00304         LED_Blink(KB_LED_PIN);
00305         Pressed = SET;
00306 }
00307 #elif defined(IAR_LPC_1768)
00308 /*********************************************************************/
00313 void EINT3_IRQHandler(void)
00314 {
00315         LPC_SC->EXTINT |= (0x1<<3);  //clear the EINT0 flag
00316         LED_Blink(KB_LED_PIN);
00317         Pressed = SET;
00318 }
00319 #endif
00320 #endif
00321
00322 /*-------------------------PRIVATE FUNCTIONS-----------------------------------*/
00323 /*********************************************************************/
00328 void PacketGen( uint8_t *txptr )
00329 {
00330   int i;
00331   uint32_t crcValue;
00332   uint32_t BodyLength = TX_PACKET_SIZE - 14;
00333
00334   /* Dest address */
00335   *(txptr+0) = EMAC_DST_ADDR56 & 0xFF;
00336   *(txptr+1) = (EMAC_DST_ADDR56 >> 0x08) & 0xFF;
00337   *(txptr+2) = EMAC_DST_ADDR34 & 0xFF;
00338   *(txptr+3) = (EMAC_DST_ADDR34 >> 0x08) & 0xFF;
00339   *(txptr+4) = EMAC_DST_ADDR12 & 0xFF;
00340   *(txptr+5) = (EMAC_DST_ADDR12 >> 0x08) & 0xFF;
00341
00342   /* Src address */
00343   *(txptr+6) = EMAC_ADDR56 & 0xFF;
00344   *(txptr+7) = (EMAC_ADDR56 >> 0x08) & 0xFF;
00345   *(txptr+8) = EMAC_ADDR34 & 0xFF;
00346   *(txptr+9) = (EMAC_ADDR34 >> 0x08) & 0xFF;
00347   *(txptr+10) = EMAC_ADDR12 & 0xFF;
00348   *(txptr+11) = (EMAC_ADDR12 >> 0x08) & 0xFF;
00349
00350   /* Type or length, body length is TX_PACKET_SIZE - 14 bytes */
00351   *(txptr+12) = BodyLength & 0xFF;
00352   *(txptr+13) = (BodyLength >> 0x08) & 0xFF;
00353
00354   /* Skip the first 14 bytes for dst, src, and type/length */
00355   for ( i=0; i < BodyLength; i++ )
00356   {
00357         *(txptr+i+14) = 0x55;
00358   }
00359
00360   // Calculate CRC
00361   crcValue = crc32_bfr( txptr, TX_PACKET_SIZE );
00362
00363   // Add 4-byte CRC
00364   *(txptr+TX_PACKET_SIZE) = (0xff & crcValue);
00365   *(txptr+TX_PACKET_SIZE+1) = 0xff & (crcValue >> 8 );
00366   *(txptr+TX_PACKET_SIZE+2) = 0xff & (crcValue >> 16);
00367   *(txptr+TX_PACKET_SIZE+3) = 0xff & (crcValue >> 24);
00368 }
00369
00370 /*********************************************************************/
00375 void LED_Init (void)
00376 {
00377         PINSEL_CFG_Type PinCfg;
00378
00379         uint8_t temp;
00380
00381         PinCfg.Funcnum = 0;
00382         PinCfg.OpenDrain = 0;
00383         PinCfg.Pinmode = 0;
00384         PinCfg.Portnum = 2;
00385         for (temp = 2; temp <= 6; temp++){
00386                 PinCfg.Pinnum = temp;
00387                 PINSEL_ConfigPin(&PinCfg);
00388         }
00389
00390         PinCfg.Funcnum = 0;
00391         PinCfg.OpenDrain = 0;
00392         PinCfg.Pinmode = 0;
00393         PinCfg.Portnum = 1;
00394         PinCfg.Pinnum = 28;
00395         PINSEL_ConfigPin(&PinCfg);
00396         PinCfg.Pinnum = 29;
00397         PINSEL_ConfigPin(&PinCfg);
00398         PinCfg.Pinnum = 31;
00399         PINSEL_ConfigPin(&PinCfg);
00400
00401
00402         // Set direction to output
00403         LPC_GPIO2->FIODIR |= LED2_MASK;
00404         LPC_GPIO1->FIODIR |= LED1_MASK;
00405
00406         /* Turn off all LEDs */
00407         LPC_GPIO2->FIOCLR = LED2_MASK;
00408         LPC_GPIO1->FIOCLR = LED1_MASK;
00409 }
00410 /*********************************************************************/
00415 void LED_Blink( uint32_t pattern )
00416 {
00417         uint32_t j;
00418
00419         LPC_GPIO2->FIOSET = pattern;
00420         for ( j = 0; j < 0x100000; j++ );
00421         LPC_GPIO2->FIOCLR = pattern;
00422         for ( j = 0; j < 0x100000; j++ );
00423 }
00424
00425 #if TX_ONLY
00426 #ifdef MCB_LPC_1768
00427 /*********************************************************************/
00432 void EINT0_Init(void)
00433 {
00434         PINSEL_CFG_Type PinCfg;
00435
00436         /* P2.10 as /EINT0 */
00437         PinCfg.Funcnum = 1;
00438         PinCfg.OpenDrain = 0;
00439         PinCfg.Pinmode = 0;
00440         PinCfg.Pinnum = 10;
00441         PinCfg.Portnum = 2;
00442         PINSEL_ConfigPin(&PinCfg);
00443
00444         //Initialize EXT registers
00445         LPC_SC->EXTINT = 0x0;
00446         LPC_SC->EXTMODE = 0x0;
00447         LPC_SC->EXTPOLAR = 0x0;
00448
00449         /* edge sensitive */
00450         LPC_SC->EXTMODE = 0xF;
00451         /* falling-edge sensitive */
00452         LPC_SC->EXTPOLAR = 0x0;
00453         /* External Interrupt Flag cleared*/
00454         LPC_SC->EXTINT = 0xF;
00455
00456         NVIC_SetPriority(EINT0_IRQn, 4);
00457         NVIC_EnableIRQ(EINT0_IRQn);
00458 }
00459
00460 #elif defined(IAR_LPC_1768) //if using IAR board, using External Interrupt 3
00461 /*********************************************************************/
00466 void EINT3_Init(void)
00467 {
00468         PINSEL_CFG_Type PinCfg;
00469
00470         /* P2.13 as /EINT3 */
00471         PinCfg.Funcnum = 1;
00472         PinCfg.OpenDrain = 0;
00473         PinCfg.Pinmode = 0;
00474         PinCfg.Pinnum = 13;
00475         PinCfg.Portnum = 2;
00476         PINSEL_ConfigPin(&PinCfg);
00477
00478         //Initialize EXT registers
00479         LPC_SC->EXTINT = 0x0;
00480         LPC_SC->EXTMODE = 0x0;
00481         LPC_SC->EXTPOLAR = 0x0;
00482
00483         /* edge sensitive */
00484         LPC_SC->EXTMODE = 0xF;
00485         /* falling-edge sensitive */
00486         LPC_SC->EXTPOLAR = 0x0;
00487         /* External Interrupt Flag cleared*/
00488         LPC_SC->EXTINT = 0xF;
00489
00490         NVIC_SetPriority(EINT3_IRQn, 4);
00491         NVIC_EnableIRQ(EINT3_IRQn);
00492 }
00493 #endif
00494 #endif
00495
00496 /*********************************************************************/
00501 void Usr_Init_Emac(void)
00502 {
00503         /* EMAC configuration type */
00504         EMAC_CFG_Type Emac_Config;
00505         /* pin configuration */
00506         PINSEL_CFG_Type PinCfg;
00507         uint32_t i;
00508         /*
00509          * Enable P1 Ethernet Pins:
00510          * P1.0 - ENET_TXD0
00511          * P1.1 - ENET_TXD1
00512          * P1.4 - ENET_TX_EN
00513          * P1.8 - ENET_CRS
00514          * P1.9 - ENET_RXD0
00515          * P1.10 - ENET_RXD1
00516          * P1.14 - ENET_RX_ER
00517          * P1.15 - ENET_REF_CLK
00518          * P1.16 - ENET_MDC
00519          * P1.17 - ENET_MDIO
00520          */
00521         PinCfg.Funcnum = 1;
00522         PinCfg.OpenDrain = 0;
00523         PinCfg.Pinmode = 0;
00524         PinCfg.Portnum = 1;
00525
00526         PinCfg.Pinnum = 0;
00527         PINSEL_ConfigPin(&PinCfg);
00528         PinCfg.Pinnum = 1;
00529         PINSEL_ConfigPin(&PinCfg);
00530         PinCfg.Pinnum = 4;
00531         PINSEL_ConfigPin(&PinCfg);
00532         PinCfg.Pinnum = 8;
00533         PINSEL_ConfigPin(&PinCfg);
00534         PinCfg.Pinnum = 9;
00535         PINSEL_ConfigPin(&PinCfg);
00536         PinCfg.Pinnum = 10;
00537         PINSEL_ConfigPin(&PinCfg);
00538         PinCfg.Pinnum = 14;
00539         PINSEL_ConfigPin(&PinCfg);
00540         PinCfg.Pinnum = 15;
00541         PINSEL_ConfigPin(&PinCfg);
00542         PinCfg.Pinnum = 16;
00543         PINSEL_ConfigPin(&PinCfg);
00544         PinCfg.Pinnum = 17;
00545         PINSEL_ConfigPin(&PinCfg);
00546
00547         _DBG_("Init EMAC module");
00548         sprintf(db_,"MAC[1..6] addr: %X-%X-%X-%X-%X-%X \n\r", \
00549                          EMACAddr[0],  EMACAddr[1],  EMACAddr[2], \
00550                           EMACAddr[3],  EMACAddr[4],  EMACAddr[5]);
00551         DB;
00552
00553         Emac_Config.Mode = EMAC_MODE_AUTO;
00554         Emac_Config.pbEMAC_Addr = EMACAddr;
00555         // Initialize EMAC module with given parameter
00556         while (EMAC_Init(&Emac_Config) == ERROR){
00557                 // Delay for a while then continue initializing EMAC module
00558                 _DBG_("Error during initializing EMAC, restart after a while");
00559                 for (i = 0x100000; i; i--);
00560         }
00561         // Enable all interrupt
00562         EMAC_IntCmd((EMAC_INT_RX_OVERRUN | EMAC_INT_RX_ERR | EMAC_INT_RX_FIN \
00563                         | EMAC_INT_RX_DONE | EMAC_INT_TX_UNDERRUN | EMAC_INT_TX_ERR \
00564                         | EMAC_INT_TX_FIN | EMAC_INT_TX_DONE), ENABLE);
00565         NVIC_SetPriority(ENET_IRQn, 0);
00566         NVIC_EnableIRQ(ENET_IRQn);
00567         _DBG_("Initialize EMAC complete");
00568 }
00569
00570 /*-------------------------MAIN FUNCTION------------------------------*/
00571 /*********************************************************************/
00576 int c_entry (void)
00577 {
00578         /* Data Packet format */
00579         EMAC_PACKETBUF_Type DataPacket;
00580
00581         uint8_t *txptr;
00582         uint32_t i = 0;
00583
00584 #if TX_ONLY
00585         uint32_t j;
00586 #endif
00587
00588 #if BOUNCE_RX
00589         uint8_t *rxptr;
00590 #endif
00591
00592 #if ENABLE_HASH
00593         uint8_t dstAddr[] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06};
00594 #endif
00595         NVIC_SetPriorityGrouping(4);  //sets PRIGROUP to 3:2 (XXX:YY)
00596
00597         //Init LED
00598         LED_Init();
00599
00600         /* Initialize debug via UART0
00601          * – 115200bps
00602          * – 8 data bit
00603          * – No parity
00604          * – 1 stop bit
00605          * – No flow control
00606          */
00607         debug_frmwrk_init();
00608
00609         // Init EMAC
00610         Usr_Init_Emac();
00611
00612 #if TX_ONLY
00613 #ifdef MCB_LPC_1768
00614         EINT0_Init();
00615 #elif defined(IAR_LPC_1768)
00616         EINT3_Init();
00617 #endif
00618         txptr = (uint8_t *)gTxBuf;
00619         /* pre-format the transmit packets */
00620         PacketGen(txptr);
00621 #endif
00622
00623 #if ENABLE_HASH
00624   EMAC_SetHashFilter(dstAddr, ENABLE);
00625 #endif
00626
00627
00628 #if BOUNCE_RX
00629   /* copy just received data from RX buffer to TX buffer and send out */
00630   txptr = (uint8_t *)gTxBuf;
00631   rxptr = (uint8_t *)gRxBuf;
00632 #endif
00633
00634 #if ENABLE_WOL
00635
00636   _DBG_("Enter Sleep mode now...");
00637   /*
00638    * On default state, All Multicast frames, All Broadcast frames and Frame that matched
00639    * with station address (unicast) are accepted.
00640    * To make WoL is possible, enable Rx Magic Packet and RxFilter Enable WOL
00641    */
00642   EMAC_SetFilterMode((EMAC_RFC_PFILT_WOL_EN | EMAC_RFC_MAGP_WOL_EN), ENABLE);
00643
00644         for (i = 0; i < 5; i++){
00645                 LED_Blink(PD_LED_PIN);  /* Indicating system is in power down now. */
00646         }
00647
00648         // Disable irq interrupt
00649         __disable_irq();
00650
00651         /* Currently, support Sleep mode */
00652     /* enter sleep mode */
00653     LPC_SC->PCON = 0x0;
00654
00655     /* Sleep Mode*/
00656     __WFI();
00657
00658     // CPU will be suspend here...
00659
00660         /* From power down to WOL, the PLL needs to be reconfigured,
00661         otherwise, the CCLK will be generated from 4Mhz IRC instead
00662         of main OSC 12Mhz */
00663         /* Initialize system clock */
00664         SystemInit();
00665
00666         /*
00667          * Initialize debug via UART
00668          */
00669         debug_frmwrk_init();
00670         /*
00671          * Init LED
00672          */
00673         LED_Init();
00674         _DBG_("Wake up from sleep mode");
00675
00676         /* Calling EMACInit() is overkill which also initializes the PHY, the
00677         main reason to do that is to make sure the descriptors and descriptor
00678         status for both TX and RX are clean and ready to use. It won't go wrong. */
00679         Usr_Init_Emac();
00680         // Re-Enable irq interrupt
00681         __enable_irq();
00682
00683 #endif                                                                          /* endif ENABLE_WOL */
00684
00685 #if BOUNCE_RX
00686 while( 1 )
00687 {
00688         LED_Blink(BLINK_LED_PIN);
00689         if ( PacketReceived == TRUE )
00690         {
00691           PacketReceived = FALSE;
00692                 /* Reverse Source and Destination, then copy the body */
00693                 memcpy( (uint8_t *)txptr, (uint8_t *)(rxptr+6), 6);
00694                 memcpy( (uint8_t *)(txptr+6), (uint8_t *)rxptr, 6);
00695                 memcpy( (uint8_t *)(txptr+12), (uint8_t *)(rxptr+12), (ReceiveLength - 12));
00696                 _DBG_("Send packet");
00697                 DataPacket.pbDataBuf = (uint32_t *)txptr;
00698                 DataPacket.ulDataLen = ReceiveLength;
00699                 EMAC_WritePacketBuffer(&DataPacket);
00700                 EMAC_UpdateTxProduceIndex();
00701         }
00702 }
00703 #endif  /* endif BOUNCE_RX */
00704
00705 #if TX_ONLY
00706         /* Transmit packets only */
00707         while ( 1 ) {
00708                 while (Pressed == RESET){
00709                         LED_Blink(BLINK_LED_PIN);
00710                 }
00711                 Pressed = RESET;
00712                 txptr = (uint8_t *)gTxBuf;
00713                 _DBG_("Send packet");
00714                 LED_Blink(TX_LED_PIN);
00715                 DataPacket.pbDataBuf = (uint32_t *)txptr;
00716                 // Note that there're 4-byte CRC added
00717                 DataPacket.ulDataLen = TX_PACKET_SIZE + 4;
00718                 EMAC_WritePacketBuffer(&DataPacket);
00719                 EMAC_UpdateTxProduceIndex();
00720                 for ( j = 0; j < 0x200000; j++ );       /* delay */
00721         }
00722 #endif  /* endif TX_ONLY */
00723 }
00724
00725
00726
00727 /* With ARM and GHS toolsets, the entry point is main() - this will
00728    allow the linker to generate wrapper code to setup stacks, allocate
00729    heap area, and initialize and copy code and data segments. For GNU
00730    toolsets, the entry point is through __start() in the crt0_gnu.asm
00731    file, and that startup code will setup stacks and data */
00732 int main(void)
00733 {
00734     return c_entry();
00735 }
00736
00737
00738 #ifdef  DEBUG
00739 /*******************************************************************************
00740 * @brief                Reports the name of the source file and the source line number
00741 *                               where the CHECK_PARAM error has occurred.
00742 * @param[in]    file Pointer to the source file name
00743 * @param[in]    line assert_param error line source number
00744 * @return               None
00745 *******************************************************************************/
00746 void check_failed(uint8_t *file, uint32_t line)
00747 {
00748         /* User can add his own implementation to report the file name and line number,
00749          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00750
00751         /* Infinite loop */
00752         while(1);
00753 }
00754 #endif
00755
00756 /*****************************************************************************
00757 **                            End Of File
00758 *****************************************************************************/
00759
00760 /*
00761  * @}
00762  */
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/EXTINT_Sleep/extint_sleep.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/EXTINT_Sleep/extint_sleep.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          EXTINT_Sleep.c                          2010-05-21
00003 */
00026 #include "LPC17xx.h"
00027 #include "lpc17xx_gpio.h"
00028 #include "lpc17xx_exti.h"
00029 #include "lpc17xx_pinsel.h"
00030 #include "lpc17xx_clkpwr.h"
00031 #include "lpc17xx_libcfg.h"
00032 #include "debug_frmwrk.h"
00033
00034
00035 /* Example group ----------------------------------------------------------- */
00041 /************************** PRIVATE DEFINITIONS *************************/
00042 #define MCB_LPC_1768
00043 //#define IAR_LPC_1768
00044
00045 #ifdef MCB_LPC_1768
00046 /* LED pin in byte style on P1 */
00047 #define _EXT_IRQ        EINT0_IRQn
00048 #define _EXTINT         EXTI_EINT0
00049 #elif defined (IAR_LPC_1768)
00050 #define _EXT_IRQ        EINT2_IRQn
00051 #define _EXTINT         EXTI_EINT2
00052 #endif
00053
00054 /************************** PRIVATE FUNCTIONS *************************/
00055 uint8_t menu[]=
00056         "********************************************************************************\n\r"
00057         "Hello NXP Semiconductors \n\r"
00058         "Power control demo \n\r"
00059         "\t - MCU: LPC17xx \n\r"
00060         "\t - Core: ARM CORTEX-M3 \n\r"
00061         "\t - Communicate via: UART0 - 115200 bps \n\r"
00062         "This example used to enter system in sleep mode and wake up it by using external \n\r"
00063         "interrupt\n\r"
00064         "********************************************************************************\n\r";
00065
00066 /* Interrupt service routines */
00067 #ifdef MCB_LPC_1768
00068 void EINT0_IRQHandler(void);
00069 #elif defined (IAR_LPC_1768)
00070 void EINT2_IRQHandler(void);
00071 #endif
00072
00073 void print_menu(void);
00074 void delay (void);
00075 void InitLED(void);
00076
00077 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00078 #ifdef MCB_LPC_1768
00079 /*********************************************************************/
00084 void EINT0_IRQHandler(void)
00085 {
00086           //clear the EINT0 flag
00087           EXTI_ClearEXTIFlag(EXTI_EINT0);
00088
00089 }
00090 #elif defined (IAR_LPC_1768)
00091 /*********************************************************************/
00096 void EINT2_IRQHandler(void)
00097 {
00098           //clear the EINT2 flag
00099           EXTI_ClearEXTIFlag(EXTI_EINT2);
00100 }
00101
00102 #endif
00103
00104 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00105 /*********************************************************************/
00110 void print_menu(void)
00111 {
00112         _DBG(menu);
00113 }
00114 /*********************************************************************/
00119 void delay (void) {
00120   unsigned int i;
00121
00122   for (i = 0; i < 0x100000; i++) {
00123   }
00124 }
00125
00126 /*********************************************************************/
00131 void InitLED(void)
00132 {
00133 #ifdef MCB_LPC_1768
00134 /* Use LEDs P1.28 and P1.29*/
00135         GPIO_SetDir(1, (1<<28)|(1<<29), 1); //set P1.28 and P1.29 is output
00136         GPIO_ClearValue(1, (1<<28)|(1<<29));//Turn off LEDs
00137 #elif defined (IAR_LPC_1768)
00138 /* Use LED1 (P1.25) and LED2 (P0.4)*/
00139         GPIO_SetDir(1, (1<<25), 1); //set P1.25 is output
00140         GPIO_SetDir(0, (1<<4), 1);  //set P0.4 is output
00141         GPIO_SetValue(1, (1<<25));  //Turn off LED1
00142         GPIO_SetValue(0, (1<<4));       //Turn off LED2
00143 #endif
00144 }
00145
00146
00147 /*-------------------------MAIN FUNCTION------------------------------*/
00148 /*********************************************************************/
00153 int c_entry (void)
00154 {
00155         PINSEL_CFG_Type PinCfg;
00156         EXTI_InitTypeDef EXTICfg;
00157
00158         /* Initialize debug via UART0
00159          * – 115200bps
00160          * – 8 data bit
00161          * – No parity
00162          * – 1 stop bit
00163          * – No flow control
00164          */
00165         debug_frmwrk_init();
00166
00167         // print welcome screen
00168         print_menu();
00169
00170         /* Initialize LEDs
00171          * - If using MCB1700 board:
00172          *              LEDs: P1.28 and P1.29 are available
00173          * - If using IAR1700 board:
00174          *              LEDs: LED1(P1.25) and LED2(P0.4) are available
00175          * Turn off LEDs after initialize
00176          */
00177         InitLED();
00178
00179         /* Initialize EXT pin and registers
00180          * - If using MCB1700 board: EXTI0 is configured
00181          * - If using IAR1700 board: EXTI2 is configured
00182          */
00183 #ifdef MCB_LPC_1768
00184         /* P2.10 as /EINT0 */
00185         PinCfg.Funcnum = 1;
00186         PinCfg.OpenDrain = 0;
00187         PinCfg.Pinmode = 0;
00188         PinCfg.Pinnum = 10;
00189         PinCfg.Portnum = 2;
00190         PINSEL_ConfigPin(&PinCfg);
00191 #elif defined (IAR_LPC_1768)
00192         /* P2.12 as /EINT2 */
00193         PinCfg.Funcnum = 1;
00194         PinCfg.OpenDrain = 0;
00195         PinCfg.Pinmode = 0;
00196         PinCfg.Pinnum = 12;
00197         PinCfg.Portnum = 2;
00198         PINSEL_ConfigPin(&PinCfg);
00199 #endif
00200
00201         EXTI_Init();
00202
00203         EXTICfg.EXTI_Line = _EXTINT;
00204         /* edge sensitive */
00205         EXTICfg.EXTI_Mode = EXTI_MODE_EDGE_SENSITIVE;
00206         EXTICfg.EXTI_polarity = EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE;
00207         EXTI_ClearEXTIFlag(_EXTINT);
00208         EXTI_Config(&EXTICfg);
00209
00210         NVIC_SetPriorityGrouping(4);
00211         NVIC_SetPriority(_EXT_IRQ, 0);
00212         NVIC_EnableIRQ(_EXT_IRQ);
00213
00214         _DBG_("First LED is blinking in normal mode...\n\r"     \
00215                   "Press '1' to enter system in sleep mode.\n\r"\
00216                   "If you want to wake-up the system, press INT/WAKE-UP button.");
00217         while(_DG !='1')
00218         {
00219                 //Blink first LED
00220 #ifdef MCB_LPC_1768
00221                 //blink LED P1.28
00222                 GPIO_SetValue(1, (1<<28));
00223                 delay();
00224                 GPIO_ClearValue(1, (1<<28));
00225                 delay();
00226 #elif defined (IAR_LPC_1768)
00227                 //blink LED1 (P1.25)
00228                 GPIO_SetValue(1, (1<<25));
00229                 delay();
00230                 GPIO_ClearValue(1, (1<<25));
00231                 delay();
00232 #endif
00233         }
00234
00235         _DBG_("Sleeping...");
00236         // Enter target power down mode
00237         CLKPWR_Sleep();
00238
00239         // MCU will be here after waking up
00240         _DBG_("System wake-up! Second LED is blinking...");
00241         //turn off first LED
00242 #ifdef MCB_LPC_1768
00243         GPIO_ClearValue(1, (1<<29));
00244 #elif defined (IAR_LPC_1768)
00245         GPIO_SetValue(1, (1<<25));
00246 #endif
00247         while (1)
00248         {
00249                 //Blink second LED
00250 #ifdef MCB_LPC_1768
00251                 //blink LED P1.29
00252                 GPIO_SetValue(1, (1<<29));
00253                 delay();
00254                 GPIO_ClearValue(1, (1<<29));
00255                 delay();
00256 #elif defined (IAR_LPC_1768)
00257                 //blink LED2 (P0.4)
00258                 GPIO_SetValue(0, (1<<4));
00259                 delay();
00260                 GPIO_ClearValue(0, (1<<4));
00261                 delay();
00262 #endif
00263         }
00264 }
00265
00266
00267 /* With ARM and GHS toolsets, the entry point is main() - this will
00268    allow the linker to generate wrapper code to setup stacks, allocate
00269    heap area, and initialize and copy code and data segments. For GNU
00270    toolsets, the entry point is through __start() in the crt0_gnu.asm
00271    file, and that startup code will setup stacks and data */
00272 int main(void)
00273 {
00274     return c_entry();
00275 }
00276
00277 #ifdef  DEBUG
00278 /*******************************************************************************
00279 * @brief                Reports the name of the source file and the source line number
00280 *                               where the CHECK_PARAM error has occurred.
00281 * @param[in]    file Pointer to the source file name
00282 * @param[in]    line assert_param error line source number
00283 * @return               None
00284 *******************************************************************************/
00285 void check_failed(uint8_t *file, uint32_t line)
00286 {
00287         /* User can add his own implementation to report the file name and line number,
00288          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00289
00290         /* Infinite loop */
00291         while(1);
00292 }
00293 #endif
00294
00295 /*
00296  * @}
00297  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Flash_2_Ram_Test/flash_2_ram.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Flash_2_Ram_Test/flash_2_ram.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          flash_2_ram.c                           2010-05-21
00003 */
00026 #include "lpc17xx_gpdma.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "debug_frmwrk.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINTIONS*************************/
00038 #define DMA_SIZE                16
00039
00040 /************************** PRIVATE VARIABLES *************************/
00041 uint8_t menu[]=
00042         "********************************************************************************\n\r"
00043         "Hello NXP Semiconductors \n\r"
00044         "GPDMA demo \n\r"
00045         "\t - MCU: LPC17xx \n\r"
00046         "\t - Core: ARM CORTEX-M3 \n\r"
00047         "\t - Communicate via: UART0 - 115200 bps \n\r"
00048         "This example used to test GPDMA function by transfer data from Flash \n\r"
00049         "to RAM memory\n\r"
00050         "********************************************************************************\n\r";
00051 uint8_t menu2[] = "Demo terminated! \n\r";
00052 uint8_t err_menu[] = "Buffer Check fail!";
00053 uint8_t compl_menu[] = "Buffer Check success!";
00054
00055 //DMAScr_Buffer will be burn into flash when compile
00056 const uint32_t DMASrc_Buffer[DMA_SIZE]=
00057 {
00058         0x01020304,0x05060708,0x090A0B0C,0x0D0E0F10,
00059         0x11121314,0x15161718,0x191A1B1C,0x1D1E1F20,
00060         0x21222324,0x25262728,0x292A2B2C,0x2D2E2F30,
00061         0x31323334,0x35363738,0x393A3B3C,0x3D3E3F40
00062 };
00063
00064 uint32_t DMADest_Buffer[DMA_SIZE];
00065
00066 // Terminal Counter flag for Channel 0
00067 __IO uint32_t Channel0_TC;
00068
00069 // Error Counter flag for Channel 0
00070 __IO uint32_t Channel0_Err;
00071
00072 /*-------------------------MAIN FUNCTION------------------------------*/
00073 void DMA_IRQHandler (void);
00074
00075 void print_menu(void);
00076 void Buffer_Init(void);
00077 void Error_Loop(void);
00078
00079 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00080 /*********************************************************************/
00085 void DMA_IRQHandler (void)
00086 {
00087         // check GPDMA interrupt on channel 0
00088         if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 0)){ //check interrupt status on channel 0
00089                 // Check counter terminal status
00090                 if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 0)){
00091                         // Clear terminate counter Interrupt pending
00092                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 0);
00093                                 Channel0_TC++;
00094                 }
00095                 if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, 0)){
00096                         // Clear error counter Interrupt pending
00097                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 0);
00098                         Channel0_Err++;
00099                 }
00100         }
00101 }
00102
00103 /*-------------------------PRIVATE FUNCTIONS-----------------------------*/
00104 /*********************************************************************/
00109 void print_menu(void)
00110 {
00111         _DBG(menu);
00112 }
00113
00114
00115 /*********************************************************************/
00120 void Buffer_Verify(void)
00121 {
00122         uint8_t i;
00123         uint32_t *src_addr = (uint32_t *)DMASrc_Buffer;
00124         uint32_t *dest_addr = (uint32_t *)DMADest_Buffer;
00125
00126         for ( i = 0; i < DMA_SIZE; i++ )
00127         {
00128                 if ( *src_addr++ != *dest_addr++ )
00129                 {
00130                         /* Call Error Loop */
00131                         Error_Loop();
00132                 }
00133         }
00134 }
00135
00136
00137 /*********************************************************************/
00142 void Error_Loop(void)
00143 {
00144         _DBG(err_menu);
00145
00146         /* Loop forever */
00147         while (1);
00148 }
00149
00150
00151 /*-------------------------MAIN FUNCTION--------------------------------*/
00152 /*********************************************************************/
00157 int c_entry(void)
00158 {
00159         GPDMA_Channel_CFG_Type GPDMACfg;
00160
00161         /* Initialize debug via UART0
00162          * – 115200bps
00163          * – 8 data bit
00164          * – No parity
00165          * – 1 stop bit
00166          * – No flow control
00167          */
00168         debug_frmwrk_init();
00169
00170         // print welcome screen
00171         print_menu();
00172
00173         /* GPDMA block section -------------------------------------------- */
00174     /* Disable GPDMA interrupt */
00175     NVIC_DisableIRQ(DMA_IRQn);
00176     /* preemption = 1, sub-priority = 1 */
00177     NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
00178
00179     /* Initialize GPDMA controller */
00180         GPDMA_Init();
00181
00182         // Setup GPDMA channel --------------------------------
00183         // channel 0
00184         GPDMACfg.ChannelNum = 0;
00185         // Source memory
00186         GPDMACfg.SrcMemAddr = (uint32_t)DMASrc_Buffer;
00187         // Destination memory
00188         GPDMACfg.DstMemAddr = (uint32_t)DMADest_Buffer;
00189         // Transfer size
00190         GPDMACfg.TransferSize = DMA_SIZE;
00191         // Transfer width
00192         GPDMACfg.TransferWidth = GPDMA_WIDTH_WORD;
00193         // Transfer type
00194         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2M;
00195         // Source connection - unused
00196         GPDMACfg.SrcConn = 0;
00197         // Destination connection - unused
00198         GPDMACfg.DstConn = 0;
00199         // Linker List Item - unused
00200         GPDMACfg.DMALLI = 0;
00201         // Setup channel with given parameter
00202         GPDMA_Setup(&GPDMACfg);
00203
00204         /* Reset terminal counter */
00205         Channel0_TC = 0;
00206         /* Reset Error counter */
00207         Channel0_Err = 0;
00208
00209         _DBG_("Start transfer...");
00210
00211         // Enable GPDMA channel 0
00212         GPDMA_ChannelCmd(0, ENABLE);
00213
00214         /* Enable GPDMA interrupt */
00215         NVIC_EnableIRQ(DMA_IRQn);
00216
00217         /* Wait for GPDMA processing complete */
00218         while ((Channel0_TC == 0) && (Channel0_Err == 0));
00219
00220         /* Verify buffer */
00221         Buffer_Verify();
00222
00223         _DBG(compl_menu);
00224
00225     /* Loop forever */
00226     while(1);
00227 }
00228
00229 /* With ARM and GHS toolsets, the entry point is main() - this will
00230  allow the linker to generate wrapper code to setup stacks, allocate
00231  heap area, and initialize and copy code and data segments. For GNU
00232  toolsets, the entry point is through __start() in the crt0_gnu.asm
00233  file, and that startup code will setup stacks and data */
00234 int main(void) {
00235         return c_entry();
00236 }
00237
00238 #ifdef  DEBUG
00239 /*******************************************************************************
00240  * @brief               Reports the name of the source file and the source line number
00241  *                              where the CHECK_PARAM error has occurred.
00242  * @param[in]   file Pointer to the source file name
00243  * @param[in]    line assert_param error line source number
00244  * @return              None
00245  *******************************************************************************/
00246 void check_failed(uint8_t *file, uint32_t line) {
00247         /* User can add his own implementation to report the file name and line number,
00248          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00249
00250         /* Infinite loop */
00251         while (1)
00252                 ;
00253 }
00254 #endif
00255
00256 /*
00257  * @}
00258  */
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/FreqMeasure/freqmeasure.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/FreqMeasure/freqmeasure.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          freqmeasure.c                           2010-07-16
00003 */
00026 #include "lpc17xx_timer.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE VARIABLES *************************/
00039 uint8_t menu1[] =
00040 "********************************************************************************\n\r"
00041 "Hello NXP Semiconductors \n\r"
00042 "Timer measure frequency demo \n\r"
00043 "\t - MCU: LPC17xx \n\r"
00044 "\t - Core: ARM Cortex-M3 \n\r"
00045 "\t - Communicate via: UART0 -  115200 bps \n\r"
00046 " Use timer 0 to measure input signal frequency through its CAP0.0 \n\r"
00047 " Use timer 2 to generate different frequency signals \n\r"
00048 "********************************************************************************\n\r";
00049
00050 TIM_TIMERCFG_Type TIM_ConfigStruct;
00051 TIM_CAPTURECFG_Type TIM_CaptureConfigStruct;
00052
00053 BOOL_8 first_capture,done;
00054 uint32_t capture;
00055 uint8_t count=0;
00056 /************************** PRIVATE FUNCTIONS *************************/
00057 /* Interrupt service routines */
00058 void TIMER0_IRQHandler(void);
00059
00060 void print_menu(void);
00061 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00062 /*********************************************************************/
00067 void TIMER0_IRQHandler(void)
00068 {
00069         if (TIM_GetIntCaptureStatus(LPC_TIM0,TIM_MR0_INT))
00070         {
00071                 TIM_ClearIntCapturePending(LPC_TIM0,TIM_MR0_INT);
00072                 if(first_capture==TRUE)
00073                 {
00074                         TIM_Cmd(LPC_TIM0,DISABLE);
00075                         TIM_ResetCounter(LPC_TIM0);
00076                         TIM_Cmd(LPC_TIM0,ENABLE);
00077                         count++;
00078                         if(count==5)first_capture=FALSE; //stable
00079                 }
00080                 else
00081                 {
00082                         count=0; //reset count for next use
00083                         done=TRUE;
00084                         capture = TIM_GetCaptureValue(LPC_TIM0,TIM_COUNTER_INCAP0);
00085                 }
00086         }
00087 }
00088
00089 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00090 /*********************************************************************/
00095 void print_menu(void)
00096 {
00097         _DBG(menu1);
00098 }
00099
00100
00101 /*-------------------------MAIN FUNCTION------------------------------*/
00102 /*********************************************************************/
00107 int c_entry(void)
00108 {
00109         PINSEL_CFG_Type PinCfg;
00110         TIM_MATCHCFG_Type TIM_MatchConfigStruct;
00111         uint8_t idx;
00112         uint16_t tem;
00113         uint32_t freq,temcap;
00114         /* Initialize debug via UART0
00115          * – 115200bps
00116          * – 8 data bit
00117          * – No parity
00118          * – 1 stop bit
00119          * – No flow control
00120          */
00121         debug_frmwrk_init();
00122
00123         // print welcome screen
00124         print_menu();
00125
00126
00127         //Config P1.26 as CAP0.0
00128         PinCfg.Funcnum = 3;
00129         PinCfg.OpenDrain = 0;
00130         PinCfg.Pinmode = 0;
00131         PinCfg.Portnum = 1;
00132         PinCfg.Pinnum = 26;
00133         PINSEL_ConfigPin(&PinCfg);
00134         // Configure P0.6 as MAT2.0
00135         PinCfg.Funcnum = 3;
00136         PinCfg.OpenDrain = 0;
00137         PinCfg.Pinmode = 0;
00138         PinCfg.Portnum = 0;
00139         PinCfg.Pinnum = 6;
00140         PINSEL_ConfigPin(&PinCfg);
00141
00142         while(1)
00143         {
00144                 // Initialize timer 0, prescale count time of 1uS
00145                 TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
00146                 TIM_ConfigStruct.PrescaleValue  = 1;
00147
00148                 // use channel 0, CAPn.0
00149                 TIM_CaptureConfigStruct.CaptureChannel = 0;
00150                 // Enable capture on CAPn.0 rising edge
00151                 TIM_CaptureConfigStruct.RisingEdge = ENABLE;
00152                 // Enable capture on CAPn.0 falling edge
00153                 TIM_CaptureConfigStruct.FallingEdge = DISABLE;
00154                 // Generate capture interrupt
00155                 TIM_CaptureConfigStruct.IntOnCaption = ENABLE;
00156
00157                 // Set configuration for Tim_config and Tim_MatchConfig
00158                 TIM_Init(LPC_TIM0, TIM_TIMER_MODE,&TIM_ConfigStruct);
00159                 TIM_ConfigCapture(LPC_TIM0, &TIM_CaptureConfigStruct);
00160                 TIM_ResetCounter(LPC_TIM0);
00162                 idx=0;freq=0;tem=0;
00163                 while(idx<3)
00164                 {
00165                         if(idx==0)
00166                         _DBG("\n\rPlease input frequency (from 1 to 999 hz):");
00167                         tem = _DG;
00168                         switch(tem)
00169                         {
00170                         case '0':case'1':case '2':case '3':case '4':case '5':case '6':case '7':case'8':case '9':
00171                                 tem = tem - 0x30;
00172                                 idx++;
00173                                 if(idx==1) tem = tem * 100;
00174                                 else if (idx==2) tem = tem * 10;
00175                                 freq = freq + tem;
00176                                 if(idx==3)_DBD16(freq);
00177                                 tem = 0;
00178                                 break;
00179                         default:
00180                                 _DBG("...Please input digits from 0 to 9 only!");
00181                                 idx = 0; tem = 0; freq = 0;
00182                                 break;
00183                         }
00184                 }
00185                 TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
00186                 TIM_ConfigStruct.PrescaleValue  = 1;//1us
00187                 TIM_Init(LPC_TIM2, TIM_TIMER_MODE,&TIM_ConfigStruct);
00188
00189                 // use channel 0, MR0
00190                 TIM_MatchConfigStruct.MatchChannel = 0;
00191                 // Disable interrupt when MR0 matches the value in TC register
00192                 TIM_MatchConfigStruct.IntOnMatch   = FALSE;
00193                 //Enable reset on MR0: TIMER will reset if MR0 matches it
00194                 TIM_MatchConfigStruct.ResetOnMatch = TRUE;
00195                 //Stop on MR0 if MR0 matches it
00196                 TIM_MatchConfigStruct.StopOnMatch  = FALSE;
00197                 //Toggle MR0.0 pin if MR0 matches it
00198                 TIM_MatchConfigStruct.ExtMatchOutputType =TIM_EXTMATCH_TOGGLE;
00199                 // Set Match value
00200                 TIM_MatchConfigStruct.MatchValue   = 500000/freq;
00201                 TIM_ConfigMatch(LPC_TIM2,&TIM_MatchConfigStruct);
00202
00203                 TIM_Cmd(LPC_TIM2,ENABLE);
00205                 /* preemption = 1, sub-priority = 1 */
00206                 NVIC_SetPriority(TIMER0_IRQn, ((0x01<<3)|0x01));
00207                 /* Enable interrupt for timer 0 */
00208                 NVIC_EnableIRQ(TIMER0_IRQn);
00209
00210                 first_capture = TRUE;done=FALSE;capture=0;
00211                 // To start timer 0
00212                 TIM_Cmd(LPC_TIM0,ENABLE);
00213
00214                 _DBG("\n\rMeasuring......");
00215                 while(done==FALSE);
00216                 temcap = 1000000 / capture;_DBD16(temcap);_DBG("hz");
00217                 NVIC_DisableIRQ(TIMER0_IRQn);
00218                 TIM_DeInit(LPC_TIM0);
00219                 TIM_DeInit(LPC_TIM2);
00220                 _DBG("\n\rPress c to continue measuring other signals...");
00221                 while(_DG != 'c');
00222         }
00223 }
00224
00225 /* Support required entry point for other toolchain */
00226 int main (void)
00227 {
00228         return c_entry();
00229 }
00230 #ifdef  DEBUG
00231 /*******************************************************************************
00232 * @brief                Reports the name of the source file and the source line number
00233 *                               where the CHECK_PARAM error has occurred.
00234 * @param[in]    file Pointer to the source file name
00235 * @param[in]    line assert_param error line source number
00236 * @return               None
00237 *******************************************************************************/
00238 void check_failed(uint8_t *file, uint32_t line)
00239 {
00240         /* User can add his own implementation to report the file name and line number,
00241          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00242
00243         /* Infinite loop */
00244         while(1);
00245 }
00246 #endif
00247 /*
00248  * @}
00249  */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

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  • a
  • b
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  • e
  • f
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  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- k -

  • Kd : arm_pid_instance_q15 , arm_pid_instance_q31 , arm_pid_instance_f32
  • Ki : arm_pid_instance_q15 , arm_pid_instance_q31 , arm_pid_instance_f32
  • Kp : arm_pid_instance_f32 , arm_pid_instance_q15 , arm_pid_instance_q31
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- l -

  • L : arm_fir_interpolate_instance_q15 , arm_fir_interpolate_instance_q31 , arm_fir_interpolate_instance_f32
  • lblenerr : uip_stats
  • lc : pt
  • LCR : LPC_UART1_TypeDef , LPC_UART_TypeDef , LPC_UART0_TypeDef
  • lease_time : dhcpc_state
  • left : psock_buf
  • len : httpd_state , tcpip_hdr , icmpip_hdr , uip_conn , uip_tcpip_hdr , uip_icmpip_hdr , CAN_MSG_Type , uip_udpip_hdr , ethip_hdr , dns_answer , httpd_fs_file , httpd_fsdata_file , httpd_fsdata_file_noconst
  • length : SSP_DATA_SETUP_Type , SPI_DATA_SETUP_Type
  • LenPos : _USB_DMA_DESCRIPTOR
  • LER : LPC_PWM_TypeDef
  • line : telnetd_line
  • lines : telnetd_state
  • Link : _USB_DMA_DESCRIPTOR
  • LOAD : SysTick_Type
  • lowerEID : EFF_GPR_Entry
  • lowerID : SFF_GPR_Entry
  • lport : uip_conn
  • LSR : LPC_UART_TypeDef , LPC_UART1_TypeDef , LPC_UART0_TypeDef
  • LUTerr : LPC_CANAF_TypeDef
  • LUTerrAd : LPC_CANAF_TypeDef
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- m -

  • M : arm_fir_decimate_instance_q15 , arm_fir_decimate_instance_q31 , arm_fir_decimate_instance_f32
  • MAC1 : LPC_EMAC_TypeDef
  • MAC2 : LPC_EMAC_TypeDef
  • mac_addr : dhcpc_state
  • mac_len : dhcpc_state
  • MADR : LPC_EMAC_TypeDef
  • mask : LPC_CANAF_RAM_TypeDef
  • MatchAddrValue : UART1_RS485_CTRLCFG_Type
  • MatchChannel : PWM_MATCHCFG_Type , TIM_MATCHCFG_Type
  • Matchvalue : PWM_Match_T
  • MatchValue : TIM_MATCHCFG_Type
  • maxDelay : arm_fir_sparse_instance_q31 , arm_fir_sparse_instance_q15 , arm_fir_sparse_instance_q7 , arm_fir_sparse_instance_f32
  • MAXF : LPC_EMAC_TypeDef
  • MaxSize : _USB_DMA_DESCRIPTOR
  • MCCAP_CLR : LPC_MCPWM_TypeDef
  • MCCAPCON : LPC_MCPWM_TypeDef
  • MCCAPCON_CLR : LPC_MCPWM_TypeDef
  • MCCAPCON_SET : LPC_MCPWM_TypeDef
  • MCCCP : LPC_MCPWM_TypeDef
  • MCCNTCON : LPC_MCPWM_TypeDef
  • MCCNTCON_CLR : LPC_MCPWM_TypeDef
  • MCCNTCON_SET : LPC_MCPWM_TypeDef
  • MCCON : LPC_MCPWM_TypeDef
  • MCCON_CLR : LPC_MCPWM_TypeDef
  • MCCON_SET : LPC_MCPWM_TypeDef
  • MCCR0 : LPC_MCPWM_TypeDef
  • MCCR1 : LPC_MCPWM_TypeDef
  • MCCR2 : LPC_MCPWM_TypeDef
  • MCDEADTIME : LPC_MCPWM_TypeDef
  • mcena : I2S_MODEConf_Type
  • MCFG : LPC_EMAC_TypeDef
  • MCINTEN : LPC_MCPWM_TypeDef
  • MCINTEN_CLR : LPC_MCPWM_TypeDef
  • MCINTEN_SET : LPC_MCPWM_TypeDef
  • MCINTFLAG : LPC_MCPWM_TypeDef
  • MCINTFLAG_CLR : LPC_MCPWM_TypeDef
  • MCINTFLAG_SET : LPC_MCPWM_TypeDef
  • MCMD : LPC_EMAC_TypeDef
  • MCPER0 : LPC_MCPWM_TypeDef
  • MCPER1 : LPC_MCPWM_TypeDef
  • MCPER2 : LPC_MCPWM_TypeDef
  • MCPW0 : LPC_MCPWM_TypeDef
  • MCPW1 : LPC_MCPWM_TypeDef
  • MCPW2 : LPC_MCPWM_TypeDef
  • MCR : LPC_TIM_TypeDef , LPC_PWM_TypeDef , LPC_UART1_TypeDef
  • MCTIM0 : LPC_MCPWM_TypeDef
  • MCTIM1 : LPC_MCPWM_TypeDef
  • MCTIM2 : LPC_MCPWM_TypeDef
  • MemDataAccCtrl : _MADCTR_Data_t
  • mimetype : webclient_state
  • MIN : RTC_TIME_Type , LPC_RTC_TypeDef
  • MIND : LPC_EMAC_TypeDef
  • MIS : LPC_SSP_TypeDef
  • ML : _MADCTR_Data_t , _DATCTR_Data_t
  • MMCTRL : LPC_I2C_TypeDef
  • MMFAR : SCB_Type
  • MMFR : SCB_Type
  • MOD : LPC_CAN_TypeDef
  • Mode : EMAC_CFG_Type , SPI_CFG_Type , _COLMOD_Data_t , SSP_CFG_Type
  • Module_ID : LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • mono : I2S_CFG_Type
  • MONTH : RTC_TIME_Type , LPC_RTC_TypeDef
  • MR0 : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • MR1 : LPC_PWM_TypeDef , LPC_TIM_TypeDef
  • MR2 : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • MR3 : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • MR4 : LPC_PWM_TypeDef
  • MR5 : LPC_PWM_TypeDef
  • MR6 : LPC_PWM_TypeDef
  • MRDD : LPC_EMAC_TypeDef
  • msg : smtp_state
  • msglen : smtp_state
  • MSR : LPC_UART1_TypeDef
  • mss : uip_conn
  • mu : arm_lms_norm_instance_f32 , arm_lms_instance_q15 , arm_lms_instance_f32 , arm_lms_norm_instance_q31 , arm_lms_norm_instance_q15 , arm_lms_instance_q31
  • mute : I2S_CFG_Type
  • MV : _DATCTR_Data_t , _MADCTR_Data_t
  • MWTD : LPC_EMAC_TypeDef
  • MX : _MADCTR_Data_t , _DATCTR_Data_t
  • MY : _DATCTR_Data_t , _MADCTR_Data_t
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- n -

  • N : arm_dct4_instance_f32 , arm_dct4_instance_q31 , APSR_Type , xPSR_Type , arm_dct4_instance_q15
  • name : httpd_cgi_call , httpd_fsdata_file , httpd_fsdata_file_noconst , hello_world_state , namemap
  • Nby2 : arm_dct4_instance_f32 , arm_dct4_instance_q31 , arm_dct4_instance_q15
  • netmask : dhcpc_state , uip_fw_netif
  • next : httpd_fsdata_file , httpd_fsdata_file_noconst , uip_fw_netif
  • NextLLI : GPDMA_LLI_Type
  • normalize : arm_dct4_instance_f32 , arm_dct4_instance_q31 , arm_dct4_instance_q15
  • NormalMultiDropMode_State : UART1_RS485_CTRLCFG_Type
  • nPRIV : CONTROL_Type
  • nrtx : uip_conn
  • numanswers : dns_hdr
  • numauthrr : dns_hdr
  • numCols : arm_bilinear_interp_instance_q31 , arm_bilinear_interp_instance_q15 , arm_bilinear_interp_instance_q7 , arm_matrix_instance_f32 , arm_matrix_instance_q15 , arm_matrix_instance_q31 , arm_bilinear_interp_instance_f32
  • numextrarr : dns_hdr
  • numquestions : dns_hdr
  • numRows : arm_matrix_instance_f32 , arm_matrix_instance_q15 , arm_matrix_instance_q31 , arm_bilinear_interp_instance_f32 , arm_bilinear_interp_instance_q31 , arm_bilinear_interp_instance_q15 , arm_bilinear_interp_instance_q7
  • numsent : telnetd_state
  • numStages : arm_biquad_casd_df1_inst_q31 , arm_biquad_casd_df1_inst_f32 , arm_biquad_casd_df1_inst_q15 , arm_fir_lattice_instance_q31 , arm_iir_lattice_instance_q15 , arm_iir_lattice_instance_q31 , arm_iir_lattice_instance_f32 , arm_biquad_cas_df1_32x64_ins_q31 , arm_biquad_cascade_df2T_instance_f32 , arm_fir_lattice_instance_q15 , arm_fir_lattice_instance_f32
  • numTaps : arm_fir_sparse_instance_q7 , arm_fir_instance_f32 , arm_fir_instance_q31 , arm_fir_instance_q15 , arm_lms_norm_instance_q31 , arm_fir_sparse_instance_q31 , arm_fir_sparse_instance_f32 , arm_fir_decimate_instance_q15 , arm_lms_instance_f32 , arm_lms_instance_q31 , arm_fir_decimate_instance_f32 , arm_fir_decimate_instance_q31 , arm_fir_instance_q7 , arm_lms_norm_instance_f32 , arm_lms_instance_q15 , arm_lms_norm_instance_q15 , arm_fir_sparse_instance_q15
  • nValues : arm_linear_interp_instance_f32
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
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  • e
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  • g
  • h
  • i
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  • q
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  • u
  • v
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  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- o -

  • onebyfftLen : arm_cfft_radix4_instance_f32
  • op : dhcp_msg
  • opcode : arp_hdr
  • OpenDrain : PINSEL_CFG_Type
  • optdata : tcpip_hdr , uip_tcpip_hdr
  • options : dhcp_msg
  • OTGClkCtrl : LPC_USB_TypeDef
  • OTGClkSt : LPC_USB_TypeDef
  • OTGIntClr : LPC_USB_TypeDef
  • OTGIntEn : LPC_USB_TypeDef
  • OTGIntSet : LPC_USB_TypeDef
  • OTGIntSt : LPC_USB_TypeDef
  • OTGStCtrl : LPC_USB_TypeDef
  • OTGTmr : LPC_USB_TypeDef
  • output : uip_fw_netif
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- z -

  • Z : APSR_Type , xPSR_Type
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
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  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- a -

  • A0 : arm_pid_instance_q15 , arm_pid_instance_q31 , arm_pid_instance_f32
  • A1 : arm_pid_instance_q15 , arm_pid_instance_q31 , arm_pid_instance_f32
  • A2 : arm_pid_instance_f32 , arm_pid_instance_q31
  • ABMode : UART_AB_CFG_Type
  • ackerr : uip_stats
  • ackno : tcpip_hdr , uip_tcpip_hdr
  • ACR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • ADCR : LPC_ADC_TypeDef
  • addr : neighbor_entry , uip_neighbor_addr , uip_eth_addr
  • ADDR0 : LPC_ADC_TypeDef
  • ADDR1 : LPC_ADC_TypeDef
  • ADDR2 : LPC_ADC_TypeDef
  • ADDR3 : LPC_ADC_TypeDef
  • ADDR4 : LPC_ADC_TypeDef
  • ADDR5 : LPC_ADC_TypeDef
  • ADDR6 : LPC_ADC_TypeDef
  • ADDR7 : LPC_ADC_TypeDef
  • ADGDR : LPC_ADC_TypeDef
  • ADINTEN : LPC_ADC_TypeDef
  • ADR : SCB_Type
  • ADRMATCH : LPC_UART1_TypeDef
  • ADSTAT : LPC_ADC_TypeDef
  • ADTRM : LPC_ADC_TypeDef
  • AFMR : LPC_CANAF_TypeDef
  • AFSR : SCB_Type
  • AIRCR : SCB_Type
  • ALDOM : LPC_RTC_TypeDef
  • ALDOW : LPC_RTC_TypeDef
  • ALDOY : LPC_RTC_TypeDef
  • ALHOUR : LPC_RTC_TypeDef
  • ALMIN : LPC_RTC_TypeDef
  • ALMON : LPC_RTC_TypeDef
  • ALSEC : LPC_RTC_TypeDef
  • ALYEAR : LPC_RTC_TypeDef
  • AMR : LPC_RTC_TypeDef
  • appstate : uip_conn
  • ATLE : _USB_DMA_DESCRIPTOR
  • AutoAddrDetect_State : UART1_RS485_CTRLCFG_Type
  • AutoDirCtrl_State : UART1_RS485_CTRLCFG_Type
  • AutoRestart : UART_AB_CFG_Type
Generated on Mon Nov 28 2011 11:15:29 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- b -

  • b : APSR_Type , IPSR_Type , CONTROL_Type , xPSR_Type
  • Baud_rate : UART_CFG_Type
  • BFAR : SCB_Type
  • bitReverseFlag : arm_cfft_radix4_instance_q31 , arm_cfft_radix4_instance_f32 , arm_cfft_radix4_instance_q15
  • bitReverseFlagR : arm_rfft_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32
  • bitRevFactor : arm_cfft_radix4_instance_f32 , arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31
  • BitsPP : _Bmp_t
  • bmQEIConfig : QEI_CFGOPT_Type
  • BTR : LPC_CAN_TypeDef
  • buf : psock , telnetd_state
  • BufAdr : _USB_DMA_DESCRIPTOR
  • BufLen : _USB_DMA_DESCRIPTOR
  • bufptr : telnetd_state , psock
  • bufsize : psock
  • BytesPP : _Bmp_t
Generated on Mon Nov 28 2011 11:15:29 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- c -

  • C : APSR_Type , xPSR_Type
  • CALIB : SysTick_Type
  • CALIBRATION : LPC_RTC_TypeDef
  • callback : I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • CANMSR : LPC_CANCR_TypeDef
  • CANRxSR : LPC_CANCR_TypeDef
  • CANSLEEPCLR : LPC_SC_TypeDef
  • CANTxSR : LPC_CANCR_TypeDef
  • CANWAKEFLAGS : LPC_SC_TypeDef
  • CaptureChannel : PWM_CAPTURECFG_Type , TIM_CAPTURECFG_Type
  • captureChannel : MCPWM_CAPTURE_CFG_Type
  • captureFalling : MCPWM_CAPTURE_CFG_Type
  • CaptureMode : QEI_CFG_Type
  • captureRising : MCPWM_CAPTURE_CFG_Type
  • CCLKCFG : LPC_SC_TypeDef
  • CCR : SCB_Type , LPC_TIM_TypeDef , LPC_PWM_TypeDef , LPC_RTC_TypeDef
  • Cfg : _USB_DMA_DESCRIPTOR
  • CFSR : SCB_Type
  • chaddr : dhcp_msg
  • channelDeadtimeEnable : MCPWM_CHANNEL_CFG_Type
  • channelDeadtimeValue : MCPWM_CHANNEL_CFG_Type
  • ChannelNum : GPDMA_Channel_CFG_Type
  • channelPeriodValue : MCPWM_CHANNEL_CFG_Type
  • channelPolarity : MCPWM_CHANNEL_CFG_Type
  • channelPulsewidthValue : MCPWM_CHANNEL_CFG_Type
  • channelTimercounterValue : MCPWM_CHANNEL_CFG_Type
  • channelType : MCPWM_CHANNEL_CFG_Type
  • channelUpdateEnable : MCPWM_CHANNEL_CFG_Type
  • CharacterOffset : _FontType_t
  • CharactersNuber : _FontType_t
  • chkerr : uip_stats
  • ciaddr : dhcp_msg
  • CIIR : LPC_RTC_TypeDef
  • class : dns_answer
  • CLKOUTCFG : LPC_SC_TypeDef
  • clksel : I2S_MODEConf_Type
  • CLKSRCSEL : LPC_SC_TypeDef
  • ClockRate : SPI_CFG_Type , SSP_CFG_Type
  • CLRT : LPC_EMAC_TypeDef
  • Cmd : _GLCD_CmdCtrl_t
  • CMPOS0 : LPC_QEI_TypeDef
  • CMPOS1 : LPC_QEI_TypeDef
  • CMPOS2 : LPC_QEI_TypeDef
  • CMR : LPC_CAN_TypeDef
  • CNT_ENA : DAC_CONVERTER_CFG_Type
  • ColourMode : _COLMOD_Data_t
  • Command : LPC_EMAC_TypeDef
  • commandstr : ptentry
  • conn : dhcpc_state
  • Control : GPDMA_LLI_Type
  • controller : EFF_Entry , FullCAN_Entry , SFF_Entry
  • controller1 : SFF_GPR_Entry , EFF_GPR_Entry
  • controller2 : SFF_GPR_Entry , EFF_GPR_Entry
  • count : httpd_state
  • Count : _USB_EP_DATA
  • counter : SPI_DATA_SETUP_Type
  • counterChannel : MCPWM_COUNT_CFG_Type
  • CounterOption : PWM_COUNTERCFG_Type , TIM_COUNTERCFG_Type
  • countFalling : MCPWM_COUNT_CFG_Type
  • CountInputSelect : TIM_COUNTERCFG_Type , PWM_COUNTERCFG_Type
  • countRising : MCPWM_COUNT_CFG_Type
  • CPACR : SCB_Type
  • CPHA : SPI_CFG_Type , SSP_CFG_Type
  • CPOL : SSP_CFG_Type , SPI_CFG_Type
  • CPSR : LPC_SSP_TypeDef
  • CPUID : SCB_Type
  • CR0 : LPC_TIM_TypeDef , LPC_SSP_TypeDef , LPC_PWM_TypeDef
  • CR1 : LPC_SSP_TypeDef , LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • CR2 : LPC_PWM_TypeDef
  • CR3 : LPC_PWM_TypeDef
  • CTCR : LPC_PWM_TypeDef , LPC_TIM_TypeDef
  • CTIME0 : LPC_RTC_TypeDef
  • CTIME1 : LPC_RTC_TypeDef
  • CTIME2 : LPC_RTC_TypeDef
  • CTRL : SysTick_Type
  • Ctrl : TX_Desc , RX_Desc
Generated on Mon Nov 28 2011 11:15:29 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- d -

  • DACCNTVAL : LPC_DAC_TypeDef
  • DACCTRL : LPC_DAC_TypeDef
  • DACR : LPC_DAC_TypeDef
  • data : httpd_fs_file , __SER_BUF_T , httpd_fsdata_file , httpd_fsdata_file_noconst , __CDC_BUF_T
  • dataA : CAN_MSG_Type
  • dataB : CAN_MSG_Type
  • Databit : SPI_CFG_Type , SSP_CFG_Type
  • Databits : UART_CFG_Type
  • DataOrder : SPI_CFG_Type
  • DBLBUF_ENA : DAC_CONVERTER_CFG_Type
  • DCRDR : CoreDebug_Type
  • DCRSR : CoreDebug_Type
  • default_router : dhcpc_state
  • DelayValue : UART1_RS485_CTRLCFG_Type
  • DEMCR : CoreDebug_Type
  • depth : I2S_DMAConf_Type
  • dest : uip_eth_hdr
  • destipaddr : tcpip_hdr , icmpip_hdr , fwcache_entry , uip_tcpip_hdr , uip_icmpip_hdr , uip_udpip_hdr , ethip_hdr
  • destport : uip_udpip_hdr , tcpip_hdr , uip_tcpip_hdr
  • DFR : SCB_Type
  • DFSR : SCB_Type
  • DHCSR : CoreDebug_Type
  • dhwaddr : arp_hdr
  • dipaddr : arp_hdr
  • Dir : _GLCD_CmdCtrl_t
  • dir : I2C_CFG_T
  • DirCtrlPin : UART1_RS485_CTRLCFG_Type
  • DirCtrlPol_Level : UART1_RS485_CTRLCFG_Type
  • DirectionInvert : QEI_CFG_Type
  • disable : FullCAN_Entry , SFF_Entry
  • disable1 : SFF_GPR_Entry
  • disable2 : SFF_GPR_Entry
  • DLL : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • DLM : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • DMA_ENA : DAC_CONVERTER_CFG_Type
  • DMACCConfig : LPC_GPDMACH_TypeDef
  • DMACCControl : LPC_GPDMACH_TypeDef
  • DMACCDestAddr : LPC_GPDMACH_TypeDef
  • DMACCLLI : LPC_GPDMACH_TypeDef
  • DMACConfig : LPC_GPDMA_TypeDef
  • DMACCSrcAddr : LPC_GPDMACH_TypeDef
  • DMACEnbldChns : LPC_GPDMA_TypeDef
  • DMACIntErrClr : LPC_GPDMA_TypeDef
  • DMACIntErrStat : LPC_GPDMA_TypeDef
  • DMACIntStat : LPC_GPDMA_TypeDef
  • DMACIntTCClear : LPC_GPDMA_TypeDef
  • DMACIntTCStat : LPC_GPDMA_TypeDef
  • DMACR : LPC_SSP_TypeDef
  • DMACRawIntErrStat : LPC_GPDMA_TypeDef
  • DMACRawIntTCStat : LPC_GPDMA_TypeDef
  • DMACSoftBReq : LPC_GPDMA_TypeDef
  • DMACSoftLBReq : LPC_GPDMA_TypeDef
  • DMACSoftLSReq : LPC_GPDMA_TypeDef
  • DMACSoftSReq : LPC_GPDMA_TypeDef
  • DMACSync : LPC_GPDMA_TypeDef
  • DMAIndex : I2S_DMAConf_Type
  • DMALLI : GPDMA_Channel_CFG_Type
  • DMAREQSEL : LPC_SC_TypeDef
  • dnsaddr : dhcpc_state
  • DOM : LPC_RTC_TypeDef , RTC_TIME_Type
  • DOW : RTC_TIME_Type , LPC_RTC_TypeDef
  • DOY : LPC_RTC_TypeDef , RTC_TIME_Type
  • DR : LPC_SSP_TypeDef
  • drop : uip_stats
  • DstAddr : GPDMA_LLI_Type
  • DstConn : GPDMA_Channel_CFG_Type
  • DstMemAddr : GPDMA_Channel_CFG_Type
Generated on Mon Nov 28 2011 11:15:29 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
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  • Variables
  • _
  • a
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  • h
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  • t
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  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- e -

  • EFF_GPR_NumEntry : AF_SectionDef
  • EFF_GPR_Sec : AF_SectionDef
  • EFF_GRP_sa : LPC_CANAF_TypeDef
  • EFF_NumEntry : AF_SectionDef
  • EFF_sa : LPC_CANAF_TypeDef
  • EFF_Sec : AF_SectionDef
  • EMR : LPC_TIM_TypeDef
  • ENDofTable : LPC_CANAF_TypeDef
  • energy : arm_lms_norm_instance_f32 , arm_lms_norm_instance_q31 , arm_lms_norm_instance_q15
  • err : namemap
  • ethaddr : arp_entry
  • ethhdr : ethip_hdr , arp_hdr
  • EWL : LPC_CAN_TypeDef
  • EXTI_Line : EXTI_InitTypeDef
  • EXTI_Mode : EXTI_InitTypeDef
  • EXTI_polarity : EXTI_InitTypeDef
  • EXTINT : LPC_SC_TypeDef
  • ExtMatchOutputType : TIM_MATCHCFG_Type
  • EXTMODE : LPC_SC_TypeDef
  • EXTPOLAR : LPC_SC_TypeDef
Generated on Mon Nov 28 2011 11:15:29 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- f -

  • FallingEdge : PWM_CAPTURECFG_Type , TIM_CAPTURECFG_Type
  • FC_NumEntry : AF_SectionDef
  • FCANIC0 : LPC_CANAF_TypeDef
  • FCANIC1 : LPC_CANAF_TypeDef
  • FCANIE : LPC_CANAF_TypeDef
  • FCR : LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_UART_TypeDef
  • FDR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • fftLen : arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31 , arm_cfft_radix4_instance_f32
  • fftLenBy2 : arm_rfft_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32
  • fftLenReal : arm_rfft_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32
  • FIFO_DMAMode : UART_FIFO_CFG_Type
  • FIFO_Level : UART_FIFO_CFG_Type
  • FIFO_ResetRxBuf : UART_FIFO_CFG_Type
  • FIFO_ResetTxBuf : UART_FIFO_CFG_Type
  • FIFOLVL : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • file : dhcp_msg , webclient_state , httpd_state
  • filename : httpd_state
  • FILTER : LPC_QEI_TypeDef
  • FIOCLR : GPIO_Byte_TypeDef , LPC_GPIO_TypeDef
  • FIOCLR0 : LPC_GPIO_TypeDef
  • FIOCLR1 : LPC_GPIO_TypeDef
  • FIOCLR2 : LPC_GPIO_TypeDef
  • FIOCLR3 : LPC_GPIO_TypeDef
  • FIOCLRH : LPC_GPIO_TypeDef
  • FIOCLRL : GPIO_HalfWord_TypeDef , LPC_GPIO_TypeDef
  • FIOCLRU : GPIO_HalfWord_TypeDef
  • FIODIR : GPIO_Byte_TypeDef , LPC_GPIO_TypeDef
  • FIODIR0 : LPC_GPIO_TypeDef
  • FIODIR1 : LPC_GPIO_TypeDef
  • FIODIR2 : LPC_GPIO_TypeDef
  • FIODIR3 : LPC_GPIO_TypeDef
  • FIODIRH : LPC_GPIO_TypeDef
  • FIODIRL : GPIO_HalfWord_TypeDef , LPC_GPIO_TypeDef
  • FIODIRU : GPIO_HalfWord_TypeDef
  • FIOMASK : LPC_GPIO_TypeDef , GPIO_Byte_TypeDef
  • FIOMASK0 : LPC_GPIO_TypeDef
  • FIOMASK1 : LPC_GPIO_TypeDef
  • FIOMASK2 : LPC_GPIO_TypeDef
  • FIOMASK3 : LPC_GPIO_TypeDef
  • FIOMASKH : LPC_GPIO_TypeDef
  • FIOMASKL : GPIO_HalfWord_TypeDef , LPC_GPIO_TypeDef
  • FIOMASKU : GPIO_HalfWord_TypeDef
  • FIOPIN : GPIO_Byte_TypeDef , LPC_GPIO_TypeDef
  • FIOPIN0 : LPC_GPIO_TypeDef
  • FIOPIN1 : LPC_GPIO_TypeDef
  • FIOPIN2 : LPC_GPIO_TypeDef
  • FIOPIN3 : LPC_GPIO_TypeDef
  • FIOPINH : LPC_GPIO_TypeDef
  • FIOPINL : LPC_GPIO_TypeDef , GPIO_HalfWord_TypeDef
  • FIOPINU : GPIO_HalfWord_TypeDef
  • FIOSET : GPIO_Byte_TypeDef , LPC_GPIO_TypeDef
  • FIOSET0 : LPC_GPIO_TypeDef
  • FIOSET1 : LPC_GPIO_TypeDef
  • FIOSET2 : LPC_GPIO_TypeDef
  • FIOSET3 : LPC_GPIO_TypeDef
  • FIOSETH : LPC_GPIO_TypeDef
  • FIOSETL : LPC_GPIO_TypeDef , GPIO_HalfWord_TypeDef
  • FIOSETU : GPIO_HalfWord_TypeDef
  • flags : dhcp_msg , uip_tcpip_hdr , tcpip_hdr
  • flags1 : dns_hdr
  • flags2 : dns_hdr
  • FLASHCFG : LPC_SC_TypeDef
  • FlowControlCounter : LPC_EMAC_TypeDef
  • FlowControlStatus : LPC_EMAC_TypeDef
  • format : CAN_MSG_Type
  • FPCA : CONTROL_Type
  • fpin : I2S_MODEConf_Type
  • fragerr : uip_stats
  • FrameFormat : SSP_CFG_Type
  • from : smtp_state
  • FullCAN_Sec : AF_SectionDef
  • Funcnum : PINSEL_CFG_Type
  • function : httpd_cgi_call
Generated on Mon Nov 28 2011 11:15:29 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
  • All
  • Variables
  • _
  • a
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  • h
  • i
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  • p
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  • r
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  • u
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  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- g -

  • GeneralCallState : I2C_OWNSLAVEADDR_CFG_Type
  • getrequestleft : webclient_state
  • getrequestptr : webclient_state
  • giaddr : dhcp_msg
  • GPREG0 : LPC_RTC_TypeDef
  • GPREG1 : LPC_RTC_TypeDef
  • GPREG2 : LPC_RTC_TypeDef
  • GPREG3 : LPC_RTC_TypeDef
  • GPREG4 : LPC_RTC_TypeDef
  • GrayScale : _DATCTR_Data_t
  • GS : _DATCTR_Data_t
  • GSR : LPC_CAN_TypeDef
Generated on Mon Nov 28 2011 11:15:29 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
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  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- h -

  • H_Size : _FontType_t , _Bmp_t
  • handle : __FILE
  • HashCRC : RX_Stat
  • HashFilterH : LPC_EMAC_TypeDef
  • HashFilterL : LPC_EMAC_TypeDef
  • hblenerr : uip_stats
  • HcBulkCurrentED : LPC_USB_TypeDef
  • HcBulkHeadED : LPC_USB_TypeDef
  • HcCommandStatus : LPC_USB_TypeDef
  • HcControl : LPC_USB_TypeDef
  • HcControlCurrentED : LPC_USB_TypeDef
  • HcControlHeadED : LPC_USB_TypeDef
  • HcDoneHead : LPC_USB_TypeDef
  • HcFmInterval : LPC_USB_TypeDef
  • HcFmNumber : LPC_USB_TypeDef
  • HcFmRemaining : LPC_USB_TypeDef
  • HcHCCA : LPC_USB_TypeDef
  • HcInterruptDisable : LPC_USB_TypeDef
  • HcInterruptEnable : LPC_USB_TypeDef
  • HcInterruptStatus : LPC_USB_TypeDef
  • HcLSTreshold : LPC_USB_TypeDef
  • HcPeriodCurrentED : LPC_USB_TypeDef
  • HcPeriodicStart : LPC_USB_TypeDef
  • HcRevision : LPC_USB_TypeDef
  • HcRhDescriptorA : LPC_USB_TypeDef
  • HcRhDescriptorB : LPC_USB_TypeDef
  • HcRhPortStatus1 : LPC_USB_TypeDef
  • HcRhPortStatus2 : LPC_USB_TypeDef
  • HcRhStatus : LPC_USB_TypeDef
  • HFSR : SCB_Type
  • hlen : dhcp_msg
  • hnfEnable : MCPWM_CAPTURE_CFG_Type
  • hops : dhcp_msg
  • host : webclient_state
  • HOUR : RTC_TIME_Type , LPC_RTC_TypeDef
  • httpflag : webclient_state
  • httpheaderline : webclient_state
  • httpheaderlineptr : webclient_state
  • htype : dhcp_msg
  • hwlen : arp_hdr
  • hwtype : arp_hdr
Generated on Mon Nov 28 2011 11:15:29 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
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  • e
  • f
  • g
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  • i
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  • q
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  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- i -

  • I2ADR0 : LPC_I2C_TypeDef
  • I2ADR1 : LPC_I2C_TypeDef
  • I2ADR2 : LPC_I2C_TypeDef
  • I2ADR3 : LPC_I2C_TypeDef
  • I2C_CLKHI : LPC_USB_TypeDef
  • I2C_CLKLO : LPC_USB_TypeDef
  • I2C_CTL : LPC_USB_TypeDef
  • I2C_RX : LPC_USB_TypeDef
  • I2C_STS : LPC_USB_TypeDef
  • I2C_TX : LPC_USB_TypeDef
  • I2CONCLR : LPC_I2C_TypeDef
  • I2CONSET : LPC_I2C_TypeDef
  • I2CPADCFG : LPC_PINCON_TypeDef
  • I2DAT : LPC_I2C_TypeDef
  • I2DATA_BUFFER : LPC_I2C_TypeDef
  • I2MASK0 : LPC_I2C_TypeDef
  • I2MASK1 : LPC_I2C_TypeDef
  • I2MASK2 : LPC_I2C_TypeDef
  • I2MASK3 : LPC_I2C_TypeDef
  • I2SCLH : LPC_I2C_TypeDef
  • I2SCLL : LPC_I2C_TypeDef
  • I2SDAI : LPC_I2S_TypeDef
  • I2SDAO : LPC_I2S_TypeDef
  • I2SDMA1 : LPC_I2S_TypeDef
  • I2SDMA2 : LPC_I2S_TypeDef
  • I2SIRQ : LPC_I2S_TypeDef
  • I2SRXBITRATE : LPC_I2S_TypeDef
  • I2SRXFIFO : LPC_I2S_TypeDef
  • I2SRXMODE : LPC_I2S_TypeDef
  • I2SRXRATE : LPC_I2S_TypeDef
  • I2SSTATE : LPC_I2S_TypeDef
  • I2STAT : LPC_I2C_TypeDef
  • I2STXBITRATE : LPC_I2S_TypeDef
  • I2STXFIFO : LPC_I2S_TypeDef
  • I2STXMODE : LPC_I2S_TypeDef
  • I2STXRATE : LPC_I2S_TypeDef
  • IABR : NVIC_Type
  • ICER : NVIC_Type
  • icmp : uip_stats
  • icmpchksum : icmpip_hdr , uip_icmpip_hdr
  • icode : icmpip_hdr , uip_icmpip_hdr
  • ICPR : NVIC_Type
  • ICR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_SSP_TypeDef , LPC_CAN_TypeDef
  • ICSR : SCB_Type
  • ICTR : SCnSCB_Type
  • id : CAN_MSG_Type , dns_hdr , icmpip_hdr , uip_icmpip_hdr
  • id_11 : FullCAN_Entry , SFF_Entry
  • ID_29 : EFF_Entry
  • IER : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_CAN_TypeDef
  • ifftFlag : arm_cfft_radix4_instance_f32 , arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31
  • ifftFlagR : arm_rfft_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32
  • IIR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • ILR : LPC_RTC_TypeDef
  • IMSC : LPC_SSP_TypeDef
  • Info : RX_Stat , TX_Stat
  • InfoAdr : _USB_DMA_DESCRIPTOR
  • initialmss : uip_conn
  • inputbuf : httpd_state
  • inputbuffer : hello_world_state
  • IntClear : LPC_EMAC_TypeDef
  • IntEnable : LPC_EMAC_TypeDef
  • interval : timer
  • IntOnCaption : PWM_CAPTURECFG_Type , TIM_CAPTURECFG_Type
  • IntOnMatch : PWM_MATCHCFG_Type , TIM_MATCHCFG_Type
  • IntSet : LPC_EMAC_TypeDef
  • IntStatus : LPC_EMAC_TypeDef , LPC_GPIOINT_TypeDef
  • InvertIndex : QEI_CFG_Type
  • INXCMP : LPC_QEI_TypeDef
  • INXCNT : LPC_QEI_TypeDef
  • IO0IntClr : LPC_GPIOINT_TypeDef
  • IO0IntEnF : LPC_GPIOINT_TypeDef
  • IO0IntEnR : LPC_GPIOINT_TypeDef
  • IO0IntStatF : LPC_GPIOINT_TypeDef
  • IO0IntStatR : LPC_GPIOINT_TypeDef
  • IO2IntClr : LPC_GPIOINT_TypeDef
  • IO2IntEnF : LPC_GPIOINT_TypeDef
  • IO2IntEnR : LPC_GPIOINT_TypeDef
  • IO2IntStatF : LPC_GPIOINT_TypeDef
  • IO2IntStatR : LPC_GPIOINT_TypeDef
  • ip : uip_stats
  • IP : NVIC_Type
  • ipaddr : arp_entry , dns_answer , dhcpc_state , namemap , neighbor_entry , uip_fw_netif
  • ipchksum : tcpip_hdr , uip_udpip_hdr , ethip_hdr , uip_tcpip_hdr , icmpip_hdr , uip_icmpip_hdr
  • IPGR : LPC_EMAC_TypeDef
  • IPGT : LPC_EMAC_TypeDef
  • ipid : ethip_hdr , tcpip_hdr , icmpip_hdr , fwcache_entry , uip_udpip_hdr , uip_icmpip_hdr , uip_tcpip_hdr
  • ipoffset : tcpip_hdr , uip_icmpip_hdr , icmpip_hdr , ethip_hdr , uip_udpip_hdr , uip_tcpip_hdr
  • IR : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • IRCTRIM : LPC_SC_TypeDef
  • ISAR : SCB_Type
  • ISER : NVIC_Type
  • IsoEP : _USB_DMA_DESCRIPTOR
  • ISPR : NVIC_Type
  • ISR : xPSR_Type , IPSR_Type
  • IT : xPSR_Type
Generated on Mon Nov 28 2011 11:15:29 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- p -

  • p : hello_world_state
  • Packet : RX_Desc , TX_Desc
  • Param : _GLCD_CmdCtrl_t
  • Parity : UART_CFG_Type
  • payload : icmpip_hdr
  • pbDataBuf : EMAC_PACKETBUF_Type
  • pbEMAC_Addr : EMAC_CFG_Type
  • pBitRevTable : arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31 , arm_cfft_radix4_instance_f32
  • PC : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • pCfft : arm_rfft_instance_f32 , arm_dct4_instance_f32 , arm_dct4_instance_q31 , arm_dct4_instance_q15 , arm_rfft_instance_q15 , arm_rfft_instance_q31
  • PCLKSEL0 : LPC_SC_TypeDef
  • PCLKSEL1 : LPC_SC_TypeDef
  • pCoeffs : arm_fir_interpolate_instance_q15 , arm_fir_interpolate_instance_q31 , arm_fir_interpolate_instance_f32 , arm_biquad_cas_df1_32x64_ins_q31 , arm_biquad_cascade_df2T_instance_f32 , arm_fir_lattice_instance_q15 , arm_fir_lattice_instance_q31 , arm_fir_lattice_instance_f32 , arm_lms_instance_f32 , arm_lms_instance_q15 , arm_lms_instance_q31 , arm_lms_norm_instance_f32 , arm_fir_instance_q7 , arm_lms_norm_instance_q31 , arm_lms_norm_instance_q15 , arm_fir_instance_q15 , arm_fir_sparse_instance_f32 , arm_fir_sparse_instance_q31 , arm_fir_instance_q31 , arm_fir_sparse_instance_q15 , arm_fir_sparse_instance_q7 , arm_fir_instance_f32 , arm_biquad_casd_df1_inst_q15 , arm_biquad_casd_df1_inst_q31 , arm_biquad_casd_df1_inst_f32 , arm_fir_decimate_instance_q15 , arm_fir_decimate_instance_q31 , arm_fir_decimate_instance_f32
  • PCON : LPC_SC_TypeDef
  • PCONP : LPC_SC_TypeDef
  • pCosFactor : arm_dct4_instance_f32 , arm_dct4_instance_q31 , arm_dct4_instance_q15
  • PCR : LPC_PWM_TypeDef
  • pData : _USB_EP_DATA , arm_matrix_instance_f32 , arm_matrix_instance_q15 , arm_matrix_instance_q31 , arm_bilinear_interp_instance_f32 , arm_bilinear_interp_instance_q31 , arm_bilinear_interp_instance_q15 , arm_bilinear_interp_instance_q7
  • pFontDesc : _FontType_t
  • pFontStream : _FontType_t
  • PFR : SCB_Type
  • pfunc : ptentry
  • phaseLength : arm_fir_interpolate_instance_q15 , arm_fir_interpolate_instance_q31 , arm_fir_interpolate_instance_f32
  • Pinmode : PINSEL_CFG_Type
  • PINMODE0 : LPC_PINCON_TypeDef
  • PINMODE1 : LPC_PINCON_TypeDef
  • PINMODE2 : LPC_PINCON_TypeDef
  • PINMODE3 : LPC_PINCON_TypeDef
  • PINMODE4 : LPC_PINCON_TypeDef
  • PINMODE5 : LPC_PINCON_TypeDef
  • PINMODE6 : LPC_PINCON_TypeDef
  • PINMODE7 : LPC_PINCON_TypeDef
  • PINMODE8 : LPC_PINCON_TypeDef
  • PINMODE9 : LPC_PINCON_TypeDef
  • PINMODE_OD0 : LPC_PINCON_TypeDef
  • PINMODE_OD1 : LPC_PINCON_TypeDef
  • PINMODE_OD2 : LPC_PINCON_TypeDef
  • PINMODE_OD3 : LPC_PINCON_TypeDef
  • PINMODE_OD4 : LPC_PINCON_TypeDef
  • Pinnum : PINSEL_CFG_Type
  • PINSEL0 : LPC_PINCON_TypeDef
  • PINSEL1 : LPC_PINCON_TypeDef
  • PINSEL10 : LPC_PINCON_TypeDef
  • PINSEL2 : LPC_PINCON_TypeDef
  • PINSEL3 : LPC_PINCON_TypeDef
  • PINSEL4 : LPC_PINCON_TypeDef
  • PINSEL5 : LPC_PINCON_TypeDef
  • PINSEL6 : LPC_PINCON_TypeDef
  • PINSEL7 : LPC_PINCON_TypeDef
  • PINSEL8 : LPC_PINCON_TypeDef
  • PINSEL9 : LPC_PINCON_TypeDef
  • pkCoeffs : arm_iir_lattice_instance_q15 , arm_iir_lattice_instance_q31 , arm_iir_lattice_instance_f32
  • PLL0CFG : LPC_SC_TypeDef
  • PLL0CON : LPC_SC_TypeDef
  • PLL0FEED : LPC_SC_TypeDef
  • PLL0STAT : LPC_SC_TypeDef
  • PLL1CFG : LPC_SC_TypeDef
  • PLL1CON : LPC_SC_TypeDef
  • PLL1FEED : LPC_SC_TypeDef
  • PLL1STAT : LPC_SC_TypeDef
  • PORT : ITM_Type
  • port : webclient_state
  • Portnum : PINSEL_CFG_Type
  • postShift : arm_lms_norm_instance_q15 , arm_biquad_casd_df1_inst_q15 , arm_biquad_casd_df1_inst_q31 , arm_biquad_cas_df1_32x64_ins_q31 , arm_lms_instance_q15 , arm_lms_instance_q31 , arm_lms_norm_instance_q31
  • PowerDown : LPC_EMAC_TypeDef
  • pPalette : _Bmp_t
  • pPicDesc : _Bmp_t
  • pPicStream : _Bmp_t
  • PR : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • PrescaleOption : TIM_TIMERCFG_Type , PWM_TIMERCFG_Type
  • PrescaleValue : PWM_TIMERCFG_Type , TIM_TIMERCFG_Type
  • pRfft : arm_dct4_instance_f32 , arm_dct4_instance_q15 , arm_dct4_instance_q31
  • proto : fwcache_entry , tcpip_hdr , icmpip_hdr , uip_tcpip_hdr , uip_udpip_hdr , ethip_hdr , uip_icmpip_hdr
  • protocol : arp_hdr
  • protoerr : uip_stats
  • protolen : arp_hdr
  • psockpt : psock
  • pState : arm_fir_sparse_instance_f32 , arm_fir_instance_f32 , arm_fir_instance_q31 , arm_fir_sparse_instance_q31 , arm_fir_interpolate_instance_q31 , arm_fir_instance_q7 , arm_biquad_casd_df1_inst_q15 , arm_fir_decimate_instance_q31 , arm_biquad_cas_df1_32x64_ins_q31 , arm_lms_instance_f32 , arm_fir_decimate_instance_q15 , arm_fir_sparse_instance_q15 , arm_lms_norm_instance_q15 , arm_lms_norm_instance_q31 , arm_fir_sparse_instance_q7 , arm_fir_interpolate_instance_q15 , arm_fir_lattice_instance_q31 , arm_iir_lattice_instance_f32 , arm_lms_norm_instance_f32 , arm_lms_instance_q15 , arm_lms_instance_q31 , arm_fir_interpolate_instance_f32 , arm_biquad_casd_df1_inst_f32 , arm_fir_instance_q15 , arm_fir_decimate_instance_f32 , arm_fir_lattice_instance_q15 , arm_biquad_cascade_df2T_instance_f32 , arm_biquad_casd_df1_inst_q31 , arm_iir_lattice_instance_q31 , arm_fir_lattice_instance_f32 , arm_iir_lattice_instance_q15
  • pt : dhcpc_state
  • pTapDelay : arm_fir_sparse_instance_q15 , arm_fir_sparse_instance_f32 , arm_fir_sparse_instance_q7 , arm_fir_sparse_instance_q31
  • ptr : psock_buf
  • pTwiddle : arm_cfft_radix4_instance_q31 , arm_cfft_radix4_instance_q15 , arm_dct4_instance_f32 , arm_cfft_radix4_instance_f32 , arm_dct4_instance_q31 , arm_dct4_instance_q15
  • pTwiddleAReal : arm_rfft_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32
  • pTwiddleBReal : arm_rfft_instance_q15 , arm_rfft_instance_f32 , arm_rfft_instance_q31
  • Pulse : _GLCD_CmdCtrl_t
  • pvCoeffs : arm_iir_lattice_instance_f32 , arm_iir_lattice_instance_q15 , arm_iir_lattice_instance_q31
  • pYData : arm_linear_interp_instance_f32
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
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  • Variables
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  • u
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  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- q -

  • Q : APSR_Type , xPSR_Type
  • QEICAP : LPC_QEI_TypeDef
  • QEICLR : LPC_QEI_TypeDef
  • QEICON : LPC_QEI_TypeDef
  • QEICONF : LPC_QEI_TypeDef
  • QEIIE : LPC_QEI_TypeDef
  • QEIIEC : LPC_QEI_TypeDef
  • QEIIES : LPC_QEI_TypeDef
  • QEIINTSTAT : LPC_QEI_TypeDef
  • QEILOAD : LPC_QEI_TypeDef
  • QEIMAXPOS : LPC_QEI_TypeDef
  • QEIPOS : LPC_QEI_TypeDef
  • QEISET : LPC_QEI_TypeDef
  • QEISTAT : LPC_QEI_TypeDef
  • QEITIME : LPC_QEI_TypeDef
  • QEIVEL : LPC_QEI_TypeDef
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
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  • a
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  • g
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  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- r -

  • RBR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • RC_AddMode : _DATCTR_Data_t
  • rcv_nxt : uip_conn
  • RD : CAN_PinCFG_Type
  • RDA : LPC_CAN_TypeDef
  • RDB : LPC_CAN_TypeDef
  • rdIdx : __CDC_BUF_T , __SER_BUF_T
  • readlen : psock
  • readptr : psock
  • recipTable : arm_lms_norm_instance_q31 , arm_lms_norm_instance_q15
  • recv : uip_stats
  • ReloadOption : QEI_RELOADCFG_Type
  • ReloadValue : QEI_RELOADCFG_Type
  • Reserved : I2S_MODEConf_Type , PWM_TIMERCFG_Type , PWM_COUNTERCFG_Type , QEI_RELOADCFG_Type , TIM_TIMERCFG_Type , TIM_COUNTERCFG_Type , TIM_MATCHCFG_Type
  • RESERVED : DAC_CONVERTER_CFG_Type
  • RESERVED0 : SCnSCB_Type , ITM_Type , LPC_SC_TypeDef , LPC_PINCON_TypeDef , LPC_GPIO_TypeDef , LPC_GPIOINT_TypeDef , LPC_TIM_TypeDef , LPC_PWM_TypeDef , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_SPI_TypeDef , LPC_RIT_TypeDef , LPC_RTC_TypeDef , LPC_WDT_TypeDef , LPC_ADC_TypeDef , LPC_QEI_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • Reserved0 : I2S_CFG_Type , I2S_DMAConf_Type
  • RESERVED0 : GPIO_Byte_TypeDef , GPIO_HalfWord_TypeDef , NVIC_Type , SCB_Type
  • RESERVED1 : SCnSCB_Type , ITM_Type , LPC_SC_TypeDef , LPC_TIM_TypeDef , LPC_PWM_TypeDef , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_WDT_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • RESERVED10 : LPC_RTC_TypeDef , LPC_UART1_TypeDef
  • RESERVED11 : LPC_UART1_TypeDef , LPC_RTC_TypeDef
  • RESERVED12 : LPC_RTC_TypeDef
  • RESERVED13 : LPC_RTC_TypeDef
  • RESERVED14 : LPC_RTC_TypeDef
  • RESERVED15 : LPC_RTC_TypeDef
  • RESERVED16 : LPC_RTC_TypeDef
  • RESERVED17 : LPC_RTC_TypeDef
  • RESERVED18 : LPC_RTC_TypeDef
  • RESERVED19 : LPC_RTC_TypeDef
  • RESERVED2 : NVIC_Type , ITM_Type , LPC_SC_TypeDef , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • RESERVED20 : LPC_RTC_TypeDef
  • RESERVED21 : LPC_RTC_TypeDef
  • RESERVED3 : NVIC_Type , LPC_SC_TypeDef , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • RESERVED4 : LPC_SC_TypeDef , NVIC_Type , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • RESERVED5 : LPC_RTC_TypeDef , LPC_SC_TypeDef , NVIC_Type , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • RESERVED6 : LPC_UART_TypeDef , LPC_SC_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_EMAC_TypeDef
  • RESERVED7 : LPC_EMAC_TypeDef , LPC_SC_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef
  • RESERVED8 : LPC_SC_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_EMAC_TypeDef
  • RESERVED9 : LPC_RTC_TypeDef , LPC_UART1_TypeDef
  • reset : I2S_CFG_Type
  • ResetOnMatch : TIM_MATCHCFG_Type , PWM_MATCHCFG_Type
  • retransmissions_count : I2C_M_SETUP_Type
  • retransmissions_max : I2C_M_SETUP_Type
  • retries : namemap
  • Reversed : _MADCTR_Data_t , _DATCTR_Data_t , _COLMOD_Data_t
  • rexmit : uip_stats
  • RFS : LPC_CAN_TypeDef
  • RGB : _MADCTR_Data_t , _DATCTR_Data_t
  • RGB_Mode : _DATCTR_Data_t
  • RICOMPVAL : LPC_RIT_TypeDef
  • RICOUNTER : LPC_RIT_TypeDef
  • RICTRL : LPC_RIT_TypeDef
  • RID : LPC_CAN_TypeDef
  • RIMASK : LPC_RIT_TypeDef
  • ripaddr : uip_conn
  • RIS : LPC_SSP_TypeDef
  • RisingEdge : TIM_CAPTURECFG_Type , PWM_CAPTURECFG_Type
  • rport : uip_conn
  • RS485CTRL : LPC_UART1_TypeDef
  • RS485DLY : LPC_UART1_TypeDef
  • RSERVED1 : NVIC_Type
  • RSID : LPC_SC_TypeDef
  • Rsrvd : _USB_DMA_DESCRIPTOR
  • rst : uip_stats
  • RSV : LPC_EMAC_TypeDef
  • RTC_AUX : LPC_RTC_TypeDef
  • RTC_AUXEN : LPC_RTC_TypeDef
  • rto : uip_conn
  • rx : UART_RING_BUFFER_T
  • rx_cnt : SSP_DATA_SETUP_Type
  • rx_count : I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • rx_data : I2C_M_SETUP_Type , I2C_S_SETUP_Type , SPI_DATA_SETUP_Type , SSP_DATA_SETUP_Type
  • rx_head : UART_RING_BUFFER_T
  • rx_length : I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • Rx_State : UART1_RS485_CTRLCFG_Type
  • rx_tail : UART_RING_BUFFER_T
  • RxConsumeIndex : LPC_EMAC_TypeDef
  • RxDescriptor : LPC_EMAC_TypeDef
  • RxDescriptorNumber : LPC_EMAC_TypeDef
  • RxFilterCtrl : LPC_EMAC_TypeDef
  • RxFilterWoLClear : LPC_EMAC_TypeDef
  • RxFilterWoLStatus : LPC_EMAC_TypeDef
  • RxProduceIndex : LPC_EMAC_TypeDef
  • RxStatus : LPC_EMAC_TypeDef
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
  • All
  • Variables
  • _
  • a
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  • g
  • h
  • i
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  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- s -

  • sa : uip_conn
  • SA0 : LPC_EMAC_TypeDef
  • SA1 : LPC_EMAC_TypeDef
  • SA2 : LPC_EMAC_TypeDef
  • SCR : LPC_UART1_TypeDef , SCB_Type , LPC_UART_TypeDef , LPC_UART0_TypeDef
  • scriptlen : httpd_state
  • scriptpt : httpd_state
  • scriptptr : httpd_state
  • SCS : LPC_SC_TypeDef
  • SEC : RTC_TIME_Type , LPC_RTC_TypeDef
  • secs : dhcp_msg
  • Sel : _ASCSET_Data_t
  • sendlen : psock
  • sendptr : smtp_state , psock
  • sent : uip_stats
  • sentlen : smtp_state
  • seqno : namemap , tcpip_hdr , icmpip_hdr , uip_tcpip_hdr , uip_icmpip_hdr
  • serverid : dhcpc_state
  • SFF_GPR_NumEntry : AF_SectionDef
  • SFF_GPR_Sec : AF_SectionDef
  • SFF_GRP_sa : LPC_CANAF_TypeDef
  • SFF_NumEntry : AF_SectionDef
  • SFF_sa : LPC_CANAF_TypeDef
  • SFF_Sec : AF_SectionDef
  • Sfl : _ASCSET_Data_t
  • SHCSR : SCB_Type
  • SHP : SCB_Type
  • shwaddr : arp_hdr
  • siaddr : dhcp_msg
  • SignalMode : QEI_CFG_Type
  • sipaddr : arp_hdr
  • sl_addr7bit : I2C_M_SETUP_Type
  • SlaveAddr_7bit : I2C_OWNSLAVEADDR_CFG_Type
  • SlaveAddrChannel : I2C_OWNSLAVEADDR_CFG_Type
  • SlaveAddrMaskValue : I2C_OWNSLAVEADDR_CFG_Type
  • Smd : _ASCSET_Data_t
  • sname : dhcp_msg
  • snd_nxt : uip_conn
  • sout : httpd_state
  • SPCCR : LPC_SPI_TypeDef
  • SPCR : LPC_SPI_TypeDef
  • SPDR : LPC_SPI_TypeDef
  • SPINT : LPC_SPI_TypeDef
  • SPSEL : CONTROL_Type
  • SPSR : LPC_SPI_TypeDef
  • SR : LPC_SSP_TypeDef , LPC_CAN_TypeDef
  • src : uip_eth_hdr
  • SrcAddr : GPDMA_LLI_Type
  • SrcConn : GPDMA_Channel_CFG_Type
  • srcipaddr : uip_icmpip_hdr , uip_udpip_hdr , ethip_hdr , uip_tcpip_hdr , tcpip_hdr , icmpip_hdr , fwcache_entry
  • SrcMemAddr : GPDMA_Channel_CFG_Type
  • srcport : tcpip_hdr , uip_tcpip_hdr , uip_udpip_hdr
  • Ssl : _ASCSET_Data_t
  • start : timer
  • state : namemap , telnetd_state , arm_pid_instance_q15 , arm_pid_instance_q31 , arm_pid_instance_f32 , smtp_state , httpd_state , dhcpc_state , psock , webclient_state
  • stateIndex : arm_fir_sparse_instance_q15 , arm_fir_sparse_instance_q7 , arm_fir_sparse_instance_q31 , arm_fir_sparse_instance_f32
  • status : I2C_S_SETUP_Type
  • Status : PWM_Match_T
  • status : I2C_M_SETUP_Type , SPI_DATA_SETUP_Type
  • Status : LPC_EMAC_TypeDef
  • status : SSP_DATA_SETUP_Type
  • STIR : NVIC_Type
  • stop : I2S_CFG_Type
  • Stopbits : UART_CFG_Type
  • StopOnMatch : TIM_MATCHCFG_Type , PWM_MATCHCFG_Type
  • subject : smtp_state
  • SUPP : LPC_EMAC_TypeDef
  • sv : uip_conn
  • syndrop : uip_stats
  • synrst : uip_stats
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
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  • Variables
  • _
  • a
  • b
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  • d
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  • g
  • h
  • i
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  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- t -

  • T : xPSR_Type
  • TC : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • tcp : uip_stats
  • tcpchksum : tcpip_hdr , uip_tcpip_hdr
  • tcpoffset : uip_tcpip_hdr , tcpip_hdr
  • tcpstateflags : uip_conn
  • TCR : ITM_Type , LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • TD : CAN_PinCFG_Type
  • TDA1 : LPC_CAN_TypeDef
  • TDA2 : LPC_CAN_TypeDef
  • TDA3 : LPC_CAN_TypeDef
  • TDB1 : LPC_CAN_TypeDef
  • TDB2 : LPC_CAN_TypeDef
  • TDB3 : LPC_CAN_TypeDef
  • TER : ITM_Type , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • TEST : LPC_EMAC_TypeDef
  • textlen : smtp_state
  • TFI1 : LPC_CAN_TypeDef
  • TFI2 : LPC_CAN_TypeDef
  • TFI3 : LPC_CAN_TypeDef
  • THR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • ticks : dhcpc_state
  • TID1 : LPC_CAN_TypeDef
  • TID2 : LPC_CAN_TypeDef
  • TID3 : LPC_CAN_TypeDef
  • time : neighbor_entry , arp_entry
  • timer : dhcpc_state , webclient_state , httpd_state , fwcache_entry , uip_conn
  • timerReset : MCPWM_CAPTURE_CFG_Type
  • tmr : namemap
  • to : smtp_state
  • tos : tcpip_hdr , icmpip_hdr , uip_tcpip_hdr , uip_icmpip_hdr , uip_udpip_hdr , ethip_hdr
  • TPR : ITM_Type
  • TransferSize : GPDMA_Channel_CFG_Type
  • TransferType : GPDMA_Channel_CFG_Type
  • TransferWidth : GPDMA_Channel_CFG_Type
  • TSV0 : LPC_EMAC_TypeDef
  • TSV1 : LPC_EMAC_TypeDef
  • ttl : ethip_hdr , uip_udpip_hdr , tcpip_hdr , dns_answer , icmpip_hdr , uip_tcpip_hdr , uip_icmpip_hdr
  • twidCoefModifier : arm_cfft_radix4_instance_f32 , arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31
  • twidCoefRModifier : arm_rfft_instance_f32 , arm_rfft_instance_q15 , arm_rfft_instance_q31
  • tx : UART_RING_BUFFER_T
  • tx_cnt : SSP_DATA_SETUP_Type
  • tx_count : I2C_S_SETUP_Type , I2C_M_SETUP_Type
  • tx_data : I2C_S_SETUP_Type , SSP_DATA_SETUP_Type , I2C_M_SETUP_Type , SPI_DATA_SETUP_Type
  • tx_head : UART_RING_BUFFER_T
  • tx_length : I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • tx_tail : UART_RING_BUFFER_T
  • TxConsumeIndex : LPC_EMAC_TypeDef
  • TxDescriptor : LPC_EMAC_TypeDef
  • TxDescriptorNumber : LPC_EMAC_TypeDef
  • TxProduceIndex : LPC_EMAC_TypeDef
  • txrx_setup : I2C_CFG_T
  • TxStatus : LPC_EMAC_TypeDef
  • type : dns_answer
  • Type : _USB_DMA_DESCRIPTOR
  • type : CAN_MSG_Type , icmpip_hdr , uip_eth_hdr , uip_icmpip_hdr
  • Type : _USB_DMA_DESCRIPTOR
  • typeerr : uip_stats
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
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  • Variables
  • _
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  • p
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  • x
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Here is a list of all struct and union fields with links to the structures/unions they belong to:

- u -

  • u16 : ITM_Type
  • u32 : ITM_Type
  • u8 : ITM_Type
  • udpchksum : uip_udpip_hdr
  • udplen : uip_udpip_hdr
  • ulDataLen : EMAC_PACKETBUF_Type
  • ulQEIConfig : QEI_CFGOPT_Type
  • unused : fwcache_entry
  • upperEID : EFF_GPR_Entry
  • upperID : SFF_GPR_Entry
  • urgp : tcpip_hdr , uip_tcpip_hdr
  • USBCLKCFG : LPC_SC_TypeDef
  • USBClkCtrl : LPC_USB_TypeDef
  • USBClkSt : LPC_USB_TypeDef
  • USBCmdCode : LPC_USB_TypeDef
  • USBCmdData : LPC_USB_TypeDef
  • USBCtrl : LPC_USB_TypeDef
  • USBDevIntClr : LPC_USB_TypeDef
  • USBDevIntEn : LPC_USB_TypeDef
  • USBDevIntPri : LPC_USB_TypeDef
  • USBDevIntSet : LPC_USB_TypeDef
  • USBDevIntSt : LPC_USB_TypeDef
  • USBDMAIntEn : LPC_USB_TypeDef
  • USBDMAIntSt : LPC_USB_TypeDef
  • USBDMARClr : LPC_USB_TypeDef
  • USBDMARSet : LPC_USB_TypeDef
  • USBDMARSt : LPC_USB_TypeDef
  • USBEoTIntClr : LPC_USB_TypeDef
  • USBEoTIntSet : LPC_USB_TypeDef
  • USBEoTIntSt : LPC_USB_TypeDef
  • USBEpDMADis : LPC_USB_TypeDef
  • USBEpDMAEn : LPC_USB_TypeDef
  • USBEpDMASt : LPC_USB_TypeDef
  • USBEpInd : LPC_USB_TypeDef
  • USBEpIntClr : LPC_USB_TypeDef
  • USBEpIntEn : LPC_USB_TypeDef
  • USBEpIntPri : LPC_USB_TypeDef
  • USBEpIntSet : LPC_USB_TypeDef
  • USBEpIntSt : LPC_USB_TypeDef
  • USBIntSt : LPC_SC_TypeDef
  • USBMaxPSize : LPC_USB_TypeDef
  • USBNDDRIntClr : LPC_USB_TypeDef
  • USBNDDRIntSet : LPC_USB_TypeDef
  • USBNDDRIntSt : LPC_USB_TypeDef
  • USBReEp : LPC_USB_TypeDef
  • USBRxData : LPC_USB_TypeDef
  • USBRxPLen : LPC_USB_TypeDef
  • USBSysErrIntClr : LPC_USB_TypeDef
  • USBSysErrIntSet : LPC_USB_TypeDef
  • USBSysErrIntSt : LPC_USB_TypeDef
  • USBTxData : LPC_USB_TypeDef
  • USBTxPLen : LPC_USB_TypeDef
  • USBUDCAH : LPC_USB_TypeDef
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- v -

  • V : APSR_Type , xPSR_Type
  • V_Size : _Bmp_t , _FontType_t
  • VAL : SysTick_Type
  • Val : _USB_DMA_DESCRIPTOR
  • VELCOMP : LPC_QEI_TypeDef
  • vhl : icmpip_hdr , uip_udpip_hdr , uip_icmpip_hdr , tcpip_hdr , uip_tcpip_hdr , ethip_hdr
  • vhlerr : uip_stats
  • VTOR : SCB_Type
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
  • All
  • Variables
  • _
  • a
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  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
  • z
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- w -

  • w : APSR_Type , IPSR_Type , CONTROL_Type , xPSR_Type
  • WDCLKSEL : LPC_WDT_TypeDef
  • WDFEED : LPC_WDT_TypeDef
  • WDMOD : LPC_WDT_TypeDef
  • WDTC : LPC_WDT_TypeDef
  • WDTV : LPC_WDT_TypeDef
  • wnd : tcpip_hdr , uip_tcpip_hdr
  • wordwidth : I2S_CFG_Type
  • wrIdx : __CDC_BUF_T , __SER_BUF_T
  • ws_sel : I2S_CFG_Type
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
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  • d
  • e
  • f
  • g
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  • i
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  • m
  • n
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Here is a list of all struct and union fields with links to the structures/unions they belong to:

- x -

  • x0 : arm_lms_norm_instance_f32 , arm_lms_norm_instance_q31 , arm_lms_norm_instance_q15
  • x1 : arm_linear_interp_instance_f32
  • xid : dhcp_msg
  • xSpacing : arm_linear_interp_instance_f32
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields

  • Data Fields
  • All
  • Variables
  • _
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Here is a list of all struct and union fields with links to the structures/unions they belong to:

- y -

  • YEAR : RTC_TIME_Type , LPC_RTC_TypeDef
  • yiaddr : dhcp_msg
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Fields
  • All
  • Variables
  • _
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- _ -

  • __pad0__ : _DATCTR_Data_t
  • _reserved0 : CONTROL_Type , xPSR_Type , IPSR_Type , APSR_Type
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Fields
  • All
  • Variables
  • _
  • a
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- k -

  • Kd : arm_pid_instance_q15 , arm_pid_instance_q31 , arm_pid_instance_f32
  • Ki : arm_pid_instance_q15 , arm_pid_instance_q31 , arm_pid_instance_f32
  • Kp : arm_pid_instance_f32 , arm_pid_instance_q15 , arm_pid_instance_q31
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
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- l -

  • L : arm_fir_interpolate_instance_q15 , arm_fir_interpolate_instance_q31 , arm_fir_interpolate_instance_f32
  • lblenerr : uip_stats
  • lc : pt
  • LCR : LPC_UART1_TypeDef , LPC_UART_TypeDef , LPC_UART0_TypeDef
  • lease_time : dhcpc_state
  • left : psock_buf
  • len : httpd_state , tcpip_hdr , icmpip_hdr , uip_conn , uip_tcpip_hdr , uip_icmpip_hdr , CAN_MSG_Type , uip_udpip_hdr , ethip_hdr , dns_answer , httpd_fs_file , httpd_fsdata_file , httpd_fsdata_file_noconst
  • length : SSP_DATA_SETUP_Type , SPI_DATA_SETUP_Type
  • LenPos : _USB_DMA_DESCRIPTOR
  • LER : LPC_PWM_TypeDef
  • line : telnetd_line
  • lines : telnetd_state
  • Link : _USB_DMA_DESCRIPTOR
  • LOAD : SysTick_Type
  • lowerEID : EFF_GPR_Entry
  • lowerID : SFF_GPR_Entry
  • lport : uip_conn
  • LSR : LPC_UART_TypeDef , LPC_UART1_TypeDef , LPC_UART0_TypeDef
  • LUTerr : LPC_CANAF_TypeDef
  • LUTerrAd : LPC_CANAF_TypeDef
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Fields
  • All
  • Variables
  • _
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- m -

  • M : arm_fir_decimate_instance_q15 , arm_fir_decimate_instance_q31 , arm_fir_decimate_instance_f32
  • MAC1 : LPC_EMAC_TypeDef
  • MAC2 : LPC_EMAC_TypeDef
  • mac_addr : dhcpc_state
  • mac_len : dhcpc_state
  • MADR : LPC_EMAC_TypeDef
  • mask : LPC_CANAF_RAM_TypeDef
  • MatchAddrValue : UART1_RS485_CTRLCFG_Type
  • MatchChannel : PWM_MATCHCFG_Type , TIM_MATCHCFG_Type
  • Matchvalue : PWM_Match_T
  • MatchValue : TIM_MATCHCFG_Type
  • maxDelay : arm_fir_sparse_instance_q31 , arm_fir_sparse_instance_q15 , arm_fir_sparse_instance_q7 , arm_fir_sparse_instance_f32
  • MAXF : LPC_EMAC_TypeDef
  • MaxSize : _USB_DMA_DESCRIPTOR
  • MCCAP_CLR : LPC_MCPWM_TypeDef
  • MCCAPCON : LPC_MCPWM_TypeDef
  • MCCAPCON_CLR : LPC_MCPWM_TypeDef
  • MCCAPCON_SET : LPC_MCPWM_TypeDef
  • MCCCP : LPC_MCPWM_TypeDef
  • MCCNTCON : LPC_MCPWM_TypeDef
  • MCCNTCON_CLR : LPC_MCPWM_TypeDef
  • MCCNTCON_SET : LPC_MCPWM_TypeDef
  • MCCON : LPC_MCPWM_TypeDef
  • MCCON_CLR : LPC_MCPWM_TypeDef
  • MCCON_SET : LPC_MCPWM_TypeDef
  • MCCR0 : LPC_MCPWM_TypeDef
  • MCCR1 : LPC_MCPWM_TypeDef
  • MCCR2 : LPC_MCPWM_TypeDef
  • MCDEADTIME : LPC_MCPWM_TypeDef
  • mcena : I2S_MODEConf_Type
  • MCFG : LPC_EMAC_TypeDef
  • MCINTEN : LPC_MCPWM_TypeDef
  • MCINTEN_CLR : LPC_MCPWM_TypeDef
  • MCINTEN_SET : LPC_MCPWM_TypeDef
  • MCINTFLAG : LPC_MCPWM_TypeDef
  • MCINTFLAG_CLR : LPC_MCPWM_TypeDef
  • MCINTFLAG_SET : LPC_MCPWM_TypeDef
  • MCMD : LPC_EMAC_TypeDef
  • MCPER0 : LPC_MCPWM_TypeDef
  • MCPER1 : LPC_MCPWM_TypeDef
  • MCPER2 : LPC_MCPWM_TypeDef
  • MCPW0 : LPC_MCPWM_TypeDef
  • MCPW1 : LPC_MCPWM_TypeDef
  • MCPW2 : LPC_MCPWM_TypeDef
  • MCR : LPC_TIM_TypeDef , LPC_PWM_TypeDef , LPC_UART1_TypeDef
  • MCTIM0 : LPC_MCPWM_TypeDef
  • MCTIM1 : LPC_MCPWM_TypeDef
  • MCTIM2 : LPC_MCPWM_TypeDef
  • MemDataAccCtrl : _MADCTR_Data_t
  • mimetype : webclient_state
  • MIN : RTC_TIME_Type , LPC_RTC_TypeDef
  • MIND : LPC_EMAC_TypeDef
  • MIS : LPC_SSP_TypeDef
  • ML : _MADCTR_Data_t , _DATCTR_Data_t
  • MMCTRL : LPC_I2C_TypeDef
  • MMFAR : SCB_Type
  • MMFR : SCB_Type
  • MOD : LPC_CAN_TypeDef
  • Mode : EMAC_CFG_Type , SPI_CFG_Type , _COLMOD_Data_t , SSP_CFG_Type
  • Module_ID : LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • mono : I2S_CFG_Type
  • MONTH : RTC_TIME_Type , LPC_RTC_TypeDef
  • MR0 : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • MR1 : LPC_PWM_TypeDef , LPC_TIM_TypeDef
  • MR2 : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • MR3 : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • MR4 : LPC_PWM_TypeDef
  • MR5 : LPC_PWM_TypeDef
  • MR6 : LPC_PWM_TypeDef
  • MRDD : LPC_EMAC_TypeDef
  • msg : smtp_state
  • msglen : smtp_state
  • MSR : LPC_UART1_TypeDef
  • mss : uip_conn
  • mu : arm_lms_norm_instance_f32 , arm_lms_instance_q15 , arm_lms_instance_f32 , arm_lms_norm_instance_q31 , arm_lms_norm_instance_q15 , arm_lms_instance_q31
  • mute : I2S_CFG_Type
  • MV : _DATCTR_Data_t , _MADCTR_Data_t
  • MWTD : LPC_EMAC_TypeDef
  • MX : _MADCTR_Data_t , _DATCTR_Data_t
  • MY : _DATCTR_Data_t , _MADCTR_Data_t
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Fields
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  • Variables
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- n -

  • N : arm_dct4_instance_f32 , arm_dct4_instance_q31 , APSR_Type , xPSR_Type , arm_dct4_instance_q15
  • name : httpd_cgi_call , httpd_fsdata_file , httpd_fsdata_file_noconst , hello_world_state , namemap
  • Nby2 : arm_dct4_instance_f32 , arm_dct4_instance_q31 , arm_dct4_instance_q15
  • netmask : dhcpc_state , uip_fw_netif
  • next : httpd_fsdata_file , httpd_fsdata_file_noconst , uip_fw_netif
  • NextLLI : GPDMA_LLI_Type
  • normalize : arm_dct4_instance_f32 , arm_dct4_instance_q31 , arm_dct4_instance_q15
  • NormalMultiDropMode_State : UART1_RS485_CTRLCFG_Type
  • nPRIV : CONTROL_Type
  • nrtx : uip_conn
  • numanswers : dns_hdr
  • numauthrr : dns_hdr
  • numCols : arm_bilinear_interp_instance_q31 , arm_bilinear_interp_instance_q15 , arm_bilinear_interp_instance_q7 , arm_matrix_instance_f32 , arm_matrix_instance_q15 , arm_matrix_instance_q31 , arm_bilinear_interp_instance_f32
  • numextrarr : dns_hdr
  • numquestions : dns_hdr
  • numRows : arm_matrix_instance_f32 , arm_matrix_instance_q15 , arm_matrix_instance_q31 , arm_bilinear_interp_instance_f32 , arm_bilinear_interp_instance_q31 , arm_bilinear_interp_instance_q15 , arm_bilinear_interp_instance_q7
  • numsent : telnetd_state
  • numStages : arm_biquad_casd_df1_inst_q31 , arm_biquad_casd_df1_inst_f32 , arm_biquad_casd_df1_inst_q15 , arm_fir_lattice_instance_q31 , arm_iir_lattice_instance_q15 , arm_iir_lattice_instance_q31 , arm_iir_lattice_instance_f32 , arm_biquad_cas_df1_32x64_ins_q31 , arm_biquad_cascade_df2T_instance_f32 , arm_fir_lattice_instance_q15 , arm_fir_lattice_instance_f32
  • numTaps : arm_fir_sparse_instance_q7 , arm_fir_instance_f32 , arm_fir_instance_q31 , arm_fir_instance_q15 , arm_lms_norm_instance_q31 , arm_fir_sparse_instance_q31 , arm_fir_sparse_instance_f32 , arm_fir_decimate_instance_q15 , arm_lms_instance_f32 , arm_lms_instance_q31 , arm_fir_decimate_instance_f32 , arm_fir_decimate_instance_q31 , arm_fir_instance_q7 , arm_lms_norm_instance_f32 , arm_lms_instance_q15 , arm_lms_norm_instance_q15 , arm_fir_sparse_instance_q15
  • nValues : arm_linear_interp_instance_f32
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Fields
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- o -

  • onebyfftLen : arm_cfft_radix4_instance_f32
  • op : dhcp_msg
  • opcode : arp_hdr
  • OpenDrain : PINSEL_CFG_Type
  • optdata : tcpip_hdr , uip_tcpip_hdr
  • options : dhcp_msg
  • OTGClkCtrl : LPC_USB_TypeDef
  • OTGClkSt : LPC_USB_TypeDef
  • OTGIntClr : LPC_USB_TypeDef
  • OTGIntEn : LPC_USB_TypeDef
  • OTGIntSet : LPC_USB_TypeDef
  • OTGIntSt : LPC_USB_TypeDef
  • OTGStCtrl : LPC_USB_TypeDef
  • OTGTmr : LPC_USB_TypeDef
  • output : uip_fw_netif
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Fields
  • All
  • Variables
  • _
  • a
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- z -

  • Z : APSR_Type , xPSR_Type
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Fields
  • All
  • Variables
  • _
  • a
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- a -

  • A0 : arm_pid_instance_q15 , arm_pid_instance_q31 , arm_pid_instance_f32
  • A1 : arm_pid_instance_q15 , arm_pid_instance_q31 , arm_pid_instance_f32
  • A2 : arm_pid_instance_f32 , arm_pid_instance_q31
  • ABMode : UART_AB_CFG_Type
  • ackerr : uip_stats
  • ackno : tcpip_hdr , uip_tcpip_hdr
  • ACR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • ADCR : LPC_ADC_TypeDef
  • addr : neighbor_entry , uip_neighbor_addr , uip_eth_addr
  • ADDR0 : LPC_ADC_TypeDef
  • ADDR1 : LPC_ADC_TypeDef
  • ADDR2 : LPC_ADC_TypeDef
  • ADDR3 : LPC_ADC_TypeDef
  • ADDR4 : LPC_ADC_TypeDef
  • ADDR5 : LPC_ADC_TypeDef
  • ADDR6 : LPC_ADC_TypeDef
  • ADDR7 : LPC_ADC_TypeDef
  • ADGDR : LPC_ADC_TypeDef
  • ADINTEN : LPC_ADC_TypeDef
  • ADR : SCB_Type
  • ADRMATCH : LPC_UART1_TypeDef
  • ADSTAT : LPC_ADC_TypeDef
  • ADTRM : LPC_ADC_TypeDef
  • AFMR : LPC_CANAF_TypeDef
  • AFSR : SCB_Type
  • AIRCR : SCB_Type
  • ALDOM : LPC_RTC_TypeDef
  • ALDOW : LPC_RTC_TypeDef
  • ALDOY : LPC_RTC_TypeDef
  • ALHOUR : LPC_RTC_TypeDef
  • ALMIN : LPC_RTC_TypeDef
  • ALMON : LPC_RTC_TypeDef
  • ALSEC : LPC_RTC_TypeDef
  • ALYEAR : LPC_RTC_TypeDef
  • AMR : LPC_RTC_TypeDef
  • appstate : uip_conn
  • ATLE : _USB_DMA_DESCRIPTOR
  • AutoAddrDetect_State : UART1_RS485_CTRLCFG_Type
  • AutoDirCtrl_State : UART1_RS485_CTRLCFG_Type
  • AutoRestart : UART_AB_CFG_Type
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Fields
  • All
  • Variables
  • _
  • a
  • b
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- b -

  • b : APSR_Type , IPSR_Type , CONTROL_Type , xPSR_Type
  • Baud_rate : UART_CFG_Type
  • BFAR : SCB_Type
  • bitReverseFlag : arm_cfft_radix4_instance_q31 , arm_cfft_radix4_instance_f32 , arm_cfft_radix4_instance_q15
  • bitReverseFlagR : arm_rfft_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32
  • bitRevFactor : arm_cfft_radix4_instance_f32 , arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31
  • BitsPP : _Bmp_t
  • bmQEIConfig : QEI_CFGOPT_Type
  • BTR : LPC_CAN_TypeDef
  • buf : psock , telnetd_state
  • BufAdr : _USB_DMA_DESCRIPTOR
  • BufLen : _USB_DMA_DESCRIPTOR
  • bufptr : telnetd_state , psock
  • bufsize : psock
  • BytesPP : _Bmp_t
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Fields
  • All
  • Variables
  • _
  • a
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- c -

  • C : APSR_Type , xPSR_Type
  • CALIB : SysTick_Type
  • CALIBRATION : LPC_RTC_TypeDef
  • callback : I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • CANMSR : LPC_CANCR_TypeDef
  • CANRxSR : LPC_CANCR_TypeDef
  • CANSLEEPCLR : LPC_SC_TypeDef
  • CANTxSR : LPC_CANCR_TypeDef
  • CANWAKEFLAGS : LPC_SC_TypeDef
  • CaptureChannel : PWM_CAPTURECFG_Type , TIM_CAPTURECFG_Type
  • captureChannel : MCPWM_CAPTURE_CFG_Type
  • captureFalling : MCPWM_CAPTURE_CFG_Type
  • CaptureMode : QEI_CFG_Type
  • captureRising : MCPWM_CAPTURE_CFG_Type
  • CCLKCFG : LPC_SC_TypeDef
  • CCR : SCB_Type , LPC_TIM_TypeDef , LPC_PWM_TypeDef , LPC_RTC_TypeDef
  • Cfg : _USB_DMA_DESCRIPTOR
  • CFSR : SCB_Type
  • chaddr : dhcp_msg
  • channelDeadtimeEnable : MCPWM_CHANNEL_CFG_Type
  • channelDeadtimeValue : MCPWM_CHANNEL_CFG_Type
  • ChannelNum : GPDMA_Channel_CFG_Type
  • channelPeriodValue : MCPWM_CHANNEL_CFG_Type
  • channelPolarity : MCPWM_CHANNEL_CFG_Type
  • channelPulsewidthValue : MCPWM_CHANNEL_CFG_Type
  • channelTimercounterValue : MCPWM_CHANNEL_CFG_Type
  • channelType : MCPWM_CHANNEL_CFG_Type
  • channelUpdateEnable : MCPWM_CHANNEL_CFG_Type
  • CharacterOffset : _FontType_t
  • CharactersNuber : _FontType_t
  • chkerr : uip_stats
  • ciaddr : dhcp_msg
  • CIIR : LPC_RTC_TypeDef
  • class : dns_answer
  • CLKOUTCFG : LPC_SC_TypeDef
  • clksel : I2S_MODEConf_Type
  • CLKSRCSEL : LPC_SC_TypeDef
  • ClockRate : SPI_CFG_Type , SSP_CFG_Type
  • CLRT : LPC_EMAC_TypeDef
  • Cmd : _GLCD_CmdCtrl_t
  • CMPOS0 : LPC_QEI_TypeDef
  • CMPOS1 : LPC_QEI_TypeDef
  • CMPOS2 : LPC_QEI_TypeDef
  • CMR : LPC_CAN_TypeDef
  • CNT_ENA : DAC_CONVERTER_CFG_Type
  • ColourMode : _COLMOD_Data_t
  • Command : LPC_EMAC_TypeDef
  • commandstr : ptentry
  • conn : dhcpc_state
  • Control : GPDMA_LLI_Type
  • controller : EFF_Entry , FullCAN_Entry , SFF_Entry
  • controller1 : SFF_GPR_Entry , EFF_GPR_Entry
  • controller2 : SFF_GPR_Entry , EFF_GPR_Entry
  • count : httpd_state
  • Count : _USB_EP_DATA
  • counter : SPI_DATA_SETUP_Type
  • counterChannel : MCPWM_COUNT_CFG_Type
  • CounterOption : PWM_COUNTERCFG_Type , TIM_COUNTERCFG_Type
  • countFalling : MCPWM_COUNT_CFG_Type
  • CountInputSelect : TIM_COUNTERCFG_Type , PWM_COUNTERCFG_Type
  • countRising : MCPWM_COUNT_CFG_Type
  • CPACR : SCB_Type
  • CPHA : SPI_CFG_Type , SSP_CFG_Type
  • CPOL : SSP_CFG_Type , SPI_CFG_Type
  • CPSR : LPC_SSP_TypeDef
  • CPUID : SCB_Type
  • CR0 : LPC_TIM_TypeDef , LPC_SSP_TypeDef , LPC_PWM_TypeDef
  • CR1 : LPC_SSP_TypeDef , LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • CR2 : LPC_PWM_TypeDef
  • CR3 : LPC_PWM_TypeDef
  • CTCR : LPC_PWM_TypeDef , LPC_TIM_TypeDef
  • CTIME0 : LPC_RTC_TypeDef
  • CTIME1 : LPC_RTC_TypeDef
  • CTIME2 : LPC_RTC_TypeDef
  • CTRL : SysTick_Type
  • Ctrl : TX_Desc , RX_Desc
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Fields
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  • Variables
  • _
  • a
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  • x
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- d -

  • DACCNTVAL : LPC_DAC_TypeDef
  • DACCTRL : LPC_DAC_TypeDef
  • DACR : LPC_DAC_TypeDef
  • data : httpd_fs_file , __SER_BUF_T , httpd_fsdata_file , httpd_fsdata_file_noconst , __CDC_BUF_T
  • dataA : CAN_MSG_Type
  • dataB : CAN_MSG_Type
  • Databit : SPI_CFG_Type , SSP_CFG_Type
  • Databits : UART_CFG_Type
  • DataOrder : SPI_CFG_Type
  • DBLBUF_ENA : DAC_CONVERTER_CFG_Type
  • DCRDR : CoreDebug_Type
  • DCRSR : CoreDebug_Type
  • default_router : dhcpc_state
  • DelayValue : UART1_RS485_CTRLCFG_Type
  • DEMCR : CoreDebug_Type
  • depth : I2S_DMAConf_Type
  • dest : uip_eth_hdr
  • destipaddr : tcpip_hdr , icmpip_hdr , fwcache_entry , uip_tcpip_hdr , uip_icmpip_hdr , uip_udpip_hdr , ethip_hdr
  • destport : uip_udpip_hdr , tcpip_hdr , uip_tcpip_hdr
  • DFR : SCB_Type
  • DFSR : SCB_Type
  • DHCSR : CoreDebug_Type
  • dhwaddr : arp_hdr
  • dipaddr : arp_hdr
  • Dir : _GLCD_CmdCtrl_t
  • dir : I2C_CFG_T
  • DirCtrlPin : UART1_RS485_CTRLCFG_Type
  • DirCtrlPol_Level : UART1_RS485_CTRLCFG_Type
  • DirectionInvert : QEI_CFG_Type
  • disable : FullCAN_Entry , SFF_Entry
  • disable1 : SFF_GPR_Entry
  • disable2 : SFF_GPR_Entry
  • DLL : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • DLM : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • DMA_ENA : DAC_CONVERTER_CFG_Type
  • DMACCConfig : LPC_GPDMACH_TypeDef
  • DMACCControl : LPC_GPDMACH_TypeDef
  • DMACCDestAddr : LPC_GPDMACH_TypeDef
  • DMACCLLI : LPC_GPDMACH_TypeDef
  • DMACConfig : LPC_GPDMA_TypeDef
  • DMACCSrcAddr : LPC_GPDMACH_TypeDef
  • DMACEnbldChns : LPC_GPDMA_TypeDef
  • DMACIntErrClr : LPC_GPDMA_TypeDef
  • DMACIntErrStat : LPC_GPDMA_TypeDef
  • DMACIntStat : LPC_GPDMA_TypeDef
  • DMACIntTCClear : LPC_GPDMA_TypeDef
  • DMACIntTCStat : LPC_GPDMA_TypeDef
  • DMACR : LPC_SSP_TypeDef
  • DMACRawIntErrStat : LPC_GPDMA_TypeDef
  • DMACRawIntTCStat : LPC_GPDMA_TypeDef
  • DMACSoftBReq : LPC_GPDMA_TypeDef
  • DMACSoftLBReq : LPC_GPDMA_TypeDef
  • DMACSoftLSReq : LPC_GPDMA_TypeDef
  • DMACSoftSReq : LPC_GPDMA_TypeDef
  • DMACSync : LPC_GPDMA_TypeDef
  • DMAIndex : I2S_DMAConf_Type
  • DMALLI : GPDMA_Channel_CFG_Type
  • DMAREQSEL : LPC_SC_TypeDef
  • dnsaddr : dhcpc_state
  • DOM : LPC_RTC_TypeDef , RTC_TIME_Type
  • DOW : RTC_TIME_Type , LPC_RTC_TypeDef
  • DOY : LPC_RTC_TypeDef , RTC_TIME_Type
  • DR : LPC_SSP_TypeDef
  • drop : uip_stats
  • DstAddr : GPDMA_LLI_Type
  • DstConn : GPDMA_Channel_CFG_Type
  • DstMemAddr : GPDMA_Channel_CFG_Type
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

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- e -

  • EFF_GPR_NumEntry : AF_SectionDef
  • EFF_GPR_Sec : AF_SectionDef
  • EFF_GRP_sa : LPC_CANAF_TypeDef
  • EFF_NumEntry : AF_SectionDef
  • EFF_sa : LPC_CANAF_TypeDef
  • EFF_Sec : AF_SectionDef
  • EMR : LPC_TIM_TypeDef
  • ENDofTable : LPC_CANAF_TypeDef
  • energy : arm_lms_norm_instance_f32 , arm_lms_norm_instance_q31 , arm_lms_norm_instance_q15
  • err : namemap
  • ethaddr : arp_entry
  • ethhdr : ethip_hdr , arp_hdr
  • EWL : LPC_CAN_TypeDef
  • EXTI_Line : EXTI_InitTypeDef
  • EXTI_Mode : EXTI_InitTypeDef
  • EXTI_polarity : EXTI_InitTypeDef
  • EXTINT : LPC_SC_TypeDef
  • ExtMatchOutputType : TIM_MATCHCFG_Type
  • EXTMODE : LPC_SC_TypeDef
  • EXTPOLAR : LPC_SC_TypeDef
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

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- f -

  • FallingEdge : PWM_CAPTURECFG_Type , TIM_CAPTURECFG_Type
  • FC_NumEntry : AF_SectionDef
  • FCANIC0 : LPC_CANAF_TypeDef
  • FCANIC1 : LPC_CANAF_TypeDef
  • FCANIE : LPC_CANAF_TypeDef
  • FCR : LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_UART_TypeDef
  • FDR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • fftLen : arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31 , arm_cfft_radix4_instance_f32
  • fftLenBy2 : arm_rfft_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32
  • fftLenReal : arm_rfft_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32
  • FIFO_DMAMode : UART_FIFO_CFG_Type
  • FIFO_Level : UART_FIFO_CFG_Type
  • FIFO_ResetRxBuf : UART_FIFO_CFG_Type
  • FIFO_ResetTxBuf : UART_FIFO_CFG_Type
  • FIFOLVL : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • file : dhcp_msg , webclient_state , httpd_state
  • filename : httpd_state
  • FILTER : LPC_QEI_TypeDef
  • FIOCLR : GPIO_Byte_TypeDef , LPC_GPIO_TypeDef
  • FIOCLR0 : LPC_GPIO_TypeDef
  • FIOCLR1 : LPC_GPIO_TypeDef
  • FIOCLR2 : LPC_GPIO_TypeDef
  • FIOCLR3 : LPC_GPIO_TypeDef
  • FIOCLRH : LPC_GPIO_TypeDef
  • FIOCLRL : GPIO_HalfWord_TypeDef , LPC_GPIO_TypeDef
  • FIOCLRU : GPIO_HalfWord_TypeDef
  • FIODIR : GPIO_Byte_TypeDef , LPC_GPIO_TypeDef
  • FIODIR0 : LPC_GPIO_TypeDef
  • FIODIR1 : LPC_GPIO_TypeDef
  • FIODIR2 : LPC_GPIO_TypeDef
  • FIODIR3 : LPC_GPIO_TypeDef
  • FIODIRH : LPC_GPIO_TypeDef
  • FIODIRL : GPIO_HalfWord_TypeDef , LPC_GPIO_TypeDef
  • FIODIRU : GPIO_HalfWord_TypeDef
  • FIOMASK : LPC_GPIO_TypeDef , GPIO_Byte_TypeDef
  • FIOMASK0 : LPC_GPIO_TypeDef
  • FIOMASK1 : LPC_GPIO_TypeDef
  • FIOMASK2 : LPC_GPIO_TypeDef
  • FIOMASK3 : LPC_GPIO_TypeDef
  • FIOMASKH : LPC_GPIO_TypeDef
  • FIOMASKL : GPIO_HalfWord_TypeDef , LPC_GPIO_TypeDef
  • FIOMASKU : GPIO_HalfWord_TypeDef
  • FIOPIN : GPIO_Byte_TypeDef , LPC_GPIO_TypeDef
  • FIOPIN0 : LPC_GPIO_TypeDef
  • FIOPIN1 : LPC_GPIO_TypeDef
  • FIOPIN2 : LPC_GPIO_TypeDef
  • FIOPIN3 : LPC_GPIO_TypeDef
  • FIOPINH : LPC_GPIO_TypeDef
  • FIOPINL : LPC_GPIO_TypeDef , GPIO_HalfWord_TypeDef
  • FIOPINU : GPIO_HalfWord_TypeDef
  • FIOSET : GPIO_Byte_TypeDef , LPC_GPIO_TypeDef
  • FIOSET0 : LPC_GPIO_TypeDef
  • FIOSET1 : LPC_GPIO_TypeDef
  • FIOSET2 : LPC_GPIO_TypeDef
  • FIOSET3 : LPC_GPIO_TypeDef
  • FIOSETH : LPC_GPIO_TypeDef
  • FIOSETL : LPC_GPIO_TypeDef , GPIO_HalfWord_TypeDef
  • FIOSETU : GPIO_HalfWord_TypeDef
  • flags : dhcp_msg , uip_tcpip_hdr , tcpip_hdr
  • flags1 : dns_hdr
  • flags2 : dns_hdr
  • FLASHCFG : LPC_SC_TypeDef
  • FlowControlCounter : LPC_EMAC_TypeDef
  • FlowControlStatus : LPC_EMAC_TypeDef
  • format : CAN_MSG_Type
  • FPCA : CONTROL_Type
  • fpin : I2S_MODEConf_Type
  • fragerr : uip_stats
  • FrameFormat : SSP_CFG_Type
  • from : smtp_state
  • FullCAN_Sec : AF_SectionDef
  • Funcnum : PINSEL_CFG_Type
  • function : httpd_cgi_call
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Fields
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- g -

  • GeneralCallState : I2C_OWNSLAVEADDR_CFG_Type
  • getrequestleft : webclient_state
  • getrequestptr : webclient_state
  • giaddr : dhcp_msg
  • GPREG0 : LPC_RTC_TypeDef
  • GPREG1 : LPC_RTC_TypeDef
  • GPREG2 : LPC_RTC_TypeDef
  • GPREG3 : LPC_RTC_TypeDef
  • GPREG4 : LPC_RTC_TypeDef
  • GrayScale : _DATCTR_Data_t
  • GS : _DATCTR_Data_t
  • GSR : LPC_CAN_TypeDef
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Fields
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- h -

  • H_Size : _FontType_t , _Bmp_t
  • handle : __FILE
  • HashCRC : RX_Stat
  • HashFilterH : LPC_EMAC_TypeDef
  • HashFilterL : LPC_EMAC_TypeDef
  • hblenerr : uip_stats
  • HcBulkCurrentED : LPC_USB_TypeDef
  • HcBulkHeadED : LPC_USB_TypeDef
  • HcCommandStatus : LPC_USB_TypeDef
  • HcControl : LPC_USB_TypeDef
  • HcControlCurrentED : LPC_USB_TypeDef
  • HcControlHeadED : LPC_USB_TypeDef
  • HcDoneHead : LPC_USB_TypeDef
  • HcFmInterval : LPC_USB_TypeDef
  • HcFmNumber : LPC_USB_TypeDef
  • HcFmRemaining : LPC_USB_TypeDef
  • HcHCCA : LPC_USB_TypeDef
  • HcInterruptDisable : LPC_USB_TypeDef
  • HcInterruptEnable : LPC_USB_TypeDef
  • HcInterruptStatus : LPC_USB_TypeDef
  • HcLSTreshold : LPC_USB_TypeDef
  • HcPeriodCurrentED : LPC_USB_TypeDef
  • HcPeriodicStart : LPC_USB_TypeDef
  • HcRevision : LPC_USB_TypeDef
  • HcRhDescriptorA : LPC_USB_TypeDef
  • HcRhDescriptorB : LPC_USB_TypeDef
  • HcRhPortStatus1 : LPC_USB_TypeDef
  • HcRhPortStatus2 : LPC_USB_TypeDef
  • HcRhStatus : LPC_USB_TypeDef
  • HFSR : SCB_Type
  • hlen : dhcp_msg
  • hnfEnable : MCPWM_CAPTURE_CFG_Type
  • hops : dhcp_msg
  • host : webclient_state
  • HOUR : RTC_TIME_Type , LPC_RTC_TypeDef
  • httpflag : webclient_state
  • httpheaderline : webclient_state
  • httpheaderlineptr : webclient_state
  • htype : dhcp_msg
  • hwlen : arp_hdr
  • hwtype : arp_hdr
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Fields
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- i -

  • I2ADR0 : LPC_I2C_TypeDef
  • I2ADR1 : LPC_I2C_TypeDef
  • I2ADR2 : LPC_I2C_TypeDef
  • I2ADR3 : LPC_I2C_TypeDef
  • I2C_CLKHI : LPC_USB_TypeDef
  • I2C_CLKLO : LPC_USB_TypeDef
  • I2C_CTL : LPC_USB_TypeDef
  • I2C_RX : LPC_USB_TypeDef
  • I2C_STS : LPC_USB_TypeDef
  • I2C_TX : LPC_USB_TypeDef
  • I2CONCLR : LPC_I2C_TypeDef
  • I2CONSET : LPC_I2C_TypeDef
  • I2CPADCFG : LPC_PINCON_TypeDef
  • I2DAT : LPC_I2C_TypeDef
  • I2DATA_BUFFER : LPC_I2C_TypeDef
  • I2MASK0 : LPC_I2C_TypeDef
  • I2MASK1 : LPC_I2C_TypeDef
  • I2MASK2 : LPC_I2C_TypeDef
  • I2MASK3 : LPC_I2C_TypeDef
  • I2SCLH : LPC_I2C_TypeDef
  • I2SCLL : LPC_I2C_TypeDef
  • I2SDAI : LPC_I2S_TypeDef
  • I2SDAO : LPC_I2S_TypeDef
  • I2SDMA1 : LPC_I2S_TypeDef
  • I2SDMA2 : LPC_I2S_TypeDef
  • I2SIRQ : LPC_I2S_TypeDef
  • I2SRXBITRATE : LPC_I2S_TypeDef
  • I2SRXFIFO : LPC_I2S_TypeDef
  • I2SRXMODE : LPC_I2S_TypeDef
  • I2SRXRATE : LPC_I2S_TypeDef
  • I2SSTATE : LPC_I2S_TypeDef
  • I2STAT : LPC_I2C_TypeDef
  • I2STXBITRATE : LPC_I2S_TypeDef
  • I2STXFIFO : LPC_I2S_TypeDef
  • I2STXMODE : LPC_I2S_TypeDef
  • I2STXRATE : LPC_I2S_TypeDef
  • IABR : NVIC_Type
  • ICER : NVIC_Type
  • icmp : uip_stats
  • icmpchksum : icmpip_hdr , uip_icmpip_hdr
  • icode : icmpip_hdr , uip_icmpip_hdr
  • ICPR : NVIC_Type
  • ICR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_SSP_TypeDef , LPC_CAN_TypeDef
  • ICSR : SCB_Type
  • ICTR : SCnSCB_Type
  • id : CAN_MSG_Type , dns_hdr , icmpip_hdr , uip_icmpip_hdr
  • id_11 : FullCAN_Entry , SFF_Entry
  • ID_29 : EFF_Entry
  • IER : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_CAN_TypeDef
  • ifftFlag : arm_cfft_radix4_instance_f32 , arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31
  • ifftFlagR : arm_rfft_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32
  • IIR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • ILR : LPC_RTC_TypeDef
  • IMSC : LPC_SSP_TypeDef
  • Info : RX_Stat , TX_Stat
  • InfoAdr : _USB_DMA_DESCRIPTOR
  • initialmss : uip_conn
  • inputbuf : httpd_state
  • inputbuffer : hello_world_state
  • IntClear : LPC_EMAC_TypeDef
  • IntEnable : LPC_EMAC_TypeDef
  • interval : timer
  • IntOnCaption : PWM_CAPTURECFG_Type , TIM_CAPTURECFG_Type
  • IntOnMatch : PWM_MATCHCFG_Type , TIM_MATCHCFG_Type
  • IntSet : LPC_EMAC_TypeDef
  • IntStatus : LPC_EMAC_TypeDef , LPC_GPIOINT_TypeDef
  • InvertIndex : QEI_CFG_Type
  • INXCMP : LPC_QEI_TypeDef
  • INXCNT : LPC_QEI_TypeDef
  • IO0IntClr : LPC_GPIOINT_TypeDef
  • IO0IntEnF : LPC_GPIOINT_TypeDef
  • IO0IntEnR : LPC_GPIOINT_TypeDef
  • IO0IntStatF : LPC_GPIOINT_TypeDef
  • IO0IntStatR : LPC_GPIOINT_TypeDef
  • IO2IntClr : LPC_GPIOINT_TypeDef
  • IO2IntEnF : LPC_GPIOINT_TypeDef
  • IO2IntEnR : LPC_GPIOINT_TypeDef
  • IO2IntStatF : LPC_GPIOINT_TypeDef
  • IO2IntStatR : LPC_GPIOINT_TypeDef
  • ip : uip_stats
  • IP : NVIC_Type
  • ipaddr : arp_entry , dns_answer , dhcpc_state , namemap , neighbor_entry , uip_fw_netif
  • ipchksum : tcpip_hdr , uip_udpip_hdr , ethip_hdr , uip_tcpip_hdr , icmpip_hdr , uip_icmpip_hdr
  • IPGR : LPC_EMAC_TypeDef
  • IPGT : LPC_EMAC_TypeDef
  • ipid : ethip_hdr , tcpip_hdr , icmpip_hdr , fwcache_entry , uip_udpip_hdr , uip_icmpip_hdr , uip_tcpip_hdr
  • ipoffset : tcpip_hdr , uip_icmpip_hdr , icmpip_hdr , ethip_hdr , uip_udpip_hdr , uip_tcpip_hdr
  • IR : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • IRCTRIM : LPC_SC_TypeDef
  • ISAR : SCB_Type
  • ISER : NVIC_Type
  • IsoEP : _USB_DMA_DESCRIPTOR
  • ISPR : NVIC_Type
  • ISR : xPSR_Type , IPSR_Type
  • IT : xPSR_Type
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

  • Data Fields
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- p -

  • p : hello_world_state
  • Packet : RX_Desc , TX_Desc
  • Param : _GLCD_CmdCtrl_t
  • Parity : UART_CFG_Type
  • payload : icmpip_hdr
  • pbDataBuf : EMAC_PACKETBUF_Type
  • pbEMAC_Addr : EMAC_CFG_Type
  • pBitRevTable : arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31 , arm_cfft_radix4_instance_f32
  • PC : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • pCfft : arm_rfft_instance_f32 , arm_dct4_instance_f32 , arm_dct4_instance_q31 , arm_dct4_instance_q15 , arm_rfft_instance_q15 , arm_rfft_instance_q31
  • PCLKSEL0 : LPC_SC_TypeDef
  • PCLKSEL1 : LPC_SC_TypeDef
  • pCoeffs : arm_fir_interpolate_instance_q15 , arm_fir_interpolate_instance_q31 , arm_fir_interpolate_instance_f32 , arm_biquad_cas_df1_32x64_ins_q31 , arm_biquad_cascade_df2T_instance_f32 , arm_fir_lattice_instance_q15 , arm_fir_lattice_instance_q31 , arm_fir_lattice_instance_f32 , arm_lms_instance_f32 , arm_lms_instance_q15 , arm_lms_instance_q31 , arm_lms_norm_instance_f32 , arm_fir_instance_q7 , arm_lms_norm_instance_q31 , arm_lms_norm_instance_q15 , arm_fir_instance_q15 , arm_fir_sparse_instance_f32 , arm_fir_sparse_instance_q31 , arm_fir_instance_q31 , arm_fir_sparse_instance_q15 , arm_fir_sparse_instance_q7 , arm_fir_instance_f32 , arm_biquad_casd_df1_inst_q15 , arm_biquad_casd_df1_inst_q31 , arm_biquad_casd_df1_inst_f32 , arm_fir_decimate_instance_q15 , arm_fir_decimate_instance_q31 , arm_fir_decimate_instance_f32
  • PCON : LPC_SC_TypeDef
  • PCONP : LPC_SC_TypeDef
  • pCosFactor : arm_dct4_instance_f32 , arm_dct4_instance_q31 , arm_dct4_instance_q15
  • PCR : LPC_PWM_TypeDef
  • pData : _USB_EP_DATA , arm_matrix_instance_f32 , arm_matrix_instance_q15 , arm_matrix_instance_q31 , arm_bilinear_interp_instance_f32 , arm_bilinear_interp_instance_q31 , arm_bilinear_interp_instance_q15 , arm_bilinear_interp_instance_q7
  • pFontDesc : _FontType_t
  • pFontStream : _FontType_t
  • PFR : SCB_Type
  • pfunc : ptentry
  • phaseLength : arm_fir_interpolate_instance_q15 , arm_fir_interpolate_instance_q31 , arm_fir_interpolate_instance_f32
  • Pinmode : PINSEL_CFG_Type
  • PINMODE0 : LPC_PINCON_TypeDef
  • PINMODE1 : LPC_PINCON_TypeDef
  • PINMODE2 : LPC_PINCON_TypeDef
  • PINMODE3 : LPC_PINCON_TypeDef
  • PINMODE4 : LPC_PINCON_TypeDef
  • PINMODE5 : LPC_PINCON_TypeDef
  • PINMODE6 : LPC_PINCON_TypeDef
  • PINMODE7 : LPC_PINCON_TypeDef
  • PINMODE8 : LPC_PINCON_TypeDef
  • PINMODE9 : LPC_PINCON_TypeDef
  • PINMODE_OD0 : LPC_PINCON_TypeDef
  • PINMODE_OD1 : LPC_PINCON_TypeDef
  • PINMODE_OD2 : LPC_PINCON_TypeDef
  • PINMODE_OD3 : LPC_PINCON_TypeDef
  • PINMODE_OD4 : LPC_PINCON_TypeDef
  • Pinnum : PINSEL_CFG_Type
  • PINSEL0 : LPC_PINCON_TypeDef
  • PINSEL1 : LPC_PINCON_TypeDef
  • PINSEL10 : LPC_PINCON_TypeDef
  • PINSEL2 : LPC_PINCON_TypeDef
  • PINSEL3 : LPC_PINCON_TypeDef
  • PINSEL4 : LPC_PINCON_TypeDef
  • PINSEL5 : LPC_PINCON_TypeDef
  • PINSEL6 : LPC_PINCON_TypeDef
  • PINSEL7 : LPC_PINCON_TypeDef
  • PINSEL8 : LPC_PINCON_TypeDef
  • PINSEL9 : LPC_PINCON_TypeDef
  • pkCoeffs : arm_iir_lattice_instance_q15 , arm_iir_lattice_instance_q31 , arm_iir_lattice_instance_f32
  • PLL0CFG : LPC_SC_TypeDef
  • PLL0CON : LPC_SC_TypeDef
  • PLL0FEED : LPC_SC_TypeDef
  • PLL0STAT : LPC_SC_TypeDef
  • PLL1CFG : LPC_SC_TypeDef
  • PLL1CON : LPC_SC_TypeDef
  • PLL1FEED : LPC_SC_TypeDef
  • PLL1STAT : LPC_SC_TypeDef
  • PORT : ITM_Type
  • port : webclient_state
  • Portnum : PINSEL_CFG_Type
  • postShift : arm_lms_norm_instance_q15 , arm_biquad_casd_df1_inst_q15 , arm_biquad_casd_df1_inst_q31 , arm_biquad_cas_df1_32x64_ins_q31 , arm_lms_instance_q15 , arm_lms_instance_q31 , arm_lms_norm_instance_q31
  • PowerDown : LPC_EMAC_TypeDef
  • pPalette : _Bmp_t
  • pPicDesc : _Bmp_t
  • pPicStream : _Bmp_t
  • PR : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • PrescaleOption : TIM_TIMERCFG_Type , PWM_TIMERCFG_Type
  • PrescaleValue : PWM_TIMERCFG_Type , TIM_TIMERCFG_Type
  • pRfft : arm_dct4_instance_f32 , arm_dct4_instance_q15 , arm_dct4_instance_q31
  • proto : fwcache_entry , tcpip_hdr , icmpip_hdr , uip_tcpip_hdr , uip_udpip_hdr , ethip_hdr , uip_icmpip_hdr
  • protocol : arp_hdr
  • protoerr : uip_stats
  • protolen : arp_hdr
  • psockpt : psock
  • pState : arm_fir_sparse_instance_f32 , arm_fir_instance_f32 , arm_fir_instance_q31 , arm_fir_sparse_instance_q31 , arm_fir_interpolate_instance_q31 , arm_fir_instance_q7 , arm_biquad_casd_df1_inst_q15 , arm_fir_decimate_instance_q31 , arm_biquad_cas_df1_32x64_ins_q31 , arm_lms_instance_f32 , arm_fir_decimate_instance_q15 , arm_fir_sparse_instance_q15 , arm_lms_norm_instance_q15 , arm_lms_norm_instance_q31 , arm_fir_sparse_instance_q7 , arm_fir_interpolate_instance_q15 , arm_fir_lattice_instance_q31 , arm_iir_lattice_instance_f32 , arm_lms_norm_instance_f32 , arm_lms_instance_q15 , arm_lms_instance_q31 , arm_fir_interpolate_instance_f32 , arm_biquad_casd_df1_inst_f32 , arm_fir_instance_q15 , arm_fir_decimate_instance_f32 , arm_fir_lattice_instance_q15 , arm_biquad_cascade_df2T_instance_f32 , arm_biquad_casd_df1_inst_q31 , arm_iir_lattice_instance_q31 , arm_fir_lattice_instance_f32 , arm_iir_lattice_instance_q15
  • pt : dhcpc_state
  • pTapDelay : arm_fir_sparse_instance_q15 , arm_fir_sparse_instance_f32 , arm_fir_sparse_instance_q7 , arm_fir_sparse_instance_q31
  • ptr : psock_buf
  • pTwiddle : arm_cfft_radix4_instance_q31 , arm_cfft_radix4_instance_q15 , arm_dct4_instance_f32 , arm_cfft_radix4_instance_f32 , arm_dct4_instance_q31 , arm_dct4_instance_q15
  • pTwiddleAReal : arm_rfft_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32
  • pTwiddleBReal : arm_rfft_instance_q15 , arm_rfft_instance_f32 , arm_rfft_instance_q31
  • Pulse : _GLCD_CmdCtrl_t
  • pvCoeffs : arm_iir_lattice_instance_f32 , arm_iir_lattice_instance_q15 , arm_iir_lattice_instance_q31
  • pYData : arm_linear_interp_instance_f32
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

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- q -

  • Q : APSR_Type , xPSR_Type
  • QEICAP : LPC_QEI_TypeDef
  • QEICLR : LPC_QEI_TypeDef
  • QEICON : LPC_QEI_TypeDef
  • QEICONF : LPC_QEI_TypeDef
  • QEIIE : LPC_QEI_TypeDef
  • QEIIEC : LPC_QEI_TypeDef
  • QEIIES : LPC_QEI_TypeDef
  • QEIINTSTAT : LPC_QEI_TypeDef
  • QEILOAD : LPC_QEI_TypeDef
  • QEIMAXPOS : LPC_QEI_TypeDef
  • QEIPOS : LPC_QEI_TypeDef
  • QEISET : LPC_QEI_TypeDef
  • QEISTAT : LPC_QEI_TypeDef
  • QEITIME : LPC_QEI_TypeDef
  • QEIVEL : LPC_QEI_TypeDef
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

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- r -

  • RBR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • RC_AddMode : _DATCTR_Data_t
  • rcv_nxt : uip_conn
  • RD : CAN_PinCFG_Type
  • RDA : LPC_CAN_TypeDef
  • RDB : LPC_CAN_TypeDef
  • rdIdx : __CDC_BUF_T , __SER_BUF_T
  • readlen : psock
  • readptr : psock
  • recipTable : arm_lms_norm_instance_q31 , arm_lms_norm_instance_q15
  • recv : uip_stats
  • ReloadOption : QEI_RELOADCFG_Type
  • ReloadValue : QEI_RELOADCFG_Type
  • Reserved : I2S_MODEConf_Type , PWM_TIMERCFG_Type , PWM_COUNTERCFG_Type , QEI_RELOADCFG_Type , TIM_TIMERCFG_Type , TIM_COUNTERCFG_Type , TIM_MATCHCFG_Type
  • RESERVED : DAC_CONVERTER_CFG_Type
  • RESERVED0 : SCnSCB_Type , ITM_Type , LPC_SC_TypeDef , LPC_PINCON_TypeDef , LPC_GPIO_TypeDef , LPC_GPIOINT_TypeDef , LPC_TIM_TypeDef , LPC_PWM_TypeDef , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_SPI_TypeDef , LPC_RIT_TypeDef , LPC_RTC_TypeDef , LPC_WDT_TypeDef , LPC_ADC_TypeDef , LPC_QEI_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • Reserved0 : I2S_CFG_Type , I2S_DMAConf_Type
  • RESERVED0 : GPIO_Byte_TypeDef , GPIO_HalfWord_TypeDef , NVIC_Type , SCB_Type
  • RESERVED1 : SCnSCB_Type , ITM_Type , LPC_SC_TypeDef , LPC_TIM_TypeDef , LPC_PWM_TypeDef , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_WDT_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • RESERVED10 : LPC_RTC_TypeDef , LPC_UART1_TypeDef
  • RESERVED11 : LPC_UART1_TypeDef , LPC_RTC_TypeDef
  • RESERVED12 : LPC_RTC_TypeDef
  • RESERVED13 : LPC_RTC_TypeDef
  • RESERVED14 : LPC_RTC_TypeDef
  • RESERVED15 : LPC_RTC_TypeDef
  • RESERVED16 : LPC_RTC_TypeDef
  • RESERVED17 : LPC_RTC_TypeDef
  • RESERVED18 : LPC_RTC_TypeDef
  • RESERVED19 : LPC_RTC_TypeDef
  • RESERVED2 : NVIC_Type , ITM_Type , LPC_SC_TypeDef , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • RESERVED20 : LPC_RTC_TypeDef
  • RESERVED21 : LPC_RTC_TypeDef
  • RESERVED3 : NVIC_Type , LPC_SC_TypeDef , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • RESERVED4 : LPC_SC_TypeDef , NVIC_Type , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • RESERVED5 : LPC_RTC_TypeDef , LPC_SC_TypeDef , NVIC_Type , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_USB_TypeDef , LPC_EMAC_TypeDef
  • RESERVED6 : LPC_UART_TypeDef , LPC_SC_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_EMAC_TypeDef
  • RESERVED7 : LPC_EMAC_TypeDef , LPC_SC_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef
  • RESERVED8 : LPC_SC_TypeDef , LPC_UART1_TypeDef , LPC_RTC_TypeDef , LPC_EMAC_TypeDef
  • RESERVED9 : LPC_RTC_TypeDef , LPC_UART1_TypeDef
  • reset : I2S_CFG_Type
  • ResetOnMatch : TIM_MATCHCFG_Type , PWM_MATCHCFG_Type
  • retransmissions_count : I2C_M_SETUP_Type
  • retransmissions_max : I2C_M_SETUP_Type
  • retries : namemap
  • Reversed : _MADCTR_Data_t , _DATCTR_Data_t , _COLMOD_Data_t
  • rexmit : uip_stats
  • RFS : LPC_CAN_TypeDef
  • RGB : _MADCTR_Data_t , _DATCTR_Data_t
  • RGB_Mode : _DATCTR_Data_t
  • RICOMPVAL : LPC_RIT_TypeDef
  • RICOUNTER : LPC_RIT_TypeDef
  • RICTRL : LPC_RIT_TypeDef
  • RID : LPC_CAN_TypeDef
  • RIMASK : LPC_RIT_TypeDef
  • ripaddr : uip_conn
  • RIS : LPC_SSP_TypeDef
  • RisingEdge : TIM_CAPTURECFG_Type , PWM_CAPTURECFG_Type
  • rport : uip_conn
  • RS485CTRL : LPC_UART1_TypeDef
  • RS485DLY : LPC_UART1_TypeDef
  • RSERVED1 : NVIC_Type
  • RSID : LPC_SC_TypeDef
  • Rsrvd : _USB_DMA_DESCRIPTOR
  • rst : uip_stats
  • RSV : LPC_EMAC_TypeDef
  • RTC_AUX : LPC_RTC_TypeDef
  • RTC_AUXEN : LPC_RTC_TypeDef
  • rto : uip_conn
  • rx : UART_RING_BUFFER_T
  • rx_cnt : SSP_DATA_SETUP_Type
  • rx_count : I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • rx_data : I2C_M_SETUP_Type , I2C_S_SETUP_Type , SPI_DATA_SETUP_Type , SSP_DATA_SETUP_Type
  • rx_head : UART_RING_BUFFER_T
  • rx_length : I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • Rx_State : UART1_RS485_CTRLCFG_Type
  • rx_tail : UART_RING_BUFFER_T
  • RxConsumeIndex : LPC_EMAC_TypeDef
  • RxDescriptor : LPC_EMAC_TypeDef
  • RxDescriptorNumber : LPC_EMAC_TypeDef
  • RxFilterCtrl : LPC_EMAC_TypeDef
  • RxFilterWoLClear : LPC_EMAC_TypeDef
  • RxFilterWoLStatus : LPC_EMAC_TypeDef
  • RxProduceIndex : LPC_EMAC_TypeDef
  • RxStatus : LPC_EMAC_TypeDef
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

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- s -

  • sa : uip_conn
  • SA0 : LPC_EMAC_TypeDef
  • SA1 : LPC_EMAC_TypeDef
  • SA2 : LPC_EMAC_TypeDef
  • SCR : LPC_UART1_TypeDef , SCB_Type , LPC_UART_TypeDef , LPC_UART0_TypeDef
  • scriptlen : httpd_state
  • scriptpt : httpd_state
  • scriptptr : httpd_state
  • SCS : LPC_SC_TypeDef
  • SEC : RTC_TIME_Type , LPC_RTC_TypeDef
  • secs : dhcp_msg
  • Sel : _ASCSET_Data_t
  • sendlen : psock
  • sendptr : smtp_state , psock
  • sent : uip_stats
  • sentlen : smtp_state
  • seqno : namemap , tcpip_hdr , icmpip_hdr , uip_tcpip_hdr , uip_icmpip_hdr
  • serverid : dhcpc_state
  • SFF_GPR_NumEntry : AF_SectionDef
  • SFF_GPR_Sec : AF_SectionDef
  • SFF_GRP_sa : LPC_CANAF_TypeDef
  • SFF_NumEntry : AF_SectionDef
  • SFF_sa : LPC_CANAF_TypeDef
  • SFF_Sec : AF_SectionDef
  • Sfl : _ASCSET_Data_t
  • SHCSR : SCB_Type
  • SHP : SCB_Type
  • shwaddr : arp_hdr
  • siaddr : dhcp_msg
  • SignalMode : QEI_CFG_Type
  • sipaddr : arp_hdr
  • sl_addr7bit : I2C_M_SETUP_Type
  • SlaveAddr_7bit : I2C_OWNSLAVEADDR_CFG_Type
  • SlaveAddrChannel : I2C_OWNSLAVEADDR_CFG_Type
  • SlaveAddrMaskValue : I2C_OWNSLAVEADDR_CFG_Type
  • Smd : _ASCSET_Data_t
  • sname : dhcp_msg
  • snd_nxt : uip_conn
  • sout : httpd_state
  • SPCCR : LPC_SPI_TypeDef
  • SPCR : LPC_SPI_TypeDef
  • SPDR : LPC_SPI_TypeDef
  • SPINT : LPC_SPI_TypeDef
  • SPSEL : CONTROL_Type
  • SPSR : LPC_SPI_TypeDef
  • SR : LPC_SSP_TypeDef , LPC_CAN_TypeDef
  • src : uip_eth_hdr
  • SrcAddr : GPDMA_LLI_Type
  • SrcConn : GPDMA_Channel_CFG_Type
  • srcipaddr : uip_icmpip_hdr , uip_udpip_hdr , ethip_hdr , uip_tcpip_hdr , tcpip_hdr , icmpip_hdr , fwcache_entry
  • SrcMemAddr : GPDMA_Channel_CFG_Type
  • srcport : tcpip_hdr , uip_tcpip_hdr , uip_udpip_hdr
  • Ssl : _ASCSET_Data_t
  • start : timer
  • state : namemap , telnetd_state , arm_pid_instance_q15 , arm_pid_instance_q31 , arm_pid_instance_f32 , smtp_state , httpd_state , dhcpc_state , psock , webclient_state
  • stateIndex : arm_fir_sparse_instance_q15 , arm_fir_sparse_instance_q7 , arm_fir_sparse_instance_q31 , arm_fir_sparse_instance_f32
  • status : I2C_S_SETUP_Type
  • Status : PWM_Match_T
  • status : I2C_M_SETUP_Type , SPI_DATA_SETUP_Type
  • Status : LPC_EMAC_TypeDef
  • status : SSP_DATA_SETUP_Type
  • STIR : NVIC_Type
  • stop : I2S_CFG_Type
  • Stopbits : UART_CFG_Type
  • StopOnMatch : TIM_MATCHCFG_Type , PWM_MATCHCFG_Type
  • subject : smtp_state
  • SUPP : LPC_EMAC_TypeDef
  • sv : uip_conn
  • syndrop : uip_stats
  • synrst : uip_stats
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

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- t -

  • T : xPSR_Type
  • TC : LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • tcp : uip_stats
  • tcpchksum : tcpip_hdr , uip_tcpip_hdr
  • tcpoffset : uip_tcpip_hdr , tcpip_hdr
  • tcpstateflags : uip_conn
  • TCR : ITM_Type , LPC_TIM_TypeDef , LPC_PWM_TypeDef
  • TD : CAN_PinCFG_Type
  • TDA1 : LPC_CAN_TypeDef
  • TDA2 : LPC_CAN_TypeDef
  • TDA3 : LPC_CAN_TypeDef
  • TDB1 : LPC_CAN_TypeDef
  • TDB2 : LPC_CAN_TypeDef
  • TDB3 : LPC_CAN_TypeDef
  • TER : ITM_Type , LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • TEST : LPC_EMAC_TypeDef
  • textlen : smtp_state
  • TFI1 : LPC_CAN_TypeDef
  • TFI2 : LPC_CAN_TypeDef
  • TFI3 : LPC_CAN_TypeDef
  • THR : LPC_UART_TypeDef , LPC_UART0_TypeDef , LPC_UART1_TypeDef
  • ticks : dhcpc_state
  • TID1 : LPC_CAN_TypeDef
  • TID2 : LPC_CAN_TypeDef
  • TID3 : LPC_CAN_TypeDef
  • time : neighbor_entry , arp_entry
  • timer : dhcpc_state , webclient_state , httpd_state , fwcache_entry , uip_conn
  • timerReset : MCPWM_CAPTURE_CFG_Type
  • tmr : namemap
  • to : smtp_state
  • tos : tcpip_hdr , icmpip_hdr , uip_tcpip_hdr , uip_icmpip_hdr , uip_udpip_hdr , ethip_hdr
  • TPR : ITM_Type
  • TransferSize : GPDMA_Channel_CFG_Type
  • TransferType : GPDMA_Channel_CFG_Type
  • TransferWidth : GPDMA_Channel_CFG_Type
  • TSV0 : LPC_EMAC_TypeDef
  • TSV1 : LPC_EMAC_TypeDef
  • ttl : ethip_hdr , uip_udpip_hdr , tcpip_hdr , dns_answer , icmpip_hdr , uip_tcpip_hdr , uip_icmpip_hdr
  • twidCoefModifier : arm_cfft_radix4_instance_f32 , arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31
  • twidCoefRModifier : arm_rfft_instance_f32 , arm_rfft_instance_q15 , arm_rfft_instance_q31
  • tx : UART_RING_BUFFER_T
  • tx_cnt : SSP_DATA_SETUP_Type
  • tx_count : I2C_S_SETUP_Type , I2C_M_SETUP_Type
  • tx_data : I2C_S_SETUP_Type , SSP_DATA_SETUP_Type , I2C_M_SETUP_Type , SPI_DATA_SETUP_Type
  • tx_head : UART_RING_BUFFER_T
  • tx_length : I2C_M_SETUP_Type , I2C_S_SETUP_Type
  • tx_tail : UART_RING_BUFFER_T
  • TxConsumeIndex : LPC_EMAC_TypeDef
  • TxDescriptor : LPC_EMAC_TypeDef
  • TxDescriptorNumber : LPC_EMAC_TypeDef
  • TxProduceIndex : LPC_EMAC_TypeDef
  • txrx_setup : I2C_CFG_T
  • TxStatus : LPC_EMAC_TypeDef
  • type : dns_answer
  • Type : _USB_DMA_DESCRIPTOR
  • type : CAN_MSG_Type , icmpip_hdr , uip_eth_hdr , uip_icmpip_hdr
  • Type : _USB_DMA_DESCRIPTOR
  • typeerr : uip_stats
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

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- u -

  • u16 : ITM_Type
  • u32 : ITM_Type
  • u8 : ITM_Type
  • udpchksum : uip_udpip_hdr
  • udplen : uip_udpip_hdr
  • ulDataLen : EMAC_PACKETBUF_Type
  • ulQEIConfig : QEI_CFGOPT_Type
  • unused : fwcache_entry
  • upperEID : EFF_GPR_Entry
  • upperID : SFF_GPR_Entry
  • urgp : tcpip_hdr , uip_tcpip_hdr
  • USBCLKCFG : LPC_SC_TypeDef
  • USBClkCtrl : LPC_USB_TypeDef
  • USBClkSt : LPC_USB_TypeDef
  • USBCmdCode : LPC_USB_TypeDef
  • USBCmdData : LPC_USB_TypeDef
  • USBCtrl : LPC_USB_TypeDef
  • USBDevIntClr : LPC_USB_TypeDef
  • USBDevIntEn : LPC_USB_TypeDef
  • USBDevIntPri : LPC_USB_TypeDef
  • USBDevIntSet : LPC_USB_TypeDef
  • USBDevIntSt : LPC_USB_TypeDef
  • USBDMAIntEn : LPC_USB_TypeDef
  • USBDMAIntSt : LPC_USB_TypeDef
  • USBDMARClr : LPC_USB_TypeDef
  • USBDMARSet : LPC_USB_TypeDef
  • USBDMARSt : LPC_USB_TypeDef
  • USBEoTIntClr : LPC_USB_TypeDef
  • USBEoTIntSet : LPC_USB_TypeDef
  • USBEoTIntSt : LPC_USB_TypeDef
  • USBEpDMADis : LPC_USB_TypeDef
  • USBEpDMAEn : LPC_USB_TypeDef
  • USBEpDMASt : LPC_USB_TypeDef
  • USBEpInd : LPC_USB_TypeDef
  • USBEpIntClr : LPC_USB_TypeDef
  • USBEpIntEn : LPC_USB_TypeDef
  • USBEpIntPri : LPC_USB_TypeDef
  • USBEpIntSet : LPC_USB_TypeDef
  • USBEpIntSt : LPC_USB_TypeDef
  • USBIntSt : LPC_SC_TypeDef
  • USBMaxPSize : LPC_USB_TypeDef
  • USBNDDRIntClr : LPC_USB_TypeDef
  • USBNDDRIntSet : LPC_USB_TypeDef
  • USBNDDRIntSt : LPC_USB_TypeDef
  • USBReEp : LPC_USB_TypeDef
  • USBRxData : LPC_USB_TypeDef
  • USBRxPLen : LPC_USB_TypeDef
  • USBSysErrIntClr : LPC_USB_TypeDef
  • USBSysErrIntSet : LPC_USB_TypeDef
  • USBSysErrIntSt : LPC_USB_TypeDef
  • USBTxData : LPC_USB_TypeDef
  • USBTxPLen : LPC_USB_TypeDef
  • USBUDCAH : LPC_USB_TypeDef
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

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- v -

  • V : APSR_Type , xPSR_Type
  • V_Size : _Bmp_t , _FontType_t
  • VAL : SysTick_Type
  • Val : _USB_DMA_DESCRIPTOR
  • VELCOMP : LPC_QEI_TypeDef
  • vhl : icmpip_hdr , uip_udpip_hdr , uip_icmpip_hdr , tcpip_hdr , uip_tcpip_hdr , ethip_hdr
  • vhlerr : uip_stats
  • VTOR : SCB_Type
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

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- w -

  • w : APSR_Type , IPSR_Type , CONTROL_Type , xPSR_Type
  • WDCLKSEL : LPC_WDT_TypeDef
  • WDFEED : LPC_WDT_TypeDef
  • WDMOD : LPC_WDT_TypeDef
  • WDTC : LPC_WDT_TypeDef
  • WDTV : LPC_WDT_TypeDef
  • wnd : tcpip_hdr , uip_tcpip_hdr
  • wordwidth : I2S_CFG_Type
  • wrIdx : __CDC_BUF_T , __SER_BUF_T
  • ws_sel : I2S_CFG_Type
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

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- x -

  • x0 : arm_lms_norm_instance_f32 , arm_lms_norm_instance_q31 , arm_lms_norm_instance_q15
  • x1 : arm_linear_interp_instance_f32
  • xid : dhcp_msg
  • xSpacing : arm_linear_interp_instance_f32
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Data Fields - Variables

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  • YEAR : RTC_TIME_Type , LPC_RTC_TypeDef
  • yiaddr : dhcp_msg
Generated on Mon Nov 28 2011 11:15:30 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Delay/gen_diff_delay.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Delay/gen_diff_delay.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          gen_diff_delay.c                                2010-07-16
00003 */
00026 #include "lpc17xx_timer.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE VARIABLES *************************/
00038 uint8_t menu1[] =
00039 "********************************************************************************\n\r"
00040 "Hello NXP Semiconductors \n\r"
00041 "Timer generate different delay signal demo \n\r"
00042 "\t - MCU: LPC17xx \n\r"
00043 "\t - Core: ARM Cortex-M3 \n\r"
00044 "\t - Communicate via: UART0 - 115200 bps \n\r"
00045 " Use timer 0 to generate different delay signals\n\r"
00046 " UART0 used to display and input configuration\n\r"
00047 "********************************************************************************\n\r";
00048 BOOL_8 toggle=TRUE;
00049 uint32_t T1, T2;
00050 /************************** PRIVATE FUNCTIONS *************************/
00051 void print_menu(void);
00052
00053 void TIMER0_IRQHandler(void);
00054 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00055 /*********************************************************************/
00060 void print_menu(void)
00061 {
00062         _DBG(menu1);
00063 }
00064
00065 void TIMER0_IRQHandler(void)
00066 {
00067         if (TIM_GetIntStatus(LPC_TIM0, TIM_MR0_INT)== SET)
00068         {
00069                 TIM_Cmd(LPC_TIM0,DISABLE);
00070                 TIM_ResetCounter(LPC_TIM0);
00071                 if(toggle==TRUE)
00072                 {
00073                         TIM_UpdateMatchValue(LPC_TIM0,0,T1*10);//MAT0.0
00074                         toggle=FALSE;
00075                 }
00076                 else
00077                 {
00078                         TIM_UpdateMatchValue(LPC_TIM0,0,T2*10);
00079                         toggle=TRUE;
00080                 }
00081                 TIM_Cmd(LPC_TIM0,ENABLE);
00082         }
00083         TIM_ClearIntPending(LPC_TIM0, TIM_MR0_INT);
00084 }
00085 /*-------------------------MAIN FUNCTION------------------------------*/
00086 /*********************************************************************/
00091 int c_entry(void)
00092 {
00093         PINSEL_CFG_Type PinCfg;
00094         TIM_TIMERCFG_Type TIM_ConfigStruct;
00095         TIM_MATCHCFG_Type TIM_MatchConfigStruct;
00096         uint8_t idx;
00097         uint16_t tem;
00098
00099         /* Initialize debug via UART0
00100          * – 115200bps
00101          * – 8 data bit
00102          * – No parity
00103          * – 1 stop bit
00104          * – No flow control
00105          */
00106         debug_frmwrk_init();
00107
00108         // print welcome screen
00109         print_menu();
00110         while(1)
00111         {
00112                 idx=0;T1=0;tem=0;
00113                 while(idx<3)
00114                 {
00115                         if(idx==0)
00116                         _DBG("\n\rPlease input delay time for T1 (from 1 to 999 ms):");
00117                         tem = _DG;
00118                         switch(tem)
00119                         {
00120                         case '0':case'1':case '2':case '3':case '4':case '5':case '6':case '7':case'8':case '9':
00121                                 tem = tem - 0x30;
00122                                 idx++;
00123                                 if(idx==1) tem = tem * 100;
00124                                 else if (idx==2) tem = tem * 10;
00125                                 T1 = T1 + tem;
00126                                 if(idx==3)_DBD16(T1);
00127                                 tem = 0;
00128                                 break;
00129                         default:
00130                                 _DBG("...Please input digits from 0 to 9 only!");
00131                                 idx = 0; tem = 0; T1 = 0;
00132                                 break;
00133                         }
00134                 }
00135                 idx=0;T2=0;tem=0;
00136                 while(idx<3)
00137                 {
00138                         if(idx==0)
00139                         _DBG("\n\rPlease input delay time for T2 (from 1 to 999 ms):");
00140                         tem = _DG;
00141                         switch(tem)
00142                         {
00143                         case '0':case'1':case '2':case '3':case '4':case '5':case '6':case '7':case'8':case '9':
00144                                 tem = tem - 0x30;
00145                                 idx++;
00146                                 if(idx==1) tem = tem * 100;
00147                                 else if (idx==2) tem = tem * 10;
00148                                 T2 = T2 + tem;
00149                                 if(idx==3)_DBD16(T2);
00150                                 tem = 0;
00151                                 break;
00152                         default:
00153                                 _DBG("...Please input digits from 0 to 9 only!");
00154                                 idx = 0; tem = 0; T2 = 0;
00155                                 break;
00156                         }
00157                 }
00158                 // Configure P1.28 as MAT0.0
00159                 PinCfg.Funcnum = 3;
00160                 PinCfg.OpenDrain = 0;
00161                 PinCfg.Pinmode = 0;
00162                 PinCfg.Portnum = 1;
00163                 PinCfg.Pinnum = 28;
00164                 PINSEL_ConfigPin(&PinCfg);
00165
00166                 // Initialize timer, prescale count time of 100uS
00167                 TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
00168                 TIM_ConfigStruct.PrescaleValue  = 100;
00169                 TIM_Init(LPC_TIM0, TIM_TIMER_MODE,&TIM_ConfigStruct);
00170
00171                 // use channel 0, MR0
00172                 TIM_MatchConfigStruct.MatchChannel = 0;
00173                 // Enable interrupt when MR0 matches the value in TC register
00174                 TIM_MatchConfigStruct.IntOnMatch   = TRUE;
00175                 //Enable reset on MR0: TIMER will reset if MR0 matches it
00176                 TIM_MatchConfigStruct.ResetOnMatch = FALSE;
00177                 //Stop on MR0 if MR0 matches it
00178                 TIM_MatchConfigStruct.StopOnMatch  = FALSE;
00179                 //Toggle MR0.0 pin if MR0 matches it
00180                 TIM_MatchConfigStruct.ExtMatchOutputType =TIM_EXTMATCH_TOGGLE;
00181                 // Set Match value
00182                 TIM_MatchConfigStruct.MatchValue   = T1*10;
00183                 TIM_ConfigMatch(LPC_TIM0,&TIM_MatchConfigStruct);
00184                 toggle=TRUE;
00185                 /* preemption = 1, sub-priority = 1 */
00186                 NVIC_SetPriority(TIMER0_IRQn, ((0x01<<3)|0x01));
00187                 /* Enable interrupt for timer 0 */
00188                 NVIC_EnableIRQ(TIMER0_IRQn);
00189
00190                 TIM_Cmd(LPC_TIM0,ENABLE);
00191                 _DBG("\n\rGenerating different delay signal..");
00192                 _DBG("\n\rPress ESC if you want to terminate and choose other configuration");
00193                 while(_DG!=27);
00194                 TIM_DeInit(LPC_TIM0);
00195                 /* Enable interrupt for timer 0 */
00196                 NVIC_DisableIRQ(TIMER0_IRQn);
00197         }
00198 }
00199
00200 /* Support required entry point for other toolchain */
00201 int main (void)
00202 {
00203         return c_entry();
00204 }
00205
00206 #ifdef  DEBUG
00207 /*******************************************************************************
00208 * @brief                Reports the name of the source file and the source line number
00209 *                               where the CHECK_PARAM error has occurred.
00210 * @param[in]    file Pointer to the source file name
00211 * @param[in]    line assert_param error line source number
00212 * @return               None
00213 *******************************************************************************/
00214 void check_failed(uint8_t *file, uint32_t line)
00215 {
00216         /* User can add his own implementation to report the file name and line number,
00217          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00218
00219         /* Infinite loop */
00220         while(1);
00221 }
00222 #endif
00223 /*
00224  * @}
00225  */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Freqs/gen_diff_freqs.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Gen_Diff_Freqs/gen_diff_freqs.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          gen_diff_freqs.c                                2010-07-16
00003 */
00026 #include "lpc17xx_timer.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE VARIABLES *************************/
00038 uint8_t menu1[] =
00039 "********************************************************************************\n\r"
00040 "Hello NXP Semiconductors \n\r"
00041 "Timer generate different frequencies demo \n\r"
00042 "\t - MCU: LPC17xx \n\r"
00043 "\t - Core: ARM Cortex-M3 \n\r"
00044 "\t - Communicate via: UART0 - 115200 bps \n\r"
00045 " Use timer 0 and timer 2 to generate 2 different frequency signals\n\r"
00046 " UART0 used to display and input frequency\n\r"
00047 "********************************************************************************\n\r";
00048
00049 /************************** PRIVATE FUNCTIONS *************************/
00050 void print_menu(void);
00051
00052
00053 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00054 /*********************************************************************/
00059 void print_menu(void)
00060 {
00061         _DBG(menu1);
00062 }
00063
00064
00065 /*-------------------------MAIN FUNCTION------------------------------*/
00066 /*********************************************************************/
00071 int c_entry(void)
00072 {
00073         PINSEL_CFG_Type PinCfg;
00074         TIM_TIMERCFG_Type TIM_ConfigStruct;
00075         TIM_MATCHCFG_Type TIM_MatchConfigStruct;
00076         uint8_t idx;
00077         uint16_t tem;
00078         uint32_t freq1, freq2;
00079
00080         /* Initialize debug via UART0
00081          * – 115200bps
00082          * – 8 data bit
00083          * – No parity
00084          * – 1 stop bit
00085          * – No flow control
00086          */
00087         debug_frmwrk_init();
00088
00089         // print welcome screen
00090         print_menu();
00091         while(1)
00092         {
00093                 // Select frequency for channel1 (MAT0.0)
00094                 idx=0;freq1=0;tem=0;
00095                 while(idx<3)
00096                 {
00097                         if(idx==0)
00098                         _DBG("\n\rPlease input frequency for channel1 (from 1 to 999 hz):");
00099                         tem = _DG;
00100                         switch(tem)
00101                         {
00102                         case '0':case'1':case '2':case '3':case '4':case '5':case '6':case '7':case'8':case '9':
00103                                 tem = tem - 0x30;
00104                                 idx++;
00105                                 if(idx==1) tem = tem * 100;
00106                                 else if (idx==2) tem = tem * 10;
00107                                 freq1 = freq1 + tem;
00108                                 if(idx==3)_DBD16(freq1);
00109                                 tem = 0;
00110                                 break;
00111                         default:
00112                                 _DBG("...Please input digits from 0 to 9 only!");
00113                                 idx = 0; tem = 0; freq1 = 0;
00114                                 break;
00115                         }
00116                 }
00117                 idx=0;freq2=0;tem=0;
00118                 while(idx<3)
00119                 {
00120                         if(idx==0)
00121                         _DBG("\n\rPlease input frequency for channel2 (from 1 to 999 hz):");
00122                         tem = _DG;
00123                         switch(tem)
00124                         {
00125                         case '0':case'1':case '2':case '3':case '4':case '5':case '6':case '7':case'8':case '9':
00126                                 tem = tem - 0x30;
00127                                 idx++;
00128                                 if(idx==1) tem = tem * 100;
00129                                 else if (idx==2) tem = tem * 10;
00130                                 freq2 = freq2 + tem;
00131                                 if(idx==3)_DBD16(freq2);
00132                                 tem = 0;
00133                                 break;
00134                         default:
00135                                 _DBG("...Please input digits from 0 to 9 only!");
00136                                 idx = 0; tem = 0; freq2 = 0;
00137                                 break;
00138                         }
00139                 }
00140                 // Configure P1.28 as MAT0.0
00141                 PinCfg.Funcnum = 3;
00142                 PinCfg.OpenDrain = 0;
00143                 PinCfg.Pinmode = 0;
00144                 PinCfg.Portnum = 1;
00145                 PinCfg.Pinnum = 28;
00146                 PINSEL_ConfigPin(&PinCfg);
00147                 // Configure P0.6 as MAT2.0
00148                 PinCfg.Funcnum = 3;
00149                 PinCfg.OpenDrain = 0;
00150                 PinCfg.Pinmode = 0;
00151                 PinCfg.Portnum = 0;
00152                 PinCfg.Pinnum = 6;
00153                 PINSEL_ConfigPin(&PinCfg);
00154
00155                 // Initialize timer, prescale count time of 1uS
00156                 TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
00157                 TIM_ConfigStruct.PrescaleValue  = 1;
00158                 TIM_Init(LPC_TIM0, TIM_TIMER_MODE,&TIM_ConfigStruct);
00159                 TIM_Init(LPC_TIM2, TIM_TIMER_MODE,&TIM_ConfigStruct);
00160
00161                 // use channel 0, MR0
00162                 TIM_MatchConfigStruct.MatchChannel = 0;
00163                 // Disable interrupt when MR0 matches the value in TC register
00164                 TIM_MatchConfigStruct.IntOnMatch   = FALSE;
00165                 //Enable reset on MR0: TIMER will reset if MR0 matches it
00166                 TIM_MatchConfigStruct.ResetOnMatch = TRUE;
00167                 //Stop on MR0 if MR0 matches it
00168                 TIM_MatchConfigStruct.StopOnMatch  = FALSE;
00169                 //Toggle MR0.0 pin if MR0 matches it
00170                 TIM_MatchConfigStruct.ExtMatchOutputType =TIM_EXTMATCH_TOGGLE;
00171                 // Set Match value
00172                 TIM_MatchConfigStruct.MatchValue   = 500000/freq1;
00173                 TIM_ConfigMatch(LPC_TIM0,&TIM_MatchConfigStruct);
00174
00175                 // Set Match value
00176                 TIM_MatchConfigStruct.MatchValue   = 500000/freq2;
00177                 TIM_ConfigMatch(LPC_TIM2,&TIM_MatchConfigStruct);
00178
00179                 TIM_Cmd(LPC_TIM0,ENABLE);
00180                 TIM_Cmd(LPC_TIM2,ENABLE);
00181                 _DBG("\n\rGenerating two different frequency signals..");
00182                 _DBG("\n\rPress ESC if you want to terminate and choose other frequencies");
00183                 while(_DG!=27);
00184                 TIM_DeInit(LPC_TIM0);
00185                 TIM_DeInit(LPC_TIM2);
00186         }
00187 }
00188
00189 /* Support required entry point for other toolchain */
00190 int main (void)
00191 {
00192         return c_entry();
00193 }
00194
00195 #ifdef  DEBUG
00196 /*******************************************************************************
00197 * @brief                Reports the name of the source file and the source line number
00198 *                               where the CHECK_PARAM error has occurred.
00199 * @param[in]    file Pointer to the source file name
00200 * @param[in]    line assert_param error line source number
00201 * @return               None
00202 *******************************************************************************/
00203 void check_failed(uint8_t *file, uint32_t line)
00204 {
00205         /* User can add his own implementation to report the file name and line number,
00206          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00207
00208         /* Infinite loop */
00209         while(1);
00210 }
00211 #endif
00212 /*
00213  * @}
00214  */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/glcd_ll.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/glcd_ll.c
Go to the documentation of this file.
00001 /*************************************************************************
00002  *
00003  *
00004  *    (c) Copyright IAR Systems 2006
00005  *
00006  *    File name   : glcd_ll.c
00007  *    Description : GLCD low level functions
00008  *
00009  *    History :
00010  *    1. Date        : December 2, 2006
00011  *       Author      : Stanimir Bonev
00012  *       Description : Create
00013  *
00014  *    $Revision: 30123 $
00015  **************************************************************************/
00016 #include "glcd_ll.h"
00017 #include "lpc_types.h"
00018 #include "LPC17xx.h"
00019 #include "lpc17xx_clkpwr.h"
00020
00021 /*************************************************************************
00022  * Function Name: GLCD_SetReset
00023  * Parameters: Boolean State
00024  * Return: none
00025  *
00026  * Description: Set reset pin state
00027  *
00028  *************************************************************************/
00029 void GLCD_SetReset (Bool State)
00030 {
00031         if(State)
00032         {
00033                 LPC_GPIO3->FIOSET |= (1UL<<25);
00034         }
00035         else
00036         {
00037                 LPC_GPIO3->FIOCLR |= (1<<25);
00038         }
00039 }
00040
00041 /*************************************************************************
00042  * Function Name: GLCD_Backlight
00043  * Parameters: Int8U Light
00044  * Return: none
00045  *
00046  * Description: Set backlight pin state
00047  *
00048  *************************************************************************/
00049 void GLCD_Backlight (uint8_t Light)
00050 {
00051         LPC_PWM1->MR3 = BACKLIGHT_OFF + Light;
00052         LPC_PWM1->LER |= (1<<3);
00053 }
00054
00055 /*************************************************************************
00056  * Function Name: GLCD_LLInit
00057  * Parameters: none
00058  * Return: none
00059  *
00060  * Description: Init Reset and Backlight control outputs
00061  *
00062  *************************************************************************/
00063 void GLCD_LLInit (void)
00064 {
00065         // LCD Reset output
00066         LPC_GPIO3->FIODIR |= (1UL<<25);
00067
00068         GLCD_SetReset(FALSE);
00069
00070         // LCD backlight PWM 8bit init
00071         LPC_PINCON->PINSEL7 |= (3<<20) ;    // assign P3.26 to PWM1.3
00072         LPC_SC->PCONP |= (1<<6);                // enable clock of PWM1
00073         LPC_PWM1->TCR &= ~(1<<3);
00074         LPC_PWM1->TCR &= ~(1<<0);                       // disable counting
00075         LPC_PWM1->TCR |= (1<<1);                        // reset
00076         LPC_PWM1->CTCR &= ~(3<<0);                      // from prescaler
00077         LPC_PWM1->MCR = 2 ;                                     // Reset on PWMMR0
00078         LPC_PWM1->PCR &= ~(1<<3);                       // Selects single edge controlled mode for PWM3
00079         LPC_PWM1->PCR |= (1<<11);                       // The PWM3 output enabled
00080
00081         LPC_PWM1->PR = 0;
00082         LPC_PWM1->MR0 = 0xFF;                           // 8bit resolution
00083         LPC_PWM1->LER |= (1<<0);
00084         LPC_PWM1->MR3 = 0;
00085         LPC_PWM1->LER |= (1<<3);
00086         LPC_PWM1->TCR |= (1<<3);                        // enable PWM function
00087         LPC_PWM1->TCR &= ~(1<<1);                       // release reset
00088         LPC_PWM1->TCR |= (1<<0);                        // enable counting
00089         GLCD_Backlight(0);
00090 }
00091
00092 /*************************************************************************
00093  * Function Name: GLCD_SPI_ChipSelect
00094  * Parameters: Boolean Select
00095  * Return: none
00096  *
00097  * Description: SSP0 Chip select control
00098  * Select = true  - Chip is enable
00099  * Select = false - Chip is disable
00100  *
00101  *************************************************************************/
00102 void GLCD_SPI_ChipSelect (Bool Select)
00103 {
00104         if (Select)
00105         {
00106                 LPC_GPIO1->FIOCLR |= (1<<21);
00107         }
00108         else
00109         {
00110                 LPC_GPIO1->FIOSET |= (1UL<<21);
00111         }
00112 }
00113
00114 /*************************************************************************
00115  * Function Name: GLCD_SPI_SetWordWidth
00116  * Parameters: Int32U Width
00117  * Return: Boolean
00118  *
00119  * Description: Set SSP 0 word width
00120  *
00121  *************************************************************************/
00122 Bool GLCD_SPI_SetWordWidth (uint32_t Width)
00123 {
00124         if(4 > Width || Width > 16)
00125         {
00126                 return(FALSE);
00127         }
00128
00129         LPC_SSP0->CR0 &= ~(0x0F);
00130         LPC_SSP0->CR0 |= (Width - 1) & 0x0F;
00131         return(TRUE);
00132 }
00133
00134 /*************************************************************************
00135  * Function Name: GLCD_SPI_SetClockFreq
00136  * Parameters: Int32U Frequency
00137  * Return: Int32U
00138  *
00139  * Description: Set SSP 0 clock
00140  *
00141  *************************************************************************/
00142 uint32_t GLCD_SPI_SetClockFreq (uint32_t Frequency)
00143 {
00144         uint32_t Fspi = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_SSP0);
00145         uint32_t Div = 2;
00146         while((Div * Frequency) < Fspi)
00147         {
00148                 if((Div += 2) == 254)
00149                 {
00150                         break;
00151                 }
00152         }
00153         LPC_SSP0->CPSR = Div;
00154         return(Fspi/Div);
00155 }
00156
00157 /*************************************************************************
00158  * Function Name: GLCD_SPI_Init
00159  * Parameters: uint32_t Clk, uint32_t Width
00160  * Return: none
00161  *
00162  * Description: Init SSP0
00163  *
00164  *************************************************************************/
00165 void GLCD_SPI_Init(uint32_t Clk, uint32_t Width)
00166 {
00167         uint32_t i;
00168         volatile uint32_t Dummy;
00169 //      Assign GPIO to SSP0 - SCK, MOSI, MISO
00170         LPC_PINCON->PINSEL3 |= (3<<8);  // SCK0 - P1.20
00171         LPC_PINCON->PINSEL3 |= (3<<14); // MISO0 - P1.23
00172         LPC_PINCON->PINSEL3 |= (3<<16); // MOSI0 - P1.24
00173
00174   // Chip select
00175         LPC_GPIO1->FIODIR |= (1UL<<21); //SSEL0 used as GPIOP1.21
00176
00177         GLCD_SPI_ChipSelect(FALSE);
00178
00179   // Spi init
00180         LPC_SC->PCONP |= (1<<21);       // SSP0 clock enable
00181     LPC_SSP0->CR1  &= ~(1<<1);  // Disable module
00182         LPC_SSP0->CR1  &= ~(1<<0);      // Disable Loop Back Mode
00183         LPC_SSP0->CR1  &= ~(1<<2);      // Master mode
00184         LPC_SSP0->CR0  &= ~(3<<4);      // SPI
00185         LPC_SSP0->CR0 &= ~(1<<6);       // CPOL = 0
00186         LPC_SSP0->CR0 &= ~(1<<7);       // CPHA = 0
00187         LPC_SSP0->IMSC = 0;                     // disable all interrupts
00188         LPC_SSP0->DMACR = 0;            // disable DMA
00189         LPC_SSP0->CR1  |= (1<<1);       // Enable module
00190         for (i = 0; i < 8; i++ )
00191         {
00192                 Dummy = LPC_SSP0->DR; // clear the RxFIFO
00193         }
00194         // Set SSP clock frequency
00195         GLCD_SPI_SetClockFreq(Clk);
00196         // Set data width
00197         GLCD_SPI_SetWordWidth(Width);
00198 }
00199
00200 /*************************************************************************
00201  * Function Name: GLCD_SPI_TranserByte
00202  * Parameters: uint32_t Data
00203  * Return: uint32_t
00204  *
00205  * Description: Transfer byte from SSP0
00206  *
00207  *************************************************************************/
00208 uint32_t GLCD_SPI_TranserByte (uint32_t Data)
00209 {
00210         while(!(LPC_SSP0->SR & (1<<1))); //check bit TNF
00211         LPC_SSP0->DR = Data;
00212         while((LPC_SSP0->SR & (1<<4))); //check bit BSY
00213         return(LPC_SSP0->DR);
00214 }
00215
00216 /*************************************************************************
00217  * Function Name: GLCD_SPI_SendBlock
00218  * Parameters: pInt8U pData, uint32_t Size
00219  *
00220  * Return: void
00221  *
00222  * Description: Write block of data to SSP
00223  *
00224  *************************************************************************/
00225 void GLCD_SPI_SendBlock (unsigned char *pData, uint32_t Size)
00226 {
00227         volatile uint32_t Dummy;
00228         uint32_t OutCount = Size;
00229         while (OutCount)
00230         {
00231                 while((LPC_SSP0->SR & (1<<1)) && OutCount)
00232         {
00233                         LPC_SSP0->DR = *pData++ | 0x100;  // Data
00234                         --OutCount;
00235         }
00236         }
00237         while(LPC_SSP0->SR & (1<<4)); //check bit BSY
00238   // draining RX Fifo
00239         while (LPC_SSP0->SR &(1<<2)) // check bit RNE
00240         {
00241                 Dummy = LPC_SSP0->DR;
00242         }
00243 }
00244
00245 /*************************************************************************
00246  * Function Name: GLCD_SPI_ReceiveBlock
00247  * Parameters: unsigned char * pData, uint32_t Size
00248  *
00249  * Return: void
00250  *
00251  * Description: Read block of data from SSP
00252  *
00253  *************************************************************************/
00254 void GLCD_SPI_ReceiveBlock (unsigned char *pData, uint32_t Size)
00255 {
00256         uint32_t Delta = 0;
00257         while (Size || Delta)
00258         {
00259                 while((LPC_SSP0->SR & (1<<1)) && (Delta < SSP_FIFO_SIZE) && Size)
00260                 {
00261                         LPC_SSP0->DR = 0xFFFF;
00262                         --Size; ++Delta;
00263                 }
00264                 while (LPC_SSP0->SR & (1<<2)) //check bit RNE
00265                 {
00266                         *pData++ = LPC_SSP0->DR;
00267                         --Delta;
00268                 }
00269         }
00270 }
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/glcd_ll.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/LCD/NOKIA6610_LCD/glcd_ll.h
Go to the documentation of this file.
00001 /*************************************************************************
00002  *
00003  *
00004  *    (c) Copyright IAR Systems 2006
00005  *
00006  *    File name   : glcd_ll.h
00007  *    Description : GLCD low level include file
00008  *
00009  *    History :
00010  *    1. Date        : December 2, 2006
00011  *       Author      : Stanimir Bonev
00012  *       Description : Create
00013  *
00014  *    $Revision: 28532 $
00015  **************************************************************************/
00016 #include "lpc_types.h"
00017
00018 #ifndef __GLCD_LL_H
00019 #define __GLCD_LL_H
00020
00021
00022 #define BACKLIGHT_OFF   0x40
00023 #define BACKLIGHT_ON    0x20
00024 #define SSP_FIFO_SIZE   8
00025
00026 /*************************************************************************
00027  * Function Name: GLCD_SetReset
00028  * Parameters: Boolean State
00029  * Return: none
00030  *
00031  * Description: Set reset pin state
00032  *
00033  *************************************************************************/
00034 void GLCD_SetReset (Bool State);
00035
00036 /*************************************************************************
00037  * Function Name: GLCD_Backlight
00038  * Parameters: Int8U Light
00039  * Return: none
00040  *
00041  * Description: Set backlight level
00042  *
00043  *************************************************************************/
00044 void GLCD_Backlight (uint8_t Light);
00045
00046 /*************************************************************************
00047  * Function Name: GLCD_LLInit
00048  * Parameters: none
00049  * Return: none
00050  *
00051  * Description: Init Reset and Backlight control outputs
00052  *
00053  *************************************************************************/
00054 void GLCD_LLInit (void);
00055
00056 /*************************************************************************
00057  * Function Name: GLCD_SPI_ChipSelect
00058  * Parameters: Boolean Select
00059  * Return: none
00060  *
00061  * Description: SSP0 Chip select control
00062  * Select = true  - Chip is enable
00063  * Select = false - Chip is disable
00064  *
00065  *************************************************************************/
00066 void GLCD_SPI_ChipSelect(Bool Select);
00067
00068 /*************************************************************************
00069  * Function Name: GLCD_SPI_SetWordWidth
00070  * Parameters: uint32_t Width
00071  * Return: Boolean
00072  *
00073  * Description: Set SSP 0 word width
00074  *
00075  *************************************************************************/
00076 Bool GLCD_SPI_SetWordWidth (uint32_t Width);
00077
00078 /*************************************************************************
00079  * Function Name: GLCD_SPI_SetClockFreq
00080  * Parameters: uint32_t Frequency
00081  * Return: uint32_t
00082  *
00083  * Description: Set SSP 0 clock
00084  *
00085  *************************************************************************/
00086 uint32_t GLCD_SPI_SetClockFreq (uint32_t Frequency);
00087
00088 /*************************************************************************
00089  * Function Name: GLCD_SPI_Init
00090  * Parameters: uint32_t Clk, uint32_t Width
00091  * Return: none
00092  *
00093  * Description: Init SSP0
00094  *
00095  *************************************************************************/
00096 void GLCD_SPI_Init(uint32_t Clk, uint32_t Width);
00097
00098 /*************************************************************************
00099  * Function Name: GLCD_SPI_TranserByte
00100  * Parameters: uint32_t Data
00101  * Return: uint32_t
00102  *
00103  * Description: Transfer byte from SSP0
00104  *
00105  *************************************************************************/
00106 uint32_t GLCD_SPI_TranserByte (uint32_t Data);
00107
00108 /*************************************************************************
00109  * Function Name: GLCD_SPI_SendBlock
00110  * Parameters: pInt8U pData, uint32_t Size
00111  *
00112  * Return: void
00113  *
00114  * Description: Read byte from SSP
00115  *
00116  *************************************************************************/
00117 void GLCD_SPI_SendBlock (unsigned char *pData, uint32_t Size);
00118
00119 /*************************************************************************
00120  * Function Name: GLCD_SPI_ReceiveBlock
00121  * Parameters: unsigned char *pData, uint32_t Size
00122  *
00123  * Return: void
00124  *
00125  * Description: Read byte from SSP
00126  *
00127  *************************************************************************/
00128 void GLCD_SPI_ReceiveBlock (unsigned char *pData, uint32_t Size);
00129
00130 #endif // __GLCD_LL_H
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- k -

  • KB_LED_PIN : emactest.c
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- l -

  • L : usb.h
  • LAST_ACK : tcpip.h
  • Last_cmd : microwire_test.c
  • LastFrameSent : tcpip.h
  • LC_END : lc-addrlabels.h , lc-switch.h
  • LC_INIT : lc-addrlabels.h , lc-switch.h
  • LC_RESUME : lc-addrlabels.h , lc-switch.h
  • LC_SET : lc-addrlabels.h , lc-switch.h
  • lc_t : lc-addrlabels.h , lc-switch.h
  • LCD_CS : GLCD_SPI_LPC1700.c
  • LCD_FLUSH_PIXELS : drv_glcd.h
  • LCD_SET_WINDOW : drv_glcd.h
  • lcd_text : lcdtest.c
  • LCD_WRITE_PIXEL : drv_glcd.h
  • LdcPixel_t : drv_glcd.h
  • LED : can_ledcontrol.c
  • LED1 : vcomdemo.h
  • LED1_MASK : emactest.c , main.c
  • LED2 : vcomdemo.h
  • LED2_MASK : emactest.c , main.c
  • LED3 : vcomdemo.h
  • LED4 : vcomdemo.h
  • LED5 : vcomdemo.h
  • LED6 : vcomdemo.h
  • LED7 : vcomdemo.h
  • LED8 : vcomdemo.h
  • LED_Blink() : emactest.c
  • LED_CFG : memory.h
  • LED_Init() : privilege.c , tcpip.c , emactest.c , main.c , wdt_interrupt_test.c
  • LED_MSK : memory.h
  • LED_PIN : clock-arch.c , main.c
  • LED_RD : memory.h
  • Led_State : mpu_test.c
  • LED_SUSP : memory.h
  • LED_toggle : wdt_interrupt_test.c
  • LED_Value : can_ledcontrol.c
  • LED_WR : memory.h
  • LEDMSK : usbaudio.h , vcomdemo.h , demo.h
  • LEDStatus : rit_interrupt.c , timer_int_match.c
  • Length : mscuser.c
  • LightGrey : GLCD.h
  • LISTENING : tcpip.h
  • lmsNorm_instance : arm_signal_converge_example_f32.c
  • lmsNormCoeff_f32 : arm_signal_converge_data.c , arm_signal_converge_example_f32.c
  • lmsStateF32 : arm_signal_converge_example_f32.c
  • long_duty : pwm_match_int.c
  • LPC_ADC : LPC17xx.h
  • LPC_ADC_BASE : LPC17xx.h
  • LPC_AHB_BASE : LPC17xx.h
  • LPC_AHBRAM0_BASE : LPC17xx.h
  • LPC_AHBRAM1_BASE : LPC17xx.h
  • LPC_APB0_BASE : LPC17xx.h
  • LPC_APB1_BASE : LPC17xx.h
  • LPC_CAN1 : LPC17xx.h
  • LPC_CAN1_BASE : LPC17xx.h
  • LPC_CAN2 : LPC17xx.h
  • LPC_CAN2_BASE : LPC17xx.h
  • LPC_CANAF : LPC17xx.h
  • LPC_CANAF_BASE : LPC17xx.h
  • LPC_CANAF_RAM : LPC17xx.h
  • LPC_CANAF_RAM_BASE : LPC17xx.h
  • LPC_CANCR : LPC17xx.h
  • LPC_CANCR_BASE : LPC17xx.h
  • LPC_CM3_BASE : LPC17xx.h
  • LPC_DAC : LPC17xx.h
  • LPC_DAC_BASE : LPC17xx.h
  • LPC_EMAC : LPC17xx.h
  • LPC_EMAC_BASE : LPC17xx.h
  • LPC_FLASH_BASE : LPC17xx.h
  • LPC_GPDMA : LPC17xx.h
  • LPC_GPDMA_BASE : LPC17xx.h
  • LPC_GPDMACH0 : LPC17xx.h
  • LPC_GPDMACH0_BASE : LPC17xx.h
  • LPC_GPDMACH1 : LPC17xx.h
  • LPC_GPDMACH1_BASE : LPC17xx.h
  • LPC_GPDMACH2 : LPC17xx.h
  • LPC_GPDMACH2_BASE : LPC17xx.h
  • LPC_GPDMACH3 : LPC17xx.h
  • LPC_GPDMACH3_BASE : LPC17xx.h
  • LPC_GPDMACH4 : LPC17xx.h
  • LPC_GPDMACH4_BASE : LPC17xx.h
  • LPC_GPDMACH5 : LPC17xx.h
  • LPC_GPDMACH5_BASE : LPC17xx.h
  • LPC_GPDMACH6 : LPC17xx.h
  • LPC_GPDMACH6_BASE : LPC17xx.h
  • LPC_GPDMACH7 : LPC17xx.h
  • LPC_GPDMACH7_BASE : LPC17xx.h
  • LPC_GPIO0 : LPC17xx.h
  • LPC_GPIO0_BASE : LPC17xx.h
  • LPC_GPIO1 : LPC17xx.h
  • LPC_GPIO1_BASE : LPC17xx.h
  • LPC_GPIO2 : LPC17xx.h
  • LPC_GPIO2_BASE : LPC17xx.h
  • LPC_GPIO3 : LPC17xx.h
  • LPC_GPIO3_BASE : LPC17xx.h
  • LPC_GPIO4 : LPC17xx.h
  • LPC_GPIO4_BASE : LPC17xx.h
  • LPC_GPIO_BASE : LPC17xx.h
  • LPC_GPIOINT : LPC17xx.h
  • LPC_GPIOINT_BASE : LPC17xx.h
  • LPC_I2C0 : LPC17xx.h
  • LPC_I2C0_BASE : LPC17xx.h
  • LPC_I2C1 : LPC17xx.h
  • LPC_I2C1_BASE : LPC17xx.h
  • LPC_I2C2 : LPC17xx.h
  • LPC_I2C2_BASE : LPC17xx.h
  • LPC_I2S : LPC17xx.h
  • LPC_I2S_BASE : LPC17xx.h
  • LPC_MCPWM : LPC17xx.h
  • LPC_MCPWM_BASE : LPC17xx.h
  • LPC_PINCON : LPC17xx.h
  • LPC_PINCON_BASE : LPC17xx.h
  • LPC_PWM1 : LPC17xx.h
  • LPC_PWM1_BASE : LPC17xx.h
  • LPC_QEI : LPC17xx.h
  • LPC_QEI_BASE : LPC17xx.h
  • LPC_RAM_BASE : LPC17xx.h
  • LPC_RIT : LPC17xx.h
  • LPC_RIT_BASE : LPC17xx.h
  • LPC_RTC : LPC17xx.h
  • LPC_RTC_BASE : LPC17xx.h
  • LPC_SC : LPC17xx.h
  • LPC_SC_BASE : LPC17xx.h
  • LPC_SPI : LPC17xx.h
  • LPC_SPI_BASE : LPC17xx.h
  • LPC_SSP0 : LPC17xx.h
  • LPC_SSP0_BASE : LPC17xx.h
  • LPC_SSP1 : LPC17xx.h
  • LPC_SSP1_BASE : LPC17xx.h
  • LPC_TIM0 : LPC17xx.h
  • LPC_TIM0_BASE : LPC17xx.h
  • LPC_TIM1 : LPC17xx.h
  • LPC_TIM1_BASE : LPC17xx.h
  • LPC_TIM2 : LPC17xx.h
  • LPC_TIM2_BASE : LPC17xx.h
  • LPC_TIM3 : LPC17xx.h
  • LPC_TIM3_BASE : LPC17xx.h
  • LPC_UART0 : LPC17xx.h
  • LPC_UART0_BASE : LPC17xx.h
  • LPC_UART1 : LPC17xx.h
  • LPC_UART1_BASE : LPC17xx.h
  • LPC_UART2 : LPC17xx.h
  • LPC_UART2_BASE : LPC17xx.h
  • LPC_UART3 : LPC17xx.h
  • LPC_UART3_BASE : LPC17xx.h
  • LPC_USB : LPC17xx.h
  • LPC_USB_BASE : LPC17xx.h
  • LPC_WDT : LPC17xx.h
  • LPC_WDT_BASE : LPC17xx.h
  • LPF_instance : arm_signal_converge_example_f32.c
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
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  • Enumerations
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  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- m -

  • MADCTR : drv_glcd.h
  • MADCTR_Data_t : drv_glcd.h
  • Magenta : GLCD.h
  • main() : adc_burst_test.c , adc_polling_test.c , privilege.c , i2c_monitor.c , spi_sdcard.c , spi_slave.c , pca8581_test.c , ssp_dma.c , ssp_master.c , dac_dma.c , i2c_interrupt_test.c , microwire_test.c , sc16is750_int.c , i2c_polling_test.c , sc16is750_polling.c , ssp_slave.c , can_ledcontrol.c , dac_sinewave_test.c , slave.c , ti_test.c , 10ms_base.c , i2s_dma_test.c , systick_stclk.c , timer_capture.c , dac_speaker.c , i2s_irq_test.c , freqmeasure.c , gen_diff_delay.c , i2s_mclk.c , gen_diff_freqs.c , timer_int_match.c , adc_dma_test.c , can_self_test.c , dac_wave_generate.c , i2s_test_4_wire.c , timer_poll_match.c , pwm_signal.c , i2s_two_kit.c , uart_autobaud_test.c , uart_dma_test.c , easyweb.c , i2s_polling.c , uart_hw_flow_control.c , uart_interrupt_test.c , lcdtest.c , uart_irda_receive.c , uart_irda_transmit.c , can_test_aflut.c , emactest.c , lcdtest.c , uart_polling_test.c , rs485_master.c , mcpwm_simple.c , rs485_slave.c , uart_fullmodem_test.c , main.c , nvic_priority.c , usbdmain.c , vcomdemo.c , vt_relocation.c , demo.c , memory.c , adc_hardware_trigger_test.c , can_test_bypass_mode.c , flash_2_ram.c , template.c , wdt_interrupt_test.c , wdt_reset_test.c , pwm_dual_edge.c , arm_class_marks_example_f32.c , arm_convolution_example_f32.c , gpdma_sleep.c , pwm_match_int.c , arm_dotproduct_example_f32.c , arm_fft_bin_example_f32.c , pwm_single_edge.c , arm_fir_example_f32.c , arm_graphic_equalizer_example_q31.c , can_test_two_kit.c , link_list.c , extint_sleep.c , arm_linear_interp_example_f32.c , arm_matrix_example_f32.c , nmi_powerdown.c , arm_signal_converge_example_f32.c , arm_sin_cos_example_f32.c , gpdma_r2r_test.c , rtc_deeppwd.c , arm_variance_example_f32.c , wdt_deepsleep.c , adc_interrupt_test.c , bitband.c , gpio_int.c , qei_test_velo.c , rit_interrupt.c , LedBlinky.c , rtc_alarm_cntincr_int.c , rtc_calib.c , mpu_test.c , master.c , spi_loopback_test.c , spi_master.c , i2c_master_slave_int_test.c , spi_interrupt_test.c , spi_polling_test.c
  • Maroon : GLCD.h
  • Master_Buf : master.c , i2c_master_slave_int_test.c
  • Master_Rx_Buf : microwire_test.c , ti_test.c
  • master_test : master.c , i2c_master_slave_int_test.c
  • Master_Tx_Buf : ti_test.c
  • match_cnt : pwm_match_int.c
  • MatchCount : timer_capture.c
  • MAX : lpc_types.h
  • MAX_BLOCKSIZE : arm_convolution_example_f32.c , arm_dotproduct_example_f32.c , arm_sin_cos_example_f32.c , arm_variance_example_f32.c
  • MAX_CAP_TIMES : qei_test_velo.c
  • MAX_ENTRY : can_test_aflut.c
  • MAX_ETH_TX_DATA_SIZE : tcpip.h
  • MAX_GLCD_STR_SIZE : drv_glcd.h
  • MAX_HW_FULLCAN_OBJ : lpc17xx_can.h
  • max_marks : arm_class_marks_example_f32.c
  • MAX_RETRIES : resolv.c
  • MAX_RETRYS : tcpip.h
  • MAX_SW_FULLCAN_OBJ : lpc17xx_can.h
  • MAX_TCP_RX_DATA_SIZE : tcpip.h
  • MAX_TCP_TX_DATA_SIZE : tcpip.h
  • MAX_TIME : uip-neighbor.c
  • MAX_VEL : qei_test_velo.c
  • MCB_LPC17XX_ADC_INJECT_TEST : adc_burst_test.c
  • MCB_LPC_1768 : lpc17xx_emac.h , adc_burst_test.c , adc_dma_test.c , adc_interrupt_test.c , adc_polling_test.c , gpio_int.c , LedBlinky.c , extint_sleep.c , rit_interrupt.c , uart_fullmodem_test.c , wdt_interrupt_test.c
  • MCPWM_ACMode() : lpc17xx_mcpwm.h
  • MCPWM_CAPCLR_CAP : lpc17xx_mcpwm.h
  • MCPWM_CAPCON_CAPMCI_FE : lpc17xx_mcpwm.h
  • MCPWM_CAPCON_CAPMCI_RE : lpc17xx_mcpwm.h
  • MCPWM_CAPCON_HNFCAP : lpc17xx_mcpwm.h
  • MCPWM_CAPCON_RT : lpc17xx_mcpwm.h
  • MCPWM_CHANNEL_CENTER_MODE : lpc17xx_mcpwm.h
  • MCPWM_CHANNEL_EDGE_MODE : lpc17xx_mcpwm.h
  • MCPWM_CHANNEL_PASSIVE_HI : lpc17xx_mcpwm.h
  • MCPWM_CHANNEL_PASSIVE_LO : lpc17xx_mcpwm.h
  • MCPWM_ClearCapture() : lpc17xx_mcpwm.h
  • MCPWM_CNTCON_CNTR : lpc17xx_mcpwm.h
  • MCPWM_CNTCON_TCMCI_FE : lpc17xx_mcpwm.h
  • MCPWM_CNTCON_TCMCI_RE : lpc17xx_mcpwm.h
  • MCPWM_CON_ACMODE : lpc17xx_mcpwm.h
  • MCPWM_CON_CENTER : lpc17xx_mcpwm.h
  • MCPWM_CON_DCMODE : lpc17xx_mcpwm.h
  • MCPWM_CON_DISUP : lpc17xx_mcpwm.h
  • MCPWM_CON_DTE : lpc17xx_mcpwm.h
  • MCPWM_CON_INVBDC : lpc17xx_mcpwm.h
  • MCPWM_CON_POLAR : lpc17xx_mcpwm.h
  • MCPWM_CON_RUN : lpc17xx_mcpwm.h
  • MCPWM_ConfigCapture() : lpc17xx_mcpwm.h
  • MCPWM_ConfigChannel() : lpc17xx_mcpwm.h
  • MCPWM_CountConfig() : lpc17xx_mcpwm.h
  • MCPWM_CP_A0 : lpc17xx_mcpwm.h
  • MCPWM_CP_A1 : lpc17xx_mcpwm.h
  • MCPWM_CP_A2 : lpc17xx_mcpwm.h
  • MCPWM_CP_B0 : lpc17xx_mcpwm.h
  • MCPWM_CP_B1 : lpc17xx_mcpwm.h
  • MCPWM_CP_B2 : lpc17xx_mcpwm.h
  • MCPWM_DCMode() : lpc17xx_mcpwm.h
  • MCPWM_DT : lpc17xx_mcpwm.h
  • MCPWM_GetCapture() : lpc17xx_mcpwm.h
  • MCPWM_GetIntStatus() : lpc17xx_mcpwm.h
  • MCPWM_Init() : lpc17xx_mcpwm.h
  • MCPWM_INT_ABORT : lpc17xx_mcpwm.h
  • MCPWM_INT_ICAP : lpc17xx_mcpwm.h
  • MCPWM_INT_ILIM : lpc17xx_mcpwm.h
  • MCPWM_INT_IMAT : lpc17xx_mcpwm.h
  • MCPWM_IntClear() : lpc17xx_mcpwm.h
  • MCPWM_IntConfig() : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_ABORT : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_CAP0 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_CAP1 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_CAP2 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_LIM0 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_LIM1 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_LIM2 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_MAT0 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_MAT1 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_MAT2 : lpc17xx_mcpwm.h
  • MCPWM_IntSet() : lpc17xx_mcpwm.h
  • MCPWM_IRQHandler() : mcpwm_simple.c
  • MCPWM_IRQn : LPC17xx.h
  • MCPWM_PATENT_A0 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_A1 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_A2 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_B0 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_B1 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_B2 : lpc17xx_mcpwm.h
  • MCPWM_Start() : lpc17xx_mcpwm.h
  • MCPWM_Stop() : lpc17xx_mcpwm.h
  • MCPWM_WriteToShadow() : lpc17xx_mcpwm.h
  • mean : arm_class_marks_example_f32.c
  • MEMB() : telnetd.c
  • MemManage_Handler() : mpu_test.c
  • MemOK : mscuser.c
  • Memory : memory.c , mscuser.c
  • MemoryManagement_IRQn : LPC17xx.h
  • menu : i2s_irq_test.c , rtc_deeppwd.c , i2s_polling.c , can_ledcontrol.c , can_self_test.c , can_test_aflut.c , can_test_bypass_mode.c , can_test_two_kit.c , bitband.c , mpu_test.c , privilege.c , flash_2_ram.c , link_list.c , i2s_dma_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_two_kit.c , vt_relocation.c , extint_sleep.c , nmi_powerdown.c , wdt_deepsleep.c , rit_interrupt.c , rtc_calib.c , pwm_signal.c
  • menu1 : i2c_interrupt_test.c , i2c_polling_test.c , slave.c , rtc_alarm_cntincr_int.c , spi_loopback_test.c , spi_master.c , spi_interrupt_test.c , spi_sdcard.c , spi_slave.c , ssp_dma.c , microwire_test.c , sc16is750_int.c , sc16is750_polling.c , ti_test.c , timer_capture.c , freqmeasure.c , gen_diff_delay.c , gen_diff_freqs.c , timer_int_match.c , timer_poll_match.c , uart_dma_test.c , uart_hw_flow_control.c , uart_interrupt_test.c , uart_irda_transmit.c , uart_polling_test.c , rs485_master.c , uart_fullmodem_test.c , wdt_interrupt_test.c , wdt_reset_test.c , rs485_slave.c , uart_irda_receive.c , uart_autobaud_test.c , ssp_slave.c , ssp_master.c , spi_polling_test.c , pca8581_test.c , gpdma_r2r_test.c , adc_interrupt_test.c , adc_burst_test.c , adc_dma_test.c , adc_hardware_trigger_test.c , adc_polling_test.c , dac_wave_generate.c , gpdma_sleep.c , master.c , i2c_master_slave_int_test.c , i2c_monitor.c
  • menu2 : sc16is750_polling.c , uart_fullmodem_test.c , spi_loopback_test.c , uart_irda_receive.c , ti_test.c , privilege.c , spi_slave.c , spi_master.c , i2c_polling_test.c , flash_2_ram.c , gpdma_sleep.c , link_list.c , spi_interrupt_test.c , pca8581_test.c , i2c_interrupt_test.c , spi_polling_test.c , ssp_dma.c , ssp_master.c , sc16is750_int.c , ssp_slave.c , uart_interrupt_test.c , uart_irda_transmit.c , rs485_master.c , uart_autobaud_test.c , uart_hw_flow_control.c , uart_polling_test.c , gpdma_r2r_test.c
  • menu3 : uart_hw_flow_control.c , uart_interrupt_test.c , uart_irda_receive.c , uart_polling_test.c , uart_autobaud_test.c , uart_dma_test.c , uart_irda_transmit.c , uart_fullmodem_test.c
  • menu4 : uart_irda_transmit.c
  • menu5 : uart_irda_transmit.c
  • MicroWire_RD_CMD : microwire_test.c
  • MicroWire_WR_CMD : microwire_test.c
  • MIN : lpc_types.h
  • min_marks : arm_class_marks_example_f32.c
  • MPU_FULL_ACCESS : mpu_test.c
  • MPU_NO_ACCESS : mpu_test.c
  • MPU_PRIVILEGED_ACESS_USER_NO_ACCESS : mpu_test.c
  • MPU_PRIVILEGED_READ_ONLY_USER_NO_ACCESS : mpu_test.c
  • MPU_PRIVILEGED_RW_USER_READ_ONLY : mpu_test.c
  • MPU_RASR_ACCESS_PERMISSION : mpu_test.c
  • MPU_RASR_REGION_SIZE : mpu_test.c
  • MPU_READ_ONLY : mpu_test.c
  • MPU_REGION_ENABLE : mpu_test.c
  • MPU_REGION_SIZE_128B : mpu_test.c
  • MPU_REGION_SIZE_128KB : mpu_test.c
  • MPU_REGION_SIZE_128MB : mpu_test.c
  • MPU_REGION_SIZE_16KB : mpu_test.c
  • MPU_REGION_SIZE_16MB : mpu_test.c
  • MPU_REGION_SIZE_1GB : mpu_test.c
  • MPU_REGION_SIZE_1KB : mpu_test.c
  • MPU_REGION_SIZE_1MB : mpu_test.c
  • MPU_REGION_SIZE_256B : mpu_test.c
  • MPU_REGION_SIZE_256KB : mpu_test.c
  • MPU_REGION_SIZE_256MB : mpu_test.c
  • MPU_REGION_SIZE_2GB : mpu_test.c
  • MPU_REGION_SIZE_2KB : mpu_test.c
  • MPU_REGION_SIZE_2MB : mpu_test.c
  • MPU_REGION_SIZE_32B : mpu_test.c
  • MPU_REGION_SIZE_32KB : mpu_test.c
  • MPU_REGION_SIZE_32MB : mpu_test.c
  • MPU_REGION_SIZE_4GB : mpu_test.c
  • MPU_REGION_SIZE_4KB : mpu_test.c
  • MPU_REGION_SIZE_4MB : mpu_test.c
  • MPU_REGION_SIZE_512B : mpu_test.c
  • MPU_REGION_SIZE_512KB : mpu_test.c
  • MPU_REGION_SIZE_512MB : mpu_test.c
  • MPU_REGION_SIZE_64B : mpu_test.c
  • MPU_REGION_SIZE_64KB : mpu_test.c
  • MPU_REGION_SIZE_64MB : mpu_test.c
  • MPU_REGION_SIZE_8KB : mpu_test.c
  • MPU_REGION_SIZE_8MB : mpu_test.c
  • MPU_UNPREDICTABLE : mpu_test.c
  • MSC_BlockCount : mscuser.h
  • MSC_BlockSize : mscuser.h
  • MSC_BS_CBW : msc.h
  • MSC_BS_CSW : msc.h
  • MSC_BS_DATA_IN : msc.h
  • MSC_BS_DATA_IN_LAST : msc.h
  • MSC_BS_DATA_IN_LAST_STALL : msc.h
  • MSC_BS_DATA_OUT : msc.h
  • MSC_BS_ERROR : msc.h
  • MSC_BulkIn() : mscuser.h , mscuser.c
  • MSC_BulkOut() : mscuser.c , mscuser.h
  • MSC_CBW : msc.h
  • MSC_CBW_Signature : msc.h
  • MSC_CSW : msc.h
  • MSC_CSW_Signature : msc.h
  • MSC_EP_IN : mscuser.h
  • MSC_EP_OUT : mscuser.h
  • MSC_GetCBW() : mscuser.c , mscuser.h
  • MSC_GetMaxLUN() : mscuser.c , mscuser.h
  • MSC_ImageSize : memory.h
  • MSC_Inquiry() : mscuser.c
  • MSC_MAX_PACKET : mscuser.h
  • MSC_MemoryRead() : mscuser.c
  • MSC_MemorySize : mscuser.h
  • MSC_MemoryVerify() : mscuser.c
  • MSC_MemoryWrite() : mscuser.c
  • MSC_ModeSense10() : mscuser.c
  • MSC_ModeSense6() : mscuser.c
  • MSC_PROTOCOL_BULK_ONLY : msc.h
  • MSC_PROTOCOL_CBI_INT : msc.h
  • MSC_PROTOCOL_CBI_NOINT : msc.h
  • MSC_ReadCapacity() : mscuser.c
  • MSC_ReadFormatCapacity() : mscuser.c
  • MSC_REQUEST_GET_MAX_LUN : msc.h
  • MSC_REQUEST_RESET : msc.h
  • MSC_RequestSense() : mscuser.c
  • MSC_Reset() : mscuser.c , mscuser.h
  • MSC_RWSetup() : mscuser.c
  • MSC_SetCSW() : mscuser.h , mscuser.c
  • MSC_SUBCLASS_QIC157 : msc.h
  • MSC_SUBCLASS_RBC : msc.h
  • MSC_SUBCLASS_SCSI : msc.h
  • MSC_SUBCLASS_SFF8020I_MMC2 : msc.h
  • MSC_SUBCLASS_SFF8070I : msc.h
  • MSC_SUBCLASS_UFI : msc.h
  • MSC_TestUnitReady() : mscuser.c
  • MSG_DISABLE : lpc17xx_can.h
  • MSG_ENABLE : lpc17xx_can.h
  • MU : arm_signal_converge_example_f32.c
  • multOutput : arm_dotproduct_example_f32.c
  • Mute : usbdmain.c , usbaudio.h
  • MyIP : tcpip.h
  • MYIP_1 : tcpip.h
  • MYIP_2 : tcpip.h
  • MYIP_3 : tcpip.h
  • MYIP_4 : tcpip.h
  • MyMAC : tcpip.h , tcpip.c
  • MYMAC_1 : EMAC.h , emactest.c
  • MYMAC_2 : EMAC.h , emactest.c
  • MYMAC_3 : emactest.c , EMAC.h
  • MYMAC_4 : EMAC.h , emactest.c
  • MYMAC_5 : emactest.c , EMAC.h
  • MYMAC_6 : emactest.c , EMAC.h
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- n -

  • Navy : GLCD.h
  • NDD_REQ_INT : usbreg.h
  • NELEMENTS : lpc_types.h
  • nextline : rs485_slave.c , rs485_master.c
  • NMI_Handler() : nmi_powerdown.c
  • NONE_BLOCKING : lpc_types.h
  • NonMaskableInt_IRQn : LPC17xx.h
  • NOP : drv_glcd.h
  • NotificationBuf : cdcuser.c
  • ntohs : uip.h
  • NULL : resolv.c , httpd-fs.c , lpc_types.h
  • NUM_SAMPLE : dac_wave_generate.c
  • NUM_SAMPLE_SINE : dac_wave_generate.c
  • NUM_SINE_SAMPLE : dac_sinewave_test.c
  • NUM_TAPS : arm_fir_example_f32.c
  • NUMBLOCKS : arm_graphic_equalizer_example_q31.c
  • numBlocks : arm_fir_example_f32.c
  • NUMFRAMES : arm_signal_converge_example_f32.c
  • NUMSTAGES : arm_graphic_equalizer_example_q31.c
  • NUMSTUDENTS : arm_class_marks_example_f32.c
  • numStudents : arm_class_marks_example_f32.c
  • NUMSUBJECTS : arm_class_marks_example_f32.c
  • numSubjects : arm_class_marks_example_f32.c
  • NUMTAPS : arm_signal_converge_example_f32.c
  • NVIC : core_cm3.h
  • NVIC_BASE : core_cm3.h
  • NVIC_DeInit() : lpc17xx_nvic.h
  • NVIC_SCBDeInit() : lpc17xx_nvic.h
  • NVIC_SetVTOR() : lpc17xx_nvic.h
  • NVIC_STIR_INTID_Msk : core_cm3.h
  • NVIC_STIR_INTID_Pos : core_cm3.h
  • NVIC_VTOR_MASK : lpc17xx_nvic.c
  • NXP_Logo : NXP_logo.c , NXP_logo.h
  • NXP_LogoStream : NXP_logo.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- o -

  • Offset : mscuser.c
  • Olive : GLCD.h
  • OP_ARP_ANSWER : tcpip.h
  • OP_ARP_REQUEST : tcpip.h
  • opt : uip.c
  • OSC_CLK : system_LPC17xx.c
  • OSCOFF : drv_glcd.h
  • OSCON : drv_glcd.h
  • outLen : arm_convolution_example_f32.c
  • outputQ31 : arm_graphic_equalizer_example_q31.c
  • OutReport : demo.h , demo.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- a -

  • A_f32 : arm_matrix_example_f32.c
  • AC_MODE_TEST : mcpwm_simple.c
  • ack_msg : rs485_slave.c
  • ACMD13_SD_STATUS : spi_sdcard.c
  • ACMD22_SEND_NUM_WR_BLOCKS : spi_sdcard.c
  • ACMD23_SET_WR_BLK_ERASE_COUNT : spi_sdcard.c
  • ACMD41_SEND_OP_COND : spi_sdcard.c
  • ACMD42_SET_CLR_CARD_DETECT : spi_sdcard.c
  • ACMD51_SEND_SCR : spi_sdcard.c
  • ACTIVE : lpc17xx_uart.h
  • ADC_ADCOFFS : lpc17xx_adc.h
  • ADC_ADGINTEN : lpc17xx_adc.h
  • ADC_ADINTEN0 : lpc17xx_adc.h
  • ADC_ADINTEN1 : lpc17xx_adc.h
  • ADC_ADINTEN2 : lpc17xx_adc.h
  • ADC_ADINTEN3 : lpc17xx_adc.h
  • ADC_ADINTEN4 : lpc17xx_adc.h
  • ADC_ADINTEN5 : lpc17xx_adc.h
  • ADC_ADINTEN6 : lpc17xx_adc.h
  • ADC_ADINTEN7 : lpc17xx_adc.h
  • ADC_BurstCmd() : lpc17xx_adc.h
  • ADC_CHANNEL_0 : lpc17xx_adc.h
  • ADC_CHANNEL_1 : lpc17xx_adc.h
  • ADC_CHANNEL_2 : lpc17xx_adc.h
  • ADC_CHANNEL_3 : lpc17xx_adc.h
  • ADC_CHANNEL_4 : lpc17xx_adc.h
  • ADC_CHANNEL_5 : lpc17xx_adc.h
  • ADC_CHANNEL_6 : lpc17xx_adc.h
  • ADC_CHANNEL_7 : lpc17xx_adc.h
  • ADC_CHANNEL_SELECTION : lpc17xx_adc.h
  • ADC_ChannelCmd() : lpc17xx_adc.h
  • ADC_ChannelGetData() : lpc17xx_adc.h
  • ADC_ChannelGetStatus() : lpc17xx_adc.h
  • ADC_CR_BURST : lpc17xx_adc.h
  • ADC_CR_CH_SEL : lpc17xx_adc.h
  • ADC_CR_CLKDIV : lpc17xx_adc.h
  • ADC_CR_EDGE : lpc17xx_adc.h
  • ADC_CR_PDN : lpc17xx_adc.h
  • ADC_CR_START_CAP01 : lpc17xx_adc.h
  • ADC_CR_START_EINT0 : lpc17xx_adc.h
  • ADC_CR_START_MASK : lpc17xx_adc.h
  • ADC_CR_START_MAT01 : lpc17xx_adc.h
  • ADC_CR_START_MAT03 : lpc17xx_adc.h
  • ADC_CR_START_MAT10 : lpc17xx_adc.h
  • ADC_CR_START_MAT11 : lpc17xx_adc.h
  • ADC_CR_START_MODE_SEL : lpc17xx_adc.h
  • ADC_CR_START_NOW : lpc17xx_adc.h
  • ADC_DATA_BURST : lpc17xx_adc.h
  • ADC_DATA_DONE : lpc17xx_adc.h
  • ADC_DATA_STATUS : lpc17xx_adc.h
  • ADC_DeInit() : lpc17xx_adc.h
  • ADC_DR_DONE_FLAG : lpc17xx_adc.h
  • ADC_DR_OVERRUN_FLAG : lpc17xx_adc.h
  • ADC_DR_RESULT : lpc17xx_adc.h
  • ADC_EdgeStartConfig() : lpc17xx_adc.h
  • ADC_EP_GetRequest() : adcuser.c , adcuser.h
  • ADC_EP_SetRequest() : adcuser.c , adcuser.h
  • ADC_GDR_CH : lpc17xx_adc.h
  • ADC_GDR_CH_MASK : lpc17xx_adc.h
  • ADC_GDR_DONE_FLAG : lpc17xx_adc.h
  • ADC_GDR_OVERRUN_FLAG : lpc17xx_adc.h
  • ADC_GDR_RESULT : lpc17xx_adc.h
  • ADC_getCnv() : ADC.c , ADC.h
  • ADC_GetData() : lpc17xx_adc.c
  • ADC_GlobalGetData() : lpc17xx_adc.h
  • ADC_GlobalGetStatus() : lpc17xx_adc.h
  • ADC_IF_GetRequest() : adcuser.c , adcuser.h
  • ADC_IF_SetRequest() : adcuser.c , adcuser.h
  • ADC_Init() : lpc17xx_adc.h
  • ADC_init() : ADC.c , ADC.h
  • ADC_IntConfig() : lpc17xx_adc.h
  • ADC_INTEN_CH : lpc17xx_adc.h
  • ADC_INTEN_GLOBAL : lpc17xx_adc.h
  • ADC_IRQHandler() : adc_hardware_trigger_test.c , adc_interrupt_test.c
  • ADC_IRQn : LPC17xx.h
  • ADC_PowerdownCmd() : lpc17xx_adc.h
  • ADC_START_CONTINUOUS : lpc17xx_adc.h
  • ADC_START_NOW : lpc17xx_adc.h
  • ADC_START_ON_CAP01 : lpc17xx_adc.h
  • ADC_START_ON_EDGE_OPT : lpc17xx_adc.h
  • ADC_START_ON_EINT0 : lpc17xx_adc.h
  • ADC_START_ON_FALLING : lpc17xx_adc.h
  • ADC_START_ON_MAT01 : lpc17xx_adc.h
  • ADC_START_ON_MAT03 : lpc17xx_adc.h
  • ADC_START_ON_MAT10 : lpc17xx_adc.h
  • ADC_START_ON_MAT11 : lpc17xx_adc.h
  • ADC_START_ON_RISING : lpc17xx_adc.h
  • ADC_START_OPT : lpc17xx_adc.h
  • ADC_StartCmd() : lpc17xx_adc.h
  • ADC_startCnv() : ADC.c , ADC.h
  • ADC_STAT_CH_DONE_FLAG : lpc17xx_adc.h
  • ADC_STAT_CH_OVERRUN_FLAG : lpc17xx_adc.h
  • ADC_STAT_INT_FLAG : lpc17xx_adc.h
  • ADC_stopCnv() : ADC.c , ADC.h
  • ADC_TRIM : lpc17xx_adc.h
  • ADC_TYPE_INT_OPT : lpc17xx_adc.h
  • adc_value : adc_hardware_trigger_test.c , adc_interrupt_test.c
  • ADC_VALUE_MAX : ADC.h
  • addr_acc : rs485_slave.c
  • addr_auto : rs485_slave.c
  • addr_menu : rs485_slave.c
  • addr_una : rs485_slave.c
  • AFLUT_ENTRY_Type : lpc17xx_can.h
  • AFRxMsg : can_test_aflut.c , can_test_two_kit.c
  • AFTable : can_test_aflut.c
  • AFTxMsg : can_test_aflut.c , can_test_two_kit.c
  • Ak : arm_convolution_example_f32.c
  • AP_CLK : usbreg.h
  • APOFF : drv_glcd.h
  • APON : drv_glcd.h
  • arm_abs_f32() : arm_math.h , arm_abs_f32.c
  • arm_abs_q15() : arm_math.h , arm_abs_q15.c
  • arm_abs_q31() : arm_math.h , arm_abs_q31.c
  • arm_abs_q7() : arm_math.h , arm_abs_q7.c
  • arm_add_f32() : arm_math.h , arm_add_f32.c
  • arm_add_q15() : arm_math.h , arm_add_q15.c
  • arm_add_q31() : arm_math.h , arm_add_q31.c
  • arm_add_q7() : arm_math.h , arm_add_q7.c
  • arm_apply_guard_bits() : math_helper.h , math_helper.c
  • arm_biquad_cas_df1_32x64_init_q31() : arm_math.h , arm_biquad_cascade_df1_32x64_init_q31.c
  • arm_biquad_cas_df1_32x64_q31() : arm_math.h , arm_biquad_cascade_df1_32x64_q31.c
  • arm_biquad_cascade_df1_f32() : arm_math.h , arm_biquad_cascade_df1_f32.c
  • arm_biquad_cascade_df1_fast_q15() : arm_math.h , arm_biquad_cascade_df1_fast_q15.c
  • arm_biquad_cascade_df1_fast_q31() : arm_math.h , arm_biquad_cascade_df1_fast_q31.c
  • arm_biquad_cascade_df1_init_f32() : arm_math.h , arm_biquad_cascade_df1_init_f32.c
  • arm_biquad_cascade_df1_init_q15() : arm_math.h , arm_biquad_cascade_df1_init_q15.c
  • arm_biquad_cascade_df1_init_q31() : arm_math.h , arm_biquad_cascade_df1_init_q31.c
  • arm_biquad_cascade_df1_q15() : arm_math.h , arm_biquad_cascade_df1_q15.c
  • arm_biquad_cascade_df1_q31() : arm_math.h , arm_biquad_cascade_df1_q31.c
  • arm_biquad_cascade_df2T_f32() : arm_math.h , arm_biquad_cascade_df2T_f32.c
  • arm_biquad_cascade_df2T_init_f32() : arm_math.h , arm_biquad_cascade_df2T_init_f32.c
  • arm_bitreversal_f32() : arm_math.h , arm_cfft_radix4_f32.c
  • arm_bitreversal_q15() : arm_math.h , arm_cfft_radix4_q15.c
  • arm_bitreversal_q31() : arm_math.h , arm_cfft_radix4_q31.c
  • arm_calc_2pow() : math_helper.h , math_helper.c
  • arm_calc_guard_bits() : math_helper.h , math_helper.c
  • arm_cfft_radix4_f32() : arm_math.h , arm_cfft_radix4_f32.c
  • arm_cfft_radix4_init_f32() : arm_math.h , arm_cfft_radix4_init_f32.c
  • arm_cfft_radix4_init_q15() : arm_math.h , arm_cfft_radix4_init_q15.c
  • arm_cfft_radix4_init_q31() : arm_math.h , arm_cfft_radix4_init_q31.c
  • arm_cfft_radix4_q15() : arm_math.h , arm_cfft_radix4_q15.c
  • arm_cfft_radix4_q31() : arm_math.h , arm_cfft_radix4_q31.c
  • arm_clip_f32() : math_helper.h , math_helper.c
  • arm_cmplx_conj_f32() : arm_math.h , arm_cmplx_conj_f32.c
  • arm_cmplx_conj_q15() : arm_math.h , arm_cmplx_conj_q15.c
  • arm_cmplx_conj_q31() : arm_math.h , arm_cmplx_conj_q31.c
  • arm_cmplx_dot_prod_f32() : arm_math.h , arm_cmplx_dot_prod_f32.c
  • arm_cmplx_dot_prod_q15() : arm_math.h , arm_cmplx_dot_prod_q15.c
  • arm_cmplx_dot_prod_q31() : arm_math.h , arm_cmplx_dot_prod_q31.c
  • arm_cmplx_mag_f32() : arm_math.h , arm_cmplx_mag_f32.c
  • arm_cmplx_mag_q15() : arm_math.h , arm_cmplx_mag_q15.c
  • arm_cmplx_mag_q31() : arm_math.h , arm_cmplx_mag_q31.c
  • arm_cmplx_mag_squared_f32() : arm_math.h , arm_cmplx_mag_squared_f32.c
  • arm_cmplx_mag_squared_q15() : arm_math.h , arm_cmplx_mag_squared_q15.c
  • arm_cmplx_mag_squared_q31() : arm_math.h , arm_cmplx_mag_squared_q31.c
  • arm_cmplx_mult_cmplx_f32() : arm_math.h , arm_cmplx_mult_cmplx_f32.c
  • arm_cmplx_mult_cmplx_q15() : arm_math.h , arm_cmplx_mult_cmplx_q15.c
  • arm_cmplx_mult_cmplx_q31() : arm_math.h , arm_cmplx_mult_cmplx_q31.c
  • arm_cmplx_mult_real_f32() : arm_math.h , arm_cmplx_mult_real_f32.c
  • arm_cmplx_mult_real_q15() : arm_math.h , arm_cmplx_mult_real_q15.c
  • arm_cmplx_mult_real_q31() : arm_math.h , arm_cmplx_mult_real_q31.c
  • arm_compare_fixed_q15() : math_helper.h , math_helper.c
  • arm_compare_fixed_q31() : math_helper.h , math_helper.c
  • arm_conv_f32() : arm_math.h , arm_conv_f32.c
  • arm_conv_fast_q15() : arm_math.h , arm_conv_fast_q15.c
  • arm_conv_fast_q31() : arm_math.h , arm_conv_fast_q31.c
  • arm_conv_partial_f32() : arm_math.h , arm_conv_partial_f32.c
  • arm_conv_partial_fast_q15() : arm_math.h , arm_conv_partial_fast_q15.c
  • arm_conv_partial_fast_q31() : arm_math.h , arm_conv_partial_fast_q31.c
  • arm_conv_partial_q15() : arm_math.h , arm_conv_partial_q15.c
  • arm_conv_partial_q31() : arm_math.h , arm_conv_partial_q31.c
  • arm_conv_partial_q7() : arm_math.h , arm_conv_partial_q7.c
  • arm_conv_q15() : arm_math.h , arm_conv_q15.c
  • arm_conv_q31() : arm_math.h , arm_conv_q31.c
  • arm_conv_q7() : arm_math.h , arm_conv_q7.c
  • arm_copy_f32() : arm_math.h , arm_copy_f32.c
  • arm_copy_q15() : arm_math.h , arm_copy_q15.c
  • arm_copy_q31() : arm_math.h , arm_copy_q31.c
  • arm_copy_q7() : arm_math.h , arm_copy_q7.c
  • arm_correlate_f32() : arm_math.h , arm_correlate_f32.c
  • arm_correlate_fast_q15() : arm_math.h , arm_correlate_fast_q15.c
  • arm_correlate_fast_q31() : arm_math.h , arm_correlate_fast_q31.c
  • arm_correlate_q15() : arm_math.h , arm_correlate_q15.c
  • arm_correlate_q31() : arm_math.h , arm_correlate_q31.c
  • arm_correlate_q7() : arm_math.h , arm_correlate_q7.c
  • arm_cos_f32() : arm_math.h , arm_cos_f32.c
  • arm_cos_q15() : arm_math.h , arm_cos_q15.c
  • arm_cos_q31() : arm_math.h , arm_cos_q31.c
  • arm_dct4_f32() : arm_math.h , arm_dct4_f32.c
  • arm_dct4_init_f32() : arm_math.h , arm_dct4_init_f32.c
  • arm_dct4_init_q15() : arm_math.h , arm_dct4_init_q15.c
  • arm_dct4_init_q31() : arm_math.h , arm_dct4_init_q31.c
  • arm_dct4_q15() : arm_math.h , arm_dct4_q15.c
  • arm_dct4_q31() : arm_math.h , arm_dct4_q31.c
  • arm_dot_prod_f32() : arm_math.h , arm_dot_prod_f32.c
  • arm_dot_prod_q15() : arm_math.h , arm_dot_prod_q15.c
  • arm_dot_prod_q31() : arm_math.h , arm_dot_prod_q31.c
  • arm_dot_prod_q7() : arm_math.h , arm_dot_prod_q7.c
  • arm_fill_f32() : arm_math.h , arm_fill_f32.c
  • arm_fill_q15() : arm_math.h , arm_fill_q15.c
  • arm_fill_q31() : arm_math.h , arm_fill_q31.c
  • arm_fill_q7() : arm_math.h , arm_fill_q7.c
  • arm_fir_decimate_f32() : arm_math.h , arm_fir_decimate_f32.c
  • arm_fir_decimate_fast_q15() : arm_math.h , arm_fir_decimate_fast_q15.c
  • arm_fir_decimate_fast_q31() : arm_math.h , arm_fir_decimate_fast_q31.c
  • arm_fir_decimate_init_f32() : arm_math.h , arm_fir_decimate_init_f32.c
  • arm_fir_decimate_init_q15() : arm_math.h , arm_fir_decimate_init_q15.c
  • arm_fir_decimate_init_q31() : arm_math.h , arm_fir_decimate_init_q31.c
  • arm_fir_decimate_q15() : arm_math.h , arm_fir_decimate_q15.c
  • arm_fir_decimate_q31() : arm_math.h , arm_fir_decimate_q31.c
  • arm_fir_f32() : arm_math.h , arm_fir_f32.c
  • arm_fir_fast_q15() : arm_math.h , arm_fir_fast_q15.c
  • arm_fir_fast_q31() : arm_math.h , arm_fir_fast_q31.c
  • arm_fir_init_f32() : arm_math.h , arm_fir_init_f32.c
  • arm_fir_init_q15() : arm_math.h , arm_fir_init_q15.c
  • arm_fir_init_q31() : arm_math.h , arm_fir_init_q31.c
  • arm_fir_init_q7() : arm_math.h , arm_fir_init_q7.c
  • arm_fir_interpolate_f32() : arm_math.h , arm_fir_interpolate_f32.c
  • arm_fir_interpolate_init_f32() : arm_math.h , arm_fir_interpolate_init_f32.c
  • arm_fir_interpolate_init_q15() : arm_math.h , arm_fir_interpolate_init_q15.c
  • arm_fir_interpolate_init_q31() : arm_math.h , arm_fir_interpolate_init_q31.c
  • arm_fir_interpolate_q15() : arm_math.h , arm_fir_interpolate_q15.c
  • arm_fir_interpolate_q31() : arm_math.h , arm_fir_interpolate_q31.c
  • arm_fir_lattice_f32() : arm_math.h , arm_fir_lattice_f32.c
  • arm_fir_lattice_init_f32() : arm_math.h , arm_fir_lattice_init_f32.c
  • arm_fir_lattice_init_q15() : arm_math.h , arm_fir_lattice_init_q15.c
  • arm_fir_lattice_init_q31() : arm_math.h , arm_fir_lattice_init_q31.c
  • arm_fir_lattice_q15() : arm_math.h , arm_fir_lattice_q15.c
  • arm_fir_lattice_q31() : arm_math.h , arm_fir_lattice_q31.c
  • arm_fir_q15() : arm_math.h , arm_fir_q15.c
  • arm_fir_q31() : arm_math.h , arm_fir_q31.c
  • arm_fir_q7() : arm_math.h , arm_fir_q7.c
  • arm_fir_sparse_f32() : arm_math.h , arm_fir_sparse_f32.c
  • arm_fir_sparse_init_f32() : arm_math.h , arm_fir_sparse_init_f32.c
  • arm_fir_sparse_init_q15() : arm_math.h , arm_fir_sparse_init_q15.c
  • arm_fir_sparse_init_q31() : arm_math.h , arm_fir_sparse_init_q31.c
  • arm_fir_sparse_init_q7() : arm_math.h , arm_fir_sparse_init_q7.c
  • arm_fir_sparse_q15() : arm_math.h , arm_fir_sparse_q15.c
  • arm_fir_sparse_q31() : arm_math.h , arm_fir_sparse_q31.c
  • arm_fir_sparse_q7() : arm_math.h , arm_fir_sparse_q7.c
  • arm_float_to_q12_20() : math_helper.h , math_helper.c
  • arm_float_to_q14() : math_helper.h , math_helper.c
  • arm_float_to_q15() : arm_math.h , arm_float_to_q15.c
  • arm_float_to_q28() : math_helper.h , math_helper.c
  • arm_float_to_q29() : math_helper.h , math_helper.c
  • arm_float_to_q30() : math_helper.h , math_helper.c
  • arm_float_to_q31() : arm_math.h , arm_float_to_q31.c
  • arm_float_to_q7() : arm_math.h , arm_float_to_q7.c
  • arm_iir_lattice_f32() : arm_math.h , arm_iir_lattice_f32.c
  • arm_iir_lattice_init_f32() : arm_math.h , arm_iir_lattice_init_f32.c
  • arm_iir_lattice_init_q15() : arm_math.h , arm_iir_lattice_init_q15.c
  • arm_iir_lattice_init_q31() : arm_math.h , arm_iir_lattice_init_q31.c
  • arm_iir_lattice_q15() : arm_math.h , arm_iir_lattice_q15.c
  • arm_iir_lattice_q31() : arm_math.h , arm_iir_lattice_q31.c
  • arm_linear_interep_table : arm_linear_interp_data.c , arm_linear_interp_example_f32.c
  • arm_lms_f32() : arm_math.h , arm_lms_f32.c
  • arm_lms_init_f32() : arm_math.h , arm_lms_init_f32.c
  • arm_lms_init_q15() : arm_math.h , arm_lms_init_q15.c
  • arm_lms_init_q31() : arm_math.h , arm_lms_init_q31.c
  • arm_lms_norm_f32() : arm_math.h , arm_lms_norm_f32.c
  • arm_lms_norm_init_f32() : arm_math.h , arm_lms_norm_init_f32.c
  • arm_lms_norm_init_q15() : arm_math.h , arm_lms_norm_init_q15.c
  • arm_lms_norm_init_q31() : arm_math.h , arm_lms_norm_init_q31.c
  • arm_lms_norm_q15() : arm_math.h , arm_lms_norm_q15.c
  • arm_lms_norm_q31() : arm_math.h , arm_lms_norm_q31.c
  • arm_lms_q15() : arm_math.h , arm_lms_q15.c
  • arm_lms_q31() : arm_math.h , arm_lms_q31.c
  • arm_mat_add_f32() : arm_math.h , arm_mat_add_f32.c
  • arm_mat_add_q15() : arm_math.h , arm_mat_add_q15.c
  • arm_mat_add_q31() : arm_math.h , arm_mat_add_q31.c
  • arm_mat_init_f32() : arm_math.h , arm_mat_init_f32.c
  • arm_mat_init_q15() : arm_math.h , arm_mat_init_q15.c
  • arm_mat_init_q31() : arm_math.h , arm_mat_init_q31.c
  • arm_mat_inverse_f32() : arm_math.h , arm_mat_inverse_f32.c
  • arm_mat_mult_f32() : arm_math.h , arm_mat_mult_f32.c
  • arm_mat_mult_fast_q15() : arm_math.h , arm_mat_mult_fast_q15.c
  • arm_mat_mult_fast_q31() : arm_math.h , arm_mat_mult_fast_q31.c
  • arm_mat_mult_q15() : arm_math.h , arm_mat_mult_q15.c
  • arm_mat_mult_q31() : arm_mat_mult_q31.c , arm_math.h
  • arm_mat_scale_f32() : arm_math.h , arm_mat_scale_f32.c
  • arm_mat_scale_q15() : arm_math.h , arm_mat_scale_q15.c
  • arm_mat_scale_q31() : arm_math.h , arm_mat_scale_q31.c
  • arm_mat_sub_f32() : arm_mat_sub_f32.c , arm_math.h
  • arm_mat_sub_q15() : arm_math.h , arm_mat_sub_q15.c
  • arm_mat_sub_q31() : arm_mat_sub_q31.c , arm_math.h
  • arm_mat_trans_f32() : arm_math.h , arm_mat_trans_f32.c
  • arm_mat_trans_q15() : arm_mat_trans_q15.c , arm_math.h
  • arm_mat_trans_q31() : arm_math.h , arm_mat_trans_q31.c
  • ARM_MATH_ARGUMENT_ERROR : arm_math.h
  • ARM_MATH_LENGTH_ERROR : arm_math.h
  • ARM_MATH_NANINF : arm_math.h
  • ARM_MATH_SINGULAR : arm_math.h
  • ARM_MATH_SIZE_MISMATCH : arm_math.h
  • ARM_MATH_SUCCESS : arm_math.h
  • ARM_MATH_TEST_FAILURE : arm_math.h
  • arm_max_f32() : arm_math.h , arm_max_f32.c
  • arm_max_q15() : arm_math.h , arm_max_q15.c
  • arm_max_q31() : arm_math.h , arm_max_q31.c
  • arm_max_q7() : arm_math.h , arm_max_q7.c
  • arm_mean_f32() : arm_math.h , arm_mean_f32.c
  • arm_mean_q15() : arm_math.h , arm_mean_q15.c
  • arm_mean_q31() : arm_math.h , arm_mean_q31.c
  • arm_mean_q7() : arm_math.h , arm_mean_q7.c
  • arm_min_f32() : arm_math.h , arm_min_f32.c
  • arm_min_q15() : arm_math.h , arm_min_q15.c
  • arm_min_q31() : arm_math.h , arm_min_q31.c
  • arm_min_q7() : arm_min_q7.c , arm_math.h
  • arm_mult_f32() : arm_math.h , arm_mult_f32.c
  • arm_mult_q15() : arm_math.h , arm_mult_q15.c
  • arm_mult_q31() : arm_math.h , arm_mult_q31.c
  • arm_mult_q7() : arm_math.h , arm_mult_q7.c
  • arm_negate_f32() : arm_math.h , arm_negate_f32.c
  • arm_negate_q15() : arm_negate_q15.c , arm_math.h
  • arm_negate_q31() : arm_math.h , arm_negate_q31.c
  • arm_negate_q7() : arm_negate_q7.c , arm_math.h
  • arm_offset_f32() : arm_math.h , arm_offset_f32.c
  • arm_offset_q15() : arm_math.h , arm_offset_q15.c
  • arm_offset_q31() : arm_math.h , arm_offset_q31.c
  • arm_offset_q7() : arm_offset_q7.c , arm_math.h
  • arm_pid_init_f32() : arm_math.h , arm_pid_init_f32.c
  • arm_pid_init_q15() : arm_pid_init_q15.c , arm_math.h
  • arm_pid_init_q31() : arm_math.h , arm_pid_init_q31.c
  • arm_pid_reset_f32() : arm_pid_reset_f32.c , arm_math.h
  • arm_pid_reset_q15() : arm_math.h , arm_pid_reset_q15.c
  • arm_pid_reset_q31() : arm_math.h , arm_pid_reset_q31.c
  • arm_power_f32() : arm_math.h , arm_power_f32.c
  • arm_power_q15() : arm_power_q15.c , arm_math.h
  • arm_power_q31() : arm_math.h , arm_power_q31.c
  • arm_power_q7() : arm_power_q7.c , arm_math.h
  • arm_provide_guard_bits_q15() : math_helper.h , math_helper.c
  • arm_provide_guard_bits_q31() : math_helper.c , math_helper.h
  • arm_provide_guard_bits_q7() : math_helper.c
  • arm_q15_to_float() : arm_math.h , arm_q15_to_float.c
  • arm_q15_to_q31() : arm_math.h , arm_q15_to_q31.c
  • arm_q15_to_q7() : arm_math.h , arm_q15_to_q7.c
  • arm_q31_to_float() : arm_math.h , arm_q31_to_float.c
  • arm_q31_to_q15() : arm_math.h , arm_q31_to_q15.c
  • arm_q31_to_q7() : arm_math.h , arm_q31_to_q7.c
  • arm_q7_to_float() : arm_math.h , arm_q7_to_float.c
  • arm_q7_to_q15() : arm_math.h , arm_q7_to_q15.c
  • arm_q7_to_q31() : arm_math.h , arm_q7_to_q31.c
  • arm_radix4_butterfly_f32() : arm_math.h , arm_cfft_radix4_f32.c
  • arm_radix4_butterfly_inverse_f32() : arm_math.h , arm_cfft_radix4_f32.c
  • arm_radix4_butterfly_inverse_q15() : arm_math.h , arm_cfft_radix4_q15.c
  • arm_radix4_butterfly_inverse_q31() : arm_math.h , arm_cfft_radix4_q31.c
  • arm_radix4_butterfly_q15() : arm_math.h , arm_cfft_radix4_q15.c
  • arm_radix4_butterfly_q31() : arm_math.h , arm_cfft_radix4_q31.c
  • arm_rfft_f32() : arm_math.h , arm_rfft_f32.c
  • arm_rfft_init_f32() : arm_math.h , arm_rfft_init_f32.c
  • arm_rfft_init_q15() : arm_math.h , arm_rfft_init_q15.c
  • arm_rfft_init_q31() : arm_math.h , arm_rfft_init_q31.c
  • arm_rfft_q15() : arm_math.h , arm_rfft_q15.c
  • arm_rfft_q31() : arm_math.h , arm_rfft_q31.c
  • arm_rms_f32() : arm_math.h , arm_rms_f32.c
  • arm_rms_q15() : arm_math.h , arm_rms_q15.c
  • arm_rms_q31() : arm_math.h , arm_rms_q31.c
  • arm_scale_f32() : arm_scale_f32.c , arm_math.h
  • arm_scale_q15() : arm_scale_q15.c , arm_math.h
  • arm_scale_q31() : arm_scale_q31.c , arm_math.h
  • arm_scale_q7() : arm_scale_q7.c , arm_math.h
  • arm_shift_q15() : arm_shift_q15.c , arm_math.h
  • arm_shift_q31() : arm_math.h , arm_shift_q31.c
  • arm_shift_q7() : arm_math.h , arm_shift_q7.c
  • arm_sin_cos_f32() : arm_math.h , arm_sin_cos_f32.c
  • arm_sin_cos_q31() : arm_sin_cos_q31.c , arm_math.h
  • arm_sin_f32() : arm_sin_f32.c , arm_math.h
  • arm_sin_q15() : arm_sin_q15.c , arm_math.h
  • arm_sin_q31() : arm_math.h , arm_sin_q31.c
  • arm_snr_f32() : math_helper.c , math_helper.h
  • arm_split_rfft_f32() : arm_rfft_f32.c
  • arm_split_rfft_q15() : arm_rfft_q15.c
  • arm_split_rfft_q31() : arm_rfft_q31.c
  • arm_split_rifft_f32() : arm_rfft_f32.c
  • arm_split_rifft_q15() : arm_rfft_q15.c
  • arm_split_rifft_q31() : arm_rfft_q31.c
  • arm_sqrt_q15() : arm_math.h
  • arm_sqrt_q31() : arm_math.h
  • arm_status : arm_math.h
  • arm_std_f32() : arm_math.h , arm_std_f32.c
  • arm_std_q15() : arm_math.h , arm_std_q15.c
  • arm_std_q31() : arm_std_q31.c , arm_math.h
  • arm_sub_f32() : arm_math.h , arm_sub_f32.c
  • arm_sub_q15() : arm_sub_q15.c , arm_math.h
  • arm_sub_q31() : arm_math.h , arm_sub_q31.c
  • arm_sub_q7() : arm_math.h , arm_sub_q7.c
  • arm_var_f32() : arm_var_f32.c , arm_math.h
  • arm_var_q15() : arm_math.h , arm_var_q15.c
  • arm_var_q31() : arm_var_q31.c , arm_math.h
  • armBitRevTable : arm_common_tables.c , arm_common_tables.h
  • armRecipTableQ15 : arm_common_tables.c , arm_common_tables.h
  • armRecipTableQ31 : arm_common_tables.h , arm_common_tables.c
  • ARP_FRAME_SIZE : tcpip.h
  • ARP_HARDW_OFS : tcpip.h
  • ARP_HLEN_PLEN_OFS : tcpip.h
  • ARP_HWTYPE_ETH : uip_arp.c
  • ARP_OPCODE_OFS : tcpip.h
  • ARP_PROT_OFS : tcpip.h
  • ARP_REPLY : uip_arp.c
  • ARP_REQUEST : uip_arp.c , tcpip.h
  • ARP_SENDER_HA_OFS : tcpip.h
  • ARP_SENDER_IP_OFS : tcpip.h
  • ARP_TARGET_HA_OFS : tcpip.h
  • ARP_TARGET_IP_OFS : tcpip.h
  • ASCSET : drv_glcd.h
  • ASCSET_Data_t : drv_glcd.h
  • AT_f32 : arm_matrix_example_f32.c
  • ATMA_f32 : arm_matrix_example_f32.c
  • ATMAI_f32 : arm_matrix_example_f32.c
  • AUDIO_3D_STEREO_PROCESS : audio.h
  • AUDIO_AC3_CONTROL_UNDEFINED : audio.h
  • AUDIO_AC3_DYN_RANGE_CONTROL : audio.h
  • AUDIO_AC3_HILO_SCALING_CONTROL : audio.h
  • AUDIO_AC3_MODE_CONTROL : audio.h
  • AUDIO_AC3_SCALING_CONTROL : audio.h
  • AUDIO_ATTACK_TIME_CONTROL : audio.h
  • AUDIO_AUTOMATIC_GAIN_CONTROL : audio.h
  • AUDIO_BASS_BOOST_CONTROL : audio.h
  • AUDIO_BASS_CONTROL : audio.h
  • AUDIO_CHANNEL_C : audio.h
  • AUDIO_CHANNEL_L : audio.h
  • AUDIO_CHANNEL_LC : audio.h
  • AUDIO_CHANNEL_LFE : audio.h
  • AUDIO_CHANNEL_LS : audio.h
  • AUDIO_CHANNEL_M : audio.h
  • AUDIO_CHANNEL_R : audio.h
  • AUDIO_CHANNEL_RC : audio.h
  • AUDIO_CHANNEL_RS : audio.h
  • AUDIO_CHANNEL_S : audio.h
  • AUDIO_CHANNEL_SL : audio.h
  • AUDIO_CHANNEL_SR : audio.h
  • AUDIO_CHANNEL_T : audio.h
  • AUDIO_CHORUS_DEPTH_CONTROL : audio.h
  • AUDIO_CHORUS_LEVEL_CONTROL : audio.h
  • AUDIO_CHORUS_PROCESS : audio.h
  • AUDIO_COMPRESSION_RATE_CONTROL : audio.h
  • AUDIO_CONFIGURATION_DESCRIPTOR_TYPE : audio.h
  • AUDIO_CONTROL_ATTACK_TIME : audio.h
  • AUDIO_CONTROL_AUTOMATIC_GAIN : audio.h
  • AUDIO_CONTROL_BASS : audio.h
  • AUDIO_CONTROL_BASS_BOOST : audio.h
  • AUDIO_CONTROL_CHORUS_DEPTH : audio.h
  • AUDIO_CONTROL_CHORUS_LEVEL : audio.h
  • AUDIO_CONTROL_COMPRESSION_RATE : audio.h
  • AUDIO_CONTROL_DEALY : audio.h
  • AUDIO_CONTROL_ENABLE : audio.h
  • AUDIO_CONTROL_EXTENSION_UNIT : audio.h
  • AUDIO_CONTROL_FEATURE_UNIT : audio.h
  • AUDIO_CONTROL_GRAPHIC_EQUALIZER : audio.h
  • AUDIO_CONTROL_HEADER : audio.h
  • AUDIO_CONTROL_INPUT_TERMINAL : audio.h
  • AUDIO_CONTROL_INTERFACE_DESC_SZ : audio.h
  • AUDIO_CONTROL_LOUDNESS : audio.h
  • AUDIO_CONTROL_MAX_AMPL : audio.h
  • AUDIO_CONTROL_MID : audio.h
  • AUDIO_CONTROL_MIXER_UNIT : audio.h
  • AUDIO_CONTROL_MODE_SELECT : audio.h
  • AUDIO_CONTROL_MUTE : audio.h
  • AUDIO_CONTROL_OUTPUT_TERMINAL : audio.h
  • AUDIO_CONTROL_PITCH : audio.h
  • AUDIO_CONTROL_PROCESSING_UNIT : audio.h
  • AUDIO_CONTROL_RELEASE_TIME : audio.h
  • AUDIO_CONTROL_REVERB_FEEDBACK : audio.h
  • AUDIO_CONTROL_REVERB_LEVEL : audio.h
  • AUDIO_CONTROL_REVERB_TIME : audio.h
  • AUDIO_CONTROL_REVERB_TYPE : audio.h
  • AUDIO_CONTROL_SAMPLING_FREQ : audio.h
  • AUDIO_CONTROL_SELECTOR_UNIT : audio.h
  • AUDIO_CONTROL_SHORUS_RATE : audio.h
  • AUDIO_CONTROL_SPACIOUSNESS : audio.h
  • AUDIO_CONTROL_THRESHOLD : audio.h
  • AUDIO_CONTROL_TREBLE : audio.h
  • AUDIO_CONTROL_UNDEFINED : audio.h
  • AUDIO_CONTROL_VOLUME : audio.h
  • AUDIO_COPY_PROTECT_CONTROL : audio.h
  • AUDIO_DELAY_CONTROL : audio.h
  • AUDIO_DEVICE_DESCRIPTOR_TYPE : audio.h
  • AUDIO_DOLBY_PROLOGIC_PROCESS : audio.h
  • AUDIO_DYN_RANGE_COMP_PROCESS : audio.h
  • AUDIO_ENABLE_CONTROL : audio.h
  • AUDIO_ENDPOINT_DESCRIPTOR_TYPE : audio.h
  • AUDIO_ENDPOINT_GENERAL : audio.h
  • AUDIO_ENDPOINT_UNDEFINED : audio.h
  • AUDIO_EXTENSION_UNIT_DESC_SZ : audio.h
  • AUDIO_FEATURE_UNIT_DESC_SZ : audio.h
  • AUDIO_FORMAT_AC3 : audio.h
  • AUDIO_FORMAT_AC3_DESC_SIZE : audio.h
  • AUDIO_FORMAT_ALAW : audio.h
  • AUDIO_FORMAT_IEC1937_AC3 : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG1_L1 : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG1_L2_3 : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG2_EXT : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG2_L1_LS : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG2_L2_3 : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG2_NOEXT : audio.h
  • AUDIO_FORMAT_IEEE_FLOAT : audio.h
  • AUDIO_FORMAT_MPEG : audio.h
  • AUDIO_FORMAT_MPEG_DESC_SIZE : audio.h
  • AUDIO_FORMAT_MULAW : audio.h
  • AUDIO_FORMAT_PCM : audio.h
  • AUDIO_FORMAT_PCM8 : audio.h
  • AUDIO_FORMAT_TYPE_I : audio.h
  • AUDIO_FORMAT_TYPE_I_DESC_SZ : audio.h
  • AUDIO_FORMAT_TYPE_I_UNDEFINED : audio.h
  • AUDIO_FORMAT_TYPE_II : audio.h
  • AUDIO_FORMAT_TYPE_II_DESC_SZ : audio.h
  • AUDIO_FORMAT_TYPE_II_UNDEFINED : audio.h
  • AUDIO_FORMAT_TYPE_III : audio.h
  • AUDIO_FORMAT_TYPE_III_DESC_SZ : audio.h
  • AUDIO_FORMAT_TYPE_III_UNDEFINED : audio.h
  • AUDIO_FORMAT_TYPE_UNDEFINED : audio.h
  • AUDIO_GRAPHIC_EQUALIZER_CONTROL : audio.h
  • AUDIO_INPUT_TERMINAL_DESC_SIZE : audio.h
  • AUDIO_INTERFACE_DESCRIPTOR_TYPE : audio.h
  • AUDIO_LOUDNESS_CONTROL : audio.h
  • AUDIO_MAX_AMPL_CONTROL : audio.h
  • AUDIO_MAX_PACKETS_ONLY : audio.h
  • AUDIO_MID_CONTROL : audio.h
  • AUDIO_MIXER_UNIT_DESC_SZ : audio.h
  • AUDIO_MODE_SELECT_CONTROL : audio.h
  • AUDIO_MPEG_CONTROL_UNDEFINED : audio.h
  • AUDIO_MPEG_DUAL_CHANNEL_CONTROL : audio.h
  • AUDIO_MPEG_DYN_RANGE_CONTROL : audio.h
  • AUDIO_MPEG_HILO_SCALING_CONTROL : audio.h
  • AUDIO_MPEG_MULTILINGUAL_CONTROL : audio.h
  • AUDIO_MPEG_SCALING_CONTROL : audio.h
  • AUDIO_MPEG_SECOND_STEREO_CONTROL : audio.h
  • AUDIO_MUTE_CONTROL : audio.h
  • AUDIO_OUTPUT_TERMINAL_DESC_SIZE : audio.h
  • AUDIO_PITCH_CONTROL : audio.h
  • AUDIO_PROCESSING_UNIT_DESC_SZ : audio.h
  • AUDIO_PROTOCOL_UNDEFINED : audio.h
  • AUDIO_RELEASE_TIME_CONTROL : audio.h
  • AUDIO_REQUEST_GET_CUR : audio.h
  • AUDIO_REQUEST_GET_MAX : audio.h
  • AUDIO_REQUEST_GET_MEM : audio.h
  • AUDIO_REQUEST_GET_MIN : audio.h
  • AUDIO_REQUEST_GET_RES : audio.h
  • AUDIO_REQUEST_GET_STAT : audio.h
  • AUDIO_REQUEST_SET_CUR : audio.h
  • AUDIO_REQUEST_SET_MAX : audio.h
  • AUDIO_REQUEST_SET_MEM : audio.h
  • AUDIO_REQUEST_SET_MIN : audio.h
  • AUDIO_REQUEST_SET_RES : audio.h
  • AUDIO_REQUEST_UNDEFINED : audio.h
  • AUDIO_REVERB_FEEDBACK_CONTROL : audio.h
  • AUDIO_REVERB_LEVEL_CONTROL : audio.h
  • AUDIO_REVERB_TIME_CONTROL : audio.h
  • AUDIO_REVERBERATION_PROCESS : audio.h
  • AUDIO_SAMPLING_FREQ_CONTROL : audio.h
  • AUDIO_SELECTOR_UNIT_DESC_SZ : audio.h
  • AUDIO_SHORUS_RATE_CONTROL : audio.h
  • AUDIO_SPACIOUSNESS_CONTROL : audio.h
  • AUDIO_STANDARD_ENDPOINT_DESC_SIZE : audio.h
  • AUDIO_STREAMING_ENDPOINT_DESC_SIZE : audio.h
  • AUDIO_STREAMING_FORMAT_SPECIFIC : audio.h
  • AUDIO_STREAMING_FORMAT_TYPE : audio.h
  • AUDIO_STREAMING_GENERAL : audio.h
  • AUDIO_STREAMING_INTERFACE_DESC_SIZE : audio.h
  • AUDIO_STREAMING_UNDEFINED : audio.h
  • AUDIO_STRING_DESCRIPTOR_TYPE : audio.h
  • AUDIO_SUBCLASS_AUDIOCONTROL : audio.h
  • AUDIO_SUBCLASS_AUDIOSTREAMING : audio.h
  • AUDIO_SUBCLASS_MIDISTREAMING : audio.h
  • AUDIO_SUBCLASS_UNDEFINED : audio.h
  • AUDIO_TERMINAL_1394_DA_STREAM : audio.h
  • AUDIO_TERMINAL_1394_DA_STREAM_TRACK : audio.h
  • AUDIO_TERMINAL_ANALOG_CONNECTOR : audio.h
  • AUDIO_TERMINAL_ANALOG_TAPE : audio.h
  • AUDIO_TERMINAL_BIDIRECTIONAL_UNDEFINED : audio.h
  • AUDIO_TERMINAL_CABLE_TUNER_AUDIO : audio.h
  • AUDIO_TERMINAL_CALIBRATION_NOISE : audio.h
  • AUDIO_TERMINAL_CD_PLAYER : audio.h
  • AUDIO_TERMINAL_COMMUNICATION_SPEAKER : audio.h
  • AUDIO_TERMINAL_DAT : audio.h
  • AUDIO_TERMINAL_DCC : audio.h
  • AUDIO_TERMINAL_DESKTOP_MICROPHONE : audio.h
  • AUDIO_TERMINAL_DESKTOP_SPEAKER : audio.h
  • AUDIO_TERMINAL_DIGITAL_AUDIO_INTERFACE : audio.h
  • AUDIO_TERMINAL_DOWN_LINE_PHONE : audio.h
  • AUDIO_TERMINAL_DSS_AUDIO : audio.h
  • AUDIO_TERMINAL_DVD_AUDIO : audio.h
  • AUDIO_TERMINAL_EMBEDDED_UNDEFINED : audio.h
  • AUDIO_TERMINAL_EQUALIZATION_NOISE : audio.h
  • AUDIO_TERMINAL_EXTERNAL_UNDEFINED : audio.h
  • AUDIO_TERMINAL_HANDSET : audio.h
  • AUDIO_TERMINAL_HEAD_MOUNTED_AUDIO : audio.h
  • AUDIO_TERMINAL_HEAD_MOUNTED_HANDSET : audio.h
  • AUDIO_TERMINAL_HEADPHONES : audio.h
  • AUDIO_TERMINAL_INPUT_UNDEFINED : audio.h
  • AUDIO_TERMINAL_LEGACY_AUDIO_CONNECTOR : audio.h
  • AUDIO_TERMINAL_LINE_CONNECTOR : audio.h
  • AUDIO_TERMINAL_LOW_FREQ_SPEAKER : audio.h
  • AUDIO_TERMINAL_MICROPHONE : audio.h
  • AUDIO_TERMINAL_MICROPHONE_ARRAY : audio.h
  • AUDIO_TERMINAL_MINI_DISK : audio.h
  • AUDIO_TERMINAL_MULTI_TRACK_RECORDER : audio.h
  • AUDIO_TERMINAL_OMNI_DIR_MICROPHONE : audio.h
  • AUDIO_TERMINAL_OUTPUT_UNDEFINED : audio.h
  • AUDIO_TERMINAL_PERSONAL_MICROPHONE : audio.h
  • AUDIO_TERMINAL_PHONE_LINE : audio.h
  • AUDIO_TERMINAL_PHONOGRAPH : audio.h
  • AUDIO_TERMINAL_PROCESSING_MIC_ARRAY : audio.h
  • AUDIO_TERMINAL_RADIO_RECEIVER : audio.h
  • AUDIO_TERMINAL_RADIO_TRANSMITTER : audio.h
  • AUDIO_TERMINAL_ROOM_SPEAKER : audio.h
  • AUDIO_TERMINAL_SATELLITE_RECEIVER_AUDIO : audio.h
  • AUDIO_TERMINAL_SPDIF_INTERFACE : audio.h
  • AUDIO_TERMINAL_SPEAKER : audio.h
  • AUDIO_TERMINAL_SPEAKERPHONE : audio.h
  • AUDIO_TERMINAL_SPEAKERPHONE_ECHOCANCEL : audio.h
  • AUDIO_TERMINAL_SPEAKERPHONE_ECHOSUPRESS : audio.h
  • AUDIO_TERMINAL_SYNTHESIZER : audio.h
  • AUDIO_TERMINAL_TELEPHONE : audio.h
  • AUDIO_TERMINAL_TELEPHONY_UNDEFINED : audio.h
  • AUDIO_TERMINAL_TV_TUNER_AUDIO : audio.h
  • AUDIO_TERMINAL_USB_STREAMING : audio.h
  • AUDIO_TERMINAL_USB_UNDEFINED : audio.h
  • AUDIO_TERMINAL_USB_VENDOR_SPECIFIC : audio.h
  • AUDIO_TERMINAL_VCR_AUDIO : audio.h
  • AUDIO_TERMINAL_VIDEO_DISC_AUDIO : audio.h
  • AUDIO_THRESHOLD_CONTROL : audio.h
  • AUDIO_TREBLE_CONTROL : audio.h
  • AUDIO_UNDEFINED_DESCRIPTOR_TYPE : audio.h
  • AUDIO_UNDEFINED_PROCESS : audio.h
  • AUDIO_UP_DOWN_MIX_PROCESS : audio.h
  • AUDIO_VOLUME_CONTROL : audio.h
  • AUTO_NEGOTIATION_ENA : emac.h
  • AUTO_RTS_CTS_USE : uart_fullmodem_test.c
  • AUTO_SLVADDR_DETECT : rs485_slave.c
  • AxB : arm_convolution_example_f32.c
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- b -

  • B : usb.h
  • B3VAL : usbdesc.h
  • B_f32 : arm_matrix_example_f32.c
  • B_S : usbaudio.h
  • BackColor : GLCD_SPI_LPC1700.c
  • BACKLIGHT_OFF : glcd_ll.h
  • BACKLIGHT_ON : glcd_ll.h
  • bAlternateSetting : usb.h
  • bCBLength : msc.h
  • bcdCDC : cdc.h
  • bcdDevice : usb.h
  • bcdHID : hid.h
  • bcdUSB : usb.h
  • bCharFormat : cdc.h
  • bConfigurationValue : usb.h
  • bCountryCode : hid.h
  • bDataBits : cdc.h
  • bDataInterface : cdc.h
  • bDescriptorSubtype : cdc.h
  • bDescriptorType : usb.h , cdc.h , usb.h , hid.h , usb.h
  • bDeviceClass : usb.h
  • bDeviceProtocol : usb.h
  • bDeviceSubClass : usb.h
  • bEndpointAddress : usb.h
  • bFunctionLength : cdc.h
  • bInterfaceClass : usb.h
  • bInterfaceNumber : usb.h
  • bInterfaceProtocol : usb.h
  • bInterfaceSubClass : usb.h
  • bInterval : usb.h
  • BITBAND_PERI : bitband.c
  • BITBAND_PERI_BASE : bitband.c
  • BITBAND_PERI_ClearBit : bitband.c
  • BITBAND_PERI_GetBit : bitband.c
  • BITBAND_PERI_REF : bitband.c
  • BITBAND_PERI_SetBit : bitband.c
  • BITBAND_SRAM : bitband.c
  • BITBAND_SRAM_BASE : bitband.c
  • BITBAND_SRAM_ClearBit : bitband.c
  • BITBAND_SRAM_GetBit : bitband.c
  • BITBAND_SRAM_REF : bitband.c
  • BITBAND_SRAM_SetBit : bitband.c
  • Bk : arm_convolution_example_f32.c
  • Black : GLCD.h
  • bLength : usb.h , hid.h , usb.h
  • BLINK_LED_PIN : emactest.c
  • BLOCK_SIZE : arm_fir_example_f32.c
  • BLOCKING : lpc_types.h
  • blockSize : arm_fir_example_f32.c , arm_sin_cos_example_f32.c , arm_variance_example_f32.c
  • BLOCKSIZE : arm_graphic_equalizer_example_q31.c , arm_signal_converge_example_f32.c
  • Blue : GLCD.h
  • bLUN : msc.h
  • BM : usb.h
  • bMasterInterface : cdc.h
  • bmAttributes : usb.h
  • bMaxPacketSize0 : usb.h
  • bMaxPower : usb.h
  • bmCapabilities : cdc.h
  • bmFlags : msc.h
  • Bmp_t : drv_glcd.h
  • bmRequestType : usb.h
  • bNumConfigurations : usb.h
  • bNumDescriptors : hid.h
  • bNumEndpoints : usb.h
  • bNumInterfaces : usb.h
  • BOD_IRQn : LPC17xx.h
  • Bool : lpc_types.h
  • BOOL_16 : lpc_types.h
  • BOOL_32 : lpc_types.h
  • BOOL_8 : lpc_types.h
  • BOOTP_BROADCAST : dhcpc.c
  • BOUNCE_RX : emactest.c
  • bParityType : cdc.h
  • BPP : GLCD_SPI_LPC1700.c
  • bRequest : usb.h
  • bReserved : usb.h
  • bSlaveInterfaces : cdc.h
  • bStatus : msc.h
  • bString : usb.h
  • BSTROFF : drv_glcd.h
  • BSTRON : drv_glcd.h
  • BSY : GLCD_SPI_LPC1700.c
  • BUF : uip-fw.c , uip-split.c , main.c , uip.c , uip_arp.c
  • BUF_FOUND : psock.c
  • BUF_FULL : psock.c
  • BUF_NOT_FOUND : psock.c
  • BUF_NOT_FULL : psock.c
  • buffer : i2c_monitor.c
  • Buffer_Init() : ti_test.c , ssp_master.c , i2s_dma_test.c , spi_master.c , flash_2_ram.c , spi_slave.c , i2c_master_slave_int_test.c , ssp_slave.c , ssp_dma.c , spi_loopback_test.c , microwire_test.c , i2s_test_4_wire.c , i2s_irq_test.c , i2s_polling.c , i2s_mclk.c , master.c , slave.c , gpdma_sleep.c , gpdma_r2r_test.c
  • BUFFER_SIZE : i2c_monitor.c , i2s_test_4_wire.c , ti_test.c , slave.c , spi_master.c , microwire_test.c , i2s_dma_test.c , i2s_mclk.c , master.c , i2s_polling.c , ssp_master.c , i2s_irq_test.c , spi_loopback_test.c , i2c_master_slave_int_test.c , spi_slave.c , ssp_slave.c
  • Buffer_Verify() : i2s_test_4_wire.c , flash_2_ram.c , link_list.c , spi_master.c , ssp_master.c , i2s_dma_test.c , ssp_dma.c , ssp_slave.c , gpdma_r2r_test.c , i2s_mclk.c , gpdma_sleep.c , i2s_irq_test.c , spi_loopback_test.c , microwire_test.c , ti_test.c , spi_slave.c , i2s_polling.c
  • BulkBuf : mscuser.c
  • BulkBufIn : cdcuser.c
  • BulkBufOut : cdcuser.c
  • BulkLen : mscuser.c
  • BulkStage : mscuser.c
  • BusFault_IRQn : LPC17xx.h
  • BYPP : GLCD_SPI_LPC1700.c
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- c -

  • c : uip_arp.c
  • c_entry() : adc_burst_test.c , adc_hardware_trigger_test.c , can_self_test.c , dac_sinewave_test.c , i2c_polling_test.c , ssp_master.c , microwire_test.c , slave.c , sc16is750_int.c , sc16is750_polling.c , dac_speaker.c , i2s_dma_test.c , ssp_slave.c , ti_test.c , i2s_irq_test.c , 10ms_base.c , systick_stclk.c , can_test_aflut.c , dac_wave_generate.c , i2s_mclk.c , timer_capture.c , freqmeasure.c , i2s_test_4_wire.c , gen_diff_delay.c , gen_diff_freqs.c , emactest.c , i2s_two_kit.c , timer_int_match.c , timer_poll_match.c , i2s_polling.c , pwm_signal.c , uart_autobaud_test.c , adc_interrupt_test.c , can_test_bypass_mode.c , main.c , lcdtest.c , uart_dma_test.c , uart_hw_flow_control.c , lcdtest.c , uart_interrupt_test.c , uart_irda_receive.c , flash_2_ram.c , mcpwm_simple.c , uart_irda_transmit.c , uart_polling_test.c , nvic_priority.c , rs485_master.c , rs485_slave.c , can_test_two_kit.c , gpdma_sleep.c , vt_relocation.c , uart_fullmodem_test.c , wdt_interrupt_test.c , template.c , wdt_reset_test.c , link_list.c , pwm_dual_edge.c , pwm_match_int.c , adc_dma_test.c , adc_polling_test.c , bitband.c , gpdma_r2r_test.c , pwm_single_edge.c , extint_sleep.c , gpio_int.c , nmi_powerdown.c , rtc_deeppwd.c , mpu_test.c , LedBlinky.c , wdt_deepsleep.c , qei_test_velo.c , master.c , rit_interrupt.c , rtc_alarm_cntincr_int.c , can_ledcontrol.c , privilege.c , i2c_master_slave_int_test.c , rtc_calib.c , spi_loopback_test.c , i2c_monitor.c , spi_master.c , spi_interrupt_test.c , dac_dma.c , pca8581_test.c , spi_polling_test.c , spi_sdcard.c , i2c_interrupt_test.c , spi_slave.c , ssp_dma.c
  • CalcChecksum() : tcpip.c , tcpip.h
  • CAN1_CTRL : lpc17xx_can.h
  • CAN1SLEEPCLR : lpc17xx_can.h
  • CAN2_CTRL : lpc17xx_can.h
  • CAN2SLEEPCLR : lpc17xx_can.h
  • CAN_AccBP : lpc17xx_can.h
  • CAN_AccOff : lpc17xx_can.h
  • CAN_AF_ENTRY_ERROR : lpc17xx_can.h
  • CAN_AFMODE_Type : lpc17xx_can.h
  • CAN_AFMR_AccBP : lpc17xx_can.h
  • CAN_AFMR_AccOff : lpc17xx_can.h
  • CAN_AFMR_eFCAN : lpc17xx_can.h
  • CAN_BTR_BRP : lpc17xx_can.h
  • CAN_BTR_SAM : lpc17xx_can.h
  • CAN_BTR_SJM : lpc17xx_can.h
  • CAN_BTR_TESG1 : lpc17xx_can.h
  • CAN_BTR_TESG2 : lpc17xx_can.h
  • CAN_ChangeAFTable() : can_test_aflut.c
  • CAN_CMR_AT : lpc17xx_can.h
  • CAN_CMR_CDO : lpc17xx_can.h
  • CAN_CMR_RRB : lpc17xx_can.h
  • CAN_CMR_SRR : lpc17xx_can.h
  • CAN_CMR_STB1 : lpc17xx_can.h
  • CAN_CMR_STB2 : lpc17xx_can.h
  • CAN_CMR_STB3 : lpc17xx_can.h
  • CAN_CMR_TR : lpc17xx_can.h
  • CAN_CONFLICT_ID_ERROR : lpc17xx_can.h
  • CAN_CR_STS_Type : lpc17xx_can.h
  • CAN_CTRL_STS_Type : lpc17xx_can.h
  • CAN_DeInit() : lpc17xx_can.h
  • CAN_eFCAN : lpc17xx_can.h
  • CAN_Eff_GRP_sa : lpc17xx_can.h
  • CAN_EFF_sa : lpc17xx_can.h
  • CAN_EndofTable : lpc17xx_can.h
  • CAN_ENTRY_NOT_EXIT_ERROR : lpc17xx_can.h
  • CAN_ERROR : lpc17xx_can.h
  • CAN_EWL_EWL : lpc17xx_can.h
  • CAN_FCANIC0_IntPnd : lpc17xx_can.h
  • CAN_FCANIC1_IntPnd : lpc17xx_can.h
  • CAN_FCANIE : lpc17xx_can.h
  • CAN_FRAME_Type : lpc17xx_can.h
  • CAN_FULL_OBJ_NOT_RCV : lpc17xx_can.h
  • CAN_FullCANIntGetStatus() : lpc17xx_can.h
  • CAN_FullCANPendGetStatus() : lpc17xx_can.h
  • CAN_GetCRStatus() : lpc17xx_can.h
  • CAN_GetCTRLStatus() : lpc17xx_can.h
  • CAN_GSR_BS : lpc17xx_can.h
  • CAN_GSR_DOS : lpc17xx_can.h
  • CAN_GSR_ES : lpc17xx_can.h
  • CAN_GSR_RBS : lpc17xx_can.h
  • CAN_GSR_RS : lpc17xx_can.h
  • CAN_GSR_RXERR : lpc17xx_can.h
  • CAN_GSR_TBS : lpc17xx_can.h
  • CAN_GSR_TCS : lpc17xx_can.h
  • CAN_GSR_TS : lpc17xx_can.h
  • CAN_GSR_TXERR : lpc17xx_can.h
  • CAN_ICR_ALCBIT : lpc17xx_can.h
  • CAN_ICR_ALI : lpc17xx_can.h
  • CAN_ICR_BEI : lpc17xx_can.h
  • CAN_ICR_DOI : lpc17xx_can.h
  • CAN_ICR_EI : lpc17xx_can.h
  • CAN_ICR_EPI : lpc17xx_can.h
  • CAN_ICR_ERRBIT : lpc17xx_can.h
  • CAN_ICR_ERRC : lpc17xx_can.h
  • CAN_ICR_ERRDIR : lpc17xx_can.h
  • CAN_ICR_IDI : lpc17xx_can.h
  • CAN_ICR_RI : lpc17xx_can.h
  • CAN_ICR_TI1 : lpc17xx_can.h
  • CAN_ICR_TI2 : lpc17xx_can.h
  • CAN_ICR_TI3 : lpc17xx_can.h
  • CAN_ICR_WUI : lpc17xx_can.h
  • CAN_ID_FORMAT_Type : lpc17xx_can.h
  • CAN_IER_ALIE : lpc17xx_can.h
  • CAN_IER_BEIE : lpc17xx_can.h
  • CAN_IER_DOIE : lpc17xx_can.h
  • CAN_IER_EIE : lpc17xx_can.h
  • CAN_IER_EPIE : lpc17xx_can.h
  • CAN_IER_IDIE : lpc17xx_can.h
  • CAN_IER_RIE : lpc17xx_can.h
  • CAN_IER_TIE1 : lpc17xx_can.h
  • CAN_IER_TIE2 : lpc17xx_can.h
  • CAN_IER_TIE3 : lpc17xx_can.h
  • CAN_IER_WUIE : lpc17xx_can.h
  • CAN_Init() : lpc17xx_can.h
  • CAN_InitAFMessage() : can_test_aflut.c , can_test_two_kit.c
  • CAN_InitMessage() : can_ledcontrol.c , can_self_test.c , can_test_aflut.c , can_test_bypass_mode.c , can_test_two_kit.c
  • CAN_INT_EN_Type : lpc17xx_can.h
  • CAN_IntGetStatus() : lpc17xx_can.h
  • CAN_IRQCmd() : lpc17xx_can.h
  • CAN_IRQHandler() : can_ledcontrol.c , can_self_test.c , can_test_aflut.c , can_test_bypass_mode.c , can_test_two_kit.c
  • CAN_IRQn : LPC17xx.h
  • CAN_LISTENONLY_MODE : lpc17xx_can.h
  • CAN_LoadExplicitEntry() : lpc17xx_can.h
  • CAN_LoadFullCANEntry() : lpc17xx_can.h
  • CAN_LoadGroupEntry() : lpc17xx_can.h
  • CAN_LUTerr : lpc17xx_can.h
  • CAN_LUTerrAd : lpc17xx_can.h
  • CAN_MOD_LOM : lpc17xx_can.h
  • CAN_MOD_RM : lpc17xx_can.h
  • CAN_MOD_RPM : lpc17xx_can.h
  • CAN_MOD_SM : lpc17xx_can.h
  • CAN_MOD_STM : lpc17xx_can.h
  • CAN_MOD_TM : lpc17xx_can.h
  • CAN_MOD_TPM : lpc17xx_can.h
  • CAN_MODE_Type : lpc17xx_can.h
  • CAN_ModeConfig() : lpc17xx_can.h
  • CAN_MSR_BS1 : lpc17xx_can.h
  • CAN_MSR_BS2 : lpc17xx_can.h
  • CAN_MSR_E1 : lpc17xx_can.h
  • CAN_MSR_E2 : lpc17xx_can.h
  • CAN_NO_RECEIVE_DATA : lpc17xx_can.h
  • CAN_Normal : lpc17xx_can.h
  • CAN_OBJECTS_FULL_ERROR : lpc17xx_can.h
  • CAN_OK : lpc17xx_can.h
  • CAN_OPERATING_MODE : lpc17xx_can.h
  • CAN_PinCfg() : can_test_aflut.c
  • CAN_RDA_DATA1 : lpc17xx_can.h
  • CAN_RDA_DATA2 : lpc17xx_can.h
  • CAN_RDA_DATA3 : lpc17xx_can.h
  • CAN_RDA_DATA4 : lpc17xx_can.h
  • CAN_RDB_DATA5 : lpc17xx_can.h
  • CAN_RDB_DATA6 : lpc17xx_can.h
  • CAN_RDB_DATA7 : lpc17xx_can.h
  • CAN_RDB_DATA8 : lpc17xx_can.h
  • CAN_RECEIVE : can_test_two_kit.c
  • CAN_ReceiveMsg() : lpc17xx_can.h
  • CAN_RemoveEntry() : lpc17xx_can.h
  • CAN_RESET_MODE : lpc17xx_can.h
  • CAN_RFS_BP : lpc17xx_can.h
  • CAN_RFS_DLC : lpc17xx_can.h
  • CAN_RFS_FF : lpc17xx_can.h
  • CAN_RFS_ID_INDEX : lpc17xx_can.h
  • CAN_RFS_RTR : lpc17xx_can.h
  • CAN_RID_ID_11 : lpc17xx_can.h
  • CAN_RID_ID_29 : lpc17xx_can.h
  • CAN_RSR_DOS1 : lpc17xx_can.h
  • CAN_RSR_DOS2 : lpc17xx_can.h
  • CAN_RSR_RB1 : lpc17xx_can.h
  • CAN_RSR_RB2 : lpc17xx_can.h
  • CAN_RSR_RS1 : lpc17xx_can.h
  • CAN_RSR_RS2 : lpc17xx_can.h
  • CAN_RX_MSG_CNT : can_test_aflut.c
  • CAN_RXPOLARITY_MODE : lpc17xx_can.h
  • CAN_SELFTEST_MODE : lpc17xx_can.h
  • CAN_SendMsg() : lpc17xx_can.h
  • CAN_SetAFMode() : lpc17xx_can.h
  • CAN_SetCommand() : lpc17xx_can.h
  • CAN_SetupAFLUT() : lpc17xx_can.h
  • CAN_SetupAFTable() : can_test_aflut.c , can_test_two_kit.c
  • CAN_SFF_GRP_sa : lpc17xx_can.h
  • CAN_SLEEP_MODE : lpc17xx_can.h
  • CAN_SR_BS : lpc17xx_can.h
  • CAN_SR_DOS : lpc17xx_can.h
  • CAN_SR_ES : lpc17xx_can.h
  • CAN_SR_RBS : lpc17xx_can.h
  • CAN_SR_RS : lpc17xx_can.h
  • CAN_SR_TBS1 : lpc17xx_can.h
  • CAN_SR_TBS2 : lpc17xx_can.h
  • CAN_SR_TBS3 : lpc17xx_can.h
  • CAN_SR_TCS1 : lpc17xx_can.h
  • CAN_SR_TCS2 : lpc17xx_can.h
  • CAN_SR_TCS3 : lpc17xx_can.h
  • CAN_SR_TS1 : lpc17xx_can.h
  • CAN_SR_TS2 : lpc17xx_can.h
  • CAN_SR_TS3 : lpc17xx_can.h
  • CAN_STT_sa : lpc17xx_can.h
  • CAN_TDA_DATA1 : lpc17xx_can.h
  • CAN_TDA_DATA2 : lpc17xx_can.h
  • CAN_TDA_DATA3 : lpc17xx_can.h
  • CAN_TDA_DATA4 : lpc17xx_can.h
  • CAN_TDA_DATA5 : lpc17xx_can.h
  • CAN_TDA_DATA6 : lpc17xx_can.h
  • CAN_TDA_DATA7 : lpc17xx_can.h
  • CAN_TDA_DATA8 : lpc17xx_can.h
  • CAN_TEST_MODE : lpc17xx_can.h
  • CAN_TFI_DLC : lpc17xx_can.h
  • CAN_TFI_FF : lpc17xx_can.h
  • CAN_TFI_PRIO : lpc17xx_can.h
  • CAN_TFI_RTR : lpc17xx_can.h
  • CAN_TID_ID11 : lpc17xx_can.h
  • CAN_TID_ID29 : lpc17xx_can.h
  • CAN_TRANSMIT : can_test_two_kit.c
  • CAN_TSR_TBS1 : lpc17xx_can.h
  • CAN_TSR_TBS2 : lpc17xx_can.h
  • CAN_TSR_TCS1 : lpc17xx_can.h
  • CAN_TSR_TCS2 : lpc17xx_can.h
  • CAN_TSR_TS1 : lpc17xx_can.h
  • CAN_TSR_TS2 : lpc17xx_can.h
  • CAN_TX_MSG_CNT : can_test_aflut.c
  • CAN_TXPRIORITY_MODE : lpc17xx_can.h
  • CAN_VerifyMessage() : can_test_two_kit.c
  • CAN_WAKEFLAGES_CAN1WAKE : lpc17xx_can.h
  • CAN_WAKEFLAGES_CAN2WAKE : lpc17xx_can.h
  • CANActivity_IRQn : LPC17xx.h
  • CANAF_ext_cnt : lpc17xx_can.c
  • CANAF_FullCAN_cnt : lpc17xx_can.c
  • CANAF_gext_cnt : lpc17xx_can.c
  • CANAF_gstd_cnt : lpc17xx_can.c
  • CANAF_std_cnt : lpc17xx_can.c
  • CANCR_MS : lpc17xx_can.h
  • CANCR_RX_STS : lpc17xx_can.h
  • CANCR_TX_STS : lpc17xx_can.h
  • CANCTRL_ERR_WRN : lpc17xx_can.h
  • CANCTRL_GLOBAL_STS : lpc17xx_can.h
  • CANCTRL_INT_CAP : lpc17xx_can.h
  • CANCTRL_STS : lpc17xx_can.h
  • CANErrCount : can_test_aflut.c , can_test_two_kit.c
  • CANINT_ALIE : lpc17xx_can.h
  • CANINT_BEIE : lpc17xx_can.h
  • CANINT_DOIE : lpc17xx_can.h
  • CANINT_EIE : lpc17xx_can.h
  • CANINT_EPIE : lpc17xx_can.h
  • CANINT_FCE : lpc17xx_can.h
  • CANINT_IDIE : lpc17xx_can.h
  • CANINT_RIE : lpc17xx_can.h
  • CANINT_TIE1 : lpc17xx_can.h
  • CANINT_TIE2 : lpc17xx_can.h
  • CANINT_TIE3 : lpc17xx_can.h
  • CANINT_WUIE : lpc17xx_can.h
  • CANRxCount : can_self_test.c , can_test_aflut.c , can_test_bypass_mode.c , can_test_two_kit.c
  • CANTxCount : can_self_test.c , can_test_aflut.c , can_test_bypass_mode.c , can_test_two_kit.c
  • CAP_MODE : qei_test_velo.c
  • CAP_PERIOD : qei_test_velo.c
  • capture : freqmeasure.c
  • CAPTURE_MODE_TEST : mcpwm_simple.c
  • CASET : drv_glcd.h
  • CB : msc.h
  • CBW : mscuser.c
  • CCEMTY_INT : usbreg.h
  • CCLK : memory.h
  • CCLKCFG_Val : system_LPC17xx.c
  • CDC_ABSTRACT_CONTROL_MANAGEMENT : cdc.h
  • CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR : cdc.h
  • CDC_ABSTRACT_CONTROL_MODEL : cdc.h
  • CDC_ABSTRACT_STATE : cdc.h
  • CDC_ACTIVATE_CARRIER : cdc.h
  • CDC_ATM_NETWORKING : cdc.h
  • CDC_ATM_NETWORKING_CONTROL_MODEL : cdc.h
  • CDC_AUX_JACK_HOOK_STATE : cdc.h
  • CDC_BUF_COUNT : cdcuser.c
  • CDC_BUF_EMPTY : cdcuser.c
  • CDC_BUF_FULL : cdcuser.c
  • CDC_BUF_MASK : cdcuser.c
  • CDC_BUF_RD : cdcuser.c
  • CDC_BUF_RESET : cdcuser.c
  • CDC_BUF_SIZE : cdcuser.c
  • CDC_BUF_T : cdcuser.c
  • CDC_BUF_WR : cdcuser.c
  • CDC_BulkIn() : cdcuser.c , cdcuser.h
  • CDC_BulkOut() : cdcuser.c , cdcuser.h
  • CDC_CALL_MANAGEMENT : cdc.h
  • CDC_CALL_MANAGEMENT_DESCRIPTOR : cdc.h
  • CDC_CALL_STATE_CHANGE : cdc.h
  • CDC_CAPI_CONTROL_MANAGEMENT : cdc.h
  • CDC_CAPI_CONTROL_MODEL : cdc.h
  • CDC_CEP_IN : cdcuser.h
  • CDC_CLEAR_COMM_FEATURE : cdc.h
  • CDC_CLEAR_UNIT_PARAMETER : cdc.h
  • CDC_ClearCommFeature() : cdcuser.c , cdcuser.h
  • CDC_COMMUNICATION_INTERFACE_CLASS : cdc.h
  • CDC_CONNECTION_SPEED_CHANGE : cdc.h
  • CDC_COUNTRY_SELECTION : cdc.h
  • CDC_COUNTRY_SETTING : cdc.h
  • CDC_CS_ENDPOINT : cdc.h
  • CDC_CS_INTERFACE : cdc.h
  • CDC_DATA_INTERFACE_CLASS : cdc.h
  • CDC_DATA_MULTPLEXED_STATE : cdc.h
  • CDC_DEP_IN : cdcuser.h
  • CDC_DEP_OUT : cdcuser.h
  • CDC_DepInEmpty : cdcuser.c , cdcuser.h
  • CDC_DIAL_DIGITS : cdc.h
  • CDC_DIRECT_LINE_CONTROL_MODEL : cdc.h
  • CDC_DIRECT_LINE_MANAGEMENT : cdc.h
  • CDC_DTE_PRESENT : cdc.h
  • CDC_ETHERNET_NETWORKING : cdc.h
  • CDC_ETHERNET_NETWORKING_CONTROL_MODEL : cdc.h
  • CDC_EXTENSION_UNIT : cdc.h
  • CDC_GET_ATM_DEVICE_STATISTICS : cdc.h
  • CDC_GET_ATM_VC_STATISTICS : cdc.h
  • CDC_GET_COMM_FEATURE : cdc.h
  • CDC_GET_ENCAPSULATED_RESPONSE : cdc.h
  • CDC_GET_ETHERNET_PMP_FILTER : cdc.h
  • CDC_GET_ETHERNET_STATISTIC : cdc.h
  • CDC_GET_LINE_CODING : cdc.h
  • CDC_GET_LINE_PARMS : cdc.h
  • CDC_GET_OPERATION_PARMS : cdc.h
  • CDC_GET_PROFILE : cdc.h
  • CDC_GET_RINGER_PARMS : cdc.h
  • CDC_GET_UNIT_PARAMETER : cdc.h
  • CDC_GetCommFeature() : cdcuser.c , cdcuser.h
  • CDC_GetEncapsulatedResponse() : cdcuser.c , cdcuser.h
  • CDC_GetLineCoding() : cdcuser.c , cdcuser.h
  • CDC_GetSerialState() : cdcuser.c , cdcuser.h
  • CDC_HEADER : cdc.h
  • CDC_HEADER_DESCRIPTOR : cdc.h
  • CDC_IDLE_SETTING : cdc.h
  • CDC_Init() : cdcuser.c , cdcuser.h
  • CDC_LINE_CODING : cdc.h
  • CDC_LINE_STATE_CHANGE : cdc.h
  • CDC_LineCoding : cdcuser.c
  • CDC_MULTI_CHANNEL_CONTROL_MODEL : cdc.h
  • CDC_MULTI_CHANNEL_MANAGEMENT : cdc.h
  • CDC_NETWORK_CHANNEL : cdc.h
  • CDC_NOTIFICATION_HEADER : cdc.h
  • CDC_NOTIFICATION_NETWORK_CONNECTION : cdc.h
  • CDC_NOTIFICATION_SERIAL_STATE : cdc.h
  • CDC_NotificationIn() : cdcuser.c , cdcuser.h
  • CDC_OutBuf : cdcuser.c
  • CDC_OutBufAvailChar() : cdcuser.c , cdcuser.h
  • CDC_PROTOCOL_CAPI : cdc.h
  • CDC_PROTOCOL_COMMON_AT_COMMANDS : cdc.h
  • CDC_PROTOCOL_DESCRIBED_IN_PUFD : cdc.h
  • CDC_PROTOCOL_EURO_ISDN : cdc.h
  • CDC_PROTOCOL_HDLC : cdc.h
  • CDC_PROTOCOL_HOST_BASED_DRIVER : cdc.h
  • CDC_PROTOCOL_ISDN_BRI : cdc.h
  • CDC_PROTOCOL_Q921_DATA_LINK : cdc.h
  • CDC_PROTOCOL_Q921_MANAGEMENT : cdc.h
  • CDC_PROTOCOL_Q921_MULTIPLEXOR : cdc.h
  • CDC_PROTOCOL_TRANSPARENT : cdc.h
  • CDC_PROTOCOL_UNIT : cdc.h
  • CDC_PROTOCOL_V24_RATE_ADAPTATION : cdc.h
  • CDC_PROTOCOL_V42 : cdc.h
  • CDC_PULSE_SETUP : cdc.h
  • CDC_RdOutBuf() : cdcuser.c , cdcuser.h
  • CDC_REPORTING_CAPABILITIES : cdc.h
  • CDC_RESPONSE_AVAILABLE : cdc.h
  • CDC_RING_AUX_JACK : cdc.h
  • CDC_RING_DETECT : cdc.h
  • CDC_SEND_BREAK : cdc.h
  • CDC_SEND_ENCAPSULATED_COMMAND : cdc.h
  • CDC_SEND_PULSE : cdc.h
  • CDC_SendBreak() : cdcuser.c , cdcuser.h
  • CDC_SendEncapsulatedCommand() : cdcuser.c , cdcuser.h
  • CDC_SERIAL_STATE_BREAK : cdc.h
  • CDC_SERIAL_STATE_FRAMING : cdc.h
  • CDC_SERIAL_STATE_OVERRUN : cdc.h
  • CDC_SERIAL_STATE_PARITY : cdc.h
  • CDC_SERIAL_STATE_RING : cdc.h
  • CDC_SERIAL_STATE_RX_CARRIER : cdc.h
  • CDC_SERIAL_STATE_TX_CARRIER : cdc.h
  • CDC_SerialState : cdcuser.c
  • CDC_SET_ATM_DATA_FORMAT : cdc.h
  • CDC_SET_ATM_DEFAULT_VC : cdc.h
  • CDC_SET_AUX_LINE_STATE : cdc.h
  • CDC_SET_COMM_FEATURE : cdc.h
  • CDC_SET_CONTROL_LINE_STATE : cdc.h
  • CDC_SET_ETHERNET_MULTICAST_FILTERS : cdc.h
  • CDC_SET_ETHERNET_PACKET_FILTER : cdc.h
  • CDC_SET_ETHERNET_PMP_FILTER : cdc.h
  • CDC_SET_HOOK_STATE : cdc.h
  • CDC_SET_LINE_CODING : cdc.h
  • CDC_SET_LINE_PARMS : cdc.h
  • CDC_SET_OPERATION_PARMS : cdc.h
  • CDC_SET_PULSE_TIME : cdc.h
  • CDC_SET_RINGER_PARMS : cdc.h
  • CDC_SET_UNIT_PARAMETER : cdc.h
  • CDC_SetCommFeature() : cdcuser.c , cdcuser.h
  • CDC_SetControlLineState() : cdcuser.c , cdcuser.h
  • CDC_SetLineCoding() : cdcuser.c , cdcuser.h
  • CDC_TELEPHONE_CONTROL_MODEL : cdc.h
  • CDC_TELEPHONE_OPERATIONAL_MODES : cdc.h
  • CDC_TELEPHONE_RINGER : cdc.h
  • CDC_UNION : cdc.h
  • CDC_UNION_1SLAVE_DESCRIPTOR : cdc.h
  • CDC_UNION_DESCRIPTOR : cdc.h
  • CDC_USB_TERMINAL : cdc.h
  • CDC_V1_10 : cdc.h
  • CDC_WrOutBuf() : cdcuser.c , cdcuser.h
  • CDFULL_INT : usbreg.h
  • Channel0_Err : link_list.c , uart_dma_test.c , adc_dma_test.c , dac_dma.c , flash_2_ram.c , gpdma_sleep.c , gpdma_r2r_test.c , i2s_dma_test.c , ssp_dma.c
  • Channel0_TC : adc_dma_test.c , dac_dma.c , flash_2_ram.c , gpdma_sleep.c , link_list.c , gpdma_r2r_test.c , i2s_dma_test.c , ssp_dma.c , uart_dma_test.c
  • Channel1_Err : i2s_dma_test.c , ssp_dma.c , uart_dma_test.c
  • Channel1_TC : i2s_dma_test.c , ssp_dma.c , uart_dma_test.c
  • CHAR : lpc_types.h
  • CHAR_H : Font_24x16.h
  • CHAR_W : Font_24x16.h
  • check_failed() : lpc17xx_libcfg_default.h
  • Check_Message() : can_self_test.c
  • CHECK_PARAM : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • CHECK_RANGE : system_LPC17xx.c
  • CHECK_RSVD : system_LPC17xx.c
  • CheckFrameReceived() : EMAC.c , EMAC.h
  • CLKEXT : drv_glcd.h
  • CLKINT : drv_glcd.h
  • CLKOUTCFG_Val : system_LPC17xx.c
  • CLKPWR_CCLKCFG_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUT_ACT : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUT_EN : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTDIV : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTSEL_CPU : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTSEL_MAINOSC : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTSEL_RC : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTSEL_RTC : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTSEL_USB : lpc17xx_clkpwr.h
  • CLKPWR_CLKSRCSEL_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_CLKSRCSEL_CLKSRC_IRC : lpc17xx_clkpwr.h
  • CLKPWR_CLKSRCSEL_CLKSRC_MAINOSC : lpc17xx_clkpwr.h
  • CLKPWR_CLKSRCSEL_CLKSRC_RTC : lpc17xx_clkpwr.h
  • CLKPWR_ConfigPPWR() : lpc17xx_clkpwr.h
  • CLKPWR_DeepPowerDown() : lpc17xx_clkpwr.h
  • CLKPWR_DeepSleep() : lpc17xx_clkpwr.h
  • CLKPWR_GetPCLK() : lpc17xx_clkpwr.h
  • CLKPWR_GetPCLKSEL() : lpc17xx_clkpwr.h
  • CLKPWR_IRCTRIM_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL0_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL1_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_ACF : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_ADC : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_CAN1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_CAN2 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_CCLK_DIV_1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_CCLK_DIV_2 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_CCLK_DIV_4 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_DAC : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_GET : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_I2C0 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_I2C1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_I2C2 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_I2S : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_MC : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_PCB : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_PWM1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_QEI : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_RIT : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_SET : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_SPI : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_SSP0 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_SSP1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_SYSCON : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_TIMER0 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_TIMER1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_TIMER2 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_TIMER3 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_UART0 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_UART1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_UART2 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_UART3 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_WDT : lpc17xx_clkpwr.h
  • CLKPWR_PCON_BODPDM : lpc17xx_clkpwr.h
  • CLKPWR_PCON_BOGD : lpc17xx_clkpwr.h
  • CLKPWR_PCON_BORD : lpc17xx_clkpwr.h
  • CLKPWR_PCON_DPDFLAG : lpc17xx_clkpwr.h
  • CLKPWR_PCON_DSFLAG : lpc17xx_clkpwr.h
  • CLKPWR_PCON_PDFLAG : lpc17xx_clkpwr.h
  • CLKPWR_PCON_PM0 : lpc17xx_clkpwr.h
  • CLKPWR_PCON_PM1 : lpc17xx_clkpwr.h
  • CLKPWR_PCON_SMFLAG : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCAD : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCAN1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCAN2 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCENET : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCGPDMA : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCGPIO : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCI2C0 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCI2C1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCI2C2 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCI2S : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCMC : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCPWM1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCQEI : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCRIT : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCRTC : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCSPI : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCSSP0 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCSSP1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCTIM0 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCTIM1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCTIM2 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCTIM3 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCUART0 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCUART1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCUART2 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCUART3 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCUSB : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CFG_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CFG_MSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CFG_NSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CON_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CON_CONNECT : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CON_ENABLE : lpc17xx_clkpwr.h
  • CLKPWR_PLL0FEED_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL0STAT_MSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL0STAT_NSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL0STAT_PLLC : lpc17xx_clkpwr.h
  • CLKPWR_PLL0STAT_PLLE : lpc17xx_clkpwr.h
  • CLKPWR_PLL0STAT_PLOCK : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CFG_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CFG_MSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CFG_PSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CON_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CON_CONNECT : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CON_ENABLE : lpc17xx_clkpwr.h
  • CLKPWR_PLL1FEED_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL1STAT_MSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL1STAT_PLLC : lpc17xx_clkpwr.h
  • CLKPWR_PLL1STAT_PLLE : lpc17xx_clkpwr.h
  • CLKPWR_PLL1STAT_PLOCK : lpc17xx_clkpwr.h
  • CLKPWR_PLL1STAT_PSEL : lpc17xx_clkpwr.h
  • CLKPWR_PowerDown() : lpc17xx_clkpwr.h
  • CLKPWR_SetPCLKDiv() : lpc17xx_clkpwr.h
  • CLKPWR_Sleep() : lpc17xx_clkpwr.h
  • CLKPWR_USBCLKCFG_BITMASK : lpc17xx_clkpwr.h
  • CLKSOURCE_CPU : lpc17xx_systick.h
  • CLKSOURCE_EXT : lpc17xx_systick.h
  • CLKSRCSEL_Val : system_LPC17xx.c
  • CLOCK_CONF_SECOND : clock-arch.h
  • clock_init() : clock.h , clock-arch.c
  • CLOCK_SECOND : clock.h
  • CLOCK_SETUP : system_LPC17xx.c
  • clock_time() : clock-arch.c , clock.h
  • clock_time_t : clock-arch.h
  • CLOSE_WAIT : tcpip.h
  • CLOSED : tcpip.h
  • CLOSING : tcpip.h
  • CLR_BUF_PO : usbreg.h
  • CMD0_GO_IDLE_STATE : spi_sdcard.c
  • CMD10_SEND_CID : spi_sdcard.c
  • CMD12_STOP_TRANSMISSION : spi_sdcard.c
  • CMD13_SEND_STATUS : spi_sdcard.c
  • CMD16_SET_BLOCKLEN : spi_sdcard.c
  • CMD17_READ_SINGLE_BLOCK : spi_sdcard.c
  • CMD18_READ_MULTIPLE_BLOCK : spi_sdcard.c
  • CMD1_SEND_OPCOND : spi_sdcard.c
  • CMD24_WRITE_BLOCK : spi_sdcard.c
  • CMD25_WRITE_MULTIPLE_BLOCK : spi_sdcard.c
  • CMD27_PROGRAM_CSD : spi_sdcard.c
  • CMD28_SET_WRITE_PROT : spi_sdcard.c
  • CMD29_CLR_WRITE_PROT : spi_sdcard.c
  • CMD30_SEND_WRITE_PROT : spi_sdcard.c
  • CMD32_ERASE_WR_BLK_START_ADDR : spi_sdcard.c
  • CMD33_ERASE_WR_BLK_END_ADDR : spi_sdcard.c
  • CMD38_ERASE : spi_sdcard.c
  • CMD55_APP_CMD : spi_sdcard.c
  • CMD56_GEN_CMD : spi_sdcard.c
  • CMD58_READ_OCR : spi_sdcard.c
  • CMD59_CRC_ON_OFF : spi_sdcard.c
  • CMD9_SEND_CSD : spi_sdcard.c
  • CMD_CFG_DEV : usbreg.h
  • CMD_CLR_BUF : usbreg.h
  • CMD_GET_DEV_STAT : usbreg.h
  • CMD_GET_ERR_CODE : usbreg.h
  • CMD_RD_ERR_STAT : usbreg.h
  • CMD_RD_FRAME : usbreg.h
  • CMD_RD_TEST : usbreg.h
  • CMD_SEL_EP : usbreg.h
  • CMD_SEL_EP_CLRI : usbreg.h
  • CMD_SET_ADDR : usbreg.h
  • CMD_SET_DEV_STAT : usbreg.h
  • CMD_SET_EP_STAT : usbreg.h
  • CMD_SET_MODE : usbreg.h
  • CMD_VALID_BUF : usbreg.h
  • CntrSel : lcdtest.c
  • coeffTable : arm_graphic_equalizer_example_q31.c
  • COLMOD : drv_glcd.h
  • COLMOD_Data_t : drv_glcd.h
  • compl_menu : gpdma_sleep.c , flash_2_ram.c , link_list.c , gpdma_r2r_test.c
  • complete : spi_interrupt_test.c , ssp_slave.c , i2c_interrupt_test.c , sc16is750_int.c
  • complete_M : i2c_master_slave_int_test.c , ti_test.c
  • complete_S : i2c_master_slave_int_test.c , ti_test.c
  • CONF_DVICE : usbreg.h
  • CopyFromFrame_EMAC() : EMAC.c , EMAC.h
  • CopyToFrame_EMAC() : EMAC.h , EMAC.c
  • CoreDebug : core_cm3.h
  • CoreDebug_BASE : core_cm3.h
  • CoreDebug_DCRSR_REGSEL_Msk : core_cm3.h
  • CoreDebug_DCRSR_REGSEL_Pos : core_cm3.h
  • CoreDebug_DCRSR_REGWnR_Msk : core_cm3.h
  • CoreDebug_DCRSR_REGWnR_Pos : core_cm3.h
  • CoreDebug_DEMCR_MON_EN_Msk : core_cm3.h
  • CoreDebug_DEMCR_MON_EN_Pos : core_cm3.h
  • CoreDebug_DEMCR_MON_PEND_Msk : core_cm3.h
  • CoreDebug_DEMCR_MON_PEND_Pos : core_cm3.h
  • CoreDebug_DEMCR_MON_REQ_Msk : core_cm3.h
  • CoreDebug_DEMCR_MON_REQ_Pos : core_cm3.h
  • CoreDebug_DEMCR_MON_STEP_Msk : core_cm3.h
  • CoreDebug_DEMCR_MON_STEP_Pos : core_cm3.h
  • CoreDebug_DEMCR_TRCENA_Msk : core_cm3.h
  • CoreDebug_DEMCR_TRCENA_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_BUSERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_BUSERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_CHKERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_CHKERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_CORERESET_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_CORERESET_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_HARDERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_HARDERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_INTERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_INTERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_MMERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_MMERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_NOCPERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_NOCPERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_STATERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_STATERR_Pos : core_cm3.h
  • CoreDebug_DHCSR_C_DEBUGEN_Msk : core_cm3.h
  • CoreDebug_DHCSR_C_DEBUGEN_Pos : core_cm3.h
  • CoreDebug_DHCSR_C_HALT_Msk : core_cm3.h
  • CoreDebug_DHCSR_C_HALT_Pos : core_cm3.h
  • CoreDebug_DHCSR_C_MASKINTS_Msk : core_cm3.h
  • CoreDebug_DHCSR_C_MASKINTS_Pos : core_cm3.h
  • CoreDebug_DHCSR_C_SNAPSTALL_Msk : core_cm3.h
  • CoreDebug_DHCSR_C_SNAPSTALL_Pos : core_cm3.h
  • CoreDebug_DHCSR_C_STEP_Msk : core_cm3.h
  • CoreDebug_DHCSR_C_STEP_Pos : core_cm3.h
  • CoreDebug_DHCSR_DBGKEY_Msk : core_cm3.h
  • CoreDebug_DHCSR_DBGKEY_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_HALT_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_HALT_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_LOCKUP_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_LOCKUP_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_REGRDY_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_REGRDY_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_RESET_ST_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_RESET_ST_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_RETIRE_ST_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_RETIRE_ST_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_SLEEP_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_SLEEP_Pos : core_cm3.h
  • cosOutput : arm_sin_cos_example_f32.c
  • cosSquareOutput : arm_sin_cos_example_f32.c
  • count : freqmeasure.c , i2c_monitor.c
  • COUNT_MODE : qei_test_velo.c
  • CR : Serial.c
  • crc32_add() : crc32.c , crc32.h
  • crc32_bfr() : crc32.h , crc32.c
  • crc32_end() : crc32.h , crc32.c
  • crc32_init() : crc32.c , crc32.h
  • crc_7() : spi_sdcard.c
  • crc_7final() : spi_sdcard.c
  • CriticalSecCntr : lcdtest.c
  • CS_Force() : spi_master.c , sc16is750_int.c , sc16is750_polling.c , spi_interrupt_test.c , spi_polling_test.c , spi_sdcard.c
  • CS_Init() : spi_sdcard.c , spi_polling_test.c , spi_interrupt_test.c , sc16is750_int.c , spi_master.c , sc16is750_polling.c
  • CS_PIN_NUM : sc16is750_int.c , spi_loopback_test.c , spi_interrupt_test.c , spi_sdcard.c , spi_master.c , sc16is750_polling.c , spi_polling_test.c
  • CS_PORT_NUM : sc16is750_polling.c , spi_polling_test.c , sc16is750_int.c , spi_interrupt_test.c , spi_sdcard.c , spi_loopback_test.c , spi_master.c
  • CSW : mscuser.c
  • CSW_CMD_FAILED : msc.h
  • CSW_CMD_PASSED : msc.h
  • CSW_PHASE_ERROR : msc.h
  • CTRL_RD_EN : usbreg.h
  • CTRL_WR_EN : usbreg.h
  • Cur_State : vt_relocation.c , systick_stclk.c , 10ms_base.c
  • Cyan : GLCD.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- d -

  • DAC_BIAS_EN : lpc17xx_dac.h
  • DAC_CCNT_VALUE : lpc17xx_dac.h
  • DAC_CNT_ENA : lpc17xx_dac.h
  • DAC_ConfigDAConverterControl() : lpc17xx_dac.h
  • DAC_CURRENT_OPT : lpc17xx_dac.h
  • DAC_DACCTRL_MASK : lpc17xx_dac.h
  • DAC_DBLBUF_ENA : lpc17xx_dac.h
  • DAC_DMA_ENA : lpc17xx_dac.h
  • DAC_GENERATE_ESCALATOR : dac_wave_generate.c
  • DAC_GENERATE_NONE : dac_wave_generate.c
  • DAC_GENERATE_SINE : dac_wave_generate.c
  • DAC_GENERATE_TRIANGLE : dac_wave_generate.c
  • DAC_Init() : lpc17xx_dac.h
  • DAC_MAX_CURRENT_350uA : lpc17xx_dac.h
  • DAC_MAX_CURRENT_700uA : lpc17xx_dac.h
  • DAC_SetBias() : lpc17xx_dac.h
  • DAC_SetDMATimeOut() : lpc17xx_dac.h
  • DAC_UpdateValue() : lpc17xx_dac.h
  • DAC_VALUE : lpc17xx_dac.h
  • DarkCyan : GLCD.h
  • DarkGreen : GLCD.h
  • DarkGrey : GLCD.h
  • DAT_CLR_BUF : usbreg.h
  • DAT_GET_DEV_STAT : usbreg.h
  • DAT_GET_ERR_CODE : usbreg.h
  • DAT_RD_ERR_STAT : usbreg.h
  • DAT_RD_FRAME : usbreg.h
  • DAT_RD_TEST : usbreg.h
  • DAT_SEL_EP : usbreg.h
  • DAT_SEL_EP_CLRI : usbreg.h
  • DAT_WR_BYTE : usbreg.h
  • data : i2s_two_kit.c
  • DATA_FRAME : lpc17xx_can.h
  • DATA_FREQ : usbaudio.h
  • DATA_OFS_MASK : tcpip.h
  • DataBuf : usbdmain.c , usbaudio.h
  • DataIn : usbaudio.h , usbdmain.c
  • DataInFormat() : mscuser.c
  • DataInTransfer() : mscuser.c
  • DataOut : usbaudio.h , usbdmain.c
  • DataRun : usbaudio.h , usbdmain.c
  • DATCTR : drv_glcd.h
  • DATCTR_Data_t : drv_glcd.h
  • DatLen_M : microwire_test.c , ti_test.c
  • DatLen_S : microwire_test.c , ti_test.c
  • DB : EMAC.c , tcpip.c , emactest.c , emac.c , main.c
  • db : EMAC.c , emac.c
  • db_ : tcpip.c , emactest.c
  • DC_MODE_TEST : mcpwm_simple.c
  • DD_ISO_ADR : usbhw.h
  • DD_ISO_CNT : usbhw.h
  • DD_ISO_SZ : usbhw.h
  • DD_NISO_ADR : usbhw.h
  • DD_NISO_CNT : usbhw.h
  • DD_NISO_SZ : usbhw.h
  • DD_SZ : usbhw.h
  • dDataLength : msc.h
  • dDataResidue : msc.h
  • DEBUG : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • debug_frmwrk_init() : debug_frmwrk.c , debug_frmwrk.h
  • DEBUG_PRINTF : uip.c
  • DEBUG_UART_PORT : debug_frmwrk.h
  • DebugMonitor_IRQn : LPC17xx.h
  • DEF_BACKGND_COLOUR : drv_glcd.h
  • DEF_FONT_COLOUR : drv_glcd.h
  • DEF_X_LEFT : drv_glcd.h
  • DEF_X_RIGHT : drv_glcd.h
  • DEF_Y_DOWN : drv_glcd.h
  • DEF_Y_UP : drv_glcd.h
  • DEFAULT_TTL : tcpip.h
  • delay() : gpio_int.c , nvic_priority.c , extint_sleep.c
  • Delay() : LedBlinky.c
  • DELAY_2N : GLCD_SPI_LPC1700.c
  • DELTA : arm_convolution_example_f32.c , arm_dotproduct_example_f32.c , arm_sin_cos_example_f32.c , arm_variance_example_f32.c
  • DELTA_COEFF : arm_signal_converge_example_f32.c
  • DELTA_ERROR : arm_signal_converge_example_f32.c
  • DELTA_Q15 : arm_math.h
  • DELTA_Q31 : arm_math.h
  • DescriptorList : hid.h
  • DEV_ADDR_MASK : usbreg.h
  • DEV_CON : usbreg.h
  • DEV_CON_CH : usbreg.h
  • DEV_EN : usbreg.h
  • DEV_RST : usbreg.h
  • DEV_STAT_INT : usbreg.h
  • DEV_SUS : usbreg.h
  • DEV_SUS_CH : usbreg.h
  • DHCP_HLEN_ETHERNET : dhcpc.c
  • DHCP_HTYPE_ETHERNET : dhcpc.c
  • DHCP_MSG_LEN : dhcpc.c
  • DHCP_OPTION_DNS_SERVER : dhcpc.c
  • DHCP_OPTION_END : dhcpc.c
  • DHCP_OPTION_LEASE_TIME : dhcpc.c
  • DHCP_OPTION_MSG_TYPE : dhcpc.c
  • DHCP_OPTION_REQ_IPADDR : dhcpc.c
  • DHCP_OPTION_REQ_LIST : dhcpc.c
  • DHCP_OPTION_ROUTER : dhcpc.c
  • DHCP_OPTION_SERVER_ID : dhcpc.c
  • DHCP_OPTION_SUBNET_MASK : dhcpc.c
  • DHCP_REPLY : dhcpc.c
  • DHCP_REQUEST : dhcpc.c
  • DHCPACK : dhcpc.c
  • dhcpc_appcall() : dhcpc.h
  • DHCPC_CLIENT_PORT : dhcpc.c
  • dhcpc_configured() : dhcpc.h
  • dhcpc_init() : dhcpc.h
  • dhcpc_request() : dhcpc.h
  • DHCPC_SERVER_PORT : dhcpc.c
  • DHCPDECLINE : dhcpc.c
  • DHCPDISCOVER : dhcpc.c
  • DHCPNAK : dhcpc.c
  • DHCPOFFER : dhcpc.c
  • DHCPRELEASE : dhcpc.c
  • DHCPREQUEST : dhcpc.c
  • Dir : usb.h
  • DISABLE : lpc_types.h
  • DISCTR : drv_glcd.h
  • DiskImage : memory.h , DiskImg.c
  • DISP_TIME : qei_test_velo.c
  • DISPOFF : drv_glcd.h
  • DISPON : drv_glcd.h
  • Dly100us() : drv_glcd.h , lcdtest.c
  • DMA_BUF_ADR : usbhw.h
  • DMA_BUF_SZ : usbhw.h
  • DMA_DATA_SIZE : ssp_dma.c
  • DMA_DST : gpdma_sleep.c , i2s_dma_test.c
  • dma_dst : ssp_dma.c
  • DMA_DST : gpdma_r2r_test.c
  • DMA_IRQHandler() : ssp_dma.c , i2s_dma_test.c , gpdma_sleep.c , flash_2_ram.c , uart_dma_test.c , adc_dma_test.c , gpdma_r2r_test.c , dac_dma.c , link_list.c
  • DMA_IRQn : LPC17xx.h
  • DMA_SIZE : link_list.c , dac_wave_generate.c , dac_dma.c , adc_burst_test.c , flash_2_ram.c , i2s_dma_test.c , gpdma_sleep.c , gpdma_r2r_test.c , adc_dma_test.c , dac_sinewave_test.c
  • DMA_SIZE_SINE : dac_wave_generate.c
  • DMA_SRC : gpdma_sleep.c , i2s_dma_test.c , gpdma_r2r_test.c
  • dma_src : ssp_dma.c
  • DMADest_Buffer : link_list.c , flash_2_ram.c
  • DMASrc_Buffer : flash_2_ram.c
  • DNS_FLAG1_AUTHORATIVE : resolv.c
  • DNS_FLAG1_OPCODE_INVERSE : resolv.c
  • DNS_FLAG1_OPCODE_STANDARD : resolv.c
  • DNS_FLAG1_OPCODE_STATUS : resolv.c
  • DNS_FLAG1_RD : resolv.c
  • DNS_FLAG1_RESPONSE : resolv.c
  • DNS_FLAG1_TRUNC : resolv.c
  • DNS_FLAG2_ERR_MASK : resolv.c
  • DNS_FLAG2_ERR_NAME : resolv.c
  • DNS_FLAG2_ERR_NONE : resolv.c
  • DNS_FLAG2_RA : resolv.c
  • do_crc_behav() : crc32.h
  • doBitReverse : arm_fft_bin_example_f32.c
  • done : freqmeasure.c , i2c_monitor.c
  • DoNetworkStuff() : tcpip.h , tcpip.c
  • dSignature : msc.h
  • dTag : msc.h
  • dummy : i2s_irq_test.c , i2s_mclk.c
  • DummyReadFrame_EMAC() : EMAC.h , EMAC.c
  • dwDTERate : cdc.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
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  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
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  • n
  • o
  • p
  • q
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  • t
  • u
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  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- e -

  • EFF_GPR_Table : can_test_aflut.c
  • EFF_Table : can_test_aflut.c
  • EINT0_IRQHandler() : nvic_priority.c
  • EINT0_IRQn : LPC17xx.h
  • EINT1_IRQn : LPC17xx.h
  • EINT2_IRQn : LPC17xx.h
  • EINT3_IRQHandler() : gpio_int.c , nvic_priority.c , adc_burst_test.c
  • EINT3_IRQn : LPC17xx.h
  • EMAC_ADDR0 : emac.h
  • EMAC_ADDR1 : emac.h
  • EMAC_ADDR12 : emactest.c
  • EMAC_ADDR2 : emac.h
  • EMAC_ADDR3 : emac.h
  • EMAC_ADDR34 : emactest.c
  • EMAC_ADDR4 : emac.h
  • EMAC_ADDR5 : emac.h
  • EMAC_ADDR56 : emactest.c
  • EMAC_CheckPHYStatus() : lpc17xx_emac.h
  • EMAC_CheckReceiveDataStatus() : lpc17xx_emac.h
  • EMAC_CheckReceiveIndex() : lpc17xx_emac.h
  • EMAC_CheckTransmitIndex() : lpc17xx_emac.h
  • EMAC_clkdiv : lpc17xx_emac.c
  • EMAC_CLRT_COLL : lpc17xx_emac.h
  • EMAC_CLRT_DEF : lpc17xx_emac.h
  • EMAC_CLRT_MAX_RETX : lpc17xx_emac.h
  • EMAC_CR_FULL_DUP : lpc17xx_emac.h
  • EMAC_CR_PASS_RUNT_FRM : lpc17xx_emac.h
  • EMAC_CR_PASS_RX_FILT : lpc17xx_emac.h
  • EMAC_CR_REG_RES : lpc17xx_emac.h
  • EMAC_CR_RMII : lpc17xx_emac.h
  • EMAC_CR_RX_EN : lpc17xx_emac.h
  • EMAC_CR_RX_RES : lpc17xx_emac.h
  • EMAC_CR_TX_EN : lpc17xx_emac.h
  • EMAC_CR_TX_FLOW_CTRL : lpc17xx_emac.h
  • EMAC_CR_TX_RES : lpc17xx_emac.h
  • EMAC_DEF_ADR : lpc17xx_emac.h
  • EMAC_DeInit() : lpc17xx_emac.h
  • EMAC_DP83848C_ID : lpc17xx_emac.h
  • EMAC_DST_ADDR12 : emactest.c
  • EMAC_DST_ADDR34 : emactest.c
  • EMAC_DST_ADDR56 : emactest.c
  • EMAC_ETH_MAX_FLEN : lpc17xx_emac.h
  • EMAC_FCC_MIRR_CNT : lpc17xx_emac.h
  • EMAC_FCC_PAUSE_TIM : lpc17xx_emac.h
  • EMAC_FCS_MIRR_CNT : lpc17xx_emac.h
  • EMAC_GetReceiveDataSize() : lpc17xx_emac.h
  • EMAC_GetWoLStatus() : lpc17xx_emac.h
  • EMAC_Init() : lpc17xx_emac.h
  • EMAC_INT_RX_DONE : lpc17xx_emac.h
  • EMAC_INT_RX_ERR : lpc17xx_emac.h
  • EMAC_INT_RX_FIN : lpc17xx_emac.h
  • EMAC_INT_RX_OVERRUN : lpc17xx_emac.h
  • EMAC_INT_SOFT_INT : lpc17xx_emac.h
  • EMAC_INT_TX_DONE : lpc17xx_emac.h
  • EMAC_INT_TX_ERR : lpc17xx_emac.h
  • EMAC_INT_TX_FIN : lpc17xx_emac.h
  • EMAC_INT_TX_UNDERRUN : lpc17xx_emac.h
  • EMAC_INT_WAKEUP : lpc17xx_emac.h
  • EMAC_IntCmd() : lpc17xx_emac.h
  • EMAC_IntGetStatus() : lpc17xx_emac.h
  • EMAC_IPGR_NBBIPG_P1 : lpc17xx_emac.h
  • EMAC_IPGR_NBBIPG_P2 : lpc17xx_emac.h
  • EMAC_IPGR_P1_DEF : lpc17xx_emac.h
  • EMAC_IPGR_P2_DEF : lpc17xx_emac.h
  • EMAC_IPGT_BBIPG : lpc17xx_emac.h
  • EMAC_IPGT_FULL_DUP : lpc17xx_emac.h
  • EMAC_IPGT_HALF_DUP : lpc17xx_emac.h
  • EMAC_MAC1_LOOPB : lpc17xx_emac.h
  • EMAC_MAC1_PASS_ALL : lpc17xx_emac.h
  • EMAC_MAC1_REC_EN : lpc17xx_emac.h
  • EMAC_MAC1_RES_MCS_RX : lpc17xx_emac.h
  • EMAC_MAC1_RES_MCS_TX : lpc17xx_emac.h
  • EMAC_MAC1_RES_RX : lpc17xx_emac.h
  • EMAC_MAC1_RES_TX : lpc17xx_emac.h
  • EMAC_MAC1_RX_FLOWC : lpc17xx_emac.h
  • EMAC_MAC1_SIM_RES : lpc17xx_emac.h
  • EMAC_MAC1_SOFT_RES : lpc17xx_emac.h
  • EMAC_MAC1_TX_FLOWC : lpc17xx_emac.h
  • EMAC_MAC2_ADET_PAD_EN : lpc17xx_emac.h
  • EMAC_MAC2_BACK_PRESSURE : lpc17xx_emac.h
  • EMAC_MAC2_CRC_EN : lpc17xx_emac.h
  • EMAC_MAC2_DLY_CRC : lpc17xx_emac.h
  • EMAC_MAC2_EXCESS_DEF : lpc17xx_emac.h
  • EMAC_MAC2_FRM_LEN_CHK : lpc17xx_emac.h
  • EMAC_MAC2_FULL_DUP : lpc17xx_emac.h
  • EMAC_MAC2_HUGE_FRM_EN : lpc17xx_emac.h
  • EMAC_MAC2_LPREAM_ENF : lpc17xx_emac.h
  • EMAC_MAC2_NO_BACKOFF : lpc17xx_emac.h
  • EMAC_MAC2_PAD_EN : lpc17xx_emac.h
  • EMAC_MAC2_PPREAM_ENF : lpc17xx_emac.h
  • EMAC_MAC2_VLAN_PAD_EN : lpc17xx_emac.h
  • EMAC_MADR_PHY_ADR : lpc17xx_emac.h
  • EMAC_MADR_REG_ADR : lpc17xx_emac.h
  • EMAC_MAX_PACKET_SIZE : emac.h
  • EMAC_MAXF_MAXFRMLEN : lpc17xx_emac.h
  • EMAC_MCFG_CLK_SEL : lpc17xx_emac.h
  • EMAC_MCFG_MII_MAXCLK : lpc17xx_emac.h
  • EMAC_MCFG_RES_MII : lpc17xx_emac.h
  • EMAC_MCFG_SCAN_INC : lpc17xx_emac.h
  • EMAC_MCFG_SUPP_PREAM : lpc17xx_emac.h
  • EMAC_MCMD_READ : lpc17xx_emac.h
  • EMAC_MCMD_SCAN : lpc17xx_emac.h
  • EMAC_MII_RD_TOUT : lpc17xx_emac.h
  • EMAC_MII_WR_TOUT : lpc17xx_emac.h
  • EMAC_MIND_BUSY : lpc17xx_emac.h
  • EMAC_MIND_MII_LINK_FAIL : lpc17xx_emac.h
  • EMAC_MIND_NOT_VAL : lpc17xx_emac.h
  • EMAC_MIND_SCAN : lpc17xx_emac.h
  • EMAC_MODE_100M_FULL : lpc17xx_emac.h
  • EMAC_MODE_100M_HALF : lpc17xx_emac.h
  • EMAC_MODE_10M_FULL : lpc17xx_emac.h
  • EMAC_MODE_10M_HALF : lpc17xx_emac.h
  • EMAC_MODE_AUTO : lpc17xx_emac.h
  • EMAC_MRDD_DATA : lpc17xx_emac.h
  • EMAC_MWTD_DATA : lpc17xx_emac.h
  • EMAC_NUM_RX_FRAG : lpc17xx_emac.h
  • EMAC_NUM_TX_FRAG : lpc17xx_emac.h
  • EMAC_OLD_EMAC_MODULE_ID : lpc17xx_emac.h
  • EMAC_PD_POWER_DOWN : lpc17xx_emac.h
  • EMAC_PHY_AUTO_NEG : lpc17xx_emac.h
  • EMAC_PHY_BMCR_AN : lpc17xx_emac.h
  • EMAC_PHY_BMCR_DUPLEX : lpc17xx_emac.h
  • EMAC_PHY_BMCR_ISOLATE : lpc17xx_emac.h
  • EMAC_PHY_BMCR_LOOPBACK : lpc17xx_emac.h
  • EMAC_PHY_BMCR_POWERDOWN : lpc17xx_emac.h
  • EMAC_PHY_BMCR_RE_AN : lpc17xx_emac.h
  • EMAC_PHY_BMCR_RESET : lpc17xx_emac.h
  • EMAC_PHY_BMCR_SPEED_SEL : lpc17xx_emac.h
  • EMAC_PHY_BMSR_100BE_T4 : lpc17xx_emac.h
  • EMAC_PHY_BMSR_100TX_FULL : lpc17xx_emac.h
  • EMAC_PHY_BMSR_100TX_HALF : lpc17xx_emac.h
  • EMAC_PHY_BMSR_10BE_FULL : lpc17xx_emac.h
  • EMAC_PHY_BMSR_10BE_HALF : lpc17xx_emac.h
  • EMAC_PHY_BMSR_AUTO_DONE : lpc17xx_emac.h
  • EMAC_PHY_BMSR_LINK_ESTABLISHED : lpc17xx_emac.h
  • EMAC_PHY_BMSR_LINK_STATUS : lpc17xx_emac.h
  • EMAC_PHY_BMSR_NO_AUTO : lpc17xx_emac.h
  • EMAC_PHY_BMSR_NOPREAM : lpc17xx_emac.h
  • EMAC_PHY_BMSR_REMOTE_FAULT : lpc17xx_emac.h
  • EMAC_PHY_FULLD_100M : lpc17xx_emac.h
  • EMAC_PHY_FULLD_10M : lpc17xx_emac.h
  • EMAC_PHY_HALFD_100M : lpc17xx_emac.h
  • EMAC_PHY_HALFD_10M : lpc17xx_emac.h
  • EMAC_PHY_REG_10BTSCR : lpc17xx_emac.h
  • EMAC_PHY_REG_ANAR : lpc17xx_emac.h
  • EMAC_PHY_REG_ANER : lpc17xx_emac.h
  • EMAC_PHY_REG_ANLPAR : lpc17xx_emac.h
  • EMAC_PHY_REG_ANNPTR : lpc17xx_emac.h
  • EMAC_PHY_REG_BMCR : lpc17xx_emac.h
  • EMAC_PHY_REG_BMSR : lpc17xx_emac.h
  • EMAC_PHY_REG_CDCTRL1 : lpc17xx_emac.h
  • EMAC_PHY_REG_EDCR : lpc17xx_emac.h
  • EMAC_PHY_REG_FCSCR : lpc17xx_emac.h
  • EMAC_PHY_REG_IDR1 : lpc17xx_emac.h
  • EMAC_PHY_REG_IDR2 : lpc17xx_emac.h
  • EMAC_PHY_REG_LEDCR : lpc17xx_emac.h
  • EMAC_PHY_REG_LPNPA : lpc17xx_emac.h
  • EMAC_PHY_REG_MICR : lpc17xx_emac.h
  • EMAC_PHY_REG_MISR : lpc17xx_emac.h
  • EMAC_PHY_REG_PCSR : lpc17xx_emac.h
  • EMAC_PHY_REG_PHYCR : lpc17xx_emac.h
  • EMAC_PHY_REG_RBR : lpc17xx_emac.h
  • EMAC_PHY_REG_RECR : lpc17xx_emac.h
  • EMAC_PHY_REG_STS : lpc17xx_emac.h
  • EMAC_PHY_RESP_TOUT : lpc17xx_emac.h
  • EMAC_PHY_SR_100_SPEED : lpc17xx_emac.h
  • EMAC_PHY_SR_AUTO_DONE : lpc17xx_emac.h
  • EMAC_PHY_SR_DUP : lpc17xx_emac.h
  • EMAC_PHY_SR_FULL_DUP : lpc17xx_emac.h
  • EMAC_PHY_SR_JABBER : lpc17xx_emac.h
  • EMAC_PHY_SR_LINK : lpc17xx_emac.h
  • EMAC_PHY_SR_LOOPBACK : lpc17xx_emac.h
  • EMAC_PHY_SR_REMOTE_FAULT : lpc17xx_emac.h
  • EMAC_PHY_SR_SPEED : lpc17xx_emac.h
  • EMAC_PHY_STAT_DUP : lpc17xx_emac.h
  • EMAC_PHY_STAT_LINK : lpc17xx_emac.h
  • EMAC_PHY_STAT_SPEED : lpc17xx_emac.h
  • EMAC_RCTRL_INT : lpc17xx_emac.h
  • EMAC_RCTRL_SIZE : lpc17xx_emac.h
  • EMAC_ReadPacketBuffer() : lpc17xx_emac.h
  • EMAC_RFC_BCAST_EN : lpc17xx_emac.h
  • EMAC_RFC_MAGP_WOL_EN : lpc17xx_emac.h
  • EMAC_RFC_MCAST_EN : lpc17xx_emac.h
  • EMAC_RFC_MCAST_HASH_EN : lpc17xx_emac.h
  • EMAC_RFC_PERFECT_EN : lpc17xx_emac.h
  • EMAC_RFC_PFILT_WOL_EN : lpc17xx_emac.h
  • EMAC_RFC_UCAST_EN : lpc17xx_emac.h
  • EMAC_RFC_UCAST_HASH_EN : lpc17xx_emac.h
  • EMAC_RHASH_DA : lpc17xx_emac.h
  • EMAC_RHASH_SA : lpc17xx_emac.h
  • EMAC_RINFO_ALIGN_ERR : lpc17xx_emac.h
  • EMAC_RINFO_BCAST : lpc17xx_emac.h
  • EMAC_RINFO_CRC_ERR : lpc17xx_emac.h
  • EMAC_RINFO_CTRL_FRAME : lpc17xx_emac.h
  • EMAC_RINFO_ERR : lpc17xx_emac.h
  • EMAC_RINFO_ERR_MASK : lpc17xx_emac.h
  • EMAC_RINFO_FAIL_FILT : lpc17xx_emac.h
  • EMAC_RINFO_LAST_FLAG : lpc17xx_emac.h
  • EMAC_RINFO_LEN_ERR : lpc17xx_emac.h
  • EMAC_RINFO_MCAST : lpc17xx_emac.h
  • EMAC_RINFO_NO_DESCR : lpc17xx_emac.h
  • EMAC_RINFO_OVERRUN : lpc17xx_emac.h
  • EMAC_RINFO_RANGE_ERR : lpc17xx_emac.h
  • EMAC_RINFO_SIZE : lpc17xx_emac.h
  • EMAC_RINFO_SYM_ERR : lpc17xx_emac.h
  • EMAC_RINFO_VLAN : lpc17xx_emac.h
  • EMAC_RSV_BCAST : lpc17xx_emac.h
  • EMAC_RSV_BYTE_CNT : lpc17xx_emac.h
  • EMAC_RSV_CARR_SEEN : lpc17xx_emac.h
  • EMAC_RSV_CRC_ERR : lpc17xx_emac.h
  • EMAC_RSV_CTRL_FRAME : lpc17xx_emac.h
  • EMAC_RSV_DRIB_NIBB : lpc17xx_emac.h
  • EMAC_RSV_LEN_CHKERR : lpc17xx_emac.h
  • EMAC_RSV_LEN_OUTRNG : lpc17xx_emac.h
  • EMAC_RSV_MCAST : lpc17xx_emac.h
  • EMAC_RSV_PAUSE : lpc17xx_emac.h
  • EMAC_RSV_PKT_IGNORED : lpc17xx_emac.h
  • EMAC_RSV_REC_CODEV : lpc17xx_emac.h
  • EMAC_RSV_REC_OK : lpc17xx_emac.h
  • EMAC_RSV_RXDV_SEEN : lpc17xx_emac.h
  • EMAC_RSV_UNSUPP_OPC : lpc17xx_emac.h
  • EMAC_RSV_VLAN : lpc17xx_emac.h
  • EMAC_SetFilterMode() : lpc17xx_emac.h
  • EMAC_SetHashFilter() : lpc17xx_emac.h
  • EMAC_SetPHYMode() : lpc17xx_emac.h
  • EMAC_SR_RX_EN : lpc17xx_emac.h
  • EMAC_SR_TX_EN : lpc17xx_emac.h
  • EMAC_SUPP_SPEED : lpc17xx_emac.h
  • EMAC_TCTRL_CRC : lpc17xx_emac.h
  • EMAC_TCTRL_HUGE : lpc17xx_emac.h
  • EMAC_TCTRL_INT : lpc17xx_emac.h
  • EMAC_TCTRL_LAST : lpc17xx_emac.h
  • EMAC_TCTRL_OVERRIDE : lpc17xx_emac.h
  • EMAC_TCTRL_PAD : lpc17xx_emac.h
  • EMAC_TCTRL_SIZE : lpc17xx_emac.h
  • EMAC_TEST_SHCUT_PQUANTA : lpc17xx_emac.h
  • EMAC_TEST_TST_BACKP : lpc17xx_emac.h
  • EMAC_TEST_TST_PAUSE : lpc17xx_emac.h
  • EMAC_TINFO_COL_CNT : lpc17xx_emac.h
  • EMAC_TINFO_DEFER : lpc17xx_emac.h
  • EMAC_TINFO_ERR : lpc17xx_emac.h
  • EMAC_TINFO_EXCESS_COL : lpc17xx_emac.h
  • EMAC_TINFO_EXCESS_DEF : lpc17xx_emac.h
  • EMAC_TINFO_LATE_COL : lpc17xx_emac.h
  • EMAC_TINFO_NO_DESCR : lpc17xx_emac.h
  • EMAC_TINFO_UNDERRUN : lpc17xx_emac.h
  • EMAC_TSV0_BACK_PRESS : lpc17xx_emac.h
  • EMAC_TSV0_BCAST : lpc17xx_emac.h
  • EMAC_TSV0_BYTES : lpc17xx_emac.h
  • EMAC_TSV0_CRC_ERR : lpc17xx_emac.h
  • EMAC_TSV0_CTRL_FRAME : lpc17xx_emac.h
  • EMAC_TSV0_DONE : lpc17xx_emac.h
  • EMAC_TSV0_EXC_COLL : lpc17xx_emac.h
  • EMAC_TSV0_EXC_DEFER : lpc17xx_emac.h
  • EMAC_TSV0_GIANT : lpc17xx_emac.h
  • EMAC_TSV0_LATE_COLL : lpc17xx_emac.h
  • EMAC_TSV0_LEN_CHKERR : lpc17xx_emac.h
  • EMAC_TSV0_LEN_OUTRNG : lpc17xx_emac.h
  • EMAC_TSV0_MCAST : lpc17xx_emac.h
  • EMAC_TSV0_PAUSE : lpc17xx_emac.h
  • EMAC_TSV0_PKT_DEFER : lpc17xx_emac.h
  • EMAC_TSV0_UNDERRUN : lpc17xx_emac.h
  • EMAC_TSV0_VLAN : lpc17xx_emac.h
  • EMAC_TSV1_BYTE_CNT : lpc17xx_emac.h
  • EMAC_TSV1_COLL_CNT : lpc17xx_emac.h
  • EMAC_TX_FRAME_TOUT : lpc17xx_emac.h
  • EMAC_UpdatePHYStatus() : lpc17xx_emac.h
  • EMAC_UpdateRxConsumeIndex() : lpc17xx_emac.h
  • EMAC_UpdateTxProduceIndex() : lpc17xx_emac.h
  • EMAC_WOL_BCAST : lpc17xx_emac.h
  • EMAC_WOL_BITMASK : lpc17xx_emac.h
  • EMAC_WOL_MAG_PACKET : lpc17xx_emac.h
  • EMAC_WOL_MCAST : lpc17xx_emac.h
  • EMAC_WOL_MCAST_HASH : lpc17xx_emac.h
  • EMAC_WOL_PERFECT : lpc17xx_emac.h
  • EMAC_WOL_RX_FILTER : lpc17xx_emac.h
  • EMAC_WOL_UCAST : lpc17xx_emac.h
  • EMAC_WOL_UCAST_HASH : lpc17xx_emac.h
  • EMAC_WritePacketBuffer() : lpc17xx_emac.h
  • ENABLE : lpc_types.h
  • ENABLE_HASH : emactest.c
  • ENABLE_WOL : emactest.c
  • ENC_RES : qei_test_velo.c
  • EndReadFrame() : EMAC.c , EMAC.h
  • ENET_DMA_DESC_NUMB : emac.h
  • ENET_IRQHandler() : emactest.c
  • ENET_IRQn : LPC17xx.h
  • ENTRIES : uip-neighbor.c
  • EOT_INT : usbreg.h
  • EP0Buf : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • EP0Data : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • EP_FAST_INT : usbreg.h
  • EP_MSK_BULK : usbhw.c
  • EP_MSK_CTRL : usbhw.c
  • EP_MSK_INT : usbhw.c
  • EP_MSK_ISO : usbhw.c
  • EP_RLZED_INT : usbreg.h
  • EP_SEL_B_1_FULL : usbreg.h
  • EP_SEL_B_2_FULL : usbreg.h
  • EP_SEL_EPN : usbreg.h
  • EP_SEL_F : usbreg.h
  • EP_SEL_PO : usbreg.h
  • EP_SEL_ST : usbreg.h
  • EP_SEL_STP : usbreg.h
  • EP_SLOW_INT : usbreg.h
  • EP_STAT_CND_ST : usbreg.h
  • EP_STAT_DA : usbreg.h
  • EP_STAT_RF_MO : usbreg.h
  • EP_STAT_ST : usbreg.h
  • EPAdr() : usbhw.c
  • EPWRIN : drv_glcd.h
  • EPWROUT : drv_glcd.h
  • ERR_B_OVRN : usbreg.h
  • ERR_BTSTF : usbreg.h
  • ERR_DCRC : usbreg.h
  • ERR_EA : usbreg.h
  • ERR_EC_MASK : usbreg.h
  • ERR_EOP : usbreg.h
  • ERR_INT : usbreg.h
  • err_menu : flash_2_ram.c , link_list.c , gpdma_sleep.c , gpdma_r2r_test.c
  • ERR_PID : usbreg.h
  • err_signal : arm_signal_converge_example_f32.c
  • ERR_TGL : usbreg.h
  • ERR_TIMOUT : usbreg.h
  • ERR_UEPKT : usbreg.h
  • ERROR : lpc_types.h
  • Error_Loop() : spi_slave.c , i2c_interrupt_test.c , link_list.c , spi_master.c , ti_test.c , ssp_dma.c , i2c_polling_test.c , gpdma_r2r_test.c , ssp_master.c , spi_loopback_test.c , pca8581_test.c , gpdma_sleep.c , flash_2_ram.c , ssp_slave.c , microwire_test.c
  • Error_Loop_M() : i2c_master_slave_int_test.c
  • Error_Loop_S() : i2c_master_slave_int_test.c
  • errOutput : arm_signal_converge_example_f32.c
  • ESTABLISHED : tcpip.h
  • ETH_DA_OFS : tcpip.h
  • ETH_DATA_OFS : tcpip.h
  • ETH_HEADER_SIZE : tcpip.h
  • ETH_SA_OFS : tcpip.h
  • ETH_TYPE_OFS : tcpip.h
  • EXPLICIT_EXTEND_ENTRY : lpc17xx_can.h
  • EXPLICIT_STANDARD_ENTRY : lpc17xx_can.h
  • EXT_ID_FORMAT : lpc17xx_can.h
  • EXTERN : lpc_types.h
  • extern : easyweb.c
  • EXTI_ClearEXTIFlag() : lpc17xx_exti.h
  • EXTI_Config() : lpc17xx_exti.h
  • EXTI_DeInit() : lpc17xx_exti.h
  • EXTI_EINT0 : lpc17xx_exti.h
  • EXTI_EINT0_BIT_MARK : lpc17xx_exti.h
  • EXTI_EINT1 : lpc17xx_exti.h
  • EXTI_EINT1_BIT_MARK : lpc17xx_exti.h
  • EXTI_EINT2 : lpc17xx_exti.h
  • EXTI_EINT2_BIT_MARK : lpc17xx_exti.h
  • EXTI_EINT3 : lpc17xx_exti.h
  • EXTI_EINT3_BIT_MARK : lpc17xx_exti.h
  • EXTI_Init() : lpc17xx_exti.h
  • EXTI_LINE_ENUM : lpc17xx_exti.h
  • EXTI_MODE_EDGE_SENSITIVE : lpc17xx_exti.h
  • EXTI_MODE_ENUM : lpc17xx_exti.h
  • EXTI_MODE_LEVEL_SENSITIVE : lpc17xx_exti.h
  • EXTI_POLARITY_ENUM : lpc17xx_exti.h
  • EXTI_POLARITY_HIGH_ACTIVE_OR_RISING_EDGE : lpc17xx_exti.h
  • EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE : lpc17xx_exti.h
  • EXTI_SetMode() : lpc17xx_exti.h
  • EXTI_SetPolarity() : lpc17xx_exti.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- f -

  • f_err_menu : rs485_master.c , rs485_slave.c
  • FALSE : lpc_types.h
  • FBUF : uip.c
  • FCAN_ReadObj() : lpc17xx_can.h
  • ferror() : Retarget.c
  • fftSize : arm_fft_bin_example_f32.c
  • fgetc() : Retarget.c
  • file_404_html : httpd-fsdata.c
  • file_fade_png : httpd-fsdata.c
  • file_files_shtml : httpd-fsdata.c
  • file_footer_html : httpd-fsdata.c
  • file_header_html : httpd-fsdata.c
  • file_index_html : httpd-fsdata.c
  • file_processes_shtml : httpd-fsdata.c
  • file_stats_shtml : httpd-fsdata.c
  • file_style_css : httpd-fsdata.c
  • file_tcp_shtml : httpd-fsdata.c
  • FIN_TIMEOUT : tcpip.h
  • FIN_WAIT_1 : tcpip.h
  • FIN_WAIT_2 : tcpip.h
  • FIO_ByteClearValue() : lpc17xx_gpio.h
  • FIO_ByteReadValue() : lpc17xx_gpio.h
  • FIO_ByteSetDir() : lpc17xx_gpio.h
  • FIO_ByteSetMask() : lpc17xx_gpio.h
  • FIO_ByteSetValue() : lpc17xx_gpio.h
  • FIO_ClearInt() : lpc17xx_gpio.h
  • FIO_ClearValue() : lpc17xx_gpio.h
  • FIO_GetIntStatus() : lpc17xx_gpio.h
  • FIO_HalfWordClearValue() : lpc17xx_gpio.h
  • FIO_HalfWordReadValue() : lpc17xx_gpio.h
  • FIO_HalfWordSetDir() : lpc17xx_gpio.h
  • FIO_HalfWordSetMask() : lpc17xx_gpio.h
  • FIO_HalfWordSetValue() : lpc17xx_gpio.h
  • FIO_IntCmd() : lpc17xx_gpio.h
  • FIO_ReadValue() : lpc17xx_gpio.h
  • FIO_SetDir() : lpc17xx_gpio.h
  • FIO_SetMask() : lpc17xx_gpio.h
  • FIO_SetValue() : lpc17xx_gpio.h
  • FIRCoeff_f32 : arm_signal_converge_data.c , arm_signal_converge_example_f32.c
  • firCoeffs32 : arm_fir_example_f32.c
  • first_capture : freqmeasure.c
  • firStateF32 : arm_signal_converge_example_f32.c
  • FIX_DUPLEX : emac.h
  • FIX_SPEED : emac.h
  • FlagStatus : lpc_types.h
  • FLASH_SETUP : system_LPC17xx.c
  • FLASHCFG_Val : system_LPC17xx.c
  • float32_t : arm_math.h
  • float64_t : arm_math.h
  • Font_24x16 : Font_24x16.h
  • FontType_t : drv_glcd.h
  • fputc() : Retarget.c
  • FRAME_ARP : tcpip.h
  • FRAME_INT : usbreg.h
  • FRAME_IP : tcpip.h
  • FRM8SEL : drv_glcd.h
  • FRMSEL : drv_glcd.h
  • FULL_DUPLEX : emac.h
  • FULLCAN_ENABLE : lpc17xx_can.c
  • FULLCAN_ENTRY : lpc17xx_can.h
  • FULLCAN_IC0 : lpc17xx_can.h
  • FULLCAN_IC1 : lpc17xx_can.h
  • FullCAN_IC_Type : lpc17xx_can.h
  • FullCAN_Table : can_test_aflut.c
  • FunctionalState : lpc_types.h
  • FW_TIME : uip-fw.c
  • FWCACHE_SIZE : uip-fw.c
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- g -

  • gainDB : arm_graphic_equalizer_example_q31.c
  • GatewayIP : tcpip.h
  • get_potval() : usbdmain.c
  • GetAD7Val() : easyweb.c , easyweb.h
  • GETBIT : spi_sdcard.c
  • getchar() : Serial.c
  • getinput() : arm_signal_converge_example_f32.c
  • GetInReport() : demo.c , demo.h
  • getkey() : Retarget.c , Serial.c
  • GetResponse : easyweb.h
  • GetTempVal() : easyweb.c , easyweb.h
  • GLCD_Backlight() : glcd_ll.c , glcd_ll.h
  • GLCD_Bargraph() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_Bitmap() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_Bmp() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_BOOSTER_ON_DLY : drv_glcd.c
  • GLCD_Clear() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_ClearLn() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_CMD_NUMB : drv_glcd.h
  • GLCD_Cmd_t : drv_glcd.h
  • GLCD_CmdCtrl_t : drv_glcd.h
  • GLCD_CmdDir_t : drv_glcd.h
  • GLCD_DATA : drv_glcd.h
  • GLCD_DEF_CLOCK : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_8_COLOR : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_INV : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_ML : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_MX : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_MY : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_PARTIAL_MODE : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_RGB_ORD : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_V : drv_glcd_cnfg.h
  • GLCD_DEF_WIDTH : drv_glcd_cnfg.h
  • GLCD_DISPLAY_STATE : drv_glcd_cnfg.h
  • GLCD_DisplayChar() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_DisplayString() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_DLY_10US : drv_glcd.c
  • GLCD_DrawChar() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_ERROR : drv_glcd.h
  • GLCD_HORIZONTAL_SIZE : drv_glcd_cnfg.h
  • GLCD_ID_ERROR : drv_glcd.h
  • GLCD_Init() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_INV_CMD : drv_glcd.h
  • GLCD_ISS_0 : drv_glcd.h
  • GLCD_ISS_1 : drv_glcd.h
  • GLCD_ISS_t : drv_glcd.h
  • GLCD_LLInit() : glcd_ll.c , glcd_ll.h
  • GLCD_MANF_ID : drv_glcd.h
  • GLCD_MAX_COTRAST : drv_glcd.h
  • GLCD_MIN_COTRAST : drv_glcd.h
  • GLCD_MOD_ID : drv_glcd.h
  • GLCD_OK : drv_glcd.h
  • GLCD_PowerUpInit() : drv_glcd.c , drv_glcd.h
  • GLCD_print() : drv_glcd.c , drv_glcd.h
  • GLCD_putchar() : drv_glcd.c , drv_glcd.h
  • GLCD_PutPixel() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_READ : drv_glcd.h
  • GLCD_RESET_DLY : drv_glcd.c
  • GLCD_SendCmd() : drv_glcd.c , drv_glcd.h
  • GLCD_SetBackColor() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_SetFont() : drv_glcd.c , drv_glcd.h
  • GLCD_SetReset() : glcd_ll.c , glcd_ll.h
  • GLCD_SetTextColor() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_SetWindow() : drv_glcd.c , drv_glcd.h
  • GLCD_SPI_ChipSelect() : glcd_ll.c , glcd_ll.h
  • GLCD_SPI_Init() : glcd_ll.c , glcd_ll.h
  • GLCD_SPI_ReceiveBlock() : glcd_ll.c , glcd_ll.h
  • GLCD_SPI_SendBlock() : glcd_ll.c , glcd_ll.h
  • GLCD_SPI_SetClockFreq() : glcd_ll.c , glcd_ll.h
  • GLCD_SPI_SetWordWidth() : glcd_ll.c , glcd_ll.h
  • GLCD_SPI_TranserByte() : glcd_ll.c , glcd_ll.h
  • GLCD_Status_t : drv_glcd.h
  • GLCD_TextSetPos() : drv_glcd.c , drv_glcd.h
  • GLCD_TextSetTabSize() : drv_glcd.c , drv_glcd.h
  • GLCD_UNSUPPORTED : drv_glcd.h
  • GLCD_VERTICAL_SIZE : drv_glcd_cnfg.h
  • GLCD_WindowMax() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_WRITE : drv_glcd.h
  • GPDMA_BSIZE_1 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_128 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_16 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_256 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_32 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_4 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_64 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_8 : lpc17xx_gpdma.h
  • GPDMA_ChannelCmd() : lpc17xx_gpdma.h
  • GPDMA_ClearIntPending() : lpc17xx_gpdma.h
  • GPDMA_CONN_ADC : lpc17xx_gpdma.h
  • GPDMA_CONN_DAC : lpc17xx_gpdma.h
  • GPDMA_CONN_I2S_Channel_0 : lpc17xx_gpdma.h
  • GPDMA_CONN_I2S_Channel_1 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT0_0 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT0_1 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT1_0 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT1_1 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT2_0 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT2_1 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT3_0 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT3_1 : lpc17xx_gpdma.h
  • GPDMA_CONN_SSP0_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_SSP0_Tx : lpc17xx_gpdma.h
  • GPDMA_CONN_SSP1_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_SSP1_Tx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART0_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART0_Tx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART1_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART1_Tx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART2_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART2_Tx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART3_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART3_Tx : lpc17xx_gpdma.h
  • GPDMA_DMACConfig_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACConfig_E : lpc17xx_gpdma.h
  • GPDMA_DMACConfig_M : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_A : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_DestPeripheral : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_E : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_H : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_IE : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_ITC : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_L : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_SrcPeripheral : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_TransferType : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_DBSize : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_DI : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_DWidth : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_I : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_Prot1 : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_Prot2 : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_Prot3 : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_SBSize : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_SI : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_SWidth : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_TransferSize : lpc17xx_gpdma.h
  • GPDMA_DMACCxLLI_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACEnbldChns_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACEnbldChns_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACIntErrClr_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACIntErrClr_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACIntErrStat_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACIntErrStat_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACIntStat_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACIntStat_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACIntTCClear_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACIntTCClear_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACIntTCStat_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACIntTCStat_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACRawIntErrStat_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACRawIntErrStat_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACRawIntTCStat_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACRawIntTCStat_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACSoftBReq_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACSoftBReq_Src : lpc17xx_gpdma.h
  • GPDMA_DMACSoftLBReq_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACSoftLBReq_Src : lpc17xx_gpdma.h
  • GPDMA_DMACSoftLSReq_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACSoftLSReq_Src : lpc17xx_gpdma.h
  • GPDMA_DMACSoftSReq_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACSoftSReq_Src : lpc17xx_gpdma.h
  • GPDMA_DMACSync_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACSync_Src : lpc17xx_gpdma.h
  • GPDMA_DMAReqSel_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMAReqSel_Input : lpc17xx_gpdma.h
  • GPDMA_Init() : lpc17xx_gpdma.h
  • GPDMA_IntGetStatus() : lpc17xx_gpdma.h
  • GPDMA_LUTPerAddr : lpc17xx_gpdma.c
  • GPDMA_LUTPerBurst : lpc17xx_gpdma.c
  • GPDMA_LUTPerWid : lpc17xx_gpdma.c
  • GPDMA_REQSEL_TIMER : lpc17xx_gpdma.h
  • GPDMA_REQSEL_UART : lpc17xx_gpdma.h
  • GPDMA_Setup() : lpc17xx_gpdma.h
  • GPDMA_STAT_ENABLED_CH : lpc17xx_gpdma.h
  • GPDMA_STAT_INT : lpc17xx_gpdma.h
  • GPDMA_STAT_INTERR : lpc17xx_gpdma.h
  • GPDMA_STAT_INTTC : lpc17xx_gpdma.h
  • GPDMA_STAT_RAWINTERR : lpc17xx_gpdma.h
  • GPDMA_STAT_RAWINTTC : lpc17xx_gpdma.h
  • GPDMA_STATCLR_INTERR : lpc17xx_gpdma.h
  • GPDMA_STATCLR_INTTC : lpc17xx_gpdma.h
  • GPDMA_StateClear_Type : lpc17xx_gpdma.h
  • GPDMA_Status_Type : lpc17xx_gpdma.h
  • GPDMA_TRANSFERTYPE_M2M : lpc17xx_gpdma.h
  • GPDMA_TRANSFERTYPE_M2P : lpc17xx_gpdma.h
  • GPDMA_TRANSFERTYPE_P2M : lpc17xx_gpdma.h
  • GPDMA_TRANSFERTYPE_P2P : lpc17xx_gpdma.h
  • GPDMA_WIDTH_BYTE : lpc17xx_gpdma.h
  • GPDMA_WIDTH_HALFWORD : lpc17xx_gpdma.h
  • GPDMA_WIDTH_WORD : lpc17xx_gpdma.h
  • GPDMACfg : dac_dma.c , dac_sinewave_test.c
  • GPIO0_Byte : lpc17xx_gpio.h
  • GPIO0_HalfWord : lpc17xx_gpio.h
  • GPIO1_Byte : lpc17xx_gpio.h
  • GPIO1_HalfWord : lpc17xx_gpio.h
  • GPIO2_Byte : lpc17xx_gpio.h
  • GPIO2_HalfWord : lpc17xx_gpio.h
  • GPIO3_Byte : lpc17xx_gpio.h
  • GPIO3_HalfWord : lpc17xx_gpio.h
  • GPIO4_Byte : lpc17xx_gpio.h
  • GPIO4_HalfWord : lpc17xx_gpio.h
  • GPIO_ClearInt() : lpc17xx_gpio.h
  • GPIO_ClearValue() : lpc17xx_gpio.h
  • GPIO_GetIntStatus() : lpc17xx_gpio.h
  • GPIO_INT : adc_burst_test.c
  • GPIO_IntCmd() : lpc17xx_gpio.h
  • GPIO_ReadValue() : lpc17xx_gpio.h
  • GPIO_SetDir() : lpc17xx_gpio.h
  • GPIO_SetValue() : lpc17xx_gpio.h
  • Green : GLCD.h
  • GROUP_EXTEND_ENTRY : lpc17xx_can.h
  • GROUP_STANDARD_ENTRY : lpc17xx_can.h
  • GWIP_1 : tcpip.h
  • GWIP_2 : tcpip.h
  • GWIP_3 : tcpip.h
  • GWIP_4 : tcpip.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- h -

  • H : usb.h
  • HALF_DUPLEX : emac.h
  • HARDW_ETH10 : tcpip.h
  • HEIGHT : GLCD_SPI_LPC1700.c
  • hello_world_appcall() : hello-world.c
  • hello_world_init() : hello-world.c
  • HID_Absolute : hid.h
  • HID_Application : hid.h
  • HID_Array : hid.h
  • HID_Collection : hid.h
  • HID_Constant : hid.h
  • HID_Data : hid.h
  • HID_DESC_OFFSET : usbdesc.h
  • HID_DESC_SIZE : usbdesc.h
  • HID_DESCRIPTOR : hid.h
  • HID_EndCollection : hid.h
  • HID_Feature : hid.h
  • HID_GetIdle() : hiduser.c , hiduser.h
  • HID_GetProtocol() : hiduser.c , hiduser.h
  • HID_GetReport() : hiduser.c , hiduser.h
  • HID_HID_DESCRIPTOR_TYPE : hid.h
  • HID_IdleTime : hiduser.c , hiduser.h
  • HID_Input : hid.h
  • HID_Linear : hid.h
  • HID_Logical : hid.h
  • HID_LogicalMax : hid.h
  • HID_LogicalMaxL : hid.h
  • HID_LogicalMaxS : hid.h
  • HID_LogicalMin : hid.h
  • HID_LogicalMinL : hid.h
  • HID_LogicalMinS : hid.h
  • HID_NamedArray : hid.h
  • HID_NonLinear : hid.h
  • HID_NoNullPosition : hid.h
  • HID_NonVolatile : hid.h
  • HID_NoPreferred : hid.h
  • HID_NoWrap : hid.h
  • HID_NullState : hid.h
  • HID_Output : hid.h
  • HID_Physical : hid.h
  • HID_PHYSICAL_DESCRIPTOR_TYPE : hid.h
  • HID_PhysicalMax : hid.h
  • HID_PhysicalMaxL : hid.h
  • HID_PhysicalMaxS : hid.h
  • HID_PhysicalMin : hid.h
  • HID_PhysicalMinL : hid.h
  • HID_PhysicalMinS : hid.h
  • HID_Pop : hid.h
  • HID_PreferredState : hid.h
  • HID_Protocol : hiduser.c , hiduser.h
  • HID_PROTOCOL_KEYBOARD : hid.h
  • HID_PROTOCOL_MOUSE : hid.h
  • HID_PROTOCOL_NONE : hid.h
  • HID_Push : hid.h
  • HID_Relative : hid.h
  • HID_Report : hid.h
  • HID_REPORT_DESC_SIZE : usbdesc.h
  • HID_REPORT_DESCRIPTOR_TYPE : hid.h
  • HID_REPORT_FEATURE : hid.h
  • HID_REPORT_INPUT : hid.h
  • HID_REPORT_NUM : hiduser.h
  • HID_REPORT_OUTPUT : hid.h
  • HID_ReportCount : hid.h
  • HID_ReportDescriptor : usbdesc.c , usbdesc.h
  • HID_ReportDescSize : usbdesc.c , usbdesc.h
  • HID_ReportID : hid.h
  • HID_ReportSize : hid.h
  • HID_REQUEST_GET_IDLE : hid.h
  • HID_REQUEST_GET_PROTOCOL : hid.h
  • HID_REQUEST_GET_REPORT : hid.h
  • HID_REQUEST_SET_IDLE : hid.h
  • HID_REQUEST_SET_PROTOCOL : hid.h
  • HID_REQUEST_SET_REPORT : hid.h
  • HID_SetIdle() : hiduser.c , hiduser.h
  • HID_SetProtocol() : hiduser.c , hiduser.h
  • HID_SetReport() : hiduser.c , hiduser.h
  • HID_SUBCLASS_BOOT : hid.h
  • HID_SUBCLASS_NONE : hid.h
  • HID_Unit : hid.h
  • HID_UnitExponent : hid.h
  • HID_UnitL : hid.h
  • HID_UnitS : hid.h
  • HID_Usage : hid.h
  • HID_USAGE_CONSUMER_CONTROL : hid.h
  • HID_USAGE_GENERIC_BYTE_COUNT : hid.h
  • HID_USAGE_GENERIC_COUNTED_BUFFER : hid.h
  • HID_USAGE_GENERIC_DIAL : hid.h
  • HID_USAGE_GENERIC_GAMEPAD : hid.h
  • HID_USAGE_GENERIC_HATSWITCH : hid.h
  • HID_USAGE_GENERIC_JOYSTICK : hid.h
  • HID_USAGE_GENERIC_KEYBOARD : hid.h
  • HID_USAGE_GENERIC_KEYPAD : hid.h
  • HID_USAGE_GENERIC_MOTION_WAKEUP : hid.h
  • HID_USAGE_GENERIC_MOUSE : hid.h
  • HID_USAGE_GENERIC_POINTER : hid.h
  • HID_USAGE_GENERIC_RX : hid.h
  • HID_USAGE_GENERIC_RY : hid.h
  • HID_USAGE_GENERIC_RZ : hid.h
  • HID_USAGE_GENERIC_SLIDER : hid.h
  • HID_USAGE_GENERIC_SYSCTL_APP_MENU : hid.h
  • HID_USAGE_GENERIC_SYSCTL_CONTEXT_MENU : hid.h
  • HID_USAGE_GENERIC_SYSCTL_HELP_MENU : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MAIN_MENU : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_DOWN : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_EXIT : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_LEFT : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_RIGHT : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_SELECT : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_UP : hid.h
  • HID_USAGE_GENERIC_SYSCTL_POWER : hid.h
  • HID_USAGE_GENERIC_SYSCTL_SLEEP : hid.h
  • HID_USAGE_GENERIC_SYSCTL_WAKE : hid.h
  • HID_USAGE_GENERIC_SYSTEM_CTL : hid.h
  • HID_USAGE_GENERIC_VBRX : hid.h
  • HID_USAGE_GENERIC_VBRY : hid.h
  • HID_USAGE_GENERIC_VBRZ : hid.h
  • HID_USAGE_GENERIC_VNO : hid.h
  • HID_USAGE_GENERIC_VX : hid.h
  • HID_USAGE_GENERIC_VY : hid.h
  • HID_USAGE_GENERIC_VZ : hid.h
  • HID_USAGE_GENERIC_WHEEL : hid.h
  • HID_USAGE_GENERIC_X : hid.h
  • HID_USAGE_GENERIC_Y : hid.h
  • HID_USAGE_GENERIC_Z : hid.h
  • HID_USAGE_KEYBOARD_aA : hid.h
  • HID_USAGE_KEYBOARD_CAPS_LOCK : hid.h
  • HID_USAGE_KEYBOARD_DELETE : hid.h
  • HID_USAGE_KEYBOARD_ESCAPE : hid.h
  • HID_USAGE_KEYBOARD_F1 : hid.h
  • HID_USAGE_KEYBOARD_F12 : hid.h
  • HID_USAGE_KEYBOARD_LALT : hid.h
  • HID_USAGE_KEYBOARD_LCTRL : hid.h
  • HID_USAGE_KEYBOARD_LGUI : hid.h
  • HID_USAGE_KEYBOARD_LSHFT : hid.h
  • HID_USAGE_KEYBOARD_NOEVENT : hid.h
  • HID_USAGE_KEYBOARD_NUM_LOCK : hid.h
  • HID_USAGE_KEYBOARD_ONE : hid.h
  • HID_USAGE_KEYBOARD_POSTFAIL : hid.h
  • HID_USAGE_KEYBOARD_PRINT_SCREEN : hid.h
  • HID_USAGE_KEYBOARD_RALT : hid.h
  • HID_USAGE_KEYBOARD_RCTRL : hid.h
  • HID_USAGE_KEYBOARD_RETURN : hid.h
  • HID_USAGE_KEYBOARD_RGUI : hid.h
  • HID_USAGE_KEYBOARD_ROLLOVER : hid.h
  • HID_USAGE_KEYBOARD_RSHFT : hid.h
  • HID_USAGE_KEYBOARD_SCROLL_LOCK : hid.h
  • HID_USAGE_KEYBOARD_UNDEFINED : hid.h
  • HID_USAGE_KEYBOARD_ZERO : hid.h
  • HID_USAGE_KEYBOARD_zZ : hid.h
  • HID_USAGE_LED_AMBER : hid.h
  • HID_USAGE_LED_BATTERY_LOW : hid.h
  • HID_USAGE_LED_BATTERY_OK : hid.h
  • HID_USAGE_LED_BATTERY_OPERATION : hid.h
  • HID_USAGE_LED_BUSY : hid.h
  • HID_USAGE_LED_CALL_PICKUP : hid.h
  • HID_USAGE_LED_CAMERA_OFF : hid.h
  • HID_USAGE_LED_CAMERA_ON : hid.h
  • HID_USAGE_LED_CAPS_LOCK : hid.h
  • HID_USAGE_LED_CAV : hid.h
  • HID_USAGE_LED_CLV : hid.h
  • HID_USAGE_LED_COMPOSE : hid.h
  • HID_USAGE_LED_CONFERENCE : hid.h
  • HID_USAGE_LED_COVERAGE : hid.h
  • HID_USAGE_LED_DATA_MODE : hid.h
  • HID_USAGE_LED_DO_NOT_DISTURB : hid.h
  • HID_USAGE_LED_EQUALIZER_ENABLE : hid.h
  • HID_USAGE_LED_ERROR : hid.h
  • HID_USAGE_LED_FAST_BLINK_OFF_TIME : hid.h
  • HID_USAGE_LED_FAST_BLINK_ON_TIME : hid.h
  • HID_USAGE_LED_FAST_FORWARD : hid.h
  • HID_USAGE_LED_FLASH_ON_TIME : hid.h
  • HID_USAGE_LED_FORWARD : hid.h
  • HID_USAGE_LED_GENERIC_INDICATOR : hid.h
  • HID_USAGE_LED_GREEN : hid.h
  • HID_USAGE_LED_HEAD_SET : hid.h
  • HID_USAGE_LED_HIGH_CUT_FILTER : hid.h
  • HID_USAGE_LED_HOLD : hid.h
  • HID_USAGE_LED_IN_USE_INDICATOR : hid.h
  • HID_USAGE_LED_INDICATOR_COLOR : hid.h
  • HID_USAGE_LED_INDICATOR_FAST_BLINK : hid.h
  • HID_USAGE_LED_INDICATOR_FLASH : hid.h
  • HID_USAGE_LED_INDICATOR_OFF : hid.h
  • HID_USAGE_LED_INDICATOR_ON : hid.h
  • HID_USAGE_LED_INDICATOR_SLOW_BLINK : hid.h
  • HID_USAGE_LED_KANA : hid.h
  • HID_USAGE_LED_LOW_CUT_FILTER : hid.h
  • HID_USAGE_LED_MESSAGE_WAITING : hid.h
  • HID_USAGE_LED_MICROPHONE : hid.h
  • HID_USAGE_LED_MULTI_MODE_INDICATOR : hid.h
  • HID_USAGE_LED_MUTE : hid.h
  • HID_USAGE_LED_NIGHT_MODE : hid.h
  • HID_USAGE_LED_NUM_LOCK : hid.h
  • HID_USAGE_LED_OFF_HOOK : hid.h
  • HID_USAGE_LED_OFF_LINE : hid.h
  • HID_USAGE_LED_ON_LINE : hid.h
  • HID_USAGE_LED_PAPER_JAM : hid.h
  • HID_USAGE_LED_PAPER_OUT : hid.h
  • HID_USAGE_LED_PAUSE : hid.h
  • HID_USAGE_LED_PLAY : hid.h
  • HID_USAGE_LED_POWER : hid.h
  • HID_USAGE_LED_READY : hid.h
  • HID_USAGE_LED_RECORD : hid.h
  • HID_USAGE_LED_RECORDING_FORMAT_DET : hid.h
  • HID_USAGE_LED_RED : hid.h
  • HID_USAGE_LED_REMOTE : hid.h
  • HID_USAGE_LED_REPEAT : hid.h
  • HID_USAGE_LED_REVERSE : hid.h
  • HID_USAGE_LED_REWIND : hid.h
  • HID_USAGE_LED_RING : hid.h
  • HID_USAGE_LED_SAMPLING_RATE_DETECT : hid.h
  • HID_USAGE_LED_SCROLL_LOCK : hid.h
  • HID_USAGE_LED_SELECTED_INDICATOR : hid.h
  • HID_USAGE_LED_SEND_CALLS : hid.h
  • HID_USAGE_LED_SHIFT : hid.h
  • HID_USAGE_LED_SLOW_BLINK_OFF_TIME : hid.h
  • HID_USAGE_LED_SLOW_BLINK_ON_TIME : hid.h
  • HID_USAGE_LED_SOUND_FIELD_ON : hid.h
  • HID_USAGE_LED_SPEAKER : hid.h
  • HID_USAGE_LED_SPINNING : hid.h
  • HID_USAGE_LED_STAND_BY : hid.h
  • HID_USAGE_LED_STEREO : hid.h
  • HID_USAGE_LED_STOP : hid.h
  • HID_USAGE_LED_SURROUND_FIELD_ON : hid.h
  • HID_USAGE_LED_TONE_ENABLE : hid.h
  • HID_USAGE_PAGE_ALPHANUMERIC : hid.h
  • HID_USAGE_PAGE_BUTTON : hid.h
  • HID_USAGE_PAGE_CONSUMER : hid.h
  • HID_USAGE_PAGE_DEV_CONTROLS : hid.h
  • HID_USAGE_PAGE_DIGITIZER : hid.h
  • HID_USAGE_PAGE_GAME : hid.h
  • HID_USAGE_PAGE_GENERIC : hid.h
  • HID_USAGE_PAGE_KEYBOARD : hid.h
  • HID_USAGE_PAGE_LED : hid.h
  • HID_USAGE_PAGE_ORDINAL : hid.h
  • HID_USAGE_PAGE_SIMULATION : hid.h
  • HID_USAGE_PAGE_SPORT : hid.h
  • HID_USAGE_PAGE_TELEPHONY : hid.h
  • HID_USAGE_PAGE_UNDEFINED : hid.h
  • HID_USAGE_PAGE_UNICODE : hid.h
  • HID_USAGE_PAGE_VR : hid.h
  • HID_USAGE_SIMULATION_RUDDER : hid.h
  • HID_USAGE_SIMULATION_THROTTLE : hid.h
  • HID_USAGE_TELEPHONY_ANSWERING_MACHINE : hid.h
  • HID_USAGE_TELEPHONY_HANDSET : hid.h
  • HID_USAGE_TELEPHONY_HEADSET : hid.h
  • HID_USAGE_TELEPHONY_KEYPAD : hid.h
  • HID_USAGE_TELEPHONY_MESSAGE_CONTROLS : hid.h
  • HID_USAGE_TELEPHONY_PHONE : hid.h
  • HID_USAGE_TELEPHONY_PROGRAMMABLE_BUTTON : hid.h
  • HID_UsageMax : hid.h
  • HID_UsageMin : hid.h
  • HID_UsageModifier : hid.h
  • HID_UsagePage : hid.h
  • HID_UsagePageVendor : hid.h
  • HID_UsageSwitch : hid.h
  • HID_Variable : hid.h
  • HID_Volatile : hid.h
  • HID_Wrap : hid.h
  • HTONS : uip.h
  • htons() : uip.c , uip.h
  • http_10 : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_11 : webclient-strings.h , http-strings.c , http-strings.h , webclient-strings.c
  • http_200 : webclient-strings.h , http-strings.c , http-strings.h , webclient-strings.c
  • http_301 : webclient-strings.h , http-strings.c , http-strings.h , webclient-strings.c
  • http_302 : http-strings.c , http-strings.h , webclient-strings.c , webclient-strings.h
  • http_404_html : http-strings.c , webclient-strings.c , http-strings.h , webclient-strings.h
  • http_content_type : http-strings.h , webclient-strings.c , webclient-strings.h , http-strings.c
  • http_content_type_binary : webclient-strings.c , http-strings.h , webclient-strings.h , http-strings.c
  • http_content_type_css : webclient-strings.h , http-strings.c , webclient-strings.c , http-strings.h
  • http_content_type_gif : http-strings.h , webclient-strings.h , webclient-strings.c , http-strings.c
  • http_content_type_html : webclient-strings.h , webclient-strings.c , http-strings.c , http-strings.h
  • http_content_type_jpg : webclient-strings.h , http-strings.c , http-strings.h , webclient-strings.c
  • http_content_type_plain : http-strings.h , http-strings.c
  • http_content_type_png : webclient-strings.h , webclient-strings.c , http-strings.h , http-strings.c
  • http_content_type_text : webclient-strings.h , http-strings.h , http-strings.c , webclient-strings.c
  • http_crnl : http-strings.h , webclient-strings.c , webclient-strings.h , http-strings.c
  • http_css : http-strings.c , webclient-strings.c , webclient-strings.h , http-strings.h
  • http_get : http-strings.h , webclient-strings.c , webclient-strings.h , http-strings.c
  • http_gif : webclient-strings.h , http-strings.h , http-strings.c , webclient-strings.c
  • http_header_200 : http-strings.c , http-strings.h
  • http_header_404 : http-strings.c , http-strings.h
  • http_host : webclient-strings.h , http-strings.h , webclient-strings.c , http-strings.c
  • http_htm : webclient-strings.h , webclient-strings.c , http-strings.h , http-strings.c
  • http_html : webclient-strings.h , webclient-strings.c , http-strings.h , http-strings.c
  • http_http : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_index_html : webclient-strings.h , http-strings.h , webclient-strings.c , http-strings.c
  • http_jpg : http-strings.c , webclient-strings.c , webclient-strings.h , http-strings.h
  • http_location : http-strings.c , webclient-strings.h , http-strings.h , webclient-strings.c
  • http_png : http-strings.h , webclient-strings.c , http-strings.c , webclient-strings.h
  • http_referer : http-strings.h , http-strings.c
  • HTTP_SEND_PAGE : easyweb.h
  • http_shtml : webclient-strings.c , http-strings.c , webclient-strings.h , http-strings.h
  • http_text : http-strings.c , http-strings.h , webclient-strings.h , webclient-strings.c
  • http_texthtml : http-strings.h , webclient-strings.c , http-strings.c , webclient-strings.h
  • http_txt : http-strings.c , webclient-strings.c , http-strings.h , webclient-strings.h
  • http_user_agent_fields : webclient-strings.h , webclient-strings.c
  • HTTPBytesToSend : easyweb.h
  • httpd_appcall() : httpd.h
  • httpd_cgi() : httpd-cgi.h
  • HTTPD_CGI_CALL() : httpd-cgi.c , httpd-cgi.h
  • httpd_cgi_init() : httpd-cgi.h
  • httpd_fs_count() : httpd-fs.c , httpd-fs.h
  • httpd_fs_init() : httpd-fs.h , httpd-fs.c
  • HTTPD_FS_NUMFILES : httpd-fsdata.c
  • httpd_fs_open() : httpd-fs.c , httpd-fs.h
  • HTTPD_FS_ROOT : httpd-fsdata.c
  • HTTPD_FS_STATISTICS : httpd-fs.h
  • httpd_init() : httpd.h
  • httpd_log() : httpd.h
  • httpd_log_file() : httpd.h
  • HTTPFLAG_ERROR : webclient.c
  • HTTPFLAG_MOVED : webclient.c
  • HTTPFLAG_NONE : webclient.c
  • HTTPFLAG_OK : webclient.c
  • HTTPServer() : easyweb.h , easyweb.c
  • HTTPStatus : easyweb.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- i -

  • I2C0_IRQHandler() : i2c_master_slave_int_test.c , i2c_monitor.c , i2c_interrupt_test.c
  • I2C0_IRQn : LPC17xx.h
  • I2C1_IRQn : LPC17xx.h
  • I2C2_IRQHandler() : i2c_master_slave_int_test.c
  • I2C2_IRQn : LPC17xx.h
  • I2C_Cmd() : lpc17xx_i2c.h
  • I2C_DeInit() : lpc17xx_i2c.h
  • I2C_GetLastStatusCode() : lpc17xx_i2c.h
  • I2C_I2ADR_BITMASK : lpc17xx_i2c.h
  • I2C_I2ADR_GC : lpc17xx_i2c.h
  • I2C_I2CONCLR_AAC : lpc17xx_i2c.h
  • I2C_I2CONCLR_I2ENC : lpc17xx_i2c.h
  • I2C_I2CONCLR_SIC : lpc17xx_i2c.h
  • I2C_I2CONCLR_STAC : lpc17xx_i2c.h
  • I2C_I2CONSET_AA : lpc17xx_i2c.h
  • I2C_I2CONSET_I2EN : lpc17xx_i2c.h
  • I2C_I2CONSET_SI : lpc17xx_i2c.h
  • I2C_I2CONSET_STA : lpc17xx_i2c.h
  • I2C_I2CONSET_STO : lpc17xx_i2c.h
  • I2C_I2DAT_BITMASK : lpc17xx_i2c.h
  • I2C_I2DAT_IDLE_CHAR : lpc17xx_i2c.h
  • I2C_I2MASK_MASK : lpc17xx_i2c.h
  • I2C_I2MMCTRL_BITMASK : lpc17xx_i2c.h
  • I2C_I2MMCTRL_ENA_SCL : lpc17xx_i2c.h
  • I2C_I2MMCTRL_MATCH_ALL : lpc17xx_i2c.h
  • I2C_I2MMCTRL_MM_ENA : lpc17xx_i2c.h
  • I2C_I2SCLH_BITMASK : lpc17xx_i2c.h
  • I2C_I2SCLL_BITMASK : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_ARB_LOST : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_DAT_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_RESTART : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_SLAR_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_SLAR_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_START : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_ARB_LOST : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_DAT_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_RESTART : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_SLAW_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_SLAW_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_START : lpc17xx_i2c.h
  • I2C_I2STAT_NO_INF : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_ARB_LOST_M_SLA : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_GENCALL_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_SLAW_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX : lpc17xx_i2c.h
  • I2C_I2STAT_S_TX_ARB_LOST_M_SLA : lpc17xx_i2c.h
  • I2C_I2STAT_S_TX_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_TX_DAT_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_TX_LAST_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_TX_SLAR_ACK : lpc17xx_i2c.h
  • I2C_Init() : lpc17xx_i2c.h
  • I2C_IntCmd() : lpc17xx_i2c.h
  • I2C_MasterHandler() : lpc17xx_i2c.h
  • I2C_MasterTransferComplete() : lpc17xx_i2c.h
  • I2C_MasterTransferData() : lpc17xx_i2c.h
  • I2C_MONITOR_CFG_MATCHALL : lpc17xx_i2c.h
  • I2C_MONITOR_CFG_SCL_OUTPUT : lpc17xx_i2c.h
  • I2C_MonitorGetDatabuffer() : lpc17xx_i2c.h
  • I2C_MonitorHandler() : lpc17xx_i2c.h
  • I2C_MonitorModeCmd() : lpc17xx_i2c.h
  • I2C_MonitorModeConfig() : lpc17xx_i2c.h
  • I2C_SetOwnSlaveAddr() : lpc17xx_i2c.h
  • I2C_SETUP_STATUS_ARBF : lpc17xx_i2c.h
  • I2C_SETUP_STATUS_DONE : lpc17xx_i2c.h
  • I2C_SETUP_STATUS_NOACKF : lpc17xx_i2c.h
  • I2C_SLAVE_TIME_OUT : lpc17xx_i2c.h
  • I2C_SlaveHandler() : lpc17xx_i2c.h
  • I2C_SlaveTransferComplete() : lpc17xx_i2c.h
  • I2C_SlaveTransferData() : lpc17xx_i2c.h
  • I2C_STAT_CODE_BITMASK : lpc17xx_i2c.h
  • I2C_TRANSFER_INTERRUPT : lpc17xx_i2c.h
  • I2C_TRANSFER_OPT_Type : lpc17xx_i2c.h
  • I2C_TRANSFER_POLLING : lpc17xx_i2c.h
  • I2CDEV : i2c_monitor.c , pca8581_test.c , i2c_interrupt_test.c , i2c_polling_test.c
  • I2CDEV_M : master.c , i2c_master_slave_int_test.c
  • I2CDEV_S : i2c_master_slave_int_test.c , slave.c
  • I2CDEV_S_ADDR : master.c
  • I2CDEV_S_OWN_ADDR : i2c_master_slave_int_test.c , slave.c
  • I2DATA_BUFFER_BITMASK : lpc17xx_i2c.h
  • I2S_4PIN_DISABLE : lpc17xx_i2s.h
  • I2S_4PIN_ENABLE : lpc17xx_i2s.h
  • I2S_BUFFER_DST : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2S_BUFFER_SRC : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2S_CLKSEL_FRDCLK : lpc17xx_i2s.h
  • I2S_CLKSEL_MCLK : lpc17xx_i2s.h
  • I2S_Config() : lpc17xx_i2s.h
  • I2S_DAI_MONO : lpc17xx_i2s.h
  • I2S_DAI_MUTE : lpc17xx_i2s.h
  • I2S_DAI_RESET : lpc17xx_i2s.h
  • I2S_DAI_SLAVE : lpc17xx_i2s.h
  • I2S_DAI_STOP : lpc17xx_i2s.h
  • I2S_DAI_WORDWIDTH_16 : lpc17xx_i2s.h
  • I2S_DAI_WORDWIDTH_32 : lpc17xx_i2s.h
  • I2S_DAI_WORDWIDTH_8 : lpc17xx_i2s.h
  • I2S_DAI_WS_HALFPERIOD : lpc17xx_i2s.h
  • I2S_DAO_MONO : lpc17xx_i2s.h
  • I2S_DAO_MUTE : lpc17xx_i2s.h
  • I2S_DAO_RESET : lpc17xx_i2s.h
  • I2S_DAO_SLAVE : lpc17xx_i2s.h
  • I2S_DAO_STOP : lpc17xx_i2s.h
  • I2S_DAO_WORDWIDTH_16 : lpc17xx_i2s.h
  • I2S_DAO_WORDWIDTH_32 : lpc17xx_i2s.h
  • I2S_DAO_WORDWIDTH_8 : lpc17xx_i2s.h
  • I2S_DAO_WS_HALFPERIOD : lpc17xx_i2s.h
  • I2S_DeInit() : lpc17xx_i2s.h
  • I2S_DMA1_RX_DEPTH : lpc17xx_i2s.h
  • I2S_DMA1_RX_ENABLE : lpc17xx_i2s.h
  • I2S_DMA1_TX_DEPTH : lpc17xx_i2s.h
  • I2S_DMA1_TX_ENABLE : lpc17xx_i2s.h
  • I2S_DMA2_RX_DEPTH : lpc17xx_i2s.h
  • I2S_DMA2_RX_ENABLE : lpc17xx_i2s.h
  • I2S_DMA2_TX_DEPTH : lpc17xx_i2s.h
  • I2S_DMA2_TX_ENABLE : lpc17xx_i2s.h
  • I2S_DMA_1 : lpc17xx_i2s.h
  • I2S_DMA_2 : lpc17xx_i2s.h
  • I2S_DMACmd() : lpc17xx_i2s.h
  • I2S_DMAConfig() : lpc17xx_i2s.h
  • I2S_FreqConfig() : lpc17xx_i2s.h
  • I2S_GetIRQDepth() : lpc17xx_i2s.h
  • I2S_GetIRQStatus() : lpc17xx_i2s.h
  • I2S_GetLevel() : lpc17xx_i2s.h
  • I2S_Init() : lpc17xx_i2s.h
  • I2S_IRQ_RX_DEPTH : lpc17xx_i2s.h
  • I2S_IRQ_RX_ENABLE : lpc17xx_i2s.h
  • I2S_IRQ_TX_DEPTH : lpc17xx_i2s.h
  • I2S_IRQ_TX_ENABLE : lpc17xx_i2s.h
  • I2S_IRQCmd() : lpc17xx_i2s.h
  • I2S_IRQConfig() : lpc17xx_i2s.h
  • I2S_IRQHandler() : i2s_irq_test.c , i2s_mclk.c , i2s_two_kit.c
  • I2S_IRQn : LPC17xx.h
  • I2S_MASTER_MODE : lpc17xx_i2s.h
  • I2S_MCLK_DISABLE : lpc17xx_i2s.h
  • I2S_MCLK_ENABLE : lpc17xx_i2s.h
  • I2S_ModeConfig() : lpc17xx_i2s.h
  • I2S_MONO : lpc17xx_i2s.h
  • I2S_Mute() : lpc17xx_i2s.h
  • I2S_MUTE_DISABLE : lpc17xx_i2s.h
  • I2S_MUTE_ENABLE : lpc17xx_i2s.h
  • I2S_Pause() : lpc17xx_i2s.h
  • I2S_Receive() : lpc17xx_i2s.h
  • I2S_RECEIVE : i2s_two_kit.c
  • I2S_RESET_DISABLE : lpc17xx_i2s.h
  • I2S_RESET_ENABLE : lpc17xx_i2s.h
  • I2S_RX_MODE : lpc17xx_i2s.h
  • I2S_RXBITRATE : lpc17xx_i2s.h
  • I2S_RXMODE_4PIN_ENABLE : lpc17xx_i2s.h
  • I2S_RXMODE_CLKSEL : lpc17xx_i2s.h
  • I2S_RXMODE_MCENA : lpc17xx_i2s.h
  • I2S_RXRATE_X_DIVIDER : lpc17xx_i2s.h
  • I2S_RXRATE_Y_DIVIDER : lpc17xx_i2s.h
  • I2S_Send() : lpc17xx_i2s.h
  • I2S_SetBitRate() : lpc17xx_i2s.h
  • I2S_SLAVE_MODE : lpc17xx_i2s.h
  • I2S_Start() : lpc17xx_i2s.h
  • I2S_STATE_DMA1 : lpc17xx_i2s.h
  • I2S_STATE_DMA2 : lpc17xx_i2s.h
  • I2S_STATE_IRQ : lpc17xx_i2s.h
  • I2S_STATE_RX_LEVEL : lpc17xx_i2s.h
  • I2S_STATE_TX_LEVEL : lpc17xx_i2s.h
  • I2S_STEREO : lpc17xx_i2s.h
  • I2S_Stop() : lpc17xx_i2s.h
  • I2S_STOP_DISABLE : lpc17xx_i2s.h
  • I2S_STOP_ENABLE : lpc17xx_i2s.h
  • I2S_TRANSMIT : i2s_two_kit.c
  • I2S_TX_MODE : lpc17xx_i2s.h
  • I2S_TXBITRATE : lpc17xx_i2s.h
  • I2S_TXMODE_4PIN_ENABLE : lpc17xx_i2s.h
  • I2S_TXMODE_CLKSEL : lpc17xx_i2s.h
  • I2S_TXMODE_MCENA : lpc17xx_i2s.h
  • I2S_TXRATE_X_DIVIDER : lpc17xx_i2s.h
  • I2S_TXRATE_Y_DIVIDER : lpc17xx_i2s.h
  • I2S_WORDWIDTH_16 : lpc17xx_i2s.h
  • I2S_WORDWIDTH_32 : lpc17xx_i2s.h
  • I2S_WORDWIDTH_8 : lpc17xx_i2s.h
  • I2SReadLength : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2SRXBuffer : i2s_dma_test.c , i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2SRXDone : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2STXBuffer : i2s_dma_test.c , i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2STXDone : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2SWriteLength : i2s_polling.c , i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c
  • IAR_LPC_1768 : privilege.c , wdt_reset_test.c
  • ICMP6_ECHO : uip.c
  • ICMP6_ECHO_REPLY : uip.c
  • ICMP6_FLAG_S : uip.c
  • ICMP6_NEIGHBOR_ADVERTISEMENT : uip.c
  • ICMP6_NEIGHBOR_SOLICITATION : uip.c
  • ICMP6_OPTION_SOURCE_LINK_ADDRESS : uip.c
  • ICMP6_OPTION_TARGET_LINK_ADDRESS : uip.c
  • ICMP_CHKSUM_OFS : tcpip.h
  • ICMP_DATA_OFS : tcpip.h
  • ICMP_ECHO : tcpip.h , uip-fw.c , uip.c
  • ICMP_ECHO_REPLY : uip.c , tcpip.h
  • ICMP_HEADER_SIZE : tcpip.h
  • ICMP_TE : uip-fw.c
  • ICMP_TYPE_CODE_OFS : tcpip.h
  • ICMPBUF : uip-fw.c , uip.c
  • iConfiguration : usb.h
  • ID_11 : lpc17xx_can.h
  • IDLE_CHAR : microwire_test.c , spi_interrupt_test.c , sc16is750_int.c , ti_test.c
  • IDMOFF : drv_glcd.h
  • IDMON : drv_glcd.h
  • idProduct : usb.h
  • idVendor : usb.h
  • ifftFlag : arm_fft_bin_example_f32.c
  • iInterface : usb.h
  • iManufacturer : usb.h
  • INACTIVE : lpc17xx_uart.h
  • INAK_BI : usbreg.h
  • INAK_BO : usbreg.h
  • INAK_CI : usbreg.h
  • INAK_CO : usbreg.h
  • INAK_II : usbreg.h
  • INAK_IO : usbreg.h
  • INDEX_MASK : arm_math.h
  • info1 : wdt_reset_test.c , wdt_interrupt_test.c
  • info2 : wdt_interrupt_test.c , wdt_reset_test.c
  • InfoBuf : usbdmain.c , usbaudio.h
  • Init_EMAC() : EMAC.h , EMAC.c
  • init_serial() : Serial.c
  • InitLED() : extint_sleep.c
  • InitOsc() : easyweb.h
  • InitPorts() : easyweb.h
  • INPUT_SPACING : arm_math.h
  • inputQ31 : arm_graphic_equalizer_example_q31.c
  • InReport : demo.h , demo.c
  • InsertDynamicValues() : easyweb.h , easyweb.c
  • INT_16 : lpc_types.h
  • INT_32 : lpc_types.h
  • INT_64 : lpc_types.h
  • INT_8 : lpc_types.h
  • INT_MODE : nvic_priority.c
  • IntStatus : lpc_types.h
  • INVOFF : drv_glcd.h
  • INVON : drv_glcd.h
  • IO_State : systick_stclk.c
  • IOCON : i2c_interrupt_test.c , i2c_polling_test.c
  • iocon_cfg : i2c_interrupt_test.c , spi_interrupt_test.c , sc16is750_int.c , sc16is750_polling.c , i2c_polling_test.c , spi_polling_test.c
  • IODIR : i2c_interrupt_test.c , i2c_polling_test.c
  • iodir_cfg : i2c_interrupt_test.c , i2c_polling_test.c , spi_interrupt_test.c , sc16is750_int.c , sc16is750_polling.c , spi_polling_test.c
  • IOSTATE : i2c_interrupt_test.c , i2c_polling_test.c
  • iostate_cfg_0 : i2c_interrupt_test.c , i2c_polling_test.c
  • iostate_cfg_1 : i2c_interrupt_test.c , i2c_polling_test.c
  • iostate_off : sc16is750_polling.c , sc16is750_int.c , spi_polling_test.c , spi_interrupt_test.c
  • iostate_on : sc16is750_int.c , sc16is750_polling.c , spi_interrupt_test.c , spi_polling_test.c
  • IP_ADDR_RESOLVED : tcpip.h
  • IP_DATA_OFS : tcpip.h
  • IP_DESTINATION_OFS : tcpip.h
  • IP_FLAG_DONTFRAG : tcpip.h
  • IP_FLAG_MOREFRAG : tcpip.h
  • IP_FLAGS_FRAG_OFS : tcpip.h
  • IP_FRAGOFS_MASK : tcpip.h
  • IP_HEAD_CHKSUM_OFS : tcpip.h
  • IP_HEADER_SIZE : tcpip.h
  • IP_HLEN_PLEN : tcpip.h
  • IP_IDENT_OFS : tcpip.h
  • IP_SOURCE_OFS : tcpip.h
  • IP_TOS_D : tcpip.h
  • IP_TOS_R : tcpip.h
  • IP_TOS_T : tcpip.h
  • IP_TOTAL_LENGTH_OFS : tcpip.h
  • IP_TTL_PROT_OFS : tcpip.h
  • IP_VER_IHL : tcpip.h
  • IP_VER_IHL_TOS_OFS : tcpip.h
  • IPBUF : uip_arp.c
  • iProduct : usb.h
  • IRC_OSC : system_LPC17xx.c
  • IRQn : LPC17xx.h
  • IRQn_Type : LPC17xx.h
  • IsBroadcast() : tcpip.c
  • iSerialNumber : usb.h
  • ISNGenHigh : tcpip.h
  • ISO_2 : smtp.c
  • ISO_3 : smtp.c
  • ISO_4 : smtp.c
  • ISO_5 : smtp.c
  • ISO_bang : httpd.c
  • ISO_colon : httpd.c
  • ISO_cr : smtp.c , telnetd.c , webclient.c
  • ISO_nl : telnetd.c , smtp.c , httpd.c , webclient.c
  • ISO_percent : httpd.c
  • ISO_period : httpd.c , smtp.c
  • ISO_slash : httpd.c
  • ISO_space : httpd.c , webclient.c
  • ITM : core_cm3.h
  • ITM_BASE : core_cm3.h
  • ITM_RxBuffer : core_cm3.h
  • ITM_RXBUFFER_EMPTY : core_cm3.h
  • ITM_TCR_BUSY_Msk : core_cm3.h
  • ITM_TCR_BUSY_Pos : core_cm3.h
  • ITM_TCR_GTSFREQ_Msk : core_cm3.h
  • ITM_TCR_GTSFREQ_Pos : core_cm3.h
  • ITM_TCR_ITMENA_Msk : core_cm3.h
  • ITM_TCR_ITMENA_Pos : core_cm3.h
  • ITM_TCR_SWOENA_Msk : core_cm3.h
  • ITM_TCR_SWOENA_Pos : core_cm3.h
  • ITM_TCR_SYNCENA_Msk : core_cm3.h
  • ITM_TCR_SYNCENA_Pos : core_cm3.h
  • ITM_TCR_TraceBusID_Msk : core_cm3.h
  • ITM_TCR_TraceBusID_Pos : core_cm3.h
  • ITM_TCR_TSENA_Msk : core_cm3.h
  • ITM_TCR_TSENA_Pos : core_cm3.h
  • ITM_TCR_TSPrescale_Msk : core_cm3.h
  • ITM_TCR_TSPrescale_Pos : core_cm3.h
  • ITM_TCR_TXENA_Msk : core_cm3.h
  • ITM_TCR_TXENA_Pos : core_cm3.h
  • ITM_TPR_PRIVMASK_Msk : core_cm3.h
  • ITM_TPR_PRIVMASK_Pos : core_cm3.h
Generated on Mon Nov 28 2011 11:15:37 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- p -

  • P_C : usbaudio.h
  • P_EP : usbuser.c
  • p_err_menu : rs485_master.c , rs485_slave.c
  • P_S : usbaudio.h
  • PacketGen() : emactest.c
  • PacketReceived : emactest.c
  • PAD_RIGHT : printf-stdarg.c
  • PAD_ZERO : printf-stdarg.c
  • PARAM_ADC_CHANNEL_SELECTION : lpc17xx_adc.h
  • PARAM_ADC_DATA_STATUS : lpc17xx_adc.h
  • PARAM_ADC_RATE : lpc17xx_adc.h
  • PARAM_ADC_START_ON_EDGE_OPT : lpc17xx_adc.h
  • PARAM_ADC_START_OPT : lpc17xx_adc.h
  • PARAM_ADC_TYPE_INT_OPT : lpc17xx_adc.h
  • PARAM_ADCx : lpc17xx_adc.h
  • PARAM_AFLUT_ENTRY_TYPE : lpc17xx_can.h
  • PARAM_AFMODE_TYPE : lpc17xx_can.h
  • PARAM_CANAFRAMx : lpc17xx_can.h
  • PARAM_CANAFx : lpc17xx_can.h
  • PARAM_CANCRx : lpc17xx_can.h
  • PARAM_CANx : lpc17xx_can.h
  • PARAM_CR_STS_TYPE : lpc17xx_can.h
  • PARAM_CTRL : lpc17xx_can.h
  • PARAM_CTRL_STS_TYPE : lpc17xx_can.h
  • PARAM_DAC_CURRENT_OPT : lpc17xx_dac.h
  • PARAM_DACx : lpc17xx_dac.h
  • PARAM_DLC : lpc17xx_can.h
  • PARAM_FRAME_TYPE : lpc17xx_can.h
  • PARAM_FULLCAN_IC : lpc17xx_can.h
  • PARAM_FUNCTIONALSTATE : lpc_types.h
  • PARAM_GPDMA_BSIZE : lpc17xx_gpdma.h
  • PARAM_GPDMA_CHANNEL : lpc17xx_gpdma.h
  • PARAM_GPDMA_CONN : lpc17xx_gpdma.h
  • PARAM_GPDMA_REQSEL : lpc17xx_gpdma.h
  • PARAM_GPDMA_STAT : lpc17xx_gpdma.h
  • PARAM_GPDMA_STATCLR : lpc17xx_gpdma.h
  • PARAM_GPDMA_TRANSFERTYPE : lpc17xx_gpdma.h
  • PARAM_GPDMA_WIDTH : lpc17xx_gpdma.h
  • PARAM_GRP_ID : lpc17xx_can.h
  • PARAM_I2C_MONITOR_CFG : lpc17xx_i2c.h
  • PARAM_I2C_SLAVEADDR_CH : lpc17xx_i2c.h
  • PARAM_I2Cx : lpc17xx_i2c.h
  • PARAM_I2S_4PIN : lpc17xx_i2s.h
  • PARAM_I2S_BITRATE : lpc17xx_i2s.h
  • PARAM_I2S_CHANNEL : lpc17xx_i2s.h
  • PARAM_I2S_CLKSEL : lpc17xx_i2s.h
  • PARAM_I2S_DATA : lpc17xx_can.h
  • PARAM_I2S_DMA : lpc17xx_i2s.h
  • PARAM_I2S_DMA_DEPTH : lpc17xx_i2s.h
  • PARAM_I2S_HALFPERIOD : lpc17xx_i2s.h
  • PARAM_I2S_IRQ_LEVEL : lpc17xx_i2s.h
  • PARAM_I2S_MCLK : lpc17xx_i2s.h
  • PARAM_I2S_MUTE : lpc17xx_i2s.h
  • PARAM_I2S_RESET : lpc17xx_i2s.h
  • PARAM_I2S_STOP : lpc17xx_i2s.h
  • PARAM_I2S_TRX : lpc17xx_i2s.h
  • PARAM_I2S_WORDWIDTH : lpc17xx_i2s.h
  • PARAM_I2S_WS_SEL : lpc17xx_i2s.h
  • PARAM_I2Sx : lpc17xx_i2s.h
  • PARAM_ID_11 : lpc17xx_can.h
  • PARAM_ID_29 : lpc17xx_can.h
  • PARAM_ID_FORMAT : lpc17xx_can.h
  • PARAM_INT_EN_TYPE : lpc17xx_can.h
  • PARAM_MODE_TYPE : lpc17xx_can.h
  • PARAM_MSG_DISABLE : lpc17xx_can.h
  • PARAM_POSITION : lpc17xx_can.h
  • PARAM_PWM1_CAPTURE_CHANNEL : lpc17xx_pwm.h
  • PARAM_PWM1_CHANNEL : lpc17xx_pwm.h
  • PARAM_PWM1_EDGE_MODE_CHANNEL : lpc17xx_pwm.h
  • PARAM_PWM1_MATCH_CHANNEL : lpc17xx_pwm.h
  • PARAM_PWM_CHANNEL_EDGE : lpc17xx_pwm.h
  • PARAM_PWM_COUNTER_EDGE : lpc17xx_pwm.h
  • PARAM_PWM_COUNTER_INPUTSEL : lpc17xx_pwm.h
  • PARAM_PWM_INTSTAT : lpc17xx_pwm.h
  • PARAM_PWM_MATCH_UPDATE : lpc17xx_pwm.h
  • PARAM_PWM_TC_MODE : lpc17xx_pwm.h
  • PARAM_PWM_TIMER_PRESCALE : lpc17xx_pwm.h
  • PARAM_PWMx : lpc17xx_pwm.h
  • PARAM_QEI_CAPMODE : lpc17xx_qei.h
  • PARAM_QEI_COMPPOS_CH : lpc17xx_qei.h
  • PARAM_QEI_DIRINV : lpc17xx_qei.h
  • PARAM_QEI_INTFLAG : lpc17xx_qei.h
  • PARAM_QEI_INVINX : lpc17xx_qei.h
  • PARAM_QEI_RESET : lpc17xx_qei.h
  • PARAM_QEI_SIGNALMODE : lpc17xx_qei.h
  • PARAM_QEI_STATUS : lpc17xx_qei.h
  • PARAM_QEI_TIMERRELOAD : lpc17xx_qei.h
  • PARAM_QEIx : lpc17xx_qei.h
  • PARAM_RITx : lpc17xx_rit.h
  • PARAM_RTC_CALIB_DIR : lpc17xx_rtc.h
  • PARAM_RTC_GPREG_CH : lpc17xx_rtc.h
  • PARAM_RTC_INT : lpc17xx_rtc.h
  • PARAM_RTC_TIMETYPE : lpc17xx_rtc.h
  • PARAM_RTCx : lpc17xx_rtc.h
  • PARAM_SETSTATE : lpc_types.h
  • PARAM_SPI_CPHA : lpc17xx_spi.h
  • PARAM_SPI_CPOL : lpc17xx_spi.h
  • PARAM_SPI_DATA_ORDER : lpc17xx_spi.h
  • PARAM_SPI_DATABIT : lpc17xx_spi.h
  • PARAM_SPI_MODE : lpc17xx_spi.h
  • PARAM_SPI_STAT : lpc17xx_spi.h
  • PARAM_SPIx : lpc17xx_spi.h
  • PARAM_SSP_CPHA : lpc17xx_ssp.h
  • PARAM_SSP_CPOL : lpc17xx_ssp.h
  • PARAM_SSP_DATABIT : lpc17xx_ssp.h
  • PARAM_SSP_DMA : lpc17xx_ssp.h
  • PARAM_SSP_FRAME : lpc17xx_ssp.h
  • PARAM_SSP_INTCFG : lpc17xx_ssp.h
  • PARAM_SSP_INTCLR : lpc17xx_ssp.h
  • PARAM_SSP_INTSTAT : lpc17xx_ssp.h
  • PARAM_SSP_INTSTAT_RAW : lpc17xx_ssp.h
  • PARAM_SSP_MODE : lpc17xx_ssp.h
  • PARAM_SSP_STAT : lpc17xx_ssp.h
  • PARAM_SSPx : lpc17xx_ssp.h
  • PARAM_TIM_CAP_MODE_OPT : lpc17xx_timer.h
  • PARAM_TIM_COUNTER_INPUT_OPT : lpc17xx_timer.h
  • PARAM_TIM_EXTMATCH_OPT : lpc17xx_timer.h
  • PARAM_TIM_INT_TYPE : lpc17xx_timer.h
  • PARAM_TIM_MODE_OPT : lpc17xx_timer.h
  • PARAM_TIM_PRESCALE_OPT : lpc17xx_timer.h
  • PARAM_TIMx : lpc17xx_timer.h
  • PARAM_UART1_INTCFG : lpc17xx_uart.h
  • PARAM_UART1_MODEM : lpc17xx_uart.h
  • PARAM_UART1_MODEM_MODE : lpc17xx_uart.h
  • PARAM_UART1_MODEM_PIN : lpc17xx_uart.h
  • PARAM_UART1_RS485_CFG_DELAYVALUE : lpc17xx_uart.h
  • PARAM_UART1_RS485_CFG_MATCHADDRVALUE : lpc17xx_uart.h
  • PARAM_UART1_SIGNALSTATE : lpc17xx_uart.h
  • PARAM_UART_AUTOBAUD_INTSTAT : lpc17xx_uart.h
  • PARAM_UART_AUTOBAUD_MODE : lpc17xx_uart.h
  • PARAM_UART_DATABIT : lpc17xx_uart.h
  • PARAM_UART_FIFO_LEVEL : lpc17xx_uart.h
  • PARAM_UART_INTCFG : lpc17xx_uart.h
  • PARAM_UART_IrDA : lpc17xx_uart.h
  • PARAM_UART_IrDA_PULSEDIV : lpc17xx_uart.h
  • PARAM_UART_PARITY : lpc17xx_uart.h
  • PARAM_UART_RS485_DIRCTRL_PIN : lpc17xx_uart.h
  • PARAM_UART_STOPBIT : lpc17xx_uart.h
  • PARAM_UARTx : lpc17xx_uart.h
  • PARAM_WDT_CLK_OPT : lpc17xx_wdt.h
  • PARAM_WDT_MODE_OPT : lpc17xx_wdt.h
  • pASCSET_Data_t : drv_glcd.h
  • PBINT : demo.h
  • pBmp_t : drv_glcd.h
  • pca8581_rddat : pca8581_test.c
  • PCA8581_Read() : pca8581_test.c
  • PCA8581_SLVADDR : pca8581_test.c
  • pca8581_wrdat : pca8581_test.c
  • PCA8581_Write() : pca8581_test.c
  • PCF8833_ST_ADDR_MODE : drv_glcd.h
  • PCF8833_ST_ALL_PIXELS_OFF : drv_glcd.h
  • PCF8833_ST_ALL_PIXELS_ON : drv_glcd.h
  • PCF8833_ST_BOOSTER_ON : drv_glcd.h
  • PCF8833_ST_DISPLAY_MODE : drv_glcd.h
  • PCF8833_ST_IDLE_MODE : drv_glcd.h
  • PCF8833_ST_INV_MODE : drv_glcd.h
  • PCF8833_ST_LINE_ADDR_ORD : drv_glcd.h
  • PCF8833_ST_NORM_MODE : drv_glcd.h
  • PCF8833_ST_PARTIAL_MODE : drv_glcd.h
  • PCF8833_ST_PIXEL_FORM : drv_glcd.h
  • PCF8833_ST_RGB_ORD : drv_glcd.h
  • PCF8833_ST_SLEEP_MODE : drv_glcd.h
  • PCF8833_ST_TEARING_MODE : drv_glcd.h
  • PCF8833_ST_V_SCROLL_MODE : drv_glcd.h
  • PCF8833_ST_X_ADDR_ODR : drv_glcd.h
  • PCF8833_ST_Y_ADDR_ODR : drv_glcd.h
  • PCLK_DAC_IN_MHZ : dac_sinewave_test.c , dac_wave_generate.c
  • PCLKSEL0_Val : system_LPC17xx.c
  • PCLKSEL1_Val : system_LPC17xx.c
  • pCOLMOD_Data_t : drv_glcd.h
  • PCONP_Val : system_LPC17xx.c
  • PD_LED_PIN : emactest.c
  • pDATCTR_Data_t : drv_glcd.h
  • PendSV_IRQn : LPC17xx.h
  • PERI_ADDRESS : bitband.c
  • PERI_BIT : bitband.c
  • PFI : lpc_types.h
  • pFontType_t : drv_glcd.h
  • PFV : lpc_types.h
  • pGLCD_CmdCtrl_t : drv_glcd.h
  • pGPDMACh : lpc17xx_gpdma.c
  • PHASE_A_PIN : qei_test_velo.c
  • PHASE_B_PIN : qei_test_velo.c
  • PhaseCnt : qei_test_velo.c
  • PHY_TO : emac.h
  • PI : arm_math.h
  • PIN_CS : GLCD_SPI_LPC1700.c
  • PINSEL_ConfigPin() : lpc17xx_pinsel.h
  • PINSEL_ConfigTraceFunc() : lpc17xx_pinsel.h
  • PINSEL_FUNC_0 : lpc17xx_pinsel.h
  • PINSEL_FUNC_1 : lpc17xx_pinsel.h
  • PINSEL_FUNC_2 : lpc17xx_pinsel.h
  • PINSEL_FUNC_3 : lpc17xx_pinsel.h
  • PINSEL_I2C_Fast_Mode : lpc17xx_pinsel.h
  • PINSEL_I2C_Normal_Mode : lpc17xx_pinsel.h
  • PINSEL_I2CPADCFG_SCLDRV0 : lpc17xx_pinsel.h
  • PINSEL_I2CPADCFG_SCLI2C0 : lpc17xx_pinsel.h
  • PINSEL_I2CPADCFG_SDADRV0 : lpc17xx_pinsel.h
  • PINSEL_I2CPADCFG_SDAI2C0 : lpc17xx_pinsel.h
  • PINSEL_PIN_0 : lpc17xx_pinsel.h
  • PINSEL_PIN_1 : lpc17xx_pinsel.h
  • PINSEL_PIN_10 : lpc17xx_pinsel.h
  • PINSEL_PIN_11 : lpc17xx_pinsel.h
  • PINSEL_PIN_12 : lpc17xx_pinsel.h
  • PINSEL_PIN_13 : lpc17xx_pinsel.h
  • PINSEL_PIN_14 : lpc17xx_pinsel.h
  • PINSEL_PIN_15 : lpc17xx_pinsel.h
  • PINSEL_PIN_16 : lpc17xx_pinsel.h
  • PINSEL_PIN_17 : lpc17xx_pinsel.h
  • PINSEL_PIN_18 : lpc17xx_pinsel.h
  • PINSEL_PIN_19 : lpc17xx_pinsel.h
  • PINSEL_PIN_2 : lpc17xx_pinsel.h
  • PINSEL_PIN_20 : lpc17xx_pinsel.h
  • PINSEL_PIN_21 : lpc17xx_pinsel.h
  • PINSEL_PIN_22 : lpc17xx_pinsel.h
  • PINSEL_PIN_23 : lpc17xx_pinsel.h
  • PINSEL_PIN_24 : lpc17xx_pinsel.h
  • PINSEL_PIN_25 : lpc17xx_pinsel.h
  • PINSEL_PIN_26 : lpc17xx_pinsel.h
  • PINSEL_PIN_27 : lpc17xx_pinsel.h
  • PINSEL_PIN_28 : lpc17xx_pinsel.h
  • PINSEL_PIN_29 : lpc17xx_pinsel.h
  • PINSEL_PIN_3 : lpc17xx_pinsel.h
  • PINSEL_PIN_30 : lpc17xx_pinsel.h
  • PINSEL_PIN_31 : lpc17xx_pinsel.h
  • PINSEL_PIN_4 : lpc17xx_pinsel.h
  • PINSEL_PIN_5 : lpc17xx_pinsel.h
  • PINSEL_PIN_6 : lpc17xx_pinsel.h
  • PINSEL_PIN_7 : lpc17xx_pinsel.h
  • PINSEL_PIN_8 : lpc17xx_pinsel.h
  • PINSEL_PIN_9 : lpc17xx_pinsel.h
  • PINSEL_PINMODE_NORMAL : lpc17xx_pinsel.h
  • PINSEL_PINMODE_OPENDRAIN : lpc17xx_pinsel.h
  • PINSEL_PINMODE_PULLDOWN : lpc17xx_pinsel.h
  • PINSEL_PINMODE_PULLUP : lpc17xx_pinsel.h
  • PINSEL_PINMODE_TRISTATE : lpc17xx_pinsel.h
  • PINSEL_PORT_0 : lpc17xx_pinsel.h
  • PINSEL_PORT_1 : lpc17xx_pinsel.h
  • PINSEL_PORT_2 : lpc17xx_pinsel.h
  • PINSEL_PORT_3 : lpc17xx_pinsel.h
  • PINSEL_PORT_4 : lpc17xx_pinsel.h
  • PINSEL_SetI2C0Pins() : lpc17xx_pinsel.h
  • PIXEL_CONV : drv_glcd.h
  • PKT_DV : usbreg.h
  • PKT_LNGTH_MASK : usbreg.h
  • PKT_RDY : usbreg.h
  • pLdcPixel_t : drv_glcd.h
  • PLL0_IRQn : LPC17xx.h
  • PLL0_SETUP : system_LPC17xx.c
  • PLL0CFG_Val : system_LPC17xx.c
  • PLL1_IRQn : LPC17xx.h
  • PLL1_SETUP : system_LPC17xx.c
  • PLL1CFG_Val : system_LPC17xx.c
  • pMADCTR_Data_t : drv_glcd.h
  • POLL_LED : adc_burst_test.c
  • PORT_NUM : serial.h
  • PotVal : usbdmain.c
  • PRAM_I2S_FREQ : lpc17xx_can.h , lpc17xx_i2s.h
  • pRdBuf_M : microwire_test.c , ti_test.c
  • pRdBuf_S : ti_test.c
  • PrepareARP_ANSWER() : tcpip.c , tcpip.h
  • PrepareARP_REQUEST() : tcpip.h , tcpip.c
  • PrepareICMP_ECHO_REPLY() : tcpip.c , tcpip.h
  • PrepareTCP_DATA_FRAME() : tcpip.h , tcpip.c
  • PrepareTCP_FRAME() : tcpip.c , tcpip.h
  • PRINT_BUF_LEN : printf-stdarg.c
  • print_menu() : uart_hw_flow_control.c , adc_burst_test.c , adc_dma_test.c , adc_hardware_trigger_test.c , adc_interrupt_test.c , adc_polling_test.c , can_ledcontrol.c , can_self_test.c , can_test_bypass_mode.c , can_test_two_kit.c , dac_wave_generate.c , gpdma_sleep.c , link_list.c , gpdma_r2r_test.c , i2c_master_slave_int_test.c , i2c_monitor.c , pca8581_test.c , i2c_interrupt_test.c , i2c_polling_test.c , slave.c , wdt_interrupt_test.c , uart_irda_receive.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_two_kit.c , extint_sleep.c , uart_irda_transmit.c , lcdtest.c , uart_polling_test.c , ssp_dma.c , uart_autobaud_test.c , nmi_powerdown.c , rtc_deeppwd.c , wdt_deepsleep.c , rtc_calib.c , spi_loopback_test.c , spi_master.c , gen_diff_freqs.c , spi_polling_test.c , spi_sdcard.c , spi_slave.c , sc16is750_polling.c , uart_interrupt_test.c , uart_dma_test.c , timer_int_match.c , freqmeasure.c , ssp_master.c , timer_poll_match.c , ssp_slave.c , ti_test.c , timer_capture.c , gen_diff_delay.c , microwire_test.c , pwm_signal.c , sc16is750_int.c , i2s_polling.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c , spi_interrupt_test.c , rtc_alarm_cntincr_int.c , nvic_priority.c , vt_relocation.c , flash_2_ram.c , i2s_dma_test.c , i2s_irq_test.c , master.c , can_test_aflut.c
  • printf() : printf-stdarg.c
  • PrintMessage() : can_self_test.c , can_test_aflut.c , can_test_two_kit.c , can_test_bypass_mode.c
  • PRIVILEGE_LED : privilege.c
  • PRIVILEGE_LEDPORT : privilege.c
  • ProcessEthBroadcastFrame() : tcpip.c , tcpip.h
  • ProcessEthIAFrame() : tcpip.c , tcpip.h
  • ProcessICMPFrame() : tcpip.h , tcpip.c
  • ProcessTCPFrame() : tcpip.h , tcpip.c
  • PROT_ICMP : tcpip.h
  • PROT_TCP : tcpip.h
  • PROT_UDP : tcpip.h
  • PSOCK_BEGIN : psock.h
  • PSOCK_CLOSE : psock.h
  • PSOCK_CLOSE_EXIT : psock.h
  • psock_datalen() : psock.h , psock.c
  • PSOCK_DATALEN : psock.h
  • PSOCK_END : psock.h
  • PSOCK_EXIT : psock.h
  • PSOCK_GENERATOR_SEND : psock.h
  • PSOCK_INIT : psock.h
  • psock_init() : psock.h
  • psock_newdata() : psock.h , psock.c
  • PSOCK_NEWDATA : psock.h
  • PSOCK_READBUF : psock.h
  • PSOCK_READTO : psock.h
  • PSOCK_SEND : psock.h
  • PSOCK_SEND_STR : psock.h
  • PSOCK_WAIT_THREAD : psock.h
  • PSOCK_WAIT_UNTIL : psock.h
  • PT_BEGIN : pt.h
  • PT_END : pt.h
  • PT_ENDED : pt.h
  • PT_EXIT : pt.h
  • PT_EXITED : pt.h
  • PT_INIT : pt.h
  • PT_RESTART : pt.h
  • PT_SCHEDULE : pt.h
  • PT_SPAWN : pt.h
  • PT_THREAD() : psock.h , psock.c , psock.h , httpd-cgi.h , psock.h , psock.c , psock.h , pt.h
  • PT_WAIT_THREAD : pt.h
  • PT_WAIT_UNTIL : pt.h
  • PT_WAIT_WHILE : pt.h
  • PT_WAITING : pt.h
  • PT_YIELD : pt.h
  • PT_YIELD_UNTIL : pt.h
  • PT_YIELDED : pt.h
  • PTIN : drv_glcd.h
  • PTLAR : drv_glcd.h
  • PTLON : drv_glcd.h
  • PTLOUT : drv_glcd.h
  • Purple : GLCD.h
  • putchar : printf-stdarg.c
  • PWebSide : easyweb.h
  • PWM0_State : pwm_signal.c
  • PWM1_IRQHandler() : pwm_match_int.c
  • PWM1_IRQn : LPC17xx.h
  • PWM1_State : pwm_signal.c
  • PWM2_State : pwm_signal.c
  • PWM3_State : pwm_signal.c
  • PWM_CCR_BITMASK : lpc17xx_pwm.h
  • PWM_CCR_CAP_FALLING : lpc17xx_pwm.h
  • PWM_CCR_CAP_RISING : lpc17xx_pwm.h
  • PWM_CCR_INT_ON_CAP : lpc17xx_pwm.h
  • PWM_CHANNEL_DUAL_EDGE : lpc17xx_pwm.h
  • PWM_CHANNEL_EDGE_OPT : lpc17xx_pwm.h
  • PWM_CHANNEL_SINGLE_EDGE : lpc17xx_pwm.h
  • PWM_ChannelCmd() : lpc17xx_pwm.h
  • PWM_ChannelConfig() : lpc17xx_pwm.h
  • PWM_ClearIntPending() : lpc17xx_pwm.h
  • PWM_Cmd() : lpc17xx_pwm.h
  • PWM_ConfigCapture() : lpc17xx_pwm.h
  • PWM_ConfigMatch() : lpc17xx_pwm.h
  • PWM_ConfigStructInit() : lpc17xx_pwm.h
  • PWM_COUNTER_ANY : lpc17xx_pwm.h
  • PWM_COUNTER_EDGE_OPT : lpc17xx_pwm.h
  • PWM_COUNTER_FALLING : lpc17xx_pwm.h
  • PWM_COUNTER_INPUTSEL_OPT : lpc17xx_pwm.h
  • PWM_COUNTER_PCAP1_0 : lpc17xx_pwm.h
  • PWM_COUNTER_PCAP1_1 : lpc17xx_pwm.h
  • PWM_COUNTER_RISING : lpc17xx_pwm.h
  • PWM_CounterCmd() : lpc17xx_pwm.h
  • PWM_CTCR_BITMASK : lpc17xx_pwm.h
  • PWM_CTCR_MODE : lpc17xx_pwm.h
  • PWM_CTCR_SELECT_INPUT : lpc17xx_pwm.h
  • PWM_DeInit() : lpc17xx_pwm.h
  • PWM_GetCaptureValue() : lpc17xx_pwm.h
  • PWM_GetIntStatus() : lpc17xx_pwm.h
  • PWM_Init() : lpc17xx_pwm.h
  • PWM_INTSTAT_CAP0 : lpc17xx_pwm.h
  • PWM_INTSTAT_CAP1 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR0 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR1 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR2 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR3 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR4 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR5 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR6 : lpc17xx_pwm.h
  • PWM_INTSTAT_TYPE : lpc17xx_pwm.h
  • PWM_IR_BITMASK : lpc17xx_pwm.h
  • PWM_IR_PWMCAPn : lpc17xx_pwm.h
  • PWM_IR_PWMMRn : lpc17xx_pwm.h
  • PWM_LER_BITMASK : lpc17xx_pwm.h
  • PWM_LER_EN_MATCHn_LATCH : lpc17xx_pwm.h
  • PWM_MATCH_UPDATE_NEXT_RST : lpc17xx_pwm.h
  • PWM_MATCH_UPDATE_NOW : lpc17xx_pwm.h
  • PWM_MATCH_UPDATE_OPT : lpc17xx_pwm.h
  • PWM_MatchUpdate() : lpc17xx_pwm.h
  • PWM_MCR_BITMASK : lpc17xx_pwm.h
  • PWM_MCR_INT_ON_MATCH : lpc17xx_pwm.h
  • PWM_MCR_RESET_ON_MATCH : lpc17xx_pwm.h
  • PWM_MCR_STOP_ON_MATCH : lpc17xx_pwm.h
  • PWM_MODE_COUNTER : lpc17xx_pwm.h
  • PWM_MODE_TIMER : lpc17xx_pwm.h
  • PWM_MultiMatchUpdate() : lpc17xx_pwm.c
  • PWM_PCR_BITMASK : lpc17xx_pwm.h
  • PWM_PCR_PWMENAn : lpc17xx_pwm.h
  • PWM_PCR_PWMSELn : lpc17xx_pwm.h
  • PWM_PinConfig() : lpc17xx_pwm.h
  • PWM_ResetCounter() : lpc17xx_pwm.h
  • PWM_TC_MODE_OPT : lpc17xx_pwm.h
  • PWM_TCR_BITMASK : lpc17xx_pwm.h
  • PWM_TCR_COUNTER_ENABLE : lpc17xx_pwm.h
  • PWM_TCR_COUNTER_RESET : lpc17xx_pwm.h
  • PWM_TCR_PWM_ENABLE : lpc17xx_pwm.h
  • PWM_TIMER_PRESCALE_OPT : lpc17xx_pwm.h
  • PWM_TIMER_PRESCALE_TICKVAL : lpc17xx_pwm.h
  • PWM_TIMER_PRESCALE_USVAL : lpc17xx_pwm.h
  • pWrBuf_M : ti_test.c
  • pWrBuf_S : microwire_test.c , ti_test.c
  • PWRCTR : drv_glcd.h
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- q -

  • q15_t : arm_math.h
  • q31_t : arm_math.h
  • q63_t : arm_math.h
  • q7_t : arm_math.h
  • QEI_CalculateRPM() : lpc17xx_qei.h
  • QEI_CAPMODE_2X : lpc17xx_qei.h
  • QEI_CAPMODE_4X : lpc17xx_qei.h
  • QEI_COMPPOS_CH_0 : lpc17xx_qei.h
  • QEI_COMPPOS_CH_1 : lpc17xx_qei.h
  • QEI_COMPPOS_CH_2 : lpc17xx_qei.h
  • QEI_CON_BITMASK : lpc17xx_qei.h
  • QEI_CON_RESI : lpc17xx_qei.h
  • QEI_CON_RESP : lpc17xx_qei.h
  • QEI_CON_RESPI : lpc17xx_qei.h
  • QEI_CON_RESV : lpc17xx_qei.h
  • QEI_CONF_BITMASK : lpc17xx_qei.h
  • QEI_CONF_CAPMODE : lpc17xx_qei.h
  • QEI_CONF_DIRINV : lpc17xx_qei.h
  • QEI_CONF_INVINX : lpc17xx_qei.h
  • QEI_CONF_SIGMODE : lpc17xx_qei.h
  • QEI_ConfigStructInit() : lpc17xx_qei.h
  • QEI_DeInit() : lpc17xx_qei.h
  • QEI_DIRINV_CMPL : lpc17xx_qei.h
  • QEI_DIRINV_NONE : lpc17xx_qei.h
  • QEI_GetIndex() : lpc17xx_qei.h
  • QEI_GetIntStatus() : lpc17xx_qei.h
  • QEI_GetPosition() : lpc17xx_qei.h
  • QEI_GetStatus() : lpc17xx_qei.h
  • QEI_GetTimer() : lpc17xx_qei.h
  • QEI_GetVelocity() : lpc17xx_qei.h
  • QEI_GetVelocityCap() : lpc17xx_qei.h
  • qei_idx_pin : qei_test_velo.c
  • QEI_IECLR_BITMASK : lpc17xx_qei.h
  • QEI_IECLR_DIR_Int : lpc17xx_qei.h
  • QEI_IECLR_ENCLK_Int : lpc17xx_qei.h
  • QEI_IECLR_ERR_Int : lpc17xx_qei.h
  • QEI_IECLR_INX_Int : lpc17xx_qei.h
  • QEI_IECLR_POS0_Int : lpc17xx_qei.h
  • QEI_IECLR_POS0REV_Int : lpc17xx_qei.h
  • QEI_IECLR_POS1_Int : lpc17xx_qei.h
  • QEI_IECLR_POS1REV_Int : lpc17xx_qei.h
  • QEI_IECLR_POS2_Int : lpc17xx_qei.h
  • QEI_IECLR_POS2REV_Int : lpc17xx_qei.h
  • QEI_IECLR_REV_Int : lpc17xx_qei.h
  • QEI_IECLR_TIM_Int : lpc17xx_qei.h
  • QEI_IECLR_VELC_Int : lpc17xx_qei.h
  • QEI_IESET_BITMASK : lpc17xx_qei.h
  • QEI_IESET_DIR_Int : lpc17xx_qei.h
  • QEI_IESET_ENCLK_Int : lpc17xx_qei.h
  • QEI_IESET_ERR_Int : lpc17xx_qei.h
  • QEI_IESET_INX_Int : lpc17xx_qei.h
  • QEI_IESET_POS0_Int : lpc17xx_qei.h
  • QEI_IESET_POS0REV_Int : lpc17xx_qei.h
  • QEI_IESET_POS1_Int : lpc17xx_qei.h
  • QEI_IESET_POS1REV_Int : lpc17xx_qei.h
  • QEI_IESET_POS2_Int : lpc17xx_qei.h
  • QEI_IESET_POS2REV_Int : lpc17xx_qei.h
  • QEI_IESET_REV_Int : lpc17xx_qei.h
  • QEI_IESET_TIM_Int : lpc17xx_qei.h
  • QEI_IESET_VELC_Int : lpc17xx_qei.h
  • QEI_Init() : lpc17xx_qei.h
  • QEI_IntClear() : lpc17xx_qei.h
  • QEI_INTCLR_BITMASK : lpc17xx_qei.h
  • QEI_INTCLR_DIR_Int : lpc17xx_qei.h
  • QEI_INTCLR_ENCLK_Int : lpc17xx_qei.h
  • QEI_INTCLR_ERR_Int : lpc17xx_qei.h
  • QEI_INTCLR_INX_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS0_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS0REV_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS1_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS1REV_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS2_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS2REV_Int : lpc17xx_qei.h
  • QEI_INTCLR_REV_Int : lpc17xx_qei.h
  • QEI_INTCLR_TIM_Int : lpc17xx_qei.h
  • QEI_INTCLR_VELC_Int : lpc17xx_qei.h
  • QEI_IntCmd() : lpc17xx_qei.h
  • QEI_INTEN_BITMASK : lpc17xx_qei.h
  • QEI_INTEN_DIR_Int : lpc17xx_qei.h
  • QEI_INTEN_ENCLK_Int : lpc17xx_qei.h
  • QEI_INTEN_ERR_Int : lpc17xx_qei.h
  • QEI_INTEN_INX_Int : lpc17xx_qei.h
  • QEI_INTEN_POS0_Int : lpc17xx_qei.h
  • QEI_INTEN_POS0REV_Int : lpc17xx_qei.h
  • QEI_INTEN_POS1_Int : lpc17xx_qei.h
  • QEI_INTEN_POS1REV_Int : lpc17xx_qei.h
  • QEI_INTEN_POS2_Int : lpc17xx_qei.h
  • QEI_INTEN_POS2REV_Int : lpc17xx_qei.h
  • QEI_INTEN_REV_Int : lpc17xx_qei.h
  • QEI_INTEN_TIM_Int : lpc17xx_qei.h
  • QEI_INTEN_VELC_Int : lpc17xx_qei.h
  • QEI_INTFLAG_DIR_Int : lpc17xx_qei.h
  • QEI_INTFLAG_ENCLK_Int : lpc17xx_qei.h
  • QEI_INTFLAG_ERR_Int : lpc17xx_qei.h
  • QEI_INTFLAG_INX_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS0_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS0REV_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS1_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS1REV_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS2_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS2REV_Int : lpc17xx_qei.h
  • QEI_INTFLAG_REV_Int : lpc17xx_qei.h
  • QEI_INTFLAG_TIM_Int : lpc17xx_qei.h
  • QEI_INTFLAG_VELC_Int : lpc17xx_qei.h
  • QEI_IntSet() : lpc17xx_qei.h
  • QEI_INTSET_BITMASK : lpc17xx_qei.h
  • QEI_INTSET_DIR_Int : lpc17xx_qei.h
  • QEI_INTSET_ENCLK_Int : lpc17xx_qei.h
  • QEI_INTSET_ERR_Int : lpc17xx_qei.h
  • QEI_INTSET_INX_Int : lpc17xx_qei.h
  • QEI_INTSET_POS0_Int : lpc17xx_qei.h
  • QEI_INTSET_POS0REV_Int : lpc17xx_qei.h
  • QEI_INTSET_POS1_Int : lpc17xx_qei.h
  • QEI_INTSET_POS1REV_Int : lpc17xx_qei.h
  • QEI_INTSET_POS2_Int : lpc17xx_qei.h
  • QEI_INTSET_POS2REV_Int : lpc17xx_qei.h
  • QEI_INTSET_REV_Int : lpc17xx_qei.h
  • QEI_INTSET_TIM_Int : lpc17xx_qei.h
  • QEI_INTSET_VELC_Int : lpc17xx_qei.h
  • QEI_INTSTAT_BITMASK : lpc17xx_qei.h
  • QEI_INTSTAT_DIR_Int : lpc17xx_qei.h
  • QEI_INTSTAT_ENCLK_Int : lpc17xx_qei.h
  • QEI_INTSTAT_ERR_Int : lpc17xx_qei.h
  • QEI_INTSTAT_INX_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS0_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS0REV_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS1_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS1REV_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS2_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS2REV_Int : lpc17xx_qei.h
  • QEI_INTSTAT_REV_Int : lpc17xx_qei.h
  • QEI_INTSTAT_TIM_Int : lpc17xx_qei.h
  • QEI_INTSTAT_VELC_Int : lpc17xx_qei.h
  • QEI_INVINX_EN : lpc17xx_qei.h
  • QEI_INVINX_NONE : lpc17xx_qei.h
  • QEI_IRQHandler() : qei_test_velo.c
  • QEI_IRQn : LPC17xx.h
  • qei_phaA_pin : qei_test_velo.c
  • qei_phaB_pin : qei_test_velo.c
  • QEI_Reset() : lpc17xx_qei.h
  • QEI_RESET_IDX : lpc17xx_qei.h
  • QEI_RESET_POS : lpc17xx_qei.h
  • QEI_RESET_POSOnIDX : lpc17xx_qei.h
  • QEI_RESET_VEL : lpc17xx_qei.h
  • QEI_SetDigiFilter() : lpc17xx_qei.h
  • QEI_SetIndexComp() : lpc17xx_qei.h
  • QEI_SetMaxPosition() : lpc17xx_qei.h
  • QEI_SetPositionComp() : lpc17xx_qei.h
  • QEI_SetTimerReload() : lpc17xx_qei.h
  • QEI_SetVelocityComp() : lpc17xx_qei.h
  • QEI_SIGNALMODE_CLKDIR : lpc17xx_qei.h
  • QEI_SIGNALMODE_QUAD : lpc17xx_qei.h
  • QEI_STAT_BITMASK : lpc17xx_qei.h
  • QEI_STAT_DIR : lpc17xx_qei.h
  • QEI_STATUS_DIR : lpc17xx_qei.h
  • QEI_TIMERRELOAD_TICKVAL : lpc17xx_qei.h
  • QEI_TIMERRELOAD_USVAL : lpc17xx_qei.h
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- r -

  • R1_ADDR_ERR : spi_sdcard.c
  • R1_CRC_ERR : spi_sdcard.c
  • R1_ERASE : spi_sdcard.c
  • R1_ERASE_SEQ : spi_sdcard.c
  • R1_IDLE : spi_sdcard.c
  • R1_ILLEGAL : spi_sdcard.c
  • R1_NOERROR : spi_sdcard.c
  • R1_PARAM_ERR : spi_sdcard.c
  • R2_CTRL_ERR : spi_sdcard.c
  • R2_ECC_FAIL : spi_sdcard.c
  • R2_ERASE_PARAM : spi_sdcard.c
  • R2_ERROR : spi_sdcard.c
  • R2_LOCKED : spi_sdcard.c
  • R2_RANGE_ERR : spi_sdcard.c
  • R2_WP_FAILED : spi_sdcard.c
  • R2_WP_VIOL : spi_sdcard.c
  • RAMWR : drv_glcd.h
  • RASET : drv_glcd.h
  • rb : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • RdCmdDat() : usbhw.c
  • RDDID : drv_glcd.h
  • RDDST : drv_glcd.h
  • RDEV : drv_glcd.h
  • RDID1 : drv_glcd.h
  • RDID2 : drv_glcd.h
  • RDID3 : drv_glcd.h
  • RdIdx_M : microwire_test.c , ti_test.c
  • RdIdx_S : ti_test.c
  • RDRR : drv_glcd.h
  • Rdy4Tx() : EMAC.c , EMAC.h
  • ReadFrame_EMAC() : EMAC.c
  • ReadFrameBE_EMAC() : EMAC.c , EMAC.h
  • realCoefAQ31 : arm_common_tables.h , arm_rfft_init_q31.c
  • realCoefBQ31 : arm_common_tables.h , arm_rfft_init_q31.c
  • RecdFrameIP : tcpip.h
  • RecdFrameLength : tcpip.h
  • RecdFrameMAC : tcpip.h
  • RecdIPFrameLength : tcpip.h
  • ReceiveLength : emactest.c
  • RECEIVER_ALWAYS_EN : rs485_slave.c
  • Recipient : usb.h
  • recv_menu : rs485_master.c
  • recv_msg : rs485_slave.c
  • Red : GLCD.h
  • refDotProdOut : arm_dotproduct_example_f32.c
  • refIndex : arm_fft_bin_example_f32.c
  • refOutput : arm_fir_data.c , arm_fir_example_f32.c
  • refVarianceOut : arm_variance_example_f32.c
  • REGS_ADDR : i2c_interrupt_test.c , i2c_polling_test.c
  • REMOTE_FRAME : lpc17xx_can.h
  • RemoteIP : tcpip.h
  • RemoteMAC : tcpip.h
  • REQUEST_CLASS : usb.h
  • REQUEST_DEVICE_TO_HOST : usb.h
  • REQUEST_HOST_TO_DEVICE : usb.h
  • REQUEST_RESERVED : usb.h
  • REQUEST_STANDARD : usb.h
  • REQUEST_TO_DEVICE : usb.h
  • REQUEST_TO_ENDPOINT : usb.h
  • REQUEST_TO_INTERFACE : usb.h
  • REQUEST_TO_OTHER : usb.h
  • REQUEST_TYPE : usb.h
  • REQUEST_VENDOR : usb.h
  • RequestSend() : EMAC.c , EMAC.h
  • RESET : lpc_types.h
  • resolv_appcall() : resolv.c
  • resolv_conf() : resolv.c
  • RESOLV_ENTRIES : resolv.c
  • resolv_found() : resolv.h
  • resolv_getserver() : resolv.c
  • resolv_init() : resolv.c
  • resolv_lookup() : resolv.c
  • resolv_query() : resolv.c
  • RETRY_TIMEOUT : tcpip.h
  • RetryCounter : tcpip.h
  • RGBSET : drv_glcd.h
  • RIT_Cmd() : lpc17xx_rit.h
  • RIT_CTRL_ENBR : lpc17xx_rit.h
  • RIT_CTRL_ENCLR : lpc17xx_rit.h
  • RIT_CTRL_INTEN : lpc17xx_rit.h
  • RIT_CTRL_TEN : lpc17xx_rit.h
  • RIT_DeInit() : lpc17xx_rit.h
  • RIT_GetIntStatus() : lpc17xx_rit.h
  • RIT_Init() : lpc17xx_rit.h
  • RIT_IRQHandler() : rit_interrupt.c
  • RIT_IRQn : LPC17xx.h
  • RIT_TimerClearCmd() : lpc17xx_rit.h
  • RIT_TimerConfig() : lpc17xx_rit.h
  • RIT_TimerDebugCmd() : lpc17xx_rit.h
  • RMII : emac.h
  • RMWIN : drv_glcd.h
  • RMWOUT : drv_glcd.h
  • RNE : GLCD_SPI_LPC1700.c
  • RTC_AlarmIntConfig() : lpc17xx_rtc.h
  • RTC_AMR_AMRDOM : lpc17xx_rtc.h
  • RTC_AMR_AMRDOW : lpc17xx_rtc.h
  • RTC_AMR_AMRDOY : lpc17xx_rtc.h
  • RTC_AMR_AMRHOUR : lpc17xx_rtc.h
  • RTC_AMR_AMRMIN : lpc17xx_rtc.h
  • RTC_AMR_AMRMON : lpc17xx_rtc.h
  • RTC_AMR_AMRSEC : lpc17xx_rtc.h
  • RTC_AMR_AMRYEAR : lpc17xx_rtc.h
  • RTC_AMR_BITMASK : lpc17xx_rtc.h
  • RTC_AUX_RTC_OSCF : lpc17xx_rtc.h
  • RTC_AUXEN_RTC_OSCFEN : lpc17xx_rtc.h
  • RTC_CALIB_DIR_BACKWARD : lpc17xx_rtc.h
  • RTC_CALIB_DIR_FORWARD : lpc17xx_rtc.h
  • RTC_CalibConfig() : lpc17xx_rtc.h
  • RTC_CalibCounterCmd() : lpc17xx_rtc.h
  • RTC_CALIBRATION_CALVAL_MASK : lpc17xx_rtc.h
  • RTC_CALIBRATION_LIBDIR : lpc17xx_rtc.h
  • RTC_CALIBRATION_MAX : lpc17xx_rtc.h
  • RTC_CCR_BITMASK : lpc17xx_rtc.h
  • RTC_CCR_CCALEN : lpc17xx_rtc.h
  • RTC_CCR_CLKEN : lpc17xx_rtc.h
  • RTC_CCR_CTCRST : lpc17xx_rtc.h
  • RTC_CIIR_BITMASK : lpc17xx_rtc.h
  • RTC_CIIR_IMDOM : lpc17xx_rtc.h
  • RTC_CIIR_IMDOW : lpc17xx_rtc.h
  • RTC_CIIR_IMDOY : lpc17xx_rtc.h
  • RTC_CIIR_IMHOUR : lpc17xx_rtc.h
  • RTC_CIIR_IMMIN : lpc17xx_rtc.h
  • RTC_CIIR_IMMON : lpc17xx_rtc.h
  • RTC_CIIR_IMSEC : lpc17xx_rtc.h
  • RTC_CIIR_IMYEAR : lpc17xx_rtc.h
  • RTC_ClearIntPending() : lpc17xx_rtc.h
  • RTC_CLK : system_LPC17xx.c
  • RTC_Cmd() : lpc17xx_rtc.h
  • RTC_CntIncrIntConfig() : lpc17xx_rtc.h
  • RTC_CTIME0_DOW_MASK : lpc17xx_rtc.h
  • RTC_CTIME0_HOURS_MASK : lpc17xx_rtc.h
  • RTC_CTIME0_MINUTES_MASK : lpc17xx_rtc.h
  • RTC_CTIME0_SECONDS_MASK : lpc17xx_rtc.h
  • RTC_CTIME1_DOM_MASK : lpc17xx_rtc.h
  • RTC_CTIME1_MONTH_MASK : lpc17xx_rtc.h
  • RTC_CTIME1_YEAR_MASK : lpc17xx_rtc.h
  • RTC_CTIME2_DOY_MASK : lpc17xx_rtc.h
  • RTC_DAYOFMONTH_MAX : lpc17xx_rtc.h
  • RTC_DAYOFMONTH_MIN : lpc17xx_rtc.h
  • RTC_DAYOFWEEK_MAX : lpc17xx_rtc.h
  • RTC_DAYOFYEAR_MAX : lpc17xx_rtc.h
  • RTC_DAYOFYEAR_MIN : lpc17xx_rtc.h
  • RTC_DeInit() : lpc17xx_rtc.h
  • RTC_DOM_MASK : lpc17xx_rtc.h
  • RTC_DOW_MASK : lpc17xx_rtc.h
  • RTC_DOY_MASK : lpc17xx_rtc.h
  • RTC_GetAlarmTime() : lpc17xx_rtc.h
  • RTC_GetFullAlarmTime() : lpc17xx_rtc.h
  • RTC_GetFullTime() : lpc17xx_rtc.h
  • RTC_GetIntPending() : lpc17xx_rtc.h
  • RTC_GetTime() : lpc17xx_rtc.h
  • RTC_HOUR_MASK : lpc17xx_rtc.h
  • RTC_HOUR_MAX : lpc17xx_rtc.h
  • RTC_ILR_BITMASK : lpc17xx_rtc.h
  • RTC_Init() : lpc17xx_rtc.h
  • RTC_INT_ALARM : lpc17xx_rtc.h
  • RTC_INT_COUNTER_INCREASE : lpc17xx_rtc.h
  • RTC_INT_OPT : lpc17xx_rtc.h
  • RTC_IRL_RTCALF : lpc17xx_rtc.h
  • RTC_IRL_RTCCIF : lpc17xx_rtc.h
  • RTC_IRQHandle() : rtc_calib.c
  • RTC_IRQHandler() : rtc_deeppwd.c , rtc_calib.c , rtc_alarm_cntincr_int.c
  • RTC_IRQn : LPC17xx.h
  • RTC_MIN_MASK : lpc17xx_rtc.h
  • RTC_MINUTE_MAX : lpc17xx_rtc.h
  • RTC_MONTH_MASK : lpc17xx_rtc.h
  • RTC_MONTH_MAX : lpc17xx_rtc.h
  • RTC_MONTH_MIN : lpc17xx_rtc.h
  • RTC_ReadGPREG() : lpc17xx_rtc.h
  • RTC_ResetClockTickCounter() : lpc17xx_rtc.h
  • RTC_SEC_MASK : lpc17xx_rtc.h
  • RTC_SECOND_MAX : lpc17xx_rtc.h
  • RTC_SetAlarmTime() : lpc17xx_rtc.h
  • RTC_SetFullAlarmTime() : lpc17xx_rtc.h
  • RTC_SetFullTime() : lpc17xx_rtc.h
  • RTC_SetTime() : lpc17xx_rtc.h
  • RTC_TIMETYPE_DAYOFMONTH : lpc17xx_rtc.h
  • RTC_TIMETYPE_DAYOFWEEK : lpc17xx_rtc.h
  • RTC_TIMETYPE_DAYOFYEAR : lpc17xx_rtc.h
  • RTC_TIMETYPE_HOUR : lpc17xx_rtc.h
  • RTC_TIMETYPE_MINUTE : lpc17xx_rtc.h
  • RTC_TIMETYPE_MONTH : lpc17xx_rtc.h
  • RTC_TIMETYPE_Num : lpc17xx_rtc.h
  • RTC_TIMETYPE_SECOND : lpc17xx_rtc.h
  • RTC_TIMETYPE_YEAR : lpc17xx_rtc.h
  • RTC_WriteGPREG() : lpc17xx_rtc.h
  • RTC_YEAR_MASK : lpc17xx_rtc.h
  • RTC_YEAR_MAX : lpc17xx_rtc.h
  • RTS_State : uart_fullmodem_test.c
  • Rx_Buf : spi_master.c , spi_loopback_test.c , spi_slave.c
  • rx_buf : uart_dma_test.c
  • Rx_Buf : ssp_slave.c , ssp_master.c
  • RX_BUF_SIZE : uart_dma_test.c
  • RX_BUFFER_SIZE : can_test_two_kit.c
  • rx_depth_irq : i2s_irq_test.c , i2s_two_kit.c , i2s_mclk.c
  • RX_LED_PIN : emactest.c
  • RxDoneCount : emactest.c
  • RxENDPKT_INT : usbreg.h
  • RXErrorCount : emactest.c
  • RXFIFO_EMPTY : i2s_mclk.c , i2s_irq_test.c
  • RxFinishedCount : emactest.c
  • RXMsg : can_test_bypass_mode.c , can_test_two_kit.c , can_self_test.c , can_ledcontrol.c
  • RXOverrunCount : emactest.c
  • rxsetup : pca8581_test.c
  • RxTCPBuffer : tcpip.h
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- s -

  • S2 : vcomdemo.h
  • SC16IS740_IOCON_REG : spi_interrupt_test.c , sc16is750_int.c , sc16is750_polling.c , spi_polling_test.c
  • SC16IS740_IODIR_REG : sc16is750_int.c , sc16is750_polling.c , spi_interrupt_test.c , spi_polling_test.c
  • SC16IS740_IOSTATE_REG : spi_interrupt_test.c , spi_polling_test.c , sc16is750_int.c , sc16is750_polling.c
  • SC16IS740_RD_CMD : sc16is750_int.c , sc16is750_polling.c , spi_interrupt_test.c , spi_polling_test.c
  • SC16IS740_WR_CMD : spi_interrupt_test.c , spi_polling_test.c , sc16is750_int.c , sc16is750_polling.c
  • SCB : core_cm3.h
  • SCB_AIRCR_ENDIANESS_Msk : core_cm3.h
  • SCB_AIRCR_ENDIANESS_Pos : core_cm3.h
  • SCB_AIRCR_PRIGROUP_Msk : core_cm3.h
  • SCB_AIRCR_PRIGROUP_Pos : core_cm3.h
  • SCB_AIRCR_SYSRESETREQ_Msk : core_cm3.h
  • SCB_AIRCR_SYSRESETREQ_Pos : core_cm3.h
  • SCB_AIRCR_VECTCLRACTIVE_Msk : core_cm3.h
  • SCB_AIRCR_VECTCLRACTIVE_Pos : core_cm3.h
  • SCB_AIRCR_VECTKEY_Msk : core_cm3.h
  • SCB_AIRCR_VECTKEY_Pos : core_cm3.h
  • SCB_AIRCR_VECTKEYSTAT_Msk : core_cm3.h
  • SCB_AIRCR_VECTKEYSTAT_Pos : core_cm3.h
  • SCB_AIRCR_VECTRESET_Msk : core_cm3.h
  • SCB_AIRCR_VECTRESET_Pos : core_cm3.h
  • SCB_BASE : core_cm3.h
  • SCB_CCR_BFHFNMIGN_Msk : core_cm3.h
  • SCB_CCR_BFHFNMIGN_Pos : core_cm3.h
  • SCB_CCR_DIV_0_TRP_Msk : core_cm3.h
  • SCB_CCR_DIV_0_TRP_Pos : core_cm3.h
  • SCB_CCR_NONBASETHRDENA_Msk : core_cm3.h
  • SCB_CCR_NONBASETHRDENA_Pos : core_cm3.h
  • SCB_CCR_STKALIGN_Msk : core_cm3.h
  • SCB_CCR_STKALIGN_Pos : core_cm3.h
  • SCB_CCR_UNALIGN_TRP_Msk : core_cm3.h
  • SCB_CCR_UNALIGN_TRP_Pos : core_cm3.h
  • SCB_CCR_USERSETMPEND_Msk : core_cm3.h
  • SCB_CCR_USERSETMPEND_Pos : core_cm3.h
  • SCB_CFSR_BUSFAULTSR_Msk : core_cm3.h
  • SCB_CFSR_BUSFAULTSR_Pos : core_cm3.h
  • SCB_CFSR_MEMFAULTSR_Msk : core_cm3.h
  • SCB_CFSR_MEMFAULTSR_Pos : core_cm3.h
  • SCB_CFSR_USGFAULTSR_Msk : core_cm3.h
  • SCB_CFSR_USGFAULTSR_Pos : core_cm3.h
  • SCB_CPUID_ARCHITECTURE_Msk : core_cm3.h
  • SCB_CPUID_ARCHITECTURE_Pos : core_cm3.h
  • SCB_CPUID_IMPLEMENTER_Msk : core_cm3.h
  • SCB_CPUID_IMPLEMENTER_Pos : core_cm3.h
  • SCB_CPUID_PARTNO_Msk : core_cm3.h
  • SCB_CPUID_PARTNO_Pos : core_cm3.h
  • SCB_CPUID_REVISION_Msk : core_cm3.h
  • SCB_CPUID_REVISION_Pos : core_cm3.h
  • SCB_CPUID_VARIANT_Msk : core_cm3.h
  • SCB_CPUID_VARIANT_Pos : core_cm3.h
  • SCB_DFSR_BKPT_Msk : core_cm3.h
  • SCB_DFSR_BKPT_Pos : core_cm3.h
  • SCB_DFSR_DWTTRAP_Msk : core_cm3.h
  • SCB_DFSR_DWTTRAP_Pos : core_cm3.h
  • SCB_DFSR_EXTERNAL_Msk : core_cm3.h
  • SCB_DFSR_EXTERNAL_Pos : core_cm3.h
  • SCB_DFSR_HALTED_Msk : core_cm3.h
  • SCB_DFSR_HALTED_Pos : core_cm3.h
  • SCB_DFSR_VCATCH_Msk : core_cm3.h
  • SCB_DFSR_VCATCH_Pos : core_cm3.h
  • SCB_HFSR_DEBUGEVT_Msk : core_cm3.h
  • SCB_HFSR_DEBUGEVT_Pos : core_cm3.h
  • SCB_HFSR_FORCED_Msk : core_cm3.h
  • SCB_HFSR_FORCED_Pos : core_cm3.h
  • SCB_HFSR_VECTTBL_Msk : core_cm3.h
  • SCB_HFSR_VECTTBL_Pos : core_cm3.h
  • SCB_ICSR_ISRPENDING_Msk : core_cm3.h
  • SCB_ICSR_ISRPENDING_Pos : core_cm3.h
  • SCB_ICSR_ISRPREEMPT_Msk : core_cm3.h
  • SCB_ICSR_ISRPREEMPT_Pos : core_cm3.h
  • SCB_ICSR_NMIPENDSET_Msk : core_cm3.h
  • SCB_ICSR_NMIPENDSET_Pos : core_cm3.h
  • SCB_ICSR_PENDSTCLR_Msk : core_cm3.h
  • SCB_ICSR_PENDSTCLR_Pos : core_cm3.h
  • SCB_ICSR_PENDSTSET_Msk : core_cm3.h
  • SCB_ICSR_PENDSTSET_Pos : core_cm3.h
  • SCB_ICSR_PENDSVCLR_Msk : core_cm3.h
  • SCB_ICSR_PENDSVCLR_Pos : core_cm3.h
  • SCB_ICSR_PENDSVSET_Msk : core_cm3.h
  • SCB_ICSR_PENDSVSET_Pos : core_cm3.h
  • SCB_ICSR_RETTOBASE_Msk : core_cm3.h
  • SCB_ICSR_RETTOBASE_Pos : core_cm3.h
  • SCB_ICSR_VECTACTIVE_Msk : core_cm3.h
  • SCB_ICSR_VECTACTIVE_Pos : core_cm3.h
  • SCB_ICSR_VECTPENDING_Msk : core_cm3.h
  • SCB_ICSR_VECTPENDING_Pos : core_cm3.h
  • SCB_SCR_SEVONPEND_Msk : core_cm3.h
  • SCB_SCR_SEVONPEND_Pos : core_cm3.h
  • SCB_SCR_SLEEPDEEP_Msk : core_cm3.h
  • SCB_SCR_SLEEPDEEP_Pos : core_cm3.h
  • SCB_SCR_SLEEPONEXIT_Msk : core_cm3.h
  • SCB_SCR_SLEEPONEXIT_Pos : core_cm3.h
  • SCB_SHCSR_BUSFAULTACT_Msk : core_cm3.h
  • SCB_SHCSR_BUSFAULTACT_Pos : core_cm3.h
  • SCB_SHCSR_BUSFAULTENA_Msk : core_cm3.h
  • SCB_SHCSR_BUSFAULTENA_Pos : core_cm3.h
  • SCB_SHCSR_BUSFAULTPENDED_Msk : core_cm3.h
  • SCB_SHCSR_BUSFAULTPENDED_Pos : core_cm3.h
  • SCB_SHCSR_MEMFAULTACT_Msk : core_cm3.h
  • SCB_SHCSR_MEMFAULTACT_Pos : core_cm3.h
  • SCB_SHCSR_MEMFAULTENA_Msk : core_cm3.h
  • SCB_SHCSR_MEMFAULTENA_Pos : core_cm3.h
  • SCB_SHCSR_MEMFAULTPENDED_Msk : core_cm3.h
  • SCB_SHCSR_MEMFAULTPENDED_Pos : core_cm3.h
  • SCB_SHCSR_MONITORACT_Msk : core_cm3.h
  • SCB_SHCSR_MONITORACT_Pos : core_cm3.h
  • SCB_SHCSR_PENDSVACT_Msk : core_cm3.h
  • SCB_SHCSR_PENDSVACT_Pos : core_cm3.h
  • SCB_SHCSR_SVCALLACT_Msk : core_cm3.h
  • SCB_SHCSR_SVCALLACT_Pos : core_cm3.h
  • SCB_SHCSR_SVCALLPENDED_Msk : core_cm3.h
  • SCB_SHCSR_SVCALLPENDED_Pos : core_cm3.h
  • SCB_SHCSR_SYSTICKACT_Msk : core_cm3.h
  • SCB_SHCSR_SYSTICKACT_Pos : core_cm3.h
  • SCB_SHCSR_USGFAULTACT_Msk : core_cm3.h
  • SCB_SHCSR_USGFAULTACT_Pos : core_cm3.h
  • SCB_SHCSR_USGFAULTENA_Msk : core_cm3.h
  • SCB_SHCSR_USGFAULTENA_Pos : core_cm3.h
  • SCB_SHCSR_USGFAULTPENDED_Msk : core_cm3.h
  • SCB_SHCSR_USGFAULTPENDED_Pos : core_cm3.h
  • SCB_VTOR_TBLOFF_Msk : core_cm3.h
  • SCB_VTOR_TBLOFF_Pos : core_cm3.h
  • SCnSCB : core_cm3.h
  • SCnSCB_ACTLR_DISDEFWBUF_Msk : core_cm3.h
  • SCnSCB_ACTLR_DISDEFWBUF_Pos : core_cm3.h
  • SCnSCB_ACTLR_DISFOLD_Msk : core_cm3.h
  • SCnSCB_ACTLR_DISFOLD_Pos : core_cm3.h
  • SCnSCB_ACTLR_DISMCYCINT_Msk : core_cm3.h
  • SCnSCB_ACTLR_DISMCYCINT_Pos : core_cm3.h
  • SCnSCB_ICTR_INTLINESNUM_Msk : core_cm3.h
  • SCnSCB_ICTR_INTLINESNUM_Pos : core_cm3.h
  • SCRLAR : drv_glcd.h
  • SCS_BASE : core_cm3.h
  • SCS_Val : system_LPC17xx.c
  • SCSI_FORMAT_UNIT : msc.h
  • SCSI_INQUIRY : msc.h
  • SCSI_MEDIA_REMOVAL : msc.h
  • SCSI_MODE_SELECT10 : msc.h
  • SCSI_MODE_SELECT6 : msc.h
  • SCSI_MODE_SENSE10 : msc.h
  • SCSI_MODE_SENSE6 : msc.h
  • SCSI_READ10 : msc.h
  • SCSI_READ_CAPACITY : msc.h
  • SCSI_READ_FORMAT_CAPACITIES : msc.h
  • SCSI_REQUEST_SENSE : msc.h
  • SCSI_START_STOP_UNIT : msc.h
  • SCSI_TEST_UNIT_READY : msc.h
  • SCSI_VERIFY10 : msc.h
  • SCSI_WRITE10 : msc.h
  • SD_CMD_BAD_PARAMETER : spi_sdcard.c
  • SD_CMD_BLOCK_LENGTH : spi_sdcard.c
  • sd_cmd_buf : spi_sdcard.c
  • sd_connect_status : spi_sdcard.c
  • SD_CONNECTED : spi_sdcard.c
  • SD_DATA_BLOCK_LENGTH : spi_sdcard.c
  • sd_data_buf : spi_sdcard.c
  • SD_DETECT_PINNUM : spi_sdcard.c
  • SD_DETECT_PORTNUM : spi_sdcard.c
  • SD_DISCONNECTED : spi_sdcard.c
  • sd_error : spi_sdcard.c
  • SD_ERROR_ACMD41 : spi_sdcard.c
  • SD_ERROR_BUS_NOT_IDLE : spi_sdcard.c
  • SD_ERROR_CMD0 : spi_sdcard.c
  • SD_ERROR_CMD55 : spi_sdcard.c
  • SD_ERROR_CMD59 : spi_sdcard.c
  • SD_ERROR_TIMEOUT : spi_sdcard.c
  • SD_ERROR_TOKEN : spi_sdcard.c
  • SD_GetCardConnectStatus() : spi_sdcard.c
  • SD_GetCID() : spi_sdcard.c
  • SD_Init() : spi_sdcard.c
  • SD_NG : spi_sdcard.c
  • SD_OK : spi_sdcard.c
  • SD_SendCommand() : spi_sdcard.c
  • SD_SendReceiveData_Polling() : spi_sdcard.c
  • SD_WAIT_R1_TIMEOUT : spi_sdcard.c
  • SD_WaitDeviceIdle() : spi_sdcard.c
  • SD_WaitR1() : spi_sdcard.c
  • SEND_FRAME1 : tcpip.h
  • SEND_FRAME2 : tcpip.h
  • send_menu : rs485_master.c
  • send_msg : rs485_slave.c
  • sendchar() : printf-stdarg.c , Retarget.c , Serial.c
  • SendFrame1() : tcpip.c , tcpip.h
  • SendFrame2() : tcpip.c , tcpip.h
  • ser_AvailChar() : serial.c , serial.h
  • SER_BUF_COUNT : serial.c
  • SER_BUF_EMPTY : serial.c
  • SER_BUF_FULL : serial.c
  • SER_BUF_MASK : serial.c
  • SER_BUF_RD : serial.c
  • SER_BUF_RESET : serial.c
  • SER_BUF_SIZE : serial.c
  • SER_BUF_T : serial.c
  • SER_BUF_WR : serial.c
  • ser_ClosePort() : serial.c , serial.h
  • ser_in : serial.c
  • ser_InitPort0() : serial.c , serial.h
  • ser_InitPort1() : serial.c , serial.h
  • ser_lineState : serial.c
  • ser_LineState() : serial.c , serial.h
  • ser_OpenPort() : serial.c , serial.h
  • ser_out : serial.c
  • ser_Read() : serial.c , serial.h
  • ser_txRestart : serial.c
  • ser_Write() : serial.c , serial.h
  • SET : lpc_types.h
  • SETCON : drv_glcd.h
  • SetOutReport() : demo.c , demo.h
  • SetState : lpc_types.h
  • SetupPacket : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • SFF_GPR_Table : can_test_aflut.c
  • SFF_Table : can_test_aflut.c
  • shell_init() : shell.c , shell.h
  • shell_input() : shell.c , shell.h
  • shell_output() : shell.h , telnetd.c
  • SHELL_PROMPT : shell.c
  • shell_prompt() : shell.h , telnetd.c
  • shell_quit() : shell.h , telnetd.c
  • shell_start() : shell.c , shell.h
  • SIGNAL_FREQ_IN_HZ : dac_wave_generate.c
  • SIGNAL_MODE : qei_test_velo.c
  • SINE_FREQ_IN_HZ : dac_sinewave_test.c
  • sinOutput : arm_sin_cos_example_f32.c
  • sinSquareOutput : arm_sin_cos_example_f32.c
  • SLAVE_ADDR : rs485_slave.c
  • SLAVE_ADDR_A : rs485_master.c
  • SLAVE_ADDR_B : rs485_master.c
  • Slave_Buf : i2c_master_slave_int_test.c , slave.c
  • Slave_Rx_Buf : ti_test.c
  • slave_test : i2c_master_slave_int_test.c , slave.c
  • Slave_Tx_Buf : microwire_test.c , ti_test.c
  • slaveA_msg : rs485_master.c
  • slaveB_msg : rs485_master.c
  • SLPIN : drv_glcd.h
  • SLPOUT : drv_glcd.h
  • SLVADDR : i2c_interrupt_test.c , i2c_polling_test.c
  • smtp_220 : smtp-strings.c , smtp-strings.h
  • smtp_appcall() : smtp.h
  • smtp_cc : smtp-strings.c , smtp-strings.h
  • smtp_configure() : smtp.h
  • smtp_crnl : smtp-strings.c , smtp-strings.h
  • smtp_crnlperiodcrnl : smtp-strings.c , smtp-strings.h
  • smtp_data : smtp-strings.c , smtp-strings.h
  • smtp_done() : smtp.h
  • SMTP_ERR_OK : smtp.h
  • smtp_from : smtp-strings.c , smtp-strings.h
  • smtp_helo : smtp-strings.c , smtp-strings.h
  • smtp_init() : smtp.h
  • smtp_mail_from : smtp-strings.c , smtp-strings.h
  • smtp_quit : smtp-strings.c , smtp-strings.h
  • smtp_rcpt_to : smtp-strings.c , smtp-strings.h
  • SMTP_SEND : smtp.h
  • smtp_send() : smtp.h
  • smtp_subject : smtp-strings.c , smtp-strings.h
  • smtp_to : smtp-strings.c , smtp-strings.h
  • snprintf() : printf-stdarg.c
  • snr : arm_convolution_example_f32.c , arm_fir_example_f32.c , arm_graphic_equalizer_example_q31.c , arm_matrix_example_f32.c
  • snr1 : arm_linear_interp_example_f32.c
  • snr2 : arm_linear_interp_example_f32.c
  • SNR_THRESHOLD : arm_convolution_example_f32.c , arm_linear_interp_example_f32.c , arm_matrix_example_f32.c
  • SNR_THRESHOLD_F32 : arm_fir_example_f32.c , arm_graphic_equalizer_example_q31.c
  • SOCK_ACTIVE : tcpip.h
  • SOCK_CONNECTED : tcpip.h
  • SOCK_DATA_AVAILABLE : tcpip.h
  • SOCK_ERR_ARP_TIMEOUT : tcpip.h
  • SOCK_ERR_CONN_RESET : tcpip.h
  • SOCK_ERR_ETHERNET : tcpip.h
  • SOCK_ERR_OK : tcpip.h
  • SOCK_ERR_REMOTE : tcpip.h
  • SOCK_ERR_TCP_TIMEOUT : tcpip.h
  • SOCK_ERROR_MASK : tcpip.h
  • SOCK_TX_BUF_RELEASED : tcpip.h
  • SocketStatus : tcpip.h
  • SPEED_10 : emac.h
  • SPEED_100 : emac.h
  • SPI_CheckStatus() : lpc17xx_spi.h
  • SPI_ClearIntPending() : lpc17xx_spi.h
  • SPI_ConfigStruct : spi_loopback_test.c , spi_master.c , spi_interrupt_test.c , spi_polling_test.c , spi_sdcard.c , spi_slave.c
  • SPI_ConfigStructInit() : lpc17xx_spi.h
  • SPI_CPHA_FIRST : lpc17xx_spi.h
  • SPI_CPHA_SECOND : lpc17xx_spi.h
  • SPI_CPOL_HI : lpc17xx_spi.h
  • SPI_CPOL_LO : lpc17xx_spi.h
  • SPI_DATA : GLCD_SPI_LPC1700.c
  • SPI_DATA_LSB_FIRST : lpc17xx_spi.h
  • SPI_DATA_MSB_FIRST : lpc17xx_spi.h
  • SPI_DATABIT_10 : lpc17xx_spi.h
  • SPI_DATABIT_11 : lpc17xx_spi.h
  • SPI_DATABIT_12 : lpc17xx_spi.h
  • SPI_DATABIT_13 : lpc17xx_spi.h
  • SPI_DATABIT_14 : lpc17xx_spi.h
  • SPI_DATABIT_15 : lpc17xx_spi.h
  • SPI_DATABIT_16 : lpc17xx_spi.h
  • SPI_DATABIT_8 : lpc17xx_spi.h
  • SPI_DATABIT_9 : lpc17xx_spi.h
  • SPI_DATABIT_SIZE : spi_loopback_test.c , spi_master.c , spi_slave.c
  • SPI_DeInit() : lpc17xx_spi.h
  • SPI_GetDataSize() : lpc17xx_spi.h
  • SPI_GetIntStatus() : lpc17xx_spi.h
  • SPI_GetStatus() : lpc17xx_spi.h
  • SPI_INDEX : GLCD_SPI_LPC1700.c
  • SPI_Init() : lpc17xx_spi.h
  • SPI_IntCmd() : lpc17xx_spi.h
  • SPI_IRQHandler() : spi_interrupt_test.c
  • SPI_IRQn : LPC17xx.h
  • SPI_MASTER_MODE : lpc17xx_spi.h
  • SPI_RD : GLCD_SPI_LPC1700.c
  • SPI_ReadWrite() : lpc17xx_spi.h
  • SPI_ReceiveData() : lpc17xx_spi.h
  • SPI_SendData() : lpc17xx_spi.h
  • SPI_SetClock() : lpc17xx_spi.h
  • SPI_SLAVE_MODE : lpc17xx_spi.h
  • SPI_SPCCR_BITMASK : lpc17xx_spi.h
  • SPI_SPCCR_COUNTER : lpc17xx_spi.h
  • SPI_SPCR_BIT_EN : lpc17xx_spi.h
  • SPI_SPCR_BITMASK : lpc17xx_spi.h
  • SPI_SPCR_BITS : lpc17xx_spi.h
  • SPI_SPCR_CPHA_SECOND : lpc17xx_spi.h
  • SPI_SPCR_CPOL_LOW : lpc17xx_spi.h
  • SPI_SPCR_LSBF : lpc17xx_spi.h
  • SPI_SPCR_MSTR : lpc17xx_spi.h
  • SPI_SPCR_SPIE : lpc17xx_spi.h
  • SPI_SPDR_BITMASK : lpc17xx_spi.h
  • SPI_SPDR_HI_MASK : lpc17xx_spi.h
  • SPI_SPDR_LO_MASK : lpc17xx_spi.h
  • SPI_SPINT_BITMASK : lpc17xx_spi.h
  • SPI_SPINT_INTFLAG : lpc17xx_spi.h
  • SPI_SPSR_ABRT : lpc17xx_spi.h
  • SPI_SPSR_BITMASK : lpc17xx_spi.h
  • SPI_SPSR_MODF : lpc17xx_spi.h
  • SPI_SPSR_ROVR : lpc17xx_spi.h
  • SPI_SPSR_SPIF : lpc17xx_spi.h
  • SPI_SPSR_WCOL : lpc17xx_spi.h
  • SPI_SPTCR_BITMASK : lpc17xx_spi.h
  • SPI_SPTCR_TEST_MASK : lpc17xx_spi.h
  • SPI_SPTSR_ABRT : lpc17xx_spi.h
  • SPI_SPTSR_MASKBIT : lpc17xx_spi.h
  • SPI_SPTSR_MODF : lpc17xx_spi.h
  • SPI_SPTSR_ROVR : lpc17xx_spi.h
  • SPI_SPTSR_SPIF : lpc17xx_spi.h
  • SPI_SPTSR_WCOL : lpc17xx_spi.h
  • SPI_START : GLCD_SPI_LPC1700.c
  • SPI_STAT_ABRT : lpc17xx_spi.h
  • SPI_STAT_DONE : lpc17xx_spi.h
  • SPI_STAT_ERROR : lpc17xx_spi.h
  • SPI_STAT_MODF : lpc17xx_spi.h
  • SPI_STAT_ROVR : lpc17xx_spi.h
  • SPI_STAT_SPIF : lpc17xx_spi.h
  • SPI_STAT_WCOL : lpc17xx_spi.h
  • SPI_TRANSFER_INTERRUPT : lpc17xx_spi.h
  • SPI_TRANSFER_POLLING : lpc17xx_spi.h
  • SPI_TRANSFER_Type : lpc17xx_spi.h
  • SPI_WR : GLCD_SPI_LPC1700.c
  • spireadbuf : spi_interrupt_test.c , spi_polling_test.c
  • sprintf() : printf-stdarg.c
  • srcA_buf_f32 : arm_dotproduct_example_f32.c
  • srcALen : arm_convolution_example_f32.c
  • srcB_buf_f32 : arm_dotproduct_example_f32.c
  • srcBLen : arm_convolution_example_f32.c
  • SSP0_IRQHandler() : sc16is750_int.c , ssp_slave.c , ti_test.c
  • SSP0_IRQn : LPC17xx.h
  • SSP1_IRQHandler() : ti_test.c
  • SSP1_IRQn : LPC17xx.h
  • SSP_ClearIntPending() : lpc17xx_ssp.h
  • SSP_Cmd() : lpc17xx_ssp.h
  • SSP_ConfigStruct : sc16is750_polling.c , ssp_dma.c , ssp_master.c , microwire_test.c , sc16is750_int.c , ssp_slave.c , ti_test.c
  • SSP_ConfigStructInit() : lpc17xx_ssp.h
  • SSP_CPHA_FIRST : lpc17xx_ssp.h
  • SSP_CPHA_SECOND : lpc17xx_ssp.h
  • SSP_CPOL_HI : lpc17xx_ssp.h
  • SSP_CPOL_LO : lpc17xx_ssp.h
  • SSP_CPSR_BITMASK : lpc17xx_ssp.h
  • SSP_CPSR_CPDVSR : lpc17xx_ssp.h
  • SSP_CR0_BITMASK : lpc17xx_ssp.h
  • SSP_CR0_CPHA_SECOND : lpc17xx_ssp.h
  • SSP_CR0_CPOL_HI : lpc17xx_ssp.h
  • SSP_CR0_DSS : lpc17xx_ssp.h
  • SSP_CR0_FRF_MICROWIRE : lpc17xx_ssp.h
  • SSP_CR0_FRF_SPI : lpc17xx_ssp.h
  • SSP_CR0_FRF_TI : lpc17xx_ssp.h
  • SSP_CR0_SCR : lpc17xx_ssp.h
  • SSP_CR1_BITMASK : lpc17xx_ssp.h
  • SSP_CR1_LBM_EN : lpc17xx_ssp.h
  • SSP_CR1_SLAVE_EN : lpc17xx_ssp.h
  • SSP_CR1_SO_DISABLE : lpc17xx_ssp.h
  • SSP_CR1_SSP_EN : lpc17xx_ssp.h
  • SSP_DATABIT_10 : lpc17xx_ssp.h
  • SSP_DATABIT_11 : lpc17xx_ssp.h
  • SSP_DATABIT_12 : lpc17xx_ssp.h
  • SSP_DATABIT_13 : lpc17xx_ssp.h
  • SSP_DATABIT_14 : lpc17xx_ssp.h
  • SSP_DATABIT_15 : lpc17xx_ssp.h
  • SSP_DATABIT_16 : lpc17xx_ssp.h
  • SSP_DATABIT_4 : lpc17xx_ssp.h
  • SSP_DATABIT_5 : lpc17xx_ssp.h
  • SSP_DATABIT_6 : lpc17xx_ssp.h
  • SSP_DATABIT_7 : lpc17xx_ssp.h
  • SSP_DATABIT_8 : lpc17xx_ssp.h
  • SSP_DATABIT_9 : lpc17xx_ssp.h
  • SSP_DeInit() : lpc17xx_ssp.h
  • SSP_DMA_BITMASK : lpc17xx_ssp.h
  • SSP_DMA_RX : lpc17xx_ssp.h
  • SSP_DMA_RXDMA_EN : lpc17xx_ssp.h
  • SSP_DMA_TX : lpc17xx_ssp.h
  • SSP_DMA_TXDMA_EN : lpc17xx_ssp.h
  • SSP_DMACmd() : lpc17xx_ssp.h
  • SSP_DR_BITMASK : lpc17xx_ssp.h
  • SSP_FIFO_SIZE : glcd_ll.h
  • SSP_FRAME_MICROWIRE : lpc17xx_ssp.h
  • SSP_FRAME_SPI : lpc17xx_ssp.h
  • SSP_FRAME_TI : lpc17xx_ssp.h
  • SSP_GetDataSize() : lpc17xx_ssp.h
  • SSP_GetIntStatus() : lpc17xx_ssp.h
  • SSP_GetRawIntStatus() : lpc17xx_ssp.h
  • SSP_GetRawIntStatusReg() : lpc17xx_ssp.h
  • SSP_GetStatus() : lpc17xx_ssp.h
  • SSP_ICR_BITMASK : lpc17xx_ssp.h
  • SSP_ICR_ROR : lpc17xx_ssp.h
  • SSP_ICR_RT : lpc17xx_ssp.h
  • SSP_IMSC_BITMASK : lpc17xx_ssp.h
  • SSP_IMSC_ROR : lpc17xx_ssp.h
  • SSP_IMSC_RT : lpc17xx_ssp.h
  • SSP_IMSC_RX : lpc17xx_ssp.h
  • SSP_IMSC_TX : lpc17xx_ssp.h
  • SSP_Init() : lpc17xx_ssp.h
  • SSP_INTCFG_ROR : lpc17xx_ssp.h
  • SSP_INTCFG_RT : lpc17xx_ssp.h
  • SSP_INTCFG_RX : lpc17xx_ssp.h
  • SSP_INTCFG_TX : lpc17xx_ssp.h
  • SSP_INTCLR_ROR : lpc17xx_ssp.h
  • SSP_INTCLR_RT : lpc17xx_ssp.h
  • SSP_IntConfig() : lpc17xx_ssp.h
  • SSP_INTSTAT_RAW_ROR : lpc17xx_ssp.h
  • SSP_INTSTAT_RAW_RT : lpc17xx_ssp.h
  • SSP_INTSTAT_RAW_RX : lpc17xx_ssp.h
  • SSP_INTSTAT_RAW_TX : lpc17xx_ssp.h
  • SSP_INTSTAT_ROR : lpc17xx_ssp.h
  • SSP_INTSTAT_RT : lpc17xx_ssp.h
  • SSP_INTSTAT_RX : lpc17xx_ssp.h
  • SSP_INTSTAT_TX : lpc17xx_ssp.h
  • SSP_LoopBackCmd() : lpc17xx_ssp.h
  • ssp_Master_IntHandler() : ti_test.c
  • SSP_MASTER_MODE : lpc17xx_ssp.h
  • ssp_MasterReadWrite() : ti_test.c
  • SSP_MIS_BITMASK : lpc17xx_ssp.h
  • SSP_MIS_ROR : lpc17xx_ssp.h
  • SSP_MIS_RT : lpc17xx_ssp.h
  • SSP_MIS_RX : lpc17xx_ssp.h
  • SSP_MIS_TX : lpc17xx_ssp.h
  • ssp_MW_GetCMD() : microwire_test.c
  • ssp_MW_GetRSP() : microwire_test.c
  • ssp_MW_SendCMD() : microwire_test.c
  • ssp_MW_SendRSP() : microwire_test.c
  • SSP_ReadWrite() : lpc17xx_ssp.h
  • SSP_ReceiveData() : lpc17xx_ssp.h
  • SSP_RIS_BITMASK : lpc17xx_ssp.h
  • SSP_RIS_ROR : lpc17xx_ssp.h
  • SSP_RIS_RT : lpc17xx_ssp.h
  • SSP_RIS_RX : lpc17xx_ssp.h
  • SSP_RIS_TX : lpc17xx_ssp.h
  • SSP_SendData() : lpc17xx_ssp.h
  • ssp_Slave_IntHandler() : ti_test.c
  • SSP_SLAVE_MODE : lpc17xx_ssp.h
  • SSP_SlaveOutputCmd() : lpc17xx_ssp.h
  • ssp_SlaveReadWrite() : ti_test.c
  • SSP_SR_BITMASK : lpc17xx_ssp.h
  • SSP_SR_BSY : lpc17xx_ssp.h
  • SSP_SR_RFF : lpc17xx_ssp.h
  • SSP_SR_RNE : lpc17xx_ssp.h
  • SSP_SR_TFE : lpc17xx_ssp.h
  • SSP_SR_TNF : lpc17xx_ssp.h
  • SSP_STAT_BUSY : lpc17xx_ssp.h
  • SSP_STAT_DONE : lpc17xx_ssp.h
  • SSP_STAT_ERROR : lpc17xx_ssp.h
  • SSP_STAT_RXFIFO_FULL : lpc17xx_ssp.h
  • SSP_STAT_RXFIFO_NOTEMPTY : lpc17xx_ssp.h
  • SSP_STAT_TXFIFO_EMPTY : lpc17xx_ssp.h
  • SSP_STAT_TXFIFO_NOTFULL : lpc17xx_ssp.h
  • SSP_TRANSFER_INTERRUPT : lpc17xx_ssp.h
  • SSP_TRANSFER_POLLING : lpc17xx_ssp.h
  • SSP_TRANSFER_Type : lpc17xx_ssp.h
  • SSPDEV_M : microwire_test.c , ti_test.c
  • SSPDEV_S : ti_test.c , microwire_test.c
  • sspreadbuf : sc16is750_polling.c , sc16is750_int.c
  • ST_CALIB_NOREF : lpc17xx_systick.h
  • ST_CALIB_SKEW : lpc17xx_systick.h
  • ST_CALIB_TENMS : lpc17xx_systick.h
  • ST_CTRL_CLKSOURCE : lpc17xx_systick.h
  • ST_CTRL_COUNTFLAG : lpc17xx_systick.h
  • ST_CTRL_ENABLE : lpc17xx_systick.h
  • ST_CTRL_TICKINT : lpc17xx_systick.h
  • ST_RELOAD_CURRENT : lpc17xx_systick.h
  • ST_RELOAD_RELOAD : lpc17xx_systick.h
  • StartReadFrame() : EMAC.c , EMAC.h
  • STATE_ACKED : psock.c
  • STATE_ASKING : resolv.c
  • STATE_BLOCKED_CLOSE : psock.c
  • STATE_BLOCKED_NEWDATA : psock.c
  • STATE_BLOCKED_SEND : psock.c
  • STATE_CLOSE : telnetd.c
  • STATE_CONFIG_RECEIVED : dhcpc.c
  • STATE_DATA_SENT : psock.c
  • STATE_DO : telnetd.c
  • STATE_DONE : resolv.c
  • STATE_DONT : telnetd.c
  • STATE_ERROR : resolv.c
  • STATE_IAC : telnetd.c
  • STATE_INITIAL : dhcpc.c
  • STATE_NEW : resolv.c
  • STATE_NONE : psock.c
  • STATE_NORMAL : telnetd.c
  • STATE_OFFER_RECEIVED : dhcpc.c
  • STATE_OUTPUT : httpd.c
  • STATE_READ : psock.c
  • STATE_SENDING : dhcpc.c
  • STATE_UNUSED : resolv.c
  • STATE_WAITING : httpd.c
  • STATE_WILL : telnetd.c
  • STATE_WONT : telnetd.c
  • STATIC : lpc_types.h
  • status : arm_dotproduct_example_f32.c
  • Status : lpc_types.h
  • status : arm_sin_cos_example_f32.c
  • std : arm_class_marks_example_f32.c
  • STD_ID_FORMAT : lpc17xx_can.h
  • student_num : arm_class_marks_example_f32.c
  • SUBMASK_1 : tcpip.h
  • SUBMASK_2 : tcpip.h
  • SUBMASK_3 : tcpip.h
  • SUBMASK_4 : tcpip.h
  • SubnetMask : tcpip.h
  • SUCCESS : lpc_types.h
  • sUnion : cdc.h
  • SVC_Handler() : privilege.c
  • SVCall_IRQn : LPC17xx.h
  • SWAPB : tcpip.h
  • SwapBytes() : tcpip.c , tcpip.h
  • SWRESET : drv_glcd.h
  • SYN_RECD : tcpip.h
  • SYN_SENT : tcpip.h
  • Synchronous : uart_autobaud_test.c
  • syncmenu : uart_autobaud_test.c
  • SYS_ERR_INT : usbreg.h
  • SystemCoreClock : system_ARMCM0.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_LPC17xx.c , system_ARMCM3.c , system_LPC17xx.h , system_ARMCM0.c , system_ARMCM4.c , system_ARMCM3.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM0.c , system_ARMCM4.c , system_ARMCM3.c
  • SystemCoreClockUpdate() : system_ARMCM4.c , system_ARMCM0.c , system_ARMCM4.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM3.c , system_LPC17xx.h , system_LPC17xx.c , system_ARMCM4.c , system_ARMCM3.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM0.c , system_ARMCM4.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c
  • SystemInit() : system_ARMCM4.c , system_LPC17xx.c , system_ARMCM3.c , system_ARMCM0.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM0.c , system_ARMCM4.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM4.c , system_ARMCM3.c , system_ARMCM4.c , system_LPC17xx.h , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM0.c , system_ARMCM3.c
  • SysTick : core_cm3.h
  • SysTick_BASE : core_cm3.h
  • SysTick_CALIB_NOREF_Msk : core_cm3.h
  • SysTick_CALIB_NOREF_Pos : core_cm3.h
  • SysTick_CALIB_SKEW_Msk : core_cm3.h
  • SysTick_CALIB_SKEW_Pos : core_cm3.h
  • SysTick_CALIB_TENMS_Msk : core_cm3.h
  • SysTick_CALIB_TENMS_Pos : core_cm3.h
  • SYSTICK_ClearCounterFlag() : lpc17xx_systick.h
  • SYSTICK_Cmd() : lpc17xx_systick.h
  • SysTick_CTRL_CLKSOURCE_Msk : core_cm3.h
  • SysTick_CTRL_CLKSOURCE_Pos : core_cm3.h
  • SysTick_CTRL_COUNTFLAG_Msk : core_cm3.h
  • SysTick_CTRL_COUNTFLAG_Pos : core_cm3.h
  • SysTick_CTRL_ENABLE_Msk : core_cm3.h
  • SysTick_CTRL_ENABLE_Pos : core_cm3.h
  • SysTick_CTRL_TICKINT_Msk : core_cm3.h
  • SysTick_CTRL_TICKINT_Pos : core_cm3.h
  • SYSTICK_ExternalInit() : lpc17xx_systick.h
  • SYSTICK_GetCurrentValue() : lpc17xx_systick.h
  • SysTick_Handler() : vt_relocation.c , tcpip.h , clock-arch.c , systick_stclk.c , tcpip.c , LedBlinky.c , 10ms_base.c
  • SYSTICK_IntCmd() : lpc17xx_systick.h
  • SYSTICK_InternalInit() : lpc17xx_systick.h
  • SysTick_IRQn : LPC17xx.h
  • SysTick_LOAD_RELOAD_Msk : core_cm3.h
  • SysTick_LOAD_RELOAD_Pos : core_cm3.h
  • SYSTICK_PERIOD : tcpip.c
  • SysTick_VAL_CURRENT_Msk : core_cm3.h
  • SysTick_VAL_CURRENT_Pos : core_cm3.h
  • SysTickCnt : LedBlinky.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- t -

  • T1 : gen_diff_delay.c
  • T2 : gen_diff_delay.c
  • TABLE_SIZE : arm_math.h
  • TABLE_SPACING_Q15 : arm_math.h
  • TABLE_SPACING_Q31 : arm_math.h
  • tapdev_init() : emac.c , emac.h
  • tapdev_read() : emac.c , emac.h
  • tapdev_send() : emac.c , emac.h
  • TCP_ACK : uip.c
  • TCP_ACKNR_OFS : tcpip.h
  • TCP_ACTIVE_OPEN : tcpip.h
  • TCP_CHKSUM_OFS : tcpip.h
  • TCP_CLOSE_REQUESTED : tcpip.h
  • TCP_CODE_ACK : tcpip.h
  • TCP_CODE_FIN : tcpip.h
  • TCP_CODE_PSH : tcpip.h
  • TCP_CODE_RST : tcpip.h
  • TCP_CODE_SYN : tcpip.h
  • TCP_CODE_URG : tcpip.h
  • TCP_CTL : uip.c
  • TCP_DATA_CODE_OFS : tcpip.h
  • TCP_DATA_FRAME : tcpip.h
  • TCP_DATA_OFS : tcpip.h
  • TCP_DESTPORT_OFS : tcpip.h
  • TCP_FIN : uip.c
  • TCP_FIN_FRAME : tcpip.h
  • TCP_HEADER_SIZE : tcpip.h
  • TCP_OPT_END : uip.c
  • TCP_OPT_MSS : tcpip.h , uip.c
  • TCP_OPT_MSS_LEN : uip.c
  • TCP_OPT_MSS_SIZE : tcpip.h
  • TCP_OPT_NOOP : uip.c
  • TCP_PORT_CHARGEN : tcpip.h
  • TCP_PORT_DAYTIME : tcpip.h
  • TCP_PORT_DISCARD : tcpip.h
  • TCP_PORT_ECHO : tcpip.h
  • TCP_PORT_HTTP : tcpip.h
  • TCP_PORT_QOTD : tcpip.h
  • TCP_PSH : uip.c
  • TCP_RST : uip.c
  • TCP_RX_BUF : tcpip.h
  • TCP_SEQNR_OFS : tcpip.h
  • TCP_SRCPORT_OFS : tcpip.h
  • TCP_SYN : uip.c
  • TCP_SYN_ACK_FRAME : tcpip.h
  • TCP_SYN_FRAME : tcpip.h
  • TCP_TIMER_RUNNING : tcpip.h
  • TCP_TX_BUF : tcpip.h
  • TCP_URG : uip.c
  • TCP_URGENT_OFS : tcpip.h
  • TCP_WINDOW_OFS : tcpip.h
  • TCPAckNr : tcpip.h
  • TCPActiveOpen() : tcpip.c , tcpip.h
  • TCPClose() : tcpip.c , tcpip.h
  • TCPFlags : tcpip.h
  • TCPHandleRetransmission() : tcpip.c , tcpip.h
  • TCPHandleTimeout() : tcpip.c , tcpip.h
  • TCPLocalPort : tcpip.h
  • TCPLowLevelInit() : tcpip.c , tcpip.h
  • TCPPassiveOpen() : tcpip.c , tcpip.h
  • TCPReleaseRxBuffer() : tcpip.c , tcpip.h
  • TCPRemotePort : tcpip.h
  • TCPRestartTimer() : tcpip.c , tcpip.h
  • TCPRxDataCount : tcpip.h
  • TCPSeqNr : tcpip.h
  • TCPStartRetryTimer() : tcpip.c , tcpip.h
  • TCPStartTimeWaitTimer() : tcpip.c , tcpip.h
  • TCPStateMachine : tcpip.h
  • TCPStopTimer() : tcpip.c , tcpip.h
  • TCPTimer : tcpip.h
  • TCPTransmitTxBuffer() : tcpip.c , tcpip.h
  • TCPTxDataCount : tcpip.h
  • TCPUNASeqNr : tcpip.h
  • TELNET_DO : telnetd.c
  • TELNET_DONT : telnetd.c
  • TELNET_IAC : telnetd.c
  • TELNET_WILL : telnetd.c
  • TELNET_WONT : telnetd.c
  • telnetd_appcall() : telnetd.c , telnetd.h
  • TELNETD_CONF_LINELEN : telnetd.h
  • TELNETD_CONF_NUMLINES : telnetd.h
  • telnetd_init() : telnetd.c
  • Terminal_18_24_12 : lcdtest.c
  • Terminal_6_8_6 : lcdtest.c
  • Terminal_9_12_6 : lcdtest.c , Terminal_9_12x6.c
  • terminator : rs485_master.c , rs485_slave.c
  • TEST_IRDA : uart_irda_receive.c , uart_irda_transmit.c
  • TEST_LENGTH_SAMPLES : arm_class_marks_example_f32.c , arm_fft_bin_example_f32.c , arm_fir_example_f32.c , arm_linear_interp_example_f32.c , arm_signal_converge_example_f32.c
  • test_signal_converge() : arm_signal_converge_example_f32.c
  • test_signal_converge_example() : arm_signal_converge_example_f32.c
  • TEST_UART : uart_hw_flow_control.c , uart_irda_receive.c , uart_irda_transmit.c , uart_polling_test.c
  • testIndex : arm_fft_bin_example_f32.c
  • testInput_f32 : arm_graphic_equalizer_data.c , arm_graphic_equalizer_example_q31.c , arm_signal_converge_data.c , arm_signal_converge_example_f32.c , arm_sin_cos_example_f32.c , arm_variance_example_f32.c
  • testInput_f32_10khz : arm_fft_bin_data.c , arm_fft_bin_example_f32.c
  • testInput_f32_1kHz_15kHz : arm_fir_data.c , arm_fir_example_f32.c
  • testInputA_f32 : arm_convolution_example_f32.c
  • testInputB_f32 : arm_convolution_example_f32.c
  • testInputSin_f32 : arm_linear_interp_example_f32.c
  • TESTLENGTH : arm_graphic_equalizer_example_q31.c
  • testLinIntOutput : arm_linear_interp_example_f32.c
  • testMarks_f32 : arm_class_marks_example_f32.c
  • testOutput : arm_dotproduct_example_f32.c , arm_linear_interp_example_f32.c , arm_sin_cos_example_f32.c
  • testRefOutput_f32 : arm_convolution_example_f32.c , arm_graphic_equalizer_data.c , arm_graphic_equalizer_example_q31.c , arm_sin_cos_example_f32.c
  • testRefSinOutput32_f32 : arm_linear_interp_example_f32.c
  • testUnity_f32 : arm_class_marks_example_f32.c
  • TEXT_BEL1_FUNC : drv_glcd.h
  • TEXT_DEF_TAB_SIZE : drv_glcd.h
  • TFE : GLCD_SPI_LPC1700.c
  • THREAD_PRIVILEDGED_MASK : privilege.c
  • THREAD_PRIVILEGED : privilege.c
  • THREAD_UNPRIVILEGED : privilege.c
  • Tick : usbdmain.c
  • Ticks : clock-arch.c
  • TIM_CAP_FALLING : lpc17xx_timer.h
  • TIM_CAP_INT : lpc17xx_timer.h
  • TIM_CAP_MODE_OPT : lpc17xx_timer.h
  • TIM_CAP_RISING : lpc17xx_timer.h
  • TIM_CAPTURE_ANY : lpc17xx_timer.h
  • TIM_CAPTURE_FALLING : lpc17xx_timer.h
  • TIM_CAPTURE_NONE : lpc17xx_timer.h
  • TIM_CAPTURE_RISING : lpc17xx_timer.h
  • TIM_CaptureConfigStruct : timer_capture.c , freqmeasure.c
  • TIM_CCR_CHANNEL_MASKBIT : lpc17xx_timer.h
  • TIM_CCR_MASKBIT : lpc17xx_timer.h
  • TIM_ClearIntCapturePending() : lpc17xx_timer.h
  • TIM_ClearIntPending() : lpc17xx_timer.h
  • TIM_Cmd() : lpc17xx_timer.h
  • TIM_ConfigCapture() : lpc17xx_timer.h
  • TIM_ConfigMatch() : lpc17xx_timer.h
  • TIM_ConfigStruct : freqmeasure.c , timer_capture.c , timer_int_match.c , timer_poll_match.c , pwm_signal.c
  • TIM_ConfigStructInit() : lpc17xx_timer.h
  • TIM_COUNTER_ANY_MODE : lpc17xx_timer.h
  • TIM_COUNTER_FALLING_MODE : lpc17xx_timer.h
  • TIM_COUNTER_INCAP0 : lpc17xx_timer.h
  • TIM_COUNTER_INCAP1 : lpc17xx_timer.h
  • TIM_COUNTER_INPUT_OPT : lpc17xx_timer.h
  • TIM_COUNTER_MODE : lpc17xx_timer.h
  • TIM_COUNTER_RISING_MODE : lpc17xx_timer.h
  • TIM_CR0_INT : lpc17xx_timer.h
  • TIM_CR1_INT : lpc17xx_timer.h
  • TIM_CTCR_INPUT_MASK : lpc17xx_timer.h
  • TIM_CTCR_MASKBIT : lpc17xx_timer.h
  • TIM_CTCR_MODE_MASK : lpc17xx_timer.h
  • TIM_DeInit() : lpc17xx_timer.h
  • TIM_EDGE_MASK : lpc17xx_timer.h
  • TIM_EM : lpc17xx_timer.h
  • TIM_EM_HIGH : lpc17xx_timer.h
  • TIM_EM_LOW : lpc17xx_timer.h
  • TIM_EM_MASK : lpc17xx_timer.h
  • TIM_EM_NOTHING : lpc17xx_timer.h
  • TIM_EM_SET : lpc17xx_timer.h
  • TIM_EM_TOGGLE : lpc17xx_timer.h
  • TIM_EMR_MASKBIT : lpc17xx_timer.h
  • TIM_ENABLE : lpc17xx_timer.h
  • TIM_EXTMATCH_HIGH : lpc17xx_timer.h
  • TIM_EXTMATCH_LOW : lpc17xx_timer.h
  • TIM_EXTMATCH_NOTHING : lpc17xx_timer.h
  • TIM_EXTMATCH_OPT : lpc17xx_timer.h
  • TIM_EXTMATCH_TOGGLE : lpc17xx_timer.h
  • TIM_GetCaptureValue() : lpc17xx_timer.h
  • TIM_GetIntCaptureStatus() : lpc17xx_timer.h
  • TIM_GetIntStatus() : lpc17xx_timer.h
  • TIM_Init() : lpc17xx_timer.h
  • TIM_INT_ON_CAP : lpc17xx_timer.h
  • TIM_INT_ON_MATCH : lpc17xx_timer.h
  • TIM_INT_TYPE : lpc17xx_timer.h
  • TIM_IR_CLR : lpc17xx_timer.h
  • TIM_MATCH_INT : lpc17xx_timer.h
  • TIM_MatchConfigStruct : timer_capture.c , timer_int_match.c , timer_poll_match.c , pwm_signal.c
  • TIM_MCR_CHANNEL_MASKBIT : lpc17xx_timer.h
  • TIM_MCR_MASKBIT : lpc17xx_timer.h
  • TIM_MODE_OPT : lpc17xx_timer.h
  • TIM_MR0_INT : lpc17xx_timer.h
  • TIM_MR1_INT : lpc17xx_timer.h
  • TIM_MR2_INT : lpc17xx_timer.h
  • TIM_MR3_INT : lpc17xx_timer.h
  • TIM_PRESCALE_OPT : lpc17xx_timer.h
  • TIM_PRESCALE_TICKVAL : lpc17xx_timer.h
  • TIM_PRESCALE_USVAL : lpc17xx_timer.h
  • TIM_RESET : lpc17xx_timer.h
  • TIM_RESET_ON_MATCH : lpc17xx_timer.h
  • TIM_ResetCounter() : lpc17xx_timer.h
  • TIM_SetMatchExt() : lpc17xx_timer.h
  • TIM_STOP_ON_MATCH : lpc17xx_timer.h
  • TIM_TCR_MASKBIT : lpc17xx_timer.h
  • TIM_TIMER_MODE : lpc17xx_timer.h
  • TIM_UpdateMatchValue() : lpc17xx_timer.h
  • TIME_INTERVAL : rit_interrupt.c
  • TIME_OUT : pwm_match_int.c , lcdtest.c
  • TIME_WAIT : tcpip.h
  • timer0_flag : timer_capture.c , timer_int_match.c
  • TIMER0_IRQHandler() : gen_diff_delay.c , timer_int_match.c , pwm_signal.c , timer_capture.c , qei_test_velo.c , lcdtest.c , freqmeasure.c , usbdmain.c
  • TIMER0_IRQn : LPC17xx.h
  • TIMER0_TICK_PER_SEC : lcdtest.c
  • timer1_flag : timer_capture.c , timer_int_match.c
  • TIMER1_IRQHandler() : pwm_signal.c , timer_capture.c
  • TIMER1_IRQn : LPC17xx.h
  • TIMER2_IRQHandler() : pwm_signal.c
  • TIMER2_IRQn : LPC17xx.h
  • TIMER3_IRQHandler() : pwm_signal.c
  • TIMER3_IRQn : LPC17xx.h
  • timer_expired() : timer.c
  • timer_reset() : timer.c
  • timer_restart() : timer.c
  • timer_set() : timer.c
  • TIMER_TYPE_RETRY : tcpip.h
  • TLastFrameSent : tcpip.h
  • TMPHIS : drv_glcd.h
  • TMPREAD : drv_glcd.h
  • TMPRNG : drv_glcd.h
  • toggle : gen_diff_delay.c
  • TRANSFER_BLOCK_Type : lpc_types.h
  • TransmitControl : tcpip.h
  • TRUE : lpc_types.h
  • TTCPStateMachine : tcpip.h
  • Turn_off_LED() : privilege.c
  • Turn_on_LED() : privilege.c
  • Tx_Buf : ssp_slave.c , spi_master.c , ssp_master.c , spi_slave.c , spi_loopback_test.c
  • TX_BUFFER_SIZE : can_test_two_kit.c
  • tx_depth_irq : i2s_irq_test.c , i2s_mclk.c , i2s_two_kit.c
  • TX_LED_PIN : emactest.c
  • TX_ONLY : emactest.c
  • TX_PACKET_SIZE : emactest.c
  • TxDoneCount : emactest.c
  • TxENDPKT_INT : usbreg.h
  • TXErrorCount : emactest.c
  • TXFIFO_FULL : i2s_mclk.c , i2s_irq_test.c
  • TxFinishedCount : emactest.c
  • TxFrame1 : tcpip.h
  • TxFrame1Size : tcpip.h
  • TxFrame2 : tcpip.h
  • TxFrame2Size : tcpip.h
  • TxIntStat : uart_fullmodem_test.c , uart_interrupt_test.c
  • TXMsg : can_test_bypass_mode.c , can_self_test.c , can_test_two_kit.c , can_ledcontrol.c
  • txsetup : pca8581_test.c
  • TXUnderrunCount : emactest.c
  • Type : usb.h
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- u -

  • u16_t : uip-conf.h
  • u8_t : uip-conf.h
  • UART0_IRQHandler() : uart_interrupt_test.c , serial.c , uart_autobaud_test.c
  • UART0_IRQn : LPC17xx.h
  • UART1_IER_BITMASK : lpc17xx_uart.h
  • UART1_IER_CTSINT_EN : lpc17xx_uart.h
  • UART1_IER_MSINT_EN : lpc17xx_uart.h
  • UART1_IIR_INTID_MODEM : lpc17xx_uart.h
  • UART1_INTCFG_CTS : lpc17xx_uart.h
  • UART1_INTCFG_MS : lpc17xx_uart.h
  • UART1_IntErr() : uart_fullmodem_test.c
  • UART1_IntReceive() : uart_fullmodem_test.c
  • UART1_IntTransmit() : uart_fullmodem_test.c
  • UART1_IRQHandler() : rs485_master.c , rs485_slave.c , uart_fullmodem_test.c , serial.c
  • UART1_IRQn : LPC17xx.h
  • UART1_MCR_AUTO_CTS_EN : lpc17xx_uart.h
  • UART1_MCR_AUTO_RTS_EN : lpc17xx_uart.h
  • UART1_MCR_BITMASK : lpc17xx_uart.h
  • UART1_MCR_DTR_CTRL : lpc17xx_uart.h
  • UART1_MCR_LOOPB_EN : lpc17xx_uart.h
  • UART1_MCR_RTS_CTRL : lpc17xx_uart.h
  • UART1_MODEM_MODE_AUTO_CTS : lpc17xx_uart.h
  • UART1_MODEM_MODE_AUTO_RTS : lpc17xx_uart.h
  • UART1_MODEM_MODE_LOOPBACK : lpc17xx_uart.h
  • UART1_MODEM_PIN_DTR : lpc17xx_uart.h
  • UART1_MODEM_PIN_RTS : lpc17xx_uart.h
  • UART1_MODEM_STAT_CTS : lpc17xx_uart.h
  • UART1_MODEM_STAT_DCD : lpc17xx_uart.h
  • UART1_MODEM_STAT_DELTA_CTS : lpc17xx_uart.h
  • UART1_MODEM_STAT_DELTA_DCD : lpc17xx_uart.h
  • UART1_MODEM_STAT_DELTA_DSR : lpc17xx_uart.h
  • UART1_MODEM_STAT_DSR : lpc17xx_uart.h
  • UART1_MODEM_STAT_LO2HI_RI : lpc17xx_uart.h
  • UART1_MODEM_STAT_RI : lpc17xx_uart.h
  • UART1_MSR_BITMASK : lpc17xx_uart.h
  • UART1_MSR_CTS : lpc17xx_uart.h
  • UART1_MSR_DCD : lpc17xx_uart.h
  • UART1_MSR_DELTA_CTS : lpc17xx_uart.h
  • UART1_MSR_DELTA_DCD : lpc17xx_uart.h
  • UART1_MSR_DELTA_DSR : lpc17xx_uart.h
  • UART1_MSR_DSR : lpc17xx_uart.h
  • UART1_MSR_LO2HI_RI : lpc17xx_uart.h
  • UART1_MSR_RI : lpc17xx_uart.h
  • UART1_RS485_DIRCTRL_DTR : lpc17xx_uart.h
  • UART1_RS485_DIRCTRL_RTS : lpc17xx_uart.h
  • UART1_RS485ADRMATCH_BITMASK : lpc17xx_uart.h
  • UART1_RS485CTRL_AADEN : lpc17xx_uart.h
  • UART1_RS485CTRL_BITMASK : lpc17xx_uart.h
  • UART1_RS485CTRL_DCTRL_EN : lpc17xx_uart.h
  • UART1_RS485CTRL_NMM_EN : lpc17xx_uart.h
  • UART1_RS485CTRL_OINV_1 : lpc17xx_uart.h
  • UART1_RS485CTRL_RX_DIS : lpc17xx_uart.h
  • UART1_RS485CTRL_SEL_DTR : lpc17xx_uart.h
  • UART1_RS485DLY_BITMASK : lpc17xx_uart.h
  • UART1_SignalState : lpc17xx_uart.h
  • UART2_IRQn : LPC17xx.h
  • UART3_IRQn : LPC17xx.h
  • UART_AB_MODE_Type : lpc17xx_uart.h
  • UART_ABClearIntPending() : lpc17xx_uart.h
  • UART_ABCmd() : lpc17xx_uart.h
  • UART_ABEO_Type : lpc17xx_uart.h
  • UART_ACCEPTED_BAUDRATE_ERROR : lpc17xx_uart.h
  • UART_ACR_ABEOINT_CLR : lpc17xx_uart.h
  • UART_ACR_ABTOINT_CLR : lpc17xx_uart.h
  • UART_ACR_AUTO_RESTART : lpc17xx_uart.h
  • UART_ACR_BITMASK : lpc17xx_uart.h
  • UART_ACR_MODE : lpc17xx_uart.h
  • UART_ACR_START : lpc17xx_uart.h
  • UART_AUTOBAUD_INTSTAT_ABEO : lpc17xx_uart.h
  • UART_AUTOBAUD_INTSTAT_ABTO : lpc17xx_uart.h
  • UART_AUTOBAUD_MODE0 : lpc17xx_uart.h
  • UART_AUTOBAUD_MODE1 : lpc17xx_uart.h
  • UART_BLOCKING_TIMEOUT : lpc17xx_uart.h
  • UART_CheckBusy() : lpc17xx_uart.h
  • UART_ConfigStructInit() : lpc17xx_uart.h
  • UART_DATABIT_5 : lpc17xx_uart.h
  • UART_DATABIT_6 : lpc17xx_uart.h
  • UART_DATABIT_7 : lpc17xx_uart.h
  • UART_DATABIT_8 : lpc17xx_uart.h
  • UART_DATABIT_Type : lpc17xx_uart.h
  • UART_DeInit() : lpc17xx_uart.h
  • UART_DLL_MASKBIT : lpc17xx_uart.h
  • UART_DLM_MASKBIT : lpc17xx_uart.h
  • UART_FCR_BITMASK : lpc17xx_uart.h
  • UART_FCR_DMAMODE_SEL : lpc17xx_uart.h
  • UART_FCR_FIFO_EN : lpc17xx_uart.h
  • UART_FCR_RX_RS : lpc17xx_uart.h
  • UART_FCR_TRG_LEV0 : lpc17xx_uart.h
  • UART_FCR_TRG_LEV1 : lpc17xx_uart.h
  • UART_FCR_TRG_LEV2 : lpc17xx_uart.h
  • UART_FCR_TRG_LEV3 : lpc17xx_uart.h
  • UART_FCR_TX_RS : lpc17xx_uart.h
  • UART_FDR_BITMASK : lpc17xx_uart.h
  • UART_FDR_DIVADDVAL : lpc17xx_uart.h
  • UART_FDR_MULVAL : lpc17xx_uart.h
  • UART_FIFO_TRGLEV0 : lpc17xx_uart.h
  • UART_FIFO_TRGLEV1 : lpc17xx_uart.h
  • UART_FIFO_TRGLEV2 : lpc17xx_uart.h
  • UART_FIFO_TRGLEV3 : lpc17xx_uart.h
  • UART_FIFOConfig() : lpc17xx_uart.h
  • UART_FIFOConfigStructInit() : lpc17xx_uart.h
  • UART_FIFOLVL_BITMASK : lpc17xx_uart.h
  • UART_FIFOLVL_RXFIFOLVL : lpc17xx_uart.h
  • UART_FIFOLVL_TXFIFOLVL : lpc17xx_uart.h
  • UART_FITO_LEVEL_Type : lpc17xx_uart.h
  • UART_ForceBreak() : lpc17xx_uart.h
  • UART_FullModemConfigMode() : lpc17xx_uart.h
  • UART_FullModemForcePinState() : lpc17xx_uart.h
  • UART_FullModemGetStatus() : lpc17xx_uart.h
  • UART_GetIntId() : lpc17xx_uart.h
  • UART_GetLineStatus() : lpc17xx_uart.h
  • UART_ICR_BITMASK : lpc17xx_uart.h
  • UART_ICR_FIXPULSE_EN : lpc17xx_uart.h
  • UART_ICR_IRDAEN : lpc17xx_uart.h
  • UART_ICR_IRDAINV : lpc17xx_uart.h
  • UART_ICR_PULSEDIV : lpc17xx_uart.h
  • UART_IER_ABEOINT_EN : lpc17xx_uart.h
  • UART_IER_ABTOINT_EN : lpc17xx_uart.h
  • UART_IER_BITMASK : lpc17xx_uart.h
  • UART_IER_RBRINT_EN : lpc17xx_uart.h
  • UART_IER_RLSINT_EN : lpc17xx_uart.h
  • UART_IER_THREINT_EN : lpc17xx_uart.h
  • UART_IIR_ABEO_INT : lpc17xx_uart.h
  • UART_IIR_ABTO_INT : lpc17xx_uart.h
  • UART_IIR_BITMASK : lpc17xx_uart.h
  • UART_IIR_FIFO_EN : lpc17xx_uart.h
  • UART_IIR_INTID_CTI : lpc17xx_uart.h
  • UART_IIR_INTID_MASK : lpc17xx_uart.h
  • UART_IIR_INTID_RDA : lpc17xx_uart.h
  • UART_IIR_INTID_RLS : lpc17xx_uart.h
  • UART_IIR_INTID_THRE : lpc17xx_uart.h
  • UART_IIR_INTSTAT_PEND : lpc17xx_uart.h
  • UART_Init() : lpc17xx_uart.h
  • UART_INT_Type : lpc17xx_uart.h
  • UART_INTCFG_ABEO : lpc17xx_uart.h
  • UART_INTCFG_ABTO : lpc17xx_uart.h
  • UART_INTCFG_RBR : lpc17xx_uart.h
  • UART_INTCFG_RLS : lpc17xx_uart.h
  • UART_INTCFG_THRE : lpc17xx_uart.h
  • UART_IntConfig() : lpc17xx_uart.h
  • UART_IntErr() : uart_interrupt_test.c , rs485_master.c , rs485_slave.c
  • UART_IntReceive() : uart_interrupt_test.c , rs485_master.c , rs485_slave.c
  • UART_IntTransmit() : uart_interrupt_test.c
  • UART_IrDA_PULSE_Type : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV128 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV16 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV2 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV256 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV32 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV4 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV64 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV8 : lpc17xx_uart.h
  • UART_IrDACmd() : lpc17xx_uart.h
  • UART_IrDAInvtInputCmd() : lpc17xx_uart.h
  • UART_IrDAPulseDivConfig() : lpc17xx_uart.h
  • UART_LCR_BITMASK : lpc17xx_uart.h
  • UART_LCR_BREAK_EN : lpc17xx_uart.h
  • UART_LCR_DLAB_EN : lpc17xx_uart.h
  • UART_LCR_PARITY_EN : lpc17xx_uart.h
  • UART_LCR_PARITY_EVEN : lpc17xx_uart.h
  • UART_LCR_PARITY_F_0 : lpc17xx_uart.h
  • UART_LCR_PARITY_F_1 : lpc17xx_uart.h
  • UART_LCR_PARITY_ODD : lpc17xx_uart.h
  • UART_LCR_STOPBIT_SEL : lpc17xx_uart.h
  • UART_LCR_WLEN5 : lpc17xx_uart.h
  • UART_LCR_WLEN6 : lpc17xx_uart.h
  • UART_LCR_WLEN7 : lpc17xx_uart.h
  • UART_LCR_WLEN8 : lpc17xx_uart.h
  • UART_LINESTAT_BI : lpc17xx_uart.h
  • UART_LINESTAT_FE : lpc17xx_uart.h
  • UART_LINESTAT_OE : lpc17xx_uart.h
  • UART_LINESTAT_PE : lpc17xx_uart.h
  • UART_LINESTAT_RDR : lpc17xx_uart.h
  • UART_LINESTAT_RXFE : lpc17xx_uart.h
  • UART_LINESTAT_TEMT : lpc17xx_uart.h
  • UART_LINESTAT_THRE : lpc17xx_uart.h
  • UART_LOAD_DLL : lpc17xx_uart.h
  • UART_LOAD_DLM : lpc17xx_uart.h
  • UART_LS_Type : lpc17xx_uart.h
  • UART_LSR_BI : lpc17xx_uart.h
  • UART_LSR_BITMASK : lpc17xx_uart.h
  • UART_LSR_FE : lpc17xx_uart.h
  • UART_LSR_OE : lpc17xx_uart.h
  • UART_LSR_PE : lpc17xx_uart.h
  • UART_LSR_RDR : lpc17xx_uart.h
  • UART_LSR_RXFE : lpc17xx_uart.h
  • UART_LSR_TEMT : lpc17xx_uart.h
  • UART_LSR_THRE : lpc17xx_uart.h
  • UART_MODEM_MODE_Type : lpc17xx_uart.h
  • UART_MODEM_PIN_Type : lpc17xx_uart.h
  • UART_MODEM_STAT_type : lpc17xx_uart.h
  • UART_PARITY_EVEN : lpc17xx_uart.h
  • UART_PARITY_NONE : lpc17xx_uart.h
  • UART_PARITY_ODD : lpc17xx_uart.h
  • UART_PARITY_SP_0 : lpc17xx_uart.h
  • UART_PARITY_SP_1 : lpc17xx_uart.h
  • UART_PARITY_Type : lpc17xx_uart.h
  • UART_PORT : uart_irda_receive.c , uart_irda_transmit.c , uart_polling_test.c
  • UART_RBR_MASKBIT : lpc17xx_uart.h
  • UART_Receive() : lpc17xx_uart.h
  • UART_ReceiveByte() : lpc17xx_uart.h
  • UART_RING_BUFSIZE : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • UART_RS485_DIRCTRL_PIN_Type : lpc17xx_uart.h
  • UART_RS485Config() : lpc17xx_uart.h
  • UART_RS485ReceiverCmd() : lpc17xx_uart.h
  • UART_RS485Send() : lpc17xx_uart.c
  • UART_RS485SendData() : lpc17xx_uart.h
  • UART_RS485SendSlvAddr() : lpc17xx_uart.h
  • UART_SCR_BIMASK : lpc17xx_uart.h
  • UART_Send() : lpc17xx_uart.h
  • UART_SendByte() : lpc17xx_uart.h
  • UART_STOPBIT_1 : lpc17xx_uart.h
  • UART_STOPBIT_2 : lpc17xx_uart.h
  • UART_STOPBIT_Type : lpc17xx_uart.h
  • UART_TER_BITMASK : lpc17xx_uart.h
  • UART_TER_TXEN : lpc17xx_uart.h
  • UART_THR_MASKBIT : lpc17xx_uart.h
  • UART_TX_FIFO_SIZE : lpc17xx_uart.h
  • UART_TxCmd() : lpc17xx_uart.h
  • UARTConfigStruct : timer_capture.c
  • UARTGetChar() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutChar() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutDec() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutDec16() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutDec32() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutHex() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutHex16() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutHex32() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPuts() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPuts_() : debug_frmwrk.h , debug_frmwrk.c
  • UARTReceive() : rs485_master.c , rs485_slave.c , uart_fullmodem_test.c , uart_interrupt_test.c
  • UARTSend() : uart_interrupt_test.c , uart_fullmodem_test.c
  • UDPBUF : uip.c
  • uip_abort : uip.h
  • UIP_ABORT : uip.h
  • uip_aborted : uip.h
  • uip_acc32 : uip.c , uip.h
  • UIP_ACKDATA : uip.h
  • uip_acked : uip.h
  • UIP_ACTIVE_OPEN : uipopt.h
  • uip_add32() : uip.c , uip_arch.h
  • UIP_APPCALL : hello-world.h , smtp.h , telnetd.h , webclient.h , webserver.h
  • uip_appdata : uip.c , uip.h
  • UIP_APPDATA_SIZE : uip.h
  • uip_arp_arpin() : uip_arp.c
  • uip_arp_init() : uip_arp.c
  • uip_arp_ipin() : uip_arp.c
  • UIP_ARP_MAXAGE : uipopt.h
  • uip_arp_out() : uip_arp.c
  • uip_arp_timer() : uip_arp.c
  • UIP_ARPTAB_SIZE : uipopt.h
  • UIP_BIG_ENDIAN : uipopt.h
  • UIP_BROADCAST : uipopt.h
  • uip_buf : uip.h
  • UIP_BUFSIZE : uipopt.h
  • UIP_BYTE_ORDER : uipopt.h
  • uip_chksum() : uip.c , uip_arch.h
  • uip_close : uip.h
  • UIP_CLOSE : uip.h
  • UIP_CLOSED : uip.h
  • uip_closed : uip.h
  • UIP_CLOSING : uip.h
  • UIP_CONF_BUFFER_SIZE : uip-conf.h
  • UIP_CONF_BYTE_ORDER : uip-conf.h
  • UIP_CONF_LOGGING : uip-conf.h
  • UIP_CONF_MAX_CONNECTIONS : uip-conf.h
  • UIP_CONF_MAX_LISTENPORTS : uip-conf.h
  • UIP_CONF_STATISTICS : uip-conf.h
  • UIP_CONF_UDP : uip-conf.h
  • UIP_CONF_UDP_CHECKSUMS : uip-conf.h
  • uip_conn : uip.c , uip.h
  • uip_conn_active : uip.h
  • uip_connect() : uip.c , uip.h
  • UIP_CONNECTED : uip.h
  • uip_connected : uip.h
  • uip_conns : uip.c , uip.h
  • UIP_CONNS : uipopt.h
  • UIP_DATA : uip.h
  • uip_datalen : uip.h
  • uip_draddr : uip.c , uip.h
  • UIP_ESTABLISHED : uip.h
  • uip_ethaddr : uip.c , uip_arp.h
  • UIP_ETHTYPE_ARP : uip_arp.h
  • UIP_ETHTYPE_IP : uip_arp.h
  • UIP_ETHTYPE_IP6 : uip_arp.h
  • UIP_FIN_WAIT_1 : uip.h
  • UIP_FIN_WAIT_2 : uip.h
  • UIP_FIXEDADDR : uipopt.h
  • UIP_FIXEDETHADDR : uipopt.h
  • uip_flags : uip.c , uip.h
  • uip_fw_default() : uip-fw.c
  • UIP_FW_DROPPED : uip-fw.h
  • uip_fw_forward() : uip-fw.c
  • UIP_FW_FORWARDED : uip-fw.h
  • uip_fw_init() : uip-fw.c
  • UIP_FW_LOCAL : uip-fw.h
  • UIP_FW_NETIF : uip-fw.h
  • UIP_FW_NOROUTE : uip-fw.h
  • UIP_FW_OK : uip-fw.h
  • uip_fw_output() : uip-fw.c
  • uip_fw_periodic() : uip-fw.c
  • uip_fw_register() : uip-fw.c
  • uip_fw_setipaddr : uip-fw.h
  • uip_fw_setnetmask : uip-fw.h
  • UIP_FW_TOOLARGE : uip-fw.h
  • UIP_FW_ZEROLEN : uip-fw.h
  • uip_getdraddr : uip.h
  • uip_gethostaddr : uip.h
  • uip_getnetmask : uip.h
  • uip_hostaddr : uip.c , uip.h
  • uip_init() : uip.c , uip.h
  • uip_initialmss : uip.h
  • uip_input : uip.h
  • uip_ip4addr_t : uip.h
  • uip_ip6addr : uip.h
  • uip_ip6addr_t : uip.h
  • uip_ipaddr : uip.h
  • uip_ipaddr1 : uip.h
  • uip_ipaddr2 : uip.h
  • uip_ipaddr3 : uip.h
  • uip_ipaddr4 : uip.h
  • uip_ipaddr_cmp : uip.h
  • uip_ipaddr_copy : uip.h
  • uip_ipaddr_mask : uip.h
  • uip_ipaddr_maskcmp : uip.h
  • uip_ipaddr_t : uip.h
  • uip_ipchksum() : uip.c , uip_arch.h
  • UIP_IPH_LEN : uip.h
  • UIP_IPTCPH_LEN : uip.h
  • UIP_IPUDPH_LEN : uip.h
  • UIP_LAST_ACK : uip.h
  • uip_len : uip.c , uip.h
  • uip_listen() : uip.c , uip.h
  • uip_listenports : uip.c
  • UIP_LISTENPORTS : uipopt.h
  • UIP_LITTLE_ENDIAN : uipopt.h
  • UIP_LLH_LEN : uipopt.h
  • uip_log() : main.c , uip.c , uipopt.h
  • UIP_LOG : uip.c
  • UIP_LOGGING : uipopt.h
  • UIP_MAXRTX : uipopt.h
  • UIP_MAXSYNRTX : uipopt.h
  • uip_mss : uip.h
  • uip_neighbor_add() : uip-neighbor.c , uip-neighbor.h
  • uip_neighbor_init() : uip-neighbor.c , uip-neighbor.h
  • uip_neighbor_lookup() : uip-neighbor.c , uip-neighbor.h
  • uip_neighbor_periodic() : uip-neighbor.c , uip-neighbor.h
  • uip_neighbor_update() : uip-neighbor.c , uip-neighbor.h
  • uip_netmask : uip.c , uip.h
  • UIP_NEWDATA : uip.h
  • uip_newdata : uip.h
  • uip_outstanding : uip.h
  • uip_periodic : uip.h
  • uip_periodic_conn : uip.h
  • UIP_PINGADDRCONF : uipopt.h
  • uip_poll : uip.h
  • UIP_POLL : uip.h
  • uip_poll_conn : uip.h
  • UIP_POLL_REQUEST : uip.h
  • uip_process() : uip.c
  • UIP_PROTO_ICMP : uip.h
  • UIP_PROTO_ICMP6 : uip.h
  • UIP_PROTO_TCP : uip.h
  • UIP_PROTO_UDP : uip.h
  • UIP_REASS_MAXAGE : uipopt.h
  • UIP_REASSEMBLY : uipopt.h
  • UIP_RECEIVE_WINDOW : uipopt.h
  • uip_restart : uip.h
  • uip_rexmit : uip.h
  • UIP_REXMIT : uip.h
  • UIP_RTO : uipopt.h
  • uip_sappdata : uip.c
  • uip_send() : uip.c , uip.h
  • uip_setdraddr : uip.h
  • uip_setethaddr : uip_arp.h
  • uip_sethostaddr : uip.h
  • uip_setipid() : uip.c , uip.h
  • uip_setnetmask : uip.h
  • uip_slen : uip.c
  • uip_split_output() : uip-split.c , uip-split.h
  • UIP_STAT : uip.c
  • uip_stat : uip.c , uip.h
  • UIP_STATISTICS : uipopt.h
  • uip_stats_t : uip-conf.h
  • uip_stop : uip.h
  • UIP_STOPPED : uip.h
  • uip_stopped : uip.h
  • UIP_SYN_RCVD : uip.h
  • UIP_SYN_SENT : uip.h
  • uip_tcp_appstate_t : hello-world.h , smtp.h , telnetd.h , webclient.h , webserver.h
  • UIP_TCP_MSS : uipopt.h
  • uip_tcpchksum() : uip.c , uip_arch.h
  • UIP_TCPH_LEN : uip.h
  • UIP_TCPIP_HLEN : uip.h
  • UIP_TIME_WAIT : uip.h
  • UIP_TIME_WAIT_TIMEOUT : uipopt.h
  • UIP_TIMEDOUT : uip.h
  • uip_timedout : uip.h
  • UIP_TIMER : uip.h
  • UIP_TS_MASK : uip.h
  • UIP_TTL : uipopt.h
  • UIP_UDP : uipopt.h
  • UIP_UDP_APPCALL : dhcpc.h , resolv.h
  • uip_udp_appstate_t : dhcpc.h , resolv.h
  • uip_udp_bind : uip.h
  • UIP_UDP_CHECKSUMS : uipopt.h
  • UIP_UDP_CONNS : uipopt.h
  • uip_udp_new() : uip.h
  • uip_udp_remove : uip.h
  • uip_udp_send : uip.h
  • UIP_UDP_SEND_CONN : uip.h
  • uip_udpchksum() : uip.c , uip_arch.h
  • uip_udpconnection : uip.h
  • UIP_UDPH_LEN : uip.h
  • uip_unlisten() : uip.c , uip.h
  • UIP_URGDATA : uipopt.h
  • uip_urgdatalen : uip.h
  • uiplib_ipaddrconv() : uiplib.c , uiplib.h
  • UNPRIVILEGE_LED : privilege.c
  • UNPRIVILEGE_LEDPORT : privilege.c
  • UNS_16 : lpc_types.h
  • UNS_32 : lpc_types.h
  • UNS_64 : lpc_types.h
  • UNS_8 : lpc_types.h
  • UsageFault_IRQn : LPC17xx.h
  • USB_ADC_CIF_NUM : usbcfg.h
  • USB_ADC_SIF1_NUM : usbcfg.h
  • USB_ADC_SIF2_NUM : usbcfg.h
  • USB_AltSetting : usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c
  • USB_AUDIO : usbcfg.h
  • USB_CDC : usbcfg.h
  • USB_CDC_BUFSIZE : usbcfg.h
  • USB_CDC_CIF_NUM : usbcfg.h
  • USB_CDC_DIF_NUM : usbcfg.h
  • USB_CLASS : usbcfg.h
  • USB_ClearEPBuf() : usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_ClrStallEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_COMMON_DESCRIPTOR : usb.h
  • USB_CONFIG_BUS_POWERED : usb.h
  • USB_CONFIG_POWER_MA : usb.h
  • USB_CONFIG_POWERED_MASK : usb.h
  • USB_CONFIG_REMOTE_WAKEUP : usb.h
  • USB_CONFIG_SELF_POWERED : usb.h
  • USB_ConfigDescriptor : usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h
  • USB_ConfigEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_CONFIGUARTION_DESC_SIZE : usbdesc.h
  • USB_Configuration : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • USB_CONFIGURATION_DESCRIPTOR : usb.h
  • USB_CONFIGURATION_DESCRIPTOR_TYPE : usb.h
  • USB_Configure() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_Configure_Event() : usbuser.h
  • USB_CONFIGURE_EVENT : usbcfg.h
  • USB_Connect() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_DataInStage() : usbcore.c
  • USB_DataOutStage() : usbcore.c
  • USB_DEBUG_DESCRIPTOR_TYPE : usb.h
  • USB_DEVICE_CLASS_AUDIO : usb.h
  • USB_DEVICE_CLASS_COMMUNICATIONS : usb.h
  • USB_DEVICE_CLASS_HUB : usb.h
  • USB_DEVICE_CLASS_HUMAN_INTERFACE : usb.h
  • USB_DEVICE_CLASS_MISCELLANEOUS : usb.h
  • USB_DEVICE_CLASS_MONITOR : usb.h
  • USB_DEVICE_CLASS_PHYSICAL_INTERFACE : usb.h
  • USB_DEVICE_CLASS_POWER : usb.h
  • USB_DEVICE_CLASS_PRINTER : usb.h
  • USB_DEVICE_CLASS_RESERVED : usb.h
  • USB_DEVICE_CLASS_STORAGE : usb.h
  • USB_DEVICE_CLASS_VENDOR_SPECIFIC : usb.h
  • USB_DEVICE_DESC_SIZE : usbdesc.h
  • USB_DEVICE_DESCRIPTOR : usb.h
  • USB_DEVICE_DESCRIPTOR_TYPE : usb.h
  • USB_DEVICE_QUALIFIER_DESCRIPTOR : usb.h
  • USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE : usb.h
  • USB_DeviceAddress : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • USB_DeviceDescriptor : usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h
  • USB_DeviceStatus : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • USB_DirCtrlEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_DisableEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_DMA : usbcfg.h
  • USB_DMA_BufAdr() : usbhw.h
  • USB_DMA_BufCnt() : usbhw.h
  • USB_DMA_BUSY : usbhw.h
  • USB_DMA_DESCRIPTOR : usbhw.h
  • USB_DMA_Disable() : usbhw.h
  • USB_DMA_DONE : usbhw.h
  • USB_DMA_Enable() : usbhw.h
  • USB_DMA_EP : usbcfg.h
  • USB_DMA_ERROR : usbhw.h
  • USB_DMA_IDLE : usbhw.h
  • USB_DMA_INVALID : usbhw.h
  • USB_DMA_OVER_RUN : usbhw.h
  • USB_DMA_Setup() : usbhw.h
  • USB_DMA_Status() : usbhw.h
  • USB_DMA_UNDER_RUN : usbhw.h
  • USB_DMA_UNKNOWN : usbhw.h
  • USB_EnableEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_EndPoint0() : usbcore.c , usbuser.h , usbcore.c , usbuser.h , usbcore.c , usbuser.h , usbcore.c , usbuser.h
  • USB_EndPoint1() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint10() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint11() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint12() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint13() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint14() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint15() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint2() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint3() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint4() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint5() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint6() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint7() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint8() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint9() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_ENDPOINT_DESC_SIZE : usbdesc.h
  • USB_ENDPOINT_DESCRIPTOR : usb.h
  • USB_ENDPOINT_DESCRIPTOR_TYPE : usb.h
  • USB_ENDPOINT_DIRECTION_MASK : usb.h
  • USB_ENDPOINT_IN : usb.h
  • USB_ENDPOINT_OUT : usb.h
  • USB_ENDPOINT_SYNC_ADAPTIVE : usb.h
  • USB_ENDPOINT_SYNC_ASYNCHRONOUS : usb.h
  • USB_ENDPOINT_SYNC_MASK : usb.h
  • USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION : usb.h
  • USB_ENDPOINT_SYNC_SYNCHRONOUS : usb.h
  • USB_ENDPOINT_TYPE_BULK : usb.h
  • USB_ENDPOINT_TYPE_CONTROL : usb.h
  • USB_ENDPOINT_TYPE_INTERRUPT : usb.h
  • USB_ENDPOINT_TYPE_ISOCHRONOUS : usb.h
  • USB_ENDPOINT_TYPE_MASK : usb.h
  • USB_ENDPOINT_USAGE_DATA : usb.h
  • USB_ENDPOINT_USAGE_FEEDBACK : usb.h
  • USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK : usb.h
  • USB_ENDPOINT_USAGE_MASK : usb.h
  • USB_ENDPOINT_USAGE_RESERVED : usb.h
  • USB_EndPointHalt : usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c
  • USB_EndPointMask : usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c
  • USB_EndPointStall : usbcore.h , usbcore.c
  • USB_EP_DATA : usbcore.h
  • USB_EP_EVENT : usbcfg.h
  • USB_EP_NUM : usbcfg.h
  • USB_ERR_B_OVRN : usbhw.h
  • USB_ERR_BTSTF : usbhw.h
  • USB_ERR_DCRC : usbhw.h
  • USB_ERR_EOP : usbhw.h
  • USB_ERR_PID : usbhw.h
  • USB_ERR_TGL : usbhw.h
  • USB_ERR_TIMOUT : usbhw.h
  • USB_ERR_UEPKT : usbhw.h
  • USB_ERROR_EVENT : usbcfg.h
  • USB_Error_Event() : usbuser.h
  • USB_ERROR_EVENT : usbcfg.h
  • USB_Error_Event() : usbuser.h
  • USB_ERROR_EVENT : usbcfg.h
  • USB_Error_Event() : usbuser.h
  • USB_EVT_IN : usbuser.h
  • USB_EVT_IN_DMA_EOT : usbuser.h
  • USB_EVT_IN_DMA_ERR : usbuser.h
  • USB_EVT_IN_DMA_NDR : usbuser.h
  • USB_EVT_IN_NAK : usbuser.h
  • USB_EVT_IN_STALL : usbuser.h
  • USB_EVT_OUT : usbuser.h
  • USB_EVT_OUT_DMA_EOT : usbuser.h
  • USB_EVT_OUT_DMA_ERR : usbuser.h
  • USB_EVT_OUT_DMA_NDR : usbuser.h
  • USB_EVT_OUT_NAK : usbuser.h
  • USB_EVT_OUT_STALL : usbuser.h
  • USB_EVT_SETUP : usbuser.h
  • USB_FEATURE_ENDPOINT_STALL : usb.h
  • USB_FEATURE_EVENT : usbcfg.h
  • USB_Feature_Event() : usbuser.h
  • USB_FEATURE_EVENT : usbcfg.h
  • USB_Feature_Event() : usbuser.h
  • USB_FEATURE_REMOTE_WAKEUP : usb.h
  • USB_GetDescriptor() : usbcore.c
  • USB_GetFrame() : usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_GetStatus() : usbcore.c
  • USB_GETSTATUS_ENDPOINT_STALL : usb.h
  • USB_GETSTATUS_REMOTE_WAKEUP : usb.h
  • USB_GETSTATUS_SELF_POWERED : usb.h
  • USB_HID : usbcfg.h
  • USB_HID_IF_NUM : usbcfg.h
  • USB_IF_NUM : usbcfg.h
  • USB_Init() : usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE : usb.h
  • USB_INTERFACE_DESC_SIZE : usbdesc.h
  • USB_INTERFACE_DESCRIPTOR : usb.h
  • USB_INTERFACE_DESCRIPTOR_TYPE : usb.h
  • USB_INTERFACE_EVENT : usbcfg.h
  • USB_Interface_Event() : usbuser.h
  • USB_INTERFACE_EVENT : usbcfg.h
  • USB_Interface_Event() : usbuser.h
  • USB_INTERFACE_EVENT : usbcfg.h
  • USB_Interface_Event() : usbuser.h
  • USB_INTERFACE_POWER_DESCRIPTOR_TYPE : usb.h
  • USB_IRQHandler() : usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_IRQn : LPC17xx.h
  • USB_MAX_PACKET0 : usbcfg.h
  • USB_MSC : usbcfg.h
  • USB_MSC_IF_NUM : usbcfg.h
  • USB_NumInterfaces : usbcore.c
  • USB_OTG_DESCRIPTOR_TYPE : usb.h
  • USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE : usb.h
  • USB_P_EP : usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_POWER : usbcfg.h
  • USB_POWER_EVENT : usbcfg.h
  • USB_Power_Event() : usbuser.h
  • USB_RAM_ADR : usbhw.h
  • USB_RAM_SZ : usbhw.h
  • USB_ReadEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_ReqGetConfiguration() : usbcore.c
  • USB_ReqGetDescriptor() : usbcore.c
  • USB_ReqGetInterface() : usbcore.c
  • USB_ReqGetStatus() : usbcore.c
  • USB_ReqSetAddress() : usbcore.c
  • USB_ReqSetClrFeature() : usbcore.c
  • USB_ReqSetConfiguration() : usbcore.c
  • USB_ReqSetInterface() : usbcore.c
  • USB_REQUEST_CLEAR_FEATURE : usb.h
  • USB_REQUEST_GET_CONFIGURATION : usb.h
  • USB_REQUEST_GET_DESCRIPTOR : usb.h
  • USB_REQUEST_GET_INTERFACE : usb.h
  • USB_REQUEST_GET_STATUS : usb.h
  • USB_REQUEST_SET_ADDRESS : usb.h
  • USB_REQUEST_SET_CONFIGURATION : usb.h
  • USB_REQUEST_SET_DESCRIPTOR : usb.h
  • USB_REQUEST_SET_FEATURE : usb.h
  • USB_REQUEST_SET_INTERFACE : usb.h
  • USB_REQUEST_SYNC_FRAME : usb.h
  • USB_Reset() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_Reset_Event() : usbuser.h
  • USB_RESET_EVENT : usbcfg.h
  • USB_Reset_Event() : usbuser.h
  • USB_RESET_EVENT : usbcfg.h
  • USB_Reset_Event() : usbuser.h
  • USB_RESET_EVENT : usbcfg.h
  • USB_Reset_Event() : usbuser.h
  • USB_ResetCore() : usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • USB_ResetEP() : usbhw.c , usbhw.h , usbhw.c
  • USB_Resume() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_RESUME_EVENT : usbcfg.h
  • USB_Resume_Event() : usbuser.h
  • USB_RESUME_EVENT : usbcfg.h
  • USB_Resume_Event() : usbuser.h
  • USB_RESUME_EVENT : usbcfg.h
  • USB_SetAddress() : usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_SetClrFeature() : usbcore.c
  • USB_SetConfiguration() : usbcore.c
  • USB_SetInterface() : usbcore.c
  • USB_SetStallEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_SETUP_PACKET : usb.h
  • USB_SetupStage() : usbcore.c
  • USB_SOF_Event() : usbuser.h
  • USB_SOF_EVENT : usbcfg.h
  • USB_SOF_Event() : usbuser.h
  • USB_SOF_EVENT : usbcfg.h
  • USB_SOF_Event() : usbuser.h
  • USB_SOF_EVENT : usbcfg.h
  • USB_SOF_Event() : usbuser.h
  • USB_StatusInStage() : usbcore.c
  • USB_StatusOutStage() : usbcore.c
  • USB_STRING_DESCRIPTOR : usb.h
  • USB_STRING_DESCRIPTOR_TYPE : usb.h
  • USB_StringDescriptor : usbdesc.c , usbdesc.h , usbdesc.c
  • USB_Suspend() : usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_SUSPEND_EVENT : usbcfg.h
  • USB_Suspend_Event() : usbuser.h
  • USB_SUSPEND_EVENT : usbcfg.h
  • USB_Suspend_Event() : usbuser.h
  • USB_SUSPEND_EVENT : usbcfg.h
  • USB_Suspend_Event() : usbuser.h
  • USB_VENDOR : usbcfg.h
  • USB_WakeUp() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_WAKEUP_EVENT : usbcfg.h
  • USB_WakeUp_Event() : usbuser.h
  • USB_WAKEUP_EVENT : usbcfg.h
  • USB_WakeUp_Event() : usbuser.h
  • USB_WAKEUP_EVENT : usbcfg.h
  • USB_WakeUp_Event() : usbuser.h
  • USB_WakeUpCfg() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_WriteEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USBActivity_IRQn : LPC17xx.h
  • USBCLKCFG_Val : system_LPC17xx.c
  • USE_STATIC_INIT : arm_class_marks_example_f32.c
  • USED_UART_DEBUG_PORT : debug_frmwrk.h
  • USEDI2CDEV : i2c_interrupt_test.c , i2c_polling_test.c , pca8581_test.c
  • USEDI2CDEV_M : master.c , i2c_master_slave_int_test.c
  • USEDI2CDEV_S : i2c_master_slave_int_test.c , slave.c
  • USEDSSPDEV_M : ti_test.c , microwire_test.c
  • USEDSSPDEV_S : ti_test.c , microwire_test.c
  • Usr_Init_Emac() : emactest.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- v -

  • var : arm_class_marks_example_f32.c
  • VAR_ADDRESS : bitband.c
  • VAR_BIT : bitband.c
  • VCOM_CheckSerialState() : vcomdemo.c
  • VCOM_Init() : vcomdemo.c
  • VCOM_Serial2Usb() : vcomdemo.c
  • VCOM_Usb2Serial() : vcomdemo.c
  • VeloAcc : qei_test_velo.c
  • VeloAccFlag : qei_test_velo.c
  • VeloCapCnt : qei_test_velo.c
  • VIRTUAL_QEI_SIGNAL : qei_test_velo.c
  • VirtualQEISignal_Init() : qei_test_velo.c
  • VOLCTR : drv_glcd.h
  • VolCur : usbaudio.h , adcuser.c
  • VOLDOWN : drv_glcd.h
  • VolMax : adcuser.c
  • VolMin : adcuser.c
  • VolRes : adcuser.c
  • Volume : usbaudio.h , usbdmain.c
  • VOLUP : drv_glcd.h
  • VSCSAD : drv_glcd.h
  • VTOR_OFFSET : vt_relocation.c
  • VUM : usbdmain.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- w -

  • W : usb.h
  • WAITED_PIXEL : drv_glcd.h
  • WB : usb.h
  • WBVAL : usbdesc.h
  • wDescriptorLength : hid.h
  • WDT_CLK_OPT : lpc17xx_wdt.h
  • WDT_CLKSRC_IRC : lpc17xx_wdt.h
  • WDT_CLKSRC_PCLK : lpc17xx_wdt.h
  • WDT_CLKSRC_RTC : lpc17xx_wdt.h
  • WDT_ClrTimeOutFlag() : lpc17xx_wdt.h
  • WDT_Feed() : lpc17xx_wdt.h
  • wdt_flag : wdt_interrupt_test.c
  • WDT_GetCurrentCount() : lpc17xx_wdt.h
  • WDT_Init() : lpc17xx_wdt.h
  • WDT_IRQHandler() : wdt_deepsleep.c , wdt_interrupt_test.c
  • WDT_IRQn : LPC17xx.h
  • WDT_MODE_INT_ONLY : lpc17xx_wdt.h
  • WDT_MODE_OPT : lpc17xx_wdt.h
  • WDT_MODE_RESET : lpc17xx_wdt.h
  • WDT_ReadTimeOutFlag() : lpc17xx_wdt.h
  • WDT_Start() : lpc17xx_wdt.h
  • WDT_TIMEOUT : wdt_deepsleep.c , wdt_interrupt_test.c , wdt_reset_test.c
  • WDT_TIMEOUT_MAX : lpc17xx_wdt.h
  • WDT_TIMEOUT_MIN : lpc17xx_wdt.h
  • WDT_UpdateTimeOut() : lpc17xx_wdt.h
  • WDT_US_INDEX : lpc17xx_wdt.h
  • WDT_WDCLKSEL_MASK : lpc17xx_wdt.h
  • WDT_WDCLKSEL_PCLK : lpc17xx_wdt.h
  • WDT_WDCLKSEL_RC : lpc17xx_wdt.h
  • WDT_WDCLKSEL_RTC : lpc17xx_wdt.h
  • WDT_WDFEED_MASK : lpc17xx_wdt.h
  • WDT_WDMOD : lpc17xx_wdt.h
  • WDT_WDMOD_MASK : lpc17xx_wdt.h
  • WDT_WDMOD_WDEN : lpc17xx_wdt.h
  • WDT_WDMOD_WDINT : lpc17xx_wdt.h
  • WDT_WDMOD_WDRESET : lpc17xx_wdt.h
  • WDT_WDMOD_WDTOF : lpc17xx_wdt.h
  • WDT_WDTC_MASK : lpc17xx_wdt.h
  • webclient_aborted() : webclient.h
  • webclient_appcall() : webclient.c
  • webclient_close() : webclient.c
  • webclient_closed() : webclient.h
  • WEBCLIENT_CONF_MAX_URLLEN : webclient.h
  • webclient_connected() : webclient.h
  • webclient_datahandler() : webclient.h
  • webclient_filename() : webclient.c
  • webclient_get() : webclient.c
  • webclient_hostname() : webclient.c
  • webclient_init() : webclient.c
  • webclient_mimetype() : webclient.c
  • webclient_port() : webclient.c
  • WEBCLIENT_STATE_CLOSE : webclient.c
  • WEBCLIENT_STATE_DATA : webclient.c
  • WEBCLIENT_STATE_HEADERS : webclient.c
  • WEBCLIENT_STATE_STATUSLINE : webclient.c
  • webclient_timedout() : webclient.h
  • WEBCLIENT_TIMEOUT : webclient.c
  • WebSide : webpage.h
  • White : GLCD.h
  • WIDTH : GLCD_SPI_LPC1700.c
  • wIndex : usb.h
  • wire1 : arm_signal_converge_example_f32.c , arm_variance_example_f32.c
  • wire2 : arm_variance_example_f32.c , arm_signal_converge_example_f32.c
  • wire3 : arm_signal_converge_example_f32.c , arm_variance_example_f32.c
  • wLength : usb.h
  • wMaxPacketSize : usb.h
  • WOLCount : emactest.c
  • WORD_BYTE : usb.h
  • WrCmd() : usbhw.c
  • WrCmdDat() : usbhw.c
  • WrCmdEP() : usbhw.c
  • WrIdx_M : ti_test.c
  • WrIdx_S : ti_test.c , microwire_test.c
  • write() : printf-stdarg.c
  • WriteDWBE() : tcpip.c , tcpip.h
  • WriteFrame_EMAC() : EMAC.c
  • WriteWBE() : tcpip.c , tcpip.h
  • wTotalLength : usb.h
  • wValue : usb.h
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- x -

  • X_f32 : arm_matrix_example_f32.c
  • xferConfig : spi_interrupt_test.c , sc16is750_int.c , ssp_slave.c , spi_sdcard.c
  • xRef_f32 : arm_matrix_example_f32.c
  • XSPACING : arm_linear_interp_example_f32.c
  • XTAL : system_LPC17xx.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- y -

  • Yellow : GLCD.h
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
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  • q
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  • t
  • u
  • v
  • w
  • x
  • y

- _ -

  • __BUF_INCR : uart_interrupt_test.c , rs485_master.c , uart_fullmodem_test.c , rs485_slave.c
  • __BUF_IS_EMPTY : uart_fullmodem_test.c , uart_interrupt_test.c , rs485_master.c , rs485_slave.c
  • __BUF_IS_FULL : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • __BUF_MASK : uart_fullmodem_test.c , uart_interrupt_test.c , rs485_master.c , rs485_slave.c
  • __BUF_RESET : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • __BUF_WILL_FULL : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • __CCLK_DIV : system_LPC17xx.c
  • __CM3_CMSIS_VERSION : core_cm3.h
  • __CM3_CMSIS_VERSION_MAIN : core_cm3.h
  • __CM3_CMSIS_VERSION_SUB : core_cm3.h
  • __CMSIS_GENERIC : arm_math.h
  • __CORE_CLK : system_LPC17xx.c
  • __CORE_CM3_H_DEPENDANT : core_cm3.h
  • __CORE_CM3_H_GENERIC : core_cm3.h
  • __CORTEX_M : core_cm3.h
  • __FCCO : system_LPC17xx.c
  • __FPU_USED : core_cm3.h
  • __HSI : system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c
  • __I : core_cm3.h
  • __IO : core_cm3.h
  • __LC_H__ : lc.h
  • __LC_SWTICH_H__ : lc-switch.h
  • __M : system_LPC17xx.c
  • __MPU_PRESENT : LPC17xx.h
  • __N : system_LPC17xx.c
  • __NVIC_PRIO_BITS : LPC17xx.h
  • __O : core_cm3.h
  • __PACKq7 : arm_math.h
  • __SIMD32 : arm_math.h
  • __SYSTEM_CLOCK : system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c
  • __Vendor_SysTickConfig : LPC17xx.h
  • __XTAL : system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c
  • _ADC : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _ADC_CHANNEL : adc_hardware_trigger_test.c
  • _ADC_INT : adc_hardware_trigger_test.c
  • _BIT : lpc_types.h
  • _BITMASK : lpc_types.h
  • _CAN : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _DAC : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _DBC : debug_frmwrk.h
  • _DBD : debug_frmwrk.h
  • _DBD16 : debug_frmwrk.h
  • _DBD32 : debug_frmwrk.h
  • _DBG : debug_frmwrk.h
  • _DBG_ : debug_frmwrk.h
  • _DBGFWK : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _DBH : debug_frmwrk.h
  • _DBH16 : debug_frmwrk.h
  • _DBH32 : debug_frmwrk.h
  • _DG : debug_frmwrk.h
  • _EMAC : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _EXTI : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _GPDMA : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _GPIO : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _I2C : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _I2C0 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _I2C1 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _I2C2 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _I2S : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _MCPWM : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _PWM : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _PWM1 : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _QEI : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _RIT : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h
  • _RTC : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _SBF : lpc_types.h
  • _SPI : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h
  • _SSP : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _SSP0 : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _SSP1 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h
  • _SYSTICK : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _TIM : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _UART : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _UART0 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _UART1 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _UART2 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _UART3 : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • _USB_DMA : lpc17xx_libcfg_default.h
  • _USBDEV : lpc17xx_libcfg_default.h
  • _WDT : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
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  • f
  • g
  • h
  • i
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  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y

- k -

  • KB_LED_PIN : emactest.c
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
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  • l
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  • s
  • t
  • u
  • v
  • w
  • x
  • y

- l -

  • LC_END : lc-addrlabels.h , lc-switch.h
  • LC_INIT : lc-switch.h , lc-addrlabels.h
  • LC_RESUME : lc-addrlabels.h , lc-switch.h
  • LC_SET : lc-switch.h , lc-addrlabels.h
  • LCD_CS : GLCD_SPI_LPC1700.c
  • LCD_FLUSH_PIXELS : drv_glcd.h
  • LCD_SET_WINDOW : drv_glcd.h
  • LCD_WRITE_PIXEL : drv_glcd.h
  • LED1 : vcomdemo.h
  • LED1_MASK : emactest.c , main.c
  • LED2 : vcomdemo.h
  • LED2_MASK : emactest.c , main.c
  • LED3 : vcomdemo.h
  • LED4 : vcomdemo.h
  • LED5 : vcomdemo.h
  • LED6 : vcomdemo.h
  • LED7 : vcomdemo.h
  • LED8 : vcomdemo.h
  • LED_CFG : memory.h
  • LED_MSK : memory.h
  • LED_PIN : clock-arch.c , main.c
  • LED_RD : memory.h
  • LED_SUSP : memory.h
  • LED_WR : memory.h
  • LEDMSK : usbaudio.h , vcomdemo.h , demo.h
  • LightGrey : GLCD.h
  • LPC_ADC : LPC17xx.h
  • LPC_ADC_BASE : LPC17xx.h
  • LPC_AHB_BASE : LPC17xx.h
  • LPC_AHBRAM0_BASE : LPC17xx.h
  • LPC_AHBRAM1_BASE : LPC17xx.h
  • LPC_APB0_BASE : LPC17xx.h
  • LPC_APB1_BASE : LPC17xx.h
  • LPC_CAN1 : LPC17xx.h
  • LPC_CAN1_BASE : LPC17xx.h
  • LPC_CAN2 : LPC17xx.h
  • LPC_CAN2_BASE : LPC17xx.h
  • LPC_CANAF : LPC17xx.h
  • LPC_CANAF_BASE : LPC17xx.h
  • LPC_CANAF_RAM : LPC17xx.h
  • LPC_CANAF_RAM_BASE : LPC17xx.h
  • LPC_CANCR : LPC17xx.h
  • LPC_CANCR_BASE : LPC17xx.h
  • LPC_CM3_BASE : LPC17xx.h
  • LPC_DAC : LPC17xx.h
  • LPC_DAC_BASE : LPC17xx.h
  • LPC_EMAC : LPC17xx.h
  • LPC_EMAC_BASE : LPC17xx.h
  • LPC_FLASH_BASE : LPC17xx.h
  • LPC_GPDMA : LPC17xx.h
  • LPC_GPDMA_BASE : LPC17xx.h
  • LPC_GPDMACH0 : LPC17xx.h
  • LPC_GPDMACH0_BASE : LPC17xx.h
  • LPC_GPDMACH1 : LPC17xx.h
  • LPC_GPDMACH1_BASE : LPC17xx.h
  • LPC_GPDMACH2 : LPC17xx.h
  • LPC_GPDMACH2_BASE : LPC17xx.h
  • LPC_GPDMACH3 : LPC17xx.h
  • LPC_GPDMACH3_BASE : LPC17xx.h
  • LPC_GPDMACH4 : LPC17xx.h
  • LPC_GPDMACH4_BASE : LPC17xx.h
  • LPC_GPDMACH5 : LPC17xx.h
  • LPC_GPDMACH5_BASE : LPC17xx.h
  • LPC_GPDMACH6 : LPC17xx.h
  • LPC_GPDMACH6_BASE : LPC17xx.h
  • LPC_GPDMACH7 : LPC17xx.h
  • LPC_GPDMACH7_BASE : LPC17xx.h
  • LPC_GPIO0 : LPC17xx.h
  • LPC_GPIO0_BASE : LPC17xx.h
  • LPC_GPIO1 : LPC17xx.h
  • LPC_GPIO1_BASE : LPC17xx.h
  • LPC_GPIO2 : LPC17xx.h
  • LPC_GPIO2_BASE : LPC17xx.h
  • LPC_GPIO3 : LPC17xx.h
  • LPC_GPIO3_BASE : LPC17xx.h
  • LPC_GPIO4 : LPC17xx.h
  • LPC_GPIO4_BASE : LPC17xx.h
  • LPC_GPIO_BASE : LPC17xx.h
  • LPC_GPIOINT : LPC17xx.h
  • LPC_GPIOINT_BASE : LPC17xx.h
  • LPC_I2C0 : LPC17xx.h
  • LPC_I2C0_BASE : LPC17xx.h
  • LPC_I2C1 : LPC17xx.h
  • LPC_I2C1_BASE : LPC17xx.h
  • LPC_I2C2 : LPC17xx.h
  • LPC_I2C2_BASE : LPC17xx.h
  • LPC_I2S : LPC17xx.h
  • LPC_I2S_BASE : LPC17xx.h
  • LPC_MCPWM : LPC17xx.h
  • LPC_MCPWM_BASE : LPC17xx.h
  • LPC_PINCON : LPC17xx.h
  • LPC_PINCON_BASE : LPC17xx.h
  • LPC_PWM1 : LPC17xx.h
  • LPC_PWM1_BASE : LPC17xx.h
  • LPC_QEI : LPC17xx.h
  • LPC_QEI_BASE : LPC17xx.h
  • LPC_RAM_BASE : LPC17xx.h
  • LPC_RIT : LPC17xx.h
  • LPC_RIT_BASE : LPC17xx.h
  • LPC_RTC : LPC17xx.h
  • LPC_RTC_BASE : LPC17xx.h
  • LPC_SC : LPC17xx.h
  • LPC_SC_BASE : LPC17xx.h
  • LPC_SPI : LPC17xx.h
  • LPC_SPI_BASE : LPC17xx.h
  • LPC_SSP0 : LPC17xx.h
  • LPC_SSP0_BASE : LPC17xx.h
  • LPC_SSP1 : LPC17xx.h
  • LPC_SSP1_BASE : LPC17xx.h
  • LPC_TIM0 : LPC17xx.h
  • LPC_TIM0_BASE : LPC17xx.h
  • LPC_TIM1 : LPC17xx.h
  • LPC_TIM1_BASE : LPC17xx.h
  • LPC_TIM2 : LPC17xx.h
  • LPC_TIM2_BASE : LPC17xx.h
  • LPC_TIM3 : LPC17xx.h
  • LPC_TIM3_BASE : LPC17xx.h
  • LPC_UART0 : LPC17xx.h
  • LPC_UART0_BASE : LPC17xx.h
  • LPC_UART1 : LPC17xx.h
  • LPC_UART1_BASE : LPC17xx.h
  • LPC_UART2 : LPC17xx.h
  • LPC_UART2_BASE : LPC17xx.h
  • LPC_UART3 : LPC17xx.h
  • LPC_UART3_BASE : LPC17xx.h
  • LPC_USB : LPC17xx.h
  • LPC_USB_BASE : LPC17xx.h
  • LPC_WDT : LPC17xx.h
  • LPC_WDT_BASE : LPC17xx.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y

- m -

  • Magenta : GLCD.h
  • Maroon : GLCD.h
  • MAX : lpc_types.h
  • MAX_BLOCKSIZE : arm_convolution_example_f32.c , arm_dotproduct_example_f32.c , arm_sin_cos_example_f32.c , arm_variance_example_f32.c
  • MAX_CAP_TIMES : qei_test_velo.c
  • MAX_ENTRY : can_test_aflut.c
  • MAX_ETH_TX_DATA_SIZE : tcpip.h
  • MAX_GLCD_STR_SIZE : drv_glcd.h
  • MAX_HW_FULLCAN_OBJ : lpc17xx_can.h
  • MAX_RETRIES : resolv.c
  • MAX_RETRYS : tcpip.h
  • MAX_SW_FULLCAN_OBJ : lpc17xx_can.h
  • MAX_TCP_RX_DATA_SIZE : tcpip.h
  • MAX_TCP_TX_DATA_SIZE : tcpip.h
  • MAX_TIME : uip-neighbor.c
  • MAX_VEL : qei_test_velo.c
  • MCB_LPC17XX_ADC_INJECT_TEST : adc_burst_test.c
  • MCB_LPC_1768 : lpc17xx_emac.h , adc_burst_test.c , adc_dma_test.c , adc_interrupt_test.c , adc_polling_test.c , gpio_int.c , LedBlinky.c , extint_sleep.c , rit_interrupt.c , uart_fullmodem_test.c , wdt_interrupt_test.c
  • MCPWM_CAPCLR_CAP : lpc17xx_mcpwm.h
  • MCPWM_CAPCON_CAPMCI_FE : lpc17xx_mcpwm.h
  • MCPWM_CAPCON_CAPMCI_RE : lpc17xx_mcpwm.h
  • MCPWM_CAPCON_HNFCAP : lpc17xx_mcpwm.h
  • MCPWM_CAPCON_RT : lpc17xx_mcpwm.h
  • MCPWM_CHANNEL_CENTER_MODE : lpc17xx_mcpwm.h
  • MCPWM_CHANNEL_EDGE_MODE : lpc17xx_mcpwm.h
  • MCPWM_CHANNEL_PASSIVE_HI : lpc17xx_mcpwm.h
  • MCPWM_CHANNEL_PASSIVE_LO : lpc17xx_mcpwm.h
  • MCPWM_CNTCON_CNTR : lpc17xx_mcpwm.h
  • MCPWM_CNTCON_TCMCI_FE : lpc17xx_mcpwm.h
  • MCPWM_CNTCON_TCMCI_RE : lpc17xx_mcpwm.h
  • MCPWM_CON_ACMODE : lpc17xx_mcpwm.h
  • MCPWM_CON_CENTER : lpc17xx_mcpwm.h
  • MCPWM_CON_DCMODE : lpc17xx_mcpwm.h
  • MCPWM_CON_DISUP : lpc17xx_mcpwm.h
  • MCPWM_CON_DTE : lpc17xx_mcpwm.h
  • MCPWM_CON_INVBDC : lpc17xx_mcpwm.h
  • MCPWM_CON_POLAR : lpc17xx_mcpwm.h
  • MCPWM_CON_RUN : lpc17xx_mcpwm.h
  • MCPWM_CP_A0 : lpc17xx_mcpwm.h
  • MCPWM_CP_A1 : lpc17xx_mcpwm.h
  • MCPWM_CP_A2 : lpc17xx_mcpwm.h
  • MCPWM_CP_B0 : lpc17xx_mcpwm.h
  • MCPWM_CP_B1 : lpc17xx_mcpwm.h
  • MCPWM_CP_B2 : lpc17xx_mcpwm.h
  • MCPWM_DT : lpc17xx_mcpwm.h
  • MCPWM_INT_ABORT : lpc17xx_mcpwm.h
  • MCPWM_INT_ICAP : lpc17xx_mcpwm.h
  • MCPWM_INT_ILIM : lpc17xx_mcpwm.h
  • MCPWM_INT_IMAT : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_ABORT : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_CAP0 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_CAP1 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_CAP2 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_LIM0 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_LIM1 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_LIM2 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_MAT0 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_MAT1 : lpc17xx_mcpwm.h
  • MCPWM_INTFLAG_MAT2 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_A0 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_A1 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_A2 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_B0 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_B1 : lpc17xx_mcpwm.h
  • MCPWM_PATENT_B2 : lpc17xx_mcpwm.h
  • MicroWire_RD_CMD : microwire_test.c
  • MicroWire_WR_CMD : microwire_test.c
  • MIN : lpc_types.h
  • MPU_FULL_ACCESS : mpu_test.c
  • MPU_NO_ACCESS : mpu_test.c
  • MPU_PRIVILEGED_ACESS_USER_NO_ACCESS : mpu_test.c
  • MPU_PRIVILEGED_READ_ONLY_USER_NO_ACCESS : mpu_test.c
  • MPU_PRIVILEGED_RW_USER_READ_ONLY : mpu_test.c
  • MPU_RASR_ACCESS_PERMISSION : mpu_test.c
  • MPU_RASR_REGION_SIZE : mpu_test.c
  • MPU_READ_ONLY : mpu_test.c
  • MPU_REGION_ENABLE : mpu_test.c
  • MPU_REGION_SIZE_128B : mpu_test.c
  • MPU_REGION_SIZE_128KB : mpu_test.c
  • MPU_REGION_SIZE_128MB : mpu_test.c
  • MPU_REGION_SIZE_16KB : mpu_test.c
  • MPU_REGION_SIZE_16MB : mpu_test.c
  • MPU_REGION_SIZE_1GB : mpu_test.c
  • MPU_REGION_SIZE_1KB : mpu_test.c
  • MPU_REGION_SIZE_1MB : mpu_test.c
  • MPU_REGION_SIZE_256B : mpu_test.c
  • MPU_REGION_SIZE_256KB : mpu_test.c
  • MPU_REGION_SIZE_256MB : mpu_test.c
  • MPU_REGION_SIZE_2GB : mpu_test.c
  • MPU_REGION_SIZE_2KB : mpu_test.c
  • MPU_REGION_SIZE_2MB : mpu_test.c
  • MPU_REGION_SIZE_32B : mpu_test.c
  • MPU_REGION_SIZE_32KB : mpu_test.c
  • MPU_REGION_SIZE_32MB : mpu_test.c
  • MPU_REGION_SIZE_4GB : mpu_test.c
  • MPU_REGION_SIZE_4KB : mpu_test.c
  • MPU_REGION_SIZE_4MB : mpu_test.c
  • MPU_REGION_SIZE_512B : mpu_test.c
  • MPU_REGION_SIZE_512KB : mpu_test.c
  • MPU_REGION_SIZE_512MB : mpu_test.c
  • MPU_REGION_SIZE_64B : mpu_test.c
  • MPU_REGION_SIZE_64KB : mpu_test.c
  • MPU_REGION_SIZE_64MB : mpu_test.c
  • MPU_REGION_SIZE_8KB : mpu_test.c
  • MPU_REGION_SIZE_8MB : mpu_test.c
  • MPU_UNPREDICTABLE : mpu_test.c
  • MSC_BlockCount : mscuser.h
  • MSC_BlockSize : mscuser.h
  • MSC_BS_CBW : msc.h
  • MSC_BS_CSW : msc.h
  • MSC_BS_DATA_IN : msc.h
  • MSC_BS_DATA_IN_LAST : msc.h
  • MSC_BS_DATA_IN_LAST_STALL : msc.h
  • MSC_BS_DATA_OUT : msc.h
  • MSC_BS_ERROR : msc.h
  • MSC_CBW_Signature : msc.h
  • MSC_CSW_Signature : msc.h
  • MSC_EP_IN : mscuser.h
  • MSC_EP_OUT : mscuser.h
  • MSC_ImageSize : memory.h
  • MSC_MAX_PACKET : mscuser.h
  • MSC_MemorySize : mscuser.h
  • MSC_PROTOCOL_BULK_ONLY : msc.h
  • MSC_PROTOCOL_CBI_INT : msc.h
  • MSC_PROTOCOL_CBI_NOINT : msc.h
  • MSC_REQUEST_GET_MAX_LUN : msc.h
  • MSC_REQUEST_RESET : msc.h
  • MSC_SUBCLASS_QIC157 : msc.h
  • MSC_SUBCLASS_RBC : msc.h
  • MSC_SUBCLASS_SCSI : msc.h
  • MSC_SUBCLASS_SFF8020I_MMC2 : msc.h
  • MSC_SUBCLASS_SFF8070I : msc.h
  • MSC_SUBCLASS_UFI : msc.h
  • MSG_DISABLE : lpc17xx_can.h
  • MSG_ENABLE : lpc17xx_can.h
  • MU : arm_signal_converge_example_f32.c
  • MYIP_1 : tcpip.h
  • MYIP_2 : tcpip.h
  • MYIP_3 : tcpip.h
  • MYIP_4 : tcpip.h
  • MYMAC_1 : emactest.c , EMAC.h
  • MYMAC_2 : EMAC.h , emactest.c
  • MYMAC_3 : emactest.c , EMAC.h
  • MYMAC_4 : EMAC.h , emactest.c
  • MYMAC_5 : emactest.c , EMAC.h
  • MYMAC_6 : EMAC.h , emactest.c
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- n -

  • Navy : GLCD.h
  • NDD_REQ_INT : usbreg.h
  • NELEMENTS : lpc_types.h
  • ntohs : uip.h
  • NULL : lpc_types.h , resolv.c , httpd-fs.c
  • NUM_SAMPLE : dac_wave_generate.c
  • NUM_SAMPLE_SINE : dac_wave_generate.c
  • NUM_SINE_SAMPLE : dac_sinewave_test.c
  • NUM_TAPS : arm_fir_example_f32.c
  • NUMBLOCKS : arm_graphic_equalizer_example_q31.c
  • NUMFRAMES : arm_signal_converge_example_f32.c
  • NUMSTAGES : arm_graphic_equalizer_example_q31.c
  • NUMSTUDENTS : arm_class_marks_example_f32.c
  • NUMSUBJECTS : arm_class_marks_example_f32.c
  • NUMTAPS : arm_signal_converge_example_f32.c
  • NVIC : core_cm3.h
  • NVIC_BASE : core_cm3.h
  • NVIC_STIR_INTID_Msk : core_cm3.h
  • NVIC_STIR_INTID_Pos : core_cm3.h
  • NVIC_VTOR_MASK : lpc17xx_nvic.c
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- o -

  • Olive : GLCD.h
  • OP_ARP_ANSWER : tcpip.h
  • OP_ARP_REQUEST : tcpip.h
  • OSC_CLK : system_LPC17xx.c
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
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  • x
  • y

- a -

  • AC_MODE_TEST : mcpwm_simple.c
  • ACMD13_SD_STATUS : spi_sdcard.c
  • ACMD22_SEND_NUM_WR_BLOCKS : spi_sdcard.c
  • ACMD23_SET_WR_BLK_ERASE_COUNT : spi_sdcard.c
  • ACMD41_SEND_OP_COND : spi_sdcard.c
  • ACMD42_SET_CLR_CARD_DETECT : spi_sdcard.c
  • ACMD51_SEND_SCR : spi_sdcard.c
  • ADC_ADCOFFS : lpc17xx_adc.h
  • ADC_CR_BURST : lpc17xx_adc.h
  • ADC_CR_CH_SEL : lpc17xx_adc.h
  • ADC_CR_CLKDIV : lpc17xx_adc.h
  • ADC_CR_EDGE : lpc17xx_adc.h
  • ADC_CR_PDN : lpc17xx_adc.h
  • ADC_CR_START_CAP01 : lpc17xx_adc.h
  • ADC_CR_START_EINT0 : lpc17xx_adc.h
  • ADC_CR_START_MASK : lpc17xx_adc.h
  • ADC_CR_START_MAT01 : lpc17xx_adc.h
  • ADC_CR_START_MAT03 : lpc17xx_adc.h
  • ADC_CR_START_MAT10 : lpc17xx_adc.h
  • ADC_CR_START_MAT11 : lpc17xx_adc.h
  • ADC_CR_START_MODE_SEL : lpc17xx_adc.h
  • ADC_CR_START_NOW : lpc17xx_adc.h
  • ADC_DR_DONE_FLAG : lpc17xx_adc.h
  • ADC_DR_OVERRUN_FLAG : lpc17xx_adc.h
  • ADC_DR_RESULT : lpc17xx_adc.h
  • ADC_GDR_CH : lpc17xx_adc.h
  • ADC_GDR_CH_MASK : lpc17xx_adc.h
  • ADC_GDR_DONE_FLAG : lpc17xx_adc.h
  • ADC_GDR_OVERRUN_FLAG : lpc17xx_adc.h
  • ADC_GDR_RESULT : lpc17xx_adc.h
  • ADC_INTEN_CH : lpc17xx_adc.h
  • ADC_INTEN_GLOBAL : lpc17xx_adc.h
  • ADC_STAT_CH_DONE_FLAG : lpc17xx_adc.h
  • ADC_STAT_CH_OVERRUN_FLAG : lpc17xx_adc.h
  • ADC_STAT_INT_FLAG : lpc17xx_adc.h
  • ADC_TRIM : lpc17xx_adc.h
  • ADC_VALUE_MAX : ADC.h
  • AP_CLK : usbreg.h
  • ARP_FRAME_SIZE : tcpip.h
  • ARP_HARDW_OFS : tcpip.h
  • ARP_HLEN_PLEN_OFS : tcpip.h
  • ARP_HWTYPE_ETH : uip_arp.c
  • ARP_OPCODE_OFS : tcpip.h
  • ARP_PROT_OFS : tcpip.h
  • ARP_REPLY : uip_arp.c
  • ARP_REQUEST : uip_arp.c
  • ARP_SENDER_HA_OFS : tcpip.h
  • ARP_SENDER_IP_OFS : tcpip.h
  • ARP_TARGET_HA_OFS : tcpip.h
  • ARP_TARGET_IP_OFS : tcpip.h
  • AUDIO_3D_STEREO_PROCESS : audio.h
  • AUDIO_AC3_CONTROL_UNDEFINED : audio.h
  • AUDIO_AC3_DYN_RANGE_CONTROL : audio.h
  • AUDIO_AC3_HILO_SCALING_CONTROL : audio.h
  • AUDIO_AC3_MODE_CONTROL : audio.h
  • AUDIO_AC3_SCALING_CONTROL : audio.h
  • AUDIO_ATTACK_TIME_CONTROL : audio.h
  • AUDIO_AUTOMATIC_GAIN_CONTROL : audio.h
  • AUDIO_BASS_BOOST_CONTROL : audio.h
  • AUDIO_BASS_CONTROL : audio.h
  • AUDIO_CHANNEL_C : audio.h
  • AUDIO_CHANNEL_L : audio.h
  • AUDIO_CHANNEL_LC : audio.h
  • AUDIO_CHANNEL_LFE : audio.h
  • AUDIO_CHANNEL_LS : audio.h
  • AUDIO_CHANNEL_M : audio.h
  • AUDIO_CHANNEL_R : audio.h
  • AUDIO_CHANNEL_RC : audio.h
  • AUDIO_CHANNEL_RS : audio.h
  • AUDIO_CHANNEL_S : audio.h
  • AUDIO_CHANNEL_SL : audio.h
  • AUDIO_CHANNEL_SR : audio.h
  • AUDIO_CHANNEL_T : audio.h
  • AUDIO_CHORUS_DEPTH_CONTROL : audio.h
  • AUDIO_CHORUS_LEVEL_CONTROL : audio.h
  • AUDIO_CHORUS_PROCESS : audio.h
  • AUDIO_COMPRESSION_RATE_CONTROL : audio.h
  • AUDIO_CONFIGURATION_DESCRIPTOR_TYPE : audio.h
  • AUDIO_CONTROL_ATTACK_TIME : audio.h
  • AUDIO_CONTROL_AUTOMATIC_GAIN : audio.h
  • AUDIO_CONTROL_BASS : audio.h
  • AUDIO_CONTROL_BASS_BOOST : audio.h
  • AUDIO_CONTROL_CHORUS_DEPTH : audio.h
  • AUDIO_CONTROL_CHORUS_LEVEL : audio.h
  • AUDIO_CONTROL_COMPRESSION_RATE : audio.h
  • AUDIO_CONTROL_DEALY : audio.h
  • AUDIO_CONTROL_ENABLE : audio.h
  • AUDIO_CONTROL_EXTENSION_UNIT : audio.h
  • AUDIO_CONTROL_FEATURE_UNIT : audio.h
  • AUDIO_CONTROL_GRAPHIC_EQUALIZER : audio.h
  • AUDIO_CONTROL_HEADER : audio.h
  • AUDIO_CONTROL_INPUT_TERMINAL : audio.h
  • AUDIO_CONTROL_INTERFACE_DESC_SZ : audio.h
  • AUDIO_CONTROL_LOUDNESS : audio.h
  • AUDIO_CONTROL_MAX_AMPL : audio.h
  • AUDIO_CONTROL_MID : audio.h
  • AUDIO_CONTROL_MIXER_UNIT : audio.h
  • AUDIO_CONTROL_MODE_SELECT : audio.h
  • AUDIO_CONTROL_MUTE : audio.h
  • AUDIO_CONTROL_OUTPUT_TERMINAL : audio.h
  • AUDIO_CONTROL_PITCH : audio.h
  • AUDIO_CONTROL_PROCESSING_UNIT : audio.h
  • AUDIO_CONTROL_RELEASE_TIME : audio.h
  • AUDIO_CONTROL_REVERB_FEEDBACK : audio.h
  • AUDIO_CONTROL_REVERB_LEVEL : audio.h
  • AUDIO_CONTROL_REVERB_TIME : audio.h
  • AUDIO_CONTROL_REVERB_TYPE : audio.h
  • AUDIO_CONTROL_SAMPLING_FREQ : audio.h
  • AUDIO_CONTROL_SELECTOR_UNIT : audio.h
  • AUDIO_CONTROL_SHORUS_RATE : audio.h
  • AUDIO_CONTROL_SPACIOUSNESS : audio.h
  • AUDIO_CONTROL_THRESHOLD : audio.h
  • AUDIO_CONTROL_TREBLE : audio.h
  • AUDIO_CONTROL_UNDEFINED : audio.h
  • AUDIO_CONTROL_VOLUME : audio.h
  • AUDIO_COPY_PROTECT_CONTROL : audio.h
  • AUDIO_DELAY_CONTROL : audio.h
  • AUDIO_DEVICE_DESCRIPTOR_TYPE : audio.h
  • AUDIO_DOLBY_PROLOGIC_PROCESS : audio.h
  • AUDIO_DYN_RANGE_COMP_PROCESS : audio.h
  • AUDIO_ENABLE_CONTROL : audio.h
  • AUDIO_ENDPOINT_DESCRIPTOR_TYPE : audio.h
  • AUDIO_ENDPOINT_GENERAL : audio.h
  • AUDIO_ENDPOINT_UNDEFINED : audio.h
  • AUDIO_EXTENSION_UNIT_DESC_SZ : audio.h
  • AUDIO_FEATURE_UNIT_DESC_SZ : audio.h
  • AUDIO_FORMAT_AC3 : audio.h
  • AUDIO_FORMAT_AC3_DESC_SIZE : audio.h
  • AUDIO_FORMAT_ALAW : audio.h
  • AUDIO_FORMAT_IEC1937_AC3 : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG1_L1 : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG1_L2_3 : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG2_EXT : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG2_L1_LS : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG2_L2_3 : audio.h
  • AUDIO_FORMAT_IEC1937_MPEG2_NOEXT : audio.h
  • AUDIO_FORMAT_IEEE_FLOAT : audio.h
  • AUDIO_FORMAT_MPEG : audio.h
  • AUDIO_FORMAT_MPEG_DESC_SIZE : audio.h
  • AUDIO_FORMAT_MULAW : audio.h
  • AUDIO_FORMAT_PCM : audio.h
  • AUDIO_FORMAT_PCM8 : audio.h
  • AUDIO_FORMAT_TYPE_I : audio.h
  • AUDIO_FORMAT_TYPE_I_DESC_SZ : audio.h
  • AUDIO_FORMAT_TYPE_I_UNDEFINED : audio.h
  • AUDIO_FORMAT_TYPE_II : audio.h
  • AUDIO_FORMAT_TYPE_II_DESC_SZ : audio.h
  • AUDIO_FORMAT_TYPE_II_UNDEFINED : audio.h
  • AUDIO_FORMAT_TYPE_III : audio.h
  • AUDIO_FORMAT_TYPE_III_DESC_SZ : audio.h
  • AUDIO_FORMAT_TYPE_III_UNDEFINED : audio.h
  • AUDIO_FORMAT_TYPE_UNDEFINED : audio.h
  • AUDIO_GRAPHIC_EQUALIZER_CONTROL : audio.h
  • AUDIO_INPUT_TERMINAL_DESC_SIZE : audio.h
  • AUDIO_INTERFACE_DESCRIPTOR_TYPE : audio.h
  • AUDIO_LOUDNESS_CONTROL : audio.h
  • AUDIO_MAX_AMPL_CONTROL : audio.h
  • AUDIO_MAX_PACKETS_ONLY : audio.h
  • AUDIO_MID_CONTROL : audio.h
  • AUDIO_MIXER_UNIT_DESC_SZ : audio.h
  • AUDIO_MODE_SELECT_CONTROL : audio.h
  • AUDIO_MPEG_CONTROL_UNDEFINED : audio.h
  • AUDIO_MPEG_DUAL_CHANNEL_CONTROL : audio.h
  • AUDIO_MPEG_DYN_RANGE_CONTROL : audio.h
  • AUDIO_MPEG_HILO_SCALING_CONTROL : audio.h
  • AUDIO_MPEG_MULTILINGUAL_CONTROL : audio.h
  • AUDIO_MPEG_SCALING_CONTROL : audio.h
  • AUDIO_MPEG_SECOND_STEREO_CONTROL : audio.h
  • AUDIO_MUTE_CONTROL : audio.h
  • AUDIO_OUTPUT_TERMINAL_DESC_SIZE : audio.h
  • AUDIO_PITCH_CONTROL : audio.h
  • AUDIO_PROCESSING_UNIT_DESC_SZ : audio.h
  • AUDIO_PROTOCOL_UNDEFINED : audio.h
  • AUDIO_RELEASE_TIME_CONTROL : audio.h
  • AUDIO_REQUEST_GET_CUR : audio.h
  • AUDIO_REQUEST_GET_MAX : audio.h
  • AUDIO_REQUEST_GET_MEM : audio.h
  • AUDIO_REQUEST_GET_MIN : audio.h
  • AUDIO_REQUEST_GET_RES : audio.h
  • AUDIO_REQUEST_GET_STAT : audio.h
  • AUDIO_REQUEST_SET_CUR : audio.h
  • AUDIO_REQUEST_SET_MAX : audio.h
  • AUDIO_REQUEST_SET_MEM : audio.h
  • AUDIO_REQUEST_SET_MIN : audio.h
  • AUDIO_REQUEST_SET_RES : audio.h
  • AUDIO_REQUEST_UNDEFINED : audio.h
  • AUDIO_REVERB_FEEDBACK_CONTROL : audio.h
  • AUDIO_REVERB_LEVEL_CONTROL : audio.h
  • AUDIO_REVERB_TIME_CONTROL : audio.h
  • AUDIO_REVERBERATION_PROCESS : audio.h
  • AUDIO_SAMPLING_FREQ_CONTROL : audio.h
  • AUDIO_SELECTOR_UNIT_DESC_SZ : audio.h
  • AUDIO_SHORUS_RATE_CONTROL : audio.h
  • AUDIO_SPACIOUSNESS_CONTROL : audio.h
  • AUDIO_STANDARD_ENDPOINT_DESC_SIZE : audio.h
  • AUDIO_STREAMING_ENDPOINT_DESC_SIZE : audio.h
  • AUDIO_STREAMING_FORMAT_SPECIFIC : audio.h
  • AUDIO_STREAMING_FORMAT_TYPE : audio.h
  • AUDIO_STREAMING_GENERAL : audio.h
  • AUDIO_STREAMING_INTERFACE_DESC_SIZE : audio.h
  • AUDIO_STREAMING_UNDEFINED : audio.h
  • AUDIO_STRING_DESCRIPTOR_TYPE : audio.h
  • AUDIO_SUBCLASS_AUDIOCONTROL : audio.h
  • AUDIO_SUBCLASS_AUDIOSTREAMING : audio.h
  • AUDIO_SUBCLASS_MIDISTREAMING : audio.h
  • AUDIO_SUBCLASS_UNDEFINED : audio.h
  • AUDIO_TERMINAL_1394_DA_STREAM : audio.h
  • AUDIO_TERMINAL_1394_DA_STREAM_TRACK : audio.h
  • AUDIO_TERMINAL_ANALOG_CONNECTOR : audio.h
  • AUDIO_TERMINAL_ANALOG_TAPE : audio.h
  • AUDIO_TERMINAL_BIDIRECTIONAL_UNDEFINED : audio.h
  • AUDIO_TERMINAL_CABLE_TUNER_AUDIO : audio.h
  • AUDIO_TERMINAL_CALIBRATION_NOISE : audio.h
  • AUDIO_TERMINAL_CD_PLAYER : audio.h
  • AUDIO_TERMINAL_COMMUNICATION_SPEAKER : audio.h
  • AUDIO_TERMINAL_DAT : audio.h
  • AUDIO_TERMINAL_DCC : audio.h
  • AUDIO_TERMINAL_DESKTOP_MICROPHONE : audio.h
  • AUDIO_TERMINAL_DESKTOP_SPEAKER : audio.h
  • AUDIO_TERMINAL_DIGITAL_AUDIO_INTERFACE : audio.h
  • AUDIO_TERMINAL_DOWN_LINE_PHONE : audio.h
  • AUDIO_TERMINAL_DSS_AUDIO : audio.h
  • AUDIO_TERMINAL_DVD_AUDIO : audio.h
  • AUDIO_TERMINAL_EMBEDDED_UNDEFINED : audio.h
  • AUDIO_TERMINAL_EQUALIZATION_NOISE : audio.h
  • AUDIO_TERMINAL_EXTERNAL_UNDEFINED : audio.h
  • AUDIO_TERMINAL_HANDSET : audio.h
  • AUDIO_TERMINAL_HEAD_MOUNTED_AUDIO : audio.h
  • AUDIO_TERMINAL_HEAD_MOUNTED_HANDSET : audio.h
  • AUDIO_TERMINAL_HEADPHONES : audio.h
  • AUDIO_TERMINAL_INPUT_UNDEFINED : audio.h
  • AUDIO_TERMINAL_LEGACY_AUDIO_CONNECTOR : audio.h
  • AUDIO_TERMINAL_LINE_CONNECTOR : audio.h
  • AUDIO_TERMINAL_LOW_FREQ_SPEAKER : audio.h
  • AUDIO_TERMINAL_MICROPHONE : audio.h
  • AUDIO_TERMINAL_MICROPHONE_ARRAY : audio.h
  • AUDIO_TERMINAL_MINI_DISK : audio.h
  • AUDIO_TERMINAL_MULTI_TRACK_RECORDER : audio.h
  • AUDIO_TERMINAL_OMNI_DIR_MICROPHONE : audio.h
  • AUDIO_TERMINAL_OUTPUT_UNDEFINED : audio.h
  • AUDIO_TERMINAL_PERSONAL_MICROPHONE : audio.h
  • AUDIO_TERMINAL_PHONE_LINE : audio.h
  • AUDIO_TERMINAL_PHONOGRAPH : audio.h
  • AUDIO_TERMINAL_PROCESSING_MIC_ARRAY : audio.h
  • AUDIO_TERMINAL_RADIO_RECEIVER : audio.h
  • AUDIO_TERMINAL_RADIO_TRANSMITTER : audio.h
  • AUDIO_TERMINAL_ROOM_SPEAKER : audio.h
  • AUDIO_TERMINAL_SATELLITE_RECEIVER_AUDIO : audio.h
  • AUDIO_TERMINAL_SPDIF_INTERFACE : audio.h
  • AUDIO_TERMINAL_SPEAKER : audio.h
  • AUDIO_TERMINAL_SPEAKERPHONE : audio.h
  • AUDIO_TERMINAL_SPEAKERPHONE_ECHOCANCEL : audio.h
  • AUDIO_TERMINAL_SPEAKERPHONE_ECHOSUPRESS : audio.h
  • AUDIO_TERMINAL_SYNTHESIZER : audio.h
  • AUDIO_TERMINAL_TELEPHONE : audio.h
  • AUDIO_TERMINAL_TELEPHONY_UNDEFINED : audio.h
  • AUDIO_TERMINAL_TV_TUNER_AUDIO : audio.h
  • AUDIO_TERMINAL_USB_STREAMING : audio.h
  • AUDIO_TERMINAL_USB_UNDEFINED : audio.h
  • AUDIO_TERMINAL_USB_VENDOR_SPECIFIC : audio.h
  • AUDIO_TERMINAL_VCR_AUDIO : audio.h
  • AUDIO_TERMINAL_VIDEO_DISC_AUDIO : audio.h
  • AUDIO_THRESHOLD_CONTROL : audio.h
  • AUDIO_TREBLE_CONTROL : audio.h
  • AUDIO_UNDEFINED_DESCRIPTOR_TYPE : audio.h
  • AUDIO_UNDEFINED_PROCESS : audio.h
  • AUDIO_UP_DOWN_MIX_PROCESS : audio.h
  • AUDIO_VOLUME_CONTROL : audio.h
  • AUTO_NEGOTIATION_ENA : emac.h
  • AUTO_RTS_CTS_USE : uart_fullmodem_test.c
  • AUTO_SLVADDR_DETECT : rs485_slave.c
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y

- b -

  • B3VAL : usbdesc.h
  • B_S : usbaudio.h
  • BACKLIGHT_OFF : glcd_ll.h
  • BACKLIGHT_ON : glcd_ll.h
  • BITBAND_PERI : bitband.c
  • BITBAND_PERI_BASE : bitband.c
  • BITBAND_PERI_ClearBit : bitband.c
  • BITBAND_PERI_GetBit : bitband.c
  • BITBAND_PERI_REF : bitband.c
  • BITBAND_PERI_SetBit : bitband.c
  • BITBAND_SRAM : bitband.c
  • BITBAND_SRAM_BASE : bitband.c
  • BITBAND_SRAM_ClearBit : bitband.c
  • BITBAND_SRAM_GetBit : bitband.c
  • BITBAND_SRAM_REF : bitband.c
  • BITBAND_SRAM_SetBit : bitband.c
  • Black : GLCD.h
  • BLINK_LED_PIN : emactest.c
  • BLOCK_SIZE : arm_fir_example_f32.c
  • BLOCKSIZE : arm_graphic_equalizer_example_q31.c , arm_signal_converge_example_f32.c
  • Blue : GLCD.h
  • BOOTP_BROADCAST : dhcpc.c
  • BOUNCE_RX : emactest.c
  • BPP : GLCD_SPI_LPC1700.c
  • BSY : GLCD_SPI_LPC1700.c
  • BUF : uip_arp.c , main.c , uip-fw.c , uip-split.c , uip.c
  • BUF_FOUND : psock.c
  • BUF_FULL : psock.c
  • BUF_NOT_FOUND : psock.c
  • BUF_NOT_FULL : psock.c
  • BUFFER_SIZE : microwire_test.c , i2s_irq_test.c , master.c , i2s_mclk.c , spi_slave.c , i2s_dma_test.c , slave.c , i2s_test_4_wire.c , i2c_monitor.c , i2c_master_slave_int_test.c , i2s_polling.c , ti_test.c , ssp_master.c , ssp_slave.c , spi_loopback_test.c , spi_master.c
  • BYPP : GLCD_SPI_LPC1700.c
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- c -

  • CAN1_CTRL : lpc17xx_can.h
  • CAN1SLEEPCLR : lpc17xx_can.h
  • CAN2_CTRL : lpc17xx_can.h
  • CAN2SLEEPCLR : lpc17xx_can.h
  • CAN_AFMR_AccBP : lpc17xx_can.h
  • CAN_AFMR_AccOff : lpc17xx_can.h
  • CAN_AFMR_eFCAN : lpc17xx_can.h
  • CAN_BTR_BRP : lpc17xx_can.h
  • CAN_BTR_SAM : lpc17xx_can.h
  • CAN_BTR_SJM : lpc17xx_can.h
  • CAN_BTR_TESG1 : lpc17xx_can.h
  • CAN_BTR_TESG2 : lpc17xx_can.h
  • CAN_CMR_AT : lpc17xx_can.h
  • CAN_CMR_CDO : lpc17xx_can.h
  • CAN_CMR_RRB : lpc17xx_can.h
  • CAN_CMR_SRR : lpc17xx_can.h
  • CAN_CMR_STB1 : lpc17xx_can.h
  • CAN_CMR_STB2 : lpc17xx_can.h
  • CAN_CMR_STB3 : lpc17xx_can.h
  • CAN_CMR_TR : lpc17xx_can.h
  • CAN_Eff_GRP_sa : lpc17xx_can.h
  • CAN_EFF_sa : lpc17xx_can.h
  • CAN_EndofTable : lpc17xx_can.h
  • CAN_EWL_EWL : lpc17xx_can.h
  • CAN_FCANIC0_IntPnd : lpc17xx_can.h
  • CAN_FCANIC1_IntPnd : lpc17xx_can.h
  • CAN_FCANIE : lpc17xx_can.h
  • CAN_GSR_BS : lpc17xx_can.h
  • CAN_GSR_DOS : lpc17xx_can.h
  • CAN_GSR_ES : lpc17xx_can.h
  • CAN_GSR_RBS : lpc17xx_can.h
  • CAN_GSR_RS : lpc17xx_can.h
  • CAN_GSR_RXERR : lpc17xx_can.h
  • CAN_GSR_TBS : lpc17xx_can.h
  • CAN_GSR_TCS : lpc17xx_can.h
  • CAN_GSR_TS : lpc17xx_can.h
  • CAN_GSR_TXERR : lpc17xx_can.h
  • CAN_ICR_ALCBIT : lpc17xx_can.h
  • CAN_ICR_ALI : lpc17xx_can.h
  • CAN_ICR_BEI : lpc17xx_can.h
  • CAN_ICR_DOI : lpc17xx_can.h
  • CAN_ICR_EI : lpc17xx_can.h
  • CAN_ICR_EPI : lpc17xx_can.h
  • CAN_ICR_ERRBIT : lpc17xx_can.h
  • CAN_ICR_ERRC : lpc17xx_can.h
  • CAN_ICR_ERRDIR : lpc17xx_can.h
  • CAN_ICR_IDI : lpc17xx_can.h
  • CAN_ICR_RI : lpc17xx_can.h
  • CAN_ICR_TI1 : lpc17xx_can.h
  • CAN_ICR_TI2 : lpc17xx_can.h
  • CAN_ICR_TI3 : lpc17xx_can.h
  • CAN_ICR_WUI : lpc17xx_can.h
  • CAN_IER_ALIE : lpc17xx_can.h
  • CAN_IER_BEIE : lpc17xx_can.h
  • CAN_IER_DOIE : lpc17xx_can.h
  • CAN_IER_EIE : lpc17xx_can.h
  • CAN_IER_EPIE : lpc17xx_can.h
  • CAN_IER_IDIE : lpc17xx_can.h
  • CAN_IER_RIE : lpc17xx_can.h
  • CAN_IER_TIE1 : lpc17xx_can.h
  • CAN_IER_TIE2 : lpc17xx_can.h
  • CAN_IER_TIE3 : lpc17xx_can.h
  • CAN_IER_WUIE : lpc17xx_can.h
  • CAN_LUTerr : lpc17xx_can.h
  • CAN_LUTerrAd : lpc17xx_can.h
  • CAN_MOD_LOM : lpc17xx_can.h
  • CAN_MOD_RM : lpc17xx_can.h
  • CAN_MOD_RPM : lpc17xx_can.h
  • CAN_MOD_SM : lpc17xx_can.h
  • CAN_MOD_STM : lpc17xx_can.h
  • CAN_MOD_TM : lpc17xx_can.h
  • CAN_MOD_TPM : lpc17xx_can.h
  • CAN_MSR_BS1 : lpc17xx_can.h
  • CAN_MSR_BS2 : lpc17xx_can.h
  • CAN_MSR_E1 : lpc17xx_can.h
  • CAN_MSR_E2 : lpc17xx_can.h
  • CAN_RDA_DATA1 : lpc17xx_can.h
  • CAN_RDA_DATA2 : lpc17xx_can.h
  • CAN_RDA_DATA3 : lpc17xx_can.h
  • CAN_RDA_DATA4 : lpc17xx_can.h
  • CAN_RDB_DATA5 : lpc17xx_can.h
  • CAN_RDB_DATA6 : lpc17xx_can.h
  • CAN_RDB_DATA7 : lpc17xx_can.h
  • CAN_RDB_DATA8 : lpc17xx_can.h
  • CAN_RECEIVE : can_test_two_kit.c
  • CAN_RFS_BP : lpc17xx_can.h
  • CAN_RFS_DLC : lpc17xx_can.h
  • CAN_RFS_FF : lpc17xx_can.h
  • CAN_RFS_ID_INDEX : lpc17xx_can.h
  • CAN_RFS_RTR : lpc17xx_can.h
  • CAN_RID_ID_11 : lpc17xx_can.h
  • CAN_RID_ID_29 : lpc17xx_can.h
  • CAN_RSR_DOS1 : lpc17xx_can.h
  • CAN_RSR_DOS2 : lpc17xx_can.h
  • CAN_RSR_RB1 : lpc17xx_can.h
  • CAN_RSR_RB2 : lpc17xx_can.h
  • CAN_RSR_RS1 : lpc17xx_can.h
  • CAN_RSR_RS2 : lpc17xx_can.h
  • CAN_RX_MSG_CNT : can_test_aflut.c
  • CAN_SFF_GRP_sa : lpc17xx_can.h
  • CAN_SR_BS : lpc17xx_can.h
  • CAN_SR_DOS : lpc17xx_can.h
  • CAN_SR_ES : lpc17xx_can.h
  • CAN_SR_RBS : lpc17xx_can.h
  • CAN_SR_RS : lpc17xx_can.h
  • CAN_SR_TBS1 : lpc17xx_can.h
  • CAN_SR_TBS2 : lpc17xx_can.h
  • CAN_SR_TBS3 : lpc17xx_can.h
  • CAN_SR_TCS1 : lpc17xx_can.h
  • CAN_SR_TCS2 : lpc17xx_can.h
  • CAN_SR_TCS3 : lpc17xx_can.h
  • CAN_SR_TS1 : lpc17xx_can.h
  • CAN_SR_TS2 : lpc17xx_can.h
  • CAN_SR_TS3 : lpc17xx_can.h
  • CAN_STT_sa : lpc17xx_can.h
  • CAN_TDA_DATA1 : lpc17xx_can.h
  • CAN_TDA_DATA2 : lpc17xx_can.h
  • CAN_TDA_DATA3 : lpc17xx_can.h
  • CAN_TDA_DATA4 : lpc17xx_can.h
  • CAN_TDA_DATA5 : lpc17xx_can.h
  • CAN_TDA_DATA6 : lpc17xx_can.h
  • CAN_TDA_DATA7 : lpc17xx_can.h
  • CAN_TDA_DATA8 : lpc17xx_can.h
  • CAN_TFI_DLC : lpc17xx_can.h
  • CAN_TFI_FF : lpc17xx_can.h
  • CAN_TFI_PRIO : lpc17xx_can.h
  • CAN_TFI_RTR : lpc17xx_can.h
  • CAN_TID_ID11 : lpc17xx_can.h
  • CAN_TID_ID29 : lpc17xx_can.h
  • CAN_TRANSMIT : can_test_two_kit.c
  • CAN_TSR_TBS1 : lpc17xx_can.h
  • CAN_TSR_TBS2 : lpc17xx_can.h
  • CAN_TSR_TCS1 : lpc17xx_can.h
  • CAN_TSR_TCS2 : lpc17xx_can.h
  • CAN_TSR_TS1 : lpc17xx_can.h
  • CAN_TSR_TS2 : lpc17xx_can.h
  • CAN_TX_MSG_CNT : can_test_aflut.c
  • CAN_WAKEFLAGES_CAN1WAKE : lpc17xx_can.h
  • CAN_WAKEFLAGES_CAN2WAKE : lpc17xx_can.h
  • CAP_MODE : qei_test_velo.c
  • CAP_PERIOD : qei_test_velo.c
  • CAPTURE_MODE_TEST : mcpwm_simple.c
  • CCEMTY_INT : usbreg.h
  • CCLK : memory.h
  • CCLKCFG_Val : system_LPC17xx.c
  • CDC_ABSTRACT_CONTROL_MANAGEMENT : cdc.h
  • CDC_ABSTRACT_CONTROL_MODEL : cdc.h
  • CDC_ABSTRACT_STATE : cdc.h
  • CDC_ACTIVATE_CARRIER : cdc.h
  • CDC_ATM_NETWORKING : cdc.h
  • CDC_ATM_NETWORKING_CONTROL_MODEL : cdc.h
  • CDC_AUX_JACK_HOOK_STATE : cdc.h
  • CDC_BUF_COUNT : cdcuser.c
  • CDC_BUF_EMPTY : cdcuser.c
  • CDC_BUF_FULL : cdcuser.c
  • CDC_BUF_MASK : cdcuser.c
  • CDC_BUF_RD : cdcuser.c
  • CDC_BUF_RESET : cdcuser.c
  • CDC_BUF_SIZE : cdcuser.c
  • CDC_BUF_WR : cdcuser.c
  • CDC_CALL_MANAGEMENT : cdc.h
  • CDC_CALL_STATE_CHANGE : cdc.h
  • CDC_CAPI_CONTROL_MANAGEMENT : cdc.h
  • CDC_CAPI_CONTROL_MODEL : cdc.h
  • CDC_CEP_IN : cdcuser.h
  • CDC_CLEAR_COMM_FEATURE : cdc.h
  • CDC_CLEAR_UNIT_PARAMETER : cdc.h
  • CDC_COMMUNICATION_INTERFACE_CLASS : cdc.h
  • CDC_CONNECTION_SPEED_CHANGE : cdc.h
  • CDC_COUNTRY_SELECTION : cdc.h
  • CDC_COUNTRY_SETTING : cdc.h
  • CDC_CS_ENDPOINT : cdc.h
  • CDC_CS_INTERFACE : cdc.h
  • CDC_DATA_INTERFACE_CLASS : cdc.h
  • CDC_DATA_MULTPLEXED_STATE : cdc.h
  • CDC_DEP_IN : cdcuser.h
  • CDC_DEP_OUT : cdcuser.h
  • CDC_DIAL_DIGITS : cdc.h
  • CDC_DIRECT_LINE_CONTROL_MODEL : cdc.h
  • CDC_DIRECT_LINE_MANAGEMENT : cdc.h
  • CDC_DTE_PRESENT : cdc.h
  • CDC_ETHERNET_NETWORKING : cdc.h
  • CDC_ETHERNET_NETWORKING_CONTROL_MODEL : cdc.h
  • CDC_EXTENSION_UNIT : cdc.h
  • CDC_GET_ATM_DEVICE_STATISTICS : cdc.h
  • CDC_GET_ATM_VC_STATISTICS : cdc.h
  • CDC_GET_COMM_FEATURE : cdc.h
  • CDC_GET_ENCAPSULATED_RESPONSE : cdc.h
  • CDC_GET_ETHERNET_PMP_FILTER : cdc.h
  • CDC_GET_ETHERNET_STATISTIC : cdc.h
  • CDC_GET_LINE_CODING : cdc.h
  • CDC_GET_LINE_PARMS : cdc.h
  • CDC_GET_OPERATION_PARMS : cdc.h
  • CDC_GET_PROFILE : cdc.h
  • CDC_GET_RINGER_PARMS : cdc.h
  • CDC_GET_UNIT_PARAMETER : cdc.h
  • CDC_HEADER : cdc.h
  • CDC_IDLE_SETTING : cdc.h
  • CDC_LINE_STATE_CHANGE : cdc.h
  • CDC_MULTI_CHANNEL_CONTROL_MODEL : cdc.h
  • CDC_MULTI_CHANNEL_MANAGEMENT : cdc.h
  • CDC_NETWORK_CHANNEL : cdc.h
  • CDC_NOTIFICATION_NETWORK_CONNECTION : cdc.h
  • CDC_NOTIFICATION_SERIAL_STATE : cdc.h
  • CDC_PROTOCOL_CAPI : cdc.h
  • CDC_PROTOCOL_COMMON_AT_COMMANDS : cdc.h
  • CDC_PROTOCOL_DESCRIBED_IN_PUFD : cdc.h
  • CDC_PROTOCOL_EURO_ISDN : cdc.h
  • CDC_PROTOCOL_HDLC : cdc.h
  • CDC_PROTOCOL_HOST_BASED_DRIVER : cdc.h
  • CDC_PROTOCOL_ISDN_BRI : cdc.h
  • CDC_PROTOCOL_Q921_DATA_LINK : cdc.h
  • CDC_PROTOCOL_Q921_MANAGEMENT : cdc.h
  • CDC_PROTOCOL_Q921_MULTIPLEXOR : cdc.h
  • CDC_PROTOCOL_TRANSPARENT : cdc.h
  • CDC_PROTOCOL_UNIT : cdc.h
  • CDC_PROTOCOL_V24_RATE_ADAPTATION : cdc.h
  • CDC_PROTOCOL_V42 : cdc.h
  • CDC_PULSE_SETUP : cdc.h
  • CDC_REPORTING_CAPABILITIES : cdc.h
  • CDC_RESPONSE_AVAILABLE : cdc.h
  • CDC_RING_AUX_JACK : cdc.h
  • CDC_RING_DETECT : cdc.h
  • CDC_SEND_BREAK : cdc.h
  • CDC_SEND_ENCAPSULATED_COMMAND : cdc.h
  • CDC_SEND_PULSE : cdc.h
  • CDC_SERIAL_STATE_BREAK : cdc.h
  • CDC_SERIAL_STATE_FRAMING : cdc.h
  • CDC_SERIAL_STATE_OVERRUN : cdc.h
  • CDC_SERIAL_STATE_PARITY : cdc.h
  • CDC_SERIAL_STATE_RING : cdc.h
  • CDC_SERIAL_STATE_RX_CARRIER : cdc.h
  • CDC_SERIAL_STATE_TX_CARRIER : cdc.h
  • CDC_SET_ATM_DATA_FORMAT : cdc.h
  • CDC_SET_ATM_DEFAULT_VC : cdc.h
  • CDC_SET_AUX_LINE_STATE : cdc.h
  • CDC_SET_COMM_FEATURE : cdc.h
  • CDC_SET_CONTROL_LINE_STATE : cdc.h
  • CDC_SET_ETHERNET_MULTICAST_FILTERS : cdc.h
  • CDC_SET_ETHERNET_PACKET_FILTER : cdc.h
  • CDC_SET_ETHERNET_PMP_FILTER : cdc.h
  • CDC_SET_HOOK_STATE : cdc.h
  • CDC_SET_LINE_CODING : cdc.h
  • CDC_SET_LINE_PARMS : cdc.h
  • CDC_SET_OPERATION_PARMS : cdc.h
  • CDC_SET_PULSE_TIME : cdc.h
  • CDC_SET_RINGER_PARMS : cdc.h
  • CDC_SET_UNIT_PARAMETER : cdc.h
  • CDC_TELEPHONE_CONTROL_MODEL : cdc.h
  • CDC_TELEPHONE_OPERATIONAL_MODES : cdc.h
  • CDC_TELEPHONE_RINGER : cdc.h
  • CDC_UNION : cdc.h
  • CDC_USB_TERMINAL : cdc.h
  • CDC_V1_10 : cdc.h
  • CDFULL_INT : usbreg.h
  • CHAR_H : Font_24x16.h
  • CHAR_W : Font_24x16.h
  • CHECK_PARAM : lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • CHECK_RANGE : system_LPC17xx.c
  • CHECK_RSVD : system_LPC17xx.c
  • CLKOUTCFG_Val : system_LPC17xx.c
  • CLKPWR_CCLKCFG_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUT_ACT : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUT_EN : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTDIV : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTSEL_CPU : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTSEL_MAINOSC : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTSEL_RC : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTSEL_RTC : lpc17xx_clkpwr.h
  • CLKPWR_CLKOUTCFG_CLKOUTSEL_USB : lpc17xx_clkpwr.h
  • CLKPWR_CLKSRCSEL_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_CLKSRCSEL_CLKSRC_IRC : lpc17xx_clkpwr.h
  • CLKPWR_CLKSRCSEL_CLKSRC_MAINOSC : lpc17xx_clkpwr.h
  • CLKPWR_CLKSRCSEL_CLKSRC_RTC : lpc17xx_clkpwr.h
  • CLKPWR_IRCTRIM_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL0_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL1_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_ACF : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_ADC : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_CAN1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_CAN2 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_CCLK_DIV_1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_CCLK_DIV_2 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_CCLK_DIV_4 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_DAC : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_GET : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_I2C0 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_I2C1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_I2C2 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_I2S : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_MC : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_PCB : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_PWM1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_QEI : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_RIT : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_SET : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_SPI : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_SSP0 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_SSP1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_SYSCON : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_TIMER0 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_TIMER1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_TIMER2 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_TIMER3 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_UART0 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_UART1 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_UART2 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_UART3 : lpc17xx_clkpwr.h
  • CLKPWR_PCLKSEL_WDT : lpc17xx_clkpwr.h
  • CLKPWR_PCON_BODPDM : lpc17xx_clkpwr.h
  • CLKPWR_PCON_BOGD : lpc17xx_clkpwr.h
  • CLKPWR_PCON_BORD : lpc17xx_clkpwr.h
  • CLKPWR_PCON_DPDFLAG : lpc17xx_clkpwr.h
  • CLKPWR_PCON_DSFLAG : lpc17xx_clkpwr.h
  • CLKPWR_PCON_PDFLAG : lpc17xx_clkpwr.h
  • CLKPWR_PCON_PM0 : lpc17xx_clkpwr.h
  • CLKPWR_PCON_PM1 : lpc17xx_clkpwr.h
  • CLKPWR_PCON_SMFLAG : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCAD : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCAN1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCAN2 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCENET : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCGPDMA : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCGPIO : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCI2C0 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCI2C1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCI2C2 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCI2S : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCMC : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCPWM1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCQEI : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCRIT : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCRTC : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCSPI : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCSSP0 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCSSP1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCTIM0 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCTIM1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCTIM2 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCTIM3 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCUART0 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCUART1 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCUART2 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCUART3 : lpc17xx_clkpwr.h
  • CLKPWR_PCONP_PCUSB : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CFG_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CFG_MSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CFG_NSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CON_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CON_CONNECT : lpc17xx_clkpwr.h
  • CLKPWR_PLL0CON_ENABLE : lpc17xx_clkpwr.h
  • CLKPWR_PLL0FEED_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL0STAT_MSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL0STAT_NSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL0STAT_PLLC : lpc17xx_clkpwr.h
  • CLKPWR_PLL0STAT_PLLE : lpc17xx_clkpwr.h
  • CLKPWR_PLL0STAT_PLOCK : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CFG_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CFG_MSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CFG_PSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CON_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CON_CONNECT : lpc17xx_clkpwr.h
  • CLKPWR_PLL1CON_ENABLE : lpc17xx_clkpwr.h
  • CLKPWR_PLL1FEED_BITMASK : lpc17xx_clkpwr.h
  • CLKPWR_PLL1STAT_MSEL : lpc17xx_clkpwr.h
  • CLKPWR_PLL1STAT_PLLC : lpc17xx_clkpwr.h
  • CLKPWR_PLL1STAT_PLLE : lpc17xx_clkpwr.h
  • CLKPWR_PLL1STAT_PLOCK : lpc17xx_clkpwr.h
  • CLKPWR_PLL1STAT_PSEL : lpc17xx_clkpwr.h
  • CLKPWR_USBCLKCFG_BITMASK : lpc17xx_clkpwr.h
  • CLKSOURCE_CPU : lpc17xx_systick.h
  • CLKSOURCE_EXT : lpc17xx_systick.h
  • CLKSRCSEL_Val : system_LPC17xx.c
  • CLOCK_CONF_SECOND : clock-arch.h
  • CLOCK_SECOND : clock.h
  • CLOCK_SETUP : system_LPC17xx.c
  • CLR_BUF_PO : usbreg.h
  • CMD0_GO_IDLE_STATE : spi_sdcard.c
  • CMD10_SEND_CID : spi_sdcard.c
  • CMD12_STOP_TRANSMISSION : spi_sdcard.c
  • CMD13_SEND_STATUS : spi_sdcard.c
  • CMD16_SET_BLOCKLEN : spi_sdcard.c
  • CMD17_READ_SINGLE_BLOCK : spi_sdcard.c
  • CMD18_READ_MULTIPLE_BLOCK : spi_sdcard.c
  • CMD1_SEND_OPCOND : spi_sdcard.c
  • CMD24_WRITE_BLOCK : spi_sdcard.c
  • CMD25_WRITE_MULTIPLE_BLOCK : spi_sdcard.c
  • CMD27_PROGRAM_CSD : spi_sdcard.c
  • CMD28_SET_WRITE_PROT : spi_sdcard.c
  • CMD29_CLR_WRITE_PROT : spi_sdcard.c
  • CMD30_SEND_WRITE_PROT : spi_sdcard.c
  • CMD32_ERASE_WR_BLK_START_ADDR : spi_sdcard.c
  • CMD33_ERASE_WR_BLK_END_ADDR : spi_sdcard.c
  • CMD38_ERASE : spi_sdcard.c
  • CMD55_APP_CMD : spi_sdcard.c
  • CMD56_GEN_CMD : spi_sdcard.c
  • CMD58_READ_OCR : spi_sdcard.c
  • CMD59_CRC_ON_OFF : spi_sdcard.c
  • CMD9_SEND_CSD : spi_sdcard.c
  • CMD_CFG_DEV : usbreg.h
  • CMD_CLR_BUF : usbreg.h
  • CMD_GET_DEV_STAT : usbreg.h
  • CMD_GET_ERR_CODE : usbreg.h
  • CMD_RD_ERR_STAT : usbreg.h
  • CMD_RD_FRAME : usbreg.h
  • CMD_RD_TEST : usbreg.h
  • CMD_SEL_EP : usbreg.h
  • CMD_SEL_EP_CLRI : usbreg.h
  • CMD_SET_ADDR : usbreg.h
  • CMD_SET_DEV_STAT : usbreg.h
  • CMD_SET_EP_STAT : usbreg.h
  • CMD_SET_MODE : usbreg.h
  • CMD_VALID_BUF : usbreg.h
  • CONF_DVICE : usbreg.h
  • CoreDebug : core_cm3.h
  • CoreDebug_BASE : core_cm3.h
  • CoreDebug_DCRSR_REGSEL_Msk : core_cm3.h
  • CoreDebug_DCRSR_REGSEL_Pos : core_cm3.h
  • CoreDebug_DCRSR_REGWnR_Msk : core_cm3.h
  • CoreDebug_DCRSR_REGWnR_Pos : core_cm3.h
  • CoreDebug_DEMCR_MON_EN_Msk : core_cm3.h
  • CoreDebug_DEMCR_MON_EN_Pos : core_cm3.h
  • CoreDebug_DEMCR_MON_PEND_Msk : core_cm3.h
  • CoreDebug_DEMCR_MON_PEND_Pos : core_cm3.h
  • CoreDebug_DEMCR_MON_REQ_Msk : core_cm3.h
  • CoreDebug_DEMCR_MON_REQ_Pos : core_cm3.h
  • CoreDebug_DEMCR_MON_STEP_Msk : core_cm3.h
  • CoreDebug_DEMCR_MON_STEP_Pos : core_cm3.h
  • CoreDebug_DEMCR_TRCENA_Msk : core_cm3.h
  • CoreDebug_DEMCR_TRCENA_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_BUSERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_BUSERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_CHKERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_CHKERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_CORERESET_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_CORERESET_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_HARDERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_HARDERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_INTERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_INTERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_MMERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_MMERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_NOCPERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_NOCPERR_Pos : core_cm3.h
  • CoreDebug_DEMCR_VC_STATERR_Msk : core_cm3.h
  • CoreDebug_DEMCR_VC_STATERR_Pos : core_cm3.h
  • CoreDebug_DHCSR_C_DEBUGEN_Msk : core_cm3.h
  • CoreDebug_DHCSR_C_DEBUGEN_Pos : core_cm3.h
  • CoreDebug_DHCSR_C_HALT_Msk : core_cm3.h
  • CoreDebug_DHCSR_C_HALT_Pos : core_cm3.h
  • CoreDebug_DHCSR_C_MASKINTS_Msk : core_cm3.h
  • CoreDebug_DHCSR_C_MASKINTS_Pos : core_cm3.h
  • CoreDebug_DHCSR_C_SNAPSTALL_Msk : core_cm3.h
  • CoreDebug_DHCSR_C_SNAPSTALL_Pos : core_cm3.h
  • CoreDebug_DHCSR_C_STEP_Msk : core_cm3.h
  • CoreDebug_DHCSR_C_STEP_Pos : core_cm3.h
  • CoreDebug_DHCSR_DBGKEY_Msk : core_cm3.h
  • CoreDebug_DHCSR_DBGKEY_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_HALT_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_HALT_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_LOCKUP_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_LOCKUP_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_REGRDY_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_REGRDY_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_RESET_ST_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_RESET_ST_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_RETIRE_ST_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_RETIRE_ST_Pos : core_cm3.h
  • CoreDebug_DHCSR_S_SLEEP_Msk : core_cm3.h
  • CoreDebug_DHCSR_S_SLEEP_Pos : core_cm3.h
  • COUNT_MODE : qei_test_velo.c
  • CR : Serial.c
  • CS_PIN_NUM : spi_sdcard.c , spi_interrupt_test.c , sc16is750_polling.c , sc16is750_int.c , spi_master.c , spi_loopback_test.c , spi_polling_test.c
  • CS_PORT_NUM : spi_polling_test.c , spi_sdcard.c , sc16is750_int.c , spi_loopback_test.c , spi_interrupt_test.c , sc16is750_polling.c , spi_master.c
  • CSW_CMD_FAILED : msc.h
  • CSW_CMD_PASSED : msc.h
  • CSW_PHASE_ERROR : msc.h
  • CTRL_RD_EN : usbreg.h
  • CTRL_WR_EN : usbreg.h
  • Cyan : GLCD.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- d -

  • DAC_BIAS_EN : lpc17xx_dac.h
  • DAC_CCNT_VALUE : lpc17xx_dac.h
  • DAC_CNT_ENA : lpc17xx_dac.h
  • DAC_DACCTRL_MASK : lpc17xx_dac.h
  • DAC_DBLBUF_ENA : lpc17xx_dac.h
  • DAC_DMA_ENA : lpc17xx_dac.h
  • DAC_GENERATE_ESCALATOR : dac_wave_generate.c
  • DAC_GENERATE_NONE : dac_wave_generate.c
  • DAC_GENERATE_SINE : dac_wave_generate.c
  • DAC_GENERATE_TRIANGLE : dac_wave_generate.c
  • DAC_VALUE : lpc17xx_dac.h
  • DarkCyan : GLCD.h
  • DarkGreen : GLCD.h
  • DarkGrey : GLCD.h
  • DAT_CLR_BUF : usbreg.h
  • DAT_GET_DEV_STAT : usbreg.h
  • DAT_GET_ERR_CODE : usbreg.h
  • DAT_RD_ERR_STAT : usbreg.h
  • DAT_RD_FRAME : usbreg.h
  • DAT_RD_TEST : usbreg.h
  • DAT_SEL_EP : usbreg.h
  • DAT_SEL_EP_CLRI : usbreg.h
  • DAT_WR_BYTE : usbreg.h
  • DATA_FREQ : usbaudio.h
  • DATA_OFS_MASK : tcpip.h
  • DB : EMAC.c , tcpip.c , emactest.c , emac.c , main.c
  • DC_MODE_TEST : mcpwm_simple.c
  • DD_ISO_ADR : usbhw.h
  • DD_ISO_CNT : usbhw.h
  • DD_ISO_SZ : usbhw.h
  • DD_NISO_ADR : usbhw.h
  • DD_NISO_CNT : usbhw.h
  • DD_NISO_SZ : usbhw.h
  • DD_SZ : usbhw.h
  • DEBUG : lpc17xx_libcfg.h , lpc17xx_libcfg_default.h , lpc17xx_libcfg.h
  • DEBUG_PRINTF : uip.c
  • DEBUG_UART_PORT : debug_frmwrk.h
  • DEF_BACKGND_COLOUR : drv_glcd.h
  • DEF_FONT_COLOUR : drv_glcd.h
  • DEF_X_LEFT : drv_glcd.h
  • DEF_X_RIGHT : drv_glcd.h
  • DEF_Y_DOWN : drv_glcd.h
  • DEF_Y_UP : drv_glcd.h
  • DEFAULT_TTL : tcpip.h
  • DELAY_2N : GLCD_SPI_LPC1700.c
  • DELTA : arm_variance_example_f32.c , arm_convolution_example_f32.c , arm_dotproduct_example_f32.c , arm_sin_cos_example_f32.c
  • DELTA_COEFF : arm_signal_converge_example_f32.c
  • DELTA_ERROR : arm_signal_converge_example_f32.c
  • DELTA_Q15 : arm_math.h
  • DELTA_Q31 : arm_math.h
  • DEV_ADDR_MASK : usbreg.h
  • DEV_CON : usbreg.h
  • DEV_CON_CH : usbreg.h
  • DEV_EN : usbreg.h
  • DEV_RST : usbreg.h
  • DEV_STAT_INT : usbreg.h
  • DEV_SUS : usbreg.h
  • DEV_SUS_CH : usbreg.h
  • DHCP_HLEN_ETHERNET : dhcpc.c
  • DHCP_HTYPE_ETHERNET : dhcpc.c
  • DHCP_MSG_LEN : dhcpc.c
  • DHCP_OPTION_DNS_SERVER : dhcpc.c
  • DHCP_OPTION_END : dhcpc.c
  • DHCP_OPTION_LEASE_TIME : dhcpc.c
  • DHCP_OPTION_MSG_TYPE : dhcpc.c
  • DHCP_OPTION_REQ_IPADDR : dhcpc.c
  • DHCP_OPTION_REQ_LIST : dhcpc.c
  • DHCP_OPTION_ROUTER : dhcpc.c
  • DHCP_OPTION_SERVER_ID : dhcpc.c
  • DHCP_OPTION_SUBNET_MASK : dhcpc.c
  • DHCP_REPLY : dhcpc.c
  • DHCP_REQUEST : dhcpc.c
  • DHCPACK : dhcpc.c
  • DHCPC_CLIENT_PORT : dhcpc.c
  • DHCPC_SERVER_PORT : dhcpc.c
  • DHCPDECLINE : dhcpc.c
  • DHCPDISCOVER : dhcpc.c
  • DHCPNAK : dhcpc.c
  • DHCPOFFER : dhcpc.c
  • DHCPRELEASE : dhcpc.c
  • DHCPREQUEST : dhcpc.c
  • DISP_TIME : qei_test_velo.c
  • DMA_BUF_ADR : usbhw.h
  • DMA_BUF_SZ : usbhw.h
  • DMA_DATA_SIZE : ssp_dma.c
  • DMA_DST : i2s_dma_test.c , gpdma_sleep.c , gpdma_r2r_test.c
  • DMA_SIZE : dac_wave_generate.c , link_list.c , flash_2_ram.c , gpdma_sleep.c , adc_dma_test.c , adc_burst_test.c , dac_sinewave_test.c , dac_dma.c , gpdma_r2r_test.c , i2s_dma_test.c
  • DMA_SIZE_SINE : dac_wave_generate.c
  • DMA_SRC : gpdma_sleep.c , i2s_dma_test.c , gpdma_r2r_test.c
  • DNS_FLAG1_AUTHORATIVE : resolv.c
  • DNS_FLAG1_OPCODE_INVERSE : resolv.c
  • DNS_FLAG1_OPCODE_STANDARD : resolv.c
  • DNS_FLAG1_OPCODE_STATUS : resolv.c
  • DNS_FLAG1_RD : resolv.c
  • DNS_FLAG1_RESPONSE : resolv.c
  • DNS_FLAG1_TRUNC : resolv.c
  • DNS_FLAG2_ERR_MASK : resolv.c
  • DNS_FLAG2_ERR_NAME : resolv.c
  • DNS_FLAG2_ERR_NONE : resolv.c
  • DNS_FLAG2_RA : resolv.c
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- e -

  • EMAC_ADDR0 : emac.h
  • EMAC_ADDR1 : emac.h
  • EMAC_ADDR12 : emactest.c
  • EMAC_ADDR2 : emac.h
  • EMAC_ADDR3 : emac.h
  • EMAC_ADDR34 : emactest.c
  • EMAC_ADDR4 : emac.h
  • EMAC_ADDR5 : emac.h
  • EMAC_ADDR56 : emactest.c
  • EMAC_CLRT_COLL : lpc17xx_emac.h
  • EMAC_CLRT_DEF : lpc17xx_emac.h
  • EMAC_CLRT_MAX_RETX : lpc17xx_emac.h
  • EMAC_CR_FULL_DUP : lpc17xx_emac.h
  • EMAC_CR_PASS_RUNT_FRM : lpc17xx_emac.h
  • EMAC_CR_PASS_RX_FILT : lpc17xx_emac.h
  • EMAC_CR_REG_RES : lpc17xx_emac.h
  • EMAC_CR_RMII : lpc17xx_emac.h
  • EMAC_CR_RX_EN : lpc17xx_emac.h
  • EMAC_CR_RX_RES : lpc17xx_emac.h
  • EMAC_CR_TX_EN : lpc17xx_emac.h
  • EMAC_CR_TX_FLOW_CTRL : lpc17xx_emac.h
  • EMAC_CR_TX_RES : lpc17xx_emac.h
  • EMAC_DEF_ADR : lpc17xx_emac.h
  • EMAC_DP83848C_ID : lpc17xx_emac.h
  • EMAC_DST_ADDR12 : emactest.c
  • EMAC_DST_ADDR34 : emactest.c
  • EMAC_DST_ADDR56 : emactest.c
  • EMAC_ETH_MAX_FLEN : lpc17xx_emac.h
  • EMAC_FCC_MIRR_CNT : lpc17xx_emac.h
  • EMAC_FCC_PAUSE_TIM : lpc17xx_emac.h
  • EMAC_FCS_MIRR_CNT : lpc17xx_emac.h
  • EMAC_INT_RX_DONE : lpc17xx_emac.h
  • EMAC_INT_RX_ERR : lpc17xx_emac.h
  • EMAC_INT_RX_FIN : lpc17xx_emac.h
  • EMAC_INT_RX_OVERRUN : lpc17xx_emac.h
  • EMAC_INT_SOFT_INT : lpc17xx_emac.h
  • EMAC_INT_TX_DONE : lpc17xx_emac.h
  • EMAC_INT_TX_ERR : lpc17xx_emac.h
  • EMAC_INT_TX_FIN : lpc17xx_emac.h
  • EMAC_INT_TX_UNDERRUN : lpc17xx_emac.h
  • EMAC_INT_WAKEUP : lpc17xx_emac.h
  • EMAC_IPGR_NBBIPG_P1 : lpc17xx_emac.h
  • EMAC_IPGR_NBBIPG_P2 : lpc17xx_emac.h
  • EMAC_IPGR_P1_DEF : lpc17xx_emac.h
  • EMAC_IPGR_P2_DEF : lpc17xx_emac.h
  • EMAC_IPGT_BBIPG : lpc17xx_emac.h
  • EMAC_IPGT_FULL_DUP : lpc17xx_emac.h
  • EMAC_IPGT_HALF_DUP : lpc17xx_emac.h
  • EMAC_MAC1_LOOPB : lpc17xx_emac.h
  • EMAC_MAC1_PASS_ALL : lpc17xx_emac.h
  • EMAC_MAC1_REC_EN : lpc17xx_emac.h
  • EMAC_MAC1_RES_MCS_RX : lpc17xx_emac.h
  • EMAC_MAC1_RES_MCS_TX : lpc17xx_emac.h
  • EMAC_MAC1_RES_RX : lpc17xx_emac.h
  • EMAC_MAC1_RES_TX : lpc17xx_emac.h
  • EMAC_MAC1_RX_FLOWC : lpc17xx_emac.h
  • EMAC_MAC1_SIM_RES : lpc17xx_emac.h
  • EMAC_MAC1_SOFT_RES : lpc17xx_emac.h
  • EMAC_MAC1_TX_FLOWC : lpc17xx_emac.h
  • EMAC_MAC2_ADET_PAD_EN : lpc17xx_emac.h
  • EMAC_MAC2_BACK_PRESSURE : lpc17xx_emac.h
  • EMAC_MAC2_CRC_EN : lpc17xx_emac.h
  • EMAC_MAC2_DLY_CRC : lpc17xx_emac.h
  • EMAC_MAC2_EXCESS_DEF : lpc17xx_emac.h
  • EMAC_MAC2_FRM_LEN_CHK : lpc17xx_emac.h
  • EMAC_MAC2_FULL_DUP : lpc17xx_emac.h
  • EMAC_MAC2_HUGE_FRM_EN : lpc17xx_emac.h
  • EMAC_MAC2_LPREAM_ENF : lpc17xx_emac.h
  • EMAC_MAC2_NO_BACKOFF : lpc17xx_emac.h
  • EMAC_MAC2_PAD_EN : lpc17xx_emac.h
  • EMAC_MAC2_PPREAM_ENF : lpc17xx_emac.h
  • EMAC_MAC2_VLAN_PAD_EN : lpc17xx_emac.h
  • EMAC_MADR_PHY_ADR : lpc17xx_emac.h
  • EMAC_MADR_REG_ADR : lpc17xx_emac.h
  • EMAC_MAX_PACKET_SIZE : emac.h
  • EMAC_MAXF_MAXFRMLEN : lpc17xx_emac.h
  • EMAC_MCFG_CLK_SEL : lpc17xx_emac.h
  • EMAC_MCFG_MII_MAXCLK : lpc17xx_emac.h
  • EMAC_MCFG_RES_MII : lpc17xx_emac.h
  • EMAC_MCFG_SCAN_INC : lpc17xx_emac.h
  • EMAC_MCFG_SUPP_PREAM : lpc17xx_emac.h
  • EMAC_MCMD_READ : lpc17xx_emac.h
  • EMAC_MCMD_SCAN : lpc17xx_emac.h
  • EMAC_MII_RD_TOUT : lpc17xx_emac.h
  • EMAC_MII_WR_TOUT : lpc17xx_emac.h
  • EMAC_MIND_BUSY : lpc17xx_emac.h
  • EMAC_MIND_MII_LINK_FAIL : lpc17xx_emac.h
  • EMAC_MIND_NOT_VAL : lpc17xx_emac.h
  • EMAC_MIND_SCAN : lpc17xx_emac.h
  • EMAC_MODE_100M_FULL : lpc17xx_emac.h
  • EMAC_MODE_100M_HALF : lpc17xx_emac.h
  • EMAC_MODE_10M_FULL : lpc17xx_emac.h
  • EMAC_MODE_10M_HALF : lpc17xx_emac.h
  • EMAC_MODE_AUTO : lpc17xx_emac.h
  • EMAC_MRDD_DATA : lpc17xx_emac.h
  • EMAC_MWTD_DATA : lpc17xx_emac.h
  • EMAC_NUM_RX_FRAG : lpc17xx_emac.h
  • EMAC_NUM_TX_FRAG : lpc17xx_emac.h
  • EMAC_OLD_EMAC_MODULE_ID : lpc17xx_emac.h
  • EMAC_PD_POWER_DOWN : lpc17xx_emac.h
  • EMAC_PHY_AUTO_NEG : lpc17xx_emac.h
  • EMAC_PHY_BMCR_AN : lpc17xx_emac.h
  • EMAC_PHY_BMCR_DUPLEX : lpc17xx_emac.h
  • EMAC_PHY_BMCR_ISOLATE : lpc17xx_emac.h
  • EMAC_PHY_BMCR_LOOPBACK : lpc17xx_emac.h
  • EMAC_PHY_BMCR_POWERDOWN : lpc17xx_emac.h
  • EMAC_PHY_BMCR_RE_AN : lpc17xx_emac.h
  • EMAC_PHY_BMCR_RESET : lpc17xx_emac.h
  • EMAC_PHY_BMCR_SPEED_SEL : lpc17xx_emac.h
  • EMAC_PHY_BMSR_100BE_T4 : lpc17xx_emac.h
  • EMAC_PHY_BMSR_100TX_FULL : lpc17xx_emac.h
  • EMAC_PHY_BMSR_100TX_HALF : lpc17xx_emac.h
  • EMAC_PHY_BMSR_10BE_FULL : lpc17xx_emac.h
  • EMAC_PHY_BMSR_10BE_HALF : lpc17xx_emac.h
  • EMAC_PHY_BMSR_AUTO_DONE : lpc17xx_emac.h
  • EMAC_PHY_BMSR_LINK_ESTABLISHED : lpc17xx_emac.h
  • EMAC_PHY_BMSR_LINK_STATUS : lpc17xx_emac.h
  • EMAC_PHY_BMSR_NO_AUTO : lpc17xx_emac.h
  • EMAC_PHY_BMSR_NOPREAM : lpc17xx_emac.h
  • EMAC_PHY_BMSR_REMOTE_FAULT : lpc17xx_emac.h
  • EMAC_PHY_FULLD_100M : lpc17xx_emac.h
  • EMAC_PHY_FULLD_10M : lpc17xx_emac.h
  • EMAC_PHY_HALFD_100M : lpc17xx_emac.h
  • EMAC_PHY_HALFD_10M : lpc17xx_emac.h
  • EMAC_PHY_REG_10BTSCR : lpc17xx_emac.h
  • EMAC_PHY_REG_ANAR : lpc17xx_emac.h
  • EMAC_PHY_REG_ANER : lpc17xx_emac.h
  • EMAC_PHY_REG_ANLPAR : lpc17xx_emac.h
  • EMAC_PHY_REG_ANNPTR : lpc17xx_emac.h
  • EMAC_PHY_REG_BMCR : lpc17xx_emac.h
  • EMAC_PHY_REG_BMSR : lpc17xx_emac.h
  • EMAC_PHY_REG_CDCTRL1 : lpc17xx_emac.h
  • EMAC_PHY_REG_EDCR : lpc17xx_emac.h
  • EMAC_PHY_REG_FCSCR : lpc17xx_emac.h
  • EMAC_PHY_REG_IDR1 : lpc17xx_emac.h
  • EMAC_PHY_REG_IDR2 : lpc17xx_emac.h
  • EMAC_PHY_REG_LEDCR : lpc17xx_emac.h
  • EMAC_PHY_REG_LPNPA : lpc17xx_emac.h
  • EMAC_PHY_REG_MICR : lpc17xx_emac.h
  • EMAC_PHY_REG_MISR : lpc17xx_emac.h
  • EMAC_PHY_REG_PCSR : lpc17xx_emac.h
  • EMAC_PHY_REG_PHYCR : lpc17xx_emac.h
  • EMAC_PHY_REG_RBR : lpc17xx_emac.h
  • EMAC_PHY_REG_RECR : lpc17xx_emac.h
  • EMAC_PHY_REG_STS : lpc17xx_emac.h
  • EMAC_PHY_RESP_TOUT : lpc17xx_emac.h
  • EMAC_PHY_SR_100_SPEED : lpc17xx_emac.h
  • EMAC_PHY_SR_AUTO_DONE : lpc17xx_emac.h
  • EMAC_PHY_SR_DUP : lpc17xx_emac.h
  • EMAC_PHY_SR_FULL_DUP : lpc17xx_emac.h
  • EMAC_PHY_SR_JABBER : lpc17xx_emac.h
  • EMAC_PHY_SR_LINK : lpc17xx_emac.h
  • EMAC_PHY_SR_LOOPBACK : lpc17xx_emac.h
  • EMAC_PHY_SR_REMOTE_FAULT : lpc17xx_emac.h
  • EMAC_PHY_SR_SPEED : lpc17xx_emac.h
  • EMAC_PHY_STAT_DUP : lpc17xx_emac.h
  • EMAC_PHY_STAT_LINK : lpc17xx_emac.h
  • EMAC_PHY_STAT_SPEED : lpc17xx_emac.h
  • EMAC_RCTRL_INT : lpc17xx_emac.h
  • EMAC_RCTRL_SIZE : lpc17xx_emac.h
  • EMAC_RFC_BCAST_EN : lpc17xx_emac.h
  • EMAC_RFC_MAGP_WOL_EN : lpc17xx_emac.h
  • EMAC_RFC_MCAST_EN : lpc17xx_emac.h
  • EMAC_RFC_MCAST_HASH_EN : lpc17xx_emac.h
  • EMAC_RFC_PERFECT_EN : lpc17xx_emac.h
  • EMAC_RFC_PFILT_WOL_EN : lpc17xx_emac.h
  • EMAC_RFC_UCAST_EN : lpc17xx_emac.h
  • EMAC_RFC_UCAST_HASH_EN : lpc17xx_emac.h
  • EMAC_RHASH_DA : lpc17xx_emac.h
  • EMAC_RHASH_SA : lpc17xx_emac.h
  • EMAC_RINFO_ALIGN_ERR : lpc17xx_emac.h
  • EMAC_RINFO_BCAST : lpc17xx_emac.h
  • EMAC_RINFO_CRC_ERR : lpc17xx_emac.h
  • EMAC_RINFO_CTRL_FRAME : lpc17xx_emac.h
  • EMAC_RINFO_ERR : lpc17xx_emac.h
  • EMAC_RINFO_ERR_MASK : lpc17xx_emac.h
  • EMAC_RINFO_FAIL_FILT : lpc17xx_emac.h
  • EMAC_RINFO_LAST_FLAG : lpc17xx_emac.h
  • EMAC_RINFO_LEN_ERR : lpc17xx_emac.h
  • EMAC_RINFO_MCAST : lpc17xx_emac.h
  • EMAC_RINFO_NO_DESCR : lpc17xx_emac.h
  • EMAC_RINFO_OVERRUN : lpc17xx_emac.h
  • EMAC_RINFO_RANGE_ERR : lpc17xx_emac.h
  • EMAC_RINFO_SIZE : lpc17xx_emac.h
  • EMAC_RINFO_SYM_ERR : lpc17xx_emac.h
  • EMAC_RINFO_VLAN : lpc17xx_emac.h
  • EMAC_RSV_BCAST : lpc17xx_emac.h
  • EMAC_RSV_BYTE_CNT : lpc17xx_emac.h
  • EMAC_RSV_CARR_SEEN : lpc17xx_emac.h
  • EMAC_RSV_CRC_ERR : lpc17xx_emac.h
  • EMAC_RSV_CTRL_FRAME : lpc17xx_emac.h
  • EMAC_RSV_DRIB_NIBB : lpc17xx_emac.h
  • EMAC_RSV_LEN_CHKERR : lpc17xx_emac.h
  • EMAC_RSV_LEN_OUTRNG : lpc17xx_emac.h
  • EMAC_RSV_MCAST : lpc17xx_emac.h
  • EMAC_RSV_PAUSE : lpc17xx_emac.h
  • EMAC_RSV_PKT_IGNORED : lpc17xx_emac.h
  • EMAC_RSV_REC_CODEV : lpc17xx_emac.h
  • EMAC_RSV_REC_OK : lpc17xx_emac.h
  • EMAC_RSV_RXDV_SEEN : lpc17xx_emac.h
  • EMAC_RSV_UNSUPP_OPC : lpc17xx_emac.h
  • EMAC_RSV_VLAN : lpc17xx_emac.h
  • EMAC_SR_RX_EN : lpc17xx_emac.h
  • EMAC_SR_TX_EN : lpc17xx_emac.h
  • EMAC_SUPP_SPEED : lpc17xx_emac.h
  • EMAC_TCTRL_CRC : lpc17xx_emac.h
  • EMAC_TCTRL_HUGE : lpc17xx_emac.h
  • EMAC_TCTRL_INT : lpc17xx_emac.h
  • EMAC_TCTRL_LAST : lpc17xx_emac.h
  • EMAC_TCTRL_OVERRIDE : lpc17xx_emac.h
  • EMAC_TCTRL_PAD : lpc17xx_emac.h
  • EMAC_TCTRL_SIZE : lpc17xx_emac.h
  • EMAC_TEST_SHCUT_PQUANTA : lpc17xx_emac.h
  • EMAC_TEST_TST_BACKP : lpc17xx_emac.h
  • EMAC_TEST_TST_PAUSE : lpc17xx_emac.h
  • EMAC_TINFO_COL_CNT : lpc17xx_emac.h
  • EMAC_TINFO_DEFER : lpc17xx_emac.h
  • EMAC_TINFO_ERR : lpc17xx_emac.h
  • EMAC_TINFO_EXCESS_COL : lpc17xx_emac.h
  • EMAC_TINFO_EXCESS_DEF : lpc17xx_emac.h
  • EMAC_TINFO_LATE_COL : lpc17xx_emac.h
  • EMAC_TINFO_NO_DESCR : lpc17xx_emac.h
  • EMAC_TINFO_UNDERRUN : lpc17xx_emac.h
  • EMAC_TSV0_BACK_PRESS : lpc17xx_emac.h
  • EMAC_TSV0_BCAST : lpc17xx_emac.h
  • EMAC_TSV0_BYTES : lpc17xx_emac.h
  • EMAC_TSV0_CRC_ERR : lpc17xx_emac.h
  • EMAC_TSV0_CTRL_FRAME : lpc17xx_emac.h
  • EMAC_TSV0_DONE : lpc17xx_emac.h
  • EMAC_TSV0_EXC_COLL : lpc17xx_emac.h
  • EMAC_TSV0_EXC_DEFER : lpc17xx_emac.h
  • EMAC_TSV0_GIANT : lpc17xx_emac.h
  • EMAC_TSV0_LATE_COLL : lpc17xx_emac.h
  • EMAC_TSV0_LEN_CHKERR : lpc17xx_emac.h
  • EMAC_TSV0_LEN_OUTRNG : lpc17xx_emac.h
  • EMAC_TSV0_MCAST : lpc17xx_emac.h
  • EMAC_TSV0_PAUSE : lpc17xx_emac.h
  • EMAC_TSV0_PKT_DEFER : lpc17xx_emac.h
  • EMAC_TSV0_UNDERRUN : lpc17xx_emac.h
  • EMAC_TSV0_VLAN : lpc17xx_emac.h
  • EMAC_TSV1_BYTE_CNT : lpc17xx_emac.h
  • EMAC_TSV1_COLL_CNT : lpc17xx_emac.h
  • EMAC_TX_FRAME_TOUT : lpc17xx_emac.h
  • EMAC_WOL_BCAST : lpc17xx_emac.h
  • EMAC_WOL_BITMASK : lpc17xx_emac.h
  • EMAC_WOL_MAG_PACKET : lpc17xx_emac.h
  • EMAC_WOL_MCAST : lpc17xx_emac.h
  • EMAC_WOL_MCAST_HASH : lpc17xx_emac.h
  • EMAC_WOL_PERFECT : lpc17xx_emac.h
  • EMAC_WOL_RX_FILTER : lpc17xx_emac.h
  • EMAC_WOL_UCAST : lpc17xx_emac.h
  • EMAC_WOL_UCAST_HASH : lpc17xx_emac.h
  • ENABLE_HASH : emactest.c
  • ENABLE_WOL : emactest.c
  • ENC_RES : qei_test_velo.c
  • ENET_DMA_DESC_NUMB : emac.h
  • ENTRIES : uip-neighbor.c
  • EOT_INT : usbreg.h
  • EP_FAST_INT : usbreg.h
  • EP_MSK_BULK : usbhw.c
  • EP_MSK_CTRL : usbhw.c
  • EP_MSK_INT : usbhw.c
  • EP_MSK_ISO : usbhw.c
  • EP_RLZED_INT : usbreg.h
  • EP_SEL_B_1_FULL : usbreg.h
  • EP_SEL_B_2_FULL : usbreg.h
  • EP_SEL_EPN : usbreg.h
  • EP_SEL_F : usbreg.h
  • EP_SEL_PO : usbreg.h
  • EP_SEL_ST : usbreg.h
  • EP_SEL_STP : usbreg.h
  • EP_SLOW_INT : usbreg.h
  • EP_STAT_CND_ST : usbreg.h
  • EP_STAT_DA : usbreg.h
  • EP_STAT_RF_MO : usbreg.h
  • EP_STAT_ST : usbreg.h
  • ERR_B_OVRN : usbreg.h
  • ERR_BTSTF : usbreg.h
  • ERR_DCRC : usbreg.h
  • ERR_EA : usbreg.h
  • ERR_EC_MASK : usbreg.h
  • ERR_EOP : usbreg.h
  • ERR_INT : usbreg.h
  • ERR_PID : usbreg.h
  • ERR_TGL : usbreg.h
  • ERR_TIMOUT : usbreg.h
  • ERR_UEPKT : usbreg.h
  • ETH_DA_OFS : tcpip.h
  • ETH_DATA_OFS : tcpip.h
  • ETH_HEADER_SIZE : tcpip.h
  • ETH_SA_OFS : tcpip.h
  • ETH_TYPE_OFS : tcpip.h
  • EXTERN : lpc_types.h
  • extern : easyweb.c
  • EXTI_EINT0_BIT_MARK : lpc17xx_exti.h
  • EXTI_EINT1_BIT_MARK : lpc17xx_exti.h
  • EXTI_EINT2_BIT_MARK : lpc17xx_exti.h
  • EXTI_EINT3_BIT_MARK : lpc17xx_exti.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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  • Functions
  • Variables
  • Typedefs
  • Enumerations
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- f -

  • FBUF : uip.c
  • FIN_TIMEOUT : tcpip.h
  • FIX_DUPLEX : emac.h
  • FIX_SPEED : emac.h
  • FLASH_SETUP : system_LPC17xx.c
  • FLASHCFG_Val : system_LPC17xx.c
  • FRAME_ARP : tcpip.h
  • FRAME_INT : usbreg.h
  • FRAME_IP : tcpip.h
  • FULL_DUPLEX : emac.h
  • FW_TIME : uip-fw.c
  • FWCACHE_SIZE : uip-fw.c
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
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  • c
  • d
  • e
  • f
  • g
  • h
  • i
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  • x
  • y

- g -

  • GETBIT : spi_sdcard.c
  • GLCD_BOOSTER_ON_DLY : drv_glcd.c
  • GLCD_DATA : drv_glcd.h
  • GLCD_DEF_CLOCK : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_8_COLOR : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_INV : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_ML : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_MX : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_MY : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_PARTIAL_MODE : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_RGB_ORD : drv_glcd_cnfg.h
  • GLCD_DEF_DPL_V : drv_glcd_cnfg.h
  • GLCD_DEF_WIDTH : drv_glcd_cnfg.h
  • GLCD_DISPLAY_STATE : drv_glcd_cnfg.h
  • GLCD_DLY_10US : drv_glcd.c
  • GLCD_HORIZONTAL_SIZE : drv_glcd_cnfg.h
  • GLCD_INV_CMD : drv_glcd.h
  • GLCD_MANF_ID : drv_glcd.h
  • GLCD_MAX_COTRAST : drv_glcd.h
  • GLCD_MIN_COTRAST : drv_glcd.h
  • GLCD_MOD_ID : drv_glcd.h
  • GLCD_RESET_DLY : drv_glcd.c
  • GLCD_VERTICAL_SIZE : drv_glcd_cnfg.h
  • GPDMA_BSIZE_1 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_128 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_16 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_256 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_32 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_4 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_64 : lpc17xx_gpdma.h
  • GPDMA_BSIZE_8 : lpc17xx_gpdma.h
  • GPDMA_CONN_ADC : lpc17xx_gpdma.h
  • GPDMA_CONN_DAC : lpc17xx_gpdma.h
  • GPDMA_CONN_I2S_Channel_0 : lpc17xx_gpdma.h
  • GPDMA_CONN_I2S_Channel_1 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT0_0 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT0_1 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT1_0 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT1_1 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT2_0 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT2_1 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT3_0 : lpc17xx_gpdma.h
  • GPDMA_CONN_MAT3_1 : lpc17xx_gpdma.h
  • GPDMA_CONN_SSP0_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_SSP0_Tx : lpc17xx_gpdma.h
  • GPDMA_CONN_SSP1_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_SSP1_Tx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART0_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART0_Tx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART1_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART1_Tx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART2_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART2_Tx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART3_Rx : lpc17xx_gpdma.h
  • GPDMA_CONN_UART3_Tx : lpc17xx_gpdma.h
  • GPDMA_DMACConfig_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACConfig_E : lpc17xx_gpdma.h
  • GPDMA_DMACConfig_M : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_A : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_DestPeripheral : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_E : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_H : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_IE : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_ITC : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_L : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_SrcPeripheral : lpc17xx_gpdma.h
  • GPDMA_DMACCxConfig_TransferType : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_DBSize : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_DI : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_DWidth : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_I : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_Prot1 : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_Prot2 : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_Prot3 : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_SBSize : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_SI : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_SWidth : lpc17xx_gpdma.h
  • GPDMA_DMACCxControl_TransferSize : lpc17xx_gpdma.h
  • GPDMA_DMACCxLLI_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACEnbldChns_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACEnbldChns_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACIntErrClr_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACIntErrClr_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACIntErrStat_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACIntErrStat_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACIntStat_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACIntStat_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACIntTCClear_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACIntTCClear_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACIntTCStat_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACIntTCStat_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACRawIntErrStat_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACRawIntErrStat_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACRawIntTCStat_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACRawIntTCStat_Ch : lpc17xx_gpdma.h
  • GPDMA_DMACSoftBReq_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACSoftBReq_Src : lpc17xx_gpdma.h
  • GPDMA_DMACSoftLBReq_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACSoftLBReq_Src : lpc17xx_gpdma.h
  • GPDMA_DMACSoftLSReq_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACSoftLSReq_Src : lpc17xx_gpdma.h
  • GPDMA_DMACSoftSReq_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACSoftSReq_Src : lpc17xx_gpdma.h
  • GPDMA_DMACSync_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMACSync_Src : lpc17xx_gpdma.h
  • GPDMA_DMAReqSel_BITMASK : lpc17xx_gpdma.h
  • GPDMA_DMAReqSel_Input : lpc17xx_gpdma.h
  • GPDMA_REQSEL_TIMER : lpc17xx_gpdma.h
  • GPDMA_REQSEL_UART : lpc17xx_gpdma.h
  • GPDMA_TRANSFERTYPE_M2M : lpc17xx_gpdma.h
  • GPDMA_TRANSFERTYPE_M2P : lpc17xx_gpdma.h
  • GPDMA_TRANSFERTYPE_P2M : lpc17xx_gpdma.h
  • GPDMA_TRANSFERTYPE_P2P : lpc17xx_gpdma.h
  • GPDMA_WIDTH_BYTE : lpc17xx_gpdma.h
  • GPDMA_WIDTH_HALFWORD : lpc17xx_gpdma.h
  • GPDMA_WIDTH_WORD : lpc17xx_gpdma.h
  • GPIO0_Byte : lpc17xx_gpio.h
  • GPIO0_HalfWord : lpc17xx_gpio.h
  • GPIO1_Byte : lpc17xx_gpio.h
  • GPIO1_HalfWord : lpc17xx_gpio.h
  • GPIO2_Byte : lpc17xx_gpio.h
  • GPIO2_HalfWord : lpc17xx_gpio.h
  • GPIO3_Byte : lpc17xx_gpio.h
  • GPIO3_HalfWord : lpc17xx_gpio.h
  • GPIO4_Byte : lpc17xx_gpio.h
  • GPIO4_HalfWord : lpc17xx_gpio.h
  • GPIO_INT : adc_burst_test.c
  • Green : GLCD.h
  • GWIP_1 : tcpip.h
  • GWIP_2 : tcpip.h
  • GWIP_3 : tcpip.h
  • GWIP_4 : tcpip.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
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- h -

  • HALF_DUPLEX : emac.h
  • HARDW_ETH10 : tcpip.h
  • HEIGHT : GLCD_SPI_LPC1700.c
  • HID_Absolute : hid.h
  • HID_Application : hid.h
  • HID_Array : hid.h
  • HID_Collection : hid.h
  • HID_Constant : hid.h
  • HID_Data : hid.h
  • HID_DESC_OFFSET : usbdesc.h
  • HID_DESC_SIZE : usbdesc.h
  • HID_EndCollection : hid.h
  • HID_Feature : hid.h
  • HID_HID_DESCRIPTOR_TYPE : hid.h
  • HID_Input : hid.h
  • HID_Linear : hid.h
  • HID_Logical : hid.h
  • HID_LogicalMax : hid.h
  • HID_LogicalMaxL : hid.h
  • HID_LogicalMaxS : hid.h
  • HID_LogicalMin : hid.h
  • HID_LogicalMinL : hid.h
  • HID_LogicalMinS : hid.h
  • HID_NamedArray : hid.h
  • HID_NonLinear : hid.h
  • HID_NoNullPosition : hid.h
  • HID_NonVolatile : hid.h
  • HID_NoPreferred : hid.h
  • HID_NoWrap : hid.h
  • HID_NullState : hid.h
  • HID_Output : hid.h
  • HID_Physical : hid.h
  • HID_PHYSICAL_DESCRIPTOR_TYPE : hid.h
  • HID_PhysicalMax : hid.h
  • HID_PhysicalMaxL : hid.h
  • HID_PhysicalMaxS : hid.h
  • HID_PhysicalMin : hid.h
  • HID_PhysicalMinL : hid.h
  • HID_PhysicalMinS : hid.h
  • HID_Pop : hid.h
  • HID_PreferredState : hid.h
  • HID_PROTOCOL_KEYBOARD : hid.h
  • HID_PROTOCOL_MOUSE : hid.h
  • HID_PROTOCOL_NONE : hid.h
  • HID_Push : hid.h
  • HID_Relative : hid.h
  • HID_Report : hid.h
  • HID_REPORT_DESC_SIZE : usbdesc.h
  • HID_REPORT_DESCRIPTOR_TYPE : hid.h
  • HID_REPORT_FEATURE : hid.h
  • HID_REPORT_INPUT : hid.h
  • HID_REPORT_NUM : hiduser.h
  • HID_REPORT_OUTPUT : hid.h
  • HID_ReportCount : hid.h
  • HID_ReportID : hid.h
  • HID_ReportSize : hid.h
  • HID_REQUEST_GET_IDLE : hid.h
  • HID_REQUEST_GET_PROTOCOL : hid.h
  • HID_REQUEST_GET_REPORT : hid.h
  • HID_REQUEST_SET_IDLE : hid.h
  • HID_REQUEST_SET_PROTOCOL : hid.h
  • HID_REQUEST_SET_REPORT : hid.h
  • HID_SUBCLASS_BOOT : hid.h
  • HID_SUBCLASS_NONE : hid.h
  • HID_Unit : hid.h
  • HID_UnitExponent : hid.h
  • HID_UnitL : hid.h
  • HID_UnitS : hid.h
  • HID_Usage : hid.h
  • HID_USAGE_CONSUMER_CONTROL : hid.h
  • HID_USAGE_GENERIC_BYTE_COUNT : hid.h
  • HID_USAGE_GENERIC_COUNTED_BUFFER : hid.h
  • HID_USAGE_GENERIC_DIAL : hid.h
  • HID_USAGE_GENERIC_GAMEPAD : hid.h
  • HID_USAGE_GENERIC_HATSWITCH : hid.h
  • HID_USAGE_GENERIC_JOYSTICK : hid.h
  • HID_USAGE_GENERIC_KEYBOARD : hid.h
  • HID_USAGE_GENERIC_KEYPAD : hid.h
  • HID_USAGE_GENERIC_MOTION_WAKEUP : hid.h
  • HID_USAGE_GENERIC_MOUSE : hid.h
  • HID_USAGE_GENERIC_POINTER : hid.h
  • HID_USAGE_GENERIC_RX : hid.h
  • HID_USAGE_GENERIC_RY : hid.h
  • HID_USAGE_GENERIC_RZ : hid.h
  • HID_USAGE_GENERIC_SLIDER : hid.h
  • HID_USAGE_GENERIC_SYSCTL_APP_MENU : hid.h
  • HID_USAGE_GENERIC_SYSCTL_CONTEXT_MENU : hid.h
  • HID_USAGE_GENERIC_SYSCTL_HELP_MENU : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MAIN_MENU : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_DOWN : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_EXIT : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_LEFT : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_RIGHT : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_SELECT : hid.h
  • HID_USAGE_GENERIC_SYSCTL_MENU_UP : hid.h
  • HID_USAGE_GENERIC_SYSCTL_POWER : hid.h
  • HID_USAGE_GENERIC_SYSCTL_SLEEP : hid.h
  • HID_USAGE_GENERIC_SYSCTL_WAKE : hid.h
  • HID_USAGE_GENERIC_SYSTEM_CTL : hid.h
  • HID_USAGE_GENERIC_VBRX : hid.h
  • HID_USAGE_GENERIC_VBRY : hid.h
  • HID_USAGE_GENERIC_VBRZ : hid.h
  • HID_USAGE_GENERIC_VNO : hid.h
  • HID_USAGE_GENERIC_VX : hid.h
  • HID_USAGE_GENERIC_VY : hid.h
  • HID_USAGE_GENERIC_VZ : hid.h
  • HID_USAGE_GENERIC_WHEEL : hid.h
  • HID_USAGE_GENERIC_X : hid.h
  • HID_USAGE_GENERIC_Y : hid.h
  • HID_USAGE_GENERIC_Z : hid.h
  • HID_USAGE_KEYBOARD_aA : hid.h
  • HID_USAGE_KEYBOARD_CAPS_LOCK : hid.h
  • HID_USAGE_KEYBOARD_DELETE : hid.h
  • HID_USAGE_KEYBOARD_ESCAPE : hid.h
  • HID_USAGE_KEYBOARD_F1 : hid.h
  • HID_USAGE_KEYBOARD_F12 : hid.h
  • HID_USAGE_KEYBOARD_LALT : hid.h
  • HID_USAGE_KEYBOARD_LCTRL : hid.h
  • HID_USAGE_KEYBOARD_LGUI : hid.h
  • HID_USAGE_KEYBOARD_LSHFT : hid.h
  • HID_USAGE_KEYBOARD_NOEVENT : hid.h
  • HID_USAGE_KEYBOARD_NUM_LOCK : hid.h
  • HID_USAGE_KEYBOARD_ONE : hid.h
  • HID_USAGE_KEYBOARD_POSTFAIL : hid.h
  • HID_USAGE_KEYBOARD_PRINT_SCREEN : hid.h
  • HID_USAGE_KEYBOARD_RALT : hid.h
  • HID_USAGE_KEYBOARD_RCTRL : hid.h
  • HID_USAGE_KEYBOARD_RETURN : hid.h
  • HID_USAGE_KEYBOARD_RGUI : hid.h
  • HID_USAGE_KEYBOARD_ROLLOVER : hid.h
  • HID_USAGE_KEYBOARD_RSHFT : hid.h
  • HID_USAGE_KEYBOARD_SCROLL_LOCK : hid.h
  • HID_USAGE_KEYBOARD_UNDEFINED : hid.h
  • HID_USAGE_KEYBOARD_ZERO : hid.h
  • HID_USAGE_KEYBOARD_zZ : hid.h
  • HID_USAGE_LED_AMBER : hid.h
  • HID_USAGE_LED_BATTERY_LOW : hid.h
  • HID_USAGE_LED_BATTERY_OK : hid.h
  • HID_USAGE_LED_BATTERY_OPERATION : hid.h
  • HID_USAGE_LED_BUSY : hid.h
  • HID_USAGE_LED_CALL_PICKUP : hid.h
  • HID_USAGE_LED_CAMERA_OFF : hid.h
  • HID_USAGE_LED_CAMERA_ON : hid.h
  • HID_USAGE_LED_CAPS_LOCK : hid.h
  • HID_USAGE_LED_CAV : hid.h
  • HID_USAGE_LED_CLV : hid.h
  • HID_USAGE_LED_COMPOSE : hid.h
  • HID_USAGE_LED_CONFERENCE : hid.h
  • HID_USAGE_LED_COVERAGE : hid.h
  • HID_USAGE_LED_DATA_MODE : hid.h
  • HID_USAGE_LED_DO_NOT_DISTURB : hid.h
  • HID_USAGE_LED_EQUALIZER_ENABLE : hid.h
  • HID_USAGE_LED_ERROR : hid.h
  • HID_USAGE_LED_FAST_BLINK_OFF_TIME : hid.h
  • HID_USAGE_LED_FAST_BLINK_ON_TIME : hid.h
  • HID_USAGE_LED_FAST_FORWARD : hid.h
  • HID_USAGE_LED_FLASH_ON_TIME : hid.h
  • HID_USAGE_LED_FORWARD : hid.h
  • HID_USAGE_LED_GENERIC_INDICATOR : hid.h
  • HID_USAGE_LED_GREEN : hid.h
  • HID_USAGE_LED_HEAD_SET : hid.h
  • HID_USAGE_LED_HIGH_CUT_FILTER : hid.h
  • HID_USAGE_LED_HOLD : hid.h
  • HID_USAGE_LED_IN_USE_INDICATOR : hid.h
  • HID_USAGE_LED_INDICATOR_COLOR : hid.h
  • HID_USAGE_LED_INDICATOR_FAST_BLINK : hid.h
  • HID_USAGE_LED_INDICATOR_FLASH : hid.h
  • HID_USAGE_LED_INDICATOR_OFF : hid.h
  • HID_USAGE_LED_INDICATOR_ON : hid.h
  • HID_USAGE_LED_INDICATOR_SLOW_BLINK : hid.h
  • HID_USAGE_LED_KANA : hid.h
  • HID_USAGE_LED_LOW_CUT_FILTER : hid.h
  • HID_USAGE_LED_MESSAGE_WAITING : hid.h
  • HID_USAGE_LED_MICROPHONE : hid.h
  • HID_USAGE_LED_MULTI_MODE_INDICATOR : hid.h
  • HID_USAGE_LED_MUTE : hid.h
  • HID_USAGE_LED_NIGHT_MODE : hid.h
  • HID_USAGE_LED_NUM_LOCK : hid.h
  • HID_USAGE_LED_OFF_HOOK : hid.h
  • HID_USAGE_LED_OFF_LINE : hid.h
  • HID_USAGE_LED_ON_LINE : hid.h
  • HID_USAGE_LED_PAPER_JAM : hid.h
  • HID_USAGE_LED_PAPER_OUT : hid.h
  • HID_USAGE_LED_PAUSE : hid.h
  • HID_USAGE_LED_PLAY : hid.h
  • HID_USAGE_LED_POWER : hid.h
  • HID_USAGE_LED_READY : hid.h
  • HID_USAGE_LED_RECORD : hid.h
  • HID_USAGE_LED_RECORDING_FORMAT_DET : hid.h
  • HID_USAGE_LED_RED : hid.h
  • HID_USAGE_LED_REMOTE : hid.h
  • HID_USAGE_LED_REPEAT : hid.h
  • HID_USAGE_LED_REVERSE : hid.h
  • HID_USAGE_LED_REWIND : hid.h
  • HID_USAGE_LED_RING : hid.h
  • HID_USAGE_LED_SAMPLING_RATE_DETECT : hid.h
  • HID_USAGE_LED_SCROLL_LOCK : hid.h
  • HID_USAGE_LED_SELECTED_INDICATOR : hid.h
  • HID_USAGE_LED_SEND_CALLS : hid.h
  • HID_USAGE_LED_SHIFT : hid.h
  • HID_USAGE_LED_SLOW_BLINK_OFF_TIME : hid.h
  • HID_USAGE_LED_SLOW_BLINK_ON_TIME : hid.h
  • HID_USAGE_LED_SOUND_FIELD_ON : hid.h
  • HID_USAGE_LED_SPEAKER : hid.h
  • HID_USAGE_LED_SPINNING : hid.h
  • HID_USAGE_LED_STAND_BY : hid.h
  • HID_USAGE_LED_STEREO : hid.h
  • HID_USAGE_LED_STOP : hid.h
  • HID_USAGE_LED_SURROUND_FIELD_ON : hid.h
  • HID_USAGE_LED_TONE_ENABLE : hid.h
  • HID_USAGE_PAGE_ALPHANUMERIC : hid.h
  • HID_USAGE_PAGE_BUTTON : hid.h
  • HID_USAGE_PAGE_CONSUMER : hid.h
  • HID_USAGE_PAGE_DEV_CONTROLS : hid.h
  • HID_USAGE_PAGE_DIGITIZER : hid.h
  • HID_USAGE_PAGE_GAME : hid.h
  • HID_USAGE_PAGE_GENERIC : hid.h
  • HID_USAGE_PAGE_KEYBOARD : hid.h
  • HID_USAGE_PAGE_LED : hid.h
  • HID_USAGE_PAGE_ORDINAL : hid.h
  • HID_USAGE_PAGE_SIMULATION : hid.h
  • HID_USAGE_PAGE_SPORT : hid.h
  • HID_USAGE_PAGE_TELEPHONY : hid.h
  • HID_USAGE_PAGE_UNDEFINED : hid.h
  • HID_USAGE_PAGE_UNICODE : hid.h
  • HID_USAGE_PAGE_VR : hid.h
  • HID_USAGE_SIMULATION_RUDDER : hid.h
  • HID_USAGE_SIMULATION_THROTTLE : hid.h
  • HID_USAGE_TELEPHONY_ANSWERING_MACHINE : hid.h
  • HID_USAGE_TELEPHONY_HANDSET : hid.h
  • HID_USAGE_TELEPHONY_HEADSET : hid.h
  • HID_USAGE_TELEPHONY_KEYPAD : hid.h
  • HID_USAGE_TELEPHONY_MESSAGE_CONTROLS : hid.h
  • HID_USAGE_TELEPHONY_PHONE : hid.h
  • HID_USAGE_TELEPHONY_PROGRAMMABLE_BUTTON : hid.h
  • HID_UsageMax : hid.h
  • HID_UsageMin : hid.h
  • HID_UsageModifier : hid.h
  • HID_UsagePage : hid.h
  • HID_UsagePageVendor : hid.h
  • HID_UsageSwitch : hid.h
  • HID_Variable : hid.h
  • HID_Volatile : hid.h
  • HID_Wrap : hid.h
  • HTONS : uip.h
  • HTTP_SEND_PAGE : easyweb.h
  • HTTPD_CGI_CALL : httpd-cgi.h
  • HTTPD_FS_NUMFILES : httpd-fsdata.c
  • HTTPD_FS_ROOT : httpd-fsdata.c
  • HTTPD_FS_STATISTICS : httpd-fs.h
  • HTTPFLAG_ERROR : webclient.c
  • HTTPFLAG_MOVED : webclient.c
  • HTTPFLAG_NONE : webclient.c
  • HTTPFLAG_OK : webclient.c
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- i -

  • I2C_I2ADR_BITMASK : lpc17xx_i2c.h
  • I2C_I2ADR_GC : lpc17xx_i2c.h
  • I2C_I2CONCLR_AAC : lpc17xx_i2c.h
  • I2C_I2CONCLR_I2ENC : lpc17xx_i2c.h
  • I2C_I2CONCLR_SIC : lpc17xx_i2c.h
  • I2C_I2CONCLR_STAC : lpc17xx_i2c.h
  • I2C_I2CONSET_AA : lpc17xx_i2c.h
  • I2C_I2CONSET_I2EN : lpc17xx_i2c.h
  • I2C_I2CONSET_SI : lpc17xx_i2c.h
  • I2C_I2CONSET_STA : lpc17xx_i2c.h
  • I2C_I2CONSET_STO : lpc17xx_i2c.h
  • I2C_I2DAT_BITMASK : lpc17xx_i2c.h
  • I2C_I2DAT_IDLE_CHAR : lpc17xx_i2c.h
  • I2C_I2MASK_MASK : lpc17xx_i2c.h
  • I2C_I2MMCTRL_BITMASK : lpc17xx_i2c.h
  • I2C_I2MMCTRL_ENA_SCL : lpc17xx_i2c.h
  • I2C_I2MMCTRL_MATCH_ALL : lpc17xx_i2c.h
  • I2C_I2MMCTRL_MM_ENA : lpc17xx_i2c.h
  • I2C_I2SCLH_BITMASK : lpc17xx_i2c.h
  • I2C_I2SCLL_BITMASK : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_ARB_LOST : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_DAT_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_RESTART : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_SLAR_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_SLAR_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_RX_START : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_ARB_LOST : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_DAT_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_RESTART : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_SLAW_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_SLAW_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_M_TX_START : lpc17xx_i2c.h
  • I2C_I2STAT_NO_INF : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_ARB_LOST_M_SLA : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_GENCALL_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_SLAW_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX : lpc17xx_i2c.h
  • I2C_I2STAT_S_TX_ARB_LOST_M_SLA : lpc17xx_i2c.h
  • I2C_I2STAT_S_TX_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_TX_DAT_NACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_TX_LAST_DAT_ACK : lpc17xx_i2c.h
  • I2C_I2STAT_S_TX_SLAR_ACK : lpc17xx_i2c.h
  • I2C_MONITOR_CFG_MATCHALL : lpc17xx_i2c.h
  • I2C_MONITOR_CFG_SCL_OUTPUT : lpc17xx_i2c.h
  • I2C_SETUP_STATUS_ARBF : lpc17xx_i2c.h
  • I2C_SETUP_STATUS_DONE : lpc17xx_i2c.h
  • I2C_SETUP_STATUS_NOACKF : lpc17xx_i2c.h
  • I2C_SLAVE_TIME_OUT : lpc17xx_i2c.h
  • I2C_STAT_CODE_BITMASK : lpc17xx_i2c.h
  • I2CDEV : i2c_monitor.c , pca8581_test.c , i2c_interrupt_test.c , i2c_polling_test.c
  • I2CDEV_M : master.c , i2c_master_slave_int_test.c
  • I2CDEV_S : slave.c , i2c_master_slave_int_test.c
  • I2CDEV_S_ADDR : master.c
  • I2CDEV_S_OWN_ADDR : i2c_master_slave_int_test.c , slave.c
  • I2DATA_BUFFER_BITMASK : lpc17xx_i2c.h
  • I2S_4PIN_DISABLE : lpc17xx_i2s.h
  • I2S_4PIN_ENABLE : lpc17xx_i2s.h
  • I2S_BUFFER_DST : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2S_BUFFER_SRC : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2S_CLKSEL_FRDCLK : lpc17xx_i2s.h
  • I2S_CLKSEL_MCLK : lpc17xx_i2s.h
  • I2S_DAI_MONO : lpc17xx_i2s.h
  • I2S_DAI_MUTE : lpc17xx_i2s.h
  • I2S_DAI_RESET : lpc17xx_i2s.h
  • I2S_DAI_SLAVE : lpc17xx_i2s.h
  • I2S_DAI_STOP : lpc17xx_i2s.h
  • I2S_DAI_WORDWIDTH_16 : lpc17xx_i2s.h
  • I2S_DAI_WORDWIDTH_32 : lpc17xx_i2s.h
  • I2S_DAI_WORDWIDTH_8 : lpc17xx_i2s.h
  • I2S_DAI_WS_HALFPERIOD : lpc17xx_i2s.h
  • I2S_DAO_MONO : lpc17xx_i2s.h
  • I2S_DAO_MUTE : lpc17xx_i2s.h
  • I2S_DAO_RESET : lpc17xx_i2s.h
  • I2S_DAO_SLAVE : lpc17xx_i2s.h
  • I2S_DAO_STOP : lpc17xx_i2s.h
  • I2S_DAO_WORDWIDTH_16 : lpc17xx_i2s.h
  • I2S_DAO_WORDWIDTH_32 : lpc17xx_i2s.h
  • I2S_DAO_WORDWIDTH_8 : lpc17xx_i2s.h
  • I2S_DAO_WS_HALFPERIOD : lpc17xx_i2s.h
  • I2S_DMA1_RX_DEPTH : lpc17xx_i2s.h
  • I2S_DMA1_RX_ENABLE : lpc17xx_i2s.h
  • I2S_DMA1_TX_DEPTH : lpc17xx_i2s.h
  • I2S_DMA1_TX_ENABLE : lpc17xx_i2s.h
  • I2S_DMA2_RX_DEPTH : lpc17xx_i2s.h
  • I2S_DMA2_RX_ENABLE : lpc17xx_i2s.h
  • I2S_DMA2_TX_DEPTH : lpc17xx_i2s.h
  • I2S_DMA2_TX_ENABLE : lpc17xx_i2s.h
  • I2S_DMA_1 : lpc17xx_i2s.h
  • I2S_DMA_2 : lpc17xx_i2s.h
  • I2S_IRQ_RX_DEPTH : lpc17xx_i2s.h
  • I2S_IRQ_RX_ENABLE : lpc17xx_i2s.h
  • I2S_IRQ_TX_DEPTH : lpc17xx_i2s.h
  • I2S_IRQ_TX_ENABLE : lpc17xx_i2s.h
  • I2S_MASTER_MODE : lpc17xx_i2s.h
  • I2S_MCLK_DISABLE : lpc17xx_i2s.h
  • I2S_MCLK_ENABLE : lpc17xx_i2s.h
  • I2S_MONO : lpc17xx_i2s.h
  • I2S_MUTE_DISABLE : lpc17xx_i2s.h
  • I2S_MUTE_ENABLE : lpc17xx_i2s.h
  • I2S_RECEIVE : i2s_two_kit.c
  • I2S_RESET_DISABLE : lpc17xx_i2s.h
  • I2S_RESET_ENABLE : lpc17xx_i2s.h
  • I2S_RX_MODE : lpc17xx_i2s.h
  • I2S_RXBITRATE : lpc17xx_i2s.h
  • I2S_RXMODE_4PIN_ENABLE : lpc17xx_i2s.h
  • I2S_RXMODE_CLKSEL : lpc17xx_i2s.h
  • I2S_RXMODE_MCENA : lpc17xx_i2s.h
  • I2S_RXRATE_X_DIVIDER : lpc17xx_i2s.h
  • I2S_RXRATE_Y_DIVIDER : lpc17xx_i2s.h
  • I2S_SLAVE_MODE : lpc17xx_i2s.h
  • I2S_STATE_DMA1 : lpc17xx_i2s.h
  • I2S_STATE_DMA2 : lpc17xx_i2s.h
  • I2S_STATE_IRQ : lpc17xx_i2s.h
  • I2S_STATE_RX_LEVEL : lpc17xx_i2s.h
  • I2S_STATE_TX_LEVEL : lpc17xx_i2s.h
  • I2S_STEREO : lpc17xx_i2s.h
  • I2S_STOP_DISABLE : lpc17xx_i2s.h
  • I2S_STOP_ENABLE : lpc17xx_i2s.h
  • I2S_TRANSMIT : i2s_two_kit.c
  • I2S_TX_MODE : lpc17xx_i2s.h
  • I2S_TXBITRATE : lpc17xx_i2s.h
  • I2S_TXMODE_4PIN_ENABLE : lpc17xx_i2s.h
  • I2S_TXMODE_CLKSEL : lpc17xx_i2s.h
  • I2S_TXMODE_MCENA : lpc17xx_i2s.h
  • I2S_TXRATE_X_DIVIDER : lpc17xx_i2s.h
  • I2S_TXRATE_Y_DIVIDER : lpc17xx_i2s.h
  • I2S_WORDWIDTH_16 : lpc17xx_i2s.h
  • I2S_WORDWIDTH_32 : lpc17xx_i2s.h
  • I2S_WORDWIDTH_8 : lpc17xx_i2s.h
  • IAR_LPC_1768 : privilege.c , wdt_reset_test.c
  • ICMP6_ECHO : uip.c
  • ICMP6_ECHO_REPLY : uip.c
  • ICMP6_FLAG_S : uip.c
  • ICMP6_NEIGHBOR_ADVERTISEMENT : uip.c
  • ICMP6_NEIGHBOR_SOLICITATION : uip.c
  • ICMP6_OPTION_SOURCE_LINK_ADDRESS : uip.c
  • ICMP6_OPTION_TARGET_LINK_ADDRESS : uip.c
  • ICMP_CHKSUM_OFS : tcpip.h
  • ICMP_DATA_OFS : tcpip.h
  • ICMP_ECHO : tcpip.h , uip-fw.c , uip.c
  • ICMP_ECHO_REPLY : tcpip.h , uip.c
  • ICMP_HEADER_SIZE : tcpip.h
  • ICMP_TE : uip-fw.c
  • ICMP_TYPE_CODE_OFS : tcpip.h
  • ICMPBUF : uip-fw.c , uip.c
  • ID_11 : lpc17xx_can.h
  • IDLE_CHAR : microwire_test.c , sc16is750_int.c , ti_test.c , spi_interrupt_test.c
  • INAK_BI : usbreg.h
  • INAK_BO : usbreg.h
  • INAK_CI : usbreg.h
  • INAK_CO : usbreg.h
  • INAK_II : usbreg.h
  • INAK_IO : usbreg.h
  • INDEX_MASK : arm_math.h
  • INPUT_SPACING : arm_math.h
  • INT_MODE : nvic_priority.c
  • IOCON : i2c_polling_test.c , i2c_interrupt_test.c
  • IODIR : i2c_polling_test.c , i2c_interrupt_test.c
  • IOSTATE : i2c_interrupt_test.c , i2c_polling_test.c
  • IP_ADDR_RESOLVED : tcpip.h
  • IP_DATA_OFS : tcpip.h
  • IP_DESTINATION_OFS : tcpip.h
  • IP_FLAG_DONTFRAG : tcpip.h
  • IP_FLAG_MOREFRAG : tcpip.h
  • IP_FLAGS_FRAG_OFS : tcpip.h
  • IP_FRAGOFS_MASK : tcpip.h
  • IP_HEAD_CHKSUM_OFS : tcpip.h
  • IP_HEADER_SIZE : tcpip.h
  • IP_HLEN_PLEN : tcpip.h
  • IP_IDENT_OFS : tcpip.h
  • IP_SOURCE_OFS : tcpip.h
  • IP_TOS_D : tcpip.h
  • IP_TOS_R : tcpip.h
  • IP_TOS_T : tcpip.h
  • IP_TOTAL_LENGTH_OFS : tcpip.h
  • IP_TTL_PROT_OFS : tcpip.h
  • IP_VER_IHL : tcpip.h
  • IP_VER_IHL_TOS_OFS : tcpip.h
  • IPBUF : uip_arp.c
  • IRC_OSC : system_LPC17xx.c
  • ISO_2 : smtp.c
  • ISO_3 : smtp.c
  • ISO_4 : smtp.c
  • ISO_5 : smtp.c
  • ISO_bang : httpd.c
  • ISO_colon : httpd.c
  • ISO_cr : smtp.c , webclient.c , telnetd.c
  • ISO_nl : telnetd.c , httpd.c , smtp.c , webclient.c
  • ISO_percent : httpd.c
  • ISO_period : smtp.c , httpd.c
  • ISO_slash : httpd.c
  • ISO_space : webclient.c , httpd.c
  • ITM : core_cm3.h
  • ITM_BASE : core_cm3.h
  • ITM_RXBUFFER_EMPTY : core_cm3.h
  • ITM_TCR_BUSY_Msk : core_cm3.h
  • ITM_TCR_BUSY_Pos : core_cm3.h
  • ITM_TCR_GTSFREQ_Msk : core_cm3.h
  • ITM_TCR_GTSFREQ_Pos : core_cm3.h
  • ITM_TCR_ITMENA_Msk : core_cm3.h
  • ITM_TCR_ITMENA_Pos : core_cm3.h
  • ITM_TCR_SWOENA_Msk : core_cm3.h
  • ITM_TCR_SWOENA_Pos : core_cm3.h
  • ITM_TCR_SYNCENA_Msk : core_cm3.h
  • ITM_TCR_SYNCENA_Pos : core_cm3.h
  • ITM_TCR_TraceBusID_Msk : core_cm3.h
  • ITM_TCR_TraceBusID_Pos : core_cm3.h
  • ITM_TCR_TSENA_Msk : core_cm3.h
  • ITM_TCR_TSENA_Pos : core_cm3.h
  • ITM_TCR_TSPrescale_Msk : core_cm3.h
  • ITM_TCR_TSPrescale_Pos : core_cm3.h
  • ITM_TCR_TXENA_Msk : core_cm3.h
  • ITM_TCR_TXENA_Pos : core_cm3.h
  • ITM_TPR_PRIVMASK_Msk : core_cm3.h
  • ITM_TPR_PRIVMASK_Pos : core_cm3.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
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  • a
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  • c
  • d
  • e
  • f
  • g
  • h
  • i
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  • q
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  • s
  • t
  • u
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  • w
  • x
  • y

- p -

  • P_C : usbaudio.h
  • P_EP : usbuser.c
  • P_S : usbaudio.h
  • PAD_RIGHT : printf-stdarg.c
  • PAD_ZERO : printf-stdarg.c
  • PARAM_ADC_CHANNEL_SELECTION : lpc17xx_adc.h
  • PARAM_ADC_DATA_STATUS : lpc17xx_adc.h
  • PARAM_ADC_RATE : lpc17xx_adc.h
  • PARAM_ADC_START_ON_EDGE_OPT : lpc17xx_adc.h
  • PARAM_ADC_START_OPT : lpc17xx_adc.h
  • PARAM_ADC_TYPE_INT_OPT : lpc17xx_adc.h
  • PARAM_ADCx : lpc17xx_adc.h
  • PARAM_AFLUT_ENTRY_TYPE : lpc17xx_can.h
  • PARAM_AFMODE_TYPE : lpc17xx_can.h
  • PARAM_CANAFRAMx : lpc17xx_can.h
  • PARAM_CANAFx : lpc17xx_can.h
  • PARAM_CANCRx : lpc17xx_can.h
  • PARAM_CANx : lpc17xx_can.h
  • PARAM_CR_STS_TYPE : lpc17xx_can.h
  • PARAM_CTRL : lpc17xx_can.h
  • PARAM_CTRL_STS_TYPE : lpc17xx_can.h
  • PARAM_DAC_CURRENT_OPT : lpc17xx_dac.h
  • PARAM_DACx : lpc17xx_dac.h
  • PARAM_DLC : lpc17xx_can.h
  • PARAM_FRAME_TYPE : lpc17xx_can.h
  • PARAM_FULLCAN_IC : lpc17xx_can.h
  • PARAM_FUNCTIONALSTATE : lpc_types.h
  • PARAM_GPDMA_BSIZE : lpc17xx_gpdma.h
  • PARAM_GPDMA_CHANNEL : lpc17xx_gpdma.h
  • PARAM_GPDMA_CONN : lpc17xx_gpdma.h
  • PARAM_GPDMA_REQSEL : lpc17xx_gpdma.h
  • PARAM_GPDMA_STAT : lpc17xx_gpdma.h
  • PARAM_GPDMA_STATCLR : lpc17xx_gpdma.h
  • PARAM_GPDMA_TRANSFERTYPE : lpc17xx_gpdma.h
  • PARAM_GPDMA_WIDTH : lpc17xx_gpdma.h
  • PARAM_GRP_ID : lpc17xx_can.h
  • PARAM_I2C_MONITOR_CFG : lpc17xx_i2c.h
  • PARAM_I2C_SLAVEADDR_CH : lpc17xx_i2c.h
  • PARAM_I2Cx : lpc17xx_i2c.h
  • PARAM_I2S_4PIN : lpc17xx_i2s.h
  • PARAM_I2S_BITRATE : lpc17xx_i2s.h
  • PARAM_I2S_CHANNEL : lpc17xx_i2s.h
  • PARAM_I2S_CLKSEL : lpc17xx_i2s.h
  • PARAM_I2S_DATA : lpc17xx_can.h
  • PARAM_I2S_DMA : lpc17xx_i2s.h
  • PARAM_I2S_DMA_DEPTH : lpc17xx_i2s.h
  • PARAM_I2S_HALFPERIOD : lpc17xx_i2s.h
  • PARAM_I2S_IRQ_LEVEL : lpc17xx_i2s.h
  • PARAM_I2S_MCLK : lpc17xx_i2s.h
  • PARAM_I2S_MUTE : lpc17xx_i2s.h
  • PARAM_I2S_RESET : lpc17xx_i2s.h
  • PARAM_I2S_STOP : lpc17xx_i2s.h
  • PARAM_I2S_TRX : lpc17xx_i2s.h
  • PARAM_I2S_WORDWIDTH : lpc17xx_i2s.h
  • PARAM_I2S_WS_SEL : lpc17xx_i2s.h
  • PARAM_I2Sx : lpc17xx_i2s.h
  • PARAM_ID_11 : lpc17xx_can.h
  • PARAM_ID_29 : lpc17xx_can.h
  • PARAM_ID_FORMAT : lpc17xx_can.h
  • PARAM_INT_EN_TYPE : lpc17xx_can.h
  • PARAM_MODE_TYPE : lpc17xx_can.h
  • PARAM_MSG_DISABLE : lpc17xx_can.h
  • PARAM_POSITION : lpc17xx_can.h
  • PARAM_PWM1_CAPTURE_CHANNEL : lpc17xx_pwm.h
  • PARAM_PWM1_CHANNEL : lpc17xx_pwm.h
  • PARAM_PWM1_EDGE_MODE_CHANNEL : lpc17xx_pwm.h
  • PARAM_PWM1_MATCH_CHANNEL : lpc17xx_pwm.h
  • PARAM_PWM_CHANNEL_EDGE : lpc17xx_pwm.h
  • PARAM_PWM_COUNTER_EDGE : lpc17xx_pwm.h
  • PARAM_PWM_COUNTER_INPUTSEL : lpc17xx_pwm.h
  • PARAM_PWM_INTSTAT : lpc17xx_pwm.h
  • PARAM_PWM_MATCH_UPDATE : lpc17xx_pwm.h
  • PARAM_PWM_TC_MODE : lpc17xx_pwm.h
  • PARAM_PWM_TIMER_PRESCALE : lpc17xx_pwm.h
  • PARAM_PWMx : lpc17xx_pwm.h
  • PARAM_QEI_CAPMODE : lpc17xx_qei.h
  • PARAM_QEI_COMPPOS_CH : lpc17xx_qei.h
  • PARAM_QEI_DIRINV : lpc17xx_qei.h
  • PARAM_QEI_INTFLAG : lpc17xx_qei.h
  • PARAM_QEI_INVINX : lpc17xx_qei.h
  • PARAM_QEI_RESET : lpc17xx_qei.h
  • PARAM_QEI_SIGNALMODE : lpc17xx_qei.h
  • PARAM_QEI_STATUS : lpc17xx_qei.h
  • PARAM_QEI_TIMERRELOAD : lpc17xx_qei.h
  • PARAM_QEIx : lpc17xx_qei.h
  • PARAM_RITx : lpc17xx_rit.h
  • PARAM_RTC_CALIB_DIR : lpc17xx_rtc.h
  • PARAM_RTC_GPREG_CH : lpc17xx_rtc.h
  • PARAM_RTC_INT : lpc17xx_rtc.h
  • PARAM_RTC_TIMETYPE : lpc17xx_rtc.h
  • PARAM_RTCx : lpc17xx_rtc.h
  • PARAM_SETSTATE : lpc_types.h
  • PARAM_SPI_CPHA : lpc17xx_spi.h
  • PARAM_SPI_CPOL : lpc17xx_spi.h
  • PARAM_SPI_DATA_ORDER : lpc17xx_spi.h
  • PARAM_SPI_DATABIT : lpc17xx_spi.h
  • PARAM_SPI_MODE : lpc17xx_spi.h
  • PARAM_SPI_STAT : lpc17xx_spi.h
  • PARAM_SPIx : lpc17xx_spi.h
  • PARAM_SSP_CPHA : lpc17xx_ssp.h
  • PARAM_SSP_CPOL : lpc17xx_ssp.h
  • PARAM_SSP_DATABIT : lpc17xx_ssp.h
  • PARAM_SSP_DMA : lpc17xx_ssp.h
  • PARAM_SSP_FRAME : lpc17xx_ssp.h
  • PARAM_SSP_INTCFG : lpc17xx_ssp.h
  • PARAM_SSP_INTCLR : lpc17xx_ssp.h
  • PARAM_SSP_INTSTAT : lpc17xx_ssp.h
  • PARAM_SSP_INTSTAT_RAW : lpc17xx_ssp.h
  • PARAM_SSP_MODE : lpc17xx_ssp.h
  • PARAM_SSP_STAT : lpc17xx_ssp.h
  • PARAM_SSPx : lpc17xx_ssp.h
  • PARAM_TIM_CAP_MODE_OPT : lpc17xx_timer.h
  • PARAM_TIM_COUNTER_INPUT_OPT : lpc17xx_timer.h
  • PARAM_TIM_EXTMATCH_OPT : lpc17xx_timer.h
  • PARAM_TIM_INT_TYPE : lpc17xx_timer.h
  • PARAM_TIM_MODE_OPT : lpc17xx_timer.h
  • PARAM_TIM_PRESCALE_OPT : lpc17xx_timer.h
  • PARAM_TIMx : lpc17xx_timer.h
  • PARAM_UART1_INTCFG : lpc17xx_uart.h
  • PARAM_UART1_MODEM : lpc17xx_uart.h
  • PARAM_UART1_MODEM_MODE : lpc17xx_uart.h
  • PARAM_UART1_MODEM_PIN : lpc17xx_uart.h
  • PARAM_UART1_RS485_CFG_DELAYVALUE : lpc17xx_uart.h
  • PARAM_UART1_RS485_CFG_MATCHADDRVALUE : lpc17xx_uart.h
  • PARAM_UART1_SIGNALSTATE : lpc17xx_uart.h
  • PARAM_UART_AUTOBAUD_INTSTAT : lpc17xx_uart.h
  • PARAM_UART_AUTOBAUD_MODE : lpc17xx_uart.h
  • PARAM_UART_DATABIT : lpc17xx_uart.h
  • PARAM_UART_FIFO_LEVEL : lpc17xx_uart.h
  • PARAM_UART_INTCFG : lpc17xx_uart.h
  • PARAM_UART_IrDA : lpc17xx_uart.h
  • PARAM_UART_IrDA_PULSEDIV : lpc17xx_uart.h
  • PARAM_UART_PARITY : lpc17xx_uart.h
  • PARAM_UART_RS485_DIRCTRL_PIN : lpc17xx_uart.h
  • PARAM_UART_STOPBIT : lpc17xx_uart.h
  • PARAM_UARTx : lpc17xx_uart.h
  • PARAM_WDT_CLK_OPT : lpc17xx_wdt.h
  • PARAM_WDT_MODE_OPT : lpc17xx_wdt.h
  • PBINT : demo.h
  • PCA8581_SLVADDR : pca8581_test.c
  • PCF8833_ST_ADDR_MODE : drv_glcd.h
  • PCF8833_ST_ALL_PIXELS_OFF : drv_glcd.h
  • PCF8833_ST_ALL_PIXELS_ON : drv_glcd.h
  • PCF8833_ST_BOOSTER_ON : drv_glcd.h
  • PCF8833_ST_DISPLAY_MODE : drv_glcd.h
  • PCF8833_ST_IDLE_MODE : drv_glcd.h
  • PCF8833_ST_INV_MODE : drv_glcd.h
  • PCF8833_ST_LINE_ADDR_ORD : drv_glcd.h
  • PCF8833_ST_NORM_MODE : drv_glcd.h
  • PCF8833_ST_PARTIAL_MODE : drv_glcd.h
  • PCF8833_ST_PIXEL_FORM : drv_glcd.h
  • PCF8833_ST_RGB_ORD : drv_glcd.h
  • PCF8833_ST_SLEEP_MODE : drv_glcd.h
  • PCF8833_ST_TEARING_MODE : drv_glcd.h
  • PCF8833_ST_V_SCROLL_MODE : drv_glcd.h
  • PCF8833_ST_X_ADDR_ODR : drv_glcd.h
  • PCF8833_ST_Y_ADDR_ODR : drv_glcd.h
  • PCLK_DAC_IN_MHZ : dac_sinewave_test.c , dac_wave_generate.c
  • PCLKSEL0_Val : system_LPC17xx.c
  • PCLKSEL1_Val : system_LPC17xx.c
  • PCONP_Val : system_LPC17xx.c
  • PD_LED_PIN : emactest.c
  • PERI_ADDRESS : bitband.c
  • PERI_BIT : bitband.c
  • PHASE_A_PIN : qei_test_velo.c
  • PHASE_B_PIN : qei_test_velo.c
  • PHY_TO : emac.h
  • PI : arm_math.h
  • PIN_CS : GLCD_SPI_LPC1700.c
  • PINSEL_FUNC_0 : lpc17xx_pinsel.h
  • PINSEL_FUNC_1 : lpc17xx_pinsel.h
  • PINSEL_FUNC_2 : lpc17xx_pinsel.h
  • PINSEL_FUNC_3 : lpc17xx_pinsel.h
  • PINSEL_I2C_Fast_Mode : lpc17xx_pinsel.h
  • PINSEL_I2C_Normal_Mode : lpc17xx_pinsel.h
  • PINSEL_I2CPADCFG_SCLDRV0 : lpc17xx_pinsel.h
  • PINSEL_I2CPADCFG_SCLI2C0 : lpc17xx_pinsel.h
  • PINSEL_I2CPADCFG_SDADRV0 : lpc17xx_pinsel.h
  • PINSEL_I2CPADCFG_SDAI2C0 : lpc17xx_pinsel.h
  • PINSEL_PIN_0 : lpc17xx_pinsel.h
  • PINSEL_PIN_1 : lpc17xx_pinsel.h
  • PINSEL_PIN_10 : lpc17xx_pinsel.h
  • PINSEL_PIN_11 : lpc17xx_pinsel.h
  • PINSEL_PIN_12 : lpc17xx_pinsel.h
  • PINSEL_PIN_13 : lpc17xx_pinsel.h
  • PINSEL_PIN_14 : lpc17xx_pinsel.h
  • PINSEL_PIN_15 : lpc17xx_pinsel.h
  • PINSEL_PIN_16 : lpc17xx_pinsel.h
  • PINSEL_PIN_17 : lpc17xx_pinsel.h
  • PINSEL_PIN_18 : lpc17xx_pinsel.h
  • PINSEL_PIN_19 : lpc17xx_pinsel.h
  • PINSEL_PIN_2 : lpc17xx_pinsel.h
  • PINSEL_PIN_20 : lpc17xx_pinsel.h
  • PINSEL_PIN_21 : lpc17xx_pinsel.h
  • PINSEL_PIN_22 : lpc17xx_pinsel.h
  • PINSEL_PIN_23 : lpc17xx_pinsel.h
  • PINSEL_PIN_24 : lpc17xx_pinsel.h
  • PINSEL_PIN_25 : lpc17xx_pinsel.h
  • PINSEL_PIN_26 : lpc17xx_pinsel.h
  • PINSEL_PIN_27 : lpc17xx_pinsel.h
  • PINSEL_PIN_28 : lpc17xx_pinsel.h
  • PINSEL_PIN_29 : lpc17xx_pinsel.h
  • PINSEL_PIN_3 : lpc17xx_pinsel.h
  • PINSEL_PIN_30 : lpc17xx_pinsel.h
  • PINSEL_PIN_31 : lpc17xx_pinsel.h
  • PINSEL_PIN_4 : lpc17xx_pinsel.h
  • PINSEL_PIN_5 : lpc17xx_pinsel.h
  • PINSEL_PIN_6 : lpc17xx_pinsel.h
  • PINSEL_PIN_7 : lpc17xx_pinsel.h
  • PINSEL_PIN_8 : lpc17xx_pinsel.h
  • PINSEL_PIN_9 : lpc17xx_pinsel.h
  • PINSEL_PINMODE_NORMAL : lpc17xx_pinsel.h
  • PINSEL_PINMODE_OPENDRAIN : lpc17xx_pinsel.h
  • PINSEL_PINMODE_PULLDOWN : lpc17xx_pinsel.h
  • PINSEL_PINMODE_PULLUP : lpc17xx_pinsel.h
  • PINSEL_PINMODE_TRISTATE : lpc17xx_pinsel.h
  • PINSEL_PORT_0 : lpc17xx_pinsel.h
  • PINSEL_PORT_1 : lpc17xx_pinsel.h
  • PINSEL_PORT_2 : lpc17xx_pinsel.h
  • PINSEL_PORT_3 : lpc17xx_pinsel.h
  • PINSEL_PORT_4 : lpc17xx_pinsel.h
  • PIXEL_CONV : drv_glcd.h
  • PKT_DV : usbreg.h
  • PKT_LNGTH_MASK : usbreg.h
  • PKT_RDY : usbreg.h
  • PLL0_SETUP : system_LPC17xx.c
  • PLL0CFG_Val : system_LPC17xx.c
  • PLL1_SETUP : system_LPC17xx.c
  • PLL1CFG_Val : system_LPC17xx.c
  • POLL_LED : adc_burst_test.c
  • PORT_NUM : serial.h
  • PRAM_I2S_FREQ : lpc17xx_i2s.h , lpc17xx_can.h
  • PRINT_BUF_LEN : printf-stdarg.c
  • PRIVILEGE_LED : privilege.c
  • PRIVILEGE_LEDPORT : privilege.c
  • PROT_ICMP : tcpip.h
  • PROT_TCP : tcpip.h
  • PROT_UDP : tcpip.h
  • PSOCK_BEGIN : psock.h
  • PSOCK_CLOSE : psock.h
  • PSOCK_CLOSE_EXIT : psock.h
  • PSOCK_DATALEN : psock.h
  • PSOCK_END : psock.h
  • PSOCK_EXIT : psock.h
  • PSOCK_GENERATOR_SEND : psock.h
  • PSOCK_INIT : psock.h
  • PSOCK_NEWDATA : psock.h
  • PSOCK_READBUF : psock.h
  • PSOCK_READTO : psock.h
  • PSOCK_SEND : psock.h
  • PSOCK_SEND_STR : psock.h
  • PSOCK_WAIT_THREAD : psock.h
  • PSOCK_WAIT_UNTIL : psock.h
  • PT_BEGIN : pt.h
  • PT_END : pt.h
  • PT_ENDED : pt.h
  • PT_EXIT : pt.h
  • PT_EXITED : pt.h
  • PT_INIT : pt.h
  • PT_RESTART : pt.h
  • PT_SCHEDULE : pt.h
  • PT_SPAWN : pt.h
  • PT_THREAD : pt.h
  • PT_WAIT_THREAD : pt.h
  • PT_WAIT_UNTIL : pt.h
  • PT_WAIT_WHILE : pt.h
  • PT_WAITING : pt.h
  • PT_YIELD : pt.h
  • PT_YIELD_UNTIL : pt.h
  • PT_YIELDED : pt.h
  • Purple : GLCD.h
  • putchar : printf-stdarg.c
  • PWM_CCR_BITMASK : lpc17xx_pwm.h
  • PWM_CCR_CAP_FALLING : lpc17xx_pwm.h
  • PWM_CCR_CAP_RISING : lpc17xx_pwm.h
  • PWM_CCR_INT_ON_CAP : lpc17xx_pwm.h
  • PWM_CTCR_BITMASK : lpc17xx_pwm.h
  • PWM_CTCR_MODE : lpc17xx_pwm.h
  • PWM_CTCR_SELECT_INPUT : lpc17xx_pwm.h
  • PWM_IR_BITMASK : lpc17xx_pwm.h
  • PWM_IR_PWMCAPn : lpc17xx_pwm.h
  • PWM_IR_PWMMRn : lpc17xx_pwm.h
  • PWM_LER_BITMASK : lpc17xx_pwm.h
  • PWM_LER_EN_MATCHn_LATCH : lpc17xx_pwm.h
  • PWM_MCR_BITMASK : lpc17xx_pwm.h
  • PWM_MCR_INT_ON_MATCH : lpc17xx_pwm.h
  • PWM_MCR_RESET_ON_MATCH : lpc17xx_pwm.h
  • PWM_MCR_STOP_ON_MATCH : lpc17xx_pwm.h
  • PWM_PCR_BITMASK : lpc17xx_pwm.h
  • PWM_PCR_PWMENAn : lpc17xx_pwm.h
  • PWM_PCR_PWMSELn : lpc17xx_pwm.h
  • PWM_TCR_BITMASK : lpc17xx_pwm.h
  • PWM_TCR_COUNTER_ENABLE : lpc17xx_pwm.h
  • PWM_TCR_COUNTER_RESET : lpc17xx_pwm.h
  • PWM_TCR_PWM_ENABLE : lpc17xx_pwm.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
  • y

- q -

  • QEI_CAPMODE_2X : lpc17xx_qei.h
  • QEI_CAPMODE_4X : lpc17xx_qei.h
  • QEI_COMPPOS_CH_0 : lpc17xx_qei.h
  • QEI_COMPPOS_CH_1 : lpc17xx_qei.h
  • QEI_COMPPOS_CH_2 : lpc17xx_qei.h
  • QEI_CON_BITMASK : lpc17xx_qei.h
  • QEI_CON_RESI : lpc17xx_qei.h
  • QEI_CON_RESP : lpc17xx_qei.h
  • QEI_CON_RESPI : lpc17xx_qei.h
  • QEI_CON_RESV : lpc17xx_qei.h
  • QEI_CONF_BITMASK : lpc17xx_qei.h
  • QEI_CONF_CAPMODE : lpc17xx_qei.h
  • QEI_CONF_DIRINV : lpc17xx_qei.h
  • QEI_CONF_INVINX : lpc17xx_qei.h
  • QEI_CONF_SIGMODE : lpc17xx_qei.h
  • QEI_DIRINV_CMPL : lpc17xx_qei.h
  • QEI_DIRINV_NONE : lpc17xx_qei.h
  • QEI_IECLR_BITMASK : lpc17xx_qei.h
  • QEI_IECLR_DIR_Int : lpc17xx_qei.h
  • QEI_IECLR_ENCLK_Int : lpc17xx_qei.h
  • QEI_IECLR_ERR_Int : lpc17xx_qei.h
  • QEI_IECLR_INX_Int : lpc17xx_qei.h
  • QEI_IECLR_POS0_Int : lpc17xx_qei.h
  • QEI_IECLR_POS0REV_Int : lpc17xx_qei.h
  • QEI_IECLR_POS1_Int : lpc17xx_qei.h
  • QEI_IECLR_POS1REV_Int : lpc17xx_qei.h
  • QEI_IECLR_POS2_Int : lpc17xx_qei.h
  • QEI_IECLR_POS2REV_Int : lpc17xx_qei.h
  • QEI_IECLR_REV_Int : lpc17xx_qei.h
  • QEI_IECLR_TIM_Int : lpc17xx_qei.h
  • QEI_IECLR_VELC_Int : lpc17xx_qei.h
  • QEI_IESET_BITMASK : lpc17xx_qei.h
  • QEI_IESET_DIR_Int : lpc17xx_qei.h
  • QEI_IESET_ENCLK_Int : lpc17xx_qei.h
  • QEI_IESET_ERR_Int : lpc17xx_qei.h
  • QEI_IESET_INX_Int : lpc17xx_qei.h
  • QEI_IESET_POS0_Int : lpc17xx_qei.h
  • QEI_IESET_POS0REV_Int : lpc17xx_qei.h
  • QEI_IESET_POS1_Int : lpc17xx_qei.h
  • QEI_IESET_POS1REV_Int : lpc17xx_qei.h
  • QEI_IESET_POS2_Int : lpc17xx_qei.h
  • QEI_IESET_POS2REV_Int : lpc17xx_qei.h
  • QEI_IESET_REV_Int : lpc17xx_qei.h
  • QEI_IESET_TIM_Int : lpc17xx_qei.h
  • QEI_IESET_VELC_Int : lpc17xx_qei.h
  • QEI_INTCLR_BITMASK : lpc17xx_qei.h
  • QEI_INTCLR_DIR_Int : lpc17xx_qei.h
  • QEI_INTCLR_ENCLK_Int : lpc17xx_qei.h
  • QEI_INTCLR_ERR_Int : lpc17xx_qei.h
  • QEI_INTCLR_INX_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS0_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS0REV_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS1_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS1REV_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS2_Int : lpc17xx_qei.h
  • QEI_INTCLR_POS2REV_Int : lpc17xx_qei.h
  • QEI_INTCLR_REV_Int : lpc17xx_qei.h
  • QEI_INTCLR_TIM_Int : lpc17xx_qei.h
  • QEI_INTCLR_VELC_Int : lpc17xx_qei.h
  • QEI_INTEN_BITMASK : lpc17xx_qei.h
  • QEI_INTEN_DIR_Int : lpc17xx_qei.h
  • QEI_INTEN_ENCLK_Int : lpc17xx_qei.h
  • QEI_INTEN_ERR_Int : lpc17xx_qei.h
  • QEI_INTEN_INX_Int : lpc17xx_qei.h
  • QEI_INTEN_POS0_Int : lpc17xx_qei.h
  • QEI_INTEN_POS0REV_Int : lpc17xx_qei.h
  • QEI_INTEN_POS1_Int : lpc17xx_qei.h
  • QEI_INTEN_POS1REV_Int : lpc17xx_qei.h
  • QEI_INTEN_POS2_Int : lpc17xx_qei.h
  • QEI_INTEN_POS2REV_Int : lpc17xx_qei.h
  • QEI_INTEN_REV_Int : lpc17xx_qei.h
  • QEI_INTEN_TIM_Int : lpc17xx_qei.h
  • QEI_INTEN_VELC_Int : lpc17xx_qei.h
  • QEI_INTFLAG_DIR_Int : lpc17xx_qei.h
  • QEI_INTFLAG_ENCLK_Int : lpc17xx_qei.h
  • QEI_INTFLAG_ERR_Int : lpc17xx_qei.h
  • QEI_INTFLAG_INX_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS0_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS0REV_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS1_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS1REV_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS2_Int : lpc17xx_qei.h
  • QEI_INTFLAG_POS2REV_Int : lpc17xx_qei.h
  • QEI_INTFLAG_REV_Int : lpc17xx_qei.h
  • QEI_INTFLAG_TIM_Int : lpc17xx_qei.h
  • QEI_INTFLAG_VELC_Int : lpc17xx_qei.h
  • QEI_INTSET_BITMASK : lpc17xx_qei.h
  • QEI_INTSET_DIR_Int : lpc17xx_qei.h
  • QEI_INTSET_ENCLK_Int : lpc17xx_qei.h
  • QEI_INTSET_ERR_Int : lpc17xx_qei.h
  • QEI_INTSET_INX_Int : lpc17xx_qei.h
  • QEI_INTSET_POS0_Int : lpc17xx_qei.h
  • QEI_INTSET_POS0REV_Int : lpc17xx_qei.h
  • QEI_INTSET_POS1_Int : lpc17xx_qei.h
  • QEI_INTSET_POS1REV_Int : lpc17xx_qei.h
  • QEI_INTSET_POS2_Int : lpc17xx_qei.h
  • QEI_INTSET_POS2REV_Int : lpc17xx_qei.h
  • QEI_INTSET_REV_Int : lpc17xx_qei.h
  • QEI_INTSET_TIM_Int : lpc17xx_qei.h
  • QEI_INTSET_VELC_Int : lpc17xx_qei.h
  • QEI_INTSTAT_BITMASK : lpc17xx_qei.h
  • QEI_INTSTAT_DIR_Int : lpc17xx_qei.h
  • QEI_INTSTAT_ENCLK_Int : lpc17xx_qei.h
  • QEI_INTSTAT_ERR_Int : lpc17xx_qei.h
  • QEI_INTSTAT_INX_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS0_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS0REV_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS1_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS1REV_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS2_Int : lpc17xx_qei.h
  • QEI_INTSTAT_POS2REV_Int : lpc17xx_qei.h
  • QEI_INTSTAT_REV_Int : lpc17xx_qei.h
  • QEI_INTSTAT_TIM_Int : lpc17xx_qei.h
  • QEI_INTSTAT_VELC_Int : lpc17xx_qei.h
  • QEI_INVINX_EN : lpc17xx_qei.h
  • QEI_INVINX_NONE : lpc17xx_qei.h
  • QEI_RESET_IDX : lpc17xx_qei.h
  • QEI_RESET_POS : lpc17xx_qei.h
  • QEI_RESET_POSOnIDX : lpc17xx_qei.h
  • QEI_RESET_VEL : lpc17xx_qei.h
  • QEI_SIGNALMODE_CLKDIR : lpc17xx_qei.h
  • QEI_SIGNALMODE_QUAD : lpc17xx_qei.h
  • QEI_STAT_BITMASK : lpc17xx_qei.h
  • QEI_STAT_DIR : lpc17xx_qei.h
  • QEI_STATUS_DIR : lpc17xx_qei.h
  • QEI_TIMERRELOAD_TICKVAL : lpc17xx_qei.h
  • QEI_TIMERRELOAD_USVAL : lpc17xx_qei.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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  • Functions
  • Variables
  • Typedefs
  • Enumerations
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- r -

  • R1_ADDR_ERR : spi_sdcard.c
  • R1_CRC_ERR : spi_sdcard.c
  • R1_ERASE : spi_sdcard.c
  • R1_ERASE_SEQ : spi_sdcard.c
  • R1_IDLE : spi_sdcard.c
  • R1_ILLEGAL : spi_sdcard.c
  • R1_NOERROR : spi_sdcard.c
  • R1_PARAM_ERR : spi_sdcard.c
  • R2_CTRL_ERR : spi_sdcard.c
  • R2_ECC_FAIL : spi_sdcard.c
  • R2_ERASE_PARAM : spi_sdcard.c
  • R2_ERROR : spi_sdcard.c
  • R2_LOCKED : spi_sdcard.c
  • R2_RANGE_ERR : spi_sdcard.c
  • R2_WP_FAILED : spi_sdcard.c
  • R2_WP_VIOL : spi_sdcard.c
  • RECEIVER_ALWAYS_EN : rs485_slave.c
  • Red : GLCD.h
  • REGS_ADDR : i2c_interrupt_test.c , i2c_polling_test.c
  • REQUEST_CLASS : usb.h
  • REQUEST_DEVICE_TO_HOST : usb.h
  • REQUEST_HOST_TO_DEVICE : usb.h
  • REQUEST_RESERVED : usb.h
  • REQUEST_STANDARD : usb.h
  • REQUEST_TO_DEVICE : usb.h
  • REQUEST_TO_ENDPOINT : usb.h
  • REQUEST_TO_INTERFACE : usb.h
  • REQUEST_TO_OTHER : usb.h
  • REQUEST_VENDOR : usb.h
  • RESOLV_ENTRIES : resolv.c
  • RETRY_TIMEOUT : tcpip.h
  • RIT_CTRL_ENBR : lpc17xx_rit.h
  • RIT_CTRL_ENCLR : lpc17xx_rit.h
  • RIT_CTRL_INTEN : lpc17xx_rit.h
  • RIT_CTRL_TEN : lpc17xx_rit.h
  • RMII : emac.h
  • RNE : GLCD_SPI_LPC1700.c
  • RTC_AMR_AMRDOM : lpc17xx_rtc.h
  • RTC_AMR_AMRDOW : lpc17xx_rtc.h
  • RTC_AMR_AMRDOY : lpc17xx_rtc.h
  • RTC_AMR_AMRHOUR : lpc17xx_rtc.h
  • RTC_AMR_AMRMIN : lpc17xx_rtc.h
  • RTC_AMR_AMRMON : lpc17xx_rtc.h
  • RTC_AMR_AMRSEC : lpc17xx_rtc.h
  • RTC_AMR_AMRYEAR : lpc17xx_rtc.h
  • RTC_AMR_BITMASK : lpc17xx_rtc.h
  • RTC_AUX_RTC_OSCF : lpc17xx_rtc.h
  • RTC_AUXEN_RTC_OSCFEN : lpc17xx_rtc.h
  • RTC_CALIB_DIR_BACKWARD : lpc17xx_rtc.h
  • RTC_CALIB_DIR_FORWARD : lpc17xx_rtc.h
  • RTC_CALIBRATION_CALVAL_MASK : lpc17xx_rtc.h
  • RTC_CALIBRATION_LIBDIR : lpc17xx_rtc.h
  • RTC_CALIBRATION_MAX : lpc17xx_rtc.h
  • RTC_CCR_BITMASK : lpc17xx_rtc.h
  • RTC_CCR_CCALEN : lpc17xx_rtc.h
  • RTC_CCR_CLKEN : lpc17xx_rtc.h
  • RTC_CCR_CTCRST : lpc17xx_rtc.h
  • RTC_CIIR_BITMASK : lpc17xx_rtc.h
  • RTC_CIIR_IMDOM : lpc17xx_rtc.h
  • RTC_CIIR_IMDOW : lpc17xx_rtc.h
  • RTC_CIIR_IMDOY : lpc17xx_rtc.h
  • RTC_CIIR_IMHOUR : lpc17xx_rtc.h
  • RTC_CIIR_IMMIN : lpc17xx_rtc.h
  • RTC_CIIR_IMMON : lpc17xx_rtc.h
  • RTC_CIIR_IMSEC : lpc17xx_rtc.h
  • RTC_CIIR_IMYEAR : lpc17xx_rtc.h
  • RTC_CLK : system_LPC17xx.c
  • RTC_CTIME0_DOW_MASK : lpc17xx_rtc.h
  • RTC_CTIME0_HOURS_MASK : lpc17xx_rtc.h
  • RTC_CTIME0_MINUTES_MASK : lpc17xx_rtc.h
  • RTC_CTIME0_SECONDS_MASK : lpc17xx_rtc.h
  • RTC_CTIME1_DOM_MASK : lpc17xx_rtc.h
  • RTC_CTIME1_MONTH_MASK : lpc17xx_rtc.h
  • RTC_CTIME1_YEAR_MASK : lpc17xx_rtc.h
  • RTC_CTIME2_DOY_MASK : lpc17xx_rtc.h
  • RTC_DAYOFMONTH_MAX : lpc17xx_rtc.h
  • RTC_DAYOFMONTH_MIN : lpc17xx_rtc.h
  • RTC_DAYOFWEEK_MAX : lpc17xx_rtc.h
  • RTC_DAYOFYEAR_MAX : lpc17xx_rtc.h
  • RTC_DAYOFYEAR_MIN : lpc17xx_rtc.h
  • RTC_DOM_MASK : lpc17xx_rtc.h
  • RTC_DOW_MASK : lpc17xx_rtc.h
  • RTC_DOY_MASK : lpc17xx_rtc.h
  • RTC_HOUR_MASK : lpc17xx_rtc.h
  • RTC_HOUR_MAX : lpc17xx_rtc.h
  • RTC_ILR_BITMASK : lpc17xx_rtc.h
  • RTC_IRL_RTCALF : lpc17xx_rtc.h
  • RTC_IRL_RTCCIF : lpc17xx_rtc.h
  • RTC_MIN_MASK : lpc17xx_rtc.h
  • RTC_MINUTE_MAX : lpc17xx_rtc.h
  • RTC_MONTH_MASK : lpc17xx_rtc.h
  • RTC_MONTH_MAX : lpc17xx_rtc.h
  • RTC_MONTH_MIN : lpc17xx_rtc.h
  • RTC_SEC_MASK : lpc17xx_rtc.h
  • RTC_SECOND_MAX : lpc17xx_rtc.h
  • RTC_YEAR_MASK : lpc17xx_rtc.h
  • RTC_YEAR_MAX : lpc17xx_rtc.h
  • RX_BUF_SIZE : uart_dma_test.c
  • RX_BUFFER_SIZE : can_test_two_kit.c
  • RX_LED_PIN : emactest.c
  • RxENDPKT_INT : usbreg.h
  • RXFIFO_EMPTY : i2s_mclk.c , i2s_irq_test.c
  • RxTCPBuffer : tcpip.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
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  • s
  • t
  • u
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  • x
  • y

- s -

  • S2 : vcomdemo.h
  • SC16IS740_IOCON_REG : spi_interrupt_test.c , sc16is750_int.c , sc16is750_polling.c , spi_polling_test.c
  • SC16IS740_IODIR_REG : sc16is750_int.c , sc16is750_polling.c , spi_interrupt_test.c , spi_polling_test.c
  • SC16IS740_IOSTATE_REG : spi_interrupt_test.c , spi_polling_test.c , sc16is750_int.c , sc16is750_polling.c
  • SC16IS740_RD_CMD : sc16is750_int.c , sc16is750_polling.c , spi_interrupt_test.c , spi_polling_test.c
  • SC16IS740_WR_CMD : spi_interrupt_test.c , spi_polling_test.c , sc16is750_int.c , sc16is750_polling.c
  • SCB : core_cm3.h
  • SCB_AIRCR_ENDIANESS_Msk : core_cm3.h
  • SCB_AIRCR_ENDIANESS_Pos : core_cm3.h
  • SCB_AIRCR_PRIGROUP_Msk : core_cm3.h
  • SCB_AIRCR_PRIGROUP_Pos : core_cm3.h
  • SCB_AIRCR_SYSRESETREQ_Msk : core_cm3.h
  • SCB_AIRCR_SYSRESETREQ_Pos : core_cm3.h
  • SCB_AIRCR_VECTCLRACTIVE_Msk : core_cm3.h
  • SCB_AIRCR_VECTCLRACTIVE_Pos : core_cm3.h
  • SCB_AIRCR_VECTKEY_Msk : core_cm3.h
  • SCB_AIRCR_VECTKEY_Pos : core_cm3.h
  • SCB_AIRCR_VECTKEYSTAT_Msk : core_cm3.h
  • SCB_AIRCR_VECTKEYSTAT_Pos : core_cm3.h
  • SCB_AIRCR_VECTRESET_Msk : core_cm3.h
  • SCB_AIRCR_VECTRESET_Pos : core_cm3.h
  • SCB_BASE : core_cm3.h
  • SCB_CCR_BFHFNMIGN_Msk : core_cm3.h
  • SCB_CCR_BFHFNMIGN_Pos : core_cm3.h
  • SCB_CCR_DIV_0_TRP_Msk : core_cm3.h
  • SCB_CCR_DIV_0_TRP_Pos : core_cm3.h
  • SCB_CCR_NONBASETHRDENA_Msk : core_cm3.h
  • SCB_CCR_NONBASETHRDENA_Pos : core_cm3.h
  • SCB_CCR_STKALIGN_Msk : core_cm3.h
  • SCB_CCR_STKALIGN_Pos : core_cm3.h
  • SCB_CCR_UNALIGN_TRP_Msk : core_cm3.h
  • SCB_CCR_UNALIGN_TRP_Pos : core_cm3.h
  • SCB_CCR_USERSETMPEND_Msk : core_cm3.h
  • SCB_CCR_USERSETMPEND_Pos : core_cm3.h
  • SCB_CFSR_BUSFAULTSR_Msk : core_cm3.h
  • SCB_CFSR_BUSFAULTSR_Pos : core_cm3.h
  • SCB_CFSR_MEMFAULTSR_Msk : core_cm3.h
  • SCB_CFSR_MEMFAULTSR_Pos : core_cm3.h
  • SCB_CFSR_USGFAULTSR_Msk : core_cm3.h
  • SCB_CFSR_USGFAULTSR_Pos : core_cm3.h
  • SCB_CPUID_ARCHITECTURE_Msk : core_cm3.h
  • SCB_CPUID_ARCHITECTURE_Pos : core_cm3.h
  • SCB_CPUID_IMPLEMENTER_Msk : core_cm3.h
  • SCB_CPUID_IMPLEMENTER_Pos : core_cm3.h
  • SCB_CPUID_PARTNO_Msk : core_cm3.h
  • SCB_CPUID_PARTNO_Pos : core_cm3.h
  • SCB_CPUID_REVISION_Msk : core_cm3.h
  • SCB_CPUID_REVISION_Pos : core_cm3.h
  • SCB_CPUID_VARIANT_Msk : core_cm3.h
  • SCB_CPUID_VARIANT_Pos : core_cm3.h
  • SCB_DFSR_BKPT_Msk : core_cm3.h
  • SCB_DFSR_BKPT_Pos : core_cm3.h
  • SCB_DFSR_DWTTRAP_Msk : core_cm3.h
  • SCB_DFSR_DWTTRAP_Pos : core_cm3.h
  • SCB_DFSR_EXTERNAL_Msk : core_cm3.h
  • SCB_DFSR_EXTERNAL_Pos : core_cm3.h
  • SCB_DFSR_HALTED_Msk : core_cm3.h
  • SCB_DFSR_HALTED_Pos : core_cm3.h
  • SCB_DFSR_VCATCH_Msk : core_cm3.h
  • SCB_DFSR_VCATCH_Pos : core_cm3.h
  • SCB_HFSR_DEBUGEVT_Msk : core_cm3.h
  • SCB_HFSR_DEBUGEVT_Pos : core_cm3.h
  • SCB_HFSR_FORCED_Msk : core_cm3.h
  • SCB_HFSR_FORCED_Pos : core_cm3.h
  • SCB_HFSR_VECTTBL_Msk : core_cm3.h
  • SCB_HFSR_VECTTBL_Pos : core_cm3.h
  • SCB_ICSR_ISRPENDING_Msk : core_cm3.h
  • SCB_ICSR_ISRPENDING_Pos : core_cm3.h
  • SCB_ICSR_ISRPREEMPT_Msk : core_cm3.h
  • SCB_ICSR_ISRPREEMPT_Pos : core_cm3.h
  • SCB_ICSR_NMIPENDSET_Msk : core_cm3.h
  • SCB_ICSR_NMIPENDSET_Pos : core_cm3.h
  • SCB_ICSR_PENDSTCLR_Msk : core_cm3.h
  • SCB_ICSR_PENDSTCLR_Pos : core_cm3.h
  • SCB_ICSR_PENDSTSET_Msk : core_cm3.h
  • SCB_ICSR_PENDSTSET_Pos : core_cm3.h
  • SCB_ICSR_PENDSVCLR_Msk : core_cm3.h
  • SCB_ICSR_PENDSVCLR_Pos : core_cm3.h
  • SCB_ICSR_PENDSVSET_Msk : core_cm3.h
  • SCB_ICSR_PENDSVSET_Pos : core_cm3.h
  • SCB_ICSR_RETTOBASE_Msk : core_cm3.h
  • SCB_ICSR_RETTOBASE_Pos : core_cm3.h
  • SCB_ICSR_VECTACTIVE_Msk : core_cm3.h
  • SCB_ICSR_VECTACTIVE_Pos : core_cm3.h
  • SCB_ICSR_VECTPENDING_Msk : core_cm3.h
  • SCB_ICSR_VECTPENDING_Pos : core_cm3.h
  • SCB_SCR_SEVONPEND_Msk : core_cm3.h
  • SCB_SCR_SEVONPEND_Pos : core_cm3.h
  • SCB_SCR_SLEEPDEEP_Msk : core_cm3.h
  • SCB_SCR_SLEEPDEEP_Pos : core_cm3.h
  • SCB_SCR_SLEEPONEXIT_Msk : core_cm3.h
  • SCB_SCR_SLEEPONEXIT_Pos : core_cm3.h
  • SCB_SHCSR_BUSFAULTACT_Msk : core_cm3.h
  • SCB_SHCSR_BUSFAULTACT_Pos : core_cm3.h
  • SCB_SHCSR_BUSFAULTENA_Msk : core_cm3.h
  • SCB_SHCSR_BUSFAULTENA_Pos : core_cm3.h
  • SCB_SHCSR_BUSFAULTPENDED_Msk : core_cm3.h
  • SCB_SHCSR_BUSFAULTPENDED_Pos : core_cm3.h
  • SCB_SHCSR_MEMFAULTACT_Msk : core_cm3.h
  • SCB_SHCSR_MEMFAULTACT_Pos : core_cm3.h
  • SCB_SHCSR_MEMFAULTENA_Msk : core_cm3.h
  • SCB_SHCSR_MEMFAULTENA_Pos : core_cm3.h
  • SCB_SHCSR_MEMFAULTPENDED_Msk : core_cm3.h
  • SCB_SHCSR_MEMFAULTPENDED_Pos : core_cm3.h
  • SCB_SHCSR_MONITORACT_Msk : core_cm3.h
  • SCB_SHCSR_MONITORACT_Pos : core_cm3.h
  • SCB_SHCSR_PENDSVACT_Msk : core_cm3.h
  • SCB_SHCSR_PENDSVACT_Pos : core_cm3.h
  • SCB_SHCSR_SVCALLACT_Msk : core_cm3.h
  • SCB_SHCSR_SVCALLACT_Pos : core_cm3.h
  • SCB_SHCSR_SVCALLPENDED_Msk : core_cm3.h
  • SCB_SHCSR_SVCALLPENDED_Pos : core_cm3.h
  • SCB_SHCSR_SYSTICKACT_Msk : core_cm3.h
  • SCB_SHCSR_SYSTICKACT_Pos : core_cm3.h
  • SCB_SHCSR_USGFAULTACT_Msk : core_cm3.h
  • SCB_SHCSR_USGFAULTACT_Pos : core_cm3.h
  • SCB_SHCSR_USGFAULTENA_Msk : core_cm3.h
  • SCB_SHCSR_USGFAULTENA_Pos : core_cm3.h
  • SCB_SHCSR_USGFAULTPENDED_Msk : core_cm3.h
  • SCB_SHCSR_USGFAULTPENDED_Pos : core_cm3.h
  • SCB_VTOR_TBLOFF_Msk : core_cm3.h
  • SCB_VTOR_TBLOFF_Pos : core_cm3.h
  • SCnSCB : core_cm3.h
  • SCnSCB_ACTLR_DISDEFWBUF_Msk : core_cm3.h
  • SCnSCB_ACTLR_DISDEFWBUF_Pos : core_cm3.h
  • SCnSCB_ACTLR_DISFOLD_Msk : core_cm3.h
  • SCnSCB_ACTLR_DISFOLD_Pos : core_cm3.h
  • SCnSCB_ACTLR_DISMCYCINT_Msk : core_cm3.h
  • SCnSCB_ACTLR_DISMCYCINT_Pos : core_cm3.h
  • SCnSCB_ICTR_INTLINESNUM_Msk : core_cm3.h
  • SCnSCB_ICTR_INTLINESNUM_Pos : core_cm3.h
  • SCS_BASE : core_cm3.h
  • SCS_Val : system_LPC17xx.c
  • SCSI_FORMAT_UNIT : msc.h
  • SCSI_INQUIRY : msc.h
  • SCSI_MEDIA_REMOVAL : msc.h
  • SCSI_MODE_SELECT10 : msc.h
  • SCSI_MODE_SELECT6 : msc.h
  • SCSI_MODE_SENSE10 : msc.h
  • SCSI_MODE_SENSE6 : msc.h
  • SCSI_READ10 : msc.h
  • SCSI_READ_CAPACITY : msc.h
  • SCSI_READ_FORMAT_CAPACITIES : msc.h
  • SCSI_REQUEST_SENSE : msc.h
  • SCSI_START_STOP_UNIT : msc.h
  • SCSI_TEST_UNIT_READY : msc.h
  • SCSI_VERIFY10 : msc.h
  • SCSI_WRITE10 : msc.h
  • SD_CMD_BLOCK_LENGTH : spi_sdcard.c
  • SD_DATA_BLOCK_LENGTH : spi_sdcard.c
  • SD_DETECT_PINNUM : spi_sdcard.c
  • SD_DETECT_PORTNUM : spi_sdcard.c
  • SD_WAIT_R1_TIMEOUT : spi_sdcard.c
  • SEND_FRAME1 : tcpip.h
  • SEND_FRAME2 : tcpip.h
  • SER_BUF_COUNT : serial.c
  • SER_BUF_EMPTY : serial.c
  • SER_BUF_FULL : serial.c
  • SER_BUF_MASK : serial.c
  • SER_BUF_RD : serial.c
  • SER_BUF_RESET : serial.c
  • SER_BUF_SIZE : serial.c
  • SER_BUF_WR : serial.c
  • SHELL_PROMPT : shell.c
  • SIGNAL_FREQ_IN_HZ : dac_wave_generate.c
  • SIGNAL_MODE : qei_test_velo.c
  • SINE_FREQ_IN_HZ : dac_sinewave_test.c
  • SLAVE_ADDR : rs485_slave.c
  • SLAVE_ADDR_A : rs485_master.c
  • SLAVE_ADDR_B : rs485_master.c
  • SLVADDR : i2c_interrupt_test.c , i2c_polling_test.c
  • SMTP_ERR_OK : smtp.h
  • SMTP_SEND : smtp.h
  • SNR_THRESHOLD : arm_convolution_example_f32.c , arm_linear_interp_example_f32.c , arm_matrix_example_f32.c
  • SNR_THRESHOLD_F32 : arm_fir_example_f32.c , arm_graphic_equalizer_example_q31.c
  • SOCK_ACTIVE : tcpip.h
  • SOCK_CONNECTED : tcpip.h
  • SOCK_DATA_AVAILABLE : tcpip.h
  • SOCK_ERR_ARP_TIMEOUT : tcpip.h
  • SOCK_ERR_CONN_RESET : tcpip.h
  • SOCK_ERR_ETHERNET : tcpip.h
  • SOCK_ERR_OK : tcpip.h
  • SOCK_ERR_REMOTE : tcpip.h
  • SOCK_ERR_TCP_TIMEOUT : tcpip.h
  • SOCK_ERROR_MASK : tcpip.h
  • SOCK_TX_BUF_RELEASED : tcpip.h
  • SPEED_10 : emac.h
  • SPEED_100 : emac.h
  • SPI_CPHA_FIRST : lpc17xx_spi.h
  • SPI_CPHA_SECOND : lpc17xx_spi.h
  • SPI_CPOL_HI : lpc17xx_spi.h
  • SPI_CPOL_LO : lpc17xx_spi.h
  • SPI_DATA : GLCD_SPI_LPC1700.c
  • SPI_DATA_LSB_FIRST : lpc17xx_spi.h
  • SPI_DATA_MSB_FIRST : lpc17xx_spi.h
  • SPI_DATABIT_10 : lpc17xx_spi.h
  • SPI_DATABIT_11 : lpc17xx_spi.h
  • SPI_DATABIT_12 : lpc17xx_spi.h
  • SPI_DATABIT_13 : lpc17xx_spi.h
  • SPI_DATABIT_14 : lpc17xx_spi.h
  • SPI_DATABIT_15 : lpc17xx_spi.h
  • SPI_DATABIT_16 : lpc17xx_spi.h
  • SPI_DATABIT_8 : lpc17xx_spi.h
  • SPI_DATABIT_9 : lpc17xx_spi.h
  • SPI_DATABIT_SIZE : spi_loopback_test.c , spi_master.c , spi_slave.c
  • SPI_INDEX : GLCD_SPI_LPC1700.c
  • SPI_MASTER_MODE : lpc17xx_spi.h
  • SPI_RD : GLCD_SPI_LPC1700.c
  • SPI_SLAVE_MODE : lpc17xx_spi.h
  • SPI_SPCCR_BITMASK : lpc17xx_spi.h
  • SPI_SPCCR_COUNTER : lpc17xx_spi.h
  • SPI_SPCR_BIT_EN : lpc17xx_spi.h
  • SPI_SPCR_BITMASK : lpc17xx_spi.h
  • SPI_SPCR_BITS : lpc17xx_spi.h
  • SPI_SPCR_CPHA_SECOND : lpc17xx_spi.h
  • SPI_SPCR_CPOL_LOW : lpc17xx_spi.h
  • SPI_SPCR_LSBF : lpc17xx_spi.h
  • SPI_SPCR_MSTR : lpc17xx_spi.h
  • SPI_SPCR_SPIE : lpc17xx_spi.h
  • SPI_SPDR_BITMASK : lpc17xx_spi.h
  • SPI_SPDR_HI_MASK : lpc17xx_spi.h
  • SPI_SPDR_LO_MASK : lpc17xx_spi.h
  • SPI_SPINT_BITMASK : lpc17xx_spi.h
  • SPI_SPINT_INTFLAG : lpc17xx_spi.h
  • SPI_SPSR_ABRT : lpc17xx_spi.h
  • SPI_SPSR_BITMASK : lpc17xx_spi.h
  • SPI_SPSR_MODF : lpc17xx_spi.h
  • SPI_SPSR_ROVR : lpc17xx_spi.h
  • SPI_SPSR_SPIF : lpc17xx_spi.h
  • SPI_SPSR_WCOL : lpc17xx_spi.h
  • SPI_SPTCR_BITMASK : lpc17xx_spi.h
  • SPI_SPTCR_TEST_MASK : lpc17xx_spi.h
  • SPI_SPTSR_ABRT : lpc17xx_spi.h
  • SPI_SPTSR_MASKBIT : lpc17xx_spi.h
  • SPI_SPTSR_MODF : lpc17xx_spi.h
  • SPI_SPTSR_ROVR : lpc17xx_spi.h
  • SPI_SPTSR_SPIF : lpc17xx_spi.h
  • SPI_SPTSR_WCOL : lpc17xx_spi.h
  • SPI_START : GLCD_SPI_LPC1700.c
  • SPI_STAT_ABRT : lpc17xx_spi.h
  • SPI_STAT_DONE : lpc17xx_spi.h
  • SPI_STAT_ERROR : lpc17xx_spi.h
  • SPI_STAT_MODF : lpc17xx_spi.h
  • SPI_STAT_ROVR : lpc17xx_spi.h
  • SPI_STAT_SPIF : lpc17xx_spi.h
  • SPI_STAT_WCOL : lpc17xx_spi.h
  • SPI_WR : GLCD_SPI_LPC1700.c
  • SSP_CPHA_FIRST : lpc17xx_ssp.h
  • SSP_CPHA_SECOND : lpc17xx_ssp.h
  • SSP_CPOL_HI : lpc17xx_ssp.h
  • SSP_CPOL_LO : lpc17xx_ssp.h
  • SSP_CPSR_BITMASK : lpc17xx_ssp.h
  • SSP_CPSR_CPDVSR : lpc17xx_ssp.h
  • SSP_CR0_BITMASK : lpc17xx_ssp.h
  • SSP_CR0_CPHA_SECOND : lpc17xx_ssp.h
  • SSP_CR0_CPOL_HI : lpc17xx_ssp.h
  • SSP_CR0_DSS : lpc17xx_ssp.h
  • SSP_CR0_FRF_MICROWIRE : lpc17xx_ssp.h
  • SSP_CR0_FRF_SPI : lpc17xx_ssp.h
  • SSP_CR0_FRF_TI : lpc17xx_ssp.h
  • SSP_CR0_SCR : lpc17xx_ssp.h
  • SSP_CR1_BITMASK : lpc17xx_ssp.h
  • SSP_CR1_LBM_EN : lpc17xx_ssp.h
  • SSP_CR1_SLAVE_EN : lpc17xx_ssp.h
  • SSP_CR1_SO_DISABLE : lpc17xx_ssp.h
  • SSP_CR1_SSP_EN : lpc17xx_ssp.h
  • SSP_DATABIT_10 : lpc17xx_ssp.h
  • SSP_DATABIT_11 : lpc17xx_ssp.h
  • SSP_DATABIT_12 : lpc17xx_ssp.h
  • SSP_DATABIT_13 : lpc17xx_ssp.h
  • SSP_DATABIT_14 : lpc17xx_ssp.h
  • SSP_DATABIT_15 : lpc17xx_ssp.h
  • SSP_DATABIT_16 : lpc17xx_ssp.h
  • SSP_DATABIT_4 : lpc17xx_ssp.h
  • SSP_DATABIT_5 : lpc17xx_ssp.h
  • SSP_DATABIT_6 : lpc17xx_ssp.h
  • SSP_DATABIT_7 : lpc17xx_ssp.h
  • SSP_DATABIT_8 : lpc17xx_ssp.h
  • SSP_DATABIT_9 : lpc17xx_ssp.h
  • SSP_DMA_BITMASK : lpc17xx_ssp.h
  • SSP_DMA_RX : lpc17xx_ssp.h
  • SSP_DMA_RXDMA_EN : lpc17xx_ssp.h
  • SSP_DMA_TX : lpc17xx_ssp.h
  • SSP_DMA_TXDMA_EN : lpc17xx_ssp.h
  • SSP_DR_BITMASK : lpc17xx_ssp.h
  • SSP_FIFO_SIZE : glcd_ll.h
  • SSP_FRAME_MICROWIRE : lpc17xx_ssp.h
  • SSP_FRAME_SPI : lpc17xx_ssp.h
  • SSP_FRAME_TI : lpc17xx_ssp.h
  • SSP_ICR_BITMASK : lpc17xx_ssp.h
  • SSP_ICR_ROR : lpc17xx_ssp.h
  • SSP_ICR_RT : lpc17xx_ssp.h
  • SSP_IMSC_BITMASK : lpc17xx_ssp.h
  • SSP_IMSC_ROR : lpc17xx_ssp.h
  • SSP_IMSC_RT : lpc17xx_ssp.h
  • SSP_IMSC_RX : lpc17xx_ssp.h
  • SSP_IMSC_TX : lpc17xx_ssp.h
  • SSP_INTCFG_ROR : lpc17xx_ssp.h
  • SSP_INTCFG_RT : lpc17xx_ssp.h
  • SSP_INTCFG_RX : lpc17xx_ssp.h
  • SSP_INTCFG_TX : lpc17xx_ssp.h
  • SSP_INTCLR_ROR : lpc17xx_ssp.h
  • SSP_INTCLR_RT : lpc17xx_ssp.h
  • SSP_INTSTAT_RAW_ROR : lpc17xx_ssp.h
  • SSP_INTSTAT_RAW_RT : lpc17xx_ssp.h
  • SSP_INTSTAT_RAW_RX : lpc17xx_ssp.h
  • SSP_INTSTAT_RAW_TX : lpc17xx_ssp.h
  • SSP_INTSTAT_ROR : lpc17xx_ssp.h
  • SSP_INTSTAT_RT : lpc17xx_ssp.h
  • SSP_INTSTAT_RX : lpc17xx_ssp.h
  • SSP_INTSTAT_TX : lpc17xx_ssp.h
  • SSP_MASTER_MODE : lpc17xx_ssp.h
  • SSP_MIS_BITMASK : lpc17xx_ssp.h
  • SSP_MIS_ROR : lpc17xx_ssp.h
  • SSP_MIS_RT : lpc17xx_ssp.h
  • SSP_MIS_RX : lpc17xx_ssp.h
  • SSP_MIS_TX : lpc17xx_ssp.h
  • SSP_RIS_BITMASK : lpc17xx_ssp.h
  • SSP_RIS_ROR : lpc17xx_ssp.h
  • SSP_RIS_RT : lpc17xx_ssp.h
  • SSP_RIS_RX : lpc17xx_ssp.h
  • SSP_RIS_TX : lpc17xx_ssp.h
  • SSP_SLAVE_MODE : lpc17xx_ssp.h
  • SSP_SR_BITMASK : lpc17xx_ssp.h
  • SSP_SR_BSY : lpc17xx_ssp.h
  • SSP_SR_RFF : lpc17xx_ssp.h
  • SSP_SR_RNE : lpc17xx_ssp.h
  • SSP_SR_TFE : lpc17xx_ssp.h
  • SSP_SR_TNF : lpc17xx_ssp.h
  • SSP_STAT_BUSY : lpc17xx_ssp.h
  • SSP_STAT_DONE : lpc17xx_ssp.h
  • SSP_STAT_ERROR : lpc17xx_ssp.h
  • SSP_STAT_RXFIFO_FULL : lpc17xx_ssp.h
  • SSP_STAT_RXFIFO_NOTEMPTY : lpc17xx_ssp.h
  • SSP_STAT_TXFIFO_EMPTY : lpc17xx_ssp.h
  • SSP_STAT_TXFIFO_NOTFULL : lpc17xx_ssp.h
  • SSPDEV_M : ti_test.c , microwire_test.c
  • SSPDEV_S : ti_test.c , microwire_test.c
  • ST_CALIB_NOREF : lpc17xx_systick.h
  • ST_CALIB_SKEW : lpc17xx_systick.h
  • ST_CALIB_TENMS : lpc17xx_systick.h
  • ST_CTRL_CLKSOURCE : lpc17xx_systick.h
  • ST_CTRL_COUNTFLAG : lpc17xx_systick.h
  • ST_CTRL_ENABLE : lpc17xx_systick.h
  • ST_CTRL_TICKINT : lpc17xx_systick.h
  • ST_RELOAD_CURRENT : lpc17xx_systick.h
  • ST_RELOAD_RELOAD : lpc17xx_systick.h
  • STATE_ACKED : psock.c
  • STATE_ASKING : resolv.c
  • STATE_BLOCKED_CLOSE : psock.c
  • STATE_BLOCKED_NEWDATA : psock.c
  • STATE_BLOCKED_SEND : psock.c
  • STATE_CLOSE : telnetd.c
  • STATE_CONFIG_RECEIVED : dhcpc.c
  • STATE_DATA_SENT : psock.c
  • STATE_DO : telnetd.c
  • STATE_DONE : resolv.c
  • STATE_DONT : telnetd.c
  • STATE_ERROR : resolv.c
  • STATE_IAC : telnetd.c
  • STATE_INITIAL : dhcpc.c
  • STATE_NEW : resolv.c
  • STATE_NONE : psock.c
  • STATE_NORMAL : telnetd.c
  • STATE_OFFER_RECEIVED : dhcpc.c
  • STATE_OUTPUT : httpd.c
  • STATE_READ : psock.c
  • STATE_SENDING : dhcpc.c
  • STATE_UNUSED : resolv.c
  • STATE_WAITING : httpd.c
  • STATE_WILL : telnetd.c
  • STATE_WONT : telnetd.c
  • STATIC : lpc_types.h
  • SUBMASK_1 : tcpip.h
  • SUBMASK_2 : tcpip.h
  • SUBMASK_3 : tcpip.h
  • SUBMASK_4 : tcpip.h
  • SWAPB : tcpip.h
  • SYS_ERR_INT : usbreg.h
  • SysTick : core_cm3.h
  • SysTick_BASE : core_cm3.h
  • SysTick_CALIB_NOREF_Msk : core_cm3.h
  • SysTick_CALIB_NOREF_Pos : core_cm3.h
  • SysTick_CALIB_SKEW_Msk : core_cm3.h
  • SysTick_CALIB_SKEW_Pos : core_cm3.h
  • SysTick_CALIB_TENMS_Msk : core_cm3.h
  • SysTick_CALIB_TENMS_Pos : core_cm3.h
  • SysTick_CTRL_CLKSOURCE_Msk : core_cm3.h
  • SysTick_CTRL_CLKSOURCE_Pos : core_cm3.h
  • SysTick_CTRL_COUNTFLAG_Msk : core_cm3.h
  • SysTick_CTRL_COUNTFLAG_Pos : core_cm3.h
  • SysTick_CTRL_ENABLE_Msk : core_cm3.h
  • SysTick_CTRL_ENABLE_Pos : core_cm3.h
  • SysTick_CTRL_TICKINT_Msk : core_cm3.h
  • SysTick_CTRL_TICKINT_Pos : core_cm3.h
  • SysTick_LOAD_RELOAD_Msk : core_cm3.h
  • SysTick_LOAD_RELOAD_Pos : core_cm3.h
  • SYSTICK_PERIOD : tcpip.c
  • SysTick_VAL_CURRENT_Msk : core_cm3.h
  • SysTick_VAL_CURRENT_Pos : core_cm3.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- t -

  • TABLE_SIZE : arm_math.h
  • TABLE_SPACING_Q15 : arm_math.h
  • TABLE_SPACING_Q31 : arm_math.h
  • TCP_ACK : uip.c
  • TCP_ACKNR_OFS : tcpip.h
  • TCP_ACTIVE_OPEN : tcpip.h
  • TCP_CHKSUM_OFS : tcpip.h
  • TCP_CLOSE_REQUESTED : tcpip.h
  • TCP_CODE_ACK : tcpip.h
  • TCP_CODE_FIN : tcpip.h
  • TCP_CODE_PSH : tcpip.h
  • TCP_CODE_RST : tcpip.h
  • TCP_CODE_SYN : tcpip.h
  • TCP_CODE_URG : tcpip.h
  • TCP_CTL : uip.c
  • TCP_DATA_CODE_OFS : tcpip.h
  • TCP_DATA_OFS : tcpip.h
  • TCP_DESTPORT_OFS : tcpip.h
  • TCP_FIN : uip.c
  • TCP_HEADER_SIZE : tcpip.h
  • TCP_OPT_END : uip.c
  • TCP_OPT_MSS : tcpip.h , uip.c
  • TCP_OPT_MSS_LEN : uip.c
  • TCP_OPT_MSS_SIZE : tcpip.h
  • TCP_OPT_NOOP : uip.c
  • TCP_PORT_CHARGEN : tcpip.h
  • TCP_PORT_DAYTIME : tcpip.h
  • TCP_PORT_DISCARD : tcpip.h
  • TCP_PORT_ECHO : tcpip.h
  • TCP_PORT_HTTP : tcpip.h
  • TCP_PORT_QOTD : tcpip.h
  • TCP_PSH : uip.c
  • TCP_RST : uip.c
  • TCP_RX_BUF : tcpip.h
  • TCP_SEQNR_OFS : tcpip.h
  • TCP_SRCPORT_OFS : tcpip.h
  • TCP_SYN : uip.c
  • TCP_TIMER_RUNNING : tcpip.h
  • TCP_TX_BUF : tcpip.h
  • TCP_URG : uip.c
  • TCP_URGENT_OFS : tcpip.h
  • TCP_WINDOW_OFS : tcpip.h
  • TELNET_DO : telnetd.c
  • TELNET_DONT : telnetd.c
  • TELNET_IAC : telnetd.c
  • TELNET_WILL : telnetd.c
  • TELNET_WONT : telnetd.c
  • TELNETD_CONF_LINELEN : telnetd.h
  • TELNETD_CONF_NUMLINES : telnetd.h
  • TEST_IRDA : uart_irda_receive.c , uart_irda_transmit.c
  • TEST_LENGTH_SAMPLES : arm_class_marks_example_f32.c , arm_fft_bin_example_f32.c , arm_fir_example_f32.c , arm_linear_interp_example_f32.c , arm_signal_converge_example_f32.c
  • TEST_UART : uart_hw_flow_control.c , uart_irda_receive.c , uart_irda_transmit.c , uart_polling_test.c
  • TESTLENGTH : arm_graphic_equalizer_example_q31.c
  • TEXT_BEL1_FUNC : drv_glcd.h
  • TEXT_DEF_TAB_SIZE : drv_glcd.h
  • TFE : GLCD_SPI_LPC1700.c
  • THREAD_PRIVILEDGED_MASK : privilege.c
  • THREAD_PRIVILEGED : privilege.c
  • THREAD_UNPRIVILEGED : privilege.c
  • TIM_CAP_FALLING : lpc17xx_timer.h
  • TIM_CAP_INT : lpc17xx_timer.h
  • TIM_CAP_RISING : lpc17xx_timer.h
  • TIM_CCR_CHANNEL_MASKBIT : lpc17xx_timer.h
  • TIM_CCR_MASKBIT : lpc17xx_timer.h
  • TIM_COUNTER_MODE : lpc17xx_timer.h
  • TIM_CTCR_INPUT_MASK : lpc17xx_timer.h
  • TIM_CTCR_MASKBIT : lpc17xx_timer.h
  • TIM_CTCR_MODE_MASK : lpc17xx_timer.h
  • TIM_EDGE_MASK : lpc17xx_timer.h
  • TIM_EM : lpc17xx_timer.h
  • TIM_EM_HIGH : lpc17xx_timer.h
  • TIM_EM_LOW : lpc17xx_timer.h
  • TIM_EM_MASK : lpc17xx_timer.h
  • TIM_EM_NOTHING : lpc17xx_timer.h
  • TIM_EM_SET : lpc17xx_timer.h
  • TIM_EM_TOGGLE : lpc17xx_timer.h
  • TIM_EMR_MASKBIT : lpc17xx_timer.h
  • TIM_ENABLE : lpc17xx_timer.h
  • TIM_INT_ON_CAP : lpc17xx_timer.h
  • TIM_INT_ON_MATCH : lpc17xx_timer.h
  • TIM_IR_CLR : lpc17xx_timer.h
  • TIM_MATCH_INT : lpc17xx_timer.h
  • TIM_MCR_CHANNEL_MASKBIT : lpc17xx_timer.h
  • TIM_MCR_MASKBIT : lpc17xx_timer.h
  • TIM_RESET : lpc17xx_timer.h
  • TIM_RESET_ON_MATCH : lpc17xx_timer.h
  • TIM_STOP_ON_MATCH : lpc17xx_timer.h
  • TIM_TCR_MASKBIT : lpc17xx_timer.h
  • TIME_INTERVAL : rit_interrupt.c
  • TIME_OUT : lcdtest.c , pwm_match_int.c
  • TIMER0_TICK_PER_SEC : lcdtest.c
  • TIMER_TYPE_RETRY : tcpip.h
  • TX_BUFFER_SIZE : can_test_two_kit.c
  • TX_LED_PIN : emactest.c
  • TX_ONLY : emactest.c
  • TX_PACKET_SIZE : emactest.c
  • TxENDPKT_INT : usbreg.h
  • TXFIFO_FULL : i2s_irq_test.c , i2s_mclk.c
  • TxFrame1 : tcpip.h
  • TxFrame2 : tcpip.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- u -

  • UART1_IER_BITMASK : lpc17xx_uart.h
  • UART1_IER_CTSINT_EN : lpc17xx_uart.h
  • UART1_IER_MSINT_EN : lpc17xx_uart.h
  • UART1_IIR_INTID_MODEM : lpc17xx_uart.h
  • UART1_MCR_AUTO_CTS_EN : lpc17xx_uart.h
  • UART1_MCR_AUTO_RTS_EN : lpc17xx_uart.h
  • UART1_MCR_BITMASK : lpc17xx_uart.h
  • UART1_MCR_DTR_CTRL : lpc17xx_uart.h
  • UART1_MCR_LOOPB_EN : lpc17xx_uart.h
  • UART1_MCR_RTS_CTRL : lpc17xx_uart.h
  • UART1_MSR_BITMASK : lpc17xx_uart.h
  • UART1_MSR_CTS : lpc17xx_uart.h
  • UART1_MSR_DCD : lpc17xx_uart.h
  • UART1_MSR_DELTA_CTS : lpc17xx_uart.h
  • UART1_MSR_DELTA_DCD : lpc17xx_uart.h
  • UART1_MSR_DELTA_DSR : lpc17xx_uart.h
  • UART1_MSR_DSR : lpc17xx_uart.h
  • UART1_MSR_LO2HI_RI : lpc17xx_uart.h
  • UART1_MSR_RI : lpc17xx_uart.h
  • UART1_RS485ADRMATCH_BITMASK : lpc17xx_uart.h
  • UART1_RS485CTRL_AADEN : lpc17xx_uart.h
  • UART1_RS485CTRL_BITMASK : lpc17xx_uart.h
  • UART1_RS485CTRL_DCTRL_EN : lpc17xx_uart.h
  • UART1_RS485CTRL_NMM_EN : lpc17xx_uart.h
  • UART1_RS485CTRL_OINV_1 : lpc17xx_uart.h
  • UART1_RS485CTRL_RX_DIS : lpc17xx_uart.h
  • UART1_RS485CTRL_SEL_DTR : lpc17xx_uart.h
  • UART1_RS485DLY_BITMASK : lpc17xx_uart.h
  • UART_ACCEPTED_BAUDRATE_ERROR : lpc17xx_uart.h
  • UART_ACR_ABEOINT_CLR : lpc17xx_uart.h
  • UART_ACR_ABTOINT_CLR : lpc17xx_uart.h
  • UART_ACR_AUTO_RESTART : lpc17xx_uart.h
  • UART_ACR_BITMASK : lpc17xx_uart.h
  • UART_ACR_MODE : lpc17xx_uart.h
  • UART_ACR_START : lpc17xx_uart.h
  • UART_BLOCKING_TIMEOUT : lpc17xx_uart.h
  • UART_DLL_MASKBIT : lpc17xx_uart.h
  • UART_DLM_MASKBIT : lpc17xx_uart.h
  • UART_FCR_BITMASK : lpc17xx_uart.h
  • UART_FCR_DMAMODE_SEL : lpc17xx_uart.h
  • UART_FCR_FIFO_EN : lpc17xx_uart.h
  • UART_FCR_RX_RS : lpc17xx_uart.h
  • UART_FCR_TRG_LEV0 : lpc17xx_uart.h
  • UART_FCR_TRG_LEV1 : lpc17xx_uart.h
  • UART_FCR_TRG_LEV2 : lpc17xx_uart.h
  • UART_FCR_TRG_LEV3 : lpc17xx_uart.h
  • UART_FCR_TX_RS : lpc17xx_uart.h
  • UART_FDR_BITMASK : lpc17xx_uart.h
  • UART_FDR_DIVADDVAL : lpc17xx_uart.h
  • UART_FDR_MULVAL : lpc17xx_uart.h
  • UART_FIFOLVL_BITMASK : lpc17xx_uart.h
  • UART_FIFOLVL_RXFIFOLVL : lpc17xx_uart.h
  • UART_FIFOLVL_TXFIFOLVL : lpc17xx_uart.h
  • UART_ICR_BITMASK : lpc17xx_uart.h
  • UART_ICR_FIXPULSE_EN : lpc17xx_uart.h
  • UART_ICR_IRDAEN : lpc17xx_uart.h
  • UART_ICR_IRDAINV : lpc17xx_uart.h
  • UART_ICR_PULSEDIV : lpc17xx_uart.h
  • UART_IER_ABEOINT_EN : lpc17xx_uart.h
  • UART_IER_ABTOINT_EN : lpc17xx_uart.h
  • UART_IER_BITMASK : lpc17xx_uart.h
  • UART_IER_RBRINT_EN : lpc17xx_uart.h
  • UART_IER_RLSINT_EN : lpc17xx_uart.h
  • UART_IER_THREINT_EN : lpc17xx_uart.h
  • UART_IIR_ABEO_INT : lpc17xx_uart.h
  • UART_IIR_ABTO_INT : lpc17xx_uart.h
  • UART_IIR_BITMASK : lpc17xx_uart.h
  • UART_IIR_FIFO_EN : lpc17xx_uart.h
  • UART_IIR_INTID_CTI : lpc17xx_uart.h
  • UART_IIR_INTID_MASK : lpc17xx_uart.h
  • UART_IIR_INTID_RDA : lpc17xx_uart.h
  • UART_IIR_INTID_RLS : lpc17xx_uart.h
  • UART_IIR_INTID_THRE : lpc17xx_uart.h
  • UART_IIR_INTSTAT_PEND : lpc17xx_uart.h
  • UART_LCR_BITMASK : lpc17xx_uart.h
  • UART_LCR_BREAK_EN : lpc17xx_uart.h
  • UART_LCR_DLAB_EN : lpc17xx_uart.h
  • UART_LCR_PARITY_EN : lpc17xx_uart.h
  • UART_LCR_PARITY_EVEN : lpc17xx_uart.h
  • UART_LCR_PARITY_F_0 : lpc17xx_uart.h
  • UART_LCR_PARITY_F_1 : lpc17xx_uart.h
  • UART_LCR_PARITY_ODD : lpc17xx_uart.h
  • UART_LCR_STOPBIT_SEL : lpc17xx_uart.h
  • UART_LCR_WLEN5 : lpc17xx_uart.h
  • UART_LCR_WLEN6 : lpc17xx_uart.h
  • UART_LCR_WLEN7 : lpc17xx_uart.h
  • UART_LCR_WLEN8 : lpc17xx_uart.h
  • UART_LOAD_DLL : lpc17xx_uart.h
  • UART_LOAD_DLM : lpc17xx_uart.h
  • UART_LSR_BI : lpc17xx_uart.h
  • UART_LSR_BITMASK : lpc17xx_uart.h
  • UART_LSR_FE : lpc17xx_uart.h
  • UART_LSR_OE : lpc17xx_uart.h
  • UART_LSR_PE : lpc17xx_uart.h
  • UART_LSR_RDR : lpc17xx_uart.h
  • UART_LSR_RXFE : lpc17xx_uart.h
  • UART_LSR_TEMT : lpc17xx_uart.h
  • UART_LSR_THRE : lpc17xx_uart.h
  • UART_PORT : uart_irda_receive.c , uart_irda_transmit.c , uart_polling_test.c
  • UART_RBR_MASKBIT : lpc17xx_uart.h
  • UART_RING_BUFSIZE : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • UART_SCR_BIMASK : lpc17xx_uart.h
  • UART_TER_BITMASK : lpc17xx_uart.h
  • UART_TER_TXEN : lpc17xx_uart.h
  • UART_THR_MASKBIT : lpc17xx_uart.h
  • UART_TX_FIFO_SIZE : lpc17xx_uart.h
  • UDPBUF : uip.c
  • uip_abort : uip.h
  • UIP_ABORT : uip.h
  • uip_aborted : uip.h
  • UIP_ACKDATA : uip.h
  • uip_acked : uip.h
  • UIP_ACTIVE_OPEN : uipopt.h
  • UIP_APPCALL : hello-world.h , smtp.h , telnetd.h , webclient.h , webserver.h
  • UIP_APPDATA_SIZE : uip.h
  • UIP_ARP_MAXAGE : uipopt.h
  • UIP_ARPTAB_SIZE : uipopt.h
  • UIP_BIG_ENDIAN : uipopt.h
  • UIP_BROADCAST : uipopt.h
  • UIP_BUFSIZE : uipopt.h
  • UIP_BYTE_ORDER : uipopt.h
  • uip_close : uip.h
  • UIP_CLOSE : uip.h
  • UIP_CLOSED : uip.h
  • uip_closed : uip.h
  • UIP_CLOSING : uip.h
  • UIP_CONF_BUFFER_SIZE : uip-conf.h
  • UIP_CONF_BYTE_ORDER : uip-conf.h
  • UIP_CONF_LOGGING : uip-conf.h
  • UIP_CONF_MAX_CONNECTIONS : uip-conf.h
  • UIP_CONF_MAX_LISTENPORTS : uip-conf.h
  • UIP_CONF_STATISTICS : uip-conf.h
  • UIP_CONF_UDP : uip-conf.h
  • UIP_CONF_UDP_CHECKSUMS : uip-conf.h
  • uip_conn_active : uip.h
  • UIP_CONNECTED : uip.h
  • uip_connected : uip.h
  • UIP_CONNS : uipopt.h
  • UIP_DATA : uip.h
  • uip_datalen : uip.h
  • UIP_ESTABLISHED : uip.h
  • UIP_ETHTYPE_ARP : uip_arp.h
  • UIP_ETHTYPE_IP : uip_arp.h
  • UIP_ETHTYPE_IP6 : uip_arp.h
  • UIP_FIN_WAIT_1 : uip.h
  • UIP_FIN_WAIT_2 : uip.h
  • UIP_FIXEDADDR : uipopt.h
  • UIP_FIXEDETHADDR : uipopt.h
  • UIP_FW_DROPPED : uip-fw.h
  • UIP_FW_FORWARDED : uip-fw.h
  • UIP_FW_LOCAL : uip-fw.h
  • UIP_FW_NETIF : uip-fw.h
  • UIP_FW_NOROUTE : uip-fw.h
  • UIP_FW_OK : uip-fw.h
  • uip_fw_setipaddr : uip-fw.h
  • uip_fw_setnetmask : uip-fw.h
  • UIP_FW_TOOLARGE : uip-fw.h
  • UIP_FW_ZEROLEN : uip-fw.h
  • uip_getdraddr : uip.h
  • uip_gethostaddr : uip.h
  • uip_getnetmask : uip.h
  • uip_initialmss : uip.h
  • uip_input : uip.h
  • uip_ip6addr : uip.h
  • uip_ipaddr : uip.h
  • uip_ipaddr1 : uip.h
  • uip_ipaddr2 : uip.h
  • uip_ipaddr3 : uip.h
  • uip_ipaddr4 : uip.h
  • uip_ipaddr_cmp : uip.h
  • uip_ipaddr_copy : uip.h
  • uip_ipaddr_mask : uip.h
  • uip_ipaddr_maskcmp : uip.h
  • UIP_IPH_LEN : uip.h
  • UIP_IPTCPH_LEN : uip.h
  • UIP_IPUDPH_LEN : uip.h
  • UIP_LAST_ACK : uip.h
  • UIP_LISTENPORTS : uipopt.h
  • UIP_LITTLE_ENDIAN : uipopt.h
  • UIP_LLH_LEN : uipopt.h
  • UIP_LOG : uip.c
  • UIP_LOGGING : uipopt.h
  • UIP_MAXRTX : uipopt.h
  • UIP_MAXSYNRTX : uipopt.h
  • uip_mss : uip.h
  • UIP_NEWDATA : uip.h
  • uip_newdata : uip.h
  • uip_outstanding : uip.h
  • uip_periodic : uip.h
  • uip_periodic_conn : uip.h
  • UIP_PINGADDRCONF : uipopt.h
  • uip_poll : uip.h
  • UIP_POLL : uip.h
  • uip_poll_conn : uip.h
  • UIP_POLL_REQUEST : uip.h
  • UIP_PROTO_ICMP : uip.h
  • UIP_PROTO_ICMP6 : uip.h
  • UIP_PROTO_TCP : uip.h
  • UIP_PROTO_UDP : uip.h
  • UIP_REASS_MAXAGE : uipopt.h
  • UIP_REASSEMBLY : uipopt.h
  • UIP_RECEIVE_WINDOW : uipopt.h
  • uip_restart : uip.h
  • uip_rexmit : uip.h
  • UIP_REXMIT : uip.h
  • UIP_RTO : uipopt.h
  • uip_setdraddr : uip.h
  • uip_setethaddr : uip_arp.h
  • uip_sethostaddr : uip.h
  • uip_setnetmask : uip.h
  • UIP_STAT : uip.c
  • UIP_STATISTICS : uipopt.h
  • uip_stop : uip.h
  • UIP_STOPPED : uip.h
  • uip_stopped : uip.h
  • UIP_SYN_RCVD : uip.h
  • UIP_SYN_SENT : uip.h
  • UIP_TCP_MSS : uipopt.h
  • UIP_TCPH_LEN : uip.h
  • UIP_TCPIP_HLEN : uip.h
  • UIP_TIME_WAIT : uip.h
  • UIP_TIME_WAIT_TIMEOUT : uipopt.h
  • UIP_TIMEDOUT : uip.h
  • uip_timedout : uip.h
  • UIP_TIMER : uip.h
  • UIP_TS_MASK : uip.h
  • UIP_TTL : uipopt.h
  • UIP_UDP : uipopt.h
  • UIP_UDP_APPCALL : dhcpc.h , resolv.h
  • uip_udp_bind : uip.h
  • UIP_UDP_CHECKSUMS : uipopt.h
  • UIP_UDP_CONNS : uipopt.h
  • uip_udp_remove : uip.h
  • uip_udp_send : uip.h
  • UIP_UDP_SEND_CONN : uip.h
  • uip_udpconnection : uip.h
  • UIP_UDPH_LEN : uip.h
  • UIP_URGDATA : uipopt.h
  • uip_urgdatalen : uip.h
  • UNPRIVILEGE_LED : privilege.c
  • UNPRIVILEGE_LEDPORT : privilege.c
  • USB_ADC_CIF_NUM : usbcfg.h
  • USB_ADC_SIF1_NUM : usbcfg.h
  • USB_ADC_SIF2_NUM : usbcfg.h
  • USB_AUDIO : usbcfg.h
  • USB_CDC : usbcfg.h
  • USB_CDC_BUFSIZE : usbcfg.h
  • USB_CDC_CIF_NUM : usbcfg.h
  • USB_CDC_DIF_NUM : usbcfg.h
  • USB_CLASS : usbcfg.h
  • USB_CONFIG_BUS_POWERED : usb.h
  • USB_CONFIG_POWER_MA : usb.h
  • USB_CONFIG_POWERED_MASK : usb.h
  • USB_CONFIG_REMOTE_WAKEUP : usb.h
  • USB_CONFIG_SELF_POWERED : usb.h
  • USB_CONFIGUARTION_DESC_SIZE : usbdesc.h
  • USB_CONFIGURATION_DESCRIPTOR_TYPE : usb.h
  • USB_CONFIGURE_EVENT : usbcfg.h
  • USB_DEBUG_DESCRIPTOR_TYPE : usb.h
  • USB_DEVICE_CLASS_AUDIO : usb.h
  • USB_DEVICE_CLASS_COMMUNICATIONS : usb.h
  • USB_DEVICE_CLASS_HUB : usb.h
  • USB_DEVICE_CLASS_HUMAN_INTERFACE : usb.h
  • USB_DEVICE_CLASS_MISCELLANEOUS : usb.h
  • USB_DEVICE_CLASS_MONITOR : usb.h
  • USB_DEVICE_CLASS_PHYSICAL_INTERFACE : usb.h
  • USB_DEVICE_CLASS_POWER : usb.h
  • USB_DEVICE_CLASS_PRINTER : usb.h
  • USB_DEVICE_CLASS_RESERVED : usb.h
  • USB_DEVICE_CLASS_STORAGE : usb.h
  • USB_DEVICE_CLASS_VENDOR_SPECIFIC : usb.h
  • USB_DEVICE_DESC_SIZE : usbdesc.h
  • USB_DEVICE_DESCRIPTOR_TYPE : usb.h
  • USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE : usb.h
  • USB_DMA : usbcfg.h
  • USB_DMA_BUSY : usbhw.h
  • USB_DMA_DONE : usbhw.h
  • USB_DMA_EP : usbcfg.h
  • USB_DMA_ERROR : usbhw.h
  • USB_DMA_IDLE : usbhw.h
  • USB_DMA_INVALID : usbhw.h
  • USB_DMA_OVER_RUN : usbhw.h
  • USB_DMA_UNDER_RUN : usbhw.h
  • USB_DMA_UNKNOWN : usbhw.h
  • USB_ENDPOINT_DESC_SIZE : usbdesc.h
  • USB_ENDPOINT_DESCRIPTOR_TYPE : usb.h
  • USB_ENDPOINT_DIRECTION_MASK : usb.h
  • USB_ENDPOINT_IN : usb.h
  • USB_ENDPOINT_OUT : usb.h
  • USB_ENDPOINT_SYNC_ADAPTIVE : usb.h
  • USB_ENDPOINT_SYNC_ASYNCHRONOUS : usb.h
  • USB_ENDPOINT_SYNC_MASK : usb.h
  • USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION : usb.h
  • USB_ENDPOINT_SYNC_SYNCHRONOUS : usb.h
  • USB_ENDPOINT_TYPE_BULK : usb.h
  • USB_ENDPOINT_TYPE_CONTROL : usb.h
  • USB_ENDPOINT_TYPE_INTERRUPT : usb.h
  • USB_ENDPOINT_TYPE_ISOCHRONOUS : usb.h
  • USB_ENDPOINT_TYPE_MASK : usb.h
  • USB_ENDPOINT_USAGE_DATA : usb.h
  • USB_ENDPOINT_USAGE_FEEDBACK : usb.h
  • USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK : usb.h
  • USB_ENDPOINT_USAGE_MASK : usb.h
  • USB_ENDPOINT_USAGE_RESERVED : usb.h
  • USB_EP_EVENT : usbcfg.h
  • USB_EP_NUM : usbcfg.h
  • USB_ERR_B_OVRN : usbhw.h
  • USB_ERR_BTSTF : usbhw.h
  • USB_ERR_DCRC : usbhw.h
  • USB_ERR_EOP : usbhw.h
  • USB_ERR_PID : usbhw.h
  • USB_ERR_TGL : usbhw.h
  • USB_ERR_TIMOUT : usbhw.h
  • USB_ERR_UEPKT : usbhw.h
  • USB_ERROR_EVENT : usbcfg.h
  • USB_EVT_IN : usbuser.h
  • USB_EVT_IN_DMA_EOT : usbuser.h
  • USB_EVT_IN_DMA_ERR : usbuser.h
  • USB_EVT_IN_DMA_NDR : usbuser.h
  • USB_EVT_IN_NAK : usbuser.h
  • USB_EVT_IN_STALL : usbuser.h
  • USB_EVT_OUT : usbuser.h
  • USB_EVT_OUT_DMA_EOT : usbuser.h
  • USB_EVT_OUT_DMA_ERR : usbuser.h
  • USB_EVT_OUT_DMA_NDR : usbuser.h
  • USB_EVT_OUT_NAK : usbuser.h
  • USB_EVT_OUT_STALL : usbuser.h
  • USB_EVT_SETUP : usbuser.h
  • USB_FEATURE_ENDPOINT_STALL : usb.h
  • USB_FEATURE_EVENT : usbcfg.h
  • USB_FEATURE_REMOTE_WAKEUP : usb.h
  • USB_GETSTATUS_ENDPOINT_STALL : usb.h
  • USB_GETSTATUS_REMOTE_WAKEUP : usb.h
  • USB_GETSTATUS_SELF_POWERED : usb.h
  • USB_HID : usbcfg.h
  • USB_HID_IF_NUM : usbcfg.h
  • USB_IF_NUM : usbcfg.h
  • USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE : usb.h
  • USB_INTERFACE_DESC_SIZE : usbdesc.h
  • USB_INTERFACE_DESCRIPTOR_TYPE : usb.h
  • USB_INTERFACE_EVENT : usbcfg.h
  • USB_INTERFACE_POWER_DESCRIPTOR_TYPE : usb.h
  • USB_MAX_PACKET0 : usbcfg.h
  • USB_MSC : usbcfg.h
  • USB_MSC_IF_NUM : usbcfg.h
  • USB_OTG_DESCRIPTOR_TYPE : usb.h
  • USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE : usb.h
  • USB_POWER : usbcfg.h
  • USB_POWER_EVENT : usbcfg.h
  • USB_RAM_ADR : usbhw.h
  • USB_RAM_SZ : usbhw.h
  • USB_REQUEST_CLEAR_FEATURE : usb.h
  • USB_REQUEST_GET_CONFIGURATION : usb.h
  • USB_REQUEST_GET_DESCRIPTOR : usb.h
  • USB_REQUEST_GET_INTERFACE : usb.h
  • USB_REQUEST_GET_STATUS : usb.h
  • USB_REQUEST_SET_ADDRESS : usb.h
  • USB_REQUEST_SET_CONFIGURATION : usb.h
  • USB_REQUEST_SET_DESCRIPTOR : usb.h
  • USB_REQUEST_SET_FEATURE : usb.h
  • USB_REQUEST_SET_INTERFACE : usb.h
  • USB_REQUEST_SYNC_FRAME : usb.h
  • USB_RESET_EVENT : usbcfg.h
  • USB_RESUME_EVENT : usbcfg.h
  • USB_SOF_EVENT : usbcfg.h
  • USB_STRING_DESCRIPTOR_TYPE : usb.h
  • USB_SUSPEND_EVENT : usbcfg.h
  • USB_VENDOR : usbcfg.h
  • USB_WAKEUP_EVENT : usbcfg.h
  • USBCLKCFG_Val : system_LPC17xx.c
  • USE_STATIC_INIT : arm_class_marks_example_f32.c
  • USED_UART_DEBUG_PORT : debug_frmwrk.h
  • USEDI2CDEV : pca8581_test.c , i2c_interrupt_test.c , i2c_polling_test.c
  • USEDI2CDEV_M : i2c_master_slave_int_test.c , master.c
  • USEDI2CDEV_S : i2c_master_slave_int_test.c , slave.c
  • USEDSSPDEV_M : microwire_test.c , ti_test.c
  • USEDSSPDEV_S : microwire_test.c , ti_test.c
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- v -

  • VAR_ADDRESS : bitband.c
  • VAR_BIT : bitband.c
  • VIRTUAL_QEI_SIGNAL : qei_test_velo.c
  • VTOR_OFFSET : vt_relocation.c
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- w -

  • WAITED_PIXEL : drv_glcd.h
  • WBVAL : usbdesc.h
  • WDT_TIMEOUT : wdt_reset_test.c , wdt_deepsleep.c , wdt_interrupt_test.c
  • WDT_TIMEOUT_MAX : lpc17xx_wdt.h
  • WDT_TIMEOUT_MIN : lpc17xx_wdt.h
  • WDT_US_INDEX : lpc17xx_wdt.h
  • WDT_WDCLKSEL_MASK : lpc17xx_wdt.h
  • WDT_WDCLKSEL_PCLK : lpc17xx_wdt.h
  • WDT_WDCLKSEL_RC : lpc17xx_wdt.h
  • WDT_WDCLKSEL_RTC : lpc17xx_wdt.h
  • WDT_WDFEED_MASK : lpc17xx_wdt.h
  • WDT_WDMOD : lpc17xx_wdt.h
  • WDT_WDMOD_MASK : lpc17xx_wdt.h
  • WDT_WDMOD_WDEN : lpc17xx_wdt.h
  • WDT_WDMOD_WDINT : lpc17xx_wdt.h
  • WDT_WDMOD_WDRESET : lpc17xx_wdt.h
  • WDT_WDMOD_WDTOF : lpc17xx_wdt.h
  • WDT_WDTC_MASK : lpc17xx_wdt.h
  • WEBCLIENT_CONF_MAX_URLLEN : webclient.h
  • WEBCLIENT_STATE_CLOSE : webclient.c
  • WEBCLIENT_STATE_DATA : webclient.c
  • WEBCLIENT_STATE_HEADERS : webclient.c
  • WEBCLIENT_STATE_STATUSLINE : webclient.c
  • WEBCLIENT_TIMEOUT : webclient.c
  • White : GLCD.h
  • WIDTH : GLCD_SPI_LPC1700.c
Generated on Mon Nov 28 2011 11:15:40 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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  • w
  • x
  • y

- x -

  • XSPACING : arm_linear_interp_example_f32.c
  • XTAL : system_LPC17xx.c
Generated on Mon Nov 28 2011 11:15:40 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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  • Enumerations
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  • Defines
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  • f
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  • x
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- y -

  • Yellow : GLCD.h
Generated on Mon Nov 28 2011 11:15:40 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
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  • Typedefs
  • Enumerations
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  • d
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  • f
  • g
  • i
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- _ -

  • _GLCD_Cmd_t : drv_glcd.h
  • _GLCD_CmdDir_t : drv_glcd.h
  • _GLCD_ISS_t : drv_glcd.h
  • _GLCD_Status_t : drv_glcd.h
  • _sd_connect_status : spi_sdcard.c
  • _sd_error : spi_sdcard.c

- a -

  • ADC_CHANNEL_SELECTION : lpc17xx_adc.h
  • ADC_DATA_STATUS : lpc17xx_adc.h
  • ADC_START_ON_EDGE_OPT : lpc17xx_adc.h
  • ADC_START_OPT : lpc17xx_adc.h
  • ADC_TYPE_INT_OPT : lpc17xx_adc.h
  • AFLUT_ENTRY_Type : lpc17xx_can.h
  • arm_status : arm_math.h

- b -

  • Bool : lpc_types.h

- c -

  • CAN_AFMODE_Type : lpc17xx_can.h
  • CAN_CR_STS_Type : lpc17xx_can.h
  • CAN_CTRL_STS_Type : lpc17xx_can.h
  • CAN_ERROR : lpc17xx_can.h
  • CAN_FRAME_Type : lpc17xx_can.h
  • CAN_ID_FORMAT_Type : lpc17xx_can.h
  • CAN_INT_EN_Type : lpc17xx_can.h
  • CAN_MODE_Type : lpc17xx_can.h

- d -

  • DAC_CURRENT_OPT : lpc17xx_dac.h

- e -

  • EXTI_LINE_ENUM : lpc17xx_exti.h
  • EXTI_MODE_ENUM : lpc17xx_exti.h
  • EXTI_POLARITY_ENUM : lpc17xx_exti.h

- f -

  • FlagStatus : lpc_types.h
  • FullCAN_IC_Type : lpc17xx_can.h
  • FunctionalState : lpc_types.h

- g -

  • GPDMA_StateClear_Type : lpc17xx_gpdma.h
  • GPDMA_Status_Type : lpc17xx_gpdma.h

- i -

  • I2C_TRANSFER_OPT_Type : lpc17xx_i2c.h
  • IRQn : LPC17xx.h

- p -

  • PWM_CHANNEL_EDGE_OPT : lpc17xx_pwm.h
  • PWM_COUNTER_EDGE_OPT : lpc17xx_pwm.h
  • PWM_COUNTER_INPUTSEL_OPT : lpc17xx_pwm.h
  • PWM_INTSTAT_TYPE : lpc17xx_pwm.h
  • PWM_MATCH_UPDATE_OPT : lpc17xx_pwm.h
  • PWM_TC_MODE_OPT : lpc17xx_pwm.h
  • PWM_TIMER_PRESCALE_OPT : lpc17xx_pwm.h

- r -

  • RTC_INT_OPT : lpc17xx_rtc.h
  • RTC_TIMETYPE_Num : lpc17xx_rtc.h

- s -

  • SPI_TRANSFER_Type : lpc17xx_spi.h
  • SSP_TRANSFER_Type : lpc17xx_ssp.h
  • Status : lpc_types.h

- t -

  • TIM_CAP_MODE_OPT : lpc17xx_timer.h
  • TIM_COUNTER_INPUT_OPT : lpc17xx_timer.h
  • TIM_EXTMATCH_OPT : lpc17xx_timer.h
  • TIM_INT_TYPE : lpc17xx_timer.h
  • TIM_MODE_OPT : lpc17xx_timer.h
  • TIM_PRESCALE_OPT : lpc17xx_timer.h
  • TLastFrameSent : tcpip.h
  • TRANSFER_BLOCK_Type : lpc_types.h
  • TTCPStateMachine : tcpip.h

- u -

  • UART1_SignalState : lpc17xx_uart.h
  • UART_AB_MODE_Type : lpc17xx_uart.h
  • UART_ABEO_Type : lpc17xx_uart.h
  • UART_DATABIT_Type : lpc17xx_uart.h
  • UART_FITO_LEVEL_Type : lpc17xx_uart.h
  • UART_INT_Type : lpc17xx_uart.h
  • UART_IrDA_PULSE_Type : lpc17xx_uart.h
  • UART_LS_Type : lpc17xx_uart.h
  • UART_MODEM_MODE_Type : lpc17xx_uart.h
  • UART_MODEM_PIN_Type : lpc17xx_uart.h
  • UART_MODEM_STAT_type : lpc17xx_uart.h
  • UART_PARITY_Type : lpc17xx_uart.h
  • UART_RS485_DIRCTRL_PIN_Type : lpc17xx_uart.h
  • UART_STOPBIT_Type : lpc17xx_uart.h

- w -

  • WDT_CLK_OPT : lpc17xx_wdt.h
  • WDT_MODE_OPT : lpc17xx_wdt.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
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- a -

  • ACTIVE : lpc17xx_uart.h
  • ADC_ADGINTEN : lpc17xx_adc.h
  • ADC_ADINTEN0 : lpc17xx_adc.h
  • ADC_ADINTEN1 : lpc17xx_adc.h
  • ADC_ADINTEN2 : lpc17xx_adc.h
  • ADC_ADINTEN3 : lpc17xx_adc.h
  • ADC_ADINTEN4 : lpc17xx_adc.h
  • ADC_ADINTEN5 : lpc17xx_adc.h
  • ADC_ADINTEN6 : lpc17xx_adc.h
  • ADC_ADINTEN7 : lpc17xx_adc.h
  • ADC_CHANNEL_0 : lpc17xx_adc.h
  • ADC_CHANNEL_1 : lpc17xx_adc.h
  • ADC_CHANNEL_2 : lpc17xx_adc.h
  • ADC_CHANNEL_3 : lpc17xx_adc.h
  • ADC_CHANNEL_4 : lpc17xx_adc.h
  • ADC_CHANNEL_5 : lpc17xx_adc.h
  • ADC_CHANNEL_6 : lpc17xx_adc.h
  • ADC_CHANNEL_7 : lpc17xx_adc.h
  • ADC_DATA_BURST : lpc17xx_adc.h
  • ADC_DATA_DONE : lpc17xx_adc.h
  • ADC_IRQn : LPC17xx.h
  • ADC_START_CONTINUOUS : lpc17xx_adc.h
  • ADC_START_NOW : lpc17xx_adc.h
  • ADC_START_ON_CAP01 : lpc17xx_adc.h
  • ADC_START_ON_EINT0 : lpc17xx_adc.h
  • ADC_START_ON_FALLING : lpc17xx_adc.h
  • ADC_START_ON_MAT01 : lpc17xx_adc.h
  • ADC_START_ON_MAT03 : lpc17xx_adc.h
  • ADC_START_ON_MAT10 : lpc17xx_adc.h
  • ADC_START_ON_MAT11 : lpc17xx_adc.h
  • ADC_START_ON_RISING : lpc17xx_adc.h
  • APOFF : drv_glcd.h
  • APON : drv_glcd.h
  • ARM_MATH_ARGUMENT_ERROR : arm_math.h
  • ARM_MATH_LENGTH_ERROR : arm_math.h
  • ARM_MATH_NANINF : arm_math.h
  • ARM_MATH_SINGULAR : arm_math.h
  • ARM_MATH_SIZE_MISMATCH : arm_math.h
  • ARM_MATH_SUCCESS : arm_math.h
  • ARM_MATH_TEST_FAILURE : arm_math.h
  • ARP_REQUEST : tcpip.h
  • ASCSET : drv_glcd.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- l -

  • LAST_ACK : tcpip.h
  • LISTENING : tcpip.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- m -

  • MADCTR : drv_glcd.h
  • MCPWM_IRQn : LPC17xx.h
  • MemoryManagement_IRQn : LPC17xx.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- n -

  • NONE_BLOCKING : lpc_types.h
  • NonMaskableInt_IRQn : LPC17xx.h
  • NOP : drv_glcd.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
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- o -

  • OSCOFF : drv_glcd.h
  • OSCON : drv_glcd.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
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- b -

  • BLOCKING : lpc_types.h
  • BOD_IRQn : LPC17xx.h
  • BSTROFF : drv_glcd.h
  • BSTRON : drv_glcd.h
  • BusFault_IRQn : LPC17xx.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
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- c -

  • CAN_AccBP : lpc17xx_can.h
  • CAN_AccOff : lpc17xx_can.h
  • CAN_AF_ENTRY_ERROR : lpc17xx_can.h
  • CAN_CONFLICT_ID_ERROR : lpc17xx_can.h
  • CAN_eFCAN : lpc17xx_can.h
  • CAN_ENTRY_NOT_EXIT_ERROR : lpc17xx_can.h
  • CAN_FULL_OBJ_NOT_RCV : lpc17xx_can.h
  • CAN_IRQn : LPC17xx.h
  • CAN_LISTENONLY_MODE : lpc17xx_can.h
  • CAN_NO_RECEIVE_DATA : lpc17xx_can.h
  • CAN_Normal : lpc17xx_can.h
  • CAN_OBJECTS_FULL_ERROR : lpc17xx_can.h
  • CAN_OK : lpc17xx_can.h
  • CAN_OPERATING_MODE : lpc17xx_can.h
  • CAN_RESET_MODE : lpc17xx_can.h
  • CAN_RXPOLARITY_MODE : lpc17xx_can.h
  • CAN_SELFTEST_MODE : lpc17xx_can.h
  • CAN_SLEEP_MODE : lpc17xx_can.h
  • CAN_TEST_MODE : lpc17xx_can.h
  • CAN_TXPRIORITY_MODE : lpc17xx_can.h
  • CANActivity_IRQn : LPC17xx.h
  • CANCR_MS : lpc17xx_can.h
  • CANCR_RX_STS : lpc17xx_can.h
  • CANCR_TX_STS : lpc17xx_can.h
  • CANCTRL_ERR_WRN : lpc17xx_can.h
  • CANCTRL_GLOBAL_STS : lpc17xx_can.h
  • CANCTRL_INT_CAP : lpc17xx_can.h
  • CANCTRL_STS : lpc17xx_can.h
  • CANINT_ALIE : lpc17xx_can.h
  • CANINT_BEIE : lpc17xx_can.h
  • CANINT_DOIE : lpc17xx_can.h
  • CANINT_EIE : lpc17xx_can.h
  • CANINT_EPIE : lpc17xx_can.h
  • CANINT_FCE : lpc17xx_can.h
  • CANINT_IDIE : lpc17xx_can.h
  • CANINT_RIE : lpc17xx_can.h
  • CANINT_TIE1 : lpc17xx_can.h
  • CANINT_TIE2 : lpc17xx_can.h
  • CANINT_TIE3 : lpc17xx_can.h
  • CANINT_WUIE : lpc17xx_can.h
  • CASET : drv_glcd.h
  • CLKEXT : drv_glcd.h
  • CLKINT : drv_glcd.h
  • CLOSE_WAIT : tcpip.h
  • CLOSED : tcpip.h
  • CLOSING : tcpip.h
  • COLMOD : drv_glcd.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- d -

  • DAC_MAX_CURRENT_350uA : lpc17xx_dac.h
  • DAC_MAX_CURRENT_700uA : lpc17xx_dac.h
  • DATA_FRAME : lpc17xx_can.h
  • DATCTR : drv_glcd.h
  • DebugMonitor_IRQn : LPC17xx.h
  • DISABLE : lpc_types.h
  • DISCTR : drv_glcd.h
  • DISPOFF : drv_glcd.h
  • DISPON : drv_glcd.h
  • DMA_IRQn : LPC17xx.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- e -

  • EINT0_IRQn : LPC17xx.h
  • EINT1_IRQn : LPC17xx.h
  • EINT2_IRQn : LPC17xx.h
  • EINT3_IRQn : LPC17xx.h
  • ENABLE : lpc_types.h
  • ENET_IRQn : LPC17xx.h
  • EPWRIN : drv_glcd.h
  • EPWROUT : drv_glcd.h
  • ERROR : lpc_types.h
  • ESTABLISHED : tcpip.h
  • EXPLICIT_EXTEND_ENTRY : lpc17xx_can.h
  • EXPLICIT_STANDARD_ENTRY : lpc17xx_can.h
  • EXT_ID_FORMAT : lpc17xx_can.h
  • EXTI_EINT0 : lpc17xx_exti.h
  • EXTI_EINT1 : lpc17xx_exti.h
  • EXTI_EINT2 : lpc17xx_exti.h
  • EXTI_EINT3 : lpc17xx_exti.h
  • EXTI_MODE_EDGE_SENSITIVE : lpc17xx_exti.h
  • EXTI_MODE_LEVEL_SENSITIVE : lpc17xx_exti.h
  • EXTI_POLARITY_HIGH_ACTIVE_OR_RISING_EDGE : lpc17xx_exti.h
  • EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE : lpc17xx_exti.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- f -

  • FALSE : lpc_types.h
  • FIN_WAIT_1 : tcpip.h
  • FIN_WAIT_2 : tcpip.h
  • FRM8SEL : drv_glcd.h
  • FRMSEL : drv_glcd.h
  • FULLCAN_ENTRY : lpc17xx_can.h
  • FULLCAN_IC0 : lpc17xx_can.h
  • FULLCAN_IC1 : lpc17xx_can.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
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- g -

  • GLCD_CMD_NUMB : drv_glcd.h
  • GLCD_ERROR : drv_glcd.h
  • GLCD_ID_ERROR : drv_glcd.h
  • GLCD_ISS_0 : drv_glcd.h
  • GLCD_ISS_1 : drv_glcd.h
  • GLCD_OK : drv_glcd.h
  • GLCD_READ : drv_glcd.h
  • GLCD_UNSUPPORTED : drv_glcd.h
  • GLCD_WRITE : drv_glcd.h
  • GPDMA_STAT_ENABLED_CH : lpc17xx_gpdma.h
  • GPDMA_STAT_INT : lpc17xx_gpdma.h
  • GPDMA_STAT_INTERR : lpc17xx_gpdma.h
  • GPDMA_STAT_INTTC : lpc17xx_gpdma.h
  • GPDMA_STAT_RAWINTERR : lpc17xx_gpdma.h
  • GPDMA_STAT_RAWINTTC : lpc17xx_gpdma.h
  • GPDMA_STATCLR_INTERR : lpc17xx_gpdma.h
  • GPDMA_STATCLR_INTTC : lpc17xx_gpdma.h
  • GROUP_EXTEND_ENTRY : lpc17xx_can.h
  • GROUP_STANDARD_ENTRY : lpc17xx_can.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- i -

  • I2C0_IRQn : LPC17xx.h
  • I2C1_IRQn : LPC17xx.h
  • I2C2_IRQn : LPC17xx.h
  • I2C_TRANSFER_INTERRUPT : lpc17xx_i2c.h
  • I2C_TRANSFER_POLLING : lpc17xx_i2c.h
  • I2S_IRQn : LPC17xx.h
  • IDMOFF : drv_glcd.h
  • IDMON : drv_glcd.h
  • INACTIVE : lpc17xx_uart.h
  • INVOFF : drv_glcd.h
  • INVON : drv_glcd.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- p -

  • PendSV_IRQn : LPC17xx.h
  • PLL0_IRQn : LPC17xx.h
  • PLL1_IRQn : LPC17xx.h
  • PTIN : drv_glcd.h
  • PTLAR : drv_glcd.h
  • PTLON : drv_glcd.h
  • PTLOUT : drv_glcd.h
  • PWM1_IRQn : LPC17xx.h
  • PWM_CHANNEL_DUAL_EDGE : lpc17xx_pwm.h
  • PWM_CHANNEL_SINGLE_EDGE : lpc17xx_pwm.h
  • PWM_COUNTER_ANY : lpc17xx_pwm.h
  • PWM_COUNTER_FALLING : lpc17xx_pwm.h
  • PWM_COUNTER_PCAP1_0 : lpc17xx_pwm.h
  • PWM_COUNTER_PCAP1_1 : lpc17xx_pwm.h
  • PWM_COUNTER_RISING : lpc17xx_pwm.h
  • PWM_INTSTAT_CAP0 : lpc17xx_pwm.h
  • PWM_INTSTAT_CAP1 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR0 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR1 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR2 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR3 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR4 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR5 : lpc17xx_pwm.h
  • PWM_INTSTAT_MR6 : lpc17xx_pwm.h
  • PWM_MATCH_UPDATE_NEXT_RST : lpc17xx_pwm.h
  • PWM_MATCH_UPDATE_NOW : lpc17xx_pwm.h
  • PWM_MODE_COUNTER : lpc17xx_pwm.h
  • PWM_MODE_TIMER : lpc17xx_pwm.h
  • PWM_TIMER_PRESCALE_TICKVAL : lpc17xx_pwm.h
  • PWM_TIMER_PRESCALE_USVAL : lpc17xx_pwm.h
  • PWRCTR : drv_glcd.h
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- q -

  • QEI_IRQn : LPC17xx.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- r -

  • RAMWR : drv_glcd.h
  • RASET : drv_glcd.h
  • RDDID : drv_glcd.h
  • RDDST : drv_glcd.h
  • RDEV : drv_glcd.h
  • RDID1 : drv_glcd.h
  • RDID2 : drv_glcd.h
  • RDID3 : drv_glcd.h
  • RDRR : drv_glcd.h
  • REMOTE_FRAME : lpc17xx_can.h
  • RESET : lpc_types.h
  • RGBSET : drv_glcd.h
  • RIT_IRQn : LPC17xx.h
  • RMWIN : drv_glcd.h
  • RMWOUT : drv_glcd.h
  • RTC_INT_ALARM : lpc17xx_rtc.h
  • RTC_INT_COUNTER_INCREASE : lpc17xx_rtc.h
  • RTC_IRQn : LPC17xx.h
  • RTC_TIMETYPE_DAYOFMONTH : lpc17xx_rtc.h
  • RTC_TIMETYPE_DAYOFWEEK : lpc17xx_rtc.h
  • RTC_TIMETYPE_DAYOFYEAR : lpc17xx_rtc.h
  • RTC_TIMETYPE_HOUR : lpc17xx_rtc.h
  • RTC_TIMETYPE_MINUTE : lpc17xx_rtc.h
  • RTC_TIMETYPE_MONTH : lpc17xx_rtc.h
  • RTC_TIMETYPE_SECOND : lpc17xx_rtc.h
  • RTC_TIMETYPE_YEAR : lpc17xx_rtc.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- s -

  • SCRLAR : drv_glcd.h
  • SD_CMD_BAD_PARAMETER : spi_sdcard.c
  • SD_CONNECTED : spi_sdcard.c
  • SD_DISCONNECTED : spi_sdcard.c
  • SD_ERROR_ACMD41 : spi_sdcard.c
  • SD_ERROR_BUS_NOT_IDLE : spi_sdcard.c
  • SD_ERROR_CMD0 : spi_sdcard.c
  • SD_ERROR_CMD55 : spi_sdcard.c
  • SD_ERROR_CMD59 : spi_sdcard.c
  • SD_ERROR_TIMEOUT : spi_sdcard.c
  • SD_ERROR_TOKEN : spi_sdcard.c
  • SD_NG : spi_sdcard.c
  • SD_OK : spi_sdcard.c
  • SET : lpc_types.h
  • SETCON : drv_glcd.h
  • SLPIN : drv_glcd.h
  • SLPOUT : drv_glcd.h
  • SPI_IRQn : LPC17xx.h
  • SPI_TRANSFER_INTERRUPT : lpc17xx_spi.h
  • SPI_TRANSFER_POLLING : lpc17xx_spi.h
  • SSP0_IRQn : LPC17xx.h
  • SSP1_IRQn : LPC17xx.h
  • SSP_TRANSFER_INTERRUPT : lpc17xx_ssp.h
  • SSP_TRANSFER_POLLING : lpc17xx_ssp.h
  • STD_ID_FORMAT : lpc17xx_can.h
  • SUCCESS : lpc_types.h
  • SVCall_IRQn : LPC17xx.h
  • SWRESET : drv_glcd.h
  • SYN_RECD : tcpip.h
  • SYN_SENT : tcpip.h
  • SysTick_IRQn : LPC17xx.h
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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  • TCP_DATA_FRAME : tcpip.h
  • TCP_FIN_FRAME : tcpip.h
  • TCP_SYN_ACK_FRAME : tcpip.h
  • TCP_SYN_FRAME : tcpip.h
  • TIM_CAPTURE_ANY : lpc17xx_timer.h
  • TIM_CAPTURE_FALLING : lpc17xx_timer.h
  • TIM_CAPTURE_NONE : lpc17xx_timer.h
  • TIM_CAPTURE_RISING : lpc17xx_timer.h
  • TIM_COUNTER_ANY_MODE : lpc17xx_timer.h
  • TIM_COUNTER_FALLING_MODE : lpc17xx_timer.h
  • TIM_COUNTER_INCAP0 : lpc17xx_timer.h
  • TIM_COUNTER_INCAP1 : lpc17xx_timer.h
  • TIM_COUNTER_RISING_MODE : lpc17xx_timer.h
  • TIM_CR0_INT : lpc17xx_timer.h
  • TIM_CR1_INT : lpc17xx_timer.h
  • TIM_EXTMATCH_HIGH : lpc17xx_timer.h
  • TIM_EXTMATCH_LOW : lpc17xx_timer.h
  • TIM_EXTMATCH_NOTHING : lpc17xx_timer.h
  • TIM_EXTMATCH_TOGGLE : lpc17xx_timer.h
  • TIM_MR0_INT : lpc17xx_timer.h
  • TIM_MR1_INT : lpc17xx_timer.h
  • TIM_MR2_INT : lpc17xx_timer.h
  • TIM_MR3_INT : lpc17xx_timer.h
  • TIM_PRESCALE_TICKVAL : lpc17xx_timer.h
  • TIM_PRESCALE_USVAL : lpc17xx_timer.h
  • TIM_TIMER_MODE : lpc17xx_timer.h
  • TIME_WAIT : tcpip.h
  • TIMER0_IRQn : LPC17xx.h
  • TIMER1_IRQn : LPC17xx.h
  • TIMER2_IRQn : LPC17xx.h
  • TIMER3_IRQn : LPC17xx.h
  • TMPHIS : drv_glcd.h
  • TMPREAD : drv_glcd.h
  • TMPRNG : drv_glcd.h
  • TRUE : lpc_types.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
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  • UART0_IRQn : LPC17xx.h
  • UART1_INTCFG_CTS : lpc17xx_uart.h
  • UART1_INTCFG_MS : lpc17xx_uart.h
  • UART1_IRQn : LPC17xx.h
  • UART1_MODEM_MODE_AUTO_CTS : lpc17xx_uart.h
  • UART1_MODEM_MODE_AUTO_RTS : lpc17xx_uart.h
  • UART1_MODEM_MODE_LOOPBACK : lpc17xx_uart.h
  • UART1_MODEM_PIN_DTR : lpc17xx_uart.h
  • UART1_MODEM_PIN_RTS : lpc17xx_uart.h
  • UART1_MODEM_STAT_CTS : lpc17xx_uart.h
  • UART1_MODEM_STAT_DCD : lpc17xx_uart.h
  • UART1_MODEM_STAT_DELTA_CTS : lpc17xx_uart.h
  • UART1_MODEM_STAT_DELTA_DCD : lpc17xx_uart.h
  • UART1_MODEM_STAT_DELTA_DSR : lpc17xx_uart.h
  • UART1_MODEM_STAT_DSR : lpc17xx_uart.h
  • UART1_MODEM_STAT_LO2HI_RI : lpc17xx_uart.h
  • UART1_MODEM_STAT_RI : lpc17xx_uart.h
  • UART1_RS485_DIRCTRL_DTR : lpc17xx_uart.h
  • UART1_RS485_DIRCTRL_RTS : lpc17xx_uart.h
  • UART2_IRQn : LPC17xx.h
  • UART3_IRQn : LPC17xx.h
  • UART_AUTOBAUD_INTSTAT_ABEO : lpc17xx_uart.h
  • UART_AUTOBAUD_INTSTAT_ABTO : lpc17xx_uart.h
  • UART_AUTOBAUD_MODE0 : lpc17xx_uart.h
  • UART_AUTOBAUD_MODE1 : lpc17xx_uart.h
  • UART_DATABIT_5 : lpc17xx_uart.h
  • UART_DATABIT_6 : lpc17xx_uart.h
  • UART_DATABIT_7 : lpc17xx_uart.h
  • UART_DATABIT_8 : lpc17xx_uart.h
  • UART_FIFO_TRGLEV0 : lpc17xx_uart.h
  • UART_FIFO_TRGLEV1 : lpc17xx_uart.h
  • UART_FIFO_TRGLEV2 : lpc17xx_uart.h
  • UART_FIFO_TRGLEV3 : lpc17xx_uart.h
  • UART_INTCFG_ABEO : lpc17xx_uart.h
  • UART_INTCFG_ABTO : lpc17xx_uart.h
  • UART_INTCFG_RBR : lpc17xx_uart.h
  • UART_INTCFG_RLS : lpc17xx_uart.h
  • UART_INTCFG_THRE : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV128 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV16 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV2 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV256 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV32 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV4 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV64 : lpc17xx_uart.h
  • UART_IrDA_PULSEDIV8 : lpc17xx_uart.h
  • UART_LINESTAT_BI : lpc17xx_uart.h
  • UART_LINESTAT_FE : lpc17xx_uart.h
  • UART_LINESTAT_OE : lpc17xx_uart.h
  • UART_LINESTAT_PE : lpc17xx_uart.h
  • UART_LINESTAT_RDR : lpc17xx_uart.h
  • UART_LINESTAT_RXFE : lpc17xx_uart.h
  • UART_LINESTAT_TEMT : lpc17xx_uart.h
  • UART_LINESTAT_THRE : lpc17xx_uart.h
  • UART_PARITY_EVEN : lpc17xx_uart.h
  • UART_PARITY_NONE : lpc17xx_uart.h
  • UART_PARITY_ODD : lpc17xx_uart.h
  • UART_PARITY_SP_0 : lpc17xx_uart.h
  • UART_PARITY_SP_1 : lpc17xx_uart.h
  • UART_STOPBIT_1 : lpc17xx_uart.h
  • UART_STOPBIT_2 : lpc17xx_uart.h
  • UsageFault_IRQn : LPC17xx.h
  • USB_IRQn : LPC17xx.h
  • USBActivity_IRQn : LPC17xx.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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  • VOLCTR : drv_glcd.h
  • VOLDOWN : drv_glcd.h
  • VOLUP : drv_glcd.h
  • VSCSAD : drv_glcd.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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  • WDT_CLKSRC_IRC : lpc17xx_wdt.h
  • WDT_CLKSRC_PCLK : lpc17xx_wdt.h
  • WDT_CLKSRC_RTC : lpc17xx_wdt.h
  • WDT_IRQn : LPC17xx.h
  • WDT_MODE_INT_ONLY : lpc17xx_wdt.h
  • WDT_MODE_RESET : lpc17xx_wdt.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- _ -

  • __attribute__() : emactest.c , link_list.c
  • _close_r() : syscalls.c
  • _fstat_r() : syscalls.c
  • _isatty_r() : syscalls.c
  • _lseek_r() : syscalls.c
  • _read_r() : syscalls.c
  • _sbrk_r() : syscalls.c
  • _sys_exit() : Retarget.c
  • _ttywrch() : Retarget.c
  • _write_r() : syscalls.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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  • LED_Blink() : emactest.c
  • LED_Init() : wdt_interrupt_test.c , main.c , emactest.c , tcpip.c , privilege.c
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- m -

  • main() : adc_burst_test.c , adc_dma_test.c , adc_interrupt_test.c , can_test_aflut.c , dac_speaker.c , i2c_polling_test.c , ssp_master.c , microwire_test.c , slave.c , sc16is750_int.c , sc16is750_polling.c , dac_wave_generate.c , i2s_dma_test.c , ssp_slave.c , ti_test.c , i2s_irq_test.c , 10ms_base.c , systick_stclk.c , can_test_bypass_mode.c , easyweb.c , i2s_mclk.c , timer_capture.c , freqmeasure.c , i2s_test_4_wire.c , gen_diff_delay.c , gen_diff_freqs.c , emactest.c , i2s_two_kit.c , timer_int_match.c , timer_poll_match.c , i2s_polling.c , pwm_signal.c , uart_autobaud_test.c , adc_polling_test.c , can_test_two_kit.c , main.c , lcdtest.c , uart_dma_test.c , uart_hw_flow_control.c , lcdtest.c , uart_interrupt_test.c , uart_irda_receive.c , arm_variance_example_f32.c , arm_sin_cos_example_f32.c , arm_signal_converge_example_f32.c , arm_matrix_example_f32.c , arm_linear_interp_example_f32.c , arm_graphic_equalizer_example_q31.c , arm_fir_example_f32.c , arm_fft_bin_example_f32.c , arm_dotproduct_example_f32.c , arm_convolution_example_f32.c , arm_class_marks_example_f32.c , wdt_reset_test.c , wdt_interrupt_test.c , memory.c , demo.c , vcomdemo.c , usbdmain.c , uart_fullmodem_test.c , rs485_slave.c , rs485_master.c , flash_2_ram.c , mcpwm_simple.c , uart_irda_transmit.c , uart_polling_test.c , nvic_priority.c , bitband.c , gpdma_sleep.c , vt_relocation.c , template.c , link_list.c , pwm_dual_edge.c , pwm_match_int.c , adc_hardware_trigger_test.c , can_ledcontrol.c , mpu_test.c , gpdma_r2r_test.c , pwm_single_edge.c , extint_sleep.c , gpio_int.c , nmi_powerdown.c , rtc_deeppwd.c , privilege.c , ssp_dma.c , spi_slave.c , spi_sdcard.c , spi_polling_test.c , spi_interrupt_test.c , spi_master.c , spi_loopback_test.c , rtc_calib.c , rtc_alarm_cntincr_int.c , rit_interrupt.c , LedBlinky.c , wdt_deepsleep.c , qei_test_velo.c , master.c , can_self_test.c , dac_dma.c , i2c_master_slave_int_test.c , i2c_monitor.c , dac_sinewave_test.c , pca8581_test.c , i2c_interrupt_test.c
  • MCPWM_ACMode() : lpc17xx_mcpwm.h
  • MCPWM_ClearCapture() : lpc17xx_mcpwm.h
  • MCPWM_ConfigCapture() : lpc17xx_mcpwm.h
  • MCPWM_ConfigChannel() : lpc17xx_mcpwm.h
  • MCPWM_CountConfig() : lpc17xx_mcpwm.h
  • MCPWM_DCMode() : lpc17xx_mcpwm.h
  • MCPWM_GetCapture() : lpc17xx_mcpwm.h
  • MCPWM_GetIntStatus() : lpc17xx_mcpwm.h
  • MCPWM_Init() : lpc17xx_mcpwm.h
  • MCPWM_IntClear() : lpc17xx_mcpwm.h
  • MCPWM_IntConfig() : lpc17xx_mcpwm.h
  • MCPWM_IntSet() : lpc17xx_mcpwm.h
  • MCPWM_IRQHandler() : mcpwm_simple.c
  • MCPWM_Start() : lpc17xx_mcpwm.h
  • MCPWM_Stop() : lpc17xx_mcpwm.h
  • MCPWM_WriteToShadow() : lpc17xx_mcpwm.h
  • MEMB() : telnetd.c
  • MemManage_Handler() : mpu_test.c
  • MSC_BulkIn() : mscuser.h , mscuser.c
  • MSC_BulkOut() : mscuser.c , mscuser.h
  • MSC_GetCBW() : mscuser.c , mscuser.h
  • MSC_GetMaxLUN() : mscuser.c , mscuser.h
  • MSC_Inquiry() : mscuser.c
  • MSC_MemoryRead() : mscuser.c
  • MSC_MemoryVerify() : mscuser.c
  • MSC_MemoryWrite() : mscuser.c
  • MSC_ModeSense10() : mscuser.c
  • MSC_ModeSense6() : mscuser.c
  • MSC_ReadCapacity() : mscuser.c
  • MSC_ReadFormatCapacity() : mscuser.c
  • MSC_RequestSense() : mscuser.c
  • MSC_Reset() : mscuser.h , mscuser.c
  • MSC_RWSetup() : mscuser.c
  • MSC_SetCSW() : mscuser.h , mscuser.c
  • MSC_TestUnitReady() : mscuser.c
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- n -

  • NMI_Handler() : nmi_powerdown.c
  • NVIC_DeInit() : lpc17xx_nvic.h
  • NVIC_SCBDeInit() : lpc17xx_nvic.h
  • NVIC_SetVTOR() : lpc17xx_nvic.h
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- a -

  • ADC_BurstCmd() : lpc17xx_adc.h
  • ADC_ChannelCmd() : lpc17xx_adc.h
  • ADC_ChannelGetData() : lpc17xx_adc.h
  • ADC_ChannelGetStatus() : lpc17xx_adc.h
  • ADC_DeInit() : lpc17xx_adc.h
  • ADC_EdgeStartConfig() : lpc17xx_adc.h
  • ADC_EP_GetRequest() : adcuser.h , adcuser.c
  • ADC_EP_SetRequest() : adcuser.c , adcuser.h
  • ADC_getCnv() : ADC.c , ADC.h
  • ADC_GetData() : lpc17xx_adc.c
  • ADC_GlobalGetData() : lpc17xx_adc.h
  • ADC_GlobalGetStatus() : lpc17xx_adc.h
  • ADC_IF_GetRequest() : adcuser.c , adcuser.h
  • ADC_IF_SetRequest() : adcuser.c , adcuser.h
  • ADC_Init() : lpc17xx_adc.h
  • ADC_init() : ADC.c , ADC.h
  • ADC_IntConfig() : lpc17xx_adc.h
  • ADC_IRQHandler() : adc_hardware_trigger_test.c , adc_interrupt_test.c
  • ADC_PowerdownCmd() : lpc17xx_adc.h
  • ADC_StartCmd() : lpc17xx_adc.h
  • ADC_startCnv() : ADC.c , ADC.h
  • ADC_stopCnv() : ADC.c , ADC.h
  • arm_abs_f32() : arm_math.h , arm_abs_f32.c
  • arm_abs_q15() : arm_math.h , arm_abs_q15.c
  • arm_abs_q31() : arm_math.h , arm_abs_q31.c
  • arm_abs_q7() : arm_math.h , arm_abs_q7.c
  • arm_add_f32() : arm_math.h , arm_add_f32.c
  • arm_add_q15() : arm_math.h , arm_add_q15.c
  • arm_add_q31() : arm_math.h , arm_add_q31.c
  • arm_add_q7() : arm_math.h , arm_add_q7.c
  • arm_apply_guard_bits() : math_helper.h , math_helper.c
  • arm_biquad_cas_df1_32x64_init_q31() : arm_math.h , arm_biquad_cascade_df1_32x64_init_q31.c
  • arm_biquad_cas_df1_32x64_q31() : arm_math.h , arm_biquad_cascade_df1_32x64_q31.c
  • arm_biquad_cascade_df1_f32() : arm_math.h , arm_biquad_cascade_df1_f32.c
  • arm_biquad_cascade_df1_fast_q15() : arm_math.h , arm_biquad_cascade_df1_fast_q15.c
  • arm_biquad_cascade_df1_fast_q31() : arm_math.h , arm_biquad_cascade_df1_fast_q31.c
  • arm_biquad_cascade_df1_init_f32() : arm_math.h , arm_biquad_cascade_df1_init_f32.c
  • arm_biquad_cascade_df1_init_q15() : arm_math.h , arm_biquad_cascade_df1_init_q15.c
  • arm_biquad_cascade_df1_init_q31() : arm_math.h , arm_biquad_cascade_df1_init_q31.c
  • arm_biquad_cascade_df1_q15() : arm_math.h , arm_biquad_cascade_df1_q15.c
  • arm_biquad_cascade_df1_q31() : arm_math.h , arm_biquad_cascade_df1_q31.c
  • arm_biquad_cascade_df2T_f32() : arm_math.h , arm_biquad_cascade_df2T_f32.c
  • arm_biquad_cascade_df2T_init_f32() : arm_math.h , arm_biquad_cascade_df2T_init_f32.c
  • arm_bitreversal_f32() : arm_math.h , arm_cfft_radix4_f32.c
  • arm_bitreversal_q15() : arm_math.h , arm_cfft_radix4_q15.c
  • arm_bitreversal_q31() : arm_math.h , arm_cfft_radix4_q31.c
  • arm_calc_2pow() : math_helper.h , math_helper.c
  • arm_calc_guard_bits() : math_helper.h , math_helper.c
  • arm_cfft_radix4_f32() : arm_math.h , arm_cfft_radix4_f32.c
  • arm_cfft_radix4_init_f32() : arm_math.h , arm_cfft_radix4_init_f32.c
  • arm_cfft_radix4_init_q15() : arm_math.h , arm_cfft_radix4_init_q15.c
  • arm_cfft_radix4_init_q31() : arm_math.h , arm_cfft_radix4_init_q31.c
  • arm_cfft_radix4_q15() : arm_math.h , arm_cfft_radix4_q15.c
  • arm_cfft_radix4_q31() : arm_math.h , arm_cfft_radix4_q31.c
  • arm_clip_f32() : math_helper.h , math_helper.c
  • arm_cmplx_conj_f32() : arm_math.h , arm_cmplx_conj_f32.c
  • arm_cmplx_conj_q15() : arm_math.h , arm_cmplx_conj_q15.c
  • arm_cmplx_conj_q31() : arm_math.h , arm_cmplx_conj_q31.c
  • arm_cmplx_dot_prod_f32() : arm_math.h , arm_cmplx_dot_prod_f32.c
  • arm_cmplx_dot_prod_q15() : arm_math.h , arm_cmplx_dot_prod_q15.c
  • arm_cmplx_dot_prod_q31() : arm_math.h , arm_cmplx_dot_prod_q31.c
  • arm_cmplx_mag_f32() : arm_math.h , arm_cmplx_mag_f32.c
  • arm_cmplx_mag_q15() : arm_math.h , arm_cmplx_mag_q15.c
  • arm_cmplx_mag_q31() : arm_math.h , arm_cmplx_mag_q31.c
  • arm_cmplx_mag_squared_f32() : arm_math.h , arm_cmplx_mag_squared_f32.c
  • arm_cmplx_mag_squared_q15() : arm_math.h , arm_cmplx_mag_squared_q15.c
  • arm_cmplx_mag_squared_q31() : arm_math.h , arm_cmplx_mag_squared_q31.c
  • arm_cmplx_mult_cmplx_f32() : arm_math.h , arm_cmplx_mult_cmplx_f32.c
  • arm_cmplx_mult_cmplx_q15() : arm_math.h , arm_cmplx_mult_cmplx_q15.c
  • arm_cmplx_mult_cmplx_q31() : arm_math.h , arm_cmplx_mult_cmplx_q31.c
  • arm_cmplx_mult_real_f32() : arm_math.h , arm_cmplx_mult_real_f32.c
  • arm_cmplx_mult_real_q15() : arm_math.h , arm_cmplx_mult_real_q15.c
  • arm_cmplx_mult_real_q31() : arm_math.h , arm_cmplx_mult_real_q31.c
  • arm_compare_fixed_q15() : math_helper.h , math_helper.c
  • arm_compare_fixed_q31() : math_helper.h , math_helper.c
  • arm_conv_f32() : arm_math.h , arm_conv_f32.c
  • arm_conv_fast_q15() : arm_math.h , arm_conv_fast_q15.c
  • arm_conv_fast_q31() : arm_math.h , arm_conv_fast_q31.c
  • arm_conv_partial_f32() : arm_math.h , arm_conv_partial_f32.c
  • arm_conv_partial_fast_q15() : arm_math.h , arm_conv_partial_fast_q15.c
  • arm_conv_partial_fast_q31() : arm_math.h , arm_conv_partial_fast_q31.c
  • arm_conv_partial_q15() : arm_math.h , arm_conv_partial_q15.c
  • arm_conv_partial_q31() : arm_math.h , arm_conv_partial_q31.c
  • arm_conv_partial_q7() : arm_math.h , arm_conv_partial_q7.c
  • arm_conv_q15() : arm_math.h , arm_conv_q15.c
  • arm_conv_q31() : arm_math.h , arm_conv_q31.c
  • arm_conv_q7() : arm_math.h , arm_conv_q7.c
  • arm_copy_f32() : arm_math.h , arm_copy_f32.c
  • arm_copy_q15() : arm_math.h , arm_copy_q15.c
  • arm_copy_q31() : arm_math.h , arm_copy_q31.c
  • arm_copy_q7() : arm_math.h , arm_copy_q7.c
  • arm_correlate_f32() : arm_math.h , arm_correlate_f32.c
  • arm_correlate_fast_q15() : arm_math.h , arm_correlate_fast_q15.c
  • arm_correlate_fast_q31() : arm_math.h , arm_correlate_fast_q31.c
  • arm_correlate_q15() : arm_math.h , arm_correlate_q15.c
  • arm_correlate_q31() : arm_math.h , arm_correlate_q31.c
  • arm_correlate_q7() : arm_math.h , arm_correlate_q7.c
  • arm_cos_f32() : arm_math.h , arm_cos_f32.c
  • arm_cos_q15() : arm_math.h , arm_cos_q15.c
  • arm_cos_q31() : arm_math.h , arm_cos_q31.c
  • arm_dct4_f32() : arm_math.h , arm_dct4_f32.c
  • arm_dct4_init_f32() : arm_math.h , arm_dct4_init_f32.c
  • arm_dct4_init_q15() : arm_math.h , arm_dct4_init_q15.c
  • arm_dct4_init_q31() : arm_math.h , arm_dct4_init_q31.c
  • arm_dct4_q15() : arm_math.h , arm_dct4_q15.c
  • arm_dct4_q31() : arm_math.h , arm_dct4_q31.c
  • arm_dot_prod_f32() : arm_math.h , arm_dot_prod_f32.c
  • arm_dot_prod_q15() : arm_math.h , arm_dot_prod_q15.c
  • arm_dot_prod_q31() : arm_math.h , arm_dot_prod_q31.c
  • arm_dot_prod_q7() : arm_math.h , arm_dot_prod_q7.c
  • arm_fill_f32() : arm_math.h , arm_fill_f32.c
  • arm_fill_q15() : arm_math.h , arm_fill_q15.c
  • arm_fill_q31() : arm_math.h , arm_fill_q31.c
  • arm_fill_q7() : arm_math.h , arm_fill_q7.c
  • arm_fir_decimate_f32() : arm_math.h , arm_fir_decimate_f32.c
  • arm_fir_decimate_fast_q15() : arm_math.h , arm_fir_decimate_fast_q15.c
  • arm_fir_decimate_fast_q31() : arm_math.h , arm_fir_decimate_fast_q31.c
  • arm_fir_decimate_init_f32() : arm_math.h , arm_fir_decimate_init_f32.c
  • arm_fir_decimate_init_q15() : arm_math.h , arm_fir_decimate_init_q15.c
  • arm_fir_decimate_init_q31() : arm_math.h , arm_fir_decimate_init_q31.c
  • arm_fir_decimate_q15() : arm_math.h , arm_fir_decimate_q15.c
  • arm_fir_decimate_q31() : arm_math.h , arm_fir_decimate_q31.c
  • arm_fir_f32() : arm_math.h , arm_fir_f32.c
  • arm_fir_fast_q15() : arm_math.h , arm_fir_fast_q15.c
  • arm_fir_fast_q31() : arm_math.h , arm_fir_fast_q31.c
  • arm_fir_init_f32() : arm_math.h , arm_fir_init_f32.c
  • arm_fir_init_q15() : arm_math.h , arm_fir_init_q15.c
  • arm_fir_init_q31() : arm_math.h , arm_fir_init_q31.c
  • arm_fir_init_q7() : arm_math.h , arm_fir_init_q7.c
  • arm_fir_interpolate_f32() : arm_math.h , arm_fir_interpolate_f32.c
  • arm_fir_interpolate_init_f32() : arm_math.h , arm_fir_interpolate_init_f32.c
  • arm_fir_interpolate_init_q15() : arm_math.h , arm_fir_interpolate_init_q15.c
  • arm_fir_interpolate_init_q31() : arm_math.h , arm_fir_interpolate_init_q31.c
  • arm_fir_interpolate_q15() : arm_math.h , arm_fir_interpolate_q15.c
  • arm_fir_interpolate_q31() : arm_math.h , arm_fir_interpolate_q31.c
  • arm_fir_lattice_f32() : arm_math.h , arm_fir_lattice_f32.c
  • arm_fir_lattice_init_f32() : arm_math.h , arm_fir_lattice_init_f32.c
  • arm_fir_lattice_init_q15() : arm_math.h , arm_fir_lattice_init_q15.c
  • arm_fir_lattice_init_q31() : arm_math.h , arm_fir_lattice_init_q31.c
  • arm_fir_lattice_q15() : arm_math.h , arm_fir_lattice_q15.c
  • arm_fir_lattice_q31() : arm_math.h , arm_fir_lattice_q31.c
  • arm_fir_q15() : arm_math.h , arm_fir_q15.c
  • arm_fir_q31() : arm_math.h , arm_fir_q31.c
  • arm_fir_q7() : arm_math.h , arm_fir_q7.c
  • arm_fir_sparse_f32() : arm_math.h , arm_fir_sparse_f32.c
  • arm_fir_sparse_init_f32() : arm_math.h , arm_fir_sparse_init_f32.c
  • arm_fir_sparse_init_q15() : arm_math.h , arm_fir_sparse_init_q15.c
  • arm_fir_sparse_init_q31() : arm_math.h , arm_fir_sparse_init_q31.c
  • arm_fir_sparse_init_q7() : arm_math.h , arm_fir_sparse_init_q7.c
  • arm_fir_sparse_q15() : arm_fir_sparse_q15.c , arm_math.h
  • arm_fir_sparse_q31() : arm_math.h , arm_fir_sparse_q31.c
  • arm_fir_sparse_q7() : arm_math.h , arm_fir_sparse_q7.c
  • arm_float_to_q12_20() : math_helper.h , math_helper.c
  • arm_float_to_q14() : math_helper.c , math_helper.h
  • arm_float_to_q15() : arm_math.h , arm_float_to_q15.c
  • arm_float_to_q28() : math_helper.c , math_helper.h
  • arm_float_to_q29() : math_helper.h , math_helper.c
  • arm_float_to_q30() : math_helper.c , math_helper.h
  • arm_float_to_q31() : arm_math.h , arm_float_to_q31.c
  • arm_float_to_q7() : arm_math.h , arm_float_to_q7.c
  • arm_iir_lattice_f32() : arm_math.h , arm_iir_lattice_f32.c
  • arm_iir_lattice_init_f32() : arm_math.h , arm_iir_lattice_init_f32.c
  • arm_iir_lattice_init_q15() : arm_math.h , arm_iir_lattice_init_q15.c
  • arm_iir_lattice_init_q31() : arm_math.h , arm_iir_lattice_init_q31.c
  • arm_iir_lattice_q15() : arm_math.h , arm_iir_lattice_q15.c
  • arm_iir_lattice_q31() : arm_math.h , arm_iir_lattice_q31.c
  • arm_lms_f32() : arm_math.h , arm_lms_f32.c
  • arm_lms_init_f32() : arm_math.h , arm_lms_init_f32.c
  • arm_lms_init_q15() : arm_math.h , arm_lms_init_q15.c
  • arm_lms_init_q31() : arm_math.h , arm_lms_init_q31.c
  • arm_lms_norm_f32() : arm_math.h , arm_lms_norm_f32.c
  • arm_lms_norm_init_f32() : arm_math.h , arm_lms_norm_init_f32.c
  • arm_lms_norm_init_q15() : arm_math.h , arm_lms_norm_init_q15.c
  • arm_lms_norm_init_q31() : arm_math.h , arm_lms_norm_init_q31.c
  • arm_lms_norm_q15() : arm_math.h , arm_lms_norm_q15.c
  • arm_lms_norm_q31() : arm_math.h , arm_lms_norm_q31.c
  • arm_lms_q15() : arm_math.h , arm_lms_q15.c
  • arm_lms_q31() : arm_math.h , arm_lms_q31.c
  • arm_mat_add_f32() : arm_math.h , arm_mat_add_f32.c
  • arm_mat_add_q15() : arm_math.h , arm_mat_add_q15.c
  • arm_mat_add_q31() : arm_math.h , arm_mat_add_q31.c
  • arm_mat_init_f32() : arm_math.h , arm_mat_init_f32.c
  • arm_mat_init_q15() : arm_math.h , arm_mat_init_q15.c
  • arm_mat_init_q31() : arm_math.h , arm_mat_init_q31.c
  • arm_mat_inverse_f32() : arm_math.h , arm_mat_inverse_f32.c
  • arm_mat_mult_f32() : arm_math.h , arm_mat_mult_f32.c
  • arm_mat_mult_fast_q15() : arm_math.h , arm_mat_mult_fast_q15.c
  • arm_mat_mult_fast_q31() : arm_math.h , arm_mat_mult_fast_q31.c
  • arm_mat_mult_q15() : arm_math.h , arm_mat_mult_q15.c
  • arm_mat_mult_q31() : arm_math.h , arm_mat_mult_q31.c
  • arm_mat_scale_f32() : arm_math.h , arm_mat_scale_f32.c
  • arm_mat_scale_q15() : arm_math.h , arm_mat_scale_q15.c
  • arm_mat_scale_q31() : arm_math.h , arm_mat_scale_q31.c
  • arm_mat_sub_f32() : arm_math.h , arm_mat_sub_f32.c
  • arm_mat_sub_q15() : arm_math.h , arm_mat_sub_q15.c
  • arm_mat_sub_q31() : arm_mat_sub_q31.c , arm_math.h
  • arm_mat_trans_f32() : arm_mat_trans_f32.c , arm_math.h
  • arm_mat_trans_q15() : arm_math.h , arm_mat_trans_q15.c
  • arm_mat_trans_q31() : arm_math.h , arm_mat_trans_q31.c
  • arm_max_f32() : arm_max_f32.c , arm_math.h
  • arm_max_q15() : arm_math.h , arm_max_q15.c
  • arm_max_q31() : arm_max_q31.c , arm_math.h
  • arm_max_q7() : arm_math.h , arm_max_q7.c
  • arm_mean_f32() : arm_mean_f32.c , arm_math.h
  • arm_mean_q15() : arm_math.h , arm_mean_q15.c
  • arm_mean_q31() : arm_math.h , arm_mean_q31.c
  • arm_mean_q7() : arm_math.h , arm_mean_q7.c
  • arm_min_f32() : arm_min_f32.c , arm_math.h
  • arm_min_q15() : arm_min_q15.c , arm_math.h
  • arm_min_q31() : arm_min_q31.c , arm_math.h
  • arm_min_q7() : arm_math.h , arm_min_q7.c
  • arm_mult_f32() : arm_mult_f32.c , arm_math.h
  • arm_mult_q15() : arm_math.h , arm_mult_q15.c
  • arm_mult_q31() : arm_math.h , arm_mult_q31.c
  • arm_mult_q7() : arm_math.h , arm_mult_q7.c
  • arm_negate_f32() : arm_negate_f32.c , arm_math.h
  • arm_negate_q15() : arm_negate_q15.c , arm_math.h
  • arm_negate_q31() : arm_negate_q31.c , arm_math.h
  • arm_negate_q7() : arm_negate_q7.c , arm_math.h
  • arm_offset_f32() : arm_offset_f32.c , arm_math.h
  • arm_offset_q15() : arm_offset_q15.c , arm_math.h
  • arm_offset_q31() : arm_math.h , arm_offset_q31.c
  • arm_offset_q7() : arm_math.h , arm_offset_q7.c
  • arm_pid_init_f32() : arm_math.h , arm_pid_init_f32.c
  • arm_pid_init_q15() : arm_math.h , arm_pid_init_q15.c
  • arm_pid_init_q31() : arm_math.h , arm_pid_init_q31.c
  • arm_pid_reset_f32() : arm_math.h , arm_pid_reset_f32.c
  • arm_pid_reset_q15() : arm_math.h , arm_pid_reset_q15.c
  • arm_pid_reset_q31() : arm_math.h , arm_pid_reset_q31.c
  • arm_power_f32() : arm_math.h , arm_power_f32.c
  • arm_power_q15() : arm_math.h , arm_power_q15.c
  • arm_power_q31() : arm_math.h , arm_power_q31.c
  • arm_power_q7() : arm_power_q7.c , arm_math.h
  • arm_provide_guard_bits_q15() : math_helper.h , math_helper.c
  • arm_provide_guard_bits_q31() : math_helper.c , math_helper.h
  • arm_provide_guard_bits_q7() : math_helper.c
  • arm_q15_to_float() : arm_math.h , arm_q15_to_float.c
  • arm_q15_to_q31() : arm_q15_to_q31.c , arm_math.h
  • arm_q15_to_q7() : arm_q15_to_q7.c , arm_math.h
  • arm_q31_to_float() : arm_q31_to_float.c , arm_math.h
  • arm_q31_to_q15() : arm_math.h , arm_q31_to_q15.c
  • arm_q31_to_q7() : arm_math.h , arm_q31_to_q7.c
  • arm_q7_to_float() : arm_math.h , arm_q7_to_float.c
  • arm_q7_to_q15() : arm_q7_to_q15.c , arm_math.h
  • arm_q7_to_q31() : arm_math.h , arm_q7_to_q31.c
  • arm_radix4_butterfly_f32() : arm_math.h , arm_cfft_radix4_f32.c
  • arm_radix4_butterfly_inverse_f32() : arm_cfft_radix4_f32.c , arm_math.h
  • arm_radix4_butterfly_inverse_q15() : arm_cfft_radix4_q15.c , arm_math.h
  • arm_radix4_butterfly_inverse_q31() : arm_math.h , arm_cfft_radix4_q31.c
  • arm_radix4_butterfly_q15() : arm_cfft_radix4_q15.c , arm_math.h
  • arm_radix4_butterfly_q31() : arm_cfft_radix4_q31.c , arm_math.h
  • arm_rfft_f32() : arm_rfft_f32.c , arm_math.h
  • arm_rfft_init_f32() : arm_rfft_init_f32.c , arm_math.h
  • arm_rfft_init_q15() : arm_math.h , arm_rfft_init_q15.c
  • arm_rfft_init_q31() : arm_math.h , arm_rfft_init_q31.c
  • arm_rfft_q15() : arm_rfft_q15.c , arm_math.h
  • arm_rfft_q31() : arm_math.h , arm_rfft_q31.c
  • arm_rms_f32() : arm_rms_f32.c , arm_math.h
  • arm_rms_q15() : arm_math.h , arm_rms_q15.c
  • arm_rms_q31() : arm_math.h , arm_rms_q31.c
  • arm_scale_f32() : arm_math.h , arm_scale_f32.c
  • arm_scale_q15() : arm_math.h , arm_scale_q15.c
  • arm_scale_q31() : arm_scale_q31.c , arm_math.h
  • arm_scale_q7() : arm_math.h , arm_scale_q7.c
  • arm_shift_q15() : arm_math.h , arm_shift_q15.c
  • arm_shift_q31() : arm_shift_q31.c , arm_math.h
  • arm_shift_q7() : arm_shift_q7.c , arm_math.h
  • arm_sin_cos_f32() : arm_math.h , arm_sin_cos_f32.c
  • arm_sin_cos_q31() : arm_sin_cos_q31.c , arm_math.h
  • arm_sin_f32() : arm_sin_f32.c , arm_math.h
  • arm_sin_q15() : arm_sin_q15.c , arm_math.h
  • arm_sin_q31() : arm_math.h , arm_sin_q31.c
  • arm_snr_f32() : math_helper.c , math_helper.h
  • arm_split_rfft_f32() : arm_rfft_f32.c
  • arm_split_rfft_q15() : arm_rfft_q15.c
  • arm_split_rfft_q31() : arm_rfft_q31.c
  • arm_split_rifft_f32() : arm_rfft_f32.c
  • arm_split_rifft_q15() : arm_rfft_q15.c
  • arm_split_rifft_q31() : arm_rfft_q31.c
  • arm_sqrt_q15() : arm_math.h
  • arm_sqrt_q31() : arm_math.h
  • arm_std_f32() : arm_std_f32.c , arm_math.h
  • arm_std_q15() : arm_math.h , arm_std_q15.c
  • arm_std_q31() : arm_std_q31.c , arm_math.h
  • arm_sub_f32() : arm_math.h , arm_sub_f32.c
  • arm_sub_q15() : arm_math.h , arm_sub_q15.c
  • arm_sub_q31() : arm_sub_q31.c , arm_math.h
  • arm_sub_q7() : arm_sub_q7.c , arm_math.h
  • arm_var_f32() : arm_math.h , arm_var_f32.c
  • arm_var_q15() : arm_math.h , arm_var_q15.c
  • arm_var_q31() : arm_var_q31.c , arm_math.h
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- b -

  • Buffer_Init() : flash_2_ram.c , gpdma_sleep.c , master.c , i2s_irq_test.c , ssp_master.c , microwire_test.c , i2s_mclk.c , ssp_slave.c , ti_test.c , i2c_master_slave_int_test.c , i2s_test_4_wire.c , i2s_polling.c , gpdma_r2r_test.c , slave.c , spi_loopback_test.c , spi_master.c , i2s_dma_test.c , spi_slave.c , ssp_dma.c
  • Buffer_Verify() : ssp_master.c , ssp_slave.c , ti_test.c , gpdma_sleep.c , link_list.c , i2s_dma_test.c , i2s_irq_test.c , i2s_polling.c , spi_loopback_test.c , spi_slave.c , microwire_test.c , flash_2_ram.c , gpdma_r2r_test.c , i2s_test_4_wire.c , spi_master.c , ssp_dma.c , i2s_mclk.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
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  • Typedefs
  • Enumerations
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- c -

  • c_entry() : adc_burst_test.c , adc_dma_test.c , adc_interrupt_test.c , can_test_aflut.c , dac_speaker.c , slave.c , microwire_test.c , sc16is750_int.c , i2s_dma_test.c , sc16is750_polling.c , ssp_slave.c , dac_wave_generate.c , i2s_irq_test.c , ti_test.c , 10ms_base.c , i2s_mclk.c , systick_stclk.c , timer_capture.c , can_test_bypass_mode.c , emactest.c , i2s_test_4_wire.c , freqmeasure.c , gen_diff_delay.c , i2s_two_kit.c , gen_diff_freqs.c , timer_int_match.c , main.c , i2s_polling.c , timer_poll_match.c , pwm_signal.c , lcdtest.c , uart_autobaud_test.c , uart_dma_test.c , adc_polling_test.c , can_test_two_kit.c , flash_2_ram.c , lcdtest.c , uart_hw_flow_control.c , uart_interrupt_test.c , mcpwm_simple.c , uart_irda_receive.c , uart_irda_transmit.c , gpdma_sleep.c , nvic_priority.c , uart_polling_test.c , rs485_master.c , vt_relocation.c , rs485_slave.c , uart_fullmodem_test.c , bitband.c , link_list.c , template.c , wdt_interrupt_test.c , wdt_reset_test.c , pwm_dual_edge.c , gpdma_r2r_test.c , pwm_match_int.c , pwm_single_edge.c , adc_hardware_trigger_test.c , can_ledcontrol.c , mpu_test.c , gpio_int.c , extint_sleep.c , nmi_powerdown.c , LedBlinky.c , rtc_deeppwd.c , wdt_deepsleep.c , privilege.c , master.c , qei_test_velo.c , rit_interrupt.c , i2c_master_slave_int_test.c , rtc_alarm_cntincr_int.c , rtc_calib.c , can_self_test.c , dac_dma.c , i2c_monitor.c , spi_loopback_test.c , spi_master.c , pca8581_test.c , spi_interrupt_test.c , spi_polling_test.c , dac_sinewave_test.c , i2c_interrupt_test.c , spi_sdcard.c , spi_slave.c , i2c_polling_test.c , ssp_dma.c , ssp_master.c
  • CalcChecksum() : tcpip.c , tcpip.h
  • CAN_ChangeAFTable() : can_test_aflut.c
  • CAN_DeInit() : lpc17xx_can.h
  • CAN_FullCANIntGetStatus() : lpc17xx_can.h
  • CAN_FullCANPendGetStatus() : lpc17xx_can.h
  • CAN_GetCRStatus() : lpc17xx_can.h
  • CAN_GetCTRLStatus() : lpc17xx_can.h
  • CAN_Init() : lpc17xx_can.h
  • CAN_InitAFMessage() : can_test_aflut.c , can_test_two_kit.c
  • CAN_InitMessage() : can_ledcontrol.c , can_self_test.c , can_test_aflut.c , can_test_bypass_mode.c , can_test_two_kit.c
  • CAN_IntGetStatus() : lpc17xx_can.h
  • CAN_IRQCmd() : lpc17xx_can.h
  • CAN_IRQHandler() : can_test_bypass_mode.c , can_ledcontrol.c , can_self_test.c , can_test_aflut.c , can_test_two_kit.c
  • CAN_LoadExplicitEntry() : lpc17xx_can.h
  • CAN_LoadFullCANEntry() : lpc17xx_can.h
  • CAN_LoadGroupEntry() : lpc17xx_can.h
  • CAN_ModeConfig() : lpc17xx_can.h
  • CAN_PinCfg() : can_test_aflut.c
  • CAN_ReceiveMsg() : lpc17xx_can.h
  • CAN_RemoveEntry() : lpc17xx_can.h
  • CAN_SendMsg() : lpc17xx_can.h
  • CAN_SetAFMode() : lpc17xx_can.h
  • CAN_SetCommand() : lpc17xx_can.h
  • CAN_SetupAFLUT() : lpc17xx_can.h
  • CAN_SetupAFTable() : can_test_aflut.c , can_test_two_kit.c
  • CAN_VerifyMessage() : can_test_two_kit.c
  • CDC_BulkIn() : cdcuser.h , cdcuser.c
  • CDC_BulkOut() : cdcuser.c , cdcuser.h
  • CDC_ClearCommFeature() : cdcuser.c , cdcuser.h
  • CDC_GetCommFeature() : cdcuser.c , cdcuser.h
  • CDC_GetEncapsulatedResponse() : cdcuser.h , cdcuser.c
  • CDC_GetLineCoding() : cdcuser.c , cdcuser.h
  • CDC_GetSerialState() : cdcuser.h , cdcuser.c
  • CDC_Init() : cdcuser.h , cdcuser.c
  • CDC_NotificationIn() : cdcuser.h , cdcuser.c
  • CDC_OutBufAvailChar() : cdcuser.c , cdcuser.h
  • CDC_RdOutBuf() : cdcuser.c , cdcuser.h
  • CDC_SendBreak() : cdcuser.c , cdcuser.h
  • CDC_SendEncapsulatedCommand() : cdcuser.h , cdcuser.c
  • CDC_SetCommFeature() : cdcuser.h , cdcuser.c
  • CDC_SetControlLineState() : cdcuser.h , cdcuser.c
  • CDC_SetLineCoding() : cdcuser.c , cdcuser.h
  • CDC_WrOutBuf() : cdcuser.h , cdcuser.c
  • check_failed() : lpc17xx_libcfg_default.h
  • Check_Message() : can_self_test.c
  • CheckFrameReceived() : EMAC.h , EMAC.c
  • CLKPWR_ConfigPPWR() : lpc17xx_clkpwr.h
  • CLKPWR_DeepPowerDown() : lpc17xx_clkpwr.h
  • CLKPWR_DeepSleep() : lpc17xx_clkpwr.h
  • CLKPWR_GetPCLK() : lpc17xx_clkpwr.h
  • CLKPWR_GetPCLKSEL() : lpc17xx_clkpwr.h
  • CLKPWR_PowerDown() : lpc17xx_clkpwr.h
  • CLKPWR_SetPCLKDiv() : lpc17xx_clkpwr.h
  • CLKPWR_Sleep() : lpc17xx_clkpwr.h
  • clock_init() : clock-arch.c , clock.h
  • clock_time() : clock-arch.c , clock.h
  • CopyFromFrame_EMAC() : EMAC.h , EMAC.c
  • CopyToFrame_EMAC() : EMAC.h , EMAC.c
  • crc32_add() : crc32.c , crc32.h
  • crc32_bfr() : crc32.h , crc32.c
  • crc32_end() : crc32.c , crc32.h
  • crc32_init() : crc32.h , crc32.c
  • crc_7() : spi_sdcard.c
  • crc_7final() : spi_sdcard.c
  • CS_Force() : spi_interrupt_test.c , spi_sdcard.c , spi_polling_test.c , sc16is750_polling.c , sc16is750_int.c , spi_master.c
  • CS_Init() : spi_master.c , sc16is750_polling.c , spi_polling_test.c , sc16is750_int.c , spi_interrupt_test.c , spi_sdcard.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- d -

  • DAC_ConfigDAConverterControl() : lpc17xx_dac.h
  • DAC_Init() : lpc17xx_dac.h
  • DAC_SetBias() : lpc17xx_dac.h
  • DAC_SetDMATimeOut() : lpc17xx_dac.h
  • DAC_UpdateValue() : lpc17xx_dac.h
  • DataInFormat() : mscuser.c
  • DataInTransfer() : mscuser.c
  • debug_frmwrk_init() : debug_frmwrk.h , debug_frmwrk.c
  • delay() : gpio_int.c , nvic_priority.c , extint_sleep.c
  • Delay() : LedBlinky.c
  • dhcpc_appcall() : dhcpc.h
  • dhcpc_configured() : dhcpc.h
  • dhcpc_init() : dhcpc.h
  • dhcpc_request() : dhcpc.h
  • Dly100us() : lcdtest.c , drv_glcd.h
  • DMA_IRQHandler() : ssp_dma.c , uart_dma_test.c , i2s_dma_test.c , gpdma_r2r_test.c , adc_dma_test.c , flash_2_ram.c , gpdma_sleep.c , link_list.c , dac_dma.c
  • do_crc_behav() : crc32.h
  • DoNetworkStuff() : tcpip.h , tcpip.c
  • DummyReadFrame_EMAC() : EMAC.c , EMAC.h
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- e -

  • EINT0_IRQHandler() : nvic_priority.c
  • EINT3_IRQHandler() : adc_burst_test.c , nvic_priority.c , gpio_int.c
  • EMAC_CheckPHYStatus() : lpc17xx_emac.h
  • EMAC_CheckReceiveDataStatus() : lpc17xx_emac.h
  • EMAC_CheckReceiveIndex() : lpc17xx_emac.h
  • EMAC_CheckTransmitIndex() : lpc17xx_emac.h
  • EMAC_DeInit() : lpc17xx_emac.h
  • EMAC_GetReceiveDataSize() : lpc17xx_emac.h
  • EMAC_GetWoLStatus() : lpc17xx_emac.h
  • EMAC_Init() : lpc17xx_emac.h
  • EMAC_IntCmd() : lpc17xx_emac.h
  • EMAC_IntGetStatus() : lpc17xx_emac.h
  • EMAC_ReadPacketBuffer() : lpc17xx_emac.h
  • EMAC_SetFilterMode() : lpc17xx_emac.h
  • EMAC_SetHashFilter() : lpc17xx_emac.h
  • EMAC_SetPHYMode() : lpc17xx_emac.h
  • EMAC_UpdatePHYStatus() : lpc17xx_emac.h
  • EMAC_UpdateRxConsumeIndex() : lpc17xx_emac.h
  • EMAC_UpdateTxProduceIndex() : lpc17xx_emac.h
  • EMAC_WritePacketBuffer() : lpc17xx_emac.h
  • EndReadFrame() : EMAC.c , EMAC.h
  • ENET_IRQHandler() : emactest.c
  • EPAdr() : usbhw.c
  • Error_Loop() : gpdma_sleep.c , ssp_slave.c , link_list.c , microwire_test.c , gpdma_r2r_test.c , spi_master.c , pca8581_test.c , spi_loopback_test.c , i2c_polling_test.c , i2c_interrupt_test.c , ssp_dma.c , ti_test.c , spi_slave.c , flash_2_ram.c , ssp_master.c
  • Error_Loop_M() : i2c_master_slave_int_test.c
  • Error_Loop_S() : i2c_master_slave_int_test.c
  • EXTI_ClearEXTIFlag() : lpc17xx_exti.h
  • EXTI_Config() : lpc17xx_exti.h
  • EXTI_DeInit() : lpc17xx_exti.h
  • EXTI_Init() : lpc17xx_exti.h
  • EXTI_SetMode() : lpc17xx_exti.h
  • EXTI_SetPolarity() : lpc17xx_exti.h
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- f -

  • FCAN_ReadObj() : lpc17xx_can.h
  • ferror() : Retarget.c
  • fgetc() : Retarget.c
  • FIO_ByteClearValue() : lpc17xx_gpio.h
  • FIO_ByteReadValue() : lpc17xx_gpio.h
  • FIO_ByteSetDir() : lpc17xx_gpio.h
  • FIO_ByteSetMask() : lpc17xx_gpio.h
  • FIO_ByteSetValue() : lpc17xx_gpio.h
  • FIO_ClearInt() : lpc17xx_gpio.h
  • FIO_ClearValue() : lpc17xx_gpio.h
  • FIO_GetIntStatus() : lpc17xx_gpio.h
  • FIO_HalfWordClearValue() : lpc17xx_gpio.h
  • FIO_HalfWordReadValue() : lpc17xx_gpio.h
  • FIO_HalfWordSetDir() : lpc17xx_gpio.h
  • FIO_HalfWordSetMask() : lpc17xx_gpio.h
  • FIO_HalfWordSetValue() : lpc17xx_gpio.h
  • FIO_IntCmd() : lpc17xx_gpio.h
  • FIO_ReadValue() : lpc17xx_gpio.h
  • FIO_SetDir() : lpc17xx_gpio.h
  • FIO_SetMask() : lpc17xx_gpio.h
  • FIO_SetValue() : lpc17xx_gpio.h
  • fputc() : Retarget.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- g -

  • get_potval() : usbdmain.c
  • GetAD7Val() : easyweb.c , easyweb.h
  • getchar() : Serial.c
  • getinput() : arm_signal_converge_example_f32.c
  • GetInReport() : demo.c , demo.h
  • getkey() : Retarget.c , Serial.c
  • GetTempVal() : easyweb.c , easyweb.h
  • GLCD_Backlight() : glcd_ll.c , glcd_ll.h
  • GLCD_Bargraph() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_Bitmap() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_Bmp() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_Clear() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_ClearLn() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_DisplayChar() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_DisplayString() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_DrawChar() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_Init() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_LLInit() : glcd_ll.c , glcd_ll.h
  • GLCD_PowerUpInit() : drv_glcd.c , drv_glcd.h
  • GLCD_print() : drv_glcd.c , drv_glcd.h
  • GLCD_putchar() : drv_glcd.c , drv_glcd.h
  • GLCD_PutPixel() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_SendCmd() : drv_glcd.c , drv_glcd.h
  • GLCD_SetBackColor() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_SetFont() : drv_glcd.h , drv_glcd.c
  • GLCD_SetReset() : glcd_ll.c , glcd_ll.h
  • GLCD_SetTextColor() : GLCD.h , GLCD_SPI_LPC1700.c
  • GLCD_SetWindow() : drv_glcd.c , drv_glcd.h
  • GLCD_SPI_ChipSelect() : glcd_ll.h , glcd_ll.c
  • GLCD_SPI_Init() : glcd_ll.c , glcd_ll.h
  • GLCD_SPI_ReceiveBlock() : glcd_ll.c , glcd_ll.h
  • GLCD_SPI_SendBlock() : glcd_ll.h , glcd_ll.c
  • GLCD_SPI_SetClockFreq() : glcd_ll.h , glcd_ll.c
  • GLCD_SPI_SetWordWidth() : glcd_ll.c , glcd_ll.h
  • GLCD_SPI_TranserByte() : glcd_ll.c , glcd_ll.h
  • GLCD_TextSetPos() : drv_glcd.c , drv_glcd.h
  • GLCD_TextSetTabSize() : drv_glcd.c , drv_glcd.h
  • GLCD_WindowMax() : GLCD.h , GLCD_SPI_LPC1700.c
  • GPDMA_ChannelCmd() : lpc17xx_gpdma.h
  • GPDMA_ClearIntPending() : lpc17xx_gpdma.h
  • GPDMA_Init() : lpc17xx_gpdma.h
  • GPDMA_IntGetStatus() : lpc17xx_gpdma.h
  • GPDMA_Setup() : lpc17xx_gpdma.h
  • GPIO_ClearInt() : lpc17xx_gpio.h
  • GPIO_ClearValue() : lpc17xx_gpio.h
  • GPIO_GetIntStatus() : lpc17xx_gpio.h
  • GPIO_IntCmd() : lpc17xx_gpio.h
  • GPIO_ReadValue() : lpc17xx_gpio.h
  • GPIO_SetDir() : lpc17xx_gpio.h
  • GPIO_SetValue() : lpc17xx_gpio.h
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- h -

  • hello_world_appcall() : hello-world.c
  • hello_world_init() : hello-world.c
  • HID_GetIdle() : hiduser.h , hiduser.c
  • HID_GetProtocol() : hiduser.c , hiduser.h
  • HID_GetReport() : hiduser.h , hiduser.c
  • HID_SetIdle() : hiduser.c , hiduser.h
  • HID_SetProtocol() : hiduser.c , hiduser.h
  • HID_SetReport() : hiduser.c , hiduser.h
  • htons() : uip.h , uip.c
  • httpd_appcall() : httpd.h
  • httpd_cgi() : httpd-cgi.h
  • HTTPD_CGI_CALL() : httpd-cgi.c
  • httpd_cgi_init() : httpd-cgi.h
  • httpd_fs_count() : httpd-fs.c , httpd-fs.h
  • httpd_fs_init() : httpd-fs.h , httpd-fs.c
  • httpd_fs_open() : httpd-fs.h , httpd-fs.c
  • httpd_init() : httpd.h
  • httpd_log() : httpd.h
  • httpd_log_file() : httpd.h
  • HTTPServer() : easyweb.h , easyweb.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- i -

  • I2C0_IRQHandler() : i2c_master_slave_int_test.c , i2c_monitor.c , i2c_interrupt_test.c
  • I2C2_IRQHandler() : i2c_master_slave_int_test.c
  • I2C_Cmd() : lpc17xx_i2c.h
  • I2C_DeInit() : lpc17xx_i2c.h
  • I2C_GetLastStatusCode() : lpc17xx_i2c.h
  • I2C_Init() : lpc17xx_i2c.h
  • I2C_IntCmd() : lpc17xx_i2c.h
  • I2C_MasterHandler() : lpc17xx_i2c.h
  • I2C_MasterTransferComplete() : lpc17xx_i2c.h
  • I2C_MasterTransferData() : lpc17xx_i2c.h
  • I2C_MonitorGetDatabuffer() : lpc17xx_i2c.h
  • I2C_MonitorHandler() : lpc17xx_i2c.h
  • I2C_MonitorModeCmd() : lpc17xx_i2c.h
  • I2C_MonitorModeConfig() : lpc17xx_i2c.h
  • I2C_SetOwnSlaveAddr() : lpc17xx_i2c.h
  • I2C_SlaveHandler() : lpc17xx_i2c.h
  • I2C_SlaveTransferComplete() : lpc17xx_i2c.h
  • I2C_SlaveTransferData() : lpc17xx_i2c.h
  • I2S_Config() : lpc17xx_i2s.h
  • I2S_DeInit() : lpc17xx_i2s.h
  • I2S_DMACmd() : lpc17xx_i2s.h
  • I2S_DMAConfig() : lpc17xx_i2s.h
  • I2S_FreqConfig() : lpc17xx_i2s.h
  • I2S_GetIRQDepth() : lpc17xx_i2s.h
  • I2S_GetIRQStatus() : lpc17xx_i2s.h
  • I2S_GetLevel() : lpc17xx_i2s.h
  • I2S_Init() : lpc17xx_i2s.h
  • I2S_IRQCmd() : lpc17xx_i2s.h
  • I2S_IRQConfig() : lpc17xx_i2s.h
  • I2S_IRQHandler() : i2s_irq_test.c , i2s_mclk.c , i2s_two_kit.c
  • I2S_ModeConfig() : lpc17xx_i2s.h
  • I2S_Mute() : lpc17xx_i2s.h
  • I2S_Pause() : lpc17xx_i2s.h
  • I2S_Receive() : lpc17xx_i2s.h
  • I2S_Send() : lpc17xx_i2s.h
  • I2S_SetBitRate() : lpc17xx_i2s.h
  • I2S_Start() : lpc17xx_i2s.h
  • I2S_Stop() : lpc17xx_i2s.h
  • Init_EMAC() : EMAC.h , EMAC.c
  • init_serial() : Serial.c
  • InitLED() : extint_sleep.c
  • InitOsc() : easyweb.h
  • InitPorts() : easyweb.h
  • InsertDynamicValues() : easyweb.c , easyweb.h
  • IsBroadcast() : tcpip.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- p -

  • PacketGen() : emactest.c
  • PCA8581_Read() : pca8581_test.c
  • PCA8581_Write() : pca8581_test.c
  • PINSEL_ConfigPin() : lpc17xx_pinsel.h
  • PINSEL_ConfigTraceFunc() : lpc17xx_pinsel.h
  • PINSEL_SetI2C0Pins() : lpc17xx_pinsel.h
  • PrepareARP_ANSWER() : tcpip.h , tcpip.c
  • PrepareARP_REQUEST() : tcpip.c , tcpip.h
  • PrepareICMP_ECHO_REPLY() : tcpip.c , tcpip.h
  • PrepareTCP_DATA_FRAME() : tcpip.c , tcpip.h
  • PrepareTCP_FRAME() : tcpip.h , tcpip.c
  • print_menu() : master.c , sc16is750_polling.c , ssp_slave.c , i2c_master_slave_int_test.c , ti_test.c , timer_capture.c , adc_burst_test.c , i2c_monitor.c , freqmeasure.c , gen_diff_delay.c , pca8581_test.c , gen_diff_freqs.c , timer_int_match.c , adc_dma_test.c , i2c_interrupt_test.c , timer_poll_match.c , pwm_signal.c , i2c_polling_test.c , uart_autobaud_test.c , uart_dma_test.c , adc_hardware_trigger_test.c , slave.c , uart_hw_flow_control.c , uart_interrupt_test.c , i2s_dma_test.c , uart_irda_receive.c , uart_irda_transmit.c , wdt_interrupt_test.c , uart_fullmodem_test.c , rs485_slave.c , adc_interrupt_test.c , i2s_irq_test.c , uart_polling_test.c , rs485_master.c , i2s_mclk.c , adc_polling_test.c , i2s_test_4_wire.c , i2s_two_kit.c , can_ledcontrol.c , i2s_polling.c , lcdtest.c , can_self_test.c , nvic_priority.c , vt_relocation.c , can_test_aflut.c , extint_sleep.c , nmi_powerdown.c , can_test_bypass_mode.c , sc16is750_int.c , microwire_test.c , ssp_master.c , rtc_deeppwd.c , spi_slave.c , spi_sdcard.c , wdt_deepsleep.c , can_test_two_kit.c , spi_master.c , rtc_alarm_cntincr_int.c , rtc_calib.c , dac_wave_generate.c , spi_loopback_test.c , flash_2_ram.c , spi_interrupt_test.c , spi_polling_test.c , gpdma_sleep.c , link_list.c , ssp_dma.c , gpdma_r2r_test.c
  • printf() : printf-stdarg.c
  • PrintMessage() : can_self_test.c , can_test_aflut.c , can_test_two_kit.c , can_test_bypass_mode.c
  • ProcessEthBroadcastFrame() : tcpip.h , tcpip.c
  • ProcessEthIAFrame() : tcpip.c , tcpip.h
  • ProcessICMPFrame() : tcpip.h , tcpip.c
  • ProcessTCPFrame() : tcpip.c , tcpip.h
  • psock_datalen() : psock.h , psock.c
  • psock_init() : psock.h
  • psock_newdata() : psock.c , psock.h
  • PT_THREAD() : psock.h , httpd-cgi.h , psock.h , psock.c
  • PWM1_IRQHandler() : pwm_match_int.c
  • PWM_ChannelCmd() : lpc17xx_pwm.h
  • PWM_ChannelConfig() : lpc17xx_pwm.h
  • PWM_ClearIntPending() : lpc17xx_pwm.h
  • PWM_Cmd() : lpc17xx_pwm.h
  • PWM_ConfigCapture() : lpc17xx_pwm.h
  • PWM_ConfigMatch() : lpc17xx_pwm.h
  • PWM_ConfigStructInit() : lpc17xx_pwm.h
  • PWM_CounterCmd() : lpc17xx_pwm.h
  • PWM_DeInit() : lpc17xx_pwm.h
  • PWM_GetCaptureValue() : lpc17xx_pwm.h
  • PWM_GetIntStatus() : lpc17xx_pwm.h
  • PWM_Init() : lpc17xx_pwm.h
  • PWM_MatchUpdate() : lpc17xx_pwm.h
  • PWM_MultiMatchUpdate() : lpc17xx_pwm.c
  • PWM_PinConfig() : lpc17xx_pwm.h
  • PWM_ResetCounter() : lpc17xx_pwm.h
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- q -

  • QEI_CalculateRPM() : lpc17xx_qei.h
  • QEI_ConfigStructInit() : lpc17xx_qei.h
  • QEI_DeInit() : lpc17xx_qei.h
  • QEI_GetIndex() : lpc17xx_qei.h
  • QEI_GetIntStatus() : lpc17xx_qei.h
  • QEI_GetPosition() : lpc17xx_qei.h
  • QEI_GetStatus() : lpc17xx_qei.h
  • QEI_GetTimer() : lpc17xx_qei.h
  • QEI_GetVelocity() : lpc17xx_qei.h
  • QEI_GetVelocityCap() : lpc17xx_qei.h
  • QEI_Init() : lpc17xx_qei.h
  • QEI_IntClear() : lpc17xx_qei.h
  • QEI_IntCmd() : lpc17xx_qei.h
  • QEI_IntSet() : lpc17xx_qei.h
  • QEI_IRQHandler() : qei_test_velo.c
  • QEI_Reset() : lpc17xx_qei.h
  • QEI_SetDigiFilter() : lpc17xx_qei.h
  • QEI_SetIndexComp() : lpc17xx_qei.h
  • QEI_SetMaxPosition() : lpc17xx_qei.h
  • QEI_SetPositionComp() : lpc17xx_qei.h
  • QEI_SetTimerReload() : lpc17xx_qei.h
  • QEI_SetVelocityComp() : lpc17xx_qei.h
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
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- r -

  • RdCmdDat() : usbhw.c
  • Rdy4Tx() : EMAC.c , EMAC.h
  • ReadFrame_EMAC() : EMAC.c
  • ReadFrameBE_EMAC() : EMAC.c , EMAC.h
  • RequestSend() : EMAC.c , EMAC.h
  • resolv_appcall() : resolv.c
  • resolv_conf() : resolv.c
  • resolv_found() : resolv.h
  • resolv_getserver() : resolv.c
  • resolv_init() : resolv.c
  • resolv_lookup() : resolv.c
  • resolv_query() : resolv.c
  • RIT_Cmd() : lpc17xx_rit.h
  • RIT_DeInit() : lpc17xx_rit.h
  • RIT_GetIntStatus() : lpc17xx_rit.h
  • RIT_Init() : lpc17xx_rit.h
  • RIT_IRQHandler() : rit_interrupt.c
  • RIT_TimerClearCmd() : lpc17xx_rit.h
  • RIT_TimerConfig() : lpc17xx_rit.h
  • RIT_TimerDebugCmd() : lpc17xx_rit.h
  • RTC_AlarmIntConfig() : lpc17xx_rtc.h
  • RTC_CalibConfig() : lpc17xx_rtc.h
  • RTC_CalibCounterCmd() : lpc17xx_rtc.h
  • RTC_ClearIntPending() : lpc17xx_rtc.h
  • RTC_Cmd() : lpc17xx_rtc.h
  • RTC_CntIncrIntConfig() : lpc17xx_rtc.h
  • RTC_DeInit() : lpc17xx_rtc.h
  • RTC_GetAlarmTime() : lpc17xx_rtc.h
  • RTC_GetFullAlarmTime() : lpc17xx_rtc.h
  • RTC_GetFullTime() : lpc17xx_rtc.h
  • RTC_GetIntPending() : lpc17xx_rtc.h
  • RTC_GetTime() : lpc17xx_rtc.h
  • RTC_Init() : lpc17xx_rtc.h
  • RTC_IRQHandle() : rtc_calib.c
  • RTC_IRQHandler() : rtc_alarm_cntincr_int.c , rtc_deeppwd.c , rtc_calib.c
  • RTC_ReadGPREG() : lpc17xx_rtc.h
  • RTC_ResetClockTickCounter() : lpc17xx_rtc.h
  • RTC_SetAlarmTime() : lpc17xx_rtc.h
  • RTC_SetFullAlarmTime() : lpc17xx_rtc.h
  • RTC_SetFullTime() : lpc17xx_rtc.h
  • RTC_SetTime() : lpc17xx_rtc.h
  • RTC_WriteGPREG() : lpc17xx_rtc.h
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- s -

  • SD_GetCardConnectStatus() : spi_sdcard.c
  • SD_GetCID() : spi_sdcard.c
  • SD_Init() : spi_sdcard.c
  • SD_SendCommand() : spi_sdcard.c
  • SD_SendReceiveData_Polling() : spi_sdcard.c
  • SD_WaitDeviceIdle() : spi_sdcard.c
  • SD_WaitR1() : spi_sdcard.c
  • sendchar() : printf-stdarg.c , Retarget.c , Serial.c
  • SendFrame1() : tcpip.c , tcpip.h
  • SendFrame2() : tcpip.c , tcpip.h
  • ser_AvailChar() : serial.h , serial.c
  • ser_ClosePort() : serial.c , serial.h
  • ser_InitPort0() : serial.c , serial.h
  • ser_InitPort1() : serial.c , serial.h
  • ser_LineState() : serial.c , serial.h
  • ser_OpenPort() : serial.c , serial.h
  • ser_Read() : serial.c , serial.h
  • ser_Write() : serial.c , serial.h
  • SetOutReport() : demo.h , demo.c
  • shell_init() : shell.c , shell.h
  • shell_input() : shell.c , shell.h
  • shell_output() : shell.h , telnetd.c
  • shell_prompt() : shell.h , telnetd.c
  • shell_quit() : shell.h , telnetd.c
  • shell_start() : shell.c , shell.h
  • smtp_appcall() : smtp.h
  • smtp_configure() : smtp.h
  • smtp_done() : smtp.h
  • smtp_init() : smtp.h
  • smtp_send() : smtp.h
  • snprintf() : printf-stdarg.c
  • SPI_CheckStatus() : lpc17xx_spi.h
  • SPI_ClearIntPending() : lpc17xx_spi.h
  • SPI_ConfigStructInit() : lpc17xx_spi.h
  • SPI_DeInit() : lpc17xx_spi.h
  • SPI_GetDataSize() : lpc17xx_spi.h
  • SPI_GetIntStatus() : lpc17xx_spi.h
  • SPI_GetStatus() : lpc17xx_spi.h
  • SPI_Init() : lpc17xx_spi.h
  • SPI_IntCmd() : lpc17xx_spi.h
  • SPI_IRQHandler() : spi_interrupt_test.c
  • SPI_ReadWrite() : lpc17xx_spi.h
  • SPI_ReceiveData() : lpc17xx_spi.h
  • SPI_SendData() : lpc17xx_spi.h
  • SPI_SetClock() : lpc17xx_spi.h
  • sprintf() : printf-stdarg.c
  • SSP0_IRQHandler() : sc16is750_int.c , ssp_slave.c , ti_test.c
  • SSP1_IRQHandler() : ti_test.c
  • SSP_ClearIntPending() : lpc17xx_ssp.h
  • SSP_Cmd() : lpc17xx_ssp.h
  • SSP_ConfigStructInit() : lpc17xx_ssp.h
  • SSP_DeInit() : lpc17xx_ssp.h
  • SSP_DMACmd() : lpc17xx_ssp.h
  • SSP_GetDataSize() : lpc17xx_ssp.h
  • SSP_GetIntStatus() : lpc17xx_ssp.h
  • SSP_GetRawIntStatus() : lpc17xx_ssp.h
  • SSP_GetRawIntStatusReg() : lpc17xx_ssp.h
  • SSP_GetStatus() : lpc17xx_ssp.h
  • SSP_Init() : lpc17xx_ssp.h
  • SSP_IntConfig() : lpc17xx_ssp.h
  • SSP_LoopBackCmd() : lpc17xx_ssp.h
  • ssp_Master_IntHandler() : ti_test.c
  • ssp_MasterReadWrite() : ti_test.c
  • ssp_MW_GetCMD() : microwire_test.c
  • ssp_MW_GetRSP() : microwire_test.c
  • ssp_MW_SendCMD() : microwire_test.c
  • ssp_MW_SendRSP() : microwire_test.c
  • SSP_ReadWrite() : lpc17xx_ssp.h
  • SSP_ReceiveData() : lpc17xx_ssp.h
  • SSP_SendData() : lpc17xx_ssp.h
  • ssp_Slave_IntHandler() : ti_test.c
  • SSP_SlaveOutputCmd() : lpc17xx_ssp.h
  • ssp_SlaveReadWrite() : ti_test.c
  • StartReadFrame() : EMAC.c , EMAC.h
  • SVC_Handler() : privilege.c
  • SwapBytes() : tcpip.c , tcpip.h
  • SystemCoreClockUpdate() : system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM3.c , system_ARMCM4.c , system_LPC17xx.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_LPC17xx.h , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c
  • SystemInit() : system_ARMCM3.c , system_ARMCM4.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM4.c , system_ARMCM3.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM0.c , system_ARMCM4.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM4.c , system_LPC17xx.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM0.c , system_ARMCM3.c , system_LPC17xx.h , system_ARMCM0.c , system_ARMCM4.c , system_ARMCM3.c
  • SYSTICK_ClearCounterFlag() : lpc17xx_systick.h
  • SYSTICK_Cmd() : lpc17xx_systick.h
  • SYSTICK_ExternalInit() : lpc17xx_systick.h
  • SYSTICK_GetCurrentValue() : lpc17xx_systick.h
  • SysTick_Handler() : clock-arch.c , 10ms_base.c , vt_relocation.c , tcpip.h , tcpip.c , LedBlinky.c , systick_stclk.c
  • SYSTICK_IntCmd() : lpc17xx_systick.h
  • SYSTICK_InternalInit() : lpc17xx_systick.h
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
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- t -

  • tapdev_init() : emac.c , emac.h
  • tapdev_read() : emac.h , emac.c
  • tapdev_send() : emac.c , emac.h
  • TCPActiveOpen() : tcpip.h , tcpip.c
  • TCPClose() : tcpip.c , tcpip.h
  • TCPHandleRetransmission() : tcpip.c , tcpip.h
  • TCPHandleTimeout() : tcpip.c , tcpip.h
  • TCPLowLevelInit() : tcpip.h , tcpip.c
  • TCPPassiveOpen() : tcpip.c , tcpip.h
  • TCPReleaseRxBuffer() : tcpip.c , tcpip.h
  • TCPRestartTimer() : tcpip.c , tcpip.h
  • TCPStartRetryTimer() : tcpip.c , tcpip.h
  • TCPStartTimeWaitTimer() : tcpip.c , tcpip.h
  • TCPStopTimer() : tcpip.c , tcpip.h
  • TCPTransmitTxBuffer() : tcpip.c , tcpip.h
  • telnetd_appcall() : telnetd.h , telnetd.c
  • telnetd_init() : telnetd.c
  • test_signal_converge() : arm_signal_converge_example_f32.c
  • test_signal_converge_example() : arm_signal_converge_example_f32.c
  • TIM_ClearIntCapturePending() : lpc17xx_timer.h
  • TIM_ClearIntPending() : lpc17xx_timer.h
  • TIM_Cmd() : lpc17xx_timer.h
  • TIM_ConfigCapture() : lpc17xx_timer.h
  • TIM_ConfigMatch() : lpc17xx_timer.h
  • TIM_ConfigStructInit() : lpc17xx_timer.h
  • TIM_DeInit() : lpc17xx_timer.h
  • TIM_GetCaptureValue() : lpc17xx_timer.h
  • TIM_GetIntCaptureStatus() : lpc17xx_timer.h
  • TIM_GetIntStatus() : lpc17xx_timer.h
  • TIM_Init() : lpc17xx_timer.h
  • TIM_ResetCounter() : lpc17xx_timer.h
  • TIM_SetMatchExt() : lpc17xx_timer.h
  • TIM_UpdateMatchValue() : lpc17xx_timer.h
  • TIMER0_IRQHandler() : qei_test_velo.c , gen_diff_delay.c , freqmeasure.c , usbdmain.c , lcdtest.c , timer_int_match.c , timer_capture.c , pwm_signal.c
  • TIMER1_IRQHandler() : timer_capture.c , pwm_signal.c
  • TIMER2_IRQHandler() : pwm_signal.c
  • TIMER3_IRQHandler() : pwm_signal.c
  • timer_expired() : timer.c
  • timer_reset() : timer.c
  • timer_restart() : timer.c
  • timer_set() : timer.c
  • Turn_off_LED() : privilege.c
  • Turn_on_LED() : privilege.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- u -

  • UART0_IRQHandler() : uart_autobaud_test.c , uart_interrupt_test.c , serial.c
  • UART1_IntErr() : uart_fullmodem_test.c
  • UART1_IntReceive() : uart_fullmodem_test.c
  • UART1_IntTransmit() : uart_fullmodem_test.c
  • UART1_IRQHandler() : rs485_slave.c , uart_fullmodem_test.c , serial.c , rs485_master.c
  • UART_ABClearIntPending() : lpc17xx_uart.h
  • UART_ABCmd() : lpc17xx_uart.h
  • UART_CheckBusy() : lpc17xx_uart.h
  • UART_ConfigStructInit() : lpc17xx_uart.h
  • UART_DeInit() : lpc17xx_uart.h
  • UART_FIFOConfig() : lpc17xx_uart.h
  • UART_FIFOConfigStructInit() : lpc17xx_uart.h
  • UART_ForceBreak() : lpc17xx_uart.h
  • UART_FullModemConfigMode() : lpc17xx_uart.h
  • UART_FullModemForcePinState() : lpc17xx_uart.h
  • UART_FullModemGetStatus() : lpc17xx_uart.h
  • UART_GetIntId() : lpc17xx_uart.h
  • UART_GetLineStatus() : lpc17xx_uart.h
  • UART_Init() : lpc17xx_uart.h
  • UART_IntConfig() : lpc17xx_uart.h
  • UART_IntErr() : uart_interrupt_test.c , rs485_master.c , rs485_slave.c
  • UART_IntReceive() : uart_interrupt_test.c , rs485_master.c , rs485_slave.c
  • UART_IntTransmit() : uart_interrupt_test.c
  • UART_IrDACmd() : lpc17xx_uart.h
  • UART_IrDAInvtInputCmd() : lpc17xx_uart.h
  • UART_IrDAPulseDivConfig() : lpc17xx_uart.h
  • UART_Receive() : lpc17xx_uart.h
  • UART_ReceiveByte() : lpc17xx_uart.h
  • UART_RS485Config() : lpc17xx_uart.h
  • UART_RS485ReceiverCmd() : lpc17xx_uart.h
  • UART_RS485Send() : lpc17xx_uart.c
  • UART_RS485SendData() : lpc17xx_uart.h
  • UART_RS485SendSlvAddr() : lpc17xx_uart.h
  • UART_Send() : lpc17xx_uart.h
  • UART_SendByte() : lpc17xx_uart.h
  • UART_TxCmd() : lpc17xx_uart.h
  • UARTGetChar() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutChar() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutDec() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutDec16() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutDec32() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutHex() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutHex16() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPutHex32() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPuts() : debug_frmwrk.h , debug_frmwrk.c
  • UARTPuts_() : debug_frmwrk.h , debug_frmwrk.c
  • UARTReceive() : uart_interrupt_test.c , rs485_master.c , rs485_slave.c , uart_fullmodem_test.c
  • UARTSend() : uart_interrupt_test.c , uart_fullmodem_test.c
  • uip_add32() : uip.c , uip_arch.h
  • uip_arp_arpin() : uip_arp.c
  • uip_arp_init() : uip_arp.c
  • uip_arp_ipin() : uip_arp.c
  • uip_arp_out() : uip_arp.c
  • uip_arp_timer() : uip_arp.c
  • uip_chksum() : uip.c , uip_arch.h
  • uip_connect() : uip.c , uip.h
  • uip_fw_default() : uip-fw.c
  • uip_fw_forward() : uip-fw.c
  • uip_fw_init() : uip-fw.c
  • uip_fw_output() : uip-fw.c
  • uip_fw_periodic() : uip-fw.c
  • uip_fw_register() : uip-fw.c
  • uip_init() : uip.c , uip.h
  • uip_ipchksum() : uip.c , uip_arch.h
  • uip_listen() : uip.c , uip.h
  • uip_log() : main.c , uip.c , uipopt.h
  • uip_neighbor_add() : uip-neighbor.c , uip-neighbor.h
  • uip_neighbor_init() : uip-neighbor.c , uip-neighbor.h
  • uip_neighbor_lookup() : uip-neighbor.c , uip-neighbor.h
  • uip_neighbor_periodic() : uip-neighbor.c , uip-neighbor.h
  • uip_neighbor_update() : uip-neighbor.c , uip-neighbor.h
  • uip_process() : uip.c
  • uip_send() : uip.c , uip.h
  • uip_setipid() : uip.c , uip.h
  • uip_split_output() : uip-split.c , uip-split.h
  • uip_tcpchksum() : uip.c , uip_arch.h
  • uip_udp_new() : uip.h
  • uip_udpchksum() : uip.c , uip_arch.h
  • uip_unlisten() : uip.c , uip.h
  • uiplib_ipaddrconv() : uiplib.c , uiplib.h
  • USB_ClearEPBuf() : usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_ClrStallEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_ConfigEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_Configure() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_Configure_Event() : usbuser.h
  • USB_Connect() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_DataInStage() : usbcore.c
  • USB_DataOutStage() : usbcore.c
  • USB_DirCtrlEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_DisableEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_DMA_BufAdr() : usbhw.h
  • USB_DMA_BufCnt() : usbhw.h
  • USB_DMA_Disable() : usbhw.h
  • USB_DMA_Enable() : usbhw.h
  • USB_DMA_Setup() : usbhw.h
  • USB_DMA_Status() : usbhw.h
  • USB_EnableEP() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_EndPoint0() : usbcore.c , usbuser.h , usbcore.c , usbuser.h , usbcore.c , usbuser.h , usbcore.c , usbuser.h
  • USB_EndPoint1() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint10() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint11() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint12() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint13() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint14() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint15() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint2() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint3() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint4() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint5() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint6() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint7() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint8() : usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_EndPoint9() : usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_Error_Event() : usbuser.h
  • USB_Feature_Event() : usbuser.h
  • USB_GetDescriptor() : usbcore.c
  • USB_GetFrame() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_GetStatus() : usbcore.c
  • USB_Init() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_Interface_Event() : usbuser.h
  • USB_IRQHandler() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_Power_Event() : usbuser.h
  • USB_ReadEP() : usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_ReqGetConfiguration() : usbcore.c
  • USB_ReqGetDescriptor() : usbcore.c
  • USB_ReqGetInterface() : usbcore.c
  • USB_ReqGetStatus() : usbcore.c
  • USB_ReqSetAddress() : usbcore.c
  • USB_ReqSetClrFeature() : usbcore.c
  • USB_ReqSetConfiguration() : usbcore.c
  • USB_ReqSetInterface() : usbcore.c
  • USB_Reset() : usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_Reset_Event() : usbuser.h
  • USB_ResetCore() : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c
  • USB_ResetEP() : usbhw.h , usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_Resume() : usbhw.h , usbhw.c , usbhw.h
  • USB_Resume_Event() : usbuser.h
  • USB_SetAddress() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_SetClrFeature() : usbcore.c
  • USB_SetConfiguration() : usbcore.c
  • USB_SetInterface() : usbcore.c
  • USB_SetStallEP() : usbhw.c , usbhw.h , usbhw.c
  • USB_SetupStage() : usbcore.c
  • USB_SOF_Event() : usbuser.h
  • USB_StatusInStage() : usbcore.c
  • USB_StatusOutStage() : usbcore.c
  • USB_Suspend() : usbhw.c , usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • USB_Suspend_Event() : usbuser.h
  • USB_WakeUp() : usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_WakeUp_Event() : usbuser.h
  • USB_WakeUpCfg() : usbhw.c , usbhw.h , usbhw.c , usbhw.h
  • USB_WriteEP() : usbhw.h , usbhw.c , usbhw.h , usbhw.c
  • Usr_Init_Emac() : emactest.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- v -

  • VCOM_CheckSerialState() : vcomdemo.c
  • VCOM_Init() : vcomdemo.c
  • VCOM_Serial2Usb() : vcomdemo.c
  • VCOM_Usb2Serial() : vcomdemo.c
  • VirtualQEISignal_Init() : qei_test_velo.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
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- w -

  • WDT_ClrTimeOutFlag() : lpc17xx_wdt.h
  • WDT_Feed() : lpc17xx_wdt.h
  • WDT_GetCurrentCount() : lpc17xx_wdt.h
  • WDT_Init() : lpc17xx_wdt.h
  • WDT_IRQHandler() : wdt_deepsleep.c , wdt_interrupt_test.c
  • WDT_ReadTimeOutFlag() : lpc17xx_wdt.h
  • WDT_Start() : lpc17xx_wdt.h
  • WDT_UpdateTimeOut() : lpc17xx_wdt.h
  • webclient_aborted() : webclient.h
  • webclient_appcall() : webclient.c
  • webclient_close() : webclient.c
  • webclient_closed() : webclient.h
  • webclient_connected() : webclient.h
  • webclient_datahandler() : webclient.h
  • webclient_filename() : webclient.c
  • webclient_get() : webclient.c
  • webclient_hostname() : webclient.c
  • webclient_init() : webclient.c
  • webclient_mimetype() : webclient.c
  • webclient_port() : webclient.c
  • webclient_timedout() : webclient.h
  • WrCmd() : usbhw.c
  • WrCmdDat() : usbhw.c
  • WrCmdEP() : usbhw.c
  • write() : printf-stdarg.c
  • WriteDWBE() : tcpip.h , tcpip.c
  • WriteFrame_EMAC() : EMAC.c
  • WriteWBE() : tcpip.h , tcpip.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
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  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • a
  • b
  • c
  • d
  • f
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  • u

- a -

  • ASCSET_Data_t : drv_glcd.h

- b -

  • Bmp_t : drv_glcd.h
  • BOOL_16 : lpc_types.h
  • BOOL_32 : lpc_types.h
  • BOOL_8 : lpc_types.h

- c -

  • CDC_BUF_T : cdcuser.c
  • CDC_NOTIFICATION_HEADER : cdc.h
  • CHAR : lpc_types.h
  • clock_time_t : clock-arch.h
  • COLMOD_Data_t : drv_glcd.h

- d -

  • DATCTR_Data_t : drv_glcd.h

- f -

  • float32_t : arm_math.h
  • float64_t : arm_math.h
  • FontType_t : drv_glcd.h

- g -

  • GLCD_Cmd_t : drv_glcd.h
  • GLCD_CmdCtrl_t : drv_glcd.h
  • GLCD_CmdDir_t : drv_glcd.h
  • GLCD_ISS_t : drv_glcd.h
  • GLCD_Status_t : drv_glcd.h

- i -

  • INT_16 : lpc_types.h
  • INT_32 : lpc_types.h
  • INT_64 : lpc_types.h
  • INT_8 : lpc_types.h
  • IntStatus : lpc_types.h
  • IRQn_Type : LPC17xx.h

- l -

  • lc_t : lc-addrlabels.h , lc-switch.h
  • LdcPixel_t : drv_glcd.h

- m -

  • MADCTR_Data_t : drv_glcd.h

- p -

  • pASCSET_Data_t : drv_glcd.h
  • pBmp_t : drv_glcd.h
  • pCOLMOD_Data_t : drv_glcd.h
  • pDATCTR_Data_t : drv_glcd.h
  • PFI : lpc_types.h
  • pFontType_t : drv_glcd.h
  • PFV : lpc_types.h
  • pGLCD_CmdCtrl_t : drv_glcd.h
  • pLdcPixel_t : drv_glcd.h
  • pMADCTR_Data_t : drv_glcd.h

- q -

  • q15_t : arm_math.h
  • q31_t : arm_math.h
  • q63_t : arm_math.h
  • q7_t : arm_math.h

- s -

  • sd_connect_status : spi_sdcard.c
  • sd_error : spi_sdcard.c
  • SER_BUF_T : serial.c
  • SetState : lpc_types.h

- u -

  • u16_t : uip-conf.h
  • u8_t : uip-conf.h
  • uip_ip4addr_t : uip.h
  • uip_ip6addr_t : uip.h
  • uip_ipaddr_t : uip.h
  • uip_stats_t : uip-conf.h
  • uip_tcp_appstate_t : smtp.h , telnetd.h , webclient.h , webserver.h , hello-world.h
  • uip_udp_appstate_t : dhcpc.h , resolv.h
  • UNS_16 : lpc_types.h
  • UNS_32 : lpc_types.h
  • UNS_64 : lpc_types.h
  • UNS_8 : lpc_types.h
  • USB_DMA_DESCRIPTOR : usbhw.h
  • USB_EP_DATA : usbcore.h
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
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  • Typedefs
  • Enumerations
  • Enumerator
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- _ -

  • __stdin : Retarget.c
  • __stdout : Retarget.c
  • _db : main.c
  • _db_char : debug_frmwrk.h , debug_frmwrk.c
  • _db_dec : debug_frmwrk.h , debug_frmwrk.c
  • _db_dec_16 : debug_frmwrk.h , debug_frmwrk.c
  • _db_dec_32 : debug_frmwrk.h , debug_frmwrk.c
  • _db_get_char : debug_frmwrk.h , debug_frmwrk.c
  • _db_hex : debug_frmwrk.c , debug_frmwrk.h
  • _db_hex_16 : debug_frmwrk.h , debug_frmwrk.c
  • _db_hex_32 : debug_frmwrk.h , debug_frmwrk.c
  • _db_msg : debug_frmwrk.h , debug_frmwrk.c
  • _db_msg_ : debug_frmwrk.c , debug_frmwrk.h
  • _tickVal : tcpip.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
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- l -

  • L : usb.h
  • Last_cmd : microwire_test.c
  • LastFrameSent : tcpip.h
  • lcd_text : lcdtest.c
  • LED : can_ledcontrol.c
  • Led_State : mpu_test.c
  • LED_toggle : wdt_interrupt_test.c
  • LED_Value : can_ledcontrol.c
  • LEDStatus : rit_interrupt.c , timer_int_match.c
  • Length : mscuser.c
  • lmsNorm_instance : arm_signal_converge_example_f32.c
  • lmsNormCoeff_f32 : arm_signal_converge_data.c , arm_signal_converge_example_f32.c
  • lmsStateF32 : arm_signal_converge_example_f32.c
  • long_duty : pwm_match_int.c
  • LPF_instance : arm_signal_converge_example_f32.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
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- m -

  • Master_Buf : master.c , i2c_master_slave_int_test.c
  • Master_Rx_Buf : ti_test.c , microwire_test.c
  • master_test : master.c , i2c_master_slave_int_test.c
  • Master_Tx_Buf : ti_test.c
  • match_cnt : pwm_match_int.c
  • MatchCount : timer_capture.c
  • max_marks : arm_class_marks_example_f32.c
  • mean : arm_class_marks_example_f32.c
  • MemOK : mscuser.c
  • Memory : memory.c , mscuser.c
  • menu : can_self_test.c , extint_sleep.c , nmi_powerdown.c , can_test_aflut.c , rtc_deeppwd.c , wdt_deepsleep.c , can_test_bypass_mode.c , rit_interrupt.c , rtc_calib.c , can_test_two_kit.c , pwm_signal.c , bitband.c , mpu_test.c , privilege.c , flash_2_ram.c , link_list.c , i2s_dma_test.c , i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_two_kit.c , can_ledcontrol.c , i2s_polling.c , vt_relocation.c
  • menu1 : sc16is750_int.c , sc16is750_polling.c , ssp_slave.c , ti_test.c , timer_capture.c , freqmeasure.c , gen_diff_delay.c , gen_diff_freqs.c , timer_int_match.c , wdt_reset_test.c , timer_poll_match.c , uart_fullmodem_test.c , rs485_slave.c , uart_autobaud_test.c , uart_dma_test.c , uart_hw_flow_control.c , uart_interrupt_test.c , adc_burst_test.c , uart_irda_receive.c , uart_irda_transmit.c , adc_dma_test.c , uart_polling_test.c , rs485_master.c , adc_hardware_trigger_test.c , adc_interrupt_test.c , wdt_interrupt_test.c , adc_polling_test.c , dac_wave_generate.c , gpdma_sleep.c , gpdma_r2r_test.c , master.c , microwire_test.c , i2c_master_slave_int_test.c , i2c_monitor.c , pca8581_test.c , spi_sdcard.c , i2c_interrupt_test.c , i2c_polling_test.c , slave.c , rtc_alarm_cntincr_int.c , spi_loopback_test.c , spi_master.c , spi_interrupt_test.c , spi_polling_test.c , spi_slave.c , ssp_dma.c , ssp_master.c
  • menu2 : link_list.c , spi_loopback_test.c , uart_irda_transmit.c , gpdma_r2r_test.c , i2c_polling_test.c , pca8581_test.c , privilege.c , uart_polling_test.c , flash_2_ram.c , rs485_master.c , uart_irda_receive.c , uart_autobaud_test.c , i2c_interrupt_test.c , gpdma_sleep.c , uart_hw_flow_control.c , uart_interrupt_test.c , spi_polling_test.c , sc16is750_int.c , spi_interrupt_test.c , uart_fullmodem_test.c , ssp_slave.c , ssp_master.c , ssp_dma.c , ti_test.c , spi_slave.c , sc16is750_polling.c , spi_master.c
  • menu3 : uart_interrupt_test.c , uart_dma_test.c , uart_hw_flow_control.c , uart_irda_transmit.c , uart_autobaud_test.c , uart_irda_receive.c , uart_polling_test.c , uart_fullmodem_test.c
  • menu4 : uart_irda_transmit.c
  • menu5 : uart_irda_transmit.c
  • min_marks : arm_class_marks_example_f32.c
  • MSC_CBW : msc.h
  • MSC_CSW : msc.h
  • multOutput : arm_dotproduct_example_f32.c
  • Mute : usbdmain.c , usbaudio.h
  • MyIP : tcpip.h
  • MyMAC : tcpip.c , tcpip.h
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- n -

  • nextline : rs485_master.c , rs485_slave.c
  • NotificationBuf : cdcuser.c
  • numBlocks : arm_fir_example_f32.c
  • numStudents : arm_class_marks_example_f32.c
  • numSubjects : arm_class_marks_example_f32.c
  • NXP_Logo : NXP_logo.h , NXP_logo.c
  • NXP_LogoStream : NXP_logo.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- o -

  • Offset : mscuser.c
  • opt : uip.c
  • outLen : arm_convolution_example_f32.c
  • outputQ31 : arm_graphic_equalizer_example_q31.c
  • OutReport : demo.c , demo.h
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
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  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
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- a -

  • A_f32 : arm_matrix_example_f32.c
  • ack_msg : rs485_slave.c
  • adc_value : adc_interrupt_test.c , adc_hardware_trigger_test.c
  • addr_acc : rs485_slave.c
  • addr_auto : rs485_slave.c
  • addr_menu : rs485_slave.c
  • addr_una : rs485_slave.c
  • AFRxMsg : can_test_aflut.c , can_test_two_kit.c
  • AFTable : can_test_aflut.c
  • AFTxMsg : can_test_aflut.c , can_test_two_kit.c
  • Ak : arm_convolution_example_f32.c
  • arm_linear_interep_table : arm_linear_interp_example_f32.c , arm_linear_interp_data.c
  • armBitRevTable : arm_common_tables.h , arm_common_tables.c
  • armRecipTableQ15 : arm_common_tables.h , arm_common_tables.c
  • armRecipTableQ31 : arm_common_tables.c , arm_common_tables.h
  • AT_f32 : arm_matrix_example_f32.c
  • ATMA_f32 : arm_matrix_example_f32.c
  • ATMAI_f32 : arm_matrix_example_f32.c
  • AxB : arm_convolution_example_f32.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
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  • Typedefs
  • Enumerations
  • Enumerator
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- b -

  • B : usb.h
  • B_f32 : arm_matrix_example_f32.c
  • BackColor : GLCD_SPI_LPC1700.c
  • bAlternateSetting : usb.h
  • bCBLength : msc.h
  • bcdCDC : cdc.h
  • bcdDevice : usb.h
  • bcdHID : hid.h
  • bcdUSB : usb.h
  • bCharFormat : cdc.h
  • bConfigurationValue : usb.h
  • bCountryCode : hid.h
  • bDataBits : cdc.h
  • bDataInterface : cdc.h
  • bDescriptorSubtype : cdc.h
  • bDescriptorType : cdc.h , usb.h , hid.h , usb.h
  • bDeviceClass : usb.h
  • bDeviceProtocol : usb.h
  • bDeviceSubClass : usb.h
  • bEndpointAddress : usb.h
  • bFunctionLength : cdc.h
  • bInterfaceClass : usb.h
  • bInterfaceNumber : usb.h
  • bInterfaceProtocol : usb.h
  • bInterfaceSubClass : usb.h
  • bInterval : usb.h
  • Bk : arm_convolution_example_f32.c
  • bLength : usb.h , hid.h , usb.h
  • blockSize : arm_fir_example_f32.c , arm_sin_cos_example_f32.c , arm_variance_example_f32.c
  • bLUN : msc.h
  • BM : usb.h
  • bMasterInterface : cdc.h
  • bmAttributes : usb.h
  • bMaxPacketSize0 : usb.h
  • bMaxPower : usb.h
  • bmCapabilities : cdc.h
  • bmFlags : msc.h
  • bmRequestType : usb.h
  • bNumConfigurations : usb.h
  • bNumDescriptors : hid.h
  • bNumEndpoints : usb.h
  • bNumInterfaces : usb.h
  • bParityType : cdc.h
  • bRequest : usb.h
  • bReserved : usb.h
  • bSlaveInterfaces : cdc.h
  • bStatus : msc.h
  • bString : usb.h
  • buffer : i2c_monitor.c
  • BulkBuf : mscuser.c
  • BulkBufIn : cdcuser.c
  • BulkBufOut : cdcuser.c
  • BulkLen : mscuser.c
  • BulkStage : mscuser.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
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- c -

  • c : uip_arp.c
  • CANAF_ext_cnt : lpc17xx_can.c
  • CANAF_FullCAN_cnt : lpc17xx_can.c
  • CANAF_gext_cnt : lpc17xx_can.c
  • CANAF_gstd_cnt : lpc17xx_can.c
  • CANAF_std_cnt : lpc17xx_can.c
  • CANErrCount : can_test_two_kit.c , can_test_aflut.c
  • CANRxCount : can_self_test.c , can_test_aflut.c , can_test_bypass_mode.c , can_test_two_kit.c
  • CANTxCount : can_test_two_kit.c , can_self_test.c , can_test_aflut.c , can_test_bypass_mode.c
  • capture : freqmeasure.c
  • CB : msc.h
  • CBW : mscuser.c
  • CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR : cdc.h
  • CDC_CALL_MANAGEMENT_DESCRIPTOR : cdc.h
  • CDC_DepInEmpty : cdcuser.c , cdcuser.h
  • CDC_HEADER_DESCRIPTOR : cdc.h
  • CDC_LINE_CODING : cdc.h
  • CDC_LineCoding : cdcuser.c
  • CDC_OutBuf : cdcuser.c
  • CDC_SerialState : cdcuser.c
  • CDC_UNION_1SLAVE_DESCRIPTOR : cdc.h
  • CDC_UNION_DESCRIPTOR : cdc.h
  • Channel0_Err : dac_dma.c , flash_2_ram.c , gpdma_sleep.c , link_list.c , gpdma_r2r_test.c , i2s_dma_test.c , ssp_dma.c , uart_dma_test.c , adc_dma_test.c
  • Channel0_TC : ssp_dma.c , gpdma_sleep.c , adc_dma_test.c , dac_dma.c , flash_2_ram.c , link_list.c , gpdma_r2r_test.c , i2s_dma_test.c , uart_dma_test.c
  • Channel1_Err : i2s_dma_test.c , ssp_dma.c , uart_dma_test.c
  • Channel1_TC : i2s_dma_test.c , ssp_dma.c , uart_dma_test.c
  • CntrSel : lcdtest.c
  • coeffTable : arm_graphic_equalizer_example_q31.c
  • compl_menu : link_list.c , flash_2_ram.c , gpdma_sleep.c , gpdma_r2r_test.c
  • complete : i2c_interrupt_test.c , ssp_slave.c , spi_interrupt_test.c , sc16is750_int.c
  • complete_M : i2c_master_slave_int_test.c , ti_test.c
  • complete_S : ti_test.c , i2c_master_slave_int_test.c
  • cosOutput : arm_sin_cos_example_f32.c
  • cosSquareOutput : arm_sin_cos_example_f32.c
  • count : freqmeasure.c , i2c_monitor.c
  • CriticalSecCntr : lcdtest.c
  • CSW : mscuser.c
  • Cur_State : vt_relocation.c , 10ms_base.c , systick_stclk.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
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  • Typedefs
  • Enumerations
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- d -

  • data : i2s_two_kit.c
  • DataBuf : usbaudio.h , usbdmain.c
  • DataIn : usbaudio.h , usbdmain.c
  • DataOut : usbaudio.h , usbdmain.c
  • DataRun : usbaudio.h , usbdmain.c
  • DatLen_M : microwire_test.c , ti_test.c
  • DatLen_S : microwire_test.c , ti_test.c
  • db : EMAC.c , emac.c
  • db_ : tcpip.c , emactest.c
  • dDataLength : msc.h
  • dDataResidue : msc.h
  • DescriptorList : hid.h
  • Dir : usb.h
  • DiskImage : DiskImg.c , memory.h
  • dma_dst : ssp_dma.c
  • dma_src : ssp_dma.c
  • DMADest_Buffer : link_list.c , flash_2_ram.c
  • DMASrc_Buffer : flash_2_ram.c
  • doBitReverse : arm_fft_bin_example_f32.c
  • done : freqmeasure.c , i2c_monitor.c
  • dSignature : msc.h
  • dTag : msc.h
  • dummy : i2s_irq_test.c , i2s_mclk.c
  • dwDTERate : cdc.h
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
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- e -

  • EFF_GPR_Table : can_test_aflut.c
  • EFF_Table : can_test_aflut.c
  • EMAC_clkdiv : lpc17xx_emac.c
  • EP0Buf : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • EP0Data : usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c
  • err_menu : flash_2_ram.c , gpdma_r2r_test.c , gpdma_sleep.c , link_list.c
  • err_signal : arm_signal_converge_example_f32.c
  • errOutput : arm_signal_converge_example_f32.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
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- f -

  • f_err_menu : rs485_master.c , rs485_slave.c
  • fftSize : arm_fft_bin_example_f32.c
  • file_404_html : httpd-fsdata.c
  • file_fade_png : httpd-fsdata.c
  • file_files_shtml : httpd-fsdata.c
  • file_footer_html : httpd-fsdata.c
  • file_header_html : httpd-fsdata.c
  • file_index_html : httpd-fsdata.c
  • file_processes_shtml : httpd-fsdata.c
  • file_stats_shtml : httpd-fsdata.c
  • file_style_css : httpd-fsdata.c
  • file_tcp_shtml : httpd-fsdata.c
  • FIRCoeff_f32 : arm_signal_converge_example_f32.c , arm_signal_converge_data.c
  • firCoeffs32 : arm_fir_example_f32.c
  • first_capture : freqmeasure.c
  • firStateF32 : arm_signal_converge_example_f32.c
  • Font_24x16 : Font_24x16.h
  • FULLCAN_ENABLE : lpc17xx_can.c
  • FullCAN_Table : can_test_aflut.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
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- g -

  • gainDB : arm_graphic_equalizer_example_q31.c
  • GatewayIP : tcpip.h
  • GetResponse : easyweb.h
  • GPDMA_LUTPerAddr : lpc17xx_gpdma.c
  • GPDMA_LUTPerBurst : lpc17xx_gpdma.c
  • GPDMA_LUTPerWid : lpc17xx_gpdma.c
  • GPDMACfg : dac_sinewave_test.c , dac_dma.c
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
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- h -

  • H : usb.h
  • HID_DESCRIPTOR : hid.h
  • HID_IdleTime : hiduser.c , hiduser.h
  • HID_Protocol : hiduser.c , hiduser.h
  • HID_ReportDescriptor : usbdesc.c , usbdesc.h
  • HID_ReportDescSize : usbdesc.c , usbdesc.h
  • http_10 : http-strings.c , http-strings.h , webclient-strings.c , webclient-strings.h
  • http_11 : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_200 : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_301 : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_302 : http-strings.c , http-strings.h , webclient-strings.c , webclient-strings.h
  • http_404_html : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_content_type : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_content_type_binary : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_content_type_css : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_content_type_gif : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_content_type_html : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_content_type_jpg : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_content_type_plain : http-strings.c , http-strings.h
  • http_content_type_png : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_content_type_text : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_crnl : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_css : http-strings.h , webclient-strings.c , webclient-strings.h , http-strings.c
  • http_get : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_gif : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_header_200 : http-strings.c , http-strings.h
  • http_header_404 : http-strings.c , http-strings.h
  • http_host : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_htm : webclient-strings.c , webclient-strings.h , http-strings.c , http-strings.h
  • http_html : webclient-strings.h , webclient-strings.c , http-strings.c , http-strings.h
  • http_http : http-strings.c , webclient-strings.h , webclient-strings.c , http-strings.h
  • http_index_html : webclient-strings.h , http-strings.c , http-strings.h , webclient-strings.c
  • http_jpg : webclient-strings.h , http-strings.c , http-strings.h , webclient-strings.c
  • http_location : webclient-strings.h , webclient-strings.c , http-strings.c , http-strings.h
  • http_png : http-strings.c , http-strings.h , webclient-strings.h , webclient-strings.c
  • http_referer : http-strings.c , http-strings.h
  • http_shtml : http-strings.c , http-strings.h , webclient-strings.c , webclient-strings.h
  • http_text : http-strings.c , webclient-strings.h , webclient-strings.c , http-strings.h
  • http_texthtml : webclient-strings.h , http-strings.c , http-strings.h , webclient-strings.c
  • http_txt : webclient-strings.c , http-strings.c , webclient-strings.h , http-strings.h
  • http_user_agent_fields : webclient-strings.c , webclient-strings.h
  • HTTPBytesToSend : easyweb.h
  • HTTPStatus : easyweb.h
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
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  • Typedefs
  • Enumerations
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- i -

  • I2SReadLength : i2s_irq_test.c , i2s_mclk.c , i2s_polling.c , i2s_test_4_wire.c
  • I2SRXBuffer : i2s_test_4_wire.c , i2s_polling.c , i2s_dma_test.c , i2s_irq_test.c , i2s_mclk.c
  • I2SRXDone : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2STXBuffer : i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c , i2s_dma_test.c , i2s_irq_test.c
  • I2STXDone : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • I2SWriteLength : i2s_irq_test.c , i2s_mclk.c , i2s_test_4_wire.c , i2s_polling.c
  • iConfiguration : usb.h
  • idProduct : usb.h
  • idVendor : usb.h
  • ifftFlag : arm_fft_bin_example_f32.c
  • iInterface : usb.h
  • iManufacturer : usb.h
  • info1 : wdt_interrupt_test.c , wdt_reset_test.c
  • info2 : wdt_interrupt_test.c , wdt_reset_test.c
  • InfoBuf : usbaudio.h , usbdmain.c
  • inputQ31 : arm_graphic_equalizer_example_q31.c
  • InReport : demo.c , demo.h
  • IO_State : systick_stclk.c
  • iocon_cfg : i2c_polling_test.c , sc16is750_polling.c , i2c_interrupt_test.c , spi_interrupt_test.c , spi_polling_test.c , sc16is750_int.c
  • iodir_cfg : i2c_interrupt_test.c , i2c_polling_test.c , spi_interrupt_test.c , sc16is750_int.c , sc16is750_polling.c , spi_polling_test.c
  • iostate_cfg_0 : i2c_interrupt_test.c , i2c_polling_test.c
  • iostate_cfg_1 : i2c_interrupt_test.c , i2c_polling_test.c
  • iostate_off : spi_interrupt_test.c , sc16is750_int.c , spi_polling_test.c , sc16is750_polling.c
  • iostate_on : sc16is750_polling.c , sc16is750_int.c , spi_interrupt_test.c , spi_polling_test.c
  • iProduct : usb.h
  • iSerialNumber : usb.h
  • ISNGenHigh : tcpip.h
  • ITM_RxBuffer : core_cm3.h
Generated on Mon Nov 28 2011 11:15:38 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
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- p -

  • p_err_menu : rs485_master.c , rs485_slave.c
  • PacketReceived : emactest.c
  • pca8581_rddat : pca8581_test.c
  • pca8581_wrdat : pca8581_test.c
  • pGPDMACh : lpc17xx_gpdma.c
  • PhaseCnt : qei_test_velo.c
  • PotVal : usbdmain.c
  • pRdBuf_M : microwire_test.c , ti_test.c
  • pRdBuf_S : ti_test.c
  • PWebSide : easyweb.h
  • PWM0_State : pwm_signal.c
  • PWM1_State : pwm_signal.c
  • PWM2_State : pwm_signal.c
  • PWM3_State : pwm_signal.c
  • pWrBuf_M : ti_test.c
  • pWrBuf_S : microwire_test.c , ti_test.c
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- q -

  • qei_idx_pin : qei_test_velo.c
  • qei_phaA_pin : qei_test_velo.c
  • qei_phaB_pin : qei_test_velo.c
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- r -

  • rb : uart_interrupt_test.c , rs485_master.c , uart_fullmodem_test.c , rs485_slave.c
  • RdIdx_M : microwire_test.c , ti_test.c
  • RdIdx_S : ti_test.c
  • realCoefAQ31 : arm_common_tables.h , arm_rfft_init_q31.c
  • realCoefBQ31 : arm_common_tables.h , arm_rfft_init_q31.c
  • RecdFrameIP : tcpip.h
  • RecdFrameLength : tcpip.h
  • RecdFrameMAC : tcpip.h
  • RecdIPFrameLength : tcpip.h
  • ReceiveLength : emactest.c
  • Recipient : usb.h
  • recv_menu : rs485_master.c
  • recv_msg : rs485_slave.c
  • refDotProdOut : arm_dotproduct_example_f32.c
  • refIndex : arm_fft_bin_example_f32.c
  • refOutput : arm_fir_data.c , arm_fir_example_f32.c
  • refVarianceOut : arm_variance_example_f32.c
  • RemoteIP : tcpip.h
  • RemoteMAC : tcpip.h
  • REQUEST_TYPE : usb.h
  • RetryCounter : tcpip.h
  • RTS_State : uart_fullmodem_test.c
  • Rx_Buf : ssp_master.c , spi_master.c , spi_slave.c , spi_loopback_test.c , ssp_slave.c
  • rx_buf : uart_dma_test.c
  • rx_depth_irq : i2s_irq_test.c , i2s_two_kit.c , i2s_mclk.c
  • RxDoneCount : emactest.c
  • RXErrorCount : emactest.c
  • RxFinishedCount : emactest.c
  • RXMsg : can_ledcontrol.c , can_test_two_kit.c , can_self_test.c , can_test_bypass_mode.c
  • RXOverrunCount : emactest.c
  • rxsetup : pca8581_test.c
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- s -

  • sd_cmd_buf : spi_sdcard.c
  • sd_data_buf : spi_sdcard.c
  • send_menu : rs485_master.c
  • send_msg : rs485_slave.c
  • ser_in : serial.c
  • ser_lineState : serial.c
  • ser_out : serial.c
  • ser_txRestart : serial.c
  • SetupPacket : usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c
  • SFF_GPR_Table : can_test_aflut.c
  • SFF_Table : can_test_aflut.c
  • sinOutput : arm_sin_cos_example_f32.c
  • sinSquareOutput : arm_sin_cos_example_f32.c
  • Slave_Buf : i2c_master_slave_int_test.c , slave.c
  • Slave_Rx_Buf : ti_test.c
  • slave_test : i2c_master_slave_int_test.c , slave.c
  • Slave_Tx_Buf : microwire_test.c , ti_test.c
  • slaveA_msg : rs485_master.c
  • slaveB_msg : rs485_master.c
  • smtp_220 : smtp-strings.c , smtp-strings.h
  • smtp_cc : smtp-strings.c , smtp-strings.h
  • smtp_crnl : smtp-strings.c , smtp-strings.h
  • smtp_crnlperiodcrnl : smtp-strings.c , smtp-strings.h
  • smtp_data : smtp-strings.c , smtp-strings.h
  • smtp_from : smtp-strings.c , smtp-strings.h
  • smtp_helo : smtp-strings.c , smtp-strings.h
  • smtp_mail_from : smtp-strings.c , smtp-strings.h
  • smtp_quit : smtp-strings.c , smtp-strings.h
  • smtp_rcpt_to : smtp-strings.c , smtp-strings.h
  • smtp_subject : smtp-strings.c , smtp-strings.h
  • smtp_to : smtp-strings.c , smtp-strings.h
  • snr : arm_convolution_example_f32.c , arm_fir_example_f32.c , arm_graphic_equalizer_example_q31.c , arm_matrix_example_f32.c
  • snr1 : arm_linear_interp_example_f32.c
  • snr2 : arm_linear_interp_example_f32.c
  • SocketStatus : tcpip.h
  • SPI_ConfigStruct : spi_polling_test.c , spi_sdcard.c , spi_slave.c , spi_loopback_test.c , spi_master.c , spi_interrupt_test.c
  • spireadbuf : spi_interrupt_test.c , spi_polling_test.c
  • srcA_buf_f32 : arm_dotproduct_example_f32.c
  • srcALen : arm_convolution_example_f32.c
  • srcB_buf_f32 : arm_dotproduct_example_f32.c
  • srcBLen : arm_convolution_example_f32.c
  • SSP_ConfigStruct : ssp_dma.c , ssp_master.c , sc16is750_int.c , sc16is750_polling.c , ssp_slave.c , ti_test.c , microwire_test.c
  • sspreadbuf : sc16is750_int.c , sc16is750_polling.c
  • status : arm_dotproduct_example_f32.c , arm_sin_cos_example_f32.c
  • std : arm_class_marks_example_f32.c
  • student_num : arm_class_marks_example_f32.c
  • SubnetMask : tcpip.h
  • sUnion : cdc.h
  • Synchronous : uart_autobaud_test.c
  • syncmenu : uart_autobaud_test.c
  • SystemCoreClock : system_ARMCM0.c , system_LPC17xx.h , system_ARMCM0.c , system_ARMCM4.c , system_ARMCM3.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM4.c , system_ARMCM0.c , system_ARMCM4.c , system_ARMCM3.c , system_ARMCM4.c , system_ARMCM0.c , system_LPC17xx.c
  • SysTickCnt : LedBlinky.c
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- t -

  • T1 : gen_diff_delay.c
  • T2 : gen_diff_delay.c
  • TCPAckNr : tcpip.h
  • TCPFlags : tcpip.h
  • TCPLocalPort : tcpip.h
  • TCPRemotePort : tcpip.h
  • TCPRxDataCount : tcpip.h
  • TCPSeqNr : tcpip.h
  • TCPStateMachine : tcpip.h
  • TCPTimer : tcpip.h
  • TCPTxDataCount : tcpip.h
  • TCPUNASeqNr : tcpip.h
  • Terminal_18_24_12 : lcdtest.c
  • Terminal_6_8_6 : lcdtest.c
  • Terminal_9_12_6 : Terminal_9_12x6.c , lcdtest.c
  • terminator : rs485_master.c , rs485_slave.c
  • testIndex : arm_fft_bin_example_f32.c
  • testInput_f32 : arm_graphic_equalizer_data.c , arm_graphic_equalizer_example_q31.c , arm_signal_converge_data.c , arm_signal_converge_example_f32.c , arm_sin_cos_example_f32.c , arm_variance_example_f32.c
  • testInput_f32_10khz : arm_fft_bin_data.c , arm_fft_bin_example_f32.c
  • testInput_f32_1kHz_15kHz : arm_fir_data.c , arm_fir_example_f32.c
  • testInputA_f32 : arm_convolution_example_f32.c
  • testInputB_f32 : arm_convolution_example_f32.c
  • testInputSin_f32 : arm_linear_interp_example_f32.c
  • testLinIntOutput : arm_linear_interp_example_f32.c
  • testMarks_f32 : arm_class_marks_example_f32.c
  • testOutput : arm_dotproduct_example_f32.c , arm_linear_interp_example_f32.c , arm_sin_cos_example_f32.c
  • testRefOutput_f32 : arm_convolution_example_f32.c , arm_graphic_equalizer_data.c , arm_graphic_equalizer_example_q31.c , arm_sin_cos_example_f32.c
  • testRefSinOutput32_f32 : arm_linear_interp_example_f32.c
  • testUnity_f32 : arm_class_marks_example_f32.c
  • Tick : usbdmain.c
  • Ticks : clock-arch.c
  • TIM_CaptureConfigStruct : freqmeasure.c , timer_capture.c
  • TIM_ConfigStruct : timer_capture.c , freqmeasure.c , timer_int_match.c , timer_poll_match.c , pwm_signal.c
  • TIM_MatchConfigStruct : timer_poll_match.c , timer_capture.c , timer_int_match.c , pwm_signal.c
  • timer0_flag : timer_capture.c , timer_int_match.c
  • timer1_flag : timer_capture.c , timer_int_match.c
  • toggle : gen_diff_delay.c
  • TransmitControl : tcpip.h
  • Tx_Buf : spi_master.c , spi_slave.c , ssp_master.c , ssp_slave.c , spi_loopback_test.c
  • tx_depth_irq : i2s_irq_test.c , i2s_two_kit.c , i2s_mclk.c
  • TxDoneCount : emactest.c
  • TXErrorCount : emactest.c
  • TxFinishedCount : emactest.c
  • TxFrame1Size : tcpip.h
  • TxFrame2Size : tcpip.h
  • TxIntStat : uart_fullmodem_test.c , uart_interrupt_test.c
  • TXMsg : can_test_two_kit.c , can_test_bypass_mode.c , can_ledcontrol.c , can_self_test.c
  • txsetup : pca8581_test.c
  • TXUnderrunCount : emactest.c
  • Type : usb.h
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- u -

  • UARTConfigStruct : timer_capture.c
  • uip_acc32 : uip.c , uip.h
  • uip_appdata : uip.c , uip.h
  • uip_buf : uip.h
  • uip_conn : uip.h , uip.c
  • uip_conns : uip.c , uip.h
  • uip_draddr : uip.c , uip.h
  • uip_ethaddr : uip.c , uip_arp.h
  • uip_flags : uip.h , uip.c
  • uip_hostaddr : uip.c , uip.h
  • uip_len : uip.c , uip.h
  • uip_listenports : uip.c
  • uip_netmask : uip.c , uip.h
  • uip_sappdata : uip.c
  • uip_slen : uip.c
  • uip_stat : uip.c , uip.h
  • USB_AltSetting : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • USB_COMMON_DESCRIPTOR : usb.h
  • USB_ConfigDescriptor : usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h
  • USB_Configuration : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • USB_CONFIGURATION_DESCRIPTOR : usb.h
  • USB_DEVICE_DESCRIPTOR : usb.h
  • USB_DEVICE_QUALIFIER_DESCRIPTOR : usb.h
  • USB_DeviceAddress : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • USB_DeviceDescriptor : usbdesc.h , usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h
  • USB_DeviceStatus : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • USB_ENDPOINT_DESCRIPTOR : usb.h
  • USB_EndPointHalt : usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c , usbcore.h
  • USB_EndPointMask : usbcore.c , usbcore.h , usbcore.c , usbcore.h , usbcore.c
  • USB_EndPointStall : usbcore.h , usbcore.c , usbcore.h , usbcore.c
  • USB_INTERFACE_DESCRIPTOR : usb.h
  • USB_NumInterfaces : usbcore.c
  • USB_P_EP : usbuser.c , usbuser.h , usbuser.c , usbuser.h
  • USB_SETUP_PACKET : usb.h
  • USB_STRING_DESCRIPTOR : usb.h
  • USB_StringDescriptor : usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h , usbdesc.c , usbdesc.h
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LPC1700CMSIS Standard Peripheral Firmware Library Manual: Globals

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- v -

  • var : arm_class_marks_example_f32.c
  • VeloAcc : qei_test_velo.c
  • VeloAccFlag : qei_test_velo.c
  • VeloCapCnt : qei_test_velo.c
  • VolCur : adcuser.c , usbaudio.h
  • VolMax : adcuser.c
  • VolMin : adcuser.c
  • VolRes : adcuser.c
  • Volume : usbaudio.h , usbdmain.c
  • VUM : usbdmain.c
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- w -

  • W : usb.h
  • WB : usb.h
  • wDescriptorLength : hid.h
  • wdt_flag : wdt_interrupt_test.c
  • WebSide : webpage.h
  • wIndex : usb.h
  • wire1 : arm_signal_converge_example_f32.c , arm_variance_example_f32.c
  • wire2 : arm_signal_converge_example_f32.c , arm_variance_example_f32.c
  • wire3 : arm_signal_converge_example_f32.c , arm_variance_example_f32.c
  • wLength : usb.h
  • wMaxPacketSize : usb.h
  • WOLCount : emactest.c
  • WORD_BYTE : usb.h
  • WrIdx_M : ti_test.c
  • WrIdx_S : ti_test.c , microwire_test.c
  • wTotalLength : usb.h
  • wValue : usb.h
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  • x

- x -

  • X_f32 : arm_matrix_example_f32.c
  • xferConfig : spi_interrupt_test.c , ssp_slave.c , sc16is750_int.c , spi_sdcard.c
  • xRef_f32 : arm_matrix_example_f32.c
Generated on Mon Nov 28 2011 11:15:39 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Ram_2_Ram_Test/gpdma_r2r_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Ram_2_Ram_Test/gpdma_r2r_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          gpdma_m2m_test.c                                2010-05-21
00003 */
00025 #include "lpc17xx_gpdma.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE MACROS *************************/
00038 #define DMA_SIZE                0x100UL
00039
00043 #define DMA_SRC                 LPC_AHBRAM1_BASE
00044
00048 #define DMA_DST                 (DMA_SRC+DMA_SIZE)
00049
00050
00051 /************************** PRIVATE VARIABLES *************************/
00052 uint8_t menu1[] =
00053 "********************************************************************************\n\r"
00054 "Hello NXP Semiconductors \n\r"
00055 "GPDMA demo \n\r"
00056 "\t - MCU: LPC17xx \n\r"
00057 "\t - Core: ARM Cortex-M3 \n\r"
00058 "\t - Communicate via: UART0 - 115200bps \n\r"
00059 " This example will transfer 2 blocks of data from memory boundary \n\r"
00060 " to the other memory boundary on RAM using GPDMA module with interrupt \n\r"
00061 "********************************************************************************\n\r";
00062 uint8_t menu2[] = "Demo terminated! \n\r";
00063 uint8_t err_menu[] = "Buffer Check fail!";
00064 uint8_t compl_menu[] = "Buffer Check success!";
00065
00066 // Terminal Counter flag for Channel 0
00067 __IO uint32_t Channel0_TC;
00068
00069 // Error Counter flag for Channel 0
00070 __IO uint32_t Channel0_Err;
00071
00072
00073 /************************** PRIVATE FUNCTIONS *************************/
00074 void DMA_IRQHandler (void);
00075
00076 void print_menu(void);
00077 void Buffer_Init(void);
00078 void Error_Loop(void);
00079
00080 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00081 /*********************************************************************/
00086 void DMA_IRQHandler (void)
00087 {
00088         // check GPDMA interrupt on channel 0
00089         if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 0)){ //check interrupt status on channel 0
00090                 // Check counter terminal status
00091                 if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 0)){
00092                         // Clear terminate counter Interrupt pending
00093                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 0);
00094                                 Channel0_TC++;
00095                 }
00096                 if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, 0)){
00097                         // Clear error counter Interrupt pending
00098                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 0);
00099                         Channel0_Err++;
00100                 }
00101         }
00102 }
00103
00104 /*-------------------------PRIVATE FUNCTIONS-----------------------------*/
00105 /*********************************************************************/
00110 void print_menu(void)
00111 {
00112         _DBG(menu1);
00113 }
00114
00115 /*********************************************************************/
00120 void Buffer_Init(void)
00121 {
00122         uint8_t i;
00123         uint32_t *src_addr = (uint32_t *)DMA_SRC;
00124         uint32_t *dest_addr = (uint32_t *)DMA_DST;
00125
00126          for ( i = 0; i < DMA_SIZE/4; i++ )
00127         {
00128                 *src_addr++ = i;
00129                 *dest_addr++ = 0;
00130         }
00131 }
00132
00133
00134 /*********************************************************************/
00139 void Buffer_Verify(void)
00140 {
00141         uint8_t i;
00142         uint32_t *src_addr = (uint32_t *)DMA_SRC;
00143         uint32_t *dest_addr = (uint32_t *)DMA_DST;
00144
00145         for ( i = 0; i < DMA_SIZE/4; i++ )
00146         {
00147                 if ( *src_addr++ != *dest_addr++ )
00148                 {
00149                         /* Call Error Loop */
00150                         Error_Loop();
00151                 }
00152         }
00153 }
00154
00155
00156 /*********************************************************************/
00161 void Error_Loop(void)
00162 {
00163         _DBG(err_menu);
00164
00165         /* Loop forever */
00166         while (1);
00167 }
00168
00169
00170 /*-------------------------MAIN FUNCTION--------------------------------*/
00171 /*********************************************************************/
00176 int c_entry(void)
00177 {
00178         GPDMA_Channel_CFG_Type GPDMACfg;
00179
00180         /* Initialize debug via UART0
00181          * – 115200bps
00182          * – 8 data bit
00183          * – No parity
00184          * – 1 stop bit
00185          * – No flow control
00186          */
00187         debug_frmwrk_init();
00188
00189         // print welcome screen
00190         print_menu();
00191
00192         /* GPDMA block section -------------------------------------------- */
00193         /* Initialize buffer */
00194         _DBG_("Initialize Buffer...");
00195         Buffer_Init();
00196
00197     /* Disable GPDMA interrupt */
00198     NVIC_DisableIRQ(DMA_IRQn);
00199     /* preemption = 1, sub-priority = 1 */
00200     NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
00201
00202     /* Initialize GPDMA controller */
00203         GPDMA_Init();
00204
00205         // Setup GPDMA channel --------------------------------
00206         // channel 0
00207         GPDMACfg.ChannelNum = 0;
00208         // Source memory
00209         GPDMACfg.SrcMemAddr = DMA_SRC;
00210         // Destination memory
00211         GPDMACfg.DstMemAddr = DMA_DST;
00212         // Transfer size
00213         GPDMACfg.TransferSize = DMA_SIZE;
00214         // Transfer width
00215         GPDMACfg.TransferWidth = GPDMA_WIDTH_WORD;
00216         // Transfer type
00217         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2M;
00218         // Source connection - unused
00219         GPDMACfg.SrcConn = 0;
00220         // Destination connection - unused
00221         GPDMACfg.DstConn = 0;
00222         // Linker List Item - unused
00223         GPDMACfg.DMALLI = 0;
00224         // Setup channel with given parameter
00225         GPDMA_Setup(&GPDMACfg);
00226
00227         /* Reset terminal counter */
00228         Channel0_TC = 0;
00229         /* Reset Error counter */
00230         Channel0_Err = 0;
00231
00232         _DBG_("Start transfer...");
00233
00234         // Enable GPDMA channel 0
00235         GPDMA_ChannelCmd(0, ENABLE);
00236
00237         /* Enable GPDMA interrupt */
00238         NVIC_EnableIRQ(DMA_IRQn);
00239
00240         /* Wait for GPDMA processing complete */
00241         while ((Channel0_TC == 0) && (Channel0_Err == 0));
00242
00243         /* Verify buffer */
00244         Buffer_Verify();
00245
00246         _DBG(compl_menu);
00247
00248     /* Loop forever */
00249     while(1);
00250 }
00251
00252 /* With ARM and GHS toolsets, the entry point is main() - this will
00253    allow the linker to generate wrapper code to setup stacks, allocate
00254    heap area, and initialize and copy code and data segments. For GNU
00255    toolsets, the entry point is through __start() in the crt0_gnu.asm
00256    file, and that startup code will setup stacks and data */
00257 int main(void)
00258 {
00259     return c_entry();
00260 }
00261
00262
00263 #ifdef  DEBUG
00264 /*******************************************************************************
00265 * @brief                Reports the name of the source file and the source line number
00266 *                               where the CHECK_PARAM error has occurred.
00267 * @param[in]    file Pointer to the source file name
00268 * @param[in]    line assert_param error line source number
00269 * @return               None
00270 *******************************************************************************/
00271 void check_failed(uint8_t *file, uint32_t line)
00272 {
00273         /* User can add his own implementation to report the file name and line number,
00274          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00275
00276         /* Infinite loop */
00277         while(1);
00278 }
00279 #endif
00280 /*
00281  * @}
00282  */
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/GPDMA_Sleep/gpdma_sleep.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/GPDMA_Sleep/gpdma_sleep.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          gpdma_sleep.c                           2010-06-18
00003 */
00025 #include "lpc17xx_gpdma.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029 #include "lpc17xx_clkpwr.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE MACROS *************************/
00039 #define DMA_SIZE                0x100UL
00040
00044 #define DMA_SRC                 LPC_AHBRAM1_BASE
00045
00049 #define DMA_DST                 (DMA_SRC+DMA_SIZE)
00050
00051
00052 /************************** PRIVATE VARIABLES *************************/
00053 uint8_t menu1[] =
00054         "********************************************************************************\n\r"
00055         "Hello NXP Semiconductors \n\r"
00056         "GPDMA demo \n\r"
00057         "\t - MCU: LPC17xx \n\r"
00058         "\t - Core: ARM Cortex-M3 \n\r"
00059         "\t - Communicate via: UART0 - 115200bps \n\r"
00060         " This example used to test GPDMA function in sleep mode\n\r"
00061         " It will transfer 2 blocks of data from memory boundary \n\r"
00062         " to the other memory boundary on RAM using GPDMA module in sleep mode \n\r"
00063         "********************************************************************************\n\r";
00064 uint8_t menu2[] = "Demo terminated! \n\r";
00065 uint8_t err_menu[] = "Buffer Check fail!";
00066 uint8_t compl_menu[] = "Buffer Check success!";
00067
00068 // Terminal Counter flag for Channel 0
00069 __IO uint32_t Channel0_TC;
00070
00071 // Error Counter flag for Channel 0
00072 __IO uint32_t Channel0_Err;
00073
00074
00075 /************************** PRIVATE FUNCTIONS *************************/
00076 void DMA_IRQHandler (void);
00077
00078 void print_menu(void);
00079 void Buffer_Init(void);
00080 void Error_Loop(void);
00081
00082 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00083 /*********************************************************************/
00088 void DMA_IRQHandler (void)
00089 {
00090         // check GPDMA interrupt on channel 0
00091         if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 0)){ //check interrupt status on channel 0
00092                 // Check counter terminal status
00093                 if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 0)){
00094                         // Clear terminate counter Interrupt pending
00095                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 0);
00096                                 Channel0_TC++;
00097                 }
00098                 if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, 0)){
00099                         // Clear error counter Interrupt pending
00100                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 0);
00101                         Channel0_Err++;
00102                 }
00103         }
00104 }
00105
00106 /*-------------------------PRIVATE FUNCTIONS-----------------------------*/
00107 /*********************************************************************/
00112 void print_menu(void)
00113 {
00114         _DBG(menu1);
00115 }
00116
00117 /*********************************************************************/
00122 void Buffer_Init(void)
00123 {
00124         uint8_t i;
00125         uint32_t *src_addr = (uint32_t *)DMA_SRC;
00126         uint32_t *dest_addr = (uint32_t *)DMA_DST;
00127
00128          for ( i = 0; i < DMA_SIZE/4; i++ )
00129         {
00130                 *src_addr++ = i;
00131                 *dest_addr++ = 0;
00132         }
00133 }
00134
00135
00136 /*********************************************************************/
00141 void Buffer_Verify(void)
00142 {
00143         uint8_t i;
00144         uint32_t *src_addr = (uint32_t *)DMA_SRC;
00145         uint32_t *dest_addr = (uint32_t *)DMA_DST;
00146
00147         for ( i = 0; i < DMA_SIZE/4; i++ )
00148         {
00149                 if ( *src_addr++ != *dest_addr++ )
00150                 {
00151                         /* Call Error Loop */
00152                         Error_Loop();
00153                 }
00154         }
00155 }
00156
00157
00158 /*********************************************************************/
00163 void Error_Loop(void)
00164 {
00165         _DBG(err_menu);
00166
00167         /* Loop forever */
00168         while (1);
00169 }
00170
00171
00172 /*-------------------------MAIN FUNCTION--------------------------------*/
00173 /*********************************************************************/
00178 int c_entry(void)
00179 {
00180         GPDMA_Channel_CFG_Type GPDMACfg;
00181
00182         /* Initialize debug via UART0
00183          * – 115200bps
00184          * – 8 data bit
00185          * – No parity
00186          * – 1 stop bit
00187          * – No flow control
00188          */
00189         debug_frmwrk_init();
00190
00191         // print welcome screen
00192         print_menu();
00193
00194         /* GPDMA block section -------------------------------------------- */
00195         /* Initialize buffer */
00196         _DBG_("Initialize Buffer...");
00197         Buffer_Init();
00198
00199     /* Disable GPDMA interrupt */
00200     NVIC_DisableIRQ(DMA_IRQn);
00201     /* preemption = 1, sub-priority = 1 */
00202     NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
00203
00204     /* Initialize GPDMA controller */
00205         GPDMA_Init();
00206
00207         // Setup GPDMA channel --------------------------------
00208         // channel 0
00209         GPDMACfg.ChannelNum = 0;
00210         // Source memory
00211         GPDMACfg.SrcMemAddr = DMA_SRC;
00212         // Destination memory
00213         GPDMACfg.DstMemAddr = DMA_DST;
00214         // Transfer size
00215         GPDMACfg.TransferSize = DMA_SIZE;
00216         // Transfer width
00217         GPDMACfg.TransferWidth = GPDMA_WIDTH_WORD;
00218         // Transfer type
00219         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2M;
00220         // Source connection - unused
00221         GPDMACfg.SrcConn = 0;
00222         // Destination connection - unused
00223         GPDMACfg.DstConn = 0;
00224         // Linker List Item - unused
00225         GPDMACfg.DMALLI = 0;
00226         // Setup channel with given parameter
00227         GPDMA_Setup(&GPDMACfg);
00228
00229         /* Reset terminal counter */
00230         Channel0_TC = 0;
00231         /* Reset Error counter */
00232         Channel0_Err = 0;
00233
00234         _DBG_("Start GPDMA transfer and enter system in sleep mode...");
00235
00236         // Enable GPDMA channel 0
00237         GPDMA_ChannelCmd(0, ENABLE);
00238
00239         /* Enable GPDMA interrupt */
00240         NVIC_EnableIRQ(DMA_IRQn);
00241
00242         /* Enter in sleep mode */
00243         CLKPWR_Sleep();
00244
00245         /* Wait for GPDMA processing complete */
00246         while ((Channel0_TC == 0) && (Channel0_Err == 0));
00247
00248         /* Verify buffer */
00249         Buffer_Verify();
00250
00251         _DBG(compl_menu);
00252
00253     /* Loop forever */
00254     while(1);
00255 }
00256
00257 /* With ARM and GHS toolsets, the entry point is main() - this will
00258    allow the linker to generate wrapper code to setup stacks, allocate
00259    heap area, and initialize and copy code and data segments. For GNU
00260    toolsets, the entry point is through __start() in the crt0_gnu.asm
00261    file, and that startup code will setup stacks and data */
00262 int main(void)
00263 {
00264     return c_entry();
00265 }
00266
00267
00268 #ifdef  DEBUG
00269 /*******************************************************************************
00270 * @brief                Reports the name of the source file and the source line number
00271 *                               where the CHECK_PARAM error has occurred.
00272 * @param[in]    file Pointer to the source file name
00273 * @param[in]    line assert_param error line source number
00274 * @return               None
00275 *******************************************************************************/
00276 void check_failed(uint8_t *file, uint32_t line)
00277 {
00278         /* User can add his own implementation to report the file name and line number,
00279          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00280
00281         /* Infinite loop */
00282         while(1);
00283 }
00284 #endif
00285
00286 /*
00287  * @}
00288  */
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/GPIO_Interrupt/gpio_int.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPIO/GPIO_Interrupt/gpio_int.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          gpio_int.c                              2010-05-21
00003 */
00025 #include "LPC17xx.h"
00026 #include "lpc17xx_gpio.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "lpc17xx_libcfg.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINITIONS *************************/
00037 #define MCB_LPC_1768
00038 //#define IAR_LPC_1768
00039
00040 #ifdef MCB_LPC_1768
00041 /* LED pin in byte style on P1 */
00042 #define POLL_LED        (1<<4)          // P1.28
00043 #define INT3_LED        (1<<5)          // P1.29
00044 #define GPIO_INT        (1<<25)         // test GPIO interrupt on P0.25
00045 #elif defined(IAR_LPC_1768)
00046 #define POLL_LED        (1<<1)          //P1.25 (LED2)
00047 #define INT3_LED        (1<<4)          //P0.4  (LED1)
00048 #define GPIO_INT        (1<<23)         // test GPIO interrupt on P0.23
00049 #endif
00050
00051
00052 /************************** PRIVATE FUNCTIONS *************************/
00053 void EINT3_IRQHandler(void);
00054
00055 void delay (void);
00056
00057 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00058 /*********************************************************************/
00063 void EINT3_IRQHandler(void)
00064 {
00065               int j;
00066               if(GPIO_GetIntStatus(0, 25, 1))
00067                   {
00068                   GPIO_ClearInt(0,(1<<25));
00069                           for (j= 0; j<8; j++)
00070                           {
00071 #ifdef MCB_LPC_1768
00072                                   /* Use MCB1700 board:
00073                                    * blink LED P1.29 when EINT3 occur
00074                                    */
00075                                     FIO_ByteSetValue(1, 3, INT3_LED);
00076                                         delay();
00077                                         FIO_ByteClearValue(1, 3, INT3_LED);
00078                                     delay();
00079 #elif defined(IAR_LPC_1768)
00080                                 /* Use IAR LPC1768 KS board:
00081                                  * blink LED2 P0.4 when EINT3 occur
00082                                  */
00083                                     FIO_ByteSetValue(0, 0, INT3_LED);
00084                                         delay();
00085                                         FIO_ByteClearValue(0, 0, INT3_LED);
00086                                     delay();
00087 #endif
00088                           }
00089           }
00090 }
00091
00092 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00093 /*********************************************************************/
00098 void delay (void) {
00099   unsigned int i;
00100
00101   for (i = 0; i < 0x100000; i++) {
00102   }
00103 }
00104
00105
00106 /*-------------------------MAIN FUNCTION------------------------------*/
00107 /*********************************************************************/
00112 int c_entry (void)
00113 {
00118 #ifdef MCB_LPC_1768
00119         FIO_ByteSetDir(1, 3, POLL_LED, 1);
00120         FIO_ByteSetDir(1, 3, INT3_LED, 1);
00121         // Turn off all LEDs
00122         FIO_ByteClearValue(1, 3, POLL_LED);
00123         FIO_ByteClearValue(1, 3, INT3_LED);
00124 #elif defined(IAR_LPC_1768)
00125         FIO_ByteSetDir(1, 3, POLL_LED, 1);
00126         FIO_ByteSetDir(0, 0, INT3_LED, 1);
00127         // Turn off all LEDs
00128         FIO_ByteSetValue(1, 3, POLL_LED);
00129         FIO_ByteSetValue(0, 0, INT3_LED);
00130 #endif
00131
00132         // Enable GPIO interrupt
00133         /* Use MCB1700: test GPIO interrupt on P0.25->connects with ADC potentiometer
00134          * Use IAR KS : test GPIO interrupt on P0.23->connects with BUT1 button
00135          */
00136         GPIO_IntCmd(0,(1<<25),1);
00137         NVIC_EnableIRQ(EINT3_IRQn);
00138
00139         while (1)
00140         {
00141                 //polling led while idle
00142                 FIO_ByteSetValue(1, 3, POLL_LED);
00143                 delay();
00144                 FIO_ByteClearValue(1, 3, POLL_LED);
00145                 delay();
00146         }
00147 }
00148
00149
00150 /* With ARM and GHS toolsets, the entry point is main() - this will
00151    allow the linker to generate wrapper code to setup stacks, allocate
00152    heap area, and initialize and copy code and data segments. For GNU
00153    toolsets, the entry point is through __start() in the crt0_gnu.asm
00154    file, and that startup code will setup stacks and data */
00155 int main(void)
00156 {
00157     return c_entry();
00158 }
00159
00160 #ifdef  DEBUG
00161 /*******************************************************************************
00162 * @brief                Reports the name of the source file and the source line number
00163 *                               where the CHECK_PARAM error has occurred.
00164 * @param[in]    file Pointer to the source file name
00165 * @param[in]    line assert_param error line source number
00166 * @return               None
00167 *******************************************************************************/
00168 void check_failed(uint8_t *file, uint32_t line)
00169 {
00170         /* User can add his own implementation to report the file name and line number,
00171          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00172
00173         /* Infinite loop */
00174         while(1);
00175 }
00176 #endif
00177
00178 /*
00179  * @}
00180  */
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.c
Go to the documentation of this file.
00001
00014 /*
00015  * This is a short example of how to write uIP applications using
00016  * protosockets.
00017  */
00018
00019 /*
00020  * We define the application state (struct hello_world_state) in the
00021  * hello-world.h file, so we need to include it here. We also include
00022  * uip.h (since this cannot be included in hello-world.h) and
00023  * <string.h>, since we use the memcpy() function in the code.
00024  */
00025 #include "hello-world.h"
00026 #include "uip.h"
00027 #include <string.h>
00028
00029 /*
00030  * Declaration of the protosocket function that handles the connection
00031  * (defined at the end of the code).
00032  */
00033 static int handle_connection(struct hello_world_state *s);
00034 /*---------------------------------------------------------------------------*/
00035 /*
00036  * The initialization function. We must explicitly call this function
00037  * from the system initialization code, some time after uip_init() is
00038  * called.
00039  */
00040 void
00041 hello_world_init(void)
00042 {
00043   /* We start to listen for connections on TCP port 1000. */
00044   uip_listen(HTONS(1000));
00045 }
00046 /*---------------------------------------------------------------------------*/
00047 /*
00048  * In hello-world.h we have defined the UIP_APPCALL macro to
00049  * hello_world_appcall so that this funcion is uIP's application
00050  * function. This function is called whenever an uIP event occurs
00051  * (e.g. when a new connection is established, new data arrives, sent
00052  * data is acknowledged, data needs to be retransmitted, etc.).
00053  */
00054 void
00055 hello_world_appcall(void)
00056 {
00057   /*
00058    * The uip_conn structure has a field called "appstate" that holds
00059    * the application state of the connection. We make a pointer to
00060    * this to access it easier.
00061    */
00062   struct hello_world_state *s = &(uip_conn->appstate);
00063
00064   /*
00065    * If a new connection was just established, we should initialize
00066    * the protosocket in our applications' state structure.
00067    */
00068   if(uip_connected()) {
00069     PSOCK_INIT(&s->p, s->inputbuffer, sizeof(s->inputbuffer));
00070   }
00071
00072   /*
00073    * Finally, we run the protosocket function that actually handles
00074    * the communication. We pass it a pointer to the application state
00075    * of the current connection.
00076    */
00077   handle_connection(s);
00078 }
00079 /*---------------------------------------------------------------------------*/
00080 /*
00081  * This is the protosocket function that handles the communication. A
00082  * protosocket function must always return an int, but must never
00083  * explicitly return - all return statements are hidden in the PSOCK
00084  * macros.
00085  */
00086 static int
00087 handle_connection(struct hello_world_state *s)
00088 {
00089   PSOCK_BEGIN(&s->p);
00090
00091   PSOCK_SEND_STR(&s->p, "Hello. What is your name?\n");
00092   PSOCK_READTO(&s->p, '\n');
00093   strncpy(s->name, s->inputbuffer, sizeof(s->name));
00094   PSOCK_SEND_STR(&s->p, "Hello ");
00095   PSOCK_SEND_STR(&s->p, s->name);
00096   PSOCK_CLOSE(&s->p);
00097
00098   PSOCK_END(&s->p);
00099 }
00100 /*---------------------------------------------------------------------------*/
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/hello-world/hello-world.h
Go to the documentation of this file.
00001
00026 #ifndef __HELLO_WORLD_H__
00027 #define __HELLO_WORLD_H__
00028
00029 /* Since this file will be included by uip.h, we cannot include uip.h
00030    here. But we might need to include uipopt.h if we need the u8_t and
00031    u16_t datatypes. */
00032 #include "uipopt.h"
00033
00034 #include "psock.h"
00035
00036 /* Next, we define the uip_tcp_appstate_t datatype. This is the state
00037    of our application, and the memory required for this state is
00038    allocated together with each TCP connection. One application state
00039    for each TCP connection. */
00040 typedef struct hello_world_state {
00041   struct psock p;
00042   char inputbuffer[10];
00043   char name[40];
00044 } uip_tcp_appstate_t;
00045
00046 /* Finally we define the application function to be called by uIP. */
00047 void hello_world_appcall(void);
00048 #ifndef UIP_APPCALL
00049 #define UIP_APPCALL hello_world_appcall
00050 #endif /* UIP_APPCALL */
00051
00052 void hello_world_init(void);
00053
00054 #endif /* __HELLO_WORLD_H__ */
00055
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hid.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hid.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    HID.H
00005  *      Purpose: USB HID (Human Interface Device) Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __HID_H__
00020 #define __HID_H__
00021
00022 #if defined   (  __GNUC__  )
00023 #define __packed __attribute__((__packed__))
00024 #endif
00025
00026
00027 /* HID Subclass Codes */
00028 #define HID_SUBCLASS_NONE               0x00
00029 #define HID_SUBCLASS_BOOT               0x01
00030
00031 /* HID Protocol Codes */
00032 #define HID_PROTOCOL_NONE               0x00
00033 #define HID_PROTOCOL_KEYBOARD           0x01
00034 #define HID_PROTOCOL_MOUSE              0x02
00035
00036
00037 /* HID Descriptor Types */
00038 #define HID_HID_DESCRIPTOR_TYPE         0x21
00039 #define HID_REPORT_DESCRIPTOR_TYPE      0x22
00040 #define HID_PHYSICAL_DESCRIPTOR_TYPE    0x23
00041
00042
00043 /* HID Descriptor */
00044 #if defined     (  __CC_ARM  )
00045 typedef __packed struct _HID_DESCRIPTOR {
00046 #elif defined   (  __GNUC__  )
00047 typedef struct __packed _HID_DESCRIPTOR {
00048 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00049 #pragma pack(1)
00050 typedef struct _HID_DESCRIPTOR {
00051 #endif
00052   uint8_t  bLength;
00053   uint8_t  bDescriptorType;
00054   uint16_t  bcdHID;
00055   uint8_t  bCountryCode;
00056   uint8_t  bNumDescriptors;
00057   /* Array of one or more descriptors */
00058 #if defined     (  __CC_ARM  )
00059   __packed struct _HID_DESCRIPTOR_LIST {
00060 #elif defined   (  __GNUC__  )
00061   struct __packed _HID_DESCRIPTOR_LIST {
00062 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00063 #pragma pack(1)
00064   struct _HID_DESCRIPTOR_LIST {
00065 #endif
00066     uint8_t  bDescriptorType;
00067     uint16_t  wDescriptorLength;
00068   } DescriptorList[1];
00069 #ifdef __IAR_SYSTEMS_ICC__
00070 #pragma pack()
00071 #endif
00072 } HID_DESCRIPTOR;
00073 #ifdef __IAR_SYSTEMS_ICC__
00074 #pragma pack()
00075 #endif
00076
00077 /* HID Request Codes */
00078 #define HID_REQUEST_GET_REPORT          0x01
00079 #define HID_REQUEST_GET_IDLE            0x02
00080 #define HID_REQUEST_GET_PROTOCOL        0x03
00081 #define HID_REQUEST_SET_REPORT          0x09
00082 #define HID_REQUEST_SET_IDLE            0x0A
00083 #define HID_REQUEST_SET_PROTOCOL        0x0B
00084
00085 /* HID Report Types */
00086 #define HID_REPORT_INPUT                0x01
00087 #define HID_REPORT_OUTPUT               0x02
00088 #define HID_REPORT_FEATURE              0x03
00089
00090
00091 /* Usage Pages */
00092 #define HID_USAGE_PAGE_UNDEFINED        0x00
00093 #define HID_USAGE_PAGE_GENERIC          0x01
00094 #define HID_USAGE_PAGE_SIMULATION       0x02
00095 #define HID_USAGE_PAGE_VR               0x03
00096 #define HID_USAGE_PAGE_SPORT            0x04
00097 #define HID_USAGE_PAGE_GAME             0x05
00098 #define HID_USAGE_PAGE_DEV_CONTROLS     0x06
00099 #define HID_USAGE_PAGE_KEYBOARD         0x07
00100 #define HID_USAGE_PAGE_LED              0x08
00101 #define HID_USAGE_PAGE_BUTTON           0x09
00102 #define HID_USAGE_PAGE_ORDINAL          0x0A
00103 #define HID_USAGE_PAGE_TELEPHONY        0x0B
00104 #define HID_USAGE_PAGE_CONSUMER         0x0C
00105 #define HID_USAGE_PAGE_DIGITIZER        0x0D
00106 #define HID_USAGE_PAGE_UNICODE          0x10
00107 #define HID_USAGE_PAGE_ALPHANUMERIC     0x14
00108 /* ... */
00109
00110
00111 /* Generic Desktop Page (0x01) */
00112 #define HID_USAGE_GENERIC_POINTER               0x01
00113 #define HID_USAGE_GENERIC_MOUSE                 0x02
00114 #define HID_USAGE_GENERIC_JOYSTICK              0x04
00115 #define HID_USAGE_GENERIC_GAMEPAD               0x05
00116 #define HID_USAGE_GENERIC_KEYBOARD              0x06
00117 #define HID_USAGE_GENERIC_KEYPAD                0x07
00118 #define HID_USAGE_GENERIC_X                     0x30
00119 #define HID_USAGE_GENERIC_Y                     0x31
00120 #define HID_USAGE_GENERIC_Z                     0x32
00121 #define HID_USAGE_GENERIC_RX                    0x33
00122 #define HID_USAGE_GENERIC_RY                    0x34
00123 #define HID_USAGE_GENERIC_RZ                    0x35
00124 #define HID_USAGE_GENERIC_SLIDER                0x36
00125 #define HID_USAGE_GENERIC_DIAL                  0x37
00126 #define HID_USAGE_GENERIC_WHEEL                 0x38
00127 #define HID_USAGE_GENERIC_HATSWITCH             0x39
00128 #define HID_USAGE_GENERIC_COUNTED_BUFFER        0x3A
00129 #define HID_USAGE_GENERIC_BYTE_COUNT            0x3B
00130 #define HID_USAGE_GENERIC_MOTION_WAKEUP         0x3C
00131 #define HID_USAGE_GENERIC_VX                    0x40
00132 #define HID_USAGE_GENERIC_VY                    0x41
00133 #define HID_USAGE_GENERIC_VZ                    0x42
00134 #define HID_USAGE_GENERIC_VBRX                  0x43
00135 #define HID_USAGE_GENERIC_VBRY                  0x44
00136 #define HID_USAGE_GENERIC_VBRZ                  0x45
00137 #define HID_USAGE_GENERIC_VNO                   0x46
00138 #define HID_USAGE_GENERIC_SYSTEM_CTL            0x80
00139 #define HID_USAGE_GENERIC_SYSCTL_POWER          0x81
00140 #define HID_USAGE_GENERIC_SYSCTL_SLEEP          0x82
00141 #define HID_USAGE_GENERIC_SYSCTL_WAKE           0x83
00142 #define HID_USAGE_GENERIC_SYSCTL_CONTEXT_MENU   0x84
00143 #define HID_USAGE_GENERIC_SYSCTL_MAIN_MENU      0x85
00144 #define HID_USAGE_GENERIC_SYSCTL_APP_MENU       0x86
00145 #define HID_USAGE_GENERIC_SYSCTL_HELP_MENU      0x87
00146 #define HID_USAGE_GENERIC_SYSCTL_MENU_EXIT      0x88
00147 #define HID_USAGE_GENERIC_SYSCTL_MENU_SELECT    0x89
00148 #define HID_USAGE_GENERIC_SYSCTL_MENU_RIGHT     0x8A
00149 #define HID_USAGE_GENERIC_SYSCTL_MENU_LEFT      0x8B
00150 #define HID_USAGE_GENERIC_SYSCTL_MENU_UP        0x8C
00151 #define HID_USAGE_GENERIC_SYSCTL_MENU_DOWN      0x8D
00152 /* ... */
00153
00154 /* Simulation Controls Page (0x02) */
00155 /* ... */
00156 #define HID_USAGE_SIMULATION_RUDDER             0xBA
00157 #define HID_USAGE_SIMULATION_THROTTLE           0xBB
00158 /* ... */
00159
00160 /* Virtual Reality Controls Page (0x03) */
00161 /* ... */
00162
00163 /* Sport Controls Page (0x04) */
00164 /* ... */
00165
00166 /* Game Controls Page (0x05) */
00167 /* ... */
00168
00169 /* Generic Device Controls Page (0x06) */
00170 /* ... */
00171
00172 /* Keyboard/Keypad Page (0x07) */
00173
00174 /* Error "keys" */
00175 #define HID_USAGE_KEYBOARD_NOEVENT              0x00
00176 #define HID_USAGE_KEYBOARD_ROLLOVER             0x01
00177 #define HID_USAGE_KEYBOARD_POSTFAIL             0x02
00178 #define HID_USAGE_KEYBOARD_UNDEFINED            0x03
00179
00180 /* Letters */
00181 #define HID_USAGE_KEYBOARD_aA                   0x04
00182 #define HID_USAGE_KEYBOARD_zZ                   0x1D
00183
00184 /* Numbers */
00185 #define HID_USAGE_KEYBOARD_ONE                  0x1E
00186 #define HID_USAGE_KEYBOARD_ZERO                 0x27
00187
00188 #define HID_USAGE_KEYBOARD_RETURN               0x28
00189 #define HID_USAGE_KEYBOARD_ESCAPE               0x29
00190 #define HID_USAGE_KEYBOARD_DELETE               0x2A
00191
00192 /* Funtion keys */
00193 #define HID_USAGE_KEYBOARD_F1                   0x3A
00194 #define HID_USAGE_KEYBOARD_F12                  0x45
00195
00196 #define HID_USAGE_KEYBOARD_PRINT_SCREEN         0x46
00197
00198 /* Modifier Keys */
00199 #define HID_USAGE_KEYBOARD_LCTRL                0xE0
00200 #define HID_USAGE_KEYBOARD_LSHFT                0xE1
00201 #define HID_USAGE_KEYBOARD_LALT                 0xE2
00202 #define HID_USAGE_KEYBOARD_LGUI                 0xE3
00203 #define HID_USAGE_KEYBOARD_RCTRL                0xE4
00204 #define HID_USAGE_KEYBOARD_RSHFT                0xE5
00205 #define HID_USAGE_KEYBOARD_RALT                 0xE6
00206 #define HID_USAGE_KEYBOARD_RGUI                 0xE7
00207 #define HID_USAGE_KEYBOARD_SCROLL_LOCK          0x47
00208 #define HID_USAGE_KEYBOARD_NUM_LOCK             0x53
00209 #define HID_USAGE_KEYBOARD_CAPS_LOCK            0x39
00210
00211 /* ... */
00212
00213 /* LED Page (0x08) */
00214 #define HID_USAGE_LED_NUM_LOCK                  0x01
00215 #define HID_USAGE_LED_CAPS_LOCK                 0x02
00216 #define HID_USAGE_LED_SCROLL_LOCK               0x03
00217 #define HID_USAGE_LED_COMPOSE                   0x04
00218 #define HID_USAGE_LED_KANA                      0x05
00219 #define HID_USAGE_LED_POWER                     0x06
00220 #define HID_USAGE_LED_SHIFT                     0x07
00221 #define HID_USAGE_LED_DO_NOT_DISTURB            0x08
00222 #define HID_USAGE_LED_MUTE                      0x09
00223 #define HID_USAGE_LED_TONE_ENABLE               0x0A
00224 #define HID_USAGE_LED_HIGH_CUT_FILTER           0x0B
00225 #define HID_USAGE_LED_LOW_CUT_FILTER            0x0C
00226 #define HID_USAGE_LED_EQUALIZER_ENABLE          0x0D
00227 #define HID_USAGE_LED_SOUND_FIELD_ON            0x0E
00228 #define HID_USAGE_LED_SURROUND_FIELD_ON         0x0F
00229 #define HID_USAGE_LED_REPEAT                    0x10
00230 #define HID_USAGE_LED_STEREO                    0x11
00231 #define HID_USAGE_LED_SAMPLING_RATE_DETECT      0x12
00232 #define HID_USAGE_LED_SPINNING                  0x13
00233 #define HID_USAGE_LED_CAV                       0x14
00234 #define HID_USAGE_LED_CLV                       0x15
00235 #define HID_USAGE_LED_RECORDING_FORMAT_DET      0x16
00236 #define HID_USAGE_LED_OFF_HOOK                  0x17
00237 #define HID_USAGE_LED_RING                      0x18
00238 #define HID_USAGE_LED_MESSAGE_WAITING           0x19
00239 #define HID_USAGE_LED_DATA_MODE                 0x1A
00240 #define HID_USAGE_LED_BATTERY_OPERATION         0x1B
00241 #define HID_USAGE_LED_BATTERY_OK                0x1C
00242 #define HID_USAGE_LED_BATTERY_LOW               0x1D
00243 #define HID_USAGE_LED_SPEAKER                   0x1E
00244 #define HID_USAGE_LED_HEAD_SET                  0x1F
00245 #define HID_USAGE_LED_HOLD                      0x20
00246 #define HID_USAGE_LED_MICROPHONE                0x21
00247 #define HID_USAGE_LED_COVERAGE                  0x22
00248 #define HID_USAGE_LED_NIGHT_MODE                0x23
00249 #define HID_USAGE_LED_SEND_CALLS                0x24
00250 #define HID_USAGE_LED_CALL_PICKUP               0x25
00251 #define HID_USAGE_LED_CONFERENCE                0x26
00252 #define HID_USAGE_LED_STAND_BY                  0x27
00253 #define HID_USAGE_LED_CAMERA_ON                 0x28
00254 #define HID_USAGE_LED_CAMERA_OFF                0x29
00255 #define HID_USAGE_LED_ON_LINE                   0x2A
00256 #define HID_USAGE_LED_OFF_LINE                  0x2B
00257 #define HID_USAGE_LED_BUSY                      0x2C
00258 #define HID_USAGE_LED_READY                     0x2D
00259 #define HID_USAGE_LED_PAPER_OUT                 0x2E
00260 #define HID_USAGE_LED_PAPER_JAM                 0x2F
00261 #define HID_USAGE_LED_REMOTE                    0x30
00262 #define HID_USAGE_LED_FORWARD                   0x31
00263 #define HID_USAGE_LED_REVERSE                   0x32
00264 #define HID_USAGE_LED_STOP                      0x33
00265 #define HID_USAGE_LED_REWIND                    0x34
00266 #define HID_USAGE_LED_FAST_FORWARD              0x35
00267 #define HID_USAGE_LED_PLAY                      0x36
00268 #define HID_USAGE_LED_PAUSE                     0x37
00269 #define HID_USAGE_LED_RECORD                    0x38
00270 #define HID_USAGE_LED_ERROR                     0x39
00271 #define HID_USAGE_LED_SELECTED_INDICATOR        0x3A
00272 #define HID_USAGE_LED_IN_USE_INDICATOR          0x3B
00273 #define HID_USAGE_LED_MULTI_MODE_INDICATOR      0x3C
00274 #define HID_USAGE_LED_INDICATOR_ON              0x3D
00275 #define HID_USAGE_LED_INDICATOR_FLASH           0x3E
00276 #define HID_USAGE_LED_INDICATOR_SLOW_BLINK      0x3F
00277 #define HID_USAGE_LED_INDICATOR_FAST_BLINK      0x40
00278 #define HID_USAGE_LED_INDICATOR_OFF             0x41
00279 #define HID_USAGE_LED_FLASH_ON_TIME             0x42
00280 #define HID_USAGE_LED_SLOW_BLINK_ON_TIME        0x43
00281 #define HID_USAGE_LED_SLOW_BLINK_OFF_TIME       0x44
00282 #define HID_USAGE_LED_FAST_BLINK_ON_TIME        0x45
00283 #define HID_USAGE_LED_FAST_BLINK_OFF_TIME       0x46
00284 #define HID_USAGE_LED_INDICATOR_COLOR           0x47
00285 #define HID_USAGE_LED_RED                       0x48
00286 #define HID_USAGE_LED_GREEN                     0x49
00287 #define HID_USAGE_LED_AMBER                     0x4A
00288 #define HID_USAGE_LED_GENERIC_INDICATOR         0x4B
00289
00290 /* Button Page (0x09) */
00291 /*   There is no need to label these usages. */
00292
00293 /* Ordinal Page (0x0A) */
00294 /*   There is no need to label these usages. */
00295
00296 /* Telephony Device Page (0x0B) */
00297 #define HID_USAGE_TELEPHONY_PHONE               0x01
00298 #define HID_USAGE_TELEPHONY_ANSWERING_MACHINE   0x02
00299 #define HID_USAGE_TELEPHONY_MESSAGE_CONTROLS    0x03
00300 #define HID_USAGE_TELEPHONY_HANDSET             0x04
00301 #define HID_USAGE_TELEPHONY_HEADSET             0x05
00302 #define HID_USAGE_TELEPHONY_KEYPAD              0x06
00303 #define HID_USAGE_TELEPHONY_PROGRAMMABLE_BUTTON 0x07
00304 /* ... */
00305
00306 /* Consumer Page (0x0C) */
00307 #define HID_USAGE_CONSUMER_CONTROL              0x01
00308 /* ... */
00309
00310 /* and others ... */
00311
00312
00313 /* HID Report Item Macros */
00314
00315 /* Main Items */
00316 #define HID_Input(x)           0x81,x
00317 #define HID_Output(x)          0x91,x
00318 #define HID_Feature(x)         0xB1,x
00319 #define HID_Collection(x)      0xA1,x
00320 #define HID_EndCollection      0xC0
00321
00322 /* Data (Input, Output, Feature) */
00323 #define HID_Data               0<<0
00324 #define HID_Constant           1<<0
00325 #define HID_Array              0<<1
00326 #define HID_Variable           1<<1
00327 #define HID_Absolute           0<<2
00328 #define HID_Relative           1<<2
00329 #define HID_NoWrap             0<<3
00330 #define HID_Wrap               1<<3
00331 #define HID_Linear             0<<4
00332 #define HID_NonLinear          1<<4
00333 #define HID_PreferredState     0<<5
00334 #define HID_NoPreferred        1<<5
00335 #define HID_NoNullPosition     0<<6
00336 #define HID_NullState          1<<6
00337 #define HID_NonVolatile        0<<7
00338 #define HID_Volatile           1<<7
00339
00340 /* Collection Data */
00341 #define HID_Physical           0x00
00342 #define HID_Application        0x01
00343 #define HID_Logical            0x02
00344 #define HID_Report             0x03
00345 #define HID_NamedArray         0x04
00346 #define HID_UsageSwitch        0x05
00347 #define HID_UsageModifier      0x06
00348
00349 /* Global Items */
00350 #define HID_UsagePage(x)       0x05,x
00351 #define HID_UsagePageVendor(x) 0x06,x,0xFF
00352 #define HID_LogicalMin(x)      0x15,x
00353 #define HID_LogicalMinS(x)     0x16,(x&0xFF),((x>>8)&0xFF)
00354 #define HID_LogicalMinL(x)     0x17,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)
00355 #define HID_LogicalMax(x)      0x25,x
00356 #define HID_LogicalMaxS(x)     0x26,(x&0xFF),((x>>8)&0xFF)
00357 #define HID_LogicalMaxL(x)     0x27,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)
00358 #define HID_PhysicalMin(x)     0x35,x
00359 #define HID_PhysicalMinS(x)    0x36,(x&0xFF),((x>>8)&0xFF)
00360 #define HID_PhysicalMinL(x)    0x37,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)
00361 #define HID_PhysicalMax(x)     0x45,x
00362 #define HID_PhysicalMaxS(x)    0x46,(x&0xFF),((x>>8)&0xFF)
00363 #define HID_PhysicalMaxL(x)    0x47,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)
00364 #define HID_UnitExponent(x)    0x55,x
00365 #define HID_Unit(x)            0x65,x
00366 #define HID_UnitS(x)           0x66,(x&0xFF),((x>>8)&0xFF)
00367 #define HID_UnitL(x)           0x67,(x&0xFF),((x>>8)&0xFF),((x>>16)&0xFF),((x>>24)&0xFF)
00368 #define HID_ReportSize(x)      0x75,x
00369 #define HID_ReportID(x)        0x85,x
00370 #define HID_ReportCount(x)     0x95,x
00371 #define HID_Push               0xA0
00372 #define HID_Pop                0xB0
00373
00374 /* Local Items */
00375 #define HID_Usage(x)           0x09,x
00376 #define HID_UsageMin(x)        0x19,x
00377 #define HID_UsageMax(x)        0x29,x
00378
00379
00380 #endif  /* __HID_H__ */
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hiduser.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hiduser.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    HIDUSER.C
00005  *      Purpose: HID Custom User Module
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008 *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019
00020 #include "lpc_types.h"
00021
00022 #include "usb.h"
00023 #include "hid.h"
00024 #include "usbcfg.h"
00025 #include "usbcore.h"
00026 #include "hiduser.h"
00027
00028 #include "demo.h"
00029
00030
00031 uint8_t HID_Protocol;
00032 uint8_t HID_IdleTime[HID_REPORT_NUM];
00033
00034
00035 /*
00036  *  HID Get Report Request Callback
00037  *   Called automatically on HID Get Report Request
00038  *    Parameters:      None (global SetupPacket and EP0Buf)
00039  *    Return Value:    TRUE - Success, FALSE - Error
00040  */
00041
00042 uint32_t HID_GetReport (void) {
00043
00044   /* ReportID = SetupPacket.wValue.WB.L; */
00045   switch (SetupPacket.wValue.WB.H) {
00046     case HID_REPORT_INPUT:
00047       GetInReport();
00048       EP0Buf[0] = InReport;
00049       break;
00050     case HID_REPORT_OUTPUT:
00051       return (FALSE);          /* Not Supported */
00052     case HID_REPORT_FEATURE:
00053       /* EP0Buf[] = ...; */
00054       /* break; */
00055       return (FALSE);          /* Not Supported */
00056   }
00057   return (TRUE);
00058 }
00059
00060
00061 /*
00062  *  HID Set Report Request Callback
00063  *   Called automatically on HID Set Report Request
00064  *    Parameters:      None (global SetupPacket and EP0Buf)
00065  *    Return Value:    TRUE - Success, FALSE - Error
00066  */
00067
00068 uint32_t HID_SetReport (void) {
00069
00070   /* ReportID = SetupPacket.wValue.WB.L; */
00071   switch (SetupPacket.wValue.WB.H) {
00072     case HID_REPORT_INPUT:
00073       return (FALSE);          /* Not Supported */
00074     case HID_REPORT_OUTPUT:
00075       OutReport = EP0Buf[0];
00076       SetOutReport();
00077       break;
00078     case HID_REPORT_FEATURE:
00079       return (FALSE);          /* Not Supported */
00080   }
00081   return (TRUE);
00082 }
00083
00084
00085 /*
00086  *  HID Get Idle Request Callback
00087  *   Called automatically on HID Get Idle Request
00088  *    Parameters:      None (global SetupPacket and EP0Buf)
00089  *    Return Value:    TRUE - Success, FALSE - Error
00090  */
00091
00092 uint32_t HID_GetIdle (void) {
00093
00094   EP0Buf[0] = HID_IdleTime[SetupPacket.wValue.WB.L];
00095   return (TRUE);
00096 }
00097
00098
00099 /*
00100  *  HID Set Idle Request Callback
00101  *   Called automatically on HID Set Idle Request
00102  *    Parameters:      None (global SetupPacket)
00103  *    Return Value:    TRUE - Success, FALSE - Error
00104  */
00105
00106 uint32_t HID_SetIdle (void) {
00107
00108   HID_IdleTime[SetupPacket.wValue.WB.L] = SetupPacket.wValue.WB.H;
00109
00110   /* Idle Handling if needed */
00111   /* ... */
00112
00113   return (TRUE);
00114 }
00115
00116
00117 /*
00118  *  HID Get Protocol Request Callback
00119  *   Called automatically on HID Get Protocol Request
00120  *    Parameters:      None (global SetupPacket)
00121  *    Return Value:    TRUE - Success, FALSE - Error
00122  */
00123
00124 uint32_t HID_GetProtocol (void) {
00125
00126   EP0Buf[0] = HID_Protocol;
00127   return (TRUE);
00128 }
00129
00130
00131 /*
00132  *  HID Set Protocol Request Callback
00133  *   Called automatically on HID Set Protocol Request
00134  *    Parameters:      None (global SetupPacket)
00135  *    Return Value:    TRUE - Success, FALSE - Error
00136  */
00137
00138 uint32_t HID_SetProtocol (void) {
00139
00140   HID_Protocol = SetupPacket.wValue.WB.L;
00141
00142   /* Protocol Handling if needed */
00143   /* ... */
00144
00145   return (TRUE);
00146 }
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hiduser.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBHID/hiduser.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    HIDUSER.H
00005  *      Purpose: HID Custom User Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __HIDUSER_H__
00020 #define __HIDUSER_H__
00021
00022
00023 /* HID Number of Reports */
00024 #define HID_REPORT_NUM      1
00025
00026 /* HID Global Variables */
00027 extern uint8_t HID_Protocol;
00028 extern uint8_t HID_IdleTime[HID_REPORT_NUM];
00029
00030 /* HID Requests Callback Functions */
00031 extern uint32_t HID_GetReport   (void);
00032 extern uint32_t HID_SetReport   (void);
00033 extern uint32_t HID_GetIdle     (void);
00034 extern uint32_t HID_SetIdle     (void);
00035 extern uint32_t HID_GetProtocol (void);
00036 extern uint32_t HID_SetProtocol (void);
00037
00038
00039 #endif  /* __HIDUSER_H__ */
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/http-strings.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/http-strings.c
Go to the documentation of this file.
00001 const char http_http[8] =
00002 /* "http://" */
00003 {0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, };
00004 const char http_200[5] =
00005 /* "200 " */
00006 {0x32, 0x30, 0x30, 0x20, };
00007 const char http_301[5] =
00008 /* "301 " */
00009 {0x33, 0x30, 0x31, 0x20, };
00010 const char http_302[5] =
00011 /* "302 " */
00012 {0x33, 0x30, 0x32, 0x20, };
00013 const char http_get[5] =
00014 /* "GET " */
00015 {0x47, 0x45, 0x54, 0x20, };
00016 const char http_10[9] =
00017 /* "HTTP/1.0" */
00018 {0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, };
00019 const char http_11[9] =
00020 /* "HTTP/1.1" */
00021 {0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x31, };
00022 const char http_content_type[15] =
00023 /* "content-type: " */
00024 {0x63, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, };
00025 const char http_texthtml[10] =
00026 /* "text/html" */
00027 {0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, };
00028 const char http_location[11] =
00029 /* "location: " */
00030 {0x6c, 0x6f, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, };
00031 const char http_host[7] =
00032 /* "host: " */
00033 {0x68, 0x6f, 0x73, 0x74, 0x3a, 0x20, };
00034 const char http_crnl[3] =
00035 /* "\r\n" */
00036 {0xd, 0xa, };
00037 const char http_index_html[12] =
00038 /* "/index.html" */
00039 {0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };
00040 const char http_404_html[10] =
00041 /* "/404.html" */
00042 {0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };
00043 const char http_referer[9] =
00044 /* "Referer:" */
00045 {0x52, 0x65, 0x66, 0x65, 0x72, 0x65, 0x72, 0x3a, };
00046 const char http_header_200[84] =
00047 /* "HTTP/1.0 200 OK\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */
00048 {0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x32, 0x30, 0x30, 0x20, 0x4f, 0x4b, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };
00049 const char http_header_404[91] =
00050 /* "HTTP/1.0 404 Not found\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */
00051 {0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x34, 0x30, 0x34, 0x20, 0x4e, 0x6f, 0x74, 0x20, 0x66, 0x6f, 0x75, 0x6e, 0x64, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };
00052 const char http_content_type_plain[29] =
00053 /* "Content-type: text/plain\r\n\r\n" */
00054 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x70, 0x6c, 0x61, 0x69, 0x6e, 0xd, 0xa, 0xd, 0xa, };
00055 const char http_content_type_html[28] =
00056 /* "Content-type: text/html\r\n\r\n" */
00057 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0xd, 0xa, 0xd, 0xa, };
00058 const char http_content_type_css [27] =
00059 /* "Content-type: text/css\r\n\r\n" */
00060 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x63, 0x73, 0x73, 0xd, 0xa, 0xd, 0xa, };
00061 const char http_content_type_text[28] =
00062 /* "Content-type: text/text\r\n\r\n" */
00063 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x74, 0x65, 0x78, 0x74, 0xd, 0xa, 0xd, 0xa, };
00064 const char http_content_type_png [28] =
00065 /* "Content-type: image/png\r\n\r\n" */
00066 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x70, 0x6e, 0x67, 0xd, 0xa, 0xd, 0xa, };
00067 const char http_content_type_gif [28] =
00068 /* "Content-type: image/gif\r\n\r\n" */
00069 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x67, 0x69, 0x66, 0xd, 0xa, 0xd, 0xa, };
00070 const char http_content_type_jpg [29] =
00071 /* "Content-type: image/jpeg\r\n\r\n" */
00072 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x6a, 0x70, 0x65, 0x67, 0xd, 0xa, 0xd, 0xa, };
00073 const char http_content_type_binary[43] =
00074 /* "Content-type: application/octet-stream\r\n\r\n" */
00075 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x61, 0x70, 0x70, 0x6c, 0x69, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x2f, 0x6f, 0x63, 0x74, 0x65, 0x74, 0x2d, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d, 0xd, 0xa, 0xd, 0xa, };
00076 const char http_html[6] =
00077 /* ".html" */
00078 {0x2e, 0x68, 0x74, 0x6d, 0x6c, };
00079 const char http_shtml[7] =
00080 /* ".shtml" */
00081 {0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, };
00082 const char http_htm[5] =
00083 /* ".htm" */
00084 {0x2e, 0x68, 0x74, 0x6d, };
00085 const char http_css[5] =
00086 /* ".css" */
00087 {0x2e, 0x63, 0x73, 0x73, };
00088 const char http_png[5] =
00089 /* ".png" */
00090 {0x2e, 0x70, 0x6e, 0x67, };
00091 const char http_gif[5] =
00092 /* ".gif" */
00093 {0x2e, 0x67, 0x69, 0x66, };
00094 const char http_jpg[5] =
00095 /* ".jpg" */
00096 {0x2e, 0x6a, 0x70, 0x67, };
00097 const char http_text[5] =
00098 /* ".txt" */
00099 {0x2e, 0x74, 0x78, 0x74, };
00100 const char http_txt[5] =
00101 /* ".txt" */
00102 {0x2e, 0x74, 0x78, 0x74, };
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/http-strings.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/http-strings.h
Go to the documentation of this file.
00001 extern const char http_http[8];
00002 extern const char http_200[5];
00003 extern const char http_301[5];
00004 extern const char http_302[5];
00005 extern const char http_get[5];
00006 extern const char http_10[9];
00007 extern const char http_11[9];
00008 extern const char http_content_type[15];
00009 extern const char http_texthtml[10];
00010 extern const char http_location[11];
00011 extern const char http_host[7];
00012 extern const char http_crnl[3];
00013 extern const char http_index_html[12];
00014 extern const char http_404_html[10];
00015 extern const char http_referer[9];
00016 extern const char http_header_200[84];
00017 extern const char http_header_404[91];
00018 extern const char http_content_type_plain[29];
00019 extern const char http_content_type_html[28];
00020 extern const char http_content_type_css [27];
00021 extern const char http_content_type_text[28];
00022 extern const char http_content_type_png [28];
00023 extern const char http_content_type_gif [28];
00024 extern const char http_content_type_jpg [29];
00025 extern const char http_content_type_binary[43];
00026 extern const char http_html[6];
00027 extern const char http_shtml[7];
00028 extern const char http_htm[5];
00029 extern const char http_css[5];
00030 extern const char http_png[5];
00031 extern const char http_gif[5];
00032 extern const char http_jpg[5];
00033 extern const char http_text[5];
00034 extern const char http_txt[5];
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.c
Go to the documentation of this file.
00001
00014 /*
00015  * Copyright (c) 2001-2006, Adam Dunkels.
00016  * All rights reserved.
00017  *
00018  * Redistribution and use in source and binary forms, with or without
00019  * modification, are permitted provided that the following conditions
00020  * are met:
00021  * 1. Redistributions of source code must retain the above copyright
00022  *    notice, this list of conditions and the following disclaimer.
00023  * 2. Redistributions in binary form must reproduce the above copyright
00024  *    notice, this list of conditions and the following disclaimer in the
00025  *    documentation and/or other materials provided with the distribution.
00026  * 3. The name of the author may not be used to endorse or promote
00027  *    products derived from this software without specific prior
00028  *    written permission.
00029  *
00030  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00031  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00032  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00033  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00034  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00035  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00036  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00037  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00038  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00039  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00040  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00041  *
00042  * This file is part of the uIP TCP/IP stack.
00043  *
00044  * $Id: httpd-cgi.c,v 1.2 2006/06/11 21:46:37 adam Exp $
00045  *
00046  */
00047
00048 #include "uip.h"
00049 #include "psock.h"
00050 #include "httpd.h"
00051 #include "httpd-cgi.h"
00052 #include "httpd-fs.h"
00053
00054 #include <stdio.h>
00055 #include <string.h>
00056
00057 HTTPD_CGI_CALL(file, "file-stats", file_stats);
00058 HTTPD_CGI_CALL(tcp, "tcp-connections", tcp_stats);
00059 HTTPD_CGI_CALL(net, "net-stats", net_stats);
00060
00061 static const struct httpd_cgi_call *calls[] = { &file, &tcp, &net, NULL };
00062
00063 /*---------------------------------------------------------------------------*/
00064 static
00065 PT_THREAD(nullfunction(struct httpd_state *s, char *ptr))
00066 {
00067   PSOCK_BEGIN(&s->sout);
00068   PSOCK_END(&s->sout);
00069 }
00070 /*---------------------------------------------------------------------------*/
00071 httpd_cgifunction
00072 httpd_cgi(char *name)
00073 {
00074   const struct httpd_cgi_call **f;
00075
00076   /* Find the matching name in the table, return the function. */
00077   for(f = calls; *f != NULL; ++f) {
00078     if(strncmp((*f)->name, name, strlen((*f)->name)) == 0) {
00079       return (*f)->function;
00080     }
00081   }
00082   return nullfunction;
00083 }
00084 /*---------------------------------------------------------------------------*/
00085 static unsigned short
00086 generate_file_stats(void *arg)
00087 {
00088   char *f = (char *)arg;
00089   return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE, "%5u", httpd_fs_count(f));
00090 }
00091 /*---------------------------------------------------------------------------*/
00092 static
00093 PT_THREAD(file_stats(struct httpd_state *s, char *ptr))
00094 {
00095   PSOCK_BEGIN(&s->sout);
00096
00097   PSOCK_GENERATOR_SEND(&s->sout, generate_file_stats, strchr(ptr, ' ') + 1);
00098
00099   PSOCK_END(&s->sout);
00100 }
00101 /*---------------------------------------------------------------------------*/
00102 static const char closed[] =   /*  "CLOSED",*/
00103 {0x43, 0x4c, 0x4f, 0x53, 0x45, 0x44, 0};
00104 static const char syn_rcvd[] = /*  "SYN-RCVD",*/
00105 {0x53, 0x59, 0x4e, 0x2d, 0x52, 0x43, 0x56,
00106  0x44,  0};
00107 static const char syn_sent[] = /*  "SYN-SENT",*/
00108 {0x53, 0x59, 0x4e, 0x2d, 0x53, 0x45, 0x4e,
00109  0x54,  0};
00110 static const char established[] = /*  "ESTABLISHED",*/
00111 {0x45, 0x53, 0x54, 0x41, 0x42, 0x4c, 0x49, 0x53, 0x48,
00112  0x45, 0x44, 0};
00113 static const char fin_wait_1[] = /*  "FIN-WAIT-1",*/
00114 {0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,
00115  0x54, 0x2d, 0x31, 0};
00116 static const char fin_wait_2[] = /*  "FIN-WAIT-2",*/
00117 {0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,
00118  0x54, 0x2d, 0x32, 0};
00119 static const char closing[] = /*  "CLOSING",*/
00120 {0x43, 0x4c, 0x4f, 0x53, 0x49,
00121  0x4e, 0x47, 0};
00122 static const char time_wait[] = /*  "TIME-WAIT,"*/
00123 {0x54, 0x49, 0x4d, 0x45, 0x2d, 0x57, 0x41,
00124  0x49, 0x54, 0};
00125 static const char last_ack[] = /*  "LAST-ACK"*/
00126 {0x4c, 0x41, 0x53, 0x54, 0x2d, 0x41, 0x43,
00127  0x4b, 0};
00128
00129 static const char *states[] = {
00130   closed,
00131   syn_rcvd,
00132   syn_sent,
00133   established,
00134   fin_wait_1,
00135   fin_wait_2,
00136   closing,
00137   time_wait,
00138   last_ack};
00139
00140
00141 static unsigned short
00142 generate_tcp_stats(void *arg)
00143 {
00144   struct uip_conn *conn;
00145   struct httpd_state *s = (struct httpd_state *)arg;
00146
00147   conn = &uip_conns[s->count];
00148   return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE,
00149                  "<tr><td>%d</td><td>%u.%u.%u.%u:%u</td><td>%s</td><td>%u</td><td>%u</td><td>%c %c</td></tr>\r\n",
00150                  htons(conn->lport),
00151                  htons(conn->ripaddr[0]) >> 8,
00152                  htons(conn->ripaddr[0]) & 0xff,
00153                  htons(conn->ripaddr[1]) >> 8,
00154                  htons(conn->ripaddr[1]) & 0xff,
00155                  htons(conn->rport),
00156                  states[conn->tcpstateflags & UIP_TS_MASK],
00157                  conn->nrtx,
00158                  conn->timer,
00159                  (uip_outstanding(conn))? '*':' ',
00160                  (uip_stopped(conn))? '!':' ');
00161 }
00162 /*---------------------------------------------------------------------------*/
00163 static
00164 PT_THREAD(tcp_stats(struct httpd_state *s, char *ptr))
00165 {
00166
00167   PSOCK_BEGIN(&s->sout);
00168
00169   for(s->count = 0; s->count < UIP_CONNS; ++s->count) {
00170     if((uip_conns[s->count].tcpstateflags & UIP_TS_MASK) != UIP_CLOSED) {
00171       PSOCK_GENERATOR_SEND(&s->sout, generate_tcp_stats, s);
00172     }
00173   }
00174
00175   PSOCK_END(&s->sout);
00176 }
00177 /*---------------------------------------------------------------------------*/
00178 static unsigned short
00179 generate_net_stats(void *arg)
00180 {
00181   struct httpd_state *s = (struct httpd_state *)arg;
00182   return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE,
00183                   "%5u\n", ((uip_stats_t *)&uip_stat)[s->count]);
00184 }
00185
00186 static
00187 PT_THREAD(net_stats(struct httpd_state *s, char *ptr))
00188 {
00189   PSOCK_BEGIN(&s->sout);
00190
00191 #if UIP_STATISTICS
00192
00193   for(s->count = 0; s->count < sizeof(uip_stat) / sizeof(uip_stats_t);
00194       ++s->count) {
00195     PSOCK_GENERATOR_SEND(&s->sout, generate_net_stats, s);
00196   }
00197
00198 #endif /* UIP_STATISTICS */
00199
00200   PSOCK_END(&s->sout);
00201 }
00202 /*---------------------------------------------------------------------------*/
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-cgi.h
Go to the documentation of this file.
00001
00016 /*
00017  * Copyright (c) 2001, Adam Dunkels.
00018  * All rights reserved.
00019  *
00020  * Redistribution and use in source and binary forms, with or without
00021  * modification, are permitted provided that the following conditions
00022  * are met:
00023  * 1. Redistributions of source code must retain the above copyright
00024  *    notice, this list of conditions and the following disclaimer.
00025  * 2. Redistributions in binary form must reproduce the above copyright
00026  *    notice, this list of conditions and the following disclaimer in the
00027  *    documentation and/or other materials provided with the distribution.
00028  * 3. The name of the author may not be used to endorse or promote
00029  *    products derived from this software without specific prior
00030  *    written permission.
00031  *
00032  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00033  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00034  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00035  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00036  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00037  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00038  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00039  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00040  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00041  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00042  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00043  *
00044  * This file is part of the uIP TCP/IP stack.
00045  *
00046  * $Id: httpd-cgi.h,v 1.2 2006/06/11 21:46:38 adam Exp $
00047  *
00048  */
00049
00050 #ifndef __HTTPD_CGI_H__
00051 #define __HTTPD_CGI_H__
00052
00053 #include "psock.h"
00054 #include "httpd.h"
00055
00056 typedef PT_THREAD((* httpd_cgifunction)(struct httpd_state *, char *));
00057
00058 httpd_cgifunction httpd_cgi(char *name);
00059
00060 struct httpd_cgi_call {
00061   const char *name;
00062   const httpd_cgifunction function;
00063 };
00064
00077 #define HTTPD_CGI_CALL(name, str, function) \
00078 static PT_THREAD(function(struct httpd_state *, char *)); \
00079 static const struct httpd_cgi_call name = {str, function}
00080
00081 void httpd_cgi_init(void);
00082 #endif /* __HTTPD_CGI_H__ */
00083
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.c
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2001, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the lwIP TCP/IP stack.
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: httpd-fs.c,v 1.1 2006/06/07 09:13:08 adam Exp $
00034  */
00035
00036 #include "httpd.h"
00037 #include "httpd-fs.h"
00038 #include "httpd-fsdata.h"
00039
00040 #ifndef NULL
00041 #define NULL 0
00042 #endif /* NULL */
00043
00044 #include "httpd-fsdata.c"
00045
00046 #if HTTPD_FS_STATISTICS
00047 static u16_t count[HTTPD_FS_NUMFILES];
00048 #endif /* HTTPD_FS_STATISTICS */
00049
00050 /*-----------------------------------------------------------------------------------*/
00051 static u8_t
00052 httpd_fs_strcmp(const char *str1, const char *str2)
00053 {
00054   u8_t i;
00055   i = 0;
00056  loop:
00057
00058   if(str2[i] == 0 ||
00059      str1[i] == '\r' ||
00060      str1[i] == '\n') {
00061     return 0;
00062   }
00063
00064   if(str1[i] != str2[i]) {
00065     return 1;
00066   }
00067
00068
00069   ++i;
00070   goto loop;
00071 }
00072 /*-----------------------------------------------------------------------------------*/
00073 int
00074 httpd_fs_open(const char *name, struct httpd_fs_file *file)
00075 {
00076 #if HTTPD_FS_STATISTICS
00077   u16_t i = 0;
00078 #endif /* HTTPD_FS_STATISTICS */
00079   struct httpd_fsdata_file_noconst *f;
00080
00081   for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;
00082       f != NULL;
00083       f = (struct httpd_fsdata_file_noconst *)f->next) {
00084
00085     if(httpd_fs_strcmp(name, f->name) == 0) {
00086       file->data = f->data;
00087       file->len = f->len;
00088 #if HTTPD_FS_STATISTICS
00089       ++count[i];
00090 #endif /* HTTPD_FS_STATISTICS */
00091       return 1;
00092     }
00093 #if HTTPD_FS_STATISTICS
00094     ++i;
00095 #endif /* HTTPD_FS_STATISTICS */
00096
00097   }
00098   return 0;
00099 }
00100 /*-----------------------------------------------------------------------------------*/
00101 void
00102 httpd_fs_init(void)
00103 {
00104 #if HTTPD_FS_STATISTICS
00105   u16_t i;
00106   for(i = 0; i < HTTPD_FS_NUMFILES; i++) {
00107     count[i] = 0;
00108   }
00109 #endif /* HTTPD_FS_STATISTICS */
00110 }
00111 /*-----------------------------------------------------------------------------------*/
00112 #if HTTPD_FS_STATISTICS
00113 u16_t httpd_fs_count
00114 (char *name)
00115 {
00116   struct httpd_fsdata_file_noconst *f;
00117   u16_t i;
00118
00119   i = 0;
00120   for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;
00121       f != NULL;
00122       f = (struct httpd_fsdata_file_noconst *)f->next) {
00123
00124     if(httpd_fs_strcmp(name, f->name) == 0) {
00125       return count[i];
00126     }
00127     ++i;
00128   }
00129   return 0;
00130 }
00131 #endif /* HTTPD_FS_STATISTICS */
00132 /*-----------------------------------------------------------------------------------*/
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fs.h
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2001, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the lwIP TCP/IP stack.
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: httpd-fs.h,v 1.1 2006/06/07 09:13:08 adam Exp $
00034  */
00035 #ifndef __HTTPD_FS_H__
00036 #define __HTTPD_FS_H__
00037
00038 #define HTTPD_FS_STATISTICS 1
00039
00040 struct httpd_fs_file {
00041   char *data;
00042   int len;
00043 };
00044
00045 /* file must be allocated by caller and will be filled in
00046    by the function. */
00047 int httpd_fs_open(const char *name, struct httpd_fs_file *file);
00048
00049 #ifdef HTTPD_FS_STATISTICS
00050 #if HTTPD_FS_STATISTICS == 1
00051 u16_t httpd_fs_count(char *name);
00052 #endif /* HTTPD_FS_STATISTICS */
00053 #endif /* HTTPD_FS_STATISTICS */
00054
00055 void httpd_fs_init(void);
00056
00057 #endif /* __HTTPD_FS_H__ */
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.c
Go to the documentation of this file.
00001 static const unsigned char data_processes_shtml[] = {
00002         /* /processes.shtml */
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00010         0x31, 0x30, 0x30, 0x25, 0x22, 0x3e, 0xa, 0x3c, 0x74, 0x72,
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00015         0x68, 0x3e, 0x3c, 0x74, 0x68, 0x3e, 0x50, 0x6f, 0x6c, 0x6c,
00016         0x20, 0x68, 0x61, 0x6e, 0x64, 0x6c, 0x65, 0x72, 0x3c, 0x2f,
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00019         0x3c, 0x2f, 0x74, 0x68, 0x3e, 0x3c, 0x74, 0x68, 0x3e, 0x50,
00020         0x72, 0x6f, 0x63, 0x73, 0x74, 0x61, 0x74, 0x65, 0x3c, 0x2f,
00021         0x74, 0x68, 0x3e, 0x3c, 0x2f, 0x74, 0x72, 0x3e, 0xa, 0x25,
00022         0x21, 0x20, 0x70, 0x72, 0x6f, 0x63, 0x65, 0x73, 0x73, 0x65,
00023         0x73, 0xa, 0x25, 0x21, 0x3a, 0x20, 0x2f, 0x66, 0x6f, 0x6f,
00024         0x74, 0x65, 0x72, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0};
00025
00026 static const unsigned char data_404_html[] = {
00027         /* /404.html */
00028         0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0,
00029         0x3c, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0xa, 0x20, 0x20, 0x3c,
00030         0x62, 0x6f, 0x64, 0x79, 0x20, 0x62, 0x67, 0x63, 0x6f, 0x6c,
00031         0x6f, 0x72, 0x3d, 0x22, 0x77, 0x68, 0x69, 0x74, 0x65, 0x22,
00032         0x3e, 0xa, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x63, 0x65, 0x6e,
00033         0x74, 0x65, 0x72, 0x3e, 0xa, 0x20, 0x20, 0x20, 0x20, 0x20,
00034         0x20, 0x3c, 0x68, 0x31, 0x3e, 0x34, 0x30, 0x34, 0x20, 0x2d,
00035         0x20, 0x66, 0x69, 0x6c, 0x65, 0x20, 0x6e, 0x6f, 0x74, 0x20,
00036         0x66, 0x6f, 0x75, 0x6e, 0x64, 0x3c, 0x2f, 0x68, 0x31, 0x3e,
00037         0xa, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x68, 0x33,
00038         0x3e, 0x47, 0x6f, 0x20, 0x3c, 0x61, 0x20, 0x68, 0x72, 0x65,
00039         0x66, 0x3d, 0x22, 0x2f, 0x22, 0x3e, 0x68, 0x65, 0x72, 0x65,
00040         0x3c, 0x2f, 0x61, 0x3e, 0x20, 0x69, 0x6e, 0x73, 0x74, 0x65,
00041         0x61, 0x64, 0x2e, 0x3c, 0x2f, 0x68, 0x33, 0x3e, 0xa, 0x20,
00042         0x20, 0x20, 0x20, 0x3c, 0x2f, 0x63, 0x65, 0x6e, 0x74, 0x65,
00043         0x72, 0x3e, 0xa, 0x20, 0x20, 0x3c, 0x2f, 0x62, 0x6f, 0x64,
00044         0x79, 0x3e, 0xa, 0x3c, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x3e,
00045 0};
00046
00047 static const unsigned char data_files_shtml[] = {
00048         /* /files.shtml */
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00177 static const unsigned char data_footer_html[] = {
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00183 static const unsigned char data_header_html[] = {
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00249
00250 static const unsigned char data_index_html[] = {
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00341
00342 static const unsigned char data_style_css[] = {
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00447
00448 static const unsigned char data_tcp_shtml[] = {
00449         /* /tcp.shtml */
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00470         0x6f, 0x6e, 0x73, 0xa, 0x25, 0x21, 0x3a, 0x20, 0x2f, 0x66,
00471         0x6f, 0x6f, 0x74, 0x65, 0x72, 0x2e, 0x68, 0x74, 0x6d, 0x6c,
00472 0};
00473
00474 static const unsigned char data_fade_png[] = {
00475         /* /fade.png */
00476         0x2f, 0x66, 0x61, 0x64, 0x65, 0x2e, 0x70, 0x6e, 0x67, 0,
00477         0x89, 0x50, 0x4e, 0x47, 0xd, 0xa, 0x1a, 0xa, 00, 00,
00478         00, 0xd, 0x49, 0x48, 0x44, 0x52, 00, 00, 00, 0x4,
00479         00, 00, 00, 0xa, 0x8, 0x2, 00, 00, 00, 0x1c,
00480         0x99, 0x68, 0x59, 00, 00, 00, 0x9, 0x70, 0x48, 0x59,
00481         0x73, 00, 00, 0xb, 0x13, 00, 00, 0xb, 0x13, 0x1,
00482         00, 0x9a, 0x9c, 0x18, 00, 00, 00, 0x7, 0x74, 0x49,
00483         0x4d, 0x45, 0x7, 0xd6, 0x6, 0x8, 0x14, 0x1b, 0x39, 0xaf,
00484         0x5b, 0xc0, 0xe3, 00, 00, 00, 0x1d, 0x74, 0x45, 0x58,
00485         0x74, 0x43, 0x6f, 0x6d, 0x6d, 0x65, 0x6e, 0x74, 00, 0x43,
00486         0x72, 0x65, 0x61, 0x74, 0x65, 0x64, 0x20, 0x77, 0x69, 0x74,
00487         0x68, 0x20, 0x54, 0x68, 0x65, 0x20, 0x47, 0x49, 0x4d, 0x50,
00488         0xef, 0x64, 0x25, 0x6e, 00, 00, 00, 0x3a, 0x49, 0x44,
00489         0x41, 0x54, 0x8, 0xd7, 0x75, 0x8c, 0x31, 0x12, 00, 0x10,
00490         0x10, 0xc4, 0x2e, 0x37, 0x9e, 0x40, 0x65, 0xfd, 0xff, 0x83,
00491         0xf4, 0xa, 0x1c, 0x8d, 0x54, 0x9b, 0xc9, 0xcc, 0x9a, 0x3d,
00492         0x90, 0x73, 0x71, 0x67, 0x91, 0xd4, 0x74, 0x36, 0xa9, 0x55,
00493         0x1, 0xf8, 0x29, 0x58, 0xc8, 0xbf, 0x48, 0xc4, 0x81, 0x74,
00494         0xb, 0xa3, 0xf, 0x7c, 0xdb, 0x4, 0xe8, 0x40, 0x5, 0xdf,
00495         0xa1, 0xf3, 0xfc, 0x73, 00, 00, 00, 00, 0x49, 0x45,
00496         0x4e, 0x44, 0xae, 0x42, 0x60, 0x82, 0};
00497
00498 static const unsigned char data_stats_shtml[] = {
00499         /* /stats.shtml */
00500         0x2f, 0x73, 0x74, 0x61, 0x74, 0x73, 0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, 0,
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00502         0x72, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0xa, 0x3c, 0x68, 0x31,
00503         0x3e, 0x4e, 0x65, 0x74, 0x77, 0x6f, 0x72, 0x6b, 0x20, 0x73,
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00505         0x2f, 0x68, 0x31, 0x3e, 0xa, 0x3c, 0x63, 0x65, 0x6e, 0x74,
00506         0x65, 0x72, 0x3e, 0xa, 0x3c, 0x74, 0x61, 0x62, 0x6c, 0x65,
00507         0x20, 0x77, 0x69, 0x64, 0x74, 0x68, 0x3d, 0x22, 0x33, 0x30,
00508         0x30, 0x22, 0x20, 0x62, 0x6f, 0x72, 0x64, 0x65, 0x72, 0x3d,
00509         0x22, 0x30, 0x22, 0x3e, 0xa, 0x3c, 0x74, 0x72, 0x3e, 0x3c,
00510         0x74, 0x64, 0x3e, 0x3c, 0x70, 0x72, 0x65, 0x3e, 0xa, 0x49,
00511         0x50, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
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00534         0x65, 0x63, 0x6b, 0x73, 0x75, 0x6d, 0xa, 0x20, 0x20, 0x20,
00535         0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
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00538         0x20, 0x20, 0x20, 0x20, 0x20, 0x50, 0x61, 0x63, 0x6b, 0x65,
00539         0x74, 0x73, 0x20, 0x72, 0x65, 0x63, 0x65, 0x69, 0x76, 0x65,
00540         0x64, 0xa, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
00541         0x20, 0x20, 0x20, 0x20, 0x20, 0x50, 0x61, 0x63, 0x6b, 0x65,
00542         0x74, 0x73, 0x20, 0x73, 0x65, 0x6e, 0x74, 0xa, 0x20, 0x20,
00543         0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
00544         0x20, 0x50, 0x61, 0x63, 0x6b, 0x65, 0x74, 0x73, 0x20, 0x64,
00545         0x72, 0x6f, 0x70, 0x70, 0x65, 0x64, 0xa, 0x20, 0x20, 0x20,
00546         0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
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00550         0x74, 0x73, 0x20, 0x72, 0x65, 0x63, 0x65, 0x69, 0x76, 0x65,
00551         0x64, 0xa, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
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00562         0x73, 0x20, 0x77, 0x69, 0x74, 0x68, 0x6f, 0x75, 0x74, 0x20,
00563         0x41, 0x43, 0x4b, 0x73, 0xa, 0x20, 0x20, 0x20, 0x20, 0x20,
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00567         0x74, 0x72, 0x61, 0x6e, 0x73, 0x6d, 0x69, 0x73, 0x73, 0x69,
00568         0x6f, 0x6e, 0x73, 0xa, 0x9, 0x20, 0x20, 0x20, 0x20, 0x20,
00569         0x4e, 0x6f, 0x20, 0x63, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74,
00570         0x69, 0x6f, 0x6e, 0x20, 0x61, 0x76, 0x61, 0x6c, 0x69, 0x61,
00571         0x62, 0x6c, 0x65, 0xa, 0x9, 0x20, 0x20, 0x20, 0x20, 0x20,
00572         0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e,
00573         0x20, 0x61, 0x74, 0x74, 0x65, 0x6d, 0x70, 0x74, 0x73, 0x20,
00574         0x74, 0x6f, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0x64, 0x20,
00575         0x70, 0x6f, 0x72, 0x74, 0x73, 0xa, 0x3c, 0x2f, 0x70, 0x72,
00576         0x65, 0x3e, 0x3c, 0x2f, 0x74, 0x64, 0x3e, 0x3c, 0x74, 0x64,
00577         0x3e, 0x3c, 0x70, 0x72, 0x65, 0x3e, 0x25, 0x21, 0x20, 0x6e,
00578         0x65, 0x74, 0x2d, 0x73, 0x74, 0x61, 0x74, 0x73, 0xa, 0x3c,
00579         0x2f, 0x70, 0x72, 0x65, 0x3e, 0x3c, 0x2f, 0x74, 0x61, 0x62,
00580         0x6c, 0x65, 0x3e, 0xa, 0x3c, 0x2f, 0x63, 0x65, 0x6e, 0x74,
00581         0x65, 0x72, 0x3e, 0xa, 0x25, 0x21, 0x3a, 0x20, 0x2f, 0x66,
00582         0x6f, 0x6f, 0x74, 0x65, 0x72, 0x2e, 0x68, 0x74, 0x6d, 0x6c,
00583         0xa, 0};
00584
00585 const struct httpd_fsdata_file file_processes_shtml[] = {{NULL, data_processes_shtml, data_processes_shtml + 17, sizeof(data_processes_shtml) - 17}};
00586
00587 const struct httpd_fsdata_file file_404_html[] = {{file_processes_shtml, data_404_html, data_404_html + 10, sizeof(data_404_html) - 10}};
00588
00589 const struct httpd_fsdata_file file_files_shtml[] = {{file_404_html, data_files_shtml, data_files_shtml + 13, sizeof(data_files_shtml) - 13}};
00590
00591 const struct httpd_fsdata_file file_footer_html[] = {{file_files_shtml, data_footer_html, data_footer_html + 13, sizeof(data_footer_html) - 13}};
00592
00593 const struct httpd_fsdata_file file_header_html[] = {{file_footer_html, data_header_html, data_header_html + 13, sizeof(data_header_html) - 13}};
00594
00595 const struct httpd_fsdata_file file_index_html[] = {{file_header_html, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}};
00596
00597 const struct httpd_fsdata_file file_style_css[] = {{file_index_html, data_style_css, data_style_css + 11, sizeof(data_style_css) - 11}};
00598
00599 const struct httpd_fsdata_file file_tcp_shtml[] = {{file_style_css, data_tcp_shtml, data_tcp_shtml + 11, sizeof(data_tcp_shtml) - 11}};
00600
00601 const struct httpd_fsdata_file file_fade_png[] = {{file_tcp_shtml, data_fade_png, data_fade_png + 10, sizeof(data_fade_png) - 10}};
00602
00603 const struct httpd_fsdata_file file_stats_shtml[] = {{file_fade_png, data_stats_shtml, data_stats_shtml + 13, sizeof(data_stats_shtml) - 13}};
00604
00605 #define HTTPD_FS_ROOT file_stats_shtml
00606
00607 #define HTTPD_FS_NUMFILES 10
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd-fsdata.h
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2001, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the lwIP TCP/IP stack.
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: httpd-fsdata.h,v 1.1 2006/06/07 09:13:08 adam Exp $
00034  */
00035 #ifndef __HTTPD_FSDATA_H__
00036 #define __HTTPD_FSDATA_H__
00037
00038 #include "uip.h"
00039
00040 struct httpd_fsdata_file {
00041   const struct httpd_fsdata_file *next;
00042   const char *name;
00043   const char *data;
00044   const int len;
00045 #ifdef HTTPD_FS_STATISTICS
00046 #if HTTPD_FS_STATISTICS == 1
00047   u16_t count;
00048 #endif /* HTTPD_FS_STATISTICS */
00049 #endif /* HTTPD_FS_STATISTICS */
00050 };
00051
00052 struct httpd_fsdata_file_noconst {
00053   struct httpd_fsdata_file *next;
00054   char *name;
00055   char *data;
00056   int len;
00057 #ifdef HTTPD_FS_STATISTICS
00058 #if HTTPD_FS_STATISTICS == 1
00059   u16_t count;
00060 #endif /* HTTPD_FS_STATISTICS */
00061 #endif /* HTTPD_FS_STATISTICS */
00062 };
00063
00064 #endif /* __HTTPD_FSDATA_H__ */
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.c
Go to the documentation of this file.
00001
00026 /*
00027  * Copyright (c) 2004, Adam Dunkels.
00028  * All rights reserved.
00029  *
00030  * Redistribution and use in source and binary forms, with or without
00031  * modification, are permitted provided that the following conditions
00032  * are met:
00033  * 1. Redistributions of source code must retain the above copyright
00034  *    notice, this list of conditions and the following disclaimer.
00035  * 2. Redistributions in binary form must reproduce the above copyright
00036  *    notice, this list of conditions and the following disclaimer in the
00037  *    documentation and/or other materials provided with the distribution.
00038  * 3. Neither the name of the Institute nor the names of its contributors
00039  *    may be used to endorse or promote products derived from this software
00040  *    without specific prior written permission.
00041  *
00042  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00043  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00044  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00045  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00046  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00047  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00048  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00049  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00050  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00051  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00052  * SUCH DAMAGE.
00053  *
00054  * This file is part of the uIP TCP/IP stack.
00055  *
00056  * Author: Adam Dunkels <adam@sics.se>
00057  *
00058  * $Id: httpd.c,v 1.2 2006/06/11 21:46:38 adam Exp $
00059  */
00060
00061 #include "uip.h"
00062 #include "httpd.h"
00063 #include "httpd-fs.h"
00064 #include "httpd-cgi.h"
00065 #include "http-strings.h"
00066
00067 #include <string.h>
00068
00069 #define STATE_WAITING 0
00070 #define STATE_OUTPUT  1
00071
00072 #define ISO_nl      0x0a
00073 #define ISO_space   0x20
00074 #define ISO_bang    0x21
00075 #define ISO_percent 0x25
00076 #define ISO_period  0x2e
00077 #define ISO_slash   0x2f
00078 #define ISO_colon   0x3a
00079
00080
00081 /*---------------------------------------------------------------------------*/
00082 static unsigned short
00083 generate_part_of_file(void *state)
00084 {
00085   struct httpd_state *s = (struct httpd_state *)state;
00086
00087   if(s->file.len > uip_mss()) {
00088     s->len = uip_mss();
00089   } else {
00090     s->len = s->file.len;
00091   }
00092   memcpy(uip_appdata, s->file.data, s->len);
00093
00094   return s->len;
00095 }
00096 /*---------------------------------------------------------------------------*/
00097 static
00098 PT_THREAD(send_file(struct httpd_state *s))
00099 {
00100   PSOCK_BEGIN(&s->sout);
00101
00102   do {
00103     PSOCK_GENERATOR_SEND(&s->sout, generate_part_of_file, s);
00104     s->file.len -= s->len;
00105     s->file.data += s->len;
00106   } while(s->file.len > 0);
00107
00108   PSOCK_END(&s->sout);
00109 }
00110 /*---------------------------------------------------------------------------*/
00111 static
00112 PT_THREAD(send_part_of_file(struct httpd_state *s))
00113 {
00114   PSOCK_BEGIN(&s->sout);
00115
00116   PSOCK_SEND(&s->sout, s->file.data, s->len);
00117
00118   PSOCK_END(&s->sout);
00119 }
00120 /*---------------------------------------------------------------------------*/
00121 static void
00122 next_scriptstate(struct httpd_state *s)
00123 {
00124   char *p;
00125   p = strchr(s->scriptptr, ISO_nl) + 1;
00126   s->scriptlen -= (unsigned short)(p - s->scriptptr);
00127   s->scriptptr = p;
00128 }
00129 /*---------------------------------------------------------------------------*/
00130 static
00131 PT_THREAD(handle_script(struct httpd_state *s))
00132 {
00133   char *ptr;
00134
00135   PT_BEGIN(&s->scriptpt);
00136
00137
00138   while(s->file.len > 0) {
00139
00140     /* Check if we should start executing a script. */
00141     if(*s->file.data == ISO_percent &&
00142        *(s->file.data + 1) == ISO_bang) {
00143       s->scriptptr = s->file.data + 3;
00144       s->scriptlen = s->file.len - 3;
00145       if(*(s->scriptptr - 1) == ISO_colon) {
00146         httpd_fs_open(s->scriptptr + 1, &s->file);
00147         PT_WAIT_THREAD(&s->scriptpt, send_file(s));
00148       } else {
00149         PT_WAIT_THREAD(&s->scriptpt,
00150                        httpd_cgi(s->scriptptr)(s, s->scriptptr));
00151       }
00152       next_scriptstate(s);
00153
00154       /* The script is over, so we reset the pointers and continue
00155          sending the rest of the file. */
00156       s->file.data = s->scriptptr;
00157       s->file.len = s->scriptlen;
00158     } else {
00159       /* See if we find the start of script marker in the block of HTML
00160          to be sent. */
00161
00162       if(s->file.len > uip_mss()) {
00163         s->len = uip_mss();
00164       } else {
00165         s->len = s->file.len;
00166       }
00167
00168       if(*s->file.data == ISO_percent) {
00169         ptr = strchr(s->file.data + 1, ISO_percent);
00170       } else {
00171         ptr = strchr(s->file.data, ISO_percent);
00172       }
00173       if(ptr != NULL &&
00174          ptr != s->file.data) {
00175         s->len = (int)(ptr - s->file.data);
00176         if(s->len >= uip_mss()) {
00177           s->len = uip_mss();
00178         }
00179       }
00180       PT_WAIT_THREAD(&s->scriptpt, send_part_of_file(s));
00181       s->file.data += s->len;
00182       s->file.len -= s->len;
00183
00184     }
00185   }
00186
00187   PT_END(&s->scriptpt);
00188 }
00189 /*---------------------------------------------------------------------------*/
00190 static
00191 PT_THREAD(send_headers(struct httpd_state *s, const char *statushdr))
00192 {
00193   char *ptr;
00194
00195   PSOCK_BEGIN(&s->sout);
00196
00197   PSOCK_SEND_STR(&s->sout, statushdr);
00198
00199   ptr = strrchr(s->filename, ISO_period);
00200   if(ptr == NULL) {
00201     PSOCK_SEND_STR(&s->sout, http_content_type_binary);
00202   } else if(strncmp(http_html, ptr, 5) == 0 ||
00203             strncmp(http_shtml, ptr, 6) == 0) {
00204     PSOCK_SEND_STR(&s->sout, http_content_type_html);
00205   } else if(strncmp(http_css, ptr, 4) == 0) {
00206     PSOCK_SEND_STR(&s->sout, http_content_type_css);
00207   } else if(strncmp(http_png, ptr, 4) == 0) {
00208     PSOCK_SEND_STR(&s->sout, http_content_type_png);
00209   } else if(strncmp(http_gif, ptr, 4) == 0) {
00210     PSOCK_SEND_STR(&s->sout, http_content_type_gif);
00211   } else if(strncmp(http_jpg, ptr, 4) == 0) {
00212     PSOCK_SEND_STR(&s->sout, http_content_type_jpg);
00213   } else {
00214     PSOCK_SEND_STR(&s->sout, http_content_type_plain);
00215   }
00216   PSOCK_END(&s->sout);
00217 }
00218 /*---------------------------------------------------------------------------*/
00219 static
00220 PT_THREAD(handle_output(struct httpd_state *s))
00221 {
00222   char *ptr;
00223
00224   PT_BEGIN(&s->outputpt);
00225
00226   if(!httpd_fs_open(s->filename, &s->file)) {
00227     httpd_fs_open(http_404_html, &s->file);
00228     strcpy(s->filename, http_404_html);
00229     PT_WAIT_THREAD(&s->outputpt,
00230                    send_headers(s,
00231                    http_header_404));
00232     PT_WAIT_THREAD(&s->outputpt,
00233                    send_file(s));
00234   } else {
00235     PT_WAIT_THREAD(&s->outputpt,
00236                    send_headers(s,
00237                    http_header_200));
00238     ptr = strchr(s->filename, ISO_period);
00239     if(ptr != NULL && strncmp(ptr, http_shtml, 6) == 0) {
00240       PT_INIT(&s->scriptpt);
00241       PT_WAIT_THREAD(&s->outputpt, handle_script(s));
00242     } else {
00243       PT_WAIT_THREAD(&s->outputpt,
00244                      send_file(s));
00245     }
00246   }
00247   PSOCK_CLOSE(&s->sout);
00248   PT_END(&s->outputpt);
00249 }
00250 /*---------------------------------------------------------------------------*/
00251 static
00252 PT_THREAD(handle_input(struct httpd_state *s))
00253 {
00254   PSOCK_BEGIN(&s->sin);
00255
00256   PSOCK_READTO(&s->sin, ISO_space);
00257
00258
00259   if(strncmp(s->inputbuf, http_get, 4) != 0) {
00260     PSOCK_CLOSE_EXIT(&s->sin);
00261   }
00262   PSOCK_READTO(&s->sin, ISO_space);
00263
00264   if(s->inputbuf[0] != ISO_slash) {
00265     PSOCK_CLOSE_EXIT(&s->sin);
00266   }
00267
00268   if(s->inputbuf[1] == ISO_space) {
00269     strncpy(s->filename, http_index_html, sizeof(s->filename));
00270   } else {
00271     s->inputbuf[PSOCK_DATALEN(&s->sin) - 1] = 0;
00272     strncpy(s->filename, &s->inputbuf[0], sizeof(s->filename));
00273   }
00274
00275   /*  httpd_log_file(uip_conn->ripaddr, s->filename);*/
00276
00277   s->state = STATE_OUTPUT;
00278
00279   while(1) {
00280     PSOCK_READTO(&s->sin, ISO_nl);
00281
00282     if(strncmp(s->inputbuf, http_referer, 8) == 0) {
00283       s->inputbuf[PSOCK_DATALEN(&s->sin) - 2] = 0;
00284       /*      httpd_log(&s->inputbuf[9]);*/
00285     }
00286   }
00287
00288   PSOCK_END(&s->sin);
00289 }
00290 /*---------------------------------------------------------------------------*/
00291 static void
00292 handle_connection(struct httpd_state *s)
00293 {
00294   handle_input(s);
00295   if(s->state == STATE_OUTPUT) {
00296     handle_output(s);
00297   }
00298 }
00299 /*---------------------------------------------------------------------------*/
00300 void
00301 httpd_appcall(void)
00302 {
00303   struct httpd_state *s = (struct httpd_state *)&(uip_conn->appstate);
00304
00305   if(uip_closed() || uip_aborted() || uip_timedout()) {
00306   } else if(uip_connected()) {
00307     PSOCK_INIT(&s->sin, s->inputbuf, sizeof(s->inputbuf) - 1);
00308     PSOCK_INIT(&s->sout, s->inputbuf, sizeof(s->inputbuf) - 1);
00309     PT_INIT(&s->outputpt);
00310     s->state = STATE_WAITING;
00311     /*    timer_set(&s->timer, CLOCK_SECOND * 100);*/
00312     s->timer = 0;
00313     handle_connection(s);
00314   } else if(s != NULL) {
00315     if(uip_poll()) {
00316       ++s->timer;
00317       if(s->timer >= 20) {
00318         uip_abort();
00319       }
00320     } else {
00321       s->timer = 0;
00322     }
00323     handle_connection(s);
00324   } else {
00325     uip_abort();
00326   }
00327 }
00328 /*---------------------------------------------------------------------------*/
00335 void
00336 httpd_init(void)
00337 {
00338   uip_listen(HTONS(80));
00339 }
00340 /*---------------------------------------------------------------------------*/
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/httpd.h
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2001-2005, Adam Dunkels.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. The name of the author may not be used to endorse or promote
00014  *    products derived from this software without specific prior
00015  *    written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00018  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00019  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00021  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00023  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00024  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00025  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00026  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00027  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack.
00030  *
00031  * $Id: httpd.h,v 1.2 2006/06/11 21:46:38 adam Exp $
00032  *
00033  */
00034
00035 #ifndef __HTTPD_H__
00036 #define __HTTPD_H__
00037
00038 #include "psock.h"
00039 #include "httpd-fs.h"
00040
00041 struct httpd_state {
00042   unsigned char timer;
00043   struct psock sin, sout;
00044   struct pt outputpt, scriptpt;
00045   char inputbuf[50];
00046   char filename[20];
00047   char state;
00048   struct httpd_fs_file file;
00049   int len;
00050   char *scriptptr;
00051   int scriptlen;
00052
00053   unsigned short count;
00054 };
00055
00056 void httpd_init(void);
00057 void httpd_appcall(void);
00058
00059 void httpd_log(char *msg);
00060 void httpd_log_file(u16_t *requester, char *file);
00061
00062 #endif /* __HTTPD_H__ */
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_int/i2c_interrupt_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_int/i2c_interrupt_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          i2c_interrupt_test.c                            2010-05-21
00003 */
00027 #include "lpc17xx_i2c.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "lpc17xx_pinsel.h"
00030 #include "debug_frmwrk.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINITIONS *************************/
00040 #define USEDI2CDEV      0
00041
00042 /* Definition of internal register of SC16IS750/760 */
00043 #define IODIR           0x0A
00044 #define IOSTATE         0x0B
00045 #define IOCON           0x0E
00046 #define SLVADDR         (0x90>>1)
00047 #define REGS_ADDR(n) (n<<3)
00048
00049
00050 #if (USEDI2CDEV == 0)
00051 #define I2CDEV LPC_I2C0
00052 #elif (USEDI2CDEV == 2)
00053 #define I2CDEV LPC_I2C2
00054 #else
00055 #error "I2C device not defined!"
00056 #endif
00057
00058 /************************** PRIVATE VARIABLES *************************/
00059 uint8_t menu1[] =
00060 "********************************************************************************\n\r"
00061 "Hello NXP Semiconductors \n\r"
00062 "I2C demo \n\r"
00063 "\t - MCU: LPC17xx \n\r"
00064 "\t - Core: ARM Cortex-M3 \n\r"
00065 "\t - Communicate via: UART0 - 115.2 kbps \n\r"
00066 " Communicate with I2C function on SC16IS750/760 Demo Board\n\r"
00067 " Use IO function on SC16IS740/750/760 chip to turn ON/OFF LEDs\n\r"
00068 "Press '1' to turn ON LEDs, '2' to turn OFF LEDs \n\r"
00069 "********************************************************************************\n\r";
00070 uint8_t menu2[] = "Demo terminated! \n\r";
00071
00072 /* Define array data with match data to set internal register value of SC16IS740/750/760 */
00073 uint8_t iocon_cfg[2] = {REGS_ADDR(IOCON), 0x00};
00074 uint8_t iodir_cfg[2] = {REGS_ADDR(IODIR), 0xFF};
00075 uint8_t iostate_cfg_0[2] = {REGS_ADDR(IOSTATE), 0x00};
00076 uint8_t iostate_cfg_1[2] = {REGS_ADDR(IOSTATE), 0xFF};
00077
00078 __IO FlagStatus complete;
00079
00080 /************************** PRIVATE FUNCTIONS *************************/
00081 #if (USEDI2CDEV == 0)
00082 void I2C0_IRQHandler(void);
00083 #elif (USEDI2CDEV == 2)
00084 void I2C2_IRQHandler(void);
00085 #endif
00086
00087 void print_menu(void);
00088 void Error_Loop(uint8_t ErrorCode);
00089
00090
00091 #if (USEDI2CDEV == 0)
00092 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00093 /*********************************************************************/
00098 void I2C0_IRQHandler(void){
00099         // just call std int handler
00100         I2C_MasterHandler(I2CDEV);
00101         if (I2C_MasterTransferComplete(I2CDEV)){
00102                 complete = SET;
00103         }
00104 }
00105 #elif (USEDI2CDEV == 2)
00106 /*********************************************************************/
00111 void I2C2_IRQHandler(void){
00112         // just call std int handler
00113         I2C_MasterHandler(I2CDEV);
00114         if (I2C_MasterTransferComplete(I2CDEV)){
00115                 complete = SET;
00116         }
00117 }
00118 #endif
00119
00120 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00121 /*********************************************************************/
00126 void print_menu(void)
00127 {
00128         _DBG_(menu1);
00129 }
00130
00131
00132 /*********************************************************************/
00138 void Error_Loop(uint8_t ErrorCode)
00139 {
00140         /*
00141          * Insert your code here...
00142          */
00143         while(1);
00144 }
00145
00146
00147 /*-------------------------MAIN FUNCTION------------------------------*/
00148 /*********************************************************************/
00153 int c_entry(void)
00154 {
00155         uint8_t tmpchar[2] = {0, 0};
00156         __IO FlagStatus exitflag;
00157         PINSEL_CFG_Type PinCfg;
00158         I2C_M_SETUP_Type transferCfg;
00159         uint8_t SC16IS_RegStat;
00160
00161 #if (USEDI2CDEV == 0)
00162     /* Disable I2C0 interrupt */
00163     NVIC_DisableIRQ(I2C0_IRQn);
00164     /* preemption = 1, sub-priority = 1 */
00165     NVIC_SetPriority(I2C0_IRQn, ((0x01<<3)|0x01));
00166 #elif (USEDI2CDEV == 2)
00167     /* Disable I2C2 interrupt */
00168     NVIC_DisableIRQ(I2C2_IRQn);
00169     /* preemption = 1, sub-priority = 1 */
00170     NVIC_SetPriority(I2C2_IRQn, ((0x01<<3)|0x01));
00171 #endif
00172
00173         /* Initialize debug via UART0
00174          * – 115200bps
00175          * – 8 data bit
00176          * – No parity
00177          * – 1 stop bit
00178          * – No flow control
00179          */
00180         debug_frmwrk_init();
00181
00182         // print welcome screen
00183         print_menu();
00184
00185         /*
00186          * Init I2C pin connect
00187          */
00188         PinCfg.OpenDrain = 0;
00189         PinCfg.Pinmode = 0;
00190 #if (USEDI2CDEV == 0)
00191         PinCfg.Funcnum = 1;
00192         PinCfg.Pinnum = 27;
00193         PinCfg.Portnum = 0;
00194         PINSEL_ConfigPin(&PinCfg);
00195         PinCfg.Pinnum = 28;
00196         PINSEL_ConfigPin(&PinCfg);
00197 #elif (USEDI2CDEV == 2)
00198         PinCfg.Funcnum = 2;
00199         PinCfg.Pinnum = 10;
00200         PinCfg.Portnum = 0;
00201         PINSEL_ConfigPin(&PinCfg);
00202         PinCfg.Pinnum = 11;
00203         PINSEL_ConfigPin(&PinCfg);
00204 #endif
00205
00206         /* I2C block ------------------------------------------------------------------- */
00207         // Initialize I2C peripheral
00208         I2C_Init(I2CDEV, 100000);
00209
00210         /* Enable I2C1 operation */
00211         I2C_Cmd(I2CDEV, ENABLE);
00212
00213         // test
00214         complete = RESET;
00215         transferCfg.sl_addr7bit = SLVADDR;
00216         transferCfg.tx_data = NULL;
00217         transferCfg.tx_length = 0;
00218         transferCfg.rx_data = &SC16IS_RegStat;
00219         transferCfg.rx_length = 1;
00220         transferCfg.retransmissions_max = 2;
00221         I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_INTERRUPT);
00222         while (complete == RESET);
00223
00224         /* Configure SC16IS750 ---------------------------------------------------------- */
00225         /* First, send some command to reset SC16IS740 chip via I2C bus interface */
00226         complete = RESET;
00227         transferCfg.sl_addr7bit = SLVADDR;
00228         transferCfg.tx_data = (uint8_t *)iocon_cfg;
00229         transferCfg.tx_length = sizeof(iocon_cfg);
00230         transferCfg.rx_data = NULL;
00231         transferCfg.rx_length = 0;
00232         transferCfg.retransmissions_max = 2;
00233         I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_INTERRUPT);
00234         while (complete == RESET);
00235
00236         complete = RESET;
00237         transferCfg.sl_addr7bit = SLVADDR;
00238         transferCfg.tx_data = (uint8_t *)iodir_cfg;
00239         transferCfg.tx_length = sizeof(iodir_cfg);
00240         transferCfg.rx_data = NULL;
00241         transferCfg.rx_length = 0;
00242         transferCfg.retransmissions_max = 2;
00243         I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_INTERRUPT);
00244         while (complete == RESET);
00245
00246         complete = RESET;
00247         transferCfg.sl_addr7bit = SLVADDR;
00248         transferCfg.tx_data = (uint8_t *)iostate_cfg_0;
00249         transferCfg.tx_length = sizeof(iostate_cfg_0);
00250         transferCfg.rx_data = NULL;
00251         transferCfg.rx_length = 0;
00252         transferCfg.retransmissions_max = 2;
00253         I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_INTERRUPT);
00254         while (complete == RESET);
00255
00256
00257         /* Validate value of SC16IS750 register ------------------------------------------ */
00258         /* This section will dump out value of register that set through I2C bus */
00259         complete = RESET;
00260         transferCfg.sl_addr7bit = SLVADDR;
00261         transferCfg.tx_data = NULL; //(uint8_t *)iocon_cfg;
00262         transferCfg.tx_length = 0;//1;
00263         transferCfg.rx_data = &SC16IS_RegStat;
00264         transferCfg.rx_length = 1;
00265         transferCfg.retransmissions_max = 2;
00266         I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_INTERRUPT);
00267         while (complete == RESET);
00268
00269         complete = RESET;
00270         transferCfg.sl_addr7bit = SLVADDR;
00271         transferCfg.tx_data = (uint8_t *)iodir_cfg;
00272         transferCfg.tx_length = 1;
00273         transferCfg.rx_data = &SC16IS_RegStat;
00274         transferCfg.rx_length = 1;
00275         transferCfg.retransmissions_max = 2;
00276         I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_INTERRUPT);
00277         while (complete == RESET);
00278
00279         complete = RESET;
00280         transferCfg.sl_addr7bit = SLVADDR;
00281         transferCfg.tx_data = (uint8_t *)iostate_cfg_0;
00282         transferCfg.tx_length = 1;
00283         transferCfg.rx_data = &SC16IS_RegStat;
00284         transferCfg.rx_length = 1;
00285         transferCfg.retransmissions_max = 2;
00286         I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_INTERRUPT);
00287         while (complete == RESET);
00288
00289
00290         // Reset exit flag
00291         exitflag = RESET;
00292
00293     /* Read some data from the buffer */
00294     while (exitflag == RESET){
00295
00296         while((tmpchar[0] = _DG) == 0);
00297
00298         if (tmpchar[0] == 27){
00299                         /* ESC key, set exit flag */
00300                         _DBG_(menu2);
00301                         exitflag = SET;
00302                 }
00303                 else if (tmpchar[0] == 'r'){
00304                         print_menu();
00305                 }
00306                 else{
00307                         if (tmpchar[0] == '1'){
00308                                 // LEDs are ON now...
00309                                 transferCfg.sl_addr7bit = SLVADDR;
00310                                 transferCfg.tx_data = (uint8_t *)iostate_cfg_0;
00311                                 transferCfg.tx_length = sizeof(iostate_cfg_0);
00312                                 transferCfg.rx_data = NULL;
00313                                 transferCfg.rx_length = 0;
00314                                 transferCfg.retransmissions_max = 2;
00315                                 if (I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_POLLING) \
00316                                                 == ERROR){
00317                                         Error_Loop(transferCfg.status);
00318                                 }
00319                         }
00320                         else if (tmpchar[0] == '2')
00321                         {
00322                                 // LEDs are OFF now...
00323                                 transferCfg.sl_addr7bit = SLVADDR;
00324                                 transferCfg.tx_data = (uint8_t *)iostate_cfg_1;
00325                                 transferCfg.tx_length = sizeof(iostate_cfg_1);
00326                                 transferCfg.rx_data = NULL;
00327                                 transferCfg.rx_length = 0;
00328                                 transferCfg.retransmissions_max = 2;
00329                                 if (I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_POLLING) \
00330                                                 == ERROR){
00331                                         Error_Loop(transferCfg.status);
00332                                 }
00333                         }
00334                         /* Then Echo it back */
00335                         _DBG_(tmpchar);
00336                 }
00337     }
00338
00339     // wait for current transmission complete - THR must be empty
00340     while (UART_CheckBusy(LPC_UART0) == SET);
00341
00342     // DeInitialize UART0 peripheral
00343     UART_DeInit(LPC_UART0);
00344     I2C_DeInit(I2CDEV);
00345
00346     /* Loop forever */
00347     while(1);
00348 }
00349
00350 /* With ARM and GHS toolsets, the entry point is main() - this will
00351    allow the linker to generate wrapper code to setup stacks, allocate
00352    heap area, and initialize and copy code and data segments. For GNU
00353    toolsets, the entry point is through __start() in the crt0_gnu.asm
00354    file, and that startup code will setup stacks and data */
00355 int main(void)
00356 {
00357     return c_entry();
00358 }
00359
00360
00361 #ifdef  DEBUG
00362 /*******************************************************************************
00363 * @brief                Reports the name of the source file and the source line number
00364 *                               where the CHECK_PARAM error has occurred.
00365 * @param[in]    file Pointer to the source file name
00366 * @param[in]    line assert_param error line source number
00367 * @return               None
00368 *******************************************************************************/
00369 void check_failed(uint8_t *file, uint32_t line)
00370 {
00371         /* User can add his own implementation to report the file name and line number,
00372          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00373
00374         /* Infinite loop */
00375         while(1);
00376 }
00377 #endif
00378
00379 /*
00380  * @}
00381  */
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Master_Slave_Interrupt/i2c_master_slave_int_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Master_Slave_Interrupt/i2c_master_slave_int_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          i2c_master_slave_int_test.c                             2010-05-21
00003 */
00026 #include "lpc17xx_i2c.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS *************************/
00039 #define USEDI2CDEV_M            2
00040
00042 #define USEDI2CDEV_S            0
00043
00044 #define I2CDEV_S_OWN_ADDR       (0x90>>1)
00045
00047 #define BUFFER_SIZE                     0x10
00048
00049
00050 #if (USEDI2CDEV_M == USEDI2CDEV_S)
00051 #error "Master and Slave I2C device are duplicated!"
00052 #endif
00053
00054 #if (USEDI2CDEV_M == 0)
00055 #define I2CDEV_M LPC_I2C0
00056 #elif (USEDI2CDEV_M == 2)
00057 #define I2CDEV_M LPC_I2C2
00058 #else
00059 #error "Master I2C device not defined!"
00060 #endif
00061
00062
00063 #if (USEDI2CDEV_S == 0)
00064 #define I2CDEV_S LPC_I2C0
00065 #elif (USEDI2CDEV_S == 2)
00066 #define I2CDEV_S LPC_I2C2
00067 #else
00068 #error "Slave I2C device not defined!"
00069 #endif
00070
00071 /************************** PRIVATE VARIABLES *************************/
00072 uint8_t menu1[] =
00073 "********************************************************************************\n\r"
00074 "Hello NXP Semiconductors \n\r"
00075 "I2C demo \n\r"
00076 "\t - MCU: LPC17xx \n\r"
00077 "\t - Core: ARM Cortex-M3 \n\r"
00078 "\t - This example uses two I2C peripheral, one set as master and \n\r"
00079 "\t the other set as slave \n\r"
00080 "\t First, the master send 16 bytes of data to slave \n\r"
00081 "\t Then, the master receive 16 bytes of data from slave \n\r"
00082 "\t Both of them used in interrupt mode \n\r"
00083 "********************************************************************************\n\r";
00084
00086 __IO FlagStatus complete_M;
00087 uint8_t Master_Buf[BUFFER_SIZE];
00088
00089
00091 __IO FlagStatus complete_S;
00092 uint8_t Slave_Buf[BUFFER_SIZE];
00093
00094
00095 uint8_t master_test[2];
00096 uint8_t slave_test[2];
00097
00098 /************************** PRIVATE FUNCTIONS *************************/
00099 /* Interrupt service routines */
00100 #if ((USEDI2CDEV_M == 0) || (USEDI2CDEV_S == 0))
00101 void I2C0_IRQHandler(void);
00102 #endif
00103 #if ((USEDI2CDEV_M == 2) || (USEDI2CDEV_S == 2))
00104 void I2C2_IRQHandler(void);
00105 #endif
00106
00107 void print_menu(void);
00108 void Error_Loop_M(uint8_t ErrorCode);
00109 void Error_Loop_S(uint8_t ErrorCode);
00110
00111
00112 #if ((USEDI2CDEV_M == 0) || (USEDI2CDEV_S == 0))
00113 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00114 /*********************************************************************/
00119 void I2C0_IRQHandler(void)
00120 {
00121 #if (USEDI2CDEV_M == 0)
00122         I2C_MasterHandler(I2CDEV_M);
00123         if (I2C_MasterTransferComplete(I2CDEV_M)){
00124                 complete_M = SET;
00125         }
00126 #endif
00127
00128 #if (USEDI2CDEV_S == 0)
00129         I2C_SlaveHandler(I2CDEV_S);
00130         if (I2C_SlaveTransferComplete(I2CDEV_S)){
00131                 complete_S = SET;
00132         }
00133 #endif
00134 }
00135 #endif /* ((USEDI2CDEV_M == 0) || (USEDI2CDEV_S == 0)) */
00136
00137
00138 #if ((USEDI2CDEV_M == 2) || (USEDI2CDEV_S == 2))
00139
00140 /*********************************************************************/
00145 void I2C2_IRQHandler(void)
00146 {
00147 #if (USEDI2CDEV_M == 2)
00148         I2C_MasterHandler(I2CDEV_M);
00149         if (I2C_MasterTransferComplete(I2CDEV_M)){
00150                 complete_M = SET;
00151         }
00152 #endif
00153 #if (USEDI2CDEV_S == 2)
00154         I2C_SlaveHandler(I2CDEV_S);
00155         if (I2C_SlaveTransferComplete(I2CDEV_S)){
00156                 complete_S = SET;
00157         }
00158 #endif
00159 }
00160 #endif /* ((USEDI2CDEV_M == 2) || (USEDI2CDEV_S == 2)) */
00161
00162 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00163 /*********************************************************************/
00168 void print_menu(void)
00169 {
00170         _DBG_(menu1);
00171 }
00172
00173 /*********************************************************************/
00183 void Buffer_Init(uint8_t type)
00184 {
00185         uint8_t i;
00186
00187         if (type)
00188         {
00189                 for (i = 0; i < BUFFER_SIZE; i++) {
00190                         Master_Buf[i] = 0;
00191                         Slave_Buf[i] = i;
00192                 }
00193         }
00194         else
00195         {
00196                 for (i = 0; i < BUFFER_SIZE; i++) {
00197                         Master_Buf[i] = i;
00198                         Slave_Buf[i] = 0;
00199                 }
00200         }
00201 }
00202
00203 /*********************************************************************/
00209 void Error_Loop_M(uint8_t ErrorCode)
00210 {
00211         /*
00212          * Insert your code here...
00213          */
00214         while(1);
00215 }
00216
00217 /*********************************************************************/
00223 void Error_Loop_S(uint8_t ErrorCode)
00224 {
00225         /*
00226          * Insert your code here...
00227          */
00228         while(1);
00229 }
00230
00231 /*-------------------------MAIN FUNCTION------------------------------*/
00232 /*********************************************************************/
00237 int c_entry(void)
00238 {
00239         PINSEL_CFG_Type PinCfg;
00240         I2C_OWNSLAVEADDR_CFG_Type OwnSlavAdr;
00241         I2C_M_SETUP_Type transferMCfg;
00242         I2C_S_SETUP_Type transferSCfg;
00243         uint32_t tempp;
00244         uint8_t *sp, *dp;
00245
00246         /* Initialize debug via UART0
00247          * – 115200bps
00248          * – 8 data bit
00249          * – No parity
00250          * – 1 stop bit
00251          * – No flow control
00252          */
00253         debug_frmwrk_init();
00254
00255         //print menu screen
00256         print_menu();
00257
00258
00259         /* I2C block ------------------------------------------------------------------- */
00260
00261         /*
00262          * Init I2C pin connect
00263          */
00264         PinCfg.OpenDrain = 0;
00265         PinCfg.Pinmode = 0;
00266 #if ((USEDI2CDEV_M == 0) || (USEDI2CDEV_S == 0))
00267         PinCfg.Funcnum = 1;
00268         PinCfg.Pinnum = 27;
00269         PinCfg.Portnum = 0;
00270         PINSEL_ConfigPin(&PinCfg);
00271         PinCfg.Pinnum = 28;
00272         PINSEL_ConfigPin(&PinCfg);
00273 #endif
00274 #if ((USEDI2CDEV_M == 2) || (USEDI2CDEV_S == 2))
00275         PinCfg.Funcnum = 2;
00276         PinCfg.Pinnum = 10;
00277         PinCfg.Portnum = 0;
00278         PINSEL_ConfigPin(&PinCfg);
00279         PinCfg.Pinnum = 11;
00280         PINSEL_ConfigPin(&PinCfg);
00281 #endif
00282
00283         // Initialize Master I2C peripheral
00284         I2C_Init(I2CDEV_M, 100000);
00285         // Initialize Slave I2C peripheral
00286         I2C_Init(I2CDEV_S, 100000);
00287
00288         /* Set  Own slave address for I2C device */
00289         OwnSlavAdr.GeneralCallState = ENABLE;
00290         OwnSlavAdr.SlaveAddrChannel= 0;
00291         OwnSlavAdr.SlaveAddrMaskValue = 0xFF;
00292         OwnSlavAdr.SlaveAddr_7bit = I2CDEV_S_OWN_ADDR;
00293         I2C_SetOwnSlaveAddr(I2CDEV_S, &OwnSlavAdr);
00294
00295         /*
00296          * Note: The master should be set higher priority than
00297          * the slave that let interrupt in master can appear
00298          * in slave's timeout condition.
00299          * A higher interrupt priority has lower number level!!!
00300          */
00301
00302         /* Configure interrupt for I2C in NVIC of ARM core */
00303 #if ((USEDI2CDEV_M == 0) || (USEDI2CDEV_S == 0))
00304     /* Disable I2C0 interrupt */
00305     NVIC_DisableIRQ(I2C0_IRQn);
00306 #if (USEDI2CDEV_M == 0)
00307     /* preemption = 1, sub-priority = 0 */
00308     NVIC_SetPriority(I2C0_IRQn, ((0x00<<3)|0x01));
00309 #else
00310     /* preemption = 1, sub-priority = 2 */
00311     NVIC_SetPriority(I2C0_IRQn, ((0x02<<3)|0x01));
00312 #endif
00313 #endif /* ((USEDI2CDEV_M == 0) || (USEDI2CDEV_S == 0)) */
00314
00315 #if ((USEDI2CDEV_M == 2) || (USEDI2CDEV_S == 2))
00316     /* Disable I2C2 interrupt */
00317     NVIC_DisableIRQ(I2C2_IRQn);
00318 #if (USEDI2CDEV_M == 2)
00319     /* preemption = 1, sub-priority = 0 */
00320     NVIC_SetPriority(I2C2_IRQn, ((0x00<<3)|0x01));
00321 #else
00322     /* preemption = 1, sub-priority = 2 */
00323     NVIC_SetPriority(I2C2_IRQn, ((0x02<<3)|0x01));
00324 #endif
00325 #endif
00326
00327
00328         /* Enable Master I2C operation */
00329         I2C_Cmd(I2CDEV_M, ENABLE);
00330         /* Enable Slave I2C operation */
00331         I2C_Cmd(I2CDEV_S, ENABLE);
00332
00333
00334 #if 1
00335         /* MASTER SEND DATA TO SLAVE -------------------------------------------------------- */
00336         /* Force complete flag for the first time of running */
00337         complete_S =  RESET;
00338         complete_M =  RESET;
00339
00340         _DBG_("Master transmit data to slave...");
00341
00342         /* Initialize buffer */
00343         Buffer_Init(0);
00344
00345         /* Start I2C slave device first */
00346         transferSCfg.tx_data = NULL;
00347         transferSCfg.tx_length = 0;
00348         transferSCfg.rx_data = Slave_Buf;
00349         transferSCfg.rx_length = sizeof(Slave_Buf);
00350         I2C_SlaveTransferData(I2CDEV_S, &transferSCfg, I2C_TRANSFER_INTERRUPT);
00351
00352         /* Then start I2C master device */
00353         transferMCfg.sl_addr7bit = I2CDEV_S_OWN_ADDR;
00354         transferMCfg.tx_data = Master_Buf;
00355         transferMCfg.tx_length = sizeof(Master_Buf);
00356         transferMCfg.rx_data = NULL;
00357         transferMCfg.rx_length = 0;
00358         transferMCfg.retransmissions_max = 3;
00359         I2C_MasterTransferData(I2CDEV_M, &transferMCfg, I2C_TRANSFER_INTERRUPT);
00360
00361         /* Wait until both of them complete */
00362         while ((complete_M == RESET) || (complete_S == RESET));
00363         // verify data
00364         sp = Master_Buf;
00365         dp = Slave_Buf;
00366         for (tempp = sizeof(Master_Buf); tempp; tempp--){
00367                 if(*sp++ != *dp++){
00368                         _DBG_("Verify data error!");
00369                 }
00370         }
00371         // Success!
00372         if (tempp == 0){
00373                 _DBG_("Verify data successfully!");
00374         }
00375
00376
00377         /* MASTER RECEIVE DATA FROM SLAVE -------------------------------------------------------- */
00378         /* Force complete flag for the first time of running */
00379         complete_S =  RESET;
00380         complete_M =  RESET;
00381
00382         _DBG_("Master read data from slave...");
00383
00384         /* Initialize buffer */
00385         Buffer_Init(1);
00386
00387         /* Start I2C slave device first */
00388         transferSCfg.tx_data = Slave_Buf;
00389         transferSCfg.tx_length = sizeof(Slave_Buf);
00390         transferSCfg.rx_data = NULL;
00391         transferSCfg.rx_length = 0;
00392         I2C_SlaveTransferData(I2CDEV_S, &transferSCfg, I2C_TRANSFER_INTERRUPT);
00393
00394         /* Then start I2C master device */
00395         transferMCfg.sl_addr7bit = I2CDEV_S_OWN_ADDR;
00396         transferMCfg.tx_data = NULL;
00397         transferMCfg.tx_length = 0;
00398         transferMCfg.rx_data = Master_Buf;
00399         transferMCfg.rx_length = sizeof(Master_Buf);
00400         transferMCfg.retransmissions_max = 3;
00401         I2C_MasterTransferData(I2CDEV_M, &transferMCfg, I2C_TRANSFER_INTERRUPT);
00402
00403         /* Wait until both of them complete */
00404         while ((complete_M == RESET) || (complete_S == RESET));
00405         // verify data
00406         sp = Master_Buf;
00407         dp = Slave_Buf;
00408         for (tempp = sizeof(Master_Buf); tempp; tempp--){
00409                 if(*sp++ != *dp++){
00410                         _DBG_("Verify data error!");
00411                 }
00412         }
00413         // Success!
00414         if (tempp == 0){
00415                 _DBG_("Verify data successfully!");
00416         }
00417 #endif
00418
00419
00420 #if 1
00421         // TEST-----------------------------------------------------------
00422         // Master transmit two bytes, then repeat start and reading from slave
00423         // a number of byte
00424         /* Force complete flag for the first time of running */
00425         complete_S =  RESET;
00426         complete_M =  RESET;
00427
00428         _DBG_("Master transmit data to slave first, then repeat start and read data from slave...");
00429         /* Initialize buffer */
00430         Buffer_Init(1);
00431         master_test[0] = 0xAA;
00432         master_test[1] = 0x55;
00433         slave_test[0] = 0x00;
00434         slave_test[1] = 0x00;
00435
00436         /* Start I2C slave device first */
00437         transferSCfg.tx_data = Slave_Buf;
00438         transferSCfg.tx_length = sizeof(Slave_Buf);
00439         transferSCfg.rx_data = slave_test;
00440         transferSCfg.rx_length = sizeof(slave_test);
00441         I2C_SlaveTransferData(I2CDEV_S, &transferSCfg, I2C_TRANSFER_INTERRUPT);
00442
00443         /* Then start I2C master device */
00444         transferMCfg.sl_addr7bit = I2CDEV_S_OWN_ADDR;
00445         transferMCfg.tx_data = master_test;
00446         transferMCfg.tx_length = sizeof(master_test);
00447         transferMCfg.rx_data = Master_Buf;
00448         transferMCfg.rx_length = sizeof(Master_Buf);
00449         transferMCfg.retransmissions_max = 3;
00450         I2C_MasterTransferData(I2CDEV_M, &transferMCfg, I2C_TRANSFER_INTERRUPT);
00451
00452         /* Wait until both of them complete */
00453         while ((complete_M == RESET) || (complete_S == RESET));
00454         // verify data
00455         sp = Master_Buf;
00456         dp = Slave_Buf;
00457         for (tempp = sizeof(Master_Buf); tempp; tempp--){
00458                 if(*sp++ != *dp++){
00459                         _DBG_("Verify data error!");
00460                 }
00461         }
00462         // Success!
00463         if (tempp == 0){
00464                 _DBG_("Verify data successfully!");
00465         }
00466         sp = master_test;
00467         dp = slave_test;
00468         for (tempp = sizeof(master_test); tempp; tempp--){
00469                 if(*sp++ != *dp++){
00470                         _DBG_("Verify data error!");
00471                 }
00472         }
00473         // Success!
00474         if (tempp == 0){
00475                 _DBG_("Verify data successfully!");
00476         }
00477 #endif
00478
00479     /* Loop forever */
00480     while(1);
00481 }
00482
00483 /* With ARM and GHS toolsets, the entry point is main() - this will
00484    allow the linker to generate wrapper code to setup stacks, allocate
00485    heap area, and initialize and copy code and data segments. For GNU
00486    toolsets, the entry point is through __start() in the crt0_gnu.asm
00487    file, and that startup code will setup stacks and data */
00488 int main(void)
00489 {
00490     return c_entry();
00491 }
00492
00493
00494 #ifdef  DEBUG
00495 /*******************************************************************************
00496 * @brief                Reports the name of the source file and the source line number
00497 *                               where the CHECK_PARAM error has occurred.
00498 * @param[in]    file Pointer to the source file name
00499 * @param[in]    line assert_param error line source number
00500 * @return               None
00501 *******************************************************************************/
00502 void check_failed(uint8_t *file, uint32_t line)
00503 {
00504         /* User can add his own implementation to report the file name and line number,
00505          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00506
00507         /* Infinite loop */
00508         while(1);
00509 }
00510 #endif
00511
00512 /*
00513  * @}
00514  */
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Monitor/i2c_monitor.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/Monitor/i2c_monitor.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          i2c_monitor.c                           2010-07-16
00003 */
00026 #include "lpc17xx_i2c.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS *************************/
00038 #define I2CDEV LPC_I2C0
00039
00041 #define BUFFER_SIZE                     0x80
00042 /************************** PRIVATE VARIABLES *************************/
00043 uint8_t menu1[] =
00044 "********************************************************************************\n\r"
00045 "Hello NXP Semiconductors \n\r"
00046 "I2C monitor I2C bus demo \n\r"
00047 "\t - MCU: LPC17xx \n\r"
00048 "\t - Core: ARM Cortex-M3 \n\r"
00049 "\t - This example describes how to uses I2C peripheral on LPC1768 \n\r"
00050 "\t in monitor mode. \n\r"
00051 "\t I2C0 monitors I2C data transfered on I2C bus. \n\r"
00052 "\t UART0 (115200bps, 8 data bit, no parity, 1 stop bit, no flow control) \n\r"
00053 "\t is used to display captured data. \n\r"
00054 "********************************************************************************\n\r";
00055 uint8_t buffer[BUFFER_SIZE];
00056 BOOL_8 done=FALSE;
00057 uint32_t count=0;
00058
00059 /************************** PRIVATE FUNCTIONS *************************/
00060 void I2C0_IRQHandler(void);
00061 void print_menu(void);
00062 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00063 /*********************************************************************/
00068 void I2C0_IRQHandler(void)
00069 {
00070         done = I2C_MonitorHandler(LPC_I2C0,buffer,count);
00071         if(done)
00072         {
00073                 I2C_MonitorModeConfig(I2CDEV,(uint32_t)I2C_MONITOR_CFG_MATCHALL, DISABLE);
00074                 I2C_MonitorModeCmd(I2CDEV, DISABLE);
00075         }
00076 }
00077
00078 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00079 /*********************************************************************/
00084 void print_menu(void)
00085 {
00086         _DBG(menu1);
00087 }
00088
00089 /*-------------------------MAIN FUNCTION------------------------------*/
00090 /*********************************************************************/
00095 int c_entry(void)
00096 {
00097         PINSEL_CFG_Type PinCfg;
00098         uint8_t idx,i;
00099         /* Initialize debug via UART0
00100          * – 115200bps
00101          * – 8 data bit
00102          * – No parity
00103          * – 1 stop bit
00104          * – No flow control
00105          */
00106         debug_frmwrk_init();
00107
00108         //print menu screen
00109         print_menu();
00110
00111         /* I2C block ------------------------------------------------------------------- */
00112
00113         /*
00114          * Init I2C pin connect
00115          */
00116         PinCfg.OpenDrain = 0;
00117         PinCfg.Pinmode = 0;
00118         PinCfg.Funcnum = 1;
00119         PinCfg.Pinnum = 27;
00120         PinCfg.Portnum = 0;
00121         PINSEL_ConfigPin(&PinCfg);//SDA0
00122         PinCfg.Pinnum = 28;
00123         PINSEL_ConfigPin(&PinCfg);//SCL0
00124
00125         // Initialize I2C peripheral
00126         I2C_Init(I2CDEV, 100000);
00127
00128         /* Configure interrupt for I2C in NVIC of ARM core */
00129     /* Disable I2C0 interrupt */
00130     NVIC_DisableIRQ(I2C0_IRQn);
00131     /* preemption = 1, sub-priority = 0 */
00132     NVIC_SetPriority(I2C0_IRQn, ((0x01<<3)|0x01));
00133     //enable I2C interrupt
00134     I2C_IntCmd(LPC_I2C0, TRUE);
00135
00136         /* Enable I2C operation */
00137         I2C_Cmd(I2CDEV, ENABLE);
00138
00139         while(1)
00140         {
00141                 idx=0;count=0;
00142                 while(idx<2)
00143                 {
00144                         if(idx==0)
00145                         {
00146                                 _DBG_("\n\rEnter monitor buffer size: ");
00147                         }
00148                         idx++;
00149                         switch(_DG)
00150                         {
00151                                 case '0': count=(count<<4)|0x00;break;
00152                                 case '1': count=(count<<4)|0x01;break;
00153                                 case '2': count=(count<<4)|0x02;break;
00154                                 case '3': count=(count<<4)|0x03;break;
00155                                 case '4': count=(count<<4)|0x04;break;
00156                                 case '5': count=(count<<4)|0x05;break;
00157                                 case '6': count=(count<<4)|0x06;break;
00158                                 case '7': count=(count<<4)|0x07;break;
00159                                 case '8': count=(count<<4)|0x08;break;
00160                                 case '9': count=(count<<4)|0x09;break;
00161                                 case 'a': count=(count<<4)|0x0A;break;
00162                                 case 'A': count=(count<<4)|0x0A;break;
00163                                 case 'b': count=(count<<4)|0x0B;break;
00164                                 case 'B': count=(count<<4)|0x0B;break;
00165                                 case 'c': count=(count<<4)|0x0C;break;
00166                                 case 'C': count=(count<<4)|0x0C;break;
00167                                 case 'd': count=(count<<4)|0x0D;break;
00168                                 case 'D': count=(count<<4)|0x0D;break;
00169                                 case 'e': count=(count<<4)|0x0E;break;
00170                                 case 'E': count=(count<<4)|0x0E;break;
00171                                 case 'f': count=(count<<4)|0x0F;break;
00172                                 case 'F': count=(count<<4)|0x0F;break;
00173                                 default: idx=0;count=0;break;
00174                         }
00175                         if(idx==2)
00176                         {
00177                                 if(count>BUFFER_SIZE)
00178                                 {
00179                                         _DBG_("invalid! The size is bigger than ");_DBH(BUFFER_SIZE);
00180                                         idx=0;count=0;
00181                                 }
00182                                 else
00183                                         _DBH(count);
00184                         }
00185                 }
00186                 //Configure I2C in monitor mode
00187                 I2C_MonitorModeConfig(I2CDEV,(uint32_t)I2C_MONITOR_CFG_MATCHALL, ENABLE);
00188                 I2C_MonitorModeCmd(I2CDEV, ENABLE);
00189
00190                 _DBG_("\n\rStart monitoring I2C bus...");
00191
00192                 while(done==FALSE); done=FALSE;
00193                 _DBG_("done!");
00194                 for(i=0;i<count;i++)
00195                 {
00196                         if((i%16)==0) _DBG_("");
00197                         _DBH(buffer[i]);_DBC(0x20);
00198                         buffer[i]=0;
00199                 }
00200
00201         }
00202 }
00203
00204 /* With ARM and GHS toolsets, the entry point is main() - this will
00205    allow the linker to generate wrapper code to setup stacks, allocate
00206    heap area, and initialize and copy code and data segments. For GNU
00207    toolsets, the entry point is through __start() in the crt0_gnu.asm
00208    file, and that startup code will setup stacks and data */
00209 int main(void)
00210 {
00211     return c_entry();
00212 }
00213
00214
00215 #ifdef  DEBUG
00216 /*******************************************************************************
00217 * @brief                Reports the name of the source file and the source line number
00218 *                               where the CHECK_PARAM error has occurred.
00219 * @param[in]    file Pointer to the source file name
00220 * @param[in]    line assert_param error line source number
00221 * @return               None
00222 *******************************************************************************/
00223 void check_failed(uint8_t *file, uint32_t line)
00224 {
00225         /* User can add his own implementation to report the file name and line number,
00226          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00227
00228         /* Infinite loop */
00229         while(1);
00230 }
00231 #endif
00232
00233 /*
00234  * @}
00235  */
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_polling/i2c_polling_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/sc16is750_polling/i2c_polling_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          i2c_polling_test.c                              2010-05-21
00003 */
00027 #include "lpc17xx_i2c.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "lpc17xx_pinsel.h"
00030 #include "debug_frmwrk.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINITIONS *************************/
00040 #define USEDI2CDEV      0
00041
00042 /* Definition of internal register of SC16IS750/760 */
00043 #define IODIR           0x0A
00044 #define IOSTATE         0x0B
00045 #define IOCON           0x0E
00046 #define SLVADDR         (0x90>>1)
00047 #define REGS_ADDR(n) (n<<3)
00048
00049 #if (USEDI2CDEV == 0)
00050 #define I2CDEV LPC_I2C0
00051 #elif (USEDI2CDEV == 2)
00052 #define I2CDEV LPC_I2C2
00053 #else
00054 #error "I2C device not defined!"
00055 #endif
00056
00057 /************************** PRIVATE VARIABLES *************************/
00058 uint8_t menu1[] =
00059 "********************************************************************************\n\r"
00060 "Hello NXP Semiconductors \n\r"
00061 "I2C demo \n\r"
00062 "\t - MCU: LPC17xx \n\r"
00063 "\t - Core: ARM Cortex-M3 \n\r"
00064 "\t - Communicate via: UART0 - 115.2 kbps \n\r"
00065 " An example of I2C using polling mode to test the I2C driver \n\r"
00066 " Using I2C at mode I2C master/8bit on LPC1766 to communicate with \n\r"
00067 " SC16IS750/760 Demo Board \n\r"
00068 " Press '1' to turn ON, '2' to turn OFF LEDs \n\r"
00069 "********************************************************************************\n\r";
00070 uint8_t menu2[] = "Demo terminated! \n\r";
00071
00072 /* Define array data with match data to set internal register value of SC16IS740/750/760 */
00073 uint8_t iocon_cfg[2] = {REGS_ADDR(IOCON), 0x00};
00074 uint8_t iodir_cfg[2] = {REGS_ADDR(IODIR), 0xFF};
00075 uint8_t iostate_cfg_0[2] = {REGS_ADDR(IOSTATE), 0x00};
00076 uint8_t iostate_cfg_1[2] = {REGS_ADDR(IOSTATE), 0xFF};
00077
00078
00079 /************************** PRIVATE FUNCTIONS *************************/
00080 void print_menu(void);
00081 void Error_Loop(uint32_t ErrorCode);
00082
00083 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00084 /*********************************************************************/
00089 void print_menu(void)
00090 {
00091         _DBG_(menu1);
00092 }
00093
00094
00095 /*********************************************************************/
00101 void Error_Loop(uint32_t ErrorCode)
00102 {
00103         /*
00104          * Insert your code here...
00105          */
00106         while(1);
00107 }
00108
00109
00110 /*-------------------------MAIN FUNCTION------------------------------*/
00111 /*********************************************************************/
00116 int c_entry(void)
00117 {
00118         uint8_t tmpchar[2] = {0, 0};
00119         __IO FlagStatus exitflag;
00120         PINSEL_CFG_Type PinCfg;
00121         I2C_M_SETUP_Type transferCfg;
00122         uint8_t SC16IS_RegStat;
00123
00124         /* Initialize debug via UART0
00125          * – 115200bps
00126          * – 8 data bit
00127          * – No parity
00128          * – 1 stop bit
00129          * – No flow control
00130          */
00131         debug_frmwrk_init();
00132
00133         // print welcome screen
00134         print_menu();
00135
00136         /*
00137          * Init I2C pin connect
00138          */
00139         PinCfg.OpenDrain = 0;
00140         PinCfg.Pinmode = 0;
00141 #if (USEDI2CDEV == 0)
00142         PinCfg.Funcnum = 1;
00143         PinCfg.Pinnum = 27;
00144         PinCfg.Portnum = 0;
00145         PINSEL_ConfigPin(&PinCfg);
00146         PinCfg.Pinnum = 28;
00147         PINSEL_ConfigPin(&PinCfg);
00148 #elif (USEDI2CDEV == 2)
00149         PinCfg.Funcnum = 2;
00150         PinCfg.Pinnum = 10;
00151         PinCfg.Portnum = 0;
00152         PINSEL_ConfigPin(&PinCfg);
00153         PinCfg.Pinnum = 11;
00154         PINSEL_ConfigPin(&PinCfg);
00155 #endif
00156
00157         /* I2C block ------------------------------------------------------------------- */
00158         // Initialize I2C peripheral
00159         I2C_Init(I2CDEV, 100000);
00160
00161         /* Enable I2C1 operation */
00162         I2C_Cmd(I2CDEV, ENABLE);
00163
00164         /* Configure SC16IS750 ---------------------------------------------------------- */
00165         /* First, send some command to reset SC16IS740 chip via I2C bus interface */
00166         transferCfg.sl_addr7bit = SLVADDR;
00167         transferCfg.tx_data = (uint8_t *)iocon_cfg;
00168         transferCfg.tx_length = sizeof(iocon_cfg);
00169         transferCfg.rx_data = NULL;
00170         transferCfg.rx_length = 0;
00171         transferCfg.retransmissions_max = 2;
00172         if (I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_POLLING) \
00173                         == ERROR){
00174                 Error_Loop(transferCfg.status);
00175         }
00176
00177         transferCfg.sl_addr7bit = SLVADDR;
00178         transferCfg.tx_data = (uint8_t *)iodir_cfg;
00179         transferCfg.tx_length = sizeof(iodir_cfg);
00180         transferCfg.rx_data = NULL;
00181         transferCfg.rx_length = 0;
00182         transferCfg.retransmissions_max = 2;
00183         if (I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_POLLING) \
00184                         == ERROR){
00185                 Error_Loop(transferCfg.status);
00186         }
00187
00188         transferCfg.sl_addr7bit = SLVADDR;
00189         transferCfg.tx_data = (uint8_t *)iostate_cfg_0;
00190         transferCfg.tx_length = sizeof(iostate_cfg_0);
00191         transferCfg.rx_data = NULL;
00192         transferCfg.rx_length = 0;
00193         transferCfg.retransmissions_max = 2;
00194         if (I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_POLLING) \
00195                         == ERROR){
00196                 Error_Loop(transferCfg.status);
00197         }
00198
00199
00200         /* Validate value of SC16IS750 register ------------------------------------------ */
00201         /* This section will dump out value of register that set through I2C bus */
00202
00203         transferCfg.sl_addr7bit = SLVADDR;
00204         transferCfg.tx_data = (uint8_t *)iocon_cfg;
00205         transferCfg.tx_length = 1;
00206         transferCfg.rx_data = (uint8_t *)&SC16IS_RegStat;
00207         transferCfg.rx_length = 1;
00208         transferCfg.retransmissions_max = 2;
00209         if (I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_POLLING) \
00210                         == ERROR){
00211                 Error_Loop(transferCfg.status);
00212         }
00213
00214         transferCfg.sl_addr7bit = SLVADDR;
00215         transferCfg.tx_data = (uint8_t *)iodir_cfg;
00216         transferCfg.tx_length = 1;
00217         transferCfg.rx_data = (uint8_t *)&SC16IS_RegStat;
00218         transferCfg.rx_length = 1;
00219         transferCfg.retransmissions_max = 2;
00220         if (I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_POLLING) \
00221                         == ERROR){
00222                 Error_Loop(transferCfg.status);
00223         }
00224
00225         transferCfg.sl_addr7bit = SLVADDR;
00226         transferCfg.tx_data = (uint8_t *)iostate_cfg_0;
00227         transferCfg.tx_length = 1;
00228         transferCfg.rx_data = (uint8_t *)&SC16IS_RegStat;
00229         transferCfg.rx_length = 1;
00230         transferCfg.retransmissions_max = 2;
00231         if (I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_POLLING) \
00232                         == ERROR){
00233                 Error_Loop(transferCfg.status);
00234         }
00235
00236         // Reset exit flag
00237         exitflag = RESET;
00238
00239     /* Read some data from the buffer */
00240     while (exitflag == RESET){
00241
00242         while((tmpchar[0] = _DG) == 0);
00243
00244         if (tmpchar[0] == 27){
00245                         /* ESC key, set exit flag */
00246                         _DBG_(menu2);
00247                         exitflag = SET;
00248                 }
00249                 else if (tmpchar[0] == 'r'){
00250                         print_menu();
00251                 }
00252                 else{
00253                         if (tmpchar[0] == '1'){
00254                                 // LEDs are ON now...
00255                                 transferCfg.sl_addr7bit = SLVADDR;
00256                                 transferCfg.tx_data = (uint8_t *)iostate_cfg_0;
00257                                 transferCfg.tx_length = sizeof(iostate_cfg_0);
00258                                 transferCfg.rx_data = NULL;
00259                                 transferCfg.rx_length = 0;
00260                                 transferCfg.retransmissions_max = 2;
00261                                 if (I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_POLLING) \
00262                                                 == ERROR){
00263                                         Error_Loop(transferCfg.status);
00264                                 }
00265                         }
00266                         else if (tmpchar[0] == '2')
00267                         {
00268                                 // LEDs are OFF now...
00269                                 transferCfg.sl_addr7bit = SLVADDR;
00270                                 transferCfg.tx_data = (uint8_t *)iostate_cfg_1;
00271                                 transferCfg.tx_length = sizeof(iostate_cfg_1);
00272                                 transferCfg.rx_data = NULL;
00273                                 transferCfg.rx_length = 0;
00274                                 transferCfg.retransmissions_max = 2;
00275                                 if (I2C_MasterTransferData(I2CDEV, &transferCfg, I2C_TRANSFER_POLLING) \
00276                                                 == ERROR){
00277                                         Error_Loop(transferCfg.status);
00278                                 }
00279                         }
00280                         /* Then Echo it back */
00281                         _DBG_(tmpchar);
00282                 }
00283     }
00284
00285     // wait for current transmission complete - THR must be empty
00286     while (UART_CheckBusy(LPC_UART0)==SET);
00287
00288     // DeInitialize UART0 peripheral
00289     UART_DeInit(LPC_UART0);
00290     I2C_DeInit(I2CDEV);
00291     /* Loop forever */
00292     while(1);
00293 }
00294
00295 /* With ARM and GHS toolsets, the entry point is main() - this will
00296    allow the linker to generate wrapper code to setup stacks, allocate
00297    heap area, and initialize and copy code and data segments. For GNU
00298    toolsets, the entry point is through __start() in the crt0_gnu.asm
00299    file, and that startup code will setup stacks and data */
00300 int main(void)
00301 {
00302     return c_entry();
00303 }
00304
00305
00306 #ifdef  DEBUG
00307 /*******************************************************************************
00308 * @brief                Reports the name of the source file and the source line number
00309 *                               where the CHECK_PARAM error has occurred.
00310 * @param[in]    file Pointer to the source file name
00311 * @param[in]    line assert_param error line source number
00312 * @return               None
00313 *******************************************************************************/
00314 void check_failed(uint8_t *file, uint32_t line)
00315 {
00316         /* User can add his own implementation to report the file name and line number,
00317          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00318
00319         /* Infinite loop */
00320         while(1);
00321 }
00322 #endif
00323
00324 /*
00325  * @}
00326  */
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_DMA/i2s_dma_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_DMA/i2s_dma_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          i2s_dma_test.c                          2010-05-21
00003 */
00026 #include "lpc17xx_i2s.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_gpdma.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_pinsel.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINITIONS *************************/
00040 #define BUFFER_SIZE                     0x0A
00041
00042 #define DMA_SIZE                0x100UL
00043
00047 #define DMA_SRC                 LPC_AHBRAM1_BASE
00048
00052 #define DMA_DST                 (DMA_SRC+DMA_SIZE)
00053
00054 /************************** PRIVATE VARIABLES ***********************/
00055 uint8_t menu[]=
00056         "********************************************************************************\n\r"
00057         "Hello NXP Semiconductors \n\r"
00058         " I2S test DMA mode demo \n\r"
00059         "\t - MCU: LPC17xx \n\r"
00060         "\t - Core: ARM CORTEX-M3 \n\r"
00061         "\t - Communicate via: UART0 - 115200 bps \n\r"
00062         " Use two I2S channels in the same board to transfer data use DMA mode\n\r"
00063         "********************************************************************************\n\r";
00064
00065 // Terminal Counter flag for Channel 0
00066 __IO uint32_t Channel0_TC;
00067
00068 // Error Counter flag for Channel 0
00069 __IO uint32_t Channel0_Err;
00070
00071 // Terminal Counter flag for Channel 1
00072 __IO uint32_t Channel1_TC;
00073
00074 // Error Counter flag for Channel 1
00075 __IO uint32_t Channel1_Err;
00076
00077 volatile uint32_t *I2STXBuffer = (uint32_t*)(DMA_SRC);
00078 volatile uint32_t *I2SRXBuffer = (uint32_t*)(DMA_DST);
00079
00080 /************************** PRIVATE FUNCTIONS *************************/
00081 void DMA_IRQHandler (void);
00082
00083 void Buffer_Init(void);
00084 Bool Buffer_Verify(void);
00085 void print_menu(void);
00086
00087 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00088 /*********************************************************************/
00093 void DMA_IRQHandler (void)
00094 {
00095         // check GPDMA interrupt on channel 0
00096         if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 0)){ //check interrupt status on channel 0
00097                 // Check counter terminal status
00098                 if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 0)){
00099                         // Clear terminate counter Interrupt pending
00100                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 0);
00101                                 Channel0_TC++;
00102                 }
00103                 // Check error terminal status
00104                 if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, 0)){
00105                         // Clear error counter Interrupt pending
00106                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 0);
00107                         Channel0_Err++;
00108                 }
00109         }
00110         if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 1)){ //check interrupt status on channel 0
00111                 // Check counter terminal status
00112                 if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 1)){
00113                         // Clear terminate counter Interrupt pending
00114                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 1);
00115                                 Channel1_TC++;
00116                 }
00117                 // Check error terminal status
00118                 if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR,1)){
00119                         // Clear error counter Interrupt pending
00120                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 1);
00121                         Channel1_Err++;
00122                 }
00123         }
00124 }
00125
00126 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00127 /*********************************************************************/
00132 void Buffer_Init(void) {
00133         uint8_t i;
00134
00135         for (i = 0; i < BUFFER_SIZE; i++) {
00136                 I2STXBuffer[i] = ((i+1)<<16) + i + 1;
00137                 I2SRXBuffer[i] = 0;
00138         }
00139 }
00140
00141 /*********************************************************************/
00146 Bool Buffer_Verify(void) {
00147         uint8_t i;
00148         uint32_t *pTX = (uint32_t *) &I2STXBuffer[0];
00149         uint32_t *pRX = (uint32_t *) &I2SRXBuffer[1];
00150
00151         for (i = 0; i < BUFFER_SIZE; i++) {
00152                 if (*pTX++ != *pRX++)  {
00153                         /* Call Error Loop */
00154                         return FALSE;
00155                 }
00156         }
00157         return TRUE;
00158 }
00159 /*********************************************************************/
00164 void print_menu(void)
00165 {
00166         _DBG_(menu);
00167 }
00168
00169
00170 /*-------------------------MAIN FUNCTION------------------------------*/
00171 /*********************************************************************/
00176 int c_entry(void)
00177 {
00178         uint32_t i;
00179         GPDMA_Channel_CFG_Type GPDMACfg;
00180         I2S_MODEConf_Type I2S_ClkConfig;
00181         I2S_CFG_Type I2S_ConfigStruct;
00182         I2S_DMAConf_Type I2S_DMAStruct;
00183         PINSEL_CFG_Type PinCfg;
00184
00185         /* Initialize debug via UART0
00186          * – 115200bps
00187          * – 8 data bit
00188          * – No parity
00189          * – 1 stop bit
00190          * – No flow control
00191          */
00192         debug_frmwrk_init();
00193
00194         //print menu screen
00195         print_menu();
00196
00197         //Initialize buffer
00198         Buffer_Init();
00199
00200         _DBG_("Press '1' to initialize buffer...");
00201         while(_DG !='1');
00202         _DBG_("Transmit Buffer init: ...");
00203         for(i=0;i<BUFFER_SIZE;i++)
00204         {
00205                 _DBH32(I2STXBuffer[i]);_DBG_("");
00206         }
00207         _DBG_("Receive Buffer init: ...");
00208         for(i=0;i<BUFFER_SIZE;i++)
00209         {
00210                 _DBH32(I2SRXBuffer[i]);_DBG_("");
00211         }
00212
00213         /* Pin configuration:
00214          * Assign:      - P0.4 as I2SRX_CLK
00215          *                      - P0.5 as I2SRX_WS
00216          *                      - P0.6 as I2SRX_SDA
00217          *                      - P0.7 as I2STX_CLK
00218          *                      - P0.8 as I2STX_WS
00219          *                      - P0.9 as I2STX_SDA
00220          */
00221         PinCfg.Funcnum = 1;
00222         PinCfg.OpenDrain = 0;
00223         PinCfg.Pinmode = 0;
00224         PinCfg.Pinnum = 4;
00225         PinCfg.Portnum = 0;
00226         PINSEL_ConfigPin(&PinCfg);
00227         PinCfg.Pinnum = 5;
00228         PINSEL_ConfigPin(&PinCfg);
00229         PinCfg.Pinnum = 6;
00230         PINSEL_ConfigPin(&PinCfg);
00231         PinCfg.Pinnum = 7;
00232         PINSEL_ConfigPin(&PinCfg);
00233         PinCfg.Pinnum = 8;
00234         PINSEL_ConfigPin(&PinCfg);
00235         PinCfg.Pinnum = 9;
00236         PINSEL_ConfigPin(&PinCfg);
00237
00238         /* Initialize I2S */
00239         I2S_Init(LPC_I2S);
00240
00241         //Setup for I2S: RX is similar with TX
00242         /* setup:
00243          *              - wordwidth: 16 bits
00244          *              - stereo mode
00245          *              - master mode for I2S_TX and slave for I2S_RX
00246          *              - ws_halfperiod is 31
00247          *              - not use mute mode
00248          *              - use reset and stop mode
00249          *              - select the fractional rate divider clock output as the source,
00250          *              - disable 4-pin mode
00251          *              - MCLK ouput is disable
00252          *              - Frequency = 44.1 kHz
00253          * Because we use mode I2STXMODE[3:0]= 0000, I2SDAO[5]=0 and
00254          * I2SRX[3:0]=0000, I2SDAI[5] = 1. So we have I2SRX_CLK = I2STX_CLK
00255          * --> I2SRXBITRATE = 1 (not divide TXCLK to produce RXCLK)
00256          */
00257
00258         /* Audio Config*/
00259         I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
00260         I2S_ConfigStruct.mono = I2S_STEREO;
00261         I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
00262         I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
00263         I2S_ConfigStruct.ws_sel = I2S_MASTER_MODE;
00264         I2S_ConfigStruct.mute = I2S_MUTE_DISABLE;
00265         I2S_Config(LPC_I2S,I2S_TX_MODE,&I2S_ConfigStruct);
00266
00267         I2S_ConfigStruct.ws_sel = I2S_SLAVE_MODE;
00268         I2S_Config(LPC_I2S,I2S_RX_MODE,&I2S_ConfigStruct);
00269
00270         /* Clock Mode Config*/
00271         I2S_ClkConfig.clksel = I2S_CLKSEL_FRDCLK;
00272         I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
00273         I2S_ClkConfig.mcena = I2S_MCLK_DISABLE;
00274         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_TX_MODE);
00275         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_RX_MODE);
00276
00277         /* Set up frequency and bit rate*/
00278         I2S_FreqConfig(LPC_I2S, 44100, I2S_TX_MODE);
00279         I2S_SetBitRate(LPC_I2S, 0, I2S_RX_MODE);
00280         _DBG_("Press '2' to initialize DMA...");
00281         while(_DG !='2');
00282           /* GPDMA Interrupt configuration section ------------------------------------------------- */
00283
00284          /* Initialize GPDMA controller */
00285          GPDMA_Init();
00286          LPC_GPDMA->DMACConfig = 0x01;
00287
00288          /* Setting GPDMA interrupt */
00289      // Disable interrupt for DMA
00290      NVIC_DisableIRQ (DMA_IRQn);
00291      /* preemption = 1, sub-priority = 1 */
00292      NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
00293
00294         /*
00295          * Configure GPDMA channel 0 -------------------------------------------------------------
00296          * Used for I2S Transmit
00297          */
00298         // Setup GPDMA channel --------------------------------
00299         // channel 0
00300         GPDMACfg.ChannelNum = 0;
00301         // Source memory
00302         GPDMACfg.SrcMemAddr = DMA_SRC;
00303         // Destination memory
00304         GPDMACfg.DstMemAddr = 0;
00305         // Transfer size
00306         GPDMACfg.TransferSize = BUFFER_SIZE;
00307         // Transfer width - unused
00308         GPDMACfg.TransferWidth = 0;
00309         // Transfer type
00310         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2P;
00311         // Source connection
00312         GPDMACfg.SrcConn = 0;
00313         // Destination connection - unused
00314         GPDMACfg.DstConn = GPDMA_CONN_I2S_Channel_0;
00315         // Linker List Item - unused
00316         GPDMACfg.DMALLI = 0;
00317         GPDMA_Setup(&GPDMACfg);
00318         _DBG_("DMA Channel 0 setting finised...");
00319         /* Reset terminal counter */
00320         Channel0_TC = 0;
00321         /* Reset Error counter */
00322         Channel0_Err = 0;
00323
00324         /*
00325         * Configure GPDMA channel 1 -------------------------------------------------------------
00326         * Used for UART0 Receive
00327         */
00328         // Setup GPDMA channel --------------------------------
00329         // channel 1
00330         GPDMACfg.ChannelNum = 1;
00331         // Source memory - unused
00332         GPDMACfg.SrcMemAddr = 0;
00333         // Destination memory
00334         GPDMACfg.DstMemAddr = DMA_DST;
00335         // Transfer size
00336         GPDMACfg.TransferSize = BUFFER_SIZE+1;
00337         // Transfer width - unused
00338         GPDMACfg.TransferWidth = 0;
00339         // Transfer type
00340         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_P2M;
00341         // Source connection - unused
00342         GPDMACfg.SrcConn = GPDMA_CONN_I2S_Channel_1;
00343         // Destination connection
00344         GPDMACfg.DstConn = 0;
00345         // Linker List Item - unused
00346         GPDMACfg.DMALLI = 0;
00347         GPDMA_Setup(&GPDMACfg);
00348         _DBG_("DMA Channel 1 setting finised...");
00349         /* Reset terminal counter */
00350         Channel1_TC = 0;
00351         /* Reset Error counter */
00352         Channel1_Err = 0;
00353
00354         // Enable GPDMA channel 0 & 1
00355         GPDMA_ChannelCmd(0, ENABLE);
00356         GPDMA_ChannelCmd(1, ENABLE);
00357
00358         // Enable interrupt for DMA
00359         NVIC_EnableIRQ (DMA_IRQn);
00360         _DBG_("Press '3' to start I2S transfer process...");
00361         while(_DG !='3');
00362         _DBG_("I2S Start...");
00363
00364         I2S_DMAStruct.DMAIndex = I2S_DMA_2;
00365         I2S_DMAStruct.depth = 8;
00366         I2S_DMAConfig(LPC_I2S, &I2S_DMAStruct, I2S_RX_MODE);
00367         I2S_DMAStruct.DMAIndex = I2S_DMA_1;
00368         I2S_DMAStruct.depth = 1;
00369         I2S_DMAConfig(LPC_I2S, &I2S_DMAStruct, I2S_TX_MODE);
00370
00371         I2S_Start(LPC_I2S);
00372
00373         I2S_DMACmd(LPC_I2S, I2S_DMA_2, I2S_RX_MODE, ENABLE);
00374         I2S_DMACmd(LPC_I2S, I2S_DMA_1, I2S_TX_MODE, ENABLE);
00375
00376         while ((Channel0_TC == 0)||(Channel1_TC == 0) );
00377
00378         _DBG_("I2S Finish...");
00379         _DBG_("Receive Buffer data: ...");
00380         for(i=0;i<BUFFER_SIZE+1;i++)
00381         {
00382          _DBH32(I2SRXBuffer[i]);
00383          if(I2SRXBuffer[i]==0)
00384          {
00385                  _DBG_(" ->Dummy data");
00386          }
00387          else _DBG_("");
00388         }
00389         I2S_DeInit(LPC_I2S);
00390         while(1);
00391 }
00392
00393 /* With ARM and GHS toolsets, the entry point is main() - this will
00394    allow the linker to generate wrapper code to setup stacks, allocate
00395    heap area, and initialize and copy code and data segments. For GNU
00396    toolsets, the entry point is through __start() in the crt0_gnu.asm
00397    file, and that startup code will setup stacks and data */
00398 int main(void)
00399 {
00400     return c_entry();
00401 }
00402
00403 #ifdef  DEBUG
00404 /*******************************************************************************
00405 * @brief                Reports the name of the source file and the source line number
00406 *                               where the CHECK_PARAM error has occurred.
00407 * @param[in]    file Pointer to the source file name
00408 * @param[in]    line assert_param error line source number
00409 * @return               None
00410 *******************************************************************************/
00411 void check_failed(uint8_t *file, uint32_t line)
00412 {
00413         /* User can add his own implementation to report the file name and line number,
00414          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00415
00416         /* Infinite loop */
00417         while(1);
00418 }
00419 #endif
00420
00421 /*
00422  * @}
00423  */
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_IRQ/i2s_irq_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_IRQ/i2s_irq_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          i2s_irq_test.c                          2010-05-21
00003 */
00026 #include "lpc17xx_i2s.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS *************************/
00039 #define BUFFER_SIZE                             0x400
00040
00044 #define I2S_BUFFER_SRC                  LPC_AHBRAM1_BASE //0x20080000
00045
00049 #define I2S_BUFFER_DST                  (I2S_BUFFER_SRC+0x1000UL) //0x20081000
00050
00051 #define RXFIFO_EMPTY            0
00052 #define TXFIFO_FULL                     8
00053 /************************** PRIVATE VARIABLES ***********************/
00054 uint8_t menu[]=
00055         "********************************************************************************\n\r"
00056         "Hello NXP Semiconductors \n\r"
00057         " I2S interrupt mode demo \n\r"
00058         "\t - MCU: LPC17xx \n\r"
00059         "\t - Core: ARM CORTEX-M3 \n\r"
00060         "\t - Communicate via: UART0 - 115200 bps \n\r"
00061         " Use two I2S channels in the same board to transfer data in interrupt mode\n\r"
00062         "********************************************************************************\n\r";
00063
00064 volatile uint8_t  I2STXDone = 0;
00065 volatile uint8_t  I2SRXDone = 0;
00066
00067 volatile uint32_t *I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC);
00068 volatile uint32_t *I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST);
00069
00070 volatile uint32_t I2SReadLength = 0;
00071 volatile uint32_t I2SWriteLength = 0;
00072
00073 uint8_t tx_depth_irq = 0;
00074 uint8_t rx_depth_irq = 0;
00075 uint8_t dummy=0;
00076
00077
00078 /************************** PRIVATE FUNCTIONS *************************/
00079 void I2S_IRQHandler(void);
00080
00081 void Buffer_Init(void);
00082 Bool Buffer_Verify(void);
00083 void print_menu(void);
00084
00085 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00086 /*********************************************************************/
00091 void I2S_IRQHandler()
00092 {
00093         uint32_t RXLevel = 0;
00094
00095         //Check RX interrupt
00096         if(I2S_GetIRQStatus(LPC_I2S, I2S_RX_MODE))
00097         {
00098                 RXLevel = I2S_GetLevel(LPC_I2S, I2S_RX_MODE);
00099                 if ( (RXLevel != RXFIFO_EMPTY) && !I2SRXDone )
00100                 {
00101                         while ( RXLevel > 0 )
00102                         {
00103                                 if ( I2SReadLength == BUFFER_SIZE )
00104                                 {
00105                                         //Stop RX
00106                                         I2S_Stop(LPC_I2S, I2S_RX_MODE);
00107                                         // Disable RX
00108                                         I2S_IRQCmd(LPC_I2S, I2S_RX_MODE, DISABLE);
00109                                         I2SRXDone = 1;
00110                                         break;
00111                                 }
00112                                 else
00113                                 {
00114                                         I2SRXBuffer[I2SReadLength++] = LPC_I2S->I2SRXFIFO;
00115                                 }
00116                                 RXLevel--;
00117                         }
00118                 }
00119         }
00120         return;
00121 }
00122
00123 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00124 /*********************************************************************/
00129 void Buffer_Init(void) {
00130         uint32_t i;
00131         for ( i = 0; i < BUFFER_SIZE; i++ )     /* clear buffer */
00132         {
00133         I2STXBuffer[i] = i;
00134         I2SRXBuffer[i] = 0;
00135         }
00136
00137 }
00138
00139 /*********************************************************************/
00145 Bool Buffer_Verify(void) {
00146         uint32_t i;
00147         uint32_t *pTX = (uint32_t *) &I2STXBuffer[0];
00148         uint32_t *pRX = (uint32_t *) &I2SRXBuffer[1];
00149         /* Because first element of RX is dummy 0 value, so we just verify
00150          * from 2nd element
00151          */
00152         for (i = 1; i < BUFFER_SIZE; i++) {
00153                 if (*pTX++ != *pRX++)  {
00154                         return FALSE;
00155                 }
00156         }
00157         return TRUE;
00158 }
00159 /*********************************************************************/
00164 void print_menu(void)
00165 {
00166         _DBG_(menu);
00167 }
00168
00169
00170 /*-------------------------MAIN FUNCTION------------------------------*/
00171 /*********************************************************************/
00176 int c_entry (void) {                       /* Main Program */
00177         I2S_MODEConf_Type I2S_ClkConfig;
00178         I2S_CFG_Type I2S_ConfigStruct;
00179         PINSEL_CFG_Type PinCfg;
00180
00181         uint32_t i;
00182         /* Initialize debug via UART0
00183          * – 115200bps
00184          * – 8 data bit
00185          * – No parity
00186          * – 1 stop bit
00187          * – No flow control
00188          */
00189         debug_frmwrk_init();
00190
00191         //print menu screen
00192         print_menu();
00193 /* Initialize I2S peripheral ------------------------------------*/
00194         /* Pin configuration:
00195          * Assign:      - P0.4 as I2SRX_CLK
00196          *                      - P0.5 as I2SRX_WS
00197          *                      - P0.6 as I2SRX_SDA
00198          *                      - P0.7 as I2STX_CLK
00199          *                      - P0.8 as I2STX_WS
00200          *                      - P0.9 as I2STX_SDA
00201          */
00202         PinCfg.Funcnum = 1;
00203         PinCfg.OpenDrain = 0;
00204         PinCfg.Pinmode = 0;
00205         PinCfg.Pinnum = 4;
00206         PinCfg.Portnum = 0;
00207         PINSEL_ConfigPin(&PinCfg);
00208         PinCfg.Pinnum = 5;
00209         PINSEL_ConfigPin(&PinCfg);
00210         PinCfg.Pinnum = 6;
00211         PINSEL_ConfigPin(&PinCfg);
00212         PinCfg.Pinnum = 7;
00213         PINSEL_ConfigPin(&PinCfg);
00214         PinCfg.Pinnum = 8;
00215         PINSEL_ConfigPin(&PinCfg);
00216         PinCfg.Pinnum = 9;
00217         PINSEL_ConfigPin(&PinCfg);
00218
00219         Buffer_Init();
00220
00221         I2S_Init(LPC_I2S);
00222
00223         /* setup:
00224          *              - wordwidth: 16 bits
00225          *              - stereo mode
00226          *              - master mode for I2S_TX and slave for I2S_RX
00227          *              - ws_halfperiod is 31
00228          *              - not use mute mode
00229          *              - use reset and stop mode
00230          *              - select the fractional rate divider clock output as the source,
00231          *              - disable 4-pin mode
00232          *              - MCLK ouput is disable
00233          *              - Frequency = 44.1 kHz
00234          * Because we use mode I2STXMODE[3:0]= 0000, I2SDAO[5]=0 and
00235          * I2SRX[3:0]=0000, I2SDAI[5] = 1. So we have I2SRX_CLK = I2STX_CLK
00236          * --> I2SRXBITRATE = 1 (not divide TXCLK to produce RXCLK)
00237          */
00238
00239         /* Audio Config*/
00240         I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
00241         I2S_ConfigStruct.mono = I2S_STEREO;
00242         I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
00243         I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
00244         I2S_ConfigStruct.ws_sel = I2S_MASTER_MODE;
00245         I2S_ConfigStruct.mute = I2S_MUTE_DISABLE;
00246         I2S_Config(LPC_I2S,I2S_TX_MODE,&I2S_ConfigStruct);
00247
00248         I2S_ConfigStruct.ws_sel = I2S_SLAVE_MODE;
00249         I2S_Config(LPC_I2S,I2S_RX_MODE,&I2S_ConfigStruct);
00250
00251         /* Clock Mode Config*/
00252         I2S_ClkConfig.clksel = I2S_CLKSEL_FRDCLK;
00253         I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
00254         I2S_ClkConfig.mcena = I2S_MCLK_DISABLE;
00255         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_TX_MODE);
00256         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_RX_MODE);
00257
00258         I2S_FreqConfig(LPC_I2S, 44100, I2S_TX_MODE);
00259         I2S_SetBitRate(LPC_I2S, 0, I2S_RX_MODE);
00260
00261         I2S_Stop(LPC_I2S, I2S_TX_MODE);
00262         I2S_Stop(LPC_I2S, I2S_RX_MODE);
00263
00264         NVIC_EnableIRQ(I2S_IRQn);
00265
00266         /* RX FIFO depth is 1, TX FIFO depth is 8. */
00267         I2S_IRQConfig(LPC_I2S,I2S_TX_MODE,8);
00268         I2S_IRQConfig(LPC_I2S,I2S_RX_MODE,1);
00269         I2S_IRQCmd(LPC_I2S,I2S_RX_MODE,ENABLE);
00270         I2S_Start(LPC_I2S);
00271
00272 /* I2S transmit ---------------------------------------------------*/
00273         while ( I2SWriteLength < BUFFER_SIZE )
00274         {
00275                 while(I2S_GetLevel(LPC_I2S, I2S_TX_MODE)==TXFIFO_FULL);
00276                 I2S_Send(LPC_I2S, I2STXBuffer[I2SWriteLength++]);
00277         }
00278
00279         I2STXDone = 1;
00280
00281         /* Wait for transmit/receive complete */
00282         while ( !I2SRXDone || !I2STXDone );
00283         for(i=0;i<BUFFER_SIZE;i++)
00284         {
00285                 _DBH32(I2SRXBuffer[i]);_DBG_("");
00286         }
00287         /* Verify RX and TX Buffer */
00288         if(Buffer_Verify())
00289         {
00290                 _DBG_("Verify Buffer: OK...");
00291         }
00292         else
00293         {
00294                 _DBG_("Verify Buffer: ERROR...");
00295         }
00296
00297
00298         return 0;
00299 }
00300
00301 /* With ARM and GHS toolsets, the entry point is main() - this will
00302    allow the linker to generate wrapper code to setup stacks, allocate
00303    heap area, and initialize and copy code and data segments. For GNU
00304    toolsets, the entry point is through __start() in the crt0_gnu.asm
00305    file, and that startup code will setup stacks and data */
00306 int main(void)
00307 {
00308     return c_entry();
00309 }
00310
00311 #ifdef  DEBUG
00312 /*******************************************************************************
00313 * @brief                Reports the name of the source file and the source line number
00314 *                               where the CHECK_PARAM error has occurred.
00315 * @param[in]    file Pointer to the source file name
00316 * @param[in]    line assert_param error line source number
00317 * @return               None
00318 *******************************************************************************/
00319 void check_failed(uint8_t *file, uint32_t line)
00320 {
00321         /* User can add his own implementation to report the file name and line number,
00322          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00323
00324         /* Infinite loop */
00325         while(1);
00326 }
00327 #endif
00328
00329 /*
00330  * @}
00331  */
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_MCLK/i2s_mclk.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_MCLK/i2s_mclk.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          i2s_mclk.c                              2010-06-18
00003 */
00025 #include "lpc17xx_i2s.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINITIONS *************************/
00038 #define BUFFER_SIZE                             0x400
00039
00043 #define I2S_BUFFER_SRC                  LPC_AHBRAM1_BASE //0x20080000
00044
00048 #define I2S_BUFFER_DST                  (I2S_BUFFER_SRC+0x1000UL) //0x20081000
00049
00050 #define RXFIFO_EMPTY            0
00051 #define TXFIFO_FULL                     8
00052 /************************** PRIVATE VARIABLES ***********************/
00053 uint8_t menu[]=
00054         "********************************************************************************\n\r"
00055         "Hello NXP Semiconductors \n\r"
00056         " I2S MCLK demo \n\r"
00057         "\t - MCU: LPC17xx \n\r"
00058         "\t - Core: ARM CORTEX-M3 \n\r"
00059         "\t - Communicate via: UART0 - 115200 bps \n\r"
00060         " This example describes how to use I2S master clock as I2S clock source\n\r"
00061         "********************************************************************************\n\r";
00062
00063 volatile uint8_t  I2STXDone = 0;
00064 volatile uint8_t  I2SRXDone = 0;
00065
00066 volatile uint32_t *I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC);
00067 volatile uint32_t *I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST);
00068
00069 volatile uint32_t I2SReadLength = 0;
00070 volatile uint32_t I2SWriteLength = 0;
00071
00072 uint8_t tx_depth_irq = 0;
00073 uint8_t rx_depth_irq = 0;
00074 uint8_t dummy=0;
00075
00076
00077 /************************** PRIVATE FUNCTIONS *************************/
00078 void I2S_IRQHandler(void);
00079
00080 void Buffer_Init(void);
00081 Bool Buffer_Verify(void);
00082 void print_menu(void);
00083
00084 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00085 /*********************************************************************/
00090 void I2S_IRQHandler()
00091 {
00092         uint32_t RXLevel = 0;
00093
00094         //Check RX interrupt
00095         if(I2S_GetIRQStatus(LPC_I2S, I2S_RX_MODE))
00096         {
00097                 RXLevel = I2S_GetLevel(LPC_I2S, I2S_RX_MODE);
00098                 if ( (RXLevel != RXFIFO_EMPTY) && !I2SRXDone )
00099                 {
00100                         while ( RXLevel > 0 )
00101                         {
00102                                 if ( I2SReadLength == BUFFER_SIZE )
00103                                 {
00104                                         //Stop RX
00105                                         I2S_Stop(LPC_I2S, I2S_RX_MODE);
00106                                         // Disable RX
00107                                         I2S_IRQCmd(LPC_I2S, I2S_RX_MODE, DISABLE);
00108                                         I2SRXDone = 1;
00109                                         break;
00110                                 }
00111                                 else
00112                                 {
00113                                         I2SRXBuffer[I2SReadLength++] = LPC_I2S->I2SRXFIFO;
00114                                 }
00115                                 RXLevel--;
00116                         }
00117                 }
00118         }
00119         return;
00120 }
00121
00122 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00123 /*********************************************************************/
00128 void Buffer_Init(void) {
00129         uint32_t i;
00130         for ( i = 0; i < BUFFER_SIZE; i++ )     /* clear buffer */
00131         {
00132         I2STXBuffer[i] = i;
00133         I2SRXBuffer[i] = 0;
00134         }
00135
00136 }
00137
00138 /*********************************************************************/
00144 Bool Buffer_Verify(void) {
00145         uint32_t i;
00146         uint32_t *pTX = (uint32_t *) &I2STXBuffer[0];
00147         uint32_t *pRX = (uint32_t *) &I2SRXBuffer[1];
00148         /* Because first element of RX is dummy 0 value, so we just verify
00149          * from 2nd element
00150          */
00151         for (i = 1; i < BUFFER_SIZE; i++) {
00152                 if (*pTX++ != *pRX++)  {
00153                         return FALSE;
00154                 }
00155         }
00156         return TRUE;
00157 }
00158 /*********************************************************************/
00163 void print_menu(void)
00164 {
00165         _DBG_(menu);
00166 }
00167
00168
00169 /*-------------------------MAIN FUNCTION------------------------------*/
00170 /*********************************************************************/
00175 int c_entry (void) {                       /* Main Program */
00176         I2S_MODEConf_Type I2S_ClkConfig;
00177         I2S_CFG_Type I2S_ConfigStruct;
00178         PINSEL_CFG_Type PinCfg;
00179
00180         uint32_t i;
00181         /* Initialize debug via UART0
00182          * – 115200bps
00183          * – 8 data bit
00184          * – No parity
00185          * – 1 stop bit
00186          * – No flow control
00187          */
00188         debug_frmwrk_init();
00189
00190         //print menu screen
00191         print_menu();
00192 /* Initialize I2S peripheral ------------------------------------*/
00193         /* Pin configuration:
00194          * Assign:      - P0.4 as I2SRX_CLK
00195          *                      - P0.5 as I2SRX_WS
00196          *                      - P0.6 as I2SRX_SDA
00197          *                      - P0.7 as I2STX_CLK
00198          *                      - P0.8 as I2STX_WS
00199          *                      - P0.9 as I2STX_SDA
00200          */
00201         PinCfg.Funcnum = 1;
00202         PinCfg.OpenDrain = 0;
00203         PinCfg.Pinmode = 0;
00204         PinCfg.Pinnum = 4;
00205         PinCfg.Portnum = 0;
00206         PINSEL_ConfigPin(&PinCfg);
00207         PinCfg.Pinnum = 5;
00208         PINSEL_ConfigPin(&PinCfg);
00209         PinCfg.Pinnum = 6;
00210         PINSEL_ConfigPin(&PinCfg);
00211         PinCfg.Pinnum = 7;
00212         PINSEL_ConfigPin(&PinCfg);
00213         PinCfg.Pinnum = 8;
00214         PINSEL_ConfigPin(&PinCfg);
00215         PinCfg.Pinnum = 9;
00216         PINSEL_ConfigPin(&PinCfg);
00217
00218         /* P4.29 as TX_MCLK */
00219         PinCfg.Funcnum = 1;
00220         PinCfg.OpenDrain = 0;
00221         PinCfg.Pinmode = 0;
00222         PinCfg.Pinnum = 29;
00223         PinCfg.Portnum = 4;
00224         PINSEL_ConfigPin(&PinCfg);
00225
00226         Buffer_Init();
00227
00228         I2S_Init(LPC_I2S);
00229
00230         /* setup:
00231          *              - wordwidth: 16 bits
00232          *              - stereo mode
00233          *              - master mode for I2S_TX and slave for I2S_RX
00234          *              - ws_halfperiod is 31
00235          *              - not use mute mode
00236          *              - use reset and stop mode
00237          *              - select the fractional rate divider clock output as the source,
00238          *              - disable 4-pin mode
00239          *              - MCLK ouput is disable
00240          *              - Frequency = 44.1 kHz
00241          * Because we use mode I2STXMODE[3:0]= 0000, I2SDAO[5]=0 and
00242          * I2SRX[3:0]=0000, I2SDAI[5] = 1. So we have I2SRX_CLK = I2STX_CLK
00243          * --> I2SRXBITRATE = 1 (not divide TXCLK to produce RXCLK)
00244          */
00245
00246         /* Audio Config*/
00247         I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
00248         I2S_ConfigStruct.mono = I2S_STEREO;
00249         I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
00250         I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
00251         I2S_ConfigStruct.ws_sel = I2S_MASTER_MODE;
00252         I2S_ConfigStruct.mute = I2S_MUTE_DISABLE;
00253         I2S_Config(LPC_I2S,I2S_TX_MODE,&I2S_ConfigStruct);
00254
00255         I2S_ConfigStruct.ws_sel = I2S_SLAVE_MODE;
00256         I2S_Config(LPC_I2S,I2S_RX_MODE,&I2S_ConfigStruct);
00257
00258         I2S_Stop(LPC_I2S, I2S_TX_MODE);
00259         I2S_Stop(LPC_I2S, I2S_RX_MODE);
00260
00261         /* Clock Mode Config
00262          * I2S transmitter:
00263          *      - Select TX fractional rate divider clock ouput as the source
00264          *  - Disable 4-wire mode
00265          *  - Enable for the TX_MCLK output (optional, this setting just for
00266          *  user can observe master clock on oscilloscope)
00267          * I2S receiver:
00268          *      - Select TX_MCLK signal as the RX_MCLK clock source
00269          *  - Disable 4-wire mode
00270          *  - Disable for the RX_MCLK output
00271          */
00272         I2S_ClkConfig.clksel = I2S_CLKSEL_FRDCLK;
00273         I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
00274         I2S_ClkConfig.mcena = I2S_MCLK_ENABLE;
00275         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_TX_MODE);
00276
00277         I2S_ClkConfig.clksel = I2S_CLKSEL_MCLK;
00278         I2S_ClkConfig.mcena = I2S_MCLK_DISABLE;
00279         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_RX_MODE);
00280
00281         I2S_FreqConfig(LPC_I2S, 44100, I2S_TX_MODE);
00282         I2S_FreqConfig(LPC_I2S, 44100, I2S_RX_MODE);
00283
00284         NVIC_EnableIRQ(I2S_IRQn);
00285
00286         /* RX FIFO depth is 1, TX FIFO depth is 8. */
00287         I2S_IRQConfig(LPC_I2S,I2S_TX_MODE,8);
00288         I2S_IRQConfig(LPC_I2S,I2S_RX_MODE,1);
00289         I2S_IRQCmd(LPC_I2S,I2S_RX_MODE,ENABLE);
00290         I2S_Start(LPC_I2S);
00291
00292 /* I2S transmit ---------------------------------------------------*/
00293         while ( I2SWriteLength < BUFFER_SIZE )
00294         {
00295                 while(I2S_GetLevel(LPC_I2S, I2S_TX_MODE)==TXFIFO_FULL);
00296                 I2S_Send(LPC_I2S, I2STXBuffer[I2SWriteLength++]);
00297         }
00298
00299         I2STXDone = 1;
00300
00301         /* Wait for transmit/receive complete */
00302         while ( !I2SRXDone || !I2STXDone );
00303         for(i=0;i<BUFFER_SIZE;i++)
00304         {
00305                 _DBH32(I2SRXBuffer[i]);_DBG_("");
00306         }
00307         /* Verify RX and TX Buffer */
00308         if(Buffer_Verify())
00309         {
00310                 _DBG_("Verify Buffer: OK...");
00311         }
00312         else
00313         {
00314                 _DBG_("Verify Buffer: ERROR...");
00315         }
00316         while(1);
00317 }
00318
00319 /* With ARM and GHS toolsets, the entry point is main() - this will
00320    allow the linker to generate wrapper code to setup stacks, allocate
00321    heap area, and initialize and copy code and data segments. For GNU
00322    toolsets, the entry point is through __start() in the crt0_gnu.asm
00323    file, and that startup code will setup stacks and data */
00324 int main(void)
00325 {
00326     return c_entry();
00327 }
00328
00329 #ifdef  DEBUG
00330 /*******************************************************************************
00331 * @brief                Reports the name of the source file and the source line number
00332 *                               where the CHECK_PARAM error has occurred.
00333 * @param[in]    file Pointer to the source file name
00334 * @param[in]    line assert_param error line source number
00335 * @return               None
00336 *******************************************************************************/
00337 void check_failed(uint8_t *file, uint32_t line)
00338 {
00339         /* User can add his own implementation to report the file name and line number,
00340          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00341
00342         /* Infinite loop */
00343         while(1);
00344 }
00345 #endif
00346
00347 /*
00348  * @}
00349  */
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/Polling/i2s_polling.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/Polling/i2s_polling.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          i2s_polling.c                           2010-05-21
00003 */
00026 #include "lpc17xx_i2s.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS *************************/
00039 #define BUFFER_SIZE                     0x400
00040
00044 #define I2S_BUFFER_SRC                  LPC_AHBRAM1_BASE
00045
00049 #define I2S_BUFFER_DST                  (I2S_BUFFER_SRC+0x1000UL)
00050
00051 /************************** PRIVATE VARIABLE ***********************/
00052 uint8_t menu[]=
00053         "********************************************************************************\n\r"
00054         "Hello NXP Semiconductors \n\r"
00055         " I2S polling mode demo \n\r"
00056         "\t - MCU: LPC17xx \n\r"
00057         "\t - Core: ARM CORTEX-M3 \n\r"
00058         "\t - Communicate via: UART0 - 115200 bps \n\r"
00059         " Use two I2S channels in the same board to transfer data in polling mode\n\r"
00060         "********************************************************************************\n\r";
00061
00062 volatile uint8_t  I2STXDone = 0;
00063 volatile uint8_t  I2SRXDone = 0;
00064
00065 volatile uint32_t *I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC);
00066 volatile uint32_t *I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST);
00067
00068 volatile uint32_t I2SReadLength = 0;
00069 volatile uint32_t I2SWriteLength = 0;
00070
00071 /************************** PRIVATE FUNCTIONS *************************/
00072 void Buffer_Init(void);
00073 Bool Buffer_Verify(void);
00074 void print_menu(void);
00075
00076 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00077 /*********************************************************************/
00082 void Buffer_Init(void) {
00083         uint32_t i;
00084
00085         for (i = 0; i < BUFFER_SIZE; i++) {
00086                 I2STXBuffer[i] = i+1;
00087                 I2SRXBuffer[i] = 0;
00088         }
00089 }
00090
00091 /*********************************************************************/
00097 Bool Buffer_Verify(void) {
00098         uint32_t i;
00099         uint32_t *pTX = (uint32_t *) &I2STXBuffer[0];
00100         /* Generally, first element of RX buffer is a dummy data, so
00101          * it will be discarded
00102          */
00103         uint32_t *pRX = (uint32_t *) &I2SRXBuffer[1];
00104
00105         for (i = 1; i < BUFFER_SIZE; i++) {
00106                 if (*pTX++ != *pRX++)  {
00107                         return FALSE;
00108                 }
00109         }
00110         return TRUE;
00111 }
00112
00113 /*********************************************************************/
00118 void print_menu(void)
00119 {
00120         _DBG_(menu);
00121 }
00122
00123
00124 /*-------------------------MAIN FUNCTION------------------------------*/
00125 /*********************************************************************/
00130 int c_entry (void) {
00131         uint32_t i;
00132         uint32_t dummy=0;
00133         I2S_MODEConf_Type I2S_ClkConfig;
00134         I2S_CFG_Type I2S_ConfigStruct;
00135         PINSEL_CFG_Type PinCfg;
00136
00137         /* Initialize debug via UART0
00138          * – 115200bps
00139          * – 8 data bit
00140          * – No parity
00141          * – 1 stop bit
00142          * – No flow control
00143          */
00144         debug_frmwrk_init();
00145
00146         //print menu screen
00147         print_menu();
00148
00149         Buffer_Init();
00150
00151         /* Pin configuration:
00152          * Assign:      - P0.4 as I2SRX_CLK
00153          *                      - P0.5 as I2SRX_WS
00154          *                      - P0.6 as I2SRX_SDA
00155          *                      - P0.7 as I2STX_CLK
00156          *                      - P0.8 as I2STX_WS
00157          *                      - P0.9 as I2STX_SDA
00158          */
00159         PinCfg.Funcnum = 1;
00160         PinCfg.OpenDrain = 0;
00161         PinCfg.Pinmode = 0;
00162         PinCfg.Pinnum = 4;
00163         PinCfg.Portnum = 0;
00164         PINSEL_ConfigPin(&PinCfg);
00165         PinCfg.Pinnum = 5;
00166         PINSEL_ConfigPin(&PinCfg);
00167         PinCfg.Pinnum = 6;
00168         PINSEL_ConfigPin(&PinCfg);
00169         PinCfg.Pinnum = 7;
00170         PINSEL_ConfigPin(&PinCfg);
00171         PinCfg.Pinnum = 8;
00172         PINSEL_ConfigPin(&PinCfg);
00173         PinCfg.Pinnum = 9;
00174         PINSEL_ConfigPin(&PinCfg);
00175
00176         I2S_Init(LPC_I2S);
00177
00178         //Setup for I2S: RX is similar with TX
00179         /* setup:
00180          *              - wordwidth: 16 bits
00181          *              - stereo mode
00182          *              - master mode for I2S_TX and slave for I2S_RX
00183          *              - ws_halfperiod is 31
00184          *              - not use mute mode
00185          *              - use reset and stop mode
00186          *              - select the fractional rate divider clock output as the source,
00187          *              - disable 4-pin mode
00188          *              - MCLK ouput is disable
00189          *              - Frequency = 44.1 kHz (x=8,y=51 - automatic setting)
00190          * Because we use mode I2STXMODE[3:0]= 0000, I2SDAO[5]=0 and
00191          * I2SRX[3:0]=0000, I2SDAI[5] = 1. So we have I2SRX_CLK = I2STX_CLK
00192          * --> I2SRXBITRATE = 1 (not divide TXCLK to produce RXCLK)
00193          */
00194
00195         /* Audio Config*/
00196         I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
00197         I2S_ConfigStruct.mono = I2S_STEREO;
00198         I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
00199         I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
00200         I2S_ConfigStruct.ws_sel = I2S_MASTER_MODE;
00201         I2S_ConfigStruct.mute = I2S_MUTE_DISABLE;
00202         I2S_Config(LPC_I2S,I2S_TX_MODE,&I2S_ConfigStruct);
00203
00204         I2S_ConfigStruct.ws_sel = I2S_SLAVE_MODE;
00205         I2S_Config(LPC_I2S,I2S_RX_MODE,&I2S_ConfigStruct);
00206
00207         /* Clock Mode Config*/
00208         I2S_ClkConfig.clksel = I2S_CLKSEL_FRDCLK;
00209         I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
00210         I2S_ClkConfig.mcena = I2S_MCLK_DISABLE;
00211         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_TX_MODE);
00212         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_RX_MODE);
00213
00214         /* Set up frequency and bit rate*/
00215         I2S_FreqConfig(LPC_I2S, 44100, I2S_TX_MODE);
00216         I2S_SetBitRate(LPC_I2S, 0, I2S_RX_MODE);
00217
00218         I2S_Start(LPC_I2S);
00219          while(I2STXDone == 0||I2SRXDone == 0){
00220                 if(I2STXDone ==0){
00221                          I2S_Send(LPC_I2S,I2STXBuffer[I2SWriteLength]);
00222                          I2SWriteLength +=1;
00223                          if(I2SWriteLength == BUFFER_SIZE) I2STXDone = 1;
00224                 }
00225                 if(I2SRXDone == 0)
00226                 {
00227                         while(I2S_GetLevel(LPC_I2S,I2S_RX_MODE)==0x00);
00228                         if(dummy == 0) //dummy receive
00229                         {
00230                                 i = I2S_Receive(LPC_I2S);
00231                                 dummy = 1;
00232                         }
00233                         else
00234                         {
00235                                 *(uint32_t *)(&I2SRXBuffer[I2SReadLength]) = I2S_Receive(LPC_I2S);
00236                                 I2SReadLength +=1;
00237                         }
00238                         if(I2SReadLength == BUFFER_SIZE) I2SRXDone = 1;
00239                 }
00240          }
00241
00242          /* print received data */
00243          _DBG_("Receive Buffer data: ...");
00244          for(i=0;i<BUFFER_SIZE;i++)
00245          {
00246                  _DBH32(I2SRXBuffer[i]);_DBG_("");
00247          }
00248
00249          /* Validate received data */
00250          if(Buffer_Verify())
00251          {
00252                  _DBG_("Verify Buffer: OK...");
00253          }
00254          else
00255          {
00256                  _DBG_("Verify Buffer: ERROR...");
00257          }
00258          I2S_DeInit(LPC_I2S);
00259          while(1);
00260 }
00261
00262 /* With ARM and GHS toolsets, the entry point is main() - this will
00263    allow the linker to generate wrapper code to setup stacks, allocate
00264    heap area, and initialize and copy code and data segments. For GNU
00265    toolsets, the entry point is through __start() in the crt0_gnu.asm
00266    file, and that startup code will setup stacks and data */
00267 int main(void)
00268 {
00269     return c_entry();
00270 }
00271
00272 #ifdef  DEBUG
00273 /*******************************************************************************
00274 * @brief                Reports the name of the source file and the source line number
00275 *                               where the CHECK_PARAM error has occurred.
00276 * @param[in]    file Pointer to the source file name
00277 * @param[in]    line assert_param error line source number
00278 * @return               None
00279 *******************************************************************************/
00280 void check_failed(uint8_t *file, uint32_t line)
00281 {
00282         /* User can add his own implementation to report the file name and line number,
00283          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00284
00285         /* Infinite loop */
00286         while(1);
00287 }
00288 #endif
00289
00290 /*
00291  * @}
00292  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_test_4_wire/i2s_test_4_wire.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_test_4_wire/i2s_test_4_wire.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          i2s_test_4_wire.c                               2010-05-21
00003 */
00025 #include "lpc17xx_i2s.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036
00037
00038 #define BUFFER_SIZE                     0x400
00039
00043 #define I2S_BUFFER_SRC                  LPC_AHBRAM1_BASE
00044
00048 #define I2S_BUFFER_DST                  (I2S_BUFFER_SRC+0x1000UL)
00049
00050 /************************** PRIVATE VARIABLES ***********************/
00051 uint8_t menu[]=
00052         "********************************************************************************\n\r"
00053         "Hello NXP Semiconductors \n\r"
00054         " I2S 4-wire demo \n\r"
00055         "\t - MCU: LPC17xx \n\r"
00056         "\t - Core: ARM CORTEX-M3 \n\r"
00057         "\t - Communicate via: UART0 - 115200 bps \n\r"
00058         " Use two I2S channels in the same board to transfer data in 4-wire mode\n\r"
00059         "********************************************************************************\n\r";
00060 volatile uint8_t  I2STXDone = 0;
00061 volatile uint8_t  I2SRXDone = 0;
00062
00063 volatile uint32_t *I2STXBuffer = (uint32_t*)(I2S_BUFFER_SRC);
00064 volatile uint32_t *I2SRXBuffer = (uint32_t *)(I2S_BUFFER_DST);
00065
00066 volatile uint32_t I2SReadLength = 0;
00067 volatile uint32_t I2SWriteLength = 0;
00068
00069
00070 /************************** PRIVATE FUNCTIONS *************************/
00071 void Buffer_Init(void);
00072 Bool Buffer_Verify(void);
00073 void print_menu(void);
00074
00075 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00076 /*********************************************************************/
00081 void Buffer_Init(void) {
00082         uint32_t i;
00083
00084         for (i = 0; i < BUFFER_SIZE; i++) {
00085                 I2STXBuffer[i] = i;
00086                 I2SRXBuffer[i] = 0;
00087         }
00088 }
00089
00090 /*********************************************************************/
00096 Bool Buffer_Verify(void) {
00097         uint32_t i;
00098         uint32_t *pTX = (uint32_t *) &I2STXBuffer[0];
00099         /* Generally, first element of RX buffer is a dummy data, so
00100          * it will be discarded
00101          */
00102         uint32_t *pRX = (uint32_t *) &I2SRXBuffer[1];
00103
00104         for (i = 1; i < BUFFER_SIZE; i++) {
00105                 if (*pTX++ != *pRX++)  {
00106                         return FALSE;
00107                 }
00108         }
00109         return TRUE;
00110 }
00111 /*********************************************************************/
00116 void print_menu(void)
00117 {
00118         _DBG_(menu);
00119 }
00120
00121 /*-------------------------MAIN FUNCTION------------------------------*/
00122 /*********************************************************************/
00127 int c_entry (void) {
00128         uint32_t i;
00129         uint8_t dummy=0;
00130         I2S_MODEConf_Type I2S_ClkConfig;
00131         I2S_CFG_Type I2S_ConfigStruct;
00132         PINSEL_CFG_Type PinCfg;
00133
00134         /* Initialize debug via UART0
00135          * – 115200bps
00136          * – 8 data bit
00137          * – No parity
00138          * – 1 stop bit
00139          * – No flow control
00140          */
00141         debug_frmwrk_init();
00142
00143         //print menu screen
00144         print_menu();
00145
00146         Buffer_Init();
00147
00148         /* Pin configuration:
00149          * Assign:      - P0.4 as I2SRX_CLK
00150          *                      - P0.5 as I2SRX_WS
00151          *                      - P0.6 as I2SRX_SDA
00152          *                      - P0.7 as I2STX_CLK
00153          *                      - P0.8 as I2STX_WS
00154          *                      - P0.9 as I2STX_SDA
00155          */
00156         PinCfg.Funcnum = 1;
00157         PinCfg.OpenDrain = 0;
00158         PinCfg.Pinmode = 0;
00159         PinCfg.Pinnum = 4;
00160         PinCfg.Portnum = 0;
00161         PINSEL_ConfigPin(&PinCfg);
00162         PinCfg.Pinnum = 5;
00163         PINSEL_ConfigPin(&PinCfg);
00164         PinCfg.Pinnum = 6;
00165         PINSEL_ConfigPin(&PinCfg);
00166         PinCfg.Pinnum = 7;
00167         PINSEL_ConfigPin(&PinCfg);
00168         PinCfg.Pinnum = 8;
00169         PINSEL_ConfigPin(&PinCfg);
00170         PinCfg.Pinnum = 9;
00171         PINSEL_ConfigPin(&PinCfg);
00172
00173         I2S_Init(LPC_I2S);
00174
00175         //Setup for I2S: RX is similar with TX
00176         /* setup:
00177          *              - wordwidth: 16 bits
00178          *              - stereo mode
00179          *              - master mode for I2S_TX and slave for I2S_RX
00180          *              - ws_halfperiod is 31
00181          *              - not use mute mode
00182          *              - use reset and stop mode
00183          *              - select the fractional rate divider clock output as the source,
00184          *              - disable 4-pin mode
00185          *              - MCLK ouput is disable
00186          *              - Frequency = 44.1 kHz (x=8,y=51 - automatic setting)
00187          * Because we use mode I2STXMODE[3:0]= 0000, I2SDAO[5]=0 and
00188          * I2SRX[3:0]=0000, I2SDAI[5] = 1. So we have I2SRX_CLK = I2STX_CLK
00189          * --> I2SRXBITRATE = 1 (not divide TXCLK to produce RXCLK)
00190          */
00191
00192         /* Audio Config*/
00193         I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
00194         I2S_ConfigStruct.mono = I2S_STEREO;
00195         I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
00196         I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
00197         I2S_ConfigStruct.ws_sel = I2S_MASTER_MODE;
00198         I2S_ConfigStruct.mute = I2S_MUTE_DISABLE;
00199         I2S_Config(LPC_I2S,I2S_TX_MODE,&I2S_ConfigStruct);
00200
00201         I2S_ConfigStruct.ws_sel = I2S_SLAVE_MODE;
00202         I2S_Config(LPC_I2S,I2S_RX_MODE,&I2S_ConfigStruct);
00203
00204         /* Clock Mode Config*/
00205         I2S_ClkConfig.clksel = I2S_CLKSEL_FRDCLK;
00206         I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
00207         I2S_ClkConfig.mcena = I2S_MCLK_DISABLE;
00208         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_TX_MODE);
00209         I2S_ClkConfig.fpin = I2S_4PIN_ENABLE;
00210         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_RX_MODE);
00211
00212         /* Set up frequency and bit rate*/
00213         I2S_FreqConfig(LPC_I2S, 44100, I2S_TX_MODE);
00214
00215          I2S_Start(LPC_I2S);
00216          while(I2STXDone == 0||I2SRXDone == 0){
00217            if(I2STXDone ==0){
00218                          while (I2S_GetLevel(LPC_I2S,I2S_TX_MODE)!=0x00);
00219                          I2S_Send(LPC_I2S,I2STXBuffer[I2SWriteLength]);
00220                          I2SWriteLength +=1;
00221                          if(I2SWriteLength == BUFFER_SIZE) I2STXDone = 1;
00222
00223                 }
00224                 if(I2SRXDone == 0)
00225                 {
00226                         while(I2S_GetLevel(LPC_I2S,I2S_RX_MODE)==0x00);
00227                         if(dummy == 0) //dummy receive
00228                         {
00229                                 i = I2S_Receive(LPC_I2S);
00230                                         dummy = 1;
00231                         }
00232                         else
00233                         {
00234                                 *(uint32_t *)(&I2SRXBuffer[I2SReadLength]) = I2S_Receive(LPC_I2S);
00235                                 I2SReadLength +=1;
00236                         }
00237                         if(I2SReadLength == BUFFER_SIZE) I2SRXDone = 1;
00238                 }
00239          }
00240          for(i=0;i<BUFFER_SIZE;i++)
00241          {
00242                  _DBH32(I2SRXBuffer[i]);_DBG_("");
00243          }
00244          if(Buffer_Verify())
00245          {
00246                  _DBG_("Verify Buffer: OK...");
00247          }
00248          else
00249          {
00250                  _DBG_("Verify Buffer: ERROR...");
00251          }
00252          while(1);
00253 }
00254
00255 /* With ARM and GHS toolsets, the entry point is main() - this will
00256    allow the linker to generate wrapper code to setup stacks, allocate
00257    heap area, and initialize and copy code and data segments. For GNU
00258    toolsets, the entry point is through __start() in the crt0_gnu.asm
00259    file, and that startup code will setup stacks and data */
00260 int main(void)
00261 {
00262     return c_entry();
00263 }
00264
00265 #ifdef  DEBUG
00266 /*******************************************************************************
00267 * @brief                Reports the name of the source file and the source line number
00268 *                               where the CHECK_PARAM error has occurred.
00269 * @param[in]    file Pointer to the source file name
00270 * @param[in]    line assert_param error line source number
00271 * @return               None
00272 *******************************************************************************/
00273 void check_failed(uint8_t *file, uint32_t line)
00274 {
00275         /* User can add his own implementation to report the file name and line number,
00276          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00277
00278         /* Infinite loop */
00279         while(1);
00280 }
00281 #endif
00282
00283 /*
00284  * @}
00285  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_two_kit/i2s_two_kit.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2S/I2S_two_kit/i2s_two_kit.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          i2s_two_kit.c                           2010-05-21
00003 */
00026 #include "lpc17xx_i2s.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINITIONS *************************/
00039 #define I2S_TRANSMIT                    0
00040 #define I2S_RECEIVE                             !I2S_TRANSMIT
00041
00042
00043 /************************** PRIVATE VARIABLE ***********************/
00044 uint8_t menu[]=
00045         "********************************************************************************\n\r"
00046         "Hello NXP Semiconductors \n\r"
00047         " I2S polling mode demo \n\r"
00048         "\t - MCU: LPC17xx \n\r"
00049         "\t - Core: ARM CORTEX-M3 \n\r"
00050         "\t - Communicate via: UART0 - 115200 bps \n\r"
00051         " Use two I2S channels on 2 board to transfer data \n\r"
00052         "********************************************************************************\n\r";
00053 uint8_t tx_depth_irq = 0;
00054 uint8_t rx_depth_irq = 0;
00055 uint32_t data;
00056
00057 /************************** PRIVATE FUNCTIONS *************************/
00058 /* Interrupt service routine */
00059 void I2S_IRQHandler(void);
00060
00061 void print_menu(void);
00062
00063 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00064 /*********************************************************************/
00069 void I2S_IRQHandler()
00070 {
00071         uint8_t rx_level,
00072                         tx_level,
00073                         tx_depth_irq,
00074                         rx_depth_irq;
00075         uint32_t data;
00076         uint8_t i;
00077
00078         if(I2S_GetIRQStatus(LPC_I2S, I2S_RX_MODE)){ //receive interrupt
00079                 rx_level = I2S_GetLevel(LPC_I2S, I2S_RX_MODE);
00080                 rx_depth_irq = I2S_GetIRQDepth(LPC_I2S, I2S_RX_MODE);
00081
00082                 if (rx_level >= rx_depth_irq)//receive interrupt
00083                 {
00084                         while(I2S_GetLevel(LPC_I2S, I2S_RX_MODE)>0)
00085                         {
00086                                 data = I2S_Receive(LPC_I2S);
00087                                 _DBH32(data); _DBG_("");
00088                         }
00089                 }
00090         }
00091         else if (I2S_GetIRQStatus(LPC_I2S, I2S_TX_MODE))
00092         {
00093                 tx_level = I2S_GetLevel(LPC_I2S, I2S_TX_MODE);
00094                 tx_depth_irq = I2S_GetIRQDepth(LPC_I2S, I2S_TX_MODE);
00095                 if(tx_level <= tx_depth_irq)//transmit interrupt
00096                 {
00097                         for(i=0;i<4;i++)
00098                         {
00099                                 I2S_Send(LPC_I2S,data);
00100                                 _DBH32(data);
00101                                 _DBG_(" Send successful!!!");
00102                                 data++;
00103                                 if(data == 0xFFFFFFFF) data  = 0;
00104                         }
00105                 }
00106         }
00107 }
00108
00109 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00110 /*********************************************************************/
00115 void print_menu()
00116 {
00117         _DBG_(menu);
00118 }
00119
00120
00121 /*-------------------------MAIN FUNCTION------------------------------*/
00122 /*********************************************************************/
00127 int c_entry (void) {
00128         I2S_MODEConf_Type I2S_ClkConfig;
00129         I2S_CFG_Type I2S_ConfigStruct;
00130         PINSEL_CFG_Type PinCfg;
00131
00132         /* Initialize debug via UART0
00133          * – 115200bps
00134          * – 8 data bit
00135          * – No parity
00136          * – 1 stop bit
00137          * – No flow control
00138          */
00139         debug_frmwrk_init();
00140
00141         //print menu screen
00142         print_menu();
00143
00144         NVIC_EnableIRQ(I2S_IRQn);
00145         //Setup for I2S: RX is similar with TX
00146         /* setup:
00147          *              - wordwidth: 16 bits
00148          *              - stereo mode
00149          *              - master mode for I2S_TX and slave for I2S_RX
00150          *              - ws_halfperiod is 31
00151          *              - not use mute mode
00152          *              - use reset and stop mode
00153          *              - select the fractional rate divider clock output as the source,
00154          *              - disable 4-pin mode
00155          *              - MCLK ouput is disable
00156          *              - Frequency = 44.1 kHz (x=8,y=51 - automatic setting)
00157          * Because we use mode I2STXMODE[3:0]= 0000, I2SDAO[5]=0 and
00158          * I2SRX[3:0]=0000, I2SDAI[5] = 1. So we have I2SRX_CLK = I2STX_CLK
00159          * --> I2SRXBITRATE = 1 (not divide TXCLK to produce RXCLK)
00160          */
00161
00162 #if I2S_TRANSMIT
00163         /* Pin configuration for I2S Transmitter:
00164          * Assign:      - P0.7 as I2STX_CLK
00165          *                      - P0.8 as I2STX_WS
00166          *                      - P0.9 as I2STX_SDA
00167          */
00168         PinCfg.Funcnum = 1;
00169         PinCfg.OpenDrain = 0;
00170         PinCfg.Pinmode = 0;
00171         PinCfg.Pinnum = 7;
00172         PinCfg.Portnum = 0;
00173         PINSEL_ConfigPin(&PinCfg);
00174         PinCfg.Pinnum = 8;
00175         PINSEL_ConfigPin(&PinCfg);
00176         PinCfg.Pinnum = 9;
00177         PINSEL_ConfigPin(&PinCfg);
00178
00179         I2S_Init(LPC_I2S);
00180
00181         /* Audio Config*/
00182         I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
00183         I2S_ConfigStruct.mono = I2S_STEREO;
00184         I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
00185         I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
00186         I2S_ConfigStruct.ws_sel = I2S_SLAVE_MODE;
00187         I2S_ConfigStruct.mute = I2S_MUTE_ENABLE;
00188         I2S_Config(LPC_I2S,I2S_TX_MODE,&I2S_ConfigStruct);
00189
00190         /* Clock Mode Config*/
00191         I2S_ClkConfig.clksel = I2S_CLKSEL_FRDCLK;
00192         I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
00193         I2S_ClkConfig.mcena = I2S_MCLK_DISABLE;
00194         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_TX_MODE);
00195
00196         LPC_I2S->I2STXRATE = 0x00;
00197         LPC_I2S->I2STXBITRATE = 0x00;
00198         I2S_SetBitRate(LPC_I2S, 0, I2S_TX_MODE);
00199
00200         I2S_Start(LPC_I2S);
00201         I2S_IRQConfig(LPC_I2S,I2S_TX_MODE,4);
00202         I2S_IRQCmd(LPC_I2S,I2S_TX_MODE,ENABLE);
00203
00204 #else
00205         /* Pin configuration for I2S Receiver:
00206          * Assign:      - P0.4 as I2SRX_CLK
00207          *                      - P0.5 as I2SRX_WS
00208          *                      - P0.6 as I2SRX_SDA
00209          */
00210         PinCfg.Funcnum = 1;
00211         PinCfg.OpenDrain = 0;
00212         PinCfg.Pinmode = 0;
00213         PinCfg.Pinnum = 4;
00214         PinCfg.Portnum = 0;
00215         PINSEL_ConfigPin(&PinCfg);
00216         PinCfg.Pinnum = 5;
00217         PINSEL_ConfigPin(&PinCfg);
00218         PinCfg.Pinnum = 6;
00219         PINSEL_ConfigPin(&PinCfg);
00220
00221         I2S_Init(LPC_I2S);
00222
00223         I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
00224         I2S_ConfigStruct.mono = I2S_STEREO;
00225         I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
00226         I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
00227         I2S_ConfigStruct.ws_sel = I2S_MASTER_MODE;
00228         I2S_ConfigStruct.mute = I2S_MUTE_DISABLE;
00229         I2S_Config(LPC_I2S,I2S_RX_MODE,&I2S_ConfigStruct);
00230
00231         /* Clock Mode Config*/
00232         I2S_ClkConfig.clksel = I2S_CLKSEL_FRDCLK;
00233         I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
00234         I2S_ClkConfig.mcena = I2S_MCLK_DISABLE;
00235         I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_RX_MODE);
00236
00237         /* Set up frequency and bit rate*/
00238         I2S_FreqConfig(LPC_I2S, 44100, I2S_RX_MODE);
00239         I2S_IRQConfig(LPC_I2S,I2S_RX_MODE,4);
00240         I2S_IRQCmd(LPC_I2S,I2S_RX_MODE,ENABLE);
00241
00242         _DBG_("Press '1' to start I2S operation...");
00243         while(_DG !='1');
00244         I2S_Start(LPC_I2S);
00245         _DBG_("I2S Start ...");
00246 #endif
00247         while(1);
00248 }
00249
00250 /* With ARM and GHS toolsets, the entry point is main() - this will
00251    allow the linker to generate wrapper code to setup stacks, allocate
00252    heap area, and initialize and copy code and data segments. For GNU
00253    toolsets, the entry point is through __start() in the crt0_gnu.asm
00254    file, and that startup code will setup stacks and data */
00255 int main(void)
00256 {
00257     return c_entry();
00258 }
00259
00260 #ifdef  DEBUG
00261 /*******************************************************************************
00262 * @brief                Reports the name of the source file and the source line number
00263 *                               where the CHECK_PARAM error has occurred.
00264 * @param[in]    file Pointer to the source file name
00265 * @param[in]    line assert_param error line source number
00266 * @return               None
00267 *******************************************************************************/
00268 void check_failed(uint8_t *file, uint32_t line)
00269 {
00270         /* User can add his own implementation to report the file name and line number,
00271          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00272
00273         /* Infinite loop */
00274         while(1);
00275 }
00276 #endif
00277
00278 /*
00279  * @}
00280  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc-addrlabels.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc-addrlabels.h
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004-2005, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: lc-addrlabels.h,v 1.3 2006/06/12 08:00:30 adam Exp $
00034  */
00035
00060 #ifndef __LC_ADDRLABELS_H__
00061 #define __LC_ADDRLABELS_H__
00062
00064 typedef void * lc_t;
00065
00066 #define LC_INIT(s) s = NULL
00067
00068
00069 #define LC_RESUME(s)                            \
00070   do {                                          \
00071     if(s != NULL) {                             \
00072       goto *s;                                  \
00073     }                                           \
00074   } while(0)
00075
00076 #define LC_SET(s)                               \
00077   do { ({ __label__ resume; resume: (s) = &&resume; }); }while(0)
00078
00079 #define LC_END(s)
00080
00081 #endif /* __LC_ADDRLABELS_H__ */
00082
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc-switch.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc-switch.h
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004-2005, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: lc-switch.h,v 1.2 2006/06/12 08:00:30 adam Exp $
00034  */
00035
00057 #ifndef __LC_SWITCH_H__
00058 #define __LC_SWTICH_H__
00059
00060 /* WARNING! lc implementation using switch() does not work if an
00061    LC_SET() is done within another switch() statement! */
00062
00064 typedef unsigned short lc_t;
00065
00066 #define LC_INIT(s) s = 0;
00067
00068 #define LC_RESUME(s) switch(s) { case 0:
00069
00070 #define LC_SET(s) s = __LINE__; case __LINE__:
00071
00072 #define LC_END(s) }
00073
00074 #endif /* __LC_SWITCH_H__ */
00075
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/lc.h
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004-2005, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: lc.h,v 1.2 2006/06/12 08:00:30 adam Exp $
00034  */
00035
00066 #ifdef DOXYGEN
00067
00075 #define LC_INIT(lc)
00076
00088 #define LC_SET(lc)
00089
00100 #define LC_RESUME(lc)
00101
00112 #define LC_END(lc)
00113
00121 #endif /* DOXYGEN */
00122
00123 #ifndef __LC_H__
00124 #define __LC_H__
00125
00126 #ifdef LC_CONF_INCLUDE
00127 #include LC_CONF_INCLUDE
00128 #else
00129 #include "lc-switch.h"
00130 #endif /* LC_CONF_INCLUDE */
00131
00132 #endif /* __LC_H__ */
00133
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/libnosys_gnu.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/EmacRaw/libnosys_gnu.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          libnosys_gnu.c                                  2008-12-01
00003 */
00026 #if defined(__GNUC__)
00027
00028 #include "lpc_types.h"
00029 #include <errno.h>
00030 #include <sys/times.h>
00031 #include <sys/stat.h>
00032
00033 /* errno definition */
00034 #undef errno
00035 extern int errno;
00036
00037 char *__env[1] = { 0 };
00038 char **environ = __env;
00039
00040 int _close(int file)
00041 {
00042   return -1;
00043 }
00044
00045 int _execve(char *name, char **argv, char **env)
00046 {
00047   errno = ENOMEM;
00048   return -1;
00049 }
00050 int _exit()
00051 {
00052   return 0;
00053 }
00054
00055 int _fork()
00056 {
00057   errno = EAGAIN;
00058   return -1;
00059 }
00060
00061 int _fstat(int file, struct stat *st)
00062 {
00063   st->st_mode = S_IFCHR;
00064   return 0;
00065 }
00066
00067 int _getpid()
00068 {
00069   return 1;
00070 }
00071
00072 int _kill(int pid, int sig)
00073 {
00074   errno = EINVAL;
00075   return(-1);
00076 }
00077
00078 int isatty(int fildes)
00079 {
00080   return 1;
00081 }
00082 int _isatty(int fildes)
00083 {
00084   return 1;
00085 }
00086
00087 int _link(char *old, char *new)
00088 {
00089   errno = EMLINK;
00090   return -1;
00091 }
00092
00093 int _lseek(int file, int ptr, int dir)
00094 {
00095   return 0;
00096 }
00097
00098 int _open(const char *name, int flags, int mode)
00099 {
00100   return -1;
00101 }
00102
00103 int _read(int file, char *ptr, int len)
00104 {
00105   return 0;
00106 }
00107
00108 caddr_t _sbrk(int incr)
00109 {
00110   extern char estack;           /* Defined by the linker */
00111   static char *heap_end;
00112   char *prev_heap_end;
00113
00114   if (heap_end == 0)
00115   {
00116     heap_end = &estack;
00117     /* give 16KB area for stacks and use the rest of memory for heap*/
00118     heap_end += 0x4000;
00119   }
00120   prev_heap_end = heap_end;
00121
00122   heap_end += incr;
00123   return (caddr_t) prev_heap_end;
00124 }
00125
00126 int _stat(char *file, struct stat *st)
00127 {
00128   st->st_mode = S_IFCHR;
00129   return 0;
00130 }
00131 int _times(struct tms *buf)
00132 {
00133   return -1;
00134 }
00135
00136 int _unlink(char *name)
00137 {
00138   errno = ENOENT;
00139   return -1;
00140 }
00141
00142 int _wait(int *status)
00143 {
00144   errno = ECHILD;
00145   return -1;
00146 }
00147
00148 int _write(int file, char *ptr, int len)
00149 {
00150   return 0;
00151 }
00152
00153 #endif /*__GNUC__*/
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Link_list/link_list.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/GPDMA/Link_list/link_list.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          link_list.c                             2010-06-16
00003 */
00025 #include "lpc17xx_gpdma.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "debug_frmwrk.h"
00028
00029 /* Example group ----------------------------------------------------------- */
00035 /************************** PRIVATE DEFINTIONS*************************/
00037 #define DMA_SIZE                32
00038
00039 /************************** PRIVATE VARIABLES *************************/
00040 uint8_t menu[]=
00041         "********************************************************************************\n\r"
00042         "Hello NXP Semiconductors \n\r"
00043         "GPDMA demo \n\r"
00044         "\t - MCU: LPC17xx \n\r"
00045         "\t - Core: ARM CORTEX-M3 \n\r"
00046         "\t - Communicate via: UART0 - 115200 bps \n\r"
00047         "This example used to test GPDMA link list function \n\r"
00048         "********************************************************************************\n\r";
00049 uint8_t menu2[] = "Demo terminated! \n\r";
00050 uint8_t err_menu[] = "Buffer Check fail!\n\r";
00051 uint8_t compl_menu[] = "Buffer Check success!\n\r";
00052
00053 uint32_t DMADest_Buffer[DMA_SIZE];
00054
00055 #if (defined (__ICCARM__))
00056 #pragma location = "data_init"
00057 uint32_t const DMASrc_Buffer1[DMA_SIZE/2] =
00058 #else
00059 uint32_t DMASrc_Buffer1[DMA_SIZE/2] __attribute__((at(0x2007C000))) =
00060 #endif
00061 {
00062         0x01020304,0x05060708,0x090A0B0C,0x0D0E0F10,
00063         0x11121314,0x15161718,0x191A1B1C,0x1D1E1F20,
00064         0x21222324,0x25262728,0x292A2B2C,0x2D2E2F30,
00065         0x31323334,0x35363738,0x393A3B3C,0x3D3E3F40
00066 };
00067
00068 // Terminal Counter flag for Channel 0
00069 __IO uint32_t Channel0_TC;
00070
00071 // Error Counter flag for Channel 0
00072 __IO uint32_t Channel0_Err;
00073
00074 #if (defined (__ICCARM__))
00075 #pragma location = "data_init"
00076 uint32_t const DMASrc_Buffer2[DMA_SIZE/2] =
00077 #else
00078 uint32_t DMASrc_Buffer2[DMA_SIZE/2] __attribute__((at(0x2007C200)))=
00079 #endif
00080 {
00081         0x41424344,0x45464748,0x494A4B4C,0x4D4E4F50,
00082         0x51525354,0x55565758,0x595A5B5C,0x5D5E5F60,
00083         0x61626364,0x65666768,0x696A6B6C,0x6D6E6F70,
00084         0x71727374,0x75767778,0x797A7B7C,0x7D7E7F80
00085 };
00086
00087 /*-------------------------MAIN FUNCTION------------------------------*/
00088 void DMA_IRQHandler (void);
00089
00090 void print_menu(void);
00091 void Error_Loop(void);
00092
00093 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00094 /*********************************************************************/
00099 void DMA_IRQHandler (void)
00100 {
00101         // check GPDMA interrupt on channel 0
00102         if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 0)){ //check interrupt status on channel 0
00103                 // Check counter terminal status
00104                 if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 0)){
00105                         // Clear terminate counter Interrupt pending
00106                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 0);
00107                                 Channel0_TC++;
00108                 }
00109                 if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, 0)){
00110                         // Clear error counter Interrupt pending
00111                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 0);
00112                         Channel0_Err++;
00113                 }
00114         }
00115 }
00116
00117 /*-------------------------PRIVATE FUNCTIONS-----------------------------*/
00118 /*********************************************************************/
00123 void print_menu(void)
00124 {
00125         _DBG(menu);
00126 }
00127
00128
00129 /*********************************************************************/
00134 void Buffer_Verify(void)
00135 {
00136         uint8_t i;
00137         uint32_t *src_addr = (uint32_t *)DMASrc_Buffer1;
00138         uint32_t *dest_addr = (uint32_t *)DMADest_Buffer;
00139
00140         for ( i = 0; i < DMA_SIZE/2; i++ )
00141         {
00142                 if ( *src_addr++ != *dest_addr++ )
00143                 {
00144                         /* Call Error Loop */
00145                         Error_Loop();
00146                 }
00147         }
00148         src_addr = (uint32_t *)DMASrc_Buffer2;
00149         for ( i = 0; i < DMA_SIZE/2; i++ )
00150         {
00151                 if ( *src_addr++ != *dest_addr++ )
00152                 {
00153                         /* Call Error Loop */
00154                         Error_Loop();
00155                 }
00156         }
00157 }
00158
00159
00160 /*********************************************************************/
00165 void Error_Loop(void)
00166 {
00167         _DBG(err_menu);
00168
00169         /* Loop forever */
00170         while (1);
00171 }
00172
00173
00174 /*-------------------------MAIN FUNCTION--------------------------------*/
00175 /*********************************************************************/
00180 int c_entry(void)
00181 {
00182         GPDMA_Channel_CFG_Type GPDMACfg;
00183         GPDMA_LLI_Type DMA_LLI_Struct[2];
00184
00185         /* Initialize debug via UART0
00186          * – 115200bps
00187          * – 8 data bit
00188          * – No parity
00189          * – 1 stop bit
00190          * – No flow control
00191          */
00192         debug_frmwrk_init();
00193
00194         // print welcome screen
00195         print_menu();
00196
00197         /* GPDMA block section -------------------------------------------- */
00198     /* Disable GPDMA interrupt */
00199     NVIC_DisableIRQ(DMA_IRQn);
00200     /* preemption = 1, sub-priority = 1 */
00201     NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
00202
00203     /* Initialize GPDMA controller */
00204         GPDMA_Init();
00205
00206         /* Init GPDMA link list */
00207         DMA_LLI_Struct[0].SrcAddr = (uint32_t)&DMASrc_Buffer1;
00208         DMA_LLI_Struct[0].DstAddr = (uint32_t)&DMADest_Buffer;
00209         DMA_LLI_Struct[0].NextLLI = (uint32_t)&DMA_LLI_Struct[1];
00210         DMA_LLI_Struct[0].Control = (DMA_SIZE/2)
00211                                                                 | (2<<18) //source width 32 bit
00212                                                                 | (2<<21) //dest. width 32 bit
00213                                                                 | (1<<26) //source increment
00214                                                                 | (1<<27)
00215                                                                 ;
00216         DMA_LLI_Struct[1].SrcAddr = (uint32_t)&DMASrc_Buffer2;
00217         DMA_LLI_Struct[1].DstAddr = ((uint32_t)&DMADest_Buffer) + (DMA_SIZE/2)*4;
00218         DMA_LLI_Struct[1].NextLLI = 0;
00219         DMA_LLI_Struct[1].Control = (DMA_SIZE/2)
00220                                                                 | (2<<18) //source width 32 bit
00221                                                                 | (2<<21) //dest. width 32 bit
00222                                                                 | (1<<26) //source increment
00223                                                                 | (1<<27)
00224                                                                 ;
00225
00226         // Setup GPDMA channel --------------------------------
00227         // channel 0
00228         GPDMACfg.ChannelNum = 0;
00229         // Source memory
00230         GPDMACfg.SrcMemAddr = (uint32_t)DMASrc_Buffer1;
00231         // Destination memory
00232         GPDMACfg.DstMemAddr = (uint32_t)DMADest_Buffer;
00233         // Transfer size
00234         GPDMACfg.TransferSize = DMA_SIZE;
00235         // Transfer width
00236         GPDMACfg.TransferWidth = GPDMA_WIDTH_WORD;
00237         // Transfer type
00238         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2M;
00239         // Source connection - unused
00240         GPDMACfg.SrcConn = 0;
00241         // Destination connection - unused
00242         GPDMACfg.DstConn = 0;
00243         // Linker List Item
00244         GPDMACfg.DMALLI = (uint32_t)&DMA_LLI_Struct[0];
00245         // Setup channel with given parameter
00246         GPDMA_Setup(&GPDMACfg);
00247
00248         /* Reset terminal counter */
00249         Channel0_TC = 0;
00250         /* Reset Error counter */
00251         Channel0_Err = 0;
00252
00253         _DBG_("Start transfer...");
00254
00255         // Enable GPDMA channel 0
00256         GPDMA_ChannelCmd(0, ENABLE);
00257
00258         /* Enable GPDMA interrupt */
00259         NVIC_EnableIRQ(DMA_IRQn);
00260
00261         /* Wait for GPDMA processing complete */
00262         while ((Channel0_TC == 0) && (Channel0_Err == 0));
00263
00264         /* Verify buffer */
00265         Buffer_Verify();
00266
00267         _DBG(compl_menu);
00268
00269     /* Loop forever */
00270     while(1);
00271 }
00272
00273 /* With ARM and GHS toolsets, the entry point is main() - this will
00274  allow the linker to generate wrapper code to setup stacks, allocate
00275  heap area, and initialize and copy code and data segments. For GNU
00276  toolsets, the entry point is through __start() in the crt0_gnu.asm
00277  file, and that startup code will setup stacks and data */
00278 int main(void) {
00279         return c_entry();
00280 }
00281
00282 #ifdef  DEBUG
00283 /*******************************************************************************
00284  * @brief               Reports the name of the source file and the source line number
00285  *                              where the CHECK_PARAM error has occurred.
00286  * @param[in]   file Pointer to the source file name
00287  * @param[in]    line assert_param error line source number
00288  * @return              None
00289  *******************************************************************************/
00290 void check_failed(uint8_t *file, uint32_t line) {
00291         /* User can add his own implementation to report the file name and line number,
00292          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00293
00294         /* Infinite loop */
00295         while (1)
00296                 ;
00297 }
00298 #endif
00299
00300 /*
00301  * @}
00302  */
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_adc.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_adc.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_adc.c                           2010-06-18
00003 */
00026 /* Peripheral group ----------------------------------------------------------- */
00031 /* Includes ------------------------------------------------------------------- */
00032 #include "lpc17xx_adc.h"
00033 #include "lpc17xx_clkpwr.h"
00034
00035 /* If this source file built with example, the LPC17xx FW library configuration
00036  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00037  * otherwise the default FW library configuration file must be included instead
00038  */
00039 #ifdef __BUILD_WITH_EXAMPLE__
00040 #include "lpc17xx_libcfg.h"
00041 #else
00042 #include "lpc17xx_libcfg_default.h"
00043 #endif /* __BUILD_WITH_EXAMPLE__ */
00044
00045
00046 #ifdef _ADC
00047
00048 /* Public Functions ----------------------------------------------------------- */
00053 /*********************************************************************/
00062 void ADC_Init(LPC_ADC_TypeDef *ADCx, uint32_t rate)
00063 {
00064         uint32_t ADCPClk, temp, tmp;
00065
00066         CHECK_PARAM(PARAM_ADCx(ADCx));
00067         CHECK_PARAM(PARAM_ADC_RATE(rate));
00068
00069         // Turn on power and clock
00070         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCAD, ENABLE);
00071
00072         ADCx->ADCR = 0;
00073
00074         //Enable PDN bit
00075         tmp = ADC_CR_PDN;
00076         // Set clock frequency
00077         ADCPClk = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_ADC);
00078         /* The APB clock (PCLK_ADC0) is divided by (CLKDIV+1) to produce the clock for
00079          * A/D converter, which should be less than or equal to 13MHz.
00080          * A fully conversion requires 65 of these clocks.
00081          * ADC clock = PCLK_ADC0 / (CLKDIV + 1);
00082          * ADC rate = ADC clock / 65;
00083          */
00084         temp = rate * 65;
00085         temp = (ADCPClk * 2 + temp)/(2 * temp) - 1; //get the round value by fomular: (2*A + B)/(2*B)
00086         tmp |=  ADC_CR_CLKDIV(temp);
00087
00088         ADCx->ADCR = tmp;
00089 }
00090
00091
00092 /*********************************************************************/
00097 void ADC_DeInit(LPC_ADC_TypeDef *ADCx)
00098 {
00099         CHECK_PARAM(PARAM_ADCx(ADCx));
00100
00101         // Clear PDN bit
00102         ADCx->ADCR &= ~ADC_CR_PDN;
00103         // Turn on power and clock
00104         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCAD, DISABLE);
00105 }
00106
00107
00108 /*********************************************************************/
00113 uint32_t ADC_GetData(uint32_t channel)
00114 {
00115         uint32_t adc_value;
00116
00117         CHECK_PARAM(PARAM_ADC_CHANNEL_SELECTION(channel));
00118
00119         adc_value = *(uint32_t *)((&LPC_ADC->ADDR0) + channel);
00120         return ADC_GDR_RESULT(adc_value);
00121 }
00122
00123 /*********************************************************************/
00138 void ADC_StartCmd(LPC_ADC_TypeDef *ADCx, uint8_t start_mode)
00139 {
00140         CHECK_PARAM(PARAM_ADCx(ADCx));
00141         CHECK_PARAM(PARAM_ADC_START_OPT(start_mode));
00142
00143         ADCx->ADCR &= ~ADC_CR_START_MASK;
00144         ADCx->ADCR |=ADC_CR_START_MODE_SEL((uint32_t)start_mode);
00145 }
00146
00147
00148 /*********************************************************************/
00156 void ADC_BurstCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState)
00157 {
00158         CHECK_PARAM(PARAM_ADCx(ADCx));
00159
00160         ADCx->ADCR &= ~ADC_CR_BURST;
00161         if (NewState){
00162                 ADCx->ADCR |= ADC_CR_BURST;
00163         }
00164 }
00165
00166 /*********************************************************************/
00174 void ADC_PowerdownCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState)
00175 {
00176         CHECK_PARAM(PARAM_ADCx(ADCx));
00177
00178         ADCx->ADCR &= ~ADC_CR_PDN;
00179         if (NewState){
00180                 ADCx->ADCR |= ADC_CR_PDN;
00181         }
00182 }
00183
00184 /*********************************************************************/
00192 void ADC_EdgeStartConfig(LPC_ADC_TypeDef *ADCx, uint8_t EdgeOption)
00193 {
00194         CHECK_PARAM(PARAM_ADCx(ADCx));
00195         CHECK_PARAM(PARAM_ADC_START_ON_EDGE_OPT(EdgeOption));
00196
00197         ADCx->ADCR &= ~ADC_CR_EDGE;
00198         if (EdgeOption){
00199                 ADCx->ADCR |= ADC_CR_EDGE;
00200         }
00201 }
00202
00203 /*********************************************************************/
00217 void ADC_IntConfig (LPC_ADC_TypeDef *ADCx, ADC_TYPE_INT_OPT IntType, FunctionalState NewState)
00218 {
00219         CHECK_PARAM(PARAM_ADCx(ADCx));
00220         CHECK_PARAM(PARAM_ADC_TYPE_INT_OPT(IntType));
00221
00222         ADCx->ADINTEN &= ~ADC_INTEN_CH(IntType);
00223         if (NewState){
00224                 ADCx->ADINTEN |= ADC_INTEN_CH(IntType);
00225         }
00226 }
00227
00228 /*********************************************************************/
00236 void ADC_ChannelCmd (LPC_ADC_TypeDef *ADCx, uint8_t Channel, FunctionalState NewState)
00237 {
00238         CHECK_PARAM(PARAM_ADCx(ADCx));
00239         CHECK_PARAM(PARAM_ADC_CHANNEL_SELECTION(Channel));
00240
00241         if (NewState == ENABLE) {
00242                 ADCx->ADCR |= ADC_CR_CH_SEL(Channel);
00243         } else {
00244                 ADCx->ADCR &= ~ADC_CR_CH_SEL(Channel);
00245         }
00246 }
00247
00248 /*********************************************************************/
00254 uint16_t ADC_ChannelGetData(LPC_ADC_TypeDef *ADCx, uint8_t channel)
00255 {
00256         uint32_t adc_value;
00257
00258         CHECK_PARAM(PARAM_ADCx(ADCx));
00259         CHECK_PARAM(PARAM_ADC_CHANNEL_SELECTION(channel));
00260
00261         adc_value = *(uint32_t *) ((&ADCx->ADDR0) + channel);
00262         return ADC_DR_RESULT(adc_value);
00263 }
00264
00265 /*********************************************************************/
00274 FlagStatus ADC_ChannelGetStatus(LPC_ADC_TypeDef *ADCx, uint8_t channel, uint32_t StatusType)
00275 {
00276         uint32_t temp;
00277
00278         CHECK_PARAM(PARAM_ADCx(ADCx));
00279         CHECK_PARAM(PARAM_ADC_CHANNEL_SELECTION(channel));
00280         CHECK_PARAM(PARAM_ADC_DATA_STATUS(StatusType));
00281
00282         temp =  *(uint32_t *) ((&ADCx->ADDR0) + channel);
00283         if (StatusType) {
00284                 temp &= ADC_DR_DONE_FLAG;
00285         }else{
00286                 temp &= ADC_DR_OVERRUN_FLAG;
00287         }
00288         if (temp) {
00289                 return SET;
00290         } else {
00291                 return RESET;
00292         }
00293
00294 }
00295
00296 /*********************************************************************/
00301 uint32_t ADC_GlobalGetData(LPC_ADC_TypeDef *ADCx)
00302 {
00303         CHECK_PARAM(PARAM_ADCx(ADCx));
00304
00305         return ((uint32_t)(ADCx->ADGDR));
00306 }
00307
00308 /*********************************************************************/
00316 FlagStatus      ADC_GlobalGetStatus(LPC_ADC_TypeDef *ADCx, uint32_t StatusType)
00317 {
00318         uint32_t temp;
00319
00320         CHECK_PARAM(PARAM_ADCx(ADCx));
00321         CHECK_PARAM(PARAM_ADC_DATA_STATUS(StatusType));
00322
00323         temp =  ADCx->ADGDR;
00324         if (StatusType){
00325                 temp &= ADC_DR_DONE_FLAG;
00326         }else{
00327                 temp &= ADC_DR_OVERRUN_FLAG;
00328         }
00329         if (temp){
00330                 return SET;
00331         }else{
00332                 return RESET;
00333         }
00334 }
00335
00340 #endif /* _ADC */
00341
00346 /* --------------------------------- End Of File ------------------------------ */
00347
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_adc.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_adc.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_adc.h                   2008-07-27
00003 */
00029 /* Peripheral group ----------------------------------------------------------- */
00035 #ifndef LPC17XX_ADC_H_
00036 #define LPC17XX_ADC_H_
00037
00038 /* Includes ------------------------------------------------------------------- */
00039 #include "LPC17xx.h"
00040 #include "lpc_types.h"
00041
00042
00043 #ifdef __cplusplus
00044 extern "C"
00045 {
00046 #endif
00047
00048 /* Private macros ------------------------------------------------------------- */
00053 /* -------------------------- BIT DEFINITIONS ----------------------------------- */
00054 /*********************************************************************/
00058 #define ADC_CR_CH_SEL(n)        ((1UL << n))
00059
00061 #define ADC_CR_CLKDIV(n)        ((n<<8))
00062
00063 #define ADC_CR_BURST            ((1UL<<16))
00064
00065 #define ADC_CR_PDN                      ((1UL<<21))
00066
00067 #define ADC_CR_START_MASK       ((7UL<<24))
00068
00069 #define ADC_CR_START_MODE_SEL(SEL)      ((SEL<<24))
00070
00071 #define ADC_CR_START_NOW        ((1UL<<24))
00072
00073 #define ADC_CR_START_EINT0      ((2UL<<24))
00074
00075 #define ADC_CR_START_CAP01      ((3UL<<24))
00076
00077 #define ADC_CR_START_MAT01      ((4UL<<24))
00078
00079 #define ADC_CR_START_MAT03      ((5UL<<24))
00080
00081 #define ADC_CR_START_MAT10      ((6UL<<24))
00082
00083 #define ADC_CR_START_MAT11      ((7UL<<24))
00084
00085 #define ADC_CR_EDGE                     ((1UL<<27))
00086
00087 /*********************************************************************/
00091 #define ADC_GDR_RESULT(n)               (((n>>4)&0xFFF))
00092
00093 #define ADC_GDR_CH(n)                   (((n>>24)&0x7))
00094
00096 #define ADC_GDR_OVERRUN_FLAG    ((1UL<<30))
00097
00098 #define ADC_GDR_DONE_FLAG               ((1UL<<31))
00099
00101 #define ADC_GDR_CH_MASK         ((7UL<<24))
00102 /*********************************************************************/
00107 #define ADC_INTEN_CH(n)                 ((1UL<<n))
00108
00109 #define ADC_INTEN_GLOBAL                ((1UL<<8))
00110
00111 /*********************************************************************/
00115 #define ADC_DR_RESULT(n)                (((n>>4)&0xFFF))
00116
00118 #define ADC_DR_OVERRUN_FLAG             ((1UL<<30))
00119
00121 #define ADC_DR_DONE_FLAG                ((1UL<<31))
00122
00123 /*********************************************************************/
00128 #define ADC_STAT_CH_DONE_FLAG(n)                ((n&0xFF))
00129
00131 #define ADC_STAT_CH_OVERRUN_FLAG(n)             (((n>>8)&0xFF))
00132
00133 #define ADC_STAT_INT_FLAG                               ((1UL<<16))
00134
00135 /*********************************************************************/
00139 #define ADC_ADCOFFS(n)          (((n&0xF)<<4))
00140
00141 #define ADC_TRIM(n)                 (((n&0xF)<<8))
00142
00143 /* ------------------- CHECK PARAM DEFINITIONS ------------------------- */
00145 #define PARAM_ADCx(n)    (((uint32_t *)n)==((uint32_t *)LPC_ADC))
00146
00148 #define PARAM_ADC_START_ON_EDGE_OPT(OPT)    ((OPT == ADC_START_ON_RISING)||(OPT == ADC_START_ON_FALLING))
00149
00151 #define PARAM_ADC_DATA_STATUS(OPT)    ((OPT== ADC_DATA_BURST)||(OPT== ADC_DATA_DONE))
00152
00154 #define PARAM_ADC_RATE(rate)    ((rate>0)&&(rate<=200000))
00155
00157 #define PARAM_ADC_CHANNEL_SELECTION(SEL)        ((SEL == ADC_CHANNEL_0)||(ADC_CHANNEL_1)\
00158 ||(SEL == ADC_CHANNEL_2)|(ADC_CHANNEL_3)\
00159 ||(SEL == ADC_CHANNEL_4)||(ADC_CHANNEL_5)\
00160 ||(SEL == ADC_CHANNEL_6)||(ADC_CHANNEL_7))
00161
00163 #define PARAM_ADC_START_OPT(OPT)    ((OPT == ADC_START_CONTINUOUS)||(OPT == ADC_START_NOW)\
00164 ||(OPT == ADC_START_ON_EINT0)||(OPT == ADC_START_ON_CAP01)\
00165 ||(OPT == ADC_START_ON_MAT01)||(OPT == ADC_START_ON_MAT03)\
00166 ||(OPT == ADC_START_ON_MAT10)||(OPT == ADC_START_ON_MAT11))
00167
00169 #define PARAM_ADC_TYPE_INT_OPT(OPT)    ((OPT == ADC_ADINTEN0)||(OPT == ADC_ADINTEN1)\
00170 ||(OPT == ADC_ADINTEN2)||(OPT == ADC_ADINTEN3)\
00171 ||(OPT == ADC_ADINTEN4)||(OPT == ADC_ADINTEN5)\
00172 ||(OPT == ADC_ADINTEN6)||(OPT == ADC_ADINTEN7)\
00173 ||(OPT == ADC_ADGINTEN))
00174
00180 /* Public Types --------------------------------------------------------------- */
00185 /*********************************************************************/
00189 typedef enum
00190 {
00191         ADC_CHANNEL_0  = 0,
00192         ADC_CHANNEL_1,
00193         ADC_CHANNEL_2,
00194         ADC_CHANNEL_3,
00195         ADC_CHANNEL_4,
00196         ADC_CHANNEL_5,
00197         ADC_CHANNEL_6,
00198         ADC_CHANNEL_7
00199 }ADC_CHANNEL_SELECTION;
00200
00202 typedef enum
00203 {
00204         ADC_START_CONTINUOUS =0,
00205         ADC_START_NOW,
00206         ADC_START_ON_EINT0,
00208         ADC_START_ON_CAP01,
00210         ADC_START_ON_MAT01,
00212         ADC_START_ON_MAT03,
00214         ADC_START_ON_MAT10,
00216         ADC_START_ON_MAT11
00218 } ADC_START_OPT;
00219
00220
00222 typedef enum
00223 {
00224         ADC_START_ON_RISING = 0,
00226         ADC_START_ON_FALLING
00228 } ADC_START_ON_EDGE_OPT;
00229
00231 typedef enum
00232 {
00233         ADC_ADINTEN0 = 0,
00234         ADC_ADINTEN1,
00235         ADC_ADINTEN2,
00236         ADC_ADINTEN3,
00237         ADC_ADINTEN4,
00238         ADC_ADINTEN5,
00239         ADC_ADINTEN6,
00240         ADC_ADINTEN7,
00241         ADC_ADGINTEN
00242 }ADC_TYPE_INT_OPT;
00243
00245 typedef enum
00246 {
00247         ADC_DATA_BURST = 0,             /*Burst bit*/
00248         ADC_DATA_DONE            /*Done bit*/
00249 }ADC_DATA_STATUS;
00250
00256 /* Public Functions ----------------------------------------------------------- */
00260 /* Init/DeInit ADC peripheral ----------------*/
00261 void ADC_Init(LPC_ADC_TypeDef *ADCx, uint32_t rate);
00262 void ADC_DeInit(LPC_ADC_TypeDef *ADCx);
00263
00264 /* Enable/Disable ADC functions --------------*/
00265 void ADC_BurstCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState);
00266 void ADC_PowerdownCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState);
00267 void ADC_StartCmd(LPC_ADC_TypeDef *ADCx, uint8_t start_mode);
00268 void ADC_ChannelCmd (LPC_ADC_TypeDef *ADCx, uint8_t Channel, FunctionalState NewState);
00269
00270 /* Configure ADC functions -------------------*/
00271 void ADC_EdgeStartConfig(LPC_ADC_TypeDef *ADCx, uint8_t EdgeOption);
00272 void ADC_IntConfig (LPC_ADC_TypeDef *ADCx, ADC_TYPE_INT_OPT IntType, FunctionalState NewState);
00273
00274 /* Get ADC information functions -------------------*/
00275 uint16_t ADC_ChannelGetData(LPC_ADC_TypeDef *ADCx, uint8_t channel);
00276 FlagStatus ADC_ChannelGetStatus(LPC_ADC_TypeDef *ADCx, uint8_t channel, uint32_t StatusType);
00277 uint32_t ADC_GlobalGetData(LPC_ADC_TypeDef *ADCx);
00278 FlagStatus      ADC_GlobalGetStatus(LPC_ADC_TypeDef *ADCx, uint32_t StatusType);
00279
00285 #ifdef __cplusplus
00286 }
00287 #endif
00288
00289
00290 #endif /* LPC17XX_ADC_H_ */
00291
00296 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:41 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_can.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_can.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_can.c                           2011-03-09
00003 */
00026 /* Peripheral group ----------------------------------------------------------- */
00031 /* Includes ------------------------------------------------------------------- */
00032 #include "lpc17xx_can.h"
00033 #include "lpc17xx_clkpwr.h"
00034
00035 /* If this source file built with example, the LPC17xx FW library configuration
00036  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00037  * otherwise the default FW library configuration file must be included instead
00038  */
00039 #ifdef __BUILD_WITH_EXAMPLE__
00040 #include "lpc17xx_libcfg.h"
00041 #else
00042 #include "lpc17xx_libcfg_default.h"
00043 #endif /* __BUILD_WITH_EXAMPLE__ */
00044
00045
00046 #ifdef _CAN
00047
00048 /* Private Variables ---------------------------------------------------------- */
00053 FunctionalState FULLCAN_ENABLE;
00054
00055
00056 /* Counts number of filters (CAN message objects) used */
00057 uint16_t CANAF_FullCAN_cnt = 0;
00058 uint16_t CANAF_std_cnt = 0;
00059 uint16_t CANAF_gstd_cnt = 0;
00060 uint16_t CANAF_ext_cnt = 0;
00061 uint16_t CANAF_gext_cnt = 0;
00062
00063 /* End of Private Variables ----------------------------------------------------*/
00068 /* Private Variables ---------------------------------------------------------- */
00069 static void can_SetBaudrate (LPC_CAN_TypeDef *CANx, uint32_t baudrate);
00070
00071 /*********************************************************************/
00079 static void can_SetBaudrate (LPC_CAN_TypeDef *CANx, uint32_t baudrate)
00080 {
00081         uint32_t result = 0;
00082         uint8_t NT, TSEG1, TSEG2, BRFail;
00083         uint32_t CANPclk = 0;
00084         uint32_t BRP;
00085         CHECK_PARAM(PARAM_CANx(CANx));
00086
00087         if (CANx == LPC_CAN1)
00088         {
00089                 CANPclk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_CAN1);
00090         }
00091         else
00092         {
00093                 CANPclk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_CAN2);
00094         }
00095         result = CANPclk / baudrate;
00096         /* Calculate suitable nominal time value
00097          * NT (nominal time) = (TSEG1 + TSEG2 + 3)
00098          * NT <= 24
00099          * TSEG1 >= 2*TSEG2
00100          */
00101         BRFail = 1;
00102         for(NT=24;NT>0;NT=NT-2)
00103         {
00104                 if ((result%NT)==0)
00105                 {
00106                         BRP = result / NT - 1;
00107                         NT--;
00108                         TSEG2 = (NT/3) - 1;
00109                         TSEG1 = NT -(NT/3) - 1;
00110                         BRFail = 0;
00111                         break;
00112                 }
00113         }
00114         if(BRFail)
00115                 while(1); // Failed to calculate exact CAN baud rate
00116         /* Enter reset mode */
00117         CANx->MOD = 0x01;
00118         /* Set bit timing
00119          * Default: SAM = 0x00;
00120          *          SJW = 0x03;
00121          */
00122         CANx->BTR  = (TSEG2<<20)|(TSEG1<<16)|(3<<14)|BRP;
00123         /* Return to normal operating */
00124         CANx->MOD = 0;
00125 }
00126 /* End of Private Functions ----------------------------------------------------*/
00127
00128
00129 /* Public Functions ----------------------------------------------------------- */
00134 /********************************************************************/
00142 void CAN_Init(LPC_CAN_TypeDef *CANx, uint32_t baudrate)
00143 {
00144         uint16_t i;
00145         CHECK_PARAM(PARAM_CANx(CANx));
00146
00147         if(CANx == LPC_CAN1)
00148         {
00149                 /* Turn on power and clock for CAN1 */
00150                 CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCAN1, ENABLE);
00151                 /* Set clock divide for CAN1 */
00152         }
00153         else
00154         {
00155                 /* Turn on power and clock for CAN1 */
00156                 CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCAN2, ENABLE);
00157                 /* Set clock divide for CAN2 */
00158         }
00159         CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_CAN1, CLKPWR_PCLKSEL_CCLK_DIV_2);
00160         CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_CAN2, CLKPWR_PCLKSEL_CCLK_DIV_2);
00161         CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_ACF, CLKPWR_PCLKSEL_CCLK_DIV_2);
00162
00163         CANx->MOD = 1; // Enter Reset Mode
00164         CANx->IER = 0; // Disable All CAN Interrupts
00165         CANx->GSR = 0;
00166         /* Request command to release Rx, Tx buffer and clear data overrun */
00167         //CANx->CMR = CAN_CMR_AT | CAN_CMR_RRB | CAN_CMR_CDO;
00168         CANx->CMR = (1<<1)|(1<<2)|(1<<3);
00169         /* Read to clear interrupt pending in interrupt capture register */
00170         i = CANx->ICR;
00171         CANx->MOD = 0;// Return Normal operating
00172
00173         //Reset CANAF value
00174         LPC_CANAF->AFMR = 0x01;
00175
00176         //clear ALUT RAM
00177         for (i = 0; i < 512; i++) {
00178                 LPC_CANAF_RAM->mask[i] = 0x00;
00179         }
00180
00181         LPC_CANAF->SFF_sa = 0x00;
00182         LPC_CANAF->SFF_GRP_sa = 0x00;
00183         LPC_CANAF->EFF_sa = 0x00;
00184         LPC_CANAF->EFF_GRP_sa = 0x00;
00185         LPC_CANAF->ENDofTable = 0x00;
00186
00187         LPC_CANAF->AFMR = 0x00;
00188         /* Set baudrate */
00189         can_SetBaudrate (CANx, baudrate);
00190 }
00191
00192 /********************************************************************/
00199 void CAN_DeInit(LPC_CAN_TypeDef *CANx)
00200 {
00201         CHECK_PARAM(PARAM_CANx(CANx));
00202
00203         if(CANx == LPC_CAN1)
00204         {
00205                 /* Turn on power and clock for CAN1 */
00206                 CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCAN1, DISABLE);
00207         }
00208         else
00209         {
00210                 /* Turn on power and clock for CAN1 */
00211                 CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCAN2, DISABLE);
00212         }
00213 }
00214
00215 /********************************************************************/
00226 CAN_ERROR CAN_SetupAFLUT(LPC_CANAF_TypeDef* CANAFx, AF_SectionDef* AFSection)
00227 {
00228         uint8_t ctrl1,ctrl2;
00229         uint8_t dis1, dis2;
00230         uint16_t SID, ID_temp,i, count = 0;
00231         uint32_t EID, entry, buf;
00232         uint16_t lowerSID, upperSID;
00233         uint32_t lowerEID, upperEID;
00234
00235         CHECK_PARAM(PARAM_CANAFx(CANAFx));
00236         CANAFx->AFMR = 0x01;
00237
00238 /***** setup FullCAN Table *****/
00239         if(AFSection->FullCAN_Sec == NULL)
00240         {
00241                 FULLCAN_ENABLE = DISABLE;
00242         }
00243         else
00244         {
00245                 FULLCAN_ENABLE = ENABLE;
00246                 for(i=0;i<(AFSection->FC_NumEntry);i++)
00247                 {
00248                         if(count + 1 > 64)
00249                         {
00250                                 return CAN_OBJECTS_FULL_ERROR;
00251                         }
00252                         ctrl1 = AFSection->FullCAN_Sec->controller;
00253                         SID = AFSection->FullCAN_Sec->id_11;
00254                         dis1 = AFSection->FullCAN_Sec->disable;
00255
00256                         CHECK_PARAM(PARAM_CTRL(ctrl1));
00257                         CHECK_PARAM(PARAM_ID_11(SID));
00258                         CHECK_PARAM(PARAM_MSG_DISABLE(dis1));
00259                         entry = 0x00; //reset entry value
00260                         if((CANAF_FullCAN_cnt & 0x00000001)==0)
00261                         {
00262                                 if(count!=0x00)
00263                                 {
00264                                         buf = LPC_CANAF_RAM->mask[count-1];
00265                                         ID_temp = (buf & 0xE7FF); //mask controller & identifier bits
00266                                         if(ID_temp > ((ctrl1<<13)|SID))
00267                                         {
00268                                                 return CAN_AF_ENTRY_ERROR;
00269                                         }
00270                                 }
00271                                 entry = (ctrl1<<29)|(dis1<<28)|(SID<<16)|(1<<27);
00272                                 LPC_CANAF_RAM->mask[count] &= 0x0000FFFF;
00273                                 LPC_CANAF_RAM->mask[count] |= entry;
00274                                 CANAF_FullCAN_cnt++;
00275                                 if(CANAF_FullCAN_cnt == AFSection->FC_NumEntry) //this is the lastest FullCAN entry
00276                                         count++;
00277                         }
00278                         else
00279                         {
00280                                 buf = LPC_CANAF_RAM->mask[count];
00281                                 ID_temp = (buf >>16) & 0xE7FF;
00282                                 if(ID_temp > ((ctrl1<<13)|SID))
00283                                 {
00284                                         return CAN_AF_ENTRY_ERROR;
00285                                 }
00286                                 entry = (ctrl1<<13)|(dis1<<12)|(SID<<0)|(1<<11);
00287                                 LPC_CANAF_RAM->mask[count] &= 0xFFFF0000;
00288                                 LPC_CANAF_RAM->mask[count]|= entry;
00289                                 count++;
00290                                 CANAF_FullCAN_cnt++;
00291                         }
00292                         AFSection->FullCAN_Sec = (FullCAN_Entry *)((uint32_t)(AFSection->FullCAN_Sec)+ sizeof(FullCAN_Entry));
00293                 }
00294         }
00295
00296 /***** Setup Explicit Standard Frame Format Section *****/
00297         if(AFSection->SFF_Sec != NULL)
00298         {
00299                 for(i=0;i<(AFSection->SFF_NumEntry);i++)
00300                 {
00301                         if(count + 1 > 512)
00302                         {
00303                                 return CAN_OBJECTS_FULL_ERROR;
00304                         }
00305                         ctrl1 = AFSection->SFF_Sec->controller;
00306                         SID = AFSection->SFF_Sec->id_11;
00307                         dis1 = AFSection->SFF_Sec->disable;
00308
00309                         //check parameter
00310                         CHECK_PARAM(PARAM_CTRL(ctrl1));
00311                         CHECK_PARAM(PARAM_ID_11(SID));
00312                         CHECK_PARAM(PARAM_MSG_DISABLE(dis1));
00313
00314                         entry = 0x00; //reset entry value
00315                         if((CANAF_std_cnt & 0x00000001)==0)
00316                         {
00317                                 if(CANAF_std_cnt !=0 )
00318                                 {
00319                                         buf = LPC_CANAF_RAM->mask[count-1];
00320                                         ID_temp = (buf & 0xE7FF); //mask controller & identifier bits
00321                                         if(ID_temp > ((ctrl1<<13)|SID))
00322                                         {
00323                                                 return CAN_AF_ENTRY_ERROR;
00324                                         }
00325                                 }
00326                                 entry = (ctrl1<<29)|(dis1<<28)|(SID<<16);
00327                                 LPC_CANAF_RAM->mask[count] &= 0x0000FFFF;
00328                                 LPC_CANAF_RAM->mask[count] |= entry;
00329                                 CANAF_std_cnt++;
00330                                 if(CANAF_std_cnt == AFSection->SFF_NumEntry)//if this is the last SFF entry
00331                                         count++;
00332                         }
00333                         else
00334                         {
00335                                 buf = LPC_CANAF_RAM->mask[count];
00336                                 ID_temp = (buf >>16) & 0xE7FF;
00337                                 if(ID_temp > ((ctrl1<<13)|SID))
00338                                 {
00339                                         return CAN_AF_ENTRY_ERROR;
00340                                 }
00341                                 entry = (ctrl1<<13)|(dis1<<12)|(SID<<0);
00342                                 LPC_CANAF_RAM->mask[count] &= 0xFFFF0000;
00343                                 LPC_CANAF_RAM->mask[count] |= entry;
00344                                 count++;
00345                                 CANAF_std_cnt++;
00346                         }
00347                         AFSection->SFF_Sec = (SFF_Entry *)((uint32_t)(AFSection->SFF_Sec)+ sizeof(SFF_Entry));
00348                 }
00349         }
00350
00351 /***** Setup Group of Standard Frame Format Identifier Section *****/
00352         if(AFSection->SFF_GPR_Sec != NULL)
00353         {
00354                 for(i=0;i<(AFSection->SFF_GPR_NumEntry);i++)
00355                 {
00356                         if(count + 1 > 512)
00357                         {
00358                                 return CAN_OBJECTS_FULL_ERROR;
00359                         }
00360                         ctrl1 = AFSection->SFF_GPR_Sec->controller1;
00361                         ctrl2 = AFSection->SFF_GPR_Sec->controller2;
00362                         dis1 = AFSection->SFF_GPR_Sec->disable1;
00363                         dis2 = AFSection->SFF_GPR_Sec->disable2;
00364                         lowerSID = AFSection->SFF_GPR_Sec->lowerID;
00365                         upperSID = AFSection->SFF_GPR_Sec->upperID;
00366
00367                         /* check parameter */
00368                         CHECK_PARAM(PARAM_CTRL(ctrl1));
00369                         CHECK_PARAM(PARAM_CTRL(ctrl2));
00370                         CHECK_PARAM(PARAM_MSG_DISABLE(dis1));
00371                         CHECK_PARAM(PARAM_MSG_DISABLE(dis2));
00372                         CHECK_PARAM(PARAM_ID_11(lowerSID));
00373                         CHECK_PARAM(PARAM_ID_11(upperSID));
00374
00375                         entry = 0x00;
00376                         if(CANAF_gstd_cnt!=0)
00377                         {
00378                                 buf = LPC_CANAF_RAM->mask[count-1];
00379                                 ID_temp = buf & 0xE7FF;
00380                                 if((ctrl1 != ctrl2)||(lowerSID > upperSID)||(ID_temp > ((ctrl1<<13)|lowerSID)))
00381                                 {
00382                                         return CAN_AF_ENTRY_ERROR;
00383                                 }
00384                         }
00385                         entry = (ctrl1 << 29)|(dis1 << 28)|(lowerSID << 16)|  \
00386                                         (ctrl2 << 13)|(dis2 << 12)|(upperSID << 0);
00387                         LPC_CANAF_RAM->mask[count] = entry;
00388                         CANAF_gstd_cnt++;
00389                         count++;
00390                         AFSection->SFF_GPR_Sec = (SFF_GPR_Entry *)((uint32_t)(AFSection->SFF_GPR_Sec)+ sizeof(SFF_GPR_Entry));
00391                 }
00392         }
00393
00394 /***** Setup Explicit Extend Frame Format Identifier Section *****/
00395         if(AFSection->EFF_Sec != NULL)
00396         {
00397                 for(i=0;i<(AFSection->EFF_NumEntry);i++)
00398                 {
00399                         if(count + 1 > 512)
00400                         {
00401                                 return CAN_OBJECTS_FULL_ERROR;
00402                         }
00403                         EID = AFSection->EFF_Sec->ID_29;
00404                         ctrl1 = AFSection->EFF_Sec->controller;
00405
00406                         // check parameter
00407                         CHECK_PARAM(PARAM_ID_29(EID));
00408                         CHECK_PARAM(PARAM_CTRL(ctrl1));
00409
00410                         entry = (ctrl1 << 29)|(EID << 0);
00411                         if(CANAF_ext_cnt != 0)
00412                         {
00413                                 buf = LPC_CANAF_RAM->mask[count-1];
00414 //                              EID_temp = buf & 0x0FFFFFFF;
00415                                 if(buf > entry)
00416                                 {
00417                                         return CAN_AF_ENTRY_ERROR;
00418                                 }
00419                         }
00420                         LPC_CANAF_RAM->mask[count] = entry;
00421                         CANAF_ext_cnt ++;
00422                         count++;
00423                         AFSection->EFF_Sec = (EFF_Entry *)((uint32_t)(AFSection->EFF_Sec)+ sizeof(EFF_Entry));
00424                 }
00425         }
00426
00427 /***** Setup Group of Extended Frame Format Identifier Section *****/
00428         if(AFSection->EFF_GPR_Sec != NULL)
00429         {
00430                 for(i=0;i<(AFSection->EFF_GPR_NumEntry);i++)
00431                 {
00432                         if(count + 2 > 512)
00433                         {
00434                                 return CAN_OBJECTS_FULL_ERROR;
00435                         }
00436                         ctrl1 = AFSection->EFF_GPR_Sec->controller1;
00437                         ctrl2 = AFSection->EFF_GPR_Sec->controller2;
00438                         lowerEID = AFSection->EFF_GPR_Sec->lowerEID;
00439                         upperEID = AFSection->EFF_GPR_Sec->upperEID;
00440
00441                         //check parameter
00442                         CHECK_PARAM(PARAM_CTRL(ctrl1));
00443                         CHECK_PARAM(PARAM_CTRL(ctrl2));
00444                         CHECK_PARAM(PARAM_ID_29(lowerEID));
00445                         CHECK_PARAM(PARAM_ID_29(upperEID));
00446
00447                         entry = 0x00;
00448                         if(CANAF_gext_cnt != 0)
00449                         {
00450                                 buf = LPC_CANAF_RAM->mask[count-1];
00451 //                              EID_temp = buf & 0x0FFFFFFF;
00452                                 if((ctrl1 != ctrl2) || (lowerEID > upperEID) || (buf > ((ctrl1 << 29)|(lowerEID << 0))))
00453                                 {
00454                                         return CAN_AF_ENTRY_ERROR;
00455                                 }
00456                         }
00457                         entry = (ctrl1 << 29)|(lowerEID << 0);
00458                         LPC_CANAF_RAM->mask[count++] = entry;
00459                         entry = (ctrl2 << 29)|(upperEID << 0);
00460                         LPC_CANAF_RAM->mask[count++] = entry;
00461                         CANAF_gext_cnt++;
00462                         AFSection->EFF_GPR_Sec = (EFF_GPR_Entry *)((uint32_t)(AFSection->EFF_GPR_Sec)+ sizeof(EFF_GPR_Entry));
00463                 }
00464         }
00465         //update address values
00466         LPC_CANAF->SFF_sa = ((CANAF_FullCAN_cnt + 1)>>1)<<2;
00467         LPC_CANAF->SFF_GRP_sa = LPC_CANAF->SFF_sa + (((CANAF_std_cnt+1)>>1)<< 2);
00468         LPC_CANAF->EFF_sa = LPC_CANAF->SFF_GRP_sa + (CANAF_gstd_cnt << 2);
00469         LPC_CANAF->EFF_GRP_sa = LPC_CANAF->EFF_sa + (CANAF_ext_cnt << 2);
00470         LPC_CANAF->ENDofTable = LPC_CANAF->EFF_GRP_sa + (CANAF_gext_cnt << 3);
00471
00472         if(FULLCAN_ENABLE == DISABLE)
00473         {
00474                 LPC_CANAF->AFMR = 0x00; // Normal mode
00475         }
00476         else
00477         {
00478                 LPC_CANAF->AFMR = 0x04;
00479         }
00480         return CAN_OK;
00481 }
00482 /********************************************************************/
00496 CAN_ERROR CAN_LoadExplicitEntry(LPC_CAN_TypeDef* CANx, uint32_t id, CAN_ID_FORMAT_Type format)
00497 {
00498         uint32_t tmp0 = 0;
00499         uint32_t buf0=0, buf1=0;
00500         int16_t cnt1=0, cnt2=0, bound1=0, total=0;
00501
00502
00503         CHECK_PARAM(PARAM_CANx(CANx));
00504         CHECK_PARAM(PARAM_ID_FORMAT(format));
00505
00506         if (CANx == LPC_CAN1)
00507         {
00508                 tmp0 = 0;
00509         }
00510         else if (CANx == LPC_CAN2)
00511         {
00512                 tmp0 = 1;
00513         }
00514
00515         /* Acceptance Filter Memory full - return */
00516         total =((CANAF_FullCAN_cnt+1)>>1)+ CANAF_FullCAN_cnt*3 +((CANAF_std_cnt + 1) >> 1)+  \
00517                         CANAF_gstd_cnt + CANAF_ext_cnt + (CANAF_gext_cnt<<1);
00518         if (total >= 512){ //don't have enough space
00519                 return CAN_OBJECTS_FULL_ERROR;
00520         }
00521
00522         /* Setup Acceptance Filter Configuration
00523     Acceptance Filter Mode Register = Off */
00524         LPC_CANAF->AFMR = 0x00000001;
00525
00526 /*********** Add Explicit Standard Identifier Frame Format entry *********/
00527         if(format == STD_ID_FORMAT)
00528         {
00529                 id &= 0x07FF;
00530                 id |= (tmp0 << 13); /* Add controller number */
00531                 /* Move all remaining sections one place up
00532                 if new entry will increase FullCAN list */
00533                 if ((CANAF_std_cnt & 0x0001) == 0)
00534                 {
00535                         cnt1   = ((CANAF_FullCAN_cnt+1)>>1)+((CANAF_std_cnt+1)>>1);
00536                         bound1 = total - cnt1;
00537                         buf0   = LPC_CANAF_RAM->mask[cnt1];
00538                         while(bound1--)
00539                         {
00540                                 cnt1++;
00541                                 buf1 = LPC_CANAF_RAM->mask[cnt1];
00542                                 LPC_CANAF_RAM->mask[cnt1] = buf0;
00543                                 buf0 = buf1;
00544                         }
00545                 }
00546                 if (CANAF_std_cnt == 0)
00547                 {
00548                         cnt2 = (CANAF_FullCAN_cnt + 1)>>1;
00549                         /* For entering first ID */
00550                         LPC_CANAF_RAM->mask[cnt2] = 0x0000FFFF | (id << 16);
00551                 }
00552                 else if (CANAF_std_cnt == 1)
00553                 {
00554                         cnt2 = (CANAF_FullCAN_cnt + 1)>>1;
00555                         /* For entering second ID */
00556                         if (((LPC_CANAF_RAM->mask[cnt2] >> 16)& 0xE7FF) > id)
00557                         {
00558                                 LPC_CANAF_RAM->mask[cnt2] = (LPC_CANAF_RAM->mask[cnt2] >> 16) | (id << 16);
00559                         }
00560                         else
00561                         {
00562                                 LPC_CANAF_RAM->mask[cnt2] = (LPC_CANAF_RAM->mask[cnt2] & 0xFFFF0000) | id;
00563                         }
00564                 }
00565                 else
00566                 {
00567                         /* Find where to insert new ID */
00568                         cnt1 = (CANAF_FullCAN_cnt+1)>>1;
00569                         cnt2 = CANAF_std_cnt;
00570                         bound1 = ((CANAF_FullCAN_cnt+1)>>1)+((CANAF_std_cnt+1)>>1);
00571                         while (cnt1 < bound1)
00572                         {
00573                                 /* Loop through standard existing IDs */
00574                                 if (((LPC_CANAF_RAM->mask[cnt1] >> 16) & 0xE7FF) > id)
00575                                 {
00576                                         cnt2 = cnt1 * 2;
00577                                         break;
00578                                 }
00579
00580                                 if ((LPC_CANAF_RAM->mask[cnt1] & 0x0000E7FF) > id)
00581                                 {
00582                                         cnt2 = cnt1 * 2 + 1;
00583                                         break;
00584                                 }
00585
00586                                 cnt1++;
00587                         }
00588                         /* cnt1 = U32 where to insert new ID */
00589                         /* cnt2 = U16 where to insert new ID */
00590
00591                         if (cnt1 == bound1)
00592                         {
00593                                 /* Adding ID as last entry */
00594                                 /* Even number of IDs exists */
00595                                 if ((CANAF_std_cnt & 0x0001) == 0)
00596                                 {
00597                                         LPC_CANAF_RAM->mask[cnt1]  = 0x0000FFFF | (id << 16);
00598                                 }
00599                                 /* Odd  number of IDs exists */
00600                                 else
00601                                 {
00602                                         LPC_CANAF_RAM->mask[cnt1]  = (LPC_CANAF_RAM->mask[cnt1] & 0xFFFF0000) | id;
00603                                 }
00604                         }
00605                         else
00606                         {
00607                                 buf0 = LPC_CANAF_RAM->mask[cnt1]; /* Remember current entry */
00608                                 if ((cnt2 & 0x0001) == 0)
00609                                 {
00610                                         /* Insert new mask to even address*/
00611                                         buf1 = (id << 16) | (buf0 >> 16);
00612                                 }
00613                                 else
00614                                 {
00615                                         /* Insert new mask to odd  address */
00616                                         buf1 = (buf0 & 0xFFFF0000) | id;
00617                                 }
00618                                 LPC_CANAF_RAM->mask[cnt1] = buf1;/* Insert mask */
00619                                 bound1 = ((CANAF_FullCAN_cnt+1)>>1)+((CANAF_std_cnt+1)>>1)-1;
00620                                 /* Move all remaining standard mask entries one place up */
00621                                 while (cnt1 < bound1)
00622                                 {
00623                                         cnt1++;
00624                                         buf1  = LPC_CANAF_RAM->mask[cnt1];
00625                                         LPC_CANAF_RAM->mask[cnt1] = (buf1 >> 16) | (buf0 << 16);
00626                                         buf0  = buf1;
00627                                 }
00628
00629                                 if ((CANAF_std_cnt & 0x0001) == 0)
00630                                 {
00631                                         /* Even number of IDs exists */
00632                                         LPC_CANAF_RAM->mask[cnt1+1] = (buf0 <<16) |(0x0000FFFF);
00633                                 }
00634                         }
00635                 }
00636                 CANAF_std_cnt++;
00637                 //update address values
00638                 LPC_CANAF->SFF_GRP_sa +=0x04 ;
00639                 LPC_CANAF->EFF_sa     +=0x04 ;
00640                 LPC_CANAF->EFF_GRP_sa +=0x04;
00641                 LPC_CANAF->ENDofTable +=0x04;
00642         }
00643
00644 /*********** Add Explicit Extended Identifier Frame Format entry *********/
00645         else
00646         {
00647                 /* Add controller number */
00648                 id |= (tmp0) << 29;
00649
00650                 cnt1 = ((CANAF_FullCAN_cnt+1)>>1)+(((CANAF_std_cnt + 1) >> 1) + CANAF_gstd_cnt);
00651                 cnt2 = 0;
00652                 while (cnt2 < CANAF_ext_cnt)
00653                 {
00654                         /* Loop through extended existing masks*/
00655                         if (LPC_CANAF_RAM->mask[cnt1] > id)
00656                         {
00657                                 break;
00658                         }
00659                         cnt1++;/* cnt1 = U32 where to insert new mask */
00660                         cnt2++;
00661                 }
00662
00663                 buf0 = LPC_CANAF_RAM->mask[cnt1];  /* Remember current entry */
00664                 LPC_CANAF_RAM->mask[cnt1] = id;    /* Insert mask */
00665
00666                 CANAF_ext_cnt++;
00667
00668                 bound1 = total;
00669                 /* Move all remaining extended mask entries one place up*/
00670                 while (cnt2 < bound1)
00671                 {
00672                         cnt1++;
00673                         cnt2++;
00674                         buf1 = LPC_CANAF_RAM->mask[cnt1];
00675                         LPC_CANAF_RAM->mask[cnt1] = buf0;
00676                         buf0 = buf1;
00677                 }
00678                 /* update address values */
00679                 LPC_CANAF->EFF_GRP_sa += 4;
00680                 LPC_CANAF->ENDofTable += 4;
00681         }
00682         if(CANAF_FullCAN_cnt == 0) //not use FullCAN mode
00683         {
00684                 LPC_CANAF->AFMR = 0x00;//not use FullCAN mode
00685         }
00686         else
00687         {
00688                 LPC_CANAF->AFMR = 0x04;
00689         }
00690
00691         return CAN_OK;
00692 }
00693
00694 /********************************************************************/
00705 CAN_ERROR CAN_LoadFullCANEntry (LPC_CAN_TypeDef* CANx, uint16_t id)
00706 {
00707         uint32_t ctrl0 = 0;
00708         uint32_t buf0=0, buf1=0, buf2=0;
00709         uint32_t tmp0=0, tmp1=0, tmp2=0;
00710         int16_t cnt1=0, cnt2=0, bound1=0, total=0;
00711
00712         CHECK_PARAM(PARAM_CANx(CANx));
00713
00714         if (CANx == LPC_CAN1)
00715         {
00716                 ctrl0 = 0;
00717         }
00718         else if (CANx == LPC_CAN2)
00719         {
00720                 ctrl0 = 1;
00721         }
00722
00723         /* Acceptance Filter Memory full - return */
00724         total =((CANAF_FullCAN_cnt+1)>>1)+ CANAF_FullCAN_cnt*3 +((CANAF_std_cnt + 1) >> 1)+  \
00725                         CANAF_gstd_cnt + CANAF_ext_cnt + (CANAF_gext_cnt<<1);
00726         //don't have enough space for this fullCAN Entry and its Object(3*32 bytes)
00727         if ((total >=508)||(CANAF_FullCAN_cnt>=64)){
00728                 return CAN_OBJECTS_FULL_ERROR;
00729         }
00730         /* Setup Acceptance Filter Configuration
00731     Acceptance Filter Mode Register = Off */
00732         LPC_CANAF->AFMR = 0x00000001;
00733
00734         /* Add mask for standard identifiers   */
00735         id &= 0x07FF;
00736         id |= (ctrl0 << 13) | (1 << 11); /* Add controller number */
00737 //      total = ((CANAF_std_cnt + 1) >> 1)+ CANAF_gstd_cnt + CANAF_ext_cnt + (CANAF_gext_cnt<<1);
00738         /* Move all remaining sections one place up
00739         if new entry will increase FullCAN list */
00740         if (((CANAF_FullCAN_cnt & 0x0001) == 0)&&(total!=0))
00741         {
00742                 //then remove remaining section
00743                 cnt1   = (CANAF_FullCAN_cnt >> 1);
00744                 bound1 = total;
00745                 buf0   = LPC_CANAF_RAM->mask[cnt1];
00746
00747                 while (bound1--)
00748                 {
00749                         cnt1++;
00750                         buf1 = LPC_CANAF_RAM->mask[cnt1];
00751                         LPC_CANAF_RAM->mask[cnt1] = buf0;
00752                         buf0 = buf1;
00753                 }
00754         }
00755         if (CANAF_FullCAN_cnt == 0)
00756         {
00757                 /* For entering first ID */
00758                 LPC_CANAF_RAM->mask[0] = 0x0000FFFF | (id << 16);
00759         }
00760         else if (CANAF_FullCAN_cnt == 1)
00761         {
00762                 /* For entering second ID */
00763                 if (((LPC_CANAF_RAM->mask[0] >> 16)& 0xE7FF) > id)
00764                 {
00765                         LPC_CANAF_RAM->mask[0] = (LPC_CANAF_RAM->mask[0] >> 16) | (id << 16);
00766                 }
00767                 else
00768                 {
00769                         LPC_CANAF_RAM->mask[0] = (LPC_CANAF_RAM->mask[0] & 0xFFFF0000) | id;
00770                 }
00771         }
00772         else
00773         {
00774                 /* Find where to insert new ID */
00775                 cnt1 = 0;
00776                 cnt2 = CANAF_FullCAN_cnt;
00777                 bound1 = (CANAF_FullCAN_cnt - 1) >> 1;
00778                 while (cnt1 <= bound1)
00779                 {
00780                         /* Loop through standard existing IDs */
00781                         if (((LPC_CANAF_RAM->mask[cnt1] >> 16) & 0xE7FF) > (id & 0xE7FF))
00782                         {
00783                                 cnt2 = cnt1 * 2;
00784                                 break;
00785                         }
00786
00787                         if ((LPC_CANAF_RAM->mask[cnt1] & 0x0000E7FF) > (id & 0xE7FF))
00788                         {
00789                                 cnt2 = cnt1 * 2 + 1;
00790                                 break;
00791                         }
00792
00793                         cnt1++;
00794                 }
00795                 /* cnt1 = U32 where to insert new ID */
00796                 /* cnt2 = U16 where to insert new ID */
00797
00798                 if (cnt1 > bound1)
00799                 {
00800                         /* Adding ID as last entry */
00801                         /* Even number of IDs exists */
00802                         if ((CANAF_FullCAN_cnt & 0x0001) == 0)
00803                         {
00804                                 LPC_CANAF_RAM->mask[cnt1]  = 0x0000FFFF | (id << 16);
00805                         }
00806                         /* Odd  number of IDs exists */
00807                         else
00808                         {
00809                                 LPC_CANAF_RAM->mask[cnt1]  = (LPC_CANAF_RAM->mask[cnt1] & 0xFFFF0000) | id;
00810                         }
00811                 }
00812                 else
00813                 {
00814                         buf0 = LPC_CANAF_RAM->mask[cnt1]; /* Remember current entry */
00815                         if ((cnt2 & 0x0001) == 0)
00816                         {
00817                                 /* Insert new mask to even address*/
00818                                 buf1 = (id << 16) | (buf0 >> 16);
00819                         }
00820                         else
00821                         {
00822                                 /* Insert new mask to odd  address */
00823                                 buf1 = (buf0 & 0xFFFF0000) | id;
00824                         }
00825                         LPC_CANAF_RAM->mask[cnt1] = buf1;/* Insert mask */
00826                         bound1 = CANAF_FullCAN_cnt >> 1;
00827                         /* Move all remaining standard mask entries one place up */
00828                         while (cnt1 < bound1)
00829                         {
00830                                 cnt1++;
00831                                 buf1  = LPC_CANAF_RAM->mask[cnt1];
00832                                 LPC_CANAF_RAM->mask[cnt1] = (buf1 >> 16) | (buf0 << 16);
00833                                 buf0  = buf1;
00834                         }
00835
00836                         if ((CANAF_FullCAN_cnt & 0x0001) == 0)
00837                         {
00838                                 /* Even number of IDs exists */
00839                                 LPC_CANAF_RAM->mask[cnt1] = (LPC_CANAF_RAM->mask[cnt1] & 0xFFFF0000)
00840                                                                                         | (0x0000FFFF);
00841                         }
00842                 }
00843         }
00844         //restruct FulCAN Object Section
00845         bound1 = CANAF_FullCAN_cnt - cnt2;
00846         cnt1 = total - (CANAF_FullCAN_cnt)*3 + cnt2*3 + 1;
00847         buf0 = LPC_CANAF_RAM->mask[cnt1];
00848         buf1 = LPC_CANAF_RAM->mask[cnt1+1];
00849         buf2 = LPC_CANAF_RAM->mask[cnt1+2];
00850         LPC_CANAF_RAM->mask[cnt1]=LPC_CANAF_RAM->mask[cnt1+1]= LPC_CANAF_RAM->mask[cnt1+2]=0x00;
00851         cnt1+=3;
00852         while(bound1--)
00853         {
00854                 tmp0 = LPC_CANAF_RAM->mask[cnt1];
00855                 tmp1 = LPC_CANAF_RAM->mask[cnt1+1];
00856                 tmp2 = LPC_CANAF_RAM->mask[cnt1+2];
00857                 LPC_CANAF_RAM->mask[cnt1]= buf0;
00858                 LPC_CANAF_RAM->mask[cnt1+1]= buf1;
00859                 LPC_CANAF_RAM->mask[cnt1+2]= buf2;
00860                 buf0 = tmp0;
00861                 buf1 = tmp1;
00862                 buf2 = tmp2;
00863                 cnt1+=3;
00864         }
00865         CANAF_FullCAN_cnt++;
00866         //update address values
00867         LPC_CANAF->SFF_sa         +=0x04;
00868         LPC_CANAF->SFF_GRP_sa +=0x04 ;
00869         LPC_CANAF->EFF_sa     +=0x04 ;
00870         LPC_CANAF->EFF_GRP_sa +=0x04;
00871         LPC_CANAF->ENDofTable +=0x04;
00872
00873         LPC_CANAF->AFMR = 0x04;
00874         return CAN_OK;
00875 }
00876
00877 /********************************************************************/
00891 CAN_ERROR CAN_LoadGroupEntry(LPC_CAN_TypeDef* CANx, uint32_t lowerID, \
00892                 uint32_t upperID, CAN_ID_FORMAT_Type format)
00893 {
00894         uint16_t tmp = 0;
00895         uint32_t buf0, buf1, entry1, entry2, LID,UID;
00896         int16_t cnt1, bound1, total;
00897         //LPC_CANAF_RAM_TypeDef *AFLUTTest = LPC_CANAF_RAM;
00898
00899         CHECK_PARAM(PARAM_CANx(CANx));
00900         CHECK_PARAM(PARAM_ID_FORMAT(format));
00901
00902         if(lowerID > upperID) return CAN_CONFLICT_ID_ERROR;
00903         if(CANx == LPC_CAN1)
00904         {
00905                 tmp = 0;
00906         }
00907         else
00908         {
00909                 tmp = 1;
00910         }
00911
00912         total =((CANAF_FullCAN_cnt+1)>>1)+ CANAF_FullCAN_cnt*3 +((CANAF_std_cnt + 1) >> 1)+  \
00913                         CANAF_gstd_cnt + CANAF_ext_cnt + (CANAF_gext_cnt<<1);
00914
00915         /* Setup Acceptance Filter Configuration
00916         Acceptance Filter Mode Register = Off */
00917         LPC_CANAF->AFMR = 0x00000001;
00918
00919 /*********Add Group of Standard Identifier Frame Format************/
00920         if(format == STD_ID_FORMAT)
00921         {
00922                 if ((total >= 512)){//don't have enough space
00923                         return CAN_OBJECTS_FULL_ERROR;
00924                 }
00925                 lowerID &=0x7FF; //mask ID
00926                 upperID &=0x7FF;
00927                 entry1  = (tmp << 29)|(lowerID << 16)|(tmp << 13)|(upperID << 0);
00928                 cnt1 = ((CANAF_FullCAN_cnt+1)>>1) + ((CANAF_std_cnt + 1) >> 1);
00929
00930                 //if this is the first Group standard ID entry
00931                 if(CANAF_gstd_cnt == 0)
00932                 {
00933                         LPC_CANAF_RAM->mask[cnt1] = entry1;
00934                 }
00935                 else
00936                 {
00937                         //find the position to add new Group entry
00938                         bound1 = ((CANAF_FullCAN_cnt+1)>>1) + ((CANAF_std_cnt + 1) >> 1) + CANAF_gstd_cnt;
00939                         while(cnt1 < bound1)
00940                         {
00941                                 //compare controller first
00942                                 while((LPC_CANAF_RAM->mask[cnt1] >> 29)< (entry1 >> 29))//increase until meet greater or equal controller
00943                                         cnt1++;
00944                                 buf0 = LPC_CANAF_RAM->mask[cnt1];
00945                                 if((LPC_CANAF_RAM->mask[cnt1] >> 29)> (entry1 >> 29)) //meet greater controller
00946                                 {
00947                                         //add at this position
00948                                         LPC_CANAF_RAM->mask[cnt1] = entry1;
00949                                         break;
00950                                 }
00951                                 else //meet equal controller
00952                                 {
00953                                         LID  = (buf0 >> 16)&0x7FF;
00954                                         UID  = buf0 & 0x7FF;
00955                                         if (upperID <= LID)
00956                                         {
00957                                                 //add new entry before this entry
00958                                                 LPC_CANAF_RAM->mask[cnt1] = entry1;
00959                                                 break;
00960                                         }
00961                                         else if (lowerID >= UID)
00962                                         {
00963                                                 //load next entry to compare
00964                                                 cnt1 ++;
00965                                         }
00966                                         else
00967                                                 return CAN_CONFLICT_ID_ERROR;
00968                                 }
00969                         }
00970                         if(cnt1 >= bound1)
00971                         {
00972                                 //add new entry at the last position in this list
00973                                 buf0 = LPC_CANAF_RAM->mask[cnt1];
00974                                 LPC_CANAF_RAM->mask[cnt1] = entry1;
00975                         }
00976
00977                         //remove all remaining entry of this section one place up
00978                         bound1 = total - cnt1;
00979                         while(bound1--)
00980                         {
00981                                 cnt1++;
00982                                 buf1 = LPC_CANAF_RAM->mask[cnt1];
00983                                 LPC_CANAF_RAM->mask[cnt1] = buf0;
00984                                 buf0 = buf1;
00985                         }
00986                 }
00987                 CANAF_gstd_cnt++;
00988                 //update address values
00989                 LPC_CANAF->EFF_sa     +=0x04 ;
00990                 LPC_CANAF->EFF_GRP_sa +=0x04;
00991                 LPC_CANAF->ENDofTable +=0x04;
00992         }
00993
00994
00995 /*********Add Group of Extended Identifier Frame Format************/
00996         else
00997         {
00998                 if ((total >= 511)){//don't have enough space
00999                         return CAN_OBJECTS_FULL_ERROR;
01000                 }
01001                 lowerID  &= 0x1FFFFFFF; //mask ID
01002                 upperID &= 0x1FFFFFFF;
01003                 entry1   = (tmp << 29)|(lowerID << 0);
01004                 entry2   = (tmp << 29)|(upperID << 0);
01005
01006                 cnt1 = ((CANAF_FullCAN_cnt+1)>>1) + ((CANAF_std_cnt + 1) >> 1) + CANAF_gstd_cnt + CANAF_ext_cnt;
01007                 //if this is the first Group standard ID entry
01008                 if(CANAF_gext_cnt == 0)
01009                 {
01010                         LPC_CANAF_RAM->mask[cnt1] = entry1;
01011                         LPC_CANAF_RAM->mask[cnt1+1] = entry2;
01012                 }
01013                 else
01014                 {
01015                         //find the position to add new Group entry
01016                         bound1 = ((CANAF_FullCAN_cnt+1)>>1) + ((CANAF_std_cnt + 1) >> 1) + CANAF_gstd_cnt \
01017                                                 + CANAF_ext_cnt + (CANAF_gext_cnt<<1);
01018                         while(cnt1 < bound1)
01019                         {
01020                                 while((LPC_CANAF_RAM->mask[cnt1] >>29)< tmp) //increase until meet greater or equal controller
01021                                         cnt1++;
01022                                 buf0 = LPC_CANAF_RAM->mask[cnt1];
01023                                 buf1 = LPC_CANAF_RAM->mask[cnt1+1];
01024                                 if((LPC_CANAF_RAM->mask[cnt1] >> 29)> (entry1 >> 29)) //meet greater controller
01025                                 {
01026                                         //add at this position
01027                                         LPC_CANAF_RAM->mask[cnt1] = entry1;
01028                                         LPC_CANAF_RAM->mask[++cnt1] = entry2;
01029                                         break;
01030                                 }
01031                                 else //meet equal controller
01032                                 {
01033                                         LID  = buf0 & 0x1FFFFFFF; //mask ID
01034                                         UID  = buf1 & 0x1FFFFFFF;
01035                                         if (upperID <= LID)
01036                                         {
01037                                                 //add new entry before this entry
01038                                                 LPC_CANAF_RAM->mask[cnt1] = entry1;
01039                                                 LPC_CANAF_RAM->mask[++cnt1] = entry2;
01040                                                 break;
01041                                         }
01042                                         else if (lowerID >= UID)
01043                                         {
01044                                                 //load next entry to compare
01045                                                 cnt1 +=2;
01046                                         }
01047                                         else
01048                                                 return CAN_CONFLICT_ID_ERROR;
01049                                 }
01050                         }
01051                         if(cnt1 >= bound1)
01052                         {
01053                                 //add new entry at the last position in this list
01054                                 buf0 = LPC_CANAF_RAM->mask[cnt1];
01055                                 buf1 = LPC_CANAF_RAM->mask[cnt1+1];
01056                                 LPC_CANAF_RAM->mask[cnt1]   = entry1;
01057                                 LPC_CANAF_RAM->mask[++cnt1] = entry2;
01058                         }
01059                         //remove all remaining entry of this section two place up
01060                         bound1 = total - cnt1 + 1;
01061                         cnt1++;
01062                         while(bound1>0)
01063                         {
01064                                 entry1 = LPC_CANAF_RAM->mask[cnt1];
01065                                 entry2 = LPC_CANAF_RAM->mask[cnt1+1];
01066                                 LPC_CANAF_RAM->mask[cnt1]   = buf0;
01067                                 LPC_CANAF_RAM->mask[cnt1+1] = buf1;
01068                                 buf0 = entry1;
01069                                 buf1 = entry2;
01070                                 cnt1   +=2;
01071                                 bound1 -=2;
01072                         }
01073                 }
01074                 CANAF_gext_cnt++;
01075                 //update address values
01076                 LPC_CANAF->ENDofTable +=0x08;
01077         }
01078         LPC_CANAF->AFMR = 0x04;
01079         return CAN_OK;
01080 }
01081
01082 /********************************************************************/
01096 CAN_ERROR CAN_RemoveEntry(AFLUT_ENTRY_Type EntryType, uint16_t position)
01097 {
01098         uint16_t cnt, bound, total;
01099         uint32_t buf0, buf1;
01100         CHECK_PARAM(PARAM_AFLUT_ENTRY_TYPE(EntryType));
01101         CHECK_PARAM(PARAM_POSITION(position));
01102
01103         /* Setup Acceptance Filter Configuration
01104         Acceptance Filter Mode Register = Off */
01105         LPC_CANAF->AFMR = 0x00000001;
01106         total = ((CANAF_FullCAN_cnt+1)>>1)+((CANAF_std_cnt + 1) >> 1) + \
01107                         CANAF_gstd_cnt + CANAF_ext_cnt + (CANAF_gext_cnt<<1);
01108
01109
01110 /************** Remove FullCAN Entry *************/
01111         if(EntryType == FULLCAN_ENTRY)
01112         {
01113                 if((CANAF_FullCAN_cnt==0)||(position >= CANAF_FullCAN_cnt))
01114                 {
01115                         return CAN_ENTRY_NOT_EXIT_ERROR;
01116                 }
01117                 else
01118                 {
01119                         cnt = position >> 1;
01120                         buf0 = LPC_CANAF_RAM->mask[cnt];
01121                         bound = (CANAF_FullCAN_cnt - position -1)>>1;
01122                         if((position & 0x0001) == 0) //event position
01123                         {
01124                                 while(bound--)
01125                                 {
01126                                         //remove all remaining FullCAN entry one place down
01127                                         buf1  = LPC_CANAF_RAM->mask[cnt+1];
01128                                         LPC_CANAF_RAM->mask[cnt] = (buf1 >> 16) | (buf0 << 16);
01129                                         buf0  = buf1;
01130                                         cnt++;
01131                                 }
01132                         }
01133                         else //odd position
01134                         {
01135                                 while(bound--)
01136                                 {
01137                                         //remove all remaining FullCAN entry one place down
01138                                         buf1  = LPC_CANAF_RAM->mask[cnt+1];
01139                                         LPC_CANAF_RAM->mask[cnt] = (buf0 & 0xFFFF0000)|(buf1 >> 16);
01140                                         LPC_CANAF_RAM->mask[cnt+1] = LPC_CANAF_RAM->mask[cnt+1] << 16;
01141                                         buf0  = buf1<<16;
01142                                         cnt++;
01143                                 }
01144                         }
01145                         if((CANAF_FullCAN_cnt & 0x0001) == 0)
01146                         {
01147                                 if((position & 0x0001)==0)
01148                                         LPC_CANAF_RAM->mask[cnt] = (buf0 << 16) | (0x0000FFFF);
01149                                 else
01150                                         LPC_CANAF_RAM->mask[cnt] = buf0 | 0x0000FFFF;
01151                         }
01152                         else
01153                         {
01154                                 //remove all remaining section one place down
01155                                 cnt = (CANAF_FullCAN_cnt + 1)>>1;
01156                                 bound = total + CANAF_FullCAN_cnt * 3;
01157                                 while(bound>cnt)
01158                                 {
01159                                         LPC_CANAF_RAM->mask[cnt-1] = LPC_CANAF_RAM->mask[cnt];
01160                                         cnt++;
01161                                 }
01162                                 LPC_CANAF_RAM->mask[cnt-1]=0x00;
01163                                 //update address values
01164                                 LPC_CANAF->SFF_sa         -=0x04;
01165                                 LPC_CANAF->SFF_GRP_sa -=0x04 ;
01166                                 LPC_CANAF->EFF_sa     -=0x04 ;
01167                                 LPC_CANAF->EFF_GRP_sa -=0x04;
01168                                 LPC_CANAF->ENDofTable -=0x04;
01169                         }
01170                         CANAF_FullCAN_cnt--;
01171
01172                         //delete its FullCAN Object in the FullCAN Object section
01173                         //remove all remaining FullCAN Object three place down
01174                         cnt = total + position * 3;
01175                         bound = (CANAF_FullCAN_cnt - position + 1) * 3;
01176
01177                         while(bound)
01178                         {
01179                                 LPC_CANAF_RAM->mask[cnt]=LPC_CANAF_RAM->mask[cnt+3];;
01180                                 LPC_CANAF_RAM->mask[cnt+1]=LPC_CANAF_RAM->mask[cnt+4];
01181                                 LPC_CANAF_RAM->mask[cnt+2]=LPC_CANAF_RAM->mask[cnt+5];
01182                                 bound -=3;
01183                                 cnt   +=3;
01184                         }
01185                 }
01186         }
01187
01188 /************** Remove Explicit Standard ID Entry *************/
01189         else if(EntryType == EXPLICIT_STANDARD_ENTRY)
01190         {
01191                 if((CANAF_std_cnt==0)||(position >= CANAF_std_cnt))
01192                 {
01193                         return CAN_ENTRY_NOT_EXIT_ERROR;
01194                 }
01195                 else
01196                 {
01197                         cnt = ((CANAF_FullCAN_cnt+1)>>1)+ (position >> 1);
01198                         buf0 = LPC_CANAF_RAM->mask[cnt];
01199                         bound = (CANAF_std_cnt - position - 1)>>1;
01200                         if((position & 0x0001) == 0) //event position
01201                         {
01202                                 while(bound--)
01203                                 {
01204                                         //remove all remaining FullCAN entry one place down
01205                                         buf1  = LPC_CANAF_RAM->mask[cnt+1];
01206                                         LPC_CANAF_RAM->mask[cnt] = (buf1 >> 16) | (buf0 << 16);
01207                                         buf0  = buf1;
01208                                         cnt++;
01209                                 }
01210                         }
01211                         else //odd position
01212                         {
01213                                 while(bound--)
01214                                 {
01215                                         //remove all remaining FullCAN entry one place down
01216                                         buf1  = LPC_CANAF_RAM->mask[cnt+1];
01217                                         LPC_CANAF_RAM->mask[cnt] = (buf0 & 0xFFFF0000)|(buf1 >> 16);
01218                                         LPC_CANAF_RAM->mask[cnt+1] = LPC_CANAF_RAM->mask[cnt+1] << 16;
01219                                         buf0  = buf1<<16;
01220                                         cnt++;
01221                                 }
01222                         }
01223                         if((CANAF_std_cnt & 0x0001) == 0)
01224                         {
01225                                 if((position & 0x0001)==0)
01226                                         LPC_CANAF_RAM->mask[cnt] = (buf0 << 16) | (0x0000FFFF);
01227                                 else
01228                                         LPC_CANAF_RAM->mask[cnt] = buf0 | 0x0000FFFF;
01229                         }
01230                         else
01231                         {
01232                                 //remove all remaining section one place down
01233                                 cnt = ((CANAF_FullCAN_cnt + 1)>>1) + ((CANAF_std_cnt + 1) >> 1);
01234                                 bound = total + CANAF_FullCAN_cnt * 3;
01235                                 while(bound>cnt)
01236                                 {
01237                                         LPC_CANAF_RAM->mask[cnt-1] = LPC_CANAF_RAM->mask[cnt];
01238                                         cnt++;
01239                                 }
01240                                 LPC_CANAF_RAM->mask[cnt-1]=0x00;
01241                                 //update address value
01242                                 LPC_CANAF->SFF_GRP_sa -=0x04 ;
01243                                 LPC_CANAF->EFF_sa     -=0x04 ;
01244                                 LPC_CANAF->EFF_GRP_sa -=0x04;
01245                                 LPC_CANAF->ENDofTable -=0x04;
01246                         }
01247                         CANAF_std_cnt--;
01248                 }
01249         }
01250
01251 /************** Remove Group of Standard ID Entry *************/
01252         else if(EntryType == GROUP_STANDARD_ENTRY)
01253         {
01254                 if((CANAF_gstd_cnt==0)||(position >= CANAF_gstd_cnt))
01255                 {
01256                         return CAN_ENTRY_NOT_EXIT_ERROR;
01257                 }
01258                 else
01259                 {
01260                         cnt = ((CANAF_FullCAN_cnt + 1)>>1) + ((CANAF_std_cnt + 1) >> 1)+ position + 1;
01261                         bound = total + CANAF_FullCAN_cnt * 3;
01262                         while (cnt<bound)
01263                         {
01264                                 LPC_CANAF_RAM->mask[cnt-1] = LPC_CANAF_RAM->mask[cnt];
01265                                 cnt++;
01266                         }
01267                         LPC_CANAF_RAM->mask[cnt-1]=0x00;
01268                 }
01269                 CANAF_gstd_cnt--;
01270                 //update address value
01271                 LPC_CANAF->EFF_sa     -=0x04;
01272                 LPC_CANAF->EFF_GRP_sa -=0x04;
01273                 LPC_CANAF->ENDofTable -=0x04;
01274         }
01275
01276 /************** Remove Explicit Extended ID Entry *************/
01277         else if(EntryType == EXPLICIT_EXTEND_ENTRY)
01278         {
01279                 if((CANAF_ext_cnt==0)||(position >= CANAF_ext_cnt))
01280                 {
01281                         return CAN_ENTRY_NOT_EXIT_ERROR;
01282                 }
01283                 else
01284                 {
01285                         cnt = ((CANAF_FullCAN_cnt + 1)>>1) + ((CANAF_std_cnt + 1) >> 1)+ CANAF_gstd_cnt + position + 1;
01286                         bound = total + CANAF_FullCAN_cnt * 3;
01287                         while (cnt<bound)
01288                         {
01289                                 LPC_CANAF_RAM->mask[cnt-1] = LPC_CANAF_RAM->mask[cnt];
01290                                 cnt++;
01291                         }
01292                         LPC_CANAF_RAM->mask[cnt-1]=0x00;
01293                 }
01294                 CANAF_ext_cnt--;
01295                 LPC_CANAF->EFF_GRP_sa -=0x04;
01296                 LPC_CANAF->ENDofTable -=0x04;
01297         }
01298
01299 /************** Remove Group of Extended ID Entry *************/
01300         else
01301         {
01302                 if((CANAF_gext_cnt==0)||(position >= CANAF_gext_cnt))
01303                 {
01304                         return CAN_ENTRY_NOT_EXIT_ERROR;
01305                 }
01306                 else
01307                 {
01308                         cnt = total - (CANAF_gext_cnt<<1) + (position<<1);
01309                         bound = total + CANAF_FullCAN_cnt * 3;
01310                         while (cnt<bound)
01311                         {
01312                                 //remove all remaining entry two place up
01313                                 LPC_CANAF_RAM->mask[cnt] = LPC_CANAF_RAM->mask[cnt+2];
01314                                 LPC_CANAF_RAM->mask[cnt+1] = LPC_CANAF_RAM->mask[cnt+3];
01315                                 cnt+=2;
01316                         }
01317                 }
01318                 CANAF_gext_cnt--;
01319                 LPC_CANAF->ENDofTable -=0x08;
01320         }
01321         LPC_CANAF->AFMR = 0x04;
01322         return CAN_OK;
01323 }
01324
01325 /********************************************************************/
01336 Status CAN_SendMsg (LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg)
01337 {
01338         uint32_t data;
01339         CHECK_PARAM(PARAM_CANx(CANx));
01340         CHECK_PARAM(PARAM_ID_FORMAT(CAN_Msg->format));
01341         if(CAN_Msg->format==STD_ID_FORMAT)
01342         {
01343                 CHECK_PARAM(PARAM_ID_11(CAN_Msg->id));
01344         }
01345         else
01346         {
01347                 CHECK_PARAM(PARAM_ID_29(CAN_Msg->id));
01348         }
01349         CHECK_PARAM(PARAM_DLC(CAN_Msg->len));
01350         CHECK_PARAM(PARAM_FRAME_TYPE(CAN_Msg->type));
01351
01352         //Check status of Transmit Buffer 1
01353         if (CANx->SR & (1<<2))
01354         {
01355                 /* Transmit Channel 1 is available */
01356                 /* Write frame informations and frame data into its CANxTFI1,
01357                  * CANxTID1, CANxTDA1, CANxTDB1 register */
01358                 CANx->TFI1 &= ~0x000F0000;
01359                 CANx->TFI1 |= (CAN_Msg->len)<<16;
01360                 if(CAN_Msg->type == REMOTE_FRAME)
01361                 {
01362                         CANx->TFI1 |= (1<<30); //set bit RTR
01363                 }
01364                 else
01365                 {
01366                         CANx->TFI1 &= ~(1<<30);
01367                 }
01368                 if(CAN_Msg->format == EXT_ID_FORMAT)
01369                 {
01370                         CANx->TFI1 |= (0x80000000); //set bit FF
01371                 }
01372                 else
01373                 {
01374                         CANx->TFI1 &= ~(0x80000000);
01375                 }
01376
01377                 /* Write CAN ID*/
01378                 CANx->TID1 = CAN_Msg->id;
01379
01380                 /*Write first 4 data bytes*/
01381                 data = (CAN_Msg->dataA[0])|(((CAN_Msg->dataA[1]))<<8)|((CAN_Msg->dataA[2])<<16)|((CAN_Msg->dataA[3])<<24);
01382                 CANx->TDA1 = data;
01383
01384                 /*Write second 4 data bytes*/
01385                 data = (CAN_Msg->dataB[0])|(((CAN_Msg->dataB[1]))<<8)|((CAN_Msg->dataB[2])<<16)|((CAN_Msg->dataB[3])<<24);
01386                 CANx->TDB1 = data;
01387
01388                  /*Write transmission request*/
01389                  CANx->CMR = 0x21;
01390                  return SUCCESS;
01391         }
01392         //check status of Transmit Buffer 2
01393         else if(CANx->SR & (1<<10))
01394         {
01395                 /* Transmit Channel 2 is available */
01396                 /* Write frame informations and frame data into its CANxTFI2,
01397                  * CANxTID2, CANxTDA2, CANxTDB2 register */
01398                 CANx->TFI2 &= ~0x000F0000;
01399                 CANx->TFI2 |= (CAN_Msg->len)<<16;
01400                 if(CAN_Msg->type == REMOTE_FRAME)
01401                 {
01402                         CANx->TFI2 |= (1<<30); //set bit RTR
01403                 }
01404                 else
01405                 {
01406                         CANx->TFI2 &= ~(1<<30);
01407                 }
01408                 if(CAN_Msg->format == EXT_ID_FORMAT)
01409                 {
01410                         CANx->TFI2 |= (0x80000000); //set bit FF
01411                 }
01412                 else
01413                 {
01414                         CANx->TFI2 &= ~(0x80000000);
01415                 }
01416
01417                 /* Write CAN ID*/
01418                 CANx->TID2 = CAN_Msg->id;
01419
01420                 /*Write first 4 data bytes*/
01421                 data = (CAN_Msg->dataA[0])|(((CAN_Msg->dataA[1]))<<8)|((CAN_Msg->dataA[2])<<16)|((CAN_Msg->dataA[3])<<24);
01422                 CANx->TDA2 = data;
01423
01424                 /*Write second 4 data bytes*/
01425                 data = (CAN_Msg->dataB[0])|(((CAN_Msg->dataB[1]))<<8)|((CAN_Msg->dataB[2])<<16)|((CAN_Msg->dataB[3])<<24);
01426                 CANx->TDB2 = data;
01427
01428                 /*Write transmission request*/
01429                 CANx->CMR = 0x41;
01430                 return SUCCESS;
01431         }
01432         //check status of Transmit Buffer 3
01433         else if (CANx->SR & (1<<18))
01434         {
01435                 /* Transmit Channel 3 is available */
01436                 /* Write frame informations and frame data into its CANxTFI3,
01437                  * CANxTID3, CANxTDA3, CANxTDB3 register */
01438                 CANx->TFI3 &= ~0x000F0000;
01439                 CANx->TFI3 |= (CAN_Msg->len)<<16;
01440                 if(CAN_Msg->type == REMOTE_FRAME)
01441                 {
01442                         CANx->TFI3 |= (1<<30); //set bit RTR
01443                 }
01444                 else
01445                 {
01446                         CANx->TFI3 &= ~(1<<30);
01447                 }
01448                 if(CAN_Msg->format == EXT_ID_FORMAT)
01449                 {
01450                         CANx->TFI3 |= (0x80000000); //set bit FF
01451                 }
01452                 else
01453                 {
01454                         CANx->TFI3 &= ~(0x80000000);
01455                 }
01456
01457                 /* Write CAN ID*/
01458                 CANx->TID3 = CAN_Msg->id;
01459
01460                 /*Write first 4 data bytes*/
01461                 data = (CAN_Msg->dataA[0])|(((CAN_Msg->dataA[1]))<<8)|((CAN_Msg->dataA[2])<<16)|((CAN_Msg->dataA[3])<<24);
01462                 CANx->TDA3 = data;
01463
01464                 /*Write second 4 data bytes*/
01465                 data = (CAN_Msg->dataB[0])|(((CAN_Msg->dataB[1]))<<8)|((CAN_Msg->dataB[2])<<16)|((CAN_Msg->dataB[3])<<24);
01466                 CANx->TDB3 = data;
01467
01468                 /*Write transmission request*/
01469                 CANx->CMR = 0x81;
01470                 return SUCCESS;
01471         }
01472         else
01473         {
01474                 return ERROR;
01475         }
01476 }
01477
01478 /********************************************************************/
01489 Status CAN_ReceiveMsg (LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg)
01490 {
01491         uint32_t data;
01492
01493         CHECK_PARAM(PARAM_CANx(CANx));
01494
01495         //check status of Receive Buffer
01496         if((CANx->SR &0x00000001))
01497         {
01498                 /* Receive message is available */
01499                 /* Read frame informations */
01500                 CAN_Msg->format   = (uint8_t)(((CANx->RFS) & 0x80000000)>>31);
01501                 CAN_Msg->type     = (uint8_t)(((CANx->RFS) & 0x40000000)>>30);
01502                 CAN_Msg->len      = (uint8_t)(((CANx->RFS) & 0x000F0000)>>16);
01503
01504
01505                 /* Read CAN message identifier */
01506                 CAN_Msg->id = CANx->RID;
01507
01508                 /* Read the data if received message was DATA FRAME */
01509                 if (CAN_Msg->type == DATA_FRAME)
01510                 {
01511                         /* Read first 4 data bytes */
01512                         data = CANx->RDA;
01513                         *((uint8_t *) &CAN_Msg->dataA[0])= data & 0x000000FF;
01514                         *((uint8_t *) &CAN_Msg->dataA[1])= (data & 0x0000FF00)>>8;;
01515                         *((uint8_t *) &CAN_Msg->dataA[2])= (data & 0x00FF0000)>>16;
01516                         *((uint8_t *) &CAN_Msg->dataA[3])= (data & 0xFF000000)>>24;
01517
01518                         /* Read second 4 data bytes */
01519                         data = CANx->RDB;
01520                         *((uint8_t *) &CAN_Msg->dataB[0])= data & 0x000000FF;
01521                         *((uint8_t *) &CAN_Msg->dataB[1])= (data & 0x0000FF00)>>8;
01522                         *((uint8_t *) &CAN_Msg->dataB[2])= (data & 0x00FF0000)>>16;
01523                         *((uint8_t *) &CAN_Msg->dataB[3])= (data & 0xFF000000)>>24;
01524
01525                 /*release receive buffer*/
01526                 CANx->CMR = 0x04;
01527                 }
01528                 else
01529                 {
01530                         /* Received Frame is a Remote Frame, not have data, we just receive
01531                          * message information only */
01532                         CANx->CMR = 0x04; /*release receive buffer*/
01533                         return SUCCESS;
01534                 }
01535         }
01536         else
01537         {
01538                 // no receive message available
01539                 return ERROR;
01540         }
01541         return SUCCESS;
01542 }
01543
01544 /********************************************************************/
01554 CAN_ERROR FCAN_ReadObj (LPC_CANAF_TypeDef* CANAFx, CAN_MSG_Type *CAN_Msg)
01555 {
01556         uint32_t *pSrc, data;
01557         uint32_t interrut_word, msg_idx, test_bit, head_idx, tail_idx;
01558
01559         CHECK_PARAM(PARAM_CANAFx(CANAFx));
01560
01561         interrut_word = 0;
01562
01563         if (LPC_CANAF->FCANIC0 != 0)
01564         {
01565                 interrut_word = LPC_CANAF->FCANIC0;
01566                 head_idx = 0;
01567                 tail_idx = 31;
01568         }
01569         else if (LPC_CANAF->FCANIC1 != 0)
01570         {
01571                 interrut_word = LPC_CANAF->FCANIC1;
01572                 head_idx = 32;
01573                 tail_idx = 63;
01574         }
01575
01576         if (interrut_word != 0)
01577         {
01578                 /* Detect for interrupt pending */
01579                 msg_idx = 0;
01580                 for (msg_idx = head_idx; msg_idx <= tail_idx; msg_idx++)
01581                 {
01582                         test_bit = interrut_word & 0x1;
01583                         interrut_word = interrut_word >> 1;
01584
01585                         if (test_bit)
01586                         {
01587                                 pSrc = (uint32_t *) (LPC_CANAF->ENDofTable + LPC_CANAF_RAM_BASE + msg_idx * 12);
01588
01589                         /* Has been finished updating the content */
01590                         if ((*pSrc & 0x03000000L) == 0x03000000L)
01591                         {
01592                                 /*clear semaphore*/
01593                                 *pSrc &= 0xFCFFFFFF;
01594
01595                                 /*Set to DatA*/
01596                                 pSrc++;
01597                                 /* Copy to dest buf */
01598                                 data = *pSrc;
01599                                 *((uint8_t *) &CAN_Msg->dataA[0])= data & 0x000000FF;
01600                                 *((uint8_t *) &CAN_Msg->dataA[1])= (data & 0x0000FF00)>>8;
01601                                 *((uint8_t *) &CAN_Msg->dataA[2])= (data & 0x00FF0000)>>16;
01602                                 *((uint8_t *) &CAN_Msg->dataA[3])= (data & 0xFF000000)>>24;
01603
01604                                 /*Set to DatB*/
01605                                 pSrc++;
01606                                 /* Copy to dest buf */
01607                                 data = *pSrc;
01608                                 *((uint8_t *) &CAN_Msg->dataB[0])= data & 0x000000FF;
01609                                 *((uint8_t *) &CAN_Msg->dataB[1])= (data & 0x0000FF00)>>8;
01610                                 *((uint8_t *) &CAN_Msg->dataB[2])= (data & 0x00FF0000)>>16;
01611                                 *((uint8_t *) &CAN_Msg->dataB[3])= (data & 0xFF000000)>>24;
01612                                 /*Back to Dat1*/
01613                                 pSrc -= 2;
01614
01615                                 CAN_Msg->id = *pSrc & 0x7FF;
01616                                 CAN_Msg->len = (uint8_t) (*pSrc >> 16) & 0x0F;
01617                                         CAN_Msg->format = 0; //FullCAN Object ID always is 11-bit value
01618                                         CAN_Msg->type = (uint8_t)(*pSrc >> 30) &0x01;
01619                                 /*Re-read semaphore*/
01620                                 if ((*pSrc & 0x03000000L) == 0)
01621                                 {
01622                                         return CAN_OK;
01623                                 }
01624                         }
01625                         }
01626                 }
01627         }
01628         return CAN_FULL_OBJ_NOT_RCV;
01629 }
01630 /********************************************************************/
01643 uint32_t CAN_GetCTRLStatus (LPC_CAN_TypeDef* CANx, CAN_CTRL_STS_Type arg)
01644 {
01645         CHECK_PARAM(PARAM_CANx(CANx));
01646         CHECK_PARAM(PARAM_CTRL_STS_TYPE(arg));
01647
01648         switch (arg)
01649         {
01650         case CANCTRL_GLOBAL_STS:
01651                 return CANx->GSR;
01652
01653         case CANCTRL_INT_CAP:
01654                 return CANx->ICR;
01655
01656         case CANCTRL_ERR_WRN:
01657                 return CANx->EWL;
01658
01659         default: // CANCTRL_STS
01660                 return CANx->SR;
01661         }
01662 }
01663 /********************************************************************/
01673 uint32_t CAN_GetCRStatus (LPC_CANCR_TypeDef* CANCRx, CAN_CR_STS_Type arg)
01674 {
01675         CHECK_PARAM(PARAM_CANCRx(CANCRx));
01676         CHECK_PARAM(PARAM_CR_STS_TYPE(arg));
01677
01678         switch (arg)
01679         {
01680         case CANCR_TX_STS:
01681                 return CANCRx->CANTxSR;
01682
01683         case CANCR_RX_STS:
01684                 return CANCRx->CANRxSR;
01685
01686         default:        // CANCR_MS
01687                 return CANCRx->CANMSR;
01688         }
01689 }
01690 /********************************************************************/
01714 void CAN_IRQCmd (LPC_CAN_TypeDef* CANx, CAN_INT_EN_Type arg, FunctionalState NewState)
01715 {
01716         CHECK_PARAM(PARAM_CANx(CANx));
01717         CHECK_PARAM(PARAM_INT_EN_TYPE(arg));
01718         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
01719
01720         if(NewState == ENABLE)
01721         {
01722                 if(arg==CANINT_FCE)
01723                 {
01724                         LPC_CANAF->AFMR = 0x01;
01725                         LPC_CANAF->FCANIE = 0x01;
01726                         LPC_CANAF->AFMR = 0x04;
01727                 }
01728                 else
01729                         CANx->IER |= (1 << arg);
01730         }
01731         else
01732         {
01733                 if(arg==CANINT_FCE){
01734                         LPC_CANAF->AFMR = 0x01;
01735                         LPC_CANAF->FCANIE = 0x01;
01736                         LPC_CANAF->AFMR = 0x00;
01737                 }
01738                 else
01739                         CANx->IER &= ~(1 << arg);
01740         }
01741 }
01742
01743 /********************************************************************/
01753 void CAN_SetAFMode (LPC_CANAF_TypeDef* CANAFx, CAN_AFMODE_Type AFMode)
01754 {
01755         CHECK_PARAM(PARAM_CANAFx(CANAFx));
01756         CHECK_PARAM(PARAM_AFMODE_TYPE(AFMode));
01757
01758         switch(AFMode)
01759         {
01760         case CAN_Normal:
01761                 CANAFx->AFMR = 0x00;
01762                 break;
01763         case CAN_AccOff:
01764                 CANAFx->AFMR = 0x01;
01765                 break;
01766         case CAN_AccBP:
01767                 CANAFx->AFMR = 0x02;
01768                 break;
01769         case CAN_eFCAN:
01770                 CANAFx->AFMR = 0x04;
01771                 break;
01772         }
01773 }
01774
01775 /********************************************************************/
01794 void CAN_ModeConfig(LPC_CAN_TypeDef* CANx, CAN_MODE_Type mode, FunctionalState NewState)
01795 {
01796         CHECK_PARAM(PARAM_CANx(CANx));
01797         CHECK_PARAM(PARAM_MODE_TYPE(mode));
01798         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
01799
01800         switch(mode)
01801         {
01802         case CAN_OPERATING_MODE:
01803                 CANx->MOD = 0x00;
01804                 break;
01805         case CAN_RESET_MODE:
01806                 if(NewState == ENABLE)
01807                         CANx->MOD |=CAN_MOD_RM;
01808                 else
01809                         CANx->MOD &= ~CAN_MOD_RM;
01810                 break;
01811         case CAN_LISTENONLY_MODE:
01812                 CANx->MOD |=CAN_MOD_RM;//Enter Reset mode
01813                 if(NewState == ENABLE)
01814                         CANx->MOD |=CAN_MOD_LOM;
01815                 else
01816                         CANx->MOD &=~CAN_MOD_LOM;
01817                 CANx->MOD &=~CAN_MOD_RM;//Release Reset mode
01818                 break;
01819         case CAN_SELFTEST_MODE:
01820                 CANx->MOD |=CAN_MOD_RM;//Enter Reset mode
01821                 if(NewState == ENABLE)
01822                         CANx->MOD |=CAN_MOD_STM;
01823                 else
01824                         CANx->MOD &=~CAN_MOD_STM;
01825                 CANx->MOD &=~CAN_MOD_RM;//Release Reset mode
01826                 break;
01827         case CAN_TXPRIORITY_MODE:
01828                 if(NewState == ENABLE)
01829                         CANx->MOD |=CAN_MOD_TPM;
01830                 else
01831                         CANx->MOD &=~CAN_MOD_TPM;
01832                 break;
01833         case CAN_SLEEP_MODE:
01834                 if(NewState == ENABLE)
01835                         CANx->MOD |=CAN_MOD_SM;
01836                 else
01837                         CANx->MOD &=~CAN_MOD_SM;
01838                 break;
01839         case CAN_RXPOLARITY_MODE:
01840                 if(NewState == ENABLE)
01841                         CANx->MOD |=CAN_MOD_RPM;
01842                 else
01843                         CANx->MOD &=~CAN_MOD_RPM;
01844                 break;
01845         case CAN_TEST_MODE:
01846                 if(NewState == ENABLE)
01847                         CANx->MOD |=CAN_MOD_TM;
01848                 else
01849                         CANx->MOD &=~CAN_MOD_TM;
01850                 break;
01851         }
01852 }
01853 /*********************************************************************/
01869 void CAN_SetCommand(LPC_CAN_TypeDef* CANx, uint32_t CMRType)
01870 {
01871         CHECK_PARAM(PARAM_CANx(CANx));
01872         CANx->CMR |= CMRType;
01873 }
01874
01875 /*********************************************************************/
01882 uint32_t CAN_IntGetStatus(LPC_CAN_TypeDef* CANx)
01883 {
01884         CHECK_PARAM(PARAM_CANx(CANx));
01885         return CANx->ICR;
01886 }
01887
01888 /*********************************************************************/
01895 IntStatus CAN_FullCANIntGetStatus (LPC_CANAF_TypeDef* CANAFx)
01896 {
01897         CHECK_PARAM( PARAM_CANAFx(CANAFx));
01898         if (CANAFx->FCANIE)
01899                 return SET;
01900         return RESET;
01901 }
01902
01903 /*********************************************************************/
01911 uint32_t CAN_FullCANPendGetStatus(LPC_CANAF_TypeDef* CANAFx, FullCAN_IC_Type type)
01912 {
01913         CHECK_PARAM(PARAM_CANAFx(CANAFx));
01914         CHECK_PARAM( PARAM_FULLCAN_IC(type));
01915         if (type == FULLCAN_IC0)
01916                 return CANAFx->FCANIC0;
01917         return CANAFx->FCANIC1;
01918 }
01919 /* End of Public Variables ---------------------------------------------------------- */
01924 #endif /* _CAN */
01925
01930 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_can.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_can.h                   2010-06-18
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_CAN_H_
00034 #define LPC17XX_CAN_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040 #ifdef __cplusplus
00041 extern "C"
00042 {
00043 #endif
00044
00045 /* Public Types --------------------------------------------------------------- */
00049 #define MSG_ENABLE                              ((uint8_t)(0))
00050 #define MSG_DISABLE                             ((uint8_t)(1))
00051 #define CAN1_CTRL                               ((uint8_t)(0))
00052 #define CAN2_CTRL                               ((uint8_t)(1))
00053 #define PARAM_FULLCAN_IC(n)             ((n==FULLCAN_IC0)||(n==FULLCAN_IC1))
00054 #define ID_11                                   1
00055 #define MAX_HW_FULLCAN_OBJ              64
00056 #define MAX_SW_FULLCAN_OBJ              32
00057
00062 /* Private Macros ------------------------------------------------------------- */
00067 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00068 /*********************************************************************/
00072 #define CAN_MOD_RM                      ((uint32_t)(1))
00073
00074 #define CAN_MOD_LOM                     ((uint32_t)(1<<1))
00075
00076 #define CAN_MOD_STM                     ((uint32_t)(1<<2))
00077
00078 #define CAN_MOD_TPM                     ((uint32_t)(1<<3))
00079
00080 #define CAN_MOD_SM                      ((uint32_t)(1<<4))
00081
00082 #define CAN_MOD_RPM                     ((uint32_t)(1<<5))
00083
00084 #define CAN_MOD_TM                      ((uint32_t)(1<<7))
00085
00086 /*********************************************************************/
00090 #define CAN_CMR_TR                      ((uint32_t)(1))
00091
00092 #define CAN_CMR_AT                      ((uint32_t)(1<<1))
00093
00094 #define CAN_CMR_RRB                     ((uint32_t)(1<<2))
00095
00096 #define CAN_CMR_CDO                     ((uint32_t)(1<<3))
00097
00098 #define CAN_CMR_SRR                     ((uint32_t)(1<<4))
00099
00100 #define CAN_CMR_STB1            ((uint32_t)(1<<5))
00101
00102 #define CAN_CMR_STB2            ((uint32_t)(1<<6))
00103
00104 #define CAN_CMR_STB3            ((uint32_t)(1<<7))
00105
00106 /*********************************************************************/
00110 #define CAN_GSR_RBS                     ((uint32_t)(1))
00111
00112 #define CAN_GSR_DOS                     ((uint32_t)(1<<1))
00113
00114 #define CAN_GSR_TBS                     ((uint32_t)(1<<2))
00115
00116 #define CAN_GSR_TCS                     ((uint32_t)(1<<3))
00117
00118 #define CAN_GSR_RS                      ((uint32_t)(1<<4))
00119
00120 #define CAN_GSR_TS                      ((uint32_t)(1<<5))
00121
00122 #define CAN_GSR_ES                      ((uint32_t)(1<<6))
00123
00124 #define CAN_GSR_BS                      ((uint32_t)(1<<7))
00125
00126 #define CAN_GSR_RXERR(n)        ((uint32_t)((n&0xFF)<<16))
00127
00128 #define CAN_GSR_TXERR(n)        ((uint32_t)(n&0xFF)<<24))
00129
00130 /*********************************************************************/
00134 #define CAN_ICR_RI                      ((uint32_t)(1))
00135
00136 #define CAN_ICR_TI1                     ((uint32_t)(1<<1))
00137
00138 #define CAN_ICR_EI                      ((uint32_t)(1<<2))
00139
00140 #define CAN_ICR_DOI                     ((uint32_t)(1<<3))
00141
00142 #define CAN_ICR_WUI                     ((uint32_t)(1<<4))
00143
00144 #define CAN_ICR_EPI                     ((uint32_t)(1<<5))
00145
00146 #define CAN_ICR_ALI                     ((uint32_t)(1<<6))
00147
00148 #define CAN_ICR_BEI                     ((uint32_t)(1<<7))
00149
00150 #define CAN_ICR_IDI                     ((uint32_t)(1<<8))
00151
00152 #define CAN_ICR_TI2                     ((uint32_t)(1<<9))
00153
00154 #define CAN_ICR_TI3                     ((uint32_t)(1<<10))
00155
00156 #define CAN_ICR_ERRBIT(n)       ((uint32_t)((n&0x1F)<<16))
00157
00158 #define CAN_ICR_ERRDIR          ((uint32_t)(1<<21))
00159
00160 #define CAN_ICR_ERRC(n)         ((uint32_t)((n&0x3)<<22))
00161
00162 #define CAN_ICR_ALCBIT(n)               ((uint32_t)((n&0xFF)<<24))
00163
00164 /*********************************************************************/
00168 #define CAN_IER_RIE                     ((uint32_t)(1))
00169
00170 #define CAN_IER_TIE1            ((uint32_t)(1<<1))
00171
00172 #define CAN_IER_EIE                     ((uint32_t)(1<<2))
00173
00174 #define CAN_IER_DOIE            ((uint32_t)(1<<3))
00175
00176 #define CAN_IER_WUIE            ((uint32_t)(1<<4))
00177
00178 #define CAN_IER_EPIE            ((uint32_t)(1<<5))
00179
00180 #define CAN_IER_ALIE            ((uint32_t)(1<<6))
00181
00182 #define CAN_IER_BEIE            ((uint32_t)(1<<7))
00183
00184 #define CAN_IER_IDIE            ((uint32_t)(1<<8))
00185
00186 #define CAN_IER_TIE2            ((uint32_t)(1<<9))
00187
00188 #define CAN_IER_TIE3            ((uint32_t)(1<<10))
00189
00190 /*********************************************************************/
00194 #define CAN_BTR_BRP(n)          ((uint32_t)(n&0x3FF))
00195
00196 #define CAN_BTR_SJM(n)          ((uint32_t)((n&0x3)<<14))
00197
00198 #define CAN_BTR_TESG1(n)        ((uint32_t)(n&0xF)<<16))
00199
00200 #define CAN_BTR_TESG2(n)        ((uint32_t)(n&0xF)<<20))
00201
00202 #define CAN_BTR_SAM(n)          ((uint32_t)(1<<23))
00203
00204 /*********************************************************************/
00208 #define CAN_EWL_EWL(n)          ((uint32_t)(n&0xFF))
00209
00210 /*********************************************************************/
00214 #define CAN_SR_RBS              ((uint32_t)(1))
00215
00216 #define CAN_SR_DOS              ((uint32_t)(1<<1))
00217
00218 #define CAN_SR_TBS1             ((uint32_t)(1<<2))
00219
00220 #define CAN_SR_TCS1             ((uint32_t)(1<<3))
00221
00222 #define CAN_SR_RS               ((uint32_t)(1<<4))
00223
00224 #define CAN_SR_TS1              ((uint32_t)(1<<5))
00225
00226 #define CAN_SR_ES               ((uint32_t)(1<<6))
00227
00228 #define CAN_SR_BS               ((uint32_t)(1<<7))
00229
00230 #define CAN_SR_TBS2             ((uint32_t)(1<<10))
00231
00232 #define CAN_SR_TCS2             ((uint32_t)(1<<11))
00233
00234 #define CAN_SR_TS2              ((uint32_t)(1<<13))
00235
00236 #define CAN_SR_TBS3             ((uint32_t)(1<<18))
00237
00238 #define CAN_SR_TCS3             ((uint32_t)(1<<19))
00239
00240 #define CAN_SR_TS3              ((uint32_t)(1<<21))
00241
00242 /*********************************************************************/
00246 #define CAN_RFS_ID_INDEX(n)     ((uint32_t)(n&0x3FF))
00247
00248 #define CAN_RFS_BP                      ((uint32_t)(1<<10))
00249
00250 #define CAN_RFS_DLC(n)          ((uint32_t)((n&0xF)<<16)
00251
00252 #define CAN_RFS_RTR                     ((uint32_t)(1<<30))
00253
00254 #define CAN_RFS_FF                      ((uint32_t)(1<<31))
00255
00256 /*********************************************************************/
00260 #define CAN_RID_ID_11(n)                ((uint32_t)(n&0x7FF))
00261
00262 #define CAN_RID_ID_29(n)                ((uint32_t)(n&0x1FFFFFFF))
00263
00264 /*********************************************************************/
00268 #define CAN_RDA_DATA1(n)                ((uint32_t)(n&0xFF))
00269
00270 #define CAN_RDA_DATA2(n)                ((uint32_t)((n&0xFF)<<8))
00271
00272 #define CAN_RDA_DATA3(n)                ((uint32_t)((n&0xFF)<<16))
00273
00274 #define CAN_RDA_DATA4(n)                ((uint32_t)((n&0xFF)<<24))
00275
00276 /*********************************************************************/
00280 #define CAN_RDB_DATA5(n)                ((uint32_t)(n&0xFF))
00281
00282 #define CAN_RDB_DATA6(n)                ((uint32_t)((n&0xFF)<<8))
00283
00284 #define CAN_RDB_DATA7(n)                ((uint32_t)((n&0xFF)<<16))
00285
00286 #define CAN_RDB_DATA8(n)                ((uint32_t)((n&0xFF)<<24))
00287
00288 /*********************************************************************/
00292 #define CAN_TFI_PRIO(n)                 ((uint32_t)(n&0xFF))
00293
00294 #define CAN_TFI_DLC(n)                  ((uint32_t)((n&0xF)<<16))
00295
00296 #define CAN_TFI_RTR                             ((uint32_t)(1<<30))
00297
00298 #define CAN_TFI_FF                              ((uint32_t)(1<<31))
00299
00300 /*********************************************************************/
00304 #define CAN_TID_ID11(n)                 ((uint32_t)(n&0x7FF))
00305
00306 #define CAN_TID_ID29(n)                 ((uint32_t)(n&0x1FFFFFFF))
00307
00308 /*********************************************************************/
00312 #define CAN_TDA_DATA1(n)                ((uint32_t)(n&0xFF))
00313
00314 #define CAN_TDA_DATA2(n)                ((uint32_t)((n&0xFF)<<8))
00315
00316 #define CAN_TDA_DATA3(n)                ((uint32_t)((n&0xFF)<<16))
00317
00318 #define CAN_TDA_DATA4(n)                ((uint32_t)((n&0xFF)<<24))
00319
00320 /*********************************************************************/
00324 #define CAN_TDA_DATA5(n)                ((uint32_t)(n&0xFF))
00325
00326 #define CAN_TDA_DATA6(n)                ((uint32_t)((n&0xFF)<<8))
00327
00328 #define CAN_TDA_DATA7(n)                ((uint32_t)((n&0xFF)<<16))
00329
00330 #define CAN_TDA_DATA8(n)                ((uint32_t)((n&0xFF)<<24))
00331
00332 /*********************************************************************/
00336 #define CAN1SLEEPCLR                    ((uint32_t)(1<<1))
00337
00338 #define CAN2SLEEPCLR                    ((uint32_t)(1<<2))
00339
00340 /*********************************************************************/
00344 #define CAN_WAKEFLAGES_CAN1WAKE         ((uint32_t)(1<<1))
00345
00346 #define CAN_WAKEFLAGES_CAN2WAKE         ((uint32_t)(1<<2))
00347
00348 /*********************************************************************/
00352 #define CAN_TSR_TS1                     ((uint32_t)(1))
00353
00354 #define CAN_TSR_TS2                     ((uint32_t)(1<<1))
00355
00356 #define CAN_TSR_TBS1                    ((uint32_t)(1<<8))
00357
00358 #define CAN_TSR_TBS2                    ((uint32_t)(1<<9))
00359
00360 #define CAN_TSR_TCS1                    ((uint32_t)(1<<16))
00361
00362 #define CAN_TSR_TCS2                    ((uint32_t)(1<<17))
00363
00364 /*********************************************************************/
00368 #define CAN_RSR_RS1                             ((uint32_t)(1))
00369
00370 #define CAN_RSR_RS2                             ((uint32_t)(1<<1))
00371
00372 #define CAN_RSR_RB1                             ((uint32_t)(1<<8))
00373
00374 #define CAN_RSR_RB2                             ((uint32_t)(1<<9))
00375
00376 #define CAN_RSR_DOS1                    ((uint32_t)(1<<16))
00377
00378 #define CAN_RSR_DOS2                    ((uint32_t)(1<<17))
00379
00380 /*********************************************************************/
00384 #define CAN_MSR_E1              ((uint32_t)(1))
00385
00386 #define CAN_MSR_E2              ((uint32_t)(1<<1))
00387
00388 #define CAN_MSR_BS1             ((uint32_t)(1<<8))
00389
00390 #define CAN_MSR_BS2             ((uint32_t)(1<<9))
00391
00392 /*********************************************************************/
00396 #define CAN_AFMR_AccOff         ((uint32_t)(1))
00397
00398 #define CAN_AFMR_AccBP          ((uint32_t)(1<<1))
00399
00400 #define CAN_AFMR_eFCAN          ((uint32_t)(1<<2))
00401
00402 /*********************************************************************/
00406 #define CAN_STT_sa(n)           ((uint32_t)((n&1FF)<<2))
00407
00408 /*********************************************************************/
00412 #define CAN_SFF_GRP_sa(n)               ((uint32_t)((n&3FF)<<2))
00413
00414 /*********************************************************************/
00418 #define CAN_EFF_sa(n)           ((uint32_t)((n&1FF)<<2))
00419
00420 /*********************************************************************/
00424 #define CAN_Eff_GRP_sa(n)               ((uint32_t)((n&3FF)<<2))
00425
00426 /*********************************************************************/
00430 #define CAN_EndofTable(n)               ((uint32_t)((n&3FF)<<2))
00431
00432 /*********************************************************************/
00436 #define CAN_LUTerrAd(n)         ((uint32_t)((n&1FF)<<2))
00437
00438 /*********************************************************************/
00442 #define CAN_LUTerr              ((uint32_t)(1))
00443
00444 /*********************************************************************/
00448 #define CAN_FCANIE              ((uint32_t)(1))
00449
00450 /*********************************************************************/
00454 #define CAN_FCANIC0_IntPnd(n)   ((uint32_t)(1<<n))
00455
00456 /*********************************************************************/
00460 #define CAN_FCANIC1_IntPnd(n)   ((uint32_t)(1<<(n-32)))
00461
00462
00463 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00465 #define PARAM_CANx(x)                   ((((uint32_t*)x)==((uint32_t *)LPC_CAN1)) \
00466 ||(((uint32_t*)x)==((uint32_t *)LPC_CAN2)))
00467
00468 /*      Macro to determine if it is valid CANAF or not*/
00469 #define PARAM_CANAFx(x)                 (((uint32_t*)x)== ((uint32_t*)LPC_CANAF))
00470
00471 /*      Macro to determine if it is valid CANAF RAM or not*/
00472 #define PARAM_CANAFRAMx(x)              (((uint32_t*)x)== (uint32_t*)LPC_CANAF_RAM)
00473
00474 /*      Macro to determine if it is valid CANCR or not*/
00475 #define PARAM_CANCRx(x)                 (((uint32_t*)x)==((uint32_t*)LPC_CANCR))
00476
00478 #define PARAM_I2S_DATA(data)    ((data>=0)&&(data <= 0xFFFFFFFF))
00479
00481 #define PRAM_I2S_FREQ(freq)             ((freq>=16000)&&(freq <= 96000))
00482
00484 #define PARAM_ID_11(n)                  ((n>>11)==0) /*-- 11 bit --*/
00485 #define PARAM_ID_29(n)                  ((n>>29)==0) /*-- 29 bit --*/
00486
00488 #define PARAM_DLC(n)                    ((n>>4)==0)  /*-- 4 bit --*/
00489
00490 #define PARAM_ID_FORMAT(n)              ((n==STD_ID_FORMAT)||(n==EXT_ID_FORMAT))
00491
00493 #define PARAM_GRP_ID(x, y)              ((x<=y))
00494
00496 #define PARAM_FRAME_TYPE(n)             ((n==DATA_FRAME)||(n==REMOTE_FRAME))
00497
00499 #define PARAM_CTRL_STS_TYPE(n)  ((n==CANCTRL_GLOBAL_STS)||(n==CANCTRL_INT_CAP) \
00500 ||(n==CANCTRL_ERR_WRN)||(n==CANCTRL_STS))
00501
00503 #define PARAM_CR_STS_TYPE(n)    ((n==CANCR_TX_STS)||(n==CANCR_RX_STS) \
00504 ||(n==CANCR_MS))
00505
00506 #define PARAM_AFMODE_TYPE(n)    ((n==CAN_Normal)||(n==CAN_AccOff) \
00507 ||(n==CAN_AccBP)||(n==CAN_eFCAN))
00508
00510 #define PARAM_MODE_TYPE(n)              ((n==CAN_OPERATING_MODE)||(n==CAN_RESET_MODE) \
00511 ||(n==CAN_LISTENONLY_MODE)||(n==CAN_SELFTEST_MODE) \
00512 ||(n==CAN_TXPRIORITY_MODE)||(n==CAN_SLEEP_MODE) \
00513 ||(n==CAN_RXPOLARITY_MODE)||(n==CAN_TEST_MODE))
00514
00516 #define PARAM_CTRL(n)   ((n==CAN1_CTRL)|(n==CAN2_CTRL))
00517
00519 #define PARAM_MSG_DISABLE(n)    ((n==MSG_ENABLE)|(n==MSG_DISABLE))
00520
00522 #define PARAM_INT_EN_TYPE(n)    ((n==CANINT_RIE)||(n==CANINT_TIE1) \
00523 ||(n==CANINT_EIE)||(n==CANINT_DOIE) \
00524 ||(n==CANINT_WUIE)||(n==CANINT_EPIE) \
00525 ||(n==CANINT_ALIE)||(n==CANINT_BEIE) \
00526 ||(n==CANINT_IDIE)||(n==CANINT_TIE2) \
00527 ||(n==CANINT_TIE3)||(n==CANINT_FCE))
00528
00530 #define PARAM_AFLUT_ENTRY_TYPE(n)       ((n==FULLCAN_ENTRY)||(n==EXPLICIT_STANDARD_ENTRY)\
00531 ||(n==GROUP_STANDARD_ENTRY)||(n==EXPLICIT_EXTEND_ENTRY) \
00532 ||(n==GROUP_EXTEND_ENTRY))
00533
00535 #define PARAM_POSITION(n)       (n<512)
00536
00541 /* Public Types --------------------------------------------------------------- */
00547 /***********************************************************************
00548  * CAN device configuration commands (IOCTL commands and arguments)
00549  **********************************************************************/
00553 typedef enum {
00554         STD_ID_FORMAT = 0,
00555         EXT_ID_FORMAT = 1
00556 } CAN_ID_FORMAT_Type;
00557
00561 typedef enum {
00562         FULLCAN_ENTRY = 0,
00563         EXPLICIT_STANDARD_ENTRY,
00564         GROUP_STANDARD_ENTRY,
00565         EXPLICIT_EXTEND_ENTRY,
00566         GROUP_EXTEND_ENTRY
00567 } AFLUT_ENTRY_Type;
00568
00572 typedef enum {
00573         DATA_FRAME = 0,
00574         REMOTE_FRAME = 1
00575 } CAN_FRAME_Type;
00576
00580 typedef enum {
00581         CANCTRL_GLOBAL_STS = 0,
00582         CANCTRL_INT_CAP,
00583         CANCTRL_ERR_WRN,
00584         CANCTRL_STS
00585 } CAN_CTRL_STS_Type;
00586
00590 typedef enum {
00591         CANCR_TX_STS = 0,
00592         CANCR_RX_STS,
00593         CANCR_MS
00594 } CAN_CR_STS_Type;
00595
00599 typedef enum{
00600         FULLCAN_IC0,
00601         FULLCAN_IC1
00602 }FullCAN_IC_Type;
00603
00607 typedef enum {
00608         CANINT_RIE = 0,
00609         CANINT_TIE1,
00610         CANINT_EIE,
00611         CANINT_DOIE,
00612         CANINT_WUIE,
00613         CANINT_EPIE,
00614         CANINT_ALIE,
00615         CANINT_BEIE,
00616         CANINT_IDIE,
00617         CANINT_TIE2,
00618         CANINT_TIE3,
00619         CANINT_FCE
00620 } CAN_INT_EN_Type;
00621
00625 typedef enum {
00626         CAN_Normal = 0,
00627         CAN_AccOff,
00628         CAN_AccBP,
00629         CAN_eFCAN
00630 } CAN_AFMODE_Type;
00631
00635 typedef enum {
00636         CAN_OPERATING_MODE = 0,
00637         CAN_RESET_MODE,
00638         CAN_LISTENONLY_MODE,
00639         CAN_SELFTEST_MODE,
00640         CAN_TXPRIORITY_MODE,
00641         CAN_SLEEP_MODE,
00642         CAN_RXPOLARITY_MODE,
00643         CAN_TEST_MODE
00644 } CAN_MODE_Type;
00645
00649 typedef enum {
00650         CAN_OK = 1,
00651         CAN_OBJECTS_FULL_ERROR,
00652         CAN_FULL_OBJ_NOT_RCV,
00653         CAN_NO_RECEIVE_DATA,
00654         CAN_AF_ENTRY_ERROR,
00655         CAN_CONFLICT_ID_ERROR,
00656         CAN_ENTRY_NOT_EXIT_ERROR
00657 } CAN_ERROR;
00658
00662 typedef struct {
00663         uint8_t RD;
00671         uint8_t TD;
00679 } CAN_PinCFG_Type;
00680
00684 typedef struct {
00685         uint32_t id;
00689         uint8_t dataA[4];
00690         uint8_t dataB[4];
00691         uint8_t len;
00695         uint8_t format;
00699         uint8_t type;
00704 } CAN_MSG_Type;
00705
00709 typedef struct {
00710         uint8_t controller;
00714         uint8_t disable;
00718         uint16_t id_11;
00719 } FullCAN_Entry;
00720
00724 typedef struct {
00725         uint8_t controller;
00729         uint8_t disable;
00733         uint16_t id_11;
00734 } SFF_Entry;
00735
00739 typedef struct {
00740         uint8_t controller1;
00744         uint8_t disable1;
00748         uint16_t lowerID;
00749         uint8_t controller2;
00753         uint8_t disable2;
00757         uint16_t upperID;
00760 } SFF_GPR_Entry;
00761
00765 typedef struct {
00766         uint8_t controller;
00770         uint32_t ID_29;
00771 } EFF_Entry;
00772
00773
00777 typedef struct {
00778         uint8_t controller1;
00782         uint8_t controller2;
00786         uint32_t lowerEID;
00787         uint32_t upperEID;
00788 } EFF_GPR_Entry;
00789
00790
00794 typedef struct {
00795         FullCAN_Entry* FullCAN_Sec;
00796         uint8_t FC_NumEntry;
00797         SFF_Entry* SFF_Sec;
00798         uint8_t SFF_NumEntry;
00799         SFF_GPR_Entry* SFF_GPR_Sec;
00800         uint8_t SFF_GPR_NumEntry;
00801         EFF_Entry* EFF_Sec;
00802         uint8_t EFF_NumEntry;
00803         EFF_GPR_Entry* EFF_GPR_Sec;
00804         uint8_t EFF_GPR_NumEntry;
00805 } AF_SectionDef;
00806
00812 /* Public Functions ----------------------------------------------------------- */
00817 /* Init/DeInit CAN peripheral -----------*/
00818 void CAN_Init(LPC_CAN_TypeDef *CANx, uint32_t baudrate);
00819 void CAN_DeInit(LPC_CAN_TypeDef *CANx);
00820
00821 /* CAN messages functions ---------------*/
00822 Status CAN_SendMsg(LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg);
00823 Status CAN_ReceiveMsg(LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg);
00824 CAN_ERROR FCAN_ReadObj(LPC_CANAF_TypeDef* CANAFx, CAN_MSG_Type *CAN_Msg);
00825
00826 /* CAN configure functions ---------------*/
00827 void CAN_ModeConfig(LPC_CAN_TypeDef* CANx, CAN_MODE_Type mode,
00828                 FunctionalState NewState);
00829 void CAN_SetAFMode(LPC_CANAF_TypeDef* CANAFx, CAN_AFMODE_Type AFmode);
00830 void CAN_SetCommand(LPC_CAN_TypeDef* CANx, uint32_t CMRType);
00831
00832 /* AFLUT functions ---------------------- */
00833 CAN_ERROR CAN_SetupAFLUT(LPC_CANAF_TypeDef* CANAFx, AF_SectionDef* AFSection);
00834 CAN_ERROR CAN_LoadFullCANEntry(LPC_CAN_TypeDef* CANx, uint16_t ID);
00835 CAN_ERROR CAN_LoadExplicitEntry(LPC_CAN_TypeDef* CANx, uint32_t ID,
00836                 CAN_ID_FORMAT_Type format);
00837 CAN_ERROR CAN_LoadGroupEntry(LPC_CAN_TypeDef* CANx, uint32_t lowerID,
00838                 uint32_t upperID, CAN_ID_FORMAT_Type format);
00839 CAN_ERROR CAN_RemoveEntry(AFLUT_ENTRY_Type EntryType, uint16_t position);
00840
00841 /* CAN interrupt functions -----------------*/
00842 void CAN_IRQCmd(LPC_CAN_TypeDef* CANx, CAN_INT_EN_Type arg, FunctionalState NewState);
00843 uint32_t CAN_IntGetStatus(LPC_CAN_TypeDef* CANx);
00844
00845 /* CAN get status functions ----------------*/
00846 IntStatus CAN_FullCANIntGetStatus (LPC_CANAF_TypeDef* CANAFx);
00847 uint32_t CAN_FullCANPendGetStatus (LPC_CANAF_TypeDef* CANAFx, FullCAN_IC_Type type);
00848 uint32_t CAN_GetCTRLStatus(LPC_CAN_TypeDef* CANx, CAN_CTRL_STS_Type arg);
00849 uint32_t CAN_GetCRStatus(LPC_CANCR_TypeDef* CANCRx, CAN_CR_STS_Type arg);
00850
00856 #ifdef __cplusplus
00857 }
00858 #endif
00859
00860 #endif /* LPC17XX_CAN_H_ */
00861
00866 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:41 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_clkpwr.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_clkpwr.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_clkpwr.c                                2010-06-18
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_clkpwr.h"
00034
00035
00036 /* Public Functions ----------------------------------------------------------- */
00041 /*********************************************************************/
00080 void CLKPWR_SetPCLKDiv (uint32_t ClkType, uint32_t DivVal)
00081 {
00082         uint32_t bitpos;
00083
00084         bitpos = (ClkType < 32) ? (ClkType) : (ClkType - 32);
00085
00086         /* PCLKSEL0 selected */
00087         if (ClkType < 32)
00088         {
00089                 /* Clear two bit at bit position */
00090                 LPC_SC->PCLKSEL0 &= (~(CLKPWR_PCLKSEL_BITMASK(bitpos)));
00091
00092                 /* Set two selected bit */
00093                 LPC_SC->PCLKSEL0 |= (CLKPWR_PCLKSEL_SET(bitpos, DivVal));
00094         }
00095         /* PCLKSEL1 selected */
00096         else
00097         {
00098                 /* Clear two bit at bit position */
00099                 LPC_SC->PCLKSEL1 &= ~(CLKPWR_PCLKSEL_BITMASK(bitpos));
00100
00101                 /* Set two selected bit */
00102                 LPC_SC->PCLKSEL1 |= (CLKPWR_PCLKSEL_SET(bitpos, DivVal));
00103         }
00104 }
00105
00106
00107 /*********************************************************************/
00141 uint32_t CLKPWR_GetPCLKSEL (uint32_t ClkType)
00142 {
00143         uint32_t bitpos, retval;
00144
00145         if (ClkType < 32)
00146         {
00147                 bitpos = ClkType;
00148                 retval = LPC_SC->PCLKSEL0;
00149         }
00150         else
00151         {
00152                 bitpos = ClkType - 32;
00153                 retval = LPC_SC->PCLKSEL1;
00154         }
00155
00156         retval = CLKPWR_PCLKSEL_GET(bitpos, retval);
00157         return retval;
00158 }
00159
00160
00161
00162 /*********************************************************************/
00196 uint32_t CLKPWR_GetPCLK (uint32_t ClkType)
00197 {
00198         uint32_t retval, div;
00199
00200         retval = SystemCoreClock;
00201         div = CLKPWR_GetPCLKSEL(ClkType);
00202
00203         switch (div)
00204         {
00205         case 0:
00206                 div = 4;
00207                 break;
00208
00209         case 1:
00210                 div = 1;
00211                 break;
00212
00213         case 2:
00214                 div = 2;
00215                 break;
00216
00217         case 3:
00218                 div = 8;
00219                 break;
00220         }
00221         retval /= div;
00222
00223         return retval;
00224 }
00225
00226
00227
00228 /*********************************************************************/
00266 void CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState)
00267 {
00268         if (NewState == ENABLE)
00269         {
00270                 LPC_SC->PCONP |= PPType & CLKPWR_PCONP_BITMASK;
00271         }
00272         else if (NewState == DISABLE)
00273         {
00274                 LPC_SC->PCONP &= (~PPType) & CLKPWR_PCONP_BITMASK;
00275         }
00276 }
00277
00278
00279 /*********************************************************************/
00284 void CLKPWR_Sleep(void)
00285 {
00286         LPC_SC->PCON = 0x00;
00287         /* Sleep Mode*/
00288         __WFI();
00289 }
00290
00291
00292 /*********************************************************************/
00297 void CLKPWR_DeepSleep(void)
00298 {
00299     /* Deep-Sleep Mode, set SLEEPDEEP bit */
00300         SCB->SCR = 0x4;
00301         LPC_SC->PCON = 0x8;
00302         /* Deep Sleep Mode*/
00303         __WFI();
00304 }
00305
00306
00307 /*********************************************************************/
00312 void CLKPWR_PowerDown(void)
00313 {
00314     /* Deep-Sleep Mode, set SLEEPDEEP bit */
00315         SCB->SCR = 0x4;
00316         LPC_SC->PCON = 0x09;
00317         /* Power Down Mode*/
00318         __WFI();
00319 }
00320
00321
00322 /*********************************************************************/
00327 void CLKPWR_DeepPowerDown(void)
00328 {
00329     /* Deep-Sleep Mode, set SLEEPDEEP bit */
00330         SCB->SCR = 0x4;
00331         LPC_SC->PCON = 0x03;
00332         /* Deep Power Down Mode*/
00333         __WFI();
00334 }
00335
00344 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_clkpwr.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_clkpwr.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_clkpwr.h                        2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_CLKPWR_H_
00034 #define LPC17XX_CLKPWR_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040 #ifdef __cplusplus
00041 extern "C"
00042 {
00043 #endif
00044
00045 /* Public Macros -------------------------------------------------------------- */
00050 /**********************************************************************
00051  * Peripheral Clock Selection Definitions
00052  **********************************************************************/
00054 #define CLKPWR_PCLKSEL_WDT              ((uint32_t)(0))
00055
00056 #define CLKPWR_PCLKSEL_TIMER0           ((uint32_t)(2))
00057
00058 #define CLKPWR_PCLKSEL_TIMER1           ((uint32_t)(4))
00059
00060 #define CLKPWR_PCLKSEL_UART0            ((uint32_t)(6))
00061
00062 #define CLKPWR_PCLKSEL_UART1            ((uint32_t)(8))
00063
00064 #define CLKPWR_PCLKSEL_PWM1             ((uint32_t)(12))
00065
00066 #define CLKPWR_PCLKSEL_I2C0             ((uint32_t)(14))
00067
00068 #define CLKPWR_PCLKSEL_SPI              ((uint32_t)(16))
00069
00070 #define CLKPWR_PCLKSEL_SSP1             ((uint32_t)(20))
00071
00072 #define CLKPWR_PCLKSEL_DAC              ((uint32_t)(22))
00073
00074 #define CLKPWR_PCLKSEL_ADC              ((uint32_t)(24))
00075
00076 #define CLKPWR_PCLKSEL_CAN1             ((uint32_t)(26))
00077
00078 #define CLKPWR_PCLKSEL_CAN2             ((uint32_t)(28))
00079
00080 #define CLKPWR_PCLKSEL_ACF              ((uint32_t)(30))
00081
00082 #define CLKPWR_PCLKSEL_QEI              ((uint32_t)(32))
00083
00084 #define CLKPWR_PCLKSEL_PCB              ((uint32_t)(36))
00085
00086 #define CLKPWR_PCLKSEL_I2C1             ((uint32_t)(38))
00087
00088 #define CLKPWR_PCLKSEL_SSP0             ((uint32_t)(42))
00089
00090 #define CLKPWR_PCLKSEL_TIMER2           ((uint32_t)(44))
00091
00092 #define CLKPWR_PCLKSEL_TIMER3           ((uint32_t)(46))
00093
00094 #define CLKPWR_PCLKSEL_UART2            ((uint32_t)(48))
00095
00096 #define CLKPWR_PCLKSEL_UART3            ((uint32_t)(50))
00097
00098 #define CLKPWR_PCLKSEL_I2C2             ((uint32_t)(52))
00099
00100 #define CLKPWR_PCLKSEL_I2S              ((uint32_t)(54))
00101
00102 #define CLKPWR_PCLKSEL_RIT              ((uint32_t)(58))
00103
00104 #define CLKPWR_PCLKSEL_SYSCON           ((uint32_t)(60))
00105
00106 #define CLKPWR_PCLKSEL_MC                       ((uint32_t)(62))
00107
00112 /* Peripheral clock divider is set to 4 from CCLK */
00113 #define CLKPWR_PCLKSEL_CCLK_DIV_4  ((uint32_t)(0))
00114
00115 #define CLKPWR_PCLKSEL_CCLK_DIV_1  ((uint32_t)(1))
00116
00117 #define CLKPWR_PCLKSEL_CCLK_DIV_2  ((uint32_t)(2))
00118
00119
00120 /********************************************************************
00121 * Power Control for Peripherals Definitions
00122 **********************************************************************/
00124 #define  CLKPWR_PCONP_PCTIM0    ((uint32_t)(1<<1))
00125 /* Timer/Counter 1 power/clock control bit */
00126 #define  CLKPWR_PCONP_PCTIM1    ((uint32_t)(1<<2))
00127
00128 #define  CLKPWR_PCONP_PCUART0   ((uint32_t)(1<<3))
00129
00130 #define  CLKPWR_PCONP_PCUART1   ((uint32_t)(1<<4))
00131
00132 #define  CLKPWR_PCONP_PCPWM1    ((uint32_t)(1<<6))
00133
00134 #define  CLKPWR_PCONP_PCI2C0    ((uint32_t)(1<<7))
00135
00136 #define  CLKPWR_PCONP_PCSPI     ((uint32_t)(1<<8))
00137
00138 #define  CLKPWR_PCONP_PCRTC     ((uint32_t)(1<<9))
00139
00140 #define  CLKPWR_PCONP_PCSSP1    ((uint32_t)(1<<10))
00141
00142 #define  CLKPWR_PCONP_PCAD      ((uint32_t)(1<<12))
00143
00144 #define  CLKPWR_PCONP_PCAN1     ((uint32_t)(1<<13))
00145
00146 #define  CLKPWR_PCONP_PCAN2     ((uint32_t)(1<<14))
00147
00148 #define CLKPWR_PCONP_PCGPIO     ((uint32_t)(1<<15))
00149
00150 #define CLKPWR_PCONP_PCRIT              ((uint32_t)(1<<16))
00151
00152 #define CLKPWR_PCONP_PCMC               ((uint32_t)(1<<17))
00153
00154 #define CLKPWR_PCONP_PCQEI              ((uint32_t)(1<<18))
00155
00156 #define  CLKPWR_PCONP_PCI2C1    ((uint32_t)(1<<19))
00157
00158 #define  CLKPWR_PCONP_PCSSP0    ((uint32_t)(1<<21))
00159
00160 #define  CLKPWR_PCONP_PCTIM2    ((uint32_t)(1<<22))
00161
00162 #define  CLKPWR_PCONP_PCTIM3    ((uint32_t)(1<<23))
00163
00164 #define  CLKPWR_PCONP_PCUART2   ((uint32_t)(1<<24))
00165
00166 #define  CLKPWR_PCONP_PCUART3   ((uint32_t)(1<<25))
00167
00168 #define  CLKPWR_PCONP_PCI2C2    ((uint32_t)(1<<26))
00169
00170 #define  CLKPWR_PCONP_PCI2S     ((uint32_t)(1<<27))
00171
00172 #define  CLKPWR_PCONP_PCGPDMA   ((uint32_t)(1<<29))
00173
00174 #define  CLKPWR_PCONP_PCENET    ((uint32_t)(1<<30))
00175
00176 #define  CLKPWR_PCONP_PCUSB     ((uint32_t)(1<<31))
00177
00178
00182 /* Private Macros ------------------------------------------------------------- */
00187 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00188 /*********************************************************************/
00192 #define CLKPWR_CLKSRCSEL_CLKSRC_IRC                     ((uint32_t)(0x00))
00193
00194 #define CLKPWR_CLKSRCSEL_CLKSRC_MAINOSC         ((uint32_t)(0x01))
00195
00196 #define CLKPWR_CLKSRCSEL_CLKSRC_RTC                     ((uint32_t)(0x02))
00197
00198 #define CLKPWR_CLKSRCSEL_BITMASK                        ((uint32_t)(0x03))
00199
00200 /*********************************************************************/
00203 /* Clock Output Configuration register definition */
00205 #define CLKPWR_CLKOUTCFG_CLKOUTSEL_CPU          ((uint32_t)(0x00))
00206
00207 #define CLKPWR_CLKOUTCFG_CLKOUTSEL_MAINOSC      ((uint32_t)(0x01))
00208
00209 #define CLKPWR_CLKOUTCFG_CLKOUTSEL_RC           ((uint32_t)(0x02))
00210
00211 #define CLKPWR_CLKOUTCFG_CLKOUTSEL_USB          ((uint32_t)(0x03))
00212
00213 #define CLKPWR_CLKOUTCFG_CLKOUTSEL_RTC          ((uint32_t)(0x04))
00214
00215 #define CLKPWR_CLKOUTCFG_CLKOUTDIV(n)           ((uint32_t)((n&0x0F)<<4))
00216
00217 #define CLKPWR_CLKOUTCFG_CLKOUT_EN                      ((uint32_t)(1<<8))
00218
00219 #define CLKPWR_CLKOUTCFG_CLKOUT_ACT                     ((uint32_t)(1<<9))
00220
00221 #define CLKPWR_CLKOUTCFG_BITMASK                        ((uint32_t)(0x3FF))
00222
00223 /*********************************************************************/
00227 #define CLKPWR_PLL0CON_ENABLE           ((uint32_t)(0x01))
00228
00229 #define CLKPWR_PLL0CON_CONNECT          ((uint32_t)(0x02))
00230
00231 #define CLKPWR_PLL0CON_BITMASK          ((uint32_t)(0x03))
00232
00233 /*********************************************************************/
00237 #define CLKPWR_PLL0CFG_MSEL(n)          ((uint32_t)(n&0x7FFF))
00238
00239 #define CLKPWR_PLL0CFG_NSEL(n)          ((uint32_t)((n<<16)&0xFF0000))
00240
00241 #define CLKPWR_PLL0CFG_BITMASK          ((uint32_t)(0xFF7FFF))
00242
00243
00244 /*********************************************************************/
00248 #define CLKPWR_PLL0STAT_MSEL(n)         ((uint32_t)(n&0x7FFF))
00249
00250 #define CLKPWR_PLL0STAT_NSEL(n)         ((uint32_t)((n>>16)&0xFF))
00251
00252 #define CLKPWR_PLL0STAT_PLLE            ((uint32_t)(1<<24))
00253
00254 #define CLKPWR_PLL0STAT_PLLC            ((uint32_t)(1<<25))
00255
00256 #define CLKPWR_PLL0STAT_PLOCK           ((uint32_t)(1<<26))
00257
00258 /*********************************************************************/
00262 #define CLKPWR_PLL0FEED_BITMASK                 ((uint32_t)0xFF)
00263
00264 /*********************************************************************/
00268 #define CLKPWR_PLL1CON_ENABLE           ((uint32_t)(0x01))
00269
00270 #define CLKPWR_PLL1CON_CONNECT          ((uint32_t)(0x02))
00271
00272 #define CLKPWR_PLL1CON_BITMASK          ((uint32_t)(0x03))
00273
00274 /*********************************************************************/
00278 #define CLKPWR_PLL1CFG_MSEL(n)          ((uint32_t)(n&0x1F))
00279
00280 #define CLKPWR_PLL1CFG_PSEL(n)          ((uint32_t)((n&0x03)<<5))
00281
00282 #define CLKPWR_PLL1CFG_BITMASK          ((uint32_t)(0x7F))
00283
00284 /*********************************************************************/
00288 #define CLKPWR_PLL1STAT_MSEL(n)         ((uint32_t)(n&0x1F))
00289
00290 #define CLKPWR_PLL1STAT_PSEL(n)         ((uint32_t)((n>>5)&0x03))
00291
00292 #define CLKPWR_PLL1STAT_PLLE            ((uint32_t)(1<<8))
00293
00294 #define CLKPWR_PLL1STAT_PLLC            ((uint32_t)(1<<9))
00295
00296 #define CLKPWR_PLL1STAT_PLOCK           ((uint32_t)(1<<10))
00297
00298 /*********************************************************************/
00302 #define CLKPWR_PLL1FEED_BITMASK         ((uint32_t)0xFF)
00303
00304 /*********************************************************************/
00308 #define CLKPWR_CCLKCFG_BITMASK          ((uint32_t)(0xFF))
00309
00310 /*********************************************************************/
00314 #define CLKPWR_USBCLKCFG_BITMASK        ((uint32_t)(0x0F))
00315
00316 /*********************************************************************/
00320 #define CLKPWR_IRCTRIM_BITMASK          ((uint32_t)(0x0F))
00321
00322 /*********************************************************************/
00326 #define CLKPWR_PCLKSEL0_BITMASK         ((uint32_t)(0xFFF3F3FF))
00327
00328 #define CLKPWR_PCLKSEL1_BITMASK         ((uint32_t)(0xFCF3F0F3))
00329
00332 #define CLKPWR_PCLKSEL_SET(p,n)         _SBF(p,n)
00333
00334 #define CLKPWR_PCLKSEL_BITMASK(p)       _SBF(p,0x03)
00335
00336 #define CLKPWR_PCLKSEL_GET(p, n)        ((uint32_t)((n>>p)&0x03))
00337
00338 /*********************************************************************/
00342 #define CLKPWR_PCON_PM0                 ((uint32_t)(1<<0))
00343
00344 #define CLKPWR_PCON_PM1                 ((uint32_t)(1<<1))
00345
00346 #define CLKPWR_PCON_BODPDM              ((uint32_t)(1<<2))
00347
00348 #define CLKPWR_PCON_BOGD                ((uint32_t)(1<<3))
00349
00350 #define CLKPWR_PCON_BORD                ((uint32_t)(1<<4))
00351
00352 #define CLKPWR_PCON_SMFLAG              ((uint32_t)(1<<8))
00353
00354 #define CLKPWR_PCON_DSFLAG              ((uint32_t)(1<<9))
00355
00356 #define CLKPWR_PCON_PDFLAG              ((uint32_t)(1<<10))
00357
00358 #define CLKPWR_PCON_DPDFLAG             ((uint32_t)(1<<11))
00359
00360 /*********************************************************************/
00364 #define CLKPWR_PCONP_BITMASK    0xEFEFF7DE
00365
00371 /* Public Functions ----------------------------------------------------------- */
00376 void CLKPWR_SetPCLKDiv (uint32_t ClkType, uint32_t DivVal);
00377 uint32_t CLKPWR_GetPCLKSEL (uint32_t ClkType);
00378 uint32_t CLKPWR_GetPCLK (uint32_t ClkType);
00379 void CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState);
00380 void CLKPWR_Sleep(void);
00381 void CLKPWR_DeepSleep(void);
00382 void CLKPWR_PowerDown(void);
00383 void CLKPWR_DeepPowerDown(void);
00384
00390 #ifdef __cplusplus
00391 }
00392 #endif
00393
00394 #endif /* LPC17XX_CLKPWR_H_ */
00395
00400 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:41 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_dac.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_dac.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_dac.c                           2010-05-21
00003 */
00026 /* Peripheral group ----------------------------------------------------------- */
00031 /* Includes ------------------------------------------------------------------- */
00032 #include "lpc17xx_dac.h"
00033 #include "lpc17xx_clkpwr.h"
00034
00035 /* If this source file built with example, the LPC17xx FW library configuration
00036  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00037  * otherwise the default FW library configuration file must be included instead
00038  */
00039 #ifdef __BUILD_WITH_EXAMPLE__
00040 #include "lpc17xx_libcfg.h"
00041 #else
00042 #include "lpc17xx_libcfg_default.h"
00043 #endif /* __BUILD_WITH_EXAMPLE__ */
00044
00045
00046 #ifdef _DAC
00047
00048 /* Public Functions ----------------------------------------------------------- */
00053 /*********************************************************************/
00060 void DAC_Init(LPC_DAC_TypeDef *DACx)
00061 {
00062         CHECK_PARAM(PARAM_DACx(DACx));
00063         /* Set default clock divider for DAC */
00064         // CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_DAC, CLKPWR_PCLKSEL_CCLK_DIV_4);
00065         //Set maximum current output
00066         DAC_SetBias(LPC_DAC,DAC_MAX_CURRENT_700uA);
00067 }
00068
00069 /*********************************************************************/
00075 void DAC_UpdateValue (LPC_DAC_TypeDef *DACx,uint32_t dac_value)
00076 {
00077         uint32_t tmp;
00078         CHECK_PARAM(PARAM_DACx(DACx));
00079         tmp = DACx->DACR & DAC_BIAS_EN;
00080         tmp |= DAC_VALUE(dac_value);
00081         // Update value
00082         DACx->DACR = tmp;
00083 }
00084
00085 /*********************************************************************/
00092 void DAC_SetBias (LPC_DAC_TypeDef *DACx,uint32_t bias)
00093 {
00094         CHECK_PARAM(PARAM_DAC_CURRENT_OPT(bias));
00095         DACx->DACR &=~DAC_BIAS_EN;
00096         if (bias  == DAC_MAX_CURRENT_350uA)
00097         {
00098                 DACx->DACR |= DAC_BIAS_EN;
00099         }
00100 }
00101
00102 /*********************************************************************/
00111 void DAC_ConfigDAConverterControl (LPC_DAC_TypeDef *DACx,DAC_CONVERTER_CFG_Type *DAC_ConverterConfigStruct)
00112 {
00113         CHECK_PARAM(PARAM_DACx(DACx));
00114         DACx->DACCTRL &= ~DAC_DACCTRL_MASK;
00115         if (DAC_ConverterConfigStruct->DBLBUF_ENA)
00116                 DACx->DACCTRL   |= DAC_DBLBUF_ENA;
00117         if (DAC_ConverterConfigStruct->CNT_ENA)
00118                 DACx->DACCTRL   |= DAC_CNT_ENA;
00119         if (DAC_ConverterConfigStruct->DMA_ENA)
00120                 DACx->DACCTRL   |= DAC_DMA_ENA;
00121 }
00122
00123 /*********************************************************************/
00129 void DAC_SetDMATimeOut(LPC_DAC_TypeDef *DACx, uint32_t time_out)
00130 {
00131         CHECK_PARAM(PARAM_DACx(DACx));
00132         DACx->DACCNTVAL = DAC_CCNT_VALUE(time_out);
00133 }
00134
00139 #endif /* _DAC */
00140
00145 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_dac.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_dac.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_dac.h                           2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_DAC_H_
00034 #define LPC17XX_DAC_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046 /* Public Macros -------------------------------------------------------------- */
00054 #define DAC_VALUE(n)            ((uint32_t)((n&0x3FF)<<6))
00055
00059 #define DAC_BIAS_EN                     ((uint32_t)(1<<16))
00060
00061 #define DAC_CCNT_VALUE(n)  ((uint32_t)(n&0xffff))
00062
00064 #define DAC_DBLBUF_ENA          ((uint32_t)(1<<1))
00065
00066 #define DAC_CNT_ENA                     ((uint32_t)(1<<2))
00067
00068 #define DAC_DMA_ENA                     ((uint32_t)(1<<3))
00069
00070 #define DAC_DACCTRL_MASK        ((uint32_t)(0x0F))
00071
00073 #define PARAM_DACx(n)   (((uint32_t *)n)==((uint32_t *)LPC_DAC))
00074
00076 #define PARAM_DAC_CURRENT_OPT(OPTION) ((OPTION == DAC_MAX_CURRENT_700uA)\
00077 ||(OPTION == DAC_MAX_CURRENT_350uA))
00078
00081 /* Public Types --------------------------------------------------------------- */
00088 typedef enum
00089 {
00090         DAC_MAX_CURRENT_700uA = 0,
00092         DAC_MAX_CURRENT_350uA
00094 } DAC_CURRENT_OPT;
00095
00098 typedef struct
00099 {
00100
00101         uint8_t  DBLBUF_ENA;
00105         uint8_t  CNT_ENA;
00109         uint8_t  DMA_ENA;
00113         uint8_t RESERVED;
00114
00115 } DAC_CONVERTER_CFG_Type;
00116
00121 /* Public Functions ----------------------------------------------------------- */
00126 void    DAC_Init(LPC_DAC_TypeDef *DACx);
00127 void    DAC_UpdateValue (LPC_DAC_TypeDef *DACx, uint32_t dac_value);
00128 void    DAC_SetBias (LPC_DAC_TypeDef *DACx,uint32_t bias);
00129 void    DAC_ConfigDAConverterControl (LPC_DAC_TypeDef *DACx,DAC_CONVERTER_CFG_Type *DAC_ConverterConfigStruct);
00130 void    DAC_SetDMATimeOut(LPC_DAC_TypeDef *DACx,uint32_t time_out);
00131
00136 #ifdef __cplusplus
00137 }
00138 #endif
00139
00140
00141 #endif /* LPC17XX_DAC_H_ */
00142
00147 /* --------------------------------- End Of File ------------------------------ */
00148
Generated on Mon Nov 28 2011 11:14:41 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_emac.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_emac.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_dac.c                           2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_emac.h"
00034 #include "lpc17xx_clkpwr.h"
00035
00036 /* If this source file built with example, the LPC17xx FW library configuration
00037  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00038  * otherwise the default FW library configuration file must be included instead
00039  */
00040 #ifdef __BUILD_WITH_EXAMPLE__
00041 #include "lpc17xx_libcfg.h"
00042 #else
00043 #include "lpc17xx_libcfg_default.h"
00044 #endif /* __BUILD_WITH_EXAMPLE__ */
00045
00046
00047 #ifdef _EMAC
00048
00049 /* Private Variables ---------------------------------------------------------- */
00054 /* MII Mgmt Configuration register - Clock divider setting */
00055 const uint8_t EMAC_clkdiv[] = { 4, 6, 8, 10, 14, 20, 28, 36, 40, 44, 48, 52, 56, 60, 64};
00056
00057 /* EMAC local DMA Descriptors */
00058
00060 static RX_Desc Rx_Desc[EMAC_NUM_RX_FRAG];
00061
00063 #if defined ( __CC_ARM   )
00064 static __align(8) RX_Stat Rx_Stat[EMAC_NUM_RX_FRAG];
00065 #elif defined ( __ICCARM__ )
00066 #pragma data_alignment=8
00067 static RX_Stat Rx_Stat[EMAC_NUM_RX_FRAG];
00068 #elif defined   (  __GNUC__  )
00069 static __attribute__ ((aligned (8))) RX_Stat Rx_Stat[EMAC_NUM_RX_FRAG];
00070 #endif
00071
00073 static TX_Desc Tx_Desc[EMAC_NUM_TX_FRAG];
00075 static TX_Stat Tx_Stat[EMAC_NUM_TX_FRAG];
00076
00077 /* EMAC local DMA buffers */
00079 static uint32_t rx_buf[EMAC_NUM_RX_FRAG][EMAC_ETH_MAX_FLEN>>2];
00081 static uint32_t tx_buf[EMAC_NUM_TX_FRAG][EMAC_ETH_MAX_FLEN>>2];
00082
00087 /* Private Functions ---------------------------------------------------------- */
00088 static void rx_descr_init (void);
00089 static void tx_descr_init (void);
00090 static int32_t write_PHY (uint32_t PhyReg, uint16_t Value);
00091 static int32_t  read_PHY (uint32_t PhyReg);
00092
00093 static void setEmacAddr(uint8_t abStationAddr[]);
00094 static int32_t emac_CRCCalc(uint8_t frame_no_fcs[], int32_t frame_len);
00095
00096
00097 /*--------------------------- rx_descr_init ---------------------------------*/
00098 /*********************************************************************/
00103 static void rx_descr_init (void)
00104 {
00105         /* Initialize Receive Descriptor and Status array. */
00106         uint32_t i;
00107
00108         for (i = 0; i < EMAC_NUM_RX_FRAG; i++) {
00109                 Rx_Desc[i].Packet  = (uint32_t)&rx_buf[i];
00110                 Rx_Desc[i].Ctrl    = EMAC_RCTRL_INT | (EMAC_ETH_MAX_FLEN - 1);
00111                 Rx_Stat[i].Info    = 0;
00112                 Rx_Stat[i].HashCRC = 0;
00113         }
00114
00115         /* Set EMAC Receive Descriptor Registers. */
00116         LPC_EMAC->RxDescriptor       = (uint32_t)&Rx_Desc[0];
00117         LPC_EMAC->RxStatus           = (uint32_t)&Rx_Stat[0];
00118         LPC_EMAC->RxDescriptorNumber = EMAC_NUM_RX_FRAG - 1;
00119
00120         /* Rx Descriptors Point to 0 */
00121         LPC_EMAC->RxConsumeIndex  = 0;
00122 }
00123
00124
00125 /*--------------------------- tx_descr_init ---- ----------------------------*/
00126 /*********************************************************************/
00131 static void tx_descr_init (void) {
00132         /* Initialize Transmit Descriptor and Status array. */
00133         uint32_t i;
00134
00135         for (i = 0; i < EMAC_NUM_TX_FRAG; i++) {
00136                 Tx_Desc[i].Packet = (uint32_t)&tx_buf[i];
00137                 Tx_Desc[i].Ctrl   = 0;
00138                 Tx_Stat[i].Info   = 0;
00139         }
00140
00141         /* Set EMAC Transmit Descriptor Registers. */
00142         LPC_EMAC->TxDescriptor       = (uint32_t)&Tx_Desc[0];
00143         LPC_EMAC->TxStatus           = (uint32_t)&Tx_Stat[0];
00144         LPC_EMAC->TxDescriptorNumber = EMAC_NUM_TX_FRAG - 1;
00145
00146         /* Tx Descriptors Point to 0 */
00147         LPC_EMAC->TxProduceIndex  = 0;
00148 }
00149
00150
00151 /*--------------------------- write_PHY -------------------------------------*/
00152 /*********************************************************************/
00159 static int32_t write_PHY (uint32_t PhyReg, uint16_t Value)
00160 {
00161         /* Write a data 'Value' to PHY register 'PhyReg'. */
00162         uint32_t tout;
00163
00164         LPC_EMAC->MADR = EMAC_DEF_ADR | PhyReg;
00165         LPC_EMAC->MWTD = Value;
00166
00167         /* Wait until operation completed */
00168         tout = 0;
00169         for (tout = 0; tout < EMAC_MII_WR_TOUT; tout++) {
00170                 if ((LPC_EMAC->MIND & EMAC_MIND_BUSY) == 0) {
00171                         return (0);
00172                 }
00173         }
00174         // Time out!
00175         return (-1);
00176 }
00177
00178
00179 /*--------------------------- read_PHY --------------------------------------*/
00180 /*********************************************************************/
00186 static int32_t read_PHY (uint32_t PhyReg)
00187 {
00188         /* Read a PHY register 'PhyReg'. */
00189         uint32_t tout;
00190
00191         LPC_EMAC->MADR = EMAC_DEF_ADR | PhyReg;
00192         LPC_EMAC->MCMD = EMAC_MCMD_READ;
00193
00194         /* Wait until operation completed */
00195         tout = 0;
00196         for (tout = 0; tout < EMAC_MII_RD_TOUT; tout++) {
00197                 if ((LPC_EMAC->MIND & EMAC_MIND_BUSY) == 0) {
00198                         LPC_EMAC->MCMD = 0;
00199                         return (LPC_EMAC->MRDD);
00200                 }
00201         }
00202         // Time out!
00203         return (-1);
00204 }
00205
00206 /*********************************************************************/
00212 static void setEmacAddr(uint8_t abStationAddr[])
00213 {
00214         /* Set the Ethernet MAC Address registers */
00215         LPC_EMAC->SA0 = ((uint32_t)abStationAddr[5] << 8) | (uint32_t)abStationAddr[4];
00216         LPC_EMAC->SA1 = ((uint32_t)abStationAddr[3] << 8) | (uint32_t)abStationAddr[2];
00217         LPC_EMAC->SA2 = ((uint32_t)abStationAddr[1] << 8) | (uint32_t)abStationAddr[0];
00218 }
00219
00220
00221 /*********************************************************************/
00227 static int32_t emac_CRCCalc(uint8_t frame_no_fcs[], int32_t frame_len)
00228 {
00229         int i;          // iterator
00230         int j;          // another iterator
00231         char byte;      // current byte
00232         int crc;        // CRC result
00233         int q0, q1, q2, q3; // temporary variables
00234         crc = 0xFFFFFFFF;
00235         for (i = 0; i < frame_len; i++) {
00236                 byte = *frame_no_fcs++;
00237                 for (j = 0; j < 2; j++) {
00238                         if (((crc >> 28) ^ (byte >> 3)) & 0x00000001) {
00239                                 q3 = 0x04C11DB7;
00240                         } else {
00241                                 q3 = 0x00000000;
00242                         }
00243                         if (((crc >> 29) ^ (byte >> 2)) & 0x00000001) {
00244                                 q2 = 0x09823B6E;
00245                         } else {
00246                                 q2 = 0x00000000;
00247                         }
00248                         if (((crc >> 30) ^ (byte >> 1)) & 0x00000001) {
00249                                 q1 = 0x130476DC;
00250                         } else {
00251                                 q1 = 0x00000000;
00252                         }
00253                         if (((crc >> 31) ^ (byte >> 0)) & 0x00000001) {
00254                                 q0 = 0x2608EDB8;
00255                         } else {
00256                                 q0 = 0x00000000;
00257                         }
00258                         crc = (crc << 4) ^ q3 ^ q2 ^ q1 ^ q0;
00259                         byte >>= 4;
00260                 }
00261         }
00262         return crc;
00263 }
00264 /* End of Private Functions --------------------------------------------------- */
00265
00266
00267 /* Public Functions ----------------------------------------------------------- */
00273 /*********************************************************************/
00292 Status EMAC_Init(EMAC_CFG_Type *EMAC_ConfigStruct)
00293 {
00294         /* Initialize the EMAC Ethernet controller. */
00295         int32_t regv,tout, tmp;
00296
00297         /* Set up clock and power for Ethernet module */
00298         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCENET, ENABLE);
00299
00300         /* Reset all EMAC internal modules */
00301         LPC_EMAC->MAC1    = EMAC_MAC1_RES_TX | EMAC_MAC1_RES_MCS_TX | EMAC_MAC1_RES_RX |
00302                                         EMAC_MAC1_RES_MCS_RX | EMAC_MAC1_SIM_RES | EMAC_MAC1_SOFT_RES;
00303
00304         LPC_EMAC->Command = EMAC_CR_REG_RES | EMAC_CR_TX_RES | EMAC_CR_RX_RES | EMAC_CR_PASS_RUNT_FRM;
00305
00306         /* A short delay after reset. */
00307         for (tout = 100; tout; tout--);
00308
00309         /* Initialize MAC control registers. */
00310         LPC_EMAC->MAC1 = EMAC_MAC1_PASS_ALL;
00311         LPC_EMAC->MAC2 = EMAC_MAC2_CRC_EN | EMAC_MAC2_PAD_EN;
00312         LPC_EMAC->MAXF = EMAC_ETH_MAX_FLEN;
00313         /*
00314          * Find the clock that close to desired target clock
00315          */
00316         tmp = SystemCoreClock / EMAC_MCFG_MII_MAXCLK;
00317         for (tout = 0; tout < sizeof (EMAC_clkdiv); tout++){
00318                 if (EMAC_clkdiv[tout] >= tmp) break;
00319         }
00320         tout++;
00321         // Write to MAC configuration register and reset
00322         LPC_EMAC->MCFG = EMAC_MCFG_CLK_SEL(tout) | EMAC_MCFG_RES_MII;
00323         // release reset
00324         LPC_EMAC->MCFG &= ~(EMAC_MCFG_RES_MII);
00325         LPC_EMAC->CLRT = EMAC_CLRT_DEF;
00326         LPC_EMAC->IPGR = EMAC_IPGR_P2_DEF;
00327
00328         /* Enable Reduced MII interface. */
00329         LPC_EMAC->Command = EMAC_CR_RMII | EMAC_CR_PASS_RUNT_FRM;
00330
00331         /* Reset Reduced MII Logic. */
00332 //      LPC_EMAC->SUPP = EMAC_SUPP_RES_RMII;
00333
00334         for (tout = 100; tout; tout--);
00335         LPC_EMAC->SUPP = 0;
00336
00337         /* Put the DP83848C in reset mode */
00338         write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_BMCR_RESET);
00339
00340         /* Wait for hardware reset to end. */
00341         for (tout = EMAC_PHY_RESP_TOUT; tout; tout--) {
00342                 regv = read_PHY (EMAC_PHY_REG_BMCR);
00343                 if (!(regv & (EMAC_PHY_BMCR_RESET | EMAC_PHY_BMCR_POWERDOWN))) {
00344                         /* Reset complete, device not Power Down. */
00345                         break;
00346                 }
00347                 if (tout == 0){
00348                         // Time out, return ERROR
00349                         return (ERROR);
00350                 }
00351         }
00352
00353         // Set PHY mode
00354         if (EMAC_SetPHYMode(EMAC_ConfigStruct->Mode) < 0){
00355                 return (ERROR);
00356         }
00357
00358         // Set EMAC address
00359         setEmacAddr(EMAC_ConfigStruct->pbEMAC_Addr);
00360
00361         /* Initialize Tx and Rx DMA Descriptors */
00362         rx_descr_init ();
00363         tx_descr_init ();
00364
00365         // Set Receive Filter register: enable broadcast and multicast
00366         LPC_EMAC->RxFilterCtrl = EMAC_RFC_MCAST_EN | EMAC_RFC_BCAST_EN | EMAC_RFC_PERFECT_EN;
00367
00368         /* Enable Rx Done and Tx Done interrupt for EMAC */
00369         LPC_EMAC->IntEnable = EMAC_INT_RX_DONE | EMAC_INT_TX_DONE;
00370
00371         /* Reset all interrupts */
00372         LPC_EMAC->IntClear  = 0xFFFF;
00373
00374         /* Enable receive and transmit mode of MAC Ethernet core */
00375         LPC_EMAC->Command  |= (EMAC_CR_RX_EN | EMAC_CR_TX_EN);
00376         LPC_EMAC->MAC1     |= EMAC_MAC1_REC_EN;
00377
00378         return SUCCESS;
00379 }
00380
00381
00382 /*********************************************************************/
00388 void EMAC_DeInit(void)
00389 {
00390         // Disable all interrupt
00391         LPC_EMAC->IntEnable = 0x00;
00392         // Clear all pending interrupt
00393         LPC_EMAC->IntClear = (0xFF) | (EMAC_INT_SOFT_INT | EMAC_INT_WAKEUP);
00394
00395         /* TurnOff clock and power for Ethernet module */
00396         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCENET, DISABLE);
00397 }
00398
00399
00400 /*********************************************************************/
00420 int32_t EMAC_CheckPHYStatus(uint32_t ulPHYState)
00421 {
00422         int32_t regv, tmp;
00423 #ifdef MCB_LPC_1768
00424         regv = read_PHY (EMAC_PHY_REG_STS);
00425         switch(ulPHYState){
00426         case EMAC_PHY_STAT_LINK:
00427                 tmp = (regv & EMAC_PHY_SR_LINK) ? 1 : 0;
00428                 break;
00429         case EMAC_PHY_STAT_SPEED:
00430                 tmp = (regv & EMAC_PHY_SR_SPEED) ? 0 : 1;
00431                 break;
00432         case EMAC_PHY_STAT_DUP:
00433                 tmp = (regv & EMAC_PHY_SR_FULL_DUP) ? 1 : 0;
00434                 break;
00435 #elif defined(IAR_LPC_1768)
00436         /* Use IAR_LPC_1768 board:
00437          * FSZ8721BL doesn't have Status Register
00438          * so we read Basic Mode Status Register (0x01h) instead
00439          */
00440         regv = read_PHY (EMAC_PHY_REG_BMSR);
00441         switch(ulPHYState){
00442         case EMAC_PHY_STAT_LINK:
00443                 tmp = (regv & EMAC_PHY_BMSR_LINK_STATUS) ? 1 : 0;
00444                 break;
00445         case EMAC_PHY_STAT_SPEED:
00446                 tmp = (regv & EMAC_PHY_SR_100_SPEED) ? 1 : 0;
00447                 break;
00448         case EMAC_PHY_STAT_DUP:
00449                 tmp = (regv & EMAC_PHY_SR_FULL_DUP) ? 1 : 0;
00450                 break;
00451 #endif
00452         default:
00453                 tmp = -1;
00454                 break;
00455         }
00456         return (tmp);
00457 }
00458
00459
00460 /*********************************************************************/
00470 int32_t EMAC_SetPHYMode(uint32_t ulPHYMode)
00471 {
00472         int32_t id1, id2, tout, regv;
00473
00474         /* Check if this is a DP83848C PHY. */
00475         id1 = read_PHY (EMAC_PHY_REG_IDR1);
00476         id2 = read_PHY (EMAC_PHY_REG_IDR2);
00477
00478 #ifdef MCB_LPC_1768
00479         if (((id1 << 16) | (id2 & 0xFFF0)) == EMAC_DP83848C_ID) {
00480                 switch(ulPHYMode){
00481                 case EMAC_MODE_AUTO:
00482                         write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_AUTO_NEG);
00483 #elif defined(IAR_LPC_1768) /* Use IAR LPC1768 KickStart board */
00484         if (((id1 << 16) | id2) == EMAC_KSZ8721BL_ID) {
00485                 /* Configure the PHY device */
00486                 switch(ulPHYMode){
00487                 case EMAC_MODE_AUTO:
00488                         /* Use auto-negotiation about the link speed. */
00489                         write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_AUTO_NEG);
00490 //                      write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_BMCR_AN);
00491 #endif
00492                         /* Wait to complete Auto_Negotiation */
00493                         for (tout = EMAC_PHY_RESP_TOUT; tout; tout--) {
00494                                 regv = read_PHY (EMAC_PHY_REG_BMSR);
00495                                 if (regv & EMAC_PHY_BMSR_AUTO_DONE) {
00496                                         /* Auto-negotiation Complete. */
00497                                         break;
00498                                 }
00499                                 if (tout == 0){
00500                                         // Time out, return error
00501                                         return (-1);
00502                                 }
00503                         }
00504                         break;
00505                 case EMAC_MODE_10M_FULL:
00506                         /* Connect at 10MBit full-duplex */
00507                         write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_FULLD_10M);
00508                         break;
00509                 case EMAC_MODE_10M_HALF:
00510                         /* Connect at 10MBit half-duplex */
00511                         write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_HALFD_10M);
00512                         break;
00513                 case EMAC_MODE_100M_FULL:
00514                         /* Connect at 100MBit full-duplex */
00515                         write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_FULLD_100M);
00516                         break;
00517                 case EMAC_MODE_100M_HALF:
00518                         /* Connect at 100MBit half-duplex */
00519                         write_PHY (EMAC_PHY_REG_BMCR, EMAC_PHY_HALFD_100M);
00520                         break;
00521                 default:
00522                         // un-supported
00523                         return (-1);
00524                 }
00525         }
00526         // It's not correct module ID
00527         else {
00528                 return (-1);
00529         }
00530
00531         // Update EMAC configuration with current PHY status
00532         if (EMAC_UpdatePHYStatus() < 0){
00533                 return (-1);
00534         }
00535
00536         // Complete
00537         return (0);
00538 }
00539
00540
00541 /*********************************************************************/
00551 int32_t EMAC_UpdatePHYStatus(void)
00552 {
00553         int32_t regv, tout;
00554
00555         /* Check the link status. */
00556 #ifdef MCB_LPC_1768
00557         for (tout = EMAC_PHY_RESP_TOUT; tout; tout--) {
00558                 regv = read_PHY (EMAC_PHY_REG_STS);
00559                 if (regv & EMAC_PHY_SR_LINK) {
00560                         /* Link is on. */
00561                         break;
00562                 }
00563                 if (tout == 0){
00564                         // time out
00565                         return (-1);
00566                 }
00567         }
00568         /* Configure Full/Half Duplex mode. */
00569         if (regv & EMAC_PHY_SR_DUP) {
00570         /* Full duplex is enabled. */
00571                         LPC_EMAC->MAC2    |= EMAC_MAC2_FULL_DUP;
00572                         LPC_EMAC->Command |= EMAC_CR_FULL_DUP;
00573                         LPC_EMAC->IPGT     = EMAC_IPGT_FULL_DUP;
00574         } else {
00575                 /* Half duplex mode. */
00576                 LPC_EMAC->IPGT = EMAC_IPGT_HALF_DUP;
00577         }
00578         if (regv & EMAC_PHY_SR_SPEED) {
00579         /* 10MBit mode. */
00580                 LPC_EMAC->SUPP = 0;
00581         } else {
00582                 /* 100MBit mode. */
00583                 LPC_EMAC->SUPP = EMAC_SUPP_SPEED;
00584         }
00585 #elif defined(IAR_LPC_1768)
00586         for (tout = EMAC_PHY_RESP_TOUT; tout; tout--) {
00587                 regv = read_PHY (EMAC_PHY_REG_BMSR);
00588                 if (regv & EMAC_PHY_BMSR_LINK_STATUS) {
00589                         /* Link is on. */
00590                         break;
00591                 }
00592                 if (tout == 0){
00593                         // time out
00594                         return (-1);
00595                 }
00596         }
00597
00598         /* Configure Full/Half Duplex mode. */
00599         if (regv & EMAC_PHY_SR_FULL_DUP) {
00600                 /* Full duplex is enabled. */
00601                 LPC_EMAC->MAC2    |= EMAC_MAC2_FULL_DUP;
00602                 LPC_EMAC->Command |= EMAC_CR_FULL_DUP;
00603                 LPC_EMAC->IPGT     = EMAC_IPGT_FULL_DUP;
00604         } else {
00605                 /* Half duplex mode. */
00606                 LPC_EMAC->IPGT = EMAC_IPGT_HALF_DUP;
00607         }
00608
00609         /* Configure 100MBit/10MBit mode. */
00610         if (!(regv & EMAC_PHY_SR_100_SPEED)) {
00611                 /* 10MBit mode. */
00612                 LPC_EMAC->SUPP = 0;
00613         } else {
00614                 /* 100MBit mode. */
00615                 LPC_EMAC->SUPP = EMAC_SUPP_SPEED;
00616         }
00617 #endif
00618         // Complete
00619         return (0);
00620 }
00621
00622
00623 /*********************************************************************/
00642 void EMAC_SetHashFilter(uint8_t dstMAC_addr[], FunctionalState NewState)
00643 {
00644         uint32_t *pReg;
00645         uint32_t tmp;
00646         int32_t crc;
00647
00648         // Calculate the CRC from the destination MAC address
00649         crc = emac_CRCCalc(dstMAC_addr, 6);
00650         // Extract the value from CRC to get index value for hash filter table
00651         crc = (crc >> 23) & 0x3F;
00652
00653         pReg = (crc > 31) ? ((uint32_t *)&LPC_EMAC->HashFilterH) \
00654                                                                 : ((uint32_t *)&LPC_EMAC->HashFilterL);
00655         tmp = (crc > 31) ? (crc - 32) : crc;
00656         if (NewState == ENABLE) {
00657                 (*pReg) |= (1UL << tmp);
00658         } else {
00659                 (*pReg) &= ~(1UL << tmp);
00660         }
00661         // Enable Rx Filter
00662         LPC_EMAC->Command &= ~EMAC_CR_PASS_RX_FILT;
00663 }
00664
00665 /*********************************************************************/
00692 void EMAC_SetFilterMode(uint32_t ulFilterMode, FunctionalState NewState)
00693 {
00694         if (NewState == ENABLE){
00695                 LPC_EMAC->RxFilterCtrl |= ulFilterMode;
00696         } else {
00697                 LPC_EMAC->RxFilterCtrl &= ~ulFilterMode;
00698         }
00699 }
00700
00701 /*********************************************************************/
00718 FlagStatus EMAC_GetWoLStatus(uint32_t ulWoLMode)
00719 {
00720         if (LPC_EMAC->RxFilterWoLStatus & ulWoLMode) {
00721                 LPC_EMAC->RxFilterWoLClear = ulWoLMode;
00722                 return SET;
00723         } else {
00724                 return RESET;
00725         }
00726 }
00727
00728
00729 /*********************************************************************/
00737 void EMAC_WritePacketBuffer(EMAC_PACKETBUF_Type *pDataStruct)
00738 {
00739         uint32_t idx,len;
00740         uint32_t *sp,*dp;
00741
00742         idx = LPC_EMAC->TxProduceIndex;
00743         sp  = (uint32_t *)pDataStruct->pbDataBuf;
00744         dp  = (uint32_t *)Tx_Desc[idx].Packet;
00745         /* Copy frame data to EMAC packet buffers. */
00746         for (len = (pDataStruct->ulDataLen + 3) >> 2; len; len--) {
00747                 *dp++ = *sp++;
00748         }
00749         Tx_Desc[idx].Ctrl = (pDataStruct->ulDataLen - 1) | (EMAC_TCTRL_INT | EMAC_TCTRL_LAST);
00750 }
00751
00752 /*********************************************************************/
00760 void EMAC_ReadPacketBuffer(EMAC_PACKETBUF_Type *pDataStruct)
00761 {
00762         uint32_t idx, len;
00763         uint32_t *dp, *sp;
00764
00765         idx = LPC_EMAC->RxConsumeIndex;
00766         dp = (uint32_t *)pDataStruct->pbDataBuf;
00767         sp = (uint32_t *)Rx_Desc[idx].Packet;
00768
00769         if (pDataStruct->pbDataBuf != NULL) {
00770                 for (len = (pDataStruct->ulDataLen + 3) >> 2; len; len--) {
00771                         *dp++ = *sp++;
00772                 }
00773         }
00774 }
00775
00776 /*********************************************************************/
00794 void EMAC_IntCmd(uint32_t ulIntType, FunctionalState NewState)
00795 {
00796         if (NewState == ENABLE) {
00797                 LPC_EMAC->IntEnable |= ulIntType;
00798         } else {
00799                 LPC_EMAC->IntEnable &= ~(ulIntType);
00800         }
00801 }
00802
00803 /*********************************************************************/
00820 IntStatus EMAC_IntGetStatus(uint32_t ulIntType)
00821 {
00822         if (LPC_EMAC->IntStatus & ulIntType) {
00823                 LPC_EMAC->IntClear = ulIntType;
00824                 return SET;
00825         } else {
00826                 return RESET;
00827         }
00828 }
00829
00830
00831 /*********************************************************************/
00841 Bool EMAC_CheckReceiveIndex(void)
00842 {
00843         if (LPC_EMAC->RxConsumeIndex != LPC_EMAC->RxProduceIndex) {
00844                 return TRUE;
00845         } else {
00846                 return FALSE;
00847         }
00848 }
00849
00850
00851 /*********************************************************************/
00861 Bool EMAC_CheckTransmitIndex(void)
00862 {
00863         uint32_t tmp = LPC_EMAC->TxConsumeIndex -1;
00864         if (LPC_EMAC->TxProduceIndex == tmp) {
00865                 return FALSE;
00866         } else {
00867                 return TRUE;
00868         }
00869 }
00870
00871
00872 /*********************************************************************/
00891 FlagStatus EMAC_CheckReceiveDataStatus(uint32_t ulRxStatType)
00892 {
00893         uint32_t idx;
00894         idx = LPC_EMAC->RxConsumeIndex;
00895         return (((Rx_Stat[idx].Info) & ulRxStatType) ? SET : RESET);
00896 }
00897
00898
00899 /*********************************************************************/
00905 uint32_t EMAC_GetReceiveDataSize(void)
00906 {
00907         uint32_t idx;
00908         idx =LPC_EMAC->RxConsumeIndex;
00909         return ((Rx_Stat[idx].Info) & EMAC_RINFO_SIZE);
00910 }
00911
00912 /*********************************************************************/
00919 void EMAC_UpdateRxConsumeIndex(void)
00920 {
00921         // Get current Rx consume index
00922         uint32_t idx = LPC_EMAC->RxConsumeIndex;
00923
00924         /* Release frame from EMAC buffer */
00925         if (++idx == EMAC_NUM_RX_FRAG) idx = 0;
00926         LPC_EMAC->RxConsumeIndex = idx;
00927 }
00928
00929 /*********************************************************************/
00936 void EMAC_UpdateTxProduceIndex(void)
00937 {
00938         // Get current Tx produce index
00939         uint32_t idx = LPC_EMAC->TxProduceIndex;
00940
00941         /* Start frame transmission */
00942         if (++idx == EMAC_NUM_TX_FRAG) idx = 0;
00943         LPC_EMAC->TxProduceIndex = idx;
00944 }
00945
00946
00951 #endif /* _EMAC */
00952
00957 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_emac.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_emac.h                          2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_EMAC_H_
00034 #define LPC17XX_EMAC_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046 #define MCB_LPC_1768
00047 //#define IAR_LPC_1768
00048
00049 /* Public Macros -------------------------------------------------------------- */
00055 /* EMAC PHY status type definitions */
00056 #define EMAC_PHY_STAT_LINK                      (0)
00057 #define EMAC_PHY_STAT_SPEED                     (1)
00058 #define EMAC_PHY_STAT_DUP                       (2)
00060 /* EMAC PHY device Speed definitions */
00061 #define EMAC_MODE_AUTO                          (0)
00062 #define EMAC_MODE_10M_FULL                      (1)
00063 #define EMAC_MODE_10M_HALF                      (2)
00064 #define EMAC_MODE_100M_FULL                     (3)
00065 #define EMAC_MODE_100M_HALF                     (4)
00070 /* Private Macros ------------------------------------------------------------- */
00071
00076 /* EMAC Memory Buffer configuration for 16K Ethernet RAM */
00077 #define EMAC_NUM_RX_FRAG         4
00078 #define EMAC_NUM_TX_FRAG         3
00079 #define EMAC_ETH_MAX_FLEN        1536
00080 #define EMAC_TX_FRAME_TOUT       0x00100000
00082 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00083 /*********************************************************************/
00086 #define EMAC_MAC1_REC_EN         0x00000001
00087 #define EMAC_MAC1_PASS_ALL       0x00000002
00088 #define EMAC_MAC1_RX_FLOWC       0x00000004
00089 #define EMAC_MAC1_TX_FLOWC       0x00000008
00090 #define EMAC_MAC1_LOOPB          0x00000010
00091 #define EMAC_MAC1_RES_TX         0x00000100
00092 #define EMAC_MAC1_RES_MCS_TX     0x00000200
00093 #define EMAC_MAC1_RES_RX         0x00000400
00094 #define EMAC_MAC1_RES_MCS_RX     0x00000800
00095 #define EMAC_MAC1_SIM_RES        0x00004000
00096 #define EMAC_MAC1_SOFT_RES       0x00008000
00098 /*********************************************************************/
00101 #define EMAC_MAC2_FULL_DUP       0x00000001
00102 #define EMAC_MAC2_FRM_LEN_CHK    0x00000002
00103 #define EMAC_MAC2_HUGE_FRM_EN    0x00000004
00104 #define EMAC_MAC2_DLY_CRC        0x00000008
00105 #define EMAC_MAC2_CRC_EN         0x00000010
00106 #define EMAC_MAC2_PAD_EN         0x00000020
00107 #define EMAC_MAC2_VLAN_PAD_EN    0x00000040
00108 #define EMAC_MAC2_ADET_PAD_EN    0x00000080
00109 #define EMAC_MAC2_PPREAM_ENF     0x00000100
00110 #define EMAC_MAC2_LPREAM_ENF     0x00000200
00111 #define EMAC_MAC2_NO_BACKOFF     0x00001000
00112 #define EMAC_MAC2_BACK_PRESSURE  0x00002000
00113 #define EMAC_MAC2_EXCESS_DEF     0x00004000
00115 /*********************************************************************/
00120 #define EMAC_IPGT_BBIPG(n)              (n&0x7F)
00121
00124 #define EMAC_IPGT_FULL_DUP              (EMAC_IPGT_BBIPG(0x15))
00125
00128 #define EMAC_IPGT_HALF_DUP      (EMAC_IPGT_BBIPG(0x12))
00129
00130 /*********************************************************************/
00134 #define EMAC_IPGR_NBBIPG_P2(n)  (n&0x7F)
00135
00136 #define EMAC_IPGR_P2_DEF                (EMAC_IPGR_NBBIPG_P2(0x12))
00137
00139 #define EMAC_IPGR_NBBIPG_P1(n)  ((n&0x7F)<<8)
00140
00141 #define EMAC_IPGR_P1_DEF        EMAC_IPGR_NBBIPG_P1(0x0C)
00142
00143 /*********************************************************************/
00148 #define EMAC_CLRT_MAX_RETX(n)   (n&0x0F)
00149
00151 #define EMAC_CLRT_COLL(n)               ((n&0x3F)<<8)
00152
00153 #define EMAC_CLRT_DEF           ((EMAC_CLRT_MAX_RETX(0x0F))|(EMAC_CLRT_COLL(0x37)))
00154
00155 /*********************************************************************/
00159 #define EMAC_MAXF_MAXFRMLEN(n)  (n&0xFFFF)
00160
00161 /*********************************************************************/
00164 #define EMAC_SUPP_SPEED                 0x00000100
00165 //#define EMAC_SUPP_RES_RMII      0x00000800
00167 /*********************************************************************/
00170 #define EMAC_TEST_SHCUT_PQUANTA  0x00000001
00171 #define EMAC_TEST_TST_PAUSE      0x00000002
00172 #define EMAC_TEST_TST_BACKP      0x00000004
00174 /*********************************************************************/
00177 #define EMAC_MCFG_SCAN_INC       0x00000001
00178 #define EMAC_MCFG_SUPP_PREAM     0x00000002
00179 #define EMAC_MCFG_CLK_SEL(n)     ((n&0x0F)<<2)
00180 #define EMAC_MCFG_RES_MII        0x00008000
00181 #define EMAC_MCFG_MII_MAXCLK     2500000UL
00183 /*********************************************************************/
00186 #define EMAC_MCMD_READ           0x00000001
00187 #define EMAC_MCMD_SCAN           0x00000002
00189 #define EMAC_MII_WR_TOUT         0x00050000
00190 #define EMAC_MII_RD_TOUT         0x00050000
00192 /*********************************************************************/
00195 #define EMAC_MADR_REG_ADR(n)     (n&0x1F)
00196 #define EMAC_MADR_PHY_ADR(n)     ((n&0x1F)<<8)
00198 /*********************************************************************/
00201 #define EMAC_MWTD_DATA(n)               (n&0xFFFF)
00203 /*********************************************************************/
00206 #define EMAC_MRDD_DATA(n)               (n&0xFFFF)
00208 /*********************************************************************/
00211 #define EMAC_MIND_BUSY           0x00000001
00212 #define EMAC_MIND_SCAN           0x00000002
00213 #define EMAC_MIND_NOT_VAL        0x00000004
00214 #define EMAC_MIND_MII_LINK_FAIL  0x00000008
00216 /* Station Address 0 Register */
00217 /* Station Address 1 Register */
00218 /* Station Address 2 Register */
00219
00220
00221 /* Control register definitions --------------------------------------------------------------------------- */
00222 /*********************************************************************/
00225 #define EMAC_CR_RX_EN            0x00000001
00226 #define EMAC_CR_TX_EN            0x00000002
00227 #define EMAC_CR_REG_RES          0x00000008
00228 #define EMAC_CR_TX_RES           0x00000010
00229 #define EMAC_CR_RX_RES           0x00000020
00230 #define EMAC_CR_PASS_RUNT_FRM    0x00000040
00231 #define EMAC_CR_PASS_RX_FILT     0x00000080
00232 #define EMAC_CR_TX_FLOW_CTRL     0x00000100
00233 #define EMAC_CR_RMII             0x00000200
00234 #define EMAC_CR_FULL_DUP         0x00000400
00236 /*********************************************************************/
00239 #define EMAC_SR_RX_EN            0x00000001
00240 #define EMAC_SR_TX_EN            0x00000002
00242 /*********************************************************************/
00245 #define EMAC_TSV0_CRC_ERR        0x00000001
00246 #define EMAC_TSV0_LEN_CHKERR     0x00000002
00247 #define EMAC_TSV0_LEN_OUTRNG     0x00000004
00248 #define EMAC_TSV0_DONE           0x00000008
00249 #define EMAC_TSV0_MCAST          0x00000010
00250 #define EMAC_TSV0_BCAST          0x00000020
00251 #define EMAC_TSV0_PKT_DEFER      0x00000040
00252 #define EMAC_TSV0_EXC_DEFER      0x00000080
00253 #define EMAC_TSV0_EXC_COLL       0x00000100
00254 #define EMAC_TSV0_LATE_COLL      0x00000200
00255 #define EMAC_TSV0_GIANT          0x00000400
00256 #define EMAC_TSV0_UNDERRUN       0x00000800
00257 #define EMAC_TSV0_BYTES          0x0FFFF000
00258 #define EMAC_TSV0_CTRL_FRAME     0x10000000
00259 #define EMAC_TSV0_PAUSE          0x20000000
00260 #define EMAC_TSV0_BACK_PRESS     0x40000000
00261 #define EMAC_TSV0_VLAN           0x80000000
00263 /*********************************************************************/
00266 #define EMAC_TSV1_BYTE_CNT       0x0000FFFF
00267 #define EMAC_TSV1_COLL_CNT       0x000F0000
00269 /*********************************************************************/
00272 #define EMAC_RSV_BYTE_CNT        0x0000FFFF
00273 #define EMAC_RSV_PKT_IGNORED     0x00010000
00274 #define EMAC_RSV_RXDV_SEEN       0x00020000
00275 #define EMAC_RSV_CARR_SEEN       0x00040000
00276 #define EMAC_RSV_REC_CODEV       0x00080000
00277 #define EMAC_RSV_CRC_ERR         0x00100000
00278 #define EMAC_RSV_LEN_CHKERR      0x00200000
00279 #define EMAC_RSV_LEN_OUTRNG      0x00400000
00280 #define EMAC_RSV_REC_OK          0x00800000
00281 #define EMAC_RSV_MCAST           0x01000000
00282 #define EMAC_RSV_BCAST           0x02000000
00283 #define EMAC_RSV_DRIB_NIBB       0x04000000
00284 #define EMAC_RSV_CTRL_FRAME      0x08000000
00285 #define EMAC_RSV_PAUSE           0x10000000
00286 #define EMAC_RSV_UNSUPP_OPC      0x20000000
00287 #define EMAC_RSV_VLAN            0x40000000
00289 /*********************************************************************/
00292 #define EMAC_FCC_MIRR_CNT(n)            (n&0xFFFF)
00293 #define EMAC_FCC_PAUSE_TIM(n)           ((n&0xFFFF)<<16)
00295 /*********************************************************************/
00298 #define EMAC_FCS_MIRR_CNT(n)            (n&0xFFFF)
00301 /* Receive filter register definitions -------------------------------------------------------- */
00302 /*********************************************************************/
00305 #define EMAC_RFC_UCAST_EN        0x00000001
00306 #define EMAC_RFC_BCAST_EN        0x00000002
00307 #define EMAC_RFC_MCAST_EN        0x00000004
00308 #define EMAC_RFC_UCAST_HASH_EN   0x00000008
00309 #define EMAC_RFC_MCAST_HASH_EN   0x00000010
00310 #define EMAC_RFC_PERFECT_EN      0x00000020
00311 #define EMAC_RFC_MAGP_WOL_EN     0x00001000
00312 #define EMAC_RFC_PFILT_WOL_EN    0x00002000
00314 /*********************************************************************/
00317 #define EMAC_WOL_UCAST           0x00000001
00318 #define EMAC_WOL_BCAST           0x00000002
00319 #define EMAC_WOL_MCAST           0x00000004
00320 #define EMAC_WOL_UCAST_HASH      0x00000008
00321 #define EMAC_WOL_MCAST_HASH      0x00000010
00322 #define EMAC_WOL_PERFECT         0x00000020
00323 #define EMAC_WOL_RX_FILTER       0x00000080
00324 #define EMAC_WOL_MAG_PACKET      0x00000100
00325 #define EMAC_WOL_BITMASK                 0x01BF
00328 /* Module control register definitions ---------------------------------------------------- */
00329 /*********************************************************************/
00332 #define EMAC_INT_RX_OVERRUN      0x00000001
00333 #define EMAC_INT_RX_ERR          0x00000002
00334 #define EMAC_INT_RX_FIN          0x00000004
00335 #define EMAC_INT_RX_DONE         0x00000008
00336 #define EMAC_INT_TX_UNDERRUN     0x00000010
00337 #define EMAC_INT_TX_ERR          0x00000020
00338 #define EMAC_INT_TX_FIN          0x00000040
00339 #define EMAC_INT_TX_DONE         0x00000080
00340 #define EMAC_INT_SOFT_INT        0x00001000
00341 #define EMAC_INT_WAKEUP          0x00002000
00343 /*********************************************************************/
00346 #define EMAC_PD_POWER_DOWN       0x80000000
00348 /* Descriptor and status formats ---------------------------------------------------- */
00349 /*********************************************************************/
00352 #define EMAC_RCTRL_SIZE(n)       (n&0x7FF)
00353 #define EMAC_RCTRL_INT           0x80000000
00355 /*********************************************************************/
00358 #define EMAC_RHASH_SA            0x000001FF
00359 #define EMAC_RHASH_DA            0x001FF000
00361 /*********************************************************************/
00364 #define EMAC_RINFO_SIZE          0x000007FF
00365 #define EMAC_RINFO_CTRL_FRAME    0x00040000
00366 #define EMAC_RINFO_VLAN          0x00080000
00367 #define EMAC_RINFO_FAIL_FILT     0x00100000
00368 #define EMAC_RINFO_MCAST         0x00200000
00369 #define EMAC_RINFO_BCAST         0x00400000
00370 #define EMAC_RINFO_CRC_ERR       0x00800000
00371 #define EMAC_RINFO_SYM_ERR       0x01000000
00372 #define EMAC_RINFO_LEN_ERR       0x02000000
00373 #define EMAC_RINFO_RANGE_ERR     0x04000000
00374 #define EMAC_RINFO_ALIGN_ERR     0x08000000
00375 #define EMAC_RINFO_OVERRUN       0x10000000
00376 #define EMAC_RINFO_NO_DESCR      0x20000000
00377 #define EMAC_RINFO_LAST_FLAG     0x40000000
00378 #define EMAC_RINFO_ERR           0x80000000
00379 #define EMAC_RINFO_ERR_MASK     (EMAC_RINFO_FAIL_FILT | EMAC_RINFO_CRC_ERR   | EMAC_RINFO_SYM_ERR | \
00380 EMAC_RINFO_LEN_ERR   | EMAC_RINFO_ALIGN_ERR | EMAC_RINFO_OVERRUN)
00381
00382 /*********************************************************************/
00385 #define EMAC_TCTRL_SIZE          0x000007FF
00386 #define EMAC_TCTRL_OVERRIDE      0x04000000
00387 #define EMAC_TCTRL_HUGE          0x08000000
00388 #define EMAC_TCTRL_PAD           0x10000000
00389 #define EMAC_TCTRL_CRC           0x20000000
00390 #define EMAC_TCTRL_LAST          0x40000000
00391 #define EMAC_TCTRL_INT           0x80000000
00393 /*********************************************************************/
00396 #define EMAC_TINFO_COL_CNT       0x01E00000
00397 #define EMAC_TINFO_DEFER         0x02000000
00398 #define EMAC_TINFO_EXCESS_DEF    0x04000000
00399 #define EMAC_TINFO_EXCESS_COL    0x08000000
00400 #define EMAC_TINFO_LATE_COL      0x10000000
00401 #define EMAC_TINFO_UNDERRUN      0x20000000
00402 #define EMAC_TINFO_NO_DESCR      0x40000000
00403 #define EMAC_TINFO_ERR           0x80000000
00405 #ifdef MCB_LPC_1768
00406 /* DP83848C PHY definition ------------------------------------------------------------ */
00407
00409 #define EMAC_PHY_RESP_TOUT              0x100000UL
00410
00411 /* ENET Device Revision ID */
00412 #define EMAC_OLD_EMAC_MODULE_ID  0x39022000
00414 /*********************************************************************/
00417 #define EMAC_PHY_REG_BMCR        0x00
00418 #define EMAC_PHY_REG_BMSR        0x01
00419 #define EMAC_PHY_REG_IDR1        0x02
00420 #define EMAC_PHY_REG_IDR2        0x03
00421 #define EMAC_PHY_REG_ANAR        0x04
00422 #define EMAC_PHY_REG_ANLPAR      0x05
00423 #define EMAC_PHY_REG_ANER        0x06
00424 #define EMAC_PHY_REG_ANNPTR      0x07
00425 #define EMAC_PHY_REG_LPNPA               0x08
00426
00427 /*********************************************************************/
00430 #define EMAC_PHY_REG_STS         0x10
00431 #define EMAC_PHY_REG_MICR        0x11
00432 #define EMAC_PHY_REG_MISR        0x12
00433 #define EMAC_PHY_REG_FCSCR       0x14
00434 #define EMAC_PHY_REG_RECR        0x15
00435 #define EMAC_PHY_REG_PCSR        0x16
00436 #define EMAC_PHY_REG_RBR         0x17
00437 #define EMAC_PHY_REG_LEDCR       0x18
00438 #define EMAC_PHY_REG_PHYCR       0x19
00439 #define EMAC_PHY_REG_10BTSCR     0x1A
00440 #define EMAC_PHY_REG_CDCTRL1     0x1B
00441 #define EMAC_PHY_REG_EDCR        0x1D
00443 /*********************************************************************/
00446 #define EMAC_PHY_BMCR_RESET                             (1<<15)
00447 #define EMAC_PHY_BMCR_LOOPBACK                  (1<<14)
00448 #define EMAC_PHY_BMCR_SPEED_SEL                 (1<<13)
00449 #define EMAC_PHY_BMCR_AN                                        (1<<12)
00450 #define EMAC_PHY_BMCR_POWERDOWN                         (1<<11)
00451 #define EMAC_PHY_BMCR_ISOLATE                           (1<<10)
00452 #define EMAC_PHY_BMCR_RE_AN                                     (1<<9)
00453 #define EMAC_PHY_BMCR_DUPLEX                            (1<<8)
00455 /*********************************************************************/
00458 #define EMAC_PHY_BMSR_100BE_T4                  (1<<15)
00459 #define EMAC_PHY_BMSR_100TX_FULL                        (1<<14)
00460 #define EMAC_PHY_BMSR_100TX_HALF                        (1<<13)
00461 #define EMAC_PHY_BMSR_10BE_FULL                         (1<<12)
00462 #define EMAC_PHY_BMSR_10BE_HALF                         (1<<11)
00463 #define EMAC_PHY_BMSR_NOPREAM                           (1<<6)
00464 #define EMAC_PHY_BMSR_AUTO_DONE                         (1<<5)
00465 #define EMAC_PHY_BMSR_REMOTE_FAULT                      (1<<4)
00466 #define EMAC_PHY_BMSR_NO_AUTO                           (1<<3)
00467 #define EMAC_PHY_BMSR_LINK_ESTABLISHED          (1<<2)
00469 /*********************************************************************/
00472 #define EMAC_PHY_SR_REMOTE_FAULT                        (1<<6)
00473 #define EMAC_PHY_SR_JABBER                                      (1<<5)
00474 #define EMAC_PHY_SR_AUTO_DONE                           (1<<4)
00475 #define EMAC_PHY_SR_LOOPBACK                            (1<<3)
00476 #define EMAC_PHY_SR_DUP                                         (1<<2)
00477 #define EMAC_PHY_SR_SPEED                                       (1<<1)
00478 #define EMAC_PHY_SR_LINK                                        (1<<0)
00480 #define EMAC_PHY_FULLD_100M      0x2100
00481 #define EMAC_PHY_HALFD_100M      0x2000
00482 #define EMAC_PHY_FULLD_10M       0x0100
00483 #define EMAC_PHY_HALFD_10M       0x0000
00484 #define EMAC_PHY_AUTO_NEG        0x3000
00486 #define EMAC_DEF_ADR    0x0100
00487 #define EMAC_DP83848C_ID         0x20005C90
00489 #define EMAC_PHY_SR_100_SPEED           ((1<<14)|(1<<13))
00490 #define EMAC_PHY_SR_FULL_DUP            ((1<<14)|(1<<12))
00491 #define EMAC_PHY_BMSR_LINK_STATUS                       (1<<2)
00493 #elif defined(IAR_LPC_1768)
00494 /* KSZ8721BL PHY definition ------------------------------------------------------------ */
00496 #define EMAC_PHY_RESP_TOUT              0x100000UL
00497
00498 /* ENET Device Revision ID */
00499 #define EMAC_OLD_EMAC_MODULE_ID  0x39022000
00501 /*********************************************************************/
00504 #define EMAC_PHY_REG_BMCR        0x00
00505 #define EMAC_PHY_REG_BMSR        0x01
00506 #define EMAC_PHY_REG_IDR1        0x02
00507 #define EMAC_PHY_REG_IDR2        0x03
00508 #define EMAC_PHY_REG_ANAR        0x04
00509 #define EMAC_PHY_REG_ANLPAR      0x05
00510 #define EMAC_PHY_REG_ANER        0x06
00511 #define EMAC_PHY_REG_ANNPTR      0x07
00512 #define EMAC_PHY_REG_LPNPA               0x08
00513 #define EMAC_PHY_REG_REC                 0x15
00514 #define EMAC_PHY_REG_ISC                 0x1b
00515 #define EMAC_PHY_REG_100BASE     0x1f
00517 /*********************************************************************/
00520 #define EMAC_PHY_BMCR_RESET                             (1<<15)
00521 #define EMAC_PHY_BMCR_LOOPBACK                  (1<<14)
00522 #define EMAC_PHY_BMCR_SPEED_SEL                 (1<<13)
00523 #define EMAC_PHY_BMCR_AN                                        (1<<12)
00524 #define EMAC_PHY_BMCR_POWERDOWN                         (1<<11)
00525 #define EMAC_PHY_BMCR_ISOLATE                           (1<<10)
00526 #define EMAC_PHY_BMCR_RE_AN                                     (1<<9)
00527 #define EMAC_PHY_BMCR_DUPLEX                            (1<<8)
00528 #define EMAC_PHY_BMCR_COLLISION                         (1<<7)
00529 #define EMAC_PHY_BMCR_TXDIS                                     (1<<0)
00531 /*********************************************************************/
00534 #define EMAC_PHY_BMSR_100BE_T4                  (1<<15)
00535 #define EMAC_PHY_BMSR_100TX_FULL                        (1<<14)
00536 #define EMAC_PHY_BMSR_100TX_HALF                        (1<<13)
00537 #define EMAC_PHY_BMSR_10BE_FULL                         (1<<12)
00538 #define EMAC_PHY_BMSR_10BE_HALF                         (1<<11)
00539 #define EMAC_PHY_BMSR_NOPREAM                           (1<<6)
00540 #define EMAC_PHY_BMSR_AUTO_DONE                         (1<<5)
00541 #define EMAC_PHY_BMSR_REMOTE_FAULT                      (1<<4)
00542 #define EMAC_PHY_BMSR_NO_AUTO                           (1<<3)
00543 #define EMAC_PHY_BMSR_LINK_STATUS                       (1<<2)
00544 #define EMAC_PHY_BMSR_JABBER_DETECT                     (1<<1)
00545 #define EMAC_PHY_BMSR_EXTEND                            (1<<0)
00547 /*********************************************************************/
00550 /* PHY Identifier 1 bitmap definitions */
00551 #define EMAC_PHY_IDR1(n)                (n & 0xFFFF)
00553 /* PHY Identifier 2 bitmap definitions */
00554 #define EMAC_PHY_IDR2(n)                (n & 0xFFFF)
00556 /*********************************************************************/
00559 #define EMAC_PHY_AN_NEXTPAGE                                    (1<<15)
00560 #define EMAC_PHY_AN_REMOTE_FAULT                                (1<<13)
00561 #define EMAC_PHY_AN_PAUSE                                               (1<<10)
00562 #define EMAC_PHY_AN_100BASE_T4                                  (1<<9)
00563 #define EMAC_PHY_AN_100BASE_TX_FD                               (1<<8)
00564 #define EMAC_PHY_AN_100BASE_TX                                  (1<<7)
00565 #define EMAC_PHY_AN_10BASE_T_FD                                 (1<<6)
00566 #define EMAC_PHY_AN_10BASE_T                                    (1<<5)
00567 #define EMAC_PHY_AN_FIELD(n)                                    (n & 0x1F)
00569 #define EMAC_PHY_FULLD_100M      0x2100
00570 #define EMAC_PHY_HALFD_100M      0x2000
00571 #define EMAC_PHY_FULLD_10M       0x0100
00572 #define EMAC_PHY_HALFD_10M       0x0000
00573 #define EMAC_PHY_AUTO_NEG        0x3000
00575 #define EMAC_PHY_SR_100_SPEED           ((1<<14)|(1<<13))
00576 #define EMAC_PHY_SR_FULL_DUP            ((1<<14)|(1<<12))
00577
00578 #define EMAC_DEF_ADR    (0x01<<8)
00579 #define EMAC_KSZ8721BL_ID       ((0x22 << 16) | 0x1619 )
00580 #endif
00581
00587 /* Public Types --------------------------------------------------------------- */
00592 /* Descriptor and status formats ---------------------------------------------- */
00593
00597 typedef struct {
00598         uint32_t Packet;
00599         uint32_t Ctrl;
00600 } RX_Desc;
00601
00605 typedef struct {
00606         uint32_t Info;
00607         uint32_t HashCRC;
00608 } RX_Stat;
00609
00613 typedef struct {
00614         uint32_t Packet;
00615         uint32_t Ctrl;
00616 } TX_Desc;
00617
00621 typedef struct {
00622    uint32_t Info;
00623 } TX_Stat;
00624
00625
00629 typedef struct {
00630         uint32_t ulDataLen;
00631         uint32_t *pbDataBuf;
00632 } EMAC_PACKETBUF_Type;
00633
00637 typedef struct {
00638         uint32_t        Mode;
00645         uint8_t         *pbEMAC_Addr;
00648 } EMAC_CFG_Type;
00649
00650
00656 /* Public Functions ----------------------------------------------------------- */
00660 /* Init/DeInit EMAC peripheral */
00661 Status EMAC_Init(EMAC_CFG_Type *EMAC_ConfigStruct);
00662 void EMAC_DeInit(void);
00663
00664 /* PHY functions --------------*/
00665 int32_t EMAC_CheckPHYStatus(uint32_t ulPHYState);
00666 int32_t EMAC_SetPHYMode(uint32_t ulPHYMode);
00667 int32_t EMAC_UpdatePHYStatus(void);
00668
00669 /* Filter functions ----------*/
00670 void EMAC_SetHashFilter(uint8_t dstMAC_addr[], FunctionalState NewState);
00671 void EMAC_SetFilterMode(uint32_t ulFilterMode, FunctionalState NewState);
00672
00673 /* EMAC Packet Buffer functions */
00674 void EMAC_WritePacketBuffer(EMAC_PACKETBUF_Type *pDataStruct);
00675 void EMAC_ReadPacketBuffer(EMAC_PACKETBUF_Type *pDataStruct);
00676
00677 /* EMAC Interrupt functions -------*/
00678 void EMAC_IntCmd(uint32_t ulIntType, FunctionalState NewState);
00679 IntStatus EMAC_IntGetStatus(uint32_t ulIntType);
00680
00681 /* EMAC Index functions -----------*/
00682 Bool EMAC_CheckReceiveIndex(void);
00683 Bool EMAC_CheckTransmitIndex(void);
00684 void EMAC_UpdateRxConsumeIndex(void);
00685 void EMAC_UpdateTxProduceIndex(void);
00686
00687 FlagStatus EMAC_CheckReceiveDataStatus(uint32_t ulRxStatType);
00688 uint32_t EMAC_GetReceiveDataSize(void);
00689 FlagStatus EMAC_GetWoLStatus(uint32_t ulWoLMode);
00690
00695 #ifdef __cplusplus
00696 }
00697 #endif
00698
00699 #endif /* LPC17XX_EMAC_H_ */
00700
00705 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:41 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_exti.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_exti.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_exti.c                          2010-06-18
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_exti.h"
00034
00035 /* If this source file built with example, the LPC17xx FW library configuration
00036  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00037  * otherwise the default FW library configuration file must be included instead
00038  */
00039 #ifdef __BUILD_WITH_EXAMPLE__
00040 #include "lpc17xx_libcfg.h"
00041 #else
00042 #include "lpc17xx_libcfg_default.h"
00043 #endif /* __BUILD_WITH_EXAMPLE__ */
00044
00045
00046 #ifdef _EXTI
00047
00048 /* Public Functions ----------------------------------------------------------- */
00053 /*********************************************************************/
00059 void EXTI_Init(void)
00060 {
00061         LPC_SC->EXTINT = 0xF;
00062         LPC_SC->EXTMODE = 0x0;
00063         LPC_SC->EXTPOLAR = 0x0;
00064 }
00065
00066
00067 /*********************************************************************/
00072 void    EXTI_DeInit(void)
00073 {
00074         ;
00075 }
00076
00077 /*********************************************************************/
00085 void EXTI_Config(EXTI_InitTypeDef *EXTICfg)
00086 {
00087         LPC_SC->EXTINT = 0x0;
00088         EXTI_SetMode(EXTICfg->EXTI_Line, EXTICfg->EXTI_Mode);
00089         EXTI_SetPolarity(EXTICfg->EXTI_Line, EXTICfg->EXTI_polarity);
00090 }
00091
00092 /*********************************************************************/
00104 void EXTI_SetMode(EXTI_LINE_ENUM EXTILine, EXTI_MODE_ENUM mode)
00105 {
00106         if(mode == EXTI_MODE_EDGE_SENSITIVE)
00107         {
00108                 LPC_SC->EXTMODE |= (1 << EXTILine);
00109         }
00110         else if(mode == EXTI_MODE_LEVEL_SENSITIVE)
00111         {
00112                 LPC_SC->EXTMODE &= ~(1 << EXTILine);
00113         }
00114 }
00115
00116 /*********************************************************************/
00128 void EXTI_SetPolarity(EXTI_LINE_ENUM EXTILine, EXTI_POLARITY_ENUM polarity)
00129 {
00130         if(polarity == EXTI_POLARITY_HIGH_ACTIVE_OR_RISING_EDGE)
00131         {
00132                 LPC_SC->EXTPOLAR |= (1 << EXTILine);
00133         }
00134         else if(polarity == EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE)
00135         {
00136                 LPC_SC->EXTPOLAR &= ~(1 << EXTILine);
00137         }
00138 }
00139
00140 /*********************************************************************/
00149 void EXTI_ClearEXTIFlag(EXTI_LINE_ENUM EXTILine)
00150 {
00151                 LPC_SC->EXTINT = (1 << EXTILine);
00152 }
00153
00158 #endif /* _EXTI */
00159
00164 /* --------------------------------- End Of File ------------------------------ */
00165
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_exti.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_exti.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_exti.h                          2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_EXTI_H_
00034 #define LPC17XX_EXTI_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046
00047 /* Private Macros ------------------------------------------------------------- */
00051 /*********************************************************************/
00054 #define EXTI_EINT0_BIT_MARK     0x01
00055 #define EXTI_EINT1_BIT_MARK     0x02
00056 #define EXTI_EINT2_BIT_MARK     0x04
00057 #define EXTI_EINT3_BIT_MARK     0x08
00058
00063 /* Private Macros ------------------------------------------------------------- */
00071 typedef enum
00072 {
00073         EXTI_EINT0,
00074         EXTI_EINT1,
00075         EXTI_EINT2,
00076         EXTI_EINT3
00077 } EXTI_LINE_ENUM;
00078
00082 typedef enum
00083 {
00084         EXTI_MODE_LEVEL_SENSITIVE,
00085         EXTI_MODE_EDGE_SENSITIVE
00086 } EXTI_MODE_ENUM;
00087
00091 typedef enum
00092 {
00093         EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE,
00095         EXTI_POLARITY_HIGH_ACTIVE_OR_RISING_EDGE
00097 } EXTI_POLARITY_ENUM;
00098
00102 typedef struct
00103 {
00104         EXTI_LINE_ENUM EXTI_Line;
00106         EXTI_MODE_ENUM EXTI_Mode;
00108         EXTI_POLARITY_ENUM EXTI_polarity;
00111 }EXTI_InitTypeDef;
00112
00113
00119 /* Public Functions ----------------------------------------------------------- */
00124 void EXTI_Init(void);
00125 void EXTI_DeInit(void);
00126
00127 void EXTI_Config(EXTI_InitTypeDef *EXTICfg);
00128 void EXTI_SetMode(EXTI_LINE_ENUM EXTILine, EXTI_MODE_ENUM mode);
00129 void EXTI_SetPolarity(EXTI_LINE_ENUM EXTILine, EXTI_POLARITY_ENUM polarity);
00130 void EXTI_ClearEXTIFlag(EXTI_LINE_ENUM EXTILine);
00131
00132
00138 #ifdef __cplusplus
00139 }
00140 #endif
00141
00142
00143 #endif /* LPC17XX_EXTI_H_ */
00144
00149 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:41 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_gpdma.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_gpdma.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_gpdma.c                         2010-03-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_gpdma.h"
00034 #include "lpc17xx_clkpwr.h"
00035
00036 /* If this source file built with example, the LPC17xx FW library configuration
00037  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00038  * otherwise the default FW library configuration file must be included instead
00039  */
00040 #ifdef __BUILD_WITH_EXAMPLE__
00041 #include "lpc17xx_libcfg.h"
00042 #else
00043 #include "lpc17xx_libcfg_default.h"
00044 #endif /* __BUILD_WITH_EXAMPLE__ */
00045
00046 #ifdef _GPDMA
00047
00048
00049 /* Private Variables ---------------------------------------------------------- */
00058 //#ifdef __IAR_SYSTEMS_ICC__
00059 volatile const void *GPDMA_LUTPerAddr[] = {
00060                 (&LPC_SSP0->DR),                                // SSP0 Tx
00061                 (&LPC_SSP0->DR),                                // SSP0 Rx
00062                 (&LPC_SSP1->DR),                                // SSP1 Tx
00063                 (&LPC_SSP1->DR),                                // SSP1 Rx
00064                 (&LPC_ADC->ADGDR),                      // ADC
00065                 (&LPC_I2S->I2STXFIFO),          // I2S Tx
00066                 (&LPC_I2S->I2SRXFIFO),          // I2S Rx
00067                 (&LPC_DAC->DACR),                               // DAC
00068                 (&LPC_UART0->/*RBTHDLR.*/THR),  // UART0 Tx
00069                 (&LPC_UART0->/*RBTHDLR.*/RBR),  // UART0 Rx
00070                 (&LPC_UART1->/*RBTHDLR.*/THR),  // UART1 Tx
00071                 (&LPC_UART1->/*RBTHDLR.*/RBR),  // UART1 Rx
00072                 (&LPC_UART2->/*RBTHDLR.*/THR),  // UART2 Tx
00073                 (&LPC_UART2->/*RBTHDLR.*/RBR),  // UART2 Rx
00074                 (&LPC_UART3->/*RBTHDLR.*/THR),  // UART3 Tx
00075                 (&LPC_UART3->/*RBTHDLR.*/RBR),  // UART3 Rx
00076                 (&LPC_TIM0->MR0),                               // MAT0.0
00077                 (&LPC_TIM0->MR1),                               // MAT0.1
00078                 (&LPC_TIM1->MR0),                               // MAT1.0
00079                 (&LPC_TIM1->MR1),                               // MAT1.1
00080                 (&LPC_TIM2->MR0),                               // MAT2.0
00081                 (&LPC_TIM2->MR1),                               // MAT2.1
00082                 (&LPC_TIM3->MR0),                               // MAT3.0
00083                 (&LPC_TIM3->MR1)                                // MAT3.1
00084 };
00085 //#else
00086 //const uint32_t GPDMA_LUTPerAddr[] = {
00087 //              ((uint32_t)&LPC_SSP0->DR),                              // SSP0 Tx
00088 //              ((uint32_t)&LPC_SSP0->DR),                              // SSP0 Rx
00089 //              ((uint32_t)&LPC_SSP1->DR),                              // SSP1 Tx
00090 //              ((uint32_t)&LPC_SSP1->DR),                              // SSP1 Rx
00091 //              ((uint32_t)&LPC_ADC->ADGDR),                    // ADC
00092 //              ((uint32_t)&LPC_I2S->I2STXFIFO),                // I2S Tx
00093 //              ((uint32_t)&LPC_I2S->I2SRXFIFO),                // I2S Rx
00094 //              ((uint32_t)&LPC_DAC->DACR),                             // DAC
00095 //              ((uint32_t)&LPC_UART0->/*RBTHDLR.*/THR),        // UART0 Tx
00096 //              ((uint32_t)&LPC_UART0->/*RBTHDLR.*/RBR),        // UART0 Rx
00097 //              ((uint32_t)&LPC_UART1->/*RBTHDLR.*/THR),        // UART1 Tx
00098 //              ((uint32_t)&LPC_UART1->/*RBTHDLR.*/RBR),        // UART1 Rx
00099 //              ((uint32_t)&LPC_UART2->/*RBTHDLR.*/THR),        // UART2 Tx
00100 //              ((uint32_t)&LPC_UART2->/*RBTHDLR.*/RBR),        // UART2 Rx
00101 //              ((uint32_t)&LPC_UART3->/*RBTHDLR.*/THR),        // UART3 Tx
00102 //              ((uint32_t)&LPC_UART3->/*RBTHDLR.*/RBR),        // UART3 Rx
00103 //              ((uint32_t)&LPC_TIM0->MR0),                             // MAT0.0
00104 //              ((uint32_t)&LPC_TIM0->MR1),                             // MAT0.1
00105 //              ((uint32_t)&LPC_TIM1->MR0),                             // MAT1.0
00106 //              ((uint32_t)&LPC_TIM1->MR1),                             // MAT1.1
00107 //              ((uint32_t)&LPC_TIM2->MR0),                             // MAT2.0
00108 //              ((uint32_t)&LPC_TIM2->MR1),                             // MAT2.1
00109 //              ((uint32_t)&LPC_TIM3->MR0),                             // MAT3.0
00110 //              ((uint32_t)&LPC_TIM3->MR1)                              // MAT3.1
00111 //};
00112 //#endif
00117 const LPC_GPDMACH_TypeDef *pGPDMACh[8] = {
00118                 LPC_GPDMACH0,   // GPDMA Channel 0
00119                 LPC_GPDMACH1,   // GPDMA Channel 1
00120                 LPC_GPDMACH2,   // GPDMA Channel 2
00121                 LPC_GPDMACH3,   // GPDMA Channel 3
00122                 LPC_GPDMACH4,   // GPDMA Channel 4
00123                 LPC_GPDMACH5,   // GPDMA Channel 5
00124                 LPC_GPDMACH6,   // GPDMA Channel 6
00125                 LPC_GPDMACH7    // GPDMA Channel 7
00126 };
00130 const uint8_t GPDMA_LUTPerBurst[] = {
00131                 GPDMA_BSIZE_4,                          // SSP0 Tx
00132                 GPDMA_BSIZE_4,                          // SSP0 Rx
00133                 GPDMA_BSIZE_4,                          // SSP1 Tx
00134                 GPDMA_BSIZE_4,                          // SSP1 Rx
00135                 GPDMA_BSIZE_4,                          // ADC
00136                 GPDMA_BSIZE_32,                         // I2S channel 0
00137                 GPDMA_BSIZE_32,                         // I2S channel 1
00138                 GPDMA_BSIZE_1,                          // DAC
00139                 GPDMA_BSIZE_1,                          // UART0 Tx
00140                 GPDMA_BSIZE_1,                          // UART0 Rx
00141                 GPDMA_BSIZE_1,                          // UART1 Tx
00142                 GPDMA_BSIZE_1,                          // UART1 Rx
00143                 GPDMA_BSIZE_1,                          // UART2 Tx
00144                 GPDMA_BSIZE_1,                          // UART2 Rx
00145                 GPDMA_BSIZE_1,                          // UART3 Tx
00146                 GPDMA_BSIZE_1,                          // UART3 Rx
00147                 GPDMA_BSIZE_1,                          // MAT0.0
00148                 GPDMA_BSIZE_1,                          // MAT0.1
00149                 GPDMA_BSIZE_1,                          // MAT1.0
00150                 GPDMA_BSIZE_1,                          // MAT1.1
00151                 GPDMA_BSIZE_1,                          // MAT2.0
00152                 GPDMA_BSIZE_1,                          // MAT2.1
00153                 GPDMA_BSIZE_1,                          // MAT3.0
00154                 GPDMA_BSIZE_1                           // MAT3.1
00155 };
00159 const uint8_t GPDMA_LUTPerWid[] = {
00160                 GPDMA_WIDTH_BYTE,                               // SSP0 Tx
00161                 GPDMA_WIDTH_BYTE,                               // SSP0 Rx
00162                 GPDMA_WIDTH_BYTE,                               // SSP1 Tx
00163                 GPDMA_WIDTH_BYTE,                               // SSP1 Rx
00164                 GPDMA_WIDTH_WORD,                               // ADC
00165                 GPDMA_WIDTH_WORD,                               // I2S channel 0
00166                 GPDMA_WIDTH_WORD,                               // I2S channel 1
00167                 GPDMA_WIDTH_BYTE,                               // DAC
00168                 GPDMA_WIDTH_BYTE,                               // UART0 Tx
00169                 GPDMA_WIDTH_BYTE,                               // UART0 Rx
00170                 GPDMA_WIDTH_BYTE,                               // UART1 Tx
00171                 GPDMA_WIDTH_BYTE,                               // UART1 Rx
00172                 GPDMA_WIDTH_BYTE,                               // UART2 Tx
00173                 GPDMA_WIDTH_BYTE,                               // UART2 Rx
00174                 GPDMA_WIDTH_BYTE,                               // UART3 Tx
00175                 GPDMA_WIDTH_BYTE,                               // UART3 Rx
00176                 GPDMA_WIDTH_WORD,                               // MAT0.0
00177                 GPDMA_WIDTH_WORD,                               // MAT0.1
00178                 GPDMA_WIDTH_WORD,                               // MAT1.0
00179                 GPDMA_WIDTH_WORD,                               // MAT1.1
00180                 GPDMA_WIDTH_WORD,                               // MAT2.0
00181                 GPDMA_WIDTH_WORD,                               // MAT2.1
00182                 GPDMA_WIDTH_WORD,                               // MAT3.0
00183                 GPDMA_WIDTH_WORD                                // MAT3.1
00184 };
00185
00190 /* Public Functions ----------------------------------------------------------- */
00195 /********************************************************************/
00200 void GPDMA_Init(void)
00201 {
00202         /* Enable GPDMA clock */
00203         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCGPDMA, ENABLE);
00204
00205         // Reset all channel configuration register
00206         LPC_GPDMACH0->DMACCConfig = 0;
00207         LPC_GPDMACH1->DMACCConfig = 0;
00208         LPC_GPDMACH2->DMACCConfig = 0;
00209         LPC_GPDMACH3->DMACCConfig = 0;
00210         LPC_GPDMACH4->DMACCConfig = 0;
00211         LPC_GPDMACH5->DMACCConfig = 0;
00212         LPC_GPDMACH6->DMACCConfig = 0;
00213         LPC_GPDMACH7->DMACCConfig = 0;
00214
00215         /* Clear all DMA interrupt and error flag */
00216         LPC_GPDMA->DMACIntTCClear = 0xFF;
00217         LPC_GPDMA->DMACIntErrClr = 0xFF;
00218 }
00219
00220 /********************************************************************/
00229 Status GPDMA_Setup(GPDMA_Channel_CFG_Type *GPDMAChannelConfig)
00230 {
00231         LPC_GPDMACH_TypeDef *pDMAch;
00232         uint32_t tmp1, tmp2;
00233
00234         if (LPC_GPDMA->DMACEnbldChns & (GPDMA_DMACEnbldChns_Ch(GPDMAChannelConfig->ChannelNum))) {
00235                 // This channel is enabled, return ERROR, need to release this channel first
00236                 return ERROR;
00237         }
00238
00239         // Get Channel pointer
00240         pDMAch = (LPC_GPDMACH_TypeDef *) pGPDMACh[GPDMAChannelConfig->ChannelNum];
00241
00242         // Reset the Interrupt status
00243         LPC_GPDMA->DMACIntTCClear = GPDMA_DMACIntTCClear_Ch(GPDMAChannelConfig->ChannelNum);
00244         LPC_GPDMA->DMACIntErrClr = GPDMA_DMACIntErrClr_Ch(GPDMAChannelConfig->ChannelNum);
00245
00246         // Clear DMA configure
00247         pDMAch->DMACCControl = 0x00;
00248         pDMAch->DMACCConfig = 0x00;
00249
00250         /* Assign Linker List Item value */
00251         pDMAch->DMACCLLI = GPDMAChannelConfig->DMALLI;
00252
00253         /* Set value to Channel Control Registers */
00254         switch (GPDMAChannelConfig->TransferType)
00255         {
00256         // Memory to memory
00257         case GPDMA_TRANSFERTYPE_M2M:
00258                 // Assign physical source and destination address
00259                 pDMAch->DMACCSrcAddr = GPDMAChannelConfig->SrcMemAddr;
00260                 pDMAch->DMACCDestAddr = GPDMAChannelConfig->DstMemAddr;
00261                 pDMAch->DMACCControl
00262                                 = GPDMA_DMACCxControl_TransferSize(GPDMAChannelConfig->TransferSize) \
00263                                                 | GPDMA_DMACCxControl_SBSize(GPDMA_BSIZE_32) \
00264                                                 | GPDMA_DMACCxControl_DBSize(GPDMA_BSIZE_32) \
00265                                                 | GPDMA_DMACCxControl_SWidth(GPDMAChannelConfig->TransferWidth) \
00266                                                 | GPDMA_DMACCxControl_DWidth(GPDMAChannelConfig->TransferWidth) \
00267                                                 | GPDMA_DMACCxControl_SI \
00268                                                 | GPDMA_DMACCxControl_DI \
00269                                                 | GPDMA_DMACCxControl_I;
00270                 break;
00271         // Memory to peripheral
00272         case GPDMA_TRANSFERTYPE_M2P:
00273                 // Assign physical source
00274                 pDMAch->DMACCSrcAddr = GPDMAChannelConfig->SrcMemAddr;
00275                 // Assign peripheral destination address
00276                 pDMAch->DMACCDestAddr = (uint32_t)GPDMA_LUTPerAddr[GPDMAChannelConfig->DstConn];
00277                 pDMAch->DMACCControl
00278                                 = GPDMA_DMACCxControl_TransferSize((uint32_t)GPDMAChannelConfig->TransferSize) \
00279                                                 | GPDMA_DMACCxControl_SBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->DstConn]) \
00280                                                 | GPDMA_DMACCxControl_DBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->DstConn]) \
00281                                                 | GPDMA_DMACCxControl_SWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->DstConn]) \
00282                                                 | GPDMA_DMACCxControl_DWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->DstConn]) \
00283                                                 | GPDMA_DMACCxControl_SI \
00284                                                 | GPDMA_DMACCxControl_I;
00285                 break;
00286         // Peripheral to memory
00287         case GPDMA_TRANSFERTYPE_P2M:
00288                 // Assign peripheral source address
00289                 pDMAch->DMACCSrcAddr = (uint32_t)GPDMA_LUTPerAddr[GPDMAChannelConfig->SrcConn];
00290                 // Assign memory destination address
00291                 pDMAch->DMACCDestAddr = GPDMAChannelConfig->DstMemAddr;
00292                 pDMAch->DMACCControl
00293                                 = GPDMA_DMACCxControl_TransferSize((uint32_t)GPDMAChannelConfig->TransferSize) \
00294                                                 | GPDMA_DMACCxControl_SBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->SrcConn]) \
00295                                                 | GPDMA_DMACCxControl_DBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->SrcConn]) \
00296                                                 | GPDMA_DMACCxControl_SWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->SrcConn]) \
00297                                                 | GPDMA_DMACCxControl_DWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->SrcConn]) \
00298                                                 | GPDMA_DMACCxControl_DI \
00299                                                 | GPDMA_DMACCxControl_I;
00300                 break;
00301         // Peripheral to peripheral
00302         case GPDMA_TRANSFERTYPE_P2P:
00303                 // Assign peripheral source address
00304                 pDMAch->DMACCSrcAddr = (uint32_t)GPDMA_LUTPerAddr[GPDMAChannelConfig->SrcConn];
00305                 // Assign peripheral destination address
00306                 pDMAch->DMACCDestAddr = (uint32_t)GPDMA_LUTPerAddr[GPDMAChannelConfig->DstConn];
00307                 pDMAch->DMACCControl
00308                                 = GPDMA_DMACCxControl_TransferSize((uint32_t)GPDMAChannelConfig->TransferSize) \
00309                                                 | GPDMA_DMACCxControl_SBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->SrcConn]) \
00310                                                 | GPDMA_DMACCxControl_DBSize((uint32_t)GPDMA_LUTPerBurst[GPDMAChannelConfig->DstConn]) \
00311                                                 | GPDMA_DMACCxControl_SWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->SrcConn]) \
00312                                                 | GPDMA_DMACCxControl_DWidth((uint32_t)GPDMA_LUTPerWid[GPDMAChannelConfig->DstConn]) \
00313                                                 | GPDMA_DMACCxControl_I;
00314                 break;
00315         // Do not support any more transfer type, return ERROR
00316         default:
00317                 return ERROR;
00318         }
00319
00320         /* Re-Configure DMA Request Select for source peripheral */
00321         if (GPDMAChannelConfig->SrcConn > 15)
00322         {
00323                 LPC_SC->DMAREQSEL |= (1<<(GPDMAChannelConfig->SrcConn - 16));
00324         } else {
00325                 LPC_SC->DMAREQSEL &= ~(1<<(GPDMAChannelConfig->SrcConn - 8));
00326         }
00327
00328         /* Re-Configure DMA Request Select for Destination peripheral */
00329         if (GPDMAChannelConfig->DstConn > 15)
00330         {
00331                 LPC_SC->DMAREQSEL |= (1<<(GPDMAChannelConfig->DstConn - 16));
00332         } else {
00333                 LPC_SC->DMAREQSEL &= ~(1<<(GPDMAChannelConfig->DstConn - 8));
00334         }
00335
00336         /* Enable DMA channels, little endian */
00337         LPC_GPDMA->DMACConfig = GPDMA_DMACConfig_E;
00338         while (!(LPC_GPDMA->DMACConfig & GPDMA_DMACConfig_E));
00339
00340         // Calculate absolute value for Connection number
00341         tmp1 = GPDMAChannelConfig->SrcConn;
00342         tmp1 = ((tmp1 > 15) ? (tmp1 - 8) : tmp1);
00343         tmp2 = GPDMAChannelConfig->DstConn;
00344         tmp2 = ((tmp2 > 15) ? (tmp2 - 8) : tmp2);
00345
00346         // Configure DMA Channel, enable Error Counter and Terminate counter
00347         pDMAch->DMACCConfig = GPDMA_DMACCxConfig_IE | GPDMA_DMACCxConfig_ITC /*| GPDMA_DMACCxConfig_E*/ \
00348                 | GPDMA_DMACCxConfig_TransferType((uint32_t)GPDMAChannelConfig->TransferType) \
00349                 | GPDMA_DMACCxConfig_SrcPeripheral(tmp1) \
00350                 | GPDMA_DMACCxConfig_DestPeripheral(tmp2);
00351
00352         return SUCCESS;
00353 }
00354
00355
00356 /*********************************************************************/
00364 void GPDMA_ChannelCmd(uint8_t channelNum, FunctionalState NewState)
00365 {
00366         LPC_GPDMACH_TypeDef *pDMAch;
00367
00368         // Get Channel pointer
00369         pDMAch = (LPC_GPDMACH_TypeDef *) pGPDMACh[channelNum];
00370
00371         if (NewState == ENABLE) {
00372                 pDMAch->DMACCConfig |= GPDMA_DMACCxConfig_E;
00373         } else {
00374                 pDMAch->DMACCConfig &= ~GPDMA_DMACCxConfig_E;
00375         }
00376 }
00377 /*********************************************************************/
00393 IntStatus GPDMA_IntGetStatus(GPDMA_Status_Type type, uint8_t channel)
00394 {
00395         CHECK_PARAM(PARAM_GPDMA_STAT(type));
00396         CHECK_PARAM(PARAM_GPDMA_CHANNEL(channel));
00397
00398         switch (type)
00399         {
00400         case GPDMA_STAT_INT: //check status of DMA channel interrupts
00401                 if (LPC_GPDMA->DMACIntStat & (GPDMA_DMACIntStat_Ch(channel)))
00402                         return SET;
00403                 return RESET;
00404         case GPDMA_STAT_INTTC: // check terminal count interrupt request status for DMA
00405                 if (LPC_GPDMA->DMACIntTCStat & GPDMA_DMACIntTCStat_Ch(channel))
00406                         return SET;
00407                 return RESET;
00408         case GPDMA_STAT_INTERR: //check interrupt status for DMA channels
00409                 if (LPC_GPDMA->DMACIntErrStat & GPDMA_DMACIntTCClear_Ch(channel))
00410                         return SET;
00411                 return RESET;
00412         case GPDMA_STAT_RAWINTTC: //check status of the terminal count interrupt for DMA channels
00413                 if (LPC_GPDMA->DMACRawIntErrStat & GPDMA_DMACRawIntTCStat_Ch(channel))
00414                         return SET;
00415                 return RESET;
00416         case GPDMA_STAT_RAWINTERR: //check status of the error interrupt for DMA channels
00417                 if (LPC_GPDMA->DMACRawIntTCStat & GPDMA_DMACRawIntErrStat_Ch(channel))
00418                         return SET;
00419                 return RESET;
00420         default: //check enable status for DMA channels
00421                 if (LPC_GPDMA->DMACEnbldChns & GPDMA_DMACEnbldChns_Ch(channel))
00422                         return SET;
00423                 return RESET;
00424         }
00425 }
00426
00427 /*********************************************************************/
00435 void GPDMA_ClearIntPending(GPDMA_StateClear_Type type, uint8_t channel)
00436 {
00437         CHECK_PARAM(PARAM_GPDMA_STATCLR(type));
00438         CHECK_PARAM(PARAM_GPDMA_CHANNEL(channel));
00439
00440         if (type == GPDMA_STATCLR_INTTC) // clears the terminal count interrupt request on DMA channel
00441                 LPC_GPDMA->DMACIntTCClear = GPDMA_DMACIntTCClear_Ch(channel);
00442         else // clear the error interrupt request
00443                 LPC_GPDMA->DMACIntErrClr = GPDMA_DMACIntErrClr_Ch(channel);
00444 }
00445
00450 #endif /* _GPDMA */
00451
00456 /* --------------------------------- End Of File ------------------------------ */
00457
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpdma.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpdma.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_gpdma.h                         2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_GPDMA_H_
00034 #define LPC17XX_GPDMA_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046 /* Public Macros -------------------------------------------------------------- */
00052 #define GPDMA_CONN_SSP0_Tx                      ((0UL))
00053 #define GPDMA_CONN_SSP0_Rx                      ((1UL))
00054 #define GPDMA_CONN_SSP1_Tx                      ((2UL))
00055 #define GPDMA_CONN_SSP1_Rx                      ((3UL))
00056 #define GPDMA_CONN_ADC                          ((4UL))
00057 #define GPDMA_CONN_I2S_Channel_0        ((5UL))
00058 #define GPDMA_CONN_I2S_Channel_1        ((6UL))
00059 #define GPDMA_CONN_DAC                          ((7UL))
00060 #define GPDMA_CONN_UART0_Tx                     ((8UL))
00061 #define GPDMA_CONN_UART0_Rx                     ((9UL))
00062 #define GPDMA_CONN_UART1_Tx                     ((10UL))
00063 #define GPDMA_CONN_UART1_Rx                     ((11UL))
00064 #define GPDMA_CONN_UART2_Tx                     ((12UL))
00065 #define GPDMA_CONN_UART2_Rx                     ((13UL))
00066 #define GPDMA_CONN_UART3_Tx                     ((14UL))
00067 #define GPDMA_CONN_UART3_Rx                     ((15UL))
00068 #define GPDMA_CONN_MAT0_0                       ((16UL))
00069 #define GPDMA_CONN_MAT0_1                       ((17UL))
00070 #define GPDMA_CONN_MAT1_0                       ((18UL))
00071 #define GPDMA_CONN_MAT1_1               ((19UL))
00072 #define GPDMA_CONN_MAT2_0               ((20UL))
00073 #define GPDMA_CONN_MAT2_1               ((21UL))
00074 #define GPDMA_CONN_MAT3_0                       ((22UL))
00075 #define GPDMA_CONN_MAT3_1               ((23UL))
00078 #define GPDMA_TRANSFERTYPE_M2M          ((0UL))
00079 #define GPDMA_TRANSFERTYPE_M2P          ((1UL))
00080 #define GPDMA_TRANSFERTYPE_P2M          ((2UL))
00081 #define GPDMA_TRANSFERTYPE_P2P          ((3UL))
00084 #define GPDMA_BSIZE_1   ((0UL))
00085 #define GPDMA_BSIZE_4   ((1UL))
00086 #define GPDMA_BSIZE_8   ((2UL))
00087 #define GPDMA_BSIZE_16  ((3UL))
00088 #define GPDMA_BSIZE_32  ((4UL))
00089 #define GPDMA_BSIZE_64  ((5UL))
00090 #define GPDMA_BSIZE_128 ((6UL))
00091 #define GPDMA_BSIZE_256 ((7UL))
00094 #define GPDMA_WIDTH_BYTE                ((0UL))
00095 #define GPDMA_WIDTH_HALFWORD    ((1UL))
00096 #define GPDMA_WIDTH_WORD                ((2UL))
00099 #define GPDMA_REQSEL_UART       ((0UL))
00100 #define GPDMA_REQSEL_TIMER      ((1UL))
00107 /* Private Macros ------------------------------------------------------------- */
00108
00112 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00113 /*********************************************************************/
00116 #define GPDMA_DMACIntStat_Ch(n)                 (((1UL<<n)&0xFF))
00117 #define GPDMA_DMACIntStat_BITMASK               ((0xFF))
00118
00119 /*********************************************************************/
00122 #define GPDMA_DMACIntTCStat_Ch(n)               (((1UL<<n)&0xFF))
00123 #define GPDMA_DMACIntTCStat_BITMASK             ((0xFF))
00124
00125 /*********************************************************************/
00128 #define GPDMA_DMACIntTCClear_Ch(n)              (((1UL<<n)&0xFF))
00129 #define GPDMA_DMACIntTCClear_BITMASK    ((0xFF))
00130
00131 /*********************************************************************/
00134 #define GPDMA_DMACIntErrStat_Ch(n)              (((1UL<<n)&0xFF))
00135 #define GPDMA_DMACIntErrStat_BITMASK    ((0xFF))
00136
00137 /*********************************************************************/
00140 #define GPDMA_DMACIntErrClr_Ch(n)               (((1UL<<n)&0xFF))
00141 #define GPDMA_DMACIntErrClr_BITMASK             ((0xFF))
00142
00143 /*********************************************************************/
00146 #define GPDMA_DMACRawIntTCStat_Ch(n)    (((1UL<<n)&0xFF))
00147 #define GPDMA_DMACRawIntTCStat_BITMASK  ((0xFF))
00148
00149 /*********************************************************************/
00152 #define GPDMA_DMACRawIntErrStat_Ch(n)   (((1UL<<n)&0xFF))
00153 #define GPDMA_DMACRawIntErrStat_BITMASK ((0xFF))
00154
00155 /*********************************************************************/
00158 #define GPDMA_DMACEnbldChns_Ch(n)               (((1UL<<n)&0xFF))
00159 #define GPDMA_DMACEnbldChns_BITMASK             ((0xFF))
00160
00161 /*********************************************************************/
00164 #define GPDMA_DMACSoftBReq_Src(n)               (((1UL<<n)&0xFFFF))
00165 #define GPDMA_DMACSoftBReq_BITMASK              ((0xFFFF))
00166
00167 /*********************************************************************/
00170 #define GPDMA_DMACSoftSReq_Src(n)               (((1UL<<n)&0xFFFF))
00171 #define GPDMA_DMACSoftSReq_BITMASK              ((0xFFFF))
00172
00173 /*********************************************************************/
00176 #define GPDMA_DMACSoftLBReq_Src(n)              (((1UL<<n)&0xFFFF))
00177 #define GPDMA_DMACSoftLBReq_BITMASK             ((0xFFFF))
00178
00179 /*********************************************************************/
00182 #define GPDMA_DMACSoftLSReq_Src(n)              (((1UL<<n)&0xFFFF))
00183 #define GPDMA_DMACSoftLSReq_BITMASK             ((0xFFFF))
00184
00185 /*********************************************************************/
00188 #define GPDMA_DMACConfig_E                              ((0x01))
00189 #define GPDMA_DMACConfig_M                              ((0x02))
00190 #define GPDMA_DMACConfig_BITMASK                ((0x03))
00191
00192 /*********************************************************************/
00195 #define GPDMA_DMACSync_Src(n)                   (((1UL<<n)&0xFFFF))
00196 #define GPDMA_DMACSync_BITMASK                  ((0xFFFF))
00197
00198 /*********************************************************************/
00201 #define GPDMA_DMAReqSel_Input(n)                (((1UL<<(n-8))&0xFF))
00202 #define GPDMA_DMAReqSel_BITMASK                 ((0xFF))
00203
00204 /*********************************************************************/
00208 #define GPDMA_DMACCxLLI_BITMASK                 ((0xFFFFFFFC))
00209
00210 /*********************************************************************/
00213 #define GPDMA_DMACCxControl_TransferSize(n) (((n&0xFFF)<<0))
00214 #define GPDMA_DMACCxControl_SBSize(n)           (((n&0x07)<<12))
00215 #define GPDMA_DMACCxControl_DBSize(n)           (((n&0x07)<<15))
00216 #define GPDMA_DMACCxControl_SWidth(n)           (((n&0x07)<<18))
00217 #define GPDMA_DMACCxControl_DWidth(n)           (((n&0x07)<<21))
00218 #define GPDMA_DMACCxControl_SI                          ((1UL<<26))
00219 #define GPDMA_DMACCxControl_DI                          ((1UL<<27))
00220 #define GPDMA_DMACCxControl_Prot1                       ((1UL<<28))
00221 #define GPDMA_DMACCxControl_Prot2                       ((1UL<<29))
00222 #define GPDMA_DMACCxControl_Prot3                       ((1UL<<30))
00223 #define GPDMA_DMACCxControl_I                           ((1UL<<31))
00225 #define GPDMA_DMACCxControl_BITMASK                     ((0xFCFFFFFF))
00226
00227 /*********************************************************************/
00230 #define GPDMA_DMACCxConfig_E                                    ((1UL<<0))
00231 #define GPDMA_DMACCxConfig_SrcPeripheral(n)     (((n&0x1F)<<1))
00232 #define GPDMA_DMACCxConfig_DestPeripheral(n)    (((n&0x1F)<<6))
00233 #define GPDMA_DMACCxConfig_TransferType(n)              (((n&0x7)<<11))
00234 #define GPDMA_DMACCxConfig_IE                                   ((1UL<<14))
00235 #define GPDMA_DMACCxConfig_ITC                                  ((1UL<<15))
00236 #define GPDMA_DMACCxConfig_L                                    ((1UL<<16))
00237 #define GPDMA_DMACCxConfig_A                                    ((1UL<<17))
00238 #define GPDMA_DMACCxConfig_H                                    ((1UL<<18))
00240 #define GPDMA_DMACCxConfig_BITMASK                              ((0x7FFFF))
00241
00242 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00243 /* Macros check GPDMA channel */
00244 #define PARAM_GPDMA_CHANNEL(n)  (n<=7)
00245
00246 /* Macros check GPDMA connection type */
00247 #define PARAM_GPDMA_CONN(n)             ((n==GPDMA_CONN_SSP0_Tx) || (n==GPDMA_CONN_SSP0_Rx) \
00248 || (n==GPDMA_CONN_SSP1_Tx) || (n==GPDMA_CONN_SSP1_Rx) \
00249 || (n==GPDMA_CONN_ADC) || (n==GPDMA_CONN_I2S_Channel_0) \
00250 || (n==GPDMA_CONN_I2S_Channel_1) || (n==GPDMA_CONN_DAC) \
00251 || (n==GPDMA_CONN_UART0_Tx) || (n==GPDMA_CONN_UART0_Rx) \
00252 || (n==GPDMA_CONN_UART1_Tx) || (n==GPDMA_CONN_UART1_Rx) \
00253 || (n==GPDMA_CONN_UART2_Tx) || (n==GPDMA_CONN_UART2_Rx) \
00254 || (n==GPDMA_CONN_UART3_Tx) || (n==GPDMA_CONN_UART3_Rx) \
00255 || (n==GPDMA_CONN_MAT0_0) || (n==GPDMA_CONN_MAT0_1) \
00256 || (n==GPDMA_CONN_MAT1_0) || (n==GPDMA_CONN_MAT1_1) \
00257 || (n==GPDMA_CONN_MAT2_0) || (n==GPDMA_CONN_MAT2_1) \
00258 || (n==GPDMA_CONN_MAT3_0) || (n==GPDMA_CONN_MAT3_1))
00259
00260 /* Macros check GPDMA burst size type */
00261 #define PARAM_GPDMA_BSIZE(n)    ((n==GPDMA_BSIZE_1) || (n==GPDMA_BSIZE_4) \
00262 || (n==GPDMA_BSIZE_8) || (n==GPDMA_BSIZE_16) \
00263 || (n==GPDMA_BSIZE_32) || (n==GPDMA_BSIZE_64) \
00264 || (n==GPDMA_BSIZE_128) || (n==GPDMA_BSIZE_256))
00265
00266 /* Macros check GPDMA width type */
00267 #define PARAM_GPDMA_WIDTH(n) ((n==GPDMA_WIDTH_BYTE) || (n==GPDMA_WIDTH_HALFWORD) \
00268 || (n==GPDMA_WIDTH_WORD))
00269
00270 /* Macros check GPDMA status type */
00271 #define PARAM_GPDMA_STAT(n)     ((n==GPDMA_STAT_INT) || (n==GPDMA_STAT_INTTC) \
00272 || (n==GPDMA_STAT_INTERR) || (n==GPDMA_STAT_RAWINTTC) \
00273 || (n==GPDMA_STAT_RAWINTERR) || (n==GPDMA_STAT_ENABLED_CH))
00274
00275 /* Macros check GPDMA transfer type */
00276 #define PARAM_GPDMA_TRANSFERTYPE(n) ((n==GPDMA_TRANSFERTYPE_M2M)||(n==GPDMA_TRANSFERTYPE_M2P) \
00277 ||(n==GPDMA_TRANSFERTYPE_P2M)||(n==GPDMA_TRANSFERTYPE_P2P))
00278
00279 /* Macros check GPDMA state clear type */
00280 #define PARAM_GPDMA_STATCLR(n)  ((n==GPDMA_STATCLR_INTTC) || (n==GPDMA_STATCLR_INTERR))
00281
00282 /* Macros check GPDMA request select type */
00283 #define PARAM_GPDMA_REQSEL(n)   ((n==GPDMA_REQSEL_UART) || (n==GPDMA_REQSEL_TIMER))
00284
00289 /* Public Types --------------------------------------------------------------- */
00297 typedef enum {
00298         GPDMA_STAT_INT,
00299         GPDMA_STAT_INTTC,
00300         GPDMA_STAT_INTERR,
00301         GPDMA_STAT_RAWINTTC,
00302         GPDMA_STAT_RAWINTERR,
00303         GPDMA_STAT_ENABLED_CH
00304 } GPDMA_Status_Type;
00305
00309 typedef enum{
00310         GPDMA_STATCLR_INTTC,
00311         GPDMA_STATCLR_INTERR
00312 }GPDMA_StateClear_Type;
00313
00317 typedef struct {
00318         uint32_t ChannelNum;
00323         uint32_t TransferSize;
00324         uint32_t TransferWidth;
00325         uint32_t SrcMemAddr;
00327         uint32_t DstMemAddr;
00329         uint32_t TransferType;
00335         uint32_t SrcConn;
00355         uint32_t DstConn;
00375         uint32_t DMALLI;
00378 } GPDMA_Channel_CFG_Type;
00379
00383 typedef struct {
00384         uint32_t SrcAddr;
00385         uint32_t DstAddr;
00386         uint32_t NextLLI;
00387         uint32_t Control;
00388 } GPDMA_LLI_Type;
00389
00390
00395 /* Public Functions ----------------------------------------------------------- */
00400 void GPDMA_Init(void);
00401 //Status GPDMA_Setup(GPDMA_Channel_CFG_Type *GPDMAChannelConfig, fnGPDMACbs_Type *pfnGPDMACbs);
00402 Status GPDMA_Setup(GPDMA_Channel_CFG_Type *GPDMAChannelConfig);
00403 IntStatus GPDMA_IntGetStatus(GPDMA_Status_Type type, uint8_t channel);
00404 void GPDMA_ClearIntPending(GPDMA_StateClear_Type type, uint8_t channel);
00405 void GPDMA_ChannelCmd(uint8_t channelNum, FunctionalState NewState);
00406 //void GPDMA_IntHandler(void);
00407
00413 #ifdef __cplusplus
00414 }
00415 #endif
00416
00417 #endif /* LPC17XX_GPDMA_H_ */
00418
00423 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:41 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_gpio.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_gpio.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_gpio.c                          2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_gpio.h"
00034
00035 /* If this source file built with example, the LPC17xx FW library configuration
00036  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00037  * otherwise the default FW library configuration file must be included instead
00038  */
00039 #ifdef __BUILD_WITH_EXAMPLE__
00040 #include "lpc17xx_libcfg.h"
00041 #else
00042 #include "lpc17xx_libcfg_default.h"
00043 #endif /* __BUILD_WITH_EXAMPLE__ */
00044
00045
00046 #ifdef _GPIO
00047
00048 /* Private Functions ---------------------------------------------------------- */
00049
00050 static LPC_GPIO_TypeDef *GPIO_GetPointer(uint8_t portNum);
00051 static GPIO_HalfWord_TypeDef *FIO_HalfWordGetPointer(uint8_t portNum);
00052 static GPIO_Byte_TypeDef *FIO_ByteGetPointer(uint8_t portNum);
00053
00054 /*********************************************************************/
00059 static LPC_GPIO_TypeDef *GPIO_GetPointer(uint8_t portNum)
00060 {
00061         LPC_GPIO_TypeDef *pGPIO = NULL;
00062
00063         switch (portNum) {
00064         case 0:
00065                 pGPIO = LPC_GPIO0;
00066                 break;
00067         case 1:
00068                 pGPIO = LPC_GPIO1;
00069                 break;
00070         case 2:
00071                 pGPIO = LPC_GPIO2;
00072                 break;
00073         case 3:
00074                 pGPIO = LPC_GPIO3;
00075                 break;
00076         case 4:
00077                 pGPIO = LPC_GPIO4;
00078                 break;
00079         default:
00080                 break;
00081         }
00082
00083         return pGPIO;
00084 }
00085
00086 /*********************************************************************/
00092 static GPIO_HalfWord_TypeDef *FIO_HalfWordGetPointer(uint8_t portNum)
00093 {
00094         GPIO_HalfWord_TypeDef *pFIO = NULL;
00095
00096         switch (portNum) {
00097         case 0:
00098                 pFIO = GPIO0_HalfWord;
00099                 break;
00100         case 1:
00101                 pFIO = GPIO1_HalfWord;
00102                 break;
00103         case 2:
00104                 pFIO = GPIO2_HalfWord;
00105                 break;
00106         case 3:
00107                 pFIO = GPIO3_HalfWord;
00108                 break;
00109         case 4:
00110                 pFIO = GPIO4_HalfWord;
00111                 break;
00112         default:
00113                 break;
00114         }
00115
00116         return pFIO;
00117 }
00118
00119 /*********************************************************************/
00125 static GPIO_Byte_TypeDef *FIO_ByteGetPointer(uint8_t portNum)
00126 {
00127         GPIO_Byte_TypeDef *pFIO = NULL;
00128
00129         switch (portNum) {
00130         case 0:
00131                 pFIO = GPIO0_Byte;
00132                 break;
00133         case 1:
00134                 pFIO = GPIO1_Byte;
00135                 break;
00136         case 2:
00137                 pFIO = GPIO2_Byte;
00138                 break;
00139         case 3:
00140                 pFIO = GPIO3_Byte;
00141                 break;
00142         case 4:
00143                 pFIO = GPIO4_Byte;
00144                 break;
00145         default:
00146                 break;
00147         }
00148
00149         return pFIO;
00150 }
00151
00152 /* End of Private Functions --------------------------------------------------- */
00153
00154
00155 /* Public Functions ----------------------------------------------------------- */
00161 /* GPIO ------------------------------------------------------------------------------ */
00162
00163 /*********************************************************************/
00177 void GPIO_SetDir(uint8_t portNum, uint32_t bitValue, uint8_t dir)
00178 {
00179         LPC_GPIO_TypeDef *pGPIO = GPIO_GetPointer(portNum);
00180
00181         if (pGPIO != NULL) {
00182                 // Enable Output
00183                 if (dir) {
00184                         pGPIO->FIODIR |= bitValue;
00185                 }
00186                 // Enable Input
00187                 else {
00188                         pGPIO->FIODIR &= ~bitValue;
00189                 }
00190         }
00191 }
00192
00193
00194 /*********************************************************************/
00208 void GPIO_SetValue(uint8_t portNum, uint32_t bitValue)
00209 {
00210         LPC_GPIO_TypeDef *pGPIO = GPIO_GetPointer(portNum);
00211
00212         if (pGPIO != NULL) {
00213                 pGPIO->FIOSET = bitValue;
00214         }
00215 }
00216
00217 /*********************************************************************/
00231 void GPIO_ClearValue(uint8_t portNum, uint32_t bitValue)
00232 {
00233         LPC_GPIO_TypeDef *pGPIO = GPIO_GetPointer(portNum);
00234
00235         if (pGPIO != NULL) {
00236                 pGPIO->FIOCLR = bitValue;
00237         }
00238 }
00239
00240 /*********************************************************************/
00248 uint32_t GPIO_ReadValue(uint8_t portNum)
00249 {
00250         LPC_GPIO_TypeDef *pGPIO = GPIO_GetPointer(portNum);
00251
00252         if (pGPIO != NULL) {
00253                 return pGPIO->FIOPIN;
00254         }
00255
00256         return (0);
00257 }
00258
00259 /*********************************************************************/
00269 void GPIO_IntCmd(uint8_t portNum, uint32_t bitValue, uint8_t edgeState)
00270 {
00271         if((portNum == 0)&&(edgeState == 0))
00272                 LPC_GPIOINT->IO0IntEnR = bitValue;
00273         else if ((portNum == 2)&&(edgeState == 0))
00274                 LPC_GPIOINT->IO2IntEnR = bitValue;
00275         else if ((portNum == 0)&&(edgeState == 1))
00276                 LPC_GPIOINT->IO0IntEnF = bitValue;
00277         else if ((portNum == 2)&&(edgeState == 1))
00278                 LPC_GPIOINT->IO2IntEnF = bitValue;
00279         else
00280                 //Error
00281                 while(1);
00282 }
00283
00284 /*********************************************************************/
00297 FunctionalState GPIO_GetIntStatus(uint8_t portNum, uint32_t pinNum, uint8_t edgeState)
00298 {
00299         if((portNum == 0) && (edgeState == 0))//Rising Edge
00300                 return ((FunctionalState)(((LPC_GPIOINT->IO0IntStatR)>>pinNum)& 0x1));
00301         else if ((portNum == 2) && (edgeState == 0))
00302                 return ((FunctionalState)(((LPC_GPIOINT->IO2IntStatR)>>pinNum)& 0x1));
00303         else if ((portNum == 0) && (edgeState == 1))//Falling Edge
00304                 return ((FunctionalState)(((LPC_GPIOINT->IO0IntStatF)>>pinNum)& 0x1));
00305         else if ((portNum == 2) && (edgeState == 1))
00306                 return ((FunctionalState)(((LPC_GPIOINT->IO2IntStatF)>>pinNum)& 0x1));
00307         else
00308                 //Error
00309                 while(1);
00310 }
00311 /*********************************************************************/
00318 void GPIO_ClearInt(uint8_t portNum, uint32_t bitValue)
00319 {
00320         if(portNum == 0)
00321                 LPC_GPIOINT->IO0IntClr = bitValue;
00322         else if (portNum == 2)
00323                 LPC_GPIOINT->IO2IntClr = bitValue;
00324         else
00325                 //Invalid portNum
00326                 while(1);
00327 }
00328
00329 /* FIO word accessible ----------------------------------------------------------------- */
00330 /* Stub function for FIO (word-accessible) style */
00331
00335 void FIO_SetDir(uint8_t portNum, uint32_t bitValue, uint8_t dir)
00336 {
00337         GPIO_SetDir(portNum, bitValue, dir);
00338 }
00339
00343 void FIO_SetValue(uint8_t portNum, uint32_t bitValue)
00344 {
00345         GPIO_SetValue(portNum, bitValue);
00346 }
00347
00351 void FIO_ClearValue(uint8_t portNum, uint32_t bitValue)
00352 {
00353         GPIO_ClearValue(portNum, bitValue);
00354 }
00355
00359 uint32_t FIO_ReadValue(uint8_t portNum)
00360 {
00361         return (GPIO_ReadValue(portNum));
00362 }
00363
00367 void FIO_IntCmd(uint8_t portNum, uint32_t bitValue, uint8_t edgeState)
00368 {
00369         GPIO_IntCmd(portNum, bitValue, edgeState);
00370 }
00371
00375 FunctionalState FIO_GetIntStatus(uint8_t portNum, uint32_t pinNum, uint8_t edgeState)
00376 {
00377         return (GPIO_GetIntStatus(portNum, pinNum, edgeState));
00378 }
00379
00383 void FIO_ClearInt(uint8_t portNum, uint32_t bitValue)
00384 {
00385         GPIO_ClearInt(portNum, bitValue);
00386 }
00387 /*********************************************************************/
00405 void FIO_SetMask(uint8_t portNum, uint32_t bitValue, uint8_t maskValue)
00406 {
00407         LPC_GPIO_TypeDef *pFIO = GPIO_GetPointer(portNum);
00408         if(pFIO != NULL) {
00409                 // Mask
00410                 if (maskValue){
00411                         pFIO->FIOMASK |= bitValue;
00412                 }
00413                 // Un-mask
00414                 else {
00415                         pFIO->FIOMASK &= ~bitValue;
00416                 }
00417         }
00418 }
00419
00420
00421 /* FIO halfword accessible ------------------------------------------------------------- */
00422
00423 /*********************************************************************/
00437 void FIO_HalfWordSetDir(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t dir)
00438 {
00439         GPIO_HalfWord_TypeDef *pFIO = FIO_HalfWordGetPointer(portNum);
00440         if(pFIO != NULL) {
00441                 // Output direction
00442                 if (dir) {
00443                         // Upper
00444                         if(halfwordNum) {
00445                                 pFIO->FIODIRU |= bitValue;
00446                         }
00447                         // lower
00448                         else {
00449                                 pFIO->FIODIRL |= bitValue;
00450                         }
00451                 }
00452                 // Input direction
00453                 else {
00454                         // Upper
00455                         if(halfwordNum) {
00456                                 pFIO->FIODIRU &= ~bitValue;
00457                         }
00458                         // lower
00459                         else {
00460                                 pFIO->FIODIRL &= ~bitValue;
00461                         }
00462                 }
00463         }
00464 }
00465
00466
00467 /*********************************************************************/
00486 void FIO_HalfWordSetMask(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t maskValue)
00487 {
00488         GPIO_HalfWord_TypeDef *pFIO = FIO_HalfWordGetPointer(portNum);
00489         if(pFIO != NULL) {
00490                 // Mask
00491                 if (maskValue){
00492                         // Upper
00493                         if(halfwordNum) {
00494                                 pFIO->FIOMASKU |= bitValue;
00495                         }
00496                         // lower
00497                         else {
00498                                 pFIO->FIOMASKL |= bitValue;
00499                         }
00500                 }
00501                 // Un-mask
00502                 else {
00503                         // Upper
00504                         if(halfwordNum) {
00505                                 pFIO->FIOMASKU &= ~bitValue;
00506                         }
00507                         // lower
00508                         else {
00509                                 pFIO->FIOMASKL &= ~bitValue;
00510                         }
00511                 }
00512         }
00513 }
00514
00515
00516 /*********************************************************************/
00530 void FIO_HalfWordSetValue(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue)
00531 {
00532         GPIO_HalfWord_TypeDef *pFIO = FIO_HalfWordGetPointer(portNum);
00533         if(pFIO != NULL) {
00534                 // Upper
00535                 if(halfwordNum) {
00536                         pFIO->FIOSETU = bitValue;
00537                 }
00538                 // lower
00539                 else {
00540                         pFIO->FIOSETL = bitValue;
00541                 }
00542         }
00543 }
00544
00545
00546 /*********************************************************************/
00560 void FIO_HalfWordClearValue(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue)
00561 {
00562         GPIO_HalfWord_TypeDef *pFIO = FIO_HalfWordGetPointer(portNum);
00563         if(pFIO != NULL) {
00564                 // Upper
00565                 if(halfwordNum) {
00566                         pFIO->FIOCLRU = bitValue;
00567                 }
00568                 // lower
00569                 else {
00570                         pFIO->FIOCLRL = bitValue;
00571                 }
00572         }
00573 }
00574
00575
00576 /*********************************************************************/
00585 uint16_t FIO_HalfWordReadValue(uint8_t portNum, uint8_t halfwordNum)
00586 {
00587         GPIO_HalfWord_TypeDef *pFIO = FIO_HalfWordGetPointer(portNum);
00588         if(pFIO != NULL) {
00589                 // Upper
00590                 if(halfwordNum) {
00591                         return (pFIO->FIOPINU);
00592                 }
00593                 // lower
00594                 else {
00595                         return (pFIO->FIOPINL);
00596                 }
00597         }
00598         return (0);
00599 }
00600
00601
00602 /* FIO Byte accessible ------------------------------------------------------------ */
00603
00604 /*********************************************************************/
00618 void FIO_ByteSetDir(uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t dir)
00619 {
00620         GPIO_Byte_TypeDef *pFIO = FIO_ByteGetPointer(portNum);
00621         if(pFIO != NULL) {
00622                 // Output direction
00623                 if (dir) {
00624                         if (byteNum <= 3) {
00625                                 pFIO->FIODIR[byteNum] |= bitValue;
00626                         }
00627                 }
00628                 // Input direction
00629                 else {
00630                         if (byteNum <= 3) {
00631                                 pFIO->FIODIR[byteNum] &= ~bitValue;
00632                         }
00633                 }
00634         }
00635 }
00636
00637 /*********************************************************************/
00656 void FIO_ByteSetMask(uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t maskValue)
00657 {
00658         GPIO_Byte_TypeDef *pFIO = FIO_ByteGetPointer(portNum);
00659         if(pFIO != NULL) {
00660                 // Mask
00661                 if (maskValue) {
00662                         if (byteNum <= 3) {
00663                                 pFIO->FIOMASK[byteNum] |= bitValue;
00664                         }
00665                 }
00666                 // Un-mask
00667                 else {
00668                         if (byteNum <= 3) {
00669                                 pFIO->FIOMASK[byteNum] &= ~bitValue;
00670                         }
00671                 }
00672         }
00673 }
00674
00675
00676 /*********************************************************************/
00690 void FIO_ByteSetValue(uint8_t portNum, uint8_t byteNum, uint8_t bitValue)
00691 {
00692         GPIO_Byte_TypeDef *pFIO = FIO_ByteGetPointer(portNum);
00693         if (pFIO != NULL) {
00694                 if (byteNum <= 3){
00695                         pFIO->FIOSET[byteNum] = bitValue;
00696                 }
00697         }
00698 }
00699
00700
00701 /*********************************************************************/
00715 void FIO_ByteClearValue(uint8_t portNum, uint8_t byteNum, uint8_t bitValue)
00716 {
00717         GPIO_Byte_TypeDef *pFIO = FIO_ByteGetPointer(portNum);
00718         if (pFIO != NULL) {
00719                 if (byteNum <= 3){
00720                         pFIO->FIOCLR[byteNum] = bitValue;
00721                 }
00722         }
00723 }
00724
00725
00726 /*********************************************************************/
00735 uint8_t FIO_ByteReadValue(uint8_t portNum, uint8_t byteNum)
00736 {
00737         GPIO_Byte_TypeDef *pFIO = FIO_ByteGetPointer(portNum);
00738         if (pFIO != NULL) {
00739                 if (byteNum <= 3){
00740                         return (pFIO->FIOPIN[byteNum]);
00741                 }
00742         }
00743         return (0);
00744 }
00745
00750 #endif /* _GPIO */
00751
00756 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpio.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_gpio.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_gpio.h                          2010-06-18
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_GPIO_H_
00034 #define LPC17XX_GPIO_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046 /* Public Macros -------------------------------------------------------------- */
00052 #define GPIO0_Byte      ((GPIO_Byte_TypeDef *)(LPC_GPIO0_BASE))
00053
00054 #define GPIO1_Byte      ((GPIO_Byte_TypeDef *)(LPC_GPIO1_BASE))
00055
00056 #define GPIO2_Byte      ((GPIO_Byte_TypeDef *)(LPC_GPIO2_BASE))
00057
00058 #define GPIO3_Byte      ((GPIO_Byte_TypeDef *)(LPC_GPIO3_BASE))
00059
00060 #define GPIO4_Byte      ((GPIO_Byte_TypeDef *)(LPC_GPIO4_BASE))
00061
00062
00064 #define GPIO0_HalfWord  ((GPIO_HalfWord_TypeDef *)(LPC_GPIO0_BASE))
00065
00066 #define GPIO1_HalfWord  ((GPIO_HalfWord_TypeDef *)(LPC_GPIO1_BASE))
00067
00068 #define GPIO2_HalfWord  ((GPIO_HalfWord_TypeDef *)(LPC_GPIO2_BASE))
00069
00070 #define GPIO3_HalfWord  ((GPIO_HalfWord_TypeDef *)(LPC_GPIO3_BASE))
00071
00072 #define GPIO4_HalfWord  ((GPIO_HalfWord_TypeDef *)(LPC_GPIO4_BASE))
00073
00078 /* Public Types --------------------------------------------------------------- */
00086 typedef struct {
00087         __IO uint8_t FIODIR[4];
00088            uint32_t RESERVED0[3];
00089         __IO uint8_t FIOMASK[4];
00090         __IO uint8_t FIOPIN[4];
00091         __IO uint8_t FIOSET[4];
00092         __O  uint8_t FIOCLR[4];
00093 } GPIO_Byte_TypeDef;
00094
00095
00099 typedef struct {
00100         __IO uint16_t FIODIRL;
00101         __IO uint16_t FIODIRU;
00102            uint32_t RESERVED0[3];
00103         __IO uint16_t FIOMASKL;
00104         __IO uint16_t FIOMASKU;
00105         __IO uint16_t FIOPINL;
00106         __IO uint16_t FIOPINU;
00107         __IO uint16_t FIOSETL;
00108         __IO uint16_t FIOSETU;
00109         __O  uint16_t FIOCLRL;
00110         __O  uint16_t FIOCLRU;
00111 } GPIO_HalfWord_TypeDef;
00112
00118 /* Public Functions ----------------------------------------------------------- */
00123 /* GPIO style ------------------------------- */
00124 void GPIO_SetDir(uint8_t portNum, uint32_t bitValue, uint8_t dir);
00125 void GPIO_SetValue(uint8_t portNum, uint32_t bitValue);
00126 void GPIO_ClearValue(uint8_t portNum, uint32_t bitValue);
00127 uint32_t GPIO_ReadValue(uint8_t portNum);
00128 void GPIO_IntCmd(uint8_t portNum, uint32_t bitValue, uint8_t edgeState);
00129 FunctionalState GPIO_GetIntStatus(uint8_t portNum, uint32_t pinNum, uint8_t edgeState);
00130 void GPIO_ClearInt(uint8_t portNum, uint32_t bitValue);
00131
00132 /* FIO (word-accessible) style ------------------------------- */
00133 void FIO_SetDir(uint8_t portNum, uint32_t bitValue, uint8_t dir);
00134 void FIO_SetValue(uint8_t portNum, uint32_t bitValue);
00135 void FIO_ClearValue(uint8_t portNum, uint32_t bitValue);
00136 uint32_t FIO_ReadValue(uint8_t portNum);
00137 void FIO_SetMask(uint8_t portNum, uint32_t bitValue, uint8_t maskValue);
00138 void FIO_IntCmd(uint8_t portNum, uint32_t bitValue, uint8_t edgeState);
00139 FunctionalState FIO_GetIntStatus(uint8_t portNum, uint32_t pinNum, uint8_t edgeState);
00140 void FIO_ClearInt(uint8_t portNum, uint32_t pinNum);
00141
00142 /* FIO (halfword-accessible) style ------------------------------- */
00143 void FIO_HalfWordSetDir(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t dir);
00144 void FIO_HalfWordSetMask(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t maskValue);
00145 void FIO_HalfWordSetValue(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue);
00146 void FIO_HalfWordClearValue(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue);
00147 uint16_t FIO_HalfWordReadValue(uint8_t portNum, uint8_t halfwordNum);
00148
00149 /* FIO (byte-accessible) style ------------------------------- */
00150 void FIO_ByteSetDir(uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t dir);
00151 void FIO_ByteSetMask(uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t maskValue);
00152 void FIO_ByteSetValue(uint8_t portNum, uint8_t byteNum, uint8_t bitValue);
00153 void FIO_ByteClearValue(uint8_t portNum, uint8_t byteNum, uint8_t bitValue);
00154 uint8_t FIO_ByteReadValue(uint8_t portNum, uint8_t byteNum);
00155
00161 #ifdef __cplusplus
00162 }
00163 #endif
00164
00165 #endif /* LPC17XX_GPIO_H_ */
00166
00171 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:41 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2c.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2c.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_gpio.c                          2011-03-31
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_i2c.h"
00034 #include "lpc17xx_clkpwr.h"
00035 #include "lpc17xx_pinsel.h"
00036
00037
00038 /* If this source file built with example, the LPC17xx FW library configuration
00039  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00040  * otherwise the default FW library configuration file must be included instead
00041  */
00042 #ifdef __BUILD_WITH_EXAMPLE__
00043 #include "lpc17xx_libcfg.h"
00044 #else
00045 #include "lpc17xx_libcfg_default.h"
00046 #endif /* __BUILD_WITH_EXAMPLE__ */
00047
00048
00049 #ifdef _I2C
00050
00051
00052 /* Private Types -------------------------------------------------------------- */
00060 typedef struct
00061 {
00062   uint32_t      txrx_setup;                                             /* Transmission setup */
00063   int32_t               dir;                                                            /* Current direction phase, 0 - write, 1 - read */
00064 } I2C_CFG_T;
00065
00070 /* Private Variables ---------------------------------------------------------- */
00074 static I2C_CFG_T i2cdat[3];
00075
00076 static uint32_t I2C_MasterComplete[3];
00077 static uint32_t I2C_SlaveComplete[3];
00078
00079 static uint32_t I2C_MonitorBufferIndex;
00080
00081 /* Private Functions ---------------------------------------------------------- */
00082
00083 /* Get I2C number */
00084 static int32_t I2C_getNum(LPC_I2C_TypeDef *I2Cx);
00085
00086 /* Generate a start condition on I2C bus (in master mode only) */
00087 static uint32_t I2C_Start (LPC_I2C_TypeDef *I2Cx);
00088
00089 /* Generate a stop condition on I2C bus (in master mode only) */
00090 static void I2C_Stop (LPC_I2C_TypeDef *I2Cx);
00091
00092 /* I2C send byte subroutine */
00093 static uint32_t I2C_SendByte (LPC_I2C_TypeDef *I2Cx, uint8_t databyte);
00094
00095 /* I2C get byte subroutine */
00096 static uint32_t I2C_GetByte (LPC_I2C_TypeDef *I2Cx, uint8_t *retdat, Bool ack);
00097
00098 /* I2C set clock (hz) */
00099 static void I2C_SetClock (LPC_I2C_TypeDef *I2Cx, uint32_t target_clock);
00100
00101 /*--------------------------------------------------------------------------------*/
00102 /********************************************************************/
00110 static int32_t I2C_getNum(LPC_I2C_TypeDef *I2Cx){
00111         if (I2Cx == LPC_I2C0) {
00112                 return (0);
00113         } else if (I2Cx == LPC_I2C1) {
00114                 return (1);
00115         } else if (I2Cx == LPC_I2C2) {
00116                 return (2);
00117         }
00118         return (-1);
00119 }
00120
00121 /********************************************************************/
00129 static uint32_t I2C_Start (LPC_I2C_TypeDef *I2Cx)
00130 {
00131         I2Cx->I2CONSET = I2C_I2CONSET_STA;
00132         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00133
00134         // Wait for complete
00135         while (!(I2Cx->I2CONSET & I2C_I2CONSET_SI));
00136         I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
00137         return (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
00138 }
00139
00140 /********************************************************************/
00148 static void I2C_Stop (LPC_I2C_TypeDef *I2Cx)
00149 {
00150
00151         /* Make sure start bit is not active */
00152         if (I2Cx->I2CONSET & I2C_I2CONSET_STA)
00153         {
00154                 I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
00155         }
00156         I2Cx->I2CONSET = I2C_I2CONSET_STO;
00157         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00158 }
00159
00160 /********************************************************************/
00169 static uint32_t I2C_SendByte (LPC_I2C_TypeDef *I2Cx, uint8_t databyte)
00170 {
00171         /* Make sure start bit is not active */
00172         if (I2Cx->I2CONSET & I2C_I2CONSET_STA)
00173         {
00174                 I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
00175         }
00176         I2Cx->I2DAT = databyte & I2C_I2DAT_BITMASK;
00177         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00178
00179         while (!(I2Cx->I2CONSET & I2C_I2CONSET_SI));
00180         return (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
00181 }
00182
00183 /********************************************************************/
00193 static uint32_t I2C_GetByte (LPC_I2C_TypeDef *I2Cx, uint8_t *retdat, Bool ack)
00194 {
00195         if (ack == TRUE)
00196         {
00197                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
00198         }
00199         else
00200         {
00201                 I2Cx->I2CONCLR = I2C_I2CONCLR_AAC;
00202         }
00203         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00204
00205         while (!(I2Cx->I2CONSET & I2C_I2CONSET_SI));
00206         *retdat = (uint8_t) (I2Cx->I2DAT & I2C_I2DAT_BITMASK);
00207         return (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
00208 }
00209
00210 /*********************************************************************/
00219 static void I2C_SetClock (LPC_I2C_TypeDef *I2Cx, uint32_t target_clock)
00220 {
00221         uint32_t temp;
00222
00223         CHECK_PARAM(PARAM_I2Cx(I2Cx));
00224
00225         // Get PCLK of I2C controller
00226         if (I2Cx == LPC_I2C0)
00227         {
00228                 temp = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_I2C0) / target_clock;
00229         }
00230         else if (I2Cx == LPC_I2C1)
00231         {
00232                 temp = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_I2C1) / target_clock;
00233         }
00234         else if (I2Cx == LPC_I2C2)
00235         {
00236                 temp = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_I2C2) / target_clock;
00237         }
00238
00239         /* Set the I2C clock value to register */
00240         I2Cx->I2SCLH = (uint32_t)(temp / 2);
00241         I2Cx->I2SCLL = (uint32_t)(temp - I2Cx->I2SCLH);
00242 }
00243 /* End of Private Functions --------------------------------------------------- */
00244
00245
00246 /* Public Functions ----------------------------------------------------------- */
00251 /********************************************************************/
00261 void I2C_Init(LPC_I2C_TypeDef *I2Cx, uint32_t clockrate)
00262 {
00263         CHECK_PARAM(PARAM_I2Cx(I2Cx));
00264
00265         if (I2Cx==LPC_I2C0)
00266         {
00267                 /* Set up clock and power for I2C0 module */
00268                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C0, ENABLE);
00269                 /* As default, peripheral clock for I2C0 module
00270                  * is set to FCCLK / 2 */
00271                 CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_I2C0, CLKPWR_PCLKSEL_CCLK_DIV_2);
00272         }
00273         else if (I2Cx==LPC_I2C1)
00274         {
00275                 /* Set up clock and power for I2C1 module */
00276                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C1, ENABLE);
00277                 /* As default, peripheral clock for I2C1 module
00278                  * is set to FCCLK / 2 */
00279                 CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_I2C1, CLKPWR_PCLKSEL_CCLK_DIV_2);
00280         }
00281         else if (I2Cx==LPC_I2C2)
00282         {
00283                 /* Set up clock and power for I2C2 module */
00284                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C2, ENABLE);
00285                 /* As default, peripheral clock for I2C2 module
00286                  * is set to FCCLK / 2 */
00287                 CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_I2C2, CLKPWR_PCLKSEL_CCLK_DIV_2);
00288         }
00289         else {
00290                 // Up-Support this device
00291                 return;
00292         }
00293
00294     /* Set clock rate */
00295     I2C_SetClock(I2Cx, clockrate);
00296     /* Set I2C operation to default */
00297     I2Cx->I2CONCLR = (I2C_I2CONCLR_AAC | I2C_I2CONCLR_STAC | I2C_I2CONCLR_I2ENC);
00298 }
00299
00300 /*********************************************************************/
00309 void I2C_DeInit(LPC_I2C_TypeDef* I2Cx)
00310 {
00311         CHECK_PARAM(PARAM_I2Cx(I2Cx));
00312
00313         /* Disable I2C control */
00314         I2Cx->I2CONCLR = I2C_I2CONCLR_I2ENC;
00315
00316         if (I2Cx==LPC_I2C0)
00317         {
00318                 /* Disable power for I2C0 module */
00319                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C0, DISABLE);
00320         }
00321         else if (I2Cx==LPC_I2C1)
00322         {
00323                 /* Disable power for I2C1 module */
00324                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C1, DISABLE);
00325         }
00326         else if (I2Cx==LPC_I2C2)
00327         {
00328                 /* Disable power for I2C2 module */
00329                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C2, DISABLE);
00330         }
00331 }
00332
00333 /*********************************************************************/
00342 void I2C_Cmd(LPC_I2C_TypeDef* I2Cx, FunctionalState NewState)
00343 {
00344         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00345         CHECK_PARAM(PARAM_I2Cx(I2Cx));
00346
00347         if (NewState == ENABLE)
00348         {
00349                 I2Cx->I2CONSET = I2C_I2CONSET_I2EN;
00350         }
00351         else
00352         {
00353                 I2Cx->I2CONCLR = I2C_I2CONCLR_I2ENC;
00354         }
00355 }
00356
00357 /*********************************************************************/
00369 void I2C_IntCmd (LPC_I2C_TypeDef *I2Cx, Bool NewState)
00370 {
00371         if (NewState)
00372         {
00373                 if(I2Cx == LPC_I2C0)
00374                 {
00375                         NVIC_EnableIRQ(I2C0_IRQn);
00376                 }
00377                 else if (I2Cx == LPC_I2C1)
00378                 {
00379                         NVIC_EnableIRQ(I2C1_IRQn);
00380                 }
00381                 else if (I2Cx == LPC_I2C2)
00382                 {
00383                         NVIC_EnableIRQ(I2C2_IRQn);
00384                 }
00385         }
00386         else
00387         {
00388                 if(I2Cx == LPC_I2C0)
00389                 {
00390                         NVIC_DisableIRQ(I2C0_IRQn);
00391                 }
00392                 else if (I2Cx == LPC_I2C1)
00393                 {
00394                         NVIC_DisableIRQ(I2C1_IRQn);
00395                 }
00396                 else if (I2Cx == LPC_I2C2)
00397                 {
00398                         NVIC_DisableIRQ(I2C2_IRQn);
00399                 }
00400         }
00401     return;
00402 }
00403
00404
00405 /*********************************************************************/
00413 void I2C_MasterHandler (LPC_I2C_TypeDef  *I2Cx)
00414 {
00415         int32_t tmp;
00416         uint8_t returnCode;
00417         I2C_M_SETUP_Type *txrx_setup;
00418
00419         tmp = I2C_getNum(I2Cx);
00420         txrx_setup = (I2C_M_SETUP_Type *) i2cdat[tmp].txrx_setup;
00421
00422         returnCode = (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
00423         // Save current status
00424         txrx_setup->status = returnCode;
00425         // there's no relevant information
00426         if (returnCode == I2C_I2STAT_NO_INF){
00427                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00428                 return;
00429         }
00430
00431         /* ----------------------------- TRANSMIT PHASE --------------------------*/
00432         if (i2cdat[tmp].dir == 0){
00433                 switch (returnCode)
00434                 {
00435                 /* A start/repeat start condition has been transmitted -------------------*/
00436                 case I2C_I2STAT_M_TX_START:
00437                 case I2C_I2STAT_M_TX_RESTART:
00438                         I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
00439                         /*
00440                          * If there's any transmit data, then start to
00441                          * send SLA+W right now, otherwise check whether if there's
00442                          * any receive data for next state.
00443                          */
00444                         if ((txrx_setup->tx_data != NULL) && (txrx_setup->tx_length != 0)){
00445                                 I2Cx->I2DAT = (txrx_setup->sl_addr7bit << 1);
00446                                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00447                         } else {
00448                                 goto next_stage;
00449                         }
00450                         break;
00451
00452                 /* SLA+W has been transmitted, ACK has been received ----------------------*/
00453                 case I2C_I2STAT_M_TX_SLAW_ACK:
00454                 /* Data has been transmitted, ACK has been received */
00455                 case I2C_I2STAT_M_TX_DAT_ACK:
00456                         /* Send more data */
00457                         if ((txrx_setup->tx_count < txrx_setup->tx_length) \
00458                                         && (txrx_setup->tx_data != NULL)){
00459                                 I2Cx->I2DAT =  *(uint8_t *)(txrx_setup->tx_data + txrx_setup->tx_count);
00460                                 txrx_setup->tx_count++;
00461                                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00462                         }
00463                         // no more data, switch to next stage
00464                         else {
00465 next_stage:
00466                                 // change direction
00467                                 i2cdat[tmp].dir = 1;
00468                                 // Check if any data to receive
00469                                 if ((txrx_setup->rx_length != 0) && (txrx_setup->rx_data != NULL)){
00470                                                 // check whether if we need to issue an repeat start
00471                                                 if ((txrx_setup->tx_length != 0) && (txrx_setup->tx_data != NULL)){
00472                                                         // Send out an repeat start command
00473                                                         I2Cx->I2CONSET = I2C_I2CONSET_STA;
00474                                                         I2Cx->I2CONCLR = I2C_I2CONCLR_AAC | I2C_I2CONCLR_SIC;
00475                                                 }
00476                                                 // Don't need issue an repeat start, just goto send SLA+R
00477                                                 else {
00478                                                         goto send_slar;
00479                                                 }
00480                                 }
00481                                 // no more data send, the go to end stage now
00482                                 else {
00483                                         // success, goto end stage
00484                                         txrx_setup->status |= I2C_SETUP_STATUS_DONE;
00485                                         goto end_stage;
00486                                 }
00487                         }
00488                         break;
00489
00490                 /* SLA+W has been transmitted, NACK has been received ----------------------*/
00491                 case I2C_I2STAT_M_TX_SLAW_NACK:
00492                 /* Data has been transmitted, NACK has been received -----------------------*/
00493                 case I2C_I2STAT_M_TX_DAT_NACK:
00494                         // update status
00495                         txrx_setup->status |= I2C_SETUP_STATUS_NOACKF;
00496                         goto retry;
00497                 /* Arbitration lost in SLA+R/W or Data bytes -------------------------------*/
00498                 case I2C_I2STAT_M_TX_ARB_LOST:
00499                         // update status
00500                         txrx_setup->status |= I2C_SETUP_STATUS_ARBF;
00501                 default:
00502                         goto retry;
00503                 }
00504         }
00505
00506         /* ----------------------------- RECEIVE PHASE --------------------------*/
00507         else if (i2cdat[tmp].dir == 1){
00508                 switch (returnCode){
00509                         /* A start/repeat start condition has been transmitted ---------------------*/
00510                 case I2C_I2STAT_M_RX_START:
00511                 case I2C_I2STAT_M_RX_RESTART:
00512                         I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
00513                         /*
00514                          * If there's any receive data, then start to
00515                          * send SLA+R right now, otherwise check whether if there's
00516                          * any receive data for end of state.
00517                          */
00518                         if ((txrx_setup->rx_data != NULL) && (txrx_setup->rx_length != 0)){
00519 send_slar:
00520                                 I2Cx->I2DAT = (txrx_setup->sl_addr7bit << 1) | 0x01;
00521                                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00522                         } else {
00523                                 // Success, goto end stage
00524                                 txrx_setup->status |= I2C_SETUP_STATUS_DONE;
00525                                 goto end_stage;
00526                         }
00527                         break;
00528
00529                 /* SLA+R has been transmitted, ACK has been received -----------------*/
00530                 case I2C_I2STAT_M_RX_SLAR_ACK:
00531                         if (txrx_setup->rx_count < (txrx_setup->rx_length - 1)) {
00532                                 /*Data will be received,  ACK will be return*/
00533                                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
00534                         }
00535                         else {
00536                                 /*Last data will be received,  NACK will be return*/
00537                                 I2Cx->I2CONCLR = I2C_I2CONSET_AA;
00538                         }
00539                         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00540                         break;
00541
00542                 /* Data has been received, ACK has been returned ----------------------*/
00543                 case I2C_I2STAT_M_RX_DAT_ACK:
00544                         // Note save data and increase counter first, then check later
00545                         /* Save data  */
00546                         if ((txrx_setup->rx_data != NULL) && (txrx_setup->rx_count < txrx_setup->rx_length)){
00547                                 *(uint8_t *)(txrx_setup->rx_data + txrx_setup->rx_count) = (I2Cx->I2DAT & I2C_I2DAT_BITMASK);
00548                                 txrx_setup->rx_count++;
00549                         }
00550                         if (txrx_setup->rx_count < (txrx_setup->rx_length - 1)) {
00551                                 /*Data will be received,  ACK will be return*/
00552                                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
00553                         }
00554                         else {
00555                                 /*Last data will be received,  NACK will be return*/
00556                                 I2Cx->I2CONCLR = I2C_I2CONSET_AA;
00557                         }
00558
00559                         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00560                         break;
00561
00562                 /* Data has been received, NACK has been return -------------------------*/
00563                 case I2C_I2STAT_M_RX_DAT_NACK:
00564                         /* Save the last data */
00565                         if ((txrx_setup->rx_data != NULL) && (txrx_setup->rx_count < txrx_setup->rx_length)){
00566                                 *(uint8_t *)(txrx_setup->rx_data + txrx_setup->rx_count) = (I2Cx->I2DAT & I2C_I2DAT_BITMASK);
00567                                 txrx_setup->rx_count++;
00568                         }
00569                         // success, go to end stage
00570                         txrx_setup->status |= I2C_SETUP_STATUS_DONE;
00571                         goto end_stage;
00572
00573                 /* SLA+R has been transmitted, NACK has been received ------------------*/
00574                 case I2C_I2STAT_M_RX_SLAR_NACK:
00575                         // update status
00576                         txrx_setup->status |= I2C_SETUP_STATUS_NOACKF;
00577                         goto retry;
00578
00579                 /* Arbitration lost ----------------------------------------------------*/
00580                 case I2C_I2STAT_M_RX_ARB_LOST:
00581                         // update status
00582                         txrx_setup->status |= I2C_SETUP_STATUS_ARBF;
00583                 default:
00584 retry:
00585                         // check if retransmission is available
00586                         if (txrx_setup->retransmissions_count < txrx_setup->retransmissions_max){
00587                                 // Clear tx count
00588                                 txrx_setup->tx_count = 0;
00589                                 I2Cx->I2CONSET = I2C_I2CONSET_STA;
00590                                 I2Cx->I2CONCLR = I2C_I2CONCLR_AAC | I2C_I2CONCLR_SIC;
00591                                 txrx_setup->retransmissions_count++;
00592                         }
00593                         // End of stage
00594                         else {
00595 end_stage:
00596                                 // Disable interrupt
00597                                 I2C_IntCmd(I2Cx, FALSE);
00598                                 // Send stop
00599                                 I2C_Stop(I2Cx);
00600
00601                                 I2C_MasterComplete[tmp] = TRUE;
00602                         }
00603                         break;
00604                 }
00605         }
00606 }
00607
00608
00609 /*********************************************************************/
00617 void I2C_SlaveHandler (LPC_I2C_TypeDef  *I2Cx)
00618 {
00619         int32_t tmp;
00620         uint8_t returnCode;
00621         I2C_S_SETUP_Type *txrx_setup;
00622         uint32_t timeout;
00623
00624         tmp = I2C_getNum(I2Cx);
00625         txrx_setup = (I2C_S_SETUP_Type *) i2cdat[tmp].txrx_setup;
00626
00627         returnCode = (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
00628         // Save current status
00629         txrx_setup->status = returnCode;
00630         // there's no relevant information
00631         if (returnCode == I2C_I2STAT_NO_INF){
00632                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00633                 return;
00634         }
00635
00636
00637         switch (returnCode)
00638         {
00639
00640         /* No status information */
00641         case I2C_I2STAT_NO_INF:
00642                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
00643                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00644                 break;
00645
00646         /* Reading phase -------------------------------------------------------- */
00647         /* Own SLA+R has been received, ACK has been returned */
00648         case I2C_I2STAT_S_RX_SLAW_ACK:
00649         /* General call address has been received, ACK has been returned */
00650         case I2C_I2STAT_S_RX_GENCALL_ACK:
00651                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
00652                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00653                 break;
00654
00655         /* Previously addressed with own SLA;
00656          * DATA byte has been received;
00657          * ACK has been returned */
00658         case I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK:
00659         /* DATA has been received, ACK hasn been return */
00660         case I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK:
00661                 /*
00662                  * All data bytes that over-flow the specified receive
00663                  * data length, just ignore them.
00664                  */
00665                 if ((txrx_setup->rx_count < txrx_setup->rx_length) \
00666                                 && (txrx_setup->rx_data != NULL)){
00667                         *(uint8_t *)(txrx_setup->rx_data + txrx_setup->rx_count) = (uint8_t)I2Cx->I2DAT;
00668                         txrx_setup->rx_count++;
00669                 }
00670                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
00671                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00672                 break;
00673
00674         /* Previously addressed with own SLA;
00675          * DATA byte has been received;
00676          * NOT ACK has been returned */
00677         case I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK:
00678         /* DATA has been received, NOT ACK has been returned */
00679         case I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK:
00680                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00681                 break;
00682
00683         /*
00684          * Note that: Return code only let us know a stop condition mixed
00685          * with a repeat start condition in the same code value.
00686          * So we should provide a time-out. In case this is really a stop
00687          * condition, this will return back after time out condition. Otherwise,
00688          * next session that is slave receive data will be completed.
00689          */
00690
00691         /* A Stop or a repeat start condition */
00692         case I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX:
00693                 // Temporally lock the interrupt for timeout condition
00694                 I2C_IntCmd(I2Cx, FALSE);
00695                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00696                 // enable time out
00697                 timeout = I2C_SLAVE_TIME_OUT;
00698                 while(1){
00699                         if (I2Cx->I2CONSET & I2C_I2CONSET_SI){
00700                                 // re-Enable interrupt
00701                                 I2C_IntCmd(I2Cx, TRUE);
00702                                 break;
00703                         } else {
00704                                 timeout--;
00705                                 if (timeout == 0){
00706                                         // timeout occur, it's really a stop condition
00707                                         txrx_setup->status |= I2C_SETUP_STATUS_DONE;
00708                                         goto s_int_end;
00709                                 }
00710                         }
00711                 }
00712                 break;
00713
00714         /* Writing phase -------------------------------------------------------- */
00715         /* Own SLA+R has been received, ACK has been returned */
00716         case I2C_I2STAT_S_TX_SLAR_ACK:
00717         /* Data has been transmitted, ACK has been received */
00718         case I2C_I2STAT_S_TX_DAT_ACK:
00719                 /*
00720                  * All data bytes that over-flow the specified receive
00721                  * data length, just ignore them.
00722                  */
00723                 if ((txrx_setup->tx_count < txrx_setup->tx_length) \
00724                                 && (txrx_setup->tx_data != NULL)){
00725                         I2Cx->I2DAT = *(uint8_t *) (txrx_setup->tx_data + txrx_setup->tx_count);
00726                         txrx_setup->tx_count++;
00727                 }
00728                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
00729                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00730                 break;
00731
00732         /* Data has been transmitted, NACK has been received,
00733          * that means there's no more data to send, exit now */
00734         /*
00735          * Note: Don't wait for stop event since in slave transmit mode,
00736          * since there no proof lets us know when a stop signal has been received
00737          * on slave side.
00738          */
00739         case I2C_I2STAT_S_TX_DAT_NACK:
00740                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
00741                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00742                 txrx_setup->status |= I2C_SETUP_STATUS_DONE;
00743                 goto s_int_end;
00744
00745         // Other status must be captured
00746         default:
00747 s_int_end:
00748                 // Disable interrupt
00749                 I2C_IntCmd(I2Cx, FALSE);
00750                 I2Cx->I2CONCLR = I2C_I2CONCLR_AAC | I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC;
00751                 I2C_SlaveComplete[tmp] = TRUE;
00752                 break;
00753         }
00754 }
00755
00756 /*********************************************************************/
00778 Status I2C_MasterTransferData(LPC_I2C_TypeDef *I2Cx, I2C_M_SETUP_Type *TransferCfg, \
00779                                                                 I2C_TRANSFER_OPT_Type Opt)
00780 {
00781         uint8_t *txdat;
00782         uint8_t *rxdat;
00783         uint32_t CodeStatus;
00784         uint8_t tmp;
00785
00786         // reset all default state
00787         txdat = (uint8_t *) TransferCfg->tx_data;
00788         rxdat = (uint8_t *) TransferCfg->rx_data;
00789         // Reset I2C setup value to default state
00790         TransferCfg->tx_count = 0;
00791         TransferCfg->rx_count = 0;
00792         TransferCfg->status = 0;
00793
00794         if (Opt == I2C_TRANSFER_POLLING){
00795
00796                 /* First Start condition -------------------------------------------------------------- */
00797                 TransferCfg->retransmissions_count = 0;
00798 retry:
00799                 // reset all default state
00800                 txdat = (uint8_t *) TransferCfg->tx_data;
00801                 rxdat = (uint8_t *) TransferCfg->rx_data;
00802                 // Reset I2C setup value to default state
00803                 TransferCfg->tx_count = 0;
00804                 TransferCfg->rx_count = 0;
00805                 CodeStatus = 0;
00806
00807                 // Start command
00808                 CodeStatus = I2C_Start(I2Cx);
00809                 if ((CodeStatus != I2C_I2STAT_M_TX_START) \
00810                                 && (CodeStatus != I2C_I2STAT_M_TX_RESTART)){
00811                         TransferCfg->retransmissions_count++;
00812                         if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
00813                                 // save status
00814                                 TransferCfg->status = CodeStatus;
00815                                 goto error;
00816                         } else {
00817                                 goto retry;
00818                         }
00819                 }
00820
00821                 /* In case of sending data first --------------------------------------------------- */
00822                 if ((TransferCfg->tx_length != 0) && (TransferCfg->tx_data != NULL)){
00823
00824                         /* Send slave address + WR direction bit = 0 ----------------------------------- */
00825                         CodeStatus = I2C_SendByte(I2Cx, (TransferCfg->sl_addr7bit << 1));
00826                         if (CodeStatus != I2C_I2STAT_M_TX_SLAW_ACK){
00827                                 TransferCfg->retransmissions_count++;
00828                                 if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
00829                                         // save status
00830                                         TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_NOACKF;
00831                                         goto error;
00832                                 } else {
00833                                         goto retry;
00834                                 }
00835                         }
00836
00837                         /* Send a number of data bytes ---------------------------------------- */
00838                         while (TransferCfg->tx_count < TransferCfg->tx_length)
00839                         {
00840                                 CodeStatus = I2C_SendByte(I2Cx, *txdat);
00841                                 if (CodeStatus != I2C_I2STAT_M_TX_DAT_ACK){
00842                                         TransferCfg->retransmissions_count++;
00843                                         if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
00844                                                 // save status
00845                                                 TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_NOACKF;
00846                                                 goto error;
00847                                         } else {
00848                                                 goto retry;
00849                                         }
00850                                 }
00851
00852                                 txdat++;
00853                                 TransferCfg->tx_count++;
00854                         }
00855                 }
00856
00857                 /* Second Start condition (Repeat Start) ------------------------------------------- */
00858                 if ((TransferCfg->tx_length != 0) && (TransferCfg->tx_data != NULL) \
00859                                 && (TransferCfg->rx_length != 0) && (TransferCfg->rx_data != NULL)){
00860
00861                         CodeStatus = I2C_Start(I2Cx);
00862                         if ((CodeStatus != I2C_I2STAT_M_RX_START) \
00863                                         && (CodeStatus != I2C_I2STAT_M_RX_RESTART)){
00864                                 TransferCfg->retransmissions_count++;
00865                                 if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
00866                                         // Update status
00867                                         TransferCfg->status = CodeStatus;
00868                                         goto error;
00869                                 } else {
00870                                         goto retry;
00871                                 }
00872                         }
00873                 }
00874
00875                 /* Then, start reading after sending data -------------------------------------- */
00876                 if ((TransferCfg->rx_length != 0) && (TransferCfg->rx_data != NULL)){
00877                         /* Send slave address + RD direction bit = 1 ----------------------------------- */
00878
00879                         CodeStatus = I2C_SendByte(I2Cx, ((TransferCfg->sl_addr7bit << 1) | 0x01));
00880                         if (CodeStatus != I2C_I2STAT_M_RX_SLAR_ACK){
00881                                 TransferCfg->retransmissions_count++;
00882                                 if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
00883                                         // update status
00884                                         TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_NOACKF;
00885                                         goto error;
00886                                 } else {
00887                                         goto retry;
00888                                 }
00889                         }
00890
00891                         /* Receive a number of data bytes ------------------------------------------------- */
00892                         while (TransferCfg->rx_count < TransferCfg->rx_length){
00893
00894                                 /*
00895                                  * Note that: if data length is only one, the master should not
00896                                  * issue an ACK signal on bus after reading to avoid of next data frame
00897                                  * on slave side
00898                                  */
00899                                 if (TransferCfg->rx_count < (TransferCfg->rx_length - 1)){
00900                                         // Issue an ACK signal for next data frame
00901                                         CodeStatus = I2C_GetByte(I2Cx, &tmp, TRUE);
00902                                         if (CodeStatus != I2C_I2STAT_M_RX_DAT_ACK){
00903                                                 TransferCfg->retransmissions_count++;
00904                                                 if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
00905                                                         // update status
00906                                                         TransferCfg->status = CodeStatus;
00907                                                         goto error;
00908                                                 } else {
00909                                                         goto retry;
00910                                                 }
00911                                         }
00912                                 } else {
00913                                         // Do not issue an ACK signal
00914                                         CodeStatus = I2C_GetByte(I2Cx, &tmp, FALSE);
00915                                         if (CodeStatus != I2C_I2STAT_M_RX_DAT_NACK){
00916                                                 TransferCfg->retransmissions_count++;
00917                                                 if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
00918                                                         // update status
00919                                                         TransferCfg->status = CodeStatus;
00920                                                         goto error;
00921                                                 } else {
00922                                                         goto retry;
00923                                                 }
00924                                         }
00925                                 }
00926                                 *rxdat++ = tmp;
00927                                 TransferCfg->rx_count++;
00928                         }
00929                 }
00930
00931                 /* Send STOP condition ------------------------------------------------- */
00932                 I2C_Stop(I2Cx);
00933                 return SUCCESS;
00934
00935 error:
00936                 // Send stop condition
00937                 I2C_Stop(I2Cx);
00938                 return ERROR;
00939         }
00940
00941         else if (Opt == I2C_TRANSFER_INTERRUPT){
00942                 // Setup tx_rx data, callback and interrupt handler
00943                 tmp = I2C_getNum(I2Cx);
00944                 i2cdat[tmp].txrx_setup = (uint32_t) TransferCfg;
00945                 // Set direction phase, write first
00946                 i2cdat[tmp].dir = 0;
00947
00948                 /* First Start condition -------------------------------------------------------------- */
00949                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
00950                 I2Cx->I2CONSET = I2C_I2CONSET_STA;
00951                 I2C_IntCmd(I2Cx, TRUE);
00952
00953                 return (SUCCESS);
00954         }
00955
00956         return ERROR;
00957 }
00958
00959 /*********************************************************************/
00990 Status I2C_SlaveTransferData(LPC_I2C_TypeDef *I2Cx, I2C_S_SETUP_Type *TransferCfg, \
00991                                                                 I2C_TRANSFER_OPT_Type Opt)
00992 {
00993         uint8_t *txdat;
00994         uint8_t *rxdat;
00995         uint32_t CodeStatus;
00996         uint32_t timeout;
00997         int32_t time_en;
00998         int32_t tmp;
00999
01000         // reset all default state
01001         txdat = (uint8_t *) TransferCfg->tx_data;
01002         rxdat = (uint8_t *) TransferCfg->rx_data;
01003         // Reset I2C setup value to default state
01004         TransferCfg->tx_count = 0;
01005         TransferCfg->rx_count = 0;
01006         TransferCfg->status = 0;
01007
01008
01009         // Polling option
01010         if (Opt == I2C_TRANSFER_POLLING){
01011
01012                 /* Set AA bit to ACK command on I2C bus */
01013                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
01014                 /* Clear SI bit to be ready ... */
01015                 I2Cx->I2CONCLR = (I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC);
01016
01017                 time_en = 0;
01018                 timeout = 0;
01019
01020                 while (1)
01021                 {
01022                         /* Check SI flag ready */
01023                         if (I2Cx->I2CONSET & I2C_I2CONSET_SI)
01024                         {
01025                                 time_en = 0;
01026
01027                                 switch (CodeStatus = (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK))
01028                                 {
01029
01030                                 /* No status information */
01031                                 case I2C_I2STAT_NO_INF:
01032                                         I2Cx->I2CONSET = I2C_I2CONSET_AA;
01033                                         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
01034                                         break;
01035
01036                                 /* Reading phase -------------------------------------------------------- */
01037                                 /* Own SLA+R has been received, ACK has been returned */
01038                                 case I2C_I2STAT_S_RX_SLAW_ACK:
01039                                 /* General call address has been received, ACK has been returned */
01040                                 case I2C_I2STAT_S_RX_GENCALL_ACK:
01041                                         I2Cx->I2CONSET = I2C_I2CONSET_AA;
01042                                         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
01043                                         break;
01044
01045                                 /* Previously addressed with own SLA;
01046                                  * DATA byte has been received;
01047                                  * ACK has been returned */
01048                                 case I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK:
01049                                 /* DATA has been received, ACK hasn been return */
01050                                 case I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK:
01051                                         /*
01052                                          * All data bytes that over-flow the specified receive
01053                                          * data length, just ignore them.
01054                                          */
01055                                         if ((TransferCfg->rx_count < TransferCfg->rx_length) \
01056                                                         && (TransferCfg->rx_data != NULL)){
01057                                                 *rxdat++ = (uint8_t)I2Cx->I2DAT;
01058                                                 TransferCfg->rx_count++;
01059                                         }
01060                                         I2Cx->I2CONSET = I2C_I2CONSET_AA;
01061                                         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
01062                                         break;
01063
01064                                 /* Previously addressed with own SLA;
01065                                  * DATA byte has been received;
01066                                  * NOT ACK has been returned */
01067                                 case I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK:
01068                                 /* DATA has been received, NOT ACK has been returned */
01069                                 case I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK:
01070                                         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
01071                                         break;
01072
01073                                 /*
01074                                  * Note that: Return code only let us know a stop condition mixed
01075                                  * with a repeat start condition in the same code value.
01076                                  * So we should provide a time-out. In case this is really a stop
01077                                  * condition, this will return back after time out condition. Otherwise,
01078                                  * next session that is slave receive data will be completed.
01079                                  */
01080
01081                                 /* A Stop or a repeat start condition */
01082                                 case I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX:
01083                                         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
01084                                         // enable time out
01085                                         time_en = 1;
01086                                         timeout = 0;
01087                                         break;
01088
01089                                 /* Writing phase -------------------------------------------------------- */
01090                                 /* Own SLA+R has been received, ACK has been returned */
01091                                 case I2C_I2STAT_S_TX_SLAR_ACK:
01092                                 /* Data has been transmitted, ACK has been received */
01093                                 case I2C_I2STAT_S_TX_DAT_ACK:
01094                                         /*
01095                                          * All data bytes that over-flow the specified receive
01096                                          * data length, just ignore them.
01097                                          */
01098                                         if ((TransferCfg->tx_count < TransferCfg->tx_length) \
01099                                                         && (TransferCfg->tx_data != NULL)){
01100                                                 I2Cx->I2DAT = *txdat++;
01101                                                 TransferCfg->tx_count++;
01102                                         }
01103                                         I2Cx->I2CONSET = I2C_I2CONSET_AA;
01104                                         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
01105                                         break;
01106
01107                                 /* Data has been transmitted, NACK has been received,
01108                                  * that means there's no more data to send, exit now */
01109                                 /*
01110                                  * Note: Don't wait for stop event since in slave transmit mode,
01111                                  * since there no proof lets us know when a stop signal has been received
01112                                  * on slave side.
01113                                  */
01114                                 case I2C_I2STAT_S_TX_DAT_NACK:
01115                                         I2Cx->I2CONSET = I2C_I2CONSET_AA;
01116                                         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
01117                                         // enable time out
01118                                         time_en = 1;
01119                                         timeout = 0;
01120                                         break;
01121
01122                                 // Other status must be captured
01123                                 default:
01124                                         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
01125                                         goto s_error;
01126                                 }
01127                         } else if (time_en){
01128                                 if (timeout++ > I2C_SLAVE_TIME_OUT){
01129                                         // it's really a stop condition, goto end stage
01130                                         goto s_end_stage;
01131                                 }
01132                         }
01133                 }
01134
01135 s_end_stage:
01136                 /* Clear AA bit to disable ACK on I2C bus */
01137                 I2Cx->I2CONCLR = I2C_I2CONCLR_AAC;
01138                 // Check if there's no error during operation
01139                 // Update status
01140                 TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_DONE;
01141                 return SUCCESS;
01142
01143 s_error:
01144                 /* Clear AA bit to disable ACK on I2C bus */
01145                 I2Cx->I2CONCLR = I2C_I2CONCLR_AAC;
01146                 // Update status
01147                 TransferCfg->status = CodeStatus;
01148                 return ERROR;
01149         }
01150
01151         else if (Opt == I2C_TRANSFER_INTERRUPT){
01152                 // Setup tx_rx data, callback and interrupt handler
01153                 tmp = I2C_getNum(I2Cx);
01154                 i2cdat[tmp].txrx_setup = (uint32_t) TransferCfg;
01155                 // Set direction phase, read first
01156                 i2cdat[tmp].dir = 1;
01157
01158                 // Enable AA
01159                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
01160                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC;
01161                 I2C_IntCmd(I2Cx, TRUE);
01162
01163                 return (SUCCESS);
01164         }
01165
01166         return ERROR;
01167 }
01168
01169 /*********************************************************************/
01181 void I2C_SetOwnSlaveAddr(LPC_I2C_TypeDef *I2Cx, I2C_OWNSLAVEADDR_CFG_Type *OwnSlaveAddrConfigStruct)
01182 {
01183         uint32_t tmp;
01184         CHECK_PARAM(PARAM_I2Cx(I2Cx));
01185         CHECK_PARAM(PARAM_I2C_SLAVEADDR_CH(OwnSlaveAddrConfigStruct->SlaveAddrChannel));
01186         CHECK_PARAM(PARAM_FUNCTIONALSTATE(OwnSlaveAddrConfigStruct->GeneralCallState));
01187
01188         tmp = (((uint32_t)(OwnSlaveAddrConfigStruct->SlaveAddr_7bit << 1)) \
01189                         | ((OwnSlaveAddrConfigStruct->GeneralCallState == ENABLE) ? 0x01 : 0x00))& I2C_I2ADR_BITMASK;
01190         switch (OwnSlaveAddrConfigStruct->SlaveAddrChannel)
01191         {
01192         case 0:
01193                 I2Cx->I2ADR0 = tmp;
01194                 I2Cx->I2MASK0 = I2C_I2MASK_MASK((uint32_t) \
01195                                 (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
01196                 break;
01197         case 1:
01198                 I2Cx->I2ADR1 = tmp;
01199                 I2Cx->I2MASK1 = I2C_I2MASK_MASK((uint32_t) \
01200                                 (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
01201                 break;
01202         case 2:
01203                 I2Cx->I2ADR2 = tmp;
01204                 I2Cx->I2MASK2 = I2C_I2MASK_MASK((uint32_t) \
01205                                 (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
01206                 break;
01207         case 3:
01208                 I2Cx->I2ADR3 = tmp;
01209                 I2Cx->I2MASK3 = I2C_I2MASK_MASK((uint32_t) \
01210                                 (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
01211                 break;
01212         }
01213 }
01214
01215
01216 /*********************************************************************/
01234 void I2C_MonitorModeConfig(LPC_I2C_TypeDef *I2Cx, uint32_t MonitorCfgType, FunctionalState NewState)
01235 {
01236         CHECK_PARAM(PARAM_I2Cx(I2Cx));
01237         CHECK_PARAM(PARAM_I2C_MONITOR_CFG(MonitorCfgType));
01238         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
01239
01240         if (NewState == ENABLE)
01241         {
01242                 I2Cx->MMCTRL |= MonitorCfgType;
01243         }
01244         else
01245         {
01246                 I2Cx->MMCTRL &= (~MonitorCfgType) & I2C_I2MMCTRL_BITMASK;
01247         }
01248 }
01249
01250
01251 /*********************************************************************/
01262 void I2C_MonitorModeCmd(LPC_I2C_TypeDef *I2Cx, FunctionalState NewState)
01263 {
01264         CHECK_PARAM(PARAM_I2Cx(I2Cx));
01265         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
01266
01267         if (NewState == ENABLE)
01268         {
01269                 I2Cx->MMCTRL |= I2C_I2MMCTRL_MM_ENA;
01270                 I2Cx->I2CONSET = I2C_I2CONSET_AA;
01271                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC;
01272         }
01273         else
01274         {
01275                 I2Cx->MMCTRL &= (~I2C_I2MMCTRL_MM_ENA) & I2C_I2MMCTRL_BITMASK;
01276                 I2Cx->I2CONCLR = I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC | I2C_I2CONCLR_AAC;
01277         }
01278         I2C_MonitorBufferIndex = 0;
01279 }
01280
01281
01282 /*********************************************************************/
01297 uint8_t I2C_MonitorGetDatabuffer(LPC_I2C_TypeDef *I2Cx)
01298 {
01299         CHECK_PARAM(PARAM_I2Cx(I2Cx));
01300         return ((uint8_t)(I2Cx->I2DATA_BUFFER));
01301 }
01302
01303 /*********************************************************************/
01318 BOOL_8 I2C_MonitorHandler(LPC_I2C_TypeDef *I2Cx, uint8_t *buffer, uint32_t size)
01319 {
01320         BOOL_8 ret=FALSE;
01321
01322         I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
01323
01324         buffer[I2C_MonitorBufferIndex] = (uint8_t)(I2Cx->I2DATA_BUFFER);
01325         I2C_MonitorBufferIndex++;
01326         if(I2C_MonitorBufferIndex >= size)
01327         {
01328                 ret = TRUE;
01329         }
01330         return ret;
01331 }
01332 /*********************************************************************/
01342 uint32_t I2C_MasterTransferComplete(LPC_I2C_TypeDef *I2Cx)
01343 {
01344         uint32_t retval, tmp;
01345         tmp = I2C_getNum(I2Cx);
01346         retval = I2C_MasterComplete[tmp];
01347         I2C_MasterComplete[tmp] = FALSE;
01348         return retval;
01349 }
01350
01351 /*********************************************************************/
01359 uint32_t I2C_SlaveTransferComplete(LPC_I2C_TypeDef *I2Cx)
01360 {
01361         uint32_t retval, tmp;
01362         tmp = I2C_getNum(I2Cx);
01363         retval = I2C_SlaveComplete[tmp];
01364         I2C_SlaveComplete[tmp] = FALSE;
01365         return retval;
01366 }
01367
01368
01369
01374 #endif /* _I2C */
01375
01380 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2c.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2c.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_i2c.h                           2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_I2C_H_
00034 #define LPC17XX_I2C_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046
00047 /* Private Macros ------------------------------------------------------------- */
00052 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00053 /*******************************************************************/
00056 #define I2C_I2CONSET_AA                         ((0x04))
00057 #define I2C_I2CONSET_SI                         ((0x08))
00058 #define I2C_I2CONSET_STO                        ((0x10))
00059 #define I2C_I2CONSET_STA                        ((0x20))
00060 #define I2C_I2CONSET_I2EN                       ((0x40))
00062 /*******************************************************************/
00066 #define I2C_I2CONCLR_AAC                        ((1<<2))
00067
00068 #define I2C_I2CONCLR_SIC                        ((1<<3))
00069
00070 #define I2C_I2CONCLR_STAC                       ((1<<5))
00071
00072 #define I2C_I2CONCLR_I2ENC                      ((1<<6))
00073
00074 /********************************************************************/
00077 /* Return Code in I2C status register */
00078 #define I2C_STAT_CODE_BITMASK           ((0xF8))
00079
00080 /* I2C return status code definitions ----------------------------- */
00081
00083 #define I2C_I2STAT_NO_INF                                               ((0xF8))
00084
00085 /* Master transmit mode -------------------------------------------- */
00087 #define I2C_I2STAT_M_TX_START                                   ((0x08))
00088
00089 #define I2C_I2STAT_M_TX_RESTART                                 ((0x10))
00090
00091 #define I2C_I2STAT_M_TX_SLAW_ACK                                ((0x18))
00092
00093 #define I2C_I2STAT_M_TX_SLAW_NACK                               ((0x20))
00094
00095 #define I2C_I2STAT_M_TX_DAT_ACK                                 ((0x28))
00096
00097 #define I2C_I2STAT_M_TX_DAT_NACK                                ((0x30))
00098
00099 #define I2C_I2STAT_M_TX_ARB_LOST                                ((0x38))
00100
00101 /* Master receive mode -------------------------------------------- */
00103 #define I2C_I2STAT_M_RX_START                                   ((0x08))
00104
00105 #define I2C_I2STAT_M_RX_RESTART                                 ((0x10))
00106
00107 #define I2C_I2STAT_M_RX_ARB_LOST                                ((0x38))
00108
00109 #define I2C_I2STAT_M_RX_SLAR_ACK                                ((0x40))
00110
00111 #define I2C_I2STAT_M_RX_SLAR_NACK                               ((0x48))
00112
00113 #define I2C_I2STAT_M_RX_DAT_ACK                                 ((0x50))
00114
00115 #define I2C_I2STAT_M_RX_DAT_NACK                                ((0x58))
00116
00117 /* Slave receive mode -------------------------------------------- */
00119 #define I2C_I2STAT_S_RX_SLAW_ACK                                ((0x60))
00120
00122 #define I2C_I2STAT_S_RX_ARB_LOST_M_SLA                  ((0x68))
00123
00124 //#define I2C_I2STAT_S_RX_SLAW_ACK                              ((0x68))
00125
00127 #define I2C_I2STAT_S_RX_GENCALL_ACK                             ((0x70))
00128
00130 #define I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL              ((0x78))
00131
00132 //#define I2C_I2STAT_S_RX_GENCALL_ACK                           ((0x78))
00133
00136 #define I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK                 ((0x80))
00137
00139 #define I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK                ((0x88))
00140
00142 #define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK             ((0x90))
00143
00145 #define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK    ((0x98))
00146
00149 #define I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX   ((0xA0))
00150
00153 #define I2C_I2STAT_S_TX_SLAR_ACK                                ((0xA8))
00154
00156 #define I2C_I2STAT_S_TX_ARB_LOST_M_SLA                  ((0xB0))
00157
00158 //#define I2C_I2STAT_S_TX_SLAR_ACK                              ((0xB0))
00159
00161 #define I2C_I2STAT_S_TX_DAT_ACK                                 ((0xB8))
00162
00163 #define I2C_I2STAT_S_TX_DAT_NACK                                ((0xC0))
00164
00166 #define I2C_I2STAT_S_TX_LAST_DAT_ACK                    ((0xC8))
00167
00169 #define I2C_SLAVE_TIME_OUT                                              0x10000UL
00170
00171 /********************************************************************/
00175 #define I2C_I2DAT_BITMASK                       ((0xFF))
00176
00180 #define I2C_I2DAT_IDLE_CHAR                     (0xFF)
00181
00182 /********************************************************************/
00185 #define I2C_I2MMCTRL_MM_ENA                     ((1<<0))
00186 #define I2C_I2MMCTRL_ENA_SCL            ((1<<1))
00187 #define I2C_I2MMCTRL_MATCH_ALL          ((1<<2))
00188 #define I2C_I2MMCTRL_BITMASK            ((0x07))
00190 /********************************************************************/
00194 #define I2DATA_BUFFER_BITMASK           ((0xFF))
00195
00196 /********************************************************************/
00200 #define I2C_I2ADR_GC                            ((1<<0))
00201
00202 #define I2C_I2ADR_BITMASK                       ((0xFF))
00203
00204 /********************************************************************/
00208 #define I2C_I2MASK_MASK(n)                      ((n&0xFE))
00209
00210 /********************************************************************/
00214 #define I2C_I2SCLH_BITMASK                      ((0xFFFF))
00215
00216 /********************************************************************/
00220 #define I2C_I2SCLL_BITMASK                      ((0xFFFF))
00221
00222 /* I2C status values */
00223 #define I2C_SETUP_STATUS_ARBF   (1<<8)
00224 #define I2C_SETUP_STATUS_NOACKF (1<<9)
00225 #define I2C_SETUP_STATUS_DONE   (1<<10)
00227 /*********************************************************************/
00230 #define I2C_MONITOR_CFG_SCL_OUTPUT      I2C_I2MMCTRL_ENA_SCL
00231 #define I2C_MONITOR_CFG_MATCHALL        I2C_I2MMCTRL_MATCH_ALL
00233 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00234 /* Macros check I2C slave address */
00235 #define PARAM_I2C_SLAVEADDR_CH(n)       (n<=3)
00236
00238 #define PARAM_I2Cx(n)   ((((uint32_t *)n)==((uint32_t *)LPC_I2C0)) \
00239 || (((uint32_t *)n)==((uint32_t *)LPC_I2C1)) \
00240 || (((uint32_t *)n)==((uint32_t *)LPC_I2C2)))
00241
00242 /* Macros check I2C monitor configuration type */
00243 #define PARAM_I2C_MONITOR_CFG(n) ((n==I2C_MONITOR_CFG_SCL_OUTPUT) || (I2C_MONITOR_CFG_MATCHALL))
00244
00251 /* Public Types --------------------------------------------------------------- */
00259 typedef struct {
00260         uint8_t SlaveAddrChannel;
00263         uint8_t SlaveAddr_7bit;
00264         uint8_t GeneralCallState;
00269         uint8_t SlaveAddrMaskValue;
00277 } I2C_OWNSLAVEADDR_CFG_Type;
00278
00279
00283 typedef struct
00284 {
00285   uint32_t          sl_addr7bit;
00286   uint8_t*          tx_data;
00288   uint32_t          tx_length;
00290   uint32_t          tx_count;
00291   uint8_t*          rx_data;
00293   uint32_t          rx_length;
00295   uint32_t          rx_count;
00296   uint32_t          retransmissions_max;
00297   uint32_t          retransmissions_count;
00298   uint32_t          status;
00299   void                          (*callback)(void);
00301 } I2C_M_SETUP_Type;
00302
00303
00307 typedef struct
00308 {
00309   uint8_t*          tx_data;
00310   uint32_t          tx_length;
00311   uint32_t          tx_count;
00312   uint8_t*          rx_data;
00313   uint32_t          rx_length;
00314   uint32_t          rx_count;
00315   uint32_t          status;
00316   void                          (*callback)(void);
00317 } I2C_S_SETUP_Type;
00318
00322 typedef enum {
00323         I2C_TRANSFER_POLLING = 0,
00324         I2C_TRANSFER_INTERRUPT
00325 } I2C_TRANSFER_OPT_Type;
00326
00327
00333 /* Public Functions ----------------------------------------------------------- */
00338 /* I2C Init/DeInit functions ---------- */
00339 void I2C_Init(LPC_I2C_TypeDef *I2Cx, uint32_t clockrate);
00340 void I2C_DeInit(LPC_I2C_TypeDef* I2Cx);
00341 //void I2C_SetClock (LPC_I2C_TypeDef *I2Cx, uint32_t target_clock);
00342 void I2C_Cmd(LPC_I2C_TypeDef* I2Cx, FunctionalState NewState);
00343
00344 /* I2C transfer data functions -------- */
00345 Status I2C_MasterTransferData(LPC_I2C_TypeDef *I2Cx, \
00346                 I2C_M_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt);
00347 Status I2C_SlaveTransferData(LPC_I2C_TypeDef *I2Cx, \
00348                 I2C_S_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt);
00349 uint32_t I2C_MasterTransferComplete(LPC_I2C_TypeDef *I2Cx);
00350 uint32_t I2C_SlaveTransferComplete(LPC_I2C_TypeDef *I2Cx);
00351
00352
00353 void I2C_SetOwnSlaveAddr(LPC_I2C_TypeDef *I2Cx, I2C_OWNSLAVEADDR_CFG_Type *OwnSlaveAddrConfigStruct);
00354 uint8_t I2C_GetLastStatusCode(LPC_I2C_TypeDef* I2Cx);
00355
00356 /* I2C Monitor functions ---------------*/
00357 void I2C_MonitorModeConfig(LPC_I2C_TypeDef *I2Cx, uint32_t MonitorCfgType, FunctionalState NewState);
00358 void I2C_MonitorModeCmd(LPC_I2C_TypeDef *I2Cx, FunctionalState NewState);
00359 uint8_t I2C_MonitorGetDatabuffer(LPC_I2C_TypeDef *I2Cx);
00360 BOOL_8 I2C_MonitorHandler(LPC_I2C_TypeDef *I2Cx, uint8_t *buffer, uint32_t size);
00361
00362 /* I2C Interrupt handler functions ------*/
00363 void I2C_IntCmd (LPC_I2C_TypeDef *I2Cx, Bool NewState);
00364 void I2C_MasterHandler (LPC_I2C_TypeDef *I2Cx);
00365 void I2C_SlaveHandler (LPC_I2C_TypeDef *I2Cx);
00366
00367
00373 #ifdef __cplusplus
00374 }
00375 #endif
00376
00377 #endif /* LPC17XX_I2C_H_ */
00378
00383 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:41 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2s.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_i2s.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_i2s.c                           2010-09-23
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_i2s.h"
00034 #include "lpc17xx_clkpwr.h"
00035
00036
00037 /* If this source file built with example, the LPC17xx FW library configuration
00038  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00039  * otherwise the default FW library configuration file must be included instead
00040  */
00041 #ifdef __BUILD_WITH_EXAMPLE__
00042 #include "lpc17xx_libcfg.h"
00043 #else
00044 #include "lpc17xx_libcfg_default.h"
00045 #endif /* __BUILD_WITH_EXAMPLE__ */
00046
00047
00048 #ifdef _I2S
00049
00050 /* Private Functions ---------------------------------------------------------- */
00051
00052 static uint8_t i2s_GetWordWidth(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode);
00053 static uint8_t i2s_GetChannel(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode);
00054
00055 /********************************************************************/
00063 static uint8_t i2s_GetWordWidth(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) {
00064         uint8_t value;
00065
00066         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00067         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00068
00069         if (TRMode == I2S_TX_MODE) {
00070                 value = (I2Sx->I2SDAO) & 0x03; /* get wordwidth bit */
00071         } else {
00072                 value = (I2Sx->I2SDAI) & 0x03; /* get wordwidth bit */
00073         }
00074         switch (value) {
00075         case I2S_WORDWIDTH_8:
00076                 return 8;
00077         case I2S_WORDWIDTH_16:
00078                 return 16;
00079         default:
00080                 return 32;
00081         }
00082 }
00083
00084 /********************************************************************/
00092 static uint8_t i2s_GetChannel(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) {
00093         uint8_t value;
00094
00095         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00096         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00097
00098         if (TRMode == I2S_TX_MODE) {
00099                 value = ((I2Sx->I2SDAO) & 0x04)>>2; /* get bit[2] */
00100         } else {
00101                 value = ((I2Sx->I2SDAI) & 0x04)>>2; /* get bit[2] */
00102         }
00103         if(value == I2S_MONO) return 1;
00104           return 2;
00105 }
00106
00107 /* End of Private Functions --------------------------------------------------- */
00108
00109
00110 /* Public Functions ----------------------------------------------------------- */
00115 /********************************************************************/
00121 void I2S_Init(LPC_I2S_TypeDef *I2Sx) {
00122         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00123
00124         // Turn on power and clock
00125         CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCI2S, ENABLE);
00126         LPC_I2S->I2SDAI = LPC_I2S->I2SDAO = 0x00;
00127 }
00128
00129 /********************************************************************/
00142 void I2S_Config(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, I2S_CFG_Type* ConfigStruct)
00143 {
00144         uint32_t bps, config;
00145
00146         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00147
00148         CHECK_PARAM(PARAM_I2S_WORDWIDTH(ConfigStruct->wordwidth));
00149         CHECK_PARAM(PARAM_I2S_CHANNEL(ConfigStruct->mono));
00150         CHECK_PARAM(PARAM_I2S_STOP(ConfigStruct->stop));
00151         CHECK_PARAM(PARAM_I2S_RESET(ConfigStruct->reset));
00152         CHECK_PARAM(PARAM_I2S_WS_SEL(ConfigStruct->ws_sel));
00153         CHECK_PARAM(PARAM_I2S_MUTE(ConfigStruct->mute));
00154
00155         /* Setup clock */
00156         bps = (ConfigStruct->wordwidth +1)*8;
00157
00158         /* Calculate audio config */
00159         config = (bps - 1)<<6 | (ConfigStruct->ws_sel)<<5 | (ConfigStruct->reset)<<4 |
00160                 (ConfigStruct->stop)<<3 | (ConfigStruct->mono)<<2 | (ConfigStruct->wordwidth);
00161
00162         if(TRMode == I2S_RX_MODE){
00163                 LPC_I2S->I2SDAI = config;
00164         }else{
00165                 LPC_I2S->I2SDAO = config;
00166         }
00167 }
00168
00169 /********************************************************************/
00174 void I2S_DeInit(LPC_I2S_TypeDef *I2Sx) {
00175         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00176
00177         // Turn off power and clock
00178         CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCI2S, DISABLE);
00179 }
00180
00181 /********************************************************************/
00189 uint8_t I2S_GetLevel(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode)
00190 {
00191         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00192         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00193
00194         if(TRMode == I2S_TX_MODE)
00195         {
00196                 return ((I2Sx->I2SSTATE >> 16) & 0xFF);
00197         }
00198         else
00199         {
00200                 return ((I2Sx->I2SSTATE >> 8) & 0xFF);
00201         }
00202 }
00203
00204 /********************************************************************/
00209 void I2S_Start(LPC_I2S_TypeDef *I2Sx)
00210 {
00211         //Clear STOP,RESET and MUTE bit
00212         I2Sx->I2SDAO &= ~I2S_DAI_RESET;
00213         I2Sx->I2SDAI &= ~I2S_DAI_RESET;
00214         I2Sx->I2SDAO &= ~I2S_DAI_STOP;
00215         I2Sx->I2SDAI &= ~I2S_DAI_STOP;
00216         I2Sx->I2SDAO &= ~I2S_DAI_MUTE;
00217 }
00218
00219 /********************************************************************/
00225 void I2S_Send(LPC_I2S_TypeDef *I2Sx, uint32_t BufferData) {
00226         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00227
00228         I2Sx->I2STXFIFO = BufferData;
00229 }
00230
00231 /********************************************************************/
00236 uint32_t I2S_Receive(LPC_I2S_TypeDef* I2Sx) {
00237         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00238
00239         return (I2Sx->I2SRXFIFO);
00240
00241 }
00242
00243 /********************************************************************/
00251 void I2S_Pause(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) {
00252         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00253         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00254
00255         if (TRMode == I2S_TX_MODE) //Transmit mode
00256         {
00257                 I2Sx->I2SDAO |= I2S_DAO_STOP;
00258         } else //Receive mode
00259         {
00260                 I2Sx->I2SDAI |= I2S_DAI_STOP;
00261         }
00262 }
00263
00264 /********************************************************************/
00272 void I2S_Mute(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) {
00273         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00274         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00275
00276         if (TRMode == I2S_TX_MODE) //Transmit mode
00277         {
00278                 I2Sx->I2SDAO |= I2S_DAO_MUTE;
00279         } else //Receive mode
00280         {
00281                 I2Sx->I2SDAI |= I2S_DAI_MUTE;
00282         }
00283 }
00284
00285 /********************************************************************/
00293 void I2S_Stop(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode) {
00294         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00295         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00296
00297         if (TRMode == I2S_TX_MODE) //Transmit mode
00298         {
00299                 I2Sx->I2SDAO &= ~I2S_DAO_MUTE;
00300                 I2Sx->I2SDAO |= I2S_DAO_STOP;
00301                 I2Sx->I2SDAO |= I2S_DAO_RESET;
00302         } else //Receive mode
00303         {
00304                 I2Sx->I2SDAI |= I2S_DAI_STOP;
00305                 I2Sx->I2SDAI |= I2S_DAI_RESET;
00306         }
00307 }
00308
00309 /********************************************************************/
00319 Status I2S_FreqConfig(LPC_I2S_TypeDef *I2Sx, uint32_t Freq, uint8_t TRMode) {
00320
00321         uint32_t i2sMclk;
00322         uint8_t bitrate, channel, wordwidth;
00323
00324         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00325         CHECK_PARAM(PRAM_I2S_FREQ(Freq));
00326         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00327
00328         //set i2s reference is i2s_pclk/2 as default
00329         i2sMclk = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_I2S)/2;
00330         I2Sx->I2STXRATE = 1  | (1<<8);
00331         I2Sx->I2SRXRATE = 1  | (1<<8);
00332         if(TRMode == I2S_TX_MODE)
00333         {
00334                 channel = i2s_GetChannel(I2Sx,I2S_TX_MODE);
00335                 wordwidth = i2s_GetWordWidth(I2Sx,I2S_TX_MODE);
00336         }
00337         else
00338         {
00339                 channel = i2s_GetChannel(I2Sx,I2S_RX_MODE);
00340                 wordwidth = i2s_GetWordWidth(I2Sx,I2S_RX_MODE);
00341         }
00342         bitrate = i2sMclk/(Freq * channel * wordwidth) - 1;
00343         if (TRMode == I2S_TX_MODE)// Transmitter
00344         {
00345                 I2Sx->I2STXBITRATE = bitrate;
00346         } else //Receiver
00347         {
00348                 I2Sx->I2SRXBITRATE = bitrate;
00349         }
00350         return SUCCESS;
00351 }
00352
00353 /********************************************************************/
00363 void I2S_SetBitRate(LPC_I2S_TypeDef *I2Sx, uint8_t bitrate, uint8_t TRMode)
00364 {
00365         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00366         CHECK_PARAM(PARAM_I2S_BITRATE(bitrate));
00367         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00368
00369         if(TRMode == I2S_TX_MODE)
00370         {
00371                 I2Sx->I2STXBITRATE = bitrate;
00372         }
00373         else
00374         {
00375                 I2Sx->I2SRXBITRATE = bitrate;
00376         }
00377 }
00378
00379 /********************************************************************/
00389 void I2S_ModeConfig(LPC_I2S_TypeDef *I2Sx, I2S_MODEConf_Type* ModeConfig,
00390                 uint8_t TRMode)
00391 {
00392         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00393         CHECK_PARAM(PARAM_I2S_CLKSEL(ModeConfig->clksel));
00394         CHECK_PARAM(PARAM_I2S_4PIN(ModeConfig->fpin));
00395         CHECK_PARAM(PARAM_I2S_MCLK(ModeConfig->mcena));
00396         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00397
00398         if (TRMode == I2S_TX_MODE) {
00399                 I2Sx->I2STXMODE &= ~0x0F; //clear bit 3:0 in I2STXMODE register
00400                 if (ModeConfig->clksel == I2S_CLKSEL_MCLK) {
00401                         I2Sx->I2STXMODE |= 0x02;
00402                 }
00403                 if (ModeConfig->fpin == I2S_4PIN_ENABLE) {
00404                         I2Sx->I2STXMODE |= (1 << 2);
00405                 }
00406                 if (ModeConfig->mcena == I2S_MCLK_ENABLE) {
00407                         I2Sx->I2STXMODE |= (1 << 3);
00408                 }
00409         } else {
00410                 I2Sx->I2SRXMODE &= ~0x0F; //clear bit 3:0 in I2STXMODE register
00411                 if (ModeConfig->clksel == I2S_CLKSEL_MCLK) {
00412                         I2Sx->I2SRXMODE |= 0x02;
00413                 }
00414                 if (ModeConfig->fpin == I2S_4PIN_ENABLE) {
00415                         I2Sx->I2SRXMODE |= (1 << 2);
00416                 }
00417                 if (ModeConfig->mcena == I2S_MCLK_ENABLE) {
00418                         I2Sx->I2SRXMODE |= (1 << 3);
00419                 }
00420         }
00421 }
00422
00423 /********************************************************************/
00432 void I2S_DMAConfig(LPC_I2S_TypeDef *I2Sx, I2S_DMAConf_Type* DMAConfig,
00433                 uint8_t TRMode)
00434 {
00435         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00436         CHECK_PARAM(PARAM_I2S_DMA(DMAConfig->DMAIndex));
00437         CHECK_PARAM(PARAM_I2S_DMA_DEPTH(DMAConfig->depth));
00438         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00439
00440         if (TRMode == I2S_RX_MODE) {
00441                 if (DMAConfig->DMAIndex == I2S_DMA_1) {
00442                         LPC_I2S->I2SDMA1 = (DMAConfig->depth) << 8;
00443                 } else {
00444                         LPC_I2S->I2SDMA2 = (DMAConfig->depth) << 8;
00445                 }
00446         } else {
00447                 if (DMAConfig->DMAIndex == I2S_DMA_1) {
00448                         LPC_I2S->I2SDMA1 = (DMAConfig->depth) << 16;
00449                 } else {
00450                         LPC_I2S->I2SDMA2 = (DMAConfig->depth) << 16;
00451                 }
00452         }
00453 }
00454
00455 /********************************************************************/
00469 void I2S_DMACmd(LPC_I2S_TypeDef *I2Sx, uint8_t DMAIndex, uint8_t TRMode,
00470                 FunctionalState NewState)
00471 {
00472         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00473         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00474         CHECK_PARAM(PARAM_I2S_DMA(DMAIndex));
00475         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00476
00477         if (TRMode == I2S_RX_MODE) {
00478                 if (DMAIndex == I2S_DMA_1) {
00479                         if (NewState == ENABLE)
00480                                 I2Sx->I2SDMA1 |= 0x01;
00481                         else
00482                                 I2Sx->I2SDMA1 &= ~0x01;
00483                 } else {
00484                         if (NewState == ENABLE)
00485                                 I2Sx->I2SDMA2 |= 0x01;
00486                         else
00487                                 I2Sx->I2SDMA2 &= ~0x01;
00488                 }
00489         } else {
00490                 if (DMAIndex == I2S_DMA_1) {
00491                         if (NewState == ENABLE)
00492                                 I2Sx->I2SDMA1 |= 0x02;
00493                         else
00494                                 I2Sx->I2SDMA1 &= ~0x02;
00495                 } else {
00496                         if (NewState == ENABLE)
00497                                 I2Sx->I2SDMA2 |= 0x02;
00498                         else
00499                                 I2Sx->I2SDMA2 &= ~0x02;
00500                 }
00501         }
00502 }
00503
00504 /********************************************************************/
00513 void I2S_IRQConfig(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, uint8_t level) {
00514         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00515         CHECK_PARAM(PARAM_I2S_TRX(TRMode));
00516         CHECK_PARAM(PARAM_I2S_IRQ_LEVEL(level));
00517
00518         if (TRMode == I2S_RX_MODE) {
00519                 I2Sx->I2SIRQ |= (level << 8);
00520         } else {
00521                 I2Sx->I2SIRQ |= (level << 16);
00522         }
00523 }
00524
00525 /********************************************************************/
00536 void I2S_IRQCmd(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, FunctionalState NewState) {
00537         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00538         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00539
00540         if (TRMode == I2S_RX_MODE) {
00541                 if (NewState == ENABLE)
00542                         I2Sx->I2SIRQ |= 0x01;
00543                 else
00544                         I2Sx->I2SIRQ &= ~0x01;
00545                 //Enable DMA
00546
00547         } else {
00548                 if (NewState == ENABLE)
00549                         I2Sx->I2SIRQ |= 0x02;
00550                 else
00551                         I2Sx->I2SIRQ &= ~0x02;
00552         }
00553 }
00554
00555 /********************************************************************/
00565 FunctionalState I2S_GetIRQStatus(LPC_I2S_TypeDef *I2Sx,uint8_t TRMode)
00566 {
00567         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00568         if(TRMode == I2S_TX_MODE)
00569                 return ((FunctionalState)((I2Sx->I2SIRQ >> 1)&0x01));
00570         else
00571                 return ((FunctionalState)((I2Sx->I2SIRQ)&0x01));
00572 }
00573
00574 /********************************************************************/
00582 uint8_t I2S_GetIRQDepth(LPC_I2S_TypeDef *I2Sx,uint8_t TRMode)
00583 {
00584         CHECK_PARAM(PARAM_I2Sx(I2Sx));
00585         if(TRMode == I2S_TX_MODE)
00586                 return (((I2Sx->I2SIRQ)>>16)&0xFF);
00587         else
00588                 return (((I2Sx->I2SIRQ)>>8)&0xFF);
00589 }
00594 #endif /* _I2S */
00595
00600 /* --------------------------------- End Of File ------------------------------ */
00601
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2s.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_i2s.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_i2s.h                           2011-06-06
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_I2S_H_
00034 #define LPC17XX_I2S_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046 /* Public Macros -------------------------------------------------------------- */
00051 /*********************************************************************/
00055 #define I2S_WORDWIDTH_8         ((uint32_t)(0))
00056 #define I2S_WORDWIDTH_16        ((uint32_t)(1))
00057 #define I2S_WORDWIDTH_32        ((uint32_t)(3))
00058
00059 #define I2S_STEREO                      ((uint32_t)(0))
00060 #define I2S_MONO                        ((uint32_t)(1))
00061
00062 #define I2S_MASTER_MODE         ((uint8_t)(0))
00063 #define I2S_SLAVE_MODE          ((uint8_t)(1))
00064
00065 #define I2S_STOP_ENABLE         ((uint8_t)(1))
00066 #define I2S_STOP_DISABLE        ((uint8_t)(0))
00067
00068 #define I2S_RESET_ENABLE        ((uint8_t)(1))
00069 #define I2S_RESET_DISABLE       ((uint8_t)(0))
00070
00071 #define I2S_MUTE_ENABLE         ((uint8_t)(1))
00072 #define I2S_MUTE_DISABLE        ((uint8_t)(0))
00073
00074 #define I2S_TX_MODE                     ((uint8_t)(0))
00075 #define I2S_RX_MODE                     ((uint8_t)(1))
00076
00077 #define I2S_CLKSEL_FRDCLK       ((uint8_t)(0))
00078 #define I2S_CLKSEL_MCLK         ((uint8_t)(2))
00079
00080 #define I2S_4PIN_ENABLE         ((uint8_t)(1))
00081 #define I2S_4PIN_DISABLE        ((uint8_t)(0))
00082
00083 #define I2S_MCLK_ENABLE         ((uint8_t)(1))
00084 #define I2S_MCLK_DISABLE        ((uint8_t)(0))
00085
00086 #define I2S_DMA_1                       ((uint8_t)(0))
00087 #define I2S_DMA_2                       ((uint8_t)(1))
00088
00093 /* Private Macros ------------------------------------------------------------- */
00098 /*********************************************************************/
00102 #define I2S_DAO_WORDWIDTH_8             ((uint32_t)(0))
00103 #define I2S_DAO_WORDWIDTH_16    ((uint32_t)(1))
00104 #define I2S_DAO_WORDWIDTH_32    ((uint32_t)(3))
00106 #define I2S_DAO_MONO                    ((uint32_t)(1<<2))
00107
00108 #define I2S_DAO_STOP                    ((uint32_t)(1<<3))
00109
00110 #define I2S_DAO_RESET                   ((uint32_t)(1<<4))
00111
00112 #define I2S_DAO_SLAVE                   ((uint32_t)(1<<5))
00113
00114 #define I2S_DAO_WS_HALFPERIOD(n)        ((uint32_t)(n<<6))
00115
00116 #define I2S_DAO_MUTE                    ((uint32_t)(1<<15))
00117
00118 /*********************************************************************/
00122 #define I2S_DAI_WORDWIDTH_8             ((uint32_t)(0))
00123 #define I2S_DAI_WORDWIDTH_16    ((uint32_t)(1))
00124 #define I2S_DAI_WORDWIDTH_32    ((uint32_t)(3))
00126 #define I2S_DAI_MONO                    ((uint32_t)(1<<2))
00127
00128 #define I2S_DAI_STOP                    ((uint32_t)(1<<3))
00129
00130 #define I2S_DAI_RESET                   ((uint32_t)(1<<4))
00131
00132 #define I2S_DAI_SLAVE                   ((uint32_t)(1<<5))
00133
00134 #define I2S_DAI_WS_HALFPERIOD(n)        ((uint32_t)((n&0x1FF)<<6))
00135
00136 #define I2S_DAI_MUTE                    ((uint32_t)(1<<15))
00137
00138 /*********************************************************************/
00142 #define I2S_STATE_IRQ           ((uint32_t)(1))
00143
00144 #define I2S_STATE_DMA1          ((uint32_t)(1<<1))
00145
00146 #define I2S_STATE_DMA2          ((uint32_t)(1<<2))
00147
00148 #define I2S_STATE_RX_LEVEL(n)   ((uint32_t)((n&1F)<<8))
00149
00150 #define I2S_STATE_TX_LEVEL(n)   ((uint32_t)((n&1F)<<16))
00151
00152 /*********************************************************************/
00156 #define I2S_DMA1_RX_ENABLE              ((uint32_t)(1))
00157
00158 #define I2S_DMA1_TX_ENABLE              ((uint32_t)(1<<1))
00159
00160 #define I2S_DMA1_RX_DEPTH(n)    ((uint32_t)((n&0x1F)<<8))
00161
00162 #define I2S_DMA1_TX_DEPTH(n)    ((uint32_t)((n&0x1F)<<16))
00163
00164 /*********************************************************************/
00168 #define I2S_DMA2_RX_ENABLE              ((uint32_t)(1))
00169
00170 #define I2S_DMA2_TX_ENABLE              ((uint32_t)(1<<1))
00171
00172 #define I2S_DMA2_RX_DEPTH(n)    ((uint32_t)((n&0x1F)<<8))
00173
00174 #define I2S_DMA2_TX_DEPTH(n)    ((uint32_t)((n&0x1F)<<16))
00175
00176 /*********************************************************************/
00180 #define I2S_IRQ_RX_ENABLE               ((uint32_t)(1))
00181
00182 #define I2S_IRQ_TX_ENABLE               ((uint32_t)(1<<1))
00183
00184 #define I2S_IRQ_RX_DEPTH(n)             ((uint32_t)((n&0x1F)<<8))
00185
00186 #define I2S_IRQ_TX_DEPTH(n)             ((uint32_t)((n&0x1F)<<16))
00187
00188 /********************************************************************************/
00192 #define I2S_TXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF))
00193
00194 #define I2S_TXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8))
00195
00196 #define I2S_RXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF))
00197
00198 #define I2S_RXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8))
00199
00200 /*************************************************************************************/
00203 #define I2S_TXBITRATE(n)        ((uint32_t)(n&0x3F))
00204 #define I2S_RXBITRATE(n)        ((uint32_t)(n&0x3F))
00205
00206 /**********************************************************************************/
00210 #define I2S_TXMODE_CLKSEL(n)    ((uint32_t)(n&0x03))
00211
00212 #define I2S_TXMODE_4PIN_ENABLE  ((uint32_t)(1<<2))
00213
00214 #define I2S_TXMODE_MCENA                ((uint32_t)(1<<3))
00215
00216 #define I2S_RXMODE_CLKSEL(n)    ((uint32_t)(n&0x03))
00217
00218 #define I2S_RXMODE_4PIN_ENABLE  ((uint32_t)(1<<2))
00219
00220 #define I2S_RXMODE_MCENA                ((uint32_t)(1<<3))
00221
00222
00223 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00225 #define PARAM_I2Sx(n)   (((uint32_t *)n)==((uint32_t *)LPC_I2S))
00226
00227 #define PRAM_I2S_FREQ(freq)             ((freq>=16000)&&(freq <= 96000))
00228 /* Macro check I2S word width type */
00229 #define PARAM_I2S_WORDWIDTH(n)  ((n==I2S_WORDWIDTH_8)||(n==I2S_WORDWIDTH_16)\
00230 ||(n==I2S_WORDWIDTH_32))
00231 /* Macro check I2S channel type */
00232 #define PARAM_I2S_CHANNEL(n)    ((n==I2S_STEREO)||(n==I2S_MONO))
00233 /* Macro check I2S master/slave mode */
00234 #define PARAM_I2S_WS_SEL(n)             ((n==I2S_MASTER_MODE)||(n==I2S_SLAVE_MODE))
00235 /* Macro check I2S stop mode */
00236 #define PARAM_I2S_STOP(n)       ((n==I2S_STOP_ENABLE)||(n==I2S_STOP_DISABLE))
00237 /* Macro check I2S reset mode */
00238 #define PARAM_I2S_RESET(n)      ((n==I2S_RESET_ENABLE)||(n==I2S_RESET_DISABLE))
00239 /* Macro check I2S reset mode */
00240 #define PARAM_I2S_MUTE(n)       ((n==I2S_MUTE_ENABLE)||(n==I2S_MUTE_DISABLE))
00241 /* Macro check I2S transmit/receive mode */
00242 #define PARAM_I2S_TRX(n)                ((n==I2S_TX_MODE)||(n==I2S_RX_MODE))
00243 /* Macro check I2S clock select mode */
00244 #define PARAM_I2S_CLKSEL(n)             ((n==I2S_CLKSEL_FRDCLK)||(n==I2S_CLKSEL_MCLK))
00245 /* Macro check I2S 4-pin mode */
00246 #define PARAM_I2S_4PIN(n)       ((n==I2S_4PIN_ENABLE)||(n==I2S_4PIN_DISABLE))
00247 /* Macro check I2S MCLK mode */
00248 #define PARAM_I2S_MCLK(n)       ((n==I2S_MCLK_ENABLE)||(n==I2S_MCLK_DISABLE))
00249 /* Macro check I2S DMA mode */
00250 #define PARAM_I2S_DMA(n)                ((n==I2S_DMA_1)||(n==I2S_DMA_2))
00251 /* Macro check I2S DMA depth value */
00252 #define PARAM_I2S_DMA_DEPTH(n)  (n<=31)
00253 /* Macro check I2S irq level value */
00254 #define PARAM_I2S_IRQ_LEVEL(n)  (n<=31)
00255 /* Macro check I2S half-period value */
00256 #define PARAM_I2S_HALFPERIOD(n) (n<512)
00257 /* Macro check I2S bit-rate value */
00258 #define PARAM_I2S_BITRATE(n)    (n<=63)
00259
00265 /* Public Types --------------------------------------------------------------- */
00273 typedef struct {
00274         uint8_t wordwidth;
00278         uint8_t mono;
00281         uint8_t stop;
00284         uint8_t reset;
00287         uint8_t ws_sel;
00290         uint8_t mute;
00293         uint8_t Reserved0[2];
00294 } I2S_CFG_Type;
00295
00299 typedef struct {
00300         uint8_t DMAIndex;
00303         uint8_t depth;
00304         uint8_t Reserved0[2];
00305 }I2S_DMAConf_Type;
00306
00310 typedef struct{
00311         uint8_t clksel;
00314         uint8_t fpin;
00317         uint8_t mcena;
00320         uint8_t Reserved;
00321 }I2S_MODEConf_Type;
00322
00323
00329 /* Public Functions ----------------------------------------------------------- */
00333 /* I2S Init/DeInit functions ---------*/
00334 void I2S_Init(LPC_I2S_TypeDef *I2Sx);
00335 void I2S_DeInit(LPC_I2S_TypeDef *I2Sx);
00336
00337 /* I2S configuration functions --------*/
00338 void I2S_Config(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, I2S_CFG_Type* ConfigStruct);
00339 Status I2S_FreqConfig(LPC_I2S_TypeDef *I2Sx, uint32_t Freq, uint8_t TRMode);
00340 void I2S_SetBitRate(LPC_I2S_TypeDef *I2Sx, uint8_t bitrate, uint8_t TRMode);
00341 void I2S_ModeConfig(LPC_I2S_TypeDef *I2Sx, I2S_MODEConf_Type* ModeConfig, uint8_t TRMode);
00342 uint8_t I2S_GetLevel(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode);
00343
00344 /* I2S operate functions -------------*/
00345 void I2S_Send(LPC_I2S_TypeDef *I2Sx, uint32_t BufferData);
00346 uint32_t I2S_Receive(LPC_I2S_TypeDef* I2Sx);
00347 void I2S_Start(LPC_I2S_TypeDef *I2Sx);
00348 void I2S_Pause(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode);
00349 void I2S_Mute(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode);
00350 void I2S_Stop(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode);
00351
00352 /* I2S DMA functions ----------------*/
00353 void I2S_DMAConfig(LPC_I2S_TypeDef *I2Sx, I2S_DMAConf_Type* DMAConfig, uint8_t TRMode);
00354 void I2S_DMACmd(LPC_I2S_TypeDef *I2Sx, uint8_t DMAIndex,uint8_t TRMode, FunctionalState NewState);
00355
00356 /* I2S IRQ functions ----------------*/
00357 void I2S_IRQCmd(LPC_I2S_TypeDef *I2Sx,uint8_t TRMode, FunctionalState NewState);
00358 void I2S_IRQConfig(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, uint8_t level);
00359 FunctionalState I2S_GetIRQStatus(LPC_I2S_TypeDef *I2Sx,uint8_t TRMode);
00360 uint8_t I2S_GetIRQDepth(LPC_I2S_TypeDef *I2Sx,uint8_t TRMode);
00361
00367 #ifdef __cplusplus
00368 }
00369 #endif
00370
00371
00372 #endif /* LPC17XX_SSP_H_ */
00373
00378 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:41 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_libcfg_default.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_libcfg_default.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg_default.c                                2010-05-21
00003 */
00027 /* Library group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_libcfg_default.h"
00034
00035 /* Public Functions ----------------------------------------------------------- */
00040 #ifndef __BUILD_WITH_EXAMPLE__
00041
00042 #ifdef  DEBUG
00043 /*******************************************************************************
00044 * @brief                Reports the name of the source file and the source line number
00045 *                               where the CHECK_PARAM error has occurred.
00046 * @param[in]    file Pointer to the source file name
00047 * @param[in]    line assert_param error line source number
00048 * @return               None
00049 *******************************************************************************/
00050 void check_failed(uint8_t *file, uint32_t line)
00051 {
00052         /* User can add his own implementation to report the file name and line number,
00053          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00054
00055         /* Infinite loop */
00056         while(1);
00057 }
00058 #endif /* DEBUG */
00059
00060 #endif /* __BUILD_WITH_EXAMPLE__ */
00061
00070 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_libcfg_default.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_libcfg_default.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_libcfg_default.h                                2010-05-21
00003 */
00026 /* Library Configuration group ----------------------------------------------------------- */
00032 #ifndef LPC17XX_LIBCFG_DEFAULT_H_
00033 #define LPC17XX_LIBCFG_DEFAULT_H_
00034
00035 /* Includes ------------------------------------------------------------------- */
00036 #include "lpc_types.h"
00037
00038
00039 /* Public Macros -------------------------------------------------------------- */
00044 /************************** DEBUG MODE DEFINITIONS *********************************/
00045 /* Un-comment the line below to compile the library in DEBUG mode, this will expanse
00046    the "CHECK_PARAM" macro in the FW library code */
00047
00048 #define DEBUG
00049
00050
00051 /******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
00052 /* Comment the line below to disable the specific peripheral inclusion */
00053
00054 /* DEBUG_FRAMWORK ------------------------------ */
00055 #define _DBGFWK
00056
00057 /* GPIO ------------------------------- */
00058 #define _GPIO
00059
00060 /* EXTI ------------------------------- */
00061 #define _EXTI
00062
00063 /* UART ------------------------------- */
00064 #define _UART
00065 #define _UART0
00066 #define _UART1
00067 #define _UART2
00068 #define _UART3
00069
00070 /* SPI ------------------------------- */
00071 #define _SPI
00072
00073 /* SYSTICK --------------------------- */
00074 #define _SYSTICK
00075
00076 /* SSP ------------------------------- */
00077 #define _SSP
00078 #define _SSP0
00079 #define _SSP1
00080
00081
00082 /* I2C ------------------------------- */
00083 #define _I2C
00084 #define _I2C0
00085 #define _I2C1
00086 #define _I2C2
00087
00088 /* TIMER ------------------------------- */
00089 #define _TIM
00090
00091 /* WDT ------------------------------- */
00092 #define _WDT
00093
00094
00095 /* GPDMA ------------------------------- */
00096 #define _GPDMA
00097
00098
00099 /* DAC ------------------------------- */
00100 #define _DAC
00101
00102 /* DAC ------------------------------- */
00103 #define _ADC
00104
00105
00106 /* PWM ------------------------------- */
00107 #define _PWM
00108 #define _PWM1
00109
00110 /* RTC ------------------------------- */
00111 #define _RTC
00112
00113 /* I2S ------------------------------- */
00114 #define _I2S
00115
00116 /* USB device ------------------------------- */
00117 #define _USBDEV
00118 #define _USB_DMA
00119
00120 /* QEI ------------------------------- */
00121 #define _QEI
00122
00123 /* MCPWM ------------------------------- */
00124 #define _MCPWM
00125
00126 /* CAN--------------------------------*/
00127 #define _CAN
00128
00129 /* RIT ------------------------------- */
00130 #define _RIT
00131
00132 /* EMAC ------------------------------ */
00133 #define _EMAC
00134
00135 /************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
00136
00137 #ifdef  DEBUG
00138 /*******************************************************************************
00139 * @brief                The CHECK_PARAM macro is used for function's parameters check.
00140 *                               It is used only if the library is compiled in DEBUG mode.
00141 * @param[in]    expr - If expr is false, it calls check_failed() function
00142 *                       which reports the name of the source file and the source
00143 *                       line number of the call that failed.
00144 *                    - If expr is true, it returns no value.
00145 * @return               None
00146 *******************************************************************************/
00147 #define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
00148 #else
00149 #define CHECK_PARAM(expr)
00150 #endif /* DEBUG */
00151
00157 /* Public Functions ----------------------------------------------------------- */
00162 #ifdef  DEBUG
00163 void check_failed(uint8_t *file, uint32_t line);
00164 #endif
00165
00170 #endif /* LPC17XX_LIBCFG_DEFAULT_H_ */
00171
00176 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:41 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_mcpwm.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_mcpwm.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_mcpwm.c                         2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_mcpwm.h"
00034 #include "lpc17xx_clkpwr.h"
00035
00036 /* If this source file built with example, the LPC17xx FW library configuration
00037  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00038  * otherwise the default FW library configuration file must be included instead
00039  */
00040 #ifdef __BUILD_WITH_EXAMPLE__
00041 #include "lpc17xx_libcfg.h"
00042 #else
00043 #include "lpc17xx_libcfg_default.h"
00044 #endif /* __BUILD_WITH_EXAMPLE__ */
00045
00046
00047 #ifdef _MCPWM
00048
00049 /* Public Functions ----------------------------------------------------------- */
00054 /*********************************************************************/
00060 void MCPWM_Init(LPC_MCPWM_TypeDef *MCPWMx)
00061 {
00062
00063         /* Turn On MCPWM PCLK */
00064         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCMC, ENABLE);
00065         /* As default, peripheral clock for MCPWM module
00066          * is set to FCCLK / 2 */
00067         // CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_MC, CLKPWR_PCLKSEL_CCLK_DIV_2);
00068
00069         MCPWMx->MCCAP_CLR = MCPWM_CAPCLR_CAP(0) | MCPWM_CAPCLR_CAP(1) | MCPWM_CAPCLR_CAP(2);
00070         MCPWMx->MCINTFLAG_CLR = MCPWM_INT_ILIM(0) | MCPWM_INT_ILIM(1) | MCPWM_INT_ILIM(2) \
00071                                                         | MCPWM_INT_IMAT(0) | MCPWM_INT_IMAT(1) | MCPWM_INT_IMAT(2) \
00072                                                         | MCPWM_INT_ICAP(0) | MCPWM_INT_ICAP(1) | MCPWM_INT_ICAP(2);
00073         MCPWMx->MCINTEN_CLR = MCPWM_INT_ILIM(0) | MCPWM_INT_ILIM(1) | MCPWM_INT_ILIM(2) \
00074                                                         | MCPWM_INT_IMAT(0) | MCPWM_INT_IMAT(1) | MCPWM_INT_IMAT(2) \
00075                                                         | MCPWM_INT_ICAP(0) | MCPWM_INT_ICAP(1) | MCPWM_INT_ICAP(2);
00076 }
00077
00078
00079 /*********************************************************************/
00090 void MCPWM_ConfigChannel(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
00091                                                 MCPWM_CHANNEL_CFG_Type * channelSetup)
00092 {
00093         if (channelNum <= 2) {
00094                 if (channelNum == 0) {
00095                         MCPWMx->MCTIM0 = channelSetup->channelTimercounterValue;
00096                         MCPWMx->MCPER0 = channelSetup->channelPeriodValue;
00097                         MCPWMx->MCPW0 = channelSetup->channelPulsewidthValue;
00098                 } else if (channelNum == 1) {
00099                         MCPWMx->MCTIM1 = channelSetup->channelTimercounterValue;
00100                         MCPWMx->MCPER1 = channelSetup->channelPeriodValue;
00101                         MCPWMx->MCPW1 = channelSetup->channelPulsewidthValue;
00102                 } else if (channelNum == 2) {
00103                         MCPWMx->MCTIM2 = channelSetup->channelTimercounterValue;
00104                         MCPWMx->MCPER2 = channelSetup->channelPeriodValue;
00105                         MCPWMx->MCPW2 = channelSetup->channelPulsewidthValue;
00106                 } else {
00107                         return;
00108                 }
00109
00110                 if (channelSetup->channelType /* == MCPWM_CHANNEL_CENTER_MODE */){
00111                         MCPWMx->MCCON_SET = MCPWM_CON_CENTER(channelNum);
00112                 } else {
00113                         MCPWMx->MCCON_CLR = MCPWM_CON_CENTER(channelNum);
00114                 }
00115
00116                 if (channelSetup->channelPolarity /* == MCPWM_CHANNEL_PASSIVE_HI */){
00117                         MCPWMx->MCCON_SET = MCPWM_CON_POLAR(channelNum);
00118                 } else {
00119                         MCPWMx->MCCON_CLR = MCPWM_CON_POLAR(channelNum);
00120                 }
00121
00122                 if (channelSetup->channelDeadtimeEnable /* == ENABLE */){
00123                         MCPWMx->MCCON_SET = MCPWM_CON_DTE(channelNum);
00124                         MCPWMx->MCDEADTIME &= ~(MCPWM_DT(channelNum, 0x3FF));
00125                         MCPWMx->MCDEADTIME |= MCPWM_DT(channelNum, channelSetup->channelDeadtimeValue);
00126                 } else {
00127                         MCPWMx->MCCON_CLR = MCPWM_CON_DTE(channelNum);
00128                 }
00129
00130                 if (channelSetup->channelUpdateEnable /* == ENABLE */){
00131                         MCPWMx->MCCON_CLR = MCPWM_CON_DISUP(channelNum);
00132                 } else {
00133                         MCPWMx->MCCON_SET = MCPWM_CON_DISUP(channelNum);
00134                 }
00135         }
00136 }
00137
00138
00139 /*********************************************************************/
00150 void MCPWM_WriteToShadow(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
00151                                                                 MCPWM_CHANNEL_CFG_Type *channelSetup)
00152 {
00153         if (channelNum == 0){
00154                 MCPWMx->MCPER0 = channelSetup->channelPeriodValue;
00155                 MCPWMx->MCPW0 = channelSetup->channelPulsewidthValue;
00156         } else if (channelNum == 1) {
00157                 MCPWMx->MCPER1 = channelSetup->channelPeriodValue;
00158                 MCPWMx->MCPW1 = channelSetup->channelPulsewidthValue;
00159         } else if (channelNum == 2) {
00160                 MCPWMx->MCPER2 = channelSetup->channelPeriodValue;
00161                 MCPWMx->MCPW2 = channelSetup->channelPulsewidthValue;
00162         }
00163 }
00164
00165
00166
00167 /*********************************************************************/
00178 void MCPWM_ConfigCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
00179                                                 MCPWM_CAPTURE_CFG_Type *captureConfig)
00180 {
00181         if (channelNum <= 2) {
00182
00183                 if (captureConfig->captureFalling /* == ENABLE */) {
00184                         MCPWMx->MCCAPCON_SET = MCPWM_CAPCON_CAPMCI_FE(captureConfig->captureChannel, channelNum);
00185                 } else {
00186                         MCPWMx->MCCAPCON_CLR = MCPWM_CAPCON_CAPMCI_FE(captureConfig->captureChannel, channelNum);
00187                 }
00188
00189                 if (captureConfig->captureRising /* == ENABLE */) {
00190                         MCPWMx->MCCAPCON_SET = MCPWM_CAPCON_CAPMCI_RE(captureConfig->captureChannel, channelNum);
00191                 } else {
00192                         MCPWMx->MCCAPCON_CLR = MCPWM_CAPCON_CAPMCI_RE(captureConfig->captureChannel, channelNum);
00193                 }
00194
00195                 if (captureConfig->timerReset /* == ENABLE */){
00196                         MCPWMx->MCCAPCON_SET = MCPWM_CAPCON_RT(captureConfig->captureChannel);
00197                 } else {
00198                         MCPWMx->MCCAPCON_CLR = MCPWM_CAPCON_RT(captureConfig->captureChannel);
00199                 }
00200
00201                 if (captureConfig->hnfEnable /* == ENABLE */){
00202                         MCPWMx->MCCAPCON_SET = MCPWM_CAPCON_HNFCAP(channelNum);
00203                 } else {
00204                         MCPWMx->MCCAPCON_CLR = MCPWM_CAPCON_HNFCAP(channelNum);
00205                 }
00206         }
00207 }
00208
00209
00210 /*********************************************************************/
00217 void MCPWM_ClearCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel)
00218 {
00219         MCPWMx->MCCAP_CLR = MCPWM_CAPCLR_CAP(captureChannel);
00220 }
00221
00222 /*********************************************************************/
00229 uint32_t MCPWM_GetCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel)
00230 {
00231         if (captureChannel == 0){
00232                 return (MCPWMx->MCCR0);
00233         } else if (captureChannel == 1) {
00234                 return (MCPWMx->MCCR1);
00235         } else if (captureChannel == 2) {
00236                 return (MCPWMx->MCCR2);
00237         }
00238         return (0);
00239 }
00240
00241
00242 /*********************************************************************/
00255 void MCPWM_CountConfig(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
00256                                         uint32_t countMode, MCPWM_COUNT_CFG_Type *countConfig)
00257 {
00258         if (channelNum <= 2) {
00259                 if (countMode /* == ENABLE */){
00260                         MCPWMx->MCCNTCON_SET = MCPWM_CNTCON_CNTR(channelNum);
00261                         if (countConfig->countFalling /* == ENABLE */) {
00262                                 MCPWMx->MCCNTCON_SET = MCPWM_CNTCON_TCMCI_FE(countConfig->counterChannel,channelNum);
00263                         } else {
00264                                 MCPWMx->MCCNTCON_CLR = MCPWM_CNTCON_TCMCI_FE(countConfig->counterChannel,channelNum);
00265                         }
00266                         if (countConfig->countRising /* == ENABLE */) {
00267                                 MCPWMx->MCCNTCON_SET = MCPWM_CNTCON_TCMCI_RE(countConfig->counterChannel,channelNum);
00268                         } else {
00269                                 MCPWMx->MCCNTCON_CLR = MCPWM_CNTCON_TCMCI_RE(countConfig->counterChannel,channelNum);
00270                         }
00271                 } else {
00272                         MCPWMx->MCCNTCON_CLR = MCPWM_CNTCON_CNTR(channelNum);
00273                 }
00274         }
00275 }
00276
00277
00278 /*********************************************************************/
00293 void MCPWM_Start(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0,
00294                                         uint32_t channel1, uint32_t channel2)
00295 {
00296         uint32_t regVal = 0;
00297         regVal = (channel0 ? MCPWM_CON_RUN(0) : 0) | (channel1 ? MCPWM_CON_RUN(1) : 0) \
00298                                 | (channel2 ? MCPWM_CON_RUN(2) : 0);
00299         MCPWMx->MCCON_SET = regVal;
00300 }
00301
00302
00303 /*********************************************************************/
00318 void MCPWM_Stop(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0,
00319                 uint32_t channel1, uint32_t channel2)
00320 {
00321         uint32_t regVal = 0;
00322         regVal = (channel0 ? MCPWM_CON_RUN(0) : 0) | (channel1 ? MCPWM_CON_RUN(1) : 0) \
00323                                 | (channel2 ? MCPWM_CON_RUN(2) : 0);
00324         MCPWMx->MCCON_CLR = regVal;
00325 }
00326
00327
00328 /*********************************************************************/
00337 void MCPWM_ACMode(LPC_MCPWM_TypeDef *MCPWMx, uint32_t acMode)
00338 {
00339         if (acMode){
00340                 MCPWMx->MCCON_SET = MCPWM_CON_ACMODE;
00341         } else {
00342                 MCPWMx->MCCON_CLR = MCPWM_CON_ACMODE;
00343         }
00344 }
00345
00346
00347 /*********************************************************************/
00372 void MCPWM_DCMode(LPC_MCPWM_TypeDef *MCPWMx, uint32_t dcMode,
00373                                         uint32_t outputInvered, uint32_t outputPattern)
00374 {
00375         if (dcMode){
00376                 MCPWMx->MCCON_SET = MCPWM_CON_DCMODE;
00377         } else {
00378                 MCPWMx->MCCON_CLR = MCPWM_CON_DCMODE;
00379         }
00380
00381         if (outputInvered) {
00382                 MCPWMx->MCCON_SET = MCPWM_CON_INVBDC;
00383         } else {
00384                 MCPWMx->MCCON_CLR = MCPWM_CON_INVBDC;
00385         }
00386
00387         MCPWMx->MCCCP = outputPattern;
00388 }
00389
00390
00391 /*********************************************************************/
00413 void MCPWM_IntConfig(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType, FunctionalState NewState)
00414 {
00415         if (NewState) {
00416                 MCPWMx->MCINTEN_SET = ulIntType;
00417         } else {
00418                 MCPWMx->MCINTEN_CLR = ulIntType;
00419         }
00420 }
00421
00422
00423 /*********************************************************************/
00441 void MCPWM_IntSet(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
00442 {
00443         MCPWMx->MCINTFLAG_SET = ulIntType;
00444 }
00445
00446
00447 /*********************************************************************/
00465 void MCPWM_IntClear(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
00466 {
00467         MCPWMx->MCINTFLAG_CLR = ulIntType;
00468 }
00469
00470
00471 /*********************************************************************/
00488 FlagStatus MCPWM_GetIntStatus(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
00489 {
00490         return ((MCPWMx->MCINTFLAG & ulIntType) ? SET : RESET);
00491 }
00492
00497 #endif /* _MCPWM */
00498
00503 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_mcpwm.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_mcpwm.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_mcpwm.h                         2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_MCPWM_H_
00034 #define LPC17XX_MCPWM_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046 /* Public Macros -------------------------------------------------------------- */
00053 #define MCPWM_CHANNEL_EDGE_MODE                 ((uint32_t)(0))
00054
00055 #define MCPWM_CHANNEL_CENTER_MODE               ((uint32_t)(1))
00056
00058 #define MCPWM_CHANNEL_PASSIVE_LO                ((uint32_t)(0))
00059
00060 #define MCPWM_CHANNEL_PASSIVE_HI                ((uint32_t)(1))
00061
00062 /* Output Patent in 3-phase DC mode, the internal MCOA0 signal is routed to any or all of
00063  * the six output pins under the control of the bits in this register */
00064 #define MCPWM_PATENT_A0         ((uint32_t)(1<<0))
00065 #define MCPWM_PATENT_B0         ((uint32_t)(1<<1))
00066 #define MCPWM_PATENT_A1         ((uint32_t)(1<<2))
00067 #define MCPWM_PATENT_B1         ((uint32_t)(1<<3))
00068 #define MCPWM_PATENT_A2         ((uint32_t)(1<<4))
00069 #define MCPWM_PATENT_B2         ((uint32_t)(1<<5))
00071 /* Interrupt type in MCPWM */
00072
00073 #define MCPWM_INTFLAG_LIM0      MCPWM_INT_ILIM(0)
00074
00075 #define MCPWM_INTFLAG_MAT0      MCPWM_INT_IMAT(0)
00076
00077 #define MCPWM_INTFLAG_CAP0      MCPWM_INT_ICAP(0)
00078
00080 #define MCPWM_INTFLAG_LIM1      MCPWM_INT_ILIM(1)
00081
00082 #define MCPWM_INTFLAG_MAT1      MCPWM_INT_IMAT(1)
00083
00084 #define MCPWM_INTFLAG_CAP1      MCPWM_INT_ICAP(1)
00085
00087 #define MCPWM_INTFLAG_LIM2      MCPWM_INT_ILIM(2)
00088
00089 #define MCPWM_INTFLAG_MAT2      MCPWM_INT_IMAT(2)
00090
00091 #define MCPWM_INTFLAG_CAP2      MCPWM_INT_ICAP(2)
00092
00094 #define MCPWM_INTFLAG_ABORT     MCPWM_INT_ABORT
00095
00100 /* Private Macros ------------------------------------------------------------- */
00105 /*********************************************************************/
00108 /* MCPWM Control register, these macro definitions below can be applied for these
00109  * register type:
00110  * - MCPWM Control read address
00111  * - MCPWM Control set address
00112  * - MCPWM Control clear address
00113  */
00114 #define MCPWM_CON_RUN(n)                ((n<=2) ? ((uint32_t)(1<<((n*8)+0))) : (0))
00115 #define MCPWM_CON_CENTER(n)             ((n<=2) ? ((uint32_t)(1<<((n*8)+1))) : (0))
00116 #define MCPWM_CON_POLAR(n)              ((n<=2) ? ((uint32_t)(1<<((n*8)+2))) : (0))
00117 #define MCPWM_CON_DTE(n)                ((n<=2) ? ((uint32_t)(1<<((n*8)+3))) : (0))
00118 #define MCPWM_CON_DISUP(n)              ((n<=2) ? ((uint32_t)(1<<((n*8)+4))) : (0))
00119 #define MCPWM_CON_INVBDC                ((uint32_t)(1<<29))
00120 #define MCPWM_CON_ACMODE                ((uint32_t)(1<<30))
00121 #define MCPWM_CON_DCMODE                ((uint32_t)(0x80000000))
00123 /*********************************************************************/
00126 /* Capture Control register, these macro definitions below can be applied for these
00127  * register type:
00128  * - MCPWM Capture Control read address
00129  * - MCPWM Capture Control set address
00130  * - MCPWM Capture control clear address
00131  */
00132
00133 #define MCPWM_CAPCON_CAPMCI_RE(cap,mci) (((cap<=2)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+0))) : (0))
00134
00135 #define MCPWM_CAPCON_CAPMCI_FE(cap,mci) (((cap<=2)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+1))) : (0))
00136
00137 #define MCPWM_CAPCON_RT(n)                              ((n<=2) ? ((uint32_t)(1<<(18+(n)))) : (0))
00138
00139 #define MCPWM_CAPCON_HNFCAP(n)                  ((n<=2) ? ((uint32_t)(1<<(21+(n)))) : (0))
00140
00141 /*********************************************************************/
00144 /* Interrupt registers, these macro definitions below can be applied for these
00145  * register type:
00146  * - MCPWM Interrupt Enable read address
00147  * - MCPWM Interrupt Enable set address
00148  * - MCPWM Interrupt Enable clear address
00149  * - MCPWM Interrupt Flags read address
00150  * - MCPWM Interrupt Flags set address
00151  * - MCPWM Interrupt Flags clear address
00152  */
00154 #define MCPWM_INT_ILIM(n)       (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+0))) : (0))
00155
00156 #define MCPWM_INT_IMAT(n)       (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+1))) : (0))
00157
00158 #define MCPWM_INT_ICAP(n)       (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+2))) : (0))
00159
00160 #define MCPWM_INT_ABORT         ((uint32_t)(1<<15))
00161
00162 /*********************************************************************/
00165 /* MCPWM Count Control register, these macro definitions below can be applied for these
00166  * register type:
00167  * - MCPWM Count Control read address
00168  * - MCPWM Count Control set address
00169  * - MCPWM Count Control clear address
00170  */
00172 #define MCPWM_CNTCON_TCMCI_RE(tc,mci)   (((tc<=2)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+0))) : (0))
00173
00174 #define MCPWM_CNTCON_TCMCI_FE(tc,mci)   (((tc<=2)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+1))) : (0))
00175
00176 #define MCPWM_CNTCON_CNTR(n)                    ((n<=2) ? ((uint32_t)(1<<(29+n))) : (0))
00177
00178 /*********************************************************************/
00182 #define MCPWM_DT(n,x)           ((n<=2) ? ((uint32_t)((x&0x3FF)<<(n*10))) : (0))
00183
00184 /*********************************************************************/
00187 #define MCPWM_CP_A0             ((uint32_t)(1<<0))
00188 #define MCPWM_CP_B0             ((uint32_t)(1<<1))
00189 #define MCPWM_CP_A1             ((uint32_t)(1<<2))
00190 #define MCPWM_CP_B1             ((uint32_t)(1<<3))
00191 #define MCPWM_CP_A2             ((uint32_t)(1<<4))
00192 #define MCPWM_CP_B2             ((uint32_t)(1<<5))
00194 /*********************************************************************/
00198 #define MCPWM_CAPCLR_CAP(n)             ((n<=2) ? ((uint32_t)(1<<n)) : (0))
00199
00200
00206 /* Public Types --------------------------------------------------------------- */
00214 typedef struct {
00215         uint32_t channelType;
00220         uint32_t channelPolarity;
00224         uint32_t channelDeadtimeEnable;
00228         uint32_t channelDeadtimeValue;
00229         uint32_t channelUpdateEnable;
00234         uint32_t channelTimercounterValue;
00235         uint32_t channelPeriodValue;
00236         uint32_t channelPulsewidthValue;
00237 } MCPWM_CHANNEL_CFG_Type;
00238
00242 typedef struct {
00243         uint32_t captureChannel;
00244         uint32_t captureRising;
00248         uint32_t captureFalling;
00252         uint32_t timerReset;
00256         uint32_t hnfEnable;
00260 } MCPWM_CAPTURE_CFG_Type;
00261
00262
00266 typedef struct {
00267         uint32_t counterChannel;
00268         uint32_t countRising;
00272         uint32_t countFalling;
00276 } MCPWM_COUNT_CFG_Type;
00277
00283 /* Public Functions ----------------------------------------------------------- */
00288 void MCPWM_Init(LPC_MCPWM_TypeDef *MCPWMx);
00289 void MCPWM_ConfigChannel(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
00290                                                 MCPWM_CHANNEL_CFG_Type * channelSetup);
00291 void MCPWM_WriteToShadow(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
00292                                                 MCPWM_CHANNEL_CFG_Type *channelSetup);
00293 void MCPWM_ConfigCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
00294                                                 MCPWM_CAPTURE_CFG_Type *captureConfig);
00295 void MCPWM_ClearCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel);
00296 uint32_t MCPWM_GetCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel);
00297 void MCPWM_CountConfig(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
00298                                         uint32_t countMode, MCPWM_COUNT_CFG_Type *countConfig);
00299 void MCPWM_Start(LPC_MCPWM_TypeDef *MCPWMx,uint32_t channel0, uint32_t channel1, uint32_t channel2);
00300 void MCPWM_Stop(LPC_MCPWM_TypeDef *MCPWMx,uint32_t channel0, uint32_t channel1, uint32_t channel2);
00301 void MCPWM_ACMode(LPC_MCPWM_TypeDef *MCPWMx,uint32_t acMode);
00302 void MCPWM_DCMode(LPC_MCPWM_TypeDef *MCPWMx, uint32_t dcMode,
00303                                         uint32_t outputInvered, uint32_t outputPattern);
00304 void MCPWM_IntConfig(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType, FunctionalState NewState);
00305 void MCPWM_IntSet(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType);
00306 void MCPWM_IntClear(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType);
00307 FlagStatus MCPWM_GetIntStatus(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType);
00308
00313 #ifdef __cplusplus
00314 }
00315 #endif
00316
00317 #endif /* LPC17XX_MCPWM_H_ */
00318
00323 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:41 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_nvic.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_nvic.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_nvic.c                          2010-05-21
00003 */
00028 /* Peripheral group ----------------------------------------------------------- */
00033 /* Includes ------------------------------------------------------------------- */
00034 #include "lpc17xx_nvic.h"
00035
00036
00037 /* Private Macros ------------------------------------------------------------- */
00042 /* Vector table offset bit mask */
00043 #define NVIC_VTOR_MASK              0x3FFFFF80
00044
00050 /* Public Functions ----------------------------------------------------------- */
00056 /*****************************************************************************/
00067 void NVIC_DeInit(void)
00068 {
00069         uint8_t tmp;
00070
00071         /* Disable all interrupts */
00072         NVIC->ICER[0] = 0xFFFFFFFF;
00073         NVIC->ICER[1] = 0x00000001;
00074         /* Clear all pending interrupts */
00075         NVIC->ICPR[0] = 0xFFFFFFFF;
00076         NVIC->ICPR[1] = 0x00000001;
00077
00078         /* Clear all interrupt priority */
00079         for (tmp = 0; tmp < 32; tmp++) {
00080                 NVIC->IP[tmp] = 0x00;
00081         }
00082 }
00083
00084 /*****************************************************************************/
00102 void NVIC_SCBDeInit(void)
00103 {
00104         uint8_t tmp;
00105
00106         SCB->ICSR = 0x0A000000;
00107         SCB->VTOR = 0x00000000;
00108         SCB->AIRCR = 0x05FA0000;
00109         SCB->SCR = 0x00000000;
00110         SCB->CCR = 0x00000000;
00111
00112         for (tmp = 0; tmp < 32; tmp++) {
00113                 SCB->SHP[tmp] = 0x00;
00114         }
00115
00116         SCB->SHCSR = 0x00000000;
00117         SCB->CFSR = 0xFFFFFFFF;
00118         SCB->HFSR = 0xFFFFFFFF;
00119         SCB->DFSR = 0xFFFFFFFF;
00120 }
00121
00122
00123 /*****************************************************************************/
00128 void NVIC_SetVTOR(uint32_t offset)
00129 {
00130 //      SCB->VTOR  = (offset & NVIC_VTOR_MASK);
00131         SCB->VTOR  = offset;
00132 }
00133
00142 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_nvic.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_nvic.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_nvic.h                          2010-05-21
00003 */
00028 /* Peripheral group ----------------------------------------------------------- */
00034 #ifndef LPC17XX_NVIC_H_
00035 #define LPC17XX_NVIC_H_
00036
00037 /* Includes ------------------------------------------------------------------- */
00038 #include "LPC17xx.h"
00039 #include "lpc_types.h"
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046
00047 /* Public Functions ----------------------------------------------------------- */
00052 void NVIC_DeInit(void);
00053 void NVIC_SCBDeInit(void);
00054 void NVIC_SetVTOR(uint32_t offset);
00055
00060 #ifdef __cplusplus
00061 }
00062 #endif
00063
00064 #endif /* LPC17XX_NVIC_H_ */
00065
00070 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:41 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_pinsel.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_pinsel.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_pinsel.c                                2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_pinsel.h"
00034
00035 /* Public Functions ----------------------------------------------------------- */
00036
00037 static void set_PinFunc ( uint8_t portnum, uint8_t pinnum, uint8_t funcnum);
00038 static void set_ResistorMode ( uint8_t portnum, uint8_t pinnum, uint8_t modenum);
00039 static void set_OpenDrainMode( uint8_t portnum, uint8_t pinnum, uint8_t modenum);
00040
00041 /*********************************************************************/
00094 static void set_PinFunc ( uint8_t portnum, uint8_t pinnum, uint8_t funcnum)
00095 {
00096         uint32_t pinnum_t = pinnum;
00097         uint32_t pinselreg_idx = 2 * portnum;
00098         uint32_t *pPinCon = (uint32_t *)&LPC_PINCON->PINSEL0;
00099
00100         if (pinnum_t >= 16) {
00101                 pinnum_t -= 16;
00102                 pinselreg_idx++;
00103         }
00104         *(uint32_t *)(pPinCon + pinselreg_idx) &= ~(0x03UL << (pinnum_t * 2));
00105         *(uint32_t *)(pPinCon + pinselreg_idx) |= ((uint32_t)funcnum) << (pinnum_t * 2);
00106 }
00107
00108 /*********************************************************************/
00159 void set_ResistorMode ( uint8_t portnum, uint8_t pinnum, uint8_t modenum)
00160 {
00161         uint32_t pinnum_t = pinnum;
00162         uint32_t pinmodereg_idx = 2 * portnum;
00163         uint32_t *pPinCon = (uint32_t *)&LPC_PINCON->PINMODE0;
00164
00165         if (pinnum_t >= 16) {
00166                 pinnum_t -= 16;
00167                 pinmodereg_idx++ ;
00168         }
00169
00170         *(uint32_t *)(pPinCon + pinmodereg_idx) &= ~(0x03UL << (pinnum_t * 2));
00171         *(uint32_t *)(pPinCon + pinmodereg_idx) |= ((uint32_t)modenum) << (pinnum_t * 2);
00172 }
00173
00174 /*********************************************************************/
00225 void set_OpenDrainMode( uint8_t portnum, uint8_t pinnum, uint8_t modenum)
00226 {
00227         uint32_t *pPinCon = (uint32_t *)&LPC_PINCON->PINMODE_OD0;
00228
00229         if (modenum == PINSEL_PINMODE_OPENDRAIN){
00230                 *(uint32_t *)(pPinCon + portnum) |= (0x01UL << pinnum);
00231         } else {
00232                 *(uint32_t *)(pPinCon + portnum) &= ~(0x01UL << pinnum);
00233         }
00234 }
00235
00236 /* End of Public Functions ---------------------------------------------------- */
00237
00238 /* Public Functions ----------------------------------------------------------- */
00242 /*********************************************************************/
00251 void PINSEL_ConfigTraceFunc(FunctionalState NewState)
00252 {
00253         if (NewState == ENABLE) {
00254                 LPC_PINCON->PINSEL10 |= (0x01UL << 3);
00255         } else if (NewState == DISABLE) {
00256                 LPC_PINCON->PINSEL10 &= ~(0x01UL << 3);
00257         }
00258 }
00259
00260 /*********************************************************************/
00273 void PINSEL_SetI2C0Pins(uint8_t i2cPinMode, FunctionalState filterSlewRateEnable)
00274 {
00275         uint32_t regVal;
00276
00277         if (i2cPinMode == PINSEL_I2C_Fast_Mode){
00278                 regVal = PINSEL_I2CPADCFG_SCLDRV0 | PINSEL_I2CPADCFG_SDADRV0;
00279         }
00280
00281         if (filterSlewRateEnable == DISABLE){
00282                 regVal = PINSEL_I2CPADCFG_SCLI2C0 | PINSEL_I2CPADCFG_SDAI2C0;
00283         }
00284         LPC_PINCON->I2CPADCFG = regVal;
00285 }
00286
00287
00288 /*********************************************************************/
00296 void PINSEL_ConfigPin(PINSEL_CFG_Type *PinCfg)
00297 {
00298         set_PinFunc(PinCfg->Portnum, PinCfg->Pinnum, PinCfg->Funcnum);
00299         set_ResistorMode(PinCfg->Portnum, PinCfg->Pinnum, PinCfg->Pinmode);
00300         set_OpenDrainMode(PinCfg->Portnum, PinCfg->Pinnum, PinCfg->OpenDrain);
00301 }
00302
00303
00312 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pinsel.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pinsel.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_pinsel.h                                2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_PINSEL_H_
00034 #define LPC17XX_PINSEL_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040 #ifdef __cplusplus
00041 extern "C"
00042 {
00043 #endif
00044
00045 /* Public Macros -------------------------------------------------------------- */
00050 /*********************************************************************/
00053 #define PINSEL_PORT_0   ((0))
00054 #define PINSEL_PORT_1   ((1))
00055 #define PINSEL_PORT_2   ((2))
00056 #define PINSEL_PORT_3   ((3))
00057 #define PINSEL_PORT_4   ((4))
00059 /***********************************************************************
00060  * Macros define for Pin Function selection
00061  **********************************************************************/
00062 #define PINSEL_FUNC_0   ((0))
00063 #define PINSEL_FUNC_1   ((1))
00064 #define PINSEL_FUNC_2   ((2))
00065 #define PINSEL_FUNC_3   ((3))
00067 /***********************************************************************
00068  * Macros define for Pin Number of Port
00069  **********************************************************************/
00070 #define PINSEL_PIN_0    ((0))
00071 #define PINSEL_PIN_1    ((1))
00072 #define PINSEL_PIN_2    ((2))
00073 #define PINSEL_PIN_3    ((3))
00074 #define PINSEL_PIN_4    ((4))
00075 #define PINSEL_PIN_5    ((5))
00076 #define PINSEL_PIN_6    ((6))
00077 #define PINSEL_PIN_7    ((7))
00078 #define PINSEL_PIN_8    ((8))
00079 #define PINSEL_PIN_9    ((9))
00080 #define PINSEL_PIN_10   ((10))
00081 #define PINSEL_PIN_11   ((11))
00082 #define PINSEL_PIN_12   ((12))
00083 #define PINSEL_PIN_13   ((13))
00084 #define PINSEL_PIN_14   ((14))
00085 #define PINSEL_PIN_15   ((15))
00086 #define PINSEL_PIN_16   ((16))
00087 #define PINSEL_PIN_17   ((17))
00088 #define PINSEL_PIN_18   ((18))
00089 #define PINSEL_PIN_19   ((19))
00090 #define PINSEL_PIN_20   ((20))
00091 #define PINSEL_PIN_21   ((21))
00092 #define PINSEL_PIN_22   ((22))
00093 #define PINSEL_PIN_23   ((23))
00094 #define PINSEL_PIN_24   ((24))
00095 #define PINSEL_PIN_25   ((25))
00096 #define PINSEL_PIN_26   ((26))
00097 #define PINSEL_PIN_27   ((27))
00098 #define PINSEL_PIN_28   ((28))
00099 #define PINSEL_PIN_29   ((29))
00100 #define PINSEL_PIN_30   ((30))
00101 #define PINSEL_PIN_31   ((31))
00103 /***********************************************************************
00104  * Macros define for Pin mode
00105  **********************************************************************/
00106 #define PINSEL_PINMODE_PULLUP           ((0))
00107 #define PINSEL_PINMODE_TRISTATE         ((2))
00108 #define PINSEL_PINMODE_PULLDOWN         ((3))
00110 /***********************************************************************
00111  * Macros define for Pin mode (normal/open drain)
00112  **********************************************************************/
00113 #define PINSEL_PINMODE_NORMAL           ((0))
00114 #define PINSEL_PINMODE_OPENDRAIN        ((1))
00116 /***********************************************************************
00117  * Macros define for I2C mode
00118  ***********************************************************************/
00119 #define PINSEL_I2C_Normal_Mode          ((0))
00120 #define PINSEL_I2C_Fast_Mode            ((1))
00126 /* Private Macros ------------------------------------------------------------- */
00127
00131 /* Pin selection define */
00132 /* I2C Pin Configuration register bit description */
00133 #define PINSEL_I2CPADCFG_SDADRV0        _BIT(0)
00134 #define PINSEL_I2CPADCFG_SDAI2C0        _BIT(1)
00135 #define PINSEL_I2CPADCFG_SCLDRV0        _BIT(2)
00136 #define PINSEL_I2CPADCFG_SCLI2C0        _BIT(3)
00143 /* Public Types --------------------------------------------------------------- */
00144
00149 typedef struct
00150 {
00151         uint8_t Portnum;
00153         uint8_t Pinnum;
00155         uint8_t Funcnum;
00157         uint8_t Pinmode;
00161         uint8_t OpenDrain;
00164 } PINSEL_CFG_Type;
00165
00171 /* Public Functions ----------------------------------------------------------- */
00176 void PINSEL_ConfigPin(PINSEL_CFG_Type *PinCfg);
00177 void PINSEL_ConfigTraceFunc (FunctionalState NewState);
00178 void PINSEL_SetI2C0Pins(uint8_t i2cPinMode, FunctionalState filterSlewRateEnable);
00179
00180
00186 #ifdef __cplusplus
00187 }
00188 #endif
00189
00190 #endif /* LPC17XX_PINSEL_H_ */
00191
00196 /* --------------------------------- End Of File ------------------------------ */
00197
Generated on Mon Nov 28 2011 11:14:41 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_pwm.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_pwm.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_pwm.c                           2011-03-31
00003 */
00026 /* Peripheral group ----------------------------------------------------------- */
00031 /* Includes ------------------------------------------------------------------- */
00032 #include "lpc17xx_pwm.h"
00033 #include "lpc17xx_clkpwr.h"
00034
00035 /* If this source file built with example, the LPC17xx FW library configuration
00036  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00037  * otherwise the default FW library configuration file must be included instead
00038  */
00039 #ifdef __BUILD_WITH_EXAMPLE__
00040 #include "lpc17xx_libcfg.h"
00041 #else
00042 #include "lpc17xx_libcfg_default.h"
00043 #endif /* __BUILD_WITH_EXAMPLE__ */
00044
00045
00046 #ifdef _PWM
00047
00048
00049 /* Public Functions ----------------------------------------------------------- */
00055 /*********************************************************************/
00070 IntStatus PWM_GetIntStatus(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag)
00071 {
00072         CHECK_PARAM(PARAM_PWMx(PWMx));
00073         CHECK_PARAM(PARAM_PWM_INTSTAT(IntFlag));
00074
00075         return ((PWMx->IR & IntFlag) ? SET : RESET);
00076 }
00077
00078
00079
00080 /*********************************************************************/
00095 void PWM_ClearIntPending(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag)
00096 {
00097         CHECK_PARAM(PARAM_PWMx(PWMx));
00098         CHECK_PARAM(PARAM_PWM_INTSTAT(IntFlag));
00099         PWMx->IR = IntFlag;
00100 }
00101
00102
00103
00104 /*****************************************************************************/
00121 void PWM_ConfigStructInit(uint8_t PWMTimerCounterMode, void *PWM_InitStruct)
00122 {
00123         PWM_TIMERCFG_Type *pTimeCfg;
00124         PWM_COUNTERCFG_Type *pCounterCfg;
00125         CHECK_PARAM(PARAM_PWM_TC_MODE(PWMTimerCounterMode));
00126
00127         pTimeCfg = (PWM_TIMERCFG_Type *) PWM_InitStruct;
00128         pCounterCfg = (PWM_COUNTERCFG_Type *) PWM_InitStruct;
00129
00130         if (PWMTimerCounterMode == PWM_MODE_TIMER )
00131         {
00132                 pTimeCfg->PrescaleOption = PWM_TIMER_PRESCALE_USVAL;
00133                 pTimeCfg->PrescaleValue = 1;
00134         }
00135         else if (PWMTimerCounterMode == PWM_MODE_COUNTER)
00136         {
00137                 pCounterCfg->CountInputSelect = PWM_COUNTER_PCAP1_0;
00138                 pCounterCfg->CounterOption = PWM_COUNTER_RISING;
00139         }
00140 }
00141
00142
00143 /*********************************************************************/
00156 void PWM_Init(LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct)
00157 {
00158         PWM_TIMERCFG_Type *pTimeCfg;
00159         PWM_COUNTERCFG_Type *pCounterCfg;
00160         uint64_t clkdlycnt;
00161
00162         CHECK_PARAM(PARAM_PWMx(PWMx));
00163         CHECK_PARAM(PARAM_PWM_TC_MODE(PWMTimerCounterMode));
00164
00165         pTimeCfg = (PWM_TIMERCFG_Type *)PWM_ConfigStruct;
00166         pCounterCfg = (PWM_COUNTERCFG_Type *)PWM_ConfigStruct;
00167
00168
00169         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCPWM1, ENABLE);
00170         CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_PWM1, CLKPWR_PCLKSEL_CCLK_DIV_4);
00171         // Get peripheral clock of PWM1
00172         clkdlycnt = (uint64_t) CLKPWR_GetPCLK (CLKPWR_PCLKSEL_PWM1);
00173
00174
00175         // Clear all interrupts pending
00176         PWMx->IR = 0xFF & PWM_IR_BITMASK;
00177         PWMx->TCR = 0x00;
00178         PWMx->CTCR = 0x00;
00179         PWMx->MCR = 0x00;
00180         PWMx->CCR = 0x00;
00181         PWMx->PCR = 0x00;
00182         PWMx->LER = 0x00;
00183
00184         if (PWMTimerCounterMode == PWM_MODE_TIMER)
00185         {
00186                 CHECK_PARAM(PARAM_PWM_TIMER_PRESCALE(pTimeCfg->PrescaleOption));
00187
00188                 /* Absolute prescale value */
00189                 if (pTimeCfg->PrescaleOption == PWM_TIMER_PRESCALE_TICKVAL)
00190                 {
00191                         PWMx->PR   = pTimeCfg->PrescaleValue - 1;
00192                 }
00193                 /* uSecond prescale value */
00194                 else
00195                 {
00196                         clkdlycnt = (clkdlycnt * pTimeCfg->PrescaleValue) / 1000000;
00197                         PWMx->PR = ((uint32_t) clkdlycnt) - 1;
00198                 }
00199
00200         }
00201         else if (PWMTimerCounterMode == PWM_MODE_COUNTER)
00202         {
00203                 CHECK_PARAM(PARAM_PWM_COUNTER_INPUTSEL(pCounterCfg->CountInputSelect));
00204                 CHECK_PARAM(PARAM_PWM_COUNTER_EDGE(pCounterCfg->CounterOption));
00205
00206                 PWMx->CTCR |= (PWM_CTCR_MODE((uint32_t)pCounterCfg->CounterOption)) \
00207                                                 | (PWM_CTCR_SELECT_INPUT((uint32_t)pCounterCfg->CountInputSelect));
00208         }
00209 }
00210
00211 /*********************************************************************/
00217 void PWM_DeInit (LPC_PWM_TypeDef *PWMx)
00218 {
00219         CHECK_PARAM(PARAM_PWMx(PWMx));
00220
00221         // Disable PWM control (timer, counter and PWM)
00222         PWMx->TCR = 0x00;
00223         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCPWM1, DISABLE);
00224
00225 }
00226
00227
00228 /*********************************************************************/
00236 void PWM_Cmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState)
00237 {
00238         CHECK_PARAM(PARAM_PWMx(PWMx));
00239         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00240
00241         if (NewState == ENABLE)
00242         {
00243                 PWMx->TCR       |=  PWM_TCR_PWM_ENABLE;
00244         }
00245         else
00246         {
00247                 PWMx->TCR &= (~PWM_TCR_PWM_ENABLE) & PWM_TCR_BITMASK;
00248         }
00249 }
00250
00251
00252 /*********************************************************************/
00260 void PWM_CounterCmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState)
00261 {
00262         CHECK_PARAM(PARAM_PWMx(PWMx));
00263         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00264         if (NewState == ENABLE)
00265         {
00266                 PWMx->TCR       |=  PWM_TCR_COUNTER_ENABLE;
00267         }
00268         else
00269         {
00270                 PWMx->TCR &= (~PWM_TCR_COUNTER_ENABLE) & PWM_TCR_BITMASK;
00271         }
00272 }
00273
00274
00275 /*********************************************************************/
00280 void PWM_ResetCounter(LPC_PWM_TypeDef *PWMx)
00281 {
00282         CHECK_PARAM(PARAM_PWMx(PWMx));
00283         PWMx->TCR |= PWM_TCR_COUNTER_RESET;
00284         PWMx->TCR &= (~PWM_TCR_COUNTER_RESET) & PWM_TCR_BITMASK;
00285 }
00286
00287
00288 /*********************************************************************/
00296 void PWM_ConfigMatch(LPC_PWM_TypeDef *PWMx, PWM_MATCHCFG_Type *PWM_MatchConfigStruct)
00297 {
00298         CHECK_PARAM(PARAM_PWMx(PWMx));
00299         CHECK_PARAM(PARAM_PWM1_MATCH_CHANNEL(PWM_MatchConfigStruct->MatchChannel));
00300         CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_MatchConfigStruct->IntOnMatch));
00301         CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_MatchConfigStruct->ResetOnMatch));
00302         CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_MatchConfigStruct->StopOnMatch));
00303
00304         //interrupt on MRn
00305         if (PWM_MatchConfigStruct->IntOnMatch == ENABLE)
00306         {
00307                 PWMx->MCR |= PWM_MCR_INT_ON_MATCH(PWM_MatchConfigStruct->MatchChannel);
00308         }
00309         else
00310         {
00311                 PWMx->MCR &= (~PWM_MCR_INT_ON_MATCH(PWM_MatchConfigStruct->MatchChannel)) \
00312                                         & PWM_MCR_BITMASK;
00313         }
00314
00315         //reset on MRn
00316         if (PWM_MatchConfigStruct->ResetOnMatch == ENABLE)
00317         {
00318                 PWMx->MCR |= PWM_MCR_RESET_ON_MATCH(PWM_MatchConfigStruct->MatchChannel);
00319         }
00320         else
00321         {
00322                 PWMx->MCR &= (~PWM_MCR_RESET_ON_MATCH(PWM_MatchConfigStruct->MatchChannel)) \
00323                                         & PWM_MCR_BITMASK;
00324         }
00325
00326         //stop on MRn
00327         if (PWM_MatchConfigStruct->StopOnMatch == ENABLE)
00328         {
00329                 PWMx->MCR |= PWM_MCR_STOP_ON_MATCH(PWM_MatchConfigStruct->MatchChannel);
00330         }
00331         else
00332         {
00333                 PWMx->MCR &= (~PWM_MCR_STOP_ON_MATCH(PWM_MatchConfigStruct->MatchChannel)) \
00334                                         & PWM_MCR_BITMASK;
00335         }
00336 }
00337
00338
00339 /*********************************************************************/
00347 void PWM_ConfigCapture(LPC_PWM_TypeDef *PWMx, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct)
00348 {
00349         CHECK_PARAM(PARAM_PWMx(PWMx));
00350         CHECK_PARAM(PARAM_PWM1_CAPTURE_CHANNEL(PWM_CaptureConfigStruct->CaptureChannel));
00351         CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_CaptureConfigStruct->FallingEdge));
00352         CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_CaptureConfigStruct->IntOnCaption));
00353         CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_CaptureConfigStruct->RisingEdge));
00354
00355         if (PWM_CaptureConfigStruct->RisingEdge == ENABLE)
00356         {
00357                 PWMx->CCR |= PWM_CCR_CAP_RISING(PWM_CaptureConfigStruct->CaptureChannel);
00358         }
00359         else
00360         {
00361                 PWMx->CCR &= (~PWM_CCR_CAP_RISING(PWM_CaptureConfigStruct->CaptureChannel)) \
00362                                         & PWM_CCR_BITMASK;
00363         }
00364
00365         if (PWM_CaptureConfigStruct->FallingEdge == ENABLE)
00366         {
00367                 PWMx->CCR |= PWM_CCR_CAP_FALLING(PWM_CaptureConfigStruct->CaptureChannel);
00368         }
00369         else
00370         {
00371                 PWMx->CCR &= (~PWM_CCR_CAP_FALLING(PWM_CaptureConfigStruct->CaptureChannel)) \
00372                                         & PWM_CCR_BITMASK;
00373         }
00374
00375         if (PWM_CaptureConfigStruct->IntOnCaption == ENABLE)
00376         {
00377                 PWMx->CCR |= PWM_CCR_INT_ON_CAP(PWM_CaptureConfigStruct->CaptureChannel);
00378         }
00379         else
00380         {
00381                 PWMx->CCR &= (~PWM_CCR_INT_ON_CAP(PWM_CaptureConfigStruct->CaptureChannel)) \
00382                                         & PWM_CCR_BITMASK;
00383         }
00384 }
00385
00386
00387 /*********************************************************************/
00394 uint32_t PWM_GetCaptureValue(LPC_PWM_TypeDef *PWMx, uint8_t CaptureChannel)
00395 {
00396         CHECK_PARAM(PARAM_PWMx(PWMx));
00397         CHECK_PARAM(PARAM_PWM1_CAPTURE_CHANNEL(CaptureChannel));
00398
00399         switch (CaptureChannel)
00400         {
00401         case 0:
00402                 return PWMx->CR0;
00403
00404         case 1:
00405                 return PWMx->CR1;
00406
00407         default:
00408                 return (0);
00409         }
00410 }
00411
00412
00413 /********************************************************************/
00425 void PWM_MatchUpdate(LPC_PWM_TypeDef *PWMx, uint8_t MatchChannel, \
00426                                         uint32_t MatchValue, uint8_t UpdateType)
00427 {
00428         CHECK_PARAM(PARAM_PWMx(PWMx));
00429         CHECK_PARAM(PARAM_PWM1_MATCH_CHANNEL(MatchChannel));
00430         CHECK_PARAM(PARAM_PWM_MATCH_UPDATE(UpdateType));
00431
00432         switch (MatchChannel)
00433         {
00434         case 0:
00435                 PWMx->MR0 = MatchValue;
00436                 break;
00437
00438         case 1:
00439                 PWMx->MR1 = MatchValue;
00440                 break;
00441
00442         case 2:
00443                 PWMx->MR2 = MatchValue;
00444                 break;
00445
00446         case 3:
00447                 PWMx->MR3 = MatchValue;
00448                 break;
00449
00450         case 4:
00451                 PWMx->MR4 = MatchValue;
00452                 break;
00453
00454         case 5:
00455                 PWMx->MR5 = MatchValue;
00456                 break;
00457
00458         case 6:
00459                 PWMx->MR6 = MatchValue;
00460                 break;
00461         }
00462
00463         // Write Latch register
00464         PWMx->LER |= PWM_LER_EN_MATCHn_LATCH(MatchChannel);
00465
00466         // In case of update now
00467         if (UpdateType == PWM_MATCH_UPDATE_NOW)
00468         {
00469                 PWMx->TCR |= PWM_TCR_COUNTER_RESET;
00470                 PWMx->TCR &= (~PWM_TCR_COUNTER_RESET) & PWM_TCR_BITMASK;
00471         }
00472 }
00473
00474 /********************************************************************/
00486 void PWM_MultiMatchUpdate(LPC_PWM_TypeDef *PWMx, PWM_Match_T *MatchStruct , uint8_t UpdateType)
00487 {
00488         uint8_t LatchValue = 0;
00489         uint8_t i;
00490
00491         CHECK_PARAM(PARAM_PWMx(PWMx));
00492         CHECK_PARAM(PARAM_PWM_MATCH_UPDATE(UpdateType));
00493
00494         //Update match value
00495         for(i=0;i<7;i++)
00496         {
00497                 if(MatchStruct[i].Status == SET)
00498                 {
00499                         if(i<4)
00500                                 *((volatile unsigned int *)(&(PWMx->MR0) + i)) = MatchStruct[i].Matchvalue;
00501                         else
00502                         {
00503                                 *((volatile unsigned int *)(&(PWMx->MR4) + (i-4))) = MatchStruct[i].Matchvalue;
00504                         }
00505                         LatchValue |=(1<<i);
00506                 }
00507         }
00508         //set update for multi-channel at the same time
00509         PWMx->LER = LatchValue;
00510
00511         // In case of update now
00512         if (UpdateType == PWM_MATCH_UPDATE_NOW)
00513         {
00514                 PWMx->TCR |= PWM_TCR_COUNTER_RESET;
00515                 PWMx->TCR &= (~PWM_TCR_COUNTER_RESET) & PWM_TCR_BITMASK;
00516         }
00517 }
00518 /********************************************************************/
00528 void PWM_ChannelConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, uint8_t ModeOption)
00529 {
00530         CHECK_PARAM(PARAM_PWMx(PWMx));
00531         CHECK_PARAM(PARAM_PWM1_EDGE_MODE_CHANNEL(PWMChannel));
00532         CHECK_PARAM(PARAM_PWM_CHANNEL_EDGE(ModeOption));
00533
00534         // Single edge mode
00535         if (ModeOption == PWM_CHANNEL_SINGLE_EDGE)
00536         {
00537                 PWMx->PCR &= (~PWM_PCR_PWMSELn(PWMChannel)) & PWM_PCR_BITMASK;
00538         }
00539         // Double edge mode
00540         else if (PWM_CHANNEL_DUAL_EDGE)
00541         {
00542                 PWMx->PCR |= PWM_PCR_PWMSELn(PWMChannel);
00543         }
00544 }
00545
00546
00547
00548 /********************************************************************/
00557 void PWM_ChannelCmd(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, FunctionalState NewState)
00558 {
00559         CHECK_PARAM(PARAM_PWMx(PWMx));
00560         CHECK_PARAM(PARAM_PWM1_CHANNEL(PWMChannel));
00561
00562         if (NewState == ENABLE)
00563         {
00564                 PWMx->PCR |= PWM_PCR_PWMENAn(PWMChannel);
00565         }
00566         else
00567         {
00568                 PWMx->PCR &= (~PWM_PCR_PWMENAn(PWMChannel)) & PWM_PCR_BITMASK;
00569         }
00570 }
00571
00576 #endif /* _PWM */
00577
00582 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pwm.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_pwm.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_pwm.h                           2011-03-31
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_PWM_H_
00034 #define LPC17XX_PWM_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046
00047 /* Private Macros ------------------------------------------------------------- */
00052 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00053 /**********************************************************************
00054 * IR register definitions
00055 **********************************************************************/
00057 #define PWM_IR_PWMMRn(n)        ((uint32_t)((n<4)?(1<<n):(1<<(n+4))))
00058
00059 #define PWM_IR_PWMCAPn(n)               ((uint32_t)(1<<(n+4)))
00060
00061 #define PWM_IR_BITMASK                  ((uint32_t)(0x0000073F))
00062
00063 /**********************************************************************
00064 * TCR register definitions
00065 **********************************************************************/
00067 #define PWM_TCR_BITMASK                         ((uint32_t)(0x0000000B))
00068 #define PWM_TCR_COUNTER_ENABLE      ((uint32_t)(1<<0))
00069 #define PWM_TCR_COUNTER_RESET       ((uint32_t)(1<<1))
00070 #define PWM_TCR_PWM_ENABLE          ((uint32_t)(1<<3))
00072 /**********************************************************************
00073 * CTCR register definitions
00074 **********************************************************************/
00075
00076 #define PWM_CTCR_BITMASK                        ((uint32_t)(0x0000000F))
00077
00078 #define PWM_CTCR_MODE(n)                ((uint32_t)(n&0x03))
00079
00080 #define PWM_CTCR_SELECT_INPUT(n)        ((uint32_t)((n&0x03)<<2))
00081
00082 /**********************************************************************
00083 * MCR register definitions
00084 **********************************************************************/
00086 #define PWM_MCR_BITMASK                         ((uint32_t)(0x001FFFFF))
00087
00088 #define PWM_MCR_INT_ON_MATCH(n)     ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07))))
00089
00090 #define PWM_MCR_RESET_ON_MATCH(n)   ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+1)))
00091
00092 #define PWM_MCR_STOP_ON_MATCH(n)    ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+2)))
00093
00094 /**********************************************************************
00095 * CCR register definitions
00096 **********************************************************************/
00098 #define PWM_CCR_BITMASK                         ((uint32_t)(0x0000003F))
00099
00100 #define PWM_CCR_CAP_RISING(n)           ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1))))
00101
00102 #define PWM_CCR_CAP_FALLING(n)          ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+1)))
00103
00104 #define PWM_CCR_INT_ON_CAP(n)           ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+2)))
00105
00106 /**********************************************************************
00107 * PCR register definitions
00108 **********************************************************************/
00110 #define PWM_PCR_BITMASK                 (uint32_t)0x00007E7C
00111
00112 #define PWM_PCR_PWMSELn(n)      ((uint32_t)(((n&0x7)<2) ? 0 : (1<<n)))
00113
00114 #define PWM_PCR_PWMENAn(n)      ((uint32_t)(((n&0x7)<1) ? 0 : (1<<(n+8))))
00115
00116 /**********************************************************************
00117 * LER register definitions
00118 **********************************************************************/
00120 #define PWM_LER_BITMASK                         ((uint32_t)(0x0000007F))
00121
00122 #define PWM_LER_EN_MATCHn_LATCH(n)   ((uint32_t)((n<7) ? (1<<n) : 0))
00123
00124 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00126 #define PARAM_PWMx(n)   (((uint32_t *)n)==((uint32_t *)LPC_PWM1))
00127
00129 #define PARAM_PWM1_MATCH_CHANNEL(n)             (n<=6)
00130
00132 #define PARAM_PWM1_CHANNEL(n)                   ((n>=1) && (n<=6))
00133
00135 #define PARAM_PWM1_EDGE_MODE_CHANNEL(n)                 ((n>=2) && (n<=6))
00136
00138 #define PARAM_PWM1_CAPTURE_CHANNEL(n)   ((n==0) || (n==1))
00139
00141 #define PARAM_PWM_INTSTAT(n)    ((n==PWM_INTSTAT_MR0) || (n==PWM_INTSTAT_MR1) || (n==PWM_INTSTAT_MR2) \
00142 || (n==PWM_INTSTAT_MR3) || (n==PWM_INTSTAT_MR4) || (n==PWM_INTSTAT_MR5) \
00143 || (n==PWM_INTSTAT_MR6) || (n==PWM_INTSTAT_CAP0) || (n==PWM_INTSTAT_CAP1))
00144
00149 /* Public Types --------------------------------------------------------------- */
00155 typedef struct {
00156
00157         uint8_t PrescaleOption;
00161         uint8_t Reserved[3];
00162         uint32_t PrescaleValue;
00165 } PWM_TIMERCFG_Type;
00166
00168 typedef struct {
00169
00170         uint8_t CounterOption;
00175         uint8_t CountInputSelect;
00179         uint8_t Reserved[2];
00180 } PWM_COUNTERCFG_Type;
00181
00183 typedef struct {
00184         uint8_t MatchChannel;
00186         uint8_t IntOnMatch;
00190         uint8_t StopOnMatch;
00194         uint8_t ResetOnMatch;
00198 } PWM_MATCHCFG_Type;
00199
00200
00202 typedef struct {
00203         uint8_t CaptureChannel;
00205         uint8_t RisingEdge;
00209         uint8_t FallingEdge;
00213         uint8_t IntOnCaption;
00217 } PWM_CAPTURECFG_Type;
00218
00219 /* Timer/Counter in PWM configuration type definition -----------------------------------*/
00220
00222 typedef enum {
00223         PWM_MODE_TIMER = 0,
00224         PWM_MODE_COUNTER
00225 } PWM_TC_MODE_OPT;
00226
00227 #define PARAM_PWM_TC_MODE(n) ((n==PWM_MODE_TIMER) || (n==PWM_MODE_COUNTER))
00228
00229
00231 typedef enum
00232 {
00233         PWM_TIMER_PRESCALE_TICKVAL = 0,
00234         PWM_TIMER_PRESCALE_USVAL
00235 } PWM_TIMER_PRESCALE_OPT;
00236
00237 #define PARAM_PWM_TIMER_PRESCALE(n) ((n==PWM_TIMER_PRESCALE_TICKVAL) || (n==PWM_TIMER_PRESCALE_USVAL))
00238
00239
00241 typedef enum {
00242         PWM_COUNTER_PCAP1_0 = 0,
00243         PWM_COUNTER_PCAP1_1
00244 } PWM_COUNTER_INPUTSEL_OPT;
00245
00246 #define PARAM_PWM_COUNTER_INPUTSEL(n) ((n==PWM_COUNTER_PCAP1_0) || (n==PWM_COUNTER_PCAP1_1))
00247
00249 typedef enum {
00250     PWM_COUNTER_RISING = 1,
00251     PWM_COUNTER_FALLING = 2,
00252     PWM_COUNTER_ANY = 3
00253 } PWM_COUNTER_EDGE_OPT;
00254
00255 #define PARAM_PWM_COUNTER_EDGE(n)       ((n==PWM_COUNTER_RISING) || (n==PWM_COUNTER_FALLING) \
00256 || (n==PWM_COUNTER_ANY))
00257
00258
00259 /* PWM configuration type definition ----------------------------------------------------- */
00261 typedef enum {
00262     PWM_CHANNEL_SINGLE_EDGE,
00263     PWM_CHANNEL_DUAL_EDGE
00264 } PWM_CHANNEL_EDGE_OPT;
00265
00266 #define PARAM_PWM_CHANNEL_EDGE(n)       ((n==PWM_CHANNEL_SINGLE_EDGE) || (n==PWM_CHANNEL_DUAL_EDGE))
00267
00268
00270 typedef enum {
00271         PWM_MATCH_UPDATE_NOW = 0,
00272         PWM_MATCH_UPDATE_NEXT_RST
00274 } PWM_MATCH_UPDATE_OPT;
00275
00276 #define PARAM_PWM_MATCH_UPDATE(n)       ((n==PWM_MATCH_UPDATE_NOW) || (n==PWM_MATCH_UPDATE_NEXT_RST))
00277
00278
00281 typedef enum
00282 {
00283         PWM_INTSTAT_MR0 = PWM_IR_PWMMRn(0),
00284         PWM_INTSTAT_MR1 = PWM_IR_PWMMRn(1),
00285         PWM_INTSTAT_MR2 = PWM_IR_PWMMRn(2),
00286         PWM_INTSTAT_MR3 = PWM_IR_PWMMRn(3),
00287         PWM_INTSTAT_CAP0 = PWM_IR_PWMCAPn(0),
00288         PWM_INTSTAT_CAP1 = PWM_IR_PWMCAPn(1),
00289         PWM_INTSTAT_MR4 = PWM_IR_PWMMRn(4),
00290         PWM_INTSTAT_MR6 = PWM_IR_PWMMRn(5),
00291         PWM_INTSTAT_MR5 = PWM_IR_PWMMRn(6)
00292 }PWM_INTSTAT_TYPE;
00293
00295 typedef struct
00296 {
00297         uint32_t Matchvalue;
00298         FlagStatus Status;
00299 }PWM_Match_T;
00300
00306 /* Public Functions ----------------------------------------------------------- */
00311 void PWM_PinConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWM_Channel, uint8_t PinselOption);
00312 IntStatus PWM_GetIntStatus(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag);
00313 void PWM_ClearIntPending(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag);
00314 void PWM_ConfigStructInit(uint8_t PWMTimerCounterMode, void *PWM_InitStruct);
00315 void PWM_Init(LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct);
00316 void PWM_DeInit (LPC_PWM_TypeDef *PWMx);
00317 void PWM_Cmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState);
00318 void PWM_CounterCmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState);
00319 void PWM_ResetCounter(LPC_PWM_TypeDef *PWMx);
00320 void PWM_ConfigMatch(LPC_PWM_TypeDef *PWMx, PWM_MATCHCFG_Type *PWM_MatchConfigStruct);
00321 void PWM_ConfigCapture(LPC_PWM_TypeDef *PWMx, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct);
00322 uint32_t PWM_GetCaptureValue(LPC_PWM_TypeDef *PWMx, uint8_t CaptureChannel);
00323 void PWM_MatchUpdate(LPC_PWM_TypeDef *PWMx, uint8_t MatchChannel, \
00324                                         uint32_t MatchValue, uint8_t UpdateType);
00325 void PWM_ChannelConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, uint8_t ModeOption);
00326 void PWM_ChannelCmd(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, FunctionalState NewState);
00327
00332 #ifdef __cplusplus
00333 }
00334 #endif
00335
00336 #endif /* LPC17XX_PWM_H_ */
00337
00342 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:41 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_qei.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_qei.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_qei.c                           2010-05-21
00003 */
00026 /* Peripheral group ----------------------------------------------------------- */
00031 /* Includes ------------------------------------------------------------------- */
00032 #include "lpc17xx_qei.h"
00033 #include "lpc17xx_clkpwr.h"
00034
00035
00036 /* If this source file built with example, the LPC17xx FW library configuration
00037  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00038  * otherwise the default FW library configuration file must be included instead
00039  */
00040 #ifdef __BUILD_WITH_EXAMPLE__
00041 #include "lpc17xx_libcfg.h"
00042 #else
00043 #include "lpc17xx_libcfg_default.h"
00044 #endif /* __BUILD_WITH_EXAMPLE__ */
00045
00046
00047 #ifdef _QEI
00048
00049 /* Private Types -------------------------------------------------------------- */
00057 typedef union {
00058         QEI_CFG_Type bmQEIConfig;
00059         uint32_t ulQEIConfig;
00060 } QEI_CFGOPT_Type;
00061
00067 /* Public Functions ----------------------------------------------------------- */
00072 /*********************************************************************/
00083 void QEI_Reset(LPC_QEI_TypeDef *QEIx, uint32_t ulResetType)
00084 {
00085         CHECK_PARAM(PARAM_QEIx(QEIx));
00086         CHECK_PARAM(PARAM_QEI_RESET(ulResetType));
00087
00088         QEIx->QEICON = ulResetType;
00089 }
00090
00091 /*********************************************************************/
00100 void QEI_Init(LPC_QEI_TypeDef *QEIx, QEI_CFG_Type *QEI_ConfigStruct)
00101 {
00102
00103         CHECK_PARAM(PARAM_QEIx(QEIx));
00104         CHECK_PARAM(PARAM_QEI_DIRINV(QEI_ConfigStruct->DirectionInvert));
00105         CHECK_PARAM(PARAM_QEI_SIGNALMODE(QEI_ConfigStruct->SignalMode));
00106         CHECK_PARAM(PARAM_QEI_CAPMODE(QEI_ConfigStruct->CaptureMode));
00107         CHECK_PARAM(PARAM_QEI_INVINX(QEI_ConfigStruct->InvertIndex));
00108
00109         /* Set up clock and power for QEI module */
00110         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCQEI, ENABLE);
00111
00112         /* As default, peripheral clock for QEI module
00113          * is set to FCCLK / 2 */
00114         CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_QEI, CLKPWR_PCLKSEL_CCLK_DIV_1);
00115
00116         // Reset all remaining value in QEI peripheral
00117         QEIx->QEICON = QEI_CON_RESP | QEI_CON_RESV | QEI_CON_RESI;
00118         QEIx->QEIMAXPOS = 0x00;
00119         QEIx->CMPOS0 = 0x00;
00120         QEIx->CMPOS1 = 0x00;
00121         QEIx->CMPOS2 = 0x00;
00122         QEIx->INXCMP = 0x00;
00123         QEIx->QEILOAD = 0x00;
00124         QEIx->VELCOMP = 0x00;
00125         QEIx->FILTER = 0x00;
00126         // Disable all Interrupt
00127         QEIx->QEIIEC = QEI_IECLR_BITMASK;
00128         // Clear all Interrupt pending
00129         QEIx->QEICLR = QEI_INTCLR_BITMASK;
00130         // Set QEI configuration value corresponding to its setting up value
00131         QEIx->QEICONF = ((QEI_CFGOPT_Type *)QEI_ConfigStruct)->ulQEIConfig;
00132 }
00133
00134
00135 /*********************************************************************/
00141 void QEI_DeInit(LPC_QEI_TypeDef *QEIx)
00142 {
00143         CHECK_PARAM(PARAM_QEIx(QEIx));
00144
00145         /* Turn off clock and power for QEI module */
00146         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCQEI, DISABLE);
00147 }
00148
00149
00150 /*****************************************************************************/
00160 void QEI_ConfigStructInit(QEI_CFG_Type *QIE_InitStruct)
00161 {
00162         QIE_InitStruct->CaptureMode = QEI_CAPMODE_4X;
00163         QIE_InitStruct->DirectionInvert = QEI_DIRINV_NONE;
00164         QIE_InitStruct->InvertIndex = QEI_INVINX_NONE;
00165         QIE_InitStruct->SignalMode = QEI_SIGNALMODE_QUAD;
00166 }
00167
00168
00169 /*********************************************************************/
00176 FlagStatus QEI_GetStatus(LPC_QEI_TypeDef *QEIx, uint32_t ulFlagType)
00177 {
00178         CHECK_PARAM(PARAM_QEIx(QEIx));
00179         CHECK_PARAM(PARAM_QEI_STATUS(ulFlagType));
00180         return ((QEIx->QEISTAT & ulFlagType) ? SET : RESET);
00181 }
00182
00183 /*********************************************************************/
00188 uint32_t QEI_GetPosition(LPC_QEI_TypeDef *QEIx)
00189 {
00190         CHECK_PARAM(PARAM_QEIx(QEIx));
00191         return (QEIx->QEIPOS);
00192 }
00193
00194 /*********************************************************************/
00200 void QEI_SetMaxPosition(LPC_QEI_TypeDef *QEIx, uint32_t ulMaxPos)
00201 {
00202         CHECK_PARAM(PARAM_QEIx(QEIx));
00203         QEIx->QEIMAXPOS = ulMaxPos;
00204 }
00205
00206 /*********************************************************************/
00216 void QEI_SetPositionComp(LPC_QEI_TypeDef *QEIx, uint8_t bPosCompCh, uint32_t ulPosComp)
00217 {
00218         uint32_t *tmp;
00219
00220         CHECK_PARAM(PARAM_QEIx(QEIx));
00221         CHECK_PARAM(PARAM_QEI_COMPPOS_CH(bPosCompCh));
00222         tmp = (uint32_t *) (&(QEIx->CMPOS0) + bPosCompCh * 4);
00223         *tmp = ulPosComp;
00224
00225 }
00226
00227 /*********************************************************************/
00232 uint32_t QEI_GetIndex(LPC_QEI_TypeDef *QEIx)
00233 {
00234         CHECK_PARAM(PARAM_QEIx(QEIx));
00235         return (QEIx->INXCNT);
00236 }
00237
00238 /*********************************************************************/
00244 void QEI_SetIndexComp(LPC_QEI_TypeDef *QEIx, uint32_t ulIndexComp)
00245 {
00246         CHECK_PARAM(PARAM_QEIx(QEIx));
00247         QEIx->INXCMP = ulIndexComp;
00248 }
00249
00250 /*********************************************************************/
00259 void QEI_SetTimerReload(LPC_QEI_TypeDef *QEIx, QEI_RELOADCFG_Type *QEIReloadStruct)
00260 {
00261         uint64_t pclk;
00262
00263         CHECK_PARAM(PARAM_QEIx(QEIx));
00264         CHECK_PARAM(PARAM_QEI_TIMERRELOAD(QEIReloadStruct->ReloadOption));
00265
00266         if (QEIReloadStruct->ReloadOption == QEI_TIMERRELOAD_TICKVAL) {
00267                 QEIx->QEILOAD = QEIReloadStruct->ReloadValue - 1;
00268         } else {
00269                 pclk = (uint64_t)CLKPWR_GetPCLK(CLKPWR_PCLKSEL_QEI);
00270                 pclk = (pclk /(1000000/QEIReloadStruct->ReloadValue)) - 1;
00271                 QEIx->QEILOAD = (uint32_t)pclk;
00272         }
00273 }
00274
00275 /*********************************************************************/
00280 uint32_t QEI_GetTimer(LPC_QEI_TypeDef *QEIx)
00281 {
00282         CHECK_PARAM(PARAM_QEIx(QEIx));
00283         return (QEIx->QEITIME);
00284 }
00285
00286 /*********************************************************************/
00291 uint32_t QEI_GetVelocity(LPC_QEI_TypeDef *QEIx)
00292 {
00293         CHECK_PARAM(PARAM_QEIx(QEIx));
00294         return (QEIx->QEIVEL);
00295 }
00296
00297 /*********************************************************************/
00304 uint32_t QEI_GetVelocityCap(LPC_QEI_TypeDef *QEIx)
00305 {
00306         CHECK_PARAM(PARAM_QEIx(QEIx));
00307         return (QEIx->QEICAP);
00308 }
00309
00310 /*********************************************************************/
00316 void QEI_SetVelocityComp(LPC_QEI_TypeDef *QEIx, uint32_t ulVelComp)
00317 {
00318         CHECK_PARAM(PARAM_QEIx(QEIx));
00319         QEIx->VELCOMP = ulVelComp;
00320 }
00321
00322 /*********************************************************************/
00329 void QEI_SetDigiFilter(LPC_QEI_TypeDef *QEIx, uint32_t ulSamplingPulse)
00330 {
00331         CHECK_PARAM(PARAM_QEIx(QEIx));
00332         QEIx->FILTER = ulSamplingPulse;
00333 }
00334
00335 /*********************************************************************/
00359 FlagStatus QEI_GetIntStatus(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
00360 {
00361         CHECK_PARAM(PARAM_QEIx(QEIx));
00362         CHECK_PARAM(PARAM_QEI_INTFLAG(ulIntType));
00363
00364         return((QEIx->QEIINTSTAT & ulIntType) ? SET : RESET);
00365 }
00366
00367 /*********************************************************************/
00393 void QEI_IntCmd(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType, FunctionalState NewState)
00394 {
00395         CHECK_PARAM(PARAM_QEIx(QEIx));
00396         CHECK_PARAM(PARAM_QEI_INTFLAG(ulIntType));
00397         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00398
00399         if (NewState == ENABLE) {
00400                 QEIx->QEIIES = ulIntType;
00401         } else {
00402                 QEIx->QEIIEC = ulIntType;
00403         }
00404 }
00405
00406
00407 /*********************************************************************/
00430 void QEI_IntSet(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
00431 {
00432         CHECK_PARAM(PARAM_QEIx(QEIx));
00433         CHECK_PARAM(PARAM_QEI_INTFLAG(ulIntType));
00434
00435         QEIx->QEISET = ulIntType;
00436 }
00437
00438 /*********************************************************************/
00461 void QEI_IntClear(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType)
00462 {
00463         CHECK_PARAM(PARAM_QEIx(QEIx));
00464         CHECK_PARAM(PARAM_QEI_INTFLAG(ulIntType));
00465
00466         QEIx->QEICLR = ulIntType;
00467 }
00468
00469
00470 /*********************************************************************/
00480 uint32_t QEI_CalculateRPM(LPC_QEI_TypeDef *QEIx, uint32_t ulVelCapValue, uint32_t ulPPR)
00481 {
00482         uint64_t rpm, clock, Load, edges;
00483
00484         // Get current Clock rate for timer input
00485         clock = (uint64_t)CLKPWR_GetPCLK(CLKPWR_PCLKSEL_QEI);
00486         // Get Timer load value (velocity capture period)
00487         Load  = (uint64_t)(QEIx->QEILOAD + 1);
00488         // Get Edge
00489         edges = (uint64_t)((QEIx->QEICONF & QEI_CONF_CAPMODE) ? 4 : 2);
00490         // Calculate RPM
00491         rpm = ((clock * ulVelCapValue * 60) / (Load * ulPPR * edges));
00492
00493         return (uint32_t)(rpm);
00494 }
00495
00496
00501 #endif /* _QEI */
00502
00507 /* --------------------------------- End Of File ------------------------------ */
00508
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_qei.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_qei.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_qei.h                           2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_QEI_H_
00034 #define LPC17XX_QEI_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046 /* Public Macros -------------------------------------------------------------- */
00051 /* QEI Reset types */
00052 #define QEI_RESET_POS                   QEI_CON_RESP
00053 #define QEI_RESET_POSOnIDX              QEI_CON_RESPI
00054 #define QEI_RESET_VEL                   QEI_CON_RESV
00055 #define QEI_RESET_IDX                   QEI_CON_RESI
00057 /* QEI Direction Invert Type Option */
00058 #define QEI_DIRINV_NONE         ((uint32_t)(0))
00059 #define QEI_DIRINV_CMPL         ((uint32_t)(1))
00061 /* QEI Signal Mode Option */
00062 #define QEI_SIGNALMODE_QUAD             ((uint32_t)(0))
00063 #define QEI_SIGNALMODE_CLKDIR   ((uint32_t)(1))
00065 /* QEI Capture Mode Option */
00066 #define QEI_CAPMODE_2X                  ((uint32_t)(0))
00067 #define QEI_CAPMODE_4X                  ((uint32_t)(1))
00069 /* QEI Invert Index Signal Option */
00070 #define QEI_INVINX_NONE                 ((uint32_t)(0))
00071 #define QEI_INVINX_EN                   ((uint32_t)(1))
00073 /* QEI timer reload option */
00074 #define QEI_TIMERRELOAD_TICKVAL ((uint8_t)(0))
00075 #define QEI_TIMERRELOAD_USVAL   ((uint8_t)(1))
00077 /* QEI Flag Status type */
00078 #define QEI_STATUS_DIR                  ((uint32_t)(1<<0))
00080 /* QEI Compare Position channel option */
00081 #define QEI_COMPPOS_CH_0                        ((uint8_t)(0))
00082 #define QEI_COMPPOS_CH_1                        ((uint8_t)(1))
00083 #define QEI_COMPPOS_CH_2                        ((uint8_t)(2))
00085 /* QEI interrupt flag type */
00086 #define QEI_INTFLAG_INX_Int                     ((uint32_t)(1<<0))
00087 #define QEI_INTFLAG_TIM_Int                     ((uint32_t)(1<<1))
00088 #define QEI_INTFLAG_VELC_Int            ((uint32_t)(1<<2))
00089 #define QEI_INTFLAG_DIR_Int                     ((uint32_t)(1<<3))
00090 #define QEI_INTFLAG_ERR_Int                     ((uint32_t)(1<<4))
00091 #define QEI_INTFLAG_ENCLK_Int           ((uint32_t)(1<<5))
00092 #define QEI_INTFLAG_POS0_Int            ((uint32_t)(1<<6))
00094 #define QEI_INTFLAG_POS1_Int            ((uint32_t)(1<<7))
00096 #define QEI_INTFLAG_POS2_Int            ((uint32_t)(1<<8))
00098 #define QEI_INTFLAG_REV_Int                     ((uint32_t)(1<<9))
00100 #define QEI_INTFLAG_POS0REV_Int         ((uint32_t)(1<<10))
00101 #define QEI_INTFLAG_POS1REV_Int         ((uint32_t)(1<<11))
00102 #define QEI_INTFLAG_POS2REV_Int         ((uint32_t)(1<<12))
00109 /* Private Macros ------------------------------------------------------------- */
00110
00114 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00115 /* Quadrature Encoder Interface Control Register Definition --------------------- */
00116 /*********************************************************************/
00119 #define QEI_CON_RESP            ((uint32_t)(1<<0))
00120 #define QEI_CON_RESPI           ((uint32_t)(1<<1))
00121 #define QEI_CON_RESV            ((uint32_t)(1<<2))
00122 #define QEI_CON_RESI            ((uint32_t)(1<<3))
00123 #define QEI_CON_BITMASK         ((uint32_t)(0x0F))
00125 /*********************************************************************/
00128 #define QEI_CONF_DIRINV         ((uint32_t)(1<<0))
00129 #define QEI_CONF_SIGMODE        ((uint32_t)(1<<1))
00130 #define QEI_CONF_CAPMODE        ((uint32_t)(1<<2))
00131 #define QEI_CONF_INVINX         ((uint32_t)(1<<3))
00132 #define QEI_CONF_BITMASK        ((uint32_t)(0x0F))
00134 /*********************************************************************/
00137 #define QEI_STAT_DIR            ((uint32_t)(1<<0))
00138 #define QEI_STAT_BITMASK        ((uint32_t)(1<<0))
00140 /* Quadrature Encoder Interface Interrupt registers definitions --------------------- */
00141 /*********************************************************************/
00144 #define QEI_INTSTAT_INX_Int                     ((uint32_t)(1<<0))
00145 #define QEI_INTSTAT_TIM_Int                     ((uint32_t)(1<<1))
00146 #define QEI_INTSTAT_VELC_Int            ((uint32_t)(1<<2))
00147 #define QEI_INTSTAT_DIR_Int                     ((uint32_t)(1<<3))
00148 #define QEI_INTSTAT_ERR_Int                     ((uint32_t)(1<<4))
00149 #define QEI_INTSTAT_ENCLK_Int           ((uint32_t)(1<<5))
00150 #define QEI_INTSTAT_POS0_Int            ((uint32_t)(1<<6))
00152 #define QEI_INTSTAT_POS1_Int            ((uint32_t)(1<<7))
00154 #define QEI_INTSTAT_POS2_Int            ((uint32_t)(1<<8))
00156 #define QEI_INTSTAT_REV_Int                     ((uint32_t)(1<<9))
00158 #define QEI_INTSTAT_POS0REV_Int         ((uint32_t)(1<<10))
00160 #define QEI_INTSTAT_POS1REV_Int         ((uint32_t)(1<<11))
00162 #define QEI_INTSTAT_POS2REV_Int         ((uint32_t)(1<<12))
00164 #define QEI_INTSTAT_BITMASK                     ((uint32_t)(0x1FFF))
00166 /*********************************************************************/
00169 #define QEI_INTSET_INX_Int                      ((uint32_t)(1<<0))
00170 #define QEI_INTSET_TIM_Int                      ((uint32_t)(1<<1))
00171 #define QEI_INTSET_VELC_Int                     ((uint32_t)(1<<2))
00172 #define QEI_INTSET_DIR_Int                      ((uint32_t)(1<<3))
00173 #define QEI_INTSET_ERR_Int                      ((uint32_t)(1<<4))
00174 #define QEI_INTSET_ENCLK_Int            ((uint32_t)(1<<5))
00175 #define QEI_INTSET_POS0_Int                     ((uint32_t)(1<<6))
00177 #define QEI_INTSET_POS1_Int                     ((uint32_t)(1<<7))
00179 #define QEI_INTSET_POS2_Int                     ((uint32_t)(1<<8))
00181 #define QEI_INTSET_REV_Int                      ((uint32_t)(1<<9))
00183 #define QEI_INTSET_POS0REV_Int          ((uint32_t)(1<<10))
00184 #define QEI_INTSET_POS1REV_Int          ((uint32_t)(1<<11))
00185 #define QEI_INTSET_POS2REV_Int          ((uint32_t)(1<<12))
00186 #define QEI_INTSET_BITMASK                      ((uint32_t)(0x1FFF))
00188 /*********************************************************************/
00191 #define QEI_INTCLR_INX_Int                      ((uint32_t)(1<<0))
00192 #define QEI_INTCLR_TIM_Int                      ((uint32_t)(1<<1))
00193 #define QEI_INTCLR_VELC_Int                     ((uint32_t)(1<<2))
00194 #define QEI_INTCLR_DIR_Int                      ((uint32_t)(1<<3))
00195 #define QEI_INTCLR_ERR_Int                      ((uint32_t)(1<<4))
00196 #define QEI_INTCLR_ENCLK_Int            ((uint32_t)(1<<5))
00197 #define QEI_INTCLR_POS0_Int                     ((uint32_t)(1<<6))
00199 #define QEI_INTCLR_POS1_Int                     ((uint32_t)(1<<7))
00201 #define QEI_INTCLR_POS2_Int                     ((uint32_t)(1<<8))
00203 #define QEI_INTCLR_REV_Int                      ((uint32_t)(1<<9))
00205 #define QEI_INTCLR_POS0REV_Int          ((uint32_t)(1<<10))
00206 #define QEI_INTCLR_POS1REV_Int          ((uint32_t)(1<<11))
00207 #define QEI_INTCLR_POS2REV_Int          ((uint32_t)(1<<12))
00208 #define QEI_INTCLR_BITMASK                      ((uint32_t)(0x1FFF))
00210 /*********************************************************************/
00213 #define QEI_INTEN_INX_Int                       ((uint32_t)(1<<0))
00214 #define QEI_INTEN_TIM_Int                       ((uint32_t)(1<<1))
00215 #define QEI_INTEN_VELC_Int                      ((uint32_t)(1<<2))
00216 #define QEI_INTEN_DIR_Int                       ((uint32_t)(1<<3))
00217 #define QEI_INTEN_ERR_Int                       ((uint32_t)(1<<4))
00218 #define QEI_INTEN_ENCLK_Int                     ((uint32_t)(1<<5))
00219 #define QEI_INTEN_POS0_Int                      ((uint32_t)(1<<6))
00221 #define QEI_INTEN_POS1_Int                      ((uint32_t)(1<<7))
00223 #define QEI_INTEN_POS2_Int                      ((uint32_t)(1<<8))
00225 #define QEI_INTEN_REV_Int                       ((uint32_t)(1<<9))
00227 #define QEI_INTEN_POS0REV_Int           ((uint32_t)(1<<10))
00228 #define QEI_INTEN_POS1REV_Int           ((uint32_t)(1<<11))
00229 #define QEI_INTEN_POS2REV_Int           ((uint32_t)(1<<12))
00230 #define QEI_INTEN_BITMASK                       ((uint32_t)(0x1FFF))
00232 /*********************************************************************/
00235 #define QEI_IESET_INX_Int                       ((uint32_t)(1<<0))
00236 #define QEI_IESET_TIM_Int                       ((uint32_t)(1<<1))
00237 #define QEI_IESET_VELC_Int                      ((uint32_t)(1<<2))
00238 #define QEI_IESET_DIR_Int                       ((uint32_t)(1<<3))
00239 #define QEI_IESET_ERR_Int                       ((uint32_t)(1<<4))
00240 #define QEI_IESET_ENCLK_Int                     ((uint32_t)(1<<5))
00241 #define QEI_IESET_POS0_Int                      ((uint32_t)(1<<6))
00243 #define QEI_IESET_POS1_Int                      ((uint32_t)(1<<7))
00245 #define QEI_IESET_POS2_Int                      ((uint32_t)(1<<8))
00247 #define QEI_IESET_REV_Int                       ((uint32_t)(1<<9))
00249 #define QEI_IESET_POS0REV_Int           ((uint32_t)(1<<10))
00250 #define QEI_IESET_POS1REV_Int           ((uint32_t)(1<<11))
00251 #define QEI_IESET_POS2REV_Int           ((uint32_t)(1<<12))
00252 #define QEI_IESET_BITMASK                       ((uint32_t)(0x1FFF))
00254 /*********************************************************************/
00257 #define QEI_IECLR_INX_Int                       ((uint32_t)(1<<0))
00258 #define QEI_IECLR_TIM_Int                       ((uint32_t)(1<<1))
00259 #define QEI_IECLR_VELC_Int                      ((uint32_t)(1<<2))
00260 #define QEI_IECLR_DIR_Int                       ((uint32_t)(1<<3))
00261 #define QEI_IECLR_ERR_Int                       ((uint32_t)(1<<4))
00262 #define QEI_IECLR_ENCLK_Int                     ((uint32_t)(1<<5))
00263 #define QEI_IECLR_POS0_Int                      ((uint32_t)(1<<6))
00265 #define QEI_IECLR_POS1_Int                      ((uint32_t)(1<<7))
00267 #define QEI_IECLR_POS2_Int                      ((uint32_t)(1<<8))
00269 #define QEI_IECLR_REV_Int                       ((uint32_t)(1<<9))
00271 #define QEI_IECLR_POS0REV_Int           ((uint32_t)(1<<10))
00272 #define QEI_IECLR_POS1REV_Int           ((uint32_t)(1<<11))
00273 #define QEI_IECLR_POS2REV_Int           ((uint32_t)(1<<12))
00274 #define QEI_IECLR_BITMASK                       ((uint32_t)(0x1FFF))
00277 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00278 /* Macro check QEI peripheral */
00279 #define PARAM_QEIx(n)   ((n==LPC_QEI))
00280
00281 /* Macro check QEI reset type */
00282 #define PARAM_QEI_RESET(n)      ((n==QEI_CON_RESP) \
00283 || (n==QEI_RESET_POSOnIDX) \
00284 || (n==QEI_RESET_VEL) \
00285 || (n==QEI_RESET_IDX))
00286
00287 /* Macro check QEI Direction invert mode */
00288 #define PARAM_QEI_DIRINV(n)     ((n==QEI_DIRINV_NONE) || (n==QEI_DIRINV_CMPL))
00289
00290 /* Macro check QEI signal mode */
00291 #define PARAM_QEI_SIGNALMODE(n) ((n==QEI_SIGNALMODE_QUAD) || (n==QEI_SIGNALMODE_CLKDIR))
00292
00293 /* Macro check QEI Capture mode */
00294 #define PARAM_QEI_CAPMODE(n)    ((n==QEI_CAPMODE_2X) || (n==QEI_CAPMODE_4X))
00295
00296 /* Macro check QEI Invert index mode */
00297 #define PARAM_QEI_INVINX(n)             ((n==QEI_INVINX_NONE) || (n==QEI_INVINX_EN))
00298
00299 /* Macro check QEI Direction invert mode */
00300 #define PARAM_QEI_TIMERRELOAD(n)        ((n==QEI_TIMERRELOAD_TICKVAL) || (n==QEI_TIMERRELOAD_USVAL))
00301
00302 /* Macro check QEI status type */
00303 #define PARAM_QEI_STATUS(n)             ((n==QEI_STATUS_DIR))
00304
00305 /* Macro check QEI combine position type */
00306 #define PARAM_QEI_COMPPOS_CH(n)         ((n==QEI_COMPPOS_CH_0) || (n==QEI_COMPPOS_CH_1) || (n==QEI_COMPPOS_CH_2))
00307
00308 /* Macro check QEI interrupt flag type */
00309 #define PARAM_QEI_INTFLAG(n)    ((n==QEI_INTFLAG_INX_Int) \
00310 || (n==QEI_INTFLAG_TIM_Int) \
00311 || (n==QEI_INTFLAG_VELC_Int) \
00312 || (n==QEI_INTFLAG_DIR_Int) \
00313 || (n==QEI_INTFLAG_ERR_Int) \
00314 || (n==QEI_INTFLAG_ENCLK_Int) \
00315 || (n==QEI_INTFLAG_POS0_Int) \
00316 || (n==QEI_INTFLAG_POS1_Int) \
00317 || (n==QEI_INTFLAG_POS2_Int) \
00318 || (n==QEI_INTFLAG_REV_Int) \
00319 || (n==QEI_INTFLAG_POS0REV_Int) \
00320 || (n==QEI_INTFLAG_POS1REV_Int) \
00321 || (n==QEI_INTFLAG_POS2REV_Int))
00322
00326 /* Public Types --------------------------------------------------------------- */
00334 typedef struct {
00335         uint32_t DirectionInvert        :1;
00339         uint32_t SignalMode                     :1;
00343         uint32_t CaptureMode            :1;
00347         uint32_t InvertIndex            :1;
00351 } QEI_CFG_Type;
00352
00356 typedef struct {
00357
00358         uint8_t ReloadOption;
00362         uint8_t Reserved[3];
00363         uint32_t ReloadValue;
00366 } QEI_RELOADCFG_Type;
00367
00376 /* Public Functions ----------------------------------------------------------- */
00381 void QEI_Reset(LPC_QEI_TypeDef *QEIx, uint32_t ulResetType);
00382 void QEI_Init(LPC_QEI_TypeDef *QEIx, QEI_CFG_Type *QEI_ConfigStruct);
00383 void QEI_ConfigStructInit(QEI_CFG_Type *QIE_InitStruct);
00384 void QEI_DeInit(LPC_QEI_TypeDef *QEIx);
00385 FlagStatus QEI_GetStatus(LPC_QEI_TypeDef *QEIx, uint32_t ulFlagType);
00386 uint32_t QEI_GetPosition(LPC_QEI_TypeDef *QEIx);
00387 void QEI_SetMaxPosition(LPC_QEI_TypeDef *QEIx, uint32_t ulMaxPos);
00388 void QEI_SetPositionComp(LPC_QEI_TypeDef *QEIx, uint8_t bPosCompCh, uint32_t ulPosComp);
00389 uint32_t QEI_GetIndex(LPC_QEI_TypeDef *QEIx);
00390 void QEI_SetIndexComp(LPC_QEI_TypeDef *QEIx, uint32_t ulIndexComp);
00391 void QEI_SetTimerReload(LPC_QEI_TypeDef *QEIx, QEI_RELOADCFG_Type *QEIReloadStruct);
00392 uint32_t QEI_GetTimer(LPC_QEI_TypeDef *QEIx);
00393 uint32_t QEI_GetVelocity(LPC_QEI_TypeDef *QEIx);
00394 uint32_t QEI_GetVelocityCap(LPC_QEI_TypeDef *QEIx);
00395 void QEI_SetVelocityComp(LPC_QEI_TypeDef *QEIx, uint32_t ulVelComp);
00396 void QEI_SetDigiFilter(LPC_QEI_TypeDef *QEIx, uint32_t ulSamplingPulse);
00397 FlagStatus QEI_GetIntStatus(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType);
00398 void QEI_IntCmd(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType, FunctionalState NewState);
00399 void QEI_IntSet(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType);
00400 void QEI_IntClear(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType);
00401 uint32_t QEI_CalculateRPM(LPC_QEI_TypeDef *QEIx, uint32_t ulVelCapValue, uint32_t ulPPR);
00402
00403
00408 #ifdef __cplusplus
00409 }
00410 #endif
00411
00412 #endif /* LPC17XX_QEI_H_ */
00413
00418 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_rit.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_rit.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_rit.c                           2010-05-21
00003 */
00026 /* Peripheral group ----------------------------------------------------------- */
00031 /* Includes ------------------------------------------------------------------- */
00032 #include "lpc17xx_rit.h"
00033 #include "lpc17xx_clkpwr.h"
00034
00035 /* If this source file built with example, the LPC17xx FW library configuration
00036  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00037  * otherwise the default FW library configuration file must be included instead
00038  */
00039 #ifdef __BUILD_WITH_EXAMPLE__
00040 #include "lpc17xx_libcfg.h"
00041 #else
00042 #include "lpc17xx_libcfg_default.h"
00043 #endif /* __BUILD_WITH_EXAMPLE__ */
00044
00045 #ifdef _RIT
00046
00047 /* Public Functions ----------------------------------------------------------- */
00052 /******************************************************************************//*
00053  * @brief               Initial for RIT
00054  *                                      - Turn on power and clock
00055  *                                      - Setup default register values
00056  * @param[in]   RITx is RIT peripheral selected, should be: LPC_RIT
00057  * @return              None
00058  *******************************************************************************/
00059 void RIT_Init(LPC_RIT_TypeDef *RITx)
00060 {
00061         CHECK_PARAM(PARAM_RITx(RITx));
00062         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCRIT, ENABLE);
00063         //Set up default register values
00064         RITx->RICOMPVAL = 0xFFFFFFFF;
00065         RITx->RIMASK    = 0x00000000;
00066         RITx->RICTRL    = 0x0C;
00067         RITx->RICOUNTER = 0x00000000;
00068         // Turn on power and clock
00069
00070 }
00071 /******************************************************************************//*
00072  * @brief               DeInitial for RIT
00073  *                                      - Turn off power and clock
00074  *                                      - ReSetup default register values
00075  * @param[in]   RITx is RIT peripheral selected, should be: LPC_RIT
00076  * @return              None
00077  *******************************************************************************/
00078 void RIT_DeInit(LPC_RIT_TypeDef *RITx)
00079 {
00080         CHECK_PARAM(PARAM_RITx(RITx));
00081
00082         // Turn off power and clock
00083         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCRIT, DISABLE);
00084         //ReSetup default register values
00085         RITx->RICOMPVAL = 0xFFFFFFFF;
00086         RITx->RIMASK    = 0x00000000;
00087         RITx->RICTRL    = 0x0C;
00088         RITx->RICOUNTER = 0x00000000;
00089 }
00090
00091 /******************************************************************************//*
00092  * @brief               Set compare value, mask value and time counter value
00093  * @param[in]   RITx is RIT peripheral selected, should be: LPC_RIT
00094  * @param[in]   time_interval: timer interval value (ms)
00095  * @return              None
00096  *******************************************************************************/
00097 void RIT_TimerConfig(LPC_RIT_TypeDef *RITx, uint32_t time_interval)
00098 {
00099         uint32_t clock_rate, cmp_value;
00100         CHECK_PARAM(PARAM_RITx(RITx));
00101
00102         // Get PCLK value of RIT
00103         clock_rate = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_RIT);
00104
00105         /* calculate compare value for RIT to generate interrupt at
00106          * specified time interval
00107          * COMPVAL = (RIT_PCLK * time_interval)/1000
00108          * (with time_interval unit is millisecond)
00109          */
00110         cmp_value = (clock_rate /1000) * time_interval;
00111         RITx->RICOMPVAL = cmp_value;
00112
00113         /* Set timer enable clear bit to clear timer to 0 whenever
00114          * counter value equals the contents of RICOMPVAL
00115          */
00116         RITx->RICTRL |= (1<<1);
00117 }
00118
00119
00120 /******************************************************************************//*
00121  * @brief               Enable/Disable Timer
00122  * @param[in]   RITx is RIT peripheral selected, should be: LPC_RIT
00123  * @param[in]   NewState        New State of this function
00124  *                                      -ENABLE: Enable Timer
00125  *                                      -DISABLE: Disable Timer
00126  * @return              None
00127  *******************************************************************************/
00128 void RIT_Cmd(LPC_RIT_TypeDef *RITx, FunctionalState NewState)
00129 {
00130         CHECK_PARAM(PARAM_RITx(RITx));
00131         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00132
00133         //Enable or Disable Timer
00134         if(NewState==ENABLE)
00135         {
00136                 RITx->RICTRL |= RIT_CTRL_TEN;
00137         }
00138         else
00139         {
00140                 RITx->RICTRL &= ~RIT_CTRL_TEN;
00141         }
00142 }
00143
00144 /******************************************************************************//*
00145  * @brief               Timer Enable/Disable on debug
00146  * @param[in]   RITx is RIT peripheral selected, should be: LPC_RIT
00147  * @param[in]   NewState        New State of this function
00148  *                                      -ENABLE: The timer is halted whenever a hardware break condition occurs
00149  *                                      -DISABLE: Hardware break has no effect on the timer operation
00150  * @return              None
00151  *******************************************************************************/
00152 void RIT_TimerDebugCmd(LPC_RIT_TypeDef *RITx, FunctionalState NewState)
00153 {
00154         CHECK_PARAM(PARAM_RITx(RITx));
00155         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00156
00157         //Timer Enable/Disable on break
00158         if(NewState==ENABLE)
00159         {
00160                 RITx->RICTRL |= RIT_CTRL_ENBR;
00161         }
00162         else
00163         {
00164                 RITx->RICTRL &= ~RIT_CTRL_ENBR;
00165         }
00166 }
00167 /******************************************************************************//*
00168  * @brief               Check whether interrupt flag is set or not
00169  * @param[in]   RITx is RIT peripheral selected, should be: LPC_RIT
00170  * @return              Current interrupt status, could be: SET/RESET
00171  *******************************************************************************/
00172 IntStatus RIT_GetIntStatus(LPC_RIT_TypeDef *RITx)
00173 {
00174         IntStatus result;
00175         CHECK_PARAM(PARAM_RITx(RITx));
00176         if((RITx->RICTRL&RIT_CTRL_INTEN)==1)    result= SET;
00177         else return RESET;
00178         //clear interrupt flag
00179         RITx->RICTRL |= RIT_CTRL_INTEN;
00180         return result;
00181 }
00182
00187 #endif /* _RIT */
00188
00193 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rit.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rit.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_rit.h                           2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_RIT_H_
00034 #define LPC17XX_RIT_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046
00047 /* Private Macros ------------------------------------------------------------- */
00052 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00053 /*********************************************************************/
00057 #define RIT_CTRL_INTEN  ((uint32_t) (1))
00058
00059 #define RIT_CTRL_ENCLR  ((uint32_t) _BIT(1))
00060
00061 #define RIT_CTRL_ENBR   ((uint32_t) _BIT(2))
00062
00063 #define RIT_CTRL_TEN    ((uint32_t) _BIT(3))
00064
00066 #define PARAM_RITx(n)   (((uint32_t *)n)==((uint32_t *)LPC_RIT))
00067
00073 /* Public Functions ----------------------------------------------------------- */
00077 /* RIT Init/DeInit functions */
00078 void RIT_Init(LPC_RIT_TypeDef *RITx);
00079 void RIT_DeInit(LPC_RIT_TypeDef *RITx);
00080
00081 /* RIT config timer functions */
00082 void RIT_TimerConfig(LPC_RIT_TypeDef *RITx, uint32_t time_interval);
00083
00084 /* Enable/Disable RIT functions */
00085 void RIT_TimerClearCmd(LPC_RIT_TypeDef *RITx, FunctionalState NewState);
00086 void RIT_Cmd(LPC_RIT_TypeDef *RITx, FunctionalState NewState);
00087 void RIT_TimerDebugCmd(LPC_RIT_TypeDef *RITx, FunctionalState NewState);
00088
00089 /* RIT Interrupt functions */
00090 IntStatus RIT_GetIntStatus(LPC_RIT_TypeDef *RITx);
00091
00096 #ifdef __cplusplus
00097 }
00098 #endif
00099
00100 #endif /* LPC17XX_RIT_H_ */
00101
00106 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_rtc.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_rtc.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_rtc.c                           2011-06-06
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_rtc.h"
00034 #include "lpc17xx_clkpwr.h"
00035
00036
00037 /* If this source file built with example, the LPC17xx FW library configuration
00038  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00039  * otherwise the default FW library configuration file must be included instead
00040  */
00041 #ifdef __BUILD_WITH_EXAMPLE__
00042 #include "lpc17xx_libcfg.h"
00043 #else
00044 #include "lpc17xx_libcfg_default.h"
00045 #endif /* __BUILD_WITH_EXAMPLE__ */
00046
00047
00048 #ifdef _RTC
00049
00050 /* Public Functions ----------------------------------------------------------- */
00055 /********************************************************************/
00060 void RTC_Init (LPC_RTC_TypeDef *RTCx)
00061 {
00062         CHECK_PARAM(PARAM_RTCx(RTCx));
00063
00064         /* Set up clock and power for RTC module */
00065         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCRTC, ENABLE);
00066
00067         // Clear all register to be default
00068         RTCx->ILR = 0x00;
00069         RTCx->CCR = 0x00;
00070         RTCx->CIIR = 0x00;
00071         RTCx->AMR = 0xFF;
00072         RTCx->CALIBRATION = 0x00;
00073 }
00074
00075
00076 /*********************************************************************/
00082 void RTC_DeInit(LPC_RTC_TypeDef *RTCx)
00083 {
00084         CHECK_PARAM(PARAM_RTCx(RTCx));
00085
00086         RTCx->CCR = 0x00;
00087         // Disable power and clock for RTC module
00088         CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCRTC, DISABLE);
00089 }
00090
00091 /*********************************************************************/
00096 void RTC_ResetClockTickCounter(LPC_RTC_TypeDef *RTCx)
00097 {
00098         CHECK_PARAM(PARAM_RTCx(RTCx));
00099
00100         RTCx->CCR |= RTC_CCR_CTCRST;
00101         RTCx->CCR &= (~RTC_CCR_CTCRST) & RTC_CCR_BITMASK;
00102 }
00103
00104 /*********************************************************************/
00112 void RTC_Cmd (LPC_RTC_TypeDef *RTCx, FunctionalState NewState)
00113 {
00114         CHECK_PARAM(PARAM_RTCx(RTCx));
00115         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00116
00117         if (NewState == ENABLE)
00118         {
00119                 RTCx->CCR |= RTC_CCR_CLKEN;
00120         }
00121         else
00122         {
00123                 RTCx->CCR &= (~RTC_CCR_CLKEN) & RTC_CCR_BITMASK;
00124         }
00125 }
00126
00127
00128 /*********************************************************************/
00150 void RTC_CntIncrIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t CntIncrIntType, \
00151                                                                 FunctionalState NewState)
00152 {
00153         CHECK_PARAM(PARAM_RTCx(RTCx));
00154         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00155         CHECK_PARAM(PARAM_RTC_TIMETYPE(CntIncrIntType));
00156
00157         if (NewState ==  ENABLE)
00158         {
00159                 switch (CntIncrIntType)
00160                 {
00161                 case RTC_TIMETYPE_SECOND:
00162                         RTCx->CIIR |= RTC_CIIR_IMSEC;
00163                         break;
00164                 case RTC_TIMETYPE_MINUTE:
00165                         RTCx->CIIR |= RTC_CIIR_IMMIN;
00166                         break;
00167                 case RTC_TIMETYPE_HOUR:
00168                         RTCx->CIIR |= RTC_CIIR_IMHOUR;
00169                         break;
00170                 case RTC_TIMETYPE_DAYOFWEEK:
00171                         RTCx->CIIR |= RTC_CIIR_IMDOW;
00172                         break;
00173                 case RTC_TIMETYPE_DAYOFMONTH:
00174                         RTCx->CIIR |= RTC_CIIR_IMDOM;
00175                         break;
00176                 case RTC_TIMETYPE_DAYOFYEAR:
00177                         RTCx->CIIR |= RTC_CIIR_IMDOY;
00178                         break;
00179                 case RTC_TIMETYPE_MONTH:
00180                         RTCx->CIIR |= RTC_CIIR_IMMON;
00181                         break;
00182                 case RTC_TIMETYPE_YEAR:
00183                         RTCx->CIIR |= RTC_CIIR_IMYEAR;
00184                         break;
00185                 }
00186         }
00187         else
00188         {
00189                 switch (CntIncrIntType)
00190                 {
00191                 case RTC_TIMETYPE_SECOND:
00192                         RTCx->CIIR &= (~RTC_CIIR_IMSEC) & RTC_CIIR_BITMASK;
00193                         break;
00194                 case RTC_TIMETYPE_MINUTE:
00195                         RTCx->CIIR &= (~RTC_CIIR_IMMIN) & RTC_CIIR_BITMASK;
00196                         break;
00197                 case RTC_TIMETYPE_HOUR:
00198                         RTCx->CIIR &= (~RTC_CIIR_IMHOUR) & RTC_CIIR_BITMASK;
00199                         break;
00200                 case RTC_TIMETYPE_DAYOFWEEK:
00201                         RTCx->CIIR &= (~RTC_CIIR_IMDOW) & RTC_CIIR_BITMASK;
00202                         break;
00203                 case RTC_TIMETYPE_DAYOFMONTH:
00204                         RTCx->CIIR &= (~RTC_CIIR_IMDOM) & RTC_CIIR_BITMASK;
00205                         break;
00206                 case RTC_TIMETYPE_DAYOFYEAR:
00207                         RTCx->CIIR &= (~RTC_CIIR_IMDOY) & RTC_CIIR_BITMASK;
00208                         break;
00209                 case RTC_TIMETYPE_MONTH:
00210                         RTCx->CIIR &= (~RTC_CIIR_IMMON) & RTC_CIIR_BITMASK;
00211                         break;
00212                 case RTC_TIMETYPE_YEAR:
00213                         RTCx->CIIR &= (~RTC_CIIR_IMYEAR) & RTC_CIIR_BITMASK;
00214                         break;
00215                 }
00216         }
00217 }
00218
00219
00220 /*********************************************************************/
00242 void RTC_AlarmIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t AlarmTimeType, \
00243                                                                 FunctionalState NewState)
00244 {
00245         CHECK_PARAM(PARAM_RTCx(RTCx));
00246         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00247         CHECK_PARAM(PARAM_RTC_TIMETYPE(AlarmTimeType));
00248
00249         if (NewState == ENABLE)
00250         {
00251                 switch (AlarmTimeType)
00252                 {
00253                 case RTC_TIMETYPE_SECOND:
00254                         RTCx->AMR &= (~RTC_AMR_AMRSEC) & RTC_AMR_BITMASK;
00255                         break;
00256                 case RTC_TIMETYPE_MINUTE:
00257                         RTCx->AMR &= (~RTC_AMR_AMRMIN) & RTC_AMR_BITMASK;
00258                         break;
00259                 case RTC_TIMETYPE_HOUR:
00260                         RTCx->AMR &= (~RTC_AMR_AMRHOUR) & RTC_AMR_BITMASK;
00261                         break;
00262                 case RTC_TIMETYPE_DAYOFWEEK:
00263                         RTCx->AMR &= (~RTC_AMR_AMRDOW) & RTC_AMR_BITMASK;
00264                         break;
00265                 case RTC_TIMETYPE_DAYOFMONTH:
00266                         RTCx->AMR &= (~RTC_AMR_AMRDOM) & RTC_AMR_BITMASK;
00267                         break;
00268                 case RTC_TIMETYPE_DAYOFYEAR:
00269                         RTCx->AMR &= (~RTC_AMR_AMRDOY) & RTC_AMR_BITMASK;
00270                         break;
00271                 case RTC_TIMETYPE_MONTH:
00272                         RTCx->AMR &= (~RTC_AMR_AMRMON) & RTC_AMR_BITMASK;
00273                         break;
00274                 case RTC_TIMETYPE_YEAR:
00275                         RTCx->AMR &= (~RTC_AMR_AMRYEAR) & RTC_AMR_BITMASK;
00276                         break;
00277                 }
00278         }
00279         else
00280         {
00281                 switch (AlarmTimeType)
00282                 {
00283                 case RTC_TIMETYPE_SECOND:
00284                         RTCx->AMR |= (RTC_AMR_AMRSEC);
00285                         break;
00286                 case RTC_TIMETYPE_MINUTE:
00287                         RTCx->AMR |= (RTC_AMR_AMRMIN);
00288                         break;
00289                 case RTC_TIMETYPE_HOUR:
00290                         RTCx->AMR |= (RTC_AMR_AMRHOUR);
00291                         break;
00292                 case RTC_TIMETYPE_DAYOFWEEK:
00293                         RTCx->AMR |= (RTC_AMR_AMRDOW);
00294                         break;
00295                 case RTC_TIMETYPE_DAYOFMONTH:
00296                         RTCx->AMR |= (RTC_AMR_AMRDOM);
00297                         break;
00298                 case RTC_TIMETYPE_DAYOFYEAR:
00299                         RTCx->AMR |= (RTC_AMR_AMRDOY);
00300                         break;
00301                 case RTC_TIMETYPE_MONTH:
00302                         RTCx->AMR |= (RTC_AMR_AMRMON);
00303                         break;
00304                 case RTC_TIMETYPE_YEAR:
00305                         RTCx->AMR |= (RTC_AMR_AMRYEAR);
00306                         break;
00307                 }
00308         }
00309 }
00310
00311
00312 /*********************************************************************/
00327 void RTC_SetTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t TimeValue)
00328 {
00329         CHECK_PARAM(PARAM_RTCx(RTCx));
00330         CHECK_PARAM(PARAM_RTC_TIMETYPE(Timetype));
00331
00332         switch ( Timetype)
00333         {
00334         case RTC_TIMETYPE_SECOND:
00335                 CHECK_PARAM(TimeValue <= RTC_SECOND_MAX);
00336
00337                 RTCx->SEC = TimeValue & RTC_SEC_MASK;
00338                 break;
00339
00340         case RTC_TIMETYPE_MINUTE:
00341                 CHECK_PARAM(TimeValue <= RTC_MINUTE_MAX);
00342
00343                 RTCx->MIN = TimeValue & RTC_MIN_MASK;
00344                 break;
00345
00346         case RTC_TIMETYPE_HOUR:
00347                 CHECK_PARAM(TimeValue <= RTC_HOUR_MAX);
00348
00349                 RTCx->HOUR = TimeValue & RTC_HOUR_MASK;
00350                 break;
00351
00352         case RTC_TIMETYPE_DAYOFWEEK:
00353                 CHECK_PARAM(TimeValue <= RTC_DAYOFWEEK_MAX);
00354
00355                 RTCx->DOW = TimeValue & RTC_DOW_MASK;
00356                 break;
00357
00358         case RTC_TIMETYPE_DAYOFMONTH:
00359                 CHECK_PARAM((TimeValue <= RTC_DAYOFMONTH_MAX) \
00360                                 && (TimeValue >= RTC_DAYOFMONTH_MIN));
00361
00362                 RTCx->DOM = TimeValue & RTC_DOM_MASK;
00363                 break;
00364
00365         case RTC_TIMETYPE_DAYOFYEAR:
00366                 CHECK_PARAM((TimeValue >= RTC_DAYOFYEAR_MIN) \
00367                                 && (TimeValue <= RTC_DAYOFYEAR_MAX));
00368
00369                 RTCx->DOY = TimeValue & RTC_DOY_MASK;
00370                 break;
00371
00372         case RTC_TIMETYPE_MONTH:
00373                 CHECK_PARAM((TimeValue >= RTC_MONTH_MIN) \
00374                                 && (TimeValue <= RTC_MONTH_MAX));
00375
00376                 RTCx->MONTH = TimeValue & RTC_MONTH_MASK;
00377                 break;
00378
00379         case RTC_TIMETYPE_YEAR:
00380                 CHECK_PARAM(TimeValue <= RTC_YEAR_MAX);
00381
00382                 RTCx->YEAR = TimeValue & RTC_YEAR_MASK;
00383                 break;
00384         }
00385 }
00386
00387 /*********************************************************************/
00401 uint32_t RTC_GetTime(LPC_RTC_TypeDef *RTCx, uint32_t Timetype)
00402 {
00403         CHECK_PARAM(PARAM_RTCx(RTCx));
00404         CHECK_PARAM(PARAM_RTC_TIMETYPE(Timetype));
00405
00406         switch (Timetype)
00407         {
00408         case RTC_TIMETYPE_SECOND:
00409                 return (RTCx->SEC & RTC_SEC_MASK);
00410         case RTC_TIMETYPE_MINUTE:
00411                 return (RTCx->MIN & RTC_MIN_MASK);
00412         case RTC_TIMETYPE_HOUR:
00413                 return (RTCx->HOUR & RTC_HOUR_MASK);
00414         case RTC_TIMETYPE_DAYOFWEEK:
00415                 return (RTCx->DOW & RTC_DOW_MASK);
00416         case RTC_TIMETYPE_DAYOFMONTH:
00417                 return (RTCx->DOM & RTC_DOM_MASK);
00418         case RTC_TIMETYPE_DAYOFYEAR:
00419                 return (RTCx->DOY & RTC_DOY_MASK);
00420         case RTC_TIMETYPE_MONTH:
00421                 return (RTCx->MONTH & RTC_MONTH_MASK);
00422         case RTC_TIMETYPE_YEAR:
00423                 return (RTCx->YEAR & RTC_YEAR_MASK);
00424         default:
00425                 return (0);
00426         }
00427 }
00428
00429
00430 /*********************************************************************/
00437 void RTC_SetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
00438 {
00439         CHECK_PARAM(PARAM_RTCx(RTCx));
00440
00441         RTCx->DOM = pFullTime->DOM & RTC_DOM_MASK;
00442         RTCx->DOW = pFullTime->DOW & RTC_DOW_MASK;
00443         RTCx->DOY = pFullTime->DOY & RTC_DOY_MASK;
00444         RTCx->HOUR = pFullTime->HOUR & RTC_HOUR_MASK;
00445         RTCx->MIN = pFullTime->MIN & RTC_MIN_MASK;
00446         RTCx->SEC = pFullTime->SEC & RTC_SEC_MASK;
00447         RTCx->MONTH = pFullTime->MONTH & RTC_MONTH_MASK;
00448         RTCx->YEAR = pFullTime->YEAR & RTC_YEAR_MASK;
00449 }
00450
00451
00452 /*********************************************************************/
00459 void RTC_GetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
00460 {
00461         CHECK_PARAM(PARAM_RTCx(RTCx));
00462
00463         pFullTime->DOM = RTCx->DOM & RTC_DOM_MASK;
00464         pFullTime->DOW = RTCx->DOW & RTC_DOW_MASK;
00465         pFullTime->DOY = RTCx->DOY & RTC_DOY_MASK;
00466         pFullTime->HOUR = RTCx->HOUR & RTC_HOUR_MASK;
00467         pFullTime->MIN = RTCx->MIN & RTC_MIN_MASK;
00468         pFullTime->SEC = RTCx->SEC & RTC_SEC_MASK;
00469         pFullTime->MONTH = RTCx->MONTH & RTC_MONTH_MASK;
00470         pFullTime->YEAR = RTCx->YEAR & RTC_YEAR_MASK;
00471 }
00472
00473
00474 /*********************************************************************/
00489 void RTC_SetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t ALValue)
00490 {
00491         CHECK_PARAM(PARAM_RTCx(RTCx));
00492
00493         switch (Timetype)
00494         {
00495         case RTC_TIMETYPE_SECOND:
00496                 CHECK_PARAM(ALValue <= RTC_SECOND_MAX);
00497
00498                 RTCx->ALSEC = ALValue & RTC_SEC_MASK;
00499                 break;
00500
00501         case RTC_TIMETYPE_MINUTE:
00502                 CHECK_PARAM(ALValue <= RTC_MINUTE_MAX);
00503
00504                 RTCx->ALMIN = ALValue & RTC_MIN_MASK;
00505                 break;
00506
00507         case RTC_TIMETYPE_HOUR:
00508                 CHECK_PARAM(ALValue <= RTC_HOUR_MAX);
00509
00510                 RTCx->ALHOUR = ALValue & RTC_HOUR_MASK;
00511                 break;
00512
00513         case RTC_TIMETYPE_DAYOFWEEK:
00514                 CHECK_PARAM(ALValue <= RTC_DAYOFWEEK_MAX);
00515
00516                 RTCx->ALDOW = ALValue & RTC_DOW_MASK;
00517                 break;
00518
00519         case RTC_TIMETYPE_DAYOFMONTH:
00520                 CHECK_PARAM((ALValue <= RTC_DAYOFMONTH_MAX) \
00521                                 && (ALValue >= RTC_DAYOFMONTH_MIN));
00522
00523                 RTCx->ALDOM = ALValue & RTC_DOM_MASK;
00524                 break;
00525
00526         case RTC_TIMETYPE_DAYOFYEAR:
00527                 CHECK_PARAM((ALValue >= RTC_DAYOFYEAR_MIN) \
00528                                 && (ALValue <= RTC_DAYOFYEAR_MAX));
00529
00530                 RTCx->ALDOY = ALValue & RTC_DOY_MASK;
00531                 break;
00532
00533         case RTC_TIMETYPE_MONTH:
00534                 CHECK_PARAM((ALValue >= RTC_MONTH_MIN) \
00535                                 && (ALValue <= RTC_MONTH_MAX));
00536
00537                 RTCx->ALMON = ALValue & RTC_MONTH_MASK;
00538                 break;
00539
00540         case RTC_TIMETYPE_YEAR:
00541                 CHECK_PARAM(ALValue <= RTC_YEAR_MAX);
00542
00543                 RTCx->ALYEAR = ALValue & RTC_YEAR_MASK;
00544                 break;
00545         }
00546 }
00547
00548
00549
00550 /*********************************************************************/
00564 uint32_t RTC_GetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype)
00565 {
00566         switch (Timetype)
00567         {
00568         case RTC_TIMETYPE_SECOND:
00569                 return (RTCx->ALSEC & RTC_SEC_MASK);
00570         case RTC_TIMETYPE_MINUTE:
00571                 return (RTCx->ALMIN & RTC_MIN_MASK);
00572         case RTC_TIMETYPE_HOUR:
00573                 return (RTCx->ALHOUR & RTC_HOUR_MASK);
00574         case RTC_TIMETYPE_DAYOFWEEK:
00575                 return (RTCx->ALDOW & RTC_DOW_MASK);
00576         case RTC_TIMETYPE_DAYOFMONTH:
00577                 return (RTCx->ALDOM & RTC_DOM_MASK);
00578         case RTC_TIMETYPE_DAYOFYEAR:
00579                 return (RTCx->ALDOY & RTC_DOY_MASK);
00580         case RTC_TIMETYPE_MONTH:
00581                 return (RTCx->ALMON & RTC_MONTH_MASK);
00582         case RTC_TIMETYPE_YEAR:
00583                 return (RTCx->ALYEAR & RTC_YEAR_MASK);
00584         default:
00585                 return (0);
00586         }
00587 }
00588
00589
00590 /*********************************************************************/
00597 void RTC_SetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
00598 {
00599         CHECK_PARAM(PARAM_RTCx(RTCx));
00600
00601         RTCx->ALDOM = pFullTime->DOM & RTC_DOM_MASK;
00602         RTCx->ALDOW = pFullTime->DOW & RTC_DOW_MASK;
00603         RTCx->ALDOY = pFullTime->DOY & RTC_DOY_MASK;
00604         RTCx->ALHOUR = pFullTime->HOUR & RTC_HOUR_MASK;
00605         RTCx->ALMIN = pFullTime->MIN & RTC_MIN_MASK;
00606         RTCx->ALSEC = pFullTime->SEC & RTC_SEC_MASK;
00607         RTCx->ALMON = pFullTime->MONTH & RTC_MONTH_MASK;
00608         RTCx->ALYEAR = pFullTime->YEAR & RTC_YEAR_MASK;
00609 }
00610
00611
00612 /*********************************************************************/
00619 void RTC_GetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime)
00620 {
00621         CHECK_PARAM(PARAM_RTCx(RTCx));
00622
00623         pFullTime->DOM = RTCx->ALDOM & RTC_DOM_MASK;
00624         pFullTime->DOW = RTCx->ALDOW & RTC_DOW_MASK;
00625         pFullTime->DOY = RTCx->ALDOY & RTC_DOY_MASK;
00626         pFullTime->HOUR = RTCx->ALHOUR & RTC_HOUR_MASK;
00627         pFullTime->MIN = RTCx->ALMIN & RTC_MIN_MASK;
00628         pFullTime->SEC = RTCx->ALSEC & RTC_SEC_MASK;
00629         pFullTime->MONTH = RTCx->ALMON & RTC_MONTH_MASK;
00630         pFullTime->YEAR = RTCx->ALYEAR & RTC_YEAR_MASK;
00631 }
00632
00633
00634 /*********************************************************************/
00646 IntStatus RTC_GetIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType)
00647 {
00648         CHECK_PARAM(PARAM_RTCx(RTCx));
00649         CHECK_PARAM(PARAM_RTC_INT(IntType));
00650
00651         return ((RTCx->ILR & IntType) ? SET : RESET);
00652 }
00653
00654
00655 /*********************************************************************/
00665 void RTC_ClearIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType)
00666 {
00667         CHECK_PARAM(PARAM_RTCx(RTCx));
00668         CHECK_PARAM(PARAM_RTC_INT(IntType));
00669
00670         RTCx->ILR |= IntType;
00671 }
00672
00673 /*********************************************************************/
00681 void RTC_CalibCounterCmd(LPC_RTC_TypeDef *RTCx, FunctionalState NewState)
00682 {
00683         CHECK_PARAM(PARAM_RTCx(RTCx));
00684         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00685
00686         if (NewState == ENABLE)
00687         {
00688                 RTCx->CCR &= (~RTC_CCR_CCALEN) & RTC_CCR_BITMASK;
00689         }
00690         else
00691         {
00692                 RTCx->CCR |= RTC_CCR_CCALEN;
00693         }
00694 }
00695
00696
00697 /*********************************************************************/
00707 void RTC_CalibConfig(LPC_RTC_TypeDef *RTCx, uint32_t CalibValue, uint8_t CalibDir)
00708 {
00709         CHECK_PARAM(PARAM_RTCx(RTCx));
00710         CHECK_PARAM(PARAM_RTC_CALIB_DIR(CalibDir));
00711         CHECK_PARAM(CalibValue < RTC_CALIBRATION_MAX);
00712
00713         RTCx->CALIBRATION = ((CalibValue - 1) & RTC_CALIBRATION_CALVAL_MASK) \
00714                         | ((CalibDir == RTC_CALIB_DIR_BACKWARD) ? RTC_CALIBRATION_LIBDIR : 0);
00715 }
00716
00717
00718 /*********************************************************************/
00729 void RTC_WriteGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel, uint32_t Value)
00730 {
00731         uint32_t *preg;
00732
00733         CHECK_PARAM(PARAM_RTCx(RTCx));
00734         CHECK_PARAM(PARAM_RTC_GPREG_CH(Channel));
00735
00736         preg = (uint32_t *)&RTCx->GPREG0;
00737         preg += Channel;
00738         *preg = Value;
00739 }
00740
00741
00742 /*********************************************************************/
00752 uint32_t RTC_ReadGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel)
00753 {
00754         uint32_t *preg;
00755         uint32_t value;
00756
00757         CHECK_PARAM(PARAM_RTCx(RTCx));
00758         CHECK_PARAM(PARAM_RTC_GPREG_CH(Channel));
00759
00760         preg = (uint32_t *)&RTCx->GPREG0;
00761         preg += Channel;
00762         value = *preg;
00763         return (value);
00764 }
00765
00770 #endif /* _RTC */
00771
00776 /* --------------------------------- End Of File ------------------------------ */
00777
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rtc.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_rtc.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_rtc.h                           2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_RTC_H_
00034 #define LPC17XX_RTC_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046
00047 /* Private Macros ------------------------------------------------------------- */
00052 /* ----------------------- BIT DEFINITIONS ----------------------------------- */
00053 /* Miscellaneous register group --------------------------------------------- */
00054 /**********************************************************************
00055 * ILR register definitions
00056 **********************************************************************/
00058 #define RTC_ILR_BITMASK                 ((0x00000003))
00059
00060 #define RTC_IRL_RTCCIF                  ((1<<0))
00061
00062 #define RTC_IRL_RTCALF                  ((1<<1))
00063
00064 /**********************************************************************
00065 * CCR register definitions
00066 **********************************************************************/
00068 #define RTC_CCR_BITMASK                 ((0x00000013))
00069
00070 #define RTC_CCR_CLKEN                   ((1<<0))
00071
00072 #define RTC_CCR_CTCRST                  ((1<<1))
00073
00074 #define RTC_CCR_CCALEN                  ((1<<4))
00075
00076 /**********************************************************************
00077 * CIIR register definitions
00078 **********************************************************************/
00080 #define RTC_CIIR_IMSEC                  ((1<<0))
00081
00082 #define RTC_CIIR_IMMIN                  ((1<<1))
00083
00084 #define RTC_CIIR_IMHOUR                 ((1<<2))
00085
00086 #define RTC_CIIR_IMDOM                  ((1<<3))
00087
00088 #define RTC_CIIR_IMDOW                  ((1<<4))
00089
00090 #define RTC_CIIR_IMDOY                  ((1<<5))
00091
00092 #define RTC_CIIR_IMMON                  ((1<<6))
00093
00094 #define RTC_CIIR_IMYEAR                 ((1<<7))
00095
00096 #define RTC_CIIR_BITMASK                ((0xFF))
00097
00098 /**********************************************************************
00099 * AMR register definitions
00100 **********************************************************************/
00102 #define RTC_AMR_AMRSEC                  ((1<<0))
00103
00104 #define RTC_AMR_AMRMIN                  ((1<<1))
00105
00106 #define RTC_AMR_AMRHOUR                 ((1<<2))
00107
00108 #define RTC_AMR_AMRDOM                  ((1<<3))
00109
00110 #define RTC_AMR_AMRDOW                  ((1<<4))
00111
00112 #define RTC_AMR_AMRDOY                  ((1<<5))
00113
00114 #define RTC_AMR_AMRMON                  ((1<<6))
00115
00116 #define RTC_AMR_AMRYEAR                 ((1<<7))
00117
00118 #define RTC_AMR_BITMASK                 ((0xFF))
00119
00120 /**********************************************************************
00121 * RTC_AUX register definitions
00122 **********************************************************************/
00124 #define RTC_AUX_RTC_OSCF                ((1<<4))
00125
00126 /**********************************************************************
00127 * RTC_AUXEN register definitions
00128 **********************************************************************/
00130 #define RTC_AUXEN_RTC_OSCFEN    ((1<<4))
00131
00132 /* Consolidated time register group ----------------------------------- */
00133 /**********************************************************************
00134 * Consolidated Time Register 0 definitions
00135 **********************************************************************/
00136 #define RTC_CTIME0_SECONDS_MASK         ((0x3F))
00137 #define RTC_CTIME0_MINUTES_MASK         ((0x3F00))
00138 #define RTC_CTIME0_HOURS_MASK           ((0x1F0000))
00139 #define RTC_CTIME0_DOW_MASK                     ((0x7000000))
00140
00141 /**********************************************************************
00142 * Consolidated Time Register 1 definitions
00143 **********************************************************************/
00144 #define RTC_CTIME1_DOM_MASK                     ((0x1F))
00145 #define RTC_CTIME1_MONTH_MASK           ((0xF00))
00146 #define RTC_CTIME1_YEAR_MASK            ((0xFFF0000))
00147
00148 /**********************************************************************
00149 * Consolidated Time Register 2 definitions
00150 **********************************************************************/
00151 #define RTC_CTIME2_DOY_MASK                     ((0xFFF))
00152
00153 /**********************************************************************
00154 * Time Counter Group and Alarm register group
00155 **********************************************************************/
00157 #define RTC_SEC_MASK                    (0x0000003F)
00158
00159 #define RTC_MIN_MASK                    (0x0000003F)
00160
00161 #define RTC_HOUR_MASK                   (0x0000001F)
00162
00163 #define RTC_DOM_MASK                    (0x0000001F)
00164
00165 #define RTC_DOW_MASK                    (0x00000007)
00166
00167 #define RTC_DOY_MASK                    (0x000001FF)
00168
00169 #define RTC_MONTH_MASK                  (0x0000000F)
00170
00171 #define RTC_YEAR_MASK                   (0x00000FFF)
00172
00173 #define RTC_SECOND_MAX          59
00174 #define RTC_MINUTE_MAX          59
00175 #define RTC_HOUR_MAX            23
00176 #define RTC_MONTH_MIN           1
00177 #define RTC_MONTH_MAX           12
00178 #define RTC_DAYOFMONTH_MIN      1
00179 #define RTC_DAYOFMONTH_MAX      31
00180 #define RTC_DAYOFWEEK_MAX       6
00181 #define RTC_DAYOFYEAR_MIN       1
00182 #define RTC_DAYOFYEAR_MAX       366
00183 #define RTC_YEAR_MAX            4095
00185 /**********************************************************************
00186 * Calibration register
00187 **********************************************************************/
00188 /* Calibration register */
00190 #define RTC_CALIBRATION_CALVAL_MASK             ((0x1FFFF))
00191
00192 #define RTC_CALIBRATION_LIBDIR                  ((1<<17))
00193
00194 #define RTC_CALIBRATION_MAX                             ((0x20000))
00195
00196 #define RTC_CALIB_DIR_FORWARD                   ((uint8_t)(0))
00197 #define RTC_CALIB_DIR_BACKWARD                  ((uint8_t)(1))
00198
00199
00200 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00202 #define PARAM_RTCx(x)   (((uint32_t *)x)==((uint32_t *)LPC_RTC))
00203
00204 /* Macro check RTC interrupt type */
00205 #define PARAM_RTC_INT(n)        ((n==RTC_INT_COUNTER_INCREASE) || (n==RTC_INT_ALARM))
00206
00207 /* Macro check RTC time type */
00208 #define PARAM_RTC_TIMETYPE(n)   ((n==RTC_TIMETYPE_SECOND) || (n==RTC_TIMETYPE_MINUTE) \
00209 || (n==RTC_TIMETYPE_HOUR) || (n==RTC_TIMETYPE_DAYOFWEEK) \
00210 || (n==RTC_TIMETYPE_DAYOFMONTH) || (n==RTC_TIMETYPE_DAYOFYEAR) \
00211 || (n==RTC_TIMETYPE_MONTH) || (n==RTC_TIMETYPE_YEAR))
00212
00213 /* Macro check RTC calibration type */
00214 #define PARAM_RTC_CALIB_DIR(n)  ((n==RTC_CALIB_DIR_FORWARD) || (n==RTC_CALIB_DIR_BACKWARD))
00215
00216 /* Macro check RTC GPREG type */
00217 #define PARAM_RTC_GPREG_CH(n)   (n<=4)
00218
00224 /* Public Types --------------------------------------------------------------- */
00230 typedef struct {
00231         uint32_t SEC;
00232         uint32_t MIN;
00233         uint32_t HOUR;
00234         uint32_t DOM;
00235         uint32_t DOW;
00236         uint32_t DOY;
00237         uint32_t MONTH;
00238         uint32_t YEAR;
00239 } RTC_TIME_Type;
00240
00242 typedef enum {
00243         RTC_INT_COUNTER_INCREASE = RTC_IRL_RTCCIF,
00244         RTC_INT_ALARM = RTC_IRL_RTCALF
00245 } RTC_INT_OPT;
00246
00247
00249 typedef enum {
00250         RTC_TIMETYPE_SECOND = 0,
00251         RTC_TIMETYPE_MINUTE = 1,
00252         RTC_TIMETYPE_HOUR = 2,
00253         RTC_TIMETYPE_DAYOFWEEK = 3,
00254         RTC_TIMETYPE_DAYOFMONTH = 4,
00255         RTC_TIMETYPE_DAYOFYEAR = 5,
00256         RTC_TIMETYPE_MONTH = 6,
00257         RTC_TIMETYPE_YEAR = 7
00258 } RTC_TIMETYPE_Num;
00259
00266 /* Public Functions ----------------------------------------------------------- */
00271 void RTC_Init (LPC_RTC_TypeDef *RTCx);
00272 void RTC_DeInit(LPC_RTC_TypeDef *RTCx);
00273 void RTC_ResetClockTickCounter(LPC_RTC_TypeDef *RTCx);
00274 void RTC_Cmd (LPC_RTC_TypeDef *RTCx, FunctionalState NewState);
00275 void RTC_CntIncrIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t CntIncrIntType, \
00276                                                                 FunctionalState NewState);
00277 void RTC_AlarmIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t AlarmTimeType, \
00278                                                                 FunctionalState NewState);
00279 void RTC_SetTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t TimeValue);
00280 uint32_t RTC_GetTime(LPC_RTC_TypeDef *RTCx, uint32_t Timetype);
00281 void RTC_SetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime);
00282 void RTC_GetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime);
00283 void RTC_SetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t ALValue);
00284 uint32_t RTC_GetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype);
00285 void RTC_SetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime);
00286 void RTC_GetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime);
00287 IntStatus RTC_GetIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType);
00288 void RTC_ClearIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType);
00289 void RTC_CalibCounterCmd(LPC_RTC_TypeDef *RTCx, FunctionalState NewState);
00290 void RTC_CalibConfig(LPC_RTC_TypeDef *RTCx, uint32_t CalibValue, uint8_t CalibDir);
00291 void RTC_WriteGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel, uint32_t Value);
00292 uint32_t RTC_ReadGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel);
00293
00298 #ifdef __cplusplus
00299 }
00300 #endif
00301
00302 #endif /* LPC17XX_RTC_H_ */
00303
00308 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_spi.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_spi.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_spi.c                           2010-05-21
00003 */
00026 /* Peripheral group ----------------------------------------------------------- */
00031 /* Includes ------------------------------------------------------------------- */
00032 #include "lpc17xx_spi.h"
00033 #include "lpc17xx_clkpwr.h"
00034
00035 /* If this source file built with example, the LPC17xx FW library configuration
00036  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00037  * otherwise the default FW library configuration file must be included instead
00038  */
00039 #ifdef __BUILD_WITH_EXAMPLE__
00040 #include "lpc17xx_libcfg.h"
00041 #else
00042 #include "lpc17xx_libcfg_default.h"
00043 #endif /* __BUILD_WITH_EXAMPLE__ */
00044
00045 #ifdef _SPI
00046
00047
00048 /* Public Functions ----------------------------------------------------------- */
00053 /*********************************************************************/
00059 void SPI_SetClock (LPC_SPI_TypeDef *SPIx, uint32_t target_clock)
00060 {
00061         uint32_t spi_pclk;
00062         uint32_t prescale, temp;
00063
00064         CHECK_PARAM(PARAM_SPIx(SPIx));
00065
00066         if (SPIx == LPC_SPI){
00067                 spi_pclk =  CLKPWR_GetPCLK (CLKPWR_PCLKSEL_SPI);
00068         } else {
00069                 return;
00070         }
00071
00072         prescale = 8;
00073         // Find closest clock to target clock
00074         while (1){
00075                 temp = target_clock * prescale;
00076                 if (temp >= spi_pclk){
00077                         break;
00078                 }
00079                 prescale += 2;
00080                 if(prescale >= 254){
00081                         break;
00082                 }
00083         }
00084
00085         // Write to register
00086         SPIx->SPCCR = SPI_SPCCR_COUNTER(prescale);
00087 }
00088
00089
00090 /*********************************************************************/
00096 void SPI_DeInit(LPC_SPI_TypeDef *SPIx)
00097 {
00098         CHECK_PARAM(PARAM_SPIx(SPIx));
00099
00100         if (SPIx == LPC_SPI){
00101                 /* Set up clock and power for SPI module */
00102                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSPI, DISABLE);
00103         }
00104 }
00105
00106 /*********************************************************************/
00111 uint8_t SPI_GetDataSize (LPC_SPI_TypeDef *SPIx)
00112 {
00113         CHECK_PARAM(PARAM_SPIx(SPIx));
00114         return ((SPIx->SPCR)>>8 & 0xF);
00115 }
00116
00117 /********************************************************************/
00126 void SPI_Init(LPC_SPI_TypeDef *SPIx, SPI_CFG_Type *SPI_ConfigStruct)
00127 {
00128         uint32_t tmp;
00129
00130         CHECK_PARAM(PARAM_SPIx(SPIx));
00131
00132         if(SPIx == LPC_SPI){
00133                 /* Set up clock and power for UART module */
00134                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSPI, ENABLE);
00135         } else {
00136                 return;
00137         }
00138
00139         // Configure SPI, interrupt is disable as default
00140         tmp = ((SPI_ConfigStruct->CPHA) | (SPI_ConfigStruct->CPOL) \
00141                 | (SPI_ConfigStruct->DataOrder) | (SPI_ConfigStruct->Databit) \
00142                 | (SPI_ConfigStruct->Mode) | SPI_SPCR_BIT_EN) & SPI_SPCR_BITMASK;
00143         // write back to SPI control register
00144         SPIx->SPCR = tmp;
00145
00146         // Set clock rate for SPI peripheral
00147         SPI_SetClock(SPIx, SPI_ConfigStruct->ClockRate);
00148
00149         // If interrupt flag is set, Write '1' to Clear interrupt flag
00150         if (SPIx->SPINT & SPI_SPINT_INTFLAG){
00151                 SPIx->SPINT = SPI_SPINT_INTFLAG;
00152         }
00153 }
00154
00155
00156
00157 /*****************************************************************************/
00169 void SPI_ConfigStructInit(SPI_CFG_Type *SPI_InitStruct)
00170 {
00171         SPI_InitStruct->CPHA = SPI_CPHA_FIRST;
00172         SPI_InitStruct->CPOL = SPI_CPOL_HI;
00173         SPI_InitStruct->ClockRate = 1000000;
00174         SPI_InitStruct->DataOrder = SPI_DATA_MSB_FIRST;
00175         SPI_InitStruct->Databit = SPI_DATABIT_8;
00176         SPI_InitStruct->Mode = SPI_MASTER_MODE;
00177 }
00178
00179 /*********************************************************************/
00186 void SPI_SendData(LPC_SPI_TypeDef* SPIx, uint16_t Data)
00187 {
00188         CHECK_PARAM(PARAM_SPIx(SPIx));
00189
00190         SPIx->SPDR = Data & SPI_SPDR_BITMASK;
00191 }
00192
00193
00194
00195 /*********************************************************************/
00200 uint16_t SPI_ReceiveData(LPC_SPI_TypeDef* SPIx)
00201 {
00202         CHECK_PARAM(PARAM_SPIx(SPIx));
00203
00204         return ((uint16_t) (SPIx->SPDR & SPI_SPDR_BITMASK));
00205 }
00206
00207 /*********************************************************************/
00221 int32_t SPI_ReadWrite (LPC_SPI_TypeDef *SPIx, SPI_DATA_SETUP_Type *dataCfg, \
00222                                                 SPI_TRANSFER_Type xfType)
00223 {
00224         uint8_t *rdata8;
00225     uint8_t *wdata8;
00226         uint16_t *rdata16;
00227     uint16_t *wdata16;
00228     uint32_t stat;
00229     uint32_t temp;
00230     uint8_t dataword;
00231
00232         //read for empty buffer
00233         temp = SPIx->SPDR;
00234         //dummy to clear status
00235         temp = SPIx->SPSR;
00236         dataCfg->counter = 0;
00237         dataCfg->status = 0;
00238
00239         if(SPI_GetDataSize (SPIx) == 8)
00240                 dataword = 0;
00241         else dataword = 1;
00242         if (xfType == SPI_TRANSFER_POLLING){
00243
00244                 if (dataword == 0){
00245                         rdata8 = (uint8_t *)dataCfg->rx_data;
00246                         wdata8 = (uint8_t *)dataCfg->tx_data;
00247                 } else {
00248                         rdata16 = (uint16_t *)dataCfg->rx_data;
00249                         wdata16 = (uint16_t *)dataCfg->tx_data;
00250                 }
00251
00252                 while(dataCfg->counter < dataCfg->length)
00253                 {
00254                         // Write data to buffer
00255                         if(dataCfg->tx_data == NULL){
00256                                 if (dataword == 0){
00257                                         SPI_SendData(SPIx, 0xFF);
00258                                 } else {
00259                                         SPI_SendData(SPIx, 0xFFFF);
00260                                 }
00261                         } else {
00262                                 if (dataword == 0){
00263                                         SPI_SendData(SPIx, *wdata8);
00264                                         wdata8++;
00265                                 } else {
00266                                         SPI_SendData(SPIx, *wdata16);
00267                                         wdata16++;
00268                                 }
00269                         }
00270                         // Wait for transfer complete
00271                         while (!((stat = SPIx->SPSR) & SPI_SPSR_SPIF));
00272                         // Check for error
00273                         if (stat & (SPI_SPSR_ABRT | SPI_SPSR_MODF | SPI_SPSR_ROVR | SPI_SPSR_WCOL)){
00274                                 // save status
00275                                 dataCfg->status = stat | SPI_STAT_ERROR;
00276                                 return (dataCfg->counter);
00277                         }
00278                         // Read data from SPI dat
00279                         temp = (uint32_t) SPI_ReceiveData(SPIx);
00280
00281                         // Store data to destination
00282                         if (dataCfg->rx_data != NULL)
00283                         {
00284                                 if (dataword == 0){
00285                                         *(rdata8) = (uint8_t) temp;
00286                                         rdata8++;
00287                                 } else {
00288                                         *(rdata16) = (uint16_t) temp;
00289                                         rdata16++;
00290                                 }
00291                         }
00292                         // Increase counter
00293                         if (dataword == 0){
00294                                 dataCfg->counter++;
00295                         } else {
00296                                 dataCfg->counter += 2;
00297                         }
00298                 }
00299
00300                 // Return length of actual data transferred
00301                 // save status
00302                 dataCfg->status = stat | SPI_STAT_DONE;
00303                 return (dataCfg->counter);
00304         }
00305         // Interrupt mode
00306         else {
00307
00308                 // Check if interrupt flag is already set
00309                 if(SPIx->SPINT & SPI_SPINT_INTFLAG){
00310                         SPIx->SPINT = SPI_SPINT_INTFLAG;
00311                 }
00312                 if (dataCfg->counter < dataCfg->length){
00313                         // Write data to buffer
00314                         if(dataCfg->tx_data == NULL){
00315                                 if (dataword == 0){
00316                                         SPI_SendData(SPIx, 0xFF);
00317                                 } else {
00318                                         SPI_SendData(SPIx, 0xFFFF);
00319                                 }
00320                         } else {
00321                                 if (dataword == 0){
00322                                         SPI_SendData(SPIx, (*(uint8_t *)dataCfg->tx_data));
00323                                 } else {
00324                                         SPI_SendData(SPIx, (*(uint16_t *)dataCfg->tx_data));
00325                                 }
00326                         }
00327                         SPI_IntCmd(SPIx, ENABLE);
00328                 } else {
00329                         // Save status
00330                         dataCfg->status = SPI_STAT_DONE;
00331                 }
00332                 return (0);
00333         }
00334 }
00335
00336
00337 /********************************************************************/
00346 void SPI_IntCmd(LPC_SPI_TypeDef *SPIx, FunctionalState NewState)
00347 {
00348         CHECK_PARAM(PARAM_SPIx(SPIx));
00349         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00350
00351         if (NewState == ENABLE)
00352         {
00353                 SPIx->SPCR |= SPI_SPCR_SPIE;
00354         }
00355         else
00356         {
00357                 SPIx->SPCR &= (~SPI_SPCR_SPIE) & SPI_SPCR_BITMASK;
00358         }
00359 }
00360
00361
00362 /********************************************************************/
00367 IntStatus SPI_GetIntStatus (LPC_SPI_TypeDef *SPIx)
00368 {
00369         CHECK_PARAM(PARAM_SPIx(SPIx));
00370
00371         return ((SPIx->SPINT & SPI_SPINT_INTFLAG) ? SET : RESET);
00372 }
00373
00374 /********************************************************************/
00379 void SPI_ClearIntPending(LPC_SPI_TypeDef *SPIx)
00380 {
00381         CHECK_PARAM(PARAM_SPIx(SPIx));
00382
00383         SPIx->SPINT = SPI_SPINT_INTFLAG;
00384 }
00385
00386 /********************************************************************/
00398 uint32_t SPI_GetStatus(LPC_SPI_TypeDef* SPIx)
00399 {
00400         CHECK_PARAM(PARAM_SPIx(SPIx));
00401
00402         return (SPIx->SPSR & SPI_SPSR_BITMASK);
00403 }
00404
00405 /********************************************************************/
00419 FlagStatus SPI_CheckStatus (uint32_t inputSPIStatus,  uint8_t SPIStatus)
00420 {
00421         CHECK_PARAM(PARAM_SPI_STAT(SPIStatus));
00422
00423         return ((inputSPIStatus & SPIStatus) ? SET : RESET);
00424 }
00425
00426
00431 #endif /* _SPI */
00432
00437 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_spi.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_spi.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_spi.h                           2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_SPI_H_
00034 #define LPC17XX_SPI_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046 /* Public Macros -------------------------------------------------------------- */
00051 /*********************************************************************/
00055 #define SPI_CPHA_FIRST                  ((uint32_t)(0))
00056 #define SPI_CPHA_SECOND                 ((uint32_t)(1<<3))
00057
00059 #define SPI_CPOL_HI                             ((uint32_t)(0))
00060 #define SPI_CPOL_LO                             ((uint32_t)(1<<4))
00061
00063 #define SPI_SLAVE_MODE                  ((uint32_t)(0))
00064 #define SPI_MASTER_MODE                 ((uint32_t)(1<<5))
00065
00067 #define SPI_DATA_MSB_FIRST              ((uint32_t)(0))
00068 #define SPI_DATA_LSB_FIRST              ((uint32_t)(1<<6))
00069
00071 #define SPI_DATABIT_16          SPI_SPCR_BITS(0)
00072 #define SPI_DATABIT_8           SPI_SPCR_BITS(0x08)
00073 #define SPI_DATABIT_9           SPI_SPCR_BITS(0x09)
00074 #define SPI_DATABIT_10          SPI_SPCR_BITS(0x0A)
00075 #define SPI_DATABIT_11          SPI_SPCR_BITS(0x0B)
00076 #define SPI_DATABIT_12          SPI_SPCR_BITS(0x0C)
00077 #define SPI_DATABIT_13          SPI_SPCR_BITS(0x0D)
00078 #define SPI_DATABIT_14          SPI_SPCR_BITS(0x0E)
00079 #define SPI_DATABIT_15          SPI_SPCR_BITS(0x0F)
00081 /*********************************************************************/
00085 #define SPI_STAT_ABRT           SPI_SPSR_ABRT
00086
00087 #define SPI_STAT_MODF           SPI_SPSR_MODF
00088
00089 #define SPI_STAT_ROVR           SPI_SPSR_ROVR
00090
00091 #define SPI_STAT_WCOL           SPI_SPSR_WCOL
00092
00093 #define SPI_STAT_SPIF           SPI_SPSR_SPIF
00094
00095 /* SPI Status Implementation definitions */
00096 #define SPI_STAT_DONE           (1UL<<8)
00097 #define SPI_STAT_ERROR          (1UL<<9)
00104 /* Private Macros ------------------------------------------------------------- */
00105
00109 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00110 /*********************************************************************/
00115 #define SPI_SPCR_BIT_EN                 ((uint32_t)(1<<2))
00116
00117 #define SPI_SPCR_CPHA_SECOND    ((uint32_t)(1<<3))
00118
00119 #define SPI_SPCR_CPOL_LOW               ((uint32_t)(1<<4))
00120
00121 #define SPI_SPCR_MSTR                   ((uint32_t)(1<<5))
00122
00123 #define SPI_SPCR_LSBF                   ((uint32_t)(1<<6))
00124
00125 #define SPI_SPCR_SPIE                   ((uint32_t)(1<<7))
00126
00128 #define SPI_SPCR_BITS(n)                ((n==0) ? ((uint32_t)0) : ((uint32_t)((n&0x0F)<<8)))
00129
00130 #define SPI_SPCR_BITMASK                ((uint32_t)(0xFFC))
00131
00132 /*********************************************************************/
00136 #define SPI_SPSR_ABRT           ((uint32_t)(1<<3))
00137
00138 #define SPI_SPSR_MODF           ((uint32_t)(1<<4))
00139
00140 #define SPI_SPSR_ROVR           ((uint32_t)(1<<5))
00141
00142 #define SPI_SPSR_WCOL           ((uint32_t)(1<<6))
00143
00144 #define SPI_SPSR_SPIF           ((uint32_t)(1<<7))
00145
00146 #define SPI_SPSR_BITMASK        ((uint32_t)(0xF8))
00147
00148 /*********************************************************************/
00152 #define SPI_SPDR_LO_MASK        ((uint32_t)(0xFF))
00153
00154 #define SPI_SPDR_HI_MASK        ((uint32_t)(0xFF00))
00155
00156 #define SPI_SPDR_BITMASK        ((uint32_t)(0xFFFF))
00157
00158 /*********************************************************************/
00162 #define SPI_SPCCR_COUNTER(n)    ((uint32_t)(n&0xFF))
00163
00164 #define SPI_SPCCR_BITMASK               ((uint32_t)(0xFF))
00165
00166 /***********************************************************************
00167  * Macro defines for SPI Test Control Register
00168  **********************************************************************/
00170 #define SPI_SPTCR_TEST_MASK     ((uint32_t)(0xFE))
00171
00172 #define SPI_SPTCR_BITMASK       ((uint32_t)(0xFE))
00173
00174 /*********************************************************************/
00178 #define SPI_SPTSR_ABRT          ((uint32_t)(1<<3))
00179
00180 #define SPI_SPTSR_MODF          ((uint32_t)(1<<4))
00181
00182 #define SPI_SPTSR_ROVR          ((uint32_t)(1<<5))
00183
00184 #define SPI_SPTSR_WCOL          ((uint32_t)(1<<6))
00185
00186 #define SPI_SPTSR_SPIF          ((uint32_t)(1<<7))
00187
00188 #define SPI_SPTSR_MASKBIT       ((uint32_t)(0xF8))
00189
00190 /*********************************************************************/
00194 #define SPI_SPINT_INTFLAG       ((uint32_t)(1<<0))
00195
00196 #define SPI_SPINT_BITMASK       ((uint32_t)(0x01))
00197
00198
00199 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00201 #define PARAM_SPIx(n)   (((uint32_t *)n)==((uint32_t *)LPC_SPI))
00202
00204 #define PARAM_SPI_CPHA(n)       ((n==SPI_CPHA_FIRST) || (n==SPI_CPHA_SECOND))
00205
00207 #define PARAM_SPI_CPOL(n)       ((n==SPI_CPOL_HI) || (n==SPI_CPOL_LO))
00208
00210 #define PARAM_SPI_MODE(n)       ((n==SPI_SLAVE_MODE) || (n==SPI_MASTER_MODE))
00211
00213 #define PARAM_SPI_DATA_ORDER(n) ((n==SPI_DATA_MSB_FIRST) || (n==SPI_DATA_LSB_FIRST))
00214
00216 #define PARAM_SPI_DATABIT(n)    ((n==SPI_DATABIT_16) || (n==SPI_DATABIT_8) \
00217 || (n==SPI_DATABIT_9) || (n==SPI_DATABIT_10) \
00218 || (n==SPI_DATABIT_11) || (n==SPI_DATABIT_12) \
00219 || (n==SPI_DATABIT_13) || (n==SPI_DATABIT_14) \
00220 || (n==SPI_DATABIT_15))
00221
00223 #define PARAM_SPI_STAT(n)       ((n==SPI_STAT_ABRT) || (n==SPI_STAT_MODF) \
00224 || (n==SPI_STAT_ROVR) || (n==SPI_STAT_WCOL) \
00225 || (n==SPI_STAT_SPIF))
00226
00232 /* Public Types --------------------------------------------------------------- */
00238 typedef struct {
00239         uint32_t Databit;
00241         uint32_t CPHA;
00244         uint32_t CPOL;
00247         uint32_t Mode;
00250         uint32_t DataOrder;
00253         uint32_t ClockRate;
00255 } SPI_CFG_Type;
00256
00257
00261 typedef enum {
00262         SPI_TRANSFER_POLLING = 0,
00263         SPI_TRANSFER_INTERRUPT
00264 } SPI_TRANSFER_Type;
00265
00269 typedef struct {
00270         void *tx_data;
00271         void *rx_data;
00272         uint32_t length;
00273         uint32_t counter;
00274         uint32_t status;
00275 } SPI_DATA_SETUP_Type;
00276
00282 /* Public Functions ----------------------------------------------------------- */
00287 /* SPI Init/DeInit functions ---------*/
00288 void SPI_Init(LPC_SPI_TypeDef *SPIx, SPI_CFG_Type *SPI_ConfigStruct);
00289 void SPI_DeInit(LPC_SPI_TypeDef *SPIx);
00290 void SPI_SetClock (LPC_SPI_TypeDef *SPIx, uint32_t target_clock);
00291 void SPI_ConfigStructInit(SPI_CFG_Type *SPI_InitStruct);
00292
00293 /* SPI transfer functions ------------*/
00294 void SPI_SendData(LPC_SPI_TypeDef *SPIx, uint16_t Data);
00295 uint16_t SPI_ReceiveData(LPC_SPI_TypeDef *SPIx);
00296 int32_t SPI_ReadWrite (LPC_SPI_TypeDef *SPIx, SPI_DATA_SETUP_Type *dataCfg, SPI_TRANSFER_Type xfType);
00297
00298 /* SPI Interrupt functions ---------*/
00299 void SPI_IntCmd(LPC_SPI_TypeDef *SPIx, FunctionalState NewState);
00300 IntStatus SPI_GetIntStatus (LPC_SPI_TypeDef *SPIx);
00301 void SPI_ClearIntPending(LPC_SPI_TypeDef *SPIx);
00302
00303 /* SPI get information functions-----*/
00304 uint8_t SPI_GetDataSize (LPC_SPI_TypeDef *SPIx);
00305 uint32_t SPI_GetStatus(LPC_SPI_TypeDef *SPIx);
00306 FlagStatus SPI_CheckStatus (uint32_t inputSPIStatus,  uint8_t SPIStatus);
00307
00312 #ifdef __cplusplus
00313 }
00314 #endif
00315
00316 #endif /* LPC17XX_SPI_H_ */
00317
00322 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_ssp.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_ssp.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_ssp.c                           2010-06-18
00003 */
00026 /* Peripheral group ----------------------------------------------------------- */
00031 /* Includes ------------------------------------------------------------------- */
00032 #include "lpc17xx_ssp.h"
00033 #include "lpc17xx_clkpwr.h"
00034
00035
00036 /* If this source file built with example, the LPC17xx FW library configuration
00037  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00038  * otherwise the default FW library configuration file must be included instead
00039  */
00040 #ifdef __BUILD_WITH_EXAMPLE__
00041 #include "lpc17xx_libcfg.h"
00042 #else
00043 #include "lpc17xx_libcfg_default.h"
00044 #endif /* __BUILD_WITH_EXAMPLE__ */
00045
00046
00047 #ifdef _SSP
00048
00049 /* Public Functions ----------------------------------------------------------- */
00053 static void setSSPclock (LPC_SSP_TypeDef *SSPx, uint32_t target_clock);
00054
00055 /*********************************************************************/
00063 static void setSSPclock (LPC_SSP_TypeDef *SSPx, uint32_t target_clock)
00064 {
00065     uint32_t prescale, cr0_div, cmp_clk, ssp_clk;
00066
00067     CHECK_PARAM(PARAM_SSPx(SSPx));
00068
00069     /* The SSP clock is derived from the (main system oscillator / 2),
00070        so compute the best divider from that clock */
00071     if (SSPx == LPC_SSP0){
00072         ssp_clk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_SSP0);
00073     } else if (SSPx == LPC_SSP1) {
00074         ssp_clk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_SSP1);
00075     } else {
00076         return;
00077     }
00078
00079         /* Find closest divider to get at or under the target frequency.
00080            Use smallest prescale possible and rely on the divider to get
00081            the closest target frequency */
00082         cr0_div = 0;
00083         cmp_clk = 0xFFFFFFFF;
00084         prescale = 2;
00085         while (cmp_clk > target_clock)
00086         {
00087                 cmp_clk = ssp_clk / ((cr0_div + 1) * prescale);
00088                 if (cmp_clk > target_clock)
00089                 {
00090                         cr0_div++;
00091                         if (cr0_div > 0xFF)
00092                         {
00093                                 cr0_div = 0;
00094                                 prescale += 2;
00095                         }
00096                 }
00097         }
00098
00099     /* Write computed prescaler and divider back to register */
00100     SSPx->CR0 &= (~SSP_CR0_SCR(0xFF)) & SSP_CR0_BITMASK;
00101     SSPx->CR0 |= (SSP_CR0_SCR(cr0_div)) & SSP_CR0_BITMASK;
00102     SSPx->CPSR = prescale & SSP_CPSR_BITMASK;
00103 }
00104
00109 /* Public Functions ----------------------------------------------------------- */
00114 /********************************************************************/
00125 void SSP_Init(LPC_SSP_TypeDef *SSPx, SSP_CFG_Type *SSP_ConfigStruct)
00126 {
00127         uint32_t tmp;
00128
00129         CHECK_PARAM(PARAM_SSPx(SSPx));
00130
00131         if(SSPx == LPC_SSP0) {
00132                 /* Set up clock and power for SSP0 module */
00133                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP0, ENABLE);
00134         } else if(SSPx == LPC_SSP1) {
00135                 /* Set up clock and power for SSP1 module */
00136                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP1, ENABLE);
00137         } else {
00138                 return;
00139         }
00140
00141         /* Configure SSP, interrupt is disable, LoopBack mode is disable,
00142          * SSP is disable, Slave output is disable as default
00143          */
00144         tmp = ((SSP_ConfigStruct->CPHA) | (SSP_ConfigStruct->CPOL) \
00145                 | (SSP_ConfigStruct->FrameFormat) | (SSP_ConfigStruct->Databit))
00146                 & SSP_CR0_BITMASK;
00147         // write back to SSP control register
00148         SSPx->CR0 = tmp;
00149
00150         tmp = SSP_ConfigStruct->Mode & SSP_CR1_BITMASK;
00151         // Write back to CR1
00152         SSPx->CR1 = tmp;
00153
00154         // Set clock rate for SSP peripheral
00155         setSSPclock(SSPx, SSP_ConfigStruct->ClockRate);
00156 }
00157
00158 /*********************************************************************/
00166 void SSP_DeInit(LPC_SSP_TypeDef* SSPx)
00167 {
00168         CHECK_PARAM(PARAM_SSPx(SSPx));
00169
00170         if (SSPx == LPC_SSP0){
00171                 /* Set up clock and power for SSP0 module */
00172                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP0, DISABLE);
00173         } else if (SSPx == LPC_SSP1) {
00174                 /* Set up clock and power for SSP1 module */
00175                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP1, DISABLE);
00176         }
00177 }
00178
00179 /*****************************************************************************/
00190 uint8_t SSP_GetDataSize(LPC_SSP_TypeDef* SSPx)
00191 {
00192         CHECK_PARAM(PARAM_SSPx(SSPx));
00193         return (SSPx->CR0 & (0xF));
00194 }
00195
00196 /*****************************************************************************/
00208 void SSP_ConfigStructInit(SSP_CFG_Type *SSP_InitStruct)
00209 {
00210         SSP_InitStruct->CPHA = SSP_CPHA_FIRST;
00211         SSP_InitStruct->CPOL = SSP_CPOL_HI;
00212         SSP_InitStruct->ClockRate = 1000000;
00213         SSP_InitStruct->Databit = SSP_DATABIT_8;
00214         SSP_InitStruct->Mode = SSP_MASTER_MODE;
00215         SSP_InitStruct->FrameFormat = SSP_FRAME_SPI;
00216 }
00217
00218
00219 /*********************************************************************/
00227 void SSP_Cmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState)
00228 {
00229         CHECK_PARAM(PARAM_SSPx(SSPx));
00230         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00231
00232         if (NewState == ENABLE)
00233         {
00234                 SSPx->CR1 |= SSP_CR1_SSP_EN;
00235         }
00236         else
00237         {
00238                 SSPx->CR1 &= (~SSP_CR1_SSP_EN) & SSP_CR1_BITMASK;
00239         }
00240 }
00241
00242 /*********************************************************************/
00252 void SSP_LoopBackCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState)
00253 {
00254         CHECK_PARAM(PARAM_SSPx(SSPx));
00255         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00256
00257         if (NewState == ENABLE)
00258         {
00259                 SSPx->CR1 |= SSP_CR1_LBM_EN;
00260         }
00261         else
00262         {
00263                 SSPx->CR1 &= (~SSP_CR1_LBM_EN) & SSP_CR1_BITMASK;
00264         }
00265 }
00266
00267 /*********************************************************************/
00280 void SSP_SlaveOutputCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState)
00281 {
00282         CHECK_PARAM(PARAM_SSPx(SSPx));
00283         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00284
00285         if (NewState == ENABLE)
00286         {
00287                 SSPx->CR1 &= (~SSP_CR1_SO_DISABLE) & SSP_CR1_BITMASK;
00288         }
00289         else
00290         {
00291                 SSPx->CR1 |= SSP_CR1_SO_DISABLE;
00292         }
00293 }
00294
00295
00296
00297 /*********************************************************************/
00306 void SSP_SendData(LPC_SSP_TypeDef* SSPx, uint16_t Data)
00307 {
00308         CHECK_PARAM(PARAM_SSPx(SSPx));
00309
00310         SSPx->DR = SSP_DR_BITMASK(Data);
00311 }
00312
00313
00314
00315 /*********************************************************************/
00322 uint16_t SSP_ReceiveData(LPC_SSP_TypeDef* SSPx)
00323 {
00324         CHECK_PARAM(PARAM_SSPx(SSPx));
00325
00326         return ((uint16_t) (SSP_DR_BITMASK(SSPx->DR)));
00327 }
00328
00329 /*********************************************************************/
00345 int32_t SSP_ReadWrite (LPC_SSP_TypeDef *SSPx, SSP_DATA_SETUP_Type *dataCfg, \
00346                                                 SSP_TRANSFER_Type xfType)
00347 {
00348         uint8_t *rdata8;
00349     uint8_t *wdata8;
00350         uint16_t *rdata16;
00351     uint16_t *wdata16;
00352     uint32_t stat;
00353     uint32_t tmp;
00354     int32_t dataword;
00355
00356     dataCfg->rx_cnt = 0;
00357     dataCfg->tx_cnt = 0;
00358     dataCfg->status = 0;
00359
00360
00361         /* Clear all remaining data in RX FIFO */
00362         while (SSPx->SR & SSP_SR_RNE){
00363                 tmp = (uint32_t) SSP_ReceiveData(SSPx);
00364         }
00365
00366         // Clear status
00367         SSPx->ICR = SSP_ICR_BITMASK;
00368         if(SSP_GetDataSize(SSPx)>8)
00369                 dataword = 1;
00370         else dataword = 0;
00371
00372         // Polling mode ----------------------------------------------------------------------
00373         if (xfType == SSP_TRANSFER_POLLING){
00374                 if (dataword == 0){
00375                         rdata8 = (uint8_t *)dataCfg->rx_data;
00376                         wdata8 = (uint8_t *)dataCfg->tx_data;
00377                 } else {
00378                         rdata16 = (uint16_t *)dataCfg->rx_data;
00379                         wdata16 = (uint16_t *)dataCfg->tx_data;
00380                 }
00381                 while ((dataCfg->tx_cnt < dataCfg->length) || (dataCfg->rx_cnt < dataCfg->length)){
00382                         if ((SSPx->SR & SSP_SR_TNF) && (dataCfg->tx_cnt < dataCfg->length)){
00383                                 // Write data to buffer
00384                                 if(dataCfg->tx_data == NULL){
00385                                         if (dataword == 0){
00386                                                 SSP_SendData(SSPx, 0xFF);
00387                                                 dataCfg->tx_cnt++;
00388                                         } else {
00389                                                 SSP_SendData(SSPx, 0xFFFF);
00390                                                 dataCfg->tx_cnt += 2;
00391                                         }
00392                                 } else {
00393                                         if (dataword == 0){
00394                                                 SSP_SendData(SSPx, *wdata8);
00395                                                 wdata8++;
00396                                                 dataCfg->tx_cnt++;
00397                                         } else {
00398                                                 SSP_SendData(SSPx, *wdata16);
00399                                                 wdata16++;
00400                                                 dataCfg->tx_cnt += 2;
00401                                         }
00402                                 }
00403                         }
00404
00405                         // Check overrun error
00406                         if ((stat = SSPx->RIS) & SSP_RIS_ROR){
00407                                 // save status and return
00408                                 dataCfg->status = stat | SSP_STAT_ERROR;
00409                                 return (-1);
00410                         }
00411
00412                         // Check for any data available in RX FIFO
00413                         while ((SSPx->SR & SSP_SR_RNE) && (dataCfg->rx_cnt < dataCfg->length)){
00414                                 // Read data from SSP data
00415                                 tmp = SSP_ReceiveData(SSPx);
00416
00417                                 // Store data to destination
00418                                 if (dataCfg->rx_data != NULL)
00419                                 {
00420                                         if (dataword == 0){
00421                                                 *(rdata8) = (uint8_t) tmp;
00422                                                 rdata8++;
00423                                         } else {
00424                                                 *(rdata16) = (uint16_t) tmp;
00425                                                 rdata16++;
00426                                         }
00427                                 }
00428                                 // Increase counter
00429                                 if (dataword == 0){
00430                                         dataCfg->rx_cnt++;
00431                                 } else {
00432                                         dataCfg->rx_cnt += 2;
00433                                 }
00434                         }
00435                 }
00436
00437                 // save status
00438                 dataCfg->status = SSP_STAT_DONE;
00439
00440                 if (dataCfg->tx_data != NULL){
00441                         return dataCfg->tx_cnt;
00442                 } else if (dataCfg->rx_data != NULL){
00443                         return dataCfg->rx_cnt;
00444                 } else {
00445                         return (0);
00446                 }
00447         }
00448
00449         // Interrupt mode ----------------------------------------------------------------------
00450         else if (xfType == SSP_TRANSFER_INTERRUPT){
00451
00452                 while ((SSPx->SR & SSP_SR_TNF) && (dataCfg->tx_cnt < dataCfg->length)){
00453                         // Write data to buffer
00454                         if(dataCfg->tx_data == NULL){
00455                                 if (dataword == 0){
00456                                         SSP_SendData(SSPx, 0xFF);
00457                                         dataCfg->tx_cnt++;
00458                                 } else {
00459                                         SSP_SendData(SSPx, 0xFFFF);
00460                                         dataCfg->tx_cnt += 2;
00461                                 }
00462                         } else {
00463                                 if (dataword == 0){
00464                                         SSP_SendData(SSPx, (*(uint8_t *)((uint32_t)dataCfg->tx_data + dataCfg->tx_cnt)));
00465                                         dataCfg->tx_cnt++;
00466                                 } else {
00467                                         SSP_SendData(SSPx, (*(uint16_t *)((uint32_t)dataCfg->tx_data + dataCfg->tx_cnt)));
00468                                         dataCfg->tx_cnt += 2;
00469                                 }
00470                         }
00471
00472                         // Check error
00473                         if ((stat = SSPx->RIS) & SSP_RIS_ROR){
00474                                 // save status and return
00475                                 dataCfg->status = stat | SSP_STAT_ERROR;
00476                                 return (-1);
00477                         }
00478
00479                         // Check for any data available in RX FIFO
00480                         while ((SSPx->SR & SSP_SR_RNE) && (dataCfg->rx_cnt < dataCfg->length)){
00481                                 // Read data from SSP data
00482                                 tmp = SSP_ReceiveData(SSPx);
00483
00484                                 // Store data to destination
00485                                 if (dataCfg->rx_data != NULL)
00486                                 {
00487                                         if (dataword == 0){
00488                                                 *(uint8_t *)((uint32_t)dataCfg->rx_data + dataCfg->rx_cnt) = (uint8_t) tmp;
00489                                         } else {
00490                                                 *(uint16_t *)((uint32_t)dataCfg->rx_data + dataCfg->rx_cnt) = (uint16_t) tmp;
00491                                         }
00492                                 }
00493                                 // Increase counter
00494                                 if (dataword == 0){
00495                                         dataCfg->rx_cnt++;
00496                                 } else {
00497                                         dataCfg->rx_cnt += 2;
00498                                 }
00499                         }
00500                 }
00501
00502                 // If there more data to sent or receive
00503                 if ((dataCfg->rx_cnt < dataCfg->length) || (dataCfg->tx_cnt < dataCfg->length)){
00504                         // Enable all interrupt
00505                         SSPx->IMSC = SSP_IMSC_BITMASK;
00506                 } else {
00507                         // Save status
00508                         dataCfg->status = SSP_STAT_DONE;
00509                 }
00510                 return (0);
00511         }
00512
00513         return (-1);
00514 }
00515
00516 /*********************************************************************/
00530 FlagStatus SSP_GetStatus(LPC_SSP_TypeDef* SSPx, uint32_t FlagType)
00531 {
00532         CHECK_PARAM(PARAM_SSPx(SSPx));
00533         CHECK_PARAM(PARAM_SSP_STAT(FlagType));
00534
00535         return ((SSPx->SR & FlagType) ? SET : RESET);
00536 }
00537
00538 /*********************************************************************/
00554 void SSP_IntConfig(LPC_SSP_TypeDef *SSPx, uint32_t IntType, FunctionalState NewState)
00555 {
00556         CHECK_PARAM(PARAM_SSPx(SSPx));
00557
00558         if (NewState == ENABLE)
00559         {
00560                 SSPx->IMSC |= IntType;
00561         }
00562         else
00563         {
00564                 SSPx->IMSC &= (~IntType) & SSP_IMSC_BITMASK;
00565         }
00566 }
00567
00568 /*********************************************************************/
00583 IntStatus SSP_GetRawIntStatus(LPC_SSP_TypeDef *SSPx, uint32_t RawIntType)
00584 {
00585         CHECK_PARAM(PARAM_SSPx(SSPx));
00586         CHECK_PARAM(PARAM_SSP_INTSTAT_RAW(RawIntType));
00587
00588         return ((SSPx->RIS & RawIntType) ? SET : RESET);
00589 }
00590
00591 /*********************************************************************/
00598 uint32_t SSP_GetRawIntStatusReg(LPC_SSP_TypeDef *SSPx)
00599 {
00600         CHECK_PARAM(PARAM_SSPx(SSPx));
00601         return (SSPx->RIS);
00602 }
00603
00604 /*********************************************************************/
00619 IntStatus SSP_GetIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t IntType)
00620 {
00621         CHECK_PARAM(PARAM_SSPx(SSPx));
00622         CHECK_PARAM(PARAM_SSP_INTSTAT(IntType));
00623
00624         return ((SSPx->MIS & IntType) ? SET :RESET);
00625 }
00626
00627 /*********************************************************************/
00639 void SSP_ClearIntPending(LPC_SSP_TypeDef *SSPx, uint32_t IntType)
00640 {
00641         CHECK_PARAM(PARAM_SSPx(SSPx));
00642         CHECK_PARAM(PARAM_SSP_INTCLR(IntType));
00643
00644         SSPx->ICR = IntType;
00645 }
00646
00647 /*********************************************************************/
00661 void SSP_DMACmd(LPC_SSP_TypeDef *SSPx, uint32_t DMAMode, FunctionalState NewState)
00662 {
00663         CHECK_PARAM(PARAM_SSPx(SSPx));
00664         CHECK_PARAM(PARAM_SSP_DMA(DMAMode));
00665         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00666
00667         if (NewState == ENABLE)
00668         {
00669                 SSPx->DMACR |= DMAMode;
00670         }
00671         else
00672         {
00673                 SSPx->DMACR &= (~DMAMode) & SSP_DMA_BITMASK;
00674         }
00675 }
00676
00681 #endif /* _SSP */
00682
00687 /* --------------------------------- End Of File ------------------------------ */
00688
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_ssp.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_ssp.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_ssp.h                           2010-06-18
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_SSP_H_
00034 #define LPC17XX_SSP_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046 /* Public Macros -------------------------------------------------------------- */
00051 /*********************************************************************/
00055 #define SSP_CPHA_FIRST                  ((uint32_t)(0))
00056 #define SSP_CPHA_SECOND                 SSP_CR0_CPHA_SECOND
00057
00058
00060 /* There's no bug here!!!
00061  * - If bit[6] in SSPnCR0 is 0: SSP controller maintains the bus clock low between frames.
00062  * That means the active clock is in HI state.
00063  * - If bit[6] in SSPnCR0 is 1 (SSP_CR0_CPOL_HI): SSP controller maintains the bus clock
00064  * high between frames. That means the active clock is in LO state.
00065  */
00066 #define SSP_CPOL_HI                             ((uint32_t)(0))
00067 #define SSP_CPOL_LO                             SSP_CR0_CPOL_HI
00068
00070 #define SSP_SLAVE_MODE                  SSP_CR1_SLAVE_EN
00071 #define SSP_MASTER_MODE                 ((uint32_t)(0))
00072
00074 #define SSP_DATABIT_4           SSP_CR0_DSS(4)
00075 #define SSP_DATABIT_5           SSP_CR0_DSS(5)
00076 #define SSP_DATABIT_6           SSP_CR0_DSS(6)
00077 #define SSP_DATABIT_7           SSP_CR0_DSS(7)
00078 #define SSP_DATABIT_8           SSP_CR0_DSS(8)
00079 #define SSP_DATABIT_9           SSP_CR0_DSS(9)
00080 #define SSP_DATABIT_10          SSP_CR0_DSS(10)
00081 #define SSP_DATABIT_11          SSP_CR0_DSS(11)
00082 #define SSP_DATABIT_12          SSP_CR0_DSS(12)
00083 #define SSP_DATABIT_13          SSP_CR0_DSS(13)
00084 #define SSP_DATABIT_14          SSP_CR0_DSS(14)
00085 #define SSP_DATABIT_15          SSP_CR0_DSS(15)
00086 #define SSP_DATABIT_16          SSP_CR0_DSS(16)
00090 #define SSP_FRAME_SPI           SSP_CR0_FRF_SPI
00091
00092 #define SSP_FRAME_TI            SSP_CR0_FRF_TI
00093
00094 #define SSP_FRAME_MICROWIRE     SSP_CR0_FRF_MICROWIRE
00095
00096 /*********************************************************************/
00100 #define SSP_STAT_TXFIFO_EMPTY           SSP_SR_TFE
00101
00102 #define SSP_STAT_TXFIFO_NOTFULL         SSP_SR_TNF
00103
00104 #define SSP_STAT_RXFIFO_NOTEMPTY        SSP_SR_RNE
00105
00106 #define SSP_STAT_RXFIFO_FULL            SSP_SR_RFF
00107
00108 #define SSP_STAT_BUSY                           SSP_SR_BSY
00109
00110 /*********************************************************************/
00114 #define SSP_INTCFG_ROR          SSP_IMSC_ROR
00115
00116 #define SSP_INTCFG_RT           SSP_IMSC_RT
00117
00118 #define SSP_INTCFG_RX           SSP_IMSC_RX
00119
00120 #define SSP_INTCFG_TX           SSP_IMSC_TX
00121
00122 /*********************************************************************/
00126 #define SSP_INTSTAT_ROR         SSP_MIS_ROR
00127
00128 #define SSP_INTSTAT_RT          SSP_MIS_RT
00129
00130 #define SSP_INTSTAT_RX          SSP_MIS_RX
00131
00132 #define SSP_INTSTAT_TX          SSP_MIS_TX
00133
00134 /*********************************************************************/
00138 #define SSP_INTSTAT_RAW_ROR             SSP_RIS_ROR
00139
00140 #define SSP_INTSTAT_RAW_RT              SSP_RIS_RT
00141
00142 #define SSP_INTSTAT_RAW_RX              SSP_RIS_RX
00143
00144 #define SSP_INTSTAT_RAW_TX              SSP_RIS_TX
00145
00146 /*********************************************************************/
00151 #define SSP_INTCLR_ROR          SSP_ICR_ROR
00152
00154 #define SSP_INTCLR_RT           SSP_ICR_RT
00155
00156 /*********************************************************************/
00160 #define SSP_DMA_RX              SSP_DMA_RXDMA_EN
00161
00162 #define SSP_DMA_TX              SSP_DMA_TXDMA_EN
00163
00164 /* SSP Status Implementation definitions */
00165 #define SSP_STAT_DONE           (1UL<<8)
00166 #define SSP_STAT_ERROR          (1UL<<9)
00172 /* Private Macros ------------------------------------------------------------- */
00173
00177 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00178 /*********************************************************************/
00182 #define SSP_CR0_DSS(n)                  ((uint32_t)((n-1)&0xF))
00183
00184 #define SSP_CR0_FRF_SPI                 ((uint32_t)(0<<4))
00185
00186 #define SSP_CR0_FRF_TI                  ((uint32_t)(1<<4))
00187
00188 #define SSP_CR0_FRF_MICROWIRE   ((uint32_t)(2<<4))
00189
00191 #define SSP_CR0_CPOL_HI         ((uint32_t)(1<<6))
00192
00194 #define SSP_CR0_CPHA_SECOND     ((uint32_t)(1<<7))
00195
00197 #define SSP_CR0_SCR(n)          ((uint32_t)((n&0xFF)<<8))
00198
00199 #define SSP_CR0_BITMASK         ((uint32_t)(0xFFFF))
00200
00201 /*********************************************************************/
00205 #define SSP_CR1_LBM_EN          ((uint32_t)(1<<0))
00206
00207 #define SSP_CR1_SSP_EN          ((uint32_t)(1<<1))
00208
00209 #define SSP_CR1_SLAVE_EN        ((uint32_t)(1<<2))
00210
00212 #define SSP_CR1_SO_DISABLE      ((uint32_t)(1<<3))
00213
00214 #define SSP_CR1_BITMASK         ((uint32_t)(0x0F))
00215
00216 /*********************************************************************/
00220 #define SSP_DR_BITMASK(n)   ((n)&0xFFFF)
00221
00222 /*********************************************************************/
00226 #define SSP_SR_TFE      ((uint32_t)(1<<0))
00227
00228 #define SSP_SR_TNF      ((uint32_t)(1<<1))
00229
00230 #define SSP_SR_RNE      ((uint32_t)(1<<2))
00231
00232 #define SSP_SR_RFF      ((uint32_t)(1<<3))
00233
00234 #define SSP_SR_BSY      ((uint32_t)(1<<4))
00235
00236 #define SSP_SR_BITMASK  ((uint32_t)(0x1F))
00237
00238 /*********************************************************************/
00242 #define SSP_CPSR_CPDVSR(n)      ((uint32_t)(n&0xFF))
00243
00244 #define SSP_CPSR_BITMASK        ((uint32_t)(0xFF))
00245
00246 /*********************************************************************/
00250 #define SSP_IMSC_ROR    ((uint32_t)(1<<0))
00251
00252 #define SSP_IMSC_RT             ((uint32_t)(1<<1))
00253
00254 #define SSP_IMSC_RX             ((uint32_t)(1<<2))
00255
00256 #define SSP_IMSC_TX             ((uint32_t)(1<<3))
00257
00258 #define SSP_IMSC_BITMASK        ((uint32_t)(0x0F))
00259
00260 /*********************************************************************/
00264 #define SSP_RIS_ROR             ((uint32_t)(1<<0))
00265
00266 #define SSP_RIS_RT              ((uint32_t)(1<<1))
00267
00268 #define SSP_RIS_RX              ((uint32_t)(1<<2))
00269
00270 #define SSP_RIS_TX              ((uint32_t)(1<<3))
00271
00272 #define SSP_RIS_BITMASK ((uint32_t)(0x0F))
00273
00274 /*********************************************************************/
00278 #define SSP_MIS_ROR             ((uint32_t)(1<<0))
00279
00280 #define SSP_MIS_RT              ((uint32_t)(1<<1))
00281
00282 #define SSP_MIS_RX              ((uint32_t)(1<<2))
00283
00284 #define SSP_MIS_TX              ((uint32_t)(1<<3))
00285
00286 #define SSP_MIS_BITMASK ((uint32_t)(0x0F))
00287
00288 /*********************************************************************/
00293 #define SSP_ICR_ROR             ((uint32_t)(1<<0))
00294
00296 #define SSP_ICR_RT              ((uint32_t)(1<<1))
00297
00298 #define SSP_ICR_BITMASK ((uint32_t)(0x03))
00299
00300 /*********************************************************************/
00304 #define SSP_DMA_RXDMA_EN        ((uint32_t)(1<<0))
00305
00306 #define SSP_DMA_TXDMA_EN        ((uint32_t)(1<<1))
00307
00308 #define SSP_DMA_BITMASK         ((uint32_t)(0x03))
00309
00310
00311 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00313 #define PARAM_SSPx(n)   ((((uint32_t *)n)==((uint32_t *)LPC_SSP0)) \
00314 || (((uint32_t *)n)==((uint32_t *)LPC_SSP1)))
00315
00317 #define PARAM_SSP_CPHA(n)               ((n==SSP_CPHA_FIRST) || (n==SSP_CPHA_SECOND))
00318
00320 #define PARAM_SSP_CPOL(n)               ((n==SSP_CPOL_HI) || (n==SSP_CPOL_LO))
00321
00322 /* Macro check master/slave mode */
00323 #define PARAM_SSP_MODE(n)               ((n==SSP_SLAVE_MODE) || (n==SSP_MASTER_MODE))
00324
00325 /* Macro check databit value */
00326 #define PARAM_SSP_DATABIT(n)    ((n==SSP_DATABIT_4) || (n==SSP_DATABIT_5) \
00327 || (n==SSP_DATABIT_6) || (n==SSP_DATABIT_16) \
00328 || (n==SSP_DATABIT_7) || (n==SSP_DATABIT_8) \
00329 || (n==SSP_DATABIT_9) || (n==SSP_DATABIT_10) \
00330 || (n==SSP_DATABIT_11) || (n==SSP_DATABIT_12) \
00331 || (n==SSP_DATABIT_13) || (n==SSP_DATABIT_14) \
00332 || (n==SSP_DATABIT_15))
00333
00334 /* Macro check frame type */
00335 #define PARAM_SSP_FRAME(n) ((n==SSP_FRAME_SPI) || (n==SSP_FRAME_TI)\
00336 || (n==SSP_FRAME_MICROWIRE))
00337
00338 /* Macro check SSP status */
00339 #define PARAM_SSP_STAT(n) ((n==SSP_STAT_TXFIFO_EMPTY) || (n==SSP_STAT_TXFIFO_NOTFULL) \
00340 || (n==SSP_STAT_RXFIFO_NOTEMPTY) || (n==SSP_STAT_RXFIFO_FULL) \
00341 || (n==SSP_STAT_BUSY))
00342
00343 /* Macro check interrupt configuration */
00344 #define PARAM_SSP_INTCFG(n)     ((n==SSP_INTCFG_ROR) || (n==SSP_INTCFG_RT) \
00345 || (n==SSP_INTCFG_RX) || (n==SSP_INTCFG_TX))
00346
00347 /* Macro check interrupt status value */
00348 #define PARAM_SSP_INTSTAT(n) ((n==SSP_INTSTAT_ROR) || (n==SSP_INTSTAT_RT) \
00349 || (n==SSP_INTSTAT_RX) || (n==SSP_INTSTAT_TX))
00350
00351 /* Macro check interrupt status raw value */
00352 #define PARAM_SSP_INTSTAT_RAW(n)        ((n==SSP_INTSTAT_RAW_ROR) || (n==SSP_INTSTAT_RAW_RT) \
00353 || (n==SSP_INTSTAT_RAW_RX) || (n==SSP_INTSTAT_RAW_TX))
00354
00355 /* Macro check interrupt clear mode */
00356 #define PARAM_SSP_INTCLR(n)     ((n==SSP_INTCLR_ROR) || (n==SSP_INTCLR_RT))
00357
00358 /* Macro check DMA mode */
00359 #define PARAM_SSP_DMA(n)        ((n==SSP_DMA_TX) || (n==SSP_DMA_RX))
00360
00365 /* Public Types --------------------------------------------------------------- */
00371 typedef struct {
00372         uint32_t Databit;
00374         uint32_t CPHA;
00377         uint32_t CPOL;
00380         uint32_t Mode;
00383         uint32_t FrameFormat;
00387         uint32_t ClockRate;
00388 } SSP_CFG_Type;
00389
00393 typedef enum {
00394         SSP_TRANSFER_POLLING = 0,
00395         SSP_TRANSFER_INTERRUPT
00396 } SSP_TRANSFER_Type;
00397
00401 typedef struct {
00402         void *tx_data;
00403         uint32_t tx_cnt;
00404         void *rx_data;
00405         uint32_t rx_cnt;
00406         uint32_t length;
00407         uint32_t status;
00408 } SSP_DATA_SETUP_Type;
00409
00410
00416 /* Public Functions ----------------------------------------------------------- */
00421 /* SSP Init/DeInit functions --------------------------------------------------*/
00422 void SSP_Init(LPC_SSP_TypeDef *SSPx, SSP_CFG_Type *SSP_ConfigStruct);
00423 void SSP_DeInit(LPC_SSP_TypeDef* SSPx);
00424
00425 /* SSP configure functions ----------------------------------------------------*/
00426 void SSP_ConfigStructInit(SSP_CFG_Type *SSP_InitStruct);
00427
00428 /* SSP enable/disable functions -----------------------------------------------*/
00429 void SSP_Cmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState);
00430 void SSP_LoopBackCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState);
00431 void SSP_SlaveOutputCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState);
00432 void SSP_DMACmd(LPC_SSP_TypeDef *SSPx, uint32_t DMAMode, FunctionalState NewState);
00433
00434 /* SSP get information functions ----------------------------------------------*/
00435 FlagStatus SSP_GetStatus(LPC_SSP_TypeDef* SSPx, uint32_t FlagType);
00436 uint8_t SSP_GetDataSize(LPC_SSP_TypeDef* SSPx);
00437 IntStatus SSP_GetRawIntStatus(LPC_SSP_TypeDef *SSPx, uint32_t RawIntType);
00438 uint32_t SSP_GetRawIntStatusReg(LPC_SSP_TypeDef *SSPx);
00439 IntStatus SSP_GetIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t IntType);
00440
00441 /* SSP transfer data functions ------------------------------------------------*/
00442 void SSP_SendData(LPC_SSP_TypeDef* SSPx, uint16_t Data);
00443 uint16_t SSP_ReceiveData(LPC_SSP_TypeDef* SSPx);
00444 int32_t SSP_ReadWrite (LPC_SSP_TypeDef *SSPx, SSP_DATA_SETUP_Type *dataCfg, \
00445                                                 SSP_TRANSFER_Type xfType);
00446
00447 /* SSP IRQ function ------------------------------------------------------------*/
00448 void SSP_IntConfig(LPC_SSP_TypeDef *SSPx, uint32_t IntType, FunctionalState NewState);
00449 void SSP_ClearIntPending(LPC_SSP_TypeDef *SSPx, uint32_t IntType);
00450
00451
00456 #ifdef __cplusplus
00457 }
00458 #endif
00459
00460 #endif /* LPC17XX_SSP_H_ */
00461
00466 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_systick.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_systick.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_systick.c                               2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_systick.h"
00034 #include "lpc17xx_clkpwr.h"
00035
00036 /* If this source file built with example, the LPC17xx FW library configuration
00037  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00038  * otherwise the default FW library configuration file must be included instead
00039  */
00040 #ifdef __BUILD_WITH_EXAMPLE__
00041 #include "lpc17xx_libcfg.h"
00042 #else
00043 #include "lpc17xx_libcfg_default.h"
00044 #endif /* __BUILD_WITH_EXAMPLE__ */
00045
00046
00047 #ifdef _SYSTICK
00048
00049 /* Public Functions ----------------------------------------------------------- */
00053 /*********************************************************************/
00058 void SYSTICK_InternalInit(uint32_t time)
00059 {
00060         uint32_t cclk;
00061         float maxtime;
00062
00063         cclk = SystemCoreClock;
00064         /* With internal CPU clock frequency for LPC17xx is 'SystemCoreClock'
00065          * And limit 24 bit for RELOAD value
00066          * So the maximum time can be set:
00067          * 1/SystemCoreClock * (2^24) * 1000 (ms)
00068          */
00069         //check time value is available or not
00070         maxtime = (1<<24)/(SystemCoreClock / 1000) ;
00071         if(time > maxtime)
00072                 //Error loop
00073                 while(1);
00074         else
00075         {
00076                 //Select CPU clock is System Tick clock source
00077                 SysTick->CTRL |= ST_CTRL_CLKSOURCE;
00078                 /* Set RELOAD value
00079                  * RELOAD = (SystemCoreClock/1000) * time - 1
00080                  * with time base is millisecond
00081                  */
00082                 SysTick->LOAD = (cclk/1000)*time - 1;
00083         }
00084 }
00085
00086 /*********************************************************************/
00092 void SYSTICK_ExternalInit(uint32_t freq, uint32_t time)
00093 {
00094         float maxtime;
00095
00096         /* With external clock frequency for LPC17xx is 'freq'
00097          * And limit 24 bit for RELOAD value
00098          * So the maximum time can be set:
00099          * 1/freq * (2^24) * 1000 (ms)
00100          */
00101         //check time value is available or not
00102         maxtime = (1<<24)/(freq / 1000) ;
00103         if (time>maxtime)
00104                 //Error Loop
00105                 while(1);
00106         else
00107         {
00108                 //Select external clock is System Tick clock source
00109                 SysTick->CTRL &= ~ ST_CTRL_CLKSOURCE;
00110                 /* Set RELOAD value
00111                  * RELOAD = (freq/1000) * time - 1
00112                  * with time base is millisecond
00113                  */
00114                 maxtime = (freq/1000)*time - 1;
00115                 SysTick->LOAD = (freq/1000)*time - 1;
00116         }
00117 }
00118
00119 /*********************************************************************/
00126 void SYSTICK_Cmd(FunctionalState NewState)
00127 {
00128         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00129
00130         if(NewState == ENABLE)
00131                 //Enable System Tick counter
00132                 SysTick->CTRL |= ST_CTRL_ENABLE;
00133         else
00134                 //Disable System Tick counter
00135                 SysTick->CTRL &= ~ST_CTRL_ENABLE;
00136 }
00137
00138 /*********************************************************************/
00145 void SYSTICK_IntCmd(FunctionalState NewState)
00146 {
00147         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00148
00149         if(NewState == ENABLE)
00150                 //Enable System Tick counter
00151                 SysTick->CTRL |= ST_CTRL_TICKINT;
00152         else
00153                 //Disable System Tick counter
00154                 SysTick->CTRL &= ~ST_CTRL_TICKINT;
00155 }
00156
00157 /*********************************************************************/
00162 uint32_t SYSTICK_GetCurrentValue(void)
00163 {
00164         return (SysTick->VAL);
00165 }
00166
00167 /*********************************************************************/
00172 void SYSTICK_ClearCounterFlag(void)
00173 {
00174         SysTick->CTRL &= ~ST_CTRL_COUNTFLAG;
00175 }
00180 #endif /* _SYSTICK */
00181
00186 /* --------------------------------- End Of File ------------------------------ */
00187
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_systick.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_systick.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_systick.h                               2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_SYSTICK_H_
00034 #define LPC17XX_SYSTICK_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046
00047 /* Private Macros ------------------------------------------------------------- */
00051 /*********************************************************************/
00054 #define ST_CTRL_ENABLE          ((uint32_t)(1<<0))
00055 #define ST_CTRL_TICKINT         ((uint32_t)(1<<1))
00056 #define ST_CTRL_CLKSOURCE       ((uint32_t)(1<<2))
00057 #define ST_CTRL_COUNTFLAG       ((uint32_t)(1<<16))
00058
00059 /*********************************************************************/
00062 #define ST_RELOAD_RELOAD(n)             ((uint32_t)(n & 0x00FFFFFF))
00063
00064 /*********************************************************************/
00067 #define ST_RELOAD_CURRENT(n)    ((uint32_t)(n & 0x00FFFFFF))
00068
00069 /*********************************************************************/
00072 #define ST_CALIB_TENMS(n)               ((uint32_t)(n & 0x00FFFFFF))
00073 #define ST_CALIB_SKEW                   ((uint32_t)(1<<30))
00074 #define ST_CALIB_NOREF                  ((uint32_t)(1<<31))
00075
00076 #define CLKSOURCE_EXT                   ((uint32_t)(0))
00077 #define CLKSOURCE_CPU                   ((uint32_t)(1))
00078
00084 /* Public Functions ----------------------------------------------------------- */
00089 void SYSTICK_InternalInit(uint32_t time);
00090 void SYSTICK_ExternalInit(uint32_t freq, uint32_t time);
00091
00092 void SYSTICK_Cmd(FunctionalState NewState);
00093 void SYSTICK_IntCmd(FunctionalState NewState);
00094 uint32_t SYSTICK_GetCurrentValue(void);
00095 void SYSTICK_ClearCounterFlag(void);
00096
00102 #ifdef __cplusplus
00103 }
00104 #endif
00105
00106
00107 #endif /* LPC17XX_SYSTICK_H_ */
00108
00113 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_timer.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_timer.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_timer.c                         2011-03-10
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_timer.h"
00034 #include "lpc17xx_clkpwr.h"
00035 #include "lpc17xx_pinsel.h"
00036
00037 /* If this source file built with example, the LPC17xx FW library configuration
00038  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00039  * otherwise the default FW library configuration file must be included instead
00040  */
00041 #ifdef __BUILD_WITH_EXAMPLE__
00042 #include "lpc17xx_libcfg.h"
00043 #else
00044 #include "lpc17xx_libcfg_default.h"
00045 #endif /* __BUILD_WITH_EXAMPLE__ */
00046
00047 #ifdef _TIM
00048
00049 /* Private Functions ---------------------------------------------------------- */
00050
00051 static uint32_t getPClock (uint32_t timernum);
00052 static uint32_t converUSecToVal (uint32_t timernum, uint32_t usec);
00053 static uint32_t converPtrToTimeNum (LPC_TIM_TypeDef *TIMx);
00054
00055
00056 /*********************************************************************/
00061 static uint32_t getPClock (uint32_t timernum)
00062 {
00063         uint32_t clkdlycnt;
00064         switch (timernum)
00065         {
00066         case 0:
00067                 clkdlycnt = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_TIMER0);
00068                 break;
00069
00070         case 1:
00071                 clkdlycnt = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_TIMER1);
00072                 break;
00073
00074         case 2:
00075                 clkdlycnt = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_TIMER2);
00076                 break;
00077
00078         case 3:
00079                 clkdlycnt = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_TIMER3);
00080                 break;
00081         }
00082         return clkdlycnt;
00083 }
00084
00085
00086 /*********************************************************************/
00092 uint32_t converUSecToVal (uint32_t timernum, uint32_t usec)
00093 {
00094         uint64_t clkdlycnt;
00095
00096         // Get Pclock of timer
00097         clkdlycnt = (uint64_t) getPClock(timernum);
00098
00099         clkdlycnt = (clkdlycnt * usec) / 1000000;
00100         return (uint32_t) clkdlycnt;
00101 }
00102
00103
00104 /*********************************************************************/
00113 uint32_t converPtrToTimeNum (LPC_TIM_TypeDef *TIMx)
00114 {
00115         uint32_t tnum = 0xFFFFFFFF;
00116
00117         if (TIMx == LPC_TIM0)
00118         {
00119                 tnum = 0;
00120         }
00121         else if (TIMx == LPC_TIM1)
00122         {
00123                 tnum = 1;
00124         }
00125         else if (TIMx == LPC_TIM2)
00126         {
00127                 tnum = 2;
00128         }
00129         else if (TIMx == LPC_TIM3)
00130         {
00131                 tnum = 3;
00132         }
00133
00134         return tnum;
00135 }
00136
00137 /* End of Private Functions ---------------------------------------------------- */
00138
00139
00140 /* Public Functions ----------------------------------------------------------- */
00145 /*********************************************************************/
00163 FlagStatus TIM_GetIntStatus(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
00164 {
00165         uint8_t temp;
00166         CHECK_PARAM(PARAM_TIMx(TIMx));
00167         CHECK_PARAM(PARAM_TIM_INT_TYPE(IntFlag));
00168         temp = (TIMx->IR)& TIM_IR_CLR(IntFlag);
00169         if (temp)
00170                 return SET;
00171
00172         return RESET;
00173
00174 }
00175 /*********************************************************************/
00193 FlagStatus TIM_GetIntCaptureStatus(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
00194 {
00195         uint8_t temp;
00196         CHECK_PARAM(PARAM_TIMx(TIMx));
00197         CHECK_PARAM(PARAM_TIM_INT_TYPE(IntFlag));
00198         temp = (TIMx->IR) & (1<<(4+IntFlag));
00199         if(temp)
00200                 return SET;
00201         return RESET;
00202 }
00203 /*********************************************************************/
00219 void TIM_ClearIntPending(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
00220 {
00221         CHECK_PARAM(PARAM_TIMx(TIMx));
00222         CHECK_PARAM(PARAM_TIM_INT_TYPE(IntFlag));
00223         TIMx->IR = TIM_IR_CLR(IntFlag);
00224 }
00225
00226 /*********************************************************************/
00242 void TIM_ClearIntCapturePending(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag)
00243 {
00244         CHECK_PARAM(PARAM_TIMx(TIMx));
00245         CHECK_PARAM(PARAM_TIM_INT_TYPE(IntFlag));
00246         TIMx->IR = (1<<(4+IntFlag));
00247 }
00248
00249 /*********************************************************************/
00260 void TIM_ConfigStructInit(TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct)
00261 {
00262         if (TimerCounterMode == TIM_TIMER_MODE )
00263         {
00264                 TIM_TIMERCFG_Type * pTimeCfg = (TIM_TIMERCFG_Type *)TIM_ConfigStruct;
00265                 pTimeCfg->PrescaleOption = TIM_PRESCALE_USVAL;
00266                 pTimeCfg->PrescaleValue = 1;
00267         }
00268         else
00269         {
00270                 TIM_COUNTERCFG_Type * pCounterCfg = (TIM_COUNTERCFG_Type *)TIM_ConfigStruct;
00271                 pCounterCfg->CountInputSelect = TIM_COUNTER_INCAP0;
00272         }
00273 }
00274
00275 /*********************************************************************/
00294 void TIM_Init(LPC_TIM_TypeDef *TIMx, TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct)
00295 {
00296         TIM_TIMERCFG_Type *pTimeCfg;
00297         TIM_COUNTERCFG_Type *pCounterCfg;
00298
00299         CHECK_PARAM(PARAM_TIMx(TIMx));
00300         CHECK_PARAM(PARAM_TIM_MODE_OPT(TimerCounterMode));
00301
00302         //set power
00303
00304         if (TIMx== LPC_TIM0)
00305         {
00306                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM0, ENABLE);
00307                 //PCLK_Timer0 = CCLK/4
00308                 CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER0, CLKPWR_PCLKSEL_CCLK_DIV_4);
00309         }
00310         else if (TIMx== LPC_TIM1)
00311         {
00312                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM1, ENABLE);
00313                 //PCLK_Timer1 = CCLK/4
00314                 CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER1, CLKPWR_PCLKSEL_CCLK_DIV_4);
00315
00316         }
00317
00318         else if (TIMx== LPC_TIM2)
00319         {
00320                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM2, ENABLE);
00321                 //PCLK_Timer2= CCLK/4
00322                 CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER2, CLKPWR_PCLKSEL_CCLK_DIV_4);
00323         }
00324         else if (TIMx== LPC_TIM3)
00325         {
00326                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM3, ENABLE);
00327                 //PCLK_Timer3= CCLK/4
00328                 CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER3, CLKPWR_PCLKSEL_CCLK_DIV_4);
00329
00330         }
00331
00332         TIMx->CCR &= ~TIM_CTCR_MODE_MASK;
00333         TIMx->CCR |= TIM_TIMER_MODE;
00334
00335         TIMx->TC =0;
00336         TIMx->PC =0;
00337         TIMx->PR =0;
00338         TIMx->TCR |= (1<<1); //Reset Counter
00339         TIMx->TCR &= ~(1<<1); //release reset
00340         if (TimerCounterMode == TIM_TIMER_MODE )
00341         {
00342                 pTimeCfg = (TIM_TIMERCFG_Type *)TIM_ConfigStruct;
00343                 if (pTimeCfg->PrescaleOption  == TIM_PRESCALE_TICKVAL)
00344                 {
00345                         TIMx->PR   = pTimeCfg->PrescaleValue -1  ;
00346                 }
00347                 else
00348                 {
00349                         TIMx->PR   = converUSecToVal (converPtrToTimeNum(TIMx),pTimeCfg->PrescaleValue)-1;
00350                 }
00351         }
00352         else
00353         {
00354
00355                 pCounterCfg = (TIM_COUNTERCFG_Type *)TIM_ConfigStruct;
00356                 TIMx->CCR  &= ~TIM_CTCR_INPUT_MASK;
00357                 if (pCounterCfg->CountInputSelect == TIM_COUNTER_INCAP1)
00358                         TIMx->CCR |= _BIT(2);
00359         }
00360
00361         // Clear interrupt pending
00362         TIMx->IR = 0xFFFFFFFF;
00363
00364 }
00365
00366 /*********************************************************************/
00375 void TIM_DeInit (LPC_TIM_TypeDef *TIMx)
00376 {
00377         CHECK_PARAM(PARAM_TIMx(TIMx));
00378         // Disable timer/counter
00379         TIMx->TCR = 0x00;
00380
00381         // Disable power
00382         if (TIMx== LPC_TIM0)
00383                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM0, DISABLE);
00384
00385         else if (TIMx== LPC_TIM1)
00386                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM1, DISABLE);
00387
00388         else if (TIMx== LPC_TIM2)
00389                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM2, DISABLE);
00390
00391         else if (TIMx== LPC_TIM3)
00392                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM2, DISABLE);
00393
00394 }
00395
00396 /*********************************************************************/
00408 void TIM_Cmd(LPC_TIM_TypeDef *TIMx, FunctionalState NewState)
00409 {
00410         CHECK_PARAM(PARAM_TIMx(TIMx));
00411         if (NewState == ENABLE)
00412         {
00413                 TIMx->TCR       |=  TIM_ENABLE;
00414         }
00415         else
00416         {
00417                 TIMx->TCR &= ~TIM_ENABLE;
00418         }
00419 }
00420
00421 /*********************************************************************/
00432 void TIM_ResetCounter(LPC_TIM_TypeDef *TIMx)
00433 {
00434         CHECK_PARAM(PARAM_TIMx(TIMx));
00435         TIMx->TCR |= TIM_RESET;
00436         TIMx->TCR &= ~TIM_RESET;
00437 }
00438
00439 /*********************************************************************/
00462 void TIM_ConfigMatch(LPC_TIM_TypeDef *TIMx, TIM_MATCHCFG_Type *TIM_MatchConfigStruct)
00463 {
00464
00465         CHECK_PARAM(PARAM_TIMx(TIMx));
00466         CHECK_PARAM(PARAM_TIM_EXTMATCH_OPT(TIM_MatchConfigStruct->ExtMatchOutputType));
00467
00468         switch(TIM_MatchConfigStruct->MatchChannel)
00469         {
00470         case 0:
00471                 TIMx->MR0 = TIM_MatchConfigStruct->MatchValue;
00472                 break;
00473         case 1:
00474                 TIMx->MR1 = TIM_MatchConfigStruct->MatchValue;
00475                 break;
00476         case 2:
00477                 TIMx->MR2 = TIM_MatchConfigStruct->MatchValue;
00478                 break;
00479         case 3:
00480                 TIMx->MR3 = TIM_MatchConfigStruct->MatchValue;
00481                 break;
00482         default:
00483                 //Error match value
00484                 //Error loop
00485                 while(1);
00486         }
00487         //interrupt on MRn
00488         TIMx->MCR &=~TIM_MCR_CHANNEL_MASKBIT(TIM_MatchConfigStruct->MatchChannel);
00489
00490         if (TIM_MatchConfigStruct->IntOnMatch)
00491                 TIMx->MCR |= TIM_INT_ON_MATCH(TIM_MatchConfigStruct->MatchChannel);
00492
00493         //reset on MRn
00494         if (TIM_MatchConfigStruct->ResetOnMatch)
00495                 TIMx->MCR |= TIM_RESET_ON_MATCH(TIM_MatchConfigStruct->MatchChannel);
00496
00497         //stop on MRn
00498         if (TIM_MatchConfigStruct->StopOnMatch)
00499                 TIMx->MCR |= TIM_STOP_ON_MATCH(TIM_MatchConfigStruct->MatchChannel);
00500
00501         // match output type
00502
00503         TIMx->EMR       &= ~TIM_EM_MASK(TIM_MatchConfigStruct->MatchChannel);
00504         TIMx->EMR   |= TIM_EM_SET(TIM_MatchConfigStruct->MatchChannel,TIM_MatchConfigStruct->ExtMatchOutputType);
00505 }
00506 /*********************************************************************/
00517 void TIM_UpdateMatchValue(LPC_TIM_TypeDef *TIMx,uint8_t MatchChannel, uint32_t MatchValue)
00518 {
00519         CHECK_PARAM(PARAM_TIMx(TIMx));
00520         switch(MatchChannel)
00521         {
00522         case 0:
00523                 TIMx->MR0 = MatchValue;
00524                 break;
00525         case 1:
00526                 TIMx->MR1 = MatchValue;
00527                 break;
00528         case 2:
00529                 TIMx->MR2 = MatchValue;
00530                 break;
00531         case 3:
00532                 TIMx->MR3 = MatchValue;
00533                 break;
00534         default:
00535                 //Error Loop
00536                 while(1);
00537         }
00538
00539 }
00540 /*********************************************************************/
00554 void TIM_ConfigCapture(LPC_TIM_TypeDef *TIMx, TIM_CAPTURECFG_Type *TIM_CaptureConfigStruct)
00555 {
00556
00557         CHECK_PARAM(PARAM_TIMx(TIMx));
00558         TIMx->CCR &= ~TIM_CCR_CHANNEL_MASKBIT(TIM_CaptureConfigStruct->CaptureChannel);
00559
00560         if (TIM_CaptureConfigStruct->RisingEdge)
00561                 TIMx->CCR |= TIM_CAP_RISING(TIM_CaptureConfigStruct->CaptureChannel);
00562
00563         if (TIM_CaptureConfigStruct->FallingEdge)
00564                 TIMx->CCR |= TIM_CAP_FALLING(TIM_CaptureConfigStruct->CaptureChannel);
00565
00566         if (TIM_CaptureConfigStruct->IntOnCaption)
00567                 TIMx->CCR |= TIM_INT_ON_CAP(TIM_CaptureConfigStruct->CaptureChannel);
00568 }
00569
00570 /*********************************************************************/
00582 uint32_t TIM_GetCaptureValue(LPC_TIM_TypeDef *TIMx, TIM_COUNTER_INPUT_OPT CaptureChannel)
00583 {
00584         CHECK_PARAM(PARAM_TIMx(TIMx));
00585         CHECK_PARAM(PARAM_TIM_COUNTER_INPUT_OPT(CaptureChannel));
00586
00587         if(CaptureChannel==0)
00588                 return TIMx->CR0;
00589         else
00590                 return TIMx->CR1;
00591 }
00592
00597 #endif /* _TIMER */
00598
00603 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_timer.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_timer.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_timer.h                         2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef __LPC17XX_TIMER_H_
00034 #define __LPC17XX_TIMER_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040 #ifdef __cplusplus
00041 extern "C"
00042 {
00043 #endif
00044
00045 /* Private Macros ------------------------------------------------------------- */
00050 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00051 /**********************************************************************
00052 ** Interrupt information
00053 **********************************************************************/
00055 #define TIM_IR_CLR(n) _BIT(n)
00056
00057 /**********************************************************************
00058 ** Timer interrupt register definitions
00059 **********************************************************************/
00061 #define TIM_MATCH_INT(n)                (_BIT(n & 0x0F))
00062
00063 #define TIM_CAP_INT(n)     (_BIT(((n & 0x0F) + 4)))
00064
00065 /**********************************************************************
00066 * Timer control register definitions
00067 **********************************************************************/
00069 #define TIM_ENABLE                      ((uint32_t)(1<<0))
00070
00071 #define TIM_RESET                       ((uint32_t)(1<<1))
00072
00073 #define TIM_TCR_MASKBIT         ((uint32_t)(3))
00074
00075 /**********************************************************************
00076 * Timer match control register definitions
00077 **********************************************************************/
00079 #define TIM_INT_ON_MATCH(n)             (_BIT((n * 3)))
00080
00081 #define TIM_RESET_ON_MATCH(n)           (_BIT(((n * 3) + 1)))
00082
00083 #define TIM_STOP_ON_MATCH(n)            (_BIT(((n * 3) + 2)))
00084
00085 #define TIM_MCR_MASKBIT                    ((uint32_t)(0x0FFF))
00086
00087 #define TIM_MCR_CHANNEL_MASKBIT(n)              ((uint32_t)(7<<(n*3)))
00088
00089 /**********************************************************************
00090 * Timer capture control register definitions
00091 **********************************************************************/
00093 #define TIM_CAP_RISING(n)       (_BIT((n * 3)))
00094
00095 #define TIM_CAP_FALLING(n)      (_BIT(((n * 3) + 1)))
00096
00097 #define TIM_INT_ON_CAP(n)       (_BIT(((n * 3) + 2)))
00098
00099 #define TIM_EDGE_MASK(n)                (_SBF((n * 3), 0x03))
00100
00101 #define TIM_CCR_MASKBIT                 ((uint32_t)(0x3F))
00102
00103 #define TIM_CCR_CHANNEL_MASKBIT(n)              ((uint32_t)(7<<(n*3)))
00104
00105 /**********************************************************************
00106 * Timer external match register definitions
00107 **********************************************************************/
00110 #define TIM_EM(n)                       _BIT(n)
00111
00112 #define TIM_EM_NOTHING          ((uint8_t)(0x0))
00113
00114 #define TIM_EM_LOW              ((uint8_t)(0x1))
00115
00116 #define TIM_EM_HIGH             ((uint8_t)(0x2))
00117
00118 #define TIM_EM_TOGGLE           ((uint8_t)(0x3))
00119
00120 #define TIM_EM_SET(n,s)         (_SBF(((n << 1) + 4), (s & 0x03)))
00121
00122 #define TIM_EM_MASK(n)          (_SBF(((n << 1) + 4), 0x03))
00123
00124 #define TIM_EMR_MASKBIT 0x0FFF
00125
00126 /**********************************************************************
00127 * Timer Count Control Register definitions
00128 **********************************************************************/
00130 #define TIM_CTCR_MODE_MASK  0x3
00131
00132 #define TIM_CTCR_INPUT_MASK 0xC
00133
00134 #define TIM_CTCR_MASKBIT        0xF
00135 #define TIM_COUNTER_MODE ((uint8_t)(1))
00136
00137
00138 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00140 #define PARAM_TIMx(n)   ((((uint32_t *)n)==((uint32_t *)LPC_TIM0)) || (((uint32_t *)n)==((uint32_t *)LPC_TIM1)) \
00141 || (((uint32_t *)n)==((uint32_t *)LPC_TIM2)) || (((uint32_t *)n)==((uint32_t *)LPC_TIM3)))
00142
00143 /* Macro check interrupt type */
00144 #define PARAM_TIM_INT_TYPE(TYPE)        ((TYPE ==TIM_MR0_INT)||(TYPE ==TIM_MR1_INT)\
00145 ||(TYPE ==TIM_MR2_INT)||(TYPE ==TIM_MR3_INT)\
00146 ||(TYPE ==TIM_CR0_INT)||(TYPE ==TIM_CR1_INT))
00147
00148 /* Macro check TIMER mode */
00149 #define PARAM_TIM_MODE_OPT(MODE)        ((MODE == TIM_TIMER_MODE)||(MODE == TIM_COUNTER_RISING_MODE)\
00150 || (MODE == TIM_COUNTER_RISING_MODE)||(MODE == TIM_COUNTER_RISING_MODE))
00151
00152 /* Macro check TIMER prescale value */
00153 #define PARAM_TIM_PRESCALE_OPT(OPT)     ((OPT == TIM_PRESCALE_TICKVAL)||(OPT == TIM_PRESCALE_USVAL))
00154
00155 /* Macro check TIMER counter intput mode */
00156 #define PARAM_TIM_COUNTER_INPUT_OPT(OPT)        ((OPT == TIM_COUNTER_INCAP0)||(OPT == TIM_COUNTER_INCAP1))
00157
00158 /* Macro check TIMER external match mode */
00159 #define PARAM_TIM_EXTMATCH_OPT(OPT)     ((OPT == TIM_EXTMATCH_NOTHING)||(OPT == TIM_EXTMATCH_LOW)\
00160 ||(OPT == TIM_EXTMATCH_HIGH)||(OPT == TIM_EXTMATCH_TOGGLE))
00161
00162 /* Macro check TIMER external match mode */
00163 #define PARAM_TIM_CAP_MODE_OPT(OPT)     ((OPT == TIM_CAPTURE_NONE)||(OPT == TIM_CAPTURE_RISING) \
00164 ||(OPT == TIM_CAPTURE_FALLING)||(OPT == TIM_CAPTURE_ANY))
00165
00171 /* Public Types --------------------------------------------------------------- */
00176 /***********************************************************************
00177  * Timer device enumeration
00178 **********************************************************************/
00180 typedef enum
00181 {
00182         TIM_MR0_INT =0,
00183         TIM_MR1_INT =1,
00184         TIM_MR2_INT =2,
00185         TIM_MR3_INT =3,
00186         TIM_CR0_INT =4,
00187         TIM_CR1_INT =5
00188 }TIM_INT_TYPE;
00189
00191 typedef enum
00192 {
00193         TIM_TIMER_MODE = 0,
00194         TIM_COUNTER_RISING_MODE,
00195         TIM_COUNTER_FALLING_MODE,
00196         TIM_COUNTER_ANY_MODE
00197 } TIM_MODE_OPT;
00198
00200 typedef enum
00201 {
00202         TIM_PRESCALE_TICKVAL = 0,
00203         TIM_PRESCALE_USVAL
00204 } TIM_PRESCALE_OPT;
00205
00207 typedef enum
00208 {
00209         TIM_COUNTER_INCAP0 = 0,
00210         TIM_COUNTER_INCAP1,
00211 } TIM_COUNTER_INPUT_OPT;
00212
00214 typedef enum
00215 {
00216         TIM_EXTMATCH_NOTHING = 0,
00217         TIM_EXTMATCH_LOW,
00218         TIM_EXTMATCH_HIGH,
00219         TIM_EXTMATCH_TOGGLE
00220 }TIM_EXTMATCH_OPT;
00221
00223 typedef enum {
00224         TIM_CAPTURE_NONE = 0,
00225         TIM_CAPTURE_RISING,
00226         TIM_CAPTURE_FALLING,
00227         TIM_CAPTURE_ANY
00228 } TIM_CAP_MODE_OPT;
00229
00231 typedef struct
00232 {
00233
00234         uint8_t PrescaleOption;
00238         uint8_t Reserved[3];
00239         uint32_t PrescaleValue;
00240 } TIM_TIMERCFG_Type;
00241
00243 typedef struct {
00244
00245         uint8_t CounterOption;
00249         uint8_t CountInputSelect;
00250         uint8_t Reserved[2];
00251 } TIM_COUNTERCFG_Type;
00252
00254 typedef struct {
00255         uint8_t MatchChannel;
00257         uint8_t IntOnMatch;
00261         uint8_t StopOnMatch;
00265         uint8_t ResetOnMatch;
00270         uint8_t ExtMatchOutputType;
00276         uint8_t Reserved[3];
00277         uint32_t MatchValue;
00278 } TIM_MATCHCFG_Type;
00279
00281 typedef struct {
00282         uint8_t CaptureChannel;
00284         uint8_t RisingEdge;
00288         uint8_t FallingEdge;
00292         uint8_t IntOnCaption;
00297 } TIM_CAPTURECFG_Type;
00298
00304 /* Public Functions ----------------------------------------------------------- */
00308 /* Init/DeInit TIM functions -----------*/
00309 void TIM_Init(LPC_TIM_TypeDef *TIMx, TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct);
00310 void TIM_DeInit(LPC_TIM_TypeDef *TIMx);
00311
00312 /* TIM interrupt functions -------------*/
00313 void TIM_ClearIntPending(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag);
00314 void TIM_ClearIntCapturePending(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag);
00315 FlagStatus TIM_GetIntStatus(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag);
00316 FlagStatus TIM_GetIntCaptureStatus(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag);
00317
00318 /* TIM configuration functions --------*/
00319 void TIM_ConfigStructInit(TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct);
00320 void TIM_ConfigMatch(LPC_TIM_TypeDef *TIMx, TIM_MATCHCFG_Type *TIM_MatchConfigStruct);
00321 void TIM_UpdateMatchValue(LPC_TIM_TypeDef *TIMx,uint8_t MatchChannel, uint32_t MatchValue);
00322 void TIM_SetMatchExt(LPC_TIM_TypeDef *TIMx,TIM_EXTMATCH_OPT ext_match );
00323 void TIM_ConfigCapture(LPC_TIM_TypeDef *TIMx, TIM_CAPTURECFG_Type *TIM_CaptureConfigStruct);
00324 void TIM_Cmd(LPC_TIM_TypeDef *TIMx, FunctionalState NewState);
00325
00326 uint32_t TIM_GetCaptureValue(LPC_TIM_TypeDef *TIMx, TIM_COUNTER_INPUT_OPT CaptureChannel);
00327 void TIM_ResetCounter(LPC_TIM_TypeDef *TIMx);
00328
00332 #ifdef __cplusplus
00333 }
00334 #endif
00335
00336 #endif /* __LPC17XX_TIMER_H_ */
00337
00342 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_uart.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_uart.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_uart.c                  2011-06-06
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_uart.h"
00034 #include "lpc17xx_clkpwr.h"
00035
00036 /* If this source file built with example, the LPC17xx FW library configuration
00037  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00038  * otherwise the default FW library configuration file must be included instead
00039  */
00040 #ifdef __BUILD_WITH_EXAMPLE__
00041 #include "lpc17xx_libcfg.h"
00042 #else
00043 #include "lpc17xx_libcfg_default.h"
00044 #endif /* __BUILD_WITH_EXAMPLE__ */
00045
00046
00047 #ifdef _UART
00048
00049 /* Private Functions ---------------------------------------------------------- */
00050
00051 static Status uart_set_divisors(LPC_UART_TypeDef *UARTx, uint32_t baudrate);
00052
00053
00054 /*********************************************************************/
00066 static Status uart_set_divisors(LPC_UART_TypeDef *UARTx, uint32_t baudrate)
00067 {
00068         Status errorStatus = ERROR;
00069
00070         uint32_t uClk;
00071         uint32_t d, m, bestd, bestm, tmp;
00072         uint64_t best_divisor, divisor;
00073         uint32_t current_error, best_error;
00074         uint32_t recalcbaud;
00075
00076         /* get UART block clock */
00077         if (UARTx == (LPC_UART_TypeDef *)LPC_UART0)
00078         {
00079                 uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART0);
00080         }
00081         else if (UARTx == (LPC_UART_TypeDef *)LPC_UART1)
00082         {
00083                 uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART1);
00084         }
00085         else if (UARTx == LPC_UART2)
00086         {
00087                 uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART2);
00088         }
00089         else if (UARTx == LPC_UART3)
00090         {
00091                 uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART3);
00092         }
00093
00094
00095         /* In the Uart IP block, baud rate is calculated using FDR and DLL-DLM registers
00096         * The formula is :
00097         * BaudRate= uClk * (mulFracDiv/(mulFracDiv+dividerAddFracDiv) / (16 * (DLL)
00098         * It involves floating point calculations. That's the reason the formulae are adjusted with
00099         * Multiply and divide method.*/
00100         /* The value of mulFracDiv and dividerAddFracDiv should comply to the following expressions:
00101         * 0 < mulFracDiv <= 15, 0 <= dividerAddFracDiv <= 15 */
00102         best_error = 0xFFFFFFFF; /* Worst case */
00103         bestd = 0;
00104         bestm = 0;
00105         best_divisor = 0;
00106         for (m = 1 ; m <= 15 ;m++)
00107         {
00108                 for (d = 0 ; d < m ; d++)
00109                 {
00110                   divisor = ((uint64_t)uClk<<28)*m/(baudrate*(m+d));
00111                   current_error = divisor & 0xFFFFFFFF;
00112
00113                   tmp = divisor>>32;
00114
00115                   /* Adjust error */
00116                   if(current_error > ((uint32_t)1<<31)){
00117                         current_error = -current_error;
00118                         tmp++;
00119                         }
00120
00121                   if(tmp<1 || tmp>65536) /* Out of range */
00122                   continue;
00123
00124                   if( current_error < best_error){
00125                         best_error = current_error;
00126                         best_divisor = tmp;
00127                         bestd = d;
00128                         bestm = m;
00129                         if(best_error == 0) break;
00130                         }
00131                 } /* end of inner for loop */
00132
00133                 if (best_error == 0)
00134                   break;
00135         } /* end of outer for loop  */
00136
00137         if(best_divisor == 0) return ERROR; /* can not find best match */
00138
00139         recalcbaud = (uClk>>4) * bestm/(best_divisor * (bestm + bestd));
00140
00141         /* reuse best_error to evaluate baud error*/
00142         if(baudrate>recalcbaud) best_error = baudrate - recalcbaud;
00143         else best_error = recalcbaud -baudrate;
00144
00145         best_error = best_error * 100 / baudrate;
00146
00147         if (best_error < UART_ACCEPTED_BAUDRATE_ERROR)
00148                 {
00149                         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00150                         {
00151                                 ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_DLAB_EN;
00152                                 ((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/DLM = UART_LOAD_DLM(best_divisor);
00153                                 ((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/DLL = UART_LOAD_DLL(best_divisor);
00154                                 /* Then reset DLAB bit */
00155                                 ((LPC_UART1_TypeDef *)UARTx)->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
00156                                 ((LPC_UART1_TypeDef *)UARTx)->FDR = (UART_FDR_MULVAL(bestm) \
00157                                                 | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;
00158                         }
00159                         else
00160                         {
00161                                 UARTx->LCR |= UART_LCR_DLAB_EN;
00162                                 UARTx->/*DLIER.*/DLM = UART_LOAD_DLM(best_divisor);
00163                                 UARTx->/*RBTHDLR.*/DLL = UART_LOAD_DLL(best_divisor);
00164                                 /* Then reset DLAB bit */
00165                                 UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
00166                                 UARTx->FDR = (UART_FDR_MULVAL(bestm) \
00167                                                 | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;
00168                         }
00169                         errorStatus = SUCCESS;
00170                 }
00171
00172                 return errorStatus;
00173 }
00174
00175 /* End of Private Functions ---------------------------------------------------- */
00176
00177
00178 /* Public Functions ----------------------------------------------------------- */
00182 /* UART Init/DeInit functions -------------------------------------------------*/
00183 /********************************************************************/
00196 void UART_Init(LPC_UART_TypeDef *UARTx, UART_CFG_Type *UART_ConfigStruct)
00197 {
00198         uint32_t tmp;
00199
00200         // For debug mode
00201         CHECK_PARAM(PARAM_UARTx(UARTx));
00202         CHECK_PARAM(PARAM_UART_DATABIT(UART_ConfigStruct->Databits));
00203         CHECK_PARAM(PARAM_UART_STOPBIT(UART_ConfigStruct->Stopbits));
00204         CHECK_PARAM(PARAM_UART_PARITY(UART_ConfigStruct->Parity));
00205
00206 #ifdef _UART0
00207         if(UARTx == (LPC_UART_TypeDef *)LPC_UART0)
00208         {
00209                 /* Set up clock and power for UART module */
00210                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, ENABLE);
00211         }
00212 #endif
00213
00214 #ifdef _UART1
00215         if(((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00216         {
00217                 /* Set up clock and power for UART module */
00218                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, ENABLE);
00219         }
00220 #endif
00221
00222 #ifdef _UART2
00223         if(UARTx == LPC_UART2)
00224         {
00225                 /* Set up clock and power for UART module */
00226                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, ENABLE);
00227         }
00228 #endif
00229
00230 #ifdef _UART3
00231         if(UARTx == LPC_UART3)
00232         {
00233                 /* Set up clock and power for UART module */
00234                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, ENABLE);
00235         }
00236 #endif
00237
00238         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00239         {
00240                 /* FIFOs are empty */
00241                 ((LPC_UART1_TypeDef *)UARTx)->/*IIFCR.*/FCR = ( UART_FCR_FIFO_EN \
00242                                 | UART_FCR_RX_RS | UART_FCR_TX_RS);
00243                 // Disable FIFO
00244                 ((LPC_UART1_TypeDef *)UARTx)->/*IIFCR.*/FCR = 0;
00245
00246                 // Dummy reading
00247                 while (((LPC_UART1_TypeDef *)UARTx)->LSR & UART_LSR_RDR)
00248                 {
00249                         tmp = ((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/RBR;
00250                 }
00251
00252                 ((LPC_UART1_TypeDef *)UARTx)->TER = UART_TER_TXEN;
00253                 // Wait for current transmit complete
00254                 while (!(((LPC_UART1_TypeDef *)UARTx)->LSR & UART_LSR_THRE));
00255                 // Disable Tx
00256                 ((LPC_UART1_TypeDef *)UARTx)->TER = 0;
00257
00258                 // Disable interrupt
00259                 ((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/IER = 0;
00260                 // Set LCR to default state
00261                 ((LPC_UART1_TypeDef *)UARTx)->LCR = 0;
00262                 // Set ACR to default state
00263                 ((LPC_UART1_TypeDef *)UARTx)->ACR = 0;
00264                 // Set Modem Control to default state
00265                 ((LPC_UART1_TypeDef *)UARTx)->MCR = 0;
00266                 // Set RS485 control to default state
00267                 ((LPC_UART1_TypeDef *)UARTx)->RS485CTRL = 0;
00268                 // Set RS485 delay timer to default state
00269                 ((LPC_UART1_TypeDef *)UARTx)->RS485DLY = 0;
00270                 // Set RS485 addr match to default state
00271                 ((LPC_UART1_TypeDef *)UARTx)->ADRMATCH = 0;
00272                 //Dummy Reading to Clear Status
00273                 tmp = ((LPC_UART1_TypeDef *)UARTx)->MSR;
00274                 tmp = ((LPC_UART1_TypeDef *)UARTx)->LSR;
00275         }
00276         else
00277         {
00278                 /* FIFOs are empty */
00279                 UARTx->/*IIFCR.*/FCR = ( UART_FCR_FIFO_EN | UART_FCR_RX_RS | UART_FCR_TX_RS);
00280                 // Disable FIFO
00281                 UARTx->/*IIFCR.*/FCR = 0;
00282
00283                 // Dummy reading
00284                 while (UARTx->LSR & UART_LSR_RDR)
00285                 {
00286                         tmp = UARTx->/*RBTHDLR.*/RBR;
00287                 }
00288
00289                 UARTx->TER = UART_TER_TXEN;
00290                 // Wait for current transmit complete
00291                 while (!(UARTx->LSR & UART_LSR_THRE));
00292                 // Disable Tx
00293                 UARTx->TER = 0;
00294
00295                 // Disable interrupt
00296                 UARTx->/*DLIER.*/IER = 0;
00297                 // Set LCR to default state
00298                 UARTx->LCR = 0;
00299                 // Set ACR to default state
00300                 UARTx->ACR = 0;
00301                 // Dummy reading
00302                 tmp = UARTx->LSR;
00303         }
00304
00305         if (UARTx == LPC_UART3)
00306         {
00307                 // Set IrDA to default state
00308                 UARTx->ICR = 0;
00309         }
00310
00311         // Set Line Control register ----------------------------
00312
00313         uart_set_divisors(UARTx, (UART_ConfigStruct->Baud_rate));
00314
00315         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00316         {
00317                 tmp = (((LPC_UART1_TypeDef *)UARTx)->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) \
00318                                 & UART_LCR_BITMASK;
00319         }
00320         else
00321         {
00322                 tmp = (UARTx->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) & UART_LCR_BITMASK;
00323         }
00324
00325         switch (UART_ConfigStruct->Databits){
00326         case UART_DATABIT_5:
00327                 tmp |= UART_LCR_WLEN5;
00328                 break;
00329         case UART_DATABIT_6:
00330                 tmp |= UART_LCR_WLEN6;
00331                 break;
00332         case UART_DATABIT_7:
00333                 tmp |= UART_LCR_WLEN7;
00334                 break;
00335         case UART_DATABIT_8:
00336         default:
00337                 tmp |= UART_LCR_WLEN8;
00338                 break;
00339         }
00340
00341         if (UART_ConfigStruct->Parity == UART_PARITY_NONE)
00342         {
00343                 // Do nothing...
00344         }
00345         else
00346         {
00347                 tmp |= UART_LCR_PARITY_EN;
00348                 switch (UART_ConfigStruct->Parity)
00349                 {
00350                 case UART_PARITY_ODD:
00351                         tmp |= UART_LCR_PARITY_ODD;
00352                         break;
00353
00354                 case UART_PARITY_EVEN:
00355                         tmp |= UART_LCR_PARITY_EVEN;
00356                         break;
00357
00358                 case UART_PARITY_SP_1:
00359                         tmp |= UART_LCR_PARITY_F_1;
00360                         break;
00361
00362                 case UART_PARITY_SP_0:
00363                         tmp |= UART_LCR_PARITY_F_0;
00364                         break;
00365                 default:
00366                         break;
00367                 }
00368         }
00369
00370         switch (UART_ConfigStruct->Stopbits){
00371         case UART_STOPBIT_2:
00372                 tmp |= UART_LCR_STOPBIT_SEL;
00373                 break;
00374         case UART_STOPBIT_1:
00375         default:
00376                 // Do no thing
00377                 break;
00378         }
00379
00380
00381         // Write back to LCR, configure FIFO and Disable Tx
00382         if (((LPC_UART1_TypeDef *)UARTx) ==  LPC_UART1)
00383         {
00384                 ((LPC_UART1_TypeDef *)UARTx)->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
00385         }
00386         else
00387         {
00388                 UARTx->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
00389         }
00390 }
00391
00392 /*********************************************************************/
00402 void UART_DeInit(LPC_UART_TypeDef* UARTx)
00403 {
00404         // For debug mode
00405         CHECK_PARAM(PARAM_UARTx(UARTx));
00406
00407         UART_TxCmd(UARTx, DISABLE);
00408
00409 #ifdef _UART0
00410         if (UARTx == (LPC_UART_TypeDef *)LPC_UART0)
00411         {
00412                 /* Set up clock and power for UART module */
00413                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, DISABLE);
00414         }
00415 #endif
00416
00417 #ifdef _UART1
00418         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00419         {
00420                 /* Set up clock and power for UART module */
00421                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, DISABLE);
00422         }
00423 #endif
00424
00425 #ifdef _UART2
00426         if (UARTx == LPC_UART2)
00427         {
00428                 /* Set up clock and power for UART module */
00429                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, DISABLE);
00430         }
00431 #endif
00432
00433 #ifdef _UART3
00434         if (UARTx == LPC_UART3)
00435         {
00436                 /* Set up clock and power for UART module */
00437                 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, DISABLE);
00438         }
00439 #endif
00440 }
00441
00442 /*****************************************************************************/
00452 void UART_ConfigStructInit(UART_CFG_Type *UART_InitStruct)
00453 {
00454         UART_InitStruct->Baud_rate = 9600;
00455         UART_InitStruct->Databits = UART_DATABIT_8;
00456         UART_InitStruct->Parity = UART_PARITY_NONE;
00457         UART_InitStruct->Stopbits = UART_STOPBIT_1;
00458 }
00459
00460 /* UART Send/Recieve functions -------------------------------------------------*/
00461 /*********************************************************************/
00471 void UART_SendByte(LPC_UART_TypeDef* UARTx, uint8_t Data)
00472 {
00473         CHECK_PARAM(PARAM_UARTx(UARTx));
00474
00475         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00476         {
00477                 ((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/THR = Data & UART_THR_MASKBIT;
00478         }
00479         else
00480         {
00481                 UARTx->/*RBTHDLR.*/THR = Data & UART_THR_MASKBIT;
00482         }
00483
00484 }
00485
00486
00487 /*********************************************************************/
00496 uint8_t UART_ReceiveByte(LPC_UART_TypeDef* UARTx)
00497 {
00498         CHECK_PARAM(PARAM_UARTx(UARTx));
00499
00500         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00501         {
00502                 return (((LPC_UART1_TypeDef *)UARTx)->/*RBTHDLR.*/RBR & UART_RBR_MASKBIT);
00503         }
00504         else
00505         {
00506                 return (UARTx->/*RBTHDLR.*/RBR & UART_RBR_MASKBIT);
00507         }
00508 }
00509
00510 /*********************************************************************/
00526 uint32_t UART_Send(LPC_UART_TypeDef *UARTx, uint8_t *txbuf,
00527                 uint32_t buflen, TRANSFER_BLOCK_Type flag)
00528 {
00529         uint32_t bToSend, bSent, timeOut, fifo_cnt;
00530         uint8_t *pChar = txbuf;
00531
00532         bToSend = buflen;
00533
00534         // blocking mode
00535         if (flag == BLOCKING) {
00536                 bSent = 0;
00537                 while (bToSend){
00538                         timeOut = UART_BLOCKING_TIMEOUT;
00539                         // Wait for THR empty with timeout
00540                         while (!(UARTx->LSR & UART_LSR_THRE)) {
00541                                 if (timeOut == 0) break;
00542                                 timeOut--;
00543                         }
00544                         // Time out!
00545                         if(timeOut == 0) break;
00546                         fifo_cnt = UART_TX_FIFO_SIZE;
00547                         while (fifo_cnt && bToSend){
00548                                 UART_SendByte(UARTx, (*pChar++));
00549                                 fifo_cnt--;
00550                                 bToSend--;
00551                                 bSent++;
00552                         }
00553                 }
00554         }
00555         // None blocking mode
00556         else {
00557                 bSent = 0;
00558                 while (bToSend) {
00559                         if (!(UARTx->LSR & UART_LSR_THRE)){
00560                                 break;
00561                         }
00562                         fifo_cnt = UART_TX_FIFO_SIZE;
00563                         while (fifo_cnt && bToSend) {
00564                                 UART_SendByte(UARTx, (*pChar++));
00565                                 bToSend--;
00566                                 fifo_cnt--;
00567                                 bSent++;
00568                         }
00569                 }
00570         }
00571         return bSent;
00572 }
00573
00574 /*********************************************************************/
00591 uint32_t UART_Receive(LPC_UART_TypeDef *UARTx, uint8_t *rxbuf, \
00592                 uint32_t buflen, TRANSFER_BLOCK_Type flag)
00593 {
00594         uint32_t bToRecv, bRecv, timeOut;
00595         uint8_t *pChar = rxbuf;
00596
00597         bToRecv = buflen;
00598
00599         // Blocking mode
00600         if (flag == BLOCKING) {
00601                 bRecv = 0;
00602                 while (bToRecv){
00603                         timeOut = UART_BLOCKING_TIMEOUT;
00604                         while (!(UARTx->LSR & UART_LSR_RDR)){
00605                                 if (timeOut == 0) break;
00606                                 timeOut--;
00607                         }
00608                         // Time out!
00609                         if(timeOut == 0) break;
00610                         // Get data from the buffer
00611                         (*pChar++) = UART_ReceiveByte(UARTx);
00612                         bToRecv--;
00613                         bRecv++;
00614                 }
00615         }
00616         // None blocking mode
00617         else {
00618                 bRecv = 0;
00619                 while (bToRecv) {
00620                         if (!(UARTx->LSR & UART_LSR_RDR)) {
00621                                 break;
00622                         } else {
00623                                 (*pChar++) = UART_ReceiveByte(UARTx);
00624                                 bRecv++;
00625                                 bToRecv--;
00626                         }
00627                 }
00628         }
00629         return bRecv;
00630 }
00631
00632 /*********************************************************************/
00642 void UART_ForceBreak(LPC_UART_TypeDef* UARTx)
00643 {
00644         CHECK_PARAM(PARAM_UARTx(UARTx));
00645
00646         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00647         {
00648                 ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_BREAK_EN;
00649         }
00650         else
00651         {
00652                 UARTx->LCR |= UART_LCR_BREAK_EN;
00653         }
00654 }
00655
00656
00657 /********************************************************************/
00679 void UART_IntConfig(LPC_UART_TypeDef *UARTx, UART_INT_Type UARTIntCfg, FunctionalState NewState)
00680 {
00681         uint32_t tmp;
00682
00683         CHECK_PARAM(PARAM_UARTx(UARTx));
00684         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00685
00686         switch(UARTIntCfg){
00687                 case UART_INTCFG_RBR:
00688                         tmp = UART_IER_RBRINT_EN;
00689                         break;
00690                 case UART_INTCFG_THRE:
00691                         tmp = UART_IER_THREINT_EN;
00692                         break;
00693                 case UART_INTCFG_RLS:
00694                         tmp = UART_IER_RLSINT_EN;
00695                         break;
00696                 case UART1_INTCFG_MS:
00697                         tmp = UART1_IER_MSINT_EN;
00698                         break;
00699                 case UART1_INTCFG_CTS:
00700                         tmp = UART1_IER_CTSINT_EN;
00701                         break;
00702                 case UART_INTCFG_ABEO:
00703                         tmp = UART_IER_ABEOINT_EN;
00704                         break;
00705                 case UART_INTCFG_ABTO:
00706                         tmp = UART_IER_ABTOINT_EN;
00707                         break;
00708         }
00709
00710         if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1)
00711         {
00712                 CHECK_PARAM((PARAM_UART_INTCFG(UARTIntCfg)) || (PARAM_UART1_INTCFG(UARTIntCfg)));
00713         }
00714         else
00715         {
00716                 CHECK_PARAM(PARAM_UART_INTCFG(UARTIntCfg));
00717         }
00718
00719         if (NewState == ENABLE)
00720         {
00721                 if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1)
00722                 {
00723                         ((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/IER |= tmp;
00724                 }
00725                 else
00726                 {
00727                         UARTx->/*DLIER.*/IER |= tmp;
00728                 }
00729         }
00730         else
00731         {
00732                 if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1)
00733                 {
00734                         ((LPC_UART1_TypeDef *)UARTx)->/*DLIER.*/IER &= (~tmp) & UART1_IER_BITMASK;
00735                 }
00736                 else
00737                 {
00738                         UARTx->/*DLIER.*/IER &= (~tmp) & UART_IER_BITMASK;
00739                 }
00740         }
00741 }
00742
00743
00744 /********************************************************************/
00760 uint8_t UART_GetLineStatus(LPC_UART_TypeDef* UARTx)
00761 {
00762         CHECK_PARAM(PARAM_UARTx(UARTx));
00763
00764         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00765         {
00766                 return ((((LPC_UART1_TypeDef *)LPC_UART1)->LSR) & UART_LSR_BITMASK);
00767         }
00768         else
00769         {
00770                 return ((UARTx->LSR) & UART_LSR_BITMASK);
00771         }
00772 }
00773
00774 /********************************************************************/
00783 uint32_t UART_GetIntId(LPC_UART_TypeDef* UARTx)
00784 {
00785         CHECK_PARAM(PARAM_UARTx(UARTx));
00786         return (UARTx->IIR & 0x03CF);
00787 }
00788
00789 /*********************************************************************/
00798 FlagStatus UART_CheckBusy(LPC_UART_TypeDef *UARTx)
00799 {
00800         if (UARTx->LSR & UART_LSR_TEMT){
00801                 return RESET;
00802         } else {
00803                 return SET;
00804         }
00805 }
00806
00807
00808 /*********************************************************************/
00819 void UART_FIFOConfig(LPC_UART_TypeDef *UARTx, UART_FIFO_CFG_Type *FIFOCfg)
00820 {
00821         uint8_t tmp = 0;
00822
00823         CHECK_PARAM(PARAM_UARTx(UARTx));
00824         CHECK_PARAM(PARAM_UART_FIFO_LEVEL(FIFOCfg->FIFO_Level));
00825         CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_DMAMode));
00826         CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_ResetRxBuf));
00827         CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_ResetTxBuf));
00828
00829         tmp |= UART_FCR_FIFO_EN;
00830         switch (FIFOCfg->FIFO_Level){
00831         case UART_FIFO_TRGLEV0:
00832                 tmp |= UART_FCR_TRG_LEV0;
00833                 break;
00834         case UART_FIFO_TRGLEV1:
00835                 tmp |= UART_FCR_TRG_LEV1;
00836                 break;
00837         case UART_FIFO_TRGLEV2:
00838                 tmp |= UART_FCR_TRG_LEV2;
00839                 break;
00840         case UART_FIFO_TRGLEV3:
00841         default:
00842                 tmp |= UART_FCR_TRG_LEV3;
00843                 break;
00844         }
00845
00846         if (FIFOCfg->FIFO_ResetTxBuf == ENABLE)
00847         {
00848                 tmp |= UART_FCR_TX_RS;
00849         }
00850         if (FIFOCfg->FIFO_ResetRxBuf == ENABLE)
00851         {
00852                 tmp |= UART_FCR_RX_RS;
00853         }
00854         if (FIFOCfg->FIFO_DMAMode == ENABLE)
00855         {
00856                 tmp |= UART_FCR_DMAMODE_SEL;
00857         }
00858
00859
00860         //write to FIFO control register
00861         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00862         {
00863                 ((LPC_UART1_TypeDef *)UARTx)->/*IIFCR.*/FCR = tmp & UART_FCR_BITMASK;
00864         }
00865         else
00866         {
00867                 UARTx->/*IIFCR.*/FCR = tmp & UART_FCR_BITMASK;
00868         }
00869 }
00870
00871 /*****************************************************************************/
00883 void UART_FIFOConfigStructInit(UART_FIFO_CFG_Type *UART_FIFOInitStruct)
00884 {
00885         UART_FIFOInitStruct->FIFO_DMAMode = DISABLE;
00886         UART_FIFOInitStruct->FIFO_Level = UART_FIFO_TRGLEV0;
00887         UART_FIFOInitStruct->FIFO_ResetRxBuf = ENABLE;
00888         UART_FIFOInitStruct->FIFO_ResetTxBuf = ENABLE;
00889 }
00890
00891
00892 /*********************************************************************/
00909 void UART_ABCmd(LPC_UART_TypeDef *UARTx, UART_AB_CFG_Type *ABConfigStruct, \
00910                                 FunctionalState NewState)
00911 {
00912         uint32_t tmp;
00913
00914         CHECK_PARAM(PARAM_UARTx(UARTx));
00915         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
00916
00917         tmp = 0;
00918         if (NewState == ENABLE) {
00919                 if (ABConfigStruct->ABMode == UART_AUTOBAUD_MODE1){
00920                         tmp |= UART_ACR_MODE;
00921                 }
00922                 if (ABConfigStruct->AutoRestart == ENABLE){
00923                         tmp |= UART_ACR_AUTO_RESTART;
00924                 }
00925         }
00926
00927         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00928         {
00929                 if (NewState == ENABLE)
00930                 {
00931                         // Clear DLL and DLM value
00932                         ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_DLAB_EN;
00933                         ((LPC_UART1_TypeDef *)UARTx)->DLL = 0;
00934                         ((LPC_UART1_TypeDef *)UARTx)->DLM = 0;
00935                         ((LPC_UART1_TypeDef *)UARTx)->LCR &= ~UART_LCR_DLAB_EN;
00936                         // FDR value must be reset to default value
00937                         ((LPC_UART1_TypeDef *)UARTx)->FDR = 0x10;
00938                         ((LPC_UART1_TypeDef *)UARTx)->ACR = UART_ACR_START | tmp;
00939                 }
00940                 else
00941                 {
00942                         ((LPC_UART1_TypeDef *)UARTx)->ACR = 0;
00943                 }
00944         }
00945         else
00946         {
00947                 if (NewState == ENABLE)
00948                 {
00949                         // Clear DLL and DLM value
00950                         UARTx->LCR |= UART_LCR_DLAB_EN;
00951                         UARTx->DLL = 0;
00952                         UARTx->DLM = 0;
00953                         UARTx->LCR &= ~UART_LCR_DLAB_EN;
00954                         // FDR value must be reset to default value
00955                         UARTx->FDR = 0x10;
00956                         UARTx->ACR = UART_ACR_START | tmp;
00957                 }
00958                 else
00959                 {
00960                         UARTx->ACR = 0;
00961                 }
00962         }
00963 }
00964
00965 /*********************************************************************/
00977 void UART_ABClearIntPending(LPC_UART_TypeDef *UARTx, UART_ABEO_Type ABIntType)
00978 {
00979         CHECK_PARAM(PARAM_UARTx(UARTx));
00980         if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
00981         {
00982                 UARTx->ACR |= ABIntType;
00983         }
00984         else
00985                 UARTx->ACR |= ABIntType;
00986 }
00987
00988 /*********************************************************************/
01000 void UART_TxCmd(LPC_UART_TypeDef *UARTx, FunctionalState NewState)
01001 {
01002         CHECK_PARAM(PARAM_UARTx(UARTx));
01003         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
01004
01005         if (NewState == ENABLE)
01006         {
01007                 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
01008                 {
01009                         ((LPC_UART1_TypeDef *)UARTx)->TER |= UART_TER_TXEN;
01010                 }
01011                 else
01012                 {
01013                         UARTx->TER |= UART_TER_TXEN;
01014                 }
01015         }
01016         else
01017         {
01018                 if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
01019                 {
01020                         ((LPC_UART1_TypeDef *)UARTx)->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK;
01021                 }
01022                 else
01023                 {
01024                         UARTx->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK;
01025                 }
01026         }
01027 }
01028
01029 /* UART IrDA functions ---------------------------------------------------*/
01030
01031 #ifdef _UART3
01032
01033 /*********************************************************************/
01042 void UART_IrDAInvtInputCmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState)
01043 {
01044         CHECK_PARAM(PARAM_UART_IrDA(UARTx));
01045         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
01046
01047         if (NewState == ENABLE)
01048         {
01049                 UARTx->ICR |= UART_ICR_IRDAINV;
01050         }
01051         else if (NewState == DISABLE)
01052         {
01053                 UARTx->ICR &= (~UART_ICR_IRDAINV) & UART_ICR_BITMASK;
01054         }
01055 }
01056
01057
01058 /*********************************************************************/
01066 void UART_IrDACmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState)
01067 {
01068         CHECK_PARAM(PARAM_UART_IrDA(UARTx));
01069         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
01070
01071         if (NewState == ENABLE)
01072         {
01073                 UARTx->ICR |= UART_ICR_IRDAEN;
01074         }
01075         else
01076         {
01077                 UARTx->ICR &= (~UART_ICR_IRDAEN) & UART_ICR_BITMASK;
01078         }
01079 }
01080
01081
01082 /*********************************************************************/
01098 void UART_IrDAPulseDivConfig(LPC_UART_TypeDef *UARTx, UART_IrDA_PULSE_Type PulseDiv)
01099 {
01100         uint32_t tmp, tmp1;
01101         CHECK_PARAM(PARAM_UART_IrDA(UARTx));
01102         CHECK_PARAM(PARAM_UART_IrDA_PULSEDIV(PulseDiv));
01103
01104         tmp1 = UART_ICR_PULSEDIV(PulseDiv);
01105         tmp = UARTx->ICR & (~UART_ICR_PULSEDIV(7));
01106         tmp |= tmp1 | UART_ICR_FIXPULSE_EN;
01107         UARTx->ICR = tmp & UART_ICR_BITMASK;
01108 }
01109
01110 #endif
01111
01112
01113 /* UART1 FullModem function ---------------------------------------------*/
01114
01115 #ifdef _UART1
01116
01117 /*********************************************************************/
01128 void UART_FullModemForcePinState(LPC_UART1_TypeDef *UARTx, UART_MODEM_PIN_Type Pin, \
01129                                                         UART1_SignalState NewState)
01130 {
01131         uint8_t tmp = 0;
01132
01133         CHECK_PARAM(PARAM_UART1_MODEM(UARTx));
01134         CHECK_PARAM(PARAM_UART1_MODEM_PIN(Pin));
01135         CHECK_PARAM(PARAM_UART1_SIGNALSTATE(NewState));
01136
01137         switch (Pin){
01138         case UART1_MODEM_PIN_DTR:
01139                 tmp = UART1_MCR_DTR_CTRL;
01140                 break;
01141         case UART1_MODEM_PIN_RTS:
01142                 tmp = UART1_MCR_RTS_CTRL;
01143                 break;
01144         default:
01145                 break;
01146         }
01147
01148         if (NewState == ACTIVE){
01149                 UARTx->MCR |= tmp;
01150         } else {
01151                 UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK;
01152         }
01153 }
01154
01155
01156 /*********************************************************************/
01168 void UART_FullModemConfigMode(LPC_UART1_TypeDef *UARTx, UART_MODEM_MODE_Type Mode, \
01169                                                         FunctionalState NewState)
01170 {
01171         uint8_t tmp;
01172
01173         CHECK_PARAM(PARAM_UART1_MODEM(UARTx));
01174         CHECK_PARAM(PARAM_UART1_MODEM_MODE(Mode));
01175         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
01176
01177         switch(Mode){
01178         case UART1_MODEM_MODE_LOOPBACK:
01179                 tmp = UART1_MCR_LOOPB_EN;
01180                 break;
01181         case UART1_MODEM_MODE_AUTO_RTS:
01182                 tmp = UART1_MCR_AUTO_RTS_EN;
01183                 break;
01184         case UART1_MODEM_MODE_AUTO_CTS:
01185                 tmp = UART1_MCR_AUTO_CTS_EN;
01186                 break;
01187         default:
01188                 break;
01189         }
01190
01191         if (NewState == ENABLE)
01192         {
01193                 UARTx->MCR |= tmp;
01194         }
01195         else
01196         {
01197                 UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK;
01198         }
01199 }
01200
01201
01202 /*********************************************************************/
01214 uint8_t UART_FullModemGetStatus(LPC_UART1_TypeDef *UARTx)
01215 {
01216         CHECK_PARAM(PARAM_UART1_MODEM(UARTx));
01217         return ((UARTx->MSR) & UART1_MSR_BITMASK);
01218 }
01219
01220
01221 /* UART RS485 functions --------------------------------------------------------------*/
01222
01223 /*********************************************************************/
01232 void UART_RS485Config(LPC_UART1_TypeDef *UARTx, UART1_RS485_CTRLCFG_Type *RS485ConfigStruct)
01233 {
01234         uint32_t tmp;
01235
01236         CHECK_PARAM(PARAM_UART1_MODEM(UARTx));
01237         CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->AutoAddrDetect_State));
01238         CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->AutoDirCtrl_State));
01239         CHECK_PARAM(PARAM_UART1_RS485_CFG_DELAYVALUE(RS485ConfigStruct->DelayValue));
01240         CHECK_PARAM(PARAM_SETSTATE(RS485ConfigStruct->DirCtrlPol_Level));
01241         CHECK_PARAM(PARAM_UART_RS485_DIRCTRL_PIN(RS485ConfigStruct->DirCtrlPin));
01242         CHECK_PARAM(PARAM_UART1_RS485_CFG_MATCHADDRVALUE(RS485ConfigStruct->MatchAddrValue));
01243         CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->NormalMultiDropMode_State));
01244         CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->Rx_State));
01245
01246         tmp = 0;
01247         // If Auto Direction Control is enabled -  This function is used in Master mode
01248         if (RS485ConfigStruct->AutoDirCtrl_State == ENABLE)
01249         {
01250                 tmp |= UART1_RS485CTRL_DCTRL_EN;
01251
01252                 // Set polar
01253                 if (RS485ConfigStruct->DirCtrlPol_Level == SET)
01254                 {
01255                         tmp |= UART1_RS485CTRL_OINV_1;
01256                 }
01257
01258                 // Set pin according to
01259                 if (RS485ConfigStruct->DirCtrlPin == UART1_RS485_DIRCTRL_DTR)
01260                 {
01261                         tmp |= UART1_RS485CTRL_SEL_DTR;
01262                 }
01263
01264                 // Fill delay time
01265                 UARTx->RS485DLY = RS485ConfigStruct->DelayValue & UART1_RS485DLY_BITMASK;
01266         }
01267
01268         // MultiDrop mode is enable
01269         if (RS485ConfigStruct->NormalMultiDropMode_State == ENABLE)
01270         {
01271                 tmp |= UART1_RS485CTRL_NMM_EN;
01272         }
01273
01274         // Auto Address Detect function
01275         if (RS485ConfigStruct->AutoAddrDetect_State == ENABLE)
01276         {
01277                 tmp |= UART1_RS485CTRL_AADEN;
01278                 // Fill Match Address
01279                 UARTx->ADRMATCH = RS485ConfigStruct->MatchAddrValue & UART1_RS485ADRMATCH_BITMASK;
01280         }
01281
01282
01283         // Receiver is disable
01284         if (RS485ConfigStruct->Rx_State == DISABLE)
01285         {
01286                 tmp |= UART1_RS485CTRL_RX_DIS;
01287         }
01288
01289         // write back to RS485 control register
01290         UARTx->RS485CTRL = tmp & UART1_RS485CTRL_BITMASK;
01291
01292         // Enable Parity function and leave parity in stick '0' parity as default
01293         UARTx->LCR |= (UART_LCR_PARITY_F_0 | UART_LCR_PARITY_EN);
01294 }
01295
01296 /*********************************************************************/
01304 void UART_RS485ReceiverCmd(LPC_UART1_TypeDef *UARTx, FunctionalState NewState)
01305 {
01306         if (NewState == ENABLE){
01307                 UARTx->RS485CTRL &= ~UART1_RS485CTRL_RX_DIS;
01308         } else {
01309                 UARTx->RS485CTRL |= UART1_RS485CTRL_RX_DIS;
01310         }
01311 }
01312
01313 /*********************************************************************/
01321 uint32_t UART_RS485Send(LPC_UART1_TypeDef *UARTx, uint8_t *pDatFrm, \
01322                                         uint32_t size, uint8_t ParityStick)
01323 {
01324         uint8_t tmp, save;
01325         uint32_t cnt;
01326
01327         if (ParityStick){
01328                 save = tmp = UARTx->LCR & UART_LCR_BITMASK;
01329                 tmp &= ~(UART_LCR_PARITY_EVEN);
01330                 UARTx->LCR = tmp;
01331                 cnt = UART_Send((LPC_UART_TypeDef *)UARTx, pDatFrm, size, BLOCKING);
01332                 while (!(UARTx->LSR & UART_LSR_TEMT));
01333                 UARTx->LCR = save;
01334         } else {
01335                 cnt = UART_Send((LPC_UART_TypeDef *)UARTx, pDatFrm, size, BLOCKING);
01336                 while (!(UARTx->LSR & UART_LSR_TEMT));
01337         }
01338         return cnt;
01339 }
01340
01341 /*********************************************************************/
01347 void UART_RS485SendSlvAddr(LPC_UART1_TypeDef *UARTx, uint8_t SlvAddr)
01348 {
01349         UART_RS485Send(UARTx, &SlvAddr, 1, 1);
01350 }
01351
01352 /*********************************************************************/
01359 uint32_t UART_RS485SendData(LPC_UART1_TypeDef *UARTx, uint8_t *pData, uint32_t size)
01360 {
01361         return (UART_RS485Send(UARTx, pData, size, 0));
01362 }
01363
01364 #endif /* _UART1 */
01365
01366 #endif /* _UART */
01367
01375 /* --------------------------------- End Of File ------------------------------ */
01376
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_uart.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_uart.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_uart.h                          2010-06-18
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef __LPC17XX_UART_H
00034 #define __LPC17XX_UART_H
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046 /* Public Macros -------------------------------------------------------------- */
00054 #define UART_BLOCKING_TIMEOUT                   (0xFFFFFFFFUL)
00055
00060 /* Private Macros ------------------------------------------------------------- */
00065 /* Accepted Error baud rate value (in percent unit) */
00066 #define UART_ACCEPTED_BAUDRATE_ERROR    (3)
00069 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00070 /*********************************************************************/
00073 #define UART_RBR_MASKBIT        ((uint8_t)0xFF)
00075 /*********************************************************************/
00078 #define UART_THR_MASKBIT        ((uint8_t)0xFF)
00080 /*********************************************************************/
00083 #define UART_LOAD_DLL(div)      ((div) & 0xFF)
00084 #define UART_DLL_MASKBIT        ((uint8_t)0xFF)
00086 /*********************************************************************/
00089 #define UART_DLM_MASKBIT        ((uint8_t)0xFF)
00090 #define UART_LOAD_DLM(div)  (((div) >> 8) & 0xFF)
00092 /*********************************************************************/
00095 #define UART_IER_RBRINT_EN              ((uint32_t)(1<<0))
00096 #define UART_IER_THREINT_EN             ((uint32_t)(1<<1))
00097 #define UART_IER_RLSINT_EN              ((uint32_t)(1<<2))
00098 #define UART1_IER_MSINT_EN              ((uint32_t)(1<<3))
00099 #define UART1_IER_CTSINT_EN             ((uint32_t)(1<<7))
00100 #define UART_IER_ABEOINT_EN             ((uint32_t)(1<<8))
00101 #define UART_IER_ABTOINT_EN             ((uint32_t)(1<<9))
00102 #define UART_IER_BITMASK                ((uint32_t)(0x307))
00103 #define UART1_IER_BITMASK               ((uint32_t)(0x38F))
00105 /*********************************************************************/
00108 #define UART_IIR_INTSTAT_PEND   ((uint32_t)(1<<0))
00109 #define UART_IIR_INTID_RLS              ((uint32_t)(3<<1))
00110 #define UART_IIR_INTID_RDA              ((uint32_t)(2<<1))
00111 #define UART_IIR_INTID_CTI              ((uint32_t)(6<<1))
00112 #define UART_IIR_INTID_THRE             ((uint32_t)(1<<1))
00113 #define UART1_IIR_INTID_MODEM   ((uint32_t)(0<<1))
00114 #define UART_IIR_INTID_MASK             ((uint32_t)(7<<1))
00115 #define UART_IIR_FIFO_EN                ((uint32_t)(3<<6))
00116 #define UART_IIR_ABEO_INT               ((uint32_t)(1<<8))
00117 #define UART_IIR_ABTO_INT               ((uint32_t)(1<<9))
00118 #define UART_IIR_BITMASK                ((uint32_t)(0x3CF))
00120 /*********************************************************************/
00123 #define UART_FCR_FIFO_EN                ((uint8_t)(1<<0))
00124 #define UART_FCR_RX_RS                  ((uint8_t)(1<<1))
00125 #define UART_FCR_TX_RS                  ((uint8_t)(1<<2))
00126 #define UART_FCR_DMAMODE_SEL    ((uint8_t)(1<<3))
00127 #define UART_FCR_TRG_LEV0               ((uint8_t)(0))
00128 #define UART_FCR_TRG_LEV1               ((uint8_t)(1<<6))
00129 #define UART_FCR_TRG_LEV2               ((uint8_t)(2<<6))
00130 #define UART_FCR_TRG_LEV3               ((uint8_t)(3<<6))
00131 #define UART_FCR_BITMASK                ((uint8_t)(0xCF))
00132 #define UART_TX_FIFO_SIZE               (16)
00133
00134 /*********************************************************************/
00137 #define UART_LCR_WLEN5                  ((uint8_t)(0))
00138 #define UART_LCR_WLEN6                  ((uint8_t)(1<<0))
00139 #define UART_LCR_WLEN7                  ((uint8_t)(2<<0))
00140 #define UART_LCR_WLEN8                  ((uint8_t)(3<<0))
00141 #define UART_LCR_STOPBIT_SEL    ((uint8_t)(1<<2))
00142 #define UART_LCR_PARITY_EN              ((uint8_t)(1<<3))
00143 #define UART_LCR_PARITY_ODD             ((uint8_t)(0))
00144 #define UART_LCR_PARITY_EVEN    ((uint8_t)(1<<4))
00145 #define UART_LCR_PARITY_F_1             ((uint8_t)(2<<4))
00146 #define UART_LCR_PARITY_F_0             ((uint8_t)(3<<4))
00147 #define UART_LCR_BREAK_EN               ((uint8_t)(1<<6))
00148 #define UART_LCR_DLAB_EN                ((uint8_t)(1<<7))
00149 #define UART_LCR_BITMASK                ((uint8_t)(0xFF))
00151 /*********************************************************************/
00154 #define UART1_MCR_DTR_CTRL              ((uint8_t)(1<<0))
00155 #define UART1_MCR_RTS_CTRL              ((uint8_t)(1<<1))
00156 #define UART1_MCR_LOOPB_EN              ((uint8_t)(1<<4))
00157 #define UART1_MCR_AUTO_RTS_EN   ((uint8_t)(1<<6))
00158 #define UART1_MCR_AUTO_CTS_EN   ((uint8_t)(1<<7))
00159 #define UART1_MCR_BITMASK               ((uint8_t)(0x0F3))
00161 /*********************************************************************/
00164 #define UART_LSR_RDR            ((uint8_t)(1<<0))
00165 #define UART_LSR_OE                     ((uint8_t)(1<<1))
00166 #define UART_LSR_PE                     ((uint8_t)(1<<2))
00167 #define UART_LSR_FE                     ((uint8_t)(1<<3))
00168 #define UART_LSR_BI                     ((uint8_t)(1<<4))
00169 #define UART_LSR_THRE           ((uint8_t)(1<<5))
00170 #define UART_LSR_TEMT           ((uint8_t)(1<<6))
00171 #define UART_LSR_RXFE           ((uint8_t)(1<<7))
00172 #define UART_LSR_BITMASK        ((uint8_t)(0xFF))
00174 /*********************************************************************/
00177 #define UART1_MSR_DELTA_CTS             ((uint8_t)(1<<0))
00178 #define UART1_MSR_DELTA_DSR             ((uint8_t)(1<<1))
00179 #define UART1_MSR_LO2HI_RI              ((uint8_t)(1<<2))
00180 #define UART1_MSR_DELTA_DCD             ((uint8_t)(1<<3))
00181 #define UART1_MSR_CTS                   ((uint8_t)(1<<4))
00182 #define UART1_MSR_DSR                   ((uint8_t)(1<<5))
00183 #define UART1_MSR_RI                    ((uint8_t)(1<<6))
00184 #define UART1_MSR_DCD                   ((uint8_t)(1<<7))
00185 #define UART1_MSR_BITMASK               ((uint8_t)(0xFF))
00187 /*********************************************************************/
00190 #define UART_SCR_BIMASK         ((uint8_t)(0xFF))
00192 /*********************************************************************/
00195 #define UART_ACR_START                          ((uint32_t)(1<<0))
00196 #define UART_ACR_MODE                           ((uint32_t)(1<<1))
00197 #define UART_ACR_AUTO_RESTART           ((uint32_t)(1<<2))
00198 #define UART_ACR_ABEOINT_CLR            ((uint32_t)(1<<8))
00199 #define UART_ACR_ABTOINT_CLR            ((uint32_t)(1<<9))
00200 #define UART_ACR_BITMASK                        ((uint32_t)(0x307))
00202 /*********************************************************************/
00205 #define UART_ICR_IRDAEN                 ((uint32_t)(1<<0))
00206 #define UART_ICR_IRDAINV                ((uint32_t)(1<<1))
00207 #define UART_ICR_FIXPULSE_EN    ((uint32_t)(1<<2))
00208 #define UART_ICR_PULSEDIV(n)    ((uint32_t)((n&0x07)<<3))
00209 #define UART_ICR_BITMASK                ((uint32_t)(0x3F))
00211 /*********************************************************************/
00214 #define UART_FDR_DIVADDVAL(n)   ((uint32_t)(n&0x0F))
00215 #define UART_FDR_MULVAL(n)              ((uint32_t)((n<<4)&0xF0))
00216 #define UART_FDR_BITMASK                ((uint32_t)(0xFF))
00218 /*********************************************************************/
00221 #define UART_TER_TXEN                   ((uint8_t)(1<<7))
00222 #define UART_TER_BITMASK                ((uint8_t)(0x80))
00224 /*********************************************************************/
00227 #define UART1_RS485CTRL_NMM_EN          ((uint32_t)(1<<0))
00229 #define UART1_RS485CTRL_RX_DIS          ((uint32_t)(1<<1))
00230 #define UART1_RS485CTRL_AADEN           ((uint32_t)(1<<2))
00231 #define UART1_RS485CTRL_SEL_DTR         ((uint32_t)(1<<3))
00233 #define UART1_RS485CTRL_DCTRL_EN        ((uint32_t)(1<<4))
00234 #define UART1_RS485CTRL_OINV_1          ((uint32_t)(1<<5))
00237 #define UART1_RS485CTRL_BITMASK         ((uint32_t)(0x3F))
00239 /*********************************************************************/
00242 #define UART1_RS485ADRMATCH_BITMASK ((uint8_t)(0xFF))
00244 /*********************************************************************/
00247 /* Macro defines for UART1 RS-485 Delay value register */
00248 #define UART1_RS485DLY_BITMASK          ((uint8_t)(0xFF))
00250 /*********************************************************************/
00253 #define UART_FIFOLVL_RXFIFOLVL(n)       ((uint32_t)(n&0x0F))
00254 #define UART_FIFOLVL_TXFIFOLVL(n)       ((uint32_t)((n>>8)&0x0F))
00255 #define UART_FIFOLVL_BITMASK            ((uint32_t)(0x0F0F))
00258 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00259
00261 #define PARAM_UART_DATABIT(databit)     ((databit==UART_DATABIT_5) || (databit==UART_DATABIT_6)\
00262 || (databit==UART_DATABIT_7) || (databit==UART_DATABIT_8))
00263
00265 #define PARAM_UART_STOPBIT(stopbit)     ((stopbit==UART_STOPBIT_1) || (stopbit==UART_STOPBIT_2))
00266
00268 #define PARAM_UART_PARITY(parity)       ((parity==UART_PARITY_NONE) || (parity==UART_PARITY_ODD) \
00269 || (parity==UART_PARITY_EVEN) || (parity==UART_PARITY_SP_1) \
00270 || (parity==UART_PARITY_SP_0))
00271
00273 #define PARAM_UART_FIFO_LEVEL(fifo)     ((fifo==UART_FIFO_TRGLEV0) \
00274 || (fifo==UART_FIFO_TRGLEV1) || (fifo==UART_FIFO_TRGLEV2) \
00275 || (fifo==UART_FIFO_TRGLEV3))
00276
00278 #define PARAM_UART_INTCFG(IntCfg)       ((IntCfg==UART_INTCFG_RBR) || (IntCfg==UART_INTCFG_THRE) \
00279 || (IntCfg==UART_INTCFG_RLS) || (IntCfg==UART_INTCFG_ABEO) \
00280 || (IntCfg==UART_INTCFG_ABTO))
00281
00283 #define PARAM_UART1_INTCFG(IntCfg)      ((IntCfg==UART1_INTCFG_MS) || (IntCfg==UART1_INTCFG_CTS))
00284
00286 #define PARAM_UART_AUTOBAUD_MODE(ABmode)        ((ABmode==UART_AUTOBAUD_MODE0) || (ABmode==UART_AUTOBAUD_MODE1))
00287
00289 #define PARAM_UART_AUTOBAUD_INTSTAT(ABIntStat)  ((ABIntStat==UART_AUTOBAUD_INTSTAT_ABEO) || \
00290                 (ABIntStat==UART_AUTOBAUD_INTSTAT_ABTO))
00291
00293 #define PARAM_UART_IrDA_PULSEDIV(PulseDiv)      ((PulseDiv==UART_IrDA_PULSEDIV2) || (PulseDiv==UART_IrDA_PULSEDIV4) \
00294 || (PulseDiv==UART_IrDA_PULSEDIV8) || (PulseDiv==UART_IrDA_PULSEDIV16) \
00295 || (PulseDiv==UART_IrDA_PULSEDIV32) || (PulseDiv==UART_IrDA_PULSEDIV64) \
00296 || (PulseDiv==UART_IrDA_PULSEDIV128) || (PulseDiv==UART_IrDA_PULSEDIV256))
00297
00298 /* Macro to check the input UART1_SignalState parameters */
00299 #define PARAM_UART1_SIGNALSTATE(x) ((x==INACTIVE) || (x==ACTIVE))
00300
00302 #define PARAM_UART1_MODEM_PIN(x) ((x==UART1_MODEM_PIN_DTR) || (x==UART1_MODEM_PIN_RTS))
00303
00305 #define PARAM_UART1_MODEM_MODE(x) ((x==UART1_MODEM_MODE_LOOPBACK) || (x==UART1_MODEM_MODE_AUTO_RTS) \
00306 || (x==UART1_MODEM_MODE_AUTO_CTS))
00307
00309 #define PARAM_UART_RS485_DIRCTRL_PIN(x) ((x==UART1_RS485_DIRCTRL_RTS) || (x==UART1_RS485_DIRCTRL_DTR))
00310
00311 /* Macro to determine if it is valid UART port number */
00312 #define PARAM_UARTx(x)  ((((uint32_t *)x)==((uint32_t *)LPC_UART0)) \
00313 || (((uint32_t *)x)==((uint32_t *)LPC_UART1)) \
00314 || (((uint32_t *)x)==((uint32_t *)LPC_UART2)) \
00315 || (((uint32_t *)x)==((uint32_t *)LPC_UART3)))
00316 #define PARAM_UART_IrDA(x) (((uint32_t *)x)==((uint32_t *)LPC_UART3))
00317 #define PARAM_UART1_MODEM(x) (((uint32_t *)x)==((uint32_t *)LPC_UART1))
00318
00320 #define PARAM_UART1_RS485_CFG_MATCHADDRVALUE(x) ((x<0xFF))
00321
00323 #define PARAM_UART1_RS485_CFG_DELAYVALUE(x) ((x<0xFF))
00324
00330 /* Public Types --------------------------------------------------------------- */
00338 typedef enum {
00339         UART_DATABIT_5          = 0,
00340         UART_DATABIT_6,
00341         UART_DATABIT_7,
00342         UART_DATABIT_8
00343 } UART_DATABIT_Type;
00344
00348 typedef enum {
00349         UART_STOPBIT_1          = (0),
00350         UART_STOPBIT_2
00351 } UART_STOPBIT_Type;
00352
00356 typedef enum {
00357         UART_PARITY_NONE        = 0,
00358         UART_PARITY_ODD,
00359         UART_PARITY_EVEN,
00360         UART_PARITY_SP_1,
00361         UART_PARITY_SP_0
00362 } UART_PARITY_Type;
00363
00367 typedef enum {
00368         UART_FIFO_TRGLEV0 = 0,
00369         UART_FIFO_TRGLEV1,
00370         UART_FIFO_TRGLEV2,
00371         UART_FIFO_TRGLEV3
00372 } UART_FITO_LEVEL_Type;
00373
00374 /********************************************************************/
00377 typedef enum {
00378         UART_INTCFG_RBR = 0,
00379         UART_INTCFG_THRE,
00380         UART_INTCFG_RLS,
00381         UART1_INTCFG_MS,
00382         UART1_INTCFG_CTS,
00383         UART_INTCFG_ABEO,
00384         UART_INTCFG_ABTO
00385 } UART_INT_Type;
00386
00390 typedef enum {
00391         UART_LINESTAT_RDR       = UART_LSR_RDR,
00392         UART_LINESTAT_OE        = UART_LSR_OE,
00393         UART_LINESTAT_PE        = UART_LSR_PE,
00394         UART_LINESTAT_FE        = UART_LSR_FE,
00395         UART_LINESTAT_BI        = UART_LSR_BI,
00396         UART_LINESTAT_THRE      = UART_LSR_THRE,
00397         UART_LINESTAT_TEMT      = UART_LSR_TEMT,
00398         UART_LINESTAT_RXFE      = UART_LSR_RXFE
00399 } UART_LS_Type;
00400
00404 typedef enum {
00405         UART_AUTOBAUD_MODE0                             = 0,
00406         UART_AUTOBAUD_MODE1
00407 } UART_AB_MODE_Type;
00408
00412 typedef struct {
00413         UART_AB_MODE_Type       ABMode;
00414         FunctionalState         AutoRestart;
00415 } UART_AB_CFG_Type;
00416
00420 typedef enum {
00421         UART_AUTOBAUD_INTSTAT_ABEO              = UART_IIR_ABEO_INT,
00422         UART_AUTOBAUD_INTSTAT_ABTO              = UART_IIR_ABTO_INT
00423 }UART_ABEO_Type;
00424
00428 typedef enum {
00429         UART_IrDA_PULSEDIV2             = 0,
00431         UART_IrDA_PULSEDIV4,
00433         UART_IrDA_PULSEDIV8,
00435         UART_IrDA_PULSEDIV16,
00437         UART_IrDA_PULSEDIV32,
00439         UART_IrDA_PULSEDIV64,
00441         UART_IrDA_PULSEDIV128,
00443         UART_IrDA_PULSEDIV256
00445 } UART_IrDA_PULSE_Type;
00446
00447 /********************************************************************/
00450 typedef enum {
00451         INACTIVE = 0,                   /* In-active state */
00452         ACTIVE = !INACTIVE              /* Active state */
00453 }UART1_SignalState;
00454
00458 typedef enum {
00459         UART1_MODEM_STAT_DELTA_CTS      = UART1_MSR_DELTA_CTS,
00460         UART1_MODEM_STAT_DELTA_DSR      = UART1_MSR_DELTA_DSR,
00461         UART1_MODEM_STAT_LO2HI_RI       = UART1_MSR_LO2HI_RI,
00462         UART1_MODEM_STAT_DELTA_DCD      = UART1_MSR_DELTA_DCD,
00463         UART1_MODEM_STAT_CTS            = UART1_MSR_CTS,
00464         UART1_MODEM_STAT_DSR            = UART1_MSR_DSR,
00465         UART1_MODEM_STAT_RI                     = UART1_MSR_RI,
00466         UART1_MODEM_STAT_DCD            = UART1_MSR_DCD
00467 } UART_MODEM_STAT_type;
00468
00472 typedef enum {
00473         UART1_MODEM_PIN_DTR                     = 0,
00474         UART1_MODEM_PIN_RTS
00475 } UART_MODEM_PIN_Type;
00476
00480 typedef enum {
00481         UART1_MODEM_MODE_LOOPBACK       = 0,
00482         UART1_MODEM_MODE_AUTO_RTS,
00483         UART1_MODEM_MODE_AUTO_CTS
00484 } UART_MODEM_MODE_Type;
00485
00489 typedef enum {
00490         UART1_RS485_DIRCTRL_RTS = 0,
00491         UART1_RS485_DIRCTRL_DTR
00492 } UART_RS485_DIRCTRL_PIN_Type;
00493
00494 /********************************************************************/
00497 typedef struct {
00498   uint32_t Baud_rate;
00499   UART_PARITY_Type Parity;
00506   UART_DATABIT_Type Databits;
00512   UART_STOPBIT_Type Stopbits;
00516 } UART_CFG_Type;
00517
00518 /********************************************************************/
00522 typedef struct {
00523         FunctionalState FIFO_ResetRxBuf;
00527         FunctionalState FIFO_ResetTxBuf;
00531         FunctionalState FIFO_DMAMode;
00535         UART_FITO_LEVEL_Type FIFO_Level;
00541 } UART_FIFO_CFG_Type;
00542
00543 /********************************************************************/
00546 typedef struct {
00547         FunctionalState NormalMultiDropMode_State;
00550         FunctionalState Rx_State;
00553         FunctionalState AutoAddrDetect_State;
00556         FunctionalState AutoDirCtrl_State;
00559         UART_RS485_DIRCTRL_PIN_Type DirCtrlPin;
00564          SetState DirCtrlPol_Level;
00570         uint8_t MatchAddrValue;
00571         uint8_t DelayValue;
00572 } UART1_RS485_CTRLCFG_Type;
00573
00579 /* Public Functions ----------------------------------------------------------- */
00583 /* UART Init/DeInit functions --------------------------------------------------*/
00584 void UART_Init(LPC_UART_TypeDef *UARTx, UART_CFG_Type *UART_ConfigStruct);
00585 void UART_DeInit(LPC_UART_TypeDef* UARTx);
00586 void UART_ConfigStructInit(UART_CFG_Type *UART_InitStruct);
00587
00588 /* UART Send/Receive functions -------------------------------------------------*/
00589 void UART_SendByte(LPC_UART_TypeDef* UARTx, uint8_t Data);
00590 uint8_t UART_ReceiveByte(LPC_UART_TypeDef* UARTx);
00591 uint32_t UART_Send(LPC_UART_TypeDef *UARTx, uint8_t *txbuf,
00592                 uint32_t buflen, TRANSFER_BLOCK_Type flag);
00593 uint32_t UART_Receive(LPC_UART_TypeDef *UARTx, uint8_t *rxbuf, \
00594                 uint32_t buflen, TRANSFER_BLOCK_Type flag);
00595
00596 /* UART FIFO functions ----------------------------------------------------------*/
00597 void UART_FIFOConfig(LPC_UART_TypeDef *UARTx, UART_FIFO_CFG_Type *FIFOCfg);
00598 void UART_FIFOConfigStructInit(UART_FIFO_CFG_Type *UART_FIFOInitStruct);
00599
00600 /* UART get information functions -----------------------------------------------*/
00601 uint32_t UART_GetIntId(LPC_UART_TypeDef* UARTx);
00602 uint8_t UART_GetLineStatus(LPC_UART_TypeDef* UARTx);
00603
00604 /* UART operate functions -------------------------------------------------------*/
00605 void UART_IntConfig(LPC_UART_TypeDef *UARTx, UART_INT_Type UARTIntCfg, \
00606                                 FunctionalState NewState);
00607 void UART_TxCmd(LPC_UART_TypeDef *UARTx, FunctionalState NewState);
00608 FlagStatus UART_CheckBusy(LPC_UART_TypeDef *UARTx);
00609 void UART_ForceBreak(LPC_UART_TypeDef* UARTx);
00610
00611 /* UART Auto-baud functions -----------------------------------------------------*/
00612 void UART_ABClearIntPending(LPC_UART_TypeDef *UARTx, UART_ABEO_Type ABIntType);
00613 void UART_ABCmd(LPC_UART_TypeDef *UARTx, UART_AB_CFG_Type *ABConfigStruct, \
00614                                 FunctionalState NewState);
00615
00616 /* UART1 FullModem functions ----------------------------------------------------*/
00617 void UART_FullModemForcePinState(LPC_UART1_TypeDef *UARTx, UART_MODEM_PIN_Type Pin, \
00618                                                         UART1_SignalState NewState);
00619 void UART_FullModemConfigMode(LPC_UART1_TypeDef *UARTx, UART_MODEM_MODE_Type Mode, \
00620                                                         FunctionalState NewState);
00621 uint8_t UART_FullModemGetStatus(LPC_UART1_TypeDef *UARTx);
00622
00623 /* UART RS485 functions ----------------------------------------------------------*/
00624 void UART_RS485Config(LPC_UART1_TypeDef *UARTx, \
00625                 UART1_RS485_CTRLCFG_Type *RS485ConfigStruct);
00626 void UART_RS485ReceiverCmd(LPC_UART1_TypeDef *UARTx, FunctionalState NewState);
00627 void UART_RS485SendSlvAddr(LPC_UART1_TypeDef *UARTx, uint8_t SlvAddr);
00628 uint32_t UART_RS485SendData(LPC_UART1_TypeDef *UARTx, uint8_t *pData, uint32_t size);
00629
00630 /* UART IrDA functions-------------------------------------------------------------*/
00631 void UART_IrDAInvtInputCmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState);
00632 void UART_IrDACmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState);
00633 void UART_IrDAPulseDivConfig(LPC_UART_TypeDef *UARTx, UART_IrDA_PULSE_Type PulseDiv);
00639 #ifdef __cplusplus
00640 }
00641 #endif
00642
00643
00644 #endif /* __LPC17XX_UART_H */
00645
00650 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_wdt.c Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/source/lpc17xx_wdt.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_wdt.c                   2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00032 /* Includes ------------------------------------------------------------------- */
00033 #include "lpc17xx_wdt.h"
00034 #include "lpc17xx_clkpwr.h"
00035 #include "lpc17xx_pinsel.h"
00036
00037
00038 /* If this source file built with example, the LPC17xx FW library configuration
00039  * file in each example directory ("lpc17xx_libcfg.h") must be included,
00040  * otherwise the default FW library configuration file must be included instead
00041  */
00042 #ifdef __BUILD_WITH_EXAMPLE__
00043 #include "lpc17xx_libcfg.h"
00044 #else
00045 #include "lpc17xx_libcfg_default.h"
00046 #endif /* __BUILD_WITH_EXAMPLE__ */
00047
00048
00049 #ifdef _WDT
00050
00051 /* Private Functions ---------------------------------------------------------- */
00052
00053 static uint8_t WDT_SetTimeOut (uint8_t clk_source, uint32_t timeout);
00054
00055 /********************************************************************/
00061 static uint8_t WDT_SetTimeOut (uint8_t clk_source, uint32_t timeout)
00062 {
00063
00064         uint32_t pclk_wdt = 0;
00065         uint32_t tempval = 0;
00066
00067         switch ((WDT_CLK_OPT) clk_source)
00068     {
00069     case WDT_CLKSRC_IRC:
00070         pclk_wdt = 4000000;
00071         // Calculate TC in WDT
00072         tempval  = (((pclk_wdt) / WDT_US_INDEX) * (timeout / 4));
00073         // Check if it valid
00074         if (tempval >= WDT_TIMEOUT_MIN)
00075         {
00076                 LPC_WDT->WDTC = tempval;
00077                 return  SUCCESS;
00078         }
00079
00080         break;
00081
00082     case WDT_CLKSRC_PCLK:
00083
00084         // Get WDT clock with CCLK divider = 4
00085                 pclk_wdt = SystemCoreClock / 4;
00086                 // Calculate TC in WDT
00087                 tempval  = (((pclk_wdt) / WDT_US_INDEX) * (timeout / 4));
00088
00089                 if (tempval >= WDT_TIMEOUT_MIN)
00090                 {
00091                         CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_WDT, CLKPWR_PCLKSEL_CCLK_DIV_4);
00092                         LPC_WDT->WDTC = (uint32_t) tempval;
00093                         return SUCCESS;
00094                 }
00095
00096                 // Get WDT clock with CCLK divider = 2
00097                 pclk_wdt = SystemCoreClock / 2;
00098                 // Calculate TC in WDT
00099                 tempval  = (((pclk_wdt) / WDT_US_INDEX) * (timeout / 4));
00100
00101                 if (tempval >= WDT_TIMEOUT_MIN)
00102                 {
00103                         CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_WDT, CLKPWR_PCLKSEL_CCLK_DIV_2);
00104                         LPC_WDT->WDTC = (uint32_t) tempval;
00105                         return  SUCCESS;
00106                 }
00107
00108                 // Get WDT clock with CCLK divider = 1
00109                 pclk_wdt = SystemCoreClock;
00110                 // Calculate TC in WDT
00111                 tempval  = (((pclk_wdt) / WDT_US_INDEX) * (timeout / 4));
00112
00113                 if (tempval >= WDT_TIMEOUT_MIN)
00114                 {
00115                         CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_WDT, CLKPWR_PCLKSEL_CCLK_DIV_1);
00116                         LPC_WDT->WDTC = (uint32_t) tempval;
00117                         return  SUCCESS;
00118                 }
00119                 break ;
00120
00121
00122     case WDT_CLKSRC_RTC:
00123                 pclk_wdt = 32768;
00124                 // Calculate TC in WDT
00125                 tempval  = (((pclk_wdt) / WDT_US_INDEX) * (timeout / 4));
00126                 // Check if it valid
00127                 if (tempval >= WDT_TIMEOUT_MIN)
00128                 {
00129                         LPC_WDT->WDTC = (uint32_t) tempval;
00130                         return  SUCCESS;
00131                 }
00132
00133                 break;
00134
00135 // Error parameter
00136                 default:
00137                         break;
00138 }
00139
00140         return ERROR;
00141 }
00142
00143 /* End of Private Functions --------------------------------------------------- */
00144
00145
00146 /* Public Functions ----------------------------------------------------------- */
00152 /*********************************************************************/
00164 void WDT_Init (WDT_CLK_OPT ClkSrc, WDT_MODE_OPT WDTMode)
00165 {
00166         CHECK_PARAM(PARAM_WDT_CLK_OPT(ClkSrc));
00167         CHECK_PARAM(PARAM_WDT_MODE_OPT(WDTMode));
00168         CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_WDT, CLKPWR_PCLKSEL_CCLK_DIV_4);
00169
00170         //Set clock source
00171         LPC_WDT->WDCLKSEL &= ~WDT_WDCLKSEL_MASK;
00172         LPC_WDT->WDCLKSEL |= ClkSrc;
00173         //Set WDT mode
00174         if (WDTMode == WDT_MODE_RESET){
00175                 LPC_WDT->WDMOD |= WDT_WDMOD(WDTMode);
00176         }
00177 }
00178
00179 /*********************************************************************/
00184 void WDT_Start(uint32_t TimeOut)
00185 {
00186         uint32_t ClkSrc;
00187
00188         ClkSrc = LPC_WDT->WDCLKSEL;
00189         ClkSrc &=WDT_WDCLKSEL_MASK;
00190         WDT_SetTimeOut(ClkSrc,TimeOut);
00191         //enable watchdog
00192         LPC_WDT->WDMOD |= WDT_WDMOD_WDEN;
00193         WDT_Feed();
00194 }
00195
00196 /********************************************************************/
00201 FlagStatus WDT_ReadTimeOutFlag (void)
00202 {
00203         return ((FlagStatus)((LPC_WDT->WDMOD & WDT_WDMOD_WDTOF) >>2));
00204 }
00205
00206 /********************************************************************/
00211 void WDT_ClrTimeOutFlag (void)
00212 {
00213         LPC_WDT->WDMOD &=~WDT_WDMOD_WDTOF;
00214 }
00215
00216 /********************************************************************/
00221 void WDT_UpdateTimeOut ( uint32_t TimeOut)
00222 {
00223         uint32_t ClkSrc;
00224         ClkSrc = LPC_WDT->WDCLKSEL;
00225         ClkSrc &=WDT_WDCLKSEL_MASK;
00226         WDT_SetTimeOut(ClkSrc,TimeOut);
00227         WDT_Feed();
00228 }
00229
00230
00231 /********************************************************************/
00238 void WDT_Feed (void)
00239 {
00240         // Disable irq interrupt
00241         __disable_irq();
00242         LPC_WDT->WDFEED = 0xAA;
00243         LPC_WDT->WDFEED = 0x55;
00244         // Then enable irq interrupt
00245         __enable_irq();
00246 }
00247
00248 /********************************************************************/
00253 uint32_t WDT_GetCurrentCount(void)
00254 {
00255         return LPC_WDT->WDTV;
00256 }
00257
00262 #endif /* _WDT */
00263
00268 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:43 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_wdt.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc17xx_wdt.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc17xx_wdt.h                           2010-05-21
00003 */
00027 /* Peripheral group ----------------------------------------------------------- */
00033 #ifndef LPC17XX_WDT_H_
00034 #define LPC17XX_WDT_H_
00035
00036 /* Includes ------------------------------------------------------------------- */
00037 #include "LPC17xx.h"
00038 #include "lpc_types.h"
00039
00040
00041 #ifdef __cplusplus
00042 extern "C"
00043 {
00044 #endif
00045
00046
00047 /* Private Macros ------------------------------------------------------------- */
00052 /* --------------------- BIT DEFINITIONS -------------------------------------- */
00054 #define WDT_WDMOD_WDEN                      ((uint32_t)(1<<0))
00055
00056 #define WDT_WDMOD_WDRESET                       ((uint32_t)(1<<1))
00057
00058 #define WDT_WDMOD_WDTOF                         ((uint32_t)(1<<2))
00059
00060 #define WDT_WDMOD_WDINT                         ((uint32_t)(1<<3))
00061
00062 #define WDT_WDMOD(n)                            ((uint32_t)(1<<1))
00063
00065 #define WDT_US_INDEX    ((uint32_t)(1000000))
00066
00067 #define WDT_TIMEOUT_MIN ((uint32_t)(0xFF))
00068
00069 #define WDT_TIMEOUT_MAX ((uint32_t)(0xFFFFFFFF))
00070
00072 #define WDT_WDMOD_MASK                  (uint8_t)(0x02)
00073
00074 #define WDT_WDTC_MASK                   (uint8_t)(0xFFFFFFFF)
00075
00076 #define WDT_WDFEED_MASK                 (uint8_t)(0x000000FF)
00077
00078 #define WDT_WDCLKSEL_MASK               (uint8_t)(0x03)
00079
00080 #define WDT_WDCLKSEL_RC                 (uint8_t)(0x00)
00081
00082 #define WDT_WDCLKSEL_PCLK               (uint8_t)(0x01)
00083
00084 #define WDT_WDCLKSEL_RTC                (uint8_t)(0x02)
00085
00086 /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
00087 /* Macro check clock source selection  */
00088 #define PARAM_WDT_CLK_OPT(OPTION)  ((OPTION ==WDT_CLKSRC_IRC)||(OPTION ==WDT_CLKSRC_IRC)\
00089 ||(OPTION ==WDT_CLKSRC_IRC))
00090
00091 /* Macro check WDT mode */
00092 #define PARAM_WDT_MODE_OPT(OPTION)  ((OPTION ==WDT_MODE_INT_ONLY)||(OPTION ==WDT_MODE_RESET))
00093
00098 /* Public Types --------------------------------------------------------------- */
00104 typedef enum {
00105         WDT_CLKSRC_IRC = 0,
00106         WDT_CLKSRC_PCLK = 1,
00107         WDT_CLKSRC_RTC = 2
00108 } WDT_CLK_OPT;
00109
00111 typedef enum {
00112         WDT_MODE_INT_ONLY = 0,
00113         WDT_MODE_RESET = 1
00114 } WDT_MODE_OPT;
00115
00121 /* Public Functions ----------------------------------------------------------- */
00126 void WDT_Init (WDT_CLK_OPT ClkSrc, WDT_MODE_OPT WDTMode);
00127 void WDT_Start(uint32_t TimeOut);
00128 void WDT_Feed (void);
00129 void WDT_UpdateTimeOut ( uint32_t TimeOut);
00130 FlagStatus WDT_ReadTimeOutFlag (void);
00131 void WDT_ClrTimeOutFlag (void);
00132 uint32_t WDT_GetCurrentCount(void);
00133
00138 #ifdef __cplusplus
00139 }
00140 #endif
00141
00142 #endif /* LPC17XX_WDT_H_ */
00143
00148 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc_types.h Source File

C:/nxpdrv/LPC1700CMSIS/Drivers/include/lpc_types.h
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          lpc_types.h             2008-07-27
00003 */
00029 /* Type group ----------------------------------------------------------- */
00035 #ifndef LPC_TYPES_H
00036 #define LPC_TYPES_H
00037
00038 /* Includes ------------------------------------------------------------------- */
00039 #include <stdint.h>
00040
00041
00042 /* Public Types --------------------------------------------------------------- */
00050 typedef enum {FALSE = 0, TRUE = !FALSE} Bool;
00051
00055 typedef enum {RESET = 0, SET = !RESET} FlagStatus, IntStatus, SetState;
00056 #define PARAM_SETSTATE(State) ((State==RESET) || (State==SET))
00057
00061 typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
00062 #define PARAM_FUNCTIONALSTATE(State) ((State==DISABLE) || (State==ENABLE))
00063
00067 typedef enum {ERROR = 0, SUCCESS = !ERROR} Status;
00068
00069
00073 typedef enum
00074 {
00075         NONE_BLOCKING = 0,
00076         BLOCKING
00077 } TRANSFER_BLOCK_Type;
00078
00079
00081 typedef void (*PFV)();
00082
00084 typedef int32_t(*PFI)();
00085
00091 /* Public Macros -------------------------------------------------------------- */
00096 /* _BIT(n) sets the bit at position "n"
00097  * _BIT(n) is intended to be used in "OR" and "AND" expressions:
00098  * e.g., "(_BIT(3) | _BIT(7))".
00099  */
00100 #undef _BIT
00101 /* Set bit macro */
00102 #define _BIT(n) (1<<n)
00103
00104 /* _SBF(f,v) sets the bit field starting at position "f" to value "v".
00105  * _SBF(f,v) is intended to be used in "OR" and "AND" expressions:
00106  * e.g., "((_SBF(5,7) | _SBF(12,0xF)) & 0xFFFF)"
00107  */
00108 #undef _SBF
00109 /* Set bit field macro */
00110 #define _SBF(f,v) (v<<f)
00111
00112 /* _BITMASK constructs a symbol with 'field_width' least significant
00113  * bits set.
00114  * e.g., _BITMASK(5) constructs '0x1F', _BITMASK(16) == 0xFFFF
00115  * The symbol is intended to be used to limit the bit field width
00116  * thusly:
00117  * <a_register> = (any_expression) & _BITMASK(x), where 0 < x <= 32.
00118  * If "any_expression" results in a value that is larger than can be
00119  * contained in 'x' bits, the bits above 'x - 1' are masked off.  When
00120  * used with the _SBF example above, the example would be written:
00121  * a_reg = ((_SBF(5,7) | _SBF(12,0xF)) & _BITMASK(16))
00122  * This ensures that the value written to a_reg is no wider than
00123  * 16 bits, and makes the code easier to read and understand.
00124  */
00125 #undef _BITMASK
00126 /* Bitmask creation macro */
00127 #define _BITMASK(field_width) ( _BIT(field_width) - 1)
00128
00129 /* NULL pointer */
00130 #ifndef NULL
00131 #define NULL ((void*) 0)
00132 #endif
00133
00134 /* Number of elements in an array */
00135 #define NELEMENTS(array)  (sizeof (array) / sizeof (array[0]))
00136
00137 /* Static data/function define */
00138 #define STATIC static
00139 /* External data/function define */
00140 #define EXTERN extern
00141
00142 #if !defined(MAX)
00143 #define MAX(a, b) (((a) > (b)) ? (a) : (b))
00144 #endif
00145 #if !defined(MIN)
00146 #define MIN(a, b) (((a) < (b)) ? (a) : (b))
00147 #endif
00148
00154 /* Old Type Definition compatibility ------------------------------------------ */
00160 typedef char CHAR;
00161
00163 typedef uint8_t UNS_8;
00164
00166 typedef int8_t INT_8;
00167
00169 typedef uint16_t UNS_16;
00170
00172 typedef int16_t INT_16;
00173
00175 typedef uint32_t UNS_32;
00176
00178 typedef int32_t INT_32;
00179
00181 typedef int64_t INT_64;
00182
00184 typedef uint64_t UNS_64;
00185
00187 typedef Bool BOOL_32;
00188
00190 typedef Bool BOOL_16;
00191
00193 typedef Bool BOOL_8;
00194
00200 #endif /* LPC_TYPES_H */
00201
00206 /* --------------------------------- End Of File ------------------------------ */
Generated on Mon Nov 28 2011 11:14:42 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/main.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/main.c
Go to the documentation of this file.
00001 #include <stdio.h>
00002 #include <string.h>
00003
00004 #include "debug_frmwrk.h"
00005 #include "clock-arch.h"
00006 #include "timer.h"
00007 #include "uip-conf.h"
00008 #include "uipopt.h"
00009 #include "uip_arp.h"
00010 #include "uip.h"
00011 #include "emac.h"
00012 #include "lpc_types.h"
00013 #include "lpc17xx_libcfg.h"
00014 #include "lpc17xx_pinsel.h"
00015 #include "lpc17xx_gpio.h"
00016
00017
00018 #define BUF ((struct uip_eth_hdr *)&uip_buf[0])
00019
00020 #define LED_PIN         (1<<6)
00021 #define LED2_MASK       ((1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6))
00022 #define LED1_MASK       ((1<<28) | (1<<29) | (0x80000000))
00023
00024
00025 /* For debugging... */
00026 #include <stdio.h>
00027 #define DB      _DBG((uint8_t *)_db)
00028 char _db[64];
00029
00030 void LED_Init (void)
00031 {
00032         PINSEL_CFG_Type PinCfg;
00033
00034         uint8_t temp;
00035
00036         PinCfg.Funcnum = 0;
00037         PinCfg.OpenDrain = 0;
00038         PinCfg.Pinmode = 0;
00039         PinCfg.Portnum = 2;
00040         for (temp = 2; temp <= 6; temp++){
00041                 PinCfg.Pinnum = temp;
00042                 PINSEL_ConfigPin(&PinCfg);
00043         }
00044
00045         PinCfg.Funcnum = 0;
00046         PinCfg.OpenDrain = 0;
00047         PinCfg.Pinmode = 0;
00048         PinCfg.Portnum = 1;
00049         PinCfg.Pinnum = 28;
00050         PINSEL_ConfigPin(&PinCfg);
00051         PinCfg.Pinnum = 29;
00052         PINSEL_ConfigPin(&PinCfg);
00053         PinCfg.Pinnum = 31;
00054         PINSEL_ConfigPin(&PinCfg);
00055
00056         // Set direction to output
00057         GPIO_SetDir(2, LED2_MASK, 1);
00058         GPIO_SetDir(1, LED1_MASK, 1);
00059
00060         /* Turn off all LEDs */
00061         GPIO_ClearValue(2, LED2_MASK);
00062         GPIO_ClearValue(1, LED1_MASK);
00063 }
00064
00065 /*************************************************************************
00066  * Function Name: uip_log
00067  * Parameters: none
00068  *
00069  * Return: none
00070  *
00071  * Description: Events logging
00072  *
00073  *************************************************************************/
00074 void uip_log (char *m)
00075 {
00076         _DBG("uIP log message: ");
00077         _DBG(m);
00078         _DBG_("");
00079 }
00080
00081 /*************************************************************************
00082  * Function Name: main
00083  * Parameters: none
00084  *
00085  * Return: none
00086  *
00087  * Description: main
00088  *
00089  *************************************************************************/
00090 int c_entry(void)
00091 {
00092         UNS_32 i, delay;
00093         uip_ipaddr_t ipaddr;
00094         struct timer periodic_timer, arp_timer;
00095
00096         /* Initialize debug via UART0
00097          * – 115200bps
00098          * – 8 data bit
00099          * – No parity
00100          * – 1 stop bit
00101          * – No flow control
00102          */
00103         debug_frmwrk_init();
00104
00105         _DBG_("Hello NXP Semiconductors");
00106         _DBG_("uIP porting on LPC17xx");
00107
00108
00109         // Initialize LED for system tick timer
00110         LED_Init();
00111
00112         _DBG_("Init Clock");
00113         // Sys timer init 1/100 sec tick
00114         clock_init();
00115
00116         timer_set(&periodic_timer, CLOCK_SECOND / 2); /*0.5s */
00117         timer_set(&arp_timer, CLOCK_SECOND * 10);       /*10s */
00118
00119         _DBG_("Init EMAC");
00120         // Initialize the ethernet device driver
00121         while(!tapdev_init()){
00122                 // Delay for a while then continue initializing EMAC module
00123                 _DBG_("Error during initializing EMAC, restart after a while");
00124                 for (delay = 0x100000; delay; delay--);
00125         }
00126
00127
00128 #if 1
00129
00130         _DBG_("Init uIP");
00131         // Initialize the uIP TCP/IP stack.
00132         uip_init();
00133
00134         // init MAC address
00135         uip_ethaddr.addr[0] = EMAC_ADDR0;
00136         uip_ethaddr.addr[1] = EMAC_ADDR1;
00137         uip_ethaddr.addr[2] = EMAC_ADDR2;
00138         uip_ethaddr.addr[3] = EMAC_ADDR3;
00139         uip_ethaddr.addr[4] = EMAC_ADDR4;
00140         uip_ethaddr.addr[5] = EMAC_ADDR5;
00141         uip_setethaddr(uip_ethaddr);
00142
00143
00144         uip_ipaddr(ipaddr, 192,168,0,100);
00145         sprintf(_db, "Set own IP address: %d.%d.%d.%d \n\r", \
00146                         ((uint8_t *)ipaddr)[0], ((uint8_t *)ipaddr)[1], \
00147                         ((uint8_t *)ipaddr)[2], ((uint8_t *)ipaddr)[3]);
00148         DB;
00149         uip_sethostaddr(ipaddr);
00150
00151         uip_ipaddr(ipaddr, 192,168,0,1);
00152         sprintf(_db, "Set Router IP address: %d.%d.%d.%d \n\r", \
00153                         ((uint8_t *)ipaddr)[0], ((uint8_t *)ipaddr)[1], \
00154                         ((uint8_t *)ipaddr)[2], ((uint8_t *)ipaddr)[3]);
00155         DB;
00156         uip_setdraddr(ipaddr);
00157
00158         uip_ipaddr(ipaddr, 255,255,255,0);
00159         sprintf(_db, "Set Subnet mask: %d.%d.%d.%d \n\r", \
00160                         ((uint8_t *)ipaddr)[0], ((uint8_t *)ipaddr)[1], \
00161                         ((uint8_t *)ipaddr)[2], ((uint8_t *)ipaddr)[3]);
00162         DB;
00163         uip_setnetmask(ipaddr);
00164
00165         // Initialize the HTTP server ----------------------------
00166         _DBG_("Init HTTP");
00167         httpd_init();
00168         _DBG_("Init complete!");
00169
00170   while(1)
00171   {
00172     uip_len = tapdev_read(uip_buf);
00173     if(uip_len > 0)
00174     {
00175       if(BUF->type == htons(UIP_ETHTYPE_IP))
00176       {
00177               uip_arp_ipin();
00178               uip_input();
00179               /* If the above function invocation resulted in data that
00180                  should be sent out on the network, the global variable
00181                  uip_len is set to a value > 0. */
00182
00183               if(uip_len > 0)
00184         {
00185                 uip_arp_out();
00186                 tapdev_send(uip_buf,uip_len);
00187               }
00188       }
00189       else if(BUF->type == htons(UIP_ETHTYPE_ARP))
00190       {
00191         uip_arp_arpin();
00192               /* If the above function invocation resulted in data that
00193                  should be sent out on the network, the global variable
00194                  uip_len is set to a value > 0. */
00195               if(uip_len > 0)
00196         {
00197                 tapdev_send(uip_buf,uip_len);
00198               }
00199       }
00200     }
00201     else if(timer_expired(&periodic_timer))
00202     {
00203       timer_reset(&periodic_timer);
00204       for(i = 0; i < UIP_CONNS; i++)
00205       {
00206         uip_periodic(i);
00207         /* If the above function invocation resulted in data that
00208            should be sent out on the network, the global variable
00209            uip_len is set to a value > 0. */
00210         if(uip_len > 0)
00211         {
00212           uip_arp_out();
00213           tapdev_send(uip_buf,uip_len);
00214         }
00215       }
00216 #if UIP_UDP
00217       for(i = 0; i < UIP_UDP_CONNS; i++) {
00218         uip_udp_periodic(i);
00219         /* If the above function invocation resulted in data that
00220            should be sent out on the network, the global variable
00221            uip_len is set to a value > 0. */
00222         if(uip_len > 0) {
00223           uip_arp_out();
00224           tapdev_send();
00225         }
00226       }
00227 #endif /* UIP_UDP */
00228       /* Call the ARP timer function every 10 seconds. */
00229       if(timer_expired(&arp_timer))
00230       {
00231         timer_reset(&arp_timer);
00232         uip_arp_timer();
00233       }
00234     }
00235   }
00236 #endif
00237 }
00238
00239 int main(void)
00240 {
00241         return c_entry();
00242 }
00243
00244 #ifdef  DEBUG
00245 /*******************************************************************************
00246 * @brief                Reports the name of the source file and the source line number
00247 *                               where the CHECK_PARAM error has occurred.
00248 * @param[in]    file Pointer to the source file name
00249 * @param[in]    line assert_param error line source number
00250 * @return               None
00251 *******************************************************************************/
00252 void check_failed(uint8_t *file, uint32_t line)
00253 {
00254         /* User can add his own implementation to report the file name and line number,
00255          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00256
00257         /* Infinite loop */
00258         while(1);
00259 }
00260 #endif
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/master/master.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/master/master.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          master.c                                2010-05-21
00003 */
00025 #include "lpc17xx_i2c.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINITIONS *************************/
00038 #define USEDI2CDEV_M            0
00039
00040 #define I2CDEV_S_ADDR   (0x90>>1)
00041
00043 #define BUFFER_SIZE                     0x10
00044
00045 #if (USEDI2CDEV_M == 0)
00046 #define I2CDEV_M LPC_I2C0
00047 #elif (USEDI2CDEV_M == 2)
00048 #define I2CDEV_M LPC_I2C2
00049 #else
00050 #error "Master I2C device not defined!"
00051 #endif
00052
00053 /************************** PRIVATE VARIABLES *************************/
00054 uint8_t menu1[] =
00055 "********************************************************************************\n\r"
00056 "Hello NXP Semiconductors \n\r"
00057 "I2C demo \n\r"
00058 "\t - MCU: LPC17xx \n\r"
00059 "\t - Core: ARM Cortex-M3 \n\r"
00060 "\t - This example uses two I2C peripheral, one set as master and \n\r"
00061 "\t the other set as slave \n\r"
00062 "\t Test Master mode as alone device \n\r"
00063 "********************************************************************************\n\r";
00064
00066 uint8_t Master_Buf[BUFFER_SIZE];
00067 uint8_t master_test[2];
00068
00069 /************************** PRIVATE FUNCTIONS *************************/
00070 void print_menu(void);
00071 void Buffer_Init(uint8_t type);
00072
00073 /*-------------------------PRIVATE FUNCTIONS-----------------------------*/
00074 /*********************************************************************/
00079 void print_menu(void)
00080 {
00081         _DBG_(menu1);
00082 }
00083
00084 /*********************************************************************/
00093 void Buffer_Init(uint8_t type)
00094 {
00095         uint8_t i;
00096
00097         if (type)
00098         {
00099                 for (i = 0; i < BUFFER_SIZE; i++) {
00100                         Master_Buf[i] = i;
00101                 }
00102         }
00103         else
00104         {
00105                 for (i = 0; i < BUFFER_SIZE; i++) {
00106                         Master_Buf[i] = 0;
00107                 }
00108         }
00109 }
00110
00111
00112 /*-------------------------MAIN FUNCTION------------------------------*/
00113 /*********************************************************************/
00118 int c_entry(void)
00119 {
00120         PINSEL_CFG_Type PinCfg;
00121         I2C_M_SETUP_Type transferMCfg;
00122         uint32_t tempp;
00123         uint8_t *pdat;
00124
00125         /* Initialize debug via UART0
00126          * – 115200bps
00127          * – 8 data bit
00128          * – No parity
00129          * – 1 stop bit
00130          * – No flow control
00131          */
00132         debug_frmwrk_init();
00133
00134         print_menu();
00135
00136
00137         /* I2C block ------------------------------------------------------------------- */
00138
00139         /*
00140          * Init I2C pin connect
00141          */
00142         PinCfg.OpenDrain = 0;
00143         PinCfg.Pinmode = 0;
00144 #if ((USEDI2CDEV_M == 0))
00145         PinCfg.Funcnum = 1;
00146         PinCfg.Pinnum = 27;
00147         PinCfg.Portnum = 0;
00148         PINSEL_ConfigPin(&PinCfg);
00149         PinCfg.Pinnum = 28;
00150         PINSEL_ConfigPin(&PinCfg);
00151 #endif
00152 #if ((USEDI2CDEV_M == 2))
00153         PinCfg.Funcnum = 2;
00154         PinCfg.Pinnum = 10;
00155         PinCfg.Portnum = 0;
00156         PINSEL_ConfigPin(&PinCfg);
00157         PinCfg.Pinnum = 11;
00158         PINSEL_ConfigPin(&PinCfg);
00159 #endif
00160
00161         // Initialize Slave I2C peripheral
00162         I2C_Init(I2CDEV_M, 100000);
00163
00164         /* Enable Slave I2C operation */
00165         I2C_Cmd(I2CDEV_M, ENABLE);
00166
00167         /* Transmit -------------------------------------------------------- */
00168         _DBG_("Press '1' to transmit");
00169         while (_DG != '1');
00170         _DBG_("Start Transmit...");
00171
00172         /* Initialize buffer */
00173         Buffer_Init(1);
00174
00175         /* Start I2C slave device first */
00176         transferMCfg.sl_addr7bit = I2CDEV_S_ADDR;
00177         transferMCfg.tx_data = Master_Buf;
00178         transferMCfg.tx_length = sizeof(Master_Buf);
00179         transferMCfg.rx_data = NULL;
00180         transferMCfg.rx_length = 0;
00181         transferMCfg.retransmissions_max = 3;
00182         I2C_MasterTransferData(I2CDEV_M, &transferMCfg, I2C_TRANSFER_POLLING);
00183
00184
00185         /* Receive -------------------------------------------------------- */
00186         _DBG_("Press '2' to receive");
00187         while(_DG != '2');
00188         _DBG_("Receive...");
00189
00190         /* Initialize buffer */
00191         Buffer_Init(0);
00192
00193         /* Start I2C slave device first */
00194         transferMCfg.sl_addr7bit = I2CDEV_S_ADDR;
00195         transferMCfg.tx_data = NULL ;
00196         transferMCfg.tx_length = 0;
00197         transferMCfg.rx_data = Master_Buf;
00198         transferMCfg.rx_length = sizeof(Master_Buf);
00199         transferMCfg.retransmissions_max = 3;
00200         I2C_MasterTransferData(I2CDEV_M, &transferMCfg, I2C_TRANSFER_POLLING);
00201
00202         pdat = Master_Buf;
00203         // Verify
00204         for (tempp = 0; tempp < sizeof(Master_Buf); tempp++){
00205                 if (*pdat++ != tempp){
00206                         _DBG_("Verify error");
00207                         break;
00208                 }
00209         }
00210         if (tempp == sizeof(Master_Buf)){
00211                 _DBG_("Verify successfully");
00212         }
00213
00214 #if 1
00215         /* Transmit and receive -------------------------------------------------------- */
00216         _DBG_("Press '3' to Transmit, then repeat start and receive...");
00217         while (_DG != '3');
00218
00219         /* Initialize buffer */
00220         Buffer_Init(0);
00221         master_test[0] = 0xAA;
00222         master_test[1] = 0x55;
00223
00224         /* Start I2C slave device first */
00225         transferMCfg.sl_addr7bit = I2CDEV_S_ADDR;
00226         transferMCfg.tx_data = master_test ;
00227         transferMCfg.tx_length = sizeof(master_test);
00228         transferMCfg.rx_data = Master_Buf;
00229         transferMCfg.rx_length = sizeof(Master_Buf);
00230         transferMCfg.retransmissions_max = 3;
00231         I2C_MasterTransferData(I2CDEV_M, &transferMCfg, I2C_TRANSFER_POLLING);
00232 #endif
00233
00234         pdat = Master_Buf;
00235         // Verify
00236         for (tempp = 0; tempp < sizeof(Master_Buf); tempp++){
00237                 if (*pdat++ != tempp){
00238                         _DBG_("Verify error");
00239                         break;
00240                 }
00241         }
00242         if (tempp == sizeof(Master_Buf)){
00243                 _DBG_("Verify successfully");
00244         }
00245         I2C_DeInit(I2CDEV_M);
00246     /* Loop forever */
00247     while(1);
00248 }
00249
00250 /* With ARM and GHS toolsets, the entry point is main() - this will
00251    allow the linker to generate wrapper code to setup stacks, allocate
00252    heap area, and initialize and copy code and data segments. For GNU
00253    toolsets, the entry point is through __start() in the crt0_gnu.asm
00254    file, and that startup code will setup stacks and data */
00255 int main(void)
00256 {
00257     return c_entry();
00258 }
00259
00260
00261 #ifdef  DEBUG
00262 /*******************************************************************************
00263 * @brief                Reports the name of the source file and the source line number
00264 *                               where the CHECK_PARAM error has occurred.
00265 * @param[in]    file Pointer to the source file name
00266 * @param[in]    line assert_param error line source number
00267 * @return               None
00268 *******************************************************************************/
00269 void check_failed(uint8_t *file, uint32_t line)
00270 {
00271         /* User can add his own implementation to report the file name and line number,
00272          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00273
00274         /* Infinite loop */
00275         while(1);
00276 }
00277 #endif
00278
00279 /*
00280  * @}
00281  */
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/Common/Source/math_helper.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/Common/Source/math_helper.c
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        29. November 2010
00005 * $Revision:    V1.0.3
00006 *
00007 * Project:          CMSIS DSP Library
00008 *
00009 * Title:            math_helper.c
00010 *
00011 * Description:  Definition of all helper functions required.
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3
00014 *
00015 * Version 1.0.3 2010/11/29
00016 *    Re-organized the CMSIS folders and updated documentation.
00017 *
00018 * Version 1.0.2 2010/11/11
00019 *    Documentation updated.
00020 *
00021 * Version 1.0.1 2010/10/05
00022 *    Production release and review comments incorporated.
00023 *
00024 * Version 1.0.0 2010/09/20
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 0.0.7  2010/06/10
00028 *    Misra-C changes done
00029 * -------------------------------------------------------------------- */
00030
00031 /* ----------------------------------------------------------------------
00032 *               Include standard header files
00033 * -------------------------------------------------------------------- */
00034 #include<math.h>
00035
00036 /* ----------------------------------------------------------------------
00037 *               Include project header files
00038 * -------------------------------------------------------------------- */
00039 #include "math_helper.h"
00040
00051 float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
00052 {
00053   float EnergySignal = 0.0, EnergyError = 0.0;
00054   uint32_t i;
00055   float SNR;
00056   int temp;
00057   int *test;
00058
00059   for (i = 0; i < buffSize; i++)
00060     {
00061           /* Checking for a NAN value in pRef array */
00062           test =   (int *)(&pRef[i]);
00063       temp =  *test;
00064
00065           if(temp == 0x7FC00000)
00066           {
00067                         return(0);
00068           }
00069
00070           /* Checking for a NAN value in pTest array */
00071           test =   (int *)(&pTest[i]);
00072       temp =  *test;
00073
00074           if(temp == 0x7FC00000)
00075           {
00076                         return(0);
00077           }
00078       EnergySignal += pRef[i] * pRef[i];
00079       EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]);
00080     }
00081
00082         /* Checking for a NAN value in EnergyError */
00083         test =   (int *)(&EnergyError);
00084     temp =  *test;
00085
00086     if(temp == 0x7FC00000)
00087     {
00088                 return(0);
00089     }
00090
00091
00092   SNR = 10 * log10 (EnergySignal / EnergyError);
00093
00094   return (SNR);
00095
00096 }
00097
00098
00109 void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize,
00110                             uint32_t guard_bits)
00111 {
00112   uint32_t i;
00113
00114   for (i = 0; i < blockSize; i++)
00115     {
00116       input_buf[i] = input_buf[i] >> guard_bits;
00117     }
00118 }
00119
00127 void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples)
00128 {
00129   uint32_t i;
00130
00131   for (i = 0; i < numSamples; i++)
00132     {
00133           /* 1048576.0f corresponds to pow(2, 20) */
00134       pOut[i] = (q31_t) (pIn[i] * 1048576.0f);
00135
00136       pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
00137
00138       if (pIn[i] == (float) 1.0)
00139         {
00140           pOut[i] = 0x000FFFFF;
00141         }
00142     }
00143 }
00144
00153 uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples)
00154 {
00155   uint32_t i;
00156   int32_t diff, diffCrnt = 0;
00157   uint32_t maxDiff = 0;
00158
00159   for (i = 0; i < numSamples; i++)
00160   {
00161         diff = pIn[i] - pOut[i];
00162         diffCrnt = (diff > 0) ? diff : -diff;
00163
00164         if(diffCrnt > maxDiff)
00165         {
00166                 maxDiff = diffCrnt;
00167         }
00168   }
00169
00170   return(maxDiff);
00171 }
00172
00181 uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples)
00182 {
00183   uint32_t i;
00184   int32_t diff, diffCrnt = 0;
00185   uint32_t maxDiff = 0;
00186
00187   for (i = 0; i < numSamples; i++)
00188   {
00189         diff = pIn[i] - pOut[i];
00190         diffCrnt = (diff > 0) ? diff : -diff;
00191
00192         if(diffCrnt > maxDiff)
00193         {
00194                 maxDiff = diffCrnt;
00195         }
00196   }
00197
00198   return(maxDiff);
00199 }
00200
00211 void arm_provide_guard_bits_q31 (q31_t * input_buf,
00212                                                                  uint32_t blockSize,
00213                                  uint32_t guard_bits)
00214 {
00215   uint32_t i;
00216
00217   for (i = 0; i < blockSize; i++)
00218     {
00219       input_buf[i] = input_buf[i] >> guard_bits;
00220     }
00221 }
00222
00233 void arm_provide_guard_bits_q7 (q7_t * input_buf,
00234                                                                 uint32_t blockSize,
00235                                 uint32_t guard_bits)
00236 {
00237   uint32_t i;
00238
00239   for (i = 0; i < blockSize; i++)
00240     {
00241       input_buf[i] = input_buf[i] >> guard_bits;
00242     }
00243 }
00244
00245
00246
00255 uint32_t arm_calc_guard_bits (uint32_t num_adds)
00256 {
00257   uint32_t i = 1, j = 0;
00258
00259   if (num_adds == 1)
00260     {
00261       return (0);
00262     }
00263
00264   while (i < num_adds)
00265     {
00266       i = i * 2;
00267       j++;
00268     }
00269
00270   return (j);
00271 }
00272
00279 void arm_apply_guard_bits (float32_t * pIn,
00280                                                    uint32_t numSamples,
00281                                                    uint32_t guard_bits)
00282 {
00283   uint32_t i;
00284
00285   for (i = 0; i < numSamples; i++)
00286     {
00287       pIn[i] = pIn[i] * arm_calc_2pow(guard_bits);
00288     }
00289 }
00290
00296 uint32_t arm_calc_2pow(uint32_t numShifts)
00297 {
00298
00299   uint32_t i, val = 1;
00300
00301   for (i = 0; i < numShifts; i++)
00302     {
00303       val = val * 2;
00304     }
00305
00306   return(val);
00307 }
00308
00309
00310
00318 void arm_float_to_q14 (float *pIn, q15_t * pOut,
00319                        uint32_t numSamples)
00320 {
00321   uint32_t i;
00322
00323   for (i = 0; i < numSamples; i++)
00324     {
00325           /* 16384.0f corresponds to pow(2, 14) */
00326       pOut[i] = (q15_t) (pIn[i] * 16384.0f);
00327
00328       pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
00329
00330       if (pIn[i] == (float) 2.0)
00331         {
00332           pOut[i] = 0x7FFF;
00333         }
00334
00335     }
00336
00337 }
00338
00339
00347 void arm_float_to_q30 (float *pIn, q31_t * pOut,
00348                                            uint32_t numSamples)
00349 {
00350   uint32_t i;
00351
00352   for (i = 0; i < numSamples; i++)
00353     {
00354           /* 1073741824.0f corresponds to pow(2, 30) */
00355       pOut[i] = (q31_t) (pIn[i] * 1073741824.0f);
00356
00357       pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
00358
00359       if (pIn[i] == (float) 2.0)
00360         {
00361           pOut[i] = 0x7FFFFFFF;
00362         }
00363     }
00364 }
00365
00373 void arm_float_to_q29 (float *pIn, q31_t * pOut,
00374                                            uint32_t numSamples)
00375 {
00376   uint32_t i;
00377
00378   for (i = 0; i < numSamples; i++)
00379     {
00380           /* 1073741824.0f corresponds to pow(2, 30) */
00381       pOut[i] = (q31_t) (pIn[i] * 536870912.0f);
00382
00383       pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
00384
00385       if (pIn[i] == (float) 4.0)
00386         {
00387           pOut[i] = 0x7FFFFFFF;
00388         }
00389     }
00390 }
00391
00392
00400 void arm_float_to_q28 (float *pIn, q31_t * pOut,
00401                        uint32_t numSamples)
00402 {
00403   uint32_t i;
00404
00405   for (i = 0; i < numSamples; i++)
00406     {
00407         /* 268435456.0f corresponds to pow(2, 28) */
00408       pOut[i] = (q31_t) (pIn[i] * 268435456.0f);
00409
00410       pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
00411
00412       if (pIn[i] == (float) 8.0)
00413         {
00414           pOut[i] = 0x7FFFFFFF;
00415         }
00416     }
00417 }
00418
00427 void arm_clip_f32 (float *pIn, uint32_t numSamples)
00428 {
00429   uint32_t i;
00430
00431   for (i = 0; i < numSamples; i++)
00432     {
00433       if(pIn[i] > 1.0f)
00434           {
00435             pIn[i] = 1.0;
00436           }
00437           else if( pIn[i] < -1.0f)
00438           {
00439             pIn[i] = -1.0;
00440           }
00441
00442     }
00443 }
00444
00445
00446
00447
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/Common/Include/math_helper.h Source File

C:/nxpdrv/LPC1700CMSIS/Core/CMSIS/DSP_Lib/Examples/Common/Include/math_helper.h
Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        29. November 2010
00005 * $Revision:    V1.0.3
00006 *
00007 * Project:          CMSIS DSP Library
00008 *
00009 * Title:            math_helper.h
00010 *
00011 *
00012 * Description:  Prototypes of all helper functions required.
00013 *
00014 * Target Processor: Cortex-M4/Cortex-M3
00015 *
00016 * Version 1.0.3 2010/11/29
00017 *    Re-organized the CMSIS folders and updated documentation.
00018 *
00019 * Version 1.0.2 2010/11/11
00020 *    Documentation updated.
00021 *
00022 * Version 1.0.1 2010/10/05
00023 *    Production release and review comments incorporated.
00024 *
00025 * Version 1.0.0 2010/09/20
00026 *    Production release and review comments incorporated.
00027 *
00028 * Version 0.0.7  2010/06/10
00029 *    Misra-C changes done
00030 * -------------------------------------------------------------------- */
00031
00032
00033 #include "arm_math.h"
00034
00035 #ifndef MATH_HELPER_H
00036 #define MATH_HELPER_H
00037
00038 float arm_snr_f32(float *pRef, float *pTest,  uint32_t buffSize);
00039 void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples);
00040 void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
00041 void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
00042 void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples);
00043 void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples);
00044 void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples);
00045 void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples);
00046 void arm_clip_f32(float *pIn, uint32_t numSamples);
00047 uint32_t arm_calc_guard_bits(uint32_t num_adds);
00048 void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits);
00049 uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples);
00050 uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples);
00051 uint32_t arm_calc_2pow(uint32_t guard_bits);
00052 #endif
00053
Generated on Mon Nov 28 2011 11:14:34 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/MCPWM/MCPWMSimple/mcpwm_simple.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/MCPWM/MCPWMSimple/mcpwm_simple.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          mcpwm_simple.c                          2010-05-21
00003 */
00025 #include "lpc17xx_mcpwm.h"
00026 #include "lpc17xx_pinsel.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_clkpwr.h"
00029 #include "debug_frmwrk.h"
00030
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINITIONS **********************/
00040 #define DC_MODE_TEST                    1
00041
00042 #define AC_MODE_TEST                    0
00043
00044 #define CAPTURE_MODE_TEST               0
00045
00046
00047 /************************** PRIVATE VARIABLES *************************/
00048 #if CAPTURE_MODE_TEST
00049
00050 MCPWM_CAPTURE_CFG_Type captureCfg;
00052 __IO FlagStatus CapFlag;
00054 __IO uint32_t CapVal;
00055 #endif
00056 /************************** PRIVATE FUNCTIONS *************************/
00057 void MCPWM_IRQHandler(void);
00058
00059 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00060 /*********************************************************************/
00065 void MCPWM_IRQHandler(void)
00066 {
00067 #if CAPTURE_MODE_TEST
00068         // Check whether if capture event interrupt is set
00069         if (MCPWM_GetIntStatus(LPC_MCPWM, MCPWM_INTFLAG_CAP0)) {
00070                 if (CapFlag == RESET) {
00071                         // Store capture value
00072                         CapVal = MCPWM_GetCapture(LPC_MCPWM, 0);
00073                         // toggle capture flag
00074                         CapFlag = SET;
00075                         // Disable interrupt for capture event
00076                         MCPWM_IntConfig(LPC_MCPWM, MCPWM_INTFLAG_CAP0, DISABLE);
00077                 }
00078                 // Clear pending interrupt
00079                 MCPWM_IntClear(LPC_MCPWM, MCPWM_INTFLAG_CAP0);
00080         }
00081 #endif
00082 }
00083
00084
00085 /*-------------------------MAIN FUNCTION------------------------------*/
00086 /*********************************************************************/
00091 int c_entry(void)
00092 {
00093         // MCPWM Channel configuration data
00094         MCPWM_CHANNEL_CFG_Type channelsetup[3];
00095         uint32_t i;
00096         PINSEL_CFG_Type PinCfg;
00097
00098         /* Initialize debug via UART0
00099          * – 115200bps
00100          * – 8 data bit
00101          * – No parity
00102          * – 1 stop bit
00103          * – No flow control
00104          */
00105         debug_frmwrk_init();
00106         _DBG_("Hello MCPWM ...");
00107
00108         /* Pin configuration for MCPWM function:
00109          * Assign:      - P1.19 as MCOA0 - Motor Control Channel 0 Output A
00110          *                      - P1.22 as MCOB0 - Motor Control Channel 0 Output B
00111          *                      - P1.25 as MCOA1 - Motor Control Channel 1 Output A
00112          *                      - P1.26 as MCOB1 - Motor Control Channel 1 Output B
00113          *                      - P1.28 as MCOA2 - Motor Control Channel 2 Output A
00114          *                      - P1.29 as MCOB2 - Motor Control Channel 2 Output B
00115          *                      - P1.20 as MCI0  - Motor Control Feed Back Channel 0
00116          * Warning: According to Errata.lpc1768-18.March.2010: Input pin (MIC0-2)
00117          * on the Motor Control PWM peripheral are not functional
00118          */
00119         PinCfg.Funcnum = 1;
00120         PinCfg.OpenDrain = 0;
00121         PinCfg.Pinmode = 0;
00122         PinCfg.Portnum = 1;
00123         PinCfg.Pinnum = 19;
00124         PINSEL_ConfigPin(&PinCfg);
00125         PinCfg.Pinnum = 22;
00126         PINSEL_ConfigPin(&PinCfg);
00127         PinCfg.Pinnum = 25;
00128         PINSEL_ConfigPin(&PinCfg);
00129         PinCfg.Pinnum = 26;
00130         PINSEL_ConfigPin(&PinCfg);
00131         PinCfg.Pinnum = 28;
00132         PINSEL_ConfigPin(&PinCfg);
00133         PinCfg.Pinnum = 29;
00134         PINSEL_ConfigPin(&PinCfg);
00135         PinCfg.Pinnum = 20;
00136         PINSEL_ConfigPin(&PinCfg);
00137
00138         /* Disable interrupt for MCPWM  */
00139         NVIC_DisableIRQ(MCPWM_IRQn);
00140         /* preemption = 1, sub-priority = 1 */
00141         NVIC_SetPriority(MCPWM_IRQn, ((0x01<<3)|0x01));
00142
00143         /* Init MCPWM peripheral */
00144         MCPWM_Init(LPC_MCPWM);
00145
00146         channelsetup[0].channelType = MCPWM_CHANNEL_EDGE_MODE;
00147         channelsetup[0].channelPolarity = MCPWM_CHANNEL_PASSIVE_LO;
00148         channelsetup[0].channelDeadtimeEnable = DISABLE;
00149         channelsetup[0].channelDeadtimeValue = 0;
00150         channelsetup[0].channelUpdateEnable = ENABLE;
00151         channelsetup[0].channelTimercounterValue = 0;
00152         channelsetup[0].channelPeriodValue = 300;
00153         channelsetup[0].channelPulsewidthValue = 0;
00154
00155         channelsetup[1].channelType = MCPWM_CHANNEL_EDGE_MODE;
00156         channelsetup[1].channelPolarity = MCPWM_CHANNEL_PASSIVE_LO;
00157         channelsetup[1].channelDeadtimeEnable = DISABLE;
00158         channelsetup[1].channelDeadtimeValue = 0;
00159         channelsetup[1].channelUpdateEnable = ENABLE;
00160         channelsetup[1].channelTimercounterValue = 0;
00161         channelsetup[1].channelPeriodValue = 300;
00162         channelsetup[1].channelPulsewidthValue = 100;
00163
00164         channelsetup[2].channelType = MCPWM_CHANNEL_EDGE_MODE;
00165         channelsetup[2].channelPolarity = MCPWM_CHANNEL_PASSIVE_LO;
00166         channelsetup[2].channelDeadtimeEnable = DISABLE;
00167         channelsetup[2].channelDeadtimeValue = 0;
00168         channelsetup[2].channelUpdateEnable = ENABLE;
00169         channelsetup[2].channelTimercounterValue = 0;
00170         channelsetup[2].channelPeriodValue = 300;
00171         channelsetup[2].channelPulsewidthValue = 200;
00172
00173         MCPWM_ConfigChannel(LPC_MCPWM, 0, &channelsetup[0]);
00174         MCPWM_ConfigChannel(LPC_MCPWM, 1, &channelsetup[1]);
00175         MCPWM_ConfigChannel(LPC_MCPWM, 2, &channelsetup[2]);
00176
00177 #if DC_MODE_TEST
00178         /*
00179          * - DC mode enabled.
00180          * - Invert Output enabled
00181          * - A0 and A1 output pin is internally routed to A0 signal
00182          */
00183         MCPWM_DCMode(LPC_MCPWM, ENABLE, ENABLE, (MCPWM_PATENT_A0|MCPWM_PATENT_A1));
00184 #endif
00185
00186 #if AC_MODE_TEST
00187         /*
00188          * - AC mode is enabled.
00189          */
00190         MCPWM_ACMode(LPC_MCPWM, ENABLE);
00191 #endif
00192
00193 #if CAPTURE_MODE_TEST
00194         /*
00195          * Capture mode in this case is used to detect the falling edge on MCO0B output pin.
00196          * The MCFB0 input pin therefore must be connected to MCO0B. (P1.20 - P1.22)
00197          * - Capture Channel 0.
00198          * - Capture falling edge on MCFB0 input pin.
00199          * - Interrupt enabled on capture event.
00200          */
00201         captureCfg.captureChannel = 0;
00202         captureCfg.captureFalling = ENABLE;
00203         captureCfg.captureRising = DISABLE;
00204         captureCfg.hnfEnable = DISABLE;
00205         captureCfg.timerReset = DISABLE;
00206         MCPWM_ConfigCapture(LPC_MCPWM, 0, &captureCfg);
00207
00208         // Reset flag for the first time
00209         CapFlag = RESET;
00210
00211         // Enable interrupt for capture event on MCI0 (MCFB0)
00212         MCPWM_IntConfig(LPC_MCPWM, MCPWM_INTFLAG_CAP0, ENABLE);
00213
00214         /* Enable interrupt for MCPWM  */
00215         NVIC_EnableIRQ(MCPWM_IRQn);
00216 #endif
00217
00218         MCPWM_Start(LPC_MCPWM, ENABLE, ENABLE, ENABLE);
00219
00220         // Main loop
00221         while (1) {
00222 //              Timer_Wait(LPC_TIM0, 1000);
00223                 //delay
00224                 for(i=0;i<100000;i++);
00225
00226                 channelsetup[0].channelPulsewidthValue = (channelsetup[0].channelPulsewidthValue >= 300) ?
00227                                                                                                 0 : channelsetup[0].channelPulsewidthValue + 20;
00228                 channelsetup[1].channelPulsewidthValue = (channelsetup[1].channelPulsewidthValue >= 300) ?
00229                                                                                                 0 : channelsetup[1].channelPulsewidthValue + 20;
00230                 channelsetup[2].channelPulsewidthValue = (channelsetup[2].channelPulsewidthValue >= 300) ?
00231                                                                                                 0 : channelsetup[2].channelPulsewidthValue + 20;
00232                 _DBG_("Update!");
00233                 MCPWM_WriteToShadow(LPC_MCPWM, 0, &channelsetup[0]);
00234                 MCPWM_WriteToShadow(LPC_MCPWM, 1, &channelsetup[1]);
00235                 MCPWM_WriteToShadow(LPC_MCPWM, 2, &channelsetup[2]);
00236 #if CAPTURE_MODE_TEST
00237                 // Check capture flag is set or not
00238                 if (CapFlag) {
00239                         // Print out the value
00240                         _DBG("Capture Value: ");
00241                         _DBD32(CapVal); _DBG_("");
00242
00243                         // Setup a new capture event
00244                         MCPWM_ConfigCapture(LPC_MCPWM, 0, &captureCfg);
00245
00246                         // Re-Enable interrupt for capture event on MCI0 (MCFB0)
00247                         MCPWM_IntConfig(LPC_MCPWM, MCPWM_INTFLAG_CAP0, ENABLE);
00248
00249                         // Reset flag
00250                         CapFlag = RESET;
00251                 }
00252 #endif
00253         }
00254 }
00255
00256 /* With ARM and GHS toolsets, the entry point is main() - this will
00257    allow the linker to generate wrapper code to setup stacks, allocate
00258    heap area, and initialize and copy code and data segments. For GNU
00259    toolsets, the entry point is through __start() in the crt0_gnu.asm
00260    file, and that startup code will setup stacks and data */
00261 int main(void)
00262 {
00263     return c_entry();
00264 }
00265
00266
00267 #ifdef  DEBUG
00268 /*******************************************************************************
00269 * @brief                Reports the name of the source file and the source line number
00270 *                               where the CHECK_PARAM error has occurred.
00271 * @param[in]    file Pointer to the source file name
00272 * @param[in]    line assert_param error line source number
00273 * @return               None
00274 *******************************************************************************/
00275 void check_failed(uint8_t *file, uint32_t line)
00276 {
00277         /* User can add his own implementation to report the file name and line number,
00278          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00279
00280         /* Infinite loop */
00281         while(1);
00282 }
00283 #endif
00284
00285 /*
00286  * @}
00287  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/memory.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/memory.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      Name:    MEMORY.C
00003  *      Purpose: USB Mass Storage Demo
00004  *      Version: V1.10
00005  *----------------------------------------------------------------------------
00006  *      This software is supplied "AS IS" without any warranties, express,
00007  *      implied or statutory, including but not limited to the implied
00008  *      warranties of fitness for purpose, satisfactory quality and
00009  *      noninfringement. Keil extends you a royalty-free right to reproduce
00010  *      and distribute executable files created using this software for use
00011  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00012  *      else gives you the right to use this software.
00013  *
00014  *      Copyright (c) 2005-2009 Keil Software.
00015  *---------------------------------------------------------------------------*/
00016
00017 #include "LPC17xx.h"
00018
00019 #include "lpc_types.h"
00020
00021 #include "usb.h"
00022 #include "usbcfg.h"
00023 #include "usbhw.h"
00024 #include "usbcore.h"
00025 #include "mscuser.h"
00026
00027 #include "memory.h"
00028
00029 #include "lpc17xx_libcfg.h"
00030 #include "lpc17xx_nvic.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 extern uint8_t Memory[MSC_MemorySize];         /* MSC Memory in RAM */
00039
00040
00041 /* Main Program */
00042
00043 int main (void) {
00044         uint32_t n;
00045
00046         for (n = 0; n < MSC_ImageSize; n++) {     /* Copy Initial Disk Image */
00047                 Memory[n] = DiskImage[n];               /*   from Flash to RAM     */
00048         }
00049
00050         USB_Init();                               /* USB Initialization */
00051         USB_Connect(TRUE);                        /* USB Connect */
00052
00053         while (1);                                /* Loop forever */
00054 }
00055
00056 #ifdef  DEBUG
00057 /*******************************************************************************
00058 * @brief                Reports the name of the source file and the source line number
00059 *                               where the CHECK_PARAM error has occurred.
00060 * @param[in]    file Pointer to the source file name
00061 * @param[in]    line assert_param error line source number
00062 * @return               None
00063 *******************************************************************************/
00064 void check_failed(uint8_t *file, uint32_t line)
00065 {
00066         /* User can add his own implementation to report the file name and line number,
00067          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00068
00069         /* Infinite loop */
00070         while(1);
00071 }
00072 #endif
00073
00074 /*
00075  * @}
00076  */
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/memory.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/memory.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      Name:    MEMORY.H
00003  *      Purpose: USB Memory Storage Demo Definitions
00004  *      Version: V1.10
00005  *----------------------------------------------------------------------------
00006  *      This file is part of the uVision/ARM development tools.
00007  *      This software may only be used under the terms of a valid, current,
00008  *      end user licence from KEIL for a compatible version of KEIL software
00009  *      development tools. Nothing else gives you the right to use it.
00010  *
00011  *      Copyright (c) 2005-2007 Keil Software.
00012  *---------------------------------------------------------------------------*/
00013
00014 #define CCLK            60000000    /* CPU Clock */
00015
00016 /* LED Definitions */
00017 #define LED_MSK         0x00FF0000  /* P1.16..23 */
00018 #define LED_RD          0x00010000  /* P1.16 */
00019 #define LED_WR          0x00020000  /* P1.17 */
00020 #define LED_CFG         0x00400000  /* P1.22 */
00021 #define LED_SUSP        0x00800000  /* P1.23 */
00022
00023 /* MSC Disk Image Definitions */
00024 #define MSC_ImageSize   0x00001000
00025
00026 extern const unsigned char DiskImage[MSC_ImageSize];   /* Disk Image */
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/MicroWire/microwire_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/MicroWire/microwire_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          microwire_test.c                                        2010-05-21
00003 */
00026 #include "lpc17xx_ssp.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_pinsel.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINTIONS *************************/
00039 /* Idle char */
00040 #define IDLE_CHAR       0xFF
00041
00043 #define USEDSSPDEV_M            0
00044
00046 #define USEDSSPDEV_S            1
00047
00049 #define BUFFER_SIZE                     0x40
00050
00051 /* These macro below is used in MiroWire Frame Format.
00052  * Since master in MicroWire Frame Format must send a Operation Command
00053  * to slave before each transmission between master and slave
00054  */
00055 /* Write command */
00056 #define MicroWire_WR_CMD        ((uint8_t)(0x00))
00057 /* Read command */
00058 #define MicroWire_RD_CMD        ((uint8_t)(0x01))
00059
00060
00061 #if (USEDSSPDEV_M == USEDSSPDEV_S)
00062 #error "Master and Slave SSP device are duplicated!"
00063 #endif
00064
00065 #if (USEDSSPDEV_M == 0)
00066 #define SSPDEV_M LPC_SSP0
00067 #elif (USEDSSPDEV_M == 1)
00068 #define SSPDEV_M LPC_SSP1
00069 #else
00070 #error "Master SSP device not defined!"
00071 #endif
00072
00073 #if (USEDSSPDEV_S == 0)
00074 #define SSPDEV_S LPC_SSP0
00075 #elif (USEDSSPDEV_S == 1)
00076 #define SSPDEV_S LPC_SSP1
00077 #else
00078 #error "Slave SSP device not defined!"
00079 #endif
00080
00081 /* These variable below are used in Master SSP -------------------- */
00082 /* Read data pointer */
00083 uint8_t *pRdBuf_M;
00084 /* Index of read data mode */
00085 uint32_t RdIdx_M;
00086 /* Length of data */
00087 uint32_t DatLen_M;
00088 /* Master Rx Buffer */
00089 uint8_t Master_Rx_Buf[BUFFER_SIZE];
00090
00091
00092 /* These variable below are used in Slave SSP -------------------- */
00093 /* Write data pointer */
00094 uint8_t *pWrBuf_S;
00095 /* Index of write data mode */
00096 uint32_t WrIdx_S;
00097 /* Length of data */
00098 uint32_t DatLen_S;
00099 /* Slave Tx Buffer */
00100 uint8_t Slave_Tx_Buf[BUFFER_SIZE];
00101 /* Last command */
00102 uint8_t Last_cmd;
00103
00104 /************************** PRIVATE VARIABLES *************************/
00105 uint8_t menu1[] =
00106 "********************************************************************************\n\r"
00107 "Hello NXP Semiconductors \n\r"
00108 "SSP demo \n\r"
00109 "\t - MCU: LPC17xx \n\r"
00110 "\t - Core: ARM Cortex-M3 \n\r"
00111 "\t - Communicate via: UART0 - 115200 bps \n\r"
00112 " This example uses two SSP peripherals in MicroWire frame format \n\r"
00113 " \t one is set as master mode and the other is set as slave mode. \n\r"
00114 "\t The master and slave transfer a number of data bytes together \n\r"
00115 "\t in polling mode \n\r"
00116 "********************************************************************************\n\r";
00117
00118 // SSP Configuration structure variable
00119 SSP_CFG_Type SSP_ConfigStruct;
00120
00121 /************************** PRIVATE FUNCTIONS *************************/
00122 void ssp_MW_SendCMD(LPC_SSP_TypeDef *SSPx, uint8_t cmd);
00123 uint16_t ssp_MW_GetRSP(LPC_SSP_TypeDef *SSPx);
00124 uint8_t ssp_MW_GetCMD(LPC_SSP_TypeDef *SSPx);
00125 void ssp_MW_SendRSP(LPC_SSP_TypeDef *SSPx, uint16_t Rsp);
00126 void print_menu(void);
00127 void Buffer_Init(void);
00128 void Buffer_Verify(void);
00129 void Error_Loop(void);
00130
00131 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00132 /*********************************************************************/
00137 void ssp_MW_SendCMD(LPC_SSP_TypeDef *SSPx, uint8_t cmd)
00138 {
00139         // wait for current SSP activity complete
00140         while (SSP_GetStatus(SSPx, SSP_STAT_BUSY) ==  SET);
00141
00142         SSP_SendData(SSPx, (uint16_t) cmd);
00143 }
00144
00145 /*********************************************************************/
00150 uint16_t ssp_MW_GetRSP(LPC_SSP_TypeDef *SSPx)
00151 {
00152         while (SSP_GetStatus(SSPx, SSP_STAT_RXFIFO_NOTEMPTY) == RESET);
00153         return (SSP_ReceiveData(SSPx));
00154 }
00155
00156 /*********************************************************************/
00161 uint8_t ssp_MW_GetCMD(LPC_SSP_TypeDef *SSPx)
00162 {
00163         // Wait for coming CMD
00164         while (SSP_GetStatus(SSPx, SSP_STAT_RXFIFO_NOTEMPTY) == RESET);
00165
00166         return ((uint8_t)(SSP_ReceiveData(SSPx)));
00167 }
00168
00169 /*********************************************************************/
00174 void ssp_MW_SendRSP(LPC_SSP_TypeDef *SSPx, uint16_t Rsp)
00175 {
00176         // wait for current SSP activity complete
00177         while (SSP_GetStatus(SSPx, SSP_STAT_BUSY) ==  SET);
00178
00179         SSP_SendData(SSPx, Rsp);
00180 }
00181
00182 /*********************************************************************/
00187 void Buffer_Init(void)
00188 {
00189         uint8_t i;
00190
00191         for (i = 0; i < BUFFER_SIZE; i++) {
00192                 Slave_Tx_Buf[i] = i;
00193                 Master_Rx_Buf[i] = 0;
00194         }
00195
00196 }
00197
00198 /*********************************************************************/
00203 void Buffer_Verify(void)
00204 {
00205         uint8_t i;
00206         uint8_t *pSTx = (uint8_t *) &Slave_Tx_Buf[0];
00207         uint8_t *pMRx = (uint8_t *) &Master_Rx_Buf[0];
00208
00209         for ( i = 0; i < BUFFER_SIZE; i++ )
00210         {
00211                 if (*pMRx++ != *pSTx++)
00212                 {
00213                         /* Call Error Loop */
00214                         Error_Loop();
00215                 }
00216         }
00217 }
00218
00219 /*********************************************************************/
00224 void Error_Loop(void)
00225 {
00226         /* Loop forever */
00227         _DBG_("Verify fail!\n\r");
00228         while (1);
00229 }
00230
00231 /*********************************************************************/
00236 void print_menu(void)
00237 {
00238         _DBG(menu1);
00239 }
00240
00241
00242 /*-------------------------MAIN FUNCTION------------------------------*/
00243 /*********************************************************************/
00248 int c_entry(void)
00249 {
00250         uint32_t cnt;
00251         PINSEL_CFG_Type PinCfg;
00252
00253         /* Initialize debug via UART0
00254          * – 115200bps
00255          * – 8 data bit
00256          * – No parity
00257          * – 1 stop bit
00258          * – No flow control
00259          */
00260         debug_frmwrk_init();
00261
00262         // print welcome screen
00263         print_menu();
00264
00265         /*
00266          * Initialize SSP pin connect
00267          * P0.6 - SSEL1
00268          * P0.7 - SCK1
00269          * P0.8 - MISO1
00270          * P0.9 - MOSI1
00271          */
00272         PinCfg.Funcnum = 2;
00273         PinCfg.OpenDrain = 0;
00274         PinCfg.Pinmode = 0;
00275         PinCfg.Portnum = 0;
00276         PinCfg.Pinnum = 6;
00277         PINSEL_ConfigPin(&PinCfg);
00278         PinCfg.Pinnum = 7;
00279         PINSEL_ConfigPin(&PinCfg);
00280         PinCfg.Pinnum = 8;
00281         PINSEL_ConfigPin(&PinCfg);
00282         PinCfg.Pinnum = 9;
00283         PINSEL_ConfigPin(&PinCfg);
00284
00285
00286         /*
00287          * Initialize SSP pin connect
00288          * P0.15 - SCK
00289          * P0.16 - SSEL
00290          * P0.17 - MISO
00291          * P0.18 - MOSI
00292          */
00293         PinCfg.Funcnum = 2;
00294         PinCfg.OpenDrain = 0;
00295         PinCfg.Pinmode = 0;
00296         PinCfg.Portnum = 0;
00297         PinCfg.Pinnum = 15;
00298         PINSEL_ConfigPin(&PinCfg);
00299         PinCfg.Pinnum = 17;
00300         PINSEL_ConfigPin(&PinCfg);
00301         PinCfg.Pinnum = 18;
00302         PINSEL_ConfigPin(&PinCfg);
00303         PinCfg.Pinnum = 16;
00304         PINSEL_ConfigPin(&PinCfg);
00305
00306
00307         /* Initializing Master SSP device section ------------------------------------------- */
00308         // initialize SSP configuration structure to default
00309         SSP_ConfigStructInit(&SSP_ConfigStruct);
00310         // Re-configure SSP to MicroWire frame format
00311         SSP_ConfigStruct.FrameFormat = SSP_FRAME_MICROWIRE;
00312         // Initialize SSP peripheral with parameter given in structure above
00313         SSP_Init(SSPDEV_M, &SSP_ConfigStruct);
00314
00315         // Enable SSP peripheral
00316         SSP_Cmd(SSPDEV_M, ENABLE);
00317
00318
00319     /* Initializing Slave SSP device section ------------------------------------------- */
00320         // initialize SSP configuration structure to default
00321         SSP_ConfigStructInit(&SSP_ConfigStruct);
00322         /* Re-configure mode for SSP device */
00323         SSP_ConfigStruct.Mode = SSP_SLAVE_MODE;
00324         // Re-configure SSP to MicroWire frame format
00325         SSP_ConfigStruct.FrameFormat = SSP_FRAME_MICROWIRE;
00326         // Initialize SSP peripheral with parameter given in structure above
00327         SSP_Init(SSPDEV_S, &SSP_ConfigStruct);
00328
00329         // Enable SSP peripheral
00330         SSP_Cmd(SSPDEV_S, ENABLE);
00331
00332
00333         /* Initializing Buffer section ------------------------------------------------- */
00334         Buffer_Init();
00335
00336         /* Start Transmit/Receive between Master and Slave ----------------------------- */
00337         pRdBuf_M = (uint8_t *)&Master_Rx_Buf[0];
00338         RdIdx_M = 0;
00339         DatLen_M = BUFFER_SIZE;
00340         pWrBuf_S = (uint8_t *)&Slave_Tx_Buf[0];
00341         WrIdx_S = 0;
00342         DatLen_S = BUFFER_SIZE;
00343         /* Force Last command to Read command as default */
00344         Last_cmd = MicroWire_RD_CMD;
00345
00346         /* Clear all remaining data in RX FIFO */
00347         while (SSP_GetStatus(SSPDEV_M, SSP_STAT_RXFIFO_NOTEMPTY))
00348         {
00349                 SSP_ReceiveData(SSPDEV_M);
00350         }
00351         while (SSP_GetStatus(SSPDEV_S, SSP_STAT_RXFIFO_NOTEMPTY))
00352         {
00353                 SSP_ReceiveData(SSPDEV_S);
00354         }
00355
00356         for (cnt = 0; cnt < BUFFER_SIZE; cnt++)
00357         {
00358                 /* The slave must initialize data in FIFO for immediately transfer from master
00359                  * due to last received command
00360                  */
00361                 if (Last_cmd == MicroWire_RD_CMD)
00362                 {
00363                         // Then send the respond to master, this contains data
00364                         ssp_MW_SendRSP(SSPDEV_S, (uint16_t) *(pWrBuf_S + WrIdx_S++));
00365                 }
00366                 else
00367                 {
00368                         // Then send the respond to master, this contains data
00369                         ssp_MW_SendRSP(SSPDEV_S, 0xFF);
00370                 }
00371                 /* Master must send a read command to slave,
00372                  * the slave then respond with its data in FIFO
00373                  */
00374                 ssp_MW_SendCMD(SSPDEV_M, MicroWire_RD_CMD);
00375
00376                 // Master receive respond
00377                 *(pRdBuf_M + RdIdx_M++) = (uint8_t) ssp_MW_GetRSP(SSPDEV_M);
00378
00379                 // Re-assign Last command
00380                 Last_cmd = ssp_MW_GetCMD(SSPDEV_S);
00381         }
00382
00383         /* Verify buffer */
00384         Buffer_Verify();
00385
00386         _DBG_("Verify success!\n\r");
00387
00388     /* Loop forever */
00389     while(1);
00390 }
00391
00392 /* With ARM and GHS toolsets, the entry point is main() - this will
00393    allow the linker to generate wrapper code to setup stacks, allocate
00394    heap area, and initialize and copy code and data segments. For GNU
00395    toolsets, the entry point is through __start() in the crt0_gnu.asm
00396    file, and that startup code will setup stacks and data */
00397 int main(void)
00398 {
00399     return c_entry();
00400 }
00401
00402
00403 #ifdef  DEBUG
00404 /*******************************************************************************
00405 * @brief                Reports the name of the source file and the source line number
00406 *                               where the CHECK_PARAM error has occurred.
00407 * @param[in]    file Pointer to the source file name
00408 * @param[in]    line assert_param error line source number
00409 * @return               None
00410 *******************************************************************************/
00411 void check_failed(uint8_t *file, uint32_t line)
00412 {
00413         /* User can add his own implementation to report the file name and line number,
00414          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00415
00416         /* Infinite loop */
00417         while(1);
00418 }
00419 #endif
00420
00421 /*
00422  * @}
00423  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/MPU/mpu_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/MPU/mpu_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          dac_speaker.c                           2010-07-16
00003 */
00025 #include "lpc17xx_libcfg.h"
00026 #include "lpc17xx_pinsel.h"
00027 #include "debug_frmwrk.h"
00028 #include "lpc17xx_gpio.h"
00029
00030 /************************** PUBLIC DEFINITIONS *************************/
00031 /* Region size definitions */
00032 #define MPU_REGION_SIZE_32B             0x04
00033 #define MPU_REGION_SIZE_64B             0x05
00034 #define MPU_REGION_SIZE_128B    0x06
00035 #define MPU_REGION_SIZE_256B    0x07
00036 #define MPU_REGION_SIZE_512B    0x08
00037 #define MPU_REGION_SIZE_1KB             0x09
00038 #define MPU_REGION_SIZE_2KB             0x0A
00039 #define MPU_REGION_SIZE_4KB             0x0B
00040 #define MPU_REGION_SIZE_8KB             0x0C
00041 #define MPU_REGION_SIZE_16KB    0x0D
00042 #define MPU_REGION_SIZE_32KB    0x0E
00043 #define MPU_REGION_SIZE_64KB    0x0F
00044 #define MPU_REGION_SIZE_128KB   0x10
00045 #define MPU_REGION_SIZE_256KB   0x11
00046 #define MPU_REGION_SIZE_512KB   0x12
00047 #define MPU_REGION_SIZE_1MB             0x13
00048 #define MPU_REGION_SIZE_2MB             0x14
00049 #define MPU_REGION_SIZE_4MB             0x15
00050 #define MPU_REGION_SIZE_8MB             0x16
00051 #define MPU_REGION_SIZE_16MB    0x17
00052 #define MPU_REGION_SIZE_32MB    0x18
00053 #define MPU_REGION_SIZE_64MB    0x19
00054 #define MPU_REGION_SIZE_128MB   0x1A
00055 #define MPU_REGION_SIZE_256MB   0x1B
00056 #define MPU_REGION_SIZE_512MB   0x1C
00057 #define MPU_REGION_SIZE_1GB             0x1D
00058 #define MPU_REGION_SIZE_2GB             0x1E
00059 #define MPU_REGION_SIZE_4GB             0x1F
00060
00061 /* Access permission definitions */
00062 #define MPU_NO_ACCESS                                                   0x00
00063 #define MPU_PRIVILEGED_ACESS_USER_NO_ACCESS             0x01
00064 #define MPU_PRIVILEGED_RW_USER_READ_ONLY                0x02
00065 #define MPU_FULL_ACCESS                                                 0x03
00066 #define MPU_UNPREDICTABLE                                               0x04
00067 #define MPU_PRIVILEGED_READ_ONLY_USER_NO_ACCESS 0x05
00068 #define MPU_READ_ONLY                                                   0x06
00069
00070 /* RASR bit definitions */
00071 #define MPU_RASR_REGION_SIZE(n)                 ((uint32_t)(n<<1))
00072 #define MPU_RASR_ACCESS_PERMISSION(n)   ((uint32_t)(n<<24))
00073 #define MPU_REGION_ENABLE                               ((uint32_t)(1<<0))
00074
00075 /* Example group ----------------------------------------------------------- */
00080 /************************** PRIVATE VARIABLES *************************/
00081 uint8_t menu[]=
00082         "********************************************************************************\n\r"
00083         "Hello NXP Semiconductors \n\r"
00084         "MPU demo \n\r"
00085         "\t - MCU: LPC17xx \n\r"
00086         "\t - Core: ARM CORTEX-M3 \n\r"
00087         "\t - Communicate via: UART0 - 115200 bps \n\r"
00088         "Set up 6 region memory and try to access memory that don't allow to invoke\n\r"
00089         "Memory Management Handler\n\r"
00090         "********************************************************************************\n\r";
00091 Bool Led_State = FALSE;
00092
00093 /************************** PRIVATE FUNCTIONS *************************/
00094 void MemManage_Handler(void);
00095
00096 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00097 /*********************************************************************/
00102 void MemManage_Handler(void)
00103 {
00104         uint32_t i;
00105         //Blink LED P1.28
00106         if(Led_State == FALSE)
00107         {
00108                 GPIO_SetValue(1,(1<<28));
00109                 Led_State = TRUE;
00110                 for(i = 0;i<0x70000;i++);//delay
00111         }
00112         else
00113         {
00114                 GPIO_ClearValue(1,(1<<28));
00115                 Led_State = FALSE;
00116                 for(i = 0;i<0x70000;i++);//delay
00117         }
00118 }
00119
00120 /*-------------------------MAIN FUNCTION------------------------------*/
00121 /*********************************************************************/
00126 int c_entry(void)
00127 {
00128         uint32_t test;
00129         /* Initialize debug via UART0
00130          * – 115200bps
00131          * – 8 data bit
00132          * – No parity
00133          * – 1 stop bit
00134          * – No flow control
00135          */
00136         debug_frmwrk_init();
00137         _DBG(menu);
00138
00139         //Turn off all LEDs
00140         GPIO_SetDir(1,(1<<28)|(1<<29)|(0x80000000),1);
00141         GPIO_SetDir(2,(1<<2)|(1<<3)|(1<<4)|(1<<5)|(1<<6),1);
00142
00143
00144         /* - Region 0: 0x00000000 - 0x0007FFFF --- on-chip non-volatile memory
00145          *              + Size: 512kB
00146          *              + Acess permission: full access
00147          */
00148         MPU->RNR = 0;//indicate MPU region 0
00149         MPU->RBAR = 0x00000000; // update the base address for the region 0
00150         MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)         //full access
00151                                 |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_512KB)    //512Kb size
00152                                 |MPU_REGION_ENABLE;                                                             //region enable
00153
00154         /* - Region 1: 0x10000000 - 0x10007FFF --- on-chip SRAM
00155          *              + Size: 32kB
00156          *              + Access permission: full access
00157          */
00158         MPU->RNR = 1;
00159         MPU->RBAR = 0x10000000; // update the base address for the region 1
00160         MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
00161                                 |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_32KB)
00162                                 |MPU_REGION_ENABLE;
00163
00164          /* - Region 2: 0x40000000 - 0x400FFFFF --- APB peripheral
00165          *              + Size: 1MB
00166          *              + Access permission: full access
00167          */
00168         MPU->RNR = 2;
00169         MPU->RBAR = 0x40000000; // update the base address for the region 2
00170         MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
00171                                 |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_1MB)
00172                                 |MPU_REGION_ENABLE;
00173
00174          /* - Region 3: 0x50000000 - 0x501FFFFF --- AHB peripheral
00175          *              + Size: 2MB
00176          *              + AP=b011: full access
00177          */
00178         MPU->RNR = 3;
00179         MPU->RBAR = 0x50000000; // update the base address for the region 3
00180         MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
00181                                 |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_2MB)
00182                                 |MPU_REGION_ENABLE;
00183
00184          /* - Region 4: 0xE0000000 - 0xE00FFFFF --- System control
00185          *              + Size: 1MB
00186          *              + Access permission: full access
00187          */
00188         MPU->RNR = 4;
00189         MPU->RBAR = 0xE0000000; // update the base address for the region 4
00190         MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
00191                                 |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_1MB)
00192                                 |MPU_REGION_ENABLE;
00193
00194          /* - Region 5:0x2007C000 - 0x2007FFFF --- on chip SRAM
00195          *              + Size: 16kB
00196          *              + Access permission: full access
00197          */
00198         MPU->RNR = 5;
00199         MPU->RBAR = 0x2007C000; // update the base address for the region 5
00200         MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
00201                                 |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_16KB)
00202                                 |MPU_REGION_ENABLE;
00203
00204          /* - Region 6: 0x20080000 - 0x20083FFF --- on chip SRAM
00205          *              + Size: 16kB
00206          *              + Access permission: no access
00207          */
00208         MPU->RNR = 6;
00209         MPU->RBAR = 0x20080000; // update the base address for the region 6
00210         MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_NO_ACCESS)
00211                                 |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_16KB)
00212                                 |MPU_REGION_ENABLE;
00213
00214          /* - Region 5:0x2009C000 - 0x2009FFFF --- GPIO peripheral
00215          *              + Size: 16kB
00216          *              + Access permission: full access
00217          */
00218         MPU->RNR = 7;
00219         MPU->RBAR = 0x2009C000; // update the base address for the region 6
00220         MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
00221                                 |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_16KB)
00222                                 |MPU_REGION_ENABLE;
00223
00224
00225         _DBG_("Setup MPU: \n\r"
00226                   "This provide 8 regions: \n\r"
00227                   "Region 0 - Privileged code: 0x00000000 - 0x0007FFFF(512kB)\n\r"
00228                   "Region 1 - Privileged data: 0x10000000 - 0x10007FFF(32kB)\n\r"
00229                   "Region 2 - APB Peripheral:  0x40000000 - 0x400FFFFF(1MB)\n\r"
00230                   "Region 3 - AHB peripheral:  0x50000000 - 0x501FFFFF(2MB)\n\r"
00231                   "Region 4 - System control:  0xE0000000 - 0xE00FFFFF(1MB)\n\r"
00232                   "Region 5 - On-chip SRAM:    0x2007C000 - 0x2007FFFF(16kB)\n\r"
00233                   "Region 6 - Private SRAM:    0x20080000 - 0x20083FFF(16kB)\n\r"
00234                   "Region 7 - GPIO peripheral: 0x2009C000 - 0x2009FFFF(16Kb)\n\r"
00235                   "Region 6 can not access (just used for testing)");
00236
00237         SCB->SHCSR |=(1<<16); //Enable Memory management fault
00238         MPU->CTRL =(1<<0); //Enable the MPU
00239         _DBG_("Enable MPU!");
00240
00241         //try to access to this memory range
00242         _DBG_("Press '1' to try to read memory from region 1");
00243         while(_DG !='1');
00244         test = (*(unsigned int *)0x10000000);
00245         _DBG_("Read successful!!!");
00246
00247         _DBG_("Press '2' to try to read memory from region 6\n\r"
00248                   "Read memory at this region is not allow, LED p1.28 will blink...");
00249         while(_DG !='2');
00250         test = (*(unsigned int *)0x20080004);
00251         test++;
00252
00253         while(test);
00254         return 1;
00255 }
00256
00257 /* With ARM and GHS toolsets, the entry point is main() - this will
00258    allow the linker to generate wrapper code to setup stacks, allocate
00259    heap area, and initialize and copy code and data segments. For GNU
00260    toolsets, the entry point is through __start() in the crt0_gnu.asm
00261    file, and that startup code will setup stacks and data */
00262 int main(void)
00263 {
00264     return c_entry();
00265 }
00266
00267 #ifdef  DEBUG
00268 /*******************************************************************************
00269 * @brief                Reports the name of the source file and the source line number
00270 *                               where the CHECK_PARAM error has occurred.
00271 * @param[in]    file Pointer to the source file name
00272 * @param[in]    line assert_param error line source number
00273 * @return               None
00274 *******************************************************************************/
00275 void check_failed(uint8_t *file, uint32_t line)
00276 {
00277         /* User can add his own implementation to report the file name and line number,
00278          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00279
00280         /* Infinite loop */
00281         while(1);
00282 }
00283 #endif
00284
00285 /*
00286  * @}
00287  */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/msc.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/msc.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    MSC.H
00005  *      Purpose: USB Mass Storage Class Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __MSC_H__
00020 #define __MSC_H__
00021
00022
00023 #if defined   (  __GNUC__  )
00024 #define __packed __attribute__((__packed__))
00025 #endif
00026
00027
00028 /* MSC Subclass Codes */
00029 #define MSC_SUBCLASS_RBC                0x01
00030 #define MSC_SUBCLASS_SFF8020I_MMC2      0x02
00031 #define MSC_SUBCLASS_QIC157             0x03
00032 #define MSC_SUBCLASS_UFI                0x04
00033 #define MSC_SUBCLASS_SFF8070I           0x05
00034 #define MSC_SUBCLASS_SCSI               0x06
00035
00036 /* MSC Protocol Codes */
00037 #define MSC_PROTOCOL_CBI_INT            0x00
00038 #define MSC_PROTOCOL_CBI_NOINT          0x01
00039 #define MSC_PROTOCOL_BULK_ONLY          0x50
00040
00041
00042 /* MSC Request Codes */
00043 #define MSC_REQUEST_RESET               0xFF
00044 #define MSC_REQUEST_GET_MAX_LUN         0xFE
00045
00046
00047 /* MSC Bulk-only Stage */
00048 #define MSC_BS_CBW                      0       /* Command Block Wrapper */
00049 #define MSC_BS_DATA_OUT                 1       /* Data Out Phase */
00050 #define MSC_BS_DATA_IN                  2       /* Data In Phase */
00051 #define MSC_BS_DATA_IN_LAST             3       /* Data In Last Phase */
00052 #define MSC_BS_DATA_IN_LAST_STALL       4       /* Data In Last Phase with Stall */
00053 #define MSC_BS_CSW                      5       /* Command Status Wrapper */
00054 #define MSC_BS_ERROR                    6       /* Error */
00055
00056
00057 /* Bulk-only Command Block Wrapper */
00058 #if defined     (  __CC_ARM  )
00059 typedef __packed struct _MSC_CBW {
00060 #elif defined   (  __GNUC__  )
00061 typedef struct __packed _MSC_CBW {
00062 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00063 typedef __packed struct _MSC_CBW {
00064 #endif
00065   uint32_t dSignature;
00066   uint32_t dTag;
00067   uint32_t dDataLength;
00068   uint8_t  bmFlags;
00069   uint8_t  bLUN;
00070   uint8_t  bCBLength;
00071   uint8_t  CB[16];
00072 } MSC_CBW;
00073
00074 /* Bulk-only Command Status Wrapper */
00075 #if defined     (  __CC_ARM  )
00076 typedef __packed struct _MSC_CSW {
00077 #elif defined   (  __GNUC__  )
00078 typedef struct __packed _MSC_CSW {
00079 #elif defined   (  __IAR_SYSTEMS_ICC__  )
00080 typedef __packed struct _MSC_CSW {
00081 #endif
00082   uint32_t dSignature;
00083   uint32_t dTag;
00084   uint32_t dDataResidue;
00085   uint8_t  bStatus;
00086 } MSC_CSW;
00087
00088 #define MSC_CBW_Signature               0x43425355
00089 #define MSC_CSW_Signature               0x53425355
00090
00091
00092 /* CSW Status Definitions */
00093 #define CSW_CMD_PASSED                  0x00
00094 #define CSW_CMD_FAILED                  0x01
00095 #define CSW_PHASE_ERROR                 0x02
00096
00097
00098 /* SCSI Commands */
00099 #define SCSI_TEST_UNIT_READY            0x00
00100 #define SCSI_REQUEST_SENSE              0x03
00101 #define SCSI_FORMAT_UNIT                0x04
00102 #define SCSI_INQUIRY                    0x12
00103 #define SCSI_MODE_SELECT6               0x15
00104 #define SCSI_MODE_SENSE6                0x1A
00105 #define SCSI_START_STOP_UNIT            0x1B
00106 #define SCSI_MEDIA_REMOVAL              0x1E
00107 #define SCSI_READ_FORMAT_CAPACITIES     0x23
00108 #define SCSI_READ_CAPACITY              0x25
00109 #define SCSI_READ10                     0x28
00110 #define SCSI_WRITE10                    0x2A
00111 #define SCSI_VERIFY10                   0x2F
00112 #define SCSI_MODE_SELECT10              0x55
00113 #define SCSI_MODE_SENSE10               0x5A
00114
00115
00116 #endif  /* __MSC_H__ */
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/mscuser.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/mscuser.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    MSCUSER.C
00005  *      Purpose: Mass Storage Class Custom User Module
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #include "LPC17xx.h"
00020
00021 #include "lpc_types.h"
00022
00023 #include "usb.h"
00024 #include "msc.h"
00025 #include "usbcfg.h"
00026 #include "usbhw.h"
00027 #include "usbcore.h"
00028 #include "mscuser.h"
00029
00030 #include "memory.h"
00031
00032
00033 uint8_t  Memory[MSC_MemorySize];  /* MSC RAM */
00034
00035 uint32_t  MemOK;                   /* Memory OK */
00036
00037 uint32_t Offset;                  /* R/W Offset */
00038 uint32_t Length;                  /* R/W Length */
00039
00040 uint8_t  BulkStage;               /* Bulk Stage */
00041
00042 uint8_t  BulkBuf[MSC_MAX_PACKET]; /* Bulk In/Out Buffer */
00043 uint8_t  BulkLen;                 /* Bulk In/Out Length */
00044
00045 MSC_CBW CBW;                   /* Command Block Wrapper */
00046 MSC_CSW CSW;                   /* Command Status Wrapper */
00047
00048
00049 /*
00050  *  MSC Mass Storage Reset Request Callback
00051  *   Called automatically on Mass Storage Reset Request
00052  *    Parameters:      None (global SetupPacket and EP0Buf)
00053  *    Return Value:    TRUE - Success, FALSE - Error
00054  */
00055
00056 uint32_t MSC_Reset (void) {
00057
00058   BulkStage = MSC_BS_CBW;
00059   return (TRUE);
00060 }
00061
00062
00063 /*
00064  *  MSC Get Max LUN Request Callback
00065  *   Called automatically on Get Max LUN Request
00066  *    Parameters:      None (global SetupPacket and EP0Buf)
00067  *    Return Value:    TRUE - Success, FALSE - Error
00068  */
00069
00070 uint32_t MSC_GetMaxLUN (void) {
00071
00072   EP0Buf[0] = 0;               /* No LUN associated with this device */
00073   return (TRUE);
00074 }
00075
00076
00077 /*
00078  *  MSC Memory Read Callback
00079  *   Called automatically on Memory Read Event
00080  *    Parameters:      None (global variables)
00081  *    Return Value:    None
00082  */
00083
00084 void MSC_MemoryRead (void) {
00085   uint32_t n;
00086
00087   if (Length > MSC_MAX_PACKET) {
00088     n = MSC_MAX_PACKET;
00089   } else {
00090     n = Length;
00091   }
00092
00093   if ((Offset + n) > MSC_MemorySize) {
00094     n = MSC_MemorySize - Offset;
00095     BulkStage = MSC_BS_DATA_IN_LAST_STALL;
00096   }
00097
00098   USB_WriteEP(MSC_EP_IN, &Memory[Offset], n);
00099   Offset += n;
00100   Length -= n;
00101
00102   CSW.dDataResidue -= n;
00103
00104   if (Length == 0) {
00105     BulkStage = MSC_BS_DATA_IN_LAST;
00106   }
00107
00108   if (BulkStage != MSC_BS_DATA_IN) {
00109     CSW.bStatus = CSW_CMD_PASSED;
00110   }
00111 }
00112
00113
00114 /*
00115  *  MSC Memory Write Callback
00116  *   Called automatically on Memory Write Event
00117  *    Parameters:      None (global variables)
00118  *    Return Value:    None
00119  */
00120
00121 void MSC_MemoryWrite (void) {
00122   uint32_t n;
00123
00124   if ((Offset + BulkLen) > MSC_MemorySize) {
00125     BulkLen = MSC_MemorySize - Offset;
00126     BulkStage = MSC_BS_CSW;
00127     USB_SetStallEP(MSC_EP_OUT);
00128   }
00129
00130   for (n = 0; n < BulkLen; n++) {
00131     Memory[Offset + n] = BulkBuf[n];
00132   }
00133
00134   Offset += BulkLen;
00135   Length -= BulkLen;
00136
00137   CSW.dDataResidue -= BulkLen;
00138
00139   if ((Length == 0) || (BulkStage == MSC_BS_CSW)) {
00140     CSW.bStatus = CSW_CMD_PASSED;
00141     MSC_SetCSW();
00142   }
00143 }
00144
00145
00146 /*
00147  *  MSC Memory Verify Callback
00148  *   Called automatically on Memory Verify Event
00149  *    Parameters:      None (global variables)
00150  *    Return Value:    None
00151  */
00152
00153 void MSC_MemoryVerify (void) {
00154   uint32_t n;
00155
00156   if ((Offset + BulkLen) > MSC_MemorySize) {
00157     BulkLen = MSC_MemorySize - Offset;
00158     BulkStage = MSC_BS_CSW;
00159     USB_SetStallEP(MSC_EP_OUT);
00160   }
00161
00162   for (n = 0; n < BulkLen; n++) {
00163     if (Memory[Offset + n] != BulkBuf[n]) {
00164       MemOK = FALSE;
00165       break;
00166     }
00167   }
00168
00169   Offset += BulkLen;
00170   Length -= BulkLen;
00171
00172   CSW.dDataResidue -= BulkLen;
00173
00174   if ((Length == 0) || (BulkStage == MSC_BS_CSW)) {
00175     CSW.bStatus = (MemOK) ? CSW_CMD_PASSED : CSW_CMD_FAILED;
00176     MSC_SetCSW();
00177   }
00178 }
00179
00180
00181 /*
00182  *  MSC SCSI Read/Write Setup Callback
00183  *    Parameters:      None (global variables)
00184  *    Return Value:    TRUE - Success, FALSE - Error
00185  */
00186
00187 uint32_t MSC_RWSetup (void) {
00188   uint32_t n;
00189
00190   /* Logical Block Address of First Block */
00191   n = (CBW.CB[2] << 24) |
00192       (CBW.CB[3] << 16) |
00193       (CBW.CB[4] <<  8) |
00194       (CBW.CB[5] <<  0);
00195
00196   Offset = n * MSC_BlockSize;
00197
00198   /* Number of Blocks to transfer */
00199   n = (CBW.CB[7] <<  8) |
00200       (CBW.CB[8] <<  0);
00201
00202   Length = n * MSC_BlockSize;
00203
00204   if (CBW.dDataLength != Length) {
00205     USB_SetStallEP(MSC_EP_IN);
00206     USB_SetStallEP(MSC_EP_OUT);
00207     CSW.bStatus = CSW_PHASE_ERROR;
00208     MSC_SetCSW();
00209     return (FALSE);
00210   }
00211
00212   return (TRUE);
00213 }
00214
00215
00216 /*
00217  *  Check Data IN Format
00218  *    Parameters:      None (global variables)
00219  *    Return Value:    TRUE - Success, FALSE - Error
00220  */
00221
00222 uint32_t DataInFormat (void) {
00223
00224   if (CBW.dDataLength == 0) {
00225     CSW.bStatus = CSW_PHASE_ERROR;
00226     MSC_SetCSW();
00227     return (FALSE);
00228   }
00229   if ((CBW.bmFlags & 0x80) == 0) {
00230     USB_SetStallEP(MSC_EP_OUT);
00231     CSW.bStatus = CSW_PHASE_ERROR;
00232     MSC_SetCSW();
00233     return (FALSE);
00234   }
00235   return (TRUE);
00236 }
00237
00238
00239 /*
00240  *  Perform Data IN Transfer
00241  *    Parameters:      None (global variables)
00242  *    Return Value:    TRUE - Success, FALSE - Error
00243  */
00244
00245 void DataInTransfer (void) {
00246
00247   if (BulkLen > CBW.dDataLength) {
00248     BulkLen = CBW.dDataLength;
00249   }
00250
00251   USB_WriteEP(MSC_EP_IN, BulkBuf, BulkLen);
00252   BulkStage = MSC_BS_DATA_IN_LAST;
00253
00254   CSW.dDataResidue -= BulkLen;
00255   CSW.bStatus = CSW_CMD_PASSED;
00256 }
00257
00258
00259 /*
00260  *  MSC SCSI Test Unit Ready Callback
00261  *    Parameters:      None (global variables)
00262  *    Return Value:    None
00263  */
00264
00265 void MSC_TestUnitReady (void) {
00266
00267   if (CBW.dDataLength != 0) {
00268     if ((CBW.bmFlags & 0x80) != 0) {
00269       USB_SetStallEP(MSC_EP_IN);
00270     } else {
00271       USB_SetStallEP(MSC_EP_OUT);
00272     }
00273   }
00274
00275   CSW.bStatus = CSW_CMD_PASSED;
00276   MSC_SetCSW();
00277 }
00278
00279
00280 /*
00281  *  MSC SCSI Request Sense Callback
00282  *    Parameters:      None (global variables)
00283  *    Return Value:    None
00284  */
00285
00286 void MSC_RequestSense (void) {
00287
00288   if (!DataInFormat()) return;
00289
00290   BulkBuf[ 0] = 0x70;          /* Response Code */
00291   BulkBuf[ 1] = 0x00;
00292   BulkBuf[ 2] = 0x02;          /* Sense Key */
00293   BulkBuf[ 3] = 0x00;
00294   BulkBuf[ 4] = 0x00;
00295   BulkBuf[ 5] = 0x00;
00296   BulkBuf[ 6] = 0x00;
00297   BulkBuf[ 7] = 0x0A;          /* Additional Length */
00298   BulkBuf[ 8] = 0x00;
00299   BulkBuf[ 9] = 0x00;
00300   BulkBuf[10] = 0x00;
00301   BulkBuf[11] = 0x00;
00302   BulkBuf[12] = 0x30;          /* ASC */
00303   BulkBuf[13] = 0x01;          /* ASCQ */
00304   BulkBuf[14] = 0x00;
00305   BulkBuf[15] = 0x00;
00306   BulkBuf[16] = 0x00;
00307   BulkBuf[17] = 0x00;
00308
00309   BulkLen = 18;
00310   DataInTransfer();
00311 }
00312
00313
00314 /*
00315  *  MSC SCSI Inquiry Callback
00316  *    Parameters:      None (global variables)
00317  *    Return Value:    None
00318  */
00319
00320 void MSC_Inquiry (void) {
00321
00322   if (!DataInFormat()) return;
00323
00324   BulkBuf[ 0] = 0x00;          /* Direct Access Device */
00325   BulkBuf[ 1] = 0x80;          /* RMB = 1: Removable Medium */
00326   BulkBuf[ 2] = 0x00;          /* Version: No conformance claim to standard */
00327   BulkBuf[ 3] = 0x01;
00328
00329   BulkBuf[ 4] = 36-4;          /* Additional Length */
00330   BulkBuf[ 5] = 0x80;          /* SCCS = 1: Storage Controller Component */
00331   BulkBuf[ 6] = 0x00;
00332   BulkBuf[ 7] = 0x00;
00333
00334   BulkBuf[ 8] = 'K';           /* Vendor Identification */
00335   BulkBuf[ 9] = 'e';
00336   BulkBuf[10] = 'i';
00337   BulkBuf[11] = 'l';
00338   BulkBuf[12] = ' ';
00339   BulkBuf[13] = ' ';
00340   BulkBuf[14] = ' ';
00341   BulkBuf[15] = ' ';
00342
00343   BulkBuf[16] = 'L';           /* Product Identification */
00344   BulkBuf[17] = 'P';
00345   BulkBuf[18] = 'C';
00346   BulkBuf[19] = '1';
00347   BulkBuf[20] = '7';
00348   BulkBuf[21] = 'x';
00349   BulkBuf[22] = 'x';
00350   BulkBuf[23] = ' ';
00351   BulkBuf[24] = 'D';
00352   BulkBuf[25] = 'i';
00353   BulkBuf[26] = 's';
00354   BulkBuf[27] = 'k';
00355   BulkBuf[28] = ' ';
00356   BulkBuf[29] = ' ';
00357   BulkBuf[30] = ' ';
00358   BulkBuf[31] = ' ';
00359
00360   BulkBuf[32] = '1';           /* Product Revision Level */
00361   BulkBuf[33] = '.';
00362   BulkBuf[34] = '0';
00363   BulkBuf[35] = ' ';
00364
00365   BulkLen = 36;
00366   DataInTransfer();
00367 }
00368
00369
00370 /*
00371  *  MSC SCSI Mode Sense (6-Byte) Callback
00372  *    Parameters:      None (global variables)
00373  *    Return Value:    None
00374  */
00375
00376 void MSC_ModeSense6 (void) {
00377
00378   if (!DataInFormat()) return;
00379
00380   BulkBuf[ 0] = 0x03;
00381   BulkBuf[ 1] = 0x00;
00382   BulkBuf[ 2] = 0x00;
00383   BulkBuf[ 3] = 0x00;
00384
00385   BulkLen = 4;
00386   DataInTransfer();
00387 }
00388
00389
00390 /*
00391  *  MSC SCSI Mode Sense (10-Byte) Callback
00392  *    Parameters:      None (global variables)
00393  *    Return Value:    None
00394  */
00395
00396 void MSC_ModeSense10 (void) {
00397
00398   if (!DataInFormat()) return;
00399
00400   BulkBuf[ 0] = 0x00;
00401   BulkBuf[ 1] = 0x06;
00402   BulkBuf[ 2] = 0x00;
00403   BulkBuf[ 3] = 0x00;
00404   BulkBuf[ 4] = 0x00;
00405   BulkBuf[ 5] = 0x00;
00406   BulkBuf[ 6] = 0x00;
00407   BulkBuf[ 7] = 0x00;
00408
00409   BulkLen = 8;
00410   DataInTransfer();
00411 }
00412
00413
00414 /*
00415  *  MSC SCSI Read Capacity Callback
00416  *    Parameters:      None (global variables)
00417  *    Return Value:    None
00418  */
00419
00420 void MSC_ReadCapacity (void) {
00421
00422   if (!DataInFormat()) return;
00423
00424   /* Last Logical Block */
00425   BulkBuf[ 0] = ((MSC_BlockCount - 1) >> 24) & 0xFF;
00426   BulkBuf[ 1] = ((MSC_BlockCount - 1) >> 16) & 0xFF;
00427   BulkBuf[ 2] = ((MSC_BlockCount - 1) >>  8) & 0xFF;
00428   BulkBuf[ 3] = ((MSC_BlockCount - 1) >>  0) & 0xFF;
00429
00430   /* Block Length */
00431   BulkBuf[ 4] = (MSC_BlockSize >> 24) & 0xFF;
00432   BulkBuf[ 5] = (MSC_BlockSize >> 16) & 0xFF;
00433   BulkBuf[ 6] = (MSC_BlockSize >>  8) & 0xFF;
00434   BulkBuf[ 7] = (MSC_BlockSize >>  0) & 0xFF;
00435
00436   BulkLen = 8;
00437   DataInTransfer();
00438 }
00439
00440
00441 /*
00442  *  MSC SCSI Read Format Capacity Callback
00443  *    Parameters:      None (global variables)
00444  *    Return Value:    None
00445  */
00446
00447 void MSC_ReadFormatCapacity (void) {
00448
00449   if (!DataInFormat()) return;
00450
00451   BulkBuf[ 0] = 0x00;
00452   BulkBuf[ 1] = 0x00;
00453   BulkBuf[ 2] = 0x00;
00454   BulkBuf[ 3] = 0x08;          /* Capacity List Length */
00455
00456   /* Block Count */
00457   BulkBuf[ 4] = (MSC_BlockCount >> 24) & 0xFF;
00458   BulkBuf[ 5] = (MSC_BlockCount >> 16) & 0xFF;
00459   BulkBuf[ 6] = (MSC_BlockCount >>  8) & 0xFF;
00460   BulkBuf[ 7] = (MSC_BlockCount >>  0) & 0xFF;
00461
00462   /* Block Length */
00463   BulkBuf[ 8] = 0x02;          /* Descriptor Code: Formatted Media */
00464   BulkBuf[ 9] = (MSC_BlockSize >> 16) & 0xFF;
00465   BulkBuf[10] = (MSC_BlockSize >>  8) & 0xFF;
00466   BulkBuf[11] = (MSC_BlockSize >>  0) & 0xFF;
00467
00468   BulkLen = 12;
00469   DataInTransfer();
00470 }
00471
00472
00473 /*
00474  *  MSC Get Command Block Wrapper Callback
00475  *    Parameters:      None (global variables)
00476  *    Return Value:    None
00477  */
00478
00479 void MSC_GetCBW (void) {
00480   uint32_t n;
00481
00482   for (n = 0; n < BulkLen; n++) {
00483     *((uint8_t *)&CBW + n) = BulkBuf[n];
00484   }
00485   if ((BulkLen == sizeof(CBW)) && (CBW.dSignature == MSC_CBW_Signature)) {
00486     /* Valid CBW */
00487     CSW.dTag = CBW.dTag;
00488     CSW.dDataResidue = CBW.dDataLength;
00489     if ((CBW.bLUN != 0) || (CBW.bCBLength < 1) || CBW.bCBLength > 16) {
00490 fail: CSW.bStatus = CSW_CMD_FAILED;
00491       MSC_SetCSW();
00492     } else {
00493       switch (CBW.CB[0]) {
00494         case SCSI_TEST_UNIT_READY:
00495           MSC_TestUnitReady();
00496           break;
00497         case SCSI_REQUEST_SENSE:
00498           MSC_RequestSense();
00499           break;
00500         case SCSI_FORMAT_UNIT:
00501           goto fail;
00502         case SCSI_INQUIRY:
00503           MSC_Inquiry();
00504           break;
00505         case SCSI_START_STOP_UNIT:
00506           goto fail;
00507         case SCSI_MEDIA_REMOVAL:
00508           goto fail;
00509         case SCSI_MODE_SELECT6:
00510           goto fail;
00511         case SCSI_MODE_SENSE6:
00512           MSC_ModeSense6();
00513           break;
00514         case SCSI_MODE_SELECT10:
00515           goto fail;
00516         case SCSI_MODE_SENSE10:
00517           MSC_ModeSense10();
00518           break;
00519         case SCSI_READ_FORMAT_CAPACITIES:
00520           MSC_ReadFormatCapacity();
00521           break;
00522         case SCSI_READ_CAPACITY:
00523           MSC_ReadCapacity();
00524           break;
00525         case SCSI_READ10:
00526           if (MSC_RWSetup()) {
00527             if ((CBW.bmFlags & 0x80) != 0) {
00528               BulkStage = MSC_BS_DATA_IN;
00529               MSC_MemoryRead();
00530             } else {
00531               USB_SetStallEP(MSC_EP_OUT);
00532               CSW.bStatus = CSW_PHASE_ERROR;
00533               MSC_SetCSW();
00534             }
00535           }
00536           break;
00537         case SCSI_WRITE10:
00538           if (MSC_RWSetup()) {
00539             if ((CBW.bmFlags & 0x80) == 0) {
00540               BulkStage = MSC_BS_DATA_OUT;
00541             } else {
00542               USB_SetStallEP(MSC_EP_IN);
00543               CSW.bStatus = CSW_PHASE_ERROR;
00544               MSC_SetCSW();
00545             }
00546           }
00547           break;
00548         case SCSI_VERIFY10:
00549           if (MSC_RWSetup()) {
00550             if ((CBW.bmFlags & 0x80) == 0) {
00551               BulkStage = MSC_BS_DATA_OUT;
00552               MemOK = TRUE;
00553             } else {
00554               USB_SetStallEP(MSC_EP_IN);
00555               CSW.bStatus = CSW_PHASE_ERROR;
00556               MSC_SetCSW();
00557             }
00558           }
00559           break;
00560         default:
00561           goto fail;
00562       }
00563     }
00564   } else {
00565     /* Invalid CBW */
00566     USB_SetStallEP(MSC_EP_IN);
00567     USB_SetStallEP(MSC_EP_OUT);
00568     BulkStage = MSC_BS_ERROR;
00569   }
00570 }
00571
00572
00573 /*
00574  *  MSC Set Command Status Wrapper Callback
00575  *    Parameters:      None (global variables)
00576  *    Return Value:    None
00577  */
00578
00579 void MSC_SetCSW (void) {
00580
00581   CSW.dSignature = MSC_CSW_Signature;
00582   USB_WriteEP(MSC_EP_IN, (uint8_t *)&CSW, sizeof(CSW));
00583   BulkStage = MSC_BS_CSW;
00584 }
00585
00586
00587 /*
00588  *  MSC Bulk In Callback
00589  *    Parameters:      None (global variables)
00590  *    Return Value:    None
00591  */
00592
00593 void MSC_BulkIn (void) {
00594
00595   switch (BulkStage) {
00596     case MSC_BS_DATA_IN:
00597       switch (CBW.CB[0]) {
00598         case SCSI_READ10:
00599           MSC_MemoryRead();
00600           break;
00601       }
00602       break;
00603     case MSC_BS_DATA_IN_LAST:
00604       MSC_SetCSW();
00605       break;
00606     case MSC_BS_DATA_IN_LAST_STALL:
00607       USB_SetStallEP(MSC_EP_IN);
00608       MSC_SetCSW();
00609       break;
00610     case MSC_BS_CSW:
00611       BulkStage = MSC_BS_CBW;
00612       break;
00613   }
00614 }
00615
00616
00617 /*
00618  *  MSC Bulk Out Callback
00619  *    Parameters:      None (global variables)
00620  *    Return Value:    None
00621  */
00622
00623 void MSC_BulkOut (void) {
00624
00625   BulkLen = USB_ReadEP(MSC_EP_OUT, BulkBuf);
00626   switch (BulkStage) {
00627     case MSC_BS_CBW:
00628       MSC_GetCBW();
00629       break;
00630     case MSC_BS_DATA_OUT:
00631       switch (CBW.CB[0]) {
00632         case SCSI_WRITE10:
00633           MSC_MemoryWrite();
00634           break;
00635         case SCSI_VERIFY10:
00636           MSC_MemoryVerify();
00637           break;
00638       }
00639       break;
00640     default:
00641       USB_SetStallEP(MSC_EP_OUT);
00642       CSW.bStatus = CSW_PHASE_ERROR;
00643       MSC_SetCSW();
00644       break;
00645   }
00646 }
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/mscuser.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBMassStorage/mscuser.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      U S B  -  K e r n e l
00003  *----------------------------------------------------------------------------
00004  *      Name:    MSCUSER.H
00005  *      Purpose: Mass Storage Class Custom User Definitions
00006  *      Version: V1.10
00007  *----------------------------------------------------------------------------
00008  *      This software is supplied "AS IS" without any warranties, express,
00009  *      implied or statutory, including but not limited to the implied
00010  *      warranties of fitness for purpose, satisfactory quality and
00011  *      noninfringement. Keil extends you a royalty-free right to reproduce
00012  *      and distribute executable files created using this software for use
00013  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00014  *      else gives you the right to use this software.
00015  *
00016  *      Copyright (c) 2005-2009 Keil Software.
00017  *---------------------------------------------------------------------------*/
00018
00019 #ifndef __MSCUSER_H__
00020 #define __MSCUSER_H__
00021
00022
00023 /* Mass Storage Memory Layout */
00024 #if 0
00025 #define MSC_MemorySize  16384
00026 #endif
00027 #if 1
00028 #define MSC_MemorySize  8192
00029 #endif
00030 #define MSC_BlockSize   512
00031 #define MSC_BlockCount  (MSC_MemorySize / MSC_BlockSize)
00032
00033
00034 /* Max In/Out Packet Size */
00035 #define MSC_MAX_PACKET  64
00036
00037 /* MSC In/Out Endpoint Address */
00038 #define MSC_EP_IN       0x82
00039 #define MSC_EP_OUT      0x02
00040
00041 /* MSC Requests Callback Functions */
00042 extern uint32_t MSC_Reset     (void);
00043 extern uint32_t MSC_GetMaxLUN (void);
00044
00045 /* MSC Bulk Callback Functions */
00046 extern void MSC_GetCBW (void);
00047 extern void MSC_SetCSW (void);
00048 extern void MSC_BulkIn (void);
00049 extern void MSC_BulkOut(void);
00050
00051
00052 #endif  /* __MSCUSER_H__ */
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/NMI_PowerDown/nmi_powerdown.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/NMI_PowerDown/nmi_powerdown.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          nmi_powerdown.c                                 2010-06-18
00003 */
00026 #include "LPC17xx.h"
00027 #include "lpc17xx_clkpwr.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_gpio.h"
00031 #include "lpc17xx_pinsel.h"
00032
00033 /* Example group ----------------------------------------------------------- */
00039 /************************** PRIVATE VARIABLES *************************/
00040 uint8_t menu[]=
00041         "********************************************************************************\n\r"
00042         "Hello NXP Semiconductors \n\r"
00043         "Power control demo \n\r"
00044         "\t - MCU: LPC17xx \n\r"
00045         "\t - Core: ARM CORTEX-M3 \n\r"
00046         "\t - Communicate via: UART0 - 115200 bps \n\r"
00047         "This example used to enter system in PowerDown mode and wake up it by using \n\r "
00048         "NMI (Non-Maskable Interrupt) \n\r"
00049         "********************************************************************************\n\r";
00050 void print_menu(void);
00051 void NMI_Handler(void);
00052
00053
00054 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00055 /*********************************************************************/
00060 void NMI_Handler(void)
00061 {
00062         //do nothing
00063 }
00064
00065 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00066 /*********************************************************************/
00071 void print_menu(void)
00072 {
00073         _DBG(menu);
00074 }
00075
00076 /*-------------------------MAIN FUNCTION------------------------------*/
00077 /*********************************************************************/
00082 int c_entry (void)
00083 {
00084         PINSEL_CFG_Type PinCfg;
00085         /* Initialize debug via UART0
00086          * – 115200bps
00087          * – 8 data bit
00088          * – No parity
00089          * – 1 stop bit
00090          * – No flow control
00091          */
00092         debug_frmwrk_init();
00093
00094         // print welcome screen
00095         print_menu();
00096
00097         /* Pin selection:
00098          * P2.10 as NMI
00099          */
00100         PinCfg.Funcnum = 2;
00101         PinCfg.OpenDrain = 0;
00102         PinCfg.Pinmode = 0;
00103         PinCfg.Portnum = 2;
00104         PinCfg.Pinnum = 10;
00105         PINSEL_ConfigPin(&PinCfg);
00106
00107         SCB->ICSR |=(0x80000000);       //changes NMI exception state to pending
00108
00109         _DBG_("Press '1' to enter system in PowerDown mode");
00110         while(_DG !='1');
00111
00112         _DBG_("Enter PowerDown mode...");
00113         _DBG_("Press INT0 button to wake-up system");
00114
00115         // Enter target power down mode
00116
00117         /*---------- Disable and disconnect the main PLL0 before enter into Deep-Sleep
00118          * or Power-Down mode <according to errata.lpc1768-16.March.2010> ------------
00119          */
00120         LPC_SC->PLL0CON &= ~(1<<1); /* Disconnect the main PLL (PLL0) */
00121         LPC_SC->PLL0FEED = 0xAA; /* Feed */
00122         LPC_SC->PLL0FEED = 0x55; /* Feed */
00123         while ((LPC_SC->PLL0STAT & (1<<25)) != 0x00); /* Wait for main PLL (PLL0) to disconnect */
00124         LPC_SC->PLL0CON &= ~(1<<0); /* Turn off the main PLL (PLL0) */
00125         LPC_SC->PLL0FEED = 0xAA; /* Feed */
00126         LPC_SC->PLL0FEED = 0x55; /* Feed */
00127         while ((LPC_SC->PLL0STAT & (1<<24)) != 0x00); /* Wait for main PLL (PLL0) to shut down */
00128         /*------------Then enter into PowerDown mode ----------------------------------*/
00129
00130         CLKPWR_PowerDown();
00131         SystemInit();
00132         debug_frmwrk_init();
00133         _DBG_("\n\rSystem waked-up!");
00134         while(1);
00135 }
00136
00137
00138 /* With ARM and GHS toolsets, the entry point is main() - this will
00139    allow the linker to generate wrapper code to setup stacks, allocate
00140    heap area, and initialize and copy code and data segments. For GNU
00141    toolsets, the entry point is through __start() in the crt0_gnu.asm
00142    file, and that startup code will setup stacks and data */
00143 int main(void)
00144 {
00145     return c_entry();
00146 }
00147
00148 #ifdef  DEBUG
00149 /*******************************************************************************
00150 * @brief                Reports the name of the source file and the source line number
00151 *                               where the CHECK_PARAM error has occurred.
00152 * @param[in]    file Pointer to the source file name
00153 * @param[in]    line assert_param error line source number
00154 * @return               None
00155 *******************************************************************************/
00156 void check_failed(uint8_t *file, uint32_t line)
00157 {
00158         /* User can add his own implementation to report the file name and line number,
00159          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00160
00161         /* Infinite loop */
00162         while(1);
00163 }
00164 #endif
00165
00166 /*
00167  * @}
00168  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/Priority/nvic_priority.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/Priority/nvic_priority.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          nvic_priority.c                                 2010-06-18
00003 */
00025 #include "lpc17xx_libcfg.h"
00026 #include "lpc17xx_gpio.h"
00027 #include "lpc17xx_nvic.h"
00028 #include "lpc17xx_systick.h"
00029 #include "lpc17xx_exti.h"
00030 #include "lpc17xx_pinsel.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINTIONS*************************/
00039 /* Interrupt mode
00040  * - 0: Tail-chaining interrupt
00041  * - 1: Late-arriving interrupt
00042  */
00043 #define INT_MODE        1
00044
00045 /************************** PRIVATE FUNCTIONS *************************/
00046 void EINT0_IRQHandler(void);
00047 void EINT3_IRQHandler(void);
00048
00049 void print_menu(void);
00050 void delay (void);
00051
00052 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00053 /*********************************************************************/
00059 void EINT0_IRQHandler(void)
00060 {
00061         uint8_t i;
00062         EXTI_ClearEXTIFlag(EXTI_EINT0);
00063         for (i= 0; i<10; i++)
00064         {
00065                 GPIO_SetValue(1,(1<<29));
00066                 delay();
00067                 GPIO_ClearValue(1,(1<<29));
00068                 delay();
00069         }
00070 }
00071
00072 /*********************************************************************/
00078 void EINT3_IRQHandler(void)
00079 {
00080         uint8_t j;
00081         if (GPIO_GetIntStatus(0, 25, 1))
00082         {
00083                  GPIO_ClearInt(0,(1<<25));
00084                 for (j= 0; j<10; j++)
00085                 {
00086                         GPIO_SetValue(1,(1<<28));
00087                         delay();
00088                         GPIO_ClearValue(1,(1<<28));
00089                         delay();
00090                 }
00091         }
00092 }
00093 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00094 /*********************************************************************/
00099 void delay (void) {
00100   unsigned int i;
00101
00102   for (i = 0; i < 0x400000; i++) {
00103   }
00104 }
00105
00106 /*-------------------------MAIN FUNCTION------------------------------*/
00107 /*********************************************************************/
00112 int c_entry (void)
00113 {
00114         EXTI_InitTypeDef EXTICfg;
00115         PINSEL_CFG_Type PinCfg;
00116
00117         /* Configure:
00118          *              + LED1: P1.28
00119          *              + LED2: P1.29
00120          */
00121         GPIO_SetDir(1, (1<<28)|(1<<29), 1);
00122
00123         /* Setting P2.10 as EINT0 */
00124         PinCfg.Funcnum = 1;
00125         PinCfg.OpenDrain = 0;
00126         PinCfg.Pinmode = 0;
00127         PinCfg.Pinnum = 10;
00128         PinCfg.Portnum = 2;
00129         PINSEL_ConfigPin(&PinCfg);
00130
00131         /* Initialize External 0 interrupt */
00132         EXTI_Init();
00133         EXTICfg.EXTI_Line = EXTI_EINT0;
00134         /* edge sensitive */
00135         EXTICfg.EXTI_Mode = EXTI_MODE_EDGE_SENSITIVE;
00136         EXTICfg.EXTI_polarity = EXTI_POLARITY_LOW_ACTIVE_OR_FALLING_EDGE;
00137         EXTI_Config(&EXTICfg);
00138
00139
00140 #if (INT_MODE == 0) //same group, different sub-levels (Tail-chaining example)
00141         NVIC_SetPriorityGrouping(4); //sets group priorities: 8 - subpriorities: 3
00142         NVIC_SetPriority(EINT0_IRQn, 2);  //000:10 (bit 7:3)  assign eint0 to group 0, sub-priority 2 within group 0
00143         NVIC_SetPriority(EINT3_IRQn, 1);  //000:01 (bit 7:3)  assign gpioint to group 0, sub-priority 1 within group 0
00144 #else //different group - (Late-arriving example)
00145         NVIC_SetPriorityGrouping(4);  //sets group priorities: 8 - subpriorities: 3
00146         NVIC_SetPriority(EINT0_IRQn, 0);   //000:00 (bit 7:3) assign eint0 to group 0, sub-priority 0 within group 0
00147         NVIC_SetPriority(EINT3_IRQn, 4);   //001:00 (bit 7:3) assign GPIO int to group 1, sub-priority 0 within group 1
00148 #endif
00149
00150         NVIC_EnableIRQ(EINT0_IRQn);
00151         NVIC_EnableIRQ(EINT3_IRQn);
00152
00153         //Enable GPIO interrupt  P0.25/AD0.2
00154         GPIO_IntCmd(0,(1<<25),1);
00155
00156         while(1);
00157 }
00158
00159 /* With ARM and GHS toolsets, the entry point is main() - this will
00160  allow the linker to generate wrapper code to setup stacks, allocate
00161  heap area, and initialize and copy code and data segments. For GNU
00162  toolsets, the entry point is through __start() in the crt0_gnu.asm
00163  file, and that startup code will setup stacks and data */
00164 int main(void) {
00165         return c_entry();
00166 }
00167
00168 #ifdef  DEBUG
00169 /*******************************************************************************
00170  * @brief               Reports the name of the source file and the source line number
00171  *                              where the CHECK_PARAM error has occurred.
00172  * @param[in]   file Pointer to the source file name
00173  * @param[in]    line assert_param error line source number
00174  * @return              None
00175  *******************************************************************************/
00176 void check_failed(uint8_t *file, uint32_t line) {
00177         /* User can add his own implementation to report the file name and line number,
00178          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00179
00180         /* Infinite loop */
00181         while (1)
00182                 ;
00183 }
00184 #endif
00185
00186 /*
00187  * @}
00188  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/pca8581_polling/pca8581_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/pca8581_polling/pca8581_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          pca8581_test.c                                  2010-05-21
00003 */
00026 #include "lpc17xx_i2c.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS *************************/
00039 #define USEDI2CDEV      0
00040
00041 /* Definition of internal register of EEPROM PCA8581 */
00042 /* 7 bit address */
00043 #define PCA8581_SLVADDR         (0xA0>>1)
00044
00045 #if (USEDI2CDEV == 0)
00046 #define I2CDEV LPC_I2C0
00047 #elif (USEDI2CDEV == 2)
00048 #define I2CDEV LPC_I2C2
00049 #else
00050 #error "I2C device not defined!"
00051 #endif
00052
00053
00054 /************************** PRIVATE VARIABLES *************************/
00055 uint8_t menu1[] =
00056 "********************************************************************************\n\r"
00057 "Hello NXP Semiconductors \n\r"
00058 "I2C demo \n\r"
00059 "\t - MCU: LPC17xx \n\r"
00060 "\t - Core: ARM Cortex-M3 \n\r"
00061 "\t - Communicate via: UART0 - 115.2 kbps \n\r"
00062 " An example of I2C using polling mode to test the I2C driver \n\r"
00063 " EEPROM PCA8581 to transfer a number of data byte \n\r"
00064 "********************************************************************************\n\r";
00065 uint8_t menu2[] = "Demo terminated! \n\r";
00066
00067 /* Data using for transferring to PCA8581 */
00068 uint8_t pca8581_wrdat[] = {
00069                 (0x01<<3),      // Memory Address, data will be written at this address
00070                                         // This internal memory address should be 8-byte alignment
00071                 0x00,   // Data 0
00072                 0x11,   // Data 1
00073                 0x22,   // Data 2
00074                 0x33,   // Data 3
00075                 0x44,   // Data 4
00076                 0x55,   // Data 5
00077                 0x66,   // Data 6
00078                 0x77,   // Data 7
00079 };
00080
00081 uint8_t pca8581_rddat[] = {
00082                 // Don't use Memory address here, the Memory address to read
00083                 // is the same as Memory Address to write.
00084                 0x00,   // Data 0
00085                 0x00,   // Data 1
00086                 0x00,   // Data 2
00087                 0x00,   // Data 3
00088                 0x00,   // Data 4
00089                 0x00,   // Data 5
00090                 0x00,   // Data 6
00091                 0x00,   // Data 7
00092 };
00093
00094 /* Transmit setup */
00095 I2C_M_SETUP_Type txsetup;
00096 /* Receive setup */
00097 I2C_M_SETUP_Type rxsetup;
00098
00099 /************************** PRIVATE FUNCTIONS *************************/
00100 int32_t PCA8581_Write(void);
00101 int32_t PCA8581_Read(void);
00102 void print_menu(void);
00103 void Error_Loop(uint32_t ErrorCode);
00104
00105 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00106 /*********************************************************************/
00111 int32_t PCA8581_Write(void)
00112 {
00113         txsetup.sl_addr7bit = PCA8581_SLVADDR;
00114         txsetup.tx_data = pca8581_wrdat;
00115         txsetup.tx_length = sizeof(pca8581_wrdat);
00116         txsetup.rx_data = NULL;
00117         txsetup.rx_length = 0;
00118         txsetup.retransmissions_max = 3;
00119
00120         if (I2C_MasterTransferData(I2CDEV, &txsetup, I2C_TRANSFER_POLLING) == SUCCESS){
00121                 return (0);
00122         } else {
00123                 return (-1);
00124         }
00125 }
00126
00127 /*********************************************************************/
00132 int32_t PCA8581_Read(void)
00133 {
00134
00135         rxsetup.sl_addr7bit = PCA8581_SLVADDR;
00136         rxsetup.tx_data = pca8581_wrdat;        // Get address to read at writing address
00137         rxsetup.tx_length = 1;
00138         rxsetup.rx_data = pca8581_rddat;
00139         rxsetup.rx_length = sizeof(pca8581_rddat);
00140         rxsetup.retransmissions_max = 3;
00141
00142         if (I2C_MasterTransferData(I2CDEV, &rxsetup, I2C_TRANSFER_POLLING) == SUCCESS){
00143                 return (0);
00144         } else {
00145                 return (-1);
00146         }
00147 }
00148
00149 /*********************************************************************/
00154 void print_menu(void)
00155 {
00156         _DBG_(menu1);
00157 }
00158
00159 /*********************************************************************/
00165 void Error_Loop(uint32_t ErrorCode)
00166 {
00167         /*
00168          * Insert your code here...
00169          */
00170         while(1);
00171 }
00172
00173
00174 /*-------------------------MAIN FUNCTION------------------------------*/
00175 /*********************************************************************/
00180 int c_entry(void)
00181 {
00182         PINSEL_CFG_Type PinCfg;
00183         uint32_t tmp;
00184         uint8_t *dp, *sp;
00185
00186         /* Initialize debug via UART0
00187          * – 115200bps
00188          * – 8 data bit
00189          * – No parity
00190          * – 1 stop bit
00191          * – No flow control
00192          */
00193         debug_frmwrk_init();
00194
00195         // print welcome screen
00196         print_menu();
00197
00198         /*
00199          * Init I2C pin connect
00200          */
00201         PinCfg.OpenDrain = 0;
00202         PinCfg.Pinmode = 0;
00203 #if (USEDI2CDEV == 0)
00204         PinCfg.Funcnum = 1;
00205         PinCfg.Pinnum = 27;
00206         PinCfg.Portnum = 0;
00207         PINSEL_ConfigPin(&PinCfg);
00208         PinCfg.Pinnum = 28;
00209         PINSEL_ConfigPin(&PinCfg);
00210 #elif (USEDI2CDEV == 2)
00211         PinCfg.Funcnum = 2;
00212         PinCfg.Pinnum = 10;
00213         PinCfg.Portnum = 0;
00214         PINSEL_ConfigPin(&PinCfg);
00215         PinCfg.Pinnum = 11;
00216         PINSEL_ConfigPin(&PinCfg);
00217 #endif
00218
00219         /* I2C block ------------------------------------------------------------------- */
00220         // Initialize I2C peripheral
00221         I2C_Init(I2CDEV, 200000);
00222
00223         /* Enable I2C1 operation */
00224         I2C_Cmd(I2CDEV, ENABLE);
00225
00226         /* Transmit data ---------------------------------------------------------- */
00227         _DBG_("Sending...");
00228         if (PCA8581_Write() == (-1)){
00229                 _DBG_("Error while sending data");
00230                 Error_Loop(txsetup.status);
00231         }
00232         _DBG_("Complete!");
00233
00234         // wait for a while
00235         for (tmp = 0x100000; tmp; tmp--);
00236
00237         /* Receive data ---------------------------------------------------------- */
00238         _DBG_("Reading...");
00239         if (PCA8581_Read() == (-1)){
00240                 _DBG_("Error while reading data");
00241                 Error_Loop(rxsetup.status);
00242         }
00243         _DBG_("Complete!");
00244
00245         // Verify data
00246         dp = pca8581_rddat;
00247         sp = pca8581_wrdat;
00248         sp += 1;  // Offset +1
00249         for (tmp = sizeof(pca8581_rddat); tmp; tmp--){
00250                 if (*dp++ != *sp++){
00251                         _DBG_("Verify Data error!");
00252                         break;
00253                 }
00254         }
00255
00256         tmp++;
00257
00258     /* Loop forever */
00259     while(1);
00260 }
00261
00262 /* With ARM and GHS toolsets, the entry point is main() - this will
00263    allow the linker to generate wrapper code to setup stacks, allocate
00264    heap area, and initialize and copy code and data segments. For GNU
00265    toolsets, the entry point is through __start() in the crt0_gnu.asm
00266    file, and that startup code will setup stacks and data */
00267 int main(void)
00268 {
00269     return c_entry();
00270 }
00271
00272
00273 #ifdef  DEBUG
00274 /*******************************************************************************
00275 * @brief                Reports the name of the source file and the source line number
00276 *                               where the CHECK_PARAM error has occurred.
00277 * @param[in]    file Pointer to the source file name
00278 * @param[in]    line assert_param error line source number
00279 * @return               None
00280 *******************************************************************************/
00281 void check_failed(uint8_t *file, uint32_t line)
00282 {
00283         /* User can add his own implementation to report the file name and line number,
00284          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00285
00286         /* Infinite loop */
00287         while(1);
00288 }
00289 #endif
00290
00291 /*
00292  * @}
00293  */
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/printf-stdarg.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/printf-stdarg.c
Go to the documentation of this file.
00001 /*
00002         Copyright 2001, 2002 Georges Menie (www.menie.org)
00003         stdarg version contributed by Christian Ettinger
00004
00005     This program is free software; you can redistribute it and/or modify
00006     it under the terms of the GNU Lesser General Public License as published by
00007     the Free Software Foundation; either version 2 of the License, or
00008     (at your option) any later version.
00009
00010     This program is distributed in the hope that it will be useful,
00011     but WITHOUT ANY WARRANTY; without even the implied warranty of
00012     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00013     GNU Lesser General Public License for more details.
00014
00015     You should have received a copy of the GNU Lesser General Public License
00016     along with this program; if not, write to the Free Software
00017     Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
00018 */
00019
00020 /*
00021         putchar is the only external dependency for this file,
00022         if you have a working putchar, leave it commented out.
00023         If not, uncomment the define below and
00024         replace outbyte(c) by your own function call.
00025
00026 */
00027
00028
00029 //#define putchar(c) c
00030 extern int sendchar (int ch);
00031 #define putchar(c)      sendchar(c)
00032
00033 #include <stdarg.h>
00034
00035 static void printchar(char **str, int c)
00036 {
00037         //extern int putchar(int c);
00038
00039         if (str) {
00040                 **str = (char)c;
00041                 ++(*str);
00042         }
00043         else
00044         {
00045                 (void)putchar(c);
00046         }
00047 }
00048
00049 #define PAD_RIGHT 1
00050 #define PAD_ZERO 2
00051
00052 static int prints(char **out, const char *string, int width, int pad)
00053 {
00054         register int pc = 0, padchar = ' ';
00055
00056         if (width > 0) {
00057                 register int len = 0;
00058                 register const char *ptr;
00059                 for (ptr = string; *ptr; ++ptr) ++len;
00060                 if (len >= width) width = 0;
00061                 else width -= len;
00062                 if (pad & PAD_ZERO) padchar = '0';
00063         }
00064         if (!(pad & PAD_RIGHT)) {
00065                 for ( ; width > 0; --width) {
00066                         printchar (out, padchar);
00067                         ++pc;
00068                 }
00069         }
00070         for ( ; *string ; ++string) {
00071                 printchar (out, *string);
00072                 ++pc;
00073         }
00074         for ( ; width > 0; --width) {
00075                 printchar (out, padchar);
00076                 ++pc;
00077         }
00078
00079         return pc;
00080 }
00081
00082 /* the following should be enough for 32 bit int */
00083 #define PRINT_BUF_LEN 12
00084
00085 static int printi(char **out, int i, int b, int sg, int width, int pad, int letbase)
00086 {
00087         char print_buf[PRINT_BUF_LEN];
00088         register char *s;
00089         register int t, neg = 0, pc = 0;
00090         register unsigned int u = (unsigned int)i;
00091
00092         if (i == 0) {
00093                 print_buf[0] = '0';
00094                 print_buf[1] = '\0';
00095                 return prints (out, print_buf, width, pad);
00096         }
00097
00098         if (sg && b == 10 && i < 0) {
00099                 neg = 1;
00100                 u = (unsigned int)-i;
00101         }
00102
00103         s = print_buf + PRINT_BUF_LEN-1;
00104         *s = '\0';
00105
00106         while (u) {
00107                 t = (int)u % b;
00108                 if( t >= 10 )
00109                         t += letbase - '0' - 10;
00110                 *--s = (char)(t + '0');
00111                 u /= b;
00112         }
00113
00114         if (neg) {
00115                 if( width && (pad & PAD_ZERO) ) {
00116                         printchar (out, '-');
00117                         ++pc;
00118                         --width;
00119                 }
00120                 else {
00121                         *--s = '-';
00122                 }
00123         }
00124
00125         return pc + prints (out, s, width, pad);
00126 }
00127
00128 static int print( char **out, const char *format, va_list args )
00129 {
00130         register int width, pad;
00131         register int pc = 0;
00132         char scr[2];
00133
00134         for (; *format != 0; ++format) {
00135                 if (*format == '%') {
00136                         ++format;
00137                         width = pad = 0;
00138                         if (*format == '\0') break;
00139                         if (*format == '%') goto out;
00140                         if (*format == '-') {
00141                                 ++format;
00142                                 pad = PAD_RIGHT;
00143                         }
00144                         while (*format == '0') {
00145                                 ++format;
00146                                 pad |= PAD_ZERO;
00147                         }
00148                         for ( ; *format >= '0' && *format <= '9'; ++format) {
00149                                 width *= 10;
00150                                 width += *format - '0';
00151                         }
00152                         if( *format == 's' ) {
00153                                 register char *s = (char *)va_arg( args, int );
00154                                 pc += prints (out, s?s:"(null)", width, pad);
00155                                 continue;
00156                         }
00157                         if( *format == 'd' ) {
00158                                 pc += printi (out, va_arg( args, int ), 10, 1, width, pad, 'a');
00159                                 continue;
00160                         }
00161                         if( *format == 'x' ) {
00162                                 pc += printi (out, va_arg( args, int ), 16, 0, width, pad, 'a');
00163                                 continue;
00164                         }
00165                         if( *format == 'X' ) {
00166                                 pc += printi (out, va_arg( args, int ), 16, 0, width, pad, 'A');
00167                                 continue;
00168                         }
00169                         if( *format == 'u' ) {
00170                                 pc += printi (out, va_arg( args, int ), 10, 0, width, pad, 'a');
00171                                 continue;
00172                         }
00173                         if( *format == 'c' ) {
00174                                 /* char are converted to int then pushed on the stack */
00175                                 scr[0] = (char)va_arg( args, int );
00176                                 scr[1] = '\0';
00177                                 pc += prints (out, scr, width, pad);
00178                                 continue;
00179                         }
00180                 }
00181                 else {
00182                 out:
00183                         printchar (out, *format);
00184                         ++pc;
00185                 }
00186         }
00187         if (out) **out = '\0';
00188         va_end( args );
00189         return pc;
00190 }
00191
00192 int printf(const char *format, ...)
00193 {
00194         va_list args;
00195
00196         va_start( args, format );
00197         return print( 0, format, args );
00198 }
00199
00200 int sprintf(char *out, const char *format, ...)
00201 {
00202         va_list args;
00203
00204         va_start( args, format );
00205         return print( &out, format, args );
00206 }
00207
00208
00209 int snprintf( char *buf, unsigned int count, const char *format, ... )
00210 {
00211         va_list args;
00212
00213         ( void ) count;
00214
00215         va_start( args, format );
00216         return print( &buf, format, args );
00217 }
00218
00219
00220 #ifdef TEST_PRINTF
00221 int main(void)
00222 {
00223         char *ptr = "Hello world!";
00224         char *np = 0;
00225         int i = 5;
00226         unsigned int bs = sizeof(int)*8;
00227         int mi;
00228         char buf[80];
00229
00230         mi = (1 << (bs-1)) + 1;
00231         printf("%s\n", ptr);
00232         printf("printf test\n");
00233         printf("%s is null pointer\n", np);
00234         printf("%d = 5\n", i);
00235         printf("%d = - max int\n", mi);
00236         printf("char %c = 'a'\n", 'a');
00237         printf("hex %x = ff\n", 0xff);
00238         printf("hex %02x = 00\n", 0);
00239         printf("signed %d = unsigned %u = hex %x\n", -3, -3, -3);
00240         printf("%d %s(s)%", 0, "message");
00241         printf("\n");
00242         printf("%d %s(s) with %%\n", 0, "message");
00243         sprintf(buf, "justif: \"%-10s\"\n", "left"); printf("%s", buf);
00244         sprintf(buf, "justif: \"%10s\"\n", "right"); printf("%s", buf);
00245         sprintf(buf, " 3: %04d zero padded\n", 3); printf("%s", buf);
00246         sprintf(buf, " 3: %-4d left justif.\n", 3); printf("%s", buf);
00247         sprintf(buf, " 3: %4d right justif.\n", 3); printf("%s", buf);
00248         sprintf(buf, "-3: %04d zero padded\n", -3); printf("%s", buf);
00249         sprintf(buf, "-3: %-4d left justif.\n", -3); printf("%s", buf);
00250         sprintf(buf, "-3: %4d right justif.\n", -3); printf("%s", buf);
00251
00252         return 0;
00253 }
00254
00255 /*
00256  * if you compile this file with
00257  *   gcc -Wall $(YOUR_C_OPTIONS) -DTEST_PRINTF -c printf.c
00258  * you will get a normal warning:
00259  *   printf.c:214: warning: spurious trailing `%' in format
00260  * this line is testing an invalid % at the end of the format string.
00261  *
00262  * this should display (on 32bit int machine) :
00263  *
00264  * Hello world!
00265  * printf test
00266  * (null) is null pointer
00267  * 5 = 5
00268  * -2147483647 = - max int
00269  * char a = 'a'
00270  * hex ff = ff
00271  * hex 00 = 00
00272  * signed -3 = unsigned 4294967293 = hex fffffffd
00273  * 0 message(s)
00274  * 0 message(s) with %
00275  * justif: "left      "
00276  * justif: "     right"
00277  *  3: 0003 zero padded
00278  *  3: 3    left justif.
00279  *  3:    3 right justif.
00280  * -3: -003 zero padded
00281  * -3: -3   left justif.
00282  * -3:   -3 right justif.
00283  */
00284
00285 #endif
00286
00287
00288 /* To keep linker happy. */
00289 int     write( int i, char* c, int n)
00290 {
00291         (void)i;
00292         (void)n;
00293         (void)c;
00294         return 0;
00295 }
00296
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Privilege_mode/privilege.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/Cortex-M3/Privilege_mode/privilege.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          privilege.c                             2010-07-18
00003 */
00026 #include "lpc17xx_libcfg.h"
00027 #include "debug_frmwrk.h"
00028 #include "lpc17xx_gpio.h"
00029
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINTIONS*************************/
00038 /* Uncomment to chose current using eval board */
00039 //#define MCB_LPC_1768
00040 #define IAR_LPC_1768
00041
00042 /* CONTROL register controls the privileged level for software execution
00043  * when the processor is in Thread mode
00044  */
00045 #define THREAD_PRIVILEGED                       0
00046 #define THREAD_UNPRIVILEGED                     1
00047 #define THREAD_PRIVILEDGED_MASK         0xFFFFFFFE
00048
00049 /* Used LED */
00050 #ifdef MCB_LPC_1768
00051 #define PRIVILEGE_LED                           28 //LED P1.28
00052 #define PRIVILEGE_LEDPORT                       1
00053 #define UNPRIVILEGE_LED                         29 //LED P1.29
00054 #define UNPRIVILEGE_LEDPORT                     1
00055 #elif defined(IAR_LPC_1768)
00056 #define PRIVILEGE_LED                           25 //LED1: P1.25
00057 #define PRIVILEGE_LEDPORT                       1
00058 #define UNPRIVILEGE_LED                         4       //LED2: P0.4
00059 #define UNPRIVILEGE_LEDPORT                     0
00060 #endif
00061
00062 /************************** PRIVATE VARIABLES *************************/
00063 uint8_t menu[]=
00064         "********************************************************************************\n\r"
00065         "Hello NXP Semiconductors \n\r"
00066         "Privileged demo \n\r"
00067         "\t - MCU: LPC17xx \n\r"
00068         "\t - Core: ARM CORTEX-M3 \n\r"
00069         "\t - Communicate via: UART0 - 115200 bps \n\r"
00070         "This example used to test Privileged feature of Cortex-M3 processor\n\r"
00071         "********************************************************************************\n\r";
00072 #ifdef MCB_LPC_1768
00073 uint8_t menu2[]=
00074         "LED1 (P1.28) will be turned on in privilege mode \n\r"
00075         "LED2 (P1.29) will be turned on in un-privilege mode\n\r";
00076 #elif defined (IAR_LPC_1768)
00077 uint8_t menu2[]=
00078         "LED1 (P1.25) will be turned on in privilege mode \n\r"
00079         "LED2 (P0.4) will blink in un-privilege mode\n\r";
00080 #endif
00081
00082 /************************** SYSTEM CALL EXCEPTION *********************/
00083 #if defined ( __CC_ARM   )
00084 __ASM void __SVC(void)
00085 {
00086   SVC 0x01
00087   BX R14
00088 }
00089 #elif defined ( __ICCARM__ )
00090 static __INLINE  void __SVC()                     { __ASM ("svc 0x01");}
00091 #elif defined   (  __GNUC__  )
00092 static __INLINE void __SVC()                      { __ASM volatile ("svc 0x01");}
00093 #endif
00094 /************************** PRIVATE FUNCTIONS *************************/
00095 /*********************************************************************/
00100 void SVC_Handler(void)
00101 {
00102   /* Change Thread mode to privileged */
00103   __set_CONTROL(2);
00104 }
00105
00106 /************************** PRIVATE FUNCTIONS *************************/
00107 void LED_Init(void);
00108 void Turn_on_LED(uint8_t Led_num);
00109 void Turn_off_LED(uint8_t Led_num);
00110
00111 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00112 /*********************************************************************/
00117 void LED_Init(void)
00118 {
00119         //setting two LEDs as output and turn off all
00120         GPIO_SetDir(PRIVILEGE_LEDPORT,(1<<PRIVILEGE_LED),1);
00121         GPIO_SetDir(UNPRIVILEGE_LEDPORT,(1<<UNPRIVILEGE_LED),1);
00122 #ifdef MCB_LPC_1768
00123         GPIO_ClearValue(1,(1<<PRIVILEGE_LED)|(1<<UNPRIVILEGE_LED));
00124         GPIO_ClearValue(2,(1<<2)|(1<<3)|(1<<4)|(1<<5)|(1<<6));
00125 #elif defined(IAR_LPC_1768)
00126         GPIO_SetValue(PRIVILEGE_LEDPORT,(1<<PRIVILEGE_LED));
00127         GPIO_SetValue(UNPRIVILEGE_LEDPORT,(1<<UNPRIVILEGE_LED));
00128 #endif
00129 }
00130
00131 /*********************************************************************/
00138 void Turn_on_LED(uint8_t Led_num)
00139 {
00140 #ifdef MCB_LPC_1768
00141         if(Led_num == PRIVILEGE_LED){
00142                 GPIO_SetValue(PRIVILEGE_LEDPORT,(1<<PRIVILEGE_LED));}
00143         else{
00144                 GPIO_SetValue(UNPRIVILEGE_LEDPORT,(1<<UNPRIVILEGE_LED));
00145         }
00146 #elif defined(IAR_LPC_1768)
00147         if(Led_num == PRIVILEGE_LED){
00148                 GPIO_ClearValue(PRIVILEGE_LEDPORT,(1<<PRIVILEGE_LED));}
00149         else{
00150                 GPIO_ClearValue(UNPRIVILEGE_LEDPORT,(1<<UNPRIVILEGE_LED));
00151         }
00152 #endif
00153 }
00154
00155 /*********************************************************************/
00162 void Turn_off_LED(uint8_t Led_num)
00163 {
00164 #ifdef MCB_LPC_1768
00165         if(Led_num == PRIVILEGE_LED){
00166                 GPIO_ClearValue(PRIVILEGE_LEDPORT,(1<<PRIVILEGE_LED));}
00167         else{
00168                 GPIO_ClearValue(UNPRIVILEGE_LEDPORT,(1<<UNPRIVILEGE_LED));
00169         }
00170 #elif defined(IAR_LPC_1768)
00171         if(Led_num == PRIVILEGE_LED){
00172                 GPIO_SetValue(PRIVILEGE_LEDPORT,(1<<PRIVILEGE_LED));}
00173         else{
00174                 GPIO_SetValue(UNPRIVILEGE_LEDPORT,(1<<UNPRIVILEGE_LED));
00175         }
00176 #endif
00177 }
00178
00179 /*-------------------------MAIN FUNCTION------------------------------*/
00180 /*********************************************************************/
00185 int c_entry(void)                       /* Main Program */
00186 {
00187         uint32_t priviledge_status;
00188         /* Initialize debug via UART0
00189          * – 115200bps
00190          * – 8 data bit
00191          * – No parity
00192          * – 1 stop bit
00193          * – No flow control
00194          */
00195         debug_frmwrk_init();
00196         LED_Init();
00197         //print menu
00198         _DBG(menu);
00199         _DBG_(menu2);
00200
00201         /* Thread mode is privilege out of reset */
00202         /* First checking Thread mode is privilege or un-privilege */
00203         priviledge_status = __get_CONTROL();
00204         if((priviledge_status & (~THREAD_PRIVILEDGED_MASK))==THREAD_PRIVILEGED)
00205         {
00206                 _DBG_("Thread mode is privileged!");
00207                 Turn_on_LED(PRIVILEGE_LED);
00208         }
00209         else
00210         {
00211                 _DBG_("Theard mode is unprivileged! It's not compliant with Cortex-M3 Technical");
00212                 while(1); //Error loop
00213         }
00214         /* Wait user press '1' character to change to un-privilege mode */
00215         _DBG_("Press '1' to change to unprivilege mode ...\n\r");
00216         while(_DG !='1');
00217
00218         /* Changing to un-privilege mode */
00219         __set_CONTROL((priviledge_status & THREAD_PRIVILEDGED_MASK)|THREAD_UNPRIVILEGED);
00220         _DBG_("Changed to unprivilege mode!");
00221
00222         /* Check */
00223         priviledge_status = __get_CONTROL();
00224         if((priviledge_status & ~THREAD_PRIVILEDGED_MASK)==THREAD_UNPRIVILEGED)
00225         {
00226                 _DBG_("Check: Thread mode change to unprivilege successful!");
00227                 Turn_off_LED(PRIVILEGE_LED);
00228                 Turn_on_LED(UNPRIVILEGE_LED);
00229         }
00230         else
00231         {
00232                 _DBG_("Check: Thread mode is still privileged! ERROR...");
00233                 while(1); //Error loop
00234         }
00235         /* Wait user press '1' character to change to un-privilege mode */
00236         _DBG_("Press '2' to change to privilege mode by calling system call exception...\n\r");
00237         while(_DG !='2');
00238         /* Call system call exception to re-change Thread mode into privilege */
00239         __SVC();
00240         _DBG_("Called system call exception!");
00241
00242         /* Check */
00243         priviledge_status = __get_CONTROL();
00244         if((priviledge_status & ~THREAD_PRIVILEDGED_MASK)==THREAD_PRIVILEGED)
00245         {
00246                 _DBG_("Check: Thread mode change to privilege successful!");
00247                 Turn_off_LED(UNPRIVILEGE_LED);
00248                 Turn_on_LED(PRIVILEGE_LED);
00249         }
00250         else
00251         {
00252                 _DBG_("Check: Theard mode is still unprivileged! ERROR...");
00253                 while(1); //Error loop
00254         }
00255         _DBG_("Demo terminate!");
00256         while (1);
00257 }
00258
00259 /* With ARM and GHS toolsets, the entry point is main() - this will
00260  allow the linker to generate wrapper code to setup stacks, allocate
00261  heap area, and initialize and copy code and data segments. For GNU
00262  toolsets, the entry point is through __start() in the crt0_gnu.asm
00263  file, and that startup code will setup stacks and data */
00264 int main(void) {
00265         return c_entry();
00266 }
00267
00268 #ifdef  DEBUG
00269 /*******************************************************************************
00270  * @brief               Reports the name of the source file and the source line number
00271  *                              where the CHECK_PARAM error has occurred.
00272  * @param[in]   file Pointer to the source file name
00273  * @param[in]    line assert_param error line source number
00274  * @return              None
00275  *******************************************************************************/
00276 void check_failed(uint8_t *file, uint32_t line) {
00277         /* User can add his own implementation to report the file name and line number,
00278          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00279
00280         /* Infinite loop */
00281         while (1)
00282                 ;
00283 }
00284 #endif
00285
00286 /*
00287  * @}
00288  */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.c
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: psock.c,v 1.2 2006/06/12 08:00:30 adam Exp $
00034  */
00035
00036 #include <stdio.h>
00037 #include <string.h>
00038
00039 #include "uipopt.h"
00040 #include "psock.h"
00041 #include "uip.h"
00042
00043 #define STATE_NONE 0
00044 #define STATE_ACKED 1
00045 #define STATE_READ 2
00046 #define STATE_BLOCKED_NEWDATA 3
00047 #define STATE_BLOCKED_CLOSE 4
00048 #define STATE_BLOCKED_SEND 5
00049 #define STATE_DATA_SENT 6
00050
00051 /*
00052  * Return value of the buffering functions that indicates that a
00053  * buffer was not filled by incoming data.
00054  *
00055  */
00056 #define BUF_NOT_FULL 0
00057 #define BUF_NOT_FOUND 0
00058
00059 /*
00060  * Return value of the buffering functions that indicates that a
00061  * buffer was completely filled by incoming data.
00062  *
00063  */
00064 #define BUF_FULL 1
00065
00066 /*
00067  * Return value of the buffering functions that indicates that an
00068  * end-marker byte was found.
00069  *
00070  */
00071 #define BUF_FOUND 2
00072
00073 /*---------------------------------------------------------------------------*/
00074 static void
00075 buf_setup(struct psock_buf *buf,
00076           u8_t *bufptr, u16_t bufsize)
00077 {
00078   buf->ptr = bufptr;
00079   buf->left = bufsize;
00080 }
00081 /*---------------------------------------------------------------------------*/
00082 static u8_t
00083 buf_bufdata(struct psock_buf *buf, u16_t len,
00084             u8_t **dataptr, u16_t *datalen)
00085 {
00086   ( void ) len;
00087   if(*datalen < buf->left) {
00088     memcpy(buf->ptr, *dataptr, *datalen);
00089     buf->ptr += *datalen;
00090     buf->left -= *datalen;
00091     *dataptr += *datalen;
00092     *datalen = 0;
00093     return BUF_NOT_FULL;
00094   } else if(*datalen == buf->left) {
00095     memcpy(buf->ptr, *dataptr, *datalen);
00096     buf->ptr += *datalen;
00097     buf->left = 0;
00098     *dataptr += *datalen;
00099     *datalen = 0;
00100     return BUF_FULL;
00101   } else {
00102     memcpy(buf->ptr, *dataptr, buf->left);
00103     buf->ptr += buf->left;
00104     *datalen -= buf->left;
00105     *dataptr += buf->left;
00106     buf->left = 0;
00107     return BUF_FULL;
00108   }
00109 }
00110 /*---------------------------------------------------------------------------*/
00111 static u8_t
00112 buf_bufto(register struct psock_buf *buf, u8_t endmarker,
00113           register u8_t **dataptr, register u16_t *datalen)
00114 {
00115   u8_t c;
00116   while(buf->left > 0 && *datalen > 0) {
00117     c = *buf->ptr = **dataptr;
00118     ++*dataptr;
00119     ++buf->ptr;
00120     --*datalen;
00121     --buf->left;
00122
00123     if(c == endmarker) {
00124       return BUF_FOUND;
00125     }
00126   }
00127
00128   if(*datalen == 0) {
00129     return BUF_NOT_FOUND;
00130   }
00131
00132   while(*datalen > 0) {
00133     c = **dataptr;
00134     --*datalen;
00135     ++*dataptr;
00136
00137     if(c == endmarker) {
00138       return BUF_FOUND | BUF_FULL;
00139     }
00140   }
00141
00142   return BUF_FULL;
00143 }
00144 /*---------------------------------------------------------------------------*/
00145 static char
00146 send_data(register struct psock *s)
00147 {
00148   if(s->state != STATE_DATA_SENT || uip_rexmit()) {
00149     if(s->sendlen > uip_mss()) {
00150       uip_send(s->sendptr, uip_mss());
00151     } else {
00152       uip_send(s->sendptr, s->sendlen);
00153     }
00154     s->state = STATE_DATA_SENT;
00155     return 1;
00156   }
00157   return 0;
00158 }
00159 /*---------------------------------------------------------------------------*/
00160 static char
00161 data_acked(register struct psock *s)
00162 {
00163   if(s->state == STATE_DATA_SENT && uip_acked()) {
00164     if(s->sendlen > uip_mss()) {
00165       s->sendlen -= uip_mss();
00166       s->sendptr += uip_mss();
00167     } else {
00168       s->sendptr += s->sendlen;
00169       s->sendlen = 0;
00170     }
00171     s->state = STATE_ACKED;
00172     return 1;
00173   }
00174   return 0;
00175 }
00176 /*---------------------------------------------------------------------------*/
00177 PT_THREAD(psock_send(register struct psock *s, const char *buf,
00178                      unsigned int len))
00179 {
00180   PT_BEGIN(&s->psockpt);
00181
00182   /* If there is no data to send, we exit immediately. */
00183   if(len == 0) {
00184     PT_EXIT(&s->psockpt);
00185   }
00186
00187   /* Save the length of and a pointer to the data that is to be
00188      sent. */
00189   s->sendptr = (unsigned char*)buf;
00190   s->sendlen = len;
00191
00192   s->state = STATE_NONE;
00193
00194   /* We loop here until all data is sent. The s->sendlen variable is
00195      updated by the data_sent() function. */
00196   while(s->sendlen > 0) {
00197
00198     /*
00199      * The condition for this PT_WAIT_UNTIL is a little tricky: the
00200      * protothread will wait here until all data has been acknowledged
00201      * (data_acked() returns true) and until all data has been sent
00202      * (send_data() returns true). The two functions data_acked() and
00203      * send_data() must be called in succession to ensure that all
00204      * data is sent. Therefore the & operator is used instead of the
00205      * && operator, which would cause only the data_acked() function
00206      * to be called when it returns false.
00207      */
00208     PT_WAIT_UNTIL(&s->psockpt, data_acked(s) & send_data(s));
00209   }
00210
00211   s->state = STATE_NONE;
00212
00213   PT_END(&s->psockpt);
00214 }
00215 /*---------------------------------------------------------------------------*/
00216 PT_THREAD(psock_generator_send(register struct psock *s,
00217                                unsigned short (*generate)(void *), void *arg))
00218 {
00219   PT_BEGIN(&s->psockpt);
00220
00221   /* Ensure that there is a generator function to call. */
00222   if(generate == NULL) {
00223     PT_EXIT(&s->psockpt);
00224   }
00225
00226   /* Call the generator function to generate the data in the
00227      uip_appdata buffer. */
00228   s->sendlen = generate(arg);
00229   s->sendptr = uip_appdata;
00230
00231   s->state = STATE_NONE;
00232   do {
00233     /* Call the generator function again if we are called to perform a
00234        retransmission. */
00235     if(uip_rexmit()) {
00236       generate(arg);
00237     }
00238     /* Wait until all data is sent and acknowledged. */
00239     PT_WAIT_UNTIL(&s->psockpt, data_acked(s) & send_data(s));
00240   } while(s->sendlen > 0);
00241
00242   s->state = STATE_NONE;
00243
00244   PT_END(&s->psockpt);
00245 }
00246 /*---------------------------------------------------------------------------*/
00247 u16_t
00248 psock_datalen(struct psock *psock)
00249 {
00250   return psock->bufsize - psock->buf.left;
00251 }
00252 /*---------------------------------------------------------------------------*/
00253 char
00254 psock_newdata(struct psock *s)
00255 {
00256   if(s->readlen > 0) {
00257     /* There is data in the uip_appdata buffer that has not yet been
00258        read with the PSOCK_READ functions. */
00259     return 1;
00260   } else if(s->state == STATE_READ) {
00261     /* All data in uip_appdata buffer already consumed. */
00262     s->state = STATE_BLOCKED_NEWDATA;
00263     return 0;
00264   } else if(uip_newdata()) {
00265     /* There is new data that has not been consumed. */
00266     return 1;
00267   } else {
00268     /* There is no new data. */
00269     return 0;
00270   }
00271 }
00272 /*---------------------------------------------------------------------------*/
00273 PT_THREAD(psock_readto(register struct psock *psock, unsigned char c))
00274 {
00275   PT_BEGIN(&psock->psockpt);
00276
00277   buf_setup(&psock->buf, (unsigned char*)psock->bufptr, psock->bufsize);
00278
00279   /* XXX: Should add buf_checkmarker() before do{} loop, if
00280      incoming data has been handled while waiting for a write. */
00281
00282   do {
00283     if(psock->readlen == 0) {
00284       PT_WAIT_UNTIL(&psock->psockpt, psock_newdata(psock));
00285       psock->state = STATE_READ;
00286       psock->readptr = (u8_t *)uip_appdata;
00287       psock->readlen = uip_datalen();
00288     }
00289   } while((buf_bufto(&psock->buf, c,
00290                      &psock->readptr,
00291                      &psock->readlen) & BUF_FOUND) == 0);
00292
00293   if(psock_datalen(psock) == 0) {
00294     psock->state = STATE_NONE;
00295     PT_RESTART(&psock->psockpt);
00296   }
00297   PT_END(&psock->psockpt);
00298 }
00299 /*---------------------------------------------------------------------------*/
00300 PT_THREAD(psock_readbuf(register struct psock *psock))
00301 {
00302   PT_BEGIN(&psock->psockpt);
00303
00304   buf_setup(&psock->buf, (unsigned char * ) psock->bufptr, psock->bufsize);
00305
00306   /* XXX: Should add buf_checkmarker() before do{} loop, if
00307      incoming data has been handled while waiting for a write. */
00308
00309   do {
00310     if(psock->readlen == 0) {
00311       PT_WAIT_UNTIL(&psock->psockpt, psock_newdata(psock));
00312       printf("Waited for newdata\n");
00313       psock->state = STATE_READ;
00314       psock->readptr = (u8_t *)uip_appdata;
00315       psock->readlen = uip_datalen();
00316     }
00317   } while(buf_bufdata(&psock->buf, psock->bufsize,
00318                          &psock->readptr,
00319                          &psock->readlen) != BUF_FULL);
00320
00321   if(psock_datalen(psock) == 0) {
00322     psock->state = STATE_NONE;
00323     PT_RESTART(&psock->psockpt);
00324   }
00325   PT_END(&psock->psockpt);
00326 }
00327 /*---------------------------------------------------------------------------*/
00328 void
00329 psock_init(register struct psock *psock, char *buffer, unsigned int buffersize)
00330 {
00331   psock->state = STATE_NONE;
00332   psock->readlen = 0;
00333   psock->bufptr = buffer;
00334   psock->bufsize = buffersize;
00335   buf_setup(&psock->buf, (unsigned char*) buffer, buffersize);
00336   PT_INIT(&psock->pt);
00337   PT_INIT(&psock->psockpt);
00338 }
00339 /*---------------------------------------------------------------------------*/
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/psock.h
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: psock.h,v 1.3 2006/06/12 08:00:30 adam Exp $
00034  */
00035
00085 #ifndef __PSOCK_H__
00086 #define __PSOCK_H__
00087
00088 #include "uipopt.h"
00089 #include "pt.h"
00090
00091  /*
00092  * The structure that holds the state of a buffer.
00093  *
00094  * This structure holds the state of a uIP buffer. The structure has
00095  * no user-visible elements, but is used through the functions
00096  * provided by the library.
00097  *
00098  */
00099 struct psock_buf {
00100   u8_t *ptr;
00101   unsigned short left;
00102 };
00103
00110 struct psock {
00111   struct pt pt, psockpt; /* Protothreads - one that's using the psock
00112                             functions, and one that runs inside the
00113                             psock functions. */
00114   const u8_t *sendptr;   /* Pointer to the next data to be sent. */
00115   u8_t *readptr;         /* Pointer to the next data to be read. */
00116
00117   char *bufptr;          /* Pointer to the buffer used for buffering
00118                             incoming data. */
00119
00120   u16_t sendlen;         /* The number of bytes left to be sent. */
00121   u16_t readlen;         /* The number of bytes left to be read. */
00122
00123   struct psock_buf buf;  /* The structure holding the state of the
00124                             input buffer. */
00125   unsigned int bufsize;  /* The size of the input buffer. */
00126
00127   unsigned char state;   /* The state of the protosocket. */
00128 };
00129
00130 void psock_init(struct psock *psock, char *buffer, unsigned int buffersize);
00148 #define PSOCK_INIT(psock, buffer, buffersize) \
00149   psock_init(psock, buffer, buffersize)
00150
00162 #define PSOCK_BEGIN(psock) PT_BEGIN(&((psock)->pt))
00163
00164 PT_THREAD(psock_send(struct psock *psock, const char *buf, unsigned int len));
00182 #define PSOCK_SEND(psock, data, datalen)                \
00183     PT_WAIT_THREAD(&((psock)->pt), psock_send(psock, data, datalen))
00184
00195 #define PSOCK_SEND_STR(psock, str)                      \
00196     PT_WAIT_THREAD(&((psock)->pt), psock_send(psock, str, strlen(str)))
00197
00198 PT_THREAD(psock_generator_send(struct psock *psock,
00199                                 unsigned short (*f)(void *), void *arg));
00200
00223 #define PSOCK_GENERATOR_SEND(psock, generator, arg)     \
00224     PT_WAIT_THREAD(&((psock)->pt),                                      \
00225                    psock_generator_send(psock, generator, arg))
00226
00227
00239 #define PSOCK_CLOSE(psock) uip_close()
00240
00241 PT_THREAD(psock_readbuf(struct psock *psock));
00254 #define PSOCK_READBUF(psock)                            \
00255   PT_WAIT_THREAD(&((psock)->pt), psock_readbuf(psock))
00256
00257 PT_THREAD(psock_readto(struct psock *psock, unsigned char c));
00272 #define PSOCK_READTO(psock, c)                          \
00273   PT_WAIT_THREAD(&((psock)->pt), psock_readto(psock, c))
00274
00285 #define PSOCK_DATALEN(psock) psock_datalen(psock)
00286
00287 u16_t psock_datalen(struct psock *psock);
00288
00301 #define PSOCK_EXIT(psock) PT_EXIT(&((psock)->pt))
00302
00312 #define PSOCK_CLOSE_EXIT(psock)         \
00313   do {                                          \
00314     PSOCK_CLOSE(psock);                 \
00315     PSOCK_EXIT(psock);                  \
00316   } while(0)
00317
00329 #define PSOCK_END(psock) PT_END(&((psock)->pt))
00330
00331 char psock_newdata(struct psock *s);
00332
00343 #define PSOCK_NEWDATA(psock) psock_newdata(psock)
00344
00376 #define PSOCK_WAIT_UNTIL(psock, condition)    \
00377   PT_WAIT_UNTIL(&((psock)->pt), (condition));
00378
00379 #define PSOCK_WAIT_THREAD(psock, condition)   \
00380   PT_WAIT_THREAD(&((psock)->pt), (condition))
00381
00382 #endif /* __PSOCK_H__ */
00383
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/pt.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/pt.h
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004-2005, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: pt.h,v 1.2 2006/06/12 08:00:30 adam Exp $
00034  */
00035
00049 #ifndef __PT_H__
00050 #define __PT_H__
00051
00052 #include "lc.h"
00053
00054 struct pt {
00055   lc_t lc;
00056 };
00057
00058 #define PT_WAITING 0
00059 #define PT_EXITED  1
00060 #define PT_ENDED   2
00061 #define PT_YIELDED 3
00062
00080 #define PT_INIT(pt)   LC_INIT((pt)->lc)
00081
00100 #define PT_THREAD(name_args) char name_args
00101
00115 #define PT_BEGIN(pt) { char PT_YIELD_FLAG = 1; LC_RESUME((pt)->lc)
00116
00127 #define PT_END(pt) LC_END((pt)->lc); PT_YIELD_FLAG = 0; \
00128                    PT_INIT(pt); return PT_ENDED; }
00129
00148 #define PT_WAIT_UNTIL(pt, condition)            \
00149   do {                                          \
00150     LC_SET((pt)->lc);                           \
00151     if(!(condition)) {                          \
00152       return PT_WAITING;                        \
00153     }                                           \
00154   } while(0)
00155
00167 #define PT_WAIT_WHILE(pt, cond)  PT_WAIT_UNTIL((pt), !(cond))
00168
00192 #define PT_WAIT_THREAD(pt, thread) PT_WAIT_WHILE((pt), PT_SCHEDULE(thread))
00193
00206 #define PT_SPAWN(pt, child, thread)             \
00207   do {                                          \
00208     PT_INIT((child));                           \
00209     PT_WAIT_THREAD((pt), (thread));             \
00210   } while(0)
00211
00229 #define PT_RESTART(pt)                          \
00230   do {                                          \
00231     PT_INIT(pt);                                \
00232     return PT_WAITING;                  \
00233   } while(0)
00234
00246 #define PT_EXIT(pt)                             \
00247   do {                                          \
00248     PT_INIT(pt);                                \
00249     return PT_EXITED;                   \
00250   } while(0)
00251
00271 #define PT_SCHEDULE(f) ((f) == PT_WAITING)
00272
00290 #define PT_YIELD(pt)                            \
00291   do {                                          \
00292     PT_YIELD_FLAG = 0;                          \
00293     LC_SET((pt)->lc);                           \
00294     if(PT_YIELD_FLAG == 0) {                    \
00295       return PT_YIELDED;                        \
00296     }                                           \
00297   } while(0)
00298
00310 #define PT_YIELD_UNTIL(pt, cond)                \
00311   do {                                          \
00312     PT_YIELD_FLAG = 0;                          \
00313     LC_SET((pt)->lc);                           \
00314     if((PT_YIELD_FLAG == 0) || !(cond)) {       \
00315       return PT_YIELDED;                        \
00316     }                                           \
00317   } while(0)
00318
00321 #endif /* __PT_H__ */
00322
Generated on Mon Nov 28 2011 11:14:49 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Dual_Edge/pwm_dual_edge.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Dual_Edge/pwm_dual_edge.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          pwm_dual_edge.c                                 2010-05-21
00003 */
00026 #include "lpc17xx_pwm.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /*-------------------------MAIN FUNCTION------------------------------*/
00037 /*********************************************************************/
00042 int c_entry(void)
00043 {
00044         uint8_t temp;
00045         PWM_TIMERCFG_Type PWMCfgDat;
00046         PWM_MATCHCFG_Type PWMMatchCfgDat;
00047         PINSEL_CFG_Type PinCfg;
00048
00049         /* PWM block section -------------------------------------------- */
00050         /* Initialize PWM peripheral, timer mode
00051          * PWM prescale value = 1 (absolute value - tick value) */
00052         PWMCfgDat.PrescaleOption = PWM_TIMER_PRESCALE_TICKVAL;
00053         PWMCfgDat.PrescaleValue = 1;
00054         PWM_Init(LPC_PWM1, PWM_MODE_TIMER, (void *) &PWMCfgDat);
00055
00056         /*
00057          * Initialize PWM pin connect
00058          *
00059          */
00060         PinCfg.Funcnum = 1;
00061         PinCfg.OpenDrain = 0;
00062         PinCfg.Pinmode = 0;
00063         PinCfg.Portnum = 2;
00064         for (temp = 0; temp <= 6; temp++){
00065                 PinCfg.Pinnum = temp;
00066                 PINSEL_ConfigPin(&PinCfg);
00067         }
00068
00069
00070         /* Set match value for PWM match channel 0 = 100, update immediately */
00071         PWM_MatchUpdate(LPC_PWM1, 0, 100, PWM_MATCH_UPDATE_NOW);
00072         /* PWM Timer/Counter will be reset when channel 0 matching
00073          * no interrupt when match
00074          * no stop when match */
00075         PWMMatchCfgDat.IntOnMatch = DISABLE;
00076         PWMMatchCfgDat.MatchChannel = 0;
00077         PWMMatchCfgDat.ResetOnMatch = ENABLE;
00078         PWMMatchCfgDat.StopOnMatch = DISABLE;
00079         PWM_ConfigMatch(LPC_PWM1, &PWMMatchCfgDat);
00080
00081         /* Configure each PWM channel: --------------------------------------------- */
00082         /* - Channel 2: Double Edge
00083          * - Channel 4: Double Edge
00084          * - Channel 5: Single Edge
00085          * The Match register values are as follows:
00086          * - MR0 = 100 (PWM rate)
00087          * - MR1 = 41, MR2 = 78 (PWM2 output)
00088          * - MR3 = 53, MR4 = 27 (PWM4 output)
00089          * - MR5 = 65 (PWM5 output)
00090          * PWM Duty on each PWM channel:
00091          * - Channel 2: Set by match 1, Reset by match 2.
00092          * - Channel 4: Set by match 3, Reset by match 4.
00093          * - Channel 5: Set by match 0, Reset by match 5.
00094          */
00095
00096         /* Edge setting ------------------------------------ */
00097         PWM_ChannelConfig(LPC_PWM1, 2, PWM_CHANNEL_DUAL_EDGE);
00098         PWM_ChannelConfig(LPC_PWM1, 4, PWM_CHANNEL_DUAL_EDGE);
00099         PWM_ChannelConfig(LPC_PWM1, 5, PWM_CHANNEL_SINGLE_EDGE);
00100
00101         /* Match value setting ------------------------------------ */
00102         PWM_MatchUpdate(LPC_PWM1, 1, 41, PWM_MATCH_UPDATE_NOW);
00103         PWM_MatchUpdate(LPC_PWM1, 2, 78, PWM_MATCH_UPDATE_NOW);
00104         PWM_MatchUpdate(LPC_PWM1, 3, 53, PWM_MATCH_UPDATE_NOW);
00105         PWM_MatchUpdate(LPC_PWM1, 4, 27, PWM_MATCH_UPDATE_NOW);
00106         PWM_MatchUpdate(LPC_PWM1, 5, 65, PWM_MATCH_UPDATE_NOW);
00107
00108
00109         /* Match option setting ------------------------------------ */
00110         for (temp = 1; temp < 6; temp++)
00111         {
00112                 /* Configure match option */
00113                 PWMMatchCfgDat.IntOnMatch = DISABLE;
00114                 PWMMatchCfgDat.MatchChannel = temp;
00115                 PWMMatchCfgDat.ResetOnMatch = DISABLE;
00116                 PWMMatchCfgDat.StopOnMatch = DISABLE;
00117                 PWM_ConfigMatch(LPC_PWM1, &PWMMatchCfgDat);
00118         }
00119
00120         /* Enable PWM Channel Output ------------------------------------ */
00121         /* Channel 2 */
00122         PWM_ChannelCmd(LPC_PWM1, 2, ENABLE);
00123         /* Channel 4 */
00124         PWM_ChannelCmd(LPC_PWM1, 4, ENABLE);
00125         /* Channel 5 */
00126         PWM_ChannelCmd(LPC_PWM1, 5, ENABLE);
00127
00128         /* Reset and Start counter */
00129         PWM_ResetCounter(LPC_PWM1);
00130         PWM_CounterCmd(LPC_PWM1, ENABLE);
00131
00132         /* Start PWM now */
00133         PWM_Cmd(LPC_PWM1, ENABLE);
00134
00135     /* Loop forever */
00136     while(1);
00137 }
00138
00139 /* With ARM and GHS toolsets, the entry point is main() - this will
00140    allow the linker to generate wrapper code to setup stacks, allocate
00141    heap area, and initialize and copy code and data segments. For GNU
00142    toolsets, the entry point is through __start() in the crt0_gnu.asm
00143    file, and that startup code will setup stacks and data */
00144 int main(void)
00145 {
00146     return c_entry();
00147 }
00148
00149
00150 #ifdef  DEBUG
00151 /*******************************************************************************
00152 * @brief                Reports the name of the source file and the source line number
00153 *                               where the CHECK_PARAM error has occurred.
00154 * @param[in]    file Pointer to the source file name
00155 * @param[in]    line assert_param error line source number
00156 * @return               None
00157 *******************************************************************************/
00158 void check_failed(uint8_t *file, uint32_t line)
00159 {
00160         /* User can add his own implementation to report the file name and line number,
00161          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00162
00163         /* Infinite loop */
00164         while(1);
00165 }
00166 #endif
00167
00168 /*
00169  * @}
00170  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Match_Interrupt/pwm_match_int.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Match_Interrupt/pwm_match_int.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          pwm_match_int.c                                 2010-05-21
00003 */
00025 #include "lpc17xx_pwm.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028
00029 /* Example group ----------------------------------------------------------- */
00035 /************************** PRIVATE DEFINITIONS *************************/
00036 // Time out definition - used in blocking mode in read/write function
00037 #define TIME_OUT        10000
00038
00039
00040 /************************** PRIVATE VARIABLES *************************/
00041 __IO uint32_t match_cnt = 0;
00042 __IO uint32_t long_duty = 0;
00043
00044 /************************** PRIVATE FUNCTIONS *************************/
00045 /* Interrupt service routine */
00046 void PWM1_IRQHandler(void);
00047
00048 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00049 /*********************************************************************/
00054 void PWM1_IRQHandler(void)
00055 {
00056         /* Check whether if match flag for channel 0 is set or not */
00057         if (PWM_GetIntStatus(LPC_PWM1, PWM_INTSTAT_MR0))
00058         {
00059                 match_cnt++;
00060                 /* Clear the interrupt flag */
00061                 PWM_ClearIntPending(LPC_PWM1, PWM_INTSTAT_MR0);
00062         }
00063 }
00064
00065
00066 /*-------------------------MAIN FUNCTION------------------------------*/
00067 /*********************************************************************/
00072 int c_entry(void)
00073 {
00074         uint8_t temp, temp2;
00075         PWM_TIMERCFG_Type PWMCfgDat;
00076         PWM_MATCHCFG_Type PWMMatchCfgDat;
00077         PINSEL_CFG_Type PinCfg;
00078
00079         /* PWM block section -------------------------------------------- */
00080         /* Initialize PWM peripheral, timer mode
00081          * PWM prescale value = 1 (absolute value - tick value) */
00082         PWMCfgDat.PrescaleOption = PWM_TIMER_PRESCALE_TICKVAL;
00083         PWMCfgDat.PrescaleValue = 1;
00084         PWM_Init(LPC_PWM1, PWM_MODE_TIMER, (void *) &PWMCfgDat);
00085
00086         /*
00087          * Initialize PWM pin connect
00088          */
00089         PinCfg.Funcnum = 1;
00090         PinCfg.OpenDrain = 0;
00091         PinCfg.Pinmode = 0;
00092         PinCfg.Portnum = 2;
00093         for (temp = 0; temp <= 6; temp++){
00094                 PinCfg.Pinnum = temp;
00095                 PINSEL_ConfigPin(&PinCfg);
00096         }
00097
00098
00099         /* Set match value for PWM match channel 0 = 256, update immediately */
00100         PWM_MatchUpdate(LPC_PWM1, 0, 256, PWM_MATCH_UPDATE_NOW);
00101         /* PWM Timer/Counter will be reset when channel 0 matching
00102          * Enable interrupt when match
00103          * no stop when match */
00104         PWMMatchCfgDat.IntOnMatch = ENABLE;
00105         PWMMatchCfgDat.MatchChannel = 0;
00106         PWMMatchCfgDat.ResetOnMatch = ENABLE;
00107         PWMMatchCfgDat.StopOnMatch = DISABLE;
00108         PWM_ConfigMatch(LPC_PWM1, &PWMMatchCfgDat);
00109
00110         /* Configure each PWM channel: --------------------------------------------- */
00111         /* - Single edge
00112          * - PWM Duty on each PWM channel determined by
00113          * the match on channel 0 to the match of that match channel.
00114          * Example: PWM Duty on PWM channel 1 determined by
00115          * the match on channel 0 to the match of match channel 1.
00116          */
00117
00118         /* Configure PWM channel edge option
00119          * Note: PWM Channel 1 is in single mode as default state and
00120          * can not be changed to double edge mode */
00121         for (temp = 2; temp < 7; temp++)
00122         {
00123                 PWM_ChannelConfig(LPC_PWM1, temp, PWM_CHANNEL_SINGLE_EDGE);
00124         }
00125
00126         /* Setting interrupt for PWM ---------------------------------------------- */
00127     /* Disable PWM interrupt */
00128     NVIC_DisableIRQ(PWM1_IRQn);
00129     /* preemption = 1, sub-priority = 1 */
00130     NVIC_SetPriority(PWM1_IRQn, ((0x01<<3)|0x01));
00131
00132         /* Configure match value for each match channel */
00133         temp2 = 10;
00134         for (temp = 1; temp < 7; temp++)
00135         {
00136                 /* Set up match value */
00137                 PWM_MatchUpdate(LPC_PWM1, temp, temp2, PWM_MATCH_UPDATE_NOW);
00138                 /* Configure match option */
00139                 PWMMatchCfgDat.IntOnMatch = DISABLE;
00140                 PWMMatchCfgDat.MatchChannel = temp;
00141                 PWMMatchCfgDat.ResetOnMatch = DISABLE;
00142                 PWMMatchCfgDat.StopOnMatch = DISABLE;
00143                 PWM_ConfigMatch(LPC_PWM1, &PWMMatchCfgDat);
00144                 /* Enable PWM Channel Output */
00145                 PWM_ChannelCmd(LPC_PWM1, temp, ENABLE);
00146                 /* Increase match value by 10 */
00147                 temp2 += 10;
00148         }
00149
00150     /* Enable PWM interrupt */
00151     NVIC_EnableIRQ(PWM1_IRQn);
00152
00153         /* Reset and Start counter */
00154         PWM_ResetCounter(LPC_PWM1);
00155         PWM_CounterCmd(LPC_PWM1, ENABLE);
00156
00157         /* Start PWM now */
00158         PWM_Cmd(LPC_PWM1, ENABLE);
00159
00160         // Update PWM1.1 every 0x1000 match interrupt
00161         while (1)
00162         {
00163                 if (match_cnt >= 0x1000) {
00164                         match_cnt = 0;
00165                         long_duty++;
00166                         if (long_duty >= 256) {
00167                                 // Reset duty
00168                                 long_duty = 0;
00169                                 // Print info
00170                                 //UART_Puts_(uartdev, "PWM1.1 is reset!");
00171                         }
00172
00173                         // Update PWM1.1 duty
00174                         PWM_MatchUpdate(LPC_PWM1, 1, long_duty, PWM_MATCH_UPDATE_NOW);
00175                 }
00176         }
00177 }
00178
00179 /* With ARM and GHS toolsets, the entry point is main() - this will
00180    allow the linker to generate wrapper code to setup stacks, allocate
00181    heap area, and initialize and copy code and data segments. For GNU
00182    toolsets, the entry point is through __start() in the crt0_gnu.asm
00183    file, and that startup code will setup stacks and data */
00184 int main(void)
00185 {
00186     return c_entry();
00187 }
00188
00189
00190 #ifdef  DEBUG
00191 /*******************************************************************************
00192 * @brief                Reports the name of the source file and the source line number
00193 *                               where the CHECK_PARAM error has occurred.
00194 * @param[in]    file Pointer to the source file name
00195 * @param[in]    line assert_param error line source number
00196 * @return               None
00197 *******************************************************************************/
00198 void check_failed(uint8_t *file, uint32_t line)
00199 {
00200         /* User can add his own implementation to report the file name and line number,
00201          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00202
00203         /* Infinite loop */
00204         while(1);
00205 }
00206 #endif
00207
00208 /*
00209  * @}
00210  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/PWMSignal/pwm_signal.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/PWMSignal/pwm_signal.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          pwm_signal.c                            2010-05-21
00003 */
00026 #include "lpc17xx_libcfg.h"
00027 #include "debug_frmwrk.h"
00028 #include "lpc17xx_gpio.h"
00029 #include "lpc17xx_pinsel.h"
00030 #include "lpc17xx_timer.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE VARIABLES *************************/
00039 uint8_t menu[]=
00040         "********************************************************************************\n\r"
00041         "Hello NXP Semiconductors \n\r"
00042         "System Tick demo \n\r"
00043         "\t - MCU: LPC17xx \n\r"
00044         "\t - Core: ARM CORTEX-M3 \n\r"
00045         "\t - Communicate via: UART0 - 115200 bps \n\r"
00046         "This example used TIMERs to generate 4 PWM signals with different duty cycles \n\r"
00047         "********************************************************************************\n\r";
00048 FunctionalState PWM0_State = ENABLE;
00049 FunctionalState PWM1_State = ENABLE;
00050 FunctionalState PWM2_State = ENABLE;
00051 FunctionalState PWM3_State = ENABLE;
00052
00053 TIM_TIMERCFG_Type TIM_ConfigStruct;
00054 TIM_MATCHCFG_Type TIM_MatchConfigStruct;
00055
00056 /************************** PRIVATE FUNCTIONS *************************/
00057 void TIMER0_IRQHandler(void);
00058 void TIMER1_IRQHandler(void);
00059 void TIMER2_IRQHandler(void);
00060 void TIMER3_IRQHandler(void);
00061
00062 void print_menu(void);
00063
00064 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00065 /*********************************************************************/
00070 void TIMER0_IRQHandler(void)
00071 {
00072         //duty cycle = 12.5%
00073         TIM_Cmd(LPC_TIM0,DISABLE);
00074         TIM_ClearIntPending(LPC_TIM0, TIM_MR0_INT);
00075         TIM_ResetCounter(LPC_TIM0);
00076         if((PWM0_State == ENABLE))
00077         {
00078                 TIM_UpdateMatchValue(LPC_TIM0, 0, 100);
00079                 PWM0_State = DISABLE;
00080         }
00081         else
00082         {
00083                 TIM_UpdateMatchValue(LPC_TIM0, 0, 700);
00084                 PWM0_State = ENABLE;
00085         }
00086         TIM_Cmd(LPC_TIM0,ENABLE);
00087 }
00088
00089 /*********************************************************************/
00094 void TIMER1_IRQHandler(void)
00095 {
00096         //duty cycle = 25%
00097         TIM_Cmd(LPC_TIM1,DISABLE);
00098         TIM_ClearIntPending(LPC_TIM1, TIM_MR0_INT);
00099         TIM_ResetCounter(LPC_TIM1);
00100         if((PWM1_State == ENABLE))
00101         {
00102                 TIM_UpdateMatchValue(LPC_TIM1,0, 200);
00103                 PWM1_State = DISABLE;
00104         }
00105         else
00106         {
00107                 TIM_UpdateMatchValue(LPC_TIM1,0, 600);
00108                 PWM1_State = ENABLE;
00109         }
00110         TIM_Cmd(LPC_TIM1,ENABLE);
00111 }
00112
00113 /*********************************************************************/
00118 void TIMER2_IRQHandler(void)
00119 {
00120         //duty cycle = 37,5%
00121         TIM_Cmd(LPC_TIM2,DISABLE);
00122         TIM_ClearIntPending(LPC_TIM2, TIM_MR0_INT);
00123         TIM_ResetCounter(LPC_TIM2);
00124         if((PWM2_State == ENABLE))
00125         {
00126                 TIM_UpdateMatchValue(LPC_TIM2,0, 300);
00127                 PWM2_State = DISABLE;
00128         }
00129         else
00130         {
00131                 TIM_UpdateMatchValue(LPC_TIM2,0, 500);
00132                 PWM2_State = ENABLE;
00133         }
00134         TIM_Cmd(LPC_TIM2,ENABLE);
00135 }
00136
00137 /*********************************************************************/
00142 void TIMER3_IRQHandler(void)
00143 {
00144         //duty cycle = 50%
00145         TIM_Cmd(LPC_TIM3,DISABLE);
00146         TIM_ClearIntPending(LPC_TIM3, TIM_MR0_INT);
00147         TIM_ResetCounter(LPC_TIM3);
00148         TIM_Cmd(LPC_TIM3,ENABLE);
00149 }
00150
00151
00152 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00153 /*********************************************************************/
00158 void print_menu(void)
00159 {
00160         _DBG(menu);
00161 }
00162
00163
00164 /*-------------------------MAIN FUNCTION------------------------------*/
00165 /*********************************************************************/
00170 int c_entry (void)
00171 {
00172         PINSEL_CFG_Type PinCfg;
00173
00174         /* Initialize debug via UART0
00175          * – 115200bps
00176          * – 8 data bit
00177          * – No parity
00178          * – 1 stop bit
00179          * – No flow control
00180          */
00181         debug_frmwrk_init();
00182
00183         // print welcome screen
00184         print_menu();
00185
00186         /* Select pin:
00187          * P1.28: MAT0.0
00188          * P1.22: MAT1.0
00189          * P0.6:  MAT2.0
00190          * P0.10: MAT3.0
00191          */
00192         PinCfg.Funcnum = 3;
00193         PinCfg.OpenDrain = 0;
00194         PinCfg.Pinmode = 0;
00195         PinCfg.Portnum = 1;
00196         PinCfg.Pinnum = 28;
00197         PINSEL_ConfigPin(&PinCfg);
00198         PinCfg.Pinnum = 22;
00199         PINSEL_ConfigPin(&PinCfg);
00200         PinCfg.Portnum = 0;
00201         PinCfg.Pinnum = 6;
00202         PINSEL_ConfigPin(&PinCfg);
00203         PinCfg.Pinnum = 10;
00204         PINSEL_ConfigPin(&PinCfg);
00205
00206         // Initialize 4 timers, prescale count time of 100uS
00207         TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
00208         TIM_ConfigStruct.PrescaleValue  = 100;
00209
00210         TIM_Init(LPC_TIM0, TIM_TIMER_MODE,&TIM_ConfigStruct);
00211         TIM_Init(LPC_TIM1, TIM_TIMER_MODE,&TIM_ConfigStruct);
00212         TIM_Init(LPC_TIM2, TIM_TIMER_MODE,&TIM_ConfigStruct);
00213         TIM_Init(LPC_TIM3, TIM_TIMER_MODE,&TIM_ConfigStruct);
00214
00215         // Configure 4 match channels
00216         // use channel 0, MR0
00217         TIM_MatchConfigStruct.MatchChannel = 0;
00218         // Enable interrupt when MR0 matches the value in TC register
00219         TIM_MatchConfigStruct.IntOnMatch   = TRUE;
00220         //Enable reset on MR0: TIMER will reset if MR0 matches it
00221         TIM_MatchConfigStruct.ResetOnMatch = TRUE;
00222         //Stop on MR0 if MR0 matches it
00223         TIM_MatchConfigStruct.StopOnMatch  = FALSE;
00224         //Toggle MR0 pin if MR0 matches it
00225         TIM_MatchConfigStruct.ExtMatchOutputType = TIM_EXTMATCH_TOGGLE;
00226         // Set Match value
00227         TIM_MatchConfigStruct.MatchValue   = 700;
00228         // Set configuration for Tim_MatchConfig
00229         TIM_ConfigMatch(LPC_TIM0,&TIM_MatchConfigStruct);
00230         TIM_MatchConfigStruct.MatchValue   = 600;
00231         TIM_ConfigMatch(LPC_TIM1,&TIM_MatchConfigStruct);
00232         TIM_MatchConfigStruct.MatchValue   = 500;
00233         TIM_ConfigMatch(LPC_TIM2,&TIM_MatchConfigStruct);
00234         TIM_MatchConfigStruct.MatchValue   = 800;
00235         TIM_ConfigMatch(LPC_TIM3,&TIM_MatchConfigStruct);
00236
00237         /* preemption = 1, sub-priority = 1 */
00238         NVIC_SetPriority(TIMER0_IRQn, ((0x01<<3)|0x01));
00239         /* Enable interrupt for timer 0 */
00240         NVIC_EnableIRQ(TIMER0_IRQn);
00241         // To start timer 0
00242         TIM_Cmd(LPC_TIM0,ENABLE);
00243
00244         /* preemption = 1, sub-priority = 1 */
00245         NVIC_SetPriority(TIMER1_IRQn, ((0x01<<3)|0x02));
00246         /* Enable interrupt for timer 1 */
00247         NVIC_EnableIRQ(TIMER1_IRQn);
00248         // To start timer 1
00249         TIM_Cmd(LPC_TIM1,ENABLE);
00250
00251         /* preemption = 1, sub-priority = 1 */
00252         NVIC_SetPriority(TIMER2_IRQn, ((0x01<<3)|0x03));
00253         /* Enable interrupt for timer 1 */
00254         NVIC_EnableIRQ(TIMER2_IRQn);
00255         // To start timer 1
00256         TIM_Cmd(LPC_TIM2,ENABLE);
00257
00258         /* preemption = 1, sub-priority = 1 */
00259         NVIC_SetPriority(TIMER3_IRQn, ((0x01<<3)|0x04));
00260         /* Enable interrupt for timer 1 */
00261         NVIC_EnableIRQ(TIMER3_IRQn);
00262         // To start timer 1
00263         TIM_Cmd(LPC_TIM3,ENABLE);
00264
00265         while(1);
00266 }
00267
00268
00269 /* With ARM and GHS toolsets, the entry point is main() - this will
00270    allow the linker to generate wrapper code to setup stacks, allocate
00271    heap area, and initialize and copy code and data segments. For GNU
00272    toolsets, the entry point is through __start() in the crt0_gnu.asm
00273    file, and that startup code will setup stacks and data */
00274 int main(void)
00275 {
00276     return c_entry();
00277 }
00278
00279 #ifdef  DEBUG
00280 /*******************************************************************************
00281 * @brief                Reports the name of the source file and the source line number
00282 *                               where the CHECK_PARAM error has occurred.
00283 * @param[in]    file Pointer to the source file name
00284 * @param[in]    line assert_param error line source number
00285 * @return               None
00286 *******************************************************************************/
00287 void check_failed(uint8_t *file, uint32_t line)
00288 {
00289         /* User can add his own implementation to report the file name and line number,
00290          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00291
00292         /* Infinite loop */
00293         while(1);
00294 }
00295 #endif
00296
00297 /*
00298  * @}
00299  */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Single_Edge/pwm_single_edge.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWM/Single_Edge/pwm_single_edge.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          pwm_single_edge.c                               2010-05-21
00003 */
00026 #include "lpc17xx_pwm.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /*-------------------------MAIN FUNCTION------------------------------*/
00037 /*********************************************************************/
00042 int c_entry(void)
00043 {
00044         uint8_t temp, temp2;
00045         PWM_TIMERCFG_Type PWMCfgDat;
00046         PWM_MATCHCFG_Type PWMMatchCfgDat;
00047         PINSEL_CFG_Type PinCfg;
00048
00049         /* PWM block section -------------------------------------------- */
00050         /* Initialize PWM peripheral, timer mode
00051          * PWM prescale value = 1 (absolute value - tick value) */
00052         PWMCfgDat.PrescaleOption = PWM_TIMER_PRESCALE_TICKVAL;
00053         PWMCfgDat.PrescaleValue = 1;
00054         PWM_Init(LPC_PWM1, PWM_MODE_TIMER, (void *) &PWMCfgDat);
00055
00056         /*
00057          * Initialize PWM pin connect
00058          */
00059         PinCfg.Funcnum = 1;
00060         PinCfg.OpenDrain = 0;
00061         PinCfg.Pinmode = 0;
00062         PinCfg.Portnum = 2;
00063         for (temp = 0; temp <= 6; temp++){
00064                 PinCfg.Pinnum = temp;
00065                 PINSEL_ConfigPin(&PinCfg);
00066         }
00067
00068
00069         /* Set match value for PWM match channel 0 = 256, update immediately */
00070         PWM_MatchUpdate(LPC_PWM1, 0, 256, PWM_MATCH_UPDATE_NOW);
00071         /* PWM Timer/Counter will be reset when channel 0 matching
00072          * no interrupt when match
00073          * no stop when match */
00074         PWMMatchCfgDat.IntOnMatch = DISABLE;
00075         PWMMatchCfgDat.MatchChannel = 0;
00076         PWMMatchCfgDat.ResetOnMatch = ENABLE;
00077         PWMMatchCfgDat.StopOnMatch = DISABLE;
00078         PWM_ConfigMatch(LPC_PWM1, &PWMMatchCfgDat);
00079
00080         /* Configure each PWM channel: --------------------------------------------- */
00081         /* - Single edge
00082          * - PWM Duty on each PWM channel determined by
00083          * the match on channel 0 to the match of that match channel.
00084          * Example: PWM Duty on PWM channel 1 determined by
00085          * the match on channel 0 to the match of match channel 1.
00086          */
00087
00088         /* Configure PWM channel edge option
00089          * Note: PWM Channel 1 is in single mode as default state and
00090          * can not be changed to double edge mode */
00091         for (temp = 2; temp < 7; temp++)
00092         {
00093                 PWM_ChannelConfig(LPC_PWM1, temp, PWM_CHANNEL_SINGLE_EDGE);
00094         }
00095
00096
00097         /* Configure match value for each match channel */
00098         temp2 = 10;
00099         for (temp = 1; temp < 7; temp++)
00100         {
00101                 /* Set up match value */
00102                 PWM_MatchUpdate(LPC_PWM1, temp, temp2, PWM_MATCH_UPDATE_NOW);
00103                 /* Configure match option */
00104                 PWMMatchCfgDat.IntOnMatch = DISABLE;
00105                 PWMMatchCfgDat.MatchChannel = temp;
00106                 PWMMatchCfgDat.ResetOnMatch = DISABLE;
00107                 PWMMatchCfgDat.StopOnMatch = DISABLE;
00108                 PWM_ConfigMatch(LPC_PWM1, &PWMMatchCfgDat);
00109                 /* Enable PWM Channel Output */
00110                 PWM_ChannelCmd(LPC_PWM1, temp, ENABLE);
00111                 /* Increase match value by 10 */
00112                 temp2 += 10;
00113         }
00114
00115         /* Reset and Start counter */
00116         PWM_ResetCounter(LPC_PWM1);
00117         PWM_CounterCmd(LPC_PWM1, ENABLE);
00118
00119         /* Start PWM now */
00120         PWM_Cmd(LPC_PWM1, ENABLE);
00121
00122     /* Loop forever */
00123     while(1);
00124 }
00125
00126 /* With ARM and GHS toolsets, the entry point is main() - this will
00127    allow the linker to generate wrapper code to setup stacks, allocate
00128    heap area, and initialize and copy code and data segments. For GNU
00129    toolsets, the entry point is through __start() in the crt0_gnu.asm
00130    file, and that startup code will setup stacks and data */
00131 int main(void)
00132 {
00133     return c_entry();
00134 }
00135
00136
00137 #ifdef  DEBUG
00138 /*******************************************************************************
00139 * @brief                Reports the name of the source file and the source line number
00140 *                               where the CHECK_PARAM error has occurred.
00141 * @param[in]    file Pointer to the source file name
00142 * @param[in]    line assert_param error line source number
00143 * @return               None
00144 *******************************************************************************/
00145 void check_failed(uint8_t *file, uint32_t line)
00146 {
00147         /* User can add his own implementation to report the file name and line number,
00148          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00149
00150         /* Infinite loop */
00151         while(1);
00152 }
00153 #endif
00154
00155 /*
00156  * @}
00157  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/QEI/QEI_Velo/qei_test_velo.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/QEI/QEI_Velo/qei_test_velo.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          qei_test.c                                              2010-05-21
00003 */
00026 #include "lpc17xx_qei.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_timer.h"
00029 #include "lpc17xx_clkpwr.h"
00030 #include "debug_frmwrk.h"
00031 #include "lpc17xx_pinsel.h"
00032 #include "lpc17xx_gpio.h"
00033
00034
00035 /* Example group ----------------------------------------------------------- */
00041 /************************** PRIVATE DEFINITIONS *************************/
00043 #define VIRTUAL_QEI_SIGNAL      1
00044
00050 #define SIGNAL_MODE             0
00051
00057 #define CAP_MODE                        1
00058
00060 #define CAP_PERIOD                      250000UL
00061
00063 #define DISP_TIME                       3000000UL
00064
00065 #define MAX_CAP_TIMES           (DISP_TIME/CAP_PERIOD)
00066
00067 #define ENC_RES                         2048UL
00070 /* In case of using Virtual QEI signal, these following macros must be defined */
00071 #ifdef VIRTUAL_QEI_SIGNAL
00072 /* Max velocity */
00073 #define MAX_VEL                         600UL
00074 #if CAP_MODE
00075 #define COUNT_MODE                      4
00076 #else
00077 #define COUNT_MODE                      2
00078 #endif
00079 #endif
00080
00081 /* Pin on Port 0 assigned to Phase A */
00082 #define PHASE_A_PIN                     (1<<19)
00083 /* Pin on Port 0 assigned to Phase B */
00084 #define PHASE_B_PIN                     (1<<21)
00085
00086 /************************** PRIVATE VARIABLES *************************/
00087 #ifdef VIRTUAL_QEI_SIGNAL
00088
00094 __IO uint8_t PhaseCnt;
00095 #endif /* VIRTUAL_QEI_SIGNAL */
00096
00098 __IO uint64_t VeloAcc;
00100 __IO uint32_t VeloCapCnt;
00102 __IO FlagStatus VeloAccFlag;
00103
00104
00105 /* Pin Configuration selection must be defined in structure following:
00106  * - Port Number,
00107  * - Pin Number,
00108  * - Function Number,
00109  * - Pin Mode,
00110  * - Open Drain
00111  */
00112
00114 const PINSEL_CFG_Type qei_phaA_pin[1] = {{1, 20, 1, 0, 0}};
00116 const PINSEL_CFG_Type qei_phaB_pin[1] = {{1, 23, 1, 0, 0}};
00118 const PINSEL_CFG_Type qei_idx_pin[1] = {{1, 24, 1, 0, 0}};
00119
00120
00121 /************************** PRIVATE FUNCTIONS *************************/
00122 #ifdef VIRTUAL_QEI_SIGNAL
00123 void VirtualQEISignal_Init(void);
00124 void TIMER0_IRQHandler(void);
00125 #endif
00126 void QEI_IRQHandler(void);
00127
00128
00129 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00130 #ifdef VIRTUAL_QEI_SIGNAL
00131 /*********************************************************************/
00137 void TIMER0_IRQHandler(void)
00138 {
00139         if (TIM_GetIntStatus(LPC_TIM0,TIM_MR0_INT)) {
00140
00141                 // Set/Clear phase A/B pin corresponding to their state
00142                 switch (PhaseCnt) {
00143                 case 0:
00144                         GPIO_SetValue(0,PHASE_A_PIN);
00145                         GPIO_ClearValue(0,PHASE_B_PIN);
00146                         break;
00147                 case 1:
00148                         GPIO_SetValue(0, PHASE_A_PIN | PHASE_B_PIN);
00149                         break;
00150                 case 2:
00151                         GPIO_SetValue(0, PHASE_B_PIN);
00152                         GPIO_ClearValue(0, PHASE_A_PIN);
00153                         break;
00154                 case 3:
00155                         GPIO_ClearValue(0, PHASE_A_PIN | PHASE_B_PIN);
00156                         break;
00157
00158                 default:
00159                         break;
00160                 }
00161
00162                 // update PhaseCnt
00163                 PhaseCnt = (PhaseCnt + 1) & 0x03;
00164
00165                 // Clear Timer 0 match interrupt pending
00166                 TIM_ClearIntPending(LPC_TIM0,TIM_MR0_INT);
00167         }
00168 }
00169 #endif
00170 /*********************************************************************/
00176 void QEI_IRQHandler(void)
00177 {
00178         // Check whether if velocity timer overflow
00179         if (QEI_GetIntStatus(LPC_QEI, QEI_INTFLAG_TIM_Int) == SET) {
00180                 if (VeloAccFlag == RESET) {
00181
00182                         // Get current velocity captured and update to accumulate
00183                         VeloAcc += QEI_GetVelocityCap(LPC_QEI);
00184
00185                         // Update Velocity capture times
00186                         VeloAccFlag = ((VeloCapCnt++) >= MAX_CAP_TIMES) ? SET : RESET;
00187                 }
00188                 // Reset Interrupt flag pending
00189                 QEI_IntClear(LPC_QEI, QEI_INTFLAG_TIM_Int);
00190         }
00191
00192         // Check whether if direction change occurred
00193         if (QEI_GetIntStatus(LPC_QEI, QEI_INTFLAG_DIR_Int) == SET) {
00194                 // Print direction status
00195                 _DBG("Direction has changed: ");
00196                 _DBG_((QEI_GetStatus(LPC_QEI, QEI_STATUS_DIR) == SET) ? "1" : "0");
00197                 // Reset Interrupt flag pending
00198                 QEI_IntClear(LPC_QEI, QEI_INTFLAG_DIR_Int);
00199         }
00200 }
00201
00202 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00203 #ifdef VIRTUAL_QEI_SIGNAL
00204 /*********************************************************************/
00226 void VirtualQEISignal_Init(void)
00227 {
00228         uint32_t pclk;
00229         TIM_TIMERCFG_Type TimerConfig;
00230         TIM_MATCHCFG_Type TimerMatchConfig;
00231
00232         _DBG_("Initializing Virtual QEI signal...");
00233
00234         // Initialize timer 0, Prescale value in tick value option with tick value = 1
00235         TimerConfig.PrescaleOption = TIM_PRESCALE_TICKVAL;
00236         TimerConfig.PrescaleValue       = 1;
00237         TIM_Init(LPC_TIM0, TIM_TIMER_MODE,&TimerConfig);
00238
00239         // Get actual peripheral clock of timer 0
00240         pclk = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_TIMER0);
00241         pclk = pclk / ((MAX_VEL * ENC_RES * COUNT_MODE) / 60 );
00242         // Set match for match channel 0
00243         TimerMatchConfig.MatchChannel = 0;
00244         TimerMatchConfig.MatchValue = pclk;
00245         TimerMatchConfig.IntOnMatch = ENABLE;
00246         TimerMatchConfig.ExtMatchOutputType = 3;
00247         TimerMatchConfig.ResetOnMatch = ENABLE;
00248         TimerMatchConfig.StopOnMatch = DISABLE;
00249         TIM_ConfigMatch(LPC_TIM0, &TimerMatchConfig);
00250
00251         // Reconfigures GPIO for pin used as Phase A and Phase B output
00252         GPIO_SetDir(0, PHASE_A_PIN | PHASE_B_PIN, 1);
00253         // Set default State after initializing
00254         GPIO_ClearValue(0, PHASE_A_PIN | PHASE_B_PIN);
00255         // Reset Phase Counter
00256         PhaseCnt = 0;
00257
00258         /* preemption = 1, sub-priority = 2 */
00259         NVIC_SetPriority(TIMER0_IRQn, ((0x02<<3)|0x01));
00260         /* Enable interrupt for timer 0 */
00261         NVIC_EnableIRQ(TIMER0_IRQn);
00262         // To start timer 0
00263         TIM_Cmd(LPC_TIM0,ENABLE);
00264 }
00265 #endif /* VIRTUAL_QEI_SIGNAL */
00266
00267 /*-------------------------MAIN FUNCTION------------------------------*/
00268 /*********************************************************************/
00273 int c_entry(void)
00274 {
00275         PINSEL_CFG_Type PinCfg;
00276         QEI_CFG_Type QEIConfig;
00277         QEI_RELOADCFG_Type ReloadConfig;
00278         uint32_t rpm, averageVelo;
00279
00280         /* Initialize debug via UART0
00281          * – 115200bps
00282          * – 8 data bit
00283          * – No parity
00284          * – 1 stop bit
00285          * – No flow control
00286          */
00287         debug_frmwrk_init();
00288         _DBG_("Hello QEI ...");
00289         _DBG("Speed will be sampled every each ");
00290         _DBD32(CAP_PERIOD);
00291         _DBG_(" us");
00292         _DBG_("This value will be accumulated to display as RPM after every each");
00293         _DBD32(DISP_TIME);
00294         _DBG_(" us");
00295
00296         /* Initialize QEI configuration structure to default value */
00297 #if CAP_MODE
00298         QEIConfig.CaptureMode = QEI_CAPMODE_4X;
00299 #else
00300         QEIConfig.CaptureMode = QEI_CAPMODE_2X;
00301 #endif
00302         QEIConfig.DirectionInvert = QEI_DIRINV_NONE;
00303         QEIConfig.InvertIndex = QEI_INVINX_NONE;
00304 #if SIGNAL_MODE
00305         QEIConfig.SignalMode = QEI_SIGNALMODE_CLKDIR;
00306 #else
00307         QEIConfig.SignalMode = QEI_SIGNALMODE_QUAD;
00308 #endif
00309
00310         /* Set QEI function pin
00311          * P1.20: MCI0
00312          * P1.23: MCI1
00313          * P1.24: MCI2
00314          */
00315         PinCfg.Funcnum = 1;
00316         PinCfg.OpenDrain = 0;
00317         PinCfg.Pinmode = 0;
00318         PinCfg.Portnum = 1;
00319         PinCfg.Pinnum = 20;
00320         PINSEL_ConfigPin(&PinCfg);
00321         PinCfg.Pinnum = 23;
00322         PINSEL_ConfigPin(&PinCfg);
00323         PinCfg.Pinnum = 24;
00324         PINSEL_ConfigPin(&PinCfg);
00325
00326         /* Initialize QEI peripheral with given configuration structure */
00327         QEI_Init(LPC_QEI, &QEIConfig);
00328
00329         // Set timer reload value for  QEI that used to set velocity capture period
00330         ReloadConfig.ReloadOption = QEI_TIMERRELOAD_USVAL;
00331         ReloadConfig.ReloadValue = CAP_PERIOD;
00332         QEI_SetTimerReload(LPC_QEI, &ReloadConfig);
00333
00334         /* preemption = 1, sub-priority = 1 */
00335         NVIC_SetPriority(QEI_IRQn, ((0x01<<3)|0x01));
00336         /* Enable interrupt for QEI  */
00337         NVIC_EnableIRQ(QEI_IRQn);
00338
00339         // Reset VeloAccFlag
00340         VeloAccFlag = RESET;
00341         // Reset value of Acc and Acc count to default
00342         VeloAcc = 0;
00343         VeloCapCnt = 0;
00344
00345         // Enable interrupt for velocity Timer overflow for capture velocity into Acc */
00346         QEI_IntCmd(LPC_QEI, QEI_INTFLAG_TIM_Int, ENABLE);
00347         // Enable interrupt for direction change */
00348         QEI_IntCmd(LPC_QEI, QEI_INTFLAG_DIR_Int, ENABLE);
00349
00350 #ifdef VIRTUAL_QEI_SIGNAL
00351         // This used for generating virtual QEI signal
00352         VirtualQEISignal_Init();
00353 #endif
00354
00355         // Main loop
00356         while (1) {
00357
00358                 // Check VeloAccFlag continuously
00359                 if (VeloAccFlag == SET) {
00360                         // Get Acc
00361                         averageVelo = (uint32_t)(VeloAcc / VeloCapCnt);
00362                         rpm = QEI_CalculateRPM(LPC_QEI, averageVelo, ENC_RES);
00363                         // Disp the result
00364                         _DBG("Sampling Speed: ");
00365                         _DBD32(rpm);
00366                         _DBG_("RPM");
00367                         // Reset VeloAccFlag
00368                         VeloAccFlag = RESET;
00369                         // Reset value of Acc and Acc count to default
00370                         VeloAcc = 0;
00371                         VeloCapCnt = 0;
00372                 }
00373         }
00374 }
00375
00376 /* With ARM and GHS toolsets, the entry point is main() - this will
00377    allow the linker to generate wrapper code to setup stacks, allocate
00378    heap area, and initialize and copy code and data segments. For GNU
00379    toolsets, the entry point is through __start() in the crt0_gnu.asm
00380    file, and that startup code will setup stacks and data */
00381 int main(void)
00382 {
00383     return c_entry();
00384 }
00385
00386
00387 #ifdef  DEBUG
00388 /*******************************************************************************
00389 * @brief                Reports the name of the source file and the source line number
00390 *                               where the CHECK_PARAM error has occurred.
00391 * @param[in]    file Pointer to the source file name
00392 * @param[in]    line assert_param error line source number
00393 * @return               None
00394 *******************************************************************************/
00395 void check_failed(uint8_t *file, uint32_t line)
00396 {
00397         /* User can add his own implementation to report the file name and line number,
00398          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00399
00400         /* Infinite loop */
00401         while(1);
00402 }
00403 #endif
00404
00405 /*
00406  * @}
00407  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.c
Go to the documentation of this file.
00001
00033 /*
00034  * Copyright (c) 2002-2003, Adam Dunkels.
00035  * All rights reserved.
00036  *
00037  * Redistribution and use in source and binary forms, with or without
00038  * modification, are permitted provided that the following conditions
00039  * are met:
00040  * 1. Redistributions of source code must retain the above copyright
00041  *    notice, this list of conditions and the following disclaimer.
00042  * 2. Redistributions in binary form must reproduce the above copyright
00043  *    notice, this list of conditions and the following disclaimer in the
00044  *    documentation and/or other materials provided with the distribution.
00045  * 3. The name of the author may not be used to endorse or promote
00046  *    products derived from this software without specific prior
00047  *    written permission.
00048  *
00049  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00050  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00051  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00052  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00053  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00054  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00055  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00056  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00057  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00058  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00059  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00060  *
00061  * This file is part of the uIP TCP/IP stack.
00062  *
00063  * $Id: resolv.c,v 1.5 2006/06/11 21:46:37 adam Exp $
00064  *
00065  */
00066
00067 #include "resolv.h"
00068 #include "uip.h"
00069
00070 #include <string.h>
00071
00072 #ifndef NULL
00073 #define NULL (void *)0
00074 #endif /* NULL */
00075
00077 #define MAX_RETRIES 8
00078
00080 struct dns_hdr {
00081   u16_t id;
00082   u8_t flags1, flags2;
00083 #define DNS_FLAG1_RESPONSE        0x80
00084 #define DNS_FLAG1_OPCODE_STATUS   0x10
00085 #define DNS_FLAG1_OPCODE_INVERSE  0x08
00086 #define DNS_FLAG1_OPCODE_STANDARD 0x00
00087 #define DNS_FLAG1_AUTHORATIVE     0x04
00088 #define DNS_FLAG1_TRUNC           0x02
00089 #define DNS_FLAG1_RD              0x01
00090 #define DNS_FLAG2_RA              0x80
00091 #define DNS_FLAG2_ERR_MASK        0x0f
00092 #define DNS_FLAG2_ERR_NONE        0x00
00093 #define DNS_FLAG2_ERR_NAME        0x03
00094   u16_t numquestions;
00095   u16_t numanswers;
00096   u16_t numauthrr;
00097   u16_t numextrarr;
00098 };
00099
00101 struct dns_answer {
00102   /* DNS answer record starts with either a domain name or a pointer
00103      to a name already present somewhere in the packet. */
00104   u16_t type;
00105   u16_t class;
00106   u16_t ttl[2];
00107   u16_t len;
00108   uip_ipaddr_t ipaddr;
00109 };
00110
00111 struct namemap {
00112 #define STATE_UNUSED 0
00113 #define STATE_NEW    1
00114 #define STATE_ASKING 2
00115 #define STATE_DONE   3
00116 #define STATE_ERROR  4
00117   u8_t state;
00118   u8_t tmr;
00119   u8_t retries;
00120   u8_t seqno;
00121   u8_t err;
00122   char name[32];
00123   uip_ipaddr_t ipaddr;
00124 };
00125
00126 #ifndef UIP_CONF_RESOLV_ENTRIES
00127 #define RESOLV_ENTRIES 4
00128 #else /* UIP_CONF_RESOLV_ENTRIES */
00129 #define RESOLV_ENTRIES UIP_CONF_RESOLV_ENTRIES
00130 #endif /* UIP_CONF_RESOLV_ENTRIES */
00131
00132
00133 static struct namemap names[RESOLV_ENTRIES];
00134
00135 static u8_t seqno;
00136
00137 static struct uip_udp_conn *resolv_conn = NULL;
00138
00139
00140 /*---------------------------------------------------------------------------*/
00146 /*---------------------------------------------------------------------------*/
00147 static unsigned char *
00148 parse_name(unsigned char *query)
00149 {
00150   unsigned char n;
00151
00152   do {
00153     n = *query++;
00154
00155     while(n > 0) {
00156       /*      printf("%c", *query);*/
00157       ++query;
00158       --n;
00159     };
00160     /*    printf(".");*/
00161   } while(*query != 0);
00162   /*  printf("\n");*/
00163   return query + 1;
00164 }
00165 /*---------------------------------------------------------------------------*/
00170 /*---------------------------------------------------------------------------*/
00171 static void
00172 check_entries(void)
00173 {
00174   register struct dns_hdr *hdr;
00175   char *query, *nptr, *nameptr;
00176   static u8_t i;
00177   static u8_t n;
00178   register struct namemap *namemapptr;
00179
00180   for(i = 0; i < RESOLV_ENTRIES; ++i) {
00181     namemapptr = &names[i];
00182     if(namemapptr->state == STATE_NEW ||
00183        namemapptr->state == STATE_ASKING) {
00184       if(namemapptr->state == STATE_ASKING) {
00185         if(--namemapptr->tmr == 0) {
00186           if(++namemapptr->retries == MAX_RETRIES) {
00187             namemapptr->state = STATE_ERROR;
00188             resolv_found(namemapptr->name, NULL);
00189             continue;
00190           }
00191           namemapptr->tmr = namemapptr->retries;
00192         } else {
00193           /*      printf("Timer %d\n", namemapptr->tmr);*/
00194           /* Its timer has not run out, so we move on to next
00195              entry. */
00196           continue;
00197         }
00198       } else {
00199         namemapptr->state = STATE_ASKING;
00200         namemapptr->tmr = 1;
00201         namemapptr->retries = 0;
00202       }
00203       hdr = (struct dns_hdr *)uip_appdata;
00204       memset(hdr, 0, sizeof(struct dns_hdr));
00205       hdr->id = htons(i);
00206       hdr->flags1 = DNS_FLAG1_RD;
00207       hdr->numquestions = HTONS(1);
00208       query = (char *)uip_appdata + 12;
00209       nameptr = namemapptr->name;
00210       --nameptr;
00211       /* Convert hostname into suitable query format. */
00212       do {
00213         ++nameptr;
00214         nptr = query;
00215         ++query;
00216         for(n = 0; *nameptr != '.' && *nameptr != 0; ++nameptr) {
00217           *query = *nameptr;
00218           ++query;
00219           ++n;
00220         }
00221         *nptr = n;
00222       } while(*nameptr != 0);
00223       {
00224         static unsigned char endquery[] =
00225           {0,0,1,0,1};
00226         memcpy(query, endquery, 5);
00227       }
00228       uip_udp_send((unsigned char)(query + 5 - (char *)uip_appdata));
00229       break;
00230     }
00231   }
00232 }
00233 /*---------------------------------------------------------------------------*/
00237 /*---------------------------------------------------------------------------*/
00238 static void
00239 newdata(void)
00240 {
00241   char *nameptr;
00242   struct dns_answer *ans;
00243   struct dns_hdr *hdr;
00244   static u8_t nquestions, nanswers;
00245   static u8_t i;
00246   register struct namemap *namemapptr;
00247
00248   hdr = (struct dns_hdr *)uip_appdata;
00249   /*  printf("ID %d\n", htons(hdr->id));
00250       printf("Query %d\n", hdr->flags1 & DNS_FLAG1_RESPONSE);
00251       printf("Error %d\n", hdr->flags2 & DNS_FLAG2_ERR_MASK);
00252       printf("Num questions %d, answers %d, authrr %d, extrarr %d\n",
00253       htons(hdr->numquestions),
00254       htons(hdr->numanswers),
00255       htons(hdr->numauthrr),
00256       htons(hdr->numextrarr));
00257   */
00258
00259   /* The ID in the DNS header should be our entry into the name
00260      table. */
00261   i = htons(hdr->id);
00262   namemapptr = &names[i];
00263   if(i < RESOLV_ENTRIES &&
00264      namemapptr->state == STATE_ASKING) {
00265
00266     /* This entry is now finished. */
00267     namemapptr->state = STATE_DONE;
00268     namemapptr->err = hdr->flags2 & DNS_FLAG2_ERR_MASK;
00269
00270     /* Check for error. If so, call callback to inform. */
00271     if(namemapptr->err != 0) {
00272       namemapptr->state = STATE_ERROR;
00273       resolv_found(namemapptr->name, NULL);
00274       return;
00275     }
00276
00277     /* We only care about the question(s) and the answers. The authrr
00278        and the extrarr are simply discarded. */
00279     nquestions = htons(hdr->numquestions);
00280     nanswers = htons(hdr->numanswers);
00281
00282     /* Skip the name in the question. XXX: This should really be
00283        checked agains the name in the question, to be sure that they
00284        match. */
00285     nameptr = parse_name((char *)uip_appdata + 12) + 4;
00286
00287     while(nanswers > 0) {
00288       /* The first byte in the answer resource record determines if it
00289          is a compressed record or a normal one. */
00290       if(*nameptr & 0xc0) {
00291         /* Compressed name. */
00292         nameptr +=2;
00293         /*      printf("Compressed anwser\n");*/
00294       } else {
00295         /* Not compressed name. */
00296         nameptr = parse_name((char *)nameptr);
00297       }
00298
00299       ans = (struct dns_answer *)nameptr;
00300       /*      printf("Answer: type %x, class %x, ttl %x, length %x\n",
00301              htons(ans->type), htons(ans->class), (htons(ans->ttl[0])
00302              << 16) | htons(ans->ttl[1]), htons(ans->len));*/
00303
00304       /* Check for IP address type and Internet class. Others are
00305          discarded. */
00306       if(ans->type == HTONS(1) &&
00307          ans->class == HTONS(1) &&
00308          ans->len == HTONS(4)) {
00309         /*      printf("IP address %d.%d.%d.%d\n",
00310                htons(ans->ipaddr[0]) >> 8,
00311                htons(ans->ipaddr[0]) & 0xff,
00312                htons(ans->ipaddr[1]) >> 8,
00313                htons(ans->ipaddr[1]) & 0xff);*/
00314         /* XXX: we should really check that this IP address is the one
00315            we want. */
00316         namemapptr->ipaddr[0] = ans->ipaddr[0];
00317         namemapptr->ipaddr[1] = ans->ipaddr[1];
00318
00319         resolv_found(namemapptr->name, namemapptr->ipaddr);
00320         return;
00321       } else {
00322         nameptr = nameptr + 10 + htons(ans->len);
00323       }
00324       --nanswers;
00325     }
00326   }
00327
00328 }
00329 /*---------------------------------------------------------------------------*/
00333 /*---------------------------------------------------------------------------*/
00334 void
00335 resolv_appcall(void)
00336 {
00337   if(uip_udp_conn->rport == HTONS(53)) {
00338     if(uip_poll()) {
00339       check_entries();
00340     }
00341     if(uip_newdata()) {
00342       newdata();
00343     }
00344   }
00345 }
00346 /*---------------------------------------------------------------------------*/
00352 /*---------------------------------------------------------------------------*/
00353 void
00354 resolv_query(char *name)
00355 {
00356   static u8_t i;
00357   static u8_t lseq, lseqi;
00358   register struct namemap *nameptr;
00359
00360   lseq = lseqi = 0;
00361
00362   for(i = 0; i < RESOLV_ENTRIES; ++i) {
00363     nameptr = &names[i];
00364     if(nameptr->state == STATE_UNUSED) {
00365       break;
00366     }
00367     if(seqno - nameptr->seqno > lseq) {
00368       lseq = seqno - nameptr->seqno;
00369       lseqi = i;
00370     }
00371   }
00372
00373   if(i == RESOLV_ENTRIES) {
00374     i = lseqi;
00375     nameptr = &names[i];
00376   }
00377
00378   /*  printf("Using entry %d\n", i);*/
00379
00380   strcpy(nameptr->name, name);
00381   nameptr->state = STATE_NEW;
00382   nameptr->seqno = seqno;
00383   ++seqno;
00384 }
00385 /*---------------------------------------------------------------------------*/
00398 /*---------------------------------------------------------------------------*/
00399 u16_t *
00400 resolv_lookup(char *name)
00401 {
00402   static u8_t i;
00403   struct namemap *nameptr;
00404
00405   /* Walk through the list to see if the name is in there. If it is
00406      not, we return NULL. */
00407   for(i = 0; i < RESOLV_ENTRIES; ++i) {
00408     nameptr = &names[i];
00409     if(nameptr->state == STATE_DONE &&
00410        strcmp(name, nameptr->name) == 0) {
00411       return nameptr->ipaddr;
00412     }
00413   }
00414   return NULL;
00415 }
00416 /*---------------------------------------------------------------------------*/
00424 /*---------------------------------------------------------------------------*/
00425 u16_t *
00426 resolv_getserver(void)
00427 {
00428   if(resolv_conn == NULL) {
00429     return NULL;
00430   }
00431   return resolv_conn->ripaddr;
00432 }
00433 /*---------------------------------------------------------------------------*/
00440 /*---------------------------------------------------------------------------*/
00441 void
00442 resolv_conf(u16_t *dnsserver)
00443 {
00444   if(resolv_conn != NULL) {
00445     uip_udp_remove(resolv_conn);
00446   }
00447
00448   resolv_conn = uip_udp_new(dnsserver, HTONS(53));
00449 }
00450 /*---------------------------------------------------------------------------*/
00454 /*---------------------------------------------------------------------------*/
00455 void
00456 resolv_init(void)
00457 {
00458   static u8_t i;
00459
00460   for(i = 0; i < RESOLV_ENTRIES; ++i) {
00461     names[i].state = STATE_DONE;
00462   }
00463
00464 }
00465 /*---------------------------------------------------------------------------*/
00466
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/resolv/resolv.h
Go to the documentation of this file.
00001
00011 /*
00012  * Copyright (c) 2002-2003, Adam Dunkels.
00013  * All rights reserved.
00014  *
00015  * Redistribution and use in source and binary forms, with or without
00016  * modification, are permitted provided that the following conditions
00017  * are met:
00018  * 1. Redistributions of source code must retain the above copyright
00019  *    notice, this list of conditions and the following disclaimer.
00020  * 2. Redistributions in binary form must reproduce the above copyright
00021  *    notice, this list of conditions and the following disclaimer in the
00022  *    documentation and/or other materials provided with the distribution.
00023  * 3. The name of the author may not be used to endorse or promote
00024  *    products derived from this software without specific prior
00025  *    written permission.
00026  *
00027  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00028  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00029  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00030  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00031  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00032  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00033  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00034  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00035  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00036  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00037  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00038  *
00039  * This file is part of the uIP TCP/IP stack.
00040  *
00041  * $Id: resolv.h,v 1.4 2006/06/11 21:46:37 adam Exp $
00042  *
00043  */
00044 #ifndef __RESOLV_H__
00045 #define __RESOLV_H__
00046
00047 typedef int uip_udp_appstate_t;
00048 void resolv_appcall(void);
00049 #define UIP_UDP_APPCALL resolv_appcall
00050
00051 #include "uipopt.h"
00052
00064 void resolv_found(char *name, u16_t *ipaddr);
00065
00066 /* Functions. */
00067 void resolv_conf(u16_t *dnsserver);
00068 u16_t *resolv_getserver(void);
00069 void resolv_init(void);
00070 u16_t *resolv_lookup(char *name);
00071 void resolv_query(char *name);
00072
00073 #endif /* __RESOLV_H__ */
00074
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RIT/Interrupt/rit_interrupt.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/RIT/Interrupt/rit_interrupt.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          rit_interrupt.c                                         2010-05-21
00003 */
00025 #include "lpc17xx_rit.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "debug_frmwrk.h"
00028 #include "lpc17xx_gpio.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINITIONS ***********************/
00037 #define MCB_LPC_1768
00038 //#define IAR_LPC_1768
00039
00040 #define TIME_INTERVAL   1000
00041
00042 /************************** PRIVATE VARIABLE ***********************/
00043 uint8_t menu[]=
00044         "********************************************************************************\n\r"
00045         "Hello NXP Semiconductors \n\r"
00046         " RIT demo \n\r"
00047         "\t - MCU: LPC17xx \n\r"
00048         "\t - Core: ARM CORTEX-M3 \n\r"
00049         "\t - Communicate via: UART0 - 115200 bps \n\r"
00050         " Use RIT as a timer to generate interrupt to turn on/off LED each 1s \n\r"
00051         "********************************************************************************\n\r";
00052 FunctionalState LEDStatus = ENABLE;
00053
00054 /************************** PRIVATE FUNCTION *************************/
00055 void RIT_IRQHandler(void);
00056
00057 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00058 /*********************************************************************/
00063 void RIT_IRQHandler(void)
00064 {
00065         RIT_GetIntStatus(LPC_RIT); //call this to clear interrupt flag
00066         if(LEDStatus == ENABLE)
00067         {
00068                 LEDStatus = DISABLE;
00069 #ifdef MCB_LPC_1768
00070                 //turn off LED
00071                 GPIO_ClearValue(2,(1<<2));
00072 #elif defined(IAR_LPC_1768)
00073                 GPIO_SetValue(1,(1<<25));
00074 #endif
00075         }
00076         else
00077         {
00078                 LEDStatus = ENABLE;
00079 #ifdef MCB_LPC_1768
00080                 //turn off LED
00081                 GPIO_SetValue(2,(1<<2));
00082 #elif defined(IAR_LPC_1768)
00083                 GPIO_ClearValue(1,(1<<25));
00084 #endif
00085         }
00086 }
00087
00088 /*-------------------------MAIN FUNCTION------------------------------*/
00089 /*********************************************************************/
00094 int c_entry (void) {
00095
00096         /* Initialize debug via UART0
00097          * – 115200bps
00098          * – 8 data bit
00099          * – No parity
00100          * – 1 stop bit
00101          * – No flow control
00102          */
00103         debug_frmwrk_init();
00104          _DBG(menu);
00105
00106         RIT_Init(LPC_RIT);
00107         /* Configure time_interval for RIT
00108          * In this case: time_interval = 1000 ms = 1s
00109          * So, RIT will generate interrupt each 1s
00110          */
00111         RIT_TimerConfig(LPC_RIT,TIME_INTERVAL);
00112
00113         _DBG("The time interval is: ");
00114         _DBD32(TIME_INTERVAL); _DBG_(" millisecond..");
00115
00116 #ifdef MCB_LPC_1768 /* Using LED2.2 for testing */
00117         //turn on LED2.2
00118         FIO_SetDir(2,(1<<2),1);
00119         FIO_SetValue(2,(1<<2));
00120 #elif defined(IAR_LPC_1768) /* Using LED1 (P1.25 for testing */
00121         FIO_SetDir(1,(1<<25),1);
00122         FIO_ClearValue(1,(1<<25));
00123 #endif
00124         NVIC_EnableIRQ(RIT_IRQn);
00125
00126         while(1);
00127 }
00128
00129 /* With ARM and GHS toolsets, the entry point is main() - this will
00130    allow the linker to generate wrapper code to setup stacks, allocate
00131    heap area, and initialize and copy code and data segments. For GNU
00132    toolsets, the entry point is through __start() in the crt0_gnu.asm
00133    file, and that startup code will setup stacks and data */
00134 int main(void)
00135 {
00136     return c_entry();
00137 }
00138
00139 #ifdef  DEBUG
00140 /*******************************************************************************
00141 * @brief                Reports the name of the source file and the source line number
00142 *                               where the CHECK_PARAM error has occurred.
00143 * @param[in]    file Pointer to the source file name
00144 * @param[in]    line assert_param error line source number
00145 * @return               None
00146 *******************************************************************************/
00147 void check_failed(uint8_t *file, uint32_t line)
00148 {
00149         /* User can add his own implementation to report the file name and line number,
00150          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00151
00152         /* Infinite loop */
00153         while(1);
00154 }
00155 #endif
00156
00157 /*
00158  * @}
00159  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/rs485_master.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Master/rs485_master.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          rs485_master.c                  2010-05-21
00003 */
00027 #include "lpc17xx_uart.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "lpc17xx_pinsel.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS *************************/
00038 // Slave Address
00039 #define SLAVE_ADDR_A 'A'
00040 #define SLAVE_ADDR_B 'B'
00041
00042 /* buffer size definition */
00043 #define UART_RING_BUFSIZE 256
00044
00045 /* Buf mask */
00046 #define __BUF_MASK (UART_RING_BUFSIZE-1)
00047 /* Check buf is full or not */
00048 #define __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
00049 /* Check buf will be full in next receiving or not */
00050 #define __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
00051 /* Check buf is empty */
00052 #define __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
00053 /* Reset buf */
00054 #define __BUF_RESET(bufidx)     (bufidx=0)
00055 #define __BUF_INCR(bufidx)      (bufidx=(bufidx+1)&__BUF_MASK)
00056
00057 /************************** PRIVATE VARIABLES *************************/
00058 uint8_t menu1[] = "Hello NXP Semiconductors \n\r";
00059 uint8_t menu2[] = "RS485 demo in Master mode \n\r";
00060 uint8_t send_menu[] = "Sending... \n\r";
00061 uint8_t recv_menu[] = "Receive: ";
00062 uint8_t p_err_menu[] = "Parity error \n\r";
00063 uint8_t f_err_menu[] = "Frame error \n\r";
00064 uint8_t nextline[] = "\n\r";
00065
00066 uint8_t slaveA_msg[] = "Msg A: Hello NXP";
00067 uint8_t slaveB_msg[] = "Msg B: Hello NXP";
00068 uint8_t terminator = 13;
00069
00070 /************************** PRIVATE TYPES *************************/
00072 typedef struct
00073 {
00074     __IO uint32_t tx_head;
00075     __IO uint32_t tx_tail;
00076     __IO uint32_t rx_head;
00077     __IO uint32_t rx_tail;
00078     __IO uint8_t  tx[UART_RING_BUFSIZE];
00079     __IO uint8_t  rx[UART_RING_BUFSIZE];
00080 } UART_RING_BUFFER_T;
00081
00082 /************************** PRIVATE VARIABLES *************************/
00083 // UART Ring buffer
00084 UART_RING_BUFFER_T rb;
00085
00086 /************************** PRIVATE FUNCTIONS *************************/
00087 void UART1_IRQHandler(void);
00088 void UART_IntReceive(void);
00089 void UART_IntErr(uint8_t bLSErrType);
00090
00091 uint32_t UARTReceive(LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen);
00092 void print_menu(void);
00093
00094
00095
00096 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00097 /*********************************************************************/
00102 void UART1_IRQHandler(void)
00103 {
00104         uint32_t intsrc, tmp, tmp1;
00105
00106         /* Determine the interrupt source */
00107         intsrc = UART_GetIntId(LPC_UART0);
00108         tmp = intsrc & UART_IIR_INTID_MASK;
00109
00110         // Receive Line Status
00111         if (tmp == UART_IIR_INTID_RLS){
00112                 // Check line status
00113                 tmp1 = UART_GetLineStatus(LPC_UART0);
00114                 // Mask out the Receive Ready and Transmit Holding empty status
00115                 tmp1 &= (UART_LSR_OE | UART_LSR_PE | UART_LSR_FE \
00116                                 | UART_LSR_BI | UART_LSR_RXFE);
00117                 // If any error exist
00118                 if (tmp1) {
00119                         UART_IntErr(tmp1);
00120                 }
00121         }
00122
00123         // Receive Data Available or Character time-out
00124         if ((tmp == UART_IIR_INTID_RDA) || (tmp == UART_IIR_INTID_CTI)){
00125                 UART_IntReceive();
00126         }
00127
00128 }
00129
00130 /********************************************************************/
00135 void UART_IntReceive(void)
00136 {
00137         uint8_t tmpc;
00138         uint32_t rLen;
00139
00140         while(1){
00141                 // Call UART read function in UART driver
00142                 rLen = UART_Receive((LPC_UART_TypeDef *)LPC_UART1, &tmpc, 1, NONE_BLOCKING);
00143                 // If data received
00144                 if (rLen){
00145                         /* Check if buffer is more space
00146                          * If no more space, remaining character will be trimmed out
00147                          */
00148                         if (!__BUF_IS_FULL(rb.rx_head,rb.rx_tail)){
00149                                 rb.rx[rb.rx_head] = tmpc;
00150                                 __BUF_INCR(rb.rx_head);
00151                         }
00152                 }
00153                 // no more data
00154                 else {
00155                         break;
00156                 }
00157         }
00158 }
00159
00160
00161 /*********************************************************************/
00166 void UART_IntErr(uint8_t bLSErrType)
00167 {
00168         if (bLSErrType & UART_LSR_PE){
00169                 UART_Send(LPC_UART0, p_err_menu, sizeof(p_err_menu), BLOCKING);
00170         }
00171
00172         if (bLSErrType & UART_LSR_FE){
00173                 UART_Send(LPC_UART0, f_err_menu, sizeof(f_err_menu), BLOCKING);
00174         }
00175 }
00176
00177 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00178 /*********************************************************************/
00186 uint32_t UARTReceive(LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
00187 {
00188     uint8_t *data = (uint8_t *) rxbuf;
00189     uint32_t bytes = 0;
00190
00191         /* Temporarily lock out UART receive interrupts during this
00192            read so the UART receive interrupt won't cause problems
00193            with the index values */
00194         UART_IntConfig(UARTPort, UART_INTCFG_RBR, DISABLE);
00195
00196         /* Loop until receive buffer ring is empty or
00197                 until max_bytes expires */
00198         while ((buflen > 0) && (!(__BUF_IS_EMPTY(rb.rx_head, rb.rx_tail))))
00199         {
00200                 /* Read data from ring buffer into user buffer */
00201                 *data = rb.rx[rb.rx_tail];
00202                 data++;
00203
00204                 /* Update tail pointer */
00205                 __BUF_INCR(rb.rx_tail);
00206
00207                 /* Increment data count and decrement buffer size count */
00208                 bytes++;
00209                 buflen--;
00210         }
00211
00212         /* Re-enable UART interrupts */
00213         UART_IntConfig(UARTPort, UART_INTCFG_RBR, ENABLE);
00214
00215     return bytes;
00216 }
00217
00218 /*********************************************************************/
00223 void print_menu(void)
00224 {
00225         UART_Send(LPC_UART0, menu1, sizeof(menu1), BLOCKING);
00226         UART_Send(LPC_UART0, menu2, sizeof(menu2), BLOCKING);
00227 }
00228
00229
00230
00231 /*-------------------------MAIN FUNCTION------------------------------*/
00232 /*********************************************************************/
00237 int c_entry(void)
00238 {
00239         // UART Configuration structure variable
00240         UART_CFG_Type UARTConfigStruct;
00241         // UART FIFO configuration Struct variable
00242         UART_FIFO_CFG_Type UARTFIFOConfigStruct;
00243         // Pin configuration
00244         PINSEL_CFG_Type PinCfg;
00245         // RS485 configuration
00246         UART1_RS485_CTRLCFG_Type rs485cfg;
00247         // Temp. data
00248         uint32_t idx, len;
00249         uint8_t buffer[10];
00250         int32_t exit_flag, addr_toggle;
00251
00252         // UART0 section ----------------------------------------------------
00253         /*
00254          * Initialize UART0 pin connect
00255          */
00256         PinCfg.Funcnum = 1;
00257         PinCfg.OpenDrain = 0;
00258         PinCfg.Pinmode = 0;
00259         PinCfg.Pinnum = 2;
00260         PinCfg.Portnum = 0;
00261         PINSEL_ConfigPin(&PinCfg);
00262         PinCfg.Pinnum = 3;
00263         PINSEL_ConfigPin(&PinCfg);
00264
00265         /* Initialize UART Configuration parameter structure to default state:
00266          * Baudrate = 115200 bps
00267          * 8 data bit
00268          * 1 Stop bit
00269          * None parity
00270          */
00271         UART_ConfigStructInit(&UARTConfigStruct);
00272         UARTConfigStruct.Baud_rate = 115200;
00273
00274         // Initialize UART0 peripheral with given to corresponding parameter
00275         UART_Init(LPC_UART0, &UARTConfigStruct);
00276
00277         /* Initialize FIFOConfigStruct to default state:
00278          *                              - FIFO_DMAMode = DISABLE
00279          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00280          *                              - FIFO_ResetRxBuf = ENABLE
00281          *                              - FIFO_ResetTxBuf = ENABLE
00282          *                              - FIFO_State = ENABLE
00283          */
00284         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00285
00286         // Initialize FIFO for UART0 peripheral
00287         UART_FIFOConfig(LPC_UART0, &UARTFIFOConfigStruct);
00288
00289         // Enable UART Transmit
00290         UART_TxCmd(LPC_UART0, ENABLE);
00291
00292         // print welcome screen
00293         print_menu();
00294
00295
00296         // UART1 - RS485 section -------------------------------------------------
00297         /*
00298          * Initialize UART1 pin connect
00299          */
00300         PinCfg.Funcnum = 2;
00301         PinCfg.OpenDrain = 0;
00302         PinCfg.Pinmode = 0;
00303         // TXD1 - P2.0
00304         PinCfg.Pinnum = 0;
00305         PinCfg.Portnum = 2;
00306         PINSEL_ConfigPin(&PinCfg);
00307         // RXD1 - P2.1
00308         PinCfg.Pinnum = 1;
00309         PINSEL_ConfigPin(&PinCfg);
00310         // DTR1 - P2.5
00311         PinCfg.Pinnum = 5;
00312         PINSEL_ConfigPin(&PinCfg);
00313
00314
00315
00316         /* Initialize UART Configuration parameter structure to default state:
00317          * Baudrate = 9600 bps
00318          * 8 data bit
00319          * 1 Stop bit
00320          * Parity: None
00321          * Note: Parity will be enabled later in UART_RS485Config() function.
00322          */
00323         UART_ConfigStructInit(&UARTConfigStruct);
00324
00325         // Initialize UART0 peripheral with given to corresponding parameter
00326         UART_Init((LPC_UART_TypeDef *)LPC_UART1, &UARTConfigStruct);
00327
00328         /* Initialize FIFOConfigStruct to default state:
00329          *                              - FIFO_DMAMode = DISABLE
00330          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00331          *                              - FIFO_ResetRxBuf = ENABLE
00332          *                              - FIFO_ResetTxBuf = ENABLE
00333          *                              - FIFO_State = ENABLE
00334          */
00335         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00336
00337         // Initialize FIFO for UART0 peripheral
00338         UART_FIFOConfig((LPC_UART_TypeDef *)LPC_UART1, &UARTFIFOConfigStruct);
00339
00340         // Configure RS485
00341         /*
00342          * - Auto Direction in Tx/Rx driving is enabled
00343          * - Direction control pin is set to DTR1
00344          * - Direction control pole is set to "1" that means direction pin
00345          * will drive to high state before transmit data.
00346          * - Multidrop mode is disable
00347          * - Auto detect address is disabled
00348          * - Receive state is enable
00349          */
00350         rs485cfg.AutoDirCtrl_State = ENABLE;
00351         rs485cfg.DirCtrlPin = UART1_RS485_DIRCTRL_DTR;
00352         rs485cfg.DirCtrlPol_Level = SET;
00353         rs485cfg.DelayValue = 50;
00354         rs485cfg.NormalMultiDropMode_State = DISABLE;
00355         rs485cfg.AutoAddrDetect_State = DISABLE;
00356         rs485cfg.MatchAddrValue = 0;
00357         rs485cfg.Rx_State = ENABLE;
00358         UART_RS485Config(LPC_UART1, &rs485cfg);
00359
00360         /* Enable UART Rx interrupt */
00361         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_RBR, ENABLE);
00362         /* Enable UART line status interrupt */
00363         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_RLS, ENABLE);
00364
00365         /* preemption = 1, sub-priority = 1 */
00366         NVIC_SetPriority(UART1_IRQn, ((0x01<<3)|0x01));
00367         /* Enable Interrupt for UART0 channel */
00368         NVIC_EnableIRQ(UART1_IRQn);
00369
00370         // Enable UART Transmit
00371         UART_TxCmd((LPC_UART_TypeDef *)LPC_UART1, ENABLE);
00372
00373         addr_toggle = 1;
00374         // for testing...
00375         while (1){
00376
00377                 // Send slave addr -----------------------------------------
00378                 UART_Send(LPC_UART0, send_menu, sizeof(send_menu), BLOCKING);
00379                 // Send slave addr on RS485 bus
00380                 if (addr_toggle){
00381                         UART_RS485SendSlvAddr(LPC_UART1, SLAVE_ADDR_A);
00382                 } else {
00383                         UART_RS485SendSlvAddr(LPC_UART1, SLAVE_ADDR_B);
00384                 }
00385                 // delay for a while
00386                 for (len = 0; len < 1000; len++);
00387
00388                 // Send data -----------------------------------------------
00389                 if (addr_toggle){
00390                         UART_RS485SendData(LPC_UART1, slaveA_msg, sizeof(slaveA_msg));
00391                 } else {
00392                         UART_RS485SendData(LPC_UART1, slaveB_msg, sizeof(slaveB_msg));
00393                 }
00394                 // Send terminator
00395                 UART_RS485SendData(LPC_UART1, &terminator, 1);
00396                 // delay for a while
00397                  for (len = 0; len < 1000; len++);
00398
00399                  // Receive data from slave --------------------------------
00400                 UART_Send(LPC_UART0, recv_menu, sizeof(recv_menu), BLOCKING);
00401                 // If address 'A' required response...
00402                 if (addr_toggle){
00403                         exit_flag = 0;
00404                         while (!exit_flag){
00405                                 len = UARTReceive((LPC_UART_TypeDef *)LPC_UART1, buffer, sizeof(buffer));
00406                                 /* Got some data */
00407                                 idx = 0;
00408                                 while (idx < len)
00409                                 {
00410                                         if (buffer[idx] == 13){
00411                                                 exit_flag = 1;
00412                                         } else {
00413                                                 /* Echo it back */
00414                                                 UART_Send(LPC_UART0, &buffer[idx], 1, BLOCKING);
00415                                         }
00416                                         idx++;
00417                                 }
00418                         }
00419                 }
00420
00421                 UART_Send(LPC_UART0, nextline, sizeof(nextline), BLOCKING);
00422                 addr_toggle = (addr_toggle ? 0 : 1);
00423                 // long delay here
00424                 for (len = 0; len < 10000000; len++);
00425         }
00426 }
00427
00428 /* With ARM and GHS toolsets, the entry point is main() - this will
00429    allow the linker to generate wrapper code to setup stacks, allocate
00430    heap area, and initialize and copy code and data segments. For GNU
00431    toolsets, the entry point is through __start() in the crt0_gnu.asm
00432    file, and that startup code will setup stacks and data */
00433 int main(void)
00434 {
00435     return c_entry();
00436 }
00437
00438
00439 #ifdef  DEBUG
00440 /*******************************************************************************
00441 * @brief                Reports the name of the source file and the source line number
00442 *                               where the CHECK_PARAM error has occurred.
00443 * @param[in]    file Pointer to the source file name
00444 * @param[in]    line assert_param error line source number
00445 * @return               None
00446 *******************************************************************************/
00447 void check_failed(uint8_t *file, uint32_t line)
00448 {
00449         /* User can add his own implementation to report the file name and line number,
00450          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00451
00452         /* Infinite loop */
00453         while(1);
00454 }
00455 #endif
00456
00457 /*
00458  * @}
00459  */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/rs485_slave.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/RS485_Slave/rs485_slave.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          rs485_slave.c                   2010-05-21
00003 */
00027 #include "lpc17xx_uart.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "lpc17xx_pinsel.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS *************************/
00038 /*
00039  * These following defines can be modified:
00040  * - RECEIVER_ALWAYS_EN (0/1)
00041  * - AUTO_SLVADDR_DETECT (0/1) in case RECEIVER_ALWAYS_EN is set to 0
00042  */
00043
00044 /* Receiver always be enabled to receive any data frame on RS485 bus,
00045  * regardless that frame is data frame or slave address frame (9-bit).
00046  * - When receiving a data frame, slave will display that data frame content
00047  * via UART0.
00048  * - When receiving a slave address frame (9bit mode), line error interrupt
00049  * - 0: Receiver is not always enabled, only slave address frame can trigger
00050  * an interrupt event to allow slave handle.
00051  * - 1: Receiver always be enabled */
00052 #define RECEIVER_ALWAYS_EN      0
00053
00054
00055 #if (RECEIVER_ALWAYS_EN == 0)
00056 /* Enable/Disable Auto Slave Address Detection
00057  * - In case of '0': any received data bytes will be ignored and will not
00058  * be stored in the RXFIFO. When an address byte is detected (parity bit
00059  * = '1') it will be placed into the RXFIFO and an Rx Data Ready Interrupt
00060  * will be generated. The interrupt handler can then read the address byte
00061  * and decide whether or not to enable the receiver to accept the following data.
00062  * - In case of '1': any received byte will be discarded if it is either a
00063  * data byte OR an address byte which fails to match the slave address configured
00064  * when initializing RS485. When a matching address character is detected it will
00065  * be pushed onto the RXFIFO along with the parity bit, and the receiver will
00066  * be automatically enabled (RS485CTRL bit 1 will be cleared by hardware).
00067  * The receiver will also generate an Rx Data Ready Interrupt */
00068 #define AUTO_SLVADDR_DETECT 1
00069 #define SLAVE_ADDR 'A'
00070 #endif
00071
00072 /* buffer size definition */
00073 #define UART_RING_BUFSIZE 256
00074
00075 /* Buf mask */
00076 #define __BUF_MASK (UART_RING_BUFSIZE-1)
00077 /* Check buf is full or not */
00078 #define __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
00079 /* Check buf will be full in next receiving or not */
00080 #define __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
00081 /* Check buf is empty */
00082 #define __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
00083 /* Reset buf */
00084 #define __BUF_RESET(bufidx)     (bufidx=0)
00085 #define __BUF_INCR(bufidx)      (bufidx=(bufidx+1)&__BUF_MASK)
00086
00087 /************************** PRIVATE TYPES *************************/
00089 typedef struct
00090 {
00091     __IO uint32_t tx_head;
00092     __IO uint32_t tx_tail;
00093     __IO uint32_t rx_head;
00094     __IO uint32_t rx_tail;
00095     __IO uint8_t  tx[UART_RING_BUFSIZE];
00096     __IO uint8_t  rx[UART_RING_BUFSIZE];
00097 } UART_RING_BUFFER_T;
00098
00099 /************************** PRIVATE VARIABLES *************************/
00100 #if (RECEIVER_ALWAYS_EN)
00101 uint8_t menu1[] =
00102 "Hello NXP Semiconductors \n\r" \
00103 "RS485 demo in Slave mode \n\r" \
00104 "Slave's Receiver always enabled \n\r";
00105 #else
00106 #if (AUTO_SLVADDR_DETECT == 0)
00107 uint8_t menu1[] =
00108 "Hello NXP Semiconductors \n\r" \
00109 "RS485 demo in Slave mode \n\r" \
00110 "Slave's Receiver is not always enabled - Auto Address Detection is disabled\n\r";
00111 #else
00112 uint8_t menu1[] =
00113 "Hello NXP Semiconductors \n\r" \
00114 "RS485 demo in Slave mode \n\r" \
00115 "Slave's Receiver is not always enabled - Auto Address Detection is enabled\n\r";
00116 #endif
00117 #endif
00118
00119 uint8_t send_msg[] = "Sending... \n\r";
00120 uint8_t recv_msg[] = "Receive: ";
00121 uint8_t p_err_menu[] = "Parity error";
00122 uint8_t addr_menu[] = " - Slv Addr Frm received\n\r";
00123 uint8_t addr_acc[] = " - Slave Addr accepted\n\r";
00124 uint8_t addr_una[] = " - Slave Addr unaccepted\n\r";
00125 uint8_t addr_auto[] = "Slave Addr detected!\n\r";
00126 uint8_t f_err_menu[] = "Frame error \n\r";
00127 uint8_t nextline[] = "\n\r";
00128
00129 uint8_t ack_msg[] = "ACK";
00130 uint8_t terminator = 13;
00131
00132 // UART Ring buffer
00133 UART_RING_BUFFER_T rb;
00134
00135 /************************** PRIVATE FUNCTIONS *************************/
00136 void UART1_IRQHandler(void);
00137 void UART_IntReceive(void);
00138 void UART_IntErr(uint8_t bLSErrType);
00139
00140 uint32_t UARTReceive(LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen);
00141 void print_menu(void);
00142
00143 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00144 /*********************************************************************/
00149 void UART1_IRQHandler(void)
00150 {
00151         // Call Standard UART 0 interrupt handler
00152         uint32_t intsrc, tmp, tmp1;
00153
00154         /* Determine the interrupt source */
00155         intsrc = UART_GetIntId(LPC_UART0);
00156         tmp = intsrc & UART_IIR_INTID_MASK;
00157
00158         // Receive Line Status
00159         if (tmp == UART_IIR_INTID_RLS){
00160                 // Check line status
00161                 tmp1 = UART_GetLineStatus(LPC_UART0);
00162                 // Mask out the Receive Ready and Transmit Holding empty status
00163                 tmp1 &= (UART_LSR_OE | UART_LSR_PE | UART_LSR_FE \
00164                                 | UART_LSR_BI | UART_LSR_RXFE);
00165                 // If any error exist
00166                 if (tmp1) {
00167                         UART_IntErr(tmp1);
00168                 }
00169         }
00170
00171         // Receive Data Available or Character time-out
00172         if ((tmp == UART_IIR_INTID_RDA) || (tmp == UART_IIR_INTID_CTI)){
00173                 UART_IntReceive();
00174         }
00175 }
00176
00177
00178 /********************************************************************/
00183 void UART_IntReceive(void)
00184 {
00185
00186 #if (RECEIVER_ALWAYS_EN)
00187         uint8_t tmpc;
00188         uint32_t rLen;
00189
00190         while(1){
00191                 // Call UART read function in UART driver
00192                 rLen = UART_Receive((LPC_UART_TypeDef *)LPC_UART1, &tmpc, 1, NONE_BLOCKING);
00193                 // If data received
00194                 if (rLen){
00195                         /* Check if buffer is more space
00196                          * If no more space, remaining character will be trimmed out
00197                          */
00198                         if (!__BUF_IS_FULL(rb.rx_head,rb.rx_tail)){
00199                                 rb.rx[rb.rx_head] = tmpc;
00200                                 __BUF_INCR(rb.rx_head);
00201                         }
00202                 }
00203                 // no more data
00204                 else {
00205                         break;
00206                 }
00207         }
00208 #else
00209 #if (AUTO_SLVADDR_DETECT == 0)
00210
00211         uint8_t tmpc;
00212         uint32_t rLen;
00213
00214         while(1){
00215                 // Call UART read function in UART driver
00216                 rLen = UART_Receive((UART_TypeDef *)UART1, &tmpc, 1, NONE_BLOCKING);
00217                 // If data received
00218                 if (rLen){
00219                         /* Check if buffer is more space
00220                          * If no more space, remaining character will be trimmed out
00221                          */
00222                         if (!__BUF_IS_FULL(rb.rx_head,rb.rx_tail)){
00223                                 rb.rx[rb.rx_head] = tmpc;
00224                                 __BUF_INCR(rb.rx_head);
00225                         }
00226                 }
00227                 // no more data
00228                 else {
00229                         break;
00230                 }
00231         }
00232 #else
00233
00234         uint8_t tmpc;
00235         uint32_t rLen;
00236
00237         while(1){
00238                 // Call UART read function in UART driver
00239                 rLen = UART_Receive((LPC_UART_TypeDef *)LPC_UART1, &tmpc, 1, NONE_BLOCKING);
00240                 // If data received
00241                 if (rLen){
00242                         /* Check if buffer is more space
00243                          * If no more space, remaining character will be trimmed out
00244                          */
00245                         if (!__BUF_IS_FULL(rb.rx_head,rb.rx_tail)){
00246                                 rb.rx[rb.rx_head] = tmpc;
00247                                 __BUF_INCR(rb.rx_head);
00248                         }
00249                 }
00250                 // no more data
00251                 else {
00252                         break;
00253                 }
00254         }
00255 #endif
00256 #endif
00257 }
00258
00259
00260 /*********************************************************************/
00265 void UART_IntErr(uint8_t bLSErrType)
00266 {
00267         uint8_t tmp;
00268 #if (RECEIVER_ALWAYS_EN)
00269         uint8_t tmpc;
00270
00271         if (bLSErrType & UART_LSR_PE){
00272                 // Parity error means the latest frame receive is slave address frame,
00273                 // Value of slave address is read and trimmed out.
00274                 UART_Send(LPC_UART0, p_err_menu, sizeof(p_err_menu), BLOCKING);
00275                 UART_Send(LPC_UART0, addr_menu, sizeof(addr_menu), BLOCKING);
00276                 UART_Receive((LPC_UART_TypeDef *)LPC_UART1, &tmpc, 1, NONE_BLOCKING);
00277         }
00278
00279         if (bLSErrType & UART_LSR_FE){
00280                 UART_Send(LPC_UART0, f_err_menu, sizeof(f_err_menu), BLOCKING);
00281         }
00282 #else
00283 #if (AUTO_SLVADDR_DETECT == 0)
00284         uint8_t tmp;
00285         // Check if this interrupt caused by parity error,
00286         // that means the last received frame is address frame,
00287         // if this address is matched with its own address,
00288         // continue to receive following data frame.
00289         if (bLSErrType & UART_LSR_PE){
00290                 UART_Receive((UART_TypeDef *)UART1, &tmp, 1, NONE_BLOCKING);
00291                 UART_Send(UART0, p_err_menu, sizeof(p_err_menu), BLOCKING);
00292                 if (tmp == SLAVE_ADDR){
00293                         UART_RS485ReceiverCmd(UART1, ENABLE);
00294                         UART_Send(UART0, addr_acc, sizeof(addr_acc), BLOCKING);
00295                 } else {
00296                         // Disable receiver
00297                         UART_RS485ReceiverCmd(UART1, DISABLE);
00298                         UART_Send(UART0, addr_una, sizeof(addr_una), BLOCKING);
00299                 }
00300         }
00301 #else
00302
00303         // Check if this interrupt caused by parity error,
00304         // that means the last received frame is address frame,
00305         // if this address is matched with its own address,
00306         // continue to receive following data frame.
00307         if (bLSErrType & UART_LSR_PE){
00308                 UART_Receive((LPC_UART_TypeDef *)LPC_UART1, &tmp, 1, NONE_BLOCKING);
00309                 UART_Send(LPC_UART0, addr_auto, sizeof(addr_auto), BLOCKING);
00310         }
00311 #endif
00312 #endif
00313 }
00314
00315 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00316 /*********************************************************************/
00324 uint32_t UARTReceive(LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
00325 {
00326     uint8_t *data = (uint8_t *) rxbuf;
00327     uint32_t bytes = 0;
00328
00329         /* Temporarily lock out UART receive interrupts during this
00330            read so the UART receive interrupt won't cause problems
00331            with the index values */
00332         UART_IntConfig(UARTPort, UART_INTCFG_RBR, DISABLE);
00333
00334         /* Loop until receive buffer ring is empty or
00335                 until max_bytes expires */
00336         while ((buflen > 0) && (!(__BUF_IS_EMPTY(rb.rx_head, rb.rx_tail))))
00337         {
00338                 /* Read data from ring buffer into user buffer */
00339                 *data = rb.rx[rb.rx_tail];
00340                 data++;
00341
00342                 /* Update tail pointer */
00343                 __BUF_INCR(rb.rx_tail);
00344
00345                 /* Increment data count and decrement buffer size count */
00346                 bytes++;
00347                 buflen--;
00348         }
00349
00350         /* Re-enable UART interrupts */
00351         UART_IntConfig(UARTPort, UART_INTCFG_RBR, ENABLE);
00352
00353     return bytes;
00354 }
00355
00356 /*********************************************************************/
00361 void print_menu(void)
00362 {
00363         UART_Send(LPC_UART0, menu1, sizeof(menu1), BLOCKING);
00364 }
00365
00366
00367 /*-------------------------MAIN FUNCTION------------------------------*/
00368 /*********************************************************************/
00373 int c_entry(void)
00374 {
00375         // UART Configuration structure variable
00376         UART_CFG_Type UARTConfigStruct;
00377         // UART FIFO configuration Struct variable
00378         UART_FIFO_CFG_Type UARTFIFOConfigStruct;
00379         // Pin configuration
00380         PINSEL_CFG_Type PinCfg;
00381         // RS485 configuration
00382         UART1_RS485_CTRLCFG_Type rs485cfg;
00383         uint32_t idx, len;
00384         uint8_t buffer[10];
00385         uint32_t tmp;
00386
00387         // UART0 section ----------------------------------------------------
00388         /*
00389          * Initialize UART0 pin connect
00390          */
00391         PinCfg.Funcnum = 1;
00392         PinCfg.OpenDrain = 0;
00393         PinCfg.Pinmode = 0;
00394         PinCfg.Pinnum = 2;
00395         PinCfg.Portnum = 0;
00396         PINSEL_ConfigPin(&PinCfg);
00397         PinCfg.Pinnum = 3;
00398         PINSEL_ConfigPin(&PinCfg);
00399
00400         /* Initialize UART Configuration parameter structure to default state:
00401          * Baudrate = 115200 bps
00402          * 8 data bit
00403          * 1 Stop bit
00404          * None parity
00405          */
00406         UART_ConfigStructInit(&UARTConfigStruct);
00407         UARTConfigStruct.Baud_rate = 115200;
00408
00409         // Initialize UART0 peripheral with given to corresponding parameter
00410         UART_Init(LPC_UART0, &UARTConfigStruct);
00411
00412         /* Initialize FIFOConfigStruct to default state:
00413          *                              - FIFO_DMAMode = DISABLE
00414          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00415          *                              - FIFO_ResetRxBuf = ENABLE
00416          *                              - FIFO_ResetTxBuf = ENABLE
00417          *                              - FIFO_State = ENABLE
00418          */
00419         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00420
00421         // Initialize FIFO for UART0 peripheral
00422         UART_FIFOConfig(LPC_UART0, &UARTFIFOConfigStruct);
00423
00424         // Enable UART Transmit
00425         UART_TxCmd(LPC_UART0, ENABLE);
00426
00427         // print welcome screen
00428         print_menu();
00429
00430
00431         // UART1 - RS485 section -------------------------------------------------
00432         /*
00433          * Initialize UART1 pin connect
00434          */
00435         PinCfg.Funcnum = 2;
00436         PinCfg.OpenDrain = 0;
00437         PinCfg.Pinmode = 0;
00438         // TXD1 - P2.0
00439         PinCfg.Pinnum = 0;
00440         PinCfg.Portnum = 2;
00441         PINSEL_ConfigPin(&PinCfg);
00442         // RXD1 - P2.1
00443         PinCfg.Pinnum = 1;
00444         PINSEL_ConfigPin(&PinCfg);
00445         // DTR1 - P2.5
00446         PinCfg.Pinnum = 5;
00447         PINSEL_ConfigPin(&PinCfg);
00448
00449
00450         /* Initialize UART Configuration parameter structure to default state:
00451          * Baudrate = 9600 bps
00452          * 8 data bit
00453          * 1 Stop bit
00454          * Parity: None
00455          * Note: Parity will be enabled later in UART_RS485Config() function.
00456          */
00457         UART_ConfigStructInit(&UARTConfigStruct);
00458
00459         // Initialize UART0 peripheral with given to corresponding parameter
00460         UART_Init((LPC_UART_TypeDef *)LPC_UART1, &UARTConfigStruct);
00461
00462         /* Initialize FIFOConfigStruct to default state:
00463          *                              - FIFO_DMAMode = DISABLE
00464          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00465          *                              - FIFO_ResetRxBuf = ENABLE
00466          *                              - FIFO_ResetTxBuf = ENABLE
00467          *                              - FIFO_State = ENABLE
00468          */
00469         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00470
00471         // Initialize FIFO for UART0 peripheral
00472         UART_FIFOConfig((LPC_UART_TypeDef *)LPC_UART1, &UARTFIFOConfigStruct);
00473
00474         // Configure RS485
00475         /*
00476          * - Auto Direction in Tx/Rx driving is enabled
00477          * - Direction control pin is set to DTR1
00478          * - Direction control pole is set to "1" that means direction pin
00479          * will drive to high state before transmit data.
00480          * - Multidrop mode is enable
00481          * - Auto detect address is disabled
00482          * - Receive state is enable
00483          */
00484         rs485cfg.AutoDirCtrl_State = ENABLE;
00485         rs485cfg.DirCtrlPin = UART1_RS485_DIRCTRL_DTR;
00486         rs485cfg.DirCtrlPol_Level = SET;
00487         rs485cfg.DelayValue = 50;
00488         rs485cfg.NormalMultiDropMode_State = ENABLE;
00489 #if AUTO_SLVADDR_DETECT
00490         rs485cfg.AutoAddrDetect_State = ENABLE;
00491         rs485cfg.MatchAddrValue = SLAVE_ADDR;
00492 #else
00493         rs485cfg.AutoAddrDetect_State = DISABLE;
00494 #endif
00495 #if RECEIVER_ALWAYS_EN
00496         rs485cfg.Rx_State = ENABLE;
00497 #else
00498         rs485cfg.Rx_State = DISABLE;
00499 #endif
00500         UART_RS485Config(LPC_UART1, &rs485cfg);
00501
00502     /* Enable UART Rx interrupt */
00503         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_RBR, ENABLE);
00504         /* Enable UART line status interrupt */
00505         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_RLS, ENABLE);
00506
00507     /* preemption = 1, sub-priority = 1 */
00508     NVIC_SetPriority(UART1_IRQn, ((0x01<<3)|0x01));
00509         /* Enable Interrupt for UART0 channel */
00510     NVIC_EnableIRQ(UART1_IRQn);
00511
00512         // Enable UART Transmit
00513         UART_TxCmd((LPC_UART_TypeDef *)LPC_UART1, ENABLE);
00514
00515         // for testing...
00516         while (1){
00517                 len = 0;
00518                 while (len == 0)
00519                 {
00520                         len = UARTReceive((LPC_UART_TypeDef *)LPC_UART1, buffer, sizeof(buffer));
00521                 }
00522
00523                 /* Got some data */
00524                 idx = 0;
00525                 while (idx < len)
00526                 {
00527                         if (buffer[idx] == 13){
00528                                 for (tmp = 0; tmp < 1000000; tmp++);
00529                                 UART_RS485SendData(LPC_UART1, ack_msg, sizeof(ack_msg));
00530                                 UART_Send(LPC_UART0, nextline, sizeof(nextline), BLOCKING);
00531                                 UART_RS485SendData(LPC_UART1, &terminator, 1);
00532                         } else {
00533                                 /* Echo it back */
00534                                 UART_Send(LPC_UART0, &buffer[idx], 1, BLOCKING);
00535                         }
00536                         idx++;
00537                 }
00538         }
00539 }
00540
00541 /* With ARM and GHS toolsets, the entry point is main() - this will
00542    allow the linker to generate wrapper code to setup stacks, allocate
00543    heap area, and initialize and copy code and data segments. For GNU
00544    toolsets, the entry point is through __start() in the crt0_gnu.asm
00545    file, and that startup code will setup stacks and data */
00546 int main(void)
00547 {
00548     return c_entry();
00549 }
00550
00551
00552 #ifdef  DEBUG
00553 /*******************************************************************************
00554 * @brief                Reports the name of the source file and the source line number
00555 *                               where the CHECK_PARAM error has occurred.
00556 * @param[in]    file Pointer to the source file name
00557 * @param[in]    line assert_param error line source number
00558 * @return               None
00559 *******************************************************************************/
00560 void check_failed(uint8_t *file, uint32_t line)
00561 {
00562         /* User can add his own implementation to report the file name and line number,
00563          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00564
00565         /* Infinite loop */
00566         while(1);
00567 }
00568 #endif
00569
00570 /*
00571  * @}
00572  */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RTC/AlarmCntIncrInterrupt/rtc_alarm_cntincr_int.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/RTC/AlarmCntIncrInterrupt/rtc_alarm_cntincr_int.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          rtc_alarm_cntincr_int.c                                         2010-05-21
00003 */
00027 #include "lpc17xx_rtc.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE VARIABLES *************************/
00039 uint8_t menu1[] =
00040 "********************************************************************************\n\r"
00041 "Hello NXP Semiconductors \n\r"
00042 " RTC demo \n\r"
00043 "\t - MCU: LPC17xx \n\r"
00044 "\t - Core: ARM CORTEX-M3 \n\r"
00045 "\t - Communicate via: UART0 - 115200 bps \n\r"
00046 " A simple RTC example. \n\r"
00047 " To generate interrupt in Second Counter Increment Interrupt (1s) \n\r"
00048 " and generate Alarm interrupt at 10s \n\r"
00049 "********************************************************************************\n\r";
00050
00051 /************************** PRIVATE FUNCTION *************************/
00052 void RTC_IRQHandler(void);
00053
00054 void print_menu(void);
00055
00056 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00057 /*********************************************************************/
00062 void RTC_IRQHandler(void)
00063 {
00064         uint32_t secval;
00065
00066         /* This is increment counter interrupt*/
00067         if (RTC_GetIntPending(LPC_RTC, RTC_INT_COUNTER_INCREASE))
00068         {
00069                 secval = RTC_GetTime (LPC_RTC, RTC_TIMETYPE_SECOND);
00070
00071                 /* Send debug information */
00072                 _DBG ("Second: "); _DBD(secval);
00073                 _DBG_("");
00074
00075                 // Clear pending interrupt
00076                 RTC_ClearIntPending(LPC_RTC, RTC_INT_COUNTER_INCREASE);
00077         }
00078
00079         /* Continue to check the Alarm match*/
00080         if (RTC_GetIntPending(LPC_RTC, RTC_INT_ALARM))
00081         {
00082                 /* Send debug information */
00083                 _DBG_ ("ALARM 10s matched!");
00084
00085                 // Clear pending interrupt
00086                 RTC_ClearIntPending(LPC_RTC, RTC_INT_ALARM);
00087         }
00088 }
00089
00090 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00091 /*********************************************************************/
00096 void print_menu(void)
00097 {
00098         _DBG(menu1);
00099 }
00100
00101
00102 /*-------------------------MAIN FUNCTION------------------------------*/
00103 /*********************************************************************/
00108 int c_entry(void)
00109 {
00110         RTC_TIME_Type RTCFullTime;
00111
00112         /* Initialize debug via UART0
00113          * – 115200bps
00114          * – 8 data bit
00115          * – No parity
00116          * – 1 stop bit
00117          * – No flow control
00118          */
00119         debug_frmwrk_init();
00120
00121         // print welcome screen
00122         print_menu();
00123
00124         /* RTC Block section ------------------------------------------------------ */
00125         // Init RTC module
00126         RTC_Init(LPC_RTC);
00127
00128     /* Disable RTC interrupt */
00129     NVIC_DisableIRQ(RTC_IRQn);
00130     /* preemption = 1, sub-priority = 1 */
00131     NVIC_SetPriority(RTC_IRQn, ((0x01<<3)|0x01));
00132
00133         /* Enable rtc (starts increase the tick counter and second counter register) */
00134         RTC_ResetClockTickCounter(LPC_RTC);
00135         RTC_Cmd(LPC_RTC, ENABLE);
00136         RTC_CalibCounterCmd(LPC_RTC, DISABLE);
00137
00138         /* Set current time for RTC */
00139         // Current time is 8:00:00PM, 2009-04-24
00140         RTC_SetTime (LPC_RTC, RTC_TIMETYPE_SECOND, 0);
00141         RTC_SetTime (LPC_RTC, RTC_TIMETYPE_MINUTE, 0);
00142         RTC_SetTime (LPC_RTC, RTC_TIMETYPE_HOUR, 20);
00143         RTC_SetTime (LPC_RTC, RTC_TIMETYPE_MONTH, 4);
00144         RTC_SetTime (LPC_RTC, RTC_TIMETYPE_YEAR, 2009);
00145         RTC_SetTime (LPC_RTC, RTC_TIMETYPE_DAYOFMONTH, 24);
00146
00147         /* Set ALARM time for second */
00148         RTC_SetAlarmTime (LPC_RTC, RTC_TIMETYPE_SECOND, 10);
00149
00150         // Get and print current time
00151         RTC_GetFullTime (LPC_RTC, &RTCFullTime);
00152         _DBG( "Current time set to: ");
00153         _DBD((RTCFullTime.HOUR)); _DBG (":");
00154         _DBD ((RTCFullTime.MIN)); _DBG (":");
00155         _DBD ((RTCFullTime.SEC)); _DBG("  ");
00156         _DBD ((RTCFullTime.DOM)); _DBG("/");
00157         _DBD ((RTCFullTime.MONTH)); _DBG("/");
00158         _DBD16 ((RTCFullTime.YEAR)); _DBG_("");
00159
00160         _DBG("Second ALARM set to ");
00161         _DBD (RTC_GetAlarmTime (LPC_RTC, RTC_TIMETYPE_SECOND));
00162         _DBG_("s");
00163
00164         /* Set the CIIR for second counter interrupt*/
00165         RTC_CntIncrIntConfig (LPC_RTC, RTC_TIMETYPE_SECOND, ENABLE);
00166         /* Set the AMR for 10s match alarm interrupt */
00167         RTC_AlarmIntConfig (LPC_RTC, RTC_TIMETYPE_SECOND, ENABLE);
00168
00169     /* Enable RTC interrupt */
00170     NVIC_EnableIRQ(RTC_IRQn);
00171
00172     /* Loop forever */
00173     while(1);
00174 }
00175
00176
00177
00178 /* With ARM and GHS toolsets, the entry point is main() - this will
00179    allow the linker to generate wrapper code to setup stacks, allocate
00180    heap area, and initialize and copy code and data segments. For GNU
00181    toolsets, the entry point is through __start() in the crt0_gnu.asm
00182    file, and that startup code will setup stacks and data */
00183 int main(void)
00184 {
00185     return c_entry();
00186 }
00187
00188
00189 #ifdef  DEBUG
00190 /*******************************************************************************
00191 * @brief                Reports the name of the source file and the source line number
00192 *                               where the CHECK_PARAM error has occurred.
00193 * @param[in]    file Pointer to the source file name
00194 * @param[in]    line assert_param error line source number
00195 * @return               None
00196 *******************************************************************************/
00197 void check_failed(uint8_t *file, uint32_t line)
00198 {
00199         /* User can add his own implementation to report the file name and line number,
00200          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00201
00202         /* Infinite loop */
00203         while(1);
00204 }
00205 #endif
00206
00207 /*
00208  * @}
00209  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/RTC/Calibration/rtc_calib.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/RTC/Calibration/rtc_calib.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          rtc_calib.c                                             2010-06-18
00003 */
00025 #include "LPC17xx.h"
00026 #include "lpc17xx_clkpwr.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "debug_frmwrk.h"
00029 #include "lpc17xx_rtc.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE VARIABLES *************************/
00039 uint8_t menu[]=
00040         "********************************************************************************\n\r"
00041         "Hello NXP Semiconductors \n\r"
00042         "RTC Calibration demo \n\r"
00043         "\t - MCU: LPC17xx \n\r"
00044         "\t - Core: ARM CORTEX-M3 \n\r"
00045         "\t - Communicate via: UART0 - 115200 bps \n\r"
00046         "This example describes how to calibrate RTC \n\r"
00047         "********************************************************************************\n\r";
00048
00049 /************************** PRIVATE FUNCTIONS *************************/
00050 void print_menu(void);
00051 void RTC_IRQHandle(void);
00052
00053 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00054 /*********************************************************************/
00059 void RTC_IRQHandler(void)
00060 {
00061         uint32_t secval;
00062
00063         /* This is increment counter interrupt*/
00064         if (RTC_GetIntPending(LPC_RTC, RTC_INT_COUNTER_INCREASE))
00065         {
00066                 secval = RTC_GetTime (LPC_RTC, RTC_TIMETYPE_SECOND);
00067
00068                 /* Send debug information */
00069                 _DBG ("Second: "); _DBD(secval);
00070                 _DBG_("");
00071
00072                 // Clear pending interrupt
00073                 RTC_ClearIntPending(LPC_RTC, RTC_INT_COUNTER_INCREASE);
00074         }
00075 }
00076
00077 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00078 /*********************************************************************/
00083 void print_menu(void)
00084 {
00085         _DBG(menu);
00086 }
00087
00088 /*-------------------------MAIN FUNCTION------------------------------*/
00089 /*********************************************************************/
00094 int c_entry (void)
00095 {
00096         /* Initialize debug via UART0
00097          * – 115200bps
00098          * – 8 data bit
00099          * – No parity
00100          * – 1 stop bit
00101          * – No flow control
00102          */
00103         debug_frmwrk_init();
00104
00105         // print welcome screen
00106         print_menu();
00107
00108         /* In this example:
00109          * Suppose that the RTC need periodically adjust after each 5 second.
00110          * And the time counter need by incrementing the counter by 2 instead of 1
00111          * We will observe timer counter after calibration via serial display
00112          */
00113         // Init RTC module
00114         RTC_Init(LPC_RTC);
00115
00116         /* Enable rtc (starts increase the tick counter and second counter register) */
00117         RTC_ResetClockTickCounter(LPC_RTC);
00118         RTC_Cmd(LPC_RTC, ENABLE);
00119
00120         //Set current time = 0
00121         RTC_SetTime (LPC_RTC, RTC_TIMETYPE_SECOND, 0);
00122
00123         /* Setting Timer calibration
00124          * Calibration value =  5s;
00125          * Direction = Forward calibration
00126          * So after each 5s, calibration logic can periodically adjust the time counter by
00127          * incrementing the counter by 2 instead of 1
00128          */
00129         RTC_CalibConfig(LPC_RTC, 5, RTC_CALIB_DIR_FORWARD);
00130         RTC_CalibCounterCmd(LPC_RTC, ENABLE);
00131
00132         /* Set the CIIR for second counter interrupt*/
00133         RTC_CntIncrIntConfig (LPC_RTC, RTC_TIMETYPE_SECOND, ENABLE);
00134
00135     /* Enable RTC interrupt */
00136     NVIC_EnableIRQ(RTC_IRQn);
00137
00138     /* Loop forever */
00139     while(1);
00140 }
00141
00142
00143 /* With ARM and GHS toolsets, the entry point is main() - this will
00144    allow the linker to generate wrapper code to setup stacks, allocate
00145    heap area, and initialize and copy code and data segments. For GNU
00146    toolsets, the entry point is through __start() in the crt0_gnu.asm
00147    file, and that startup code will setup stacks and data */
00148 int main(void)
00149 {
00150     return c_entry();
00151 }
00152
00153 #ifdef  DEBUG
00154 /*******************************************************************************
00155 * @brief                Reports the name of the source file and the source line number
00156 *                               where the CHECK_PARAM error has occurred.
00157 * @param[in]    file Pointer to the source file name
00158 * @param[in]    line assert_param error line source number
00159 * @return               None
00160 *******************************************************************************/
00161 void check_failed(uint8_t *file, uint32_t line)
00162 {
00163         /* User can add his own implementation to report the file name and line number,
00164          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00165
00166         /* Infinite loop */
00167         while(1);
00168 }
00169 #endif
00170
00171 /*
00172  * @}
00173  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/RTC_DeepPWD/rtc_deeppwd.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/RTC_DeepPWD/rtc_deeppwd.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          rtc_deeppwd.c                           2010-06-18
00003 */
00026 #include "LPC17xx.h"
00027 #include "lpc17xx_clkpwr.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_gpio.h"
00031 #include "lpc17xx_rtc.h"
00032
00033 /* Example group ----------------------------------------------------------- */
00039 /************************** PRIVATE VARIABLES *************************/
00040 uint8_t menu[]=
00041         "********************************************************************************\n\r"
00042         "Hello NXP Semiconductors \n\r"
00043         "Power control demo \n\r"
00044         "\t - MCU: LPC17xx \n\r"
00045         "\t - Core: ARM CORTEX-M3 \n\r"
00046         "\t - Communicate via: UART0 - 115200 bps \n\r"
00047         "This example used to enter system in Deep PowerDown mode and wake up it by\n\r "
00048         "using RTC Interrupt \n\r"
00049         "********************************************************************************\n\r";
00050
00051 /************************** PRIVATE FUNCTIONS *************************/
00052 void print_menu(void);
00053 void RTC_IRQHandler(void);
00054
00055 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00056 /*********************************************************************/
00061 void RTC_IRQHandler(void)
00062 {
00063         if(RTC_GetIntPending(LPC_RTC, RTC_INT_ALARM))
00064         {
00065                 RTC_ClearIntPending(LPC_RTC, RTC_INT_ALARM);
00066                 RTC_Cmd(LPC_RTC, DISABLE);
00067                 NVIC_DisableIRQ(RTC_IRQn);
00068         }
00069 }
00070
00071 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00072 /*********************************************************************/
00077 void print_menu(void)
00078 {
00079         _DBG(menu);
00080 }
00081
00082 /*-------------------------MAIN FUNCTION------------------------------*/
00083 /*********************************************************************/
00088 int c_entry (void)
00089 {
00090
00091         /* Initialize debug via UART0
00092          * – 115200bps
00093          * – 8 data bit
00094          * – No parity
00095          * – 1 stop bit
00096          * – No flow control
00097          */
00098         debug_frmwrk_init();
00099
00100         // print welcome screen
00101         print_menu();
00102
00103         /* Initialize and configure RTC */
00104         RTC_Init(LPC_RTC);
00105
00106         RTC_ResetClockTickCounter(LPC_RTC);
00107         RTC_SetTime (LPC_RTC, RTC_TIMETYPE_SECOND, 0);
00108
00109         /* Set alarm time = 5s.
00110          * So, after each 5s, RTC will generate and wake-up system
00111          * out of Deep PowerDown mode.
00112          */
00113         RTC_SetAlarmTime (LPC_RTC, RTC_TIMETYPE_SECOND, 5);
00114
00115         RTC_CntIncrIntConfig (LPC_RTC, RTC_TIMETYPE_SECOND, DISABLE);
00116         /* Set the AMR for 5s match alarm interrupt */
00117         RTC_AlarmIntConfig (LPC_RTC, RTC_TIMETYPE_SECOND, ENABLE);
00118         RTC_ClearIntPending(LPC_RTC, RTC_INT_ALARM);
00119
00120         _DBG_("Press '1' to enter system in Deep PowerDown mode");
00121         while(_DG !='1');
00122
00123         RTC_Cmd(LPC_RTC, ENABLE);
00124         NVIC_EnableIRQ(RTC_IRQn);
00125
00126         _DBG_("Enter Deep PowerDown mode...");
00127         _DBG_("Wait 5s, RTC will wake-up system...\n\r");
00128
00129         // Enter target power down mode
00130         CLKPWR_DeepPowerDown();
00131
00132         while(1);
00133 }
00134
00135
00136 /* With ARM and GHS toolsets, the entry point is main() - this will
00137    allow the linker to generate wrapper code to setup stacks, allocate
00138    heap area, and initialize and copy code and data segments. For GNU
00139    toolsets, the entry point is through __start() in the crt0_gnu.asm
00140    file, and that startup code will setup stacks and data */
00141 int main(void)
00142 {
00143     return c_entry();
00144 }
00145
00146 #ifdef  DEBUG
00147 /*******************************************************************************
00148 * @brief                Reports the name of the source file and the source line number
00149 *                               where the CHECK_PARAM error has occurred.
00150 * @param[in]    file Pointer to the source file name
00151 * @param[in]    line assert_param error line source number
00152 * @return               None
00153 *******************************************************************************/
00154 void check_failed(uint8_t *file, uint32_t line)
00155 {
00156         /* User can add his own implementation to report the file name and line number,
00157          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00158
00159         /* Infinite loop */
00160         while(1);
00161 }
00162 #endif
00163
00164 /*
00165  * @}
00166  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_int/sc16is750_int.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_int/sc16is750_int.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          sc16is750_int.c                                 2010-05-21
00003 */
00026 #include "lpc17xx_ssp.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_gpio.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINTIONS ***********************/
00039 // PORT number that /CS pin assigned on
00040 #define CS_PORT_NUM             0
00041 // PIN number that  /CS pin assigned on
00042 #define CS_PIN_NUM              16
00043
00044 /* Idle char */
00045 #define IDLE_CHAR       0xFF
00046
00047 // Define macro used in command when using SSP with SC16IS740
00048 #define SC16IS740_WR_CMD(x)             ((uint8_t) (x << 3))
00049 #define SC16IS740_RD_CMD(x)             ((uint8_t) ((x << 3) | 0x80))
00050
00051 // Define register address of SC16IS740
00052 #define SC16IS740_IODIR_REG             0x0A
00053 #define SC16IS740_IOSTATE_REG   0x0B
00054 #define SC16IS740_IOCON_REG             0x0E
00055
00056 /************************** PRIVATE VARIABLES *************************/
00057 uint8_t menu1[] =
00058 "********************************************************************************\n\r"
00059 "Hello NXP Semiconductors \n\r"
00060 "SSP demo \n\r"
00061 "\t - MCU: LPC17xx \n\r"
00062 "\t - Core: ARM Cortex-M3 \n\r"
00063 "\t - Communicate via: UART0 - 9.6 kbps \n\r"
00064 " An example of SSP using interrupt mode - SPI frame format \n\r"
00065 "to test SSP driver \n\r"
00066 " Using SSP at mode SSP master/8bit on LPC1768 to communicate with \n\r"
00067 " SC16IS750/760 Demo Board \n\r"
00068 " Press '1' to turn on LEDs, '2' to turn off LEDs \n\r"
00069 "********************************************************************************\n\r";
00070 uint8_t menu2[] = "Demo terminated! \n\r";
00071
00072 uint8_t iocon_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00};
00073 uint8_t iodir_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF};
00074 uint8_t iostate_on[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00};
00075 uint8_t iostate_off[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF};
00076 uint8_t sspreadbuf[2];
00077
00078 /* Status Flag indicates current SSP transmission complete or not */
00079 __IO FlagStatus complete;
00080
00081 // SSP Configuration structure variable
00082 SSP_CFG_Type SSP_ConfigStruct;
00083 SSP_DATA_SETUP_Type xferConfig;
00084
00085 /************************** PRIVATE FUNCTIONS *************************/
00086 void SSP0_IRQHandler(void);
00087
00088 void CS_Init(void);
00089 void CS_Force(int32_t state);
00090 void print_menu(void);
00091
00092
00093 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00094 /*********************************************************************/
00099 void SSP0_IRQHandler(void)
00100 {
00101         SSP_DATA_SETUP_Type *xf_setup;
00102         uint16_t tmp;
00103         uint8_t dataword;
00104
00105         // Disable all SSP interrupts
00106         SSP_IntConfig(LPC_SSP0, SSP_INTCFG_ROR|SSP_INTCFG_RT|SSP_INTCFG_RX|SSP_INTCFG_TX, DISABLE);
00107
00108         if(SSP_GetDataSize(LPC_SSP0)>8)
00109                 dataword = 1;
00110         else
00111                 dataword = 0;
00112         xf_setup = &xferConfig;
00113         // save status
00114         tmp = SSP_GetRawIntStatusReg(LPC_SSP0);
00115         xf_setup->status = tmp;
00116
00117         // Check overrun error
00118         if (tmp & SSP_RIS_ROR){
00119                 // Clear interrupt
00120                 SSP_ClearIntPending(LPC_SSP0, SSP_INTCLR_ROR);
00121                 // update status
00122                 xf_setup->status |= SSP_STAT_ERROR;
00123                 // Set Complete Flag
00124                 complete = SET;
00125                 return;
00126         }
00127
00128         if ((xf_setup->tx_cnt != xf_setup->length) || (xf_setup->rx_cnt != xf_setup->length)){
00129                 /* check if RX FIFO contains data */
00130                 while ((SSP_GetStatus(LPC_SSP0, SSP_STAT_RXFIFO_NOTEMPTY)) && (xf_setup->rx_cnt != xf_setup->length)){
00131                         // Read data from SSP data
00132                         tmp = SSP_ReceiveData(LPC_SSP0);
00133
00134                         // Store data to destination
00135                         if (xf_setup->rx_data != NULL)
00136                         {
00137                                 if (dataword == 0){
00138                                         *(uint8_t *)((uint32_t)xf_setup->rx_data + xf_setup->rx_cnt) = (uint8_t) tmp;
00139                                 } else {
00140                                         *(uint16_t *)((uint32_t)xf_setup->rx_data + xf_setup->rx_cnt) = (uint16_t) tmp;
00141                                 }
00142                         }
00143                         // Increase counter
00144                         if (dataword == 0){
00145                                 xf_setup->rx_cnt++;
00146                         } else {
00147                                 xf_setup->rx_cnt += 2;
00148                         }
00149                 }
00150
00151                 while ((SSP_GetStatus(LPC_SSP0, SSP_STAT_TXFIFO_NOTFULL)) && (xf_setup->tx_cnt != xf_setup->length)){
00152                         // Write data to buffer
00153                         if(xf_setup->tx_data == NULL){
00154                                 if (dataword == 0){
00155                                         SSP_SendData(LPC_SSP0, 0xFF);
00156                                         xf_setup->tx_cnt++;
00157                                 } else {
00158                                         SSP_SendData(LPC_SSP0, 0xFFFF);
00159                                         xf_setup->tx_cnt += 2;
00160                                 }
00161                         } else {
00162                                 if (dataword == 0){
00163                                         SSP_SendData(LPC_SSP0, (*(uint8_t *)((uint32_t)xf_setup->tx_data + xf_setup->tx_cnt)));
00164                                         xf_setup->tx_cnt++;
00165                                 } else {
00166                                         SSP_SendData(LPC_SSP0, (*(uint16_t *)((uint32_t)xf_setup->tx_data + xf_setup->tx_cnt)));
00167                                         xf_setup->tx_cnt += 2;
00168                                 }
00169                         }
00170
00171                         // Check overrun error
00172                         if (SSP_GetRawIntStatus(LPC_SSP0, SSP_INTSTAT_RAW_ROR)){
00173                                 // update status
00174                                 xf_setup->status |= SSP_STAT_ERROR;
00175                                 // Set Complete Flag
00176                                 complete = SET;
00177                                 return;
00178                         }
00179
00180                         // Check for any data available in RX FIFO
00181                         while ((SSP_GetStatus(LPC_SSP0, SSP_STAT_RXFIFO_NOTEMPTY)) && (xf_setup->rx_cnt != xf_setup->length)){
00182                                 // Read data from SSP data
00183                                 tmp = SSP_ReceiveData(LPC_SSP0);
00184
00185                                 // Store data to destination
00186                                 if (xf_setup->rx_data != NULL)
00187                                 {
00188                                         if (dataword == 0){
00189                                                 *(uint8_t *)((uint32_t)xf_setup->rx_data + xf_setup->rx_cnt) = (uint8_t) tmp;
00190                                         } else {
00191                                                 *(uint16_t *)((uint32_t)xf_setup->rx_data + xf_setup->rx_cnt) = (uint16_t) tmp;
00192                                         }
00193                                 }
00194                                 // Increase counter
00195                                 if (dataword == 0){
00196                                         xf_setup->rx_cnt++;
00197                                 } else {
00198                                         xf_setup->rx_cnt += 2;
00199                                 }
00200                         }
00201                 }
00202         }
00203
00204         // If there more data to sent or receive
00205         if ((xf_setup->rx_cnt != xf_setup->length) || (xf_setup->tx_cnt != xf_setup->length)){
00206                 // Enable all interrupt
00207                 SSP_IntConfig(LPC_SSP0, SSP_INTCFG_ROR|SSP_INTCFG_RT|SSP_INTCFG_RX|SSP_INTCFG_TX, ENABLE);
00208         } else {
00209                 // Save status
00210                 xf_setup->status = SSP_STAT_DONE;
00211                 // Set Complete Flag
00212                 complete = SET;
00213         }
00214 }
00215
00216 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00217 /*********************************************************************/
00223 void CS_Init(void)
00224 {
00225         GPIO_SetDir(CS_PORT_NUM, (1<<CS_PIN_NUM), 1);
00226         GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00227 }
00228
00229
00230 /*********************************************************************/
00238 void CS_Force(int32_t state)
00239 {
00240         if (state){
00241                 GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00242         }else{
00243                 GPIO_ClearValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00244         }
00245 }
00246
00247 /*********************************************************************/
00252 void print_menu(void)
00253 {
00254         _DBG(menu1);
00255 }
00256
00257 /*-------------------------MAIN FUNCTION------------------------------*/
00258 /*********************************************************************/
00263 int c_entry(void)
00264 {
00265         uint8_t tmpchar[2] = {0, 0};
00266         PINSEL_CFG_Type PinCfg;
00267         __IO FlagStatus exitflag;
00268
00269         /*
00270          * Initialize SPI pin connect
00271          * P0.15 - SCK
00272          * P0.16 - SSEL - used as GPIO
00273          * P0.17 - MISO
00274          * P0.18 - MOSI
00275          */
00276         PinCfg.Funcnum = 2;
00277         PinCfg.OpenDrain = 0;
00278         PinCfg.Pinmode = 0;
00279         PinCfg.Portnum = 0;
00280         PinCfg.Pinnum = 15;
00281         PINSEL_ConfigPin(&PinCfg);
00282         PinCfg.Pinnum = 17;
00283         PINSEL_ConfigPin(&PinCfg);
00284         PinCfg.Pinnum = 18;
00285         PINSEL_ConfigPin(&PinCfg);
00286         PinCfg.Pinnum = 16;
00287         PinCfg.Funcnum = 0;
00288         PINSEL_ConfigPin(&PinCfg);
00289
00290         /* Initialize debug via UART0
00291          * – 115200bps
00292          * – 8 data bit
00293          * – No parity
00294          * – 1 stop bit
00295          * – No flow control
00296          */
00297         debug_frmwrk_init();
00298
00299         // print welcome screen
00300         print_menu();
00301
00302         // initialize SSP configuration structure to default
00303         SSP_ConfigStructInit(&SSP_ConfigStruct);
00304         // Initialize SSP peripheral with parameter given in structure above
00305         SSP_Init(LPC_SSP0, &SSP_ConfigStruct);
00306
00307         // Initialize /CS pin to GPIO function
00308         CS_Init();
00309
00310         // Enable SSP peripheral
00311         SSP_Cmd(LPC_SSP0, ENABLE);
00312
00313     /* preemption = 1, sub-priority = 1 */
00314     NVIC_SetPriority(SSP0_IRQn, ((0x01<<3)|0x01));
00315     /* Enable SSP0 interrupt */
00316     NVIC_EnableIRQ(SSP0_IRQn);
00317
00318         /* First, send some command to reset SC16IS740 chip via SSP bus interface
00319          * note driver /CS pin to low state before transferring by CS_Enable() function
00320          */
00321     complete = RESET;
00322         CS_Force(0);
00323         xferConfig.tx_data = iocon_cfg;
00324         xferConfig.rx_data = sspreadbuf;
00325         xferConfig.length = sizeof (iocon_cfg);
00326         SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_INTERRUPT);
00327         while (complete == RESET);
00328         CS_Force(1);
00329
00330         complete = RESET;
00331         CS_Force(0);
00332         xferConfig.tx_data = iodir_cfg;
00333         xferConfig.rx_data = sspreadbuf;
00334         xferConfig.length = sizeof (iodir_cfg);
00335         SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_INTERRUPT);
00336         while (complete == RESET);
00337         CS_Force(1);
00338
00339         // Reset exit flag
00340         exitflag = RESET;
00341
00342         /* Read some data from the buffer */
00343         while (exitflag == RESET)
00344         {
00345                 while((tmpchar[0] = _DG) == 0);
00346
00347                 if (tmpchar[0] == 27){
00348                         /* ESC key, set exit flag */
00349                         _DBG_(menu2);
00350                         exitflag = SET;
00351                 }
00352                 else if (tmpchar[0] == 'r'){
00353                         print_menu();
00354                 } else {
00355                         if (tmpchar[0] == '1')
00356                         {
00357                                 // LEDs are ON now...
00358                                 CS_Force(0);
00359                                 xferConfig.tx_data = iostate_on;
00360                                 xferConfig.rx_data = sspreadbuf;
00361                                 xferConfig.length = sizeof (iostate_on);
00362                                 SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
00363                                 CS_Force(1);
00364                         }
00365                         else if (tmpchar[0] == '2')
00366                         {
00367                                 // LEDs are OFF now...
00368                                 CS_Force(0);
00369                                 xferConfig.tx_data = iostate_off;
00370                                 xferConfig.rx_data = sspreadbuf;
00371                                 xferConfig.length = sizeof (iostate_off);
00372                                 SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
00373                                 CS_Force(1);
00374                         }
00375                         /* Then Echo it back */
00376                         _DBG_(tmpchar);
00377                 }
00378         }
00379
00380     // wait for current transmission complete - THR must be empty
00381     while (UART_CheckBusy(LPC_UART0) == SET );
00382
00383     // DeInitialize UART0 peripheral
00384     UART_DeInit(LPC_UART0);
00385
00386     /* Loop forever */
00387     while(1);
00388 }
00389
00390 /* With ARM and GHS toolsets, the entry point is main() - this will
00391    allow the linker to generate wrapper code to setup stacks, allocate
00392    heap area, and initialize and copy code and data segments. For GNU
00393    toolsets, the entry point is through __start() in the crt0_gnu.asm
00394    file, and that startup code will setup stacks and data */
00395 int main(void)
00396 {
00397     return c_entry();
00398 }
00399
00400
00401 #ifdef  DEBUG
00402 /*******************************************************************************
00403 * @brief                Reports the name of the source file and the source line number
00404 *                               where the CHECK_PARAM error has occurred.
00405 * @param[in]    file Pointer to the source file name
00406 * @param[in]    line assert_param error line source number
00407 * @return               None
00408 *******************************************************************************/
00409 void check_failed(uint8_t *file, uint32_t line)
00410 {
00411         /* User can add his own implementation to report the file name and line number,
00412          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00413
00414         /* Infinite loop */
00415         while(1);
00416 }
00417 #endif
00418
00419 /*
00420  * @}
00421  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_polling/sc16is750_polling.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/sc16is750_polling/sc16is750_polling.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          sc16is750_polling.c                             2010-05-21
00003 */
00026 #include "lpc17xx_ssp.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_gpio.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00039 /************************** PRIVATE DEFINITIONS ***********************/
00040 // PORT number that /CS pin assigned on
00041 #define CS_PORT_NUM             0
00042 // PIN number that  /CS pin assigned on
00043 #define CS_PIN_NUM              16
00044
00045 // Define macro used in command when using SSP with SC16IS740
00046 #define SC16IS740_WR_CMD(x)             ((uint8_t) (x << 3))
00047 #define SC16IS740_RD_CMD(x)             ((uint8_t) ((x << 3) | 0x80))
00048
00049 // Define register address of SC16IS740
00050 #define SC16IS740_IODIR_REG             0x0A
00051 #define SC16IS740_IOSTATE_REG   0x0B
00052 #define SC16IS740_IOCON_REG             0x0E
00053
00054
00055 /************************** PRIVATE VARIABLES *************************/
00056 uint8_t menu1[] =
00057 "********************************************************************************\n\r"
00058 "Hello NXP Semiconductors \n\r"
00059 "SSP demo \n\r"
00060 "\t - MCU: LPC17xx \n\r"
00061 "\t - Core: ARM Cortex-M3 \n\r"
00062 "\t - Communicate via: UART0 - 9.6 kbps \n\r"
00063 " Communicate with SSP0 function on SC16IS750/760 Demo Board\n\r"
00064 " in polling mode\n\r"
00065 " Use IO function on SC16IS740/750/760 chip to turn ON/OFF LEDs\n\r"
00066 " Press '1' to turn ON LEDs, '2' to turn OFF LEDs \n\r"
00067 "********************************************************************************\n\r";
00068 uint8_t menu2[] = "Demo terminated! \n\r";
00069
00070 // SSP Configuration structure variable
00071 SSP_CFG_Type SSP_ConfigStruct;
00072
00073 uint8_t iocon_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00};
00074 uint8_t iodir_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF};
00075 uint8_t iostate_on[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00};
00076 uint8_t iostate_off[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF};
00077 uint8_t sspreadbuf[2];
00078
00079 /************************** PRIVATE FUNCTIONS *************************/
00080 void CS_Init(void);
00081 void CS_Force(int32_t state);
00082 void print_menu(void);
00083
00084 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00085 /*********************************************************************/
00091 void CS_Init(void)
00092 {
00093         GPIO_SetDir(CS_PORT_NUM, (1<<CS_PIN_NUM), 1);
00094         GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00095 }
00096
00097
00098 /*********************************************************************/
00106 void CS_Force(int32_t state)
00107 {
00108         if (state){
00109                 GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00110         }else{
00111                 GPIO_ClearValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00112         }
00113 }
00114
00115
00116 /*********************************************************************/
00121 void print_menu(void)
00122 {
00123         _DBG(menu1);
00124 }
00125
00126 /*-------------------------MAIN FUNCTION------------------------------*/
00127 /*********************************************************************/
00132 int c_entry(void)
00133 {
00134         uint8_t tmpchar[2] = {0, 0};
00135         PINSEL_CFG_Type PinCfg;
00136         __IO FlagStatus exitflag;
00137         SSP_DATA_SETUP_Type xferConfig;
00138
00139         /*
00140          * Initialize SPI pin connect
00141          * P0.15 - SCK
00142          * P0.16 - SSEL - used as GPIO
00143          * P0.17 - MISO
00144          * P0.18 - MOSI
00145          */
00146         PinCfg.Funcnum = 2;
00147         PinCfg.OpenDrain = 0;
00148         PinCfg.Pinmode = 0;
00149         PinCfg.Portnum = 0;
00150         PinCfg.Pinnum = 15;
00151         PINSEL_ConfigPin(&PinCfg);
00152         PinCfg.Pinnum = 17;
00153         PINSEL_ConfigPin(&PinCfg);
00154         PinCfg.Pinnum = 18;
00155         PINSEL_ConfigPin(&PinCfg);
00156         PinCfg.Pinnum = 16;
00157         PinCfg.Funcnum = 0;
00158         PINSEL_ConfigPin(&PinCfg);
00159
00160         /* Initialize debug via UART0
00161          * – 115200bps
00162          * – 8 data bit
00163          * – No parity
00164          * – 1 stop bit
00165          * – No flow control
00166          */
00167         debug_frmwrk_init();
00168
00169         // print welcome screen
00170         print_menu();
00171
00172         // initialize SSP configuration structure to default
00173         SSP_ConfigStructInit(&SSP_ConfigStruct);
00174         // Initialize SSP peripheral with parameter given in structure above
00175         SSP_Init(LPC_SSP0, &SSP_ConfigStruct);
00176
00177         // Initialize /CS pin to GPIO function
00178         CS_Init();
00179
00180         // Enable SSP peripheral
00181         SSP_Cmd(LPC_SSP0, ENABLE);
00182
00183         /* First, send some command to reset SC16IS740 chip via SSP bus interface
00184          * note driver /CS pin to low state before transferring by CS_Enable() function
00185          */
00186         CS_Force(0);
00187         xferConfig.tx_data = iocon_cfg;
00188         xferConfig.rx_data = sspreadbuf;
00189         xferConfig.length = sizeof (iocon_cfg);
00190         SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
00191         CS_Force(1);
00192
00193         CS_Force(0);
00194         xferConfig.tx_data = iodir_cfg;
00195         xferConfig.rx_data = sspreadbuf;
00196         xferConfig.length = sizeof (iodir_cfg);
00197         SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
00198         CS_Force(1);
00199
00200         // Reset exit flag
00201         exitflag = RESET;
00202
00203         /* Read some data from the buffer */
00204         while (exitflag == RESET)
00205         {
00206                 while((tmpchar[0] = _DG) == 0);
00207
00208                 if (tmpchar[0] == 27){
00209                         /* ESC key, set exit flag */
00210                         _DBG_(menu2);
00211                         exitflag = SET;
00212                 }
00213                 else if (tmpchar[0] == 'r'){
00214                         print_menu();
00215                 } else {
00216                         if (tmpchar[0] == '1')
00217                         {
00218                                 // LEDs are ON now...
00219                                 CS_Force(0);
00220                                 xferConfig.tx_data = iostate_on;
00221                                 xferConfig.rx_data = sspreadbuf;
00222                                 xferConfig.length = sizeof (iostate_on);
00223                                 SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
00224                                 CS_Force(1);
00225                         }
00226                         else if (tmpchar[0] == '2')
00227                         {
00228                                 // LEDs are OFF now...
00229                                 CS_Force(0);
00230                                 xferConfig.tx_data = iostate_off;
00231                                 xferConfig.rx_data = sspreadbuf;
00232                                 xferConfig.length = sizeof (iostate_off);
00233                                 SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
00234                                 CS_Force(1);
00235                         }
00236                         /* Then Echo it back */
00237                         _DBG_(tmpchar);
00238                 }
00239         }
00240
00241     // wait for current transmission complete - THR must be empty
00242     while (UART_CheckBusy(LPC_UART0) == SET);
00243
00244     // DeInitialize UART0 peripheral
00245     UART_DeInit(LPC_UART0);
00246
00247     /* Loop forever */
00248     while(1);
00249 }
00250
00251 /* With ARM and GHS toolsets, the entry point is main() - this will
00252    allow the linker to generate wrapper code to setup stacks, allocate
00253    heap area, and initialize and copy code and data segments. For GNU
00254    toolsets, the entry point is through __start() in the crt0_gnu.asm
00255    file, and that startup code will setup stacks and data */
00256 int main(void)
00257 {
00258     return c_entry();
00259 }
00260
00261
00262 #ifdef  DEBUG
00263 /*******************************************************************************
00264 * @brief                Reports the name of the source file and the source line number
00265 *                               where the CHECK_PARAM error has occurred.
00266 * @param[in]    file Pointer to the source file name
00267 * @param[in]    line assert_param error line source number
00268 * @return               None
00269 *******************************************************************************/
00270 void check_failed(uint8_t *file, uint32_t line)
00271 {
00272         /* User can add his own implementation to report the file name and line number,
00273          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00274
00275         /* Infinite loop */
00276         while(1);
00277 }
00278 #endif
00279
00280 /*
00281  * @}
00282  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/serial.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      Name:    serial.h
00003  *      Purpose: serial port handling
00004  *      Version: V1.10
00005  *----------------------------------------------------------------------------
00006  *      This software is supplied "AS IS" without any warranties, express,
00007  *      implied or statutory, including but not limited to the implied
00008  *      warranties of fitness for purpose, satisfactory quality and
00009  *      noninfringement. Keil extends you a royalty-free right to reproduce
00010  *      and distribute executable files created using this software for use
00011  *      on NXP Semiconductors LPC microcontroller devices only. Nothing else
00012  *      gives you the right to use this software.
00013  *
00014  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00015  *---------------------------------------------------------------------------*/
00016
00017 #define PORT_NUM        1
00018
00019 /*----------------------------------------------------------------------------
00020  Serial interface related prototypes
00021  *---------------------------------------------------------------------------*/
00022 extern void  ser_OpenPort  (char portNum);
00023 extern void  ser_ClosePort (char portNum);
00024 extern void  ser_InitPort0  (unsigned long baudrate, unsigned int databits, unsigned int parity, unsigned int stopbits);
00025 extern void  ser_InitPort1  (unsigned long baudrate, unsigned int databits, unsigned int parity, unsigned int stopbits);
00026 extern void  ser_AvailChar (int *availChar);
00027 extern int   ser_Write     (char portNum, const char *buffer, int *length);
00028 extern int   ser_Read      (char *buffer, const int *length);
00029 extern void  ser_LineState (unsigned short *lineState);
00030
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.c
Go to the documentation of this file.
00001  /*
00002  * Copyright (c) 2003, Adam Dunkels.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. The name of the author may not be used to endorse or promote
00014  *    products derived from this software without specific prior
00015  *    written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00018  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00019  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00021  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00023  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00024  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00025  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00026  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00027  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack.
00030  *
00031  * $Id: shell.c,v 1.1 2006/06/07 09:43:54 adam Exp $
00032  *
00033  */
00034
00035 #include "shell.h"
00036
00037 #include <string.h>
00038
00039 struct ptentry {
00040   char *commandstr;
00041   void (* pfunc)(char *str);
00042 };
00043
00044 #define SHELL_PROMPT "uIP 1.0> "
00045
00046 /*---------------------------------------------------------------------------*/
00047 static void
00048 parse(register char *str, struct ptentry *t)
00049 {
00050   struct ptentry *p;
00051   for(p = t; p->commandstr != NULL; ++p) {
00052     if(strncmp(p->commandstr, str, strlen(p->commandstr)) == 0) {
00053       break;
00054     }
00055   }
00056
00057   p->pfunc(str);
00058 }
00059 /*---------------------------------------------------------------------------*/
00060 static void
00061 inttostr(register char *str, unsigned int i)
00062 {
00063   str[0] = '0' + i / 100;
00064   if(str[0] == '0') {
00065     str[0] = ' ';
00066   }
00067   str[1] = '0' + (i / 10) % 10;
00068   if(str[0] == ' ' && str[1] == '0') {
00069     str[1] = ' ';
00070   }
00071   str[2] = '0' + i % 10;
00072   str[3] = ' ';
00073   str[4] = 0;
00074 }
00075 /*---------------------------------------------------------------------------*/
00076 static void
00077 help(char *str)
00078 {
00079   shell_output("Available commands:", "");
00080   shell_output("stats   - show network statistics", "");
00081   shell_output("conn    - show TCP connections", "");
00082   shell_output("help, ? - show help", "");
00083   shell_output("exit    - exit shell", "");
00084 }
00085 /*---------------------------------------------------------------------------*/
00086 static void
00087 unknown(char *str)
00088 {
00089   if(strlen(str) > 0) {
00090     shell_output("Unknown command: ", str);
00091   }
00092 }
00093 /*---------------------------------------------------------------------------*/
00094 static struct ptentry parsetab[] =
00095   {{"stats", help},
00096    {"conn", help},
00097    {"help", help},
00098    {"exit", shell_quit},
00099    {"?", help},
00100
00101    /* Default action */
00102    {NULL, unknown}};
00103 /*---------------------------------------------------------------------------*/
00104 void
00105 shell_init(void)
00106 {
00107 }
00108 /*---------------------------------------------------------------------------*/
00109 void
00110 shell_start(void)
00111 {
00112   shell_output("uIP command shell", "");
00113   shell_output("Type '?' and return for help", "");
00114   shell_prompt(SHELL_PROMPT);
00115 }
00116 /*---------------------------------------------------------------------------*/
00117 void
00118 shell_input(char *cmd)
00119 {
00120   parse(cmd, parsetab);
00121   shell_prompt(SHELL_PROMPT);
00122 }
00123 /*---------------------------------------------------------------------------*/
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/shell.h
Go to the documentation of this file.
00001
00012 /*
00013  * Copyright (c) 2003, Adam Dunkels.
00014  * All rights reserved.
00015  *
00016  * Redistribution and use in source and binary forms, with or without
00017  * modification, are permitted provided that the following conditions
00018  * are met:
00019  * 1. Redistributions of source code must retain the above copyright
00020  *    notice, this list of conditions and the following disclaimer.
00021  * 2. Redistributions in binary form must reproduce the above copyright
00022  *    notice, this list of conditions and the following disclaimer in the
00023  *    documentation and/or other materials provided with the distribution.
00024  * 3. The name of the author may not be used to endorse or promote
00025  *    products derived from this software without specific prior
00026  *    written permission.
00027  *
00028  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00029  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00030  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00031  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00032  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00033  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00034  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00035  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00036  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00037  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00038  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00039  *
00040  * This file is part of the Contiki desktop OS.
00041  *
00042  * $Id: shell.h,v 1.1 2006/06/07 09:43:54 adam Exp $
00043  *
00044  */
00045 #ifndef __SHELL_H__
00046 #define __SHELL_H__
00047
00054 void shell_init(void);
00055
00061 void shell_start(void);
00062
00072 void shell_input(char *command);
00073
00078 void shell_quit(char *);
00079
00080
00091 void shell_output(char *str1, char *str2);
00092
00102 void shell_prompt(char *prompt);
00103
00104 #endif /* __SHELL_H__ */
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/I2C/slave/slave.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/I2C/slave/slave.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          slave.c                                 2010-05-21
00003 */
00025 #include "lpc17xx_i2c.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINITIONS *************************/
00038 #define USEDI2CDEV_S            0
00039
00040 #define I2CDEV_S_OWN_ADDR       (0x90>>1)
00041
00043 #define BUFFER_SIZE                     0x10
00044
00045 #if (USEDI2CDEV_S == 0)
00046 #define I2CDEV_S LPC_I2C0
00047 #elif (USEDI2CDEV_S == 2)
00048 #define I2CDEV_S LPC_I2C2
00049 #else
00050 #error "Slave I2C device not defined!"
00051 #endif
00052
00053 /************************** PRIVATE VARIABLES *************************/
00054 uint8_t menu1[] =
00055 "********************************************************************************\n\r"
00056 "Hello NXP Semiconductors \n\r"
00057 "I2C demo \n\r"
00058 "\t - MCU: LPC17xx \n\r"
00059 "\t - Core: ARM Cortex-M3 \n\r"
00060 "\t - This example uses I2C as slave device to transfer data \n\r"
00061 " to/from I2C master device \n\r"
00062 "********************************************************************************\n\r";
00063
00065 uint8_t Slave_Buf[BUFFER_SIZE];
00066 uint8_t slave_test[2];
00067
00068 /************************** PRIVATE FUNCTIONS *************************/
00069 void print_menu(void);
00070 void Buffer_Init(uint8_t type);
00071
00072 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00073 /*********************************************************************/
00078 void print_menu(void)
00079 {
00080         _DBG_(menu1);
00081 }
00082
00083 /*********************************************************************/
00093 void Buffer_Init(uint8_t type)
00094 {
00095         uint8_t i;
00096
00097         if (type)
00098         {
00099                 for (i = 0; i < BUFFER_SIZE; i++) {
00100                         Slave_Buf[i] = i;
00101                 }
00102         }
00103         else
00104         {
00105                 for (i = 0; i < BUFFER_SIZE; i++) {
00106                         Slave_Buf[i] = 0;
00107                 }
00108         }
00109 }
00110
00111
00112 /*-------------------------MAIN FUNCTION------------------------------*/
00113 /*********************************************************************/
00118 int c_entry(void)
00119 {
00120         PINSEL_CFG_Type PinCfg;
00121         I2C_OWNSLAVEADDR_CFG_Type OwnSlavAdr;
00122         I2C_S_SETUP_Type transferSCfg;
00123         uint32_t tempp;
00124         uint8_t *pdat;
00125
00126         /* Initialize debug via UART0
00127          * – 115200bps
00128          * – 8 data bit
00129          * – No parity
00130          * – 1 stop bit
00131          * – No flow control
00132          */
00133         debug_frmwrk_init();
00134
00135         print_menu();
00136
00137         /* I2C block ------------------------------------------------------------------- */
00138
00139         /*
00140          * Init I2C pin connect
00141          */
00142         PinCfg.OpenDrain = 0;
00143         PinCfg.Pinmode = 0;
00144 #if ((USEDI2CDEV_S == 0))
00145         PinCfg.Funcnum = 1;
00146         PinCfg.Pinnum = 27;
00147         PinCfg.Portnum = 0;
00148         PINSEL_ConfigPin(&PinCfg);
00149         PinCfg.Pinnum = 28;
00150         PINSEL_ConfigPin(&PinCfg);
00151 #endif
00152 #if ((USEDI2CDEV_S == 2))
00153         PinCfg.Funcnum = 2;
00154         PinCfg.Pinnum = 10;
00155         PinCfg.Portnum = 0;
00156         PINSEL_ConfigPin(&PinCfg);
00157         PinCfg.Pinnum = 11;
00158         PINSEL_ConfigPin(&PinCfg);
00159 #endif
00160
00161         // Initialize Slave I2C peripheral
00162         I2C_Init(I2CDEV_S, 100000);
00163
00164         /* Set  Own slave address for I2C device */
00165         OwnSlavAdr.GeneralCallState = ENABLE;
00166         OwnSlavAdr.SlaveAddrChannel= 0;
00167         OwnSlavAdr.SlaveAddrMaskValue = 0xFF;
00168         OwnSlavAdr.SlaveAddr_7bit = I2CDEV_S_OWN_ADDR;
00169         I2C_SetOwnSlaveAddr(I2CDEV_S, &OwnSlavAdr);
00170
00171         /* Enable Slave I2C operation */
00172         I2C_Cmd(I2CDEV_S, ENABLE);
00173
00174         _DBG_("Press '1' to start");
00175         while (_DG != '1');
00176
00177
00178         /* Reading -------------------------------------------------------- */
00179         _DBG_("Start Reading...");
00180
00181         /* Initialize buffer */
00182         Buffer_Init(0);
00183
00184         /* Start I2C slave device first */
00185         transferSCfg.tx_data = NULL;
00186         transferSCfg.tx_length = 0;
00187         transferSCfg.rx_data = Slave_Buf;
00188         transferSCfg.rx_length = sizeof(Slave_Buf);
00189         I2C_SlaveTransferData(I2CDEV_S, &transferSCfg, I2C_TRANSFER_POLLING);
00190
00191         pdat = Slave_Buf;
00192         // Verify
00193         for (tempp = 0; tempp < sizeof(Slave_Buf); tempp++){
00194                 if (*pdat++ != tempp){
00195                         _DBG_("Verify error");
00196                         break;
00197                 }
00198         }
00199         if (tempp == sizeof(Slave_Buf)){
00200                 _DBG_("Verify successfully");
00201         }
00202
00203         /* Transmit -------------------------------------------------------- */
00204         _DBG_("Start Transmit...");
00205
00206         /* Initialize buffer */
00207         Buffer_Init(1);
00208
00209         /* Start I2C slave device first */
00210         transferSCfg.tx_data = Slave_Buf;
00211         transferSCfg.tx_length = sizeof(Slave_Buf);
00212         transferSCfg.rx_data = NULL;
00213         transferSCfg.rx_length = 0;
00214         I2C_SlaveTransferData(I2CDEV_S, &transferSCfg, I2C_TRANSFER_POLLING);
00215
00216         _DBG_("Complete!");
00217
00218 #if 1
00219         /* Receive and transmit -------------------------------------------------------- */
00220         _DBG_("Start Receive, wait for repeat start and transmit...");
00221
00222         /* Initialize buffer */
00223         Buffer_Init(1);
00224         slave_test[0] = 0xAA;
00225         slave_test[1] = 0x55;
00226
00227         /* Start I2C slave device first */
00228         transferSCfg.tx_data = Slave_Buf;
00229         transferSCfg.tx_length = sizeof(Slave_Buf);
00230         transferSCfg.rx_data = slave_test;
00231         transferSCfg.rx_length = sizeof(slave_test);
00232         I2C_SlaveTransferData(I2CDEV_S, &transferSCfg, I2C_TRANSFER_POLLING);
00233         _DBG_("Receive Data:");
00234         _DBH(slave_test[0]); _DBG_("");
00235         _DBH(slave_test[1]); _DBG_("");
00236         _DBG_("Complete!");
00237 #endif
00238
00239
00240     /* Loop forever */
00241     while(1);
00242 }
00243
00244 /* With ARM and GHS toolsets, the entry point is main() - this will
00245    allow the linker to generate wrapper code to setup stacks, allocate
00246    heap area, and initialize and copy code and data segments. For GNU
00247    toolsets, the entry point is through __start() in the crt0_gnu.asm
00248    file, and that startup code will setup stacks and data */
00249 int main(void)
00250 {
00251     return c_entry();
00252 }
00253
00254
00255 #ifdef  DEBUG
00256 /*******************************************************************************
00257 * @brief                Reports the name of the source file and the source line number
00258 *                               where the CHECK_PARAM error has occurred.
00259 * @param[in]    file Pointer to the source file name
00260 * @param[in]    line assert_param error line source number
00261 * @return               None
00262 *******************************************************************************/
00263 void check_failed(uint8_t *file, uint32_t line)
00264 {
00265         /* User can add his own implementation to report the file name and line number,
00266          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00267
00268         /* Infinite loop */
00269         while(1);
00270 }
00271 #endif
00272
00273 /*
00274  * @}
00275  */
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp-strings.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp-strings.c
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004, Adam Dunkels.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: smtp-strings.c,v 1.3 2006/06/11 21:46:37 adam Exp $
00034  */
00035 const char smtp_220[4] =
00036 /* "220" */
00037 {0x32, 0x32, 0x30, };
00038 const char smtp_helo[6] =
00039 /* "HELO " */
00040 {0x48, 0x45, 0x4c, 0x4f, 0x20, };
00041 const char smtp_mail_from[12] =
00042 /* "MAIL FROM: " */
00043 {0x4d, 0x41, 0x49, 0x4c, 0x20, 0x46, 0x52, 0x4f, 0x4d, 0x3a, 0x20, };
00044 const char smtp_rcpt_to[10] =
00045 /* "RCPT TO: " */
00046 {0x52, 0x43, 0x50, 0x54, 0x20, 0x54, 0x4f, 0x3a, 0x20, };
00047 const char smtp_data[7] =
00048 /* "DATA\r\n" */
00049 {0x44, 0x41, 0x54, 0x41, 0xd, 0xa, };
00050 const char smtp_to[5] =
00051 /* "To: " */
00052 {0x54, 0x6f, 0x3a, 0x20, };
00053 const char smtp_cc[5] =
00054 /* "Cc: " */
00055 {0x43, 0x63, 0x3a, 0x20, };
00056 const char smtp_from[7] =
00057 /* "From: " */
00058 {0x46, 0x72, 0x6f, 0x6d, 0x3a, 0x20, };
00059 const char smtp_subject[10] =
00060 /* "Subject: " */
00061 {0x53, 0x75, 0x62, 0x6a, 0x65, 0x63, 0x74, 0x3a, 0x20, };
00062 const char smtp_quit[7] =
00063 /* "QUIT\r\n" */
00064 {0x51, 0x55, 0x49, 0x54, 0xd, 0xa, };
00065 const char smtp_crnl[3] =
00066 /* "\r\n" */
00067 {0xd, 0xa, };
00068 const char smtp_crnlperiodcrnl[6] =
00069 /* "\r\n.\r\n" */
00070 {0xd, 0xa, 0x2e, 0xd, 0xa, };
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp-strings.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp-strings.h
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004, Adam Dunkels.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: smtp-strings.h,v 1.3 2006/06/11 21:46:37 adam Exp $
00034  */
00035 extern const char smtp_220[4];
00036 extern const char smtp_helo[6];
00037 extern const char smtp_mail_from[12];
00038 extern const char smtp_rcpt_to[10];
00039 extern const char smtp_data[7];
00040 extern const char smtp_to[5];
00041 extern const char smtp_cc[5];
00042 extern const char smtp_from[7];
00043 extern const char smtp_subject[10];
00044 extern const char smtp_quit[7];
00045 extern const char smtp_crnl[3];
00046 extern const char smtp_crnlperiodcrnl[6];
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.c
Go to the documentation of this file.
00001
00026 /*
00027  * Copyright (c) 2004, Adam Dunkels.
00028  * All rights reserved.
00029  *
00030  * Redistribution and use in source and binary forms, with or without
00031  * modification, are permitted provided that the following conditions
00032  * are met:
00033  * 1. Redistributions of source code must retain the above copyright
00034  *    notice, this list of conditions and the following disclaimer.
00035  * 2. Redistributions in binary form must reproduce the above copyright
00036  *    notice, this list of conditions and the following disclaimer in the
00037  *    documentation and/or other materials provided with the distribution.
00038  * 3. Neither the name of the Institute nor the names of its contributors
00039  *    may be used to endorse or promote products derived from this software
00040  *    without specific prior written permission.
00041  *
00042  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00043  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00044  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00045  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00046  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00047  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00048  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00049  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00050  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00051  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00052  * SUCH DAMAGE.
00053  *
00054  * This file is part of the uIP TCP/IP stack.
00055  *
00056  * Author: Adam Dunkels <adam@sics.se>
00057  *
00058  * $Id: smtp.c,v 1.4 2006/06/11 21:46:37 adam Exp $
00059  */
00060 #include "smtp.h"
00061
00062 #include "smtp-strings.h"
00063 #include "psock.h"
00064 #include "uip.h"
00065
00066 #include <string.h>
00067
00068 static struct smtp_state s;
00069
00070 static char *localhostname;
00071 static uip_ipaddr_t smtpserver;
00072
00073 #define ISO_nl 0x0a
00074 #define ISO_cr 0x0d
00075
00076 #define ISO_period 0x2e
00077
00078 #define ISO_2  0x32
00079 #define ISO_3  0x33
00080 #define ISO_4  0x34
00081 #define ISO_5  0x35
00082
00083
00084 /*---------------------------------------------------------------------------*/
00085 static
00086 PT_THREAD(smtp_thread(void))
00087 {
00088   PSOCK_BEGIN(&s.psock);
00089
00090   PSOCK_READTO(&s.psock, ISO_nl);
00091
00092   if(strncmp(s.inputbuffer, smtp_220, 3) != 0) {
00093     PSOCK_CLOSE(&s.psock);
00094     smtp_done(2);
00095     PSOCK_EXIT(&s.psock);
00096   }
00097
00098   PSOCK_SEND_STR(&s.psock, (char *)smtp_helo);
00099   PSOCK_SEND_STR(&s.psock, localhostname);
00100   PSOCK_SEND_STR(&s.psock, (char *)smtp_crnl);
00101
00102   PSOCK_READTO(&s.psock, ISO_nl);
00103
00104   if(s.inputbuffer[0] != ISO_2) {
00105     PSOCK_CLOSE(&s.psock);
00106     smtp_done(3);
00107     PSOCK_EXIT(&s.psock);
00108   }
00109
00110   PSOCK_SEND_STR(&s.psock, (char *)smtp_mail_from);
00111   PSOCK_SEND_STR(&s.psock, s.from);
00112   PSOCK_SEND_STR(&s.psock, (char *)smtp_crnl);
00113
00114   PSOCK_READTO(&s.psock, ISO_nl);
00115
00116   if(s.inputbuffer[0] != ISO_2) {
00117     PSOCK_CLOSE(&s.psock);
00118     smtp_done(4);
00119     PSOCK_EXIT(&s.psock);
00120   }
00121
00122   PSOCK_SEND_STR(&s.psock, (char *)smtp_rcpt_to);
00123   PSOCK_SEND_STR(&s.psock, s.to);
00124   PSOCK_SEND_STR(&s.psock, (char *)smtp_crnl);
00125
00126   PSOCK_READTO(&s.psock, ISO_nl);
00127
00128   if(s.inputbuffer[0] != ISO_2) {
00129     PSOCK_CLOSE(&s.psock);
00130     smtp_done(5);
00131     PSOCK_EXIT(&s.psock);
00132   }
00133
00134   if(s.cc != 0) {
00135     PSOCK_SEND_STR(&s.psock, (char *)smtp_rcpt_to);
00136     PSOCK_SEND_STR(&s.psock, s.cc);
00137     PSOCK_SEND_STR(&s.psock, (char *)smtp_crnl);
00138
00139     PSOCK_READTO(&s.psock, ISO_nl);
00140
00141     if(s.inputbuffer[0] != ISO_2) {
00142       PSOCK_CLOSE(&s.psock);
00143       smtp_done(6);
00144       PSOCK_EXIT(&s.psock);
00145     }
00146   }
00147
00148   PSOCK_SEND_STR(&s.psock, (char *)smtp_data);
00149
00150   PSOCK_READTO(&s.psock, ISO_nl);
00151
00152   if(s.inputbuffer[0] != ISO_3) {
00153     PSOCK_CLOSE(&s.psock);
00154     smtp_done(7);
00155     PSOCK_EXIT(&s.psock);
00156   }
00157
00158   PSOCK_SEND_STR(&s.psock, (char *)smtp_to);
00159   PSOCK_SEND_STR(&s.psock, s.to);
00160   PSOCK_SEND_STR(&s.psock, (char *)smtp_crnl);
00161
00162   if(s.cc != 0) {
00163     PSOCK_SEND_STR(&s.psock, (char *)smtp_cc);
00164     PSOCK_SEND_STR(&s.psock, s.cc);
00165     PSOCK_SEND_STR(&s.psock, (char *)smtp_crnl);
00166   }
00167
00168   PSOCK_SEND_STR(&s.psock, (char *)smtp_from);
00169   PSOCK_SEND_STR(&s.psock, s.from);
00170   PSOCK_SEND_STR(&s.psock, (char *)smtp_crnl);
00171
00172   PSOCK_SEND_STR(&s.psock, (char *)smtp_subject);
00173   PSOCK_SEND_STR(&s.psock, s.subject);
00174   PSOCK_SEND_STR(&s.psock, (char *)smtp_crnl);
00175
00176   PSOCK_SEND(&s.psock, s.msg, s.msglen);
00177
00178   PSOCK_SEND_STR(&s.psock, (char *)smtp_crnlperiodcrnl);
00179
00180   PSOCK_READTO(&s.psock, ISO_nl);
00181   if(s.inputbuffer[0] != ISO_2) {
00182     PSOCK_CLOSE(&s.psock);
00183     smtp_done(8);
00184     PSOCK_EXIT(&s.psock);
00185   }
00186
00187   PSOCK_SEND_STR(&s.psock, (char *)smtp_quit);
00188   smtp_done(SMTP_ERR_OK);
00189   PSOCK_END(&s.psock);
00190 }
00191 /*---------------------------------------------------------------------------*/
00192 void
00193 smtp_appcall(void)
00194 {
00195   if(uip_closed()) {
00196     s.connected = 0;
00197     return;
00198   }
00199   if(uip_aborted() || uip_timedout()) {
00200     s.connected = 0;
00201     smtp_done(1);
00202     return;
00203   }
00204   smtp_thread();
00205 }
00206 /*---------------------------------------------------------------------------*/
00218 void
00219 smtp_configure(char *lhostname, void *server)
00220 {
00221   localhostname = lhostname;
00222   uip_ipaddr_copy(smtpserver, server);
00223 }
00224 /*---------------------------------------------------------------------------*/
00235 unsigned char
00236 smtp_send(char *to, char *cc, char *from,
00237           char *subject, char *msg, u16_t msglen)
00238 {
00239   struct uip_conn *conn;
00240
00241   conn = uip_connect(smtpserver, HTONS(25));
00242   if(conn == NULL) {
00243     return 0;
00244   }
00245   s.connected = 1;
00246   s.to = to;
00247   s.cc = cc;
00248   s.from = from;
00249   s.subject = subject;
00250   s.msg = msg;
00251   s.msglen = msglen;
00252
00253   PSOCK_INIT(&s.psock, s.inputbuffer, sizeof(s.inputbuffer));
00254
00255   return 1;
00256 }
00257 /*---------------------------------------------------------------------------*/
00258 void
00259 smtp_init(void)
00260 {
00261   s.connected = 0;
00262 }
00263 /*---------------------------------------------------------------------------*/
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/smtp/smtp.h
Go to the documentation of this file.
00001
00014 /*
00015  * Copyright (c) 2002, Adam Dunkels.
00016  * All rights reserved.
00017  *
00018  * Redistribution and use in source and binary forms, with or without
00019  * modification, are permitted provided that the following conditions
00020  * are met:
00021  * 1. Redistributions of source code must retain the above copyright
00022  *    notice, this list of conditions and the following disclaimer.
00023  * 2. Redistributions in binary form must reproduce the above copyright
00024  *    notice, this list of conditions and the following disclaimer in the
00025  *    documentation and/or other materials provided with the distribution.
00026  * 3. The name of the author may not be used to endorse or promote
00027  *    products derived from this software without specific prior
00028  *    written permission.
00029  *
00030  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00031  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00032  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00033  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00034  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00035  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00036  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00037  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00038  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00039  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00040  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00041  *
00042  * This file is part of the uIP TCP/IP stack.
00043  *
00044  * $Id: smtp.h,v 1.4 2006/06/11 21:46:37 adam Exp $
00045  *
00046  */
00047 #ifndef __SMTP_H__
00048 #define __SMTP_H__
00049
00050 #include "uipopt.h"
00051
00055 #define SMTP_ERR_OK 0
00056
00067 void smtp_done(unsigned char error);
00068
00069 void smtp_init(void);
00070
00071 /* Functions. */
00072 void smtp_configure(char *localhostname, u16_t *smtpserver);
00073 unsigned char smtp_send(char *to, char *from,
00074                         char *subject, char *msg,
00075                         u16_t msglen);
00076 #define SMTP_SEND(to, cc, from, subject, msg) \
00077         smtp_send(to, cc, from, subject, msg, strlen(msg))
00078
00079 void smtp_appcall(void);
00080
00081 struct smtp_state {
00082   u8_t state;
00083   char *to;
00084   char *from;
00085   char *subject;
00086   char *msg;
00087   u16_t msglen;
00088
00089   u16_t sentlen, textlen;
00090   u16_t sendptr;
00091
00092 };
00093
00094
00095 #ifndef UIP_APPCALL
00096 #define UIP_APPCALL     smtp_appcall
00097 #endif
00098 typedef struct smtp_state uip_tcp_appstate_t;
00099
00100
00101 #endif /* __SMTP_H__ */
00102
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_int/spi_interrupt_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_int/spi_interrupt_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          spi_interrupt_test.c                                    2010-05-21
00003 */
00027 #include "lpc17xx_spi.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "lpc17xx_pinsel.h"
00030 #include "debug_frmwrk.h"
00031 #include "lpc17xx_gpio.h"
00032
00033 /* Example group ----------------------------------------------------------- */
00039 /************************** PRIVATE DEFINTIONS *********************/
00040 // PORT number that /CS pin assigned on
00041 #define CS_PORT_NUM             0
00042 // PIN number that  /CS pin assigned on
00043 #define CS_PIN_NUM              16
00044
00045 /* Idle char */
00046 #define IDLE_CHAR       0xFF
00047
00048 // Define macro used in command when using SPI with SC16IS740
00049 #define SC16IS740_WR_CMD(x)             ((uint8_t) (x << 3))
00050 #define SC16IS740_RD_CMD(x)             ((uint8_t) ((x << 3) | 0x80))
00051
00052 // Define register address of SC16IS740
00053 #define SC16IS740_IODIR_REG             0x0A
00054 #define SC16IS740_IOSTATE_REG   0x0B
00055 #define SC16IS740_IOCON_REG             0x0E
00056
00057 /************************** PRIVATE VARIABLES *************************/
00058 uint8_t menu1[] =
00059 "********************************************************************************\n\r"
00060 "Hello NXP Semiconductors \n\r"
00061 "SPI demo \n\r"
00062 "\t - MCU: LPC17xx \n\r"
00063 "\t - Core: ARM Cortex-M3 \n\r"
00064 "\t - Communicate via: UART0 - 115200bps \n\r"
00065 " Communicate with SPI function on SC16IS750/760 Demo Board\n\r"
00066 " Use IO function on SC16IS740/750/760 chip to turn ON/OFF LEDs\n\r"
00067 "Press '1' to turn ON LEDs, '2' to turn OFF LEDs \n\r"
00068 "********************************************************************************\n\r";
00069 uint8_t menu2[] = "Demo terminated! \n\r";
00070
00071 uint8_t iocon_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00};
00072 uint8_t iodir_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF};
00073 uint8_t iostate_on[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00};
00074 uint8_t iostate_off[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF};
00075 uint8_t spireadbuf[2];
00076
00077 /* Status Flag indicates current SPI transmission complete or not */
00078 __IO FlagStatus complete;
00079
00080 // SPI Configuration structure variable
00081 SPI_CFG_Type SPI_ConfigStruct;
00082 // SPI Data Setup structure variable
00083 SPI_DATA_SETUP_Type xferConfig;
00084
00085
00086 /************************** PRIVATE FUNCTIONS *************************/
00087 void SPI_IRQHandler(void);
00088
00089 void CS_Init(void);
00090 void CS_Force(int32_t state);
00091 void print_menu(void);
00092
00093 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00094 /*********************************************************************/
00099 void SPI_IRQHandler(void)
00100 {
00101         SPI_DATA_SETUP_Type *xf_setup;
00102         uint16_t tmp;
00103         uint8_t dataword;
00104
00105         xf_setup = &xferConfig;
00106
00107         if(SPI_GetDataSize(LPC_SPI) == 8)
00108                 dataword = 0;
00109         else dataword = 1;
00110
00111         /* Dummy read to clear SPI interrupt flag */
00112         SPI_ClearIntPending(LPC_SPI);
00113
00114         // save status
00115         tmp = SPI_GetStatus(LPC_SPI);
00116         xf_setup->status = tmp;
00117         // Check for error
00118         if (tmp & (SPI_SPSR_ABRT | SPI_SPSR_MODF | SPI_SPSR_ROVR | SPI_SPSR_WCOL)){
00119                 xf_setup->status |= SPI_STAT_ERROR;
00120                 // Disable Interrupt and call call-back
00121                 SPI_IntCmd(LPC_SPI, DISABLE);
00122                 // Set Complete Flag
00123                 complete = SET;
00124                 return;
00125         }
00126
00127         /* Check SPI complete flag */
00128         if (tmp & SPI_SPSR_SPIF){
00129            // Read data from SPI data
00130                 tmp = SPI_ReceiveData(LPC_SPI);
00131                 if (xf_setup->rx_data != NULL)
00132                 {
00133                         if (dataword == 0){
00134                                 *(uint8_t *)((uint8_t *)(xf_setup->rx_data) + xf_setup->counter) = (uint8_t) tmp;
00135                         } else {
00136                                 *(uint16_t *)((uint8_t *)(xf_setup->rx_data) + xf_setup->counter) = (uint8_t) tmp;
00137                         }
00138                 }
00139                 // Increase counter
00140                 if (dataword == 0){
00141                         xf_setup->counter++;
00142                 } else {
00143                         xf_setup->counter += 2;
00144                 }
00145         }
00146
00147         if (xf_setup->counter < xf_setup->length){
00148                 // Write data to buffer
00149                 if(xf_setup->tx_data == NULL){
00150                         if (dataword == 0){
00151                                 SPI_SendData(LPC_SPI, 0xFF);
00152                         } else {
00153                                 SPI_SendData(LPC_SPI, 0xFFFF);
00154                         }
00155                 } else {
00156                         if (dataword == 0){
00157                                 SPI_SendData(LPC_SPI, (*(uint8_t *)((uint8_t *)(xf_setup->tx_data) + xf_setup->counter)));
00158                         } else {
00159                                 SPI_SendData(LPC_SPI, (*(uint16_t *)((uint8_t *)(xf_setup->tx_data) + xf_setup->counter)));
00160                         }
00161                 }
00162         }
00163         // No more data to send
00164         else {
00165                 xf_setup->status |= SPI_STAT_DONE;
00166                 // Disable Interrupt and call call-back
00167                 SPI_IntCmd(LPC_SPI, DISABLE);
00168                 // Set Complete Flag
00169                 complete = SET;
00170         }
00171 }
00172
00173 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00174 /*********************************************************************/
00180 void CS_Init(void)
00181 {
00182         GPIO_SetDir(CS_PORT_NUM, (1<<CS_PIN_NUM), 1);
00183         GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00184 }
00185
00186
00187 /*********************************************************************/
00195 void CS_Force(int32_t state)
00196 {
00197         if (state){
00198                 GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00199         }else{
00200                 GPIO_ClearValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00201         }
00202 }
00203
00204
00205 /*********************************************************************/
00210 void print_menu(void)
00211 {
00212         _DBG(menu1);
00213 }
00214
00215 /*-------------------------MAIN FUNCTION------------------------------*/
00216 /*********************************************************************/
00221 int c_entry(void)
00222 {
00223         uint8_t tmpchar[2] = {0, 0};
00224         PINSEL_CFG_Type PinCfg;
00225         __IO FlagStatus exitflag;
00226
00227         /*
00228          * Initialize SPI pin connect
00229          * P0.15 - SCK;
00230          * P0.16 - SSEL - used as GPIO
00231          * P0.17 - MISO
00232          * P0.18 - MOSI
00233          */
00234         PinCfg.Funcnum = 3;
00235         PinCfg.OpenDrain = 0;
00236         PinCfg.Pinmode = 0;
00237         PinCfg.Portnum = 0;
00238         PinCfg.Pinnum = 15;
00239         PINSEL_ConfigPin(&PinCfg);
00240         PinCfg.Pinnum = 17;
00241         PINSEL_ConfigPin(&PinCfg);
00242         PinCfg.Pinnum = 18;
00243         PINSEL_ConfigPin(&PinCfg);
00244         PinCfg.Pinnum = 16;
00245         PinCfg.Funcnum = 0;
00246         PINSEL_ConfigPin(&PinCfg);
00247
00248         /* Initialize debug via UART0
00249          * – 115200bps
00250          * – 8 data bit
00251          * – No parity
00252          * – 1 stop bit
00253          * – No flow control
00254          */
00255         debug_frmwrk_init();
00256
00257         // print welcome screen
00258         print_menu();
00259
00260         // initialize SPI configuration structure to default
00261         SPI_ConfigStructInit(&SPI_ConfigStruct);
00262         // Initialize SPI peripheral with parameter given in structure above
00263         SPI_Init(LPC_SPI, &SPI_ConfigStruct);
00264
00265         // Initialize /CS pin to GPIO function
00266         CS_Init();
00267
00268     /* preemption = 1, sub-priority = 1 */
00269     NVIC_SetPriority(SPI_IRQn, ((0x01<<3)|0x01));
00270     /* Enable SSP0 interrupt */
00271     NVIC_EnableIRQ(SPI_IRQn);
00272
00273         /* First, send some command to reset SC16IS740 chip via SPI bus interface
00274          * note driver /CS pin to low state before transferring by CS_Enable() function
00275          */
00276         complete = RESET;
00277         CS_Force(0);
00278         xferConfig.tx_data = iocon_cfg;
00279         xferConfig.rx_data = spireadbuf;
00280         xferConfig.length = sizeof (iocon_cfg);
00281         SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_INTERRUPT);
00282         while (complete == RESET);
00283         CS_Force(1);
00284
00285         complete = RESET;
00286         CS_Force(0);
00287         xferConfig.tx_data = iodir_cfg;
00288         xferConfig.rx_data = spireadbuf;
00289         xferConfig.length = sizeof (iodir_cfg);
00290         SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_INTERRUPT);
00291         while (complete == RESET);
00292         CS_Force(1);
00293
00294         // Reset exit flag
00295         exitflag = RESET;
00296
00297         // Start to use SPI polling mode
00298         /* Read some data from the buffer */
00299         while (exitflag == RESET)
00300         {
00301                 while((tmpchar[0] = _DG) == 0);
00302
00303                 if (tmpchar[0] == 27){
00304                         /* ESC key, set exit flag */
00305                         _DBG_(menu2);
00306                         exitflag = SET;
00307                 }
00308                 else if (tmpchar[0] == 'r'){
00309                         print_menu();
00310                 } else {
00311                         if (tmpchar[0] == '1')
00312                         {
00313                                 // LEDs are ON now...
00314                                 CS_Force(0);
00315                                 xferConfig.tx_data = iostate_on;
00316                                 xferConfig.rx_data = spireadbuf;
00317                                 xferConfig.length = sizeof (iostate_on);
00318                                 SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_POLLING);
00319                                 CS_Force(1);
00320                         }
00321                         else if (tmpchar[0] == '2')
00322                         {
00323                                 // LEDs are OFF now...
00324                                 CS_Force(0);
00325                                 xferConfig.tx_data = iostate_off;
00326                                 xferConfig.rx_data = spireadbuf;
00327                                 xferConfig.length = sizeof (iostate_off);
00328                                 SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_POLLING);
00329                                 CS_Force(1);
00330                         }
00331                         /* Then Echo it back */
00332                         _DBG_(tmpchar);
00333                 }
00334         }
00335     // DeInitialize UART0 peripheral
00336     SPI_DeInit(LPC_SPI);
00337     /* Loop forever */
00338     while(1);
00339 }
00340
00341 /* With ARM and GHS toolsets, the entry point is main() - this will
00342    allow the linker to generate wrapper code to setup stacks, allocate
00343    heap area, and initialize and copy code and data segments. For GNU
00344    toolsets, the entry point is through __start() in the crt0_gnu.asm
00345    file, and that startup code will setup stacks and data */
00346 int main(void)
00347 {
00348     return c_entry();
00349 }
00350
00351
00352 #ifdef  DEBUG
00353 /*******************************************************************************
00354 * @brief                Reports the name of the source file and the source line number
00355 *                               where the CHECK_PARAM error has occurred.
00356 * @param[in]    file Pointer to the source file name
00357 * @param[in]    line assert_param error line source number
00358 * @return               None
00359 *******************************************************************************/
00360 void check_failed(uint8_t *file, uint32_t line)
00361 {
00362         /* User can add his own implementation to report the file name and line number,
00363          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00364
00365         /* Infinite loop */
00366         while(1);
00367 }
00368 #endif
00369
00370 /*
00371  * @}
00372  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/LoopBack/spi_loopback_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/LoopBack/spi_loopback_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          spi_loopback_test.c                                     2010-05-21
00003 */
00026 #include "lpc17xx_spi.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_gpio.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00039 /************************** PRIVATE DEFINITIONS *********************/
00040 // PORT number that /CS pin assigned on
00041 #define CS_PORT_NUM             0
00042 // PIN number that  /CS pin assigned on
00043 #define CS_PIN_NUM              16
00044 #define SPI_DATABIT_SIZE                10
00045
00046 #define BUFFER_SIZE                     0x40
00047
00048 /************************** PRIVATE VARIABLES *************************/
00049 uint8_t menu1[] =
00050 "********************************************************************************\n\r"
00051 "Hello NXP Semiconductors \n\r"
00052 "SPI demo \n\r"
00053 "\t - MCU: LPC17xx \n\r"
00054 "\t - Core: ARM Cortex-M3 \n\r"
00055 "\t - Communicate via: UART0 - 115200bps \n\r"
00056 "\t An example of SPI using polling mode with loop-back (MISO <-> MOSI) \n\r"
00057 "\t connection to test SPI driver \n\r"
00058 "********************************************************************************\n\r";
00059 uint8_t menu2[] = "Demo terminated! \n\r";
00060
00061 // SPI Configuration structure variable
00062 SPI_CFG_Type SPI_ConfigStruct;
00063
00064 #if (SPI_DATABIT_SIZE == 8)
00065 uint8_t Tx_Buf[BUFFER_SIZE];
00066 uint8_t Rx_Buf[BUFFER_SIZE];
00067 #else
00068 uint16_t Tx_Buf[BUFFER_SIZE];
00069 uint16_t Rx_Buf[BUFFER_SIZE];
00070 #endif
00071
00072 /************************** PRIVATE FUNCTIONS *************************/
00073 void print_menu(void);
00074 void Buffer_Init(void);
00075 void Error_Loop(void);
00076 void Buffer_Verify(void);
00077
00078 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00079 /*********************************************************************/
00084 void Buffer_Init(void)
00085 {
00086         uint8_t i;
00087 #if (SPI_DATABIT_SIZE == 8)
00088         for (i = 0; i < BUFFER_SIZE; i++) {
00089                 Tx_Buf[i] = i;
00090                 Rx_Buf[i] = 0;
00091         }
00092 #else
00093         for (i = 0; i < BUFFER_SIZE/2; i++) {
00094                 Tx_Buf[i] = i;
00095                 Rx_Buf[i] = 0;
00096         }
00097 #endif
00098 }
00099
00100 /*********************************************************************/
00105 void Error_Loop(void)
00106 {
00107         /* Loop forever */
00108         while (1);
00109 }
00110
00111 /*********************************************************************/
00116 void Buffer_Verify(void)
00117 {
00118         uint8_t i;
00119 #if (SPI_DATABIT_SIZE==8)
00120         uint8_t *src_addr = (uint8_t *) &Tx_Buf[0];
00121         uint8_t *dest_addr = (uint8_t *) &Rx_Buf[0];
00122         for ( i = 0; i < SPI_DATABIT_SIZE; i++ )
00123         {
00124                 if ( *src_addr++ != *dest_addr++ )
00125                 {
00126                         /* Call Error Loop */
00127                         _DBG_("Verify error");
00128                         Error_Loop();
00129                 }
00130         }
00131 #else
00132         uint16_t *src_addr = (uint16_t *) &Tx_Buf[0];
00133         uint16_t *dest_addr = (uint16_t *) &Rx_Buf[0];
00134         for ( i = 0; i < SPI_DATABIT_SIZE/2; i++ )
00135         {
00136                 if ( *src_addr++ != *dest_addr++ )
00137                 {
00138                         /* Call Error Loop */
00139                         _DBG_("Verify error");
00140                         Error_Loop();
00141                 }
00142         }
00143 #endif
00144
00145 }
00146
00147 /*********************************************************************/
00152 void print_menu(void)
00153 {
00154         _DBG(menu1);
00155 }
00156
00157 /*-------------------------MAIN FUNCTION------------------------------*/
00158 /*********************************************************************/
00163 int c_entry(void)
00164 {
00165         PINSEL_CFG_Type PinCfg;
00166         SPI_DATA_SETUP_Type xferConfig;
00167
00168         /*
00169          * Initialize SPI pin connect
00170          * P0.15 - SCK;
00171          * P0.16 - SSEL - used as GPIO
00172          * P0.17 - MISO
00173          * P0.18 - MOSI
00174          */
00175         PinCfg.Funcnum = 3;
00176         PinCfg.OpenDrain = 0;
00177         PinCfg.Pinmode = 0;
00178         PinCfg.Portnum = 0;
00179         PinCfg.Pinnum = 15;
00180         PINSEL_ConfigPin(&PinCfg);
00181         PinCfg.Pinnum = 17;
00182         PINSEL_ConfigPin(&PinCfg);
00183         PinCfg.Pinnum = 18;
00184         PINSEL_ConfigPin(&PinCfg);
00185         PinCfg.Pinnum = 16;
00186         PinCfg.Funcnum = 0;
00187         PINSEL_ConfigPin(&PinCfg);
00188
00189         /* Initialize debug via UART0
00190          * – 115200bps
00191          * – 8 data bit
00192          * – No parity
00193          * – 1 stop bit
00194          * – No flow control
00195          */
00196         debug_frmwrk_init();
00197
00198         // print welcome screen
00199         print_menu();
00200
00201         SPI_ConfigStruct.CPHA = SPI_CPHA_SECOND;
00202         SPI_ConfigStruct.CPOL = SPI_CPOL_LO;
00203         SPI_ConfigStruct.ClockRate = 2000000;
00204         SPI_ConfigStruct.DataOrder = SPI_DATA_MSB_FIRST;
00205         SPI_ConfigStruct.Databit = SPI_DATABIT_SIZE;
00206         SPI_ConfigStruct.Mode = SPI_MASTER_MODE;
00207         // Initialize SPI peripheral with parameter given in structure above
00208         SPI_Init(LPC_SPI, &SPI_ConfigStruct);
00209
00210         /* Initialize Buffer */
00211         Buffer_Init();
00212
00213         xferConfig.tx_data = Tx_Buf;
00214         xferConfig.rx_data = Rx_Buf;
00215         xferConfig.length = BUFFER_SIZE;
00216         SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_POLLING);
00217
00218         // Verify buffer after transferring
00219         Buffer_Verify();
00220
00221         _DBG_("Verify complete");
00222
00223         SPI_DeInit(LPC_SPI);
00224     /* Loop forever */
00225     while(1);
00226 }
00227
00228 /* With ARM and GHS toolsets, the entry point is main() - this will
00229    allow the linker to generate wrapper code to setup stacks, allocate
00230    heap area, and initialize and copy code and data segments. For GNU
00231    toolsets, the entry point is through __start() in the crt0_gnu.asm
00232    file, and that startup code will setup stacks and data */
00233 int main(void)
00234 {
00235     return c_entry();
00236 }
00237
00238
00239 #ifdef  DEBUG
00240 /*******************************************************************************
00241 * @brief                Reports the name of the source file and the source line number
00242 *                               where the CHECK_PARAM error has occurred.
00243 * @param[in]    file Pointer to the source file name
00244 * @param[in]    line assert_param error line source number
00245 * @return               None
00246 *******************************************************************************/
00247 void check_failed(uint8_t *file, uint32_t line)
00248 {
00249         /* User can add his own implementation to report the file name and line number,
00250          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00251
00252         /* Infinite loop */
00253         while(1);
00254 }
00255 #endif
00256
00257 /*
00258  * @}
00259  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Master/spi_master.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Master/spi_master.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          spi_master.c                                    2010-05-21
00003 */
00025 #include "lpc17xx_spi.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029 #include "lpc17xx_gpio.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS *********************/
00038 // PORT number that /CS pin assigned on
00039 #define CS_PORT_NUM             0
00040 // PIN number that  /CS pin assigned on
00041 #define CS_PIN_NUM              16
00042 #define SPI_DATABIT_SIZE                10
00043
00045 #define BUFFER_SIZE                     0x40
00046
00047 /************************** PRIVATE VARIABLES *************************/
00048 uint8_t menu1[] =
00049 "********************************************************************************\n\r"
00050 "Hello NXP Semiconductors \n\r"
00051 "SPI demo \n\r"
00052 "\t - MCU: LPC17xx \n\r"
00053 "\t - Core: ARM Cortex-M3 \n\r"
00054 "\t - Communicate via: UART0 - 115200bps \n\r"
00055 "\t An example of SPI using interrupt mode to test the SPI driver \n\r"
00056 " This example uses SPI in master mode to communicate with SPI slave device \n\r"
00057 " The master and slave transfer together a number of data byte \n\r"
00058 "********************************************************************************\n\r";
00059 uint8_t menu2[] = "Demo terminated! \n\r";
00060
00061 // SPI Configuration structure variable
00062 SPI_CFG_Type SPI_ConfigStruct;
00063
00064 #if (SPI_DATABIT_SIZE == 8)
00065 uint8_t Tx_Buf[BUFFER_SIZE];
00066 uint8_t Rx_Buf[BUFFER_SIZE];
00067 #else
00068 uint16_t Tx_Buf[BUFFER_SIZE];
00069 uint16_t Rx_Buf[BUFFER_SIZE];
00070 #endif
00071
00072 /************************** PRIVATE FUNCTIONS *************************/
00073 void CS_Init(void);
00074 void CS_Force(int32_t state);
00075 void print_menu(void);
00076 void Buffer_Init(void);
00077 void Error_Loop(void);
00078 void Buffer_Verify(void);
00079
00080 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00081 /*********************************************************************/
00087 void CS_Init(void)
00088 {
00089         GPIO_SetDir(CS_PORT_NUM, (1<<CS_PIN_NUM), 1);
00090         GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00091 }
00092
00093
00094 /*********************************************************************/
00102 void CS_Force(int32_t state)
00103 {
00104         if (state){
00105                 GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00106         }else{
00107                 GPIO_ClearValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00108         }
00109 }
00110
00111 /*********************************************************************/
00116 void Buffer_Init(void)
00117 {
00118         uint8_t i;
00119 #if (SPI_DATABIT_SIZE == 8)
00120         for (i = 0; i < BUFFER_SIZE; i++) {
00121                 Tx_Buf[i] = i;
00122                 Rx_Buf[i] = 0;
00123         }
00124 #else
00125         for (i = 0; i < BUFFER_SIZE/2; i++) {
00126                 Tx_Buf[i] = i;
00127                 Rx_Buf[i] = 0;
00128         }
00129 #endif
00130 }
00131
00132 /*********************************************************************/
00137 void Error_Loop(void)
00138 {
00139         /* Loop forever */
00140         while (1);
00141 }
00142
00143 /*********************************************************************/
00148 void Buffer_Verify(void)
00149 {
00150         uint8_t i;
00151 #if (DATA_SIZE==8)
00152         uint8_t *src_addr = (uint8_t *) &Tx_Buf[0];
00153         uint8_t *dest_addr = (uint8_t *) &Rx_Buf[0];
00154         for ( i = 0; i < SPI_DATABIT_SIZE; i++ )
00155         {
00156                 if ( *src_addr++ != *dest_addr++ )
00157                 {
00158                         /* Call Error Loop */
00159                         _DBG_("Verify error");
00160                         Error_Loop();
00161                 }
00162         }
00163 #else
00164         uint16_t *src_addr = (uint16_t *) &Tx_Buf[0];
00165         uint16_t *dest_addr = (uint16_t *) &Rx_Buf[0];
00166         for ( i = 0; i < SPI_DATABIT_SIZE/2; i++ )
00167         {
00168                 if ( *src_addr++ != *dest_addr++ )
00169                 {
00170                         /* Call Error Loop */
00171                         _DBG_("Verify error");
00172                         Error_Loop();
00173                 }
00174         }
00175 #endif
00176 }
00177
00178 /*********************************************************************/
00183 void print_menu(void)
00184 {
00185         _DBG(menu1);
00186 }
00187
00188 /*-------------------------MAIN FUNCTION------------------------------*/
00189 /*********************************************************************/
00194 int c_entry(void)
00195 {
00196         PINSEL_CFG_Type PinCfg;
00197         SPI_DATA_SETUP_Type xferConfig;
00198         uint32_t tmp;
00199
00200         /*
00201          * Initialize SPI pin connect
00202          * P0.15 - SCK;
00203          * P0.16 - SSEL - used as GPIO
00204          * P0.17 - MISO
00205          * P0.18 - MOSI
00206          */
00207         PinCfg.Funcnum = 3;
00208         PinCfg.OpenDrain = 0;
00209         PinCfg.Pinmode = 0;
00210         PinCfg.Portnum = 0;
00211         PinCfg.Pinnum = 15;
00212         PINSEL_ConfigPin(&PinCfg);
00213         PinCfg.Pinnum = 17;
00214         PINSEL_ConfigPin(&PinCfg);
00215         PinCfg.Pinnum = 18;
00216         PINSEL_ConfigPin(&PinCfg);
00217         PinCfg.Pinnum = 16;
00218         PinCfg.Funcnum = 0;
00219         PINSEL_ConfigPin(&PinCfg);
00220
00221         /* Initialize debug via UART0
00222          * – 115200bps
00223          * – 8 data bit
00224          * – No parity
00225          * – 1 stop bit
00226          * – No flow control
00227          */
00228         debug_frmwrk_init();
00229
00230         // print welcome screen
00231         print_menu();
00232
00233         SPI_ConfigStruct.CPHA = SPI_CPHA_SECOND;
00234         SPI_ConfigStruct.CPOL = SPI_CPOL_LO;
00235         SPI_ConfigStruct.ClockRate = 2000000;
00236         SPI_ConfigStruct.DataOrder = SPI_DATA_MSB_FIRST;
00237         SPI_ConfigStruct.Databit = SPI_DATABIT_SIZE;
00238         SPI_ConfigStruct.Mode = SPI_MASTER_MODE;
00239         // Initialize SPI peripheral with parameter given in structure above
00240         SPI_Init(LPC_SPI, &SPI_ConfigStruct);
00241
00242         _DBG_("Press '1' to start transfer...");
00243
00244         while (_DG != '1');
00245
00246         _DBG_("Init buffer");
00247         /* Initialize Buffer */
00248         Buffer_Init();
00249
00250         CS_Init();
00251
00252         _DBG_("Start transfer...");
00253         CS_Force(0);
00254         // delay for a while
00255         for (tmp = 10000; tmp; tmp--);
00256         xferConfig.tx_data = Tx_Buf;
00257         xferConfig.rx_data = Rx_Buf;
00258         xferConfig.length = BUFFER_SIZE;
00259         SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_POLLING);
00260         // delay for a while
00261         for (tmp = 10000; tmp; tmp--);
00262         CS_Force(1);
00263         _DBG_("Complete!");
00264
00265         // Verify buffer after transferring
00266         Buffer_Verify();
00267         _DBG_("Verify complete!");
00268         SPI_DeInit(LPC_SPI);
00269     /* Loop forever */
00270     while(1);
00271 }
00272
00273 /* With ARM and GHS toolsets, the entry point is main() - this will
00274    allow the linker to generate wrapper code to setup stacks, allocate
00275    heap area, and initialize and copy code and data segments. For GNU
00276    toolsets, the entry point is through __start() in the crt0_gnu.asm
00277    file, and that startup code will setup stacks and data */
00278 int main(void)
00279 {
00280     return c_entry();
00281 }
00282
00283
00284 #ifdef  DEBUG
00285 /*******************************************************************************
00286 * @brief                Reports the name of the source file and the source line number
00287 *                               where the CHECK_PARAM error has occurred.
00288 * @param[in]    file Pointer to the source file name
00289 * @param[in]    line assert_param error line source number
00290 * @return               None
00291 *******************************************************************************/
00292 void check_failed(uint8_t *file, uint32_t line)
00293 {
00294         /* User can add his own implementation to report the file name and line number,
00295          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00296
00297         /* Infinite loop */
00298         while(1);
00299 }
00300 #endif
00301
00302 /*
00303  * @}
00304  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_polling/spi_polling_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/sc16is750_polling/spi_polling_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          spi_polling_test.c                                      2010-05-21
00003 */
00027 #include "lpc17xx_spi.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "lpc17xx_pinsel.h"
00030 #include "debug_frmwrk.h"
00031 #include "lpc17xx_gpio.h"
00032
00033 /* Example group ----------------------------------------------------------- */
00040 /************************** PRIVATE DEFINITONS **********************/
00041 // PORT number that /CS pin assigned on
00042 #define CS_PORT_NUM             0
00043 // PIN number that  /CS pin assigned on
00044 #define CS_PIN_NUM              16
00045
00046 // Define macro used in command when using SPI with SC16IS740
00047 #define SC16IS740_WR_CMD(x)             ((uint8_t) (x << 3))
00048 #define SC16IS740_RD_CMD(x)             ((uint8_t) ((x << 3) | 0x80))
00049
00050 // Define register address of SC16IS740
00051 #define SC16IS740_IODIR_REG             0x0A
00052 #define SC16IS740_IOSTATE_REG   0x0B
00053 #define SC16IS740_IOCON_REG             0x0E
00054
00055
00056 /************************** PRIVATE VARIABLES *************************/
00057 uint8_t menu1[] =
00058 "********************************************************************************\n\r"
00059 "Hello NXP Semiconductors \n\r"
00060 "SPI demo \n\r"
00061 "\t - MCU: LPC17xx \n\r"
00062 "\t - Core: ARM Cortex-M3 \n\r"
00063 "\t - Communicate via: UART0 - 115200 kbps \n\r"
00064 " Communicate with SPI function on SC16IS750/760 Demo Board\n\r"
00065 " Use IO function on SC16IS740/750/760 chip to turn ON/OFF LEDs\n\r"
00066 "Press '1' to turn ON LEDs, '2' to turn OFF LEDs \n\r"
00067 "********************************************************************************\n\r";
00068 uint8_t menu2[] = "Demo terminated! \n\r";
00069
00070 // SPI Configuration structure variable
00071 SPI_CFG_Type SPI_ConfigStruct;
00072
00073 uint8_t iocon_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IOCON_REG), 0x00};
00074 uint8_t iodir_cfg[2] = {SC16IS740_WR_CMD(SC16IS740_IODIR_REG), 0xFF};
00075 uint8_t iostate_on[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0x00};
00076 uint8_t iostate_off[2] = {SC16IS740_WR_CMD(SC16IS740_IOSTATE_REG), 0xFF};
00077 uint8_t spireadbuf[2];
00078
00079
00080 /************************** PRIVATE FUNCTIONS *************************/
00081 void CS_Init(void);
00082 void CS_Force(int32_t state);
00083 void print_menu(void);
00084
00085 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00086 /*********************************************************************/
00092 void CS_Init(void)
00093 {
00094         GPIO_SetDir(CS_PORT_NUM, (1<<CS_PIN_NUM), 1);
00095         GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00096 }
00097
00098
00099 /*********************************************************************/
00107 void CS_Force(int32_t state)
00108 {
00109         if (state){
00110                 GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00111         }else{
00112                 GPIO_ClearValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00113         }
00114 }
00115
00116
00117 /*********************************************************************/
00122 void print_menu(void)
00123 {
00124         _DBG(menu1);
00125 }
00126
00127
00128 /*-------------------------MAIN FUNCTION------------------------------*/
00129 /*********************************************************************/
00134 int c_entry(void)
00135 {
00136         uint8_t tmpchar[2] = {0, 0};
00137         PINSEL_CFG_Type PinCfg;
00138         __IO FlagStatus exitflag;
00139         SPI_DATA_SETUP_Type xferConfig;
00140
00141         /*
00142          * Initialize SPI pin connect
00143          * P0.15 - SCK;
00144          * P0.16 - SSEL - used as GPIO
00145          * P0.17 - MISO
00146          * P0.18 - MOSI
00147          */
00148         PinCfg.Funcnum = 3;
00149         PinCfg.OpenDrain = 0;
00150         PinCfg.Pinmode = 0;
00151         PinCfg.Portnum = 0;
00152         PinCfg.Pinnum = 15;
00153         PINSEL_ConfigPin(&PinCfg);
00154         PinCfg.Pinnum = 17;
00155         PINSEL_ConfigPin(&PinCfg);
00156         PinCfg.Pinnum = 18;
00157         PINSEL_ConfigPin(&PinCfg);
00158         PinCfg.Pinnum = 16;
00159         PinCfg.Funcnum = 0;
00160         PINSEL_ConfigPin(&PinCfg);
00161
00162         /* Initialize debug via UART0
00163          * – 115200bps
00164          * – 8 data bit
00165          * – No parity
00166          * – 1 stop bit
00167          * – No flow control
00168          */
00169         debug_frmwrk_init();
00170
00171         // print welcome screen
00172         print_menu();
00173
00174         // initialize SPI configuration structure to default
00175         SPI_ConfigStructInit(&SPI_ConfigStruct);
00176         // Initialize SPI peripheral with parameter given in structure above
00177         SPI_Init(LPC_SPI, &SPI_ConfigStruct);
00178
00179         // Initialize /CS pin to GPIO function
00180         CS_Init();
00181
00182         /* First, send some command to reset SC16IS740 chip via SPI bus interface
00183          * note driver /CS pin to low state before transferring by CS_Enable() function
00184          */
00185         CS_Force(0);
00186         xferConfig.tx_data = iocon_cfg;
00187         xferConfig.rx_data = spireadbuf;
00188         xferConfig.length = sizeof (iocon_cfg);
00189         SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_POLLING);
00190         CS_Force(1);
00191         CS_Force(0);
00192         xferConfig.tx_data = iodir_cfg;
00193         xferConfig.rx_data = spireadbuf;
00194         xferConfig.length = sizeof (iodir_cfg);
00195         SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_POLLING);
00196         CS_Force(1);
00197
00198         // Reset exit flag
00199         exitflag = RESET;
00200
00201     /* Read some data from the buffer */
00202     while (exitflag == RESET)
00203     {
00204         while((tmpchar[0] = _DG) == 0);
00205
00206         if (tmpchar[0] == 27){
00207                         /* ESC key, set exit flag */
00208                         _DBG_(menu2);
00209                         exitflag = SET;
00210                 }
00211                 else if (tmpchar[0] == 'r'){
00212                         print_menu();
00213                 } else {
00214                         if (tmpchar[0] == '1')
00215                         {
00216                                 // LEDs are ON now...
00217                                 CS_Force(0);
00218                                 xferConfig.tx_data = iostate_on;
00219                                 xferConfig.rx_data = spireadbuf;
00220                                 xferConfig.length = sizeof (iostate_on);
00221                                 SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_POLLING);
00222                                 CS_Force(1);
00223                         }
00224                         else if (tmpchar[0] == '2')
00225                         {
00226                                 // LEDs are OFF now...
00227                                 CS_Force(0);
00228                                 xferConfig.tx_data = iostate_off;
00229                                 xferConfig.rx_data = spireadbuf;
00230                                 xferConfig.length = sizeof (iostate_off);
00231                                 SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_POLLING);
00232                                 CS_Force(1);
00233                         }
00234                         /* Then Echo it back */
00235                         _DBG_(tmpchar);
00236                 }
00237     }
00238     SPI_DeInit(LPC_SPI);
00239     /* Loop forever */
00240     while(1);
00241 }
00242
00243 /* With ARM and GHS toolsets, the entry point is main() - this will
00244    allow the linker to generate wrapper code to setup stacks, allocate
00245    heap area, and initialize and copy code and data segments. For GNU
00246    toolsets, the entry point is through __start() in the crt0_gnu.asm
00247    file, and that startup code will setup stacks and data */
00248 int main(void)
00249 {
00250     return c_entry();
00251 }
00252
00253
00254 #ifdef  DEBUG
00255 /*******************************************************************************
00256 * @brief                Reports the name of the source file and the source line number
00257 *                               where the CHECK_PARAM error has occurred.
00258 * @param[in]    file Pointer to the source file name
00259 * @param[in]    line assert_param error line source number
00260 * @return               None
00261 *******************************************************************************/
00262 void check_failed(uint8_t *file, uint32_t line)
00263 {
00264         /* User can add his own implementation to report the file name and line number,
00265          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00266
00267         /* Infinite loop */
00268         while(1);
00269 }
00270 #endif
00271
00272 /*
00273  * @}
00274  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/SDCard/spi_sdcard.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/SDCard/spi_sdcard.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          spi_sdcard.c                                    2010-07-16
00003 */
00025 #include "lpc17xx_spi.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029 #include "lpc17xx_gpio.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINTIONS *********************/
00038 // PORT number that /CS pin assigned on
00039 #define CS_PORT_NUM             0
00040 // PIN number that  /CS pin assigned on
00041 #define CS_PIN_NUM              16
00042
00043 #define SD_DETECT_PORTNUM       4
00044 #define SD_DETECT_PINNUM        29
00045 typedef enum _sd_connect_status
00046 {
00047         SD_CONNECTED,
00048         SD_DISCONNECTED
00049 }sd_connect_status;
00050 typedef enum _sd_error
00051 {
00052         SD_OK,
00053         SD_NG,
00054         SD_CMD_BAD_PARAMETER,
00055         SD_ERROR_TOKEN,
00056         SD_ERROR_TIMEOUT,
00057         SD_ERROR_BUS_NOT_IDLE,
00058         SD_ERROR_CMD0,
00059         SD_ERROR_CMD55,
00060         SD_ERROR_ACMD41,
00061         SD_ERROR_CMD59
00062 }sd_error;
00063
00064 //SD command code
00065 #define         CMD0_GO_IDLE_STATE            0x00
00066 #define         CMD1_SEND_OPCOND              0x01
00067 #define         CMD9_SEND_CSD                 0x09
00068 #define         CMD10_SEND_CID                0x0a
00069 #define         CMD12_STOP_TRANSMISSION       0x0b
00070 #define         CMD13_SEND_STATUS             0x0c
00071 #define         CMD16_SET_BLOCKLEN            0x10
00072 #define         CMD17_READ_SINGLE_BLOCK       0x11
00073 #define         CMD18_READ_MULTIPLE_BLOCK     0x12
00074 #define         CMD24_WRITE_BLOCK             0x18
00075 #define         CMD25_WRITE_MULTIPLE_BLOCK    0x19
00076 #define         CMD27_PROGRAM_CSD             0x1b
00077 #define         CMD28_SET_WRITE_PROT          0x1c
00078 #define         CMD29_CLR_WRITE_PROT          0x1d
00079 #define         CMD30_SEND_WRITE_PROT         0x1e
00080 #define         CMD32_ERASE_WR_BLK_START_ADDR 0x20
00081 #define         CMD33_ERASE_WR_BLK_END_ADDR   0x21
00082 #define         CMD38_ERASE                   0x26
00083 #define         CMD55_APP_CMD                 0x37
00084 #define         CMD56_GEN_CMD                 0x38
00085 #define         CMD58_READ_OCR                0x3a
00086 #define         CMD59_CRC_ON_OFF              0x3b
00087 /* Application-specific commands (always prefixed with CMD55_APP_CMD) */
00088 #define         ACMD13_SD_STATUS              0x0d
00089 #define         ACMD22_SEND_NUM_WR_BLOCKS     0x16
00090 #define         ACMD23_SET_WR_BLK_ERASE_COUNT 0x17
00091 #define         ACMD41_SEND_OP_COND           0x29
00092 #define         ACMD42_SET_CLR_CARD_DETECT    0x2a
00093 #define         ACMD51_SEND_SCR               0x33
00094 /* R1 format responses (ORed together as a bit-field) */
00095 #define         R1_NOERROR                                0x00
00096 #define         R1_IDLE                                   0x01
00097 #define         R1_ERASE                                  0x02
00098 #define         R1_ILLEGAL                                0x04
00099 #define         R1_CRC_ERR                                0x08
00100 #define         R1_ERASE_SEQ                              0x10
00101 #define         R1_ADDR_ERR                               0x20
00102 #define         R1_PARAM_ERR                              0x40
00103 /* R2 format responses - second byte only, first is identical to R1 */
00104 #define         R2_LOCKED                                 0x01
00105 #define         R2_WP_FAILED                              0x02
00106 #define         R2_ERROR                                  0x04
00107 #define         R2_CTRL_ERR                               0x08
00108 #define         R2_ECC_FAIL                               0x10
00109 #define         R2_WP_VIOL                                0x20
00110 #define         R2_ERASE_PARAM                            0x40
00111 #define         R2_RANGE_ERR                              0x80
00112
00113 #define GETBIT(in, bit) ((in & (1<<bit)) >> bit)
00114 #define SD_CMD_BLOCK_LENGTH             6
00115 #define SD_DATA_BLOCK_LENGTH    515
00116 #define SD_WAIT_R1_TIMEOUT              100000
00117 /************************** PRIVATE VARIABLES *************************/
00118 uint8_t menu1[] =
00119 "********************************************************************************\n\r"
00120 "Hello NXP Semiconductors \n\r"
00121 "SPI communicate with SD card demo \n\r"
00122 "\t - MCU: LPC17xx \n\r"
00123 "\t - Core: ARM Cortex-M3 \n\r"
00124 "\t - Communicate via: UART0 - 115200bps \n\r"
00125 " Demo SPI module, read SD card's CID register and display via UART0\n\r"
00126 "********************************************************************************\n\r";
00127 // SPI Configuration structure variable
00128 SPI_CFG_Type SPI_ConfigStruct;
00129 // SPI Data Setup structure variable
00130 SPI_DATA_SETUP_Type xferConfig;
00131
00132 uint8_t sd_cmd_buf[SD_CMD_BLOCK_LENGTH];
00133 uint8_t sd_data_buf[SD_DATA_BLOCK_LENGTH];
00134 /************************** PRIVATE FUNCTIONS *************************/
00135 void CS_Init(void);
00136 void CS_Force(int32_t state);
00137 void print_menu(void);
00138 sd_connect_status SD_GetCardConnectStatus(void);
00139 uint8_t crc_7(uint8_t old_crc, uint8_t data);
00140 uint8_t crc_7final(uint8_t old_crc);
00141 uint32_t SD_SendReceiveData_Polling(void* tx_buf, void* rx_buf, uint32_t length);
00142 void SD_SendCommand(uint8_t cmd, uint8_t *arg);
00143 sd_error SD_WaitR1(uint8_t *buffer, uint32_t length, uint32_t timeout);
00144 sd_error SD_WaitDeviceIdle(uint32_t num_char);
00145 sd_error SD_Init(uint8_t retries);
00146 sd_error SD_GetCID(void);
00147 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00148
00149 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00150
00151 /*********************************************************************/
00157 void CS_Init(void)
00158 {
00159         GPIO_SetDir(CS_PORT_NUM, (1<<CS_PIN_NUM), 1);
00160         GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00161 }
00162 /*********************************************************************/
00170 void CS_Force(int32_t state)
00171 {
00172         if (state){
00173                 GPIO_SetValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00174         }else{
00175                 GPIO_ClearValue(CS_PORT_NUM, (1<<CS_PIN_NUM));
00176         }
00177 }
00178 /*********************************************************************/
00183 void print_menu(void)
00184 {
00185         _DBG(menu1);
00186 }
00187 /*********************************************************************/
00192 sd_connect_status SD_GetCardConnectStatus(void)
00193 {
00194         sd_connect_status ret=SD_DISCONNECTED;
00195
00196         if((GPIO_ReadValue(SD_DETECT_PORTNUM)&(1<<SD_DETECT_PINNUM))== 0)
00197                 ret = SD_CONNECTED;
00198
00199         return ret;
00200 }
00201 /*********************************************************************/
00208 uint8_t crc_7(uint8_t old_crc, uint8_t data)
00209 {
00210   uint8_t new_crc;
00211   int8_t x;
00212
00213   new_crc = old_crc;
00214   for (x = 7; x >= 0; x--) {
00215     new_crc <<= 1;
00216     new_crc |= GETBIT(data,x);
00217     if (GETBIT(new_crc, 7) == 1) {
00218       new_crc ^= 0x89; /*CRC-7's polynomial is x^7 + x^3 + 1*/
00219     }
00220     if(x==0) break;
00221   }
00222   return new_crc;
00223 }
00224 /*********************************************************************/
00229 uint8_t crc_7final(uint8_t old_crc)
00230 {
00231   uint8_t new_crc,x;
00232
00233   new_crc = old_crc;
00234   for (x = 0; x < 7; x++) {
00235     new_crc <<= 1;
00236     if (GETBIT(new_crc, 7) == 1) {
00237       new_crc ^= 0x89; /*CRC-7's polynomial is x^7 + x^3 + 1*/
00238     }
00239   }
00240   return new_crc;
00241 }
00242 /*********************************************************************/
00251 uint32_t SD_SendReceiveData_Polling(void* tx_buf, void* rx_buf, uint32_t length)
00252 {
00253         //uint16_t i;
00254
00255         CS_Force(0);
00256         //for(i=0;i<1000;i++);
00257
00258         xferConfig.tx_data = tx_buf;
00259         xferConfig.rx_data = rx_buf;
00260         xferConfig.length = length;
00261         SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_POLLING);
00262
00263         //for(i=0;i<1000;i++);
00264         CS_Force(1);
00265         return xferConfig.counter;
00266 }
00267 /*********************************************************************/
00273 void SD_SendCommand(uint8_t cmd, uint8_t *arg)
00274 {
00275         uint8_t crc = 0x00;
00276
00277         /* First byte has framing bits and command */
00278         sd_cmd_buf[0] = 0x40 | (cmd & 0x3f);
00279         sd_cmd_buf[1] = arg[0];
00280         sd_cmd_buf[2] = arg[1];
00281         sd_cmd_buf[3] = arg[2];
00282         sd_cmd_buf[4] = arg[3];
00283         //calculate CRC
00284         crc = crc_7(crc, sd_cmd_buf[0]);//start new crc-7
00285         crc = crc_7(crc, sd_cmd_buf[1]);
00286         crc = crc_7(crc, sd_cmd_buf[2]);
00287         crc = crc_7(crc, sd_cmd_buf[3]);
00288         crc = crc_7(crc, sd_cmd_buf[4]);
00289         crc = crc_7final(crc);
00290         sd_cmd_buf[5] = (crc << 1) | 0x01;//stop bit
00291
00292         SD_SendReceiveData_Polling(sd_cmd_buf,NULL,SD_CMD_BLOCK_LENGTH);
00293 }
00294 /*********************************************************************/
00302 sd_error SD_WaitR1(uint8_t *buffer, uint32_t length, uint32_t timeout)
00303 {
00304     uint32_t j;
00305         uint8_t dummy[2];
00306         uint8_t wait_idle;
00307
00308         /* No null pointers allowed */
00309         if (buffer == NULL)     return SD_CMD_BAD_PARAMETER;
00310
00311         /* Wait for start bit on R1 */
00312         j=0;dummy[0]=0xFF;
00313         while (GETBIT(dummy[0],7) == 1)
00314         {
00315                 if (j>timeout)return SD_ERROR_TIMEOUT;
00316                 dummy[0]=0x00;
00317                 SD_SendReceiveData_Polling(NULL,dummy,1);
00318                 j++;
00319         }
00320         *buffer=dummy[0];//store R1
00321         if (length > 0)//read followed data
00322         {
00323                 /* Wait for start token on data portion, if any */
00324                 dummy[0] = 0xff;j = 0;
00325                 while (dummy[0] != 0xfe)
00326                 {
00327                         if (j > timeout)return SD_ERROR_TIMEOUT;
00328                         dummy[0]=0x00;
00329                         SD_SendReceiveData_Polling(NULL,dummy,1);
00330                         if ((dummy[0] != 0xff) && (dummy[0] != 0xfe)) // not idle or start token?
00331                         {
00332                                 return SD_ERROR_TOKEN;
00333                         }
00334                         j++;
00335                 }
00336                 /* Read all bytes */
00337                 SD_SendReceiveData_Polling(NULL,(buffer+1),(length - 1));
00338         }
00339         /* Some more bit clocks to finish internal SD operations */
00340         dummy[0]=0x00;wait_idle=0;
00341         while((dummy[0]!=0xff)&&(wait_idle<20))
00342         {
00343                 dummy[0]=0x00;
00344                 SD_SendReceiveData_Polling(NULL,dummy,1);
00345                 for(j=0;j<1000;j++);
00346                 wait_idle++;
00347         }
00348         if(wait_idle>=20) return SD_ERROR_BUS_NOT_IDLE;
00349         return SD_OK;
00350 }
00351 /*********************************************************************/
00356 sd_error SD_WaitDeviceIdle(uint32_t num_char)
00357 {
00358         uint8_t dummy[2]={0,0};
00359         uint32_t i=0;
00360
00361         while ((i < num_char) && (dummy[0] != 0xff))
00362         {
00363                 dummy[0]=0x00;
00364                 SD_SendReceiveData_Polling(NULL,dummy,1);
00365                 if (dummy[0] == 0xff)
00366                 {
00367                         dummy[0]= 0x00;
00368                         SD_SendReceiveData_Polling(NULL,dummy,1);
00369                         if (dummy[0] == 0xff)
00370                         {
00371                                 dummy[0]= 0x00;
00372                                 SD_SendReceiveData_Polling(NULL,dummy,1);
00373                         }
00374                 }
00375                 i++;
00376         }
00377         if (dummy[0] != 0xff)return SD_ERROR_TIMEOUT;
00378
00379         return SD_OK;
00380 }
00381 /*********************************************************************/
00386 sd_error SD_Init(uint8_t retries)
00387 {
00388         uint8_t rxdata,errors;
00389         uint8_t SD_arg[4]={0,0,0,0};
00390         uint16_t i;
00391
00392         // initialize SPI configuration structure to default
00393         SPI_ConfigStructInit(&SPI_ConfigStruct);
00394         // Initialize SPI peripheral with parameter given in structure above
00395         SPI_Init(LPC_SPI, &SPI_ConfigStruct);
00396         // Initialize /CS pin to GPIO function
00397         CS_Init();
00398         // check for SD card insertion
00399         _DBG("\n\rPlease plug-in SD card!");
00400         while(SD_GetCardConnectStatus()==SD_DISCONNECTED);
00401         _DBG("...Connected!\n\r");
00402         // Wait for bus idle
00403         if(SD_WaitDeviceIdle(160) != SD_OK) return SD_ERROR_BUS_NOT_IDLE;
00404         _DBG("Initialize SD card in SPI mode...");
00405
00406         errors = 0;
00407         /* Send the CMD0_GO_IDLE_STATE while CS is asserted */
00408         /* This signals the SD card to fall back to SPI mode */
00409         while(errors < retries)
00410         {
00411                 SD_SendCommand(CMD0_GO_IDLE_STATE, SD_arg);
00412                 if(SD_WaitR1(&rxdata,0,1000)!= SD_OK)
00413                 {
00414                         errors++;
00415                         continue;
00416                 }
00417                 if(rxdata != R1_IDLE)
00418                 {
00419                         errors++;
00420                         continue;
00421                 }
00422                 else break;
00423         }
00424         if(errors >= retries)return SD_ERROR_CMD0;
00425
00426         /* Check if the card is not MMC */
00427         /* Start its internal initialization process */
00428         while(1)
00429         {
00430                 SD_SendCommand(CMD55_APP_CMD, SD_arg);
00431                 if(SD_WaitR1(&rxdata,0,1000)!= SD_OK) return SD_ERROR_CMD55;
00432
00433                 SD_SendCommand(ACMD41_SEND_OP_COND, SD_arg);
00434                 SD_WaitR1(&rxdata,0,1000);
00435                 if (rxdata & R1_IDLE) //in_idle_state = 1
00436                         for (i = 0; i < 1000; i++); /* wait for a while */
00437                 else break; //in_idle_state=0 --> ready
00438         }
00439         /* Enable CRC */
00440         SD_arg[3] = 0x01;
00441         SD_SendCommand(CMD59_CRC_ON_OFF, SD_arg);
00442         if(SD_WaitR1(&rxdata,0,1000)!= SD_OK) return SD_ERROR_CMD59;
00443         if(rxdata != R1_NOERROR) return SD_ERROR_CMD59;
00444
00445         return SD_OK;
00446 }
00447 /*********************************************************************/
00453 sd_error SD_GetCID(void)
00454 {
00455         uint8_t SD_arg[4]={0,0,0,0};
00456
00457         SD_SendCommand(CMD10_SEND_CID, SD_arg);
00458         if(SD_WaitR1(sd_data_buf,18,1000)!= SD_OK) return SD_NG;
00459         if(sd_data_buf[0]!= R1_NOERROR) return SD_NG;
00460         return SD_OK;
00461 }
00462 /*-------------------------MAIN FUNCTION------------------------------*/
00463 /*********************************************************************/
00468 int c_entry(void)
00469 {
00470         PINSEL_CFG_Type PinCfg;
00471         sd_error sd_status;
00472         uint8_t i;
00473         uint8_t tem8;
00474         uint32_t tem32;
00475         /*
00476          * Initialize SPI pin connect
00477          * P0.15 - SCK;
00478          * P0.16 - SSEL - used as GPIO
00479          * P0.17 - MISO
00480          * P0.18 - MOSI
00481          */
00482         PinCfg.Funcnum = 3;
00483         PinCfg.OpenDrain = 0;
00484         PinCfg.Pinmode = 0;
00485         PinCfg.Portnum = 0;
00486         PinCfg.Pinnum = 15;
00487         PINSEL_ConfigPin(&PinCfg);
00488         PinCfg.Pinnum = 17;
00489         PINSEL_ConfigPin(&PinCfg);
00490         PinCfg.Pinnum = 18;
00491         PINSEL_ConfigPin(&PinCfg);
00492         PinCfg.Pinnum = 16;
00493         PinCfg.Funcnum = 0;
00494         PINSEL_ConfigPin(&PinCfg);
00495         //Initialize SD card detection pin P4.29
00496         PinCfg.Portnum = 4;
00497         PinCfg.Pinnum = 29;
00498         PinCfg.Funcnum = 0;//GPIO function
00499         PINSEL_ConfigPin(&PinCfg);
00500         GPIO_SetDir(SD_DETECT_PORTNUM, (1<<SD_DETECT_PINNUM), 0);//input
00501
00502         /* Initialize debug via UART0
00503          * – 115200bps
00504          * – 8 data bit
00505          * – No parity
00506          * – 1 stop bit
00507          * – No flow control
00508          */
00509         debug_frmwrk_init();
00510
00511         // print welcome screen
00512         print_menu();
00513
00514         //initialize SD card
00515         sd_status = SD_Init(10);
00516         switch(sd_status)
00517         {
00518         case SD_ERROR_CMD0:
00519                 _DBG("Fail CMD0\n\r");
00520                 break;
00521         case SD_ERROR_CMD55:
00522                 _DBG("Fail CMD55\n\r");
00523                 break;
00524         case SD_ERROR_ACMD41:
00525                 _DBG("Fail ACMD41\n\r");
00526                 break;
00527         case SD_ERROR_CMD59:
00528                 _DBG("Fail CMD59\n\r");
00529                 break;
00530         case SD_ERROR_BUS_NOT_IDLE:
00531                 _DBG("Fail...Device is not in idle state.\n\r");
00532                 break;
00533         case SD_OK:
00534                 _DBG("Done!\n\r");
00535                 break;
00536         default:
00537                 _DBG("Fail\n\r");
00538                 break;
00539         }
00540         if(sd_status == SD_OK)
00541         {
00542                 //Clear receive buffer
00543                 for(i=1;i<18;i++)sd_data_buf[i]=0;
00544
00545                 _DBG("Reading SD card's CID register...");
00546                 if(SD_GetCID()!= SD_OK)
00547                 {
00548                         _DBG("Fail\n\r");
00549                         SPI_DeInit(LPC_SPI);
00550                 }
00551                 else
00552                 {
00553                         _DBG("Done!");
00554                         _DBG("\n\rManufacture ID: ");_DBH(sd_data_buf[1]);
00555                         _DBG("\n\rApplication ID: ");_DBC(sd_data_buf[2]);_DBC(sd_data_buf[3]);
00556                         _DBG("\n\rProduct name: ");
00557                                 for(i=4;i<9;i++) _DBC(sd_data_buf[i]);
00558                         _DBG("\n\rProduct revision: ");
00559                                 tem8 = (sd_data_buf[9]&0xF0)>>4;_DBD(tem8);
00560                                 _DBG(".");
00561                                 tem8 = (sd_data_buf[9]&0x0F);_DBD(tem8);
00562                         _DBG("\n\rProduct serial number: ");
00563                                 tem32= (sd_data_buf[13]<<24)|(sd_data_buf[12]<<16)|
00564                                                 (sd_data_buf[11]<<8)|(sd_data_buf[10]<<0);
00565                                 _DBH32(tem32);
00566                         _DBG("\n\rManufacturing date: ");
00567                                 tem8 = (sd_data_buf[15]&0x0F);_DBD(tem8);
00568                                 _DBG("/");
00569                                 tem8 = ((sd_data_buf[14]&0x0F)<<4) | ((sd_data_buf[15]&0xF0)>>4);
00570                                 _DBG("2");_DBD(tem8);
00571                 }
00572         }
00573         else
00574     // DeInitialize SPI peripheral
00575                 SPI_DeInit(LPC_SPI);
00576     /* Loop forever */
00577     while(1);
00578 }
00579
00580 /* With ARM and GHS toolsets, the entry point is main() - this will
00581    allow the linker to generate wrapper code to setup stacks, allocate
00582    heap area, and initialize and copy code and data segments. For GNU
00583    toolsets, the entry point is through __start() in the crt0_gnu.asm
00584    file, and that startup code will setup stacks and data */
00585 int main(void)
00586 {
00587     return c_entry();
00588 }
00589
00590
00591 #ifdef  DEBUG
00592 /*******************************************************************************
00593 * @brief                Reports the name of the source file and the source line number
00594 *                               where the CHECK_PARAM error has occurred.
00595 * @param[in]    file Pointer to the source file name
00596 * @param[in]    line assert_param error line source number
00597 * @return               None
00598 *******************************************************************************/
00599 void check_failed(uint8_t *file, uint32_t line)
00600 {
00601         /* User can add his own implementation to report the file name and line number,
00602          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00603
00604         /* Infinite loop */
00605         while(1);
00606 }
00607 #endif
00608 /*
00609  * @}
00610  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Slave/spi_slave.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SPI/Slave/spi_slave.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          spi_slave.c                                     2010-05-21
00003 */
00025 #include "lpc17xx_spi.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029 #include "lpc17xx_gpio.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS ***********************/
00039 #define BUFFER_SIZE                             0x40
00040 #define SPI_DATABIT_SIZE                10
00041
00042 /************************** PRIVATE VARIABLES *************************/
00043 uint8_t menu1[] =
00044 "********************************************************************************\n\r"
00045 "Hello NXP Semiconductors \n\r"
00046 "SPI demo \n\r"
00047 "\t - MCU: LPC17xx \n\r"
00048 "\t - Core: ARM Cortex-M3 \n\r"
00049 "\t - Communicate via: UART0 - 115200bps \n\r"
00050 "\t An example of SPI using interrupt mode to test the SPI driver \n\r"
00051 " This example uses SPI in slave mode to communicate with SPI slave device \n\r"
00052 " The master and slave transfer together a number of data byte \n\r"
00053 "********************************************************************************\n\r";
00054 uint8_t menu2[] = "Demo terminated! \n\r";
00055
00056 // SPI Configuration structure variable
00057 SPI_CFG_Type SPI_ConfigStruct;
00058
00059 #if (SPI_DATABIT_SIZE == 8)
00060 uint8_t Tx_Buf[BUFFER_SIZE];
00061 uint8_t Rx_Buf[BUFFER_SIZE];
00062 #else
00063 uint16_t Tx_Buf[BUFFER_SIZE];
00064 uint16_t Rx_Buf[BUFFER_SIZE];
00065 #endif
00066
00067
00068 /************************** PRIVATE FUNCTIONS *************************/
00069 void print_menu(void);
00070 void Buffer_Init(void);
00071 void Error_Loop(void);
00072 void Buffer_Verify(void);
00073
00074 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00075 /*********************************************************************/
00080 void Buffer_Init(void)
00081 {
00082         uint8_t i;
00083 #if (SPI_DATABIT_SIZE == 8)
00084         for (i = 0; i < BUFFER_SIZE; i++) {
00085                 Tx_Buf[i] = i;
00086                 Rx_Buf[i] = 0;
00087         }
00088 #else
00089         for (i = 0; i < BUFFER_SIZE/2; i++) {
00090                 Tx_Buf[i] = i;
00091                 Rx_Buf[i] = 0;
00092         }
00093 #endif
00094 }
00095
00096 /*********************************************************************/
00101 void Error_Loop(void)
00102 {
00103         /* Loop forever */
00104         while (1);
00105 }
00106
00107
00108 /*********************************************************************/
00113 void Buffer_Verify(void)
00114 {
00115         uint8_t i;
00116 #if (DATA_SIZE==8)
00117         uint8_t *src_addr = (uint8_t *) &Tx_Buf[0];
00118         uint8_t *dest_addr = (uint8_t *) &Rx_Buf[0];
00119         for ( i = 0; i < SPI_DATABIT_SIZE; i++ )
00120         {
00121                 if ( *src_addr++ != *dest_addr++ )
00122                 {
00123                         /* Call Error Loop */
00124                         _DBG_("Verify error");
00125                         Error_Loop();
00126                 }
00127         }
00128 #else
00129         uint16_t *src_addr = (uint16_t *) &Tx_Buf[0];
00130         uint16_t *dest_addr = (uint16_t *) &Rx_Buf[0];
00131         for ( i = 0; i < SPI_DATABIT_SIZE/2; i++ )
00132         {
00133                 if ( *src_addr++ != *dest_addr++ )
00134                 {
00135                         /* Call Error Loop */
00136                         _DBG_("Verify error");
00137                         Error_Loop();
00138                 }
00139         }
00140 #endif
00141 }
00142
00143
00144 /*********************************************************************/
00149 void print_menu(void)
00150 {
00151         _DBG(menu1);
00152 }
00153
00154
00155
00156 /*-------------------------MAIN FUNCTION------------------------------*/
00157 /*********************************************************************/
00162 int c_entry(void)
00163 {
00164         PINSEL_CFG_Type PinCfg;
00165         SPI_DATA_SETUP_Type xferConfig;
00166
00167         /*
00168          * Initialize SPI pin connect
00169          * P0.15 - SCK;
00170          * P0.16 - SSEL
00171          * P0.17 - MISO
00172          * P0.18 - MOSI
00173          */
00174         PinCfg.Funcnum = 3;
00175         PinCfg.OpenDrain = 0;
00176         PinCfg.Pinmode = 0;
00177         PinCfg.Portnum = 0;
00178         PinCfg.Pinnum = 15;
00179         PINSEL_ConfigPin(&PinCfg);
00180         PinCfg.Pinnum = 17;
00181         PINSEL_ConfigPin(&PinCfg);
00182         PinCfg.Pinnum = 18;
00183         PINSEL_ConfigPin(&PinCfg);
00184         PinCfg.Pinnum = 16;
00185         PINSEL_ConfigPin(&PinCfg);
00186
00187         /* Initialize debug via UART0
00188          * – 115200bps
00189          * – 8 data bit
00190          * – No parity
00191          * – 1 stop bit
00192          * – No flow control
00193          */
00194         debug_frmwrk_init();
00195
00196         // print welcome screen
00197         print_menu();
00198
00199         SPI_ConfigStruct.CPHA = SPI_CPHA_SECOND;
00200         SPI_ConfigStruct.CPOL = SPI_CPOL_LO;
00201         SPI_ConfigStruct.ClockRate = 2000000;
00202         SPI_ConfigStruct.DataOrder = SPI_DATA_MSB_FIRST;
00203         SPI_ConfigStruct.Databit = SPI_DATABIT_SIZE;
00204         SPI_ConfigStruct.Mode = SPI_SLAVE_MODE;
00205         // Initialize SPI peripheral with parameter given in structure above
00206         SPI_Init(LPC_SPI, &SPI_ConfigStruct);
00207
00208
00209         /* Initialize Buffer */
00210         _DBG("Init buffer...");
00211         Buffer_Init();
00212         _DBG_("Complete!"); _DBG_("Wait for master transfer data...");
00213         xferConfig.tx_data = Tx_Buf;
00214         xferConfig.rx_data = Rx_Buf;
00215         xferConfig.length = BUFFER_SIZE;
00216         SPI_ReadWrite(LPC_SPI, &xferConfig, SPI_TRANSFER_POLLING);
00217         _DBG_("Transfer complete!");
00218
00219         // Verify buffer after transferring
00220         Buffer_Verify();
00221         _DBG_("Verify complete!");
00222
00223     /* Loop forever */
00224         SPI_DeInit(LPC_SPI);
00225     while(1);
00226 }
00227
00228 /* With ARM and GHS toolsets, the entry point is main() - this will
00229    allow the linker to generate wrapper code to setup stacks, allocate
00230    heap area, and initialize and copy code and data segments. For GNU
00231    toolsets, the entry point is through __start() in the crt0_gnu.asm
00232    file, and that startup code will setup stacks and data */
00233 int main(void)
00234 {
00235     return c_entry();
00236 }
00237
00238
00239 #ifdef  DEBUG
00240 /*******************************************************************************
00241 * @brief                Reports the name of the source file and the source line number
00242 *                               where the CHECK_PARAM error has occurred.
00243 * @param[in]    file Pointer to the source file name
00244 * @param[in]    line assert_param error line source number
00245 * @return               None
00246 *******************************************************************************/
00247 void check_failed(uint8_t *file, uint32_t line)
00248 {
00249         /* User can add his own implementation to report the file name and line number,
00250          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00251
00252         /* Infinite loop */
00253         while(1);
00254 }
00255 #endif
00256
00257 /*
00258  * @}
00259  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/dma/ssp_dma.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/dma/ssp_dma.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          ssp_dma.c                                       2010-05-21
00003 */
00027 #include "lpc17xx_ssp.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "lpc17xx_pinsel.h"
00030 #include "lpc17xx_gpdma.h"
00031 #include "debug_frmwrk.h"
00032
00033 /* Example group ----------------------------------------------------------- */
00039 /************************** PRIVATE DEFINITIONS ***********************/
00040 /* For DMA controller */
00041 #define DMA_DATA_SIZE   65
00042
00043 /************************** PRIVATE VARIABLES *************************/
00044 uint8_t menu1[] =
00045 "********************************************************************************\n\r"
00046 "Hello NXP Semiconductors \n\r"
00047 "SSP demo \n\r"
00048 "\t - MCU: LPC17xx \n\r"
00049 "\t - Core: ARM Cortex-M3 \n\r"
00050 "\t - Communicate via: UART0 - 115200bps \n\r"
00051 " This example uses SSP function in MASTER mode \n\r"
00052 " with Loop-back mode (MOSI <-> MISO) \n\r"
00053 " Transfer 64 bytes of data (in DMA mode for both Tx and Rx \n\r"
00054 " channel) \n\r"
00055 "********************************************************************************\n\r";
00056 uint8_t menu2[] = "Demo terminated! \n\r";
00057
00058 // SSP Configuration structure variable
00059 SSP_CFG_Type SSP_ConfigStruct;
00060
00061 // Terminal Counter flag for Channel 0
00062 __IO uint32_t Channel0_TC;
00063
00064 // Error Counter flag for Channel 0
00065 __IO uint32_t Channel0_Err;
00066
00067 // Terminal Counter flag for Channel 1
00068 __IO uint32_t Channel1_TC;
00069
00070 // Error Counter flag for Channel 1
00071 __IO uint32_t Channel1_Err;
00072
00073 // DMA source variable
00074 uint8_t dma_src[DMA_DATA_SIZE];
00075
00076 // DMA source variable
00077 uint8_t dma_dst[DMA_DATA_SIZE];
00078
00079
00080 /************************** PRIVATE FUNCTIONS *************************/
00081 void DMA_IRQHandler (void);
00082
00083 void print_menu(void);
00084 void Buffer_Init(void);
00085 void Buffer_Verify(void);
00086 void Error_Loop(void);
00087
00088 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00089 /*********************************************************************/
00094 void DMA_IRQHandler (void)
00095 {
00096         // check GPDMA interrupt on channel 0
00097         if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 0)){
00098                 // Check counter terminal status
00099                 if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 0)){
00100                         // Clear terminate counter Interrupt pending
00101                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 0);
00102                                 Channel0_TC++;
00103                 }
00104                 // Check error terminal status
00105                 if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, 0)){
00106                         // Clear error counter Interrupt pending
00107                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 0);
00108                         Channel0_Err++;
00109                 }
00110         }
00111         // check GPDMA interrupt on channel 1
00112         if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 1)){
00113                 // Check counter terminal status
00114                 if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 1)){
00115                         // Clear terminate counter Interrupt pending
00116                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 1);
00117                                 Channel1_TC++;
00118                 }
00119                 // Check error terminal status
00120                 if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, 1)){
00121                         // Clear error counter Interrupt pending
00122                         GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 1);
00123                         Channel1_Err++;
00124                 }
00125         }
00126 }
00127
00128 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00129 /*********************************************************************/
00134 void Buffer_Init(void)
00135 {
00136         uint32_t i;
00137         uint8_t *src_addr = (uint8_t *)dma_src;
00138         uint8_t *dest_addr = (uint8_t *)dma_dst;
00139
00140          for ( i = 0; i < DMA_DATA_SIZE; i++ )
00141         {
00142                 *src_addr++ = i;
00143                 *dest_addr++ = 0;
00144         }
00145 }
00146
00147 /*********************************************************************/
00152 void Buffer_Verify(void)
00153 {
00154         uint32_t i;
00155         uint8_t *src_addr = (uint8_t *)dma_src;
00156         uint8_t *dest_addr = (uint8_t *)dma_dst;
00157
00158         for ( i = 0; i < DMA_DATA_SIZE; i++ )
00159         {
00160                 if ( *src_addr++ != *dest_addr++ )
00161                 {
00162                         /* Call Error Loop */
00163                         _DBG_("Verify error");
00164                         Error_Loop();
00165                 }
00166         }
00167 }
00168
00169 /*********************************************************************/
00174 void Error_Loop(void)
00175 {
00176         /* Loop forever */
00177         while (1);
00178 }
00179
00180 /*********************************************************************/
00185 void print_menu(void)
00186 {
00187         _DBG(menu1);
00188 }
00189
00190 /*-------------------------MAIN FUNCTION------------------------------*/
00191 /*********************************************************************/
00196 int c_entry(void)
00197 {
00198         GPDMA_Channel_CFG_Type GPDMACfg;
00199         PINSEL_CFG_Type PinCfg;
00200
00201         /*
00202          * Initialize SSP pin connect
00203          * P0.15 - SCK;
00204          * P0.16 - SSEL
00205          * P0.17 - MISO
00206          * P0.18 - MOSI
00207          */
00208         PinCfg.Funcnum = 2;
00209         PinCfg.OpenDrain = 0;
00210         PinCfg.Pinmode = 0;
00211         PinCfg.Portnum = 0;
00212         PinCfg.Pinnum = 15;
00213         PINSEL_ConfigPin(&PinCfg);
00214         PinCfg.Pinnum = 16;
00215         PINSEL_ConfigPin(&PinCfg);
00216         PinCfg.Pinnum = 17;
00217         PINSEL_ConfigPin(&PinCfg);
00218         PinCfg.Pinnum = 18;
00219         PINSEL_ConfigPin(&PinCfg);
00220
00221         /* Initialize debug via UART0
00222          * – 115200bps
00223          * – 8 data bit
00224          * – No parity
00225          * – 1 stop bit
00226          * – No flow control
00227          */
00228         debug_frmwrk_init();
00229
00230         // print welcome screen
00231         print_menu();
00232
00233         /* Initializing SSP device section ------------------------------------------------------ */
00234         // initialize SSP configuration structure to default
00235         SSP_ConfigStructInit(&SSP_ConfigStruct);
00236         // Initialize SSP peripheral with parameter given in structure above
00237         SSP_Init(LPC_SSP0, &SSP_ConfigStruct);
00238
00239         // Enable SSP peripheral
00240         SSP_Cmd(LPC_SSP0, ENABLE);
00241
00242
00243         /* GPDMA Interrupt configuration section ------------------------------------------------- */
00244         /* preemption = 1, sub-priority = 1 */
00245         NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
00246         /* Enable SSP0 interrupt */
00247         NVIC_EnableIRQ(DMA_IRQn);
00248
00249
00250         /* Initializing Buffer section ----------------------------------------------------------- */
00251         Buffer_Init();
00252
00253     /* Initialize GPDMA controller */
00254         GPDMA_Init();
00255
00256
00257         /* Setting GPDMA interrupt */
00258     // Disable interrupt for DMA
00259     NVIC_DisableIRQ (DMA_IRQn);
00260     /* preemption = 1, sub-priority = 1 */
00261     NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
00262
00263
00264     /* Configure GPDMA channel 0 -------------------------------------------------------------*/
00265     /* DMA Channel 0 */
00266     GPDMACfg.ChannelNum = 0;
00267         // Source memory
00268         GPDMACfg.SrcMemAddr = (uint32_t) &dma_src;
00269         // Destination memory - Not used
00270         GPDMACfg.DstMemAddr = 0;
00271         // Transfer size
00272         GPDMACfg.TransferSize = sizeof(dma_src);
00273         // Transfer width - not used
00274         GPDMACfg.TransferWidth = 0;
00275         // Transfer type
00276         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2P;
00277         // Source connection - unused
00278         GPDMACfg.SrcConn = 0;
00279         // Destination connection
00280         GPDMACfg.DstConn = GPDMA_CONN_SSP0_Tx;
00281         // Linker List Item - unused
00282         GPDMACfg.DMALLI = 0;
00283         // Setup channel with given parameter
00284         GPDMA_Setup(&GPDMACfg);
00285
00286         /* Reset terminal counter */
00287         Channel0_TC = 0;
00288         /* Reset Error counter */
00289         Channel0_Err = 0;
00290
00291
00292     /* Configure GPDMA channel 1 -------------------------------------------------------------*/
00293     /* DMA Channel 1 */
00294         GPDMACfg.ChannelNum = 1;
00295         // Source memory - not used
00296         GPDMACfg.SrcMemAddr = 0;
00297         // Destination memory - Not used
00298         GPDMACfg.DstMemAddr = (uint32_t) &dma_dst;
00299         // Transfer size
00300         GPDMACfg.TransferSize = sizeof(dma_dst);
00301         // Transfer width - not used
00302         GPDMACfg.TransferWidth = 0;
00303         // Transfer type
00304         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_P2M;
00305         // Source connection
00306         GPDMACfg.SrcConn = GPDMA_CONN_SSP0_Rx;
00307         // Destination connection - not used
00308         GPDMACfg.DstConn = 0;
00309         // Linker List Item - unused
00310         GPDMACfg.DMALLI = 0;
00311         // Setup channel with given parameter
00312         GPDMA_Setup(&GPDMACfg);
00313
00314         /* Reset terminal counter */
00315         Channel1_TC = 0;
00316         /* Reset Error counter */
00317         Channel1_Err = 0;
00318
00319         _DBG_("Start transfer...");
00320
00321     // Enable Tx and Rx DMA on SSP0
00322         SSP_DMACmd (LPC_SSP0, SSP_DMA_RX, ENABLE);
00323         SSP_DMACmd (LPC_SSP0, SSP_DMA_TX, ENABLE);
00324
00325         // Enable GPDMA channel 0
00326         GPDMA_ChannelCmd(0, ENABLE);
00327         // Enable GPDMA channel 0
00328         GPDMA_ChannelCmd(1, ENABLE);
00329
00330     // Enable interrupt for DMA
00331     NVIC_EnableIRQ (DMA_IRQn);
00332
00333         /* Wait for GPDMA processing complete */
00334         while (((Channel0_TC == 0) && (Channel0_Err == 0)) \
00335                         || ((Channel1_TC == 0) && (Channel1_Err ==0)));
00336
00337         /* Verify buffer */
00338         Buffer_Verify();
00339
00340         _DBG_("Verify complete!");
00341
00342     /* Loop forever */
00343     while(1);
00344 }
00345
00346 /* With ARM and GHS toolsets, the entry point is main() - this will
00347    allow the linker to generate wrapper code to setup stacks, allocate
00348    heap area, and initialize and copy code and data segments. For GNU
00349    toolsets, the entry point is through __start() in the crt0_gnu.asm
00350    file, and that startup code will setup stacks and data */
00351 int main(void)
00352 {
00353     return c_entry();
00354 }
00355
00356
00357 #ifdef  DEBUG
00358 /*******************************************************************************
00359 * @brief                Reports the name of the source file and the source line number
00360 *                               where the CHECK_PARAM error has occurred.
00361 * @param[in]    file Pointer to the source file name
00362 * @param[in]    line assert_param error line source number
00363 * @return               None
00364 *******************************************************************************/
00365 void check_failed(uint8_t *file, uint32_t line)
00366 {
00367         /* User can add his own implementation to report the file name and line number,
00368          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00369
00370         /* Infinite loop */
00371         while(1);
00372 }
00373 #endif
00374
00375 /*
00376  * @}
00377  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Master/ssp_master.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Master/ssp_master.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          ssp_master.c                                    2010-05-21
00003 */
00025 #include "lpc17xx_ssp.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029 #include "lpc17xx_gpio.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINTIONS ************************/
00039 #define BUFFER_SIZE                     0x40
00040
00041
00042 /************************** PRIVATE VARIABLES *************************/
00043 uint8_t menu1[] =
00044 "********************************************************************************\n\r"
00045 "Hello NXP Semiconductors \n\r"
00046 "SSP demo \n\r"
00047 "\t - MCU: LPC17xx \n\r"
00048 "\t - Core: ARM Cortex-M3 \n\r"
00049 "\t - Communicate via: UART0 - 115200bps \n\r"
00050 "\t An example of SSP using polling mode to test the SSP driver \n\r"
00051 " This example uses SSP in SPI mode as master to communicate with an SSP slave device \n\r"
00052 " The master and slave transfer together a number of data byte \n\r"
00053 "********************************************************************************\n\r";
00054 uint8_t menu2[] = "Demo terminated! \n\r";
00055
00056 // SSP Configuration structure variable
00057 SSP_CFG_Type SSP_ConfigStruct;
00058
00059 // Tx buffer
00060 uint8_t Tx_Buf[BUFFER_SIZE];
00061
00062 // Rx buffer
00063 uint8_t Rx_Buf[BUFFER_SIZE];
00064
00065 /************************** PRIVATE FUNCTIONS *************************/
00066 void print_menu(void);
00067 void Buffer_Init(void);
00068 void Error_Loop(void);
00069 void Buffer_Verify(void);
00070
00071 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00072 /*********************************************************************/
00077 void Buffer_Init(void)
00078 {
00079         uint8_t i;
00080
00081         for (i = 0; i < BUFFER_SIZE; i++) {
00082                 Tx_Buf[i] = i;
00083                 Rx_Buf[i] = 0;
00084         }
00085 }
00086
00087 /*********************************************************************/
00092 void Error_Loop(void)
00093 {
00094         /* Loop forever */
00095         while (1);
00096 }
00097
00098
00099 /*********************************************************************/
00104 void Buffer_Verify(void)
00105 {
00106         uint8_t i;
00107         uint8_t *src_addr = (uint8_t *) &Tx_Buf[0];
00108         uint8_t *dest_addr = (uint8_t *) &Rx_Buf[0];
00109
00110         for ( i = 0; i < BUFFER_SIZE; i++ )
00111         {
00112                 if ( *src_addr++ != *dest_addr++ )
00113                 {
00114                         _DBG_("Verify error");
00115                         /* Call Error Loop */
00116                         Error_Loop();
00117                 }
00118         }
00119 }
00120
00121
00122 /*********************************************************************/
00127 void print_menu(void)
00128 {
00129         _DBG(menu1);
00130 }
00131
00132 /*-------------------------MAIN FUNCTION------------------------------*/
00133 /*********************************************************************/
00138 int c_entry(void)
00139 {
00140         PINSEL_CFG_Type PinCfg;
00141         SSP_DATA_SETUP_Type xferConfig;
00142
00143         /*
00144          * Initialize SPI pin connect
00145          * P0.15 - SCK;
00146          * P0.16 - SSEL
00147          * P0.17 - MISO
00148          * P0.18 - MOSI
00149          */
00150         PinCfg.Funcnum = 2;
00151         PinCfg.OpenDrain = 0;
00152         PinCfg.Pinmode = 0;
00153         PinCfg.Portnum = 0;
00154         PinCfg.Pinnum = 15;
00155         PINSEL_ConfigPin(&PinCfg);
00156         PinCfg.Pinnum = 17;
00157         PINSEL_ConfigPin(&PinCfg);
00158         PinCfg.Pinnum = 18;
00159         PINSEL_ConfigPin(&PinCfg);
00160         PinCfg.Pinnum = 16;
00161         PINSEL_ConfigPin(&PinCfg);
00162
00163         /* Initialize debug via UART0
00164          * – 115200bps
00165          * – 8 data bit
00166          * – No parity
00167          * – 1 stop bit
00168          * – No flow control
00169          */
00170         debug_frmwrk_init();
00171
00172         // print welcome screen
00173         print_menu();
00174
00175         // initialize SSP configuration structure to default
00176         SSP_ConfigStructInit(&SSP_ConfigStruct);
00177         // Initialize SSP peripheral with parameter given in structure above
00178         SSP_Init(LPC_SSP0, &SSP_ConfigStruct);
00179
00180         // Enable SSP peripheral
00181         SSP_Cmd(LPC_SSP0, ENABLE);
00182
00183         _DBG_("Press '1' to start transfer...");
00184         while (_DG != '1');
00185
00186         /* Initialize Buffer */
00187         _DBG_("Init buffer");
00188         Buffer_Init();
00189
00190         _DBG_("Start transfer...");
00191
00192         xferConfig.tx_data = Tx_Buf;
00193         xferConfig.rx_data = Rx_Buf;
00194         xferConfig.length = BUFFER_SIZE;
00195         SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
00196
00197         // Verify buffer after transferring
00198         Buffer_Verify();
00199         _DBG_("Verify complete!");
00200
00201     /* Loop forever */
00202     while(1);
00203 }
00204
00205 /* With ARM and GHS toolsets, the entry point is main() - this will
00206    allow the linker to generate wrapper code to setup stacks, allocate
00207    heap area, and initialize and copy code and data segments. For GNU
00208    toolsets, the entry point is through __start() in the crt0_gnu.asm
00209    file, and that startup code will setup stacks and data */
00210 int main(void)
00211 {
00212     return c_entry();
00213 }
00214
00215
00216 #ifdef  DEBUG
00217 /*******************************************************************************
00218 * @brief                Reports the name of the source file and the source line number
00219 *                               where the CHECK_PARAM error has occurred.
00220 * @param[in]    file Pointer to the source file name
00221 * @param[in]    line assert_param error line source number
00222 * @return               None
00223 *******************************************************************************/
00224 void check_failed(uint8_t *file, uint32_t line)
00225 {
00226         /* User can add his own implementation to report the file name and line number,
00227          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00228
00229         /* Infinite loop */
00230         while(1);
00231 }
00232 #endif
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Slave/ssp_slave.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/Slave/ssp_slave.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          ssp_slave.c                             2010-05-21
00003 */
00025 #include "lpc17xx_ssp.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029 #include "lpc17xx_gpio.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINTIONS *************************/
00040 #define BUFFER_SIZE                     0x40
00041
00042
00043 /************************** PRIVATE VARIABLES *************************/
00044 uint8_t menu1[] =
00045 "********************************************************************************\n\r"
00046 "Hello NXP Semiconductors \n\r"
00047 "SSP demo \n\r"
00048 "\t - MCU: LPC17xx \n\r"
00049 "\t - Core: ARM Cortex-M3 \n\r"
00050 "\t - Communicate via: UART0 - 115200bps \n\r"
00051 "\t An example of SSP using interrupt mode to test the SSP driver \n\r"
00052 " This example uses SSP in SPI mode as slave to communicate with an SSP master device \n\r"
00053 " The master and slave transfer together a number of data byte \n\r"
00054 "********************************************************************************\n\r";
00055 uint8_t menu2[] = "Demo terminated! \n\r";
00056
00057 // SSP Configuration structure variable
00058 SSP_CFG_Type SSP_ConfigStruct;
00059 //SSP Data setup structure variable
00060 SSP_DATA_SETUP_Type xferConfig;
00061
00062 // Tx buffer
00063 uint8_t Tx_Buf[BUFFER_SIZE];
00064 // Rx buffer
00065 uint8_t Rx_Buf[BUFFER_SIZE];
00066
00067 /* Status Flag indicates current SSP transmission complete or not */
00068 __IO FlagStatus complete;
00069
00070 /************************** PRIVATE FUNCTIONS *************************/
00071 void SSP0_IRQHandler(void);
00072
00073 void print_menu(void);
00074 void Buffer_Init(void);
00075 void Error_Loop(void);
00076 void Buffer_Verify(void);
00077
00078 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00079 /*********************************************************************/
00084 void SSP0_IRQHandler(void)
00085 {
00086         SSP_DATA_SETUP_Type *xf_setup;
00087         uint16_t tmp;
00088         uint8_t dataword;
00089
00090         // Disable interrupt
00091         SSP_IntConfig(LPC_SSP0, SSP_INTCFG_ROR|SSP_INTCFG_RT|SSP_INTCFG_RX|SSP_INTCFG_TX, DISABLE);
00092
00093         if(SSP_GetDataSize(LPC_SSP0)>8)
00094                 dataword = 1;
00095         else
00096                 dataword = 0;
00097         xf_setup = &xferConfig;
00098         // save status
00099         tmp = SSP_GetRawIntStatusReg(LPC_SSP0);
00100         xf_setup->status = tmp;
00101
00102         // Check overrun error
00103         if (tmp & SSP_RIS_ROR){
00104                 // Clear interrupt
00105                 SSP_ClearIntPending(LPC_SSP0, SSP_INTCLR_ROR);
00106                 // update status
00107                 xf_setup->status |= SSP_STAT_ERROR;
00108                 // Set Complete Flag
00109                 complete = SET;
00110                 return;
00111         }
00112
00113         if ((xf_setup->tx_cnt != xf_setup->length) || (xf_setup->rx_cnt != xf_setup->length)){
00114                 /* check if RX FIFO contains data */
00115                 while ((SSP_GetStatus(LPC_SSP0, SSP_STAT_RXFIFO_NOTEMPTY)) && (xf_setup->rx_cnt != xf_setup->length)){
00116                         // Read data from SSP data
00117                         tmp = SSP_ReceiveData(LPC_SSP0);
00118
00119                         // Store data to destination
00120                         if (xf_setup->rx_data != NULL)
00121                         {
00122                                 if (dataword == 0){
00123                                         *(uint8_t *)((uint32_t)xf_setup->rx_data + xf_setup->rx_cnt) = (uint8_t) tmp;
00124                                 } else {
00125                                         *(uint16_t *)((uint32_t)xf_setup->rx_data + xf_setup->rx_cnt) = (uint16_t) tmp;
00126                                 }
00127                         }
00128                         // Increase counter
00129                         if (dataword == 0){
00130                                 xf_setup->rx_cnt++;
00131                         } else {
00132                                 xf_setup->rx_cnt += 2;
00133                         }
00134                 }
00135
00136                 while ((SSP_GetStatus(LPC_SSP0, SSP_STAT_TXFIFO_NOTFULL)) && (xf_setup->tx_cnt != xf_setup->length)){
00137                         // Write data to buffer
00138                         if(xf_setup->tx_data == NULL){
00139                                 if (dataword == 0){
00140                                         SSP_SendData(LPC_SSP0, 0xFF);
00141                                         xf_setup->tx_cnt++;
00142                                 } else {
00143                                         SSP_SendData(LPC_SSP0, 0xFFFF);
00144                                         xf_setup->tx_cnt += 2;
00145                                 }
00146                         } else {
00147                                 if (dataword == 0){
00148                                         SSP_SendData(LPC_SSP0, (*(uint8_t *)((uint32_t)xf_setup->tx_data + xf_setup->tx_cnt)));
00149                                         xf_setup->tx_cnt++;
00150                                 } else {
00151                                         SSP_SendData(LPC_SSP0, (*(uint16_t *)((uint32_t)xf_setup->tx_data + xf_setup->tx_cnt)));
00152                                         xf_setup->tx_cnt += 2;
00153                                 }
00154                         }
00155
00156                         // Check overrun error
00157                         if (SSP_GetRawIntStatus(LPC_SSP0, SSP_INTSTAT_RAW_ROR)){
00158                                 // update status
00159                                 xf_setup->status |= SSP_STAT_ERROR;
00160                                 // Set Complete Flag
00161                                 complete = SET;
00162                                 return;
00163                         }
00164
00165                         // Check for any data available in RX FIFO
00166                         while ((SSP_GetStatus(LPC_SSP0, SSP_STAT_RXFIFO_NOTEMPTY)) && (xf_setup->rx_cnt != xf_setup->length)){
00167                                 // Read data from SSP data
00168                                 tmp = SSP_ReceiveData(LPC_SSP0);
00169
00170                                 // Store data to destination
00171                                 if (xf_setup->rx_data != NULL)
00172                                 {
00173                                         if (dataword == 0){
00174                                                 *(uint8_t *)((uint32_t)xf_setup->rx_data + xf_setup->rx_cnt) = (uint8_t) tmp;
00175                                         } else {
00176                                                 *(uint16_t *)((uint32_t)xf_setup->rx_data + xf_setup->rx_cnt) = (uint16_t) tmp;
00177                                         }
00178                                 }
00179                                 // Increase counter
00180                                 if (dataword == 0){
00181                                         xf_setup->rx_cnt++;
00182                                 } else {
00183                                         xf_setup->rx_cnt += 2;
00184                                 }
00185                         }
00186                 }
00187         }
00188
00189         // If there more data to sent or receive
00190         if ((xf_setup->rx_cnt != xf_setup->length) || (xf_setup->tx_cnt != xf_setup->length)){
00191                 // Enable all interrupt
00192                 SSP_IntConfig(LPC_SSP0, SSP_INTCFG_ROR|SSP_INTCFG_RT|SSP_INTCFG_RX|SSP_INTCFG_TX, ENABLE);
00193         } else {
00194                 // Save status
00195                 xf_setup->status = SSP_STAT_DONE;
00196                 // Set Complete Flag
00197                 complete = SET;
00198         }
00199 }
00200
00201 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00202 /*********************************************************************/
00207 void Buffer_Init(void)
00208 {
00209         uint8_t i;
00210
00211         for (i = 0; i < BUFFER_SIZE; i++) {
00212                 Tx_Buf[i] = i;
00213                 Rx_Buf[i] = 0;
00214         }
00215 }
00216
00217 /*********************************************************************/
00222 void Error_Loop(void)
00223 {
00224         /* Loop forever */
00225         while (1);
00226 }
00227
00228 /*********************************************************************/
00233 void Buffer_Verify(void)
00234 {
00235         uint8_t i;
00236         uint8_t *src_addr = (uint8_t *) &Tx_Buf[0];
00237         uint8_t *dest_addr = (uint8_t *) &Rx_Buf[0];
00238
00239         for ( i = 0; i < BUFFER_SIZE; i++ )
00240         {
00241                 if ( *src_addr++ != *dest_addr++ )
00242                 {
00243                         _DBG_("Verify error");
00244                         /* Call Error Loop */
00245                         Error_Loop();
00246                 }
00247         }
00248 }
00249
00250 /*********************************************************************/
00255 void print_menu(void)
00256 {
00257         _DBG(menu1);
00258 }
00259
00260 /*-------------------------MAIN FUNCTION------------------------------*/
00261 /*********************************************************************/
00266 int c_entry(void)
00267 {
00268         PINSEL_CFG_Type PinCfg;
00269
00270         /*
00271          * Initialize SPI pin connect
00272          * P0.15 - SCK;
00273          * P0.16 - SSEL
00274          * P0.17 - MISO
00275          * P0.18 - MOSI
00276          */
00277         PinCfg.Funcnum = 2;
00278         PinCfg.OpenDrain = 0;
00279         PinCfg.Pinmode = 0;
00280         PinCfg.Portnum = 0;
00281         PinCfg.Pinnum = 15;
00282         PINSEL_ConfigPin(&PinCfg);
00283         PinCfg.Pinnum = 17;
00284         PINSEL_ConfigPin(&PinCfg);
00285         PinCfg.Pinnum = 18;
00286         PINSEL_ConfigPin(&PinCfg);
00287         PinCfg.Pinnum = 16;
00288         PINSEL_ConfigPin(&PinCfg);
00289
00290         /* Initialize debug via UART0
00291          * – 115200bps
00292          * – 8 data bit
00293          * – No parity
00294          * – 1 stop bit
00295          * – No flow control
00296          */
00297         debug_frmwrk_init();
00298
00299         // print welcome screen
00300         print_menu();
00301
00302         // initialize SSP configuration structure to default
00303         SSP_ConfigStructInit(&SSP_ConfigStruct);
00304         SSP_ConfigStruct.Mode = SSP_SLAVE_MODE;
00305         // Initialize SSP peripheral with parameter given in structure above
00306         SSP_Init(LPC_SSP0, &SSP_ConfigStruct);
00307
00308     /* preemption = 1, sub-priority = 1 */
00309     NVIC_SetPriority(SSP0_IRQn, ((0x01<<3)|0x01));
00310     /* Enable SSP0 interrupt */
00311     NVIC_EnableIRQ(SSP0_IRQn);
00312
00313         // Enable SSP peripheral
00314         SSP_Cmd(LPC_SSP0, ENABLE);
00315
00316         _DBG_("Init buffer");
00317         /* Initialize Buffer */
00318         Buffer_Init();
00319
00320         _DBG_("Wait for master transfer...");
00321         complete = RESET;
00322         xferConfig.tx_data = Tx_Buf;
00323         xferConfig.rx_data = Rx_Buf;
00324         xferConfig.length = BUFFER_SIZE;
00325         SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_INTERRUPT);
00326         while(complete == RESET);
00327
00328         // Verify buffer after transferring
00329         Buffer_Verify();
00330         _DBG_("Verify complete!");
00331
00332     /* Loop forever */
00333     while(1);
00334 }
00335
00336 /* With ARM and GHS toolsets, the entry point is main() - this will
00337    allow the linker to generate wrapper code to setup stacks, allocate
00338    heap area, and initialize and copy code and data segments. For GNU
00339    toolsets, the entry point is through __start() in the crt0_gnu.asm
00340    file, and that startup code will setup stacks and data */
00341 int main(void)
00342 {
00343     return c_entry();
00344 }
00345
00346
00347 #ifdef  DEBUG
00348 /*******************************************************************************
00349 * @brief                Reports the name of the source file and the source line number
00350 *                               where the CHECK_PARAM error has occurred.
00351 * @param[in]    file Pointer to the source file name
00352 * @param[in]    line assert_param error line source number
00353 * @return               None
00354 *******************************************************************************/
00355 void check_failed(uint8_t *file, uint32_t line)
00356 {
00357         /* User can add his own implementation to report the file name and line number,
00358          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00359
00360         /* Infinite loop */
00361         while(1);
00362 }
00363 #endif
00364
00365 /*
00366  * @}
00367  */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/syscalls.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/syscalls.c
Go to the documentation of this file.
00001 /* Don't need anything here. */
00002 /* Used with GNU compiler only! */
00003
00004 #include <stdlib.h>
00005 #ifndef __IAR_SYSTEMS_ICC__
00006 #include <sys/stat.h>
00007 #endif
00008
00009 int _read_r (struct _reent *r, int file, char * ptr, int len)
00010 {
00011         ( void ) r;
00012         ( void ) file;
00013         ( void ) ptr;
00014         ( void ) len;
00015         return -1;
00016 }
00017
00018 /***************************************************************************/
00019
00020 int _lseek_r (struct _reent *r, int file, int ptr, int dir)
00021 {
00022         ( void ) r;
00023         ( void ) file;
00024         ( void ) ptr;
00025         ( void ) dir;
00026
00027         return 0;
00028 }
00029
00030 /***************************************************************************/
00031
00032 int _write_r (struct _reent *r, int file, char * ptr, int len)
00033 {
00034         ( void ) r;
00035         ( void ) file;
00036         ( void ) ptr;
00037         ( void ) len;
00038
00039         return 0;
00040 }
00041
00042 /***************************************************************************/
00043
00044 int _close_r (struct _reent *r, int file)
00045 {
00046         ( void ) r;
00047         ( void ) file;
00048
00049         return 0;
00050 }
00051
00052 /***************************************************************************/
00053
00054 caddr_t _sbrk_r (struct _reent *r, int incr)
00055 {
00056         ( void ) r;
00057         ( void ) incr;
00058
00059         return 0;
00060 }
00061
00062 /***************************************************************************/
00063
00064 int _fstat_r (struct _reent *r, int file, struct stat * st)
00065 {
00066         ( void ) r;
00067         ( void ) file;
00068         ( void ) st;
00069
00070         return 0;
00071 }
00072
00073 /***************************************************************************/
00074
00075 int _isatty_r(struct _reent *r, int fd)
00076 {
00077         ( void ) r;
00078         ( void ) fd;
00079
00080         return 0;
00081 }
00082
00083
00084
00085
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Source/Template/system_LPC17xx.c Source File

C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Source/Template/system_LPC17xx.c
Go to the documentation of this file.
00001 /**************************************************************************/
00026 #include <stdint.h>
00027 #include "LPC17xx.h"
00028
00029
00034 /*
00035 //-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
00036 */
00037
00038 /*--------------------- Clock Configuration ----------------------------------
00039 //
00040 // <e> Clock Configuration
00041 //   <h> System Controls and Status Register (SCS)
00042 //     <o1.4>    OSCRANGE: Main Oscillator Range Select
00043 //                     <0=>  1 MHz to 20 MHz
00044 //                     <1=> 15 MHz to 24 MHz
00045 //     <e1.5>       OSCEN: Main Oscillator Enable
00046 //     </e>
00047 //   </h>
00048 //
00049 //   <h> Clock Source Select Register (CLKSRCSEL)
00050 //     <o2.0..1>   CLKSRC: PLL Clock Source Selection
00051 //                     <0=> Internal RC oscillator
00052 //                     <1=> Main oscillator
00053 //                     <2=> RTC oscillator
00054 //   </h>
00055 //
00056 //   <e3> PLL0 Configuration (Main PLL)
00057 //     <h> PLL0 Configuration Register (PLL0CFG)
00058 //                     <i> F_cco0 = (2 * M * F_in) / N
00059 //                     <i> F_in must be in the range of 32 kHz to 50 MHz
00060 //                     <i> F_cco0 must be in the range of 275 MHz to 550 MHz
00061 //       <o4.0..14>  MSEL: PLL Multiplier Selection
00062 //                     <6-32768><#-1>
00063 //                     <i> M Value
00064 //       <o4.16..23> NSEL: PLL Divider Selection
00065 //                     <1-256><#-1>
00066 //                     <i> N Value
00067 //     </h>
00068 //   </e>
00069 //
00070 //   <e5> PLL1 Configuration (USB PLL)
00071 //     <h> PLL1 Configuration Register (PLL1CFG)
00072 //                     <i> F_usb = M * F_osc or F_usb = F_cco1 / (2 * P)
00073 //                     <i> F_cco1 = F_osc * M * 2 * P
00074 //                     <i> F_cco1 must be in the range of 156 MHz to 320 MHz
00075 //       <o6.0..4>   MSEL: PLL Multiplier Selection
00076 //                     <1-32><#-1>
00077 //                     <i> M Value (for USB maximum value is 4)
00078 //       <o6.5..6>   PSEL: PLL Divider Selection
00079 //                     <0=> 1
00080 //                     <1=> 2
00081 //                     <2=> 4
00082 //                     <3=> 8
00083 //                     <i> P Value
00084 //     </h>
00085 //   </e>
00086 //
00087 //   <h> CPU Clock Configuration Register (CCLKCFG)
00088 //     <o7.0..7>  CCLKSEL: Divide Value for CPU Clock from PLL0
00089 //                     <3-256><#-1>
00090 //   </h>
00091 //
00092 //   <h> USB Clock Configuration Register (USBCLKCFG)
00093 //     <o8.0..3>   USBSEL: Divide Value for USB Clock from PLL0
00094 //                     <0-15>
00095 //                     <i> Divide is USBSEL + 1
00096 //   </h>
00097 //
00098 //   <h> Peripheral Clock Selection Register 0 (PCLKSEL0)
00099 //     <o9.0..1>    PCLK_WDT: Peripheral Clock Selection for WDT
00100 //                     <0=> Pclk = Cclk / 4
00101 //                     <1=> Pclk = Cclk
00102 //                     <2=> Pclk = Cclk / 2
00103 //                     <3=> Pclk = Hclk / 8
00104 //     <o9.2..3>    PCLK_TIMER0: Peripheral Clock Selection for TIMER0
00105 //                     <0=> Pclk = Cclk / 4
00106 //                     <1=> Pclk = Cclk
00107 //                     <2=> Pclk = Cclk / 2
00108 //                     <3=> Pclk = Hclk / 8
00109 //     <o9.4..5>    PCLK_TIMER1: Peripheral Clock Selection for TIMER1
00110 //                     <0=> Pclk = Cclk / 4
00111 //                     <1=> Pclk = Cclk
00112 //                     <2=> Pclk = Cclk / 2
00113 //                     <3=> Pclk = Hclk / 8
00114 //     <o9.6..7>    PCLK_UART0: Peripheral Clock Selection for UART0
00115 //                     <0=> Pclk = Cclk / 4
00116 //                     <1=> Pclk = Cclk
00117 //                     <2=> Pclk = Cclk / 2
00118 //                     <3=> Pclk = Hclk / 8
00119 //     <o9.8..9>    PCLK_UART1: Peripheral Clock Selection for UART1
00120 //                     <0=> Pclk = Cclk / 4
00121 //                     <1=> Pclk = Cclk
00122 //                     <2=> Pclk = Cclk / 2
00123 //                     <3=> Pclk = Hclk / 8
00124 //     <o9.12..13>  PCLK_PWM1: Peripheral Clock Selection for PWM1
00125 //                     <0=> Pclk = Cclk / 4
00126 //                     <1=> Pclk = Cclk
00127 //                     <2=> Pclk = Cclk / 2
00128 //                     <3=> Pclk = Hclk / 8
00129 //     <o9.14..15>  PCLK_I2C0: Peripheral Clock Selection for I2C0
00130 //                     <0=> Pclk = Cclk / 4
00131 //                     <1=> Pclk = Cclk
00132 //                     <2=> Pclk = Cclk / 2
00133 //                     <3=> Pclk = Hclk / 8
00134 //     <o9.16..17>  PCLK_SPI: Peripheral Clock Selection for SPI
00135 //                     <0=> Pclk = Cclk / 4
00136 //                     <1=> Pclk = Cclk
00137 //                     <2=> Pclk = Cclk / 2
00138 //                     <3=> Pclk = Hclk / 8
00139 //     <o9.20..21>  PCLK_SSP1: Peripheral Clock Selection for SSP1
00140 //                     <0=> Pclk = Cclk / 4
00141 //                     <1=> Pclk = Cclk
00142 //                     <2=> Pclk = Cclk / 2
00143 //                     <3=> Pclk = Hclk / 8
00144 //     <o9.22..23>  PCLK_DAC: Peripheral Clock Selection for DAC
00145 //                     <0=> Pclk = Cclk / 4
00146 //                     <1=> Pclk = Cclk
00147 //                     <2=> Pclk = Cclk / 2
00148 //                     <3=> Pclk = Hclk / 8
00149 //     <o9.24..25>  PCLK_ADC: Peripheral Clock Selection for ADC
00150 //                     <0=> Pclk = Cclk / 4
00151 //                     <1=> Pclk = Cclk
00152 //                     <2=> Pclk = Cclk / 2
00153 //                     <3=> Pclk = Hclk / 8
00154 //     <o9.26..27>  PCLK_CAN1: Peripheral Clock Selection for CAN1
00155 //                     <0=> Pclk = Cclk / 4
00156 //                     <1=> Pclk = Cclk
00157 //                     <2=> Pclk = Cclk / 2
00158 //                     <3=> Pclk = Hclk / 6
00159 //     <o9.28..29>  PCLK_CAN2: Peripheral Clock Selection for CAN2
00160 //                     <0=> Pclk = Cclk / 4
00161 //                     <1=> Pclk = Cclk
00162 //                     <2=> Pclk = Cclk / 2
00163 //                     <3=> Pclk = Hclk / 6
00164 //     <o9.30..31>  PCLK_ACF: Peripheral Clock Selection for ACF
00165 //                     <0=> Pclk = Cclk / 4
00166 //                     <1=> Pclk = Cclk
00167 //                     <2=> Pclk = Cclk / 2
00168 //                     <3=> Pclk = Hclk / 6
00169 //   </h>
00170 //
00171 //   <h> Peripheral Clock Selection Register 1 (PCLKSEL1)
00172 //     <o10.0..1>   PCLK_QEI: Peripheral Clock Selection for the Quadrature Encoder Interface
00173 //                     <0=> Pclk = Cclk / 4
00174 //                     <1=> Pclk = Cclk
00175 //                     <2=> Pclk = Cclk / 2
00176 //                     <3=> Pclk = Hclk / 8
00177 //     <o10.2..3>   PCLK_GPIO: Peripheral Clock Selection for GPIOs
00178 //                     <0=> Pclk = Cclk / 4
00179 //                     <1=> Pclk = Cclk
00180 //                     <2=> Pclk = Cclk / 2
00181 //                     <3=> Pclk = Hclk / 8
00182 //     <o10.4..5>   PCLK_PCB: Peripheral Clock Selection for the Pin Connect Block
00183 //                     <0=> Pclk = Cclk / 4
00184 //                     <1=> Pclk = Cclk
00185 //                     <2=> Pclk = Cclk / 2
00186 //                     <3=> Pclk = Hclk / 8
00187 //     <o10.6..7>   PCLK_I2C1: Peripheral Clock Selection for I2C1
00188 //                     <0=> Pclk = Cclk / 4
00189 //                     <1=> Pclk = Cclk
00190 //                     <2=> Pclk = Cclk / 2
00191 //                     <3=> Pclk = Hclk / 8
00192 //     <o10.10..11> PCLK_SSP0: Peripheral Clock Selection for SSP0
00193 //                     <0=> Pclk = Cclk / 4
00194 //                     <1=> Pclk = Cclk
00195 //                     <2=> Pclk = Cclk / 2
00196 //                     <3=> Pclk = Hclk / 8
00197 //     <o10.12..13> PCLK_TIMER2: Peripheral Clock Selection for TIMER2
00198 //                     <0=> Pclk = Cclk / 4
00199 //                     <1=> Pclk = Cclk
00200 //                     <2=> Pclk = Cclk / 2
00201 //                     <3=> Pclk = Hclk / 8
00202 //     <o10.14..15> PCLK_TIMER3: Peripheral Clock Selection for TIMER3
00203 //                     <0=> Pclk = Cclk / 4
00204 //                     <1=> Pclk = Cclk
00205 //                     <2=> Pclk = Cclk / 2
00206 //                     <3=> Pclk = Hclk / 8
00207 //     <o10.16..17> PCLK_UART2: Peripheral Clock Selection for UART2
00208 //                     <0=> Pclk = Cclk / 4
00209 //                     <1=> Pclk = Cclk
00210 //                     <2=> Pclk = Cclk / 2
00211 //                     <3=> Pclk = Hclk / 8
00212 //     <o10.18..19> PCLK_UART3: Peripheral Clock Selection for UART3
00213 //                     <0=> Pclk = Cclk / 4
00214 //                     <1=> Pclk = Cclk
00215 //                     <2=> Pclk = Cclk / 2
00216 //                     <3=> Pclk = Hclk / 8
00217 //     <o10.20..21> PCLK_I2C2: Peripheral Clock Selection for I2C2
00218 //                     <0=> Pclk = Cclk / 4
00219 //                     <1=> Pclk = Cclk
00220 //                     <2=> Pclk = Cclk / 2
00221 //                     <3=> Pclk = Hclk / 8
00222 //     <o10.22..23> PCLK_I2S: Peripheral Clock Selection for I2S
00223 //                     <0=> Pclk = Cclk / 4
00224 //                     <1=> Pclk = Cclk
00225 //                     <2=> Pclk = Cclk / 2
00226 //                     <3=> Pclk = Hclk / 8
00227 //     <o10.26..27> PCLK_RIT: Peripheral Clock Selection for the Repetitive Interrupt Timer
00228 //                     <0=> Pclk = Cclk / 4
00229 //                     <1=> Pclk = Cclk
00230 //                     <2=> Pclk = Cclk / 2
00231 //                     <3=> Pclk = Hclk / 8
00232 //     <o10.28..29> PCLK_SYSCON: Peripheral Clock Selection for the System Control Block
00233 //                     <0=> Pclk = Cclk / 4
00234 //                     <1=> Pclk = Cclk
00235 //                     <2=> Pclk = Cclk / 2
00236 //                     <3=> Pclk = Hclk / 8
00237 //     <o10.30..31> PCLK_MC: Peripheral Clock Selection for the Motor Control PWM
00238 //                     <0=> Pclk = Cclk / 4
00239 //                     <1=> Pclk = Cclk
00240 //                     <2=> Pclk = Cclk / 2
00241 //                     <3=> Pclk = Hclk / 8
00242 //   </h>
00243 //
00244 //   <h> Power Control for Peripherals Register (PCONP)
00245 //     <o11.1>      PCTIM0: Timer/Counter 0 power/clock enable
00246 //     <o11.2>      PCTIM1: Timer/Counter 1 power/clock enable
00247 //     <o11.3>      PCUART0: UART 0 power/clock enable
00248 //     <o11.4>      PCUART1: UART 1 power/clock enable
00249 //     <o11.6>      PCPWM1: PWM 1 power/clock enable
00250 //     <o11.7>      PCI2C0: I2C interface 0 power/clock enable
00251 //     <o11.8>      PCSPI: SPI interface power/clock enable
00252 //     <o11.9>      PCRTC: RTC power/clock enable
00253 //     <o11.10>     PCSSP1: SSP interface 1 power/clock enable
00254 //     <o11.12>     PCAD: A/D converter power/clock enable
00255 //     <o11.13>     PCCAN1: CAN controller 1 power/clock enable
00256 //     <o11.14>     PCCAN2: CAN controller 2 power/clock enable
00257 //     <o11.15>     PCGPIO: GPIOs power/clock enable
00258 //     <o11.16>     PCRIT: Repetitive interrupt timer power/clock enable
00259 //     <o11.17>     PCMC: Motor control PWM power/clock enable
00260 //     <o11.18>     PCQEI: Quadrature encoder interface power/clock enable
00261 //     <o11.19>     PCI2C1: I2C interface 1 power/clock enable
00262 //     <o11.21>     PCSSP0: SSP interface 0 power/clock enable
00263 //     <o11.22>     PCTIM2: Timer 2 power/clock enable
00264 //     <o11.23>     PCTIM3: Timer 3 power/clock enable
00265 //     <o11.24>     PCUART2: UART 2 power/clock enable
00266 //     <o11.25>     PCUART3: UART 3 power/clock enable
00267 //     <o11.26>     PCI2C2: I2C interface 2 power/clock enable
00268 //     <o11.27>     PCI2S: I2S interface power/clock enable
00269 //     <o11.29>     PCGPDMA: GP DMA function power/clock enable
00270 //     <o11.30>     PCENET: Ethernet block power/clock enable
00271 //     <o11.31>     PCUSB: USB interface power/clock enable
00272 //   </h>
00273 //
00274 //   <h> Clock Output Configuration Register (CLKOUTCFG)
00275 //     <o12.0..3>   CLKOUTSEL: Selects clock source for CLKOUT
00276 //                     <0=> CPU clock
00277 //                     <1=> Main oscillator
00278 //                     <2=> Internal RC oscillator
00279 //                     <3=> USB clock
00280 //                     <4=> RTC oscillator
00281 //     <o12.4..7>   CLKOUTDIV: Selects clock divider for CLKOUT
00282 //                     <1-16><#-1>
00283 //     <o12.8>      CLKOUT_EN: CLKOUT enable control
00284 //   </h>
00285 //
00286 // </e>
00287 */
00288
00289
00290
00295 #define CLOCK_SETUP           1
00296 #define SCS_Val               0x00000020
00297 #define CLKSRCSEL_Val         0x00000001
00298 #define PLL0_SETUP            1
00299 #define PLL0CFG_Val           0x00050063
00300 #define PLL1_SETUP            1
00301 #define PLL1CFG_Val           0x00000023
00302 #define CCLKCFG_Val           0x00000003
00303 #define USBCLKCFG_Val         0x00000000
00304 #define PCLKSEL0_Val          0x00000000
00305 #define PCLKSEL1_Val          0x00000000
00306 #define PCONP_Val             0x042887DE
00307 #define CLKOUTCFG_Val         0x00000000
00308
00309
00310 /*--------------------- Flash Accelerator Configuration ----------------------
00311 //
00312 // <e> Flash Accelerator Configuration
00313 //   <o1.0..11>  Reserved
00314 //   <o1.12..15> FLASHTIM: Flash Access Time
00315 //               <0=> 1 CPU clock (for CPU clock up to 20 MHz)
00316 //               <1=> 2 CPU clocks (for CPU clock up to 40 MHz)
00317 //               <2=> 3 CPU clocks (for CPU clock up to 60 MHz)
00318 //               <3=> 4 CPU clocks (for CPU clock up to 80 MHz)
00319 //               <4=> 5 CPU clocks (for CPU clock up to 100 MHz)
00320 //               <5=> 6 CPU clocks (for any CPU clock)
00321 // </e>
00322 */
00323 #define FLASH_SETUP           1
00324 #define FLASHCFG_Val          0x0000303A
00325
00326 /*
00327 //-------- <<< end of configuration section >>> ------------------------------
00328 */
00329
00330 /*----------------------------------------------------------------------------
00331   Check the register settings
00332  *----------------------------------------------------------------------------*/
00333 #define CHECK_RANGE(val, min, max)                ((val < min) || (val > max))
00334 #define CHECK_RSVD(val, mask)                     (val & mask)
00335
00336 /* Clock Configuration -------------------------------------------------------*/
00337 #if (CHECK_RSVD((SCS_Val),       ~0x00000030))
00338    #error "SCS: Invalid values of reserved bits!"
00339 #endif
00340
00341 #if (CHECK_RANGE((CLKSRCSEL_Val), 0, 2))
00342    #error "CLKSRCSEL: Value out of range!"
00343 #endif
00344
00345 #if (CHECK_RSVD((PLL0CFG_Val),   ~0x00FF7FFF))
00346    #error "PLL0CFG: Invalid values of reserved bits!"
00347 #endif
00348
00349 #if (CHECK_RSVD((PLL1CFG_Val),   ~0x0000007F))
00350    #error "PLL1CFG: Invalid values of reserved bits!"
00351 #endif
00352
00353 #if (CHECK_RANGE(CCLKCFG_Val, 2, 255))
00354    #error "CCLKCFG: CCLKSEL field does not contain value in range from 2 to 255!"
00355 #endif
00356
00357 #if (CHECK_RSVD((USBCLKCFG_Val), ~0x0000000F))
00358    #error "USBCLKCFG: Invalid values of reserved bits!"
00359 #endif
00360
00361 #if (CHECK_RSVD((PCLKSEL0_Val),   0x000C0C00))
00362    #error "PCLKSEL0: Invalid values of reserved bits!"
00363 #endif
00364
00365 #if (CHECK_RSVD((PCLKSEL1_Val),   0x03000300))
00366    #error "PCLKSEL1: Invalid values of reserved bits!"
00367 #endif
00368
00369 #if (CHECK_RSVD((PCONP_Val),      0x10100821))
00370    #error "PCONP: Invalid values of reserved bits!"
00371 #endif
00372
00373 #if (CHECK_RSVD((CLKOUTCFG_Val), ~0x000001FF))
00374    #error "CLKOUTCFG: Invalid values of reserved bits!"
00375 #endif
00376
00377 /* Flash Accelerator Configuration -------------------------------------------*/
00378 #if (CHECK_RSVD((FLASHCFG_Val), ~0x0000F07F))
00379    #error "FLASHCFG: Invalid values of reserved bits!"
00380 #endif
00381
00382
00383 /*----------------------------------------------------------------------------
00384   DEFINES
00385  *----------------------------------------------------------------------------*/
00386
00387 /*----------------------------------------------------------------------------
00388   Define clocks
00389  *----------------------------------------------------------------------------*/
00390 #define XTAL        (12000000UL)        /* Oscillator frequency               */
00391 #define OSC_CLK     (      XTAL)        /* Main oscillator frequency          */
00392 #define RTC_CLK     (   32768UL)        /* RTC oscillator frequency           */
00393 #define IRC_OSC     ( 4000000UL)        /* Internal RC oscillator frequency   */
00394
00395
00396 /* F_cco0 = (2 * M * F_in) / N  */
00397 #define __M               (((PLL0CFG_Val      ) & 0x7FFF) + 1)
00398 #define __N               (((PLL0CFG_Val >> 16) & 0x00FF) + 1)
00399 #define __FCCO(__F_IN)    ((2 * __M * __F_IN) / __N)
00400 #define __CCLK_DIV        (((CCLKCFG_Val      ) & 0x00FF) + 1)
00401
00402 /* Determine core clock frequency according to settings */
00403  #if (PLL0_SETUP)
00404     #if   ((CLKSRCSEL_Val & 0x03) == 1)
00405         #define __CORE_CLK (__FCCO(OSC_CLK) / __CCLK_DIV)
00406     #elif ((CLKSRCSEL_Val & 0x03) == 2)
00407         #define __CORE_CLK (__FCCO(RTC_CLK) / __CCLK_DIV)
00408     #else
00409         #define __CORE_CLK (__FCCO(IRC_OSC) / __CCLK_DIV)
00410     #endif
00411  #else
00412     #if   ((CLKSRCSEL_Val & 0x03) == 1)
00413         #define __CORE_CLK (OSC_CLK         / __CCLK_DIV)
00414     #elif ((CLKSRCSEL_Val & 0x03) == 2)
00415         #define __CORE_CLK (RTC_CLK         / __CCLK_DIV)
00416     #else
00417         #define __CORE_CLK (IRC_OSC         / __CCLK_DIV)
00418     #endif
00419  #endif
00420
00429 /*----------------------------------------------------------------------------
00430   Clock Variable definitions
00431  *----------------------------------------------------------------------------*/
00432 uint32_t SystemCoreClock = __CORE_CLK;
00443 /*----------------------------------------------------------------------------
00444   Clock functions
00445  *----------------------------------------------------------------------------*/
00446
00447
00448 void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
00449 {
00450   /* Determine clock frequency according to clock register values             */
00451   if (((LPC_SC->PLL0STAT >> 24) & 3) == 3) { /* If PLL0 enabled and connected */
00452     switch (LPC_SC->CLKSRCSEL & 0x03) {
00453       case 0:                                /* Int. RC oscillator => PLL0    */
00454       case 3:                                /* Reserved, default to Int. RC  */
00455         SystemCoreClock = (IRC_OSC *
00456                           ((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1)))  /
00457                           (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1)    /
00458                           ((LPC_SC->CCLKCFG & 0xFF)+ 1));
00459         break;
00460       case 1:                                /* Main oscillator => PLL0       */
00461         SystemCoreClock = (OSC_CLK *
00462                           ((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1)))  /
00463                           (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1)    /
00464                           ((LPC_SC->CCLKCFG & 0xFF)+ 1));
00465         break;
00466       case 2:                                /* RTC oscillator => PLL0        */
00467         SystemCoreClock = (RTC_CLK *
00468                           ((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1)))  /
00469                           (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1)    /
00470                           ((LPC_SC->CCLKCFG & 0xFF)+ 1));
00471         break;
00472     }
00473   } else {
00474     switch (LPC_SC->CLKSRCSEL & 0x03) {
00475       case 0:                                /* Int. RC oscillator => PLL0    */
00476       case 3:                                /* Reserved, default to Int. RC  */
00477         SystemCoreClock = IRC_OSC / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
00478         break;
00479       case 1:                                /* Main oscillator => PLL0       */
00480         SystemCoreClock = OSC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
00481         break;
00482       case 2:                                /* RTC oscillator => PLL0        */
00483         SystemCoreClock = RTC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
00484         break;
00485     }
00486   }
00487
00488 }
00489
00499 void SystemInit (void)
00500 {
00501 #if (CLOCK_SETUP)                       /* Clock Setup                        */
00502   LPC_SC->SCS       = SCS_Val;
00503   if (LPC_SC->SCS & (1 << 5)) {             /* If Main Oscillator is enabled  */
00504     while ((LPC_SC->SCS & (1<<6)) == 0);/* Wait for Oscillator to be ready    */
00505   }
00506
00507   LPC_SC->CCLKCFG   = CCLKCFG_Val;      /* Setup Clock Divider                */
00508   /* Periphral clock must be selected before PLL0 enabling and connecting
00509    * - according errata.lpc1768-16.March.2010 -
00510    */
00511   LPC_SC->PCLKSEL0  = PCLKSEL0_Val;     /* Peripheral Clock Selection         */
00512   LPC_SC->PCLKSEL1  = PCLKSEL1_Val;
00513
00514 #if (PLL0_SETUP)
00515   LPC_SC->CLKSRCSEL = CLKSRCSEL_Val;    /* Select Clock Source for PLL0       */
00516
00517   LPC_SC->PLL0CFG   = PLL0CFG_Val;      /* configure PLL0                     */
00518   LPC_SC->PLL0FEED  = 0xAA;
00519   LPC_SC->PLL0FEED  = 0x55;
00520
00521   LPC_SC->PLL0CON   = 0x01;             /* PLL0 Enable                        */
00522   LPC_SC->PLL0FEED  = 0xAA;
00523   LPC_SC->PLL0FEED  = 0x55;
00524   while (!(LPC_SC->PLL0STAT & (1<<26)));/* Wait for PLOCK0                    */
00525
00526   LPC_SC->PLL0CON   = 0x03;             /* PLL0 Enable & Connect              */
00527   LPC_SC->PLL0FEED  = 0xAA;
00528   LPC_SC->PLL0FEED  = 0x55;
00529   while (!(LPC_SC->PLL0STAT & ((1<<25) | (1<<24))));/* Wait for PLLC0_STAT & PLLE0_STAT */
00530 #endif
00531
00532 #if (PLL1_SETUP)
00533   LPC_SC->PLL1CFG   = PLL1CFG_Val;
00534   LPC_SC->PLL1FEED  = 0xAA;
00535   LPC_SC->PLL1FEED  = 0x55;
00536
00537   LPC_SC->PLL1CON   = 0x01;             /* PLL1 Enable                        */
00538   LPC_SC->PLL1FEED  = 0xAA;
00539   LPC_SC->PLL1FEED  = 0x55;
00540   while (!(LPC_SC->PLL1STAT & (1<<10)));/* Wait for PLOCK1                    */
00541
00542   LPC_SC->PLL1CON   = 0x03;             /* PLL1 Enable & Connect              */
00543   LPC_SC->PLL1FEED  = 0xAA;
00544   LPC_SC->PLL1FEED  = 0x55;
00545   while (!(LPC_SC->PLL1STAT & ((1<< 9) | (1<< 8))));/* Wait for PLLC1_STAT & PLLE1_STAT */
00546 #else
00547   LPC_SC->USBCLKCFG = USBCLKCFG_Val;    /* Setup USB Clock Divider            */
00548 #endif
00549   LPC_SC->PCONP     = PCONP_Val;        /* Power Control for Peripherals      */
00550
00551   LPC_SC->CLKOUTCFG = CLKOUTCFG_Val;    /* Clock Output Configuration         */
00552 #endif
00553
00554 #if (FLASH_SETUP == 1)                  /* Flash Accelerator Setup            */
00555   LPC_SC->FLASHCFG  = FLASHCFG_Val;
00556 #endif
00557
00558 //  Set Vector table offset value
00559 #if (__RAM_MODE__==1)
00560   SCB->VTOR  = 0x10000000 & 0x3FFFFF80;
00561 #else
00562   SCB->VTOR  = 0x00000000 & 0x3FFFFF80;
00563 #endif
00564 }
00565
Generated on Mon Nov 28 2011 11:14:41 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/system_LPC17xx.h Source File

C:/nxpdrv/LPC1700CMSIS/Core/Device/NXP/LPC17xx/Include/system_LPC17xx.h
Go to the documentation of this file.
00001 /**************************************************************************/
00026 #ifndef __SYSTEM_LPC17xx_H
00027 #define __SYSTEM_LPC17xx_H
00028
00029 #ifdef __cplusplus
00030 extern "C" {
00031 #endif
00032
00033 #include <stdint.h>
00034
00040 extern uint32_t SystemCoreClock;
00052 extern void SystemInit (void);
00053
00063 extern void SystemCoreClockUpdate (void);
00064 #ifdef __cplusplus
00065 }
00066 #endif
00067
00072 #endif /* __SYSTEM_LPC17xx_H */
Generated on Mon Nov 28 2011 11:14:41 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/STCLK/systick_stclk.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SysTick/STCLK/systick_stclk.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          systick_stclk.c                         2010-05-21
00003 */
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_gpio.h"
00028 #include "lpc17xx_systick.h"
00029 #include "lpc17xx_pinsel.h"
00030 #include "lpc17xx_timer.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE VARIABLES *************************/
00039 FunctionalState Cur_State = ENABLE;
00040 Bool IO_State = FALSE;
00041
00042 /************************** PRIVATE FUNCTIONS *************************/
00043 void SysTick_Handler(void);
00044
00045 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00046 /*********************************************************************/
00051 void SysTick_Handler(void)
00052 {
00053         //Clear System Tick counter flag
00054         SYSTICK_ClearCounterFlag();
00055         //toggle P0.0
00056         if (Cur_State == ENABLE)
00057         {
00058                 //pull-down pin
00059                 GPIO_ClearValue(0, (1<<0));
00060                 Cur_State = DISABLE;
00061         }
00062         else
00063         {
00064                 GPIO_SetValue(0, (1<<0));
00065                 Cur_State = ENABLE;
00066         }
00067 }
00068
00069
00070 /*-------------------------MAIN FUNCTION------------------------------*/
00071 /*********************************************************************/
00076 int c_entry (void)
00077 {
00078         PINSEL_CFG_Type PinCfg;
00079         TIM_TIMERCFG_Type TIM_ConfigStruct;
00080         TIM_MATCHCFG_Type TIM_MatchConfigStruct;
00081
00082         // Conifg P1.28 as MAT0.0
00083         PinCfg.Funcnum = 3;
00084         PinCfg.OpenDrain = 0;
00085         PinCfg.Pinmode = 0;
00086         PinCfg.Portnum = 1;
00087         PinCfg.Pinnum = 28;
00088         PINSEL_ConfigPin(&PinCfg);
00089
00090         /* P3.26 as STCLK */
00091         PinCfg.Funcnum = 1;
00092         PinCfg.OpenDrain = 0;
00093         PinCfg.Pinmode = 0;
00094         PinCfg.Portnum = 3;
00095         PinCfg.Pinnum = 26;
00096         PINSEL_ConfigPin(&PinCfg);
00097
00098         // Initialize timer 0, prescale count time of 10uS
00099         TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
00100         TIM_ConfigStruct.PrescaleValue  = 10;
00101
00102         // use channel 0, MR0
00103         TIM_MatchConfigStruct.MatchChannel = 0;
00104         // Disable interrupt when MR0 matches the value in TC register
00105         TIM_MatchConfigStruct.IntOnMatch   = TRUE;
00106         //Enable reset on MR0: TIMER will reset if MR0 matches it
00107         TIM_MatchConfigStruct.ResetOnMatch = TRUE;
00108         //Stop on MR0 if MR0 matches it
00109         TIM_MatchConfigStruct.StopOnMatch  = FALSE;
00110         //Toggle MR0.0 pin if MR0 matches it
00111         TIM_MatchConfigStruct.ExtMatchOutputType =TIM_EXTMATCH_TOGGLE;
00112         // Set Match value, count value of 10 (10 * 10uS = 100uS --> 10KHz)
00113         TIM_MatchConfigStruct.MatchValue   = 10;
00114
00115         TIM_Init(LPC_TIM0, TIM_TIMER_MODE,&TIM_ConfigStruct);
00116         TIM_ConfigMatch(LPC_TIM0,&TIM_MatchConfigStruct);
00117         TIM_Cmd(LPC_TIM0,ENABLE);
00118
00119         GPIO_SetDir(0, (1<<0), 1); //Set P0.0 as output
00120
00121         //Use P0.0 to test System Tick interrupt
00122         /* Initialize System Tick with 10ms time interval
00123          * Frequency input = 10kHz /2 = 5kHz
00124          * Time input = 10ms
00125          */
00126         SYSTICK_ExternalInit(5000, 10);
00127         //Enable System Tick interrupt
00128         SYSTICK_IntCmd(ENABLE);
00129         //Enable System Tick Counter
00130         SYSTICK_Cmd(ENABLE);
00131
00132         while(1);
00133 }
00134
00135
00136 /* With ARM and GHS toolsets, the entry point is main() - this will
00137    allow the linker to generate wrapper code to setup stacks, allocate
00138    heap area, and initialize and copy code and data segments. For GNU
00139    toolsets, the entry point is through __start() in the crt0_gnu.asm
00140    file, and that startup code will setup stacks and data */
00141 int main(void)
00142 {
00143     return c_entry();
00144 }
00145
00146 #ifdef  DEBUG
00147 /*******************************************************************************
00148 * @brief                Reports the name of the source file and the source line number
00149 *                               where the CHECK_PARAM error has occurred.
00150 * @param[in]    file Pointer to the source file name
00151 * @param[in]    line assert_param error line source number
00152 * @return               None
00153 *******************************************************************************/
00154 void check_failed(uint8_t *file, uint32_t line)
00155 {
00156         /* User can add his own implementation to report the file name and line number,
00157          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00158
00159         /* Infinite loop */
00160         while(1);
00161 }
00162 #endif
00163
00164 /*
00165  * @}
00166  */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/tcpip.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/tcpip.c
Go to the documentation of this file.
00001 /******************************************************************
00002  *****                                                        *****
00003  *****  Name: tcpip.c                                         *****
00004  *****  Ver.: 1.0                                             *****
00005  *****  Date: 07/05/2001                                      *****
00006  *****  Auth: Andreas Dannenberg                              *****
00007  *****        HTWK Leipzig                                    *****
00008  *****        university of applied sciences                  *****
00009  *****        Germany                                         *****
00010  *****  Func: implements the TCP/IP-stack and provides a      *****
00011  *****        simple API to the user                          *****
00012  *****                                                        *****
00013  ******************************************************************/
00014
00015 #include "tcpip.h"
00016 #include "EMAC.h"         // Keil: Line added
00017 #include <string.h>       // Keil: Line added
00018
00019 // NXP: Include some header files that diifers from the origin
00020 #include "lpc17xx_libcfg.h"
00021 #include "lpc17xx_pinsel.h"
00022 //#include "lpc17xx_emac.h"
00023 #include "adc.h"
00024
00025 /* For debugging... */
00026 #include "debug_frmwrk.h"
00027 #include <stdio.h>
00028 #define DB      _DBG((uint8_t *)db_)
00029 char db_[64];
00030 uint16_t _tickVal;
00031
00032 #ifdef MCB_LPC_1768
00033 #define LED_PIN (1<<6) // P2.6
00034 #define LED2_MASK       ((1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6))
00035 #define LED1_MASK       ((1<<28) | (1<<29) | (0x80000000))
00036 #elif defined(IAR_LPC_1768)
00037 #define LED_PIN (1<<25)  //P1.25
00038 #define LED2_MASK ((1<<4))
00039 #define LED1_MASK ((1<<25))
00040 #endif
00041
00042 const unsigned char MyMAC[6] =   // "M1-M2-M3-M4-M5-M6"
00043 {
00044   MYMAC_1, MYMAC_2, MYMAC_3,
00045   MYMAC_4, MYMAC_5, MYMAC_6
00046 };
00047
00048 // NXP LowLevel initializing implementation
00049 // System tick period definition (in microsecond)
00050 #define SYSTICK_PERIOD 210000UL
00051
00052 // System tick interrupt handler prototype
00053 void SysTick_Handler (void);
00054
00055 void LED_Init (void)
00056 {
00057         PINSEL_CFG_Type PinCfg;
00058
00059         uint8_t temp;
00060 #ifdef MCB_LPC_1768
00061         PinCfg.Funcnum = 0;
00062         PinCfg.OpenDrain = 0;
00063         PinCfg.Pinmode = 0;
00064         PinCfg.Portnum = 2;
00065         for (temp = 2; temp <= 6; temp++){
00066                 PinCfg.Pinnum = temp;
00067                 PINSEL_ConfigPin(&PinCfg);
00068         }
00069
00070         PinCfg.Funcnum = 0;
00071         PinCfg.OpenDrain = 0;
00072         PinCfg.Pinmode = 0;
00073         PinCfg.Portnum = 1;
00074         PinCfg.Pinnum = 28;
00075         PINSEL_ConfigPin(&PinCfg);
00076         PinCfg.Pinnum = 29;
00077         PINSEL_ConfigPin(&PinCfg);
00078         PinCfg.Pinnum = 31;
00079         PINSEL_ConfigPin(&PinCfg);
00080
00081         // Set direction to output
00082         LPC_GPIO2->FIODIR |= LED2_MASK;
00083         LPC_GPIO1->FIODIR |= LED1_MASK;
00084
00085         /* Turn off all LEDs */
00086         LPC_GPIO2->FIOCLR = LED2_MASK;
00087         LPC_GPIO1->FIOCLR = LED1_MASK;
00088 #elif defined(IAR_LPC_1768)
00089         LPC_GPIO0->FIODIR |= LED2_MASK;
00090         LPC_GPIO1->FIODIR |= LED1_MASK;
00091
00092         /* Turn off all LEDs */
00093         LPC_GPIO0->FIOSET = LED2_MASK;
00094         LPC_GPIO1->FIOSET = LED1_MASK;
00095 #endif
00096 }
00097 // easyWEB-API function
00098 // initalizes the LAN-controller, reset flags, starts timer-ISR
00099
00100 void TCPLowLevelInit(void)
00101 {
00102         // ADC initializing
00103         ADC_init();
00104
00105         // Initialize LED for system tick timer
00106         LED_Init();
00107
00108         /* Initialize debug via UART0
00109          * – 115200bps
00110          * – 8 data bit
00111          * – No parity
00112          * – 1 stop bit
00113          * – No flow control
00114          */
00115         debug_frmwrk_init();
00116         _DBG_("Hello NXP EMAC");
00117
00118         Init_EMAC();
00119         TransmitControl = 0;
00120         TCPFlags = 0;
00121         TCPStateMachine = CLOSED;
00122         SocketStatus = 0;
00123
00124         // NXP: Initialize System tick timer
00125         // Generate interrupt each SYSTICK_PERIOD microsecond
00126         if (SysTick_Config((4000000/1000000)*SYSTICK_PERIOD)){
00127                 // Capture error
00128                 while (1);
00129         }
00130         _DBG_("Init LowLevelTCP complete!");
00131         sprintf(db_, "IP Address: %d.%d.%d.%d \n\r", MYIP_1, MYIP_2, MYIP_3, MYIP_4);
00132         DB;
00133 }
00134
00135 // easyWEB-API function
00136 // does a passive open (listen on 'MyIP:TCPLocalPort' for an incoming
00137 // connection)
00138
00139 void TCPPassiveOpen(void)
00140 {
00141   if (TCPStateMachine == CLOSED)
00142   {
00143     TCPFlags &= ~TCP_ACTIVE_OPEN;                // let's do a passive open!
00144     TCPStateMachine = LISTENING;
00145     SocketStatus = SOCK_ACTIVE;                  // reset, socket now active
00146   }
00147 }
00148
00149 // easyWEB-API function
00150 // does an active open (tries to establish a connection between
00151 // 'MyIP:TCPLocalPort' and 'RemoteIP:TCPRemotePort')
00152
00153 void TCPActiveOpen(void)
00154 {
00155   if ((TCPStateMachine == CLOSED) || (TCPStateMachine == LISTENING))
00156   {
00157     TCPFlags |= TCP_ACTIVE_OPEN;                 // let's do an active open!
00158     TCPFlags &= ~IP_ADDR_RESOLVED;               // we haven't opponents MAC yet
00159
00160     PrepareARP_REQUEST();                        // ask for MAC by sending a broadcast
00161     LastFrameSent = ARP_REQUEST;
00162     TCPStartRetryTimer();
00163     SocketStatus = SOCK_ACTIVE;                  // reset, socket now active
00164   }
00165 }
00166
00167 // easyWEB-API function
00168 // closes an open connection
00169
00170 void TCPClose(void)
00171 {
00172   switch (TCPStateMachine)
00173   {
00174     case LISTENING :
00175     case SYN_SENT :
00176     {
00177       TCPStateMachine = CLOSED;
00178       TCPFlags = 0;
00179       SocketStatus = 0;
00180       break;
00181     }
00182     case SYN_RECD :
00183     case ESTABLISHED :
00184     {
00185       TCPFlags |= TCP_CLOSE_REQUESTED;
00186       break;
00187     }
00188   }
00189 }
00190
00191 // easyWEB-API function
00192 // releases the receive-buffer and allows easyWEB to store new data
00193 // NOTE: rx-buffer MUST be released periodically, else the other TCP
00194 //       get no ACKs for the data it sent
00195
00196 void TCPReleaseRxBuffer(void)
00197 {
00198   SocketStatus &= ~SOCK_DATA_AVAILABLE;
00199 }
00200
00201 // easyWEB-API function
00202 // transmitts data stored in 'TCP_TX_BUF'
00203 // NOTE: * number of bytes to transmit must have been written to 'TCPTxDataCount'
00204 //       * data-count MUST NOT exceed 'MAX_TCP_TX_DATA_SIZE'
00205
00206 void TCPTransmitTxBuffer(void)
00207 {
00208   if ((TCPStateMachine == ESTABLISHED) || (TCPStateMachine == CLOSE_WAIT))
00209     if (SocketStatus & SOCK_TX_BUF_RELEASED)
00210     {
00211       SocketStatus &= ~SOCK_TX_BUF_RELEASED;               // occupy tx-buffer
00212       TCPUNASeqNr += TCPTxDataCount;                       // advance UNA
00213
00214       TxFrame1Size = ETH_HEADER_SIZE + IP_HEADER_SIZE + TCP_HEADER_SIZE + TCPTxDataCount;
00215       TransmitControl |= SEND_FRAME1;
00216
00217       LastFrameSent = TCP_DATA_FRAME;
00218       TCPStartRetryTimer();
00219     }
00220 }
00221
00222 // Reads the length of the received ethernet frame and checks if the
00223 // destination address is a broadcast message or not
00224 unsigned int IsBroadcast(void) {
00225   unsigned short RecdDestMAC[3];         // 48 bit MAC
00226
00227   RecdFrameLength = StartReadFrame();
00228
00229   CopyFromFrame_EMAC(&RecdDestMAC,  6);           // receive DA to see if it was a broadcast
00230   CopyFromFrame_EMAC(&RecdFrameMAC, 6);           // store SA (for our answer)
00231
00232   if ((RecdDestMAC[0] == 0xFFFF) &&
00233       (RecdDestMAC[1] == 0xFFFF) &&
00234       (RecdDestMAC[2] == 0xFFFF)) {
00235     return(1);
00236   } else {
00237     return (0);
00238   }
00239 }
00240
00241
00242 // easyWEB's 'main()'-function
00243 // must be called from user program periodically (the often - the better)
00244 // handles network, TCP/IP-stack and user events
00245
00246 void DoNetworkStuff(void)
00247 {
00248   if (CheckFrameReceived())                      // Packet received
00249   {
00250     if (IsBroadcast()) {
00251       ProcessEthBroadcastFrame();
00252     } else {
00253       ProcessEthIAFrame();
00254     }
00255     EndReadFrame();                              // release buffer in ethernet controller
00256   }
00257
00258   if (TCPFlags & TCP_TIMER_RUNNING)
00259     if (TCPFlags & TIMER_TYPE_RETRY)
00260     {
00261       if (TCPTimer > RETRY_TIMEOUT)
00262       {
00263         TCPRestartTimer();                       // set a new timeout
00264
00265         if (RetryCounter)
00266         {
00267           TCPHandleRetransmission();             // resend last frame
00268           RetryCounter--;
00269         }
00270         else
00271         {
00272           TCPStopTimer();
00273           TCPHandleTimeout();
00274         }
00275       }
00276     }
00277     else if (TCPTimer > FIN_TIMEOUT)
00278     {
00279       TCPStateMachine = CLOSED;
00280       TCPFlags = 0;                              // reset all flags, stop retransmission...
00281       SocketStatus &= SOCK_DATA_AVAILABLE;       // clear all flags but data available
00282     }
00283
00284   switch (TCPStateMachine)
00285   {
00286     case CLOSED :
00287     case LISTENING :
00288     {
00289       if (TCPFlags & TCP_ACTIVE_OPEN)            // stack has to open a connection?
00290         if (TCPFlags & IP_ADDR_RESOLVED)         // IP resolved?
00291           if (!(TransmitControl & SEND_FRAME2))  // buffer free?
00292           {
00293             TCPSeqNr = ((unsigned long)ISNGenHigh << 16) | (SysTick->VAL & 0xFFFF);  // NXP: changed from T0TC to SysTick->VAL;
00294                                                                 // set local ISN
00295             TCPUNASeqNr = TCPSeqNr;
00296             TCPAckNr = 0;                                       // we don't know what to ACK!
00297             TCPUNASeqNr++;                                      // count SYN as a byte
00298             PrepareTCP_FRAME(TCP_CODE_SYN);                     // send SYN frame
00299             LastFrameSent = TCP_SYN_FRAME;
00300             TCPStartRetryTimer();                               // we NEED a retry-timeout
00301             TCPStateMachine = SYN_SENT;
00302           }
00303       break;
00304     }
00305     case SYN_RECD :
00306     case ESTABLISHED :
00307     {
00308       if (TCPFlags & TCP_CLOSE_REQUESTED)                  // user has user initated a close?
00309         if (!(TransmitControl & (SEND_FRAME2 | SEND_FRAME1)))   // buffers free?
00310           if (TCPSeqNr == TCPUNASeqNr)                          // all data ACKed?
00311           {
00312             TCPUNASeqNr++;
00313             PrepareTCP_FRAME(TCP_CODE_FIN | TCP_CODE_ACK);
00314             LastFrameSent = TCP_FIN_FRAME;
00315             TCPStartRetryTimer();
00316             TCPStateMachine = FIN_WAIT_1;
00317           }
00318       break;
00319     }
00320     case CLOSE_WAIT :
00321     {
00322       if (!(TransmitControl & (SEND_FRAME2 | SEND_FRAME1)))     // buffers free?
00323         if (TCPSeqNr == TCPUNASeqNr)                            // all data ACKed?
00324         {
00325           TCPUNASeqNr++;                                        // count FIN as a byte
00326           PrepareTCP_FRAME(TCP_CODE_FIN | TCP_CODE_ACK);        // we NEED a retry-timeout
00327           LastFrameSent = TCP_FIN_FRAME;                        // time to say goodbye...
00328           TCPStartRetryTimer();
00329           TCPStateMachine = LAST_ACK;
00330         }
00331       break;
00332     }
00333   }
00334
00335   if (TransmitControl & SEND_FRAME2)
00336   {
00337     RequestSend(TxFrame2Size);
00338
00339     if (Rdy4Tx()) {                               // NOTE: when using a very fast MCU, maybe
00340         _DBG_("Send Frm2");
00341         SendFrame2();                              // the EMAC isn't ready yet, include
00342     } else {                                       // a kind of timer or counter here
00343       TCPStateMachine = CLOSED;
00344       SocketStatus = SOCK_ERR_ETHERNET;          // indicate an error to user
00345       TCPFlags = 0;                              // clear all flags, stop timers etc.
00346     }
00347
00348     TransmitControl &= ~SEND_FRAME2;             // clear tx-flag
00349   }
00350
00351   if (TransmitControl & SEND_FRAME1)
00352   {
00353     PrepareTCP_DATA_FRAME();                     // build frame w/ actual SEQ, ACK....
00354     RequestSend(TxFrame1Size);
00355
00356     if (Rdy4Tx()){                                // EMAC ready to accept our frame?
00357         _DBG_("Send Frm1");
00358         SendFrame1();                              // (see note above)
00359     } else {
00360       TCPStateMachine = CLOSED;
00361       SocketStatus = SOCK_ERR_ETHERNET;          // indicate an error to user
00362       TCPFlags = 0;                              // clear all flags, stop timers etc.
00363     }
00364
00365     TransmitControl &= ~SEND_FRAME1;             // clear tx-flag
00366   }
00367 }
00368
00369 // easyWEB internal function
00370 // handles an incoming broadcast frame
00371
00372 void ProcessEthBroadcastFrame(void)
00373 {
00374   unsigned short TargetIP[2];
00375
00376   if (ReadFrameBE_EMAC() == FRAME_ARP)           // get frame type, check for ARP
00377     if (ReadFrameBE_EMAC() == HARDW_ETH10)       // Ethernet frame
00378       if (ReadFrameBE_EMAC() == FRAME_IP)        // check protocol
00379         if (ReadFrameBE_EMAC() == IP_HLEN_PLEN)  // check HLEN, PLEN
00380           if (ReadFrameBE_EMAC() == OP_ARP_REQUEST)
00381           {
00382             DummyReadFrame_EMAC(6);              // ignore sender's hardware address
00383             CopyFromFrame_EMAC(&RecdFrameIP, 4); // read sender's protocol address
00384             DummyReadFrame_EMAC(6);              // ignore target's hardware address
00385             CopyFromFrame_EMAC(&TargetIP, 4);    // read target's protocol address
00386             if (!memcmp(&MyIP, &TargetIP, 4))    // is it for us?
00387               PrepareARP_ANSWER();               // yes->create ARP_ANSWER frame
00388           }
00389 }
00390
00391 // easyWEB internal function
00392 // handles an incoming frame that passed EMAC's address filter
00393 // (individual addressed = IA)
00394
00395 void ProcessEthIAFrame(void)
00396 {
00397   unsigned short TargetIP[2];
00398   unsigned char ProtocolType;
00399
00400   switch (ReadFrameBE_EMAC())                     // get frame type
00401   {
00402     case FRAME_ARP :                             // check for ARP
00403     {
00404       if ((TCPFlags & (TCP_ACTIVE_OPEN | IP_ADDR_RESOLVED)) == TCP_ACTIVE_OPEN)
00405         if (ReadFrameBE_EMAC() == HARDW_ETH10)         // check for the right prot. etc.
00406           if (ReadFrameBE_EMAC() == FRAME_IP)
00407             if (ReadFrameBE_EMAC() == IP_HLEN_PLEN)
00408               if (ReadFrameBE_EMAC() == OP_ARP_ANSWER)
00409               {
00410                 TCPStopTimer();                       // OK, now we've the MAC we wanted ;-)
00411                 CopyFromFrame_EMAC(&RemoteMAC, 6);    // extract opponents MAC
00412                 TCPFlags |= IP_ADDR_RESOLVED;
00413               }
00414       break;
00415     }
00416     case FRAME_IP :                                        // check for IP-type
00417     {
00418       if ((ReadFrameBE_EMAC() & 0xFF00 ) == IP_VER_IHL)     // IPv4, IHL=5 (20 Bytes Header)
00419       {                                                    // ignore Type Of Service
00420         RecdIPFrameLength = ReadFrameBE_EMAC();             // get IP frame's length
00421         ReadFrameBE_EMAC();                                 // ignore identification
00422
00423         if (!(ReadFrameBE_EMAC() & (IP_FLAG_MOREFRAG | IP_FRAGOFS_MASK)))  // only unfragm. frames
00424         {
00425           ProtocolType = ReadFrameBE_EMAC() & 0xFF;         // get protocol, ignore TTL
00426           ReadFrameBE_EMAC();                               // ignore checksum
00427           CopyFromFrame_EMAC(&RecdFrameIP, 4);              // get source IP
00428           CopyFromFrame_EMAC(&TargetIP, 4);                 // get destination IP
00429
00430           if (!memcmp(&MyIP, &TargetIP, 4))                // is it for us?
00431             switch (ProtocolType) {
00432               case PROT_ICMP : { _DBG_("ICMP"); ProcessICMPFrame(); break; }
00433               case PROT_TCP  : { ProcessTCPFrame(); break; }
00434               case PROT_UDP  : break;                      // not implemented!
00435             }
00436         }
00437       }
00438       break;
00439     }
00440   }
00441 }
00442
00443 // easyWEB internal function
00444 // we've just rec'd an ICMP-frame (Internet Control Message Protocol)
00445 // check what to do and branch to the appropriate sub-function
00446
00447 void ProcessICMPFrame(void)
00448 {
00449   unsigned short ICMPTypeAndCode;
00450
00451   ICMPTypeAndCode = ReadFrameBE_EMAC();           // get Message Type and Code
00452   ReadFrameBE_EMAC();                             // ignore ICMP checksum
00453
00454   switch (ICMPTypeAndCode >> 8) {                // check type
00455     case ICMP_ECHO :                             // is echo request?
00456     {
00457       PrepareICMP_ECHO_REPLY();                  // echo as much as we can...
00458       break;
00459     }
00460   }
00461 }
00462
00463 // easyWEB internal function
00464 // we've just rec'd an TCP-frame (Transmission Control Protocol)
00465 // this function mainly implements the TCP state machine according to RFC793
00466
00467 void ProcessTCPFrame(void)
00468 {
00469   unsigned short TCPSegSourcePort;               // segment's source port
00470   unsigned short TCPSegDestPort;                 // segment's destination port
00471   unsigned long TCPSegSeq;                       // segment's sequence number
00472   unsigned long TCPSegAck;                       // segment's acknowledge number
00473   unsigned short TCPCode;                        // TCP code and header length
00474   unsigned char TCPHeaderSize;                   // real TCP header length
00475   unsigned short NrOfDataBytes;                  // real number of data
00476
00477   TCPSegSourcePort = ReadFrameBE_EMAC();                    // get ports
00478   TCPSegDestPort = ReadFrameBE_EMAC();
00479
00480   if (TCPSegDestPort != TCPLocalPort) return;              // drop segment if port doesn't match
00481
00482   TCPSegSeq = (unsigned long)ReadFrameBE_EMAC() << 16;      // get segment sequence nr.
00483   TCPSegSeq |= ReadFrameBE_EMAC();
00484
00485   TCPSegAck = (unsigned long)ReadFrameBE_EMAC() << 16;      // get segment acknowledge nr.
00486   TCPSegAck |= ReadFrameBE_EMAC();
00487
00488   TCPCode = ReadFrameBE_EMAC();                             // get control bits, header length...
00489
00490   TCPHeaderSize = (TCPCode & DATA_OFS_MASK) >> 10;         // header length in bytes
00491   NrOfDataBytes = RecdIPFrameLength - IP_HEADER_SIZE - TCPHeaderSize;     // seg. text length
00492
00493   if (NrOfDataBytes > MAX_TCP_RX_DATA_SIZE) return;        // packet too large for us :...-(
00494
00495   if (TCPHeaderSize > TCP_HEADER_SIZE)                     // ignore options if any
00496     DummyReadFrame_EMAC(TCPHeaderSize - TCP_HEADER_SIZE);
00497
00498   switch (TCPStateMachine)                                 // implement the TCP state machine
00499   {
00500     case CLOSED :
00501     {
00502       if (!(TCPCode & TCP_CODE_RST))
00503       {
00504         TCPRemotePort = TCPSegSourcePort;
00505         memcpy(&RemoteMAC, &RecdFrameMAC, 6);              // save opponents MAC and IP
00506         memcpy(&RemoteIP, &RecdFrameIP, 4);                // for later use
00507
00508         if (TCPCode & TCP_CODE_ACK)                        // make the reset sequence
00509         {                                                  // acceptable to the other
00510           TCPSeqNr = TCPSegAck;                            // TCP
00511           PrepareTCP_FRAME(TCP_CODE_RST);
00512         }
00513         else
00514         {
00515           TCPSeqNr = 0;
00516           TCPAckNr = TCPSegSeq + NrOfDataBytes;
00517           if (TCPCode & (TCP_CODE_SYN | TCP_CODE_FIN)) TCPAckNr++;
00518           PrepareTCP_FRAME(TCP_CODE_RST | TCP_CODE_ACK);
00519         }
00520       }
00521       break;
00522     }
00523     case LISTENING :
00524     {
00525       if (!(TCPCode & TCP_CODE_RST))                       // ignore segment containing RST
00526       {
00527         TCPRemotePort = TCPSegSourcePort;
00528         memcpy(&RemoteMAC, &RecdFrameMAC, 6);              // save opponents MAC and IP
00529         memcpy(&RemoteIP, &RecdFrameIP, 4);                // for later use
00530
00531         if (TCPCode & TCP_CODE_ACK)                        // reset a bad
00532         {                                                  // acknowledgement
00533           TCPSeqNr = TCPSegAck;
00534           PrepareTCP_FRAME(TCP_CODE_RST);
00535         }
00536         else if (TCPCode & TCP_CODE_SYN)
00537         {
00538           TCPAckNr = TCPSegSeq + 1;                           // get remote ISN, next byte we expect
00539             TCPSeqNr = ((unsigned long)ISNGenHigh << 16) | (SysTick->VAL & 0xFFFF);  // Keil: changed from TAR to T0TC;
00540                                                               // set local ISN
00541           TCPUNASeqNr = TCPSeqNr + 1;                         // one byte out -> increase by one
00542           PrepareTCP_FRAME(TCP_CODE_SYN | TCP_CODE_ACK);
00543           LastFrameSent = TCP_SYN_ACK_FRAME;
00544           TCPStartRetryTimer();
00545           TCPStateMachine = SYN_RECD;
00546         }
00547       }
00548       break;
00549     }
00550     case SYN_SENT :
00551     {
00552       if (memcmp(&RemoteIP, &RecdFrameIP, 4)) break;  // drop segment if its IP doesn't belong
00553                                                       // to current session
00554
00555       if (TCPSegSourcePort != TCPRemotePort) break;   // drop segment if port doesn't match
00556
00557       if (TCPCode & TCP_CODE_ACK)                // ACK field significant?
00558         if (TCPSegAck != TCPUNASeqNr)            // is our ISN ACKed?
00559         {
00560           if (!(TCPCode & TCP_CODE_RST))
00561           {
00562             TCPSeqNr = TCPSegAck;
00563             PrepareTCP_FRAME(TCP_CODE_RST);
00564           }
00565           break;                                 // drop segment
00566         }
00567
00568       if (TCPCode & TCP_CODE_RST)                // RST??
00569       {
00570         if (TCPCode & TCP_CODE_ACK)              // if ACK was acceptable, reset
00571         {                                        // connection
00572           TCPStateMachine = CLOSED;
00573           TCPFlags = 0;                          // reset all flags, stop retransmission...
00574           SocketStatus = SOCK_ERR_CONN_RESET;
00575         }
00576         break;                                   // drop segment
00577       }
00578
00579       if (TCPCode & TCP_CODE_SYN)                // SYN??
00580       {
00581         TCPAckNr = TCPSegSeq;                    // get opponents ISN
00582         TCPAckNr++;                              // inc. by one...
00583
00584         if (TCPCode & TCP_CODE_ACK)
00585         {
00586           TCPStopTimer();                        // stop retransmission, other TCP got our SYN
00587           TCPSeqNr = TCPUNASeqNr;                // advance our sequence number
00588
00589           PrepareTCP_FRAME(TCP_CODE_ACK);        // ACK this ISN
00590           TCPStateMachine = ESTABLISHED;
00591           SocketStatus |= SOCK_CONNECTED;
00592           SocketStatus |= SOCK_TX_BUF_RELEASED;  // user may send data now :-)
00593         }
00594         else
00595         {
00596           TCPStopTimer();
00597           PrepareTCP_FRAME(TCP_CODE_SYN | TCP_CODE_ACK);   // our SYN isn't ACKed yet,
00598           LastFrameSent = TCP_SYN_ACK_FRAME;               // now continue with sending
00599           TCPStartRetryTimer();                            // SYN_ACK frames
00600           TCPStateMachine = SYN_RECD;
00601         }
00602       }
00603       break;
00604     }
00605     default :
00606     {
00607       if (memcmp(&RemoteIP, &RecdFrameIP, 4)) break;  // drop segment if IP doesn't belong
00608                                                       // to current session
00609
00610       if (TCPSegSourcePort != TCPRemotePort) break;   // drop segment if port doesn't match
00611
00612       if (TCPSegSeq != TCPAckNr) break;               // drop if it's not the segment we expect
00613
00614       if (TCPCode & TCP_CODE_RST)                // RST??
00615       {
00616         TCPStateMachine = CLOSED;                // close the state machine
00617         TCPFlags = 0;                            // reset all flags, stop retransmission...
00618         SocketStatus = SOCK_ERR_CONN_RESET;      // indicate an error to user
00619         break;
00620       }
00621
00622       if (TCPCode & TCP_CODE_SYN)                // SYN??
00623       {
00624         PrepareTCP_FRAME(TCP_CODE_RST);          // is NOT allowed here! send a reset,
00625         TCPStateMachine = CLOSED;                // close connection...
00626         TCPFlags = 0;                            // reset all flags, stop retransmission...
00627         SocketStatus = SOCK_ERR_REMOTE;          // fatal error!
00628         break;                                   // ...and drop the frame
00629       }
00630
00631       if (!(TCPCode & TCP_CODE_ACK)) break;      // drop segment if the ACK bit is off
00632
00633       if (TCPSegAck == TCPUNASeqNr)              // is our last data sent ACKed?
00634       {
00635         TCPStopTimer();                          // stop retransmission
00636         TCPSeqNr = TCPUNASeqNr;                  // advance our sequence number
00637
00638         switch (TCPStateMachine)                 // change state if necessary
00639         {
00640           case SYN_RECD :                        // ACK of our SYN?
00641           {
00642             TCPStateMachine = ESTABLISHED;       // user may send data now :-)
00643             SocketStatus |= SOCK_CONNECTED;
00644             break;
00645           }
00646           case FIN_WAIT_1 : { TCPStateMachine = FIN_WAIT_2; break; } // ACK of our FIN?
00647           case CLOSING :    { TCPStateMachine = TIME_WAIT; break; }  // ACK of our FIN?
00648           case LAST_ACK :                                            // ACK of our FIN?
00649           {
00650             TCPStateMachine = CLOSED;
00651             TCPFlags = 0;                        // reset all flags, stop retransmission...
00652             SocketStatus &= SOCK_DATA_AVAILABLE; // clear all flags but data available
00653             break;
00654           }
00655           case TIME_WAIT :
00656           {
00657             PrepareTCP_FRAME(TCP_CODE_ACK);      // ACK a retransmission of remote FIN
00658             TCPRestartTimer();                   // restart TIME_WAIT timeout
00659             break;
00660           }
00661         }
00662
00663         if (TCPStateMachine == ESTABLISHED)      // if true, give the frame buffer back
00664           SocketStatus |= SOCK_TX_BUF_RELEASED;  // to user
00665       }
00666
00667       if ((TCPStateMachine == ESTABLISHED) || (TCPStateMachine == FIN_WAIT_1) || (TCPStateMachine == FIN_WAIT_2))
00668         if (NrOfDataBytes)                                 // data available?
00669           if (!(SocketStatus & SOCK_DATA_AVAILABLE))       // rx data-buffer empty?
00670           {
00671             DummyReadFrame_EMAC(6);                        // ignore window, checksum, urgent pointer
00672             CopyFromFrame_EMAC(RxTCPBuffer, NrOfDataBytes);// fetch data and
00673             TCPRxDataCount = NrOfDataBytes;                // ...tell the user...
00674             SocketStatus |= SOCK_DATA_AVAILABLE;           // indicate the new data to user
00675             TCPAckNr += NrOfDataBytes;
00676             PrepareTCP_FRAME(TCP_CODE_ACK);                // ACK rec'd data
00677           }
00678
00679       if (TCPCode & TCP_CODE_FIN)                // FIN??
00680       {
00681         switch (TCPStateMachine)
00682         {
00683           case SYN_RECD :
00684           case ESTABLISHED :
00685           {
00686             TCPStateMachine = CLOSE_WAIT;
00687             break;
00688           }
00689           case FIN_WAIT_1 :
00690           {                                      // if our FIN was ACKed, we automatically
00691             TCPStateMachine = CLOSING;           // enter FIN_WAIT_2 (look above) and therefore
00692             SocketStatus &= ~SOCK_CONNECTED;     // TIME_WAIT
00693             break;
00694           }
00695           case FIN_WAIT_2 :
00696           {
00697             TCPStartTimeWaitTimer();
00698             TCPStateMachine = TIME_WAIT;
00699             SocketStatus &= ~SOCK_CONNECTED;
00700             break;
00701           }
00702           case TIME_WAIT :
00703           {
00704             TCPRestartTimer();
00705             break;
00706           }
00707         }
00708         TCPAckNr++;                              // ACK remote's FIN flag
00709         PrepareTCP_FRAME(TCP_CODE_ACK);
00710       }
00711     }
00712   }
00713 }
00714
00715 // easyWEB internal function
00716 // prepares the TxFrame2-buffer to send an ARP-request
00717
00718 void PrepareARP_REQUEST(void)
00719 {
00720   // Ethernet
00721   memset(&TxFrame2[ETH_DA_OFS], (char)0xFF, 6);                  // we don't know opposites MAC!
00722   memcpy(&TxFrame2[ETH_SA_OFS], &MyMAC, 6);
00723   *(unsigned short *)&TxFrame2[ETH_TYPE_OFS] = SWAPB(FRAME_ARP);
00724
00725   // ARP
00726   *(unsigned short *)&TxFrame2[ARP_HARDW_OFS] = SWAPB(HARDW_ETH10);
00727   *(unsigned short *)&TxFrame2[ARP_PROT_OFS] = SWAPB(FRAME_IP);
00728   *(unsigned short *)&TxFrame2[ARP_HLEN_PLEN_OFS] = SWAPB(IP_HLEN_PLEN);
00729   *(unsigned short *)&TxFrame2[ARP_OPCODE_OFS] = SWAPB(OP_ARP_REQUEST);
00730   memcpy(&TxFrame2[ARP_SENDER_HA_OFS], &MyMAC, 6);
00731   memcpy(&TxFrame2[ARP_SENDER_IP_OFS], &MyIP, 4);
00732   memset(&TxFrame2[ARP_TARGET_HA_OFS], 0x00, 6);           // we don't know opposites MAC!
00733
00734   if (((RemoteIP[0] ^ MyIP[0]) & SubnetMask[0]) || ((RemoteIP[1] ^ MyIP[1]) & SubnetMask[1]))
00735     memcpy(&TxFrame2[ARP_TARGET_IP_OFS], &GatewayIP, 4);   // IP not in subnet, use gateway
00736   else
00737     memcpy(&TxFrame2[ARP_TARGET_IP_OFS], &RemoteIP, 4);    // other IP is next to us...
00738
00739   TxFrame2Size = ETH_HEADER_SIZE + ARP_FRAME_SIZE;
00740   TransmitControl |= SEND_FRAME2;
00741 }
00742
00743 // easyWEB internal function
00744 // prepares the TxFrame2-buffer to send an ARP-answer (reply)
00745
00746 void PrepareARP_ANSWER(void)
00747 {
00748   // Ethernet
00749   memcpy(&TxFrame2[ETH_DA_OFS], &RecdFrameMAC, 6);
00750   memcpy(&TxFrame2[ETH_SA_OFS], &MyMAC, 6);
00751   *(unsigned short *)&TxFrame2[ETH_TYPE_OFS] = SWAPB(FRAME_ARP);
00752
00753   // ARP
00754   *(unsigned short *)&TxFrame2[ARP_HARDW_OFS] = SWAPB(HARDW_ETH10);
00755   *(unsigned short *)&TxFrame2[ARP_PROT_OFS] = SWAPB(FRAME_IP);
00756   *(unsigned short *)&TxFrame2[ARP_HLEN_PLEN_OFS] = SWAPB(IP_HLEN_PLEN);
00757   *(unsigned short *)&TxFrame2[ARP_OPCODE_OFS] = SWAPB(OP_ARP_ANSWER);
00758   memcpy(&TxFrame2[ARP_SENDER_HA_OFS], &MyMAC, 6);
00759   memcpy(&TxFrame2[ARP_SENDER_IP_OFS], &MyIP, 4);
00760   memcpy(&TxFrame2[ARP_TARGET_HA_OFS], &RecdFrameMAC, 6);
00761   memcpy(&TxFrame2[ARP_TARGET_IP_OFS], &RecdFrameIP, 4);
00762
00763   TxFrame2Size = ETH_HEADER_SIZE + ARP_FRAME_SIZE;
00764   TransmitControl |= SEND_FRAME2;
00765 }
00766
00767 // easyWEB internal function
00768 // prepares the TxFrame2-buffer to send an ICMP-echo-reply
00769
00770 void PrepareICMP_ECHO_REPLY(void)
00771 {
00772   unsigned short ICMPDataCount;
00773
00774   if (RecdIPFrameLength > MAX_ETH_TX_DATA_SIZE)                      // don't overload TX-buffer
00775     ICMPDataCount = MAX_ETH_TX_DATA_SIZE - IP_HEADER_SIZE - ICMP_HEADER_SIZE;
00776   else
00777     ICMPDataCount = RecdIPFrameLength - IP_HEADER_SIZE - ICMP_HEADER_SIZE;
00778
00779   // Ethernet
00780   memcpy(&TxFrame2[ETH_DA_OFS], &RecdFrameMAC, 6);
00781   memcpy(&TxFrame2[ETH_SA_OFS], &MyMAC, 6);
00782   *(unsigned short *)&TxFrame2[ETH_TYPE_OFS] = SWAPB(FRAME_IP);
00783
00784   // IP
00785   *(unsigned short *)&TxFrame2[IP_VER_IHL_TOS_OFS] = SWAPB(IP_VER_IHL);
00786   WriteWBE(&TxFrame2[IP_TOTAL_LENGTH_OFS], IP_HEADER_SIZE + ICMP_HEADER_SIZE + ICMPDataCount);
00787   *(unsigned short *)&TxFrame2[IP_IDENT_OFS] = 0;
00788   *(unsigned short *)&TxFrame2[IP_FLAGS_FRAG_OFS] = 0;
00789   *(unsigned short *)&TxFrame2[IP_TTL_PROT_OFS] = SWAPB((DEFAULT_TTL << 8) | PROT_ICMP);
00790   *(unsigned short *)&TxFrame2[IP_HEAD_CHKSUM_OFS] = 0;
00791   memcpy(&TxFrame2[IP_SOURCE_OFS], &MyIP, 4);
00792   memcpy(&TxFrame2[IP_DESTINATION_OFS], &RecdFrameIP, 4);
00793   *(unsigned short *)&TxFrame2[IP_HEAD_CHKSUM_OFS] = CalcChecksum(&TxFrame2[IP_VER_IHL_TOS_OFS], IP_HEADER_SIZE, 0);
00794
00795   // ICMP
00796   *(unsigned short *)&TxFrame2[ICMP_TYPE_CODE_OFS] = SWAPB(ICMP_ECHO_REPLY << 8);
00797   *(unsigned short *)&TxFrame2[ICMP_CHKSUM_OFS] = 0;                   // initialize checksum field
00798
00799   CopyFromFrame_EMAC(&TxFrame2[ICMP_DATA_OFS], ICMPDataCount);        // get data to echo...
00800   *(unsigned short *)&TxFrame2[ICMP_CHKSUM_OFS] = CalcChecksum(&TxFrame2[IP_DATA_OFS], ICMPDataCount + ICMP_HEADER_SIZE, 0);
00801
00802   TxFrame2Size = ETH_HEADER_SIZE + IP_HEADER_SIZE + ICMP_HEADER_SIZE + ICMPDataCount;
00803   TransmitControl |= SEND_FRAME2;
00804 }
00805
00806 // easyWEB internal function
00807 // prepares the TxFrame2-buffer to send a general TCP frame
00808 // the TCPCode-field is passed as an argument
00809
00810 void PrepareTCP_FRAME(unsigned short TCPCode)
00811 {
00812   // Ethernet
00813   memcpy(&TxFrame2[ETH_DA_OFS], &RemoteMAC, 6);
00814   memcpy(&TxFrame2[ETH_SA_OFS], &MyMAC, 6);
00815   *(unsigned short *)&TxFrame2[ETH_TYPE_OFS] = SWAPB(FRAME_IP);
00816
00817   // IP
00818   *(unsigned short *)&TxFrame2[IP_VER_IHL_TOS_OFS] = SWAPB(IP_VER_IHL | IP_TOS_D);
00819
00820   if (TCPCode & TCP_CODE_SYN)                    // if SYN, we want to use the MSS option
00821     *(unsigned short *)&TxFrame2[IP_TOTAL_LENGTH_OFS] = SWAPB(IP_HEADER_SIZE + TCP_HEADER_SIZE + TCP_OPT_MSS_SIZE);
00822   else
00823     *(unsigned short *)&TxFrame2[IP_TOTAL_LENGTH_OFS] = SWAPB(IP_HEADER_SIZE + TCP_HEADER_SIZE);
00824
00825   *(unsigned short *)&TxFrame2[IP_IDENT_OFS] = 0;
00826   *(unsigned short *)&TxFrame2[IP_FLAGS_FRAG_OFS] = 0;
00827   *(unsigned short *)&TxFrame2[IP_TTL_PROT_OFS] = SWAPB((DEFAULT_TTL << 8) | PROT_TCP);
00828   *(unsigned short *)&TxFrame2[IP_HEAD_CHKSUM_OFS] = 0;
00829   memcpy(&TxFrame2[IP_SOURCE_OFS], &MyIP, 4);
00830   memcpy(&TxFrame2[IP_DESTINATION_OFS], &RemoteIP, 4);
00831   *(unsigned short *)&TxFrame2[IP_HEAD_CHKSUM_OFS] = CalcChecksum(&TxFrame2[IP_VER_IHL_TOS_OFS], IP_HEADER_SIZE, 0);
00832
00833   // TCP
00834   WriteWBE(&TxFrame2[TCP_SRCPORT_OFS], TCPLocalPort);
00835   WriteWBE(&TxFrame2[TCP_DESTPORT_OFS], TCPRemotePort);
00836
00837   WriteDWBE(&TxFrame2[TCP_SEQNR_OFS], TCPSeqNr);
00838   WriteDWBE(&TxFrame2[TCP_ACKNR_OFS], TCPAckNr);
00839
00840   *(unsigned short *)&TxFrame2[TCP_WINDOW_OFS] = SWAPB(MAX_TCP_RX_DATA_SIZE);    // data bytes to accept
00841   *(unsigned short *)&TxFrame2[TCP_CHKSUM_OFS] = 0;             // initalize checksum
00842   *(unsigned short *)&TxFrame2[TCP_URGENT_OFS] = 0;
00843
00844   if (TCPCode & TCP_CODE_SYN)                    // if SYN, we want to use the MSS option
00845   {
00846     *(unsigned short *)&TxFrame2[TCP_DATA_CODE_OFS] = SWAPB(0x6000 | TCPCode);   // TCP header length = 24
00847     *(unsigned short *)&TxFrame2[TCP_DATA_OFS] = SWAPB(TCP_OPT_MSS);             // MSS option
00848     *(unsigned short *)&TxFrame2[TCP_DATA_OFS + 2] = SWAPB(MAX_TCP_RX_DATA_SIZE);// max. length of TCP-data we accept
00849     *(unsigned short *)&TxFrame2[TCP_CHKSUM_OFS] = CalcChecksum(&TxFrame2[TCP_SRCPORT_OFS], TCP_HEADER_SIZE + TCP_OPT_MSS_SIZE, 1);
00850     TxFrame2Size = ETH_HEADER_SIZE + IP_HEADER_SIZE + TCP_HEADER_SIZE + TCP_OPT_MSS_SIZE;
00851   }
00852   else
00853   {
00854     *(unsigned short *)&TxFrame2[TCP_DATA_CODE_OFS] = SWAPB(0x5000 | TCPCode);   // TCP header length = 20
00855     *(unsigned short *)&TxFrame2[TCP_CHKSUM_OFS] = CalcChecksum(&TxFrame2[TCP_SRCPORT_OFS], TCP_HEADER_SIZE, 1);
00856     TxFrame2Size = ETH_HEADER_SIZE + IP_HEADER_SIZE + TCP_HEADER_SIZE;
00857   }
00858
00859   TransmitControl |= SEND_FRAME2;
00860 }
00861
00862 // easyWEB internal function
00863 // prepares the TxFrame1-buffer to send a payload-packet
00864
00865 void PrepareTCP_DATA_FRAME(void)
00866 {
00867   // Ethernet
00868   memcpy(&TxFrame1[ETH_DA_OFS], &RemoteMAC, 6);
00869   memcpy(&TxFrame1[ETH_SA_OFS], &MyMAC, 6);
00870   *(unsigned short *)&TxFrame1[ETH_TYPE_OFS] = SWAPB(FRAME_IP);
00871
00872   // IP
00873   *(unsigned short *)&TxFrame1[IP_VER_IHL_TOS_OFS] = SWAPB(IP_VER_IHL | IP_TOS_D);
00874   WriteWBE(&TxFrame1[IP_TOTAL_LENGTH_OFS], IP_HEADER_SIZE + TCP_HEADER_SIZE + TCPTxDataCount);
00875   *(unsigned short *)&TxFrame1[IP_IDENT_OFS] = 0;
00876   *(unsigned short *)&TxFrame1[IP_FLAGS_FRAG_OFS] = 0;
00877   *(unsigned short *)&TxFrame1[IP_TTL_PROT_OFS] = SWAPB((DEFAULT_TTL << 8) | PROT_TCP);
00878   *(unsigned short *)&TxFrame1[IP_HEAD_CHKSUM_OFS] = 0;
00879   memcpy(&TxFrame1[IP_SOURCE_OFS], &MyIP, 4);
00880   memcpy(&TxFrame1[IP_DESTINATION_OFS], &RemoteIP, 4);
00881   *(unsigned short *)&TxFrame1[IP_HEAD_CHKSUM_OFS] = CalcChecksum(&TxFrame1[IP_VER_IHL_TOS_OFS], IP_HEADER_SIZE, 0);
00882
00883   // TCP
00884   WriteWBE(&TxFrame1[TCP_SRCPORT_OFS], TCPLocalPort);
00885   WriteWBE(&TxFrame1[TCP_DESTPORT_OFS], TCPRemotePort);
00886
00887   WriteDWBE(&TxFrame1[TCP_SEQNR_OFS], TCPSeqNr);
00888   WriteDWBE(&TxFrame1[TCP_ACKNR_OFS], TCPAckNr);
00889   *(unsigned short *)&TxFrame1[TCP_DATA_CODE_OFS] = SWAPB(0x5000 | TCP_CODE_ACK);   // TCP header length = 20
00890   *(unsigned short *)&TxFrame1[TCP_WINDOW_OFS] = SWAPB(MAX_TCP_RX_DATA_SIZE);       // data bytes to accept
00891   *(unsigned short *)&TxFrame1[TCP_CHKSUM_OFS] = 0;
00892   *(unsigned short *)&TxFrame1[TCP_URGENT_OFS] = 0;
00893   *(unsigned short *)&TxFrame1[TCP_CHKSUM_OFS] = CalcChecksum(&TxFrame1[TCP_SRCPORT_OFS], TCP_HEADER_SIZE + TCPTxDataCount, 1);
00894 }
00895
00896 // easyWEB internal function
00897 // calculates the TCP/IP checksum. if 'IsTCP != 0', the TCP pseudo-header
00898 // will be included.
00899
00900 unsigned short CalcChecksum(void *Start, unsigned short Count, unsigned char IsTCP)
00901 {
00902   unsigned long Sum = 0;
00903   unsigned short * piStart;                        // Keil: Pointer added to correct expression
00904
00905   if (IsTCP) {                                   // if we've a TCP frame...
00906     Sum += MyIP[0];                              // ...include TCP pseudo-header
00907     Sum += MyIP[1];
00908     Sum += RemoteIP[0];
00909     Sum += RemoteIP[1];
00910     Sum += SwapBytes(Count);                     // TCP header length plus data length
00911     Sum += SWAPB(PROT_TCP);
00912   }
00913
00914   piStart = Start;                               // Keil: Line added
00915   while (Count > 1) {                            // sum words
00916 //  Sum += *((unsigned short *)Start)++;                     // Keil: Line replaced with following line
00917     Sum += *piStart++;
00918     Count -= 2;
00919   }
00920
00921   if (Count)                                     // add left-over byte, if any
00922 //  Sum += *(unsigned char *)Start;              // Keil: Line replaced with following line
00923     Sum += *(unsigned char *)piStart;
00924
00925   while (Sum >> 16)                              // fold 32-bit sum to 16 bits
00926     Sum = (Sum & 0xFFFF) + (Sum >> 16);
00927
00928   return ~Sum;
00929 }
00930
00931 // easyWEB internal function
00932 // starts the timer as a retry-timer (used for retransmission-timeout)
00933
00934 void TCPStartRetryTimer(void)
00935 {
00936   TCPTimer = 0;
00937   RetryCounter = MAX_RETRYS;
00938   TCPFlags |= TCP_TIMER_RUNNING;
00939   TCPFlags |= TIMER_TYPE_RETRY;
00940 }
00941
00942 // easyWEB internal function
00943 // starts the timer as a 'TIME_WAIT'-timer (used to finish a TCP-session)
00944
00945 void TCPStartTimeWaitTimer(void)
00946 {
00947   TCPTimer = 0;
00948   TCPFlags |= TCP_TIMER_RUNNING;
00949   TCPFlags &= ~TIMER_TYPE_RETRY;
00950 }
00951
00952 // easyWEB internal function
00953 // restarts the timer
00954
00955 void TCPRestartTimer(void)
00956 {
00957   TCPTimer = 0;
00958 }
00959
00960 // easyWEB internal function
00961 // stopps the timer
00962
00963 void TCPStopTimer(void)
00964 {
00965   TCPFlags &= ~TCP_TIMER_RUNNING;
00966 }
00967
00968 // easyWEB internal function
00969 // if a retransmission-timeout occured, check which packet
00970 // to resend.
00971
00972 void TCPHandleRetransmission(void)
00973 {
00974   switch (LastFrameSent)
00975   {
00976     case ARP_REQUEST :       { PrepareARP_REQUEST(); break; }
00977     case TCP_SYN_FRAME :     { PrepareTCP_FRAME(TCP_CODE_SYN); break; }
00978     case TCP_SYN_ACK_FRAME : { PrepareTCP_FRAME(TCP_CODE_SYN | TCP_CODE_ACK); break; }
00979     case TCP_FIN_FRAME :     { PrepareTCP_FRAME(TCP_CODE_FIN | TCP_CODE_ACK); break; }
00980     case TCP_DATA_FRAME :    { TransmitControl |= SEND_FRAME1; break; }
00981   }
00982 }
00983
00984 // easyWEB internal function
00985 // if all retransmissions failed, close connection and indicate an error
00986
00987 void TCPHandleTimeout(void)
00988 {
00989   TCPStateMachine = CLOSED;
00990
00991   if ((TCPFlags & (TCP_ACTIVE_OPEN | IP_ADDR_RESOLVED)) == TCP_ACTIVE_OPEN)
00992     SocketStatus = SOCK_ERR_ARP_TIMEOUT;         // indicate an error to user
00993   else
00994     SocketStatus = SOCK_ERR_TCP_TIMEOUT;
00995
00996   TCPFlags = 0;                                  // clear all flags
00997 }
00998
00999
01000 /*
01001  * NXP: old TCPClockHandler() function is replaced with this function
01002  */
01003 // easyWEB internal function
01004 // function executed every 0.210s by the CPU. used for the
01005 // inital sequence number generator (ISN) and the TCP-timer
01006 void SysTick_Handler (void) {           /* SysTick Interrupt Handler (1ms)    */
01007         ISNGenHigh++;                                  // upper 16 bits of initial sequence number
01008         TCPTimer++;                                    // timer for retransmissions
01009         _tickVal = (_tickVal + 1) & 0x03;
01010         if (!_tickVal){
01011 #ifdef MCB_LPC_1768
01012                 LPC_GPIO2->FIOPIN ^= LED_PIN;
01013 #elif defined(IAR_LPC_1768)
01014                 LPC_GPIO1->FIOPIN ^= LED_PIN;
01015 #endif
01016         }
01017 }
01018
01019
01020 // easyWEB internal function
01021 // transfers the contents of 'TxFrame1'-Buffer to the EMAC
01022
01023 void SendFrame1(void)
01024 {
01025   CopyToFrame_EMAC(TxFrame1, TxFrame1Size);
01026 }
01027
01028 // easyWEB internal function
01029 // transfers the contents of 'TxFrame2'-Buffer to the EMAC
01030
01031 void SendFrame2(void)
01032 {
01033   CopyToFrame_EMAC(TxFrame2, TxFrame2Size);
01034 }
01035
01036 // easyWEB internal function
01037 // help function to write a WORD in big-endian byte-order
01038 // to MCU-memory
01039
01040 void WriteWBE(unsigned char *Add, unsigned short Data)
01041 {
01042   *Add++ = Data >> 8;
01043   *Add = (char)Data;
01044 }
01045
01046 // easyWEB internal function
01047 // help function to write a DWORD in big-endian byte-order
01048 // to MCU-memory
01049
01050 void WriteDWBE(unsigned char *Add, unsigned long Data)
01051 {
01052   *Add++ = Data >> 24;
01053   *Add++ = Data >> 16;
01054   *Add++ = Data >> 8;
01055   *Add = (char)Data;
01056 }
01057
01058 // easyWEB internal function
01059 // help function to swap the byte order of a WORD
01060
01061 unsigned short SwapBytes(unsigned short Data)
01062 {
01063   return (Data >> 8) | (Data << 8);
01064 }
01065
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/tcpip.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/tcpip.h
Go to the documentation of this file.
00001 /******************************************************************
00002  *****                                                        *****
00003  *****  Name: tcpip.h                                         *****
00004  *****  Ver.: 1.0                                             *****
00005  *****  Date: 07/05/2001                                      *****
00006  *****  Auth: Andreas Dannenberg                              *****
00007  *****        HTWK Leipzig                                    *****
00008  *****        university of applied sciences                  *****
00009  *****        Germany                                         *****
00010  *****  Func: header-file for tcpip.c                         *****
00011  *****                                                        *****
00012  ******************************************************************/
00013
00014 #ifndef __TCPIP_H
00015 #define __TCPIP_H
00016
00017 // easyWEB-stack definitions
00018 #define MYIP_1               192                 // our internet protocol (IP) address
00019 #define MYIP_2               168
00020 #define MYIP_3               0
00021 #define MYIP_4               100
00022
00023 #define SUBMASK_1            255                 // subnet mask
00024 #define SUBMASK_2            255
00025 #define SUBMASK_3            255
00026 #define SUBMASK_4            0
00027
00028 #define GWIP_1               192                 // standard gateway (used if remote
00029 #define GWIP_2               168                 // IP is no part of our subnet)
00030 #define GWIP_3               0
00031 #define GWIP_4               254
00032
00033 #define RETRY_TIMEOUT        8                   // wait max. 8 x 262ms for an ACK (about 2 sec.)
00034 #define FIN_TIMEOUT          2                   // max. time to wait for an ACK of a FIN
00035                                                  // before closing TCP state-machine (about 0.5 s)
00036 #define MAX_RETRYS           4                   // nr. of resendings before reset conn.
00037                                                  // total nr. of transmissions = MAX_RETRYS + 1
00038
00039 #define MAX_TCP_TX_DATA_SIZE 512                 // max. outgoing TCP data size (even!)
00040 #define MAX_TCP_RX_DATA_SIZE 256                 // max. incoming TCP data size (even!)
00041                                                  // (increasing the buffer-size dramatically
00042                                                  // increases the transfer-speed!)
00043
00044 #define MAX_ETH_TX_DATA_SIZE 60                  // 2nd buffer, used for ARP, ICMP, TCP (even!)
00045                                                  // enough to echo 32 byte via ICMP
00046
00047 #define DEFAULT_TTL          64                  // Time To Live sent with packets
00048
00049 // Ethernet network layer definitions
00050 #define ETH_DA_OFS           0                   // Destination MAC address (48 Bit)
00051 #define ETH_SA_OFS           6                   // Source MAC address (48 Bit)
00052 #define ETH_TYPE_OFS         12                  // Type field (16 Bit)
00053 #define ETH_DATA_OFS         14                  // Frame Data
00054 #define ETH_HEADER_SIZE      14
00055
00056 #define FRAME_ARP            0x0806              // frame types (stored in Type/Length field)
00057 #define FRAME_IP             0x0800
00058
00059 // IPv4 layer definitions
00060 #define IP_VER_IHL_TOS_OFS   ETH_DATA_OFS + 0    // Version, Header Length, Type of Service
00061 #define IP_TOTAL_LENGTH_OFS  ETH_DATA_OFS + 2    // IP Frame's Total Length
00062 #define IP_IDENT_OFS         ETH_DATA_OFS + 4    // Identifying Value
00063 #define IP_FLAGS_FRAG_OFS    ETH_DATA_OFS + 6    // Flags and Fragment Offset
00064 #define IP_TTL_PROT_OFS      ETH_DATA_OFS + 8    // Frame's Time to Live, Protocol
00065 #define IP_HEAD_CHKSUM_OFS   ETH_DATA_OFS + 10   // IP Frame's Header Checksum
00066 #define IP_SOURCE_OFS        ETH_DATA_OFS + 12   // Source Address (32 Bit)
00067 #define IP_DESTINATION_OFS   ETH_DATA_OFS + 16   // Destination Address (32 Bit)
00068 #define IP_DATA_OFS          ETH_DATA_OFS + 20   // Frame Data (if no options)
00069 #define IP_HEADER_SIZE       20                  // w/o options
00070
00071 #define IP_VER_IHL           0x4500              // IPv4, Header Length = 5x32 bit
00072 #define IP_TOS_D             0x0010              // TOS low delay
00073 #define IP_TOS_T             0x0008              // TOS high throughput
00074 #define IP_TOS_R             0x0004              // TOS high reliability
00075
00076 #define IP_FLAG_DONTFRAG     0x4000              // don't fragment IP frame
00077 #define IP_FLAG_MOREFRAG     0x2000              // more fragments available
00078 #define IP_FRAGOFS_MASK      0x1FFF              // indicates where this fragment belongs
00079
00080 #define PROT_ICMP            1                   // Internet Control Message Protocol
00081 #define PROT_TCP             6                   // Transmission Control Protocol
00082 #define PROT_UDP             17                  // User Datagram Protocol
00083
00084 // ARP definitions
00085 #define ARP_HARDW_OFS        ETH_DATA_OFS + 0    // Hardware address type
00086 #define ARP_PROT_OFS         ETH_DATA_OFS + 2    // Protocol
00087 #define ARP_HLEN_PLEN_OFS    ETH_DATA_OFS + 4    // byte length of each hardw. / prot. address
00088 #define ARP_OPCODE_OFS       ETH_DATA_OFS + 6    // Opcode
00089 #define ARP_SENDER_HA_OFS    ETH_DATA_OFS + 8    // Hardw. address of sender of this packet
00090 #define ARP_SENDER_IP_OFS    ETH_DATA_OFS + 14   // IP address of sender
00091 #define ARP_TARGET_HA_OFS    ETH_DATA_OFS + 18   // Hardw. address of target of this packet
00092 #define ARP_TARGET_IP_OFS    ETH_DATA_OFS + 24   // IP address of target
00093 #define ARP_FRAME_SIZE       28
00094
00095 #define HARDW_ETH10          1                   // hardware-type 10Mbps Ethernet
00096 #define IP_HLEN_PLEN         0x0604              // MAC = 6 byte long, IP = 4 byte long
00097 #define OP_ARP_REQUEST       1                   // operations for ARP-frames
00098 #define OP_ARP_ANSWER        2
00099
00100 // ICMP definitions
00101 #define ICMP_TYPE_CODE_OFS   IP_DATA_OFS + 0     // type of message
00102 #define ICMP_CHKSUM_OFS      IP_DATA_OFS + 2     // checksum of ICMP-message (16 bit)
00103 #define ICMP_DATA_OFS        IP_DATA_OFS + 4
00104 #define ICMP_HEADER_SIZE     4
00105
00106 #define ICMP_ECHO            8                   // message is an echo request
00107 #define ICMP_ECHO_REPLY      0                   // message is an echo reply
00108
00109 // TCP layer definitions
00110 #define TCP_SRCPORT_OFS      IP_DATA_OFS + 0     // Source Port (16 bit)
00111 #define TCP_DESTPORT_OFS     IP_DATA_OFS + 2     // Destination Port (16 bit)
00112 #define TCP_SEQNR_OFS        IP_DATA_OFS + 4     // Sequence Number (32 bit)
00113 #define TCP_ACKNR_OFS        IP_DATA_OFS + 8     // Acknowledge Number (32 bit)
00114 #define TCP_DATA_CODE_OFS    IP_DATA_OFS + 12    // Data Offset and Control Bits (16 bit)
00115 #define TCP_WINDOW_OFS       IP_DATA_OFS + 14    // Window Size (16 bit)
00116 #define TCP_CHKSUM_OFS       IP_DATA_OFS + 16    // Checksum Field (16 bit)
00117 #define TCP_URGENT_OFS       IP_DATA_OFS + 18    // Urgent Pointer (16 bit)
00118 #define TCP_DATA_OFS         IP_DATA_OFS + 20    // Frame Data (if no options)
00119 #define TCP_HEADER_SIZE      20                  // size w/o options
00120
00121 #define DATA_OFS_MASK        0xF000              // number of 32 bit words in the TCP Header
00122
00123 #define TCP_CODE_FIN         0x0001
00124 #define TCP_CODE_SYN         0x0002
00125 #define TCP_CODE_RST         0x0004
00126 #define TCP_CODE_PSH         0x0008
00127 #define TCP_CODE_ACK         0x0010
00128 #define TCP_CODE_URG         0x0020
00129
00130 #define TCP_OPT_MSS          0x0204              // Type 2, Option Length 4 (Max. Segment Size)
00131 #define TCP_OPT_MSS_SIZE     4
00132
00133 // define some TCP standard-ports, useful for testing...
00134 #define TCP_PORT_ECHO        7                   // echo
00135 #define TCP_PORT_DISCARD     9                   // discard
00136 #define TCP_PORT_DAYTIME     13                  // daytime
00137 #define TCP_PORT_QOTD        17                  // quote of the day
00138 #define TCP_PORT_CHARGEN     19                  // character generator
00139 #define TCP_PORT_HTTP        80                  // word wide web HTTP
00140
00141 // macros
00142 #define SWAPB(Word)          ((unsigned short)((Word) << 8) | ((Word) >> 8))
00143                                                  // convert little <-> big endian
00144
00145 // typedefs
00146 typedef enum {                                   // states of the TCP-state machine
00147   CLOSED,                                        // according to RFC793
00148   LISTENING,
00149   SYN_SENT,
00150   SYN_RECD,
00151   ESTABLISHED,
00152   FIN_WAIT_1,
00153   FIN_WAIT_2,
00154   CLOSE_WAIT,
00155   CLOSING,
00156   LAST_ACK,
00157   TIME_WAIT
00158 } TTCPStateMachine;
00159
00160 typedef enum {                                   // type of last frame sent. used
00161   ARP_REQUEST,                                   // for retransmissions
00162   TCP_SYN_FRAME,
00163   TCP_SYN_ACK_FRAME,
00164   TCP_FIN_FRAME,
00165   TCP_DATA_FRAME
00166 } TLastFrameSent;
00167
00168 // constants
00169 #ifdef extern                                    // Keil: declarations for modular programming
00170 const unsigned short MyIP[] =                    // "MYIP1.MYIP2.MYIP3.MYIP4"
00171 {
00172   MYIP_1 + (MYIP_2 << 8),                        // use 'unsigned int' to
00173   MYIP_3 + (MYIP_4 << 8)                         // achieve word alignment
00174 };
00175
00176 const unsigned short SubnetMask[] =              // "SUBMASK1.SUBMASK2.SUBMASK3.SUBMASK4"
00177 {
00178   SUBMASK_1 + (SUBMASK_2 << 8),                  // use 'unsigned int' to
00179   SUBMASK_3 + (SUBMASK_4 << 8)                   // achieve word alignment
00180 };
00181
00182 const unsigned short GatewayIP[] =               // "GWIP1.GWIP2.GWIP3.GWIP4"
00183 {
00184   GWIP_1 + (GWIP_2 << 8),                        // use 'unsigned int' to
00185   GWIP_3 + (GWIP_4 << 8)                         // achieve word alignment
00186 };
00187 #else
00188 extern const unsigned short MyIP[2];             // "MYIP1.MYIP2.MYIP3.MYIP4"
00189 extern const unsigned short SubnetMask[2];       // "SUBMASK1.SUBMASK2.SUBMASK3.SUBMASK4"
00190 extern const unsigned short GatewayIP[2];        // "GWIP1.GWIP2.GWIP3.GWIP4"
00191 extern const unsigned char MyMAC[6];             // "M1-M2-M3-M4-M5-M6"
00192 #endif
00193
00194 // easyWEB's internal variables
00195 extern TTCPStateMachine TCPStateMachine;         // perhaps the most important var at all ;-)
00196 extern TLastFrameSent LastFrameSent;             // retransmission type
00197
00198 extern unsigned short ISNGenHigh;                // upper word of our Initial Sequence Number
00199 extern unsigned long TCPSeqNr;                   // next sequence number to send
00200 extern unsigned long TCPUNASeqNr;                // last unaknowledged sequence number
00201                                                  // incremented AFTER sending data
00202 extern unsigned long TCPAckNr;                   // next seq to receive and ack to send
00203                                                  // incremented AFTER receiving data
00204 extern unsigned char TCPTimer;                   // inc'd each 262ms
00205 extern unsigned char RetryCounter;               // nr. of retransmissions
00206
00207 // properties of the just received frame
00208 extern unsigned short RecdFrameLength;           // EMAC reported frame length
00209 extern unsigned short RecdFrameMAC[3];           // 48 bit MAC
00210 extern unsigned short RecdFrameIP[2];            // 32 bit IP
00211 extern unsigned short RecdIPFrameLength;         // 16 bit IP packet length
00212
00213 // the next 3 buffers must be word-aligned!
00214 // (here the 'RecdIPFrameLength' above does that)
00215 #if defined ( __CC_ARM   )
00216 extern unsigned short __align(4) _TxFrame1[(ETH_HEADER_SIZE + IP_HEADER_SIZE + TCP_HEADER_SIZE + MAX_TCP_TX_DATA_SIZE)/2];
00217 extern unsigned short __align(4) _TxFrame2[(ETH_HEADER_SIZE + MAX_ETH_TX_DATA_SIZE)/2];
00218 extern unsigned short __align(4) _RxTCPBuffer[MAX_TCP_RX_DATA_SIZE/2]; // space for incoming TCP-data
00219 #elif defined ( __ICCARM__ )
00220 #pragma data_alignment=4
00221 extern unsigned short _TxFrame1[(ETH_HEADER_SIZE + IP_HEADER_SIZE + TCP_HEADER_SIZE + MAX_TCP_TX_DATA_SIZE)/2];
00222 #pragma data_alignment=4
00223 extern unsigned short _TxFrame2[(ETH_HEADER_SIZE + MAX_ETH_TX_DATA_SIZE)/2];
00224 #pragma data_alignment=4
00225 extern unsigned short _RxTCPBuffer[MAX_TCP_RX_DATA_SIZE/2]; // space for incoming TCP-data
00226 #elif defined   (  __GNUC__  )
00227 extern unsigned short __attribute__ ((aligned (4))) _TxFrame1[(ETH_HEADER_SIZE + IP_HEADER_SIZE + TCP_HEADER_SIZE + MAX_TCP_TX_DATA_SIZE)/2];
00228 extern unsigned short __attribute__ ((aligned (4))) _TxFrame2[(ETH_HEADER_SIZE + MAX_ETH_TX_DATA_SIZE)/2];
00229 extern unsigned short __attribute__ ((aligned (4))) _RxTCPBuffer[MAX_TCP_RX_DATA_SIZE/2]; // space for incoming TCP-data
00230 #endif
00231 #define TxFrame1      ((unsigned char *)_TxFrame1)
00232 #define TxFrame2      ((unsigned char *)_TxFrame2)
00233 #define RxTCPBuffer   ((unsigned char *)_RxTCPBuffer)
00234
00235 extern unsigned short TxFrame1Size;              // bytes to send in TxFrame1
00236 extern unsigned char TxFrame2Size;               // bytes to send in TxFrame2
00237
00238 extern unsigned char TransmitControl;
00239 #define SEND_FRAME1                    0x01
00240 #define SEND_FRAME2                    0x02
00241
00242 extern unsigned char TCPFlags;
00243 #define TCP_ACTIVE_OPEN                0x01      // easyWEB shall initiate a connection
00244 #define IP_ADDR_RESOLVED               0x02      // IP sucessfully resolved to MAC
00245 #define TCP_TIMER_RUNNING              0x04
00246 #define TIMER_TYPE_RETRY               0x08
00247 #define TCP_CLOSE_REQUESTED            0x10
00248
00249 // prototypes
00250 void DoNetworkStuff(void);
00251
00252 // Handlers for incoming frames
00253 void ProcessEthBroadcastFrame(void);
00254 void ProcessEthIAFrame(void);
00255 void ProcessICMPFrame(void);
00256 void ProcessTCPFrame(void);
00257
00258 // fill TX-buffers
00259 void PrepareARP_REQUEST(void);
00260 void PrepareARP_ANSWER(void);
00261 void PrepareICMP_ECHO_REPLY(void);
00262 void PrepareTCP_FRAME(unsigned short TCPCode);
00263 void PrepareTCP_DATA_FRAME(void);
00264
00265 // general help functions
00266 void SendFrame1(void);
00267 void SendFrame2(void);
00268 void TCPStartRetryTimer(void);
00269 void TCPStartTimeWaitTimer(void);
00270 void TCPRestartTimer(void);
00271 void TCPStopTimer(void);
00272 void TCPHandleRetransmission(void);
00273 void TCPHandleTimeout(void);
00274 unsigned short CalcChecksum(void *Start, unsigned short Count, unsigned char IsTCP);
00275
00276 // functions to work with big-endian numbers
00277 unsigned short SwapBytes(unsigned short Data);
00278 void WriteWBE(unsigned char *Add, unsigned short Data);
00279 void WriteDWBE(unsigned char *Add, unsigned long Data);
00280
00281 // easyWEB-API functions
00282 void TCPLowLevelInit(void);                      // setup timer, LAN-controller, flags...
00283 void TCPPassiveOpen(void);                       // listen for a connection
00284 void TCPActiveOpen(void);                        // open connection
00285 void TCPClose(void);                             // close connection
00286 void TCPReleaseRxBuffer(void);                   // indicate to discard rec'd packet
00287 void TCPTransmitTxBuffer(void);                  // initiate transfer after TxBuffer is filled
00288 //void TCPClockHandler(void) __irq;                // Keil: interrupt service routine for timer 0
00289 void SysTick_Handler (void);                                            // NXP: System tick timer is replaced for TCPClockHandler()
00290
00291
00292 // easyWEB-API global vars and flags
00293 extern unsigned short TCPRxDataCount;            // nr. of bytes rec'd
00294 extern unsigned short TCPTxDataCount;            // nr. of bytes to send
00295
00296 extern unsigned short TCPLocalPort;              // TCP ports
00297 extern unsigned short TCPRemotePort;
00298
00299 extern unsigned short RemoteMAC[3];              // MAC and IP of current TCP-session
00300 extern unsigned short RemoteIP[2];
00301
00302 extern unsigned char SocketStatus;
00303 #define SOCK_ACTIVE                    0x01      // state machine NOT closed
00304 #define SOCK_CONNECTED                 0x02      // user may send & receive data
00305 #define SOCK_DATA_AVAILABLE            0x04      // new data available
00306 #define SOCK_TX_BUF_RELEASED           0x08      // user may fill buffer
00307
00308 #define SOCK_ERROR_MASK                0xF0      // bit-mask to check for errors
00309 #define SOCK_ERR_OK                    0x00      // no error
00310 #define SOCK_ERR_ARP_TIMEOUT           0x10      // timeout waiting for an ARP-REPLY
00311 #define SOCK_ERR_TCP_TIMEOUT           0x20      // timeout waiting for an ACK
00312 #define SOCK_ERR_CONN_RESET            0x30      // connection was reset by the other TCP
00313 #define SOCK_ERR_REMOTE                0x40      // remote TCP caused fatal error
00314 #define SOCK_ERR_ETHERNET              0x50      // network interface error (timeout)
00315
00316 // easyWEB-API buffer-pointers
00317 #define TCP_TX_BUF      ((unsigned char *)TxFrame1 + ETH_HEADER_SIZE + IP_HEADER_SIZE + TCP_HEADER_SIZE)
00318 #define TCP_RX_BUF      ((unsigned char *)RxTCPBuffer)
00319
00320 #endif
00321
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.c
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2003, Adam Dunkels.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. The name of the author may not be used to endorse or promote
00014  *    products derived from this software without specific prior
00015  *    written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00018  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00019  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00021  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00023  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00024  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00025  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00026  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00027  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * $Id: telnetd.c,v 1.2 2006/06/07 09:43:54 adam Exp $
00032  *
00033  */
00034
00035 #include "uip.h"
00036 #include "telnetd.h"
00037 #include "memb.h"
00038 #include "shell.h"
00039
00040 #include <string.h>
00041
00042 #define ISO_nl       0x0a
00043 #define ISO_cr       0x0d
00044
00045 struct telnetd_line {
00046   char line[TELNETD_CONF_LINELEN];
00047 };
00048 MEMB(linemem, struct telnetd_line, TELNETD_CONF_NUMLINES);
00049
00050 #define STATE_NORMAL 0
00051 #define STATE_IAC    1
00052 #define STATE_WILL   2
00053 #define STATE_WONT   3
00054 #define STATE_DO     4
00055 #define STATE_DONT   5
00056 #define STATE_CLOSE  6
00057
00058 static struct telnetd_state s;
00059
00060 #define TELNET_IAC   255
00061 #define TELNET_WILL  251
00062 #define TELNET_WONT  252
00063 #define TELNET_DO    253
00064 #define TELNET_DONT  254
00065 /*---------------------------------------------------------------------------*/
00066 static char *
00067 alloc_line(void)
00068 {
00069   return memb_alloc(&linemem);
00070 }
00071 /*---------------------------------------------------------------------------*/
00072 static void
00073 dealloc_line(char *line)
00074 {
00075   memb_free(&linemem, line);
00076 }
00077 /*---------------------------------------------------------------------------*/
00078 void
00079 shell_quit(char *str)
00080 {
00081   s.state = STATE_CLOSE;
00082 }
00083 /*---------------------------------------------------------------------------*/
00084 static void
00085 sendline(char *line)
00086 {
00087   static unsigned int i;
00088
00089   for(i = 0; i < TELNETD_CONF_NUMLINES; ++i) {
00090     if(s.lines[i] == NULL) {
00091       s.lines[i] = line;
00092       break;
00093     }
00094   }
00095   if(i == TELNETD_CONF_NUMLINES) {
00096     dealloc_line(line);
00097   }
00098 }
00099 /*---------------------------------------------------------------------------*/
00100 void
00101 shell_prompt(char *str)
00102 {
00103   char *line;
00104   line = alloc_line();
00105   if(line != NULL) {
00106     strncpy(line, str, TELNETD_CONF_LINELEN);
00107     /*    petsciiconv_toascii(line, TELNETD_CONF_LINELEN);*/
00108     sendline(line);
00109   }
00110 }
00111 /*---------------------------------------------------------------------------*/
00112 void
00113 shell_output(char *str1, char *str2)
00114 {
00115   static unsigned len;
00116   char *line;
00117
00118   line = alloc_line();
00119   if(line != NULL) {
00120     len = strlen(str1);
00121     strncpy(line, str1, TELNETD_CONF_LINELEN);
00122     if(len < TELNETD_CONF_LINELEN) {
00123       strncpy(line + len, str2, TELNETD_CONF_LINELEN - len);
00124     }
00125     len = strlen(line);
00126     if(len < TELNETD_CONF_LINELEN - 2) {
00127       line[len] = ISO_cr;
00128       line[len+1] = ISO_nl;
00129       line[len+2] = 0;
00130     }
00131     /*    petsciiconv_toascii(line, TELNETD_CONF_LINELEN);*/
00132     sendline(line);
00133   }
00134 }
00135 /*---------------------------------------------------------------------------*/
00136 void
00137 telnetd_init(void)
00138 {
00139   uip_listen(HTONS(23));
00140   memb_init(&linemem);
00141   shell_init();
00142 }
00143 /*---------------------------------------------------------------------------*/
00144 static void
00145 acked(void)
00146 {
00147   static unsigned int i;
00148
00149   while(s.numsent > 0) {
00150     dealloc_line(s.lines[0]);
00151     for(i = 1; i < TELNETD_CONF_NUMLINES; ++i) {
00152       s.lines[i - 1] = s.lines[i];
00153     }
00154     s.lines[TELNETD_CONF_NUMLINES - 1] = NULL;
00155     --s.numsent;
00156   }
00157 }
00158 /*---------------------------------------------------------------------------*/
00159 static void
00160 senddata(void)
00161 {
00162   static char *bufptr, *lineptr;
00163   static int buflen, linelen;
00164
00165   bufptr = uip_appdata;
00166   buflen = 0;
00167   for(s.numsent = 0; s.numsent < TELNETD_CONF_NUMLINES &&
00168         s.lines[s.numsent] != NULL ; ++s.numsent) {
00169     lineptr = s.lines[s.numsent];
00170     linelen = strlen(lineptr);
00171     if(linelen > TELNETD_CONF_LINELEN) {
00172       linelen = TELNETD_CONF_LINELEN;
00173     }
00174     if(buflen + linelen < uip_mss()) {
00175       memcpy(bufptr, lineptr, linelen);
00176       bufptr += linelen;
00177       buflen += linelen;
00178     } else {
00179       break;
00180     }
00181   }
00182   uip_send(uip_appdata, buflen);
00183 }
00184 /*---------------------------------------------------------------------------*/
00185 static void
00186 closed(void)
00187 {
00188   static unsigned int i;
00189
00190   for(i = 0; i < TELNETD_CONF_NUMLINES; ++i) {
00191     if(s.lines[i] != NULL) {
00192       dealloc_line(s.lines[i]);
00193     }
00194   }
00195 }
00196 /*---------------------------------------------------------------------------*/
00197 static void
00198 get_char(u8_t c)
00199 {
00200   if(c == ISO_cr) {
00201     return;
00202   }
00203
00204   s.buf[(int)s.bufptr] = c;
00205   if(s.buf[(int)s.bufptr] == ISO_nl ||
00206      s.bufptr == sizeof(s.buf) - 1) {
00207     if(s.bufptr > 0) {
00208       s.buf[(int)s.bufptr] = 0;
00209       /*      petsciiconv_topetscii(s.buf, TELNETD_CONF_LINELEN);*/
00210     }
00211     shell_input(s.buf);
00212     s.bufptr = 0;
00213   } else {
00214     ++s.bufptr;
00215   }
00216 }
00217 /*---------------------------------------------------------------------------*/
00218 static void
00219 sendopt(u8_t option, u8_t value)
00220 {
00221   char *line;
00222   line = alloc_line();
00223   if(line != NULL) {
00224     line[0] = TELNET_IAC;
00225     line[1] = option;
00226     line[2] = value;
00227     line[3] = 0;
00228     sendline(line);
00229   }
00230 }
00231 /*---------------------------------------------------------------------------*/
00232 static void
00233 newdata(void)
00234 {
00235   u16_t len;
00236   u8_t c;
00237   char *dataptr;
00238
00239
00240   len = uip_datalen();
00241   dataptr = (char *)uip_appdata;
00242
00243   while(len > 0 && s.bufptr < sizeof(s.buf)) {
00244     c = *dataptr;
00245     ++dataptr;
00246     --len;
00247     switch(s.state) {
00248     case STATE_IAC:
00249       if(c == TELNET_IAC) {
00250         get_char(c);
00251         s.state = STATE_NORMAL;
00252       } else {
00253         switch(c) {
00254         case TELNET_WILL:
00255           s.state = STATE_WILL;
00256           break;
00257         case TELNET_WONT:
00258           s.state = STATE_WONT;
00259           break;
00260         case TELNET_DO:
00261           s.state = STATE_DO;
00262           break;
00263         case TELNET_DONT:
00264           s.state = STATE_DONT;
00265           break;
00266         default:
00267           s.state = STATE_NORMAL;
00268           break;
00269         }
00270       }
00271       break;
00272     case STATE_WILL:
00273       /* Reply with a DONT */
00274       sendopt(TELNET_DONT, c);
00275       s.state = STATE_NORMAL;
00276       break;
00277
00278     case STATE_WONT:
00279       /* Reply with a DONT */
00280       sendopt(TELNET_DONT, c);
00281       s.state = STATE_NORMAL;
00282       break;
00283     case STATE_DO:
00284       /* Reply with a WONT */
00285       sendopt(TELNET_WONT, c);
00286       s.state = STATE_NORMAL;
00287       break;
00288     case STATE_DONT:
00289       /* Reply with a WONT */
00290       sendopt(TELNET_WONT, c);
00291       s.state = STATE_NORMAL;
00292       break;
00293     case STATE_NORMAL:
00294       if(c == TELNET_IAC) {
00295         s.state = STATE_IAC;
00296       } else {
00297         get_char(c);
00298       }
00299       break;
00300     }
00301
00302
00303   }
00304
00305 }
00306 /*---------------------------------------------------------------------------*/
00307 void
00308 telnetd_appcall(void)
00309 {
00310   static unsigned int i;
00311   if(uip_connected()) {
00312     /*    tcp_markconn(uip_conn, &s);*/
00313     for(i = 0; i < TELNETD_CONF_NUMLINES; ++i) {
00314       s.lines[i] = NULL;
00315     }
00316     s.bufptr = 0;
00317     s.state = STATE_NORMAL;
00318
00319     shell_start();
00320   }
00321
00322   if(s.state == STATE_CLOSE) {
00323     s.state = STATE_NORMAL;
00324     uip_close();
00325     return;
00326   }
00327
00328   if(uip_closed() ||
00329      uip_aborted() ||
00330      uip_timedout()) {
00331     closed();
00332   }
00333
00334   if(uip_acked()) {
00335     acked();
00336   }
00337
00338   if(uip_newdata()) {
00339     newdata();
00340   }
00341
00342   if(uip_rexmit() ||
00343      uip_newdata() ||
00344      uip_acked() ||
00345      uip_connected() ||
00346      uip_poll()) {
00347     senddata();
00348   }
00349 }
00350 /*---------------------------------------------------------------------------*/
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/telnetd/telnetd.h
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2003, Adam Dunkels.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above
00011  *    copyright notice, this list of conditions and the following
00012  *    disclaimer in the documentation and/or other materials provided
00013  *    with the distribution.
00014  * 3. The name of the author may not be used to endorse or promote
00015  *    products derived from this software without specific prior
00016  *    written permission.
00017  *
00018  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00019  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00020  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00021  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00022  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00023  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00024  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00025  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00026  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00027  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00028  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00029  *
00030  * This file is part of the uIP TCP/IP stack
00031  *
00032  * $Id: telnetd.h,v 1.2 2006/06/07 09:43:54 adam Exp $
00033  *
00034  */
00035 #ifndef __TELNETD_H__
00036 #define __TELNETD_H__
00037
00038 #include "uipopt.h"
00039
00040 void telnetd_appcall(void);
00041
00042 #ifndef TELNETD_CONF_LINELEN
00043 #define TELNETD_CONF_LINELEN 40
00044 #endif
00045 #ifndef TELNETD_CONF_NUMLINES
00046 #define TELNETD_CONF_NUMLINES 16
00047 #endif
00048
00049 struct telnetd_state {
00050   char *lines[TELNETD_CONF_NUMLINES];
00051   char buf[TELNETD_CONF_LINELEN];
00052   char bufptr;
00053   u8_t numsent;
00054   u8_t state;
00055 };
00056
00057 typedef struct telnetd_state uip_tcp_appstate_t;
00058
00059 #ifndef UIP_APPCALL
00060 #define UIP_APPCALL     telnetd_appcall
00061 #endif
00062
00063 #endif /* __TELNETD_H__ */
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/Project_Template/Eclipse_GNU/template.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/Project_Template/Eclipse_GNU/template.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          template.c                              yyyy-mm-dd
00003 */
00025 /* Include files */
00026 /* <<add include files here>> */
00027 #include "lpc17xx_libcfg.h"
00028
00029 /* Add Private Types */
00030 /* <<add private type here >> */
00031
00032 /* Add Private Variables */
00033 /* <<add private variables here >> */
00034
00035 /* Add Private Functions */
00036 /* <<add private functions here >> */
00037
00041 int c_entry(void)
00042 {
00043         /* <<add code here >> */
00044         while(1);
00045         return 1;
00046 }
00047
00048 /* Support required entry point for other toolchain */
00049 int main (void)
00050 {
00051         return c_entry();
00052 }
00053
00054 #ifdef  DEBUG
00055 /*******************************************************************************
00056 * @brief                Reports the name of the source file and the source line number
00057 *                               where the CHECK_PARAM error has occurred.
00058 * @param[in]    file Pointer to the source file name
00059 * @param[in]    line assert_param error line source number
00060 * @return               None
00061 *******************************************************************************/
00062 void check_failed(uint8_t *file, uint32_t line)
00063 {
00064         /* User can add his own implementation to report the file name and line number,
00065          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00066
00067         /* Infinite loop */
00068         while(1);
00069 }
00070 #endif
00071
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/SSP/TI/ti_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/SSP/TI/ti_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          ti_test.c                               2010-05-21
00003 */
00026 #include "lpc17xx_ssp.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS ***********************/
00038 /* Idle char */
00039 #define IDLE_CHAR       0xFF
00040
00042 #define USEDSSPDEV_M            0
00043
00045 #define USEDSSPDEV_S            1
00046
00048 #define BUFFER_SIZE                     0x40
00049
00050 #if (USEDSSPDEV_M == USEDSSPDEV_S)
00051 #error "Master and Slave SSP device are duplicated!"
00052 #endif
00053
00054 #if (USEDSSPDEV_M == 0)
00055 #define SSPDEV_M LPC_SSP0
00056 #elif (USEDSSPDEV_M == 1)
00057 #define SSPDEV_M LPC_SSP1
00058 #elif
00059 #error "Master SSP device not defined!"
00060 #endif
00061
00062 #if (USEDSSPDEV_S == 0)
00063 #define SSPDEV_S LPC_SSP0
00064 #elif (USEDSSPDEV_S == 1)
00065 #define SSPDEV_S LPC_SSP1
00066 #else
00067 #error "Slave SSP device not defined!"
00068 #endif
00069
00070 /************************** PRIVATE VARIABLES *************************/
00071 uint8_t menu1[] =
00072 "********************************************************************************\n\r"
00073 "Hello NXP Semiconductors \n\r"
00074 "SSP demo \n\r"
00075 "\t - MCU: LPC17xx \n\r"
00076 "\t - Core: ARM Cortex-M3 \n\r"
00077 "\t - Communicate via: UART0 - 115.200 kbps \n\r"
00078 " This example uses two SSP peripherals in TI frame format \n\r"
00079 " \t one is set as master mode and the other is set as slave mode. \n\r"
00080 "\t The master and slave transfer a number of data bytes together \n\r"
00081 "\t in interrupt mode \n\r"
00082 "********************************************************************************\n\r";
00083 uint8_t menu2[] = "Demo terminated! \n\r";
00084
00085 // SSP Configuration structure variable
00086 SSP_CFG_Type SSP_ConfigStruct;
00087
00088 /* These variable below are used in Master SSP interrupt mode -------------------- */
00089 /* Read data pointer */
00090 uint8_t *pRdBuf_M;
00091 /* Write data pointer */
00092 uint8_t *pWrBuf_M;
00093 /* Index of read data mode */
00094 uint32_t RdIdx_M;
00095 /* Index of write data mode */
00096 uint32_t WrIdx_M;
00097 /* Length of data */
00098 uint32_t DatLen_M;
00099 /* Status Flag indicates current SSP transmission complete or not */
00100 __IO Bool complete_M;
00101 /* Master Tx Buffer */
00102 uint8_t Master_Tx_Buf[BUFFER_SIZE];
00103 /* Master Rx Buffer */
00104 uint8_t Master_Rx_Buf[BUFFER_SIZE];
00105
00106
00107 /* These variable below are used in Slave SSP interrupt mode -------------------- */
00108 /* Read data pointer */
00109 uint8_t *pRdBuf_S;
00110 /* Write data pointer */
00111 uint8_t *pWrBuf_S;
00112 /* Index of read data mode */
00113 uint32_t RdIdx_S;
00114 /* Index of write data mode */
00115 uint32_t WrIdx_S;
00116 /* Length of data */
00117 uint32_t DatLen_S;
00118 /* Status Flag indicates current SSP transmission complete or not */
00119 __IO Bool complete_S;
00120 /* Slave Tx Buffer */
00121 uint8_t Slave_Tx_Buf[BUFFER_SIZE];
00122 /* Slave Rx Buffer */
00123 uint8_t Slave_Rx_Buf[BUFFER_SIZE];
00124
00125
00126 /************************** PRIVATE FUNCTIONS *************************/
00127 void SSP0_IRQHandler(void);
00128 void SSP1_IRQHandler(void);
00129 void ssp_Master_IntHandler(void);
00130 void ssp_Slave_IntHandler(void);
00131
00132 int32_t ssp_MasterReadWrite (LPC_SSP_TypeDef *SSPx,
00133                          void *rbuffer,
00134                          void *wbuffer,
00135                          uint32_t length);
00136 int32_t ssp_SlaveReadWrite (LPC_SSP_TypeDef *SSPx,
00137                          void *rbuffer,
00138                          void *wbuffer,
00139                          uint32_t length);
00140 void print_menu(void);
00141 void Buffer_Init(void);
00142 void Buffer_Verify(void);
00143 void Error_Loop(void);
00144
00145 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00146 /*********************************************************************/
00152 void ssp_Master_IntHandler(void)
00153 {
00154         uint16_t tmp;
00155
00156         /* Clear all interrupt */
00157         SSP_ClearIntPending(SSPDEV_M, SSP_INTCLR_ROR);
00158         SSP_ClearIntPending(SSPDEV_M, SSP_INTCLR_RT);
00159
00160         /* check if RX FIFO contains data */
00161         while (SSP_GetStatus(SSPDEV_M, SSP_STAT_RXFIFO_NOTEMPTY) == SET)
00162         {
00163                 tmp = SSP_ReceiveData(SSPDEV_M);
00164                 if ((pRdBuf_M!= NULL) && (RdIdx_M < DatLen_M))
00165                 {
00166                         *(pRdBuf_M + RdIdx_M) = (uint8_t) tmp;
00167                 }
00168                 RdIdx_M++;
00169         }
00170
00171         /* Check if TX FIFO is not full */
00172         while ((SSP_GetStatus(SSPDEV_M, SSP_STAT_TXFIFO_NOTFULL) == SET)
00173                         && (WrIdx_M < DatLen_M))
00174         {
00175                 /* check if RX FIFO contains data */
00176                 while (SSP_GetStatus(SSPDEV_M, SSP_STAT_RXFIFO_NOTEMPTY) == SET)
00177                 {
00178                         tmp = SSP_ReceiveData(SSPDEV_M);
00179                         if ((pRdBuf_M!= NULL) && (RdIdx_M < DatLen_M))
00180                         {
00181                                 *(pRdBuf_M + RdIdx_M) = (uint8_t) tmp;
00182                         }
00183                         RdIdx_M++;
00184                 }
00185
00186                 if (pWrBuf_M != NULL)
00187                 {
00188                         SSP_SendData(SSPDEV_M, (uint16_t)(*(pWrBuf_M + WrIdx_M)));
00189                 }
00190                 else
00191                 {
00192                         SSP_SendData(SSPDEV_M, IDLE_CHAR);
00193                 }
00194                 WrIdx_M++;
00195         }
00196
00197         /* There're more data to send */
00198         if (WrIdx_M < DatLen_M)
00199         {
00200                 SSP_IntConfig(SSPDEV_M, SSP_INTCFG_TX, ENABLE);
00201         }
00202         /* Otherwise */
00203         else
00204         {
00205                 SSP_IntConfig(SSPDEV_M, SSP_INTCFG_TX, DISABLE);
00206         }
00207
00208         /* There're more data to receive */
00209         if (RdIdx_M < DatLen_M)
00210         {
00211                 SSP_IntConfig(SSPDEV_M, SSP_INTCFG_ROR, ENABLE);
00212                 SSP_IntConfig(SSPDEV_M, SSP_INTCFG_RT, ENABLE);
00213                 SSP_IntConfig(SSPDEV_M, SSP_INTCFG_RX, ENABLE);
00214         }
00215         /* Otherwise */
00216         else
00217         {
00218                 SSP_IntConfig(SSPDEV_M, SSP_INTCFG_ROR, DISABLE);
00219                 SSP_IntConfig(SSPDEV_M, SSP_INTCFG_RT, DISABLE);
00220                 SSP_IntConfig(SSPDEV_M, SSP_INTCFG_RX, DISABLE);
00221         }
00222
00223         /* Set Flag if both Read and Write completed */
00224         if ((WrIdx_M == DatLen_M) && (RdIdx_M == DatLen_M))
00225         {
00226                 complete_M = TRUE;
00227         }
00228 }
00229
00230
00231
00232 /*********************************************************************/
00238 void ssp_Slave_IntHandler(void)
00239 {
00240         uint16_t tmp;
00241
00242         /* Clear all interrupt */
00243         SSP_ClearIntPending(SSPDEV_S, SSP_INTCLR_ROR);
00244         SSP_ClearIntPending(SSPDEV_S, SSP_INTCLR_RT);
00245
00246         /* check if RX FIFO contains data */
00247         while (SSP_GetStatus(SSPDEV_S, SSP_STAT_RXFIFO_NOTEMPTY) == SET)
00248         {
00249                 tmp = SSP_ReceiveData(SSPDEV_S);
00250                 if ((pRdBuf_S!= NULL) && (RdIdx_S < DatLen_S))
00251                 {
00252                         *(pRdBuf_S + RdIdx_S) = (uint8_t) tmp;
00253                 }
00254                 RdIdx_S++;
00255         }
00256
00257         /* Check if TX FIFO is not full */
00258         while ((SSP_GetStatus(SSPDEV_S, SSP_STAT_TXFIFO_NOTFULL) == SET)
00259                         && (WrIdx_S < DatLen_S))
00260         {
00261                 /* check if RX FIFO contains data */
00262                 while (SSP_GetStatus(SSPDEV_S, SSP_STAT_RXFIFO_NOTEMPTY) == SET)
00263                 {
00264                         tmp = SSP_ReceiveData(SSPDEV_S);
00265                         if ((pRdBuf_S!= NULL) && (RdIdx_S < DatLen_S))
00266                         {
00267                                 *(pRdBuf_S + RdIdx_S) = (uint8_t) tmp;
00268                         }
00269                         RdIdx_S++;
00270                 }
00271
00272                 if (pWrBuf_S != NULL)
00273                 {
00274                         SSP_SendData(SSPDEV_S, (uint16_t)(*(pWrBuf_S + WrIdx_S)));
00275                 }
00276                 else
00277                 {
00278                         SSP_SendData(SSPDEV_S, IDLE_CHAR);
00279                 }
00280                 WrIdx_S++;
00281         }
00282
00283         /* There're more data to send */
00284         if (WrIdx_S < DatLen_S)
00285         {
00286                 SSP_IntConfig(SSPDEV_S, SSP_INTCFG_TX, ENABLE);
00287         }
00288         /* Otherwise */
00289         else
00290         {
00291                 SSP_IntConfig(SSPDEV_S, SSP_INTCFG_TX, DISABLE);
00292         }
00293
00294         /* There're more data to receive */
00295         if (RdIdx_S < DatLen_S)
00296         {
00297                 SSP_IntConfig(SSPDEV_S, SSP_INTCFG_ROR, ENABLE);
00298                 SSP_IntConfig(SSPDEV_S, SSP_INTCFG_RT, ENABLE);
00299                 SSP_IntConfig(SSPDEV_S, SSP_INTCFG_RX, ENABLE);
00300         }
00301         /* Otherwise */
00302         else
00303         {
00304                 SSP_IntConfig(SSPDEV_S, SSP_INTCFG_ROR, DISABLE);
00305                 SSP_IntConfig(SSPDEV_S, SSP_INTCFG_RT, DISABLE);
00306                 SSP_IntConfig(SSPDEV_S, SSP_INTCFG_RX, DISABLE);
00307         }
00308
00309         /* Set Flag if both Read and Write completed */
00310         if ((WrIdx_S == DatLen_S) && (RdIdx_S == DatLen_S))
00311         {
00312                 complete_S = TRUE;
00313         }
00314 }
00315
00316
00317 /*********************************************************************/
00322 void SSP0_IRQHandler(void)
00323 {
00324 #if (USEDSSPDEV_M == 0)
00325         ssp_Master_IntHandler();
00326 #endif
00327
00328 #if (USEDSSPDEV_S == 0)
00329         ssp_Slave_IntHandler();
00330 #endif
00331 }
00332
00333 /*********************************************************************/
00338 void SSP1_IRQHandler(void)
00339 {
00340 #if (USEDSSPDEV_M == 1)
00341         ssp_Master_IntHandler();
00342 #endif
00343
00344 #if (USEDSSPDEV_S == 1)
00345         ssp_Slave_IntHandler();
00346 #endif
00347 }
00348
00349
00350 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00351 /*********************************************************************/
00359 int32_t ssp_MasterReadWrite (LPC_SSP_TypeDef *SSPx,
00360                          void *rbuffer,
00361                          void *wbuffer,
00362                          uint32_t length)
00363 {
00364         pRdBuf_M = (uint8_t *) rbuffer;
00365     pWrBuf_M = (uint8_t *) wbuffer;
00366     DatLen_M = length;
00367     RdIdx_M = 0;
00368     WrIdx_M = 0;
00369
00370     // wait for current SSP activity complete
00371     while (SSP_GetStatus(SSPx, SSP_STAT_BUSY));
00372
00373         /* Clear all remaining data in RX FIFO */
00374         while (SSP_GetStatus(SSPx, SSP_STAT_RXFIFO_NOTEMPTY))
00375         {
00376                 SSP_ReceiveData(SSPx);
00377         }
00378
00379 #if (USEDSSPDEV_M == 0)
00380         if (length != 0)
00381         {
00382                 SSP0_IRQHandler();
00383         }
00384 #endif
00385 #if (USEDSSPDEV_M == 1)
00386         if (length != 0)
00387         {
00388                 SSP1_IRQHandler();
00389         }
00390 #endif
00391
00392         // Return 0
00393         return 0;
00394 }
00395
00396 /*********************************************************************/
00404 int32_t ssp_SlaveReadWrite (LPC_SSP_TypeDef *SSPx,
00405                          void *rbuffer,
00406                          void *wbuffer,
00407                          uint32_t length)
00408 {
00409         pRdBuf_S = (uint8_t *) rbuffer;
00410     pWrBuf_S = (uint8_t *) wbuffer;
00411     DatLen_S = length;
00412     RdIdx_S = 0;
00413     WrIdx_S = 0;
00414
00415     // wait for current SSP activity complete
00416     while (SSP_GetStatus(SSPx, SSP_STAT_BUSY))
00417     {
00418         SSP_ReceiveData(SSPx);
00419     }
00420
00421         /* Clear all remaining data in RX FIFO */
00422         while (SSP_GetStatus(SSPx, SSP_STAT_RXFIFO_NOTEMPTY))
00423         {
00424                 SSP_ReceiveData(SSPx);
00425         }
00426 #if (USEDSSPDEV_S == 0)
00427         if (length != 0)
00428         {
00429                 SSP0_IRQHandler();
00430         }
00431 #endif
00432 #if (USEDSSPDEV_S == 1)
00433         if (length != 0)
00434         {
00435                 SSP1_IRQHandler();
00436         }
00437 #endif
00438
00439         // Return 0
00440         return 0;
00441 }
00442
00443
00444 /*********************************************************************/
00449 void Buffer_Init(void)
00450 {
00451         uint8_t i;
00452
00453         for (i = 0; i < BUFFER_SIZE; i++) {
00454                 Master_Tx_Buf[i] = i;
00455                 Slave_Tx_Buf[i] = i;
00456                 Master_Rx_Buf[i] = 0;
00457                 Slave_Rx_Buf[i] = 0;
00458         }
00459
00460 }
00461
00462 /*********************************************************************/
00467 void Buffer_Verify(void)
00468 {
00469         uint8_t i;
00470         uint8_t *pMTx = (uint8_t *) &Master_Tx_Buf[0];
00471         uint8_t *pSTx = (uint8_t *) &Slave_Tx_Buf[0];
00472         uint8_t *pMRx = (uint8_t *) &Master_Rx_Buf[0];
00473         uint8_t *pSRx = (uint8_t *) &Slave_Rx_Buf[0];
00474
00475         for ( i = 0; i < BUFFER_SIZE; i++ )
00476         {
00477                 if ((*pSRx++ != *pMTx++) || (*pMRx++ != *pSTx++))
00478                 {
00479                         /* Call Error Loop */
00480                         Error_Loop();
00481                 }
00482         }
00483 }
00484
00485 /*********************************************************************/
00490 void Error_Loop(void)
00491 {
00492         /* Loop forever */
00493         _DBG_("Verify fail!\n\r");
00494         while (1);
00495 }
00496
00497
00498 /*********************************************************************/
00503 void print_menu(void)
00504 {
00505         _DBG(menu1);
00506 }
00507
00508
00509 /*-------------------------MAIN FUNCTION------------------------------*/
00510 /*********************************************************************/
00515 int c_entry(void)
00516 {
00517         PINSEL_CFG_Type PinCfg;
00518
00519         /* Initialize debug via UART0
00520          * – 115200bps
00521          * – 8 data bit
00522          * – No parity
00523          * – 1 stop bit
00524          * – No flow control
00525          */
00526         debug_frmwrk_init();
00527
00528         // print welcome screen
00529         print_menu();
00530
00531         /*
00532          * Initialize SSP pin connect
00533          * P0.6 - SSEL1
00534          * P0.7 - SCK1
00535          * P0.8 - MISO1
00536          * P0.9 - MOSI1
00537          */
00538         PinCfg.Funcnum = 2;
00539         PinCfg.OpenDrain = 0;
00540         PinCfg.Pinmode = 0;
00541         PinCfg.Portnum = 0;
00542         PinCfg.Pinnum = 6;
00543         PINSEL_ConfigPin(&PinCfg);
00544         PinCfg.Pinnum = 7;
00545         PINSEL_ConfigPin(&PinCfg);
00546         PinCfg.Pinnum = 8;
00547         PINSEL_ConfigPin(&PinCfg);
00548         PinCfg.Pinnum = 9;
00549         PINSEL_ConfigPin(&PinCfg);
00550
00551
00552         /*
00553          * Initialize SSP pin connect
00554          * P0.15 - SCK
00555          * P0.16 - SSEL
00556          * P0.17 - MISO
00557          * P0.18 - MOSI
00558          */
00559         PinCfg.Funcnum = 2;
00560         PinCfg.OpenDrain = 0;
00561         PinCfg.Pinmode = 0;
00562         PinCfg.Portnum = 0;
00563         PinCfg.Pinnum = 15;
00564         PINSEL_ConfigPin(&PinCfg);
00565         PinCfg.Pinnum = 17;
00566         PINSEL_ConfigPin(&PinCfg);
00567         PinCfg.Pinnum = 18;
00568         PINSEL_ConfigPin(&PinCfg);
00569         PinCfg.Pinnum = 16;
00570         PINSEL_ConfigPin(&PinCfg);
00571
00572         /* Initializing Master SSP device section ------------------------------------------- */
00573         // initialize SSP configuration structure to default
00574         SSP_ConfigStructInit(&SSP_ConfigStruct);
00575         // Re-configure SSP to TI frame format
00576         SSP_ConfigStruct.FrameFormat = SSP_FRAME_TI;
00577         // Initialize SSP peripheral with parameter given in structure above
00578         SSP_Init(SSPDEV_M, &SSP_ConfigStruct);
00579
00580         // Enable SSP peripheral
00581         SSP_Cmd(SSPDEV_M, ENABLE);
00582
00583
00584     /* Initializing Slave SSP device section ------------------------------------------- */
00585         // initialize SSP configuration structure to default
00586         SSP_ConfigStructInit(&SSP_ConfigStruct);
00587         /* Re-configure mode for SSP device */
00588         SSP_ConfigStruct.Mode = SSP_SLAVE_MODE;
00589         // Re-configure SSP to TI frame format
00590         SSP_ConfigStruct.FrameFormat = SSP_FRAME_TI;
00591         // Initialize SSP peripheral with parameter given in structure above
00592         SSP_Init(SSPDEV_S, &SSP_ConfigStruct);
00593
00594         // Enable SSP peripheral
00595         SSP_Cmd(SSPDEV_S, ENABLE);
00596
00597         /* Interrupt configuration section ------------------------------------------------- */
00598 #if ((USEDSSPDEV_S == 0) || (USEDSSPDEV_M == 0))
00599         /* preemption = 1, sub-priority = 1 */
00600         NVIC_SetPriority(SSP0_IRQn, ((0x01<<3)|0x01));
00601         /* Enable SSP0 interrupt */
00602         NVIC_EnableIRQ(SSP0_IRQn);
00603 #endif
00604 #if ((USEDSSPDEV_S == 1) || (USEDSSPDEV_M == 1))
00605         /* preemption = 1, sub-priority = 1 */
00606         NVIC_SetPriority(SSP1_IRQn, ((0x01<<3)|0x01));
00607         /* Enable SSP0 interrupt */
00608         NVIC_EnableIRQ(SSP1_IRQn);
00609 #endif
00610
00611         /* Initializing Buffer section ------------------------------------------------- */
00612         Buffer_Init();
00613
00614         /* Start Transmit/Receive between Master and Slave ----------------------------- */
00615         complete_S = FALSE;
00616         complete_M = FALSE;
00617
00618         /* Slave must be ready first */
00619         ssp_SlaveReadWrite(SSPDEV_S, Slave_Rx_Buf, Slave_Tx_Buf, BUFFER_SIZE);
00620         /* Then Master can start its transferring */
00621         ssp_MasterReadWrite(SSPDEV_M, Master_Rx_Buf, Master_Tx_Buf, BUFFER_SIZE);
00622
00623         /* Wait for complete */
00624         while ((complete_S == FALSE) || (complete_M == FALSE));
00625
00626         /* Verify buffer */
00627         Buffer_Verify();
00628
00629         _DBG_("Verify success!\n\r");
00630     /* Loop forever */
00631     while(1);
00632 }
00633
00634 /* With ARM and GHS toolsets, the entry point is main() - this will
00635    allow the linker to generate wrapper code to setup stacks, allocate
00636    heap area, and initialize and copy code and data segments. For GNU
00637    toolsets, the entry point is through __start() in the crt0_gnu.asm
00638    file, and that startup code will setup stacks and data */
00639 int main(void)
00640 {
00641     return c_entry();
00642 }
00643
00644
00645 #ifdef  DEBUG
00646 /*******************************************************************************
00647 * @brief                Reports the name of the source file and the source line number
00648 *                               where the CHECK_PARAM error has occurred.
00649 * @param[in]    file Pointer to the source file name
00650 * @param[in]    line assert_param error line source number
00651 * @return               None
00652 *******************************************************************************/
00653 void check_failed(uint8_t *file, uint32_t line)
00654 {
00655         /* User can add his own implementation to report the file name and line number,
00656          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00657
00658         /* Infinite loop */
00659         while(1);
00660 }
00661 #endif
00662
00663 /*
00664  * @}
00665  */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.c
Go to the documentation of this file.
00001
00013 /*
00014  * Copyright (c) 2004, Swedish Institute of Computer Science.
00015  * All rights reserved.
00016  *
00017  * Redistribution and use in source and binary forms, with or without
00018  * modification, are permitted provided that the following conditions
00019  * are met:
00020  * 1. Redistributions of source code must retain the above copyright
00021  *    notice, this list of conditions and the following disclaimer.
00022  * 2. Redistributions in binary form must reproduce the above copyright
00023  *    notice, this list of conditions and the following disclaimer in the
00024  *    documentation and/or other materials provided with the distribution.
00025  * 3. Neither the name of the Institute nor the names of its contributors
00026  *    may be used to endorse or promote products derived from this software
00027  *    without specific prior written permission.
00028  *
00029  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00030  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00031  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00032  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00033  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00034  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00035  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00036  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00037  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00038  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00039  * SUCH DAMAGE.
00040  *
00041  * This file is part of the uIP TCP/IP stack
00042  *
00043  * Author: Adam Dunkels <adam@sics.se>
00044  *
00045  * $Id: timer.c,v 1.2 2006/06/12 08:00:30 adam Exp $
00046  */
00047
00048 #include "clock.h"
00049 #include "timer.h"
00050
00051 /*---------------------------------------------------------------------------*/
00063 void
00064 timer_set(struct timer *t, clock_time_t interval)
00065 {
00066   t->interval = interval;
00067   t->start = clock_time();
00068 }
00069 /*---------------------------------------------------------------------------*/
00083 void
00084 timer_reset(struct timer *t)
00085 {
00086   t->start += t->interval;
00087 }
00088 /*---------------------------------------------------------------------------*/
00103 void
00104 timer_restart(struct timer *t)
00105 {
00106   t->start = clock_time();
00107 }
00108 /*---------------------------------------------------------------------------*/
00120 int
00121 timer_expired(struct timer *t)
00122 {
00123   return (clock_time_t)(clock_time() - t->start) >= (clock_time_t)t->interval;
00124 }
00125 /*---------------------------------------------------------------------------*/
00126
Generated on Mon Nov 28 2011 11:14:49 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/timer.h
Go to the documentation of this file.
00001
00031 /*
00032  * Copyright (c) 2004, Swedish Institute of Computer Science.
00033  * All rights reserved.
00034  *
00035  * Redistribution and use in source and binary forms, with or without
00036  * modification, are permitted provided that the following conditions
00037  * are met:
00038  * 1. Redistributions of source code must retain the above copyright
00039  *    notice, this list of conditions and the following disclaimer.
00040  * 2. Redistributions in binary form must reproduce the above copyright
00041  *    notice, this list of conditions and the following disclaimer in the
00042  *    documentation and/or other materials provided with the distribution.
00043  * 3. Neither the name of the Institute nor the names of its contributors
00044  *    may be used to endorse or promote products derived from this software
00045  *    without specific prior written permission.
00046  *
00047  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00048  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00049  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00050  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00051  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00052  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00053  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00054  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00055  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00056  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00057  * SUCH DAMAGE.
00058  *
00059  * This file is part of the uIP TCP/IP stack
00060  *
00061  * Author: Adam Dunkels <adam@sics.se>
00062  *
00063  * $Id: timer.h,v 1.3 2006/06/11 21:46:39 adam Exp $
00064  */
00065 #ifndef __TIMER_H__
00066 #define __TIMER_H__
00067
00068 #include "clock.h"
00069
00078 struct timer {
00079   clock_time_t start;
00080   clock_time_t interval;
00081 };
00082
00083 void timer_set(struct timer *t, clock_time_t interval);
00084 void timer_reset(struct timer *t);
00085 void timer_restart(struct timer *t);
00086 int timer_expired(struct timer *t);
00087
00088 #endif /* __TIMER_H__ */
00089
Generated on Mon Nov 28 2011 11:14:49 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Capture/timer_capture.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Capture/timer_capture.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          timer_capture.c                         2010-05-21
00003 */
00025 #include "lpc17xx_timer.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029 #include "lpc17xx_gpio.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE VARIABLES *************************/
00038 uint8_t menu1[] =
00039 "********************************************************************************\n\r"
00040 "Hello NXP Semiconductors \n\r"
00041 "Timer Match interrupt demo \n\r"
00042 "\t - MCU: LPC17xx \n\r"
00043 "\t - Core: ARM Cortex-M3 \n\r"
00044 "\t - Communicate via: UART0 -  115200 bps \n\r"
00045 " Use timer 0 to take a snapshot of the timer value when an input signal \n\r"
00046 " on CAP0.0 transitions \n\r"
00047 "********************************************************************************\n\r";
00048
00049 // UART Configuration structure variable
00050 UART_CFG_Type UARTConfigStruct;
00051 uint32_t MatchCount;
00052
00053 //timer init
00054 TIM_TIMERCFG_Type TIM_ConfigStruct;
00055 TIM_MATCHCFG_Type TIM_MatchConfigStruct ;
00056 TIM_CAPTURECFG_Type TIM_CaptureConfigStruct;
00057 uint8_t volatile timer0_flag = FALSE, timer1_flag = FALSE;
00058
00059 /************************** PRIVATE FUNCTIONS *************************/
00060 /* Interrupt service routines */
00061 void TIMER0_IRQHandler(void);
00062 void TIMER1_IRQHandler(void);
00063
00064 void print_menu(void);
00065 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00066 /*********************************************************************/
00071 void TIMER0_IRQHandler(void)
00072 {
00073         if (TIM_GetIntCaptureStatus(LPC_TIM0,TIM_MR0_INT))
00074         {
00075                 TIM_ClearIntCapturePending(LPC_TIM0,TIM_MR0_INT);
00076                 _DBG("Time capture: ");
00077                 _DBH32(TIM_GetCaptureValue(LPC_TIM0,TIM_COUNTER_INCAP0));_DBG_("");
00078         }
00079 }
00080
00081 /*********************************************************************/
00086 void TIMER1_IRQHandler(void)
00087 {
00088         if (TIM_GetIntCaptureStatus(LPC_TIM1,TIM_MR0_INT))
00089         {
00090                 TIM_ClearIntCapturePending(LPC_TIM1,TIM_MR0_INT);
00091                 _DBG("Time capture: ");
00092                 _DBH32(TIM_GetCaptureValue(LPC_TIM1,TIM_COUNTER_INCAP0));_DBG_("");
00093         }
00094 }
00095
00096 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00097 /*********************************************************************/
00102 void print_menu(void)
00103 {
00104         _DBG(menu1);
00105 }
00106
00107
00108 /*-------------------------MAIN FUNCTION------------------------------*/
00109 /*********************************************************************/
00114 int c_entry(void)
00115 {
00116         PINSEL_CFG_Type PinCfg;
00117
00118         /* Initialize debug via UART0
00119          * – 115200bps
00120          * – 8 data bit
00121          * – No parity
00122          * – 1 stop bit
00123          * – No flow control
00124          */
00125         debug_frmwrk_init();
00126
00127         // print welcome screen
00128         print_menu();
00129
00130         //Config P1.26 as CAP0.0
00131         PinCfg.Funcnum = 3;
00132         PinCfg.OpenDrain = 0;
00133         PinCfg.Pinmode = 0;
00134         PinCfg.Portnum = 1;
00135         PinCfg.Pinnum = 26;
00136         PINSEL_ConfigPin(&PinCfg);
00137
00138         // Initialize timer 0, prescale count time of 1000000uS = 1S
00139         TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
00140         TIM_ConfigStruct.PrescaleValue  = 1000000;
00141
00142         // use channel 0, CAPn.0
00143         TIM_CaptureConfigStruct.CaptureChannel = 0;
00144         // Enable capture on CAPn.0 rising edge
00145         TIM_CaptureConfigStruct.RisingEdge = ENABLE;
00146         // Enable capture on CAPn.0 falling edge
00147         TIM_CaptureConfigStruct.FallingEdge = ENABLE;
00148         // Generate capture interrupt
00149         TIM_CaptureConfigStruct.IntOnCaption = ENABLE;
00150
00151
00152         // Set configuration for Tim_config and Tim_MatchConfig
00153         TIM_Init(LPC_TIM0, TIM_TIMER_MODE,&TIM_ConfigStruct);
00154         TIM_ConfigCapture(LPC_TIM0, &TIM_CaptureConfigStruct);
00155         TIM_ResetCounter(LPC_TIM0);
00156
00157
00158         /* preemption = 1, sub-priority = 1 */
00159         NVIC_SetPriority(TIMER0_IRQn, ((0x01<<3)|0x01));
00160         /* Enable interrupt for timer 0 */
00161         NVIC_EnableIRQ(TIMER0_IRQn);
00162         // To start timer 0
00163         TIM_Cmd(LPC_TIM0,ENABLE);
00164
00165         while (1);
00166 }
00167
00168 /* Support required entry point for other toolchain */
00169 int main (void)
00170 {
00171         return c_entry();
00172 }
00173 #ifdef  DEBUG
00174 /*******************************************************************************
00175 * @brief                Reports the name of the source file and the source line number
00176 *                               where the CHECK_PARAM error has occurred.
00177 * @param[in]    file Pointer to the source file name
00178 * @param[in]    line assert_param error line source number
00179 * @return               None
00180 *******************************************************************************/
00181 void check_failed(uint8_t *file, uint32_t line)
00182 {
00183         /* User can add his own implementation to report the file name and line number,
00184          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00185
00186         /* Infinite loop */
00187         while(1);
00188 }
00189 #endif
00190
00191 /*
00192  * @}
00193  */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Interrupt_Match/timer_int_match.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Interrupt_Match/timer_int_match.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          timer_interrupt_test.c                          2010-05-21
00003 */
00025 #include "lpc17xx_timer.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "lpc17xx_gpio.h"
00029 #include "debug_frmwrk.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE VARIABLES *************************/
00038 uint8_t menu1[] =
00039 "********************************************************************************\n\r"
00040 "Hello NXP Semiconductors \n\r"
00041 "Timer Match interrupt demo \n\r"
00042 "\t - MCU: LPC17xx \n\r"
00043 "\t - Core: ARM Cortex-M3 \n\r"
00044 "\t - Communicate via: UART0 -  115200 bps \n\r"
00045 " Use timer 0 toggle MAT0.0, pin P1.28 at frequency 1Hz\n\r"
00046 "********************************************************************************\n\r";
00047
00048 //timer init
00049 TIM_TIMERCFG_Type TIM_ConfigStruct;
00050 TIM_MATCHCFG_Type TIM_MatchConfigStruct ;
00051 uint8_t volatile timer0_flag = FALSE, timer1_flag = FALSE;
00052 FunctionalState LEDStatus = ENABLE;
00053
00054 /************************** PRIVATE FUNCTION *************************/
00055 /* Interrupt service routine */
00056 void TIMER0_IRQHandler(void);
00057
00058 void print_menu(void);
00059
00060 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00061 /*********************************************************************/
00066 void TIMER0_IRQHandler(void)
00067 {
00068         if (TIM_GetIntStatus(LPC_TIM0, TIM_MR0_INT)== SET)
00069         {
00070                 _DBG_("Match interrupt occur...");
00071         }
00072         TIM_ClearIntPending(LPC_TIM0, TIM_MR0_INT);
00073 }
00074
00075
00076 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00077 /*********************************************************************/
00082 void print_menu(void)
00083 {
00084         _DBG(menu1);
00085 }
00086
00087 /*-------------------------MAIN FUNCTION------------------------------*/
00088 /*********************************************************************/
00093 int c_entry(void)
00094 {
00095         PINSEL_CFG_Type PinCfg;
00096
00097         /* Initialize debug via UART0
00098          * – 115200bps
00099          * – 8 data bit
00100          * – No parity
00101          * – 1 stop bit
00102          * – No flow control
00103          */
00104         debug_frmwrk_init();
00105
00106         // print welcome screen
00107         print_menu();
00108
00109         // Conifg P1.28 as MAT0.0
00110         PinCfg.Funcnum = 3;
00111         PinCfg.OpenDrain = 0;
00112         PinCfg.Pinmode = 0;
00113         PinCfg.Portnum = 1;
00114         PinCfg.Pinnum = 28;
00115         PINSEL_ConfigPin(&PinCfg);
00116
00117         // Initialize timer 0, prescale count time of 100uS
00118         TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
00119         TIM_ConfigStruct.PrescaleValue  = 100;
00120
00121         // use channel 0, MR0
00122         TIM_MatchConfigStruct.MatchChannel = 0;
00123         // Enable interrupt when MR0 matches the value in TC register
00124         TIM_MatchConfigStruct.IntOnMatch   = TRUE;
00125         //Enable reset on MR0: TIMER will reset if MR0 matches it
00126         TIM_MatchConfigStruct.ResetOnMatch = TRUE;
00127         //Stop on MR0 if MR0 matches it
00128         TIM_MatchConfigStruct.StopOnMatch  = FALSE;
00129         //Toggle MR0.0 pin if MR0 matches it
00130         TIM_MatchConfigStruct.ExtMatchOutputType =TIM_EXTMATCH_TOGGLE;
00131         // Set Match value, count value of 10000 (10000 * 100uS = 1000000us = 1s --> 1 Hz)
00132         TIM_MatchConfigStruct.MatchValue   = 10000;
00133
00134         // Set configuration for Tim_config and Tim_MatchConfig
00135         TIM_Init(LPC_TIM0, TIM_TIMER_MODE,&TIM_ConfigStruct);
00136         TIM_ConfigMatch(LPC_TIM0,&TIM_MatchConfigStruct);
00137
00138         /* preemption = 1, sub-priority = 1 */
00139         NVIC_SetPriority(TIMER0_IRQn, ((0x01<<3)|0x01));
00140         /* Enable interrupt for timer 0 */
00141         NVIC_EnableIRQ(TIMER0_IRQn);
00142         // To start timer 0
00143         TIM_Cmd(LPC_TIM0,ENABLE);
00144
00145         while (1);
00146
00147
00148 }
00149
00150 /* Support required entry point for other toolchain */
00151 int main (void)
00152 {
00153         return c_entry();
00154 }
00155 #ifdef  DEBUG
00156 /*******************************************************************************
00157 * @brief                Reports the name of the source file and the source line number
00158 *                               where the CHECK_PARAM error has occurred.
00159 * @param[in]    file Pointer to the source file name
00160 * @param[in]    line assert_param error line source number
00161 * @return               None
00162 *******************************************************************************/
00163 void check_failed(uint8_t *file, uint32_t line)
00164 {
00165         /* User can add his own implementation to report the file name and line number,
00166          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00167
00168         /* Infinite loop */
00169         while(1);
00170 }
00171 #endif
00172
00173 /*
00174  * @}
00175  */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Polling_Match/timer_poll_match.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/TIMER/Polling_Match/timer_poll_match.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          timer_delay_test.c                              2010-05-21
00003 */
00025 #include "lpc17xx_timer.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE VARIABLES *************************/
00038 uint8_t menu1[] =
00039 "********************************************************************************\n\r"
00040 "Hello NXP Semiconductors \n\r"
00041 "Timer delay demo \n\r"
00042 "\t - MCU: LPC17xx \n\r"
00043 "\t - Core: ARM Cortex-M3 \n\r"
00044 "\t - Communicate via: UART0 - 115200 bps \n\r"
00045 " Use timer 0 in polling mode \n\r"
00046 " Toggle MAT0.0 at frequency 10Hz \n\r"
00047 "********************************************************************************\n\r";
00048 //timer init
00049 TIM_TIMERCFG_Type TIM_ConfigStruct;
00050 TIM_MATCHCFG_Type TIM_MatchConfigStruct;
00051
00052 /************************** PRIVATE FUNCTIONS *************************/
00053 void print_menu(void);
00054
00055
00056 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00057 /*********************************************************************/
00062 void print_menu(void)
00063 {
00064         _DBG(menu1);
00065 }
00066
00067
00068 /*-------------------------MAIN FUNCTION------------------------------*/
00069 /*********************************************************************/
00074 int c_entry(void)
00075 {
00076         PINSEL_CFG_Type PinCfg;
00077
00078         /* Initialize debug via UART0
00079          * – 115200bps
00080          * – 8 data bit
00081          * – No parity
00082          * – 1 stop bit
00083          * – No flow control
00084          */
00085         debug_frmwrk_init();
00086
00087         // print welcome screen
00088         print_menu();
00089
00090         // Conifg P1.28 as MAT0.0
00091         PinCfg.Funcnum = 3;
00092         PinCfg.OpenDrain = 0;
00093         PinCfg.Pinmode = 0;
00094         PinCfg.Portnum = 1;
00095         PinCfg.Pinnum = 28;
00096         PINSEL_ConfigPin(&PinCfg);
00097
00098         // Initialize timer 0, prescale count time of 100uS
00099         TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
00100         TIM_ConfigStruct.PrescaleValue  = 100;
00101
00102         // use channel 0, MR0
00103         TIM_MatchConfigStruct.MatchChannel = 0;
00104         // Disable interrupt when MR0 matches the value in TC register
00105         TIM_MatchConfigStruct.IntOnMatch   = TRUE;
00106         //Enable reset on MR0: TIMER will reset if MR0 matches it
00107         TIM_MatchConfigStruct.ResetOnMatch = TRUE;
00108         //Stop on MR0 if MR0 matches it
00109         TIM_MatchConfigStruct.StopOnMatch  = FALSE;
00110         //Toggle MR0.0 pin if MR0 matches it
00111         TIM_MatchConfigStruct.ExtMatchOutputType =TIM_EXTMATCH_TOGGLE;
00112         // Set Match value, count value of 1000 (1000 * 100uS = 100mS --> 10Hz)
00113         TIM_MatchConfigStruct.MatchValue   = 1000;
00114
00115         // Set configuration for Tim_config and Tim_MatchConfig
00116         TIM_Init(LPC_TIM0, TIM_TIMER_MODE,&TIM_ConfigStruct);
00117         TIM_ConfigMatch(LPC_TIM0,&TIM_MatchConfigStruct);
00118         TIM_Cmd(LPC_TIM0,ENABLE);
00119         while (1)
00120         {
00121                 // Wait for 1000 millisecond
00122                 while ( !(TIM_GetIntStatus(LPC_TIM0,TIM_MR0_INT)));
00123                 TIM_ClearIntPending(LPC_TIM0,TIM_MR0_INT);
00124                 _DBG_("Match interrupt occur..");
00125         }
00126 }
00127
00128 /* Support required entry point for other toolchain */
00129 int main (void)
00130 {
00131         return c_entry();
00132 }
00133
00134 #ifdef  DEBUG
00135 /*******************************************************************************
00136 * @brief                Reports the name of the source file and the source line number
00137 *                               where the CHECK_PARAM error has occurred.
00138 * @param[in]    file Pointer to the source file name
00139 * @param[in]    line assert_param error line source number
00140 * @return               None
00141 *******************************************************************************/
00142 void check_failed(uint8_t *file, uint32_t line)
00143 {
00144         /* User can add his own implementation to report the file name and line number,
00145          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00146
00147         /* Infinite loop */
00148         while(1);
00149 }
00150 #endif
00151
00152 /*
00153  * @}
00154  */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Retarget.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/common/Retarget.c
Go to the documentation of this file.
00001 /******************************************************************************/
00002 /* RETARGET.C: 'Retarget' layer for target-dependent low level functions      */
00003 /******************************************************************************/
00004 /* This file is part of the uVision/ARM development tools.                    */
00005 /* Copyright (c) 2005-2007 Keil Software. All rights reserved.                */
00006 /* This software may only be used under the terms of a valid, current,        */
00007 /* end user licence from KEIL for a compatible version of KEIL software       */
00008 /* development tools. Nothing else gives you the right to use this software.  */
00009 /******************************************************************************/
00010
00011 #include <stdio.h>
00012 #include <rt_misc.h>
00013
00014 #pragma import(__use_no_semihosting_swi)
00015
00016 // implementation depends on the microcontroller hardware
00017 extern unsigned char  sendchar(unsigned char ch);  /* in serial.c */
00018 extern unsigned char  getkey(void);
00019
00020
00021 struct __FILE { int handle; /* Add whatever you need here */ };
00022 FILE __stdout;
00023 FILE __stdin;
00024
00025 int fputc(int ch, FILE *f) {
00026   return (sendchar(ch));
00027 }
00028
00029 // simplified fgetc version that only redirects STDIN
00030 #if 1
00031 int fgetc(FILE * fp)
00032 {
00033 // redirect STDIN
00034  return(getkey());
00035 }
00036 #else  // echo a char
00037 int fgetc(FILE * fp)
00038 {
00039  return(sendchar(getkey()));
00040 }
00041 #endif
00042
00043
00044 int ferror(FILE *f) {
00045   /* Your implementation of ferror */
00046   return EOF;
00047 }
00048
00049
00050 void _ttywrch(int ch) {
00051   sendchar(ch);
00052 }
00053
00054
00055 void _sys_exit(int return_code) {
00056 label:  goto label;  /* endless loop */
00057 }
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/emac.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/emac.c
Go to the documentation of this file.
00001 #include "emac.h"
00002 #include "lpc17xx_emac.h"
00003 #include "lpc17xx_pinsel.h"
00004 #include <string.h>
00005 #include <stdio.h>
00006
00007
00008 /* For debugging... */
00009 #include "debug_frmwrk.h"
00010 #include <stdio.h>
00011
00012 /* Example group ----------------------------------------------------------- */
00018 #define DB      _DBG((uint8_t *)db)
00019 char db[64];
00020
00021 /* Init the LPC17xx ethernet */
00022 BOOL_8 tapdev_init(void)
00023 {
00024         /* EMAC configuration type */
00025         EMAC_CFG_Type Emac_Config;
00026         /* pin configuration */
00027         PINSEL_CFG_Type PinCfg;
00028         /* EMAC address */
00029         uint8_t EMACAddr[] = {EMAC_ADDR0, EMAC_ADDR1, EMAC_ADDR2, \
00030                                                 EMAC_ADDR3, EMAC_ADDR4, EMAC_ADDR5};
00031
00032 #if AUTO_NEGOTIATION_ENA != 0
00033         Emac_Config.Mode = EMAC_MODE_AUTO;
00034 #else
00035         #if (FIX_SPEED == SPEED_100)
00036                 #if (FIX_DUPLEX == FULL_DUPLEX)
00037                         Emac_Config.Mode = EMAC_MODE_100M_FULL;
00038                 #elif (FIX_DUPLEX == HALF_DUPLEX)
00039                         Emac_Config.Mode = EMAC_MODE_100M_HALF;
00040                 #else
00041                         #error Does not support this duplex option
00042                 #endif
00043         #elif (FIX_SPEED == SPEED_10)
00044                 #if (FIX_DUPLEX == FULL_DUPLEX)
00045                                 Emac_Config.Mode = EMAC_MODE_10M_FULL;
00046                 #elif (FIX_DUPLEX == HALF_DUPLEX)
00047                                 Emac_Config.Mode = EMAC_MODE_10M_HALF;
00048                 #else
00049                         #error Does not support this duplex option
00050                 #endif
00051         #else
00052                 #error Does not support this speed option
00053         #endif
00054 #endif
00055
00056         /*
00057          * Enable P1 Ethernet Pins:
00058          * P1.0 - ENET_TXD0
00059          * P1.1 - ENET_TXD1
00060          * P1.4 - ENET_TX_EN
00061          * P1.8 - ENET_CRS
00062          * P1.9 - ENET_RXD0
00063          * P1.10 - ENET_RXD1
00064          * P1.14 - ENET_RX_ER
00065          * P1.15 - ENET_REF_CLK
00066          * P1.16 - ENET_MDC
00067          * P1.17 - ENET_MDIO
00068          */
00069         PinCfg.Funcnum = 1;
00070         PinCfg.OpenDrain = 0;
00071         PinCfg.Pinmode = 0;
00072         PinCfg.Portnum = 1;
00073
00074         PinCfg.Pinnum = 0;
00075         PINSEL_ConfigPin(&PinCfg);
00076         PinCfg.Pinnum = 1;
00077         PINSEL_ConfigPin(&PinCfg);
00078         PinCfg.Pinnum = 4;
00079         PINSEL_ConfigPin(&PinCfg);
00080         PinCfg.Pinnum = 8;
00081         PINSEL_ConfigPin(&PinCfg);
00082         PinCfg.Pinnum = 9;
00083         PINSEL_ConfigPin(&PinCfg);
00084         PinCfg.Pinnum = 10;
00085         PINSEL_ConfigPin(&PinCfg);
00086         PinCfg.Pinnum = 14;
00087         PINSEL_ConfigPin(&PinCfg);
00088         PinCfg.Pinnum = 15;
00089         PINSEL_ConfigPin(&PinCfg);
00090         PinCfg.Pinnum = 16;
00091         PINSEL_ConfigPin(&PinCfg);
00092         PinCfg.Pinnum = 17;
00093         PINSEL_ConfigPin(&PinCfg);
00094
00095         _DBG_("Init EMAC module");
00096         sprintf(db,"MAC addr: %X-%X-%X-%X-%X-%X \n\r", \
00097                          EMACAddr[0],  EMACAddr[1],  EMACAddr[2], \
00098                           EMACAddr[3],  EMACAddr[4],  EMACAddr[5]);
00099         DB;
00100
00101         Emac_Config.Mode = EMAC_MODE_AUTO;
00102         Emac_Config.pbEMAC_Addr = EMACAddr;
00103         // Initialize EMAC module with given parameter
00104         if (EMAC_Init(&Emac_Config) == ERROR){
00105                 return (FALSE);
00106         }
00107
00108         _DBG_("Init EMAC complete");
00109
00110         return (TRUE);
00111 }
00112
00113 /* receive an Ethernet frame from MAC/DMA controller */
00114 UNS_32 tapdev_read(void * pPacket)
00115 {
00116         UNS_32 Size = EMAC_MAX_PACKET_SIZE;
00117         UNS_32 in_size;
00118         EMAC_PACKETBUF_Type RxPack;
00119
00120         // Check Receive status
00121         if (EMAC_CheckReceiveIndex() == FALSE){
00122                 return (0);
00123         }
00124
00125         // Get size of receive data
00126         in_size = EMAC_GetReceiveDataSize() + 1;
00127
00128         Size = MIN(Size,in_size);
00129
00130         // Setup Rx packet
00131         RxPack.pbDataBuf = (uint32_t *)pPacket;
00132         RxPack.ulDataLen = Size;
00133         EMAC_ReadPacketBuffer(&RxPack);
00134
00135         // update receive status
00136         EMAC_UpdateRxConsumeIndex();
00137         return(Size);
00138 }
00139
00140 /* transmit an Ethernet frame to MAC/DMA controller */
00141 BOOL_8 tapdev_send(void *pPacket, UNS_32 size)
00142 {
00143         EMAC_PACKETBUF_Type TxPack;
00144
00145         // Check size
00146         if(size == 0){
00147                 return(TRUE);
00148         }
00149
00150         // check Tx Slot is available
00151         if (EMAC_CheckTransmitIndex() == FALSE){
00152                 return (FALSE);
00153         }
00154
00155         size = MIN(size,EMAC_MAX_PACKET_SIZE);
00156
00157         // Setup Tx Packet buffer
00158         TxPack.ulDataLen = size;
00159         TxPack.pbDataBuf = (uint32_t *)pPacket;
00160         EMAC_WritePacketBuffer(&TxPack);
00161         EMAC_UpdateTxProduceIndex();
00162
00163         return(TRUE);
00164 }
00165
00166 /*
00167  * @}
00168  */
Generated on Mon Nov 28 2011 11:14:46 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/emac.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/emac.h
Go to the documentation of this file.
00001 #ifndef __EMAC_H
00002 #define __EMAC_H
00003
00004 #include "lpc_types.h"
00005 #include "uip-conf.h"
00006 #include "uipopt.h"
00007 #include "lpc17xx_emac.h"
00008
00009 #define EMAC_MAX_PACKET_SIZE (UIP_CONF_BUFFER_SIZE + 16)        // 1536 bytes
00010
00011 #define ENET_DMA_DESC_NUMB      3
00012 #define AUTO_NEGOTIATION_ENA    1               // Enable PHY Auto-negotiation
00013 #define PHY_TO                  200000  // ~10sec
00014 #define RMII                                    1               // If zero, it's a MII interface
00015
00016 /* This is the MAC address of LPC17xx */
00017 /* 0C 1D 12 E0 1F 10*/
00018 #ifdef MCB_LPC_1768
00019 #define EMAC_ADDR0              0x10
00020 #define EMAC_ADDR1              0x1F
00021 #define EMAC_ADDR2              0xE0
00022 #define EMAC_ADDR3              0x12
00023 #define EMAC_ADDR4              0x1D
00024 #define EMAC_ADDR5              0x0C
00025 #elif defined(IAR_LPC_1768)
00026 #define EMAC_ADDR0              0x00
00027 #define EMAC_ADDR1              0xFF
00028 #define EMAC_ADDR2              0xFF
00029 #define EMAC_ADDR3              0xFF
00030 #define EMAC_ADDR4              0xFF
00031 #define EMAC_ADDR5              0xFF
00032 #endif
00033
00034
00035 /* Configurable macro ---------------------- */
00036 #define SPEED_100               1
00037 #define SPEED_10                0
00038 #define FULL_DUPLEX             1
00039 #define HALF_DUPLEX             0
00040
00041 #define FIX_SPEED               SPEED_100
00042 #define FIX_DUPLEX              FULL_DUPLEX
00043
00044
00045 BOOL_8 tapdev_init(void);
00046 UNS_32 tapdev_read(void * pPacket);
00047 BOOL_8 tapdev_send (void *pPacket, UNS_32 size);
00048
00049 #endif
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/AutoBaud/uart_autobaud_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/AutoBaud/uart_autobaud_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          uart_autobaud_test.c                            2010-05-21
00003 */
00026 #include "lpc17xx_uart.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE VARIABLES *************************/
00037 uint8_t syncmenu[] = "AutoBaudrate Status: Synchronous! \n\r";
00038 uint8_t menu1[] = "Hello NXP Semiconductors \n\r";
00039 uint8_t menu2[] =
00040 "UART Auto Baudrate demo\n\r\t "
00041 "MCU LPC17xx - ARM Cortex-M3 \n\r\t "
00042 "UART0 - Auto Baud rate mode used \n\r";
00043 uint8_t menu3[] = "UART demo terminated!\n";
00044
00045 /* Synchronous Flag */
00046 __IO FlagStatus Synchronous;
00047
00048 /************************** PRIVATE FUNCTIONS *************************/
00049 void UART0_IRQHandler(void);
00050
00051 void print_menu(void);
00052
00053 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00054 /*********************************************************************/
00059 void UART0_IRQHandler(void)
00060 {
00061         // Call Standard UART 0 interrupt handler
00062         uint32_t intsrc, tmp, tmp1;
00063
00064         /* Determine the interrupt source */
00065         intsrc = UART_GetIntId(LPC_UART0);
00066         tmp = intsrc & UART_IIR_INTID_MASK;
00067
00068         // Receive Line Status
00069         if (tmp == UART_IIR_INTID_RLS){
00070                 // Check line status
00071                 tmp1 = UART_GetLineStatus(LPC_UART0);
00072                 // Mask out the Receive Ready and Transmit Holding empty status
00073                 tmp1 &= (UART_LSR_OE | UART_LSR_PE | UART_LSR_FE \
00074                                 | UART_LSR_BI | UART_LSR_RXFE);
00075                 // If any error exist
00076                 if (tmp1) {
00077
00078                         while(tmp1){
00079                                 ; //implement error handling here
00080                         }
00081                 }
00082         }
00083
00084
00085         intsrc &= (UART_IIR_ABEO_INT | UART_IIR_ABTO_INT);
00086         // Check if End of auto-baudrate interrupt or Auto baudrate time out
00087         if (intsrc){
00088                 // Clear interrupt pending
00089                 if(intsrc & UART_IIR_ABEO_INT)
00090                         UART_ABClearIntPending(LPC_UART0, UART_AUTOBAUD_INTSTAT_ABEO);
00091                 if (intsrc & UART_IIR_ABTO_INT)
00092                         UART_ABClearIntPending(LPC_UART0, UART_AUTOBAUD_INTSTAT_ABTO);
00093                         if (Synchronous == RESET)
00094                         {
00095                                 /* Interrupt caused by End of auto-baud */
00096                                 if (intsrc & UART_AUTOBAUD_INTSTAT_ABEO){
00097                                         // Disable AB interrupt
00098                                         UART_IntConfig(LPC_UART0, UART_INTCFG_ABEO, DISABLE);
00099                                         // Set Sync flag
00100                                         Synchronous = SET;
00101                                 }
00102
00103                                 /* Auto-Baudrate Time-Out interrupt (not implemented) */
00104                                 if (intsrc & UART_AUTOBAUD_INTSTAT_ABTO) {
00105                                         /* Just clear this bit - Add your code here */
00106                                         UART_ABClearIntPending(LPC_UART0, UART_AUTOBAUD_INTSTAT_ABTO);
00107                                 }
00108                         }
00109         }
00110 }
00111
00112
00113 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00114 /*********************************************************************/
00119 void print_menu(void)
00120 {
00121         UART_Send(LPC_UART0, menu1, sizeof(menu1), BLOCKING);
00122         UART_Send(LPC_UART0, menu2, sizeof(menu2), BLOCKING);
00123 }
00124
00125
00126 /*-------------------------MAIN FUNCTION------------------------------*/
00127 /*********************************************************************/
00132 int c_entry(void)
00133 {
00134         // UART Configuration structure variable
00135         UART_CFG_Type UARTConfigStruct;
00136         // UART FIFO configuration Struct variable
00137         UART_FIFO_CFG_Type UARTFIFOConfigStruct;
00138         // Pin configuration for UART0
00139         PINSEL_CFG_Type PinCfg;
00140         // Auto baudrate configuration structure
00141         UART_AB_CFG_Type ABConfig;
00142
00143         uint32_t idx, len;
00144         __IO FlagStatus exitflag;
00145         uint8_t buffer[10];
00146
00147         /*
00148          * Initialize UART0 pin connect
00149          */
00150         PinCfg.Funcnum = 1;
00151         PinCfg.OpenDrain = 0;
00152         PinCfg.Pinmode = 0;
00153         PinCfg.Pinnum = 2;
00154         PinCfg.Portnum = 0;
00155         PINSEL_ConfigPin(&PinCfg);
00156         PinCfg.Pinnum = 3;
00157         PINSEL_ConfigPin(&PinCfg);
00158
00159         /* Initialize UART Configuration parameter structure to default state:
00160          * Baudrate = 9600bps
00161          * 8 data bit
00162          * 1 Stop bit
00163          * None parity
00164          */
00165         UART_ConfigStructInit(&UARTConfigStruct);
00166
00167         /* Initialize UART0 peripheral with given to corresponding parameter
00168          * in this case, don't care the baudrate value UART initialized
00169          * since this will be determine when running auto baudrate
00170          */
00171         UART_Init(LPC_UART0, &UARTConfigStruct);
00172
00173         /* Initialize FIFOConfigStruct to default state:
00174          *                              - FIFO_DMAMode = DISABLE
00175          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00176          *                              - FIFO_ResetRxBuf = ENABLE
00177          *                              - FIFO_ResetTxBuf = ENABLE
00178          *                              - FIFO_State = ENABLE
00179          */
00180         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00181
00182         // Initialize FIFO for UART0 peripheral
00183         UART_FIFOConfig(LPC_UART0, &UARTFIFOConfigStruct);
00184
00185
00186         // Enable UART Transmit
00187         UART_TxCmd(LPC_UART0, ENABLE);
00188
00189
00190     /* Enable UART End of Auto baudrate interrupt */
00191         UART_IntConfig(LPC_UART0, UART_INTCFG_ABEO, ENABLE);
00192         /* Enable UART Auto baudrate timeout interrupt */
00193         UART_IntConfig(LPC_UART0, UART_INTCFG_ABTO, ENABLE);
00194
00195     /* preemption = 1, sub-priority = 1 */
00196     NVIC_SetPriority(UART0_IRQn, ((0x01<<3)|0x01));
00197         /* Enable Interrupt for UART0 channel */
00198     NVIC_EnableIRQ(UART0_IRQn);
00199
00200
00201 /* ---------------------- Auto baud rate section ----------------------- */
00202         // Reset Synchronous flag for auto-baudrate mode
00203         Synchronous = RESET;
00204
00205         // Configure Auto baud rate mode
00206     ABConfig.ABMode = UART_AUTOBAUD_MODE0;
00207     ABConfig.AutoRestart = ENABLE;
00208
00209     // Start auto baudrate mode
00210     UART_ABCmd(LPC_UART0, &ABConfig, ENABLE);
00211     print_menu();
00212
00213     /* Loop until auto baudrate mode complete */
00214     while (Synchronous == RESET);
00215
00216
00217     // Print status of auto baudrate
00218     UART_Send(LPC_UART0, syncmenu, sizeof(syncmenu), BLOCKING);
00219 /* ---------------------- End of Auto baud rate section ----------------------- */
00220
00221         // print welcome screen
00222         print_menu();
00223
00224         // reset exit flag
00225         exitflag = RESET;
00226
00227     /* Read some data from the buffer */
00228     while (exitflag == RESET)
00229     {
00230        len = 0;
00231         while (len == 0)
00232         {
00233             len = UART_Receive(LPC_UART0, buffer, sizeof(buffer), NONE_BLOCKING);
00234         }
00235
00236         /* Got some data */
00237         idx = 0;
00238         while (idx < len)
00239         {
00240             if (buffer[idx] == 27)
00241             {
00242                 /* ESC key, set exit flag */
00243                 UART_Send(LPC_UART0, menu3, sizeof(menu3), BLOCKING);
00244                 exitflag = SET;
00245             }
00246             else if (buffer[idx] == 'r')
00247             {
00248                 print_menu();
00249             }
00250             else
00251             {
00252                 /* Echo it back */
00253                 UART_Send(LPC_UART0, &buffer[idx], 1, BLOCKING);
00254             }
00255             idx++;
00256         }
00257     }
00258
00259     // wait for current transmission complete - THR must be empty
00260     while (UART_CheckBusy(LPC_UART0) == SET);
00261
00262     // DeInitialize UART0 peripheral
00263     UART_DeInit(LPC_UART0);
00264
00265     /* Loop forever */
00266     while(1);
00267 }
00268
00269 /* With ARM and GHS toolsets, the entry point is main() - this will
00270    allow the linker to generate wrapper code to setup stacks, allocate
00271    heap area, and initialize and copy code and data segments. For GNU
00272    toolsets, the entry point is through __start() in the crt0_gnu.asm
00273    file, and that startup code will setup stacks and data */
00274 int main(void)
00275 {
00276     return c_entry();
00277 }
00278
00279
00280 #ifdef  DEBUG
00281 /*******************************************************************************
00282 * @brief                Reports the name of the source file and the source line number
00283 *                               where the CHECK_PARAM error has occurred.
00284 * @param[in]    file Pointer to the source file name
00285 * @param[in]    line assert_param error line source number
00286 * @return               None
00287 *******************************************************************************/
00288 void check_failed(uint8_t *file, uint32_t line)
00289 {
00290         /* User can add his own implementation to report the file name and line number,
00291          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00292
00293         /* Infinite loop */
00294         while(1);
00295 }
00296 #endif
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/DMA/uart_dma_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/DMA/uart_dma_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          uart_dma_test.c                         2010-05-21
00003 */
00025 #include "lpc17xx_uart.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_gpdma.h"
00028 #include "lpc17xx_pinsel.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINITIONS *************************/
00037 /* Receive buffer size */
00038 #define RX_BUF_SIZE     0x10
00039
00040 /************************** PRIVATE VARIABLES *************************/
00041 uint8_t menu1[] =
00042 "Hello NXP Semiconductors \n\r"
00043 "UART interrupt mode demo using ring buffer \n\r\t "
00044 "MCU LPC17xx - ARM Cortex-M3 \n\r\t "
00045 "UART0 - 9600bps \n\r"
00046 " This is a long string. It transferred in to DMA memory and transmit through Tx line \n\r"
00047 " on UART0 peripheral. To use UART with DMA mode, FIFO function must be enabled \n\r";
00048
00049 uint8_t menu3[] = "UART demo terminated!\n";
00050
00051 // Receive buffer
00052 __IO uint8_t rx_buf[RX_BUF_SIZE];
00053
00054 // Terminal Counter flag for Channel 0
00055 __IO uint32_t Channel0_TC;
00056
00057 // Error Counter flag for Channel 0
00058 __IO uint32_t Channel0_Err;
00059
00060 // Terminal Counter flag for Channel 1
00061 __IO uint32_t Channel1_TC;
00062
00063 // Error Counter flag for Channel 1
00064 __IO uint32_t Channel1_Err;
00065
00066
00067 /************************** PRIVATE FUNCTIONS *************************/
00068 void DMA_IRQHandler (void);
00069
00070 void print_menu(void);
00071
00072 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00073 /*********************************************************************/
00078 void DMA_IRQHandler (void)
00079 {
00080         uint32_t tmp;
00081                 // Scan interrupt pending
00082         for (tmp = 0; tmp <= 7; tmp++) {
00083                 if (GPDMA_IntGetStatus(GPDMA_STAT_INT, tmp)){
00084                         // Check counter terminal status
00085                         if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, tmp)){
00086                                 // Clear terminate counter Interrupt pending
00087                                 GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, tmp);
00088
00089                                 switch (tmp){
00090                                         case 0:
00091                                                 Channel0_TC++;
00092                                                 GPDMA_ChannelCmd(0, DISABLE);
00093                                                 break;
00094                                         case 1:
00095                                                 Channel1_TC++;
00096                                                 GPDMA_ChannelCmd(1, DISABLE);
00097                                                 break;
00098                                         default:
00099                                                 break;
00100                                 }
00101
00102                         }
00103                                 // Check error terminal status
00104                         if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, tmp)){
00105                                 // Clear error counter Interrupt pending
00106                                 GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, tmp);
00107                                 switch (tmp){
00108                                         case 0:
00109                                                 Channel0_Err++;
00110                                                 GPDMA_ChannelCmd(0, DISABLE);
00111                                                 break;
00112                                         case 1:
00113                                                 Channel1_Err++;
00114                                                 GPDMA_ChannelCmd(1, DISABLE);
00115                                                 break;
00116                                         default:
00117                                                 break;
00118                                 }
00119                         }
00120                 }
00121         }
00122 }
00123
00124 /*-------------------------MAIN FUNCTION------------------------------*/
00125 /*********************************************************************/
00130 int c_entry(void)
00131 {
00132         uint8_t *rx_char;
00133         uint32_t idx;
00134         // UART Configuration structure variable
00135         UART_CFG_Type UARTConfigStruct;
00136         // UART FIFO configuration Struct variable
00137         UART_FIFO_CFG_Type UARTFIFOConfigStruct;
00138         GPDMA_Channel_CFG_Type GPDMACfg;
00139         // Pin configuration for UART0
00140         PINSEL_CFG_Type PinCfg;
00141
00142         /*
00143          * Initialize UART0 pin connect
00144          */
00145         PinCfg.Funcnum = 1;
00146         PinCfg.OpenDrain = 0;
00147         PinCfg.Pinmode = 0;
00148         PinCfg.Pinnum = 2;
00149         PinCfg.Portnum = 0;
00150         PINSEL_ConfigPin(&PinCfg);
00151         PinCfg.Pinnum = 3;
00152         PINSEL_ConfigPin(&PinCfg);
00153
00154         /* Initialize UART Configuration parameter structure to default state:
00155          * Baudrate = 9600bps
00156          * 8 data bit
00157          * 1 Stop bit
00158          * None parity
00159          */
00160         UART_ConfigStructInit(&UARTConfigStruct);
00161
00162         // Initialize UART0 peripheral with given to corresponding parameter
00163         UART_Init(LPC_UART0, &UARTConfigStruct);
00164
00165
00166         /* Initialize FIFOConfigStruct to default state:
00167          *                              - FIFO_DMAMode = DISABLE
00168          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00169          *                              - FIFO_ResetRxBuf = ENABLE
00170          *                              - FIFO_ResetTxBuf = ENABLE
00171          *                              - FIFO_State = ENABLE
00172          */
00173         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00174
00175         // Enable DMA mode in UART
00176         UARTFIFOConfigStruct.FIFO_DMAMode = ENABLE;
00177
00178         // Initialize FIFO for UART0 peripheral
00179         UART_FIFOConfig(LPC_UART0, &UARTFIFOConfigStruct);
00180
00181         // Enable UART Transmit
00182         UART_TxCmd(LPC_UART0, ENABLE);
00183
00184
00185         /* GPDMA Interrupt configuration section ------------------------------------------------- */
00186
00187     /* Initialize GPDMA controller */
00188         GPDMA_Init();
00189
00190
00191         /* Setting GPDMA interrupt */
00192     // Disable interrupt for DMA
00193     NVIC_DisableIRQ (DMA_IRQn);
00194     /* preemption = 1, sub-priority = 1 */
00195     NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
00196
00197
00198         // Setup GPDMA channel --------------------------------
00199         // channel 0
00200         GPDMACfg.ChannelNum = 0;
00201         // Source memory
00202         GPDMACfg.SrcMemAddr = (uint32_t) &menu1;
00203         // Destination memory - don't care
00204         GPDMACfg.DstMemAddr = 0;
00205         // Transfer size
00206         GPDMACfg.TransferSize = sizeof(menu1);
00207         // Transfer width - don't care
00208         GPDMACfg.TransferWidth = 0;
00209         // Transfer type
00210         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2P;
00211         // Source connection - don't care
00212         GPDMACfg.SrcConn = 0;
00213         // Destination connection
00214         GPDMACfg.DstConn = GPDMA_CONN_UART0_Tx;
00215         // Linker List Item - unused
00216         GPDMACfg.DMALLI = 0;
00217         // Setup channel with given parameter
00218         GPDMA_Setup(&GPDMACfg);
00219
00220         // Setup GPDMA channel --------------------------------
00221         // channel 1
00222         GPDMACfg.ChannelNum = 1;
00223         // Source memory - don't care
00224         GPDMACfg.SrcMemAddr = 0;
00225         // Destination memory
00226         GPDMACfg.DstMemAddr = (uint32_t) &rx_buf;
00227         // Transfer size
00228         GPDMACfg.TransferSize = sizeof(rx_buf);
00229         // Transfer width - don't care
00230         GPDMACfg.TransferWidth = 0;
00231         // Transfer type
00232         GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_P2M;
00233         // Source connection
00234         GPDMACfg.SrcConn = GPDMA_CONN_UART0_Rx;
00235         // Destination connection - don't care
00236         GPDMACfg.DstConn = 0;
00237         // Linker List Item - unused
00238         GPDMACfg.DMALLI = 0;
00239         GPDMA_Setup(&GPDMACfg);
00240
00241         /* Reset terminal counter */
00242         Channel0_TC = 0;
00243         /* Reset Error counter */
00244         Channel0_Err = 0;
00245
00246     // Enable interrupt for DMA
00247     NVIC_EnableIRQ (DMA_IRQn);
00248
00249         // Enable GPDMA channel 0
00250         GPDMA_ChannelCmd(0, ENABLE);
00251         // Make sure GPDMA channel 1 is disabled
00252         GPDMA_ChannelCmd(1, DISABLE);
00253
00254         /* Wait for GPDMA on UART0 Tx processing complete */
00255     while ((Channel0_TC == 0) && (Channel0_Err == 0));
00256
00257     // Main loop - echos back to the terminal
00258     while (1)
00259     {
00260         /* Reset terminal counter */
00261         Channel1_TC = 0;
00262         /* Reset Error counter */
00263         Channel1_Err = 0;
00264
00265         // Setup channel with given parameter
00266         GPDMA_Setup(&GPDMACfg);
00267
00268         // Enable GPDMA channel 1
00269         GPDMA_ChannelCmd(1, ENABLE);
00270
00271         // Clear Rx buffer using DMA
00272         for (idx = 0; idx < RX_BUF_SIZE; idx++){
00273                 rx_buf[idx] = 0;
00274         }
00275
00276         // now, start receive character using GPDMA
00277         rx_char = (uint8_t *) &rx_buf;
00278         while ((Channel1_TC == 0) && (Channel1_Err == 0)){
00279                         // Check whether if there's any character received, then print it back
00280                         if (*rx_char != 0)
00281                         {
00282                                 UART_Send(LPC_UART0, rx_char, 1, BLOCKING);
00283                                 rx_char++;
00284                         }
00285         }
00286     }
00287 }
00288
00289 /* With ARM and GHS toolsets, the entry point is main() - this will
00290    allow the linker to generate wrapper code to setup stacks, allocate
00291    heap area, and initialize and copy code and data segments. For GNU
00292    toolsets, the entry point is through __start() in the crt0_gnu.asm
00293    file, and that startup code will setup stacks and data */
00294 int main(void)
00295 {
00296     return c_entry();
00297 }
00298
00299
00300 #ifdef  DEBUG
00301 /*******************************************************************************
00302 * @brief                Reports the name of the source file and the source line number
00303 *                               where the CHECK_PARAM error has occurred.
00304 * @param[in]    file Pointer to the source file name
00305 * @param[in]    line assert_param error line source number
00306 * @return               None
00307 *******************************************************************************/
00308 void check_failed(uint8_t *file, uint32_t line)
00309 {
00310         /* User can add his own implementation to report the file name and line number,
00311          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00312
00313         /* Infinite loop */
00314         while(1);
00315 }
00316 #endif
00317
00318 /*
00319  * @}
00320  */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/uart_fullmodem_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/UART1_FullModem/uart_fullmodem_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          uart_fullmodem_test.c                   2010-05-21
00003 */
00025 #include "lpc17xx_uart.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028
00029 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINITIONS *************************/
00037 #define MCB_LPC_1768
00038 //#define IAR_LPC_1768
00039
00040 // buffer size definition
00041 #define UART_RING_BUFSIZE 256
00042 /* Auto RTS and Auto CTS definition:
00043  * - 1: Enable Auto RTS and CTS function
00044  * - 0: Disable this function, in this case, handle manually
00045  * modem functionality */
00046 #define AUTO_RTS_CTS_USE        0
00047
00048 /* Buf mask */
00049 #define __BUF_MASK (UART_RING_BUFSIZE-1)
00050 /* Check buf is full or not */
00051 #define __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
00052 /* Check buf will be full in next receiving or not */
00053 #define __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
00054 /* Check buf is empty */
00055 #define __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
00056 /* Reset buf */
00057 #define __BUF_RESET(bufidx)     (bufidx=0)
00058 #define __BUF_INCR(bufidx)      (bufidx=(bufidx+1)&__BUF_MASK)
00059
00060
00061 /************************** PRIVATE TYPES *************************/
00063 typedef struct
00064 {
00065     __IO uint32_t tx_head;
00066     __IO uint32_t tx_tail;
00067     __IO uint32_t rx_head;
00068     __IO uint32_t rx_tail;
00069     __IO uint8_t  tx[UART_RING_BUFSIZE];
00070     __IO uint8_t  rx[UART_RING_BUFSIZE];
00071 } UART_RING_BUFFER_T;
00072
00073
00074 /************************** PRIVATE VARIABLES *************************/
00075 uint8_t menu1[] = "Hello NXP Semiconductors \n\r";
00076 uint8_t menu2[] =
00077 "UART1 Full Modem \n\r\t "
00078 "MCU LPC17xx - ARM Cortex-M3 \n\r\t "
00079 "UART1 - 9600bps \n\r";
00080 uint8_t menu3[] = "UART demo terminated!\n";
00081
00082 // UART Ring buffer
00083 UART_RING_BUFFER_T rb;
00084
00085 // RTS State
00086 __IO int32_t RTS_State;
00087
00088 // Current Tx Interrupt enable state
00089 __IO FlagStatus TxIntStat;
00090
00091
00092 /************************** PRIVATE FUNCTIONS *************************/
00093 /* Interrupt service routines */
00094 void UART1_IRQHandler(void);
00095 void UART1_IntTransmit(void);
00096 void UART1_IntReceive(void);
00097 void UART1_IntErr(uint8_t bLSErrType);
00098
00099 uint32_t UARTReceive(LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen);
00100 uint32_t UARTSend(LPC_UART_TypeDef *UARTPort, uint8_t *txbuf, uint8_t buflen);
00101 void print_menu(void);
00102
00103
00104 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00105 /*********************************************************************/
00110 void UART1_IRQHandler(void)
00111 {
00112         uint8_t modemsts;
00113         uint32_t intsrc, tmp, tmp1;
00114
00115         /* Determine the interrupt source */
00116         intsrc = UART_GetIntId((LPC_UART_TypeDef *)LPC_UART1);
00117         tmp = intsrc & UART_IIR_INTID_MASK;
00118
00119         /*
00120          * In case of using UART1 with full modem,
00121          * interrupt ID = 0 that means modem status interrupt has been detected
00122          */
00123
00124         if (tmp == 0){
00125                 // Check Modem status
00126                 modemsts = UART_FullModemGetStatus(LPC_UART1);
00127                 #if (AUTO_RTS_CTS_USE == 0)
00128                         // Check CTS status change flag
00129                         if (modemsts & UART1_MODEM_STAT_DELTA_CTS) {
00130                                 // if CTS status is active, continue to send data
00131                                 if (modemsts & UART1_MODEM_STAT_CTS) {
00132                                         // Re-Enable Tx
00133                                         UART_TxCmd((LPC_UART_TypeDef *)LPC_UART1, ENABLE);
00134                                 }
00135                                 // Otherwise, Stop current transmission immediately
00136                                 else{
00137                                         // Disable Tx
00138                                         UART_TxCmd((LPC_UART_TypeDef *)LPC_UART1, DISABLE);
00139                                 }
00140                         }
00141                 #endif
00142         }
00143
00144         // Receive Line Status
00145         if (tmp == UART_IIR_INTID_RLS){
00146                 // Check line status
00147                 tmp1 = UART_GetLineStatus((LPC_UART_TypeDef *)LPC_UART1);
00148                 // Mask out the Receive Ready and Transmit Holding empty status
00149                 tmp1 &= (UART_LSR_OE | UART_LSR_PE | UART_LSR_FE \
00150                                 | UART_LSR_BI | UART_LSR_RXFE);
00151                 // If any error exist
00152                 if (tmp1) {
00153                         UART1_IntErr(tmp1);
00154                 }
00155         }
00156
00157         // Receive Data Available or Character time-out
00158         if ((tmp == UART_IIR_INTID_RDA) || (tmp == UART_IIR_INTID_CTI)){
00159                 UART1_IntReceive();
00160         }
00161
00162         // Transmit Holding Empty
00163         if (tmp == UART_IIR_INTID_THRE){
00164                 UART1_IntTransmit();
00165         }
00166 }
00167
00168 /********************************************************************/
00173 void UART1_IntReceive(void)
00174 {
00175         uint8_t tmpc;
00176         uint32_t rLen;
00177
00178         while (1){
00179                 // Call UART read function in UART driver
00180                 rLen = UART_Receive((LPC_UART_TypeDef *)LPC_UART1, &tmpc, 1, NONE_BLOCKING);
00181                 // If data received
00182                 if (rLen){
00183
00184                         /* If buffer will be full and RTS is driven manually,
00185                          * RTS pin should be forced into INACTIVE state
00186                          */
00187 #if (AUTO_RTS_CTS_USE == 0)
00188                         if (__BUF_WILL_FULL(rb.rx_head, rb.rx_tail))
00189                         {
00190                                 if (RTS_State == ACTIVE)
00191                                 {
00192                                         // Disable request to send through RTS line
00193                                         UART_FullModemForcePinState(LPC_UART1, UART1_MODEM_PIN_RTS, \
00194                                                         INACTIVE);
00195                                         RTS_State = INACTIVE;
00196                                 }
00197                         }
00198 #endif
00199
00200                         /* Check if buffer is more space
00201                          * If no more space, remaining character will be trimmed out
00202                          */
00203                         if (!__BUF_IS_FULL(rb.rx_head,rb.rx_tail)){
00204                                 rb.rx[rb.rx_head] = tmpc;
00205                                 __BUF_INCR(rb.rx_head);
00206                         }
00207                 }
00208                 // no more data
00209                 else {
00210                         break;
00211                 }
00212         }
00213 }
00214
00215
00216 /********************************************************************/
00221 void UART1_IntTransmit(void)
00222 {
00223     // Disable THRE interrupt
00224     UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_THRE, DISABLE);
00225
00226         /* Wait for FIFO buffer empty, transfer UART_TX_FIFO_SIZE bytes
00227          * of data or break whenever ring buffers are empty */
00228         /* Wait until THR empty */
00229     while (UART_CheckBusy((LPC_UART_TypeDef *)LPC_UART1) == SET);
00230
00231         while (!__BUF_IS_EMPTY(rb.tx_head,rb.tx_tail))
00232     {
00233         /* Move a piece of data into the transmit FIFO */
00234         if (UART_Send((LPC_UART_TypeDef *)LPC_UART1, (uint8_t *)&rb.tx[rb.tx_tail], \
00235                         1, NONE_BLOCKING)){
00236         /* Update transmit ring FIFO tail pointer */
00237         __BUF_INCR(rb.tx_tail);
00238         } else {
00239                 break;
00240         }
00241     }
00242
00243     /* If there is no more data to send, disable the transmit
00244        interrupt - else enable it or keep it enabled */
00245         if (__BUF_IS_EMPTY(rb.tx_head, rb.tx_tail)) {
00246         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_THRE, DISABLE);
00247         // Reset Tx Interrupt state
00248         TxIntStat = RESET;
00249     }
00250     else{
00251         // Set Tx Interrupt state
00252                 TxIntStat = SET;
00253         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_THRE, ENABLE);
00254     }
00255 }
00256
00257
00258 /*********************************************************************/
00263 void UART1_IntErr(uint8_t bLSErrType)
00264 {
00265
00266         while(1);
00267 }
00268
00269 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00270 /*********************************************************************/
00278 uint32_t UARTSend(LPC_UART_TypeDef *UARTPort, uint8_t *txbuf, uint8_t buflen)
00279 {
00280     uint8_t *data = (uint8_t *) txbuf;
00281     uint32_t bytes = 0;
00282
00283
00284         /* Temporarily lock out UART transmit interrupts during this
00285            read so the UART transmit interrupt won't cause problems
00286            with the index values */
00287         UART_IntConfig(UARTPort, UART_INTCFG_THRE, DISABLE);
00288
00289         /* Loop until transmit run buffer is full or until n_bytes
00290            expires */
00291         while ((buflen > 0) && (!__BUF_IS_FULL(rb.tx_head, rb.tx_tail)))
00292         {
00293                 /* Write data from buffer into ring buffer */
00294                 rb.tx[rb.tx_head] = *data;
00295                 data++;
00296
00297                 /* Increment head pointer */
00298                 __BUF_INCR(rb.tx_head);
00299
00300                 /* Increment data count and decrement buffer size count */
00301                 bytes++;
00302                 buflen--;
00303         }
00304
00305         /*
00306          * Check if current Tx interrupt enable is reset,
00307          * that means the Tx interrupt must be re-enabled
00308          * due to call UART_IntTransmit() function to trigger
00309          * this interrupt type
00310          */
00311         if (TxIntStat == RESET) {
00312                 UART1_IntTransmit();
00313         }
00314         /*
00315          * Otherwise, re-enables Tx Interrupt
00316          */
00317         else {
00318                 UART_IntConfig(UARTPort, UART_INTCFG_THRE, ENABLE);
00319         }
00320
00321     return bytes;
00322 }
00323
00324 /*********************************************************************/
00332 uint32_t UARTReceive(LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
00333 {
00334     uint8_t *data = (uint8_t *) rxbuf;
00335     uint32_t bytes = 0;
00336
00337         /* Temporarily lock out UART receive interrupts during this
00338            read so the UART receive interrupt won't cause problems
00339            with the index values */
00340         UART_IntConfig(UARTPort, UART_INTCFG_RBR, DISABLE);
00341
00342         /* Loop until receive buffer ring is empty or
00343                 until max_bytes expires */
00344         while ((buflen > 0) && (!(__BUF_IS_EMPTY(rb.rx_head, rb.rx_tail))))
00345         {
00346                 /* Read data from ring buffer into user buffer */
00347                 *data = rb.rx[rb.rx_tail];
00348                 data++;
00349
00350                 /* Update tail pointer */
00351                 __BUF_INCR(rb.rx_tail);
00352
00353                 /* Increment data count and decrement buffer size count */
00354                 bytes++;
00355                 buflen--;
00356
00357 #if (AUTO_RTS_CTS_USE == 0)
00358                 /* In case of driving RTS manually, this pin should be
00359                  * release into ACTIVE state if buffer is free
00360                  */
00361                 if (RTS_State == INACTIVE)
00362                 {
00363                         if (!__BUF_WILL_FULL(rb.rx_head, rb.rx_tail))
00364                         {
00365                                 // Disable request to send through RTS line
00366                                 UART_FullModemForcePinState(LPC_UART1, UART1_MODEM_PIN_RTS, \
00367                                                 ACTIVE);
00368                                 RTS_State = ACTIVE;
00369                         }
00370                 }
00371 #endif
00372         }
00373
00374         /* Re-enable UART interrupts */
00375         UART_IntConfig(UARTPort, UART_INTCFG_RBR, ENABLE);
00376
00377     return bytes;
00378 }
00379
00380 /*********************************************************************/
00385 void print_menu(void)
00386 {
00387         uint32_t tmp, tmp2;
00388         uint8_t *pDat;
00389
00390         tmp = sizeof(menu1);
00391         tmp2 = 0;
00392         pDat = (uint8_t *)&menu1[0];
00393         while(tmp) {
00394                 tmp2 = UARTSend((LPC_UART_TypeDef *)LPC_UART1, pDat, tmp);
00395                 pDat += tmp2;
00396                 tmp -= tmp2;
00397         }
00398
00399         tmp = sizeof(menu2);
00400         tmp2 = 0;
00401         pDat = (uint8_t *)&menu2[0];
00402         while(tmp) {
00403                 tmp2 = UARTSend((LPC_UART_TypeDef *)LPC_UART1, pDat, tmp);
00404                 pDat += tmp2;
00405                 tmp -= tmp2;
00406         }
00407 }
00408
00409 /*-------------------------MAIN FUNCTION------------------------------*/
00410 /*********************************************************************/
00415 int c_entry(void)
00416 {
00417         // UART Configuration structure variable
00418         UART_CFG_Type UARTConfigStruct;
00419         // UART FIFO configuration Struct variable
00420         UART_FIFO_CFG_Type UARTFIFOConfigStruct;
00421         // Pin configuration for UART1
00422         PINSEL_CFG_Type PinCfg;
00423         uint32_t idx, len;
00424         __IO FlagStatus exitflag;
00425         uint8_t buffer[10];
00426
00427         /*
00428          * Initialize UART1 pin connect
00429          * If using MCB1700 eval board, assign pin P2.0 - P2.7
00430          * If using IAR 1768 KS board, assign pin P0.7 - P0.15
00431          */
00432 #ifdef MCB_LPC_1768
00433         PinCfg.Funcnum = 2;
00434         PinCfg.OpenDrain = 0;
00435         PinCfg.Pinmode = 0;
00436         PinCfg.Portnum = 2;
00437         for (idx = 0; idx <= 7; idx++){
00438                 PinCfg.Pinnum = idx;
00439                 PINSEL_ConfigPin(&PinCfg);
00440         }
00441 #elif defined(IAR_LPC_1768)
00442         PinCfg.Funcnum = 1;
00443         PinCfg.OpenDrain = 0;
00444         PinCfg.Pinmode = 0;
00445         PinCfg.Portnum = 0;
00446         for (idx = 15; idx <= 22; idx++){
00447                 PinCfg.Pinnum = idx;
00448                 PINSEL_ConfigPin(&PinCfg);
00449         }
00450 #endif
00451
00452         /* Initialize UART Configuration parameter structure to default state:
00453          * Baudrate = 9600bps
00454          * 8 data bit
00455          * 1 Stop bit
00456          * None parity
00457          */
00458         UART_ConfigStructInit(&UARTConfigStruct);
00459
00460         // Initialize UART1 peripheral with given to corresponding parameter
00461         UART_Init((LPC_UART_TypeDef *)LPC_UART1, &UARTConfigStruct);
00462
00463         /* Initialize FIFOConfigStruct to default state:
00464          *                              - FIFO_DMAMode = DISABLE
00465          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00466          *                              - FIFO_ResetRxBuf = ENABLE
00467          *                              - FIFO_ResetTxBuf = ENABLE
00468          *                              - FIFO_State = ENABLE
00469          */
00470         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00471
00472         // Initialize FIFO for UART1 peripheral
00473         UART_FIFOConfig((LPC_UART_TypeDef *)LPC_UART1, &UARTFIFOConfigStruct);
00474
00475 #if (AUTO_RTS_CTS_USE==0)
00476         /*
00477          * Determine current state of CTS pin to enable Tx
00478          * activity
00479          */
00480         if (UART_FullModemGetStatus(LPC_UART1) & UART1_MODEM_STAT_CTS) {
00481                 // Enable UART Transmit
00482                 UART_TxCmd((LPC_UART_TypeDef *)LPC_UART1, ENABLE);
00483         }
00484 #else
00485         // Enable UART Transmit
00486         UART_TxCmd((LPC_UART_TypeDef *)LPC_UART1, ENABLE);
00487 #endif
00488
00489         // Reset ring buf head and tail idx
00490         __BUF_RESET(rb.rx_head);
00491         __BUF_RESET(rb.rx_tail);
00492         __BUF_RESET(rb.tx_head);
00493         __BUF_RESET(rb.tx_tail);
00494
00495 #if AUTO_RTS_CTS_USE
00496         UART_FullModemConfigMode(LPC_UART1, UART1_MODEM_MODE_AUTO_RTS, ENABLE);
00497         UART_FullModemConfigMode(LPC_UART1, UART1_MODEM_MODE_AUTO_CTS, ENABLE);
00498 #else
00499         // Enable Modem status interrupt
00500         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART1_INTCFG_MS, ENABLE);
00501         // Enable CTS1 signal transition interrupt
00502         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART1_INTCFG_CTS, ENABLE);
00503         // Force RTS pin state to ACTIVE
00504         UART_FullModemForcePinState(LPC_UART1, UART1_MODEM_PIN_RTS, ACTIVE);
00505         //RESET RTS State flag
00506         RTS_State = ACTIVE;
00507 #endif
00508
00509
00510     /* Enable UART Rx interrupt */
00511         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_RBR, ENABLE);
00512         /* Enable UART line status interrupt */
00513         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_RLS, ENABLE);
00514
00515         /*
00516          * Do not enable transmit interrupt here, since it is handled by
00517          * UART_Send() function, just to reset Tx Interrupt state for the
00518          * first time
00519          */
00520         TxIntStat = RESET;
00521
00522     /* preemption = 1, sub-priority = 1 */
00523     NVIC_SetPriority(UART1_IRQn, ((0x01<<3)|0x01));
00524         /* Enable Interrupt for UART1 channel */
00525     NVIC_EnableIRQ(UART1_IRQn);
00526
00527         // print welcome screen
00528         print_menu();
00529
00530         // reset exit flag
00531         exitflag = RESET;
00532
00533     /* Read some data from the buffer */
00534     while (exitflag == RESET)
00535     {
00536        len = 0;
00537         while (len == 0)
00538         {
00539             len = UARTReceive((LPC_UART_TypeDef *)LPC_UART1, buffer, sizeof(buffer));
00540         }
00541
00542         /* Got some data */
00543         idx = 0;
00544         while (idx < len)
00545         {
00546             if (buffer[idx] == 27)
00547             {
00548                 /* ESC key, set exit flag */
00549                 UARTSend((LPC_UART_TypeDef *)LPC_UART1, menu3, sizeof(menu3));
00550                 exitflag = SET;
00551             }
00552             else if (buffer[idx] == 'r')
00553             {
00554                 print_menu();
00555             }
00556             else
00557             {
00558                 /* Echo it back */
00559                 UARTSend((LPC_UART_TypeDef *)LPC_UART1, &buffer[idx], 1);
00560             }
00561             idx++;
00562         }
00563     }
00564
00565     // wait for current transmission complete - THR must be empty
00566     while (UART_CheckBusy((LPC_UART_TypeDef *)LPC_UART1) == SET);
00567
00568     // DeInitialize UART1 peripheral
00569     UART_DeInit((LPC_UART_TypeDef *)LPC_UART1);
00570
00571     /* Loop forever */
00572     while(1);
00573 }
00574
00575 /* With ARM and GHS toolsets, the entry point is main() - this will
00576    allow the linker to generate wrapper code to setup stacks, allocate
00577    heap area, and initialize and copy code and data segments. For GNU
00578    toolsets, the entry point is through __start() in the crt0_gnu.asm
00579    file, and that startup code will setup stacks and data */
00580 int main(void)
00581 {
00582     return c_entry();
00583 }
00584
00585
00586 #ifdef  DEBUG
00587 /*******************************************************************************
00588 * @brief                Reports the name of the source file and the source line number
00589 *                               where the CHECK_PARAM error has occurred.
00590 * @param[in]    file Pointer to the source file name
00591 * @param[in]    line assert_param error line source number
00592 * @return               None
00593 *******************************************************************************/
00594 void check_failed(uint8_t *file, uint32_t line)
00595 {
00596         /* User can add his own implementation to report the file name and line number,
00597          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00598
00599         /* Infinite loop */
00600         while(1);
00601 }
00602 #endif
00603
00604 /*
00605  * @}
00606  */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/HWFlowControl/uart_hw_flow_control.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/HWFlowControl/uart_hw_flow_control.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          uart_hw_flow_control.c                          2010-06-10
00003 */
00026 #include "lpc17xx_uart.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINITIONS *************************/
00037 #define TEST_UART (LPC_UART_TypeDef *)LPC_UART1
00038
00039 /************************** PRIVATE VARIABLES *************************/
00040 uint8_t menu1[] = "Hello NXP Semiconductors \n\r";
00041 uint8_t menu2[] = "UART hardware flow control mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART1 - 9600bps \n\r";
00042 uint8_t menu3[] = "UART demo terminated!";
00043
00044 /************************** PRIVATE FUNCTIONS *************************/
00045 void print_menu(void);
00046
00047 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00048 /*********************************************************************/
00053 void print_menu(void)
00054 {
00055         UART_Send(TEST_UART, menu1, sizeof(menu1), BLOCKING);
00056         UART_Send(TEST_UART, menu2, sizeof(menu2), BLOCKING);
00057 }
00058
00059 /*-------------------------MAIN FUNCTION------------------------------*/
00060 /*********************************************************************/
00065 int c_entry(void)
00066 {
00067         // UART Configuration structure variable
00068         UART_CFG_Type UARTConfigStruct;
00069         // UART FIFO configuration Struct variable
00070         UART_FIFO_CFG_Type UARTFIFOConfigStruct;
00071         // Pin configuration for UART0
00072         PINSEL_CFG_Type PinCfg;
00073
00074         uint32_t idx, len;
00075         __IO FlagStatus exitflag;
00076         uint8_t buffer[10];
00077
00078         /*
00079          * Initialize UART1 pin connect
00080          */
00081         PinCfg.Funcnum = 2;
00082         PinCfg.OpenDrain = 0;
00083         PinCfg.Pinmode = 0;
00084         PinCfg.Pinnum = 0;
00085         PinCfg.Portnum = 2;
00086         PINSEL_ConfigPin(&PinCfg);//P2.0 TXD1
00087         PinCfg.Pinnum = 1;
00088         PINSEL_ConfigPin(&PinCfg);//P2.1 RXD1
00089         PinCfg.Pinnum = 2;
00090         PINSEL_ConfigPin(&PinCfg);//P2.2 CTS1
00091         PinCfg.Pinnum = 7;
00092         PINSEL_ConfigPin(&PinCfg);//P2.7 RTS1
00093
00094         /* Initialize UART Configuration parameter structure to default state:
00095          * Baudrate = 9600bps
00096          * 8 data bit
00097          * 1 Stop bit
00098          * None parity
00099          */
00100         UART_ConfigStructInit(&UARTConfigStruct);
00101
00102         // Initialize UART0 peripheral with given to corresponding parameter
00103         UART_Init(TEST_UART, &UARTConfigStruct);
00104
00105         /* Initialize FIFOConfigStruct to default state:
00106          *                              - FIFO_DMAMode = DISABLE
00107          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00108          *                              - FIFO_ResetRxBuf = ENABLE
00109          *                              - FIFO_ResetTxBuf = ENABLE
00110          *                              - FIFO_State = ENABLE
00111          */
00112         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00113
00114         // Initialize FIFO for UART0 peripheral
00115         UART_FIFOConfig(TEST_UART, &UARTFIFOConfigStruct);
00116
00117         // Configure UART1 hardware flow control RTS/CTS
00118         UART_FullModemForcePinState((LPC_UART1_TypeDef *)LPC_UART1,UART1_MODEM_PIN_RTS,ACTIVE);
00119
00120         // Enable UART Transmit
00121         UART_TxCmd(TEST_UART, ENABLE);
00122
00123         // print welcome screen
00124         print_menu();
00125
00126         // Reset exit flag
00127         exitflag = RESET;
00128
00129     /* Read some data from the buffer */
00130     while (exitflag == RESET)
00131     {
00132        len = 0;
00133         while (len == 0)
00134         {
00135             len = UART_Receive(TEST_UART, buffer, sizeof(buffer), NONE_BLOCKING);
00136         }
00137
00138         /* Got some data */
00139         idx = 0;
00140         while (idx < len)
00141         {
00142             if (buffer[idx] == 27)
00143             {
00144                 /* ESC key, set exit flag */
00145                 UART_Send(TEST_UART, menu3, sizeof(menu3), BLOCKING);
00146                 exitflag = SET;
00147             }
00148             else if (buffer[idx] == 'r')
00149             {
00150                 print_menu();
00151             }
00152             else
00153             {
00154                 /* Echo it back */
00155                 UART_Send(TEST_UART, &buffer[idx], 1, BLOCKING);
00156             }
00157             idx++;
00158         }
00159     }
00160
00161     // wait for current transmission complete - THR must be empty
00162     while (UART_CheckBusy(TEST_UART) == SET);
00163
00164     // DeInitialize UART0 peripheral
00165     UART_DeInit(TEST_UART);
00166
00167     /* Loop forever */
00168     while(1);
00169 }
00170
00171 /* With ARM and GHS toolsets, the entry point is main() - this will
00172    allow the linker to generate wrapper code to setup stacks, allocate
00173    heap area, and initialize and copy code and data segments. For GNU
00174    toolsets, the entry point is through __start() in the crt0_gnu.asm
00175    file, and that startup code will setup stacks and data */
00176 int main(void)
00177 {
00178     return c_entry();
00179 }
00180
00181
00182 #ifdef  DEBUG
00183 /*******************************************************************************
00184 * @brief                Reports the name of the source file and the source line number
00185 *                               where the CHECK_PARAM error has occurred.
00186 * @param[in]    file Pointer to the source file name
00187 * @param[in]    line assert_param error line source number
00188 * @return               None
00189 *******************************************************************************/
00190 void check_failed(uint8_t *file, uint32_t line)
00191 {
00192         /* User can add his own implementation to report the file name and line number,
00193          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00194
00195         /* Infinite loop */
00196         while(1);
00197 }
00198 #endif
00199 /*
00200  * @}
00201  */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/uart_interrupt_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/Interrupt/uart_interrupt_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          uart_interrupt_test.c                           2010-05-21
00003 */
00025 #include "lpc17xx_uart.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028
00029 /* Example group ----------------------------------------------------------- */
00035 /************************** PRIVATE DEFINTIONS *************************/
00036 /* buffer size definition */
00037 #define UART_RING_BUFSIZE 256
00038
00039 /* Buf mask */
00040 #define __BUF_MASK (UART_RING_BUFSIZE-1)
00041 /* Check buf is full or not */
00042 #define __BUF_IS_FULL(head, tail) ((tail&__BUF_MASK)==((head+1)&__BUF_MASK))
00043 /* Check buf will be full in next receiving or not */
00044 #define __BUF_WILL_FULL(head, tail) ((tail&__BUF_MASK)==((head+2)&__BUF_MASK))
00045 /* Check buf is empty */
00046 #define __BUF_IS_EMPTY(head, tail) ((head&__BUF_MASK)==(tail&__BUF_MASK))
00047 /* Reset buf */
00048 #define __BUF_RESET(bufidx)     (bufidx=0)
00049 #define __BUF_INCR(bufidx)      (bufidx=(bufidx+1)&__BUF_MASK)
00050
00051
00052 /************************** PRIVATE TYPES *************************/
00053
00055 typedef struct
00056 {
00057     __IO uint32_t tx_head;
00058     __IO uint32_t tx_tail;
00059     __IO uint32_t rx_head;
00060     __IO uint32_t rx_tail;
00061     __IO uint8_t  tx[UART_RING_BUFSIZE];
00062     __IO uint8_t  rx[UART_RING_BUFSIZE];
00063 } UART_RING_BUFFER_T;
00064
00065
00066 /************************** PRIVATE VARIABLES *************************/
00067 uint8_t menu1[] = "Hello NXP Semiconductors \n\r";
00068 uint8_t menu2[] =
00069 "UART interrupt mode demo using ring buffer \n\r\t "
00070 "MCU LPC17xx - ARM Cortex-M3 \n\r\t "
00071 "UART0 - 9600bps \n\r";
00072 uint8_t menu3[] = "UART demo terminated!\n";
00073
00074 // UART Ring buffer
00075 UART_RING_BUFFER_T rb;
00076
00077 // Current Tx Interrupt enable state
00078 __IO FlagStatus TxIntStat;
00079
00080
00081 /************************** PRIVATE FUNCTIONS *************************/
00082 /* Interrupt service routines */
00083 void UART0_IRQHandler(void);
00084 void UART_IntErr(uint8_t bLSErrType);
00085 void UART_IntTransmit(void);
00086 void UART_IntReceive(void);
00087
00088 uint32_t UARTReceive(LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen);
00089 uint32_t UARTSend(LPC_UART_TypeDef *UARTPort, uint8_t *txbuf, uint8_t buflen);
00090 void print_menu(void);
00091
00092 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00093 /*********************************************************************/
00098 void UART0_IRQHandler(void)
00099 {
00100         uint32_t intsrc, tmp, tmp1;
00101
00102         /* Determine the interrupt source */
00103         intsrc = UART_GetIntId(LPC_UART0);
00104         tmp = intsrc & UART_IIR_INTID_MASK;
00105
00106         // Receive Line Status
00107         if (tmp == UART_IIR_INTID_RLS){
00108                 // Check line status
00109                 tmp1 = UART_GetLineStatus(LPC_UART0);
00110                 // Mask out the Receive Ready and Transmit Holding empty status
00111                 tmp1 &= (UART_LSR_OE | UART_LSR_PE | UART_LSR_FE \
00112                                 | UART_LSR_BI | UART_LSR_RXFE);
00113                 // If any error exist
00114                 if (tmp1) {
00115                                 UART_IntErr(tmp1);
00116                 }
00117         }
00118
00119         // Receive Data Available or Character time-out
00120         if ((tmp == UART_IIR_INTID_RDA) || (tmp == UART_IIR_INTID_CTI)){
00121                         UART_IntReceive();
00122         }
00123
00124         // Transmit Holding Empty
00125         if (tmp == UART_IIR_INTID_THRE){
00126                         UART_IntTransmit();
00127         }
00128
00129 }
00130
00131 /********************************************************************/
00136 void UART_IntReceive(void)
00137 {
00138         uint8_t tmpc;
00139         uint32_t rLen;
00140
00141         while(1){
00142                 // Call UART read function in UART driver
00143                 rLen = UART_Receive((LPC_UART_TypeDef *)LPC_UART0, &tmpc, 1, NONE_BLOCKING);
00144                 // If data received
00145                 if (rLen){
00146                         /* Check if buffer is more space
00147                          * If no more space, remaining character will be trimmed out
00148                          */
00149                         if (!__BUF_IS_FULL(rb.rx_head,rb.rx_tail)){
00150                                 rb.rx[rb.rx_head] = tmpc;
00151                                 __BUF_INCR(rb.rx_head);
00152                         }
00153                 }
00154                 // no more data
00155                 else {
00156                         break;
00157                 }
00158         }
00159 }
00160
00161 /********************************************************************/
00166 void UART_IntTransmit(void)
00167 {
00168     // Disable THRE interrupt
00169     UART_IntConfig((LPC_UART_TypeDef *)LPC_UART0, UART_INTCFG_THRE, DISABLE);
00170
00171         /* Wait for FIFO buffer empty, transfer UART_TX_FIFO_SIZE bytes
00172          * of data or break whenever ring buffers are empty */
00173         /* Wait until THR empty */
00174     while (UART_CheckBusy((LPC_UART_TypeDef *)LPC_UART0) == SET);
00175
00176         while (!__BUF_IS_EMPTY(rb.tx_head,rb.tx_tail))
00177     {
00178         /* Move a piece of data into the transmit FIFO */
00179         if (UART_Send((LPC_UART_TypeDef *)LPC_UART0, (uint8_t *)&rb.tx[rb.tx_tail], 1, NONE_BLOCKING)){
00180         /* Update transmit ring FIFO tail pointer */
00181         __BUF_INCR(rb.tx_tail);
00182         } else {
00183                 break;
00184         }
00185     }
00186
00187     /* If there is no more data to send, disable the transmit
00188        interrupt - else enable it or keep it enabled */
00189         if (__BUF_IS_EMPTY(rb.tx_head, rb.tx_tail)) {
00190         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART0, UART_INTCFG_THRE, DISABLE);
00191         // Reset Tx Interrupt state
00192         TxIntStat = RESET;
00193     }
00194     else{
00195         // Set Tx Interrupt state
00196                 TxIntStat = SET;
00197         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART0, UART_INTCFG_THRE, ENABLE);
00198     }
00199 }
00200
00201
00202 /*********************************************************************/
00207 void UART_IntErr(uint8_t bLSErrType)
00208 {
00209         while(1);
00210 }
00211
00212 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00213 /*********************************************************************/
00221 uint32_t UARTSend(LPC_UART_TypeDef *UARTPort, uint8_t *txbuf, uint8_t buflen)
00222 {
00223     uint8_t *data = (uint8_t *) txbuf;
00224     uint32_t bytes = 0;
00225
00226         /* Temporarily lock out UART transmit interrupts during this
00227            read so the UART transmit interrupt won't cause problems
00228            with the index values */
00229     UART_IntConfig(UARTPort, UART_INTCFG_THRE, DISABLE);
00230
00231         /* Loop until transmit run buffer is full or until n_bytes
00232            expires */
00233         while ((buflen > 0) && (!__BUF_IS_FULL(rb.tx_head, rb.tx_tail)))
00234         {
00235                 /* Write data from buffer into ring buffer */
00236                 rb.tx[rb.tx_head] = *data;
00237                 data++;
00238
00239                 /* Increment head pointer */
00240                 __BUF_INCR(rb.tx_head);
00241
00242                 /* Increment data count and decrement buffer size count */
00243                 bytes++;
00244                 buflen--;
00245         }
00246
00247         /*
00248          * Check if current Tx interrupt enable is reset,
00249          * that means the Tx interrupt must be re-enabled
00250          * due to call UART_IntTransmit() function to trigger
00251          * this interrupt type
00252          */
00253         if (TxIntStat == RESET) {
00254                 UART_IntTransmit();
00255         }
00256         /*
00257          * Otherwise, re-enables Tx Interrupt
00258          */
00259         else {
00260                 UART_IntConfig(UARTPort, UART_INTCFG_THRE, ENABLE);
00261         }
00262
00263     return bytes;
00264 }
00265
00266
00267 /*********************************************************************/
00275 uint32_t UARTReceive(LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
00276 {
00277     uint8_t *data = (uint8_t *) rxbuf;
00278     uint32_t bytes = 0;
00279
00280         /* Temporarily lock out UART receive interrupts during this
00281            read so the UART receive interrupt won't cause problems
00282            with the index values */
00283         UART_IntConfig(UARTPort, UART_INTCFG_RBR, DISABLE);
00284
00285         /* Loop until receive buffer ring is empty or
00286                 until max_bytes expires */
00287         while ((buflen > 0) && (!(__BUF_IS_EMPTY(rb.rx_head, rb.rx_tail))))
00288         {
00289                 /* Read data from ring buffer into user buffer */
00290                 *data = rb.rx[rb.rx_tail];
00291                 data++;
00292
00293                 /* Update tail pointer */
00294                 __BUF_INCR(rb.rx_tail);
00295
00296                 /* Increment data count and decrement buffer size count */
00297                 bytes++;
00298                 buflen--;
00299         }
00300
00301         /* Re-enable UART interrupts */
00302         UART_IntConfig(UARTPort, UART_INTCFG_RBR, ENABLE);
00303
00304     return bytes;
00305 }
00306
00307 /*********************************************************************/
00312 void print_menu(void)
00313 {
00314         uint32_t tmp, tmp2;
00315         uint8_t *pDat;
00316
00317         tmp = sizeof(menu1);
00318         tmp2 = 0;
00319         pDat = (uint8_t *)&menu1[0];
00320         while(tmp) {
00321                 tmp2 = UARTSend((LPC_UART_TypeDef *)LPC_UART0, pDat, tmp);
00322                 pDat += tmp2;
00323                 tmp -= tmp2;
00324         }
00325
00326         tmp = sizeof(menu2);
00327         tmp2 = 0;
00328         pDat = (uint8_t *)&menu2[0];
00329         while(tmp) {
00330                 tmp2 = UARTSend((LPC_UART_TypeDef *)LPC_UART0, pDat, tmp);
00331                 pDat += tmp2;
00332                 tmp -= tmp2;
00333         }
00334 }
00335
00336 /*-------------------------MAIN FUNCTION------------------------------*/
00337 /*********************************************************************/
00342 int c_entry(void)
00343 {
00344         // UART Configuration structure variable
00345         UART_CFG_Type UARTConfigStruct;
00346         // UART FIFO configuration Struct variable
00347         UART_FIFO_CFG_Type UARTFIFOConfigStruct;
00348         // Pin configuration for UART0
00349         PINSEL_CFG_Type PinCfg;
00350
00351         uint32_t idx, len;
00352         __IO FlagStatus exitflag;
00353         uint8_t buffer[10];
00354
00355         /*
00356          * Initialize UART0 pin connect
00357          */
00358         PinCfg.Funcnum = 1;
00359         PinCfg.OpenDrain = 0;
00360         PinCfg.Pinmode = 0;
00361         PinCfg.Pinnum = 2;
00362         PinCfg.Portnum = 0;
00363         PINSEL_ConfigPin(&PinCfg);
00364         PinCfg.Pinnum = 3;
00365         PINSEL_ConfigPin(&PinCfg);
00366
00367
00368         /* Initialize UART Configuration parameter structure to default state:
00369          * Baudrate = 9600bps
00370          * 8 data bit
00371          * 1 Stop bit
00372          * None parity
00373          */
00374         UART_ConfigStructInit(&UARTConfigStruct);
00375
00376         // Initialize UART0 peripheral with given to corresponding parameter
00377         UART_Init((LPC_UART_TypeDef *)LPC_UART0, &UARTConfigStruct);
00378
00379
00380         /* Initialize FIFOConfigStruct to default state:
00381          *                              - FIFO_DMAMode = DISABLE
00382          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00383          *                              - FIFO_ResetRxBuf = ENABLE
00384          *                              - FIFO_ResetTxBuf = ENABLE
00385          *                              - FIFO_State = ENABLE
00386          */
00387         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00388
00389         // Initialize FIFO for UART0 peripheral
00390         UART_FIFOConfig((LPC_UART_TypeDef *)LPC_UART0, &UARTFIFOConfigStruct);
00391
00392
00393         // Enable UART Transmit
00394         UART_TxCmd((LPC_UART_TypeDef *)LPC_UART0, ENABLE);
00395
00396     /* Enable UART Rx interrupt */
00397         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART0, UART_INTCFG_RBR, ENABLE);
00398         /* Enable UART line status interrupt */
00399         UART_IntConfig((LPC_UART_TypeDef *)LPC_UART0, UART_INTCFG_RLS, ENABLE);
00400         /*
00401          * Do not enable transmit interrupt here, since it is handled by
00402          * UART_Send() function, just to reset Tx Interrupt state for the
00403          * first time
00404          */
00405         TxIntStat = RESET;
00406
00407         // Reset ring buf head and tail idx
00408         __BUF_RESET(rb.rx_head);
00409         __BUF_RESET(rb.rx_tail);
00410         __BUF_RESET(rb.tx_head);
00411         __BUF_RESET(rb.tx_tail);
00412
00413     /* preemption = 1, sub-priority = 1 */
00414     NVIC_SetPriority(UART0_IRQn, ((0x01<<3)|0x01));
00415         /* Enable Interrupt for UART0 channel */
00416     NVIC_EnableIRQ(UART0_IRQn);
00417
00418
00419         // print welcome screen
00420         print_menu();
00421
00422         // reset exit flag
00423         exitflag = RESET;
00424
00425     /* Read some data from the buffer */
00426     while (exitflag == RESET)
00427     {
00428        len = 0;
00429         while (len == 0)
00430         {
00431             len = UARTReceive((LPC_UART_TypeDef *)LPC_UART0, buffer, sizeof(buffer));
00432         }
00433
00434         /* Got some data */
00435         idx = 0;
00436         while (idx < len)
00437         {
00438             if (buffer[idx] == 27)
00439             {
00440                 /* ESC key, set exit flag */
00441                 UARTSend((LPC_UART_TypeDef *)LPC_UART0, menu3, sizeof(menu3));
00442                 exitflag = SET;
00443             }
00444             else if (buffer[idx] == 'r')
00445             {
00446                 print_menu();
00447             }
00448             else
00449             {
00450                 /* Echo it back */
00451                 UARTSend((LPC_UART_TypeDef *)LPC_UART0, &buffer[idx], 1);
00452             }
00453             idx++;
00454         }
00455     }
00456
00457     // wait for current transmission complete - THR must be empty
00458     while (UART_CheckBusy((LPC_UART_TypeDef *)LPC_UART0));
00459
00460     // DeInitialize UART0 peripheral
00461     UART_DeInit((LPC_UART_TypeDef *)LPC_UART0);
00462
00463     /* Loop forever */
00464     while(1);
00465 }
00466
00467 /* With ARM and GHS toolsets, the entry point is main() - this will
00468    allow the linker to generate wrapper code to setup stacks, allocate
00469    heap area, and initialize and copy code and data segments. For GNU
00470    toolsets, the entry point is through __start() in the crt0_gnu.asm
00471    file, and that startup code will setup stacks and data */
00472 int main(void)
00473 {
00474     return c_entry();
00475 }
00476
00477 #ifdef  DEBUG
00478 /*******************************************************************************
00479 * @brief                Reports the name of the source file and the source line number
00480 *                               where the CHECK_PARAM error has occurred.
00481 * @param[in]    file Pointer to the source file name
00482 * @param[in]    line assert_param error line source number
00483 * @return               None
00484 *******************************************************************************/
00485 void check_failed(uint8_t *file, uint32_t line)
00486 {
00487         /* User can add his own implementation to report the file name and line number,
00488          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00489
00490         /* Infinite loop */
00491         while(1);
00492 }
00493 #endif
00494
00495 /*
00496  * @}
00497  */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Receive/uart_irda_receive.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Receive/uart_irda_receive.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          uart_irda_receive.c                             2010-06-07
00003 */
00025 #include "lpc17xx_uart.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "lpc17xx_gpio.h"
00029
00030 /* Example group ----------------------------------------------------------- */
00036 /************************** PRIVATE DEFINITIONS *************************/
00037 #define UART_PORT 0
00038
00039 #if (UART_PORT == 0)
00040 #define TEST_UART LPC_UART0
00041 #elif (UART_PORT == 1)
00042 #define TEST_UART (LPC_UART_TypeDef *)UART1
00043 #endif
00044 #define TEST_IRDA LPC_UART3
00045
00046 /************************** PRIVATE VARIABLES *************************/
00047 uint8_t menu1[] = "Hello NXP Semiconductors \n\r";
00048 uint8_t menu2[] = "UART IrDA mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps communicates with PC \n\r\t UART3 - 9600bps receives infrared signal\n\r";
00049 uint8_t menu3[] = "\t The demo keep reading input infrared signal and display through 8 led bank \n\r";
00050 /************************** PRIVATE FUNCTIONS *************************/
00051 void print_menu(void);
00052
00053 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00054 /*********************************************************************/
00059 void print_menu(void)
00060 {
00061         UART_Send(TEST_UART, menu1, sizeof(menu1), BLOCKING);
00062         UART_Send(TEST_UART, menu2, sizeof(menu2), BLOCKING);
00063         UART_Send(TEST_UART, menu3, sizeof(menu3), BLOCKING);
00064 }
00065
00066
00067
00068 /*-------------------------MAIN FUNCTION------------------------------*/
00069 /*********************************************************************/
00074 int c_entry(void)
00075 {
00076         // UART Configuration structure variable
00077         UART_CFG_Type UARTConfigStruct;
00078         // UART FIFO configuration Struct variable
00079         UART_FIFO_CFG_Type UARTFIFOConfigStruct;
00080         // Pin configuration for UART0
00081         PINSEL_CFG_Type PinCfg;
00082         uint32_t len;
00083         uint32_t led_mask[] = { 1<<28, 1<<29, 1UL<<31, 1<<2, 1<<3, 1<<4, 1<<5, 1<<6 };
00084         uint8_t buffer,i;
00085
00086         //Initialize for 8 led bank
00087         GPIO_SetDir(1, 0xB0000000, 1);           /* LEDs on PORT1 defined as Output    */
00088         GPIO_SetDir(2, 0x0000007C, 1);           /* LEDs on PORT2 defined as Output    */
00089
00090         GPIO_ClearValue(1, 0xB0000000);
00091         GPIO_ClearValue(2, 0x0000007C);
00092
00093 #if (UART_PORT == 0)
00094         /*
00095          * Initialize UART0 pin connect
00096          */
00097         PinCfg.Funcnum = 1;
00098         PinCfg.OpenDrain = 0;
00099         PinCfg.Pinmode = 0;
00100         PinCfg.Pinnum = 2;
00101         PinCfg.Portnum = 0;
00102         PINSEL_ConfigPin(&PinCfg);//P0.2 TXD0
00103 #endif
00104
00105 #if (UART_PORT == 1)
00106         /*
00107          * Initialize UART1 pin connect
00108          */
00109         PinCfg.Funcnum = 2;
00110         PinCfg.OpenDrain = 0;
00111         PinCfg.Pinmode = 0;
00112         PinCfg.Pinnum = 0;
00113         PinCfg.Portnum = 2;
00114         PINSEL_ConfigPin(&PinCfg);
00115         PinCfg.Pinnum = 1;
00116         PINSEL_ConfigPin(&PinCfg);
00117 #endif
00118         /*
00119          * Initialize UART3 pin connect
00120          */
00121         PinCfg.Funcnum = 3;
00122         PinCfg.OpenDrain = 0;
00123         PinCfg.Pinmode = 0;
00124         PinCfg.Pinnum = 26;
00125         PinCfg.Portnum = 0;
00126         PINSEL_ConfigPin(&PinCfg);//P0.26 RXD3
00127
00128         /* Initialize UART Configuration parameter structure to default state:
00129          * Baudrate = 9600bps
00130          * 8 data bit
00131          * 1 Stop bit
00132          * None parity
00133          */
00134         UART_ConfigStructInit(&UARTConfigStruct);
00135
00136         // Initialize UART0 & UART3 peripheral with given to corresponding parameter
00137         UART_Init(TEST_UART, &UARTConfigStruct);
00138         UART_Init(TEST_IRDA, &UARTConfigStruct);
00139         /* Initialize FIFOConfigStruct to default state:
00140          *                              - FIFO_DMAMode = DISABLE
00141          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00142          *                              - FIFO_ResetRxBuf = ENABLE
00143          *                              - FIFO_ResetTxBuf = ENABLE
00144          *                              - FIFO_State = ENABLE
00145          */
00146         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00147
00148         // Initialize FIFO for UART0 & UART3 peripheral
00149         UART_FIFOConfig(TEST_UART, &UARTFIFOConfigStruct);
00150         UART_FIFOConfig(TEST_IRDA, &UARTFIFOConfigStruct);
00151         //Configure and enable IrDA mode on UART
00152         UART_IrDACmd(TEST_IRDA,ENABLE);
00153
00154         // Enable UART Transmit
00155         UART_TxCmd(TEST_UART, ENABLE);
00156
00157         // print welcome screen
00158         print_menu();
00159
00160     /* Read some data from the buffer */
00161     while (1)
00162     {
00163         len=0;
00164         while(len==0)
00165         {
00166                 len = UART_Receive(TEST_IRDA, &buffer, 1, NONE_BLOCKING);
00167         }
00168         if(buffer!=0)
00169         {
00170                 for(i=0;i<8;i++)
00171                 {
00172                 if((buffer>>i)&0x01){//set
00173                         if(i<3)
00174                                 GPIO_SetValue(1, led_mask[i]);
00175                         else
00176                                 GPIO_SetValue(2, led_mask[i]);
00177                 }
00178                 else {                                  //clear
00179                         if(i<3)
00180                                 GPIO_ClearValue(1, led_mask[i]);
00181                         else
00182                                 GPIO_ClearValue(2, led_mask[i]);
00183                 }
00184                 }
00185         }
00186         else //clear 8 led bank
00187         {
00188                 GPIO_ClearValue(1, 0xB0000000);
00189                 GPIO_ClearValue(2, 0x0000007C);
00190         }
00191     }
00192 }
00193
00194 /* With ARM and GHS toolsets, the entry point is main() - this will
00195    allow the linker to generate wrapper code to setup stacks, allocate
00196    heap area, and initialize and copy code and data segments. For GNU
00197    toolsets, the entry point is through __start() in the crt0_gnu.asm
00198    file, and that startup code will setup stacks and data */
00199 int main(void)
00200 {
00201     return c_entry();
00202 }
00203
00204
00205 #ifdef  DEBUG
00206 /*******************************************************************************
00207 * @brief                Reports the name of the source file and the source line number
00208 *                               where the CHECK_PARAM error has occurred.
00209 * @param[in]    file Pointer to the source file name
00210 * @param[in]    line assert_param error line source number
00211 * @return               None
00212 *******************************************************************************/
00213 void check_failed(uint8_t *file, uint32_t line)
00214 {
00215         /* User can add his own implementation to report the file name and line number,
00216          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00217
00218         /* Infinite loop */
00219         while(1);
00220 }
00221 #endif
00222 /*
00223  * @}
00224  */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Transmit/uart_irda_transmit.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/IrDA/Transmit/uart_irda_transmit.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          uart_irda_transmit.c                            2010-06-07
00003 */
00025 #include "lpc17xx_uart.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028
00029 /* Example group ----------------------------------------------------------- */
00035 /************************** PRIVATE DEFINITIONS *************************/
00036 #define UART_PORT 0
00037
00038 #if (UART_PORT == 0)
00039 #define TEST_UART LPC_UART0
00040 #elif (UART_PORT == 1)
00041 #define TEST_UART (LPC_UART_TypeDef *)UART1
00042 #endif
00043 #define TEST_IRDA LPC_UART3
00044
00045 /************************** PRIVATE VARIABLES *************************/
00046 uint8_t menu1[] = "Hello NXP Semiconductors \n\r";
00047 uint8_t menu2[] = "UART IrDA mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps communicates with PC \n\r\t UART3 - 9600bps transmits infrared signals\n\r";
00048 uint8_t menu3[] = "\t\t- Press Esc to terminate this demo \n\r\t\t- Press 'r' to re-print this menu \n\r";
00049 uint8_t menu4[] = "\n\rUART demo terminated!";
00050 uint8_t menu5[] = "\n\rEnter a hex byte value to transmit: 0x";
00051 /************************** PRIVATE FUNCTIONS *************************/
00052 void print_menu(void);
00053
00054 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00055 /*********************************************************************/
00060 void print_menu(void)
00061 {
00062         UART_Send(TEST_UART, menu1, sizeof(menu1), BLOCKING);
00063         UART_Send(TEST_UART, menu2, sizeof(menu2), BLOCKING);
00064         UART_Send(TEST_UART, menu3, sizeof(menu3), BLOCKING);
00065 }
00066
00067
00068
00069 /*-------------------------MAIN FUNCTION------------------------------*/
00070 /*********************************************************************/
00075 int c_entry(void)
00076 {
00077         // UART Configuration structure variable
00078         UART_CFG_Type UARTConfigStruct;
00079         // UART FIFO configuration Struct variable
00080         UART_FIFO_CFG_Type UARTFIFOConfigStruct;
00081         // Pin configuration for UART
00082         PINSEL_CFG_Type PinCfg;
00083         uint32_t idx,len;
00084         __IO FlagStatus exitflag;
00085         uint8_t buffer,temp;
00086
00087 #if (UART_PORT == 0)
00088         /*
00089          * Initialize UART0 pin connect
00090          */
00091         PinCfg.Funcnum = 1;
00092         PinCfg.OpenDrain = 0;
00093         PinCfg.Pinmode = 0;
00094         PinCfg.Pinnum = 2;
00095         PinCfg.Portnum = 0;
00096         PINSEL_ConfigPin(&PinCfg);//P0.2 TXD0
00097         PinCfg.Pinnum = 3;
00098         PINSEL_ConfigPin(&PinCfg);//P0.3 RXD0
00099 #endif
00100
00101 #if (UART_PORT == 1)
00102         /*
00103          * Initialize UART1 pin connect
00104          */
00105         PinCfg.Funcnum = 2;
00106         PinCfg.OpenDrain = 0;
00107         PinCfg.Pinmode = 0;
00108         PinCfg.Pinnum = 0;
00109         PinCfg.Portnum = 2;
00110         PINSEL_ConfigPin(&PinCfg);
00111         PinCfg.Pinnum = 1;
00112         PINSEL_ConfigPin(&PinCfg);
00113 #endif
00114         /*
00115          * Initialize UART3 pin connect
00116          */
00117         PinCfg.Funcnum = 3;
00118         PinCfg.OpenDrain = 0;
00119         PinCfg.Pinmode = 0;
00120         PinCfg.Pinnum = 25;
00121         PinCfg.Portnum = 0;
00122         PINSEL_ConfigPin(&PinCfg);//P0.25 TXD3
00123
00124         /* Initialize UART Configuration parameter structure to default state:
00125          * Baudrate = 9600bps
00126          * 8 data bit
00127          * 1 Stop bit
00128          * None parity
00129          */
00130         UART_ConfigStructInit(&UARTConfigStruct);
00131
00132         // Initialize UART0 & UART3 peripheral with given to corresponding parameter
00133         UART_Init(TEST_UART, &UARTConfigStruct);
00134         UART_Init(TEST_IRDA, &UARTConfigStruct);
00135         /* Initialize FIFOConfigStruct to default state:
00136          *                              - FIFO_DMAMode = DISABLE
00137          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00138          *                              - FIFO_ResetRxBuf = ENABLE
00139          *                              - FIFO_ResetTxBuf = ENABLE
00140          *                              - FIFO_State = ENABLE
00141          */
00142         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00143
00144         // Initialize FIFO for UART0 & UART3 peripheral
00145         UART_FIFOConfig(TEST_UART, &UARTFIFOConfigStruct);
00146         UART_FIFOConfig(TEST_IRDA, &UARTFIFOConfigStruct);
00147
00148         //Configure and enable IrDA mode on UART
00149         UART_IrDACmd(TEST_IRDA,ENABLE);
00150         // Enable UART Transmit
00151         UART_TxCmd(TEST_UART, ENABLE);
00152         UART_TxCmd(TEST_IRDA, ENABLE);
00153         // print welcome screen
00154         print_menu();
00155
00156         // Reset exit flag
00157         exitflag = RESET;
00158         idx=0;buffer=0;
00159
00160     /* Read some data from the buffer */
00161     while (exitflag == RESET)
00162     {
00163         if(idx==0)
00164         {
00165                 UART_Send(TEST_UART, menu5, sizeof(menu5), BLOCKING);
00166         }
00167         len=0;
00168         while(len==0)
00169         {
00170                 len = UART_Receive(TEST_UART, &temp, 1, NONE_BLOCKING);
00171         }
00172         if(temp==27)
00173         {
00174                 UART_Send(TEST_UART, menu4, sizeof(menu4), BLOCKING);
00175                 exitflag=SET;
00176         }
00177         else if(temp=='r')
00178         {
00179                 idx=0;buffer=0;
00180                 print_menu();
00181                 UART_Send(TEST_IRDA, &buffer, 1, BLOCKING);
00182         }
00183         else
00184         {
00185                 idx++;
00186                 switch(temp)
00187                 {
00188                 case '0': buffer=(buffer<<4)|0x00;break;
00189                 case '1': buffer=(buffer<<4)|0x01;break;
00190                 case '2': buffer=(buffer<<4)|0x02;break;
00191                 case '3': buffer=(buffer<<4)|0x03;break;
00192                 case '4': buffer=(buffer<<4)|0x04;break;
00193                 case '5': buffer=(buffer<<4)|0x05;break;
00194                 case '6': buffer=(buffer<<4)|0x06;break;
00195                 case '7': buffer=(buffer<<4)|0x07;break;
00196                 case '8': buffer=(buffer<<4)|0x08;break;
00197                 case '9': buffer=(buffer<<4)|0x09;break;
00198                 case 'a': buffer=(buffer<<4)|0x0A;break;
00199                 case 'A': buffer=(buffer<<4)|0x0A;break;
00200                 case 'b': buffer=(buffer<<4)|0x0B;break;
00201                 case 'B': buffer=(buffer<<4)|0x0B;break;
00202                 case 'c': buffer=(buffer<<4)|0x0C;break;
00203                 case 'C': buffer=(buffer<<4)|0x0C;break;
00204                 case 'd': buffer=(buffer<<4)|0x0D;break;
00205                 case 'D': buffer=(buffer<<4)|0x0D;break;
00206                 case 'e': buffer=(buffer<<4)|0x0E;break;
00207                 case 'E': buffer=(buffer<<4)|0x0E;break;
00208                 case 'f': buffer=(buffer<<4)|0x0F;break;
00209                 case 'F': buffer=(buffer<<4)|0x0F;break;
00210                 default: idx=0;buffer=0;break;
00211                 }
00212                 if(idx==2)
00213                 {
00214                         temp=buffer>>4;
00215                         if(temp <= 9)temp=temp+ 0x30;
00216                         else temp=temp+0x37;
00217                         UART_Send(TEST_UART, &temp, 1, BLOCKING);
00218                         temp=(buffer&0x0F);
00219                         if(temp <= 9)temp=temp+ 0x30;
00220                         else temp=temp+0x37;
00221                         UART_Send(TEST_UART, &temp, 1, BLOCKING);
00222
00223                 UART_Send(TEST_IRDA, &buffer, 1, BLOCKING);
00224                 idx=0;buffer=0;
00225                 }
00226         }
00227     }
00228     // wait for current transmission complete - THR must be empty
00229     while (UART_CheckBusy(TEST_UART) == SET);
00230     while (UART_CheckBusy(TEST_IRDA) == SET);
00231     // DeInitialize UART0 & UART3 peripheral
00232     UART_DeInit(TEST_UART);
00233     UART_DeInit(TEST_IRDA);
00234     /* Loop forever */
00235     while(1);
00236 }
00237
00238 /* With ARM and GHS toolsets, the entry point is main() - this will
00239    allow the linker to generate wrapper code to setup stacks, allocate
00240    heap area, and initialize and copy code and data segments. For GNU
00241    toolsets, the entry point is through __start() in the crt0_gnu.asm
00242    file, and that startup code will setup stacks and data */
00243 int main(void)
00244 {
00245     return c_entry();
00246 }
00247
00248
00249 #ifdef  DEBUG
00250 /*******************************************************************************
00251 * @brief                Reports the name of the source file and the source line number
00252 *                               where the CHECK_PARAM error has occurred.
00253 * @param[in]    file Pointer to the source file name
00254 * @param[in]    line assert_param error line source number
00255 * @return               None
00256 *******************************************************************************/
00257 void check_failed(uint8_t *file, uint32_t line)
00258 {
00259         /* User can add his own implementation to report the file name and line number,
00260          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00261
00262         /* Infinite loop */
00263         while(1);
00264 }
00265 #endif
00266 /*
00267  * @}
00268  */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/UART/Polling/uart_polling_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/UART/Polling/uart_polling_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          uart_polling_test.c                             2010-05-21
00003 */
00025 #include "lpc17xx_uart.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028
00029 /* Example group ----------------------------------------------------------- */
00035 /************************** PRIVATE DEFINITIONS *************************/
00036 #define UART_PORT 0
00037
00038 #if (UART_PORT == 0)
00039 #define TEST_UART LPC_UART0
00040 #elif (UART_PORT == 1)
00041 #define TEST_UART (LPC_UART_TypeDef *)UART1
00042 #endif
00043
00044
00045 /************************** PRIVATE VARIABLES *************************/
00046 uint8_t menu1[] = "Hello NXP Semiconductors \n\r";
00047 uint8_t menu2[] = "UART polling mode demo \n\r\t MCU LPC17xx - ARM Cortex-M3 \n\r\t UART0 - 9600bps \n\r";
00048 uint8_t menu3[] = "UART demo terminated!";
00049
00050 /************************** PRIVATE FUNCTIONS *************************/
00051 void print_menu(void);
00052
00053 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00054 /*********************************************************************/
00059 void print_menu(void)
00060 {
00061         UART_Send(TEST_UART, menu1, sizeof(menu1), BLOCKING);
00062         UART_Send(TEST_UART, menu2, sizeof(menu2), BLOCKING);
00063 }
00064
00065
00066
00067 /*-------------------------MAIN FUNCTION------------------------------*/
00068 /*********************************************************************/
00073 int c_entry(void)
00074 {
00075         // UART Configuration structure variable
00076         UART_CFG_Type UARTConfigStruct;
00077         // UART FIFO configuration Struct variable
00078         UART_FIFO_CFG_Type UARTFIFOConfigStruct;
00079         // Pin configuration for UART0
00080         PINSEL_CFG_Type PinCfg;
00081
00082         uint32_t idx, len;
00083         __IO FlagStatus exitflag;
00084         uint8_t buffer[10];
00085
00086 #if (UART_PORT == 0)
00087         /*
00088          * Initialize UART0 pin connect
00089          */
00090         PinCfg.Funcnum = 1;
00091         PinCfg.OpenDrain = 0;
00092         PinCfg.Pinmode = 0;
00093         PinCfg.Pinnum = 2;
00094         PinCfg.Portnum = 0;
00095         PINSEL_ConfigPin(&PinCfg);
00096         PinCfg.Pinnum = 3;
00097         PINSEL_ConfigPin(&PinCfg);
00098 #endif
00099
00100 #if (UART_PORT == 1)
00101         /*
00102          * Initialize UART1 pin connect
00103          */
00104         PinCfg.Funcnum = 2;
00105         PinCfg.OpenDrain = 0;
00106         PinCfg.Pinmode = 0;
00107         PinCfg.Pinnum = 0;
00108         PinCfg.Portnum = 2;
00109         PINSEL_ConfigPin(&PinCfg);
00110         PinCfg.Pinnum = 1;
00111         PINSEL_ConfigPin(&PinCfg);
00112 #endif
00113
00114         /* Initialize UART Configuration parameter structure to default state:
00115          * Baudrate = 9600bps
00116          * 8 data bit
00117          * 1 Stop bit
00118          * None parity
00119          */
00120         UART_ConfigStructInit(&UARTConfigStruct);
00121
00122         // Initialize UART0 peripheral with given to corresponding parameter
00123         UART_Init(TEST_UART, &UARTConfigStruct);
00124
00125         /* Initialize FIFOConfigStruct to default state:
00126          *                              - FIFO_DMAMode = DISABLE
00127          *                              - FIFO_Level = UART_FIFO_TRGLEV0
00128          *                              - FIFO_ResetRxBuf = ENABLE
00129          *                              - FIFO_ResetTxBuf = ENABLE
00130          *                              - FIFO_State = ENABLE
00131          */
00132         UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
00133
00134         // Initialize FIFO for UART0 peripheral
00135         UART_FIFOConfig(TEST_UART, &UARTFIFOConfigStruct);
00136
00137
00138         // Enable UART Transmit
00139         UART_TxCmd(TEST_UART, ENABLE);
00140
00141         // print welcome screen
00142         print_menu();
00143
00144         // Reset exit flag
00145         exitflag = RESET;
00146
00147     /* Read some data from the buffer */
00148     while (exitflag == RESET)
00149     {
00150        len = 0;
00151         while (len == 0)
00152         {
00153             len = UART_Receive(TEST_UART, buffer, sizeof(buffer), NONE_BLOCKING);
00154         }
00155
00156         /* Got some data */
00157         idx = 0;
00158         while (idx < len)
00159         {
00160             if (buffer[idx] == 27)
00161             {
00162                 /* ESC key, set exit flag */
00163                 UART_Send(TEST_UART, menu3, sizeof(menu3), BLOCKING);
00164                 exitflag = SET;
00165             }
00166             else if (buffer[idx] == 'r')
00167             {
00168                 print_menu();
00169             }
00170             else
00171             {
00172                 /* Echo it back */
00173                 UART_Send(TEST_UART, &buffer[idx], 1, BLOCKING);
00174             }
00175             idx++;
00176         }
00177     }
00178
00179     // wait for current transmission complete - THR must be empty
00180     while (UART_CheckBusy(TEST_UART) == SET);
00181
00182     // DeInitialize UART0 peripheral
00183     UART_DeInit(TEST_UART);
00184
00185     /* Loop forever */
00186     while(1);
00187 }
00188
00189 /* With ARM and GHS toolsets, the entry point is main() - this will
00190    allow the linker to generate wrapper code to setup stacks, allocate
00191    heap area, and initialize and copy code and data segments. For GNU
00192    toolsets, the entry point is through __start() in the crt0_gnu.asm
00193    file, and that startup code will setup stacks and data */
00194 int main(void)
00195 {
00196     return c_entry();
00197 }
00198
00199
00200 #ifdef  DEBUG
00201 /*******************************************************************************
00202 * @brief                Reports the name of the source file and the source line number
00203 *                               where the CHECK_PARAM error has occurred.
00204 * @param[in]    file Pointer to the source file name
00205 * @param[in]    line assert_param error line source number
00206 * @return               None
00207 *******************************************************************************/
00208 void check_failed(uint8_t *file, uint32_t line)
00209 {
00210         /* User can add his own implementation to report the file name and line number,
00211          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00212
00213         /* Infinite loop */
00214         while(1);
00215 }
00216 #endif
00217
00218 /*
00219  * @}
00220  */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/uip-conf.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/lpc17xx_port/uip-conf.h
Go to the documentation of this file.
00001
00015 /*
00016  * Copyright (c) 2006, Swedish Institute of Computer Science.
00017  * All rights reserved.
00018  *
00019  * Redistribution and use in source and binary forms, with or without
00020  * modification, are permitted provided that the following conditions
00021  * are met:
00022  * 1. Redistributions of source code must retain the above copyright
00023  *    notice, this list of conditions and the following disclaimer.
00024  * 2. Redistributions in binary form must reproduce the above copyright
00025  *    notice, this list of conditions and the following disclaimer in the
00026  *    documentation and/or other materials provided with the distribution.
00027  * 3. Neither the name of the Institute nor the names of its contributors
00028  *    may be used to endorse or promote products derived from this software
00029  *    without specific prior written permission.
00030  *
00031  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00032  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00033  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00034  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00035  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00036  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00037  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00038  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00039  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00040  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00041  * SUCH DAMAGE.
00042  *
00043  * This file is part of the uIP TCP/IP stack
00044  *
00045  * $Id: uip-conf.h 18137 2007-09-17 14:43:16Z anderslu $
00046  */
00047
00055 #ifndef __UIP_CONF_H__
00056 #define __UIP_CONF_H__
00057
00058 #include <inttypes.h>
00059
00067 typedef uint8_t u8_t;
00068
00076 typedef uint16_t u16_t;
00077
00086 typedef unsigned short uip_stats_t;
00087
00093 #define UIP_CONF_MAX_CONNECTIONS 40
00094
00100 #define UIP_CONF_MAX_LISTENPORTS 40
00101
00107 #define UIP_CONF_BUFFER_SIZE     1520
00108
00114 #define UIP_CONF_BYTE_ORDER      LITTLE_ENDIAN
00115
00121 #define UIP_CONF_LOGGING         1
00122
00128 #define UIP_CONF_UDP             0
00129
00135 #define UIP_CONF_UDP_CHECKSUMS   1
00136
00142 #define UIP_CONF_STATISTICS      1
00143
00144 /* Here we include the header file for the application(s) we use in
00145    our project. */
00146 /*#include "smtp.h"*/
00147 //#include "hello-world.h"
00148 /*#include "telnetd.h"*/
00149 #include "webserver.h"
00150 /*#include "dhcpc.h"*/
00151 /*#include "resolv.h"*/
00152 /*#include "webclient.h"*/
00153
00154 #endif /* __UIP_CONF_H__ */
00155
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.c
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: uip-fw.c,v 1.2 2006/06/12 08:00:30 adam Exp $
00034  */
00056 #include "uip.h"
00057 #include "uip_arch.h"
00058 #include "uip-fw.h"
00059
00060 #include <string.h> /* for memcpy() */
00061
00062 /*
00063  * The list of registered network interfaces.
00064  */
00065 static struct uip_fw_netif *netifs = NULL;
00066
00067 /*
00068  * A pointer to the default network interface.
00069  */
00070 static struct uip_fw_netif *defaultnetif = NULL;
00071
00072 struct tcpip_hdr {
00073   /* IP header. */
00074   u8_t vhl,
00075     tos;
00076   u16_t len,
00077     ipid,
00078     ipoffset;
00079   u8_t ttl,
00080     proto;
00081   u16_t ipchksum;
00082   u16_t srcipaddr[2],
00083     destipaddr[2];
00084
00085   /* TCP header. */
00086   u16_t srcport,
00087     destport;
00088   u8_t seqno[4],
00089     ackno[4],
00090     tcpoffset,
00091     flags,
00092     wnd[2];
00093   u16_t tcpchksum;
00094   u8_t urgp[2];
00095   u8_t optdata[4];
00096 } /*PACK_STRUCT_END*/;
00097
00098 struct icmpip_hdr {
00099   /* IP header. */
00100   u8_t vhl,
00101     tos,
00102     len[2],
00103     ipid[2],
00104     ipoffset[2],
00105     ttl,
00106     proto;
00107   u16_t ipchksum;
00108   u16_t srcipaddr[2],
00109     destipaddr[2];
00110   /* ICMP (echo) header. */
00111   u8_t type, icode;
00112   u16_t icmpchksum;
00113   u16_t id, seqno;
00114   u8_t payload[1];
00115 } /*PACK_STRUCT_END*/;
00116
00117 /* ICMP ECHO. */
00118 #define ICMP_ECHO 8
00119
00120 /* ICMP TIME-EXCEEDED. */
00121 #define ICMP_TE 11
00122
00123 /*
00124  * Pointer to the TCP/IP headers of the packet in the uip_buf buffer.
00125  */
00126 #define BUF ((struct tcpip_hdr *)&uip_buf[UIP_LLH_LEN])
00127
00128 /*
00129  * Pointer to the ICMP/IP headers of the packet in the uip_buf buffer.
00130  */
00131 #define ICMPBUF ((struct icmpip_hdr *)&uip_buf[UIP_LLH_LEN])
00132
00133 /*
00134  * Certain fields of an IP packet that are used for identifying
00135  * duplicate packets.
00136  */
00137 struct fwcache_entry {
00138   u16_t timer;
00139
00140   u16_t srcipaddr[2];
00141   u16_t destipaddr[2];
00142   u16_t ipid;
00143   u8_t proto;
00144   u8_t unused;
00145
00146 #if notdef
00147   u16_t payload[2];
00148 #endif
00149
00150 #if UIP_REASSEMBLY > 0
00151   u16_t len, offset;
00152 #endif
00153 };
00154
00155 /*
00156  * The number of packets to remember when looking for duplicates.
00157  */
00158 #ifdef UIP_CONF_FWCACHE_SIZE
00159 #define FWCACHE_SIZE UIP_CONF_FWCACHE_SIZE
00160 #else
00161 #define FWCACHE_SIZE 2
00162 #endif
00163
00164
00165 /*
00166  * A cache of packet header fields which are used for
00167  * identifying duplicate packets.
00168  */
00169 static struct fwcache_entry fwcache[FWCACHE_SIZE];
00170
00175 #define FW_TIME 20
00176
00177 /*------------------------------------------------------------------------------*/
00181 /*------------------------------------------------------------------------------*/
00182 void
00183 uip_fw_init(void)
00184 {
00185   struct uip_fw_netif *t;
00186   defaultnetif = NULL;
00187   while(netifs != NULL) {
00188     t = netifs;
00189     netifs = netifs->next;
00190     t->next = NULL;
00191   }
00192 }
00193 /*------------------------------------------------------------------------------*/
00205 /*------------------------------------------------------------------------------*/
00206 static unsigned char
00207 ipaddr_maskcmp(u16_t *ipaddr, u16_t *netipaddr, u16_t *netmask)
00208 {
00209   return (ipaddr[0] & netmask [0]) == (netipaddr[0] & netmask[0]) &&
00210     (ipaddr[1] & netmask[1]) == (netipaddr[1] & netmask[1]);
00211 }
00212 /*------------------------------------------------------------------------------*/
00220 /*------------------------------------------------------------------------------*/
00221 static void
00222 time_exceeded(void)
00223 {
00224   u16_t tmp16;
00225
00226   /* We don't send out ICMP errors for ICMP messages. */
00227   if(ICMPBUF->proto == UIP_PROTO_ICMP) {
00228     uip_len = 0;
00229     return;
00230   }
00231   /* Copy fields from packet header into payload of this ICMP packet. */
00232   memcpy(&(ICMPBUF->payload[0]), ICMPBUF, 28);
00233
00234   /* Set the ICMP type and code. */
00235   ICMPBUF->type = ICMP_TE;
00236   ICMPBUF->icode = 0;
00237
00238   /* Calculate the ICMP checksum. */
00239   ICMPBUF->icmpchksum = 0;
00240   ICMPBUF->icmpchksum = ~uip_chksum((u16_t *)&(ICMPBUF->type), 36);
00241
00242   /* Set the IP destination address to be the source address of the
00243      original packet. */
00244   tmp16= BUF->destipaddr[0];
00245   BUF->destipaddr[0] = BUF->srcipaddr[0];
00246   BUF->srcipaddr[0] = tmp16;
00247   tmp16 = BUF->destipaddr[1];
00248   BUF->destipaddr[1] = BUF->srcipaddr[1];
00249   BUF->srcipaddr[1] = tmp16;
00250
00251   /* Set our IP address as the source address. */
00252   BUF->srcipaddr[0] = uip_hostaddr[0];
00253   BUF->srcipaddr[1] = uip_hostaddr[1];
00254
00255   /* The size of the ICMP time exceeded packet is 36 + the size of the
00256      IP header (20) = 56. */
00257   uip_len = 56;
00258   ICMPBUF->len[0] = 0;
00259   ICMPBUF->len[1] = uip_len;
00260
00261   /* Fill in the other fields in the IP header. */
00262   ICMPBUF->vhl = 0x45;
00263   ICMPBUF->tos = 0;
00264   ICMPBUF->ipoffset[0] = ICMPBUF->ipoffset[1] = 0;
00265   ICMPBUF->ttl  = UIP_TTL;
00266   ICMPBUF->proto = UIP_PROTO_ICMP;
00267
00268   /* Calculate IP checksum. */
00269   ICMPBUF->ipchksum = 0;
00270   ICMPBUF->ipchksum = ~(uip_ipchksum());
00271
00272
00273 }
00274 /*------------------------------------------------------------------------------*/
00280 /*------------------------------------------------------------------------------*/
00281 static void
00282 fwcache_register(void)
00283 {
00284   struct fwcache_entry *fw;
00285   int i, oldest;
00286
00287   oldest = FW_TIME;
00288   fw = NULL;
00289
00290   /* Find the oldest entry in the cache. */
00291   for(i = 0; i < FWCACHE_SIZE; ++i) {
00292     if(fwcache[i].timer == 0) {
00293       fw = &fwcache[i];
00294       break;
00295     } else if(fwcache[i].timer <= oldest) {
00296       fw = &fwcache[i];
00297       oldest = fwcache[i].timer;
00298     }
00299   }
00300
00301   fw->timer = FW_TIME;
00302   fw->ipid = BUF->ipid;
00303   fw->srcipaddr[0] = BUF->srcipaddr[0];
00304   fw->srcipaddr[1] = BUF->srcipaddr[1];
00305   fw->destipaddr[0] = BUF->destipaddr[0];
00306   fw->destipaddr[1] = BUF->destipaddr[1];
00307   fw->proto = BUF->proto;
00308 #if notdef
00309   fw->payload[0] = BUF->srcport;
00310   fw->payload[1] = BUF->destport;
00311 #endif
00312 #if UIP_REASSEMBLY > 0
00313   fw->len = BUF->len;
00314   fw->offset = BUF->ipoffset;
00315 #endif
00316 }
00317 /*------------------------------------------------------------------------------*/
00322 /*------------------------------------------------------------------------------*/
00323 static struct uip_fw_netif *
00324 find_netif(void)
00325 {
00326   struct uip_fw_netif *netif;
00327
00328   /* Walk through every network interface to check for a match. */
00329   for(netif = netifs; netif != NULL; netif = netif->next) {
00330     if(ipaddr_maskcmp(BUF->destipaddr, netif->ipaddr,
00331                       netif->netmask)) {
00332       /* If there was a match, we break the loop. */
00333       return netif;
00334     }
00335   }
00336
00337   /* If no matching netif was found, we use default netif. */
00338   return defaultnetif;
00339 }
00340 /*------------------------------------------------------------------------------*/
00356 /*------------------------------------------------------------------------------*/
00357 u8_t
00358 uip_fw_output(void)
00359 {
00360   struct uip_fw_netif *netif;
00361
00362   if(uip_len == 0) {
00363     return UIP_FW_ZEROLEN;
00364   }
00365
00366   fwcache_register();
00367
00368 #if UIP_BROADCAST
00369   /* Link local broadcasts go out on all interfaces. */
00370   if(/*BUF->proto == UIP_PROTO_UDP &&*/
00371      BUF->destipaddr[0] == 0xffff &&
00372      BUF->destipaddr[1] == 0xffff) {
00373     if(defaultnetif != NULL) {
00374       defaultnetif->output();
00375     }
00376     for(netif = netifs; netif != NULL; netif = netif->next) {
00377       netif->output();
00378     }
00379     return UIP_FW_OK;
00380   }
00381 #endif /* UIP_BROADCAST */
00382
00383   netif = find_netif();
00384   /*  printf("uip_fw_output: netif %p ->output %p len %d\n", netif,
00385          netif->output,
00386          uip_len);*/
00387
00388   if(netif == NULL) {
00389     return UIP_FW_NOROUTE;
00390   }
00391   /* If we now have found a suitable network interface, we call its
00392      output function to send out the packet. */
00393   return netif->output();
00394 }
00395 /*------------------------------------------------------------------------------*/
00404 /*------------------------------------------------------------------------------*/
00405 u8_t
00406 uip_fw_forward(void)
00407 {
00408   struct fwcache_entry *fw;
00409
00410   /* First check if the packet is destined for ourselves and return 0
00411      to indicate that the packet should be processed locally. */
00412   if(BUF->destipaddr[0] == uip_hostaddr[0] &&
00413      BUF->destipaddr[1] == uip_hostaddr[1]) {
00414     return UIP_FW_LOCAL;
00415   }
00416
00417   /* If we use ping IP address configuration, and our IP address is
00418      not yet configured, we should intercept all ICMP echo packets. */
00419 #if UIP_PINGADDRCONF
00420   if((uip_hostaddr[0] | uip_hostaddr[1]) == 0 &&
00421      BUF->proto == UIP_PROTO_ICMP &&
00422      ICMPBUF->type == ICMP_ECHO) {
00423     return UIP_FW_LOCAL;
00424   }
00425 #endif /* UIP_PINGADDRCONF */
00426
00427   /* Check if the packet is in the forwarding cache already, and if so
00428      we drop it. */
00429
00430   for(fw = fwcache; fw < &fwcache[FWCACHE_SIZE]; ++fw) {
00431     if(fw->timer != 0 &&
00432 #if UIP_REASSEMBLY > 0
00433        fw->len == BUF->len &&
00434        fw->offset == BUF->ipoffset &&
00435 #endif
00436        fw->ipid == BUF->ipid &&
00437        fw->srcipaddr[0] == BUF->srcipaddr[0] &&
00438        fw->srcipaddr[1] == BUF->srcipaddr[1] &&
00439        fw->destipaddr[0] == BUF->destipaddr[0] &&
00440        fw->destipaddr[1] == BUF->destipaddr[1] &&
00441 #if notdef
00442        fw->payload[0] == BUF->srcport &&
00443        fw->payload[1] == BUF->destport &&
00444 #endif
00445        fw->proto == BUF->proto) {
00446       /* Drop packet. */
00447       return UIP_FW_FORWARDED;
00448     }
00449   }
00450
00451   /* If the TTL reaches zero we produce an ICMP time exceeded message
00452      in the uip_buf buffer and forward that packet back to the sender
00453      of the packet. */
00454   if(BUF->ttl <= 1) {
00455     /* No time exceeded for broadcasts and multicasts! */
00456     if(BUF->destipaddr[0] == 0xffff && BUF->destipaddr[1] == 0xffff) {
00457       return UIP_FW_LOCAL;
00458     }
00459     time_exceeded();
00460   }
00461
00462   /* Decrement the TTL (time-to-live) value in the IP header */
00463   BUF->ttl = BUF->ttl - 1;
00464
00465   /* Update the IP checksum. */
00466   if(BUF->ipchksum >= HTONS(0xffff - 0x0100)) {
00467     BUF->ipchksum = BUF->ipchksum + HTONS(0x0100) + 1;
00468   } else {
00469     BUF->ipchksum = BUF->ipchksum + HTONS(0x0100);
00470   }
00471
00472   if(uip_len > 0) {
00473     uip_appdata = &uip_buf[UIP_LLH_LEN + UIP_TCPIP_HLEN];
00474     uip_fw_output();
00475   }
00476
00477 #if UIP_BROADCAST
00478   if(BUF->destipaddr[0] == 0xffff && BUF->destipaddr[1] == 0xffff) {
00479     return UIP_FW_LOCAL;
00480   }
00481 #endif /* UIP_BROADCAST */
00482
00483   /* Return non-zero to indicate that the packet was forwarded and that no
00484      other processing should be made. */
00485   return UIP_FW_FORWARDED;
00486 }
00487 /*------------------------------------------------------------------------------*/
00494 /*------------------------------------------------------------------------------*/
00495 void
00496 uip_fw_register(struct uip_fw_netif *netif)
00497 {
00498   netif->next = netifs;
00499   netifs = netif;
00500 }
00501 /*------------------------------------------------------------------------------*/
00511 /*------------------------------------------------------------------------------*/
00512 void
00513 uip_fw_default(struct uip_fw_netif *netif)
00514 {
00515   defaultnetif = netif;
00516 }
00517 /*------------------------------------------------------------------------------*/
00521 /*------------------------------------------------------------------------------*/
00522 void
00523 uip_fw_periodic(void)
00524 {
00525   struct fwcache_entry *fw;
00526   for(fw = fwcache; fw < &fwcache[FWCACHE_SIZE]; ++fw) {
00527     if(fw->timer > 0) {
00528       --fw->timer;
00529     }
00530   }
00531 }
00532 /*------------------------------------------------------------------------------*/
Generated on Mon Nov 28 2011 11:14:49 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-fw.h
Go to the documentation of this file.
00001
00012 /*
00013  * Copyright (c) 2004, Swedish Institute of Computer Science.
00014  * All rights reserved.
00015  *
00016  * Redistribution and use in source and binary forms, with or without
00017  * modification, are permitted provided that the following conditions
00018  * are met:
00019  * 1. Redistributions of source code must retain the above copyright
00020  *    notice, this list of conditions and the following disclaimer.
00021  * 2. Redistributions in binary form must reproduce the above copyright
00022  *    notice, this list of conditions and the following disclaimer in the
00023  *    documentation and/or other materials provided with the distribution.
00024  * 3. Neither the name of the Institute nor the names of its contributors
00025  *    may be used to endorse or promote products derived from this software
00026  *    without specific prior written permission.
00027  *
00028  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00029  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00030  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00031  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00032  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00033  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00034  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00035  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00036  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00037  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00038  * SUCH DAMAGE.
00039  *
00040  * This file is part of the uIP TCP/IP stack
00041  *
00042  * Author: Adam Dunkels <adam@sics.se>
00043  *
00044  * $Id: uip-fw.h,v 1.2 2006/06/12 08:00:30 adam Exp $
00045  */
00046 #ifndef __UIP_FW_H__
00047 #define __UIP_FW_H__
00048
00049 #include "uip.h"
00050
00054 struct uip_fw_netif {
00055   struct uip_fw_netif *next;
00057   u16_t ipaddr[2];
00058   u16_t netmask[2];
00059   u8_t (* output)(void);
00062 };
00063
00080 #define UIP_FW_NETIF(ip1,ip2,ip3,ip4, nm1,nm2,nm3,nm4, outputfunc) \
00081         NULL, \
00082         {HTONS((ip1 << 8) | ip2), HTONS((ip3 << 8) | ip4)}, \
00083         {HTONS((nm1 << 8) | nm2), HTONS((nm3 << 8) | nm4)}, \
00084         outputfunc
00085
00095 #define uip_fw_setipaddr(netif, addr) \
00096         do { (netif)->ipaddr[0] = ((u16_t *)(addr))[0]; \
00097              (netif)->ipaddr[1] = ((u16_t *)(addr))[1]; } while(0)
00098
00107 #define uip_fw_setnetmask(netif, addr) \
00108         do { (netif)->netmask[0] = ((u16_t *)(addr))[0]; \
00109              (netif)->netmask[1] = ((u16_t *)(addr))[1]; } while(0)
00110
00111 void uip_fw_init(void);
00112 u8_t uip_fw_forward(void);
00113 u8_t uip_fw_output(void);
00114 void uip_fw_register(struct uip_fw_netif *netif);
00115 void uip_fw_default(struct uip_fw_netif *netif);
00116 void uip_fw_periodic(void);
00117
00118
00125 #define UIP_FW_LOCAL     0
00126
00132 #define UIP_FW_OK        0
00133
00139 #define UIP_FW_FORWARDED 1
00140
00147 #define UIP_FW_ZEROLEN   2
00148
00155 #define UIP_FW_TOOLARGE  3
00156
00163 #define UIP_FW_NOROUTE   4
00164
00171 #define UIP_FW_DROPPED   5
00172
00173
00174 #endif /* __UIP_FW_H__ */
00175
Generated on Mon Nov 28 2011 11:14:49 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.c
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2006, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * $Id: uip-neighbor.c,v 1.2 2006/06/12 08:00:30 adam Exp $
00032  */
00033
00042 #include "uip-neighbor.h"
00043
00044 #include <string.h>
00045 #include <stdio.h>
00046
00047 #define MAX_TIME 128
00048
00049 #ifdef UIP_NEIGHBOR_CONF_ENTRIES
00050 #define ENTRIES UIP_NEIGHBOR_CONF_ENTRIES
00051 #else /* UIP_NEIGHBOR_CONF_ENTRIES */
00052 #define ENTRIES 8
00053 #endif /* UIP_NEIGHBOR_CONF_ENTRIES */
00054
00055 struct neighbor_entry {
00056   uip_ipaddr_t ipaddr;
00057   struct uip_neighbor_addr addr;
00058   u8_t time;
00059 };
00060 static struct neighbor_entry entries[ENTRIES];
00061
00062 /*---------------------------------------------------------------------------*/
00063 void
00064 uip_neighbor_init(void)
00065 {
00066   int i;
00067
00068   for(i = 0; i < ENTRIES; ++i) {
00069     entries[i].time = MAX_TIME;
00070   }
00071 }
00072 /*---------------------------------------------------------------------------*/
00073 void
00074 uip_neighbor_periodic(void)
00075 {
00076   int i;
00077
00078   for(i = 0; i < ENTRIES; ++i) {
00079     if(entries[i].time < MAX_TIME) {
00080       entries[i].time++;
00081     }
00082   }
00083 }
00084 /*---------------------------------------------------------------------------*/
00085 void
00086 uip_neighbor_add(uip_ipaddr_t ipaddr, struct uip_neighbor_addr *addr)
00087 {
00088   int i, oldest;
00089   u8_t oldest_time;
00090
00091   printf("Adding neighbor with link address %02x:%02x:%02x:%02x:%02x:%02x\n",
00092          addr->addr.addr[0], addr->addr.addr[1], addr->addr.addr[2], addr->addr.addr[3],
00093          addr->addr.addr[4], addr->addr.addr[5]);
00094
00095   /* Find the first unused entry or the oldest used entry. */
00096   oldest_time = 0;
00097   oldest = 0;
00098   for(i = 0; i < ENTRIES; ++i) {
00099     if(entries[i].time == MAX_TIME) {
00100       oldest = i;
00101       break;
00102     }
00103     if(uip_ipaddr_cmp(entries[i].ipaddr, addr)) {
00104       oldest = i;
00105       break;
00106     }
00107     if(entries[i].time > oldest_time) {
00108       oldest = i;
00109       oldest_time = entries[i].time;
00110     }
00111   }
00112
00113   /* Use the oldest or first free entry (either pointed to by the
00114      "oldest" variable). */
00115   entries[oldest].time = 0;
00116   uip_ipaddr_copy(entries[oldest].ipaddr, ipaddr);
00117   memcpy(&entries[oldest].addr, addr, sizeof(struct uip_neighbor_addr));
00118 }
00119 /*---------------------------------------------------------------------------*/
00120 static struct neighbor_entry *
00121 find_entry(uip_ipaddr_t ipaddr)
00122 {
00123   int i;
00124
00125   for(i = 0; i < ENTRIES; ++i) {
00126     if(uip_ipaddr_cmp(entries[i].ipaddr, ipaddr)) {
00127       return &entries[i];
00128     }
00129   }
00130   return NULL;
00131 }
00132 /*---------------------------------------------------------------------------*/
00133 void
00134 uip_neighbor_update(uip_ipaddr_t ipaddr)
00135 {
00136   struct neighbor_entry *e;
00137
00138   e = find_entry(ipaddr);
00139   if(e != NULL) {
00140     e->time = 0;
00141   }
00142 }
00143 /*---------------------------------------------------------------------------*/
00144 struct uip_neighbor_addr *
00145 uip_neighbor_lookup(uip_ipaddr_t ipaddr)
00146 {
00147   struct neighbor_entry *e;
00148
00149   e = find_entry(ipaddr);
00150   if(e != NULL) {
00151     /*    printf("Lookup neighbor with link address %02x:%02x:%02x:%02x:%02x:%02x\n",
00152            e->addr.addr.addr[0], e->addr.addr.addr[1], e->addr.addr.addr[2], e->addr.addr.addr[3],
00153            e->addr.addr.addr[4], e->addr.addr.addr[5]);*/
00154
00155     return &e->addr;
00156   }
00157   return NULL;
00158 }
00159 /*---------------------------------------------------------------------------*/
Generated on Mon Nov 28 2011 11:14:49 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-neighbor.h
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2006, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * $Id: uip-neighbor.h,v 1.2 2006/06/12 08:00:30 adam Exp $
00032  */
00033
00042 #ifndef __UIP_NEIGHBOR_H__
00043 #define __UIP_NEIGHBOR_H__
00044
00045 #include "uip.h"
00046
00047 struct uip_neighbor_addr {
00048 #if UIP_NEIGHBOR_CONF_ADDRTYPE
00049   UIP_NEIGHBOR_CONF_ADDRTYPE addr;
00050 #else
00051   struct uip_eth_addr addr;
00052 #endif
00053 };
00054
00055 void uip_neighbor_init(void);
00056 void uip_neighbor_add(uip_ipaddr_t ipaddr, struct uip_neighbor_addr *addr);
00057 void uip_neighbor_update(uip_ipaddr_t ipaddr);
00058 struct uip_neighbor_addr *uip_neighbor_lookup(uip_ipaddr_t ipaddr);
00059 void uip_neighbor_periodic(void);
00060
00061 #endif /* __UIP-NEIGHBOR_H__ */
Generated on Mon Nov 28 2011 11:14:49 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-split.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-split.c
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: uip-split.c,v 1.2 2006/06/12 08:00:30 adam Exp $
00034  */
00035
00036 #include <string.h>
00037
00038 #include "uip-split.h"
00039 #include "uip.h"
00040 #include "uip-fw.h"
00041 #include "uip_arch.h"
00042
00043
00044
00045 #define BUF ((struct uip_tcpip_hdr *)&uip_buf[UIP_LLH_LEN])
00046
00047 /*-----------------------------------------------------------------------------*/
00048 void
00049 uip_split_output(void)
00050 {
00051   u16_t tcplen, len1, len2;
00052
00053   /* We only try to split maximum sized TCP segments. */
00054   if(BUF->proto == UIP_PROTO_TCP &&
00055      uip_len == UIP_BUFSIZE - UIP_LLH_LEN) {
00056
00057     tcplen = uip_len - UIP_TCPIP_HLEN;
00058     /* Split the segment in two. If the original packet length was
00059        odd, we make the second packet one byte larger. */
00060     len1 = len2 = tcplen / 2;
00061     if(len1 + len2 < tcplen) {
00062       ++len2;
00063     }
00064
00065     /* Create the first packet. This is done by altering the length
00066        field of the IP header and updating the checksums. */
00067     uip_len = len1 + UIP_TCPIP_HLEN;
00068 #if UIP_CONF_IPV6
00069     /* For IPv6, the IP length field does not include the IPv6 IP header
00070        length. */
00071     BUF->len[0] = ((uip_len - UIP_IPH_LEN) >> 8);
00072     BUF->len[1] = ((uip_len - UIP_IPH_LEN) & 0xff);
00073 #else /* UIP_CONF_IPV6 */
00074     BUF->len[0] = uip_len >> 8;
00075     BUF->len[1] = uip_len & 0xff;
00076 #endif /* UIP_CONF_IPV6 */
00077
00078     /* Recalculate the TCP checksum. */
00079     BUF->tcpchksum = 0;
00080     BUF->tcpchksum = ~(uip_tcpchksum());
00081
00082 #if !UIP_CONF_IPV6
00083     /* Recalculate the IP checksum. */
00084     BUF->ipchksum = 0;
00085     BUF->ipchksum = ~(uip_ipchksum());
00086 #endif /* UIP_CONF_IPV6 */
00087
00088     /* Transmit the first packet. */
00089     /*    uip_fw_output();*/
00090     tcpip_output();
00091
00092     /* Now, create the second packet. To do this, it is not enough to
00093        just alter the length field, but we must also update the TCP
00094        sequence number and point the uip_appdata to a new place in
00095        memory. This place is detemined by the length of the first
00096        packet (len1). */
00097     uip_len = len2 + UIP_TCPIP_HLEN;
00098 #if UIP_CONF_IPV6
00099     /* For IPv6, the IP length field does not include the IPv6 IP header
00100        length. */
00101     BUF->len[0] = ((uip_len - UIP_IPH_LEN) >> 8);
00102     BUF->len[1] = ((uip_len - UIP_IPH_LEN) & 0xff);
00103 #else /* UIP_CONF_IPV6 */
00104     BUF->len[0] = uip_len >> 8;
00105     BUF->len[1] = uip_len & 0xff;
00106 #endif /* UIP_CONF_IPV6 */
00107
00108     /*    uip_appdata += len1;*/
00109     memcpy(uip_appdata, (u8_t *)uip_appdata + len1, len2);
00110
00111     uip_add32(BUF->seqno, len1);
00112     BUF->seqno[0] = uip_acc32[0];
00113     BUF->seqno[1] = uip_acc32[1];
00114     BUF->seqno[2] = uip_acc32[2];
00115     BUF->seqno[3] = uip_acc32[3];
00116
00117     /* Recalculate the TCP checksum. */
00118     BUF->tcpchksum = 0;
00119     BUF->tcpchksum = ~(uip_tcpchksum());
00120
00121 #if !UIP_CONF_IPV6
00122     /* Recalculate the IP checksum. */
00123     BUF->ipchksum = 0;
00124     BUF->ipchksum = ~(uip_ipchksum());
00125 #endif /* UIP_CONF_IPV6 */
00126
00127     /* Transmit the second packet. */
00128     /*    uip_fw_output();*/
00129     tcpip_output();
00130   } else {
00131     /*    uip_fw_output();*/
00132     tcpip_output();
00133   }
00134
00135 }
00136 /*-----------------------------------------------------------------------------*/
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-split.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip-split.h
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004, Swedish Institute of Computer Science.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the uIP TCP/IP stack
00030  *
00031  * Author: Adam Dunkels <adam@sics.se>
00032  *
00033  * $Id: uip-split.h,v 1.2 2006/06/12 08:00:30 adam Exp $
00034  */
00072 #ifndef __UIP_SPLIT_H__
00073 #define __UIP_SPLIT_H__
00074
00091 void uip_split_output(void);
00092
00093 #endif /* __UIP_SPLIT_H__ */
00094
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.c
Go to the documentation of this file.
00001 #define DEBUG_PRINTF(...) /*printf(__VA_ARGS__)*/
00002
00027 /*
00028  * Copyright (c) 2001-2003, Adam Dunkels.
00029  * All rights reserved.
00030  *
00031  * Redistribution and use in source and binary forms, with or without
00032  * modification, are permitted provided that the following conditions
00033  * are met:
00034  * 1. Redistributions of source code must retain the above copyright
00035  *    notice, this list of conditions and the following disclaimer.
00036  * 2. Redistributions in binary form must reproduce the above copyright
00037  *    notice, this list of conditions and the following disclaimer in the
00038  *    documentation and/or other materials provided with the distribution.
00039  * 3. The name of the author may not be used to endorse or promote
00040  *    products derived from this software without specific prior
00041  *    written permission.
00042  *
00043  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00044  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00045  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00046  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00047  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00048  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00049  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00050  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00051  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00052  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00053  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00054  *
00055  * This file is part of the uIP TCP/IP stack.
00056  *
00057  * $Id: uip.c,v 1.65 2006/06/11 21:46:39 adam Exp $
00058  *
00059  */
00060
00061 /*
00062  * uIP is a small implementation of the IP, UDP and TCP protocols (as
00063  * well as some basic ICMP stuff). The implementation couples the IP,
00064  * UDP, TCP and the application layers very tightly. To keep the size
00065  * of the compiled code down, this code frequently uses the goto
00066  * statement. While it would be possible to break the uip_process()
00067  * function into many smaller functions, this would increase the code
00068  * size because of the overhead of parameter passing and the fact that
00069  * the optimier would not be as efficient.
00070  *
00071  * The principle is that we have a small buffer, called the uip_buf,
00072  * in which the device driver puts an incoming packet. The TCP/IP
00073  * stack parses the headers in the packet, and calls the
00074  * application. If the remote host has sent data to the application,
00075  * this data is present in the uip_buf and the application read the
00076  * data from there. It is up to the application to put this data into
00077  * a byte stream if needed. The application will not be fed with data
00078  * that is out of sequence.
00079  *
00080  * If the application whishes to send data to the peer, it should put
00081  * its data into the uip_buf. The uip_appdata pointer points to the
00082  * first available byte. The TCP/IP stack will calculate the
00083  * checksums, and fill in the necessary header fields and finally send
00084  * the packet back to the peer.
00085 */
00086
00087 #include "uip.h"
00088 #include "uipopt.h"
00089 #include "uip_arch.h"
00090
00091 #if UIP_CONF_IPV6
00092 #include "uip-neighbor.h"
00093 #endif /* UIP_CONF_IPV6 */
00094
00095 #include <string.h>
00096
00097 /*---------------------------------------------------------------------------*/
00098 /* Variable definitions. */
00099
00100
00101 /* The IP address of this host. If it is defined to be fixed (by
00102    setting UIP_FIXEDADDR to 1 in uipopt.h), the address is set
00103    here. Otherwise, the address */
00104 #if UIP_FIXEDADDR > 0
00105 const uip_ipaddr_t uip_hostaddr =
00106   {HTONS((UIP_IPADDR0 << 8) | UIP_IPADDR1),
00107    HTONS((UIP_IPADDR2 << 8) | UIP_IPADDR3)};
00108 const uip_ipaddr_t uip_draddr =
00109   {HTONS((UIP_DRIPADDR0 << 8) | UIP_DRIPADDR1),
00110    HTONS((UIP_DRIPADDR2 << 8) | UIP_DRIPADDR3)};
00111 const uip_ipaddr_t uip_netmask =
00112   {HTONS((UIP_NETMASK0 << 8) | UIP_NETMASK1),
00113    HTONS((UIP_NETMASK2 << 8) | UIP_NETMASK3)};
00114 #else
00115 uip_ipaddr_t uip_hostaddr, uip_draddr, uip_netmask;
00116 #endif /* UIP_FIXEDADDR */
00117
00118 static const uip_ipaddr_t all_ones_addr =
00119 #if UIP_CONF_IPV6
00120   {0xffff,0xffff,0xffff,0xffff,0xffff,0xffff,0xffff,0xffff};
00121 #else /* UIP_CONF_IPV6 */
00122   {0xffff,0xffff};
00123 #endif /* UIP_CONF_IPV6 */
00124 static const uip_ipaddr_t all_zeroes_addr =
00125 #if UIP_CONF_IPV6
00126   {0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000};
00127 #else /* UIP_CONF_IPV6 */
00128   {0x0000,0x0000};
00129 #endif /* UIP_CONF_IPV6 */
00130
00131 #if UIP_FIXEDETHADDR
00132 const struct uip_eth_addr uip_ethaddr = {{UIP_ETHADDR0,
00133                                           UIP_ETHADDR1,
00134                                           UIP_ETHADDR2,
00135                                           UIP_ETHADDR3,
00136                                           UIP_ETHADDR4,
00137                                           UIP_ETHADDR5}};
00138 #else
00139 struct uip_eth_addr uip_ethaddr = {{0,0,0,0,0,0}};
00140 #endif
00141
00142 #ifndef UIP_CONF_EXTERNAL_BUFFER
00143
00144 #if defined ( __CC_ARM   )
00145         u8_t __align(4) uip_buf[UIP_BUFSIZE + 2]; /* The packet buffer that contains incoming packets. */
00146 #elif defined ( __ICCARM__ )
00147         #pragma data_alignment=4
00148         u8_t uip_buf[UIP_BUFSIZE + 2]; /* The packet buffer that contains incoming packets. */
00149 #elif defined   (  __GNUC__  )
00150         u8_t __attribute__ ((aligned (4))) uip_buf[UIP_BUFSIZE + 2]; /* The packet buffer that contains incoming packets. */
00151 #endif
00152
00153 /*ALIGN_STRUCT_END*/
00154
00155 #endif /* UIP_CONF_EXTERNAL_BUFFER */
00156
00157 void *uip_appdata;               /* The uip_appdata pointer points to
00158                                     application data. */
00159 void *uip_sappdata;              /* The uip_appdata pointer points to
00160                                     the application data which is to
00161                                     be sent. */
00162 #if UIP_URGDATA > 0
00163 void *uip_urgdata;               /* The uip_urgdata pointer points to
00164                                     urgent data (out-of-band data), if
00165                                     present. */
00166 u16_t uip_urglen, uip_surglen;
00167 #endif /* UIP_URGDATA > 0 */
00168
00169 u16_t uip_len, uip_slen;
00170                              /* The uip_len is either 8 or 16 bits,
00171                                 depending on the maximum packet
00172                                 size. */
00173
00174 u8_t uip_flags;     /* The uip_flags variable is used for
00175                                 communication between the TCP/IP stack
00176                                 and the application program. */
00177 struct uip_conn *uip_conn;   /* uip_conn always points to the current
00178                                 connection. */
00179
00180 struct uip_conn uip_conns[UIP_CONNS];
00181                              /* The uip_conns array holds all TCP
00182                                 connections. */
00183 u16_t uip_listenports[UIP_LISTENPORTS];
00184                              /* The uip_listenports list all currently
00185                                 listning ports. */
00186 #if UIP_UDP
00187 struct uip_udp_conn *uip_udp_conn;
00188 struct uip_udp_conn uip_udp_conns[UIP_UDP_CONNS];
00189 #endif /* UIP_UDP */
00190
00191 static u16_t ipid;           /* Ths ipid variable is an increasing
00192                                 number that is used for the IP ID
00193                                 field. */
00194
00195 void uip_setipid(u16_t id) { ipid = id; }
00196
00197 static u8_t iss[4];          /* The iss variable is used for the TCP
00198                                 initial sequence number. */
00199
00200 #if UIP_ACTIVE_OPEN
00201 static u16_t lastport;       /* Keeps track of the last port used for
00202                                 a new connection. */
00203 #endif /* UIP_ACTIVE_OPEN */
00204
00205 /* Temporary variables. */
00206 u8_t uip_acc32[4];
00207 static u8_t c, opt;
00208 static u16_t tmp16;
00209
00210 /* Structures and definitions. */
00211 #define TCP_FIN 0x01
00212 #define TCP_SYN 0x02
00213 #define TCP_RST 0x04
00214 #define TCP_PSH 0x08
00215 #define TCP_ACK 0x10
00216 #define TCP_URG 0x20
00217 #define TCP_CTL 0x3f
00218
00219 #define TCP_OPT_END     0   /* End of TCP options list */
00220 #define TCP_OPT_NOOP    1   /* "No-operation" TCP option */
00221 #define TCP_OPT_MSS     2   /* Maximum segment size TCP option */
00222
00223 #define TCP_OPT_MSS_LEN 4   /* Length of TCP MSS option. */
00224
00225 #define ICMP_ECHO_REPLY 0
00226 #define ICMP_ECHO       8
00227
00228 #define ICMP6_ECHO_REPLY             129
00229 #define ICMP6_ECHO                   128
00230 #define ICMP6_NEIGHBOR_SOLICITATION  135
00231 #define ICMP6_NEIGHBOR_ADVERTISEMENT 136
00232
00233 #define ICMP6_FLAG_S (1 << 6)
00234
00235 #define ICMP6_OPTION_SOURCE_LINK_ADDRESS 1
00236 #define ICMP6_OPTION_TARGET_LINK_ADDRESS 2
00237
00238
00239 /* Macros. */
00240 #define BUF ((struct uip_tcpip_hdr *)&uip_buf[UIP_LLH_LEN])
00241 #define FBUF ((struct uip_tcpip_hdr *)&uip_reassbuf[0])
00242 #define ICMPBUF ((struct uip_icmpip_hdr *)&uip_buf[UIP_LLH_LEN])
00243 #define UDPBUF ((struct uip_udpip_hdr *)&uip_buf[UIP_LLH_LEN])
00244
00245
00246 #if UIP_STATISTICS == 1
00247 struct uip_stats uip_stat;
00248 #define UIP_STAT(s) s
00249 #else
00250 #define UIP_STAT(s)
00251 #endif /* UIP_STATISTICS == 1 */
00252
00253 #if UIP_LOGGING == 1
00254 #include <stdio.h>
00255 void uip_log(char *msg);
00256 #define UIP_LOG(m) uip_log(m)
00257 #else
00258 #define UIP_LOG(m)
00259 #endif /* UIP_LOGGING == 1 */
00260
00261 #if ! UIP_ARCH_ADD32
00262 void
00263 uip_add32(u8_t *op32, u16_t op16)
00264 {
00265   uip_acc32[3] = op32[3] + (op16 & 0xff);
00266   uip_acc32[2] = op32[2] + (op16 >> 8);
00267   uip_acc32[1] = op32[1];
00268   uip_acc32[0] = op32[0];
00269
00270   if(uip_acc32[2] < (op16 >> 8)) {
00271     ++uip_acc32[1];
00272     if(uip_acc32[1] == 0) {
00273       ++uip_acc32[0];
00274     }
00275   }
00276
00277
00278   if(uip_acc32[3] < (op16 & 0xff)) {
00279     ++uip_acc32[2];
00280     if(uip_acc32[2] == 0) {
00281       ++uip_acc32[1];
00282       if(uip_acc32[1] == 0) {
00283         ++uip_acc32[0];
00284       }
00285     }
00286   }
00287 }
00288
00289 #endif /* UIP_ARCH_ADD32 */
00290
00291 #if ! UIP_ARCH_CHKSUM
00292 /*---------------------------------------------------------------------------*/
00293 static u16_t
00294 chksum(u16_t sum, const u8_t *data, u16_t len)
00295 {
00296   u16_t t;
00297   const u8_t *dataptr;
00298   const u8_t *last_byte;
00299
00300   dataptr = data;
00301   last_byte = data + len - 1;
00302
00303   while(dataptr < last_byte) {  /* At least two more bytes */
00304     t = (dataptr[0] << 8) + dataptr[1];
00305     sum += t;
00306     if(sum < t) {
00307       sum++;            /* carry */
00308     }
00309     dataptr += 2;
00310   }
00311
00312   if(dataptr == last_byte) {
00313     t = (dataptr[0] << 8) + 0;
00314     sum += t;
00315     if(sum < t) {
00316       sum++;            /* carry */
00317     }
00318   }
00319
00320   /* Return sum in host byte order. */
00321   return sum;
00322 }
00323 /*---------------------------------------------------------------------------*/
00324 u16_t
00325 uip_chksum(u16_t *data, u16_t len)
00326 {
00327   return htons(chksum(0, (u8_t *)data, len));
00328 }
00329 /*---------------------------------------------------------------------------*/
00330 #ifndef UIP_ARCH_IPCHKSUM
00331 u16_t
00332 uip_ipchksum(void)
00333 {
00334   u16_t sum;
00335
00336   sum = chksum(0, &uip_buf[UIP_LLH_LEN], UIP_IPH_LEN);
00337   DEBUG_PRINTF("uip_ipchksum: sum 0x%04x\n", sum);
00338   return (sum == 0) ? 0xffff : htons(sum);
00339 }
00340 #endif
00341 /*---------------------------------------------------------------------------*/
00342 static u16_t
00343 upper_layer_chksum(u8_t proto)
00344 {
00345   u16_t upper_layer_len;
00346   u16_t sum;
00347
00348 #if UIP_CONF_IPV6
00349   upper_layer_len = (((u16_t)(BUF->len[0]) << 8) + BUF->len[1]);
00350 #else /* UIP_CONF_IPV6 */
00351   upper_layer_len = (((u16_t)(BUF->len[0]) << 8) + BUF->len[1]) - UIP_IPH_LEN;
00352 #endif /* UIP_CONF_IPV6 */
00353
00354   /* First sum pseudoheader. */
00355
00356   /* IP protocol and length fields. This addition cannot carry. */
00357   sum = upper_layer_len + proto;
00358   /* Sum IP source and destination addresses. */
00359   sum = chksum(sum, (u8_t *)&BUF->srcipaddr[0], 2 * sizeof(uip_ipaddr_t));
00360
00361   /* Sum TCP header and data. */
00362   sum = chksum(sum, &uip_buf[UIP_IPH_LEN + UIP_LLH_LEN],
00363                upper_layer_len);
00364
00365   return (sum == 0) ? 0xffff : htons(sum);
00366 }
00367 /*---------------------------------------------------------------------------*/
00368 #if UIP_CONF_IPV6
00369 u16_t
00370 uip_icmp6chksum(void)
00371 {
00372   return upper_layer_chksum(UIP_PROTO_ICMP6);
00373
00374 }
00375 #endif /* UIP_CONF_IPV6 */
00376 /*---------------------------------------------------------------------------*/
00377 u16_t
00378 uip_tcpchksum(void)
00379 {
00380   return upper_layer_chksum(UIP_PROTO_TCP);
00381 }
00382 /*---------------------------------------------------------------------------*/
00383 #if UIP_UDP_CHECKSUMS
00384 u16_t
00385 uip_udpchksum(void)
00386 {
00387   return upper_layer_chksum(UIP_PROTO_UDP);
00388 }
00389 #endif /* UIP_UDP_CHECKSUMS */
00390 #endif /* UIP_ARCH_CHKSUM */
00391 /*---------------------------------------------------------------------------*/
00392 void
00393 uip_init(void)
00394 {
00395   for(c = 0; c < UIP_LISTENPORTS; ++c) {
00396     uip_listenports[c] = 0;
00397   }
00398   for(c = 0; c < UIP_CONNS; ++c) {
00399     uip_conns[c].tcpstateflags = UIP_CLOSED;
00400   }
00401 #if UIP_ACTIVE_OPEN
00402   lastport = 1024;
00403 #endif /* UIP_ACTIVE_OPEN */
00404
00405 #if UIP_UDP
00406   for(c = 0; c < UIP_UDP_CONNS; ++c) {
00407     uip_udp_conns[c].lport = 0;
00408   }
00409 #endif /* UIP_UDP */
00410
00411
00412   /* IPv4 initialization. */
00413 #if UIP_FIXEDADDR == 0
00414   /*  uip_hostaddr[0] = uip_hostaddr[1] = 0;*/
00415 #endif /* UIP_FIXEDADDR */
00416
00417 }
00418 /*---------------------------------------------------------------------------*/
00419 #if UIP_ACTIVE_OPEN
00420 struct uip_conn *
00421 uip_connect(uip_ipaddr_t *ripaddr, u16_t rport)
00422 {
00423   register struct uip_conn *conn, *cconn;
00424
00425   /* Find an unused local port. */
00426  again:
00427   ++lastport;
00428
00429   if(lastport >= 32000) {
00430     lastport = 4096;
00431   }
00432
00433   /* Check if this port is already in use, and if so try to find
00434      another one. */
00435   for(c = 0; c < UIP_CONNS; ++c) {
00436     conn = &uip_conns[c];
00437     if(conn->tcpstateflags != UIP_CLOSED &&
00438        conn->lport == htons(lastport)) {
00439       goto again;
00440     }
00441   }
00442
00443   conn = 0;
00444   for(c = 0; c < UIP_CONNS; ++c) {
00445     cconn = &uip_conns[c];
00446     if(cconn->tcpstateflags == UIP_CLOSED) {
00447       conn = cconn;
00448       break;
00449     }
00450     if(cconn->tcpstateflags == UIP_TIME_WAIT) {
00451       if(conn == 0 ||
00452          cconn->timer > conn->timer) {
00453         conn = cconn;
00454       }
00455     }
00456   }
00457
00458   if(conn == 0) {
00459     return 0;
00460   }
00461
00462   conn->tcpstateflags = UIP_SYN_SENT;
00463
00464   conn->snd_nxt[0] = iss[0];
00465   conn->snd_nxt[1] = iss[1];
00466   conn->snd_nxt[2] = iss[2];
00467   conn->snd_nxt[3] = iss[3];
00468
00469   conn->initialmss = conn->mss = UIP_TCP_MSS;
00470
00471   conn->len = 1;   /* TCP length of the SYN is one. */
00472   conn->nrtx = 0;
00473   conn->timer = 1; /* Send the SYN next time around. */
00474   conn->rto = UIP_RTO;
00475   conn->sa = 0;
00476   conn->sv = 16;   /* Initial value of the RTT variance. */
00477   conn->lport = htons(lastport);
00478   conn->rport = rport;
00479   uip_ipaddr_copy(&conn->ripaddr, ripaddr);
00480
00481   return conn;
00482 }
00483 #endif /* UIP_ACTIVE_OPEN */
00484 /*---------------------------------------------------------------------------*/
00485 #if UIP_UDP
00486 struct uip_udp_conn *
00487 uip_udp_new(uip_ipaddr_t *ripaddr, u16_t rport)
00488 {
00489   register struct uip_udp_conn *conn;
00490
00491   /* Find an unused local port. */
00492  again:
00493   ++lastport;
00494
00495   if(lastport >= 32000) {
00496     lastport = 4096;
00497   }
00498
00499   for(c = 0; c < UIP_UDP_CONNS; ++c) {
00500     if(uip_udp_conns[c].lport == htons(lastport)) {
00501       goto again;
00502     }
00503   }
00504
00505
00506   conn = 0;
00507   for(c = 0; c < UIP_UDP_CONNS; ++c) {
00508     if(uip_udp_conns[c].lport == 0) {
00509       conn = &uip_udp_conns[c];
00510       break;
00511     }
00512   }
00513
00514   if(conn == 0) {
00515     return 0;
00516   }
00517
00518   conn->lport = HTONS(lastport);
00519   conn->rport = rport;
00520   if(ripaddr == NULL) {
00521     memset(conn->ripaddr, 0, sizeof(uip_ipaddr_t));
00522   } else {
00523     uip_ipaddr_copy(&conn->ripaddr, ripaddr);
00524   }
00525   conn->ttl = UIP_TTL;
00526
00527   return conn;
00528 }
00529 #endif /* UIP_UDP */
00530 /*---------------------------------------------------------------------------*/
00531 void
00532 uip_unlisten(u16_t port)
00533 {
00534   for(c = 0; c < UIP_LISTENPORTS; ++c) {
00535     if(uip_listenports[c] == port) {
00536       uip_listenports[c] = 0;
00537       return;
00538     }
00539   }
00540 }
00541 /*---------------------------------------------------------------------------*/
00542 void
00543 uip_listen(u16_t port)
00544 {
00545   for(c = 0; c < UIP_LISTENPORTS; ++c) {
00546     if(uip_listenports[c] == 0) {
00547       uip_listenports[c] = port;
00548       return;
00549     }
00550   }
00551 }
00552 /*---------------------------------------------------------------------------*/
00553 /* XXX: IP fragment reassembly: not well-tested. */
00554
00555 #if UIP_REASSEMBLY && !UIP_CONF_IPV6
00556 #define UIP_REASS_BUFSIZE (UIP_BUFSIZE - UIP_LLH_LEN)
00557 static u8_t uip_reassbuf[UIP_REASS_BUFSIZE];
00558 static u8_t uip_reassbitmap[UIP_REASS_BUFSIZE / (8 * 8)];
00559 static const u8_t bitmap_bits[8] = {0xff, 0x7f, 0x3f, 0x1f,
00560                                     0x0f, 0x07, 0x03, 0x01};
00561 static u16_t uip_reasslen;
00562 static u8_t uip_reassflags;
00563 #define UIP_REASS_FLAG_LASTFRAG 0x01
00564 static u8_t uip_reasstmr;
00565
00566 #define IP_MF   0x20
00567
00568 static u8_t
00569 uip_reass(void)
00570 {
00571   u16_t offset, len;
00572   u16_t i;
00573
00574   /* If ip_reasstmr is zero, no packet is present in the buffer, so we
00575      write the IP header of the fragment into the reassembly
00576      buffer. The timer is updated with the maximum age. */
00577   if(uip_reasstmr == 0) {
00578     memcpy(uip_reassbuf, &BUF->vhl, UIP_IPH_LEN);
00579     uip_reasstmr = UIP_REASS_MAXAGE;
00580     uip_reassflags = 0;
00581     /* Clear the bitmap. */
00582     memset(uip_reassbitmap, 0, sizeof(uip_reassbitmap));
00583   }
00584
00585   /* Check if the incoming fragment matches the one currently present
00586      in the reasembly buffer. If so, we proceed with copying the
00587      fragment into the buffer. */
00588   if(BUF->srcipaddr[0] == FBUF->srcipaddr[0] &&
00589      BUF->srcipaddr[1] == FBUF->srcipaddr[1] &&
00590      BUF->destipaddr[0] == FBUF->destipaddr[0] &&
00591      BUF->destipaddr[1] == FBUF->destipaddr[1] &&
00592      BUF->ipid[0] == FBUF->ipid[0] &&
00593      BUF->ipid[1] == FBUF->ipid[1]) {
00594
00595     len = (BUF->len[0] << 8) + BUF->len[1] - (BUF->vhl & 0x0f) * 4;
00596     offset = (((BUF->ipoffset[0] & 0x3f) << 8) + BUF->ipoffset[1]) * 8;
00597
00598     /* If the offset or the offset + fragment length overflows the
00599        reassembly buffer, we discard the entire packet. */
00600     if(offset > UIP_REASS_BUFSIZE ||
00601        offset + len > UIP_REASS_BUFSIZE) {
00602       uip_reasstmr = 0;
00603       goto nullreturn;
00604     }
00605
00606     /* Copy the fragment into the reassembly buffer, at the right
00607        offset. */
00608     memcpy(&uip_reassbuf[UIP_IPH_LEN + offset],
00609            (char *)BUF + (int)((BUF->vhl & 0x0f) * 4),
00610            len);
00611
00612     /* Update the bitmap. */
00613     if(offset / (8 * 8) == (offset + len) / (8 * 8)) {
00614       /* If the two endpoints are in the same byte, we only update
00615          that byte. */
00616
00617       uip_reassbitmap[offset / (8 * 8)] |=
00618              bitmap_bits[(offset / 8 ) & 7] &
00619              ~bitmap_bits[((offset + len) / 8 ) & 7];
00620     } else {
00621       /* If the two endpoints are in different bytes, we update the
00622          bytes in the endpoints and fill the stuff inbetween with
00623          0xff. */
00624       uip_reassbitmap[offset / (8 * 8)] |=
00625         bitmap_bits[(offset / 8 ) & 7];
00626       for(i = 1 + offset / (8 * 8); i < (offset + len) / (8 * 8); ++i) {
00627         uip_reassbitmap[i] = 0xff;
00628       }
00629       uip_reassbitmap[(offset + len) / (8 * 8)] |=
00630         ~bitmap_bits[((offset + len) / 8 ) & 7];
00631     }
00632
00633     /* If this fragment has the More Fragments flag set to zero, we
00634        know that this is the last fragment, so we can calculate the
00635        size of the entire packet. We also set the
00636        IP_REASS_FLAG_LASTFRAG flag to indicate that we have received
00637        the final fragment. */
00638
00639     if((BUF->ipoffset[0] & IP_MF) == 0) {
00640       uip_reassflags |= UIP_REASS_FLAG_LASTFRAG;
00641       uip_reasslen = offset + len;
00642     }
00643
00644     /* Finally, we check if we have a full packet in the buffer. We do
00645        this by checking if we have the last fragment and if all bits
00646        in the bitmap are set. */
00647     if(uip_reassflags & UIP_REASS_FLAG_LASTFRAG) {
00648       /* Check all bytes up to and including all but the last byte in
00649          the bitmap. */
00650       for(i = 0; i < uip_reasslen / (8 * 8) - 1; ++i) {
00651         if(uip_reassbitmap[i] != 0xff) {
00652           goto nullreturn;
00653         }
00654       }
00655       /* Check the last byte in the bitmap. It should contain just the
00656          right amount of bits. */
00657       if(uip_reassbitmap[uip_reasslen / (8 * 8)] !=
00658          (u8_t)~bitmap_bits[uip_reasslen / 8 & 7]) {
00659         goto nullreturn;
00660       }
00661
00662       /* If we have come this far, we have a full packet in the
00663          buffer, so we allocate a pbuf and copy the packet into it. We
00664          also reset the timer. */
00665       uip_reasstmr = 0;
00666       memcpy(BUF, FBUF, uip_reasslen);
00667
00668       /* Pretend to be a "normal" (i.e., not fragmented) IP packet
00669          from now on. */
00670       BUF->ipoffset[0] = BUF->ipoffset[1] = 0;
00671       BUF->len[0] = uip_reasslen >> 8;
00672       BUF->len[1] = uip_reasslen & 0xff;
00673       BUF->ipchksum = 0;
00674       BUF->ipchksum = ~(uip_ipchksum());
00675
00676       return uip_reasslen;
00677     }
00678   }
00679
00680  nullreturn:
00681   return 0;
00682 }
00683 #endif /* UIP_REASSEMBLY */
00684 /*---------------------------------------------------------------------------*/
00685 static void
00686 uip_add_rcv_nxt(u16_t n)
00687 {
00688   uip_add32(uip_conn->rcv_nxt, n);
00689   uip_conn->rcv_nxt[0] = uip_acc32[0];
00690   uip_conn->rcv_nxt[1] = uip_acc32[1];
00691   uip_conn->rcv_nxt[2] = uip_acc32[2];
00692   uip_conn->rcv_nxt[3] = uip_acc32[3];
00693 }
00694 /*---------------------------------------------------------------------------*/
00695 void
00696 uip_process(u8_t flag)
00697 {
00698   register struct uip_conn *uip_connr = uip_conn;
00699
00700 #if UIP_UDP
00701   if(flag == UIP_UDP_SEND_CONN) {
00702     goto udp_send;
00703   }
00704 #endif /* UIP_UDP */
00705
00706   uip_sappdata = uip_appdata = &uip_buf[UIP_IPTCPH_LEN + UIP_LLH_LEN];
00707
00708   /* Check if we were invoked because of a poll request for a
00709      particular connection. */
00710   if(flag == UIP_POLL_REQUEST) {
00711     if((uip_connr->tcpstateflags & UIP_TS_MASK) == UIP_ESTABLISHED &&
00712        !uip_outstanding(uip_connr)) {
00713         uip_flags = UIP_POLL;
00714         UIP_APPCALL();
00715         goto appsend;
00716     }
00717     goto drop;
00718
00719     /* Check if we were invoked because of the perodic timer fireing. */
00720   } else if(flag == UIP_TIMER) {
00721 #if UIP_REASSEMBLY
00722     if(uip_reasstmr != 0) {
00723       --uip_reasstmr;
00724     }
00725 #endif /* UIP_REASSEMBLY */
00726     /* Increase the initial sequence number. */
00727     if(++iss[3] == 0) {
00728       if(++iss[2] == 0) {
00729         if(++iss[1] == 0) {
00730           ++iss[0];
00731         }
00732       }
00733     }
00734
00735     /* Reset the length variables. */
00736     uip_len = 0;
00737     uip_slen = 0;
00738
00739     /* Check if the connection is in a state in which we simply wait
00740        for the connection to time out. If so, we increase the
00741        connection's timer and remove the connection if it times
00742        out. */
00743     if(uip_connr->tcpstateflags == UIP_TIME_WAIT ||
00744        uip_connr->tcpstateflags == UIP_FIN_WAIT_2) {
00745       ++(uip_connr->timer);
00746       if(uip_connr->timer == UIP_TIME_WAIT_TIMEOUT) {
00747         uip_connr->tcpstateflags = UIP_CLOSED;
00748       }
00749     } else if(uip_connr->tcpstateflags != UIP_CLOSED) {
00750       /* If the connection has outstanding data, we increase the
00751          connection's timer and see if it has reached the RTO value
00752          in which case we retransmit. */
00753       if(uip_outstanding(uip_connr)) {
00754           uip_connr->timer = uip_connr->timer - 1;
00755         if(uip_connr->timer == 0) {
00756           if(uip_connr->nrtx == UIP_MAXRTX ||
00757              ((uip_connr->tcpstateflags == UIP_SYN_SENT ||
00758                uip_connr->tcpstateflags == UIP_SYN_RCVD) &&
00759               uip_connr->nrtx == UIP_MAXSYNRTX)) {
00760             uip_connr->tcpstateflags = UIP_CLOSED;
00761
00762             /* We call UIP_APPCALL() with uip_flags set to
00763                UIP_TIMEDOUT to inform the application that the
00764                connection has timed out. */
00765             uip_flags = UIP_TIMEDOUT;
00766             UIP_APPCALL();
00767
00768             /* We also send a reset packet to the remote host. */
00769             BUF->flags = TCP_RST | TCP_ACK;
00770             goto tcp_send_nodata;
00771           }
00772
00773           /* Exponential backoff. */
00774           uip_connr->timer = UIP_RTO << (uip_connr->nrtx > 4?
00775                                          4:
00776                                          uip_connr->nrtx);
00777           ++(uip_connr->nrtx);
00778
00779           /* Ok, so we need to retransmit. We do this differently
00780              depending on which state we are in. In ESTABLISHED, we
00781              call upon the application so that it may prepare the
00782              data for the retransmit. In SYN_RCVD, we resend the
00783              SYNACK that we sent earlier and in LAST_ACK we have to
00784              retransmit our FINACK. */
00785           UIP_STAT(++uip_stat.tcp.rexmit);
00786           switch(uip_connr->tcpstateflags & UIP_TS_MASK) {
00787           case UIP_SYN_RCVD:
00788             /* In the SYN_RCVD state, we should retransmit our
00789                SYNACK. */
00790             goto tcp_send_synack;
00791
00792 #if UIP_ACTIVE_OPEN
00793           case UIP_SYN_SENT:
00794             /* In the SYN_SENT state, we retransmit out SYN. */
00795             BUF->flags = 0;
00796             goto tcp_send_syn;
00797 #endif /* UIP_ACTIVE_OPEN */
00798
00799           case UIP_ESTABLISHED:
00800             /* In the ESTABLISHED state, we call upon the application
00801                to do the actual retransmit after which we jump into
00802                the code for sending out the packet (the apprexmit
00803                label). */
00804             uip_flags = UIP_REXMIT;
00805             UIP_APPCALL();
00806             goto apprexmit;
00807
00808           case UIP_FIN_WAIT_1:
00809           case UIP_CLOSING:
00810           case UIP_LAST_ACK:
00811             /* In all these states we should retransmit a FINACK. */
00812             goto tcp_send_finack;
00813
00814           }
00815         }
00816       } else if((uip_connr->tcpstateflags & UIP_TS_MASK) == UIP_ESTABLISHED) {
00817         /* If there was no need for a retransmission, we poll the
00818            application for new data. */
00819         uip_flags = UIP_POLL;
00820         UIP_APPCALL();
00821         goto appsend;
00822       }
00823     }
00824     goto drop;
00825   }
00826 #if UIP_UDP
00827   if(flag == UIP_UDP_TIMER) {
00828     if(uip_udp_conn->lport != 0) {
00829       uip_conn = NULL;
00830       uip_sappdata = uip_appdata = &uip_buf[UIP_LLH_LEN + UIP_IPUDPH_LEN];
00831       uip_len = uip_slen = 0;
00832       uip_flags = UIP_POLL;
00833       UIP_UDP_APPCALL();
00834       goto udp_send;
00835     } else {
00836       goto drop;
00837     }
00838   }
00839 #endif
00840
00841   /* This is where the input processing starts. */
00842   UIP_STAT(++uip_stat.ip.recv);
00843
00844   /* Start of IP input header processing code. */
00845
00846 #if UIP_CONF_IPV6
00847   /* Check validity of the IP header. */
00848   if((BUF->vtc & 0xf0) != 0x60)  { /* IP version and header length. */
00849     UIP_STAT(++uip_stat.ip.drop);
00850     UIP_STAT(++uip_stat.ip.vhlerr);
00851     UIP_LOG("ipv6: invalid version.");
00852     goto drop;
00853   }
00854 #else /* UIP_CONF_IPV6 */
00855   /* Check validity of the IP header. */
00856   if(BUF->vhl != 0x45)  { /* IP version and header length. */
00857     UIP_STAT(++uip_stat.ip.drop);
00858     UIP_STAT(++uip_stat.ip.vhlerr);
00859     UIP_LOG("ip: invalid version or header length.");
00860     goto drop;
00861   }
00862 #endif /* UIP_CONF_IPV6 */
00863
00864   /* Check the size of the packet. If the size reported to us in
00865      uip_len is smaller the size reported in the IP header, we assume
00866      that the packet has been corrupted in transit. If the size of
00867      uip_len is larger than the size reported in the IP packet header,
00868      the packet has been padded and we set uip_len to the correct
00869      value.. */
00870
00871   if((BUF->len[0] << 8) + BUF->len[1] <= uip_len) {
00872     uip_len = (BUF->len[0] << 8) + BUF->len[1];
00873 #if UIP_CONF_IPV6
00874     uip_len += 40; /* The length reported in the IPv6 header is the
00875                       length of the payload that follows the
00876                       header. However, uIP uses the uip_len variable
00877                       for holding the size of the entire packet,
00878                       including the IP header. For IPv4 this is not a
00879                       problem as the length field in the IPv4 header
00880                       contains the length of the entire packet. But
00881                       for IPv6 we need to add the size of the IPv6
00882                       header (40 bytes). */
00883 #endif /* UIP_CONF_IPV6 */
00884   } else {
00885     UIP_LOG("ip: packet shorter than reported in IP header.");
00886     goto drop;
00887   }
00888
00889 #if !UIP_CONF_IPV6
00890   /* Check the fragment flag. */
00891   if((BUF->ipoffset[0] & 0x3f) != 0 ||
00892      BUF->ipoffset[1] != 0) {
00893 #if UIP_REASSEMBLY
00894     uip_len = uip_reass();
00895     if(uip_len == 0) {
00896       goto drop;
00897     }
00898 #else /* UIP_REASSEMBLY */
00899     UIP_STAT(++uip_stat.ip.drop);
00900     UIP_STAT(++uip_stat.ip.fragerr);
00901     UIP_LOG("ip: fragment dropped.");
00902     goto drop;
00903 #endif /* UIP_REASSEMBLY */
00904   }
00905 #endif /* UIP_CONF_IPV6 */
00906
00907   if(uip_ipaddr_cmp(uip_hostaddr, all_zeroes_addr)) {
00908     /* If we are configured to use ping IP address configuration and
00909        hasn't been assigned an IP address yet, we accept all ICMP
00910        packets. */
00911 #if UIP_PINGADDRCONF && !UIP_CONF_IPV6
00912     if(BUF->proto == UIP_PROTO_ICMP) {
00913       UIP_LOG("ip: possible ping config packet received.");
00914       goto icmp_input;
00915     } else {
00916       UIP_LOG("ip: packet dropped since no address assigned.");
00917       goto drop;
00918     }
00919 #endif /* UIP_PINGADDRCONF */
00920
00921   } else {
00922     /* If IP broadcast support is configured, we check for a broadcast
00923        UDP packet, which may be destined to us. */
00924 #if UIP_BROADCAST
00925     DEBUG_PRINTF("UDP IP checksum 0x%04x\n", uip_ipchksum());
00926     if(BUF->proto == UIP_PROTO_UDP &&
00927        uip_ipaddr_cmp(BUF->destipaddr, all_ones_addr)
00928        /*&&
00929          uip_ipchksum() == 0xffff*/) {
00930       goto udp_input;
00931     }
00932 #endif /* UIP_BROADCAST */
00933
00934     /* Check if the packet is destined for our IP address. */
00935 #if !UIP_CONF_IPV6
00936     if(!uip_ipaddr_cmp(BUF->destipaddr, uip_hostaddr)) {
00937       UIP_STAT(++uip_stat.ip.drop);
00938       goto drop;
00939     }
00940 #else /* UIP_CONF_IPV6 */
00941     /* For IPv6, packet reception is a little trickier as we need to
00942        make sure that we listen to certain multicast addresses (all
00943        hosts multicast address, and the solicited-node multicast
00944        address) as well. However, we will cheat here and accept all
00945        multicast packets that are sent to the ff02::/16 addresses. */
00946     if(!uip_ipaddr_cmp(BUF->destipaddr, uip_hostaddr) &&
00947        BUF->destipaddr[0] != HTONS(0xff02)) {
00948       UIP_STAT(++uip_stat.ip.drop);
00949       goto drop;
00950     }
00951 #endif /* UIP_CONF_IPV6 */
00952   }
00953
00954 #if !UIP_CONF_IPV6
00955   if(uip_ipchksum() != 0xffff) { /* Compute and check the IP header
00956                                     checksum. */
00957     UIP_STAT(++uip_stat.ip.drop);
00958     UIP_STAT(++uip_stat.ip.chkerr);
00959     UIP_LOG("ip: bad checksum.");
00960     goto drop;
00961   }
00962 #endif /* UIP_CONF_IPV6 */
00963
00964   if(BUF->proto == UIP_PROTO_TCP) { /* Check for TCP packet. If so,
00965                                        proceed with TCP input
00966                                        processing. */
00967     goto tcp_input;
00968   }
00969
00970 #if UIP_UDP
00971   if(BUF->proto == UIP_PROTO_UDP) {
00972     goto udp_input;
00973   }
00974 #endif /* UIP_UDP */
00975
00976 #if !UIP_CONF_IPV6
00977   /* ICMPv4 processing code follows. */
00978   if(BUF->proto != UIP_PROTO_ICMP) { /* We only allow ICMP packets from
00979                                         here. */
00980     UIP_STAT(++uip_stat.ip.drop);
00981     UIP_STAT(++uip_stat.ip.protoerr);
00982     UIP_LOG("ip: neither tcp nor icmp.");
00983     goto drop;
00984   }
00985
00986 #if UIP_PINGADDRCONF
00987  icmp_input:
00988 #endif /* UIP_PINGADDRCONF */
00989   UIP_STAT(++uip_stat.icmp.recv);
00990
00991   /* ICMP echo (i.e., ping) processing. This is simple, we only change
00992      the ICMP type from ECHO to ECHO_REPLY and adjust the ICMP
00993      checksum before we return the packet. */
00994   if(ICMPBUF->type != ICMP_ECHO) {
00995     UIP_STAT(++uip_stat.icmp.drop);
00996     UIP_STAT(++uip_stat.icmp.typeerr);
00997     UIP_LOG("icmp: not icmp echo.");
00998     goto drop;
00999   }
01000
01001   /* If we are configured to use ping IP address assignment, we use
01002      the destination IP address of this ping packet and assign it to
01003      ourself. */
01004 #if UIP_PINGADDRCONF
01005   if((uip_hostaddr[0] | uip_hostaddr[1]) == 0) {
01006     uip_hostaddr[0] = BUF->destipaddr[0];
01007     uip_hostaddr[1] = BUF->destipaddr[1];
01008   }
01009 #endif /* UIP_PINGADDRCONF */
01010
01011   ICMPBUF->type = ICMP_ECHO_REPLY;
01012
01013   if(ICMPBUF->icmpchksum >= HTONS(0xffff - (ICMP_ECHO << 8))) {
01014     ICMPBUF->icmpchksum += HTONS(ICMP_ECHO << 8) + 1;
01015   } else {
01016     ICMPBUF->icmpchksum += HTONS(ICMP_ECHO << 8);
01017   }
01018
01019   /* Swap IP addresses. */
01020   uip_ipaddr_copy(BUF->destipaddr, BUF->srcipaddr);
01021   uip_ipaddr_copy(BUF->srcipaddr, uip_hostaddr);
01022
01023   UIP_STAT(++uip_stat.icmp.sent);
01024   goto send;
01025
01026   /* End of IPv4 input header processing code. */
01027 #else /* !UIP_CONF_IPV6 */
01028
01029   /* This is IPv6 ICMPv6 processing code. */
01030   DEBUG_PRINTF("icmp6_input: length %d\n", uip_len);
01031
01032   if(BUF->proto != UIP_PROTO_ICMP6) { /* We only allow ICMPv6 packets from
01033                                          here. */
01034     UIP_STAT(++uip_stat.ip.drop);
01035     UIP_STAT(++uip_stat.ip.protoerr);
01036     UIP_LOG("ip: neither tcp nor icmp6.");
01037     goto drop;
01038   }
01039
01040   UIP_STAT(++uip_stat.icmp.recv);
01041
01042   /* If we get a neighbor solicitation for our address we should send
01043      a neighbor advertisement message back. */
01044   if(ICMPBUF->type == ICMP6_NEIGHBOR_SOLICITATION) {
01045     if(uip_ipaddr_cmp(ICMPBUF->icmp6data, uip_hostaddr)) {
01046
01047       if(ICMPBUF->options[0] == ICMP6_OPTION_SOURCE_LINK_ADDRESS) {
01048         /* Save the sender's address in our neighbor list. */
01049         uip_neighbor_add(ICMPBUF->srcipaddr, &(ICMPBUF->options[2]));
01050       }
01051
01052       /* We should now send a neighbor advertisement back to where the
01053          neighbor solicication came from. */
01054       ICMPBUF->type = ICMP6_NEIGHBOR_ADVERTISEMENT;
01055       ICMPBUF->flags = ICMP6_FLAG_S; /* Solicited flag. */
01056
01057       ICMPBUF->reserved1 = ICMPBUF->reserved2 = ICMPBUF->reserved3 = 0;
01058
01059       uip_ipaddr_copy(ICMPBUF->destipaddr, ICMPBUF->srcipaddr);
01060       uip_ipaddr_copy(ICMPBUF->srcipaddr, uip_hostaddr);
01061       ICMPBUF->options[0] = ICMP6_OPTION_TARGET_LINK_ADDRESS;
01062       ICMPBUF->options[1] = 1;  /* Options length, 1 = 8 bytes. */
01063       memcpy(&(ICMPBUF->options[2]), &uip_ethaddr, sizeof(uip_ethaddr));
01064       ICMPBUF->icmpchksum = 0;
01065       ICMPBUF->icmpchksum = ~uip_icmp6chksum();
01066       goto send;
01067
01068     }
01069     goto drop;
01070   } else if(ICMPBUF->type == ICMP6_ECHO) {
01071     /* ICMP echo (i.e., ping) processing. This is simple, we only
01072        change the ICMP type from ECHO to ECHO_REPLY and update the
01073        ICMP checksum before we return the packet. */
01074
01075     ICMPBUF->type = ICMP6_ECHO_REPLY;
01076
01077     uip_ipaddr_copy(BUF->destipaddr, BUF->srcipaddr);
01078     uip_ipaddr_copy(BUF->srcipaddr, uip_hostaddr);
01079     ICMPBUF->icmpchksum = 0;
01080     ICMPBUF->icmpchksum = ~uip_icmp6chksum();
01081
01082     UIP_STAT(++uip_stat.icmp.sent);
01083     goto send;
01084   } else {
01085     DEBUG_PRINTF("Unknown icmp6 message type %d\n", ICMPBUF->type);
01086     UIP_STAT(++uip_stat.icmp.drop);
01087     UIP_STAT(++uip_stat.icmp.typeerr);
01088     UIP_LOG("icmp: unknown ICMP message.");
01089     goto drop;
01090   }
01091
01092   /* End of IPv6 ICMP processing. */
01093
01094 #endif /* !UIP_CONF_IPV6 */
01095
01096 #if UIP_UDP
01097   /* UDP input processing. */
01098  udp_input:
01099   /* UDP processing is really just a hack. We don't do anything to the
01100      UDP/IP headers, but let the UDP application do all the hard
01101      work. If the application sets uip_slen, it has a packet to
01102      send. */
01103 #if UIP_UDP_CHECKSUMS
01104   uip_len = uip_len - UIP_IPUDPH_LEN;
01105   uip_appdata = &uip_buf[UIP_LLH_LEN + UIP_IPUDPH_LEN];
01106   if(UDPBUF->udpchksum != 0 && uip_udpchksum() != 0xffff) {
01107     UIP_STAT(++uip_stat.udp.drop);
01108     UIP_STAT(++uip_stat.udp.chkerr);
01109     UIP_LOG("udp: bad checksum.");
01110     goto drop;
01111   }
01112 #else /* UIP_UDP_CHECKSUMS */
01113   uip_len = uip_len - UIP_IPUDPH_LEN;
01114 #endif /* UIP_UDP_CHECKSUMS */
01115
01116   /* Demultiplex this UDP packet between the UDP "connections". */
01117   for(uip_udp_conn = &uip_udp_conns[0];
01118       uip_udp_conn < &uip_udp_conns[UIP_UDP_CONNS];
01119       ++uip_udp_conn) {
01120     /* If the local UDP port is non-zero, the connection is considered
01121        to be used. If so, the local port number is checked against the
01122        destination port number in the received packet. If the two port
01123        numbers match, the remote port number is checked if the
01124        connection is bound to a remote port. Finally, if the
01125        connection is bound to a remote IP address, the source IP
01126        address of the packet is checked. */
01127     if(uip_udp_conn->lport != 0 &&
01128        UDPBUF->destport == uip_udp_conn->lport &&
01129        (uip_udp_conn->rport == 0 ||
01130         UDPBUF->srcport == uip_udp_conn->rport) &&
01131        (uip_ipaddr_cmp(uip_udp_conn->ripaddr, all_zeroes_addr) ||
01132         uip_ipaddr_cmp(uip_udp_conn->ripaddr, all_ones_addr) ||
01133         uip_ipaddr_cmp(BUF->srcipaddr, uip_udp_conn->ripaddr))) {
01134       goto udp_found;
01135     }
01136   }
01137   UIP_LOG("udp: no matching connection found");
01138   goto drop;
01139
01140  udp_found:
01141   UIP_STAT(++uip_stat.udp.recv);
01142   uip_conn = NULL;
01143   uip_flags = UIP_NEWDATA;
01144   uip_sappdata = uip_appdata = &uip_buf[UIP_LLH_LEN + UIP_IPUDPH_LEN];
01145   uip_slen = 0;
01146   UIP_UDP_APPCALL();
01147  udp_send:
01148   if(uip_slen == 0) {
01149     goto drop;
01150   }
01151   uip_len = uip_slen + UIP_IPUDPH_LEN;
01152
01153 #if UIP_CONF_IPV6
01154   /* For IPv6, the IP length field does not include the IPv6 IP header
01155      length. */
01156   BUF->len[0] = ((uip_len - UIP_IPH_LEN) >> 8);
01157   BUF->len[1] = ((uip_len - UIP_IPH_LEN) & 0xff);
01158 #else /* UIP_CONF_IPV6 */
01159   BUF->len[0] = (uip_len >> 8);
01160   BUF->len[1] = (uip_len & 0xff);
01161 #endif /* UIP_CONF_IPV6 */
01162
01163   BUF->ttl = uip_udp_conn->ttl;
01164   BUF->proto = UIP_PROTO_UDP;
01165
01166   UDPBUF->udplen = HTONS(uip_slen + UIP_UDPH_LEN);
01167   UDPBUF->udpchksum = 0;
01168
01169   BUF->srcport  = uip_udp_conn->lport;
01170   BUF->destport = uip_udp_conn->rport;
01171
01172   uip_ipaddr_copy(BUF->srcipaddr, uip_hostaddr);
01173   uip_ipaddr_copy(BUF->destipaddr, uip_udp_conn->ripaddr);
01174
01175   uip_appdata = &uip_buf[UIP_LLH_LEN + UIP_IPTCPH_LEN];
01176
01177 #if UIP_UDP_CHECKSUMS
01178   /* Calculate UDP checksum. */
01179   UDPBUF->udpchksum = ~(uip_udpchksum());
01180   if(UDPBUF->udpchksum == 0) {
01181     UDPBUF->udpchksum = 0xffff;
01182   }
01183 #endif /* UIP_UDP_CHECKSUMS */
01184   UIP_STAT(++uip_stat.udp.sent);
01185   goto ip_send_nolen;
01186 #endif /* UIP_UDP */
01187
01188   /* TCP input processing. */
01189  tcp_input:
01190   UIP_STAT(++uip_stat.tcp.recv);
01191
01192   /* Start of TCP input header processing code. */
01193
01194   if(uip_tcpchksum() != 0xffff) {   /* Compute and check the TCP
01195                                        checksum. */
01196     UIP_STAT(++uip_stat.tcp.drop);
01197     UIP_STAT(++uip_stat.tcp.chkerr);
01198     UIP_LOG("tcp: bad checksum.");
01199     goto drop;
01200   }
01201
01202
01203   /* Demultiplex this segment. */
01204   /* First check any active connections. */
01205   for(uip_connr = &uip_conns[0]; uip_connr <= &uip_conns[UIP_CONNS - 1];
01206       ++uip_connr) {
01207     if(uip_connr->tcpstateflags != UIP_CLOSED &&
01208        BUF->destport == uip_connr->lport &&
01209        BUF->srcport == uip_connr->rport &&
01210        uip_ipaddr_cmp(BUF->srcipaddr, uip_connr->ripaddr)) {
01211       goto found;
01212     }
01213   }
01214
01215   /* If we didn't find and active connection that expected the packet,
01216      either this packet is an old duplicate, or this is a SYN packet
01217      destined for a connection in LISTEN. If the SYN flag isn't set,
01218      it is an old packet and we send a RST. */
01219   if((BUF->flags & TCP_CTL) != TCP_SYN) {
01220     goto reset;
01221   }
01222
01223   tmp16 = BUF->destport;
01224   /* Next, check listening connections. */
01225   for(c = 0; c < UIP_LISTENPORTS; ++c) {
01226     if(tmp16 == uip_listenports[c])
01227       goto found_listen;
01228   }
01229
01230   /* No matching connection found, so we send a RST packet. */
01231   UIP_STAT(++uip_stat.tcp.synrst);
01232  reset:
01233
01234   /* We do not send resets in response to resets. */
01235   if(BUF->flags & TCP_RST) {
01236     goto drop;
01237   }
01238
01239   UIP_STAT(++uip_stat.tcp.rst);
01240
01241   BUF->flags = TCP_RST | TCP_ACK;
01242   uip_len = UIP_IPTCPH_LEN;
01243   BUF->tcpoffset = 5 << 4;
01244
01245   /* Flip the seqno and ackno fields in the TCP header. */
01246   c = BUF->seqno[3];
01247   BUF->seqno[3] = BUF->ackno[3];
01248   BUF->ackno[3] = c;
01249
01250   c = BUF->seqno[2];
01251   BUF->seqno[2] = BUF->ackno[2];
01252   BUF->ackno[2] = c;
01253
01254   c = BUF->seqno[1];
01255   BUF->seqno[1] = BUF->ackno[1];
01256   BUF->ackno[1] = c;
01257
01258   c = BUF->seqno[0];
01259   BUF->seqno[0] = BUF->ackno[0];
01260   BUF->ackno[0] = c;
01261
01262   /* We also have to increase the sequence number we are
01263      acknowledging. If the least significant byte overflowed, we need
01264      to propagate the carry to the other bytes as well. */
01265   if(++BUF->ackno[3] == 0) {
01266     if(++BUF->ackno[2] == 0) {
01267       if(++BUF->ackno[1] == 0) {
01268         ++BUF->ackno[0];
01269       }
01270     }
01271   }
01272
01273   /* Swap port numbers. */
01274   tmp16 = BUF->srcport;
01275   BUF->srcport = BUF->destport;
01276   BUF->destport = tmp16;
01277
01278   /* Swap IP addresses. */
01279   uip_ipaddr_copy(BUF->destipaddr, BUF->srcipaddr);
01280   uip_ipaddr_copy(BUF->srcipaddr, uip_hostaddr);
01281
01282   /* And send out the RST packet! */
01283   goto tcp_send_noconn;
01284
01285   /* This label will be jumped to if we matched the incoming packet
01286      with a connection in LISTEN. In that case, we should create a new
01287      connection and send a SYNACK in return. */
01288  found_listen:
01289   /* First we check if there are any connections avaliable. Unused
01290      connections are kept in the same table as used connections, but
01291      unused ones have the tcpstate set to CLOSED. Also, connections in
01292      TIME_WAIT are kept track of and we'll use the oldest one if no
01293      CLOSED connections are found. Thanks to Eddie C. Dost for a very
01294      nice algorithm for the TIME_WAIT search. */
01295   uip_connr = 0;
01296   for(c = 0; c < UIP_CONNS; ++c) {
01297     if(uip_conns[c].tcpstateflags == UIP_CLOSED) {
01298       uip_connr = &uip_conns[c];
01299       break;
01300     }
01301     if(uip_conns[c].tcpstateflags == UIP_TIME_WAIT) {
01302       if(uip_connr == 0 ||
01303          uip_conns[c].timer > uip_connr->timer) {
01304         uip_connr = &uip_conns[c];
01305       }
01306     }
01307   }
01308
01309   if(uip_connr == 0) {
01310     /* All connections are used already, we drop packet and hope that
01311        the remote end will retransmit the packet at a time when we
01312        have more spare connections. */
01313     UIP_STAT(++uip_stat.tcp.syndrop);
01314     UIP_LOG("tcp: found no unused connections.");
01315     goto drop;
01316   }
01317   uip_conn = uip_connr;
01318
01319   /* Fill in the necessary fields for the new connection. */
01320   uip_connr->rto = uip_connr->timer = UIP_RTO;
01321   uip_connr->sa = 0;
01322   uip_connr->sv = 4;
01323   uip_connr->nrtx = 0;
01324   uip_connr->lport = BUF->destport;
01325   uip_connr->rport = BUF->srcport;
01326   uip_ipaddr_copy(uip_connr->ripaddr, BUF->srcipaddr);
01327   uip_connr->tcpstateflags = UIP_SYN_RCVD;
01328
01329   uip_connr->snd_nxt[0] = iss[0];
01330   uip_connr->snd_nxt[1] = iss[1];
01331   uip_connr->snd_nxt[2] = iss[2];
01332   uip_connr->snd_nxt[3] = iss[3];
01333   uip_connr->len = 1;
01334
01335   /* rcv_nxt should be the seqno from the incoming packet + 1. */
01336   uip_connr->rcv_nxt[3] = BUF->seqno[3];
01337   uip_connr->rcv_nxt[2] = BUF->seqno[2];
01338   uip_connr->rcv_nxt[1] = BUF->seqno[1];
01339   uip_connr->rcv_nxt[0] = BUF->seqno[0];
01340   uip_add_rcv_nxt(1);
01341
01342   /* Parse the TCP MSS option, if present. */
01343   if((BUF->tcpoffset & 0xf0) > 0x50) {
01344     for(c = 0; c < ((BUF->tcpoffset >> 4) - 5) << 2 ;) {
01345       opt = uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + c];
01346       if(opt == TCP_OPT_END) {
01347         /* End of options. */
01348         break;
01349       } else if(opt == TCP_OPT_NOOP) {
01350         ++c;
01351         /* NOP option. */
01352       } else if(opt == TCP_OPT_MSS &&
01353                 uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 1 + c] == TCP_OPT_MSS_LEN) {
01354         /* An MSS option with the right option length. */
01355         tmp16 = ((u16_t)uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 2 + c] << 8) |
01356           (u16_t)uip_buf[UIP_IPTCPH_LEN + UIP_LLH_LEN + 3 + c];
01357         uip_connr->initialmss = uip_connr->mss =
01358           tmp16 > UIP_TCP_MSS? UIP_TCP_MSS: tmp16;
01359
01360         /* And we are done processing options. */
01361         break;
01362       } else {
01363         /* All other options have a length field, so that we easily
01364            can skip past them. */
01365         if(uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 1 + c] == 0) {
01366           /* If the length field is zero, the options are malformed
01367              and we don't process them further. */
01368           break;
01369         }
01370         c += uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 1 + c];
01371       }
01372     }
01373   }
01374
01375   /* Our response will be a SYNACK. */
01376 #if UIP_ACTIVE_OPEN
01377  tcp_send_synack:
01378   BUF->flags = TCP_ACK;
01379
01380  tcp_send_syn:
01381   BUF->flags |= TCP_SYN;
01382 #else /* UIP_ACTIVE_OPEN */
01383  tcp_send_synack:
01384   BUF->flags = TCP_SYN | TCP_ACK;
01385 #endif /* UIP_ACTIVE_OPEN */
01386
01387   /* We send out the TCP Maximum Segment Size option with our
01388      SYNACK. */
01389   BUF->optdata[0] = TCP_OPT_MSS;
01390   BUF->optdata[1] = TCP_OPT_MSS_LEN;
01391   BUF->optdata[2] = (UIP_TCP_MSS) / 256;
01392   BUF->optdata[3] = (UIP_TCP_MSS) & 255;
01393   uip_len = UIP_IPTCPH_LEN + TCP_OPT_MSS_LEN;
01394   BUF->tcpoffset = ((UIP_TCPH_LEN + TCP_OPT_MSS_LEN) / 4) << 4;
01395   goto tcp_send;
01396
01397   /* This label will be jumped to if we found an active connection. */
01398  found:
01399   uip_conn = uip_connr;
01400   uip_flags = 0;
01401   /* We do a very naive form of TCP reset processing; we just accept
01402      any RST and kill our connection. We should in fact check if the
01403      sequence number of this reset is wihtin our advertised window
01404      before we accept the reset. */
01405   if(BUF->flags & TCP_RST) {
01406     uip_connr->tcpstateflags = UIP_CLOSED;
01407     UIP_LOG("tcp: got reset, aborting connection.");
01408     uip_flags = UIP_ABORT;
01409     UIP_APPCALL();
01410     goto drop;
01411   }
01412   /* Calculated the length of the data, if the application has sent
01413      any data to us. */
01414   c = (BUF->tcpoffset >> 4) << 2;
01415   /* uip_len will contain the length of the actual TCP data. This is
01416      calculated by subtracing the length of the TCP header (in
01417      c) and the length of the IP header (20 bytes). */
01418   uip_len = uip_len - c - UIP_IPH_LEN;
01419
01420   /* First, check if the sequence number of the incoming packet is
01421      what we're expecting next. If not, we send out an ACK with the
01422      correct numbers in. */
01423   if(!(((uip_connr->tcpstateflags & UIP_TS_MASK) == UIP_SYN_SENT) &&
01424        ((BUF->flags & TCP_CTL) == (TCP_SYN | TCP_ACK)))) {
01425     if((uip_len > 0 || ((BUF->flags & (TCP_SYN | TCP_FIN)) != 0)) &&
01426        (BUF->seqno[0] != uip_connr->rcv_nxt[0] ||
01427         BUF->seqno[1] != uip_connr->rcv_nxt[1] ||
01428         BUF->seqno[2] != uip_connr->rcv_nxt[2] ||
01429         BUF->seqno[3] != uip_connr->rcv_nxt[3])) {
01430       goto tcp_send_ack;
01431     }
01432   }
01433
01434   /* Next, check if the incoming segment acknowledges any outstanding
01435      data. If so, we update the sequence number, reset the length of
01436      the outstanding data, calculate RTT estimations, and reset the
01437      retransmission timer. */
01438   if((BUF->flags & TCP_ACK) && uip_outstanding(uip_connr)) {
01439     uip_add32(uip_connr->snd_nxt, uip_connr->len);
01440
01441     if(BUF->ackno[0] == uip_acc32[0] &&
01442        BUF->ackno[1] == uip_acc32[1] &&
01443        BUF->ackno[2] == uip_acc32[2] &&
01444        BUF->ackno[3] == uip_acc32[3]) {
01445       /* Update sequence number. */
01446       uip_connr->snd_nxt[0] = uip_acc32[0];
01447       uip_connr->snd_nxt[1] = uip_acc32[1];
01448       uip_connr->snd_nxt[2] = uip_acc32[2];
01449       uip_connr->snd_nxt[3] = uip_acc32[3];
01450
01451
01452       /* Do RTT estimation, unless we have done retransmissions. */
01453       if(uip_connr->nrtx == 0) {
01454         signed char m;
01455         m = uip_connr->rto - uip_connr->timer;
01456         /* This is taken directly from VJs original code in his paper */
01457         m = m - (uip_connr->sa >> 3);
01458         uip_connr->sa += m;
01459         if(m < 0) {
01460           m = -m;
01461         }
01462         m = m - (uip_connr->sv >> 2);
01463         uip_connr->sv += m;
01464         uip_connr->rto = (uip_connr->sa >> 3) + uip_connr->sv;
01465
01466       }
01467       /* Set the acknowledged flag. */
01468       uip_flags = UIP_ACKDATA;
01469       /* Reset the retransmission timer. */
01470       uip_connr->timer = uip_connr->rto;
01471
01472       /* Reset length of outstanding data. */
01473       uip_connr->len = 0;
01474     }
01475
01476   }
01477
01478   /* Do different things depending on in what state the connection is. */
01479   switch(uip_connr->tcpstateflags & UIP_TS_MASK) {
01480     /* CLOSED and LISTEN are not handled here. CLOSE_WAIT is not
01481         implemented, since we force the application to close when the
01482         peer sends a FIN (hence the application goes directly from
01483         ESTABLISHED to LAST_ACK). */
01484   case UIP_SYN_RCVD:
01485     /* In SYN_RCVD we have sent out a SYNACK in response to a SYN, and
01486        we are waiting for an ACK that acknowledges the data we sent
01487        out the last time. Therefore, we want to have the UIP_ACKDATA
01488        flag set. If so, we enter the ESTABLISHED state. */
01489     if(uip_flags & UIP_ACKDATA) {
01490       uip_connr->tcpstateflags = UIP_ESTABLISHED;
01491       uip_flags = UIP_CONNECTED;
01492       uip_connr->len = 0;
01493       if(uip_len > 0) {
01494         uip_flags |= UIP_NEWDATA;
01495         uip_add_rcv_nxt(uip_len);
01496       }
01497       uip_slen = 0;
01498       UIP_APPCALL();
01499       goto appsend;
01500     }
01501     goto drop;
01502 #if UIP_ACTIVE_OPEN
01503   case UIP_SYN_SENT:
01504     /* In SYN_SENT, we wait for a SYNACK that is sent in response to
01505        our SYN. The rcv_nxt is set to sequence number in the SYNACK
01506        plus one, and we send an ACK. We move into the ESTABLISHED
01507        state. */
01508     if((uip_flags & UIP_ACKDATA) &&
01509        (BUF->flags & TCP_CTL) == (TCP_SYN | TCP_ACK)) {
01510
01511       /* Parse the TCP MSS option, if present. */
01512       if((BUF->tcpoffset & 0xf0) > 0x50) {
01513         for(c = 0; c < ((BUF->tcpoffset >> 4) - 5) << 2 ;) {
01514           opt = uip_buf[UIP_IPTCPH_LEN + UIP_LLH_LEN + c];
01515           if(opt == TCP_OPT_END) {
01516             /* End of options. */
01517             break;
01518           } else if(opt == TCP_OPT_NOOP) {
01519             ++c;
01520             /* NOP option. */
01521           } else if(opt == TCP_OPT_MSS &&
01522                     uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 1 + c] == TCP_OPT_MSS_LEN) {
01523             /* An MSS option with the right option length. */
01524             tmp16 = (uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 2 + c] << 8) |
01525               uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 3 + c];
01526             uip_connr->initialmss =
01527               uip_connr->mss = tmp16 > UIP_TCP_MSS? UIP_TCP_MSS: tmp16;
01528
01529             /* And we are done processing options. */
01530             break;
01531           } else {
01532             /* All other options have a length field, so that we easily
01533                can skip past them. */
01534             if(uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 1 + c] == 0) {
01535               /* If the length field is zero, the options are malformed
01536                  and we don't process them further. */
01537               break;
01538             }
01539             c += uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN + 1 + c];
01540           }
01541         }
01542       }
01543       uip_connr->tcpstateflags = UIP_ESTABLISHED;
01544       uip_connr->rcv_nxt[0] = BUF->seqno[0];
01545       uip_connr->rcv_nxt[1] = BUF->seqno[1];
01546       uip_connr->rcv_nxt[2] = BUF->seqno[2];
01547       uip_connr->rcv_nxt[3] = BUF->seqno[3];
01548       uip_add_rcv_nxt(1);
01549       uip_flags = UIP_CONNECTED | UIP_NEWDATA;
01550       uip_connr->len = 0;
01551       uip_len = 0;
01552       uip_slen = 0;
01553       UIP_APPCALL();
01554       goto appsend;
01555     }
01556     /* Inform the application that the connection failed */
01557     uip_flags = UIP_ABORT;
01558     UIP_APPCALL();
01559     /* The connection is closed after we send the RST */
01560     uip_conn->tcpstateflags = UIP_CLOSED;
01561     goto reset;
01562 #endif /* UIP_ACTIVE_OPEN */
01563
01564   case UIP_ESTABLISHED:
01565     /* In the ESTABLISHED state, we call upon the application to feed
01566     data into the uip_buf. If the UIP_ACKDATA flag is set, the
01567     application should put new data into the buffer, otherwise we are
01568     retransmitting an old segment, and the application should put that
01569     data into the buffer.
01570
01571     If the incoming packet is a FIN, we should close the connection on
01572     this side as well, and we send out a FIN and enter the LAST_ACK
01573     state. We require that there is no outstanding data; otherwise the
01574     sequence numbers will be screwed up. */
01575
01576     if(BUF->flags & TCP_FIN && !(uip_connr->tcpstateflags & UIP_STOPPED)) {
01577       if(uip_outstanding(uip_connr)) {
01578         goto drop;
01579       }
01580       uip_add_rcv_nxt(1 + uip_len);
01581       uip_flags |= UIP_CLOSE;
01582       if(uip_len > 0) {
01583         uip_flags |= UIP_NEWDATA;
01584       }
01585       UIP_APPCALL();
01586       uip_connr->len = 1;
01587       uip_connr->tcpstateflags = UIP_LAST_ACK;
01588       uip_connr->nrtx = 0;
01589     tcp_send_finack:
01590       BUF->flags = TCP_FIN | TCP_ACK;
01591       goto tcp_send_nodata;
01592     }
01593
01594     /* Check the URG flag. If this is set, the segment carries urgent
01595        data that we must pass to the application. */
01596     if((BUF->flags & TCP_URG) != 0) {
01597 #if UIP_URGDATA > 0
01598       uip_urglen = (BUF->urgp[0] << 8) | BUF->urgp[1];
01599       if(uip_urglen > uip_len) {
01600         /* There is more urgent data in the next segment to come. */
01601         uip_urglen = uip_len;
01602       }
01603       uip_add_rcv_nxt(uip_urglen);
01604       uip_len -= uip_urglen;
01605       uip_urgdata = uip_appdata;
01606       uip_appdata += uip_urglen;
01607     } else {
01608       uip_urglen = 0;
01609 #else /* UIP_URGDATA > 0 */
01610       uip_appdata = ((char *)uip_appdata) + ((BUF->urgp[0] << 8) | BUF->urgp[1]);
01611       uip_len -= (BUF->urgp[0] << 8) | BUF->urgp[1];
01612 #endif /* UIP_URGDATA > 0 */
01613     }
01614
01615     /* If uip_len > 0 we have TCP data in the packet, and we flag this
01616        by setting the UIP_NEWDATA flag and update the sequence number
01617        we acknowledge. If the application has stopped the dataflow
01618        using uip_stop(), we must not accept any data packets from the
01619        remote host. */
01620     if(uip_len > 0 && !(uip_connr->tcpstateflags & UIP_STOPPED)) {
01621       uip_flags |= UIP_NEWDATA;
01622       uip_add_rcv_nxt(uip_len);
01623     }
01624
01625     /* Check if the available buffer space advertised by the other end
01626        is smaller than the initial MSS for this connection. If so, we
01627        set the current MSS to the window size to ensure that the
01628        application does not send more data than the other end can
01629        handle.
01630
01631        If the remote host advertises a zero window, we set the MSS to
01632        the initial MSS so that the application will send an entire MSS
01633        of data. This data will not be acknowledged by the receiver,
01634        and the application will retransmit it. This is called the
01635        "persistent timer" and uses the retransmission mechanim.
01636     */
01637     tmp16 = ((u16_t)BUF->wnd[0] << 8) + (u16_t)BUF->wnd[1];
01638     if(tmp16 > uip_connr->initialmss ||
01639        tmp16 == 0) {
01640       tmp16 = uip_connr->initialmss;
01641     }
01642     uip_connr->mss = tmp16;
01643
01644     /* If this packet constitutes an ACK for outstanding data (flagged
01645        by the UIP_ACKDATA flag, we should call the application since it
01646        might want to send more data. If the incoming packet had data
01647        from the peer (as flagged by the UIP_NEWDATA flag), the
01648        application must also be notified.
01649
01650        When the application is called, the global variable uip_len
01651        contains the length of the incoming data. The application can
01652        access the incoming data through the global pointer
01653        uip_appdata, which usually points UIP_IPTCPH_LEN + UIP_LLH_LEN
01654        bytes into the uip_buf array.
01655
01656        If the application wishes to send any data, this data should be
01657        put into the uip_appdata and the length of the data should be
01658        put into uip_len. If the application don't have any data to
01659        send, uip_len must be set to 0. */
01660     if(uip_flags & (UIP_NEWDATA | UIP_ACKDATA)) {
01661       uip_slen = 0;
01662       UIP_APPCALL();
01663
01664     appsend:
01665
01666       if(uip_flags & UIP_ABORT) {
01667         uip_slen = 0;
01668         uip_connr->tcpstateflags = UIP_CLOSED;
01669         BUF->flags = TCP_RST | TCP_ACK;
01670         goto tcp_send_nodata;
01671       }
01672
01673       if(uip_flags & UIP_CLOSE) {
01674         uip_slen = 0;
01675         uip_connr->len = 1;
01676         uip_connr->tcpstateflags = UIP_FIN_WAIT_1;
01677         uip_connr->nrtx = 0;
01678         BUF->flags = TCP_FIN | TCP_ACK;
01679         goto tcp_send_nodata;
01680       }
01681
01682       /* If uip_slen > 0, the application has data to be sent. */
01683       if(uip_slen > 0) {
01684
01685         /* If the connection has acknowledged data, the contents of
01686            the ->len variable should be discarded. */
01687         if((uip_flags & UIP_ACKDATA) != 0) {
01688           uip_connr->len = 0;
01689         }
01690
01691         /* If the ->len variable is non-zero the connection has
01692            already data in transit and cannot send anymore right
01693            now. */
01694         if(uip_connr->len == 0) {
01695
01696           /* The application cannot send more than what is allowed by
01697              the mss (the minumum of the MSS and the available
01698              window). */
01699           if(uip_slen > uip_connr->mss) {
01700             uip_slen = uip_connr->mss;
01701           }
01702
01703           /* Remember how much data we send out now so that we know
01704              when everything has been acknowledged. */
01705           uip_connr->len = uip_slen;
01706         } else {
01707
01708           /* If the application already had unacknowledged data, we
01709              make sure that the application does not send (i.e.,
01710              retransmit) out more than it previously sent out. */
01711           uip_slen = uip_connr->len;
01712         }
01713       }
01714       uip_connr->nrtx = 0;
01715     apprexmit:
01716       uip_appdata = uip_sappdata;
01717
01718       /* If the application has data to be sent, or if the incoming
01719          packet had new data in it, we must send out a packet. */
01720       if(uip_slen > 0 && uip_connr->len > 0) {
01721         /* Add the length of the IP and TCP headers. */
01722         uip_len = uip_connr->len + UIP_TCPIP_HLEN;
01723         /* We always set the ACK flag in response packets. */
01724         BUF->flags = TCP_ACK | TCP_PSH;
01725         /* Send the packet. */
01726         goto tcp_send_noopts;
01727       }
01728       /* If there is no data to send, just send out a pure ACK if
01729          there is newdata. */
01730       if(uip_flags & UIP_NEWDATA) {
01731         uip_len = UIP_TCPIP_HLEN;
01732         BUF->flags = TCP_ACK;
01733         goto tcp_send_noopts;
01734       }
01735     }
01736     goto drop;
01737   case UIP_LAST_ACK:
01738     /* We can close this connection if the peer has acknowledged our
01739        FIN. This is indicated by the UIP_ACKDATA flag. */
01740     if(uip_flags & UIP_ACKDATA) {
01741       uip_connr->tcpstateflags = UIP_CLOSED;
01742       uip_flags = UIP_CLOSE;
01743       UIP_APPCALL();
01744     }
01745     break;
01746
01747   case UIP_FIN_WAIT_1:
01748     /* The application has closed the connection, but the remote host
01749        hasn't closed its end yet. Thus we do nothing but wait for a
01750        FIN from the other side. */
01751     if(uip_len > 0) {
01752       uip_add_rcv_nxt(uip_len);
01753     }
01754     if(BUF->flags & TCP_FIN) {
01755       if(uip_flags & UIP_ACKDATA) {
01756         uip_connr->tcpstateflags = UIP_TIME_WAIT;
01757         uip_connr->timer = 0;
01758         uip_connr->len = 0;
01759       } else {
01760         uip_connr->tcpstateflags = UIP_CLOSING;
01761       }
01762       uip_add_rcv_nxt(1);
01763       uip_flags = UIP_CLOSE;
01764       UIP_APPCALL();
01765       goto tcp_send_ack;
01766     } else if(uip_flags & UIP_ACKDATA) {
01767       uip_connr->tcpstateflags = UIP_FIN_WAIT_2;
01768       uip_connr->len = 0;
01769       goto drop;
01770     }
01771     if(uip_len > 0) {
01772       goto tcp_send_ack;
01773     }
01774     goto drop;
01775
01776   case UIP_FIN_WAIT_2:
01777     if(uip_len > 0) {
01778       uip_add_rcv_nxt(uip_len);
01779     }
01780     if(BUF->flags & TCP_FIN) {
01781       uip_connr->tcpstateflags = UIP_TIME_WAIT;
01782       uip_connr->timer = 0;
01783       uip_add_rcv_nxt(1);
01784       uip_flags = UIP_CLOSE;
01785       UIP_APPCALL();
01786       goto tcp_send_ack;
01787     }
01788     if(uip_len > 0) {
01789       goto tcp_send_ack;
01790     }
01791     goto drop;
01792
01793   case UIP_TIME_WAIT:
01794     goto tcp_send_ack;
01795
01796   case UIP_CLOSING:
01797     if(uip_flags & UIP_ACKDATA) {
01798       uip_connr->tcpstateflags = UIP_TIME_WAIT;
01799       uip_connr->timer = 0;
01800     }
01801   }
01802   goto drop;
01803
01804
01805   /* We jump here when we are ready to send the packet, and just want
01806      to set the appropriate TCP sequence numbers in the TCP header. */
01807  tcp_send_ack:
01808   BUF->flags = TCP_ACK;
01809  tcp_send_nodata:
01810   uip_len = UIP_IPTCPH_LEN;
01811  tcp_send_noopts:
01812   BUF->tcpoffset = (UIP_TCPH_LEN / 4) << 4;
01813  tcp_send:
01814   /* We're done with the input processing. We are now ready to send a
01815      reply. Our job is to fill in all the fields of the TCP and IP
01816      headers before calculating the checksum and finally send the
01817      packet. */
01818   BUF->ackno[0] = uip_connr->rcv_nxt[0];
01819   BUF->ackno[1] = uip_connr->rcv_nxt[1];
01820   BUF->ackno[2] = uip_connr->rcv_nxt[2];
01821   BUF->ackno[3] = uip_connr->rcv_nxt[3];
01822
01823   BUF->seqno[0] = uip_connr->snd_nxt[0];
01824   BUF->seqno[1] = uip_connr->snd_nxt[1];
01825   BUF->seqno[2] = uip_connr->snd_nxt[2];
01826   BUF->seqno[3] = uip_connr->snd_nxt[3];
01827
01828   BUF->proto = UIP_PROTO_TCP;
01829
01830   BUF->srcport  = uip_connr->lport;
01831   BUF->destport = uip_connr->rport;
01832
01833   uip_ipaddr_copy(BUF->srcipaddr, uip_hostaddr);
01834   uip_ipaddr_copy(BUF->destipaddr, uip_connr->ripaddr);
01835
01836   if(uip_connr->tcpstateflags & UIP_STOPPED) {
01837     /* If the connection has issued uip_stop(), we advertise a zero
01838        window so that the remote host will stop sending data. */
01839     BUF->wnd[0] = BUF->wnd[1] = 0;
01840   } else {
01841     BUF->wnd[0] = ((UIP_RECEIVE_WINDOW) >> 8);
01842     BUF->wnd[1] = ((UIP_RECEIVE_WINDOW) & 0xff);
01843   }
01844
01845  tcp_send_noconn:
01846   BUF->ttl = UIP_TTL;
01847 #if UIP_CONF_IPV6
01848   /* For IPv6, the IP length field does not include the IPv6 IP header
01849      length. */
01850   BUF->len[0] = ((uip_len - UIP_IPH_LEN) >> 8);
01851   BUF->len[1] = ((uip_len - UIP_IPH_LEN) & 0xff);
01852 #else /* UIP_CONF_IPV6 */
01853   BUF->len[0] = (uip_len >> 8);
01854   BUF->len[1] = (uip_len & 0xff);
01855 #endif /* UIP_CONF_IPV6 */
01856
01857   BUF->urgp[0] = BUF->urgp[1] = 0;
01858
01859   /* Calculate TCP checksum. */
01860   BUF->tcpchksum = 0;
01861   BUF->tcpchksum = ~(uip_tcpchksum());
01862
01863 #if UIP_UDP
01864  ip_send_nolen:
01865 #endif /* UIP_UDP */
01866
01867 #if UIP_CONF_IPV6
01868   BUF->vtc = 0x60;
01869   BUF->tcflow = 0x00;
01870   BUF->flow = 0x00;
01871 #else /* UIP_CONF_IPV6 */
01872   BUF->vhl = 0x45;
01873   BUF->tos = 0;
01874   BUF->ipoffset[0] = BUF->ipoffset[1] = 0;
01875   ++ipid;
01876   BUF->ipid[0] = ipid >> 8;
01877   BUF->ipid[1] = ipid & 0xff;
01878   /* Calculate IP checksum. */
01879   BUF->ipchksum = 0;
01880   BUF->ipchksum = ~(uip_ipchksum());
01881   DEBUG_PRINTF("uip ip_send_nolen: chkecum 0x%04x\n", uip_ipchksum());
01882 #endif /* UIP_CONF_IPV6 */
01883
01884   UIP_STAT(++uip_stat.tcp.sent);
01885  send:
01886   DEBUG_PRINTF("Sending packet with length %d (%d)\n", uip_len,
01887                (BUF->len[0] << 8) | BUF->len[1]);
01888
01889   UIP_STAT(++uip_stat.ip.sent);
01890   /* Return and let the caller do the actual transmission. */
01891   uip_flags = 0;
01892   return;
01893  drop:
01894   uip_len = 0;
01895   uip_flags = 0;
01896   return;
01897 }
01898 /*---------------------------------------------------------------------------*/
01899 u16_t
01900 htons(u16_t val)
01901 {
01902   return HTONS(val);
01903 }
01904 /*---------------------------------------------------------------------------*/
01905 void
01906 uip_send(const void *data, int len)
01907 {
01908   if(len > 0) {
01909     uip_slen = len;
01910     if(data != uip_sappdata) {
01911       memcpy(uip_sappdata, (data), uip_slen);
01912     }
01913   }
01914 }
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip.h
Go to the documentation of this file.
00001
00019 /*
00020  * Copyright (c) 2001-2003, Adam Dunkels.
00021  * All rights reserved.
00022  *
00023  * Redistribution and use in source and binary forms, with or without
00024  * modification, are permitted provided that the following conditions
00025  * are met:
00026  * 1. Redistributions of source code must retain the above copyright
00027  *    notice, this list of conditions and the following disclaimer.
00028  * 2. Redistributions in binary form must reproduce the above copyright
00029  *    notice, this list of conditions and the following disclaimer in the
00030  *    documentation and/or other materials provided with the distribution.
00031  * 3. The name of the author may not be used to endorse or promote
00032  *    products derived from this software without specific prior
00033  *    written permission.
00034  *
00035  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00036  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00037  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00038  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00039  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00040  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00041  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00042  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00043  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00044  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00045  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00046  *
00047  * This file is part of the uIP TCP/IP stack.
00048  *
00049  * $Id: uip.h,v 1.40 2006/06/08 07:12:07 adam Exp $
00050  *
00051  */
00052
00053 #ifndef __UIP_H__
00054 #define __UIP_H__
00055
00056 #include "uipopt.h"
00057
00062 typedef u16_t uip_ip4addr_t[2];
00063 typedef u16_t uip_ip6addr_t[8];
00064 #if UIP_CONF_IPV6
00065 typedef uip_ip6addr_t uip_ipaddr_t;
00066 #else /* UIP_CONF_IPV6 */
00067 typedef uip_ip4addr_t uip_ipaddr_t;
00068 #endif /* UIP_CONF_IPV6 */
00069
00070 /*---------------------------------------------------------------------------*/
00071 /* First, the functions that should be called from the
00072  * system. Initialization, the periodic timer and incoming packets are
00073  * handled by the following three functions.
00074  */
00075
00106 #define uip_sethostaddr(addr) uip_ipaddr_copy(uip_hostaddr, (addr))
00107
00126 #define uip_gethostaddr(addr) uip_ipaddr_copy((addr), uip_hostaddr)
00127
00138 #define uip_setdraddr(addr) uip_ipaddr_copy(uip_draddr, (addr))
00139
00150 #define uip_setnetmask(addr) uip_ipaddr_copy(uip_netmask, (addr))
00151
00152
00161 #define uip_getdraddr(addr) uip_ipaddr_copy((addr), uip_draddr)
00162
00171 #define uip_getnetmask(addr) uip_ipaddr_copy((addr), uip_netmask)
00172
00188 void uip_init(void);
00189
00195 void uip_setipid(u16_t id);
00196
00257 #define uip_input()        uip_process(UIP_DATA)
00258
00301 #define uip_periodic(conn) do { uip_conn = &uip_conns[conn]; \
00302                                 uip_process(UIP_TIMER); } while (0)
00303
00308 #define uip_conn_active(conn) (uip_conns[conn].tcpstateflags != UIP_CLOSED)
00309
00323 #define uip_periodic_conn(conn) do { uip_conn = conn; \
00324                                      uip_process(UIP_TIMER); } while (0)
00325
00337 #define uip_poll_conn(conn) do { uip_conn = conn; \
00338                                  uip_process(UIP_POLL_REQUEST); } while (0)
00339
00340
00341 #if UIP_UDP
00342
00373 #define uip_udp_periodic(conn) do { uip_udp_conn = &uip_udp_conns[conn]; \
00374                                 uip_process(UIP_UDP_TIMER); } while (0)
00375
00390 #define uip_udp_periodic_conn(conn) do { uip_udp_conn = conn; \
00391                                          uip_process(UIP_UDP_TIMER); } while (0)
00392
00393
00394 #endif /* UIP_UDP */
00395
00422 #ifndef UIP_CONF_EXTERNAL_BUFFER
00423         extern u8_t uip_buf[UIP_BUFSIZE+2];
00424 #else
00425         extern unsigned char *uip_buf;
00426 #endif
00427
00430 /*---------------------------------------------------------------------------*/
00431 /* Functions that are used by the uIP application program. Opening and
00432  * closing connections, sending and receiving data, etc. is all
00433  * handled by the functions below.
00434 */
00454 void uip_listen(u16_t port);
00455
00468 void uip_unlisten(u16_t port);
00469
00502 struct uip_conn *uip_connect(uip_ipaddr_t *ripaddr, u16_t port);
00503
00504
00505
00515 #define uip_outstanding(conn) ((conn)->len)
00516
00542 void uip_send(const void *data, int len);
00543
00553 /*void uip_datalen(void);*/
00554 #define uip_datalen()       uip_len
00555
00565 #define uip_urgdatalen()    uip_urglen
00566
00574 #define uip_close()         (uip_flags = UIP_CLOSE)
00575
00585 #define uip_abort()         (uip_flags = UIP_ABORT)
00586
00595 #define uip_stop()          (uip_conn->tcpstateflags |= UIP_STOPPED)
00596
00603 #define uip_stopped(conn)   ((conn)->tcpstateflags & UIP_STOPPED)
00604
00614 #define uip_restart()         do { uip_flags |= UIP_NEWDATA; \
00615                                    uip_conn->tcpstateflags &= ~UIP_STOPPED; \
00616                               } while(0)
00617
00618
00619 /* uIP tests that can be made to determine in what state the current
00620    connection is, and what the application function should do. */
00621
00630 #define uip_udpconnection() (uip_conn == NULL)
00631
00641 #define uip_newdata()   (uip_flags & UIP_NEWDATA)
00642
00652 #define uip_acked()   (uip_flags & UIP_ACKDATA)
00653
00664 #define uip_connected() (uip_flags & UIP_CONNECTED)
00665
00674 #define uip_closed()    (uip_flags & UIP_CLOSE)
00675
00684 #define uip_aborted()    (uip_flags & UIP_ABORT)
00685
00694 #define uip_timedout()    (uip_flags & UIP_TIMEDOUT)
00695
00706 #define uip_rexmit()     (uip_flags & UIP_REXMIT)
00707
00720 #define uip_poll()       (uip_flags & UIP_POLL)
00721
00728 #define uip_initialmss()             (uip_conn->initialmss)
00729
00741 #define uip_mss()             (uip_conn->mss)
00742
00770 struct uip_udp_conn *uip_udp_new(uip_ipaddr_t *ripaddr, u16_t rport);
00771
00779 #define uip_udp_remove(conn) (conn)->lport = 0
00780
00791 #define uip_udp_bind(conn, port) (conn)->lport = port
00792
00804 #define uip_udp_send(len) uip_send((char *)uip_appdata, len)
00805
00808 /* uIP convenience and converting functions. */
00809
00844 #define uip_ipaddr(addr, addr0,addr1,addr2,addr3) do { \
00845                      ((u16_t *)(addr))[0] = HTONS(((addr0) << 8) | (addr1)); \
00846                      ((u16_t *)(addr))[1] = HTONS(((addr2) << 8) | (addr3)); \
00847                   } while(0)
00848
00856 #define uip_ip6addr(addr, addr0,addr1,addr2,addr3,addr4,addr5,addr6,addr7) do { \
00857                      ((u16_t *)(addr))[0] = HTONS((addr0)); \
00858                      ((u16_t *)(addr))[1] = HTONS((addr1)); \
00859                      ((u16_t *)(addr))[2] = HTONS((addr2)); \
00860                      ((u16_t *)(addr))[3] = HTONS((addr3)); \
00861                      ((u16_t *)(addr))[4] = HTONS((addr4)); \
00862                      ((u16_t *)(addr))[5] = HTONS((addr5)); \
00863                      ((u16_t *)(addr))[6] = HTONS((addr6)); \
00864                      ((u16_t *)(addr))[7] = HTONS((addr7)); \
00865                   } while(0)
00866
00885 #if !UIP_CONF_IPV6
00886 #define uip_ipaddr_copy(dest, src) do { \
00887                      ((u16_t *)dest)[0] = ((u16_t *)src)[0]; \
00888                      ((u16_t *)dest)[1] = ((u16_t *)src)[1]; \
00889                   } while(0)
00890 #else /* !UIP_CONF_IPV6 */
00891 #define uip_ipaddr_copy(dest, src) memcpy(dest, src, sizeof(uip_ip6addr_t))
00892 #endif /* !UIP_CONF_IPV6 */
00893
00914 #if !UIP_CONF_IPV6
00915 #define uip_ipaddr_cmp(addr1, addr2) (((u16_t *)addr1)[0] == ((u16_t *)addr2)[0] && \
00916                                       ((u16_t *)addr1)[1] == ((u16_t *)addr2)[1])
00917 #else /* !UIP_CONF_IPV6 */
00918 #define uip_ipaddr_cmp(addr1, addr2) (memcmp(addr1, addr2, sizeof(uip_ip6addr_t)) == 0)
00919 #endif /* !UIP_CONF_IPV6 */
00920
00945 #define uip_ipaddr_maskcmp(addr1, addr2, mask) \
00946                           (((((u16_t *)addr1)[0] & ((u16_t *)mask)[0]) == \
00947                             (((u16_t *)addr2)[0] & ((u16_t *)mask)[0])) && \
00948                            ((((u16_t *)addr1)[1] & ((u16_t *)mask)[1]) == \
00949                             (((u16_t *)addr2)[1] & ((u16_t *)mask)[1])))
00950
00951
00976 #define uip_ipaddr_mask(dest, src, mask) do { \
00977                      ((u16_t *)dest)[0] = ((u16_t *)src)[0] & ((u16_t *)mask)[0]; \
00978                      ((u16_t *)dest)[1] = ((u16_t *)src)[1] & ((u16_t *)mask)[1]; \
00979                   } while(0)
00980
00999 #define uip_ipaddr1(addr) (htons(((u16_t *)(addr))[0]) >> 8)
01000
01019 #define uip_ipaddr2(addr) (htons(((u16_t *)(addr))[0]) & 0xff)
01020
01039 #define uip_ipaddr3(addr) (htons(((u16_t *)(addr))[1]) >> 8)
01040
01059 #define uip_ipaddr4(addr) (htons(((u16_t *)(addr))[1]) & 0xff)
01060
01070 #ifndef HTONS
01071 #   if UIP_BYTE_ORDER == UIP_BIG_ENDIAN
01072 #      define HTONS(n) (n)
01073 #   else /* UIP_BYTE_ORDER == UIP_BIG_ENDIAN */
01074 #      define HTONS(n) (u16_t)((((u16_t) (n)) << 8) | (((u16_t) (n)) >> 8))
01075 #   endif /* UIP_BYTE_ORDER == UIP_BIG_ENDIAN */
01076 #else
01077 #error "HTONS already defined!"
01078 #endif /* HTONS */
01079
01087 #ifndef htons
01088 u16_t htons(u16_t val);
01089 #endif /* htons */
01090 #ifndef ntohs
01091 #define ntohs htons
01092 #endif
01093
01103 extern void *uip_appdata;
01104
01105 #if UIP_URGDATA > 0
01106 /* u8_t *uip_urgdata:
01107  *
01108  * This pointer points to any urgent data that has been received. Only
01109  * present if compiled with support for urgent data (UIP_URGDATA).
01110  */
01111 extern void *uip_urgdata;
01112 #endif /* UIP_URGDATA > 0 */
01113
01114
01138 extern u16_t uip_len;
01139
01142 #if UIP_URGDATA > 0
01143 extern u16_t uip_urglen, uip_surglen;
01144 #endif /* UIP_URGDATA > 0 */
01145
01146
01157 struct uip_conn {
01158   uip_ipaddr_t ripaddr;
01160   u16_t lport;
01161   u16_t rport;
01164   u8_t rcv_nxt[4];
01166   u8_t snd_nxt[4];
01168   u16_t len;
01169   u16_t mss;
01171   u16_t initialmss;
01173   u8_t sa;
01175   u8_t sv;
01177   u8_t rto;
01178   u8_t tcpstateflags;
01179   u8_t timer;
01180   u8_t nrtx;
01184   uip_tcp_appstate_t appstate;
01185 };
01186
01187
01194 extern struct uip_conn *uip_conn;
01195 /* The array containing all uIP connections. */
01196 extern struct uip_conn uip_conns[UIP_CONNS];
01205 extern u8_t uip_acc32[4];
01206
01210 #if UIP_UDP
01211
01214 struct uip_udp_conn {
01215   uip_ipaddr_t ripaddr;
01216   u16_t lport;
01217   u16_t rport;
01218   u8_t  ttl;
01221   uip_udp_appstate_t appstate;
01222 };
01223
01227 extern struct uip_udp_conn *uip_udp_conn;
01228 extern struct uip_udp_conn uip_udp_conns[UIP_UDP_CONNS];
01229 #endif /* UIP_UDP */
01230
01236 struct uip_stats {
01237   struct {
01238     uip_stats_t drop;
01240     uip_stats_t recv;
01242     uip_stats_t sent;
01244     uip_stats_t vhlerr;
01246     uip_stats_t hblenerr;
01248     uip_stats_t lblenerr;
01250     uip_stats_t fragerr;
01252     uip_stats_t chkerr;
01254     uip_stats_t protoerr;
01256   } ip;
01257   struct {
01258     uip_stats_t drop;
01259     uip_stats_t recv;
01260     uip_stats_t sent;
01261     uip_stats_t typeerr;
01263   } icmp;
01264   struct {
01265     uip_stats_t drop;
01266     uip_stats_t recv;
01267     uip_stats_t sent;
01268     uip_stats_t chkerr;
01270     uip_stats_t ackerr;
01272     uip_stats_t rst;
01273     uip_stats_t rexmit;
01274     uip_stats_t syndrop;
01276     uip_stats_t synrst;
01278   } tcp;
01279 #if UIP_UDP
01280   struct {
01281     uip_stats_t drop;
01282     uip_stats_t recv;
01283     uip_stats_t sent;
01284     uip_stats_t chkerr;
01286   } udp;
01287 #endif /* UIP_UDP */
01288 };
01289
01295 extern struct uip_stats uip_stat;
01296
01297
01298 /*---------------------------------------------------------------------------*/
01299 /* All the stuff below this point is internal to uIP and should not be
01300  * used directly by an application or by a device driver.
01301  */
01302 /*---------------------------------------------------------------------------*/
01303 /* u8_t uip_flags:
01304  *
01305  * When the application is called, uip_flags will contain the flags
01306  * that are defined in this file. Please read below for more
01307  * infomation.
01308  */
01309 extern u8_t uip_flags;
01310
01311 /* The following flags may be set in the global variable uip_flags
01312    before calling the application callback. The UIP_ACKDATA,
01313    UIP_NEWDATA, and UIP_CLOSE flags may both be set at the same time,
01314    whereas the others are mutualy exclusive. Note that these flags
01315    should *NOT* be accessed directly, but only through the uIP
01316    functions/macros. */
01317
01318 #define UIP_ACKDATA   1     /* Signifies that the outstanding data was
01319                                acked and the application should send
01320                                out new data instead of retransmitting
01321                                the last data. */
01322 #define UIP_NEWDATA   2     /* Flags the fact that the peer has sent
01323                                us new data. */
01324 #define UIP_REXMIT    4     /* Tells the application to retransmit the
01325                                data that was last sent. */
01326 #define UIP_POLL      8     /* Used for polling the application, to
01327                                check if the application has data that
01328                                it wants to send. */
01329 #define UIP_CLOSE     16    /* The remote host has closed the
01330                                connection, thus the connection has
01331                                gone away. Or the application signals
01332                                that it wants to close the
01333                                connection. */
01334 #define UIP_ABORT     32    /* The remote host has aborted the
01335                                connection, thus the connection has
01336                                gone away. Or the application signals
01337                                that it wants to abort the
01338                                connection. */
01339 #define UIP_CONNECTED 64    /* We have got a connection from a remote
01340                                host and have set up a new connection
01341                                for it, or an active connection has
01342                                been successfully established. */
01343
01344 #define UIP_TIMEDOUT  128   /* The connection has been aborted due to
01345                                too many retransmissions. */
01346
01347 /* uip_process(flag):
01348  *
01349  * The actual uIP function which does all the work.
01350  */
01351 void uip_process(u8_t flag);
01352
01353 /* The following flags are passed as an argument to the uip_process()
01354    function. They are used to distinguish between the two cases where
01355    uip_process() is called. It can be called either because we have
01356    incoming data that should be processed, or because the periodic
01357    timer has fired. These values are never used directly, but only in
01358    the macrose defined in this file. */
01359
01360 #define UIP_DATA          1     /* Tells uIP that there is incoming
01361                                    data in the uip_buf buffer. The
01362                                    length of the data is stored in the
01363                                    global variable uip_len. */
01364 #define UIP_TIMER         2     /* Tells uIP that the periodic timer
01365                                    has fired. */
01366 #define UIP_POLL_REQUEST  3     /* Tells uIP that a connection should
01367                                    be polled. */
01368 #define UIP_UDP_SEND_CONN 4     /* Tells uIP that a UDP datagram
01369                                    should be constructed in the
01370                                    uip_buf buffer. */
01371 #if UIP_UDP
01372 #define UIP_UDP_TIMER     5
01373 #endif /* UIP_UDP */
01374
01375 /* The TCP states used in the uip_conn->tcpstateflags. */
01376 #define UIP_CLOSED      0
01377 #define UIP_SYN_RCVD    1
01378 #define UIP_SYN_SENT    2
01379 #define UIP_ESTABLISHED 3
01380 #define UIP_FIN_WAIT_1  4
01381 #define UIP_FIN_WAIT_2  5
01382 #define UIP_CLOSING     6
01383 #define UIP_TIME_WAIT   7
01384 #define UIP_LAST_ACK    8
01385 #define UIP_TS_MASK     15
01386
01387 #define UIP_STOPPED      16
01388
01389 /* The TCP and IP headers. */
01390
01391 #ifdef __ICCARM__
01392         #pragma pack(1)
01393 #endif
01394
01395
01396 #if defined ( __CC_ARM   )
01397 __packed
01398 #elif defined   (  __GNUC__  )
01399 __attribute__ ((__packed__))
01400 #endif
01401 struct uip_tcpip_hdr {
01402 #if UIP_CONF_IPV6
01403   /* IPv6 header. */
01404   u8_t vtc,
01405     tcflow;
01406   u16_t flow;
01407   u8_t len[2];
01408   u8_t proto, ttl;
01409   uip_ip6addr_t srcipaddr, destipaddr;
01410 #else /* UIP_CONF_IPV6 */
01411   /* IPv4 header. */
01412   u8_t vhl,
01413     tos,
01414     len[2],
01415     ipid[2],
01416     ipoffset[2],
01417     ttl,
01418     proto;
01419   u16_t ipchksum;
01420   u16_t srcipaddr[2],
01421     destipaddr[2];
01422 #endif /* UIP_CONF_IPV6 */
01423
01424   /* TCP header. */
01425   u16_t srcport,
01426     destport;
01427   u8_t seqno[4],
01428     ackno[4],
01429     tcpoffset,
01430     flags,
01431     wnd[2];
01432   u16_t tcpchksum;
01433   u8_t urgp[2];
01434   u8_t optdata[4];
01435 } /*PACK_STRUCT_END*/;
01436
01437 #ifdef __ICCARM__
01438         #pragma pack()
01439 #endif
01440
01441 /* The ICMP and IP headers. */
01442 #ifdef __ICCARM__
01443         #pragma pack(1)
01444 #endif
01445
01446
01447 #if defined ( __CC_ARM   )
01448 __packed
01449 #elif defined   (  __GNUC__  )
01450 __attribute__ ((__packed__))
01451 #endif
01452 struct uip_icmpip_hdr {
01453 #if UIP_CONF_IPV6
01454   /* IPv6 header. */
01455   u8_t vtc,
01456     tcf;
01457   u16_t flow;
01458   u8_t len[2];
01459   u8_t proto, ttl;
01460   uip_ip6addr_t srcipaddr, destipaddr;
01461 #else /* UIP_CONF_IPV6 */
01462   /* IPv4 header. */
01463   u8_t vhl,
01464     tos,
01465     len[2],
01466     ipid[2],
01467     ipoffset[2],
01468     ttl,
01469     proto;
01470   u16_t ipchksum;
01471   u16_t srcipaddr[2],
01472     destipaddr[2];
01473 #endif /* UIP_CONF_IPV6 */
01474
01475   /* ICMP (echo) header. */
01476   u8_t type, icode;
01477   u16_t icmpchksum;
01478 #if !UIP_CONF_IPV6
01479   u16_t id, seqno;
01480 #else /* !UIP_CONF_IPV6 */
01481   u8_t flags, reserved1, reserved2, reserved3;
01482   u8_t icmp6data[16];
01483   u8_t options[1];
01484 #endif /* !UIP_CONF_IPV6 */
01485 } /*PACK_STRUCT_END*/;
01486
01487 #ifdef __ICCARM__
01488         #pragma pack()
01489 #endif
01490
01491
01492 /* The UDP and IP headers. */
01493 #ifdef __ICCARM__
01494         #pragma pack(1)
01495 #endif
01496
01497
01498 #if defined ( __CC_ARM   )
01499 __packed
01500 #elif defined   (  __GNUC__  )
01501 __attribute__ ((__packed__))
01502 #endif
01503 struct uip_udpip_hdr {
01504 #if UIP_CONF_IPV6
01505   /* IPv6 header. */
01506   u8_t vtc,
01507     tcf;
01508   u16_t flow;
01509   u8_t len[2];
01510   u8_t proto, ttl;
01511   uip_ip6addr_t srcipaddr, destipaddr;
01512 #else /* UIP_CONF_IPV6 */
01513   /* IP header. */
01514   u8_t vhl,
01515     tos,
01516     len[2],
01517     ipid[2],
01518     ipoffset[2],
01519     ttl,
01520     proto;
01521   u16_t ipchksum;
01522   u16_t srcipaddr[2],
01523     destipaddr[2];
01524 #endif /* UIP_CONF_IPV6 */
01525
01526   /* UDP header. */
01527   u16_t srcport,
01528     destport;
01529   u16_t udplen;
01530   u16_t udpchksum;
01531 } /*PACK_STRUCT_END*/;
01532
01533 #ifdef __ICCARM__
01534         #pragma pack()
01535 #endif
01536
01537
01538
01553 #define UIP_APPDATA_SIZE (UIP_BUFSIZE - UIP_LLH_LEN - UIP_TCPIP_HLEN)
01554
01555
01556 #define UIP_PROTO_ICMP  1
01557 #define UIP_PROTO_TCP   6
01558 #define UIP_PROTO_UDP   17
01559 #define UIP_PROTO_ICMP6 58
01560
01561 /* Header sizes. */
01562 #if UIP_CONF_IPV6
01563 #define UIP_IPH_LEN    40
01564 #else /* UIP_CONF_IPV6 */
01565 #define UIP_IPH_LEN    20    /* Size of IP header */
01566 #endif /* UIP_CONF_IPV6 */
01567 #define UIP_UDPH_LEN    8    /* Size of UDP header */
01568 #define UIP_TCPH_LEN   20    /* Size of TCP header */
01569 #define UIP_IPUDPH_LEN (UIP_UDPH_LEN + UIP_IPH_LEN)    /* Size of IP +
01570                                                           UDP
01571                                                           header */
01572 #define UIP_IPTCPH_LEN (UIP_TCPH_LEN + UIP_IPH_LEN)    /* Size of IP +
01573                                                           TCP
01574                                                           header */
01575 #define UIP_TCPIP_HLEN UIP_IPTCPH_LEN
01576
01577
01578 #if UIP_FIXEDADDR
01579 extern const uip_ipaddr_t uip_hostaddr, uip_netmask, uip_draddr;
01580 #else /* UIP_FIXEDADDR */
01581 extern uip_ipaddr_t uip_hostaddr, uip_netmask, uip_draddr;
01582 #endif /* UIP_FIXEDADDR */
01583
01584
01585
01589 #ifdef __ICCARM__
01590         #pragma pack(1)
01591 #endif
01592
01593
01594 #if defined ( __CC_ARM   )
01595 __packed
01596 #elif defined   (  __GNUC__  )
01597 __attribute__ ((__packed__))
01598 #endif
01599 struct uip_eth_addr {
01600   u8_t addr[6];
01601 } /*PACK_STRUCT_END*/;
01602
01603 #ifdef __ICCARM__
01604         #pragma pack()
01605 #endif
01606
01623 u16_t uip_chksum(u16_t *buf, u16_t len);
01624
01634 u16_t uip_ipchksum(void);
01635
01645 u16_t uip_tcpchksum(void);
01646
01656 u16_t uip_udpchksum(void);
01657
01658
01659 #endif /* __UIP_H__ */
01660
01661
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arch.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arch.h
Go to the documentation of this file.
00001
00027 /*
00028  * Copyright (c) 2001, Adam Dunkels.
00029  * All rights reserved.
00030  *
00031  * Redistribution and use in source and binary forms, with or without
00032  * modification, are permitted provided that the following conditions
00033  * are met:
00034  * 1. Redistributions of source code must retain the above copyright
00035  *    notice, this list of conditions and the following disclaimer.
00036  * 2. Redistributions in binary form must reproduce the above copyright
00037  *    notice, this list of conditions and the following disclaimer in the
00038  *    documentation and/or other materials provided with the distribution.
00039  * 3. The name of the author may not be used to endorse or promote
00040  *    products derived from this software without specific prior
00041  *    written permission.
00042  *
00043  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00044  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00045  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00046  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00047  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00048  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00049  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00050  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00051  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00052  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00053  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00054  *
00055  * This file is part of the uIP TCP/IP stack.
00056  *
00057  * $Id: uip_arch.h,v 1.2 2006/06/07 09:15:19 adam Exp $
00058  *
00059  */
00060
00061 #ifndef __UIP_ARCH_H__
00062 #define __UIP_ARCH_H__
00063
00064 #include "uip.h"
00065
00084 void uip_add32(u8_t *op32, u16_t op16);
00085
00105 u16_t uip_chksum(u16_t *buf, u16_t len);
00106
00116 u16_t uip_ipchksum(void);
00117
00131 u16_t uip_tcpchksum(void);
00132
00133 u16_t uip_udpchksum(void);
00134
00138 #endif /* __UIP_ARCH_H__ */
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.c
Go to the documentation of this file.
00001
00027 /*
00028  * Copyright (c) 2001-2003, Adam Dunkels.
00029  * All rights reserved.
00030  *
00031  * Redistribution and use in source and binary forms, with or without
00032  * modification, are permitted provided that the following conditions
00033  * are met:
00034  * 1. Redistributions of source code must retain the above copyright
00035  *    notice, this list of conditions and the following disclaimer.
00036  * 2. Redistributions in binary form must reproduce the above copyright
00037  *    notice, this list of conditions and the following disclaimer in the
00038  *    documentation and/or other materials provided with the distribution.
00039  * 3. The name of the author may not be used to endorse or promote
00040  *    products derived from this software without specific prior
00041  *    written permission.
00042  *
00043  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00044  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00045  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00046  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00047  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00048  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00049  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00050  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00051  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00052  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00053  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00054  *
00055  * This file is part of the uIP TCP/IP stack.
00056  *
00057  * $Id: uip_arp.c,v 1.8 2006/06/02 23:36:21 adam Exp $
00058  *
00059  */
00060
00061
00062 #include "uip_arp.h"
00063
00064 #include <string.h>
00065
00066 #ifdef __ICCARM__
00067         #pragma pack(1)
00068 #endif
00069
00070 //#if defined ( __CC_ARM   )
00071 //__packed
00072 //#elif defined   (  __GNUC__  )
00073 //__attribute__ ((__packed__))
00074 //#endif
00075 struct arp_hdr {
00076   struct uip_eth_hdr ethhdr;
00077   u16_t hwtype;
00078   u16_t protocol;
00079   u8_t hwlen;
00080   u8_t protolen;
00081   u16_t opcode;
00082   struct uip_eth_addr shwaddr;
00083   u16_t sipaddr[2];
00084   struct uip_eth_addr dhwaddr;
00085   u16_t dipaddr[2];
00086 } /*PACK_STRUCT_END*/;
00087
00088 #ifdef __ICCARM__
00089         #pragma pack()
00090 #endif
00091
00092 #ifdef __ICCARM__
00093         #pragma pack(1)
00094 #endif
00095
00096 //#if defined ( __CC_ARM   )
00097 //__packed
00098 //#elif defined   (  __GNUC__  )
00099 //__attribute__ ((__packed__))
00100 //#endif
00101 struct ethip_hdr {
00102   struct uip_eth_hdr ethhdr;
00103   /* IP header. */
00104   u8_t vhl,
00105     tos,
00106     len[2],
00107     ipid[2],
00108     ipoffset[2],
00109     ttl,
00110     proto;
00111   u16_t ipchksum;
00112   u16_t srcipaddr[2],
00113     destipaddr[2];
00114 } /*PACK_STRUCT_END*/;
00115
00116 #ifdef __ICCARM__
00117         #pragma pack()
00118 #endif
00119
00120 #define ARP_REQUEST 1
00121 #define ARP_REPLY   2
00122
00123 #define ARP_HWTYPE_ETH 1
00124
00125 struct arp_entry {
00126   u16_t ipaddr[2];
00127   struct uip_eth_addr ethaddr;
00128   u8_t time;
00129 };
00130
00131 static const struct uip_eth_addr broadcast_ethaddr =
00132   {{0xff,0xff,0xff,0xff,0xff,0xff}};
00133 static const u16_t broadcast_ipaddr[2] = {0xffff,0xffff};
00134
00135 static struct arp_entry arp_table[UIP_ARPTAB_SIZE];
00136 static u16_t ipaddr[2];
00137 static u8_t i, c;
00138
00139 static u8_t arptime;
00140 static u8_t tmpage;
00141
00142 #define BUF   ((struct arp_hdr *)&uip_buf[0])
00143 #define IPBUF ((struct ethip_hdr *)&uip_buf[0])
00144 /*-----------------------------------------------------------------------------------*/
00149 /*-----------------------------------------------------------------------------------*/
00150 void
00151 uip_arp_init(void)
00152 {
00153   for(i = 0; i < UIP_ARPTAB_SIZE; ++i) {
00154     memset(arp_table[i].ipaddr, 0, 4);
00155   }
00156 }
00157 /*-----------------------------------------------------------------------------------*/
00166 /*-----------------------------------------------------------------------------------*/
00167 void
00168 uip_arp_timer(void)
00169 {
00170   struct arp_entry *tabptr;
00171
00172   ++arptime;
00173   for(i = 0; i < UIP_ARPTAB_SIZE; ++i) {
00174     tabptr = &arp_table[i];
00175     if((tabptr->ipaddr[0] | tabptr->ipaddr[1]) != 0 &&
00176        arptime - tabptr->time >= UIP_ARP_MAXAGE) {
00177       memset(tabptr->ipaddr, 0, 4);
00178     }
00179   }
00180
00181 }
00182 /*-----------------------------------------------------------------------------------*/
00183 static void
00184 uip_arp_update(u16_t *ipaddr, struct uip_eth_addr *ethaddr)
00185 {
00186   register struct arp_entry *tabptr;
00187   /* Walk through the ARP mapping table and try to find an entry to
00188      update. If none is found, the IP -> MAC address mapping is
00189      inserted in the ARP table. */
00190   for(i = 0; i < UIP_ARPTAB_SIZE; ++i) {
00191
00192     tabptr = &arp_table[i];
00193     /* Only check those entries that are actually in use. */
00194     if(tabptr->ipaddr[0] != 0 &&
00195        tabptr->ipaddr[1] != 0) {
00196
00197       /* Check if the source IP address of the incoming packet matches
00198          the IP address in this ARP table entry. */
00199       if(ipaddr[0] == tabptr->ipaddr[0] &&
00200          ipaddr[1] == tabptr->ipaddr[1]) {
00201
00202         /* An old entry found, update this and return. */
00203         memcpy(tabptr->ethaddr.addr, ethaddr->addr, 6);
00204         tabptr->time = arptime;
00205
00206         return;
00207       }
00208     }
00209   }
00210
00211   /* If we get here, no existing ARP table entry was found, so we
00212      create one. */
00213
00214   /* First, we try to find an unused entry in the ARP table. */
00215   for(i = 0; i < UIP_ARPTAB_SIZE; ++i) {
00216     tabptr = &arp_table[i];
00217     if(tabptr->ipaddr[0] == 0 &&
00218        tabptr->ipaddr[1] == 0) {
00219       break;
00220     }
00221   }
00222
00223   /* If no unused entry is found, we try to find the oldest entry and
00224      throw it away. */
00225   if(i == UIP_ARPTAB_SIZE) {
00226     tmpage = 0;
00227     c = 0;
00228     for(i = 0; i < UIP_ARPTAB_SIZE; ++i) {
00229       tabptr = &arp_table[i];
00230       if(arptime - tabptr->time > tmpage) {
00231         tmpage = arptime - tabptr->time;
00232         c = i;
00233       }
00234     }
00235     i = c;
00236     tabptr = &arp_table[i];
00237   }
00238
00239   /* Now, i is the ARP table entry which we will fill with the new
00240      information. */
00241   memcpy(tabptr->ipaddr, ipaddr, 4);
00242   memcpy(tabptr->ethaddr.addr, ethaddr->addr, 6);
00243   tabptr->time = arptime;
00244 }
00245 /*-----------------------------------------------------------------------------------*/
00258 /*-----------------------------------------------------------------------------------*/
00259 #if 1
00260 void
00261 uip_arp_ipin(void)
00262 {
00263   uip_len -= sizeof(struct uip_eth_hdr);
00264
00265   /* Only insert/update an entry if the source IP address of the
00266      incoming IP packet comes from a host on the local network. */
00267   if((IPBUF->srcipaddr[0] & uip_netmask[0]) !=
00268      (uip_hostaddr[0] & uip_netmask[0])) {
00269     return;
00270   }
00271   if((IPBUF->srcipaddr[1] & uip_netmask[1]) !=
00272      (uip_hostaddr[1] & uip_netmask[1])) {
00273     return;
00274   }
00275   uip_arp_update(IPBUF->srcipaddr, &(IPBUF->ethhdr.src));
00276
00277   return;
00278 }
00279 #endif /* 0 */
00280 /*-----------------------------------------------------------------------------------*/
00302 /*-----------------------------------------------------------------------------------*/
00303 void
00304 uip_arp_arpin(void)
00305 {
00306
00307   if(uip_len < sizeof(struct arp_hdr)) {
00308     uip_len = 0;
00309     return;
00310   }
00311   uip_len = 0;
00312
00313   switch(BUF->opcode) {
00314   case HTONS(ARP_REQUEST):
00315     /* ARP request. If it asked for our address, we send out a
00316        reply. */
00317     if(uip_ipaddr_cmp(BUF->dipaddr, uip_hostaddr)) {
00318       /* First, we register the one who made the request in our ARP
00319          table, since it is likely that we will do more communication
00320          with this host in the future. */
00321       uip_arp_update(BUF->sipaddr, &BUF->shwaddr);
00322
00323       /* The reply opcode is 2. */
00324       BUF->opcode = HTONS(2);
00325
00326       memcpy(BUF->dhwaddr.addr, BUF->shwaddr.addr, 6);
00327       memcpy(BUF->shwaddr.addr, uip_ethaddr.addr, 6);
00328       memcpy(BUF->ethhdr.src.addr, uip_ethaddr.addr, 6);
00329       memcpy(BUF->ethhdr.dest.addr, BUF->dhwaddr.addr, 6);
00330
00331       BUF->dipaddr[0] = BUF->sipaddr[0];
00332       BUF->dipaddr[1] = BUF->sipaddr[1];
00333       BUF->sipaddr[0] = uip_hostaddr[0];
00334       BUF->sipaddr[1] = uip_hostaddr[1];
00335
00336       BUF->ethhdr.type = HTONS(UIP_ETHTYPE_ARP);
00337       uip_len = sizeof(struct arp_hdr);
00338     }
00339     break;
00340   case HTONS(ARP_REPLY):
00341     /* ARP reply. We insert or update the ARP table if it was meant
00342        for us. */
00343     if(uip_ipaddr_cmp(BUF->dipaddr, uip_hostaddr)) {
00344       uip_arp_update(BUF->sipaddr, &BUF->shwaddr);
00345     }
00346     break;
00347   }
00348
00349   return;
00350 }
00351 /*-----------------------------------------------------------------------------------*/
00378 /*-----------------------------------------------------------------------------------*/
00379 void
00380 uip_arp_out(void)
00381 {
00382   struct arp_entry *tabptr;
00383
00384   /* Find the destination IP address in the ARP table and construct
00385      the Ethernet header. If the destination IP addres isn't on the
00386      local network, we use the default router's IP address instead.
00387
00388      If not ARP table entry is found, we overwrite the original IP
00389      packet with an ARP request for the IP address. */
00390
00391   /* First check if destination is a local broadcast. */
00392   if(uip_ipaddr_cmp(IPBUF->destipaddr, broadcast_ipaddr)) {
00393     memcpy(IPBUF->ethhdr.dest.addr, broadcast_ethaddr.addr, 6);
00394   } else {
00395     /* Check if the destination address is on the local network. */
00396     if(!uip_ipaddr_maskcmp(IPBUF->destipaddr, uip_hostaddr, uip_netmask)) {
00397       /* Destination address was not on the local network, so we need to
00398          use the default router's IP address instead of the destination
00399          address when determining the MAC address. */
00400       uip_ipaddr_copy(ipaddr, uip_draddr);
00401     } else {
00402       /* Else, we use the destination IP address. */
00403       uip_ipaddr_copy(ipaddr, IPBUF->destipaddr);
00404     }
00405
00406     for(i = 0; i < UIP_ARPTAB_SIZE; ++i) {
00407       tabptr = &arp_table[i];
00408       if(uip_ipaddr_cmp(ipaddr, tabptr->ipaddr)) {
00409         break;
00410       }
00411     }
00412
00413     if(i == UIP_ARPTAB_SIZE) {
00414       /* The destination address was not in our ARP table, so we
00415          overwrite the IP packet with an ARP request. */
00416
00417       memset(BUF->ethhdr.dest.addr, 0xff, 6);
00418       memset(BUF->dhwaddr.addr, 0x00, 6);
00419       memcpy(BUF->ethhdr.src.addr, uip_ethaddr.addr, 6);
00420       memcpy(BUF->shwaddr.addr, uip_ethaddr.addr, 6);
00421
00422       uip_ipaddr_copy(BUF->dipaddr, ipaddr);
00423       uip_ipaddr_copy(BUF->sipaddr, uip_hostaddr);
00424       BUF->opcode = HTONS(ARP_REQUEST); /* ARP request. */
00425       BUF->hwtype = HTONS(ARP_HWTYPE_ETH);
00426       BUF->protocol = HTONS(UIP_ETHTYPE_IP);
00427       BUF->hwlen = 6;
00428       BUF->protolen = 4;
00429       BUF->ethhdr.type = HTONS(UIP_ETHTYPE_ARP);
00430
00431       uip_appdata = &uip_buf[UIP_TCPIP_HLEN + UIP_LLH_LEN];
00432
00433       uip_len = sizeof(struct arp_hdr);
00434       return;
00435     }
00436
00437     /* Build an ethernet header. */
00438     memcpy(IPBUF->ethhdr.dest.addr, tabptr->ethaddr.addr, 6);
00439   }
00440   memcpy(IPBUF->ethhdr.src.addr, uip_ethaddr.addr, 6);
00441
00442   IPBUF->ethhdr.type = HTONS(UIP_ETHTYPE_IP);
00443
00444   uip_len += sizeof(struct uip_eth_hdr);
00445 }
00446 /*-----------------------------------------------------------------------------------*/
00447
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uip_arp.h
Go to the documentation of this file.
00001
00018 /*
00019  * Copyright (c) 2001-2003, Adam Dunkels.
00020  * All rights reserved.
00021  *
00022  * Redistribution and use in source and binary forms, with or without
00023  * modification, are permitted provided that the following conditions
00024  * are met:
00025  * 1. Redistributions of source code must retain the above copyright
00026  *    notice, this list of conditions and the following disclaimer.
00027  * 2. Redistributions in binary form must reproduce the above copyright
00028  *    notice, this list of conditions and the following disclaimer in the
00029  *    documentation and/or other materials provided with the distribution.
00030  * 3. The name of the author may not be used to endorse or promote
00031  *    products derived from this software without specific prior
00032  *    written permission.
00033  *
00034  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00035  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00036  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00037  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00038  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00039  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00040  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00041  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00042  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00043  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00044  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00045  *
00046  * This file is part of the uIP TCP/IP stack.
00047  *
00048  * $Id: uip_arp.h,v 1.5 2006/06/11 21:46:39 adam Exp $
00049  *
00050  */
00051
00052 #ifndef __UIP_ARP_H__
00053 #define __UIP_ARP_H__
00054
00055 #include "uip.h"
00056
00057
00058 extern struct uip_eth_addr uip_ethaddr;
00059
00063 #ifdef __ICCARM__
00064         #pragma pack(1)
00065 #endif
00066
00067 #if defined ( __CC_ARM   )
00068 __packed
00069 #elif defined   (  __GNUC__  )
00070 __attribute__ ((__packed__))
00071 #endif
00072 struct uip_eth_hdr {
00073   struct uip_eth_addr dest;
00074   struct uip_eth_addr src;
00075   u16_t type;
00076 }/*PACK_STRUCT_END*/;
00077
00078 #ifdef __ICCARM__
00079         #pragma pack()
00080 #endif
00081
00082 #define UIP_ETHTYPE_ARP 0x0806
00083 #define UIP_ETHTYPE_IP  0x0800
00084 #define UIP_ETHTYPE_IP6 0x86dd
00085
00086
00087 /* The uip_arp_init() function must be called before any of the other
00088    ARP functions. */
00089 void uip_arp_init(void);
00090
00091 /* The uip_arp_ipin() function should be called whenever an IP packet
00092    arrives from the Ethernet. This function refreshes the ARP table or
00093    inserts a new mapping if none exists. The function assumes that an
00094    IP packet with an Ethernet header is present in the uip_buf buffer
00095    and that the length of the packet is in the uip_len variable. */
00096 void uip_arp_ipin(void);
00097 //#define uip_arp_ipin()
00098
00099 /* The uip_arp_arpin() should be called when an ARP packet is received
00100    by the Ethernet driver. This function also assumes that the
00101    Ethernet frame is present in the uip_buf buffer. When the
00102    uip_arp_arpin() function returns, the contents of the uip_buf
00103    buffer should be sent out on the Ethernet if the uip_len variable
00104    is > 0. */
00105 void uip_arp_arpin(void);
00106
00107 /* The uip_arp_out() function should be called when an IP packet
00108    should be sent out on the Ethernet. This function creates an
00109    Ethernet header before the IP header in the uip_buf buffer. The
00110    Ethernet header will have the correct Ethernet MAC destination
00111    address filled in if an ARP table entry for the destination IP
00112    address (or the IP address of the default router) is present. If no
00113    such table entry is found, the IP packet is overwritten with an ARP
00114    request and we rely on TCP to retransmit the packet that was
00115    overwritten. In any case, the uip_len variable holds the length of
00116    the Ethernet frame that should be transmitted. */
00117 void uip_arp_out(void);
00118
00119 /* The uip_arp_timer() function should be called every ten seconds. It
00120    is responsible for flushing old entries in the ARP table. */
00121 void uip_arp_timer(void);
00122
00147 #define uip_setethaddr(eaddr) do {uip_ethaddr.addr[0] = eaddr.addr[0]; \
00148                               uip_ethaddr.addr[1] = eaddr.addr[1];\
00149                               uip_ethaddr.addr[2] = eaddr.addr[2];\
00150                               uip_ethaddr.addr[3] = eaddr.addr[3];\
00151                               uip_ethaddr.addr[4] = eaddr.addr[4];\
00152                               uip_ethaddr.addr[5] = eaddr.addr[5];} while(0)
00153
00157 #endif /* __UIP_ARP_H__ */
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uiplib.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uiplib.c
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2004, Adam Dunkels and the Swedish Institute of
00003  * Computer Science.
00004  * All rights reserved.
00005  *
00006  * Redistribution and use in source and binary forms, with or without
00007  * modification, are permitted provided that the following conditions
00008  * are met:
00009  * 1. Redistributions of source code must retain the above copyright
00010  *    notice, this list of conditions and the following disclaimer.
00011  * 2. Redistributions in binary form must reproduce the above copyright
00012  *    notice, this list of conditions and the following disclaimer in the
00013  *    documentation and/or other materials provided with the distribution.
00014  * 3. The name of the author may not be used to endorse or promote
00015  *    products derived from this software without specific prior
00016  *    written permission.
00017  *
00018  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00019  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00020  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00021  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00022  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00023  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00024  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00025  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00026  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00027  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00028  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00029  *
00030  * This file is part of the uIP TCP/IP stack
00031  *
00032  * $Id: uiplib.c,v 1.2 2006/06/12 08:00:31 adam Exp $
00033  *
00034  */
00035
00036
00037 #include "uip.h"
00038 #include "uiplib.h"
00039
00040
00041 /*-----------------------------------------------------------------------------------*/
00042 unsigned char
00043 uiplib_ipaddrconv(char *addrstr, unsigned char *ipaddr)
00044 {
00045   unsigned char tmp;
00046   char c;
00047   unsigned char i, j;
00048
00049   tmp = 0;
00050
00051   for(i = 0; i < 4; ++i) {
00052     j = 0;
00053     do {
00054       c = *addrstr;
00055       ++j;
00056       if(j > 4) {
00057         return 0;
00058       }
00059       if(c == '.' || c == 0) {
00060         *ipaddr = tmp;
00061         ++ipaddr;
00062         tmp = 0;
00063       } else if(c >= '0' && c <= '9') {
00064         tmp = (tmp * 10) + (c - '0');
00065       } else {
00066         return 0;
00067       }
00068       ++addrstr;
00069     } while(c != '.' && c != 0);
00070   }
00071   return 1;
00072 }
00073
00074 /*-----------------------------------------------------------------------------------*/
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uiplib.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uiplib.h
Go to the documentation of this file.
00001
00009 /*
00010  * Copyright (c) 2002, Adam Dunkels.
00011  * All rights reserved.
00012  *
00013  * Redistribution and use in source and binary forms, with or without
00014  * modification, are permitted provided that the following conditions
00015  * are met:
00016  * 1. Redistributions of source code must retain the above copyright
00017  *    notice, this list of conditions and the following disclaimer.
00018  * 2. Redistributions in binary form must reproduce the above
00019  *    copyright notice, this list of conditions and the following
00020  *    disclaimer in the documentation and/or other materials provided
00021  *    with the distribution.
00022  * 3. The name of the author may not be used to endorse or promote
00023  *    products derived from this software without specific prior
00024  *    written permission.
00025  *
00026  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00027  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00028  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00029  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00030  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00031  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00032  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00033  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00034  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00035  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00036  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00037  *
00038  * This file is part of the uIP TCP/IP stack
00039  *
00040  * $Id: uiplib.h,v 1.1 2006/06/07 09:15:19 adam Exp $
00041  *
00042  */
00043 #ifndef __UIPLIB_H__
00044 #define __UIPLIB_H__
00045
00067 unsigned char uiplib_ipaddrconv(char *addrstr, unsigned char *addr);
00068
00071 #endif /* __UIPLIB_H__ */
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uipopt.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/uip/uipopt.h
Go to the documentation of this file.
00001
00030 /*
00031  * Copyright (c) 2001-2003, Adam Dunkels.
00032  * All rights reserved.
00033  *
00034  * Redistribution and use in source and binary forms, with or without
00035  * modification, are permitted provided that the following conditions
00036  * are met:
00037  * 1. Redistributions of source code must retain the above copyright
00038  *    notice, this list of conditions and the following disclaimer.
00039  * 2. Redistributions in binary form must reproduce the above copyright
00040  *    notice, this list of conditions and the following disclaimer in the
00041  *    documentation and/or other materials provided with the distribution.
00042  * 3. The name of the author may not be used to endorse or promote
00043  *    products derived from this software without specific prior
00044  *    written permission.
00045  *
00046  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00047  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00048  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00049  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00050  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00051  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00052  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00053  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00054  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00055  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00056  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00057  *
00058  * This file is part of the uIP TCP/IP stack.
00059  *
00060  * $Id: uipopt.h,v 1.4 2006/06/12 08:00:31 adam Exp $
00061  *
00062  */
00063
00064 #ifndef __UIPOPT_H__
00065 #define __UIPOPT_H__
00066
00067 #ifndef UIP_LITTLE_ENDIAN
00068 #define UIP_LITTLE_ENDIAN  3412
00069 #endif /* UIP_LITTLE_ENDIAN */
00070 #ifndef UIP_BIG_ENDIAN
00071 #define UIP_BIG_ENDIAN     1234
00072 #endif /* UIP_BIG_ENDIAN */
00073
00074 #include "uip-conf.h"
00075
00076 /*------------------------------------------------------------------------------*/
00077
00101 #define UIP_FIXEDADDR    0
00102
00115 #ifdef UIP_CONF_PINGADDRCONF
00116 #define UIP_PINGADDRCONF UIP_CONF_PINGADDRCONF
00117 #else /* UIP_CONF_PINGADDRCONF */
00118 #define UIP_PINGADDRCONF 0
00119 #endif /* UIP_CONF_PINGADDRCONF */
00120
00121
00131 #define UIP_FIXEDETHADDR 0
00132
00134 /*------------------------------------------------------------------------------*/
00145 #define UIP_TTL         64
00146
00160 #define UIP_REASSEMBLY 0
00161
00167 #define UIP_REASS_MAXAGE 40
00168
00171 /*------------------------------------------------------------------------------*/
00182 #ifdef UIP_CONF_UDP
00183 #define UIP_UDP UIP_CONF_UDP
00184 #else /* UIP_CONF_UDP */
00185 #define UIP_UDP           0
00186 #endif /* UIP_CONF_UDP */
00187
00196 #ifdef UIP_CONF_UDP_CHECKSUMS
00197 #define UIP_UDP_CHECKSUMS UIP_CONF_UDP_CHECKSUMS
00198 #else
00199 #define UIP_UDP_CHECKSUMS 0
00200 #endif
00201
00207 #ifdef UIP_CONF_UDP_CONNS
00208 #define UIP_UDP_CONNS UIP_CONF_UDP_CONNS
00209 #else /* UIP_CONF_UDP_CONNS */
00210 #define UIP_UDP_CONNS    10
00211 #endif /* UIP_CONF_UDP_CONNS */
00212
00221 /*------------------------------------------------------------------------------*/
00237 #define UIP_ACTIVE_OPEN 1
00238
00248 #ifndef UIP_CONF_MAX_CONNECTIONS
00249 #define UIP_CONNS       10
00250 #else /* UIP_CONF_MAX_CONNECTIONS */
00251 #define UIP_CONNS UIP_CONF_MAX_CONNECTIONS
00252 #endif /* UIP_CONF_MAX_CONNECTIONS */
00253
00254
00262 #ifndef UIP_CONF_MAX_LISTENPORTS
00263 #define UIP_LISTENPORTS 20
00264 #else /* UIP_CONF_MAX_LISTENPORTS */
00265 #define UIP_LISTENPORTS UIP_CONF_MAX_LISTENPORTS
00266 #endif /* UIP_CONF_MAX_LISTENPORTS */
00267
00277 #define UIP_URGDATA      0
00278
00284 #define UIP_RTO         3
00285
00292 #define UIP_MAXRTX      8
00293
00301 #define UIP_MAXSYNRTX      5
00302
00309 #define UIP_TCP_MSS     (UIP_BUFSIZE - UIP_LLH_LEN - UIP_TCPIP_HLEN)
00310
00320 #ifndef UIP_CONF_RECEIVE_WINDOW
00321 #define UIP_RECEIVE_WINDOW UIP_TCP_MSS
00322 #else
00323 #define UIP_RECEIVE_WINDOW UIP_CONF_RECEIVE_WINDOW
00324 #endif
00325
00332 #define UIP_TIME_WAIT_TIMEOUT 120
00333
00334
00336 /*------------------------------------------------------------------------------*/
00350 #ifdef UIP_CONF_ARPTAB_SIZE
00351 #define UIP_ARPTAB_SIZE UIP_CONF_ARPTAB_SIZE
00352 #else
00353 #define UIP_ARPTAB_SIZE 8
00354 #endif
00355
00362 #define UIP_ARP_MAXAGE 120
00363
00366 /*------------------------------------------------------------------------------*/
00367
00382 #ifndef UIP_CONF_BUFFER_SIZE
00383 #define UIP_BUFSIZE     1500
00384 #else /* UIP_CONF_BUFFER_SIZE */
00385 #define UIP_BUFSIZE UIP_CONF_BUFFER_SIZE
00386 #endif /* UIP_CONF_BUFFER_SIZE */
00387
00388
00396 #ifndef UIP_CONF_STATISTICS
00397 #define UIP_STATISTICS  0
00398 #else /* UIP_CONF_STATISTICS */
00399 #define UIP_STATISTICS UIP_CONF_STATISTICS
00400 #endif /* UIP_CONF_STATISTICS */
00401
00411 #ifndef UIP_CONF_LOGGING
00412 #define UIP_LOGGING     0
00413 #else /* UIP_CONF_LOGGING */
00414 #define UIP_LOGGING     UIP_CONF_LOGGING
00415 #endif /* UIP_CONF_LOGGING */
00416
00426 #ifndef UIP_CONF_BROADCAST
00427 #define UIP_BROADCAST 0
00428 #else /* UIP_CONF_BROADCAST */
00429 #define UIP_BROADCAST UIP_CONF_BROADCAST
00430 #endif /* UIP_CONF_BROADCAST */
00431
00438 void uip_log(char *msg);
00439
00449 #ifdef UIP_CONF_LLH_LEN
00450 #define UIP_LLH_LEN UIP_CONF_LLH_LEN
00451 #else /* UIP_CONF_LLH_LEN */
00452 #define UIP_LLH_LEN     14
00453 #endif /* UIP_CONF_LLH_LEN */
00454
00456 /*------------------------------------------------------------------------------*/
00476 #ifdef UIP_CONF_BYTE_ORDER
00477 #define UIP_BYTE_ORDER     UIP_CONF_BYTE_ORDER
00478 #else /* UIP_CONF_BYTE_ORDER */
00479 #define UIP_BYTE_ORDER     UIP_LITTLE_ENDIAN
00480 #endif /* UIP_CONF_BYTE_ORDER */
00481
00483 /*------------------------------------------------------------------------------*/
00484
00543 #endif /* __UIPOPT_H__ */
Generated on Mon Nov 28 2011 11:14:50 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/_htmlsrc/ummainpage.h Source File

C:/nxpdrv/LPC1700CMSIS/_htmlsrc/ummainpage.h
Go to the documentation of this file.
00001
00008 /* Main page ------------------------------------------------------------------ */
00066 /* Main-group definitions ----------------------------------------------------- */
00067
00068 /* CMSIS group definitions ---------------------------------------------------- */
00104 /* ------------------------------------ */
00138 /* LPC1700CMSIS_FwLib_Drivers group definition -------------------------------- */
00148 /* LPC1700CMSIS_Examples group definition -------------------------------- */
00357 /* End Of File ---------------------------------------------------------------- */
00358
Generated on Mon Nov 28 2011 11:14:32 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbaudio.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbaudio.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      Name:    usbaudio.h
00003  *      Purpose: USB Audio Demo Definitions
00004  *      Version: V1.10
00005  *----------------------------------------------------------------------------
00006  *      This software is supplied "AS IS" without any warranties, express,
00007  *      implied or statutory, including but not limited to the implied
00008  *      warranties of fitness for purpose, satisfactory quality and
00009  *      noninfringement. Keil extends you a royalty-free right to reproduce
00010  *      and distribute executable files created using this software for use
00011  *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
00012  *      else gives you the right to use this software.
00013  *
00014  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00015  *---------------------------------------------------------------------------*/
00016
00017 /* Audio Definitions */
00018 #define DATA_FREQ 32000                 /* Audio Data Frequency */
00019 #define P_S       32                    /* Packet Size */
00020 #if USB_DMA
00021 #define P_C       4                     /* Packet Count */
00022 #else
00023 #define P_C       1                     /* Packet Count */
00024 #endif
00025 #define B_S       (8*P_C*P_S)           /* Buffer Size */
00026
00027 /* Push Button Definitions */
00028 // #define PBINT     0x00004000            /* P0.14 */
00029
00030 /* LED Definitions */
00031 #define LEDMSK    0x000000FF            /* P2.0..7 */
00032
00033 /* Audio Demo Variables */
00034 extern uint8_t  Mute;                      /* Mute State */
00035 extern uint32_t Volume;                    /* Volume Level */
00036 extern uint16_t  VolCur;                    /* Volume Current Value */
00037 #if !USB_DMA
00038 extern uint32_t InfoBuf[P_C];              /* Packet Info Buffer */
00039 extern short DataBuf[B_S];              /* Data Buffer */
00040 #else
00041 extern uint32_t *InfoBuf;
00042 extern short *DataBuf;
00043 #endif
00044 extern uint16_t  DataOut;                   /* Data Out Index */
00045 extern uint16_t  DataIn;                    /* Data In Index */
00046 extern uint8_t   DataRun;                   /* Data Stream Run State */
Generated on Mon Nov 28 2011 11:14:52 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdmain.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBAudio/usbdmain.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  * Name:    usbmain.c
00003  * Purpose: USB Audio Class Demo
00004  * Version: V1.20
00005  *----------------------------------------------------------------------------
00006  *      This software is supplied "AS IS" without any warranties, express,
00007  *      implied or statutory, including but not limited to the implied
00008  *      warranties of fitness for purpose, satisfactory quality and
00009  *      noninfringement. Keil extends you a royalty-free right to reproduce
00010  *      and distribute executable files created using this software for use
00011  *      on NXP Semiconductors LPC microcontroller devices only. Nothing else
00012  *      gives you the right to use this software.
00013  *
00014  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00015  *---------------------------------------------------------------------------*/
00016
00017 #include "LPC17xx.h"                        /* LPC17xx definitions */
00018 #include "lpc_types.h"
00019
00020 #include "usb.h"
00021 #include "usbcfg.h"
00022 #include "usbhw.h"
00023 #include "usbcore.h"
00024 #include "usbaudio.h"
00025
00026 /* Example group ----------------------------------------------------------- */
00031 uint8_t  Mute;                                 /* Mute State */
00032 uint32_t Volume;                               /* Volume Level */
00033
00034 #if USB_DMA
00035 uint32_t *InfoBuf = (uint32_t *)(DMA_BUF_ADR);
00036 short *DataBuf = (short *)(DMA_BUF_ADR + 4*P_C);
00037 #else
00038 uint32_t InfoBuf[P_C];
00039 short DataBuf[B_S];                         /* Data Buffer */
00040 #endif
00041
00042 uint16_t  DataOut;                              /* Data Out Index */
00043 uint16_t  DataIn;                               /* Data In Index */
00044
00045 uint8_t   DataRun;                              /* Data Stream Run State */
00046 uint16_t  PotVal;                               /* Potenciometer Value */
00047 uint32_t  VUM;                                  /* VU Meter */
00048 uint32_t  Tick;                                 /* Time Tick */
00049
00050
00051 /*
00052  * Get Potenciometer Value
00053  */
00054
00055 void get_potval (void) {
00056   uint32_t val;
00057
00058   LPC_ADC->ADCR |= 0x01000000;              /* Start A/D Conversion */
00059   do {
00060     val = LPC_ADC->ADGDR;                   /* Read A/D Data Register */
00061   } while ((val & 0x80000000) == 0);        /* Wait for end of A/D Conversion */
00062   LPC_ADC->ADCR &= ~0x01000000;             /* Stop A/D Conversion */
00063   PotVal = ((val >> 8) & 0xF8) +            /* Extract Potenciometer Value */
00064            ((val >> 7) & 0x08);
00065 }
00066
00067
00068 /*
00069  * Timer Counter 0 Interrupt Service Routine
00070  *   executed each 31.25us (32kHz frequency)
00071  */
00072
00073 void TIMER0_IRQHandler(void)
00074 {
00075   long  val;
00076   uint32_t cnt;
00077
00078   if (DataRun) {                            /* Data Stream is running */
00079     val = DataBuf[DataOut];                 /* Get Audio Sample */
00080     cnt = (DataIn - DataOut) & (B_S - 1);   /* Buffer Data Count */
00081     if (cnt == (B_S - P_C*P_S)) {           /* Too much Data in Buffer */
00082       DataOut++;                            /* Skip one Sample */
00083     }
00084     if (cnt > (P_C*P_S)) {                  /* Still enough Data in Buffer */
00085       DataOut++;                            /* Update Data Out Index */
00086     }
00087     DataOut &= B_S - 1;                     /* Adjust Buffer Out Index */
00088     if (val < 0) VUM -= val;                /* Accumulate Neg Value */
00089     else         VUM += val;                /* Accumulate Pos Value */
00090     val  *= Volume;                         /* Apply Volume Level */
00091     val >>= 16;                             /* Adjust Value */
00092     val  += 0x8000;                         /* Add Bias */
00093     val  &= 0xFFFF;                         /* Mask Value */
00094   } else {
00095     val = 0x8000;                           /* DAC Middle Point */
00096   }
00097
00098   if (Mute) {
00099     val = 0x8000;                           /* DAC Middle Point */
00100   }
00101
00102   LPC_DAC->DACR = val & 0xFFC0;             /* Set Speaker Output */
00103
00104   if ((Tick++ & 0x03FF) == 0) {             /* On every 1024th Tick */
00105     get_potval();                           /* Get Potenciometer Value */
00106     if (VolCur == 0x8000) {                 /* Check for Minimum Level */
00107       Volume = 0;                           /* No Sound */
00108     } else {
00109       Volume = VolCur * PotVal;             /* Chained Volume Level */
00110     }
00111     val = VUM >> 20;                        /* Scale Accumulated Value */
00112     VUM = 0;                                /* Clear VUM */
00113     if (val > 7) val = 7;                   /* Limit Value */
00114   }
00115
00116   LPC_TIM0->IR = 1;                         /* Clear Interrupt Flag */
00117 }
00118
00119
00120
00121 /*****************************************************************************
00122 **   Main Function  main()
00123 ******************************************************************************/
00124 int main (void)
00125 {
00126   volatile uint32_t pclkdiv, pclk;
00127
00128 //  SystemInit();
00129
00130   LPC_PINCON->PINSEL1 &=~((0x03<<18)|(0x03<<20));
00131   /* P0.25, A0.0, function 01, P0.26 AOUT, function 10 */
00132   LPC_PINCON->PINSEL1 |= ((0x01<<18)|(0x02<<20));
00133
00134   /* Enable CLOCK into ADC controller */
00135   LPC_SC->PCONP |= (1 << 12);
00136
00137   LPC_ADC->ADCR = 0x00200E04;           /* ADC: 10-bit AIN2 @ 4MHz */
00138   LPC_DAC->DACR = 0x00008000;           /* DAC Output set to Middle Point */
00139
00140   /* By default, the PCLKSELx value is zero, thus, the PCLK for
00141   all the peripherals is 1/4 of the SystemFrequency. */
00142   /* Bit 2~3 is for TIMER0 */
00143   pclkdiv = (LPC_SC->PCLKSEL0 >> 2) & 0x03;
00144   switch ( pclkdiv )
00145   {
00146         case 0x00:
00147         default:
00148           pclk = SystemCoreClock/4;
00149         break;
00150         case 0x01:
00151           pclk = SystemCoreClock;
00152         break;
00153         case 0x02:
00154           pclk = SystemCoreClock/2;
00155         break;
00156         case 0x03:
00157           pclk = SystemCoreClock/8;
00158         break;
00159   }
00160
00161   LPC_TIM0->MR0 = pclk/DATA_FREQ - 1;   /* TC0 Match Value 0 */
00162   LPC_TIM0->MCR = 3;                                    /* TCO Interrupt and Reset on MR0 */
00163   LPC_TIM0->TCR = 1;                                    /* TC0 Enable */
00164   NVIC_EnableIRQ(TIMER0_IRQn);
00165
00166   USB_Init();                           /* USB Initialization */
00167   USB_Connect(TRUE);            /* USB Connect */
00168
00169   /********* The main Function is an endless loop ***********/
00170   while( 1 );
00171 }
00172
00173 /******************************************************************************
00174 **                            End Of File
00175 ******************************************************************************/
00176 /*
00177  * @}
00178  */
Generated on Mon Nov 28 2011 11:14:53 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/vcomdemo.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/vcomdemo.c
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      Name:    vcomdemo.c
00003  *      Purpose: USB virtual COM port Demo
00004  *      Version: V1.20
00005  *----------------------------------------------------------------------------
00006  *      This software is supplied "AS IS" without any warranties, express,
00007  *      implied or statutory, including but not limited to the implied
00008  *      warranties of fitness for purpose, satisfactory quality and
00009  *      noninfringement. Keil extends you a royalty-free right to reproduce
00010  *      and distribute executable files created using this software for use
00011  *      on NXP Semiconductors LPC microcontroller devices only. Nothing else
00012  *      gives you the right to use this software.
00013  *
00014  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00015  *---------------------------------------------------------------------------*/
00016
00017 #include "LPC17xx.h"
00018 #include "lpc_types.h"
00019
00020 #include "usb.h"
00021 #include "usbcfg.h"
00022 #include "usbhw.h"
00023 #include "usbcore.h"
00024 #include "cdc.h"
00025 #include "cdcuser.h"
00026 #include "serial.h"
00027 #include "vcomdemo.h"
00028
00029 /* Example group ----------------------------------------------------------- */
00035 /*----------------------------------------------------------------------------
00036  Initialises the VCOM port.
00037  Call this function before using VCOM_putchar or VCOM_getchar
00038  *---------------------------------------------------------------------------*/
00039 void VCOM_Init(void) {
00040 #if PORT_NUM
00041   CDC_Init (1);
00042 #else
00043   CDC_Init (0);
00044 #endif
00045 }
00046
00047
00048 /*----------------------------------------------------------------------------
00049   Reads character from serial port buffer and writes to USB buffer
00050  *---------------------------------------------------------------------------*/
00051 void VCOM_Serial2Usb(void) {
00052   static char serBuf [USB_CDC_BUFSIZE];
00053          int  numBytesRead, numAvailByte;
00054
00055   ser_AvailChar (&numAvailByte);
00056   if (numAvailByte > 0) {
00057     if (CDC_DepInEmpty) {
00058       numBytesRead = ser_Read (&serBuf[0], &numAvailByte);
00059
00060       CDC_DepInEmpty = 0;
00061           USB_WriteEP (CDC_DEP_IN, (unsigned char *)&serBuf[0], numBytesRead);
00062     }
00063   }
00064
00065 }
00066
00067 /*----------------------------------------------------------------------------
00068   Reads character from USB buffer and writes to serial port buffer
00069  *---------------------------------------------------------------------------*/
00070 void VCOM_Usb2Serial(void) {
00071   static char serBuf [32];
00072          int  numBytesToRead, numBytesRead, numAvailByte;
00073
00074   CDC_OutBufAvailChar (&numAvailByte);
00075   if (numAvailByte > 0) {
00076       numBytesToRead = numAvailByte > 32 ? 32 : numAvailByte;
00077       numBytesRead = CDC_RdOutBuf (&serBuf[0], &numBytesToRead);
00078 #if PORT_NUM
00079       ser_Write (1, &serBuf[0], &numBytesRead);
00080 #else
00081       ser_Write (0, &serBuf[0], &numBytesRead);
00082 #endif
00083   }
00084
00085 }
00086
00087
00088 /*----------------------------------------------------------------------------
00089   checks the serial state and initiates notification
00090  *---------------------------------------------------------------------------*/
00091 void VCOM_CheckSerialState (void) {
00092          unsigned short temp;
00093   static unsigned short serialState;
00094
00095   temp = CDC_GetSerialState();
00096   if (serialState != temp) {
00097      serialState = temp;
00098      CDC_NotificationIn();                  // send SERIAL_STATE notification
00099   }
00100 }
00101
00102 /*----------------------------------------------------------------------------
00103   Main Program
00104  *---------------------------------------------------------------------------*/
00105 int main (void) {
00106
00107   VCOM_Init();                              // VCOM Initialization
00108
00109   USB_Init();                               // USB Initialization
00110   USB_Connect(TRUE);                        // USB Connect
00111
00112   while (!USB_Configuration) ;              // wait until USB is configured
00113
00114   while (1) {                               // Loop forever
00115     VCOM_Serial2Usb();                      // read serial port and initiate USB event
00116     VCOM_CheckSerialState();
00117         VCOM_Usb2Serial();
00118   } // end while
00119 } // end main ()
00120
00121 /*
00122  * @}
00123  */
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/vcomdemo.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/USBDEV/USBCDC/vcomdemo.h
Go to the documentation of this file.
00001 /*----------------------------------------------------------------------------
00002  *      Name:    vcomdemo.h
00003  *      Purpose: USB virtual COM port Demo Definitions
00004  *      Version: V1.02
00005  *----------------------------------------------------------------------------
00006  *      This software is supplied "AS IS" without any warranties, express,
00007  *      implied or statutory, including but not limited to the implied
00008  *      warranties of fitness for purpose, satisfactory quality and
00009  *      noninfringement. Keil extends you a royalty-free right to reproduce
00010  *      and distribute executable files created using this software for use
00011  *      on NXP Semiconductors LPC microcontroller devices only. Nothing else
00012  *      gives you the right to use this software.
00013  *
00014  * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
00015  *---------------------------------------------------------------------------*/
00016
00017 /* Push Button Definitions */
00018 #define S2     0x00000400  /* P2.10 */
00019
00020 /* LED Definitions */
00021 #define LED1   0x00000001  /* P2.00 */
00022 #define LED2   0x00000002  /* P2.01 */
00023 #define LED3   0x00000004  /* P2.02 */
00024 #define LED4   0x00000008  /* P2.03 */
00025 #define LED5   0x00000010  /* P2.04 */
00026 #define LED6   0x00000020  /* P2.05 */
00027 #define LED7   0x00000040  /* P2.06 */
00028 #define LED8   0x00000080  /* P2.07 */
00029
00030 #define LEDMSK 0x000000FF  /* P2.0..7 */
00031
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/VecTable_Relocation/vt_relocation.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/NVIC/VecTable_Relocation/vt_relocation.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          vt_relocation.c                                 2010-06-18
00003 */
00026 #include <string.h>
00027
00028 #include "lpc17xx_libcfg.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_gpio.h"
00031 #include "lpc17xx_nvic.h"
00032 #include "lpc17xx_systick.h"
00033
00034
00035 /* Example group ----------------------------------------------------------- */
00041 /************************** PRIVATE DEFINITIONS ***********************/
00042 /* Vector Table Offset */
00043 #define VTOR_OFFSET             0x20080000
00044
00045 /************************** PRIVATE VARIABLES *************************/
00046 uint8_t menu[]=
00047         "********************************************************************************\n\r"
00048         "Hello NXP Semiconductors \n\r"
00049         "Privileged demo \n\r"
00050         "\t - MCU: LPC17xx \n\r"
00051         "\t - Core: ARM CORTEX-M3 \n\r"
00052         "\t - Communicate via: UART0 - 115200 bps \n\r"
00053         "This example used to test NVIC Vector Table Relocation function\n\r"
00054         "********************************************************************************\n\r";
00055 FunctionalState Cur_State = DISABLE;
00056
00057 /************************** PRIVATE FUNCTIONS *************************/
00058
00059 void SysTick_Handler(void);
00060 void print_menu(void);
00061
00062 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00063 /*********************************************************************/
00068 void SysTick_Handler(void)
00069 {
00070         //Clear System Tick counter flag
00071         SYSTICK_ClearCounterFlag();
00072         //toggle P0.0
00073         if (Cur_State == ENABLE)
00074         {
00075                 //pull-down pin
00076                 GPIO_ClearValue(1, (1<<28));
00077                 Cur_State = DISABLE;
00078         }
00079         else
00080         {
00081                 GPIO_SetValue(1, (1<<28));
00082                 Cur_State = ENABLE;
00083         }
00084 }
00085 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00086 /*********************************************************************/
00091 void print_menu(void)
00092 {
00093         _DBG(menu);
00094 }
00095
00096
00097 /*-------------------------MAIN FUNCTION------------------------------*/
00098 /*********************************************************************/
00103 int c_entry (void)
00104 {
00105         /* Initialize debug via UART0
00106          * – 115200bps
00107          * – 8 data bit
00108          * – No parity
00109          * – 1 stop bit
00110          * – No flow control
00111          */
00112         void* des = (void *)VTOR_OFFSET;
00113 #if (__RAM_MODE__ == 0)
00114         void* src = (void *)0x00000000;
00115 #else
00116         void* src = (void *)0x10000000;
00117 #endif
00118
00119         debug_frmwrk_init();
00120
00121         // print welcome screen
00122         print_menu();
00123
00124         //Use P0.0 to test System Tick interrupt
00125         GPIO_SetDir(1, (1<<28), 1); //Set P0.0 as output
00126
00127         _DBG("Remapping Vector Table at address: ");
00128         _DBH32(VTOR_OFFSET); _DBG_("");
00129         NVIC_SetVTOR(VTOR_OFFSET);
00130
00131         /* Copy Vector Table from 0x00000000 to new address
00132          * In ROM mode: Vector Interrupt Table is initialized at 0x00000000
00133          * In RAM mode: Vector Interrupt Table is initialized at 0x10000000
00134          * Aligned: 256 words
00135          */
00136
00137         memcpy(des, src, 256*4);
00138
00139         _DBG_("If Vector Table remapping is successful, LED P1.28 will blink by using SysTick interrupt");
00140         //Initialize System Tick with 100ms time interval
00141         SYSTICK_InternalInit(100);
00142         //Enable System Tick interrupt
00143         SYSTICK_IntCmd(ENABLE);
00144         //Enable System Tick Counter
00145         SYSTICK_Cmd(ENABLE);
00146
00147         while(1);
00148 }
00149
00150 /* With ARM and GHS toolsets, the entry point is main() - this will
00151  allow the linker to generate wrapper code to setup stacks, allocate
00152  heap area, and initialize and copy code and data segments. For GNU
00153  toolsets, the entry point is through __start() in the crt0_gnu.asm
00154  file, and that startup code will setup stacks and data */
00155 int main(void) {
00156         return c_entry();
00157 }
00158
00159 #ifdef  DEBUG
00160 /*******************************************************************************
00161  * @brief               Reports the name of the source file and the source line number
00162  *                              where the CHECK_PARAM error has occurred.
00163  * @param[in]   file Pointer to the source file name
00164  * @param[in]    line assert_param error line source number
00165  * @return              None
00166  *******************************************************************************/
00167 void check_failed(uint8_t *file, uint32_t line) {
00168         /* User can add his own implementation to report the file name and line number,
00169          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00170
00171         /* Infinite loop */
00172         while (1)
00173                 ;
00174 }
00175 #endif
00176
00177 /*
00178  * @}
00179  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/PWR/WDT_DeepSleep/wdt_deepsleep.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/PWR/WDT_DeepSleep/wdt_deepsleep.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          exti_deepsleep.c                                2010-06-18
00003 */
00026 #include "LPC17xx.h"
00027 #include "lpc17xx_clkpwr.h"
00028 #include "lpc17xx_libcfg.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_wdt.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE VARIABLES *************************/
00039 uint8_t menu[]=
00040         "********************************************************************************\n\r"
00041         "Hello NXP Semiconductors \n\r"
00042         "Power control demo \n\r"
00043         "\t - MCU: LPC17xx \n\r"
00044         "\t - Core: ARM CORTEX-M3 \n\r"
00045         "\t - Communicate via: UART0 - 115200 bps \n\r"
00046         "This example used to enter system in deep sleep mode and wake up it by using \n\r "
00047         "Watchdog timer interrupt \n\r"
00048         "********************************************************************************\n\r";
00049 //Watchodog time out in 2 seconds
00050 #define WDT_TIMEOUT     2000000
00051
00052 /************************** PRIVATE FUNCTIONS *************************/
00053 void print_menu(void);
00054 void WDT_IRQHandler(void);
00055
00056 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00057 void WDT_IRQHandler(void)
00058 {
00059         // Disable WDT interrupt
00060         NVIC_DisableIRQ(WDT_IRQn);
00061         WDT_ClrTimeOutFlag();
00062 }
00063
00064 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00065 /*********************************************************************/
00070 void print_menu(void)
00071 {
00072         _DBG(menu);
00073 }
00074
00075 /*-------------------------MAIN FUNCTION------------------------------*/
00076 /*********************************************************************/
00081 int c_entry (void)
00082 {
00083         /* Initialize debug via UART0
00084          * – 115200bps
00085          * – 8 data bit
00086          * – No parity
00087          * – 1 stop bit
00088          * – No flow control
00089          */
00090         debug_frmwrk_init();
00091
00092         // print welcome screen
00093         print_menu();
00094
00095         // Init WDT, IRC OSC, interrupt mode, timeout = 2000000 us = 2s
00096         WDT_Init(WDT_CLKSRC_IRC, WDT_MODE_INT_ONLY);
00097
00098         _DBG_("Press '1' to enter system in Deep Sleep mode");
00099         while(_DG !='1');
00100
00101         NVIC_EnableIRQ(WDT_IRQn);
00102         WDT_Start(WDT_TIMEOUT);
00103
00104         _DBG_("Enter Deep Sleep mode!");
00105         _DBG_("Wait 2s for WDT wake-up system...");
00106
00107         /*---------- Disable and disconnect the main PLL0 before enter into Deep-Sleep
00108          * or Power-Down mode <according to errata.lpc1768-16.March.2010> ------------
00109          */
00110         LPC_SC->PLL0CON &= ~(1<<1); /* Disconnect the main PLL (PLL0) */
00111         LPC_SC->PLL0FEED = 0xAA; /* Feed */
00112         LPC_SC->PLL0FEED = 0x55; /* Feed */
00113         while ((LPC_SC->PLL0STAT & (1<<25)) != 0x00); /* Wait for main PLL (PLL0) to disconnect */
00114         LPC_SC->PLL0CON &= ~(1<<0); /* Turn off the main PLL (PLL0) */
00115         LPC_SC->PLL0FEED = 0xAA; /* Feed */
00116         LPC_SC->PLL0FEED = 0x55; /* Feed */
00117         while ((LPC_SC->PLL0STAT & (1<<24)) != 0x00); /* Wait for main PLL (PLL0) to shut down */
00118         /*------------Then enter into PowerDown mode ----------------------------------*/
00119
00120         // Enter target power down mode
00121         CLKPWR_DeepSleep();
00122         SystemInit();
00123         debug_frmwrk_init();
00124         _DBG_("\n\rSystem wake-up!\n\r");
00125         while(1);
00126 }
00127
00128
00129 /* With ARM and GHS toolsets, the entry point is main() - this will
00130    allow the linker to generate wrapper code to setup stacks, allocate
00131    heap area, and initialize and copy code and data segments. For GNU
00132    toolsets, the entry point is through __start() in the crt0_gnu.asm
00133    file, and that startup code will setup stacks and data */
00134 int main(void)
00135 {
00136     return c_entry();
00137 }
00138
00139 #ifdef  DEBUG
00140 /*******************************************************************************
00141 * @brief                Reports the name of the source file and the source line number
00142 *                               where the CHECK_PARAM error has occurred.
00143 * @param[in]    file Pointer to the source file name
00144 * @param[in]    line assert_param error line source number
00145 * @return               None
00146 *******************************************************************************/
00147 void check_failed(uint8_t *file, uint32_t line)
00148 {
00149         /* User can add his own implementation to report the file name and line number,
00150          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00151
00152         /* Infinite loop */
00153         while(1);
00154 }
00155 #endif
00156
00157 /*
00158  * @}
00159  */
Generated on Mon Nov 28 2011 11:14:51 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/WDT/INTERRUPT/wdt_interrupt_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/WDT/INTERRUPT/wdt_interrupt_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          wdt_interrupt_test.c                    2010-05-21
00003 */
00026 #include "lpc17xx_wdt.h"
00027 #include "lpc17xx_libcfg.h"
00028 #include "lpc17xx_pinsel.h"
00029 #include "debug_frmwrk.h"
00030 #include "lpc17xx_gpio.h"
00031
00032 /* Example group ----------------------------------------------------------- */
00038 /************************** PRIVATE DEFINITIONS *************************/
00039 #define MCB_LPC_1768
00040 //#define IAR_LPC_1768
00041
00042 //Watchodog time out in 5 seconds
00043 #define WDT_TIMEOUT     5000000
00044
00045
00046 /************************** PRIVATE VARIABLES *************************/
00047 uint8_t menu1[] =
00048 "********************************************************************************\n\r"
00049 "Hello NXP Semiconductors \n\r"
00050 " Watch dog timer interrupt (test or debug mode) demo \n\r"
00051 "\t - MCU: LPC17xx \n\r"
00052 "\t - Core: Cortex M3 \n\r"
00053 "\t - Communicate via: UART0 -  115200 bps \n\r"
00054 " Use WDT with Internal RC OSC, interrupt mode (test only), timeout = 1 seconds \n\r"
00055 " To generate an interrupt, after interrupt WDT interrupt is disabled immediately! \n\r"
00056 "********************************************************************************\n\r";
00057 uint8_t info1[] = "BEFORE WDT interrupt!\n\r";
00058 uint8_t info2[] = "AFTER WDT interrupt\n\r";
00059
00060 __IO Bool wdt_flag = FALSE;
00061 __IO Bool LED_toggle = FALSE;
00062
00063 /************************** PRIVATE FUNCTION *************************/
00064 void WDT_IRQHandler(void);
00065
00066 void print_menu(void);
00067 void LED_Init (void);
00068
00069 /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/
00070 /*********************************************************************/
00075 void WDT_IRQHandler(void)
00076 {
00077         // Disable WDT interrupt
00078         NVIC_DisableIRQ(WDT_IRQn);
00079         // Set WDT flag according
00080         if (wdt_flag == TRUE)
00081                 wdt_flag = FALSE;
00082         else
00083                 wdt_flag = TRUE;
00084         // Clear TimeOut flag
00085         WDT_ClrTimeOutFlag();
00086 }
00087
00088 /*-------------------------PRIVATE FUNCTIONS------------------------------*/
00089 /*********************************************************************/
00094 void print_menu(void)
00095 {
00096         _DBG(menu1);
00097 }
00098
00099 /*********************************************************************/
00104 void LED_Init (void)
00105 {
00106 #ifdef MCB_LPC_1768 /* Using LED2.2 for testing */
00107         //turn on LED2.2
00108         FIO_SetDir(2,(1<<2),1);
00109         FIO_SetValue(2,(1<<2));
00110 #elif defined(IAR_LPC_1768) /* Using LED1 (P1.25 for testing */
00111         FIO_SetDir(1,(1<<25),1);
00112         FIO_ClearValue(1,(1<<25));
00113 #endif
00114 }
00115
00116 /*-------------------------MAIN FUNCTION------------------------------*/
00117 /*********************************************************************/
00122 int c_entry(void)
00123 {
00124         uint32_t delay;
00125         // Init LED port
00126         LED_Init();
00127
00128         /* Initialize debug via UART0
00129          * – 115200bps
00130          * – 8 data bit
00131          * – No parity
00132          * – 1 stop bit
00133          * – No flow control
00134          */
00135         debug_frmwrk_init();
00136
00137         // print welcome screen
00138         print_menu();
00139
00140         /* Install interrupt for WDT interrupt */
00141         NVIC_SetPriority(WDT_IRQn, 0x10);
00142         // Set Watchdog use internal RC, just generate interrupt only in 5ms if Watchdog is not feed
00143
00144         // Init WDT, IRC OSC, interrupt mode, timeout = 5000000 us = 5s
00145         WDT_Init(WDT_CLKSRC_IRC, WDT_MODE_INT_ONLY);
00146
00147         /* Enable the Watch dog interrupt*/
00148         NVIC_EnableIRQ(WDT_IRQn);
00149
00150         while (1)
00151         {
00152                 if (wdt_flag == FALSE){ //before WDT interrupt
00153                         _DBG_(info1);
00154                         _DBG_("Press '1' to enable Watchdog timer...");
00155                         while(_DG !='1');
00156                         // Start watchdog with timeout given
00157                         WDT_Start(WDT_TIMEOUT);
00158                         while(wdt_flag == FALSE)
00159                         {
00160                                 _DBD32(WDT_GetCurrentCount()); _DBG_("");
00161                         }
00162                 } else { // after WDT interrupt
00163                         _DBG_(info2);
00164                         _DBG_("LED is blinking...");
00165                         while(wdt_flag == TRUE)
00166                         {
00167                                 if (LED_toggle == FALSE)
00168                                 {
00169 #ifdef MCB_LPC_1768
00170                                         //turn on LED
00171                                         GPIO_SetValue(2,(1<<2));
00172 #elif defined(IAR_LPC_1768)
00173                                         GPIO_ClearValue(1,(1<<25));
00174 #endif
00175                                         LED_toggle = TRUE;
00176                                 }
00177                                 else
00178                                 {
00179 #ifdef MCB_LPC_1768
00180                                         //turn off LED
00181                                         GPIO_ClearValue(2,(1<<2));
00182 #elif defined(IAR_LPC_1768)
00183                                         GPIO_SetValue(1,(1<<25));
00184 #endif
00185                                         LED_toggle = FALSE;
00186                                 }
00187                                 //delay
00188                                 for(delay = 0; delay<1000000; delay ++);
00189                         }
00190                 }
00191         }
00192 }
00193
00194 /* Support required entry point for other toolchain */
00195 int main (void)
00196 {
00197         return c_entry();
00198 }
00199 #ifdef  DEBUG
00200 /*******************************************************************************
00201 * @brief                Reports the name of the source file and the source line number
00202 *                               where the CHECK_PARAM error has occurred.
00203 * @param[in]    file Pointer to the source file name
00204 * @param[in]    line assert_param error line source number
00205 * @return               None
00206 *******************************************************************************/
00207 void check_failed(uint8_t *file, uint32_t line)
00208 {
00209         /* User can add his own implementation to report the file name and line number,
00210          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00211
00212         /* Infinite loop */
00213         while(1);
00214 }
00215 #endif
00216
00217 /*
00218  * @}
00219  */
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/WDT/RESET/wdt_reset_test.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/WDT/RESET/wdt_reset_test.c
Go to the documentation of this file.
00001 /**********************************************************************
00002 * $Id$          wdt_reset_test.c                        2010-05-21
00003 */
00025 #include "lpc17xx_wdt.h"
00026 #include "lpc17xx_libcfg.h"
00027 #include "lpc17xx_pinsel.h"
00028 #include "debug_frmwrk.h"
00029 #include "lpc17xx_gpio.h"
00030
00031 /* Example group ----------------------------------------------------------- */
00037 /************************** PRIVATE DEFINITIONS *************************/
00038 //#define MCB_LPC_1768
00039 #define IAR_LPC_1768
00040
00041 //Watchodog time out in 5 seconds
00042 #define WDT_TIMEOUT     5000000
00043
00044
00045 /************************** PRIVATE VARIABLES *************************/
00046 uint8_t menu1[] =
00047 "********************************************************************************\n\r"
00048 "This Welcome Screen below will executive after reset event \n\r"
00049 "Hello NXP Semiconductors \n\r"
00050 " Watch dog timer reset when timeout demo \n\r"
00051 "\t - MCU: LPC17xx \n\r"
00052 "\t - Core: Cortex M3 \n\r"
00053 "\t - Communicate via: UART0 - 115200 bps \n\r"
00054 " Use WDT with Internal RC OSC, reset mode, timeout = 5 seconds \n\r"
00055 " To reset MCU when time out. After reset, program will determine what cause of "
00056 " last reset time (external reset or WDT time-out)\n\r"
00057 "********************************************************************************\n\r";
00058 uint8_t info1[] = "Last MCU reset caused by WDT TimeOut!\n\r";
00059 uint8_t info2[] = "Last MCU reset caused by External!\n\r";
00060
00061 /*-------------------------MAIN FUNCTION------------------------------*/
00062 /*********************************************************************/
00067 int c_entry(void)
00068 {
00069         /* Initialize debug via UART0
00070          * – 115200bps
00071          * – 8 data bit
00072          * – No parity
00073          * – 1 stop bit
00074          * – No flow control
00075          */
00076         debug_frmwrk_init();
00077
00078         // print welcome screen
00079         _DBG(menu1);
00080
00081         // Read back TimeOut flag to determine previous timeout reset
00082         if (WDT_ReadTimeOutFlag()){
00083                 _DBG_(info1);
00084                 // Clear WDT TimeOut
00085                 WDT_ClrTimeOutFlag();
00086         } else{
00087                 _DBG_(info2);
00088         }
00089
00090         // Initialize WDT, IRC OSC, interrupt mode, timeout = 5000000us = 5s
00091         WDT_Init(WDT_CLKSRC_IRC, WDT_MODE_RESET);
00092         // Start watchdog with timeout given
00093         WDT_Start(WDT_TIMEOUT);
00094
00095         //infinite loop to wait chip reset from WDT
00096         while(1);
00097 }
00098
00099 /* Support required entry point for other toolchain */
00100 int main (void)
00101 {
00102         return c_entry();
00103 }
00104 #ifdef  DEBUG
00105 /*******************************************************************************
00106 * @brief                Reports the name of the source file and the source line number
00107 *                               where the CHECK_PARAM error has occurred.
00108 * @param[in]    file Pointer to the source file name
00109 * @param[in]    line assert_param error line source number
00110 * @return               None
00111 *******************************************************************************/
00112 void check_failed(uint8_t *file, uint32_t line)
00113 {
00114         /* User can add his own implementation to report the file name and line number,
00115          ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00116
00117         /* Infinite loop */
00118         while(1);
00119 }
00120 #endif
00121
00122 /*
00123  * @}
00124  */
Generated on Mon Nov 28 2011 11:14:54 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient-strings.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient-strings.c
Go to the documentation of this file.
00001 const char http_http[8] =
00002 /* "http://" */
00003 {0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0 };
00004 const char http_200[5] =
00005 /* "200 " */
00006 {0x32, 0x30, 0x30, 0x20, 0 };
00007 const char http_301[5] =
00008 /* "301 " */
00009 {0x33, 0x30, 0x31, 0x20, 0 };
00010 const char http_302[5] =
00011 /* "302 " */
00012 {0x33, 0x30, 0x32, 0x20, 0 };
00013 const char http_get[5] =
00014 /* "GET " */
00015 {0x47, 0x45, 0x54, 0x20, 0 };
00016 const char http_10[9] =
00017 /* "HTTP/1.0" */
00018 {0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0 };
00019 const char http_11[9] =
00020 /* "HTTP/1.1" */
00021 {0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x31, 0 };
00022 const char http_content_type[15] =
00023 /* "content-type: " */
00024 {0x63, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0 };
00025 const char http_texthtml[10] =
00026 /* "text/html" */
00027 {0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0 };
00028 const char http_location[11] =
00029 /* "location: " */
00030 {0x6c, 0x6f, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0 };
00031 const char http_host[7] =
00032 /* "host: " */
00033 {0x68, 0x6f, 0x73, 0x74, 0x3a, 0x20, 0 };
00034 const char http_crnl[3] =
00035 /* "\r\n" */
00036 {0xd, 0xa, 0 };
00037 const char http_index_html[12] =
00038 /* "/index.html" */
00039 {0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0 };
00040 const char http_404_html[10] =
00041 /* "/404.html" */
00042 {0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0 };
00043 const char http_content_type_html[28] =
00044 /* "Content-type: text/html\r\n\r\n" */
00045 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0xd, 0xa, 0xd, 0xa, 0 };
00046 const char http_content_type_css [27] =
00047 /* "Content-type: text/css\r\n\r\n" */
00048 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x63, 0x73, 0x73, 0xd, 0xa, 0xd, 0xa, 0 };
00049 const char http_content_type_text[28] =
00050 /* "Content-type: text/text\r\n\r\n" */
00051 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x74, 0x65, 0x78, 0x74, 0xd, 0xa, 0xd, 0xa, 0 };
00052 const char http_content_type_png [28] =
00053 /* "Content-type: image/png\r\n\r\n" */
00054 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x70, 0x6e, 0x67, 0xd, 0xa, 0xd, 0xa, 0 };
00055 const char http_content_type_gif [28] =
00056 /* "Content-type: image/gif\r\n\r\n" */
00057 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x67, 0x69, 0x66, 0xd, 0xa, 0xd, 0xa, 0 };
00058 const char http_content_type_jpg [29] =
00059 /* "Content-type: image/jpeg\r\n\r\n" */
00060 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x6a, 0x70, 0x65, 0x67, 0xd, 0xa, 0xd, 0xa, 0 };
00061 const char http_content_type_binary[43] =
00062 /* "Content-type: application/octet-stream\r\n\r\n" */
00063 {0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x61, 0x70, 0x70, 0x6c, 0x69, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x2f, 0x6f, 0x63, 0x74, 0x65, 0x74, 0x2d, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d, 0xd, 0xa, 0xd, 0xa, 0 };
00064 const char http_html[6] =
00065 /* ".html" */
00066 {0x2e, 0x68, 0x74, 0x6d, 0x6c, 0 };
00067 const char http_shtml[7] =
00068 /* ".shtml" */
00069 {0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, 0 };
00070 const char http_htm[5] =
00071 /* ".htm" */
00072 {0x2e, 0x68, 0x74, 0x6d, 0 };
00073 const char http_css[5] =
00074 /* ".css" */
00075 {0x2e, 0x63, 0x73, 0x73, 0 };
00076 const char http_png[5] =
00077 /* ".png" */
00078 {0x2e, 0x70, 0x6e, 0x67, 0 };
00079 const char http_gif[5] =
00080 /* ".gif" */
00081 {0x2e, 0x67, 0x69, 0x66, 0 };
00082 const char http_jpg[5] =
00083 /* ".jpg" */
00084 {0x2e, 0x6a, 0x70, 0x67, 0 };
00085 const char http_text[6] =
00086 /* ".text" */
00087 {0x2e, 0x74, 0x65, 0x78, 0x74, 0 };
00088 const char http_txt[5] =
00089 /* ".txt" */
00090 {0x2e, 0x74, 0x78, 0x74, 0 };
00091 const char http_user_agent_fields[77] =
00092 /* "Connection: close\r\nUser-Agent: uIP/1.0 (; http://www.sics.se/~adam/uip/)\r\n\r\n" */
00093 {0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, 0x55, 0x73, 0x65, 0x72, 0x2d, 0x41, 0x67, 0x65, 0x6e, 0x74, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x28, 0x3b, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0x29, 0xd, 0xa, 0xd, 0xa, 0 };
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient-strings.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient-strings.h
Go to the documentation of this file.
00001 extern const char http_http[8];
00002 extern const char http_200[5];
00003 extern const char http_301[5];
00004 extern const char http_302[5];
00005 extern const char http_get[5];
00006 extern const char http_10[9];
00007 extern const char http_11[9];
00008 extern const char http_content_type[15];
00009 extern const char http_texthtml[10];
00010 extern const char http_location[11];
00011 extern const char http_host[7];
00012 extern const char http_crnl[3];
00013 extern const char http_index_html[12];
00014 extern const char http_404_html[10];
00015 extern const char http_content_type_html[28];
00016 extern const char http_content_type_css [27];
00017 extern const char http_content_type_text[28];
00018 extern const char http_content_type_png [28];
00019 extern const char http_content_type_gif [28];
00020 extern const char http_content_type_jpg [29];
00021 extern const char http_content_type_binary[43];
00022 extern const char http_html[6];
00023 extern const char http_shtml[7];
00024 extern const char http_htm[5];
00025 extern const char http_css[5];
00026 extern const char http_png[5];
00027 extern const char http_gif[5];
00028 extern const char http_jpg[5];
00029 extern const char http_text[6];
00030 extern const char http_txt[5];
00031 extern const char http_user_agent_fields[77];
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.c Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.c
Go to the documentation of this file.
00001
00026 /*
00027  * Copyright (c) 2002, Adam Dunkels.
00028  * All rights reserved.
00029  *
00030  * Redistribution and use in source and binary forms, with or without
00031  * modification, are permitted provided that the following conditions
00032  * are met:
00033  * 1. Redistributions of source code must retain the above copyright
00034  *    notice, this list of conditions and the following disclaimer.
00035  * 2. Redistributions in binary form must reproduce the above
00036  *    copyright notice, this list of conditions and the following
00037  *    disclaimer in the documentation and/or other materials provided
00038  *    with the distribution.
00039  * 3. The name of the author may not be used to endorse or promote
00040  *    products derived from this software without specific prior
00041  *    written permission.
00042  *
00043  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00044  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00045  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00046  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00047  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00048  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00049  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00050  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00051  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00052  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00053  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00054  *
00055  * This file is part of the uIP TCP/IP stack.
00056  *
00057  * $Id: webclient.c,v 1.2 2006/06/11 21:46:37 adam Exp $
00058  *
00059  */
00060
00061 #include "uip.h"
00062 #include "uiplib.h"
00063 #include "webclient.h"
00064 #include "resolv.h"
00065
00066 #include <string.h>
00067
00068 #define WEBCLIENT_TIMEOUT 100
00069
00070 #define WEBCLIENT_STATE_STATUSLINE 0
00071 #define WEBCLIENT_STATE_HEADERS    1
00072 #define WEBCLIENT_STATE_DATA       2
00073 #define WEBCLIENT_STATE_CLOSE      3
00074
00075 #define HTTPFLAG_NONE   0
00076 #define HTTPFLAG_OK     1
00077 #define HTTPFLAG_MOVED  2
00078 #define HTTPFLAG_ERROR  3
00079
00080
00081 #define ISO_nl       0x0a
00082 #define ISO_cr       0x0d
00083 #define ISO_space    0x20
00084
00085
00086 static struct webclient_state s;
00087
00088 /*-----------------------------------------------------------------------------------*/
00089 char *
00090 webclient_mimetype(void)
00091 {
00092   return s.mimetype;
00093 }
00094 /*-----------------------------------------------------------------------------------*/
00095 char *
00096 webclient_filename(void)
00097 {
00098   return s.file;
00099 }
00100 /*-----------------------------------------------------------------------------------*/
00101 char *
00102 webclient_hostname(void)
00103 {
00104   return s.host;
00105 }
00106 /*-----------------------------------------------------------------------------------*/
00107 unsigned short
00108 webclient_port(void)
00109 {
00110   return s.port;
00111 }
00112 /*-----------------------------------------------------------------------------------*/
00113 void
00114 webclient_init(void)
00115 {
00116
00117 }
00118 /*-----------------------------------------------------------------------------------*/
00119 static void
00120 init_connection(void)
00121 {
00122   s.state = WEBCLIENT_STATE_STATUSLINE;
00123
00124   s.getrequestleft = sizeof(http_get) - 1 + 1 +
00125     sizeof(http_10) - 1 +
00126     sizeof(http_crnl) - 1 +
00127     sizeof(http_host) - 1 +
00128     sizeof(http_crnl) - 1 +
00129     strlen(http_user_agent_fields) +
00130     strlen(s.file) + strlen(s.host);
00131   s.getrequestptr = 0;
00132
00133   s.httpheaderlineptr = 0;
00134 }
00135 /*-----------------------------------------------------------------------------------*/
00136 void
00137 webclient_close(void)
00138 {
00139   s.state = WEBCLIENT_STATE_CLOSE;
00140 }
00141 /*-----------------------------------------------------------------------------------*/
00142 unsigned char
00143 webclient_get(char *host, u16_t port, char *file)
00144 {
00145   struct uip_conn *conn;
00146   uip_ipaddr_t *ipaddr;
00147   static uip_ipaddr_t addr;
00148
00149   /* First check if the host is an IP address. */
00150   ipaddr = &addr;
00151   if(uiplib_ipaddrconv(host, (unsigned char *)addr) == 0) {
00152     ipaddr = (uip_ipaddr_t *)resolv_lookup(host);
00153
00154     if(ipaddr == NULL) {
00155       return 0;
00156     }
00157   }
00158
00159   conn = uip_connect(ipaddr, htons(port));
00160
00161   if(conn == NULL) {
00162     return 0;
00163   }
00164
00165   s.port = port;
00166   strncpy(s.file, file, sizeof(s.file));
00167   strncpy(s.host, host, sizeof(s.host));
00168
00169   init_connection();
00170   return 1;
00171 }
00172 /*-----------------------------------------------------------------------------------*/
00173 static unsigned char *
00174 copy_string(unsigned char *dest,
00175             const unsigned char *src, unsigned char len)
00176 {
00177   strncpy(dest, src, len);
00178   return dest + len;
00179 }
00180 /*-----------------------------------------------------------------------------------*/
00181 static void
00182 senddata(void)
00183 {
00184   u16_t len;
00185   char *getrequest;
00186   char *cptr;
00187
00188   if(s.getrequestleft > 0) {
00189     cptr = getrequest = (char *)uip_appdata;
00190
00191     cptr = copy_string(cptr, http_get, sizeof(http_get) - 1);
00192     cptr = copy_string(cptr, s.file, strlen(s.file));
00193     *cptr++ = ISO_space;
00194     cptr = copy_string(cptr, http_10, sizeof(http_10) - 1);
00195
00196     cptr = copy_string(cptr, http_crnl, sizeof(http_crnl) - 1);
00197
00198     cptr = copy_string(cptr, http_host, sizeof(http_host) - 1);
00199     cptr = copy_string(cptr, s.host, strlen(s.host));
00200     cptr = copy_string(cptr, http_crnl, sizeof(http_crnl) - 1);
00201
00202     cptr = copy_string(cptr, http_user_agent_fields,
00203                        strlen(http_user_agent_fields));
00204
00205     len = s.getrequestleft > uip_mss()?
00206       uip_mss():
00207       s.getrequestleft;
00208     uip_send(&(getrequest[s.getrequestptr]), len);
00209   }
00210 }
00211 /*-----------------------------------------------------------------------------------*/
00212 static void
00213 acked(void)
00214 {
00215   u16_t len;
00216
00217   if(s.getrequestleft > 0) {
00218     len = s.getrequestleft > uip_mss()?
00219       uip_mss():
00220       s.getrequestleft;
00221     s.getrequestleft -= len;
00222     s.getrequestptr += len;
00223   }
00224 }
00225 /*-----------------------------------------------------------------------------------*/
00226 static u16_t
00227 parse_statusline(u16_t len)
00228 {
00229   char *cptr;
00230
00231   while(len > 0 && s.httpheaderlineptr < sizeof(s.httpheaderline)) {
00232     s.httpheaderline[s.httpheaderlineptr] = *(char *)uip_appdata;
00233     ++((char *)uip_appdata);
00234     --len;
00235     if(s.httpheaderline[s.httpheaderlineptr] == ISO_nl) {
00236
00237       if((strncmp(s.httpheaderline, http_10,
00238                   sizeof(http_10) - 1) == 0) ||
00239          (strncmp(s.httpheaderline, http_11,
00240                   sizeof(http_11) - 1) == 0)) {
00241         cptr = &(s.httpheaderline[9]);
00242         s.httpflag = HTTPFLAG_NONE;
00243         if(strncmp(cptr, http_200, sizeof(http_200) - 1) == 0) {
00244           /* 200 OK */
00245           s.httpflag = HTTPFLAG_OK;
00246         } else if(strncmp(cptr, http_301, sizeof(http_301) - 1) == 0 ||
00247                   strncmp(cptr, http_302, sizeof(http_302) - 1) == 0) {
00248           /* 301 Moved permanently or 302 Found. Location: header line
00249              will contain thw new location. */
00250           s.httpflag = HTTPFLAG_MOVED;
00251         } else {
00252           s.httpheaderline[s.httpheaderlineptr - 1] = 0;
00253         }
00254       } else {
00255         uip_abort();
00256         webclient_aborted();
00257         return 0;
00258       }
00259
00260       /* We're done parsing the status line, so we reset the pointer
00261          and start parsing the HTTP headers.*/
00262       s.httpheaderlineptr = 0;
00263       s.state = WEBCLIENT_STATE_HEADERS;
00264       break;
00265     } else {
00266       ++s.httpheaderlineptr;
00267     }
00268   }
00269   return len;
00270 }
00271 /*-----------------------------------------------------------------------------------*/
00272 static char
00273 casecmp(char *str1, const char *str2, char len)
00274 {
00275   static char c;
00276
00277   while(len > 0) {
00278     c = *str1;
00279     /* Force lower-case characters. */
00280     if(c & 0x40) {
00281       c |= 0x20;
00282     }
00283     if(*str2 != c) {
00284       return 1;
00285     }
00286     ++str1;
00287     ++str2;
00288     --len;
00289   }
00290   return 0;
00291 }
00292 /*-----------------------------------------------------------------------------------*/
00293 static u16_t
00294 parse_headers(u16_t len)
00295 {
00296   char *cptr;
00297   static unsigned char i;
00298
00299   while(len > 0 && s.httpheaderlineptr < sizeof(s.httpheaderline)) {
00300     s.httpheaderline[s.httpheaderlineptr] = *(char *)uip_appdata;
00301     ++((char *)uip_appdata);
00302     --len;
00303     if(s.httpheaderline[s.httpheaderlineptr] == ISO_nl) {
00304       /* We have an entire HTTP header line in s.httpheaderline, so
00305          we parse it. */
00306       if(s.httpheaderline[0] == ISO_cr) {
00307         /* This was the last header line (i.e., and empty "\r\n"), so
00308            we are done with the headers and proceed with the actual
00309            data. */
00310         s.state = WEBCLIENT_STATE_DATA;
00311         return len;
00312       }
00313
00314       s.httpheaderline[s.httpheaderlineptr - 1] = 0;
00315       /* Check for specific HTTP header fields. */
00316       if(casecmp(s.httpheaderline, http_content_type,
00317                      sizeof(http_content_type) - 1) == 0) {
00318         /* Found Content-type field. */
00319         cptr = strchr(s.httpheaderline, ';');
00320         if(cptr != NULL) {
00321           *cptr = 0;
00322         }
00323         strncpy(s.mimetype, s.httpheaderline +
00324                 sizeof(http_content_type) - 1, sizeof(s.mimetype));
00325       } else if(casecmp(s.httpheaderline, http_location,
00326                             sizeof(http_location) - 1) == 0) {
00327         cptr = s.httpheaderline +
00328           sizeof(http_location) - 1;
00329
00330         if(strncmp(cptr, http_http, 7) == 0) {
00331           cptr += 7;
00332           for(i = 0; i < s.httpheaderlineptr - 7; ++i) {
00333             if(*cptr == 0 ||
00334                *cptr == '/' ||
00335                *cptr == ' ' ||
00336                *cptr == ':') {
00337               s.host[i] = 0;
00338               break;
00339             }
00340             s.host[i] = *cptr;
00341             ++cptr;
00342           }
00343         }
00344         strncpy(s.file, cptr, sizeof(s.file));
00345         /*      s.file[s.httpheaderlineptr - i] = 0;*/
00346       }
00347
00348
00349       /* We're done parsing, so we reset the pointer and start the
00350          next line. */
00351       s.httpheaderlineptr = 0;
00352     } else {
00353       ++s.httpheaderlineptr;
00354     }
00355   }
00356   return len;
00357 }
00358 /*-----------------------------------------------------------------------------------*/
00359 static void
00360 newdata(void)
00361 {
00362   u16_t len;
00363
00364   len = uip_datalen();
00365
00366   if(s.state == WEBCLIENT_STATE_STATUSLINE) {
00367     len = parse_statusline(len);
00368   }
00369
00370   if(s.state == WEBCLIENT_STATE_HEADERS && len > 0) {
00371     len = parse_headers(len);
00372   }
00373
00374   if(len > 0 && s.state == WEBCLIENT_STATE_DATA &&
00375      s.httpflag != HTTPFLAG_MOVED) {
00376     webclient_datahandler((char *)uip_appdata, len);
00377   }
00378 }
00379 /*-----------------------------------------------------------------------------------*/
00380 void
00381 webclient_appcall(void)
00382 {
00383   if(uip_connected()) {
00384     s.timer = 0;
00385     s.state = WEBCLIENT_STATE_STATUSLINE;
00386     senddata();
00387     webclient_connected();
00388     return;
00389   }
00390
00391   if(s.state == WEBCLIENT_STATE_CLOSE) {
00392     webclient_closed();
00393     uip_abort();
00394     return;
00395   }
00396
00397   if(uip_aborted()) {
00398     webclient_aborted();
00399   }
00400   if(uip_timedout()) {
00401     webclient_timedout();
00402   }
00403
00404
00405   if(uip_acked()) {
00406     s.timer = 0;
00407     acked();
00408   }
00409   if(uip_newdata()) {
00410     s.timer = 0;
00411     newdata();
00412   }
00413   if(uip_rexmit() ||
00414      uip_newdata() ||
00415      uip_acked()) {
00416     senddata();
00417   } else if(uip_poll()) {
00418     ++s.timer;
00419     if(s.timer == WEBCLIENT_TIMEOUT) {
00420       webclient_timedout();
00421       uip_abort();
00422       return;
00423     }
00424         /*    senddata();*/
00425   }
00426
00427   if(uip_closed()) {
00428     if(s.httpflag != HTTPFLAG_MOVED) {
00429       /* Send NULL data to signal EOF. */
00430       webclient_datahandler(NULL, 0);
00431     } else {
00432       if(resolv_lookup(s.host) == NULL) {
00433         resolv_query(s.host);
00434       }
00435       webclient_get(s.host, s.port, s.file);
00436     }
00437   }
00438 }
00439 /*-----------------------------------------------------------------------------------*/
00440
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webclient/webclient.h
Go to the documentation of this file.
00001
00012 /*
00013  * Copyright (c) 2002, Adam Dunkels.
00014  * All rights reserved.
00015  *
00016  * Redistribution and use in source and binary forms, with or without
00017  * modification, are permitted provided that the following conditions
00018  * are met:
00019  * 1. Redistributions of source code must retain the above copyright
00020  *    notice, this list of conditions and the following disclaimer.
00021  * 2. Redistributions in binary form must reproduce the above
00022  *    copyright notice, this list of conditions and the following
00023  *    disclaimer in the documentation and/or other materials provided
00024  *    with the distribution.
00025  * 3. The name of the author may not be used to endorse or promote
00026  *    products derived from this software without specific prior
00027  *    written permission.
00028  *
00029  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00030  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00031  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00032  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00033  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00034  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00035  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00036  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00037  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00038  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00039  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00040  *
00041  * This file is part of the uIP TCP/IP stack.
00042  *
00043  * $Id: webclient.h,v 1.2 2006/06/11 21:46:37 adam Exp $
00044  *
00045  */
00046 #ifndef __WEBCLIENT_H__
00047 #define __WEBCLIENT_H__
00048
00049
00050 #include "webclient-strings.h"
00051 #include "uipopt.h"
00052
00053 #define WEBCLIENT_CONF_MAX_URLLEN 100
00054
00055 struct webclient_state {
00056   u8_t timer;
00057   u8_t state;
00058   u8_t httpflag;
00059
00060   u16_t port;
00061   char host[40];
00062   char file[WEBCLIENT_CONF_MAX_URLLEN];
00063   u16_t getrequestptr;
00064   u16_t getrequestleft;
00065
00066   char httpheaderline[200];
00067   u16_t httpheaderlineptr;
00068
00069   char mimetype[32];
00070 };
00071
00072 typedef struct webclient_state uip_tcp_appstate_t;
00073 #define UIP_APPCALL webclient_appcall
00074
00090 void webclient_datahandler(char *data, u16_t len);
00091
00099 void webclient_connected(void);
00100
00108 void webclient_timedout(void);
00109
00118 void webclient_aborted(void);
00119
00127 void webclient_closed(void);
00128
00129
00130
00134 void webclient_init(void);
00135
00172 unsigned char webclient_get(char *host, u16_t port, char *file);
00173
00177 void webclient_close(void);
00178 void webclient_appcall(void);
00179
00186 char *webclient_mimetype(void);
00187
00198 char *webclient_filename(void);
00199
00210 char *webclient_hostname(void);
00211
00222 unsigned short webclient_port(void);
00223
00224
00225
00226 #endif /* __WEBCLIENT_H__ */
00227
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/webpage.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/Easy_Web/webpage.h
Go to the documentation of this file.
00001 const unsigned char WebSide[] = {
00002 "<html>\r\n"
00003 "<head>\r\n"
00004 "<meta http-equiv=\"refresh\" content=\"5\">\r\n"
00005 "<title>easyWEB - dynamic Webside</title>\r\n"
00006 "</head>\r\n"
00007 "\r\n"
00008 "<body bgcolor=\"#3030A0\" text=\"#FFFF00\">\r\n"
00009 "<p><b><font color=\"#FFFFFF\" size=\"6\"><i>Hello World!</i></font></b></p>\r\n"
00010 "\r\n"
00011 "<p><b>This is a dynamic website hosted by the embedded Webserver</b> <b>easyWEB.</b></p>\r\n"
00012 "<p><b>Hardware:</b></p>\r\n"
00013 "<ul>\r\n"
00014 "<li><b>Keil MCB1700 board (with LPC1768 ARM Cortex-M3), 72MHz, 512KB Flash, 64KB SRAM</b></li>\r\n"
00015 "<li><b>Embedded EMAC Ethernet Controller</b></li>\r\n"
00016 "</ul>\r\n"
00017 "\r\n"
00018 "<p><b>A/D Converter Input 0 - POT1:</b></p>\r\n"
00019 "\r\n"
00020 "<table bgcolor=\"#ff0000\" border=\"5\" cellpadding=\"0\" cellspacing=\"0\" width=\"500\">\r\n"
00021 "<tr>\r\n"
00022 "<td>\r\n"
00023 "<table width=\"AD7%\" border=\"0\" cellpadding=\"0\" cellspacing=\"0\">\r\n"
00024 "<tr><td bgcolor=\"#00ff00\">&nbsp;</td></tr>\r\n"
00025 "</table>\r\n"
00026 "</td>\r\n"
00027 "</tr>\r\n"
00028 "</table>\r\n"
00029 "\r\n"
00030 "<table border=\"0\" width=\"540\">\r\n"
00031 "<tr>\r\n"
00032 "<td width=\"14%\">0V</td>\r\n"
00033 "<td width=\"14%\">0.5V</td>\r\n"
00034 "<td width=\"14%\">1V</td>\r\n"
00035 "<td width=\"14%\">1.5V</td>\r\n"
00036 "<td width=\"14%\">2V</td>\r\n"
00037 "<td width=\"14%\">2.5V</td>\r\n"
00038 "<td width=\"14%\">3V</td>\r\n"
00039 "</tr>\r\n"
00040 "</table>\r\n"
00041 "\r\n"
00042 "<p><b>A/D Converter Input 1:</b></p>\r\n"
00043 "\r\n"
00044 "<table bgcolor=\"#ff0000\" border=\"5\" cellpadding=\"0\" cellspacing=\"0\" width=\"500\">\r\n"
00045 "<tr>\r\n"
00046 "<td>\r\n"
00047 "<table width=\"ADA%\" border=\"0\" cellpadding=\"0\" cellspacing=\"0\">\r\n"
00048 "<tr><td bgcolor=\"#00ff00\">&nbsp;</td></tr> \r\n"
00049 "</table>\r\n"
00050 "</td>\r\n"
00051 "</tr>\r\n"
00052 "</table>\r\n"
00053 "\r\n"
00054 "<table border=\"0\" width=\"540\">\r\n"
00055 "<tr>\r\n"
00056 "<td width=\"12%\">0V</td>\r\n"
00057 "<td width=\"12%\">0.5V</td>\r\n"
00058 "<td width=\"12%\">1V</td>\r\n"
00059 "<td width=\"12%\">1.5V</td>\r\n"
00060 "<td width=\"12%\">2V</td>\r\n"
00061 "<td width=\"12%\">2.5V</td>\r\n"
00062 "<td width=\"12%\">3V</td>\r\n"
00063 "</tr>\r\n"
00064 "</table>\r\n"
00065 "</body>\r\n"
00066 "</html>\r\n"
00067 "\r\n"};
Generated on Mon Nov 28 2011 11:14:47 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


LPC1700CMSIS Standard Peripheral Firmware Library Manual: C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/webserver.h Source File

C:/nxpdrv/LPC1700CMSIS/Examples/EMAC/uIP/apps/webserver/webserver.h
Go to the documentation of this file.
00001 /*
00002  * Copyright (c) 2002, Adam Dunkels.
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above
00011  *    copyright notice, this list of conditions and the following
00012  *    disclaimer in the documentation and/or other materials provided
00013  *    with the distribution.
00014  * 3. The name of the author may not be used to endorse or promote
00015  *    products derived from this software without specific prior
00016  *    written permission.
00017  *
00018  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
00019  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00020  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00021  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
00022  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00023  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
00024  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00025  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00026  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00027  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00028  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00029  *
00030  * This file is part of the uIP TCP/IP stack
00031  *
00032  * $Id: webserver.h,v 1.2 2006/06/11 21:46:38 adam Exp $
00033  *
00034  */
00035 #ifndef __WEBSERVER_H__
00036 #define __WEBSERVER_H__
00037
00038 #include "httpd.h"
00039
00040 typedef struct httpd_state uip_tcp_appstate_t;
00041 /* UIP_APPCALL: the name of the application function. This function
00042    must return void and take no arguments (i.e., C type "void
00043    appfunc(void)"). */
00044 #ifndef UIP_APPCALL
00045 #define UIP_APPCALL     httpd_appcall
00046 #endif
00047
00048
00049 #endif /* __WEBSERVER_H__ */
Generated on Mon Nov 28 2011 11:14:48 for LPC1700CMSIS Standard Peripheral Firmware Library Manual by doxygen 1.7.4


Application Note

ACRONYMS

24_Aug_2010

The table below describes the acronyms used in the firmware libray

Acronyms | Description
CMSIS | Cortex Microcontroller Software Interface Standard
DBFWK | Debug Framework
ADC | Analog to Digital converter
CAN | Controller Area Network
DAC | Digital to Analog converter
EMAC | Ethernet Media Access Control
EXTI | External Interrupt
DMA | Direct Memory Access
GPDMA | General Purpose DMA controller
GPIO | General Purpose Input/Output
FLASH | Flash Memory
I2C | Inter-integrated circuit
I2S | Inter-integrated sound
ITM | Instrumentation Trace Microcell
JTAG | Joint Test Action Group
LCD | Liquid Crystal Display
NVIC | Nested Vector Interrupt Controller
MCPWM | Motor Control Pulse Width Modulation
MPU | Memory Protection Unit
PWM | Pulse Width Modulation
QEI | Quadrature Encoder Interface
RIT | Repetitive Interrupt Timer
RTC | Real-Time Clock
SCB | System Control Block
SPI | Serial Peripheral Interface
SysTick | System Tick Timer
SW | Serial Wire
TIM | Timer Counter
UART | Universal Asynchronous Receiver/Transmitter
USB | Universal Serial Bus
HID | Human Interface Device
CDC | Communication Device Class
WDT | Watchdog Timer


Application Note

CORE

24_Aug_2010

1. Cortex-M3 processor

LPC17xx family chips is the new series chips that based on Cortex-M3 processor.

The Cortex-M3 processor is the first ARM processor based on the ARMv7-M architecture and has been specifically designed to achieve high system performance in power- and cost-sensitive embedded applications, such as microcontrollers, automotive body systems, industrial control systems and wireless networking, while significantly simplifying programmability to make the ARM architecture an option for even the simplest applications.

LPC1700CMSIS package used Core files delivered by CMSIS (ARM) version 2.1(release date: July 2011).

It is divided into two parts:

· Core Support

· Device Support

2. Core Support

ARM provides a Core Peripheral Access Layer which contains name definitions, address definitions and helper functions to access core register and peripherals.

· core_cm3.h: CMSIS Cortex-M3 Core Peripheral Access Layer Header file. It defines the core peripherals for the Cortex-M3 CPU and core peripherals.

It also defines Cortex-M3 Core Register structures:

o Nested Vectored Interrupt Controller (NVIC)

o System Control Block (SCB)

o System Tick Timer (SysTick)

o Instrumentation Trace Microcell (ITM)

o Interrupt Type

o Memory Protection Unit (MPU)

o Core Debug

And implements basic functions for:

o NVIC

o SysTick

o Reset

o Debug Input/Output

· core_cmFunc.h: CMSIS Cortex-M3 Core Function Access Header file. It provides functions that access core registers such as PSP, MSP, PriMask…

· core_cmInstr.h: CMSIS Cortex-CM3 Core Instruction Access Header file. It provides core instructions such as: WFI, NOP, WFE…

Core files support all of 3 compilers: RealView, IAR and GNU

3. Device Support

It provides LPC17xx device support files that allow user can access definition for all device peripherals. It also include startup file for ARM/GCC/IAR compiler.

3.1 Start-up files

It provides the Cortex-M startup code and the complete (device specific) Interrupt Vector Table

· For ARM compiler: “\Core\Device\NXP\LPC17xx\Source\Template\ARM\startup_LPC17xx.s”

· For GCC compiler: “\Core\Device\NXP\LPC17xx\Source\Template\GCC\startup_LPC17xx.s”

· For IAR compiler: “\Core\Device\NXP\LPC17xx\Source\Template\IAR\startup_LPC17xx.s”

3.2 LPC17xx header file

LPC17xx.h: CMSIS Cortex-M3 Core Peripheral Access Layer Header File for NXP LPC17xx Device Series

It defines the peripherals for the actual device.

3.3 System files

Provides a device specific configuration file for the device. It configures the device initializes typically the oscillator (PLL) that is part of the microcontroller device

system_LPC17xx.h: CMSIS System header file for NXP LPC17xx Device Series

system_LPC17xx.c: CMSIS System source file for NXP LPC17xx Device Series


Application Note

DEBUGGER

24_Aug_2010

1. J-link Emulator

1.1 J-Link

J-Link is a USB powered JTAG hardware debug probe supporting a large number of CPU cores. Based on a 32-bit RISC CPU, it can communicate at high speed with the supported target CPUs. J-Link is used around the world in tens of thousand places for development and production (flash programming) purposes.

J-Link support is integrated in most professional IDEs such as IAR, Keil, Rowley and many others.

Reference http://www.segger.com/cms/jlink.html website for getting more information about SEGGER J-Link

Reference http://www.iar.com/website1/1.0.1.0/369/1/ website for more information about IAR J-Link

Picture 1 SEGGER J-Link

Picture 2 IAR J-Link

1.2 J-Link Debug in Eclipse enviroment

LPC1700CMSIS can be setup and debug via J-link in Eclipse environment.

Please see “LPC1000 Software Development Toolchain” > “Sofware update requirement” > “Segger J-link” to know how to install Segger J-link GDB server and driver.

See more “LPC1000 Software Development Toolchain” > “Creating and working with LPC1000CMSIS project” > “Debug the project” to know how to use Jlink Segger to debug.

You can use command line configuration options to start the J-Link GDB server with a configuration file or set the listening port of the J-Link GDB Server. The configuration file can be used as an alternative to the gdbinit file.

LPC1700CMSIS supported two GDB initialize configuration file for debugging on both RAM/ROM mode:

..\gdb_ram_init.jlink: JLink configuration file for RAM mode

..\gdb_rom_init.jlink: JLink configuration file for ROM mode

In LPC1700CMSIS package, J-Link used for debug on Eclipse/ IAR platform.

Expecially, SEGGER J-Link also can debug on Keil platform but need debug setting re-configuration.

2. KEIL ULINK

The Keil ULINK family of Debug Adapters connect your PC's USB port to your target system (via JTAG or similar debug interface) and allow you to debug embedded programs running on target hardware.

2010-07-14 4-14-22 PM.jpg

Picture 3 Keil ULINK family

2.1 ULINKpro

Is a new debug unit that allows real-time data and instruction trace streaming via USB. ULINKpro supports:

· ARM7, ARM9, and Cortex-M devices

· Data and Instruction Trace for Cortex-M systems

· Sophisticated application analysis including execution profiling and code coverage

· High-Speed Flash Download

2.2 ULINK2

Replaces the original ULINK adapter.

· Supports various ARM7, ARM9, Cortex-M, 8051, and C166 devices

2.3 ULINK-ME

Offers a subset of the ULINK2 features:

· Supports ARM7, ARM9, Cortex-M, and NXP LPC900 devices

· Delivered and supported only as part of Keil or OEM Starter Kits

· Standard 20-pin (0.1") JTAG and 10-pin (0.05") Cortex Debug connectors

In this package, ULINK used for debug in Keil platform


Application Note

DRIVERS

24_Aug_2010

LPC1700CMSIS package provides all needed driver for LPC17xx peripheral placed at “..\Driver” folder.

It divided into two parts:

· Include: provide header files that contains definition macros, structure, enumeration type used by driver.

· Source: provide source file that implement driver functions.

All driver’s information can be found in this Manual in “Contents” tab > “LPC1700CMSIS Firmware Library” section

1. Driver list

This table shows driver list that supported by LPC1700CMSIS package.

Driver | Header Files | Source Files
ADC | lpc17xx_adc.h | lpc17xx_adc.c
CAN | lpc17xx _can.h | lpc17xx _can.c
CLKPWR | lpc17xx_clkpwr.h | lpc17xx_clkpwr.c
DAC | lpc17xx_dac.h | lpc17xx_dac.c
EMAC | lpc17xx_emac.h | lpc17xx_emac.c
EXTI | lpc17xx_exti.h | lpc17xx_exti.c
GPDMA | lpc17xx_gpdma.h | lpc17xx_gpdma.c
GPIO | lpc17xx_gpio.h | lpc17xx_gpio.c
I2C | lpc17xx_i2c.h | lpc17xx_i2c.c
I2S | lpc17xx_i2s.h | lpc17xx_i2s.c
MCPWM | lpc17xx_mcpwm.h | lpc17xx_mcpwm.c
NVIC | lpc17xx_nvic.h | lpc17xx_nvic.c
PINSEL | lpc17xx_pinsel.h | lpc17xx_pinsel.c
PWM | lpc17xx_pwm.h | lpc17xx_pwm.c
QEI | lpc17xx_qei.h | lpc17xx_qei.c
RIT | lpc17xx_rit.h | lpc17xx_rit.c
RTC | lpc17xx_rtc.h | lpc17xx_rtc.c
SPI | lpc17xx_spi.h | lpc17xx_spi.c
SSP | lpc17xx_ssp.h | lpc17xx_ssp.c
SYSTICK | lpc17xx_systick.h | lpc17xx_systick.c
TIM | lpc17xx_timer.h | lpc17xx_timer.c
UART | lpc17xx_uart.h | lpc17xx_uart.c
WDT | lpc17xx_wdt.h | lpc17xx_wdt.c

Table 1 Driver list

2. Type definitions

LPC1700CMSIS defines C standard type in “lpc_types.h”.

It is intended to be used in ISO C conforming development environments and checks for this insofar as it is possible to do so.

3. Debug frame work

LPC1700CMSIS implements some utilities that used for debugging through UART port in:

· debug_frmwrk.h: debug frame work header file

· debug_frmwrk.c: debug frame work source file

This is the table list of supported functions for serial display

Function | Description
_DBG(x) | Display a string of character
_DBG_(x) | Display s string of characters and move to new line
_DBC(x) | Display a character
_DBD(x) | Display a 8-bit decimal number
_DBD16(x) | Display a 16-bit decimal number
_DBD32(x) | Display a 32-bit decimal number
_DBH(x) | Display a 8-bits hex number
_DBH16(x) | Display a 16-bits hex number
_DBH32(x) | Display a 32-bits hex number
_DG( ) | Get a charater from UART port

Table 2 Debug framework supported functions

Usually, examples required UART for displaying their data or information as follow configuration:

· UART0

· 115200 bps

· 8 databits

· None parity

· 1 stop bit

· No flow control

4. Driver flag definition

Each driver source file in LPC1700CMSIS defines a flag that used to add in “lpc17xx_libcfg.h”. When building example, just needed driver defined in “lpc17xx_libcfg.h” file are compiled to reduce code size.

Note that: These flags are useful when using GNU compiler. If you run them in Keil or IAR platform, unused sections will be discarded automatically.

This is the list of supported driver flag definition

Function | Description
DEBUG | Enable/Disable debugger
_DBGFRW | Enable/Disable debug framework
_GPIO | Enable/Disable General Purpose Intput/Output (GPIO) driver
_EXTI | Enable/Disable External Interrupt (EXTI) driver
_UART | Enable/Disable Universal Asynchronous Receiver/Transmitter (UART) driver
_UART0 | Enable/Disable UART0 driver
_UART1 | Enable/Disable UART1 driver
_UART2 | Enable/Disable UART2 driver
_UART3 | Enable/Disable UART3 driver
_SPI | Enable/Disable Serial Peripheral Interface (SPI) driver
_SYSTICK | Enable/Disable System Tick Timer (SYSTICK) driver
_SSP | Enable/Disable Synchronous Serial Port (SSP) driver
_SSP0 | Enable/Disable SSP0 driver
_SSP1 | Enable/Disable SSP1 driver
_I2C | Enable/Disable Inter-integrated circuit (I2C) driver
_I2C0 | Enable/Disable I2C0 driver
_I2C1 | Enable/Disable I2C1 driver
_I2C2 | Enable/Disable I2C2 driver
_TIM | Enable/Disable Timer Counter (TIM) driver
_WDT | Enable/Disable Watchdog Timer (WDT) driver
_GPDMA | Enable/Disable General Purpose Direct Memory Access (GPDMA) driver
_DAC | Enable/Disable Digital-Analog Converter (DAC) driver
_ADC | Enable/Disable Analog-Digital Converter (ADC) driver
_PWM | Enable/Disable Pulse Width Modulation (PWM) driver
_PWM1 | Enable/Disable _PWM1 driver
_RTC | Enable/Disable Real-time Clock (RTC) driver
_I2S | Enable/Disable Integrated Interchip Sound driver
_USBDEV | Enable/Disable Universal Serial Bus Device (USBDEV) driver
_CAN | Enable/Disable Controller Area Network (CAN) driver
_RIT | Enable/Disable Repetitive Interrupt Timer (RIT) driver
_EMAC | Enable/Disable Ethernet Media Access Controller (EMAC) driver

Table 3 Supported driver flag definition


Application Note

EVALUATION BOARDS

24_Aug_2010

LPC1700CMSIS was tested on:

1. Keil MCB1700 with LPC1768 version 1.0

See http://www.keil.com/mcb1700/ for more information about this kit

Reference:

MCB1700 datasheet

2. IAR LPC1768 KickStart vers.A

See http://www.iar.com/website1/1.0.1.0/658/1/?item=prod_prod-s1/487 for more information about this kit

Reference:

IAR-LPC1768KS datasheet


Application Note

EXAMPLE LIST

24_Aug_2010

This is the list of examples that supported in LPC1700CMSIS package

Peripheral | Example | Description
ADC | Burst | This example describes how to use ADC conversion in burst mode with single or multiple input updated
 | DMA | This example describes how to use ADC coversion and transfer converted data by using DMA
 | INTERRUPT | This example describes how to use ADC conversion in interrupt mode.
 | HardwareTrigger | This example describes how to use ADC conversion in hardware-triggered mode.
 | Polling | This example describes how to use ADC conversion in polling mode.
CAN | CAN_LedControl | This example describes how to use CAN frames to control LED display new
 | CAN_self_test | This example describes how to test CAN self-test mode
 | CAN_test_aflut | This example describes how to use CAN driver functions for setup and change AFLUT table dynamically
 | CAN_test_bypass_mode | This example describes how to test CAN operation by using bypass mode
 | CAN_test_two_kit | This example describes how to configure CAN operation in two boards seperately
Cortex-M3 | Bit-banding | This example describes how to test Bit-banding feature of Cortex-M3 processor
 | MPU | This example describes how to use MPU to protect memory region new
 | Privilege_mode | This example describes how to change privilege to unprivilege mode and vice vesa.
DAC | DMA | This example describes how to use DMA to transfer data to DAC peripheral
 | SineWave | This example describes how to use DMA to generate a sinewave signal
 | Speaker | This example describes how to test DAC through speaker
 | WaveGenerate | This example describes how to use DMA to generate multi signal forms new
EMAC | Easy_Web | This example describes how to implement an simple web application
 | EmacRaw | This example describes how to test EMAC driver with raw packet frame format that is not related with any upper-layer (i.e. TCP/IP...).
 | uIP | This example describes how to handle a single network interface and contains the IP,ICMP, UDP and TCP protocols.
GPDMA | Flash_2_Ram_Test | This example describes how to configure GPDMA to transfer data from Flash to Ram memory
 | Ram_2_Ram_Test | This example describes how to configure GPDMA to transfer data from internal RAM memory to internal RAM memory, using interrupt mode
 | GPDMA_Sleep | This example describes how to test GPDMA operation in sleep mode
 | Link_list | This example describes how to use GPDMA Link-list function new
GPIO | GPIO_Interrupt | This example describes how to use GPIO interrupt function.
 | LedBlinky | A simple program to test GPIO interrupt functionality to drive LED
I2C | master | This example describes how to use I2S as master device to communicate with I2S slave device in polling mode Note: this example will run combine with slave example at folder \slave.
 | Master_Slave_Interrupt | This example describes how uses I2C as master device to transfer data from/to I2Cslave device
 | pca8581_polling | This example describes how to use I2C to communicate with EEPROM PCA8581
 | Monitor | This example describes how to use I2C to monitor traffic on I2C bus new
 | sc16is750_int | This example describes how to use I2C to communicate with SC16IS750/760 Demo Board in interrupt mode.
 | sc16is759_polling | This example describes how to use I2C to communicate with SC16IS750/760 Demo Board in polling mode.
 | slave | This example describes how to use I2S as slave device to communicate with I2S master device in polling mode Note: this example will run combine with master example at folder \master.
I2S | I2S_DMA | This example describes how to use I2S in DMA mode
 | I2S_IRQ | This example describes how to use I2S to transfer data in interrupt mode
 | I2S_MCLK | This example describes how to use I2S master clock as I2S clock source
 | I2S_test_4_wire | This example describes how to configure I2S peripheral to run in 4 wire mode
 | I2S_two_kit | This example describes how to configure I2S peripheral to communication between two board.
 | Polling | This example describes how to use I2S to transfer data in polling mode
LCD | NOKIA6610_LCD | This example describes how to use LCD NOKIA6610 on IAR-LPC1768-KS board
 | QVGA_TFT_LCD | This example describes how to use QVGA_TFT on IAR-LPC1768-KS board
MCPWM | MCPWMSimple | This example describes how to test Motor Control PWM module in LPC17xx
NVIC | Priority | This example describes how to configure NVIC priority grouping for testing tail-chaining/Late-arriving interrupt mode
Project_Template | Eclipse_GNU | This is GNU project template
 | IAR_EWARM | This is IAR project template
 | Keil_RealView_MDK | This is Keil project template
PWM | Dual_Edge | This example describes how to generate PWM signal on 3 Channels in both edge mode and single mode.
 | Match_Interrupt | This example describes how to use PWM Match function in interrupt mode
 | Single_Edge | This example describes how to use PWM signal on 6 Channels in single edge mode
PWR | EXTINT_Sleep | This example describes how to enter system in sleep mode and wake-up by using external interrupt
 | NMI_PowerDown | This example describes how to enter system in PowerDown mode and wake-up it by using NMI (Non-Maskable Interrupt)
 | RTC_DeepPWD | This example describes how to enter system in Deep PowerDown mode and wake-up by using RTC (Real-time clock) interrupt
 | WDT_DeepSleep | This example describes how to enter system in DeepSleep mode and wake up it by using WDT Interrupt
QEI | QEI_Velo | This example describes how to use Quadrature Encoder Interface module to calculate velocity and detect direction changing
RIT | Interrupt | This example describes how to use RIT as a timer to generate interrupt to drive LED
RTC | AlarmCntIncrInterrupt | This example describes how to generate interrupt in Second Counter Increment Interrupt (1s) and generate Alarm interrupt at 10s
 | Calibration | This example describes how to calibrate real-time clock
SPI | Loopback | This example describes how to test SPI operation by using loop-back mode
 | Master | This example describes how to use SPI as master to connect with SPI slave Note: this example will run combine with slave example at folder \Slave.
 | sc16is750_int | This example describes how to use SPI in interrupt mode to communicate withSC16IS750/760 Demo Board.
 | sc16is750_polling | This example describes how to use SPI in polling mode to communicate withSC16IS750/760 Demo Board.
 | SDCard | This example describes how to use SPI to read SD card's CID register new
 | Slave | This example describes how to use SPI as slave to connect with SPI master Note: this example will run combinate with master example at folder \Master.
SSP | dma | This example describes how to use SSP peripheral with DMA support.
 | Master | This example describes how to use SSP peripheral as master to connect with SSP slave Note: this example will run combinate with slave example at folder \Slave.
 | Microwire | This example describes how to use SSP peripheral with MicroWire frame format.
 | sc16is750_int | This example describes how to use SSP in interrupt mode to communicate withSC16IS750/760 Demo Board.
 | sc16is750_polling | This example describes how to use SSP in polling mode to communicate withSC16IS750/760 Demo Board.
 | Slave | This example describes how to use SSP peripheral as slave to connect with SSP master Note: this example will run combinate with master example at folder \Master.
 | TI | This example describes how to use SSP peripheral with TI frame format.
SysTick | 10ms_base | This example describes how to configure System Tick timer to generate interrupt each 10ms
 | STCLK | This example describes how to configure System Tick timer use external clock source STCLK new
TIMER | Capture | This example describes how to use Capture Timer function.
 | FreqMeasure | This example describes how to use Timer to measure a signal's frequency new
 | Gen_Diff_Delay | This example describes how to use Timer Match to generate different delay signals new
 | Gen_Diff_Freqs | This example describes how to use Timer Match to generate 2 different frequency signals new
 | Interrupt_Match | This example describes how to use Timer Match to generate specific time in interrupt mode.
 | Polling_Match | This example describes how to use Timer Match to generate specific time in polling mode.
 | PWMSignal | This example describes how to use TIMERs to generate PWM signals with different duty cycles
UART | Autobaud | This is a simple UART example using auto baudrate mode
 | DMA | This example describes how to use UART in DMA mode
 | HWFlowControl | This example describes how to use UART in hardware flow control mode
 | Interrupt | This example describes how to use UART in interrupt mode
 | IrDA | Include transmit and receive example, describes how to use UART in IrDA mode
 | Polling | This example describes how to use UART in polling mode
 | RS485_Master | This example describes how to use RS485 functionality on UART1 of LPC1768 in master mode.
 | RS485_Slave | This example describes how to use RS485 functionality on UART1 of LPC1768 in slave mode.
 | UART1_FullModem | This is a simple UART example using UART1 will Full modem mode
USBDEV | USBAudio | This example describes how to use USBDEV on LPC1768 to demo the USB Audio Device - Speaker new
 | USBCDC | This example describes how to use USBDEV on LPC1768 to demo the virtual COM port new
 | USBHID | This example describes how to use USBDEV on LPC1768 to run a simple HID application.
 | USBMassStorage | This example describes how to write a simple USB Mass Storage application on LPC1768.
WDT | INTERRUPT | This example describes how to use WDT to generate interrupt after a specific time.
 | RESET | This example describes how to use WDT to generate chip reset after a specific time.

Table 1 Example list


Application Note

EXAMPLES

24_Aug_2010

Examples supported in LPC1700CMSIS are the simple examples that used to verify almost fully LPC17xx peripheral functions and some Cortex-M3 feature.

They provide customers an overview about how to initialize and configure peripherals for implement their applications. These examples are also useful for quick demo/testing peripheral functions without deep-knowledge about internal design.

Reference:

· Read “LPC1000 Software Development Toolchain” to know how to build an run examples in GNU-Eclipse/ Keil/ IAR platform.

· Read “Example list” to have list quick information of supported example in this package

· Read “LPC17xx Example Description” for detail descriptions about each of example in this package (hardware configuration, step to run…)


Application Note

LIB BUILDING

24_Aug_2010

Using:

· “libs” target to build driver lib.

· “distclean” target to clean object file and remove library file.

After run ‘libs’ target, LPC17xx library file was created and placed at “..\Driver\library\DriversLPC17xxgnu.a”


Application Note

MAKE SECTION

24_Aug_2010

Files placed at directory “..\makesection” are used for creating makefile purpose. They contains common makefile definitions, build rules, file types and linker files…

It’s divided into three parts:

· Makerule

· Tools

· Make configuration file

1. Makerule

It contains:

· Common: includes IAR linker files and common makefile rules

o ..\common\ldscript_iram_iar.ld: IAR linker file for RAM mode

o ..\common\ldscript_irom_iar.ld: IAR linker file for ROM mode

o ..\common\make.rules.build: default build rules used by all compiler chains

o ..\common\make.rules.enviroment: root level makefile that is used by all the lowlevel makefiles to resolve architecture specific and path dependencies

o ..\common\make.rules.ftypes: default file types used by all compiler chains

· Example: includes GNU linker files and example makefile

o ..\example\ldscript_ram_gnu.ld: GNU linker file for RAM mode

o ..\example\ldscript_ram_v00_gnu.ld: GNU linker file for RAM mode of LPC17xx chip revision V00 only

o ..\example\ldscript_rom_gnu.ld: GNU linker file for ROM mode

o ..\example\ldscript_rom_v00_gnu.ld: GNU linker file for ROM mode of LPC17xx chip revision V00 only

o ..\example\makefile.ex: example makefile

· LPC17xx:

o ..\LPC17xx\make.LPC17xx.gnu: defines make rules for the GNU toolset

Tip

When uncomment this line in make.LPC17xx.gnu file:

LK           += -Wl,--gc-sections -Wl,--print-gc-sections

GNU compiler will discard unused section when building example. So it causes reducing code size.

But this flag can affect debugger and cause it runs incorrectly,

So we just recommend using it in “run standalone” mode.

2. Tools

Contains a set of GNUARM toolchain to generate Makefile. It required by the LPC Software package build system to run Makefiles.

It includes:

Utility | Function
arm-elf-objcopy.exe | utility that convert ELF files into BIN files
astyle.cfg | a style configuration options for NXP releasable code
astyle.exe | utility to format the code
cp.exe | copy files and directories
cygwin1.dll | acts as a Linux API emulation layer providing substantial Linux API functionality
echo.exe | echoes characters from the command line to the standard output
ls.exe | lists information about files
make.exe | automatically building applications
makedepend.exe | generates the dependency rules for make
mkdir.exe | creates directories with the specified names
mv.exe | moves or renames files
rm.exe | remove files or directories
rmdir.exe | remove empty directories
sh.exe | shell command tool
touch.exe | change file timestamps

Table 1 Set of tools

3. Makeconfig

makeconfig: This is a configuration file for “make” section. Used to add path of “tools” directory.

Variable | Description | Default
PROJ_ROOT | The path that placed project | C:/nxpdrv/LPC1700CMSIS
CMCORE_TYPE | CM Core type | CM3
DEVICE | Device name | LPC17xx
MANUFACTURE | Manufacture name | NXP
TOOL | Compiler tool name | gnu
DEBUG_MODE | Debug mode | 1 (enable debug)
GNU_INSTALL_ROOT | The path that installed GNU tools | C:/Program Files/CodeSourcery/Sourcery G++ Lite
GNU_VERSION | GNU version | 4.3.3
IAR_INSTALL_ROOT | The path that installed IAR Workbench | C:/Program Files/IAR Systems/Embedded Workbench 5.0 Kickstart
KEIL_INSTALL_ROOT | The path that installed Keil | C:/Keil

Table 2 List of variable in makeconfig file


Application Note

SUPPORTED MICROCONTROLLERS

24_Aug_2010

LPC1700CMSIS package was implemented and tested base on LPC1768 chip, but it’s also compatible with vary other Cortex-M3 LPC17xx family chips.

This is table list supported microcontrollers.

Type number | Max.CPU speed | Flash | Total SRAM | Ethernet | USB | CAN | I²S | DAC | Package
LPC1769FBD100 | 120MHz | 512kB | 64kB | Yes | Device/Host/OTG | 2 | Yes | Yes | 100 pin
LPC1768FBD100 | 100MHz | 512kB | 64kB | Yes | Device/Host/OTG | 2 | Yes | Yes | 100 pin
LPC1767FBD100 | 100MHz | 512kB | 64kB | Yes | No | no | Yes | Yes | 100 pin
LPC1766FBD100 | 100MHz | 256kB | 64kB | Yes | Device/Host/OTG | 2 | Yes | Yes | 100 pin
LPC1765FBD100 | 100MHz | 256kB | 64kB | No | Device/Host/OTG | 2 | Yes | Yes | 100 pin
LPC1764FBD100 | 100MHz | 128kB | 32kB | Yes | Device | 2 | No | No | 100 pin
LPC1759FBD80 | 120MHz | 512kB | 64kB | No | Device/Host/OTG | 2 | Yes | Yes | 80 pin
LPC1758FBD80 | 100MHz | 512kB | 64kB | Yes | Device/Host/OTG | 2 | Yes | Yes | 80 pin
LPC1756FBD80 | 100MHz | 256kB | 32kB | No | Device/Host/OTG | 2 | Yes | Yes | 80 pin
LPC1754FBD80 | 100MHz | 128kB | 32kB | No | Device/Host/OTG | 1 | No | Yes | 80 pin
LPC1752FBD80 | 100MHz | 64kB | 16kB | No | Device | 1 | No | No | 80 pin
LPC1751FBD80 | 100MHz | 32kB | 8kB | No | Device | 1 | No | No | 80 pin

Table 1 LPC17xx family chips

· About High speed versions (LPC1769 and LPC1759) operate at up to 120MHz CPU frequency, please modify “system_LPC17xx.c” file placed at “..\Core\CM3\DeviceSupport\NXP\LPC17xx” if you want to upgrade speed (This file just configures for speed at 100MHz CPU frequency).

· Depending on features (memory space and peripheral supported) of each chip, choose suitable examples for running.

More reference

LPC17xx User Manual: http://ics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc17xx.pdf

LPC1768 Errata sheet: http://ics.nxp.com/support/documents/microcontrollers/pdf/errata.lpc1768.pdf


Application Note

SUPPORTED TOOLCHAINS

24_Aug_2010

LPC1700CMSIS package supports these toolchains:

1. CodeSourcery G++ Lite toolchain version 4.3.3 with C/C++ Eclipse IDE version 3.4.2

2. Keil - RealView Microcontroller Development Kit RVMDK version 4.0

3. IAR - Embedded Workbench for ARM EWARM version 6.0

1. CodeSourcery G++ Lite toolchain with Eclipse IDE

1.1 CodeSourcery G++ Lite toolchain version 4.3.3

CodeSourcery, in partnership with ARM, Ltd., develops improvements to the GNU Toolchain for ARM processors and provides regular, validated releases of the GNU Toolchain.

Sourcery G++ Lite Edition supports ARM, Thumb, and Thumb-2 compilation for all architectures in active use, including Version 7 of the ARM Architecture.

1.2 Eclipse IDE

Eclipse is a multi-language software development environment comprising an integrated development environment (IDE) and an extensible plug-in system.

Release under the term of the Eclipse Public License, Eclipse is free and open source software.

Because CodeSourcery toolchain and Eclipse IDE are free software, so configuration for them is more complicated.

This package also supports a GNU template project for customer develope their application on Eclipse environment with GNU compiler easier.

Please read “LPC1000 Software Development Toolchain” to get more information about installing and setting up environment for using LPC1700CMSIS package.

Reference “MAKE section” in Package Description chapter of Overview Manual to know the way for using makefile and supported GNU flag options to build examples.

Also reference “LPC1000 Software Development Toolchain” > chapter 3 “Creating and working with LPC1000CMSIS project” > part 4.12 “GNU-Project template” to know how using GNU project template for developing their application.

2. Keil - RealView Microcontroller Development Kit RVMDK version 4.0

The RealView Microcontroller Development Kit (MDK) supports ARM7, ARM9, and Cortex-M3 technology-based microcontrollers from Analog Devices, Atmel, Freescale, Luminary, NXP (founded by Philips), OKI, Samsung, Sharp, STMicroelectronics, and TI.

This kit is perfect for the developer who requires industry-standard compilation tools and sophisticated debugging support.

It includes:

· Integrated Development Enviroment: µVision IDE

· Debugger

· Simulator

LPC1700CMSIS supports project files that allow customers run example on Keil environment. It’s so easy for using, loading and debugging.

Project and all needed configure files for Keil placed at “\Keil” folder in each example.

It includes:

· *.uvopt: Option file

· *.uvproj: Project file

· RAM.ini: Ram initialize file

· Flash.ini: Flash initialize file (optional)

This library package also supports a template Keil project (placed at “..\Examples\Project_Template\Keil_RealView_MDK” for customers easier to implement their application on Keil by themselves.

Please reference “LPC1000 Sotfware Development Toolchain” > chapter 5 “Using LPC1000CMSIS driver package with extension tools” > part 1 “Keil RealView –MDK” for more information about running example or implement application in Keil environment with The µVision IDE

3. IAR - Embedded Workbench for ARM EWARM version 6.0

IAR Embedded Workbench is a set of development tools for building and debugging embedded system applications using assembler, C and C++. It provides a completely integrated development environment that includes a project manager, editor, build tools and the C-SPY debugger.

IAR C/C++ Compiler is well known for its efficient code generation, each compiler contains both generic global optimizations as well as low-level chip-specific optimizations that ensure a small code size while taking advantage of all the specific features of your selected device.

It includes:

· Intergrated Development Enviroment: IAR Embedded Workbend IDE

· Debugger

· Simulator

LPC1700CMSIS supports project files that allow customers run examples on IAR environment. It’s so easy for using, loading and debugging.

Project and all needed configure files for IAR placed at “\EWARM” folder in each example.

It includes:

· *.ewd: project setting file

· *.ewp: IAR Embedded Workbench project file

· *.eww: workspace file

· RAM.mac: RAM initialize file

This library package also supports a template Keil project for customers easy to implement their application on IAR themselves

Please reference “LPC1000 Sotfware Development Toolchain” > chapter 5 “Using LPC1000CMSIS driver package with extension tools” > part 1 “Keil RealView –MDK” for more information about running example/developing application in IAR environment.


CMSIS Release Notes

Release Notes for CMSIS V2.00

November 2010

Information in this file, the accompany manuals, and software is
Copyright © ARM Ltd.
All rights reserved.

Contents

  • CMSIS Version History lists the changes between the different CMSIS versions.
  • CMSIS Core Support contains a general description for CMSIS.
  • CMSIS DSP Software Library describes the CMSIS DSP software library.
  • CMSIS System View Description describes the CMSIS System View Description.
  • CMSIS Support for Cortex-M4 SIMD Instructions lists the Cortex-M4 instructions supported by CMSIS.
  • CMSIS Debug Support describes the available CMSIS Debug functions and the used methods.
  • License


CMSIS: Cortex-M4 SIMD Instructions

CMSIS Support for Cortex-M4 SIMD Instructions

This file describes the Cortex-M4 SIMD instructions supported by CMSIS.

Version: 1.00 - 25. November 2010

Information in this file, the accompany manuals, and software is
Copyright © ARM Ltd.
All rights reserved.

Revision History

  • Revision 0.01 - January 2010: Initial version
  • Revision 0.02 - June 2010: added __QADD, __QSUB
  • Revision 1.00 - November 2010:

Contents

  1. About
  2. Cortex-M4 SIMD instruction support
  3. Examples

About

CMSIS provides for the Cortex-M4 a set of functions supporting Cortex-M4 SIMD instructions.

Cortex-M4 SIMD instruction support

CMSIS supports the following functions for Cortex-M4 instructions:

Name | Mnemonic | Description
__SADD8 | SADD8 | GE setting quad 8-bit signed addition
__QADD8 | QADD8 | Q setting quad 8-bit saturating addition
__SHADD8 | SHADD8 | Quad 8-bit signed addition with halved results
__UADD8 | UADD8 | GE setting quad 8-bit unsigned addition
__UQADD8 | UQADD8 | Quad 8-bit unsigned saturating addition
__UHADD8 | UHADD8 | Quad 8-bit unsigned addition with halved results
__SSUB8 | SSUB8 | GE setting quad 8-bit signed subtraction
__QSUB8 | QSUB8 | Q setting quad 8-bit saturating subtract
__SHSUB8 | SHSUB8 | Quad 8-bit signed subtraction with halved results
__USUB8 | USUB8 | GE setting quad 8-bit unsigned subtract
__UQSUB8 | UQSUB8 | Quad 8-bit unsigned saturating subtraction
__UHSUB8 | UHSUB8 | Quad 8-bit unsigned subtraction with halved results
__SADD16 | SADD16 | GE setting dual 16-bit signed addition
__QADD16 | QADD16 | Q setting dual 16-bit saturating addition
__SHADD16 | SHADD16 | Dual 16-bit signed addition with halved results
__UADD16 | UADD16 | GE setting dual 16-bit unsigned addition
__UQADD16 | UQADD16 | Dual 16-bit unsigned saturating addition
__UHADD16 | UHADD16 | Dual 16-bit unsigned addition with halved results
__SSUB16 | SSUB16 | GE setting dual 16-bit signed subtraction
__QSUB16 | QSUB16 | Q setting dual 16-bit saturating subtract
__SHSUB16 | SHSUB16 | Dual 16-bit signed subtraction with halved results
__USUB16 | USUB16 | GE setting dual 16-bit unsigned subtract
__UQSUB16 | UQSUB16 | Dual 16-bit unsigned saturating subtraction
__UHSUB16 | UHSUB16 | Dual 16-bit unsigned subtraction with halved results
__SASX | SASX | GE setting dual 16-bit addition and subtraction with exchange
__QASX | QASX | Q setting dual 16-bit add and subtract with exchange
__SHASX | SHASX | Dual 16-bit signed addition and subtraction with halved results
__UASX | UASX | GE setting dual 16-bit unsigned addition and subtraction with exchange
__UQASX | UQASX | Dual 16-bit unsigned saturating addition and subtraction with exchange
__UHASX | UHASX | Dual 16-bit unsigned addition and subtraction with halved results and exchange
__SSAX | SSAX | GE setting dual 16-bit signed subtraction and addition with exchange
__QSAX | QSAX | Q setting dual 16-bit subtract and add with exchange
__SHSAX | SHSAX | Dual 16-bit signed subtraction and addition with halved results
__USAX | USAX | GE setting dual 16-bit unsigned subtract and add with exchange
__UQSAX | UQSAX | Dual 16-bit unsigned saturating subtraction and addition with exchange
__UHSAX | UHSAX | Dual 16-bit unsigned subtraction and addition with halved results and exchange
__USAD8 | USAD8 | Unsigned sum of quad 8-bit unsigned absolute difference
__USADA8 | USADA8 | Unsigned sum of quad 8-bit unsigned absolute difference with 32-bit accumulate
__SSAT16 | SSAT16 | Q setting dual 16-bit saturate
__USAT16 | USAT16 | Q setting dual 16-bit unsigned saturate
__UXTB16 | UXTB16 | Dual extract 8-bits and zero-extend to 16-bits
__UXTAB16 | UXTAB16 | Extracted 16-bit to 32-bit unsigned addition
__SXTB16 | SXTB16 | Dual extract 8-bits and sign extend each to 16-bits
__SXTAB16 | SXTAB16 | Dual extracted 8-bit to 16-bit signed addition
__SMUAD | SMUAD | Q setting sum of dual 16-bit signed multiply
__SMUADX | SMUADX | Q setting sum of dual 16-bit signed multiply with exchange
__SMLAD | SMLAD | Q setting dual 16-bit signed multiply with single 32-bit accumulator
__SMLADX | SMLADX | Q setting pre-exchanged dual 16-bit signed multiply with single 32-bit accumulator
__SMLALD | SMLALD | Dual 16-bit signed multiply with single 64-bit accumulator
__SMLALDX | SMLALDX | Dual 16-bit signed multiply with exchange with single 64-bit accumulator
__SMUSD | SMUSD | Dual 16-bit signed multiply returning difference
__SMUSDX | SMUSDX | Dual 16-bit signed multiply with exchange returning difference
__SMLSD | SMLSD | Q setting dual 16-bit signed multiply subtract with 32-bit accumulate
__SMLSDX | SMLSDX | Q setting dual 16-bit signed multiply with exchange subtract with 32-bit accumulate
__SMLSLD | SMLSLD | Q setting dual 16-bit signed multiply subtract with 64-bit accumulate
__SMLSLDX | SMLSLDX | Q setting dual 16-bit signed multiply with exchange subtract with 64-bit accumulate
__SEL | SEL | Select bytes based on GE bits
__QADD | QADD | Q setting saturating add
__QSUB | QSUB/td> | Q setting saturating subtract

Function __SADD8

Summary
uint32_t __SADD8(uint32_t val1, uint32_t val2);
Description This function enables you to perform four 8-bit signed integer additions.
The GE bits in the APSR are set according to the results of the additions.
Parameter
  • val1: first four 8-bit summands.
  • val2: second four 8-bit summands.
Return Value

The function returns:

  • the addition of the first bytes from each operand, in the first byte of the return value.
  • the addition of the second bytes of each operand, in the second byte of the return value.
  • the addition of the third bytes of each operand, in the third byte of the return value.
  • the addition of the fourth bytes of each operand, in the fourth byte of the return value.

Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
If res is the return value, then:

  • if res[7:0] ≥ 0 then APSR.GE[0] = 1 else 0
  • if res[15:8] ≥ 0 then APSR.GE[1] = 1 else 0
  • if res[23:16] ≥ 0 then APSR.GE[2] = 1 else 0
  • if res[31:24] ≥ 0 then APSR.GE[3] = 1 else 0
Operation
res[7:0]   = val1[7:0]   + val2[7:0]
res[15:8]  = val1[15:8]  + val2[15:8]
res[23:16] = val1[23:16] + val2[23:16]
res[31:24] = val1[31:24] + val2[31:24]

Function __QADD8

Summary
uint32_t __QADD8(uint32_t val1, uint32_t val2);
Description This function enables you to perform four 8-bit integer additions, saturating the results to the 8-bit signed integer range -27 ≤ x ≤ 27 - 1.
Parameter
  • val1: first four 8-bit summands.
  • val2: second four 8-bit summands.
Return Value

The function returns:

  • the saturated addition of the first byte of each operand in the first byte of the return value.
  • the saturated addition of the second byte of each operand in the second byte of the return value.
  • the saturated addition of the third byte of each operand in the third byte of the return value.
  • the saturated addition of the fourth byte of each operand in the fourth byte of the return value.

The returned results are saturated to the 16-bit signed integer range -27 ≤ x ≤ 27 - 1.

Operation
res[7:0]   = val1[7:0]   + val2[7:0]
res[15:8]  = val1[15:8]  + val2[15:8]
res[23:16] = val1[23:16] + val2[23:16]
res[31:24] = val1[31:24] + val2[31:24]

Function __SHADD8

Summary
uint32_t __SHADD8(uint32_t val1, uint32_t val2);
Description This function enables you to perform four signed 8-bit integer additions, halving the results.
Parameter
  • val1: first four 8-bit summands.
  • val2: second four 8-bit summands.
Return Value

The function returns:

  • the halved addition of the first bytes from each operand, in the first byte of the return value.
  • the halved addition of the second bytes from each operand, in the second byte of the return value.
  • the halved addition fo the third bytes from each operand, in the third byte of the return value.
  • the halved addition of the fourth bytes from each operand, in the fourth byte of the return value.
Operation
res[7:0]   = (val1[7:0]   + val2[7:0])   >> 1
res[15:8]  = (val1[15:8]  + val2[15:8])  >> 1
res[23:16] = (val1[23:16] + val2[23:16]) >> 1
res[31:24] = (val1[31:24] + val2[31:24]) >> 1

Function __UADD8

Summary
uint32_t __UADD8(uint32_t val1, uint32_t val2);
Description This function enables you to perform four unsigned 8-bit integer additions.
The GE bits in the APSR are set according to the results.
Parameter
  • val1: first four 8-bit summands for each addition.
  • val2: second four 8-bit summands for each addition.
Return Value

The function returns:

  • the addition of the first bytes in each operand, in the first byte of the return value.
  • the addition of the second bytes in each operand, in the second byte of the return value.
  • the addition of the third bytes in each operand, in the third byte of the return value.
  • the addition of the fourth bytes in each operand, in the fourth byte of the return value.

Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
If res is the return value, then:

  • if res[7:0] ≥ 0x100 then APSR.GE[0] = 1 else 0
  • if res[15:8] ≥ 0x100 then APSR.GE[1] = 1 else 0
  • if res[23:16] ≥ 0x100 then APSR.GE[2] = 1 else 0
  • if res[31:24] ≥ 0x100 then APSR.GE[3] = 1 else 0
Operation
res[7:0]   = val1[7:0]   + val2[7:0]
res[15:8]  = val1[15:8]  + val2[15:8]
res[23:16] = val1[23:16] + val2[23:16]
res[31:24] = val1[31:24] + val2[31:24]

Function __UQADD8

Summary
uint32_t __UQADD8(uint32_t val1, uint32_t val2);
Description This function enables you to perform four unsigned 8-bit integer additions, saturating the results to the 8-bit unsigned integer range 0 ≤ x ≤ 28 - 1.
Parameter
  • val1: first four 8-bit summands.
  • val2: second four 8-bit summands.
Return Value

The function returns:

  • the addition of the first bytes in each operand, in the first byte of the return value.
  • the addition of the second bytes in each operand, in the second byte of the return value.
  • the addition of the third bytes in each operand, in the third byte of the return value.
  • the addition of the fourth bytes in each operand, in the fourth byte of the return value.

The results are saturated to the 8-bit unsigned integer range 0 ≤ x ≤ 28 - 1.

Operation
res[7:0]   = val1[7:0]   + val2[7:0]
res[15:8]  = val1[15:8]  + val2[15:8]
res[23:16] = val1[23:16] + val2[23:16]
res[31:24] = val1[31:24] + val2[31:24]

Function __UHADD8

Summary
uint32_t __UHADD8(uint32_t val1, uint32_t val2);
Description This function enables you to perform four unsigned 8-bit integer additions, halving the results.
Parameter
  • val1: first four 8-bit summands.
  • val2: second four 8-bit summands.
Return Value

The function returns:

  • the halved addition of the first bytes in each operand, in the first byte of the return value.
  • the halved addition of the second bytes in each operand, in the second byte of the return value.
  • the halved addition of the third bytes in each operand, in the third byte of the return value.
  • the halved addition of the fourth bytes in each operand, in the fourth byte of the return value.
Operation
res[7:0]   = (val1[7:0]   + val2[7:0])   >> 1
res[15:8]  = (val1[15:8]  + val2[15:8])  >> 1
res[23:16] = (val1[23:16] + val2[23:16]) >> 1
res[31:24] = (val1[31:24] + val2[31:24]) >> 1

Function __SSUB8

Summary
uint32_t __SSUB8(uint32_t val1, uint32_t val2);
Description This function enables you to perform four 8-bit signed integer subtractions.
The GE bits in the APSR are set according to the results.
Parameter
  • val1: first four 8-bit operands of each subtraction.
  • val2: second four 8-bit operands of each subtraction.
Return Value

The function returns:

  • the subtraction of the first byte in the second operand from the first byte in the first operand, in the first bytes of the return value.
  • the subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value.
  • the subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value.
  • the subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.

Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation. If res is the return value, then:

  • if res[8:0] ≥ 0 then APSR.GE[0] = 1 else 0
  • if res[15:8] ≥ 0 then APSR.GE[1] = 1 else 0
  • if res[23:16] ≥ 0 then APSR.GE[2] = 1 else 0
  • if res[31:24] ≥ 0 then APSR.GE[3] = 1 else 0
Operation
res[7:0]   = val1[7:0]   - val2[7:0]
res[15:8]  = val1[15:8]  - val2[15:8]
res[23:16] = val1[23:16] - val2[23:16]
res[31:24] = val1[31:24] - val2[31:24]

Function __QSUB8

Summary
uint32_t __QADD8(uint32_t val1, uint32_t val2);
Description This function enables you to perform four 8-bit integer subtractions, saturating the results to the 8-bit signed integer range -27 ≤ x ≤ 27 - 1.
Parameter
  • val1: first four 8-bit operands.
  • val2: second four 8-bit operands.
Return Value

The function returns:

  • the subtraction of the first byte in the second operand from the first byte in the first operand, in the first byte of the return value.
  • the subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value.
  • the subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value.
  • the subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.

The returned results are saturated to the 8-bit signed integer range -27 ≤ x ≤ 27 - 1.

Operation
res[7:0]   = val1[7:0]   - val2[7:0]
res[15:8]  = val1[15:8]  - val2[15:8]
res[23:16] = val1[23:16] - val2[23:16]
res[31:24] = val1[31:24] - val2[31:24]

Function __SHSUB8

Summary
uint32_t __SHSUB8(uint32_t val1, uint32_t val2);
Description This function enables you to perform four signed 8-bit integer subtractions, halving the results.
Parameter
  • val1: first four 8-bit operands.
  • val2: second four 8-bit operands.
Return Value

The function returns:

  • the halved subtraction of the first byte in the second operand from the first byte in the first operand, in the first byte of the return value.
  • the halved subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value.
  • the halved subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value.
  • the halved subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.
Operation
res[7:0]   = (val1[7:0]   - val2[7:0])  >> 1
res[15:8]  = (val1[15:8]  - val2[15:8]) >> 1
res[23:16] = (val1[23:16] - val2[23:16] >> 1
res[31:24] = (val1[31:24] - val2[31:24] >> 1

Function __USUB8

Summary
uint32_t __USUB8(uint32_t val1, uint32_t val2);
Description This function It enables you to perform four 8-bit unsigned integer subtractions.
The GE bits in the APSR are set according to the results.
Parameter
  • val1: first four 8-bit operands.
  • val2: second four 8-bit operands.
Return Value

The function returns:

  • the subtraction of the first byte in the second operand from the first byte in the first operand, in the first byte of the return value.
  • the subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value.
  • the subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value.
  • the subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.

Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
If res is the return value, then:

  • if res[7:0] ≥ 0 then APSR.GE[0] = 1 else 0
  • if res[15:8] ≥ 0 then APSR.GE[1] = 1 else 0
  • if res[23:16] ≥ 0 then APSR.GE[2] = 1 else 0
  • if res[31:24] ≥ 0 then APSR.GE[3] = 1 else 0
Operation
res[7:0]   = val1[7:0]   - val2[7:0]
res[15:8]  = val1[15:8]  - val2[15:8]
res[23:16] = val1[23:16] - val2[23:16]
res[31:24] = val1[31:24] - val2[31:24]

Function __UQSUB8

Summary
uint32_t __UQSUB8(uint32_t val1, uint32_t val2);
Description This function enables you to perform four unsigned 8-bit integer subtractions, saturating the results to the 8-bit unsigned integer range 0 ≤ x ≤ 28 - 1.
Parameter
  • val1: first four 8-bit operands.
  • val2: second four 8-bit operands.
Return Value

The function returns:

  • the subtraction of the first byte in the second operand from the first byte in the first operand, in the first byte of the return value.
  • the subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value.
  • the subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value.
  • the subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.

The results are saturated to the 8-bit unsigned integer range 0 ≤ x ≤ 28 - 1.

Operation
res[7:0]   = val1[7:0]   - val2[7:0]
res[15:8]  = val1[15:8]  - val2[15:8]
res[23:16] = val1[23:16] - val2[23:16]
res[31:24] = val1[31:24] - val2[31:24]

Function __UHSUB8

Summary
uint32_t __UHSUB8(uint32_t val1, uint32_t val2);
Description This function enables you to perform four unsigned 8-bit integer subtractions, halving the results.
Parameter
  • val1: first four 8-bit operands.
  • val2: second four 8-bit operands.
Return Value

The function returns:

  • the halved subtraction of the first byte in the second operand from the first byte in the first operand, in the first byte of the return value.
  • the halved subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value.
  • the halved subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value.
  • the halved subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.
Operation
res[7:0]   = (val1[7:0]   - val2[7:0])   >> 1
res[15:8]  = (val1[15:8]  - val2[15:8])  >> 1
res[23:16] = (val1[23:16] - val2[23:16]) >> 1
res[31:24] = (val1[31:24] - val2[31:24]) >> 1

Function __SADD16

Summary
uint32_t __SADD16(uint32_t val1, uint32_t val2);
Description This function enables you to perform two 16-bit signed integer additions.
The GE bits in the APSR are set according to the results of the additions.
Parameter
  • val1: first two 16-bit summands.
  • val2: second two 16-bit summands.
Return Value

The function returns:

  • the addition of the low halfwords in the low halfword of the return value.
  • the addition of the high halfwords in the high halfword of the return value.

Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
If res is the return value, then:

  • if res[15:0] ≥ 0 then APSR.GE[1:0] = 11 else 00
  • if res[31:16] ≥ 0 then APSR.GE[3:2] = 11 else 00
Operation
res[15:0]  = val1[15:0]  + val2[15:0]
res[31:16] = val1[31:16] + val2[31:16]

Function __QADD16

Summary
uint32_t __QADD16(uint32_t val1, uint32_t val2);
Description This function enables you to perform two 16-bit integer arithmetic additions in parallel, saturating the results to the 16-bit signed integer range -215 ≤ x ≤ 215 - 1.
Parameter
  • val1: first two 16-bit summands.
  • val2: second two 16-bit summands.
Return Value

The function returns:

  • the saturated addition of the low halfwords in the low halfword of the return value.
  • the saturated addition of the high halfwords in the high halfword of the return value.

The returned results are saturated to the 16-bit signed integer range -215 ≤ x ≤ 215 - 1

Operation
res[15:0]  = val1[15:0]  + val2[15:0]
res[16:31] = val1[31:16] + val2[31:16]

Function __SHADD16

Summary
uint32_t __SHADD16(uint32_t val1, uint32_t val2);
Description This function enables you to perform two signed 16-bit integer additions, halving the results.
Parameter
  • val1: first two 16-bit summands.
  • val2: second two 16-bit summands.
Return Value

The function returns:

  • the halved addition of the low halfwords from each operand, in the low halfword of the return value.
  • the halved addition of the high halfwords from each operand, in the high halfword of the return value.
Operation
res[15:0]  = (val1[15:0]  + val2[15:0])  >> 1
res[31:16] = (val1[31:16] + val2[31:16]) >> 1

Function __UADD16

Summary
uint32_t __UADD16(uint32_t val1, uint32_t val2);
Description This function enables you to perform two 16-bit unsigned integer additions.
The GE bits in the APSR are set according to the results.
Parameter
  • val1: first two 16-bit summands for each addition.
  • val2: second two 16-bit summands for each addition.
Return Value

The function returns:

  • the addition of the low halfwords in each operand, in the low halfword of the return value.
  • the addition of the high halfwords in each operand, in the high halfword of the return value.

Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
If res is the return value, then:

  • if res[15:0] ≥ 0x10000 then APSR.GE[0] = 11 else 00
  • if res[31:16] ≥ 0x10000 then APSR.GE[1] = 11 else 00
Operation
res[15:0]  = val1[15:0]  + val2[15:0]
res[31:16] = val1[31:16] + val2[31:16]

Function __UQADD16

Summary
uint32_t __UQADD16(uint32_t val1, uint32_t val2);
Description This function enables you to perform two unsigned 16-bit integer additions, saturating the results to the 16-bit unsigned integer range 0 ≤ x ≤ 216 - 1.
Parameter
  • val1: first two 16-bit summands.
  • val2: second two 16-bit summands.
Return Value

The function returns:

  • the addition of the low halfword in the first operand and the low halfword in the second operand, in the low halfword of the return value.
  • the addition of the high halfword in the first operand and the high halfword in the second operand, in the high halfword of the return value.

The results are saturated to the 16-bit unsigned integer range 0 ≤ x ≤ 216 - 1.

Operation
res[15:0]  = val1[15:0]  + val2[15:0]
res[31:16] = val1[31:16] + val2[31:16]

Function __UHADD16

Summary
uint32_t __UHADD16(uint32_t val1, uint32_t val2);
Description This function enables you to perform two unsigned 16-bit integer additions, halving the results.
Parameter
  • val1: first two 16-bit summands.
  • val2: second two 16-bit summands.
Return Value

The function returns:

  • the halved addition of the low halfwords in each operand, in the low halfword of the return value.
  • the halved addition of the high halfwords in each operand, in the high halfword of the return value.
Operation
res[15:0]  = (val1[15:0]  + val2[15:0])  >> 1
res[31:16] = (val1[31:16] + val2[31:16]) >> 1

Function __SSUB16

Summary
uint32_t __SSUB16(uint32_t val1, uint32_t val2);
Description This function enables you to perform two 16-bit signed integer subtractions.
The GE bits in the APSR are set according to the results.
Parameter
  • val1: first two 16-bit operands of each subtraction.
  • val2: second two 16-bit operands of each subtraction.
Return Value

The function returns:

  • the subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
  • the subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.

Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
If res is the return value, then:

  • if res[15:0] ≥ 0 then APSR.GE[1:0] = 11 else 00
  • if res[31:16] ≥ 0 then APSR.GE[3:2] = 11 else 00
Operation
res[15:0]  = val1[15:0]  - val2[15:0]
res[31:16] = val1[31:16] - val2[31:16]

Function __QSUB16

Summary
uint32_t __QSUB16(uint32_t val1, uint32_t val2);
Description This function enables you to perform two 16-bit integer subtractions, saturating the results to the 16-bit signed integer range -215 ≤ x ≤ 215 - 1.
Parameter
  • val1: first two 16-bit operands.
  • val2: second two 16-bit operands.
Return Value

The function returns:

  • the saturated subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the returned result.
  • the saturated subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the returned result.

The returned results are saturated to the 16-bit signed integer range -215 ≤ x ≤ 215 - 1.

Operation
res[15:0]  = val1[15:0]  - val2[15:0]
res[31:16] = val1[31:16] - val2[31:16]

Function __SHSUB16

Summary
uint32_t __SHSUB16(uint32_t val1, uint32_t val2);
Description This function enables you to perform two signed 16-bit integer subtractions, halving the results.
Parameter
  • val1: first two 16-bit operands.
  • val2: second two 16-bit operands.
Return Value

The function returns:

  • the halved subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
  • the halved subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.
Operation
res[15:0]  = (val1[15:0]  - val2[15:0])  >> 1
res[31:16] = (val1[31:16] - val2[31:16]) >> 1

Function __USUB16

Summary
uint32_t __USUB16(uint32_t val1, uint32_t val2);
Description This function enables you to perform two 16-bit unsigned integer subtractions.
The GE bits in the APSR are set according to the results.
Parameter
  • val1: first two 16-bit operands.
  • val2: second two 16-bit operands.
Return Value

The function returns:

  • the subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
  • the subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.

Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
If res is the return value, then:

  • if res[15:0] ≥ 0 then APSR.GE[1:0] = 11 else 00
  • if res[31:16] ≥ 0 then APSR.GE[3:2] = 11 else 00
Operation
res[15:0]  = val1[15:0]  - val2[15:0]
res[31:16] = val1[31:16] - val2[31:16]

Function __UQSUB16

Summary
uint32_t __UQSUB16(uint32_t val1, uint32_t val2);
Description This function enables you to perform two unsigned 16-bit integer subtractions, saturating the results to the 16-bit unsigned integer range 0 ≤ x ≤ 216 - 1.
Parameter
  • val1: first two 16-bit operands for each subtraction.
  • val2: second two 16-bit operands for each subtraction.
Return Value

The function returns:

  • the subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
  • the subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.

The results are saturated to the 16-bit unsigned integer range 0 ≤ x ≤ 216 - 1.

Operation
res[15:0]  = val1[15:0]  - val2[15:0]
res[31:16] = val1[31:16] - val2[31:16]

Function __UHSUB16

Summary
uint32_t __UHSUB16(uint32_t val1, uint32_t val2);
Description This function enables you to perform two unsigned 16-bit integer subtractions, halving the results.
Parameter
  • val1: first two 16-bit operands.
  • val2: second two 16-bit operands.
Return Value

The function returns:

  • the halved subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
  • the halved subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.
Operation
res[15:0]  = (val1[15:0]  - val2[15:0])  >> 1
res[31:16] = (val1[31:16] - val2[31:16]) >> 1

Function __SASX

Summary
uint32_t __SASX(uint32_t val1, uint32_t val2);
Description This function inserts an SASX instruction into the instruction stream generated by the compiler. It enables you to exchange the halfwords of the second operand, add the high halfwords and subtract the low halfwords.
The GE bits in the APRS are set according to the results.
Parameter
  • val1: first operand for the subtraction in the low halfword, and the first operand for the addition in the high halfword.
  • val2: second operand for the subtraction in the high halfword, and the second operand for the addition in the low halfword.
Return Value

The function returns:

  • the subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
  • the addition of the high halfword in the first operand and the low halfword in the second operand, in the high halfword of the return value.

Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
If res is the return value, then:

  • if res[15:0] ≥ 0 then APSR.GE[1:0] = 11 else 00
  • if res[31:16] ≥ 0 then APSR.GE[3:2] = 11 else 00
Operation
res[15:0]  = val1[15:0] - val2[31:16]
res[31:16] = val1[31:16] + val2[15:0]

Function __QASX

Summary
uint32_t __QASX(uint32_t val1, uint32_t val2);
Description This function enables you to exchange the halfwords of the one operand, then add the high halfwords and subtract the low halfwords, saturating the results to the 16-bit signed integer range -215 ≤ x ≤ 215 - 1.
Parameter
  • val1: first operand for the subtraction in the low halfword, and the first operand for the addition in the high halfword.
  • val2: second operand for the subtraction in the high halfword, and the second operand for the addition in the low halfword.
Return Value

The function returns:

  • the saturated subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
  • the saturated addition of the high halfword in the first operand and the low halfword in the second operand, in the high halfword of the return value.

The returned results are saturated to the 16-bit signed integer range -215 ≤ x ≤ 215 - 1.

Operation
res[15:0]  = val1[15:0]  - val2[31:16]
res[31:16] = val1[31:16] + val2[15:0]

Function __SHASX

Summary
uint32_t __SHASX(uint32_t val1, uint32_t val2);
Description This function enables you to exchange the two halfwords of one operand, perform one signed 16-bit integer addition and one signed 16-bit subtraction, and halve the results.
Parameter
  • val1: first 16-bit operands.
  • val2: second 16-bit operands.
Return Value

The function returns:

  • the halved subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
  • the halved subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.
Operation
res[15:0]  = (val1[15:0]  - val2[31:16]) >> 1
res[31:16] = (val1[31:16] - val2[15:0])  >> 1

Function __UASX

Summary
uint32_t __UASX(uint32_t val1, uint32_t val2);
Description This function enables you to exchange the two halfwords of the second operand, add the high halfwords and subtract the low halfwords.
The GE bits in the APSR are set according to the results.
Parameter
  • val1: first operand for the subtraction in the low halfword, and the first operand for the addition in the high halfword.
  • val2: second operand for the subtraction in the high halfword and the second operand for the addition in the low halfword.
Return Value

The function returns:

  • the subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
  • the addition of the high halfword in the first operand and the low halfword in the second operand, in the high halfword of the return value.

Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
If res is the return value, then:

  • if res[15:0] ≥ 0 then APSR.GE[1:0] = 11 else 00
  • if res[31:16] ≥ 0x10000 then APSR.GE[3:2] = 11 else 00
Operation
res[15:0]  = val1[15:0]  - val2[31:16]
res[31:16] = val1[31:16] + val2[15:0]

Function __UQASX

Summary
uint32_t __UQASX(uint32_t val1, uint32_t val2);
Description This function enables you to exchange the halfwords of the second operand and perform one unsigned 16-bit integer addition and one unsigned 16-bit subtraction, saturating the results to the 16-bit unsigned integer range 0 ≤ x ≤ 216 - 1.
Parameter
  • val1: first two 16-bit operands.
  • val2: second two 16-bit operands.
Return Value

The function returns:

  • the subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
  • the subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.

The results are saturated to the 16-bit unsigned integer range 0 ≤ x ≤ 216 - 1.

Operation
res[15:0]  = val1[15:0]  - val2[31:16]
res[31:16] = val1[31:16] + val2[15:0]

Function __UHASX

Summary
uint32_t __UHASX(uint32_t val1, uint32_t val2);
Description This function enables you to exchange the halfwords of the second operand, add the high halfwords and subtract the low halfwords, halving the results.
Parameter
  • val1: first operand for the subtraction in the low halfword, and the first operand for the addition in the high halfword.
  • val2: second operand for the subtraction in the high halfword, and the second operand for the addition in the low halfword.
Return Value

The function returns:

  • the halved subtraction of the high halfword in the second operand from the low halfword in the first operand.
  • the halved addition of the high halfword in the first operand and the low halfword in the second operand.
Operation
res[15:0]  = (val1[15:0]  - val2[31:16]) >> 1
res[31:16] = (val1[31:16] + val2[15:0])  >> 1

Function __SSAX

Summary
uint32_t __SSAX(uint32_t val1, uint32_t val2);
Description This function enables you to exchange the two halfwords of one operand and perform one 16-bit integer subtraction and one 16-bit addition.
The GE bits in the APSR are set according to the results.
Parameter
  • val1: first operand for the addition in the low halfword, and the first operand for the subtraction in the high halfword.
  • val2: second operand for the addition in the high halfword, and the second operand for the subtraction in the low halfword.
Return Value

The function returns:

  • the addition of the low halfword in the first operand and the high halfword in the second operand, in the low halfword of the return value.
  • the subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.

Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
If res is the return value, then:

  • if res[15:0] ≥ 0 then APSR.GE[1:0] = 11 else 00
  • if res[31:16] ≥ 0 then APSR.GE[3:2] = 11 else 00
Operation
res[15:0]  = val1[15:0]  + val2[31:16]
res[31:16] = val1[31:16] - val2[15:0]

Function __QSAX

Summary
uint32_t __QSAX(uint32_t val1, uint32_t val2);
Description This function enables you to exchange the halfwords of one operand, then subtract the high halfwords and add the low halfwords, saturating the results to the 16-bit signed integer range -215 ≤ x ≤ 215 - 1.
Parameter
  • val1: first operand for the addition in the low halfword, and the first operand for the subtraction in the high halfword.
  • val2: second operand for the addition in the high halfword, and the second operand for the subtraction in the low halfword.
Return Value

The function returns:

  • the saturated addition of the low halfword of the first operand and the high halfword of the second operand, in the low halfword of the return value.
  • the saturated subtraction of the low halfword of the second operand from the high halfword of the first operand, in the high halfword of the return value.

The returned results are saturated to the 16-bit signed integer range -215 ≤ x ≤ 215 - 1.

Operation
res[15:0]  = val1[15:0]  + val2[31:16]
res[31:16] = val1[31:16] - val2[15:0]

Function __SHSAX

Summary
uint32_t __SHSAX(uint32_t val1, uint32_t val2);
Description This function enables you to exchange the two halfwords of one operand, perform one signed 16-bit integer subtraction and one signed 16-bit addition, and halve the results.
Parameter
  • val1: first 16-bit operands.
  • val2: second 16-bit operands.
Return Value

The function returns:

  • the halved addition of the low halfword in the first operand and the high halfword in the second operand, in the low halfword of the return value.
  • the halved subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.
Operation
res[15:0]  = (val1[15:0]  + val2[31:16]) >> 1
res[31:16] = (val1[31:16] - val2[15:0])  >> 1

Function __USAX

Summary
uint32_t __USAX(uint32_t val1, uint32_t val2);
Description This function enables you to exchange the halfwords of the second operand, subtract the high halfwords and add the low halfwords.
The GE bits in the APSR are set according to the results.
Parameter
  • val1: first operand for the addition in the low halfword, and the first operand for the subtraction in the high halfword.
  • val2: second operand for the addition in the high halfword, and the second operand for the subtraction in the low halfword.
Return Value

The function returns:

  • the addition of the low halfword in the first operand and the high halfword in the second operand, in the low halfword of the return value.
  • the subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.

Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
If res is the return value, then:

  • if res[15:0] ≥ 0x10000 then APSR.GE[1:0] = 11 else 00
  • if res[31:16] ≥ 0 then APSR.GE[3:2] = 11 else 00
Operation
res[15:0]  = val1[15:0]  + val2[31:16]
res[31:16] = val1[31:16] - val2[15:0]

Function __UQSAX

Summary
uint32_t __UQSAX(uint32_t val1, uint32_t val2);
Description This function enables you to exchange the halfwords of the second operand and perform one unsigned 16-bit integer subtraction and one unsigned 16-bit addition, saturating the results to the 16-bit unsigned integer range 0 ≤ x ≤ 216 - 1.
Parameter
  • val1: first 16-bit operand for the addition in the low halfword, and the first 16-bit operand for the subtraction in the high halfword.
  • val2: second 16-bit halfword for the addition in the high halfword, and the second 16-bit halfword for the subtraction in the low halfword.
Return Value

The function returns:

  • the addition of the low halfword in the first operand and the high halfword in the second operand, in the low halfword of the return value.
  • the subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.

The results are saturated to the 16-bit unsigned integer range 0 ≤ x ≤ 216 - 1.

Operation
res[15:0]  = val1[15:0]  + val2[31:16]
res[31:16] = val1[31:16] - val2[15:0]

Function __UHSAX

Summary
uint32_t __UHSAX(uint32_t val1, uint32_t val2);
Description This function enables you to exchange the halfwords of the second operand, subtract the high halfwords and add the low halfwords, halving the results.
Parameter
  • val1: first operand for the addition in the low halfword, and the first operand for the subtraction in the high halfword.
  • val2: second operand for the addition in the high halfword, and the second operand for the subtraction in the low halfword.
Return Value

The function returns:

  • the halved addition of the high halfword in the second operand and the low halfword in the first operand, in the low halfword of the return value.
  • the halved subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.
Operation
res[15:0]  = (val1[15:0]  + val2[31:16]) >> 1
res[31:16] = (val1[31:16] - val2[15:0])  >> 1

Function __USAD8

Summary
uint32_t __USAD8(uint32_t val1, uint32_t val2);
Description This function enables you to perform four unsigned 8-bit subtractions, and add the absolute values of the differences together, returning the result as a single unsigned integer.
Parameter
  • val1: first four 8-bit operands for the subtractions.
  • val2: second four 8-bit operands for the subtractions.
Return Value

The function returns the sum of the absolute differences of:

  • the subtraction of the first byte in the second operand from the first byte in the first operand.
  • the subtraction of the second byte in the second operand from the second byte in the first operand.
  • the subtraction of the third byte in the second operand from the third byte in the first operand.
  • the subtraction of the fourth byte in the second operand from the fourth byte in the first operand.

The sum is returned as a single unsigned integer.
Operation
absdiff1  = val1[7:0]   - val2[7:0]
absdiff2  = val1[15:8]  - val2[15:8]
absdiff3  = val1[23:16] - val2[23:16]
absdiff4  = val1[31:24] - val2[31:24]
res[31:0] = absdiff1 + absdiff2 + absdiff3 + absdiff4

Function __USADA8

Summary
uint32_t __USADA8(uint32_t val1, uint32_t val2, uint32_t val3);
Description This function enables you to perform four unsigned 8-bit subtractions, and add the absolute values of the differences to a 32-bit accumulate operand.
Parameter
  • val1: first four 8-bit operands for the subtractions.
  • val2: second four 8-bit operands for the subtractions.
  • val3: accumulation value.
Return Value

The function returns the sum of the absolute differences of the following bytes, added to the accumulation value:

  • the subtraction of the first byte in the second operand from the first byte in the first operand.
  • the subtraction of the second byte in the second operand from the second byte in the first operand.
  • the subtraction of the third byte in the second operand from the third byte in the first operand.
  • the subtraction of the fourth byte in the second operand from the fourth byte in the first operand.
Operation
absdiff1  = val1[7:0]   - val2[7:0]
absdiff2  = val1[15:8]  - val2[15:8]
absdiff3  = val1[23:16] - val2[23:16]
absdiff4  = val1[31:24] - val2[31:24]
sum       = absdiff1 + absdiff2 + absdiff3 + absdiff4
res[31:0] = sum[31:0] + val3[31:0]

Function __SSAT16

Summary
uint32_t __SSAT16(uint32_t val1, const uint32_t val2);
Description This function enables you to saturate two signed 16-bit values to a selected signed range.
The Q bit is set if either operation saturates.
Parameter
  • val1: two signed 16-bit values to be saturated.
  • val2: bit position for saturation, an integral constant expression in the range 1 to 16.
Return Value

The function returns:

  • the signed saturation of the low halfword in val1, saturated to the bit position specified in val2 and returned in the low halfword of the return value.
  • the signed saturation of the high halfword in val1, saturated to the bit position specified in val2 and returned in the high halfword of the return value.
Operation
Saturate halfwords in val1 to the signed range specified by the bit position in val2

Function __USAT16

Summary
uint32_t __USAT16(uint32_t val1, const uint32_t val2);
Description This function enables you to saturate two signed 16-bit values to a selected unsigned range.
The Q bit is set if either operation saturates.
Parameter
  • val1: two 16-bit values that are to be saturated.
  • val2: bit position for saturation, and must be an integral constant expression in the range 0 to 15.
Return Value

The function returns the saturation of the two signed 16-bit values, as non-negative values.

  • the saturation of the low halfword in val1, saturated to the bit position specified in val2 and returned in the low halfword of the return value.
  • the saturation of the high halfword in val1, saturated to the bit position specified in val2 and returned in the high halfword of the return value.
Operation
Saturate halfwords in val1 to the unsigned range specified by the bit position in val2

Function __UXTB16

Summary
uint32_t __UXTB16(uint32_t val);
Description This function enables you to extract two 8-bit values from an operand and zero-extend them to 16 bits each.
Parameter
  • val1: two 8-bit values in val[7:0] and val[23:16] to be sign-extended.
Return Value

The function returns the 8-bit values zero-extended to 16-bit values.

  • zero-extended value of val[7:0] in the low halfword of the return value.
  • zero-extended value of val[23:16] in the high halfword of the return value.
Operation
res[15:0]  = ZeroExtended(val[7:0]  )
res[31:16] = ZeroExtended(val[23:16])

Function __UXTAB16

Summary
uint32_t __UXTAB16(uint32_t val1, uint32_t val2);
Description This function enables you to extract two 8-bit values from one operand, zero-extend them to 16 bits each, and add the results to two 16-bit values from another operand.
Parameter
  • val1: value added to the zero-extended to 16-bit values.
  • val2: two 8-bit values to be extracted and zero-extended.
Return Value

The function returns the 8-bit values in val2, zero-extended to 16-bit values and added to val1.
Operation
res[15:0]  = ZeroExt(val2[7:0]   to 16 bits) + val1[15:0]
res[31:16] = ZeroExt(val2[31:16] to 16 bits) + val1[31:16]

Function __SXTB16

Summary
uint32_t __SXTB16(uint32_t val);
Description This function enables you to extract two 8-bit values from an operand and sign-extend them to 16 bits each.
Parameter
  • val1: two 8-bit values in val[7:0] and val[23:16] to be sign-extended.
Return Value

The function returns the 8-bit values sign-extended to 16-bit values.

  • sign-extended value of val[7:0] in the low halfword of the return value.
  • sign-extended value of val[23:16] in the high halfword of the return value.
Operation
res[15:0]  = SignExtended(val[7:0]
res[31:16] = SignExtended(val[23:16]

Function __SXTAB16

Summary
uint32_t __SXTAB16(uint32_t val1, uint32_t val2);
Description This function enables you to extract two 8-bit values from the second operand (at bit positions [7:0] and [23:16]), sign-extend them to 16-bits each, and add the results to the first operand.
Parameter
  • val1: values added to the zero-extended to 16-bit values.
  • val2: two 8-bit values to be extracted and zero-extended.
Return Value

The function returns the addition of val1 and val2, where the 8-bit values in val2[7:0] and val2[23:16] have been extracted and sign-extended prior to the addition.
Operation
res[15:0]  = val1[15:0]  + SignExtended(val2[7:0])
res[31:16] = val1[31:16] + SignExtended(val2[23:16])

Function __SMUAD

Summary
uint32_t __SMUAD(uint32_t val1, uint32_t val2);
Description This function It enables you to perform two 16-bit signed multiplications, adding the products together.
The Q bit is set if the addition overflows.
Parameter
  • val1: first 16-bit operands for each multiplication.
  • val2: second 16-bit operands for each multiplication.
Return Value

The function returns the sum of the products of the two 16-bit signed multiplications.
Operation
p1 = val1[15:0]  * val2[15:0]
p2 = val1[31:16] * val2[31:16]
res[31:0] = p1 + p2

Function __SMUADX

Summary
uint32_t __SMUADX(uint32_t val1, uint32_t val2);
Description This function enables you to perform two 16-bit signed multiplications with exchanged halfwords of the second operand, adding the products together.
The Q bit is set if the addition overflows.
Parameter
  • val1: first 16-bit operands for each multiplication.
  • val2: second 16-bit operands for each multiplication.
Return Value

The function returns the sum of the products of the two 16-bit signed multiplications with exchanged halfwords of the second operand.
Operation
p1 = val1[15:0]  * val2[31:16]
p2 = val1[31:16] * val2[15:0]
res[31:0] = p1 + p2

Function __SMLAD

Summary
uint32_t __SMLAD(uint32_t val1, uint32_t val2, uint32_t val3);
Description This function enables you to perform two signed 16-bit multiplications, adding both results to a 32-bit accumulate operand.
The Q bit is set if the addition overflows. Overflow cannot occur during the multiplications.
Parameter
  • val1: first 16-bit operands for each multiplication.
  • val2: second 16-bit operands for each multiplication.
  • val2: accumulate value.
Return Value

The function returns the product of each multiplication added to the accumulate value, as a 32-bit integer.
Operation
p1 = val1[15:0]  * val2[15:0]
p2 = val1[31:16] * val2[31:16]
res[31:0] = p1 + p2 + val3[31:0]

Function __SMLADX

Summary
uint32_t __SMLADX(uint32_t val1, uint32_t val2, uint32_t val3);
Description This function enables you to perform two signed 16-bit multiplications with exchanged halfwords of the second operand, adding both results to a 32-bit accumulate operand.
The Q bit is set if the addition overflows. Overflow cannot occur during the multiplications.
Parameter
  • val1: first 16-bit operands for each multiplication.
  • val2: second 16-bit operands for each multiplication.
  • val2: accumulate value.
Return Value

The function returns the product of each multiplication with exchanged halfwords of the second operand added to the accumulate value, as a 32-bit integer.
Operation
p1 = val1[15:0]  * val2[31:16]
p2 = val1[31:16] * val2[15:0]
res[31:0] = p1 + p2 + val3[31:0]

Function __SMLALD

Summary
uint64_t __SMLALD(uint32_t val1, uint32_t val2, uint64_t val3);
Description This function enables you to perform two signed 16-bit multiplications, adding both results to a 64-bit accumulate operand. Overflow is only possible as a result of the 64-bit addition. This overflow is not detected if it occurs. Instead, the result wraps around modulo264.
Parameter
  • val1: first 16-bit operands for each multiplication.
  • val2: second 16-bit operands for each multiplication.
  • val2: accumulate value.
Return Value

The function returns the product of each multiplication added to the accumulate value.
Operation
p1 = val1[15:0]  * val2[15:0]
p2 = val1[31:16] * val2[31:16]
sum = p1 + p2 + val3[63:32][31:0]
res[63:32] = sum[63:32]
res[31:0]  = sum[31:0]

Function __SMLALDX

Summary
unsigned long long __SMLALDX(uint32_t val1, uint32_t val2, unsigned long long val3);
Description This function enables you to exchange the halfwords of the second operand, and perform two signed 16-bit multiplications, adding both results to a 64-bit accumulate operand. Overflow is only possible as a result of the 64-bit addition. This overflow is not detected if it occurs. Instead, the result wraps around modulo264.
Parameter
  • val1: first 16-bit operands for each multiplication.
  • val2: second 16-bit operands for each multiplication.
  • val2: accumulate value.
Return Value

The function returns the product of each multiplication added to the accumulate value.
Operation
p1 = val1[15:0]  * val2[31:16]
p2 = val1[31:16] * val2[15:0]
sum = p1 + p2 + val3[63:32][31:0]
res[63:32] = sum[63:32]
res[31:0] = sum[31:0]

Function __SMUSD

Summary
uint32_t __SMUSD(uint32_t val1, uint32_t val2);
Description This function enables you to perform two 16-bit signed multiplications, taking the difference of the products by subtracting the high halfword product from the low halfword product.
Parameter
  • val1: first 16-bit operands for each multiplication.
  • val2: second 16-bit operands for each multiplication.
Return Value

The function returns the difference of the products of the two 16-bit signed multiplications.
Operation
p1 = val1[15:0]  * val2[15:0]
p2 = val1[31:16] * val2[31:16]
res[31:0] = p1 - p2

Function __SMUSDX

Summary
uint32_t __SMUSDX(uint32_t val1, uint32_t val2);
Description This function enables you to perform two 16-bit signed multiplications, subtracting one of the products from the other. The halfwords of the second operand are exchanged before performing the arithmetic. This produces top * bottom and bottom * top multiplication.
Parameter
  • val1: first 16-bit operands for each multiplication.
  • val2: second 16-bit operands for each multiplication.
Return Value

The function returns the difference of the products of the two 16-bit signed multiplications.
Operation
p1 = val1[15:0]  * val2[31:16]
p2 = val1[31:16] * val2[15:0]
res[31:0] = p1 - p2

Function __SMLSD

Summary
uint32_t __SMLSD(uint32_t val1, uint32_t val2, uint32_t val3);
Description This function enables you to perform two 16-bit signed multiplications, take the difference of the products, subtracting the high halfword product from the low halfword product, and add the difference to a 32-bit accumulate operand.
The Q bit is set if the accumulation overflows. Overflow cannot occur during the multiplications or the subtraction.
Parameter
  • val1: first 16-bit operands for each multiplication.
  • val2: second 16-bit operands for each multiplication.
  • val3: accumulate value.
Return Value

The function returns the difference of the product of each multiplication, added to the accumulate value.
Operation
p1 = val1[15:0]  * val2[15:0]
p2 = val1[31:16] * val2[31:16]
res[31:0] = p1 - p2 + val3[31:0]

Function __SMLSDX

Summary
uint32_t __SMLSDX(uint32_t val1, uint32_t val2, uint32_t val3);
Description This function enables you to exchange the halfwords in the second operand, then perform two 16-bit signed multiplications. The difference of the products is added to a 32-bit accumulate operand.
The Q bit is set if the addition overflows. Overflow cannot occur during the multiplications or the subtraction.
Parameter
  • val1: first 16-bit operands for each multiplication.
  • val2: second 16-bit operands for each multiplication.
  • val3: accumulate value.
Return Value

The function returns the difference of the product of each multiplication, added to the accumulate value.
Operation
p1 = val1[15:0]  * val2[31:16]
p2 = val1[31:16] * val2[15:0]
res[31:0] = p1 - p2 + val3[31:0]

Function __SMLSLD

Summary
uint64_t __SMLSLD(uint32_t val1, uint32_t val2, uint64_t val3);
Description This function It enables you to perform two 16-bit signed multiplications, take the difference of the products, subtracting the high halfword product from the low halfword product, and add the difference to a 64-bit accumulate operand. Overflow cannot occur during the multiplications or the subtraction. Overflow can occur as a result of the 64-bit addition, and this overflow is not detected. Instead, the result wraps round to modulo264.
Parameter
  • val1: first 16-bit operands for each multiplication.
  • val2: second 16-bit operands for each multiplication.
  • val3: accumulate value.
Return Value

The function returns the difference of the product of each multiplication, added to the accumulate value.
Operation
p1 = val1[15:0]  * val2[15:0]
p2 = val1[31:16] * val2[31:16]
res[63:0] = p1 - p2 + val3[63:0]

Function __SMLSLDX

Summary
unsigned long long __SMLSLDX(uint32_t val1, uint32_t val2, unsigned long long val3);
Description This function enables you to exchange the halfwords of the second operand, perform two 16-bit multiplications, adding the difference of the products to a 64-bit accumulate operand. Overflow cannot occur during the multiplications or the subtraction. Overflow can occur as a result of the 64-bit addition, and this overflow is not detected. Instead, the result wraps round to modulo264.
Parameter
  • val1: first 16-bit operands for each multiplication.
  • val2: second 16-bit operands for each multiplication.
  • val3: accumulate value.
Return Value

The function returns the difference of the product of each multiplication, added to the accumulate value.
Operation
p1 = val1[15:0]  * val2[31:16]
p2 = val1[31:16] * val2[15:0]
res[63:0] = p1 - p2 + val3[63:0]

Function __SEL

Summary
uint32_t __SEL(uint32_t val1, uint32_t val2);
Description This function inserts a SEL instruction into the instruction stream generated by the compiler. It enables you to select bytes from the input parameters, whereby the bytes that are selected depend upon the results of previous SIMD instruction function. The results of previous SIMD instruction function are represented by the Greater than or Equal flags in the Application Program Status Register (APSR). The __SEL function works equally well on both halfword and byte operand function results. This is because halfword operand operations set two (duplicate) GE bits per value.
Parameter
  • val1: four selectable 8-bit values.
  • val2: four selectable 8-bit values.
Return Value

The function selects bytes from the input parameters and returns them in the return value, res, according to the following criteria:

  • if APSR.GE[0] == 1 then res[7:0] = val1[7:0] else res[7:0] = val2[7:0]
  • if APSR.GE[1] == 1 then res[15:8] = val1[15:8] else res[15:8] = val2[15:8]
  • if APSR.GE[2] == 1 then res[23:16] = val1[23:16] else res[23:16] = val2[23:16]
  • if APSR.GE[3] == 1 then res[31;24] = val1[31:24] else res = val2[31:24]

Function __QADD

Summary
uint32_t __QADD(uint32_t val1, uint32_t val2);
Description This function enables you to obtain the saturating add of two integers.
The Q bit is set if the operation saturates.
Parameter
  • val1: first summand of the saturating add operation.
  • val2: second summand of the saturating add operation.
Return Value

The function returns the saturating addition of val1 and val2.
Operation
res[31:0] = SAT(val1 + SAT(val2 * 2))

Function __QSUB

Summary
uint32_t __QSUB(uint32_t val1, uint32_t val2);
Description This function enables you to obtain the saturating subtraction of two integers.
The Q bit is set if the operation saturates.
Parameter
  • val1: minuend of the saturating subtraction operation.
  • val2: subtrahend of the saturating subtraction operation.
Return Value

The function returns the saturating subtraction of val1 and val2.
Operation
res[31:0] = SAT(val1 - SAT(val2 * 2))

Examples

Following are some coding examples using the SIMD functions:

Name | Description
Addition | Add two values using SIMD function
Subtraction | Subtract two values using SIMD function
Multiplication | Performing a multiplication using SIMD function

Addition

Example
uint32_t add_halfwords(uint32_t val1, uint32_t val2)
{
   uint32_t res;
   res = __SADD16(val1, val2);
   return res;
}

Subtraction

Example
uint32_t sub_halfwords(uint32_t val1, uint32_t val2)
{
  uint32_t res;
  res = __SSUB16(val1, val2);
  return res;
}

Multiplication

Example
uint32_t dual_mul_add_products(uint32_t val1, uint32_t val2)
{
  uint32_t res;
  res = __SMUAD(val1, val2);
  return res;
}


CMSIS: Cortex Microcontroller Software Interface Standard

Cortex Microcontroller Software Interface Standard

This file describes the Cortex Microcontroller Software Interface Standard (CMSIS).

Version: 2.10 - July 2011

Information in this file, the accompany manuals, and software is
Copyright © ARM Ltd.
All rights reserved.

Revision History

  • Version 1.00: initial release.
  • Version 1.01: added __LDREXx, __STREXx, and __CLREX.
  • Version 1.02: added Cortex-M0.
  • Version 1.10: second review.
  • Version 1.20: third review.
  • Version 1.30 PRE-RELEASE: reworked Startup Concept, additional Debug Functionality.
  • Version 1.30 2nd PRE-RELEASE: changed folder structure, added doxyGen comments, added Bit definitions.
  • Version 1.30: updated Device Support Packages.
  • Version 2.00: added Cortex-M4 support.
  • Version 2.01: internal review.
  • Version 2.02: updated Device Specific Defines
  • Version 2.10: reworked core include files

Contents

  1. About
  2. Coding Rules and Conventions
  3. CMSIS Files
  4. Core Peripheral Access Layer
  5. CMSIS Example
  6. CMSIS MISRA-C:2004 Compliance Exceptions

About

The Cortex Microcontroller Software Interface Standard (CMSIS) answers the challenges that are faced when software components are deployed to physical microcontroller devices based on a Cortex-M0 or Cortex-M3 processor. The CMSIS will be also expanded to future Cortex-M processor cores (the term Cortex-M is used to indicate that). The CMSIS is defined in close co-operation with various silicon and software vendors and provides a common approach to interface to peripherals, real-time operating systems, and middleware components.

ARM provides as part of the CMSIS the following software layers that are available for various compiler implementations:

  • Core Peripheral Access Layer: contains name definitions, address definitions and helper functions to access core registers and peripherals. It defines also a device independent interface for RTOS Kernels that includes debug channel definitions.

These software layers are expanded by Silicon partners with:

  • Device Peripheral Access Layer: provides definitions for all device peripherals
  • Access Functions for Peripherals (optional): provides additional helper functions for peripherals

CMSIS defines for a Cortex-M Microcontroller System:

  • A common way to access peripheral registers and a common way to define exception vectors.
  • The register names of the Core Peripherals and the names of the Core Exception Vectors.
  • An device independent interface for RTOS Kernels including a debug channel.

By using CMSIS compliant software components, the user can easier re-use template code. CMSIS is intended to enable the combination of software components from multiple middleware vendors.

Coding Rules and Conventions

The following section describes the coding rules and conventions used in the CMSIS implementation. It contains also information about data types and version number information.

Essentials

  • The CMSIS C code conforms to MISRA 2004 rules. In case of MISRA violations, there are disable and enable sequences for PC-LINT inserted.
  • ANSI standard data types defined in the ANSI C header file <stdint.h> are used.
  • #define constants that include expressions must be enclosed by parenthesis.
  • Variables and parameters have a complete data type.
  • All functions in the Core Peripheral Access Layer are re-entrant.
  • The Core Peripheral Access Layer has no blocking code (which means that wait/query loops are done at other software layers).
  • For each exception/interrupt there is definition for:
    • an exception/interrupt handler with the postfix _Handler (for exceptions) or _IRQHandler (for interrupts).
    • a default exception/interrupt handler (weak definition) that contains an endless loop.
    • a #define of the interrupt number with the postfix _IRQn.

Recommendations

The CMSIS recommends the following conventions for identifiers.

  • CAPITAL names to identify Core Registers, Peripheral Registers, and CPU Instructions.
  • CamelCase names to identify peripherals access functions and interrupts.
  • PERIPHERAL_ prefix to identify functions that belong to specify peripherals.
  • Doxygen comments for all functions are included as described under Function Comments below.
Comments
  • Comments use the ANSI C90 style (/* comment */) or C++ style (// comment). It is assumed that the programming tools support today consistently the C++ comment style.
  • Function Comments provide for each function the following information:
    • one-line brief function overview.
    • detailed parameter explanation.
    • detailed information about return values.
    • detailed description of the actual function.

    Doxygen Example:

    /**
 * @brief  Enable Interrupt in NVIC Interrupt Controller
 * @param  IRQn  interrupt number that specifies the interrupt
 * @return none.
 * Enable the specified interrupt in the NVIC Interrupt Controller.
 * Other settings of the interrupt such as priority are not affected.
 */

Data Types and IO Type Qualifiers

The Cortex-M HAL uses the standard types from the standard ANSI C header file <stdint.h>. IO Type Qualifiers are used to specify the access to peripheral variables. IO Type Qualifiers are indented to be used for automatic generation of debug information of peripheral registers.

IO Type Qualifier | #define | Description
__I | volatile const | Read access only
__O | volatile | Write access only
__IO | volatile | Read and write access

CMSIS Version Number

File core_cm4.h contains the version number of the CMSIS with the following define:

#define __CM4_CMSIS_VERSION_MAIN  (0x02)      /* [31:16] main version       */
#define __CM4_CMSIS_VERSION_SUB   (0x10)      /* [15:0]  sub version        */
#define __CM4_CMSIS_VERSION       ((__CM4_CMSIS_VERSION_MAIN << 16) | __CM4_CMSIS_VERSION_SUB)

File core_cm3.h contains the version number of the CMSIS with the following define:

#define __CM3_CMSIS_VERSION_MAIN  (0x02)      /* [31:16] main version       */
#define __CM3_CMSIS_VERSION_SUB   (0x10)      /* [15:0]  sub version        */
#define __CM3_CMSIS_VERSION       ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB)

File core_cm0.h contains the version number of the CMSIS with the following define:

#define __CM0_CMSIS_VERSION_MAIN  (0x02)      /* [31:16] main version       */
#define __CM0_CMSIS_VERSION_SUB   (0x10)      /* [15:0]  sub version        */
#define __CM0_CMSIS_VERSION       ((__CM0_CMSIS_VERSION_MAIN << 16) | __CM0_CMSIS_VERSION_SUB)

CMSIS Cortex Core

File core_cm4.h contains the type of the CMSIS Cortex-M with the following define:

#define __CORTEX_M                (0x04)

File core_cm3.h contains the type of the CMSIS Cortex-M with the following define:

#define __CORTEX_M                (0x03)

File core_cm0.h contains the type of the CMSIS Cortex-M with the following define:

#define __CORTEX_M                (0x00)

CMSIS Files

This section describes the Files provided in context with the CMSIS to access the Cortex-M hardware and peripherals.

File | Provider | Description
device.h | Device specific (provided by silicon partner) | Defines the peripherals for the actual device. The file may use several other include files to define the peripherals of the actual device.
core_cm0.h | ARM (for RealView ARMCC, IAR, and GNU GCC) | Defines the core peripherals for the Cortex-M0 CPU and core peripherals.
core_cm3.h | ARM (for RealView ARMCC, IAR, and GNU GCC) | Defines the core peripherals for the Cortex-M3 CPU and core peripherals.
core_cm4.h | ARM (for RealView ARMCC, IAR, and GNU GCC) | Defines the core peripherals for the Cortex-M4 CPU and core peripherals.
core_cm4_simd.h | ARM (for RealView ARMCC, IAR, and GNU GCC) | Defines the Cortex-M4 Core SIMD functions.
core_cmFunc.h | ARM (for RealView ARMCC, IAR, and GNU GCC) | Defines the Cortex-M Core Register access functions.
core_cmInstr.h | ARM (for RealView ARMCC, IAR, and GNU GCC) | Defines the Cortex-M Core instructions.
startup_device | ARM (adapted by compiler partner / silicon partner) | Provides the Cortex-M startup code and the complete (device specific) Interrupt Vector Table
system_device | ARM (adapted by silicon partner) | Provides a device specific configuration file for the device. It configures the device initializes typically the oscillator (PLL) that is part of the microcontroller device

device.h

The file device.h is provided by the silicon vendor and is the central include file that the application programmer is using in the C source code. This file contains:

  • Interrupt Number Definition: provides interrupt numbers (IRQn) for all core and device specific exceptions and interrupts.

  • Configuration for core_cm0.h / core_cm3.h / core_cm4.h: reflects the actual configuration of the Cortex-M processor that is part of the actual device. As such the file core_cm0.h / core_cm3.h / core_cm4.h is included that implements access to processor registers and core peripherals.

  • Device Peripheral Access Layer: provides definitions for all device peripherals. It contains all data structures and the address mapping for the device specific peripherals.

  • Access Functions for Peripherals (optional): provides additional helper functions for peripherals that are useful for programming of these peripherals. Access Functions may be provided as inline functions or can be extern references to a device specific library provided by the silicon vendor.

Interrupt Number Definition

To access the device specific interrupts the device.h file defines IRQn numbers for the complete device using a enum typedef as shown below:

typedef enum IRQn
{
/******  Cortex-M3 Processor Exceptions/Interrupt Numbers ************************************************/
  NonMaskableInt_IRQn             = -14,      /*!< 2 Non Maskable Interrupt                              */
  HardFault_IRQn                  = -13,      /*!< 3 Cortex-M3 Hard Fault Interrupt                      */
  MemoryManagement_IRQn           = -12,      /*!< 4 Cortex-M3 Memory Management Interrupt               */
  BusFault_IRQn                   = -11,      /*!< 5 Cortex-M3 Bus Fault Interrupt                       */
  UsageFault_IRQn                 = -10,      /*!< 6 Cortex-M3 Usage Fault Interrupt                     */
  SVCall_IRQn                     = -5,       /*!< 11 Cortex-M3 SV Call Interrupt                        */
  DebugMonitor_IRQn               = -4,       /*!< 12 Cortex-M3 Debug Monitor Interrupt                  */
  PendSV_IRQn                     = -2,       /*!< 14 Cortex-M3 Pend SV Interrupt                        */
  SysTick_IRQn                    = -1,       /*!< 15 Cortex-M3 System Tick Interrupt                    */
/******  STM32 specific Interrupt Numbers ****************************************************************/
  WWDG_STM_IRQn                   = 0,        /*!< Window WatchDog Interrupt                             */
  PVD_STM_IRQn                    = 1,        /*!< PVD through EXTI Line detection Interrupt             */
  :
  :
  } IRQn_Type;

Device Specific Defines

The following device implementation specific defines are set in the device header file and are used for the Cortex-M core configuration options. Some configuration options are reflected in the CMSIS layer using the #define settings described below.

Several features in core_cm#.h are configured by the following defines that must be defined before #include <core_cm#.h> preprocessor command.

#define | Core | Value | Description
__CM0_REV | M0 | 0x0000 | Core revision number ([15:8] revision number, [7:0] patch number)
__CM3_REV | M3 | 0x0101 | 0x0200 | Core revision number ([15:8] revision number, [7:0] patch number)
__CM4_REV | M4 | 0x0000 | Core revision number ([15:8] revision number, [7:0] patch number)
__NVIC_PRIO_BITS | M0, M3, M4 | 2 .. 8 | Number of priority bits implemented in the NVIC (device specific)
__MPU_PRESENT | M0, M3, M4 | 0 | 1 | Defines if a MPU is present or not
__FPU_PRESENT | M4 | 0 | 1 | Defines if a FPU is present or not
__Vendor_SysTickConfig | M0, M3, M4 | 0 | 1 | When this define is setup to 1, the SysTickConfig function in core_cm3.h is excluded. In this case the device.h file must contain a vendor specific implementation of this function.

Device Peripheral Access Layer

Each peripheral uses a prefix which consists of <device abbreviation>_ and <peripheral name>_ to identify peripheral registers that access this specific peripheral. The intention of this is to avoid name collisions caused due to short names. If more than one peripheral of the same type exists, identifiers have a postfix (digit or letter). For example:

  • <device abbreviation>_UART_Type: defines the generic register layout for all UART channels in a device.
    typedef struct
{
  union {
  __I  uint8_t  RBR;                     /*!< Offset: 0x000 (R/ )  Receiver Buffer Register    */
  __O  uint8_t  THR;                     /*!< Offset: 0x000 ( /W)  Transmit Holding Register   */
  __IO uint8_t  DLL;                     /*!< Offset: 0x000 (R/W)  Divisor Latch LSB           */
       uint32_t RESERVED0;
  };
  union {
  __IO uint8_t  DLM;                     /*!< Offset: 0x004 (R/W)  Divisor Latch MSB           */
  __IO uint32_t IER;                     /*!< Offset: 0x004 (R/W)  Interrupt Enable Register   */
  };
  union {
  __I  uint32_t IIR;                     /*!< Offset: 0x008 (R/ )  Interrupt ID Register       */
  __O  uint8_t  FCR;                     /*!< Offset: 0x008 ( /W)  FIFO Control Register       */
  };
  __IO uint8_t  LCR;                     /*!< Offset: 0x00C (R/W)  Line Control Register       */
       uint8_t  RESERVED1[7];
  __I  uint8_t  LSR;                     /*!< Offset: 0x014 (R/ )  Line Status Register        */
       uint8_t  RESERVED2[7];
  __IO uint8_t  SCR;                     /*!< Offset: 0x01C (R/W)  Scratch Pad Register        */
       uint8_t  RESERVED3[3];
  __IO uint32_t ACR;                     /*!< Offset: 0x020 (R/W)  Autobaud Control Register   */
  __IO uint8_t  ICR;                     /*!< Offset: 0x024 (R/W)  IrDA Control Register       */
       uint8_t  RESERVED4[3];
  __IO uint8_t  FDR;                     /*!< Offset: 0x028 (R/W)  Fractional Divider Register */
       uint8_t  RESERVED5[7];
  __IO uint8_t  TER;                     /*!< Offset: 0x030 (R/W)  Transmit Enable Register    */
       uint8_t  RESERVED6[39];
  __I  uint8_t  FIFOLVL;                 /*!< Offset: 0x058 (R/ )  FIFO Level Register         */
} LPC_UART_TypeDef;
  • <device abbreviation>_UART1: is a pointer to a register structure that refers to a specific UART. For example UART1->THR is the transmit holding register of UART1.
    #define LPC_UART2             ((LPC_UART_TypeDef      *) LPC_UART2_BASE    )
#define LPC_UART3             ((LPC_UART_TypeDef      *) LPC_UART3_BASE    )
Minimal Requiements

To access the peripheral registers and related function in a device the files device.h and core_cm0.h / core_cm3.h defines as a minimum:

  • The Register Layout Typedef for each peripheral that defines all register names. Names that start with RESERVE are used to introduce space into the structure to adjust the addresses of the peripheral registers. For example:
    typedef struct
{
  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */
  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */
  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */
} SysTick_Type;
  • Base Address for each peripheral (in case of multiple peripherals that use the same register layout typedef multiple base addresses are defined). For example:
    #define SysTick_BASE (SCS_BASE + 0x0010)            /* SysTick Base Address */
  • Access Definition for each peripheral (in case of multiple peripherals that use the same register layout typedef multiple access definitions exist, i.e. LPC_UART0, LPC_UART2). For Example:
    #define SysTick ((SysTick_Type *) SysTick_BASE)     /* SysTick access definition */

These definitions allow to access the peripheral registers from user code with simple assignments like:

SysTick->CTRL = 0;
Optional Features

In addition the device.h file may define:

  • #define constants that simplify access to the peripheral registers. These constant define bit-positions or other specific patterns are that required for the programming of the peripheral registers. The identifiers used start with <device abbreviation>_ and <peripheral name>_. It is recommended to use CAPITAL letters for such #define constants.
  • Functions that perform more complex functions with the peripheral (i.e. status query before a sending register is accessed). Again these function start with <device abbreviation>_ and <peripheral name>_.

core_cm0.h

File core_cm0.h describes the data structures for the Cortex-M0 core peripherals and does the address mapping of this structures. It also provides basic access to the Cortex-M0 core registers and core peripherals with efficient functions (defined as static inline).

This file implement the Core Peripheral Access Layer for a Cortex-M0.

The define __CMSIS_GENERIC allows to use core_cm0.h in generic library projects that are device independent. Only core relevant types and defines are used.

core_cm3.h

File core_cm3.h describes the data structures for the Cortex-M3 core peripherals and does the address mapping of this structures. It also provides basic access to the Cortex-M3 core registers and core peripherals with efficient functions (defined as static inline).

This file implement the Core Peripheral Access Layer for a Cortex-M3.

The define __CMSIS_GENERIC allows to use core_cm3.h in generic library projects that are device independent. Only core relevant types and defines are used.

core_cm4.h, core_cm4_simd.h

File core_cm4.h describes the data structures for the Cortex-M4 core peripherals and does the address mapping of this structures. It also provides basic access to the Cortex-M4 core registers and core peripherals with efficient functions (defined as static inline).

File core_cm4_simd.h defines Cortex-M4 SIMD instructions.

Together these files implement the Core Peripheral Access Layer for a Cortex-M4.

The define __CMSIS_GENERIC allows to use core_cm4.h in generic library projects that are device independent. Only core relevant types and defines are used.

core_cmFunc.h and core_cmInstr.h

File core_cmFunc.h defines the Cortex-M Core Register access functions (defined as static inline).

File core_cmInstr.h defines the Cortex-M Core instructions (defined as static inline).

These files are part of the Core Peripheral Access Layer for a Cortex-M.

startup_device

A template file for startup_device is provided by ARM for each supported compiler. It is adapted by the silicon vendor to include interrupt vectors for all device specific interrupt handlers. Each interrupt handler is defined as weak function to an dummy handler. Therefore the interrupt handler can be directly used in application software without any requirements to adapt the startup_device file.

The following exception names are fixed and define the start of the vector table for a Cortex-M0:

__Vectors       DCD     __initial_sp              ; Top of Stack
                DCD     Reset_Handler             ; Reset Handler
                DCD     NMI_Handler               ; NMI Handler
                DCD     HardFault_Handler         ; Hard Fault Handler
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     SVC_Handler               ; SVCall Handler
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     PendSV_Handler            ; PendSV Handler
                DCD     SysTick_Handler           ; SysTick Handler

The following exception names are fixed and define the start of the vector table for a Cortex-M3:

__Vectors       DCD     __initial_sp              ; Top of Stack
                DCD     Reset_Handler             ; Reset Handler
                DCD     NMI_Handler               ; NMI Handler
                DCD     HardFault_Handler         ; Hard Fault Handler
                DCD     MemManage_Handler         ; MPU Fault Handler
                DCD     BusFault_Handler          ; Bus Fault Handler
                DCD     UsageFault_Handler        ; Usage Fault Handler
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     SVC_Handler               ; SVCall Handler
                DCD     DebugMon_Handler          ; Debug Monitor Handler
                DCD     0                         ; Reserved
                DCD     PendSV_Handler            ; PendSV Handler
                DCD     SysTick_Handler           ; SysTick Handler

In the following examples for device specific interrupts are shown:

; External Interrupts
                DCD     WWDG_IRQHandler           ; Window Watchdog
                DCD     PVD_IRQHandler            ; PVD through EXTI Line detect
                DCD     TAMPER_IRQHandler         ; Tamper

Device specific interrupts must have a dummy function that can be overwritten in user code. Below is an example for this dummy function.

Default_Handler PROC
                EXPORT WWDG_IRQHandler   [WEAK]
                EXPORT PVD_IRQHandler    [WEAK]
                EXPORT TAMPER_IRQHandler [WEAK]
                :
                :
                WWDG_IRQHandler
                PVD_IRQHandler
                TAMPER_IRQHandler
                :
                :
                B .
                ENDP

The user application may simply define an interrupt handler function by using the handler name as shown below.

void WWDG_IRQHandler(void)
{
  :
  :
}

system_device.c

A template file for system_device.c is provided by ARM but adapted by the silicon vendor to match their actual device. As a minimum requirement this file must provide a device specific system configuration function and a global variable that contains the system frequency. It configures the device and initializes typically the oscillator (PLL) that is part of the microcontroller device.

The file system_device.c must provide as a minimum requirement the SystemInit function as shown below.

Function Definition | Description
void SystemInit (void) | Setup the microcontroller system. Typically this function configures the oscillator (PLL) that is part of the microcontroller device. For systems with variable clock speed it also updates the variable SystemCoreClock. SystemInit is called from startup_device file.
void SystemCoreClockUpdate (void) | Updates the variable SystemCoreClock and must be called whenever the core clock is changed during program execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates the current core clock.

Also part of the file system_device.c is the variable SystemCoreClock which contains the current CPU clock speed shown below.

Variable Definition | Description
uint32_t SystemCoreClock | Contains the system core clock (which is the system clock frequency supplied to the SysTick timer and the processor core clock). This variable can be used by the user application to setup the SysTick timer or configure other parameters. It may also be used by debugger to query the frequency of the debug timer or configure the trace clock speed. SystemCoreClock is initialized with a correct predefined value. The compiler must be configured to avoid the removal of this variable in case that the application program is not using it. It is important for debug systems that the variable is physically present in memory so that it can be examined to configure the debugger.

Note

  • The above definitions are the minimum requirements for the file system_device.c. This file may export more functions or variables that provide a more flexible configuration of the microcontroller system.

Core Peripheral Access Layer

Cortex-M Core Register Access

The following functions are defined in core_cm0.h / core_cm3.h and provide access to Cortex-M core registers.

Function Definition | Core | Core Register | Description
void __enable_irq (void) | M0, M3, M4 | PRIMASK = 0 | Global Interrupt enable (using the instruction CPSIE i)
void __disable_irq (void) | M0, M3, M4 | PRIMASK = 1 | Global Interrupt disable (using the instruction CPSID i)
uint32_t __get_CONTROL (void) | M0, M3, M4 | return CONTROL | Return Control Register Value (using the instruction MRS)
void __set_CONTROL (uint32_t value) | M0, M3, M4 | CONTROL = value | Set CONTROL register value (using the instruction MSR)
uint32_t __get_IPSR (void) | M0, M3, M4 | return IPSR | Return IPSR Register Value (using the instruction MRS)
uint32_t __get_APSR (void) | M0, M3, M4 | return APSR | Return APSR Register Value (using the instruction MRS)
uint32_t __get_xPSR (void) | M0, M3, M4 | return xPSR | Return xPSR Register Value (using the instruction MRS)
uint32_t __get_PSP (void) | M0, M3, M4 | return PSP | Return Process Stack Pointer (using the instruction MRS)
void __set_PSP (uint32_t TopOfProcStack) | >M0, M3, M4 | PSP = TopOfProcStack | Set Process Stack Pointer value (using the instruction MSR)
uint32_t __get_MSP (void) | M0, M3, M4 | return MSP | Return Main Stack Pointer (using the instruction MRS)
void __set_MSP (uint32_t TopOfMainStack) | M0, M3, M4 | MSP = TopOfMainStack | Set Main Stack Pointer (using the instruction MSR)
uint32_t __get_PRIMASK (void) | M0, M3, M4 | return PRIMASK | Return Priority Mask Register (using the instruction MRS)
void __set_PRIMASK (uint32_t value) | M0, M3, M4 | PRIMASK = value | Assign value to Priority Mask Register (using the instruction MSR)
void __enable_fault_irq (void) | M3, M4 | FAULTMASK = 0 | Global Fault exception and Interrupt enable (using the instruction CPSIE f)
void __disable_fault_irq (void) | M3, M4 | FAULTMASK = 1 | Global Fault exception and Interrupt disable (using the instruction CPSID f)
uint32_t __get_BASEPRI (void) | M3, M4 | return BASEPRI | Return Base Priority (using the instruction MRS)
void __set_BASEPRI (uint32_t value) | M3, M4 | BASEPRI = value | Set Base Priority (using the instruction MSR)
uint32_t __get_FAULTMASK (void) | M3, M4 | return FAULTMASK | Return Fault Mask Register (using the instruction MRS)
void __set_FAULTMASK (uint32_t value) | M3, M4 | FAULTMASK = value | Assign value to Fault Mask Register (using the instruction MSR)
uint32_t __get_FPSCR (void) | M4 | return FPSCR | Return Floating Point Status / Control Register
void __set_FPSCR (uint32_t value) | M4 | FPSCR = value | Assign value to Floating Point Status / Control Register

Cortex-M Instruction Access

The following functions are defined in core_cm0.h / core_cm3.hand generate specific Cortex-M instructions. The functions are implemented in the file core_cm0.c / core_cm3.c.

Name | Core | Generated CPU Instruction | Description
void __NOP (void) | M0, M3, M4 | NOP | No Operation
void __WFI (void) | M0, M3, M4 | WFI | Wait for Interrupt
void __WFE (void) | M0, M3, M4 | WFE | Wait for Event
void __SEV (void) | M0, M3, M4 | SEV | Set Event
void __ISB (void) | M0, M3, M4 | ISB | Instruction Synchronization Barrier
void __DSB (void) | M0, M3, M4 | DSB | Data Synchronization Barrier
void __DMB (void) | M0, M3, M4 | DMB | Data Memory Barrier
uint32_t __REV (uint32_t value) | M0, M3, M4 | REV | Reverse byte order in integer value.
uint32_t __REV16 (uint16_t value) | M0, M3, M4 | REV16 | Reverse byte order in unsigned short value.
sint32_t __REVSH (sint16_t value) | M0, M3, M4 | REVSH | Reverse byte order in signed short value with sign extension to integer.
uint32_t __RBIT (uint32_t value) | M3, M4 | RBIT | Reverse bit order of value
uint8_t __LDREXB (uint8_t *addr) | M3, M4 | LDREXB | Load exclusive byte
uint16_t __LDREXH (uint16_t *addr) | M3, M4 | LDREXH | Load exclusive half-word
uint32_t __LDREXW (uint32_t *addr) | M3, M4 | LDREXW | Load exclusive word
uint8_t __STREXB (uint8_t value, uint8_t *addr) | M3, M4 | STREXB | Store exclusive byte
uint16_t __STREXH (uint16_t value, uint16_t *addr) | M3, M4 | STREXH | Store exclusive half-word
uint32_t __STREXW (uint32_t value, uint32_t *addr) | M3, M4 | STREXW | Store exclusive word
void __CLREX (void) | M3, M4 | CLREX | Remove the exclusive lock created by __LDREXB, __LDREXH, or __LDREXW
void __SSAT (void) | M3, M4 | SSAT | saturate a signed value
void __USAT (void) | M3, M4 | USAT | saturate an unsigned value

NVIC Access Functions

The CMSIS provides access to the NVIC via the register interface structure and several helper functions that simplify the setup of the NVIC. The CMSIS HAL uses IRQ numbers (IRQn) to identify the interrupts. The first device interrupt has the IRQn value 0. Therefore negative IRQn values are used for processor core exceptions.

For the IRQn values of core exceptions the file device.h provides the following enum names.

Core Exception enum Value | Core | IRQn | Description
NonMaskableInt_IRQn | M0, M3, M4 | -14 | Cortex-M Non Maskable Interrupt
HardFault_IRQn | M0, M3, M4 | -13 | Cortex-M Hard Fault Interrupt
MemoryManagement_IRQn | M3, M4 | -12 | Cortex-M Memory Management Interrupt
BusFault_IRQn | M3, M4 | -11 | Cortex-M Bus Fault Interrupt
UsageFault_IRQn | M3, M4 | -10 | Cortex-M Usage Fault Interrupt
SVCall_IRQn | M0, M3, M4 | -5 | Cortex-M SV Call Interrupt
DebugMonitor_IRQn | M3, M4 | -4 | Cortex-M Debug Monitor Interrupt
PendSV_IRQn | M0, M3, M4 | -2 | Cortex-M Pend SV Interrupt
SysTick_IRQn | M0, M3, M4 | -1 | Cortex-M System Tick Interrupt

The following functions simplify the setup of the NVIC. The functions are defined as static inline.

Name | Core | Parameter | Description
void NVIC_SetPriorityGrouping (uint32_t PriorityGroup) | M3, M4 | Priority Grouping Value | Set the Priority Grouping (Groups . Subgroups)
uint32_t NVIC_GetPriorityGrouping (void) | M3, M4 | (void) | Get the Priority Grouping (Groups . Subgroups)
void NVIC_EnableIRQ (IRQn_Type IRQn) | M0, M3, M4 | IRQ Number | Enable IRQn
void NVIC_DisableIRQ (IRQn_Type IRQn) | M0, M3, M4 | IRQ Number | Disable IRQn
uint32_t NVIC_GetPendingIRQ (IRQn_Type IRQn) | M0, M3, M4 | IRQ Number | Return 1 if IRQn is pending else 0
void NVIC_SetPendingIRQ (IRQn_Type IRQn) | M0, M3, M4 | IRQ Number | Set IRQn Pending
void NVIC_ClearPendingIRQ (IRQn_Type IRQn) | M0, M3, M4 | IRQ Number | Clear IRQn Pending Status
uint32_t NVIC_GetActive (IRQn_Type IRQn) | M3, M4 | IRQ Number | Return 1 if IRQn is active else 0
void NVIC_SetPriority ( IRQn_Type IRQn, uint32_t priority) | M0, M3, M4 | IRQ Number, Priority | Set Priority for IRQn (not threadsafe for Cortex-M0)
uint32_t NVIC_GetPriority (IRQn_Type IRQn) | M0, M3, M4 | IRQ Number | Get Priority for IRQn
uint32_t NVIC_EncodePriority ( uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) | M3, M4 | IRQ Number, Priority Group, Preemptive Priority, Sub Priority | Encode priority for given group, preemptive and sub priority
void NVIC_DecodePriority ( uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority) | M3, M4 | Priority, Priority Group, pointer to Preempt. Priority, pointer to Sub Priority | Decode given priority to group, preemptive and sub priority
void NVIC_SystemReset (void) | M0, M3, M4 | (void) | Resets the System

Note

  • The processor exceptions have negative enum values. Device specific interrupts have positive enum values and start with 0. The values are defined in device.h file.

  • The values for PreemptPriority and SubPriority used in functions NVIC_EncodePriority and NVIC_DecodePriority depend on the available __NVIC_PRIO_BITS implemented in the NVIC.

SysTick Configuration Function

The following function is used to configure the SysTick timer and start the SysTick interrupt.

Name | Parameter | Description
uint32_t SysTickConfig (uint32_t ticks) | ticks is SysTick counter reload value | Setup the SysTick timer and enable the SysTick interrupt. After this call the SysTick timer creates interrupts with the specified time interval. Return: 0 when successful, 1 on failure.

Cortex-M3 / Cortex-M4 ITM Debug Access

The Cortex-M3 / Cortex-M4 incorporates the Instrumented Trace Macrocell (ITM) that provides together with the Serial Viewer Output trace capabilities for the microcontroller system. The ITM has 32 communication channels; two ITM communication channels are used by CMSIS to output the following information:

  • ITM Channel 0: implements the ITM_SendChar function which can be used for printf-style output via the debug interface.
  • ITM Channel 31: is reserved for the RTOS kernel and can be used for kernel awareness debugging.

Note

  • The ITM channel 31 is selected for the RTOS kernel since some kernels may use the Privileged level for program execution. ITM channels have 4 groups with 8 channels each, whereby each group can be configured for access rights in the Unprivileged level. The ITM channel 0 may be therefore enabled for the user task whereas ITM channel 31 may be accessible only in Privileged level from the RTOS kernel itself.

The prototype of the ITM_SendChar routine is shown in the table below.

Name | Parameter | Description
void uint32_t ITM_SendChar(uint32_t chr) | character to output | The function outputs a character via the ITM channel 0. The function returns when no debugger is connected that has booked the output. It is blocking when a debugger is connected, but the previous character send is not transmitted. Return: the input character 'chr'.

Example for the usage of the ITM Channel 31 for RTOS Kernels:

  // check if debugger connected and ITM channel enabled for tracing
  if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA) &&
  (ITM->TCR & ITM_TCR_ITMENA) &&
  (ITM->TER & (1UL << 31))) {
    // transmit trace data
    while (ITM->PORT31_U32 == 0);
    ITM->PORT[31].u8 = task_id;      // id of next task
    while (ITM->PORT[31].u32 == 0);
    ITM->PORT[31].u32 = task_status; // status information
  }

Cortex-M3 additional Debug Access

CMSIS provides additional debug functions to enlarge the Cortex-M3 Debug Access. Data can be transmitted via a certain global buffer variable towards the target system.

The buffer variable and the prototypes of the additional functions are shown in the table below.

Name | Parameter | Description
extern volatile int ITM_RxBuffer |  | Buffer to transmit data towards debug system. Value 0x5AA55AA5 indicates that buffer is empty.
int ITM_ReceiveChar (void) | none | The nonblocking functions returns the character stored in ITM_RxBuffer. Return: -1 indicates that no character was received.
int ITM_CheckChar (void) | none | The function checks if a character is available in ITM_RxBuffer. Return: 1 indicates that a character is available, 0 indicates that no character is available.

CMSIS Example

The following section shows a typical example for using the CMSIS layer in user applications. The example is based on a STM32F10x Device.

#include "stm32f10x.h"

volatile uint32_t msTicks;                       /* timeTicks counter */

void SysTick_Handler(void) {
  msTicks++;                                     /* increment timeTicks counter */
}

__INLINE static void Delay (uint32_t dlyTicks) {
  uint32_t curTicks = msTicks;

  while ((msTicks - curTicks) < dlyTicks);
}

__INLINE static void LED_Config(void) {
  ;                                              /* Configure the LEDs */
}

__INLINE static void LED_On (uint32_t led) {
  ;                                              /* Turn On  LED */
}

__INLINE static void LED_Off (uint32_t led) {
  ;                                              /* Turn Off LED */
}

int main (void) {
  if (SysTick_Config (SystemCoreClock / 1000)) { /* Setup SysTick for 1 msec interrupts */
    ;                                            /* Handle Error */
    while (1);
  }

  LED_Config();                                  /* configure the LEDs */

  while(1) {
    LED_On (0x100);                              /* Turn  on the LED   */
    Delay (100);                                 /* delay  100 Msec    */
    LED_Off (0x100);                             /* Turn off the LED   */
    Delay (100);                                 /* delay  100 Msec    */
  }
}

CMSIS MISRA-C:2004 Compliance Exceptions

CMSIS violates following MISRA-C2004 Rules:

  • Violates MISRA 2004 Required Rule 8.5, object/function definition in header file.
    Function definitions in header files are used to allow 'inlining'.
  • Violates MISRA 2004 Required Rule 18.4, declaration of union type or object of union type: '{...}'.
    Unions are used for effective representation of core registers.
  • Violates MISRA 2004 Advisory Rule 19.7, Function-like macro defined.
    Function-like macros are used to allow more efficient code.


CMSIS Debug Support

This file describes the CMSIS Debug support available with CMSIS (starting V1.30).

Version: 1.02 - 25. July 2011

Information in this file, the accompany manuals, and software is
Copyright © ARM Ltd.
All rights reserved.

Revision History

  • Version 1.00: Initial Release.
  • Version 1.01: Internal Review.
  • Version 1.02: Removed product specific information.

Contents

  1. About
  2. Cortex-M3 / Cortex-M4 ITM Debug Access
  3. Debug IN / OUT functions
  4. ITM Debug Support in Debugger

About

CMSIS provides for Cortex-M3 / Cortex-M4 processor based microcontrollers debug support via the Instrumented Trace Macrocell (ITM). This document describes the available CMSIS Debug functions and the used methods.

Cortex-M3 / Cortex-M4 ITM Debug Access

The Cortex-M3 incorporates the Instrumented Trace Macrocell (ITM) that provides together with the Serial Viewer Output trace capabilities for the microcontroller system. The ITM has 32 communication channels which are able to transmit 32 / 16 / 8 bit values; two ITM communication channels are used by CMSIS to output the following information:

  • ITM Channel 0: used for printf-style output via the debug interface.
  • ITM Channel 31: is reserved for RTOS kernel awareness debugging.

Debug IN / OUT functions

CMSIS provides following debug functions:

  • ITM_SendChar (uses ITM channel 0)
  • ITM_ReceiveChar (uses global variable)
  • ITM_CheckChar (uses global variable)

ITM_SendChar

ITM_SendChar is used to transmit a character over ITM channel 0 from the microcontroller system to the debug system.
Only a 8 bit value is transmitted.

static __INLINE uint32_t ITM_SendChar (uint32_t ch)
{
  /* check if debugger connected and ITM channel enabled for tracing */
  if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA)  &&
      (ITM->TCR & ITM_TCR_ITMENA)                  &&
      (ITM->TER & (1UL << 0))  )
  {
    while (ITM->PORT[0].u32 == 0);
    ITM->PORT[0].u8 = (uint8_t)ch;
  }
  return (ch);
}

ITM_ReceiveChar

ITM communication channel is only capable for OUT direction. For IN direction a global variable is used. A simple mechanism detects if a character is received. The project to test need to be build with debug information.

The global variable ITM_RxBuffer is used to transmit a 8 bit value from debug system to microcontroller system. ITM_RxBuffer is 32 bit wide to ensure a proper handshake.

extern volatile int32_t ITM_RxBuffer;                    /* variable to receive characters                             */

A dedicated bit pattern is used to determine if ITM_RxBuffer is empty or contains a valid value.

#define                 ITM_RXBUFFER_EMPTY    0x5AA55AA5 /* value identifying ITM_RxBuffer is ready for next character */

ITM_ReceiveChar is used to receive a 8 bit value from the debug system. The function is nonblocking. It returns the received character or '-1' if no character was available.

static __INLINE int32_t ITM_ReceiveChar (void) {
  int32_t ch = -1;                               /* no character available */

  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
    ch = ITM_RxBuffer;
    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
  }

  return (ch);
}

ITM_CheckChar

ITM_CheckChar is used to check if a character is received.

static __INLINE int32_t ITM_CheckChar (void) {

  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
    return (0);                                 /* no character available */
  } else {
    return (1);                                 /*    character available */
  }
}

ITM Debug Support in a Debugger

The Debugger shall offer a dedicated console window for printf style debug input and output using the CMSIS defined ITM methods described above.

Direction: Microcontroller -> Debugger:

  • at the beginning of a debug session the debugger shall enable ITM trace on channel 0 and continuously snoop for channel 0 data on the ITM trace stream it receives from the Microcontroller's CoreSight ITM unit
  • data received via the ITM communication channel 0 is interpreted as charater and gets redirected into the dedicated Console Window

Direction: Debugger -> Microcontroller:

  • at the beginning of a debug session the debugger shall seek for the presence of the global variable named ITM_RxBuffer in the debug information of the application being loaded
  • strings entered into the Console Window are written by the debugger as a stream of char values via the variable ITM_RxBuffer.
  • the debugger writes the next character into the ITM_RxBuffer only once the value has been read and the ITM_RXBUFFER_EMPTY value being set. (refer to: ITM_ReceiveChar()).


CMSIS Version History

This document describes the changes between the different CMSIS versions.

Version: 2.10 - July 2011

Information in this file, the accompany manuals, and software is
Copyright © ARM Ltd.
All rights reserved.

Contents

  1. Used Toolchains
  2. Changes to version V2.00
  3. Changes to version V1.30
  4. Changes to version V1.20
  5. Open Points
  6. Limitations

Used Toolchains

Following toolchains have been used for test / verification:.

  • ARM: MDK-ARM Version 4.21
  • GNU: Sourcery G++ Lite Edition for ARM 2010.09-51
  • IAR: IAR Embedded Workbench Kickstart Edition V6.10

Changes to version V2.00

Added CMSIS DSP Software Library support for Cortex-M0 based MCUs

The CMSIS DSP Software Library provides now also libraries and examples for Cortex-M0.

For more information refer to CMSIS DSP Library documentation.

Added big endian support for DSP library

The CMSIS DSP Software Library provides now also pre-build libraries and projects for big endian devices.

For more information refer to CMSIS DSP Library documentation.

Simplified folder structure for CMSIS include files

All CMSIS core include files as well as the DSP-Library header files are located in a single folder ./CMSIS/Include.

Changed folder structure for Device Support packages

Device Support packages are expected to be in folder ./Device located at the same level as ./CMSIS.

The new Device folder contains the following subfolders:

  • Device
    • <Vendor>
      • <Device> | <Device Series>
        • Include
          <device>.h
          system_<device>.h
        • Source
          • Templates
            system_<device>.c
            • <Toolchain>
              startup_<device>.s
            • <Toolchain>
            • ...
      • <Device> | <Device Series>
      • ...
    • <Vendor>
    • ...

Template files are application specific files and are required to be copied to the project prior to use!

Removed CMSIS core source files

The CMSIS core source files core_cm0.c, core_cm3.c, core_cm4.c containing helper functions for older ARM compiler versions got removed.

For the ARM Compiler Toolchain version V4.0.677 or later is required!

Changes to version V1.30

Added CMSIS DSP Software Library

The CMSIS DSP Software Library is a suite of common signal processing functions targeted to Cortex-M processor based microcontrollers. Even though the code has been specifically optimized towards using the extended DSP instruction set of the Cortex-M4 processor, the library can be compiled for any Cortex-M processor.

For more information see CMSIS DSP Library documentation.

Added CMSIS System View Description

The CMSIS System View Description answers the challenges of accurate, detailed and timely device aware peripheral debugging support for Cortex Microcontroller based devices by the software development tools vendor community.

Silicon vendors shall create and maintain a formalized description of the debug view for all the peripherals contained in their Cortex Microcontroller based devices. Tool vendors use such descriptions to establish device specific debug support in their debugging tools.

A standardized System View Description shall provide a common approach to capturing peripheral debug related information in a machine readable files.

For more information see CMSIS System View Description.

Added Cortex-M4 Core Support

Additional folder CM4, containing the Cortex-M4 core support files, has been added.

  • CM0
  • CM3
  • CM4
    • CoreSupport
    • DeviceSupport

New naming for Core Support Files

The new Core Support Files are:

  • core_cm#.h (# = 0, 3, 4)
  • core_cmFunc.h (Cortex-M Core Register access functions)
  • core_cmInstr.h (Cortex-M Core instructions)
  • core_cm4_simd.h (Cortex-M4 SIMD instructions)

Changes to version V1.20

Removed CMSIS Middelware packages

CMSIS Middleware is removed and no longer focus of CMSIS.

SystemFrequency renamed to SystemCoreClock

The variable name SystemCoreClock is more precise than SystemFrequency because the variable holds the clock value at which the core is running.

Changed startup concept

The old startup concept (calling SystemInit_ExtMemCtl from startup file and calling SystemInit from main) has the weakness that it does not work for controllers which need a already configuerd clock system to configure the external memory controller.

Changed startup concept
  • SystemInit() is called from startup file before premain.
  • SystemInit() configures the clock system and also configures an existing external memory controller.
  • SystemInit() must not use global variables.
  • SystemCoreClock is initialized with a correct predefined value.
  • Additional function void SystemCoreClockUpdate (void) is provided.
    SystemCoreClockUpdate() updates the variable SystemCoreClock and must be called whenever the core clock is changed.
    SystemCoreClockUpdate() evaluates the clock register settings and calculates the current core clock.

Advanced Debug Functions

ITM communication channel is only capable for OUT direction. To allow also communication for IN direction a simple concept is provided.

  • Global variable volatile int ITM_RxBuffer used for IN data.
  • Function int ITM_CheckChar (void) checks if a new character is available.
  • Function int ITM_ReceiveChar (void) retrieves the new character.

For detailed explanation see file CMSIS debug support.htm.

Core Register Bit Definitions

Files core_cm3.h and core_cm0.h contain now bit definitions for Core Registers. The name for the defines correspond with the Cortex-M Technical Reference Manual.

e.g. SysTick structure with bit definitions

/** \brief  Structure type to access the System Timer (SysTick).
 */
typedef struct
{
  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */
  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */
  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */
} SysTick_Type;

/* SysTick Control / Status Register Definitions */
#define SysTick_CTRL_COUNTFLAG_Pos         16                                             /*!< SysTick CTRL: COUNTFLAG Position */
#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */

#define SysTick_CTRL_CLKSOURCE_Pos          2                                             /*!< SysTick CTRL: CLKSOURCE Position */
#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */

#define SysTick_CTRL_TICKINT_Pos            1                                             /*!< SysTick CTRL: TICKINT Position */
#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */

#define SysTick_CTRL_ENABLE_Pos             0                                             /*!< SysTick CTRL: ENABLE Position */
#define SysTick_CTRL_ENABLE_Msk            (1UL << SysTick_CTRL_ENABLE_Pos)               /*!< SysTick CTRL: ENABLE Mask */

/* SysTick Reload Register Definitions */
#define SysTick_LOAD_RELOAD_Pos             0                                             /*!< SysTick LOAD: RELOAD Position */
#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos)        /*!< SysTick LOAD: RELOAD Mask */

/* SysTick Current Register Definitions */
#define SysTick_VAL_CURRENT_Pos             0                                             /*!< SysTick VAL: CURRENT Position */
#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick VAL: CURRENT Mask */

/* SysTick Calibration Register Definitions */
#define SysTick_CALIB_NOREF_Pos            31                                             /*!< SysTick CALIB: NOREF Position */
#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */

#define SysTick_CALIB_SKEW_Pos             30                                             /*!< SysTick CALIB: SKEW Position */
#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */

#define SysTick_CALIB_TENMS_Pos             0                                             /*!< SysTick CALIB: TENMS Position */
#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick CALIB: TENMS Mask */

/*@} end of group CMSIS_SysTick */

DoxyGen Tags

DoxyGen tags in files core_cm3.[c,h] and core_cm0.[c,h] are reworked to create proper documentation using DoxyGen.

Folder Structure

The folder structure is changed to differentiate the single support packages.

  • CM0
  • CM3
    • CoreSupport
    • DeviceSupport
      • Vendor
        • Device
          • Startup
            • Toolchain
            • Toolchain
            • ...
        • Device
        • ...
      • Vendor
      • ...
    • Example (optional)
      • Toolchain
        • Device
        • Device
        • ...
      • Toolchain
      • ...
  • Documentation

Open Points

Following points need to be clarified and solved:

  • Equivalent C and Assembler startup files.

    Is there a need for having C startup files although assembler startup files are very efficient and do not need to be changed?

  • Placing of HEAP in external RAM.

    It must be possible to place HEAP in external RAM if the device supports an external memory controller.

  • Placing of STACK /HEAP.

    STACK should always be placed at the end of internal RAM.

    If HEAP is placed in internal RAM than it should be placed after RW ZI section.

Limitations

The following limitations are not covered with the current CMSIS version:

  • No C startup files are available.


CMSIS - SVD: Cortex Microcontroller Software Interface Standard - System View Description

Cortex Microcontroller Software Interface Standard
System View Description

This file describes the Cortex Microcontroller Software Interface Standard - System View Description (CMSIS - SVD) concept and syntax.

Version: 1.02 - 27. July 2011

Information in this file, the accompany manuals, and software is
Copyright © ARM Ltd.
All rights reserved.

Revision History

  • Version 0.91: initial proposal.
  • Version 0.92: revised proposal considering forum feedback (e.g. consider IP-XACT constructs and naming scheme)
  • Version 1.0: new elements: peripheral version, vendor specific extension section, interrupt mapping information, global peripheral disable condition, naming of register arrays, enhanced naming schemes, etc.
  • Version 1.0: SVD versioning and updated schema file
  • Version 1.01: Error corrections in the example code. "include" has been removed. Restricted to one device per file.
  • Version 1.02: Adding the use case of device header file generation.

Contents

  1. About
  2. Motivation
  3. Requirements
  4. Format
  5. Example
  6. Questions & Answers

About

The Cortex Microcontroller Software Interface Standard - System View Description (CMSIS - SVD) answers the challenges of accurate, detailed and timely device aware peripheral debugging support for Cortex Microcontroller based devices by the software development tools vendor community.

Silicon vendors shall create and maintain a formalized description of the debug view for all the peripherals contained in their Cortex Microcontroller based devices. Tool vendors use such descriptions to establish device specific debug support in their debugging tools with minimal turn around times and manageable effort. Device support across many development tools is essential for silicon provider in order to promote new devices and device variants entering the market. Device aware debug views provide fast and convenient access to all registers and fields as well as a detailed description. This enables software developer to develop and debug code most efficiently and adopt new devices early and quickly.

A standardized System View Description shall provide a common approach to capturing peripheral debug related information in a machine readable files. The scope of the contained information is agreed to match the level usually provided by silicon vendors in their device reference manuals, however in a formalized XML based format. There are other description languages already available. IP-XACT from the SPIRIT consortium is a prominent example. IP-XACT covers the register description sufficiently, however it comprises many other aspects of the devices like ports, bus-protocols, modeling, tool flows, etc. making a direct use of IP-XACT too complex. The design of the SVD language is taking some guidance from IP-XACT thus allowing straight forward conversion from IP-XACT to CMSIS-SVD where IP-XACT device information is already available.

In a second step the CMSIS-SVD description shall be used for automatically generating CMSIS compliant a device header file. This enables the information in the header file to be consistent with what the debugger will display and CMSIS compliant by construction. The header file generation will require some additional pieces of information and therefore a future version of the description will need to include some extensions for this purpose.

Device aware debugging support is only one aspect of device support essential to software development environments, however it is one of the most time consuming and error prone ones.

Motivation

The software developer of microcontroller devices is faced with a growing number of devices with an ever increasing number of peripheral blocks providing a wide range of distinct and complex functionality. The development of drivers for these peripherals is in the critical path of every project. Modern debuggers are supporting the software developer in getting the software to run according to the requirements. A debugger providing peripheral awareness improves the ability to access and interpret complex configuration and status information of peripherals. Even though this is only one aspect of device support within microcontroller development environments it is essential for the successful and timely adoption of development tools and the device by the market.

Today software development environments address device aware debugging in various ways. They either use documents or proprietary file formats as input for providing peripheral views in the debuggers. Extracting peripheral information from written documentation is a very time consuming, tedious and error prone task. Having a file containing peripheral specific information to generate peripheral views is going to make device support more affordable, reliable and timely. The challenge for the tool providers is the support of many different and incompatible file formats from a growing number of silicon vendors. For silicon vendors it is time consuming and costly to engage with many tool provider in order to achieve device support in a wide range of development environments.

Standardizing on a System View Description aims to ease this challenge by agreeing on a formal XML-based file format. In conjunction with supporting web server infrastructure silicon partner shall upload and maintain such descriptions in a tool vendor agnostic device database, hosted e.g. by the web server infrastructure cmsis.arm.com . Access control to sensitive information is managed on a per user basis. This allows silicon vendors to upload information for devices that have not been made public.

Such an approach provides benefits for silicon and tool vendors as well as software developers of Cortex-M based microcontroller devices

  • timely and accurate device support provided by a whole range of tool providers
  • tool providers become more efficient in supporting a multitude of devices and device variants
  • less interaction required between silicon vendors and the tool providers
  • silicon provider has control over and maintains the System View Description during the life cycle of the device
  • high quality device support in terms of completeness and correctness of device aware debugging
  • improved productivity and user experience for the software developer

Requirements

The debug description shall capture the information about all the peripherals contained in a specific device. This section describes which items of information are deemed relevant for a debugger. Silicon vendors are expected to provide the System View Description for their devices, matching the information contained in device reference manuals. The System View Description shall be suitable for straight forward generation from existing databases like IP-XACT descriptions or SIDSC. The size of device description is a concern and therefore redundancy in the description shall be avoided. The size of SVD files affects the efficiency of distribution as well as the loading time by the development tools. Last but not least manual editing of SVD files shall be possible for the purpose of customization by SW developers.

Required content of the description

From a programmer's perspective a peripheral can be seen as a set of registers with unique names being mapped to fixed addresses allocated within a defined range of an address space.

From a debugger's point of view read accesses to a physical register need to be executed in order to display its current value. The debugger executes a write access to a register when a user edits its value. For this purpose the debugger needs to know about the following additional attributes:

  • minimal addressable unit = smallest series of bits identified by a unique address (e.g. byte-addressable memory)
  • register size = number of bits forming a register (ARM Cortex-M usually 32 bits)
  • access permission = read and write, read only, write only
  • access side effects = accesses by the debugger must be avoided if it has side effects. Some side effects may be reversed by the debugger to compensate for the side effect

In many cases peripheral registers are partitioned into chunks of bits of distinct functionality. In this document these chunks are referred to as field. Each register that consists of fields shall be described by a list of uniquely named fields (Note: field names are not required to be unique across registers). In order for a debugger to extract the value of a field from the corresponding register the following attributes are required:

  • most significant bit = highest bit position of the bit-field in the corresponding register
  • least significant bit = lowest bit position of the bit-field within the corresponding register
  • access permission = read and write, read only, write only

An enumerated value maps a number to a specific descriptive string representing the semantics of the value of a field. The debugger displays the descriptive string rather than the number to simplify the access to the information thus avoiding the necessity of a look-up in the device reference manual. Each item of an enumerated value has the following attributes:

  • value = value of the bit-field that corresponds to the string attribute
  • name = short string that describes the semantics of a field when the corresponding value is set
  • description = detailed description of the semantics of the field when the corresponding value is set

The hierarchical structure of the description looks like this:

Device =

  • Peripherals

    • Peripheral

      • Registers

        • Register

          • Fields

            • Field

              • Enumerated Values

                • Enumerated Value

One file can only contain a description for a single device or device family sharing the identical description. Devices consists of a one or more peripherals. Each peripheral contains one or more registers, where each register may consist of one or more fields. The values of a field maybe represented through descriptive strings and detailed descriptions, the enumerated values.

In many cases there are multiple instances of the same peripheral in a device (e.g. Timer0, Timer1, etc.). For this reason the description has the concept of deriving a peripheral from a peripheral that has already been described. The attribute derivedFrom specifies such a relationship. Similarly registers or fields can be reused within the device description. The grouping of peripherals providing similar functionality (e.g. Simple Timer, Complex Timer) is controlled via the element groupName. All peripherals associated with the same group name are collectively listed under this group in the order they have been specified in the file. Collecting similar or related peripherals into peripheral groups helps structuring the list of peripherals e.g. in a drop down menu (tool dependent). Devices with a large set of peripherals will benefit from this additional level of structure.

Each of the items (i.e. Device, Peripheral, Register and Field) owns an description element containing verbose information about the respective element. The description field plays an important part in improving the software development productivity. Instead of searching through the reference manual the detailed explanation from the manual could become immediately accessible from within the development environment.

Details about the exact display format and layout of the peripheral view are considered beyond the scope of the description. It is up to the tool vendor to visualize the contained information appropriately. The silicon vendor provides details about the device's peripherals that is commonly available.

System View Description files need to be validated for:

  1. syntactical correctness using XML-Schema checking utilities
  2. consistency of the provided information (e.g. multiple registers mapped to the same address, all registers located within the specified address ranges of a peripheral, all fields are within the range of the register size, etc.) by a utility developed by ARM (SVDConv.exe)
  3. semantical correctness of the System View Description against the silicon specification executed by the silicon vendor

The SVD description format was extended by numerous elements during the review period targeting version 1.0 and new extensions are expected for future versions of this format. A new section named "vendorExtensions" has been added to the end of the top level to allow silicon vendors and tool partners to innovate and expand the description in order to overcome limitations of the current specification until these can be incorporated into new versions of CMSIS-SVD.

Format

The following section describes the SVD file format in detail. Each subsection defines a single hierarchy level of the description and lists all mandatory and optional language elements for that specific level including type information for each element. Each element is discussed in more detail and a brief snippet is provided as an example. The sequence of elements shown below is binding. Optional elements are highlighted in green, blue elements are mandatory unless they have been already specified globally on a higher level.

An XML-schema file is provided alongside this document for syntactical checking of descriptions being developed.

<device schemaVersion="xs:decimal" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_0.xsd">

<name>xs:Name</name>
<version>xs:string</version>
<description>xs:string</description>
 <addressUnitBits>scaledNonNegativeInteger</addressUnitBits>
<width>scaledNonNegativeInteger </width>

<size>scaledNonNegativeInteger</size>
 <access>accessType</access>
<resetValue>scaledNonNegativeInteger</resetValue>
<resetMask>scaledNonNegativeInteger</resetMask>

<peripherals>
...
</peripherals>
<vendorExtensions>
...
</vendorExtensions>

</device>

The device provides the outermost frame of the description. All other elements like peripherals, registers and fields are described inside of this scope. A device contains one or more peripherals. The optional elements size, access, resetValue and resetMask are used as default values throughout the device description unless they get overruled on a lower level of the description (e.g. peripheral or register).

Mandatory items:

name = the unique name string is used to identify the device. All devices of a silicon vendor are required to have a unique name. In case an SVD description covers a family or series of devices, the name of the series or family is placed here. The device names of the members of the series or family are listed in <memberDevices>

description = string describing main features of a device (e.g. CPU, clock frequency, peripheral overview, etc.)

version = the string is defining the version of the description for this device. Silicon vendors will maintain the description throughout the lifecycle of the device and need to ensure that all updated and released copies have a unique version string indicating the order in which. Note: this must not be used for detailing the version of the device.

addressUnitBits = defines the number of data bits for each address increment. The value for Cortex-M based devices is 8 (byte-addressable).

width = defines the number of bits for the maximum single transfer size allowed by the bus interface hence the maximum size of a single register that can be defined for the address space. This information is relevant for debuggers when determining the size of debug transfers. The expected value for Cortex-M based devices is 32.

peripherals = next level of description (see next section for details)

Optional Items:

size = defines the default bit-width of registers contained in the device. This element can be overruled by re-specifying the size element on a lower level of the description.

access = defines the default access permissions for all registers in the device. The allowed tokens are:
- read-only: read access is permitted. Write operations have an undefined result.
- write-only: write access is permitted. Read operations have an undefined result.
-read-write: both read and write accesses are permitted. Writes affect the state of the register and reads return a value related to the register
-writeOnce: only the first write after reset has an effect on the register. Read operations deliver undefined results
-read-writeOnce: Read operations deliver a result related to the register content. Only the first write access to this register after a reset will have an effect on the register content.

resetValue = defines the default value of all registers after a reset. There are scenarios where SW developers need to know, what the reset value of a register or field is. Even though listed as optional on this level of the description, silicon vendors should ensure that this information is provided for all registers.

resetMask = defines those bit positions set to one to be taken from resetValue element. All other elements are undefined. If a register does not have a defined reset value the resetMask needs to be set to 0.

vendorExtensions = the content and format of this section of the description is unspecified. Silicon vendors may choose to provide additional information. The assumption is that by default this section is completely ignored by the debugger. It is up to the silicon vendor to specify the content of this section and share the specification with the tool vendors. The new elements shall be considered for a future version of the description format.

Example:

<device schemaVersion="1.0" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_0.xsd" >
  <name>CMSIS_Cortex-M3</name>
  <version>0.1</version>
  <description>ARM Cortex-M3 based Microcontroller demonstration device</description>
  <addressUnitBits>8</addressUnitBits>
  <width>32</width>
  <size>32</size>
  <access>read-write</access>
  <resetValue>0</resetValue>
  <resetMask>0xffffffff</resetMask>
  <peripherals>
    ...
  </peripherals>
</device>

The device description above is at version 0.1 and uniquely identifies the device by the name "CMSIS_Cortex-M3". The peripherals are memory mapped in a byte-addressable address space with a bus width of 32 bits. The default size of the registers contained in the peripherals is set to 32 bits. Unless redefined for specific peripherals, registers or fields all registers are read-write accessible. A reset value of 0 valid for all 32 bits as specified by the reset mask is set for all registers unless overruled at a lower level of the description.

<peripherals>

<peripheral>
...
</peripheral>

...

<peripheral>
...
</peripheral>

</peripherals>

This construct sets the frame for all peripherals and peripheral groups contained in a device. This creates a container element which ease-up processing with languages like Java.

<peripheral derivedFrom="xs:Name">

<name>xs:Name</name>
<version>xs:string</name>
<description>xs:string </description>
<groupName>xs:string</groupName>
<prependToName>xs:string</prependToName>
<appendToName>xs:string</appendToName>
<disableCondition>xs:string</disableCondition>
<baseAddress>scaledNonNegativeInteger</baseAddress>
<size>scaledNonNegativeInteger</size>
 <access>accessType</access>
<resetValue>scaledNonNegativeInteger</resetValue>
<resetMask>scaledNonNegativeInteger</resetMask>

<addressBlock>
<offset>scaledNonNegativeInteger</offset>
<size>scaledNonNegativeInteger</size>
<usage>usageType</usage>
</addressBlock>
 ...
 <addressBlock>
<offset>scaledNonNegativeInteger</offset>
<size>scaledNonNegativeInteger</size>
<usage>usageType</usage>
</addressBlock>
<interrupt>
<name>xs:string</name>
<value>scaledNonNegativeInteger</value>
</interrupt>
 <registers>
...
</registers>

</peripheral>

A peripheral encloses the description of one or more registers belonging to this named peripheral. The address range allocated in the address space for this peripheral is defined through one or more address ranges. An address range is specified relative to the base address of the peripheral. This information allows to display a memory map overview for all peripherals. Please note that such a memory map does not contain any information for memories and unoccupied address ranges.

Mandatory items:

name = name string used to identify the peripheral. Peripheral names are required to be unique within the scope of a device.

baseAddress = lowest address reserved or used by the peripheral

description = string providing an overview of the purpose and functionality of the peripheral

addressBlock = a peripheral may occupy one or more disparate blocks in the address space. An addressBlock is a complex element consisting of the mandatory elements:
offset: specifying the start address of an address block. It is calculated from the sum of baseAddress and offset
size: specifying the number of addressUnitBits being covered by this address block. The end address of an address block is the sum of start address and the size - 1.
usage: the usage element is of usageType specifying if the addresses within the specified address block is used for registers or buffer or is reserved.
Note: registers must not be allocated to an address within a reserved or buffer address range.

registers = next lower level of description (see next section for details)

Optional items:

derivedFrom = this attribute specifies the name of a peripheral that has already been described for this device. The description of that device will be copied. It is mandatory to overwrite the name as well as the addressOffset. All other specified information will overwrite the respective elements in the copy.

version = the string specifies the version of this peripheral description.

disableCondition = C language compliant logical expression resulting in a true or false result. If "true" the refresh of the display for this peripheral is disabled and related accesses by the debugger are suppressed. Only constants and references to other registers contained in the description are allowed: <peripheral>-><register>-><field> (e.g.: (System->ClockControl->apbEnable == 0)). Only the following operators are allowed [&&,||, ==, !=, >>, <<, &, |]. Warning! This feature must only be use in case accesses from the debugger to registers of un-clocked peripherals result in severe debugging failures. SVD is intended to be fully static information and not include any run-time computation or functions such capabilities may be added by the tools but is considered beyond the scope of this description language.

prependToName = all register names of this peripheral have their names prepended with the string specified

appendToName = all register names of this peripheral have their names appended with the string specified

size = defines the default bit-width of registers contained in the device. This element can be overruled by re-specifying the size element on a lower level of the description.

access = defines the default access permissions for all registers in the peripheral. The value can be reset on a lower level of the description. The allowed tokens are:
- read-only: read access is permitted. Write operations have an undefined result.
- write-only: write access is permitted. Read operations have an undefined result.
-read-write: both read and write accesses are permitted. Writes affect the state of the register and reads return a value related to the register
-writeOnce: only the first write after reset has an effect on the register. Read operations deliver undefined results
-read-writeOnce: Read operations deliver a result related to the register content. Only the first write access to this register after a reset will have an effect on the register content.

resetValue = defines the default value of all registers after a reset but can be set for individual registers and fields on a lower level of the description.

resetMask = defines those bit positions set to one to be taken from resetValue element. All other elements are undefined. This is the default value for the whole peripheral but can be readjusted on lower levels. If a register does not have a defined reset value the resetMask needs to be set to 0.

interrupt = is a complex type that consists of the name of the interrupt and the associated enumeration value. A peripheral can also have multiple associated interrupts. This entry is mainly intended for information only purposes in order to display the interrupts and respective interrupt numbers associated with a peripheral.

Example:

...
    <peripheral>
       <name>Timer0</name>
       <version>1.0.32</version>
       <description>Timer 0 is a simple 16 bit timer counting down ... </description>
       <baseAddress>0x40000000</baseAddress>
       <addressBlock>
         <offset>0x0</offset>
         <size>0x400</size>
         <usage>registers</usage>
       </addressBlock>
       <interrupt><name>TIM0_INT</name><value>34</value></interrupt>
       <registers>
         ...
       </registers>
    </peripheral>
    <peripheral derivedFrom="Timer0">
      <name>Timer1</name>
      <baseAddress>0x40000400</baseAddress>
    </peripheral>

...

<registers> ... </registers>

This construct sets the frame for all registers contained in a peripheral. This creates container elements which ease-up processing with languages like Java.

<register derivedFrom=xs:Name>

<dim>scaledNonNegativeInteger</dim>
<dimIncrement>scaledNonNegativeInteger</dimIncrement>
<dimIndex>xs:string</dimIndex>
<name>xs:Name</name>
<displayName>xs:string</displayName>
 <description>xs:string</description>
<alternateGroup>xs:Name</alternateGroup>
 <addressOffset>scaledNonNegativeInteger </addressOffset>
<size>scaledNonNegativeInteger</size>
 <access>accessType</access>
<resetValue>scaledNonNegativeInteger</resetValue>
<resetMask>scaledNonNegativeInteger</resetMask>
 <modifiedWriteValues>writeValueType</modifiedWriteValues>
<writeConstraint>writeConstraintType</writeConstraint>
<readAction>readActionType </readAction>
 <fields>
...
</fields>

</register>

The definition of registers is the central part of the description. A register may use its complete size for a single purpose and therefore not consist of fields. Otherwise the description of fields is mandatory.

Mandatory items:

name = name string used to identify the register. Register names are required to be unique within the scope of a peripheral.

description = string describing the details of the register.

addressOffset = value defining the address of the register relative to the baseAddress defined by the peripheral the register belongs to.

The following elements can be omitted if the corresponding value has been set on a higher level of the description and matches the value required for this register:

size =value defining the bit-width of the register

access = predefined tokens: read-only, write-only, read-write, writeOnce, read-writeOnce strings defining the allowed accesses for this register.

resetValue = element defining the value of the register immediately after a reset.

resetMask= element specifying those bits of the resetValue that are defined (bit positions containing a 0 bit are ignored, bit positions containing a 1 bit are taken from the corresponding bit position of the resetValue). If a register does not have a defined reset value the resetMask needs to be set to 0.

Optional items:

dim = if this field is specified the value defines the number of elements in an array of registers.

dimIncrement = if dim is specified this element becomes mandatory and specifies the address increment in between two neighboring registers of the register array in the address map.

dimIndex = this element specifies the substrings within the register array names that will replace the %s within the register name. By default the index is a decimal value starting with 0 for the first register. Examples:
<dim>6</dim> <dimIncrement>4</dimIncrement> <dimIndex>A,B,C,D,E,Z</dimIndex> <name>GPIO_%s_CTRL</name> ...
=> GPIO_A_CTRL, GPIO_B_CTRL, GPIO_C_CTRL, GPIO_D_CTRL, GPIO_E_CTRL, GPIO_Z_CTRL
<dim>4</dim> <dimIncrement>4</dimIncrement> <dimIndex>3-6</dimIndex> <name>IRQ%s</name> ...
=> IRQ3, IRQ4, IRQ5, IRQ6

displayName = when used, this is the string being used by a graphical frontend to visualize the register otherwise the name element is used. Note: the display name may contain special characters and white spaces. It also uses "%s" as the place holder for the dimIndex substring.

alternateGroup = when used, this element specifies a name of a group that all alternate register with the same name a associated with. At the same time it indicates that there is a register description allocating the same absolute address in the address space.

modifiedWriteValues = element to describe the manipulation of data written to a register. If not specified the value written to the field is the value stored in the field. The other options are bitwise operations:
oneToClear: write data bits of one shall clear (set to zero) the corresponding bit in the register
oneToSet: write data bits of one shall set (set to one) the corresponding bit in the register
oneToToggle: write data bits of one shall toggle (invert) the corresponding bit in the register
zeroToClear: write data bits of zero shall clear (set to zero) the corresponding bit in the register
zeroToSet: write data bits of zero shall set (set to one) the corresponding bit in the register
zeroToToggle: write data bits of zero shall toggle (invert) the corresponding bit in the register
clear: after a write operation all bits in the field are cleared (set to zero)
set: after a write operation all bits in the field are set (set to one)
modify: after a write operation all bit in the field may be modified (default)

writeConstraint: has a set of options:
writeAsRead = if true only the last read value can be written
useEnumeratedValues = if true only those values listed in the enumeratedValues list are considered valid write values
minimum = specifies the smallest number to be written to the register
maximum = specifies the largest number to be written to the register

readAction: if set it specifies the side effect following read operations. If not set the register is not modified following a read operations. The defined side effects are:
clear: indicates that the register is cleared (set to zero) following a read operation
set: indicates that the register is set (set to ones) following a read operation
modify: indicates that the register is modified in some way after a read operation
modifyExternal: indicates that one or more dependent resources other than the current register are immediately affected by a read (it is recommended that the register description specifies these dependencies). Debuggers are not expected to read this register location unless explicitly instructed by user.

fields = next lower level of description (see next section for details).

Optional attribute:

derivedFrom = specifies the name of the register to be replicated. Elements being specified underneath will override the values specified from the register being derived from. Note that it is mandatory to overwrite at least name and addressOffset.

Example:

...
       <register>
         <name>TimerCtrl0</name>
         <description>Timer Control Register</description>
         <addressOffset>0x0</addressOffset>
         <access>read-write</access>
         <resetValue>0x00008001</resetValue>
         <resetMask>0x0000ffff</resetMask>
         <size>32<size>
         <fields>
           ...
         </fields>
       </register>
       <register derivedFrom="TimerCtrl0">
         <name>TimerCtrl1</name>
         <addressOffset>0x4<addressOffset>
       </register>
...

<fields> ... </fields>

This construct sets the frame for all fields contained in a register. This creates container elements which ease-up processing with languages like Java.

<field derivedFrom="xs:Name">

<name>xs:Name</name>
 <description>xs:string</description>
<bitOffset>scaledNonNegativeInteger</bitOffset> <bitWidth>scaledNonNegativeInteger</bitWidth>
or
<lsb>scaledNonNegativeInteger</lsb> <msb>scaledNonNegativeInteger</msb>
or
<bitRange>pattern</bitRange>
<access>accessType</access>
 <modifiedWriteValues>writeValueType</modifiedWriteValues>
<writeConstraint>writeConstraintType</writeConstraint>
<readAction>readActionType </readAction>
 <enumeratedValues>
...
</enumeratedValues>

</field>

A bit-field has a name that is unique for the register it belongs to. The position and size within the register is either described by the combination of the least significant bit's position (lsb) and the most significant bit's position (msb) or the lsb and the size, specifying the bit-width of the field. A field may define an enumeratedValue in order to make the display more intuitive to read.

Mandatory items:

name = name string used to identify the field. Field names are required to be unique within the scope of a register.

description = string describing the details of the register.

There are 3 ways to describe a field to be used mutually exclusive:
a) specifying bitOffset and bitWidth (IP-XACT like)
b) specifying lsb and msb of the field.
c) specifying a bit range in the format "[<msb>:<lsb>]"

bitOffset = value defining the position of the least significant bit of the field within the register it belongs to.
bitWidth = value defining the bit-width of the bitfield within the register it belongs to.

lsb = value defining the bit position of the least significant bit within the register it belongs to.
msb = value defining the bit position of the most significant bit within the register it belongs to.

bitRange = a string in the format: [<msb>:<lsb>]

Optional items:

derivedFrom = the field is cloned from a previously defined field with a unique name.

access = predefined strings defining the allowed accesses for this register: read-only, write-only, read-write, writeOnce, read-writeOnce. Can be omitted if it matches the access permission set for the parent register.

enumeratedValues = next lower level of description (see next section for details)

modifiedWriteValues = element to describe the manipulation of data written to a field. If not specified the value written to the field is the value stored in the field. The other options are bitwise operations:
oneToClear: write data bit of one shall clear (set to zero) the corresponding bit in the field
oneToSet: write data bit of one shall set (set to one) the corresponding bit in the field
oneToToggle: write data bit of one shall toggle (invert) the corresponding bit in the field
zeroToClear: write data bit of zero shall clear (set to zero) the corresponding bit in the field
zeroToSet: write data bit of zero shall set (set to one) the corresponding bit in the field
zeroToToggle: write data bit of zero shall toggle (invert) the corresponding bit in the field
clear: after a write operation all bits in the field are cleared (set to zero)
set: after a write operation all bits in the field are set (set to one)
modify: after a write operation all bit in the field may be modified (default)

writeConstraint: has a set of options:
writeAsRead = if true only the last read value can be written
useEnumeratedValues = if true only those values listed in the enumeratedValues list are considered valid write values
minimum = specifies the smallest number to be written to the field
maximum = specifies the largest number to be written to the field

readAction: if set it specifies the side effect following read operations. If not set the field is not modified following a read operations. The defined side effects are:
clear: indicates that the field is cleared (set to zero) following a read operation
set: indicates that the field is set (set to ones) following a read operation
modify: indicates that the field is modified in some way after a read operation
modifyExternal: indicates that one or more dependent resources other than this field are immediately affected by a read (it is recommended that the field description specifies these dependencies). Debuggers are not expected to read the field unless explicitly instructed by user.

Example:

...
         <field>
           <name>TimerCtrl0_IntSel</name>
           <description>Select interrupt line that is triggered by timer overflow.</description>
       <bitOffset>1</bitOffset>
           <bitWidth>3</bitWidth>
           <access>read-write</access>
       <resetValue>0x0</resetValue>
           <modifiedWriteValues>oneToSet</modifiedWriteValues>
           <writeConstraint>
              <range>
                <minimum>0</minimum>
                <maximum>5</maximum>
              </range>
           </writeConstraint>
           <readAction>clear</readAction>

           <enumeratedValues>
              ...
           </enumeratedValues>
         </field>
...

<enumeratedValues derivedFrom="xs:Name">

<name>xs:Name</name>
<usage>usageType</usage>
<enumeratedValue>
...
</enumeratedValue>

...

<enumeratedValue>
...
</enumeratedValue>

</enumeratedValues>

An enumerated value provides one or more enumeration items (enumeratedValue), defining a map between all possible values of the bit-field it belongs to and the corresponding human readable semantics of that value.

Mandatory items:
enumeratedValue = next lower level of description (see next section for details)

Optional items:
derivedFrom = the enumeratedValues can be copied or derived from a previously defined enumeratedValue that has been given a unique name.
name = name string to identify an enumeratedValue. Named enumeratedValues need to be unique in the scope of a device in order to be reusable throughout the description of a device.
usage = possible values are read, write or read-write. This allows to specify two different enumerated values depending whether it is to be used for a read or a write access. If not specified the enueratedValues are valid for read and write.

Example:

...
           <enumeratedValues>
              <name>TimerIntSelect</name>
              <usage>read-write</usage>
              <enumeratedValue>
                <name>disabled</name>
                <description>disabled bit</description>
                <value>0</value>
              </enumeratedValue>
              ...
              <enumeratedValue>
                <name>reserved</name>
            <description>reserved values. Do not use</description>
                <isDefault>true</isDefault>
              </enumeratedValue>
           </enumeratedValues>
...

<enumeratedValue>

<name>xs:name</name>
<description>xs:string</description>
 <value>scaledNonNegativeInteger</value>
or
<isDefault>xs:boolean</isDefault>

</enumeratedValue>

An enumeratedValue defines a map between a value and the string reading the corresponding human readable semantics for that value in a brief and a detailed version

Mandatory items:

name= brief string verbally describing the semantics of the value defined for this enumeratedValue. E.g. used for display in visualization of a bit-field instead of the value.

value = defines the constant of the bit-field that the name corresponds to.

isDefault = defines the name and description for all other values that are not explicitly listed

Optional item:

description = extended string verbally describing the semantics of the value defined for this enumeratedValue in full detail.

Example:

...
         <enumeratedValue>
            <name>disabled</name>
            <description>Timer does not generate interrupts</description>
            <value>0</value>
         </enumeratedValue>
         ...
         <enumeratedValue>
            <name>enabled</name>
            <description>Timer does not generate interrupts</description>
            <isDefault>true</isDefault>
         </enumeratedValue>

...

Names

Names shall comply with ANSI C variable naming restrictions.

Constants

Number constants shall be entered in hexadecimal, decimal or binary format.

  • hexadecimal is indicated by a leading "0x"
  • binary format is indicated by a leading "#"
  • all other formats are interpreted as decimal numbers
  • the value tag in enumeratedValue accepts do not care bits represented by "x"

Comments

Comments have the standard XML format "<!--" starts a comment "-->" terminates a comment

Example

<?xml version="1.0" encoding="utf-8"?>

<device schemaVersion="1.0" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_0.xsd" >
  <name>Cortex_M3_Sample</name>
  <version>0.1</version>
  <description>ARM Cortex-M3 based Microcontroller dummy device</description>
  <!-- Bus Interface Properties -->
  <!-- Cortex-M3 is byte addressable -->
  <addressUnitBits>8</addressUnitBits>
  <!-- the maximum data bit width accessible within a single transfer is 32bits -->
  <width>32</width>

  <!-- Register Default Properties -->
  <!-- the size of the registers is set to a bit width of 32. This can be overruled for individual peripherals and/or registers -->
  <size>32</size>
  <!-- the access to all registers is set to be readable and writeable. This can be overruled for individual peripherals and/or registers -->
  <access>read-write</access>
  <!-- for demonstration purposes the resetValue for all registers of the device is set to be 0. This can be overruled within the description -->
  <resetValue>0</resetValue>
  <!-- the resetMask = 0 specifies that by default no register of this device has a defined reset value -->
  <resetMask>0</resetMask>

  <peripherals>
    <peripheral>
      <name>Timer0</name>
      <description>A simple 16 bit timer counting down ... </description>
      <groupName>Timer</groupName>
      <baseAddress>0x40000000</baseAddress>
      <!-- the first addressBlock is occupied by registers. The second block is reserved -> no access permission -->
      <addressBlock>
        <offset>0</offset>
        <size>0x8</size>
        <usage>registers</usage>
      </addressBlock>
      <addressBlock>
        <offset>0x8</offset>
        <size>0x3f8</size>
        <usage>reserved</usage>
      </addressBlock>
      <interrupt>
        <name>TIM0_IRQn</name>
        <value>34</value>
      </interrupt>
      <registers>
        <register>
          <name>TimerCtrl0</name>
          <!-- the display name is an unrestricted string. -->
          <displayName>Timer Ctrl 0</displayName>
          <description>Timer Control Register</description>
          <addressOffset>0x0</addressOffset>
          <!-- size=32, access=read-write, resetValue=0x0, resetMask=0xffffffff, volatile=false -->
          <fields>
            <field>
              <name>TimerCtrl0_En</name>
              <description>Enable Bit activates the timer.</description>
              <!-- Spirit like bit range description: [0:0] -->
              <bitOffset>0</bitOffset>
              <bitWidth>1</bitWidth>
              <!-- Writing 1 enables, writing 0 has no effect -->
          <modifiedWriteValues>oneToSet</modifiedWriteValues>
              <!-- The write constraint is defined to be that only the values provided by the enumeratedValues below are allowed -->
              <writeConstraint>
                <useEnumeratedValues>true</useEnumeratedValues>
              </writeConstraint>
              <!-- there is no side effect on reads, therefore <readAction> is not set -->
              <!-- oneBitEnable named enumeration that can be reused in other parts of the description -->
              <enumeratedValues>
                <name>oneBitEnable</name>
                <!-- the same enumerated Values are used for read and write. This default is assumed when this tag is missing -->
                <usage>read-write</usage>
                <enumeratedValue>
                  <name>enabled</name>
                  <description>Timer is enabled and active</description>
                  <value>0x0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>disabled</name>
                  <description>Timer is disabled and inactive</description>
                  <value>0x1</value>
                </enumeratedValue>
              </enumeratedValues>
            </field>
            <field>
              <name>TimerCtrl0_Dis</name>
              <description>Disable Bit deactivates the timer.</description>
              <!-- Spirit like bit range description: [1:1] -->
              <bitOffset>1</bitOffset>
              <bitWidth>1</bitWidth>
              <!-- Writing 1 sets, writing 0 has no effect -->
          <modifiedWriteValues>oneToSet</modifiedWriteValues>
              <!-- The write constraint is defined to be that only the values provided by the enumeratedValues below are allowed -->
              <writeConstraint>
                <useEnumeratedValues>true</useEnumeratedValues>
              </writeConstraint>
              <!-- there is no side effect on reads, therefore <readAction> is not set -->
              <!-- oneBitEnable named enumeration that can be reused in other parts of the description -->
              <enumeratedValues derivedFrom="oneBitEnable"></enumeratedValues>
            </field>
            <field>
              <name>TimerCtrl0_Int</name>
              <description>Select interrupt line that is triggered by timer overflow.</description>
              <!-- the position of the bit field is described in the bitRange style. -->
              <bitRange>[4:2]</bitRange>
              <enumeratedValues>
                <enumeratedValue>
                  <name>disabled</name>
                  <description>Timer does not generate interrupts</description>
                  <value>0</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>int 0</name>
                  <description>Timer does generate interrupts on interrupt line 0</description>
                  <value>1</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>int 1</name>
                  <description>Timer does generate interrupts on interrupt line 1</description>
                  <value>2</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>int 2</name>
                  <description>Timer does generate interrupts on interrupt line 2</description>
                  <value>3</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>int 3</name>
                  <description>Timer does generate interrupts on interrupt line 3</description>
                  <value>4</value>
                </enumeratedValue>
                <enumeratedValue>
                  <name>int 4</name>
                  <description>Timer does generate interrupts on interrupt line 4</description>
                  <value>5</value>
                </enumeratedValue>
                <!-- this is the default element. All the valid value not listed above (6,7) have the following name and description -->
                <enumeratedValue>
                  <name>reserved</name>
                  <description>Timer is configured incorrectly and the functionality is considered unpredictable</description>
                  <isDefault>true</isDefault>
                </enumeratedValue>
              </enumeratedValues>
            </field>
          </fields>
        </register>
        <register>
          <name>TimerCounter0</name>
          <description>Timer0 16 Bit Counter Register</description>
          <addressOffset>0x4</addressOffset>
          <size>16</size>
        </register>
        <!-- a copy of the counter register TimerCounter0 with the name="TimerCounter1" and the addressOffset="0x8" -->
        <register derivedFrom="TimerCounter0">
          <name>TimerCounter1</name>
          <addressOffset>0x6</addressOffset>
        </register>
        <!-- ... this is a restricted demo example and a real timer peripheral would have more register to be complete -->
      </registers>
    </peripheral>
    <!-- a copy of Timer0 with the name="Timer1 and the baseAddress="0x40000400" -->
    <peripheral derivedFrom="Timer0">
      <name>Timer1</name>
      <baseAddress>0x40000400</baseAddress>
      <interrupt>
        <name>TIM1_IRQn</name>
        <value>35</value>
      </interrupt>
    </peripheral>
  </peripherals>
</device>

Questions & Answers

Is there any relation between the System View Description and the CMSIS standard?

Initiallly there was no immediate link but both initiatives had a common goal: Create a sound software development eco-system for Cortex-M based Microcontroller, giving the customers the free choice of devices and software development environments and all resources required for a successful product development in a single location. Meanwhile we have started to generate CMSIS compliant device header files from the same CMSIS-SVD description. We will introduce a small number of additional description tags in the next version of the specification. The benefit is the synchronization between symbols used in the application and the symbols displayed by the debugger.

Why does the format not provide constructs like macros and conditional statements?

It is assumed that the description is generated from other sources and therefore such concepts would only complicate the language unnecessarily. It is recommended to use a standard C pre-processor to generate the debug description format from a redundancy optimized description.

Do we need to consider endianess in the description?

This should be specified on a device configuration level and is not specific to the visualization of peripheral details in a System View. Endianess becomes relevant when using bit fields in the CMSIS compliant device header file.

Is the System View Description limited to Cortex-M based devices ?

There may have been assumptions made about the structure of the device due to it being developed around a Cortex-M processor. E.g. that all peripherals are assumed to be memory mapped and to reside in a single address space. It is quite likely that the description format may also serve other architectures sufficiently. There is no intent to limit the format to Cortex-M processor based devices.


CMSIS DSP Software Library: Data Structures

  • Examples
  • Data Structures
  • Data Fields

Data Structures

Here are the data structures with brief descriptions:
arm_bilinear_interp_instance_f32 | Instance structure for the floating-point bilinear interpolation function
arm_bilinear_interp_instance_q15 | Instance structure for the Q15 bilinear interpolation function
arm_bilinear_interp_instance_q31 | Instance structure for the Q31 bilinear interpolation function
arm_bilinear_interp_instance_q7 | Instance structure for the Q15 bilinear interpolation function
arm_biquad_cas_df1_32x64_ins_q31 | Instance structure for the high precision Q31 Biquad cascade filter
arm_biquad_cascade_df2T_instance_f32 | Instance structure for the floating-point transposed direct form II Biquad cascade filter
arm_biquad_casd_df1_inst_f32 | Instance structure for the floating-point Biquad cascade filter
arm_biquad_casd_df1_inst_q15 | Instance structure for the Q15 Biquad cascade filter
arm_biquad_casd_df1_inst_q31 | Instance structure for the Q31 Biquad cascade filter
arm_cfft_radix4_instance_f32 | Instance structure for the floating-point CFFT/CIFFT function
arm_cfft_radix4_instance_q15 | Instance structure for the Q15 CFFT/CIFFT function
arm_cfft_radix4_instance_q31 | Instance structure for the Q31 CFFT/CIFFT function
arm_dct4_instance_f32 | Instance structure for the floating-point DCT4/IDCT4 function
arm_dct4_instance_q15 | Instance structure for the Q15 DCT4/IDCT4 function
arm_dct4_instance_q31 | Instance structure for the Q31 DCT4/IDCT4 function
arm_fir_decimate_instance_f32 | Instance structure for the floating-point FIR decimator
arm_fir_decimate_instance_q15 | Instance structure for the Q15 FIR decimator
arm_fir_decimate_instance_q31 | Instance structure for the Q31 FIR decimator
arm_fir_instance_f32 | Instance structure for the floating-point FIR filter
arm_fir_instance_q15 | Instance structure for the Q15 FIR filter
arm_fir_instance_q31 | Instance structure for the Q31 FIR filter
arm_fir_instance_q7 | Instance structure for the Q7 FIR filter
arm_fir_interpolate_instance_f32 | Instance structure for the floating-point FIR interpolator
arm_fir_interpolate_instance_q15 | Instance structure for the Q15 FIR interpolator
arm_fir_interpolate_instance_q31 | Instance structure for the Q31 FIR interpolator
arm_fir_lattice_instance_f32 | Instance structure for the floating-point FIR lattice filter
arm_fir_lattice_instance_q15 | Instance structure for the Q15 FIR lattice filter
arm_fir_lattice_instance_q31 | Instance structure for the Q31 FIR lattice filter
arm_fir_sparse_instance_f32 | Instance structure for the floating-point sparse FIR filter
arm_fir_sparse_instance_q15 | Instance structure for the Q15 sparse FIR filter
arm_fir_sparse_instance_q31 | Instance structure for the Q31 sparse FIR filter
arm_fir_sparse_instance_q7 | Instance structure for the Q7 sparse FIR filter
arm_iir_lattice_instance_f32 | Instance structure for the floating-point IIR lattice filter
arm_iir_lattice_instance_q15 | Instance structure for the Q15 IIR lattice filter
arm_iir_lattice_instance_q31 | Instance structure for the Q31 IIR lattice filter
arm_linear_interp_instance_f32 | Instance structure for the floating-point Linear Interpolate function
arm_lms_instance_f32 | Instance structure for the floating-point LMS filter
arm_lms_instance_q15 | Instance structure for the Q15 LMS filter
arm_lms_instance_q31 | Instance structure for the Q31 LMS filter
arm_lms_norm_instance_f32 | Instance structure for the floating-point normalized LMS filter
arm_lms_norm_instance_q15 | Instance structure for the Q15 normalized LMS filter
arm_lms_norm_instance_q31 | Instance structure for the Q31 normalized LMS filter
arm_matrix_instance_f32 | Instance structure for the floating-point matrix structure
arm_matrix_instance_q15 | Instance structure for the Q15 matrix structure
arm_matrix_instance_q31 | Instance structure for the Q31 matrix structure
arm_pid_instance_f32 | Instance structure for the floating-point PID Control
arm_pid_instance_q15 | Instance structure for the Q15 PID Control
arm_pid_instance_q31 | Instance structure for the Q31 PID Control
arm_rfft_instance_f32 | Instance structure for the floating-point RFFT/RIFFT function
arm_rfft_instance_q15 | Instance structure for the Q15 RFFT/RIFFT function
arm_rfft_instance_q31 | Instance structure for the Q31 RFFT/RIFFT function
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CMSIS DSP Software Library: arm_abs_f32.c File Reference

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Functions

arm_abs_f32.c File Reference

#include "arm_math.h"
#include <math.h>

Go to the source code of this file.

Functions

void arm_abs_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_abs_f32.c Source File

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arm_abs_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_abs_f32.c
00009 *
00010 * Description:  Vector absolute value.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034 #include <math.h>
00035
00066 void arm_abs_f32(
00067   float32_t * pSrc,
00068   float32_t * pDst,
00069   uint32_t blockSize)
00070 {
00071   uint32_t blkCnt;                               /* loop counter */
00072
00073 #ifndef ARM_MATH_CM0
00074
00075   /* Run the below code for Cortex-M4 and Cortex-M3 */
00076
00077   /*loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079
00080   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00081    ** a second loop below computes the remaining 1 to 3 samples. */
00082   while(blkCnt > 0u)
00083   {
00084     /* C = |A| */
00085     /* Calculate absolute and then store the results in the destination buffer. */
00086     *pDst++ = fabsf(*pSrc++);
00087     *pDst++ = fabsf(*pSrc++);
00088     *pDst++ = fabsf(*pSrc++);
00089     *pDst++ = fabsf(*pSrc++);
00090
00091     /* Decrement the loop counter */
00092     blkCnt--;
00093   }
00094
00095   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00096    ** No loop unrolling is used. */
00097   blkCnt = blockSize % 0x4u;
00098
00099 #else
00100
00101   /* Run the below code for Cortex-M0 */
00102
00103   /* Initialize blkCnt with number of samples */
00104   blkCnt = blockSize;
00105
00106 #endif /*   #ifndef ARM_MATH_CM0   */
00107
00108   while(blkCnt > 0u)
00109   {
00110     /* C = |A| */
00111     /* Calculate absolute and then store the results in the destination buffer. */
00112     *pDst++ = fabsf(*pSrc++);
00113
00114     /* Decrement the loop counter */
00115     blkCnt--;
00116   }
00117
00118 }
00119
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CMSIS DSP Software Library: arm_abs_q7.c File Reference

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arm_abs_q7.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_abs_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_abs_q7.c Source File

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arm_abs_q7.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_abs_q7.c
00009 *
00010 * Description:  Q7 vector absolute value.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00057 void arm_abs_q7(
00058   q7_t * pSrc,
00059   q7_t * pDst,
00060   uint32_t blockSize)
00061 {
00062   uint32_t blkCnt;                               /* loop counter */
00063
00064 #ifndef ARM_MATH_CM0
00065
00066   /* Run the below code for Cortex-M4 and Cortex-M3 */
00067   q7_t in1;                                      /* Input value1 */
00068   q7_t in2;                                      /* Input value2 */
00069   q7_t in3;                                      /* Input value3 */
00070   q7_t in4;                                      /* Input value4 */
00071
00072
00073   /*loop Unrolling */
00074   blkCnt = blockSize >> 2u;
00075
00076   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00077    ** a second loop below computes the remaining 1 to 3 samples. */
00078   while(blkCnt > 0u)
00079   {
00080     /* C = |A| */
00081     /* Read 4 inputs */
00082     in1 = *pSrc++;
00083     in2 = *pSrc++;
00084     in3 = *pSrc++;
00085     in4 = *pSrc++;
00086
00087     /* Store the Absolute result in the destination buffer by packing the 4 values in single cycle */
00088     *__SIMD32(pDst)++ =
00089       __PACKq7(((in1 > 0) ? in1 : __SSAT(-in1, 8)),
00090                ((in2 > 0) ? in2 : __SSAT(-in2, 8)),
00091                ((in3 > 0) ? in3 : __SSAT(-in3, 8)),
00092                ((in4 > 0) ? in4 : __SSAT(-in4, 8)));
00093
00094     /* Decrement the loop counter */
00095     blkCnt--;
00096   }
00097
00098   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00099    ** No loop unrolling is used. */
00100   blkCnt = blockSize % 0x4u;
00101
00102   while(blkCnt > 0u)
00103   {
00104     /* C = |A| */
00105     /* Read the input */
00106     in1 = *pSrc++;
00107
00108     /* Store the Absolute result in the destination buffer */
00109     *pDst++ = (in1 > 0) ? in1 : __SSAT(-in1, 8);
00110
00111     /* Decrement the loop counter */
00112     blkCnt--;
00113   }
00114
00115 #else
00116
00117   /* Run the below code for Cortex-M0 */
00118
00119   q7_t in;                                       /* Temporary input varible */
00120
00121   /* Initialize blkCnt with number of samples */
00122   blkCnt = blockSize;
00123
00124   while(blkCnt > 0u)
00125   {
00126     /* C = |A| */
00127     /* Read the input */
00128     in = *pSrc++;
00129
00130     /* Store the Absolute result in the destination buffer */
00131     *pDst++ = (in > 0) ? in : __SSAT(-in, 8);
00132
00133     /* Decrement the loop counter */
00134     blkCnt--;
00135   }
00136
00137 #endif /*   #ifndef ARM_MATH_CM0   */
00138
00139 }
00140
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CMSIS DSP Software Library: arm_abs_q15.c File Reference

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arm_abs_q15.c File Reference

#include "arm_math.h"

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Functions

void arm_abs_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_abs_q15.c Source File

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arm_abs_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_abs_q15.c
00009 *
00010 * Description:  Q15 vector absolute value.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00057 void arm_abs_q15(
00058   q15_t * pSrc,
00059   q15_t * pDst,
00060   uint32_t blockSize)
00061 {
00062   uint32_t blkCnt;                               /* loop counter */
00063
00064 #ifndef ARM_MATH_CM0
00065
00066 /* Run the below code for Cortex-M4 and Cortex-M3 */
00067
00068   q15_t in1;                                     /* Input value1 */
00069   q15_t in2;                                     /* Input value2 */
00070
00071
00072   /*loop Unrolling */
00073   blkCnt = blockSize >> 2u;
00074
00075   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00076    ** a second loop below computes the remaining 1 to 3 samples. */
00077   while(blkCnt > 0u)
00078   {
00079     /* C = |A| */
00080     /* Read two inputs */
00081     in1 = *pSrc++;
00082     in2 = *pSrc++;
00083
00084
00085     /* Store the Absolute result in the destination buffer by packing the two values, in a single cycle */
00086
00087 #ifndef  ARM_MATH_BIG_ENDIAN
00088
00089     *__SIMD32(pDst)++ =
00090       __PKHBT(((in1 > 0) ? in1 : __SSAT(-in1, 16)),
00091               ((in2 > 0) ? in2 : __SSAT(-in2, 16)), 16);
00092
00093 #else
00094
00095
00096     *__SIMD32(pDst)++ =
00097       __PKHBT(((in2 > 0) ? in2 : __SSAT(-in2, 16)),
00098               ((in1 > 0) ? in1 : __SSAT(-in1, 16)), 16);
00099
00100 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
00101
00102     in1 = *pSrc++;
00103     in2 = *pSrc++;
00104
00105
00106 #ifndef  ARM_MATH_BIG_ENDIAN
00107
00108     *__SIMD32(pDst)++ =
00109       __PKHBT(((in1 > 0) ? in1 : __SSAT(-in1, 16)),
00110               ((in2 > 0) ? in2 : __SSAT(-in2, 16)), 16);
00111
00112
00113 #else
00114
00115     *__SIMD32(pDst)++ =
00116       __PKHBT(((in2 > 0) ? in2 : __SSAT(-in2, 16)),
00117               ((in1 > 0) ? in1 : __SSAT(-in1, 16)), 16);
00118
00119 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
00120
00121     /* Decrement the loop counter */
00122     blkCnt--;
00123   }
00124
00125   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00126    ** No loop unrolling is used. */
00127   blkCnt = blockSize % 0x4u;
00128
00129   while(blkCnt > 0u)
00130   {
00131     /* C = |A| */
00132     /* Read the input */
00133     in1 = *pSrc++;
00134
00135     /* Calculate absolute value of input and then store the result in the destination buffer. */
00136     *pDst++ = (in1 > 0) ? in1 : __SSAT(-in1, 16);
00137
00138     /* Decrement the loop counter */
00139     blkCnt--;
00140   }
00141
00142 #else
00143
00144   /* Run the below code for Cortex-M0 */
00145
00146   q15_t in;                                      /* Temporary input variable */
00147
00148   /* Initialize blkCnt with number of samples */
00149   blkCnt = blockSize;
00150
00151   while(blkCnt > 0u)
00152   {
00153     /* C = |A| */
00154     /* Read the input */
00155     in = *pSrc++;
00156
00157     /* Calculate absolute value of input and then store the result in the destination buffer. */
00158     *pDst++ = (in > 0) ? in : __SSAT(-in, 16);
00159
00160     /* Decrement the loop counter */
00161     blkCnt--;
00162   }
00163
00164 #endif /* #ifndef ARM_MATH_CM0 */
00165
00166 }
00167
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CMSIS DSP Software Library: arm_abs_q31.c File Reference

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arm_abs_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_abs_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_abs_q31.c Source File

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arm_abs_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_abs_q31.c
00009 *
00010 * Description:  Q31 vector absolute value.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_abs_q31(
00059   q31_t * pSrc,
00060   q31_t * pDst,
00061   uint32_t blockSize)
00062 {
00063   uint32_t blkCnt;                               /* loop counter */
00064   q31_t in;                                      /* Input value */
00065
00066 #ifndef ARM_MATH_CM0
00067
00068   /* Run the below code for Cortex-M4 and Cortex-M3 */
00069
00070   /*loop Unrolling */
00071   blkCnt = blockSize >> 2u;
00072
00073   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00074    ** a second loop below computes the remaining 1 to 3 samples. */
00075   while(blkCnt > 0u)
00076   {
00077     /* C = |A| */
00078     /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
00079     in = *pSrc++;
00080     *pDst++ = (in > 0) ? in : ((in == 0x80000000) ? 0x7fffffff : -in);
00081     in = *pSrc++;
00082     *pDst++ = (in > 0) ? in : ((in == 0x80000000) ? 0x7fffffff : -in);
00083     in = *pSrc++;
00084     *pDst++ = (in > 0) ? in : ((in == 0x80000000) ? 0x7fffffff : -in);
00085     in = *pSrc++;
00086     *pDst++ = (in > 0) ? in : ((in == 0x80000000) ? 0x7fffffff : -in);
00087
00088     /* Decrement the loop counter */
00089     blkCnt--;
00090   }
00091
00092   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00093    ** No loop unrolling is used. */
00094   blkCnt = blockSize % 0x4u;
00095
00096 #else
00097
00098   /* Run the below code for Cortex-M0 */
00099
00100   /* Initialize blkCnt with number of samples */
00101   blkCnt = blockSize;
00102
00103 #endif /*   #ifndef ARM_MATH_CM0   */
00104
00105   while(blkCnt > 0u)
00106   {
00107     /* C = |A| */
00108     /* Calculate absolute value of the input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
00109     in = *pSrc++;
00110     *pDst++ = (in > 0) ? in : ((in == 0x80000000) ? 0x7fffffff : -in);
00111
00112     /* Decrement the loop counter */
00113     blkCnt--;
00114   }
00115
00116 }
00117
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CMSIS DSP Software Library: arm_add_f32.c File Reference

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arm_add_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_add_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_add_f32.c Source File

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arm_add_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_add_f32.c
00009 *
00010 * Description:  Floating-point vector addition.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00065 void arm_add_f32(
00066   float32_t * pSrcA,
00067   float32_t * pSrcB,
00068   float32_t * pDst,
00069   uint32_t blockSize)
00070 {
00071   uint32_t blkCnt;                               /* loop counter */
00072
00073 #ifndef ARM_MATH_CM0
00074
00075 /* Run the below code for Cortex-M4 and Cortex-M3 */
00076
00077   /*loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079
00080   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00081    ** a second loop below computes the remaining 1 to 3 samples. */
00082   while(blkCnt > 0u)
00083   {
00084     /* C = A + B */
00085     /* Add and then store the results in the destination buffer. */
00086     *pDst++ = (*pSrcA++) + (*pSrcB++);
00087     *pDst++ = (*pSrcA++) + (*pSrcB++);
00088     *pDst++ = (*pSrcA++) + (*pSrcB++);
00089     *pDst++ = (*pSrcA++) + (*pSrcB++);
00090
00091     /* Decrement the loop counter */
00092     blkCnt--;
00093   }
00094
00095   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00096    ** No loop unrolling is used. */
00097   blkCnt = blockSize % 0x4u;
00098
00099 #else
00100
00101   /* Run the below code for Cortex-M0 */
00102
00103   /* Initialize blkCnt with number of samples */
00104   blkCnt = blockSize;
00105
00106 #endif /* #ifndef ARM_MATH_CM0 */
00107
00108   while(blkCnt > 0u)
00109   {
00110     /* C = A + B */
00111     /* Add and then store the results in the destination buffer. */
00112     *pDst++ = (*pSrcA++) + (*pSrcB++);
00113
00114     /* Decrement the loop counter */
00115     blkCnt--;
00116   }
00117 }
00118
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CMSIS DSP Software Library: arm_add_q7.c File Reference

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arm_add_q7.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_add_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_add_q7.c Source File

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arm_add_q7.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_add_q7.c
00009 *
00010 * Description:  Q7 vector addition.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_add_q7(
00059   q7_t * pSrcA,
00060   q7_t * pSrcB,
00061   q7_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   uint32_t blkCnt;                               /* loop counter */
00065
00066 #ifndef ARM_MATH_CM0
00067
00068 /* Run the below code for Cortex-M4 and Cortex-M3 */
00069
00070
00071   /*loop Unrolling */
00072   blkCnt = blockSize >> 2u;
00073
00074   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00075    ** a second loop below computes the remaining 1 to 3 samples. */
00076   while(blkCnt > 0u)
00077   {
00078     /* C = A + B */
00079     /* Add and then store the results in the destination buffer. */
00080     *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
00081
00082     /* Decrement the loop counter */
00083     blkCnt--;
00084   }
00085
00086   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00087    ** No loop unrolling is used. */
00088   blkCnt = blockSize % 0x4u;
00089
00090   while(blkCnt > 0u)
00091   {
00092     /* C = A + B */
00093     /* Add and then store the results in the destination buffer. */
00094     *pDst++ = (q7_t) __SSAT(*pSrcA++ + *pSrcB++, 8);
00095
00096     /* Decrement the loop counter */
00097     blkCnt--;
00098   }
00099
00100 #else
00101
00102   /* Run the below code for Cortex-M0 */
00103
00104
00105
00106   /* Initialize blkCnt with number of samples */
00107   blkCnt = blockSize;
00108
00109   while(blkCnt > 0u)
00110   {
00111     /* C = A + B */
00112     /* Add and then store the results in the destination buffer. */
00113     *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ + *pSrcB++, 8);
00114
00115     /* Decrement the loop counter */
00116     blkCnt--;
00117   }
00118
00119 #endif /* #ifndef ARM_MATH_CM0 */
00120
00121
00122 }
00123
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CMSIS DSP Software Library: arm_add_q15.c File Reference

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arm_add_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_add_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_add_q15.c Source File

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arm_add_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_add_q15.c
00009 *
00010 * Description:  Q15 vector addition
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_add_q15(
00059   q15_t * pSrcA,
00060   q15_t * pSrcB,
00061   q15_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   uint32_t blkCnt;                               /* loop counter */
00065
00066 #ifndef ARM_MATH_CM0
00067
00068 /* Run the below code for Cortex-M4 and Cortex-M3 */
00069
00070
00071   /*loop Unrolling */
00072   blkCnt = blockSize >> 2u;
00073
00074   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00075    ** a second loop below computes the remaining 1 to 3 samples. */
00076   while(blkCnt > 0u)
00077   {
00078     /* C = A + B */
00079     /* Add and then store the results in the destination buffer. */
00080     *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
00081     *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
00082
00083     /* Decrement the loop counter */
00084     blkCnt--;
00085   }
00086
00087   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00088    ** No loop unrolling is used. */
00089   blkCnt = blockSize % 0x4u;
00090
00091   while(blkCnt > 0u)
00092   {
00093     /* C = A + B */
00094     /* Add and then store the results in the destination buffer. */
00095     *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++);
00096
00097     /* Decrement the loop counter */
00098     blkCnt--;
00099   }
00100
00101 #else
00102
00103   /* Run the below code for Cortex-M0 */
00104
00105
00106
00107   /* Initialize blkCnt with number of samples */
00108   blkCnt = blockSize;
00109
00110   while(blkCnt > 0u)
00111   {
00112     /* C = A + B */
00113     /* Add and then store the results in the destination buffer. */
00114     *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ + *pSrcB++), 16);
00115
00116     /* Decrement the loop counter */
00117     blkCnt--;
00118   }
00119
00120 #endif /* #ifndef ARM_MATH_CM0 */
00121
00122
00123 }
00124
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CMSIS DSP Software Library: arm_add_q31.c File Reference

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arm_add_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_add_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_add_q31.c Source File

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arm_add_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_add_q31.c
00009 *
00010 * Description:  Q31 vector addition.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00059 void arm_add_q31(
00060   q31_t * pSrcA,
00061   q31_t * pSrcB,
00062   q31_t * pDst,
00063   uint32_t blockSize)
00064 {
00065   uint32_t blkCnt;                               /* loop counter */
00066
00067 #ifndef ARM_MATH_CM0
00068
00069 /* Run the below code for Cortex-M4 and Cortex-M3 */
00070
00071
00072   /*loop Unrolling */
00073   blkCnt = blockSize >> 2u;
00074
00075   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00076    ** a second loop below computes the remaining 1 to 3 samples. */
00077   while(blkCnt > 0u)
00078   {
00079     /* C = A + B */
00080     /* Add and then store the results in the destination buffer. */
00081     *pDst++ = __QADD(*pSrcA++, *pSrcB++);
00082     *pDst++ = __QADD(*pSrcA++, *pSrcB++);
00083     *pDst++ = __QADD(*pSrcA++, *pSrcB++);
00084     *pDst++ = __QADD(*pSrcA++, *pSrcB++);
00085
00086     /* Decrement the loop counter */
00087     blkCnt--;
00088   }
00089
00090   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00091    ** No loop unrolling is used. */
00092   blkCnt = blockSize % 0x4u;
00093
00094   while(blkCnt > 0u)
00095   {
00096     /* C = A + B */
00097     /* Add and then store the results in the destination buffer. */
00098     *pDst++ = __QADD(*pSrcA++, *pSrcB++);
00099
00100     /* Decrement the loop counter */
00101     blkCnt--;
00102   }
00103
00104 #else
00105
00106   /* Run the below code for Cortex-M0 */
00107
00108
00109
00110   /* Initialize blkCnt with number of samples */
00111   blkCnt = blockSize;
00112
00113   while(blkCnt > 0u)
00114   {
00115     /* C = A + B */
00116     /* Add and then store the results in the destination buffer. */
00117     *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ + *pSrcB++);
00118
00119     /* Decrement the loop counter */
00120     blkCnt--;
00121   }
00122
00123 #endif /* #ifndef ARM_MATH_CM0 */
00124
00125 }
00126
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CMSIS DSP Software Library: arm_biquad_cascade_df1_32x64_init_q31.c File Reference

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arm_biquad_cascade_df1_32x64_init_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_biquad_cas_df1_32x64_init_q31 (arm_biquad_cas_df1_32x64_ins_q31 *S, uint8_t numStages, q31_t *pCoeffs, q63_t *pState, uint8_t postShift)
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CMSIS DSP Software Library: arm_biquad_cascade_df1_32x64_init_q31.c Source File

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arm_biquad_cascade_df1_32x64_init_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_biquad_cascade_df1_32x64_init_q31.c
00009 *
00010 * Description:  High precision Q31 Biquad cascade filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00077 void arm_biquad_cas_df1_32x64_init_q31(
00078   arm_biquad_cas_df1_32x64_ins_q31 * S,
00079   uint8_t numStages,
00080   q31_t * pCoeffs,
00081   q63_t * pState,
00082   uint8_t postShift)
00083 {
00084   /* Assign filter stages */
00085   S->numStages = numStages;
00086
00087   /* Assign postShift to be applied to the output */
00088   S->postShift = postShift;
00089
00090   /* Assign coefficient pointer */
00091   S->pCoeffs = pCoeffs;
00092
00093   /* Clear state buffer and size is always 4 * numStages */
00094   memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q63_t));
00095
00096   /* Assign state pointer */
00097   S->pState = pState;
00098 }
00099
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CMSIS DSP Software Library: arm_biquad_cascade_df1_32x64_q31.c File Reference

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arm_biquad_cascade_df1_32x64_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_biquad_cas_df1_32x64_q31 (const arm_biquad_cas_df1_32x64_ins_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_biquad_cascade_df1_32x64_q31.c Source File

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arm_biquad_cascade_df1_32x64_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_biquad_cascade_df1_32x64_q31.c
00009 *
00010 * Description:  High precision Q31 Biquad cascade filter processing function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00176 void arm_biquad_cas_df1_32x64_q31(
00177   const arm_biquad_cas_df1_32x64_ins_q31 * S,
00178   q31_t * pSrc,
00179   q31_t * pDst,
00180   uint32_t blockSize)
00181 {
00182   q31_t *pIn = pSrc;                             /*  input pointer initialization  */
00183   q31_t *pOut = pDst;                            /*  output pointer initialization */
00184   q63_t *pState = S->pState;                     /*  state pointer initialization  */
00185   q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
00186   q63_t acc;                                     /*  accumulator                   */
00187   q63_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
00188   q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
00189   q63_t Xn;                                      /*  temporary input               */
00190   int32_t shift = (int32_t) S->postShift + 1;    /*  Shift to be applied to the output */
00191   uint32_t sample, stage = S->numStages;         /*  loop counters                     */
00192
00193
00194 #ifndef ARM_MATH_CM0
00195
00196   /* Run the below code for Cortex-M4 and Cortex-M3 */
00197
00198   do
00199   {
00200     /* Reading the coefficients */
00201     b0 = *pCoeffs++;
00202     b1 = *pCoeffs++;
00203     b2 = *pCoeffs++;
00204     a1 = *pCoeffs++;
00205     a2 = *pCoeffs++;
00206
00207     /* Reading the state values */
00208     Xn1 = pState[0];
00209     Xn2 = pState[1];
00210     Yn1 = pState[2];
00211     Yn2 = pState[3];
00212
00213     /* Apply loop unrolling and compute 4 output values simultaneously. */
00214     /* The variable acc hold output value that is being computed and
00215      * stored in the destination buffer
00216      * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
00217      */
00218
00219     sample = blockSize >> 2u;
00220
00221     /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
00222      ** a second loop below computes the remaining 1 to 3 samples. */
00223     while(sample > 0u)
00224     {
00225       /* Read the input */
00226       Xn = *pIn++;
00227
00228       /* The value is shifted to the MSB to perform 32x64 multiplication */
00229       Xn = Xn << 32;
00230
00231       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00232
00233       /* acc =  b0 * x[n] */
00234       acc = mult32x64(Xn, b0);
00235       /* acc +=  b1 * x[n-1] */
00236       acc += mult32x64(Xn1, b1);
00237       /* acc +=  b[2] * x[n-2] */
00238       acc += mult32x64(Xn2, b2);
00239       /* acc +=  a1 * y[n-1] */
00240       acc += mult32x64(Yn1, a1);
00241       /* acc +=  a2 * y[n-2] */
00242       acc += mult32x64(Yn2, a2);
00243
00244       /* The result is converted to 1.63 , Yn2 variable is reused */
00245       Yn2 = acc << shift;
00246
00247       /* Store the output in the destination buffer in 1.31 format. */
00248       *pOut++ = (q31_t) (acc >> (32 - shift));
00249
00250       /* Read the second input into Xn2, to reuse the value */
00251       Xn2 = *pIn++;
00252
00253       /* The value is shifted to the MSB to perform 32x64 multiplication */
00254       Xn2 = Xn2 << 32;
00255
00256       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00257
00258       /* acc =  b0 * x[n] */
00259       acc = mult32x64(Xn2, b0);
00260       /* acc +=  b1 * x[n-1] */
00261       acc += mult32x64(Xn, b1);
00262       /* acc +=  b[2] * x[n-2] */
00263       acc += mult32x64(Xn1, b2);
00264       /* acc +=  a1 * y[n-1] */
00265       acc += mult32x64(Yn2, a1);
00266       /* acc +=  a2 * y[n-2] */
00267       acc += mult32x64(Yn1, a2);
00268
00269       /* The result is converted to 1.63, Yn1 variable is reused */
00270       Yn1 = acc << shift;
00271
00272       /* The result is converted to 1.31 */
00273       /* Store the output in the destination buffer. */
00274       *pOut++ = (q31_t) (acc >> (32 - shift));
00275
00276       /* Read the third input into Xn1, to reuse the value */
00277       Xn1 = *pIn++;
00278
00279       /* The value is shifted to the MSB to perform 32x64 multiplication */
00280       Xn1 = Xn1 << 32;
00281
00282       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00283       /* acc =  b0 * x[n] */
00284       acc = mult32x64(Xn1, b0);
00285       /* acc +=  b1 * x[n-1] */
00286       acc += mult32x64(Xn2, b1);
00287       /* acc +=  b[2] * x[n-2] */
00288       acc += mult32x64(Xn, b2);
00289       /* acc +=  a1 * y[n-1] */
00290       acc += mult32x64(Yn1, a1);
00291       /* acc +=  a2 * y[n-2] */
00292       acc += mult32x64(Yn2, a2);
00293
00294       /* The result is converted to 1.63, Yn2 variable is reused  */
00295       Yn2 = acc << shift;
00296
00297       /* Store the output in the destination buffer in 1.31 format. */
00298       *pOut++ = (q31_t) (acc >> (32 - shift));
00299
00300       /* Read the fourth input into Xn, to reuse the value */
00301       Xn = *pIn++;
00302
00303       /* The value is shifted to the MSB to perform 32x64 multiplication */
00304       Xn = Xn << 32;
00305
00306       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00307       /* acc =  b0 * x[n] */
00308       acc = mult32x64(Xn, b0);
00309       /* acc +=  b1 * x[n-1] */
00310       acc += mult32x64(Xn1, b1);
00311       /* acc +=  b[2] * x[n-2] */
00312       acc += mult32x64(Xn2, b2);
00313       /* acc +=  a1 * y[n-1] */
00314       acc += mult32x64(Yn2, a1);
00315       /* acc +=  a2 * y[n-2] */
00316       acc += mult32x64(Yn1, a2);
00317
00318       /* The result is converted to 1.63, Yn1 variable is reused  */
00319       Yn1 = acc << shift;
00320
00321       /* Every time after the output is computed state should be updated. */
00322       /* The states should be updated as:  */
00323       /* Xn2 = Xn1    */
00324       /* Xn1 = Xn     */
00325       /* Yn2 = Yn1    */
00326       /* Yn1 = acc    */
00327       Xn2 = Xn1;
00328       Xn1 = Xn;
00329
00330       /* Store the output in the destination buffer in 1.31 format. */
00331       *pOut++ = (q31_t) (acc >> (32 - shift));
00332
00333       /* decrement the loop counter */
00334       sample--;
00335     }
00336
00337     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00338      ** No loop unrolling is used. */
00339     sample = (blockSize & 0x3u);
00340
00341     while(sample > 0u)
00342     {
00343       /* Read the input */
00344       Xn = *pIn++;
00345
00346       /* The value is shifted to the MSB to perform 32x64 multiplication */
00347       Xn = Xn << 32;
00348
00349       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00350       /* acc =  b0 * x[n] */
00351       acc = mult32x64(Xn, b0);
00352       /* acc +=  b1 * x[n-1] */
00353       acc += mult32x64(Xn1, b1);
00354       /* acc +=  b[2] * x[n-2] */
00355       acc += mult32x64(Xn2, b2);
00356       /* acc +=  a1 * y[n-1] */
00357       acc += mult32x64(Yn1, a1);
00358       /* acc +=  a2 * y[n-2] */
00359       acc += mult32x64(Yn2, a2);
00360
00361       /* Every time after the output is computed state should be updated. */
00362       /* The states should be updated as:  */
00363       /* Xn2 = Xn1    */
00364       /* Xn1 = Xn     */
00365       /* Yn2 = Yn1    */
00366       /* Yn1 = acc    */
00367       Xn2 = Xn1;
00368       Xn1 = Xn;
00369       Yn2 = Yn1;
00370       Yn1 = acc << shift;
00371
00372       /* Store the output in the destination buffer in 1.31 format. */
00373       *pOut++ = (q31_t) (acc >> (32 - shift));
00374
00375       /* decrement the loop counter */
00376       sample--;
00377     }
00378
00379     /*  The first stage output is given as input to the second stage. */
00380     pIn = pDst;
00381
00382     /* Reset to destination buffer working pointer */
00383     pOut = pDst;
00384
00385     /*  Store the updated state variables back into the pState array */
00386     *pState++ = Xn1;
00387     *pState++ = Xn2;
00388     *pState++ = Yn1;
00389     *pState++ = Yn2;
00390
00391   } while(--stage);
00392
00393 #else
00394
00395   /* Run the below code for Cortex-M0 */
00396
00397   do
00398   {
00399     /* Reading the coefficients */
00400     b0 = *pCoeffs++;
00401     b1 = *pCoeffs++;
00402     b2 = *pCoeffs++;
00403     a1 = *pCoeffs++;
00404     a2 = *pCoeffs++;
00405
00406     /* Reading the state values */
00407     Xn1 = pState[0];
00408     Xn2 = pState[1];
00409     Yn1 = pState[2];
00410     Yn2 = pState[3];
00411
00412     /* The variable acc hold output value that is being computed and
00413      * stored in the destination buffer
00414      * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
00415      */
00416
00417     sample = blockSize;
00418
00419     while(sample > 0u)
00420     {
00421       /* Read the input */
00422       Xn = *pIn++;
00423
00424       /* The value is shifted to the MSB to perform 32x64 multiplication */
00425       Xn = Xn << 32;
00426
00427       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00428       /* acc =  b0 * x[n] */
00429       acc = mult32x64(Xn, b0);
00430       /* acc +=  b1 * x[n-1] */
00431       acc += mult32x64(Xn1, b1);
00432       /* acc +=  b[2] * x[n-2] */
00433       acc += mult32x64(Xn2, b2);
00434       /* acc +=  a1 * y[n-1] */
00435       acc += mult32x64(Yn1, a1);
00436       /* acc +=  a2 * y[n-2] */
00437       acc += mult32x64(Yn2, a2);
00438
00439       /* Every time after the output is computed state should be updated. */
00440       /* The states should be updated as:  */
00441       /* Xn2 = Xn1    */
00442       /* Xn1 = Xn     */
00443       /* Yn2 = Yn1    */
00444       /* Yn1 = acc    */
00445       Xn2 = Xn1;
00446       Xn1 = Xn;
00447       Yn2 = Yn1;
00448       Yn1 = acc << shift;
00449
00450       /* Store the output in the destination buffer in 1.31 format. */
00451       *pOut++ = (q31_t) (acc >> (32 - shift));
00452
00453       /* decrement the loop counter */
00454       sample--;
00455     }
00456
00457     /*  The first stage output is given as input to the second stage. */
00458     pIn = pDst;
00459
00460     /* Reset to destination buffer working pointer */
00461     pOut = pDst;
00462
00463     /*  Store the updated state variables back into the pState array */
00464     *pState++ = Xn1;
00465     *pState++ = Xn2;
00466     *pState++ = Yn1;
00467     *pState++ = Yn2;
00468
00469   } while(--stage);
00470
00471 #endif /*    #ifndef ARM_MATH_CM0     */
00472 }
00473
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CMSIS DSP Software Library: arm_biquad_cascade_df1_f32.c File Reference

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arm_biquad_cascade_df1_f32.c File Reference

#include "arm_math.h"

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Functions

void arm_biquad_cascade_df1_f32 (const arm_biquad_casd_df1_inst_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_biquad_cascade_df1_f32.c Source File

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arm_biquad_cascade_df1_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_biquad_cascade_df1_f32.c
00009 *
00010 * Description:  Processing function for the
00011 *               floating-point Biquad cascade DirectFormI(DF1) filter.
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 *
00030 * Version 0.0.5  2010/04/26
00031 *    incorporated review comments and updated with latest CMSIS layer
00032 *
00033 * Version 0.0.3  2010/03/10
00034 *    Initial version
00035 * -------------------------------------------------------------------- */
00036
00037 #include "arm_math.h"
00038
00171 void arm_biquad_cascade_df1_f32(
00172   const arm_biquad_casd_df1_inst_f32 * S,
00173   float32_t * pSrc,
00174   float32_t * pDst,
00175   uint32_t blockSize)
00176 {
00177   float32_t *pIn = pSrc;                         /*  source pointer            */
00178   float32_t *pOut = pDst;                        /*  destination pointer       */
00179   float32_t *pState = S->pState;                 /*  pState pointer            */
00180   float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
00181   float32_t acc;                                 /*  Simulates the accumulator */
00182   float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
00183   float32_t Xn1, Xn2, Yn1, Yn2;                  /*  Filter pState variables   */
00184   float32_t Xn;                                  /*  temporary input           */
00185   uint32_t sample, stage = S->numStages;         /*  loop counters             */
00186
00187
00188 #ifndef ARM_MATH_CM0
00189
00190   /* Run the below code for Cortex-M4 and Cortex-M3 */
00191
00192   do
00193   {
00194     /* Reading the coefficients */
00195     b0 = *pCoeffs++;
00196     b1 = *pCoeffs++;
00197     b2 = *pCoeffs++;
00198     a1 = *pCoeffs++;
00199     a2 = *pCoeffs++;
00200
00201     /* Reading the pState values */
00202     Xn1 = pState[0];
00203     Xn2 = pState[1];
00204     Yn1 = pState[2];
00205     Yn2 = pState[3];
00206
00207     /* Apply loop unrolling and compute 4 output values simultaneously. */
00208     /*      The variable acc hold output values that are being computed:
00209      *
00210      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]
00211      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]
00212      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]
00213      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]
00214      */
00215
00216     sample = blockSize >> 2u;
00217
00218     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00219      ** a second loop below computes the remaining 1 to 3 samples. */
00220     while(sample > 0u)
00221     {
00222       /* Read the first input */
00223       Xn = *pIn++;
00224
00225       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00226       Yn2 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
00227
00228       /* Store the result in the accumulator in the destination buffer. */
00229       *pOut++ = Yn2;
00230
00231       /* Every time after the output is computed state should be updated. */
00232       /* The states should be updated as:  */
00233       /* Xn2 = Xn1    */
00234       /* Xn1 = Xn     */
00235       /* Yn2 = Yn1    */
00236       /* Yn1 = acc   */
00237
00238       /* Read the second input */
00239       Xn2 = *pIn++;
00240
00241       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00242       Yn1 = (b0 * Xn2) + (b1 * Xn) + (b2 * Xn1) + (a1 * Yn2) + (a2 * Yn1);
00243
00244       /* Store the result in the accumulator in the destination buffer. */
00245       *pOut++ = Yn1;
00246
00247       /* Every time after the output is computed state should be updated. */
00248       /* The states should be updated as:  */
00249       /* Xn2 = Xn1    */
00250       /* Xn1 = Xn     */
00251       /* Yn2 = Yn1    */
00252       /* Yn1 = acc   */
00253
00254       /* Read the third input */
00255       Xn1 = *pIn++;
00256
00257       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00258       Yn2 = (b0 * Xn1) + (b1 * Xn2) + (b2 * Xn) + (a1 * Yn1) + (a2 * Yn2);
00259
00260       /* Store the result in the accumulator in the destination buffer. */
00261       *pOut++ = Yn2;
00262
00263       /* Every time after the output is computed state should be updated. */
00264       /* The states should be updated as: */
00265       /* Xn2 = Xn1    */
00266       /* Xn1 = Xn     */
00267       /* Yn2 = Yn1    */
00268       /* Yn1 = acc   */
00269
00270       /* Read the forth input */
00271       Xn = *pIn++;
00272
00273       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00274       Yn1 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn2) + (a2 * Yn1);
00275
00276       /* Store the result in the accumulator in the destination buffer. */
00277       *pOut++ = Yn1;
00278
00279       /* Every time after the output is computed state should be updated. */
00280       /* The states should be updated as:  */
00281       /* Xn2 = Xn1    */
00282       /* Xn1 = Xn     */
00283       /* Yn2 = Yn1    */
00284       /* Yn1 = acc   */
00285       Xn2 = Xn1;
00286       Xn1 = Xn;
00287
00288       /* decrement the loop counter */
00289       sample--;
00290
00291     }
00292
00293     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00294      ** No loop unrolling is used. */
00295     sample = blockSize & 0x3u;
00296
00297     while(sample > 0u)
00298     {
00299       /* Read the input */
00300       Xn = *pIn++;
00301
00302       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00303       acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
00304
00305       /* Store the result in the accumulator in the destination buffer. */
00306       *pOut++ = acc;
00307
00308       /* Every time after the output is computed state should be updated. */
00309       /* The states should be updated as:    */
00310       /* Xn2 = Xn1    */
00311       /* Xn1 = Xn     */
00312       /* Yn2 = Yn1    */
00313       /* Yn1 = acc   */
00314       Xn2 = Xn1;
00315       Xn1 = Xn;
00316       Yn2 = Yn1;
00317       Yn1 = acc;
00318
00319       /* decrement the loop counter */
00320       sample--;
00321
00322     }
00323
00324     /*  Store the updated state variables back into the pState array */
00325     *pState++ = Xn1;
00326     *pState++ = Xn2;
00327     *pState++ = Yn1;
00328     *pState++ = Yn2;
00329
00330     /*  The first stage goes from the input buffer to the output buffer. */
00331     /*  Subsequent numStages  occur in-place in the output buffer */
00332     pIn = pDst;
00333
00334     /* Reset the output pointer */
00335     pOut = pDst;
00336
00337     /* decrement the loop counter */
00338     stage--;
00339
00340   } while(stage > 0u);
00341
00342 #else
00343
00344   /* Run the below code for Cortex-M0 */
00345
00346   do
00347   {
00348     /* Reading the coefficients */
00349     b0 = *pCoeffs++;
00350     b1 = *pCoeffs++;
00351     b2 = *pCoeffs++;
00352     a1 = *pCoeffs++;
00353     a2 = *pCoeffs++;
00354
00355     /* Reading the pState values */
00356     Xn1 = pState[0];
00357     Xn2 = pState[1];
00358     Yn1 = pState[2];
00359     Yn2 = pState[3];
00360
00361     /*      The variables acc holds the output value that is computed:
00362      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]
00363      */
00364
00365     sample = blockSize;
00366
00367     while(sample > 0u)
00368     {
00369       /* Read the input */
00370       Xn = *pIn++;
00371
00372       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00373       acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
00374
00375       /* Store the result in the accumulator in the destination buffer. */
00376       *pOut++ = acc;
00377
00378       /* Every time after the output is computed state should be updated. */
00379       /* The states should be updated as:    */
00380       /* Xn2 = Xn1    */
00381       /* Xn1 = Xn     */
00382       /* Yn2 = Yn1    */
00383       /* Yn1 = acc   */
00384       Xn2 = Xn1;
00385       Xn1 = Xn;
00386       Yn2 = Yn1;
00387       Yn1 = acc;
00388
00389       /* decrement the loop counter */
00390       sample--;
00391     }
00392
00393     /*  Store the updated state variables back into the pState array */
00394     *pState++ = Xn1;
00395     *pState++ = Xn2;
00396     *pState++ = Yn1;
00397     *pState++ = Yn2;
00398
00399     /*  The first stage goes from the input buffer to the output buffer. */
00400     /*  Subsequent numStages  occur in-place in the output buffer */
00401     pIn = pDst;
00402
00403     /* Reset the output pointer */
00404     pOut = pDst;
00405
00406     /* decrement the loop counter */
00407     stage--;
00408
00409   } while(stage > 0u);
00410
00411 #endif /*   #ifndef ARM_MATH_CM0         */
00412
00413 }
00414
00415
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CMSIS DSP Software Library: arm_biquad_cascade_df1_fast_q15.c File Reference

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arm_biquad_cascade_df1_fast_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_biquad_cascade_df1_fast_q15 (const arm_biquad_casd_df1_inst_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_biquad_cascade_df1_fast_q15.c Source File

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arm_biquad_cascade_df1_fast_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_biquad_cascade_df1_fast_q15.c
00009 *
00010 * Description:  Fast processing function for the
00011 *               Q15 Biquad cascade filter.
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 *
00030 * Version 0.0.9  2010/08/16
00031 *    Initial version
00032 *
00033 *
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00069 void arm_biquad_cascade_df1_fast_q15(
00070   const arm_biquad_casd_df1_inst_q15 * S,
00071   q15_t * pSrc,
00072   q15_t * pDst,
00073   uint32_t blockSize)
00074 {
00075   q15_t *pIn = pSrc;                             /*  Source pointer                               */
00076   q15_t *pOut = pDst;                            /*  Destination pointer                          */
00077   q31_t in;                                      /*  Temporary variable to hold input value       */
00078   q31_t out;                                     /*  Temporary variable to hold output value      */
00079   q31_t b0;                                      /*  Temporary variable to hold bo value          */
00080   q31_t b1, a1;                                  /*  Filter coefficients                          */
00081   q31_t state_in, state_out;                     /*  Filter state variables                       */
00082   q31_t acc0;                                    /*  Accumulator                                  */
00083   int32_t shift = (int32_t) (15 - S->postShift); /*  Post shift                                   */
00084   q15_t *pState = S->pState;                     /*  State pointer                                */
00085   q15_t *pCoeffs = S->pCoeffs;                   /*  Coefficient pointer                          */
00086   q31_t *pState_q31;                             /*  32-bit state pointer for SIMD implementation */
00087   uint32_t sample, stage = S->numStages;         /*  Stage loop counter                           */
00088
00089
00090
00091   do
00092   {
00093     /* Initialize state pointer of type q31 */
00094     pState_q31 = (q31_t *) (pState);
00095
00096     /* Read the b0 and 0 coefficients using SIMD  */
00097     b0 = *__SIMD32(pCoeffs)++;
00098
00099     /* Read the b1 and b2 coefficients using SIMD */
00100     b1 = *__SIMD32(pCoeffs)++;
00101
00102     /* Read the a1 and a2 coefficients using SIMD */
00103     a1 = *__SIMD32(pCoeffs)++;
00104
00105     /* Read the input state values from the state buffer:  x[n-1], x[n-2] */
00106     state_in = (q31_t) (*pState_q31++);
00107
00108     /* Read the output state values from the state buffer:  y[n-1], y[n-2] */
00109     state_out = (q31_t) (*pState_q31);
00110
00111     /* Apply loop unrolling and compute 2 output values simultaneously. */
00112     /*      The variables acc0 ... acc3 hold output values that are being computed:
00113      *
00114      *    acc0 =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
00115      *    acc0 =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
00116      */
00117     sample = blockSize >> 1u;
00118
00119     /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.
00120      ** a second loop below computes the remaining 1 sample. */
00121     while(sample > 0u)
00122     {
00123
00124       /* Read the input */
00125       in = *__SIMD32(pIn)++;
00126
00127       /* out =  b0 * x[n] + 0 * 0 */
00128       out = __SMUAD(b0, in);
00129       /* acc0 =  b1 * x[n-1] + acc0 +=  b2 * x[n-2] + out */
00130       acc0 = __SMLAD(b1, state_in, out);
00131       /* acc0 +=  a1 * y[n-1] + acc0 +=  a2 * y[n-2] */
00132       acc0 = __SMLAD(a1, state_out, acc0);
00133
00134       /* The result is converted from 3.29 to 1.31 and then saturation is applied */
00135       out = __SSAT((acc0 >> shift), 16);
00136
00137       /* Every time after the output is computed state should be updated. */
00138       /* The states should be updated as:  */
00139       /* Xn2 = Xn1    */
00140       /* Xn1 = Xn     */
00141       /* Yn2 = Yn1    */
00142       /* Yn1 = acc0   */
00143       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
00144       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
00145
00146 #ifndef  ARM_MATH_BIG_ENDIAN
00147
00148       state_in = __PKHBT(in, state_in, 16);
00149       state_out = __PKHBT(out, state_out, 16);
00150
00151 #else
00152
00153       state_in = __PKHBT(state_in >> 16, (in >> 16), 16);
00154       state_out = __PKHBT(state_out >> 16, (out), 16);
00155
00156 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00157
00158       /* out =  b0 * x[n] + 0 * 0 */
00159       out = __SMUADX(b0, in);
00160       /* acc0 =  b1 * x[n-1] + acc0 +=  b2 * x[n-2] + out */
00161       acc0 = __SMLAD(b1, state_in, out);
00162       /* acc0 +=  a1 * y[n-1] + acc0 +=  a2 * y[n-2] */
00163       acc0 = __SMLAD(a1, state_out, acc0);
00164
00165       /* The result is converted from 3.29 to 1.31 and then saturation is applied */
00166       out = __SSAT((acc0 >> shift), 16);
00167
00168
00169       /* Store the output in the destination buffer. */
00170
00171 #ifndef  ARM_MATH_BIG_ENDIAN
00172
00173       *__SIMD32(pOut)++ = __PKHBT(state_out, out, 16);
00174
00175 #else
00176
00177       *__SIMD32(pOut)++ = __PKHBT(out, state_out >> 16, 16);
00178
00179 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00180
00181       /* Every time after the output is computed state should be updated. */
00182       /* The states should be updated as:  */
00183       /* Xn2 = Xn1    */
00184       /* Xn1 = Xn     */
00185       /* Yn2 = Yn1    */
00186       /* Yn1 = acc0   */
00187       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
00188       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
00189
00190 #ifndef  ARM_MATH_BIG_ENDIAN
00191
00192       state_in = __PKHBT(in >> 16, state_in, 16);
00193       state_out = __PKHBT(out, state_out, 16);
00194
00195 #else
00196
00197       state_in = __PKHBT(state_in >> 16, in, 16);
00198       state_out = __PKHBT(state_out >> 16, out, 16);
00199
00200 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00201
00202
00203       /* Decrement the loop counter */
00204       sample--;
00205
00206     }
00207
00208     /* If the blockSize is not a multiple of 2, compute any remaining output samples here.
00209      ** No loop unrolling is used. */
00210
00211     if((blockSize & 0x1u) != 0u)
00212     {
00213       /* Read the input */
00214       in = *pIn++;
00215
00216       /* out =  b0 * x[n] + 0 * 0 */
00217
00218 #ifndef  ARM_MATH_BIG_ENDIAN
00219
00220       out = __SMUAD(b0, in);
00221
00222 #else
00223
00224       out = __SMUADX(b0, in);
00225
00226 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00227
00228       /* acc0 =  b1 * x[n-1] + acc0 +=  b2 * x[n-2] + out */
00229       acc0 = __SMLAD(b1, state_in, out);
00230       /* acc0 +=  a1 * y[n-1] + acc0 +=  a2 * y[n-2] */
00231       acc0 = __SMLAD(a1, state_out, acc0);
00232
00233       /* The result is converted from 3.29 to 1.31 and then saturation is applied */
00234       out = __SSAT((acc0 >> shift), 16);
00235
00236       /* Store the output in the destination buffer. */
00237       *pOut++ = (q15_t) out;
00238
00239       /* Every time after the output is computed state should be updated. */
00240       /* The states should be updated as:  */
00241       /* Xn2 = Xn1    */
00242       /* Xn1 = Xn     */
00243       /* Yn2 = Yn1    */
00244       /* Yn1 = acc0   */
00245       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
00246       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
00247
00248 #ifndef  ARM_MATH_BIG_ENDIAN
00249
00250       state_in = __PKHBT(in, state_in, 16);
00251       state_out = __PKHBT(out, state_out, 16);
00252
00253 #else
00254
00255       state_in = __PKHBT(state_in >> 16, in, 16);
00256       state_out = __PKHBT(state_out >> 16, out, 16);
00257
00258 #endif /*   #ifndef  ARM_MATH_BIG_ENDIAN    */
00259
00260     }
00261
00262     /*  The first stage goes from the input buffer to the output buffer.  */
00263     /*  Subsequent (numStages - 1) occur in-place in the output buffer  */
00264     pIn = pDst;
00265
00266     /* Reset the output pointer */
00267     pOut = pDst;
00268
00269     /*  Store the updated state variables back into the state array */
00270     *__SIMD32(pState)++ = state_in;
00271     *__SIMD32(pState)++ = state_out;
00272
00273
00274     /* Decrement the loop counter */
00275     stage--;
00276
00277   } while(stage > 0u);
00278 }
00279
00280
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CMSIS DSP Software Library: arm_biquad_cascade_df1_fast_q31.c File Reference

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arm_biquad_cascade_df1_fast_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_biquad_cascade_df1_fast_q31 (const arm_biquad_casd_df1_inst_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_biquad_cascade_df1_fast_q31.c Source File

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arm_biquad_cascade_df1_fast_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_biquad_cascade_df1_fast_q31.c
00009 *
00010 * Description:  Processing function for the
00011 *               Q31 Fast Biquad cascade DirectFormI(DF1) filter.
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 *
00030 * Version 0.0.9  2010/08/27
00031 *    Initial version
00032 *
00033 * -------------------------------------------------------------------- */
00034
00035 #include "arm_math.h"
00036
00070 void arm_biquad_cascade_df1_fast_q31(
00071   const arm_biquad_casd_df1_inst_q31 * S,
00072   q31_t * pSrc,
00073   q31_t * pDst,
00074   uint32_t blockSize)
00075 {
00076   q31_t *pIn = pSrc;                             /*  input pointer initialization  */
00077   q31_t *pOut = pDst;                            /*  output pointer initialization */
00078   q31_t *pState = S->pState;                     /*  pState pointer initialization */
00079   q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
00080   q31_t acc;                                     /*  accumulator                   */
00081   q31_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
00082   q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
00083   q31_t Xn;                                      /*  temporary input               */
00084   int32_t shift = (int32_t) S->postShift + 1;    /*  Shift to be applied to the output */
00085   uint32_t sample, stage = S->numStages;         /*  loop counters                     */
00086
00087
00088   do
00089   {
00090     /* Reading the coefficients */
00091     b0 = *pCoeffs++;
00092     b1 = *pCoeffs++;
00093     b2 = *pCoeffs++;
00094     a1 = *pCoeffs++;
00095     a2 = *pCoeffs++;
00096
00097     /* Reading the state values */
00098     Xn1 = pState[0];
00099     Xn2 = pState[1];
00100     Yn1 = pState[2];
00101     Yn2 = pState[3];
00102
00103     /* Apply loop unrolling and compute 4 output values simultaneously. */
00104     /*      The variables acc ... acc3 hold output values that are being computed:
00105      *
00106      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
00107      */
00108
00109     sample = blockSize >> 2u;
00110
00111     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00112      ** a second loop below computes the remaining 1 to 3 samples. */
00113     while(sample > 0u)
00114     {
00115       /* Read the input */
00116       Xn = *pIn++;
00117
00118       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00119       /* acc =  b0 * x[n] */
00120       acc = (q31_t) (((q63_t) b0 * Xn) >> 32);
00121       /* acc +=  b1 * x[n-1] */
00122       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);
00123       /* acc +=  b[2] * x[n-2] */
00124       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);
00125       /* acc +=  a1 * y[n-1] */
00126       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);
00127       /* acc +=  a2 * y[n-2] */
00128       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);
00129
00130       /* The result is converted to 1.31 , Yn2 variable is reused */
00131       Yn2 = acc << shift;
00132
00133       /* Store the output in the destination buffer. */
00134       *pOut++ = Yn2;
00135
00136       /* Read the second input */
00137       Xn2 = *pIn++;
00138
00139       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00140       /* acc =  b0 * x[n] */
00141       acc = (q31_t) (((q63_t) b0 * (Xn2)) >> 32);
00142       /* acc +=  b1 * x[n-1] */
00143       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn))) >> 32);
00144       /* acc +=  b[2] * x[n-2] */
00145       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn1))) >> 32);
00146       /* acc +=  a1 * y[n-1] */
00147       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);
00148       /* acc +=  a2 * y[n-2] */
00149       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);
00150
00151       /* The result is converted to 1.31, Yn1 variable is reused  */
00152       Yn1 = acc << shift;
00153
00154       /* Store the output in the destination buffer. */
00155       *pOut++ = Yn1;
00156
00157       /* Read the third input  */
00158       Xn1 = *pIn++;
00159
00160       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00161       /* acc =  b0 * x[n] */
00162       acc = (q31_t) (((q63_t) b0 * (Xn1)) >> 32);
00163       /* acc +=  b1 * x[n-1] */
00164       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn2))) >> 32);
00165       /* acc +=  b[2] * x[n-2] */
00166       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn))) >> 32);
00167       /* acc +=  a1 * y[n-1] */
00168       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);
00169       /* acc +=  a2 * y[n-2] */
00170       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);
00171
00172       /* The result is converted to 1.31, Yn2 variable is reused  */
00173       Yn2 = acc << shift;
00174
00175       /* Store the output in the destination buffer. */
00176       *pOut++ = Yn2;
00177
00178       /* Read the forth input */
00179       Xn = *pIn++;
00180
00181       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00182       /* acc =  b0 * x[n] */
00183       acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);
00184       /* acc +=  b1 * x[n-1] */
00185       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);
00186       /* acc +=  b[2] * x[n-2] */
00187       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);
00188       /* acc +=  a1 * y[n-1] */
00189       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);
00190       /* acc +=  a2 * y[n-2] */
00191       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);
00192
00193       /* The result is converted to 1.31, Yn1 variable is reused  */
00194       Yn1 = acc << shift;
00195
00196       /* Every time after the output is computed state should be updated. */
00197       /* The states should be updated as:  */
00198       /* Xn2 = Xn1    */
00199       /* Xn1 = Xn     */
00200       /* Yn2 = Yn1    */
00201       /* Yn1 = acc    */
00202       Xn2 = Xn1;
00203       Xn1 = Xn;
00204
00205       /* Store the output in the destination buffer. */
00206       *pOut++ = Yn1;
00207
00208       /* decrement the loop counter */
00209       sample--;
00210     }
00211
00212     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00213      ** No loop unrolling is used. */
00214     sample = (blockSize & 0x3u);
00215
00216     while(sample > 0u)
00217     {
00218       /* Read the input */
00219       Xn = *pIn++;
00220
00221       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00222       /* acc =  b0 * x[n] */
00223       acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);
00224       /* acc +=  b1 * x[n-1] */
00225       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);
00226       /* acc +=  b[2] * x[n-2] */
00227       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);
00228       /* acc +=  a1 * y[n-1] */
00229       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);
00230       /* acc +=  a2 * y[n-2] */
00231       acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);
00232       /* The result is converted to 1.31  */
00233       acc = acc << shift;
00234
00235       /* Every time after the output is computed state should be updated. */
00236       /* The states should be updated as:  */
00237       /* Xn2 = Xn1    */
00238       /* Xn1 = Xn     */
00239       /* Yn2 = Yn1    */
00240       /* Yn1 = acc    */
00241       Xn2 = Xn1;
00242       Xn1 = Xn;
00243       Yn2 = Yn1;
00244       Yn1 = acc;
00245
00246       /* Store the output in the destination buffer. */
00247       *pOut++ = acc;
00248
00249       /* decrement the loop counter */
00250       sample--;
00251     }
00252
00253     /*  The first stage goes from the input buffer to the output buffer. */
00254     /*  Subsequent stages occur in-place in the output buffer */
00255     pIn = pDst;
00256
00257     /* Reset to destination pointer */
00258     pOut = pDst;
00259
00260     /*  Store the updated state variables back into the pState array */
00261     *pState++ = Xn1;
00262     *pState++ = Xn2;
00263     *pState++ = Yn1;
00264     *pState++ = Yn2;
00265
00266   } while(--stage);
00267 }
00268
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CMSIS DSP Software Library: arm_biquad_cascade_df1_init_f32.c File Reference

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arm_biquad_cascade_df1_init_f32.c File Reference

#include "arm_math.h"

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Functions

void arm_biquad_cascade_df1_init_f32 (arm_biquad_casd_df1_inst_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
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CMSIS DSP Software Library: arm_biquad_cascade_df1_init_f32.c Source File

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arm_biquad_cascade_df1_init_f32.c

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00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_biquad_cascade_df1_init_f32.c
00009 *
00010 * Description:  floating-point Biquad cascade DirectFormI(DF1) filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * ---------------------------------------------------------------------------*/
00035
00036 #include "arm_math.h"
00037
00083 void arm_biquad_cascade_df1_init_f32(
00084   arm_biquad_casd_df1_inst_f32 * S,
00085   uint8_t numStages,
00086   float32_t * pCoeffs,
00087   float32_t * pState)
00088 {
00089   /* Assign filter stages */
00090   S->numStages = numStages;
00091
00092   /* Assign coefficient pointer */
00093   S->pCoeffs = pCoeffs;
00094
00095   /* Clear state buffer and size is always 4 * numStages */
00096   memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(float32_t));
00097
00098   /* Assign state pointer */
00099   S->pState = pState;
00100 }
00101
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CMSIS DSP Software Library: arm_biquad_cascade_df1_init_q15.c File Reference

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arm_biquad_cascade_df1_init_q15.c File Reference

#include "arm_math.h"

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Functions

void arm_biquad_cascade_df1_init_q15 (arm_biquad_casd_df1_inst_q15 *S, uint8_t numStages, q15_t *pCoeffs, q15_t *pState, int8_t postShift)
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CMSIS DSP Software Library: arm_biquad_cascade_df1_init_q15.c Source File

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arm_biquad_cascade_df1_init_q15.c

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00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_biquad_cascade_df1_init_q15.c
00009 *
00010 * Description:  Q15 Biquad cascade DirectFormI(DF1) filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * ---------------------------------------------------------------------------*/
00035
00036 #include "arm_math.h"
00037
00081 void arm_biquad_cascade_df1_init_q15(
00082   arm_biquad_casd_df1_inst_q15 * S,
00083   uint8_t numStages,
00084   q15_t * pCoeffs,
00085   q15_t * pState,
00086   int8_t postShift)
00087 {
00088   /* Assign filter stages */
00089   S->numStages = numStages;
00090
00091   /* Assign postShift to be applied to the output */
00092   S->postShift = postShift;
00093
00094   /* Assign coefficient pointer */
00095   S->pCoeffs = pCoeffs;
00096
00097   /* Clear state buffer and size is always 4 * numStages */
00098   memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q15_t));
00099
00100   /* Assign state pointer */
00101   S->pState = pState;
00102 }
00103
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CMSIS DSP Software Library: arm_biquad_cascade_df1_init_q31.c File Reference

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arm_biquad_cascade_df1_init_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_biquad_cascade_df1_init_q31 (arm_biquad_casd_df1_inst_q31 *S, uint8_t numStages, q31_t *pCoeffs, q31_t *pState, int8_t postShift)
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CMSIS DSP Software Library: arm_biquad_cascade_df1_init_q31.c Source File

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arm_biquad_cascade_df1_init_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_biquad_cascade_df1_init_q31.c
00009 *
00010 * Description:  Q31 Biquad cascade DirectFormI(DF1) filter initialization function.
00011 *
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 *
00030 * Version 0.0.5  2010/04/26
00031 *    incorporated review comments and updated with latest CMSIS layer
00032 *
00033 * Version 0.0.3  2010/03/10
00034 *    Initial version
00035 * -------------------------------------------------------------------- */
00036
00037 #include "arm_math.h"
00038
00081 void arm_biquad_cascade_df1_init_q31(
00082   arm_biquad_casd_df1_inst_q31 * S,
00083   uint8_t numStages,
00084   q31_t * pCoeffs,
00085   q31_t * pState,
00086   int8_t postShift)
00087 {
00088   /* Assign filter stages */
00089   S->numStages = numStages;
00090
00091   /* Assign postShift to be applied to the output */
00092   S->postShift = postShift;
00093
00094   /* Assign coefficient pointer */
00095   S->pCoeffs = pCoeffs;
00096
00097   /* Clear state buffer and size is always 4 * numStages */
00098   memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q31_t));
00099
00100   /* Assign state pointer */
00101   S->pState = pState;
00102 }
00103
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CMSIS DSP Software Library: arm_biquad_cascade_df1_q15.c File Reference

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arm_biquad_cascade_df1_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_biquad_cascade_df1_q15 (const arm_biquad_casd_df1_inst_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_biquad_cascade_df1_q15.c Source File

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arm_biquad_cascade_df1_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_biquad_cascade_df1_q15.c
00009 *
00010 * Description:  Processing function for the
00011 *               Q15 Biquad cascade DirectFormI(DF1) filter.
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 *
00030 * Version 0.0.5  2010/04/26
00031 *    incorporated review comments and updated with latest CMSIS layer
00032 *
00033 * Version 0.0.3  2010/03/10
00034 *    Initial version
00035 * -------------------------------------------------------------------- */
00036
00037 #include "arm_math.h"
00038
00070 void arm_biquad_cascade_df1_q15(
00071   const arm_biquad_casd_df1_inst_q15 * S,
00072   q15_t * pSrc,
00073   q15_t * pDst,
00074   uint32_t blockSize)
00075 {
00076
00077
00078 #ifndef ARM_MATH_CM0
00079
00080   /* Run the below code for Cortex-M4 and Cortex-M3 */
00081
00082   q15_t *pIn = pSrc;                             /*  Source pointer                               */
00083   q15_t *pOut = pDst;                            /*  Destination pointer                          */
00084   q31_t in;                                      /*  Temporary variable to hold input value       */
00085   q31_t out;                                     /*  Temporary variable to hold output value      */
00086   q31_t b0;                                      /*  Temporary variable to hold bo value          */
00087   q31_t b1, a1;                                  /*  Filter coefficients                          */
00088   q31_t state_in, state_out;                     /*  Filter state variables                       */
00089   q63_t acc;                                     /*  Accumulator                                  */
00090   int32_t shift = (15 - (int32_t) S->postShift); /*  Post shift                                   */
00091   q15_t *pState = S->pState;                     /*  State pointer                                */
00092   q15_t *pCoeffs = S->pCoeffs;                   /*  Coefficient pointer                          */
00093   q31_t *pState_q31;                             /*  32-bit state pointer for SIMD implementation */
00094   uint32_t sample, stage = (uint32_t) S->numStages;     /*  Stage loop counter                           */
00095
00096   do
00097   {
00098     /* Initialize state pointer of type q31 */
00099     pState_q31 = (q31_t *) (pState);
00100
00101     /* Read the b0 and 0 coefficients using SIMD  */
00102     b0 = *__SIMD32(pCoeffs)++;
00103
00104     /* Read the b1 and b2 coefficients using SIMD */
00105     b1 = *__SIMD32(pCoeffs)++;
00106
00107     /* Read the a1 and a2 coefficients using SIMD */
00108     a1 = *__SIMD32(pCoeffs)++;
00109
00110     /* Read the input state values from the state buffer:  x[n-1], x[n-2] */
00111     state_in = (q31_t) (*pState_q31++);
00112
00113     /* Read the output state values from the state buffer:  y[n-1], y[n-2] */
00114     state_out = (q31_t) (*pState_q31);
00115
00116     /* Apply loop unrolling and compute 2 output values simultaneously. */
00117     /*      The variable acc hold output values that are being computed:
00118      *
00119      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
00120      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
00121      */
00122     sample = blockSize >> 1u;
00123
00124     /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.
00125      ** a second loop below computes the remaining 1 sample. */
00126     while(sample > 0u)
00127     {
00128
00129       /* Read the input */
00130       in = *__SIMD32(pIn)++;
00131
00132       /* out =  b0 * x[n] + 0 * 0 */
00133       out = __SMUAD(b0, in);
00134
00135       /* acc +=  b1 * x[n-1] +  b2 * x[n-2] + out */
00136       acc = __SMLALD(b1, state_in, out);
00137       /* acc +=  a1 * y[n-1] +  a2 * y[n-2] */
00138       acc = __SMLALD(a1, state_out, acc);
00139
00140       /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
00141       out = __SSAT((acc >> shift), 16);
00142
00143       /* Every time after the output is computed state should be updated. */
00144       /* The states should be updated as:  */
00145       /* Xn2 = Xn1    */
00146       /* Xn1 = Xn     */
00147       /* Yn2 = Yn1    */
00148       /* Yn1 = acc   */
00149       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
00150       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
00151
00152 #ifndef  ARM_MATH_BIG_ENDIAN
00153
00154       state_in = __PKHBT(in, state_in, 16);
00155       state_out = __PKHBT(out, state_out, 16);
00156
00157 #else
00158
00159       state_in = __PKHBT(state_in >> 16, (in >> 16), 16);
00160       state_out = __PKHBT(state_out >> 16, (out), 16);
00161
00162 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00163
00164       /* out =  b0 * x[n] + 0 * 0 */
00165       out = __SMUADX(b0, in);
00166       /* acc +=  b1 * x[n-1] +  b2 * x[n-2] + out */
00167       acc = __SMLALD(b1, state_in, out);
00168       /* acc +=  a1 * y[n-1] + a2 * y[n-2] */
00169       acc = __SMLALD(a1, state_out, acc);
00170
00171       /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
00172       out = __SSAT((acc >> shift), 16);
00173
00174       /* Store the output in the destination buffer. */
00175
00176 #ifndef  ARM_MATH_BIG_ENDIAN
00177
00178       *__SIMD32(pOut)++ = __PKHBT(state_out, out, 16);
00179
00180 #else
00181
00182       *__SIMD32(pOut)++ = __PKHBT(out, state_out >> 16, 16);
00183
00184 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00185
00186       /* Every time after the output is computed state should be updated. */
00187       /* The states should be updated as:  */
00188       /* Xn2 = Xn1    */
00189       /* Xn1 = Xn     */
00190       /* Yn2 = Yn1    */
00191       /* Yn1 = acc   */
00192       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
00193       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
00194 #ifndef  ARM_MATH_BIG_ENDIAN
00195
00196       state_in = __PKHBT(in >> 16, state_in, 16);
00197       state_out = __PKHBT(out, state_out, 16);
00198
00199 #else
00200
00201       state_in = __PKHBT(state_in >> 16, in, 16);
00202       state_out = __PKHBT(state_out >> 16, out, 16);
00203
00204 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00205
00206
00207       /* Decrement the loop counter */
00208       sample--;
00209
00210     }
00211
00212     /* If the blockSize is not a multiple of 2, compute any remaining output samples here.
00213      ** No loop unrolling is used. */
00214
00215     if((blockSize & 0x1u) != 0u)
00216     {
00217       /* Read the input */
00218       in = *pIn++;
00219
00220       /* out =  b0 * x[n] + 0 * 0 */
00221
00222 #ifndef  ARM_MATH_BIG_ENDIAN
00223
00224       out = __SMUAD(b0, in);
00225
00226 #else
00227
00228       out = __SMUADX(b0, in);
00229
00230 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00231
00232       /* acc =  b1 * x[n-1] + b2 * x[n-2] + out */
00233       acc = __SMLALD(b1, state_in, out);
00234       /* acc +=  a1 * y[n-1] + a2 * y[n-2] */
00235       acc = __SMLALD(a1, state_out, acc);
00236
00237       /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
00238       out = __SSAT((acc >> shift), 16);
00239
00240       /* Store the output in the destination buffer. */
00241       *pOut++ = (q15_t) out;
00242
00243       /* Every time after the output is computed state should be updated. */
00244       /* The states should be updated as:  */
00245       /* Xn2 = Xn1    */
00246       /* Xn1 = Xn     */
00247       /* Yn2 = Yn1    */
00248       /* Yn1 = acc   */
00249       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
00250       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
00251
00252 #ifndef  ARM_MATH_BIG_ENDIAN
00253
00254       state_in = __PKHBT(in, state_in, 16);
00255       state_out = __PKHBT(out, state_out, 16);
00256
00257 #else
00258
00259       state_in = __PKHBT(state_in >> 16, in, 16);
00260       state_out = __PKHBT(state_out >> 16, out, 16);
00261
00262 #endif /*   #ifndef  ARM_MATH_BIG_ENDIAN    */
00263
00264     }
00265
00266     /*  The first stage goes from the input wire to the output wire.  */
00267     /*  Subsequent numStages occur in-place in the output wire  */
00268     pIn = pDst;
00269
00270     /* Reset the output pointer */
00271     pOut = pDst;
00272
00273     /*  Store the updated state variables back into the state array */
00274     *__SIMD32(pState)++ = state_in;
00275     *__SIMD32(pState)++ = state_out;
00276
00277
00278     /* Decrement the loop counter */
00279     stage--;
00280
00281   } while(stage > 0u);
00282
00283 #else
00284
00285   /* Run the below code for Cortex-M0 */
00286
00287   q15_t *pIn = pSrc;                             /*  Source pointer                               */
00288   q15_t *pOut = pDst;                            /*  Destination pointer                          */
00289   q15_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
00290   q15_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
00291   q15_t Xn;                                      /*  temporary input               */
00292   q63_t acc;                                     /*  Accumulator                                  */
00293   int32_t shift = (15 - (int32_t) S->postShift); /*  Post shift                                   */
00294   q15_t *pState = S->pState;                     /*  State pointer                                */
00295   q15_t *pCoeffs = S->pCoeffs;                   /*  Coefficient pointer                          */
00296   uint32_t sample, stage = (uint32_t) S->numStages;     /*  Stage loop counter                           */
00297
00298   do
00299   {
00300     /* Reading the coefficients */
00301     b0 = *pCoeffs++;
00302     b1 = *pCoeffs++;
00303     b2 = *pCoeffs++;
00304     a1 = *pCoeffs++;
00305     a2 = *pCoeffs++;
00306
00307     /* Reading the state values */
00308     Xn1 = pState[0];
00309     Xn2 = pState[1];
00310     Yn1 = pState[2];
00311     Yn2 = pState[3];
00312
00313     /*      The variables acc holds the output value that is computed:
00314      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
00315      */
00316
00317     sample = blockSize;
00318
00319     while(sample > 0u)
00320     {
00321       /* Read the input */
00322       Xn = *pIn++;
00323
00324       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00325       /* acc =  b0 * x[n] */
00326       acc = (q31_t) b0 *Xn;
00327
00328       /* acc +=  b1 * x[n-1] */
00329       acc += (q31_t) b1 *Xn1;
00330       /* acc +=  b[2] * x[n-2] */
00331       acc += (q31_t) b2 *Xn2;
00332       /* acc +=  a1 * y[n-1] */
00333       acc += (q31_t) a1 *Yn1;
00334       /* acc +=  a2 * y[n-2] */
00335       acc += (q31_t) a2 *Yn2;
00336
00337       /* The result is converted to 1.31  */
00338       acc = __SSAT((acc >> shift), 16);
00339
00340       /* Every time after the output is computed state should be updated. */
00341       /* The states should be updated as:  */
00342       /* Xn2 = Xn1    */
00343       /* Xn1 = Xn     */
00344       /* Yn2 = Yn1    */
00345       /* Yn1 = acc    */
00346       Xn2 = Xn1;
00347       Xn1 = Xn;
00348       Yn2 = Yn1;
00349       Yn1 = (q15_t) acc;
00350
00351       /* Store the output in the destination buffer. */
00352       *pOut++ = (q15_t) acc;
00353
00354       /* decrement the loop counter */
00355       sample--;
00356     }
00357
00358     /*  The first stage goes from the input buffer to the output buffer. */
00359     /*  Subsequent stages occur in-place in the output buffer */
00360     pIn = pDst;
00361
00362     /* Reset to destination pointer */
00363     pOut = pDst;
00364
00365     /*  Store the updated state variables back into the pState array */
00366     *pState++ = Xn1;
00367     *pState++ = Xn2;
00368     *pState++ = Yn1;
00369     *pState++ = Yn2;
00370
00371   } while(--stage);
00372
00373 #endif /*     #ifndef ARM_MATH_CM0 */
00374
00375 }
00376
00377
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CMSIS DSP Software Library: arm_biquad_cascade_df1_q31.c File Reference

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arm_biquad_cascade_df1_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_biquad_cascade_df1_q31 (const arm_biquad_casd_df1_inst_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_biquad_cascade_df1_q31.c Source File

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arm_biquad_cascade_df1_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_biquad_cascade_df1_q31.c
00009 *
00010 * Description:  Processing function for the
00011 *               Q31 Biquad cascade filter
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 *
00030 * Version 0.0.5  2010/04/26
00031 *    incorporated review comments and updated with latest CMSIS layer
00032 *
00033 * Version 0.0.3  2010/03/10
00034 *    Initial version
00035 * -------------------------------------------------------------------- */
00036
00037 #include "arm_math.h"
00038
00069 void arm_biquad_cascade_df1_q31(
00070   const arm_biquad_casd_df1_inst_q31 * S,
00071   q31_t * pSrc,
00072   q31_t * pDst,
00073   uint32_t blockSize)
00074 {
00075   q31_t *pIn = pSrc;                             /*  input pointer initialization  */
00076   q31_t *pOut = pDst;                            /*  output pointer initialization */
00077   q31_t *pState = S->pState;                     /*  pState pointer initialization */
00078   q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
00079   q63_t acc;                                     /*  accumulator                   */
00080   q31_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
00081   q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
00082   q31_t Xn;                                      /*  temporary input               */
00083   uint32_t shift = 32u - ((uint32_t) S->postShift + 1u);        /*  Shift to be applied to the output */
00084   uint32_t sample, stage = S->numStages;         /*  loop counters                     */
00085
00086
00087 #ifndef ARM_MATH_CM0
00088
00089   /* Run the below code for Cortex-M4 and Cortex-M3 */
00090
00091   do
00092   {
00093     /* Reading the coefficients */
00094     b0 = *pCoeffs++;
00095     b1 = *pCoeffs++;
00096     b2 = *pCoeffs++;
00097     a1 = *pCoeffs++;
00098     a2 = *pCoeffs++;
00099
00100     /* Reading the state values */
00101     Xn1 = pState[0];
00102     Xn2 = pState[1];
00103     Yn1 = pState[2];
00104     Yn2 = pState[3];
00105
00106     /* Apply loop unrolling and compute 4 output values simultaneously. */
00107     /*      The variable acc hold output values that are being computed:
00108      *
00109      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
00110      */
00111
00112     sample = blockSize >> 2u;
00113
00114     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00115      ** a second loop below computes the remaining 1 to 3 samples. */
00116     while(sample > 0u)
00117     {
00118       /* Read the input */
00119       Xn = *pIn++;
00120
00121       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00122
00123       /* acc =  b0 * x[n] */
00124       acc = (q63_t) b0 *Xn;
00125       /* acc +=  b1 * x[n-1] */
00126       acc += (q63_t) b1 *Xn1;
00127       /* acc +=  b[2] * x[n-2] */
00128       acc += (q63_t) b2 *Xn2;
00129       /* acc +=  a1 * y[n-1] */
00130       acc += (q63_t) a1 *Yn1;
00131       /* acc +=  a2 * y[n-2] */
00132       acc += (q63_t) a2 *Yn2;
00133
00134       /* The result is converted to 1.31 , Yn2 variable is reused */
00135       Yn2 = (q31_t) (acc >> shift);
00136
00137       /* Store the output in the destination buffer. */
00138       *pOut++ = Yn2;
00139
00140       /* Read the second input */
00141       Xn2 = *pIn++;
00142
00143       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00144
00145       /* acc =  b0 * x[n] */
00146       acc = (q63_t) b0 *Xn2;
00147       /* acc +=  b1 * x[n-1] */
00148       acc += (q63_t) b1 *Xn;
00149       /* acc +=  b[2] * x[n-2] */
00150       acc += (q63_t) b2 *Xn1;
00151       /* acc +=  a1 * y[n-1] */
00152       acc += (q63_t) a1 *Yn2;
00153       /* acc +=  a2 * y[n-2] */
00154       acc += (q63_t) a2 *Yn1;
00155
00156
00157       /* The result is converted to 1.31, Yn1 variable is reused  */
00158       Yn1 = (q31_t) (acc >> shift);
00159
00160       /* Store the output in the destination buffer. */
00161       *pOut++ = Yn1;
00162
00163       /* Read the third input  */
00164       Xn1 = *pIn++;
00165
00166       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00167
00168       /* acc =  b0 * x[n] */
00169       acc = (q63_t) b0 *Xn1;
00170       /* acc +=  b1 * x[n-1] */
00171       acc += (q63_t) b1 *Xn2;
00172       /* acc +=  b[2] * x[n-2] */
00173       acc += (q63_t) b2 *Xn;
00174       /* acc +=  a1 * y[n-1] */
00175       acc += (q63_t) a1 *Yn1;
00176       /* acc +=  a2 * y[n-2] */
00177       acc += (q63_t) a2 *Yn2;
00178
00179       /* The result is converted to 1.31, Yn2 variable is reused  */
00180       Yn2 = (q31_t) (acc >> shift);
00181
00182       /* Store the output in the destination buffer. */
00183       *pOut++ = Yn2;
00184
00185       /* Read the forth input */
00186       Xn = *pIn++;
00187
00188       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00189
00190       /* acc =  b0 * x[n] */
00191       acc = (q63_t) b0 *Xn;
00192       /* acc +=  b1 * x[n-1] */
00193       acc += (q63_t) b1 *Xn1;
00194       /* acc +=  b[2] * x[n-2] */
00195       acc += (q63_t) b2 *Xn2;
00196       /* acc +=  a1 * y[n-1] */
00197       acc += (q63_t) a1 *Yn2;
00198       /* acc +=  a2 * y[n-2] */
00199       acc += (q63_t) a2 *Yn1;
00200
00201       /* The result is converted to 1.31, Yn1 variable is reused  */
00202       Yn1 = (q31_t) (acc >> shift);
00203
00204       /* Every time after the output is computed state should be updated. */
00205       /* The states should be updated as:  */
00206       /* Xn2 = Xn1    */
00207       /* Xn1 = Xn     */
00208       /* Yn2 = Yn1    */
00209       /* Yn1 = acc    */
00210       Xn2 = Xn1;
00211       Xn1 = Xn;
00212
00213       /* Store the output in the destination buffer. */
00214       *pOut++ = Yn1;
00215
00216       /* decrement the loop counter */
00217       sample--;
00218     }
00219
00220     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00221      ** No loop unrolling is used. */
00222     sample = (blockSize & 0x3u);
00223
00224     while(sample > 0u)
00225     {
00226       /* Read the input */
00227       Xn = *pIn++;
00228
00229       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00230
00231       /* acc =  b0 * x[n] */
00232       acc = (q63_t) b0 *Xn;
00233       /* acc +=  b1 * x[n-1] */
00234       acc += (q63_t) b1 *Xn1;
00235       /* acc +=  b[2] * x[n-2] */
00236       acc += (q63_t) b2 *Xn2;
00237       /* acc +=  a1 * y[n-1] */
00238       acc += (q63_t) a1 *Yn1;
00239       /* acc +=  a2 * y[n-2] */
00240       acc += (q63_t) a2 *Yn2;
00241
00242       /* The result is converted to 1.31  */
00243       acc = acc >> shift;
00244
00245       /* Every time after the output is computed state should be updated. */
00246       /* The states should be updated as:  */
00247       /* Xn2 = Xn1    */
00248       /* Xn1 = Xn     */
00249       /* Yn2 = Yn1    */
00250       /* Yn1 = acc    */
00251       Xn2 = Xn1;
00252       Xn1 = Xn;
00253       Yn2 = Yn1;
00254       Yn1 = (q31_t) acc;
00255
00256       /* Store the output in the destination buffer. */
00257       *pOut++ = (q31_t) acc;
00258
00259       /* decrement the loop counter */
00260       sample--;
00261     }
00262
00263     /*  The first stage goes from the input buffer to the output buffer. */
00264     /*  Subsequent stages occur in-place in the output buffer */
00265     pIn = pDst;
00266
00267     /* Reset to destination pointer */
00268     pOut = pDst;
00269
00270     /*  Store the updated state variables back into the pState array */
00271     *pState++ = Xn1;
00272     *pState++ = Xn2;
00273     *pState++ = Yn1;
00274     *pState++ = Yn2;
00275
00276   } while(--stage);
00277
00278 #else
00279
00280   /* Run the below code for Cortex-M0 */
00281
00282   do
00283   {
00284     /* Reading the coefficients */
00285     b0 = *pCoeffs++;
00286     b1 = *pCoeffs++;
00287     b2 = *pCoeffs++;
00288     a1 = *pCoeffs++;
00289     a2 = *pCoeffs++;
00290
00291     /* Reading the state values */
00292     Xn1 = pState[0];
00293     Xn2 = pState[1];
00294     Yn1 = pState[2];
00295     Yn2 = pState[3];
00296
00297     /*      The variables acc holds the output value that is computed:
00298      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
00299      */
00300
00301     sample = blockSize;
00302
00303     while(sample > 0u)
00304     {
00305       /* Read the input */
00306       Xn = *pIn++;
00307
00308       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
00309       /* acc =  b0 * x[n] */
00310       acc = (q63_t) b0 *Xn;
00311
00312       /* acc +=  b1 * x[n-1] */
00313       acc += (q63_t) b1 *Xn1;
00314       /* acc +=  b[2] * x[n-2] */
00315       acc += (q63_t) b2 *Xn2;
00316       /* acc +=  a1 * y[n-1] */
00317       acc += (q63_t) a1 *Yn1;
00318       /* acc +=  a2 * y[n-2] */
00319       acc += (q63_t) a2 *Yn2;
00320
00321       /* The result is converted to 1.31  */
00322       acc = acc >> shift;
00323
00324       /* Every time after the output is computed state should be updated. */
00325       /* The states should be updated as:  */
00326       /* Xn2 = Xn1    */
00327       /* Xn1 = Xn     */
00328       /* Yn2 = Yn1    */
00329       /* Yn1 = acc    */
00330       Xn2 = Xn1;
00331       Xn1 = Xn;
00332       Yn2 = Yn1;
00333       Yn1 = (q31_t) acc;
00334
00335       /* Store the output in the destination buffer. */
00336       *pOut++ = (q31_t) acc;
00337
00338       /* decrement the loop counter */
00339       sample--;
00340     }
00341
00342     /*  The first stage goes from the input buffer to the output buffer. */
00343     /*  Subsequent stages occur in-place in the output buffer */
00344     pIn = pDst;
00345
00346     /* Reset to destination pointer */
00347     pOut = pDst;
00348
00349     /*  Store the updated state variables back into the pState array */
00350     *pState++ = Xn1;
00351     *pState++ = Xn2;
00352     *pState++ = Yn1;
00353     *pState++ = Yn2;
00354
00355   } while(--stage);
00356
00357 #endif /*  #ifndef ARM_MATH_CM0 */
00358 }
00359
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CMSIS DSP Software Library: arm_biquad_cascade_df2T_f32.c File Reference

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arm_biquad_cascade_df2T_f32.c File Reference

#include "arm_math.h"

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void arm_biquad_cascade_df2T_f32 (const arm_biquad_cascade_df2T_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_biquad_cascade_df2T_f32.c Source File

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arm_biquad_cascade_df2T_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_biquad_cascade_df2T_f32.c
00009 *
00010 * Description:  Processing function for the floating-point transposed
00011 *               direct form II Biquad cascade filter.
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated
00029 *
00030 * Version 0.0.7  2010/06/10
00031 *    Misra-C changes done
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00143 void arm_biquad_cascade_df2T_f32(
00144   const arm_biquad_cascade_df2T_instance_f32 * S,
00145   float32_t * pSrc,
00146   float32_t * pDst,
00147   uint32_t blockSize)
00148 {
00149
00150   float32_t *pIn = pSrc;                         /*  source pointer            */
00151   float32_t *pOut = pDst;                        /*  destination pointer       */
00152   float32_t *pState = S->pState;                 /*  State pointer            */
00153   float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
00154   float32_t acc0;                                /*  Simulates the accumulator */
00155   float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
00156   float32_t Xn;                                  /*  temporary input           */
00157   float32_t d1, d2;                              /*  state variables          */
00158   uint32_t sample, stage = S->numStages;         /*  loop counters             */
00159
00160
00161 #ifndef ARM_MATH_CM0
00162
00163   /* Run the below code for Cortex-M4 and Cortex-M3 */
00164
00165   do
00166   {
00167     /* Reading the coefficients */
00168     b0 = *pCoeffs++;
00169     b1 = *pCoeffs++;
00170     b2 = *pCoeffs++;
00171     a1 = *pCoeffs++;
00172     a2 = *pCoeffs++;
00173
00174     /*Reading the state values */
00175     d1 = pState[0];
00176     d2 = pState[1];
00177
00178     /* Apply loop unrolling and compute 4 output values simultaneously. */
00179     sample = blockSize >> 2u;
00180
00181     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00182      ** a second loop below computes the remaining 1 to 3 samples. */
00183     while(sample > 0u)
00184     {
00185       /* Read the first input */
00186       Xn = *pIn++;
00187
00188       /* y[n] = b0 * x[n] + d1 */
00189       acc0 = (b0 * Xn) + d1;
00190
00191       /* Store the result in the accumulator in the destination buffer. */
00192       *pOut++ = acc0;
00193
00194       /* Every time after the output is computed state should be updated. */
00195       /* d1 = b1 * x[n] + a1 * y[n] + d2 */
00196       d1 = ((b1 * Xn) + (a1 * acc0)) + d2;
00197
00198       /* d2 = b2 * x[n] + a2 * y[n] */
00199       d2 = (b2 * Xn) + (a2 * acc0);
00200
00201       /* Read the second input */
00202       Xn = *pIn++;
00203
00204       /* y[n] = b0 * x[n] + d1 */
00205       acc0 = (b0 * Xn) + d1;
00206
00207       /* Store the result in the accumulator in the destination buffer. */
00208       *pOut++ = acc0;
00209
00210       /* Every time after the output is computed state should be updated. */
00211       /* d1 = b1 * x[n] + a1 * y[n] + d2 */
00212       d1 = ((b1 * Xn) + (a1 * acc0)) + d2;
00213
00214       /* d2 = b2 * x[n] + a2 * y[n] */
00215       d2 = (b2 * Xn) + (a2 * acc0);
00216
00217       /* Read the third input */
00218       Xn = *pIn++;
00219
00220       /* y[n] = b0 * x[n] + d1 */
00221       acc0 = (b0 * Xn) + d1;
00222
00223       /* Store the result in the accumulator in the destination buffer. */
00224       *pOut++ = acc0;
00225
00226       /* Every time after the output is computed state should be updated. */
00227       /* d1 = b1 * x[n] + a1 * y[n] + d2 */
00228       d1 = ((b1 * Xn) + (a1 * acc0)) + d2;
00229
00230       /* d2 = b2 * x[n] + a2 * y[n] */
00231       d2 = (b2 * Xn) + (a2 * acc0);
00232
00233       /* Read the fourth input */
00234       Xn = *pIn++;
00235
00236       /* y[n] = b0 * x[n] + d1 */
00237       acc0 = (b0 * Xn) + d1;
00238
00239       /* Store the result in the accumulator in the destination buffer. */
00240       *pOut++ = acc0;
00241
00242       /* Every time after the output is computed state should be updated. */
00243       /* d1 = b1 * x[n] + a1 * y[n] + d2 */
00244       d1 = (b1 * Xn) + (a1 * acc0) + d2;
00245
00246       /* d2 = b2 * x[n] + a2 * y[n] */
00247       d2 = (b2 * Xn) + (a2 * acc0);
00248
00249       /* decrement the loop counter */
00250       sample--;
00251
00252     }
00253
00254     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00255      ** No loop unrolling is used. */
00256     sample = blockSize & 0x3u;
00257
00258     while(sample > 0u)
00259     {
00260       /* Read the input */
00261       Xn = *pIn++;
00262
00263       /* y[n] = b0 * x[n] + d1 */
00264       acc0 = (b0 * Xn) + d1;
00265
00266       /* Store the result in the accumulator in the destination buffer. */
00267       *pOut++ = acc0;
00268
00269       /* Every time after the output is computed state should be updated. */
00270       /* d1 = b1 * x[n] + a1 * y[n] + d2 */
00271       d1 = ((b1 * Xn) + (a1 * acc0)) + d2;
00272
00273       /* d2 = b2 * x[n] + a2 * y[n] */
00274       d2 = (b2 * Xn) + (a2 * acc0);
00275
00276       /* decrement the loop counter */
00277       sample--;
00278     }
00279
00280     /* Store the updated state variables back into the state array */
00281     *pState++ = d1;
00282     *pState++ = d2;
00283
00284     /* The current stage input is given as the output to the next stage */
00285     pIn = pDst;
00286
00287     /*Reset the output working pointer */
00288     pOut = pDst;
00289
00290     /* decrement the loop counter */
00291     stage--;
00292
00293   } while(stage > 0u);
00294
00295 #else
00296
00297   /* Run the below code for Cortex-M0 */
00298
00299   do
00300   {
00301     /* Reading the coefficients */
00302     b0 = *pCoeffs++;
00303     b1 = *pCoeffs++;
00304     b2 = *pCoeffs++;
00305     a1 = *pCoeffs++;
00306     a2 = *pCoeffs++;
00307
00308     /*Reading the state values */
00309     d1 = pState[0];
00310     d2 = pState[1];
00311
00312
00313     sample = blockSize;
00314
00315     while(sample > 0u)
00316     {
00317       /* Read the input */
00318       Xn = *pIn++;
00319
00320       /* y[n] = b0 * x[n] + d1 */
00321       acc0 = (b0 * Xn) + d1;
00322
00323       /* Store the result in the accumulator in the destination buffer. */
00324       *pOut++ = acc0;
00325
00326       /* Every time after the output is computed state should be updated. */
00327       /* d1 = b1 * x[n] + a1 * y[n] + d2 */
00328       d1 = ((b1 * Xn) + (a1 * acc0)) + d2;
00329
00330       /* d2 = b2 * x[n] + a2 * y[n] */
00331       d2 = (b2 * Xn) + (a2 * acc0);
00332
00333       /* decrement the loop counter */
00334       sample--;
00335     }
00336
00337     /* Store the updated state variables back into the state array */
00338     *pState++ = d1;
00339     *pState++ = d2;
00340
00341     /* The current stage input is given as the output to the next stage */
00342     pIn = pDst;
00343
00344     /*Reset the output working pointer */
00345     pOut = pDst;
00346
00347     /* decrement the loop counter */
00348     stage--;
00349
00350   } while(stage > 0u);
00351
00352 #endif /*  #ifndef ARM_MATH_CM0         */
00353
00354 }
00355
00356
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CMSIS DSP Software Library: arm_biquad_cascade_df2T_init_f32.c File Reference

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arm_biquad_cascade_df2T_init_f32.c File Reference

#include "arm_math.h"

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Functions

void arm_biquad_cascade_df2T_init_f32 (arm_biquad_cascade_df2T_instance_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
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CMSIS DSP Software Library: arm_biquad_cascade_df2T_init_f32.c Source File

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arm_biquad_cascade_df2T_init_f32.c

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00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_biquad_cascade_df2T_init_f32.c
00009 *
00010 * Description:  Initialization function for the floating-point transposed
00011 *               direct form II Biquad cascade filter.
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated
00029 *
00030 * Version 0.0.7  2010/06/10
00031 *    Misra-C changes done
00032 * ---------------------------------------------------------------------------*/
00033
00034 #include "arm_math.h"
00035
00073 void arm_biquad_cascade_df2T_init_f32(
00074   arm_biquad_cascade_df2T_instance_f32 * S,
00075   uint8_t numStages,
00076   float32_t * pCoeffs,
00077   float32_t * pState)
00078 {
00079   /* Assign filter stages */
00080   S->numStages = numStages;
00081
00082   /* Assign coefficient pointer */
00083   S->pCoeffs = pCoeffs;
00084
00085   /* Clear state buffer and size is always 2 * numStages */
00086   memset(pState, 0, (2u * (uint32_t) numStages) * sizeof(float32_t));
00087
00088   /* Assign state pointer */
00089   S->pState = pState;
00090 }
00091
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CMSIS DSP Software Library: arm_cfft_radix4_f32.c File Reference

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Functions

arm_cfft_radix4_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void | arm_cfft_radix4_f32 (const arm_cfft_radix4_instance_f32 *S, float32_t *pSrc)
void | arm_radix4_butterfly_f32 (float32_t *pSrc, uint16_t fftLen, float32_t *pCoef, uint16_t twidCoefModifier)
void | arm_radix4_butterfly_inverse_f32 (float32_t *pSrc, uint16_t fftLen, float32_t *pCoef, uint16_t twidCoefModifier, float32_t onebyfftLen)
void | arm_bitreversal_f32 (float32_t *pSrc, uint16_t fftSize, uint16_t bitRevFactor, uint16_t *pBitRevTab)

Function Documentation

void arm_radix4_butterfly_f32 | ( | float32_t * | pSrc,
 |  | uint16_t | fftLen,
 |  | float32_t * | pCoef,
 |  | uint16_t | twidCoefModifier
 | ) |  |

Core function for the floating-point CFFT butterfly process.

end of CFFT_CIFFT group

Definition at line 223 of file arm_cfft_radix4_f32.c.

void arm_radix4_butterfly_inverse_f32 | ( | float32_t * | pSrc,
 |  | uint16_t | fftLen,
 |  | float32_t * | pCoef,
 |  | uint16_t | twidCoefModifier,
 |  | float32_t | onebyfftLen
 | ) |  |

Core function for the floating-point CIFFT butterfly process.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of floating-point data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
[in] | onebyfftLen | value of 1/fftLen.
Returns:
none.

Definition at line 660 of file arm_cfft_radix4_f32.c.

void arm_bitreversal_f32 | ( | float32_t * | pSrc,
 |  | uint16_t | fftSize,
 |  | uint16_t | bitRevFactor,
 |  | uint16_t * | pBitRevTab
 | ) |  |

In-place bit reversal function.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of floating-point data type.
[in] | fftSize | length of the FFT.
[in] | bitRevFactor | bit reversal modifier that supports different size FFTs with the same bit reversal table.
[in] | *pBitRevTab | points to the bit reversal table.
Returns:
none.

Definition at line 1177 of file arm_cfft_radix4_f32.c.

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CMSIS DSP Software Library: arm_cfft_radix4_f32.c Source File

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arm_cfft_radix4_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cfft_radix4_f32.c
00009 *
00010 * Description:  Radix-4 Decimation in Frequency CFFT & CIFFT Floating point processing function
00011 *
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 *
00030 * Version 0.0.5  2010/04/26
00031 *    incorporated review comments and updated with latest CMSIS layer
00032 *
00033 * Version 0.0.3  2010/03/10
00034 *    Initial version
00035 * -------------------------------------------------------------------- */
00036
00037 #include "arm_math.h"
00038
00177 void arm_cfft_radix4_f32(
00178   const arm_cfft_radix4_instance_f32 * S,
00179   float32_t * pSrc)
00180 {
00181
00182   if(S->ifftFlag == 1u)
00183   {
00184     /*  Complex IFFT radix-4  */
00185     arm_radix4_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle,
00186                                      S->twidCoefModifier, S->onebyfftLen);
00187   }
00188   else
00189   {
00190     /*  Complex FFT radix-4  */
00191     arm_radix4_butterfly_f32(pSrc, S->fftLen, S->pTwiddle,
00192                              S->twidCoefModifier);
00193   }
00194
00195   if(S->bitReverseFlag == 1u)
00196   {
00197     /*  Bit Reversal */
00198     arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
00199   }
00200
00201 }
00202
00203
00210 /* ----------------------------------------------------------------------
00211 ** Internal helper function used by the FFTs
00212 ** ------------------------------------------------------------------- */
00213
00214 /*
00215  * @brief  Core function for the floating-point CFFT butterfly process.
00216  * @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.
00217  * @param[in]      fftLen           length of the FFT.
00218  * @param[in]      *pCoef           points to the twiddle coefficient buffer.
00219  * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
00220  * @return none.
00221  */
00222
00223 void arm_radix4_butterfly_f32(
00224   float32_t * pSrc,
00225   uint16_t fftLen,
00226   float32_t * pCoef,
00227   uint16_t twidCoefModifier)
00228 {
00229
00230   float32_t co1, co2, co3, si1, si2, si3;
00231   float32_t t1, t2, r1, r2, s1, s2;
00232   uint32_t ia1, ia2, ia3;
00233   uint32_t i0, i1, i2, i3;
00234   uint32_t n1, n2, j, k;
00235
00236 #ifndef ARM_MATH_CM0
00237
00238   /* Run the below code for Cortex-M4 and Cortex-M3 */
00239
00240   /*  Initializations for the first stage */
00241   n2 = fftLen;
00242   n1 = n2;
00243
00244   /* n2 = fftLen/4 */
00245   n2 >>= 2u;
00246   i0 = 0u;
00247   ia1 = 0u;
00248
00249   j = n2;
00250
00251   /*  Calculation of first stage */
00252   do
00253   {
00254     /*  index calculation for the input as, */
00255     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
00256     i1 = i0 + n2;
00257     i2 = i1 + n2;
00258     i3 = i2 + n2;
00259
00260     /*  Butterfly implementation */
00261
00262     /* xa + xc */
00263     r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
00264
00265     /* xa - xc */
00266     r2 = pSrc[2u * i0] - pSrc[2u * i2];
00267
00268     /* ya + yc */
00269     s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00270
00271     /* ya - yc */
00272     s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00273
00274     /* xb + xd */
00275     t1 = pSrc[2u * i1] + pSrc[2u * i3];
00276
00277     /* xa' = xa + xb + xc + xd */
00278     pSrc[2u * i0] = r1 + t1;
00279
00280     /* (xa + xc) - (xb + xd) */
00281     r1 = r1 - t1;
00282
00283     /* yb + yd */
00284     t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00285
00286     /* ya' = ya + yb + yc + yd */
00287     pSrc[(2u * i0) + 1u] = s1 + t2;
00288
00289     /* (ya + yc) - (yb + yd) */
00290     s1 = s1 - t2;
00291
00292     /* yb - yd */
00293     t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00294
00295     /* xb - xd */
00296     t2 = pSrc[2u * i1] - pSrc[2u * i3];
00297
00298     /*  index calculation for the coefficients */
00299     ia2 = ia1 + ia1;
00300     co2 = pCoef[ia2 * 2u];
00301     si2 = pCoef[(ia2 * 2u) + 1u];
00302
00303     /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
00304     pSrc[2u * i1] = (r1 * co2) + (s1 * si2);
00305
00306     /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
00307     pSrc[(2u * i1) + 1u] = (s1 * co2) - (r1 * si2);
00308
00309     /* (xa - xc) + (yb - yd) */
00310     r1 = r2 + t1;
00311
00312     /* (xa - xc) - (yb - yd) */
00313     r2 = r2 - t1;
00314
00315     /* (ya - yc) - (xb - xd) */
00316     s1 = s2 - t2;
00317
00318     /* (ya - yc) + (xb - xd) */
00319     s2 = s2 + t2;
00320
00321     co1 = pCoef[ia1 * 2u];
00322     si1 = pCoef[(ia1 * 2u) + 1u];
00323
00324     /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
00325     pSrc[2u * i2] = (r1 * co1) + (s1 * si1);
00326
00327     /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
00328     pSrc[(2u * i2) + 1u] = (s1 * co1) - (r1 * si1);
00329
00330     /*  index calculation for the coefficients */
00331     ia3 = ia2 + ia1;
00332     co3 = pCoef[ia3 * 2u];
00333     si3 = pCoef[(ia3 * 2u) + 1u];
00334
00335
00336     /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
00337     pSrc[2u * i3] = (r2 * co3) + (s2 * si3);
00338
00339     /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
00340     pSrc[(2u * i3) + 1u] = (s2 * co3) - (r2 * si3);
00341
00342     /*  Twiddle coefficients index modifier */
00343     ia1 = ia1 + twidCoefModifier;
00344
00345     /*  Updating input index */
00346     i0 = i0 + 1u;
00347
00348   }
00349   while(--j);
00350
00351   twidCoefModifier <<= 2u;
00352
00353   /*  Calculation of second stage to excluding last stage */
00354   for (k = fftLen / 4; k > 4u; k >>= 2u)
00355   {
00356     /*  Initializations for the first stage */
00357     n1 = n2;
00358     n2 >>= 2u;
00359     ia1 = 0u;
00360
00361     /*  Calculation of first stage */
00362     for (j = 0u; j <= (n2 - 1u); j++)
00363     {
00364       /*  index calculation for the coefficients */
00365       ia2 = ia1 + ia1;
00366       ia3 = ia2 + ia1;
00367       co1 = pCoef[ia1 * 2u];
00368       si1 = pCoef[(ia1 * 2u) + 1u];
00369       co2 = pCoef[ia2 * 2u];
00370       si2 = pCoef[(ia2 * 2u) + 1u];
00371       co3 = pCoef[ia3 * 2u];
00372       si3 = pCoef[(ia3 * 2u) + 1u];
00373
00374       /*  Twiddle coefficients index modifier */
00375       ia1 = ia1 + twidCoefModifier;
00376
00377       for (i0 = j; i0 < fftLen; i0 += n1)
00378       {
00379         /*  index calculation for the input as, */
00380         /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
00381         i1 = i0 + n2;
00382         i2 = i1 + n2;
00383         i3 = i2 + n2;
00384
00385         /* xa + xc */
00386         r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
00387
00388         /* xa - xc */
00389         r2 = pSrc[(2u * i0)] - pSrc[(2u * i2)];
00390
00391         /* ya + yc */
00392         s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00393
00394         /* ya - yc */
00395         s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00396
00397         /* xb + xd */
00398         t1 = pSrc[2u * i1] + pSrc[2u * i3];
00399
00400         /* xa' = xa + xb + xc + xd */
00401         pSrc[2u * i0] = r1 + t1;
00402
00403         /* xa + xc -(xb + xd) */
00404         r1 = r1 - t1;
00405
00406         /* yb + yd */
00407         t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00408
00409         /* ya' = ya + yb + yc + yd */
00410         pSrc[(2u * i0) + 1u] = s1 + t2;
00411
00412         /* (ya + yc) - (yb + yd) */
00413         s1 = s1 - t2;
00414
00415         /* (yb - yd) */
00416         t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00417
00418         /* (xb - xd) */
00419         t2 = pSrc[2u * i1] - pSrc[2u * i3];
00420
00421         /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
00422         pSrc[2u * i1] = (r1 * co2) + (s1 * si2);
00423
00424         /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
00425         pSrc[(2u * i1) + 1u] = (s1 * co2) - (r1 * si2);
00426
00427         /* (xa - xc) + (yb - yd) */
00428         r1 = r2 + t1;
00429
00430         /* (xa - xc) - (yb - yd) */
00431         r2 = r2 - t1;
00432
00433         /* (ya - yc) -  (xb - xd) */
00434         s1 = s2 - t2;
00435
00436         /* (ya - yc) +  (xb - xd) */
00437         s2 = s2 + t2;
00438
00439         /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
00440         pSrc[2u * i2] = (r1 * co1) + (s1 * si1);
00441
00442         /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
00443         pSrc[(2u * i2) + 1u] = (s1 * co1) - (r1 * si1);
00444
00445         /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
00446         pSrc[2u * i3] = (r2 * co3) + (s2 * si3);
00447
00448         /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
00449         pSrc[(2u * i3) + 1u] = (s2 * co3) - (r2 * si3);
00450       }
00451     }
00452     twidCoefModifier <<= 2u;
00453   }
00454
00455   /*  Initializations of last stage */
00456   n1 = n2;
00457   n2 >>= 2u;
00458
00459   /*  Calculations of last stage */
00460   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
00461   {
00462     /*  index calculation for the input as, */
00463     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
00464     i1 = i0 + n2;
00465     i2 = i1 + n2;
00466     i3 = i2 + n2;
00467
00468     /*  Butterfly implementation */
00469
00470     /* xa + xb */
00471     r1 = pSrc[2u * i0] + pSrc[2u * i2];
00472
00473     /* xa - xb */
00474     r2 = pSrc[2u * i0] - pSrc[2u * i2];
00475
00476     /* ya + yc */
00477     s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00478
00479     /* ya - yc */
00480     s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00481
00482     /* xc + xd */
00483     t1 = pSrc[2u * i1] + pSrc[2u * i3];
00484
00485     /* xa' = xa + xb + xc + xd */
00486     pSrc[2u * i0] = r1 + t1;
00487
00488     /* (xa + xb) - (xc + xd) */
00489     r1 = r1 - t1;
00490
00491     /* yb + yd */
00492     t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00493
00494     /* ya' = ya + yb + yc + yd */
00495     pSrc[(2u * i0) + 1u] = s1 + t2;
00496
00497     /* (ya + yc) - (yb + yd) */
00498     s1 = s1 - t2;
00499
00500     /* (yb-yd) */
00501     t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00502
00503     /* (xb-xd) */
00504     t2 = pSrc[2u * i1] - pSrc[2u * i3];
00505
00506     /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
00507     pSrc[2u * i1] = r1;
00508
00509     /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
00510     pSrc[(2u * i1) + 1u] = s1;
00511
00512     /* (xa+yb-xc-yd) */
00513     r1 = r2 + t1;
00514
00515     /* (xa-yb-xc+yd) */
00516     r2 = r2 - t1;
00517
00518     /* (ya-xb-yc+xd) */
00519     s1 = s2 - t2;
00520
00521     /* (ya+xb-yc-xd) */
00522     s2 = s2 + t2;
00523
00524     /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
00525     pSrc[2u * i2] = r1;
00526
00527     /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
00528     pSrc[(2u * i2) + 1u] = s1;
00529
00530     /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
00531     pSrc[2u * i3] = r2;
00532
00533     /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
00534     pSrc[(2u * i3) + 1u] = s2;
00535   }
00536
00537
00538 #else
00539
00540   /* Run the below code for Cortex-M0 */
00541
00542   /*  Initializations for the fft calculation */
00543   n2 = fftLen;
00544   n1 = n2;
00545   for (k = fftLen; k > 1u; k >>= 2u)
00546   {
00547     /*  Initializations for the fft calculation */
00548     n1 = n2;
00549     n2 >>= 2u;
00550     ia1 = 0u;
00551
00552     /*  FFT Calculation */
00553     for (j = 0u; j <= (n2 - 1u); j++)
00554     {
00555       /*  index calculation for the coefficients */
00556       ia2 = ia1 + ia1;
00557       ia3 = ia2 + ia1;
00558       co1 = pCoef[ia1 * 2u];
00559       si1 = pCoef[(ia1 * 2u) + 1u];
00560       co2 = pCoef[ia2 * 2u];
00561       si2 = pCoef[(ia2 * 2u) + 1u];
00562       co3 = pCoef[ia3 * 2u];
00563       si3 = pCoef[(ia3 * 2u) + 1u];
00564
00565       /*  Twiddle coefficients index modifier */
00566       ia1 = ia1 + twidCoefModifier;
00567
00568       for (i0 = j; i0 < fftLen; i0 += n1)
00569       {
00570         /*  index calculation for the input as, */
00571         /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
00572         i1 = i0 + n2;
00573         i2 = i1 + n2;
00574         i3 = i2 + n2;
00575
00576         /* xa + xc */
00577         r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
00578
00579         /* xa - xc */
00580         r2 = pSrc[(2u * i0)] - pSrc[(2u * i2)];
00581
00582         /* ya + yc */
00583         s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00584
00585         /* ya - yc */
00586         s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00587
00588         /* xb + xd */
00589         t1 = pSrc[2u * i1] + pSrc[2u * i3];
00590
00591         /* xa' = xa + xb + xc + xd */
00592         pSrc[2u * i0] = r1 + t1;
00593
00594         /* xa + xc -(xb + xd) */
00595         r1 = r1 - t1;
00596
00597         /* yb + yd */
00598         t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00599
00600         /* ya' = ya + yb + yc + yd */
00601         pSrc[(2u * i0) + 1u] = s1 + t2;
00602
00603         /* (ya + yc) - (yb + yd) */
00604         s1 = s1 - t2;
00605
00606         /* (yb - yd) */
00607         t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00608
00609         /* (xb - xd) */
00610         t2 = pSrc[2u * i1] - pSrc[2u * i3];
00611
00612         /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
00613         pSrc[2u * i1] = (r1 * co2) + (s1 * si2);
00614
00615         /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
00616         pSrc[(2u * i1) + 1u] = (s1 * co2) - (r1 * si2);
00617
00618         /* (xa - xc) + (yb - yd) */
00619         r1 = r2 + t1;
00620
00621         /* (xa - xc) - (yb - yd) */
00622         r2 = r2 - t1;
00623
00624         /* (ya - yc) -  (xb - xd) */
00625         s1 = s2 - t2;
00626
00627         /* (ya - yc) +  (xb - xd) */
00628         s2 = s2 + t2;
00629
00630         /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
00631         pSrc[2u * i2] = (r1 * co1) + (s1 * si1);
00632
00633         /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
00634         pSrc[(2u * i2) + 1u] = (s1 * co1) - (r1 * si1);
00635
00636         /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
00637         pSrc[2u * i3] = (r2 * co3) + (s2 * si3);
00638
00639         /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
00640         pSrc[(2u * i3) + 1u] = (s2 * co3) - (r2 * si3);
00641       }
00642     }
00643     twidCoefModifier <<= 2u;
00644   }
00645
00646 #endif /* #ifndef ARM_MATH_CM0 */
00647
00648 }
00649
00650 /*
00651  * @brief  Core function for the floating-point CIFFT butterfly process.
00652  * @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.
00653  * @param[in]      fftLen           length of the FFT.
00654  * @param[in]      *pCoef           points to twiddle coefficient buffer.
00655  * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
00656  * @param[in]      onebyfftLen      value of 1/fftLen.
00657  * @return none.
00658  */
00659
00660 void arm_radix4_butterfly_inverse_f32(
00661   float32_t * pSrc,
00662   uint16_t fftLen,
00663   float32_t * pCoef,
00664   uint16_t twidCoefModifier,
00665   float32_t onebyfftLen)
00666 {
00667   float32_t co1, co2, co3, si1, si2, si3;
00668   float32_t t1, t2, r1, r2, s1, s2;
00669   uint32_t ia1, ia2, ia3;
00670   uint32_t i0, i1, i2, i3;
00671   uint32_t n1, n2, j, k;
00672
00673 #ifndef ARM_MATH_CM0
00674
00675   /* Run the below code for Cortex-M4 and Cortex-M3 */
00676
00677   /*  Initializations for the first stage */
00678   n2 = fftLen;
00679   n1 = n2;
00680
00681   /* n2 = fftLen/4 */
00682   n2 >>= 2u;
00683   i0 = 0u;
00684   ia1 = 0u;
00685
00686   j = n2;
00687
00688   /*  Calculation of first stage */
00689   do
00690   {
00691     /*  index calculation for the input as, */
00692     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
00693     i1 = i0 + n2;
00694     i2 = i1 + n2;
00695     i3 = i2 + n2;
00696
00697     /*  Butterfly implementation */
00698     /* xa + xc */
00699     r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
00700
00701     /* xa - xc */
00702     r2 = pSrc[2u * i0] - pSrc[2u * i2];
00703
00704     /* ya + yc */
00705     s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00706
00707     /* ya - yc */
00708     s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00709
00710     /* xb + xd */
00711     t1 = pSrc[2u * i1] + pSrc[2u * i3];
00712
00713     /* xa' = xa + xb + xc + xd */
00714     pSrc[2u * i0] = r1 + t1;
00715
00716     /* (xa + xc) - (xb + xd) */
00717     r1 = r1 - t1;
00718
00719     /* yb + yd */
00720     t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00721
00722     /* ya' = ya + yb + yc + yd */
00723     pSrc[(2u * i0) + 1u] = s1 + t2;
00724
00725     /* (ya + yc) - (yb + yd) */
00726     s1 = s1 - t2;
00727
00728     /* yb - yd */
00729     t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00730
00731     /* xb - xd */
00732     t2 = pSrc[2u * i1] - pSrc[2u * i3];
00733
00734     /*  index calculation for the coefficients */
00735     ia2 = ia1 + ia1;
00736     co2 = pCoef[ia2 * 2u];
00737     si2 = pCoef[(ia2 * 2u) + 1u];
00738
00739     /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
00740     pSrc[2u * i1] = (r1 * co2) - (s1 * si2);
00741
00742     /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
00743     pSrc[(2u * i1) + 1u] = (s1 * co2) + (r1 * si2);
00744
00745     /* (xa - xc) - (yb - yd) */
00746     r1 = r2 - t1;
00747
00748     /* (xa - xc) + (yb - yd) */
00749     r2 = r2 + t1;
00750
00751     /* (ya - yc) + (xb - xd) */
00752     s1 = s2 + t2;
00753
00754     /* (ya - yc) - (xb - xd) */
00755     s2 = s2 - t2;
00756
00757     co1 = pCoef[ia1 * 2u];
00758     si1 = pCoef[(ia1 * 2u) + 1u];
00759
00760     /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
00761     pSrc[2u * i2] = (r1 * co1) - (s1 * si1);
00762
00763     /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
00764     pSrc[(2u * i2) + 1u] = (s1 * co1) + (r1 * si1);
00765
00766     /*  index calculation for the coefficients */
00767     ia3 = ia2 + ia1;
00768     co3 = pCoef[ia3 * 2u];
00769     si3 = pCoef[(ia3 * 2u) + 1u];
00770
00771     /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
00772     pSrc[2u * i3] = (r2 * co3) - (s2 * si3);
00773
00774     /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
00775     pSrc[(2u * i3) + 1u] = (s2 * co3) + (r2 * si3);
00776
00777     /*  Twiddle coefficients index modifier */
00778     ia1 = ia1 + twidCoefModifier;
00779
00780     /*  Updating input index */
00781     i0 = i0 + 1u;
00782
00783   }
00784   while(--j);
00785
00786   twidCoefModifier <<= 2u;
00787
00788   /*  Calculation of second stage to excluding last stage */
00789   for (k = fftLen / 4; k > 4u; k >>= 2u)
00790   {
00791     /*  Initializations for the first stage */
00792     n1 = n2;
00793     n2 >>= 2u;
00794     ia1 = 0u;
00795
00796     /*  Calculation of first stage */
00797     for (j = 0u; j <= (n2 - 1u); j++)
00798     {
00799       /*  index calculation for the coefficients */
00800       ia2 = ia1 + ia1;
00801       ia3 = ia2 + ia1;
00802       co1 = pCoef[ia1 * 2u];
00803       si1 = pCoef[(ia1 * 2u) + 1u];
00804       co2 = pCoef[ia2 * 2u];
00805       si2 = pCoef[(ia2 * 2u) + 1u];
00806       co3 = pCoef[ia3 * 2u];
00807       si3 = pCoef[(ia3 * 2u) + 1u];
00808
00809       /*  Twiddle coefficients index modifier */
00810       ia1 = ia1 + twidCoefModifier;
00811
00812       for (i0 = j; i0 < fftLen; i0 += n1)
00813       {
00814         /*  index calculation for the input as, */
00815         /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
00816         i1 = i0 + n2;
00817         i2 = i1 + n2;
00818         i3 = i2 + n2;
00819
00820         /* xa + xc */
00821         r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
00822
00823         /* xa - xc */
00824         r2 = pSrc[(2u * i0)] - pSrc[(2u * i2)];
00825
00826         /* ya + yc */
00827         s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00828
00829         /* ya - yc */
00830         s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00831
00832         /* xb + xd */
00833         t1 = pSrc[2u * i1] + pSrc[2u * i3];
00834
00835         /* xa' = xa + xb + xc + xd */
00836         pSrc[2u * i0] = r1 + t1;
00837
00838         /* xa + xc -(xb + xd) */
00839         r1 = r1 - t1;
00840
00841         /* yb + yd */
00842         t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00843
00844         /* ya' = ya + yb + yc + yd */
00845         pSrc[(2u * i0) + 1u] = s1 + t2;
00846
00847         /* (ya + yc) - (yb + yd) */
00848         s1 = s1 - t2;
00849
00850         /* (yb - yd) */
00851         t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00852
00853         /* (xb - xd) */
00854         t2 = pSrc[2u * i1] - pSrc[2u * i3];
00855
00856         /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
00857         pSrc[2u * i1] = (r1 * co2) - (s1 * si2);
00858
00859         /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
00860         pSrc[(2u * i1) + 1u] = (s1 * co2) + (r1 * si2);
00861
00862         /* (xa - xc) - (yb - yd) */
00863         r1 = r2 - t1;
00864
00865         /* (xa - xc) + (yb - yd) */
00866         r2 = r2 + t1;
00867
00868         /* (ya - yc) +  (xb - xd) */
00869         s1 = s2 + t2;
00870
00871         /* (ya - yc) -  (xb - xd) */
00872         s2 = s2 - t2;
00873
00874         /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
00875         pSrc[2u * i2] = (r1 * co1) - (s1 * si1);
00876
00877         /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
00878         pSrc[(2u * i2) + 1u] = (s1 * co1) + (r1 * si1);
00879
00880         /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
00881         pSrc[2u * i3] = (r2 * co3) - (s2 * si3);
00882
00883         /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
00884         pSrc[(2u * i3) + 1u] = (s2 * co3) + (r2 * si3);
00885       }
00886     }
00887     twidCoefModifier <<= 2u;
00888   }
00889
00890   /*  Initializations of last stage */
00891   n1 = n2;
00892   n2 >>= 2u;
00893
00894   /*  Calculations of last stage */
00895   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
00896   {
00897     /*  index calculation for the input as, */
00898     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
00899     i1 = i0 + n2;
00900     i2 = i1 + n2;
00901     i3 = i2 + n2;
00902
00903     /*  Butterfly implementation */
00904     /* xa + xc */
00905     r1 = pSrc[2u * i0] + pSrc[2u * i2];
00906
00907     /* xa - xc */
00908     r2 = pSrc[2u * i0] - pSrc[2u * i2];
00909
00910     /* ya + yc */
00911     s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00912
00913     /* ya - yc */
00914     s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00915
00916     /* xc + xd */
00917     t1 = pSrc[2u * i1] + pSrc[2u * i3];
00918
00919     /* xa' = xa + xb + xc + xd */
00920     pSrc[2u * i0] = (r1 + t1) * onebyfftLen;
00921
00922     /* (xa + xb) - (xc + xd) */
00923     r1 = r1 - t1;
00924
00925     /* yb + yd */
00926     t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00927
00928     /* ya' = ya + yb + yc + yd */
00929     pSrc[(2u * i0) + 1u] = (s1 + t2) * onebyfftLen;
00930
00931     /* (ya + yc) - (yb + yd) */
00932     s1 = s1 - t2;
00933
00934     /* (yb-yd) */
00935     t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00936
00937     /* (xb-xd) */
00938     t2 = pSrc[2u * i1] - pSrc[2u * i3];
00939
00940     /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
00941     pSrc[2u * i1] = r1 * onebyfftLen;
00942
00943     /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
00944     pSrc[(2u * i1) + 1u] = s1 * onebyfftLen;
00945
00946
00947     /* (xa - xc) - (yb-yd) */
00948     r1 = r2 - t1;
00949
00950     /* (xa - xc) + (yb-yd) */
00951     r2 = r2 + t1;
00952
00953     /* (ya - yc) + (xb-xd) */
00954     s1 = s2 + t2;
00955
00956     /* (ya - yc) - (xb-xd) */
00957     s2 = s2 - t2;
00958
00959     /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
00960     pSrc[2u * i2] = r1 * onebyfftLen;
00961
00962     /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
00963     pSrc[(2u * i2) + 1u] = s1 * onebyfftLen;
00964
00965     /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
00966     pSrc[2u * i3] = r2 * onebyfftLen;
00967
00968     /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
00969     pSrc[(2u * i3) + 1u] = s2 * onebyfftLen;
00970   }
00971
00972
00973 #else
00974
00975   /* Run the below code for Cortex-M0 */
00976
00977   /*  Initializations for the first stage */
00978   n2 = fftLen;
00979   n1 = n2;
00980
00981   /*  Calculation of first stage */
00982   for (k = fftLen; k > 4u; k >>= 2u)
00983   {
00984     /*  Initializations for the first stage */
00985     n1 = n2;
00986     n2 >>= 2u;
00987     ia1 = 0u;
00988
00989     /*  Calculation of first stage */
00990     for (j = 0u; j <= (n2 - 1u); j++)
00991     {
00992       /*  index calculation for the coefficients */
00993       ia2 = ia1 + ia1;
00994       ia3 = ia2 + ia1;
00995       co1 = pCoef[ia1 * 2u];
00996       si1 = pCoef[(ia1 * 2u) + 1u];
00997       co2 = pCoef[ia2 * 2u];
00998       si2 = pCoef[(ia2 * 2u) + 1u];
00999       co3 = pCoef[ia3 * 2u];
01000       si3 = pCoef[(ia3 * 2u) + 1u];
01001
01002       /*  Twiddle coefficients index modifier */
01003       ia1 = ia1 + twidCoefModifier;
01004
01005       for (i0 = j; i0 < fftLen; i0 += n1)
01006       {
01007         /*  index calculation for the input as, */
01008         /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
01009         i1 = i0 + n2;
01010         i2 = i1 + n2;
01011         i3 = i2 + n2;
01012
01013         /* xa + xc */
01014         r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
01015
01016         /* xa - xc */
01017         r2 = pSrc[(2u * i0)] - pSrc[(2u * i2)];
01018
01019         /* ya + yc */
01020         s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
01021
01022         /* ya - yc */
01023         s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
01024
01025         /* xb + xd */
01026         t1 = pSrc[2u * i1] + pSrc[2u * i3];
01027
01028         /* xa' = xa + xb + xc + xd */
01029         pSrc[2u * i0] = r1 + t1;
01030
01031         /* xa + xc -(xb + xd) */
01032         r1 = r1 - t1;
01033
01034         /* yb + yd */
01035         t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
01036
01037         /* ya' = ya + yb + yc + yd */
01038         pSrc[(2u * i0) + 1u] = s1 + t2;
01039
01040         /* (ya + yc) - (yb + yd) */
01041         s1 = s1 - t2;
01042
01043         /* (yb - yd) */
01044         t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
01045
01046         /* (xb - xd) */
01047         t2 = pSrc[2u * i1] - pSrc[2u * i3];
01048
01049         /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
01050         pSrc[2u * i1] = (r1 * co2) - (s1 * si2);
01051
01052         /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
01053         pSrc[(2u * i1) + 1u] = (s1 * co2) + (r1 * si2);
01054
01055         /* (xa - xc) - (yb - yd) */
01056         r1 = r2 - t1;
01057
01058         /* (xa - xc) + (yb - yd) */
01059         r2 = r2 + t1;
01060
01061         /* (ya - yc) +  (xb - xd) */
01062         s1 = s2 + t2;
01063
01064         /* (ya - yc) -  (xb - xd) */
01065         s2 = s2 - t2;
01066
01067         /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
01068         pSrc[2u * i2] = (r1 * co1) - (s1 * si1);
01069
01070         /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
01071         pSrc[(2u * i2) + 1u] = (s1 * co1) + (r1 * si1);
01072
01073         /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
01074         pSrc[2u * i3] = (r2 * co3) - (s2 * si3);
01075
01076         /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
01077         pSrc[(2u * i3) + 1u] = (s2 * co3) + (r2 * si3);
01078       }
01079     }
01080     twidCoefModifier <<= 2u;
01081   }
01082   /*  Initializations of last stage */
01083   n1 = n2;
01084   n2 >>= 2u;
01085
01086   /*  Calculations of last stage */
01087   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
01088   {
01089     /*  index calculation for the input as, */
01090     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
01091     i1 = i0 + n2;
01092     i2 = i1 + n2;
01093     i3 = i2 + n2;
01094
01095     /*  Butterfly implementation */
01096     /* xa + xc */
01097     r1 = pSrc[2u * i0] + pSrc[2u * i2];
01098
01099     /* xa - xc */
01100     r2 = pSrc[2u * i0] - pSrc[2u * i2];
01101
01102     /* ya + yc */
01103     s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
01104
01105     /* ya - yc */
01106     s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
01107
01108     /* xc + xd */
01109     t1 = pSrc[2u * i1] + pSrc[2u * i3];
01110
01111     /* xa' = xa + xb + xc + xd */
01112     pSrc[2u * i0] = (r1 + t1) * onebyfftLen;
01113
01114     /* (xa + xb) - (xc + xd) */
01115     r1 = r1 - t1;
01116
01117     /* yb + yd */
01118     t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
01119
01120     /* ya' = ya + yb + yc + yd */
01121     pSrc[(2u * i0) + 1u] = (s1 + t2) * onebyfftLen;
01122
01123     /* (ya + yc) - (yb + yd) */
01124     s1 = s1 - t2;
01125
01126     /* (yb-yd) */
01127     t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
01128
01129     /* (xb-xd) */
01130     t2 = pSrc[2u * i1] - pSrc[2u * i3];
01131
01132     /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
01133     pSrc[2u * i1] = r1 * onebyfftLen;
01134
01135     /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
01136     pSrc[(2u * i1) + 1u] = s1 * onebyfftLen;
01137
01138
01139     /* (xa - xc) - (yb-yd) */
01140     r1 = r2 - t1;
01141
01142     /* (xa - xc) + (yb-yd) */
01143     r2 = r2 + t1;
01144
01145     /* (ya - yc) + (xb-xd) */
01146     s1 = s2 + t2;
01147
01148     /* (ya - yc) - (xb-xd) */
01149     s2 = s2 - t2;
01150
01151     /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
01152     pSrc[2u * i2] = r1 * onebyfftLen;
01153
01154     /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
01155     pSrc[(2u * i2) + 1u] = s1 * onebyfftLen;
01156
01157     /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
01158     pSrc[2u * i3] = r2 * onebyfftLen;
01159
01160     /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
01161     pSrc[(2u * i3) + 1u] = s2 * onebyfftLen;
01162   }
01163
01164 #endif /* #ifndef ARM_MATH_CM0 */
01165
01166 }
01167
01168 /*
01169  * @brief  In-place bit reversal function.
01170  * @param[in, out] *pSrc        points to the in-place buffer of floating-point data type.
01171  * @param[in]      fftSize      length of the FFT.
01172  * @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table.
01173  * @param[in]      *pBitRevTab  points to the bit reversal table.
01174  * @return none.
01175  */
01176
01177 void arm_bitreversal_f32(
01178   float32_t * pSrc,
01179   uint16_t fftSize,
01180   uint16_t bitRevFactor,
01181   uint16_t * pBitRevTab)
01182 {
01183   uint16_t fftLenBy2, fftLenBy2p1;
01184   uint16_t i, j;
01185   float32_t in;
01186
01187   /*  Initializations */
01188   j = 0u;
01189   fftLenBy2 = fftSize >> 1u;
01190   fftLenBy2p1 = (fftSize >> 1u) + 1u;
01191
01192   /* Bit Reversal Implementation */
01193   for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
01194   {
01195     if(i < j)
01196     {
01197       /*  pSrc[i] <-> pSrc[j]; */
01198       in = pSrc[2u * i];
01199       pSrc[2u * i] = pSrc[2u * j];
01200       pSrc[2u * j] = in;
01201
01202       /*  pSrc[i+1u] <-> pSrc[j+1u] */
01203       in = pSrc[(2u * i) + 1u];
01204       pSrc[(2u * i) + 1u] = pSrc[(2u * j) + 1u];
01205       pSrc[(2u * j) + 1u] = in;
01206
01207       /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
01208       in = pSrc[2u * (i + fftLenBy2p1)];
01209       pSrc[2u * (i + fftLenBy2p1)] = pSrc[2u * (j + fftLenBy2p1)];
01210       pSrc[2u * (j + fftLenBy2p1)] = in;
01211
01212       /*  pSrc[i+fftLenBy2p1+1u] <-> pSrc[j+fftLenBy2p1+1u] */
01213       in = pSrc[(2u * (i + fftLenBy2p1)) + 1u];
01214       pSrc[(2u * (i + fftLenBy2p1)) + 1u] =
01215         pSrc[(2u * (j + fftLenBy2p1)) + 1u];
01216       pSrc[(2u * (j + fftLenBy2p1)) + 1u] = in;
01217
01218     }
01219
01220     /*  pSrc[i+1u] <-> pSrc[j+1u] */
01221     in = pSrc[2u * (i + 1u)];
01222     pSrc[2u * (i + 1u)] = pSrc[2u * (j + fftLenBy2)];
01223     pSrc[2u * (j + fftLenBy2)] = in;
01224
01225     /*  pSrc[i+2u] <-> pSrc[j+2u] */
01226     in = pSrc[(2u * (i + 1u)) + 1u];
01227     pSrc[(2u * (i + 1u)) + 1u] = pSrc[(2u * (j + fftLenBy2)) + 1u];
01228     pSrc[(2u * (j + fftLenBy2)) + 1u] = in;
01229
01230     /*  Reading the index for the bit reversal */
01231     j = *pBitRevTab;
01232
01233     /*  Updating the bit reversal index depending on the fft length  */
01234     pBitRevTab += bitRevFactor;
01235   }
01236 }
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CMSIS DSP Software Library: arm_cfft_radix4_init_f32.c File Reference

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arm_cfft_radix4_init_f32.c File Reference

#include "arm_math.h"
#include "arm_common_tables.h"

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Functions

arm_status | arm_cfft_radix4_init_f32 (arm_cfft_radix4_instance_f32 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)

Variables

static const float32_t | twiddleCoef [2048]
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
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CMSIS DSP Software Library: arm_cfft_radix4_init_q15.c File Reference

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arm_cfft_radix4_init_q15.c File Reference

#include "arm_math.h"
#include "arm_common_tables.h"

Go to the source code of this file.

Functions

arm_status | arm_cfft_radix4_init_q15 (arm_cfft_radix4_instance_q15 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)

Variables

static const q15_t | twiddleCoefQ15 [2048]
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CMSIS DSP Software Library: arm_cfft_radix4_init_q15.c Source File

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arm_cfft_radix4_init_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cfft_radix4_init_q15.c
00009 *
00010 * Description:  Radix-4 Decimation in Frequency Q15 FFT & IFFT initialization function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037 #include "arm_common_tables.h"
00038
00049 /*
00050 * @brief  Twiddle factors Table
00051 */
00052
00072 static const q15_t twiddleCoefQ15[2048] = {
00073   0x7fff, 0x0, 0x7fff, 0xc9, 0x7ffe, 0x192, 0x7ffa, 0x25b,
00074   0x7ff6, 0x324, 0x7ff1, 0x3ed, 0x7fea, 0x4b6, 0x7fe2, 0x57f,
00075   0x7fd9, 0x648, 0x7fce, 0x711, 0x7fc2, 0x7d9, 0x7fb5, 0x8a2,
00076   0x7fa7, 0x96b, 0x7f98, 0xa33, 0x7f87, 0xafb, 0x7f75, 0xbc4,
00077   0x7f62, 0xc8c, 0x7f4e, 0xd54, 0x7f38, 0xe1c, 0x7f22, 0xee4,
00078   0x7f0a, 0xfab, 0x7ef0, 0x1073, 0x7ed6, 0x113a, 0x7eba, 0x1201,
00079   0x7e9d, 0x12c8, 0x7e7f, 0x138f, 0x7e60, 0x1455, 0x7e3f, 0x151c,
00080   0x7e1e, 0x15e2, 0x7dfb, 0x16a8, 0x7dd6, 0x176e, 0x7db1, 0x1833,
00081   0x7d8a, 0x18f9, 0x7d63, 0x19be, 0x7d3a, 0x1a83, 0x7d0f, 0x1b47,
00082   0x7ce4, 0x1c0c, 0x7cb7, 0x1cd0, 0x7c89, 0x1d93, 0x7c5a, 0x1e57,
00083   0x7c2a, 0x1f1a, 0x7bf9, 0x1fdd, 0x7bc6, 0x209f, 0x7b92, 0x2162,
00084   0x7b5d, 0x2224, 0x7b27, 0x22e5, 0x7aef, 0x23a7, 0x7ab7, 0x2467,
00085   0x7a7d, 0x2528, 0x7a42, 0x25e8, 0x7a06, 0x26a8, 0x79c9, 0x2768,
00086   0x798a, 0x2827, 0x794a, 0x28e5, 0x790a, 0x29a4, 0x78c8, 0x2a62,
00087   0x7885, 0x2b1f, 0x7840, 0x2bdc, 0x77fb, 0x2c99, 0x77b4, 0x2d55,
00088   0x776c, 0x2e11, 0x7723, 0x2ecc, 0x76d9, 0x2f87, 0x768e, 0x3042,
00089   0x7642, 0x30fc, 0x75f4, 0x31b5, 0x75a6, 0x326e, 0x7556, 0x3327,
00090   0x7505, 0x33df, 0x74b3, 0x3497, 0x7460, 0x354e, 0x740b, 0x3604,
00091   0x73b6, 0x36ba, 0x735f, 0x3770, 0x7308, 0x3825, 0x72af, 0x38d9,
00092   0x7255, 0x398d, 0x71fa, 0x3a40, 0x719e, 0x3af3, 0x7141, 0x3ba5,
00093   0x70e3, 0x3c57, 0x7083, 0x3d08, 0x7023, 0x3db8, 0x6fc2, 0x3e68,
00094   0x6f5f, 0x3f17, 0x6efb, 0x3fc6, 0x6e97, 0x4074, 0x6e31, 0x4121,
00095   0x6dca, 0x41ce, 0x6d62, 0x427a, 0x6cf9, 0x4326, 0x6c8f, 0x43d1,
00096   0x6c24, 0x447b, 0x6bb8, 0x4524, 0x6b4b, 0x45cd, 0x6add, 0x4675,
00097   0x6a6e, 0x471d, 0x69fd, 0x47c4, 0x698c, 0x486a, 0x691a, 0x490f,
00098   0x68a7, 0x49b4, 0x6832, 0x4a58, 0x67bd, 0x4afb, 0x6747, 0x4b9e,
00099   0x66d0, 0x4c40, 0x6657, 0x4ce1, 0x65de, 0x4d81, 0x6564, 0x4e21,
00100   0x64e9, 0x4ec0, 0x646c, 0x4f5e, 0x63ef, 0x4ffb, 0x6371, 0x5098,
00101   0x62f2, 0x5134, 0x6272, 0x51cf, 0x61f1, 0x5269, 0x616f, 0x5303,
00102   0x60ec, 0x539b, 0x6068, 0x5433, 0x5fe4, 0x54ca, 0x5f5e, 0x5560,
00103   0x5ed7, 0x55f6, 0x5e50, 0x568a, 0x5dc8, 0x571e, 0x5d3e, 0x57b1,
00104   0x5cb4, 0x5843, 0x5c29, 0x58d4, 0x5b9d, 0x5964, 0x5b10, 0x59f4,
00105   0x5a82, 0x5a82, 0x59f4, 0x5b10, 0x5964, 0x5b9d, 0x58d4, 0x5c29,
00106   0x5843, 0x5cb4, 0x57b1, 0x5d3e, 0x571e, 0x5dc8, 0x568a, 0x5e50,
00107   0x55f6, 0x5ed7, 0x5560, 0x5f5e, 0x54ca, 0x5fe4, 0x5433, 0x6068,
00108   0x539b, 0x60ec, 0x5303, 0x616f, 0x5269, 0x61f1, 0x51cf, 0x6272,
00109   0x5134, 0x62f2, 0x5098, 0x6371, 0x4ffb, 0x63ef, 0x4f5e, 0x646c,
00110   0x4ec0, 0x64e9, 0x4e21, 0x6564, 0x4d81, 0x65de, 0x4ce1, 0x6657,
00111   0x4c40, 0x66d0, 0x4b9e, 0x6747, 0x4afb, 0x67bd, 0x4a58, 0x6832,
00112   0x49b4, 0x68a7, 0x490f, 0x691a, 0x486a, 0x698c, 0x47c4, 0x69fd,
00113   0x471d, 0x6a6e, 0x4675, 0x6add, 0x45cd, 0x6b4b, 0x4524, 0x6bb8,
00114   0x447b, 0x6c24, 0x43d1, 0x6c8f, 0x4326, 0x6cf9, 0x427a, 0x6d62,
00115   0x41ce, 0x6dca, 0x4121, 0x6e31, 0x4074, 0x6e97, 0x3fc6, 0x6efb,
00116   0x3f17, 0x6f5f, 0x3e68, 0x6fc2, 0x3db8, 0x7023, 0x3d08, 0x7083,
00117   0x3c57, 0x70e3, 0x3ba5, 0x7141, 0x3af3, 0x719e, 0x3a40, 0x71fa,
00118   0x398d, 0x7255, 0x38d9, 0x72af, 0x3825, 0x7308, 0x3770, 0x735f,
00119   0x36ba, 0x73b6, 0x3604, 0x740b, 0x354e, 0x7460, 0x3497, 0x74b3,
00120   0x33df, 0x7505, 0x3327, 0x7556, 0x326e, 0x75a6, 0x31b5, 0x75f4,
00121   0x30fc, 0x7642, 0x3042, 0x768e, 0x2f87, 0x76d9, 0x2ecc, 0x7723,
00122   0x2e11, 0x776c, 0x2d55, 0x77b4, 0x2c99, 0x77fb, 0x2bdc, 0x7840,
00123   0x2b1f, 0x7885, 0x2a62, 0x78c8, 0x29a4, 0x790a, 0x28e5, 0x794a,
00124   0x2827, 0x798a, 0x2768, 0x79c9, 0x26a8, 0x7a06, 0x25e8, 0x7a42,
00125   0x2528, 0x7a7d, 0x2467, 0x7ab7, 0x23a7, 0x7aef, 0x22e5, 0x7b27,
00126   0x2224, 0x7b5d, 0x2162, 0x7b92, 0x209f, 0x7bc6, 0x1fdd, 0x7bf9,
00127   0x1f1a, 0x7c2a, 0x1e57, 0x7c5a, 0x1d93, 0x7c89, 0x1cd0, 0x7cb7,
00128   0x1c0c, 0x7ce4, 0x1b47, 0x7d0f, 0x1a83, 0x7d3a, 0x19be, 0x7d63,
00129   0x18f9, 0x7d8a, 0x1833, 0x7db1, 0x176e, 0x7dd6, 0x16a8, 0x7dfb,
00130   0x15e2, 0x7e1e, 0x151c, 0x7e3f, 0x1455, 0x7e60, 0x138f, 0x7e7f,
00131   0x12c8, 0x7e9d, 0x1201, 0x7eba, 0x113a, 0x7ed6, 0x1073, 0x7ef0,
00132   0xfab, 0x7f0a, 0xee4, 0x7f22, 0xe1c, 0x7f38, 0xd54, 0x7f4e,
00133   0xc8c, 0x7f62, 0xbc4, 0x7f75, 0xafb, 0x7f87, 0xa33, 0x7f98,
00134   0x96b, 0x7fa7, 0x8a2, 0x7fb5, 0x7d9, 0x7fc2, 0x711, 0x7fce,
00135   0x648, 0x7fd9, 0x57f, 0x7fe2, 0x4b6, 0x7fea, 0x3ed, 0x7ff1,
00136   0x324, 0x7ff6, 0x25b, 0x7ffa, 0x192, 0x7ffe, 0xc9, 0x7fff,
00137   0x0, 0x7fff, 0xff37, 0x7fff, 0xfe6e, 0x7ffe, 0xfda5, 0x7ffa,
00138   0xfcdc, 0x7ff6, 0xfc13, 0x7ff1, 0xfb4a, 0x7fea, 0xfa81, 0x7fe2,
00139   0xf9b8, 0x7fd9, 0xf8ef, 0x7fce, 0xf827, 0x7fc2, 0xf75e, 0x7fb5,
00140   0xf695, 0x7fa7, 0xf5cd, 0x7f98, 0xf505, 0x7f87, 0xf43c, 0x7f75,
00141   0xf374, 0x7f62, 0xf2ac, 0x7f4e, 0xf1e4, 0x7f38, 0xf11c, 0x7f22,
00142   0xf055, 0x7f0a, 0xef8d, 0x7ef0, 0xeec6, 0x7ed6, 0xedff, 0x7eba,
00143   0xed38, 0x7e9d, 0xec71, 0x7e7f, 0xebab, 0x7e60, 0xeae4, 0x7e3f,
00144   0xea1e, 0x7e1e, 0xe958, 0x7dfb, 0xe892, 0x7dd6, 0xe7cd, 0x7db1,
00145   0xe707, 0x7d8a, 0xe642, 0x7d63, 0xe57d, 0x7d3a, 0xe4b9, 0x7d0f,
00146   0xe3f4, 0x7ce4, 0xe330, 0x7cb7, 0xe26d, 0x7c89, 0xe1a9, 0x7c5a,
00147   0xe0e6, 0x7c2a, 0xe023, 0x7bf9, 0xdf61, 0x7bc6, 0xde9e, 0x7b92,
00148   0xdddc, 0x7b5d, 0xdd1b, 0x7b27, 0xdc59, 0x7aef, 0xdb99, 0x7ab7,
00149   0xdad8, 0x7a7d, 0xda18, 0x7a42, 0xd958, 0x7a06, 0xd898, 0x79c9,
00150   0xd7d9, 0x798a, 0xd71b, 0x794a, 0xd65c, 0x790a, 0xd59e, 0x78c8,
00151   0xd4e1, 0x7885, 0xd424, 0x7840, 0xd367, 0x77fb, 0xd2ab, 0x77b4,
00152   0xd1ef, 0x776c, 0xd134, 0x7723, 0xd079, 0x76d9, 0xcfbe, 0x768e,
00153   0xcf04, 0x7642, 0xce4b, 0x75f4, 0xcd92, 0x75a6, 0xccd9, 0x7556,
00154   0xcc21, 0x7505, 0xcb69, 0x74b3, 0xcab2, 0x7460, 0xc9fc, 0x740b,
00155   0xc946, 0x73b6, 0xc890, 0x735f, 0xc7db, 0x7308, 0xc727, 0x72af,
00156   0xc673, 0x7255, 0xc5c0, 0x71fa, 0xc50d, 0x719e, 0xc45b, 0x7141,
00157   0xc3a9, 0x70e3, 0xc2f8, 0x7083, 0xc248, 0x7023, 0xc198, 0x6fc2,
00158   0xc0e9, 0x6f5f, 0xc03a, 0x6efb, 0xbf8c, 0x6e97, 0xbedf, 0x6e31,
00159   0xbe32, 0x6dca, 0xbd86, 0x6d62, 0xbcda, 0x6cf9, 0xbc2f, 0x6c8f,
00160   0xbb85, 0x6c24, 0xbadc, 0x6bb8, 0xba33, 0x6b4b, 0xb98b, 0x6add,
00161   0xb8e3, 0x6a6e, 0xb83c, 0x69fd, 0xb796, 0x698c, 0xb6f1, 0x691a,
00162   0xb64c, 0x68a7, 0xb5a8, 0x6832, 0xb505, 0x67bd, 0xb462, 0x6747,
00163   0xb3c0, 0x66d0, 0xb31f, 0x6657, 0xb27f, 0x65de, 0xb1df, 0x6564,
00164   0xb140, 0x64e9, 0xb0a2, 0x646c, 0xb005, 0x63ef, 0xaf68, 0x6371,
00165   0xaecc, 0x62f2, 0xae31, 0x6272, 0xad97, 0x61f1, 0xacfd, 0x616f,
00166   0xac65, 0x60ec, 0xabcd, 0x6068, 0xab36, 0x5fe4, 0xaaa0, 0x5f5e,
00167   0xaa0a, 0x5ed7, 0xa976, 0x5e50, 0xa8e2, 0x5dc8, 0xa84f, 0x5d3e,
00168   0xa7bd, 0x5cb4, 0xa72c, 0x5c29, 0xa69c, 0x5b9d, 0xa60c, 0x5b10,
00169   0xa57e, 0x5a82, 0xa4f0, 0x59f4, 0xa463, 0x5964, 0xa3d7, 0x58d4,
00170   0xa34c, 0x5843, 0xa2c2, 0x57b1, 0xa238, 0x571e, 0xa1b0, 0x568a,
00171   0xa129, 0x55f6, 0xa0a2, 0x5560, 0xa01c, 0x54ca, 0x9f98, 0x5433,
00172   0x9f14, 0x539b, 0x9e91, 0x5303, 0x9e0f, 0x5269, 0x9d8e, 0x51cf,
00173   0x9d0e, 0x5134, 0x9c8f, 0x5098, 0x9c11, 0x4ffb, 0x9b94, 0x4f5e,
00174   0x9b17, 0x4ec0, 0x9a9c, 0x4e21, 0x9a22, 0x4d81, 0x99a9, 0x4ce1,
00175   0x9930, 0x4c40, 0x98b9, 0x4b9e, 0x9843, 0x4afb, 0x97ce, 0x4a58,
00176   0x9759, 0x49b4, 0x96e6, 0x490f, 0x9674, 0x486a, 0x9603, 0x47c4,
00177   0x9592, 0x471d, 0x9523, 0x4675, 0x94b5, 0x45cd, 0x9448, 0x4524,
00178   0x93dc, 0x447b, 0x9371, 0x43d1, 0x9307, 0x4326, 0x929e, 0x427a,
00179   0x9236, 0x41ce, 0x91cf, 0x4121, 0x9169, 0x4074, 0x9105, 0x3fc6,
00180   0x90a1, 0x3f17, 0x903e, 0x3e68, 0x8fdd, 0x3db8, 0x8f7d, 0x3d08,
00181   0x8f1d, 0x3c57, 0x8ebf, 0x3ba5, 0x8e62, 0x3af3, 0x8e06, 0x3a40,
00182   0x8dab, 0x398d, 0x8d51, 0x38d9, 0x8cf8, 0x3825, 0x8ca1, 0x3770,
00183   0x8c4a, 0x36ba, 0x8bf5, 0x3604, 0x8ba0, 0x354e, 0x8b4d, 0x3497,
00184   0x8afb, 0x33df, 0x8aaa, 0x3327, 0x8a5a, 0x326e, 0x8a0c, 0x31b5,
00185   0x89be, 0x30fc, 0x8972, 0x3042, 0x8927, 0x2f87, 0x88dd, 0x2ecc,
00186   0x8894, 0x2e11, 0x884c, 0x2d55, 0x8805, 0x2c99, 0x87c0, 0x2bdc,
00187   0x877b, 0x2b1f, 0x8738, 0x2a62, 0x86f6, 0x29a4, 0x86b6, 0x28e5,
00188   0x8676, 0x2827, 0x8637, 0x2768, 0x85fa, 0x26a8, 0x85be, 0x25e8,
00189   0x8583, 0x2528, 0x8549, 0x2467, 0x8511, 0x23a7, 0x84d9, 0x22e5,
00190   0x84a3, 0x2224, 0x846e, 0x2162, 0x843a, 0x209f, 0x8407, 0x1fdd,
00191   0x83d6, 0x1f1a, 0x83a6, 0x1e57, 0x8377, 0x1d93, 0x8349, 0x1cd0,
00192   0x831c, 0x1c0c, 0x82f1, 0x1b47, 0x82c6, 0x1a83, 0x829d, 0x19be,
00193   0x8276, 0x18f9, 0x824f, 0x1833, 0x822a, 0x176e, 0x8205, 0x16a8,
00194   0x81e2, 0x15e2, 0x81c1, 0x151c, 0x81a0, 0x1455, 0x8181, 0x138f,
00195   0x8163, 0x12c8, 0x8146, 0x1201, 0x812a, 0x113a, 0x8110, 0x1073,
00196   0x80f6, 0xfab, 0x80de, 0xee4, 0x80c8, 0xe1c, 0x80b2, 0xd54,
00197   0x809e, 0xc8c, 0x808b, 0xbc4, 0x8079, 0xafb, 0x8068, 0xa33,
00198   0x8059, 0x96b, 0x804b, 0x8a2, 0x803e, 0x7d9, 0x8032, 0x711,
00199   0x8027, 0x648, 0x801e, 0x57f, 0x8016, 0x4b6, 0x800f, 0x3ed,
00200   0x800a, 0x324, 0x8006, 0x25b, 0x8002, 0x192, 0x8001, 0xc9,
00201   0x8000, 0x0, 0x8001, 0xff37, 0x8002, 0xfe6e, 0x8006, 0xfda5,
00202   0x800a, 0xfcdc, 0x800f, 0xfc13, 0x8016, 0xfb4a, 0x801e, 0xfa81,
00203   0x8027, 0xf9b8, 0x8032, 0xf8ef, 0x803e, 0xf827, 0x804b, 0xf75e,
00204   0x8059, 0xf695, 0x8068, 0xf5cd, 0x8079, 0xf505, 0x808b, 0xf43c,
00205   0x809e, 0xf374, 0x80b2, 0xf2ac, 0x80c8, 0xf1e4, 0x80de, 0xf11c,
00206   0x80f6, 0xf055, 0x8110, 0xef8d, 0x812a, 0xeec6, 0x8146, 0xedff,
00207   0x8163, 0xed38, 0x8181, 0xec71, 0x81a0, 0xebab, 0x81c1, 0xeae4,
00208   0x81e2, 0xea1e, 0x8205, 0xe958, 0x822a, 0xe892, 0x824f, 0xe7cd,
00209   0x8276, 0xe707, 0x829d, 0xe642, 0x82c6, 0xe57d, 0x82f1, 0xe4b9,
00210   0x831c, 0xe3f4, 0x8349, 0xe330, 0x8377, 0xe26d, 0x83a6, 0xe1a9,
00211   0x83d6, 0xe0e6, 0x8407, 0xe023, 0x843a, 0xdf61, 0x846e, 0xde9e,
00212   0x84a3, 0xdddc, 0x84d9, 0xdd1b, 0x8511, 0xdc59, 0x8549, 0xdb99,
00213   0x8583, 0xdad8, 0x85be, 0xda18, 0x85fa, 0xd958, 0x8637, 0xd898,
00214   0x8676, 0xd7d9, 0x86b6, 0xd71b, 0x86f6, 0xd65c, 0x8738, 0xd59e,
00215   0x877b, 0xd4e1, 0x87c0, 0xd424, 0x8805, 0xd367, 0x884c, 0xd2ab,
00216   0x8894, 0xd1ef, 0x88dd, 0xd134, 0x8927, 0xd079, 0x8972, 0xcfbe,
00217   0x89be, 0xcf04, 0x8a0c, 0xce4b, 0x8a5a, 0xcd92, 0x8aaa, 0xccd9,
00218   0x8afb, 0xcc21, 0x8b4d, 0xcb69, 0x8ba0, 0xcab2, 0x8bf5, 0xc9fc,
00219   0x8c4a, 0xc946, 0x8ca1, 0xc890, 0x8cf8, 0xc7db, 0x8d51, 0xc727,
00220   0x8dab, 0xc673, 0x8e06, 0xc5c0, 0x8e62, 0xc50d, 0x8ebf, 0xc45b,
00221   0x8f1d, 0xc3a9, 0x8f7d, 0xc2f8, 0x8fdd, 0xc248, 0x903e, 0xc198,
00222   0x90a1, 0xc0e9, 0x9105, 0xc03a, 0x9169, 0xbf8c, 0x91cf, 0xbedf,
00223   0x9236, 0xbe32, 0x929e, 0xbd86, 0x9307, 0xbcda, 0x9371, 0xbc2f,
00224   0x93dc, 0xbb85, 0x9448, 0xbadc, 0x94b5, 0xba33, 0x9523, 0xb98b,
00225   0x9592, 0xb8e3, 0x9603, 0xb83c, 0x9674, 0xb796, 0x96e6, 0xb6f1,
00226   0x9759, 0xb64c, 0x97ce, 0xb5a8, 0x9843, 0xb505, 0x98b9, 0xb462,
00227   0x9930, 0xb3c0, 0x99a9, 0xb31f, 0x9a22, 0xb27f, 0x9a9c, 0xb1df,
00228   0x9b17, 0xb140, 0x9b94, 0xb0a2, 0x9c11, 0xb005, 0x9c8f, 0xaf68,
00229   0x9d0e, 0xaecc, 0x9d8e, 0xae31, 0x9e0f, 0xad97, 0x9e91, 0xacfd,
00230   0x9f14, 0xac65, 0x9f98, 0xabcd, 0xa01c, 0xab36, 0xa0a2, 0xaaa0,
00231   0xa129, 0xaa0a, 0xa1b0, 0xa976, 0xa238, 0xa8e2, 0xa2c2, 0xa84f,
00232   0xa34c, 0xa7bd, 0xa3d7, 0xa72c, 0xa463, 0xa69c, 0xa4f0, 0xa60c,
00233   0xa57e, 0xa57e, 0xa60c, 0xa4f0, 0xa69c, 0xa463, 0xa72c, 0xa3d7,
00234   0xa7bd, 0xa34c, 0xa84f, 0xa2c2, 0xa8e2, 0xa238, 0xa976, 0xa1b0,
00235   0xaa0a, 0xa129, 0xaaa0, 0xa0a2, 0xab36, 0xa01c, 0xabcd, 0x9f98,
00236   0xac65, 0x9f14, 0xacfd, 0x9e91, 0xad97, 0x9e0f, 0xae31, 0x9d8e,
00237   0xaecc, 0x9d0e, 0xaf68, 0x9c8f, 0xb005, 0x9c11, 0xb0a2, 0x9b94,
00238   0xb140, 0x9b17, 0xb1df, 0x9a9c, 0xb27f, 0x9a22, 0xb31f, 0x99a9,
00239   0xb3c0, 0x9930, 0xb462, 0x98b9, 0xb505, 0x9843, 0xb5a8, 0x97ce,
00240   0xb64c, 0x9759, 0xb6f1, 0x96e6, 0xb796, 0x9674, 0xb83c, 0x9603,
00241   0xb8e3, 0x9592, 0xb98b, 0x9523, 0xba33, 0x94b5, 0xbadc, 0x9448,
00242   0xbb85, 0x93dc, 0xbc2f, 0x9371, 0xbcda, 0x9307, 0xbd86, 0x929e,
00243   0xbe32, 0x9236, 0xbedf, 0x91cf, 0xbf8c, 0x9169, 0xc03a, 0x9105,
00244   0xc0e9, 0x90a1, 0xc198, 0x903e, 0xc248, 0x8fdd, 0xc2f8, 0x8f7d,
00245   0xc3a9, 0x8f1d, 0xc45b, 0x8ebf, 0xc50d, 0x8e62, 0xc5c0, 0x8e06,
00246   0xc673, 0x8dab, 0xc727, 0x8d51, 0xc7db, 0x8cf8, 0xc890, 0x8ca1,
00247   0xc946, 0x8c4a, 0xc9fc, 0x8bf5, 0xcab2, 0x8ba0, 0xcb69, 0x8b4d,
00248   0xcc21, 0x8afb, 0xccd9, 0x8aaa, 0xcd92, 0x8a5a, 0xce4b, 0x8a0c,
00249   0xcf04, 0x89be, 0xcfbe, 0x8972, 0xd079, 0x8927, 0xd134, 0x88dd,
00250   0xd1ef, 0x8894, 0xd2ab, 0x884c, 0xd367, 0x8805, 0xd424, 0x87c0,
00251   0xd4e1, 0x877b, 0xd59e, 0x8738, 0xd65c, 0x86f6, 0xd71b, 0x86b6,
00252   0xd7d9, 0x8676, 0xd898, 0x8637, 0xd958, 0x85fa, 0xda18, 0x85be,
00253   0xdad8, 0x8583, 0xdb99, 0x8549, 0xdc59, 0x8511, 0xdd1b, 0x84d9,
00254   0xdddc, 0x84a3, 0xde9e, 0x846e, 0xdf61, 0x843a, 0xe023, 0x8407,
00255   0xe0e6, 0x83d6, 0xe1a9, 0x83a6, 0xe26d, 0x8377, 0xe330, 0x8349,
00256   0xe3f4, 0x831c, 0xe4b9, 0x82f1, 0xe57d, 0x82c6, 0xe642, 0x829d,
00257   0xe707, 0x8276, 0xe7cd, 0x824f, 0xe892, 0x822a, 0xe958, 0x8205,
00258   0xea1e, 0x81e2, 0xeae4, 0x81c1, 0xebab, 0x81a0, 0xec71, 0x8181,
00259   0xed38, 0x8163, 0xedff, 0x8146, 0xeec6, 0x812a, 0xef8d, 0x8110,
00260   0xf055, 0x80f6, 0xf11c, 0x80de, 0xf1e4, 0x80c8, 0xf2ac, 0x80b2,
00261   0xf374, 0x809e, 0xf43c, 0x808b, 0xf505, 0x8079, 0xf5cd, 0x8068,
00262   0xf695, 0x8059, 0xf75e, 0x804b, 0xf827, 0x803e, 0xf8ef, 0x8032,
00263   0xf9b8, 0x8027, 0xfa81, 0x801e, 0xfb4a, 0x8016, 0xfc13, 0x800f,
00264   0xfcdc, 0x800a, 0xfda5, 0x8006, 0xfe6e, 0x8002, 0xff37, 0x8001,
00265   0x0, 0x8000, 0xc9, 0x8001, 0x192, 0x8002, 0x25b, 0x8006,
00266   0x324, 0x800a, 0x3ed, 0x800f, 0x4b6, 0x8016, 0x57f, 0x801e,
00267   0x648, 0x8027, 0x711, 0x8032, 0x7d9, 0x803e, 0x8a2, 0x804b,
00268   0x96b, 0x8059, 0xa33, 0x8068, 0xafb, 0x8079, 0xbc4, 0x808b,
00269   0xc8c, 0x809e, 0xd54, 0x80b2, 0xe1c, 0x80c8, 0xee4, 0x80de,
00270   0xfab, 0x80f6, 0x1073, 0x8110, 0x113a, 0x812a, 0x1201, 0x8146,
00271   0x12c8, 0x8163, 0x138f, 0x8181, 0x1455, 0x81a0, 0x151c, 0x81c1,
00272   0x15e2, 0x81e2, 0x16a8, 0x8205, 0x176e, 0x822a, 0x1833, 0x824f,
00273   0x18f9, 0x8276, 0x19be, 0x829d, 0x1a83, 0x82c6, 0x1b47, 0x82f1,
00274   0x1c0c, 0x831c, 0x1cd0, 0x8349, 0x1d93, 0x8377, 0x1e57, 0x83a6,
00275   0x1f1a, 0x83d6, 0x1fdd, 0x8407, 0x209f, 0x843a, 0x2162, 0x846e,
00276   0x2224, 0x84a3, 0x22e5, 0x84d9, 0x23a7, 0x8511, 0x2467, 0x8549,
00277   0x2528, 0x8583, 0x25e8, 0x85be, 0x26a8, 0x85fa, 0x2768, 0x8637,
00278   0x2827, 0x8676, 0x28e5, 0x86b6, 0x29a4, 0x86f6, 0x2a62, 0x8738,
00279   0x2b1f, 0x877b, 0x2bdc, 0x87c0, 0x2c99, 0x8805, 0x2d55, 0x884c,
00280   0x2e11, 0x8894, 0x2ecc, 0x88dd, 0x2f87, 0x8927, 0x3042, 0x8972,
00281   0x30fc, 0x89be, 0x31b5, 0x8a0c, 0x326e, 0x8a5a, 0x3327, 0x8aaa,
00282   0x33df, 0x8afb, 0x3497, 0x8b4d, 0x354e, 0x8ba0, 0x3604, 0x8bf5,
00283   0x36ba, 0x8c4a, 0x3770, 0x8ca1, 0x3825, 0x8cf8, 0x38d9, 0x8d51,
00284   0x398d, 0x8dab, 0x3a40, 0x8e06, 0x3af3, 0x8e62, 0x3ba5, 0x8ebf,
00285   0x3c57, 0x8f1d, 0x3d08, 0x8f7d, 0x3db8, 0x8fdd, 0x3e68, 0x903e,
00286   0x3f17, 0x90a1, 0x3fc6, 0x9105, 0x4074, 0x9169, 0x4121, 0x91cf,
00287   0x41ce, 0x9236, 0x427a, 0x929e, 0x4326, 0x9307, 0x43d1, 0x9371,
00288   0x447b, 0x93dc, 0x4524, 0x9448, 0x45cd, 0x94b5, 0x4675, 0x9523,
00289   0x471d, 0x9592, 0x47c4, 0x9603, 0x486a, 0x9674, 0x490f, 0x96e6,
00290   0x49b4, 0x9759, 0x4a58, 0x97ce, 0x4afb, 0x9843, 0x4b9e, 0x98b9,
00291   0x4c40, 0x9930, 0x4ce1, 0x99a9, 0x4d81, 0x9a22, 0x4e21, 0x9a9c,
00292   0x4ec0, 0x9b17, 0x4f5e, 0x9b94, 0x4ffb, 0x9c11, 0x5098, 0x9c8f,
00293   0x5134, 0x9d0e, 0x51cf, 0x9d8e, 0x5269, 0x9e0f, 0x5303, 0x9e91,
00294   0x539b, 0x9f14, 0x5433, 0x9f98, 0x54ca, 0xa01c, 0x5560, 0xa0a2,
00295   0x55f6, 0xa129, 0x568a, 0xa1b0, 0x571e, 0xa238, 0x57b1, 0xa2c2,
00296   0x5843, 0xa34c, 0x58d4, 0xa3d7, 0x5964, 0xa463, 0x59f4, 0xa4f0,
00297   0x5a82, 0xa57e, 0x5b10, 0xa60c, 0x5b9d, 0xa69c, 0x5c29, 0xa72c,
00298   0x5cb4, 0xa7bd, 0x5d3e, 0xa84f, 0x5dc8, 0xa8e2, 0x5e50, 0xa976,
00299   0x5ed7, 0xaa0a, 0x5f5e, 0xaaa0, 0x5fe4, 0xab36, 0x6068, 0xabcd,
00300   0x60ec, 0xac65, 0x616f, 0xacfd, 0x61f1, 0xad97, 0x6272, 0xae31,
00301   0x62f2, 0xaecc, 0x6371, 0xaf68, 0x63ef, 0xb005, 0x646c, 0xb0a2,
00302   0x64e9, 0xb140, 0x6564, 0xb1df, 0x65de, 0xb27f, 0x6657, 0xb31f,
00303   0x66d0, 0xb3c0, 0x6747, 0xb462, 0x67bd, 0xb505, 0x6832, 0xb5a8,
00304   0x68a7, 0xb64c, 0x691a, 0xb6f1, 0x698c, 0xb796, 0x69fd, 0xb83c,
00305   0x6a6e, 0xb8e3, 0x6add, 0xb98b, 0x6b4b, 0xba33, 0x6bb8, 0xbadc,
00306   0x6c24, 0xbb85, 0x6c8f, 0xbc2f, 0x6cf9, 0xbcda, 0x6d62, 0xbd86,
00307   0x6dca, 0xbe32, 0x6e31, 0xbedf, 0x6e97, 0xbf8c, 0x6efb, 0xc03a,
00308   0x6f5f, 0xc0e9, 0x6fc2, 0xc198, 0x7023, 0xc248, 0x7083, 0xc2f8,
00309   0x70e3, 0xc3a9, 0x7141, 0xc45b, 0x719e, 0xc50d, 0x71fa, 0xc5c0,
00310   0x7255, 0xc673, 0x72af, 0xc727, 0x7308, 0xc7db, 0x735f, 0xc890,
00311   0x73b6, 0xc946, 0x740b, 0xc9fc, 0x7460, 0xcab2, 0x74b3, 0xcb69,
00312   0x7505, 0xcc21, 0x7556, 0xccd9, 0x75a6, 0xcd92, 0x75f4, 0xce4b,
00313   0x7642, 0xcf04, 0x768e, 0xcfbe, 0x76d9, 0xd079, 0x7723, 0xd134,
00314   0x776c, 0xd1ef, 0x77b4, 0xd2ab, 0x77fb, 0xd367, 0x7840, 0xd424,
00315   0x7885, 0xd4e1, 0x78c8, 0xd59e, 0x790a, 0xd65c, 0x794a, 0xd71b,
00316   0x798a, 0xd7d9, 0x79c9, 0xd898, 0x7a06, 0xd958, 0x7a42, 0xda18,
00317   0x7a7d, 0xdad8, 0x7ab7, 0xdb99, 0x7aef, 0xdc59, 0x7b27, 0xdd1b,
00318   0x7b5d, 0xdddc, 0x7b92, 0xde9e, 0x7bc6, 0xdf61, 0x7bf9, 0xe023,
00319   0x7c2a, 0xe0e6, 0x7c5a, 0xe1a9, 0x7c89, 0xe26d, 0x7cb7, 0xe330,
00320   0x7ce4, 0xe3f4, 0x7d0f, 0xe4b9, 0x7d3a, 0xe57d, 0x7d63, 0xe642,
00321   0x7d8a, 0xe707, 0x7db1, 0xe7cd, 0x7dd6, 0xe892, 0x7dfb, 0xe958,
00322   0x7e1e, 0xea1e, 0x7e3f, 0xeae4, 0x7e60, 0xebab, 0x7e7f, 0xec71,
00323   0x7e9d, 0xed38, 0x7eba, 0xedff, 0x7ed6, 0xeec6, 0x7ef0, 0xef8d,
00324   0x7f0a, 0xf055, 0x7f22, 0xf11c, 0x7f38, 0xf1e4, 0x7f4e, 0xf2ac,
00325   0x7f62, 0xf374, 0x7f75, 0xf43c, 0x7f87, 0xf505, 0x7f98, 0xf5cd,
00326   0x7fa7, 0xf695, 0x7fb5, 0xf75e, 0x7fc2, 0xf827, 0x7fce, 0xf8ef,
00327   0x7fd9, 0xf9b8, 0x7fe2, 0xfa81, 0x7fea, 0xfb4a, 0x7ff1, 0xfc13,
00328   0x7ff6, 0xfcdc, 0x7ffa, 0xfda5, 0x7ffe, 0xfe6e, 0x7fff, 0xff37
00329 };
00330
00331
00353 arm_status arm_cfft_radix4_init_q15(
00354   arm_cfft_radix4_instance_q15 * S,
00355   uint16_t fftLen,
00356   uint8_t ifftFlag,
00357   uint8_t bitReverseFlag)
00358 {
00359   /*  Initialise the default arm status */
00360   arm_status status = ARM_MATH_SUCCESS;
00361   /*  Initialise the FFT length */
00362   S->fftLen = fftLen;
00363   /*  Initialise the Twiddle coefficient pointer */
00364   S->pTwiddle = (q15_t *) twiddleCoefQ15;
00365   /*  Initialise the Flag for selection of CFFT or CIFFT */
00366   S->ifftFlag = ifftFlag;
00367   /*  Initialise the Flag for calculation Bit reversal or not */
00368   S->bitReverseFlag = bitReverseFlag;
00369
00370   /*  Initializations of structure parameters depending on the FFT length */
00371   switch (S->fftLen)
00372   {
00373     /*  Initializations of structure parameters for 1024 point FFT */
00374   case 1024u:
00375     /*  Initialise the twiddle coef modifier value */
00376     S->twidCoefModifier = 1u;
00377     /*  Initialise the bit reversal table modifier */
00378     S->bitRevFactor = 1u;
00379     /*  Initialise the bit reversal table pointer */
00380     S->pBitRevTable = armBitRevTable;
00381
00382     break;
00383   case 256u:
00384     /*  Initializations of structure parameters for 2566 point FFT */
00385     S->twidCoefModifier = 4u;
00386     S->bitRevFactor = 4u;
00387     S->pBitRevTable = &armBitRevTable[3];
00388
00389     break;
00390   case 64u:
00391     /*  Initializations of structure parameters for 64 point FFT */
00392     S->twidCoefModifier = 16u;
00393     S->bitRevFactor = 16u;
00394     S->pBitRevTable = &armBitRevTable[15];
00395
00396     break;
00397   case 16u:
00398     /*  Initializations of structure parameters for 16 point FFT */
00399     S->twidCoefModifier = 64u;
00400     S->bitRevFactor = 64u;
00401     S->pBitRevTable = &armBitRevTable[63];
00402
00403     break;
00404   default:
00405     /*  Reporting argument error if fftSize is not valid value */
00406     status = ARM_MATH_ARGUMENT_ERROR;
00407     break;
00408   }
00409
00410   return (status);
00411 }
00412
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CMSIS DSP Software Library: arm_cfft_radix4_init_q31.c File Reference

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  • File List
  • Globals
Functions | Variables

arm_cfft_radix4_init_q31.c File Reference

#include "arm_math.h"
#include "arm_common_tables.h"

Go to the source code of this file.

Functions

arm_status | arm_cfft_radix4_init_q31 (arm_cfft_radix4_instance_q31 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)

Variables

static const q31_t | twiddleCoefQ31 [2048]
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
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CMSIS DSP Software Library: arm_cfft_radix4_init_q31.c Source File

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  • File List
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arm_cfft_radix4_init_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cfft_radix4_init_q31.c
00009 *
00010 * Description:  Radix-4 Decimation in Frequency Q31 FFT & IFFT initialization function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037 #include "arm_common_tables.h"
00038
00048 /*
00049 * @brief  Twiddle factors Table
00050 */
00051
00071 static const q31_t twiddleCoefQ31[2048] = {
00072   0x7fffffff, 0x0, 0x7fff6216, 0xc90f88, 0x7ffd885a, 0x1921d20, 0x7ffa72d1,
00073   0x25b26d7,
00074   0x7ff62182, 0x3242abf, 0x7ff09478, 0x3ed26e6, 0x7fe9cbc0, 0x4b6195d,
00075   0x7fe1c76b, 0x57f0035,
00076   0x7fd8878e, 0x647d97c, 0x7fce0c3e, 0x710a345, 0x7fc25596, 0x7d95b9e,
00077   0x7fb563b3, 0x8a2009a,
00078   0x7fa736b4, 0x96a9049, 0x7f97cebd, 0xa3308bd, 0x7f872bf3, 0xafb6805,
00079   0x7f754e80, 0xbc3ac35,
00080   0x7f62368f, 0xc8bd35e, 0x7f4de451, 0xd53db92, 0x7f3857f6, 0xe1bc2e4,
00081   0x7f2191b4, 0xee38766,
00082   0x7f0991c4, 0xfab272b, 0x7ef05860, 0x1072a048, 0x7ed5e5c6, 0x1139f0cf,
00083   0x7eba3a39, 0x120116d5,
00084   0x7e9d55fc, 0x12c8106f, 0x7e7f3957, 0x138edbb1, 0x7e5fe493, 0x145576b1,
00085   0x7e3f57ff, 0x151bdf86,
00086   0x7e1d93ea, 0x15e21445, 0x7dfa98a8, 0x16a81305, 0x7dd6668f, 0x176dd9de,
00087   0x7db0fdf8, 0x183366e9,
00088   0x7d8a5f40, 0x18f8b83c, 0x7d628ac6, 0x19bdcbf3, 0x7d3980ec, 0x1a82a026,
00089   0x7d0f4218, 0x1b4732ef,
00090   0x7ce3ceb2, 0x1c0b826a, 0x7cb72724, 0x1ccf8cb3, 0x7c894bde, 0x1d934fe5,
00091   0x7c5a3d50, 0x1e56ca1e,
00092   0x7c29fbee, 0x1f19f97b, 0x7bf88830, 0x1fdcdc1b, 0x7bc5e290, 0x209f701c,
00093   0x7b920b89, 0x2161b3a0,
00094   0x7b5d039e, 0x2223a4c5, 0x7b26cb4f, 0x22e541af, 0x7aef6323, 0x23a6887f,
00095   0x7ab6cba4, 0x24677758,
00096   0x7a7d055b, 0x25280c5e, 0x7a4210d8, 0x25e845b6, 0x7a05eead, 0x26a82186,
00097   0x79c89f6e, 0x27679df4,
00098   0x798a23b1, 0x2826b928, 0x794a7c12, 0x28e5714b, 0x7909a92d, 0x29a3c485,
00099   0x78c7aba2, 0x2a61b101,
00100   0x78848414, 0x2b1f34eb, 0x78403329, 0x2bdc4e6f, 0x77fab989, 0x2c98fbba,
00101   0x77b417df, 0x2d553afc,
00102   0x776c4edb, 0x2e110a62, 0x77235f2d, 0x2ecc681e, 0x76d94989, 0x2f875262,
00103   0x768e0ea6, 0x3041c761,
00104   0x7641af3d, 0x30fbc54d, 0x75f42c0b, 0x31b54a5e, 0x75a585cf, 0x326e54c7,
00105   0x7555bd4c, 0x3326e2c3,
00106   0x7504d345, 0x33def287, 0x74b2c884, 0x34968250, 0x745f9dd1, 0x354d9057,
00107   0x740b53fb, 0x36041ad9,
00108   0x73b5ebd1, 0x36ba2014, 0x735f6626, 0x376f9e46, 0x7307c3d0, 0x382493b0,
00109   0x72af05a7, 0x38d8fe93,
00110   0x72552c85, 0x398cdd32, 0x71fa3949, 0x3a402dd2, 0x719e2cd2, 0x3af2eeb7,
00111   0x71410805, 0x3ba51e29,
00112   0x70e2cbc6, 0x3c56ba70, 0x708378ff, 0x3d07c1d6, 0x7023109a, 0x3db832a6,
00113   0x6fc19385, 0x3e680b2c,
00114   0x6f5f02b2, 0x3f1749b8, 0x6efb5f12, 0x3fc5ec98, 0x6e96a99d, 0x4073f21d,
00115   0x6e30e34a, 0x4121589b,
00116   0x6dca0d14, 0x41ce1e65, 0x6d6227fa, 0x427a41d0, 0x6cf934fc, 0x4325c135,
00117   0x6c8f351c, 0x43d09aed,
00118   0x6c242960, 0x447acd50, 0x6bb812d1, 0x452456bd, 0x6b4af279, 0x45cd358f,
00119   0x6adcc964, 0x46756828,
00120   0x6a6d98a4, 0x471cece7, 0x69fd614a, 0x47c3c22f, 0x698c246c, 0x4869e665,
00121   0x6919e320, 0x490f57ee,
00122   0x68a69e81, 0x49b41533, 0x683257ab, 0x4a581c9e, 0x67bd0fbd, 0x4afb6c98,
00123   0x6746c7d8, 0x4b9e0390,
00124   0x66cf8120, 0x4c3fdff4, 0x66573cbb, 0x4ce10034, 0x65ddfbd3, 0x4d8162c4,
00125   0x6563bf92, 0x4e210617,
00126   0x64e88926, 0x4ebfe8a5, 0x646c59bf, 0x4f5e08e3, 0x63ef3290, 0x4ffb654d,
00127   0x637114cc, 0x5097fc5e,
00128   0x62f201ac, 0x5133cc94, 0x6271fa69, 0x51ced46e, 0x61f1003f, 0x5269126e,
00129   0x616f146c, 0x53028518,
00130   0x60ec3830, 0x539b2af0, 0x60686ccf, 0x5433027d, 0x5fe3b38d, 0x54ca0a4b,
00131   0x5f5e0db3, 0x556040e2,
00132   0x5ed77c8a, 0x55f5a4d2, 0x5e50015d, 0x568a34a9, 0x5dc79d7c, 0x571deefa,
00133   0x5d3e5237, 0x57b0d256,
00134   0x5cb420e0, 0x5842dd54, 0x5c290acc, 0x58d40e8c, 0x5b9d1154, 0x59646498,
00135   0x5b1035cf, 0x59f3de12,
00136   0x5a82799a, 0x5a82799a, 0x59f3de12, 0x5b1035cf, 0x59646498, 0x5b9d1154,
00137   0x58d40e8c, 0x5c290acc,
00138   0x5842dd54, 0x5cb420e0, 0x57b0d256, 0x5d3e5237, 0x571deefa, 0x5dc79d7c,
00139   0x568a34a9, 0x5e50015d,
00140   0x55f5a4d2, 0x5ed77c8a, 0x556040e2, 0x5f5e0db3, 0x54ca0a4b, 0x5fe3b38d,
00141   0x5433027d, 0x60686ccf,
00142   0x539b2af0, 0x60ec3830, 0x53028518, 0x616f146c, 0x5269126e, 0x61f1003f,
00143   0x51ced46e, 0x6271fa69,
00144   0x5133cc94, 0x62f201ac, 0x5097fc5e, 0x637114cc, 0x4ffb654d, 0x63ef3290,
00145   0x4f5e08e3, 0x646c59bf,
00146   0x4ebfe8a5, 0x64e88926, 0x4e210617, 0x6563bf92, 0x4d8162c4, 0x65ddfbd3,
00147   0x4ce10034, 0x66573cbb,
00148   0x4c3fdff4, 0x66cf8120, 0x4b9e0390, 0x6746c7d8, 0x4afb6c98, 0x67bd0fbd,
00149   0x4a581c9e, 0x683257ab,
00150   0x49b41533, 0x68a69e81, 0x490f57ee, 0x6919e320, 0x4869e665, 0x698c246c,
00151   0x47c3c22f, 0x69fd614a,
00152   0x471cece7, 0x6a6d98a4, 0x46756828, 0x6adcc964, 0x45cd358f, 0x6b4af279,
00153   0x452456bd, 0x6bb812d1,
00154   0x447acd50, 0x6c242960, 0x43d09aed, 0x6c8f351c, 0x4325c135, 0x6cf934fc,
00155   0x427a41d0, 0x6d6227fa,
00156   0x41ce1e65, 0x6dca0d14, 0x4121589b, 0x6e30e34a, 0x4073f21d, 0x6e96a99d,
00157   0x3fc5ec98, 0x6efb5f12,
00158   0x3f1749b8, 0x6f5f02b2, 0x3e680b2c, 0x6fc19385, 0x3db832a6, 0x7023109a,
00159   0x3d07c1d6, 0x708378ff,
00160   0x3c56ba70, 0x70e2cbc6, 0x3ba51e29, 0x71410805, 0x3af2eeb7, 0x719e2cd2,
00161   0x3a402dd2, 0x71fa3949,
00162   0x398cdd32, 0x72552c85, 0x38d8fe93, 0x72af05a7, 0x382493b0, 0x7307c3d0,
00163   0x376f9e46, 0x735f6626,
00164   0x36ba2014, 0x73b5ebd1, 0x36041ad9, 0x740b53fb, 0x354d9057, 0x745f9dd1,
00165   0x34968250, 0x74b2c884,
00166   0x33def287, 0x7504d345, 0x3326e2c3, 0x7555bd4c, 0x326e54c7, 0x75a585cf,
00167   0x31b54a5e, 0x75f42c0b,
00168   0x30fbc54d, 0x7641af3d, 0x3041c761, 0x768e0ea6, 0x2f875262, 0x76d94989,
00169   0x2ecc681e, 0x77235f2d,
00170   0x2e110a62, 0x776c4edb, 0x2d553afc, 0x77b417df, 0x2c98fbba, 0x77fab989,
00171   0x2bdc4e6f, 0x78403329,
00172   0x2b1f34eb, 0x78848414, 0x2a61b101, 0x78c7aba2, 0x29a3c485, 0x7909a92d,
00173   0x28e5714b, 0x794a7c12,
00174   0x2826b928, 0x798a23b1, 0x27679df4, 0x79c89f6e, 0x26a82186, 0x7a05eead,
00175   0x25e845b6, 0x7a4210d8,
00176   0x25280c5e, 0x7a7d055b, 0x24677758, 0x7ab6cba4, 0x23a6887f, 0x7aef6323,
00177   0x22e541af, 0x7b26cb4f,
00178   0x2223a4c5, 0x7b5d039e, 0x2161b3a0, 0x7b920b89, 0x209f701c, 0x7bc5e290,
00179   0x1fdcdc1b, 0x7bf88830,
00180   0x1f19f97b, 0x7c29fbee, 0x1e56ca1e, 0x7c5a3d50, 0x1d934fe5, 0x7c894bde,
00181   0x1ccf8cb3, 0x7cb72724,
00182   0x1c0b826a, 0x7ce3ceb2, 0x1b4732ef, 0x7d0f4218, 0x1a82a026, 0x7d3980ec,
00183   0x19bdcbf3, 0x7d628ac6,
00184   0x18f8b83c, 0x7d8a5f40, 0x183366e9, 0x7db0fdf8, 0x176dd9de, 0x7dd6668f,
00185   0x16a81305, 0x7dfa98a8,
00186   0x15e21445, 0x7e1d93ea, 0x151bdf86, 0x7e3f57ff, 0x145576b1, 0x7e5fe493,
00187   0x138edbb1, 0x7e7f3957,
00188   0x12c8106f, 0x7e9d55fc, 0x120116d5, 0x7eba3a39, 0x1139f0cf, 0x7ed5e5c6,
00189   0x1072a048, 0x7ef05860,
00190   0xfab272b, 0x7f0991c4, 0xee38766, 0x7f2191b4, 0xe1bc2e4, 0x7f3857f6,
00191   0xd53db92, 0x7f4de451,
00192   0xc8bd35e, 0x7f62368f, 0xbc3ac35, 0x7f754e80, 0xafb6805, 0x7f872bf3,
00193   0xa3308bd, 0x7f97cebd,
00194   0x96a9049, 0x7fa736b4, 0x8a2009a, 0x7fb563b3, 0x7d95b9e, 0x7fc25596,
00195   0x710a345, 0x7fce0c3e,
00196   0x647d97c, 0x7fd8878e, 0x57f0035, 0x7fe1c76b, 0x4b6195d, 0x7fe9cbc0,
00197   0x3ed26e6, 0x7ff09478,
00198   0x3242abf, 0x7ff62182, 0x25b26d7, 0x7ffa72d1, 0x1921d20, 0x7ffd885a,
00199   0xc90f88, 0x7fff6216,
00200   0x0, 0x7fffffff, 0xff36f078, 0x7fff6216, 0xfe6de2e0, 0x7ffd885a, 0xfda4d929,
00201   0x7ffa72d1,
00202   0xfcdbd541, 0x7ff62182, 0xfc12d91a, 0x7ff09478, 0xfb49e6a3, 0x7fe9cbc0,
00203   0xfa80ffcb, 0x7fe1c76b,
00204   0xf9b82684, 0x7fd8878e, 0xf8ef5cbb, 0x7fce0c3e, 0xf826a462, 0x7fc25596,
00205   0xf75dff66, 0x7fb563b3,
00206   0xf6956fb7, 0x7fa736b4, 0xf5ccf743, 0x7f97cebd, 0xf50497fb, 0x7f872bf3,
00207   0xf43c53cb, 0x7f754e80,
00208   0xf3742ca2, 0x7f62368f, 0xf2ac246e, 0x7f4de451, 0xf1e43d1c, 0x7f3857f6,
00209   0xf11c789a, 0x7f2191b4,
00210   0xf054d8d5, 0x7f0991c4, 0xef8d5fb8, 0x7ef05860, 0xeec60f31, 0x7ed5e5c6,
00211   0xedfee92b, 0x7eba3a39,
00212   0xed37ef91, 0x7e9d55fc, 0xec71244f, 0x7e7f3957, 0xebaa894f, 0x7e5fe493,
00213   0xeae4207a, 0x7e3f57ff,
00214   0xea1debbb, 0x7e1d93ea, 0xe957ecfb, 0x7dfa98a8, 0xe8922622, 0x7dd6668f,
00215   0xe7cc9917, 0x7db0fdf8,
00216   0xe70747c4, 0x7d8a5f40, 0xe642340d, 0x7d628ac6, 0xe57d5fda, 0x7d3980ec,
00217   0xe4b8cd11, 0x7d0f4218,
00218   0xe3f47d96, 0x7ce3ceb2, 0xe330734d, 0x7cb72724, 0xe26cb01b, 0x7c894bde,
00219   0xe1a935e2, 0x7c5a3d50,
00220   0xe0e60685, 0x7c29fbee, 0xe02323e5, 0x7bf88830, 0xdf608fe4, 0x7bc5e290,
00221   0xde9e4c60, 0x7b920b89,
00222   0xdddc5b3b, 0x7b5d039e, 0xdd1abe51, 0x7b26cb4f, 0xdc597781, 0x7aef6323,
00223   0xdb9888a8, 0x7ab6cba4,
00224   0xdad7f3a2, 0x7a7d055b, 0xda17ba4a, 0x7a4210d8, 0xd957de7a, 0x7a05eead,
00225   0xd898620c, 0x79c89f6e,
00226   0xd7d946d8, 0x798a23b1, 0xd71a8eb5, 0x794a7c12, 0xd65c3b7b, 0x7909a92d,
00227   0xd59e4eff, 0x78c7aba2,
00228   0xd4e0cb15, 0x78848414, 0xd423b191, 0x78403329, 0xd3670446, 0x77fab989,
00229   0xd2aac504, 0x77b417df,
00230   0xd1eef59e, 0x776c4edb, 0xd13397e2, 0x77235f2d, 0xd078ad9e, 0x76d94989,
00231   0xcfbe389f, 0x768e0ea6,
00232   0xcf043ab3, 0x7641af3d, 0xce4ab5a2, 0x75f42c0b, 0xcd91ab39, 0x75a585cf,
00233   0xccd91d3d, 0x7555bd4c,
00234   0xcc210d79, 0x7504d345, 0xcb697db0, 0x74b2c884, 0xcab26fa9, 0x745f9dd1,
00235   0xc9fbe527, 0x740b53fb,
00236   0xc945dfec, 0x73b5ebd1, 0xc89061ba, 0x735f6626, 0xc7db6c50, 0x7307c3d0,
00237   0xc727016d, 0x72af05a7,
00238   0xc67322ce, 0x72552c85, 0xc5bfd22e, 0x71fa3949, 0xc50d1149, 0x719e2cd2,
00239   0xc45ae1d7, 0x71410805,
00240   0xc3a94590, 0x70e2cbc6, 0xc2f83e2a, 0x708378ff, 0xc247cd5a, 0x7023109a,
00241   0xc197f4d4, 0x6fc19385,
00242   0xc0e8b648, 0x6f5f02b2, 0xc03a1368, 0x6efb5f12, 0xbf8c0de3, 0x6e96a99d,
00243   0xbedea765, 0x6e30e34a,
00244   0xbe31e19b, 0x6dca0d14, 0xbd85be30, 0x6d6227fa, 0xbcda3ecb, 0x6cf934fc,
00245   0xbc2f6513, 0x6c8f351c,
00246   0xbb8532b0, 0x6c242960, 0xbadba943, 0x6bb812d1, 0xba32ca71, 0x6b4af279,
00247   0xb98a97d8, 0x6adcc964,
00248   0xb8e31319, 0x6a6d98a4, 0xb83c3dd1, 0x69fd614a, 0xb796199b, 0x698c246c,
00249   0xb6f0a812, 0x6919e320,
00250   0xb64beacd, 0x68a69e81, 0xb5a7e362, 0x683257ab, 0xb5049368, 0x67bd0fbd,
00251   0xb461fc70, 0x6746c7d8,
00252   0xb3c0200c, 0x66cf8120, 0xb31effcc, 0x66573cbb, 0xb27e9d3c, 0x65ddfbd3,
00253   0xb1def9e9, 0x6563bf92,
00254   0xb140175b, 0x64e88926, 0xb0a1f71d, 0x646c59bf, 0xb0049ab3, 0x63ef3290,
00255   0xaf6803a2, 0x637114cc,
00256   0xaecc336c, 0x62f201ac, 0xae312b92, 0x6271fa69, 0xad96ed92, 0x61f1003f,
00257   0xacfd7ae8, 0x616f146c,
00258   0xac64d510, 0x60ec3830, 0xabccfd83, 0x60686ccf, 0xab35f5b5, 0x5fe3b38d,
00259   0xaa9fbf1e, 0x5f5e0db3,
00260   0xaa0a5b2e, 0x5ed77c8a, 0xa975cb57, 0x5e50015d, 0xa8e21106, 0x5dc79d7c,
00261   0xa84f2daa, 0x5d3e5237,
00262   0xa7bd22ac, 0x5cb420e0, 0xa72bf174, 0x5c290acc, 0xa69b9b68, 0x5b9d1154,
00263   0xa60c21ee, 0x5b1035cf,
00264   0xa57d8666, 0x5a82799a, 0xa4efca31, 0x59f3de12, 0xa462eeac, 0x59646498,
00265   0xa3d6f534, 0x58d40e8c,
00266   0xa34bdf20, 0x5842dd54, 0xa2c1adc9, 0x57b0d256, 0xa2386284, 0x571deefa,
00267   0xa1affea3, 0x568a34a9,
00268   0xa1288376, 0x55f5a4d2, 0xa0a1f24d, 0x556040e2, 0xa01c4c73, 0x54ca0a4b,
00269   0x9f979331, 0x5433027d,
00270   0x9f13c7d0, 0x539b2af0, 0x9e90eb94, 0x53028518, 0x9e0effc1, 0x5269126e,
00271   0x9d8e0597, 0x51ced46e,
00272   0x9d0dfe54, 0x5133cc94, 0x9c8eeb34, 0x5097fc5e, 0x9c10cd70, 0x4ffb654d,
00273   0x9b93a641, 0x4f5e08e3,
00274   0x9b1776da, 0x4ebfe8a5, 0x9a9c406e, 0x4e210617, 0x9a22042d, 0x4d8162c4,
00275   0x99a8c345, 0x4ce10034,
00276   0x99307ee0, 0x4c3fdff4, 0x98b93828, 0x4b9e0390, 0x9842f043, 0x4afb6c98,
00277   0x97cda855, 0x4a581c9e,
00278   0x9759617f, 0x49b41533, 0x96e61ce0, 0x490f57ee, 0x9673db94, 0x4869e665,
00279   0x96029eb6, 0x47c3c22f,
00280   0x9592675c, 0x471cece7, 0x9523369c, 0x46756828, 0x94b50d87, 0x45cd358f,
00281   0x9447ed2f, 0x452456bd,
00282   0x93dbd6a0, 0x447acd50, 0x9370cae4, 0x43d09aed, 0x9306cb04, 0x4325c135,
00283   0x929dd806, 0x427a41d0,
00284   0x9235f2ec, 0x41ce1e65, 0x91cf1cb6, 0x4121589b, 0x91695663, 0x4073f21d,
00285   0x9104a0ee, 0x3fc5ec98,
00286   0x90a0fd4e, 0x3f1749b8, 0x903e6c7b, 0x3e680b2c, 0x8fdcef66, 0x3db832a6,
00287   0x8f7c8701, 0x3d07c1d6,
00288   0x8f1d343a, 0x3c56ba70, 0x8ebef7fb, 0x3ba51e29, 0x8e61d32e, 0x3af2eeb7,
00289   0x8e05c6b7, 0x3a402dd2,
00290   0x8daad37b, 0x398cdd32, 0x8d50fa59, 0x38d8fe93, 0x8cf83c30, 0x382493b0,
00291   0x8ca099da, 0x376f9e46,
00292   0x8c4a142f, 0x36ba2014, 0x8bf4ac05, 0x36041ad9, 0x8ba0622f, 0x354d9057,
00293   0x8b4d377c, 0x34968250,
00294   0x8afb2cbb, 0x33def287, 0x8aaa42b4, 0x3326e2c3, 0x8a5a7a31, 0x326e54c7,
00295   0x8a0bd3f5, 0x31b54a5e,
00296   0x89be50c3, 0x30fbc54d, 0x8971f15a, 0x3041c761, 0x8926b677, 0x2f875262,
00297   0x88dca0d3, 0x2ecc681e,
00298   0x8893b125, 0x2e110a62, 0x884be821, 0x2d553afc, 0x88054677, 0x2c98fbba,
00299   0x87bfccd7, 0x2bdc4e6f,
00300   0x877b7bec, 0x2b1f34eb, 0x8738545e, 0x2a61b101, 0x86f656d3, 0x29a3c485,
00301   0x86b583ee, 0x28e5714b,
00302   0x8675dc4f, 0x2826b928, 0x86376092, 0x27679df4, 0x85fa1153, 0x26a82186,
00303   0x85bdef28, 0x25e845b6,
00304   0x8582faa5, 0x25280c5e, 0x8549345c, 0x24677758, 0x85109cdd, 0x23a6887f,
00305   0x84d934b1, 0x22e541af,
00306   0x84a2fc62, 0x2223a4c5, 0x846df477, 0x2161b3a0, 0x843a1d70, 0x209f701c,
00307   0x840777d0, 0x1fdcdc1b,
00308   0x83d60412, 0x1f19f97b, 0x83a5c2b0, 0x1e56ca1e, 0x8376b422, 0x1d934fe5,
00309   0x8348d8dc, 0x1ccf8cb3,
00310   0x831c314e, 0x1c0b826a, 0x82f0bde8, 0x1b4732ef, 0x82c67f14, 0x1a82a026,
00311   0x829d753a, 0x19bdcbf3,
00312   0x8275a0c0, 0x18f8b83c, 0x824f0208, 0x183366e9, 0x82299971, 0x176dd9de,
00313   0x82056758, 0x16a81305,
00314   0x81e26c16, 0x15e21445, 0x81c0a801, 0x151bdf86, 0x81a01b6d, 0x145576b1,
00315   0x8180c6a9, 0x138edbb1,
00316   0x8162aa04, 0x12c8106f, 0x8145c5c7, 0x120116d5, 0x812a1a3a, 0x1139f0cf,
00317   0x810fa7a0, 0x1072a048,
00318   0x80f66e3c, 0xfab272b, 0x80de6e4c, 0xee38766, 0x80c7a80a, 0xe1bc2e4,
00319   0x80b21baf, 0xd53db92,
00320   0x809dc971, 0xc8bd35e, 0x808ab180, 0xbc3ac35, 0x8078d40d, 0xafb6805,
00321   0x80683143, 0xa3308bd,
00322   0x8058c94c, 0x96a9049, 0x804a9c4d, 0x8a2009a, 0x803daa6a, 0x7d95b9e,
00323   0x8031f3c2, 0x710a345,
00324   0x80277872, 0x647d97c, 0x801e3895, 0x57f0035, 0x80163440, 0x4b6195d,
00325   0x800f6b88, 0x3ed26e6,
00326   0x8009de7e, 0x3242abf, 0x80058d2f, 0x25b26d7, 0x800277a6, 0x1921d20,
00327   0x80009dea, 0xc90f88,
00328   0x80000000, 0x0, 0x80009dea, 0xff36f078, 0x800277a6, 0xfe6de2e0, 0x80058d2f,
00329   0xfda4d929,
00330   0x8009de7e, 0xfcdbd541, 0x800f6b88, 0xfc12d91a, 0x80163440, 0xfb49e6a3,
00331   0x801e3895, 0xfa80ffcb,
00332   0x80277872, 0xf9b82684, 0x8031f3c2, 0xf8ef5cbb, 0x803daa6a, 0xf826a462,
00333   0x804a9c4d, 0xf75dff66,
00334   0x8058c94c, 0xf6956fb7, 0x80683143, 0xf5ccf743, 0x8078d40d, 0xf50497fb,
00335   0x808ab180, 0xf43c53cb,
00336   0x809dc971, 0xf3742ca2, 0x80b21baf, 0xf2ac246e, 0x80c7a80a, 0xf1e43d1c,
00337   0x80de6e4c, 0xf11c789a,
00338   0x80f66e3c, 0xf054d8d5, 0x810fa7a0, 0xef8d5fb8, 0x812a1a3a, 0xeec60f31,
00339   0x8145c5c7, 0xedfee92b,
00340   0x8162aa04, 0xed37ef91, 0x8180c6a9, 0xec71244f, 0x81a01b6d, 0xebaa894f,
00341   0x81c0a801, 0xeae4207a,
00342   0x81e26c16, 0xea1debbb, 0x82056758, 0xe957ecfb, 0x82299971, 0xe8922622,
00343   0x824f0208, 0xe7cc9917,
00344   0x8275a0c0, 0xe70747c4, 0x829d753a, 0xe642340d, 0x82c67f14, 0xe57d5fda,
00345   0x82f0bde8, 0xe4b8cd11,
00346   0x831c314e, 0xe3f47d96, 0x8348d8dc, 0xe330734d, 0x8376b422, 0xe26cb01b,
00347   0x83a5c2b0, 0xe1a935e2,
00348   0x83d60412, 0xe0e60685, 0x840777d0, 0xe02323e5, 0x843a1d70, 0xdf608fe4,
00349   0x846df477, 0xde9e4c60,
00350   0x84a2fc62, 0xdddc5b3b, 0x84d934b1, 0xdd1abe51, 0x85109cdd, 0xdc597781,
00351   0x8549345c, 0xdb9888a8,
00352   0x8582faa5, 0xdad7f3a2, 0x85bdef28, 0xda17ba4a, 0x85fa1153, 0xd957de7a,
00353   0x86376092, 0xd898620c,
00354   0x8675dc4f, 0xd7d946d8, 0x86b583ee, 0xd71a8eb5, 0x86f656d3, 0xd65c3b7b,
00355   0x8738545e, 0xd59e4eff,
00356   0x877b7bec, 0xd4e0cb15, 0x87bfccd7, 0xd423b191, 0x88054677, 0xd3670446,
00357   0x884be821, 0xd2aac504,
00358   0x8893b125, 0xd1eef59e, 0x88dca0d3, 0xd13397e2, 0x8926b677, 0xd078ad9e,
00359   0x8971f15a, 0xcfbe389f,
00360   0x89be50c3, 0xcf043ab3, 0x8a0bd3f5, 0xce4ab5a2, 0x8a5a7a31, 0xcd91ab39,
00361   0x8aaa42b4, 0xccd91d3d,
00362   0x8afb2cbb, 0xcc210d79, 0x8b4d377c, 0xcb697db0, 0x8ba0622f, 0xcab26fa9,
00363   0x8bf4ac05, 0xc9fbe527,
00364   0x8c4a142f, 0xc945dfec, 0x8ca099da, 0xc89061ba, 0x8cf83c30, 0xc7db6c50,
00365   0x8d50fa59, 0xc727016d,
00366   0x8daad37b, 0xc67322ce, 0x8e05c6b7, 0xc5bfd22e, 0x8e61d32e, 0xc50d1149,
00367   0x8ebef7fb, 0xc45ae1d7,
00368   0x8f1d343a, 0xc3a94590, 0x8f7c8701, 0xc2f83e2a, 0x8fdcef66, 0xc247cd5a,
00369   0x903e6c7b, 0xc197f4d4,
00370   0x90a0fd4e, 0xc0e8b648, 0x9104a0ee, 0xc03a1368, 0x91695663, 0xbf8c0de3,
00371   0x91cf1cb6, 0xbedea765,
00372   0x9235f2ec, 0xbe31e19b, 0x929dd806, 0xbd85be30, 0x9306cb04, 0xbcda3ecb,
00373   0x9370cae4, 0xbc2f6513,
00374   0x93dbd6a0, 0xbb8532b0, 0x9447ed2f, 0xbadba943, 0x94b50d87, 0xba32ca71,
00375   0x9523369c, 0xb98a97d8,
00376   0x9592675c, 0xb8e31319, 0x96029eb6, 0xb83c3dd1, 0x9673db94, 0xb796199b,
00377   0x96e61ce0, 0xb6f0a812,
00378   0x9759617f, 0xb64beacd, 0x97cda855, 0xb5a7e362, 0x9842f043, 0xb5049368,
00379   0x98b93828, 0xb461fc70,
00380   0x99307ee0, 0xb3c0200c, 0x99a8c345, 0xb31effcc, 0x9a22042d, 0xb27e9d3c,
00381   0x9a9c406e, 0xb1def9e9,
00382   0x9b1776da, 0xb140175b, 0x9b93a641, 0xb0a1f71d, 0x9c10cd70, 0xb0049ab3,
00383   0x9c8eeb34, 0xaf6803a2,
00384   0x9d0dfe54, 0xaecc336c, 0x9d8e0597, 0xae312b92, 0x9e0effc1, 0xad96ed92,
00385   0x9e90eb94, 0xacfd7ae8,
00386   0x9f13c7d0, 0xac64d510, 0x9f979331, 0xabccfd83, 0xa01c4c73, 0xab35f5b5,
00387   0xa0a1f24d, 0xaa9fbf1e,
00388   0xa1288376, 0xaa0a5b2e, 0xa1affea3, 0xa975cb57, 0xa2386284, 0xa8e21106,
00389   0xa2c1adc9, 0xa84f2daa,
00390   0xa34bdf20, 0xa7bd22ac, 0xa3d6f534, 0xa72bf174, 0xa462eeac, 0xa69b9b68,
00391   0xa4efca31, 0xa60c21ee,
00392   0xa57d8666, 0xa57d8666, 0xa60c21ee, 0xa4efca31, 0xa69b9b68, 0xa462eeac,
00393   0xa72bf174, 0xa3d6f534,
00394   0xa7bd22ac, 0xa34bdf20, 0xa84f2daa, 0xa2c1adc9, 0xa8e21106, 0xa2386284,
00395   0xa975cb57, 0xa1affea3,
00396   0xaa0a5b2e, 0xa1288376, 0xaa9fbf1e, 0xa0a1f24d, 0xab35f5b5, 0xa01c4c73,
00397   0xabccfd83, 0x9f979331,
00398   0xac64d510, 0x9f13c7d0, 0xacfd7ae8, 0x9e90eb94, 0xad96ed92, 0x9e0effc1,
00399   0xae312b92, 0x9d8e0597,
00400   0xaecc336c, 0x9d0dfe54, 0xaf6803a2, 0x9c8eeb34, 0xb0049ab3, 0x9c10cd70,
00401   0xb0a1f71d, 0x9b93a641,
00402   0xb140175b, 0x9b1776da, 0xb1def9e9, 0x9a9c406e, 0xb27e9d3c, 0x9a22042d,
00403   0xb31effcc, 0x99a8c345,
00404   0xb3c0200c, 0x99307ee0, 0xb461fc70, 0x98b93828, 0xb5049368, 0x9842f043,
00405   0xb5a7e362, 0x97cda855,
00406   0xb64beacd, 0x9759617f, 0xb6f0a812, 0x96e61ce0, 0xb796199b, 0x9673db94,
00407   0xb83c3dd1, 0x96029eb6,
00408   0xb8e31319, 0x9592675c, 0xb98a97d8, 0x9523369c, 0xba32ca71, 0x94b50d87,
00409   0xbadba943, 0x9447ed2f,
00410   0xbb8532b0, 0x93dbd6a0, 0xbc2f6513, 0x9370cae4, 0xbcda3ecb, 0x9306cb04,
00411   0xbd85be30, 0x929dd806,
00412   0xbe31e19b, 0x9235f2ec, 0xbedea765, 0x91cf1cb6, 0xbf8c0de3, 0x91695663,
00413   0xc03a1368, 0x9104a0ee,
00414   0xc0e8b648, 0x90a0fd4e, 0xc197f4d4, 0x903e6c7b, 0xc247cd5a, 0x8fdcef66,
00415   0xc2f83e2a, 0x8f7c8701,
00416   0xc3a94590, 0x8f1d343a, 0xc45ae1d7, 0x8ebef7fb, 0xc50d1149, 0x8e61d32e,
00417   0xc5bfd22e, 0x8e05c6b7,
00418   0xc67322ce, 0x8daad37b, 0xc727016d, 0x8d50fa59, 0xc7db6c50, 0x8cf83c30,
00419   0xc89061ba, 0x8ca099da,
00420   0xc945dfec, 0x8c4a142f, 0xc9fbe527, 0x8bf4ac05, 0xcab26fa9, 0x8ba0622f,
00421   0xcb697db0, 0x8b4d377c,
00422   0xcc210d79, 0x8afb2cbb, 0xccd91d3d, 0x8aaa42b4, 0xcd91ab39, 0x8a5a7a31,
00423   0xce4ab5a2, 0x8a0bd3f5,
00424   0xcf043ab3, 0x89be50c3, 0xcfbe389f, 0x8971f15a, 0xd078ad9e, 0x8926b677,
00425   0xd13397e2, 0x88dca0d3,
00426   0xd1eef59e, 0x8893b125, 0xd2aac504, 0x884be821, 0xd3670446, 0x88054677,
00427   0xd423b191, 0x87bfccd7,
00428   0xd4e0cb15, 0x877b7bec, 0xd59e4eff, 0x8738545e, 0xd65c3b7b, 0x86f656d3,
00429   0xd71a8eb5, 0x86b583ee,
00430   0xd7d946d8, 0x8675dc4f, 0xd898620c, 0x86376092, 0xd957de7a, 0x85fa1153,
00431   0xda17ba4a, 0x85bdef28,
00432   0xdad7f3a2, 0x8582faa5, 0xdb9888a8, 0x8549345c, 0xdc597781, 0x85109cdd,
00433   0xdd1abe51, 0x84d934b1,
00434   0xdddc5b3b, 0x84a2fc62, 0xde9e4c60, 0x846df477, 0xdf608fe4, 0x843a1d70,
00435   0xe02323e5, 0x840777d0,
00436   0xe0e60685, 0x83d60412, 0xe1a935e2, 0x83a5c2b0, 0xe26cb01b, 0x8376b422,
00437   0xe330734d, 0x8348d8dc,
00438   0xe3f47d96, 0x831c314e, 0xe4b8cd11, 0x82f0bde8, 0xe57d5fda, 0x82c67f14,
00439   0xe642340d, 0x829d753a,
00440   0xe70747c4, 0x8275a0c0, 0xe7cc9917, 0x824f0208, 0xe8922622, 0x82299971,
00441   0xe957ecfb, 0x82056758,
00442   0xea1debbb, 0x81e26c16, 0xeae4207a, 0x81c0a801, 0xebaa894f, 0x81a01b6d,
00443   0xec71244f, 0x8180c6a9,
00444   0xed37ef91, 0x8162aa04, 0xedfee92b, 0x8145c5c7, 0xeec60f31, 0x812a1a3a,
00445   0xef8d5fb8, 0x810fa7a0,
00446   0xf054d8d5, 0x80f66e3c, 0xf11c789a, 0x80de6e4c, 0xf1e43d1c, 0x80c7a80a,
00447   0xf2ac246e, 0x80b21baf,
00448   0xf3742ca2, 0x809dc971, 0xf43c53cb, 0x808ab180, 0xf50497fb, 0x8078d40d,
00449   0xf5ccf743, 0x80683143,
00450   0xf6956fb7, 0x8058c94c, 0xf75dff66, 0x804a9c4d, 0xf826a462, 0x803daa6a,
00451   0xf8ef5cbb, 0x8031f3c2,
00452   0xf9b82684, 0x80277872, 0xfa80ffcb, 0x801e3895, 0xfb49e6a3, 0x80163440,
00453   0xfc12d91a, 0x800f6b88,
00454   0xfcdbd541, 0x8009de7e, 0xfda4d929, 0x80058d2f, 0xfe6de2e0, 0x800277a6,
00455   0xff36f078, 0x80009dea,
00456   0x0, 0x80000000, 0xc90f88, 0x80009dea, 0x1921d20, 0x800277a6, 0x25b26d7,
00457   0x80058d2f,
00458   0x3242abf, 0x8009de7e, 0x3ed26e6, 0x800f6b88, 0x4b6195d, 0x80163440,
00459   0x57f0035, 0x801e3895,
00460   0x647d97c, 0x80277872, 0x710a345, 0x8031f3c2, 0x7d95b9e, 0x803daa6a,
00461   0x8a2009a, 0x804a9c4d,
00462   0x96a9049, 0x8058c94c, 0xa3308bd, 0x80683143, 0xafb6805, 0x8078d40d,
00463   0xbc3ac35, 0x808ab180,
00464   0xc8bd35e, 0x809dc971, 0xd53db92, 0x80b21baf, 0xe1bc2e4, 0x80c7a80a,
00465   0xee38766, 0x80de6e4c,
00466   0xfab272b, 0x80f66e3c, 0x1072a048, 0x810fa7a0, 0x1139f0cf, 0x812a1a3a,
00467   0x120116d5, 0x8145c5c7,
00468   0x12c8106f, 0x8162aa04, 0x138edbb1, 0x8180c6a9, 0x145576b1, 0x81a01b6d,
00469   0x151bdf86, 0x81c0a801,
00470   0x15e21445, 0x81e26c16, 0x16a81305, 0x82056758, 0x176dd9de, 0x82299971,
00471   0x183366e9, 0x824f0208,
00472   0x18f8b83c, 0x8275a0c0, 0x19bdcbf3, 0x829d753a, 0x1a82a026, 0x82c67f14,
00473   0x1b4732ef, 0x82f0bde8,
00474   0x1c0b826a, 0x831c314e, 0x1ccf8cb3, 0x8348d8dc, 0x1d934fe5, 0x8376b422,
00475   0x1e56ca1e, 0x83a5c2b0,
00476   0x1f19f97b, 0x83d60412, 0x1fdcdc1b, 0x840777d0, 0x209f701c, 0x843a1d70,
00477   0x2161b3a0, 0x846df477,
00478   0x2223a4c5, 0x84a2fc62, 0x22e541af, 0x84d934b1, 0x23a6887f, 0x85109cdd,
00479   0x24677758, 0x8549345c,
00480   0x25280c5e, 0x8582faa5, 0x25e845b6, 0x85bdef28, 0x26a82186, 0x85fa1153,
00481   0x27679df4, 0x86376092,
00482   0x2826b928, 0x8675dc4f, 0x28e5714b, 0x86b583ee, 0x29a3c485, 0x86f656d3,
00483   0x2a61b101, 0x8738545e,
00484   0x2b1f34eb, 0x877b7bec, 0x2bdc4e6f, 0x87bfccd7, 0x2c98fbba, 0x88054677,
00485   0x2d553afc, 0x884be821,
00486   0x2e110a62, 0x8893b125, 0x2ecc681e, 0x88dca0d3, 0x2f875262, 0x8926b677,
00487   0x3041c761, 0x8971f15a,
00488   0x30fbc54d, 0x89be50c3, 0x31b54a5e, 0x8a0bd3f5, 0x326e54c7, 0x8a5a7a31,
00489   0x3326e2c3, 0x8aaa42b4,
00490   0x33def287, 0x8afb2cbb, 0x34968250, 0x8b4d377c, 0x354d9057, 0x8ba0622f,
00491   0x36041ad9, 0x8bf4ac05,
00492   0x36ba2014, 0x8c4a142f, 0x376f9e46, 0x8ca099da, 0x382493b0, 0x8cf83c30,
00493   0x38d8fe93, 0x8d50fa59,
00494   0x398cdd32, 0x8daad37b, 0x3a402dd2, 0x8e05c6b7, 0x3af2eeb7, 0x8e61d32e,
00495   0x3ba51e29, 0x8ebef7fb,
00496   0x3c56ba70, 0x8f1d343a, 0x3d07c1d6, 0x8f7c8701, 0x3db832a6, 0x8fdcef66,
00497   0x3e680b2c, 0x903e6c7b,
00498   0x3f1749b8, 0x90a0fd4e, 0x3fc5ec98, 0x9104a0ee, 0x4073f21d, 0x91695663,
00499   0x4121589b, 0x91cf1cb6,
00500   0x41ce1e65, 0x9235f2ec, 0x427a41d0, 0x929dd806, 0x4325c135, 0x9306cb04,
00501   0x43d09aed, 0x9370cae4,
00502   0x447acd50, 0x93dbd6a0, 0x452456bd, 0x9447ed2f, 0x45cd358f, 0x94b50d87,
00503   0x46756828, 0x9523369c,
00504   0x471cece7, 0x9592675c, 0x47c3c22f, 0x96029eb6, 0x4869e665, 0x9673db94,
00505   0x490f57ee, 0x96e61ce0,
00506   0x49b41533, 0x9759617f, 0x4a581c9e, 0x97cda855, 0x4afb6c98, 0x9842f043,
00507   0x4b9e0390, 0x98b93828,
00508   0x4c3fdff4, 0x99307ee0, 0x4ce10034, 0x99a8c345, 0x4d8162c4, 0x9a22042d,
00509   0x4e210617, 0x9a9c406e,
00510   0x4ebfe8a5, 0x9b1776da, 0x4f5e08e3, 0x9b93a641, 0x4ffb654d, 0x9c10cd70,
00511   0x5097fc5e, 0x9c8eeb34,
00512   0x5133cc94, 0x9d0dfe54, 0x51ced46e, 0x9d8e0597, 0x5269126e, 0x9e0effc1,
00513   0x53028518, 0x9e90eb94,
00514   0x539b2af0, 0x9f13c7d0, 0x5433027d, 0x9f979331, 0x54ca0a4b, 0xa01c4c73,
00515   0x556040e2, 0xa0a1f24d,
00516   0x55f5a4d2, 0xa1288376, 0x568a34a9, 0xa1affea3, 0x571deefa, 0xa2386284,
00517   0x57b0d256, 0xa2c1adc9,
00518   0x5842dd54, 0xa34bdf20, 0x58d40e8c, 0xa3d6f534, 0x59646498, 0xa462eeac,
00519   0x59f3de12, 0xa4efca31,
00520   0x5a82799a, 0xa57d8666, 0x5b1035cf, 0xa60c21ee, 0x5b9d1154, 0xa69b9b68,
00521   0x5c290acc, 0xa72bf174,
00522   0x5cb420e0, 0xa7bd22ac, 0x5d3e5237, 0xa84f2daa, 0x5dc79d7c, 0xa8e21106,
00523   0x5e50015d, 0xa975cb57,
00524   0x5ed77c8a, 0xaa0a5b2e, 0x5f5e0db3, 0xaa9fbf1e, 0x5fe3b38d, 0xab35f5b5,
00525   0x60686ccf, 0xabccfd83,
00526   0x60ec3830, 0xac64d510, 0x616f146c, 0xacfd7ae8, 0x61f1003f, 0xad96ed92,
00527   0x6271fa69, 0xae312b92,
00528   0x62f201ac, 0xaecc336c, 0x637114cc, 0xaf6803a2, 0x63ef3290, 0xb0049ab3,
00529   0x646c59bf, 0xb0a1f71d,
00530   0x64e88926, 0xb140175b, 0x6563bf92, 0xb1def9e9, 0x65ddfbd3, 0xb27e9d3c,
00531   0x66573cbb, 0xb31effcc,
00532   0x66cf8120, 0xb3c0200c, 0x6746c7d8, 0xb461fc70, 0x67bd0fbd, 0xb5049368,
00533   0x683257ab, 0xb5a7e362,
00534   0x68a69e81, 0xb64beacd, 0x6919e320, 0xb6f0a812, 0x698c246c, 0xb796199b,
00535   0x69fd614a, 0xb83c3dd1,
00536   0x6a6d98a4, 0xb8e31319, 0x6adcc964, 0xb98a97d8, 0x6b4af279, 0xba32ca71,
00537   0x6bb812d1, 0xbadba943,
00538   0x6c242960, 0xbb8532b0, 0x6c8f351c, 0xbc2f6513, 0x6cf934fc, 0xbcda3ecb,
00539   0x6d6227fa, 0xbd85be30,
00540   0x6dca0d14, 0xbe31e19b, 0x6e30e34a, 0xbedea765, 0x6e96a99d, 0xbf8c0de3,
00541   0x6efb5f12, 0xc03a1368,
00542   0x6f5f02b2, 0xc0e8b648, 0x6fc19385, 0xc197f4d4, 0x7023109a, 0xc247cd5a,
00543   0x708378ff, 0xc2f83e2a,
00544   0x70e2cbc6, 0xc3a94590, 0x71410805, 0xc45ae1d7, 0x719e2cd2, 0xc50d1149,
00545   0x71fa3949, 0xc5bfd22e,
00546   0x72552c85, 0xc67322ce, 0x72af05a7, 0xc727016d, 0x7307c3d0, 0xc7db6c50,
00547   0x735f6626, 0xc89061ba,
00548   0x73b5ebd1, 0xc945dfec, 0x740b53fb, 0xc9fbe527, 0x745f9dd1, 0xcab26fa9,
00549   0x74b2c884, 0xcb697db0,
00550   0x7504d345, 0xcc210d79, 0x7555bd4c, 0xccd91d3d, 0x75a585cf, 0xcd91ab39,
00551   0x75f42c0b, 0xce4ab5a2,
00552   0x7641af3d, 0xcf043ab3, 0x768e0ea6, 0xcfbe389f, 0x76d94989, 0xd078ad9e,
00553   0x77235f2d, 0xd13397e2,
00554   0x776c4edb, 0xd1eef59e, 0x77b417df, 0xd2aac504, 0x77fab989, 0xd3670446,
00555   0x78403329, 0xd423b191,
00556   0x78848414, 0xd4e0cb15, 0x78c7aba2, 0xd59e4eff, 0x7909a92d, 0xd65c3b7b,
00557   0x794a7c12, 0xd71a8eb5,
00558   0x798a23b1, 0xd7d946d8, 0x79c89f6e, 0xd898620c, 0x7a05eead, 0xd957de7a,
00559   0x7a4210d8, 0xda17ba4a,
00560   0x7a7d055b, 0xdad7f3a2, 0x7ab6cba4, 0xdb9888a8, 0x7aef6323, 0xdc597781,
00561   0x7b26cb4f, 0xdd1abe51,
00562   0x7b5d039e, 0xdddc5b3b, 0x7b920b89, 0xde9e4c60, 0x7bc5e290, 0xdf608fe4,
00563   0x7bf88830, 0xe02323e5,
00564   0x7c29fbee, 0xe0e60685, 0x7c5a3d50, 0xe1a935e2, 0x7c894bde, 0xe26cb01b,
00565   0x7cb72724, 0xe330734d,
00566   0x7ce3ceb2, 0xe3f47d96, 0x7d0f4218, 0xe4b8cd11, 0x7d3980ec, 0xe57d5fda,
00567   0x7d628ac6, 0xe642340d,
00568   0x7d8a5f40, 0xe70747c4, 0x7db0fdf8, 0xe7cc9917, 0x7dd6668f, 0xe8922622,
00569   0x7dfa98a8, 0xe957ecfb,
00570   0x7e1d93ea, 0xea1debbb, 0x7e3f57ff, 0xeae4207a, 0x7e5fe493, 0xebaa894f,
00571   0x7e7f3957, 0xec71244f,
00572   0x7e9d55fc, 0xed37ef91, 0x7eba3a39, 0xedfee92b, 0x7ed5e5c6, 0xeec60f31,
00573   0x7ef05860, 0xef8d5fb8,
00574   0x7f0991c4, 0xf054d8d5, 0x7f2191b4, 0xf11c789a, 0x7f3857f6, 0xf1e43d1c,
00575   0x7f4de451, 0xf2ac246e,
00576   0x7f62368f, 0xf3742ca2, 0x7f754e80, 0xf43c53cb, 0x7f872bf3, 0xf50497fb,
00577   0x7f97cebd, 0xf5ccf743,
00578   0x7fa736b4, 0xf6956fb7, 0x7fb563b3, 0xf75dff66, 0x7fc25596, 0xf826a462,
00579   0x7fce0c3e, 0xf8ef5cbb,
00580   0x7fd8878e, 0xf9b82684, 0x7fe1c76b, 0xfa80ffcb, 0x7fe9cbc0, 0xfb49e6a3,
00581   0x7ff09478, 0xfc12d91a,
00582   0x7ff62182, 0xfcdbd541, 0x7ffa72d1, 0xfda4d929, 0x7ffd885a, 0xfe6de2e0,
00583   0x7fff6216, 0xff36f078
00584 };
00585
00608 arm_status arm_cfft_radix4_init_q31(
00609   arm_cfft_radix4_instance_q31 * S,
00610   uint16_t fftLen,
00611   uint8_t ifftFlag,
00612   uint8_t bitReverseFlag)
00613 {
00614   /*  Initialise the default arm status */
00615   arm_status status = ARM_MATH_SUCCESS;
00616   /*  Initialise the FFT length */
00617   S->fftLen = fftLen;
00618   /*  Initialise the Twiddle coefficient pointer */
00619   S->pTwiddle = (q31_t *) twiddleCoefQ31;
00620   /*  Initialise the Flag for selection of CFFT or CIFFT */
00621   S->ifftFlag = ifftFlag;
00622   /*  Initialise the Flag for calculation Bit reversal or not */
00623   S->bitReverseFlag = bitReverseFlag;
00624
00625   /*  Initializations of Instance structure depending on the FFT length */
00626   switch (S->fftLen)
00627   {
00628     /*  Initializations of structure parameters for 1024 point FFT */
00629   case 1024u:
00630     /*  Initialise the twiddle coef modifier value */
00631     S->twidCoefModifier = 1u;
00632     /*  Initialise the bit reversal table modifier */
00633     S->bitRevFactor = 1u;
00634     /*  Initialise the bit reversal table pointer */
00635     S->pBitRevTable = armBitRevTable;
00636     break;
00637
00638   case 256u:
00639     /*  Initializations of structure parameters for 256 point FFT */
00640     S->twidCoefModifier = 4u;
00641     S->bitRevFactor = 4u;
00642     S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
00643     break;
00644
00645   case 64u:
00646     /*  Initializations of structure parameters for 64 point FFT */
00647     S->twidCoefModifier = 16u;
00648     S->bitRevFactor = 16u;
00649     S->pBitRevTable = &armBitRevTable[15];
00650     break;
00651
00652   case 16u:
00653     /*  Initializations of structure parameters for 16 point FFT */
00654     S->twidCoefModifier = 64u;
00655     S->bitRevFactor = 64u;
00656     S->pBitRevTable = &armBitRevTable[63];
00657     break;
00658
00659   default:
00660     /*  Reporting argument error if fftSize is not valid value */
00661     status = ARM_MATH_ARGUMENT_ERROR;
00662     break;
00663   }
00664
00665   return (status);
00666 }
00667
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CMSIS DSP Software Library: arm_cfft_radix4_q15.c File Reference

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Functions

arm_cfft_radix4_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void | arm_cfft_radix4_q15 (const arm_cfft_radix4_instance_q15 *S, q15_t *pSrc)
void | arm_radix4_butterfly_q15 (q15_t *pSrc16, uint32_t fftLen, q15_t *pCoef16, uint32_t twidCoefModifier)
void | arm_radix4_butterfly_inverse_q15 (q15_t *pSrc16, uint32_t fftLen, q15_t *pCoef16, uint32_t twidCoefModifier)
void | arm_bitreversal_q15 (q15_t *pSrc16, uint32_t fftLen, uint16_t bitRevFactor, uint16_t *pBitRevTab)

Function Documentation

void arm_radix4_butterfly_q15 | ( | q15_t * | pSrc16,
 |  | uint32_t | fftLen,
 |  | q15_t * | pCoef16,
 |  | uint32_t | twidCoefModifier
 | ) |  |

Core function for the Q15 CFFT butterfly process.

end of CFFT_CIFFT group

Parameters:
[in,out] | *pSrc16 | points to the in-place buffer of Q15 data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef16 | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 138 of file arm_cfft_radix4_q15.c.

void arm_radix4_butterfly_inverse_q15 | ( | q15_t * | pSrc16,
 |  | uint32_t | fftLen,
 |  | q15_t * | pCoef16,
 |  | uint32_t | twidCoefModifier
 | ) |  |

Core function for the Q15 CIFFT butterfly process.

Parameters:
[in,out] | *pSrc16 | points to the in-place buffer of Q15 data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef16 | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 1053 of file arm_cfft_radix4_q15.c.

void arm_bitreversal_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | uint16_t | bitRevFactor,
 |  | uint16_t * | pBitRevTab
 | ) |  |

In-place bit reversal function.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of Q15 data type.
[in] | fftLen | length of the FFT.
[in] | bitRevFactor | bit reversal modifier that supports different size FFTs with the same bit reversal table
[in] | *pBitRevTab | points to bit reversal table.
Returns:
none.

Definition at line 1906 of file arm_cfft_radix4_q15.c.

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CMSIS DSP Software Library: arm_cfft_radix4_q15.c Source File

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  • File List
  • Globals

arm_cfft_radix4_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cfft_radix4_q15.c
00009 *
00010 * Description:  This file has function definition of Radix-4 FFT & IFFT function and
00011 *               In-place bit reversal using bit reversal table
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 *
00030 * Version 0.0.5  2010/04/26
00031 *    incorporated review comments and updated with latest CMSIS layer
00032 *
00033 * Version 0.0.3  2010/03/10
00034 *    Initial version
00035 * -------------------------------------------------------------------- */
00036
00037 #include "arm_math.h"
00038
00066 void arm_cfft_radix4_q15(
00067   const arm_cfft_radix4_instance_q15 * S,
00068   q15_t * pSrc)
00069 {
00070   if(S->ifftFlag == 1u)
00071   {
00072     /*  Complex IFFT radix-4  */
00073     arm_radix4_butterfly_inverse_q15(pSrc, S->fftLen, S->pTwiddle,
00074                                      S->twidCoefModifier);
00075   }
00076   else
00077   {
00078     /*  Complex FFT radix-4  */
00079     arm_radix4_butterfly_q15(pSrc, S->fftLen, S->pTwiddle,
00080                              S->twidCoefModifier);
00081   }
00082
00083   if(S->bitReverseFlag == 1u)
00084   {
00085     /*  Bit Reversal */
00086     arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
00087   }
00088
00089 }
00090
00095 /*
00096 * Radix-4 FFT algorithm used is :
00097 *
00098 * Input real and imaginary data:
00099 * x(n) = xa + j * ya
00100 * x(n+N/4 ) = xb + j * yb
00101 * x(n+N/2 ) = xc + j * yc
00102 * x(n+3N 4) = xd + j * yd
00103 *
00104 *
00105 * Output real and imaginary data:
00106 * x(4r) = xa'+ j * ya'
00107 * x(4r+1) = xb'+ j * yb'
00108 * x(4r+2) = xc'+ j * yc'
00109 * x(4r+3) = xd'+ j * yd'
00110 *
00111 *
00112 * Twiddle factors for radix-4 FFT:
00113 * Wn = co1 + j * (- si1)
00114 * W2n = co2 + j * (- si2)
00115 * W3n = co3 + j * (- si3)
00116
00117 * The real and imaginary output values for the radix-4 butterfly are
00118 * xa' = xa + xb + xc + xd
00119 * ya' = ya + yb + yc + yd
00120 * xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)
00121 * yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)
00122 * xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)
00123 * yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)
00124 * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)
00125 * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)
00126 *
00127 */
00128
00138 void arm_radix4_butterfly_q15(
00139   q15_t * pSrc16,
00140   uint32_t fftLen,
00141   q15_t * pCoef16,
00142   uint32_t twidCoefModifier)
00143 {
00144
00145 #ifndef ARM_MATH_CM0
00146
00147   /* Run the below code for Cortex-M4 and Cortex-M3 */
00148
00149   q31_t R, S, T, U;
00150   q31_t C1, C2, C3, out1, out2;
00151   q31_t *pSrc, *pCoeff;
00152   uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
00153   q15_t in;
00154
00155   /* Total process is divided into three stages */
00156
00157   /* process first stage, middle stages, & last stage */
00158
00159   /*  pointer initializations for SIMD calculations */
00160   pSrc = (q31_t *) pSrc16;
00161   pCoeff = (q31_t *) pCoef16;
00162
00163   /*  Initializations for the first stage */
00164   n2 = fftLen;
00165   n1 = n2;
00166
00167   /* n2 = fftLen/4 */
00168   n2 >>= 2u;
00169
00170   /* Index for twiddle coefficient */
00171   ic = 0u;
00172
00173   /* Index for input read and output write */
00174   i0 = 0u;
00175   j = n2;
00176
00177   /* Input is in 1.15(q15) format */
00178
00179   /*  start of first stage process */
00180   do
00181   {
00182     /*  Butterfly implementation */
00183
00184     /*  index calculation for the input as, */
00185     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
00186     i1 = i0 + n2;
00187     i2 = i1 + n2;
00188     i3 = i2 + n2;
00189
00190     /*  Reading i0, i0+fftLen/2 inputs */
00191     /* Read ya (real), xa(imag) input */
00192     T = pSrc[i0];
00193     in = ((int16_t) (T & 0xFFFF)) >> 2;
00194     T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
00195     /* Read yc (real), xc(imag) input */
00196     S = pSrc[i2];
00197     in = ((int16_t) (S & 0xFFFF)) >> 2;
00198     S = ((S >> 2) & 0xFFFF0000) | (in & 0xFFFF);
00199     /* R = packed((ya + yc), (xa + xc) ) */
00200     R = __QADD16(T, S);
00201     /* S = packed((ya - yc), (xa - xc) ) */
00202     S = __QSUB16(T, S);
00203
00204     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
00205     /* Read yb (real), xb(imag) input */
00206     T = pSrc[i1];
00207     in = ((int16_t) (T & 0xFFFF)) >> 2;
00208     T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
00209     /* Read yd (real), xd(imag) input */
00210     U = pSrc[i3];
00211     in = ((int16_t) (U & 0xFFFF)) >> 2;
00212     U = ((U >> 2) & 0xFFFF0000) | (in & 0xFFFF);
00213     /* T = packed((yb + yd), (xb + xd) ) */
00214     T = __QADD16(T, U);
00215
00216     /*  writing the butterfly processed i0 sample */
00217     /* xa' = xa + xb + xc + xd */
00218     /* ya' = ya + yb + yc + yd */
00219     pSrc[i0] = __SHADD16(R, T);
00220
00221     /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */
00222     R = __QSUB16(R, T);
00223
00224     /* co2 & si2 are read from SIMD Coefficient pointer */
00225     C2 = pCoeff[2u * ic];
00226
00227
00228 #ifndef ARM_MATH_BIG_ENDIAN
00229
00230     /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
00231     out1 = __SMUAD(C2, R) >> 16u;
00232     /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
00233     out2 = __SMUSDX(C2, R);
00234
00235 #else
00236
00237     /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
00238     out1 = __SMUSDX(R, C2) >> 16u;
00239     /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
00240     out2 = __SMUAD(C2, R);
00241
00242 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00243
00244     /*  Reading i0+fftLen/4 */
00245     /* T = packed(yb, xb) */
00246     T = pSrc[i1];
00247     in = ((int16_t) (T & 0xFFFF)) >> 2;
00248     T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
00249
00250     /* writing the butterfly processed i0 + fftLen/4 sample */
00251     /* writing output(xc', yc') in little endian format */
00252     pSrc[i1] = (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
00253
00254     /*  Butterfly calculations */
00255     /* U = packed(yd, xd) */
00256     U = pSrc[i3];
00257     in = ((int16_t) (U & 0xFFFF)) >> 2;
00258     U = ((U >> 2) & 0xFFFF0000) | (in & 0xFFFF);
00259     /* T = packed(yb-yd, xb-xd) */
00260     T = __QSUB16(T, U);
00261
00262
00263 #ifndef ARM_MATH_BIG_ENDIAN
00264
00265     /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
00266     R = __QASX(S, T);
00267     /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
00268     S = __QSAX(S, T);
00269
00270 #else
00271
00272     /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
00273     R = __QSAX(S, T);
00274     /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
00275     S = __QASX(S, T);
00276
00277 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00278
00279     /* co1 & si1 are read from SIMD Coefficient pointer */
00280     C1 = pCoeff[ic];
00281     /*  Butterfly process for the i0+fftLen/2 sample */
00282
00283 #ifndef ARM_MATH_BIG_ENDIAN
00284
00285     /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
00286     out1 = __SMUAD(C1, S) >> 16u;
00287     /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
00288     out2 = __SMUSDX(C1, S);
00289
00290 #else
00291
00292     /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
00293     out1 = __SMUSDX(S, C1) >> 16u;
00294     /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
00295     out2 = __SMUAD(C1, S);
00296
00297 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00298
00299     /* writing output(xb', yb') in little endian format */
00300     pSrc[i2] = ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF);
00301
00302
00303     /* co3 & si3 are read from SIMD Coefficient pointer */
00304     C3 = pCoeff[3u * ic];
00305     /*  Butterfly process for the i0+3fftLen/4 sample */
00306
00307 #ifndef ARM_MATH_BIG_ENDIAN
00308
00309     /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
00310     out1 = __SMUAD(C3, R) >> 16u;
00311     /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
00312     out2 = __SMUSDX(C3, R);
00313
00314 #else
00315
00316     /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
00317     out1 = __SMUSDX(R, C3) >> 16u;
00318     /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
00319     out2 = __SMUAD(C3, R);
00320
00321 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00322
00323     /* writing output(xd', yd') in little endian format */
00324     pSrc[i3] = ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
00325
00326     /*  Twiddle coefficients index modifier */
00327     ic = ic + twidCoefModifier;
00328
00329     /*  Updating input index */
00330     i0 = i0 + 1u;
00331
00332   } while(--j);
00333   /* data is in 4.11(q11) format */
00334
00335   /* end of first stage process */
00336
00337
00338   /* start of middle stage process */
00339
00340   /*  Twiddle coefficients index modifier */
00341   twidCoefModifier <<= 2u;
00342
00343   /*  Calculation of Middle stage */
00344   for (k = fftLen / 4u; k > 4u; k >>= 2u)
00345   {
00346     /*  Initializations for the middle stage */
00347     n1 = n2;
00348     n2 >>= 2u;
00349     ic = 0u;
00350
00351     for (j = 0u; j <= (n2 - 1u); j++)
00352     {
00353       /*  index calculation for the coefficients */
00354       C1 = pCoeff[ic];
00355       C2 = pCoeff[2u * ic];
00356       C3 = pCoeff[3u * ic];
00357
00358       /*  Twiddle coefficients index modifier */
00359       ic = ic + twidCoefModifier;
00360
00361       /*  Butterfly implementation */
00362       for (i0 = j; i0 < fftLen; i0 += n1)
00363       {
00364         /*  index calculation for the input as, */
00365         /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
00366         i1 = i0 + n2;
00367         i2 = i1 + n2;
00368         i3 = i2 + n2;
00369
00370         /*  Reading i0, i0+fftLen/2 inputs */
00371         /* Read ya (real), xa(imag) input */
00372         T = pSrc[i0];
00373
00374         /* Read yc (real), xc(imag) input */
00375         S = pSrc[i2];
00376
00377         /* R = packed( (ya + yc), (xa + xc)) */
00378         R = __QADD16(T, S);
00379
00380         /* S = packed((ya - yc), (xa - xc)) */
00381         S = __QSUB16(T, S);
00382
00383         /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
00384         /* Read yb (real), xb(imag) input */
00385         T = pSrc[i1];
00386
00387         /* Read yd (real), xd(imag) input */
00388         U = pSrc[i3];
00389
00390
00391         /* T = packed( (yb + yd), (xb + xd)) */
00392         T = __QADD16(T, U);
00393
00394
00395         /*  writing the butterfly processed i0 sample */
00396
00397         /* xa' = xa + xb + xc + xd */
00398         /* ya' = ya + yb + yc + yd */
00399         out1 = __SHADD16(R, T);
00400         in = ((int16_t) (out1 & 0xFFFF)) >> 1;
00401         out1 = ((out1 >> 1) & 0xFFFF0000) | (in & 0xFFFF);
00402         pSrc[i0] = out1;
00403
00404         /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
00405         R = __SHSUB16(R, T);
00406
00407
00408 #ifndef ARM_MATH_BIG_ENDIAN
00409
00410         /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
00411         out1 = __SMUAD(C2, R) >> 16u;
00412
00413         /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
00414         out2 = __SMUSDX(C2, R);
00415
00416 #else
00417
00418         /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
00419         out1 = __SMUSDX(R, C2) >> 16u;
00420
00421         /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
00422         out2 = __SMUAD(C2, R);
00423
00424 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00425
00426         /*  Reading i0+3fftLen/4 */
00427         /* Read yb (real), xb(imag) input */
00428         T = pSrc[i1];
00429
00430         /*  writing the butterfly processed i0 + fftLen/4 sample */
00431         /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
00432         /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
00433         pSrc[i1] = ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
00434
00435         /*  Butterfly calculations */
00436
00437         /* Read yd (real), xd(imag) input */
00438         U = pSrc[i3];
00439
00440         /* T = packed(yb-yd, xb-xd) */
00441         T = __QSUB16(T, U);
00442
00443
00444 #ifndef ARM_MATH_BIG_ENDIAN
00445
00446         /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
00447         R = __SHASX(S, T);
00448
00449         /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
00450         S = __SHSAX(S, T);
00451
00452
00453         /*  Butterfly process for the i0+fftLen/2 sample */
00454         out1 = __SMUAD(C1, S) >> 16u;
00455         out2 = __SMUSDX(C1, S);
00456
00457 #else
00458
00459         /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
00460         R = __SHSAX(S, T);
00461
00462         /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
00463         S = __SHASX(S, T);
00464
00465
00466         /*  Butterfly process for the i0+fftLen/2 sample */
00467         out1 = __SMUSDX(S, C1) >> 16u;
00468         out2 = __SMUAD(C1, S);
00469
00470 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00471
00472         /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
00473         /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
00474         pSrc[i2] = ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
00475
00476         /*  Butterfly process for the i0+3fftLen/4 sample */
00477
00478 #ifndef ARM_MATH_BIG_ENDIAN
00479
00480         out1 = __SMUAD(C3, R) >> 16u;
00481         out2 = __SMUSDX(C3, R);
00482
00483 #else
00484
00485         out1 = __SMUSDX(R, C3) >> 16u;
00486         out2 = __SMUAD(C3, R);
00487
00488 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00489
00490         /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
00491         /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
00492         pSrc[i3] = ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
00493       }
00494     }
00495     /*  Twiddle coefficients index modifier */
00496     twidCoefModifier <<= 2u;
00497   }
00498   /* end of middle stage process */
00499
00500
00501   /* data is in 10.6(q6) format for the 1024 point */
00502   /* data is in 8.8(q8) format for the 256 point */
00503   /* data is in 6.10(q10) format for the 64 point */
00504   /* data is in 4.12(q12) format for the 16 point */
00505
00506   /*  Initializations for the last stage */
00507   n1 = n2;
00508   n2 >>= 2u;
00509
00510   /* start of last stage process */
00511
00512   /*  Butterfly implementation */
00513   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
00514   {
00515     /*  index calculation for the input as, */
00516     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
00517     i1 = i0 + n2;
00518     i2 = i1 + n2;
00519     i3 = i2 + n2;
00520
00521     /*  Reading i0, i0+fftLen/2 inputs */
00522     /* Read ya (real), xa(imag) input */
00523     T = pSrc[i0];
00524     /* Read yc (real), xc(imag) input */
00525     S = pSrc[i2];
00526
00527     /* R = packed((ya + yc), (xa + xc)) */
00528     R = __QADD16(T, S);
00529     /* S = packed((ya - yc), (xa - xc)) */
00530     S = __QSUB16(T, S);
00531
00532     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
00533     /* Read yb (real), xb(imag) input */
00534     T = pSrc[i1];
00535     /* Read yd (real), xd(imag) input */
00536     U = pSrc[i3];
00537
00538     /* T = packed((yb + yd), (xb + xd)) */
00539     T = __QADD16(T, U);
00540
00541     /*  writing the butterfly processed i0 sample */
00542     /* xa' = xa + xb + xc + xd */
00543     /* ya' = ya + yb + yc + yd */
00544     pSrc[i0] = __SHADD16(R, T);
00545
00546     /* R = packed((ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
00547     R = __SHSUB16(R, T);
00548
00549     /* Read yb (real), xb(imag) input */
00550     T = pSrc[i1];
00551
00552     /*  writing the butterfly processed i0 + fftLen/4 sample */
00553     /* xc' = (xa-xb+xc-xd) */
00554     /* yc' = (ya-yb+yc-yd) */
00555     pSrc[i1] = R;
00556
00557     /* Read yd (real), xd(imag) input */
00558     U = pSrc[i3];
00559     /* T = packed( (yb - yd), (xb - xd))  */
00560     T = __QSUB16(T, U);
00561
00562
00563 #ifndef ARM_MATH_BIG_ENDIAN
00564
00565     /*  writing the butterfly processed i0 + fftLen/2 sample */
00566     /* xb' = (xa+yb-xc-yd) */
00567     /* yb' = (ya-xb-yc+xd) */
00568     pSrc[i2] = __SHSAX(S, T);
00569
00570     /*  writing the butterfly processed i0 + 3fftLen/4 sample */
00571     /* xd' = (xa-yb-xc+yd) */
00572     /* yd' = (ya+xb-yc-xd) */
00573     pSrc[i3] = __SHASX(S, T);
00574
00575 #else
00576
00577     /*  writing the butterfly processed i0 + fftLen/2 sample */
00578     /* xb' = (xa+yb-xc-yd) */
00579     /* yb' = (ya-xb-yc+xd) */
00580     pSrc[i2] = __SHASX(S, T);
00581
00582     /*  writing the butterfly processed i0 + 3fftLen/4 sample */
00583     /* xd' = (xa-yb-xc+yd) */
00584     /* yd' = (ya+xb-yc-xd) */
00585     pSrc[i3] = __SHSAX(S, T);
00586
00587 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00588
00589   }
00590
00591   /* end of last stage process */
00592
00593   /* output is in 11.5(q5) format for the 1024 point */
00594   /* output is in 9.7(q7) format for the 256 point   */
00595   /* output is in 7.9(q9) format for the 64 point  */
00596   /* output is in 5.11(q11) format for the 16 point  */
00597
00598
00599 #else
00600
00601   /* Run the below code for Cortex-M0 */
00602
00603   q15_t R0, R1, S0, S1, T0, T1, U0, U1;
00604   q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
00605   uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
00606
00607   /* Total process is divided into three stages */
00608
00609   /* process first stage, middle stages, & last stage */
00610
00611   /*  Initializations for the first stage */
00612   n2 = fftLen;
00613   n1 = n2;
00614
00615   /* n2 = fftLen/4 */
00616   n2 >>= 2u;
00617
00618   /* Index for twiddle coefficient */
00619   ic = 0u;
00620
00621   /* Index for input read and output write */
00622   i0 = 0u;
00623   j = n2;
00624
00625   /* Input is in 1.15(q15) format */
00626
00627   /*  start of first stage process */
00628   do
00629   {
00630     /*  Butterfly implementation */
00631
00632     /*  index calculation for the input as, */
00633     /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
00634     i1 = i0 + n2;
00635     i2 = i1 + n2;
00636     i3 = i2 + n2;
00637
00638     /*  Reading i0, i0+fftLen/2 inputs */
00639
00640     /* input is down scale by 4 to avoid overflow */
00641     /* Read ya (real), xa(imag) input */
00642     T0 = pSrc16[i0 * 2u] >> 2u;
00643     T1 = pSrc16[(i0 * 2u) + 1u] >> 2u;
00644
00645     /* input is down scale by 4 to avoid overflow */
00646     /* Read yc (real), xc(imag) input */
00647     S0 = pSrc16[i2 * 2u] >> 2u;
00648     S1 = pSrc16[(i2 * 2u) + 1u] >> 2u;
00649
00650     /* R0 = (ya + yc) */
00651     R0 = __SSAT(T0 + S0, 16u);
00652     /* R1 = (xa + xc) */
00653     R1 = __SSAT(T1 + S1, 16u);
00654
00655     /* S0 = (ya - yc) */
00656     S0 = __SSAT(T0 - S0, 16);
00657     /* S1 = (xa - xc) */
00658     S1 = __SSAT(T1 - S1, 16);
00659
00660     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
00661     /* input is down scale by 4 to avoid overflow */
00662     /* Read yb (real), xb(imag) input */
00663     T0 = pSrc16[i1 * 2u] >> 2u;
00664     T1 = pSrc16[(i1 * 2u) + 1u] >> 2u;
00665
00666     /* input is down scale by 4 to avoid overflow */
00667     /* Read yd (real), xd(imag) input */
00668     U0 = pSrc16[i3 * 2u] >> 2u;
00669     U1 = pSrc16[(i3 * 2u) + 1] >> 2u;
00670
00671     /* T0 = (yb + yd) */
00672     T0 = __SSAT(T0 + U0, 16u);
00673     /* T1 = (xb + xd) */
00674     T1 = __SSAT(T1 + U1, 16u);
00675
00676     /*  writing the butterfly processed i0 sample */
00677     /* ya' = ya + yb + yc + yd */
00678     /* xa' = xa + xb + xc + xd */
00679     pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u);
00680     pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u);
00681
00682     /* R0 = (ya + yc) - (yb + yd) */
00683     /* R1 = (xa + xc) - (xb + xd) */
00684     R0 = __SSAT(R0 - T0, 16u);
00685     R1 = __SSAT(R1 - T1, 16u);
00686
00687     /* co2 & si2 are read from Coefficient pointer */
00688     Co2 = pCoef16[2u * ic * 2u];
00689     Si2 = pCoef16[(2u * ic * 2u) + 1];
00690
00691     /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
00692     out1 = (short) ((Co2 * R0 + Si2 * R1) >> 16u);
00693     /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
00694     out2 = (short) ((-Si2 * R0 + Co2 * R1) >> 16u);
00695
00696     /*  Reading i0+fftLen/4 */
00697     /* input is down scale by 4 to avoid overflow */
00698     /* T0 = yb, T1 =  xb */
00699     T0 = pSrc16[i1 * 2u] >> 2;
00700     T1 = pSrc16[(i1 * 2u) + 1] >> 2;
00701
00702     /* writing the butterfly processed i0 + fftLen/4 sample */
00703     /* writing output(xc', yc') in little endian format */
00704     pSrc16[i1 * 2u] = out1;
00705     pSrc16[(i1 * 2u) + 1] = out2;
00706
00707     /*  Butterfly calculations */
00708     /* input is down scale by 4 to avoid overflow */
00709     /* U0 = yd, U1 = xd */
00710     U0 = pSrc16[i3 * 2u] >> 2;
00711     U1 = pSrc16[(i3 * 2u) + 1] >> 2;
00712     /* T0 = yb-yd */
00713     T0 = __SSAT(T0 - U0, 16);
00714     /* T1 = xb-xd */
00715     T1 = __SSAT(T1 - U1, 16);
00716
00717     /* R1 = (ya-yc) + (xb- xd),  R0 = (xa-xc) - (yb-yd)) */
00718     R0 = (short) __SSAT((q31_t) (S0 - T1), 16);
00719     R1 = (short) __SSAT((q31_t) (S1 + T0), 16);
00720
00721     /* S1 = (ya-yc) - (xb- xd), S0 = (xa-xc) + (yb-yd)) */
00722     S0 = (short) __SSAT(((q31_t) S0 + T1), 16u);
00723     S1 = (short) __SSAT(((q31_t) S1 - T0), 16u);
00724
00725     /* co1 & si1 are read from Coefficient pointer */
00726     Co1 = pCoef16[ic * 2u];
00727     Si1 = pCoef16[(ic * 2u) + 1];
00728     /*  Butterfly process for the i0+fftLen/2 sample */
00729     /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
00730     out1 = (short) ((Si1 * S1 + Co1 * S0) >> 16);
00731     /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
00732     out2 = (short) ((-Si1 * S0 + Co1 * S1) >> 16);
00733
00734     /* writing output(xb', yb') in little endian format */
00735     pSrc16[i2 * 2u] = out1;
00736     pSrc16[(i2 * 2u) + 1] = out2;
00737
00738     /* Co3 & si3 are read from Coefficient pointer */
00739     Co3 = pCoef16[3u * (ic * 2u)];
00740     Si3 = pCoef16[(3u * (ic * 2u)) + 1];
00741     /*  Butterfly process for the i0+3fftLen/4 sample */
00742     /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */
00743     out1 = (short) ((Si3 * R1 + Co3 * R0) >> 16u);
00744     /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */
00745     out2 = (short) ((-Si3 * R0 + Co3 * R1) >> 16u);
00746     /* writing output(xd', yd') in little endian format */
00747     pSrc16[i3 * 2u] = out1;
00748     pSrc16[(i3 * 2u) + 1] = out2;
00749
00750     /*  Twiddle coefficients index modifier */
00751     ic = ic + twidCoefModifier;
00752
00753     /*  Updating input index */
00754     i0 = i0 + 1u;
00755
00756   } while(--j);
00757   /* data is in 4.11(q11) format */
00758
00759   /* end of first stage process */
00760
00761
00762   /* start of middle stage process */
00763
00764   /*  Twiddle coefficients index modifier */
00765   twidCoefModifier <<= 2u;
00766
00767   /*  Calculation of Middle stage */
00768   for (k = fftLen / 4u; k > 4u; k >>= 2u)
00769   {
00770     /*  Initializations for the middle stage */
00771     n1 = n2;
00772     n2 >>= 2u;
00773     ic = 0u;
00774
00775     for (j = 0u; j <= (n2 - 1u); j++)
00776     {
00777       /*  index calculation for the coefficients */
00778       Co1 = pCoef16[ic * 2u];
00779       Si1 = pCoef16[(ic * 2u) + 1u];
00780       Co2 = pCoef16[2u * (ic * 2u)];
00781       Si2 = pCoef16[(2u * (ic * 2u)) + 1u];
00782       Co3 = pCoef16[3u * (ic * 2u)];
00783       Si3 = pCoef16[(3u * (ic * 2u)) + 1u];
00784
00785       /*  Twiddle coefficients index modifier */
00786       ic = ic + twidCoefModifier;
00787
00788       /*  Butterfly implementation */
00789       for (i0 = j; i0 < fftLen; i0 += n1)
00790       {
00791         /*  index calculation for the input as, */
00792         /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
00793         i1 = i0 + n2;
00794         i2 = i1 + n2;
00795         i3 = i2 + n2;
00796
00797         /*  Reading i0, i0+fftLen/2 inputs */
00798         /* Read ya (real), xa(imag) input */
00799         T0 = pSrc16[i0 * 2u];
00800         T1 = pSrc16[(i0 * 2u) + 1u];
00801
00802         /* Read yc (real), xc(imag) input */
00803         S0 = pSrc16[i2 * 2u];
00804         S1 = pSrc16[(i2 * 2u) + 1u];
00805
00806         /* R0 = (ya + yc), R1 = (xa + xc) */
00807         R0 = __SSAT(T0 + S0, 16);
00808         R1 = __SSAT(T1 + S1, 16);
00809
00810         /* S0 = (ya - yc), S1 =(xa - xc) */
00811         S0 = __SSAT(T0 - S0, 16);
00812         S1 = __SSAT(T1 - S1, 16);
00813
00814         /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
00815         /* Read yb (real), xb(imag) input */
00816         T0 = pSrc16[i1 * 2u];
00817         T1 = pSrc16[(i1 * 2u) + 1u];
00818
00819         /* Read yd (real), xd(imag) input */
00820         U0 = pSrc16[i3 * 2u];
00821         U1 = pSrc16[(i3 * 2u) + 1u];
00822
00823
00824         /* T0 = (yb + yd), T1 = (xb + xd) */
00825         T0 = __SSAT(T0 + U0, 16);
00826         T1 = __SSAT(T1 + U1, 16);
00827
00828         /*  writing the butterfly processed i0 sample */
00829
00830         /* xa' = xa + xb + xc + xd */
00831         /* ya' = ya + yb + yc + yd */
00832         out1 = ((R0 >> 1u) + (T0 >> 1u)) >> 1u;
00833         out2 = ((R1 >> 1u) + (T1 >> 1u)) >> 1u;
00834
00835         pSrc16[i0 * 2u] = out1;
00836         pSrc16[(2u * i0) + 1u] = out2;
00837
00838         /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
00839         R0 = (R0 >> 1u) - (T0 >> 1u);
00840         R1 = (R1 >> 1u) - (T1 >> 1u);
00841
00842         /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
00843         out1 = (short) ((Co2 * R0 + Si2 * R1) >> 16u);
00844
00845         /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
00846         out2 = (short) ((-Si2 * R0 + Co2 * R1) >> 16u);
00847
00848         /*  Reading i0+3fftLen/4 */
00849         /* Read yb (real), xb(imag) input */
00850         T0 = pSrc16[i1 * 2u];
00851         T1 = pSrc16[(i1 * 2u) + 1u];
00852
00853         /*  writing the butterfly processed i0 + fftLen/4 sample */
00854         /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
00855         /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
00856         pSrc16[i1 * 2u] = out1;
00857         pSrc16[(i1 * 2u) + 1u] = out2;
00858
00859         /*  Butterfly calculations */
00860
00861         /* Read yd (real), xd(imag) input */
00862         U0 = pSrc16[i3 * 2u];
00863         U1 = pSrc16[(i3 * 2u) + 1u];
00864
00865         /* T0 = yb-yd, T1 = xb-xd */
00866         T0 = __SSAT(T0 - U0, 16);
00867         T1 = __SSAT(T1 - U1, 16);
00868
00869         /* R0 = (ya-yc) + (xb- xd), R1 = (xa-xc) - (yb-yd)) */
00870         R0 = (S0 >> 1u) - (T1 >> 1u);
00871         R1 = (S1 >> 1u) + (T0 >> 1u);
00872
00873         /* S0 = (ya-yc) - (xb- xd), S1 = (xa-xc) + (yb-yd)) */
00874         S0 = (S0 >> 1u) + (T1 >> 1u);
00875         S1 = (S1 >> 1u) - (T0 >> 1u);
00876
00877         /*  Butterfly process for the i0+fftLen/2 sample */
00878         out1 = (short) ((Co1 * S0 + Si1 * S1) >> 16u);
00879
00880         out2 = (short) ((-Si1 * S0 + Co1 * S1) >> 16u);
00881
00882         /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
00883         /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
00884         pSrc16[i2 * 2u] = out1;
00885         pSrc16[(i2 * 2u) + 1u] = out2;
00886
00887         /*  Butterfly process for the i0+3fftLen/4 sample */
00888         out1 = (short) ((Si3 * R1 + Co3 * R0) >> 16u);
00889
00890         out2 = (short) ((-Si3 * R0 + Co3 * R1) >> 16u);
00891         /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */
00892         /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */
00893         pSrc16[i3 * 2u] = out1;
00894         pSrc16[(i3 * 2u) + 1u] = out2;
00895       }
00896     }
00897     /*  Twiddle coefficients index modifier */
00898     twidCoefModifier <<= 2u;
00899   }
00900   /* end of middle stage process */
00901
00902
00903   /* data is in 10.6(q6) format for the 1024 point */
00904   /* data is in 8.8(q8) format for the 256 point */
00905   /* data is in 6.10(q10) format for the 64 point */
00906   /* data is in 4.12(q12) format for the 16 point */
00907
00908   /*  Initializations for the last stage */
00909   n1 = n2;
00910   n2 >>= 2u;
00911
00912   /* start of last stage process */
00913
00914   /*  Butterfly implementation */
00915   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
00916   {
00917     /*  index calculation for the input as, */
00918     /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
00919     i1 = i0 + n2;
00920     i2 = i1 + n2;
00921     i3 = i2 + n2;
00922
00923     /*  Reading i0, i0+fftLen/2 inputs */
00924     /* Read ya (real), xa(imag) input */
00925     T0 = pSrc16[i0 * 2u];
00926     T1 = pSrc16[(i0 * 2u) + 1u];
00927
00928     /* Read yc (real), xc(imag) input */
00929     S0 = pSrc16[i2 * 2u];
00930     S1 = pSrc16[(i2 * 2u) + 1u];
00931
00932     /* R0 = (ya + yc), R1 = (xa + xc) */
00933     R0 = __SSAT(T0 + S0, 16u);
00934     R1 = __SSAT(T1 + S1, 16u);
00935
00936     /* S0 = (ya - yc), S1 = (xa - xc) */
00937     S0 = __SSAT(T0 - S0, 16u);
00938     S1 = __SSAT(T1 - S1, 16u);
00939
00940     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
00941     /* Read yb (real), xb(imag) input */
00942     T0 = pSrc16[i1 * 2u];
00943     T1 = pSrc16[(i1 * 2u) + 1u];
00944     /* Read yd (real), xd(imag) input */
00945     U0 = pSrc16[i3 * 2u];
00946     U1 = pSrc16[(i3 * 2u) + 1u];
00947
00948     /* T0 = (yb + yd), T1 = (xb + xd)) */
00949     T0 = __SSAT(T0 + U0, 16u);
00950     T1 = __SSAT(T1 + U1, 16u);
00951
00952     /*  writing the butterfly processed i0 sample */
00953     /* xa' = xa + xb + xc + xd */
00954     /* ya' = ya + yb + yc + yd */
00955     pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u);
00956     pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u);
00957
00958     /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
00959     R0 = (R0 >> 1u) - (T0 >> 1u);
00960     R1 = (R1 >> 1u) - (T1 >> 1u);
00961     /* Read yb (real), xb(imag) input */
00962     T0 = pSrc16[i1 * 2u];
00963     T1 = pSrc16[(i1 * 2u) + 1u];
00964
00965     /*  writing the butterfly processed i0 + fftLen/4 sample */
00966     /* xc' = (xa-xb+xc-xd) */
00967     /* yc' = (ya-yb+yc-yd) */
00968     pSrc16[i1 * 2u] = R0;
00969     pSrc16[(i1 * 2u) + 1u] = R1;
00970
00971     /* Read yd (real), xd(imag) input */
00972     U0 = pSrc16[i3 * 2u];
00973     U1 = pSrc16[(i3 * 2u) + 1u];
00974     /* T0 = (yb - yd), T1 = (xb - xd)  */
00975     T0 = __SSAT(T0 - U0, 16u);
00976     T1 = __SSAT(T1 - U1, 16u);
00977
00978     /*  writing the butterfly processed i0 + fftLen/2 sample */
00979     /* xb' = (xa+yb-xc-yd) */
00980     /* yb' = (ya-xb-yc+xd) */
00981     pSrc16[i2 * 2u] = (S0 >> 1u) + (T1 >> 1u);
00982     pSrc16[(i2 * 2u) + 1u] = (S1 >> 1u) - (T0 >> 1u);
00983
00984     /*  writing the butterfly processed i0 + 3fftLen/4 sample */
00985     /* xd' = (xa-yb-xc+yd) */
00986     /* yd' = (ya+xb-yc-xd) */
00987     pSrc16[i3 * 2u] = (S0 >> 1u) - (T1 >> 1u);
00988     pSrc16[(i3 * 2u) + 1u] = (S1 >> 1u) + (T0 >> 1u);
00989
00990   }
00991
00992   /* end of last stage process */
00993
00994   /* output is in 11.5(q5) format for the 1024 point */
00995   /* output is in 9.7(q7) format for the 256 point   */
00996   /* output is in 7.9(q9) format for the 64 point  */
00997   /* output is in 5.11(q11) format for the 16 point  */
00998
00999 #endif /* #ifndef ARM_MATH_CM0 */
01000
01001 }
01002
01003
01013 /*
01014 * Radix-4 IFFT algorithm used is :
01015 *
01016 * CIFFT uses same twiddle coefficients as CFFT function
01017 *  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]
01018 *
01019 *
01020 * IFFT is implemented with following changes in equations from FFT
01021 *
01022 * Input real and imaginary data:
01023 * x(n) = xa + j * ya
01024 * x(n+N/4 ) = xb + j * yb
01025 * x(n+N/2 ) = xc + j * yc
01026 * x(n+3N 4) = xd + j * yd
01027 *
01028 *
01029 * Output real and imaginary data:
01030 * x(4r) = xa'+ j * ya'
01031 * x(4r+1) = xb'+ j * yb'
01032 * x(4r+2) = xc'+ j * yc'
01033 * x(4r+3) = xd'+ j * yd'
01034 *
01035 *
01036 * Twiddle factors for radix-4 IFFT:
01037 * Wn = co1 + j * (si1)
01038 * W2n = co2 + j * (si2)
01039 * W3n = co3 + j * (si3)
01040
01041 * The real and imaginary output values for the radix-4 butterfly are
01042 * xa' = xa + xb + xc + xd
01043 * ya' = ya + yb + yc + yd
01044 * xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)
01045 * yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)
01046 * xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)
01047 * yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)
01048 * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)
01049 * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)
01050 *
01051 */
01052
01053 void arm_radix4_butterfly_inverse_q15(
01054   q15_t * pSrc16,
01055   uint32_t fftLen,
01056   q15_t * pCoef16,
01057   uint32_t twidCoefModifier)
01058 {
01059
01060 #ifndef ARM_MATH_CM0
01061
01062   /* Run the below code for Cortex-M4 and Cortex-M3 */
01063
01064   q31_t R, S, T, U;
01065   q31_t C1, C2, C3, out1, out2;
01066   q31_t *pSrc, *pCoeff;
01067   uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
01068   q15_t in;
01069
01070   /* Total process is divided into three stages */
01071
01072   /* process first stage, middle stages, & last stage */
01073
01074   /*  pointer initializations for SIMD calculations */
01075   pSrc = (q31_t *) pSrc16;
01076   pCoeff = (q31_t *) pCoef16;
01077
01078   /*  Initializations for the first stage */
01079   n2 = fftLen;
01080   n1 = n2;
01081
01082   /* n2 = fftLen/4 */
01083   n2 >>= 2u;
01084
01085   /* Index for twiddle coefficient */
01086   ic = 0u;
01087
01088   /* Index for input read and output write */
01089   i0 = 0u;
01090
01091   j = n2;
01092
01093   /* Input is in 1.15(q15) format */
01094
01095   /*  Start of first stage process */
01096   do
01097   {
01098     /*  Butterfly implementation */
01099
01100     /*  index calculation for the input as, */
01101     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
01102     i1 = i0 + n2;
01103     i2 = i1 + n2;
01104     i3 = i2 + n2;
01105
01106     /*  Reading i0, i0+fftLen/2 inputs */
01107     /* Read ya (real), xa(imag) input */
01108     T = pSrc[i0];
01109     in = ((int16_t) (T & 0xFFFF)) >> 2;
01110     T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
01111     /* Read yc (real), xc(imag) input */
01112     S = pSrc[i2];
01113     in = ((int16_t) (S & 0xFFFF)) >> 2;
01114     S = ((S >> 2) & 0xFFFF0000) | (in & 0xFFFF);
01115
01116     /* R = packed((ya + yc), (xa + xc) ) */
01117     R = __QADD16(T, S);
01118     /* S = packed((ya - yc), (xa - xc) ) */
01119     S = __QSUB16(T, S);
01120
01121     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
01122     /* Read yb (real), xb(imag) input */
01123     T = pSrc[i1];
01124     in = ((int16_t) (T & 0xFFFF)) >> 2;
01125     T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
01126     /* Read yd (real), xd(imag) input */
01127     U = pSrc[i3];
01128     in = ((int16_t) (U & 0xFFFF)) >> 2;
01129     U = ((U >> 2) & 0xFFFF0000) | (in & 0xFFFF);
01130
01131     /* T = packed((yb + yd), (xb + xd) ) */
01132     T = __QADD16(T, U);
01133
01134     /*  writing the butterfly processed i0 sample */
01135     /* xa' = xa + xb + xc + xd */
01136     /* ya' = ya + yb + yc + yd */
01137     pSrc[i0] = __SHADD16(R, T);
01138
01139     /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */
01140     R = __QSUB16(R, T);
01141     /* co2 & si2 are read from SIMD Coefficient pointer */
01142     C2 = pCoeff[2u * ic];
01143
01144 #ifndef ARM_MATH_BIG_ENDIAN
01145
01146     /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */
01147     out1 = __SMUSD(C2, R) >> 16u;
01148     /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
01149     out2 = __SMUADX(C2, R);
01150
01151 #else
01152
01153     /* xc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
01154     out1 = __SMUADX(C2, R) >> 16u;
01155     /* yc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */
01156     out2 = __SMUSD(-C2, R);
01157
01158 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
01159
01160     /*  Reading i0+fftLen/4 */
01161     /* T = packed(yb, xb) */
01162     T = pSrc[i1];
01163     in = ((int16_t) (T & 0xFFFF)) >> 2;
01164     T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
01165
01166     /* writing the butterfly processed i0 + fftLen/4 sample */
01167     /* writing output(xc', yc') in little endian format */
01168     pSrc[i1] = (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
01169
01170     /*  Butterfly calculations */
01171     /* U = packed(yd, xd) */
01172     U = pSrc[i3];
01173     in = ((int16_t) (U & 0xFFFF)) >> 2;
01174     U = ((U >> 2) & 0xFFFF0000) | (in & 0xFFFF);
01175
01176     /* T = packed(yb-yd, xb-xd) */
01177     T = __QSUB16(T, U);
01178
01179 #ifndef ARM_MATH_BIG_ENDIAN
01180
01181     /* R = packed((ya-yc) - (xb- xd) , (xa-xc) + (yb-yd)) */
01182     R = __QSAX(S, T);
01183     /* S = packed((ya-yc) + (xb- xd),  (xa-xc) - (yb-yd)) */
01184     S = __QASX(S, T);
01185
01186 #else
01187
01188     /* R = packed((ya-yc) - (xb- xd) , (xa-xc) + (yb-yd)) */
01189     R = __QASX(S, T);
01190     /* S = packed((ya-yc) + (xb- xd),  (xa-xc) - (yb-yd)) */
01191     S = __QSAX(S, T);
01192
01193 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
01194
01195     /* co1 & si1 are read from SIMD Coefficient pointer */
01196     C1 = pCoeff[ic];
01197     /*  Butterfly process for the i0+fftLen/2 sample */
01198
01199 #ifndef ARM_MATH_BIG_ENDIAN
01200
01201     /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */
01202     out1 = __SMUSD(C1, S) >> 16u;
01203     /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */
01204     out2 = __SMUADX(C1, S);
01205
01206 #else
01207
01208     /* xb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */
01209     out1 = __SMUADX(C1, S) >> 16u;
01210     /* yb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */
01211     out2 = __SMUSD(-C1, S);
01212
01213 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
01214
01215     /* writing output(xb', yb') in little endian format */
01216     pSrc[i2] = ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF);
01217
01218     /* co3 & si3 are read from SIMD Coefficient pointer */
01219     C3 = pCoeff[3u * ic];
01220     /*  Butterfly process for the i0+3fftLen/4 sample */
01221
01222 #ifndef ARM_MATH_BIG_ENDIAN
01223
01224     /* xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3) */
01225     out1 = __SMUSD(C3, R) >> 16u;
01226     /* yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3) */
01227     out2 = __SMUADX(C3, R);
01228
01229 #else
01230
01231     /* xd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3) */
01232     out1 = __SMUADX(C3, R) >> 16u;
01233     /* yd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3) */
01234     out2 = __SMUSD(-C3, R);
01235
01236 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
01237
01238     /* writing output(xd', yd') in little endian format */
01239     pSrc[i3] = ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
01240
01241     /*  Twiddle coefficients index modifier */
01242     ic = ic + twidCoefModifier;
01243
01244     /*  Updating input index */
01245     i0 = i0 + 1u;
01246
01247   } while(--j);
01248
01249   /*  End of first stage process */
01250
01251   /* data is in 4.11(q11) format */
01252
01253
01254   /*  Start of Middle stage process */
01255
01256   /*  Twiddle coefficients index modifier */
01257   twidCoefModifier <<= 2u;
01258
01259   /*  Calculation of Middle stage */
01260   for (k = fftLen / 4u; k > 4u; k >>= 2u)
01261   {
01262     /*  Initializations for the middle stage */
01263     n1 = n2;
01264     n2 >>= 2u;
01265     ic = 0u;
01266
01267     for (j = 0u; j <= (n2 - 1u); j++)
01268     {
01269       /*  index calculation for the coefficients */
01270       C1 = pCoeff[ic];
01271       C2 = pCoeff[2u * ic];
01272       C3 = pCoeff[3u * ic];
01273
01274       /*  Twiddle coefficients index modifier */
01275       ic = ic + twidCoefModifier;
01276
01277       /*  Butterfly implementation */
01278       for (i0 = j; i0 < fftLen; i0 += n1)
01279       {
01280         /*  index calculation for the input as, */
01281         /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
01282         i1 = i0 + n2;
01283         i2 = i1 + n2;
01284         i3 = i2 + n2;
01285
01286         /*  Reading i0, i0+fftLen/2 inputs */
01287         /* Read ya (real), xa(imag) input */
01288         T = pSrc[i0];
01289
01290         /* Read yc (real), xc(imag) input */
01291         S = pSrc[i2];
01292
01293
01294         /* R = packed( (ya + yc), (xa + xc)) */
01295         R = __QADD16(T, S);
01296         /* S = packed((ya - yc), (xa - xc)) */
01297         S = __QSUB16(T, S);
01298
01299         /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
01300         /* Read yb (real), xb(imag) input */
01301         T = pSrc[i1];
01302
01303         /* Read yd (real), xd(imag) input */
01304         U = pSrc[i3];
01305
01306
01307         /* T = packed( (yb + yd), (xb + xd)) */
01308         T = __QADD16(T, U);
01309
01310         /*  writing the butterfly processed i0 sample */
01311         /* xa' = xa + xb + xc + xd */
01312         /* ya' = ya + yb + yc + yd */
01313         out1 = __SHADD16(R, T);
01314         in = ((int16_t) (out1 & 0xFFFF)) >> 1;
01315         out1 = ((out1 >> 1) & 0xFFFF0000) | (in & 0xFFFF);
01316         pSrc[i0] = out1;
01317
01318
01319
01320         /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
01321         R = __SHSUB16(R, T);
01322
01323
01324 #ifndef ARM_MATH_BIG_ENDIAN
01325
01326         /* (ya-yb+yc-yd)* (si2) - (xa-xb+xc-xd)* co2 */
01327         out1 = __SMUSD(C2, R) >> 16u;
01328         /* (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
01329         out2 = __SMUADX(C2, R);
01330
01331 #else
01332
01333         /* (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
01334         out1 = __SMUADX(R, C2) >> 16u;
01335         /* (ya-yb+yc-yd)* (si2) - (xa-xb+xc-xd)* co2 */
01336         out2 = __SMUSD(-C2, R);
01337
01338 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
01339
01340         /*  Reading i0+3fftLen/4 */
01341         /* Read yb (real), xb(imag) input */
01342         T = pSrc[i1];
01343
01344         /*  writing the butterfly processed i0 + fftLen/4 sample */
01345         /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */
01346         /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
01347         pSrc[i1] = ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
01348
01349         /*  Butterfly calculations */
01350         /* Read yd (real), xd(imag) input */
01351         U = pSrc[i3];
01352
01353         /* T = packed(yb-yd, xb-xd) */
01354         T = __QSUB16(T, U);
01355
01356
01357 #ifndef ARM_MATH_BIG_ENDIAN
01358
01359         /* R = packed((ya-yc) - (xb- xd) , (xa-xc) + (yb-yd)) */
01360         R = __SHSAX(S, T);
01361
01362         /* S = packed((ya-yc) + (xb- xd),  (xa-xc) - (yb-yd)) */
01363         S = __SHASX(S, T);
01364         /*  Butterfly process for the i0+fftLen/2 sample */
01365         out1 = __SMUSD(C1, S) >> 16u;
01366         out2 = __SMUADX(C1, S);
01367
01368 #else
01369
01370         /* R = packed((ya-yc) - (xb- xd) , (xa-xc) + (yb-yd)) */
01371         R = __SHASX(S, T);
01372
01373         /* S = packed((ya-yc) + (xb- xd),  (xa-xc) - (yb-yd)) */
01374         S = __SHSAX(S, T);
01375         /*  Butterfly process for the i0+fftLen/2 sample */
01376         out1 = __SMUADX(S, C1) >> 16u;
01377         out2 = __SMUSD(-C1, S);
01378
01379 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
01380
01381         /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */
01382         /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */
01383         pSrc[i2] = ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
01384
01385         /*  Butterfly process for the i0+3fftLen/4 sample */
01386
01387 #ifndef ARM_MATH_BIG_ENDIAN
01388
01389         out1 = __SMUSD(C3, R) >> 16u;
01390         out2 = __SMUADX(C3, R);
01391
01392 #else
01393
01394         out1 = __SMUADX(C3, R) >> 16u;
01395         out2 = __SMUSD(-C3, R);
01396
01397 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
01398
01399         /* xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3) */
01400         /* yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3) */
01401         pSrc[i3] = ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
01402
01403
01404       }
01405     }
01406     /*  Twiddle coefficients index modifier */
01407     twidCoefModifier <<= 2u;
01408   }
01409   /*  End of Middle stages process */
01410
01411
01412   /* data is in 10.6(q6) format for the 1024 point */
01413   /* data is in 8.8(q8) format for the 256 point   */
01414   /* data is in 6.10(q10) format for the 64 point  */
01415   /* data is in 4.12(q12) format for the 16 point  */
01416
01417   /* start of last stage process */
01418
01419
01420   /*  Initializations for the last stage */
01421   n1 = n2;
01422   n2 >>= 2u;
01423
01424   /*  Butterfly implementation */
01425   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
01426   {
01427     /*  index calculation for the input as, */
01428     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
01429     i1 = i0 + n2;
01430     i2 = i1 + n2;
01431     i3 = i2 + n2;
01432
01433     /*  Reading i0, i0+fftLen/2 inputs */
01434     /* Read ya (real), xa(imag) input */
01435     T = pSrc[i0];
01436     /* Read yc (real), xc(imag) input */
01437     S = pSrc[i2];
01438
01439     /* R = packed((ya + yc), (xa + xc)) */
01440     R = __QADD16(T, S);
01441     /* S = packed((ya - yc), (xa - xc)) */
01442     S = __QSUB16(T, S);
01443
01444     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
01445     /* Read yb (real), xb(imag) input */
01446     T = pSrc[i1];
01447     /* Read yd (real), xd(imag) input */
01448     U = pSrc[i3];
01449
01450     /* T = packed((yb + yd), (xb + xd)) */
01451     T = __QADD16(T, U);
01452
01453     /*  writing the butterfly processed i0 sample */
01454     /* xa' = xa + xb + xc + xd */
01455     /* ya' = ya + yb + yc + yd */
01456     pSrc[i0] = __SHADD16(R, T);
01457
01458     /* R = packed((ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
01459     R = __SHSUB16(R, T);
01460
01461     /* Read yb (real), xb(imag) input */
01462     T = pSrc[i1];
01463
01464     /*  writing the butterfly processed i0 + fftLen/4 sample */
01465     /* xc' = (xa-xb+xc-xd) */
01466     /* yc' = (ya-yb+yc-yd) */
01467     pSrc[i1] = R;
01468
01469     /* Read yd (real), xd(imag) input */
01470     U = pSrc[i3];
01471     /* T = packed( (yb - yd), (xb - xd))  */
01472     T = __QSUB16(T, U);
01473
01474
01475 #ifndef ARM_MATH_BIG_ENDIAN
01476
01477     /*  writing the butterfly processed i0 + fftLen/2 sample */
01478     /* xb' = (xa-yb-xc+yd) */
01479     /* yb' = (ya+xb-yc-xd) */
01480     pSrc[i2] = __SHASX(S, T);
01481
01482     /*  writing the butterfly processed i0 + 3fftLen/4 sample */
01483     /* xd' = (xa+yb-xc-yd) */
01484     /* yd' = (ya-xb-yc+xd) */
01485     pSrc[i3] = __SHSAX(S, T);
01486
01487
01488 #else
01489
01490     /*  writing the butterfly processed i0 + fftLen/2 sample */
01491     /* xb' = (xa-yb-xc+yd) */
01492     /* yb' = (ya+xb-yc-xd) */
01493     pSrc[i2] = __SHSAX(S, T);
01494
01495     /*  writing the butterfly processed i0 + 3fftLen/4 sample */
01496     /* xd' = (xa+yb-xc-yd) */
01497     /* yd' = (ya-xb-yc+xd) */
01498     pSrc[i3] = __SHASX(S, T);
01499
01500 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
01501
01502   }
01503   /* end of last stage  process */
01504
01505   /* output is in 11.5(q5) format for the 1024 point */
01506   /* output is in 9.7(q7) format for the 256 point   */
01507   /* output is in 7.9(q9) format for the 64 point  */
01508   /* output is in 5.11(q11) format for the 16 point  */
01509
01510
01511 #else
01512
01513   /* Run the below code for Cortex-M0 */
01514
01515   q15_t R0, R1, S0, S1, T0, T1, U0, U1;
01516   q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
01517   uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
01518
01519   /* Total process is divided into three stages */
01520
01521   /* process first stage, middle stages, & last stage */
01522
01523   /*  Initializations for the first stage */
01524   n2 = fftLen;
01525   n1 = n2;
01526
01527   /* n2 = fftLen/4 */
01528   n2 >>= 2u;
01529
01530   /* Index for twiddle coefficient */
01531   ic = 0u;
01532
01533   /* Index for input read and output write */
01534   i0 = 0u;
01535
01536   j = n2;
01537
01538   /* Input is in 1.15(q15) format */
01539
01540   /*  Start of first stage process */
01541   do
01542   {
01543     /*  Butterfly implementation */
01544
01545     /*  index calculation for the input as, */
01546     /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
01547     i1 = i0 + n2;
01548     i2 = i1 + n2;
01549     i3 = i2 + n2;
01550
01551     /*  Reading i0, i0+fftLen/2 inputs */
01552     /* input is down scale by 4 to avoid overflow */
01553     /* Read ya (real), xa(imag) input */
01554     T0 = pSrc16[i0 * 2u] >> 2u;
01555     T1 = pSrc16[(i0 * 2u) + 1u] >> 2u;
01556     /* input is down scale by 4 to avoid overflow */
01557     /* Read yc (real), xc(imag) input */
01558     S0 = pSrc16[i2 * 2u] >> 2u;
01559     S1 = pSrc16[(i2 * 2u) + 1u] >> 2u;
01560
01561     /* R0 = (ya + yc), R1 = (xa + xc) */
01562     R0 = __SSAT(T0 + S0, 16u);
01563     R1 = __SSAT(T1 + S1, 16u);
01564     /* S0 = (ya - yc), S1 = (xa - xc) */
01565     S0 = __SSAT(T0 - S0, 16u);
01566     S1 = __SSAT(T1 - S1, 16u);
01567
01568     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
01569     /* input is down scale by 4 to avoid overflow */
01570     /* Read yb (real), xb(imag) input */
01571     T0 = pSrc16[i1 * 2u] >> 2u;
01572     T1 = pSrc16[(i1 * 2u) + 1u] >> 2u;
01573     /* Read yd (real), xd(imag) input */
01574     /* input is down scale by 4 to avoid overflow */
01575     U0 = pSrc16[i3 * 2u] >> 2u;
01576     U1 = pSrc16[(i3 * 2u) + 1u] >> 2u;
01577
01578     /* T0 = (yb + yd), T1 = (xb + xd) */
01579     T0 = __SSAT(T0 + U0, 16u);
01580     T1 = __SSAT(T1 + U1, 16u);
01581
01582     /*  writing the butterfly processed i0 sample */
01583     /* xa' = xa + xb + xc + xd */
01584     /* ya' = ya + yb + yc + yd */
01585     pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u);
01586     pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u);
01587
01588     /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc)- (xb + xd) */
01589     R0 = __SSAT(R0 - T0, 16u);
01590     R1 = __SSAT(R1 - T1, 16u);
01591     /* co2 & si2 are read from Coefficient pointer */
01592     Co2 = pCoef16[2u * ic * 2u];
01593     Si2 = pCoef16[(2u * ic * 2u) + 1u];
01594     /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */
01595     out1 = (short) ((Co2 * R0 - Si2 * R1) >> 16u);
01596     /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
01597     out2 = (short) ((Si2 * R0 + Co2 * R1) >> 16u);
01598
01599     /*  Reading i0+fftLen/4 */
01600     /* input is down scale by 4 to avoid overflow */
01601     /* T0 = yb, T1 = xb */
01602     T0 = pSrc16[i1 * 2u] >> 2u;
01603     T1 = pSrc16[(i1 * 2u) + 1u] >> 2u;
01604
01605     /* writing the butterfly processed i0 + fftLen/4 sample */
01606     /* writing output(xc', yc') in little endian format */
01607     pSrc16[i1 * 2u] = out1;
01608     pSrc16[(i1 * 2u) + 1u] = out2;
01609
01610     /*  Butterfly calculations */
01611     /* input is down scale by 4 to avoid overflow */
01612     /* U0 = yd, U1 = xd) */
01613     U0 = pSrc16[i3 * 2u] >> 2u;
01614     U1 = pSrc16[(i3 * 2u) + 1u] >> 2u;
01615
01616     /* T0 = yb-yd, T1 = xb-xd) */
01617     T0 = __SSAT(T0 - U0, 16u);
01618     T1 = __SSAT(T1 - U1, 16u);
01619     /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */
01620     R0 = (short) __SSAT((q31_t) (S0 + T1), 16);
01621     R1 = (short) __SSAT((q31_t) (S1 - T0), 16);
01622     /* S = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */
01623     S0 = (short) __SSAT((q31_t) (S0 - T1), 16);
01624     S1 = (short) __SSAT((q31_t) (S1 + T0), 16);
01625
01626     /* co1 & si1 are read from Coefficient pointer */
01627     Co1 = pCoef16[ic * 2u];
01628     Si1 = pCoef16[(ic * 2u) + 1u];
01629     /*  Butterfly process for the i0+fftLen/2 sample */
01630     /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */
01631     out1 = (short) ((Co1 * S0 - Si1 * S1) >> 16u);
01632     /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */
01633     out2 = (short) ((Si1 * S0 + Co1 * S1) >> 16u);
01634     /* writing output(xb', yb') in little endian format */
01635     pSrc16[i2 * 2u] = out1;
01636     pSrc16[(i2 * 2u) + 1u] = out2;
01637
01638     /* Co3 & si3 are read from Coefficient pointer */
01639     Co3 = pCoef16[3u * ic * 2u];
01640     Si3 = pCoef16[(3u * ic * 2u) + 1u];
01641     /*  Butterfly process for the i0+3fftLen/4 sample */
01642     /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */
01643     out1 = (short) ((Co3 * R0 - Si3 * R1) >> 16u);
01644     /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */
01645     out2 = (short) ((Si3 * R0 + Co3 * R1) >> 16u);
01646     /* writing output(xd', yd') in little endian format */
01647     pSrc16[i3 * 2u] = out1;
01648     pSrc16[(i3 * 2u) + 1u] = out2;
01649
01650     /*  Twiddle coefficients index modifier */
01651     ic = ic + twidCoefModifier;
01652
01653     /*  Updating input index */
01654     i0 = i0 + 1u;
01655
01656   } while(--j);
01657
01658   /*  End of first stage process */
01659
01660   /* data is in 4.11(q11) format */
01661
01662
01663   /*  Start of Middle stage process */
01664
01665   /*  Twiddle coefficients index modifier */
01666   twidCoefModifier <<= 2u;
01667
01668   /*  Calculation of Middle stage */
01669   for (k = fftLen / 4u; k > 4u; k >>= 2u)
01670   {
01671     /*  Initializations for the middle stage */
01672     n1 = n2;
01673     n2 >>= 2u;
01674     ic = 0u;
01675
01676     for (j = 0u; j <= (n2 - 1u); j++)
01677     {
01678       /*  index calculation for the coefficients */
01679       Co1 = pCoef16[ic * 2u];
01680       Si1 = pCoef16[(ic * 2u) + 1u];
01681       Co2 = pCoef16[2u * ic * 2u];
01682       Si2 = pCoef16[2u * ic * 2u + 1u];
01683       Co3 = pCoef16[3u * ic * 2u];
01684       Si3 = pCoef16[(3u * ic * 2u) + 1u];
01685
01686       /*  Twiddle coefficients index modifier */
01687       ic = ic + twidCoefModifier;
01688
01689       /*  Butterfly implementation */
01690       for (i0 = j; i0 < fftLen; i0 += n1)
01691       {
01692         /*  index calculation for the input as, */
01693         /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
01694         i1 = i0 + n2;
01695         i2 = i1 + n2;
01696         i3 = i2 + n2;
01697
01698         /*  Reading i0, i0+fftLen/2 inputs */
01699         /* Read ya (real), xa(imag) input */
01700         T0 = pSrc16[i0 * 2u];
01701         T1 = pSrc16[(i0 * 2u) + 1u];
01702
01703         /* Read yc (real), xc(imag) input */
01704         S0 = pSrc16[i2 * 2u];
01705         S1 = pSrc16[(i2 * 2u) + 1u];
01706
01707
01708         /* R0 = (ya + yc), R1 = (xa + xc) */
01709         R0 = __SSAT(T0 + S0, 16u);
01710         R1 = __SSAT(T1 + S1, 16u);
01711         /* S0 = (ya - yc), S1 = (xa - xc) */
01712         S0 = __SSAT(T0 - S0, 16u);
01713         S1 = __SSAT(T1 - S1, 16u);
01714
01715         /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
01716         /* Read yb (real), xb(imag) input */
01717         T0 = pSrc16[i1 * 2u];
01718         T1 = pSrc16[(i1 * 2u) + 1u];
01719
01720         /* Read yd (real), xd(imag) input */
01721         U0 = pSrc16[i3 * 2u];
01722         U1 = pSrc16[(i3 * 2u) + 1u];
01723
01724         /* T0 = (yb + yd), T1 = (xb + xd) */
01725         T0 = __SSAT(T0 + U0, 16u);
01726         T1 = __SSAT(T1 + U1, 16u);
01727
01728         /*  writing the butterfly processed i0 sample */
01729         /* xa' = xa + xb + xc + xd */
01730         /* ya' = ya + yb + yc + yd */
01731         pSrc16[i0 * 2u] = ((R0 >> 1u) + (T0 >> 1u)) >> 1u;
01732         pSrc16[(i0 * 2u) + 1u] = ((R1 >> 1u) + (T1 >> 1u)) >> 1u;
01733
01734         /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
01735         R0 = (R0 >> 1u) - (T0 >> 1u);
01736         R1 = (R1 >> 1u) - (T1 >> 1u);
01737
01738         /* (ya-yb+yc-yd)* (si2) - (xa-xb+xc-xd)* co2 */
01739         out1 = (short) ((Co2 * R0 - Si2 * R1) >> 16);
01740         /* (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
01741         out2 = (short) ((Si2 * R0 + Co2 * R1) >> 16);
01742
01743         /*  Reading i0+3fftLen/4 */
01744         /* Read yb (real), xb(imag) input */
01745         T0 = pSrc16[i1 * 2u];
01746         T1 = pSrc16[(i1 * 2u) + 1u];
01747
01748         /*  writing the butterfly processed i0 + fftLen/4 sample */
01749         /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */
01750         /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
01751         pSrc16[i1 * 2u] = out1;
01752         pSrc16[(i1 * 2u) + 1u] = out2;
01753
01754         /*  Butterfly calculations */
01755         /* Read yd (real), xd(imag) input */
01756         U0 = pSrc16[i3 * 2u];
01757         U1 = pSrc16[(i3 * 2u) + 1u];
01758
01759         /* T0 = yb-yd, T1 = xb-xd) */
01760         T0 = __SSAT(T0 - U0, 16u);
01761         T1 = __SSAT(T1 - U1, 16u);
01762
01763         /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */
01764         R0 = (S0 >> 1u) + (T1 >> 1u);
01765         R1 = (S1 >> 1u) - (T0 >> 1u);
01766
01767         /* S1 = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */
01768         S0 = (S0 >> 1u) - (T1 >> 1u);
01769         S1 = (S1 >> 1u) + (T0 >> 1u);
01770
01771         /*  Butterfly process for the i0+fftLen/2 sample */
01772         out1 = (short) ((Co1 * S0 - Si1 * S1) >> 16u);
01773         out2 = (short) ((Si1 * S0 + Co1 * S1) >> 16u);
01774         /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */
01775         /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */
01776         pSrc16[i2 * 2u] = out1;
01777         pSrc16[(i2 * 2u) + 1u] = out2;
01778
01779         /*  Butterfly process for the i0+3fftLen/4 sample */
01780         out1 = (short) ((Co3 * R0 - Si3 * R1) >> 16u);
01781
01782         out2 = (short) ((Si3 * R0 + Co3 * R1) >> 16u);
01783         /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */
01784         /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */
01785         pSrc16[i3 * 2u] = out1;
01786         pSrc16[(i3 * 2u) + 1u] = out2;
01787
01788
01789       }
01790     }
01791     /*  Twiddle coefficients index modifier */
01792     twidCoefModifier <<= 2u;
01793   }
01794   /*  End of Middle stages process */
01795
01796
01797   /* data is in 10.6(q6) format for the 1024 point */
01798   /* data is in 8.8(q8) format for the 256 point   */
01799   /* data is in 6.10(q10) format for the 64 point  */
01800   /* data is in 4.12(q12) format for the 16 point  */
01801
01802   /* start of last stage process */
01803
01804
01805   /*  Initializations for the last stage */
01806   n1 = n2;
01807   n2 >>= 2u;
01808
01809   /*  Butterfly implementation */
01810   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
01811   {
01812     /*  index calculation for the input as, */
01813     /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
01814     i1 = i0 + n2;
01815     i2 = i1 + n2;
01816     i3 = i2 + n2;
01817
01818     /*  Reading i0, i0+fftLen/2 inputs */
01819     /* Read ya (real), xa(imag) input */
01820     T0 = pSrc16[i0 * 2u];
01821     T1 = pSrc16[(i0 * 2u) + 1u];
01822     /* Read yc (real), xc(imag) input */
01823     S0 = pSrc16[i2 * 2u];
01824     S1 = pSrc16[(i2 * 2u) + 1u];
01825
01826     /* R0 = (ya + yc), R1 = (xa + xc) */
01827     R0 = __SSAT(T0 + S0, 16u);
01828     R1 = __SSAT(T1 + S1, 16u);
01829     /* S0 = (ya - yc), S1 = (xa - xc) */
01830     S0 = __SSAT(T0 - S0, 16u);
01831     S1 = __SSAT(T1 - S1, 16u);
01832
01833     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
01834     /* Read yb (real), xb(imag) input */
01835     T0 = pSrc16[i1 * 2u];
01836     T1 = pSrc16[(i1 * 2u) + 1u];
01837     /* Read yd (real), xd(imag) input */
01838     U0 = pSrc16[i3 * 2u];
01839     U1 = pSrc16[(i3 * 2u) + 1u];
01840
01841     /* T0 = (yb + yd), T1 = (xb + xd) */
01842     T0 = __SSAT(T0 + U0, 16u);
01843     T1 = __SSAT(T1 + U1, 16u);
01844
01845     /*  writing the butterfly processed i0 sample */
01846     /* xa' = xa + xb + xc + xd */
01847     /* ya' = ya + yb + yc + yd */
01848     pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u);
01849     pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u);
01850
01851     /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
01852     R0 = (R0 >> 1u) - (T0 >> 1u);
01853     R1 = (R1 >> 1u) - (T1 >> 1u);
01854
01855     /* Read yb (real), xb(imag) input */
01856     T0 = pSrc16[i1 * 2u];
01857     T1 = pSrc16[(i1 * 2u) + 1u];
01858
01859     /*  writing the butterfly processed i0 + fftLen/4 sample */
01860     /* xc' = (xa-xb+xc-xd) */
01861     /* yc' = (ya-yb+yc-yd) */
01862     pSrc16[i1 * 2u] = R0;
01863     pSrc16[(i1 * 2u) + 1u] = R1;
01864
01865     /* Read yd (real), xd(imag) input */
01866     U0 = pSrc16[i3 * 2u];
01867     U1 = pSrc16[(i3 * 2u) + 1u];
01868     /* T0 = (yb - yd), T1 = (xb - xd) */
01869     T0 = __SSAT(T0 - U0, 16u);
01870     T1 = __SSAT(T1 - U1, 16u);
01871
01872     /*  writing the butterfly processed i0 + fftLen/2 sample */
01873     /* xb' = (xa-yb-xc+yd) */
01874     /* yb' = (ya+xb-yc-xd) */
01875     pSrc16[i2 * 2u] = (S0 >> 1u) - (T1 >> 1u);
01876     pSrc16[(i2 * 2u) + 1u] = (S1 >> 1u) + (T0 >> 1u);
01877
01878
01879     /*  writing the butterfly processed i0 + 3fftLen/4 sample */
01880     /* xd' = (xa+yb-xc-yd) */
01881     /* yd' = (ya-xb-yc+xd) */
01882     pSrc16[i3 * 2u] = (S0 >> 1u) + (T1 >> 1u);
01883     pSrc16[(i3 * 2u) + 1u] = (S1 >> 1u) - (T0 >> 1u);
01884   }
01885   /* end of last stage  process */
01886
01887   /* output is in 11.5(q5) format for the 1024 point */
01888   /* output is in 9.7(q7) format for the 256 point   */
01889   /* output is in 7.9(q9) format for the 64 point  */
01890   /* output is in 5.11(q11) format for the 16 point  */
01891
01892 #endif /* #ifndef ARM_MATH_CM0 */
01893
01894 }
01895
01896
01897 /*
01898    * @brief  In-place bit reversal function.
01899    * @param[in, out] *pSrc        points to the in-place buffer of Q15 data type.
01900    * @param[in]      fftLen       length of the FFT.
01901    * @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
01902    * @param[in]      *pBitRevTab  points to bit reversal table.
01903    * @return none.
01904  */
01905
01906 void arm_bitreversal_q15(
01907   q15_t * pSrc16,
01908   uint32_t fftLen,
01909   uint16_t bitRevFactor,
01910   uint16_t * pBitRevTab)
01911 {
01912   q31_t *pSrc = (q31_t *) pSrc16;
01913   q31_t in;
01914   uint32_t fftLenBy2, fftLenBy2p1;
01915   uint32_t i, j;
01916
01917   /*  Initializations */
01918   j = 0u;
01919   fftLenBy2 = fftLen / 2u;
01920   fftLenBy2p1 = (fftLen / 2u) + 1u;
01921
01922   /* Bit Reversal Implementation */
01923   for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
01924   {
01925     if(i < j)
01926     {
01927       /*  pSrc[i] <-> pSrc[j]; */
01928       /*  pSrc[i+1u] <-> pSrc[j+1u] */
01929       in = pSrc[i];
01930       pSrc[i] = pSrc[j];
01931       pSrc[j] = in;
01932
01933       /*  pSrc[i + fftLenBy2p1] <-> pSrc[j + fftLenBy2p1];  */
01934       /*  pSrc[i + fftLenBy2p1+1u] <-> pSrc[j + fftLenBy2p1+1u] */
01935       in = pSrc[i + fftLenBy2p1];
01936       pSrc[i + fftLenBy2p1] = pSrc[j + fftLenBy2p1];
01937       pSrc[j + fftLenBy2p1] = in;
01938     }
01939
01940     /*  pSrc[i+1u] <-> pSrc[j+fftLenBy2];         */
01941     /*  pSrc[i+2] <-> pSrc[j+fftLenBy2+1u]  */
01942     in = pSrc[i + 1u];
01943     pSrc[i + 1u] = pSrc[j + fftLenBy2];
01944     pSrc[j + fftLenBy2] = in;
01945
01946     /*  Reading the index for the bit reversal */
01947     j = *pBitRevTab;
01948
01949     /*  Updating the bit reversal index depending on the fft length  */
01950     pBitRevTab += bitRevFactor;
01951   }
01952 }
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CMSIS DSP Software Library: arm_cfft_radix4_q31.c File Reference

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Functions

arm_cfft_radix4_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void | arm_cfft_radix4_q31 (const arm_cfft_radix4_instance_q31 *S, q31_t *pSrc)
void | arm_radix4_butterfly_q31 (q31_t *pSrc, uint32_t fftLen, q31_t *pCoef, uint32_t twidCoefModifier)
void | arm_radix4_butterfly_inverse_q31 (q31_t *pSrc, uint32_t fftLen, q31_t *pCoef, uint32_t twidCoefModifier)
void | arm_bitreversal_q31 (q31_t *pSrc, uint32_t fftLen, uint16_t bitRevFactor, uint16_t *pBitRevTable)

Function Documentation

void arm_radix4_butterfly_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | q31_t * | pCoef,
 |  | uint32_t | twidCoefModifier
 | ) |  |

Core function for the Q31 CFFT butterfly process.

end of CFFT_CIFFT group

Parameters:
[in,out] | *pSrc | points to the in-place buffer of Q31 data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 139 of file arm_cfft_radix4_q31.c.

void arm_radix4_butterfly_inverse_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | q31_t * | pCoef,
 |  | uint32_t | twidCoefModifier
 | ) |  |

Core function for the Q31 CIFFT butterfly process.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of Q31 data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 517 of file arm_cfft_radix4_q31.c.

void arm_bitreversal_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | uint16_t | bitRevFactor,
 |  | uint16_t * | pBitRevTab
 | ) |  |

In-place bit reversal function.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of Q31 data type.
[in] | fftLen | length of the FFT.
[in] | bitRevFactor | bit reversal modifier that supports different size FFTs with the same bit reversal table
[in] | *pBitRevTab | points to bit reversal table.
Returns:
none.

Definition at line 848 of file arm_cfft_radix4_q31.c.

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CMSIS DSP Software Library: arm_cfft_radix4_q31.c Source File

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arm_cfft_radix4_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cfft_radix4_q31.c
00009 *
00010 * Description:  This file has function definition of Radix-4 FFT & IFFT function and
00011 *               In-place bit reversal using bit reversal table
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 *
00030 * Version 0.0.5  2010/04/26
00031 *    incorporated review comments and updated with latest CMSIS layer
00032 *
00033 * Version 0.0.3  2010/03/10
00034 *    Initial version
00035 * -------------------------------------------------------------------- */
00036 #include "arm_math.h"
00037
00038
00066 void arm_cfft_radix4_q31(
00067   const arm_cfft_radix4_instance_q31 * S,
00068   q31_t * pSrc)
00069 {
00070   if(S->ifftFlag == 1u)
00071   {
00072     /* Complex IFFT radix-4 */
00073     arm_radix4_butterfly_inverse_q31(pSrc, S->fftLen, S->pTwiddle,
00074                                      S->twidCoefModifier);
00075   }
00076   else
00077   {
00078     /* Complex FFT radix-4 */
00079     arm_radix4_butterfly_q31(pSrc, S->fftLen, S->pTwiddle,
00080                              S->twidCoefModifier);
00081   }
00082
00083
00084   if(S->bitReverseFlag == 1u)
00085   {
00086     /*  Bit Reversal */
00087     arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
00088   }
00089
00090 }
00091
00096 /*
00097 * Radix-4 FFT algorithm used is :
00098 *
00099 * Input real and imaginary data:
00100 * x(n) = xa + j * ya
00101 * x(n+N/4 ) = xb + j * yb
00102 * x(n+N/2 ) = xc + j * yc
00103 * x(n+3N 4) = xd + j * yd
00104 *
00105 *
00106 * Output real and imaginary data:
00107 * x(4r) = xa'+ j * ya'
00108 * x(4r+1) = xb'+ j * yb'
00109 * x(4r+2) = xc'+ j * yc'
00110 * x(4r+3) = xd'+ j * yd'
00111 *
00112 *
00113 * Twiddle factors for radix-4 FFT:
00114 * Wn = co1 + j * (- si1)
00115 * W2n = co2 + j * (- si2)
00116 * W3n = co3 + j * (- si3)
00117 *
00118 *  Butterfly implementation:
00119 * xa' = xa + xb + xc + xd
00120 * ya' = ya + yb + yc + yd
00121 * xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)
00122 * yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)
00123 * xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)
00124 * yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)
00125 * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)
00126 * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)
00127 *
00128 */
00129
00139 void arm_radix4_butterfly_q31(
00140   q31_t * pSrc,
00141   uint32_t fftLen,
00142   q31_t * pCoef,
00143   uint32_t twidCoefModifier)
00144 {
00145   uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
00146   q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
00147
00148
00149   /* Total process is divided into three stages */
00150
00151   /* process first stage, middle stages, & last stage */
00152
00153
00154   /* start of first stage process */
00155
00156   /*  Initializations for the first stage */
00157   n2 = fftLen;
00158   n1 = n2;
00159   /* n2 = fftLen/4 */
00160   n2 >>= 2u;
00161   i0 = 0u;
00162   ia1 = 0u;
00163
00164   j = n2;
00165
00166   /*  Calculation of first stage */
00167   do
00168   {
00169     /*  index calculation for the input as, */
00170     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
00171     i1 = i0 + n2;
00172     i2 = i1 + n2;
00173     i3 = i2 + n2;
00174
00175     /* input is in 1.31(q31) format and provide 4 guard bits for the input */
00176
00177     /*  Butterfly implementation */
00178     /* xa + xc */
00179     r1 = (pSrc[(2u * i0)] >> 4u) + (pSrc[(2u * i2)] >> 4u);
00180     /* xa - xc */
00181     r2 = (pSrc[2u * i0] >> 4u) - (pSrc[2u * i2] >> 4u);
00182
00183     /* ya + yc */
00184     s1 = (pSrc[(2u * i0) + 1u] >> 4u) + (pSrc[(2u * i2) + 1u] >> 4u);
00185     /* ya - yc */
00186     s2 = (pSrc[(2u * i0) + 1u] >> 4u) - (pSrc[(2u * i2) + 1u] >> 4u);
00187
00188     /* xb + xd */
00189     t1 = (pSrc[2u * i1] >> 4u) + (pSrc[2u * i3] >> 4u);
00190
00191     /* xa' = xa + xb + xc + xd */
00192     pSrc[2u * i0] = (r1 + t1);
00193     /* (xa + xc) - (xb + xd) */
00194     r1 = r1 - t1;
00195     /* yb + yd */
00196     t2 = (pSrc[(2u * i1) + 1u] >> 4u) + (pSrc[(2u * i3) + 1u] >> 4u);
00197     /* ya' = ya + yb + yc + yd */
00198     pSrc[(2u * i0) + 1u] = (s1 + t2);
00199
00200     /* (ya + yc) - (yb + yd) */
00201     s1 = s1 - t2;
00202
00203     /* yb - yd */
00204     t1 = (pSrc[(2u * i1) + 1u] >> 4u) - (pSrc[(2u * i3) + 1u] >> 4u);
00205     /* xb - xd */
00206     t2 = (pSrc[2u * i1] >> 4u) - (pSrc[2u * i3] >> 4u);
00207
00208     /*  index calculation for the coefficients */
00209     ia2 = 2u * ia1;
00210     co2 = pCoef[ia2 * 2u];
00211     si2 = pCoef[(ia2 * 2u) + 1u];
00212
00213     /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
00214     pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
00215                      ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1u;
00216
00217     /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
00218     pSrc[(2u * i1) + 1u] = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
00219                             ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1u;
00220
00221     /* (xa - xc) + (yb - yd) */
00222     r1 = r2 + t1;
00223     /* (xa - xc) - (yb - yd) */
00224     r2 = r2 - t1;
00225
00226     /* (ya - yc) - (xb - xd) */
00227     s1 = s2 - t2;
00228     /* (ya - yc) + (xb - xd) */
00229     s2 = s2 + t2;
00230
00231     co1 = pCoef[ia1 * 2u];
00232     si1 = pCoef[(ia1 * 2u) + 1u];
00233
00234     /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
00235     pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
00236                      ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1u;
00237
00238     /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
00239     pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
00240                             ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1u;
00241
00242     /*  index calculation for the coefficients */
00243     ia3 = 3u * ia1;
00244     co3 = pCoef[ia3 * 2u];
00245     si3 = pCoef[(ia3 * 2u) + 1u];
00246
00247     /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
00248     pSrc[2u * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
00249                      ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1u;
00250
00251     /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
00252     pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
00253                             ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1u;
00254
00255     /*  Twiddle coefficients index modifier */
00256     ia1 = ia1 + twidCoefModifier;
00257
00258     /*  Updating input index */
00259     i0 = i0 + 1u;
00260
00261   } while(--j);
00262
00263   /* end of first stage process */
00264
00265   /* data is in 5.27(q27) format */
00266
00267
00268   /* start of Middle stages process */
00269
00270
00271   /* each stage in middle stages provides two down scaling of the input */
00272
00273   twidCoefModifier <<= 2u;
00274
00275
00276   for (k = fftLen / 4u; k > 4u; k >>= 2u)
00277   {
00278     /*  Initializations for the first stage */
00279     n1 = n2;
00280     n2 >>= 2u;
00281     ia1 = 0u;
00282
00283     /*  Calculation of first stage */
00284     for (j = 0u; j <= (n2 - 1u); j++)
00285     {
00286       /*  index calculation for the coefficients */
00287       ia2 = ia1 + ia1;
00288       ia3 = ia2 + ia1;
00289       co1 = pCoef[ia1 * 2u];
00290       si1 = pCoef[(ia1 * 2u) + 1u];
00291       co2 = pCoef[ia2 * 2u];
00292       si2 = pCoef[(ia2 * 2u) + 1u];
00293       co3 = pCoef[ia3 * 2u];
00294       si3 = pCoef[(ia3 * 2u) + 1u];
00295       /*  Twiddle coefficients index modifier */
00296       ia1 = ia1 + twidCoefModifier;
00297
00298       for (i0 = j; i0 < fftLen; i0 += n1)
00299       {
00300         /*  index calculation for the input as, */
00301         /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
00302         i1 = i0 + n2;
00303         i2 = i1 + n2;
00304         i3 = i2 + n2;
00305
00306         /*  Butterfly implementation */
00307         /* xa + xc */
00308         r1 = pSrc[2u * i0] + pSrc[2u * i2];
00309         /* xa - xc */
00310         r2 = pSrc[2u * i0] - pSrc[2u * i2];
00311
00312         /* ya + yc */
00313         s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00314         /* ya - yc */
00315         s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00316
00317         /* xb + xd */
00318         t1 = pSrc[2u * i1] + pSrc[2u * i3];
00319
00320         /* xa' = xa + xb + xc + xd */
00321         pSrc[2u * i0] = (r1 + t1) >> 2u;
00322         /* xa + xc -(xb + xd) */
00323         r1 = r1 - t1;
00324
00325         /* yb + yd */
00326         t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00327         /* ya' = ya + yb + yc + yd */
00328         pSrc[(2u * i0) + 1u] = (s1 + t2) >> 2u;
00329
00330         /* (ya + yc) - (yb + yd) */
00331         s1 = s1 - t2;
00332
00333         /* (yb - yd) */
00334         t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00335         /* (xb - xd) */
00336         t2 = pSrc[2u * i1] - pSrc[2u * i3];
00337
00338         /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
00339         pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
00340                          ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1u;
00341
00342         /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
00343         pSrc[(2u * i1) + 1u] = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
00344                                 ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1u;
00345
00346         /* (xa - xc) + (yb - yd) */
00347         r1 = r2 + t1;
00348         /* (xa - xc) - (yb - yd) */
00349         r2 = r2 - t1;
00350
00351         /* (ya - yc) -  (xb - xd) */
00352         s1 = s2 - t2;
00353         /* (ya - yc) +  (xb - xd) */
00354         s2 = s2 + t2;
00355
00356         /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
00357         pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
00358                          ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1u;
00359
00360         /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
00361         pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
00362                                 ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1u;
00363
00364         /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
00365         pSrc[2u * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
00366                          ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1u;
00367
00368         /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
00369         pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
00370                                 ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1u;
00371       }
00372     }
00373     twidCoefModifier <<= 2u;
00374   }
00375
00376   /* End of Middle stages process */
00377
00378   /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */
00379   /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */
00380   /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */
00381   /* data is in 5.27(q27) format for the 16 point as there are no middle stages */
00382
00383
00384   /* start of Last stage process */
00385
00386   /*  Initializations of last stage */
00387   n1 = n2;
00388   n2 >>= 2u;
00389
00390   /*  Calculations of last stage */
00391   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
00392   {
00393     /*  index calculation for the input as, */
00394     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
00395     i1 = i0 + n2;
00396     i2 = i1 + n2;
00397     i3 = i2 + n2;
00398
00399     /*  Butterfly implementation */
00400     /* xa + xb */
00401     r1 = pSrc[2u * i0] + pSrc[2u * i2];
00402     /* xa - xb */
00403     r2 = pSrc[2u * i0] - pSrc[2u * i2];
00404
00405     /* ya + yc */
00406     s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00407     /* ya - yc */
00408     s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00409
00410     /* xc + xd */
00411     t1 = pSrc[2u * i1] + pSrc[2u * i3];
00412     /* xa' = xa + xb + xc + xd */
00413     pSrc[2u * i0] = (r1 + t1);
00414     /* (xa + xb) - (xc + xd) */
00415     r1 = r1 - t1;
00416
00417     /* yb + yd */
00418     t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00419     /* ya' = ya + yb + yc + yd */
00420     pSrc[(2u * i0) + 1u] = (s1 + t2);
00421     /* (ya + yc) - (yb + yd) */
00422     s1 = s1 - t2;
00423
00424     /* (yb-yd) */
00425     t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00426     /* (xb-xd) */
00427     t2 = pSrc[2u * i1] - pSrc[2u * i3];
00428
00429     /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
00430     pSrc[2u * i1] = r1;
00431     /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
00432     pSrc[(2u * i1) + 1u] = s1;
00433
00434     /* (xa+yb-xc-yd) */
00435     r1 = r2 + t1;
00436     /* (xa-yb-xc+yd) */
00437     r2 = r2 - t1;
00438
00439     /* (ya-xb-yc+xd) */
00440     s1 = s2 - t2;
00441     /* (ya+xb-yc-xd) */
00442     s2 = s2 + t2;
00443
00444     /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
00445     pSrc[2u * i2] = r1;
00446     /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
00447     pSrc[(2u * i2) + 1u] = s1;
00448
00449     /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
00450     pSrc[2u * i3] = r2;
00451     /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
00452     pSrc[(2u * i3) + 1u] = s2;
00453
00454
00455   }
00456
00457   /* output is in 11.21(q21) format for the 1024 point */
00458   /* output is in 9.23(q23) format for the 256 point */
00459   /* output is in 7.25(q25) format for the 64 point */
00460   /* output is in 5.27(q27) format for the 16 point */
00461
00462   /* End of last stage process */
00463
00464 }
00465
00466
00477 /*
00478 * Radix-4 IFFT algorithm used is :
00479 *
00480 * CIFFT uses same twiddle coefficients as CFFT Function
00481 *  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]
00482 *
00483 *
00484 * IFFT is implemented with following changes in equations from FFT
00485 *
00486 * Input real and imaginary data:
00487 * x(n) = xa + j * ya
00488 * x(n+N/4 ) = xb + j * yb
00489 * x(n+N/2 ) = xc + j * yc
00490 * x(n+3N 4) = xd + j * yd
00491 *
00492 *
00493 * Output real and imaginary data:
00494 * x(4r) = xa'+ j * ya'
00495 * x(4r+1) = xb'+ j * yb'
00496 * x(4r+2) = xc'+ j * yc'
00497 * x(4r+3) = xd'+ j * yd'
00498 *
00499 *
00500 * Twiddle factors for radix-4 IFFT:
00501 * Wn = co1 + j * (si1)
00502 * W2n = co2 + j * (si2)
00503 * W3n = co3 + j * (si3)
00504
00505 * The real and imaginary output values for the radix-4 butterfly are
00506 * xa' = xa + xb + xc + xd
00507 * ya' = ya + yb + yc + yd
00508 * xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)
00509 * yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)
00510 * xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)
00511 * yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)
00512 * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)
00513 * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)
00514 *
00515 */
00516
00517 void arm_radix4_butterfly_inverse_q31(
00518   q31_t * pSrc,
00519   uint32_t fftLen,
00520   q31_t * pCoef,
00521   uint32_t twidCoefModifier)
00522 {
00523   uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
00524   q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
00525
00526   /* input is be 1.31(q31) format for all FFT sizes */
00527   /* Total process is divided into three stages */
00528   /* process first stage, middle stages, & last stage */
00529
00530   /* Start of first stage process */
00531
00532   /* Initializations for the first stage */
00533   n2 = fftLen;
00534   n1 = n2;
00535   /* n2 = fftLen/4 */
00536   n2 >>= 2u;
00537   i0 = 0u;
00538   ia1 = 0u;
00539
00540   j = n2;
00541
00542   do
00543   {
00544
00545     /* input is in 1.31(q31) format and provide 4 guard bits for the input */
00546
00547     /*  index calculation for the input as, */
00548     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
00549     i1 = i0 + n2;
00550     i2 = i1 + n2;
00551     i3 = i2 + n2;
00552
00553     /*  Butterfly implementation */
00554     /* xa + xc */
00555     r1 = (pSrc[2u * i0] >> 4u) + (pSrc[2u * i2] >> 4u);
00556     /* xa - xc */
00557     r2 = (pSrc[2u * i0] >> 4u) - (pSrc[2u * i2] >> 4u);
00558
00559     /* ya + yc */
00560     s1 = (pSrc[(2u * i0) + 1u] >> 4u) + (pSrc[(2u * i2) + 1u] >> 4u);
00561     /* ya - yc */
00562     s2 = (pSrc[(2u * i0) + 1u] >> 4u) - (pSrc[(2u * i2) + 1u] >> 4u);
00563
00564     /* xb + xd */
00565     t1 = (pSrc[2u * i1] >> 4u) + (pSrc[2u * i3] >> 4u);
00566
00567     /* xa' = xa + xb + xc + xd */
00568     pSrc[2u * i0] = (r1 + t1);
00569     /* (xa + xc) - (xb + xd) */
00570     r1 = r1 - t1;
00571     /* yb + yd */
00572     t2 = (pSrc[(2u * i1) + 1u] >> 4u) + (pSrc[(2u * i3) + 1u] >> 4u);
00573     /* ya' = ya + yb + yc + yd */
00574     pSrc[(2u * i0) + 1u] = (s1 + t2);
00575
00576     /* (ya + yc) - (yb + yd) */
00577     s1 = s1 - t2;
00578
00579     /* yb - yd */
00580     t1 = (pSrc[(2u * i1) + 1u] >> 4u) - (pSrc[(2u * i3) + 1u] >> 4u);
00581     /* xb - xd */
00582     t2 = (pSrc[2u * i1] >> 4u) - (pSrc[2u * i3] >> 4u);
00583
00584     /*  index calculation for the coefficients */
00585     ia2 = 2u * ia1;
00586     co2 = pCoef[ia2 * 2u];
00587     si2 = pCoef[(ia2 * 2u) + 1u];
00588
00589     /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
00590     pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) -
00591                      ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1u;
00592
00593     /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
00594     pSrc[2u * i1 + 1u] = (((int32_t) (((q63_t) s1 * co2) >> 32)) +
00595                           ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1u;
00596
00597     /* (xa - xc) - (yb - yd) */
00598     r1 = r2 - t1;
00599     /* (xa - xc) + (yb - yd) */
00600     r2 = r2 + t1;
00601
00602     /* (ya - yc) + (xb - xd) */
00603     s1 = s2 + t2;
00604     /* (ya - yc) - (xb - xd) */
00605     s2 = s2 - t2;
00606
00607     co1 = pCoef[ia1 * 2u];
00608     si1 = pCoef[(ia1 * 2u) + 1u];
00609
00610     /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
00611     pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
00612                      ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1u;
00613
00614     /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
00615     pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
00616                             ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1u;
00617
00618     /*  index calculation for the coefficients */
00619     ia3 = 3u * ia1;
00620     co3 = pCoef[ia3 * 2u];
00621     si3 = pCoef[(ia3 * 2u) + 1u];
00622
00623     /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
00624     pSrc[2u * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
00625                      ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1u;
00626
00627     /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
00628     pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
00629                             ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1u;
00630
00631     /*  Twiddle coefficients index modifier */
00632     ia1 = ia1 + twidCoefModifier;
00633
00634     /*  Updating input index */
00635     i0 = i0 + 1u;
00636
00637   } while(--j);
00638
00639   /* data is in 5.27(q27) format */
00640   /* each stage provides two down scaling of the input */
00641
00642
00643   /* Start of Middle stages process */
00644
00645   twidCoefModifier <<= 2u;
00646
00647   /*  Calculation of second stage to excluding last stage */
00648   for (k = fftLen / 4u; k > 4u; k >>= 2u)
00649   {
00650     /*  Initializations for the first stage */
00651     n1 = n2;
00652     n2 >>= 2u;
00653     ia1 = 0u;
00654
00655     for (j = 0; j <= (n2 - 1u); j++)
00656     {
00657       /*  index calculation for the coefficients */
00658       ia2 = ia1 + ia1;
00659       ia3 = ia2 + ia1;
00660       co1 = pCoef[ia1 * 2u];
00661       si1 = pCoef[(ia1 * 2u) + 1u];
00662       co2 = pCoef[ia2 * 2u];
00663       si2 = pCoef[(ia2 * 2u) + 1u];
00664       co3 = pCoef[ia3 * 2u];
00665       si3 = pCoef[(ia3 * 2u) + 1u];
00666       /*  Twiddle coefficients index modifier */
00667       ia1 = ia1 + twidCoefModifier;
00668
00669       for (i0 = j; i0 < fftLen; i0 += n1)
00670       {
00671         /*  index calculation for the input as, */
00672         /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
00673         i1 = i0 + n2;
00674         i2 = i1 + n2;
00675         i3 = i2 + n2;
00676
00677         /*  Butterfly implementation */
00678         /* xa + xc */
00679         r1 = pSrc[2u * i0] + pSrc[2u * i2];
00680         /* xa - xc */
00681         r2 = pSrc[2u * i0] - pSrc[2u * i2];
00682
00683         /* ya + yc */
00684         s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00685         /* ya - yc */
00686         s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00687
00688         /* xb + xd */
00689         t1 = pSrc[2u * i1] + pSrc[2u * i3];
00690
00691         /* xa' = xa + xb + xc + xd */
00692         pSrc[2u * i0] = (r1 + t1) >> 2u;
00693         /* xa + xc -(xb + xd) */
00694         r1 = r1 - t1;
00695         /* yb + yd */
00696         t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00697         /* ya' = ya + yb + yc + yd */
00698         pSrc[(2u * i0) + 1u] = (s1 + t2) >> 2u;
00699
00700         /* (ya + yc) - (yb + yd) */
00701         s1 = s1 - t2;
00702
00703         /* (yb - yd) */
00704         t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00705         /* (xb - xd) */
00706         t2 = pSrc[2u * i1] - pSrc[2u * i3];
00707
00708         /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
00709         pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32u)) -
00710                          ((int32_t) (((q63_t) s1 * si2) >> 32u))) >> 1u;
00711
00712         /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
00713         pSrc[(2u * i1) + 1u] =
00714           (((int32_t) (((q63_t) s1 * co2) >> 32u)) +
00715            ((int32_t) (((q63_t) r1 * si2) >> 32u))) >> 1u;
00716
00717         /* (xa - xc) - (yb - yd) */
00718         r1 = r2 - t1;
00719         /* (xa - xc) + (yb - yd) */
00720         r2 = r2 + t1;
00721
00722         /* (ya - yc) +  (xb - xd) */
00723         s1 = s2 + t2;
00724         /* (ya - yc) -  (xb - xd) */
00725         s2 = s2 - t2;
00726
00727         /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
00728         pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
00729                          ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1u;
00730
00731         /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
00732         pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
00733                                 ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1u;
00734
00735         /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
00736         pSrc[(2u * i3)] = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
00737                            ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1u;
00738
00739         /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
00740         pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
00741                                 ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1u;
00742       }
00743     }
00744     twidCoefModifier <<= 2u;
00745   }
00746
00747   /* End of Middle stages process */
00748
00749   /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */
00750   /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */
00751   /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */
00752   /* data is in 5.27(q27) format for the 16 point as there are no middle stages */
00753
00754
00755   /* Start of last stage process */
00756
00757
00758   /*  Initializations of last stage */
00759   n1 = n2;
00760   n2 >>= 2u;
00761
00762   /*  Calculations of last stage */
00763   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
00764   {
00765     /*  index calculation for the input as, */
00766     /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
00767     i1 = i0 + n2;
00768     i2 = i1 + n2;
00769     i3 = i2 + n2;
00770
00771     /*  Butterfly implementation */
00772     /* xa + xc */
00773     r1 = pSrc[2u * i0] + pSrc[2u * i2];
00774     /* xa - xc */
00775     r2 = pSrc[2u * i0] - pSrc[2u * i2];
00776
00777     /* ya + yc */
00778     s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
00779     /* ya - yc */
00780     s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
00781
00782     /* xc + xd */
00783     t1 = pSrc[2u * i1] + pSrc[2u * i3];
00784     /* xa' = xa + xb + xc + xd */
00785     pSrc[2u * i0] = (r1 + t1);
00786     /* (xa + xb) - (xc + xd) */
00787     r1 = r1 - t1;
00788
00789     /* yb + yd */
00790     t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
00791     /* ya' = ya + yb + yc + yd */
00792     pSrc[(2u * i0) + 1u] = (s1 + t2);
00793     /* (ya + yc) - (yb + yd) */
00794     s1 = s1 - t2;
00795
00796     /* (yb-yd) */
00797     t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
00798     /* (xb-xd) */
00799     t2 = pSrc[2u * i1] - pSrc[2u * i3];
00800
00801     /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
00802     pSrc[2u * i1] = r1;
00803     /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
00804     pSrc[(2u * i1) + 1u] = s1;
00805
00806     /* (xa - xc) - (yb-yd) */
00807     r1 = r2 - t1;
00808
00809     /* (xa - xc) + (yb-yd) */
00810     r2 = r2 + t1;
00811
00812     /* (ya - yc) + (xb-xd) */
00813     s1 = s2 + t2;
00814
00815     /* (ya - yc) - (xb-xd) */
00816     s2 = s2 - t2;
00817
00818     /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
00819     pSrc[2u * i2] = r1;
00820     /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
00821     pSrc[(2u * i2) + 1u] = s1;
00822
00823     /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
00824     pSrc[2u * i3] = r2;
00825     /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
00826     pSrc[(2u * i3) + 1u] = s2;
00827
00828   }
00829
00830   /* output is in 11.21(q21) format for the 1024 point */
00831   /* output is in 9.23(q23) format for the 256 point */
00832   /* output is in 7.25(q25) format for the 64 point */
00833   /* output is in 5.27(q27) format for the 16 point */
00834
00835   /* End of last stage process */
00836 }
00837
00838
00839 /*
00840  * @brief  In-place bit reversal function.
00841  * @param[in, out] *pSrc        points to the in-place buffer of Q31 data type.
00842  * @param[in]      fftLen       length of the FFT.
00843  * @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
00844  * @param[in]      *pBitRevTab  points to bit reversal table.
00845  * @return none.
00846  */
00847
00848 void arm_bitreversal_q31(
00849   q31_t * pSrc,
00850   uint32_t fftLen,
00851   uint16_t bitRevFactor,
00852   uint16_t * pBitRevTable)
00853 {
00854   uint32_t fftLenBy2, fftLenBy2p1, i, j;
00855   q31_t in;
00856
00857   /*  Initializations      */
00858   j = 0u;
00859   fftLenBy2 = fftLen / 2u;
00860   fftLenBy2p1 = (fftLen / 2u) + 1u;
00861
00862   /* Bit Reversal Implementation */
00863   for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
00864   {
00865     if(i < j)
00866     {
00867       /*  pSrc[i] <-> pSrc[j]; */
00868       in = pSrc[2u * i];
00869       pSrc[2u * i] = pSrc[2u * j];
00870       pSrc[2u * j] = in;
00871
00872       /*  pSrc[i+1u] <-> pSrc[j+1u] */
00873       in = pSrc[(2u * i) + 1u];
00874       pSrc[(2u * i) + 1u] = pSrc[(2u * j) + 1u];
00875       pSrc[(2u * j) + 1u] = in;
00876
00877       /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
00878       in = pSrc[2u * (i + fftLenBy2p1)];
00879       pSrc[2u * (i + fftLenBy2p1)] = pSrc[2u * (j + fftLenBy2p1)];
00880       pSrc[2u * (j + fftLenBy2p1)] = in;
00881
00882       /*  pSrc[i+fftLenBy2p1+1u] <-> pSrc[j+fftLenBy2p1+1u] */
00883       in = pSrc[(2u * (i + fftLenBy2p1)) + 1u];
00884       pSrc[(2u * (i + fftLenBy2p1)) + 1u] =
00885         pSrc[(2u * (j + fftLenBy2p1)) + 1u];
00886       pSrc[(2u * (j + fftLenBy2p1)) + 1u] = in;
00887
00888     }
00889
00890     /*  pSrc[i+1u] <-> pSrc[j+1u] */
00891     in = pSrc[2u * (i + 1u)];
00892     pSrc[2u * (i + 1u)] = pSrc[2u * (j + fftLenBy2)];
00893     pSrc[2u * (j + fftLenBy2)] = in;
00894
00895     /*  pSrc[i+2u] <-> pSrc[j+2u] */
00896     in = pSrc[(2u * (i + 1u)) + 1u];
00897     pSrc[(2u * (i + 1u)) + 1u] = pSrc[(2u * (j + fftLenBy2)) + 1u];
00898     pSrc[(2u * (j + fftLenBy2)) + 1u] = in;
00899
00900     /*  Reading the index for the bit reversal */
00901     j = *pBitRevTable;
00902
00903     /*  Updating the bit reversal index depending on the fft length */
00904     pBitRevTable += bitRevFactor;
00905   }
00906 }
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CMSIS DSP Software Library: arm_class_marks_example_f32.c File Reference

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  • File List
  • Globals
Defines | Functions | Variables

arm_class_marks_example_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Defines

#define | USE_STATIC_INIT
#define | TEST_LENGTH_SAMPLES (20*4)
#define | NUMSTUDENTS 20
#define | NUMSUBJECTS 4

Functions

int32_t | main ()

Variables

const float32_t | testMarks_f32 [TEST_LENGTH_SAMPLES]
const float32_t | testUnity_f32 [4]
static float32_t | testOutput [TEST_LENGTH_SAMPLES]
uint32_t | numStudents = 20
uint32_t | numSubjects = 4
float32_t max_marks
float32_t min_marks
float32_t mean
float32_t std
float32_t var
uint32_t | student_num

Define Documentation

#define USE_STATIC_INIT

Definition at line 69 of file arm_class_marks_example_f32.c.

#define TEST_LENGTH_SAMPLES (20*4)
Examples:
arm_class_marks_example_f32.c, arm_fft_bin_example_f32.c, arm_fir_example_f32.c, arm_linear_interp_example_f32.c, and arm_signal_converge_example_f32.c.

Definition at line 75 of file arm_class_marks_example_f32.c.

#define NUMSTUDENTS 20
Examples:
arm_class_marks_example_f32.c.

Definition at line 123 of file arm_class_marks_example_f32.c.

#define NUMSUBJECTS 4
Examples:
arm_class_marks_example_f32.c.

Definition at line 124 of file arm_class_marks_example_f32.c.

Function Documentation

int32_t main ( void )
Examples:
arm_class_marks_example_f32.c, arm_convolution_example_f32.c, arm_dotproduct_example_f32.c, arm_fft_bin_example_f32.c, arm_fir_example_f32.c, arm_graphic_equalizer_example_q31.c, arm_linear_interp_example_f32.c, arm_matrix_example_f32.c, arm_signal_converge_example_f32.c, arm_sin_cos_example_f32.c, and arm_variance_example_f32.c.

Definition at line 139 of file arm_class_marks_example_f32.c.

Variable Documentation

const float32_t testMarks_f32[TEST_LENGTH_SAMPLES]
Initial value:

{
    42.000000,  37.000000,  81.000000,  28.000000,
    83.000000,  72.000000,  36.000000,  38.000000,
    32.000000,  51.000000,  63.000000,  64.000000,
    97.000000,  82.000000,  95.000000,  90.000000,
    66.000000,  51.000000,  54.000000,  42.000000,
    67.000000,  56.000000,  45.000000,  57.000000,
    67.000000,  69.000000,  35.000000,  52.000000,
    29.000000,  81.000000,  58.000000,  47.000000,
    38.000000,  76.000000,  100.000000, 29.000000,
    33.000000,  47.000000,  29.000000,  50.000000,
    34.000000,  41.000000,  61.000000,  46.000000,
    52.000000,  50.000000,  48.000000,  36.000000,
    47.000000,  55.000000,  44.000000,  40.000000,
    100.000000, 94.000000,  84.000000,  37.000000,
    32.000000,  71.000000,  47.000000,  77.000000,
    31.000000,  50.000000,  49.000000,  35.000000,
    63.000000,  67.000000,  40.000000,  31.000000,
    29.000000,  68.000000,  61.000000,  38.000000,
    31.000000,  28.000000,  28.000000,  76.000000,
    55.000000,  33.000000,  29.000000,  39.000000
}
Examples:
arm_class_marks_example_f32.c.

Definition at line 80 of file arm_class_marks_example_f32.c.

const float32_t testUnity_f32[4]
Initial value:

{
    1.000,  1.000,  1.000,  1.000
}
Examples:
arm_class_marks_example_f32.c.

Definition at line 108 of file arm_class_marks_example_f32.c.

float32_t testOutput[TEST_LENGTH_SAMPLES] [static]
Examples:
arm_class_marks_example_f32.c, arm_dotproduct_example_f32.c, arm_fft_bin_example_f32.c, arm_fir_example_f32.c, arm_graphic_equalizer_example_q31.c, arm_linear_interp_example_f32.c, and arm_sin_cos_example_f32.c.

Definition at line 117 of file arm_class_marks_example_f32.c.

uint32_t numStudents = 20
Examples:
arm_class_marks_example_f32.c.

Definition at line 130 of file arm_class_marks_example_f32.c.

uint32_t numSubjects = 4
Examples:
arm_class_marks_example_f32.c.

Definition at line 131 of file arm_class_marks_example_f32.c.

float32_t max_marks
Examples:
arm_class_marks_example_f32.c.

Definition at line 132 of file arm_class_marks_example_f32.c.

float32_t min_marks
Examples:
arm_class_marks_example_f32.c.

Definition at line 132 of file arm_class_marks_example_f32.c.

float32_t mean
Examples:
arm_class_marks_example_f32.c, and arm_variance_example_f32.c.

Definition at line 132 of file arm_class_marks_example_f32.c.

float32_t std
Examples:
arm_class_marks_example_f32.c.

Definition at line 132 of file arm_class_marks_example_f32.c.

float32_t var
Examples:
arm_class_marks_example_f32.c.

Definition at line 132 of file arm_class_marks_example_f32.c.

uint32_t student_num
Examples:
arm_class_marks_example_f32.c.

Definition at line 133 of file arm_class_marks_example_f32.c.

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CMSIS DSP Software Library: arm_class_marks_example_f32.c Source File

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  • File List
  • Globals

arm_class_marks_example_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        29. November 2010
00005 * $Revision:    V1.0.3
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_class_marks_example_f32.c
00009 *
00010 * Description:  Example code to calculate Minimum, Maximum
00011 *               Mean, std and variance of marks obtained in a class
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3
00014 *
00015 * Version 1.0.3 2010/11/29
00016 *    Re-organized the CMSIS folders and updated documentation.
00017 *
00018 * Version 1.0.1 2010/10/05 KK
00019 *    Production release and review comments incorporated.
00020 *
00021 * Version 1.0.0 2010/09/20 KK
00022 *    Production release and review comments incorporated.
00023 * ------------------------------------------------------------------- */
00024
00067 #include "arm_math.h"
00068
00069 #define USE_STATIC_INIT
00070
00071  /* ----------------------------------------------------------------------
00072 ** Global defines
00073 ** ------------------------------------------------------------------- */
00074
00075 #define TEST_LENGTH_SAMPLES     (20*4)
00076
00077 /* ----------------------------------------------------------------------
00078 ** List of Marks scored by 20 students for 4 subjects
00079 ** ------------------------------------------------------------------- */
00080 const float32_t testMarks_f32[TEST_LENGTH_SAMPLES] =
00081 {
00082     42.000000,  37.000000,  81.000000,  28.000000,
00083     83.000000,  72.000000,  36.000000,  38.000000,
00084     32.000000,  51.000000,  63.000000,  64.000000,
00085     97.000000,  82.000000,  95.000000,  90.000000,
00086     66.000000,  51.000000,  54.000000,  42.000000,
00087     67.000000,  56.000000,  45.000000,  57.000000,
00088     67.000000,  69.000000,  35.000000,  52.000000,
00089     29.000000,  81.000000,  58.000000,  47.000000,
00090     38.000000,  76.000000,  100.000000, 29.000000,
00091     33.000000,  47.000000,  29.000000,  50.000000,
00092     34.000000,  41.000000,  61.000000,  46.000000,
00093     52.000000,  50.000000,  48.000000,  36.000000,
00094     47.000000,  55.000000,  44.000000,  40.000000,
00095     100.000000, 94.000000,  84.000000,  37.000000,
00096     32.000000,  71.000000,  47.000000,  77.000000,
00097     31.000000,  50.000000,  49.000000,  35.000000,
00098     63.000000,  67.000000,  40.000000,  31.000000,
00099     29.000000,  68.000000,  61.000000,  38.000000,
00100     31.000000,  28.000000,  28.000000,  76.000000,
00101     55.000000,  33.000000,  29.000000,  39.000000
00102 };
00103
00104
00105 /* ----------------------------------------------------------------------
00106 * Number of subjects X 1
00107 * ------------------------------------------------------------------- */
00108 const float32_t testUnity_f32[4] =
00109 {
00110     1.000,  1.000,  1.000,  1.000
00111 };
00112
00113
00114 /* ----------------------------------------------------------------------
00115 ** f32 Output buffer
00116 ** ------------------------------------------------------------------- */
00117 static float32_t testOutput[TEST_LENGTH_SAMPLES];
00118
00119
00120 /* ------------------------------------------------------------------
00121 * Global defines
00122 *------------------------------------------------------------------- */
00123 #define     NUMSTUDENTS  20
00124 #define     NUMSUBJECTS  4
00125
00126 /* ------------------------------------------------------------------
00127 * Global variables
00128 *------------------------------------------------------------------- */
00129
00130 uint32_t    numStudents = 20;
00131 uint32_t    numSubjects = 4;
00132 float32_t   max_marks, min_marks, mean, std, var;
00133 uint32_t    student_num;
00134
00135 /* ----------------------------------------------------------------------------------
00136 * Main f32 test function.  It returns maximum marks secured and student number
00137 * ------------------------------------------------------------------------------- */
00138
00139 int32_t main()
00140 {
00141
00142 #ifndef  USE_STATIC_INIT
00143
00144     arm_matrix_instance_f32 srcA;
00145     arm_matrix_instance_f32 srcB;
00146     arm_matrix_instance_f32 dstC;
00147
00148     /* Input and output matrices initializations */
00149     arm_mat_init_f32(&srcA, numStudents, numSubjects, (float32_t *)testMarks_f32);
00150     arm_mat_init_f32(&srcB, numSubjects, 1, (float32_t *)testUnity_f32);
00151     arm_mat_init_f32(&dstC, numStudents, 1, testOutput);
00152
00153 #else
00154
00155     /* Static Initializations of Input and output matrix sizes and array */
00156     arm_matrix_instance_f32 srcA = {NUMSTUDENTS, NUMSUBJECTS, (float32_t *)testMarks_f32};
00157     arm_matrix_instance_f32 srcB = {NUMSUBJECTS, 1, (float32_t *)testUnity_f32};
00158     arm_matrix_instance_f32 dstC = {NUMSTUDENTS, 1, testOutput};
00159
00160 #endif
00161
00162
00163     /* ----------------------------------------------------------------------
00164     *Call the Matrix multiplication process function
00165     * ------------------------------------------------------------------- */
00166     arm_mat_mult_f32(&srcA, &srcB, &dstC);
00167
00168     /* ----------------------------------------------------------------------
00169     ** Call the Max function to calculate max marks among numStudents
00170     ** ------------------------------------------------------------------- */
00171     arm_max_f32(testOutput, numStudents, &max_marks, &student_num);
00172
00173     /* ----------------------------------------------------------------------
00174     ** Call the Min function to calculate min marks among numStudents
00175     ** ------------------------------------------------------------------- */
00176     arm_min_f32(testOutput, numStudents, &min_marks, &student_num);
00177
00178     /* ----------------------------------------------------------------------
00179     ** Call the Mean function to calculate mean
00180     ** ------------------------------------------------------------------- */
00181     arm_mean_f32(testOutput, numStudents, &mean);
00182
00183     /* ----------------------------------------------------------------------
00184     ** Call the std function to calculate standard deviation
00185     ** ------------------------------------------------------------------- */
00186     arm_std_f32(testOutput, numStudents, &std);
00187
00188     /* ----------------------------------------------------------------------
00189     ** Call the var function to calculate variance
00190     ** ------------------------------------------------------------------- */
00191     arm_var_f32(testOutput, numStudents, &var);
00192
00193 }
00194
00195
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CMSIS DSP Software Library: arm_cmplx_conj_f32.c File Reference

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  • File List
  • Globals
Functions

arm_cmplx_conj_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_conj_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
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CMSIS DSP Software Library: arm_cmplx_conj_f32.c Source File

  • Examples
  • File List
  • Globals

arm_cmplx_conj_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cmplx_conj_f32.c
00009 *
00010 * Description:  Floating-point complex conjugate.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00072 void arm_cmplx_conj_f32(
00073   float32_t * pSrc,
00074   float32_t * pDst,
00075   uint32_t numSamples)
00076 {
00077
00078 #ifndef ARM_MATH_CM0
00079
00080   /* Run the below code for Cortex-M4 and Cortex-M3 */
00081   uint32_t blkCnt;                               /* loop counter */
00082
00083   /*loop Unrolling */
00084   blkCnt = numSamples >> 2u;
00085
00086   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00087    ** a second loop below computes the remaining 1 to 3 samples. */
00088   while(blkCnt > 0u)
00089   {
00090     /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
00091     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
00092     *pDst++ = *pSrc++;
00093     *pDst++ = -*pSrc++;
00094     *pDst++ = *pSrc++;
00095     *pDst++ = -*pSrc++;
00096     *pDst++ = *pSrc++;
00097     *pDst++ = -*pSrc++;
00098     *pDst++ = *pSrc++;
00099     *pDst++ = -*pSrc++;
00100
00101     /* Decrement the loop counter */
00102     blkCnt--;
00103   }
00104
00105   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00106    ** No loop unrolling is used. */
00107   blkCnt = numSamples % 0x4u;
00108
00109   while(blkCnt > 0u)
00110   {
00111     /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
00112     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
00113     *pDst++ = *pSrc++;
00114     *pDst++ = -*pSrc++;
00115
00116     /* Decrement the loop counter */
00117     blkCnt--;
00118   }
00119
00120 #else
00121
00122   /* Run the below code for Cortex-M0 */
00123
00124   while(numSamples > 0u)
00125   {
00126     /* realOut + j (imagOut) = realIn + j (-1) imagIn */
00127     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
00128     *pDst++ = *pSrc++;
00129     *pDst++ = -*pSrc++;
00130
00131     /* Decrement the loop counter */
00132     numSamples--;
00133   }
00134
00135 #endif /* #ifndef ARM_MATH_CM0 */
00136
00137 }
00138
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CMSIS DSP Software Library: arm_cmplx_conj_q15.c File Reference

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arm_cmplx_conj_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_conj_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
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CMSIS DSP Software Library: arm_cmplx_conj_q15.c Source File

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arm_cmplx_conj_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cmplx_conj_q15.c
00009 *
00010 * Description:  Q15 complex conjugate.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00054 void arm_cmplx_conj_q15(
00055   q15_t * pSrc,
00056   q15_t * pDst,
00057   uint32_t numSamples)
00058 {
00059
00060 #ifndef ARM_MATH_CM0
00061
00062   /* Run the below code for Cortex-M4 and Cortex-M3 */
00063   uint32_t blkCnt;                               /* loop counter */
00064
00065   /*loop Unrolling */
00066   blkCnt = numSamples >> 2u;
00067
00068   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00069    ** a second loop below computes the remaining 1 to 3 samples. */
00070   while(blkCnt > 0u)
00071   {
00072     /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
00073     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
00074     *pDst++ = *pSrc++;
00075     *pDst++ = __SSAT(-*pSrc++, 16);
00076     *pDst++ = *pSrc++;
00077     *pDst++ = __SSAT(-*pSrc++, 16);
00078     *pDst++ = *pSrc++;
00079     *pDst++ = __SSAT(-*pSrc++, 16);
00080     *pDst++ = *pSrc++;
00081     *pDst++ = __SSAT(-*pSrc++, 16);
00082
00083     /* Decrement the loop counter */
00084     blkCnt--;
00085   }
00086
00087   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00088    ** No loop unrolling is used. */
00089   blkCnt = numSamples % 0x4u;
00090
00091   while(blkCnt > 0u)
00092   {
00093     /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
00094     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
00095     *pDst++ = *pSrc++;
00096     *pDst++ = __SSAT(-*pSrc++, 16);
00097
00098     /* Decrement the loop counter */
00099     blkCnt--;
00100   }
00101
00102 #else
00103
00104   /* Run the below code for Cortex-M0 */
00105
00106   while(numSamples > 0u)
00107   {
00108     /* realOut + j (imagOut) = realIn+ j (-1) imagIn */
00109     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
00110     *pDst++ = *pSrc++;
00111     *pDst++ = -*pSrc++;
00112
00113     /* Decrement the loop counter */
00114     numSamples--;
00115   }
00116
00117 #endif /* #ifndef ARM_MATH_CM0 */
00118
00119 }
00120
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CMSIS DSP Software Library: arm_cmplx_conj_q31.c File Reference

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arm_cmplx_conj_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_conj_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
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CMSIS DSP Software Library: arm_cmplx_conj_q31.c Source File

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arm_cmplx_conj_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cmplx_conj_q31.c
00009 *
00010 * Description:  Q31 complex conjugate.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00054 void arm_cmplx_conj_q31(
00055   q31_t * pSrc,
00056   q31_t * pDst,
00057   uint32_t numSamples)
00058 {
00059
00060 #ifndef ARM_MATH_CM0
00061
00062   /* Run the below code for Cortex-M4 and Cortex-M3 */
00063   uint32_t blkCnt;                               /* loop counter */
00064   q31_t in;                                      /* Input value */
00065
00066   /*loop Unrolling */
00067   blkCnt = numSamples >> 2u;
00068
00069   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00070    ** a second loop below computes the remaining 1 to 3 samples. */
00071   while(blkCnt > 0u)
00072   {
00073     /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
00074     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
00075     /* Saturated to 0x7fffffff if the input is -1(0x80000000) */
00076     *pDst++ = *pSrc++;
00077     in = *pSrc++;
00078     *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
00079     *pDst++ = *pSrc++;
00080     in = *pSrc++;
00081     *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
00082     *pDst++ = *pSrc++;
00083     in = *pSrc++;
00084     *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
00085     *pDst++ = *pSrc++;
00086     in = *pSrc++;
00087     *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
00088
00089     /* Decrement the loop counter */
00090     blkCnt--;
00091   }
00092
00093   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00094    ** No loop unrolling is used. */
00095   blkCnt = numSamples % 0x4u;
00096
00097   while(blkCnt > 0u)
00098   {
00099     /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
00100     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
00101     /* Saturated to 0x7fffffff if the input is -1(0x80000000) */
00102     *pDst++ = *pSrc++;
00103     in = *pSrc++;
00104     *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
00105
00106     /* Decrement the loop counter */
00107     blkCnt--;
00108   }
00109
00110 #else
00111
00112   /* Run the below code for Cortex-M0 */
00113
00114   while(numSamples > 0u)
00115   {
00116     /* realOut + j (imagOut) = realIn+ j (-1) imagIn */
00117     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
00118     *pDst++ = *pSrc++;
00119     *pDst++ = -*pSrc++;
00120
00121     /* Decrement the loop counter */
00122     numSamples--;
00123   }
00124
00125 #endif /* #ifndef ARM_MATH_CM0 */
00126
00127 }
00128
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CMSIS DSP Software Library: arm_cmplx_dot_prod_f32.c File Reference

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arm_cmplx_dot_prod_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_dot_prod_f32 (float32_t *pSrcA, float32_t *pSrcB, uint32_t numSamples, float32_t *realResult, float32_t *imagResult)
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CMSIS DSP Software Library: arm_cmplx_dot_prod_f32.c Source File

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arm_cmplx_dot_prod_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cmplx_dot_prod_f32.c
00009 *
00010 * Description:  Floating-point complex dot product
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00077 void arm_cmplx_dot_prod_f32(
00078   float32_t * pSrcA,
00079   float32_t * pSrcB,
00080   uint32_t numSamples,
00081   float32_t * realResult,
00082   float32_t * imagResult)
00083 {
00084   float32_t real_sum = 0.0f, imag_sum = 0.0f;    /* Temporary result storage */
00085
00086 #ifndef ARM_MATH_CM0
00087
00088   /* Run the below code for Cortex-M4 and Cortex-M3 */
00089   uint32_t blkCnt;                               /* loop counter */
00090
00091   /*loop Unrolling */
00092   blkCnt = numSamples >> 2u;
00093
00094   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00095    ** a second loop below computes the remaining 1 to 3 samples. */
00096   while(blkCnt > 0u)
00097   {
00098     /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
00099     real_sum += (*pSrcA++) * (*pSrcB++);
00100     /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
00101     imag_sum += (*pSrcA++) * (*pSrcB++);
00102
00103     real_sum += (*pSrcA++) * (*pSrcB++);
00104     imag_sum += (*pSrcA++) * (*pSrcB++);
00105
00106     real_sum += (*pSrcA++) * (*pSrcB++);
00107     imag_sum += (*pSrcA++) * (*pSrcB++);
00108
00109     real_sum += (*pSrcA++) * (*pSrcB++);
00110     imag_sum += (*pSrcA++) * (*pSrcB++);
00111
00112     /* Decrement the loop counter */
00113     blkCnt--;
00114   }
00115
00116   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00117    ** No loop unrolling is used. */
00118   blkCnt = numSamples % 0x4u;
00119
00120   while(blkCnt > 0u)
00121   {
00122     /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
00123     real_sum += (*pSrcA++) * (*pSrcB++);
00124     /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
00125     imag_sum += (*pSrcA++) * (*pSrcB++);
00126
00127
00128     /* Decrement the loop counter */
00129     blkCnt--;
00130   }
00131
00132 #else
00133
00134   /* Run the below code for Cortex-M0 */
00135
00136   while(numSamples > 0u)
00137   {
00138     /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
00139     real_sum += (*pSrcA++) * (*pSrcB++);
00140     /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
00141     imag_sum += (*pSrcA++) * (*pSrcB++);
00142
00143
00144     /* Decrement the loop counter */
00145     numSamples--;
00146   }
00147
00148 #endif /* #ifndef ARM_MATH_CM0 */
00149
00150   /* Store the real and imaginary results in the destination buffers */
00151   *realResult = real_sum;
00152   *imagResult = imag_sum;
00153 }
00154
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CMSIS DSP Software Library: arm_cmplx_dot_prod_q15.c File Reference

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arm_cmplx_dot_prod_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_dot_prod_q15 (q15_t *pSrcA, q15_t *pSrcB, uint32_t numSamples, q31_t *realResult, q31_t *imagResult)
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CMSIS DSP Software Library: arm_cmplx_dot_prod_q15.c Source File

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arm_cmplx_dot_prod_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cmplx_dot_prod_q15.c
00009 *
00010 * Description:  Processing function for the Q15 Complex Dot product
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00059 void arm_cmplx_dot_prod_q15(
00060   q15_t * pSrcA,
00061   q15_t * pSrcB,
00062   uint32_t numSamples,
00063   q31_t * realResult,
00064   q31_t * imagResult)
00065 {
00066   q63_t real_sum = 0, imag_sum = 0;              /* Temporary result storage */
00067
00068 #ifndef ARM_MATH_CM0
00069
00070   /* Run the below code for Cortex-M4 and Cortex-M3 */
00071   uint32_t blkCnt;                               /* loop counter */
00072
00073
00074   /*loop Unrolling */
00075   blkCnt = numSamples >> 2u;
00076
00077   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00078    ** a second loop below computes the remaining 1 to 3 samples. */
00079   while(blkCnt > 0u)
00080   {
00081     /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
00082     real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00083
00084     /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
00085     imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00086
00087     real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00088     imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00089
00090     real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00091     imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00092
00093     real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00094     imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00095
00096     /* Decrement the loop counter */
00097     blkCnt--;
00098   }
00099
00100   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00101    ** No loop unrolling is used. */
00102   blkCnt = numSamples % 0x4u;
00103
00104   while(blkCnt > 0u)
00105   {
00106     /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
00107     real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00108     /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
00109     imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00110
00111     /* Decrement the loop counter */
00112     blkCnt--;
00113   }
00114
00115 #else
00116
00117   /* Run the below code for Cortex-M0 */
00118
00119   while(numSamples > 0u)
00120   {
00121     /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
00122     real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00123     /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
00124     imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
00125
00126     /* Decrement the loop counter */
00127     numSamples--;
00128   }
00129
00130 #endif /* #ifndef ARM_MATH_CM0 */
00131
00132   /* Store the real and imaginary results in 8.24 format  */
00133   /* Convert real data in 34.30 to 8.24 by 6 right shifts */
00134   *realResult = (q31_t) (real_sum) >> 6;
00135   /* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */
00136   *imagResult = (q31_t) (imag_sum) >> 6;
00137 }
00138
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CMSIS DSP Software Library: arm_cmplx_dot_prod_q31.c File Reference

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arm_cmplx_dot_prod_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_dot_prod_q31 (q31_t *pSrcA, q31_t *pSrcB, uint32_t numSamples, q63_t *realResult, q63_t *imagResult)
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CMSIS DSP Software Library: arm_cmplx_dot_prod_q31.c Source File

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arm_cmplx_dot_prod_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cmplx_dot_prod_q31.c
00009 *
00010 * Description:  Q31 complex dot product
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00060 void arm_cmplx_dot_prod_q31(
00061   q31_t * pSrcA,
00062   q31_t * pSrcB,
00063   uint32_t numSamples,
00064   q63_t * realResult,
00065   q63_t * imagResult)
00066 {
00067   q63_t real_sum = 0, imag_sum = 0;              /* Temporary result storage */
00068
00069 #ifndef ARM_MATH_CM0
00070
00071   /* Run the below code for Cortex-M4 and Cortex-M3 */
00072   uint32_t blkCnt;                               /* loop counter */
00073
00074
00075   /*loop Unrolling */
00076   blkCnt = numSamples >> 2u;
00077
00078   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00079    ** a second loop below computes the remaining 1 to 3 samples. */
00080   while(blkCnt > 0u)
00081   {
00082     /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
00083     /* Convert real data in 2.62 to 16.48 by 14 right shifts */
00084     real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00085     /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
00086     /* Convert imag data in 2.62 to 16.48 by 14 right shifts */
00087     imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00088
00089     real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00090     imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00091
00092     real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00093     imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00094
00095     real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00096     imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00097
00098
00099     /* Decrement the loop counter */
00100     blkCnt--;
00101   }
00102
00103   /* If the numSamples  is not a multiple of 4, compute any remaining output samples here.
00104    ** No loop unrolling is used. */
00105   blkCnt = numSamples % 0x4u;
00106
00107   while(blkCnt > 0u)
00108   {
00109     /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
00110     real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00111     /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
00112     imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00113
00114     /* Decrement the loop counter */
00115     blkCnt--;
00116   }
00117
00118 #else
00119
00120   /* Run the below code for Cortex-M0 */
00121
00122   while(numSamples > 0u)
00123   {
00124     /* outReal = realA[0]* realB[0] + realA[2]* realB[2] + realA[4]* realB[4] + .....+ realA[numSamples-2]* realB[numSamples-2] */
00125     real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00126     /* outImag = imagA[1]* imagB[1] + imagA[3]* imagB[3] + imagA[5]* imagB[5] + .....+ imagA[numSamples-1]* imagB[numSamples-1] */
00127     imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
00128
00129     /* Decrement the loop counter */
00130     numSamples--;
00131   }
00132
00133 #endif /* #ifndef ARM_MATH_CM0 */
00134
00135   /* Store the real and imaginary results in 16.48 format  */
00136   *realResult = real_sum;
00137   *imagResult = imag_sum;
00138 }
00139
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CMSIS DSP Software Library: arm_cmplx_mag_f32.c File Reference

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arm_cmplx_mag_f32.c File Reference

#include "arm_math.h"

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Functions

void arm_cmplx_mag_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
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CMSIS DSP Software Library: arm_cmplx_mag_f32.c Source File

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arm_cmplx_mag_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cmplx_mag_f32.c
00009 *
00010 * Description:  Floating-point complex magnitude.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00073 void arm_cmplx_mag_f32(
00074   float32_t * pSrc,
00075   float32_t * pDst,
00076   uint32_t numSamples)
00077 {
00078   float32_t realIn, imagIn;                      /* Temporary variables to hold input values */
00079
00080 #ifndef ARM_MATH_CM0
00081
00082   /* Run the below code for Cortex-M4 and Cortex-M3 */
00083   uint32_t blkCnt;                               /* loop counter */
00084
00085   /*loop Unrolling */
00086   blkCnt = numSamples >> 2u;
00087
00088   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00089    ** a second loop below computes the remaining 1 to 3 samples. */
00090   while(blkCnt > 0u)
00091   {
00092
00093     /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
00094     realIn = *pSrc++;
00095     imagIn = *pSrc++;
00096     /* store the result in the destination buffer. */
00097     arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
00098
00099     realIn = *pSrc++;
00100     imagIn = *pSrc++;
00101     arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
00102
00103     realIn = *pSrc++;
00104     imagIn = *pSrc++;
00105     arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
00106
00107     realIn = *pSrc++;
00108     imagIn = *pSrc++;
00109     arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
00110
00111
00112     /* Decrement the loop counter */
00113     blkCnt--;
00114   }
00115
00116   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00117    ** No loop unrolling is used. */
00118   blkCnt = numSamples % 0x4u;
00119
00120   while(blkCnt > 0u)
00121   {
00122     /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
00123     realIn = *pSrc++;
00124     imagIn = *pSrc++;
00125     /* store the result in the destination buffer. */
00126     arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
00127
00128     /* Decrement the loop counter */
00129     blkCnt--;
00130   }
00131
00132 #else
00133
00134   /* Run the below code for Cortex-M0 */
00135
00136   while(numSamples > 0u)
00137   {
00138     /* out = sqrt((real * real) + (imag * imag)) */
00139     realIn = *pSrc++;
00140     imagIn = *pSrc++;
00141     /* store the result in the destination buffer. */
00142     arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
00143
00144     /* Decrement the loop counter */
00145     numSamples--;
00146   }
00147
00148 #endif /* #ifndef ARM_MATH_CM0 */
00149
00150 }
00151
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CMSIS DSP Software Library: arm_cmplx_mag_q15.c File Reference

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arm_cmplx_mag_q15.c File Reference

#include "arm_math.h"

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Functions

void arm_cmplx_mag_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
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CMSIS DSP Software Library: arm_cmplx_mag_q15.c Source File

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arm_cmplx_mag_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cmplx_mag_q15.c
00009 *
00010 * Description:  Q15 complex magnitude.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00054 void arm_cmplx_mag_q15(
00055   q15_t * pSrc,
00056   q15_t * pDst,
00057   uint32_t numSamples)
00058 {
00059   q15_t real, imag;                              /* Temporary variables to hold input values */
00060   q31_t acc0, acc1;                              /* Accumulators */
00061
00062 #ifndef ARM_MATH_CM0
00063
00064   /* Run the below code for Cortex-M4 and Cortex-M3 */
00065   uint32_t blkCnt;                               /* loop counter */
00066
00067
00068   /*loop Unrolling */
00069   blkCnt = numSamples >> 2u;
00070
00071   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00072    ** a second loop below computes the remaining 1 to 3 samples. */
00073   while(blkCnt > 0u)
00074   {
00075
00076     /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
00077     real = *pSrc++;
00078     imag = *pSrc++;
00079     acc0 = __SMUAD(real, real);
00080     acc1 = __SMUAD(imag, imag);
00081     /* store the result in 2.14 format in the destination buffer. */
00082     arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
00083
00084     real = *pSrc++;
00085     imag = *pSrc++;
00086     acc0 = __SMUAD(real, real);
00087     acc1 = __SMUAD(imag, imag);
00088     /* store the result in 2.14 format in the destination buffer. */
00089     arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
00090
00091     real = *pSrc++;
00092     imag = *pSrc++;
00093     acc0 = __SMUAD(real, real);
00094     acc1 = __SMUAD(imag, imag);
00095     /* store the result in 2.14 format in the destination buffer. */
00096     arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
00097
00098     real = *pSrc++;
00099     imag = *pSrc++;
00100     acc0 = __SMUAD(real, real);
00101     acc1 = __SMUAD(imag, imag);
00102     /* store the result in 2.14 format in the destination buffer. */
00103     arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
00104
00105     /* Decrement the loop counter */
00106     blkCnt--;
00107   }
00108
00109   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00110    ** No loop unrolling is used. */
00111   blkCnt = numSamples % 0x4u;
00112
00113   while(blkCnt > 0u)
00114   {
00115     /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
00116     real = *pSrc++;
00117     imag = *pSrc++;
00118     acc0 = __SMUAD(real, real);
00119     acc1 = __SMUAD(imag, imag);
00120     /* store the result in 2.14 format in the destination buffer. */
00121     arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
00122
00123     /* Decrement the loop counter */
00124     blkCnt--;
00125   }
00126
00127 #else
00128
00129   /* Run the below code for Cortex-M0 */
00130
00131   while(numSamples > 0u)
00132   {
00133     /* out = sqrt(real * real + imag * imag) */
00134     real = *pSrc++;
00135     imag = *pSrc++;
00136
00137     acc0 = (real * real);
00138     acc1 = (imag * imag);
00139
00140     /* store the result in 2.14 format in the destination buffer. */
00141     arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
00142
00143     /* Decrement the loop counter */
00144     numSamples--;
00145   }
00146
00147 #endif /* #ifndef ARM_MATH_CM0 */
00148
00149 }
00150
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CMSIS DSP Software Library: arm_cmplx_mag_q31.c File Reference

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arm_cmplx_mag_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_cmplx_mag_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
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CMSIS DSP Software Library: arm_cmplx_mag_q31.c Source File

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arm_cmplx_mag_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cmplx_mag_q31.c
00009 *
00010 * Description:  Q31 complex magnitude
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00054 void arm_cmplx_mag_q31(
00055   q31_t * pSrc,
00056   q31_t * pDst,
00057   uint32_t numSamples)
00058 {
00059   q31_t real, imag;                              /* Temporary variables to hold input values */
00060   q31_t acc0, acc1;                              /* Accumulators */
00061
00062 #ifndef ARM_MATH_CM0
00063
00064   /* Run the below code for Cortex-M4 and Cortex-M3 */
00065   uint32_t blkCnt;                               /* loop counter */
00066
00067
00068   /*loop Unrolling */
00069   blkCnt = numSamples >> 2u;
00070
00071   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00072    ** a second loop below computes the remaining 1 to 3 samples. */
00073   while(blkCnt > 0u)
00074   {
00075
00076     /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
00077     real = *pSrc++;
00078     imag = *pSrc++;
00079     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00080     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00081     /* store the result in 2.30 format in the destination buffer. */
00082     arm_sqrt_q31(acc0 + acc1, pDst++);
00083
00084     real = *pSrc++;
00085     imag = *pSrc++;
00086     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00087     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00088     /* store the result in 2.30 format in the destination buffer. */
00089     arm_sqrt_q31(acc0 + acc1, pDst++);
00090
00091     real = *pSrc++;
00092     imag = *pSrc++;
00093     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00094     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00095     /* store the result in 2.30 format in the destination buffer. */
00096     arm_sqrt_q31(acc0 + acc1, pDst++);
00097
00098     real = *pSrc++;
00099     imag = *pSrc++;
00100     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00101     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00102     /* store the result in 2.30 format in the destination buffer. */
00103     arm_sqrt_q31(acc0 + acc1, pDst++);
00104
00105     /* Decrement the loop counter */
00106     blkCnt--;
00107   }
00108
00109   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00110    ** No loop unrolling is used. */
00111   blkCnt = numSamples % 0x4u;
00112
00113   while(blkCnt > 0u)
00114   {
00115     /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
00116     real = *pSrc++;
00117     imag = *pSrc++;
00118     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00119     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00120     /* store the result in 2.30 format in the destination buffer. */
00121     arm_sqrt_q31(acc0 + acc1, pDst++);
00122
00123     /* Decrement the loop counter */
00124     blkCnt--;
00125   }
00126
00127 #else
00128
00129   /* Run the below code for Cortex-M0 */
00130
00131   while(numSamples > 0u)
00132   {
00133     /* out = sqrt((real * real) + (imag * imag)) */
00134     real = *pSrc++;
00135     imag = *pSrc++;
00136     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00137     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00138     /* store the result in 2.30 format in the destination buffer. */
00139     arm_sqrt_q31(acc0 + acc1, pDst++);
00140
00141     /* Decrement the loop counter */
00142     numSamples--;
00143   }
00144
00145 #endif /* #ifndef ARM_MATH_CM0 */
00146
00147 }
00148
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CMSIS DSP Software Library: arm_cmplx_mag_squared_f32.c File Reference

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arm_cmplx_mag_squared_f32.c File Reference

#include "arm_math.h"

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Functions

void arm_cmplx_mag_squared_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
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CMSIS DSP Software Library: arm_cmplx_mag_squared_f32.c Source File

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arm_cmplx_mag_squared_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cmplx_mag_squared_f32.c
00009 *
00010 * Description:  Floating-point complex magnitude squared.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00074 void arm_cmplx_mag_squared_f32(
00075   float32_t * pSrc,
00076   float32_t * pDst,
00077   uint32_t numSamples)
00078 {
00079   float32_t real, imag;                          /* Temporary variables to store real and imaginary values */
00080
00081 #ifndef ARM_MATH_CM0
00082
00083   /* Run the below code for Cortex-M4 and Cortex-M3 */
00084   uint32_t blkCnt;                               /* loop counter */
00085
00086   /*loop Unrolling */
00087   blkCnt = numSamples >> 2u;
00088
00089   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00090    ** a second loop below computes the remaining 1 to 3 samples. */
00091   while(blkCnt > 0u)
00092   {
00093     /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
00094     real = *pSrc++;
00095     imag = *pSrc++;
00096     /* store the result in the destination buffer. */
00097     *pDst++ = (real * real) + (imag * imag);
00098
00099     real = *pSrc++;
00100     imag = *pSrc++;
00101     *pDst++ = (real * real) + (imag * imag);
00102
00103     real = *pSrc++;
00104     imag = *pSrc++;
00105     *pDst++ = (real * real) + (imag * imag);
00106
00107     real = *pSrc++;
00108     imag = *pSrc++;
00109     *pDst++ = (real * real) + (imag * imag);
00110
00111     /* Decrement the loop counter */
00112     blkCnt--;
00113   }
00114
00115   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00116    ** No loop unrolling is used. */
00117   blkCnt = numSamples % 0x4u;
00118
00119   while(blkCnt > 0u)
00120   {
00121     /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
00122     real = *pSrc++;
00123     imag = *pSrc++;
00124     /* store the result in the destination buffer. */
00125     *pDst++ = (real * real) + (imag * imag);
00126
00127     /* Decrement the loop counter */
00128     blkCnt--;
00129   }
00130
00131 #else
00132
00133   /* Run the below code for Cortex-M0 */
00134
00135   while(numSamples > 0u)
00136   {
00137     /* reading real and imaginary values */
00138     real = *pSrc++;
00139     imag = *pSrc++;
00140
00141     /* out = (real * real) + (imag * imag) */
00142     /* store the result in the destination buffer. */
00143     *pDst++ = (real * real) + (imag * imag);
00144
00145     /* Decrement the loop counter */
00146     numSamples--;
00147   }
00148
00149 #endif /* #ifndef ARM_MATH_CM0 */
00150
00151 }
00152
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CMSIS DSP Software Library: arm_cmplx_mag_squared_q15.c File Reference

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arm_cmplx_mag_squared_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_mag_squared_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
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CMSIS DSP Software Library: arm_cmplx_mag_squared_q15.c Source File

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arm_cmplx_mag_squared_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cmplx_mag_squared_q15.c
00009 *
00010 * Description:  Q15 complex magnitude squared.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00053 void arm_cmplx_mag_squared_q15(
00054   q15_t * pSrc,
00055   q15_t * pDst,
00056   uint32_t numSamples)
00057 {
00058   q15_t real, imag;                              /* Temporary variables to store real and imaginary values */
00059   q31_t acc0, acc1;                              /* Accumulators */
00060
00061 #ifndef ARM_MATH_CM0
00062
00063   /* Run the below code for Cortex-M4 and Cortex-M3 */
00064   uint32_t blkCnt;                               /* loop counter */
00065
00066   /*loop Unrolling */
00067   blkCnt = numSamples >> 2u;
00068
00069   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00070    ** a second loop below computes the remaining 1 to 3 samples. */
00071   while(blkCnt > 0u)
00072   {
00073     /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
00074     real = *pSrc++;
00075     imag = *pSrc++;
00076     acc0 = __SMUAD(real, real);
00077     acc1 = __SMUAD(imag, imag);
00078     /* store the result in 3.13 format in the destination buffer. */
00079     *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
00080
00081     real = *pSrc++;
00082     imag = *pSrc++;
00083     acc0 = __SMUAD(real, real);
00084     acc1 = __SMUAD(imag, imag);
00085     /* store the result in 3.13 format in the destination buffer. */
00086     *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
00087
00088     real = *pSrc++;
00089     imag = *pSrc++;
00090     acc0 = __SMUAD(real, real);
00091     acc1 = __SMUAD(imag, imag);
00092     /* store the result in 3.13 format in the destination buffer. */
00093     *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
00094
00095     real = *pSrc++;
00096     imag = *pSrc++;
00097     acc0 = __SMUAD(real, real);
00098     acc1 = __SMUAD(imag, imag);
00099     /* store the result in 3.13 format in the destination buffer. */
00100     *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
00101
00102     /* Decrement the loop counter */
00103     blkCnt--;
00104   }
00105
00106   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00107    ** No loop unrolling is used. */
00108   blkCnt = numSamples % 0x4u;
00109
00110   while(blkCnt > 0u)
00111   {
00112     /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
00113     real = *pSrc++;
00114     imag = *pSrc++;
00115     acc0 = __SMUAD(real, real);
00116     acc1 = __SMUAD(imag, imag);
00117     /* store the result in 3.13 format in the destination buffer. */
00118     *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
00119
00120     /* Decrement the loop counter */
00121     blkCnt--;
00122   }
00123
00124 #else
00125
00126   /* Run the below code for Cortex-M0 */
00127
00128   while(numSamples > 0u)
00129   {
00130     /* out = ((real * real) + (imag * imag)) */
00131     real = *pSrc++;
00132     imag = *pSrc++;
00133     acc0 = (real * real);
00134     acc1 = (imag * imag);
00135     /* store the result in 3.13 format in the destination buffer. */
00136     *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
00137
00138     /* Decrement the loop counter */
00139     numSamples--;
00140   }
00141
00142 #endif /* #ifndef ARM_MATH_CM0 */
00143
00144 }
00145
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CMSIS DSP Software Library: arm_cmplx_mag_squared_q31.c File Reference

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arm_cmplx_mag_squared_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_mag_squared_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
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CMSIS DSP Software Library: arm_cmplx_mag_squared_q31.c Source File

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arm_cmplx_mag_squared_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cmplx_mag_squared_q31.c
00009 *
00010 * Description:  Q31 complex magnitude squared.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00055 void arm_cmplx_mag_squared_q31(
00056   q31_t * pSrc,
00057   q31_t * pDst,
00058   uint32_t numSamples)
00059 {
00060   q31_t real, imag;                              /* Temporary variables to store real and imaginary values */
00061   q31_t acc0, acc1;                              /* Accumulators */
00062
00063 #ifndef ARM_MATH_CM0
00064
00065   /* Run the below code for Cortex-M4 and Cortex-M3 */
00066   uint32_t blkCnt;                               /* loop counter */
00067
00068   /* loop Unrolling */
00069   blkCnt = numSamples >> 2u;
00070
00071   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00072    ** a second loop below computes the remaining 1 to 3 samples. */
00073   while(blkCnt > 0u)
00074   {
00075     /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
00076     real = *pSrc++;
00077     imag = *pSrc++;
00078     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00079     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00080     /* store the result in 3.29 format in the destination buffer. */
00081     *pDst++ = acc0 + acc1;
00082
00083     real = *pSrc++;
00084     imag = *pSrc++;
00085     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00086     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00087     /* store the result in 3.29 format in the destination buffer. */
00088     *pDst++ = acc0 + acc1;
00089
00090     real = *pSrc++;
00091     imag = *pSrc++;
00092     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00093     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00094     /* store the result in 3.29 format in the destination buffer. */
00095     *pDst++ = acc0 + acc1;
00096
00097     real = *pSrc++;
00098     imag = *pSrc++;
00099     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00100     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00101     /* store the result in 3.29 format in the destination buffer. */
00102     *pDst++ = acc0 + acc1;
00103
00104     /* Decrement the loop counter */
00105     blkCnt--;
00106   }
00107
00108   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00109    ** No loop unrolling is used. */
00110   blkCnt = numSamples % 0x4u;
00111
00112   while(blkCnt > 0u)
00113   {
00114     /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
00115     real = *pSrc++;
00116     imag = *pSrc++;
00117     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00118     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00119     /* store the result in 3.29 format in the destination buffer. */
00120     *pDst++ = acc0 + acc1;
00121
00122     /* Decrement the loop counter */
00123     blkCnt--;
00124   }
00125
00126 #else
00127
00128   /* Run the below code for Cortex-M0 */
00129
00130   while(numSamples > 0u)
00131   {
00132     /* out = ((real * real) + (imag * imag)) */
00133     real = *pSrc++;
00134     imag = *pSrc++;
00135     acc0 = (q31_t) (((q63_t) real * real) >> 33);
00136     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
00137     /* store the result in 3.29 format in the destination buffer. */
00138     *pDst++ = acc0 + acc1;
00139
00140     /* Decrement the loop counter */
00141     numSamples--;
00142   }
00143
00144 #endif /* #ifndef ARM_MATH_CM0 */
00145
00146 }
00147
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CMSIS DSP Software Library: arm_cmplx_mult_cmplx_f32.c File Reference

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arm_cmplx_mult_cmplx_f32.c File Reference

#include "arm_math.h"

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Functions

void arm_cmplx_mult_cmplx_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t numSamples)
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CMSIS DSP Software Library: arm_cmplx_mult_cmplx_f32.c Source File

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arm_cmplx_mult_cmplx_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cmplx_mult_cmplx_f32.c
00009 *
00010 * Description:  Floating-point complex-by-complex multiplication
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00073 void arm_cmplx_mult_cmplx_f32(
00074   float32_t * pSrcA,
00075   float32_t * pSrcB,
00076   float32_t * pDst,
00077   uint32_t numSamples)
00078 {
00079   float32_t a, b, c, d;                          /* Temporary variables to store real and imaginary values */
00080
00081 #ifndef ARM_MATH_CM0
00082
00083   /* Run the below code for Cortex-M4 and Cortex-M3 */
00084   uint32_t blkCnt;                               /* loop counters */
00085
00086   /* loop Unrolling */
00087   blkCnt = numSamples >> 2u;
00088
00089   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00090    ** a second loop below computes the remaining 1 to 3 samples. */
00091   while(blkCnt > 0u)
00092   {
00093     /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
00094     /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
00095     a = *pSrcA++;
00096     b = *pSrcA++;
00097     c = *pSrcB++;
00098     d = *pSrcB++;
00099
00100     /* store the result in the destination buffer. */
00101     *pDst++ = (a * c) - (b * d);
00102     *pDst++ = (a * d) + (b * c);
00103
00104     a = *pSrcA++;
00105     b = *pSrcA++;
00106     c = *pSrcB++;
00107     d = *pSrcB++;
00108
00109     *pDst++ = (a * c) - (b * d);
00110     *pDst++ = (a * d) + (b * c);
00111
00112     a = *pSrcA++;
00113     b = *pSrcA++;
00114     c = *pSrcB++;
00115     d = *pSrcB++;
00116
00117     *pDst++ = (a * c) - (b * d);
00118     *pDst++ = (a * d) + (b * c);
00119
00120     a = *pSrcA++;
00121     b = *pSrcA++;
00122     c = *pSrcB++;
00123     d = *pSrcB++;
00124
00125     *pDst++ = (a * c) - (b * d);
00126     *pDst++ = (a * d) + (b * c);
00127
00128     /* Decrement the numSamples loop counter */
00129     blkCnt--;
00130   }
00131
00132   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00133    ** No loop unrolling is used. */
00134   blkCnt = numSamples % 0x4u;
00135
00136   while(blkCnt > 0u)
00137   {
00138     /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
00139     /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
00140     a = *pSrcA++;
00141     b = *pSrcA++;
00142     c = *pSrcB++;
00143     d = *pSrcB++;
00144
00145     /* store the result in the destination buffer. */
00146     *pDst++ = (a * c) - (b * d);
00147     *pDst++ = (a * d) + (b * c);
00148
00149     /* Decrement the numSamples loop counter */
00150     blkCnt--;
00151   }
00152
00153 #else
00154
00155   /* Run the below code for Cortex-M0 */
00156
00157   while(numSamples > 0u)
00158   {
00159     /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
00160     /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
00161     a = *pSrcA++;
00162     b = *pSrcA++;
00163     c = *pSrcB++;
00164     d = *pSrcB++;
00165
00166     /* store the result in the destination buffer. */
00167     *pDst++ = (a * c) - (b * d);
00168     *pDst++ = (a * d) + (b * c);
00169
00170     /* Decrement the numSamples loop counter */
00171     numSamples--;
00172   }
00173
00174 #endif /* #ifndef ARM_MATH_CM0 */
00175
00176 }
00177
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CMSIS DSP Software Library: arm_cmplx_mult_cmplx_q15.c File Reference

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arm_cmplx_mult_cmplx_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_cmplx_mult_cmplx_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t numSamples)
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CMSIS DSP Software Library: arm_cmplx_mult_cmplx_q15.c Source File

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arm_cmplx_mult_cmplx_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cmplx_mult_cmplx_q15.c
00009 *
00010 * Description:  Q15 complex-by-complex multiplication
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00054 void arm_cmplx_mult_cmplx_q15(
00055   q15_t * pSrcA,
00056   q15_t * pSrcB,
00057   q15_t * pDst,
00058   uint32_t numSamples)
00059 {
00060   q15_t a, b, c, d;                              /* Temporary variables to store real and imaginary values */
00061
00062 #ifndef ARM_MATH_CM0
00063
00064   /* Run the below code for Cortex-M4 and Cortex-M3 */
00065   uint32_t blkCnt;                               /* loop counters */
00066
00067   /* loop Unrolling */
00068   blkCnt = numSamples >> 2u;
00069
00070   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00071    ** a second loop below computes the remaining 1 to 3 samples. */
00072   while(blkCnt > 0u)
00073   {
00074     /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
00075     /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
00076     a = *pSrcA++;
00077     b = *pSrcA++;
00078     c = *pSrcB++;
00079     d = *pSrcB++;
00080
00081     /* store the result in 3.13 format in the destination buffer. */
00082     *pDst++ =
00083       (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
00084     /* store the result in 3.13 format in the destination buffer. */
00085     *pDst++ =
00086       (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
00087
00088     a = *pSrcA++;
00089     b = *pSrcA++;
00090     c = *pSrcB++;
00091     d = *pSrcB++;
00092
00093     /* store the result in 3.13 format in the destination buffer. */
00094     *pDst++ =
00095       (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
00096     /* store the result in 3.13 format in the destination buffer. */
00097     *pDst++ =
00098       (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
00099
00100     a = *pSrcA++;
00101     b = *pSrcA++;
00102     c = *pSrcB++;
00103     d = *pSrcB++;
00104
00105     /* store the result in 3.13 format in the destination buffer. */
00106     *pDst++ =
00107       (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
00108     /* store the result in 3.13 format in the destination buffer. */
00109     *pDst++ =
00110       (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
00111
00112     a = *pSrcA++;
00113     b = *pSrcA++;
00114     c = *pSrcB++;
00115     d = *pSrcB++;
00116
00117     /* store the result in 3.13 format in the destination buffer. */
00118     *pDst++ =
00119       (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
00120     /* store the result in 3.13 format in the destination buffer. */
00121     *pDst++ =
00122       (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
00123
00124     /* Decrement the blockSize loop counter */
00125     blkCnt--;
00126   }
00127
00128   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00129    ** No loop unrolling is used. */
00130   blkCnt = numSamples % 0x4u;
00131
00132   while(blkCnt > 0u)
00133   {
00134     /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
00135     /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
00136     a = *pSrcA++;
00137     b = *pSrcA++;
00138     c = *pSrcB++;
00139     d = *pSrcB++;
00140
00141     /* store the result in 3.13 format in the destination buffer. */
00142     *pDst++ =
00143       (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
00144     /* store the result in 3.13 format in the destination buffer. */
00145     *pDst++ =
00146       (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
00147
00148     /* Decrement the blockSize loop counter */
00149     blkCnt--;
00150   }
00151
00152 #else
00153
00154   /* Run the below code for Cortex-M0 */
00155
00156   while(numSamples > 0u)
00157   {
00158     /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
00159     /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
00160     a = *pSrcA++;
00161     b = *pSrcA++;
00162     c = *pSrcB++;
00163     d = *pSrcB++;
00164
00165     /* store the result in 3.13 format in the destination buffer. */
00166     *pDst++ =
00167       (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
00168     /* store the result in 3.13 format in the destination buffer. */
00169     *pDst++ =
00170       (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
00171
00172     /* Decrement the blockSize loop counter */
00173     numSamples--;
00174   }
00175
00176 #endif /* #ifndef ARM_MATH_CM0 */
00177
00178 }
00179
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CMSIS DSP Software Library: arm_cmplx_mult_cmplx_q31.c File Reference

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arm_cmplx_mult_cmplx_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_cmplx_mult_cmplx_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t numSamples)
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CMSIS DSP Software Library: arm_cmplx_mult_cmplx_q31.c Source File

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arm_cmplx_mult_cmplx_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cmplx_mult_cmplx_q31.c
00009 *
00010 * Description:  Q31 complex-by-complex multiplication
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00056 void arm_cmplx_mult_cmplx_q31(
00057   q31_t * pSrcA,
00058   q31_t * pSrcB,
00059   q31_t * pDst,
00060   uint32_t numSamples)
00061 {
00062   q31_t a, b, c, d;                              /* Temporary variables to store real and imaginary values */
00063   uint32_t blkCnt;                               /* loop counters */
00064
00065 #ifndef ARM_MATH_CM0
00066
00067   /* Run the below code for Cortex-M4 and Cortex-M3 */
00068
00069   /* loop Unrolling */
00070   blkCnt = numSamples >> 2u;
00071
00072   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00073    ** a second loop below computes the remaining 1 to 3 samples. */
00074   while(blkCnt > 0u)
00075   {
00076     /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
00077     /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
00078     a = *pSrcA++;
00079     b = *pSrcA++;
00080     c = *pSrcB++;
00081     d = *pSrcB++;
00082
00083     /* store the real result in 3.29 format in the destination buffer. */
00084     *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
00085     /* store the imag result in 3.29 format in the destination buffer. */
00086     *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
00087
00088     a = *pSrcA++;
00089     b = *pSrcA++;
00090     c = *pSrcB++;
00091     d = *pSrcB++;
00092
00093     /* store the result in 3.29 format in the destination buffer. */
00094     *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
00095     /* store the result in 3.29 format in the destination buffer. */
00096     *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
00097
00098     a = *pSrcA++;
00099     b = *pSrcA++;
00100     c = *pSrcB++;
00101     d = *pSrcB++;
00102
00103     /* store the result in 3.29 format in the destination buffer. */
00104     *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
00105     /* store the result in 3.29 format in the destination buffer. */
00106     *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
00107
00108     a = *pSrcA++;
00109     b = *pSrcA++;
00110     c = *pSrcB++;
00111     d = *pSrcB++;
00112
00113     /* store the result in 3.29 format in the destination buffer. */
00114     *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
00115     /* store the result in 3.29 format in the destination buffer. */
00116     *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
00117
00118     /* Decrement the blockSize loop counter */
00119     blkCnt--;
00120   }
00121
00122   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00123    ** No loop unrolling is used. */
00124   blkCnt = numSamples % 0x4u;
00125
00126   while(blkCnt > 0u)
00127   {
00128     /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
00129     /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
00130     a = *pSrcA++;
00131     b = *pSrcA++;
00132     c = *pSrcB++;
00133     d = *pSrcB++;
00134
00135     /* store the result in 3.29 format in the destination buffer. */
00136     *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
00137     /* store the result in 3.29 format in the destination buffer. */
00138     *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
00139
00140     /* Decrement the blockSize loop counter */
00141     blkCnt--;
00142   }
00143
00144 #else
00145
00146   /* Run the below code for Cortex-M0 */
00147
00148   /* loop Unrolling */
00149   blkCnt = numSamples >> 1u;
00150
00151   /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.
00152    ** a second loop below computes the remaining 1 sample. */
00153   while(blkCnt > 0u)
00154   {
00155     /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
00156     /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
00157     a = *pSrcA++;
00158     b = *pSrcA++;
00159     c = *pSrcB++;
00160     d = *pSrcB++;
00161
00162     /* store the real result in 3.29 format in the destination buffer. */
00163     *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
00164     /* store the imag result in 3.29 format in the destination buffer. */
00165     *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
00166
00167     a = *pSrcA++;
00168     b = *pSrcA++;
00169     c = *pSrcB++;
00170     d = *pSrcB++;
00171
00172     /* store the result in 3.29 format in the destination buffer. */
00173     *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
00174     /* store the result in 3.29 format in the destination buffer. */
00175     *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
00176
00177     /* Decrement the blockSize loop counter */
00178     blkCnt--;
00179   }
00180
00181   /* If the blockSize is not a multiple of 2, compute any remaining output samples here.
00182    ** No loop unrolling is used. */
00183   blkCnt = numSamples % 0x2u;
00184
00185   while(blkCnt > 0u)
00186   {
00187     /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
00188     /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
00189     a = *pSrcA++;
00190     b = *pSrcA++;
00191     c = *pSrcB++;
00192     d = *pSrcB++;
00193
00194     /* store the result in 3.29 format in the destination buffer. */
00195     *pDst++ = (q31_t) ((((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33));
00196     /* store the result in 3.29 format in the destination buffer. */
00197     *pDst++ = (q31_t) ((((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33));
00198
00199     /* Decrement the blockSize loop counter */
00200     blkCnt--;
00201   }
00202
00203 #endif /* #ifndef ARM_MATH_CM0 */
00204
00205 }
00206
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CMSIS DSP Software Library: arm_cmplx_mult_real_f32.c File Reference

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arm_cmplx_mult_real_f32.c File Reference

#include "arm_math.h"

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Functions

void arm_cmplx_mult_real_f32 (float32_t *pSrcCmplx, float32_t *pSrcReal, float32_t *pCmplxDst, uint32_t numSamples)
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CMSIS DSP Software Library: arm_cmplx_mult_real_f32.c Source File

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arm_cmplx_mult_real_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cmplx_mult_real_f32.c
00009 *
00010 * Description:  Floating-point complex by real multiplication
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00074 void arm_cmplx_mult_real_f32(
00075   float32_t * pSrcCmplx,
00076   float32_t * pSrcReal,
00077   float32_t * pCmplxDst,
00078   uint32_t numSamples)
00079 {
00080   float32_t in;                                  /* Temporary variable to store input value */
00081
00082 #ifndef ARM_MATH_CM0
00083
00084   /* Run the below code for Cortex-M4 and Cortex-M3 */
00085   uint32_t blkCnt;                               /* loop counters */
00086
00087   /* loop Unrolling */
00088   blkCnt = numSamples >> 2u;
00089
00090   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00091    ** a second loop below computes the remaining 1 to 3 samples. */
00092   while(blkCnt > 0u)
00093   {
00094     /* C[2 * i] = A[2 * i] * B[i].            */
00095     /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
00096     in = *pSrcReal++;
00097     /* store the result in the destination buffer. */
00098     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00099     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00100
00101     in = *pSrcReal++;
00102     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00103     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00104
00105     in = *pSrcReal++;
00106     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00107     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00108
00109     in = *pSrcReal++;
00110     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00111     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00112
00113     /* Decrement the numSamples loop counter */
00114     blkCnt--;
00115   }
00116
00117   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00118    ** No loop unrolling is used. */
00119   blkCnt = numSamples % 0x4u;
00120
00121   while(blkCnt > 0u)
00122   {
00123     /* C[2 * i] = A[2 * i] * B[i].            */
00124     /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
00125     in = *pSrcReal++;
00126     /* store the result in the destination buffer. */
00127     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00128     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00129
00130     /* Decrement the numSamples loop counter */
00131     blkCnt--;
00132   }
00133
00134 #else
00135
00136   /* Run the below code for Cortex-M0 */
00137
00138   while(numSamples > 0u)
00139   {
00140     /* realOut = realA * realB.            */
00141     /* imagOut = imagA * realB.                */
00142     in = *pSrcReal++;
00143     /* store the result in the destination buffer. */
00144     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00145     *pCmplxDst++ = (*pSrcCmplx++) * (in);
00146
00147     /* Decrement the numSamples loop counter */
00148     numSamples--;
00149   }
00150
00151 #endif /* #ifndef ARM_MATH_CM0 */
00152
00153 }
00154
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CMSIS DSP Software Library: arm_cmplx_mult_real_q15.c File Reference

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arm_cmplx_mult_real_q15.c File Reference

#include "arm_math.h"

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Functions

void arm_cmplx_mult_real_q15 (q15_t *pSrcCmplx, q15_t *pSrcReal, q15_t *pCmplxDst, uint32_t numSamples)
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CMSIS DSP Software Library: arm_cmplx_mult_real_q15.c Source File

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arm_cmplx_mult_real_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cmplx_mult_real_q15.c
00009 *
00010 * Description:  Q15 complex by real multiplication
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00056 void arm_cmplx_mult_real_q15(
00057   q15_t * pSrcCmplx,
00058   q15_t * pSrcReal,
00059   q15_t * pCmplxDst,
00060   uint32_t numSamples)
00061 {
00062   q15_t in;                                      /* Temporary variable to store input value */
00063
00064 #ifndef ARM_MATH_CM0
00065
00066   /* Run the below code for Cortex-M4 and Cortex-M3 */
00067   uint32_t blkCnt;                               /* loop counters */
00068
00069   /* loop Unrolling */
00070   blkCnt = numSamples >> 2u;
00071
00072   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00073    ** a second loop below computes the remaining 1 to 3 samples. */
00074   while(blkCnt > 0u)
00075   {
00076     /* C[2 * i] = A[2 * i] * B[i].            */
00077     /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
00078     in = *pSrcReal++;
00079     /* store the result in the destination buffer. */
00080     *pCmplxDst++ =
00081       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00082     *pCmplxDst++ =
00083       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00084
00085     in = *pSrcReal++;
00086     *pCmplxDst++ =
00087       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00088     *pCmplxDst++ =
00089       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00090
00091     in = *pSrcReal++;
00092     *pCmplxDst++ =
00093       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00094     *pCmplxDst++ =
00095       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00096
00097     in = *pSrcReal++;
00098     *pCmplxDst++ =
00099       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00100     *pCmplxDst++ =
00101       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00102
00103     /* Decrement the numSamples loop counter */
00104     blkCnt--;
00105   }
00106
00107   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00108    ** No loop unrolling is used. */
00109   blkCnt = numSamples % 0x4u;
00110
00111   while(blkCnt > 0u)
00112   {
00113     /* C[2 * i] = A[2 * i] * B[i].            */
00114     /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
00115     in = *pSrcReal++;
00116     /* store the result in the destination buffer. */
00117     *pCmplxDst++ =
00118       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00119     *pCmplxDst++ =
00120       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00121
00122     /* Decrement the numSamples loop counter */
00123     blkCnt--;
00124   }
00125
00126 #else
00127
00128   /* Run the below code for Cortex-M0 */
00129
00130   while(numSamples > 0u)
00131   {
00132     /* realOut = realA * realB.            */
00133     /* imagOut = imagA * realB.                */
00134     in = *pSrcReal++;
00135     /* store the result in the destination buffer. */
00136     *pCmplxDst++ =
00137       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00138     *pCmplxDst++ =
00139       (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
00140
00141     /* Decrement the numSamples loop counter */
00142     numSamples--;
00143   }
00144
00145 #endif /* #ifndef ARM_MATH_CM0 */
00146
00147 }
00148
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CMSIS DSP Software Library: arm_cmplx_mult_real_q31.c File Reference

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arm_cmplx_mult_real_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_cmplx_mult_real_q31 (q31_t *pSrcCmplx, q31_t *pSrcReal, q31_t *pCmplxDst, uint32_t numSamples)
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CMSIS DSP Software Library: arm_cmplx_mult_real_q31.c Source File

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arm_cmplx_mult_real_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cmplx_mult_real_q31.c
00009 *
00010 * Description:  Q31 complex by real multiplication
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00056 void arm_cmplx_mult_real_q31(
00057   q31_t * pSrcCmplx,
00058   q31_t * pSrcReal,
00059   q31_t * pCmplxDst,
00060   uint32_t numSamples)
00061 {
00062   q31_t in;                                      /* Temporary variable to store input value */
00063
00064 #ifndef ARM_MATH_CM0
00065
00066   /* Run the below code for Cortex-M4 and Cortex-M3 */
00067   uint32_t blkCnt;                               /* loop counters */
00068
00069   /* loop Unrolling */
00070   blkCnt = numSamples >> 2u;
00071
00072   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00073    ** a second loop below computes the remaining 1 to 3 samples. */
00074   while(blkCnt > 0u)
00075   {
00076     /* C[2 * i] = A[2 * i] * B[i].            */
00077     /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
00078     in = *pSrcReal++;
00079     /* store the result in the destination buffer. */
00080     *pCmplxDst++ =
00081       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00082     *pCmplxDst++ =
00083       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00084
00085     in = *pSrcReal++;
00086     *pCmplxDst++ =
00087       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00088     *pCmplxDst++ =
00089       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00090
00091     in = *pSrcReal++;
00092     *pCmplxDst++ =
00093       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00094     *pCmplxDst++ =
00095       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00096
00097     in = *pSrcReal++;
00098     *pCmplxDst++ =
00099       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00100     *pCmplxDst++ =
00101       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00102
00103     /* Decrement the numSamples loop counter */
00104     blkCnt--;
00105   }
00106
00107   /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00108    ** No loop unrolling is used. */
00109   blkCnt = numSamples % 0x4u;
00110
00111   while(blkCnt > 0u)
00112   {
00113     /* C[2 * i] = A[2 * i] * B[i].            */
00114     /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
00115     in = *pSrcReal++;
00116     /* store the result in the destination buffer. */
00117     *pCmplxDst++ =
00118       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00119     *pCmplxDst++ =
00120       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00121
00122     /* Decrement the numSamples loop counter */
00123     blkCnt--;
00124   }
00125
00126 #else
00127
00128   /* Run the below code for Cortex-M0 */
00129
00130   while(numSamples > 0u)
00131   {
00132     /* realOut = realA * realB.            */
00133     /* imagReal = imagA * realB.               */
00134     in = *pSrcReal++;
00135     /* store the result in the destination buffer. */
00136     *pCmplxDst++ =
00137       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00138     *pCmplxDst++ =
00139       (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * in) >> 31);
00140
00141     /* Decrement the numSamples loop counter */
00142     numSamples--;
00143   }
00144
00145 #endif /* #ifndef ARM_MATH_CM0 */
00146
00147 }
00148
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CMSIS DSP Software Library: arm_common_tables.c File Reference

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Variables

arm_common_tables.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Variables

const uint16_t | armBitRevTable [256]
const q15_t | armRecipTableQ15 [64]
const q31_t | armRecipTableQ31 [64]

Variable Documentation

const q15_t armRecipTableQ15[64]
Initial value:
 {
  0x7F03, 0x7D13, 0x7B31, 0x795E, 0x7798, 0x75E0,
  0x7434, 0x7294, 0x70FF, 0x6F76, 0x6DF6, 0x6C82,
  0x6B16, 0x69B5, 0x685C, 0x670C, 0x65C4, 0x6484,
  0x634C, 0x621C, 0x60F3, 0x5FD0, 0x5EB5, 0x5DA0,
  0x5C91, 0x5B88, 0x5A85, 0x5988, 0x5890, 0x579E,
  0x56B0, 0x55C8, 0x54E4, 0x5405, 0x532B, 0x5255,
  0x5183, 0x50B6, 0x4FEC, 0x4F26, 0x4E64, 0x4DA6,
  0x4CEC, 0x4C34, 0x4B81, 0x4AD0, 0x4A23, 0x4978,
  0x48D1, 0x482D, 0x478C, 0x46ED, 0x4651, 0x45B8,
  0x4521, 0x448D, 0x43FC, 0x436C, 0x42DF, 0x4255,
  0x41CC, 0x4146, 0x40C2, 0x4040
}

end of CFFT_CIFFT group

Definition at line 115 of file arm_common_tables.c.

const q31_t armRecipTableQ31[64]
Initial value:
 {
  0x7F03F03F, 0x7D137420, 0x7B31E739, 0x795E9F94, 0x7798FD29, 0x75E06928,
  0x7434554D, 0x72943B4B, 0x70FF9C40, 0x6F760031, 0x6DF6F593, 0x6C8210E3,
  0x6B16EC3A, 0x69B526F6, 0x685C655F, 0x670C505D, 0x65C4952D, 0x6484E519,
  0x634CF53E, 0x621C7E4F, 0x60F33C61, 0x5FD0EEB3, 0x5EB55785, 0x5DA03BEB,
  0x5C9163A1, 0x5B8898E6, 0x5A85A85A, 0x598860DF, 0x58909373, 0x579E1318,
  0x56B0B4B8, 0x55C84F0B, 0x54E4BA80, 0x5405D124, 0x532B6E8F, 0x52556FD0,
  0x5183B35A, 0x50B618F3, 0x4FEC81A2, 0x4F26CFA2, 0x4E64E64E, 0x4DA6AA1D,
  0x4CEC008B, 0x4C34D010, 0x4B810016, 0x4AD078EF, 0x4A2323C4, 0x4978EA96,
  0x48D1B827, 0x482D77FE, 0x478C1657, 0x46ED801D, 0x4651A2E5, 0x45B86CE2,
  0x4521CCE1, 0x448DB244, 0x43FC0CFA, 0x436CCD78, 0x42DFE4B4, 0x42554426,
  0x41CCDDB6, 0x4146A3C6, 0x40C28923, 0x40408102
}

Definition at line 132 of file arm_common_tables.c.

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CMSIS DSP Software Library: arm_common_tables.c Source File

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arm_common_tables.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_common_tables.c
00009 *
00010 * Description:  This file has common tables like Bitreverse, reciprocal etc which are used across different functions
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030
00031 #include "arm_math.h"
00032
00065 /*
00066 * @brief  Table for bit reversal process
00067 */
00068 const uint16_t armBitRevTable[256] = {
00069   0x100, 0x80, 0x180, 0x40, 0x140, 0xc0, 0x1c0,
00070   0x20, 0x120, 0xa0, 0x1a0, 0x60, 0x160, 0xe0,
00071   0x1e0, 0x10, 0x110, 0x90, 0x190, 0x50, 0x150,
00072   0xd0, 0x1d0, 0x30, 0x130, 0xb0, 0x1b0, 0x70,
00073   0x170, 0xf0, 0x1f0, 0x8, 0x108, 0x88, 0x188,
00074   0x48, 0x148, 0xc8, 0x1c8, 0x28, 0x128, 0xa8,
00075   0x1a8, 0x68, 0x168, 0xe8, 0x1e8, 0x18, 0x118,
00076   0x98, 0x198, 0x58, 0x158, 0xd8, 0x1d8, 0x38,
00077   0x138, 0xb8, 0x1b8, 0x78, 0x178, 0xf8, 0x1f8,
00078   0x4, 0x104, 0x84, 0x184, 0x44, 0x144, 0xc4,
00079   0x1c4, 0x24, 0x124, 0xa4, 0x1a4, 0x64, 0x164,
00080   0xe4, 0x1e4, 0x14, 0x114, 0x94, 0x194, 0x54,
00081   0x154, 0xd4, 0x1d4, 0x34, 0x134, 0xb4, 0x1b4,
00082   0x74, 0x174, 0xf4, 0x1f4, 0xc, 0x10c, 0x8c,
00083   0x18c, 0x4c, 0x14c, 0xcc, 0x1cc, 0x2c, 0x12c,
00084   0xac, 0x1ac, 0x6c, 0x16c, 0xec, 0x1ec, 0x1c,
00085   0x11c, 0x9c, 0x19c, 0x5c, 0x15c, 0xdc, 0x1dc,
00086   0x3c, 0x13c, 0xbc, 0x1bc, 0x7c, 0x17c, 0xfc,
00087   0x1fc, 0x2, 0x102, 0x82, 0x182, 0x42, 0x142,
00088   0xc2, 0x1c2, 0x22, 0x122, 0xa2, 0x1a2, 0x62,
00089   0x162, 0xe2, 0x1e2, 0x12, 0x112, 0x92, 0x192,
00090   0x52, 0x152, 0xd2, 0x1d2, 0x32, 0x132, 0xb2,
00091   0x1b2, 0x72, 0x172, 0xf2, 0x1f2, 0xa, 0x10a,
00092   0x8a, 0x18a, 0x4a, 0x14a, 0xca, 0x1ca, 0x2a,
00093   0x12a, 0xaa, 0x1aa, 0x6a, 0x16a, 0xea, 0x1ea,
00094   0x1a, 0x11a, 0x9a, 0x19a, 0x5a, 0x15a, 0xda,
00095   0x1da, 0x3a, 0x13a, 0xba, 0x1ba, 0x7a, 0x17a,
00096   0xfa, 0x1fa, 0x6, 0x106, 0x86, 0x186, 0x46,
00097   0x146, 0xc6, 0x1c6, 0x26, 0x126, 0xa6, 0x1a6,
00098   0x66, 0x166, 0xe6, 0x1e6, 0x16, 0x116, 0x96,
00099   0x196, 0x56, 0x156, 0xd6, 0x1d6, 0x36, 0x136,
00100   0xb6, 0x1b6, 0x76, 0x176, 0xf6, 0x1f6, 0xe,
00101   0x10e, 0x8e, 0x18e, 0x4e, 0x14e, 0xce, 0x1ce,
00102   0x2e, 0x12e, 0xae, 0x1ae, 0x6e, 0x16e, 0xee,
00103   0x1ee, 0x1e, 0x11e, 0x9e, 0x19e, 0x5e, 0x15e,
00104   0xde, 0x1de, 0x3e, 0x13e, 0xbe, 0x1be, 0x7e,
00105   0x17e, 0xfe, 0x1fe, 0x1
00106 };
00107
00112 /*
00113 * @brief  Q15 table for reciprocal
00114 */
00115 const q15_t armRecipTableQ15[64] = {
00116   0x7F03, 0x7D13, 0x7B31, 0x795E, 0x7798, 0x75E0,
00117   0x7434, 0x7294, 0x70FF, 0x6F76, 0x6DF6, 0x6C82,
00118   0x6B16, 0x69B5, 0x685C, 0x670C, 0x65C4, 0x6484,
00119   0x634C, 0x621C, 0x60F3, 0x5FD0, 0x5EB5, 0x5DA0,
00120   0x5C91, 0x5B88, 0x5A85, 0x5988, 0x5890, 0x579E,
00121   0x56B0, 0x55C8, 0x54E4, 0x5405, 0x532B, 0x5255,
00122   0x5183, 0x50B6, 0x4FEC, 0x4F26, 0x4E64, 0x4DA6,
00123   0x4CEC, 0x4C34, 0x4B81, 0x4AD0, 0x4A23, 0x4978,
00124   0x48D1, 0x482D, 0x478C, 0x46ED, 0x4651, 0x45B8,
00125   0x4521, 0x448D, 0x43FC, 0x436C, 0x42DF, 0x4255,
00126   0x41CC, 0x4146, 0x40C2, 0x4040
00127 };
00128
00129 /*
00130 * @brief  Q31 table for reciprocal
00131 */
00132 const q31_t armRecipTableQ31[64] = {
00133   0x7F03F03F, 0x7D137420, 0x7B31E739, 0x795E9F94, 0x7798FD29, 0x75E06928,
00134   0x7434554D, 0x72943B4B, 0x70FF9C40, 0x6F760031, 0x6DF6F593, 0x6C8210E3,
00135   0x6B16EC3A, 0x69B526F6, 0x685C655F, 0x670C505D, 0x65C4952D, 0x6484E519,
00136   0x634CF53E, 0x621C7E4F, 0x60F33C61, 0x5FD0EEB3, 0x5EB55785, 0x5DA03BEB,
00137   0x5C9163A1, 0x5B8898E6, 0x5A85A85A, 0x598860DF, 0x58909373, 0x579E1318,
00138   0x56B0B4B8, 0x55C84F0B, 0x54E4BA80, 0x5405D124, 0x532B6E8F, 0x52556FD0,
00139   0x5183B35A, 0x50B618F3, 0x4FEC81A2, 0x4F26CFA2, 0x4E64E64E, 0x4DA6AA1D,
00140   0x4CEC008B, 0x4C34D010, 0x4B810016, 0x4AD078EF, 0x4A2323C4, 0x4978EA96,
00141   0x48D1B827, 0x482D77FE, 0x478C1657, 0x46ED801D, 0x4651A2E5, 0x45B86CE2,
00142   0x4521CCE1, 0x448DB244, 0x43FC0CFA, 0x436CCD78, 0x42DFE4B4, 0x42554426,
00143   0x41CCDDB6, 0x4146A3C6, 0x40C28923, 0x40408102
00144 };
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CMSIS DSP Software Library: arm_conv_f32.c File Reference

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arm_conv_f32.c File Reference

#include "arm_math.h"

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Functions

void arm_conv_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst)
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CMSIS DSP Software Library: arm_conv_f32.c Source File

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arm_conv_f32.c

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00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_conv_f32.c
00009 *
00010 * Description:  Convolution of floating-point sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00103 void arm_conv_f32(
00104   float32_t * pSrcA,
00105   uint32_t srcALen,
00106   float32_t * pSrcB,
00107   uint32_t srcBLen,
00108   float32_t * pDst)
00109 {
00110
00111
00112 #ifndef ARM_MATH_CM0
00113
00114   /* Run the below code for Cortex-M4 and Cortex-M3 */
00115
00116   float32_t *pIn1;                               /* inputA pointer */
00117   float32_t *pIn2;                               /* inputB pointer */
00118   float32_t *pOut = pDst;                        /* output pointer */
00119   float32_t *px;                                 /* Intermediate inputA pointer */
00120   float32_t *py;                                 /* Intermediate inputB pointer */
00121   float32_t *pSrc1, *pSrc2;                      /* Intermediate pointers */
00122   float32_t sum, acc0, acc1, acc2, acc3;         /* Accumulator */
00123   float32_t x0, x1, x2, x3, c0;                  /* Temporary variables to hold state and coefficient values */
00124   uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counters */
00125
00126   /* The algorithm implementation is based on the lengths of the inputs. */
00127   /* srcB is always made to slide across srcA. */
00128   /* So srcBLen is always considered as shorter or equal to srcALen */
00129   if(srcALen >= srcBLen)
00130   {
00131     /* Initialization of inputA pointer */
00132     pIn1 = pSrcA;
00133
00134     /* Initialization of inputB pointer */
00135     pIn2 = pSrcB;
00136   }
00137   else
00138   {
00139     /* Initialization of inputA pointer */
00140     pIn1 = pSrcB;
00141
00142     /* Initialization of inputB pointer */
00143     pIn2 = pSrcA;
00144
00145     /* srcBLen is always considered as shorter or equal to srcALen */
00146     j = srcBLen;
00147     srcBLen = srcALen;
00148     srcALen = j;
00149   }
00150
00151   /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00152   /* The function is internally
00153    * divided into three stages according to the number of multiplications that has to be
00154    * taken place between inputA samples and inputB samples. In the first stage of the
00155    * algorithm, the multiplications increase by one for every iteration.
00156    * In the second stage of the algorithm, srcBLen number of multiplications are done.
00157    * In the third stage of the algorithm, the multiplications decrease by one
00158    * for every iteration. */
00159
00160   /* The algorithm is implemented in three stages.
00161      The loop counters of each stage is initiated here. */
00162   blockSize1 = srcBLen - 1u;
00163   blockSize2 = srcALen - (srcBLen - 1u);
00164   blockSize3 = blockSize1;
00165
00166   /* --------------------------
00167    * initializations of stage1
00168    * -------------------------*/
00169
00170   /* sum = x[0] * y[0]
00171    * sum = x[0] * y[1] + x[1] * y[0]
00172    * ....
00173    * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00174    */
00175
00176   /* In this stage the MAC operations are increased by 1 for every iteration.
00177      The count variable holds the number of MAC operations performed */
00178   count = 1u;
00179
00180   /* Working pointer of inputA */
00181   px = pIn1;
00182
00183   /* Working pointer of inputB */
00184   py = pIn2;
00185
00186
00187   /* ------------------------
00188    * Stage1 process
00189    * ----------------------*/
00190
00191   /* The first stage starts here */
00192   while(blockSize1 > 0u)
00193   {
00194     /* Accumulator is made zero for every iteration */
00195     sum = 0.0f;
00196
00197     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00198     k = count >> 2u;
00199
00200     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00201      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00202     while(k > 0u)
00203     {
00204       /* x[0] * y[srcBLen - 1] */
00205       sum += *px++ * *py--;
00206
00207       /* x[1] * y[srcBLen - 2] */
00208       sum += *px++ * *py--;
00209
00210       /* x[2] * y[srcBLen - 3] */
00211       sum += *px++ * *py--;
00212
00213       /* x[3] * y[srcBLen - 4] */
00214       sum += *px++ * *py--;
00215
00216       /* Decrement the loop counter */
00217       k--;
00218     }
00219
00220     /* If the count is not a multiple of 4, compute any remaining MACs here.
00221      ** No loop unrolling is used. */
00222     k = count % 0x4u;
00223
00224     while(k > 0u)
00225     {
00226       /* Perform the multiply-accumulate */
00227       sum += *px++ * *py--;
00228
00229       /* Decrement the loop counter */
00230       k--;
00231     }
00232
00233     /* Store the result in the accumulator in the destination buffer. */
00234     *pOut++ = sum;
00235
00236     /* Update the inputA and inputB pointers for next MAC calculation */
00237     py = pIn2 + count;
00238     px = pIn1;
00239
00240     /* Increment the MAC count */
00241     count++;
00242
00243     /* Decrement the loop counter */
00244     blockSize1--;
00245   }
00246
00247   /* --------------------------
00248    * Initializations of stage2
00249    * ------------------------*/
00250
00251   /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00252    * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00253    * ....
00254    * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00255    */
00256
00257   /* Working pointer of inputA */
00258   px = pIn1;
00259
00260   /* Working pointer of inputB */
00261   pSrc2 = pIn2 + (srcBLen - 1u);
00262   py = pSrc2;
00263
00264   /* count is index by which the pointer pIn1 to be incremented */
00265   count = 1u;
00266
00267   /* -------------------
00268    * Stage2 process
00269    * ------------------*/
00270
00271   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00272    * So, to loop unroll over blockSize2,
00273    * srcBLen should be greater than or equal to 4 */
00274   if(srcBLen >= 4u)
00275   {
00276     /* Loop unroll over blockSize2, by 4 */
00277     blkCnt = blockSize2 >> 2u;
00278
00279     while(blkCnt > 0u)
00280     {
00281       /* Set all accumulators to zero */
00282       acc0 = 0.0f;
00283       acc1 = 0.0f;
00284       acc2 = 0.0f;
00285       acc3 = 0.0f;
00286
00287       /* read x[0], x[1], x[2] samples */
00288       x0 = *(px++);
00289       x1 = *(px++);
00290       x2 = *(px++);
00291
00292       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00293       k = srcBLen >> 2u;
00294
00295       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00296        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00297       do
00298       {
00299         /* Read y[srcBLen - 1] sample */
00300         c0 = *(py--);
00301
00302         /* Read x[3] sample */
00303         x3 = *(px++);
00304
00305         /* Perform the multiply-accumulate */
00306         /* acc0 +=  x[0] * y[srcBLen - 1] */
00307         acc0 += x0 * c0;
00308
00309         /* acc1 +=  x[1] * y[srcBLen - 1] */
00310         acc1 += x1 * c0;
00311
00312         /* acc2 +=  x[2] * y[srcBLen - 1] */
00313         acc2 += x2 * c0;
00314
00315         /* acc3 +=  x[3] * y[srcBLen - 1] */
00316         acc3 += x3 * c0;
00317
00318         /* Read y[srcBLen - 2] sample */
00319         c0 = *(py--);
00320
00321         /* Read x[4] sample */
00322         x0 = *(px++);
00323
00324         /* Perform the multiply-accumulate */
00325         /* acc0 +=  x[1] * y[srcBLen - 2] */
00326         acc0 += x1 * c0;
00327         /* acc1 +=  x[2] * y[srcBLen - 2] */
00328         acc1 += x2 * c0;
00329         /* acc2 +=  x[3] * y[srcBLen - 2] */
00330         acc2 += x3 * c0;
00331         /* acc3 +=  x[4] * y[srcBLen - 2] */
00332         acc3 += x0 * c0;
00333
00334         /* Read y[srcBLen - 3] sample */
00335         c0 = *(py--);
00336
00337         /* Read x[5] sample */
00338         x1 = *(px++);
00339
00340         /* Perform the multiply-accumulates */
00341         /* acc0 +=  x[2] * y[srcBLen - 3] */
00342         acc0 += x2 * c0;
00343         /* acc1 +=  x[3] * y[srcBLen - 2] */
00344         acc1 += x3 * c0;
00345         /* acc2 +=  x[4] * y[srcBLen - 2] */
00346         acc2 += x0 * c0;
00347         /* acc3 +=  x[5] * y[srcBLen - 2] */
00348         acc3 += x1 * c0;
00349
00350         /* Read y[srcBLen - 4] sample */
00351         c0 = *(py--);
00352
00353         /* Read x[6] sample */
00354         x2 = *(px++);
00355
00356         /* Perform the multiply-accumulates */
00357         /* acc0 +=  x[3] * y[srcBLen - 4] */
00358         acc0 += x3 * c0;
00359         /* acc1 +=  x[4] * y[srcBLen - 4] */
00360         acc1 += x0 * c0;
00361         /* acc2 +=  x[5] * y[srcBLen - 4] */
00362         acc2 += x1 * c0;
00363         /* acc3 +=  x[6] * y[srcBLen - 4] */
00364         acc3 += x2 * c0;
00365
00366
00367       } while(--k);
00368
00369       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00370        ** No loop unrolling is used. */
00371       k = srcBLen % 0x4u;
00372
00373       while(k > 0u)
00374       {
00375         /* Read y[srcBLen - 5] sample */
00376         c0 = *(py--);
00377
00378         /* Read x[7] sample */
00379         x3 = *(px++);
00380
00381         /* Perform the multiply-accumulates */
00382         /* acc0 +=  x[4] * y[srcBLen - 5] */
00383         acc0 += x0 * c0;
00384         /* acc1 +=  x[5] * y[srcBLen - 5] */
00385         acc1 += x1 * c0;
00386         /* acc2 +=  x[6] * y[srcBLen - 5] */
00387         acc2 += x2 * c0;
00388         /* acc3 +=  x[7] * y[srcBLen - 5] */
00389         acc3 += x3 * c0;
00390
00391         /* Reuse the present samples for the next MAC */
00392         x0 = x1;
00393         x1 = x2;
00394         x2 = x3;
00395
00396         /* Decrement the loop counter */
00397         k--;
00398       }
00399
00400       /* Store the result in the accumulator in the destination buffer. */
00401       *pOut++ = acc0;
00402       *pOut++ = acc1;
00403       *pOut++ = acc2;
00404       *pOut++ = acc3;
00405
00406       /* Update the inputA and inputB pointers for next MAC calculation */
00407       px = pIn1 + (count * 4u);
00408       py = pSrc2;
00409
00410       /* Increment the pointer pIn1 index, count by 1 */
00411       count++;
00412
00413       /* Decrement the loop counter */
00414       blkCnt--;
00415     }
00416
00417     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00418      ** No loop unrolling is used. */
00419     blkCnt = blockSize2 % 0x4u;
00420
00421     while(blkCnt > 0u)
00422     {
00423       /* Accumulator is made zero for every iteration */
00424       sum = 0.0f;
00425
00426       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00427       k = srcBLen >> 2u;
00428
00429       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00430        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00431       while(k > 0u)
00432       {
00433         /* Perform the multiply-accumulates */
00434         sum += *px++ * *py--;
00435         sum += *px++ * *py--;
00436         sum += *px++ * *py--;
00437         sum += *px++ * *py--;
00438
00439         /* Decrement the loop counter */
00440         k--;
00441       }
00442
00443       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00444        ** No loop unrolling is used. */
00445       k = srcBLen % 0x4u;
00446
00447       while(k > 0u)
00448       {
00449         /* Perform the multiply-accumulate */
00450         sum += *px++ * *py--;
00451
00452         /* Decrement the loop counter */
00453         k--;
00454       }
00455
00456       /* Store the result in the accumulator in the destination buffer. */
00457       *pOut++ = sum;
00458
00459       /* Update the inputA and inputB pointers for next MAC calculation */
00460       px = pIn1 + count;
00461       py = pSrc2;
00462
00463       /* Increment the MAC count */
00464       count++;
00465
00466       /* Decrement the loop counter */
00467       blkCnt--;
00468     }
00469   }
00470   else
00471   {
00472     /* If the srcBLen is not a multiple of 4,
00473      * the blockSize2 loop cannot be unrolled by 4 */
00474     blkCnt = blockSize2;
00475
00476     while(blkCnt > 0u)
00477     {
00478       /* Accumulator is made zero for every iteration */
00479       sum = 0.0f;
00480
00481       /* srcBLen number of MACS should be performed */
00482       k = srcBLen;
00483
00484       while(k > 0u)
00485       {
00486         /* Perform the multiply-accumulate */
00487         sum += *px++ * *py--;
00488
00489         /* Decrement the loop counter */
00490         k--;
00491       }
00492
00493       /* Store the result in the accumulator in the destination buffer. */
00494       *pOut++ = sum;
00495
00496       /* Update the inputA and inputB pointers for next MAC calculation */
00497       px = pIn1 + count;
00498       py = pSrc2;
00499
00500       /* Increment the MAC count */
00501       count++;
00502
00503       /* Decrement the loop counter */
00504       blkCnt--;
00505     }
00506   }
00507
00508
00509   /* --------------------------
00510    * Initializations of stage3
00511    * -------------------------*/
00512
00513   /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00514    * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00515    * ....
00516    * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00517    * sum +=  x[srcALen-1] * y[srcBLen-1]
00518    */
00519
00520   /* In this stage the MAC operations are decreased by 1 for every iteration.
00521      The blockSize3 variable holds the number of MAC operations performed */
00522
00523   /* Working pointer of inputA */
00524   pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00525   px = pSrc1;
00526
00527   /* Working pointer of inputB */
00528   pSrc2 = pIn2 + (srcBLen - 1u);
00529   py = pSrc2;
00530
00531   /* -------------------
00532    * Stage3 process
00533    * ------------------*/
00534
00535   while(blockSize3 > 0u)
00536   {
00537     /* Accumulator is made zero for every iteration */
00538     sum = 0.0f;
00539
00540     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00541     k = blockSize3 >> 2u;
00542
00543     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00544      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00545     while(k > 0u)
00546     {
00547       /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
00548       sum += *px++ * *py--;
00549
00550       /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
00551       sum += *px++ * *py--;
00552
00553       /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
00554       sum += *px++ * *py--;
00555
00556       /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
00557       sum += *px++ * *py--;
00558
00559       /* Decrement the loop counter */
00560       k--;
00561     }
00562
00563     /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
00564      ** No loop unrolling is used. */
00565     k = blockSize3 % 0x4u;
00566
00567     while(k > 0u)
00568     {
00569       /* Perform the multiply-accumulates */
00570       /* sum +=  x[srcALen-1] * y[srcBLen-1] */
00571       sum += *px++ * *py--;
00572
00573       /* Decrement the loop counter */
00574       k--;
00575     }
00576
00577     /* Store the result in the accumulator in the destination buffer. */
00578     *pOut++ = sum;
00579
00580     /* Update the inputA and inputB pointers for next MAC calculation */
00581     px = ++pSrc1;
00582     py = pSrc2;
00583
00584     /* Decrement the loop counter */
00585     blockSize3--;
00586   }
00587
00588 #else
00589
00590   /* Run the below code for Cortex-M0 */
00591
00592   float32_t *pIn1 = pSrcA;                       /* inputA pointer */
00593   float32_t *pIn2 = pSrcB;                       /* inputB pointer */
00594   float32_t sum;                                 /* Accumulator */
00595   uint32_t i, j;                                 /* loop counters */
00596
00597   /* Loop to calculate convolution for output length number of times */
00598   for (i = 0u; i < ((srcALen + srcBLen) - 1u); i++)
00599   {
00600     /* Initialize sum with zero to carry out MAC operations */
00601     sum = 0.0f;
00602
00603     /* Loop to perform MAC operations according to convolution equation */
00604     for (j = 0u; j <= i; j++)
00605     {
00606       /* Check the array limitations */
00607       if((((i - j) < srcBLen) && (j < srcALen)))
00608       {
00609         /* z[i] += x[i-j] * y[j] */
00610         sum += pIn1[j] * pIn2[i - j];
00611       }
00612     }
00613     /* Store the output in the destination buffer */
00614     pDst[i] = sum;
00615   }
00616
00617 #endif /*   #ifndef ARM_MATH_CM0        */
00618
00619 }
00620
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CMSIS DSP Software Library: arm_conv_fast_q15.c File Reference

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arm_conv_fast_q15.c File Reference

#include "arm_math.h"

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Functions

void arm_conv_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
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CMSIS DSP Software Library: arm_conv_fast_q15.c Source File

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arm_conv_fast_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_conv_fast_q15.c
00009 *
00010 * Description:  Fast Q15 Convolution.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00066 void arm_conv_fast_q15(
00067   q15_t * pSrcA,
00068   uint32_t srcALen,
00069   q15_t * pSrcB,
00070   uint32_t srcBLen,
00071   q15_t * pDst)
00072 {
00073   q15_t *pIn1;                                   /* inputA pointer */
00074   q15_t *pIn2;                                   /* inputB pointer */
00075   q15_t *pOut = pDst;                            /* output pointer */
00076   q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
00077   q15_t *px;                                     /* Intermediate inputA pointer  */
00078   q15_t *py;                                     /* Intermediate inputB pointer  */
00079   q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
00080   q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
00081   uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt;     /* loop counter */
00082   q31_t *pb;                                     /* 32 bit pointer for inputB buffer */
00083
00084
00085   /* The algorithm implementation is based on the lengths of the inputs. */
00086   /* srcB is always made to slide across srcA. */
00087   /* So srcBLen is always considered as shorter or equal to srcALen */
00088   if(srcALen >= srcBLen)
00089   {
00090     /* Initialization of inputA pointer */
00091     pIn1 = pSrcA;
00092
00093     /* Initialization of inputB pointer */
00094     pIn2 = pSrcB;
00095   }
00096   else
00097   {
00098     /* Initialization of inputA pointer */
00099     pIn1 = pSrcB;
00100
00101     /* Initialization of inputB pointer */
00102     pIn2 = pSrcA;
00103
00104     /* srcBLen is always considered as shorter or equal to srcALen */
00105     j = srcBLen;
00106     srcBLen = srcALen;
00107     srcALen = j;
00108   }
00109
00110   /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00111   /* The function is internally
00112    * divided into three stages according to the number of multiplications that has to be
00113    * taken place between inputA samples and inputB samples. In the first stage of the
00114    * algorithm, the multiplications increase by one for every iteration.
00115    * In the second stage of the algorithm, srcBLen number of multiplications are done.
00116    * In the third stage of the algorithm, the multiplications decrease by one
00117    * for every iteration. */
00118
00119   /* The algorithm is implemented in three stages.
00120      The loop counters of each stage is initiated here. */
00121   blockSize1 = srcBLen - 1u;
00122   blockSize2 = srcALen - (srcBLen - 1u);
00123   blockSize3 = blockSize1;
00124
00125   /* --------------------------
00126    * Initializations of stage1
00127    * -------------------------*/
00128
00129   /* sum = x[0] * y[0]
00130    * sum = x[0] * y[1] + x[1] * y[0]
00131    * ....
00132    * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00133    */
00134
00135   /* In this stage the MAC operations are increased by 1 for every iteration.
00136      The count variable holds the number of MAC operations performed */
00137   count = 1u;
00138
00139   /* Working pointer of inputA */
00140   px = pIn1;
00141
00142   /* Working pointer of inputB */
00143   py = pIn2;
00144
00145
00146   /* ------------------------
00147    * Stage1 process
00148    * ----------------------*/
00149
00150   /* For loop unrolling by 4, this stage is divided into two. */
00151   /* First part of this stage computes the MAC operations less than 4 */
00152   /* Second part of this stage computes the MAC operations greater than or equal to 4 */
00153
00154   /* The first part of the stage starts here */
00155   while((count < 4u) && (blockSize1 > 0u))
00156   {
00157     /* Accumulator is made zero for every iteration */
00158     sum = 0;
00159
00160     /* Loop over number of MAC operations between
00161      * inputA samples and inputB samples */
00162     k = count;
00163
00164     while(k > 0u)
00165     {
00166       /* Perform the multiply-accumulates */
00167       sum = __SMLAD(*px++, *py--, sum);
00168
00169       /* Decrement the loop counter */
00170       k--;
00171     }
00172
00173     /* Store the result in the accumulator in the destination buffer. */
00174     *pOut++ = (q15_t) (sum >> 15);
00175
00176     /* Update the inputA and inputB pointers for next MAC calculation */
00177     py = pIn2 + count;
00178     px = pIn1;
00179
00180     /* Increment the MAC count */
00181     count++;
00182
00183     /* Decrement the loop counter */
00184     blockSize1--;
00185   }
00186
00187   /* The second part of the stage starts here */
00188   /* The internal loop, over count, is unrolled by 4 */
00189   /* To, read the last two inputB samples using SIMD:
00190    * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
00191   py = py - 1;
00192
00193   while(blockSize1 > 0u)
00194   {
00195     /* Accumulator is made zero for every iteration */
00196     sum = 0;
00197
00198     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00199     k = count >> 2u;
00200
00201     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00202      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00203     while(k > 0u)
00204     {
00205       /* Perform the multiply-accumulates */
00206       /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
00207       sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00208       /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
00209       sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00210
00211       /* Decrement the loop counter */
00212       k--;
00213     }
00214
00215     /* For the next MAC operations, the pointer py is used without SIMD
00216      * So, py is incremented by 1 */
00217     py = py + 1u;
00218
00219     /* If the count is not a multiple of 4, compute any remaining MACs here.
00220      ** No loop unrolling is used. */
00221     k = count % 0x4u;
00222
00223     while(k > 0u)
00224     {
00225       /* Perform the multiply-accumulates */
00226       sum = __SMLAD(*px++, *py--, sum);
00227
00228       /* Decrement the loop counter */
00229       k--;
00230     }
00231
00232     /* Store the result in the accumulator in the destination buffer. */
00233     *pOut++ = (q15_t) (sum >> 15);
00234
00235     /* Update the inputA and inputB pointers for next MAC calculation */
00236     py = pIn2 + (count - 1u);
00237     px = pIn1;
00238
00239     /* Increment the MAC count */
00240     count++;
00241
00242     /* Decrement the loop counter */
00243     blockSize1--;
00244   }
00245
00246   /* --------------------------
00247    * Initializations of stage2
00248    * ------------------------*/
00249
00250   /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00251    * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00252    * ....
00253    * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00254    */
00255
00256   /* Working pointer of inputA */
00257   px = pIn1;
00258
00259   /* Working pointer of inputB */
00260   pSrc2 = pIn2 + (srcBLen - 1u);
00261   py = pSrc2;
00262
00263   /* Initialize inputB pointer of type q31 */
00264   pb = (q31_t *) (py - 1u);
00265
00266   /* count is the index by which the pointer pIn1 to be incremented */
00267   count = 1u;
00268
00269
00270   /* --------------------
00271    * Stage2 process
00272    * -------------------*/
00273
00274   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00275    * So, to loop unroll over blockSize2,
00276    * srcBLen should be greater than or equal to 4 */
00277   if(srcBLen >= 4u)
00278   {
00279     /* Loop unroll over blockSize2, by 4 */
00280     blkCnt = blockSize2 >> 2u;
00281
00282     while(blkCnt > 0u)
00283     {
00284       /* Set all accumulators to zero */
00285       acc0 = 0;
00286       acc1 = 0;
00287       acc2 = 0;
00288       acc3 = 0;
00289
00290
00291       /* read x[0], x[1] samples */
00292       x0 = *(q31_t *) (px++);
00293       /* read x[1], x[2] samples */
00294       x1 = *(q31_t *) (px++);
00295
00296
00297       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00298       k = srcBLen >> 2u;
00299
00300       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00301        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00302       do
00303       {
00304         /* Read the last two inputB samples using SIMD:
00305          * y[srcBLen - 1] and y[srcBLen - 2] */
00306         c0 = *(pb--);
00307
00308         /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
00309         acc0 = __SMLADX(x0, c0, acc0);
00310
00311         /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
00312         acc1 = __SMLADX(x1, c0, acc1);
00313
00314         /* Read x[2], x[3] */
00315         x2 = *(q31_t *) (px++);
00316
00317         /* Read x[3], x[4] */
00318         x3 = *(q31_t *) (px++);
00319
00320         /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
00321         acc2 = __SMLADX(x2, c0, acc2);
00322
00323         /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
00324         acc3 = __SMLADX(x3, c0, acc3);
00325
00326         /* Read y[srcBLen - 3] and y[srcBLen - 4] */
00327         c0 = *(pb--);
00328
00329         /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
00330         acc0 = __SMLADX(x2, c0, acc0);
00331
00332         /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
00333         acc1 = __SMLADX(x3, c0, acc1);
00334
00335         /* Read x[4], x[5] */
00336         x0 = *(q31_t *) (px++);
00337
00338         /* Read x[5], x[6] */
00339         x1 = *(q31_t *) (px++);
00340
00341         /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
00342         acc2 = __SMLADX(x0, c0, acc2);
00343
00344         /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
00345         acc3 = __SMLADX(x1, c0, acc3);
00346
00347       } while(--k);
00348
00349       /* For the next MAC operations, SIMD is not used
00350        * So, the 16 bit pointer if inputB, py is updated */
00351       py = (q15_t *) pb;
00352       py = py + 1;
00353
00354       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00355        ** No loop unrolling is used. */
00356       k = srcBLen % 0x4u;
00357
00358       if(k == 1u)
00359       {
00360         /* Read y[srcBLen - 5] */
00361         c0 = *(py);
00362 #ifdef  ARM_MATH_BIG_ENDIAN
00363
00364 //          c0 = unallign_rev(p, c0);
00365         c0 = c0 << 16;
00366 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00367
00368         /* Read x[7] */
00369         x3 = *(q31_t *) px++;
00370
00371         /* Perform the multiply-accumulates */
00372         acc0 = __SMLAD(x0, c0, acc0);
00373         acc1 = __SMLAD(x1, c0, acc1);
00374         acc2 = __SMLADX(x1, c0, acc2);
00375         acc3 = __SMLADX(x3, c0, acc3);
00376       }
00377
00378       if(k == 2u)
00379       {
00380         /* Read y[srcBLen - 5], y[srcBLen - 6] */
00381         c0 = *(pb);
00382
00383         /* Read x[7], x[8] */
00384         x3 = *(q31_t *) px++;
00385
00386         /* Read x[9] */
00387         x2 = *(q31_t *) px++;
00388
00389         /* Perform the multiply-accumulates */
00390         acc0 = __SMLADX(x0, c0, acc0);
00391         acc1 = __SMLADX(x1, c0, acc1);
00392         acc2 = __SMLADX(x3, c0, acc2);
00393         acc3 = __SMLADX(x2, c0, acc3);
00394       }
00395
00396       if(k == 3u)
00397       {
00398         /* Read y[srcBLen - 5], y[srcBLen - 6] */
00399         c0 = *pb--;
00400
00401         /* Read x[7], x[8] */
00402         x3 = *(q31_t *) px++;
00403
00404         /* Read x[9] */
00405         x2 = *(q31_t *) px++;
00406
00407         /* Perform the multiply-accumulates */
00408         acc0 = __SMLADX(x0, c0, acc0);
00409         acc1 = __SMLADX(x1, c0, acc1);
00410         acc2 = __SMLADX(x3, c0, acc2);
00411         acc3 = __SMLADX(x2, c0, acc3);
00412
00413         /* Read y[srcBLen - 7] */
00414 #ifdef  ARM_MATH_BIG_ENDIAN
00415
00416         c0 = (*pb);
00417 //              c0 = (c0 & 0x0000FFFF)<<16;
00418         c0 = (c0) << 16;
00419
00420 #else
00421
00422         c0 = (q15_t) (*pb >> 16);
00423
00424 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00425
00426         /* Read x[10] */
00427         x3 = *(q31_t *) px++;
00428
00429         /* Perform the multiply-accumulates */
00430         acc0 = __SMLADX(x1, c0, acc0);
00431         acc1 = __SMLAD(x2, c0, acc1);
00432         acc2 = __SMLADX(x2, c0, acc2);
00433         acc3 = __SMLADX(x3, c0, acc3);
00434       }
00435
00436       /* Store the results in the accumulators in the destination buffer. */
00437 #ifndef ARM_MATH_BIG_ENDIAN
00438
00439       *__SIMD32(pOut)++ = __PKHBT((acc0 >> 15), (acc1 >> 15), 16);
00440       *__SIMD32(pOut)++ = __PKHBT((acc2 >> 15), (acc3 >> 15), 16);
00441
00442 #else
00443
00444       *__SIMD32(pOut)++ = __PKHBT((acc1 >> 15), (acc0 >> 15), 16);
00445       *__SIMD32(pOut)++ = __PKHBT((acc3 >> 15), (acc2 >> 15), 16);
00446
00447 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00448       /* Update the inputA and inputB pointers for next MAC calculation */
00449       px = pIn1 + (count * 4u);
00450       py = pSrc2;
00451       pb = (q31_t *) (py - 1);
00452
00453       /* Increment the pointer pIn1 index, count by 1 */
00454       count++;
00455
00456       /* Decrement the loop counter */
00457       blkCnt--;
00458     }
00459
00460     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00461      ** No loop unrolling is used. */
00462     blkCnt = blockSize2 % 0x4u;
00463
00464     while(blkCnt > 0u)
00465     {
00466       /* Accumulator is made zero for every iteration */
00467       sum = 0;
00468
00469       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00470       k = srcBLen >> 2u;
00471
00472       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00473        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00474       while(k > 0u)
00475       {
00476         /* Perform the multiply-accumulates */
00477         sum += ((q31_t) * px++ * *py--);
00478         sum += ((q31_t) * px++ * *py--);
00479         sum += ((q31_t) * px++ * *py--);
00480         sum += ((q31_t) * px++ * *py--);
00481
00482         /* Decrement the loop counter */
00483         k--;
00484       }
00485
00486       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00487        ** No loop unrolling is used. */
00488       k = srcBLen % 0x4u;
00489
00490       while(k > 0u)
00491       {
00492         /* Perform the multiply-accumulates */
00493         sum += ((q31_t) * px++ * *py--);
00494
00495         /* Decrement the loop counter */
00496         k--;
00497       }
00498
00499       /* Store the result in the accumulator in the destination buffer. */
00500       *pOut++ = (q15_t) (sum >> 15);
00501
00502       /* Update the inputA and inputB pointers for next MAC calculation */
00503       px = pIn1 + count;
00504       py = pSrc2;
00505
00506       /* Increment the pointer pIn1 index, count by 1 */
00507       count++;
00508
00509       /* Decrement the loop counter */
00510       blkCnt--;
00511     }
00512   }
00513   else
00514   {
00515     /* If the srcBLen is not a multiple of 4,
00516      * the blockSize2 loop cannot be unrolled by 4 */
00517     blkCnt = blockSize2;
00518
00519     while(blkCnt > 0u)
00520     {
00521       /* Accumulator is made zero for every iteration */
00522       sum = 0;
00523
00524       /* srcBLen number of MACS should be performed */
00525       k = srcBLen;
00526
00527       while(k > 0u)
00528       {
00529         /* Perform the multiply-accumulate */
00530         sum += ((q31_t) * px++ * *py--);
00531
00532         /* Decrement the loop counter */
00533         k--;
00534       }
00535
00536       /* Store the result in the accumulator in the destination buffer. */
00537       *pOut++ = (q15_t) (sum >> 15);
00538
00539       /* Update the inputA and inputB pointers for next MAC calculation */
00540       px = pIn1 + count;
00541       py = pSrc2;
00542
00543       /* Increment the MAC count */
00544       count++;
00545
00546       /* Decrement the loop counter */
00547       blkCnt--;
00548     }
00549   }
00550
00551
00552   /* --------------------------
00553    * Initializations of stage3
00554    * -------------------------*/
00555
00556   /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00557    * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00558    * ....
00559    * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00560    * sum +=  x[srcALen-1] * y[srcBLen-1]
00561    */
00562
00563   /* In this stage the MAC operations are decreased by 1 for every iteration.
00564      The blockSize3 variable holds the number of MAC operations performed */
00565
00566   /* Working pointer of inputA */
00567   pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00568   px = pSrc1;
00569
00570   /* Working pointer of inputB */
00571   pSrc2 = pIn2 + (srcBLen - 1u);
00572   pIn2 = pSrc2 - 1u;
00573   py = pIn2;
00574
00575   /* -------------------
00576    * Stage3 process
00577    * ------------------*/
00578
00579   /* For loop unrolling by 4, this stage is divided into two. */
00580   /* First part of this stage computes the MAC operations greater than 4 */
00581   /* Second part of this stage computes the MAC operations less than or equal to 4 */
00582
00583   /* The first part of the stage starts here */
00584   j = blockSize3 >> 2u;
00585
00586   while((j > 0u) && (blockSize3 > 0u))
00587   {
00588     /* Accumulator is made zero for every iteration */
00589     sum = 0;
00590
00591     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00592     k = blockSize3 >> 2u;
00593
00594     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00595      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00596     while(k > 0u)
00597     {
00598       /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
00599        * with y[srcBLen - 1], y[srcBLen - 2] respectively */
00600       sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00601       /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
00602        * with y[srcBLen - 3], y[srcBLen - 4] respectively */
00603       sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00604
00605       /* Decrement the loop counter */
00606       k--;
00607     }
00608
00609     /* For the next MAC operations, the pointer py is used without SIMD
00610      * So, py is incremented by 1 */
00611     py = py + 1u;
00612
00613     /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
00614      ** No loop unrolling is used. */
00615     k = blockSize3 % 0x4u;
00616
00617     while(k > 0u)
00618     {
00619       /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
00620       sum = __SMLAD(*px++, *py--, sum);
00621
00622       /* Decrement the loop counter */
00623       k--;
00624     }
00625
00626     /* Store the result in the accumulator in the destination buffer. */
00627     *pOut++ = (q15_t) (sum >> 15);
00628
00629     /* Update the inputA and inputB pointers for next MAC calculation */
00630     px = ++pSrc1;
00631     py = pIn2;
00632
00633     /* Decrement the loop counter */
00634     blockSize3--;
00635
00636     j--;
00637   }
00638
00639   /* The second part of the stage starts here */
00640   /* SIMD is not used for the next MAC operations,
00641    * so pointer py is updated to read only one sample at a time */
00642   py = py + 1u;
00643
00644   while(blockSize3 > 0u)
00645   {
00646     /* Accumulator is made zero for every iteration */
00647     sum = 0;
00648
00649     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00650     k = blockSize3;
00651
00652     while(k > 0u)
00653     {
00654       /* Perform the multiply-accumulates */
00655       /* sum +=  x[srcALen-1] * y[srcBLen-1] */
00656       sum = __SMLAD(*px++, *py--, sum);
00657
00658       /* Decrement the loop counter */
00659       k--;
00660     }
00661
00662     /* Store the result in the accumulator in the destination buffer. */
00663     *pOut++ = (q15_t) (sum >> 15);
00664
00665     /* Update the inputA and inputB pointers for next MAC calculation */
00666     px = ++pSrc1;
00667     py = pSrc2;
00668
00669     /* Decrement the loop counter */
00670     blockSize3--;
00671   }
00672
00673 }
00674
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CMSIS DSP Software Library: arm_conv_fast_q31.c File Reference

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arm_conv_fast_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_conv_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
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CMSIS DSP Software Library: arm_conv_fast_q31.c Source File

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arm_conv_fast_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_conv_fast_q31.c
00009 *
00010 * Description:  Q31 Convolution (fast version).
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00068 void arm_conv_fast_q31(
00069   q31_t * pSrcA,
00070   uint32_t srcALen,
00071   q31_t * pSrcB,
00072   uint32_t srcBLen,
00073   q31_t * pDst)
00074 {
00075   q31_t *pIn1;                                   /* inputA pointer */
00076   q31_t *pIn2;                                   /* inputB pointer */
00077   q31_t *pOut = pDst;                            /* output pointer */
00078   q31_t *px;                                     /* Intermediate inputA pointer  */
00079   q31_t *py;                                     /* Intermediate inputB pointer  */
00080   q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
00081   q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
00082   q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
00083   uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counter */
00084
00085
00086   /* The algorithm implementation is based on the lengths of the inputs. */
00087   /* srcB is always made to slide across srcA. */
00088   /* So srcBLen is always considered as shorter or equal to srcALen */
00089   if(srcALen >= srcBLen)
00090   {
00091     /* Initialization of inputA pointer */
00092     pIn1 = pSrcA;
00093
00094     /* Initialization of inputB pointer */
00095     pIn2 = pSrcB;
00096   }
00097   else
00098   {
00099     /* Initialization of inputA pointer */
00100     pIn1 = pSrcB;
00101
00102     /* Initialization of inputB pointer */
00103     pIn2 = pSrcA;
00104
00105     /* srcBLen is always considered as shorter or equal to srcALen */
00106     j = srcBLen;
00107     srcBLen = srcALen;
00108     srcALen = j;
00109   }
00110
00111   /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00112   /* The function is internally
00113    * divided into three stages according to the number of multiplications that has to be
00114    * taken place between inputA samples and inputB samples. In the first stage of the
00115    * algorithm, the multiplications increase by one for every iteration.
00116    * In the second stage of the algorithm, srcBLen number of multiplications are done.
00117    * In the third stage of the algorithm, the multiplications decrease by one
00118    * for every iteration. */
00119
00120   /* The algorithm is implemented in three stages.
00121      The loop counters of each stage is initiated here. */
00122   blockSize1 = srcBLen - 1u;
00123   blockSize2 = srcALen - (srcBLen - 1u);
00124   blockSize3 = blockSize1;
00125
00126   /* --------------------------
00127    * Initializations of stage1
00128    * -------------------------*/
00129
00130   /* sum = x[0] * y[0]
00131    * sum = x[0] * y[1] + x[1] * y[0]
00132    * ....
00133    * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00134    */
00135
00136   /* In this stage the MAC operations are increased by 1 for every iteration.
00137      The count variable holds the number of MAC operations performed */
00138   count = 1u;
00139
00140   /* Working pointer of inputA */
00141   px = pIn1;
00142
00143   /* Working pointer of inputB */
00144   py = pIn2;
00145
00146
00147   /* ------------------------
00148    * Stage1 process
00149    * ----------------------*/
00150
00151   /* The first stage starts here */
00152   while(blockSize1 > 0u)
00153   {
00154     /* Accumulator is made zero for every iteration */
00155     sum = 0;
00156
00157     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00158     k = count >> 2u;
00159
00160     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00161      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00162     while(k > 0u)
00163     {
00164       /* x[0] * y[srcBLen - 1] */
00165       sum = (q31_t) ((((q63_t) sum << 32) +
00166                       ((q63_t) * px++ * (*py--))) >> 32);
00167
00168       /* x[1] * y[srcBLen - 2] */
00169       sum = (q31_t) ((((q63_t) sum << 32) +
00170                       ((q63_t) * px++ * (*py--))) >> 32);
00171
00172       /* x[2] * y[srcBLen - 3] */
00173       sum = (q31_t) ((((q63_t) sum << 32) +
00174                       ((q63_t) * px++ * (*py--))) >> 32);
00175
00176       /* x[3] * y[srcBLen - 4] */
00177       sum = (q31_t) ((((q63_t) sum << 32) +
00178                       ((q63_t) * px++ * (*py--))) >> 32);
00179
00180       /* Decrement the loop counter */
00181       k--;
00182     }
00183
00184     /* If the count is not a multiple of 4, compute any remaining MACs here.
00185      ** No loop unrolling is used. */
00186     k = count % 0x4u;
00187
00188     while(k > 0u)
00189     {
00190       /* Perform the multiply-accumulate */
00191       sum = (q31_t) ((((q63_t) sum << 32) +
00192                       ((q63_t) * px++ * (*py--))) >> 32);
00193
00194       /* Decrement the loop counter */
00195       k--;
00196     }
00197
00198     /* Store the result in the accumulator in the destination buffer. */
00199     *pOut++ = sum << 1;
00200
00201     /* Update the inputA and inputB pointers for next MAC calculation */
00202     py = pIn2 + count;
00203     px = pIn1;
00204
00205     /* Increment the MAC count */
00206     count++;
00207
00208     /* Decrement the loop counter */
00209     blockSize1--;
00210   }
00211
00212   /* --------------------------
00213    * Initializations of stage2
00214    * ------------------------*/
00215
00216   /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00217    * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00218    * ....
00219    * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00220    */
00221
00222   /* Working pointer of inputA */
00223   px = pIn1;
00224
00225   /* Working pointer of inputB */
00226   pSrc2 = pIn2 + (srcBLen - 1u);
00227   py = pSrc2;
00228
00229   /* count is index by which the pointer pIn1 to be incremented */
00230   count = 1u;
00231
00232   /* -------------------
00233    * Stage2 process
00234    * ------------------*/
00235
00236   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00237    * So, to loop unroll over blockSize2,
00238    * srcBLen should be greater than or equal to 4 */
00239   if(srcBLen >= 4u)
00240   {
00241     /* Loop unroll over blockSize2, by 4 */
00242     blkCnt = blockSize2 >> 2u;
00243
00244     while(blkCnt > 0u)
00245     {
00246       /* Set all accumulators to zero */
00247       acc0 = 0;
00248       acc1 = 0;
00249       acc2 = 0;
00250       acc3 = 0;
00251
00252       /* read x[0], x[1], x[2] samples */
00253       x0 = *(px++);
00254       x1 = *(px++);
00255       x2 = *(px++);
00256
00257       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00258       k = srcBLen >> 2u;
00259
00260       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00261        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00262       do
00263       {
00264         /* Read y[srcBLen - 1] sample */
00265         c0 = *(py--);
00266
00267         /* Read x[3] sample */
00268         x3 = *(px++);
00269
00270         /* Perform the multiply-accumulates */
00271         /* acc0 +=  x[0] * y[srcBLen - 1] */
00272         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
00273
00274         /* acc1 +=  x[1] * y[srcBLen - 1] */
00275         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
00276
00277         /* acc2 +=  x[2] * y[srcBLen - 1] */
00278         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
00279
00280         /* acc3 +=  x[3] * y[srcBLen - 1] */
00281         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
00282
00283         /* Read y[srcBLen - 2] sample */
00284         c0 = *(py--);
00285
00286         /* Read x[4] sample */
00287         x0 = *(px++);
00288
00289         /* Perform the multiply-accumulate */
00290         /* acc0 +=  x[1] * y[srcBLen - 2] */
00291         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
00292         /* acc1 +=  x[2] * y[srcBLen - 2] */
00293         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32);
00294         /* acc2 +=  x[3] * y[srcBLen - 2] */
00295         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32);
00296         /* acc3 +=  x[4] * y[srcBLen - 2] */
00297         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
00298
00299         /* Read y[srcBLen - 3] sample */
00300         c0 = *(py--);
00301
00302         /* Read x[5] sample */
00303         x1 = *(px++);
00304
00305         /* Perform the multiply-accumulates */
00306         /* acc0 +=  x[2] * y[srcBLen - 3] */
00307         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32);
00308         /* acc1 +=  x[3] * y[srcBLen - 2] */
00309         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32);
00310         /* acc2 +=  x[4] * y[srcBLen - 2] */
00311         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32);
00312         /* acc3 +=  x[5] * y[srcBLen - 2] */
00313         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
00314
00315         /* Read y[srcBLen - 4] sample */
00316         c0 = *(py--);
00317
00318         /* Read x[6] sample */
00319         x2 = *(px++);
00320
00321         /* Perform the multiply-accumulates */
00322         /* acc0 +=  x[3] * y[srcBLen - 4] */
00323         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32);
00324         /* acc1 +=  x[4] * y[srcBLen - 4] */
00325         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32);
00326         /* acc2 +=  x[5] * y[srcBLen - 4] */
00327         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32);
00328         /* acc3 +=  x[6] * y[srcBLen - 4] */
00329         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
00330
00331
00332       } while(--k);
00333
00334       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00335        ** No loop unrolling is used. */
00336       k = srcBLen % 0x4u;
00337
00338       while(k > 0u)
00339       {
00340         /* Read y[srcBLen - 5] sample */
00341         c0 = *(py--);
00342
00343         /* Read x[7] sample */
00344         x3 = *(px++);
00345
00346         /* Perform the multiply-accumulates */
00347         /* acc0 +=  x[4] * y[srcBLen - 5] */
00348         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
00349         /* acc1 +=  x[5] * y[srcBLen - 5] */
00350         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
00351         /* acc2 +=  x[6] * y[srcBLen - 5] */
00352         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
00353         /* acc3 +=  x[7] * y[srcBLen - 5] */
00354         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
00355
00356         /* Reuse the present samples for the next MAC */
00357         x0 = x1;
00358         x1 = x2;
00359         x2 = x3;
00360
00361         /* Decrement the loop counter */
00362         k--;
00363       }
00364
00365       /* Store the results in the accumulators in the destination buffer. */
00366       *pOut++ = (q31_t) (acc0 << 1);
00367       *pOut++ = (q31_t) (acc1 << 1);
00368       *pOut++ = (q31_t) (acc2 << 1);
00369       *pOut++ = (q31_t) (acc3 << 1);
00370
00371       /* Update the inputA and inputB pointers for next MAC calculation */
00372       px = pIn1 + (count * 4u);
00373       py = pSrc2;
00374
00375       /* Increment the pointer pIn1 index, count by 1 */
00376       count++;
00377
00378       /* Decrement the loop counter */
00379       blkCnt--;
00380     }
00381
00382     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00383      ** No loop unrolling is used. */
00384     blkCnt = blockSize2 % 0x4u;
00385
00386     while(blkCnt > 0u)
00387     {
00388       /* Accumulator is made zero for every iteration */
00389       sum = 0;
00390
00391       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00392       k = srcBLen >> 2u;
00393
00394       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00395        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00396       while(k > 0u)
00397       {
00398         /* Perform the multiply-accumulates */
00399         sum = (q31_t) ((((q63_t) sum << 32) +
00400                         ((q63_t) * px++ * (*py--))) >> 32);
00401         sum = (q31_t) ((((q63_t) sum << 32) +
00402                         ((q63_t) * px++ * (*py--))) >> 32);
00403         sum = (q31_t) ((((q63_t) sum << 32) +
00404                         ((q63_t) * px++ * (*py--))) >> 32);
00405         sum = (q31_t) ((((q63_t) sum << 32) +
00406                         ((q63_t) * px++ * (*py--))) >> 32);
00407
00408         /* Decrement the loop counter */
00409         k--;
00410       }
00411
00412       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00413        ** No loop unrolling is used. */
00414       k = srcBLen % 0x4u;
00415
00416       while(k > 0u)
00417       {
00418         /* Perform the multiply-accumulate */
00419         sum = (q31_t) ((((q63_t) sum << 32) +
00420                         ((q63_t) * px++ * (*py--))) >> 32);
00421
00422         /* Decrement the loop counter */
00423         k--;
00424       }
00425
00426       /* Store the result in the accumulator in the destination buffer. */
00427       *pOut++ = sum << 1;
00428
00429       /* Update the inputA and inputB pointers for next MAC calculation */
00430       px = pIn1 + count;
00431       py = pSrc2;
00432
00433       /* Increment the MAC count */
00434       count++;
00435
00436       /* Decrement the loop counter */
00437       blkCnt--;
00438     }
00439   }
00440   else
00441   {
00442     /* If the srcBLen is not a multiple of 4,
00443      * the blockSize2 loop cannot be unrolled by 4 */
00444     blkCnt = blockSize2;
00445
00446     while(blkCnt > 0u)
00447     {
00448       /* Accumulator is made zero for every iteration */
00449       sum = 0;
00450
00451       /* srcBLen number of MACS should be performed */
00452       k = srcBLen;
00453
00454       while(k > 0u)
00455       {
00456         /* Perform the multiply-accumulate */
00457         sum = (q31_t) ((((q63_t) sum << 32) +
00458                         ((q63_t) * px++ * (*py--))) >> 32);
00459
00460         /* Decrement the loop counter */
00461         k--;
00462       }
00463
00464       /* Store the result in the accumulator in the destination buffer. */
00465       *pOut++ = sum << 1;
00466
00467       /* Update the inputA and inputB pointers for next MAC calculation */
00468       px = pIn1 + count;
00469       py = pSrc2;
00470
00471       /* Increment the MAC count */
00472       count++;
00473
00474       /* Decrement the loop counter */
00475       blkCnt--;
00476     }
00477   }
00478
00479
00480   /* --------------------------
00481    * Initializations of stage3
00482    * -------------------------*/
00483
00484   /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00485    * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00486    * ....
00487    * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00488    * sum +=  x[srcALen-1] * y[srcBLen-1]
00489    */
00490
00491   /* In this stage the MAC operations are decreased by 1 for every iteration.
00492      The blockSize3 variable holds the number of MAC operations performed */
00493
00494   /* Working pointer of inputA */
00495   pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00496   px = pSrc1;
00497
00498   /* Working pointer of inputB */
00499   pSrc2 = pIn2 + (srcBLen - 1u);
00500   py = pSrc2;
00501
00502   /* -------------------
00503    * Stage3 process
00504    * ------------------*/
00505
00506   while(blockSize3 > 0u)
00507   {
00508     /* Accumulator is made zero for every iteration */
00509     sum = 0;
00510
00511     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00512     k = blockSize3 >> 2u;
00513
00514     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00515      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00516     while(k > 0u)
00517     {
00518       /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
00519       sum = (q31_t) ((((q63_t) sum << 32) +
00520                       ((q63_t) * px++ * (*py--))) >> 32);
00521
00522       /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
00523       sum = (q31_t) ((((q63_t) sum << 32) +
00524                       ((q63_t) * px++ * (*py--))) >> 32);
00525
00526       /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
00527       sum = (q31_t) ((((q63_t) sum << 32) +
00528                       ((q63_t) * px++ * (*py--))) >> 32);
00529
00530       /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
00531       sum = (q31_t) ((((q63_t) sum << 32) +
00532                       ((q63_t) * px++ * (*py--))) >> 32);
00533
00534       /* Decrement the loop counter */
00535       k--;
00536     }
00537
00538     /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
00539      ** No loop unrolling is used. */
00540     k = blockSize3 % 0x4u;
00541
00542     while(k > 0u)
00543     {
00544       /* Perform the multiply-accumulate */
00545       sum = (q31_t) ((((q63_t) sum << 32) +
00546                       ((q63_t) * px++ * (*py--))) >> 32);
00547
00548       /* Decrement the loop counter */
00549       k--;
00550     }
00551
00552     /* Store the result in the accumulator in the destination buffer. */
00553     *pOut++ = sum << 1;
00554
00555     /* Update the inputA and inputB pointers for next MAC calculation */
00556     px = ++pSrc1;
00557     py = pSrc2;
00558
00559     /* Decrement the loop counter */
00560     blockSize3--;
00561   }
00562
00563 }
00564
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CMSIS DSP Software Library: arm_conv_partial_f32.c File Reference

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arm_conv_partial_f32.c File Reference

#include "arm_math.h"

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Functions

arm_status arm_conv_partial_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst, uint32_t firstIndex, uint32_t numPoints)
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CMSIS DSP Software Library: arm_conv_partial_f32.c Source File

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arm_conv_partial_f32.c

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00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_conv_partial_f32.c
00009 *
00010 * Description:  Partial convolution of floating-point sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00074 arm_status arm_conv_partial_f32(
00075   float32_t * pSrcA,
00076   uint32_t srcALen,
00077   float32_t * pSrcB,
00078   uint32_t srcBLen,
00079   float32_t * pDst,
00080   uint32_t firstIndex,
00081   uint32_t numPoints)
00082 {
00083
00084
00085 #ifndef ARM_MATH_CM0
00086
00087   /* Run the below code for Cortex-M4 and Cortex-M3 */
00088
00089   float32_t *pIn1 = pSrcA;                       /* inputA pointer */
00090   float32_t *pIn2 = pSrcB;                       /* inputB pointer */
00091   float32_t *pOut = pDst;                        /* output pointer */
00092   float32_t *px;                                 /* Intermediate inputA pointer */
00093   float32_t *py;                                 /* Intermediate inputB pointer */
00094   float32_t *pSrc1, *pSrc2;                      /* Intermediate pointers */
00095   float32_t sum, acc0, acc1, acc2, acc3;         /* Accumulator */
00096   float32_t x0, x1, x2, x3, c0;                  /* Temporary variables to hold state and coefficient values */
00097   uint32_t j, k, count = 0u, blkCnt, check;
00098   int32_t blockSize1, blockSize2, blockSize3;    /* loop counters */
00099   arm_status status;                             /* status of Partial convolution */
00100
00101
00102   /* Check for range of output samples to be calculated */
00103   if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
00104   {
00105     /* Set status as ARM_MATH_ARGUMENT_ERROR */
00106     status = ARM_MATH_ARGUMENT_ERROR;
00107   }
00108   else
00109   {
00110
00111     /* The algorithm implementation is based on the lengths of the inputs. */
00112     /* srcB is always made to slide across srcA. */
00113     /* So srcBLen is always considered as shorter or equal to srcALen */
00114     if(srcALen >= srcBLen)
00115     {
00116       /* Initialization of inputA pointer */
00117       pIn1 = pSrcA;
00118
00119       /* Initialization of inputB pointer */
00120       pIn2 = pSrcB;
00121     }
00122     else
00123     {
00124       /* Initialization of inputA pointer */
00125       pIn1 = pSrcB;
00126
00127       /* Initialization of inputB pointer */
00128       pIn2 = pSrcA;
00129
00130       /* srcBLen is always considered as shorter or equal to srcALen */
00131       j = srcBLen;
00132       srcBLen = srcALen;
00133       srcALen = j;
00134     }
00135
00136     /* Conditions to check which loopCounter holds
00137      * the first and last indices of the output samples to be calculated. */
00138     check = firstIndex + numPoints;
00139     blockSize3 = (int32_t) check - (int32_t) srcALen;
00140     blockSize3 = (blockSize3 > 0) ? blockSize3 : 0;
00141     blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
00142     blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
00143                                      (int32_t) numPoints) : 0;
00144     blockSize2 = ((int32_t) check - blockSize3) -
00145       (blockSize1 + (int32_t) firstIndex);
00146     blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
00147
00148     /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00149     /* The function is internally
00150      * divided into three stages according to the number of multiplications that has to be
00151      * taken place between inputA samples and inputB samples. In the first stage of the
00152      * algorithm, the multiplications increase by one for every iteration.
00153      * In the second stage of the algorithm, srcBLen number of multiplications are done.
00154      * In the third stage of the algorithm, the multiplications decrease by one
00155      * for every iteration. */
00156
00157     /* Set the output pointer to point to the firstIndex
00158      * of the output sample to be calculated. */
00159     pOut = pDst + firstIndex;
00160
00161     /* --------------------------
00162      * Initializations of stage1
00163      * -------------------------*/
00164
00165     /* sum = x[0] * y[0]
00166      * sum = x[0] * y[1] + x[1] * y[0]
00167      * ....
00168      * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00169      */
00170
00171     /* In this stage the MAC operations are increased by 1 for every iteration.
00172        The count variable holds the number of MAC operations performed.
00173        Since the partial convolution starts from from firstIndex
00174        Number of Macs to be performed is firstIndex + 1 */
00175     count = 1u + firstIndex;
00176
00177     /* Working pointer of inputA */
00178     px = pIn1;
00179
00180     /* Working pointer of inputB */
00181     pSrc1 = pIn2 + firstIndex;
00182     py = pSrc1;
00183
00184     /* ------------------------
00185      * Stage1 process
00186      * ----------------------*/
00187
00188     /* The first stage starts here */
00189     while(blockSize1 > 0)
00190     {
00191       /* Accumulator is made zero for every iteration */
00192       sum = 0.0f;
00193
00194       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00195       k = count >> 2u;
00196
00197       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00198        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00199       while(k > 0u)
00200       {
00201         /* x[0] * y[srcBLen - 1] */
00202         sum += *px++ * *py--;
00203
00204         /* x[1] * y[srcBLen - 2] */
00205         sum += *px++ * *py--;
00206
00207         /* x[2] * y[srcBLen - 3] */
00208         sum += *px++ * *py--;
00209
00210         /* x[3] * y[srcBLen - 4] */
00211         sum += *px++ * *py--;
00212
00213         /* Decrement the loop counter */
00214         k--;
00215       }
00216
00217       /* If the count is not a multiple of 4, compute any remaining MACs here.
00218        ** No loop unrolling is used. */
00219       k = count % 0x4u;
00220
00221       while(k > 0u)
00222       {
00223         /* Perform the multiply-accumulates */
00224         sum += *px++ * *py--;
00225
00226         /* Decrement the loop counter */
00227         k--;
00228       }
00229
00230       /* Store the result in the accumulator in the destination buffer. */
00231       *pOut++ = sum;
00232
00233       /* Update the inputA and inputB pointers for next MAC calculation */
00234       py = ++pSrc1;
00235       px = pIn1;
00236
00237       /* Increment the MAC count */
00238       count++;
00239
00240       /* Decrement the loop counter */
00241       blockSize1--;
00242     }
00243
00244     /* --------------------------
00245      * Initializations of stage2
00246      * ------------------------*/
00247
00248     /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00249      * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00250      * ....
00251      * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00252      */
00253
00254     /* Working pointer of inputA */
00255     px = pIn1;
00256
00257     /* Working pointer of inputB */
00258     pSrc2 = pIn2 + (srcBLen - 1u);
00259     py = pSrc2;
00260
00261     /* count is index by which the pointer pIn1 to be incremented */
00262     count = 1u;
00263
00264     /* -------------------
00265      * Stage2 process
00266      * ------------------*/
00267
00268     /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00269      * So, to loop unroll over blockSize2,
00270      * srcBLen should be greater than or equal to 4 */
00271     if(srcBLen >= 4u)
00272     {
00273       /* Loop unroll over blockSize2, by 4 */
00274       blkCnt = ((uint32_t) blockSize2 >> 2u);
00275
00276       while(blkCnt > 0u)
00277       {
00278         /* Set all accumulators to zero */
00279         acc0 = 0.0f;
00280         acc1 = 0.0f;
00281         acc2 = 0.0f;
00282         acc3 = 0.0f;
00283
00284         /* read x[0], x[1], x[2] samples */
00285         x0 = *(px++);
00286         x1 = *(px++);
00287         x2 = *(px++);
00288
00289         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00290         k = srcBLen >> 2u;
00291
00292         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00293          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00294         do
00295         {
00296           /* Read y[srcBLen - 1] sample */
00297           c0 = *(py--);
00298
00299           /* Read x[3] sample */
00300           x3 = *(px++);
00301
00302           /* Perform the multiply-accumulate */
00303           /* acc0 +=  x[0] * y[srcBLen - 1] */
00304           acc0 += x0 * c0;
00305
00306           /* acc1 +=  x[1] * y[srcBLen - 1] */
00307           acc1 += x1 * c0;
00308
00309           /* acc2 +=  x[2] * y[srcBLen - 1] */
00310           acc2 += x2 * c0;
00311
00312           /* acc3 +=  x[3] * y[srcBLen - 1] */
00313           acc3 += x3 * c0;
00314
00315           /* Read y[srcBLen - 2] sample */
00316           c0 = *(py--);
00317
00318           /* Read x[4] sample */
00319           x0 = *(px++);
00320
00321           /* Perform the multiply-accumulate */
00322           /* acc0 +=  x[1] * y[srcBLen - 2] */
00323           acc0 += x1 * c0;
00324           /* acc1 +=  x[2] * y[srcBLen - 2] */
00325           acc1 += x2 * c0;
00326           /* acc2 +=  x[3] * y[srcBLen - 2] */
00327           acc2 += x3 * c0;
00328           /* acc3 +=  x[4] * y[srcBLen - 2] */
00329           acc3 += x0 * c0;
00330
00331           /* Read y[srcBLen - 3] sample */
00332           c0 = *(py--);
00333
00334           /* Read x[5] sample */
00335           x1 = *(px++);
00336
00337           /* Perform the multiply-accumulates */
00338           /* acc0 +=  x[2] * y[srcBLen - 3] */
00339           acc0 += x2 * c0;
00340           /* acc1 +=  x[3] * y[srcBLen - 2] */
00341           acc1 += x3 * c0;
00342           /* acc2 +=  x[4] * y[srcBLen - 2] */
00343           acc2 += x0 * c0;
00344           /* acc3 +=  x[5] * y[srcBLen - 2] */
00345           acc3 += x1 * c0;
00346
00347           /* Read y[srcBLen - 4] sample */
00348           c0 = *(py--);
00349
00350           /* Read x[6] sample */
00351           x2 = *(px++);
00352
00353           /* Perform the multiply-accumulates */
00354           /* acc0 +=  x[3] * y[srcBLen - 4] */
00355           acc0 += x3 * c0;
00356           /* acc1 +=  x[4] * y[srcBLen - 4] */
00357           acc1 += x0 * c0;
00358           /* acc2 +=  x[5] * y[srcBLen - 4] */
00359           acc2 += x1 * c0;
00360           /* acc3 +=  x[6] * y[srcBLen - 4] */
00361           acc3 += x2 * c0;
00362
00363
00364         } while(--k);
00365
00366         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00367          ** No loop unrolling is used. */
00368         k = srcBLen % 0x4u;
00369
00370         while(k > 0u)
00371         {
00372           /* Read y[srcBLen - 5] sample */
00373           c0 = *(py--);
00374
00375           /* Read x[7] sample */
00376           x3 = *(px++);
00377
00378           /* Perform the multiply-accumulates */
00379           /* acc0 +=  x[4] * y[srcBLen - 5] */
00380           acc0 += x0 * c0;
00381           /* acc1 +=  x[5] * y[srcBLen - 5] */
00382           acc1 += x1 * c0;
00383           /* acc2 +=  x[6] * y[srcBLen - 5] */
00384           acc2 += x2 * c0;
00385           /* acc3 +=  x[7] * y[srcBLen - 5] */
00386           acc3 += x3 * c0;
00387
00388           /* Reuse the present samples for the next MAC */
00389           x0 = x1;
00390           x1 = x2;
00391           x2 = x3;
00392
00393           /* Decrement the loop counter */
00394           k--;
00395         }
00396
00397         /* Store the result in the accumulator in the destination buffer. */
00398         *pOut++ = acc0;
00399         *pOut++ = acc1;
00400         *pOut++ = acc2;
00401         *pOut++ = acc3;
00402
00403         /* Update the inputA and inputB pointers for next MAC calculation */
00404         px = pIn1 + (count * 4u);
00405         py = pSrc2;
00406
00407         /* Increment the pointer pIn1 index, count by 1 */
00408         count++;
00409
00410         /* Decrement the loop counter */
00411         blkCnt--;
00412       }
00413
00414       /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00415        ** No loop unrolling is used. */
00416       blkCnt = (uint32_t) blockSize2 % 0x4u;
00417
00418       while(blkCnt > 0u)
00419       {
00420         /* Accumulator is made zero for every iteration */
00421         sum = 0.0f;
00422
00423         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00424         k = srcBLen >> 2u;
00425
00426         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00427          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00428         while(k > 0u)
00429         {
00430           /* Perform the multiply-accumulates */
00431           sum += *px++ * *py--;
00432           sum += *px++ * *py--;
00433           sum += *px++ * *py--;
00434           sum += *px++ * *py--;
00435
00436           /* Decrement the loop counter */
00437           k--;
00438         }
00439
00440         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00441          ** No loop unrolling is used. */
00442         k = srcBLen % 0x4u;
00443
00444         while(k > 0u)
00445         {
00446           /* Perform the multiply-accumulate */
00447           sum += *px++ * *py--;
00448
00449           /* Decrement the loop counter */
00450           k--;
00451         }
00452
00453         /* Store the result in the accumulator in the destination buffer. */
00454         *pOut++ = sum;
00455
00456         /* Update the inputA and inputB pointers for next MAC calculation */
00457         px = pIn1 + count;
00458         py = pSrc2;
00459
00460         /* Increment the MAC count */
00461         count++;
00462
00463         /* Decrement the loop counter */
00464         blkCnt--;
00465       }
00466     }
00467     else
00468     {
00469       /* If the srcBLen is not a multiple of 4,
00470        * the blockSize2 loop cannot be unrolled by 4 */
00471       blkCnt = (uint32_t) blockSize2;
00472
00473       while(blkCnt > 0u)
00474       {
00475         /* Accumulator is made zero for every iteration */
00476         sum = 0.0f;
00477
00478         /* srcBLen number of MACS should be performed */
00479         k = srcBLen;
00480
00481         while(k > 0u)
00482         {
00483           /* Perform the multiply-accumulate */
00484           sum += *px++ * *py--;
00485
00486           /* Decrement the loop counter */
00487           k--;
00488         }
00489
00490         /* Store the result in the accumulator in the destination buffer. */
00491         *pOut++ = sum;
00492
00493         /* Update the inputA and inputB pointers for next MAC calculation */
00494         px = pIn1 + count;
00495         py = pSrc2;
00496
00497         /* Increment the MAC count */
00498         count++;
00499
00500         /* Decrement the loop counter */
00501         blkCnt--;
00502       }
00503     }
00504
00505
00506     /* --------------------------
00507      * Initializations of stage3
00508      * -------------------------*/
00509
00510     /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00511      * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00512      * ....
00513      * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00514      * sum +=  x[srcALen-1] * y[srcBLen-1]
00515      */
00516
00517     /* In this stage the MAC operations are decreased by 1 for every iteration.
00518        The count variable holds the number of MAC operations performed */
00519     count = srcBLen - 1u;
00520
00521     /* Working pointer of inputA */
00522     pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00523     px = pSrc1;
00524
00525     /* Working pointer of inputB */
00526     pSrc2 = pIn2 + (srcBLen - 1u);
00527     py = pSrc2;
00528
00529     while(blockSize3 > 0)
00530     {
00531       /* Accumulator is made zero for every iteration */
00532       sum = 0.0f;
00533
00534       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00535       k = count >> 2u;
00536
00537       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00538        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00539       while(k > 0u)
00540       {
00541         /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
00542         sum += *px++ * *py--;
00543
00544         /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
00545         sum += *px++ * *py--;
00546
00547         /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
00548         sum += *px++ * *py--;
00549
00550         /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
00551         sum += *px++ * *py--;
00552
00553         /* Decrement the loop counter */
00554         k--;
00555       }
00556
00557       /* If the count is not a multiple of 4, compute any remaining MACs here.
00558        ** No loop unrolling is used. */
00559       k = count % 0x4u;
00560
00561       while(k > 0u)
00562       {
00563         /* Perform the multiply-accumulates */
00564         /* sum +=  x[srcALen-1] * y[srcBLen-1] */
00565         sum += *px++ * *py--;
00566
00567         /* Decrement the loop counter */
00568         k--;
00569       }
00570
00571       /* Store the result in the accumulator in the destination buffer. */
00572       *pOut++ = sum;
00573
00574       /* Update the inputA and inputB pointers for next MAC calculation */
00575       px = ++pSrc1;
00576       py = pSrc2;
00577
00578       /* Decrement the MAC count */
00579       count--;
00580
00581       /* Decrement the loop counter */
00582       blockSize3--;
00583
00584     }
00585
00586     /* set status as ARM_MATH_SUCCESS */
00587     status = ARM_MATH_SUCCESS;
00588   }
00589
00590   /* Return to application */
00591   return (status);
00592
00593 #else
00594
00595   /* Run the below code for Cortex-M0 */
00596
00597   float32_t *pIn1 = pSrcA;                       /* inputA pointer */
00598   float32_t *pIn2 = pSrcB;                       /* inputB pointer */
00599   float32_t sum;                                 /* Accumulator */
00600   uint32_t i, j;                                 /* loop counters */
00601   arm_status status;                             /* status of Partial convolution */
00602
00603   /* Check for range of output samples to be calculated */
00604   if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
00605   {
00606     /* Set status as ARM_ARGUMENT_ERROR */
00607     status = ARM_MATH_ARGUMENT_ERROR;
00608   }
00609   else
00610   {
00611     /* Loop to calculate convolution for output length number of values */
00612     for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
00613     {
00614       /* Initialize sum with zero to carry on MAC operations */
00615       sum = 0.0f;
00616
00617       /* Loop to perform MAC operations according to convolution equation */
00618       for (j = 0u; j <= i; j++)
00619       {
00620         /* Check the array limitations for inputs */
00621         if((((i - j) < srcBLen) && (j < srcALen)))
00622         {
00623           /* z[i] += x[i-j] * y[j] */
00624           sum += pIn1[j] * pIn2[i - j];
00625         }
00626       }
00627       /* Store the output in the destination buffer */
00628       pDst[i] = sum;
00629     }
00630     /* set status as ARM_SUCCESS as there are no argument errors */
00631     status = ARM_MATH_SUCCESS;
00632   }
00633   return (status);
00634
00635 #endif /*   #ifndef ARM_MATH_CM0 */
00636
00637 }
00638
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CMSIS DSP Software Library: arm_conv_partial_fast_q15.c File Reference

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arm_conv_partial_fast_q15.c File Reference

#include "arm_math.h"

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Functions

arm_status arm_conv_partial_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints)
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CMSIS DSP Software Library: arm_conv_partial_fast_q15.c Source File

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arm_conv_partial_fast_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_conv_partial_fast_q15.c
00009 *
00010 * Description:  Fast Q15 Partial convolution.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00056 arm_status arm_conv_partial_fast_q15(
00057   q15_t * pSrcA,
00058   uint32_t srcALen,
00059   q15_t * pSrcB,
00060   uint32_t srcBLen,
00061   q15_t * pDst,
00062   uint32_t firstIndex,
00063   uint32_t numPoints)
00064 {
00065   q15_t *pIn1;                                   /* inputA pointer               */
00066   q15_t *pIn2;                                   /* inputB pointer               */
00067   q15_t *pOut = pDst;                            /* output pointer               */
00068   q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator                  */
00069   q15_t *px;                                     /* Intermediate inputA pointer  */
00070   q15_t *py;                                     /* Intermediate inputB pointer  */
00071   q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
00072   q31_t x0, x1, x2, x3, c0;
00073   uint32_t j, k, count, check, blkCnt;
00074   int32_t blockSize1, blockSize2, blockSize3;    /* loop counters                 */
00075   arm_status status;                             /* status of Partial convolution */
00076   q31_t *pb;                                     /* 32 bit pointer for inputB buffer */
00077
00078   /* Check for range of output samples to be calculated */
00079   if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
00080   {
00081     /* Set status as ARM_MATH_ARGUMENT_ERROR */
00082     status = ARM_MATH_ARGUMENT_ERROR;
00083   }
00084   else
00085   {
00086
00087     /* The algorithm implementation is based on the lengths of the inputs. */
00088     /* srcB is always made to slide across srcA. */
00089     /* So srcBLen is always considered as shorter or equal to srcALen */
00090     if(srcALen >= srcBLen)
00091     {
00092       /* Initialization of inputA pointer */
00093       pIn1 = pSrcA;
00094
00095       /* Initialization of inputB pointer */
00096       pIn2 = pSrcB;
00097     }
00098     else
00099     {
00100       /* Initialization of inputA pointer */
00101       pIn1 = pSrcB;
00102
00103       /* Initialization of inputB pointer */
00104       pIn2 = pSrcA;
00105
00106       /* srcBLen is always considered as shorter or equal to srcALen */
00107       j = srcBLen;
00108       srcBLen = srcALen;
00109       srcALen = j;
00110     }
00111
00112     /* Conditions to check which loopCounter holds
00113      * the first and last indices of the output samples to be calculated. */
00114     check = firstIndex + numPoints;
00115     blockSize3 = ((int32_t) check - (int32_t) srcALen);
00116     blockSize3 = (blockSize3 > 0) ? blockSize3 : 0;
00117     blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
00118     blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
00119                                      (int32_t) numPoints) : 0;
00120     blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
00121                                     (int32_t) firstIndex);
00122     blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
00123
00124     /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00125     /* The function is internally
00126      * divided into three stages according to the number of multiplications that has to be
00127      * taken place between inputA samples and inputB samples. In the first stage of the
00128      * algorithm, the multiplications increase by one for every iteration.
00129      * In the second stage of the algorithm, srcBLen number of multiplications are done.
00130      * In the third stage of the algorithm, the multiplications decrease by one
00131      * for every iteration. */
00132
00133     /* Set the output pointer to point to the firstIndex
00134      * of the output sample to be calculated. */
00135     pOut = pDst + firstIndex;
00136
00137     /* --------------------------
00138      * Initializations of stage1
00139      * -------------------------*/
00140
00141     /* sum = x[0] * y[0]
00142      * sum = x[0] * y[1] + x[1] * y[0]
00143      * ....
00144      * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00145      */
00146
00147     /* In this stage the MAC operations are increased by 1 for every iteration.
00148        The count variable holds the number of MAC operations performed.
00149        Since the partial convolution starts from firstIndex
00150        Number of Macs to be performed is firstIndex + 1 */
00151     count = 1u + firstIndex;
00152
00153     /* Working pointer of inputA */
00154     px = pIn1;
00155
00156     /* Working pointer of inputB */
00157     pSrc2 = pIn2 + firstIndex;
00158     py = pSrc2;
00159
00160     /* ------------------------
00161      * Stage1 process
00162      * ----------------------*/
00163
00164     /* For loop unrolling by 4, this stage is divided into two. */
00165     /* First part of this stage computes the MAC operations less than 4 */
00166     /* Second part of this stage computes the MAC operations greater than or equal to 4 */
00167
00168     /* The first part of the stage starts here */
00169     while((count < 4u) && (blockSize1 > 0))
00170     {
00171       /* Accumulator is made zero for every iteration */
00172       sum = 0;
00173
00174       /* Loop over number of MAC operations between
00175        * inputA samples and inputB samples */
00176       k = count;
00177
00178       while(k > 0u)
00179       {
00180         /* Perform the multiply-accumulates */
00181         sum = __SMLAD(*px++, *py--, sum);
00182
00183         /* Decrement the loop counter */
00184         k--;
00185       }
00186
00187       /* Store the result in the accumulator in the destination buffer. */
00188       *pOut++ = (q15_t) (sum >> 15);
00189
00190       /* Update the inputA and inputB pointers for next MAC calculation */
00191       py = ++pSrc2;
00192       px = pIn1;
00193
00194       /* Increment the MAC count */
00195       count++;
00196
00197       /* Decrement the loop counter */
00198       blockSize1--;
00199     }
00200
00201     /* The second part of the stage starts here */
00202     /* The internal loop, over count, is unrolled by 4 */
00203     /* To, read the last two inputB samples using SIMD:
00204      * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
00205     py = py - 1;
00206
00207     while(blockSize1 > 0)
00208     {
00209       /* Accumulator is made zero for every iteration */
00210       sum = 0;
00211
00212       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00213       k = count >> 2u;
00214
00215       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00216        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00217       while(k > 0u)
00218       {
00219         /* Perform the multiply-accumulates */
00220         /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
00221         sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00222         /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
00223         sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00224
00225         /* Decrement the loop counter */
00226         k--;
00227       }
00228
00229       /* For the next MAC operations, the pointer py is used without SIMD
00230        * So, py is incremented by 1 */
00231       py = py + 1u;
00232
00233       /* If the count is not a multiple of 4, compute any remaining MACs here.
00234        ** No loop unrolling is used. */
00235       k = count % 0x4u;
00236
00237       while(k > 0u)
00238       {
00239         /* Perform the multiply-accumulates */
00240         sum = __SMLAD(*px++, *py--, sum);
00241
00242         /* Decrement the loop counter */
00243         k--;
00244       }
00245
00246       /* Store the result in the accumulator in the destination buffer. */
00247       *pOut++ = (q15_t) (sum >> 15);
00248
00249       /* Update the inputA and inputB pointers for next MAC calculation */
00250       py = ++pSrc2 - 1u;
00251       px = pIn1;
00252
00253       /* Increment the MAC count */
00254       count++;
00255
00256       /* Decrement the loop counter */
00257       blockSize1--;
00258     }
00259
00260     /* --------------------------
00261      * Initializations of stage2
00262      * ------------------------*/
00263
00264     /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00265      * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00266      * ....
00267      * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00268      */
00269
00270     /* Working pointer of inputA */
00271     px = pIn1;
00272
00273     /* Working pointer of inputB */
00274     pSrc2 = pIn2 + (srcBLen - 1u);
00275     py = pSrc2;
00276
00277     /* Initialize inputB pointer of type q31 */
00278     pb = (q31_t *) (py - 1u);
00279
00280     /* count is the index by which the pointer pIn1 to be incremented */
00281     count = 1u;
00282
00283
00284     /* --------------------
00285      * Stage2 process
00286      * -------------------*/
00287
00288     /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00289      * So, to loop unroll over blockSize2,
00290      * srcBLen should be greater than or equal to 4 */
00291     if(srcBLen >= 4u)
00292     {
00293       /* Loop unroll over blockSize2, by 4 */
00294       blkCnt = ((uint32_t) blockSize2 >> 2u);
00295
00296       while(blkCnt > 0u)
00297       {
00298         /* Set all accumulators to zero */
00299         acc0 = 0;
00300         acc1 = 0;
00301         acc2 = 0;
00302         acc3 = 0;
00303
00304
00305         /* read x[0], x[1] samples */
00306         x0 = *(q31_t *) (px++);
00307         /* read x[1], x[2] samples */
00308         x1 = *(q31_t *) (px++);
00309
00310
00311         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00312         k = srcBLen >> 2u;
00313
00314         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00315          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00316         do
00317         {
00318           /* Read the last two inputB samples using SIMD:
00319            * y[srcBLen - 1] and y[srcBLen - 2] */
00320           c0 = *(pb--);
00321
00322           /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
00323           acc0 = __SMLADX(x0, c0, acc0);
00324
00325           /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
00326           acc1 = __SMLADX(x1, c0, acc1);
00327
00328           /* Read x[2], x[3] */
00329           x2 = *(q31_t *) (px++);
00330
00331           /* Read x[3], x[4] */
00332           x3 = *(q31_t *) (px++);
00333
00334           /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
00335           acc2 = __SMLADX(x2, c0, acc2);
00336
00337           /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
00338           acc3 = __SMLADX(x3, c0, acc3);
00339
00340           /* Read y[srcBLen - 3] and y[srcBLen - 4] */
00341           c0 = *(pb--);
00342
00343           /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
00344           acc0 = __SMLADX(x2, c0, acc0);
00345
00346           /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
00347           acc1 = __SMLADX(x3, c0, acc1);
00348
00349           /* Read x[4], x[5] */
00350           x0 = *(q31_t *) (px++);
00351
00352           /* Read x[5], x[6] */
00353           x1 = *(q31_t *) (px++);
00354
00355           /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
00356           acc2 = __SMLADX(x0, c0, acc2);
00357
00358           /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
00359           acc3 = __SMLADX(x1, c0, acc3);
00360
00361         } while(--k);
00362
00363         /* For the next MAC operations, SIMD is not used
00364          * So, the 16 bit pointer if inputB, py is updated */
00365         py = (q15_t *) pb;
00366         py = py + 1;
00367
00368         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00369          ** No loop unrolling is used. */
00370         k = srcBLen % 0x4u;
00371
00372         if(k == 1u)
00373         {
00374           /* Read y[srcBLen - 5] */
00375           c0 = *(py);
00376 #ifdef  ARM_MATH_BIG_ENDIAN
00377
00378           c0 = c0 << 16;
00379
00380 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00381
00382           /* Read x[7] */
00383           x3 = *(q31_t *) px++;
00384
00385           /* Perform the multiply-accumulates */
00386           acc0 = __SMLAD(x0, c0, acc0);
00387           acc1 = __SMLAD(x1, c0, acc1);
00388           acc2 = __SMLADX(x1, c0, acc2);
00389           acc3 = __SMLADX(x3, c0, acc3);
00390         }
00391
00392         if(k == 2u)
00393         {
00394           /* Read y[srcBLen - 5], y[srcBLen - 6] */
00395           c0 = *(pb);
00396
00397           /* Read x[7], x[8] */
00398           x3 = *(q31_t *) px++;
00399
00400           /* Read x[9] */
00401           x2 = *(q31_t *) px++;
00402
00403           /* Perform the multiply-accumulates */
00404           acc0 = __SMLADX(x0, c0, acc0);
00405           acc1 = __SMLADX(x1, c0, acc1);
00406           acc2 = __SMLADX(x3, c0, acc2);
00407           acc3 = __SMLADX(x2, c0, acc3);
00408         }
00409
00410         if(k == 3u)
00411         {
00412           /* Read y[srcBLen - 5], y[srcBLen - 6] */
00413           c0 = *pb--;
00414
00415           /* Read x[7], x[8] */
00416           x3 = *(q31_t *) px++;
00417
00418           /* Read x[9] */
00419           x2 = *(q31_t *) px++;
00420
00421           /* Perform the multiply-accumulates */
00422           acc0 = __SMLADX(x0, c0, acc0);
00423           acc1 = __SMLADX(x1, c0, acc1);
00424           acc2 = __SMLADX(x3, c0, acc2);
00425           acc3 = __SMLADX(x2, c0, acc3);
00426
00427           /* Read y[srcBLen - 7] */
00428 #ifdef  ARM_MATH_BIG_ENDIAN
00429
00430           c0 = (*pb);
00431           c0 = (c0) << 16;
00432
00433 #else
00434
00435           c0 = (q15_t) (*pb >> 16);
00436
00437 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00438
00439           /* Read x[10] */
00440           x3 = *(q31_t *) px++;
00441
00442           /* Perform the multiply-accumulates */
00443           acc0 = __SMLADX(x1, c0, acc0);
00444           acc1 = __SMLAD(x2, c0, acc1);
00445           acc2 = __SMLADX(x2, c0, acc2);
00446           acc3 = __SMLADX(x3, c0, acc3);
00447         }
00448
00449         /* Store the results in the accumulators in the destination buffer. */
00450 #ifndef ARM_MATH_BIG_ENDIAN
00451
00452         *__SIMD32(pOut)++ = __PKHBT(acc0 >> 15, acc1 >> 15, 16);
00453         *__SIMD32(pOut)++ = __PKHBT(acc2 >> 15, acc3 >> 15, 16);
00454
00455 #else
00456
00457         *__SIMD32(pOut)++ = __PKHBT(acc1 >> 15, acc0 >> 15, 16);
00458         *__SIMD32(pOut)++ = __PKHBT(acc3 >> 15, acc2 >> 15, 16);
00459
00460 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00461
00462         /* Update the inputA and inputB pointers for next MAC calculation */
00463         px = pIn1 + (count * 4u);
00464         py = pSrc2;
00465         pb = (q31_t *) (py - 1);
00466
00467         /* Increment the pointer pIn1 index, count by 1 */
00468         count++;
00469
00470         /* Decrement the loop counter */
00471         blkCnt--;
00472       }
00473
00474       /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00475        ** No loop unrolling is used. */
00476       blkCnt = (uint32_t) blockSize2 % 0x4u;
00477
00478       while(blkCnt > 0u)
00479       {
00480         /* Accumulator is made zero for every iteration */
00481         sum = 0;
00482
00483         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00484         k = srcBLen >> 2u;
00485
00486         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00487          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00488         while(k > 0u)
00489         {
00490           /* Perform the multiply-accumulates */
00491           sum += ((q31_t) * px++ * *py--);
00492           sum += ((q31_t) * px++ * *py--);
00493           sum += ((q31_t) * px++ * *py--);
00494           sum += ((q31_t) * px++ * *py--);
00495
00496           /* Decrement the loop counter */
00497           k--;
00498         }
00499
00500         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00501          ** No loop unrolling is used. */
00502         k = srcBLen % 0x4u;
00503
00504         while(k > 0u)
00505         {
00506           /* Perform the multiply-accumulates */
00507           sum += ((q31_t) * px++ * *py--);
00508
00509           /* Decrement the loop counter */
00510           k--;
00511         }
00512
00513         /* Store the result in the accumulator in the destination buffer. */
00514         *pOut++ = (q15_t) (sum >> 15);
00515
00516         /* Update the inputA and inputB pointers for next MAC calculation */
00517         px = pIn1 + count;
00518         py = pSrc2;
00519
00520         /* Increment the pointer pIn1 index, count by 1 */
00521         count++;
00522
00523         /* Decrement the loop counter */
00524         blkCnt--;
00525       }
00526     }
00527     else
00528     {
00529       /* If the srcBLen is not a multiple of 4,
00530        * the blockSize2 loop cannot be unrolled by 4 */
00531       blkCnt = (uint32_t) blockSize2;
00532
00533       while(blkCnt > 0u)
00534       {
00535         /* Accumulator is made zero for every iteration */
00536         sum = 0;
00537
00538         /* srcBLen number of MACS should be performed */
00539         k = srcBLen;
00540
00541         while(k > 0u)
00542         {
00543           /* Perform the multiply-accumulate */
00544           sum += ((q31_t) * px++ * *py--);
00545
00546           /* Decrement the loop counter */
00547           k--;
00548         }
00549
00550         /* Store the result in the accumulator in the destination buffer. */
00551         *pOut++ = (q15_t) (sum >> 15);
00552
00553         /* Update the inputA and inputB pointers for next MAC calculation */
00554         px = pIn1 + count;
00555         py = pSrc2;
00556
00557         /* Increment the MAC count */
00558         count++;
00559
00560         /* Decrement the loop counter */
00561         blkCnt--;
00562       }
00563     }
00564
00565
00566     /* --------------------------
00567      * Initializations of stage3
00568      * -------------------------*/
00569
00570     /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00571      * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00572      * ....
00573      * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00574      * sum +=  x[srcALen-1] * y[srcBLen-1]
00575      */
00576
00577     /* In this stage the MAC operations are decreased by 1 for every iteration.
00578        The count variable holds the number of MAC operations performed */
00579     count = srcBLen - 1u;
00580
00581     /* Working pointer of inputA */
00582     pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00583     px = pSrc1;
00584
00585     /* Working pointer of inputB */
00586     pSrc2 = pIn2 + (srcBLen - 1u);
00587     pIn2 = pSrc2 - 1u;
00588     py = pIn2;
00589
00590     /* -------------------
00591      * Stage3 process
00592      * ------------------*/
00593
00594     /* For loop unrolling by 4, this stage is divided into two. */
00595     /* First part of this stage computes the MAC operations greater than 4 */
00596     /* Second part of this stage computes the MAC operations less than or equal to 4 */
00597
00598     /* The first part of the stage starts here */
00599     j = count >> 2u;
00600
00601     while((j > 0u) && (blockSize3 > 0))
00602     {
00603       /* Accumulator is made zero for every iteration */
00604       sum = 0;
00605
00606       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00607       k = count >> 2u;
00608
00609       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00610        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00611       while(k > 0u)
00612       {
00613         /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
00614          * with y[srcBLen - 1], y[srcBLen - 2] respectively */
00615         sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00616         /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
00617          * with y[srcBLen - 3], y[srcBLen - 4] respectively */
00618         sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00619
00620         /* Decrement the loop counter */
00621         k--;
00622       }
00623
00624       /* For the next MAC operations, the pointer py is used without SIMD
00625        * So, py is incremented by 1 */
00626       py = py + 1u;
00627
00628       /* If the count is not a multiple of 4, compute any remaining MACs here.
00629        ** No loop unrolling is used. */
00630       k = count % 0x4u;
00631
00632       while(k > 0u)
00633       {
00634         /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
00635         sum = __SMLAD(*px++, *py--, sum);
00636
00637         /* Decrement the loop counter */
00638         k--;
00639       }
00640
00641       /* Store the result in the accumulator in the destination buffer. */
00642       *pOut++ = (q15_t) (sum >> 15);
00643
00644       /* Update the inputA and inputB pointers for next MAC calculation */
00645       px = ++pSrc1;
00646       py = pIn2;
00647
00648       /* Decrement the MAC count */
00649       count--;
00650
00651       /* Decrement the loop counter */
00652       blockSize3--;
00653
00654       j--;
00655     }
00656
00657     /* The second part of the stage starts here */
00658     /* SIMD is not used for the next MAC operations,
00659      * so pointer py is updated to read only one sample at a time */
00660     py = py + 1u;
00661
00662     while(blockSize3 > 0)
00663     {
00664       /* Accumulator is made zero for every iteration */
00665       sum = 0;
00666
00667       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00668       k = count;
00669
00670       while(k > 0u)
00671       {
00672         /* Perform the multiply-accumulates */
00673         /* sum +=  x[srcALen-1] * y[srcBLen-1] */
00674         sum = __SMLAD(*px++, *py--, sum);
00675
00676         /* Decrement the loop counter */
00677         k--;
00678       }
00679
00680       /* Store the result in the accumulator in the destination buffer. */
00681       *pOut++ = (q15_t) (sum >> 15);
00682
00683       /* Update the inputA and inputB pointers for next MAC calculation */
00684       px = ++pSrc1;
00685       py = pSrc2;
00686
00687       /* Decrement the MAC count */
00688       count--;
00689
00690       /* Decrement the loop counter */
00691       blockSize3--;
00692     }
00693
00694     /* set status as ARM_MATH_SUCCESS */
00695     status = ARM_MATH_SUCCESS;
00696   }
00697
00698   /* Return to application */
00699   return (status);
00700
00701 }
00702
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CMSIS DSP Software Library: arm_conv_partial_fast_q31.c File Reference

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arm_conv_partial_fast_q31.c File Reference

#include "arm_math.h"

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Functions

arm_status arm_conv_partial_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst, uint32_t firstIndex, uint32_t numPoints)
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CMSIS DSP Software Library: arm_conv_partial_fast_q31.c Source File

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arm_conv_partial_fast_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_conv_partial_fast_q31.c
00009 *
00010 * Description:  Fast Q31 Partial convolution.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00056 arm_status arm_conv_partial_fast_q31(
00057   q31_t * pSrcA,
00058   uint32_t srcALen,
00059   q31_t * pSrcB,
00060   uint32_t srcBLen,
00061   q31_t * pDst,
00062   uint32_t firstIndex,
00063   uint32_t numPoints)
00064 {
00065   q31_t *pIn1;                                   /* inputA pointer               */
00066   q31_t *pIn2;                                   /* inputB pointer               */
00067   q31_t *pOut = pDst;                            /* output pointer               */
00068   q31_t *px;                                     /* Intermediate inputA pointer  */
00069   q31_t *py;                                     /* Intermediate inputB pointer  */
00070   q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
00071   q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
00072   q31_t x0, x1, x2, x3, c0;
00073   uint32_t j, k, count, check, blkCnt;
00074   int32_t blockSize1, blockSize2, blockSize3;    /* loop counters                 */
00075   arm_status status;                             /* status of Partial convolution */
00076
00077
00078   /* Check for range of output samples to be calculated */
00079   if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
00080   {
00081     /* Set status as ARM_MATH_ARGUMENT_ERROR */
00082     status = ARM_MATH_ARGUMENT_ERROR;
00083   }
00084   else
00085   {
00086
00087     /* The algorithm implementation is based on the lengths of the inputs. */
00088     /* srcB is always made to slide across srcA. */
00089     /* So srcBLen is always considered as shorter or equal to srcALen */
00090     if(srcALen >= srcBLen)
00091     {
00092       /* Initialization of inputA pointer */
00093       pIn1 = pSrcA;
00094
00095       /* Initialization of inputB pointer */
00096       pIn2 = pSrcB;
00097     }
00098     else
00099     {
00100       /* Initialization of inputA pointer */
00101       pIn1 = pSrcB;
00102
00103       /* Initialization of inputB pointer */
00104       pIn2 = pSrcA;
00105
00106       /* srcBLen is always considered as shorter or equal to srcALen */
00107       j = srcBLen;
00108       srcBLen = srcALen;
00109       srcALen = j;
00110     }
00111
00112     /* Conditions to check which loopCounter holds
00113      * the first and last indices of the output samples to be calculated. */
00114     check = firstIndex + numPoints;
00115     blockSize3 = ((int32_t) check - (int32_t) srcALen);
00116     blockSize3 = (blockSize3 > 0) ? blockSize3 : 0;
00117     blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
00118     blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
00119                                      (int32_t) numPoints) : 0;
00120     blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
00121                                     (int32_t) firstIndex);
00122     blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
00123
00124     /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00125     /* The function is internally
00126      * divided into three stages according to the number of multiplications that has to be
00127      * taken place between inputA samples and inputB samples. In the first stage of the
00128      * algorithm, the multiplications increase by one for every iteration.
00129      * In the second stage of the algorithm, srcBLen number of multiplications are done.
00130      * In the third stage of the algorithm, the multiplications decrease by one
00131      * for every iteration. */
00132
00133     /* Set the output pointer to point to the firstIndex
00134      * of the output sample to be calculated. */
00135     pOut = pDst + firstIndex;
00136
00137     /* --------------------------
00138      * Initializations of stage1
00139      * -------------------------*/
00140
00141     /* sum = x[0] * y[0]
00142      * sum = x[0] * y[1] + x[1] * y[0]
00143      * ....
00144      * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00145      */
00146
00147     /* In this stage the MAC operations are increased by 1 for every iteration.
00148        The count variable holds the number of MAC operations performed.
00149        Since the partial convolution starts from firstIndex
00150        Number of Macs to be performed is firstIndex + 1 */
00151     count = 1u + firstIndex;
00152
00153     /* Working pointer of inputA */
00154     px = pIn1;
00155
00156     /* Working pointer of inputB */
00157     pSrc2 = pIn2 + firstIndex;
00158     py = pSrc2;
00159
00160     /* ------------------------
00161      * Stage1 process
00162      * ----------------------*/
00163
00164     /* The first loop starts here */
00165     while(blockSize1 > 0)
00166     {
00167       /* Accumulator is made zero for every iteration */
00168       sum = 0;
00169
00170       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00171       k = count >> 2u;
00172
00173       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00174        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00175       while(k > 0u)
00176       {
00177         /* x[0] * y[srcBLen - 1] */
00178         sum = (q31_t) ((((q63_t) sum << 32) +
00179                         ((q63_t) * px++ * (*py--))) >> 32);
00180
00181         /* x[1] * y[srcBLen - 2] */
00182         sum = (q31_t) ((((q63_t) sum << 32) +
00183                         ((q63_t) * px++ * (*py--))) >> 32);
00184
00185         /* x[2] * y[srcBLen - 3] */
00186         sum = (q31_t) ((((q63_t) sum << 32) +
00187                         ((q63_t) * px++ * (*py--))) >> 32);
00188
00189         /* x[3] * y[srcBLen - 4] */
00190         sum = (q31_t) ((((q63_t) sum << 32) +
00191                         ((q63_t) * px++ * (*py--))) >> 32);
00192
00193         /* Decrement the loop counter */
00194         k--;
00195       }
00196
00197       /* If the count is not a multiple of 4, compute any remaining MACs here.
00198        ** No loop unrolling is used. */
00199       k = count % 0x4u;
00200
00201       while(k > 0u)
00202       {
00203         /* Perform the multiply-accumulates */
00204         sum = (q31_t) ((((q63_t) sum << 32) +
00205                         ((q63_t) * px++ * (*py--))) >> 32);
00206
00207         /* Decrement the loop counter */
00208         k--;
00209       }
00210
00211       /* Store the result in the accumulator in the destination buffer. */
00212       *pOut++ = sum << 1;
00213
00214       /* Update the inputA and inputB pointers for next MAC calculation */
00215       py = ++pSrc2;
00216       px = pIn1;
00217
00218       /* Increment the MAC count */
00219       count++;
00220
00221       /* Decrement the loop counter */
00222       blockSize1--;
00223     }
00224
00225     /* --------------------------
00226      * Initializations of stage2
00227      * ------------------------*/
00228
00229     /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00230      * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00231      * ....
00232      * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00233      */
00234
00235     /* Working pointer of inputA */
00236     px = pIn1;
00237
00238     /* Working pointer of inputB */
00239     pSrc2 = pIn2 + (srcBLen - 1u);
00240     py = pSrc2;
00241
00242     /* count is index by which the pointer pIn1 to be incremented */
00243     count = 1u;
00244
00245     /* -------------------
00246      * Stage2 process
00247      * ------------------*/
00248
00249     /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00250      * So, to loop unroll over blockSize2,
00251      * srcBLen should be greater than or equal to 4 */
00252     if(srcBLen >= 4u)
00253     {
00254       /* Loop unroll over blockSize2 */
00255       blkCnt = ((uint32_t) blockSize2 >> 2u);
00256
00257       while(blkCnt > 0u)
00258       {
00259         /* Set all accumulators to zero */
00260         acc0 = 0;
00261         acc1 = 0;
00262         acc2 = 0;
00263         acc3 = 0;
00264
00265         /* read x[0], x[1], x[2] samples */
00266         x0 = *(px++);
00267         x1 = *(px++);
00268         x2 = *(px++);
00269
00270         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00271         k = srcBLen >> 2u;
00272
00273         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00274          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00275         do
00276         {
00277           /* Read y[srcBLen - 1] sample */
00278           c0 = *(py--);
00279
00280           /* Read x[3] sample */
00281           x3 = *(px++);
00282
00283           /* Perform the multiply-accumulate */
00284           /* acc0 +=  x[0] * y[srcBLen - 1] */
00285           acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
00286
00287           /* acc1 +=  x[1] * y[srcBLen - 1] */
00288           acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
00289
00290           /* acc2 +=  x[2] * y[srcBLen - 1] */
00291           acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
00292
00293           /* acc3 +=  x[3] * y[srcBLen - 1] */
00294           acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
00295
00296           /* Read y[srcBLen - 2] sample */
00297           c0 = *(py--);
00298
00299           /* Read x[4] sample */
00300           x0 = *(px++);
00301
00302           /* Perform the multiply-accumulate */
00303           /* acc0 +=  x[1] * y[srcBLen - 2] */
00304           acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
00305           /* acc1 +=  x[2] * y[srcBLen - 2] */
00306           acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32);
00307           /* acc2 +=  x[3] * y[srcBLen - 2] */
00308           acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32);
00309           /* acc3 +=  x[4] * y[srcBLen - 2] */
00310           acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
00311
00312           /* Read y[srcBLen - 3] sample */
00313           c0 = *(py--);
00314
00315           /* Read x[5] sample */
00316           x1 = *(px++);
00317
00318           /* Perform the multiply-accumulates */
00319           /* acc0 +=  x[2] * y[srcBLen - 3] */
00320           acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32);
00321           /* acc1 +=  x[3] * y[srcBLen - 2] */
00322           acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32);
00323           /* acc2 +=  x[4] * y[srcBLen - 2] */
00324           acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32);
00325           /* acc3 +=  x[5] * y[srcBLen - 2] */
00326           acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
00327
00328           /* Read y[srcBLen - 4] sample */
00329           c0 = *(py--);
00330
00331           /* Read x[6] sample */
00332           x2 = *(px++);
00333
00334           /* Perform the multiply-accumulates */
00335           /* acc0 +=  x[3] * y[srcBLen - 4] */
00336           acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32);
00337           /* acc1 +=  x[4] * y[srcBLen - 4] */
00338           acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32);
00339           /* acc2 +=  x[5] * y[srcBLen - 4] */
00340           acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32);
00341           /* acc3 +=  x[6] * y[srcBLen - 4] */
00342           acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
00343
00344
00345         } while(--k);
00346
00347         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00348          ** No loop unrolling is used. */
00349         k = srcBLen % 0x4u;
00350
00351         while(k > 0u)
00352         {
00353           /* Read y[srcBLen - 5] sample */
00354           c0 = *(py--);
00355
00356           /* Read x[7] sample */
00357           x3 = *(px++);
00358
00359           /* Perform the multiply-accumulates */
00360           /* acc0 +=  x[4] * y[srcBLen - 5] */
00361           acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
00362           /* acc1 +=  x[5] * y[srcBLen - 5] */
00363           acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
00364           /* acc2 +=  x[6] * y[srcBLen - 5] */
00365           acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
00366           /* acc3 +=  x[7] * y[srcBLen - 5] */
00367           acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
00368
00369           /* Reuse the present samples for the next MAC */
00370           x0 = x1;
00371           x1 = x2;
00372           x2 = x3;
00373
00374           /* Decrement the loop counter */
00375           k--;
00376         }
00377
00378         /* Store the result in the accumulator in the destination buffer. */
00379         *pOut++ = (q31_t) (acc0 << 1);
00380         *pOut++ = (q31_t) (acc1 << 1);
00381         *pOut++ = (q31_t) (acc2 << 1);
00382         *pOut++ = (q31_t) (acc3 << 1);
00383
00384         /* Update the inputA and inputB pointers for next MAC calculation */
00385         px = pIn1 + (count * 4u);
00386         py = pSrc2;
00387
00388         /* Increment the pointer pIn1 index, count by 1 */
00389         count++;
00390
00391         /* Decrement the loop counter */
00392         blkCnt--;
00393       }
00394
00395       /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00396        ** No loop unrolling is used. */
00397       blkCnt = (uint32_t) blockSize2 % 0x4u;
00398
00399       while(blkCnt > 0u)
00400       {
00401         /* Accumulator is made zero for every iteration */
00402         sum = 0;
00403
00404         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00405         k = srcBLen >> 2u;
00406
00407         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00408          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00409         while(k > 0u)
00410         {
00411           /* Perform the multiply-accumulates */
00412           sum = (q31_t) ((((q63_t) sum << 32) +
00413                           ((q63_t) * px++ * (*py--))) >> 32);
00414           sum = (q31_t) ((((q63_t) sum << 32) +
00415                           ((q63_t) * px++ * (*py--))) >> 32);
00416           sum = (q31_t) ((((q63_t) sum << 32) +
00417                           ((q63_t) * px++ * (*py--))) >> 32);
00418           sum = (q31_t) ((((q63_t) sum << 32) +
00419                           ((q63_t) * px++ * (*py--))) >> 32);
00420
00421           /* Decrement the loop counter */
00422           k--;
00423         }
00424
00425         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00426          ** No loop unrolling is used. */
00427         k = srcBLen % 0x4u;
00428
00429         while(k > 0u)
00430         {
00431           /* Perform the multiply-accumulate */
00432           sum = (q31_t) ((((q63_t) sum << 32) +
00433                           ((q63_t) * px++ * (*py--))) >> 32);
00434
00435           /* Decrement the loop counter */
00436           k--;
00437         }
00438
00439         /* Store the result in the accumulator in the destination buffer. */
00440         *pOut++ = sum << 1;
00441
00442         /* Update the inputA and inputB pointers for next MAC calculation */
00443         px = pIn1 + count;
00444         py = pSrc2;
00445
00446         /* Increment the MAC count */
00447         count++;
00448
00449         /* Decrement the loop counter */
00450         blkCnt--;
00451       }
00452     }
00453     else
00454     {
00455       /* If the srcBLen is not a multiple of 4,
00456        * the blockSize2 loop cannot be unrolled by 4 */
00457       blkCnt = (uint32_t) blockSize2;
00458
00459       while(blkCnt > 0u)
00460       {
00461         /* Accumulator is made zero for every iteration */
00462         sum = 0;
00463
00464         /* srcBLen number of MACS should be performed */
00465         k = srcBLen;
00466
00467         while(k > 0u)
00468         {
00469           /* Perform the multiply-accumulate */
00470           sum = (q31_t) ((((q63_t) sum << 32) +
00471                           ((q63_t) * px++ * (*py--))) >> 32);
00472
00473           /* Decrement the loop counter */
00474           k--;
00475         }
00476
00477         /* Store the result in the accumulator in the destination buffer. */
00478         *pOut++ = sum << 1;
00479
00480         /* Update the inputA and inputB pointers for next MAC calculation */
00481         px = pIn1 + count;
00482         py = pSrc2;
00483
00484         /* Increment the MAC count */
00485         count++;
00486
00487         /* Decrement the loop counter */
00488         blkCnt--;
00489       }
00490     }
00491
00492
00493     /* --------------------------
00494      * Initializations of stage3
00495      * -------------------------*/
00496
00497     /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00498      * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00499      * ....
00500      * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00501      * sum +=  x[srcALen-1] * y[srcBLen-1]
00502      */
00503
00504     /* In this stage the MAC operations are decreased by 1 for every iteration.
00505        The count variable holds the number of MAC operations performed */
00506     count = srcBLen - 1u;
00507
00508     /* Working pointer of inputA */
00509     pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00510     px = pSrc1;
00511
00512     /* Working pointer of inputB */
00513     pSrc2 = pIn2 + (srcBLen - 1u);
00514     py = pSrc2;
00515
00516     /* -------------------
00517      * Stage3 process
00518      * ------------------*/
00519
00520     while(blockSize3 > 0)
00521     {
00522       /* Accumulator is made zero for every iteration */
00523       sum = 0;
00524
00525       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00526       k = count >> 2u;
00527
00528       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00529        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00530       while(k > 0u)
00531       {
00532         /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
00533         sum = (q31_t) ((((q63_t) sum << 32) +
00534                         ((q63_t) * px++ * (*py--))) >> 32);
00535
00536         /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
00537         sum = (q31_t) ((((q63_t) sum << 32) +
00538                         ((q63_t) * px++ * (*py--))) >> 32);
00539
00540         /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
00541         sum = (q31_t) ((((q63_t) sum << 32) +
00542                         ((q63_t) * px++ * (*py--))) >> 32);
00543
00544         /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
00545         sum = (q31_t) ((((q63_t) sum << 32) +
00546                         ((q63_t) * px++ * (*py--))) >> 32);
00547
00548         /* Decrement the loop counter */
00549         k--;
00550       }
00551
00552       /* If the count is not a multiple of 4, compute any remaining MACs here.
00553        ** No loop unrolling is used. */
00554       k = count % 0x4u;
00555
00556       while(k > 0u)
00557       {
00558         /* Perform the multiply-accumulates */
00559         /* sum +=  x[srcALen-1] * y[srcBLen-1] */
00560         sum = (q31_t) ((((q63_t) sum << 32) +
00561                         ((q63_t) * px++ * (*py--))) >> 32);
00562
00563         /* Decrement the loop counter */
00564         k--;
00565       }
00566
00567       /* Store the result in the accumulator in the destination buffer. */
00568       *pOut++ = sum << 1;
00569
00570       /* Update the inputA and inputB pointers for next MAC calculation */
00571       px = ++pSrc1;
00572       py = pSrc2;
00573
00574       /* Decrement the MAC count */
00575       count--;
00576
00577       /* Decrement the loop counter */
00578       blockSize3--;
00579
00580     }
00581
00582     /* set status as ARM_MATH_SUCCESS */
00583     status = ARM_MATH_SUCCESS;
00584   }
00585
00586   /* Return to application */
00587   return (status);
00588
00589 }
00590
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CMSIS DSP Software Library: arm_conv_partial_q7.c File Reference

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arm_conv_partial_q7.c File Reference

#include "arm_math.h"

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Functions

arm_status arm_conv_partial_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, uint32_t firstIndex, uint32_t numPoints)
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CMSIS DSP Software Library: arm_conv_partial_q7.c Source File

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arm_conv_partial_q7.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_conv_partial_q7.c
00009 *
00010 * Description:  Partial convolution of Q7 sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00058 arm_status arm_conv_partial_q7(
00059   q7_t * pSrcA,
00060   uint32_t srcALen,
00061   q7_t * pSrcB,
00062   uint32_t srcBLen,
00063   q7_t * pDst,
00064   uint32_t firstIndex,
00065   uint32_t numPoints)
00066 {
00067
00068
00069 #ifndef ARM_MATH_CM0
00070
00071   /* Run the below code for Cortex-M4 and Cortex-M3 */
00072
00073   q7_t *pIn1;                                    /* inputA pointer */
00074   q7_t *pIn2;                                    /* inputB pointer */
00075   q7_t *pOut = pDst;                             /* output pointer */
00076   q7_t *px;                                      /* Intermediate inputA pointer */
00077   q7_t *py;                                      /* Intermediate inputB pointer */
00078   q7_t *pSrc1, *pSrc2;                           /* Intermediate pointers */
00079   q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
00080   q31_t input1, input2;
00081   q15_t in1, in2;
00082   q7_t x0, x1, x2, x3, c0, c1;
00083   uint32_t j, k, count, check, blkCnt;
00084   int32_t blockSize1, blockSize2, blockSize3;    /* loop counter */
00085   arm_status status;
00086
00087
00088   /* Check for range of output samples to be calculated */
00089   if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
00090   {
00091     /* Set status as ARM_MATH_ARGUMENT_ERROR */
00092     status = ARM_MATH_ARGUMENT_ERROR;
00093   }
00094   else
00095   {
00096
00097     /* The algorithm implementation is based on the lengths of the inputs. */
00098     /* srcB is always made to slide across srcA. */
00099     /* So srcBLen is always considered as shorter or equal to srcALen */
00100     if(srcALen >= srcBLen)
00101     {
00102       /* Initialization of inputA pointer */
00103       pIn1 = pSrcA;
00104
00105       /* Initialization of inputB pointer */
00106       pIn2 = pSrcB;
00107     }
00108     else
00109     {
00110       /* Initialization of inputA pointer */
00111       pIn1 = pSrcB;
00112
00113       /* Initialization of inputB pointer */
00114       pIn2 = pSrcA;
00115
00116       /* srcBLen is always considered as shorter or equal to srcALen */
00117       j = srcBLen;
00118       srcBLen = srcALen;
00119       srcALen = j;
00120     }
00121
00122     /* Conditions to check which loopCounter holds
00123      * the first and last indices of the output samples to be calculated. */
00124     check = firstIndex + numPoints;
00125     blockSize3 = ((int32_t) check - (int32_t) srcALen);
00126     blockSize3 = (blockSize3 > 0) ? blockSize3 : 0;
00127     blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
00128     blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
00129                                      (int32_t) numPoints) : 0;
00130     blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
00131                                     (int32_t) firstIndex);
00132     blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
00133
00134     /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00135     /* The function is internally
00136      * divided into three stages according to the number of multiplications that has to be
00137      * taken place between inputA samples and inputB samples. In the first stage of the
00138      * algorithm, the multiplications increase by one for every iteration.
00139      * In the second stage of the algorithm, srcBLen number of multiplications are done.
00140      * In the third stage of the algorithm, the multiplications decrease by one
00141      * for every iteration. */
00142
00143     /* Set the output pointer to point to the firstIndex
00144      * of the output sample to be calculated. */
00145     pOut = pDst + firstIndex;
00146
00147     /* --------------------------
00148      * Initializations of stage1
00149      * -------------------------*/
00150
00151     /* sum = x[0] * y[0]
00152      * sum = x[0] * y[1] + x[1] * y[0]
00153      * ....
00154      * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00155      */
00156
00157     /* In this stage the MAC operations are increased by 1 for every iteration.
00158        The count variable holds the number of MAC operations performed.
00159        Since the partial convolution starts from from firstIndex
00160        Number of Macs to be performed is firstIndex + 1 */
00161     count = 1u + firstIndex;
00162
00163     /* Working pointer of inputA */
00164     px = pIn1;
00165
00166     /* Working pointer of inputB */
00167     pSrc2 = pIn2 + firstIndex;
00168     py = pSrc2;
00169
00170     /* ------------------------
00171      * Stage1 process
00172      * ----------------------*/
00173
00174     /* The first stage starts here */
00175     while(blockSize1 > 0)
00176     {
00177       /* Accumulator is made zero for every iteration */
00178       sum = 0;
00179
00180       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00181       k = count >> 2u;
00182
00183       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00184        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00185       while(k > 0u)
00186       {
00187         /* x[0] , x[1] */
00188         in1 = (q15_t) * px++;
00189         in2 = (q15_t) * px++;
00190         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00191
00192         /* y[srcBLen - 1] , y[srcBLen - 2] */
00193         in1 = (q15_t) * py--;
00194         in2 = (q15_t) * py--;
00195         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00196
00197         /* x[0] * y[srcBLen - 1] */
00198         /* x[1] * y[srcBLen - 2] */
00199         sum = __SMLAD(input1, input2, sum);
00200
00201         /* x[2] , x[3] */
00202         in1 = (q15_t) * px++;
00203         in2 = (q15_t) * px++;
00204         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00205
00206         /* y[srcBLen - 3] , y[srcBLen - 4] */
00207         in1 = (q15_t) * py--;
00208         in2 = (q15_t) * py--;
00209         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00210
00211         /* x[2] * y[srcBLen - 3] */
00212         /* x[3] * y[srcBLen - 4] */
00213         sum = __SMLAD(input1, input2, sum);
00214
00215         /* Decrement the loop counter */
00216         k--;
00217       }
00218
00219       /* If the count is not a multiple of 4, compute any remaining MACs here.
00220        ** No loop unrolling is used. */
00221       k = count % 0x4u;
00222
00223       while(k > 0u)
00224       {
00225         /* Perform the multiply-accumulates */
00226         sum += ((q31_t) * px++ * *py--);
00227
00228         /* Decrement the loop counter */
00229         k--;
00230       }
00231
00232       /* Store the result in the accumulator in the destination buffer. */
00233       *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
00234
00235       /* Update the inputA and inputB pointers for next MAC calculation */
00236       py = ++pSrc2;
00237       px = pIn1;
00238
00239       /* Increment the MAC count */
00240       count++;
00241
00242       /* Decrement the loop counter */
00243       blockSize1--;
00244     }
00245
00246     /* --------------------------
00247      * Initializations of stage2
00248      * ------------------------*/
00249
00250     /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00251      * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00252      * ....
00253      * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00254      */
00255
00256     /* Working pointer of inputA */
00257     px = pIn1;
00258
00259     /* Working pointer of inputB */
00260     pSrc2 = pIn2 + (srcBLen - 1u);
00261     py = pSrc2;
00262
00263     /* count is index by which the pointer pIn1 to be incremented */
00264     count = 1u;
00265
00266     /* -------------------
00267      * Stage2 process
00268      * ------------------*/
00269
00270     /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00271      * So, to loop unroll over blockSize2,
00272      * srcBLen should be greater than or equal to 4 */
00273     if(srcBLen >= 4u)
00274     {
00275       /* Loop unroll over blockSize2, by 4 */
00276       blkCnt = ((uint32_t) blockSize2 >> 2u);
00277
00278       while(blkCnt > 0u)
00279       {
00280         /* Set all accumulators to zero */
00281         acc0 = 0;
00282         acc1 = 0;
00283         acc2 = 0;
00284         acc3 = 0;
00285
00286         /* read x[0], x[1], x[2] samples */
00287         x0 = *(px++);
00288         x1 = *(px++);
00289         x2 = *(px++);
00290
00291         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00292         k = srcBLen >> 2u;
00293
00294         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00295          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00296         do
00297         {
00298           /* Read y[srcBLen - 1] sample */
00299           c0 = *(py--);
00300           /* Read y[srcBLen - 2] sample */
00301           c1 = *(py--);
00302
00303           /* Read x[3] sample */
00304           x3 = *(px++);
00305
00306           /* x[0] and x[1] are packed */
00307           in1 = (q15_t) x0;
00308           in2 = (q15_t) x1;
00309
00310           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00311
00312           /* y[srcBLen - 1]   and y[srcBLen - 2] are packed */
00313           in1 = (q15_t) c0;
00314           in2 = (q15_t) c1;
00315
00316           input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00317
00318           /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2]  */
00319           acc0 = __SMLAD(input1, input2, acc0);
00320
00321           /* x[1] and x[2] are packed */
00322           in1 = (q15_t) x1;
00323           in2 = (q15_t) x2;
00324
00325           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00326
00327           /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2]  */
00328           acc1 = __SMLAD(input1, input2, acc1);
00329
00330           /* x[2] and x[3] are packed */
00331           in1 = (q15_t) x2;
00332           in2 = (q15_t) x3;
00333
00334           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00335
00336           /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2]  */
00337           acc2 = __SMLAD(input1, input2, acc2);
00338
00339           /* Read x[4] sample */
00340           x0 = *(px++);
00341
00342           /* x[3] and x[4] are packed */
00343           in1 = (q15_t) x3;
00344           in2 = (q15_t) x0;
00345
00346           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00347
00348           /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2]  */
00349           acc3 = __SMLAD(input1, input2, acc3);
00350
00351           /* Read y[srcBLen - 3] sample */
00352           c0 = *(py--);
00353           /* Read y[srcBLen - 4] sample */
00354           c1 = *(py--);
00355
00356           /* Read x[5] sample */
00357           x1 = *(px++);
00358
00359           /* x[2] and x[3] are packed */
00360           in1 = (q15_t) x2;
00361           in2 = (q15_t) x3;
00362
00363           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00364
00365           /* y[srcBLen - 3] and y[srcBLen - 4] are packed */
00366           in1 = (q15_t) c0;
00367           in2 = (q15_t) c1;
00368
00369           input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00370
00371           /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4]  */
00372           acc0 = __SMLAD(input1, input2, acc0);
00373
00374           /* x[3] and x[4] are packed */
00375           in1 = (q15_t) x3;
00376           in2 = (q15_t) x0;
00377
00378           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00379
00380           /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4]  */
00381           acc1 = __SMLAD(input1, input2, acc1);
00382
00383           /* x[4] and x[5] are packed */
00384           in1 = (q15_t) x0;
00385           in2 = (q15_t) x1;
00386
00387           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00388
00389           /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4]  */
00390           acc2 = __SMLAD(input1, input2, acc2);
00391
00392           /* Read x[6] sample */
00393           x2 = *(px++);
00394
00395           /* x[5] and x[6] are packed */
00396           in1 = (q15_t) x1;
00397           in2 = (q15_t) x2;
00398
00399           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00400
00401           /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4]  */
00402           acc3 = __SMLAD(input1, input2, acc3);
00403
00404         } while(--k);
00405
00406         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00407          ** No loop unrolling is used. */
00408         k = srcBLen % 0x4u;
00409
00410         while(k > 0u)
00411         {
00412           /* Read y[srcBLen - 5] sample */
00413           c0 = *(py--);
00414
00415           /* Read x[7] sample */
00416           x3 = *(px++);
00417
00418           /* Perform the multiply-accumulates */
00419           /* acc0 +=  x[4] * y[srcBLen - 5] */
00420           acc0 += ((q31_t) x0 * c0);
00421           /* acc1 +=  x[5] * y[srcBLen - 5] */
00422           acc1 += ((q31_t) x1 * c0);
00423           /* acc2 +=  x[6] * y[srcBLen - 5] */
00424           acc2 += ((q31_t) x2 * c0);
00425           /* acc3 +=  x[7] * y[srcBLen - 5] */
00426           acc3 += ((q31_t) x3 * c0);
00427
00428           /* Reuse the present samples for the next MAC */
00429           x0 = x1;
00430           x1 = x2;
00431           x2 = x3;
00432
00433           /* Decrement the loop counter */
00434           k--;
00435         }
00436
00437         /* Store the result in the accumulator in the destination buffer. */
00438         *pOut++ = (q7_t) (__SSAT(acc0 >> 7, 8));
00439         *pOut++ = (q7_t) (__SSAT(acc1 >> 7, 8));
00440         *pOut++ = (q7_t) (__SSAT(acc2 >> 7, 8));
00441         *pOut++ = (q7_t) (__SSAT(acc3 >> 7, 8));
00442
00443         /* Update the inputA and inputB pointers for next MAC calculation */
00444         px = pIn1 + count * 4u;
00445         py = pSrc2;
00446
00447         /* Increment the pointer pIn1 index, count by 1 */
00448         count++;
00449
00450         /* Decrement the loop counter */
00451         blkCnt--;
00452       }
00453
00454       /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00455        ** No loop unrolling is used. */
00456       blkCnt = (uint32_t) blockSize2 % 0x4u;
00457
00458       while(blkCnt > 0u)
00459       {
00460         /* Accumulator is made zero for every iteration */
00461         sum = 0;
00462
00463         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00464         k = srcBLen >> 2u;
00465
00466         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00467          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00468         while(k > 0u)
00469         {
00470
00471           /* Reading two inputs of SrcA buffer and packing */
00472           in1 = (q15_t) * px++;
00473           in2 = (q15_t) * px++;
00474           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00475
00476           /* Reading two inputs of SrcB buffer and packing */
00477           in1 = (q15_t) * py--;
00478           in2 = (q15_t) * py--;
00479           input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00480
00481           /* Perform the multiply-accumulates */
00482           sum = __SMLAD(input1, input2, sum);
00483
00484           /* Reading two inputs of SrcA buffer and packing */
00485           in1 = (q15_t) * px++;
00486           in2 = (q15_t) * px++;
00487           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00488
00489           /* Reading two inputs of SrcB buffer and packing */
00490           in1 = (q15_t) * py--;
00491           in2 = (q15_t) * py--;
00492           input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00493
00494           /* Perform the multiply-accumulates */
00495           sum = __SMLAD(input1, input2, sum);
00496
00497           /* Decrement the loop counter */
00498           k--;
00499         }
00500
00501         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00502          ** No loop unrolling is used. */
00503         k = srcBLen % 0x4u;
00504
00505         while(k > 0u)
00506         {
00507           /* Perform the multiply-accumulates */
00508           sum += ((q31_t) * px++ * *py--);
00509
00510           /* Decrement the loop counter */
00511           k--;
00512         }
00513
00514         /* Store the result in the accumulator in the destination buffer. */
00515         *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
00516
00517         /* Update the inputA and inputB pointers for next MAC calculation */
00518         px = pIn1 + count;
00519         py = pSrc2;
00520
00521         /* Increment the pointer pIn1 index, count by 1 */
00522         count++;
00523
00524         /* Decrement the loop counter */
00525         blkCnt--;
00526       }
00527     }
00528     else
00529     {
00530       /* If the srcBLen is not a multiple of 4,
00531        * the blockSize2 loop cannot be unrolled by 4 */
00532       blkCnt = (uint32_t) blockSize2;
00533
00534       while(blkCnt > 0u)
00535       {
00536         /* Accumulator is made zero for every iteration */
00537         sum = 0;
00538
00539         /* srcBLen number of MACS should be performed */
00540         k = srcBLen;
00541
00542         while(k > 0u)
00543         {
00544           /* Perform the multiply-accumulate */
00545           sum += ((q31_t) * px++ * *py--);
00546
00547           /* Decrement the loop counter */
00548           k--;
00549         }
00550
00551         /* Store the result in the accumulator in the destination buffer. */
00552         *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
00553
00554         /* Update the inputA and inputB pointers for next MAC calculation */
00555         px = pIn1 + count;
00556         py = pSrc2;
00557
00558         /* Increment the MAC count */
00559         count++;
00560
00561         /* Decrement the loop counter */
00562         blkCnt--;
00563       }
00564     }
00565
00566
00567     /* --------------------------
00568      * Initializations of stage3
00569      * -------------------------*/
00570
00571     /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00572      * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00573      * ....
00574      * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00575      * sum +=  x[srcALen-1] * y[srcBLen-1]
00576      */
00577
00578     /* In this stage the MAC operations are decreased by 1 for every iteration.
00579        The count variable holds the number of MAC operations performed */
00580     count = srcBLen - 1u;
00581
00582     /* Working pointer of inputA */
00583     pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00584     px = pSrc1;
00585
00586     /* Working pointer of inputB */
00587     pSrc2 = pIn2 + (srcBLen - 1u);
00588     py = pSrc2;
00589
00590     /* -------------------
00591      * Stage3 process
00592      * ------------------*/
00593
00594     while(blockSize3 > 0)
00595     {
00596       /* Accumulator is made zero for every iteration */
00597       sum = 0;
00598
00599       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00600       k = count >> 2u;
00601
00602       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00603        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00604       while(k > 0u)
00605       {
00606         /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */
00607         in1 = (q15_t) * px++;
00608         in2 = (q15_t) * px++;
00609         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00610
00611         /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */
00612         in1 = (q15_t) * py--;
00613         in2 = (q15_t) * py--;
00614         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00615
00616         /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
00617         /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
00618         sum = __SMLAD(input1, input2, sum);
00619
00620         /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */
00621         in1 = (q15_t) * px++;
00622         in2 = (q15_t) * px++;
00623         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00624
00625         /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */
00626         in1 = (q15_t) * py--;
00627         in2 = (q15_t) * py--;
00628         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00629
00630         /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
00631         /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
00632         sum = __SMLAD(input1, input2, sum);
00633
00634         /* Decrement the loop counter */
00635         k--;
00636       }
00637
00638       /* If the count is not a multiple of 4, compute any remaining MACs here.
00639        ** No loop unrolling is used. */
00640       k = count % 0x4u;
00641
00642       while(k > 0u)
00643       {
00644         /* Perform the multiply-accumulates */
00645         /* sum +=  x[srcALen-1] * y[srcBLen-1] */
00646         sum += ((q31_t) * px++ * *py--);
00647
00648         /* Decrement the loop counter */
00649         k--;
00650       }
00651
00652       /* Store the result in the accumulator in the destination buffer. */
00653       *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
00654
00655       /* Update the inputA and inputB pointers for next MAC calculation */
00656       px = ++pSrc1;
00657       py = pSrc2;
00658
00659       /* Decrement the MAC count */
00660       count--;
00661
00662       /* Decrement the loop counter */
00663       blockSize3--;
00664
00665     }
00666
00667     /* set status as ARM_MATH_SUCCESS */
00668     status = ARM_MATH_SUCCESS;
00669   }
00670
00671   /* Return to application */
00672   return (status);
00673
00674 #else
00675
00676   /* Run the below code for Cortex-M0 */
00677
00678   q7_t *pIn1 = pSrcA;                            /* inputA pointer */
00679   q7_t *pIn2 = pSrcB;                            /* inputB pointer */
00680   q31_t sum;                                     /* Accumulator */
00681   uint32_t i, j;                                 /* loop counters */
00682   arm_status status;                             /* status of Partial convolution */
00683
00684   /* Check for range of output samples to be calculated */
00685   if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
00686   {
00687     /* Set status as ARM_ARGUMENT_ERROR */
00688     status = ARM_MATH_ARGUMENT_ERROR;
00689   }
00690   else
00691   {
00692     /* Loop to calculate convolution for output length number of values */
00693     for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
00694     {
00695       /* Initialize sum with zero to carry on MAC operations */
00696       sum = 0;
00697
00698       /* Loop to perform MAC operations according to convolution equation */
00699       for (j = 0; j <= i; j++)
00700       {
00701         /* Check the array limitations */
00702         if(((i - j) < srcBLen) && (j < srcALen))
00703         {
00704           /* z[i] += x[i-j] * y[j] */
00705           sum += ((q15_t) pIn1[j] * (pIn2[i - j]));
00706         }
00707       }
00708
00709       /* Store the output in the destination buffer */
00710       pDst[i] = (q7_t) __SSAT((sum >> 7u), 8u);
00711     }
00712     /* set status as ARM_SUCCESS as there are no argument errors */
00713     status = ARM_MATH_SUCCESS;
00714   }
00715   return (status);
00716
00717 #endif /*  #ifndef ARM_MATH_CM0 */
00718
00719 }
00720
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CMSIS DSP Software Library: arm_conv_partial_q15.c File Reference

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arm_conv_partial_q15.c File Reference

#include "arm_math.h"

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Functions

arm_status arm_conv_partial_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints)
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CMSIS DSP Software Library: arm_conv_partial_q15.c Source File

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arm_conv_partial_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_conv_partial_q15.c
00009 *
00010 * Description:  Partial convolution of Q15 sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00060 arm_status arm_conv_partial_q15(
00061   q15_t * pSrcA,
00062   uint32_t srcALen,
00063   q15_t * pSrcB,
00064   uint32_t srcBLen,
00065   q15_t * pDst,
00066   uint32_t firstIndex,
00067   uint32_t numPoints)
00068 {
00069
00070
00071 #ifndef ARM_MATH_CM0
00072
00073   /* Run the below code for Cortex-M4 and Cortex-M3 */
00074
00075   q15_t *pIn1;                                   /* inputA pointer               */
00076   q15_t *pIn2;                                   /* inputB pointer               */
00077   q15_t *pOut = pDst;                            /* output pointer               */
00078   q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulator                  */
00079   q15_t *px;                                     /* Intermediate inputA pointer  */
00080   q15_t *py;                                     /* Intermediate inputB pointer  */
00081   q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
00082   q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables */
00083   uint32_t j, k, count, check, blkCnt;
00084   int32_t blockSize1, blockSize2, blockSize3;    /* loop counter                 */
00085   arm_status status;                             /* status of Partial convolution */
00086   q31_t *pb;                                     /* 32 bit pointer for inputB buffer */
00087
00088   /* Check for range of output samples to be calculated */
00089   if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
00090   {
00091     /* Set status as ARM_MATH_ARGUMENT_ERROR */
00092     status = ARM_MATH_ARGUMENT_ERROR;
00093   }
00094   else
00095   {
00096
00097     /* The algorithm implementation is based on the lengths of the inputs. */
00098     /* srcB is always made to slide across srcA. */
00099     /* So srcBLen is always considered as shorter or equal to srcALen */
00100     if(srcALen >= srcBLen)
00101     {
00102       /* Initialization of inputA pointer */
00103       pIn1 = pSrcA;
00104
00105       /* Initialization of inputB pointer */
00106       pIn2 = pSrcB;
00107     }
00108     else
00109     {
00110       /* Initialization of inputA pointer */
00111       pIn1 = pSrcB;
00112
00113       /* Initialization of inputB pointer */
00114       pIn2 = pSrcA;
00115
00116       /* srcBLen is always considered as shorter or equal to srcALen */
00117       j = srcBLen;
00118       srcBLen = srcALen;
00119       srcALen = j;
00120     }
00121
00122     /* Conditions to check which loopCounter holds
00123      * the first and last indices of the output samples to be calculated. */
00124     check = firstIndex + numPoints;
00125     blockSize3 = ((int32_t) check - (int32_t) srcALen);
00126     blockSize3 = (blockSize3 > 0) ? blockSize3 : 0;
00127     blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
00128     blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
00129                                      (int32_t) numPoints) : 0;
00130     blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
00131                                     (int32_t) firstIndex);
00132     blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
00133
00134     /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00135     /* The function is internally
00136      * divided into three stages according to the number of multiplications that has to be
00137      * taken place between inputA samples and inputB samples. In the first stage of the
00138      * algorithm, the multiplications increase by one for every iteration.
00139      * In the second stage of the algorithm, srcBLen number of multiplications are done.
00140      * In the third stage of the algorithm, the multiplications decrease by one
00141      * for every iteration. */
00142
00143     /* Set the output pointer to point to the firstIndex
00144      * of the output sample to be calculated. */
00145     pOut = pDst + firstIndex;
00146
00147     /* --------------------------
00148      * Initializations of stage1
00149      * -------------------------*/
00150
00151     /* sum = x[0] * y[0]
00152      * sum = x[0] * y[1] + x[1] * y[0]
00153      * ....
00154      * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00155      */
00156
00157     /* In this stage the MAC operations are increased by 1 for every iteration.
00158        The count variable holds the number of MAC operations performed.
00159        Since the partial convolution starts from firstIndex
00160        Number of Macs to be performed is firstIndex + 1 */
00161     count = 1u + firstIndex;
00162
00163     /* Working pointer of inputA */
00164     px = pIn1;
00165
00166     /* Working pointer of inputB */
00167     pSrc2 = pIn2 + firstIndex;
00168     py = pSrc2;
00169
00170     /* ------------------------
00171      * Stage1 process
00172      * ----------------------*/
00173
00174     /* For loop unrolling by 4, this stage is divided into two. */
00175     /* First part of this stage computes the MAC operations less than 4 */
00176     /* Second part of this stage computes the MAC operations greater than or equal to 4 */
00177
00178     /* The first part of the stage starts here */
00179     while((count < 4u) && (blockSize1 > 0))
00180     {
00181       /* Accumulator is made zero for every iteration */
00182       sum = 0;
00183
00184       /* Loop over number of MAC operations between
00185        * inputA samples and inputB samples */
00186       k = count;
00187
00188       while(k > 0u)
00189       {
00190         /* Perform the multiply-accumulates */
00191         sum = __SMLALD(*px++, *py--, sum);
00192
00193         /* Decrement the loop counter */
00194         k--;
00195       }
00196
00197       /* Store the result in the accumulator in the destination buffer. */
00198       *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
00199
00200       /* Update the inputA and inputB pointers for next MAC calculation */
00201       py = ++pSrc2;
00202       px = pIn1;
00203
00204       /* Increment the MAC count */
00205       count++;
00206
00207       /* Decrement the loop counter */
00208       blockSize1--;
00209     }
00210
00211     /* The second part of the stage starts here */
00212     /* The internal loop, over count, is unrolled by 4 */
00213     /* To, read the last two inputB samples using SIMD:
00214      * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
00215     py = py - 1;
00216
00217     while(blockSize1 > 0)
00218     {
00219       /* Accumulator is made zero for every iteration */
00220       sum = 0;
00221
00222       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00223       k = count >> 2u;
00224
00225       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00226        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00227       while(k > 0u)
00228       {
00229         /* Perform the multiply-accumulates */
00230         /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
00231         sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00232         /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
00233         sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00234
00235         /* Decrement the loop counter */
00236         k--;
00237       }
00238
00239       /* For the next MAC operations, the pointer py is used without SIMD
00240        * So, py is incremented by 1 */
00241       py = py + 1u;
00242
00243       /* If the count is not a multiple of 4, compute any remaining MACs here.
00244        ** No loop unrolling is used. */
00245       k = count % 0x4u;
00246
00247       while(k > 0u)
00248       {
00249         /* Perform the multiply-accumulates */
00250         sum = __SMLALD(*px++, *py--, sum);
00251
00252         /* Decrement the loop counter */
00253         k--;
00254       }
00255
00256       /* Store the result in the accumulator in the destination buffer. */
00257       *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
00258
00259       /* Update the inputA and inputB pointers for next MAC calculation */
00260       py = ++pSrc2 - 1u;
00261       px = pIn1;
00262
00263       /* Increment the MAC count */
00264       count++;
00265
00266       /* Decrement the loop counter */
00267       blockSize1--;
00268     }
00269
00270     /* --------------------------
00271      * Initializations of stage2
00272      * ------------------------*/
00273
00274     /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00275      * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00276      * ....
00277      * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00278      */
00279
00280     /* Working pointer of inputA */
00281     px = pIn1;
00282
00283     /* Working pointer of inputB */
00284     pSrc2 = pIn2 + (srcBLen - 1u);
00285     py = pSrc2;
00286
00287     /* Initialize inputB pointer of type q31 */
00288     pb = (q31_t *) (py - 1u);
00289
00290     /* count is the index by which the pointer pIn1 to be incremented */
00291     count = 1u;
00292
00293
00294     /* --------------------
00295      * Stage2 process
00296      * -------------------*/
00297
00298     /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00299      * So, to loop unroll over blockSize2,
00300      * srcBLen should be greater than or equal to 4 */
00301     if(srcBLen >= 4u)
00302     {
00303       /* Loop unroll over blockSize2, by 4 */
00304       blkCnt = ((uint32_t) blockSize2 >> 2u);
00305
00306       while(blkCnt > 0u)
00307       {
00308         /* Set all accumulators to zero */
00309         acc0 = 0;
00310         acc1 = 0;
00311         acc2 = 0;
00312         acc3 = 0;
00313
00314
00315         /* read x[0], x[1] samples */
00316         x0 = *(q31_t *) (px++);
00317         /* read x[1], x[2] samples */
00318         x1 = *(q31_t *) (px++);
00319
00320
00321         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00322         k = srcBLen >> 2u;
00323
00324         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00325          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00326         do
00327         {
00328           /* Read the last two inputB samples using SIMD:
00329            * y[srcBLen - 1] and y[srcBLen - 2] */
00330           c0 = *(pb--);
00331
00332           /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
00333           acc0 = __SMLALDX(x0, c0, acc0);
00334
00335           /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
00336           acc1 = __SMLALDX(x1, c0, acc1);
00337
00338           /* Read x[2], x[3] */
00339           x2 = *(q31_t *) (px++);
00340
00341           /* Read x[3], x[4] */
00342           x3 = *(q31_t *) (px++);
00343
00344           /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
00345           acc2 = __SMLALDX(x2, c0, acc2);
00346
00347           /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
00348           acc3 = __SMLALDX(x3, c0, acc3);
00349
00350           /* Read y[srcBLen - 3] and y[srcBLen - 4] */
00351           c0 = *(pb--);
00352
00353           /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
00354           acc0 = __SMLALDX(x2, c0, acc0);
00355
00356           /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
00357           acc1 = __SMLALDX(x3, c0, acc1);
00358
00359           /* Read x[4], x[5] */
00360           x0 = *(q31_t *) (px++);
00361
00362           /* Read x[5], x[6] */
00363           x1 = *(q31_t *) (px++);
00364
00365           /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
00366           acc2 = __SMLALDX(x0, c0, acc2);
00367
00368           /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
00369           acc3 = __SMLALDX(x1, c0, acc3);
00370
00371         } while(--k);
00372
00373         /* For the next MAC operations, SIMD is not used
00374          * So, the 16 bit pointer if inputB, py is updated */
00375         py = (q15_t *) pb;
00376         py = py + 1;
00377
00378         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00379          ** No loop unrolling is used. */
00380         k = srcBLen % 0x4u;
00381
00382         if(k == 1u)
00383         {
00384           /* Read y[srcBLen - 5] */
00385           c0 = *(py);
00386
00387 #ifdef  ARM_MATH_BIG_ENDIAN
00388
00389           c0 = c0 << 16u;
00390
00391 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00392           /* Read x[7] */
00393           x3 = *(q31_t *) px++;
00394
00395           /* Perform the multiply-accumulates */
00396           acc0 = __SMLALD(x0, c0, acc0);
00397           acc1 = __SMLALD(x1, c0, acc1);
00398           acc2 = __SMLALDX(x1, c0, acc2);
00399           acc3 = __SMLALDX(x3, c0, acc3);
00400         }
00401
00402         if(k == 2u)
00403         {
00404           /* Read y[srcBLen - 5], y[srcBLen - 6] */
00405           c0 = *(pb);
00406
00407           /* Read x[7], x[8] */
00408           x3 = *(q31_t *) px++;
00409
00410           /* Read x[9] */
00411           x2 = *(q31_t *) px++;
00412
00413           /* Perform the multiply-accumulates */
00414           acc0 = __SMLALDX(x0, c0, acc0);
00415           acc1 = __SMLALDX(x1, c0, acc1);
00416           acc2 = __SMLALDX(x3, c0, acc2);
00417           acc3 = __SMLALDX(x2, c0, acc3);
00418         }
00419
00420         if(k == 3u)
00421         {
00422           /* Read y[srcBLen - 5], y[srcBLen - 6] */
00423           c0 = *pb--;
00424
00425           /* Read x[7], x[8] */
00426           x3 = *(q31_t *) px++;
00427
00428           /* Read x[9] */
00429           x2 = *(q31_t *) px++;
00430
00431           /* Perform the multiply-accumulates */
00432           acc0 = __SMLALDX(x0, c0, acc0);
00433           acc1 = __SMLALDX(x1, c0, acc1);
00434           acc2 = __SMLALDX(x3, c0, acc2);
00435           acc3 = __SMLALDX(x2, c0, acc3);
00436
00437 #ifdef  ARM_MATH_BIG_ENDIAN
00438
00439           /* Read y[srcBLen - 7] */
00440           c0 = (*pb);
00441           c0 = (c0) << 16;
00442
00443 #else
00444
00445           /* Read y[srcBLen - 7] */
00446           c0 = (q15_t) (*pb >> 16);
00447
00448 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00449
00450           /* Read x[10] */
00451           x3 = *(q31_t *) px++;
00452
00453           /* Perform the multiply-accumulates */
00454           acc0 = __SMLALDX(x1, c0, acc0);
00455           acc1 = __SMLALD(x2, c0, acc1);
00456           acc2 = __SMLALDX(x2, c0, acc2);
00457           acc3 = __SMLALDX(x3, c0, acc3);
00458         }
00459
00460         /* Store the results in the accumulators in the destination buffer. */
00461 #ifndef  ARM_MATH_BIG_ENDIAN
00462
00463         *__SIMD32(pOut)++ =
00464           __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
00465         *__SIMD32(pOut)++ =
00466           __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
00467
00468 #else
00469
00470         *__SIMD32(pOut)++ =
00471           __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
00472         *__SIMD32(pOut)++ =
00473           __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
00474
00475 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00476
00477         /* Update the inputA and inputB pointers for next MAC calculation */
00478         px = pIn1 + (count * 4u);
00479         py = pSrc2;
00480         pb = (q31_t *) (py - 1);
00481
00482         /* Increment the pointer pIn1 index, count by 1 */
00483         count++;
00484
00485         /* Decrement the loop counter */
00486         blkCnt--;
00487       }
00488
00489       /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00490        ** No loop unrolling is used. */
00491       blkCnt = (uint32_t) blockSize2 % 0x4u;
00492
00493       while(blkCnt > 0u)
00494       {
00495         /* Accumulator is made zero for every iteration */
00496         sum = 0;
00497
00498         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00499         k = srcBLen >> 2u;
00500
00501         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00502          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00503         while(k > 0u)
00504         {
00505           /* Perform the multiply-accumulates */
00506           sum += (q63_t) ((q31_t) * px++ * *py--);
00507           sum += (q63_t) ((q31_t) * px++ * *py--);
00508           sum += (q63_t) ((q31_t) * px++ * *py--);
00509           sum += (q63_t) ((q31_t) * px++ * *py--);
00510
00511           /* Decrement the loop counter */
00512           k--;
00513         }
00514
00515         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00516          ** No loop unrolling is used. */
00517         k = srcBLen % 0x4u;
00518
00519         while(k > 0u)
00520         {
00521           /* Perform the multiply-accumulates */
00522           sum += (q63_t) ((q31_t) * px++ * *py--);
00523
00524           /* Decrement the loop counter */
00525           k--;
00526         }
00527
00528         /* Store the result in the accumulator in the destination buffer. */
00529         *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
00530
00531         /* Update the inputA and inputB pointers for next MAC calculation */
00532         px = pIn1 + count;
00533         py = pSrc2;
00534
00535         /* Increment the pointer pIn1 index, count by 1 */
00536         count++;
00537
00538         /* Decrement the loop counter */
00539         blkCnt--;
00540       }
00541     }
00542     else
00543     {
00544       /* If the srcBLen is not a multiple of 4,
00545        * the blockSize2 loop cannot be unrolled by 4 */
00546       blkCnt = (uint32_t) blockSize2;
00547
00548       while(blkCnt > 0u)
00549       {
00550         /* Accumulator is made zero for every iteration */
00551         sum = 0;
00552
00553         /* srcBLen number of MACS should be performed */
00554         k = srcBLen;
00555
00556         while(k > 0u)
00557         {
00558           /* Perform the multiply-accumulate */
00559           sum += (q63_t) ((q31_t) * px++ * *py--);
00560
00561           /* Decrement the loop counter */
00562           k--;
00563         }
00564
00565         /* Store the result in the accumulator in the destination buffer. */
00566         *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
00567
00568         /* Update the inputA and inputB pointers for next MAC calculation */
00569         px = pIn1 + count;
00570         py = pSrc2;
00571
00572         /* Increment the MAC count */
00573         count++;
00574
00575         /* Decrement the loop counter */
00576         blkCnt--;
00577       }
00578     }
00579
00580
00581     /* --------------------------
00582      * Initializations of stage3
00583      * -------------------------*/
00584
00585     /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00586      * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00587      * ....
00588      * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00589      * sum +=  x[srcALen-1] * y[srcBLen-1]
00590      */
00591
00592     /* In this stage the MAC operations are decreased by 1 for every iteration.
00593        The count variable holds the number of MAC operations performed */
00594     count = srcBLen - 1u;
00595
00596     /* Working pointer of inputA */
00597     pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00598     px = pSrc1;
00599
00600     /* Working pointer of inputB */
00601     pSrc2 = pIn2 + (srcBLen - 1u);
00602     pIn2 = pSrc2 - 1u;
00603     py = pIn2;
00604
00605     /* -------------------
00606      * Stage3 process
00607      * ------------------*/
00608
00609     /* For loop unrolling by 4, this stage is divided into two. */
00610     /* First part of this stage computes the MAC operations greater than 4 */
00611     /* Second part of this stage computes the MAC operations less than or equal to 4 */
00612
00613     /* The first part of the stage starts here */
00614     j = count >> 2u;
00615
00616     while((j > 0u) && (blockSize3 > 0))
00617     {
00618       /* Accumulator is made zero for every iteration */
00619       sum = 0;
00620
00621       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00622       k = count >> 2u;
00623
00624       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00625        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00626       while(k > 0u)
00627       {
00628         /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
00629          * with y[srcBLen - 1], y[srcBLen - 2] respectively */
00630         sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00631         /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
00632          * with y[srcBLen - 3], y[srcBLen - 4] respectively */
00633         sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00634
00635         /* Decrement the loop counter */
00636         k--;
00637       }
00638
00639       /* For the next MAC operations, the pointer py is used without SIMD
00640        * So, py is incremented by 1 */
00641       py = py + 1u;
00642
00643       /* If the count is not a multiple of 4, compute any remaining MACs here.
00644        ** No loop unrolling is used. */
00645       k = count % 0x4u;
00646
00647       while(k > 0u)
00648       {
00649         /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
00650         sum = __SMLALD(*px++, *py--, sum);
00651
00652         /* Decrement the loop counter */
00653         k--;
00654       }
00655
00656       /* Store the result in the accumulator in the destination buffer. */
00657       *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
00658
00659       /* Update the inputA and inputB pointers for next MAC calculation */
00660       px = ++pSrc1;
00661       py = pIn2;
00662
00663       /* Decrement the MAC count */
00664       count--;
00665
00666       /* Decrement the loop counter */
00667       blockSize3--;
00668
00669       j--;
00670     }
00671
00672     /* The second part of the stage starts here */
00673     /* SIMD is not used for the next MAC operations,
00674      * so pointer py is updated to read only one sample at a time */
00675     py = py + 1u;
00676
00677     while(blockSize3 > 0)
00678     {
00679       /* Accumulator is made zero for every iteration */
00680       sum = 0;
00681
00682       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00683       k = count;
00684
00685       while(k > 0u)
00686       {
00687         /* Perform the multiply-accumulates */
00688         /* sum +=  x[srcALen-1] * y[srcBLen-1] */
00689         sum = __SMLALD(*px++, *py--, sum);
00690
00691         /* Decrement the loop counter */
00692         k--;
00693       }
00694
00695       /* Store the result in the accumulator in the destination buffer. */
00696       *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
00697
00698       /* Update the inputA and inputB pointers for next MAC calculation */
00699       px = ++pSrc1;
00700       py = pSrc2;
00701
00702       /* Decrement the MAC count */
00703       count--;
00704
00705       /* Decrement the loop counter */
00706       blockSize3--;
00707     }
00708
00709     /* set status as ARM_MATH_SUCCESS */
00710     status = ARM_MATH_SUCCESS;
00711   }
00712
00713   /* Return to application */
00714   return (status);
00715
00716 #else
00717
00718   /* Run the below code for Cortex-M0 */
00719
00720   q15_t *pIn1 = pSrcA;                           /* inputA pointer */
00721   q15_t *pIn2 = pSrcB;                           /* inputB pointer */
00722   q63_t sum;                                     /* Accumulator */
00723   uint32_t i, j;                                 /* loop counters */
00724   arm_status status;                             /* status of Partial convolution */
00725
00726   /* Check for range of output samples to be calculated */
00727   if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
00728   {
00729     /* Set status as ARM_ARGUMENT_ERROR */
00730     status = ARM_MATH_ARGUMENT_ERROR;
00731   }
00732   else
00733   {
00734     /* Loop to calculate convolution for output length number of values */
00735     for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
00736     {
00737       /* Initialize sum with zero to carry on MAC operations */
00738       sum = 0;
00739
00740       /* Loop to perform MAC operations according to convolution equation */
00741       for (j = 0; j <= i; j++)
00742       {
00743         /* Check the array limitations */
00744         if(((i - j) < srcBLen) && (j < srcALen))
00745         {
00746           /* z[i] += x[i-j] * y[j] */
00747           sum += ((q31_t) pIn1[j] * (pIn2[i - j]));
00748         }
00749       }
00750
00751       /* Store the output in the destination buffer */
00752       pDst[i] = (q15_t) __SSAT((sum >> 15u), 16u);
00753     }
00754     /* set status as ARM_SUCCESS as there are no argument errors */
00755     status = ARM_MATH_SUCCESS;
00756   }
00757   return (status);
00758
00759 #endif /*     #ifndef ARM_MATH_CM0      */
00760
00761 }
00762
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CMSIS DSP Software Library: arm_conv_partial_q31.c File Reference

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arm_conv_partial_q31.c File Reference

#include "arm_math.h"

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Functions

arm_status arm_conv_partial_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst, uint32_t firstIndex, uint32_t numPoints)
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CMSIS DSP Software Library: arm_conv_partial_q31.c Source File

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arm_conv_partial_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_conv_partial_q31.c
00009 *
00010 * Description:  Partial convolution of Q31 sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00059 arm_status arm_conv_partial_q31(
00060   q31_t * pSrcA,
00061   uint32_t srcALen,
00062   q31_t * pSrcB,
00063   uint32_t srcBLen,
00064   q31_t * pDst,
00065   uint32_t firstIndex,
00066   uint32_t numPoints)
00067 {
00068
00069
00070 #ifndef ARM_MATH_CM0
00071
00072   /* Run the below code for Cortex-M4 and Cortex-M3 */
00073
00074   q31_t *pIn1;                                   /* inputA pointer               */
00075   q31_t *pIn2;                                   /* inputB pointer               */
00076   q31_t *pOut = pDst;                            /* output pointer               */
00077   q31_t *px;                                     /* Intermediate inputA pointer  */
00078   q31_t *py;                                     /* Intermediate inputB pointer  */
00079   q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
00080   q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulator                  */
00081   q31_t x0, x1, x2, x3, c0;
00082   uint32_t j, k, count, check, blkCnt;
00083   int32_t blockSize1, blockSize2, blockSize3;    /* loop counter                 */
00084   arm_status status;                             /* status of Partial convolution */
00085
00086
00087   /* Check for range of output samples to be calculated */
00088   if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
00089   {
00090     /* Set status as ARM_MATH_ARGUMENT_ERROR */
00091     status = ARM_MATH_ARGUMENT_ERROR;
00092   }
00093   else
00094   {
00095
00096     /* The algorithm implementation is based on the lengths of the inputs. */
00097     /* srcB is always made to slide across srcA. */
00098     /* So srcBLen is always considered as shorter or equal to srcALen */
00099     if(srcALen >= srcBLen)
00100     {
00101       /* Initialization of inputA pointer */
00102       pIn1 = pSrcA;
00103
00104       /* Initialization of inputB pointer */
00105       pIn2 = pSrcB;
00106     }
00107     else
00108     {
00109       /* Initialization of inputA pointer */
00110       pIn1 = pSrcB;
00111
00112       /* Initialization of inputB pointer */
00113       pIn2 = pSrcA;
00114
00115       /* srcBLen is always considered as shorter or equal to srcALen */
00116       j = srcBLen;
00117       srcBLen = srcALen;
00118       srcALen = j;
00119     }
00120
00121     /* Conditions to check which loopCounter holds
00122      * the first and last indices of the output samples to be calculated. */
00123     check = firstIndex + numPoints;
00124     blockSize3 = ((int32_t) check - (int32_t) srcALen);
00125     blockSize3 = (blockSize3 > 0) ? blockSize3 : 0;
00126     blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
00127     blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
00128                                      (int32_t) numPoints) : 0;
00129     blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
00130                                     (int32_t) firstIndex);
00131     blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
00132
00133     /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00134     /* The function is internally
00135      * divided into three stages according to the number of multiplications that has to be
00136      * taken place between inputA samples and inputB samples. In the first stage of the
00137      * algorithm, the multiplications increase by one for every iteration.
00138      * In the second stage of the algorithm, srcBLen number of multiplications are done.
00139      * In the third stage of the algorithm, the multiplications decrease by one
00140      * for every iteration. */
00141
00142     /* Set the output pointer to point to the firstIndex
00143      * of the output sample to be calculated. */
00144     pOut = pDst + firstIndex;
00145
00146     /* --------------------------
00147      * Initializations of stage1
00148      * -------------------------*/
00149
00150     /* sum = x[0] * y[0]
00151      * sum = x[0] * y[1] + x[1] * y[0]
00152      * ....
00153      * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00154      */
00155
00156     /* In this stage the MAC operations are increased by 1 for every iteration.
00157        The count variable holds the number of MAC operations performed.
00158        Since the partial convolution starts from firstIndex
00159        Number of Macs to be performed is firstIndex + 1 */
00160     count = 1u + firstIndex;
00161
00162     /* Working pointer of inputA */
00163     px = pIn1;
00164
00165     /* Working pointer of inputB */
00166     pSrc2 = pIn2 + firstIndex;
00167     py = pSrc2;
00168
00169     /* ------------------------
00170      * Stage1 process
00171      * ----------------------*/
00172
00173     /* The first loop starts here */
00174     while(blockSize1 > 0)
00175     {
00176       /* Accumulator is made zero for every iteration */
00177       sum = 0;
00178
00179       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00180       k = count >> 2u;
00181
00182       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00183        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00184       while(k > 0u)
00185       {
00186         /* x[0] * y[srcBLen - 1] */
00187         sum += (q63_t) * px++ * (*py--);
00188         /* x[1] * y[srcBLen - 2] */
00189         sum += (q63_t) * px++ * (*py--);
00190         /* x[2] * y[srcBLen - 3] */
00191         sum += (q63_t) * px++ * (*py--);
00192         /* x[3] * y[srcBLen - 4] */
00193         sum += (q63_t) * px++ * (*py--);
00194
00195         /* Decrement the loop counter */
00196         k--;
00197       }
00198
00199       /* If the count is not a multiple of 4, compute any remaining MACs here.
00200        ** No loop unrolling is used. */
00201       k = count % 0x4u;
00202
00203       while(k > 0u)
00204       {
00205         /* Perform the multiply-accumulate */
00206         sum += (q63_t) * px++ * (*py--);
00207
00208         /* Decrement the loop counter */
00209         k--;
00210       }
00211
00212       /* Store the result in the accumulator in the destination buffer. */
00213       *pOut++ = (q31_t) (sum >> 31);
00214
00215       /* Update the inputA and inputB pointers for next MAC calculation */
00216       py = ++pSrc2;
00217       px = pIn1;
00218
00219       /* Increment the MAC count */
00220       count++;
00221
00222       /* Decrement the loop counter */
00223       blockSize1--;
00224     }
00225
00226     /* --------------------------
00227      * Initializations of stage2
00228      * ------------------------*/
00229
00230     /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00231      * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00232      * ....
00233      * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00234      */
00235
00236     /* Working pointer of inputA */
00237     px = pIn1;
00238
00239     /* Working pointer of inputB */
00240     pSrc2 = pIn2 + (srcBLen - 1u);
00241     py = pSrc2;
00242
00243     /* count is index by which the pointer pIn1 to be incremented */
00244     count = 1u;
00245
00246     /* -------------------
00247      * Stage2 process
00248      * ------------------*/
00249
00250     /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00251      * So, to loop unroll over blockSize2,
00252      * srcBLen should be greater than or equal to 4 */
00253     if(srcBLen >= 4u)
00254     {
00255       /* Loop unroll over blockSize2 */
00256       blkCnt = ((uint32_t) blockSize2 >> 2u);
00257
00258       while(blkCnt > 0u)
00259       {
00260         /* Set all accumulators to zero */
00261         acc0 = 0;
00262         acc1 = 0;
00263         acc2 = 0;
00264         acc3 = 0;
00265
00266         /* read x[0], x[1], x[2] samples */
00267         x0 = *(px++);
00268         x1 = *(px++);
00269         x2 = *(px++);
00270
00271         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00272         k = srcBLen >> 2u;
00273
00274         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00275          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00276         do
00277         {
00278           /* Read y[srcBLen - 1] sample */
00279           c0 = *(py--);
00280
00281           /* Read x[3] sample */
00282           x3 = *(px++);
00283
00284           /* Perform the multiply-accumulates */
00285           /* acc0 +=  x[0] * y[srcBLen - 1] */
00286           acc0 += (q63_t) x0 *c0;
00287           /* acc1 +=  x[1] * y[srcBLen - 1] */
00288           acc1 += (q63_t) x1 *c0;
00289           /* acc2 +=  x[2] * y[srcBLen - 1] */
00290           acc2 += (q63_t) x2 *c0;
00291           /* acc3 +=  x[3] * y[srcBLen - 1] */
00292           acc3 += (q63_t) x3 *c0;
00293
00294           /* Read y[srcBLen - 2] sample */
00295           c0 = *(py--);
00296
00297           /* Read x[4] sample */
00298           x0 = *(px++);
00299
00300           /* Perform the multiply-accumulate */
00301           /* acc0 +=  x[1] * y[srcBLen - 2] */
00302           acc0 += (q63_t) x1 *c0;
00303           /* acc1 +=  x[2] * y[srcBLen - 2] */
00304           acc1 += (q63_t) x2 *c0;
00305           /* acc2 +=  x[3] * y[srcBLen - 2] */
00306           acc2 += (q63_t) x3 *c0;
00307           /* acc3 +=  x[4] * y[srcBLen - 2] */
00308           acc3 += (q63_t) x0 *c0;
00309
00310           /* Read y[srcBLen - 3] sample */
00311           c0 = *(py--);
00312
00313           /* Read x[5] sample */
00314           x1 = *(px++);
00315
00316           /* Perform the multiply-accumulates */
00317           /* acc0 +=  x[2] * y[srcBLen - 3] */
00318           acc0 += (q63_t) x2 *c0;
00319           /* acc1 +=  x[3] * y[srcBLen - 2] */
00320           acc1 += (q63_t) x3 *c0;
00321           /* acc2 +=  x[4] * y[srcBLen - 2] */
00322           acc2 += (q63_t) x0 *c0;
00323           /* acc3 +=  x[5] * y[srcBLen - 2] */
00324           acc3 += (q63_t) x1 *c0;
00325
00326           /* Read y[srcBLen - 4] sample */
00327           c0 = *(py--);
00328
00329           /* Read x[6] sample */
00330           x2 = *(px++);
00331
00332           /* Perform the multiply-accumulates */
00333           /* acc0 +=  x[3] * y[srcBLen - 4] */
00334           acc0 += (q63_t) x3 *c0;
00335           /* acc1 +=  x[4] * y[srcBLen - 4] */
00336           acc1 += (q63_t) x0 *c0;
00337           /* acc2 +=  x[5] * y[srcBLen - 4] */
00338           acc2 += (q63_t) x1 *c0;
00339           /* acc3 +=  x[6] * y[srcBLen - 4] */
00340           acc3 += (q63_t) x2 *c0;
00341
00342         } while(--k);
00343
00344         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00345          ** No loop unrolling is used. */
00346         k = srcBLen % 0x4u;
00347
00348         while(k > 0u)
00349         {
00350           /* Read y[srcBLen - 5] sample */
00351           c0 = *(py--);
00352
00353           /* Read x[7] sample */
00354           x3 = *(px++);
00355
00356           /* Perform the multiply-accumulates */
00357           /* acc0 +=  x[4] * y[srcBLen - 5] */
00358           acc0 += (q63_t) x0 *c0;
00359           /* acc1 +=  x[5] * y[srcBLen - 5] */
00360           acc1 += (q63_t) x1 *c0;
00361           /* acc2 +=  x[6] * y[srcBLen - 5] */
00362           acc2 += (q63_t) x2 *c0;
00363           /* acc3 +=  x[7] * y[srcBLen - 5] */
00364           acc3 += (q63_t) x3 *c0;
00365
00366           /* Reuse the present samples for the next MAC */
00367           x0 = x1;
00368           x1 = x2;
00369           x2 = x3;
00370
00371           /* Decrement the loop counter */
00372           k--;
00373         }
00374
00375         /* Store the result in the accumulator in the destination buffer. */
00376         *pOut++ = (q31_t) (acc0 >> 31);
00377         *pOut++ = (q31_t) (acc1 >> 31);
00378         *pOut++ = (q31_t) (acc2 >> 31);
00379         *pOut++ = (q31_t) (acc3 >> 31);
00380
00381         /* Update the inputA and inputB pointers for next MAC calculation */
00382         px = pIn1 + (count * 4u);
00383         py = pSrc2;
00384
00385         /* Increment the pointer pIn1 index, count by 1 */
00386         count++;
00387
00388         /* Decrement the loop counter */
00389         blkCnt--;
00390       }
00391
00392       /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00393        ** No loop unrolling is used. */
00394       blkCnt = (uint32_t) blockSize2 % 0x4u;
00395
00396       while(blkCnt > 0u)
00397       {
00398         /* Accumulator is made zero for every iteration */
00399         sum = 0;
00400
00401         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00402         k = srcBLen >> 2u;
00403
00404         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00405          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00406         while(k > 0u)
00407         {
00408           /* Perform the multiply-accumulates */
00409           sum += (q63_t) * px++ * (*py--);
00410           sum += (q63_t) * px++ * (*py--);
00411           sum += (q63_t) * px++ * (*py--);
00412           sum += (q63_t) * px++ * (*py--);
00413
00414           /* Decrement the loop counter */
00415           k--;
00416         }
00417
00418         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00419          ** No loop unrolling is used. */
00420         k = srcBLen % 0x4u;
00421
00422         while(k > 0u)
00423         {
00424           /* Perform the multiply-accumulate */
00425           sum += (q63_t) * px++ * (*py--);
00426
00427           /* Decrement the loop counter */
00428           k--;
00429         }
00430
00431         /* Store the result in the accumulator in the destination buffer. */
00432         *pOut++ = (q31_t) (sum >> 31);
00433
00434         /* Update the inputA and inputB pointers for next MAC calculation */
00435         px = pIn1 + count;
00436         py = pSrc2;
00437
00438         /* Increment the MAC count */
00439         count++;
00440
00441         /* Decrement the loop counter */
00442         blkCnt--;
00443       }
00444     }
00445     else
00446     {
00447       /* If the srcBLen is not a multiple of 4,
00448        * the blockSize2 loop cannot be unrolled by 4 */
00449       blkCnt = (uint32_t) blockSize2;
00450
00451       while(blkCnt > 0u)
00452       {
00453         /* Accumulator is made zero for every iteration */
00454         sum = 0;
00455
00456         /* srcBLen number of MACS should be performed */
00457         k = srcBLen;
00458
00459         while(k > 0u)
00460         {
00461           /* Perform the multiply-accumulate */
00462           sum += (q63_t) * px++ * (*py--);
00463
00464           /* Decrement the loop counter */
00465           k--;
00466         }
00467
00468         /* Store the result in the accumulator in the destination buffer. */
00469         *pOut++ = (q31_t) (sum >> 31);
00470
00471         /* Update the inputA and inputB pointers for next MAC calculation */
00472         px = pIn1 + count;
00473         py = pSrc2;
00474
00475         /* Increment the MAC count */
00476         count++;
00477
00478         /* Decrement the loop counter */
00479         blkCnt--;
00480       }
00481     }
00482
00483
00484     /* --------------------------
00485      * Initializations of stage3
00486      * -------------------------*/
00487
00488     /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00489      * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00490      * ....
00491      * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00492      * sum +=  x[srcALen-1] * y[srcBLen-1]
00493      */
00494
00495     /* In this stage the MAC operations are decreased by 1 for every iteration.
00496        The blockSize3 variable holds the number of MAC operations performed */
00497     count = srcBLen - 1u;
00498
00499     /* Working pointer of inputA */
00500     pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00501     px = pSrc1;
00502
00503     /* Working pointer of inputB */
00504     pSrc2 = pIn2 + (srcBLen - 1u);
00505     py = pSrc2;
00506
00507     /* -------------------
00508      * Stage3 process
00509      * ------------------*/
00510
00511     while(blockSize3 > 0)
00512     {
00513       /* Accumulator is made zero for every iteration */
00514       sum = 0;
00515
00516       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00517       k = count >> 2u;
00518
00519       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00520        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00521       while(k > 0u)
00522       {
00523         sum += (q63_t) * px++ * (*py--);
00524         sum += (q63_t) * px++ * (*py--);
00525         sum += (q63_t) * px++ * (*py--);
00526         sum += (q63_t) * px++ * (*py--);
00527
00528         /* Decrement the loop counter */
00529         k--;
00530       }
00531
00532       /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
00533        ** No loop unrolling is used. */
00534       k = count % 0x4u;
00535
00536       while(k > 0u)
00537       {
00538         /* Perform the multiply-accumulate */
00539         sum += (q63_t) * px++ * (*py--);
00540
00541         /* Decrement the loop counter */
00542         k--;
00543       }
00544
00545       /* Store the result in the accumulator in the destination buffer. */
00546       *pOut++ = (q31_t) (sum >> 31);
00547
00548       /* Update the inputA and inputB pointers for next MAC calculation */
00549       px = ++pSrc1;
00550       py = pSrc2;
00551
00552       /* Decrement the MAC count */
00553       count--;
00554
00555       /* Decrement the loop counter */
00556       blockSize3--;
00557
00558     }
00559
00560     /* set status as ARM_MATH_SUCCESS */
00561     status = ARM_MATH_SUCCESS;
00562   }
00563
00564   /* Return to application */
00565   return (status);
00566
00567 #else
00568
00569   /* Run the below code for Cortex-M0 */
00570
00571   q31_t *pIn1 = pSrcA;                           /* inputA pointer */
00572   q31_t *pIn2 = pSrcB;                           /* inputB pointer */
00573   q63_t sum;                                     /* Accumulator */
00574   uint32_t i, j;                                 /* loop counters */
00575   arm_status status;                             /* status of Partial convolution */
00576
00577   /* Check for range of output samples to be calculated */
00578   if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
00579   {
00580     /* Set status as ARM_ARGUMENT_ERROR */
00581     status = ARM_MATH_ARGUMENT_ERROR;
00582   }
00583   else
00584   {
00585     /* Loop to calculate convolution for output length number of values */
00586     for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
00587     {
00588       /* Initialize sum with zero to carry on MAC operations */
00589       sum = 0;
00590
00591       /* Loop to perform MAC operations according to convolution equation */
00592       for (j = 0; j <= i; j++)
00593       {
00594         /* Check the array limitations */
00595         if(((i - j) < srcBLen) && (j < srcALen))
00596         {
00597           /* z[i] += x[i-j] * y[j] */
00598           sum += ((q63_t) pIn1[j] * (pIn2[i - j]));
00599         }
00600       }
00601
00602       /* Store the output in the destination buffer */
00603       pDst[i] = (q31_t) (sum >> 31u);
00604     }
00605     /* set status as ARM_SUCCESS as there are no argument errors */
00606     status = ARM_MATH_SUCCESS;
00607   }
00608   return (status);
00609
00610 #endif /*    #ifndef ARM_MATH_CM0      */
00611
00612 }
00613
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CMSIS DSP Software Library: arm_conv_q7.c File Reference

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arm_conv_q7.c File Reference

#include "arm_math.h"

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Functions

void arm_conv_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst)
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CMSIS DSP Software Library: arm_conv_q7.c Source File

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arm_conv_q7.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_conv_q7.c
00009 *
00010 * Description:  Convolution of Q7 sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00065 void arm_conv_q7(
00066   q7_t * pSrcA,
00067   uint32_t srcALen,
00068   q7_t * pSrcB,
00069   uint32_t srcBLen,
00070   q7_t * pDst)
00071 {
00072
00073
00074 #ifndef ARM_MATH_CM0
00075
00076   /* Run the below code for Cortex-M4 and Cortex-M3 */
00077
00078   q7_t *pIn1;                                    /* inputA pointer */
00079   q7_t *pIn2;                                    /* inputB pointer */
00080   q7_t *pOut = pDst;                             /* output pointer */
00081   q7_t *px;                                      /* Intermediate inputA pointer */
00082   q7_t *py;                                      /* Intermediate inputB pointer */
00083   q7_t *pSrc1, *pSrc2;                           /* Intermediate pointers */
00084   q7_t x0, x1, x2, x3, c0, c1;                   /* Temporary variables to hold state and coefficient values */
00085   q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
00086   q31_t input1, input2;                          /* Temporary input variables */
00087   q15_t in1, in2;                                /* Temporary input variables */
00088   uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counter */
00089
00090
00091   /* The algorithm implementation is based on the lengths of the inputs. */
00092   /* srcB is always made to slide across srcA. */
00093   /* So srcBLen is always considered as shorter or equal to srcALen */
00094   if(srcALen >= srcBLen)
00095   {
00096     /* Initialization of inputA pointer */
00097     pIn1 = pSrcA;
00098
00099     /* Initialization of inputB pointer */
00100     pIn2 = pSrcB;
00101   }
00102   else
00103   {
00104     /* Initialization of inputA pointer */
00105     pIn1 = pSrcB;
00106
00107     /* Initialization of inputB pointer */
00108     pIn2 = pSrcA;
00109
00110     /* srcBLen is always considered as shorter or equal to srcALen */
00111     j = srcBLen;
00112     srcBLen = srcALen;
00113     srcALen = j;
00114   }
00115
00116   /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00117   /* The function is internally
00118    * divided into three stages according to the number of multiplications that has to be
00119    * taken place between inputA samples and inputB samples. In the first stage of the
00120    * algorithm, the multiplications increase by one for every iteration.
00121    * In the second stage of the algorithm, srcBLen number of multiplications are done.
00122    * In the third stage of the algorithm, the multiplications decrease by one
00123    * for every iteration. */
00124
00125   /* The algorithm is implemented in three stages.
00126      The loop counters of each stage is initiated here. */
00127   blockSize1 = srcBLen - 1u;
00128   blockSize2 = (srcALen - srcBLen) + 1u;
00129   blockSize3 = blockSize1;
00130
00131   /* --------------------------
00132    * Initializations of stage1
00133    * -------------------------*/
00134
00135   /* sum = x[0] * y[0]
00136    * sum = x[0] * y[1] + x[1] * y[0]
00137    * ....
00138    * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00139    */
00140
00141   /* In this stage the MAC operations are increased by 1 for every iteration.
00142      The count variable holds the number of MAC operations performed */
00143   count = 1u;
00144
00145   /* Working pointer of inputA */
00146   px = pIn1;
00147
00148   /* Working pointer of inputB */
00149   py = pIn2;
00150
00151
00152   /* ------------------------
00153    * Stage1 process
00154    * ----------------------*/
00155
00156   /* The first stage starts here */
00157   while(blockSize1 > 0u)
00158   {
00159     /* Accumulator is made zero for every iteration */
00160     sum = 0;
00161
00162     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00163     k = count >> 2u;
00164
00165     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00166      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00167     while(k > 0u)
00168     {
00169       /* x[0] , x[1] */
00170       in1 = (q15_t) * px++;
00171       in2 = (q15_t) * px++;
00172       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00173
00174       /* y[srcBLen - 1] , y[srcBLen - 2] */
00175       in1 = (q15_t) * py--;
00176       in2 = (q15_t) * py--;
00177       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00178
00179       /* x[0] * y[srcBLen - 1] */
00180       /* x[1] * y[srcBLen - 2] */
00181       sum = __SMLAD(input1, input2, sum);
00182
00183       /* x[2] , x[3] */
00184       in1 = (q15_t) * px++;
00185       in2 = (q15_t) * px++;
00186       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00187
00188       /* y[srcBLen - 3] , y[srcBLen - 4] */
00189       in1 = (q15_t) * py--;
00190       in2 = (q15_t) * py--;
00191       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00192
00193       /* x[2] * y[srcBLen - 3] */
00194       /* x[3] * y[srcBLen - 4] */
00195       sum = __SMLAD(input1, input2, sum);
00196
00197       /* Decrement the loop counter */
00198       k--;
00199     }
00200
00201     /* If the count is not a multiple of 4, compute any remaining MACs here.
00202      ** No loop unrolling is used. */
00203     k = count % 0x4u;
00204
00205     while(k > 0u)
00206     {
00207       /* Perform the multiply-accumulates */
00208       sum += ((q15_t) * px++ * *py--);
00209
00210       /* Decrement the loop counter */
00211       k--;
00212     }
00213
00214     /* Store the result in the accumulator in the destination buffer. */
00215     *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8));
00216
00217     /* Update the inputA and inputB pointers for next MAC calculation */
00218     py = pIn2 + count;
00219     px = pIn1;
00220
00221     /* Increment the MAC count */
00222     count++;
00223
00224     /* Decrement the loop counter */
00225     blockSize1--;
00226   }
00227
00228   /* --------------------------
00229    * Initializations of stage2
00230    * ------------------------*/
00231
00232   /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00233    * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00234    * ....
00235    * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00236    */
00237
00238   /* Working pointer of inputA */
00239   px = pIn1;
00240
00241   /* Working pointer of inputB */
00242   pSrc2 = pIn2 + (srcBLen - 1u);
00243   py = pSrc2;
00244
00245   /* count is index by which the pointer pIn1 to be incremented */
00246   count = 1u;
00247
00248   /* -------------------
00249    * Stage2 process
00250    * ------------------*/
00251
00252   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00253    * So, to loop unroll over blockSize2,
00254    * srcBLen should be greater than or equal to 4 */
00255   if(srcBLen >= 4u)
00256   {
00257     /* Loop unroll over blockSize2, by 4 */
00258     blkCnt = blockSize2 >> 2u;
00259
00260     while(blkCnt > 0u)
00261     {
00262       /* Set all accumulators to zero */
00263       acc0 = 0;
00264       acc1 = 0;
00265       acc2 = 0;
00266       acc3 = 0;
00267
00268       /* read x[0], x[1], x[2] samples */
00269       x0 = *(px++);
00270       x1 = *(px++);
00271       x2 = *(px++);
00272
00273       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00274       k = srcBLen >> 2u;
00275
00276       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00277        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00278       do
00279       {
00280         /* Read y[srcBLen - 1] sample */
00281         c0 = *(py--);
00282         /* Read y[srcBLen - 2] sample */
00283         c1 = *(py--);
00284
00285         /* Read x[3] sample */
00286         x3 = *(px++);
00287
00288         /* x[0] and x[1] are packed */
00289         in1 = (q15_t) x0;
00290         in2 = (q15_t) x1;
00291
00292         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00293
00294         /* y[srcBLen - 1]   and y[srcBLen - 2] are packed */
00295         in1 = (q15_t) c0;
00296         in2 = (q15_t) c1;
00297
00298         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00299
00300         /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2]  */
00301         acc0 = __SMLAD(input1, input2, acc0);
00302
00303         /* x[1] and x[2] are packed */
00304         in1 = (q15_t) x1;
00305         in2 = (q15_t) x2;
00306
00307         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00308
00309         /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2]  */
00310         acc1 = __SMLAD(input1, input2, acc1);
00311
00312         /* x[2] and x[3] are packed */
00313         in1 = (q15_t) x2;
00314         in2 = (q15_t) x3;
00315
00316         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00317
00318         /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2]  */
00319         acc2 = __SMLAD(input1, input2, acc2);
00320
00321         /* Read x[4] sample */
00322         x0 = *(px++);
00323
00324         /* x[3] and x[4] are packed */
00325         in1 = (q15_t) x3;
00326         in2 = (q15_t) x0;
00327
00328         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00329
00330         /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2]  */
00331         acc3 = __SMLAD(input1, input2, acc3);
00332
00333         /* Read y[srcBLen - 3] sample */
00334         c0 = *(py--);
00335         /* Read y[srcBLen - 4] sample */
00336         c1 = *(py--);
00337
00338         /* Read x[5] sample */
00339         x1 = *(px++);
00340
00341         /* x[2] and x[3] are packed */
00342         in1 = (q15_t) x2;
00343         in2 = (q15_t) x3;
00344
00345         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00346
00347         /* y[srcBLen - 3] and y[srcBLen - 4] are packed */
00348         in1 = (q15_t) c0;
00349         in2 = (q15_t) c1;
00350
00351         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00352
00353         /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4]  */
00354         acc0 = __SMLAD(input1, input2, acc0);
00355
00356         /* x[3] and x[4] are packed */
00357         in1 = (q15_t) x3;
00358         in2 = (q15_t) x0;
00359
00360         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00361
00362         /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4]  */
00363         acc1 = __SMLAD(input1, input2, acc1);
00364
00365         /* x[4] and x[5] are packed */
00366         in1 = (q15_t) x0;
00367         in2 = (q15_t) x1;
00368
00369         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00370
00371         /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4]  */
00372         acc2 = __SMLAD(input1, input2, acc2);
00373
00374         /* Read x[6] sample */
00375         x2 = *(px++);
00376
00377         /* x[5] and x[6] are packed */
00378         in1 = (q15_t) x1;
00379         in2 = (q15_t) x2;
00380
00381         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00382
00383         /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4]  */
00384         acc3 = __SMLAD(input1, input2, acc3);
00385
00386       } while(--k);
00387
00388       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00389        ** No loop unrolling is used. */
00390       k = srcBLen % 0x4u;
00391
00392       while(k > 0u)
00393       {
00394         /* Read y[srcBLen - 5] sample */
00395         c0 = *(py--);
00396
00397         /* Read x[7] sample */
00398         x3 = *(px++);
00399
00400         /* Perform the multiply-accumulates */
00401         /* acc0 +=  x[4] * y[srcBLen - 5] */
00402         acc0 += ((q15_t) x0 * c0);
00403         /* acc1 +=  x[5] * y[srcBLen - 5] */
00404         acc1 += ((q15_t) x1 * c0);
00405         /* acc2 +=  x[6] * y[srcBLen - 5] */
00406         acc2 += ((q15_t) x2 * c0);
00407         /* acc3 +=  x[7] * y[srcBLen - 5] */
00408         acc3 += ((q15_t) x3 * c0);
00409
00410         /* Reuse the present samples for the next MAC */
00411         x0 = x1;
00412         x1 = x2;
00413         x2 = x3;
00414
00415         /* Decrement the loop counter */
00416         k--;
00417       }
00418
00419
00420       /* Store the result in the accumulator in the destination buffer. */
00421       *pOut++ = (q7_t) (__SSAT(acc0 >> 7u, 8));
00422       *pOut++ = (q7_t) (__SSAT(acc1 >> 7u, 8));
00423       *pOut++ = (q7_t) (__SSAT(acc2 >> 7u, 8));
00424       *pOut++ = (q7_t) (__SSAT(acc3 >> 7u, 8));
00425
00426       /* Update the inputA and inputB pointers for next MAC calculation */
00427       px = pIn1 + (count * 4u);
00428       py = pSrc2;
00429
00430       /* Increment the pointer pIn1 index, count by 1 */
00431       count++;
00432
00433       /* Decrement the loop counter */
00434       blkCnt--;
00435     }
00436
00437     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00438      ** No loop unrolling is used. */
00439     blkCnt = blockSize2 % 0x4u;
00440
00441     while(blkCnt > 0u)
00442     {
00443       /* Accumulator is made zero for every iteration */
00444       sum = 0;
00445
00446       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00447       k = srcBLen >> 2u;
00448
00449       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00450        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00451       while(k > 0u)
00452       {
00453
00454         /* Reading two inputs of SrcA buffer and packing */
00455         in1 = (q15_t) * px++;
00456         in2 = (q15_t) * px++;
00457         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00458
00459         /* Reading two inputs of SrcB buffer and packing */
00460         in1 = (q15_t) * py--;
00461         in2 = (q15_t) * py--;
00462         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00463
00464         /* Perform the multiply-accumulates */
00465         sum = __SMLAD(input1, input2, sum);
00466
00467         /* Reading two inputs of SrcA buffer and packing */
00468         in1 = (q15_t) * px++;
00469         in2 = (q15_t) * px++;
00470         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00471
00472         /* Reading two inputs of SrcB buffer and packing */
00473         in1 = (q15_t) * py--;
00474         in2 = (q15_t) * py--;
00475         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00476
00477         /* Perform the multiply-accumulates */
00478         sum = __SMLAD(input1, input2, sum);
00479
00480         /* Decrement the loop counter */
00481         k--;
00482       }
00483
00484       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00485        ** No loop unrolling is used. */
00486       k = srcBLen % 0x4u;
00487
00488       while(k > 0u)
00489       {
00490         /* Perform the multiply-accumulates */
00491         sum += ((q15_t) * px++ * *py--);
00492
00493         /* Decrement the loop counter */
00494         k--;
00495       }
00496
00497       /* Store the result in the accumulator in the destination buffer. */
00498       *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8));
00499
00500       /* Update the inputA and inputB pointers for next MAC calculation */
00501       px = pIn1 + count;
00502       py = pSrc2;
00503
00504       /* Increment the pointer pIn1 index, count by 1 */
00505       count++;
00506
00507       /* Decrement the loop counter */
00508       blkCnt--;
00509     }
00510   }
00511   else
00512   {
00513     /* If the srcBLen is not a multiple of 4,
00514      * the blockSize2 loop cannot be unrolled by 4 */
00515     blkCnt = blockSize2;
00516
00517     while(blkCnt > 0u)
00518     {
00519       /* Accumulator is made zero for every iteration */
00520       sum = 0;
00521
00522       /* srcBLen number of MACS should be performed */
00523       k = srcBLen;
00524
00525       while(k > 0u)
00526       {
00527         /* Perform the multiply-accumulate */
00528         sum += ((q15_t) * px++ * *py--);
00529
00530         /* Decrement the loop counter */
00531         k--;
00532       }
00533
00534       /* Store the result in the accumulator in the destination buffer. */
00535       *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8));
00536
00537       /* Update the inputA and inputB pointers for next MAC calculation */
00538       px = pIn1 + count;
00539       py = pSrc2;
00540
00541       /* Increment the MAC count */
00542       count++;
00543
00544       /* Decrement the loop counter */
00545       blkCnt--;
00546     }
00547   }
00548
00549
00550   /* --------------------------
00551    * Initializations of stage3
00552    * -------------------------*/
00553
00554   /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00555    * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00556    * ....
00557    * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00558    * sum +=  x[srcALen-1] * y[srcBLen-1]
00559    */
00560
00561   /* In this stage the MAC operations are decreased by 1 for every iteration.
00562      The blockSize3 variable holds the number of MAC operations performed */
00563
00564   /* Working pointer of inputA */
00565   pSrc1 = pIn1 + (srcALen - (srcBLen - 1u));
00566   px = pSrc1;
00567
00568   /* Working pointer of inputB */
00569   pSrc2 = pIn2 + (srcBLen - 1u);
00570   py = pSrc2;
00571
00572   /* -------------------
00573    * Stage3 process
00574    * ------------------*/
00575
00576   while(blockSize3 > 0u)
00577   {
00578     /* Accumulator is made zero for every iteration */
00579     sum = 0;
00580
00581     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00582     k = blockSize3 >> 2u;
00583
00584     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00585      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00586     while(k > 0u)
00587     {
00588       /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */
00589       in1 = (q15_t) * px++;
00590       in2 = (q15_t) * px++;
00591       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00592
00593       /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */
00594       in1 = (q15_t) * py--;
00595       in2 = (q15_t) * py--;
00596       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00597
00598       /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
00599       /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
00600       sum = __SMLAD(input1, input2, sum);
00601
00602       /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */
00603       in1 = (q15_t) * px++;
00604       in2 = (q15_t) * px++;
00605       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00606
00607       /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */
00608       in1 = (q15_t) * py--;
00609       in2 = (q15_t) * py--;
00610       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
00611
00612       /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
00613       /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
00614       sum = __SMLAD(input1, input2, sum);
00615
00616       /* Decrement the loop counter */
00617       k--;
00618     }
00619
00620     /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
00621      ** No loop unrolling is used. */
00622     k = blockSize3 % 0x4u;
00623
00624     while(k > 0u)
00625     {
00626       /* Perform the multiply-accumulates */
00627       sum += ((q15_t) * px++ * *py--);
00628
00629       /* Decrement the loop counter */
00630       k--;
00631     }
00632
00633     /* Store the result in the accumulator in the destination buffer. */
00634     *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8));
00635
00636     /* Update the inputA and inputB pointers for next MAC calculation */
00637     px = ++pSrc1;
00638     py = pSrc2;
00639
00640     /* Decrement the loop counter */
00641     blockSize3--;
00642   }
00643
00644 #else
00645
00646   /* Run the below code for Cortex-M0 */
00647
00648   q7_t *pIn1 = pSrcA;                            /* input pointer */
00649   q7_t *pIn2 = pSrcB;                            /* coefficient pointer */
00650   q31_t sum;                                     /* Accumulator */
00651   uint32_t i, j;                                 /* loop counter */
00652
00653   /* Loop to calculate output of convolution for output length number of times */
00654   for (i = 0; i < (srcALen + srcBLen - 1); i++)
00655   {
00656     /* Initialize sum with zero to carry on MAC operations */
00657     sum = 0;
00658
00659     /* Loop to perform MAC operations according to convolution equation */
00660     for (j = 0; j <= i; j++)
00661     {
00662       /* Check the array limitations */
00663       if(((i - j) < srcBLen) && (j < srcALen))
00664       {
00665         /* z[i] += x[i-j] * y[j] */
00666         sum += (q15_t) pIn1[j] * (pIn2[i - j]);
00667       }
00668     }
00669
00670     /* Store the output in the destination buffer */
00671     pDst[i] = (q7_t) __SSAT((sum >> 7u), 8u);
00672   }
00673
00674 #endif /*   #ifndef ARM_MATH_CM0        */
00675
00676 }
00677
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CMSIS DSP Software Library: arm_conv_q15.c File Reference

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arm_conv_q15.c File Reference

#include "arm_math.h"

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Functions

void arm_conv_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
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CMSIS DSP Software Library: arm_conv_q15.c Source File

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arm_conv_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_conv_q15.c
00009 *
00010 * Description:  Convolution of Q15 sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00068 void arm_conv_q15(
00069   q15_t * pSrcA,
00070   uint32_t srcALen,
00071   q15_t * pSrcB,
00072   uint32_t srcBLen,
00073   q15_t * pDst)
00074 {
00075
00076 #ifndef ARM_MATH_CM0
00077
00078   /* Run the below code for Cortex-M4 and Cortex-M3 */
00079
00080   q15_t *pIn1;                                   /* inputA pointer */
00081   q15_t *pIn2;                                   /* inputB pointer */
00082   q15_t *pOut = pDst;                            /* output pointer */
00083   q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
00084   q15_t *px;                                     /* Intermediate inputA pointer  */
00085   q15_t *py;                                     /* Intermediate inputB pointer  */
00086   q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
00087   q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
00088   uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt;     /* loop counter */
00089   q31_t *pb;                                     /* 32 bit pointer for inputB buffer */
00090
00091
00092   /* The algorithm implementation is based on the lengths of the inputs. */
00093   /* srcB is always made to slide across srcA. */
00094   /* So srcBLen is always considered as shorter or equal to srcALen */
00095   if(srcALen >= srcBLen)
00096   {
00097     /* Initialization of inputA pointer */
00098     pIn1 = pSrcA;
00099
00100     /* Initialization of inputB pointer */
00101     pIn2 = pSrcB;
00102   }
00103   else
00104   {
00105     /* Initialization of inputA pointer */
00106     pIn1 = pSrcB;
00107
00108     /* Initialization of inputB pointer */
00109     pIn2 = pSrcA;
00110
00111     /* srcBLen is always considered as shorter or equal to srcALen */
00112     j = srcBLen;
00113     srcBLen = srcALen;
00114     srcALen = j;
00115   }
00116
00117   /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00118   /* The function is internally
00119    * divided into three stages according to the number of multiplications that has to be
00120    * taken place between inputA samples and inputB samples. In the first stage of the
00121    * algorithm, the multiplications increase by one for every iteration.
00122    * In the second stage of the algorithm, srcBLen number of multiplications are done.
00123    * In the third stage of the algorithm, the multiplications decrease by one
00124    * for every iteration. */
00125
00126   /* The algorithm is implemented in three stages.
00127      The loop counters of each stage is initiated here. */
00128   blockSize1 = srcBLen - 1u;
00129   blockSize2 = srcALen - (srcBLen - 1u);
00130
00131   /* --------------------------
00132    * Initializations of stage1
00133    * -------------------------*/
00134
00135   /* sum = x[0] * y[0]
00136    * sum = x[0] * y[1] + x[1] * y[0]
00137    * ....
00138    * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00139    */
00140
00141   /* In this stage the MAC operations are increased by 1 for every iteration.
00142      The count variable holds the number of MAC operations performed */
00143   count = 1u;
00144
00145   /* Working pointer of inputA */
00146   px = pIn1;
00147
00148   /* Working pointer of inputB */
00149   py = pIn2;
00150
00151
00152   /* ------------------------
00153    * Stage1 process
00154    * ----------------------*/
00155
00156   /* For loop unrolling by 4, this stage is divided into two. */
00157   /* First part of this stage computes the MAC operations less than 4 */
00158   /* Second part of this stage computes the MAC operations greater than or equal to 4 */
00159
00160   /* The first part of the stage starts here */
00161   while((count < 4u) && (blockSize1 > 0u))
00162   {
00163     /* Accumulator is made zero for every iteration */
00164     sum = 0;
00165
00166     /* Loop over number of MAC operations between
00167      * inputA samples and inputB samples */
00168     k = count;
00169
00170     while(k > 0u)
00171     {
00172       /* Perform the multiply-accumulates */
00173       sum = __SMLALD(*px++, *py--, sum);
00174
00175       /* Decrement the loop counter */
00176       k--;
00177     }
00178
00179     /* Store the result in the accumulator in the destination buffer. */
00180     *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
00181
00182     /* Update the inputA and inputB pointers for next MAC calculation */
00183     py = pIn2 + count;
00184     px = pIn1;
00185
00186     /* Increment the MAC count */
00187     count++;
00188
00189     /* Decrement the loop counter */
00190     blockSize1--;
00191   }
00192
00193   /* The second part of the stage starts here */
00194   /* The internal loop, over count, is unrolled by 4 */
00195   /* To, read the last two inputB samples using SIMD:
00196    * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
00197   py = py - 1;
00198
00199   while(blockSize1 > 0u)
00200   {
00201     /* Accumulator is made zero for every iteration */
00202     sum = 0;
00203
00204     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00205     k = count >> 2u;
00206
00207     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00208      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00209     while(k > 0u)
00210     {
00211       /* Perform the multiply-accumulates */
00212       /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
00213       sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00214       /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
00215       sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00216
00217       /* Decrement the loop counter */
00218       k--;
00219     }
00220
00221     /* For the next MAC operations, the pointer py is used without SIMD
00222      * So, py is incremented by 1 */
00223     py = py + 1u;
00224
00225     /* If the count is not a multiple of 4, compute any remaining MACs here.
00226      ** No loop unrolling is used. */
00227     k = count % 0x4u;
00228
00229     while(k > 0u)
00230     {
00231       /* Perform the multiply-accumulates */
00232       sum = __SMLALD(*px++, *py--, sum);
00233
00234       /* Decrement the loop counter */
00235       k--;
00236     }
00237
00238     /* Store the result in the accumulator in the destination buffer. */
00239     *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
00240
00241     /* Update the inputA and inputB pointers for next MAC calculation */
00242     py = pIn2 + (count - 1u);
00243     px = pIn1;
00244
00245     /* Increment the MAC count */
00246     count++;
00247
00248     /* Decrement the loop counter */
00249     blockSize1--;
00250   }
00251
00252   /* --------------------------
00253    * Initializations of stage2
00254    * ------------------------*/
00255
00256   /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00257    * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00258    * ....
00259    * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00260    */
00261
00262   /* Working pointer of inputA */
00263   px = pIn1;
00264
00265   /* Working pointer of inputB */
00266   pSrc2 = pIn2 + (srcBLen - 1u);
00267   py = pSrc2;
00268
00269   /* Initialize inputB pointer of type q31 */
00270   pb = (q31_t *) (py - 1u);
00271
00272   /* count is the index by which the pointer pIn1 to be incremented */
00273   count = 1u;
00274
00275
00276   /* --------------------
00277    * Stage2 process
00278    * -------------------*/
00279
00280   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00281    * So, to loop unroll over blockSize2,
00282    * srcBLen should be greater than or equal to 4 */
00283   if(srcBLen >= 4u)
00284   {
00285     /* Loop unroll over blockSize2, by 4 */
00286     blkCnt = blockSize2 >> 2u;
00287
00288     while(blkCnt > 0u)
00289     {
00290       /* Set all accumulators to zero */
00291       acc0 = 0;
00292       acc1 = 0;
00293       acc2 = 0;
00294       acc3 = 0;
00295
00296
00297       /* read x[0], x[1] samples */
00298       x0 = *(q31_t *) (px++);
00299       /* read x[1], x[2] samples */
00300       x1 = *(q31_t *) (px++);
00301
00302
00303       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00304       k = srcBLen >> 2u;
00305
00306       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00307        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00308       do
00309       {
00310         /* Read the last two inputB samples using SIMD:
00311          * y[srcBLen - 1] and y[srcBLen - 2] */
00312         c0 = *(pb--);
00313
00314         /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
00315         acc0 = __SMLALDX(x0, c0, acc0);
00316
00317         /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
00318         acc1 = __SMLALDX(x1, c0, acc1);
00319
00320         /* Read x[2], x[3] */
00321         x2 = *(q31_t *) (px++);
00322
00323         /* Read x[3], x[4] */
00324         x3 = *(q31_t *) (px++);
00325
00326         /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
00327         acc2 = __SMLALDX(x2, c0, acc2);
00328
00329         /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
00330         acc3 = __SMLALDX(x3, c0, acc3);
00331
00332         /* Read y[srcBLen - 3] and y[srcBLen - 4] */
00333         c0 = *(pb--);
00334
00335         /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
00336         acc0 = __SMLALDX(x2, c0, acc0);
00337
00338         /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
00339         acc1 = __SMLALDX(x3, c0, acc1);
00340
00341         /* Read x[4], x[5] */
00342         x0 = *(q31_t *) (px++);
00343
00344         /* Read x[5], x[6] */
00345         x1 = *(q31_t *) (px++);
00346
00347         /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
00348         acc2 = __SMLALDX(x0, c0, acc2);
00349
00350         /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
00351         acc3 = __SMLALDX(x1, c0, acc3);
00352
00353       } while(--k);
00354
00355       /* For the next MAC operations, SIMD is not used
00356        * So, the 16 bit pointer if inputB, py is updated */
00357       py = (q15_t *) pb;
00358       py = py + 1;
00359
00360       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00361        ** No loop unrolling is used. */
00362       k = srcBLen % 0x4u;
00363
00364       if(k == 1u)
00365       {
00366         /* Read y[srcBLen - 5] */
00367         c0 = *(py);
00368
00369 #ifdef  ARM_MATH_BIG_ENDIAN
00370
00371         c0 = c0 << 16u;
00372
00373 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00374
00375         /* Read x[7] */
00376         x3 = *(q31_t *) px++;
00377
00378         /* Perform the multiply-accumulates */
00379         acc0 = __SMLALD(x0, c0, acc0);
00380         acc1 = __SMLALD(x1, c0, acc1);
00381         acc2 = __SMLALDX(x1, c0, acc2);
00382         acc3 = __SMLALDX(x3, c0, acc3);
00383       }
00384
00385       if(k == 2u)
00386       {
00387         /* Read y[srcBLen - 5], y[srcBLen - 6] */
00388         c0 = *(pb);
00389
00390         /* Read x[7], x[8] */
00391         x3 = *(q31_t *) px++;
00392
00393         /* Read x[9] */
00394         x2 = *(q31_t *) px++;
00395
00396         /* Perform the multiply-accumulates */
00397         acc0 = __SMLALDX(x0, c0, acc0);
00398         acc1 = __SMLALDX(x1, c0, acc1);
00399         acc2 = __SMLALDX(x3, c0, acc2);
00400         acc3 = __SMLALDX(x2, c0, acc3);
00401       }
00402
00403       if(k == 3u)
00404       {
00405         /* Read y[srcBLen - 5], y[srcBLen - 6] */
00406         c0 = *pb--;
00407
00408         /* Read x[7], x[8] */
00409         x3 = *(q31_t *) px++;
00410
00411         /* Read x[9] */
00412         x2 = *(q31_t *) px++;
00413
00414         /* Perform the multiply-accumulates */
00415         acc0 = __SMLALDX(x0, c0, acc0);
00416         acc1 = __SMLALDX(x1, c0, acc1);
00417         acc2 = __SMLALDX(x3, c0, acc2);
00418         acc3 = __SMLALDX(x2, c0, acc3);
00419
00420 #ifdef  ARM_MATH_BIG_ENDIAN
00421
00422         /* Read y[srcBLen - 7] */
00423         c0 = (*pb);
00424
00425         //c0 = (c0 & 0x0000FFFF)<<16;
00426         c0 = (c0) << 16;
00427
00428 #else
00429
00430         /* Read y[srcBLen - 7] */
00431         c0 = (q15_t) (*pb >> 16);
00432
00433 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00434
00435         /* Read x[10] */
00436         x3 = *(q31_t *) px++;
00437
00438         /* Perform the multiply-accumulates */
00439         acc0 = __SMLALDX(x1, c0, acc0);
00440         acc1 = __SMLALD(x2, c0, acc1);
00441         acc2 = __SMLALDX(x2, c0, acc2);
00442         acc3 = __SMLALDX(x3, c0, acc3);
00443       }
00444
00445
00446       /* Store the results in the accumulators in the destination buffer. */
00447
00448 #ifndef  ARM_MATH_BIG_ENDIAN
00449
00450       *__SIMD32(pOut)++ =
00451         __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
00452       *__SIMD32(pOut)++ =
00453         __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
00454
00455 #else
00456
00457       *__SIMD32(pOut)++ =
00458         __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
00459       *__SIMD32(pOut)++ =
00460         __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
00461
00462 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00463
00464       /* Update the inputA and inputB pointers for next MAC calculation */
00465       px = pIn1 + (count * 4u);
00466       py = pSrc2;
00467       pb = (q31_t *) (py - 1);
00468
00469       /* Increment the pointer pIn1 index, count by 1 */
00470       count++;
00471
00472       /* Decrement the loop counter */
00473       blkCnt--;
00474     }
00475
00476     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00477      ** No loop unrolling is used. */
00478     blkCnt = blockSize2 % 0x4u;
00479
00480     while(blkCnt > 0u)
00481     {
00482       /* Accumulator is made zero for every iteration */
00483       sum = 0;
00484
00485       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00486       k = srcBLen >> 2u;
00487
00488       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00489        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00490       while(k > 0u)
00491       {
00492         /* Perform the multiply-accumulates */
00493         sum += (q63_t) ((q31_t) * px++ * *py--);
00494         sum += (q63_t) ((q31_t) * px++ * *py--);
00495         sum += (q63_t) ((q31_t) * px++ * *py--);
00496         sum += (q63_t) ((q31_t) * px++ * *py--);
00497
00498         /* Decrement the loop counter */
00499         k--;
00500       }
00501
00502       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00503        ** No loop unrolling is used. */
00504       k = srcBLen % 0x4u;
00505
00506       while(k > 0u)
00507       {
00508         /* Perform the multiply-accumulates */
00509         sum += (q63_t) ((q31_t) * px++ * *py--);
00510
00511         /* Decrement the loop counter */
00512         k--;
00513       }
00514
00515       /* Store the result in the accumulator in the destination buffer. */
00516       *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
00517
00518       /* Update the inputA and inputB pointers for next MAC calculation */
00519       px = pIn1 + count;
00520       py = pSrc2;
00521
00522       /* Increment the pointer pIn1 index, count by 1 */
00523       count++;
00524
00525       /* Decrement the loop counter */
00526       blkCnt--;
00527     }
00528   }
00529   else
00530   {
00531     /* If the srcBLen is not a multiple of 4,
00532      * the blockSize2 loop cannot be unrolled by 4 */
00533     blkCnt = blockSize2;
00534
00535     while(blkCnt > 0u)
00536     {
00537       /* Accumulator is made zero for every iteration */
00538       sum = 0;
00539
00540       /* srcBLen number of MACS should be performed */
00541       k = srcBLen;
00542
00543       while(k > 0u)
00544       {
00545         /* Perform the multiply-accumulate */
00546         sum += (q63_t) ((q31_t) * px++ * *py--);
00547
00548         /* Decrement the loop counter */
00549         k--;
00550       }
00551
00552       /* Store the result in the accumulator in the destination buffer. */
00553       *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
00554
00555       /* Update the inputA and inputB pointers for next MAC calculation */
00556       px = pIn1 + count;
00557       py = pSrc2;
00558
00559       /* Increment the MAC count */
00560       count++;
00561
00562       /* Decrement the loop counter */
00563       blkCnt--;
00564     }
00565   }
00566
00567
00568   /* --------------------------
00569    * Initializations of stage3
00570    * -------------------------*/
00571
00572   /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00573    * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00574    * ....
00575    * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00576    * sum +=  x[srcALen-1] * y[srcBLen-1]
00577    */
00578
00579   /* In this stage the MAC operations are decreased by 1 for every iteration.
00580      The blockSize3 variable holds the number of MAC operations performed */
00581
00582   blockSize3 = srcBLen - 1u;
00583
00584   /* Working pointer of inputA */
00585   pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00586   px = pSrc1;
00587
00588   /* Working pointer of inputB */
00589   pSrc2 = pIn2 + (srcBLen - 1u);
00590   pIn2 = pSrc2 - 1u;
00591   py = pIn2;
00592
00593   /* -------------------
00594    * Stage3 process
00595    * ------------------*/
00596
00597   /* For loop unrolling by 4, this stage is divided into two. */
00598   /* First part of this stage computes the MAC operations greater than 4 */
00599   /* Second part of this stage computes the MAC operations less than or equal to 4 */
00600
00601   /* The first part of the stage starts here */
00602   j = blockSize3 >> 2u;
00603
00604   while((j > 0u) && (blockSize3 > 0u))
00605   {
00606     /* Accumulator is made zero for every iteration */
00607     sum = 0;
00608
00609     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00610     k = blockSize3 >> 2u;
00611
00612     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00613      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00614     while(k > 0u)
00615     {
00616       /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
00617        * with y[srcBLen - 1], y[srcBLen - 2] respectively */
00618       sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00619       /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
00620        * with y[srcBLen - 3], y[srcBLen - 4] respectively */
00621       sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
00622
00623       /* Decrement the loop counter */
00624       k--;
00625     }
00626
00627     /* For the next MAC operations, the pointer py is used without SIMD
00628      * So, py is incremented by 1 */
00629     py = py + 1u;
00630
00631     /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
00632      ** No loop unrolling is used. */
00633     k = blockSize3 % 0x4u;
00634
00635     while(k > 0u)
00636     {
00637       /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
00638       sum = __SMLALD(*px++, *py--, sum);
00639
00640       /* Decrement the loop counter */
00641       k--;
00642     }
00643
00644     /* Store the result in the accumulator in the destination buffer. */
00645     *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
00646
00647     /* Update the inputA and inputB pointers for next MAC calculation */
00648     px = ++pSrc1;
00649     py = pIn2;
00650
00651     /* Decrement the loop counter */
00652     blockSize3--;
00653
00654     j--;
00655   }
00656
00657   /* The second part of the stage starts here */
00658   /* SIMD is not used for the next MAC operations,
00659    * so pointer py is updated to read only one sample at a time */
00660   py = py + 1u;
00661
00662   while(blockSize3 > 0u)
00663   {
00664     /* Accumulator is made zero for every iteration */
00665     sum = 0;
00666
00667     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00668     k = blockSize3;
00669
00670     while(k > 0u)
00671     {
00672       /* Perform the multiply-accumulates */
00673       /* sum +=  x[srcALen-1] * y[srcBLen-1] */
00674       sum = __SMLALD(*px++, *py--, sum);
00675
00676       /* Decrement the loop counter */
00677       k--;
00678     }
00679
00680     /* Store the result in the accumulator in the destination buffer. */
00681     *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
00682
00683     /* Update the inputA and inputB pointers for next MAC calculation */
00684     px = ++pSrc1;
00685     py = pSrc2;
00686
00687     /* Decrement the loop counter */
00688     blockSize3--;
00689   }
00690
00691 #else
00692
00693 /* Run the below code for Cortex-M0 */
00694
00695   q15_t *pIn1 = pSrcA;                           /* input pointer */
00696   q15_t *pIn2 = pSrcB;                           /* coefficient pointer */
00697   q63_t sum;                                     /* Accumulator */
00698   uint32_t i, j;                                 /* loop counter */
00699
00700   /* Loop to calculate output of convolution for output length number of times */
00701   for (i = 0; i < (srcALen + srcBLen - 1); i++)
00702   {
00703     /* Initialize sum with zero to carry on MAC operations */
00704     sum = 0;
00705
00706     /* Loop to perform MAC operations according to convolution equation */
00707     for (j = 0; j <= i; j++)
00708     {
00709       /* Check the array limitations */
00710       if(((i - j) < srcBLen) && (j < srcALen))
00711       {
00712         /* z[i] += x[i-j] * y[j] */
00713         sum += (q31_t) pIn1[j] * (pIn2[i - j]);
00714       }
00715     }
00716
00717     /* Store the output in the destination buffer */
00718     pDst[i] = (q15_t) __SSAT((sum >> 15u), 16u);
00719   }
00720
00721 #endif /*   #ifndef ARM_MATH_CM0 */
00722
00723 }
00724
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CMSIS DSP Software Library: arm_conv_q31.c File Reference

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arm_conv_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_conv_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
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CMSIS DSP Software Library: arm_conv_q31.c Source File

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arm_conv_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_conv_q31.c
00009 *
00010 * Description:  Convolution of Q31 sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00071 void arm_conv_q31(
00072   q31_t * pSrcA,
00073   uint32_t srcALen,
00074   q31_t * pSrcB,
00075   uint32_t srcBLen,
00076   q31_t * pDst)
00077 {
00078
00079
00080 #ifndef ARM_MATH_CM0
00081
00082   /* Run the below code for Cortex-M4 and Cortex-M3 */
00083
00084   q31_t *pIn1;                                   /* inputA pointer */
00085   q31_t *pIn2;                                   /* inputB pointer */
00086   q31_t *pOut = pDst;                            /* output pointer */
00087   q31_t *px;                                     /* Intermediate inputA pointer  */
00088   q31_t *py;                                     /* Intermediate inputB pointer  */
00089   q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
00090   q63_t sum;                                     /* Accumulator */
00091   q63_t acc0, acc1, acc2, acc3;                  /* Accumulator */
00092   q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
00093   uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counter */
00094
00095
00096   /* The algorithm implementation is based on the lengths of the inputs. */
00097   /* srcB is always made to slide across srcA. */
00098   /* So srcBLen is always considered as shorter or equal to srcALen */
00099   if(srcALen >= srcBLen)
00100   {
00101     /* Initialization of inputA pointer */
00102     pIn1 = pSrcA;
00103
00104     /* Initialization of inputB pointer */
00105     pIn2 = pSrcB;
00106   }
00107   else
00108   {
00109     /* Initialization of inputA pointer */
00110     pIn1 = (q31_t *) pSrcB;
00111
00112     /* Initialization of inputB pointer */
00113     pIn2 = (q31_t *) pSrcA;
00114
00115     /* srcBLen is always considered as shorter or equal to srcALen */
00116     j = srcBLen;
00117     srcBLen = srcALen;
00118     srcALen = j;
00119   }
00120
00121   /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
00122   /* The function is internally
00123    * divided into three stages according to the number of multiplications that has to be
00124    * taken place between inputA samples and inputB samples. In the first stage of the
00125    * algorithm, the multiplications increase by one for every iteration.
00126    * In the second stage of the algorithm, srcBLen number of multiplications are done.
00127    * In the third stage of the algorithm, the multiplications decrease by one
00128    * for every iteration. */
00129
00130   /* The algorithm is implemented in three stages.
00131      The loop counters of each stage is initiated here. */
00132   blockSize1 = srcBLen - 1u;
00133   blockSize2 = srcALen - (srcBLen - 1u);
00134   blockSize3 = blockSize1;
00135
00136   /* --------------------------
00137    * Initializations of stage1
00138    * -------------------------*/
00139
00140   /* sum = x[0] * y[0]
00141    * sum = x[0] * y[1] + x[1] * y[0]
00142    * ....
00143    * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
00144    */
00145
00146   /* In this stage the MAC operations are increased by 1 for every iteration.
00147      The count variable holds the number of MAC operations performed */
00148   count = 1u;
00149
00150   /* Working pointer of inputA */
00151   px = pIn1;
00152
00153   /* Working pointer of inputB */
00154   py = pIn2;
00155
00156
00157   /* ------------------------
00158    * Stage1 process
00159    * ----------------------*/
00160
00161   /* The first stage starts here */
00162   while(blockSize1 > 0u)
00163   {
00164     /* Accumulator is made zero for every iteration */
00165     sum = 0;
00166
00167     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00168     k = count >> 2u;
00169
00170     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00171      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00172     while(k > 0u)
00173     {
00174       /* x[0] * y[srcBLen - 1] */
00175       sum += (q63_t) * px++ * (*py--);
00176       /* x[1] * y[srcBLen - 2] */
00177       sum += (q63_t) * px++ * (*py--);
00178       /* x[2] * y[srcBLen - 3] */
00179       sum += (q63_t) * px++ * (*py--);
00180       /* x[3] * y[srcBLen - 4] */
00181       sum += (q63_t) * px++ * (*py--);
00182
00183       /* Decrement the loop counter */
00184       k--;
00185     }
00186
00187     /* If the count is not a multiple of 4, compute any remaining MACs here.
00188      ** No loop unrolling is used. */
00189     k = count % 0x4u;
00190
00191     while(k > 0u)
00192     {
00193       /* Perform the multiply-accumulate */
00194       sum += (q63_t) * px++ * (*py--);
00195
00196       /* Decrement the loop counter */
00197       k--;
00198     }
00199
00200     /* Store the result in the accumulator in the destination buffer. */
00201     *pOut++ = (q31_t) (sum >> 31);
00202
00203     /* Update the inputA and inputB pointers for next MAC calculation */
00204     py = pIn2 + count;
00205     px = pIn1;
00206
00207     /* Increment the MAC count */
00208     count++;
00209
00210     /* Decrement the loop counter */
00211     blockSize1--;
00212   }
00213
00214   /* --------------------------
00215    * Initializations of stage2
00216    * ------------------------*/
00217
00218   /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
00219    * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
00220    * ....
00221    * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
00222    */
00223
00224   /* Working pointer of inputA */
00225   px = pIn1;
00226
00227   /* Working pointer of inputB */
00228   pSrc2 = pIn2 + (srcBLen - 1u);
00229   py = pSrc2;
00230
00231   /* count is index by which the pointer pIn1 to be incremented */
00232   count = 1u;
00233
00234   /* -------------------
00235    * Stage2 process
00236    * ------------------*/
00237
00238   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00239    * So, to loop unroll over blockSize2,
00240    * srcBLen should be greater than or equal to 4 */
00241   if(srcBLen >= 4u)
00242   {
00243     /* Loop unroll over blockSize2, by 4 */
00244     blkCnt = blockSize2 >> 2u;
00245
00246     while(blkCnt > 0u)
00247     {
00248       /* Set all accumulators to zero */
00249       acc0 = 0;
00250       acc1 = 0;
00251       acc2 = 0;
00252       acc3 = 0;
00253
00254       /* read x[0], x[1], x[2] samples */
00255       x0 = *(px++);
00256       x1 = *(px++);
00257       x2 = *(px++);
00258
00259       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00260       k = srcBLen >> 2u;
00261
00262       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00263        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00264       do
00265       {
00266         /* Read y[srcBLen - 1] sample */
00267         c0 = *(py--);
00268
00269         /* Read x[3] sample */
00270         x3 = *(px++);
00271
00272         /* Perform the multiply-accumulates */
00273         /* acc0 +=  x[0] * y[srcBLen - 1] */
00274         acc0 += ((q63_t) x0 * c0);
00275         /* acc1 +=  x[1] * y[srcBLen - 1] */
00276         acc1 += ((q63_t) x1 * c0);
00277         /* acc2 +=  x[2] * y[srcBLen - 1] */
00278         acc2 += ((q63_t) x2 * c0);
00279         /* acc3 +=  x[3] * y[srcBLen - 1] */
00280         acc3 += ((q63_t) x3 * c0);
00281
00282         /* Read y[srcBLen - 2] sample */
00283         c0 = *(py--);
00284
00285         /* Read x[4] sample */
00286         x0 = *(px++);
00287
00288         /* Perform the multiply-accumulate */
00289         /* acc0 +=  x[1] * y[srcBLen - 2] */
00290         acc0 += ((q63_t) x1 * c0);
00291         /* acc1 +=  x[2] * y[srcBLen - 2] */
00292         acc1 += ((q63_t) x2 * c0);
00293         /* acc2 +=  x[3] * y[srcBLen - 2] */
00294         acc2 += ((q63_t) x3 * c0);
00295         /* acc3 +=  x[4] * y[srcBLen - 2] */
00296         acc3 += ((q63_t) x0 * c0);
00297
00298         /* Read y[srcBLen - 3] sample */
00299         c0 = *(py--);
00300
00301         /* Read x[5] sample */
00302         x1 = *(px++);
00303
00304         /* Perform the multiply-accumulates */
00305         /* acc0 +=  x[2] * y[srcBLen - 3] */
00306         acc0 += ((q63_t) x2 * c0);
00307         /* acc1 +=  x[3] * y[srcBLen - 2] */
00308         acc1 += ((q63_t) x3 * c0);
00309         /* acc2 +=  x[4] * y[srcBLen - 2] */
00310         acc2 += ((q63_t) x0 * c0);
00311         /* acc3 +=  x[5] * y[srcBLen - 2] */
00312         acc3 += ((q63_t) x1 * c0);
00313
00314         /* Read y[srcBLen - 4] sample */
00315         c0 = *(py--);
00316
00317         /* Read x[6] sample */
00318         x2 = *(px++);
00319
00320         /* Perform the multiply-accumulates */
00321         /* acc0 +=  x[3] * y[srcBLen - 4] */
00322         acc0 += ((q63_t) x3 * c0);
00323         /* acc1 +=  x[4] * y[srcBLen - 4] */
00324         acc1 += ((q63_t) x0 * c0);
00325         /* acc2 +=  x[5] * y[srcBLen - 4] */
00326         acc2 += ((q63_t) x1 * c0);
00327         /* acc3 +=  x[6] * y[srcBLen - 4] */
00328         acc3 += ((q63_t) x2 * c0);
00329
00330       } while(--k);
00331
00332       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00333        ** No loop unrolling is used. */
00334       k = srcBLen % 0x4u;
00335
00336       while(k > 0u)
00337       {
00338         /* Read y[srcBLen - 5] sample */
00339         c0 = *(py--);
00340
00341         /* Read x[7] sample */
00342         x3 = *(px++);
00343
00344         /* Perform the multiply-accumulates */
00345         /* acc0 +=  x[4] * y[srcBLen - 5] */
00346         acc0 += ((q63_t) x0 * c0);
00347         /* acc1 +=  x[5] * y[srcBLen - 5] */
00348         acc1 += ((q63_t) x1 * c0);
00349         /* acc2 +=  x[6] * y[srcBLen - 5] */
00350         acc2 += ((q63_t) x2 * c0);
00351         /* acc3 +=  x[7] * y[srcBLen - 5] */
00352         acc3 += ((q63_t) x3 * c0);
00353
00354         /* Reuse the present samples for the next MAC */
00355         x0 = x1;
00356         x1 = x2;
00357         x2 = x3;
00358
00359         /* Decrement the loop counter */
00360         k--;
00361       }
00362
00363       /* Store the results in the accumulators in the destination buffer. */
00364       *pOut++ = (q31_t) (acc0 >> 31);
00365       *pOut++ = (q31_t) (acc1 >> 31);
00366       *pOut++ = (q31_t) (acc2 >> 31);
00367       *pOut++ = (q31_t) (acc3 >> 31);
00368
00369       /* Update the inputA and inputB pointers for next MAC calculation */
00370       px = pIn1 + (count * 4u);
00371       py = pSrc2;
00372
00373       /* Increment the pointer pIn1 index, count by 1 */
00374       count++;
00375
00376       /* Decrement the loop counter */
00377       blkCnt--;
00378     }
00379
00380     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00381      ** No loop unrolling is used. */
00382     blkCnt = blockSize2 % 0x4u;
00383
00384     while(blkCnt > 0u)
00385     {
00386       /* Accumulator is made zero for every iteration */
00387       sum = 0;
00388
00389       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00390       k = srcBLen >> 2u;
00391
00392       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00393        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00394       while(k > 0u)
00395       {
00396         /* Perform the multiply-accumulates */
00397         sum += (q63_t) * px++ * (*py--);
00398         sum += (q63_t) * px++ * (*py--);
00399         sum += (q63_t) * px++ * (*py--);
00400         sum += (q63_t) * px++ * (*py--);
00401
00402         /* Decrement the loop counter */
00403         k--;
00404       }
00405
00406       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00407        ** No loop unrolling is used. */
00408       k = srcBLen % 0x4u;
00409
00410       while(k > 0u)
00411       {
00412         /* Perform the multiply-accumulate */
00413         sum += (q63_t) * px++ * (*py--);
00414
00415         /* Decrement the loop counter */
00416         k--;
00417       }
00418
00419       /* Store the result in the accumulator in the destination buffer. */
00420       *pOut++ = (q31_t) (sum >> 31);
00421
00422       /* Update the inputA and inputB pointers for next MAC calculation */
00423       px = pIn1 + count;
00424       py = pSrc2;
00425
00426       /* Increment the MAC count */
00427       count++;
00428
00429       /* Decrement the loop counter */
00430       blkCnt--;
00431     }
00432   }
00433   else
00434   {
00435     /* If the srcBLen is not a multiple of 4,
00436      * the blockSize2 loop cannot be unrolled by 4 */
00437     blkCnt = blockSize2;
00438
00439     while(blkCnt > 0u)
00440     {
00441       /* Accumulator is made zero for every iteration */
00442       sum = 0;
00443
00444       /* srcBLen number of MACS should be performed */
00445       k = srcBLen;
00446
00447       while(k > 0u)
00448       {
00449         /* Perform the multiply-accumulate */
00450         sum += (q63_t) * px++ * (*py--);
00451
00452         /* Decrement the loop counter */
00453         k--;
00454       }
00455
00456       /* Store the result in the accumulator in the destination buffer. */
00457       *pOut++ = (q31_t) (sum >> 31);
00458
00459       /* Update the inputA and inputB pointers for next MAC calculation */
00460       px = pIn1 + count;
00461       py = pSrc2;
00462
00463       /* Increment the MAC count */
00464       count++;
00465
00466       /* Decrement the loop counter */
00467       blkCnt--;
00468     }
00469   }
00470
00471
00472   /* --------------------------
00473    * Initializations of stage3
00474    * -------------------------*/
00475
00476   /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
00477    * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
00478    * ....
00479    * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
00480    * sum +=  x[srcALen-1] * y[srcBLen-1]
00481    */
00482
00483   /* In this stage the MAC operations are decreased by 1 for every iteration.
00484      The blockSize3 variable holds the number of MAC operations performed */
00485
00486   /* Working pointer of inputA */
00487   pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00488   px = pSrc1;
00489
00490   /* Working pointer of inputB */
00491   pSrc2 = pIn2 + (srcBLen - 1u);
00492   py = pSrc2;
00493
00494   /* -------------------
00495    * Stage3 process
00496    * ------------------*/
00497
00498   while(blockSize3 > 0u)
00499   {
00500     /* Accumulator is made zero for every iteration */
00501     sum = 0;
00502
00503     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00504     k = blockSize3 >> 2u;
00505
00506     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00507      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00508     while(k > 0u)
00509     {
00510       /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
00511       sum += (q63_t) * px++ * (*py--);
00512       /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
00513       sum += (q63_t) * px++ * (*py--);
00514       /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
00515       sum += (q63_t) * px++ * (*py--);
00516       /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
00517       sum += (q63_t) * px++ * (*py--);
00518
00519       /* Decrement the loop counter */
00520       k--;
00521     }
00522
00523     /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
00524      ** No loop unrolling is used. */
00525     k = blockSize3 % 0x4u;
00526
00527     while(k > 0u)
00528     {
00529       /* Perform the multiply-accumulate */
00530       sum += (q63_t) * px++ * (*py--);
00531
00532       /* Decrement the loop counter */
00533       k--;
00534     }
00535
00536     /* Store the result in the accumulator in the destination buffer. */
00537     *pOut++ = (q31_t) (sum >> 31);
00538
00539     /* Update the inputA and inputB pointers for next MAC calculation */
00540     px = ++pSrc1;
00541     py = pSrc2;
00542
00543     /* Decrement the loop counter */
00544     blockSize3--;
00545   }
00546
00547 #else
00548
00549   /* Run the below code for Cortex-M0 */
00550
00551   q31_t *pIn1 = pSrcA;                           /* input pointer */
00552   q31_t *pIn2 = pSrcB;                           /* coefficient pointer */
00553   q63_t sum;                                     /* Accumulator */
00554   uint32_t i, j;                                 /* loop counter */
00555
00556   /* Loop to calculate output of convolution for output length number of times */
00557   for (i = 0; i < (srcALen + srcBLen - 1); i++)
00558   {
00559     /* Initialize sum with zero to carry on MAC operations */
00560     sum = 0;
00561
00562     /* Loop to perform MAC operations according to convolution equation */
00563     for (j = 0; j <= i; j++)
00564     {
00565       /* Check the array limitations */
00566       if(((i - j) < srcBLen) && (j < srcALen))
00567       {
00568         /* z[i] += x[i-j] * y[j] */
00569         sum += ((q63_t) pIn1[j] * (pIn2[i - j]));
00570       }
00571     }
00572
00573     /* Store the output in the destination buffer */
00574     pDst[i] = (q31_t) (sum >> 31u);
00575   }
00576
00577 #endif /*     #ifndef ARM_MATH_CM0 */
00578
00579 }
00580
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CMSIS DSP Software Library: arm_convolution_example_f32.c File Reference

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  • Globals
Defines | Functions | Variables

arm_convolution_example_f32.c File Reference

#include "arm_math.h"
#include "math_helper.h"

Go to the source code of this file.

Defines

#define | MAX_BLOCKSIZE 128
#define | DELTA (0.000001f)
#define | SNR_THRESHOLD 90

Functions

int32_t | main (void)

Variables

float32_t | Ak [MAX_BLOCKSIZE]
float32_t | Bk [MAX_BLOCKSIZE]
float32_t | AxB [MAX_BLOCKSIZE *2]
float32_t | testInputA_f32 [64]
float32_t | testInputB_f32 [64]
const float | testRefOutput_f32 [126]
uint32_t | srcALen = 64
uint32_t | srcBLen = 64
uint32_t | outLen
float32_t snr

Define Documentation

#define MAX_BLOCKSIZE 128
Examples:
arm_convolution_example_f32.c, arm_dotproduct_example_f32.c, arm_sin_cos_example_f32.c, and arm_variance_example_f32.c.

Definition at line 95 of file arm_convolution_example_f32.c.

#define DELTA (0.000001f)
Examples:
arm_dotproduct_example_f32.c, arm_sin_cos_example_f32.c, and arm_variance_example_f32.c.

Definition at line 96 of file arm_convolution_example_f32.c.

#define SNR_THRESHOLD 90
Examples:
arm_convolution_example_f32.c, and arm_matrix_example_f32.c.

Definition at line 97 of file arm_convolution_example_f32.c.

Function Documentation

int32_t main ( void )

Definition at line 175 of file arm_convolution_example_f32.c.

Variable Documentation

float32_t Ak[MAX_BLOCKSIZE]
Examples:
arm_convolution_example_f32.c.

Definition at line 102 of file arm_convolution_example_f32.c.

float32_t Bk[MAX_BLOCKSIZE]
Examples:
arm_convolution_example_f32.c.

Definition at line 103 of file arm_convolution_example_f32.c.

float32_t AxB[MAX_BLOCKSIZE *2]
Examples:
arm_convolution_example_f32.c.

Definition at line 104 of file arm_convolution_example_f32.c.

float32_t testInputA_f32[64]
Initial value:

{
-0.808920,  1.357369,   1.180861,   -0.504544,  1.762637,   -0.703285,
1.696966,   0.620571,   -0.151093,  -0.100235,  -0.872382,  -0.403579,
-0.860749,  -0.382648,  -1.052338,  0.128113,   -0.646269,  1.093377,
-2.209198,  0.471706,   0.408901,   1.266242,   0.598252,   1.176827,
-0.203421,  0.213596,   -0.851964,  -0.466958,  0.021841,   -0.698938,
-0.604107,  0.461778,   -0.318219,  0.942520,   0.577585,   0.417619,
0.614665,   0.563679,   -1.295073,  -0.764437,  0.952194,   -0.859222,
-0.618554,  -2.268542,  -1.210592,  1.655853,   -2.627219,  -0.994249,
-1.374704,  0.343799,   0.025619,   1.227481,   -0.708031,  0.069355,
-1.845228,  -1.570886,  1.010668,   -1.802084,  1.630088,   1.286090,
-0.161050,  -0.940794,  0.367961,   0.291907

}
Examples:
arm_convolution_example_f32.c.

Definition at line 110 of file arm_convolution_example_f32.c.

float32_t testInputB_f32[64]
Initial value:

{
0.933724,   0.046881,   1.316470,   0.438345,   0.332682,   2.094885,
0.512081,   0.035546,   0.050894,   -2.320371,  0.168711,   -1.830493,
-0.444834,  -1.003242,  -0.531494,  -1.365600,  -0.155420,  -0.757692,
-0.431880,  -0.380021,  0.096243,   -0.695835,  0.558850,   -1.648962,
0.020369,   -0.363630,  0.887146,   0.845503,   -0.252864,  -0.330397,
1.269131,   -1.109295,  -1.027876,  0.135940,   0.116721,   -0.293399,
-1.349799,  0.166078,   -0.802201,  0.369367,   -0.964568,  -2.266011,
0.465178,   0.651222,   -0.325426,  0.320245,   -0.784178,  -0.579456,
0.093374,   0.604778,   -0.048225,  0.376297,   -0.394412,  0.578182,
-1.218141,  -1.387326,  0.692462,   -0.631297,  0.153137,   -0.638952,
0.635474,   -0.970468,  1.334057,   -0.111370
}
Examples:
arm_convolution_example_f32.c.

Definition at line 126 of file arm_convolution_example_f32.c.

const float testRefOutput_f32[126]
Initial value:

{
-0.818943,  1.229484,   -0.533664,  1.016604,   0.341875,   -1.963656,
5.171476,   3.478033,   7.616361,   6.648384,   0.479069,   1.792012,
-1.295591,  -7.447818,  0.315830,   -10.657445, -2.483469,  -6.524236,
-7.380591,  -3.739005,  -8.388957,  0.184147,   -1.554888,  3.786508,
-1.684421,  5.400610,   -1.578126,  7.403361,   8.315999,   2.080267,
11.077776,  2.749673,   7.138962,   2.748762,   0.660363,   0.981552,
1.442275,   0.552721,   -2.576892,  4.703989,   0.989156,   8.759344,
-0.564825,  -3.994680,  0.954710,   -5.014144,  6.592329,   1.599488,
-13.979146, -0.391891,  -4.453369,  -2.311242,  -2.948764,  1.761415,
-0.138322,  10.433007,  -2.309103,  4.297153,   8.535523,   3.209462,
8.695819,   5.569919,   2.514304,   5.582029,   2.060199,   0.642280,
7.024616,   1.686615,   -6.481756,  1.343084,   -3.526451,  1.099073,
-2.965764,  -0.173723,  -4.111484,  6.528384,   -6.965658,  1.726291,
1.535172,   11.023435,  2.338401,   -4.690188,  1.298210,   3.943885,
8.407885,   5.168365,   0.684131,   1.559181,   1.859998,   2.852417,
8.574070,   -6.369078,  6.023458,   11.837963,  -6.027632,  4.469678,
-6.799093,  -2.674048,  6.250367,   -6.809971,  -3.459360,  9.112410,
-2.711621,  -1.336678,  1.564249,   -1.564297,  -1.296760,  8.904013,
-3.230109,  6.878013,   -7.819823,  3.369909,   -1.657410,  -2.007358,
-4.112825,  1.370685,   -3.420525,  -6.276605,  3.244873,   -3.352638,
1.545372,   0.902211,   0.197489,   -1.408732,  0.523390,   0.348440
}
Examples:
arm_convolution_example_f32.c, arm_graphic_equalizer_example_q31.c, and arm_sin_cos_example_f32.c.

Definition at line 141 of file arm_convolution_example_f32.c.

uint32_t srcALen = 64
Examples:
arm_convolution_example_f32.c.

Definition at line 170 of file arm_convolution_example_f32.c.

uint32_t srcBLen = 64
Examples:
arm_convolution_example_f32.c.

Definition at line 171 of file arm_convolution_example_f32.c.

uint32_t outLen
Examples:
arm_convolution_example_f32.c.

Definition at line 172 of file arm_convolution_example_f32.c.

float32_t snr
Examples:
arm_convolution_example_f32.c, arm_fir_example_f32.c, arm_graphic_equalizer_example_q31.c, and arm_matrix_example_f32.c.

Definition at line 173 of file arm_convolution_example_f32.c.

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CMSIS DSP Software Library: arm_convolution_example_f32.c Source File

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arm_convolution_example_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        29. November 2010
00005 * $Revision:    V1.0.3
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_convolution_example_f32.c
00009 *
00010 * Description:  Example code demonstrating Convolution of two input signals using fft.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 *
00015 * Version 1.0.3 2010/11/29
00016 *    Re-organized the CMSIS folders and updated documentation.
00017 *
00018 * Version 1.0.1 2010/10/05 KK
00019 *    Production release and review comments incorporated.
00020 *
00021 * Version 1.0.0 2010/09/20 KK
00022 *    Production release and review comments incorporated.
00023 * ------------------------------------------------------------------- */
00024
00089 #include "arm_math.h"
00090 #include "math_helper.h"
00091
00092 /* ----------------------------------------------------------------------
00093 * Defines each of the tests performed
00094 * ------------------------------------------------------------------- */
00095 #define MAX_BLOCKSIZE   128
00096 #define DELTA           (0.000001f)
00097 #define SNR_THRESHOLD   90
00098
00099 /* ----------------------------------------------------------------------
00100 * Declare I/O buffers
00101 * ------------------------------------------------------------------- */
00102 float32_t Ak[MAX_BLOCKSIZE];        /* Input A */
00103 float32_t Bk[MAX_BLOCKSIZE];        /* Input B */
00104 float32_t AxB[MAX_BLOCKSIZE * 2];   /* Output */
00105
00106 /* ----------------------------------------------------------------------
00107 * Test input data for Floating point Convolution example for 32-blockSize
00108 * Generated by the MATLAB randn() function
00109 * ------------------------------------------------------------------- */
00110 float32_t testInputA_f32[64] =
00111 {
00112 -0.808920,  1.357369,   1.180861,   -0.504544,  1.762637,   -0.703285,
00113 1.696966,   0.620571,   -0.151093,  -0.100235,  -0.872382,  -0.403579,
00114 -0.860749,  -0.382648,  -1.052338,  0.128113,   -0.646269,  1.093377,
00115 -2.209198,  0.471706,   0.408901,   1.266242,   0.598252,   1.176827,
00116 -0.203421,  0.213596,   -0.851964,  -0.466958,  0.021841,   -0.698938,
00117 -0.604107,  0.461778,   -0.318219,  0.942520,   0.577585,   0.417619,
00118 0.614665,   0.563679,   -1.295073,  -0.764437,  0.952194,   -0.859222,
00119 -0.618554,  -2.268542,  -1.210592,  1.655853,   -2.627219,  -0.994249,
00120 -1.374704,  0.343799,   0.025619,   1.227481,   -0.708031,  0.069355,
00121 -1.845228,  -1.570886,  1.010668,   -1.802084,  1.630088,   1.286090,
00122 -0.161050,  -0.940794,  0.367961,   0.291907
00123
00124 };
00125
00126 float32_t testInputB_f32[64] =
00127 {
00128 0.933724,   0.046881,   1.316470,   0.438345,   0.332682,   2.094885,
00129 0.512081,   0.035546,   0.050894,   -2.320371,  0.168711,   -1.830493,
00130 -0.444834,  -1.003242,  -0.531494,  -1.365600,  -0.155420,  -0.757692,
00131 -0.431880,  -0.380021,  0.096243,   -0.695835,  0.558850,   -1.648962,
00132 0.020369,   -0.363630,  0.887146,   0.845503,   -0.252864,  -0.330397,
00133 1.269131,   -1.109295,  -1.027876,  0.135940,   0.116721,   -0.293399,
00134 -1.349799,  0.166078,   -0.802201,  0.369367,   -0.964568,  -2.266011,
00135 0.465178,   0.651222,   -0.325426,  0.320245,   -0.784178,  -0.579456,
00136 0.093374,   0.604778,   -0.048225,  0.376297,   -0.394412,  0.578182,
00137 -1.218141,  -1.387326,  0.692462,   -0.631297,  0.153137,   -0.638952,
00138 0.635474,   -0.970468,  1.334057,   -0.111370
00139 };
00140
00141 const float testRefOutput_f32[126] =
00142 {
00143 -0.818943,  1.229484,   -0.533664,  1.016604,   0.341875,   -1.963656,
00144 5.171476,   3.478033,   7.616361,   6.648384,   0.479069,   1.792012,
00145 -1.295591,  -7.447818,  0.315830,   -10.657445, -2.483469,  -6.524236,
00146 -7.380591,  -3.739005,  -8.388957,  0.184147,   -1.554888,  3.786508,
00147 -1.684421,  5.400610,   -1.578126,  7.403361,   8.315999,   2.080267,
00148 11.077776,  2.749673,   7.138962,   2.748762,   0.660363,   0.981552,
00149 1.442275,   0.552721,   -2.576892,  4.703989,   0.989156,   8.759344,
00150 -0.564825,  -3.994680,  0.954710,   -5.014144,  6.592329,   1.599488,
00151 -13.979146, -0.391891,  -4.453369,  -2.311242,  -2.948764,  1.761415,
00152 -0.138322,  10.433007,  -2.309103,  4.297153,   8.535523,   3.209462,
00153 8.695819,   5.569919,   2.514304,   5.582029,   2.060199,   0.642280,
00154 7.024616,   1.686615,   -6.481756,  1.343084,   -3.526451,  1.099073,
00155 -2.965764,  -0.173723,  -4.111484,  6.528384,   -6.965658,  1.726291,
00156 1.535172,   11.023435,  2.338401,   -4.690188,  1.298210,   3.943885,
00157 8.407885,   5.168365,   0.684131,   1.559181,   1.859998,   2.852417,
00158 8.574070,   -6.369078,  6.023458,   11.837963,  -6.027632,  4.469678,
00159 -6.799093,  -2.674048,  6.250367,   -6.809971,  -3.459360,  9.112410,
00160 -2.711621,  -1.336678,  1.564249,   -1.564297,  -1.296760,  8.904013,
00161 -3.230109,  6.878013,   -7.819823,  3.369909,   -1.657410,  -2.007358,
00162 -4.112825,  1.370685,   -3.420525,  -6.276605,  3.244873,   -3.352638,
00163 1.545372,   0.902211,   0.197489,   -1.408732,  0.523390,   0.348440
00164 };
00165
00166
00167 /* ----------------------------------------------------------------------
00168 * Declare Global variables
00169 * ------------------------------------------------------------------- */
00170 uint32_t srcALen = 64;   /* Length of Input A */
00171 uint32_t srcBLen = 64;   /* Length of Input B */
00172 uint32_t outLen;         /* Length of convolution output */
00173 float32_t snr;           /* output SNR */
00174
00175 int32_t main(void)
00176 {
00177     arm_status status;     /* Status of the example */
00178     arm_cfft_radix4_instance_f32 cfft_instance; /* CFFT Structure instance */
00179
00180     /* CFFT Structure instance pointer */
00181     arm_cfft_radix4_instance_f32 *cfft_instance_ptr =
00182             (arm_cfft_radix4_instance_f32*) &cfft_instance;
00183
00184     /* output length of convolution */
00185     outLen = srcALen + srcBLen - 1;
00186
00187     /* Initialise the fft input buffers with all zeros */
00188     arm_fill_f32(0.0,  Ak, MAX_BLOCKSIZE);
00189     arm_fill_f32(0.0,  Bk, MAX_BLOCKSIZE);
00190
00191     /* Copy the input values to the fft input buffers */
00192     arm_copy_f32(testInputA_f32,  Ak, MAX_BLOCKSIZE/2);
00193     arm_copy_f32(testInputB_f32,  Bk, MAX_BLOCKSIZE/2);
00194
00195     /* Initialize the CFFT function to compute 64 point fft */
00196     status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 0, 1);
00197
00198     /* Transform input a[n] from time domain to frequency domain A[k] */
00199     arm_cfft_radix4_f32(cfft_instance_ptr, Ak);
00200     /* Transform input b[n] from time domain to frequency domain B[k] */
00201     arm_cfft_radix4_f32(cfft_instance_ptr, Bk);
00202
00203     /* Complex Multiplication of the two input buffers in frequency domain */
00204     arm_cmplx_mult_cmplx_f32(Ak, Bk, AxB, MAX_BLOCKSIZE/2);
00205
00206     /* Initialize the CIFFT function to compute 64 point ifft */
00207     status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 1, 1);
00208
00209     /* Transform the multiplication output from frequency domain to time domain,
00210        that gives the convolved output  */
00211     arm_cfft_radix4_f32(cfft_instance_ptr, AxB);
00212
00213     /* SNR Calculation */
00214     snr = arm_snr_f32((float32_t *)testRefOutput_f32, AxB, srcALen + srcBLen - 1);
00215
00216     /* Compare the SNR with threshold to test whether the
00217        computed output is matched with the reference output values. */
00218     if( snr > SNR_THRESHOLD)
00219     {
00220         status = ARM_MATH_SUCCESS;
00221     }
00222
00223     if( status != ARM_MATH_SUCCESS)
00224     {
00225       while(1);
00226     }
00227 }
00228
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CMSIS DSP Software Library: arm_copy_f32.c File Reference

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arm_copy_f32.c File Reference

#include "arm_math.h"

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void arm_copy_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_copy_f32.c Source File

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arm_copy_f32.c

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00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_copy_f32.c
00009 *
00010 * Description:  Copies the elements of a floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00066 void arm_copy_f32(
00067   float32_t * pSrc,
00068   float32_t * pDst,
00069   uint32_t blockSize)
00070 {
00071   uint32_t blkCnt;                               /* loop counter */
00072
00073 #ifndef ARM_MATH_CM0
00074
00075   /* Run the below code for Cortex-M4 and Cortex-M3 */
00076
00077   /*loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079
00080   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00081    ** a second loop below computes the remaining 1 to 3 samples. */
00082   while(blkCnt > 0u)
00083   {
00084     /* C = A */
00085     /* Copy and then store the results in the destination buffer */
00086     *pDst++ = *pSrc++;
00087     *pDst++ = *pSrc++;
00088     *pDst++ = *pSrc++;
00089     *pDst++ = *pSrc++;
00090
00091     /* Decrement the loop counter */
00092     blkCnt--;
00093   }
00094
00095   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00096    ** No loop unrolling is used. */
00097   blkCnt = blockSize % 0x4u;
00098
00099 #else
00100
00101   /* Run the below code for Cortex-M0 */
00102
00103   /* Loop over blockSize number of values */
00104   blkCnt = blockSize;
00105
00106 #endif /* #ifndef ARM_MATH_CM0 */
00107
00108   while(blkCnt > 0u)
00109   {
00110     /* C = A */
00111     /* Copy and then store the results in the destination buffer */
00112     *pDst++ = *pSrc++;
00113
00114     /* Decrement the loop counter */
00115     blkCnt--;
00116   }
00117 }
00118
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CMSIS DSP Software Library: arm_copy_q7.c File Reference

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arm_copy_q7.c File Reference

#include "arm_math.h"

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void arm_copy_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_copy_q7.c Source File

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arm_copy_q7.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_copy_q7.c
00009 *
00010 * Description:  Copies the elements of a Q7 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00053 void arm_copy_q7(
00054   q7_t * pSrc,
00055   q7_t * pDst,
00056   uint32_t blockSize)
00057 {
00058   uint32_t blkCnt;                               /* loop counter */
00059
00060 #ifndef ARM_MATH_CM0
00061
00062   /* Run the below code for Cortex-M4 and Cortex-M3 */
00063
00064   /*loop Unrolling */
00065   blkCnt = blockSize >> 2u;
00066
00067   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00068    ** a second loop below computes the remaining 1 to 3 samples. */
00069   while(blkCnt > 0u)
00070   {
00071     /* C = A */
00072     /* Copy and then store the results in the destination buffer */
00073     /* 4 samples are copied and stored at a time using SIMD */
00074     *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
00075
00076     /* Decrement the loop counter */
00077     blkCnt--;
00078   }
00079
00080   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00081    ** No loop unrolling is used. */
00082   blkCnt = blockSize % 0x4u;
00083
00084 #else
00085
00086   /* Run the below code for Cortex-M0 */
00087
00088   /* Loop over blockSize number of values */
00089   blkCnt = blockSize;
00090
00091 #endif /* #ifndef ARM_MATH_CM0 */
00092
00093
00094   while(blkCnt > 0u)
00095   {
00096     /* C = A */
00097     /* Copy and then store the results in the destination buffer */
00098     *pDst++ = *pSrc++;
00099
00100     /* Decrement the loop counter */
00101     blkCnt--;
00102   }
00103 }
00104
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CMSIS DSP Software Library: arm_copy_q15.c File Reference

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arm_copy_q15.c File Reference

#include "arm_math.h"

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Functions

void arm_copy_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_copy_q15.c Source File

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arm_copy_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_copy_q15.c
00009 *
00010 * Description:  Copies the elements of a Q15 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00052 void arm_copy_q15(
00053   q15_t * pSrc,
00054   q15_t * pDst,
00055   uint32_t blockSize)
00056 {
00057   uint32_t blkCnt;                               /* loop counter */
00058
00059 #ifndef ARM_MATH_CM0
00060
00061   /* Run the below code for Cortex-M4 and Cortex-M3 */
00062
00063   q15_t in1, in2;                                /* Temporary variables */
00064
00065
00066   /*loop Unrolling */
00067   blkCnt = blockSize >> 2u;
00068
00069   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00070    ** a second loop below computes the remaining 1 to 3 samples. */
00071   while(blkCnt > 0u)
00072   {
00073     /* C = A */
00074     /* Read two inputs */
00075     in1 = *pSrc++;
00076     in2 = *pSrc++;
00077
00078 #ifndef ARM_MATH_BIG_ENDIAN
00079
00080     /* Store the values in the destination buffer by packing the two inputs */
00081     *__SIMD32(pDst)++ = __PKHBT(in1, in2, 16);
00082
00083     in1 = *pSrc++;
00084     in2 = *pSrc++;
00085     *__SIMD32(pDst)++ = __PKHBT(in1, in2, 16);
00086
00087 #else
00088
00089     /* Store the values in the destination buffer by packing the two inputs */
00090     *__SIMD32(pDst)++ = __PKHBT(in2, in1, 16);
00091
00092     in1 = *pSrc++;
00093     in2 = *pSrc++;
00094     *__SIMD32(pDst)++ = __PKHBT(in2, in1, 16);
00095
00096
00097 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00098
00099     /* Decrement the loop counter */
00100     blkCnt--;
00101   }
00102
00103   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00104    ** No loop unrolling is used. */
00105   blkCnt = blockSize % 0x4u;
00106
00107
00108 #else
00109
00110   /* Run the below code for Cortex-M0 */
00111
00112   /* Loop over blockSize number of values */
00113   blkCnt = blockSize;
00114
00115 #endif /* #ifndef ARM_MATH_CM0 */
00116
00117   while(blkCnt > 0u)
00118   {
00119     /* C = A */
00120     /* Copy and then store the value in the destination buffer */
00121     *pDst++ = *pSrc++;
00122
00123     /* Decrement the loop counter */
00124     blkCnt--;
00125   }
00126 }
00127
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CMSIS DSP Software Library: arm_copy_q31.c File Reference

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arm_copy_q31.c File Reference

#include "arm_math.h"

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void arm_copy_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_copy_q31.c Source File

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arm_copy_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_copy_q31.c
00009 *
00010 * Description:  Copies the elements of a Q31 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00053 void arm_copy_q31(
00054   q31_t * pSrc,
00055   q31_t * pDst,
00056   uint32_t blockSize)
00057 {
00058   uint32_t blkCnt;                               /* loop counter */
00059
00060
00061 #ifndef ARM_MATH_CM0
00062
00063   /* Run the below code for Cortex-M4 and Cortex-M3 */
00064
00065   /*loop Unrolling */
00066   blkCnt = blockSize >> 2u;
00067
00068   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00069    ** a second loop below computes the remaining 1 to 3 samples. */
00070   while(blkCnt > 0u)
00071   {
00072     /* C = A */
00073     /* Copy and then store the values in the destination buffer */
00074     *pDst++ = *pSrc++;
00075     *pDst++ = *pSrc++;
00076     *pDst++ = *pSrc++;
00077     *pDst++ = *pSrc++;
00078
00079     /* Decrement the loop counter */
00080     blkCnt--;
00081   }
00082
00083   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00084    ** No loop unrolling is used. */
00085   blkCnt = blockSize % 0x4u;
00086
00087 #else
00088
00089   /* Run the below code for Cortex-M0 */
00090
00091   /* Loop over blockSize number of values */
00092   blkCnt = blockSize;
00093
00094 #endif /* #ifndef ARM_MATH_CM0 */
00095
00096   while(blkCnt > 0u)
00097   {
00098     /* C = A */
00099     /* Copy and then store the value in the destination buffer */
00100     *pDst++ = *pSrc++;
00101
00102     /* Decrement the loop counter */
00103     blkCnt--;
00104   }
00105 }
00106
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CMSIS DSP Software Library: arm_correlate_f32.c File Reference

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arm_correlate_f32.c File Reference

#include "arm_math.h"

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Functions

void arm_correlate_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst)
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CMSIS DSP Software Library: arm_correlate_f32.c Source File

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arm_correlate_f32.c

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00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_correlate_f32.c
00009 *
00010 * Description:   Correlation of floating-point sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00095 void arm_correlate_f32(
00096   float32_t * pSrcA,
00097   uint32_t srcALen,
00098   float32_t * pSrcB,
00099   uint32_t srcBLen,
00100   float32_t * pDst)
00101 {
00102
00103
00104 #ifndef ARM_MATH_CM0
00105
00106   /* Run the below code for Cortex-M4 and Cortex-M3 */
00107
00108   float32_t *pIn1;                               /* inputA pointer */
00109   float32_t *pIn2;                               /* inputB pointer */
00110   float32_t *pOut = pDst;                        /* output pointer */
00111   float32_t *px;                                 /* Intermediate inputA pointer */
00112   float32_t *py;                                 /* Intermediate inputB pointer */
00113   float32_t *pSrc1;                              /* Intermediate pointers */
00114   float32_t sum, acc0, acc1, acc2, acc3;         /* Accumulators */
00115   float32_t x0, x1, x2, x3, c0;                  /* temporary variables for holding input and coefficient values */
00116   uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counters */
00117   int32_t inc = 1;                               /* Destination address modifier */
00118
00119
00120   /* The algorithm implementation is based on the lengths of the inputs. */
00121   /* srcB is always made to slide across srcA. */
00122   /* So srcBLen is always considered as shorter or equal to srcALen */
00123   /* But CORR(x, y) is reverse of CORR(y, x) */
00124   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
00125   /* and the destination pointer modifier, inc is set to -1 */
00126   /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
00127   /* But to improve the performance,
00128    * we include zeroes in the output instead of zero padding either of the the inputs*/
00129   /* If srcALen > srcBLen,
00130    * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
00131   /* If srcALen < srcBLen,
00132    * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
00133   if(srcALen >= srcBLen)
00134   {
00135     /* Initialization of inputA pointer */
00136     pIn1 = pSrcA;
00137
00138     /* Initialization of inputB pointer */
00139     pIn2 = pSrcB;
00140
00141     /* Number of output samples is calculated */
00142     outBlockSize = (2u * srcALen) - 1u;
00143
00144     /* When srcALen > srcBLen, zero padding has to be done to srcB
00145      * to make their lengths equal.
00146      * Instead, (outBlockSize - (srcALen + srcBLen - 1))
00147      * number of output samples are made zero */
00148     j = outBlockSize - (srcALen + (srcBLen - 1u));
00149
00150     /* Updating the pointer position to non zero value */
00151     pOut += j;
00152
00153     //while(j > 0u)
00154     //{
00155     //  /* Zero is stored in the destination buffer */
00156     //  *pOut++ = 0.0f;
00157
00158     //  /* Decrement the loop counter */
00159     //  j--;
00160     //}
00161
00162   }
00163   else
00164   {
00165     /* Initialization of inputA pointer */
00166     pIn1 = pSrcB;
00167
00168     /* Initialization of inputB pointer */
00169     pIn2 = pSrcA;
00170
00171     /* srcBLen is always considered as shorter or equal to srcALen */
00172     j = srcBLen;
00173     srcBLen = srcALen;
00174     srcALen = j;
00175
00176     /* CORR(x, y) = Reverse order(CORR(y, x)) */
00177     /* Hence set the destination pointer to point to the last output sample */
00178     pOut = pDst + ((srcALen + srcBLen) - 2u);
00179
00180     /* Destination address modifier is set to -1 */
00181     inc = -1;
00182
00183   }
00184
00185   /* The function is internally
00186    * divided into three parts according to the number of multiplications that has to be
00187    * taken place between inputA samples and inputB samples. In the first part of the
00188    * algorithm, the multiplications increase by one for every iteration.
00189    * In the second part of the algorithm, srcBLen number of multiplications are done.
00190    * In the third part of the algorithm, the multiplications decrease by one
00191    * for every iteration.*/
00192   /* The algorithm is implemented in three stages.
00193    * The loop counters of each stage is initiated here. */
00194   blockSize1 = srcBLen - 1u;
00195   blockSize2 = srcALen - (srcBLen - 1u);
00196   blockSize3 = blockSize1;
00197
00198   /* --------------------------
00199    * Initializations of stage1
00200    * -------------------------*/
00201
00202   /* sum = x[0] * y[srcBlen - 1]
00203    * sum = x[0] * y[srcBlen-2] + x[1] * y[srcBlen - 1]
00204    * ....
00205    * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
00206    */
00207
00208   /* In this stage the MAC operations are increased by 1 for every iteration.
00209      The count variable holds the number of MAC operations performed */
00210   count = 1u;
00211
00212   /* Working pointer of inputA */
00213   px = pIn1;
00214
00215   /* Working pointer of inputB */
00216   pSrc1 = pIn2 + (srcBLen - 1u);
00217   py = pSrc1;
00218
00219   /* ------------------------
00220    * Stage1 process
00221    * ----------------------*/
00222
00223   /* The first stage starts here */
00224   while(blockSize1 > 0u)
00225   {
00226     /* Accumulator is made zero for every iteration */
00227     sum = 0.0f;
00228
00229     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00230     k = count >> 2u;
00231
00232     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00233      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00234     while(k > 0u)
00235     {
00236       /* x[0] * y[srcBLen - 4] */
00237       sum += *px++ * *py++;
00238       /* x[1] * y[srcBLen - 3] */
00239       sum += *px++ * *py++;
00240       /* x[2] * y[srcBLen - 2] */
00241       sum += *px++ * *py++;
00242       /* x[3] * y[srcBLen - 1] */
00243       sum += *px++ * *py++;
00244
00245       /* Decrement the loop counter */
00246       k--;
00247     }
00248
00249     /* If the count is not a multiple of 4, compute any remaining MACs here.
00250      ** No loop unrolling is used. */
00251     k = count % 0x4u;
00252
00253     while(k > 0u)
00254     {
00255       /* Perform the multiply-accumulate */
00256       /* x[0] * y[srcBLen - 1] */
00257       sum += *px++ * *py++;
00258
00259       /* Decrement the loop counter */
00260       k--;
00261     }
00262
00263     /* Store the result in the accumulator in the destination buffer. */
00264     *pOut = sum;
00265     /* Destination pointer is updated according to the address modifier, inc */
00266     pOut += inc;
00267
00268     /* Update the inputA and inputB pointers for next MAC calculation */
00269     py = pSrc1 - count;
00270     px = pIn1;
00271
00272     /* Increment the MAC count */
00273     count++;
00274
00275     /* Decrement the loop counter */
00276     blockSize1--;
00277   }
00278
00279   /* --------------------------
00280    * Initializations of stage2
00281    * ------------------------*/
00282
00283   /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
00284    * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
00285    * ....
00286    * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00287    */
00288
00289   /* Working pointer of inputA */
00290   px = pIn1;
00291
00292   /* Working pointer of inputB */
00293   py = pIn2;
00294
00295   /* count is index by which the pointer pIn1 to be incremented */
00296   count = 1u;
00297
00298   /* -------------------
00299    * Stage2 process
00300    * ------------------*/
00301
00302   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00303    * So, to loop unroll over blockSize2,
00304    * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
00305   if(srcBLen >= 4u)
00306   {
00307     /* Loop unroll over blockSize2, by 4 */
00308     blkCnt = blockSize2 >> 2u;
00309
00310     while(blkCnt > 0u)
00311     {
00312       /* Set all accumulators to zero */
00313       acc0 = 0.0f;
00314       acc1 = 0.0f;
00315       acc2 = 0.0f;
00316       acc3 = 0.0f;
00317
00318       /* read x[0], x[1], x[2] samples */
00319       x0 = *(px++);
00320       x1 = *(px++);
00321       x2 = *(px++);
00322
00323       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00324       k = srcBLen >> 2u;
00325
00326       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00327        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00328       do
00329       {
00330         /* Read y[0] sample */
00331         c0 = *(py++);
00332
00333         /* Read x[3] sample */
00334         x3 = *(px++);
00335
00336         /* Perform the multiply-accumulate */
00337         /* acc0 +=  x[0] * y[0] */
00338         acc0 += x0 * c0;
00339         /* acc1 +=  x[1] * y[0] */
00340         acc1 += x1 * c0;
00341         /* acc2 +=  x[2] * y[0] */
00342         acc2 += x2 * c0;
00343         /* acc3 +=  x[3] * y[0] */
00344         acc3 += x3 * c0;
00345
00346         /* Read y[1] sample */
00347         c0 = *(py++);
00348
00349         /* Read x[4] sample */
00350         x0 = *(px++);
00351
00352         /* Perform the multiply-accumulate */
00353         /* acc0 +=  x[1] * y[1] */
00354         acc0 += x1 * c0;
00355         /* acc1 +=  x[2] * y[1] */
00356         acc1 += x2 * c0;
00357         /* acc2 +=  x[3] * y[1] */
00358         acc2 += x3 * c0;
00359         /* acc3 +=  x[4] * y[1] */
00360         acc3 += x0 * c0;
00361
00362         /* Read y[2] sample */
00363         c0 = *(py++);
00364
00365         /* Read x[5] sample */
00366         x1 = *(px++);
00367
00368         /* Perform the multiply-accumulates */
00369         /* acc0 +=  x[2] * y[2] */
00370         acc0 += x2 * c0;
00371         /* acc1 +=  x[3] * y[2] */
00372         acc1 += x3 * c0;
00373         /* acc2 +=  x[4] * y[2] */
00374         acc2 += x0 * c0;
00375         /* acc3 +=  x[5] * y[2] */
00376         acc3 += x1 * c0;
00377
00378         /* Read y[3] sample */
00379         c0 = *(py++);
00380
00381         /* Read x[6] sample */
00382         x2 = *(px++);
00383
00384         /* Perform the multiply-accumulates */
00385         /* acc0 +=  x[3] * y[3] */
00386         acc0 += x3 * c0;
00387         /* acc1 +=  x[4] * y[3] */
00388         acc1 += x0 * c0;
00389         /* acc2 +=  x[5] * y[3] */
00390         acc2 += x1 * c0;
00391         /* acc3 +=  x[6] * y[3] */
00392         acc3 += x2 * c0;
00393
00394
00395       } while(--k);
00396
00397       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00398        ** No loop unrolling is used. */
00399       k = srcBLen % 0x4u;
00400
00401       while(k > 0u)
00402       {
00403         /* Read y[4] sample */
00404         c0 = *(py++);
00405
00406         /* Read x[7] sample */
00407         x3 = *(px++);
00408
00409         /* Perform the multiply-accumulates */
00410         /* acc0 +=  x[4] * y[4] */
00411         acc0 += x0 * c0;
00412         /* acc1 +=  x[5] * y[4] */
00413         acc1 += x1 * c0;
00414         /* acc2 +=  x[6] * y[4] */
00415         acc2 += x2 * c0;
00416         /* acc3 +=  x[7] * y[4] */
00417         acc3 += x3 * c0;
00418
00419         /* Reuse the present samples for the next MAC */
00420         x0 = x1;
00421         x1 = x2;
00422         x2 = x3;
00423
00424         /* Decrement the loop counter */
00425         k--;
00426       }
00427
00428       /* Store the result in the accumulator in the destination buffer. */
00429       *pOut = acc0;
00430       /* Destination pointer is updated according to the address modifier, inc */
00431       pOut += inc;
00432
00433       *pOut = acc1;
00434       pOut += inc;
00435
00436       *pOut = acc2;
00437       pOut += inc;
00438
00439       *pOut = acc3;
00440       pOut += inc;
00441
00442       /* Update the inputA and inputB pointers for next MAC calculation */
00443       px = pIn1 + (count * 4u);
00444       py = pIn2;
00445
00446       /* Increment the pointer pIn1 index, count by 1 */
00447       count++;
00448
00449       /* Decrement the loop counter */
00450       blkCnt--;
00451     }
00452
00453     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00454      ** No loop unrolling is used. */
00455     blkCnt = blockSize2 % 0x4u;
00456
00457     while(blkCnt > 0u)
00458     {
00459       /* Accumulator is made zero for every iteration */
00460       sum = 0.0f;
00461
00462       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00463       k = srcBLen >> 2u;
00464
00465       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00466        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00467       while(k > 0u)
00468       {
00469         /* Perform the multiply-accumulates */
00470         sum += *px++ * *py++;
00471         sum += *px++ * *py++;
00472         sum += *px++ * *py++;
00473         sum += *px++ * *py++;
00474
00475         /* Decrement the loop counter */
00476         k--;
00477       }
00478
00479       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00480        ** No loop unrolling is used. */
00481       k = srcBLen % 0x4u;
00482
00483       while(k > 0u)
00484       {
00485         /* Perform the multiply-accumulate */
00486         sum += *px++ * *py++;
00487
00488         /* Decrement the loop counter */
00489         k--;
00490       }
00491
00492       /* Store the result in the accumulator in the destination buffer. */
00493       *pOut = sum;
00494       /* Destination pointer is updated according to the address modifier, inc */
00495       pOut += inc;
00496
00497       /* Update the inputA and inputB pointers for next MAC calculation */
00498       px = pIn1 + count;
00499       py = pIn2;
00500
00501       /* Increment the pointer pIn1 index, count by 1 */
00502       count++;
00503
00504       /* Decrement the loop counter */
00505       blkCnt--;
00506     }
00507   }
00508   else
00509   {
00510     /* If the srcBLen is not a multiple of 4,
00511      * the blockSize2 loop cannot be unrolled by 4 */
00512     blkCnt = blockSize2;
00513
00514     while(blkCnt > 0u)
00515     {
00516       /* Accumulator is made zero for every iteration */
00517       sum = 0.0f;
00518
00519       /* Loop over srcBLen */
00520       k = srcBLen;
00521
00522       while(k > 0u)
00523       {
00524         /* Perform the multiply-accumulate */
00525         sum += *px++ * *py++;
00526
00527         /* Decrement the loop counter */
00528         k--;
00529       }
00530
00531       /* Store the result in the accumulator in the destination buffer. */
00532       *pOut = sum;
00533       /* Destination pointer is updated according to the address modifier, inc */
00534       pOut += inc;
00535
00536       /* Update the inputA and inputB pointers for next MAC calculation */
00537       px = pIn1 + count;
00538       py = pIn2;
00539
00540       /* Increment the pointer pIn1 index, count by 1 */
00541       count++;
00542
00543       /* Decrement the loop counter */
00544       blkCnt--;
00545     }
00546   }
00547
00548   /* --------------------------
00549    * Initializations of stage3
00550    * -------------------------*/
00551
00552   /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00553    * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00554    * ....
00555    * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
00556    * sum +=  x[srcALen-1] * y[0]
00557    */
00558
00559   /* In this stage the MAC operations are decreased by 1 for every iteration.
00560      The count variable holds the number of MAC operations performed */
00561   count = srcBLen - 1u;
00562
00563   /* Working pointer of inputA */
00564   pSrc1 = pIn1 + (srcALen - (srcBLen - 1u));
00565   px = pSrc1;
00566
00567   /* Working pointer of inputB */
00568   py = pIn2;
00569
00570   /* -------------------
00571    * Stage3 process
00572    * ------------------*/
00573
00574   while(blockSize3 > 0u)
00575   {
00576     /* Accumulator is made zero for every iteration */
00577     sum = 0.0f;
00578
00579     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00580     k = count >> 2u;
00581
00582     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00583      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00584     while(k > 0u)
00585     {
00586       /* Perform the multiply-accumulates */
00587       /* sum += x[srcALen - srcBLen + 4] * y[3] */
00588       sum += *px++ * *py++;
00589       /* sum += x[srcALen - srcBLen + 3] * y[2] */
00590       sum += *px++ * *py++;
00591       /* sum += x[srcALen - srcBLen + 2] * y[1] */
00592       sum += *px++ * *py++;
00593       /* sum += x[srcALen - srcBLen + 1] * y[0] */
00594       sum += *px++ * *py++;
00595
00596       /* Decrement the loop counter */
00597       k--;
00598     }
00599
00600     /* If the count is not a multiple of 4, compute any remaining MACs here.
00601      ** No loop unrolling is used. */
00602     k = count % 0x4u;
00603
00604     while(k > 0u)
00605     {
00606       /* Perform the multiply-accumulates */
00607       sum += *px++ * *py++;
00608
00609       /* Decrement the loop counter */
00610       k--;
00611     }
00612
00613     /* Store the result in the accumulator in the destination buffer. */
00614     *pOut = sum;
00615     /* Destination pointer is updated according to the address modifier, inc */
00616     pOut += inc;
00617
00618     /* Update the inputA and inputB pointers for next MAC calculation */
00619     px = ++pSrc1;
00620     py = pIn2;
00621
00622     /* Decrement the MAC count */
00623     count--;
00624
00625     /* Decrement the loop counter */
00626     blockSize3--;
00627   }
00628
00629 #else
00630
00631   /* Run the below code for Cortex-M0 */
00632
00633   float32_t *pIn1 = pSrcA;                       /* inputA pointer */
00634   float32_t *pIn2 = pSrcB + (srcBLen - 1u);      /* inputB pointer */
00635   float32_t sum;                                 /* Accumulator */
00636   uint32_t i = 0u, j;                            /* loop counters */
00637   uint32_t inv = 0u;                             /* Reverse order flag */
00638   uint32_t tot = 0u;                             /* Length */
00639
00640   /* The algorithm implementation is based on the lengths of the inputs. */
00641   /* srcB is always made to slide across srcA. */
00642   /* So srcBLen is always considered as shorter or equal to srcALen */
00643   /* But CORR(x, y) is reverse of CORR(y, x) */
00644   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
00645   /* and a varaible, inv is set to 1 */
00646   /* If lengths are not equal then zero pad has to be done to  make the two
00647    * inputs of same length. But to improve the performance, we include zeroes
00648    * in the output instead of zero padding either of the the inputs*/
00649   /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
00650    * starting of the output buffer */
00651   /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
00652    * ending of the output buffer */
00653   /* Once the zero padding is done the remaining of the output is calcualted
00654    * using convolution but with the shorter signal time shifted. */
00655
00656   /* Calculate the length of the remaining sequence */
00657   tot = ((srcALen + srcBLen) - 2u);
00658
00659   if(srcALen > srcBLen)
00660   {
00661     /* Calculating the number of zeros to be padded to the output */
00662     j = srcALen - srcBLen;
00663
00664     /* Initialise the pointer after zero padding */
00665     pDst += j;
00666   }
00667
00668   else if(srcALen < srcBLen)
00669   {
00670     /* Initialization to inputB pointer */
00671     pIn1 = pSrcB;
00672
00673     /* Initialization to the end of inputA pointer */
00674     pIn2 = pSrcA + (srcALen - 1u);
00675
00676     /* Initialisation of the pointer after zero padding */
00677     pDst = pDst + tot;
00678
00679     /* Swapping the lengths */
00680     j = srcALen;
00681     srcALen = srcBLen;
00682     srcBLen = j;
00683
00684     /* Setting the reverse flag */
00685     inv = 1;
00686
00687   }
00688
00689   /* Loop to calculate convolution for output length number of times */
00690   for (i = 0u; i <= tot; i++)
00691   {
00692     /* Initialize sum with zero to carry on MAC operations */
00693     sum = 0.0f;
00694
00695     /* Loop to perform MAC operations according to convolution equation */
00696     for (j = 0u; j <= i; j++)
00697     {
00698       /* Check the array limitations */
00699       if((((i - j) < srcBLen) && (j < srcALen)))
00700       {
00701         /* z[i] += x[i-j] * y[j] */
00702         sum += pIn1[j] * pIn2[-((int32_t) i - j)];
00703       }
00704     }
00705     /* Store the output in the destination buffer */
00706     if(inv == 1)
00707       *pDst-- = sum;
00708     else
00709       *pDst++ = sum;
00710   }
00711
00712 #endif /*   #ifndef ARM_MATH_CM0 */
00713
00714 }
00715
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CMSIS DSP Software Library: arm_correlate_fast_q15.c File Reference

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arm_correlate_fast_q15.c File Reference

#include "arm_math.h"

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Functions

void arm_correlate_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
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CMSIS DSP Software Library: arm_correlate_fast_q15.c Source File

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arm_correlate_fast_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_correlate_fast_q15.c
00009 *
00010 * Description:  Fast Q15 Correlation.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00066 void arm_correlate_fast_q15(
00067   q15_t * pSrcA,
00068   uint32_t srcALen,
00069   q15_t * pSrcB,
00070   uint32_t srcBLen,
00071   q15_t * pDst)
00072 {
00073   q15_t *pIn1;                                   /* inputA pointer               */
00074   q15_t *pIn2;                                   /* inputB pointer               */
00075   q15_t *pOut = pDst;                            /* output pointer               */
00076   q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
00077   q15_t *px;                                     /* Intermediate inputA pointer  */
00078   q15_t *py;                                     /* Intermediate inputB pointer  */
00079   q15_t *pSrc1;                                  /* Intermediate pointers        */
00080   q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
00081   uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
00082   int32_t inc = 1;                               /* Destination address modifier */
00083   q31_t *pb;                                     /* 32 bit pointer for inputB buffer */
00084
00085
00086   /* The algorithm implementation is based on the lengths of the inputs. */
00087   /* srcB is always made to slide across srcA. */
00088   /* So srcBLen is always considered as shorter or equal to srcALen */
00089   /* But CORR(x, y) is reverse of CORR(y, x) */
00090   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
00091   /* and the destination pointer modifier, inc is set to -1 */
00092   /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
00093   /* But to improve the performance,
00094    * we include zeroes in the output instead of zero padding either of the the inputs*/
00095   /* If srcALen > srcBLen,
00096    * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
00097   /* If srcALen < srcBLen,
00098    * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
00099   if(srcALen >= srcBLen)
00100   {
00101     /* Initialization of inputA pointer */
00102     pIn1 = (pSrcA);
00103
00104     /* Initialization of inputB pointer */
00105     pIn2 = (pSrcB);
00106
00107     /* Number of output samples is calculated */
00108     outBlockSize = (2u * srcALen) - 1u;
00109
00110     /* When srcALen > srcBLen, zero padding is done to srcB
00111      * to make their lengths equal.
00112      * Instead, (outBlockSize - (srcALen + srcBLen - 1))
00113      * number of output samples are made zero */
00114     j = outBlockSize - (srcALen + (srcBLen - 1u));
00115
00116     /* Updating the pointer position to non zero value */
00117     pOut += j;
00118
00119   }
00120   else
00121   {
00122     /* Initialization of inputA pointer */
00123     pIn1 = (pSrcB);
00124
00125     /* Initialization of inputB pointer */
00126     pIn2 = (pSrcA);
00127
00128     /* srcBLen is always considered as shorter or equal to srcALen */
00129     j = srcBLen;
00130     srcBLen = srcALen;
00131     srcALen = j;
00132
00133     /* CORR(x, y) = Reverse order(CORR(y, x)) */
00134     /* Hence set the destination pointer to point to the last output sample */
00135     pOut = pDst + ((srcALen + srcBLen) - 2u);
00136
00137     /* Destination address modifier is set to -1 */
00138     inc = -1;
00139
00140   }
00141
00142   /* The function is internally
00143    * divided into three parts according to the number of multiplications that has to be
00144    * taken place between inputA samples and inputB samples. In the first part of the
00145    * algorithm, the multiplications increase by one for every iteration.
00146    * In the second part of the algorithm, srcBLen number of multiplications are done.
00147    * In the third part of the algorithm, the multiplications decrease by one
00148    * for every iteration.*/
00149   /* The algorithm is implemented in three stages.
00150    * The loop counters of each stage is initiated here. */
00151   blockSize1 = srcBLen - 1u;
00152   blockSize2 = srcALen - (srcBLen - 1u);
00153   blockSize3 = blockSize1;
00154
00155   /* --------------------------
00156    * Initializations of stage1
00157    * -------------------------*/
00158
00159   /* sum = x[0] * y[srcBlen - 1]
00160    * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
00161    * ....
00162    * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
00163    */
00164
00165   /* In this stage the MAC operations are increased by 1 for every iteration.
00166      The count variable holds the number of MAC operations performed */
00167   count = 1u;
00168
00169   /* Working pointer of inputA */
00170   px = pIn1;
00171
00172   /* Working pointer of inputB */
00173   pSrc1 = pIn2 + (srcBLen - 1u);
00174   py = pSrc1;
00175
00176   /* ------------------------
00177    * Stage1 process
00178    * ----------------------*/
00179
00180   /* The first loop starts here */
00181   while(blockSize1 > 0u)
00182   {
00183     /* Accumulator is made zero for every iteration */
00184     sum = 0;
00185
00186     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00187     k = count >> 2;
00188
00189     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00190      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00191     while(k > 0u)
00192     {
00193       /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
00194       sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
00195       /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */
00196       sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
00197
00198       /* Decrement the loop counter */
00199       k--;
00200     }
00201
00202     /* If the count is not a multiple of 4, compute any remaining MACs here.
00203      ** No loop unrolling is used. */
00204     k = count % 0x4u;
00205
00206     while(k > 0u)
00207     {
00208       /* Perform the multiply-accumulates */
00209       /* x[0] * y[srcBLen - 1] */
00210       sum = __SMLAD(*px++, *py++, sum);
00211
00212       /* Decrement the loop counter */
00213       k--;
00214     }
00215
00216     /* Store the result in the accumulator in the destination buffer. */
00217     *pOut = (q15_t) (sum >> 15);
00218     /* Destination pointer is updated according to the address modifier, inc */
00219     pOut += inc;
00220
00221     /* Update the inputA and inputB pointers for next MAC calculation */
00222     py = pSrc1 - count;
00223     px = pIn1;
00224
00225     /* Increment the MAC count */
00226     count++;
00227
00228     /* Decrement the loop counter */
00229     blockSize1--;
00230   }
00231
00232   /* --------------------------
00233    * Initializations of stage2
00234    * ------------------------*/
00235
00236   /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
00237    * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
00238    * ....
00239    * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00240    */
00241
00242   /* Working pointer of inputA */
00243   px = pIn1;
00244
00245   /* Working pointer of inputB */
00246   py = pIn2;
00247
00248   /* Initialize inputB pointer of type q31 */
00249   pb = (q31_t *) (py);
00250
00251   /* count is index by which the pointer pIn1 to be incremented */
00252   count = 0u;
00253
00254   /* -------------------
00255    * Stage2 process
00256    * ------------------*/
00257
00258   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00259    * So, to loop unroll over blockSize2,
00260    * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
00261   if(srcBLen >= 4u)
00262   {
00263     /* Loop unroll over blockSize2, by 4 */
00264     blkCnt = blockSize2 >> 2u;
00265
00266     while(blkCnt > 0u)
00267     {
00268       /* Set all accumulators to zero */
00269       acc0 = 0;
00270       acc1 = 0;
00271       acc2 = 0;
00272       acc3 = 0;
00273
00274       /* read x[0], x[1] samples */
00275       x0 = *(q31_t *) (px++);
00276       /* read x[1], x[2] samples */
00277       x1 = *(q31_t *) (px++);
00278
00279       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00280       k = srcBLen >> 2u;
00281
00282       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00283        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00284       do
00285       {
00286         /* Read the first two inputB samples using SIMD:
00287          * y[0] and y[1] */
00288         c0 = *(pb++);
00289
00290         /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
00291         acc0 = __SMLAD(x0, c0, acc0);
00292
00293         /* acc1 +=  x[1] * y[0] + x[2] * y[1] */
00294         acc1 = __SMLAD(x1, c0, acc1);
00295
00296         /* Read x[2], x[3] */
00297         x2 = *(q31_t *) (px++);
00298
00299         /* Read x[3], x[4] */
00300         x3 = *(q31_t *) (px++);
00301
00302         /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
00303         acc2 = __SMLAD(x2, c0, acc2);
00304
00305         /* acc3 +=  x[3] * y[0] + x[4] * y[1] */
00306         acc3 = __SMLAD(x3, c0, acc3);
00307
00308         /* Read y[2] and y[3] */
00309         c0 = *(pb++);
00310
00311         /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
00312         acc0 = __SMLAD(x2, c0, acc0);
00313
00314         /* acc1 +=  x[3] * y[2] + x[4] * y[3] */
00315         acc1 = __SMLAD(x3, c0, acc1);
00316
00317         /* Read x[4], x[5] */
00318         x0 = *(q31_t *) (px++);
00319
00320         /* Read x[5], x[6] */
00321         x1 = *(q31_t *) (px++);
00322
00323         /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
00324         acc2 = __SMLAD(x0, c0, acc2);
00325
00326         /* acc3 +=  x[5] * y[2] + x[6] * y[3] */
00327         acc3 = __SMLAD(x1, c0, acc3);
00328
00329       } while(--k);
00330
00331       /* For the next MAC operations, SIMD is not used
00332        * So, the 16 bit pointer if inputB, py is updated */
00333       py = (q15_t *) (pb);
00334
00335       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00336        ** No loop unrolling is used. */
00337       k = srcBLen % 0x4u;
00338
00339       if(k == 1u)
00340       {
00341         /* Read y[4] */
00342         c0 = *py;
00343 #ifdef  ARM_MATH_BIG_ENDIAN
00344
00345         c0 = c0 << 16u;
00346
00347 #else
00348
00349         c0 = c0 & 0x0000FFFF;
00350
00351 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00352
00353         /* Read x[7] */
00354         x3 = *(q31_t *) px++;
00355
00356         /* Perform the multiply-accumulates */
00357         acc0 = __SMLAD(x0, c0, acc0);
00358         acc1 = __SMLAD(x1, c0, acc1);
00359         acc2 = __SMLADX(x1, c0, acc2);
00360         acc3 = __SMLADX(x3, c0, acc3);
00361       }
00362
00363       if(k == 2u)
00364       {
00365         /* Read y[4], y[5] */
00366         c0 = *(pb);
00367
00368         /* Read x[7], x[8] */
00369         x3 = *(q31_t *) px++;
00370
00371         /* Read x[9] */
00372         x2 = *(q31_t *) px++;
00373
00374         /* Perform the multiply-accumulates */
00375         acc0 = __SMLAD(x0, c0, acc0);
00376         acc1 = __SMLAD(x1, c0, acc1);
00377         acc2 = __SMLAD(x3, c0, acc2);
00378         acc3 = __SMLAD(x2, c0, acc3);
00379       }
00380
00381       if(k == 3u)
00382       {
00383         /* Read y[4], y[5] */
00384         c0 = *pb++;
00385
00386         /* Read x[7], x[8] */
00387         x3 = *(q31_t *) px++;
00388
00389         /* Read x[9] */
00390         x2 = *(q31_t *) px++;
00391
00392         /* Perform the multiply-accumulates */
00393         acc0 = __SMLAD(x0, c0, acc0);
00394         acc1 = __SMLAD(x1, c0, acc1);
00395         acc2 = __SMLAD(x3, c0, acc2);
00396         acc3 = __SMLAD(x2, c0, acc3);
00397
00398         /* Read y[6] */
00399 #ifdef  ARM_MATH_BIG_ENDIAN
00400         c0 = (*pb);
00401         c0 = c0 & 0xFFFF0000;
00402
00403 #else
00404         c0 = (q15_t) (*pb);
00405         c0 = c0 & 0x0000FFFF;
00406
00407 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00408
00409         /* Read x[10] */
00410         x3 = *(q31_t *) px++;
00411
00412         /* Perform the multiply-accumulates */
00413         acc0 = __SMLADX(x1, c0, acc0);
00414         acc1 = __SMLAD(x2, c0, acc1);
00415         acc2 = __SMLADX(x2, c0, acc2);
00416         acc3 = __SMLADX(x3, c0, acc3);
00417       }
00418
00419       /* Store the result in the accumulator in the destination buffer. */
00420       *pOut = (q15_t) (acc0 >> 15);
00421       /* Destination pointer is updated according to the address modifier, inc */
00422       pOut += inc;
00423
00424       *pOut = (q15_t) (acc1 >> 15);
00425       pOut += inc;
00426
00427       *pOut = (q15_t) (acc2 >> 15);
00428       pOut += inc;
00429
00430       *pOut = (q15_t) (acc3 >> 15);
00431       pOut += inc;
00432
00433       /* Increment the pointer pIn1 index, count by 1 */
00434       count += 4u;
00435
00436       /* Update the inputA and inputB pointers for next MAC calculation */
00437       px = pIn1 + count;
00438       py = pIn2;
00439       pb = (q31_t *) (py);
00440
00441
00442       /* Decrement the loop counter */
00443       blkCnt--;
00444     }
00445
00446     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00447      ** No loop unrolling is used. */
00448     blkCnt = blockSize2 % 0x4u;
00449
00450     while(blkCnt > 0u)
00451     {
00452       /* Accumulator is made zero for every iteration */
00453       sum = 0;
00454
00455       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00456       k = srcBLen >> 2u;
00457
00458       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00459        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00460       while(k > 0u)
00461       {
00462         /* Perform the multiply-accumulates */
00463         sum += ((q31_t) * px++ * *py++);
00464         sum += ((q31_t) * px++ * *py++);
00465         sum += ((q31_t) * px++ * *py++);
00466         sum += ((q31_t) * px++ * *py++);
00467
00468         /* Decrement the loop counter */
00469         k--;
00470       }
00471
00472       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00473        ** No loop unrolling is used. */
00474       k = srcBLen % 0x4u;
00475
00476       while(k > 0u)
00477       {
00478         /* Perform the multiply-accumulates */
00479         sum += ((q31_t) * px++ * *py++);
00480
00481         /* Decrement the loop counter */
00482         k--;
00483       }
00484
00485       /* Store the result in the accumulator in the destination buffer. */
00486       *pOut = (q15_t) (sum >> 15);
00487       /* Destination pointer is updated according to the address modifier, inc */
00488       pOut += inc;
00489
00490       /* Increment the pointer pIn1 index, count by 1 */
00491       count++;
00492
00493       /* Update the inputA and inputB pointers for next MAC calculation */
00494       px = pIn1 + count;
00495       py = pIn2;
00496
00497       /* Decrement the loop counter */
00498       blkCnt--;
00499     }
00500   }
00501   else
00502   {
00503     /* If the srcBLen is not a multiple of 4,
00504      * the blockSize2 loop cannot be unrolled by 4 */
00505     blkCnt = blockSize2;
00506
00507     while(blkCnt > 0u)
00508     {
00509       /* Accumulator is made zero for every iteration */
00510       sum = 0;
00511
00512       /* Loop over srcBLen */
00513       k = srcBLen;
00514
00515       while(k > 0u)
00516       {
00517         /* Perform the multiply-accumulate */
00518         sum += ((q31_t) * px++ * *py++);
00519
00520         /* Decrement the loop counter */
00521         k--;
00522       }
00523
00524       /* Store the result in the accumulator in the destination buffer. */
00525       *pOut = (q15_t) (sum >> 15);
00526       /* Destination pointer is updated according to the address modifier, inc */
00527       pOut += inc;
00528
00529       /* Increment the MAC count */
00530       count++;
00531
00532       /* Update the inputA and inputB pointers for next MAC calculation */
00533       px = pIn1 + count;
00534       py = pIn2;
00535
00536       /* Decrement the loop counter */
00537       blkCnt--;
00538     }
00539   }
00540
00541   /* --------------------------
00542    * Initializations of stage3
00543    * -------------------------*/
00544
00545   /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00546    * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00547    * ....
00548    * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
00549    * sum +=  x[srcALen-1] * y[0]
00550    */
00551
00552   /* In this stage the MAC operations are decreased by 1 for every iteration.
00553      The count variable holds the number of MAC operations performed */
00554   count = srcBLen - 1u;
00555
00556   /* Working pointer of inputA */
00557   pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00558   px = pSrc1;
00559
00560   /* Working pointer of inputB */
00561   py = pIn2;
00562
00563   /* -------------------
00564    * Stage3 process
00565    * ------------------*/
00566
00567   while(blockSize3 > 0u)
00568   {
00569     /* Accumulator is made zero for every iteration */
00570     sum = 0;
00571
00572     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00573     k = count >> 2u;
00574
00575     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00576      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00577     while(k > 0u)
00578     {
00579       /* Perform the multiply-accumulates */
00580       /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */
00581       sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
00582       /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */
00583       sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
00584
00585       /* Decrement the loop counter */
00586       k--;
00587     }
00588
00589     /* If the count is not a multiple of 4, compute any remaining MACs here.
00590      ** No loop unrolling is used. */
00591     k = count % 0x4u;
00592
00593     while(k > 0u)
00594     {
00595       /* Perform the multiply-accumulates */
00596       sum = __SMLAD(*px++, *py++, sum);
00597
00598       /* Decrement the loop counter */
00599       k--;
00600     }
00601
00602     /* Store the result in the accumulator in the destination buffer. */
00603     *pOut = (q15_t) (sum >> 15);
00604     /* Destination pointer is updated according to the address modifier, inc */
00605     pOut += inc;
00606
00607     /* Update the inputA and inputB pointers for next MAC calculation */
00608     px = ++pSrc1;
00609     py = pIn2;
00610
00611     /* Decrement the MAC count */
00612     count--;
00613
00614     /* Decrement the loop counter */
00615     blockSize3--;
00616   }
00617
00618 }
00619
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CMSIS DSP Software Library: arm_correlate_fast_q31.c File Reference

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arm_correlate_fast_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_correlate_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
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CMSIS DSP Software Library: arm_correlate_fast_q31.c Source File

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arm_correlate_fast_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_correlate_fast_q31.c
00009 *
00010 * Description:  Fast Q31 Correlation.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00070 void arm_correlate_fast_q31(
00071   q31_t * pSrcA,
00072   uint32_t srcALen,
00073   q31_t * pSrcB,
00074   uint32_t srcBLen,
00075   q31_t * pDst)
00076 {
00077   q31_t *pIn1;                                   /* inputA pointer               */
00078   q31_t *pIn2;                                   /* inputB pointer               */
00079   q31_t *pOut = pDst;                            /* output pointer               */
00080   q31_t *px;                                     /* Intermediate inputA pointer  */
00081   q31_t *py;                                     /* Intermediate inputB pointer  */
00082   q31_t *pSrc1;                                  /* Intermediate pointers        */
00083   q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
00084   q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
00085   uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
00086   int32_t inc = 1;                               /* Destination address modifier */
00087
00088
00089   /* The algorithm implementation is based on the lengths of the inputs. */
00090   /* srcB is always made to slide across srcA. */
00091   /* So srcBLen is always considered as shorter or equal to srcALen */
00092   if(srcALen >= srcBLen)
00093   {
00094     /* Initialization of inputA pointer */
00095     pIn1 = (pSrcA);
00096
00097     /* Initialization of inputB pointer */
00098     pIn2 = (pSrcB);
00099
00100     /* Number of output samples is calculated */
00101     outBlockSize = (2u * srcALen) - 1u;
00102
00103     /* When srcALen > srcBLen, zero padding is done to srcB
00104      * to make their lengths equal.
00105      * Instead, (outBlockSize - (srcALen + srcBLen - 1))
00106      * number of output samples are made zero */
00107     j = outBlockSize - (srcALen + (srcBLen - 1u));
00108
00109     /* Updating the pointer position to non zero value */
00110     pOut += j;
00111
00112   }
00113   else
00114   {
00115     /* Initialization of inputA pointer */
00116     pIn1 = (pSrcB);
00117
00118     /* Initialization of inputB pointer */
00119     pIn2 = (pSrcA);
00120
00121     /* srcBLen is always considered as shorter or equal to srcALen */
00122     j = srcBLen;
00123     srcBLen = srcALen;
00124     srcALen = j;
00125
00126     /* CORR(x, y) = Reverse order(CORR(y, x)) */
00127     /* Hence set the destination pointer to point to the last output sample */
00128     pOut = pDst + ((srcALen + srcBLen) - 2u);
00129
00130     /* Destination address modifier is set to -1 */
00131     inc = -1;
00132
00133   }
00134
00135   /* The function is internally
00136    * divided into three parts according to the number of multiplications that has to be
00137    * taken place between inputA samples and inputB samples. In the first part of the
00138    * algorithm, the multiplications increase by one for every iteration.
00139    * In the second part of the algorithm, srcBLen number of multiplications are done.
00140    * In the third part of the algorithm, the multiplications decrease by one
00141    * for every iteration.*/
00142   /* The algorithm is implemented in three stages.
00143    * The loop counters of each stage is initiated here. */
00144   blockSize1 = srcBLen - 1u;
00145   blockSize2 = srcALen - (srcBLen - 1u);
00146   blockSize3 = blockSize1;
00147
00148   /* --------------------------
00149    * Initializations of stage1
00150    * -------------------------*/
00151
00152   /* sum = x[0] * y[srcBlen - 1]
00153    * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
00154    * ....
00155    * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
00156    */
00157
00158   /* In this stage the MAC operations are increased by 1 for every iteration.
00159      The count variable holds the number of MAC operations performed */
00160   count = 1u;
00161
00162   /* Working pointer of inputA */
00163   px = pIn1;
00164
00165   /* Working pointer of inputB */
00166   pSrc1 = pIn2 + (srcBLen - 1u);
00167   py = pSrc1;
00168
00169   /* ------------------------
00170    * Stage1 process
00171    * ----------------------*/
00172
00173   /* The first stage starts here */
00174   while(blockSize1 > 0u)
00175   {
00176     /* Accumulator is made zero for every iteration */
00177     sum = 0;
00178
00179     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00180     k = count >> 2;
00181
00182     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00183      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00184     while(k > 0u)
00185     {
00186       /* x[0] * y[srcBLen - 4] */
00187       sum = (q31_t) ((((q63_t) sum << 32) +
00188                       ((q63_t) * px++ * (*py++))) >> 32);
00189       /* x[1] * y[srcBLen - 3] */
00190       sum = (q31_t) ((((q63_t) sum << 32) +
00191                       ((q63_t) * px++ * (*py++))) >> 32);
00192       /* x[2] * y[srcBLen - 2] */
00193       sum = (q31_t) ((((q63_t) sum << 32) +
00194                       ((q63_t) * px++ * (*py++))) >> 32);
00195       /* x[3] * y[srcBLen - 1] */
00196       sum = (q31_t) ((((q63_t) sum << 32) +
00197                       ((q63_t) * px++ * (*py++))) >> 32);
00198
00199       /* Decrement the loop counter */
00200       k--;
00201     }
00202
00203     /* If the count is not a multiple of 4, compute any remaining MACs here.
00204      ** No loop unrolling is used. */
00205     k = count % 0x4u;
00206
00207     while(k > 0u)
00208     {
00209       /* Perform the multiply-accumulates */
00210       /* x[0] * y[srcBLen - 1] */
00211       sum = (q31_t) ((((q63_t) sum << 32) +
00212                       ((q63_t) * px++ * (*py++))) >> 32);
00213
00214       /* Decrement the loop counter */
00215       k--;
00216     }
00217
00218     /* Store the result in the accumulator in the destination buffer. */
00219     *pOut = sum << 1;
00220     /* Destination pointer is updated according to the address modifier, inc */
00221     pOut += inc;
00222
00223     /* Update the inputA and inputB pointers for next MAC calculation */
00224     py = pSrc1 - count;
00225     px = pIn1;
00226
00227     /* Increment the MAC count */
00228     count++;
00229
00230     /* Decrement the loop counter */
00231     blockSize1--;
00232   }
00233
00234   /* --------------------------
00235    * Initializations of stage2
00236    * ------------------------*/
00237
00238   /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
00239    * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
00240    * ....
00241    * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00242    */
00243
00244   /* Working pointer of inputA */
00245   px = pIn1;
00246
00247   /* Working pointer of inputB */
00248   py = pIn2;
00249
00250   /* count is index by which the pointer pIn1 to be incremented */
00251   count = 1u;
00252
00253   /* -------------------
00254    * Stage2 process
00255    * ------------------*/
00256
00257   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00258    * So, to loop unroll over blockSize2,
00259    * srcBLen should be greater than or equal to 4 */
00260   if(srcBLen >= 4u)
00261   {
00262     /* Loop unroll over blockSize2, by 4 */
00263     blkCnt = blockSize2 >> 2u;
00264
00265     while(blkCnt > 0u)
00266     {
00267       /* Set all accumulators to zero */
00268       acc0 = 0;
00269       acc1 = 0;
00270       acc2 = 0;
00271       acc3 = 0;
00272
00273       /* read x[0], x[1], x[2] samples */
00274       x0 = *(px++);
00275       x1 = *(px++);
00276       x2 = *(px++);
00277
00278       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00279       k = srcBLen >> 2u;
00280
00281       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00282        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00283       do
00284       {
00285         /* Read y[0] sample */
00286         c0 = *(py++);
00287
00288         /* Read x[3] sample */
00289         x3 = *(px++);
00290
00291         /* Perform the multiply-accumulate */
00292         /* acc0 +=  x[0] * y[0] */
00293         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
00294         /* acc1 +=  x[1] * y[0] */
00295         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
00296         /* acc2 +=  x[2] * y[0] */
00297         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
00298         /* acc3 +=  x[3] * y[0] */
00299         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
00300
00301         /* Read y[1] sample */
00302         c0 = *(py++);
00303
00304         /* Read x[4] sample */
00305         x0 = *(px++);
00306
00307         /* Perform the multiply-accumulates */
00308         /* acc0 +=  x[1] * y[1] */
00309         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
00310         /* acc1 +=  x[2] * y[1] */
00311         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32);
00312         /* acc2 +=  x[3] * y[1] */
00313         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32);
00314         /* acc3 +=  x[4] * y[1] */
00315         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
00316
00317         /* Read y[2] sample */
00318         c0 = *(py++);
00319
00320         /* Read x[5] sample */
00321         x1 = *(px++);
00322
00323         /* Perform the multiply-accumulates */
00324         /* acc0 +=  x[2] * y[2] */
00325         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32);
00326         /* acc1 +=  x[3] * y[2] */
00327         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32);
00328         /* acc2 +=  x[4] * y[2] */
00329         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32);
00330         /* acc3 +=  x[5] * y[2] */
00331         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
00332
00333         /* Read y[3] sample */
00334         c0 = *(py++);
00335
00336         /* Read x[6] sample */
00337         x2 = *(px++);
00338
00339         /* Perform the multiply-accumulates */
00340         /* acc0 +=  x[3] * y[3] */
00341         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32);
00342         /* acc1 +=  x[4] * y[3] */
00343         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32);
00344         /* acc2 +=  x[5] * y[3] */
00345         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32);
00346         /* acc3 +=  x[6] * y[3] */
00347         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
00348
00349
00350       } while(--k);
00351
00352       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00353        ** No loop unrolling is used. */
00354       k = srcBLen % 0x4u;
00355
00356       while(k > 0u)
00357       {
00358         /* Read y[4] sample */
00359         c0 = *(py++);
00360
00361         /* Read x[7] sample */
00362         x3 = *(px++);
00363
00364         /* Perform the multiply-accumulates */
00365         /* acc0 +=  x[4] * y[4] */
00366         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
00367         /* acc1 +=  x[5] * y[4] */
00368         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
00369         /* acc2 +=  x[6] * y[4] */
00370         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
00371         /* acc3 +=  x[7] * y[4] */
00372         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
00373
00374         /* Reuse the present samples for the next MAC */
00375         x0 = x1;
00376         x1 = x2;
00377         x2 = x3;
00378
00379         /* Decrement the loop counter */
00380         k--;
00381       }
00382
00383       /* Store the result in the accumulator in the destination buffer. */
00384       *pOut = (q31_t) (acc0 << 1);
00385       /* Destination pointer is updated according to the address modifier, inc */
00386       pOut += inc;
00387
00388       *pOut = (q31_t) (acc1 << 1);
00389       pOut += inc;
00390
00391       *pOut = (q31_t) (acc2 << 1);
00392       pOut += inc;
00393
00394       *pOut = (q31_t) (acc3 << 1);
00395       pOut += inc;
00396
00397       /* Update the inputA and inputB pointers for next MAC calculation */
00398       px = pIn1 + (count * 4u);
00399       py = pIn2;
00400
00401       /* Increment the pointer pIn1 index, count by 1 */
00402       count++;
00403
00404       /* Decrement the loop counter */
00405       blkCnt--;
00406     }
00407
00408     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00409      ** No loop unrolling is used. */
00410     blkCnt = blockSize2 % 0x4u;
00411
00412     while(blkCnt > 0u)
00413     {
00414       /* Accumulator is made zero for every iteration */
00415       sum = 0;
00416
00417       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00418       k = srcBLen >> 2u;
00419
00420       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00421        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00422       while(k > 0u)
00423       {
00424         /* Perform the multiply-accumulates */
00425         sum = (q31_t) ((((q63_t) sum << 32) +
00426                         ((q63_t) * px++ * (*py++))) >> 32);
00427         sum = (q31_t) ((((q63_t) sum << 32) +
00428                         ((q63_t) * px++ * (*py++))) >> 32);
00429         sum = (q31_t) ((((q63_t) sum << 32) +
00430                         ((q63_t) * px++ * (*py++))) >> 32);
00431         sum = (q31_t) ((((q63_t) sum << 32) +
00432                         ((q63_t) * px++ * (*py++))) >> 32);
00433
00434         /* Decrement the loop counter */
00435         k--;
00436       }
00437
00438       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00439        ** No loop unrolling is used. */
00440       k = srcBLen % 0x4u;
00441
00442       while(k > 0u)
00443       {
00444         /* Perform the multiply-accumulate */
00445         sum = (q31_t) ((((q63_t) sum << 32) +
00446                         ((q63_t) * px++ * (*py++))) >> 32);
00447
00448         /* Decrement the loop counter */
00449         k--;
00450       }
00451
00452       /* Store the result in the accumulator in the destination buffer. */
00453       *pOut = sum << 1;
00454       /* Destination pointer is updated according to the address modifier, inc */
00455       pOut += inc;
00456
00457       /* Update the inputA and inputB pointers for next MAC calculation */
00458       px = pIn1 + count;
00459       py = pIn2;
00460
00461       /* Increment the MAC count */
00462       count++;
00463
00464       /* Decrement the loop counter */
00465       blkCnt--;
00466     }
00467   }
00468   else
00469   {
00470     /* If the srcBLen is not a multiple of 4,
00471      * the blockSize2 loop cannot be unrolled by 4 */
00472     blkCnt = blockSize2;
00473
00474     while(blkCnt > 0u)
00475     {
00476       /* Accumulator is made zero for every iteration */
00477       sum = 0;
00478
00479       /* Loop over srcBLen */
00480       k = srcBLen;
00481
00482       while(k > 0u)
00483       {
00484         /* Perform the multiply-accumulate */
00485         sum = (q31_t) ((((q63_t) sum << 32) +
00486                         ((q63_t) * px++ * (*py++))) >> 32);
00487
00488         /* Decrement the loop counter */
00489         k--;
00490       }
00491
00492       /* Store the result in the accumulator in the destination buffer. */
00493       *pOut = sum << 1;
00494       /* Destination pointer is updated according to the address modifier, inc */
00495       pOut += inc;
00496
00497       /* Update the inputA and inputB pointers for next MAC calculation */
00498       px = pIn1 + count;
00499       py = pIn2;
00500
00501       /* Increment the MAC count */
00502       count++;
00503
00504       /* Decrement the loop counter */
00505       blkCnt--;
00506     }
00507   }
00508
00509   /* --------------------------
00510    * Initializations of stage3
00511    * -------------------------*/
00512
00513   /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00514    * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00515    * ....
00516    * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
00517    * sum +=  x[srcALen-1] * y[0]
00518    */
00519
00520   /* In this stage the MAC operations are decreased by 1 for every iteration.
00521      The count variable holds the number of MAC operations performed */
00522   count = srcBLen - 1u;
00523
00524   /* Working pointer of inputA */
00525   pSrc1 = ((pIn1 + srcALen) - srcBLen) + 1u;
00526   px = pSrc1;
00527
00528   /* Working pointer of inputB */
00529   py = pIn2;
00530
00531   /* -------------------
00532    * Stage3 process
00533    * ------------------*/
00534
00535   while(blockSize3 > 0u)
00536   {
00537     /* Accumulator is made zero for every iteration */
00538     sum = 0;
00539
00540     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00541     k = count >> 2u;
00542
00543     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00544      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00545     while(k > 0u)
00546     {
00547       /* Perform the multiply-accumulates */
00548       /* sum += x[srcALen - srcBLen + 4] * y[3] */
00549       sum = (q31_t) ((((q63_t) sum << 32) +
00550                       ((q63_t) * px++ * (*py++))) >> 32);
00551       /* sum += x[srcALen - srcBLen + 3] * y[2] */
00552       sum = (q31_t) ((((q63_t) sum << 32) +
00553                       ((q63_t) * px++ * (*py++))) >> 32);
00554       /* sum += x[srcALen - srcBLen + 2] * y[1] */
00555       sum = (q31_t) ((((q63_t) sum << 32) +
00556                       ((q63_t) * px++ * (*py++))) >> 32);
00557       /* sum += x[srcALen - srcBLen + 1] * y[0] */
00558       sum = (q31_t) ((((q63_t) sum << 32) +
00559                       ((q63_t) * px++ * (*py++))) >> 32);
00560
00561       /* Decrement the loop counter */
00562       k--;
00563     }
00564
00565     /* If the count is not a multiple of 4, compute any remaining MACs here.
00566      ** No loop unrolling is used. */
00567     k = count % 0x4u;
00568
00569     while(k > 0u)
00570     {
00571       /* Perform the multiply-accumulates */
00572       sum = (q31_t) ((((q63_t) sum << 32) +
00573                       ((q63_t) * px++ * (*py++))) >> 32);
00574
00575       /* Decrement the loop counter */
00576       k--;
00577     }
00578
00579     /* Store the result in the accumulator in the destination buffer. */
00580     *pOut = sum << 1;
00581     /* Destination pointer is updated according to the address modifier, inc */
00582     pOut += inc;
00583
00584     /* Update the inputA and inputB pointers for next MAC calculation */
00585     px = ++pSrc1;
00586     py = pIn2;
00587
00588     /* Decrement the MAC count */
00589     count--;
00590
00591     /* Decrement the loop counter */
00592     blockSize3--;
00593   }
00594
00595 }
00596
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CMSIS DSP Software Library: arm_correlate_q7.c File Reference

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arm_correlate_q7.c File Reference

#include "arm_math.h"

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Functions

void arm_correlate_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst)
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CMSIS DSP Software Library: arm_correlate_q7.c Source File

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arm_correlate_q7.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_correlate_q7.c
00009 *
00010 * Description:  Correlation of Q7 sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00065 void arm_correlate_q7(
00066   q7_t * pSrcA,
00067   uint32_t srcALen,
00068   q7_t * pSrcB,
00069   uint32_t srcBLen,
00070   q7_t * pDst)
00071 {
00072
00073
00074 #ifndef ARM_MATH_CM0
00075
00076   /* Run the below code for Cortex-M4 and Cortex-M3 */
00077
00078   q7_t *pIn1;                                    /* inputA pointer               */
00079   q7_t *pIn2;                                    /* inputB pointer               */
00080   q7_t *pOut = pDst;                             /* output pointer               */
00081   q7_t *px;                                      /* Intermediate inputA pointer  */
00082   q7_t *py;                                      /* Intermediate inputB pointer  */
00083   q7_t *pSrc1;                                   /* Intermediate pointers        */
00084   q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
00085   q31_t input1, input2;                          /* temporary variables */
00086   q15_t in1, in2;                                /* temporary variables */
00087   q7_t x0, x1, x2, x3, c0, c1;                   /* temporary variables for holding input and coefficient values */
00088   uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
00089   int32_t inc = 1;
00090
00091
00092   /* The algorithm implementation is based on the lengths of the inputs. */
00093   /* srcB is always made to slide across srcA. */
00094   /* So srcBLen is always considered as shorter or equal to srcALen */
00095   /* But CORR(x, y) is reverse of CORR(y, x) */
00096   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
00097   /* and the destination pointer modifier, inc is set to -1 */
00098   /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
00099   /* But to improve the performance,
00100    * we include zeroes in the output instead of zero padding either of the the inputs*/
00101   /* If srcALen > srcBLen,
00102    * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
00103   /* If srcALen < srcBLen,
00104    * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
00105   if(srcALen >= srcBLen)
00106   {
00107     /* Initialization of inputA pointer */
00108     pIn1 = (pSrcA);
00109
00110     /* Initialization of inputB pointer */
00111     pIn2 = (pSrcB);
00112
00113     /* Number of output samples is calculated */
00114     outBlockSize = (2u * srcALen) - 1u;
00115
00116     /* When srcALen > srcBLen, zero padding is done to srcB
00117      * to make their lengths equal.
00118      * Instead, (outBlockSize - (srcALen + srcBLen - 1))
00119      * number of output samples are made zero */
00120     j = outBlockSize - (srcALen + (srcBLen - 1u));
00121
00122     /* Updating the pointer position to non zero value */
00123     pOut += j;
00124
00125   }
00126   else
00127   {
00128     /* Initialization of inputA pointer */
00129     pIn1 = (pSrcB);
00130
00131     /* Initialization of inputB pointer */
00132     pIn2 = (pSrcA);
00133
00134     /* srcBLen is always considered as shorter or equal to srcALen */
00135     j = srcBLen;
00136     srcBLen = srcALen;
00137     srcALen = j;
00138
00139     /* CORR(x, y) = Reverse order(CORR(y, x)) */
00140     /* Hence set the destination pointer to point to the last output sample */
00141     pOut = pDst + ((srcALen + srcBLen) - 2u);
00142
00143     /* Destination address modifier is set to -1 */
00144     inc = -1;
00145
00146   }
00147
00148   /* The function is internally
00149    * divided into three parts according to the number of multiplications that has to be
00150    * taken place between inputA samples and inputB samples. In the first part of the
00151    * algorithm, the multiplications increase by one for every iteration.
00152    * In the second part of the algorithm, srcBLen number of multiplications are done.
00153    * In the third part of the algorithm, the multiplications decrease by one
00154    * for every iteration.*/
00155   /* The algorithm is implemented in three stages.
00156    * The loop counters of each stage is initiated here. */
00157   blockSize1 = srcBLen - 1u;
00158   blockSize2 = srcALen - (srcBLen - 1u);
00159   blockSize3 = blockSize1;
00160
00161   /* --------------------------
00162    * Initializations of stage1
00163    * -------------------------*/
00164
00165   /* sum = x[0] * y[srcBlen - 1]
00166    * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
00167    * ....
00168    * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
00169    */
00170
00171   /* In this stage the MAC operations are increased by 1 for every iteration.
00172      The count variable holds the number of MAC operations performed */
00173   count = 1u;
00174
00175   /* Working pointer of inputA */
00176   px = pIn1;
00177
00178   /* Working pointer of inputB */
00179   pSrc1 = pIn2 + (srcBLen - 1u);
00180   py = pSrc1;
00181
00182   /* ------------------------
00183    * Stage1 process
00184    * ----------------------*/
00185
00186   /* The first stage starts here */
00187   while(blockSize1 > 0u)
00188   {
00189     /* Accumulator is made zero for every iteration */
00190     sum = 0;
00191
00192     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00193     k = count >> 2;
00194
00195     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00196      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00197     while(k > 0u)
00198     {
00199       /* x[0] , x[1] */
00200       in1 = (q15_t) * px++;
00201       in2 = (q15_t) * px++;
00202       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00203
00204       /* y[srcBLen - 4] , y[srcBLen - 3] */
00205       in1 = (q15_t) * py++;
00206       in2 = (q15_t) * py++;
00207       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00208
00209       /* x[0] * y[srcBLen - 4] */
00210       /* x[1] * y[srcBLen - 3] */
00211       sum = __SMLAD(input1, input2, sum);
00212
00213       /* x[2] , x[3] */
00214       in1 = (q15_t) * px++;
00215       in2 = (q15_t) * px++;
00216       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00217
00218       /* y[srcBLen - 2] , y[srcBLen - 1] */
00219       in1 = (q15_t) * py++;
00220       in2 = (q15_t) * py++;
00221       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00222
00223       /* x[2] * y[srcBLen - 2] */
00224       /* x[3] * y[srcBLen - 1] */
00225       sum = __SMLAD(input1, input2, sum);
00226
00227
00228       /* Decrement the loop counter */
00229       k--;
00230     }
00231
00232     /* If the count is not a multiple of 4, compute any remaining MACs here.
00233      ** No loop unrolling is used. */
00234     k = count % 0x4u;
00235
00236     while(k > 0u)
00237     {
00238       /* Perform the multiply-accumulates */
00239       /* x[0] * y[srcBLen - 1] */
00240       sum += (q31_t) ((q15_t) * px++ * *py++);
00241
00242       /* Decrement the loop counter */
00243       k--;
00244     }
00245
00246     /* Store the result in the accumulator in the destination buffer. */
00247     *pOut = (q7_t) (__SSAT(sum >> 7, 8));
00248     /* Destination pointer is updated according to the address modifier, inc */
00249     pOut += inc;
00250
00251     /* Update the inputA and inputB pointers for next MAC calculation */
00252     py = pSrc1 - count;
00253     px = pIn1;
00254
00255     /* Increment the MAC count */
00256     count++;
00257
00258     /* Decrement the loop counter */
00259     blockSize1--;
00260   }
00261
00262   /* --------------------------
00263    * Initializations of stage2
00264    * ------------------------*/
00265
00266   /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
00267    * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
00268    * ....
00269    * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00270    */
00271
00272   /* Working pointer of inputA */
00273   px = pIn1;
00274
00275   /* Working pointer of inputB */
00276   py = pIn2;
00277
00278   /* count is index by which the pointer pIn1 to be incremented */
00279   count = 1u;
00280
00281   /* -------------------
00282    * Stage2 process
00283    * ------------------*/
00284
00285   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00286    * So, to loop unroll over blockSize2,
00287    * srcBLen should be greater than or equal to 4 */
00288   if(srcBLen >= 4u)
00289   {
00290     /* Loop unroll over blockSize2, by 4 */
00291     blkCnt = blockSize2 >> 2u;
00292
00293     while(blkCnt > 0u)
00294     {
00295       /* Set all accumulators to zero */
00296       acc0 = 0;
00297       acc1 = 0;
00298       acc2 = 0;
00299       acc3 = 0;
00300
00301       /* read x[0], x[1], x[2] samples */
00302       x0 = *px++;
00303       x1 = *px++;
00304       x2 = *px++;
00305
00306       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00307       k = srcBLen >> 2u;
00308
00309       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00310        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00311       do
00312       {
00313         /* Read y[0] sample */
00314         c0 = *py++;
00315         /* Read y[1] sample */
00316         c1 = *py++;
00317
00318         /* Read x[3] sample */
00319         x3 = *px++;
00320
00321         /* x[0] and x[1] are packed */
00322         in1 = (q15_t) x0;
00323         in2 = (q15_t) x1;
00324
00325         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00326
00327         /* y[0] and y[1] are packed */
00328         in1 = (q15_t) c0;
00329         in2 = (q15_t) c1;
00330
00331         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00332
00333         /* acc0 += x[0] * y[0] + x[1] * y[1]  */
00334         acc0 = __SMLAD(input1, input2, acc0);
00335
00336         /* x[1] and x[2] are packed */
00337         in1 = (q15_t) x1;
00338         in2 = (q15_t) x2;
00339
00340         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00341
00342         /* acc1 += x[1] * y[0] + x[2] * y[1] */
00343         acc1 = __SMLAD(input1, input2, acc1);
00344
00345         /* x[2] and x[3] are packed */
00346         in1 = (q15_t) x2;
00347         in2 = (q15_t) x3;
00348
00349         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00350
00351         /* acc2 += x[2] * y[0] + x[3] * y[1]  */
00352         acc2 = __SMLAD(input1, input2, acc2);
00353
00354         /* Read x[4] sample */
00355         x0 = *(px++);
00356
00357         /* x[3] and x[4] are packed */
00358         in1 = (q15_t) x3;
00359         in2 = (q15_t) x0;
00360
00361         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00362
00363         /* acc3 += x[3] * y[0] + x[4] * y[1]  */
00364         acc3 = __SMLAD(input1, input2, acc3);
00365
00366         /* Read y[2] sample */
00367         c0 = *py++;
00368         /* Read y[3] sample */
00369         c1 = *py++;
00370
00371         /* Read x[5] sample */
00372         x1 = *px++;
00373
00374         /* x[2] and x[3] are packed */
00375         in1 = (q15_t) x2;
00376         in2 = (q15_t) x3;
00377
00378         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00379
00380         /* y[2] and y[3] are packed */
00381         in1 = (q15_t) c0;
00382         in2 = (q15_t) c1;
00383
00384         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00385
00386         /* acc0 += x[2] * y[2] + x[3] * y[3]  */
00387         acc0 = __SMLAD(input1, input2, acc0);
00388
00389         /* x[3] and x[4] are packed */
00390         in1 = (q15_t) x3;
00391         in2 = (q15_t) x0;
00392
00393         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00394
00395         /* acc1 += x[3] * y[2] + x[4] * y[3]  */
00396         acc1 = __SMLAD(input1, input2, acc1);
00397
00398         /* x[4] and x[5] are packed */
00399         in1 = (q15_t) x0;
00400         in2 = (q15_t) x1;
00401
00402         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00403
00404         /* acc2 += x[4] * y[2] + x[5] * y[3]  */
00405         acc2 = __SMLAD(input1, input2, acc2);
00406
00407         /* Read x[6] sample */
00408         x2 = *px++;
00409
00410         /* x[5] and x[6] are packed */
00411         in1 = (q15_t) x1;
00412         in2 = (q15_t) x2;
00413
00414         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00415
00416         /* acc3 += x[5] * y[2] + x[6] * y[3]  */
00417         acc3 = __SMLAD(input1, input2, acc3);
00418
00419       } while(--k);
00420
00421       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00422        ** No loop unrolling is used. */
00423       k = srcBLen % 0x4u;
00424
00425       while(k > 0u)
00426       {
00427         /* Read y[4] sample */
00428         c0 = *py++;
00429
00430         /* Read x[7] sample */
00431         x3 = *px++;
00432
00433         /* Perform the multiply-accumulates */
00434         /* acc0 +=  x[4] * y[4] */
00435         acc0 += ((q15_t) x0 * c0);
00436         /* acc1 +=  x[5] * y[4] */
00437         acc1 += ((q15_t) x1 * c0);
00438         /* acc2 +=  x[6] * y[4] */
00439         acc2 += ((q15_t) x2 * c0);
00440         /* acc3 +=  x[7] * y[4] */
00441         acc3 += ((q15_t) x3 * c0);
00442
00443         /* Reuse the present samples for the next MAC */
00444         x0 = x1;
00445         x1 = x2;
00446         x2 = x3;
00447
00448         /* Decrement the loop counter */
00449         k--;
00450       }
00451
00452       /* Store the result in the accumulator in the destination buffer. */
00453       *pOut = (q7_t) (__SSAT(acc0 >> 7, 8));
00454       /* Destination pointer is updated according to the address modifier, inc */
00455       pOut += inc;
00456
00457       *pOut = (q7_t) (__SSAT(acc1 >> 7, 8));
00458       pOut += inc;
00459
00460       *pOut = (q7_t) (__SSAT(acc2 >> 7, 8));
00461       pOut += inc;
00462
00463       *pOut = (q7_t) (__SSAT(acc3 >> 7, 8));
00464       pOut += inc;
00465
00466       /* Update the inputA and inputB pointers for next MAC calculation */
00467       px = pIn1 + (count * 4u);
00468       py = pIn2;
00469
00470       /* Increment the pointer pIn1 index, count by 1 */
00471       count++;
00472
00473       /* Decrement the loop counter */
00474       blkCnt--;
00475     }
00476
00477     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00478      ** No loop unrolling is used. */
00479     blkCnt = blockSize2 % 0x4u;
00480
00481     while(blkCnt > 0u)
00482     {
00483       /* Accumulator is made zero for every iteration */
00484       sum = 0;
00485
00486       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00487       k = srcBLen >> 2u;
00488
00489       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00490        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00491       while(k > 0u)
00492       {
00493         /* Reading two inputs of SrcA buffer and packing */
00494         in1 = (q15_t) * px++;
00495         in2 = (q15_t) * px++;
00496         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00497
00498         /* Reading two inputs of SrcB buffer and packing */
00499         in1 = (q15_t) * py++;
00500         in2 = (q15_t) * py++;
00501         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00502
00503         /* Perform the multiply-accumulates */
00504         sum = __SMLAD(input1, input2, sum);
00505
00506         /* Reading two inputs of SrcA buffer and packing */
00507         in1 = (q15_t) * px++;
00508         in2 = (q15_t) * px++;
00509         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00510
00511         /* Reading two inputs of SrcB buffer and packing */
00512         in1 = (q15_t) * py++;
00513         in2 = (q15_t) * py++;
00514         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00515
00516         /* Perform the multiply-accumulates */
00517         sum = __SMLAD(input1, input2, sum);
00518
00519         /* Decrement the loop counter */
00520         k--;
00521       }
00522
00523       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00524        ** No loop unrolling is used. */
00525       k = srcBLen % 0x4u;
00526
00527       while(k > 0u)
00528       {
00529         /* Perform the multiply-accumulates */
00530         sum += ((q15_t) * px++ * *py++);
00531
00532         /* Decrement the loop counter */
00533         k--;
00534       }
00535
00536       /* Store the result in the accumulator in the destination buffer. */
00537       *pOut = (q7_t) (__SSAT(sum >> 7, 8));
00538       /* Destination pointer is updated according to the address modifier, inc */
00539       pOut += inc;
00540
00541       /* Update the inputA and inputB pointers for next MAC calculation */
00542       px = pIn1 + count;
00543       py = pIn2;
00544
00545       /* Increment the pointer pIn1 index, count by 1 */
00546       count++;
00547
00548       /* Decrement the loop counter */
00549       blkCnt--;
00550     }
00551   }
00552   else
00553   {
00554     /* If the srcBLen is not a multiple of 4,
00555      * the blockSize2 loop cannot be unrolled by 4 */
00556     blkCnt = blockSize2;
00557
00558     while(blkCnt > 0u)
00559     {
00560       /* Accumulator is made zero for every iteration */
00561       sum = 0;
00562
00563       /* Loop over srcBLen */
00564       k = srcBLen;
00565
00566       while(k > 0u)
00567       {
00568         /* Perform the multiply-accumulate */
00569         sum += ((q15_t) * px++ * *py++);
00570
00571         /* Decrement the loop counter */
00572         k--;
00573       }
00574
00575       /* Store the result in the accumulator in the destination buffer. */
00576       *pOut = (q7_t) (__SSAT(sum >> 7, 8));
00577       /* Destination pointer is updated according to the address modifier, inc */
00578       pOut += inc;
00579
00580       /* Update the inputA and inputB pointers for next MAC calculation */
00581       px = pIn1 + count;
00582       py = pIn2;
00583
00584       /* Increment the MAC count */
00585       count++;
00586
00587       /* Decrement the loop counter */
00588       blkCnt--;
00589     }
00590   }
00591
00592   /* --------------------------
00593    * Initializations of stage3
00594    * -------------------------*/
00595
00596   /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00597    * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00598    * ....
00599    * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
00600    * sum +=  x[srcALen-1] * y[0]
00601    */
00602
00603   /* In this stage the MAC operations are decreased by 1 for every iteration.
00604      The count variable holds the number of MAC operations performed */
00605   count = srcBLen - 1u;
00606
00607   /* Working pointer of inputA */
00608   pSrc1 = pIn1 + (srcALen - (srcBLen - 1u));
00609   px = pSrc1;
00610
00611   /* Working pointer of inputB */
00612   py = pIn2;
00613
00614   /* -------------------
00615    * Stage3 process
00616    * ------------------*/
00617
00618   while(blockSize3 > 0u)
00619   {
00620     /* Accumulator is made zero for every iteration */
00621     sum = 0;
00622
00623     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00624     k = count >> 2u;
00625
00626     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00627      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00628     while(k > 0u)
00629     {
00630       /* x[srcALen - srcBLen + 1] , x[srcALen - srcBLen + 2]  */
00631       in1 = (q15_t) * px++;
00632       in2 = (q15_t) * px++;
00633       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00634
00635       /* y[0] , y[1] */
00636       in1 = (q15_t) * py++;
00637       in2 = (q15_t) * py++;
00638       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00639
00640       /* sum += x[srcALen - srcBLen + 1] * y[0] */
00641       /* sum += x[srcALen - srcBLen + 2] * y[1] */
00642       sum = __SMLAD(input1, input2, sum);
00643
00644       /* x[srcALen - srcBLen + 3] , x[srcALen - srcBLen + 4] */
00645       in1 = (q15_t) * px++;
00646       in2 = (q15_t) * px++;
00647       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00648
00649       /* y[2] , y[3] */
00650       in1 = (q15_t) * py++;
00651       in2 = (q15_t) * py++;
00652       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00653
00654       /* sum += x[srcALen - srcBLen + 3] * y[2] */
00655       /* sum += x[srcALen - srcBLen + 4] * y[3] */
00656       sum = __SMLAD(input1, input2, sum);
00657
00658       /* Decrement the loop counter */
00659       k--;
00660     }
00661
00662     /* If the count is not a multiple of 4, compute any remaining MACs here.
00663      ** No loop unrolling is used. */
00664     k = count % 0x4u;
00665
00666     while(k > 0u)
00667     {
00668       /* Perform the multiply-accumulates */
00669       sum += ((q15_t) * px++ * *py++);
00670
00671       /* Decrement the loop counter */
00672       k--;
00673     }
00674
00675     /* Store the result in the accumulator in the destination buffer. */
00676     *pOut = (q7_t) (__SSAT(sum >> 7, 8));
00677     /* Destination pointer is updated according to the address modifier, inc */
00678     pOut += inc;
00679
00680     /* Update the inputA and inputB pointers for next MAC calculation */
00681     px = ++pSrc1;
00682     py = pIn2;
00683
00684     /* Decrement the MAC count */
00685     count--;
00686
00687     /* Decrement the loop counter */
00688     blockSize3--;
00689   }
00690
00691 #else
00692
00693 /* Run the below code for Cortex-M0 */
00694
00695   q7_t *pIn1 = pSrcA;                            /* inputA pointer */
00696   q7_t *pIn2 = pSrcB + (srcBLen - 1u);           /* inputB pointer */
00697   q31_t sum;                                     /* Accumulator */
00698   uint32_t i = 0u, j;                            /* loop counters */
00699   uint32_t inv = 0u;                             /* Reverse order flag */
00700   uint32_t tot = 0u;                             /* Length */
00701
00702   /* The algorithm implementation is based on the lengths of the inputs. */
00703   /* srcB is always made to slide across srcA. */
00704   /* So srcBLen is always considered as shorter or equal to srcALen */
00705   /* But CORR(x, y) is reverse of CORR(y, x) */
00706   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
00707   /* and a varaible, inv is set to 1 */
00708   /* If lengths are not equal then zero pad has to be done to  make the two
00709    * inputs of same length. But to improve the performance, we include zeroes
00710    * in the output instead of zero padding either of the the inputs*/
00711   /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
00712    * starting of the output buffer */
00713   /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
00714    * ending of the output buffer */
00715   /* Once the zero padding is done the remaining of the output is calcualted
00716    * using convolution but with the shorter signal time shifted. */
00717
00718   /* Calculate the length of the remaining sequence */
00719   tot = ((srcALen + srcBLen) - 2u);
00720
00721   if(srcALen > srcBLen)
00722   {
00723     /* Calculating the number of zeros to be padded to the output */
00724     j = srcALen - srcBLen;
00725
00726     /* Initialise the pointer after zero padding */
00727     pDst += j;
00728   }
00729
00730   else if(srcALen < srcBLen)
00731   {
00732     /* Initialization to inputB pointer */
00733     pIn1 = pSrcB;
00734
00735     /* Initialization to the end of inputA pointer */
00736     pIn2 = pSrcA + (srcALen - 1u);
00737
00738     /* Initialisation of the pointer after zero padding */
00739     pDst = pDst + tot;
00740
00741     /* Swapping the lengths */
00742     j = srcALen;
00743     srcALen = srcBLen;
00744     srcBLen = j;
00745
00746     /* Setting the reverse flag */
00747     inv = 1;
00748
00749   }
00750
00751   /* Loop to calculate convolution for output length number of times */
00752   for (i = 0u; i <= tot; i++)
00753   {
00754     /* Initialize sum with zero to carry on MAC operations */
00755     sum = 0;
00756
00757     /* Loop to perform MAC operations according to convolution equation */
00758     for (j = 0u; j <= i; j++)
00759     {
00760       /* Check the array limitations */
00761       if((((i - j) < srcBLen) && (j < srcALen)))
00762       {
00763         /* z[i] += x[i-j] * y[j] */
00764         sum += ((q15_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
00765       }
00766     }
00767     /* Store the output in the destination buffer */
00768     if(inv == 1)
00769       *pDst-- = (q7_t) __SSAT((sum >> 7u), 8u);
00770     else
00771       *pDst++ = (q7_t) __SSAT((sum >> 7u), 8u);
00772   }
00773
00774 #endif /*   #ifndef ARM_MATH_CM0 */
00775
00776 }
00777
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CMSIS DSP Software Library: arm_correlate_q15.c File Reference

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arm_correlate_q15.c File Reference

#include "arm_math.h"

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Functions

void arm_correlate_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
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CMSIS DSP Software Library: arm_correlate_q15.c Source File

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arm_correlate_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_correlate_q15.c
00009 *
00010 * Description:  Correlation of Q15 sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00068 void arm_correlate_q15(
00069   q15_t * pSrcA,
00070   uint32_t srcALen,
00071   q15_t * pSrcB,
00072   uint32_t srcBLen,
00073   q15_t * pDst)
00074 {
00075
00076 #ifndef ARM_MATH_CM0
00077
00078   /* Run the below code for Cortex-M4 and Cortex-M3 */
00079
00080   q15_t *pIn1;                                   /* inputA pointer               */
00081   q15_t *pIn2;                                   /* inputB pointer               */
00082   q15_t *pOut = pDst;                            /* output pointer               */
00083   q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
00084   q15_t *px;                                     /* Intermediate inputA pointer  */
00085   q15_t *py;                                     /* Intermediate inputB pointer  */
00086   q15_t *pSrc1;                                  /* Intermediate pointers        */
00087   q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
00088   uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
00089   int32_t inc = 1;                               /* Destination address modifier */
00090   q31_t *pb;                                     /* 32 bit pointer for inputB buffer */
00091
00092
00093   /* The algorithm implementation is based on the lengths of the inputs. */
00094   /* srcB is always made to slide across srcA. */
00095   /* So srcBLen is always considered as shorter or equal to srcALen */
00096   /* But CORR(x, y) is reverse of CORR(y, x) */
00097   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
00098   /* and the destination pointer modifier, inc is set to -1 */
00099   /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
00100   /* But to improve the performance,
00101    * we include zeroes in the output instead of zero padding either of the the inputs*/
00102   /* If srcALen > srcBLen,
00103    * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
00104   /* If srcALen < srcBLen,
00105    * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
00106   if(srcALen >= srcBLen)
00107   {
00108     /* Initialization of inputA pointer */
00109     pIn1 = (pSrcA);
00110
00111     /* Initialization of inputB pointer */
00112     pIn2 = (pSrcB);
00113
00114     /* Number of output samples is calculated */
00115     outBlockSize = (2u * srcALen) - 1u;
00116
00117     /* When srcALen > srcBLen, zero padding is done to srcB
00118      * to make their lengths equal.
00119      * Instead, (outBlockSize - (srcALen + srcBLen - 1))
00120      * number of output samples are made zero */
00121     j = outBlockSize - (srcALen + (srcBLen - 1u));
00122
00123     /* Updating the pointer position to non zero value */
00124     pOut += j;
00125
00126   }
00127   else
00128   {
00129     /* Initialization of inputA pointer */
00130     pIn1 = (pSrcB);
00131
00132     /* Initialization of inputB pointer */
00133     pIn2 = (pSrcA);
00134
00135     /* srcBLen is always considered as shorter or equal to srcALen */
00136     j = srcBLen;
00137     srcBLen = srcALen;
00138     srcALen = j;
00139
00140     /* CORR(x, y) = Reverse order(CORR(y, x)) */
00141     /* Hence set the destination pointer to point to the last output sample */
00142     pOut = pDst + ((srcALen + srcBLen) - 2u);
00143
00144     /* Destination address modifier is set to -1 */
00145     inc = -1;
00146
00147   }
00148
00149   /* The function is internally
00150    * divided into three parts according to the number of multiplications that has to be
00151    * taken place between inputA samples and inputB samples. In the first part of the
00152    * algorithm, the multiplications increase by one for every iteration.
00153    * In the second part of the algorithm, srcBLen number of multiplications are done.
00154    * In the third part of the algorithm, the multiplications decrease by one
00155    * for every iteration.*/
00156   /* The algorithm is implemented in three stages.
00157    * The loop counters of each stage is initiated here. */
00158   blockSize1 = srcBLen - 1u;
00159   blockSize2 = srcALen - (srcBLen - 1u);
00160   blockSize3 = blockSize1;
00161
00162   /* --------------------------
00163    * Initializations of stage1
00164    * -------------------------*/
00165
00166   /* sum = x[0] * y[srcBlen - 1]
00167    * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
00168    * ....
00169    * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
00170    */
00171
00172   /* In this stage the MAC operations are increased by 1 for every iteration.
00173      The count variable holds the number of MAC operations performed */
00174   count = 1u;
00175
00176   /* Working pointer of inputA */
00177   px = pIn1;
00178
00179   /* Working pointer of inputB */
00180   pSrc1 = pIn2 + (srcBLen - 1u);
00181   py = pSrc1;
00182
00183   /* ------------------------
00184    * Stage1 process
00185    * ----------------------*/
00186
00187   /* The first loop starts here */
00188   while(blockSize1 > 0u)
00189   {
00190     /* Accumulator is made zero for every iteration */
00191     sum = 0;
00192
00193     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00194     k = count >> 2;
00195
00196     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00197      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00198     while(k > 0u)
00199     {
00200       /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
00201       sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
00202       /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */
00203       sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
00204
00205       /* Decrement the loop counter */
00206       k--;
00207     }
00208
00209     /* If the count is not a multiple of 4, compute any remaining MACs here.
00210      ** No loop unrolling is used. */
00211     k = count % 0x4u;
00212
00213     while(k > 0u)
00214     {
00215       /* Perform the multiply-accumulates */
00216       /* x[0] * y[srcBLen - 1] */
00217       sum = __SMLALD(*px++, *py++, sum);
00218
00219       /* Decrement the loop counter */
00220       k--;
00221     }
00222
00223     /* Store the result in the accumulator in the destination buffer. */
00224     *pOut = (q15_t) (__SSAT((sum >> 15), 16));
00225     /* Destination pointer is updated according to the address modifier, inc */
00226     pOut += inc;
00227
00228     /* Update the inputA and inputB pointers for next MAC calculation */
00229     py = pSrc1 - count;
00230     px = pIn1;
00231
00232     /* Increment the MAC count */
00233     count++;
00234
00235     /* Decrement the loop counter */
00236     blockSize1--;
00237   }
00238
00239   /* --------------------------
00240    * Initializations of stage2
00241    * ------------------------*/
00242
00243   /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
00244    * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
00245    * ....
00246    * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00247    */
00248
00249   /* Working pointer of inputA */
00250   px = pIn1;
00251
00252   /* Working pointer of inputB */
00253   py = pIn2;
00254
00255   /* Initialize inputB pointer of type q31 */
00256   pb = (q31_t *) (py);
00257
00258   /* count is index by which the pointer pIn1 to be incremented */
00259   count = 0u;
00260
00261   /* -------------------
00262    * Stage2 process
00263    * ------------------*/
00264
00265   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00266    * So, to loop unroll over blockSize2,
00267    * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
00268   if(srcBLen >= 4u)
00269   {
00270     /* Loop unroll over blockSize2, by 4 */
00271     blkCnt = blockSize2 >> 2u;
00272
00273     while(blkCnt > 0u)
00274     {
00275       /* Set all accumulators to zero */
00276       acc0 = 0;
00277       acc1 = 0;
00278       acc2 = 0;
00279       acc3 = 0;
00280
00281       /* read x[0], x[1] samples */
00282       x0 = *(q31_t *) (px++);
00283       /* read x[1], x[2] samples */
00284       x1 = *(q31_t *) (px++);
00285
00286       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00287       k = srcBLen >> 2u;
00288
00289       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00290        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00291       do
00292       {
00293         /* Read the first two inputB samples using SIMD:
00294          * y[0] and y[1] */
00295         c0 = *(pb++);
00296
00297         /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
00298         acc0 = __SMLALD(x0, c0, acc0);
00299
00300         /* acc1 +=  x[1] * y[0] + x[2] * y[1] */
00301         acc1 = __SMLALD(x1, c0, acc1);
00302
00303         /* Read x[2], x[3] */
00304         x2 = *(q31_t *) (px++);
00305
00306         /* Read x[3], x[4] */
00307         x3 = *(q31_t *) (px++);
00308
00309         /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
00310         acc2 = __SMLALD(x2, c0, acc2);
00311
00312         /* acc3 +=  x[3] * y[0] + x[4] * y[1] */
00313         acc3 = __SMLALD(x3, c0, acc3);
00314
00315         /* Read y[2] and y[3] */
00316         c0 = *(pb++);
00317
00318         /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
00319         acc0 = __SMLALD(x2, c0, acc0);
00320
00321         /* acc1 +=  x[3] * y[2] + x[4] * y[3] */
00322         acc1 = __SMLALD(x3, c0, acc1);
00323
00324         /* Read x[4], x[5] */
00325         x0 = *(q31_t *) (px++);
00326
00327         /* Read x[5], x[6] */
00328         x1 = *(q31_t *) (px++);
00329
00330         /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
00331         acc2 = __SMLALD(x0, c0, acc2);
00332
00333         /* acc3 +=  x[5] * y[2] + x[6] * y[3] */
00334         acc3 = __SMLALD(x1, c0, acc3);
00335
00336       } while(--k);
00337
00338       /* For the next MAC operations, SIMD is not used
00339        * So, the 16 bit pointer if inputB, py is updated */
00340       py = (q15_t *) (pb);
00341
00342       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00343        ** No loop unrolling is used. */
00344       k = srcBLen % 0x4u;
00345
00346       if(k == 1u)
00347       {
00348         /* Read y[4] */
00349         c0 = *py;
00350 #ifdef  ARM_MATH_BIG_ENDIAN
00351
00352         c0 = c0 << 16u;
00353
00354 #else
00355
00356         c0 = c0 & 0x0000FFFF;
00357
00358 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00359         /* Read x[7] */
00360         x3 = *(q31_t *) px++;
00361
00362         /* Perform the multiply-accumulates */
00363         acc0 = __SMLALD(x0, c0, acc0);
00364         acc1 = __SMLALD(x1, c0, acc1);
00365         acc2 = __SMLALDX(x1, c0, acc2);
00366         acc3 = __SMLALDX(x3, c0, acc3);
00367       }
00368
00369       if(k == 2u)
00370       {
00371         /* Read y[4], y[5] */
00372         c0 = *(pb);
00373
00374         /* Read x[7], x[8] */
00375         x3 = *(q31_t *) px++;
00376
00377         /* Read x[9] */
00378         x2 = *(q31_t *) px++;
00379
00380         /* Perform the multiply-accumulates */
00381         acc0 = __SMLALD(x0, c0, acc0);
00382         acc1 = __SMLALD(x1, c0, acc1);
00383         acc2 = __SMLALD(x3, c0, acc2);
00384         acc3 = __SMLALD(x2, c0, acc3);
00385       }
00386
00387       if(k == 3u)
00388       {
00389         /* Read y[4], y[5] */
00390         c0 = *pb++;
00391
00392         /* Read x[7], x[8] */
00393         x3 = *(q31_t *) px++;
00394
00395         /* Read x[9] */
00396         x2 = *(q31_t *) px++;
00397
00398         /* Perform the multiply-accumulates */
00399         acc0 = __SMLALD(x0, c0, acc0);
00400         acc1 = __SMLALD(x1, c0, acc1);
00401         acc2 = __SMLALD(x3, c0, acc2);
00402         acc3 = __SMLALD(x2, c0, acc3);
00403
00404         /* Read y[6] */
00405 #ifdef  ARM_MATH_BIG_ENDIAN
00406
00407         c0 = (*pb);
00408         c0 = c0 & 0xFFFF0000;
00409
00410 #else
00411
00412         c0 = (q15_t) (*pb);
00413         c0 = c0 & 0x0000FFFF;
00414
00415 #endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
00416         /* Read x[10] */
00417         x3 = *(q31_t *) px++;
00418
00419         /* Perform the multiply-accumulates */
00420         acc0 = __SMLALDX(x1, c0, acc0);
00421         acc1 = __SMLALD(x2, c0, acc1);
00422         acc2 = __SMLALDX(x2, c0, acc2);
00423         acc3 = __SMLALDX(x3, c0, acc3);
00424       }
00425
00426       /* Store the result in the accumulator in the destination buffer. */
00427       *pOut = (q15_t) (__SSAT(acc0 >> 15, 16));
00428       /* Destination pointer is updated according to the address modifier, inc */
00429       pOut += inc;
00430
00431       *pOut = (q15_t) (__SSAT(acc1 >> 15, 16));
00432       pOut += inc;
00433
00434       *pOut = (q15_t) (__SSAT(acc2 >> 15, 16));
00435       pOut += inc;
00436
00437       *pOut = (q15_t) (__SSAT(acc3 >> 15, 16));
00438       pOut += inc;
00439
00440       /* Increment the count by 4 as 4 output values are computed */
00441       count += 4u;
00442
00443       /* Update the inputA and inputB pointers for next MAC calculation */
00444       px = pIn1 + count;
00445       py = pIn2;
00446       pb = (q31_t *) (py);
00447
00448
00449       /* Decrement the loop counter */
00450       blkCnt--;
00451     }
00452
00453     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00454      ** No loop unrolling is used. */
00455     blkCnt = blockSize2 % 0x4u;
00456
00457     while(blkCnt > 0u)
00458     {
00459       /* Accumulator is made zero for every iteration */
00460       sum = 0;
00461
00462       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00463       k = srcBLen >> 2u;
00464
00465       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00466        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00467       while(k > 0u)
00468       {
00469         /* Perform the multiply-accumulates */
00470         sum += ((q63_t) * px++ * *py++);
00471         sum += ((q63_t) * px++ * *py++);
00472         sum += ((q63_t) * px++ * *py++);
00473         sum += ((q63_t) * px++ * *py++);
00474
00475         /* Decrement the loop counter */
00476         k--;
00477       }
00478
00479       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00480        ** No loop unrolling is used. */
00481       k = srcBLen % 0x4u;
00482
00483       while(k > 0u)
00484       {
00485         /* Perform the multiply-accumulates */
00486         sum += ((q63_t) * px++ * *py++);
00487
00488         /* Decrement the loop counter */
00489         k--;
00490       }
00491
00492       /* Store the result in the accumulator in the destination buffer. */
00493       *pOut = (q15_t) (__SSAT(sum >> 15, 16));
00494       /* Destination pointer is updated according to the address modifier, inc */
00495       pOut += inc;
00496
00497       /* Increment count by 1, as one output value is computed */
00498       count++;
00499
00500       /* Update the inputA and inputB pointers for next MAC calculation */
00501       px = pIn1 + count;
00502       py = pIn2;
00503
00504       /* Decrement the loop counter */
00505       blkCnt--;
00506     }
00507   }
00508   else
00509   {
00510     /* If the srcBLen is not a multiple of 4,
00511      * the blockSize2 loop cannot be unrolled by 4 */
00512     blkCnt = blockSize2;
00513
00514     while(blkCnt > 0u)
00515     {
00516       /* Accumulator is made zero for every iteration */
00517       sum = 0;
00518
00519       /* Loop over srcBLen */
00520       k = srcBLen;
00521
00522       while(k > 0u)
00523       {
00524         /* Perform the multiply-accumulate */
00525         sum += ((q63_t) * px++ * *py++);
00526
00527         /* Decrement the loop counter */
00528         k--;
00529       }
00530
00531       /* Store the result in the accumulator in the destination buffer. */
00532       *pOut = (q15_t) (__SSAT(sum >> 15, 16));
00533       /* Destination pointer is updated according to the address modifier, inc */
00534       pOut += inc;
00535
00536       /* Increment the MAC count */
00537       count++;
00538
00539       /* Update the inputA and inputB pointers for next MAC calculation */
00540       px = pIn1 + count;
00541       py = pIn2;
00542
00543       /* Decrement the loop counter */
00544       blkCnt--;
00545     }
00546   }
00547
00548   /* --------------------------
00549    * Initializations of stage3
00550    * -------------------------*/
00551
00552   /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00553    * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00554    * ....
00555    * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
00556    * sum +=  x[srcALen-1] * y[0]
00557    */
00558
00559   /* In this stage the MAC operations are decreased by 1 for every iteration.
00560      The count variable holds the number of MAC operations performed */
00561   count = srcBLen - 1u;
00562
00563   /* Working pointer of inputA */
00564   pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
00565   px = pSrc1;
00566
00567   /* Working pointer of inputB */
00568   py = pIn2;
00569
00570   /* -------------------
00571    * Stage3 process
00572    * ------------------*/
00573
00574   while(blockSize3 > 0u)
00575   {
00576     /* Accumulator is made zero for every iteration */
00577     sum = 0;
00578
00579     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00580     k = count >> 2u;
00581
00582     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00583      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00584     while(k > 0u)
00585     {
00586       /* Perform the multiply-accumulates */
00587       /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */
00588       sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
00589       /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */
00590       sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
00591
00592       /* Decrement the loop counter */
00593       k--;
00594     }
00595
00596     /* If the count is not a multiple of 4, compute any remaining MACs here.
00597      ** No loop unrolling is used. */
00598     k = count % 0x4u;
00599
00600     while(k > 0u)
00601     {
00602       /* Perform the multiply-accumulates */
00603       sum = __SMLALD(*px++, *py++, sum);
00604
00605       /* Decrement the loop counter */
00606       k--;
00607     }
00608
00609     /* Store the result in the accumulator in the destination buffer. */
00610     *pOut = (q15_t) (__SSAT((sum >> 15), 16));
00611     /* Destination pointer is updated according to the address modifier, inc */
00612     pOut += inc;
00613
00614     /* Update the inputA and inputB pointers for next MAC calculation */
00615     px = ++pSrc1;
00616     py = pIn2;
00617
00618     /* Decrement the MAC count */
00619     count--;
00620
00621     /* Decrement the loop counter */
00622     blockSize3--;
00623   }
00624
00625 #else
00626
00627 /* Run the below code for Cortex-M0 */
00628
00629   q15_t *pIn1 = pSrcA;                           /* inputA pointer               */
00630   q15_t *pIn2 = pSrcB + (srcBLen - 1u);          /* inputB pointer               */
00631   q63_t sum;                                     /* Accumulators                  */
00632   uint32_t i = 0u, j;                            /* loop counters */
00633   uint32_t inv = 0u;                             /* Reverse order flag */
00634   uint32_t tot = 0u;                             /* Length */
00635
00636   /* The algorithm implementation is based on the lengths of the inputs. */
00637   /* srcB is always made to slide across srcA. */
00638   /* So srcBLen is always considered as shorter or equal to srcALen */
00639   /* But CORR(x, y) is reverse of CORR(y, x) */
00640   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
00641   /* and a varaible, inv is set to 1 */
00642   /* If lengths are not equal then zero pad has to be done to  make the two
00643    * inputs of same length. But to improve the performance, we include zeroes
00644    * in the output instead of zero padding either of the the inputs*/
00645   /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
00646    * starting of the output buffer */
00647   /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
00648    * ending of the output buffer */
00649   /* Once the zero padding is done the remaining of the output is calcualted
00650    * using convolution but with the shorter signal time shifted. */
00651
00652   /* Calculate the length of the remaining sequence */
00653   tot = ((srcALen + srcBLen) - 2u);
00654
00655   if(srcALen > srcBLen)
00656   {
00657     /* Calculating the number of zeros to be padded to the output */
00658     j = srcALen - srcBLen;
00659
00660     /* Initialise the pointer after zero padding */
00661     pDst += j;
00662   }
00663
00664   else if(srcALen < srcBLen)
00665   {
00666     /* Initialization to inputB pointer */
00667     pIn1 = pSrcB;
00668
00669     /* Initialization to the end of inputA pointer */
00670     pIn2 = pSrcA + (srcALen - 1u);
00671
00672     /* Initialisation of the pointer after zero padding */
00673     pDst = pDst + tot;
00674
00675     /* Swapping the lengths */
00676     j = srcALen;
00677     srcALen = srcBLen;
00678     srcBLen = j;
00679
00680     /* Setting the reverse flag */
00681     inv = 1;
00682
00683   }
00684
00685   /* Loop to calculate convolution for output length number of times */
00686   for (i = 0u; i <= tot; i++)
00687   {
00688     /* Initialize sum with zero to carry on MAC operations */
00689     sum = 0;
00690
00691     /* Loop to perform MAC operations according to convolution equation */
00692     for (j = 0u; j <= i; j++)
00693     {
00694       /* Check the array limitations */
00695       if((((i - j) < srcBLen) && (j < srcALen)))
00696       {
00697         /* z[i] += x[i-j] * y[j] */
00698         sum += ((q31_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
00699       }
00700     }
00701     /* Store the output in the destination buffer */
00702     if(inv == 1)
00703       *pDst-- = (q15_t) __SSAT((sum >> 15u), 16u);
00704     else
00705       *pDst++ = (q15_t) __SSAT((sum >> 15u), 16u);
00706   }
00707
00708 #endif /*   #ifndef ARM_MATH_CM0 */
00709
00710 }
00711
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CMSIS DSP Software Library: arm_correlate_q31.c File Reference

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arm_correlate_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_correlate_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
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CMSIS DSP Software Library: arm_correlate_q31.c Source File

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arm_correlate_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_correlate_q31.c
00009 *
00010 * Description:  Correlation of Q31 sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00071 void arm_correlate_q31(
00072   q31_t * pSrcA,
00073   uint32_t srcALen,
00074   q31_t * pSrcB,
00075   uint32_t srcBLen,
00076   q31_t * pDst)
00077 {
00078
00079 #ifndef ARM_MATH_CM0
00080
00081   /* Run the below code for Cortex-M4 and Cortex-M3 */
00082
00083   q31_t *pIn1;                                   /* inputA pointer               */
00084   q31_t *pIn2;                                   /* inputB pointer               */
00085   q31_t *pOut = pDst;                            /* output pointer               */
00086   q31_t *px;                                     /* Intermediate inputA pointer  */
00087   q31_t *py;                                     /* Intermediate inputB pointer  */
00088   q31_t *pSrc1;                                  /* Intermediate pointers        */
00089   q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
00090   q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
00091   uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
00092   int32_t inc = 1;                               /* Destination address modifier */
00093
00094
00095   /* The algorithm implementation is based on the lengths of the inputs. */
00096   /* srcB is always made to slide across srcA. */
00097   /* So srcBLen is always considered as shorter or equal to srcALen */
00098   /* But CORR(x, y) is reverse of CORR(y, x) */
00099   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
00100   /* and the destination pointer modifier, inc is set to -1 */
00101   /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
00102   /* But to improve the performance,
00103    * we include zeroes in the output instead of zero padding either of the the inputs*/
00104   /* If srcALen > srcBLen,
00105    * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
00106   /* If srcALen < srcBLen,
00107    * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
00108   if(srcALen >= srcBLen)
00109   {
00110     /* Initialization of inputA pointer */
00111     pIn1 = (pSrcA);
00112
00113     /* Initialization of inputB pointer */
00114     pIn2 = (pSrcB);
00115
00116     /* Number of output samples is calculated */
00117     outBlockSize = (2u * srcALen) - 1u;
00118
00119     /* When srcALen > srcBLen, zero padding is done to srcB
00120      * to make their lengths equal.
00121      * Instead, (outBlockSize - (srcALen + srcBLen - 1))
00122      * number of output samples are made zero */
00123     j = outBlockSize - (srcALen + (srcBLen - 1u));
00124
00125     /* Updating the pointer position to non zero value */
00126     pOut += j;
00127
00128   }
00129   else
00130   {
00131     /* Initialization of inputA pointer */
00132     pIn1 = (pSrcB);
00133
00134     /* Initialization of inputB pointer */
00135     pIn2 = (pSrcA);
00136
00137     /* srcBLen is always considered as shorter or equal to srcALen */
00138     j = srcBLen;
00139     srcBLen = srcALen;
00140     srcALen = j;
00141
00142     /* CORR(x, y) = Reverse order(CORR(y, x)) */
00143     /* Hence set the destination pointer to point to the last output sample */
00144     pOut = pDst + ((srcALen + srcBLen) - 2u);
00145
00146     /* Destination address modifier is set to -1 */
00147     inc = -1;
00148
00149   }
00150
00151   /* The function is internally
00152    * divided into three parts according to the number of multiplications that has to be
00153    * taken place between inputA samples and inputB samples. In the first part of the
00154    * algorithm, the multiplications increase by one for every iteration.
00155    * In the second part of the algorithm, srcBLen number of multiplications are done.
00156    * In the third part of the algorithm, the multiplications decrease by one
00157    * for every iteration.*/
00158   /* The algorithm is implemented in three stages.
00159    * The loop counters of each stage is initiated here. */
00160   blockSize1 = srcBLen - 1u;
00161   blockSize2 = srcALen - (srcBLen - 1u);
00162   blockSize3 = blockSize1;
00163
00164   /* --------------------------
00165    * Initializations of stage1
00166    * -------------------------*/
00167
00168   /* sum = x[0] * y[srcBlen - 1]
00169    * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
00170    * ....
00171    * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
00172    */
00173
00174   /* In this stage the MAC operations are increased by 1 for every iteration.
00175      The count variable holds the number of MAC operations performed */
00176   count = 1u;
00177
00178   /* Working pointer of inputA */
00179   px = pIn1;
00180
00181   /* Working pointer of inputB */
00182   pSrc1 = pIn2 + (srcBLen - 1u);
00183   py = pSrc1;
00184
00185   /* ------------------------
00186    * Stage1 process
00187    * ----------------------*/
00188
00189   /* The first stage starts here */
00190   while(blockSize1 > 0u)
00191   {
00192     /* Accumulator is made zero for every iteration */
00193     sum = 0;
00194
00195     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00196     k = count >> 2;
00197
00198     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00199      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00200     while(k > 0u)
00201     {
00202       /* x[0] * y[srcBLen - 4] */
00203       sum += (q63_t) * px++ * (*py++);
00204       /* x[1] * y[srcBLen - 3] */
00205       sum += (q63_t) * px++ * (*py++);
00206       /* x[2] * y[srcBLen - 2] */
00207       sum += (q63_t) * px++ * (*py++);
00208       /* x[3] * y[srcBLen - 1] */
00209       sum += (q63_t) * px++ * (*py++);
00210
00211       /* Decrement the loop counter */
00212       k--;
00213     }
00214
00215     /* If the count is not a multiple of 4, compute any remaining MACs here.
00216      ** No loop unrolling is used. */
00217     k = count % 0x4u;
00218
00219     while(k > 0u)
00220     {
00221       /* Perform the multiply-accumulates */
00222       /* x[0] * y[srcBLen - 1] */
00223       sum += (q63_t) * px++ * (*py++);
00224
00225       /* Decrement the loop counter */
00226       k--;
00227     }
00228
00229     /* Store the result in the accumulator in the destination buffer. */
00230     *pOut = (q31_t) (sum >> 31);
00231     /* Destination pointer is updated according to the address modifier, inc */
00232     pOut += inc;
00233
00234     /* Update the inputA and inputB pointers for next MAC calculation */
00235     py = pSrc1 - count;
00236     px = pIn1;
00237
00238     /* Increment the MAC count */
00239     count++;
00240
00241     /* Decrement the loop counter */
00242     blockSize1--;
00243   }
00244
00245   /* --------------------------
00246    * Initializations of stage2
00247    * ------------------------*/
00248
00249   /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
00250    * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
00251    * ....
00252    * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00253    */
00254
00255   /* Working pointer of inputA */
00256   px = pIn1;
00257
00258   /* Working pointer of inputB */
00259   py = pIn2;
00260
00261   /* count is index by which the pointer pIn1 to be incremented */
00262   count = 1u;
00263
00264   /* -------------------
00265    * Stage2 process
00266    * ------------------*/
00267
00268   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
00269    * So, to loop unroll over blockSize2,
00270    * srcBLen should be greater than or equal to 4 */
00271   if(srcBLen >= 4u)
00272   {
00273     /* Loop unroll over blockSize2, by 4 */
00274     blkCnt = blockSize2 >> 2u;
00275
00276     while(blkCnt > 0u)
00277     {
00278       /* Set all accumulators to zero */
00279       acc0 = 0;
00280       acc1 = 0;
00281       acc2 = 0;
00282       acc3 = 0;
00283
00284       /* read x[0], x[1], x[2] samples */
00285       x0 = *(px++);
00286       x1 = *(px++);
00287       x2 = *(px++);
00288
00289       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00290       k = srcBLen >> 2u;
00291
00292       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00293        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00294       do
00295       {
00296         /* Read y[0] sample */
00297         c0 = *(py++);
00298
00299         /* Read x[3] sample */
00300         x3 = *(px++);
00301
00302         /* Perform the multiply-accumulate */
00303         /* acc0 +=  x[0] * y[0] */
00304         acc0 += ((q63_t) x0 * c0);
00305         /* acc1 +=  x[1] * y[0] */
00306         acc1 += ((q63_t) x1 * c0);
00307         /* acc2 +=  x[2] * y[0] */
00308         acc2 += ((q63_t) x2 * c0);
00309         /* acc3 +=  x[3] * y[0] */
00310         acc3 += ((q63_t) x3 * c0);
00311
00312         /* Read y[1] sample */
00313         c0 = *(py++);
00314
00315         /* Read x[4] sample */
00316         x0 = *(px++);
00317
00318         /* Perform the multiply-accumulates */
00319         /* acc0 +=  x[1] * y[1] */
00320         acc0 += ((q63_t) x1 * c0);
00321         /* acc1 +=  x[2] * y[1] */
00322         acc1 += ((q63_t) x2 * c0);
00323         /* acc2 +=  x[3] * y[1] */
00324         acc2 += ((q63_t) x3 * c0);
00325         /* acc3 +=  x[4] * y[1] */
00326         acc3 += ((q63_t) x0 * c0);
00327         /* Read y[2] sample */
00328         c0 = *(py++);
00329
00330         /* Read x[5] sample */
00331         x1 = *(px++);
00332
00333         /* Perform the multiply-accumulates */
00334         /* acc0 +=  x[2] * y[2] */
00335         acc0 += ((q63_t) x2 * c0);
00336         /* acc1 +=  x[3] * y[2] */
00337         acc1 += ((q63_t) x3 * c0);
00338         /* acc2 +=  x[4] * y[2] */
00339         acc2 += ((q63_t) x0 * c0);
00340         /* acc3 +=  x[5] * y[2] */
00341         acc3 += ((q63_t) x1 * c0);
00342
00343         /* Read y[3] sample */
00344         c0 = *(py++);
00345
00346         /* Read x[6] sample */
00347         x2 = *(px++);
00348
00349         /* Perform the multiply-accumulates */
00350         /* acc0 +=  x[3] * y[3] */
00351         acc0 += ((q63_t) x3 * c0);
00352         /* acc1 +=  x[4] * y[3] */
00353         acc1 += ((q63_t) x0 * c0);
00354         /* acc2 +=  x[5] * y[3] */
00355         acc2 += ((q63_t) x1 * c0);
00356         /* acc3 +=  x[6] * y[3] */
00357         acc3 += ((q63_t) x2 * c0);
00358
00359
00360       } while(--k);
00361
00362       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00363        ** No loop unrolling is used. */
00364       k = srcBLen % 0x4u;
00365
00366       while(k > 0u)
00367       {
00368         /* Read y[4] sample */
00369         c0 = *(py++);
00370
00371         /* Read x[7] sample */
00372         x3 = *(px++);
00373
00374         /* Perform the multiply-accumulates */
00375         /* acc0 +=  x[4] * y[4] */
00376         acc0 += ((q63_t) x0 * c0);
00377         /* acc1 +=  x[5] * y[4] */
00378         acc1 += ((q63_t) x1 * c0);
00379         /* acc2 +=  x[6] * y[4] */
00380         acc2 += ((q63_t) x2 * c0);
00381         /* acc3 +=  x[7] * y[4] */
00382         acc3 += ((q63_t) x3 * c0);
00383
00384         /* Reuse the present samples for the next MAC */
00385         x0 = x1;
00386         x1 = x2;
00387         x2 = x3;
00388
00389         /* Decrement the loop counter */
00390         k--;
00391       }
00392
00393       /* Store the result in the accumulator in the destination buffer. */
00394       *pOut = (q31_t) (acc0 >> 31);
00395       /* Destination pointer is updated according to the address modifier, inc */
00396       pOut += inc;
00397
00398       *pOut = (q31_t) (acc1 >> 31);
00399       pOut += inc;
00400
00401       *pOut = (q31_t) (acc2 >> 31);
00402       pOut += inc;
00403
00404       *pOut = (q31_t) (acc3 >> 31);
00405       pOut += inc;
00406
00407       /* Update the inputA and inputB pointers for next MAC calculation */
00408       px = pIn1 + (count * 4u);
00409       py = pIn2;
00410
00411       /* Increment the pointer pIn1 index, count by 1 */
00412       count++;
00413
00414       /* Decrement the loop counter */
00415       blkCnt--;
00416     }
00417
00418     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
00419      ** No loop unrolling is used. */
00420     blkCnt = blockSize2 % 0x4u;
00421
00422     while(blkCnt > 0u)
00423     {
00424       /* Accumulator is made zero for every iteration */
00425       sum = 0;
00426
00427       /* Apply loop unrolling and compute 4 MACs simultaneously. */
00428       k = srcBLen >> 2u;
00429
00430       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00431        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00432       while(k > 0u)
00433       {
00434         /* Perform the multiply-accumulates */
00435         sum += (q63_t) * px++ * (*py++);
00436         sum += (q63_t) * px++ * (*py++);
00437         sum += (q63_t) * px++ * (*py++);
00438         sum += (q63_t) * px++ * (*py++);
00439
00440         /* Decrement the loop counter */
00441         k--;
00442       }
00443
00444       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
00445        ** No loop unrolling is used. */
00446       k = srcBLen % 0x4u;
00447
00448       while(k > 0u)
00449       {
00450         /* Perform the multiply-accumulate */
00451         sum += (q63_t) * px++ * (*py++);
00452
00453         /* Decrement the loop counter */
00454         k--;
00455       }
00456
00457       /* Store the result in the accumulator in the destination buffer. */
00458       *pOut = (q31_t) (sum >> 31);
00459       /* Destination pointer is updated according to the address modifier, inc */
00460       pOut += inc;
00461
00462       /* Update the inputA and inputB pointers for next MAC calculation */
00463       px = pIn1 + count;
00464       py = pIn2;
00465
00466       /* Increment the MAC count */
00467       count++;
00468
00469       /* Decrement the loop counter */
00470       blkCnt--;
00471     }
00472   }
00473   else
00474   {
00475     /* If the srcBLen is not a multiple of 4,
00476      * the blockSize2 loop cannot be unrolled by 4 */
00477     blkCnt = blockSize2;
00478
00479     while(blkCnt > 0u)
00480     {
00481       /* Accumulator is made zero for every iteration */
00482       sum = 0;
00483
00484       /* Loop over srcBLen */
00485       k = srcBLen;
00486
00487       while(k > 0u)
00488       {
00489         /* Perform the multiply-accumulate */
00490         sum += (q63_t) * px++ * (*py++);
00491
00492         /* Decrement the loop counter */
00493         k--;
00494       }
00495
00496       /* Store the result in the accumulator in the destination buffer. */
00497       *pOut = (q31_t) (sum >> 31);
00498       /* Destination pointer is updated according to the address modifier, inc */
00499       pOut += inc;
00500
00501       /* Update the inputA and inputB pointers for next MAC calculation */
00502       px = pIn1 + count;
00503       py = pIn2;
00504
00505       /* Increment the MAC count */
00506       count++;
00507
00508       /* Decrement the loop counter */
00509       blkCnt--;
00510     }
00511   }
00512
00513   /* --------------------------
00514    * Initializations of stage3
00515    * -------------------------*/
00516
00517   /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00518    * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
00519    * ....
00520    * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
00521    * sum +=  x[srcALen-1] * y[0]
00522    */
00523
00524   /* In this stage the MAC operations are decreased by 1 for every iteration.
00525      The count variable holds the number of MAC operations performed */
00526   count = srcBLen - 1u;
00527
00528   /* Working pointer of inputA */
00529   pSrc1 = pIn1 + (srcALen - (srcBLen - 1u));
00530   px = pSrc1;
00531
00532   /* Working pointer of inputB */
00533   py = pIn2;
00534
00535   /* -------------------
00536    * Stage3 process
00537    * ------------------*/
00538
00539   while(blockSize3 > 0u)
00540   {
00541     /* Accumulator is made zero for every iteration */
00542     sum = 0;
00543
00544     /* Apply loop unrolling and compute 4 MACs simultaneously. */
00545     k = count >> 2u;
00546
00547     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
00548      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
00549     while(k > 0u)
00550     {
00551       /* Perform the multiply-accumulates */
00552       /* sum += x[srcALen - srcBLen + 4] * y[3] */
00553       sum += (q63_t) * px++ * (*py++);
00554       /* sum += x[srcALen - srcBLen + 3] * y[2] */
00555       sum += (q63_t) * px++ * (*py++);
00556       /* sum += x[srcALen - srcBLen + 2] * y[1] */
00557       sum += (q63_t) * px++ * (*py++);
00558       /* sum += x[srcALen - srcBLen + 1] * y[0] */
00559       sum += (q63_t) * px++ * (*py++);
00560
00561       /* Decrement the loop counter */
00562       k--;
00563     }
00564
00565     /* If the count is not a multiple of 4, compute any remaining MACs here.
00566      ** No loop unrolling is used. */
00567     k = count % 0x4u;
00568
00569     while(k > 0u)
00570     {
00571       /* Perform the multiply-accumulates */
00572       sum += (q63_t) * px++ * (*py++);
00573
00574       /* Decrement the loop counter */
00575       k--;
00576     }
00577
00578     /* Store the result in the accumulator in the destination buffer. */
00579     *pOut = (q31_t) (sum >> 31);
00580     /* Destination pointer is updated according to the address modifier, inc */
00581     pOut += inc;
00582
00583     /* Update the inputA and inputB pointers for next MAC calculation */
00584     px = ++pSrc1;
00585     py = pIn2;
00586
00587     /* Decrement the MAC count */
00588     count--;
00589
00590     /* Decrement the loop counter */
00591     blockSize3--;
00592   }
00593
00594 #else
00595
00596   /* Run the below code for Cortex-M0 */
00597
00598   q31_t *pIn1 = pSrcA;                           /* inputA pointer               */
00599   q31_t *pIn2 = pSrcB + (srcBLen - 1u);          /* inputB pointer               */
00600   q63_t sum;                                     /* Accumulators                  */
00601   uint32_t i = 0u, j;                            /* loop counters */
00602   uint32_t inv = 0u;                             /* Reverse order flag */
00603   uint32_t tot = 0u;                             /* Length */
00604
00605   /* The algorithm implementation is based on the lengths of the inputs. */
00606   /* srcB is always made to slide across srcA. */
00607   /* So srcBLen is always considered as shorter or equal to srcALen */
00608   /* But CORR(x, y) is reverse of CORR(y, x) */
00609   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
00610   /* and a varaible, inv is set to 1 */
00611   /* If lengths are not equal then zero pad has to be done to  make the two
00612    * inputs of same length. But to improve the performance, we include zeroes
00613    * in the output instead of zero padding either of the the inputs*/
00614   /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
00615    * starting of the output buffer */
00616   /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
00617    * ending of the output buffer */
00618   /* Once the zero padding is done the remaining of the output is calcualted
00619    * using convolution but with the shorter signal time shifted. */
00620
00621   /* Calculate the length of the remaining sequence */
00622   tot = ((srcALen + srcBLen) - 2u);
00623
00624   if(srcALen > srcBLen)
00625   {
00626     /* Calculating the number of zeros to be padded to the output */
00627     j = srcALen - srcBLen;
00628
00629     /* Initialise the pointer after zero padding */
00630     pDst += j;
00631   }
00632
00633   else if(srcALen < srcBLen)
00634   {
00635     /* Initialization to inputB pointer */
00636     pIn1 = pSrcB;
00637
00638     /* Initialization to the end of inputA pointer */
00639     pIn2 = pSrcA + (srcALen - 1u);
00640
00641     /* Initialisation of the pointer after zero padding */
00642     pDst = pDst + tot;
00643
00644     /* Swapping the lengths */
00645     j = srcALen;
00646     srcALen = srcBLen;
00647     srcBLen = j;
00648
00649     /* Setting the reverse flag */
00650     inv = 1;
00651
00652   }
00653
00654   /* Loop to calculate convolution for output length number of times */
00655   for (i = 0u; i <= tot; i++)
00656   {
00657     /* Initialize sum with zero to carry on MAC operations */
00658     sum = 0;
00659
00660     /* Loop to perform MAC operations according to convolution equation */
00661     for (j = 0u; j <= i; j++)
00662     {
00663       /* Check the array limitations */
00664       if((((i - j) < srcBLen) && (j < srcALen)))
00665       {
00666         /* z[i] += x[i-j] * y[j] */
00667         sum += ((q63_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
00668       }
00669     }
00670     /* Store the output in the destination buffer */
00671     if(inv == 1)
00672       *pDst-- = (q31_t) (sum >> 31u);
00673     else
00674       *pDst++ = (q31_t) (sum >> 31u);
00675   }
00676
00677 #endif /*   #ifndef ARM_MATH_CM0 */
00678
00679 }
00680
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CMSIS DSP Software Library: arm_cos_f32.c File Reference

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Functions | Variables

arm_cos_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

float32_t | arm_cos_f32 (float32_t x)

Variables

static const float32_t | cosTable [259]
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CMSIS DSP Software Library: arm_cos_f32.c Source File

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  • File List
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arm_cos_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cos_f32.c
00009 *
00010 * Description:  Fast cosine calculation for floating-point values.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00086 static const float32_t cosTable[259] = {
00087   0.999698817729949950f, 1.000000000000000000f, 0.999698817729949950f,
00088   0.998795449733734130f, 0.997290432453155520f, 0.995184719562530520f,
00089   0.992479562759399410f, 0.989176511764526370f,
00090   0.985277652740478520f, 0.980785250663757320f, 0.975702106952667240f,
00091   0.970031261444091800f, 0.963776051998138430f, 0.956940352916717530f,
00092   0.949528157711029050f, 0.941544055938720700f,
00093   0.932992815971374510f, 0.923879504203796390f, 0.914209783077239990f,
00094   0.903989315032958980f, 0.893224298954010010f, 0.881921291351318360f,
00095   0.870086967945098880f, 0.857728600502014160f,
00096   0.844853579998016360f, 0.831469595432281490f, 0.817584812641143800f,
00097   0.803207516670227050f, 0.788346409797668460f, 0.773010432720184330f,
00098   0.757208824157714840f, 0.740951120853424070f,
00099   0.724247097969055180f, 0.707106769084930420f, 0.689540565013885500f,
00100   0.671558976173400880f, 0.653172850608825680f, 0.634393274784088130f,
00101   0.615231573581695560f, 0.595699310302734380f,
00102   0.575808167457580570f, 0.555570244789123540f, 0.534997642040252690f,
00103   0.514102756977081300f, 0.492898195981979370f, 0.471396744251251220f,
00104   0.449611335992813110f, 0.427555084228515630f,
00105   0.405241310596466060f, 0.382683426141738890f, 0.359895050525665280f,
00106   0.336889863014221190f, 0.313681751489639280f, 0.290284663438797000f,
00107   0.266712754964828490f, 0.242980182170867920f,
00108   0.219101235270500180f, 0.195090323686599730f, 0.170961886644363400f,
00109   0.146730467677116390f, 0.122410677373409270f, 0.098017141222953796f,
00110   0.073564566671848297f, 0.049067676067352295f,
00111   0.024541229009628296f, 0.000000000000000061f, -0.024541229009628296f,
00112   -0.049067676067352295f, -0.073564566671848297f, -0.098017141222953796f,
00113   -0.122410677373409270f, -0.146730467677116390f,
00114   -0.170961886644363400f, -0.195090323686599730f, -0.219101235270500180f,
00115   -0.242980182170867920f, -0.266712754964828490f, -0.290284663438797000f,
00116   -0.313681751489639280f, -0.336889863014221190f,
00117   -0.359895050525665280f, -0.382683426141738890f, -0.405241310596466060f,
00118   -0.427555084228515630f, -0.449611335992813110f, -0.471396744251251220f,
00119   -0.492898195981979370f, -0.514102756977081300f,
00120   -0.534997642040252690f, -0.555570244789123540f, -0.575808167457580570f,
00121   -0.595699310302734380f, -0.615231573581695560f, -0.634393274784088130f,
00122   -0.653172850608825680f, -0.671558976173400880f,
00123   -0.689540565013885500f, -0.707106769084930420f, -0.724247097969055180f,
00124   -0.740951120853424070f, -0.757208824157714840f, -0.773010432720184330f,
00125   -0.788346409797668460f, -0.803207516670227050f,
00126   -0.817584812641143800f, -0.831469595432281490f, -0.844853579998016360f,
00127   -0.857728600502014160f, -0.870086967945098880f, -0.881921291351318360f,
00128   -0.893224298954010010f, -0.903989315032958980f,
00129   -0.914209783077239990f, -0.923879504203796390f, -0.932992815971374510f,
00130   -0.941544055938720700f, -0.949528157711029050f, -0.956940352916717530f,
00131   -0.963776051998138430f, -0.970031261444091800f,
00132   -0.975702106952667240f, -0.980785250663757320f, -0.985277652740478520f,
00133   -0.989176511764526370f, -0.992479562759399410f, -0.995184719562530520f,
00134   -0.997290432453155520f, -0.998795449733734130f,
00135   -0.999698817729949950f, -1.000000000000000000f, -0.999698817729949950f,
00136   -0.998795449733734130f, -0.997290432453155520f, -0.995184719562530520f,
00137   -0.992479562759399410f, -0.989176511764526370f,
00138   -0.985277652740478520f, -0.980785250663757320f, -0.975702106952667240f,
00139   -0.970031261444091800f, -0.963776051998138430f, -0.956940352916717530f,
00140   -0.949528157711029050f, -0.941544055938720700f,
00141   -0.932992815971374510f, -0.923879504203796390f, -0.914209783077239990f,
00142   -0.903989315032958980f, -0.893224298954010010f, -0.881921291351318360f,
00143   -0.870086967945098880f, -0.857728600502014160f,
00144   -0.844853579998016360f, -0.831469595432281490f, -0.817584812641143800f,
00145   -0.803207516670227050f, -0.788346409797668460f, -0.773010432720184330f,
00146   -0.757208824157714840f, -0.740951120853424070f,
00147   -0.724247097969055180f, -0.707106769084930420f, -0.689540565013885500f,
00148   -0.671558976173400880f, -0.653172850608825680f, -0.634393274784088130f,
00149   -0.615231573581695560f, -0.595699310302734380f,
00150   -0.575808167457580570f, -0.555570244789123540f, -0.534997642040252690f,
00151   -0.514102756977081300f, -0.492898195981979370f, -0.471396744251251220f,
00152   -0.449611335992813110f, -0.427555084228515630f,
00153   -0.405241310596466060f, -0.382683426141738890f, -0.359895050525665280f,
00154   -0.336889863014221190f, -0.313681751489639280f, -0.290284663438797000f,
00155   -0.266712754964828490f, -0.242980182170867920f,
00156   -0.219101235270500180f, -0.195090323686599730f, -0.170961886644363400f,
00157   -0.146730467677116390f, -0.122410677373409270f, -0.098017141222953796f,
00158   -0.073564566671848297f, -0.049067676067352295f,
00159   -0.024541229009628296f, -0.000000000000000184f, 0.024541229009628296f,
00160   0.049067676067352295f, 0.073564566671848297f, 0.098017141222953796f,
00161   0.122410677373409270f, 0.146730467677116390f,
00162   0.170961886644363400f, 0.195090323686599730f, 0.219101235270500180f,
00163   0.242980182170867920f, 0.266712754964828490f, 0.290284663438797000f,
00164   0.313681751489639280f, 0.336889863014221190f,
00165   0.359895050525665280f, 0.382683426141738890f, 0.405241310596466060f,
00166   0.427555084228515630f, 0.449611335992813110f, 0.471396744251251220f,
00167   0.492898195981979370f, 0.514102756977081300f,
00168   0.534997642040252690f, 0.555570244789123540f, 0.575808167457580570f,
00169   0.595699310302734380f, 0.615231573581695560f, 0.634393274784088130f,
00170   0.653172850608825680f, 0.671558976173400880f,
00171   0.689540565013885500f, 0.707106769084930420f, 0.724247097969055180f,
00172   0.740951120853424070f, 0.757208824157714840f, 0.773010432720184330f,
00173   0.788346409797668460f, 0.803207516670227050f,
00174   0.817584812641143800f, 0.831469595432281490f, 0.844853579998016360f,
00175   0.857728600502014160f, 0.870086967945098880f, 0.881921291351318360f,
00176   0.893224298954010010f, 0.903989315032958980f,
00177   0.914209783077239990f, 0.923879504203796390f, 0.932992815971374510f,
00178   0.941544055938720700f, 0.949528157711029050f, 0.956940352916717530f,
00179   0.963776051998138430f, 0.970031261444091800f,
00180   0.975702106952667240f, 0.980785250663757320f, 0.985277652740478520f,
00181   0.989176511764526370f, 0.992479562759399410f, 0.995184719562530520f,
00182   0.997290432453155520f, 0.998795449733734130f,
00183   0.999698817729949950f, 1.000000000000000000f, 0.999698817729949950f
00184 };
00185
00192 float32_t arm_cos_f32(
00193   float32_t x)
00194 {
00195   float32_t cosVal, fract, in;
00196   uint32_t index;
00197   uint32_t tableSize = (uint32_t) TABLE_SIZE;
00198   float32_t wa, wb, wc, wd;
00199   float32_t a, b, c, d;
00200   float32_t *tablePtr;
00201   int32_t n;
00202
00203   /* input x is in radians */
00204   /* Scale the input to [0 1] range from [0 2*PI] , divide input by 2*pi */
00205   in = x * 0.159154943092f;
00206
00207   /* Calculation of floor value of input */
00208   n = (int32_t) in;
00209
00210   /* Make negative values towards -infinity */
00211   if(x < 0.0f)
00212   {
00213     n = n - 1;
00214   }
00215
00216   /* Map input value to [0 1] */
00217   in = in - (float32_t) n;
00218
00219   /* Calculation of index of the table */
00220   index = (uint32_t) (tableSize * in);
00221
00222   /* fractional value calculation */
00223   fract = ((float32_t) tableSize * in) - (float32_t) index;
00224
00225   /* Initialise table pointer */
00226   tablePtr = (float32_t *) & cosTable[index];
00227
00228   /* Read four nearest values of input value from the cos table */
00229   a = *tablePtr++;
00230   b = *tablePtr++;
00231   c = *tablePtr++;
00232   d = *tablePtr++;
00233
00234   /* Cubic interpolation process */
00235   wa = -(((0.166666667f) * fract) * (fract * fract)) +
00236     (((0.5f) * (fract * fract)) - ((0.3333333333333f) * fract));
00237   wb = ((((0.5f) * fract) * (fract * fract)) - (fract * fract)) +
00238     (-((0.5f) * fract) + 1.0f);
00239   wc = -(((0.5f) * fract) * (fract * fract)) +
00240     (((0.5f) * (fract * fract)) + fract);
00241   wd = (((0.166666667f) * fract) * (fract * fract)) -
00242     ((0.166666667f) * fract);
00243
00244   /* Calculate cos value */
00245   cosVal = ((a * wa) + (b * wb)) + ((c * wc) + (d * wd));
00246
00247   /* Return the output value */
00248   return (cosVal);
00249
00250 }
00251
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CMSIS DSP Software Library: arm_cos_q15.c File Reference

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arm_cos_q15.c File Reference

#include "arm_math.h"

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Functions

q15_t | arm_cos_q15 (q15_t x)

Variables

static const q15_t | cosTableQ15 [259]
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CMSIS DSP Software Library: arm_cos_q15.c Source File

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arm_cos_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cos_q15.c
00009 *
00010 * Description:  Fast cosine calculation for Q15 values.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00060 static const q15_t cosTableQ15[259] = {
00061   0x7ff6, 0x7fff, 0x7ff6, 0x7fd9, 0x7fa7, 0x7f62, 0x7f0a, 0x7e9d,
00062   0x7e1e, 0x7d8a, 0x7ce4, 0x7c2a, 0x7b5d, 0x7a7d, 0x798a, 0x7885,
00063   0x776c, 0x7642, 0x7505, 0x73b6, 0x7255, 0x70e3, 0x6f5f, 0x6dca,
00064   0x6c24, 0x6a6e, 0x68a7, 0x66d0, 0x64e9, 0x62f2, 0x60ec, 0x5ed7,
00065   0x5cb4, 0x5a82, 0x5843, 0x55f6, 0x539b, 0x5134, 0x4ec0, 0x4c40,
00066   0x49b4, 0x471d, 0x447b, 0x41ce, 0x3f17, 0x3c57, 0x398d, 0x36ba,
00067   0x33df, 0x30fc, 0x2e11, 0x2b1f, 0x2827, 0x2528, 0x2224, 0x1f1a,
00068   0x1c0c, 0x18f9, 0x15e2, 0x12c8, 0xfab, 0xc8c, 0x96b, 0x648,
00069   0x324, 0x0, 0xfcdc, 0xf9b8, 0xf695, 0xf374, 0xf055, 0xed38,
00070   0xea1e, 0xe707, 0xe3f4, 0xe0e6, 0xdddc, 0xdad8, 0xd7d9, 0xd4e1,
00071   0xd1ef, 0xcf04, 0xcc21, 0xc946, 0xc673, 0xc3a9, 0xc0e9, 0xbe32,
00072   0xbb85, 0xb8e3, 0xb64c, 0xb3c0, 0xb140, 0xaecc, 0xac65, 0xaa0a,
00073   0xa7bd, 0xa57e, 0xa34c, 0xa129, 0x9f14, 0x9d0e, 0x9b17, 0x9930,
00074   0x9759, 0x9592, 0x93dc, 0x9236, 0x90a1, 0x8f1d, 0x8dab, 0x8c4a,
00075   0x8afb, 0x89be, 0x8894, 0x877b, 0x8676, 0x8583, 0x84a3, 0x83d6,
00076   0x831c, 0x8276, 0x81e2, 0x8163, 0x80f6, 0x809e, 0x8059, 0x8027,
00077   0x800a, 0x8000, 0x800a, 0x8027, 0x8059, 0x809e, 0x80f6, 0x8163,
00078   0x81e2, 0x8276, 0x831c, 0x83d6, 0x84a3, 0x8583, 0x8676, 0x877b,
00079   0x8894, 0x89be, 0x8afb, 0x8c4a, 0x8dab, 0x8f1d, 0x90a1, 0x9236,
00080   0x93dc, 0x9592, 0x9759, 0x9930, 0x9b17, 0x9d0e, 0x9f14, 0xa129,
00081   0xa34c, 0xa57e, 0xa7bd, 0xaa0a, 0xac65, 0xaecc, 0xb140, 0xb3c0,
00082   0xb64c, 0xb8e3, 0xbb85, 0xbe32, 0xc0e9, 0xc3a9, 0xc673, 0xc946,
00083   0xcc21, 0xcf04, 0xd1ef, 0xd4e1, 0xd7d9, 0xdad8, 0xdddc, 0xe0e6,
00084   0xe3f4, 0xe707, 0xea1e, 0xed38, 0xf055, 0xf374, 0xf695, 0xf9b8,
00085   0xfcdc, 0x0, 0x324, 0x648, 0x96b, 0xc8c, 0xfab, 0x12c8,
00086   0x15e2, 0x18f9, 0x1c0c, 0x1f1a, 0x2224, 0x2528, 0x2827, 0x2b1f,
00087   0x2e11, 0x30fc, 0x33df, 0x36ba, 0x398d, 0x3c57, 0x3f17, 0x41ce,
00088   0x447b, 0x471d, 0x49b4, 0x4c40, 0x4ec0, 0x5134, 0x539b, 0x55f6,
00089   0x5843, 0x5a82, 0x5cb4, 0x5ed7, 0x60ec, 0x62f2, 0x64e9, 0x66d0,
00090   0x68a7, 0x6a6e, 0x6c24, 0x6dca, 0x6f5f, 0x70e3, 0x7255, 0x73b6,
00091   0x7505, 0x7642, 0x776c, 0x7885, 0x798a, 0x7a7d, 0x7b5d, 0x7c2a,
00092   0x7ce4, 0x7d8a, 0x7e1e, 0x7e9d, 0x7f0a, 0x7f62, 0x7fa7, 0x7fd9,
00093   0x7ff6, 0x7fff, 0x7ff6
00094 };
00095
00096
00105 q15_t arm_cos_q15(
00106   q15_t x)
00107 {
00108   q31_t cosVal;                                  /* Temporary variable for output */
00109   q15_t *tablePtr;                               /* Pointer to table */
00110   q15_t in, in2;                                 /* Temporary variables for input */
00111   q31_t wa, wb, wc, wd;                          /* Cubic interpolation coefficients */
00112   q15_t a, b, c, d;                              /* Four nearest output values */
00113   q15_t fract, fractCube, fractSquare;           /* Variables for fractional value */
00114   q15_t oneBy6 = 0x1555;                         /* Fixed point value of 1/6 */
00115   q15_t tableSpacing = TABLE_SPACING_Q15;        /* Table spacing */
00116   int32_t index;                                 /* Index variable */
00117
00118   in = x;
00119
00120   /* Calculate the nearest index */
00121   index = (int32_t) in / tableSpacing;
00122
00123   /* Calculate the nearest value of input */
00124   in2 = (q15_t) index *tableSpacing;
00125
00126   /* Calculation of fractional value */
00127   fract = (in - in2) << 8;
00128
00129   /* fractSquare = fract * fract */
00130   fractSquare = (q15_t) ((fract * fract) >> 15);
00131
00132   /* fractCube = fract * fract * fract */
00133   fractCube = (q15_t) ((fractSquare * fract) >> 15);
00134
00135   /* Initialise table pointer */
00136   tablePtr = (q15_t *) & cosTableQ15[index];
00137
00138   /* Cubic interpolation process */
00139   /* Calculation of wa */
00140   /* wa = -(oneBy6)*fractCube + (fractSquare >> 1u) - (0x2AAA)*fract; */
00141   wa = (q31_t) oneBy6 *fractCube;
00142   wa += (q31_t) 0x2AAA *fract;
00143   wa = -(wa >> 15);
00144   wa += (fractSquare >> 1u);
00145
00146   /* Read first nearest value of output from the cos table */
00147   a = *tablePtr++;
00148
00149   /* cosVal = a * wa */
00150   cosVal = a * wa;
00151
00152   /* Calculation of wb */
00153   wb = (((fractCube >> 1u) - fractSquare) - (fract >> 1u)) + 0x7FFF;
00154
00155   /* Read second nearest value of output from the cos table */
00156   b = *tablePtr++;
00157
00158   /*      cosVal += b*wb */
00159   cosVal += b * wb;
00160
00161   /* Calculation of wc */
00162   wc = -(q31_t) fractCube + fractSquare;
00163   wc = (wc >> 1u) + fract;
00164
00165   /* Read third nearest value of output from the cos table */
00166   c = *tablePtr++;
00167
00168   /*      cosVal += c*wc */
00169   cosVal += c * wc;
00170
00171   /* Calculation of wd */
00172   /* wd = (oneBy6)*fractCube - (oneBy6)*fract; */
00173   fractCube = fractCube - fract;
00174   wd = ((q15_t) (((q31_t) oneBy6 * fractCube) >> 15));
00175
00176   /* Read fourth nearest value of output from the cos table */
00177   d = *tablePtr++;
00178
00179   /* cosVal += d*wd; */
00180   cosVal += d * wd;
00181
00182   /* Return the output value in 1.15(q15) format */
00183   return ((q15_t) (cosVal >> 15u));
00184
00185 }
00186
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CMSIS DSP Software Library: arm_cos_q31.c File Reference

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arm_cos_q31.c File Reference

#include "arm_math.h"

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Functions

q31_t | arm_cos_q31 (q31_t x)

Variables

static const q31_t | cosTableQ31 [259]
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CMSIS DSP Software Library: arm_cos_q31.c Source File

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arm_cos_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_cos_q31.c
00009 *
00010 * Description:  Fast cosine calculation for Q31 values.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00060 static const q31_t cosTableQ31[259] = {
00061   0x7ff62182, 0x7fffffff, 0x7ff62182, 0x7fd8878e, 0x7fa736b4, 0x7f62368f,
00062   0x7f0991c4, 0x7e9d55fc,
00063   0x7e1d93ea, 0x7d8a5f40, 0x7ce3ceb2, 0x7c29fbee, 0x7b5d039e, 0x7a7d055b,
00064   0x798a23b1, 0x78848414,
00065   0x776c4edb, 0x7641af3d, 0x7504d345, 0x73b5ebd1, 0x72552c85, 0x70e2cbc6,
00066   0x6f5f02b2, 0x6dca0d14,
00067   0x6c242960, 0x6a6d98a4, 0x68a69e81, 0x66cf8120, 0x64e88926, 0x62f201ac,
00068   0x60ec3830, 0x5ed77c8a,
00069   0x5cb420e0, 0x5a82799a, 0x5842dd54, 0x55f5a4d2, 0x539b2af0, 0x5133cc94,
00070   0x4ebfe8a5, 0x4c3fdff4,
00071   0x49b41533, 0x471cece7, 0x447acd50, 0x41ce1e65, 0x3f1749b8, 0x3c56ba70,
00072   0x398cdd32, 0x36ba2014,
00073   0x33def287, 0x30fbc54d, 0x2e110a62, 0x2b1f34eb, 0x2826b928, 0x25280c5e,
00074   0x2223a4c5, 0x1f19f97b,
00075   0x1c0b826a, 0x18f8b83c, 0x15e21445, 0x12c8106f, 0xfab272b, 0xc8bd35e,
00076   0x96a9049, 0x647d97c,
00077   0x3242abf, 0x0, 0xfcdbd541, 0xf9b82684, 0xf6956fb7, 0xf3742ca2, 0xf054d8d5,
00078   0xed37ef91,
00079   0xea1debbb, 0xe70747c4, 0xe3f47d96, 0xe0e60685, 0xdddc5b3b, 0xdad7f3a2,
00080   0xd7d946d8, 0xd4e0cb15,
00081   0xd1eef59e, 0xcf043ab3, 0xcc210d79, 0xc945dfec, 0xc67322ce, 0xc3a94590,
00082   0xc0e8b648, 0xbe31e19b,
00083   0xbb8532b0, 0xb8e31319, 0xb64beacd, 0xb3c0200c, 0xb140175b, 0xaecc336c,
00084   0xac64d510, 0xaa0a5b2e,
00085   0xa7bd22ac, 0xa57d8666, 0xa34bdf20, 0xa1288376, 0x9f13c7d0, 0x9d0dfe54,
00086   0x9b1776da, 0x99307ee0,
00087   0x9759617f, 0x9592675c, 0x93dbd6a0, 0x9235f2ec, 0x90a0fd4e, 0x8f1d343a,
00088   0x8daad37b, 0x8c4a142f,
00089   0x8afb2cbb, 0x89be50c3, 0x8893b125, 0x877b7bec, 0x8675dc4f, 0x8582faa5,
00090   0x84a2fc62, 0x83d60412,
00091   0x831c314e, 0x8275a0c0, 0x81e26c16, 0x8162aa04, 0x80f66e3c, 0x809dc971,
00092   0x8058c94c, 0x80277872,
00093   0x8009de7e, 0x80000000, 0x8009de7e, 0x80277872, 0x8058c94c, 0x809dc971,
00094   0x80f66e3c, 0x8162aa04,
00095   0x81e26c16, 0x8275a0c0, 0x831c314e, 0x83d60412, 0x84a2fc62, 0x8582faa5,
00096   0x8675dc4f, 0x877b7bec,
00097   0x8893b125, 0x89be50c3, 0x8afb2cbb, 0x8c4a142f, 0x8daad37b, 0x8f1d343a,
00098   0x90a0fd4e, 0x9235f2ec,
00099   0x93dbd6a0, 0x9592675c, 0x9759617f, 0x99307ee0, 0x9b1776da, 0x9d0dfe54,
00100   0x9f13c7d0, 0xa1288376,
00101   0xa34bdf20, 0xa57d8666, 0xa7bd22ac, 0xaa0a5b2e, 0xac64d510, 0xaecc336c,
00102   0xb140175b, 0xb3c0200c,
00103   0xb64beacd, 0xb8e31319, 0xbb8532b0, 0xbe31e19b, 0xc0e8b648, 0xc3a94590,
00104   0xc67322ce, 0xc945dfec,
00105   0xcc210d79, 0xcf043ab3, 0xd1eef59e, 0xd4e0cb15, 0xd7d946d8, 0xdad7f3a2,
00106   0xdddc5b3b, 0xe0e60685,
00107   0xe3f47d96, 0xe70747c4, 0xea1debbb, 0xed37ef91, 0xf054d8d5, 0xf3742ca2,
00108   0xf6956fb7, 0xf9b82684,
00109   0xfcdbd541, 0x0, 0x3242abf, 0x647d97c, 0x96a9049, 0xc8bd35e, 0xfab272b,
00110   0x12c8106f,
00111   0x15e21445, 0x18f8b83c, 0x1c0b826a, 0x1f19f97b, 0x2223a4c5, 0x25280c5e,
00112   0x2826b928, 0x2b1f34eb,
00113   0x2e110a62, 0x30fbc54d, 0x33def287, 0x36ba2014, 0x398cdd32, 0x3c56ba70,
00114   0x3f1749b8, 0x41ce1e65,
00115   0x447acd50, 0x471cece7, 0x49b41533, 0x4c3fdff4, 0x4ebfe8a5, 0x5133cc94,
00116   0x539b2af0, 0x55f5a4d2,
00117   0x5842dd54, 0x5a82799a, 0x5cb420e0, 0x5ed77c8a, 0x60ec3830, 0x62f201ac,
00118   0x64e88926, 0x66cf8120,
00119   0x68a69e81, 0x6a6d98a4, 0x6c242960, 0x6dca0d14, 0x6f5f02b2, 0x70e2cbc6,
00120   0x72552c85, 0x73b5ebd1,
00121   0x7504d345, 0x7641af3d, 0x776c4edb, 0x78848414, 0x798a23b1, 0x7a7d055b,
00122   0x7b5d039e, 0x7c29fbee,
00123   0x7ce3ceb2, 0x7d8a5f40, 0x7e1d93ea, 0x7e9d55fc, 0x7f0991c4, 0x7f62368f,
00124   0x7fa736b4, 0x7fd8878e,
00125   0x7ff62182, 0x7fffffff, 0x7ff62182
00126 };
00127
00136 q31_t arm_cos_q31(
00137   q31_t x)
00138 {
00139   q31_t cosVal, in, in2;                         /* Temporary variables for input, output */
00140   q31_t wa, wb, wc, wd;                          /* Cubic interpolation coefficients */
00141   q31_t a, b, c, d;                              /* Four nearest output values */
00142   q31_t *tablePtr;                               /* Pointer to table */
00143   q31_t fract, fractCube, fractSquare;           /* Temporary values for fractional values */
00144   q31_t oneBy6 = 0x15555555;                     /* Fixed point value of 1/6 */
00145   q31_t tableSpacing = TABLE_SPACING_Q31;        /* Table spacing */
00146   q31_t temp;                                    /* Temporary variable for intermediate process */
00147   uint32_t index;                                /* Index variable */
00148
00149   in = x;
00150
00151   /* Calculate the nearest index */
00152   index = in / tableSpacing;
00153
00154   /* Calculate the nearest value of input */
00155   in2 = ((q31_t) index) * tableSpacing;
00156
00157   /* Calculation of fractional value */
00158   fract = (in - in2) << 8;
00159
00160   /* fractSquare = fract * fract */
00161   fractSquare = ((q31_t) (((q63_t) fract * fract) >> 32));
00162   fractSquare = fractSquare << 1;
00163
00164   /* fractCube = fract * fract * fract */
00165   fractCube = ((q31_t) (((q63_t) fractSquare * fract) >> 32));
00166   fractCube = fractCube << 1;
00167
00168   /* Initialise table pointer */
00169   tablePtr = (q31_t *) & cosTableQ31[index];
00170
00171   /* Cubic interpolation process */
00172   /* Calculation of wa */
00173   /* wa = -(oneBy6)*fractCube + (fractSquare >> 1u) - (0x2AAAAAAA)*fract; */
00174   wa = ((q31_t) (((q63_t) oneBy6 * fractCube) >> 32));
00175   temp = 0x2AAAAAAA;
00176   wa = (q31_t) ((((q63_t) wa << 32) + ((q63_t) temp * fract)) >> 32);
00177   wa = -(wa << 1u);
00178   wa += (fractSquare >> 1u);
00179
00180   /* Read first nearest value of output from the cos table */
00181   a = *tablePtr++;
00182
00183   /* cosVal = a*wa */
00184   cosVal = ((q31_t) (((q63_t) a * wa) >> 32));
00185
00186   /* q31(1.31) Fixed point value of 1 */
00187   temp = 0x7FFFFFFF;
00188
00189   /* Calculation of wb */
00190   wb = ((fractCube >> 1u) - (fractSquare + (fract >> 1u))) + temp;
00191   /* Read second nearest value of output from the cos table */
00192   b = *tablePtr++;
00193
00194   /*      cosVal += b*wb */
00195   cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) b * (wb))) >> 32);
00196
00197   /* Calculation of wc */
00198   wc = -fractCube + fractSquare;
00199   wc = (wc >> 1u) + fract;
00200   /* Read third nearest values of output value from the cos table */
00201   c = *tablePtr++;
00202
00203   /*      cosVal += c*wc */
00204   cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) c * (wc))) >> 32);
00205
00206   /* Calculation of wd */
00207   /* wd = (oneBy6)*fractCube - (oneBy6)*fract; */
00208   fractCube = fractCube - fract;
00209   wd = ((q31_t) (((q63_t) oneBy6 * fractCube) >> 32));
00210   wd = (wd << 1u);
00211
00212   /* Read fourth nearest value of output from the cos table */
00213   d = *tablePtr++;
00214
00215   /* cosVal += d*wd; */
00216   cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) d * (wd))) >> 32);
00217
00218   /* convert cosVal in 2.30 format to 1.31 format */
00219   return (cosVal << 1u);
00220
00221 }
00222
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CMSIS DSP Software Library: arm_dct4_f32.c File Reference

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arm_dct4_f32.c File Reference

#include "arm_math.h"

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Functions

void arm_dct4_f32 (const arm_dct4_instance_f32 *S, float32_t *pState, float32_t *pInlineBuffer)
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CMSIS DSP Software Library: arm_dct4_f32.c Source File

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arm_dct4_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_dct4_f32.c
00009 *
00010 * Description:  Processing function of DCT4 & IDCT4 F32.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00126 void arm_dct4_f32(
00127   const arm_dct4_instance_f32 * S,
00128   float32_t * pState,
00129   float32_t * pInlineBuffer)
00130 {
00131   uint32_t i;                                    /* Loop counter */
00132   float32_t *weights = S->pTwiddle;              /* Pointer to the Weights table */
00133   float32_t *cosFact = S->pCosFactor;            /* Pointer to the cos factors table */
00134   float32_t *pS1, *pS2, *pbuff;                  /* Temporary pointers for input buffer and pState buffer */
00135   float32_t in;                                  /* Temporary variable */
00136
00137
00138   /* DCT4 computation involves DCT2 (which is calculated using RFFT)
00139    * along with some pre-processing and post-processing.
00140    * Computational procedure is explained as follows:
00141    * (a) Pre-processing involves multiplying input with cos factor,
00142    *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))
00143    *              where,
00144    *                 r(n) -- output of preprocessing
00145    *                 u(n) -- input to preprocessing(actual Source buffer)
00146    * (b) Calculation of DCT2 using FFT is divided into three steps:
00147    *                  Step1: Re-ordering of even and odd elements of input.
00148    *                  Step2: Calculating FFT of the re-ordered input.
00149    *                  Step3: Taking the real part of the product of FFT output and weights.
00150    * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:
00151    *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
00152    *                        where,
00153    *                           Y4 -- DCT4 output,   Y2 -- DCT2 output
00154    * (d) Multiplying the output with the normalizing factor sqrt(2/N).
00155    */
00156
00157         /*-------- Pre-processing ------------*/
00158   /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
00159   arm_scale_f32(pInlineBuffer, 2.0f, pInlineBuffer, S->N);
00160   arm_mult_f32(pInlineBuffer, cosFact, pInlineBuffer, S->N);
00161
00162   /* ----------------------------------------------------------------
00163    * Step1: Re-ordering of even and odd elements as,
00164    *             pState[i] =  pInlineBuffer[2*i] and
00165    *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2
00166    ---------------------------------------------------------------------*/
00167
00168   /* pS1 initialized to pState */
00169   pS1 = pState;
00170
00171   /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
00172   pS2 = pState + (S->N - 1u);
00173
00174   /* pbuff initialized to input buffer */
00175   pbuff = pInlineBuffer;
00176
00177 #ifndef ARM_MATH_CM0
00178
00179   /* Run the below code for Cortex-M4 and Cortex-M3 */
00180
00181   /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
00182   i = (uint32_t) S->Nby2 >> 2u;
00183
00184   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00185    ** a second loop below computes the remaining 1 to 3 samples. */
00186   do
00187   {
00188     /* Re-ordering of even and odd elements */
00189     /* pState[i] =  pInlineBuffer[2*i] */
00190     *pS1++ = *pbuff++;
00191     /* pState[N-i-1] = pInlineBuffer[2*i+1] */
00192     *pS2-- = *pbuff++;
00193
00194     *pS1++ = *pbuff++;
00195     *pS2-- = *pbuff++;
00196
00197     *pS1++ = *pbuff++;
00198     *pS2-- = *pbuff++;
00199
00200     *pS1++ = *pbuff++;
00201     *pS2-- = *pbuff++;
00202
00203     /* Decrement the loop counter */
00204     i--;
00205   } while(i > 0u);
00206
00207   /* pbuff initialized to input buffer */
00208   pbuff = pInlineBuffer;
00209
00210   /* pS1 initialized to pState */
00211   pS1 = pState;
00212
00213   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
00214   i = (uint32_t) S->N >> 2u;
00215
00216   /* Processing with loop unrolling 4 times as N is always multiple of 4.
00217    * Compute 4 outputs at a time */
00218   do
00219   {
00220     /* Writing the re-ordered output back to inplace input buffer */
00221     *pbuff++ = *pS1++;
00222     *pbuff++ = *pS1++;
00223     *pbuff++ = *pS1++;
00224     *pbuff++ = *pS1++;
00225
00226     /* Decrement the loop counter */
00227     i--;
00228   } while(i > 0u);
00229
00230
00231   /* ---------------------------------------------------------
00232    *     Step2: Calculate RFFT for N-point input
00233    * ---------------------------------------------------------- */
00234   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
00235   arm_rfft_f32(S->pRfft, pInlineBuffer, pState);
00236
00237         /*----------------------------------------------------------------------
00238      *  Step3: Multiply the FFT output with the weights.
00239      *----------------------------------------------------------------------*/
00240   arm_cmplx_mult_cmplx_f32(pState, weights, pState, S->N);
00241
00242   /* ----------- Post-processing ---------- */
00243   /* DCT-IV can be obtained from DCT-II by the equation,
00244    *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
00245    *       Hence, Y4(0) = Y2(0)/2  */
00246   /* Getting only real part from the output and Converting to DCT-IV */
00247
00248   /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
00249   i = ((uint32_t) S->N - 1u) >> 2u;
00250
00251   /* pbuff initialized to input buffer. */
00252   pbuff = pInlineBuffer;
00253
00254   /* pS1 initialized to pState */
00255   pS1 = pState;
00256
00257   /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
00258   in = *pS1++ * (float32_t) 0.5;
00259   /* input buffer acts as inplace, so output values are stored in the input itself. */
00260   *pbuff++ = in;
00261
00262   /* pState pointer is incremented twice as the real values are located alternatively in the array */
00263   pS1++;
00264
00265   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00266    ** a second loop below computes the remaining 1 to 3 samples. */
00267   do
00268   {
00269     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
00270     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
00271     in = *pS1++ - in;
00272     *pbuff++ = in;
00273     /* points to the next real value */
00274     pS1++;
00275
00276     in = *pS1++ - in;
00277     *pbuff++ = in;
00278     pS1++;
00279
00280     in = *pS1++ - in;
00281     *pbuff++ = in;
00282     pS1++;
00283
00284     in = *pS1++ - in;
00285     *pbuff++ = in;
00286     pS1++;
00287
00288     /* Decrement the loop counter */
00289     i--;
00290   } while(i > 0u);
00291
00292   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00293    ** No loop unrolling is used. */
00294   i = ((uint32_t) S->N - 1u) % 0x4u;
00295
00296   while(i > 0u)
00297   {
00298     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
00299     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
00300     in = *pS1++ - in;
00301     *pbuff++ = in;
00302     /* points to the next real value */
00303     pS1++;
00304
00305     /* Decrement the loop counter */
00306     i--;
00307   }
00308
00309
00310         /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
00311
00312   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
00313   i = (uint32_t) S->N >> 2u;
00314
00315   /* pbuff initialized to the pInlineBuffer(now contains the output values) */
00316   pbuff = pInlineBuffer;
00317
00318   /* Processing with loop unrolling 4 times as N is always multiple of 4.  Compute 4 outputs at a time */
00319   do
00320   {
00321     /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
00322     in = *pbuff;
00323     *pbuff++ = in * S->normalize;
00324
00325     in = *pbuff;
00326     *pbuff++ = in * S->normalize;
00327
00328     in = *pbuff;
00329     *pbuff++ = in * S->normalize;
00330
00331     in = *pbuff;
00332     *pbuff++ = in * S->normalize;
00333
00334     /* Decrement the loop counter */
00335     i--;
00336   } while(i > 0u);
00337
00338
00339 #else
00340
00341   /* Run the below code for Cortex-M0 */
00342
00343   /* Initializing the loop counter to N/2 */
00344   i = (uint32_t) S->Nby2;
00345
00346   do
00347   {
00348     /* Re-ordering of even and odd elements */
00349     /* pState[i] =  pInlineBuffer[2*i] */
00350     *pS1++ = *pbuff++;
00351     /* pState[N-i-1] = pInlineBuffer[2*i+1] */
00352     *pS2-- = *pbuff++;
00353
00354     /* Decrement the loop counter */
00355     i--;
00356   } while(i > 0u);
00357
00358   /* pbuff initialized to input buffer */
00359   pbuff = pInlineBuffer;
00360
00361   /* pS1 initialized to pState */
00362   pS1 = pState;
00363
00364   /* Initializing the loop counter */
00365   i = (uint32_t) S->N;
00366
00367   do
00368   {
00369     /* Writing the re-ordered output back to inplace input buffer */
00370     *pbuff++ = *pS1++;
00371
00372     /* Decrement the loop counter */
00373     i--;
00374   } while(i > 0u);
00375
00376
00377   /* ---------------------------------------------------------
00378    *     Step2: Calculate RFFT for N-point input
00379    * ---------------------------------------------------------- */
00380   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
00381   arm_rfft_f32(S->pRfft, pInlineBuffer, pState);
00382
00383         /*----------------------------------------------------------------------
00384      *  Step3: Multiply the FFT output with the weights.
00385      *----------------------------------------------------------------------*/
00386   arm_cmplx_mult_cmplx_f32(pState, weights, pState, S->N);
00387
00388   /* ----------- Post-processing ---------- */
00389   /* DCT-IV can be obtained from DCT-II by the equation,
00390    *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
00391    *       Hence, Y4(0) = Y2(0)/2  */
00392   /* Getting only real part from the output and Converting to DCT-IV */
00393
00394   /* pbuff initialized to input buffer. */
00395   pbuff = pInlineBuffer;
00396
00397   /* pS1 initialized to pState */
00398   pS1 = pState;
00399
00400   /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
00401   in = *pS1++ * (float32_t) 0.5;
00402   /* input buffer acts as inplace, so output values are stored in the input itself. */
00403   *pbuff++ = in;
00404
00405   /* pState pointer is incremented twice as the real values are located alternatively in the array */
00406   pS1++;
00407
00408   /* Initializing the loop counter */
00409   i = ((uint32_t) S->N - 1u);
00410
00411   do
00412   {
00413     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
00414     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
00415     in = *pS1++ - in;
00416     *pbuff++ = in;
00417     /* points to the next real value */
00418     pS1++;
00419
00420
00421     /* Decrement the loop counter */
00422     i--;
00423   } while(i > 0u);
00424
00425
00426         /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
00427
00428   /* Initializing the loop counter */
00429   i = (uint32_t) S->N;
00430
00431   /* pbuff initialized to the pInlineBuffer(now contains the output values) */
00432   pbuff = pInlineBuffer;
00433
00434   do
00435   {
00436     /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
00437     in = *pbuff;
00438     *pbuff++ = in * S->normalize;
00439
00440     /* Decrement the loop counter */
00441     i--;
00442   } while(i > 0u);
00443
00444 #endif /* #ifndef ARM_MATH_CM0 */
00445
00446 }
00447
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CMSIS DSP Software Library: arm_dct4_init_f32.c File Reference

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arm_dct4_init_f32.c File Reference

#include "arm_math.h"

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Functions

arm_status | arm_dct4_init_f32 (arm_dct4_instance_f32 *S, arm_rfft_instance_f32 *S_RFFT, arm_cfft_radix4_instance_f32 *S_CFFT, uint16_t N, uint16_t Nby2, float32_t normalize)

Variables

static const float32_t | Weights_128 [256]
static const float32_t | Weights_512 [1024]
static const float32_t | Weights_2048 [4096]
static const float32_t | cos_factors_128 [128]
static const float32_t | cos_factors_512 [512]
static const float32_t | cos_factors_2048 [2048]
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CMSIS DSP Software Library: arm_dct4_init_q15.c File Reference

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arm_dct4_init_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status | arm_dct4_init_q15 (arm_dct4_instance_q15 *S, arm_rfft_instance_q15 *S_RFFT, arm_cfft_radix4_instance_q15 *S_CFFT, uint16_t N, uint16_t Nby2, q15_t normalize)

Variables

static const q15_t | WeightsQ15_128 [256]
static const q15_t | WeightsQ15_512 [1024]
static const q15_t | WeightsQ15_2048 [4096]
static const q15_t | cos_factorsQ15_128 [128]
static const q15_t | cos_factorsQ15_512 [512]
static const q15_t | cos_factorsQ15_2048 [2048]
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CMSIS DSP Software Library: arm_dct4_init_q15.c Source File

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arm_dct4_init_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_dct4_init_q15.c
00009 *
00010 * Description:  Initialization function of DCT-4 & IDCT4 Q15
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030
00031 #include "arm_math.h"
00032
00042 /*
00043 * @brief  Weights Table
00044 */
00045
00066 static const q15_t WeightsQ15_128[256] = {
00067   0x7fff, 0x0, 0x7ffd, 0xfe6e, 0x7ff6, 0xfcdc, 0x7fe9, 0xfb4a,
00068   0x7fd8, 0xf9b9, 0x7fc2, 0xf827, 0x7fa7, 0xf696, 0x7f87, 0xf505,
00069   0x7f62, 0xf375, 0x7f38, 0xf1e5, 0x7f09, 0xf055, 0x7ed5, 0xeec7,
00070   0x7e9d, 0xed38, 0x7e5f, 0xebab, 0x7e1d, 0xea1e, 0x7dd6, 0xe893,
00071   0x7d8a, 0xe708, 0x7d39, 0xe57e, 0x7ce3, 0xe3f5, 0x7c89, 0xe26d,
00072   0x7c29, 0xe0e7, 0x7bc5, 0xdf61, 0x7b5d, 0xdddd, 0x7aef, 0xdc5a,
00073   0x7a7d, 0xdad8, 0x7a05, 0xd958, 0x798a, 0xd7da, 0x7909, 0xd65d,
00074   0x7884, 0xd4e1, 0x77fa, 0xd368, 0x776c, 0xd1ef, 0x76d9, 0xd079,
00075   0x7641, 0xcf05, 0x75a5, 0xcd92, 0x7504, 0xcc22, 0x745f, 0xcab3,
00076   0x73b5, 0xc946, 0x7307, 0xc7dc, 0x7255, 0xc674, 0x719e, 0xc50e,
00077   0x70e2, 0xc3aa, 0x7023, 0xc248, 0x6f5f, 0xc0e9, 0x6e96, 0xbf8d,
00078   0x6dca, 0xbe32, 0x6cf9, 0xbcdb, 0x6c24, 0xbb86, 0x6b4a, 0xba33,
00079   0x6a6d, 0xb8e4, 0x698c, 0xb797, 0x68a6, 0xb64c, 0x67bd, 0xb505,
00080   0x66cf, 0xb3c1, 0x65dd, 0xb27f, 0x64e8, 0xb141, 0x63ef, 0xb005,
00081   0x62f2, 0xaecd, 0x61f1, 0xad97, 0x60ec, 0xac65, 0x5fe3, 0xab36,
00082   0x5ed7, 0xaa0b, 0x5dc7, 0xa8e3, 0x5cb4, 0xa7be, 0x5b9d, 0xa69c,
00083   0x5a82, 0xa57e, 0x5964, 0xa463, 0x5842, 0xa34c, 0x571d, 0xa239,
00084   0x55f5, 0xa129, 0x54ca, 0xa01d, 0x539b, 0x9f14, 0x5269, 0x9e0f,
00085   0x5133, 0x9d0e, 0x4ffb, 0x9c11, 0x4ebf, 0x9b18, 0x4d81, 0x9a23,
00086   0x4c3f, 0x9931, 0x4afb, 0x9843, 0x49b4, 0x975a, 0x4869, 0x9674,
00087   0x471c, 0x9593, 0x45cd, 0x94b6, 0x447a, 0x93dc, 0x4325, 0x9307,
00088   0x41ce, 0x9236, 0x4073, 0x916a, 0x3f17, 0x90a1, 0x3db8, 0x8fdd,
00089   0x3c56, 0x8f1e, 0x3af2, 0x8e62, 0x398c, 0x8dab, 0x3824, 0x8cf9,
00090   0x36ba, 0x8c4b, 0x354d, 0x8ba1, 0x33de, 0x8afc, 0x326e, 0x8a5b,
00091   0x30fb, 0x89bf, 0x2f87, 0x8927, 0x2e11, 0x8894, 0x2c98, 0x8806,
00092   0x2b1f, 0x877c, 0x29a3, 0x86f7, 0x2826, 0x8676, 0x26a8, 0x85fb,
00093   0x2528, 0x8583, 0x23a6, 0x8511, 0x2223, 0x84a3, 0x209f, 0x843b,
00094   0x1f19, 0x83d7, 0x1d93, 0x8377, 0x1c0b, 0x831d, 0x1a82, 0x82c7,
00095   0x18f8, 0x8276, 0x176d, 0x822a, 0x15e2, 0x81e3, 0x1455, 0x81a1,
00096   0x12c8, 0x8163, 0x1139, 0x812b, 0xfab, 0x80f7, 0xe1b, 0x80c8,
00097   0xc8b, 0x809e, 0xafb, 0x8079, 0x96a, 0x8059, 0x7d9, 0x803e,
00098   0x647, 0x8028, 0x4b6, 0x8017, 0x324, 0x800a, 0x192, 0x8003,
00099 };
00100
00101 static const q15_t WeightsQ15_512[1024] = {
00102   0x7fff, 0x0, 0x7fff, 0xff9c, 0x7fff, 0xff37, 0x7ffe, 0xfed3,
00103   0x7ffd, 0xfe6e, 0x7ffc, 0xfe0a, 0x7ffa, 0xfda5, 0x7ff8, 0xfd41,
00104   0x7ff6, 0xfcdc, 0x7ff3, 0xfc78, 0x7ff0, 0xfc13, 0x7fed, 0xfbaf,
00105   0x7fe9, 0xfb4a, 0x7fe5, 0xfae6, 0x7fe1, 0xfa81, 0x7fdd, 0xfa1d,
00106   0x7fd8, 0xf9b9, 0x7fd3, 0xf954, 0x7fce, 0xf8f0, 0x7fc8, 0xf88b,
00107   0x7fc2, 0xf827, 0x7fbc, 0xf7c3, 0x7fb5, 0xf75e, 0x7fae, 0xf6fa,
00108   0x7fa7, 0xf696, 0x7f9f, 0xf632, 0x7f97, 0xf5cd, 0x7f8f, 0xf569,
00109   0x7f87, 0xf505, 0x7f7e, 0xf4a1, 0x7f75, 0xf43d, 0x7f6b, 0xf3d9,
00110   0x7f62, 0xf375, 0x7f58, 0xf311, 0x7f4d, 0xf2ad, 0x7f43, 0xf249,
00111   0x7f38, 0xf1e5, 0x7f2d, 0xf181, 0x7f21, 0xf11d, 0x7f15, 0xf0b9,
00112   0x7f09, 0xf055, 0x7efd, 0xeff2, 0x7ef0, 0xef8e, 0x7ee3, 0xef2a,
00113   0x7ed5, 0xeec7, 0x7ec8, 0xee63, 0x7eba, 0xedff, 0x7eab, 0xed9c,
00114   0x7e9d, 0xed38, 0x7e8e, 0xecd5, 0x7e7f, 0xec72, 0x7e6f, 0xec0e,
00115   0x7e5f, 0xebab, 0x7e4f, 0xeb48, 0x7e3f, 0xeae5, 0x7e2e, 0xea81,
00116   0x7e1d, 0xea1e, 0x7e0c, 0xe9bb, 0x7dfa, 0xe958, 0x7de8, 0xe8f6,
00117   0x7dd6, 0xe893, 0x7dc3, 0xe830, 0x7db0, 0xe7cd, 0x7d9d, 0xe76a,
00118   0x7d8a, 0xe708, 0x7d76, 0xe6a5, 0x7d62, 0xe643, 0x7d4e, 0xe5e0,
00119   0x7d39, 0xe57e, 0x7d24, 0xe51c, 0x7d0f, 0xe4b9, 0x7cf9, 0xe457,
00120   0x7ce3, 0xe3f5, 0x7ccd, 0xe393, 0x7cb7, 0xe331, 0x7ca0, 0xe2cf,
00121   0x7c89, 0xe26d, 0x7c71, 0xe20b, 0x7c5a, 0xe1aa, 0x7c42, 0xe148,
00122   0x7c29, 0xe0e7, 0x7c11, 0xe085, 0x7bf8, 0xe024, 0x7bdf, 0xdfc2,
00123   0x7bc5, 0xdf61, 0x7bac, 0xdf00, 0x7b92, 0xde9f, 0x7b77, 0xde3e,
00124   0x7b5d, 0xdddd, 0x7b42, 0xdd7c, 0x7b26, 0xdd1b, 0x7b0b, 0xdcbb,
00125   0x7aef, 0xdc5a, 0x7ad3, 0xdbf9, 0x7ab6, 0xdb99, 0x7a9a, 0xdb39,
00126   0x7a7d, 0xdad8, 0x7a5f, 0xda78, 0x7a42, 0xda18, 0x7a24, 0xd9b8,
00127   0x7a05, 0xd958, 0x79e7, 0xd8f9, 0x79c8, 0xd899, 0x79a9, 0xd839,
00128   0x798a, 0xd7da, 0x796a, 0xd77a, 0x794a, 0xd71b, 0x792a, 0xd6bc,
00129   0x7909, 0xd65d, 0x78e8, 0xd5fe, 0x78c7, 0xd59f, 0x78a6, 0xd540,
00130   0x7884, 0xd4e1, 0x7862, 0xd483, 0x7840, 0xd424, 0x781d, 0xd3c6,
00131   0x77fa, 0xd368, 0x77d7, 0xd309, 0x77b4, 0xd2ab, 0x7790, 0xd24d,
00132   0x776c, 0xd1ef, 0x7747, 0xd192, 0x7723, 0xd134, 0x76fe, 0xd0d7,
00133   0x76d9, 0xd079, 0x76b3, 0xd01c, 0x768e, 0xcfbf, 0x7668, 0xcf62,
00134   0x7641, 0xcf05, 0x761b, 0xcea8, 0x75f4, 0xce4b, 0x75cc, 0xcdef,
00135   0x75a5, 0xcd92, 0x757d, 0xcd36, 0x7555, 0xccda, 0x752d, 0xcc7e,
00136   0x7504, 0xcc22, 0x74db, 0xcbc6, 0x74b2, 0xcb6a, 0x7489, 0xcb0e,
00137   0x745f, 0xcab3, 0x7435, 0xca58, 0x740b, 0xc9fc, 0x73e0, 0xc9a1,
00138   0x73b5, 0xc946, 0x738a, 0xc8ec, 0x735f, 0xc891, 0x7333, 0xc836,
00139   0x7307, 0xc7dc, 0x72db, 0xc782, 0x72af, 0xc728, 0x7282, 0xc6ce,
00140   0x7255, 0xc674, 0x7227, 0xc61a, 0x71fa, 0xc5c0, 0x71cc, 0xc567,
00141   0x719e, 0xc50e, 0x716f, 0xc4b4, 0x7141, 0xc45b, 0x7112, 0xc403,
00142   0x70e2, 0xc3aa, 0x70b3, 0xc351, 0x7083, 0xc2f9, 0x7053, 0xc2a0,
00143   0x7023, 0xc248, 0x6ff2, 0xc1f0, 0x6fc1, 0xc198, 0x6f90, 0xc141,
00144   0x6f5f, 0xc0e9, 0x6f2d, 0xc092, 0x6efb, 0xc03b, 0x6ec9, 0xbfe3,
00145   0x6e96, 0xbf8d, 0x6e63, 0xbf36, 0x6e30, 0xbedf, 0x6dfd, 0xbe89,
00146   0x6dca, 0xbe32, 0x6d96, 0xbddc, 0x6d62, 0xbd86, 0x6d2d, 0xbd30,
00147   0x6cf9, 0xbcdb, 0x6cc4, 0xbc85, 0x6c8f, 0xbc30, 0x6c59, 0xbbdb,
00148   0x6c24, 0xbb86, 0x6bee, 0xbb31, 0x6bb8, 0xbadc, 0x6b81, 0xba88,
00149   0x6b4a, 0xba33, 0x6b13, 0xb9df, 0x6adc, 0xb98b, 0x6aa5, 0xb937,
00150   0x6a6d, 0xb8e4, 0x6a35, 0xb890, 0x69fd, 0xb83d, 0x69c4, 0xb7ea,
00151   0x698c, 0xb797, 0x6953, 0xb744, 0x6919, 0xb6f1, 0x68e0, 0xb69f,
00152   0x68a6, 0xb64c, 0x686c, 0xb5fa, 0x6832, 0xb5a8, 0x67f7, 0xb557,
00153   0x67bd, 0xb505, 0x6782, 0xb4b4, 0x6746, 0xb462, 0x670b, 0xb411,
00154   0x66cf, 0xb3c1, 0x6693, 0xb370, 0x6657, 0xb31f, 0x661a, 0xb2cf,
00155   0x65dd, 0xb27f, 0x65a0, 0xb22f, 0x6563, 0xb1df, 0x6526, 0xb190,
00156   0x64e8, 0xb141, 0x64aa, 0xb0f1, 0x646c, 0xb0a2, 0x642d, 0xb054,
00157   0x63ef, 0xb005, 0x63b0, 0xafb7, 0x6371, 0xaf69, 0x6331, 0xaf1b,
00158   0x62f2, 0xaecd, 0x62b2, 0xae7f, 0x6271, 0xae32, 0x6231, 0xade4,
00159   0x61f1, 0xad97, 0x61b0, 0xad4b, 0x616f, 0xacfe, 0x612d, 0xacb2,
00160   0x60ec, 0xac65, 0x60aa, 0xac19, 0x6068, 0xabcd, 0x6026, 0xab82,
00161   0x5fe3, 0xab36, 0x5fa0, 0xaaeb, 0x5f5e, 0xaaa0, 0x5f1a, 0xaa55,
00162   0x5ed7, 0xaa0b, 0x5e93, 0xa9c0, 0x5e50, 0xa976, 0x5e0b, 0xa92c,
00163   0x5dc7, 0xa8e3, 0x5d83, 0xa899, 0x5d3e, 0xa850, 0x5cf9, 0xa807,
00164   0x5cb4, 0xa7be, 0x5c6e, 0xa775, 0x5c29, 0xa72c, 0x5be3, 0xa6e4,
00165   0x5b9d, 0xa69c, 0x5b56, 0xa654, 0x5b10, 0xa60d, 0x5ac9, 0xa5c5,
00166   0x5a82, 0xa57e, 0x5a3b, 0xa537, 0x59f3, 0xa4f0, 0x59ac, 0xa4aa,
00167   0x5964, 0xa463, 0x591c, 0xa41d, 0x58d4, 0xa3d7, 0x588b, 0xa392,
00168   0x5842, 0xa34c, 0x57f9, 0xa307, 0x57b0, 0xa2c2, 0x5767, 0xa27d,
00169   0x571d, 0xa239, 0x56d4, 0xa1f5, 0x568a, 0xa1b0, 0x5640, 0xa16d,
00170   0x55f5, 0xa129, 0x55ab, 0xa0e6, 0x5560, 0xa0a2, 0x5515, 0xa060,
00171   0x54ca, 0xa01d, 0x547e, 0x9fda, 0x5433, 0x9f98, 0x53e7, 0x9f56,
00172   0x539b, 0x9f14, 0x534e, 0x9ed3, 0x5302, 0x9e91, 0x52b5, 0x9e50,
00173   0x5269, 0x9e0f, 0x521c, 0x9dcf, 0x51ce, 0x9d8f, 0x5181, 0x9d4e,
00174   0x5133, 0x9d0e, 0x50e5, 0x9ccf, 0x5097, 0x9c8f, 0x5049, 0x9c50,
00175   0x4ffb, 0x9c11, 0x4fac, 0x9bd3, 0x4f5e, 0x9b94, 0x4f0f, 0x9b56,
00176   0x4ebf, 0x9b18, 0x4e70, 0x9ada, 0x4e21, 0x9a9d, 0x4dd1, 0x9a60,
00177   0x4d81, 0x9a23, 0x4d31, 0x99e6, 0x4ce1, 0x99a9, 0x4c90, 0x996d,
00178   0x4c3f, 0x9931, 0x4bef, 0x98f5, 0x4b9e, 0x98ba, 0x4b4c, 0x987e,
00179   0x4afb, 0x9843, 0x4aa9, 0x9809, 0x4a58, 0x97ce, 0x4a06, 0x9794,
00180   0x49b4, 0x975a, 0x4961, 0x9720, 0x490f, 0x96e7, 0x48bc, 0x96ad,
00181   0x4869, 0x9674, 0x4816, 0x963c, 0x47c3, 0x9603, 0x4770, 0x95cb,
00182   0x471c, 0x9593, 0x46c9, 0x955b, 0x4675, 0x9524, 0x4621, 0x94ed,
00183   0x45cd, 0x94b6, 0x4578, 0x947f, 0x4524, 0x9448, 0x44cf, 0x9412,
00184   0x447a, 0x93dc, 0x4425, 0x93a7, 0x43d0, 0x9371, 0x437b, 0x933c,
00185   0x4325, 0x9307, 0x42d0, 0x92d3, 0x427a, 0x929e, 0x4224, 0x926a,
00186   0x41ce, 0x9236, 0x4177, 0x9203, 0x4121, 0x91d0, 0x40ca, 0x919d,
00187   0x4073, 0x916a, 0x401d, 0x9137, 0x3fc5, 0x9105, 0x3f6e, 0x90d3,
00188   0x3f17, 0x90a1, 0x3ebf, 0x9070, 0x3e68, 0x903f, 0x3e10, 0x900e,
00189   0x3db8, 0x8fdd, 0x3d60, 0x8fad, 0x3d07, 0x8f7d, 0x3caf, 0x8f4d,
00190   0x3c56, 0x8f1e, 0x3bfd, 0x8eee, 0x3ba5, 0x8ebf, 0x3b4c, 0x8e91,
00191   0x3af2, 0x8e62, 0x3a99, 0x8e34, 0x3a40, 0x8e06, 0x39e6, 0x8dd9,
00192   0x398c, 0x8dab, 0x3932, 0x8d7e, 0x38d8, 0x8d51, 0x387e, 0x8d25,
00193   0x3824, 0x8cf9, 0x37ca, 0x8ccd, 0x376f, 0x8ca1, 0x3714, 0x8c76,
00194   0x36ba, 0x8c4b, 0x365f, 0x8c20, 0x3604, 0x8bf5, 0x35a8, 0x8bcb,
00195   0x354d, 0x8ba1, 0x34f2, 0x8b77, 0x3496, 0x8b4e, 0x343a, 0x8b25,
00196   0x33de, 0x8afc, 0x3382, 0x8ad3, 0x3326, 0x8aab, 0x32ca, 0x8a83,
00197   0x326e, 0x8a5b, 0x3211, 0x8a34, 0x31b5, 0x8a0c, 0x3158, 0x89e5,
00198   0x30fb, 0x89bf, 0x309e, 0x8998, 0x3041, 0x8972, 0x2fe4, 0x894d,
00199   0x2f87, 0x8927, 0x2f29, 0x8902, 0x2ecc, 0x88dd, 0x2e6e, 0x88b9,
00200   0x2e11, 0x8894, 0x2db3, 0x8870, 0x2d55, 0x884c, 0x2cf7, 0x8829,
00201   0x2c98, 0x8806, 0x2c3a, 0x87e3, 0x2bdc, 0x87c0, 0x2b7d, 0x879e,
00202   0x2b1f, 0x877c, 0x2ac0, 0x875a, 0x2a61, 0x8739, 0x2a02, 0x8718,
00203   0x29a3, 0x86f7, 0x2944, 0x86d6, 0x28e5, 0x86b6, 0x2886, 0x8696,
00204   0x2826, 0x8676, 0x27c7, 0x8657, 0x2767, 0x8638, 0x2707, 0x8619,
00205   0x26a8, 0x85fb, 0x2648, 0x85dc, 0x25e8, 0x85be, 0x2588, 0x85a1,
00206   0x2528, 0x8583, 0x24c7, 0x8566, 0x2467, 0x854a, 0x2407, 0x852d,
00207   0x23a6, 0x8511, 0x2345, 0x84f5, 0x22e5, 0x84da, 0x2284, 0x84be,
00208   0x2223, 0x84a3, 0x21c2, 0x8489, 0x2161, 0x846e, 0x2100, 0x8454,
00209   0x209f, 0x843b, 0x203e, 0x8421, 0x1fdc, 0x8408, 0x1f7b, 0x83ef,
00210   0x1f19, 0x83d7, 0x1eb8, 0x83be, 0x1e56, 0x83a6, 0x1df5, 0x838f,
00211   0x1d93, 0x8377, 0x1d31, 0x8360, 0x1ccf, 0x8349, 0x1c6d, 0x8333,
00212   0x1c0b, 0x831d, 0x1ba9, 0x8307, 0x1b47, 0x82f1, 0x1ae4, 0x82dc,
00213   0x1a82, 0x82c7, 0x1a20, 0x82b2, 0x19bd, 0x829e, 0x195b, 0x828a,
00214   0x18f8, 0x8276, 0x1896, 0x8263, 0x1833, 0x8250, 0x17d0, 0x823d,
00215   0x176d, 0x822a, 0x170a, 0x8218, 0x16a8, 0x8206, 0x1645, 0x81f4,
00216   0x15e2, 0x81e3, 0x157f, 0x81d2, 0x151b, 0x81c1, 0x14b8, 0x81b1,
00217   0x1455, 0x81a1, 0x13f2, 0x8191, 0x138e, 0x8181, 0x132b, 0x8172,
00218   0x12c8, 0x8163, 0x1264, 0x8155, 0x1201, 0x8146, 0x119d, 0x8138,
00219   0x1139, 0x812b, 0x10d6, 0x811d, 0x1072, 0x8110, 0x100e, 0x8103,
00220   0xfab, 0x80f7, 0xf47, 0x80eb, 0xee3, 0x80df, 0xe7f, 0x80d3,
00221   0xe1b, 0x80c8, 0xdb7, 0x80bd, 0xd53, 0x80b3, 0xcef, 0x80a8,
00222   0xc8b, 0x809e, 0xc27, 0x8095, 0xbc3, 0x808b, 0xb5f, 0x8082,
00223   0xafb, 0x8079, 0xa97, 0x8071, 0xa33, 0x8069, 0x9ce, 0x8061,
00224   0x96a, 0x8059, 0x906, 0x8052, 0x8a2, 0x804b, 0x83d, 0x8044,
00225   0x7d9, 0x803e, 0x775, 0x8038, 0x710, 0x8032, 0x6ac, 0x802d,
00226   0x647, 0x8028, 0x5e3, 0x8023, 0x57f, 0x801f, 0x51a, 0x801b,
00227   0x4b6, 0x8017, 0x451, 0x8013, 0x3ed, 0x8010, 0x388, 0x800d,
00228   0x324, 0x800a, 0x2bf, 0x8008, 0x25b, 0x8006, 0x1f6, 0x8004,
00229   0x192, 0x8003, 0x12d, 0x8002, 0xc9, 0x8001, 0x64, 0x8001,
00230 };
00231
00232 static const q15_t WeightsQ15_2048[4096] = {
00233   0x7fff, 0x0, 0x7fff, 0xffe7, 0x7fff, 0xffce, 0x7fff, 0xffb5,
00234   0x7fff, 0xff9c, 0x7fff, 0xff83, 0x7fff, 0xff6a, 0x7fff, 0xff51,
00235   0x7fff, 0xff37, 0x7fff, 0xff1e, 0x7fff, 0xff05, 0x7ffe, 0xfeec,
00236   0x7ffe, 0xfed3, 0x7ffe, 0xfeba, 0x7ffe, 0xfea1, 0x7ffd, 0xfe88,
00237   0x7ffd, 0xfe6e, 0x7ffd, 0xfe55, 0x7ffc, 0xfe3c, 0x7ffc, 0xfe23,
00238   0x7ffc, 0xfe0a, 0x7ffb, 0xfdf1, 0x7ffb, 0xfdd8, 0x7ffa, 0xfdbe,
00239   0x7ffa, 0xfda5, 0x7ff9, 0xfd8c, 0x7ff9, 0xfd73, 0x7ff8, 0xfd5a,
00240   0x7ff8, 0xfd41, 0x7ff7, 0xfd28, 0x7ff7, 0xfd0f, 0x7ff6, 0xfcf5,
00241   0x7ff6, 0xfcdc, 0x7ff5, 0xfcc3, 0x7ff4, 0xfcaa, 0x7ff4, 0xfc91,
00242   0x7ff3, 0xfc78, 0x7ff2, 0xfc5f, 0x7ff2, 0xfc46, 0x7ff1, 0xfc2c,
00243   0x7ff0, 0xfc13, 0x7fef, 0xfbfa, 0x7fee, 0xfbe1, 0x7fee, 0xfbc8,
00244   0x7fed, 0xfbaf, 0x7fec, 0xfb96, 0x7feb, 0xfb7d, 0x7fea, 0xfb64,
00245   0x7fe9, 0xfb4a, 0x7fe8, 0xfb31, 0x7fe7, 0xfb18, 0x7fe6, 0xfaff,
00246   0x7fe5, 0xfae6, 0x7fe4, 0xfacd, 0x7fe3, 0xfab4, 0x7fe2, 0xfa9b,
00247   0x7fe1, 0xfa81, 0x7fe0, 0xfa68, 0x7fdf, 0xfa4f, 0x7fde, 0xfa36,
00248   0x7fdd, 0xfa1d, 0x7fdc, 0xfa04, 0x7fda, 0xf9eb, 0x7fd9, 0xf9d2,
00249   0x7fd8, 0xf9b9, 0x7fd7, 0xf9a0, 0x7fd6, 0xf986, 0x7fd4, 0xf96d,
00250   0x7fd3, 0xf954, 0x7fd2, 0xf93b, 0x7fd0, 0xf922, 0x7fcf, 0xf909,
00251   0x7fce, 0xf8f0, 0x7fcc, 0xf8d7, 0x7fcb, 0xf8be, 0x7fc9, 0xf8a5,
00252   0x7fc8, 0xf88b, 0x7fc6, 0xf872, 0x7fc5, 0xf859, 0x7fc3, 0xf840,
00253   0x7fc2, 0xf827, 0x7fc0, 0xf80e, 0x7fbf, 0xf7f5, 0x7fbd, 0xf7dc,
00254   0x7fbc, 0xf7c3, 0x7fba, 0xf7aa, 0x7fb8, 0xf791, 0x7fb7, 0xf778,
00255   0x7fb5, 0xf75e, 0x7fb3, 0xf745, 0x7fb1, 0xf72c, 0x7fb0, 0xf713,
00256   0x7fae, 0xf6fa, 0x7fac, 0xf6e1, 0x7faa, 0xf6c8, 0x7fa9, 0xf6af,
00257   0x7fa7, 0xf696, 0x7fa5, 0xf67d, 0x7fa3, 0xf664, 0x7fa1, 0xf64b,
00258   0x7f9f, 0xf632, 0x7f9d, 0xf619, 0x7f9b, 0xf600, 0x7f99, 0xf5e7,
00259   0x7f97, 0xf5cd, 0x7f95, 0xf5b4, 0x7f93, 0xf59b, 0x7f91, 0xf582,
00260   0x7f8f, 0xf569, 0x7f8d, 0xf550, 0x7f8b, 0xf537, 0x7f89, 0xf51e,
00261   0x7f87, 0xf505, 0x7f85, 0xf4ec, 0x7f82, 0xf4d3, 0x7f80, 0xf4ba,
00262   0x7f7e, 0xf4a1, 0x7f7c, 0xf488, 0x7f79, 0xf46f, 0x7f77, 0xf456,
00263   0x7f75, 0xf43d, 0x7f72, 0xf424, 0x7f70, 0xf40b, 0x7f6e, 0xf3f2,
00264   0x7f6b, 0xf3d9, 0x7f69, 0xf3c0, 0x7f67, 0xf3a7, 0x7f64, 0xf38e,
00265   0x7f62, 0xf375, 0x7f5f, 0xf35c, 0x7f5d, 0xf343, 0x7f5a, 0xf32a,
00266   0x7f58, 0xf311, 0x7f55, 0xf2f8, 0x7f53, 0xf2df, 0x7f50, 0xf2c6,
00267   0x7f4d, 0xf2ad, 0x7f4b, 0xf294, 0x7f48, 0xf27b, 0x7f45, 0xf262,
00268   0x7f43, 0xf249, 0x7f40, 0xf230, 0x7f3d, 0xf217, 0x7f3b, 0xf1fe,
00269   0x7f38, 0xf1e5, 0x7f35, 0xf1cc, 0x7f32, 0xf1b3, 0x7f2f, 0xf19a,
00270   0x7f2d, 0xf181, 0x7f2a, 0xf168, 0x7f27, 0xf14f, 0x7f24, 0xf136,
00271   0x7f21, 0xf11d, 0x7f1e, 0xf104, 0x7f1b, 0xf0eb, 0x7f18, 0xf0d2,
00272   0x7f15, 0xf0b9, 0x7f12, 0xf0a0, 0x7f0f, 0xf087, 0x7f0c, 0xf06e,
00273   0x7f09, 0xf055, 0x7f06, 0xf03c, 0x7f03, 0xf023, 0x7f00, 0xf00b,
00274   0x7efd, 0xeff2, 0x7ef9, 0xefd9, 0x7ef6, 0xefc0, 0x7ef3, 0xefa7,
00275   0x7ef0, 0xef8e, 0x7eed, 0xef75, 0x7ee9, 0xef5c, 0x7ee6, 0xef43,
00276   0x7ee3, 0xef2a, 0x7edf, 0xef11, 0x7edc, 0xeef8, 0x7ed9, 0xeedf,
00277   0x7ed5, 0xeec7, 0x7ed2, 0xeeae, 0x7ecf, 0xee95, 0x7ecb, 0xee7c,
00278   0x7ec8, 0xee63, 0x7ec4, 0xee4a, 0x7ec1, 0xee31, 0x7ebd, 0xee18,
00279   0x7eba, 0xedff, 0x7eb6, 0xede7, 0x7eb3, 0xedce, 0x7eaf, 0xedb5,
00280   0x7eab, 0xed9c, 0x7ea8, 0xed83, 0x7ea4, 0xed6a, 0x7ea1, 0xed51,
00281   0x7e9d, 0xed38, 0x7e99, 0xed20, 0x7e95, 0xed07, 0x7e92, 0xecee,
00282   0x7e8e, 0xecd5, 0x7e8a, 0xecbc, 0x7e86, 0xeca3, 0x7e83, 0xec8a,
00283   0x7e7f, 0xec72, 0x7e7b, 0xec59, 0x7e77, 0xec40, 0x7e73, 0xec27,
00284   0x7e6f, 0xec0e, 0x7e6b, 0xebf5, 0x7e67, 0xebdd, 0x7e63, 0xebc4,
00285   0x7e5f, 0xebab, 0x7e5b, 0xeb92, 0x7e57, 0xeb79, 0x7e53, 0xeb61,
00286   0x7e4f, 0xeb48, 0x7e4b, 0xeb2f, 0x7e47, 0xeb16, 0x7e43, 0xeafd,
00287   0x7e3f, 0xeae5, 0x7e3b, 0xeacc, 0x7e37, 0xeab3, 0x7e32, 0xea9a,
00288   0x7e2e, 0xea81, 0x7e2a, 0xea69, 0x7e26, 0xea50, 0x7e21, 0xea37,
00289   0x7e1d, 0xea1e, 0x7e19, 0xea06, 0x7e14, 0xe9ed, 0x7e10, 0xe9d4,
00290   0x7e0c, 0xe9bb, 0x7e07, 0xe9a3, 0x7e03, 0xe98a, 0x7dff, 0xe971,
00291   0x7dfa, 0xe958, 0x7df6, 0xe940, 0x7df1, 0xe927, 0x7ded, 0xe90e,
00292   0x7de8, 0xe8f6, 0x7de4, 0xe8dd, 0x7ddf, 0xe8c4, 0x7dda, 0xe8ab,
00293   0x7dd6, 0xe893, 0x7dd1, 0xe87a, 0x7dcd, 0xe861, 0x7dc8, 0xe849,
00294   0x7dc3, 0xe830, 0x7dbf, 0xe817, 0x7dba, 0xe7fe, 0x7db5, 0xe7e6,
00295   0x7db0, 0xe7cd, 0x7dac, 0xe7b4, 0x7da7, 0xe79c, 0x7da2, 0xe783,
00296   0x7d9d, 0xe76a, 0x7d98, 0xe752, 0x7d94, 0xe739, 0x7d8f, 0xe720,
00297   0x7d8a, 0xe708, 0x7d85, 0xe6ef, 0x7d80, 0xe6d6, 0x7d7b, 0xe6be,
00298   0x7d76, 0xe6a5, 0x7d71, 0xe68d, 0x7d6c, 0xe674, 0x7d67, 0xe65b,
00299   0x7d62, 0xe643, 0x7d5d, 0xe62a, 0x7d58, 0xe611, 0x7d53, 0xe5f9,
00300   0x7d4e, 0xe5e0, 0x7d49, 0xe5c8, 0x7d43, 0xe5af, 0x7d3e, 0xe596,
00301   0x7d39, 0xe57e, 0x7d34, 0xe565, 0x7d2f, 0xe54d, 0x7d29, 0xe534,
00302   0x7d24, 0xe51c, 0x7d1f, 0xe503, 0x7d19, 0xe4ea, 0x7d14, 0xe4d2,
00303   0x7d0f, 0xe4b9, 0x7d09, 0xe4a1, 0x7d04, 0xe488, 0x7cff, 0xe470,
00304   0x7cf9, 0xe457, 0x7cf4, 0xe43f, 0x7cee, 0xe426, 0x7ce9, 0xe40e,
00305   0x7ce3, 0xe3f5, 0x7cde, 0xe3dc, 0x7cd8, 0xe3c4, 0x7cd3, 0xe3ab,
00306   0x7ccd, 0xe393, 0x7cc8, 0xe37a, 0x7cc2, 0xe362, 0x7cbc, 0xe349,
00307   0x7cb7, 0xe331, 0x7cb1, 0xe318, 0x7cab, 0xe300, 0x7ca6, 0xe2e8,
00308   0x7ca0, 0xe2cf, 0x7c9a, 0xe2b7, 0x7c94, 0xe29e, 0x7c8f, 0xe286,
00309   0x7c89, 0xe26d, 0x7c83, 0xe255, 0x7c7d, 0xe23c, 0x7c77, 0xe224,
00310   0x7c71, 0xe20b, 0x7c6c, 0xe1f3, 0x7c66, 0xe1db, 0x7c60, 0xe1c2,
00311   0x7c5a, 0xe1aa, 0x7c54, 0xe191, 0x7c4e, 0xe179, 0x7c48, 0xe160,
00312   0x7c42, 0xe148, 0x7c3c, 0xe130, 0x7c36, 0xe117, 0x7c30, 0xe0ff,
00313   0x7c29, 0xe0e7, 0x7c23, 0xe0ce, 0x7c1d, 0xe0b6, 0x7c17, 0xe09d,
00314   0x7c11, 0xe085, 0x7c0b, 0xe06d, 0x7c05, 0xe054, 0x7bfe, 0xe03c,
00315   0x7bf8, 0xe024, 0x7bf2, 0xe00b, 0x7beb, 0xdff3, 0x7be5, 0xdfdb,
00316   0x7bdf, 0xdfc2, 0x7bd9, 0xdfaa, 0x7bd2, 0xdf92, 0x7bcc, 0xdf79,
00317   0x7bc5, 0xdf61, 0x7bbf, 0xdf49, 0x7bb9, 0xdf30, 0x7bb2, 0xdf18,
00318   0x7bac, 0xdf00, 0x7ba5, 0xdee8, 0x7b9f, 0xdecf, 0x7b98, 0xdeb7,
00319   0x7b92, 0xde9f, 0x7b8b, 0xde87, 0x7b84, 0xde6e, 0x7b7e, 0xde56,
00320   0x7b77, 0xde3e, 0x7b71, 0xde26, 0x7b6a, 0xde0d, 0x7b63, 0xddf5,
00321   0x7b5d, 0xdddd, 0x7b56, 0xddc5, 0x7b4f, 0xddac, 0x7b48, 0xdd94,
00322   0x7b42, 0xdd7c, 0x7b3b, 0xdd64, 0x7b34, 0xdd4c, 0x7b2d, 0xdd33,
00323   0x7b26, 0xdd1b, 0x7b1f, 0xdd03, 0x7b19, 0xdceb, 0x7b12, 0xdcd3,
00324   0x7b0b, 0xdcbb, 0x7b04, 0xdca2, 0x7afd, 0xdc8a, 0x7af6, 0xdc72,
00325   0x7aef, 0xdc5a, 0x7ae8, 0xdc42, 0x7ae1, 0xdc2a, 0x7ada, 0xdc12,
00326   0x7ad3, 0xdbf9, 0x7acc, 0xdbe1, 0x7ac5, 0xdbc9, 0x7abd, 0xdbb1,
00327   0x7ab6, 0xdb99, 0x7aaf, 0xdb81, 0x7aa8, 0xdb69, 0x7aa1, 0xdb51,
00328   0x7a9a, 0xdb39, 0x7a92, 0xdb21, 0x7a8b, 0xdb09, 0x7a84, 0xdaf1,
00329   0x7a7d, 0xdad8, 0x7a75, 0xdac0, 0x7a6e, 0xdaa8, 0x7a67, 0xda90,
00330   0x7a5f, 0xda78, 0x7a58, 0xda60, 0x7a50, 0xda48, 0x7a49, 0xda30,
00331   0x7a42, 0xda18, 0x7a3a, 0xda00, 0x7a33, 0xd9e8, 0x7a2b, 0xd9d0,
00332   0x7a24, 0xd9b8, 0x7a1c, 0xd9a0, 0x7a15, 0xd988, 0x7a0d, 0xd970,
00333   0x7a05, 0xd958, 0x79fe, 0xd940, 0x79f6, 0xd928, 0x79ef, 0xd911,
00334   0x79e7, 0xd8f9, 0x79df, 0xd8e1, 0x79d8, 0xd8c9, 0x79d0, 0xd8b1,
00335   0x79c8, 0xd899, 0x79c0, 0xd881, 0x79b9, 0xd869, 0x79b1, 0xd851,
00336   0x79a9, 0xd839, 0x79a1, 0xd821, 0x7999, 0xd80a, 0x7992, 0xd7f2,
00337   0x798a, 0xd7da, 0x7982, 0xd7c2, 0x797a, 0xd7aa, 0x7972, 0xd792,
00338   0x796a, 0xd77a, 0x7962, 0xd763, 0x795a, 0xd74b, 0x7952, 0xd733,
00339   0x794a, 0xd71b, 0x7942, 0xd703, 0x793a, 0xd6eb, 0x7932, 0xd6d4,
00340   0x792a, 0xd6bc, 0x7922, 0xd6a4, 0x7919, 0xd68c, 0x7911, 0xd675,
00341   0x7909, 0xd65d, 0x7901, 0xd645, 0x78f9, 0xd62d, 0x78f1, 0xd615,
00342   0x78e8, 0xd5fe, 0x78e0, 0xd5e6, 0x78d8, 0xd5ce, 0x78cf, 0xd5b7,
00343   0x78c7, 0xd59f, 0x78bf, 0xd587, 0x78b6, 0xd56f, 0x78ae, 0xd558,
00344   0x78a6, 0xd540, 0x789d, 0xd528, 0x7895, 0xd511, 0x788c, 0xd4f9,
00345   0x7884, 0xd4e1, 0x787c, 0xd4ca, 0x7873, 0xd4b2, 0x786b, 0xd49a,
00346   0x7862, 0xd483, 0x7859, 0xd46b, 0x7851, 0xd453, 0x7848, 0xd43c,
00347   0x7840, 0xd424, 0x7837, 0xd40d, 0x782e, 0xd3f5, 0x7826, 0xd3dd,
00348   0x781d, 0xd3c6, 0x7814, 0xd3ae, 0x780c, 0xd397, 0x7803, 0xd37f,
00349   0x77fa, 0xd368, 0x77f1, 0xd350, 0x77e9, 0xd338, 0x77e0, 0xd321,
00350   0x77d7, 0xd309, 0x77ce, 0xd2f2, 0x77c5, 0xd2da, 0x77bc, 0xd2c3,
00351   0x77b4, 0xd2ab, 0x77ab, 0xd294, 0x77a2, 0xd27c, 0x7799, 0xd265,
00352   0x7790, 0xd24d, 0x7787, 0xd236, 0x777e, 0xd21e, 0x7775, 0xd207,
00353   0x776c, 0xd1ef, 0x7763, 0xd1d8, 0x775a, 0xd1c1, 0x7751, 0xd1a9,
00354   0x7747, 0xd192, 0x773e, 0xd17a, 0x7735, 0xd163, 0x772c, 0xd14b,
00355   0x7723, 0xd134, 0x771a, 0xd11d, 0x7710, 0xd105, 0x7707, 0xd0ee,
00356   0x76fe, 0xd0d7, 0x76f5, 0xd0bf, 0x76eb, 0xd0a8, 0x76e2, 0xd091,
00357   0x76d9, 0xd079, 0x76cf, 0xd062, 0x76c6, 0xd04b, 0x76bd, 0xd033,
00358   0x76b3, 0xd01c, 0x76aa, 0xd005, 0x76a0, 0xcfed, 0x7697, 0xcfd6,
00359   0x768e, 0xcfbf, 0x7684, 0xcfa7, 0x767b, 0xcf90, 0x7671, 0xcf79,
00360   0x7668, 0xcf62, 0x765e, 0xcf4a, 0x7654, 0xcf33, 0x764b, 0xcf1c,
00361   0x7641, 0xcf05, 0x7638, 0xceee, 0x762e, 0xced6, 0x7624, 0xcebf,
00362   0x761b, 0xcea8, 0x7611, 0xce91, 0x7607, 0xce7a, 0x75fd, 0xce62,
00363   0x75f4, 0xce4b, 0x75ea, 0xce34, 0x75e0, 0xce1d, 0x75d6, 0xce06,
00364   0x75cc, 0xcdef, 0x75c3, 0xcdd8, 0x75b9, 0xcdc0, 0x75af, 0xcda9,
00365   0x75a5, 0xcd92, 0x759b, 0xcd7b, 0x7591, 0xcd64, 0x7587, 0xcd4d,
00366   0x757d, 0xcd36, 0x7573, 0xcd1f, 0x7569, 0xcd08, 0x755f, 0xccf1,
00367   0x7555, 0xccda, 0x754b, 0xccc3, 0x7541, 0xccac, 0x7537, 0xcc95,
00368   0x752d, 0xcc7e, 0x7523, 0xcc67, 0x7519, 0xcc50, 0x750f, 0xcc39,
00369   0x7504, 0xcc22, 0x74fa, 0xcc0b, 0x74f0, 0xcbf4, 0x74e6, 0xcbdd,
00370   0x74db, 0xcbc6, 0x74d1, 0xcbaf, 0x74c7, 0xcb98, 0x74bd, 0xcb81,
00371   0x74b2, 0xcb6a, 0x74a8, 0xcb53, 0x749e, 0xcb3c, 0x7493, 0xcb25,
00372   0x7489, 0xcb0e, 0x747e, 0xcaf8, 0x7474, 0xcae1, 0x746a, 0xcaca,
00373   0x745f, 0xcab3, 0x7455, 0xca9c, 0x744a, 0xca85, 0x7440, 0xca6e,
00374   0x7435, 0xca58, 0x742b, 0xca41, 0x7420, 0xca2a, 0x7415, 0xca13,
00375   0x740b, 0xc9fc, 0x7400, 0xc9e6, 0x73f6, 0xc9cf, 0x73eb, 0xc9b8,
00376   0x73e0, 0xc9a1, 0x73d6, 0xc98b, 0x73cb, 0xc974, 0x73c0, 0xc95d,
00377   0x73b5, 0xc946, 0x73ab, 0xc930, 0x73a0, 0xc919, 0x7395, 0xc902,
00378   0x738a, 0xc8ec, 0x737f, 0xc8d5, 0x7375, 0xc8be, 0x736a, 0xc8a8,
00379   0x735f, 0xc891, 0x7354, 0xc87a, 0x7349, 0xc864, 0x733e, 0xc84d,
00380   0x7333, 0xc836, 0x7328, 0xc820, 0x731d, 0xc809, 0x7312, 0xc7f3,
00381   0x7307, 0xc7dc, 0x72fc, 0xc7c5, 0x72f1, 0xc7af, 0x72e6, 0xc798,
00382   0x72db, 0xc782, 0x72d0, 0xc76b, 0x72c5, 0xc755, 0x72ba, 0xc73e,
00383   0x72af, 0xc728, 0x72a3, 0xc711, 0x7298, 0xc6fa, 0x728d, 0xc6e4,
00384   0x7282, 0xc6ce, 0x7276, 0xc6b7, 0x726b, 0xc6a1, 0x7260, 0xc68a,
00385   0x7255, 0xc674, 0x7249, 0xc65d, 0x723e, 0xc647, 0x7233, 0xc630,
00386   0x7227, 0xc61a, 0x721c, 0xc603, 0x7211, 0xc5ed, 0x7205, 0xc5d7,
00387   0x71fa, 0xc5c0, 0x71ee, 0xc5aa, 0x71e3, 0xc594, 0x71d7, 0xc57d,
00388   0x71cc, 0xc567, 0x71c0, 0xc551, 0x71b5, 0xc53a, 0x71a9, 0xc524,
00389   0x719e, 0xc50e, 0x7192, 0xc4f7, 0x7186, 0xc4e1, 0x717b, 0xc4cb,
00390   0x716f, 0xc4b4, 0x7164, 0xc49e, 0x7158, 0xc488, 0x714c, 0xc472,
00391   0x7141, 0xc45b, 0x7135, 0xc445, 0x7129, 0xc42f, 0x711d, 0xc419,
00392   0x7112, 0xc403, 0x7106, 0xc3ec, 0x70fa, 0xc3d6, 0x70ee, 0xc3c0,
00393   0x70e2, 0xc3aa, 0x70d6, 0xc394, 0x70cb, 0xc37d, 0x70bf, 0xc367,
00394   0x70b3, 0xc351, 0x70a7, 0xc33b, 0x709b, 0xc325, 0x708f, 0xc30f,
00395   0x7083, 0xc2f9, 0x7077, 0xc2e3, 0x706b, 0xc2cd, 0x705f, 0xc2b7,
00396   0x7053, 0xc2a0, 0x7047, 0xc28a, 0x703b, 0xc274, 0x702f, 0xc25e,
00397   0x7023, 0xc248, 0x7016, 0xc232, 0x700a, 0xc21c, 0x6ffe, 0xc206,
00398   0x6ff2, 0xc1f0, 0x6fe6, 0xc1da, 0x6fda, 0xc1c4, 0x6fcd, 0xc1ae,
00399   0x6fc1, 0xc198, 0x6fb5, 0xc183, 0x6fa9, 0xc16d, 0x6f9c, 0xc157,
00400   0x6f90, 0xc141, 0x6f84, 0xc12b, 0x6f77, 0xc115, 0x6f6b, 0xc0ff,
00401   0x6f5f, 0xc0e9, 0x6f52, 0xc0d3, 0x6f46, 0xc0bd, 0x6f39, 0xc0a8,
00402   0x6f2d, 0xc092, 0x6f20, 0xc07c, 0x6f14, 0xc066, 0x6f07, 0xc050,
00403   0x6efb, 0xc03b, 0x6eee, 0xc025, 0x6ee2, 0xc00f, 0x6ed5, 0xbff9,
00404   0x6ec9, 0xbfe3, 0x6ebc, 0xbfce, 0x6eaf, 0xbfb8, 0x6ea3, 0xbfa2,
00405   0x6e96, 0xbf8d, 0x6e89, 0xbf77, 0x6e7d, 0xbf61, 0x6e70, 0xbf4b,
00406   0x6e63, 0xbf36, 0x6e57, 0xbf20, 0x6e4a, 0xbf0a, 0x6e3d, 0xbef5,
00407   0x6e30, 0xbedf, 0x6e24, 0xbeca, 0x6e17, 0xbeb4, 0x6e0a, 0xbe9e,
00408   0x6dfd, 0xbe89, 0x6df0, 0xbe73, 0x6de3, 0xbe5e, 0x6dd6, 0xbe48,
00409   0x6dca, 0xbe32, 0x6dbd, 0xbe1d, 0x6db0, 0xbe07, 0x6da3, 0xbdf2,
00410   0x6d96, 0xbddc, 0x6d89, 0xbdc7, 0x6d7c, 0xbdb1, 0x6d6f, 0xbd9c,
00411   0x6d62, 0xbd86, 0x6d55, 0xbd71, 0x6d48, 0xbd5b, 0x6d3a, 0xbd46,
00412   0x6d2d, 0xbd30, 0x6d20, 0xbd1b, 0x6d13, 0xbd06, 0x6d06, 0xbcf0,
00413   0x6cf9, 0xbcdb, 0x6cec, 0xbcc5, 0x6cde, 0xbcb0, 0x6cd1, 0xbc9b,
00414   0x6cc4, 0xbc85, 0x6cb7, 0xbc70, 0x6ca9, 0xbc5b, 0x6c9c, 0xbc45,
00415   0x6c8f, 0xbc30, 0x6c81, 0xbc1b, 0x6c74, 0xbc05, 0x6c67, 0xbbf0,
00416   0x6c59, 0xbbdb, 0x6c4c, 0xbbc5, 0x6c3f, 0xbbb0, 0x6c31, 0xbb9b,
00417   0x6c24, 0xbb86, 0x6c16, 0xbb70, 0x6c09, 0xbb5b, 0x6bfb, 0xbb46,
00418   0x6bee, 0xbb31, 0x6be0, 0xbb1c, 0x6bd3, 0xbb06, 0x6bc5, 0xbaf1,
00419   0x6bb8, 0xbadc, 0x6baa, 0xbac7, 0x6b9c, 0xbab2, 0x6b8f, 0xba9d,
00420   0x6b81, 0xba88, 0x6b73, 0xba73, 0x6b66, 0xba5d, 0x6b58, 0xba48,
00421   0x6b4a, 0xba33, 0x6b3d, 0xba1e, 0x6b2f, 0xba09, 0x6b21, 0xb9f4,
00422   0x6b13, 0xb9df, 0x6b06, 0xb9ca, 0x6af8, 0xb9b5, 0x6aea, 0xb9a0,
00423   0x6adc, 0xb98b, 0x6ace, 0xb976, 0x6ac1, 0xb961, 0x6ab3, 0xb94c,
00424   0x6aa5, 0xb937, 0x6a97, 0xb922, 0x6a89, 0xb90d, 0x6a7b, 0xb8f8,
00425   0x6a6d, 0xb8e4, 0x6a5f, 0xb8cf, 0x6a51, 0xb8ba, 0x6a43, 0xb8a5,
00426   0x6a35, 0xb890, 0x6a27, 0xb87b, 0x6a19, 0xb866, 0x6a0b, 0xb852,
00427   0x69fd, 0xb83d, 0x69ef, 0xb828, 0x69e1, 0xb813, 0x69d3, 0xb7fe,
00428   0x69c4, 0xb7ea, 0x69b6, 0xb7d5, 0x69a8, 0xb7c0, 0x699a, 0xb7ab,
00429   0x698c, 0xb797, 0x697d, 0xb782, 0x696f, 0xb76d, 0x6961, 0xb758,
00430   0x6953, 0xb744, 0x6944, 0xb72f, 0x6936, 0xb71a, 0x6928, 0xb706,
00431   0x6919, 0xb6f1, 0x690b, 0xb6dd, 0x68fd, 0xb6c8, 0x68ee, 0xb6b3,
00432   0x68e0, 0xb69f, 0x68d1, 0xb68a, 0x68c3, 0xb676, 0x68b5, 0xb661,
00433   0x68a6, 0xb64c, 0x6898, 0xb638, 0x6889, 0xb623, 0x687b, 0xb60f,
00434   0x686c, 0xb5fa, 0x685e, 0xb5e6, 0x684f, 0xb5d1, 0x6840, 0xb5bd,
00435   0x6832, 0xb5a8, 0x6823, 0xb594, 0x6815, 0xb57f, 0x6806, 0xb56b,
00436   0x67f7, 0xb557, 0x67e9, 0xb542, 0x67da, 0xb52e, 0x67cb, 0xb519,
00437   0x67bd, 0xb505, 0x67ae, 0xb4f1, 0x679f, 0xb4dc, 0x6790, 0xb4c8,
00438   0x6782, 0xb4b4, 0x6773, 0xb49f, 0x6764, 0xb48b, 0x6755, 0xb477,
00439   0x6746, 0xb462, 0x6737, 0xb44e, 0x6729, 0xb43a, 0x671a, 0xb426,
00440   0x670b, 0xb411, 0x66fc, 0xb3fd, 0x66ed, 0xb3e9, 0x66de, 0xb3d5,
00441   0x66cf, 0xb3c1, 0x66c0, 0xb3ac, 0x66b1, 0xb398, 0x66a2, 0xb384,
00442   0x6693, 0xb370, 0x6684, 0xb35c, 0x6675, 0xb348, 0x6666, 0xb334,
00443   0x6657, 0xb31f, 0x6648, 0xb30b, 0x6639, 0xb2f7, 0x6629, 0xb2e3,
00444   0x661a, 0xb2cf, 0x660b, 0xb2bb, 0x65fc, 0xb2a7, 0x65ed, 0xb293,
00445   0x65dd, 0xb27f, 0x65ce, 0xb26b, 0x65bf, 0xb257, 0x65b0, 0xb243,
00446   0x65a0, 0xb22f, 0x6591, 0xb21b, 0x6582, 0xb207, 0x6573, 0xb1f3,
00447   0x6563, 0xb1df, 0x6554, 0xb1cc, 0x6545, 0xb1b8, 0x6535, 0xb1a4,
00448   0x6526, 0xb190, 0x6516, 0xb17c, 0x6507, 0xb168, 0x64f7, 0xb154,
00449   0x64e8, 0xb141, 0x64d9, 0xb12d, 0x64c9, 0xb119, 0x64ba, 0xb105,
00450   0x64aa, 0xb0f1, 0x649b, 0xb0de, 0x648b, 0xb0ca, 0x647b, 0xb0b6,
00451   0x646c, 0xb0a2, 0x645c, 0xb08f, 0x644d, 0xb07b, 0x643d, 0xb067,
00452   0x642d, 0xb054, 0x641e, 0xb040, 0x640e, 0xb02c, 0x63fe, 0xb019,
00453   0x63ef, 0xb005, 0x63df, 0xaff1, 0x63cf, 0xafde, 0x63c0, 0xafca,
00454   0x63b0, 0xafb7, 0x63a0, 0xafa3, 0x6390, 0xaf90, 0x6380, 0xaf7c,
00455   0x6371, 0xaf69, 0x6361, 0xaf55, 0x6351, 0xaf41, 0x6341, 0xaf2e,
00456   0x6331, 0xaf1b, 0x6321, 0xaf07, 0x6311, 0xaef4, 0x6301, 0xaee0,
00457   0x62f2, 0xaecd, 0x62e2, 0xaeb9, 0x62d2, 0xaea6, 0x62c2, 0xae92,
00458   0x62b2, 0xae7f, 0x62a2, 0xae6c, 0x6292, 0xae58, 0x6282, 0xae45,
00459   0x6271, 0xae32, 0x6261, 0xae1e, 0x6251, 0xae0b, 0x6241, 0xadf8,
00460   0x6231, 0xade4, 0x6221, 0xadd1, 0x6211, 0xadbe, 0x6201, 0xadab,
00461   0x61f1, 0xad97, 0x61e0, 0xad84, 0x61d0, 0xad71, 0x61c0, 0xad5e,
00462   0x61b0, 0xad4b, 0x619f, 0xad37, 0x618f, 0xad24, 0x617f, 0xad11,
00463   0x616f, 0xacfe, 0x615e, 0xaceb, 0x614e, 0xacd8, 0x613e, 0xacc5,
00464   0x612d, 0xacb2, 0x611d, 0xac9e, 0x610d, 0xac8b, 0x60fc, 0xac78,
00465   0x60ec, 0xac65, 0x60db, 0xac52, 0x60cb, 0xac3f, 0x60ba, 0xac2c,
00466   0x60aa, 0xac19, 0x6099, 0xac06, 0x6089, 0xabf3, 0x6078, 0xabe0,
00467   0x6068, 0xabcd, 0x6057, 0xabbb, 0x6047, 0xaba8, 0x6036, 0xab95,
00468   0x6026, 0xab82, 0x6015, 0xab6f, 0x6004, 0xab5c, 0x5ff4, 0xab49,
00469   0x5fe3, 0xab36, 0x5fd3, 0xab24, 0x5fc2, 0xab11, 0x5fb1, 0xaafe,
00470   0x5fa0, 0xaaeb, 0x5f90, 0xaad8, 0x5f7f, 0xaac6, 0x5f6e, 0xaab3,
00471   0x5f5e, 0xaaa0, 0x5f4d, 0xaa8e, 0x5f3c, 0xaa7b, 0x5f2b, 0xaa68,
00472   0x5f1a, 0xaa55, 0x5f0a, 0xaa43, 0x5ef9, 0xaa30, 0x5ee8, 0xaa1d,
00473   0x5ed7, 0xaa0b, 0x5ec6, 0xa9f8, 0x5eb5, 0xa9e6, 0x5ea4, 0xa9d3,
00474   0x5e93, 0xa9c0, 0x5e82, 0xa9ae, 0x5e71, 0xa99b, 0x5e60, 0xa989,
00475   0x5e50, 0xa976, 0x5e3f, 0xa964, 0x5e2d, 0xa951, 0x5e1c, 0xa93f,
00476   0x5e0b, 0xa92c, 0x5dfa, 0xa91a, 0x5de9, 0xa907, 0x5dd8, 0xa8f5,
00477   0x5dc7, 0xa8e3, 0x5db6, 0xa8d0, 0x5da5, 0xa8be, 0x5d94, 0xa8ab,
00478   0x5d83, 0xa899, 0x5d71, 0xa887, 0x5d60, 0xa874, 0x5d4f, 0xa862,
00479   0x5d3e, 0xa850, 0x5d2d, 0xa83d, 0x5d1b, 0xa82b, 0x5d0a, 0xa819,
00480   0x5cf9, 0xa807, 0x5ce8, 0xa7f4, 0x5cd6, 0xa7e2, 0x5cc5, 0xa7d0,
00481   0x5cb4, 0xa7be, 0x5ca2, 0xa7ab, 0x5c91, 0xa799, 0x5c80, 0xa787,
00482   0x5c6e, 0xa775, 0x5c5d, 0xa763, 0x5c4b, 0xa751, 0x5c3a, 0xa73f,
00483   0x5c29, 0xa72c, 0x5c17, 0xa71a, 0x5c06, 0xa708, 0x5bf4, 0xa6f6,
00484   0x5be3, 0xa6e4, 0x5bd1, 0xa6d2, 0x5bc0, 0xa6c0, 0x5bae, 0xa6ae,
00485   0x5b9d, 0xa69c, 0x5b8b, 0xa68a, 0x5b79, 0xa678, 0x5b68, 0xa666,
00486   0x5b56, 0xa654, 0x5b45, 0xa642, 0x5b33, 0xa630, 0x5b21, 0xa61f,
00487   0x5b10, 0xa60d, 0x5afe, 0xa5fb, 0x5aec, 0xa5e9, 0x5adb, 0xa5d7,
00488   0x5ac9, 0xa5c5, 0x5ab7, 0xa5b3, 0x5aa5, 0xa5a2, 0x5a94, 0xa590,
00489   0x5a82, 0xa57e, 0x5a70, 0xa56c, 0x5a5e, 0xa55b, 0x5a4d, 0xa549,
00490   0x5a3b, 0xa537, 0x5a29, 0xa525, 0x5a17, 0xa514, 0x5a05, 0xa502,
00491   0x59f3, 0xa4f0, 0x59e1, 0xa4df, 0x59d0, 0xa4cd, 0x59be, 0xa4bb,
00492   0x59ac, 0xa4aa, 0x599a, 0xa498, 0x5988, 0xa487, 0x5976, 0xa475,
00493   0x5964, 0xa463, 0x5952, 0xa452, 0x5940, 0xa440, 0x592e, 0xa42f,
00494   0x591c, 0xa41d, 0x590a, 0xa40c, 0x58f8, 0xa3fa, 0x58e6, 0xa3e9,
00495   0x58d4, 0xa3d7, 0x58c1, 0xa3c6, 0x58af, 0xa3b5, 0x589d, 0xa3a3,
00496   0x588b, 0xa392, 0x5879, 0xa380, 0x5867, 0xa36f, 0x5855, 0xa35e,
00497   0x5842, 0xa34c, 0x5830, 0xa33b, 0x581e, 0xa32a, 0x580c, 0xa318,
00498   0x57f9, 0xa307, 0x57e7, 0xa2f6, 0x57d5, 0xa2e5, 0x57c3, 0xa2d3,
00499   0x57b0, 0xa2c2, 0x579e, 0xa2b1, 0x578c, 0xa2a0, 0x5779, 0xa28f,
00500   0x5767, 0xa27d, 0x5755, 0xa26c, 0x5742, 0xa25b, 0x5730, 0xa24a,
00501   0x571d, 0xa239, 0x570b, 0xa228, 0x56f9, 0xa217, 0x56e6, 0xa206,
00502   0x56d4, 0xa1f5, 0x56c1, 0xa1e4, 0x56af, 0xa1d3, 0x569c, 0xa1c1,
00503   0x568a, 0xa1b0, 0x5677, 0xa1a0, 0x5665, 0xa18f, 0x5652, 0xa17e,
00504   0x5640, 0xa16d, 0x562d, 0xa15c, 0x561a, 0xa14b, 0x5608, 0xa13a,
00505   0x55f5, 0xa129, 0x55e3, 0xa118, 0x55d0, 0xa107, 0x55bd, 0xa0f6,
00506   0x55ab, 0xa0e6, 0x5598, 0xa0d5, 0x5585, 0xa0c4, 0x5572, 0xa0b3,
00507   0x5560, 0xa0a2, 0x554d, 0xa092, 0x553a, 0xa081, 0x5528, 0xa070,
00508   0x5515, 0xa060, 0x5502, 0xa04f, 0x54ef, 0xa03e, 0x54dc, 0xa02d,
00509   0x54ca, 0xa01d, 0x54b7, 0xa00c, 0x54a4, 0x9ffc, 0x5491, 0x9feb,
00510   0x547e, 0x9fda, 0x546b, 0x9fca, 0x5458, 0x9fb9, 0x5445, 0x9fa9,
00511   0x5433, 0x9f98, 0x5420, 0x9f88, 0x540d, 0x9f77, 0x53fa, 0x9f67,
00512   0x53e7, 0x9f56, 0x53d4, 0x9f46, 0x53c1, 0x9f35, 0x53ae, 0x9f25,
00513   0x539b, 0x9f14, 0x5388, 0x9f04, 0x5375, 0x9ef3, 0x5362, 0x9ee3,
00514   0x534e, 0x9ed3, 0x533b, 0x9ec2, 0x5328, 0x9eb2, 0x5315, 0x9ea2,
00515   0x5302, 0x9e91, 0x52ef, 0x9e81, 0x52dc, 0x9e71, 0x52c9, 0x9e61,
00516   0x52b5, 0x9e50, 0x52a2, 0x9e40, 0x528f, 0x9e30, 0x527c, 0x9e20,
00517   0x5269, 0x9e0f, 0x5255, 0x9dff, 0x5242, 0x9def, 0x522f, 0x9ddf,
00518   0x521c, 0x9dcf, 0x5208, 0x9dbf, 0x51f5, 0x9daf, 0x51e2, 0x9d9f,
00519   0x51ce, 0x9d8f, 0x51bb, 0x9d7e, 0x51a8, 0x9d6e, 0x5194, 0x9d5e,
00520   0x5181, 0x9d4e, 0x516e, 0x9d3e, 0x515a, 0x9d2e, 0x5147, 0x9d1e,
00521   0x5133, 0x9d0e, 0x5120, 0x9cff, 0x510c, 0x9cef, 0x50f9, 0x9cdf,
00522   0x50e5, 0x9ccf, 0x50d2, 0x9cbf, 0x50bf, 0x9caf, 0x50ab, 0x9c9f,
00523   0x5097, 0x9c8f, 0x5084, 0x9c80, 0x5070, 0x9c70, 0x505d, 0x9c60,
00524   0x5049, 0x9c50, 0x5036, 0x9c40, 0x5022, 0x9c31, 0x500f, 0x9c21,
00525   0x4ffb, 0x9c11, 0x4fe7, 0x9c02, 0x4fd4, 0x9bf2, 0x4fc0, 0x9be2,
00526   0x4fac, 0x9bd3, 0x4f99, 0x9bc3, 0x4f85, 0x9bb3, 0x4f71, 0x9ba4,
00527   0x4f5e, 0x9b94, 0x4f4a, 0x9b85, 0x4f36, 0x9b75, 0x4f22, 0x9b65,
00528   0x4f0f, 0x9b56, 0x4efb, 0x9b46, 0x4ee7, 0x9b37, 0x4ed3, 0x9b27,
00529   0x4ebf, 0x9b18, 0x4eac, 0x9b09, 0x4e98, 0x9af9, 0x4e84, 0x9aea,
00530   0x4e70, 0x9ada, 0x4e5c, 0x9acb, 0x4e48, 0x9abb, 0x4e34, 0x9aac,
00531   0x4e21, 0x9a9d, 0x4e0d, 0x9a8d, 0x4df9, 0x9a7e, 0x4de5, 0x9a6f,
00532   0x4dd1, 0x9a60, 0x4dbd, 0x9a50, 0x4da9, 0x9a41, 0x4d95, 0x9a32,
00533   0x4d81, 0x9a23, 0x4d6d, 0x9a13, 0x4d59, 0x9a04, 0x4d45, 0x99f5,
00534   0x4d31, 0x99e6, 0x4d1d, 0x99d7, 0x4d09, 0x99c7, 0x4cf5, 0x99b8,
00535   0x4ce1, 0x99a9, 0x4ccc, 0x999a, 0x4cb8, 0x998b, 0x4ca4, 0x997c,
00536   0x4c90, 0x996d, 0x4c7c, 0x995e, 0x4c68, 0x994f, 0x4c54, 0x9940,
00537   0x4c3f, 0x9931, 0x4c2b, 0x9922, 0x4c17, 0x9913, 0x4c03, 0x9904,
00538   0x4bef, 0x98f5, 0x4bda, 0x98e6, 0x4bc6, 0x98d7, 0x4bb2, 0x98c9,
00539   0x4b9e, 0x98ba, 0x4b89, 0x98ab, 0x4b75, 0x989c, 0x4b61, 0x988d,
00540   0x4b4c, 0x987e, 0x4b38, 0x9870, 0x4b24, 0x9861, 0x4b0f, 0x9852,
00541   0x4afb, 0x9843, 0x4ae7, 0x9835, 0x4ad2, 0x9826, 0x4abe, 0x9817,
00542   0x4aa9, 0x9809, 0x4a95, 0x97fa, 0x4a81, 0x97eb, 0x4a6c, 0x97dd,
00543   0x4a58, 0x97ce, 0x4a43, 0x97c0, 0x4a2f, 0x97b1, 0x4a1a, 0x97a2,
00544   0x4a06, 0x9794, 0x49f1, 0x9785, 0x49dd, 0x9777, 0x49c8, 0x9768,
00545   0x49b4, 0x975a, 0x499f, 0x974b, 0x498a, 0x973d, 0x4976, 0x972f,
00546   0x4961, 0x9720, 0x494d, 0x9712, 0x4938, 0x9703, 0x4923, 0x96f5,
00547   0x490f, 0x96e7, 0x48fa, 0x96d8, 0x48e6, 0x96ca, 0x48d1, 0x96bc,
00548   0x48bc, 0x96ad, 0x48a8, 0x969f, 0x4893, 0x9691, 0x487e, 0x9683,
00549   0x4869, 0x9674, 0x4855, 0x9666, 0x4840, 0x9658, 0x482b, 0x964a,
00550   0x4816, 0x963c, 0x4802, 0x962d, 0x47ed, 0x961f, 0x47d8, 0x9611,
00551   0x47c3, 0x9603, 0x47ae, 0x95f5, 0x479a, 0x95e7, 0x4785, 0x95d9,
00552   0x4770, 0x95cb, 0x475b, 0x95bd, 0x4746, 0x95af, 0x4731, 0x95a1,
00553   0x471c, 0x9593, 0x4708, 0x9585, 0x46f3, 0x9577, 0x46de, 0x9569,
00554   0x46c9, 0x955b, 0x46b4, 0x954d, 0x469f, 0x953f, 0x468a, 0x9532,
00555   0x4675, 0x9524, 0x4660, 0x9516, 0x464b, 0x9508, 0x4636, 0x94fa,
00556   0x4621, 0x94ed, 0x460c, 0x94df, 0x45f7, 0x94d1, 0x45e2, 0x94c3,
00557   0x45cd, 0x94b6, 0x45b8, 0x94a8, 0x45a3, 0x949a, 0x458d, 0x948d,
00558   0x4578, 0x947f, 0x4563, 0x9471, 0x454e, 0x9464, 0x4539, 0x9456,
00559   0x4524, 0x9448, 0x450f, 0x943b, 0x44fa, 0x942d, 0x44e4, 0x9420,
00560   0x44cf, 0x9412, 0x44ba, 0x9405, 0x44a5, 0x93f7, 0x4490, 0x93ea,
00561   0x447a, 0x93dc, 0x4465, 0x93cf, 0x4450, 0x93c1, 0x443b, 0x93b4,
00562   0x4425, 0x93a7, 0x4410, 0x9399, 0x43fb, 0x938c, 0x43e5, 0x937f,
00563   0x43d0, 0x9371, 0x43bb, 0x9364, 0x43a5, 0x9357, 0x4390, 0x9349,
00564   0x437b, 0x933c, 0x4365, 0x932f, 0x4350, 0x9322, 0x433b, 0x9314,
00565   0x4325, 0x9307, 0x4310, 0x92fa, 0x42fa, 0x92ed, 0x42e5, 0x92e0,
00566   0x42d0, 0x92d3, 0x42ba, 0x92c6, 0x42a5, 0x92b8, 0x428f, 0x92ab,
00567   0x427a, 0x929e, 0x4264, 0x9291, 0x424f, 0x9284, 0x4239, 0x9277,
00568   0x4224, 0x926a, 0x420e, 0x925d, 0x41f9, 0x9250, 0x41e3, 0x9243,
00569   0x41ce, 0x9236, 0x41b8, 0x922a, 0x41a2, 0x921d, 0x418d, 0x9210,
00570   0x4177, 0x9203, 0x4162, 0x91f6, 0x414c, 0x91e9, 0x4136, 0x91dc,
00571   0x4121, 0x91d0, 0x410b, 0x91c3, 0x40f6, 0x91b6, 0x40e0, 0x91a9,
00572   0x40ca, 0x919d, 0x40b5, 0x9190, 0x409f, 0x9183, 0x4089, 0x9177,
00573   0x4073, 0x916a, 0x405e, 0x915d, 0x4048, 0x9151, 0x4032, 0x9144,
00574   0x401d, 0x9137, 0x4007, 0x912b, 0x3ff1, 0x911e, 0x3fdb, 0x9112,
00575   0x3fc5, 0x9105, 0x3fb0, 0x90f9, 0x3f9a, 0x90ec, 0x3f84, 0x90e0,
00576   0x3f6e, 0x90d3, 0x3f58, 0x90c7, 0x3f43, 0x90ba, 0x3f2d, 0x90ae,
00577   0x3f17, 0x90a1, 0x3f01, 0x9095, 0x3eeb, 0x9089, 0x3ed5, 0x907c,
00578   0x3ebf, 0x9070, 0x3ea9, 0x9064, 0x3e93, 0x9057, 0x3e7d, 0x904b,
00579   0x3e68, 0x903f, 0x3e52, 0x9033, 0x3e3c, 0x9026, 0x3e26, 0x901a,
00580   0x3e10, 0x900e, 0x3dfa, 0x9002, 0x3de4, 0x8ff6, 0x3dce, 0x8fea,
00581   0x3db8, 0x8fdd, 0x3da2, 0x8fd1, 0x3d8c, 0x8fc5, 0x3d76, 0x8fb9,
00582   0x3d60, 0x8fad, 0x3d49, 0x8fa1, 0x3d33, 0x8f95, 0x3d1d, 0x8f89,
00583   0x3d07, 0x8f7d, 0x3cf1, 0x8f71, 0x3cdb, 0x8f65, 0x3cc5, 0x8f59,
00584   0x3caf, 0x8f4d, 0x3c99, 0x8f41, 0x3c83, 0x8f35, 0x3c6c, 0x8f2a,
00585   0x3c56, 0x8f1e, 0x3c40, 0x8f12, 0x3c2a, 0x8f06, 0x3c14, 0x8efa,
00586   0x3bfd, 0x8eee, 0x3be7, 0x8ee3, 0x3bd1, 0x8ed7, 0x3bbb, 0x8ecb,
00587   0x3ba5, 0x8ebf, 0x3b8e, 0x8eb4, 0x3b78, 0x8ea8, 0x3b62, 0x8e9c,
00588   0x3b4c, 0x8e91, 0x3b35, 0x8e85, 0x3b1f, 0x8e7a, 0x3b09, 0x8e6e,
00589   0x3af2, 0x8e62, 0x3adc, 0x8e57, 0x3ac6, 0x8e4b, 0x3aaf, 0x8e40,
00590   0x3a99, 0x8e34, 0x3a83, 0x8e29, 0x3a6c, 0x8e1d, 0x3a56, 0x8e12,
00591   0x3a40, 0x8e06, 0x3a29, 0x8dfb, 0x3a13, 0x8def, 0x39fd, 0x8de4,
00592   0x39e6, 0x8dd9, 0x39d0, 0x8dcd, 0x39b9, 0x8dc2, 0x39a3, 0x8db7,
00593   0x398c, 0x8dab, 0x3976, 0x8da0, 0x395f, 0x8d95, 0x3949, 0x8d8a,
00594   0x3932, 0x8d7e, 0x391c, 0x8d73, 0x3906, 0x8d68, 0x38ef, 0x8d5d,
00595   0x38d8, 0x8d51, 0x38c2, 0x8d46, 0x38ab, 0x8d3b, 0x3895, 0x8d30,
00596   0x387e, 0x8d25, 0x3868, 0x8d1a, 0x3851, 0x8d0f, 0x383b, 0x8d04,
00597   0x3824, 0x8cf9, 0x380d, 0x8cee, 0x37f7, 0x8ce3, 0x37e0, 0x8cd8,
00598   0x37ca, 0x8ccd, 0x37b3, 0x8cc2, 0x379c, 0x8cb7, 0x3786, 0x8cac,
00599   0x376f, 0x8ca1, 0x3758, 0x8c96, 0x3742, 0x8c8b, 0x372b, 0x8c81,
00600   0x3714, 0x8c76, 0x36fe, 0x8c6b, 0x36e7, 0x8c60, 0x36d0, 0x8c55,
00601   0x36ba, 0x8c4b, 0x36a3, 0x8c40, 0x368c, 0x8c35, 0x3675, 0x8c2a,
00602   0x365f, 0x8c20, 0x3648, 0x8c15, 0x3631, 0x8c0a, 0x361a, 0x8c00,
00603   0x3604, 0x8bf5, 0x35ed, 0x8beb, 0x35d6, 0x8be0, 0x35bf, 0x8bd5,
00604   0x35a8, 0x8bcb, 0x3592, 0x8bc0, 0x357b, 0x8bb6, 0x3564, 0x8bab,
00605   0x354d, 0x8ba1, 0x3536, 0x8b96, 0x351f, 0x8b8c, 0x3508, 0x8b82,
00606   0x34f2, 0x8b77, 0x34db, 0x8b6d, 0x34c4, 0x8b62, 0x34ad, 0x8b58,
00607   0x3496, 0x8b4e, 0x347f, 0x8b43, 0x3468, 0x8b39, 0x3451, 0x8b2f,
00608   0x343a, 0x8b25, 0x3423, 0x8b1a, 0x340c, 0x8b10, 0x33f5, 0x8b06,
00609   0x33de, 0x8afc, 0x33c7, 0x8af1, 0x33b0, 0x8ae7, 0x3399, 0x8add,
00610   0x3382, 0x8ad3, 0x336b, 0x8ac9, 0x3354, 0x8abf, 0x333d, 0x8ab5,
00611   0x3326, 0x8aab, 0x330f, 0x8aa1, 0x32f8, 0x8a97, 0x32e1, 0x8a8d,
00612   0x32ca, 0x8a83, 0x32b3, 0x8a79, 0x329c, 0x8a6f, 0x3285, 0x8a65,
00613   0x326e, 0x8a5b, 0x3257, 0x8a51, 0x3240, 0x8a47, 0x3228, 0x8a3d,
00614   0x3211, 0x8a34, 0x31fa, 0x8a2a, 0x31e3, 0x8a20, 0x31cc, 0x8a16,
00615   0x31b5, 0x8a0c, 0x319e, 0x8a03, 0x3186, 0x89f9, 0x316f, 0x89ef,
00616   0x3158, 0x89e5, 0x3141, 0x89dc, 0x312a, 0x89d2, 0x3112, 0x89c8,
00617   0x30fb, 0x89bf, 0x30e4, 0x89b5, 0x30cd, 0x89ac, 0x30b6, 0x89a2,
00618   0x309e, 0x8998, 0x3087, 0x898f, 0x3070, 0x8985, 0x3059, 0x897c,
00619   0x3041, 0x8972, 0x302a, 0x8969, 0x3013, 0x8960, 0x2ffb, 0x8956,
00620   0x2fe4, 0x894d, 0x2fcd, 0x8943, 0x2fb5, 0x893a, 0x2f9e, 0x8931,
00621   0x2f87, 0x8927, 0x2f6f, 0x891e, 0x2f58, 0x8915, 0x2f41, 0x890b,
00622   0x2f29, 0x8902, 0x2f12, 0x88f9, 0x2efb, 0x88f0, 0x2ee3, 0x88e6,
00623   0x2ecc, 0x88dd, 0x2eb5, 0x88d4, 0x2e9d, 0x88cb, 0x2e86, 0x88c2,
00624   0x2e6e, 0x88b9, 0x2e57, 0x88af, 0x2e3f, 0x88a6, 0x2e28, 0x889d,
00625   0x2e11, 0x8894, 0x2df9, 0x888b, 0x2de2, 0x8882, 0x2dca, 0x8879,
00626   0x2db3, 0x8870, 0x2d9b, 0x8867, 0x2d84, 0x885e, 0x2d6c, 0x8855,
00627   0x2d55, 0x884c, 0x2d3d, 0x8844, 0x2d26, 0x883b, 0x2d0e, 0x8832,
00628   0x2cf7, 0x8829, 0x2cdf, 0x8820, 0x2cc8, 0x8817, 0x2cb0, 0x880f,
00629   0x2c98, 0x8806, 0x2c81, 0x87fd, 0x2c69, 0x87f4, 0x2c52, 0x87ec,
00630   0x2c3a, 0x87e3, 0x2c23, 0x87da, 0x2c0b, 0x87d2, 0x2bf3, 0x87c9,
00631   0x2bdc, 0x87c0, 0x2bc4, 0x87b8, 0x2bad, 0x87af, 0x2b95, 0x87a7,
00632   0x2b7d, 0x879e, 0x2b66, 0x8795, 0x2b4e, 0x878d, 0x2b36, 0x8784,
00633   0x2b1f, 0x877c, 0x2b07, 0x8774, 0x2aef, 0x876b, 0x2ad8, 0x8763,
00634   0x2ac0, 0x875a, 0x2aa8, 0x8752, 0x2a91, 0x874a, 0x2a79, 0x8741,
00635   0x2a61, 0x8739, 0x2a49, 0x8731, 0x2a32, 0x8728, 0x2a1a, 0x8720,
00636   0x2a02, 0x8718, 0x29eb, 0x870f, 0x29d3, 0x8707, 0x29bb, 0x86ff,
00637   0x29a3, 0x86f7, 0x298b, 0x86ef, 0x2974, 0x86e7, 0x295c, 0x86de,
00638   0x2944, 0x86d6, 0x292c, 0x86ce, 0x2915, 0x86c6, 0x28fd, 0x86be,
00639   0x28e5, 0x86b6, 0x28cd, 0x86ae, 0x28b5, 0x86a6, 0x289d, 0x869e,
00640   0x2886, 0x8696, 0x286e, 0x868e, 0x2856, 0x8686, 0x283e, 0x867e,
00641   0x2826, 0x8676, 0x280e, 0x866e, 0x27f6, 0x8667, 0x27df, 0x865f,
00642   0x27c7, 0x8657, 0x27af, 0x864f, 0x2797, 0x8647, 0x277f, 0x8640,
00643   0x2767, 0x8638, 0x274f, 0x8630, 0x2737, 0x8628, 0x271f, 0x8621,
00644   0x2707, 0x8619, 0x26ef, 0x8611, 0x26d8, 0x860a, 0x26c0, 0x8602,
00645   0x26a8, 0x85fb, 0x2690, 0x85f3, 0x2678, 0x85eb, 0x2660, 0x85e4,
00646   0x2648, 0x85dc, 0x2630, 0x85d5, 0x2618, 0x85cd, 0x2600, 0x85c6,
00647   0x25e8, 0x85be, 0x25d0, 0x85b7, 0x25b8, 0x85b0, 0x25a0, 0x85a8,
00648   0x2588, 0x85a1, 0x2570, 0x8599, 0x2558, 0x8592, 0x2540, 0x858b,
00649   0x2528, 0x8583, 0x250f, 0x857c, 0x24f7, 0x8575, 0x24df, 0x856e,
00650   0x24c7, 0x8566, 0x24af, 0x855f, 0x2497, 0x8558, 0x247f, 0x8551,
00651   0x2467, 0x854a, 0x244f, 0x8543, 0x2437, 0x853b, 0x241f, 0x8534,
00652   0x2407, 0x852d, 0x23ee, 0x8526, 0x23d6, 0x851f, 0x23be, 0x8518,
00653   0x23a6, 0x8511, 0x238e, 0x850a, 0x2376, 0x8503, 0x235e, 0x84fc,
00654   0x2345, 0x84f5, 0x232d, 0x84ee, 0x2315, 0x84e7, 0x22fd, 0x84e1,
00655   0x22e5, 0x84da, 0x22cd, 0x84d3, 0x22b4, 0x84cc, 0x229c, 0x84c5,
00656   0x2284, 0x84be, 0x226c, 0x84b8, 0x2254, 0x84b1, 0x223b, 0x84aa,
00657   0x2223, 0x84a3, 0x220b, 0x849d, 0x21f3, 0x8496, 0x21da, 0x848f,
00658   0x21c2, 0x8489, 0x21aa, 0x8482, 0x2192, 0x847c, 0x2179, 0x8475,
00659   0x2161, 0x846e, 0x2149, 0x8468, 0x2131, 0x8461, 0x2118, 0x845b,
00660   0x2100, 0x8454, 0x20e8, 0x844e, 0x20d0, 0x8447, 0x20b7, 0x8441,
00661   0x209f, 0x843b, 0x2087, 0x8434, 0x206e, 0x842e, 0x2056, 0x8427,
00662   0x203e, 0x8421, 0x2025, 0x841b, 0x200d, 0x8415, 0x1ff5, 0x840e,
00663   0x1fdc, 0x8408, 0x1fc4, 0x8402, 0x1fac, 0x83fb, 0x1f93, 0x83f5,
00664   0x1f7b, 0x83ef, 0x1f63, 0x83e9, 0x1f4a, 0x83e3, 0x1f32, 0x83dd,
00665   0x1f19, 0x83d7, 0x1f01, 0x83d0, 0x1ee9, 0x83ca, 0x1ed0, 0x83c4,
00666   0x1eb8, 0x83be, 0x1ea0, 0x83b8, 0x1e87, 0x83b2, 0x1e6f, 0x83ac,
00667   0x1e56, 0x83a6, 0x1e3e, 0x83a0, 0x1e25, 0x839a, 0x1e0d, 0x8394,
00668   0x1df5, 0x838f, 0x1ddc, 0x8389, 0x1dc4, 0x8383, 0x1dab, 0x837d,
00669   0x1d93, 0x8377, 0x1d7a, 0x8371, 0x1d62, 0x836c, 0x1d49, 0x8366,
00670   0x1d31, 0x8360, 0x1d18, 0x835a, 0x1d00, 0x8355, 0x1ce8, 0x834f,
00671   0x1ccf, 0x8349, 0x1cb7, 0x8344, 0x1c9e, 0x833e, 0x1c86, 0x8338,
00672   0x1c6d, 0x8333, 0x1c55, 0x832d, 0x1c3c, 0x8328, 0x1c24, 0x8322,
00673   0x1c0b, 0x831d, 0x1bf2, 0x8317, 0x1bda, 0x8312, 0x1bc1, 0x830c,
00674   0x1ba9, 0x8307, 0x1b90, 0x8301, 0x1b78, 0x82fc, 0x1b5f, 0x82f7,
00675   0x1b47, 0x82f1, 0x1b2e, 0x82ec, 0x1b16, 0x82e7, 0x1afd, 0x82e1,
00676   0x1ae4, 0x82dc, 0x1acc, 0x82d7, 0x1ab3, 0x82d1, 0x1a9b, 0x82cc,
00677   0x1a82, 0x82c7, 0x1a6a, 0x82c2, 0x1a51, 0x82bd, 0x1a38, 0x82b7,
00678   0x1a20, 0x82b2, 0x1a07, 0x82ad, 0x19ef, 0x82a8, 0x19d6, 0x82a3,
00679   0x19bd, 0x829e, 0x19a5, 0x8299, 0x198c, 0x8294, 0x1973, 0x828f,
00680   0x195b, 0x828a, 0x1942, 0x8285, 0x192a, 0x8280, 0x1911, 0x827b,
00681   0x18f8, 0x8276, 0x18e0, 0x8271, 0x18c7, 0x826c, 0x18ae, 0x8268,
00682   0x1896, 0x8263, 0x187d, 0x825e, 0x1864, 0x8259, 0x184c, 0x8254,
00683   0x1833, 0x8250, 0x181a, 0x824b, 0x1802, 0x8246, 0x17e9, 0x8241,
00684   0x17d0, 0x823d, 0x17b7, 0x8238, 0x179f, 0x8233, 0x1786, 0x822f,
00685   0x176d, 0x822a, 0x1755, 0x8226, 0x173c, 0x8221, 0x1723, 0x821c,
00686   0x170a, 0x8218, 0x16f2, 0x8213, 0x16d9, 0x820f, 0x16c0, 0x820a,
00687   0x16a8, 0x8206, 0x168f, 0x8201, 0x1676, 0x81fd, 0x165d, 0x81f9,
00688   0x1645, 0x81f4, 0x162c, 0x81f0, 0x1613, 0x81ec, 0x15fa, 0x81e7,
00689   0x15e2, 0x81e3, 0x15c9, 0x81df, 0x15b0, 0x81da, 0x1597, 0x81d6,
00690   0x157f, 0x81d2, 0x1566, 0x81ce, 0x154d, 0x81c9, 0x1534, 0x81c5,
00691   0x151b, 0x81c1, 0x1503, 0x81bd, 0x14ea, 0x81b9, 0x14d1, 0x81b5,
00692   0x14b8, 0x81b1, 0x149f, 0x81ad, 0x1487, 0x81a9, 0x146e, 0x81a5,
00693   0x1455, 0x81a1, 0x143c, 0x819d, 0x1423, 0x8199, 0x140b, 0x8195,
00694   0x13f2, 0x8191, 0x13d9, 0x818d, 0x13c0, 0x8189, 0x13a7, 0x8185,
00695   0x138e, 0x8181, 0x1376, 0x817d, 0x135d, 0x817a, 0x1344, 0x8176,
00696   0x132b, 0x8172, 0x1312, 0x816e, 0x12f9, 0x816b, 0x12e0, 0x8167,
00697   0x12c8, 0x8163, 0x12af, 0x815f, 0x1296, 0x815c, 0x127d, 0x8158,
00698   0x1264, 0x8155, 0x124b, 0x8151, 0x1232, 0x814d, 0x1219, 0x814a,
00699   0x1201, 0x8146, 0x11e8, 0x8143, 0x11cf, 0x813f, 0x11b6, 0x813c,
00700   0x119d, 0x8138, 0x1184, 0x8135, 0x116b, 0x8131, 0x1152, 0x812e,
00701   0x1139, 0x812b, 0x1121, 0x8127, 0x1108, 0x8124, 0x10ef, 0x8121,
00702   0x10d6, 0x811d, 0x10bd, 0x811a, 0x10a4, 0x8117, 0x108b, 0x8113,
00703   0x1072, 0x8110, 0x1059, 0x810d, 0x1040, 0x810a, 0x1027, 0x8107,
00704   0x100e, 0x8103, 0xff5, 0x8100, 0xfdd, 0x80fd, 0xfc4, 0x80fa,
00705   0xfab, 0x80f7, 0xf92, 0x80f4, 0xf79, 0x80f1, 0xf60, 0x80ee,
00706   0xf47, 0x80eb, 0xf2e, 0x80e8, 0xf15, 0x80e5, 0xefc, 0x80e2,
00707   0xee3, 0x80df, 0xeca, 0x80dc, 0xeb1, 0x80d9, 0xe98, 0x80d6,
00708   0xe7f, 0x80d3, 0xe66, 0x80d1, 0xe4d, 0x80ce, 0xe34, 0x80cb,
00709   0xe1b, 0x80c8, 0xe02, 0x80c5, 0xde9, 0x80c3, 0xdd0, 0x80c0,
00710   0xdb7, 0x80bd, 0xd9e, 0x80bb, 0xd85, 0x80b8, 0xd6c, 0x80b5,
00711   0xd53, 0x80b3, 0xd3a, 0x80b0, 0xd21, 0x80ad, 0xd08, 0x80ab,
00712   0xcef, 0x80a8, 0xcd6, 0x80a6, 0xcbd, 0x80a3, 0xca4, 0x80a1,
00713   0xc8b, 0x809e, 0xc72, 0x809c, 0xc59, 0x8099, 0xc40, 0x8097,
00714   0xc27, 0x8095, 0xc0e, 0x8092, 0xbf5, 0x8090, 0xbdc, 0x808e,
00715   0xbc3, 0x808b, 0xbaa, 0x8089, 0xb91, 0x8087, 0xb78, 0x8084,
00716   0xb5f, 0x8082, 0xb46, 0x8080, 0xb2d, 0x807e, 0xb14, 0x807b,
00717   0xafb, 0x8079, 0xae2, 0x8077, 0xac9, 0x8075, 0xab0, 0x8073,
00718   0xa97, 0x8071, 0xa7e, 0x806f, 0xa65, 0x806d, 0xa4c, 0x806b,
00719   0xa33, 0x8069, 0xa19, 0x8067, 0xa00, 0x8065, 0x9e7, 0x8063,
00720   0x9ce, 0x8061, 0x9b5, 0x805f, 0x99c, 0x805d, 0x983, 0x805b,
00721   0x96a, 0x8059, 0x951, 0x8057, 0x938, 0x8056, 0x91f, 0x8054,
00722   0x906, 0x8052, 0x8ed, 0x8050, 0x8d4, 0x804f, 0x8bb, 0x804d,
00723   0x8a2, 0x804b, 0x888, 0x8049, 0x86f, 0x8048, 0x856, 0x8046,
00724   0x83d, 0x8044, 0x824, 0x8043, 0x80b, 0x8041, 0x7f2, 0x8040,
00725   0x7d9, 0x803e, 0x7c0, 0x803d, 0x7a7, 0x803b, 0x78e, 0x803a,
00726   0x775, 0x8038, 0x75b, 0x8037, 0x742, 0x8035, 0x729, 0x8034,
00727   0x710, 0x8032, 0x6f7, 0x8031, 0x6de, 0x8030, 0x6c5, 0x802e,
00728   0x6ac, 0x802d, 0x693, 0x802c, 0x67a, 0x802a, 0x660, 0x8029,
00729   0x647, 0x8028, 0x62e, 0x8027, 0x615, 0x8026, 0x5fc, 0x8024,
00730   0x5e3, 0x8023, 0x5ca, 0x8022, 0x5b1, 0x8021, 0x598, 0x8020,
00731   0x57f, 0x801f, 0x565, 0x801e, 0x54c, 0x801d, 0x533, 0x801c,
00732   0x51a, 0x801b, 0x501, 0x801a, 0x4e8, 0x8019, 0x4cf, 0x8018,
00733   0x4b6, 0x8017, 0x49c, 0x8016, 0x483, 0x8015, 0x46a, 0x8014,
00734   0x451, 0x8013, 0x438, 0x8012, 0x41f, 0x8012, 0x406, 0x8011,
00735   0x3ed, 0x8010, 0x3d4, 0x800f, 0x3ba, 0x800e, 0x3a1, 0x800e,
00736   0x388, 0x800d, 0x36f, 0x800c, 0x356, 0x800c, 0x33d, 0x800b,
00737   0x324, 0x800a, 0x30b, 0x800a, 0x2f1, 0x8009, 0x2d8, 0x8009,
00738   0x2bf, 0x8008, 0x2a6, 0x8008, 0x28d, 0x8007, 0x274, 0x8007,
00739   0x25b, 0x8006, 0x242, 0x8006, 0x228, 0x8005, 0x20f, 0x8005,
00740   0x1f6, 0x8004, 0x1dd, 0x8004, 0x1c4, 0x8004, 0x1ab, 0x8003,
00741   0x192, 0x8003, 0x178, 0x8003, 0x15f, 0x8002, 0x146, 0x8002,
00742   0x12d, 0x8002, 0x114, 0x8002, 0xfb, 0x8001, 0xe2, 0x8001,
00743   0xc9, 0x8001, 0xaf, 0x8001, 0x96, 0x8001, 0x7d, 0x8001,
00744   0x64, 0x8001, 0x4b, 0x8001, 0x32, 0x8001, 0x19, 0x8001,
00745 };
00746
00764 static const q15_t cos_factorsQ15_128[128] = {
00765   0x7fff, 0x7ffa, 0x7ff0, 0x7fe1, 0x7fce, 0x7fb5, 0x7f97, 0x7f75,
00766   0x7f4d, 0x7f21, 0x7ef0, 0x7eba, 0x7e7f, 0x7e3f, 0x7dfa, 0x7db0,
00767   0x7d62, 0x7d0f, 0x7cb7, 0x7c5a, 0x7bf8, 0x7b92, 0x7b26, 0x7ab6,
00768   0x7a42, 0x79c8, 0x794a, 0x78c7, 0x7840, 0x77b4, 0x7723, 0x768e,
00769   0x75f4, 0x7555, 0x74b2, 0x740b, 0x735f, 0x72af, 0x71fa, 0x7141,
00770   0x7083, 0x6fc1, 0x6efb, 0x6e30, 0x6d62, 0x6c8f, 0x6bb8, 0x6adc,
00771   0x69fd, 0x6919, 0x6832, 0x6746, 0x6657, 0x6563, 0x646c, 0x6371,
00772   0x6271, 0x616f, 0x6068, 0x5f5e, 0x5e50, 0x5d3e, 0x5c29, 0x5b10,
00773   0x59f3, 0x58d4, 0x57b0, 0x568a, 0x5560, 0x5433, 0x5302, 0x51ce,
00774   0x5097, 0x4f5e, 0x4e21, 0x4ce1, 0x4b9e, 0x4a58, 0x490f, 0x47c3,
00775   0x4675, 0x4524, 0x43d0, 0x427a, 0x4121, 0x3fc5, 0x3e68, 0x3d07,
00776   0x3ba5, 0x3a40, 0x38d8, 0x376f, 0x3604, 0x3496, 0x3326, 0x31b5,
00777   0x3041, 0x2ecc, 0x2d55, 0x2bdc, 0x2a61, 0x28e5, 0x2767, 0x25e8,
00778   0x2467, 0x22e5, 0x2161, 0x1fdc, 0x1e56, 0x1ccf, 0x1b47, 0x19bd,
00779   0x1833, 0x16a8, 0x151b, 0x138e, 0x1201, 0x1072, 0xee3, 0xd53,
00780   0xbc3, 0xa33, 0x8a2, 0x710, 0x57f, 0x3ed, 0x25b, 0xc9
00781 };
00782
00783 static const q15_t cos_factorsQ15_512[512] = {
00784   0x7fff, 0x7fff, 0x7fff, 0x7ffe, 0x7ffc, 0x7ffb, 0x7ff9, 0x7ff7,
00785   0x7ff4, 0x7ff2, 0x7fee, 0x7feb, 0x7fe7, 0x7fe3, 0x7fdf, 0x7fda,
00786   0x7fd6, 0x7fd0, 0x7fcb, 0x7fc5, 0x7fbf, 0x7fb8, 0x7fb1, 0x7faa,
00787   0x7fa3, 0x7f9b, 0x7f93, 0x7f8b, 0x7f82, 0x7f79, 0x7f70, 0x7f67,
00788   0x7f5d, 0x7f53, 0x7f48, 0x7f3d, 0x7f32, 0x7f27, 0x7f1b, 0x7f0f,
00789   0x7f03, 0x7ef6, 0x7ee9, 0x7edc, 0x7ecf, 0x7ec1, 0x7eb3, 0x7ea4,
00790   0x7e95, 0x7e86, 0x7e77, 0x7e67, 0x7e57, 0x7e47, 0x7e37, 0x7e26,
00791   0x7e14, 0x7e03, 0x7df1, 0x7ddf, 0x7dcd, 0x7dba, 0x7da7, 0x7d94,
00792   0x7d80, 0x7d6c, 0x7d58, 0x7d43, 0x7d2f, 0x7d19, 0x7d04, 0x7cee,
00793   0x7cd8, 0x7cc2, 0x7cab, 0x7c94, 0x7c7d, 0x7c66, 0x7c4e, 0x7c36,
00794   0x7c1d, 0x7c05, 0x7beb, 0x7bd2, 0x7bb9, 0x7b9f, 0x7b84, 0x7b6a,
00795   0x7b4f, 0x7b34, 0x7b19, 0x7afd, 0x7ae1, 0x7ac5, 0x7aa8, 0x7a8b,
00796   0x7a6e, 0x7a50, 0x7a33, 0x7a15, 0x79f6, 0x79d8, 0x79b9, 0x7999,
00797   0x797a, 0x795a, 0x793a, 0x7919, 0x78f9, 0x78d8, 0x78b6, 0x7895,
00798   0x7873, 0x7851, 0x782e, 0x780c, 0x77e9, 0x77c5, 0x77a2, 0x777e,
00799   0x775a, 0x7735, 0x7710, 0x76eb, 0x76c6, 0x76a0, 0x767b, 0x7654,
00800   0x762e, 0x7607, 0x75e0, 0x75b9, 0x7591, 0x7569, 0x7541, 0x7519,
00801   0x74f0, 0x74c7, 0x749e, 0x7474, 0x744a, 0x7420, 0x73f6, 0x73cb,
00802   0x73a0, 0x7375, 0x7349, 0x731d, 0x72f1, 0x72c5, 0x7298, 0x726b,
00803   0x723e, 0x7211, 0x71e3, 0x71b5, 0x7186, 0x7158, 0x7129, 0x70fa,
00804   0x70cb, 0x709b, 0x706b, 0x703b, 0x700a, 0x6fda, 0x6fa9, 0x6f77,
00805   0x6f46, 0x6f14, 0x6ee2, 0x6eaf, 0x6e7d, 0x6e4a, 0x6e17, 0x6de3,
00806   0x6db0, 0x6d7c, 0x6d48, 0x6d13, 0x6cde, 0x6ca9, 0x6c74, 0x6c3f,
00807   0x6c09, 0x6bd3, 0x6b9c, 0x6b66, 0x6b2f, 0x6af8, 0x6ac1, 0x6a89,
00808   0x6a51, 0x6a19, 0x69e1, 0x69a8, 0x696f, 0x6936, 0x68fd, 0x68c3,
00809   0x6889, 0x684f, 0x6815, 0x67da, 0x679f, 0x6764, 0x6729, 0x66ed,
00810   0x66b1, 0x6675, 0x6639, 0x65fc, 0x65bf, 0x6582, 0x6545, 0x6507,
00811   0x64c9, 0x648b, 0x644d, 0x640e, 0x63cf, 0x6390, 0x6351, 0x6311,
00812   0x62d2, 0x6292, 0x6251, 0x6211, 0x61d0, 0x618f, 0x614e, 0x610d,
00813   0x60cb, 0x6089, 0x6047, 0x6004, 0x5fc2, 0x5f7f, 0x5f3c, 0x5ef9,
00814   0x5eb5, 0x5e71, 0x5e2d, 0x5de9, 0x5da5, 0x5d60, 0x5d1b, 0x5cd6,
00815   0x5c91, 0x5c4b, 0x5c06, 0x5bc0, 0x5b79, 0x5b33, 0x5aec, 0x5aa5,
00816   0x5a5e, 0x5a17, 0x59d0, 0x5988, 0x5940, 0x58f8, 0x58af, 0x5867,
00817   0x581e, 0x57d5, 0x578c, 0x5742, 0x56f9, 0x56af, 0x5665, 0x561a,
00818   0x55d0, 0x5585, 0x553a, 0x54ef, 0x54a4, 0x5458, 0x540d, 0x53c1,
00819   0x5375, 0x5328, 0x52dc, 0x528f, 0x5242, 0x51f5, 0x51a8, 0x515a,
00820   0x510c, 0x50bf, 0x5070, 0x5022, 0x4fd4, 0x4f85, 0x4f36, 0x4ee7,
00821   0x4e98, 0x4e48, 0x4df9, 0x4da9, 0x4d59, 0x4d09, 0x4cb8, 0x4c68,
00822   0x4c17, 0x4bc6, 0x4b75, 0x4b24, 0x4ad2, 0x4a81, 0x4a2f, 0x49dd,
00823   0x498a, 0x4938, 0x48e6, 0x4893, 0x4840, 0x47ed, 0x479a, 0x4746,
00824   0x46f3, 0x469f, 0x464b, 0x45f7, 0x45a3, 0x454e, 0x44fa, 0x44a5,
00825   0x4450, 0x43fb, 0x43a5, 0x4350, 0x42fa, 0x42a5, 0x424f, 0x41f9,
00826   0x41a2, 0x414c, 0x40f6, 0x409f, 0x4048, 0x3ff1, 0x3f9a, 0x3f43,
00827   0x3eeb, 0x3e93, 0x3e3c, 0x3de4, 0x3d8c, 0x3d33, 0x3cdb, 0x3c83,
00828   0x3c2a, 0x3bd1, 0x3b78, 0x3b1f, 0x3ac6, 0x3a6c, 0x3a13, 0x39b9,
00829   0x395f, 0x3906, 0x38ab, 0x3851, 0x37f7, 0x379c, 0x3742, 0x36e7,
00830   0x368c, 0x3631, 0x35d6, 0x357b, 0x351f, 0x34c4, 0x3468, 0x340c,
00831   0x33b0, 0x3354, 0x32f8, 0x329c, 0x3240, 0x31e3, 0x3186, 0x312a,
00832   0x30cd, 0x3070, 0x3013, 0x2fb5, 0x2f58, 0x2efb, 0x2e9d, 0x2e3f,
00833   0x2de2, 0x2d84, 0x2d26, 0x2cc8, 0x2c69, 0x2c0b, 0x2bad, 0x2b4e,
00834   0x2aef, 0x2a91, 0x2a32, 0x29d3, 0x2974, 0x2915, 0x28b5, 0x2856,
00835   0x27f6, 0x2797, 0x2737, 0x26d8, 0x2678, 0x2618, 0x25b8, 0x2558,
00836   0x24f7, 0x2497, 0x2437, 0x23d6, 0x2376, 0x2315, 0x22b4, 0x2254,
00837   0x21f3, 0x2192, 0x2131, 0x20d0, 0x206e, 0x200d, 0x1fac, 0x1f4a,
00838   0x1ee9, 0x1e87, 0x1e25, 0x1dc4, 0x1d62, 0x1d00, 0x1c9e, 0x1c3c,
00839   0x1bda, 0x1b78, 0x1b16, 0x1ab3, 0x1a51, 0x19ef, 0x198c, 0x192a,
00840   0x18c7, 0x1864, 0x1802, 0x179f, 0x173c, 0x16d9, 0x1676, 0x1613,
00841   0x15b0, 0x154d, 0x14ea, 0x1487, 0x1423, 0x13c0, 0x135d, 0x12f9,
00842   0x1296, 0x1232, 0x11cf, 0x116b, 0x1108, 0x10a4, 0x1040, 0xfdd,
00843   0xf79, 0xf15, 0xeb1, 0xe4d, 0xde9, 0xd85, 0xd21, 0xcbd,
00844   0xc59, 0xbf5, 0xb91, 0xb2d, 0xac9, 0xa65, 0xa00, 0x99c,
00845   0x938, 0x8d4, 0x86f, 0x80b, 0x7a7, 0x742, 0x6de, 0x67a,
00846   0x615, 0x5b1, 0x54c, 0x4e8, 0x483, 0x41f, 0x3ba, 0x356,
00847   0x2f1, 0x28d, 0x228, 0x1c4, 0x15f, 0xfb, 0x96, 0x32,
00848 };
00849
00850 static const q15_t cos_factorsQ15_2048[2048] = {
00851   0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
00852   0x7fff, 0x7fff, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffd, 0x7ffd,
00853   0x7ffd, 0x7ffd, 0x7ffc, 0x7ffc, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffa,
00854   0x7ffa, 0x7ff9, 0x7ff9, 0x7ff8, 0x7ff8, 0x7ff7, 0x7ff7, 0x7ff6,
00855   0x7ff5, 0x7ff5, 0x7ff4, 0x7ff3, 0x7ff3, 0x7ff2, 0x7ff1, 0x7ff0,
00856   0x7ff0, 0x7fef, 0x7fee, 0x7fed, 0x7fec, 0x7fec, 0x7feb, 0x7fea,
00857   0x7fe9, 0x7fe8, 0x7fe7, 0x7fe6, 0x7fe5, 0x7fe4, 0x7fe3, 0x7fe2,
00858   0x7fe1, 0x7fe0, 0x7fdf, 0x7fdd, 0x7fdc, 0x7fdb, 0x7fda, 0x7fd9,
00859   0x7fd7, 0x7fd6, 0x7fd5, 0x7fd4, 0x7fd2, 0x7fd1, 0x7fd0, 0x7fce,
00860   0x7fcd, 0x7fcb, 0x7fca, 0x7fc9, 0x7fc7, 0x7fc6, 0x7fc4, 0x7fc3,
00861   0x7fc1, 0x7fc0, 0x7fbe, 0x7fbc, 0x7fbb, 0x7fb9, 0x7fb7, 0x7fb6,
00862   0x7fb4, 0x7fb2, 0x7fb1, 0x7faf, 0x7fad, 0x7fab, 0x7fa9, 0x7fa8,
00863   0x7fa6, 0x7fa4, 0x7fa2, 0x7fa0, 0x7f9e, 0x7f9c, 0x7f9a, 0x7f98,
00864   0x7f96, 0x7f94, 0x7f92, 0x7f90, 0x7f8e, 0x7f8c, 0x7f8a, 0x7f88,
00865   0x7f86, 0x7f83, 0x7f81, 0x7f7f, 0x7f7d, 0x7f7b, 0x7f78, 0x7f76,
00866   0x7f74, 0x7f71, 0x7f6f, 0x7f6d, 0x7f6a, 0x7f68, 0x7f65, 0x7f63,
00867   0x7f60, 0x7f5e, 0x7f5b, 0x7f59, 0x7f56, 0x7f54, 0x7f51, 0x7f4f,
00868   0x7f4c, 0x7f49, 0x7f47, 0x7f44, 0x7f41, 0x7f3f, 0x7f3c, 0x7f39,
00869   0x7f36, 0x7f34, 0x7f31, 0x7f2e, 0x7f2b, 0x7f28, 0x7f25, 0x7f23,
00870   0x7f20, 0x7f1d, 0x7f1a, 0x7f17, 0x7f14, 0x7f11, 0x7f0e, 0x7f0b,
00871   0x7f08, 0x7f04, 0x7f01, 0x7efe, 0x7efb, 0x7ef8, 0x7ef5, 0x7ef1,
00872   0x7eee, 0x7eeb, 0x7ee8, 0x7ee4, 0x7ee1, 0x7ede, 0x7eda, 0x7ed7,
00873   0x7ed4, 0x7ed0, 0x7ecd, 0x7ec9, 0x7ec6, 0x7ec3, 0x7ebf, 0x7ebb,
00874   0x7eb8, 0x7eb4, 0x7eb1, 0x7ead, 0x7eaa, 0x7ea6, 0x7ea2, 0x7e9f,
00875   0x7e9b, 0x7e97, 0x7e94, 0x7e90, 0x7e8c, 0x7e88, 0x7e84, 0x7e81,
00876   0x7e7d, 0x7e79, 0x7e75, 0x7e71, 0x7e6d, 0x7e69, 0x7e65, 0x7e61,
00877   0x7e5d, 0x7e59, 0x7e55, 0x7e51, 0x7e4d, 0x7e49, 0x7e45, 0x7e41,
00878   0x7e3d, 0x7e39, 0x7e34, 0x7e30, 0x7e2c, 0x7e28, 0x7e24, 0x7e1f,
00879   0x7e1b, 0x7e17, 0x7e12, 0x7e0e, 0x7e0a, 0x7e05, 0x7e01, 0x7dfc,
00880   0x7df8, 0x7df3, 0x7def, 0x7dea, 0x7de6, 0x7de1, 0x7ddd, 0x7dd8,
00881   0x7dd4, 0x7dcf, 0x7dca, 0x7dc6, 0x7dc1, 0x7dbc, 0x7db8, 0x7db3,
00882   0x7dae, 0x7da9, 0x7da5, 0x7da0, 0x7d9b, 0x7d96, 0x7d91, 0x7d8c,
00883   0x7d87, 0x7d82, 0x7d7e, 0x7d79, 0x7d74, 0x7d6f, 0x7d6a, 0x7d65,
00884   0x7d60, 0x7d5a, 0x7d55, 0x7d50, 0x7d4b, 0x7d46, 0x7d41, 0x7d3c,
00885   0x7d36, 0x7d31, 0x7d2c, 0x7d27, 0x7d21, 0x7d1c, 0x7d17, 0x7d11,
00886   0x7d0c, 0x7d07, 0x7d01, 0x7cfc, 0x7cf6, 0x7cf1, 0x7cec, 0x7ce6,
00887   0x7ce1, 0x7cdb, 0x7cd5, 0x7cd0, 0x7cca, 0x7cc5, 0x7cbf, 0x7cb9,
00888   0x7cb4, 0x7cae, 0x7ca8, 0x7ca3, 0x7c9d, 0x7c97, 0x7c91, 0x7c8c,
00889   0x7c86, 0x7c80, 0x7c7a, 0x7c74, 0x7c6e, 0x7c69, 0x7c63, 0x7c5d,
00890   0x7c57, 0x7c51, 0x7c4b, 0x7c45, 0x7c3f, 0x7c39, 0x7c33, 0x7c2d,
00891   0x7c26, 0x7c20, 0x7c1a, 0x7c14, 0x7c0e, 0x7c08, 0x7c01, 0x7bfb,
00892   0x7bf5, 0x7bef, 0x7be8, 0x7be2, 0x7bdc, 0x7bd5, 0x7bcf, 0x7bc9,
00893   0x7bc2, 0x7bbc, 0x7bb5, 0x7baf, 0x7ba8, 0x7ba2, 0x7b9b, 0x7b95,
00894   0x7b8e, 0x7b88, 0x7b81, 0x7b7a, 0x7b74, 0x7b6d, 0x7b67, 0x7b60,
00895   0x7b59, 0x7b52, 0x7b4c, 0x7b45, 0x7b3e, 0x7b37, 0x7b31, 0x7b2a,
00896   0x7b23, 0x7b1c, 0x7b15, 0x7b0e, 0x7b07, 0x7b00, 0x7af9, 0x7af2,
00897   0x7aeb, 0x7ae4, 0x7add, 0x7ad6, 0x7acf, 0x7ac8, 0x7ac1, 0x7aba,
00898   0x7ab3, 0x7aac, 0x7aa4, 0x7a9d, 0x7a96, 0x7a8f, 0x7a87, 0x7a80,
00899   0x7a79, 0x7a72, 0x7a6a, 0x7a63, 0x7a5c, 0x7a54, 0x7a4d, 0x7a45,
00900   0x7a3e, 0x7a36, 0x7a2f, 0x7a27, 0x7a20, 0x7a18, 0x7a11, 0x7a09,
00901   0x7a02, 0x79fa, 0x79f2, 0x79eb, 0x79e3, 0x79db, 0x79d4, 0x79cc,
00902   0x79c4, 0x79bc, 0x79b5, 0x79ad, 0x79a5, 0x799d, 0x7995, 0x798e,
00903   0x7986, 0x797e, 0x7976, 0x796e, 0x7966, 0x795e, 0x7956, 0x794e,
00904   0x7946, 0x793e, 0x7936, 0x792e, 0x7926, 0x791e, 0x7915, 0x790d,
00905   0x7905, 0x78fd, 0x78f5, 0x78ec, 0x78e4, 0x78dc, 0x78d4, 0x78cb,
00906   0x78c3, 0x78bb, 0x78b2, 0x78aa, 0x78a2, 0x7899, 0x7891, 0x7888,
00907   0x7880, 0x7877, 0x786f, 0x7866, 0x785e, 0x7855, 0x784d, 0x7844,
00908   0x783b, 0x7833, 0x782a, 0x7821, 0x7819, 0x7810, 0x7807, 0x77ff,
00909   0x77f6, 0x77ed, 0x77e4, 0x77db, 0x77d3, 0x77ca, 0x77c1, 0x77b8,
00910   0x77af, 0x77a6, 0x779d, 0x7794, 0x778b, 0x7782, 0x7779, 0x7770,
00911   0x7767, 0x775e, 0x7755, 0x774c, 0x7743, 0x773a, 0x7731, 0x7727,
00912   0x771e, 0x7715, 0x770c, 0x7703, 0x76f9, 0x76f0, 0x76e7, 0x76dd,
00913   0x76d4, 0x76cb, 0x76c1, 0x76b8, 0x76af, 0x76a5, 0x769c, 0x7692,
00914   0x7689, 0x767f, 0x7676, 0x766c, 0x7663, 0x7659, 0x7650, 0x7646,
00915   0x763c, 0x7633, 0x7629, 0x761f, 0x7616, 0x760c, 0x7602, 0x75f9,
00916   0x75ef, 0x75e5, 0x75db, 0x75d1, 0x75c8, 0x75be, 0x75b4, 0x75aa,
00917   0x75a0, 0x7596, 0x758c, 0x7582, 0x7578, 0x756e, 0x7564, 0x755a,
00918   0x7550, 0x7546, 0x753c, 0x7532, 0x7528, 0x751e, 0x7514, 0x7509,
00919   0x74ff, 0x74f5, 0x74eb, 0x74e1, 0x74d6, 0x74cc, 0x74c2, 0x74b7,
00920   0x74ad, 0x74a3, 0x7498, 0x748e, 0x7484, 0x7479, 0x746f, 0x7464,
00921   0x745a, 0x744f, 0x7445, 0x743a, 0x7430, 0x7425, 0x741b, 0x7410,
00922   0x7406, 0x73fb, 0x73f0, 0x73e6, 0x73db, 0x73d0, 0x73c6, 0x73bb,
00923   0x73b0, 0x73a5, 0x739b, 0x7390, 0x7385, 0x737a, 0x736f, 0x7364,
00924   0x7359, 0x734f, 0x7344, 0x7339, 0x732e, 0x7323, 0x7318, 0x730d,
00925   0x7302, 0x72f7, 0x72ec, 0x72e1, 0x72d5, 0x72ca, 0x72bf, 0x72b4,
00926   0x72a9, 0x729e, 0x7293, 0x7287, 0x727c, 0x7271, 0x7266, 0x725a,
00927   0x724f, 0x7244, 0x7238, 0x722d, 0x7222, 0x7216, 0x720b, 0x71ff,
00928   0x71f4, 0x71e9, 0x71dd, 0x71d2, 0x71c6, 0x71bb, 0x71af, 0x71a3,
00929   0x7198, 0x718c, 0x7181, 0x7175, 0x7169, 0x715e, 0x7152, 0x7146,
00930   0x713b, 0x712f, 0x7123, 0x7117, 0x710c, 0x7100, 0x70f4, 0x70e8,
00931   0x70dc, 0x70d1, 0x70c5, 0x70b9, 0x70ad, 0x70a1, 0x7095, 0x7089,
00932   0x707d, 0x7071, 0x7065, 0x7059, 0x704d, 0x7041, 0x7035, 0x7029,
00933   0x701d, 0x7010, 0x7004, 0x6ff8, 0x6fec, 0x6fe0, 0x6fd3, 0x6fc7,
00934   0x6fbb, 0x6faf, 0x6fa2, 0x6f96, 0x6f8a, 0x6f7d, 0x6f71, 0x6f65,
00935   0x6f58, 0x6f4c, 0x6f3f, 0x6f33, 0x6f27, 0x6f1a, 0x6f0e, 0x6f01,
00936   0x6ef5, 0x6ee8, 0x6edc, 0x6ecf, 0x6ec2, 0x6eb6, 0x6ea9, 0x6e9c,
00937   0x6e90, 0x6e83, 0x6e76, 0x6e6a, 0x6e5d, 0x6e50, 0x6e44, 0x6e37,
00938   0x6e2a, 0x6e1d, 0x6e10, 0x6e04, 0x6df7, 0x6dea, 0x6ddd, 0x6dd0,
00939   0x6dc3, 0x6db6, 0x6da9, 0x6d9c, 0x6d8f, 0x6d82, 0x6d75, 0x6d68,
00940   0x6d5b, 0x6d4e, 0x6d41, 0x6d34, 0x6d27, 0x6d1a, 0x6d0c, 0x6cff,
00941   0x6cf2, 0x6ce5, 0x6cd8, 0x6cca, 0x6cbd, 0x6cb0, 0x6ca3, 0x6c95,
00942   0x6c88, 0x6c7b, 0x6c6d, 0x6c60, 0x6c53, 0x6c45, 0x6c38, 0x6c2a,
00943   0x6c1d, 0x6c0f, 0x6c02, 0x6bf5, 0x6be7, 0x6bd9, 0x6bcc, 0x6bbe,
00944   0x6bb1, 0x6ba3, 0x6b96, 0x6b88, 0x6b7a, 0x6b6d, 0x6b5f, 0x6b51,
00945   0x6b44, 0x6b36, 0x6b28, 0x6b1a, 0x6b0d, 0x6aff, 0x6af1, 0x6ae3,
00946   0x6ad5, 0x6ac8, 0x6aba, 0x6aac, 0x6a9e, 0x6a90, 0x6a82, 0x6a74,
00947   0x6a66, 0x6a58, 0x6a4a, 0x6a3c, 0x6a2e, 0x6a20, 0x6a12, 0x6a04,
00948   0x69f6, 0x69e8, 0x69da, 0x69cb, 0x69bd, 0x69af, 0x69a1, 0x6993,
00949   0x6985, 0x6976, 0x6968, 0x695a, 0x694b, 0x693d, 0x692f, 0x6921,
00950   0x6912, 0x6904, 0x68f5, 0x68e7, 0x68d9, 0x68ca, 0x68bc, 0x68ad,
00951   0x689f, 0x6890, 0x6882, 0x6873, 0x6865, 0x6856, 0x6848, 0x6839,
00952   0x682b, 0x681c, 0x680d, 0x67ff, 0x67f0, 0x67e1, 0x67d3, 0x67c4,
00953   0x67b5, 0x67a6, 0x6798, 0x6789, 0x677a, 0x676b, 0x675d, 0x674e,
00954   0x673f, 0x6730, 0x6721, 0x6712, 0x6703, 0x66f4, 0x66e5, 0x66d6,
00955   0x66c8, 0x66b9, 0x66aa, 0x669b, 0x668b, 0x667c, 0x666d, 0x665e,
00956   0x664f, 0x6640, 0x6631, 0x6622, 0x6613, 0x6603, 0x65f4, 0x65e5,
00957   0x65d6, 0x65c7, 0x65b7, 0x65a8, 0x6599, 0x658a, 0x657a, 0x656b,
00958   0x655c, 0x654c, 0x653d, 0x652d, 0x651e, 0x650f, 0x64ff, 0x64f0,
00959   0x64e0, 0x64d1, 0x64c1, 0x64b2, 0x64a2, 0x6493, 0x6483, 0x6474,
00960   0x6464, 0x6454, 0x6445, 0x6435, 0x6426, 0x6416, 0x6406, 0x63f7,
00961   0x63e7, 0x63d7, 0x63c7, 0x63b8, 0x63a8, 0x6398, 0x6388, 0x6378,
00962   0x6369, 0x6359, 0x6349, 0x6339, 0x6329, 0x6319, 0x6309, 0x62f9,
00963   0x62ea, 0x62da, 0x62ca, 0x62ba, 0x62aa, 0x629a, 0x628a, 0x627a,
00964   0x6269, 0x6259, 0x6249, 0x6239, 0x6229, 0x6219, 0x6209, 0x61f9,
00965   0x61e8, 0x61d8, 0x61c8, 0x61b8, 0x61a8, 0x6197, 0x6187, 0x6177,
00966   0x6166, 0x6156, 0x6146, 0x6135, 0x6125, 0x6115, 0x6104, 0x60f4,
00967   0x60e4, 0x60d3, 0x60c3, 0x60b2, 0x60a2, 0x6091, 0x6081, 0x6070,
00968   0x6060, 0x604f, 0x603f, 0x602e, 0x601d, 0x600d, 0x5ffc, 0x5fec,
00969   0x5fdb, 0x5fca, 0x5fba, 0x5fa9, 0x5f98, 0x5f87, 0x5f77, 0x5f66,
00970   0x5f55, 0x5f44, 0x5f34, 0x5f23, 0x5f12, 0x5f01, 0x5ef0, 0x5edf,
00971   0x5ecf, 0x5ebe, 0x5ead, 0x5e9c, 0x5e8b, 0x5e7a, 0x5e69, 0x5e58,
00972   0x5e47, 0x5e36, 0x5e25, 0x5e14, 0x5e03, 0x5df2, 0x5de1, 0x5dd0,
00973   0x5dbf, 0x5dad, 0x5d9c, 0x5d8b, 0x5d7a, 0x5d69, 0x5d58, 0x5d46,
00974   0x5d35, 0x5d24, 0x5d13, 0x5d01, 0x5cf0, 0x5cdf, 0x5cce, 0x5cbc,
00975   0x5cab, 0x5c9a, 0x5c88, 0x5c77, 0x5c66, 0x5c54, 0x5c43, 0x5c31,
00976   0x5c20, 0x5c0e, 0x5bfd, 0x5beb, 0x5bda, 0x5bc8, 0x5bb7, 0x5ba5,
00977   0x5b94, 0x5b82, 0x5b71, 0x5b5f, 0x5b4d, 0x5b3c, 0x5b2a, 0x5b19,
00978   0x5b07, 0x5af5, 0x5ae4, 0x5ad2, 0x5ac0, 0x5aae, 0x5a9d, 0x5a8b,
00979   0x5a79, 0x5a67, 0x5a56, 0x5a44, 0x5a32, 0x5a20, 0x5a0e, 0x59fc,
00980   0x59ea, 0x59d9, 0x59c7, 0x59b5, 0x59a3, 0x5991, 0x597f, 0x596d,
00981   0x595b, 0x5949, 0x5937, 0x5925, 0x5913, 0x5901, 0x58ef, 0x58dd,
00982   0x58cb, 0x58b8, 0x58a6, 0x5894, 0x5882, 0x5870, 0x585e, 0x584b,
00983   0x5839, 0x5827, 0x5815, 0x5803, 0x57f0, 0x57de, 0x57cc, 0x57b9,
00984   0x57a7, 0x5795, 0x5783, 0x5770, 0x575e, 0x574b, 0x5739, 0x5727,
00985   0x5714, 0x5702, 0x56ef, 0x56dd, 0x56ca, 0x56b8, 0x56a5, 0x5693,
00986   0x5680, 0x566e, 0x565b, 0x5649, 0x5636, 0x5624, 0x5611, 0x55fe,
00987   0x55ec, 0x55d9, 0x55c7, 0x55b4, 0x55a1, 0x558f, 0x557c, 0x5569,
00988   0x5556, 0x5544, 0x5531, 0x551e, 0x550b, 0x54f9, 0x54e6, 0x54d3,
00989   0x54c0, 0x54ad, 0x549a, 0x5488, 0x5475, 0x5462, 0x544f, 0x543c,
00990   0x5429, 0x5416, 0x5403, 0x53f0, 0x53dd, 0x53ca, 0x53b7, 0x53a4,
00991   0x5391, 0x537e, 0x536b, 0x5358, 0x5345, 0x5332, 0x531f, 0x530c,
00992   0x52f8, 0x52e5, 0x52d2, 0x52bf, 0x52ac, 0x5299, 0x5285, 0x5272,
00993   0x525f, 0x524c, 0x5238, 0x5225, 0x5212, 0x51ff, 0x51eb, 0x51d8,
00994   0x51c5, 0x51b1, 0x519e, 0x518b, 0x5177, 0x5164, 0x5150, 0x513d,
00995   0x512a, 0x5116, 0x5103, 0x50ef, 0x50dc, 0x50c8, 0x50b5, 0x50a1,
00996   0x508e, 0x507a, 0x5067, 0x5053, 0x503f, 0x502c, 0x5018, 0x5005,
00997   0x4ff1, 0x4fdd, 0x4fca, 0x4fb6, 0x4fa2, 0x4f8f, 0x4f7b, 0x4f67,
00998   0x4f54, 0x4f40, 0x4f2c, 0x4f18, 0x4f05, 0x4ef1, 0x4edd, 0x4ec9,
00999   0x4eb6, 0x4ea2, 0x4e8e, 0x4e7a, 0x4e66, 0x4e52, 0x4e3e, 0x4e2a,
01000   0x4e17, 0x4e03, 0x4def, 0x4ddb, 0x4dc7, 0x4db3, 0x4d9f, 0x4d8b,
01001   0x4d77, 0x4d63, 0x4d4f, 0x4d3b, 0x4d27, 0x4d13, 0x4cff, 0x4ceb,
01002   0x4cd6, 0x4cc2, 0x4cae, 0x4c9a, 0x4c86, 0x4c72, 0x4c5e, 0x4c49,
01003   0x4c35, 0x4c21, 0x4c0d, 0x4bf9, 0x4be4, 0x4bd0, 0x4bbc, 0x4ba8,
01004   0x4b93, 0x4b7f, 0x4b6b, 0x4b56, 0x4b42, 0x4b2e, 0x4b19, 0x4b05,
01005   0x4af1, 0x4adc, 0x4ac8, 0x4ab4, 0x4a9f, 0x4a8b, 0x4a76, 0x4a62,
01006   0x4a4d, 0x4a39, 0x4a24, 0x4a10, 0x49fb, 0x49e7, 0x49d2, 0x49be,
01007   0x49a9, 0x4995, 0x4980, 0x496c, 0x4957, 0x4942, 0x492e, 0x4919,
01008   0x4905, 0x48f0, 0x48db, 0x48c7, 0x48b2, 0x489d, 0x4888, 0x4874,
01009   0x485f, 0x484a, 0x4836, 0x4821, 0x480c, 0x47f7, 0x47e2, 0x47ce,
01010   0x47b9, 0x47a4, 0x478f, 0x477a, 0x4765, 0x4751, 0x473c, 0x4727,
01011   0x4712, 0x46fd, 0x46e8, 0x46d3, 0x46be, 0x46a9, 0x4694, 0x467f,
01012   0x466a, 0x4655, 0x4640, 0x462b, 0x4616, 0x4601, 0x45ec, 0x45d7,
01013   0x45c2, 0x45ad, 0x4598, 0x4583, 0x456e, 0x4559, 0x4544, 0x452e,
01014   0x4519, 0x4504, 0x44ef, 0x44da, 0x44c5, 0x44af, 0x449a, 0x4485,
01015   0x4470, 0x445a, 0x4445, 0x4430, 0x441b, 0x4405, 0x43f0, 0x43db,
01016   0x43c5, 0x43b0, 0x439b, 0x4385, 0x4370, 0x435b, 0x4345, 0x4330,
01017   0x431b, 0x4305, 0x42f0, 0x42da, 0x42c5, 0x42af, 0x429a, 0x4284,
01018   0x426f, 0x425a, 0x4244, 0x422f, 0x4219, 0x4203, 0x41ee, 0x41d8,
01019   0x41c3, 0x41ad, 0x4198, 0x4182, 0x416d, 0x4157, 0x4141, 0x412c,
01020   0x4116, 0x4100, 0x40eb, 0x40d5, 0x40bf, 0x40aa, 0x4094, 0x407e,
01021   0x4069, 0x4053, 0x403d, 0x4027, 0x4012, 0x3ffc, 0x3fe6, 0x3fd0,
01022   0x3fbb, 0x3fa5, 0x3f8f, 0x3f79, 0x3f63, 0x3f4d, 0x3f38, 0x3f22,
01023   0x3f0c, 0x3ef6, 0x3ee0, 0x3eca, 0x3eb4, 0x3e9e, 0x3e88, 0x3e73,
01024   0x3e5d, 0x3e47, 0x3e31, 0x3e1b, 0x3e05, 0x3def, 0x3dd9, 0x3dc3,
01025   0x3dad, 0x3d97, 0x3d81, 0x3d6b, 0x3d55, 0x3d3e, 0x3d28, 0x3d12,
01026   0x3cfc, 0x3ce6, 0x3cd0, 0x3cba, 0x3ca4, 0x3c8e, 0x3c77, 0x3c61,
01027   0x3c4b, 0x3c35, 0x3c1f, 0x3c09, 0x3bf2, 0x3bdc, 0x3bc6, 0x3bb0,
01028   0x3b99, 0x3b83, 0x3b6d, 0x3b57, 0x3b40, 0x3b2a, 0x3b14, 0x3afe,
01029   0x3ae7, 0x3ad1, 0x3abb, 0x3aa4, 0x3a8e, 0x3a78, 0x3a61, 0x3a4b,
01030   0x3a34, 0x3a1e, 0x3a08, 0x39f1, 0x39db, 0x39c4, 0x39ae, 0x3998,
01031   0x3981, 0x396b, 0x3954, 0x393e, 0x3927, 0x3911, 0x38fa, 0x38e4,
01032   0x38cd, 0x38b7, 0x38a0, 0x388a, 0x3873, 0x385d, 0x3846, 0x382f,
01033   0x3819, 0x3802, 0x37ec, 0x37d5, 0x37be, 0x37a8, 0x3791, 0x377a,
01034   0x3764, 0x374d, 0x3736, 0x3720, 0x3709, 0x36f2, 0x36dc, 0x36c5,
01035   0x36ae, 0x3698, 0x3681, 0x366a, 0x3653, 0x363d, 0x3626, 0x360f,
01036   0x35f8, 0x35e1, 0x35cb, 0x35b4, 0x359d, 0x3586, 0x356f, 0x3558,
01037   0x3542, 0x352b, 0x3514, 0x34fd, 0x34e6, 0x34cf, 0x34b8, 0x34a1,
01038   0x348b, 0x3474, 0x345d, 0x3446, 0x342f, 0x3418, 0x3401, 0x33ea,
01039   0x33d3, 0x33bc, 0x33a5, 0x338e, 0x3377, 0x3360, 0x3349, 0x3332,
01040   0x331b, 0x3304, 0x32ed, 0x32d6, 0x32bf, 0x32a8, 0x3290, 0x3279,
01041   0x3262, 0x324b, 0x3234, 0x321d, 0x3206, 0x31ef, 0x31d8, 0x31c0,
01042   0x31a9, 0x3192, 0x317b, 0x3164, 0x314c, 0x3135, 0x311e, 0x3107,
01043   0x30f0, 0x30d8, 0x30c1, 0x30aa, 0x3093, 0x307b, 0x3064, 0x304d,
01044   0x3036, 0x301e, 0x3007, 0x2ff0, 0x2fd8, 0x2fc1, 0x2faa, 0x2f92,
01045   0x2f7b, 0x2f64, 0x2f4c, 0x2f35, 0x2f1e, 0x2f06, 0x2eef, 0x2ed8,
01046   0x2ec0, 0x2ea9, 0x2e91, 0x2e7a, 0x2e63, 0x2e4b, 0x2e34, 0x2e1c,
01047   0x2e05, 0x2ded, 0x2dd6, 0x2dbe, 0x2da7, 0x2d8f, 0x2d78, 0x2d60,
01048   0x2d49, 0x2d31, 0x2d1a, 0x2d02, 0x2ceb, 0x2cd3, 0x2cbc, 0x2ca4,
01049   0x2c8d, 0x2c75, 0x2c5e, 0x2c46, 0x2c2e, 0x2c17, 0x2bff, 0x2be8,
01050   0x2bd0, 0x2bb8, 0x2ba1, 0x2b89, 0x2b71, 0x2b5a, 0x2b42, 0x2b2b,
01051   0x2b13, 0x2afb, 0x2ae4, 0x2acc, 0x2ab4, 0x2a9c, 0x2a85, 0x2a6d,
01052   0x2a55, 0x2a3e, 0x2a26, 0x2a0e, 0x29f6, 0x29df, 0x29c7, 0x29af,
01053   0x2997, 0x2980, 0x2968, 0x2950, 0x2938, 0x2920, 0x2909, 0x28f1,
01054   0x28d9, 0x28c1, 0x28a9, 0x2892, 0x287a, 0x2862, 0x284a, 0x2832,
01055   0x281a, 0x2802, 0x27eb, 0x27d3, 0x27bb, 0x27a3, 0x278b, 0x2773,
01056   0x275b, 0x2743, 0x272b, 0x2713, 0x26fb, 0x26e4, 0x26cc, 0x26b4,
01057   0x269c, 0x2684, 0x266c, 0x2654, 0x263c, 0x2624, 0x260c, 0x25f4,
01058   0x25dc, 0x25c4, 0x25ac, 0x2594, 0x257c, 0x2564, 0x254c, 0x2534,
01059   0x251c, 0x2503, 0x24eb, 0x24d3, 0x24bb, 0x24a3, 0x248b, 0x2473,
01060   0x245b, 0x2443, 0x242b, 0x2413, 0x23fa, 0x23e2, 0x23ca, 0x23b2,
01061   0x239a, 0x2382, 0x236a, 0x2352, 0x2339, 0x2321, 0x2309, 0x22f1,
01062   0x22d9, 0x22c0, 0x22a8, 0x2290, 0x2278, 0x2260, 0x2247, 0x222f,
01063   0x2217, 0x21ff, 0x21e7, 0x21ce, 0x21b6, 0x219e, 0x2186, 0x216d,
01064   0x2155, 0x213d, 0x2125, 0x210c, 0x20f4, 0x20dc, 0x20c3, 0x20ab,
01065   0x2093, 0x207a, 0x2062, 0x204a, 0x2032, 0x2019, 0x2001, 0x1fe9,
01066   0x1fd0, 0x1fb8, 0x1f9f, 0x1f87, 0x1f6f, 0x1f56, 0x1f3e, 0x1f26,
01067   0x1f0d, 0x1ef5, 0x1edd, 0x1ec4, 0x1eac, 0x1e93, 0x1e7b, 0x1e62,
01068   0x1e4a, 0x1e32, 0x1e19, 0x1e01, 0x1de8, 0x1dd0, 0x1db7, 0x1d9f,
01069   0x1d87, 0x1d6e, 0x1d56, 0x1d3d, 0x1d25, 0x1d0c, 0x1cf4, 0x1cdb,
01070   0x1cc3, 0x1caa, 0x1c92, 0x1c79, 0x1c61, 0x1c48, 0x1c30, 0x1c17,
01071   0x1bff, 0x1be6, 0x1bce, 0x1bb5, 0x1b9d, 0x1b84, 0x1b6c, 0x1b53,
01072   0x1b3a, 0x1b22, 0x1b09, 0x1af1, 0x1ad8, 0x1ac0, 0x1aa7, 0x1a8e,
01073   0x1a76, 0x1a5d, 0x1a45, 0x1a2c, 0x1a13, 0x19fb, 0x19e2, 0x19ca,
01074   0x19b1, 0x1998, 0x1980, 0x1967, 0x194e, 0x1936, 0x191d, 0x1905,
01075   0x18ec, 0x18d3, 0x18bb, 0x18a2, 0x1889, 0x1871, 0x1858, 0x183f,
01076   0x1827, 0x180e, 0x17f5, 0x17dd, 0x17c4, 0x17ab, 0x1792, 0x177a,
01077   0x1761, 0x1748, 0x1730, 0x1717, 0x16fe, 0x16e5, 0x16cd, 0x16b4,
01078   0x169b, 0x1682, 0x166a, 0x1651, 0x1638, 0x161f, 0x1607, 0x15ee,
01079   0x15d5, 0x15bc, 0x15a4, 0x158b, 0x1572, 0x1559, 0x1541, 0x1528,
01080   0x150f, 0x14f6, 0x14dd, 0x14c5, 0x14ac, 0x1493, 0x147a, 0x1461,
01081   0x1449, 0x1430, 0x1417, 0x13fe, 0x13e5, 0x13cc, 0x13b4, 0x139b,
01082   0x1382, 0x1369, 0x1350, 0x1337, 0x131f, 0x1306, 0x12ed, 0x12d4,
01083   0x12bb, 0x12a2, 0x1289, 0x1271, 0x1258, 0x123f, 0x1226, 0x120d,
01084   0x11f4, 0x11db, 0x11c2, 0x11a9, 0x1191, 0x1178, 0x115f, 0x1146,
01085   0x112d, 0x1114, 0x10fb, 0x10e2, 0x10c9, 0x10b0, 0x1098, 0x107f,
01086   0x1066, 0x104d, 0x1034, 0x101b, 0x1002, 0xfe9, 0xfd0, 0xfb7,
01087   0xf9e, 0xf85, 0xf6c, 0xf53, 0xf3a, 0xf21, 0xf08, 0xef0,
01088   0xed7, 0xebe, 0xea5, 0xe8c, 0xe73, 0xe5a, 0xe41, 0xe28,
01089   0xe0f, 0xdf6, 0xddd, 0xdc4, 0xdab, 0xd92, 0xd79, 0xd60,
01090   0xd47, 0xd2e, 0xd15, 0xcfc, 0xce3, 0xcca, 0xcb1, 0xc98,
01091   0xc7f, 0xc66, 0xc4d, 0xc34, 0xc1b, 0xc02, 0xbe9, 0xbd0,
01092   0xbb7, 0xb9e, 0xb85, 0xb6c, 0xb53, 0xb3a, 0xb20, 0xb07,
01093   0xaee, 0xad5, 0xabc, 0xaa3, 0xa8a, 0xa71, 0xa58, 0xa3f,
01094   0xa26, 0xa0d, 0x9f4, 0x9db, 0x9c2, 0x9a9, 0x990, 0x977,
01095   0x95e, 0x944, 0x92b, 0x912, 0x8f9, 0x8e0, 0x8c7, 0x8ae,
01096   0x895, 0x87c, 0x863, 0x84a, 0x831, 0x818, 0x7fe, 0x7e5,
01097   0x7cc, 0x7b3, 0x79a, 0x781, 0x768, 0x74f, 0x736, 0x71d,
01098   0x704, 0x6ea, 0x6d1, 0x6b8, 0x69f, 0x686, 0x66d, 0x654,
01099   0x63b, 0x622, 0x609, 0x5ef, 0x5d6, 0x5bd, 0x5a4, 0x58b,
01100   0x572, 0x559, 0x540, 0x527, 0x50d, 0x4f4, 0x4db, 0x4c2,
01101   0x4a9, 0x490, 0x477, 0x45e, 0x445, 0x42b, 0x412, 0x3f9,
01102   0x3e0, 0x3c7, 0x3ae, 0x395, 0x37c, 0x362, 0x349, 0x330,
01103   0x317, 0x2fe, 0x2e5, 0x2cc, 0x2b3, 0x299, 0x280, 0x267,
01104   0x24e, 0x235, 0x21c, 0x203, 0x1ea, 0x1d0, 0x1b7, 0x19e,
01105   0x185, 0x16c, 0x153, 0x13a, 0x121, 0x107, 0xee, 0xd5,
01106   0xbc, 0xa3, 0x8a, 0x71, 0x57, 0x3e, 0x25, 0xc,
01107
01108 };
01109
01125 arm_status arm_dct4_init_q15(
01126   arm_dct4_instance_q15 * S,
01127   arm_rfft_instance_q15 * S_RFFT,
01128   arm_cfft_radix4_instance_q15 * S_CFFT,
01129   uint16_t N,
01130   uint16_t Nby2,
01131   q15_t normalize)
01132 {
01133   /*  Initialise the default arm status */
01134   arm_status status = ARM_MATH_SUCCESS;
01135
01136   /* Initializing the pointer array with the weight table base addresses of different lengths */
01137   q15_t *twiddlePtr[3] = { (q15_t *) WeightsQ15_128, (q15_t *) WeightsQ15_512,
01138     (q15_t *) WeightsQ15_2048
01139   };
01140
01141   /* Initializing the pointer array with the cos factor table base addresses of different lengths */
01142   q15_t *pCosFactor[3] =
01143     { (q15_t *) cos_factorsQ15_128, (q15_t *) cos_factorsQ15_512,
01144     (q15_t *) cos_factorsQ15_2048
01145   };
01146
01147   /* Initialize the DCT4 length */
01148   S->N = N;
01149
01150   /* Initialize the half of DCT4 length */
01151   S->Nby2 = Nby2;
01152
01153   /* Initialize the DCT4 Normalizing factor */
01154   S->normalize = normalize;
01155
01156   /* Initialize Real FFT Instance */
01157   S->pRfft = S_RFFT;
01158
01159   /* Initialize Complex FFT Instance */
01160   S->pCfft = S_CFFT;
01161
01162   switch (N)
01163   {
01164     /* Initialize the table modifier values */
01165   case 2048u:
01166     S->pTwiddle = twiddlePtr[2];
01167     S->pCosFactor = pCosFactor[2];
01168     break;
01169   case 512u:
01170     S->pTwiddle = twiddlePtr[1];
01171     S->pCosFactor = pCosFactor[1];
01172     break;
01173   case 128u:
01174     S->pTwiddle = twiddlePtr[0];
01175     S->pCosFactor = pCosFactor[0];
01176     break;
01177   default:
01178     status = ARM_MATH_ARGUMENT_ERROR;
01179   }
01180
01181   /* Initialize the RFFT/RIFFT */
01182   arm_rfft_init_q15(S->pRfft, S->pCfft, S->N, 0u, 1u);
01183
01184   /* return the status of DCT4 Init function */
01185   return (status);
01186 }
01187
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
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CMSIS DSP Software Library: arm_dct4_init_q31.c File Reference

  • Examples
  • File List
  • Globals
Functions | Variables

arm_dct4_init_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status | arm_dct4_init_q31 (arm_dct4_instance_q31 *S, arm_rfft_instance_q31 *S_RFFT, arm_cfft_radix4_instance_q31 *S_CFFT, uint16_t N, uint16_t Nby2, q31_t normalize)

Variables

static const q31_t | WeightsQ31_128 [256]
static const q31_t | WeightsQ31_512 [1024]
static const q31_t | WeightsQ31_2048 [4096]
static const q31_t | cos_factorsQ31_128 [128]
static const q31_t | cos_factorsQ31_512 [512]
static const q31_t | cos_factorsQ31_2048 [2048]
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:18 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_dct4_init_q31.c Source File

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  • File List
  • Globals

arm_dct4_init_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_dct4_init_q31.c
00009 *
00010 * Description:  Initialization function of DCT-4 & IDCT4 Q31
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030
00031 #include "arm_math.h"
00032
00042 /*
00043 * @brief  Weights Table
00044 */
00045
00066 static const q31_t WeightsQ31_128[256] = {
00067   0x7fffffff, 0x0, 0x7ffd885a, 0xfe6de2e0, 0x7ff62182, 0xfcdbd541, 0x7fe9cbc0,
00068   0xfb49e6a3,
00069   0x7fd8878e, 0xf9b82684, 0x7fc25596, 0xf826a462, 0x7fa736b4, 0xf6956fb7,
00070   0x7f872bf3, 0xf50497fb,
00071   0x7f62368f, 0xf3742ca2, 0x7f3857f6, 0xf1e43d1c, 0x7f0991c4, 0xf054d8d5,
00072   0x7ed5e5c6, 0xeec60f31,
00073   0x7e9d55fc, 0xed37ef91, 0x7e5fe493, 0xebaa894f, 0x7e1d93ea, 0xea1debbb,
00074   0x7dd6668f, 0xe8922622,
00075   0x7d8a5f40, 0xe70747c4, 0x7d3980ec, 0xe57d5fda, 0x7ce3ceb2, 0xe3f47d96,
00076   0x7c894bde, 0xe26cb01b,
00077   0x7c29fbee, 0xe0e60685, 0x7bc5e290, 0xdf608fe4, 0x7b5d039e, 0xdddc5b3b,
00078   0x7aef6323, 0xdc597781,
00079   0x7a7d055b, 0xdad7f3a2, 0x7a05eead, 0xd957de7a, 0x798a23b1, 0xd7d946d8,
00080   0x7909a92d, 0xd65c3b7b,
00081   0x78848414, 0xd4e0cb15, 0x77fab989, 0xd3670446, 0x776c4edb, 0xd1eef59e,
00082   0x76d94989, 0xd078ad9e,
00083   0x7641af3d, 0xcf043ab3, 0x75a585cf, 0xcd91ab39, 0x7504d345, 0xcc210d79,
00084   0x745f9dd1, 0xcab26fa9,
00085   0x73b5ebd1, 0xc945dfec, 0x7307c3d0, 0xc7db6c50, 0x72552c85, 0xc67322ce,
00086   0x719e2cd2, 0xc50d1149,
00087   0x70e2cbc6, 0xc3a94590, 0x7023109a, 0xc247cd5a, 0x6f5f02b2, 0xc0e8b648,
00088   0x6e96a99d, 0xbf8c0de3,
00089   0x6dca0d14, 0xbe31e19b, 0x6cf934fc, 0xbcda3ecb, 0x6c242960, 0xbb8532b0,
00090   0x6b4af279, 0xba32ca71,
00091   0x6a6d98a4, 0xb8e31319, 0x698c246c, 0xb796199b, 0x68a69e81, 0xb64beacd,
00092   0x67bd0fbd, 0xb5049368,
00093   0x66cf8120, 0xb3c0200c, 0x65ddfbd3, 0xb27e9d3c, 0x64e88926, 0xb140175b,
00094   0x63ef3290, 0xb0049ab3,
00095   0x62f201ac, 0xaecc336c, 0x61f1003f, 0xad96ed92, 0x60ec3830, 0xac64d510,
00096   0x5fe3b38d, 0xab35f5b5,
00097   0x5ed77c8a, 0xaa0a5b2e, 0x5dc79d7c, 0xa8e21106, 0x5cb420e0, 0xa7bd22ac,
00098   0x5b9d1154, 0xa69b9b68,
00099   0x5a82799a, 0xa57d8666, 0x59646498, 0xa462eeac, 0x5842dd54, 0xa34bdf20,
00100   0x571deefa, 0xa2386284,
00101   0x55f5a4d2, 0xa1288376, 0x54ca0a4b, 0xa01c4c73, 0x539b2af0, 0x9f13c7d0,
00102   0x5269126e, 0x9e0effc1,
00103   0x5133cc94, 0x9d0dfe54, 0x4ffb654d, 0x9c10cd70, 0x4ebfe8a5, 0x9b1776da,
00104   0x4d8162c4, 0x9a22042d,
00105   0x4c3fdff4, 0x99307ee0, 0x4afb6c98, 0x9842f043, 0x49b41533, 0x9759617f,
00106   0x4869e665, 0x9673db94,
00107   0x471cece7, 0x9592675c, 0x45cd358f, 0x94b50d87, 0x447acd50, 0x93dbd6a0,
00108   0x4325c135, 0x9306cb04,
00109   0x41ce1e65, 0x9235f2ec, 0x4073f21d, 0x91695663, 0x3f1749b8, 0x90a0fd4e,
00110   0x3db832a6, 0x8fdcef66,
00111   0x3c56ba70, 0x8f1d343a, 0x3af2eeb7, 0x8e61d32e, 0x398cdd32, 0x8daad37b,
00112   0x382493b0, 0x8cf83c30,
00113   0x36ba2014, 0x8c4a142f, 0x354d9057, 0x8ba0622f, 0x33def287, 0x8afb2cbb,
00114   0x326e54c7, 0x8a5a7a31,
00115   0x30fbc54d, 0x89be50c3, 0x2f875262, 0x8926b677, 0x2e110a62, 0x8893b125,
00116   0x2c98fbba, 0x88054677,
00117   0x2b1f34eb, 0x877b7bec, 0x29a3c485, 0x86f656d3, 0x2826b928, 0x8675dc4f,
00118   0x26a82186, 0x85fa1153,
00119   0x25280c5e, 0x8582faa5, 0x23a6887f, 0x85109cdd, 0x2223a4c5, 0x84a2fc62,
00120   0x209f701c, 0x843a1d70,
00121   0x1f19f97b, 0x83d60412, 0x1d934fe5, 0x8376b422, 0x1c0b826a, 0x831c314e,
00122   0x1a82a026, 0x82c67f14,
00123   0x18f8b83c, 0x8275a0c0, 0x176dd9de, 0x82299971, 0x15e21445, 0x81e26c16,
00124   0x145576b1, 0x81a01b6d,
00125   0x12c8106f, 0x8162aa04, 0x1139f0cf, 0x812a1a3a, 0xfab272b, 0x80f66e3c,
00126   0xe1bc2e4, 0x80c7a80a,
00127   0xc8bd35e, 0x809dc971, 0xafb6805, 0x8078d40d, 0x96a9049, 0x8058c94c,
00128   0x7d95b9e, 0x803daa6a,
00129   0x647d97c, 0x80277872, 0x4b6195d, 0x80163440, 0x3242abf, 0x8009de7e,
00130   0x1921d20, 0x800277a6,
00131 };
00132
00133 static const q31_t WeightsQ31_512[1024] = {
00134   0x7fffffff, 0x0, 0x7fffd886, 0xff9b781d, 0x7fff6216, 0xff36f078, 0x7ffe9cb2,
00135   0xfed2694f,
00136   0x7ffd885a, 0xfe6de2e0, 0x7ffc250f, 0xfe095d69, 0x7ffa72d1, 0xfda4d929,
00137   0x7ff871a2, 0xfd40565c,
00138   0x7ff62182, 0xfcdbd541, 0x7ff38274, 0xfc775616, 0x7ff09478, 0xfc12d91a,
00139   0x7fed5791, 0xfbae5e89,
00140   0x7fe9cbc0, 0xfb49e6a3, 0x7fe5f108, 0xfae571a4, 0x7fe1c76b, 0xfa80ffcb,
00141   0x7fdd4eec, 0xfa1c9157,
00142   0x7fd8878e, 0xf9b82684, 0x7fd37153, 0xf953bf91, 0x7fce0c3e, 0xf8ef5cbb,
00143   0x7fc85854, 0xf88afe42,
00144   0x7fc25596, 0xf826a462, 0x7fbc040a, 0xf7c24f59, 0x7fb563b3, 0xf75dff66,
00145   0x7fae7495, 0xf6f9b4c6,
00146   0x7fa736b4, 0xf6956fb7, 0x7f9faa15, 0xf6313077, 0x7f97cebd, 0xf5ccf743,
00147   0x7f8fa4b0, 0xf568c45b,
00148   0x7f872bf3, 0xf50497fb, 0x7f7e648c, 0xf4a07261, 0x7f754e80, 0xf43c53cb,
00149   0x7f6be9d4, 0xf3d83c77,
00150   0x7f62368f, 0xf3742ca2, 0x7f5834b7, 0xf310248a, 0x7f4de451, 0xf2ac246e,
00151   0x7f434563, 0xf2482c8a,
00152   0x7f3857f6, 0xf1e43d1c, 0x7f2d1c0e, 0xf1805662, 0x7f2191b4, 0xf11c789a,
00153   0x7f15b8ee, 0xf0b8a401,
00154   0x7f0991c4, 0xf054d8d5, 0x7efd1c3c, 0xeff11753, 0x7ef05860, 0xef8d5fb8,
00155   0x7ee34636, 0xef29b243,
00156   0x7ed5e5c6, 0xeec60f31, 0x7ec8371a, 0xee6276bf, 0x7eba3a39, 0xedfee92b,
00157   0x7eabef2c, 0xed9b66b2,
00158   0x7e9d55fc, 0xed37ef91, 0x7e8e6eb2, 0xecd48407, 0x7e7f3957, 0xec71244f,
00159   0x7e6fb5f4, 0xec0dd0a8,
00160   0x7e5fe493, 0xebaa894f, 0x7e4fc53e, 0xeb474e81, 0x7e3f57ff, 0xeae4207a,
00161   0x7e2e9cdf, 0xea80ff7a,
00162   0x7e1d93ea, 0xea1debbb, 0x7e0c3d29, 0xe9bae57d, 0x7dfa98a8, 0xe957ecfb,
00163   0x7de8a670, 0xe8f50273,
00164   0x7dd6668f, 0xe8922622, 0x7dc3d90d, 0xe82f5844, 0x7db0fdf8, 0xe7cc9917,
00165   0x7d9dd55a, 0xe769e8d8,
00166   0x7d8a5f40, 0xe70747c4, 0x7d769bb5, 0xe6a4b616, 0x7d628ac6, 0xe642340d,
00167   0x7d4e2c7f, 0xe5dfc1e5,
00168   0x7d3980ec, 0xe57d5fda, 0x7d24881b, 0xe51b0e2a, 0x7d0f4218, 0xe4b8cd11,
00169   0x7cf9aef0, 0xe4569ccb,
00170   0x7ce3ceb2, 0xe3f47d96, 0x7ccda169, 0xe3926fad, 0x7cb72724, 0xe330734d,
00171   0x7ca05ff1, 0xe2ce88b3,
00172   0x7c894bde, 0xe26cb01b, 0x7c71eaf9, 0xe20ae9c1, 0x7c5a3d50, 0xe1a935e2,
00173   0x7c4242f2, 0xe14794ba,
00174   0x7c29fbee, 0xe0e60685, 0x7c116853, 0xe0848b7f, 0x7bf88830, 0xe02323e5,
00175   0x7bdf5b94, 0xdfc1cff3,
00176   0x7bc5e290, 0xdf608fe4, 0x7bac1d31, 0xdeff63f4, 0x7b920b89, 0xde9e4c60,
00177   0x7b77ada8, 0xde3d4964,
00178   0x7b5d039e, 0xdddc5b3b, 0x7b420d7a, 0xdd7b8220, 0x7b26cb4f, 0xdd1abe51,
00179   0x7b0b3d2c, 0xdcba1008,
00180   0x7aef6323, 0xdc597781, 0x7ad33d45, 0xdbf8f4f8, 0x7ab6cba4, 0xdb9888a8,
00181   0x7a9a0e50, 0xdb3832cd,
00182   0x7a7d055b, 0xdad7f3a2, 0x7a5fb0d8, 0xda77cb63, 0x7a4210d8, 0xda17ba4a,
00183   0x7a24256f, 0xd9b7c094,
00184   0x7a05eead, 0xd957de7a, 0x79e76ca7, 0xd8f81439, 0x79c89f6e, 0xd898620c,
00185   0x79a98715, 0xd838c82d,
00186   0x798a23b1, 0xd7d946d8, 0x796a7554, 0xd779de47, 0x794a7c12, 0xd71a8eb5,
00187   0x792a37fe, 0xd6bb585e,
00188   0x7909a92d, 0xd65c3b7b, 0x78e8cfb2, 0xd5fd3848, 0x78c7aba2, 0xd59e4eff,
00189   0x78a63d11, 0xd53f7fda,
00190   0x78848414, 0xd4e0cb15, 0x786280bf, 0xd48230e9, 0x78403329, 0xd423b191,
00191   0x781d9b65, 0xd3c54d47,
00192   0x77fab989, 0xd3670446, 0x77d78daa, 0xd308d6c7, 0x77b417df, 0xd2aac504,
00193   0x7790583e, 0xd24ccf39,
00194   0x776c4edb, 0xd1eef59e, 0x7747fbce, 0xd191386e, 0x77235f2d, 0xd13397e2,
00195   0x76fe790e, 0xd0d61434,
00196   0x76d94989, 0xd078ad9e, 0x76b3d0b4, 0xd01b6459, 0x768e0ea6, 0xcfbe389f,
00197   0x76680376, 0xcf612aaa,
00198   0x7641af3d, 0xcf043ab3, 0x761b1211, 0xcea768f2, 0x75f42c0b, 0xce4ab5a2,
00199   0x75ccfd42, 0xcdee20fc,
00200   0x75a585cf, 0xcd91ab39, 0x757dc5ca, 0xcd355491, 0x7555bd4c, 0xccd91d3d,
00201   0x752d6c6c, 0xcc7d0578,
00202   0x7504d345, 0xcc210d79, 0x74dbf1ef, 0xcbc53579, 0x74b2c884, 0xcb697db0,
00203   0x7489571c, 0xcb0de658,
00204   0x745f9dd1, 0xcab26fa9, 0x74359cbd, 0xca5719db, 0x740b53fb, 0xc9fbe527,
00205   0x73e0c3a3, 0xc9a0d1c5,
00206   0x73b5ebd1, 0xc945dfec, 0x738acc9e, 0xc8eb0fd6, 0x735f6626, 0xc89061ba,
00207   0x7333b883, 0xc835d5d0,
00208   0x7307c3d0, 0xc7db6c50, 0x72db8828, 0xc7812572, 0x72af05a7, 0xc727016d,
00209   0x72823c67, 0xc6cd0079,
00210   0x72552c85, 0xc67322ce, 0x7227d61c, 0xc61968a2, 0x71fa3949, 0xc5bfd22e,
00211   0x71cc5626, 0xc5665fa9,
00212   0x719e2cd2, 0xc50d1149, 0x716fbd68, 0xc4b3e746, 0x71410805, 0xc45ae1d7,
00213   0x71120cc5, 0xc4020133,
00214   0x70e2cbc6, 0xc3a94590, 0x70b34525, 0xc350af26, 0x708378ff, 0xc2f83e2a,
00215   0x70536771, 0xc29ff2d4,
00216   0x7023109a, 0xc247cd5a, 0x6ff27497, 0xc1efcdf3, 0x6fc19385, 0xc197f4d4,
00217   0x6f906d84, 0xc1404233,
00218   0x6f5f02b2, 0xc0e8b648, 0x6f2d532c, 0xc0915148, 0x6efb5f12, 0xc03a1368,
00219   0x6ec92683, 0xbfe2fcdf,
00220   0x6e96a99d, 0xbf8c0de3, 0x6e63e87f, 0xbf3546a8, 0x6e30e34a, 0xbedea765,
00221   0x6dfd9a1c, 0xbe88304f,
00222   0x6dca0d14, 0xbe31e19b, 0x6d963c54, 0xbddbbb7f, 0x6d6227fa, 0xbd85be30,
00223   0x6d2dd027, 0xbd2fe9e2,
00224   0x6cf934fc, 0xbcda3ecb, 0x6cc45698, 0xbc84bd1f, 0x6c8f351c, 0xbc2f6513,
00225   0x6c59d0a9, 0xbbda36dd,
00226   0x6c242960, 0xbb8532b0, 0x6bee3f62, 0xbb3058c0, 0x6bb812d1, 0xbadba943,
00227   0x6b81a3cd, 0xba87246d,
00228   0x6b4af279, 0xba32ca71, 0x6b13fef5, 0xb9de9b83, 0x6adcc964, 0xb98a97d8,
00229   0x6aa551e9, 0xb936bfa4,
00230   0x6a6d98a4, 0xb8e31319, 0x6a359db9, 0xb88f926d, 0x69fd614a, 0xb83c3dd1,
00231   0x69c4e37a, 0xb7e9157a,
00232   0x698c246c, 0xb796199b, 0x69532442, 0xb7434a67, 0x6919e320, 0xb6f0a812,
00233   0x68e06129, 0xb69e32cd,
00234   0x68a69e81, 0xb64beacd, 0x686c9b4b, 0xb5f9d043, 0x683257ab, 0xb5a7e362,
00235   0x67f7d3c5, 0xb556245e,
00236   0x67bd0fbd, 0xb5049368, 0x67820bb7, 0xb4b330b3, 0x6746c7d8, 0xb461fc70,
00237   0x670b4444, 0xb410f6d3,
00238   0x66cf8120, 0xb3c0200c, 0x66937e91, 0xb36f784f, 0x66573cbb, 0xb31effcc,
00239   0x661abbc5, 0xb2ceb6b5,
00240   0x65ddfbd3, 0xb27e9d3c, 0x65a0fd0b, 0xb22eb392, 0x6563bf92, 0xb1def9e9,
00241   0x6526438f, 0xb18f7071,
00242   0x64e88926, 0xb140175b, 0x64aa907f, 0xb0f0eeda, 0x646c59bf, 0xb0a1f71d,
00243   0x642de50d, 0xb0533055,
00244   0x63ef3290, 0xb0049ab3, 0x63b0426d, 0xafb63667, 0x637114cc, 0xaf6803a2,
00245   0x6331a9d4, 0xaf1a0293,
00246   0x62f201ac, 0xaecc336c, 0x62b21c7b, 0xae7e965b, 0x6271fa69, 0xae312b92,
00247   0x62319b9d, 0xade3f33e,
00248   0x61f1003f, 0xad96ed92, 0x61b02876, 0xad4a1aba, 0x616f146c, 0xacfd7ae8,
00249   0x612dc447, 0xacb10e4b,
00250   0x60ec3830, 0xac64d510, 0x60aa7050, 0xac18cf69, 0x60686ccf, 0xabccfd83,
00251   0x60262dd6, 0xab815f8d,
00252   0x5fe3b38d, 0xab35f5b5, 0x5fa0fe1f, 0xaaeac02c, 0x5f5e0db3, 0xaa9fbf1e,
00253   0x5f1ae274, 0xaa54f2ba,
00254   0x5ed77c8a, 0xaa0a5b2e, 0x5e93dc1f, 0xa9bff8a8, 0x5e50015d, 0xa975cb57,
00255   0x5e0bec6e, 0xa92bd367,
00256   0x5dc79d7c, 0xa8e21106, 0x5d8314b1, 0xa8988463, 0x5d3e5237, 0xa84f2daa,
00257   0x5cf95638, 0xa8060d08,
00258   0x5cb420e0, 0xa7bd22ac, 0x5c6eb258, 0xa7746ec0, 0x5c290acc, 0xa72bf174,
00259   0x5be32a67, 0xa6e3aaf2,
00260   0x5b9d1154, 0xa69b9b68, 0x5b56bfbd, 0xa653c303, 0x5b1035cf, 0xa60c21ee,
00261   0x5ac973b5, 0xa5c4b855,
00262   0x5a82799a, 0xa57d8666, 0x5a3b47ab, 0xa5368c4b, 0x59f3de12, 0xa4efca31,
00263   0x59ac3cfd, 0xa4a94043,
00264   0x59646498, 0xa462eeac, 0x591c550e, 0xa41cd599, 0x58d40e8c, 0xa3d6f534,
00265   0x588b9140, 0xa3914da8,
00266   0x5842dd54, 0xa34bdf20, 0x57f9f2f8, 0xa306a9c8, 0x57b0d256, 0xa2c1adc9,
00267   0x57677b9d, 0xa27ceb4f,
00268   0x571deefa, 0xa2386284, 0x56d42c99, 0xa1f41392, 0x568a34a9, 0xa1affea3,
00269   0x56400758, 0xa16c23e1,
00270   0x55f5a4d2, 0xa1288376, 0x55ab0d46, 0xa0e51d8c, 0x556040e2, 0xa0a1f24d,
00271   0x55153fd4, 0xa05f01e1,
00272   0x54ca0a4b, 0xa01c4c73, 0x547ea073, 0x9fd9d22a, 0x5433027d, 0x9f979331,
00273   0x53e73097, 0x9f558fb0,
00274   0x539b2af0, 0x9f13c7d0, 0x534ef1b5, 0x9ed23bb9, 0x53028518, 0x9e90eb94,
00275   0x52b5e546, 0x9e4fd78a,
00276   0x5269126e, 0x9e0effc1, 0x521c0cc2, 0x9dce6463, 0x51ced46e, 0x9d8e0597,
00277   0x518169a5, 0x9d4de385,
00278   0x5133cc94, 0x9d0dfe54, 0x50e5fd6d, 0x9cce562c, 0x5097fc5e, 0x9c8eeb34,
00279   0x5049c999, 0x9c4fbd93,
00280   0x4ffb654d, 0x9c10cd70, 0x4faccfab, 0x9bd21af3, 0x4f5e08e3, 0x9b93a641,
00281   0x4f0f1126, 0x9b556f81,
00282   0x4ebfe8a5, 0x9b1776da, 0x4e708f8f, 0x9ad9bc71, 0x4e210617, 0x9a9c406e,
00283   0x4dd14c6e, 0x9a5f02f5,
00284   0x4d8162c4, 0x9a22042d, 0x4d31494b, 0x99e5443b, 0x4ce10034, 0x99a8c345,
00285   0x4c9087b1, 0x996c816f,
00286   0x4c3fdff4, 0x99307ee0, 0x4bef092d, 0x98f4bbbc, 0x4b9e0390, 0x98b93828,
00287   0x4b4ccf4d, 0x987df449,
00288   0x4afb6c98, 0x9842f043, 0x4aa9dba2, 0x98082c3b, 0x4a581c9e, 0x97cda855,
00289   0x4a062fbd, 0x979364b5,
00290   0x49b41533, 0x9759617f, 0x4961cd33, 0x971f9ed7, 0x490f57ee, 0x96e61ce0,
00291   0x48bcb599, 0x96acdbbe,
00292   0x4869e665, 0x9673db94, 0x4816ea86, 0x963b1c86, 0x47c3c22f, 0x96029eb6,
00293   0x47706d93, 0x95ca6247,
00294   0x471cece7, 0x9592675c, 0x46c9405c, 0x955aae17, 0x46756828, 0x9523369c,
00295   0x4621647d, 0x94ec010b,
00296   0x45cd358f, 0x94b50d87, 0x4578db93, 0x947e5c33, 0x452456bd, 0x9447ed2f,
00297   0x44cfa740, 0x9411c09e,
00298   0x447acd50, 0x93dbd6a0, 0x4425c923, 0x93a62f57, 0x43d09aed, 0x9370cae4,
00299   0x437b42e1, 0x933ba968,
00300   0x4325c135, 0x9306cb04, 0x42d0161e, 0x92d22fd9, 0x427a41d0, 0x929dd806,
00301   0x42244481, 0x9269c3ac,
00302   0x41ce1e65, 0x9235f2ec, 0x4177cfb1, 0x920265e4, 0x4121589b, 0x91cf1cb6,
00303   0x40cab958, 0x919c1781,
00304   0x4073f21d, 0x91695663, 0x401d0321, 0x9136d97d, 0x3fc5ec98, 0x9104a0ee,
00305   0x3f6eaeb8, 0x90d2acd4,
00306   0x3f1749b8, 0x90a0fd4e, 0x3ebfbdcd, 0x906f927c, 0x3e680b2c, 0x903e6c7b,
00307   0x3e10320d, 0x900d8b69,
00308   0x3db832a6, 0x8fdcef66, 0x3d600d2c, 0x8fac988f, 0x3d07c1d6, 0x8f7c8701,
00309   0x3caf50da, 0x8f4cbadb,
00310   0x3c56ba70, 0x8f1d343a, 0x3bfdfecd, 0x8eedf33b, 0x3ba51e29, 0x8ebef7fb,
00311   0x3b4c18ba, 0x8e904298,
00312   0x3af2eeb7, 0x8e61d32e, 0x3a99a057, 0x8e33a9da, 0x3a402dd2, 0x8e05c6b7,
00313   0x39e6975e, 0x8dd829e4,
00314   0x398cdd32, 0x8daad37b, 0x3932ff87, 0x8d7dc399, 0x38d8fe93, 0x8d50fa59,
00315   0x387eda8e, 0x8d2477d8,
00316   0x382493b0, 0x8cf83c30, 0x37ca2a30, 0x8ccc477d, 0x376f9e46, 0x8ca099da,
00317   0x3714f02a, 0x8c753362,
00318   0x36ba2014, 0x8c4a142f, 0x365f2e3b, 0x8c1f3c5d, 0x36041ad9, 0x8bf4ac05,
00319   0x35a8e625, 0x8bca6343,
00320   0x354d9057, 0x8ba0622f, 0x34f219a8, 0x8b76a8e4, 0x34968250, 0x8b4d377c,
00321   0x343aca87, 0x8b240e11,
00322   0x33def287, 0x8afb2cbb, 0x3382fa88, 0x8ad29394, 0x3326e2c3, 0x8aaa42b4,
00323   0x32caab6f, 0x8a823a36,
00324   0x326e54c7, 0x8a5a7a31, 0x3211df04, 0x8a3302be, 0x31b54a5e, 0x8a0bd3f5,
00325   0x3158970e, 0x89e4edef,
00326   0x30fbc54d, 0x89be50c3, 0x309ed556, 0x8997fc8a, 0x3041c761, 0x8971f15a,
00327   0x2fe49ba7, 0x894c2f4c,
00328   0x2f875262, 0x8926b677, 0x2f29ebcc, 0x890186f2, 0x2ecc681e, 0x88dca0d3,
00329   0x2e6ec792, 0x88b80432,
00330   0x2e110a62, 0x8893b125, 0x2db330c7, 0x886fa7c2, 0x2d553afc, 0x884be821,
00331   0x2cf72939, 0x88287256,
00332   0x2c98fbba, 0x88054677, 0x2c3ab2b9, 0x87e2649b, 0x2bdc4e6f, 0x87bfccd7,
00333   0x2b7dcf17, 0x879d7f41,
00334   0x2b1f34eb, 0x877b7bec, 0x2ac08026, 0x8759c2ef, 0x2a61b101, 0x8738545e,
00335   0x2a02c7b8, 0x8717304e,
00336   0x29a3c485, 0x86f656d3, 0x2944a7a2, 0x86d5c802, 0x28e5714b, 0x86b583ee,
00337   0x288621b9, 0x86958aac,
00338   0x2826b928, 0x8675dc4f, 0x27c737d3, 0x865678eb, 0x27679df4, 0x86376092,
00339   0x2707ebc7, 0x86189359,
00340   0x26a82186, 0x85fa1153, 0x26483f6c, 0x85dbda91, 0x25e845b6, 0x85bdef28,
00341   0x2588349d, 0x85a04f28,
00342   0x25280c5e, 0x8582faa5, 0x24c7cd33, 0x8565f1b0, 0x24677758, 0x8549345c,
00343   0x24070b08, 0x852cc2bb,
00344   0x23a6887f, 0x85109cdd, 0x2345eff8, 0x84f4c2d4, 0x22e541af, 0x84d934b1,
00345   0x22847de0, 0x84bdf286,
00346   0x2223a4c5, 0x84a2fc62, 0x21c2b69c, 0x84885258, 0x2161b3a0, 0x846df477,
00347   0x21009c0c, 0x8453e2cf,
00348   0x209f701c, 0x843a1d70, 0x203e300d, 0x8420a46c, 0x1fdcdc1b, 0x840777d0,
00349   0x1f7b7481, 0x83ee97ad,
00350   0x1f19f97b, 0x83d60412, 0x1eb86b46, 0x83bdbd0e, 0x1e56ca1e, 0x83a5c2b0,
00351   0x1df5163f, 0x838e1507,
00352   0x1d934fe5, 0x8376b422, 0x1d31774d, 0x835fa00f, 0x1ccf8cb3, 0x8348d8dc,
00353   0x1c6d9053, 0x83325e97,
00354   0x1c0b826a, 0x831c314e, 0x1ba96335, 0x83065110, 0x1b4732ef, 0x82f0bde8,
00355   0x1ae4f1d6, 0x82db77e5,
00356   0x1a82a026, 0x82c67f14, 0x1a203e1b, 0x82b1d381, 0x19bdcbf3, 0x829d753a,
00357   0x195b49ea, 0x8289644b,
00358   0x18f8b83c, 0x8275a0c0, 0x18961728, 0x82622aa6, 0x183366e9, 0x824f0208,
00359   0x17d0a7bc, 0x823c26f3,
00360   0x176dd9de, 0x82299971, 0x170afd8d, 0x82175990, 0x16a81305, 0x82056758,
00361   0x16451a83, 0x81f3c2d7,
00362   0x15e21445, 0x81e26c16, 0x157f0086, 0x81d16321, 0x151bdf86, 0x81c0a801,
00363   0x14b8b17f, 0x81b03ac2,
00364   0x145576b1, 0x81a01b6d, 0x13f22f58, 0x81904a0c, 0x138edbb1, 0x8180c6a9,
00365   0x132b7bf9, 0x8171914e,
00366   0x12c8106f, 0x8162aa04, 0x1264994e, 0x815410d4, 0x120116d5, 0x8145c5c7,
00367   0x119d8941, 0x8137c8e6,
00368   0x1139f0cf, 0x812a1a3a, 0x10d64dbd, 0x811cb9ca, 0x1072a048, 0x810fa7a0,
00369   0x100ee8ad, 0x8102e3c4,
00370   0xfab272b, 0x80f66e3c, 0xf475bff, 0x80ea4712, 0xee38766, 0x80de6e4c,
00371   0xe7fa99e, 0x80d2e3f2,
00372   0xe1bc2e4, 0x80c7a80a, 0xdb7d376, 0x80bcba9d, 0xd53db92, 0x80b21baf,
00373   0xcefdb76, 0x80a7cb49,
00374   0xc8bd35e, 0x809dc971, 0xc27c389, 0x8094162c, 0xbc3ac35, 0x808ab180,
00375   0xb5f8d9f, 0x80819b74,
00376   0xafb6805, 0x8078d40d, 0xa973ba5, 0x80705b50, 0xa3308bd, 0x80683143,
00377   0x9cecf89, 0x806055eb,
00378   0x96a9049, 0x8058c94c, 0x9064b3a, 0x80518b6b, 0x8a2009a, 0x804a9c4d,
00379   0x83db0a7, 0x8043fbf6,
00380   0x7d95b9e, 0x803daa6a, 0x77501be, 0x8037a7ac, 0x710a345, 0x8031f3c2,
00381   0x6ac406f, 0x802c8ead,
00382   0x647d97c, 0x80277872, 0x5e36ea9, 0x8022b114, 0x57f0035, 0x801e3895,
00383   0x51a8e5c, 0x801a0ef8,
00384   0x4b6195d, 0x80163440, 0x451a177, 0x8012a86f, 0x3ed26e6, 0x800f6b88,
00385   0x388a9ea, 0x800c7d8c,
00386   0x3242abf, 0x8009de7e, 0x2bfa9a4, 0x80078e5e, 0x25b26d7, 0x80058d2f,
00387   0x1f6a297, 0x8003daf1,
00388   0x1921d20, 0x800277a6, 0x12d96b1, 0x8001634e, 0xc90f88, 0x80009dea,
00389   0x6487e3, 0x8000277a,
00390 };
00391
00392 static const q31_t WeightsQ31_2048[4096] = {
00393   0x7fffffff, 0x0, 0x7ffffd88, 0xffe6de05, 0x7ffff621, 0xffcdbc0b, 0x7fffe9cb,
00394   0xffb49a12,
00395   0x7fffd886, 0xff9b781d, 0x7fffc251, 0xff82562c, 0x7fffa72c, 0xff69343f,
00396   0x7fff8719, 0xff501258,
00397   0x7fff6216, 0xff36f078, 0x7fff3824, 0xff1dcea0, 0x7fff0943, 0xff04acd0,
00398   0x7ffed572, 0xfeeb8b0a,
00399   0x7ffe9cb2, 0xfed2694f, 0x7ffe5f03, 0xfeb947a0, 0x7ffe1c65, 0xfea025fd,
00400   0x7ffdd4d7, 0xfe870467,
00401   0x7ffd885a, 0xfe6de2e0, 0x7ffd36ee, 0xfe54c169, 0x7ffce093, 0xfe3ba002,
00402   0x7ffc8549, 0xfe227eac,
00403   0x7ffc250f, 0xfe095d69, 0x7ffbbfe6, 0xfdf03c3a, 0x7ffb55ce, 0xfdd71b1e,
00404   0x7ffae6c7, 0xfdbdfa18,
00405   0x7ffa72d1, 0xfda4d929, 0x7ff9f9ec, 0xfd8bb850, 0x7ff97c18, 0xfd729790,
00406   0x7ff8f954, 0xfd5976e9,
00407   0x7ff871a2, 0xfd40565c, 0x7ff7e500, 0xfd2735ea, 0x7ff75370, 0xfd0e1594,
00408   0x7ff6bcf0, 0xfcf4f55c,
00409   0x7ff62182, 0xfcdbd541, 0x7ff58125, 0xfcc2b545, 0x7ff4dbd9, 0xfca9956a,
00410   0x7ff4319d, 0xfc9075af,
00411   0x7ff38274, 0xfc775616, 0x7ff2ce5b, 0xfc5e36a0, 0x7ff21553, 0xfc45174e,
00412   0x7ff1575d, 0xfc2bf821,
00413   0x7ff09478, 0xfc12d91a, 0x7fefcca4, 0xfbf9ba39, 0x7feeffe1, 0xfbe09b80,
00414   0x7fee2e30, 0xfbc77cf0,
00415   0x7fed5791, 0xfbae5e89, 0x7fec7c02, 0xfb95404d, 0x7feb9b85, 0xfb7c223d,
00416   0x7feab61a, 0xfb630459,
00417   0x7fe9cbc0, 0xfb49e6a3, 0x7fe8dc78, 0xfb30c91b, 0x7fe7e841, 0xfb17abc2,
00418   0x7fe6ef1c, 0xfafe8e9b,
00419   0x7fe5f108, 0xfae571a4, 0x7fe4ee06, 0xfacc54e0, 0x7fe3e616, 0xfab3384f,
00420   0x7fe2d938, 0xfa9a1bf3,
00421   0x7fe1c76b, 0xfa80ffcb, 0x7fe0b0b1, 0xfa67e3da, 0x7fdf9508, 0xfa4ec821,
00422   0x7fde7471, 0xfa35ac9f,
00423   0x7fdd4eec, 0xfa1c9157, 0x7fdc247a, 0xfa037648, 0x7fdaf519, 0xf9ea5b75,
00424   0x7fd9c0ca, 0xf9d140de,
00425   0x7fd8878e, 0xf9b82684, 0x7fd74964, 0xf99f0c68, 0x7fd6064c, 0xf985f28a,
00426   0x7fd4be46, 0xf96cd8ed,
00427   0x7fd37153, 0xf953bf91, 0x7fd21f72, 0xf93aa676, 0x7fd0c8a3, 0xf9218d9e,
00428   0x7fcf6ce8, 0xf908750a,
00429   0x7fce0c3e, 0xf8ef5cbb, 0x7fcca6a7, 0xf8d644b2, 0x7fcb3c23, 0xf8bd2cef,
00430   0x7fc9ccb2, 0xf8a41574,
00431   0x7fc85854, 0xf88afe42, 0x7fc6df08, 0xf871e759, 0x7fc560cf, 0xf858d0bb,
00432   0x7fc3dda9, 0xf83fba68,
00433   0x7fc25596, 0xf826a462, 0x7fc0c896, 0xf80d8ea9, 0x7fbf36aa, 0xf7f4793e,
00434   0x7fbd9fd0, 0xf7db6423,
00435   0x7fbc040a, 0xf7c24f59, 0x7fba6357, 0xf7a93ae0, 0x7fb8bdb8, 0xf79026b9,
00436   0x7fb7132b, 0xf77712e5,
00437   0x7fb563b3, 0xf75dff66, 0x7fb3af4e, 0xf744ec3b, 0x7fb1f5fc, 0xf72bd967,
00438   0x7fb037bf, 0xf712c6ea,
00439   0x7fae7495, 0xf6f9b4c6, 0x7facac7f, 0xf6e0a2fa, 0x7faadf7c, 0xf6c79188,
00440   0x7fa90d8e, 0xf6ae8071,
00441   0x7fa736b4, 0xf6956fb7, 0x7fa55aee, 0xf67c5f59, 0x7fa37a3c, 0xf6634f59,
00442   0x7fa1949e, 0xf64a3fb8,
00443   0x7f9faa15, 0xf6313077, 0x7f9dbaa0, 0xf6182196, 0x7f9bc640, 0xf5ff1318,
00444   0x7f99ccf4, 0xf5e604fc,
00445   0x7f97cebd, 0xf5ccf743, 0x7f95cb9a, 0xf5b3e9f0, 0x7f93c38c, 0xf59add02,
00446   0x7f91b694, 0xf581d07b,
00447   0x7f8fa4b0, 0xf568c45b, 0x7f8d8de1, 0xf54fb8a4, 0x7f8b7227, 0xf536ad56,
00448   0x7f895182, 0xf51da273,
00449   0x7f872bf3, 0xf50497fb, 0x7f850179, 0xf4eb8def, 0x7f82d214, 0xf4d28451,
00450   0x7f809dc5, 0xf4b97b21,
00451   0x7f7e648c, 0xf4a07261, 0x7f7c2668, 0xf4876a10, 0x7f79e35a, 0xf46e6231,
00452   0x7f779b62, 0xf4555ac5,
00453   0x7f754e80, 0xf43c53cb, 0x7f72fcb4, 0xf4234d45, 0x7f70a5fe, 0xf40a4735,
00454   0x7f6e4a5e, 0xf3f1419a,
00455   0x7f6be9d4, 0xf3d83c77, 0x7f698461, 0xf3bf37cb, 0x7f671a05, 0xf3a63398,
00456   0x7f64aabf, 0xf38d2fe0,
00457   0x7f62368f, 0xf3742ca2, 0x7f5fbd77, 0xf35b29e0, 0x7f5d3f75, 0xf342279b,
00458   0x7f5abc8a, 0xf32925d3,
00459   0x7f5834b7, 0xf310248a, 0x7f55a7fa, 0xf2f723c1, 0x7f531655, 0xf2de2379,
00460   0x7f507fc7, 0xf2c523b2,
00461   0x7f4de451, 0xf2ac246e, 0x7f4b43f2, 0xf29325ad, 0x7f489eaa, 0xf27a2771,
00462   0x7f45f47b, 0xf26129ba,
00463   0x7f434563, 0xf2482c8a, 0x7f409164, 0xf22f2fe1, 0x7f3dd87c, 0xf21633c0,
00464   0x7f3b1aad, 0xf1fd3829,
00465   0x7f3857f6, 0xf1e43d1c, 0x7f359057, 0xf1cb429a, 0x7f32c3d1, 0xf1b248a5,
00466   0x7f2ff263, 0xf1994f3d,
00467   0x7f2d1c0e, 0xf1805662, 0x7f2a40d2, 0xf1675e17, 0x7f2760af, 0xf14e665c,
00468   0x7f247ba5, 0xf1356f32,
00469   0x7f2191b4, 0xf11c789a, 0x7f1ea2dc, 0xf1038295, 0x7f1baf1e, 0xf0ea8d24,
00470   0x7f18b679, 0xf0d19848,
00471   0x7f15b8ee, 0xf0b8a401, 0x7f12b67c, 0xf09fb051, 0x7f0faf25, 0xf086bd39,
00472   0x7f0ca2e7, 0xf06dcaba,
00473   0x7f0991c4, 0xf054d8d5, 0x7f067bba, 0xf03be78a, 0x7f0360cb, 0xf022f6da,
00474   0x7f0040f6, 0xf00a06c8,
00475   0x7efd1c3c, 0xeff11753, 0x7ef9f29d, 0xefd8287c, 0x7ef6c418, 0xefbf3a45,
00476   0x7ef390ae, 0xefa64cae,
00477   0x7ef05860, 0xef8d5fb8, 0x7eed1b2c, 0xef747365, 0x7ee9d914, 0xef5b87b5,
00478   0x7ee69217, 0xef429caa,
00479   0x7ee34636, 0xef29b243, 0x7edff570, 0xef10c883, 0x7edc9fc6, 0xeef7df6a,
00480   0x7ed94538, 0xeedef6f9,
00481   0x7ed5e5c6, 0xeec60f31, 0x7ed28171, 0xeead2813, 0x7ecf1837, 0xee9441a0,
00482   0x7ecbaa1a, 0xee7b5bd9,
00483   0x7ec8371a, 0xee6276bf, 0x7ec4bf36, 0xee499253, 0x7ec14270, 0xee30ae96,
00484   0x7ebdc0c6, 0xee17cb88,
00485   0x7eba3a39, 0xedfee92b, 0x7eb6aeca, 0xede60780, 0x7eb31e78, 0xedcd2687,
00486   0x7eaf8943, 0xedb44642,
00487   0x7eabef2c, 0xed9b66b2, 0x7ea85033, 0xed8287d7, 0x7ea4ac58, 0xed69a9b3,
00488   0x7ea1039b, 0xed50cc46,
00489   0x7e9d55fc, 0xed37ef91, 0x7e99a37c, 0xed1f1396, 0x7e95ec1a, 0xed063856,
00490   0x7e922fd6, 0xeced5dd0,
00491   0x7e8e6eb2, 0xecd48407, 0x7e8aa8ac, 0xecbbaafb, 0x7e86ddc6, 0xeca2d2ad,
00492   0x7e830dff, 0xec89fb1e,
00493   0x7e7f3957, 0xec71244f, 0x7e7b5fce, 0xec584e41, 0x7e778166, 0xec3f78f6,
00494   0x7e739e1d, 0xec26a46d,
00495   0x7e6fb5f4, 0xec0dd0a8, 0x7e6bc8eb, 0xebf4fda8, 0x7e67d703, 0xebdc2b6e,
00496   0x7e63e03b, 0xebc359fb,
00497   0x7e5fe493, 0xebaa894f, 0x7e5be40c, 0xeb91b96c, 0x7e57dea7, 0xeb78ea52,
00498   0x7e53d462, 0xeb601c04,
00499   0x7e4fc53e, 0xeb474e81, 0x7e4bb13c, 0xeb2e81ca, 0x7e47985b, 0xeb15b5e1,
00500   0x7e437a9c, 0xeafceac6,
00501   0x7e3f57ff, 0xeae4207a, 0x7e3b3083, 0xeacb56ff, 0x7e37042a, 0xeab28e56,
00502   0x7e32d2f4, 0xea99c67e,
00503   0x7e2e9cdf, 0xea80ff7a, 0x7e2a61ed, 0xea683949, 0x7e26221f, 0xea4f73ee,
00504   0x7e21dd73, 0xea36af69,
00505   0x7e1d93ea, 0xea1debbb, 0x7e194584, 0xea0528e5, 0x7e14f242, 0xe9ec66e8,
00506   0x7e109a24, 0xe9d3a5c5,
00507   0x7e0c3d29, 0xe9bae57d, 0x7e07db52, 0xe9a22610, 0x7e0374a0, 0xe9896781,
00508   0x7dff0911, 0xe970a9ce,
00509   0x7dfa98a8, 0xe957ecfb, 0x7df62362, 0xe93f3107, 0x7df1a942, 0xe92675f4,
00510   0x7ded2a47, 0xe90dbbc2,
00511   0x7de8a670, 0xe8f50273, 0x7de41dc0, 0xe8dc4a07, 0x7ddf9034, 0xe8c39280,
00512   0x7ddafdce, 0xe8aadbde,
00513   0x7dd6668f, 0xe8922622, 0x7dd1ca75, 0xe879714d, 0x7dcd2981, 0xe860bd61,
00514   0x7dc883b4, 0xe8480a5d,
00515   0x7dc3d90d, 0xe82f5844, 0x7dbf298d, 0xe816a716, 0x7dba7534, 0xe7fdf6d4,
00516   0x7db5bc02, 0xe7e5477f,
00517   0x7db0fdf8, 0xe7cc9917, 0x7dac3b15, 0xe7b3eb9f, 0x7da77359, 0xe79b3f16,
00518   0x7da2a6c6, 0xe782937e,
00519   0x7d9dd55a, 0xe769e8d8, 0x7d98ff17, 0xe7513f25, 0x7d9423fc, 0xe7389665,
00520   0x7d8f4409, 0xe71fee99,
00521   0x7d8a5f40, 0xe70747c4, 0x7d85759f, 0xe6eea1e4, 0x7d808728, 0xe6d5fcfc,
00522   0x7d7b93da, 0xe6bd590d,
00523   0x7d769bb5, 0xe6a4b616, 0x7d719eba, 0xe68c141a, 0x7d6c9ce9, 0xe6737319,
00524   0x7d679642, 0xe65ad315,
00525   0x7d628ac6, 0xe642340d, 0x7d5d7a74, 0xe6299604, 0x7d58654d, 0xe610f8f9,
00526   0x7d534b50, 0xe5f85cef,
00527   0x7d4e2c7f, 0xe5dfc1e5, 0x7d4908d9, 0xe5c727dd, 0x7d43e05e, 0xe5ae8ed8,
00528   0x7d3eb30f, 0xe595f6d7,
00529   0x7d3980ec, 0xe57d5fda, 0x7d3449f5, 0xe564c9e3, 0x7d2f0e2b, 0xe54c34f3,
00530   0x7d29cd8c, 0xe533a10a,
00531   0x7d24881b, 0xe51b0e2a, 0x7d1f3dd6, 0xe5027c53, 0x7d19eebf, 0xe4e9eb87,
00532   0x7d149ad5, 0xe4d15bc6,
00533   0x7d0f4218, 0xe4b8cd11, 0x7d09e489, 0xe4a03f69, 0x7d048228, 0xe487b2d0,
00534   0x7cff1af5, 0xe46f2745,
00535   0x7cf9aef0, 0xe4569ccb, 0x7cf43e1a, 0xe43e1362, 0x7ceec873, 0xe4258b0a,
00536   0x7ce94dfb, 0xe40d03c6,
00537   0x7ce3ceb2, 0xe3f47d96, 0x7cde4a98, 0xe3dbf87a, 0x7cd8c1ae, 0xe3c37474,
00538   0x7cd333f3, 0xe3aaf184,
00539   0x7ccda169, 0xe3926fad, 0x7cc80a0f, 0xe379eeed, 0x7cc26de5, 0xe3616f48,
00540   0x7cbcccec, 0xe348f0bd,
00541   0x7cb72724, 0xe330734d, 0x7cb17c8d, 0xe317f6fa, 0x7cabcd28, 0xe2ff7bc3,
00542   0x7ca618f3, 0xe2e701ac,
00543   0x7ca05ff1, 0xe2ce88b3, 0x7c9aa221, 0xe2b610da, 0x7c94df83, 0xe29d9a23,
00544   0x7c8f1817, 0xe285248d,
00545   0x7c894bde, 0xe26cb01b, 0x7c837ad8, 0xe2543ccc, 0x7c7da505, 0xe23bcaa2,
00546   0x7c77ca65, 0xe223599e,
00547   0x7c71eaf9, 0xe20ae9c1, 0x7c6c06c0, 0xe1f27b0b, 0x7c661dbc, 0xe1da0d7e,
00548   0x7c602fec, 0xe1c1a11b,
00549   0x7c5a3d50, 0xe1a935e2, 0x7c5445e9, 0xe190cbd4, 0x7c4e49b7, 0xe17862f3,
00550   0x7c4848ba, 0xe15ffb3f,
00551   0x7c4242f2, 0xe14794ba, 0x7c3c3860, 0xe12f2f63, 0x7c362904, 0xe116cb3d,
00552   0x7c3014de, 0xe0fe6848,
00553   0x7c29fbee, 0xe0e60685, 0x7c23de35, 0xe0cda5f5, 0x7c1dbbb3, 0xe0b54698,
00554   0x7c179467, 0xe09ce871,
00555   0x7c116853, 0xe0848b7f, 0x7c0b3777, 0xe06c2fc4, 0x7c0501d2, 0xe053d541,
00556   0x7bfec765, 0xe03b7bf6,
00557   0x7bf88830, 0xe02323e5, 0x7bf24434, 0xe00acd0e, 0x7bebfb70, 0xdff27773,
00558   0x7be5ade6, 0xdfda2314,
00559   0x7bdf5b94, 0xdfc1cff3, 0x7bd9047c, 0xdfa97e0f, 0x7bd2a89e, 0xdf912d6b,
00560   0x7bcc47fa, 0xdf78de07,
00561   0x7bc5e290, 0xdf608fe4, 0x7bbf7860, 0xdf484302, 0x7bb9096b, 0xdf2ff764,
00562   0x7bb295b0, 0xdf17ad0a,
00563   0x7bac1d31, 0xdeff63f4, 0x7ba59fee, 0xdee71c24, 0x7b9f1de6, 0xdeced59b,
00564   0x7b989719, 0xdeb69059,
00565   0x7b920b89, 0xde9e4c60, 0x7b8b7b36, 0xde8609b1, 0x7b84e61f, 0xde6dc84b,
00566   0x7b7e4c45, 0xde558831,
00567   0x7b77ada8, 0xde3d4964, 0x7b710a49, 0xde250be3, 0x7b6a6227, 0xde0ccfb1,
00568   0x7b63b543, 0xddf494ce,
00569   0x7b5d039e, 0xdddc5b3b, 0x7b564d36, 0xddc422f8, 0x7b4f920e, 0xddabec08,
00570   0x7b48d225, 0xdd93b66a,
00571   0x7b420d7a, 0xdd7b8220, 0x7b3b4410, 0xdd634f2b, 0x7b3475e5, 0xdd4b1d8c,
00572   0x7b2da2fa, 0xdd32ed43,
00573   0x7b26cb4f, 0xdd1abe51, 0x7b1feee5, 0xdd0290b8, 0x7b190dbc, 0xdcea6478,
00574   0x7b1227d3, 0xdcd23993,
00575   0x7b0b3d2c, 0xdcba1008, 0x7b044dc7, 0xdca1e7da, 0x7afd59a4, 0xdc89c109,
00576   0x7af660c2, 0xdc719b96,
00577   0x7aef6323, 0xdc597781, 0x7ae860c7, 0xdc4154cd, 0x7ae159ae, 0xdc293379,
00578   0x7ada4dd8, 0xdc111388,
00579   0x7ad33d45, 0xdbf8f4f8, 0x7acc27f7, 0xdbe0d7cd, 0x7ac50dec, 0xdbc8bc06,
00580   0x7abdef25, 0xdbb0a1a4,
00581   0x7ab6cba4, 0xdb9888a8, 0x7aafa367, 0xdb807114, 0x7aa8766f, 0xdb685ae9,
00582   0x7aa144bc, 0xdb504626,
00583   0x7a9a0e50, 0xdb3832cd, 0x7a92d329, 0xdb2020e0, 0x7a8b9348, 0xdb08105e,
00584   0x7a844eae, 0xdaf00149,
00585   0x7a7d055b, 0xdad7f3a2, 0x7a75b74f, 0xdabfe76a, 0x7a6e648a, 0xdaa7dca1,
00586   0x7a670d0d, 0xda8fd349,
00587   0x7a5fb0d8, 0xda77cb63, 0x7a584feb, 0xda5fc4ef, 0x7a50ea47, 0xda47bfee,
00588   0x7a497feb, 0xda2fbc61,
00589   0x7a4210d8, 0xda17ba4a, 0x7a3a9d0f, 0xd9ffb9a9, 0x7a332490, 0xd9e7ba7f,
00590   0x7a2ba75a, 0xd9cfbccd,
00591   0x7a24256f, 0xd9b7c094, 0x7a1c9ece, 0xd99fc5d4, 0x7a151378, 0xd987cc90,
00592   0x7a0d836d, 0xd96fd4c7,
00593   0x7a05eead, 0xd957de7a, 0x79fe5539, 0xd93fe9ab, 0x79f6b711, 0xd927f65b,
00594   0x79ef1436, 0xd910048a,
00595   0x79e76ca7, 0xd8f81439, 0x79dfc064, 0xd8e0256a, 0x79d80f6f, 0xd8c8381d,
00596   0x79d059c8, 0xd8b04c52,
00597   0x79c89f6e, 0xd898620c, 0x79c0e062, 0xd880794b, 0x79b91ca4, 0xd868920f,
00598   0x79b15435, 0xd850ac5a,
00599   0x79a98715, 0xd838c82d, 0x79a1b545, 0xd820e589, 0x7999dec4, 0xd809046e,
00600   0x79920392, 0xd7f124dd,
00601   0x798a23b1, 0xd7d946d8, 0x79823f20, 0xd7c16a5f, 0x797a55e0, 0xd7a98f73,
00602   0x797267f2, 0xd791b616,
00603   0x796a7554, 0xd779de47, 0x79627e08, 0xd7620808, 0x795a820e, 0xd74a335b,
00604   0x79528167, 0xd732603f,
00605   0x794a7c12, 0xd71a8eb5, 0x79427210, 0xd702bec0, 0x793a6361, 0xd6eaf05f,
00606   0x79325006, 0xd6d32393,
00607   0x792a37fe, 0xd6bb585e, 0x79221b4b, 0xd6a38ec0, 0x7919f9ec, 0xd68bc6ba,
00608   0x7911d3e2, 0xd674004e,
00609   0x7909a92d, 0xd65c3b7b, 0x790179cd, 0xd6447844, 0x78f945c3, 0xd62cb6a8,
00610   0x78f10d0f, 0xd614f6a9,
00611   0x78e8cfb2, 0xd5fd3848, 0x78e08dab, 0xd5e57b85, 0x78d846fb, 0xd5cdc062,
00612   0x78cffba3, 0xd5b606e0,
00613   0x78c7aba2, 0xd59e4eff, 0x78bf56f9, 0xd58698c0, 0x78b6fda8, 0xd56ee424,
00614   0x78ae9fb0, 0xd557312d,
00615   0x78a63d11, 0xd53f7fda, 0x789dd5cb, 0xd527d02e, 0x789569df, 0xd5102228,
00616   0x788cf94c, 0xd4f875ca,
00617   0x78848414, 0xd4e0cb15, 0x787c0a36, 0xd4c92209, 0x78738bb3, 0xd4b17aa8,
00618   0x786b088c, 0xd499d4f2,
00619   0x786280bf, 0xd48230e9, 0x7859f44f, 0xd46a8e8d, 0x7851633b, 0xd452eddf,
00620   0x7848cd83, 0xd43b4ee0,
00621   0x78403329, 0xd423b191, 0x7837942b, 0xd40c15f3, 0x782ef08b, 0xd3f47c06,
00622   0x78264849, 0xd3dce3cd,
00623   0x781d9b65, 0xd3c54d47, 0x7814e9df, 0xd3adb876, 0x780c33b8, 0xd396255a,
00624   0x780378f1, 0xd37e93f4,
00625   0x77fab989, 0xd3670446, 0x77f1f581, 0xd34f764f, 0x77e92cd9, 0xd337ea12,
00626   0x77e05f91, 0xd3205f8f,
00627   0x77d78daa, 0xd308d6c7, 0x77ceb725, 0xd2f14fba, 0x77c5dc01, 0xd2d9ca6a,
00628   0x77bcfc3f, 0xd2c246d8,
00629   0x77b417df, 0xd2aac504, 0x77ab2ee2, 0xd29344f0, 0x77a24148, 0xd27bc69c,
00630   0x77994f11, 0xd2644a0a,
00631   0x7790583e, 0xd24ccf39, 0x77875cce, 0xd235562b, 0x777e5cc3, 0xd21ddee2,
00632   0x7775581d, 0xd206695d,
00633   0x776c4edb, 0xd1eef59e, 0x776340ff, 0xd1d783a6, 0x775a2e89, 0xd1c01375,
00634   0x77511778, 0xd1a8a50d,
00635   0x7747fbce, 0xd191386e, 0x773edb8b, 0xd179cd99, 0x7735b6af, 0xd1626490,
00636   0x772c8d3a, 0xd14afd52,
00637   0x77235f2d, 0xd13397e2, 0x771a2c88, 0xd11c343f, 0x7710f54c, 0xd104d26b,
00638   0x7707b979, 0xd0ed7267,
00639   0x76fe790e, 0xd0d61434, 0x76f5340e, 0xd0beb7d2, 0x76ebea77, 0xd0a75d42,
00640   0x76e29c4b, 0xd0900486,
00641   0x76d94989, 0xd078ad9e, 0x76cff232, 0xd061588b, 0x76c69647, 0xd04a054e,
00642   0x76bd35c7, 0xd032b3e7,
00643   0x76b3d0b4, 0xd01b6459, 0x76aa670d, 0xd00416a3, 0x76a0f8d2, 0xcfeccac7,
00644   0x76978605, 0xcfd580c6,
00645   0x768e0ea6, 0xcfbe389f, 0x768492b4, 0xcfa6f255, 0x767b1231, 0xcf8fade9,
00646   0x76718d1c, 0xcf786b5a,
00647   0x76680376, 0xcf612aaa, 0x765e7540, 0xcf49ebda, 0x7654e279, 0xcf32aeeb,
00648   0x764b4b23, 0xcf1b73de,
00649   0x7641af3d, 0xcf043ab3, 0x76380ec8, 0xceed036b, 0x762e69c4, 0xced5ce08,
00650   0x7624c031, 0xcebe9a8a,
00651   0x761b1211, 0xcea768f2, 0x76115f63, 0xce903942, 0x7607a828, 0xce790b79,
00652   0x75fdec60, 0xce61df99,
00653   0x75f42c0b, 0xce4ab5a2, 0x75ea672a, 0xce338d97, 0x75e09dbd, 0xce1c6777,
00654   0x75d6cfc5, 0xce054343,
00655   0x75ccfd42, 0xcdee20fc, 0x75c32634, 0xcdd700a4, 0x75b94a9c, 0xcdbfe23a,
00656   0x75af6a7b, 0xcda8c5c1,
00657   0x75a585cf, 0xcd91ab39, 0x759b9c9b, 0xcd7a92a2, 0x7591aedd, 0xcd637bfe,
00658   0x7587bc98, 0xcd4c674d,
00659   0x757dc5ca, 0xcd355491, 0x7573ca75, 0xcd1e43ca, 0x7569ca99, 0xcd0734f9,
00660   0x755fc635, 0xccf0281f,
00661   0x7555bd4c, 0xccd91d3d, 0x754bafdc, 0xccc21455, 0x75419de7, 0xccab0d65,
00662   0x7537876c, 0xcc940871,
00663   0x752d6c6c, 0xcc7d0578, 0x75234ce8, 0xcc66047b, 0x751928e0, 0xcc4f057c,
00664   0x750f0054, 0xcc38087b,
00665   0x7504d345, 0xcc210d79, 0x74faa1b3, 0xcc0a1477, 0x74f06b9e, 0xcbf31d75,
00666   0x74e63108, 0xcbdc2876,
00667   0x74dbf1ef, 0xcbc53579, 0x74d1ae55, 0xcbae447f, 0x74c7663a, 0xcb97558a,
00668   0x74bd199f, 0xcb80689a,
00669   0x74b2c884, 0xcb697db0, 0x74a872e8, 0xcb5294ce, 0x749e18cd, 0xcb3badf3,
00670   0x7493ba34, 0xcb24c921,
00671   0x7489571c, 0xcb0de658, 0x747eef85, 0xcaf7059a, 0x74748371, 0xcae026e8,
00672   0x746a12df, 0xcac94a42,
00673   0x745f9dd1, 0xcab26fa9, 0x74552446, 0xca9b971e, 0x744aa63f, 0xca84c0a3,
00674   0x744023bc, 0xca6dec37,
00675   0x74359cbd, 0xca5719db, 0x742b1144, 0xca404992, 0x74208150, 0xca297b5a,
00676   0x7415ece2, 0xca12af37,
00677   0x740b53fb, 0xc9fbe527, 0x7400b69a, 0xc9e51d2d, 0x73f614c0, 0xc9ce5748,
00678   0x73eb6e6e, 0xc9b7937a,
00679   0x73e0c3a3, 0xc9a0d1c5, 0x73d61461, 0xc98a1227, 0x73cb60a8, 0xc97354a4,
00680   0x73c0a878, 0xc95c993a,
00681   0x73b5ebd1, 0xc945dfec, 0x73ab2ab4, 0xc92f28ba, 0x73a06522, 0xc91873a5,
00682   0x73959b1b, 0xc901c0ae,
00683   0x738acc9e, 0xc8eb0fd6, 0x737ff9ae, 0xc8d4611d, 0x73752249, 0xc8bdb485,
00684   0x736a4671, 0xc8a70a0e,
00685   0x735f6626, 0xc89061ba, 0x73548168, 0xc879bb89, 0x73499838, 0xc863177b,
00686   0x733eaa96, 0xc84c7593,
00687   0x7333b883, 0xc835d5d0, 0x7328c1ff, 0xc81f3834, 0x731dc70a, 0xc8089cbf,
00688   0x7312c7a5, 0xc7f20373,
00689   0x7307c3d0, 0xc7db6c50, 0x72fcbb8c, 0xc7c4d757, 0x72f1aed9, 0xc7ae4489,
00690   0x72e69db7, 0xc797b3e7,
00691   0x72db8828, 0xc7812572, 0x72d06e2b, 0xc76a992a, 0x72c54fc1, 0xc7540f11,
00692   0x72ba2cea, 0xc73d8727,
00693   0x72af05a7, 0xc727016d, 0x72a3d9f7, 0xc7107de4, 0x7298a9dd, 0xc6f9fc8d,
00694   0x728d7557, 0xc6e37d69,
00695   0x72823c67, 0xc6cd0079, 0x7276ff0d, 0xc6b685bd, 0x726bbd48, 0xc6a00d37,
00696   0x7260771b, 0xc68996e7,
00697   0x72552c85, 0xc67322ce, 0x7249dd86, 0xc65cb0ed, 0x723e8a20, 0xc6464144,
00698   0x72333251, 0xc62fd3d6,
00699   0x7227d61c, 0xc61968a2, 0x721c7580, 0xc602ffaa, 0x7211107e, 0xc5ec98ee,
00700   0x7205a716, 0xc5d6346f,
00701   0x71fa3949, 0xc5bfd22e, 0x71eec716, 0xc5a9722c, 0x71e35080, 0xc593146a,
00702   0x71d7d585, 0xc57cb8e9,
00703   0x71cc5626, 0xc5665fa9, 0x71c0d265, 0xc55008ab, 0x71b54a41, 0xc539b3f1,
00704   0x71a9bdba, 0xc523617a,
00705   0x719e2cd2, 0xc50d1149, 0x71929789, 0xc4f6c35d, 0x7186fdde, 0xc4e077b8,
00706   0x717b5fd3, 0xc4ca2e5b,
00707   0x716fbd68, 0xc4b3e746, 0x7164169d, 0xc49da27a, 0x71586b74, 0xc4875ff9,
00708   0x714cbbeb, 0xc4711fc2,
00709   0x71410805, 0xc45ae1d7, 0x71354fc0, 0xc444a639, 0x7129931f, 0xc42e6ce8,
00710   0x711dd220, 0xc41835e6,
00711   0x71120cc5, 0xc4020133, 0x7106430e, 0xc3ebced0, 0x70fa74fc, 0xc3d59ebe,
00712   0x70eea28e, 0xc3bf70fd,
00713   0x70e2cbc6, 0xc3a94590, 0x70d6f0a4, 0xc3931c76, 0x70cb1128, 0xc37cf5b0,
00714   0x70bf2d53, 0xc366d140,
00715   0x70b34525, 0xc350af26, 0x70a7589f, 0xc33a8f62, 0x709b67c0, 0xc32471f7,
00716   0x708f728b, 0xc30e56e4,
00717   0x708378ff, 0xc2f83e2a, 0x70777b1c, 0xc2e227cb, 0x706b78e3, 0xc2cc13c7,
00718   0x705f7255, 0xc2b6021f,
00719   0x70536771, 0xc29ff2d4, 0x70475839, 0xc289e5e7, 0x703b44ad, 0xc273db58,
00720   0x702f2ccd, 0xc25dd329,
00721   0x7023109a, 0xc247cd5a, 0x7016f014, 0xc231c9ec, 0x700acb3c, 0xc21bc8e1,
00722   0x6ffea212, 0xc205ca38,
00723   0x6ff27497, 0xc1efcdf3, 0x6fe642ca, 0xc1d9d412, 0x6fda0cae, 0xc1c3dc97,
00724   0x6fcdd241, 0xc1ade781,
00725   0x6fc19385, 0xc197f4d4, 0x6fb5507a, 0xc182048d, 0x6fa90921, 0xc16c16b0,
00726   0x6f9cbd79, 0xc1562b3d,
00727   0x6f906d84, 0xc1404233, 0x6f841942, 0xc12a5b95, 0x6f77c0b3, 0xc1147764,
00728   0x6f6b63d8, 0xc0fe959f,
00729   0x6f5f02b2, 0xc0e8b648, 0x6f529d40, 0xc0d2d960, 0x6f463383, 0xc0bcfee7,
00730   0x6f39c57d, 0xc0a726df,
00731   0x6f2d532c, 0xc0915148, 0x6f20dc92, 0xc07b7e23, 0x6f1461b0, 0xc065ad70,
00732   0x6f07e285, 0xc04fdf32,
00733   0x6efb5f12, 0xc03a1368, 0x6eeed758, 0xc0244a14, 0x6ee24b57, 0xc00e8336,
00734   0x6ed5bb10, 0xbff8bece,
00735   0x6ec92683, 0xbfe2fcdf, 0x6ebc8db0, 0xbfcd3d69, 0x6eaff099, 0xbfb7806c,
00736   0x6ea34f3d, 0xbfa1c5ea,
00737   0x6e96a99d, 0xbf8c0de3, 0x6e89ffb9, 0xbf765858, 0x6e7d5193, 0xbf60a54a,
00738   0x6e709f2a, 0xbf4af4ba,
00739   0x6e63e87f, 0xbf3546a8, 0x6e572d93, 0xbf1f9b16, 0x6e4a6e66, 0xbf09f205,
00740   0x6e3daaf8, 0xbef44b74,
00741   0x6e30e34a, 0xbedea765, 0x6e24175c, 0xbec905d9, 0x6e174730, 0xbeb366d1,
00742   0x6e0a72c5, 0xbe9dca4e,
00743   0x6dfd9a1c, 0xbe88304f, 0x6df0bd35, 0xbe7298d7, 0x6de3dc11, 0xbe5d03e6,
00744   0x6dd6f6b1, 0xbe47717c,
00745   0x6dca0d14, 0xbe31e19b, 0x6dbd1f3c, 0xbe1c5444, 0x6db02d29, 0xbe06c977,
00746   0x6da336dc, 0xbdf14135,
00747   0x6d963c54, 0xbddbbb7f, 0x6d893d93, 0xbdc63856, 0x6d7c3a98, 0xbdb0b7bb,
00748   0x6d6f3365, 0xbd9b39ad,
00749   0x6d6227fa, 0xbd85be30, 0x6d551858, 0xbd704542, 0x6d48047e, 0xbd5acee5,
00750   0x6d3aec6e, 0xbd455b1a,
00751   0x6d2dd027, 0xbd2fe9e2, 0x6d20afac, 0xbd1a7b3d, 0x6d138afb, 0xbd050f2c,
00752   0x6d066215, 0xbcefa5b0,
00753   0x6cf934fc, 0xbcda3ecb, 0x6cec03af, 0xbcc4da7b, 0x6cdece2f, 0xbcaf78c4,
00754   0x6cd1947c, 0xbc9a19a5,
00755   0x6cc45698, 0xbc84bd1f, 0x6cb71482, 0xbc6f6333, 0x6ca9ce3b, 0xbc5a0be2,
00756   0x6c9c83c3, 0xbc44b72c,
00757   0x6c8f351c, 0xbc2f6513, 0x6c81e245, 0xbc1a1598, 0x6c748b3f, 0xbc04c8ba,
00758   0x6c67300b, 0xbbef7e7c,
00759   0x6c59d0a9, 0xbbda36dd, 0x6c4c6d1a, 0xbbc4f1df, 0x6c3f055d, 0xbbafaf82,
00760   0x6c319975, 0xbb9a6fc7,
00761   0x6c242960, 0xbb8532b0, 0x6c16b521, 0xbb6ff83c, 0x6c093cb6, 0xbb5ac06d,
00762   0x6bfbc021, 0xbb458b43,
00763   0x6bee3f62, 0xbb3058c0, 0x6be0ba7b, 0xbb1b28e4, 0x6bd3316a, 0xbb05fbb0,
00764   0x6bc5a431, 0xbaf0d125,
00765   0x6bb812d1, 0xbadba943, 0x6baa7d49, 0xbac6840c, 0x6b9ce39b, 0xbab16180,
00766   0x6b8f45c7, 0xba9c41a0,
00767   0x6b81a3cd, 0xba87246d, 0x6b73fdae, 0xba7209e7, 0x6b66536b, 0xba5cf210,
00768   0x6b58a503, 0xba47dce8,
00769   0x6b4af279, 0xba32ca71, 0x6b3d3bcb, 0xba1dbaaa, 0x6b2f80fb, 0xba08ad95,
00770   0x6b21c208, 0xb9f3a332,
00771   0x6b13fef5, 0xb9de9b83, 0x6b0637c1, 0xb9c99688, 0x6af86c6c, 0xb9b49442,
00772   0x6aea9cf8, 0xb99f94b2,
00773   0x6adcc964, 0xb98a97d8, 0x6acef1b2, 0xb9759db6, 0x6ac115e2, 0xb960a64c,
00774   0x6ab335f4, 0xb94bb19b,
00775   0x6aa551e9, 0xb936bfa4, 0x6a9769c1, 0xb921d067, 0x6a897d7d, 0xb90ce3e6,
00776   0x6a7b8d1e, 0xb8f7fa21,
00777   0x6a6d98a4, 0xb8e31319, 0x6a5fa010, 0xb8ce2ecf, 0x6a51a361, 0xb8b94d44,
00778   0x6a43a29a, 0xb8a46e78,
00779   0x6a359db9, 0xb88f926d, 0x6a2794c1, 0xb87ab922, 0x6a1987b0, 0xb865e299,
00780   0x6a0b7689, 0xb8510ed4,
00781   0x69fd614a, 0xb83c3dd1, 0x69ef47f6, 0xb8276f93, 0x69e12a8c, 0xb812a41a,
00782   0x69d3090e, 0xb7fddb67,
00783   0x69c4e37a, 0xb7e9157a, 0x69b6b9d3, 0xb7d45255, 0x69a88c19, 0xb7bf91f8,
00784   0x699a5a4c, 0xb7aad465,
00785   0x698c246c, 0xb796199b, 0x697dea7b, 0xb781619c, 0x696fac78, 0xb76cac69,
00786   0x69616a65, 0xb757fa01,
00787   0x69532442, 0xb7434a67, 0x6944da10, 0xb72e9d9b, 0x69368bce, 0xb719f39e,
00788   0x6928397e, 0xb7054c6f,
00789   0x6919e320, 0xb6f0a812, 0x690b88b5, 0xb6dc0685, 0x68fd2a3d, 0xb6c767ca,
00790   0x68eec7b9, 0xb6b2cbe2,
00791   0x68e06129, 0xb69e32cd, 0x68d1f68f, 0xb6899c8d, 0x68c387e9, 0xb6750921,
00792   0x68b5153a, 0xb660788c,
00793   0x68a69e81, 0xb64beacd, 0x689823bf, 0xb6375fe5, 0x6889a4f6, 0xb622d7d6,
00794   0x687b2224, 0xb60e529f,
00795   0x686c9b4b, 0xb5f9d043, 0x685e106c, 0xb5e550c1, 0x684f8186, 0xb5d0d41a,
00796   0x6840ee9b, 0xb5bc5a50,
00797   0x683257ab, 0xb5a7e362, 0x6823bcb7, 0xb5936f53, 0x68151dbe, 0xb57efe22,
00798   0x68067ac3, 0xb56a8fd0,
00799   0x67f7d3c5, 0xb556245e, 0x67e928c5, 0xb541bbcd, 0x67da79c3, 0xb52d561e,
00800   0x67cbc6c0, 0xb518f351,
00801   0x67bd0fbd, 0xb5049368, 0x67ae54ba, 0xb4f03663, 0x679f95b7, 0xb4dbdc42,
00802   0x6790d2b6, 0xb4c78507,
00803   0x67820bb7, 0xb4b330b3, 0x677340ba, 0xb49edf45, 0x676471c0, 0xb48a90c0,
00804   0x67559eca, 0xb4764523,
00805   0x6746c7d8, 0xb461fc70, 0x6737ecea, 0xb44db6a8, 0x67290e02, 0xb43973ca,
00806   0x671a2b20, 0xb42533d8,
00807   0x670b4444, 0xb410f6d3, 0x66fc596f, 0xb3fcbcbb, 0x66ed6aa1, 0xb3e88592,
00808   0x66de77dc, 0xb3d45157,
00809   0x66cf8120, 0xb3c0200c, 0x66c0866d, 0xb3abf1b2, 0x66b187c3, 0xb397c649,
00810   0x66a28524, 0xb3839dd3,
00811   0x66937e91, 0xb36f784f, 0x66847408, 0xb35b55bf, 0x6675658c, 0xb3473623,
00812   0x6666531d, 0xb333197c,
00813   0x66573cbb, 0xb31effcc, 0x66482267, 0xb30ae912, 0x66390422, 0xb2f6d550,
00814   0x6629e1ec, 0xb2e2c486,
00815   0x661abbc5, 0xb2ceb6b5, 0x660b91af, 0xb2baabde, 0x65fc63a9, 0xb2a6a402,
00816   0x65ed31b5, 0xb2929f21,
00817   0x65ddfbd3, 0xb27e9d3c, 0x65cec204, 0xb26a9e54, 0x65bf8447, 0xb256a26a,
00818   0x65b0429f, 0xb242a97e,
00819   0x65a0fd0b, 0xb22eb392, 0x6591b38c, 0xb21ac0a6, 0x65826622, 0xb206d0ba,
00820   0x657314cf, 0xb1f2e3d0,
00821   0x6563bf92, 0xb1def9e9, 0x6554666d, 0xb1cb1304, 0x6545095f, 0xb1b72f23,
00822   0x6535a86b, 0xb1a34e47,
00823   0x6526438f, 0xb18f7071, 0x6516dacd, 0xb17b95a0, 0x65076e25, 0xb167bdd7,
00824   0x64f7fd98, 0xb153e915,
00825   0x64e88926, 0xb140175b, 0x64d910d1, 0xb12c48ab, 0x64c99498, 0xb1187d05,
00826   0x64ba147d, 0xb104b46a,
00827   0x64aa907f, 0xb0f0eeda, 0x649b08a0, 0xb0dd2c56, 0x648b7ce0, 0xb0c96ce0,
00828   0x647bed3f, 0xb0b5b077,
00829   0x646c59bf, 0xb0a1f71d, 0x645cc260, 0xb08e40d2, 0x644d2722, 0xb07a8d97,
00830   0x643d8806, 0xb066dd6d,
00831   0x642de50d, 0xb0533055, 0x641e3e38, 0xb03f864f, 0x640e9386, 0xb02bdf5c,
00832   0x63fee4f8, 0xb0183b7d,
00833   0x63ef3290, 0xb0049ab3, 0x63df7c4d, 0xaff0fcfe, 0x63cfc231, 0xafdd625f,
00834   0x63c0043b, 0xafc9cad7,
00835   0x63b0426d, 0xafb63667, 0x63a07cc7, 0xafa2a50f, 0x6390b34a, 0xaf8f16d1,
00836   0x6380e5f6, 0xaf7b8bac,
00837   0x637114cc, 0xaf6803a2, 0x63613fcd, 0xaf547eb3, 0x635166f9, 0xaf40fce1,
00838   0x63418a50, 0xaf2d7e2b,
00839   0x6331a9d4, 0xaf1a0293, 0x6321c585, 0xaf068a1a, 0x6311dd64, 0xaef314c0,
00840   0x6301f171, 0xaedfa285,
00841   0x62f201ac, 0xaecc336c, 0x62e20e17, 0xaeb8c774, 0x62d216b3, 0xaea55e9e,
00842   0x62c21b7e, 0xae91f8eb,
00843   0x62b21c7b, 0xae7e965b, 0x62a219aa, 0xae6b36f0, 0x6292130c, 0xae57daab,
00844   0x628208a1, 0xae44818b,
00845   0x6271fa69, 0xae312b92, 0x6261e866, 0xae1dd8c0, 0x6251d298, 0xae0a8916,
00846   0x6241b8ff, 0xadf73c96,
00847   0x62319b9d, 0xade3f33e, 0x62217a72, 0xadd0ad12, 0x6211557e, 0xadbd6a10,
00848   0x62012cc2, 0xadaa2a3b,
00849   0x61f1003f, 0xad96ed92, 0x61e0cff5, 0xad83b416, 0x61d09be5, 0xad707dc8,
00850   0x61c06410, 0xad5d4aaa,
00851   0x61b02876, 0xad4a1aba, 0x619fe918, 0xad36edfc, 0x618fa5f7, 0xad23c46e,
00852   0x617f5f12, 0xad109e12,
00853   0x616f146c, 0xacfd7ae8, 0x615ec603, 0xacea5af2, 0x614e73da, 0xacd73e30,
00854   0x613e1df0, 0xacc424a3,
00855   0x612dc447, 0xacb10e4b, 0x611d66de, 0xac9dfb29, 0x610d05b7, 0xac8aeb3e,
00856   0x60fca0d2, 0xac77de8b,
00857   0x60ec3830, 0xac64d510, 0x60dbcbd1, 0xac51cecf, 0x60cb5bb7, 0xac3ecbc7,
00858   0x60bae7e1, 0xac2bcbfa,
00859   0x60aa7050, 0xac18cf69, 0x6099f505, 0xac05d613, 0x60897601, 0xabf2dffb,
00860   0x6078f344, 0xabdfed1f,
00861   0x60686ccf, 0xabccfd83, 0x6057e2a2, 0xabba1125, 0x604754bf, 0xaba72807,
00862   0x6036c325, 0xab944229,
00863   0x60262dd6, 0xab815f8d, 0x601594d1, 0xab6e8032, 0x6004f819, 0xab5ba41a,
00864   0x5ff457ad, 0xab48cb46,
00865   0x5fe3b38d, 0xab35f5b5, 0x5fd30bbc, 0xab23236a, 0x5fc26038, 0xab105464,
00866   0x5fb1b104, 0xaafd88a4,
00867   0x5fa0fe1f, 0xaaeac02c, 0x5f90478a, 0xaad7fafb, 0x5f7f8d46, 0xaac53912,
00868   0x5f6ecf53, 0xaab27a73,
00869   0x5f5e0db3, 0xaa9fbf1e, 0x5f4d4865, 0xaa8d0713, 0x5f3c7f6b, 0xaa7a5253,
00870   0x5f2bb2c5, 0xaa67a0e0,
00871   0x5f1ae274, 0xaa54f2ba, 0x5f0a0e77, 0xaa4247e1, 0x5ef936d1, 0xaa2fa056,
00872   0x5ee85b82, 0xaa1cfc1a,
00873   0x5ed77c8a, 0xaa0a5b2e, 0x5ec699e9, 0xa9f7bd92, 0x5eb5b3a2, 0xa9e52347,
00874   0x5ea4c9b3, 0xa9d28c4e,
00875   0x5e93dc1f, 0xa9bff8a8, 0x5e82eae5, 0xa9ad6855, 0x5e71f606, 0xa99adb56,
00876   0x5e60fd84, 0xa98851ac,
00877   0x5e50015d, 0xa975cb57, 0x5e3f0194, 0xa9634858, 0x5e2dfe29, 0xa950c8b0,
00878   0x5e1cf71c, 0xa93e4c5f,
00879   0x5e0bec6e, 0xa92bd367, 0x5dfade20, 0xa9195dc7, 0x5de9cc33, 0xa906eb82,
00880   0x5dd8b6a7, 0xa8f47c97,
00881   0x5dc79d7c, 0xa8e21106, 0x5db680b4, 0xa8cfa8d2, 0x5da5604f, 0xa8bd43fa,
00882   0x5d943c4e, 0xa8aae280,
00883   0x5d8314b1, 0xa8988463, 0x5d71e979, 0xa88629a5, 0x5d60baa7, 0xa873d246,
00884   0x5d4f883b, 0xa8617e48,
00885   0x5d3e5237, 0xa84f2daa, 0x5d2d189a, 0xa83ce06e, 0x5d1bdb65, 0xa82a9693,
00886   0x5d0a9a9a, 0xa818501c,
00887   0x5cf95638, 0xa8060d08, 0x5ce80e41, 0xa7f3cd59, 0x5cd6c2b5, 0xa7e1910f,
00888   0x5cc57394, 0xa7cf582a,
00889   0x5cb420e0, 0xa7bd22ac, 0x5ca2ca99, 0xa7aaf094, 0x5c9170bf, 0xa798c1e5,
00890   0x5c801354, 0xa786969e,
00891   0x5c6eb258, 0xa7746ec0, 0x5c5d4dcc, 0xa7624a4d, 0x5c4be5b0, 0xa7502943,
00892   0x5c3a7a05, 0xa73e0ba5,
00893   0x5c290acc, 0xa72bf174, 0x5c179806, 0xa719daae, 0x5c0621b2, 0xa707c757,
00894   0x5bf4a7d2, 0xa6f5b76d,
00895   0x5be32a67, 0xa6e3aaf2, 0x5bd1a971, 0xa6d1a1e7, 0x5bc024f0, 0xa6bf9c4b,
00896   0x5bae9ce7, 0xa6ad9a21,
00897   0x5b9d1154, 0xa69b9b68, 0x5b8b8239, 0xa689a022, 0x5b79ef96, 0xa677a84e,
00898   0x5b68596d, 0xa665b3ee,
00899   0x5b56bfbd, 0xa653c303, 0x5b452288, 0xa641d58c, 0x5b3381ce, 0xa62feb8b,
00900   0x5b21dd90, 0xa61e0501,
00901   0x5b1035cf, 0xa60c21ee, 0x5afe8a8b, 0xa5fa4252, 0x5aecdbc5, 0xa5e8662f,
00902   0x5adb297d, 0xa5d68d85,
00903   0x5ac973b5, 0xa5c4b855, 0x5ab7ba6c, 0xa5b2e6a0, 0x5aa5fda5, 0xa5a11866,
00904   0x5a943d5e, 0xa58f4da8,
00905   0x5a82799a, 0xa57d8666, 0x5a70b258, 0xa56bc2a2, 0x5a5ee79a, 0xa55a025b,
00906   0x5a4d1960, 0xa5484594,
00907   0x5a3b47ab, 0xa5368c4b, 0x5a29727b, 0xa524d683, 0x5a1799d1, 0xa513243b,
00908   0x5a05bdae, 0xa5017575,
00909   0x59f3de12, 0xa4efca31, 0x59e1faff, 0xa4de2270, 0x59d01475, 0xa4cc7e32,
00910   0x59be2a74, 0xa4badd78,
00911   0x59ac3cfd, 0xa4a94043, 0x599a4c12, 0xa497a693, 0x598857b2, 0xa486106a,
00912   0x59765fde, 0xa4747dc7,
00913   0x59646498, 0xa462eeac, 0x595265df, 0xa4516319, 0x594063b5, 0xa43fdb10,
00914   0x592e5e19, 0xa42e568f,
00915   0x591c550e, 0xa41cd599, 0x590a4893, 0xa40b582e, 0x58f838a9, 0xa3f9de4e,
00916   0x58e62552, 0xa3e867fa,
00917   0x58d40e8c, 0xa3d6f534, 0x58c1f45b, 0xa3c585fb, 0x58afd6bd, 0xa3b41a50,
00918   0x589db5b3, 0xa3a2b234,
00919   0x588b9140, 0xa3914da8, 0x58796962, 0xa37fecac, 0x58673e1b, 0xa36e8f41,
00920   0x58550f6c, 0xa35d3567,
00921   0x5842dd54, 0xa34bdf20, 0x5830a7d6, 0xa33a8c6c, 0x581e6ef1, 0xa3293d4b,
00922   0x580c32a7, 0xa317f1bf,
00923   0x57f9f2f8, 0xa306a9c8, 0x57e7afe4, 0xa2f56566, 0x57d5696d, 0xa2e4249b,
00924   0x57c31f92, 0xa2d2e766,
00925   0x57b0d256, 0xa2c1adc9, 0x579e81b8, 0xa2b077c5, 0x578c2dba, 0xa29f4559,
00926   0x5779d65b, 0xa28e1687,
00927   0x57677b9d, 0xa27ceb4f, 0x57551d80, 0xa26bc3b2, 0x5742bc06, 0xa25a9fb1,
00928   0x5730572e, 0xa2497f4c,
00929   0x571deefa, 0xa2386284, 0x570b8369, 0xa2274959, 0x56f9147e, 0xa21633cd,
00930   0x56e6a239, 0xa20521e0,
00931   0x56d42c99, 0xa1f41392, 0x56c1b3a1, 0xa1e308e4, 0x56af3750, 0xa1d201d7,
00932   0x569cb7a8, 0xa1c0fe6c,
00933   0x568a34a9, 0xa1affea3, 0x5677ae54, 0xa19f027c, 0x566524aa, 0xa18e09fa,
00934   0x565297ab, 0xa17d151b,
00935   0x56400758, 0xa16c23e1, 0x562d73b2, 0xa15b364d, 0x561adcb9, 0xa14a4c5e,
00936   0x5608426e, 0xa1396617,
00937   0x55f5a4d2, 0xa1288376, 0x55e303e6, 0xa117a47e, 0x55d05faa, 0xa106c92f,
00938   0x55bdb81f, 0xa0f5f189,
00939   0x55ab0d46, 0xa0e51d8c, 0x55985f20, 0xa0d44d3b, 0x5585adad, 0xa0c38095,
00940   0x5572f8ed, 0xa0b2b79b,
00941   0x556040e2, 0xa0a1f24d, 0x554d858d, 0xa09130ad, 0x553ac6ee, 0xa08072ba,
00942   0x55280505, 0xa06fb876,
00943   0x55153fd4, 0xa05f01e1, 0x5502775c, 0xa04e4efc, 0x54efab9c, 0xa03d9fc8,
00944   0x54dcdc96, 0xa02cf444,
00945   0x54ca0a4b, 0xa01c4c73, 0x54b734ba, 0xa00ba853, 0x54a45be6, 0x9ffb07e7,
00946   0x54917fce, 0x9fea6b2f,
00947   0x547ea073, 0x9fd9d22a, 0x546bbdd7, 0x9fc93cdb, 0x5458d7f9, 0x9fb8ab41,
00948   0x5445eedb, 0x9fa81d5e,
00949   0x5433027d, 0x9f979331, 0x542012e1, 0x9f870cbc, 0x540d2005, 0x9f7689ff,
00950   0x53fa29ed, 0x9f660afb,
00951   0x53e73097, 0x9f558fb0, 0x53d43406, 0x9f45181f, 0x53c13439, 0x9f34a449,
00952   0x53ae3131, 0x9f24342f,
00953   0x539b2af0, 0x9f13c7d0, 0x53882175, 0x9f035f2e, 0x537514c2, 0x9ef2fa49,
00954   0x536204d7, 0x9ee29922,
00955   0x534ef1b5, 0x9ed23bb9, 0x533bdb5d, 0x9ec1e210, 0x5328c1d0, 0x9eb18c26,
00956   0x5315a50e, 0x9ea139fd,
00957   0x53028518, 0x9e90eb94, 0x52ef61ee, 0x9e80a0ee, 0x52dc3b92, 0x9e705a09,
00958   0x52c91204, 0x9e6016e8,
00959   0x52b5e546, 0x9e4fd78a, 0x52a2b556, 0x9e3f9bf0, 0x528f8238, 0x9e2f641b,
00960   0x527c4bea, 0x9e1f300b,
00961   0x5269126e, 0x9e0effc1, 0x5255d5c5, 0x9dfed33e, 0x524295f0, 0x9deeaa82,
00962   0x522f52ee, 0x9dde858e,
00963   0x521c0cc2, 0x9dce6463, 0x5208c36a, 0x9dbe4701, 0x51f576ea, 0x9dae2d68,
00964   0x51e22740, 0x9d9e179a,
00965   0x51ced46e, 0x9d8e0597, 0x51bb7e75, 0x9d7df75f, 0x51a82555, 0x9d6decf4,
00966   0x5194c910, 0x9d5de656,
00967   0x518169a5, 0x9d4de385, 0x516e0715, 0x9d3de482, 0x515aa162, 0x9d2de94d,
00968   0x5147388c, 0x9d1df1e9,
00969   0x5133cc94, 0x9d0dfe54, 0x51205d7b, 0x9cfe0e8f, 0x510ceb40, 0x9cee229c,
00970   0x50f975e6, 0x9cde3a7b,
00971   0x50e5fd6d, 0x9cce562c, 0x50d281d5, 0x9cbe75b0, 0x50bf031f, 0x9cae9907,
00972   0x50ab814d, 0x9c9ec033,
00973   0x5097fc5e, 0x9c8eeb34, 0x50847454, 0x9c7f1a0a, 0x5070e92f, 0x9c6f4cb6,
00974   0x505d5af1, 0x9c5f8339,
00975   0x5049c999, 0x9c4fbd93, 0x50363529, 0x9c3ffbc5, 0x50229da1, 0x9c303dcf,
00976   0x500f0302, 0x9c2083b3,
00977   0x4ffb654d, 0x9c10cd70, 0x4fe7c483, 0x9c011b08, 0x4fd420a4, 0x9bf16c7a,
00978   0x4fc079b1, 0x9be1c1c8,
00979   0x4faccfab, 0x9bd21af3, 0x4f992293, 0x9bc277fa, 0x4f857269, 0x9bb2d8de,
00980   0x4f71bf2e, 0x9ba33da0,
00981   0x4f5e08e3, 0x9b93a641, 0x4f4a4f89, 0x9b8412c1, 0x4f369320, 0x9b748320,
00982   0x4f22d3aa, 0x9b64f760,
00983   0x4f0f1126, 0x9b556f81, 0x4efb4b96, 0x9b45eb83, 0x4ee782fb, 0x9b366b68,
00984   0x4ed3b755, 0x9b26ef2f,
00985   0x4ebfe8a5, 0x9b1776da, 0x4eac16eb, 0x9b080268, 0x4e984229, 0x9af891db,
00986   0x4e846a60, 0x9ae92533,
00987   0x4e708f8f, 0x9ad9bc71, 0x4e5cb1b9, 0x9aca5795, 0x4e48d0dd, 0x9abaf6a1,
00988   0x4e34ecfc, 0x9aab9993,
00989   0x4e210617, 0x9a9c406e, 0x4e0d1c30, 0x9a8ceb31, 0x4df92f46, 0x9a7d99de,
00990   0x4de53f5a, 0x9a6e4c74,
00991   0x4dd14c6e, 0x9a5f02f5, 0x4dbd5682, 0x9a4fbd61, 0x4da95d96, 0x9a407bb9,
00992   0x4d9561ac, 0x9a313dfc,
00993   0x4d8162c4, 0x9a22042d, 0x4d6d60df, 0x9a12ce4b, 0x4d595bfe, 0x9a039c57,
00994   0x4d455422, 0x99f46e51,
00995   0x4d31494b, 0x99e5443b, 0x4d1d3b7a, 0x99d61e14, 0x4d092ab0, 0x99c6fbde,
00996   0x4cf516ee, 0x99b7dd99,
00997   0x4ce10034, 0x99a8c345, 0x4ccce684, 0x9999ace3, 0x4cb8c9dd, 0x998a9a74,
00998   0x4ca4aa41, 0x997b8bf8,
00999   0x4c9087b1, 0x996c816f, 0x4c7c622d, 0x995d7adc, 0x4c6839b7, 0x994e783d,
01000   0x4c540e4e, 0x993f7993,
01001   0x4c3fdff4, 0x99307ee0, 0x4c2baea9, 0x99218824, 0x4c177a6e, 0x9912955f,
01002   0x4c034345, 0x9903a691,
01003   0x4bef092d, 0x98f4bbbc, 0x4bdacc28, 0x98e5d4e0, 0x4bc68c36, 0x98d6f1fe,
01004   0x4bb24958, 0x98c81316,
01005   0x4b9e0390, 0x98b93828, 0x4b89badd, 0x98aa6136, 0x4b756f40, 0x989b8e40,
01006   0x4b6120bb, 0x988cbf46,
01007   0x4b4ccf4d, 0x987df449, 0x4b387af9, 0x986f2d4a, 0x4b2423be, 0x98606a49,
01008   0x4b0fc99d, 0x9851ab46,
01009   0x4afb6c98, 0x9842f043, 0x4ae70caf, 0x98343940, 0x4ad2a9e2, 0x9825863d,
01010   0x4abe4433, 0x9816d73b,
01011   0x4aa9dba2, 0x98082c3b, 0x4a957030, 0x97f9853d, 0x4a8101de, 0x97eae242,
01012   0x4a6c90ad, 0x97dc4349,
01013   0x4a581c9e, 0x97cda855, 0x4a43a5b0, 0x97bf1165, 0x4a2f2be6, 0x97b07e7a,
01014   0x4a1aaf3f, 0x97a1ef94,
01015   0x4a062fbd, 0x979364b5, 0x49f1ad61, 0x9784dddc, 0x49dd282a, 0x97765b0a,
01016   0x49c8a01b, 0x9767dc41,
01017   0x49b41533, 0x9759617f, 0x499f8774, 0x974aeac6, 0x498af6df, 0x973c7817,
01018   0x49766373, 0x972e0971,
01019   0x4961cd33, 0x971f9ed7, 0x494d341e, 0x97113847, 0x49389836, 0x9702d5c3,
01020   0x4923f97b, 0x96f4774b,
01021   0x490f57ee, 0x96e61ce0, 0x48fab391, 0x96d7c682, 0x48e60c62, 0x96c97432,
01022   0x48d16265, 0x96bb25f0,
01023   0x48bcb599, 0x96acdbbe, 0x48a805ff, 0x969e959b, 0x48935397, 0x96905388,
01024   0x487e9e64, 0x96821585,
01025   0x4869e665, 0x9673db94, 0x48552b9b, 0x9665a5b4, 0x48406e08, 0x965773e7,
01026   0x482badab, 0x9649462d,
01027   0x4816ea86, 0x963b1c86, 0x48022499, 0x962cf6f2, 0x47ed5be6, 0x961ed574,
01028   0x47d8906d, 0x9610b80a,
01029   0x47c3c22f, 0x96029eb6, 0x47aef12c, 0x95f48977, 0x479a1d67, 0x95e67850,
01030   0x478546de, 0x95d86b3f,
01031   0x47706d93, 0x95ca6247, 0x475b9188, 0x95bc5d66, 0x4746b2bc, 0x95ae5c9f,
01032   0x4731d131, 0x95a05ff0,
01033   0x471cece7, 0x9592675c, 0x470805df, 0x958472e2, 0x46f31c1a, 0x95768283,
01034   0x46de2f99, 0x9568963f,
01035   0x46c9405c, 0x955aae17, 0x46b44e65, 0x954cca0c, 0x469f59b4, 0x953eea1e,
01036   0x468a624a, 0x95310e4e,
01037   0x46756828, 0x9523369c, 0x46606b4e, 0x95156308, 0x464b6bbe, 0x95079394,
01038   0x46366978, 0x94f9c83f,
01039   0x4621647d, 0x94ec010b, 0x460c5cce, 0x94de3df8, 0x45f7526b, 0x94d07f05,
01040   0x45e24556, 0x94c2c435,
01041   0x45cd358f, 0x94b50d87, 0x45b82318, 0x94a75afd, 0x45a30df0, 0x9499ac95,
01042   0x458df619, 0x948c0252,
01043   0x4578db93, 0x947e5c33, 0x4563be60, 0x9470ba39, 0x454e9e80, 0x94631c65,
01044   0x45397bf4, 0x945582b7,
01045   0x452456bd, 0x9447ed2f, 0x450f2edb, 0x943a5bcf, 0x44fa0450, 0x942cce96,
01046   0x44e4d71c, 0x941f4585,
01047   0x44cfa740, 0x9411c09e, 0x44ba74bd, 0x94043fdf, 0x44a53f93, 0x93f6c34a,
01048   0x449007c4, 0x93e94adf,
01049   0x447acd50, 0x93dbd6a0, 0x44659039, 0x93ce668b, 0x4450507e, 0x93c0faa3,
01050   0x443b0e21, 0x93b392e6,
01051   0x4425c923, 0x93a62f57, 0x44108184, 0x9398cff5, 0x43fb3746, 0x938b74c1,
01052   0x43e5ea68, 0x937e1dbb,
01053   0x43d09aed, 0x9370cae4, 0x43bb48d4, 0x93637c3d, 0x43a5f41e, 0x935631c5,
01054   0x43909ccd, 0x9348eb7e,
01055   0x437b42e1, 0x933ba968, 0x4365e65b, 0x932e6b84, 0x4350873c, 0x932131d1,
01056   0x433b2585, 0x9313fc51,
01057   0x4325c135, 0x9306cb04, 0x43105a50, 0x92f99deb, 0x42faf0d4, 0x92ec7505,
01058   0x42e584c3, 0x92df5054,
01059   0x42d0161e, 0x92d22fd9, 0x42baa4e6, 0x92c51392, 0x42a5311b, 0x92b7fb82,
01060   0x428fbabe, 0x92aae7a8,
01061   0x427a41d0, 0x929dd806, 0x4264c653, 0x9290cc9b, 0x424f4845, 0x9283c568,
01062   0x4239c7aa, 0x9276c26d,
01063   0x42244481, 0x9269c3ac, 0x420ebecb, 0x925cc924, 0x41f93689, 0x924fd2d7,
01064   0x41e3abbc, 0x9242e0c4,
01065   0x41ce1e65, 0x9235f2ec, 0x41b88e84, 0x9229094f, 0x41a2fc1a, 0x921c23ef,
01066   0x418d6729, 0x920f42cb,
01067   0x4177cfb1, 0x920265e4, 0x416235b2, 0x91f58d3b, 0x414c992f, 0x91e8b8d0,
01068   0x4136fa27, 0x91dbe8a4,
01069   0x4121589b, 0x91cf1cb6, 0x410bb48c, 0x91c25508, 0x40f60dfb, 0x91b5919a,
01070   0x40e064ea, 0x91a8d26d,
01071   0x40cab958, 0x919c1781, 0x40b50b46, 0x918f60d6, 0x409f5ab6, 0x9182ae6d,
01072   0x4089a7a8, 0x91760047,
01073   0x4073f21d, 0x91695663, 0x405e3a16, 0x915cb0c3, 0x40487f94, 0x91500f67,
01074   0x4032c297, 0x91437250,
01075   0x401d0321, 0x9136d97d, 0x40074132, 0x912a44f0, 0x3ff17cca, 0x911db4a9,
01076   0x3fdbb5ec, 0x911128a8,
01077   0x3fc5ec98, 0x9104a0ee, 0x3fb020ce, 0x90f81d7b, 0x3f9a5290, 0x90eb9e50,
01078   0x3f8481dd, 0x90df236e,
01079   0x3f6eaeb8, 0x90d2acd4, 0x3f58d921, 0x90c63a83, 0x3f430119, 0x90b9cc7d,
01080   0x3f2d26a0, 0x90ad62c0,
01081   0x3f1749b8, 0x90a0fd4e, 0x3f016a61, 0x90949c28, 0x3eeb889c, 0x90883f4d,
01082   0x3ed5a46b, 0x907be6be,
01083   0x3ebfbdcd, 0x906f927c, 0x3ea9d4c3, 0x90634287, 0x3e93e950, 0x9056f6df,
01084   0x3e7dfb73, 0x904aaf86,
01085   0x3e680b2c, 0x903e6c7b, 0x3e52187f, 0x90322dbf, 0x3e3c2369, 0x9025f352,
01086   0x3e262bee, 0x9019bd36,
01087   0x3e10320d, 0x900d8b69, 0x3dfa35c8, 0x90015dee, 0x3de4371f, 0x8ff534c4,
01088   0x3dce3614, 0x8fe90fec,
01089   0x3db832a6, 0x8fdcef66, 0x3da22cd7, 0x8fd0d333, 0x3d8c24a8, 0x8fc4bb53,
01090   0x3d761a19, 0x8fb8a7c7,
01091   0x3d600d2c, 0x8fac988f, 0x3d49fde1, 0x8fa08dab, 0x3d33ec39, 0x8f94871d,
01092   0x3d1dd835, 0x8f8884e4,
01093   0x3d07c1d6, 0x8f7c8701, 0x3cf1a91c, 0x8f708d75, 0x3cdb8e09, 0x8f649840,
01094   0x3cc5709e, 0x8f58a761,
01095   0x3caf50da, 0x8f4cbadb, 0x3c992ec0, 0x8f40d2ad, 0x3c830a50, 0x8f34eed8,
01096   0x3c6ce38a, 0x8f290f5c,
01097   0x3c56ba70, 0x8f1d343a, 0x3c408f03, 0x8f115d72, 0x3c2a6142, 0x8f058b04,
01098   0x3c143130, 0x8ef9bcf2,
01099   0x3bfdfecd, 0x8eedf33b, 0x3be7ca1a, 0x8ee22de0, 0x3bd19318, 0x8ed66ce1,
01100   0x3bbb59c7, 0x8ecab040,
01101   0x3ba51e29, 0x8ebef7fb, 0x3b8ee03e, 0x8eb34415, 0x3b78a007, 0x8ea7948c,
01102   0x3b625d86, 0x8e9be963,
01103   0x3b4c18ba, 0x8e904298, 0x3b35d1a5, 0x8e84a02d, 0x3b1f8848, 0x8e790222,
01104   0x3b093ca3, 0x8e6d6877,
01105   0x3af2eeb7, 0x8e61d32e, 0x3adc9e86, 0x8e564246, 0x3ac64c0f, 0x8e4ab5bf,
01106   0x3aaff755, 0x8e3f2d9b,
01107   0x3a99a057, 0x8e33a9da, 0x3a834717, 0x8e282a7b, 0x3a6ceb96, 0x8e1caf80,
01108   0x3a568dd4, 0x8e1138ea,
01109   0x3a402dd2, 0x8e05c6b7, 0x3a29cb91, 0x8dfa58ea, 0x3a136712, 0x8deeef82,
01110   0x39fd0056, 0x8de38a80,
01111   0x39e6975e, 0x8dd829e4, 0x39d02c2a, 0x8dcccdaf, 0x39b9bebc, 0x8dc175e0,
01112   0x39a34f13, 0x8db6227a,
01113   0x398cdd32, 0x8daad37b, 0x39766919, 0x8d9f88e5, 0x395ff2c9, 0x8d9442b8,
01114   0x39497a43, 0x8d8900f3,
01115   0x3932ff87, 0x8d7dc399, 0x391c8297, 0x8d728aa9, 0x39060373, 0x8d675623,
01116   0x38ef821c, 0x8d5c2609,
01117   0x38d8fe93, 0x8d50fa59, 0x38c278d9, 0x8d45d316, 0x38abf0ef, 0x8d3ab03f,
01118   0x389566d6, 0x8d2f91d5,
01119   0x387eda8e, 0x8d2477d8, 0x38684c19, 0x8d196249, 0x3851bb77, 0x8d0e5127,
01120   0x383b28a9, 0x8d034474,
01121   0x382493b0, 0x8cf83c30, 0x380dfc8d, 0x8ced385b, 0x37f76341, 0x8ce238f6,
01122   0x37e0c7cc, 0x8cd73e01,
01123   0x37ca2a30, 0x8ccc477d, 0x37b38a6d, 0x8cc1556a, 0x379ce885, 0x8cb667c8,
01124   0x37864477, 0x8cab7e98,
01125   0x376f9e46, 0x8ca099da, 0x3758f5f2, 0x8c95b98f, 0x37424b7b, 0x8c8addb7,
01126   0x372b9ee3, 0x8c800652,
01127   0x3714f02a, 0x8c753362, 0x36fe3f52, 0x8c6a64e5, 0x36e78c5b, 0x8c5f9ade,
01128   0x36d0d746, 0x8c54d54c,
01129   0x36ba2014, 0x8c4a142f, 0x36a366c6, 0x8c3f5788, 0x368cab5c, 0x8c349f58,
01130   0x3675edd9, 0x8c29eb9f,
01131   0x365f2e3b, 0x8c1f3c5d, 0x36486c86, 0x8c149192, 0x3631a8b8, 0x8c09eb40,
01132   0x361ae2d3, 0x8bff4966,
01133   0x36041ad9, 0x8bf4ac05, 0x35ed50c9, 0x8bea131e, 0x35d684a6, 0x8bdf7eb0,
01134   0x35bfb66e, 0x8bd4eebc,
01135   0x35a8e625, 0x8bca6343, 0x359213c9, 0x8bbfdc44, 0x357b3f5d, 0x8bb559c1,
01136   0x356468e2, 0x8baadbba,
01137   0x354d9057, 0x8ba0622f, 0x3536b5be, 0x8b95ed21, 0x351fd918, 0x8b8b7c8f,
01138   0x3508fa66, 0x8b81107b,
01139   0x34f219a8, 0x8b76a8e4, 0x34db36df, 0x8b6c45cc, 0x34c4520d, 0x8b61e733,
01140   0x34ad6b32, 0x8b578d18,
01141   0x34968250, 0x8b4d377c, 0x347f9766, 0x8b42e661, 0x3468aa76, 0x8b3899c6,
01142   0x3451bb81, 0x8b2e51ab,
01143   0x343aca87, 0x8b240e11, 0x3423d78a, 0x8b19cef8, 0x340ce28b, 0x8b0f9462,
01144   0x33f5eb89, 0x8b055e4d,
01145   0x33def287, 0x8afb2cbb, 0x33c7f785, 0x8af0ffac, 0x33b0fa84, 0x8ae6d720,
01146   0x3399fb85, 0x8adcb318,
01147   0x3382fa88, 0x8ad29394, 0x336bf78f, 0x8ac87894, 0x3354f29b, 0x8abe6219,
01148   0x333debab, 0x8ab45024,
01149   0x3326e2c3, 0x8aaa42b4, 0x330fd7e1, 0x8aa039cb, 0x32f8cb07, 0x8a963567,
01150   0x32e1bc36, 0x8a8c358b,
01151   0x32caab6f, 0x8a823a36, 0x32b398b3, 0x8a784368, 0x329c8402, 0x8a6e5123,
01152   0x32856d5e, 0x8a646365,
01153   0x326e54c7, 0x8a5a7a31, 0x32573a3f, 0x8a509585, 0x32401dc6, 0x8a46b564,
01154   0x3228ff5c, 0x8a3cd9cc,
01155   0x3211df04, 0x8a3302be, 0x31fabcbd, 0x8a29303b, 0x31e39889, 0x8a1f6243,
01156   0x31cc7269, 0x8a1598d6,
01157   0x31b54a5e, 0x8a0bd3f5, 0x319e2067, 0x8a0213a0, 0x3186f487, 0x89f857d8,
01158   0x316fc6be, 0x89eea09d,
01159   0x3158970e, 0x89e4edef, 0x31416576, 0x89db3fcf, 0x312a31f8, 0x89d1963c,
01160   0x3112fc95, 0x89c7f138,
01161   0x30fbc54d, 0x89be50c3, 0x30e48c22, 0x89b4b4dd, 0x30cd5115, 0x89ab1d87,
01162   0x30b61426, 0x89a18ac0,
01163   0x309ed556, 0x8997fc8a, 0x308794a6, 0x898e72e4, 0x30705217, 0x8984edcf,
01164   0x30590dab, 0x897b6d4c,
01165   0x3041c761, 0x8971f15a, 0x302a7f3a, 0x896879fb, 0x30133539, 0x895f072e,
01166   0x2ffbe95d, 0x895598f3,
01167   0x2fe49ba7, 0x894c2f4c, 0x2fcd4c19, 0x8942ca39, 0x2fb5fab2, 0x893969b9,
01168   0x2f9ea775, 0x89300dce,
01169   0x2f875262, 0x8926b677, 0x2f6ffb7a, 0x891d63b5, 0x2f58a2be, 0x89141589,
01170   0x2f41482e, 0x890acbf2,
01171   0x2f29ebcc, 0x890186f2, 0x2f128d99, 0x88f84687, 0x2efb2d95, 0x88ef0ab4,
01172   0x2ee3cbc1, 0x88e5d378,
01173   0x2ecc681e, 0x88dca0d3, 0x2eb502ae, 0x88d372c6, 0x2e9d9b70, 0x88ca4951,
01174   0x2e863267, 0x88c12475,
01175   0x2e6ec792, 0x88b80432, 0x2e575af3, 0x88aee888, 0x2e3fec8b, 0x88a5d177,
01176   0x2e287c5a, 0x889cbf01,
01177   0x2e110a62, 0x8893b125, 0x2df996a3, 0x888aa7e3, 0x2de2211e, 0x8881a33d,
01178   0x2dcaa9d5, 0x8878a332,
01179   0x2db330c7, 0x886fa7c2, 0x2d9bb5f6, 0x8866b0ef, 0x2d843964, 0x885dbeb8,
01180   0x2d6cbb10, 0x8854d11e,
01181   0x2d553afc, 0x884be821, 0x2d3db928, 0x884303c1, 0x2d263596, 0x883a23ff,
01182   0x2d0eb046, 0x883148db,
01183   0x2cf72939, 0x88287256, 0x2cdfa071, 0x881fa06f, 0x2cc815ee, 0x8816d327,
01184   0x2cb089b1, 0x880e0a7f,
01185   0x2c98fbba, 0x88054677, 0x2c816c0c, 0x87fc870f, 0x2c69daa6, 0x87f3cc48,
01186   0x2c52478a, 0x87eb1621,
01187   0x2c3ab2b9, 0x87e2649b, 0x2c231c33, 0x87d9b7b7, 0x2c0b83fa, 0x87d10f75,
01188   0x2bf3ea0d, 0x87c86bd5,
01189   0x2bdc4e6f, 0x87bfccd7, 0x2bc4b120, 0x87b7327d, 0x2bad1221, 0x87ae9cc5,
01190   0x2b957173, 0x87a60bb1,
01191   0x2b7dcf17, 0x879d7f41, 0x2b662b0e, 0x8794f774, 0x2b4e8558, 0x878c744d,
01192   0x2b36ddf7, 0x8783f5ca,
01193   0x2b1f34eb, 0x877b7bec, 0x2b078a36, 0x877306b4, 0x2aefddd8, 0x876a9621,
01194   0x2ad82fd2, 0x87622a35,
01195   0x2ac08026, 0x8759c2ef, 0x2aa8ced3, 0x87516050, 0x2a911bdc, 0x87490258,
01196   0x2a796740, 0x8740a907,
01197   0x2a61b101, 0x8738545e, 0x2a49f920, 0x8730045d, 0x2a323f9e, 0x8727b905,
01198   0x2a1a847b, 0x871f7255,
01199   0x2a02c7b8, 0x8717304e, 0x29eb0957, 0x870ef2f1, 0x29d34958, 0x8706ba3d,
01200   0x29bb87bc, 0x86fe8633,
01201   0x29a3c485, 0x86f656d3, 0x298bffb2, 0x86ee2c1e, 0x29743946, 0x86e60614,
01202   0x295c7140, 0x86dde4b5,
01203   0x2944a7a2, 0x86d5c802, 0x292cdc6d, 0x86cdaffa, 0x29150fa1, 0x86c59c9f,
01204   0x28fd4140, 0x86bd8df0,
01205   0x28e5714b, 0x86b583ee, 0x28cd9fc1, 0x86ad7e99, 0x28b5cca5, 0x86a57df2,
01206   0x289df7f8, 0x869d81f8,
01207   0x288621b9, 0x86958aac, 0x286e49ea, 0x868d980e, 0x2856708d, 0x8685aa20,
01208   0x283e95a1, 0x867dc0e0,
01209   0x2826b928, 0x8675dc4f, 0x280edb23, 0x866dfc6e, 0x27f6fb92, 0x8666213c,
01210   0x27df1a77, 0x865e4abb,
01211   0x27c737d3, 0x865678eb, 0x27af53a6, 0x864eabcb, 0x27976df1, 0x8646e35c,
01212   0x277f86b5, 0x863f1f9e,
01213   0x27679df4, 0x86376092, 0x274fb3ae, 0x862fa638, 0x2737c7e3, 0x8627f091,
01214   0x271fda96, 0x86203f9c,
01215   0x2707ebc7, 0x86189359, 0x26effb76, 0x8610ebca, 0x26d809a5, 0x860948ef,
01216   0x26c01655, 0x8601aac7,
01217   0x26a82186, 0x85fa1153, 0x26902b39, 0x85f27c93, 0x26783370, 0x85eaec88,
01218   0x26603a2c, 0x85e36132,
01219   0x26483f6c, 0x85dbda91, 0x26304333, 0x85d458a6, 0x26184581, 0x85ccdb70,
01220   0x26004657, 0x85c562f1,
01221   0x25e845b6, 0x85bdef28, 0x25d0439f, 0x85b68015, 0x25b84012, 0x85af15b9,
01222   0x25a03b11, 0x85a7b015,
01223   0x2588349d, 0x85a04f28, 0x25702cb7, 0x8598f2f3, 0x2558235f, 0x85919b76,
01224   0x25401896, 0x858a48b1,
01225   0x25280c5e, 0x8582faa5, 0x250ffeb7, 0x857bb152, 0x24f7efa2, 0x85746cb8,
01226   0x24dfdf20, 0x856d2cd7,
01227   0x24c7cd33, 0x8565f1b0, 0x24afb9da, 0x855ebb44, 0x2497a517, 0x85578991,
01228   0x247f8eec, 0x85505c99,
01229   0x24677758, 0x8549345c, 0x244f5e5c, 0x854210db, 0x243743fa, 0x853af214,
01230   0x241f2833, 0x8533d809,
01231   0x24070b08, 0x852cc2bb, 0x23eeec78, 0x8525b228, 0x23d6cc87, 0x851ea652,
01232   0x23beab33, 0x85179f39,
01233   0x23a6887f, 0x85109cdd, 0x238e646a, 0x85099f3e, 0x23763ef7, 0x8502a65c,
01234   0x235e1826, 0x84fbb239,
01235   0x2345eff8, 0x84f4c2d4, 0x232dc66d, 0x84edd82d, 0x23159b88, 0x84e6f244,
01236   0x22fd6f48, 0x84e0111b,
01237   0x22e541af, 0x84d934b1, 0x22cd12bd, 0x84d25d06, 0x22b4e274, 0x84cb8a1b,
01238   0x229cb0d5, 0x84c4bbf0,
01239   0x22847de0, 0x84bdf286, 0x226c4996, 0x84b72ddb, 0x225413f8, 0x84b06df2,
01240   0x223bdd08, 0x84a9b2ca,
01241   0x2223a4c5, 0x84a2fc62, 0x220b6b32, 0x849c4abd, 0x21f3304f, 0x84959dd9,
01242   0x21daf41d, 0x848ef5b7,
01243   0x21c2b69c, 0x84885258, 0x21aa77cf, 0x8481b3bb, 0x219237b5, 0x847b19e1,
01244   0x2179f64f, 0x847484ca,
01245   0x2161b3a0, 0x846df477, 0x21496fa7, 0x846768e7, 0x21312a65, 0x8460e21a,
01246   0x2118e3dc, 0x845a6012,
01247   0x21009c0c, 0x8453e2cf, 0x20e852f6, 0x844d6a50, 0x20d0089c, 0x8446f695,
01248   0x20b7bcfe, 0x844087a0,
01249   0x209f701c, 0x843a1d70, 0x208721f9, 0x8433b806, 0x206ed295, 0x842d5762,
01250   0x205681f1, 0x8426fb84,
01251   0x203e300d, 0x8420a46c, 0x2025dcec, 0x841a521a, 0x200d888d, 0x84140490,
01252   0x1ff532f2, 0x840dbbcc,
01253   0x1fdcdc1b, 0x840777d0, 0x1fc4840a, 0x8401389b, 0x1fac2abf, 0x83fafe2e,
01254   0x1f93d03c, 0x83f4c889,
01255   0x1f7b7481, 0x83ee97ad, 0x1f63178f, 0x83e86b99, 0x1f4ab968, 0x83e2444d,
01256   0x1f325a0b, 0x83dc21cb,
01257   0x1f19f97b, 0x83d60412, 0x1f0197b8, 0x83cfeb22, 0x1ee934c3, 0x83c9d6fc,
01258   0x1ed0d09d, 0x83c3c7a0,
01259   0x1eb86b46, 0x83bdbd0e, 0x1ea004c1, 0x83b7b746, 0x1e879d0d, 0x83b1b649,
01260   0x1e6f342c, 0x83abba17,
01261   0x1e56ca1e, 0x83a5c2b0, 0x1e3e5ee5, 0x839fd014, 0x1e25f282, 0x8399e244,
01262   0x1e0d84f5, 0x8393f940,
01263   0x1df5163f, 0x838e1507, 0x1ddca662, 0x8388359b, 0x1dc4355e, 0x83825afb,
01264   0x1dabc334, 0x837c8528,
01265   0x1d934fe5, 0x8376b422, 0x1d7adb73, 0x8370e7e9, 0x1d6265dd, 0x836b207d,
01266   0x1d49ef26, 0x83655ddf,
01267   0x1d31774d, 0x835fa00f, 0x1d18fe54, 0x8359e70d, 0x1d00843d, 0x835432d8,
01268   0x1ce80906, 0x834e8373,
01269   0x1ccf8cb3, 0x8348d8dc, 0x1cb70f43, 0x83433314, 0x1c9e90b8, 0x833d921b,
01270   0x1c861113, 0x8337f5f1,
01271   0x1c6d9053, 0x83325e97, 0x1c550e7c, 0x832ccc0d, 0x1c3c8b8c, 0x83273e52,
01272   0x1c240786, 0x8321b568,
01273   0x1c0b826a, 0x831c314e, 0x1bf2fc3a, 0x8316b205, 0x1bda74f6, 0x8311378d,
01274   0x1bc1ec9e, 0x830bc1e6,
01275   0x1ba96335, 0x83065110, 0x1b90d8bb, 0x8300e50b, 0x1b784d30, 0x82fb7dd8,
01276   0x1b5fc097, 0x82f61b77,
01277   0x1b4732ef, 0x82f0bde8, 0x1b2ea43a, 0x82eb652b, 0x1b161479, 0x82e61141,
01278   0x1afd83ad, 0x82e0c22a,
01279   0x1ae4f1d6, 0x82db77e5, 0x1acc5ef6, 0x82d63274, 0x1ab3cb0d, 0x82d0f1d5,
01280   0x1a9b361d, 0x82cbb60b,
01281   0x1a82a026, 0x82c67f14, 0x1a6a0929, 0x82c14cf1, 0x1a517128, 0x82bc1fa2,
01282   0x1a38d823, 0x82b6f727,
01283   0x1a203e1b, 0x82b1d381, 0x1a07a311, 0x82acb4b0, 0x19ef0707, 0x82a79ab3,
01284   0x19d669fc, 0x82a2858c,
01285   0x19bdcbf3, 0x829d753a, 0x19a52ceb, 0x829869be, 0x198c8ce7, 0x82936317,
01286   0x1973ebe6, 0x828e6146,
01287   0x195b49ea, 0x8289644b, 0x1942a6f3, 0x82846c26, 0x192a0304, 0x827f78d8,
01288   0x19115e1c, 0x827a8a61,
01289   0x18f8b83c, 0x8275a0c0, 0x18e01167, 0x8270bbf7, 0x18c7699b, 0x826bdc04,
01290   0x18aec0db, 0x826700e9,
01291   0x18961728, 0x82622aa6, 0x187d6c82, 0x825d593a, 0x1864c0ea, 0x82588ca7,
01292   0x184c1461, 0x8253c4eb,
01293   0x183366e9, 0x824f0208, 0x181ab881, 0x824a43fe, 0x1802092c, 0x82458acc,
01294   0x17e958ea, 0x8240d673,
01295   0x17d0a7bc, 0x823c26f3, 0x17b7f5a3, 0x82377c4c, 0x179f429f, 0x8232d67f,
01296   0x17868eb3, 0x822e358b,
01297   0x176dd9de, 0x82299971, 0x17552422, 0x82250232, 0x173c6d80, 0x82206fcc,
01298   0x1723b5f9, 0x821be240,
01299   0x170afd8d, 0x82175990, 0x16f2443e, 0x8212d5b9, 0x16d98a0c, 0x820e56be,
01300   0x16c0cef9, 0x8209dc9e,
01301   0x16a81305, 0x82056758, 0x168f5632, 0x8200f6ef, 0x1676987f, 0x81fc8b60,
01302   0x165dd9f0, 0x81f824ae,
01303   0x16451a83, 0x81f3c2d7, 0x162c5a3b, 0x81ef65dc, 0x16139918, 0x81eb0dbe,
01304   0x15fad71b, 0x81e6ba7c,
01305   0x15e21445, 0x81e26c16, 0x15c95097, 0x81de228d, 0x15b08c12, 0x81d9dde1,
01306   0x1597c6b7, 0x81d59e13,
01307   0x157f0086, 0x81d16321, 0x15663982, 0x81cd2d0c, 0x154d71aa, 0x81c8fbd6,
01308   0x1534a901, 0x81c4cf7d,
01309   0x151bdf86, 0x81c0a801, 0x1503153a, 0x81bc8564, 0x14ea4a1f, 0x81b867a5,
01310   0x14d17e36, 0x81b44ec4,
01311   0x14b8b17f, 0x81b03ac2, 0x149fe3fc, 0x81ac2b9e, 0x148715ae, 0x81a82159,
01312   0x146e4694, 0x81a41bf4,
01313   0x145576b1, 0x81a01b6d, 0x143ca605, 0x819c1fc5, 0x1423d492, 0x819828fd,
01314   0x140b0258, 0x81943715,
01315   0x13f22f58, 0x81904a0c, 0x13d95b93, 0x818c61e3, 0x13c0870a, 0x81887e9a,
01316   0x13a7b1bf, 0x8184a032,
01317   0x138edbb1, 0x8180c6a9, 0x137604e2, 0x817cf201, 0x135d2d53, 0x8179223a,
01318   0x13445505, 0x81755754,
01319   0x132b7bf9, 0x8171914e, 0x1312a230, 0x816dd02a, 0x12f9c7aa, 0x816a13e6,
01320   0x12e0ec6a, 0x81665c84,
01321   0x12c8106f, 0x8162aa04, 0x12af33ba, 0x815efc65, 0x1296564d, 0x815b53a8,
01322   0x127d7829, 0x8157afcd,
01323   0x1264994e, 0x815410d4, 0x124bb9be, 0x815076bd, 0x1232d979, 0x814ce188,
01324   0x1219f880, 0x81495136,
01325   0x120116d5, 0x8145c5c7, 0x11e83478, 0x81423f3a, 0x11cf516a, 0x813ebd90,
01326   0x11b66dad, 0x813b40ca,
01327   0x119d8941, 0x8137c8e6, 0x1184a427, 0x813455e6, 0x116bbe60, 0x8130e7c9,
01328   0x1152d7ed, 0x812d7e8f,
01329   0x1139f0cf, 0x812a1a3a, 0x11210907, 0x8126bac8, 0x11082096, 0x8123603a,
01330   0x10ef377d, 0x81200a90,
01331   0x10d64dbd, 0x811cb9ca, 0x10bd6356, 0x81196de9, 0x10a4784b, 0x811626ec,
01332   0x108b8c9b, 0x8112e4d4,
01333   0x1072a048, 0x810fa7a0, 0x1059b352, 0x810c6f52, 0x1040c5bb, 0x81093be8,
01334   0x1027d784, 0x81060d63,
01335   0x100ee8ad, 0x8102e3c4, 0xff5f938, 0x80ffbf0a, 0xfdd0926, 0x80fc9f35,
01336   0xfc41876, 0x80f98446,
01337   0xfab272b, 0x80f66e3c, 0xf923546, 0x80f35d19, 0xf7942c7, 0x80f050db,
01338   0xf604faf, 0x80ed4984,
01339   0xf475bff, 0x80ea4712, 0xf2e67b8, 0x80e74987, 0xf1572dc, 0x80e450e2,
01340   0xefc7d6b, 0x80e15d24,
01341   0xee38766, 0x80de6e4c, 0xeca90ce, 0x80db845b, 0xeb199a4, 0x80d89f51,
01342   0xe98a1e9, 0x80d5bf2e,
01343   0xe7fa99e, 0x80d2e3f2, 0xe66b0c3, 0x80d00d9d, 0xe4db75b, 0x80cd3c2f,
01344   0xe34bd66, 0x80ca6fa9,
01345   0xe1bc2e4, 0x80c7a80a, 0xe02c7d7, 0x80c4e553, 0xde9cc40, 0x80c22784,
01346   0xdd0d01f, 0x80bf6e9c,
01347   0xdb7d376, 0x80bcba9d, 0xd9ed646, 0x80ba0b85, 0xd85d88f, 0x80b76156,
01348   0xd6cda53, 0x80b4bc0e,
01349   0xd53db92, 0x80b21baf, 0xd3adc4e, 0x80af8039, 0xd21dc87, 0x80ace9ab,
01350   0xd08dc3f, 0x80aa5806,
01351   0xcefdb76, 0x80a7cb49, 0xcd6da2d, 0x80a54376, 0xcbdd865, 0x80a2c08b,
01352   0xca4d620, 0x80a04289,
01353   0xc8bd35e, 0x809dc971, 0xc72d020, 0x809b5541, 0xc59cc68, 0x8098e5fb,
01354   0xc40c835, 0x80967b9f,
01355   0xc27c389, 0x8094162c, 0xc0ebe66, 0x8091b5a2, 0xbf5b8cb, 0x808f5a02,
01356   0xbdcb2bb, 0x808d034c,
01357   0xbc3ac35, 0x808ab180, 0xbaaa53b, 0x8088649e, 0xb919dcf, 0x80861ca6,
01358   0xb7895f0, 0x8083d998,
01359   0xb5f8d9f, 0x80819b74, 0xb4684df, 0x807f623b, 0xb2d7baf, 0x807d2dec,
01360   0xb147211, 0x807afe87,
01361   0xafb6805, 0x8078d40d, 0xae25d8d, 0x8076ae7e, 0xac952aa, 0x80748dd9,
01362   0xab0475c, 0x8072721f,
01363   0xa973ba5, 0x80705b50, 0xa7e2f85, 0x806e496c, 0xa6522fe, 0x806c3c74,
01364   0xa4c1610, 0x806a3466,
01365   0xa3308bd, 0x80683143, 0xa19fb04, 0x8066330c, 0xa00ece8, 0x806439c0,
01366   0x9e7de6a, 0x80624560,
01367   0x9cecf89, 0x806055eb, 0x9b5c048, 0x805e6b62, 0x99cb0a7, 0x805c85c4,
01368   0x983a0a7, 0x805aa512,
01369   0x96a9049, 0x8058c94c, 0x9517f8f, 0x8056f272, 0x9386e78, 0x80552084,
01370   0x91f5d06, 0x80535381,
01371   0x9064b3a, 0x80518b6b, 0x8ed3916, 0x804fc841, 0x8d42699, 0x804e0a04,
01372   0x8bb13c5, 0x804c50b2,
01373   0x8a2009a, 0x804a9c4d, 0x888ed1b, 0x8048ecd5, 0x86fd947, 0x80474248,
01374   0x856c520, 0x80459ca9,
01375   0x83db0a7, 0x8043fbf6, 0x8249bdd, 0x80426030, 0x80b86c2, 0x8040c956,
01376   0x7f27157, 0x803f376a,
01377   0x7d95b9e, 0x803daa6a, 0x7c04598, 0x803c2257, 0x7a72f45, 0x803a9f31,
01378   0x78e18a7, 0x803920f8,
01379   0x77501be, 0x8037a7ac, 0x75bea8c, 0x8036334e, 0x742d311, 0x8034c3dd,
01380   0x729bb4e, 0x80335959,
01381   0x710a345, 0x8031f3c2, 0x6f78af6, 0x80309318, 0x6de7262, 0x802f375d,
01382   0x6c5598a, 0x802de08e,
01383   0x6ac406f, 0x802c8ead, 0x6932713, 0x802b41ba, 0x67a0d76, 0x8029f9b4,
01384   0x660f398, 0x8028b69c,
01385   0x647d97c, 0x80277872, 0x62ebf22, 0x80263f36, 0x615a48b, 0x80250ae7,
01386   0x5fc89b8, 0x8023db86,
01387   0x5e36ea9, 0x8022b114, 0x5ca5361, 0x80218b8f, 0x5b137df, 0x80206af8,
01388   0x5981c26, 0x801f4f4f,
01389   0x57f0035, 0x801e3895, 0x565e40d, 0x801d26c8, 0x54cc7b1, 0x801c19ea,
01390   0x533ab20, 0x801b11fa,
01391   0x51a8e5c, 0x801a0ef8, 0x5017165, 0x801910e4, 0x4e8543e, 0x801817bf,
01392   0x4cf36e5, 0x80172388,
01393   0x4b6195d, 0x80163440, 0x49cfba7, 0x801549e6, 0x483ddc3, 0x8014647b,
01394   0x46abfb3, 0x801383fe,
01395   0x451a177, 0x8012a86f, 0x4388310, 0x8011d1d0, 0x41f6480, 0x8011001f,
01396   0x40645c7, 0x8010335c,
01397   0x3ed26e6, 0x800f6b88, 0x3d407df, 0x800ea8a3, 0x3bae8b2, 0x800deaad,
01398   0x3a1c960, 0x800d31a5,
01399   0x388a9ea, 0x800c7d8c, 0x36f8a51, 0x800bce63, 0x3566a96, 0x800b2427,
01400   0x33d4abb, 0x800a7edb,
01401   0x3242abf, 0x8009de7e, 0x30b0aa4, 0x80094310, 0x2f1ea6c, 0x8008ac90,
01402   0x2d8ca16, 0x80081b00,
01403   0x2bfa9a4, 0x80078e5e, 0x2a68917, 0x800706ac, 0x28d6870, 0x800683e8,
01404   0x27447b0, 0x80060614,
01405   0x25b26d7, 0x80058d2f, 0x24205e8, 0x80051939, 0x228e4e2, 0x8004aa32,
01406   0x20fc3c6, 0x8004401a,
01407   0x1f6a297, 0x8003daf1, 0x1dd8154, 0x80037ab7, 0x1c45ffe, 0x80031f6d,
01408   0x1ab3e97, 0x8002c912,
01409   0x1921d20, 0x800277a6, 0x178fb99, 0x80022b29, 0x15fda03, 0x8001e39b,
01410   0x146b860, 0x8001a0fd,
01411   0x12d96b1, 0x8001634e, 0x11474f6, 0x80012a8e, 0xfb5330, 0x8000f6bd,
01412   0xe23160, 0x8000c7dc,
01413   0xc90f88, 0x80009dea, 0xafeda8, 0x800078e7, 0x96cbc1, 0x800058d4, 0x7da9d4,
01414   0x80003daf,
01415   0x6487e3, 0x8000277a, 0x4b65ee, 0x80001635, 0x3243f5, 0x800009df, 0x1921fb,
01416   0x80000278,
01417 };
01418
01436 static const q31_t cos_factorsQ31_128[128] = {
01437   0x7fff6216, 0x7ffa72d1, 0x7ff09478, 0x7fe1c76b, 0x7fce0c3e, 0x7fb563b3,
01438   0x7f97cebd, 0x7f754e80,
01439   0x7f4de451, 0x7f2191b4, 0x7ef05860, 0x7eba3a39, 0x7e7f3957, 0x7e3f57ff,
01440   0x7dfa98a8, 0x7db0fdf8,
01441   0x7d628ac6, 0x7d0f4218, 0x7cb72724, 0x7c5a3d50, 0x7bf88830, 0x7b920b89,
01442   0x7b26cb4f, 0x7ab6cba4,
01443   0x7a4210d8, 0x79c89f6e, 0x794a7c12, 0x78c7aba2, 0x78403329, 0x77b417df,
01444   0x77235f2d, 0x768e0ea6,
01445   0x75f42c0b, 0x7555bd4c, 0x74b2c884, 0x740b53fb, 0x735f6626, 0x72af05a7,
01446   0x71fa3949, 0x71410805,
01447   0x708378ff, 0x6fc19385, 0x6efb5f12, 0x6e30e34a, 0x6d6227fa, 0x6c8f351c,
01448   0x6bb812d1, 0x6adcc964,
01449   0x69fd614a, 0x6919e320, 0x683257ab, 0x6746c7d8, 0x66573cbb, 0x6563bf92,
01450   0x646c59bf, 0x637114cc,
01451   0x6271fa69, 0x616f146c, 0x60686ccf, 0x5f5e0db3, 0x5e50015d, 0x5d3e5237,
01452   0x5c290acc, 0x5b1035cf,
01453   0x59f3de12, 0x58d40e8c, 0x57b0d256, 0x568a34a9, 0x556040e2, 0x5433027d,
01454   0x53028518, 0x51ced46e,
01455   0x5097fc5e, 0x4f5e08e3, 0x4e210617, 0x4ce10034, 0x4b9e0390, 0x4a581c9e,
01456   0x490f57ee, 0x47c3c22f,
01457   0x46756828, 0x452456bd, 0x43d09aed, 0x427a41d0, 0x4121589b, 0x3fc5ec98,
01458   0x3e680b2c, 0x3d07c1d6,
01459   0x3ba51e29, 0x3a402dd2, 0x38d8fe93, 0x376f9e46, 0x36041ad9, 0x34968250,
01460   0x3326e2c3, 0x31b54a5e,
01461   0x3041c761, 0x2ecc681e, 0x2d553afc, 0x2bdc4e6f, 0x2a61b101, 0x28e5714b,
01462   0x27679df4, 0x25e845b6,
01463   0x24677758, 0x22e541af, 0x2161b3a0, 0x1fdcdc1b, 0x1e56ca1e, 0x1ccf8cb3,
01464   0x1b4732ef, 0x19bdcbf3,
01465   0x183366e9, 0x16a81305, 0x151bdf86, 0x138edbb1, 0x120116d5, 0x1072a048,
01466   0xee38766, 0xd53db92,
01467   0xbc3ac35, 0xa3308bd, 0x8a2009a, 0x710a345, 0x57f0035, 0x3ed26e6, 0x25b26d7,
01468   0xc90f88,
01469 };
01470
01471 static const q31_t cos_factorsQ31_512[512] = {
01472   0x7ffff621, 0x7fffa72c, 0x7fff0943, 0x7ffe1c65, 0x7ffce093, 0x7ffb55ce,
01473   0x7ff97c18, 0x7ff75370,
01474   0x7ff4dbd9, 0x7ff21553, 0x7feeffe1, 0x7feb9b85, 0x7fe7e841, 0x7fe3e616,
01475   0x7fdf9508, 0x7fdaf519,
01476   0x7fd6064c, 0x7fd0c8a3, 0x7fcb3c23, 0x7fc560cf, 0x7fbf36aa, 0x7fb8bdb8,
01477   0x7fb1f5fc, 0x7faadf7c,
01478   0x7fa37a3c, 0x7f9bc640, 0x7f93c38c, 0x7f8b7227, 0x7f82d214, 0x7f79e35a,
01479   0x7f70a5fe, 0x7f671a05,
01480   0x7f5d3f75, 0x7f531655, 0x7f489eaa, 0x7f3dd87c, 0x7f32c3d1, 0x7f2760af,
01481   0x7f1baf1e, 0x7f0faf25,
01482   0x7f0360cb, 0x7ef6c418, 0x7ee9d914, 0x7edc9fc6, 0x7ecf1837, 0x7ec14270,
01483   0x7eb31e78, 0x7ea4ac58,
01484   0x7e95ec1a, 0x7e86ddc6, 0x7e778166, 0x7e67d703, 0x7e57dea7, 0x7e47985b,
01485   0x7e37042a, 0x7e26221f,
01486   0x7e14f242, 0x7e0374a0, 0x7df1a942, 0x7ddf9034, 0x7dcd2981, 0x7dba7534,
01487   0x7da77359, 0x7d9423fc,
01488   0x7d808728, 0x7d6c9ce9, 0x7d58654d, 0x7d43e05e, 0x7d2f0e2b, 0x7d19eebf,
01489   0x7d048228, 0x7ceec873,
01490   0x7cd8c1ae, 0x7cc26de5, 0x7cabcd28, 0x7c94df83, 0x7c7da505, 0x7c661dbc,
01491   0x7c4e49b7, 0x7c362904,
01492   0x7c1dbbb3, 0x7c0501d2, 0x7bebfb70, 0x7bd2a89e, 0x7bb9096b, 0x7b9f1de6,
01493   0x7b84e61f, 0x7b6a6227,
01494   0x7b4f920e, 0x7b3475e5, 0x7b190dbc, 0x7afd59a4, 0x7ae159ae, 0x7ac50dec,
01495   0x7aa8766f, 0x7a8b9348,
01496   0x7a6e648a, 0x7a50ea47, 0x7a332490, 0x7a151378, 0x79f6b711, 0x79d80f6f,
01497   0x79b91ca4, 0x7999dec4,
01498   0x797a55e0, 0x795a820e, 0x793a6361, 0x7919f9ec, 0x78f945c3, 0x78d846fb,
01499   0x78b6fda8, 0x789569df,
01500   0x78738bb3, 0x7851633b, 0x782ef08b, 0x780c33b8, 0x77e92cd9, 0x77c5dc01,
01501   0x77a24148, 0x777e5cc3,
01502   0x775a2e89, 0x7735b6af, 0x7710f54c, 0x76ebea77, 0x76c69647, 0x76a0f8d2,
01503   0x767b1231, 0x7654e279,
01504   0x762e69c4, 0x7607a828, 0x75e09dbd, 0x75b94a9c, 0x7591aedd, 0x7569ca99,
01505   0x75419de7, 0x751928e0,
01506   0x74f06b9e, 0x74c7663a, 0x749e18cd, 0x74748371, 0x744aa63f, 0x74208150,
01507   0x73f614c0, 0x73cb60a8,
01508   0x73a06522, 0x73752249, 0x73499838, 0x731dc70a, 0x72f1aed9, 0x72c54fc1,
01509   0x7298a9dd, 0x726bbd48,
01510   0x723e8a20, 0x7211107e, 0x71e35080, 0x71b54a41, 0x7186fdde, 0x71586b74,
01511   0x7129931f, 0x70fa74fc,
01512   0x70cb1128, 0x709b67c0, 0x706b78e3, 0x703b44ad, 0x700acb3c, 0x6fda0cae,
01513   0x6fa90921, 0x6f77c0b3,
01514   0x6f463383, 0x6f1461b0, 0x6ee24b57, 0x6eaff099, 0x6e7d5193, 0x6e4a6e66,
01515   0x6e174730, 0x6de3dc11,
01516   0x6db02d29, 0x6d7c3a98, 0x6d48047e, 0x6d138afb, 0x6cdece2f, 0x6ca9ce3b,
01517   0x6c748b3f, 0x6c3f055d,
01518   0x6c093cb6, 0x6bd3316a, 0x6b9ce39b, 0x6b66536b, 0x6b2f80fb, 0x6af86c6c,
01519   0x6ac115e2, 0x6a897d7d,
01520   0x6a51a361, 0x6a1987b0, 0x69e12a8c, 0x69a88c19, 0x696fac78, 0x69368bce,
01521   0x68fd2a3d, 0x68c387e9,
01522   0x6889a4f6, 0x684f8186, 0x68151dbe, 0x67da79c3, 0x679f95b7, 0x676471c0,
01523   0x67290e02, 0x66ed6aa1,
01524   0x66b187c3, 0x6675658c, 0x66390422, 0x65fc63a9, 0x65bf8447, 0x65826622,
01525   0x6545095f, 0x65076e25,
01526   0x64c99498, 0x648b7ce0, 0x644d2722, 0x640e9386, 0x63cfc231, 0x6390b34a,
01527   0x635166f9, 0x6311dd64,
01528   0x62d216b3, 0x6292130c, 0x6251d298, 0x6211557e, 0x61d09be5, 0x618fa5f7,
01529   0x614e73da, 0x610d05b7,
01530   0x60cb5bb7, 0x60897601, 0x604754bf, 0x6004f819, 0x5fc26038, 0x5f7f8d46,
01531   0x5f3c7f6b, 0x5ef936d1,
01532   0x5eb5b3a2, 0x5e71f606, 0x5e2dfe29, 0x5de9cc33, 0x5da5604f, 0x5d60baa7,
01533   0x5d1bdb65, 0x5cd6c2b5,
01534   0x5c9170bf, 0x5c4be5b0, 0x5c0621b2, 0x5bc024f0, 0x5b79ef96, 0x5b3381ce,
01535   0x5aecdbc5, 0x5aa5fda5,
01536   0x5a5ee79a, 0x5a1799d1, 0x59d01475, 0x598857b2, 0x594063b5, 0x58f838a9,
01537   0x58afd6bd, 0x58673e1b,
01538   0x581e6ef1, 0x57d5696d, 0x578c2dba, 0x5742bc06, 0x56f9147e, 0x56af3750,
01539   0x566524aa, 0x561adcb9,
01540   0x55d05faa, 0x5585adad, 0x553ac6ee, 0x54efab9c, 0x54a45be6, 0x5458d7f9,
01541   0x540d2005, 0x53c13439,
01542   0x537514c2, 0x5328c1d0, 0x52dc3b92, 0x528f8238, 0x524295f0, 0x51f576ea,
01543   0x51a82555, 0x515aa162,
01544   0x510ceb40, 0x50bf031f, 0x5070e92f, 0x50229da1, 0x4fd420a4, 0x4f857269,
01545   0x4f369320, 0x4ee782fb,
01546   0x4e984229, 0x4e48d0dd, 0x4df92f46, 0x4da95d96, 0x4d595bfe, 0x4d092ab0,
01547   0x4cb8c9dd, 0x4c6839b7,
01548   0x4c177a6e, 0x4bc68c36, 0x4b756f40, 0x4b2423be, 0x4ad2a9e2, 0x4a8101de,
01549   0x4a2f2be6, 0x49dd282a,
01550   0x498af6df, 0x49389836, 0x48e60c62, 0x48935397, 0x48406e08, 0x47ed5be6,
01551   0x479a1d67, 0x4746b2bc,
01552   0x46f31c1a, 0x469f59b4, 0x464b6bbe, 0x45f7526b, 0x45a30df0, 0x454e9e80,
01553   0x44fa0450, 0x44a53f93,
01554   0x4450507e, 0x43fb3746, 0x43a5f41e, 0x4350873c, 0x42faf0d4, 0x42a5311b,
01555   0x424f4845, 0x41f93689,
01556   0x41a2fc1a, 0x414c992f, 0x40f60dfb, 0x409f5ab6, 0x40487f94, 0x3ff17cca,
01557   0x3f9a5290, 0x3f430119,
01558   0x3eeb889c, 0x3e93e950, 0x3e3c2369, 0x3de4371f, 0x3d8c24a8, 0x3d33ec39,
01559   0x3cdb8e09, 0x3c830a50,
01560   0x3c2a6142, 0x3bd19318, 0x3b78a007, 0x3b1f8848, 0x3ac64c0f, 0x3a6ceb96,
01561   0x3a136712, 0x39b9bebc,
01562   0x395ff2c9, 0x39060373, 0x38abf0ef, 0x3851bb77, 0x37f76341, 0x379ce885,
01563   0x37424b7b, 0x36e78c5b,
01564   0x368cab5c, 0x3631a8b8, 0x35d684a6, 0x357b3f5d, 0x351fd918, 0x34c4520d,
01565   0x3468aa76, 0x340ce28b,
01566   0x33b0fa84, 0x3354f29b, 0x32f8cb07, 0x329c8402, 0x32401dc6, 0x31e39889,
01567   0x3186f487, 0x312a31f8,
01568   0x30cd5115, 0x30705217, 0x30133539, 0x2fb5fab2, 0x2f58a2be, 0x2efb2d95,
01569   0x2e9d9b70, 0x2e3fec8b,
01570   0x2de2211e, 0x2d843964, 0x2d263596, 0x2cc815ee, 0x2c69daa6, 0x2c0b83fa,
01571   0x2bad1221, 0x2b4e8558,
01572   0x2aefddd8, 0x2a911bdc, 0x2a323f9e, 0x29d34958, 0x29743946, 0x29150fa1,
01573   0x28b5cca5, 0x2856708d,
01574   0x27f6fb92, 0x27976df1, 0x2737c7e3, 0x26d809a5, 0x26783370, 0x26184581,
01575   0x25b84012, 0x2558235f,
01576   0x24f7efa2, 0x2497a517, 0x243743fa, 0x23d6cc87, 0x23763ef7, 0x23159b88,
01577   0x22b4e274, 0x225413f8,
01578   0x21f3304f, 0x219237b5, 0x21312a65, 0x20d0089c, 0x206ed295, 0x200d888d,
01579   0x1fac2abf, 0x1f4ab968,
01580   0x1ee934c3, 0x1e879d0d, 0x1e25f282, 0x1dc4355e, 0x1d6265dd, 0x1d00843d,
01581   0x1c9e90b8, 0x1c3c8b8c,
01582   0x1bda74f6, 0x1b784d30, 0x1b161479, 0x1ab3cb0d, 0x1a517128, 0x19ef0707,
01583   0x198c8ce7, 0x192a0304,
01584   0x18c7699b, 0x1864c0ea, 0x1802092c, 0x179f429f, 0x173c6d80, 0x16d98a0c,
01585   0x1676987f, 0x16139918,
01586   0x15b08c12, 0x154d71aa, 0x14ea4a1f, 0x148715ae, 0x1423d492, 0x13c0870a,
01587   0x135d2d53, 0x12f9c7aa,
01588   0x1296564d, 0x1232d979, 0x11cf516a, 0x116bbe60, 0x11082096, 0x10a4784b,
01589   0x1040c5bb, 0xfdd0926,
01590   0xf7942c7, 0xf1572dc, 0xeb199a4, 0xe4db75b, 0xde9cc40, 0xd85d88f, 0xd21dc87,
01591   0xcbdd865,
01592   0xc59cc68, 0xbf5b8cb, 0xb919dcf, 0xb2d7baf, 0xac952aa, 0xa6522fe, 0xa00ece8,
01593   0x99cb0a7,
01594   0x9386e78, 0x8d42699, 0x86fd947, 0x80b86c2, 0x7a72f45, 0x742d311, 0x6de7262,
01595   0x67a0d76,
01596   0x615a48b, 0x5b137df, 0x54cc7b1, 0x4e8543e, 0x483ddc3, 0x41f6480, 0x3bae8b2,
01597   0x3566a96,
01598   0x2f1ea6c, 0x28d6870, 0x228e4e2, 0x1c45ffe, 0x15fda03, 0xfb5330, 0x96cbc1,
01599   0x3243f5,
01600 };
01601
01602 static const q31_t cos_factorsQ31_2048[2048] = {
01603   0x7fffff62, 0x7ffffa73, 0x7ffff094, 0x7fffe1c6, 0x7fffce09, 0x7fffb55c,
01604   0x7fff97c1, 0x7fff7536,
01605   0x7fff4dbb, 0x7fff2151, 0x7ffeeff8, 0x7ffeb9b0, 0x7ffe7e79, 0x7ffe3e52,
01606   0x7ffdf93c, 0x7ffdaf37,
01607   0x7ffd6042, 0x7ffd0c5f, 0x7ffcb38c, 0x7ffc55ca, 0x7ffbf319, 0x7ffb8b78,
01608   0x7ffb1ee9, 0x7ffaad6a,
01609   0x7ffa36fc, 0x7ff9bba0, 0x7ff93b54, 0x7ff8b619, 0x7ff82bef, 0x7ff79cd6,
01610   0x7ff708ce, 0x7ff66fd7,
01611   0x7ff5d1f1, 0x7ff52f1d, 0x7ff48759, 0x7ff3daa6, 0x7ff32905, 0x7ff27275,
01612   0x7ff1b6f6, 0x7ff0f688,
01613   0x7ff0312c, 0x7fef66e1, 0x7fee97a7, 0x7fedc37e, 0x7fecea67, 0x7fec0c62,
01614   0x7feb296d, 0x7fea418b,
01615   0x7fe954ba, 0x7fe862fa, 0x7fe76c4c, 0x7fe670b0, 0x7fe57025, 0x7fe46aac,
01616   0x7fe36045, 0x7fe250ef,
01617   0x7fe13cac, 0x7fe0237a, 0x7fdf055a, 0x7fdde24d, 0x7fdcba51, 0x7fdb8d67,
01618   0x7fda5b8f, 0x7fd924ca,
01619   0x7fd7e917, 0x7fd6a875, 0x7fd562e7, 0x7fd4186a, 0x7fd2c900, 0x7fd174a8,
01620   0x7fd01b63, 0x7fcebd31,
01621   0x7fcd5a11, 0x7fcbf203, 0x7fca8508, 0x7fc91320, 0x7fc79c4b, 0x7fc62089,
01622   0x7fc49fda, 0x7fc31a3d,
01623   0x7fc18fb4, 0x7fc0003e, 0x7fbe6bdb, 0x7fbcd28b, 0x7fbb344e, 0x7fb99125,
01624   0x7fb7e90f, 0x7fb63c0d,
01625   0x7fb48a1e, 0x7fb2d343, 0x7fb1177b, 0x7faf56c7, 0x7fad9127, 0x7fabc69b,
01626   0x7fa9f723, 0x7fa822bf,
01627   0x7fa6496e, 0x7fa46b32, 0x7fa2880b, 0x7fa09ff7, 0x7f9eb2f8, 0x7f9cc10d,
01628   0x7f9aca37, 0x7f98ce76,
01629   0x7f96cdc9, 0x7f94c831, 0x7f92bdad, 0x7f90ae3f, 0x7f8e99e6, 0x7f8c80a1,
01630   0x7f8a6272, 0x7f883f58,
01631   0x7f861753, 0x7f83ea64, 0x7f81b88a, 0x7f7f81c6, 0x7f7d4617, 0x7f7b057e,
01632   0x7f78bffb, 0x7f76758e,
01633   0x7f742637, 0x7f71d1f6, 0x7f6f78cb, 0x7f6d1ab6, 0x7f6ab7b8, 0x7f684fd0,
01634   0x7f65e2ff, 0x7f637144,
01635   0x7f60faa0, 0x7f5e7f13, 0x7f5bfe9d, 0x7f59793e, 0x7f56eef5, 0x7f545fc5,
01636   0x7f51cbab, 0x7f4f32a9,
01637   0x7f4c94be, 0x7f49f1eb, 0x7f474a30, 0x7f449d8c, 0x7f41ec01, 0x7f3f358d,
01638   0x7f3c7a31, 0x7f39b9ee,
01639   0x7f36f4c3, 0x7f342ab1, 0x7f315bb7, 0x7f2e87d6, 0x7f2baf0d, 0x7f28d15d,
01640   0x7f25eec7, 0x7f230749,
01641   0x7f201ae5, 0x7f1d299a, 0x7f1a3368, 0x7f173850, 0x7f143852, 0x7f11336d,
01642   0x7f0e29a3, 0x7f0b1af2,
01643   0x7f08075c, 0x7f04eedf, 0x7f01d17d, 0x7efeaf36, 0x7efb8809, 0x7ef85bf7,
01644   0x7ef52b00, 0x7ef1f524,
01645   0x7eeeba62, 0x7eeb7abc, 0x7ee83632, 0x7ee4ecc3, 0x7ee19e6f, 0x7ede4b38,
01646   0x7edaf31c, 0x7ed7961c,
01647   0x7ed43438, 0x7ed0cd70, 0x7ecd61c5, 0x7ec9f137, 0x7ec67bc5, 0x7ec3016f,
01648   0x7ebf8237, 0x7ebbfe1c,
01649   0x7eb8751e, 0x7eb4e73d, 0x7eb1547a, 0x7eadbcd4, 0x7eaa204c, 0x7ea67ee2,
01650   0x7ea2d896, 0x7e9f2d68,
01651   0x7e9b7d58, 0x7e97c867, 0x7e940e94, 0x7e904fe0, 0x7e8c8c4b, 0x7e88c3d5,
01652   0x7e84f67e, 0x7e812447,
01653   0x7e7d4d2f, 0x7e797136, 0x7e75905d, 0x7e71aaa4, 0x7e6dc00c, 0x7e69d093,
01654   0x7e65dc3b, 0x7e61e303,
01655   0x7e5de4ec, 0x7e59e1f5, 0x7e55da20, 0x7e51cd6c, 0x7e4dbbd9, 0x7e49a567,
01656   0x7e458a17, 0x7e4169e9,
01657   0x7e3d44dd, 0x7e391af3, 0x7e34ec2b, 0x7e30b885, 0x7e2c8002, 0x7e2842a2,
01658   0x7e240064, 0x7e1fb94a,
01659   0x7e1b6d53, 0x7e171c7f, 0x7e12c6ce, 0x7e0e6c42, 0x7e0a0cd9, 0x7e05a894,
01660   0x7e013f74, 0x7dfcd178,
01661   0x7df85ea0, 0x7df3e6ee, 0x7def6a60, 0x7deae8f7, 0x7de662b3, 0x7de1d795,
01662   0x7ddd479d, 0x7dd8b2ca,
01663   0x7dd4191d, 0x7dcf7a96, 0x7dcad736, 0x7dc62efc, 0x7dc181e8, 0x7dbccffc,
01664   0x7db81936, 0x7db35d98,
01665   0x7dae9d21, 0x7da9d7d2, 0x7da50dab, 0x7da03eab, 0x7d9b6ad3, 0x7d969224,
01666   0x7d91b49e, 0x7d8cd240,
01667   0x7d87eb0a, 0x7d82fefe, 0x7d7e0e1c, 0x7d791862, 0x7d741dd2, 0x7d6f1e6c,
01668   0x7d6a1a31, 0x7d65111f,
01669   0x7d600338, 0x7d5af07b, 0x7d55d8e9, 0x7d50bc82, 0x7d4b9b46, 0x7d467536,
01670   0x7d414a51, 0x7d3c1a98,
01671   0x7d36e60b, 0x7d31acaa, 0x7d2c6e76, 0x7d272b6e, 0x7d21e393, 0x7d1c96e5,
01672   0x7d174564, 0x7d11ef11,
01673   0x7d0c93eb, 0x7d0733f3, 0x7d01cf29, 0x7cfc658d, 0x7cf6f720, 0x7cf183e1,
01674   0x7cec0bd1, 0x7ce68ef0,
01675   0x7ce10d3f, 0x7cdb86bd, 0x7cd5fb6a, 0x7cd06b48, 0x7ccad656, 0x7cc53c94,
01676   0x7cbf9e03, 0x7cb9faa2,
01677   0x7cb45272, 0x7caea574, 0x7ca8f3a7, 0x7ca33d0c, 0x7c9d81a3, 0x7c97c16b,
01678   0x7c91fc66, 0x7c8c3294,
01679   0x7c8663f4, 0x7c809088, 0x7c7ab84e, 0x7c74db48, 0x7c6ef976, 0x7c6912d7,
01680   0x7c63276d, 0x7c5d3737,
01681   0x7c574236, 0x7c514869, 0x7c4b49d2, 0x7c45466f, 0x7c3f3e42, 0x7c39314b,
01682   0x7c331f8a, 0x7c2d08ff,
01683   0x7c26edab, 0x7c20cd8d, 0x7c1aa8a6, 0x7c147ef6, 0x7c0e507e, 0x7c081d3d,
01684   0x7c01e534, 0x7bfba863,
01685   0x7bf566cb, 0x7bef206b, 0x7be8d544, 0x7be28556, 0x7bdc30a1, 0x7bd5d726,
01686   0x7bcf78e5, 0x7bc915dd,
01687   0x7bc2ae10, 0x7bbc417e, 0x7bb5d026, 0x7baf5a09, 0x7ba8df28, 0x7ba25f82,
01688   0x7b9bdb18, 0x7b9551ea,
01689   0x7b8ec3f8, 0x7b883143, 0x7b8199ca, 0x7b7afd8f, 0x7b745c91, 0x7b6db6d0,
01690   0x7b670c4d, 0x7b605d09,
01691   0x7b59a902, 0x7b52f03a, 0x7b4c32b1, 0x7b457068, 0x7b3ea95d, 0x7b37dd92,
01692   0x7b310d07, 0x7b2a37bc,
01693   0x7b235db2, 0x7b1c7ee8, 0x7b159b5f, 0x7b0eb318, 0x7b07c612, 0x7b00d44d,
01694   0x7af9ddcb, 0x7af2e28b,
01695   0x7aebe28d, 0x7ae4ddd2, 0x7addd45b, 0x7ad6c626, 0x7acfb336, 0x7ac89b89,
01696   0x7ac17f20, 0x7aba5dfc,
01697   0x7ab3381d, 0x7aac0d82, 0x7aa4de2d, 0x7a9daa1d, 0x7a967153, 0x7a8f33d0,
01698   0x7a87f192, 0x7a80aa9c,
01699   0x7a795eec, 0x7a720e84, 0x7a6ab963, 0x7a635f8a, 0x7a5c00f9, 0x7a549db0,
01700   0x7a4d35b0, 0x7a45c8f9,
01701   0x7a3e578b, 0x7a36e166, 0x7a2f668c, 0x7a27e6fb, 0x7a2062b5, 0x7a18d9b9,
01702   0x7a114c09, 0x7a09b9a4,
01703   0x7a02228a, 0x79fa86bc, 0x79f2e63a, 0x79eb4105, 0x79e3971c, 0x79dbe880,
01704   0x79d43532, 0x79cc7d31,
01705   0x79c4c07e, 0x79bcff19, 0x79b53903, 0x79ad6e3c, 0x79a59ec3, 0x799dca9a,
01706   0x7995f1c1, 0x798e1438,
01707   0x798631ff, 0x797e4b16, 0x79765f7f, 0x796e6f39, 0x79667a44, 0x795e80a1,
01708   0x79568250, 0x794e7f52,
01709   0x794677a6, 0x793e6b4e, 0x79365a49, 0x792e4497, 0x79262a3a, 0x791e0b31,
01710   0x7915e77c, 0x790dbf1d,
01711   0x79059212, 0x78fd605d, 0x78f529fe, 0x78eceef6, 0x78e4af44, 0x78dc6ae8,
01712   0x78d421e4, 0x78cbd437,
01713   0x78c381e2, 0x78bb2ae5, 0x78b2cf41, 0x78aa6ef5, 0x78a20a03, 0x7899a06a,
01714   0x7891322a, 0x7888bf45,
01715   0x788047ba, 0x7877cb89, 0x786f4ab4, 0x7866c53a, 0x785e3b1c, 0x7855ac5a,
01716   0x784d18f4, 0x784480ea,
01717   0x783be43e, 0x783342ef, 0x782a9cfe, 0x7821f26b, 0x78194336, 0x78108f60,
01718   0x7807d6e9, 0x77ff19d1,
01719   0x77f65819, 0x77ed91c0, 0x77e4c6c9, 0x77dbf732, 0x77d322fc, 0x77ca4a27,
01720   0x77c16cb4, 0x77b88aa3,
01721   0x77afa3f5, 0x77a6b8a9, 0x779dc8c0, 0x7794d43b, 0x778bdb19, 0x7782dd5c,
01722   0x7779db03, 0x7770d40f,
01723   0x7767c880, 0x775eb857, 0x7755a394, 0x774c8a36, 0x77436c40, 0x773a49b0,
01724   0x77312287, 0x7727f6c6,
01725   0x771ec66e, 0x7715917d, 0x770c57f5, 0x770319d6, 0x76f9d721, 0x76f08fd5,
01726   0x76e743f4, 0x76ddf37c,
01727   0x76d49e70, 0x76cb44cf, 0x76c1e699, 0x76b883d0, 0x76af1c72, 0x76a5b082,
01728   0x769c3ffe, 0x7692cae8,
01729   0x7689513f, 0x767fd304, 0x76765038, 0x766cc8db, 0x76633ced, 0x7659ac6f,
01730   0x76501760, 0x76467dc2,
01731   0x763cdf94, 0x76333cd8, 0x7629958c, 0x761fe9b3, 0x7616394c, 0x760c8457,
01732   0x7602cad5, 0x75f90cc7,
01733   0x75ef4a2c, 0x75e58305, 0x75dbb753, 0x75d1e715, 0x75c8124d, 0x75be38fa,
01734   0x75b45b1d, 0x75aa78b6,
01735   0x75a091c6, 0x7596a64d, 0x758cb64c, 0x7582c1c2, 0x7578c8b0, 0x756ecb18,
01736   0x7564c8f8, 0x755ac251,
01737   0x7550b725, 0x7546a772, 0x753c933a, 0x75327a7d, 0x75285d3b, 0x751e3b75,
01738   0x7514152b, 0x7509ea5d,
01739   0x74ffbb0d, 0x74f58739, 0x74eb4ee3, 0x74e1120c, 0x74d6d0b2, 0x74cc8ad8,
01740   0x74c2407d, 0x74b7f1a1,
01741   0x74ad9e46, 0x74a3466b, 0x7498ea11, 0x748e8938, 0x748423e0, 0x7479ba0b,
01742   0x746f4bb8, 0x7464d8e8,
01743   0x745a619b, 0x744fe5d2, 0x7445658d, 0x743ae0cc, 0x74305790, 0x7425c9da,
01744   0x741b37a9, 0x7410a0fe,
01745   0x740605d9, 0x73fb663c, 0x73f0c226, 0x73e61997, 0x73db6c91, 0x73d0bb13,
01746   0x73c6051f, 0x73bb4ab3,
01747   0x73b08bd1, 0x73a5c87a, 0x739b00ad, 0x7390346b, 0x738563b5, 0x737a8e8a,
01748   0x736fb4ec, 0x7364d6da,
01749   0x7359f456, 0x734f0d5f, 0x734421f6, 0x7339321b, 0x732e3dcf, 0x73234512,
01750   0x731847e5, 0x730d4648,
01751   0x7302403c, 0x72f735c0, 0x72ec26d6, 0x72e1137d, 0x72d5fbb7, 0x72cadf83,
01752   0x72bfbee3, 0x72b499d6,
01753   0x72a9705c, 0x729e4277, 0x72931027, 0x7287d96c, 0x727c9e47, 0x72715eb8,
01754   0x72661abf, 0x725ad25d,
01755   0x724f8593, 0x72443460, 0x7238dec5, 0x722d84c4, 0x7222265b, 0x7216c38c,
01756   0x720b5c57, 0x71fff0bc,
01757   0x71f480bc, 0x71e90c57, 0x71dd938f, 0x71d21662, 0x71c694d2, 0x71bb0edf,
01758   0x71af848a, 0x71a3f5d2,
01759   0x719862b9, 0x718ccb3f, 0x71812f65, 0x71758f29, 0x7169ea8f, 0x715e4194,
01760   0x7152943b, 0x7146e284,
01761   0x713b2c6e, 0x712f71fb, 0x7123b32b, 0x7117effe, 0x710c2875, 0x71005c90,
01762   0x70f48c50, 0x70e8b7b5,
01763   0x70dcdec0, 0x70d10171, 0x70c51fc8, 0x70b939c7, 0x70ad4f6d, 0x70a160ba,
01764   0x70956db1, 0x70897650,
01765   0x707d7a98, 0x70717a8a, 0x70657626, 0x70596d6d, 0x704d6060, 0x70414efd,
01766   0x70353947, 0x70291f3e,
01767   0x701d00e1, 0x7010de32, 0x7004b731, 0x6ff88bde, 0x6fec5c3b, 0x6fe02846,
01768   0x6fd3f001, 0x6fc7b36d,
01769   0x6fbb728a, 0x6faf2d57, 0x6fa2e3d7, 0x6f969608, 0x6f8a43ed, 0x6f7ded84,
01770   0x6f7192cf, 0x6f6533ce,
01771   0x6f58d082, 0x6f4c68eb, 0x6f3ffd09, 0x6f338cde, 0x6f271868, 0x6f1a9faa,
01772   0x6f0e22a3, 0x6f01a155,
01773   0x6ef51bbe, 0x6ee891e1, 0x6edc03bc, 0x6ecf7152, 0x6ec2daa2, 0x6eb63fad,
01774   0x6ea9a073, 0x6e9cfcf5,
01775   0x6e905534, 0x6e83a92f, 0x6e76f8e7, 0x6e6a445d, 0x6e5d8b91, 0x6e50ce84,
01776   0x6e440d37, 0x6e3747a9,
01777   0x6e2a7ddb, 0x6e1dafce, 0x6e10dd82, 0x6e0406f8, 0x6df72c30, 0x6dea4d2b,
01778   0x6ddd69e9, 0x6dd0826a,
01779   0x6dc396b0, 0x6db6a6ba, 0x6da9b28a, 0x6d9cba1f, 0x6d8fbd7a, 0x6d82bc9d,
01780   0x6d75b786, 0x6d68ae37,
01781   0x6d5ba0b0, 0x6d4e8ef2, 0x6d4178fd, 0x6d345ed1, 0x6d274070, 0x6d1a1dda,
01782   0x6d0cf70f, 0x6cffcc0f,
01783   0x6cf29cdc, 0x6ce56975, 0x6cd831dc, 0x6ccaf610, 0x6cbdb613, 0x6cb071e4,
01784   0x6ca32985, 0x6c95dcf6,
01785   0x6c888c36, 0x6c7b3748, 0x6c6dde2b, 0x6c6080e0, 0x6c531f67, 0x6c45b9c1,
01786   0x6c384fef, 0x6c2ae1f0,
01787   0x6c1d6fc6, 0x6c0ff971, 0x6c027ef1, 0x6bf50047, 0x6be77d74, 0x6bd9f677,
01788   0x6bcc6b53, 0x6bbedc06,
01789   0x6bb14892, 0x6ba3b0f7, 0x6b961536, 0x6b88754f, 0x6b7ad142, 0x6b6d2911,
01790   0x6b5f7cbc, 0x6b51cc42,
01791   0x6b4417a6, 0x6b365ee7, 0x6b28a206, 0x6b1ae103, 0x6b0d1bdf, 0x6aff529a,
01792   0x6af18536, 0x6ae3b3b2,
01793   0x6ad5de0f, 0x6ac8044e, 0x6aba266e, 0x6aac4472, 0x6a9e5e58, 0x6a907423,
01794   0x6a8285d1, 0x6a749365,
01795   0x6a669cdd, 0x6a58a23c, 0x6a4aa381, 0x6a3ca0ad, 0x6a2e99c0, 0x6a208ebb,
01796   0x6a127f9f, 0x6a046c6c,
01797   0x69f65523, 0x69e839c4, 0x69da1a50, 0x69cbf6c7, 0x69bdcf29, 0x69afa378,
01798   0x69a173b5, 0x69933fde,
01799   0x698507f6, 0x6976cbfc, 0x69688bf1, 0x695a47d6, 0x694bffab, 0x693db371,
01800   0x692f6328, 0x69210ed1,
01801   0x6912b66c, 0x690459fb, 0x68f5f97d, 0x68e794f3, 0x68d92c5d, 0x68cabfbd,
01802   0x68bc4f13, 0x68adda5f,
01803   0x689f61a1, 0x6890e4dc, 0x6882640e, 0x6873df38, 0x6865565c, 0x6856c979,
01804   0x68483891, 0x6839a3a4,
01805   0x682b0ab1, 0x681c6dbb, 0x680dccc1, 0x67ff27c4, 0x67f07ec5, 0x67e1d1c4,
01806   0x67d320c1, 0x67c46bbe,
01807   0x67b5b2bb, 0x67a6f5b8, 0x679834b6, 0x67896fb6, 0x677aa6b8, 0x676bd9bd,
01808   0x675d08c4, 0x674e33d0,
01809   0x673f5ae0, 0x67307df5, 0x67219d10, 0x6712b831, 0x6703cf58, 0x66f4e287,
01810   0x66e5f1be, 0x66d6fcfd,
01811   0x66c80445, 0x66b90797, 0x66aa06f3, 0x669b0259, 0x668bf9cb, 0x667ced49,
01812   0x666ddcd3, 0x665ec86b,
01813   0x664fb010, 0x664093c3, 0x66317385, 0x66224f56, 0x66132738, 0x6603fb2a,
01814   0x65f4cb2d, 0x65e59742,
01815   0x65d65f69, 0x65c723a3, 0x65b7e3f1, 0x65a8a052, 0x659958c9, 0x658a0d54,
01816   0x657abdf6, 0x656b6aae,
01817   0x655c137d, 0x654cb863, 0x653d5962, 0x652df679, 0x651e8faa, 0x650f24f5,
01818   0x64ffb65b, 0x64f043dc,
01819   0x64e0cd78, 0x64d15331, 0x64c1d507, 0x64b252fa, 0x64a2cd0c, 0x6493433c,
01820   0x6483b58c, 0x647423fb,
01821   0x64648e8c, 0x6454f53d, 0x64455810, 0x6435b706, 0x6426121e, 0x6416695a,
01822   0x6406bcba, 0x63f70c3f,
01823   0x63e757ea, 0x63d79fba, 0x63c7e3b1, 0x63b823cf, 0x63a86015, 0x63989884,
01824   0x6388cd1b, 0x6378fddc,
01825   0x63692ac7, 0x635953dd, 0x6349791f, 0x63399a8d, 0x6329b827, 0x6319d1ef,
01826   0x6309e7e4, 0x62f9fa09,
01827   0x62ea085c, 0x62da12df, 0x62ca1992, 0x62ba1c77, 0x62aa1b8d, 0x629a16d5,
01828   0x628a0e50, 0x627a01fe,
01829   0x6269f1e1, 0x6259ddf8, 0x6249c645, 0x6239aac7, 0x62298b81, 0x62196871,
01830   0x62094199, 0x61f916f9,
01831   0x61e8e893, 0x61d8b666, 0x61c88074, 0x61b846bc, 0x61a80940, 0x6197c800,
01832   0x618782fd, 0x61773a37,
01833   0x6166edb0, 0x61569d67, 0x6146495d, 0x6135f193, 0x6125960a, 0x611536c2,
01834   0x6104d3bc, 0x60f46cf9,
01835   0x60e40278, 0x60d3943b, 0x60c32243, 0x60b2ac8f, 0x60a23322, 0x6091b5fa,
01836   0x60813519, 0x6070b080,
01837   0x6060282f, 0x604f9c27, 0x603f0c69, 0x602e78f4, 0x601de1ca, 0x600d46ec,
01838   0x5ffca859, 0x5fec0613,
01839   0x5fdb601b, 0x5fcab670, 0x5fba0914, 0x5fa95807, 0x5f98a34a, 0x5f87eade,
01840   0x5f772ec2, 0x5f666ef9,
01841   0x5f55ab82, 0x5f44e45e, 0x5f34198e, 0x5f234b12, 0x5f1278eb, 0x5f01a31a,
01842   0x5ef0c99f, 0x5edfec7b,
01843   0x5ecf0baf, 0x5ebe273b, 0x5ead3f1f, 0x5e9c535e, 0x5e8b63f7, 0x5e7a70ea,
01844   0x5e697a39, 0x5e587fe5,
01845   0x5e4781ed, 0x5e368053, 0x5e257b17, 0x5e147239, 0x5e0365bb, 0x5df2559e,
01846   0x5de141e1, 0x5dd02a85,
01847   0x5dbf0f8c, 0x5dadf0f5, 0x5d9ccec2, 0x5d8ba8f3, 0x5d7a7f88, 0x5d695283,
01848   0x5d5821e4, 0x5d46edac,
01849   0x5d35b5db, 0x5d247a72, 0x5d133b72, 0x5d01f8dc, 0x5cf0b2af, 0x5cdf68ed,
01850   0x5cce1b97, 0x5cbccaac,
01851   0x5cab762f, 0x5c9a1e1e, 0x5c88c27c, 0x5c776348, 0x5c660084, 0x5c549a30,
01852   0x5c43304d, 0x5c31c2db,
01853   0x5c2051db, 0x5c0edd4e, 0x5bfd6534, 0x5bebe98e, 0x5bda6a5d, 0x5bc8e7a2,
01854   0x5bb7615d, 0x5ba5d78e,
01855   0x5b944a37, 0x5b82b958, 0x5b7124f2, 0x5b5f8d06, 0x5b4df193, 0x5b3c529c,
01856   0x5b2ab020, 0x5b190a20,
01857   0x5b07609d, 0x5af5b398, 0x5ae40311, 0x5ad24f09, 0x5ac09781, 0x5aaedc78,
01858   0x5a9d1df1, 0x5a8b5bec,
01859   0x5a799669, 0x5a67cd69, 0x5a5600ec, 0x5a4430f5, 0x5a325d82, 0x5a208695,
01860   0x5a0eac2e, 0x59fcce4f,
01861   0x59eaecf8, 0x59d90829, 0x59c71fe3, 0x59b53427, 0x59a344f6, 0x59915250,
01862   0x597f5c36, 0x596d62a9,
01863   0x595b65aa, 0x59496538, 0x59376155, 0x59255a02, 0x59134f3e, 0x5901410c,
01864   0x58ef2f6b, 0x58dd1a5d,
01865   0x58cb01e1, 0x58b8e5f9, 0x58a6c6a5, 0x5894a3e7, 0x58827dbe, 0x5870542c,
01866   0x585e2730, 0x584bf6cd,
01867   0x5839c302, 0x58278bd1, 0x58155139, 0x5803133c, 0x57f0d1da, 0x57de8d15,
01868   0x57cc44ec, 0x57b9f960,
01869   0x57a7aa73, 0x57955825, 0x57830276, 0x5770a968, 0x575e4cfa, 0x574bed2f,
01870   0x57398a05, 0x5727237f,
01871   0x5714b99d, 0x57024c5f, 0x56efdbc7, 0x56dd67d4, 0x56caf088, 0x56b875e4,
01872   0x56a5f7e7, 0x56937694,
01873   0x5680f1ea, 0x566e69ea, 0x565bde95, 0x56494fec, 0x5636bdef, 0x5624289f,
01874   0x56118ffe, 0x55fef40a,
01875   0x55ec54c6, 0x55d9b232, 0x55c70c4f, 0x55b4631d, 0x55a1b69d, 0x558f06d0,
01876   0x557c53b6, 0x55699d51,
01877   0x5556e3a1, 0x554426a7, 0x55316663, 0x551ea2d6, 0x550bdc01, 0x54f911e5,
01878   0x54e64482, 0x54d373d9,
01879   0x54c09feb, 0x54adc8b8, 0x549aee42, 0x54881089, 0x54752f8d, 0x54624b50,
01880   0x544f63d2, 0x543c7914,
01881   0x54298b17, 0x541699db, 0x5403a561, 0x53f0adaa, 0x53ddb2b6, 0x53cab486,
01882   0x53b7b31c, 0x53a4ae77,
01883   0x5391a699, 0x537e9b82, 0x536b8d33, 0x53587bad, 0x534566f0, 0x53324efd,
01884   0x531f33d5, 0x530c1579,
01885   0x52f8f3e9, 0x52e5cf27, 0x52d2a732, 0x52bf7c0b, 0x52ac4db4, 0x52991c2d,
01886   0x5285e777, 0x5272af92,
01887   0x525f7480, 0x524c3640, 0x5238f4d4, 0x5225b03d, 0x5212687b, 0x51ff1d8f,
01888   0x51ebcf7a, 0x51d87e3c,
01889   0x51c529d7, 0x51b1d24a, 0x519e7797, 0x518b19bf, 0x5177b8c2, 0x516454a0,
01890   0x5150ed5c, 0x513d82f4,
01891   0x512a156b, 0x5116a4c1, 0x510330f7, 0x50efba0d, 0x50dc4005, 0x50c8c2de,
01892   0x50b5429a, 0x50a1bf39,
01893   0x508e38bd, 0x507aaf25, 0x50672273, 0x505392a8, 0x503fffc4, 0x502c69c8,
01894   0x5018d0b4, 0x5005348a,
01895   0x4ff1954b, 0x4fddf2f6, 0x4fca4d8d, 0x4fb6a510, 0x4fa2f981, 0x4f8f4ae0,
01896   0x4f7b992d, 0x4f67e46a,
01897   0x4f542c98, 0x4f4071b6, 0x4f2cb3c7, 0x4f18f2c9, 0x4f052ec0, 0x4ef167aa,
01898   0x4edd9d89, 0x4ec9d05e,
01899   0x4eb60029, 0x4ea22ceb, 0x4e8e56a5, 0x4e7a7d58, 0x4e66a105, 0x4e52c1ab,
01900   0x4e3edf4d, 0x4e2af9ea,
01901   0x4e171184, 0x4e03261b, 0x4def37b0, 0x4ddb4644, 0x4dc751d8, 0x4db35a6c,
01902   0x4d9f6001, 0x4d8b6298,
01903   0x4d776231, 0x4d635ece, 0x4d4f5870, 0x4d3b4f16, 0x4d2742c2, 0x4d133374,
01904   0x4cff212e, 0x4ceb0bf0,
01905   0x4cd6f3bb, 0x4cc2d88f, 0x4caeba6e, 0x4c9a9958, 0x4c86754e, 0x4c724e50,
01906   0x4c5e2460, 0x4c49f77f,
01907   0x4c35c7ac, 0x4c2194e9, 0x4c0d5f37, 0x4bf92697, 0x4be4eb08, 0x4bd0ac8d,
01908   0x4bbc6b25, 0x4ba826d1,
01909   0x4b93df93, 0x4b7f956b, 0x4b6b485a, 0x4b56f861, 0x4b42a580, 0x4b2e4fb8,
01910   0x4b19f70a, 0x4b059b77,
01911   0x4af13d00, 0x4adcdba5, 0x4ac87767, 0x4ab41046, 0x4a9fa645, 0x4a8b3963,
01912   0x4a76c9a2, 0x4a625701,
01913   0x4a4de182, 0x4a396926, 0x4a24edee, 0x4a106fda, 0x49fbeeea, 0x49e76b21,
01914   0x49d2e47e, 0x49be5b02,
01915   0x49a9ceaf, 0x49953f84, 0x4980ad84, 0x496c18ae, 0x49578103, 0x4942e684,
01916   0x492e4933, 0x4919a90f,
01917   0x4905061a, 0x48f06054, 0x48dbb7be, 0x48c70c59, 0x48b25e25, 0x489dad25,
01918   0x4888f957, 0x487442be,
01919   0x485f8959, 0x484acd2a, 0x48360e32, 0x48214c71, 0x480c87e8, 0x47f7c099,
01920   0x47e2f682, 0x47ce29a7,
01921   0x47b95a06, 0x47a487a2, 0x478fb27b, 0x477ada91, 0x4765ffe6, 0x4751227a,
01922   0x473c424e, 0x47275f63,
01923   0x471279ba, 0x46fd9154, 0x46e8a631, 0x46d3b852, 0x46bec7b8, 0x46a9d464,
01924   0x4694de56, 0x467fe590,
01925   0x466aea12, 0x4655ebdd, 0x4640eaf2, 0x462be751, 0x4616e0fc, 0x4601d7f3,
01926   0x45eccc37, 0x45d7bdc9,
01927   0x45c2acaa, 0x45ad98da, 0x4598825a, 0x4583692c, 0x456e4d4f, 0x45592ec6,
01928   0x45440d90, 0x452ee9ae,
01929   0x4519c321, 0x450499eb, 0x44ef6e0b, 0x44da3f83, 0x44c50e53, 0x44afda7d,
01930   0x449aa400, 0x44856adf,
01931   0x44702f19, 0x445af0b0, 0x4445afa4, 0x44306bf6, 0x441b25a8, 0x4405dcb9,
01932   0x43f0912b, 0x43db42fe,
01933   0x43c5f234, 0x43b09ecc, 0x439b48c9, 0x4385f02a, 0x437094f1, 0x435b371f,
01934   0x4345d6b3, 0x433073b0,
01935   0x431b0e15, 0x4305a5e5, 0x42f03b1e, 0x42dacdc3, 0x42c55dd4, 0x42afeb53,
01936   0x429a763f, 0x4284fe99,
01937   0x426f8463, 0x425a079e, 0x42448849, 0x422f0667, 0x421981f7, 0x4203fafb,
01938   0x41ee7174, 0x41d8e561,
01939   0x41c356c5, 0x41adc5a0, 0x419831f3, 0x41829bbe, 0x416d0302, 0x415767c1,
01940   0x4141c9fb, 0x412c29b1,
01941   0x411686e4, 0x4100e194, 0x40eb39c3, 0x40d58f71, 0x40bfe29f, 0x40aa334e,
01942   0x4094817f, 0x407ecd32,
01943   0x40691669, 0x40535d24, 0x403da165, 0x4027e32b, 0x40122278, 0x3ffc5f4d,
01944   0x3fe699aa, 0x3fd0d191,
01945   0x3fbb0702, 0x3fa539fd, 0x3f8f6a85, 0x3f799899, 0x3f63c43b, 0x3f4ded6b,
01946   0x3f38142a, 0x3f22387a,
01947   0x3f0c5a5a, 0x3ef679cc, 0x3ee096d1, 0x3ecab169, 0x3eb4c995, 0x3e9edf57,
01948   0x3e88f2ae, 0x3e73039d,
01949   0x3e5d1222, 0x3e471e41, 0x3e3127f9, 0x3e1b2f4a, 0x3e053437, 0x3def36c0,
01950   0x3dd936e6, 0x3dc334a9,
01951   0x3dad300b, 0x3d97290b, 0x3d811fac, 0x3d6b13ee, 0x3d5505d2, 0x3d3ef559,
01952   0x3d28e282, 0x3d12cd51,
01953   0x3cfcb5c4, 0x3ce69bde, 0x3cd07f9f, 0x3cba6107, 0x3ca44018, 0x3c8e1cd3,
01954   0x3c77f737, 0x3c61cf48,
01955   0x3c4ba504, 0x3c35786d, 0x3c1f4983, 0x3c091849, 0x3bf2e4be, 0x3bdcaee3,
01956   0x3bc676b9, 0x3bb03c42,
01957   0x3b99ff7d, 0x3b83c06c, 0x3b6d7f10, 0x3b573b69, 0x3b40f579, 0x3b2aad3f,
01958   0x3b1462be, 0x3afe15f6,
01959   0x3ae7c6e7, 0x3ad17593, 0x3abb21fb, 0x3aa4cc1e, 0x3a8e7400, 0x3a78199f,
01960   0x3a61bcfd, 0x3a4b5e1b,
01961   0x3a34fcf9, 0x3a1e9999, 0x3a0833fc, 0x39f1cc21, 0x39db620b, 0x39c4f5ba,
01962   0x39ae872f, 0x3998166a,
01963   0x3981a36d, 0x396b2e38, 0x3954b6cd, 0x393e3d2c, 0x3927c155, 0x3911434b,
01964   0x38fac30e, 0x38e4409e,
01965   0x38cdbbfc, 0x38b7352a, 0x38a0ac29, 0x388a20f8, 0x38739399, 0x385d040d,
01966   0x38467255, 0x382fde72,
01967   0x38194864, 0x3802b02c, 0x37ec15cb, 0x37d57943, 0x37beda93, 0x37a839be,
01968   0x379196c3, 0x377af1a3,
01969   0x37644a60, 0x374da0fa, 0x3736f573, 0x372047ca, 0x37099802, 0x36f2e61a,
01970   0x36dc3214, 0x36c57bf0,
01971   0x36aec3b0, 0x36980954, 0x36814cde, 0x366a8e4d, 0x3653cda3, 0x363d0ae2,
01972   0x36264609, 0x360f7f19,
01973   0x35f8b614, 0x35e1eafa, 0x35cb1dcc, 0x35b44e8c, 0x359d7d39, 0x3586a9d5,
01974   0x356fd461, 0x3558fcde,
01975   0x3542234c, 0x352b47ad, 0x35146a00, 0x34fd8a48, 0x34e6a885, 0x34cfc4b7,
01976   0x34b8dee1, 0x34a1f702,
01977   0x348b0d1c, 0x3474212f, 0x345d333c, 0x34464345, 0x342f5149, 0x34185d4b,
01978   0x3401674a, 0x33ea6f48,
01979   0x33d37546, 0x33bc7944, 0x33a57b44, 0x338e7b46, 0x3377794b, 0x33607554,
01980   0x33496f62, 0x33326776,
01981   0x331b5d91, 0x330451b3, 0x32ed43de, 0x32d63412, 0x32bf2250, 0x32a80e99,
01982   0x3290f8ef, 0x3279e151,
01983   0x3262c7c1, 0x324bac40, 0x32348ecf, 0x321d6f6e, 0x32064e1e, 0x31ef2ae1,
01984   0x31d805b7, 0x31c0dea1,
01985   0x31a9b5a0, 0x31928ab4, 0x317b5de0, 0x31642f23, 0x314cfe7f, 0x3135cbf4,
01986   0x311e9783, 0x3107612e,
01987   0x30f028f4, 0x30d8eed8, 0x30c1b2da, 0x30aa74fa, 0x3093353a, 0x307bf39b,
01988   0x3064b01d, 0x304d6ac1,
01989   0x30362389, 0x301eda75, 0x30078f86, 0x2ff042bd, 0x2fd8f41b, 0x2fc1a3a0,
01990   0x2faa514f, 0x2f92fd26,
01991   0x2f7ba729, 0x2f644f56, 0x2f4cf5b0, 0x2f359a37, 0x2f1e3ced, 0x2f06ddd1,
01992   0x2eef7ce5, 0x2ed81a29,
01993   0x2ec0b5a0, 0x2ea94f49, 0x2e91e725, 0x2e7a7d36, 0x2e63117c, 0x2e4ba3f8,
01994   0x2e3434ac, 0x2e1cc397,
01995   0x2e0550bb, 0x2deddc19, 0x2dd665b2, 0x2dbeed86, 0x2da77397, 0x2d8ff7e5,
01996   0x2d787a72, 0x2d60fb3e,
01997   0x2d497a4a, 0x2d31f797, 0x2d1a7325, 0x2d02ecf7, 0x2ceb650d, 0x2cd3db67,
01998   0x2cbc5006, 0x2ca4c2ed,
01999   0x2c8d341a, 0x2c75a390, 0x2c5e114f, 0x2c467d58, 0x2c2ee7ad, 0x2c17504d,
02000   0x2bffb73a, 0x2be81c74,
02001   0x2bd07ffe, 0x2bb8e1d7, 0x2ba14200, 0x2b89a07b, 0x2b71fd48, 0x2b5a5868,
02002   0x2b42b1dd, 0x2b2b09a6,
02003   0x2b135fc6, 0x2afbb43c, 0x2ae4070a, 0x2acc5831, 0x2ab4a7b1, 0x2a9cf58c,
02004   0x2a8541c3, 0x2a6d8c55,
02005   0x2a55d545, 0x2a3e1c93, 0x2a266240, 0x2a0ea64d, 0x29f6e8bb, 0x29df298b,
02006   0x29c768be, 0x29afa654,
02007   0x2997e24f, 0x29801caf, 0x29685576, 0x29508ca4, 0x2938c23a, 0x2920f63a,
02008   0x290928a3, 0x28f15978,
02009   0x28d988b8, 0x28c1b666, 0x28a9e281, 0x28920d0a, 0x287a3604, 0x28625d6d,
02010   0x284a8349, 0x2832a796,
02011   0x281aca57, 0x2802eb8c, 0x27eb0b36, 0x27d32956, 0x27bb45ed, 0x27a360fc,
02012   0x278b7a84, 0x27739285,
02013   0x275ba901, 0x2743bdf9, 0x272bd16d, 0x2713e35f, 0x26fbf3ce, 0x26e402bd,
02014   0x26cc102d, 0x26b41c1d,
02015   0x269c268f, 0x26842f84, 0x266c36fe, 0x26543cfb, 0x263c417f, 0x26244489,
02016   0x260c461b, 0x25f44635,
02017   0x25dc44d9, 0x25c44207, 0x25ac3dc0, 0x25943806, 0x257c30d8, 0x25642839,
02018   0x254c1e28, 0x253412a8,
02019   0x251c05b8, 0x2503f75a, 0x24ebe78f, 0x24d3d657, 0x24bbc3b4, 0x24a3afa6,
02020   0x248b9a2f, 0x2473834f,
02021   0x245b6b07, 0x24435158, 0x242b3644, 0x241319ca, 0x23fafbec, 0x23e2dcac,
02022   0x23cabc09, 0x23b29a05,
02023   0x239a76a0, 0x238251dd, 0x236a2bba, 0x2352043b, 0x2339db5e, 0x2321b126,
02024   0x23098593, 0x22f158a7,
02025   0x22d92a61, 0x22c0fac4, 0x22a8c9cf, 0x22909785, 0x227863e5, 0x22602ef1,
02026   0x2247f8aa, 0x222fc111,
02027   0x22178826, 0x21ff4dea, 0x21e71260, 0x21ced586, 0x21b6975f, 0x219e57eb,
02028   0x2186172b, 0x216dd521,
02029   0x215591cc, 0x213d4d2f, 0x21250749, 0x210cc01d, 0x20f477aa, 0x20dc2df2,
02030   0x20c3e2f5, 0x20ab96b5,
02031   0x20934933, 0x207afa6f, 0x2062aa6b, 0x204a5927, 0x203206a4, 0x2019b2e4,
02032   0x20015de7, 0x1fe907ae,
02033   0x1fd0b03a, 0x1fb8578b, 0x1f9ffda4, 0x1f87a285, 0x1f6f462f, 0x1f56e8a2,
02034   0x1f3e89e0, 0x1f2629ea,
02035   0x1f0dc8c0, 0x1ef56664, 0x1edd02d6, 0x1ec49e17, 0x1eac3829, 0x1e93d10c,
02036   0x1e7b68c2, 0x1e62ff4a,
02037   0x1e4a94a7, 0x1e3228d9, 0x1e19bbe0, 0x1e014dbf, 0x1de8de75, 0x1dd06e04,
02038   0x1db7fc6d, 0x1d9f89b1,
02039   0x1d8715d0, 0x1d6ea0cc, 0x1d562aa6, 0x1d3db35e, 0x1d253af5, 0x1d0cc16c,
02040   0x1cf446c5, 0x1cdbcb00,
02041   0x1cc34e1f, 0x1caad021, 0x1c925109, 0x1c79d0d6, 0x1c614f8b, 0x1c48cd27,
02042   0x1c3049ac, 0x1c17c51b,
02043   0x1bff3f75, 0x1be6b8ba, 0x1bce30ec, 0x1bb5a80c, 0x1b9d1e1a, 0x1b849317,
02044   0x1b6c0705, 0x1b5379e5,
02045   0x1b3aebb6, 0x1b225c7b, 0x1b09cc34, 0x1af13ae3, 0x1ad8a887, 0x1ac01522,
02046   0x1aa780b6, 0x1a8eeb42,
02047   0x1a7654c8, 0x1a5dbd49, 0x1a4524c6, 0x1a2c8b3f, 0x1a13f0b6, 0x19fb552c,
02048   0x19e2b8a2, 0x19ca1b17,
02049   0x19b17c8f, 0x1998dd09, 0x19803c86, 0x19679b07, 0x194ef88e, 0x1936551b,
02050   0x191db0af, 0x19050b4b,
02051   0x18ec64f0, 0x18d3bda0, 0x18bb155a, 0x18a26c20, 0x1889c1f3, 0x187116d4,
02052   0x18586ac3, 0x183fbdc3,
02053   0x18270fd3, 0x180e60f4, 0x17f5b129, 0x17dd0070, 0x17c44ecd, 0x17ab9c3e,
02054   0x1792e8c6, 0x177a3466,
02055   0x17617f1d, 0x1748c8ee, 0x173011d9, 0x171759df, 0x16fea102, 0x16e5e741,
02056   0x16cd2c9f, 0x16b4711b,
02057   0x169bb4b7, 0x1682f774, 0x166a3953, 0x16517a55, 0x1638ba7a, 0x161ff9c4,
02058   0x16073834, 0x15ee75cb,
02059   0x15d5b288, 0x15bcee6f, 0x15a4297f, 0x158b63b9, 0x15729d1f, 0x1559d5b1,
02060   0x15410d70, 0x1528445d,
02061   0x150f7a7a, 0x14f6afc7, 0x14dde445, 0x14c517f4, 0x14ac4ad7, 0x14937cee,
02062   0x147aae3a, 0x1461debc,
02063   0x14490e74, 0x14303d65, 0x14176b8e, 0x13fe98f1, 0x13e5c58e, 0x13ccf167,
02064   0x13b41c7d, 0x139b46d0,
02065   0x13827062, 0x13699933, 0x1350c144, 0x1337e897, 0x131f0f2c, 0x13063505,
02066   0x12ed5a21, 0x12d47e83,
02067   0x12bba22b, 0x12a2c51b, 0x1289e752, 0x127108d2, 0x1258299c, 0x123f49b2,
02068   0x12266913, 0x120d87c1,
02069   0x11f4a5bd, 0x11dbc307, 0x11c2dfa2, 0x11a9fb8d, 0x119116c9, 0x11783159,
02070   0x115f4b3c, 0x11466473,
02071   0x112d7d00, 0x111494e4, 0x10fbac1e, 0x10e2c2b2, 0x10c9d89e, 0x10b0ede5,
02072   0x10980287, 0x107f1686,
02073   0x106629e1, 0x104d3c9b, 0x10344eb4, 0x101b602d, 0x10027107, 0xfe98143,
02074   0xfd090e1, 0xfb79fe4,
02075   0xf9eae4c, 0xf85bc19, 0xf6cc94e, 0xf53d5ea, 0xf3ae1ee, 0xf21ed5d, 0xf08f836,
02076   0xef0027b,
02077   0xed70c2c, 0xebe154b, 0xea51dd8, 0xe8c25d5, 0xe732d42, 0xe5a3421, 0xe413a72,
02078   0xe284036,
02079   0xe0f456f, 0xdf64a1c, 0xddd4e40, 0xdc451dc, 0xdab54ef, 0xd92577b, 0xd795982,
02080   0xd605b03,
02081   0xd475c00, 0xd2e5c7b, 0xd155c73, 0xcfc5bea, 0xce35ae1, 0xcca5959, 0xcb15752,
02082   0xc9854cf,
02083   0xc7f51cf, 0xc664e53, 0xc4d4a5d, 0xc3445ee, 0xc1b4107, 0xc023ba7, 0xbe935d2,
02084   0xbd02f87,
02085   0xbb728c7, 0xb9e2193, 0xb8519ed, 0xb6c11d5, 0xb53094d, 0xb3a0055, 0xb20f6ee,
02086   0xb07ed19,
02087   0xaeee2d7, 0xad5d829, 0xabccd11, 0xaa3c18e, 0xa8ab5a2, 0xa71a94f, 0xa589c94,
02088   0xa3f8f73,
02089   0xa2681ed, 0xa0d7403, 0x9f465b5, 0x9db5706, 0x9c247f5, 0x9a93884, 0x99028b3,
02090   0x9771884,
02091   0x95e07f8, 0x944f70f, 0x92be5ca, 0x912d42c, 0x8f9c233, 0x8e0afe2, 0x8c79d3a,
02092   0x8ae8a3a,
02093   0x89576e5, 0x87c633c, 0x8634f3e, 0x84a3aee, 0x831264c, 0x8181159, 0x7fefc16,
02094   0x7e5e685,
02095   0x7ccd0a5, 0x7b3ba78, 0x79aa400, 0x7818d3c, 0x768762e, 0x74f5ed7, 0x7364738,
02096   0x71d2f52,
02097   0x7041726, 0x6eafeb4, 0x6d1e5fe, 0x6b8cd05, 0x69fb3c9, 0x6869a4c, 0x66d808f,
02098   0x6546692,
02099   0x63b4c57, 0x62231de, 0x6091729, 0x5effc38, 0x5d6e10c, 0x5bdc5a7, 0x5a4aa09,
02100   0x58b8e34,
02101   0x5727228, 0x55955e6, 0x540396f, 0x5271cc4, 0x50dffe7, 0x4f4e2d8, 0x4dbc597,
02102   0x4c2a827,
02103   0x4a98a88, 0x4906cbb, 0x4774ec1, 0x45e309a, 0x4451249, 0x42bf3cd, 0x412d528,
02104   0x3f9b65b,
02105   0x3e09767, 0x3c7784d, 0x3ae590d, 0x39539a9, 0x37c1a22, 0x362fa78, 0x349daac,
02106   0x330bac1,
02107   0x3179ab5, 0x2fe7a8c, 0x2e55a44, 0x2cc39e1, 0x2b31961, 0x299f8c7, 0x280d813,
02108   0x267b747,
02109   0x24e9662, 0x2357567, 0x21c5457, 0x2033331, 0x1ea11f7, 0x1d0f0ab, 0x1b7cf4d,
02110   0x19eaddd,
02111   0x1858c5e, 0x16c6ad0, 0x1534934, 0x13a278a, 0x12105d5, 0x107e414, 0xeec249,
02112   0xd5a075,
02113   0xbc7e99, 0xa35cb5, 0x8a3acb, 0x7118dc, 0x57f6e9, 0x3ed4f2, 0x25b2f8,
02114   0xc90fe,
02115
02116 };
02117
02133 arm_status arm_dct4_init_q31(
02134   arm_dct4_instance_q31 * S,
02135   arm_rfft_instance_q31 * S_RFFT,
02136   arm_cfft_radix4_instance_q31 * S_CFFT,
02137   uint16_t N,
02138   uint16_t Nby2,
02139   q31_t normalize)
02140 {
02141   /*  Initialise the default arm status */
02142   arm_status status = ARM_MATH_SUCCESS;
02143
02144   /* Initializing the pointer array with the weight table base addresses of different lengths */
02145   q31_t *twiddlePtr[3] = { (q31_t *) WeightsQ31_128, (q31_t *) WeightsQ31_512,
02146     (q31_t *) WeightsQ31_2048
02147   };
02148
02149   /* Initializing the pointer array with the cos factor table base addresses of different lengths */
02150   q31_t *pCosFactor[3] =
02151     { (q31_t *) cos_factorsQ31_128, (q31_t *) cos_factorsQ31_512,
02152     (q31_t *) cos_factorsQ31_2048
02153   };
02154
02155   /* Initialize the DCT4 length */
02156   S->N = N;
02157
02158   /* Initialize the half of DCT4 length */
02159   S->Nby2 = Nby2;
02160
02161   /* Initialize the DCT4 Normalizing factor */
02162   S->normalize = normalize;
02163
02164   /* Initialize Real FFT Instance */
02165   S->pRfft = S_RFFT;
02166
02167   /* Initialize Complex FFT Instance */
02168   S->pCfft = S_CFFT;
02169
02170   switch (N)
02171   {
02172     /* Initialize the table modifier values */
02173   case 2048u:
02174     S->pTwiddle = twiddlePtr[2];
02175     S->pCosFactor = pCosFactor[2];
02176     break;
02177   case 512u:
02178     S->pTwiddle = twiddlePtr[1];
02179     S->pCosFactor = pCosFactor[1];
02180     break;
02181   case 128u:
02182     S->pTwiddle = twiddlePtr[0];
02183     S->pCosFactor = pCosFactor[0];
02184     break;
02185   default:
02186     status = ARM_MATH_ARGUMENT_ERROR;
02187   }
02188
02189   /* Initialize the RFFT/RIFFT Function */
02190   arm_rfft_init_q31(S->pRfft, S->pCfft, S->N, 0, 1);
02191
02192   /* return the status of DCT4 Init function */
02193   return (status);
02194 }
02195
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CMSIS DSP Software Library: arm_dct4_q15.c File Reference

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arm_dct4_q15.c File Reference

#include "arm_math.h"

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Functions

void arm_dct4_q15 (const arm_dct4_instance_q15 *S, q15_t *pState, q15_t *pInlineBuffer)
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CMSIS DSP Software Library: arm_dct4_q15.c Source File

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arm_dct4_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_dct4_q15.c
00009 *
00010 * Description:  Processing function of DCT4 & IDCT4 Q15.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00052 void arm_dct4_q15(
00053   const arm_dct4_instance_q15 * S,
00054   q15_t * pState,
00055   q15_t * pInlineBuffer)
00056 {
00057   uint32_t i;                                    /* Loop counter */
00058   q15_t *weights = S->pTwiddle;                  /* Pointer to the Weights table */
00059   q15_t *cosFact = S->pCosFactor;                /* Pointer to the cos factors table */
00060   q15_t *pS1, *pS2, *pbuff;                      /* Temporary pointers for input buffer and pState buffer */
00061   q15_t in;                                      /* Temporary variable */
00062
00063
00064   /* DCT4 computation involves DCT2 (which is calculated using RFFT)
00065    * along with some pre-processing and post-processing.
00066    * Computational procedure is explained as follows:
00067    * (a) Pre-processing involves multiplying input with cos factor,
00068    *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))
00069    *              where,
00070    *                 r(n) -- output of preprocessing
00071    *                 u(n) -- input to preprocessing(actual Source buffer)
00072    * (b) Calculation of DCT2 using FFT is divided into three steps:
00073    *                  Step1: Re-ordering of even and odd elements of input.
00074    *                  Step2: Calculating FFT of the re-ordered input.
00075    *                  Step3: Taking the real part of the product of FFT output and weights.
00076    * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:
00077    *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
00078    *                        where,
00079    *                           Y4 -- DCT4 output,   Y2 -- DCT2 output
00080    * (d) Multiplying the output with the normalizing factor sqrt(2/N).
00081    */
00082
00083         /*-------- Pre-processing ------------*/
00084   /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
00085   arm_mult_q15(pInlineBuffer, cosFact, pInlineBuffer, S->N);
00086   arm_shift_q15(pInlineBuffer, 1, pInlineBuffer, S->N);
00087
00088   /* ----------------------------------------------------------------
00089    * Step1: Re-ordering of even and odd elements as
00090    *             pState[i] =  pInlineBuffer[2*i] and
00091    *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2
00092    ---------------------------------------------------------------------*/
00093
00094   /* pS1 initialized to pState */
00095   pS1 = pState;
00096
00097   /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
00098   pS2 = pState + (S->N - 1u);
00099
00100   /* pbuff initialized to input buffer */
00101   pbuff = pInlineBuffer;
00102
00103
00104 #ifndef ARM_MATH_CM0
00105
00106   /* Run the below code for Cortex-M4 and Cortex-M3 */
00107
00108   /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
00109   i = (uint32_t) S->Nby2 >> 2u;
00110
00111   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00112    ** a second loop below computes the remaining 1 to 3 samples. */
00113   do
00114   {
00115     /* Re-ordering of even and odd elements */
00116     /* pState[i] =  pInlineBuffer[2*i] */
00117     *pS1++ = *pbuff++;
00118     /* pState[N-i-1] = pInlineBuffer[2*i+1] */
00119     *pS2-- = *pbuff++;
00120
00121     *pS1++ = *pbuff++;
00122     *pS2-- = *pbuff++;
00123
00124     *pS1++ = *pbuff++;
00125     *pS2-- = *pbuff++;
00126
00127     *pS1++ = *pbuff++;
00128     *pS2-- = *pbuff++;
00129
00130     /* Decrement the loop counter */
00131     i--;
00132   } while(i > 0u);
00133
00134   /* pbuff initialized to input buffer */
00135   pbuff = pInlineBuffer;
00136
00137   /* pS1 initialized to pState */
00138   pS1 = pState;
00139
00140   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
00141   i = (uint32_t) S->N >> 2u;
00142
00143   /* Processing with loop unrolling 4 times as N is always multiple of 4.
00144    * Compute 4 outputs at a time */
00145   do
00146   {
00147     /* Writing the re-ordered output back to inplace input buffer */
00148     *pbuff++ = *pS1++;
00149     *pbuff++ = *pS1++;
00150     *pbuff++ = *pS1++;
00151     *pbuff++ = *pS1++;
00152
00153     /* Decrement the loop counter */
00154     i--;
00155   } while(i > 0u);
00156
00157
00158   /* ---------------------------------------------------------
00159    *     Step2: Calculate RFFT for N-point input
00160    * ---------------------------------------------------------- */
00161   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
00162   arm_rfft_q15(S->pRfft, pInlineBuffer, pState);
00163
00164  /*----------------------------------------------------------------------
00165   *  Step3: Multiply the FFT output with the weights.
00166   *----------------------------------------------------------------------*/
00167   arm_cmplx_mult_cmplx_q15(pState, weights, pState, S->N);
00168
00169   /* The output of complex multiplication is in 3.13 format.
00170    * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */
00171   arm_shift_q15(pState, 2, pState, S->N * 2);
00172
00173   /* ----------- Post-processing ---------- */
00174   /* DCT-IV can be obtained from DCT-II by the equation,
00175    *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
00176    *       Hence, Y4(0) = Y2(0)/2  */
00177   /* Getting only real part from the output and Converting to DCT-IV */
00178
00179   /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
00180   i = ((uint32_t) S->N - 1u) >> 2u;
00181
00182   /* pbuff initialized to input buffer. */
00183   pbuff = pInlineBuffer;
00184
00185   /* pS1 initialized to pState */
00186   pS1 = pState;
00187
00188   /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
00189   in = *pS1++ >> 1u;
00190   /* input buffer acts as inplace, so output values are stored in the input itself. */
00191   *pbuff++ = in;
00192
00193   /* pState pointer is incremented twice as the real values are located alternatively in the array */
00194   pS1++;
00195
00196   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00197    ** a second loop below computes the remaining 1 to 3 samples. */
00198   do
00199   {
00200     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
00201     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
00202     in = *pS1++ - in;
00203     *pbuff++ = in;
00204     /* points to the next real value */
00205     pS1++;
00206
00207     in = *pS1++ - in;
00208     *pbuff++ = in;
00209     pS1++;
00210
00211     in = *pS1++ - in;
00212     *pbuff++ = in;
00213     pS1++;
00214
00215     in = *pS1++ - in;
00216     *pbuff++ = in;
00217     pS1++;
00218
00219     /* Decrement the loop counter */
00220     i--;
00221   } while(i > 0u);
00222
00223   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00224    ** No loop unrolling is used. */
00225   i = ((uint32_t) S->N - 1u) % 0x4u;
00226
00227   while(i > 0u)
00228   {
00229     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
00230     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
00231     in = *pS1++ - in;
00232     *pbuff++ = in;
00233     /* points to the next real value */
00234     pS1++;
00235
00236     /* Decrement the loop counter */
00237     i--;
00238   }
00239
00240
00241    /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
00242
00243   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
00244   i = (uint32_t) S->N >> 2u;
00245
00246   /* pbuff initialized to the pInlineBuffer(now contains the output values) */
00247   pbuff = pInlineBuffer;
00248
00249   /* Processing with loop unrolling 4 times as N is always multiple of 4.  Compute 4 outputs at a time */
00250   do
00251   {
00252     /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
00253     in = *pbuff;
00254     *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
00255
00256     in = *pbuff;
00257     *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
00258
00259     in = *pbuff;
00260     *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
00261
00262     in = *pbuff;
00263     *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
00264
00265     /* Decrement the loop counter */
00266     i--;
00267   } while(i > 0u);
00268
00269
00270 #else
00271
00272   /* Run the below code for Cortex-M0 */
00273
00274   /* Initializing the loop counter to N/2 */
00275   i = (uint32_t) S->Nby2;
00276
00277   do
00278   {
00279     /* Re-ordering of even and odd elements */
00280     /* pState[i] =  pInlineBuffer[2*i] */
00281     *pS1++ = *pbuff++;
00282     /* pState[N-i-1] = pInlineBuffer[2*i+1] */
00283     *pS2-- = *pbuff++;
00284
00285     /* Decrement the loop counter */
00286     i--;
00287   } while(i > 0u);
00288
00289   /* pbuff initialized to input buffer */
00290   pbuff = pInlineBuffer;
00291
00292   /* pS1 initialized to pState */
00293   pS1 = pState;
00294
00295   /* Initializing the loop counter */
00296   i = (uint32_t) S->N;
00297
00298   do
00299   {
00300     /* Writing the re-ordered output back to inplace input buffer */
00301     *pbuff++ = *pS1++;
00302
00303     /* Decrement the loop counter */
00304     i--;
00305   } while(i > 0u);
00306
00307
00308   /* ---------------------------------------------------------
00309    *     Step2: Calculate RFFT for N-point input
00310    * ---------------------------------------------------------- */
00311   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
00312   arm_rfft_q15(S->pRfft, pInlineBuffer, pState);
00313
00314  /*----------------------------------------------------------------------
00315   *  Step3: Multiply the FFT output with the weights.
00316   *----------------------------------------------------------------------*/
00317   arm_cmplx_mult_cmplx_q15(pState, weights, pState, S->N);
00318
00319   /* The output of complex multiplication is in 3.13 format.
00320    * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */
00321   arm_shift_q15(pState, 2, pState, S->N * 2);
00322
00323   /* ----------- Post-processing ---------- */
00324   /* DCT-IV can be obtained from DCT-II by the equation,
00325    *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
00326    *       Hence, Y4(0) = Y2(0)/2  */
00327   /* Getting only real part from the output and Converting to DCT-IV */
00328
00329   /* Initializing the loop counter */
00330   i = ((uint32_t) S->N - 1u);
00331
00332   /* pbuff initialized to input buffer. */
00333   pbuff = pInlineBuffer;
00334
00335   /* pS1 initialized to pState */
00336   pS1 = pState;
00337
00338   /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
00339   in = *pS1++ >> 1u;
00340   /* input buffer acts as inplace, so output values are stored in the input itself. */
00341   *pbuff++ = in;
00342
00343   /* pState pointer is incremented twice as the real values are located alternatively in the array */
00344   pS1++;
00345
00346   do
00347   {
00348     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
00349     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
00350     in = *pS1++ - in;
00351     *pbuff++ = in;
00352     /* points to the next real value */
00353     pS1++;
00354
00355     /* Decrement the loop counter */
00356     i--;
00357   } while(i > 0u);
00358
00359    /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
00360
00361   /* Initializing the loop counter */
00362   i = (uint32_t) S->N;
00363
00364   /* pbuff initialized to the pInlineBuffer(now contains the output values) */
00365   pbuff = pInlineBuffer;
00366
00367   do
00368   {
00369     /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
00370     in = *pbuff;
00371     *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
00372
00373     /* Decrement the loop counter */
00374     i--;
00375   } while(i > 0u);
00376
00377 #endif /* #ifndef ARM_MATH_CM0 */
00378
00379 }
00380
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CMSIS DSP Software Library: arm_dct4_q31.c File Reference

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arm_dct4_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_dct4_q31 (const arm_dct4_instance_q31 *S, q31_t *pState, q31_t *pInlineBuffer)
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CMSIS DSP Software Library: arm_dct4_q31.c Source File

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arm_dct4_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_dct4_q31.c
00009 *
00010 * Description:  Processing function of DCT4 & IDCT4 Q31.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00053 void arm_dct4_q31(
00054   const arm_dct4_instance_q31 * S,
00055   q31_t * pState,
00056   q31_t * pInlineBuffer)
00057 {
00058   uint16_t i;                                    /* Loop counter */
00059   q31_t *weights = S->pTwiddle;                  /* Pointer to the Weights table */
00060   q31_t *cosFact = S->pCosFactor;                /* Pointer to the cos factors table */
00061   q31_t *pS1, *pS2, *pbuff;                      /* Temporary pointers for input buffer and pState buffer */
00062   q31_t in;                                      /* Temporary variable */
00063
00064
00065   /* DCT4 computation involves DCT2 (which is calculated using RFFT)
00066    * along with some pre-processing and post-processing.
00067    * Computational procedure is explained as follows:
00068    * (a) Pre-processing involves multiplying input with cos factor,
00069    *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))
00070    *              where,
00071    *                 r(n) -- output of preprocessing
00072    *                 u(n) -- input to preprocessing(actual Source buffer)
00073    * (b) Calculation of DCT2 using FFT is divided into three steps:
00074    *                  Step1: Re-ordering of even and odd elements of input.
00075    *                  Step2: Calculating FFT of the re-ordered input.
00076    *                  Step3: Taking the real part of the product of FFT output and weights.
00077    * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:
00078    *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
00079    *                        where,
00080    *                           Y4 -- DCT4 output,   Y2 -- DCT2 output
00081    * (d) Multiplying the output with the normalizing factor sqrt(2/N).
00082    */
00083
00084         /*-------- Pre-processing ------------*/
00085   /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
00086   arm_mult_q31(pInlineBuffer, cosFact, pInlineBuffer, S->N);
00087   arm_shift_q31(pInlineBuffer, 1, pInlineBuffer, S->N);
00088
00089   /* ----------------------------------------------------------------
00090    * Step1: Re-ordering of even and odd elements as
00091    *             pState[i] =  pInlineBuffer[2*i] and
00092    *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2
00093    ---------------------------------------------------------------------*/
00094
00095   /* pS1 initialized to pState */
00096   pS1 = pState;
00097
00098   /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
00099   pS2 = pState + (S->N - 1u);
00100
00101   /* pbuff initialized to input buffer */
00102   pbuff = pInlineBuffer;
00103
00104 #ifndef ARM_MATH_CM0
00105
00106   /* Run the below code for Cortex-M4 and Cortex-M3 */
00107
00108   /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
00109   i = S->Nby2 >> 2u;
00110
00111   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00112    ** a second loop below computes the remaining 1 to 3 samples. */
00113   do
00114   {
00115     /* Re-ordering of even and odd elements */
00116     /* pState[i] =  pInlineBuffer[2*i] */
00117     *pS1++ = *pbuff++;
00118     /* pState[N-i-1] = pInlineBuffer[2*i+1] */
00119     *pS2-- = *pbuff++;
00120
00121     *pS1++ = *pbuff++;
00122     *pS2-- = *pbuff++;
00123
00124     *pS1++ = *pbuff++;
00125     *pS2-- = *pbuff++;
00126
00127     *pS1++ = *pbuff++;
00128     *pS2-- = *pbuff++;
00129
00130     /* Decrement the loop counter */
00131     i--;
00132   } while(i > 0u);
00133
00134   /* pbuff initialized to input buffer */
00135   pbuff = pInlineBuffer;
00136
00137   /* pS1 initialized to pState */
00138   pS1 = pState;
00139
00140   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
00141   i = S->N >> 2u;
00142
00143   /* Processing with loop unrolling 4 times as N is always multiple of 4.
00144    * Compute 4 outputs at a time */
00145   do
00146   {
00147     /* Writing the re-ordered output back to inplace input buffer */
00148     *pbuff++ = *pS1++;
00149     *pbuff++ = *pS1++;
00150     *pbuff++ = *pS1++;
00151     *pbuff++ = *pS1++;
00152
00153     /* Decrement the loop counter */
00154     i--;
00155   } while(i > 0u);
00156
00157
00158   /* ---------------------------------------------------------
00159    *     Step2: Calculate RFFT for N-point input
00160    * ---------------------------------------------------------- */
00161   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
00162   arm_rfft_q31(S->pRfft, pInlineBuffer, pState);
00163
00164   /*----------------------------------------------------------------------
00165    *  Step3: Multiply the FFT output with the weights.
00166    *----------------------------------------------------------------------*/
00167   arm_cmplx_mult_cmplx_q31(pState, weights, pState, S->N);
00168
00169   /* The output of complex multiplication is in 3.29 format.
00170    * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */
00171   arm_shift_q31(pState, 2, pState, S->N * 2);
00172
00173   /* ----------- Post-processing ---------- */
00174   /* DCT-IV can be obtained from DCT-II by the equation,
00175    *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
00176    *       Hence, Y4(0) = Y2(0)/2  */
00177   /* Getting only real part from the output and Converting to DCT-IV */
00178
00179   /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
00180   i = (S->N - 1u) >> 2u;
00181
00182   /* pbuff initialized to input buffer. */
00183   pbuff = pInlineBuffer;
00184
00185   /* pS1 initialized to pState */
00186   pS1 = pState;
00187
00188   /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
00189   in = *pS1++ >> 1u;
00190   /* input buffer acts as inplace, so output values are stored in the input itself. */
00191   *pbuff++ = in;
00192
00193   /* pState pointer is incremented twice as the real values are located alternatively in the array */
00194   pS1++;
00195
00196   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00197    ** a second loop below computes the remaining 1 to 3 samples. */
00198   do
00199   {
00200     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
00201     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
00202     in = *pS1++ - in;
00203     *pbuff++ = in;
00204     /* points to the next real value */
00205     pS1++;
00206
00207     in = *pS1++ - in;
00208     *pbuff++ = in;
00209     pS1++;
00210
00211     in = *pS1++ - in;
00212     *pbuff++ = in;
00213     pS1++;
00214
00215     in = *pS1++ - in;
00216     *pbuff++ = in;
00217     pS1++;
00218
00219     /* Decrement the loop counter */
00220     i--;
00221   } while(i > 0u);
00222
00223   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00224    ** No loop unrolling is used. */
00225   i = (S->N - 1u) % 0x4u;
00226
00227   while(i > 0u)
00228   {
00229     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
00230     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
00231     in = *pS1++ - in;
00232     *pbuff++ = in;
00233     /* points to the next real value */
00234     pS1++;
00235
00236     /* Decrement the loop counter */
00237     i--;
00238   }
00239
00240
00241         /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
00242
00243   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
00244   i = S->N >> 2u;
00245
00246   /* pbuff initialized to the pInlineBuffer(now contains the output values) */
00247   pbuff = pInlineBuffer;
00248
00249   /* Processing with loop unrolling 4 times as N is always multiple of 4.  Compute 4 outputs at a time */
00250   do
00251   {
00252     /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
00253     in = *pbuff;
00254     *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
00255
00256     in = *pbuff;
00257     *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
00258
00259     in = *pbuff;
00260     *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
00261
00262     in = *pbuff;
00263     *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
00264
00265     /* Decrement the loop counter */
00266     i--;
00267   } while(i > 0u);
00268
00269
00270 #else
00271
00272   /* Run the below code for Cortex-M0 */
00273
00274   /* Initializing the loop counter to N/2 */
00275   i = S->Nby2;
00276
00277   do
00278   {
00279     /* Re-ordering of even and odd elements */
00280     /* pState[i] =  pInlineBuffer[2*i] */
00281     *pS1++ = *pbuff++;
00282     /* pState[N-i-1] = pInlineBuffer[2*i+1] */
00283     *pS2-- = *pbuff++;
00284
00285     /* Decrement the loop counter */
00286     i--;
00287   } while(i > 0u);
00288
00289   /* pbuff initialized to input buffer */
00290   pbuff = pInlineBuffer;
00291
00292   /* pS1 initialized to pState */
00293   pS1 = pState;
00294
00295   /* Initializing the loop counter */
00296   i = S->N;
00297
00298   do
00299   {
00300     /* Writing the re-ordered output back to inplace input buffer */
00301     *pbuff++ = *pS1++;
00302
00303     /* Decrement the loop counter */
00304     i--;
00305   } while(i > 0u);
00306
00307
00308   /* ---------------------------------------------------------
00309    *     Step2: Calculate RFFT for N-point input
00310    * ---------------------------------------------------------- */
00311   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
00312   arm_rfft_q31(S->pRfft, pInlineBuffer, pState);
00313
00314   /*----------------------------------------------------------------------
00315    *  Step3: Multiply the FFT output with the weights.
00316    *----------------------------------------------------------------------*/
00317   arm_cmplx_mult_cmplx_q31(pState, weights, pState, S->N);
00318
00319   /* The output of complex multiplication is in 3.29 format.
00320    * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */
00321   arm_shift_q31(pState, 2, pState, S->N * 2);
00322
00323   /* ----------- Post-processing ---------- */
00324   /* DCT-IV can be obtained from DCT-II by the equation,
00325    *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
00326    *       Hence, Y4(0) = Y2(0)/2  */
00327   /* Getting only real part from the output and Converting to DCT-IV */
00328
00329   /* pbuff initialized to input buffer. */
00330   pbuff = pInlineBuffer;
00331
00332   /* pS1 initialized to pState */
00333   pS1 = pState;
00334
00335   /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
00336   in = *pS1++ >> 1u;
00337   /* input buffer acts as inplace, so output values are stored in the input itself. */
00338   *pbuff++ = in;
00339
00340   /* pState pointer is incremented twice as the real values are located alternatively in the array */
00341   pS1++;
00342
00343   /* Initializing the loop counter */
00344   i = (S->N - 1u);
00345
00346   while(i > 0u)
00347   {
00348     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
00349     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
00350     in = *pS1++ - in;
00351     *pbuff++ = in;
00352     /* points to the next real value */
00353     pS1++;
00354
00355     /* Decrement the loop counter */
00356     i--;
00357   }
00358
00359
00360         /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
00361
00362   /* Initializing the loop counter */
00363   i = S->N;
00364
00365   /* pbuff initialized to the pInlineBuffer(now contains the output values) */
00366   pbuff = pInlineBuffer;
00367
00368   do
00369   {
00370     /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
00371     in = *pbuff;
00372     *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
00373
00374     /* Decrement the loop counter */
00375     i--;
00376   } while(i > 0u);
00377
00378 #endif /* #ifndef ARM_MATH_CM0 */
00379
00380 }
00381
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CMSIS DSP Software Library: arm_dot_prod_f32.c File Reference

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arm_dot_prod_f32.c File Reference

#include "arm_math.h"

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void arm_dot_prod_f32 (float32_t *pSrcA, float32_t *pSrcB, uint32_t blockSize, float32_t *result)
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CMSIS DSP Software Library: arm_dot_prod_f32.c Source File

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arm_dot_prod_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_dot_prod_f32.c
00009 *
00010 * Description:  Floating-point dot product.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00062 void arm_dot_prod_f32(
00063   float32_t * pSrcA,
00064   float32_t * pSrcB,
00065   uint32_t blockSize,
00066   float32_t * result)
00067 {
00068   float32_t sum = 0.0f;                          /* Temporary result storage */
00069   uint32_t blkCnt;                               /* loop counter */
00070
00071
00072 #ifndef ARM_MATH_CM0
00073
00074 /* Run the below code for Cortex-M4 and Cortex-M3 */
00075   /*loop Unrolling */
00076   blkCnt = blockSize >> 2u;
00077
00078   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00079    ** a second loop below computes the remaining 1 to 3 samples. */
00080   while(blkCnt > 0u)
00081   {
00082     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00083     /* Calculate dot product and then store the result in a temporary buffer */
00084     sum += (*pSrcA++) * (*pSrcB++);
00085     sum += (*pSrcA++) * (*pSrcB++);
00086     sum += (*pSrcA++) * (*pSrcB++);
00087     sum += (*pSrcA++) * (*pSrcB++);
00088
00089     /* Decrement the loop counter */
00090     blkCnt--;
00091   }
00092
00093   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00094    ** No loop unrolling is used. */
00095   blkCnt = blockSize % 0x4u;
00096
00097 #else
00098
00099   /* Run the below code for Cortex-M0 */
00100
00101   /* Initialize blkCnt with number of samples */
00102   blkCnt = blockSize;
00103
00104 #endif /* #ifndef ARM_MATH_CM0 */
00105
00106
00107   while(blkCnt > 0u)
00108   {
00109     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00110     /* Calculate dot product and then store the result in a temporary buffer. */
00111     sum += (*pSrcA++) * (*pSrcB++);
00112
00113     /* Decrement the loop counter */
00114     blkCnt--;
00115   }
00116   /* Store the result back in the destination buffer */
00117   *result = sum;
00118 }
00119
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CMSIS DSP Software Library: arm_dot_prod_q7.c File Reference

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arm_dot_prod_q7.c File Reference

#include "arm_math.h"

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Functions

void arm_dot_prod_q7 (q7_t *pSrcA, q7_t *pSrcB, uint32_t blockSize, q31_t *result)
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CMSIS DSP Software Library: arm_dot_prod_q7.c Source File

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arm_dot_prod_q7.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_dot_prod_q7.c
00009 *
00010 * Description:  Q7 dot product.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00061 void arm_dot_prod_q7(
00062   q7_t * pSrcA,
00063   q7_t * pSrcB,
00064   uint32_t blockSize,
00065   q31_t * result)
00066 {
00067   uint32_t blkCnt;                               /* loop counter */
00068
00069   q31_t sum = 0;                                 /* Temporary variables to store output */
00070
00071 #ifndef ARM_MATH_CM0
00072
00073 /* Run the below code for Cortex-M4 and Cortex-M3 */
00074
00075   q31_t input1, input2;                          /* Temporary variables to store input */
00076   q15_t in1, in2;                                /* Temporary variables to store input */
00077
00078
00079
00080   /*loop Unrolling */
00081   blkCnt = blockSize >> 2u;
00082
00083   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00084    ** a second loop below computes the remaining 1 to 3 samples. */
00085   while(blkCnt > 0u)
00086   {
00087     /* Reading two inputs of SrcA buffer and packing */
00088     in1 = (q15_t) * pSrcA++;
00089     in2 = (q15_t) * pSrcA++;
00090     input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00091
00092     /* Reading two inputs of SrcB buffer and packing */
00093     in1 = (q15_t) * pSrcB++;
00094     in2 = (q15_t) * pSrcB++;
00095     input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00096
00097     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00098     /* Perform Dot product of 2 packed inputs using SMLALD and store the result in a temporary variable. */
00099     sum = __SMLAD(input1, input2, sum);
00100
00101     /* Reading two inputs of SrcA buffer and packing */
00102     in1 = (q15_t) * pSrcA++;
00103     in2 = (q15_t) * pSrcA++;
00104     input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00105
00106     /* Reading two inputs of SrcB buffer and packing */
00107     in1 = (q15_t) * pSrcB++;
00108     in2 = (q15_t) * pSrcB++;
00109     input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00110
00111     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00112     /* Perform Dot product of 2 packed inputs using SMLALD and store the result in a temporary variable. */
00113     sum = __SMLAD(input1, input2, sum);
00114
00115
00116
00117     /* Decrement the loop counter */
00118     blkCnt--;
00119   }
00120
00121   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00122    ** No loop unrolling is used. */
00123   blkCnt = blockSize % 0x4u;
00124
00125   while(blkCnt > 0u)
00126   {
00127     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00128     /* Dot product and then store the results in a temporary buffer. */
00129     sum = __SMLAD(*pSrcA++, *pSrcB++, sum);
00130
00131     /* Decrement the loop counter */
00132     blkCnt--;
00133   }
00134
00135 #else
00136
00137   /* Run the below code for Cortex-M0 */
00138
00139
00140
00141   /* Initialize blkCnt with number of samples */
00142   blkCnt = blockSize;
00143
00144   while(blkCnt > 0u)
00145   {
00146     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00147     /* Dot product and then store the results in a temporary buffer. */
00148     sum += (q31_t) ((q15_t) * pSrcA++ * *pSrcB++);
00149
00150     /* Decrement the loop counter */
00151     blkCnt--;
00152   }
00153
00154 #endif /* #ifndef ARM_MATH_CM0 */
00155
00156
00157   /* Store the result in the destination buffer in 18.14 format */
00158   *result = sum;
00159 }
00160
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CMSIS DSP Software Library: arm_dot_prod_q15.c File Reference

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  • File List
  • Globals
Functions

arm_dot_prod_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_dot_prod_q15 (q15_t *pSrcA, q15_t *pSrcB, uint32_t blockSize, q63_t *result)
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CMSIS DSP Software Library: arm_dot_prod_q15.c Source File

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  • File List
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arm_dot_prod_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_dot_prod_q15.c
00009 *
00010 * Description:  Q15 dot product.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00061 void arm_dot_prod_q15(
00062   q15_t * pSrcA,
00063   q15_t * pSrcB,
00064   uint32_t blockSize,
00065   q63_t * result)
00066 {
00067   q63_t sum = 0;                                 /* Temporary result storage */
00068   uint32_t blkCnt;                               /* loop counter */
00069
00070 #ifndef ARM_MATH_CM0
00071
00072 /* Run the below code for Cortex-M4 and Cortex-M3 */
00073
00074
00075   /*loop Unrolling */
00076   blkCnt = blockSize >> 2u;
00077
00078   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00079    ** a second loop below computes the remaining 1 to 3 samples. */
00080   while(blkCnt > 0u)
00081   {
00082     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00083     /* Calculate dot product and then store the result in a temporary buffer. */
00084     sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
00085     sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
00086
00087     /* Decrement the loop counter */
00088     blkCnt--;
00089   }
00090
00091   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00092    ** No loop unrolling is used. */
00093   blkCnt = blockSize % 0x4u;
00094
00095   while(blkCnt > 0u)
00096   {
00097     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00098     /* Calculate dot product and then store the results in a temporary buffer. */
00099     sum = __SMLALD(*pSrcA++, *pSrcB++, sum);
00100
00101     /* Decrement the loop counter */
00102     blkCnt--;
00103   }
00104
00105
00106 #else
00107
00108   /* Run the below code for Cortex-M0 */
00109
00110   /* Initialize blkCnt with number of samples */
00111   blkCnt = blockSize;
00112
00113   while(blkCnt > 0u)
00114   {
00115     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00116     /* Calculate dot product and then store the results in a temporary buffer. */
00117     sum += (q63_t) ((q31_t) * pSrcA++ * *pSrcB++);
00118
00119     /* Decrement the loop counter */
00120     blkCnt--;
00121   }
00122
00123 #endif /* #ifndef ARM_MATH_CM0 */
00124
00125   /* Store the result in the destination buffer in 34.30 format */
00126   *result = sum;
00127
00128 }
00129
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CMSIS DSP Software Library: arm_dot_prod_q31.c File Reference

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  • File List
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Functions

arm_dot_prod_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_dot_prod_q31 (q31_t *pSrcA, q31_t *pSrcB, uint32_t blockSize, q63_t *result)
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
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CMSIS DSP Software Library: arm_dot_prod_q31.c Source File

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  • File List
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arm_dot_prod_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_dot_prod_q31.c
00009 *
00010 * Description:  Q31 dot product.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00062 void arm_dot_prod_q31(
00063   q31_t * pSrcA,
00064   q31_t * pSrcB,
00065   uint32_t blockSize,
00066   q63_t * result)
00067 {
00068   q63_t sum = 0;                                 /* Temporary result storage */
00069   uint32_t blkCnt;                               /* loop counter */
00070
00071
00072 #ifndef ARM_MATH_CM0
00073
00074 /* Run the below code for Cortex-M4 and Cortex-M3 */
00075
00076   /*loop Unrolling */
00077   blkCnt = blockSize >> 2u;
00078
00079   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00080    ** a second loop below computes the remaining 1 to 3 samples. */
00081   while(blkCnt > 0u)
00082   {
00083     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00084     /* Calculate dot product and then store the result in a temporary buffer. */
00085     sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u;
00086     sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u;
00087     sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u;
00088     sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u;
00089
00090     /* Decrement the loop counter */
00091     blkCnt--;
00092   }
00093
00094   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00095    ** No loop unrolling is used. */
00096   blkCnt = blockSize % 0x4u;
00097
00098 #else
00099
00100   /* Run the below code for Cortex-M0 */
00101
00102   /* Initialize blkCnt with number of samples */
00103   blkCnt = blockSize;
00104
00105 #endif /* #ifndef ARM_MATH_CM0 */
00106
00107
00108   while(blkCnt > 0u)
00109   {
00110     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
00111     /* Calculate dot product and then store the result in a temporary buffer. */
00112     sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u;
00113
00114     /* Decrement the loop counter */
00115     blkCnt--;
00116   }
00117
00118   /* Store the result in the destination buffer in 16.48 format */
00119   *result = sum;
00120 }
00121
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
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CMSIS DSP Software Library: arm_dotproduct_example_f32.c File Reference

  • Examples
  • File List
  • Globals
Defines | Functions | Variables

arm_dotproduct_example_f32.c File Reference

#include <math.h>
#include "arm_math.h"

Go to the source code of this file.

Defines

#define | MAX_BLOCKSIZE 32
#define | DELTA (0.000001f)

Functions

int32_t | main (void)

Variables

float32_t | srcA_buf_f32 [MAX_BLOCKSIZE]
float32_t | srcB_buf_f32 [MAX_BLOCKSIZE]
float32_t | refDotProdOut = 5.9273644806352142
float32_t | multOutput [MAX_BLOCKSIZE]
float32_t testOutput
arm_status status

Define Documentation

#define MAX_BLOCKSIZE 32

Definition at line 76 of file arm_dotproduct_example_f32.c.

#define DELTA (0.000001f)

Definition at line 77 of file arm_dotproduct_example_f32.c.

Function Documentation

int32_t main ( void )

Definition at line 130 of file arm_dotproduct_example_f32.c.

Variable Documentation

float32_t srcA_buf_f32[MAX_BLOCKSIZE]
Initial value:

{
-0.4325648115282207,    -1.6655843782380970,    0.1253323064748307,
 0.2876764203585489,    -1.1464713506814637,    1.1909154656429988,
 1.1891642016521031,    -0.0376332765933176,    0.3272923614086541,
 0.1746391428209245,    -0.1867085776814394,    0.7257905482933027,
-0.5883165430141887,     2.1831858181971011,   -0.1363958830865957,
 0.1139313135208096,     1.0667682113591888,    0.0592814605236053,
-0.0956484054836690,    -0.8323494636500225,    0.2944108163926404,
-1.3361818579378040,     0.7143245518189522,    1.6235620644462707,
-0.6917757017022868,     0.8579966728282626,    1.2540014216025324,
-1.5937295764474768,    -1.4409644319010200,    0.5711476236581780,
-0.3998855777153632,     0.6899973754643451
}
Examples:
arm_dotproduct_example_f32.c.

Definition at line 86 of file arm_dotproduct_example_f32.c.

float32_t srcB_buf_f32[MAX_BLOCKSIZE]
Initial value:

{
 1.7491401329284098,    0.1325982188803279,  0.3252281811989881,
-0.7938091410349637,    0.3149236145048914, -0.5272704888029532,
 0.9322666565031119,    1.1646643544607362, -2.0456694357357357,
-0.6443728590041911,    1.7410657940825480,  0.4867684246821860,
 1.0488288293660140,    1.4885752747099299,  1.2705014969484090,
-1.8561241921210170,    2.1343209047321410,  1.4358467535865909,
-0.9173023332875400,   -1.1060770780029008,  0.8105708062681296,
 0.6985430696369063,   -0.4015827425012831,  1.2687512030669628,
-0.7836083053674872,    0.2132664971465569,  0.7878984786088954,
 0.8966819356782295,   -0.1869172943544062,  1.0131816724341454,
 0.2484350696132857,    0.0596083377937976
}
Examples:
arm_dotproduct_example_f32.c.

Definition at line 104 of file arm_dotproduct_example_f32.c.

float32_t refDotProdOut = 5.9273644806352142
Examples:
arm_dotproduct_example_f32.c.

Definition at line 120 of file arm_dotproduct_example_f32.c.

float32_t multOutput[MAX_BLOCKSIZE]
Examples:
arm_dotproduct_example_f32.c.

Definition at line 125 of file arm_dotproduct_example_f32.c.

float32_t testOutput

Definition at line 126 of file arm_dotproduct_example_f32.c.

arm_status status
Examples:
arm_convolution_example_f32.c, arm_dotproduct_example_f32.c, arm_fft_bin_example_f32.c, arm_fir_example_f32.c, arm_graphic_equalizer_example_q31.c, arm_linear_interp_example_f32.c, arm_matrix_example_f32.c, arm_signal_converge_example_f32.c, arm_sin_cos_example_f32.c, and arm_variance_example_f32.c.

Definition at line 128 of file arm_dotproduct_example_f32.c.

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CMSIS DSP Software Library: arm_dotproduct_example_f32.c Source File

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  • File List
  • Globals

arm_dotproduct_example_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        29. November 2010
00005 * $Revision:    V1.0.3
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_dotproduct_example_f32.c
00009 *
00010 * Description:  Example code computing dot product of two vectors.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 *
00015 * Version 1.0.3 2010/11/29
00016 *    Re-organized the CMSIS folders and updated documentation.
00017 *
00018 * Version 1.0.1 2010/10/05 KK
00019 *    Production release and review comments incorporated.
00020 *
00021 * Version 1.0.0 2010/09/20 KK
00022 *    Production release and review comments incorporated.
00023 * ------------------------------------------------------------------- */
00024
00070 #include <math.h>
00071 #include "arm_math.h"
00072
00073 /* ----------------------------------------------------------------------
00074 * Defines each of the tests performed
00075 * ------------------------------------------------------------------- */
00076 #define MAX_BLOCKSIZE   32
00077 #define DELTA           (0.000001f)
00078
00079 /* ----------------------------------------------------------------------
00080 * Test input data for Floating point Dot Product example for 32-blockSize
00081 * Generated by the MATLAB randn() function
00082 * ------------------------------------------------------------------- */
00083 /* ----------------------------------------------------------------------
00084 ** Test input data of srcA for blockSize 32
00085 ** ------------------------------------------------------------------- */
00086 float32_t srcA_buf_f32[MAX_BLOCKSIZE] =
00087 {
00088 -0.4325648115282207,    -1.6655843782380970,    0.1253323064748307,
00089  0.2876764203585489,    -1.1464713506814637,    1.1909154656429988,
00090  1.1891642016521031,    -0.0376332765933176,    0.3272923614086541,
00091  0.1746391428209245,    -0.1867085776814394,    0.7257905482933027,
00092 -0.5883165430141887,     2.1831858181971011,   -0.1363958830865957,
00093  0.1139313135208096,     1.0667682113591888,    0.0592814605236053,
00094 -0.0956484054836690,    -0.8323494636500225,    0.2944108163926404,
00095 -1.3361818579378040,     0.7143245518189522,    1.6235620644462707,
00096 -0.6917757017022868,     0.8579966728282626,    1.2540014216025324,
00097 -1.5937295764474768,    -1.4409644319010200,    0.5711476236581780,
00098 -0.3998855777153632,     0.6899973754643451
00099 };
00100
00101 /* ----------------------------------------------------------------------
00102 ** Test input data of srcB for blockSize 32
00103 ** ------------------------------------------------------------------- */
00104 float32_t srcB_buf_f32[MAX_BLOCKSIZE] =
00105 {
00106  1.7491401329284098,    0.1325982188803279,  0.3252281811989881,
00107 -0.7938091410349637,    0.3149236145048914, -0.5272704888029532,
00108  0.9322666565031119,    1.1646643544607362, -2.0456694357357357,
00109 -0.6443728590041911,    1.7410657940825480,  0.4867684246821860,
00110  1.0488288293660140,    1.4885752747099299,  1.2705014969484090,
00111 -1.8561241921210170,    2.1343209047321410,  1.4358467535865909,
00112 -0.9173023332875400,   -1.1060770780029008,  0.8105708062681296,
00113  0.6985430696369063,   -0.4015827425012831,  1.2687512030669628,
00114 -0.7836083053674872,    0.2132664971465569,  0.7878984786088954,
00115  0.8966819356782295,   -0.1869172943544062,  1.0131816724341454,
00116  0.2484350696132857,    0.0596083377937976
00117 };
00118
00119 /* Reference dot product output */
00120 float32_t  refDotProdOut = 5.9273644806352142;
00121
00122 /* ----------------------------------------------------------------------
00123 * Declare Global variables
00124 * ------------------------------------------------------------------- */
00125 float32_t multOutput[MAX_BLOCKSIZE];  /* Intermediate output */
00126 float32_t testOutput;  /* Final ouput */
00127
00128 arm_status status;   /* Status of the example */
00129
00130 int32_t main(void)
00131 {
00132     uint32_t i;          /* Loop counter */
00133     float32_t diff;      /* Difference between reference and test outputs */
00134
00135     /* Multiplication of two input buffers */
00136     arm_mult_f32(srcA_buf_f32, srcB_buf_f32, multOutput, MAX_BLOCKSIZE);
00137
00138     /* Accumulate the multiplication output values to
00139        get the dot product of the two inputs */
00140     for(i=0; i< MAX_BLOCKSIZE; i++)
00141     {
00142         arm_add_f32(&testOutput, &multOutput[i], &testOutput, 1);
00143     }
00144
00145     /* absolute value of difference between ref and test */
00146     diff = fabsf(refDotProdOut - testOutput);
00147
00148     /* Comparison of dot product value with reference */
00149     if(diff > DELTA)
00150     {
00151         status = ARM_MATH_TEST_FAILURE;
00152     }
00153
00154     if( status == ARM_MATH_TEST_FAILURE)
00155     {
00156       while(1);
00157     }
00158 }
00159
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CMSIS DSP Software Library: arm_fft_bin_example_f32.c File Reference

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  • File List
  • Globals
Defines | Functions | Variables

arm_fft_bin_example_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Defines

#define | TEST_LENGTH_SAMPLES 2048

Functions

int32_t | main (void)

Variables

float32_t | testInput_f32_10khz [TEST_LENGTH_SAMPLES]
static float32_t | testOutput [TEST_LENGTH_SAMPLES/2]
uint32_t | fftSize = 1024
uint32_t | ifftFlag = 0
uint32_t | doBitReverse = 1
uint32_t | refIndex = 213
uint32_t | testIndex = 0

Define Documentation

#define TEST_LENGTH_SAMPLES 2048

Definition at line 84 of file arm_fft_bin_example_f32.c.

Function Documentation

int32_t main ( void )

Definition at line 106 of file arm_fft_bin_example_f32.c.

Variable Documentation

float32_t testInput_f32_10khz[TEST_LENGTH_SAMPLES]
Examples:
arm_fft_bin_example_f32.c.
float32_t testOutput[TEST_LENGTH_SAMPLES/2] [static]

Definition at line 90 of file arm_fft_bin_example_f32.c.

uint32_t fftSize = 1024
Examples:
arm_fft_bin_example_f32.c.

Definition at line 95 of file arm_fft_bin_example_f32.c.

uint32_t ifftFlag = 0
Examples:
arm_fft_bin_example_f32.c.

Definition at line 96 of file arm_fft_bin_example_f32.c.

uint32_t doBitReverse = 1
Examples:
arm_fft_bin_example_f32.c.

Definition at line 97 of file arm_fft_bin_example_f32.c.

uint32_t refIndex = 213
Examples:
arm_fft_bin_example_f32.c.

Definition at line 100 of file arm_fft_bin_example_f32.c.

uint32_t testIndex = 0
Examples:
arm_fft_bin_example_f32.c.

Definition at line 100 of file arm_fft_bin_example_f32.c.

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CMSIS DSP Software Library: arm_fft_bin_example_f32.c Source File

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arm_fft_bin_example_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        29. November 2010
00005 * $Revision:    V1.0.3
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fft_bin_example_f32.c
00009 *
00010 * Description:  Example code demonstrating calculation of Max energy bin of
00011 *               frequency domain of input signal.
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3
00014 *
00015 *
00016 * Version 1.0.3 2010/11/29
00017 *    Re-organized the CMSIS folders and updated documentation.
00018 *
00019 * Version 1.0.1 2010/10/05 KK
00020 *    Production release and review comments incorporated.
00021 *
00022 * Version 1.0.0 2010/09/20 KK
00023 *    Production release and review comments incorporated.
00024 * ------------------------------------------------------------------- */
00025
00082 #include "arm_math.h"
00083
00084 #define TEST_LENGTH_SAMPLES 2048
00085
00086 /* -------------------------------------------------------------------
00087 * External Input and Output buffer Declarations for FFT Bin Example
00088 * ------------------------------------------------------------------- */
00089 extern float32_t testInput_f32_10khz[TEST_LENGTH_SAMPLES];
00090 static float32_t testOutput[TEST_LENGTH_SAMPLES/2];
00091
00092 /* ------------------------------------------------------------------
00093 * Global variables for FFT Bin Example
00094 * ------------------------------------------------------------------- */
00095 uint32_t fftSize = 1024;
00096 uint32_t ifftFlag = 0;
00097 uint32_t doBitReverse = 1;
00098
00099 /* Reference index at which max energy of bin ocuurs */
00100 uint32_t refIndex = 213, testIndex = 0;
00101
00102 /* ----------------------------------------------------------------------
00103 * Max magnitude FFT Bin test
00104 * ------------------------------------------------------------------- */
00105
00106 int32_t main(void)
00107 {
00108
00109     arm_status status;
00110     arm_cfft_radix4_instance_f32 S;
00111     float32_t maxValue;
00112
00113     status = ARM_MATH_SUCCESS;
00114
00115     /* Initialize the CFFT/CIFFT module */
00116     status = arm_cfft_radix4_init_f32(&S, fftSize,
00117                                     ifftFlag, doBitReverse);
00118
00119     /* Process the data through the CFFT/CIFFT module */
00120     arm_cfft_radix4_f32(&S, testInput_f32_10khz);
00121
00122
00123     /* Process the data through the Complex Magnitude Module for
00124     calculating the magnitude at each bin */
00125     arm_cmplx_mag_f32(testInput_f32_10khz, testOutput,
00126                     fftSize);
00127
00128     /* Calculates maxValue and returns corresponding BIN value */
00129     arm_max_f32(testOutput, fftSize, &maxValue, &testIndex);
00130
00131     if(testIndex !=  refIndex)
00132     {
00133         status = ARM_MATH_TEST_FAILURE;
00134     }
00135
00136     /* ----------------------------------------------------------------------
00137     ** Loop here if the signals fail the PASS check.
00138     ** This denotes a test failure
00139     ** ------------------------------------------------------------------- */
00140
00141     if( status != ARM_MATH_SUCCESS)
00142     {
00143         while(1);
00144     }
00145 }
00146
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CMSIS DSP Software Library: arm_fill_f32.c File Reference

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arm_fill_f32.c File Reference

#include "arm_math.h"

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Functions

void arm_fill_f32 (float32_t value, float32_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fill_f32.c Source File

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arm_fill_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fill_f32.c
00009 *
00010 * Description:  Fills a constant value into a floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00066 void arm_fill_f32(
00067   float32_t value,
00068   float32_t * pDst,
00069   uint32_t blockSize)
00070 {
00071   uint32_t blkCnt;                               /* loop counter */
00072
00073 #ifndef ARM_MATH_CM0
00074
00075   /* Run the below code for Cortex-M4 and Cortex-M3 */
00076
00077   /*loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079
00080   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00081    ** a second loop below computes the remaining 1 to 3 samples. */
00082   while(blkCnt > 0u)
00083   {
00084     /* C = value */
00085     /* Fill the value in the destination buffer */
00086     *pDst++ = value;
00087     *pDst++ = value;
00088     *pDst++ = value;
00089     *pDst++ = value;
00090
00091     /* Decrement the loop counter */
00092     blkCnt--;
00093   }
00094
00095   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00096    ** No loop unrolling is used. */
00097   blkCnt = blockSize % 0x4u;
00098
00099 #else
00100
00101   /* Run the below code for Cortex-M0 */
00102
00103   /* Loop over blockSize number of values */
00104   blkCnt = blockSize;
00105
00106 #endif /* #ifndef ARM_MATH_CM0 */
00107
00108
00109   while(blkCnt > 0u)
00110   {
00111     /* C = value */
00112     /* Fill the value in the destination buffer */
00113     *pDst++ = value;
00114
00115     /* Decrement the loop counter */
00116     blkCnt--;
00117   }
00118 }
00119
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CMSIS DSP Software Library: arm_fill_q7.c File Reference

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arm_fill_q7.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fill_q7 (q7_t value, q7_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fill_q7.c Source File

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arm_fill_q7.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fill_q7.c
00009 *
00010 * Description:  Fills a constant value into a Q7 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00053 void arm_fill_q7(
00054   q7_t value,
00055   q7_t * pDst,
00056   uint32_t blockSize)
00057 {
00058   uint32_t blkCnt;                               /* loop counter */
00059
00060 #ifndef ARM_MATH_CM0
00061
00062   /* Run the below code for Cortex-M4 and Cortex-M3 */
00063
00064   q31_t packedValue;                             /* value packed to 32 bits */
00065
00066   /*loop Unrolling */
00067   blkCnt = blockSize >> 2u;
00068
00069   /* Packing four 8 bit values to 32 bit value in order to use SIMD */
00070   packedValue = __PACKq7(value, value, value, value);
00071
00072   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00073    ** a second loop below computes the remaining 1 to 3 samples. */
00074   while(blkCnt > 0u)
00075   {
00076     /* C = value */
00077     /* Fill the value in the destination buffer */
00078     *__SIMD32(pDst)++ = packedValue;
00079
00080     /* Decrement the loop counter */
00081     blkCnt--;
00082   }
00083
00084   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00085    ** No loop unrolling is used. */
00086   blkCnt = blockSize % 0x4u;
00087
00088 #else
00089
00090   /* Run the below code for Cortex-M0 */
00091
00092   /* Loop over blockSize number of values */
00093   blkCnt = blockSize;
00094
00095 #endif /* #ifndef ARM_MATH_CM0 */
00096
00097   while(blkCnt > 0u)
00098   {
00099     /* C = value */
00100     /* Fill the value in the destination buffer */
00101     *pDst++ = value;
00102
00103     /* Decrement the loop counter */
00104     blkCnt--;
00105   }
00106 }
00107
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CMSIS DSP Software Library: arm_fill_q15.c File Reference

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arm_fill_q15.c File Reference

#include "arm_math.h"

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Functions

void arm_fill_q15 (q15_t value, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fill_q15.c Source File

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arm_fill_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fill_q15.c
00009 *
00010 * Description:  Fills a constant value into a Q15 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00053 void arm_fill_q15(
00054   q15_t value,
00055   q15_t * pDst,
00056   uint32_t blockSize)
00057 {
00058   uint32_t blkCnt;                               /* loop counter */
00059
00060 #ifndef ARM_MATH_CM0
00061
00062   /* Run the below code for Cortex-M4 and Cortex-M3 */
00063
00064   q31_t packedValue;                             /* value packed to 32 bits */
00065
00066
00067   /*loop Unrolling */
00068   blkCnt = blockSize >> 2u;
00069
00070   /* Packing two 16 bit values to 32 bit value in order to use SIMD */
00071   packedValue = __PKHBT(value, value, 16u);
00072
00073   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00074    ** a second loop below computes the remaining 1 to 3 samples. */
00075   while(blkCnt > 0u)
00076   {
00077     /* C = value */
00078     /* Fill the value in the destination buffer */
00079     *__SIMD32(pDst)++ = packedValue;
00080     *__SIMD32(pDst)++ = packedValue;
00081
00082     /* Decrement the loop counter */
00083     blkCnt--;
00084   }
00085
00086   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00087    ** No loop unrolling is used. */
00088   blkCnt = blockSize % 0x4u;
00089
00090 #else
00091
00092   /* Run the below code for Cortex-M0 */
00093
00094   /* Loop over blockSize number of values */
00095   blkCnt = blockSize;
00096
00097 #endif /* #ifndef ARM_MATH_CM0 */
00098
00099   while(blkCnt > 0u)
00100   {
00101     /* C = value */
00102     /* Fill the value in the destination buffer */
00103     *pDst++ = value;
00104
00105     /* Decrement the loop counter */
00106     blkCnt--;
00107   }
00108 }
00109
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CMSIS DSP Software Library: arm_fill_q31.c File Reference

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arm_fill_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_fill_q31 (q31_t value, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fill_q31.c Source File

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arm_fill_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fill_q31.c
00009 *
00010 * Description:  Fills a constant value into a Q31 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00053 void arm_fill_q31(
00054   q31_t value,
00055   q31_t * pDst,
00056   uint32_t blockSize)
00057 {
00058   uint32_t blkCnt;                               /* loop counter */
00059
00060
00061 #ifndef ARM_MATH_CM0
00062
00063   /* Run the below code for Cortex-M4 and Cortex-M3 */
00064
00065   /*loop Unrolling */
00066   blkCnt = blockSize >> 2u;
00067
00068   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00069    ** a second loop below computes the remaining 1 to 3 samples. */
00070   while(blkCnt > 0u)
00071   {
00072     /* C = value */
00073     /* Fill the value in the destination buffer */
00074     *pDst++ = value;
00075     *pDst++ = value;
00076     *pDst++ = value;
00077     *pDst++ = value;
00078
00079     /* Decrement the loop counter */
00080     blkCnt--;
00081   }
00082
00083   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00084    ** No loop unrolling is used. */
00085   blkCnt = blockSize % 0x4u;
00086
00087 #else
00088
00089   /* Run the below code for Cortex-M0 */
00090
00091   /* Loop over blockSize number of values */
00092   blkCnt = blockSize;
00093
00094 #endif /* #ifndef ARM_MATH_CM0 */
00095
00096   while(blkCnt > 0u)
00097   {
00098     /* C = value */
00099     /* Fill the value in the destination buffer */
00100     *pDst++ = value;
00101
00102     /* Decrement the loop counter */
00103     blkCnt--;
00104   }
00105 }
00106
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CMSIS DSP Software Library: arm_fir_decimate_f32.c File Reference

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arm_fir_decimate_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_decimate_f32 (const arm_fir_decimate_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_decimate_f32.c Source File

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arm_fir_decimate_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_decimate_f32.c
00009 *
00010 * Description:  FIR decimation for floating-point sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00132 void arm_fir_decimate_f32(
00133   const arm_fir_decimate_instance_f32 * S,
00134   float32_t * pSrc,
00135   float32_t * pDst,
00136   uint32_t blockSize)
00137 {
00138   float32_t *pState = S->pState;                 /* State pointer */
00139   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
00140   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
00141   float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
00142   float32_t sum0;                                /* Accumulator */
00143   float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
00144   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00145   uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
00146
00147 #ifndef ARM_MATH_CM0
00148
00149   /* Run the below code for Cortex-M4 and Cortex-M3 */
00150
00151   /* S->pState buffer contains previous frame (numTaps - 1) samples */
00152   /* pStateCurnt points to the location where the new input data should be written */
00153   pStateCurnt = S->pState + (numTaps - 1u);
00154
00155   /* Total number of output samples to be computed */
00156   blkCnt = outBlockSize;
00157
00158   while(blkCnt > 0u)
00159   {
00160     /* Copy decimation factor number of new input samples into the state buffer */
00161     i = S->M;
00162
00163     do
00164     {
00165       *pStateCurnt++ = *pSrc++;
00166
00167     } while(--i);
00168
00169     /* Set accumulator to zero */
00170     sum0 = 0.0f;
00171
00172     /* Initialize state pointer */
00173     px = pState;
00174
00175     /* Initialize coeff pointer */
00176     pb = pCoeffs;
00177
00178     /* Loop unrolling.  Process 4 taps at a time. */
00179     tapCnt = numTaps >> 2;
00180
00181     /* Loop over the number of taps.  Unroll by a factor of 4.
00182      ** Repeat until we've computed numTaps-4 coefficients. */
00183     while(tapCnt > 0u)
00184     {
00185       /* Read the b[numTaps-1] coefficient */
00186       c0 = *(pb++);
00187
00188       /* Read x[n-numTaps-1] sample */
00189       x0 = *(px++);
00190
00191       /* Perform the multiply-accumulate */
00192       sum0 += x0 * c0;
00193
00194       /* Read the b[numTaps-2] coefficient */
00195       c0 = *(pb++);
00196
00197       /* Read x[n-numTaps-2] sample */
00198       x0 = *(px++);
00199
00200       /* Perform the multiply-accumulate */
00201       sum0 += x0 * c0;
00202
00203       /* Read the b[numTaps-3] coefficient */
00204       c0 = *(pb++);
00205
00206       /* Read x[n-numTaps-3] sample */
00207       x0 = *(px++);
00208
00209       /* Perform the multiply-accumulate */
00210       sum0 += x0 * c0;
00211
00212       /* Read the b[numTaps-4] coefficient */
00213       c0 = *(pb++);
00214
00215       /* Read x[n-numTaps-4] sample */
00216       x0 = *(px++);
00217
00218       /* Perform the multiply-accumulate */
00219       sum0 += x0 * c0;
00220
00221       /* Decrement the loop counter */
00222       tapCnt--;
00223     }
00224
00225     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00226     tapCnt = numTaps % 0x4u;
00227
00228     while(tapCnt > 0u)
00229     {
00230       /* Read coefficients */
00231       c0 = *(pb++);
00232
00233       /* Fetch 1 state variable */
00234       x0 = *(px++);
00235
00236       /* Perform the multiply-accumulate */
00237       sum0 += x0 * c0;
00238
00239       /* Decrement the loop counter */
00240       tapCnt--;
00241     }
00242
00243     /* Advance the state pointer by the decimation factor
00244      * to process the next group of decimation factor number samples */
00245     pState = pState + S->M;
00246
00247     /* The result is in the accumulator, store in the destination buffer. */
00248     *pDst++ = sum0;
00249
00250     /* Decrement the loop counter */
00251     blkCnt--;
00252   }
00253
00254   /* Processing is complete.
00255    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00256    ** This prepares the state buffer for the next function call. */
00257
00258   /* Points to the start of the state buffer */
00259   pStateCurnt = S->pState;
00260
00261   i = (numTaps - 1u) >> 2;
00262
00263   /* copy data */
00264   while(i > 0u)
00265   {
00266     *pStateCurnt++ = *pState++;
00267     *pStateCurnt++ = *pState++;
00268     *pStateCurnt++ = *pState++;
00269     *pStateCurnt++ = *pState++;
00270
00271     /* Decrement the loop counter */
00272     i--;
00273   }
00274
00275   i = (numTaps - 1u) % 0x04u;
00276
00277   /* copy data */
00278   while(i > 0u)
00279   {
00280     *pStateCurnt++ = *pState++;
00281
00282     /* Decrement the loop counter */
00283     i--;
00284   }
00285
00286 #else
00287
00288 /* Run the below code for Cortex-M0 */
00289
00290   /* S->pState buffer contains previous frame (numTaps - 1) samples */
00291   /* pStateCurnt points to the location where the new input data should be written */
00292   pStateCurnt = S->pState + (numTaps - 1u);
00293
00294   /* Total number of output samples to be computed */
00295   blkCnt = outBlockSize;
00296
00297   while(blkCnt > 0u)
00298   {
00299     /* Copy decimation factor number of new input samples into the state buffer */
00300     i = S->M;
00301
00302     do
00303     {
00304       *pStateCurnt++ = *pSrc++;
00305
00306     } while(--i);
00307
00308     /* Set accumulator to zero */
00309     sum0 = 0.0f;
00310
00311     /* Initialize state pointer */
00312     px = pState;
00313
00314     /* Initialize coeff pointer */
00315     pb = pCoeffs;
00316
00317     tapCnt = numTaps;
00318
00319     while(tapCnt > 0u)
00320     {
00321       /* Read coefficients */
00322       c0 = *pb++;
00323
00324       /* Fetch 1 state variable */
00325       x0 = *px++;
00326
00327       /* Perform the multiply-accumulate */
00328       sum0 += x0 * c0;
00329
00330       /* Decrement the loop counter */
00331       tapCnt--;
00332     }
00333
00334     /* Advance the state pointer by the decimation factor
00335      * to process the next group of decimation factor number samples */
00336     pState = pState + S->M;
00337
00338     /* The result is in the accumulator, store in the destination buffer. */
00339     *pDst++ = sum0;
00340
00341     /* Decrement the loop counter */
00342     blkCnt--;
00343   }
00344
00345   /* Processing is complete.
00346    ** Now copy the last numTaps - 1 samples to the start of the state buffer.
00347    ** This prepares the state buffer for the next function call. */
00348
00349   /* Points to the start of the state buffer */
00350   pStateCurnt = S->pState;
00351
00352   /* Copy numTaps number of values */
00353   i = (numTaps - 1u);
00354
00355   /* copy data */
00356   while(i > 0u)
00357   {
00358     *pStateCurnt++ = *pState++;
00359
00360     /* Decrement the loop counter */
00361     i--;
00362   }
00363
00364 #endif /*   #ifndef ARM_MATH_CM0        */
00365
00366 }
00367
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CMSIS DSP Software Library: arm_fir_decimate_fast_q15.c File Reference

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arm_fir_decimate_fast_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_decimate_fast_q15 (const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_decimate_fast_q15.c Source File

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arm_fir_decimate_fast_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_decimate_fast_q15.c
00009 *
00010 * Description:  Fast Q15 FIR Decimator.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00063 void arm_fir_decimate_fast_q15(
00064   const arm_fir_decimate_instance_q15 * S,
00065   q15_t * pSrc,
00066   q15_t * pDst,
00067   uint32_t blockSize)
00068 {
00069   q15_t *pState = S->pState;                     /* State pointer */
00070   q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00071   q15_t *pStateCurnt;                            /* Points to the current sample of the state */
00072   q15_t *px;                                     /* Temporary pointer for state buffer */
00073   q15_t *pb;                                     /* Temporary pointer coefficient buffer */
00074   q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
00075   q31_t sum0;                                    /* Accumulators */
00076   uint32_t numTaps = S->numTaps;                 /* Number of taps */
00077   uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
00078
00079
00080   /* S->pState buffer contains previous frame (numTaps - 1) samples */
00081   /* pStateCurnt points to the location where the new input data should be written */
00082   pStateCurnt = S->pState + (numTaps - 1u);
00083
00084   /* Total number of output samples to be computed */
00085   blkCnt = outBlockSize;
00086
00087   while(blkCnt > 0u)
00088   {
00089     /* Copy decimation factor number of new input samples into the state buffer */
00090     i = S->M;
00091
00092     do
00093     {
00094       *pStateCurnt++ = *pSrc++;
00095
00096     } while(--i);
00097
00098     /*Set sum to zero */
00099     sum0 = 0;
00100
00101     /* Initialize state pointer */
00102     px = pState;
00103
00104     /* Initialize coeff pointer */
00105     pb = pCoeffs;
00106
00107     /* Loop unrolling.  Process 4 taps at a time. */
00108     tapCnt = numTaps >> 2;
00109
00110     /* Loop over the number of taps.  Unroll by a factor of 4.
00111      ** Repeat until we've computed numTaps-4 coefficients. */
00112     while(tapCnt > 0u)
00113     {
00114       /* Read the Read b[numTaps-1] and b[numTaps-2]  coefficients */
00115       c0 = *__SIMD32(pb)++;
00116
00117       /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
00118       x0 = *__SIMD32(px)++;
00119
00120       /* Perform the multiply-accumulate */
00121       sum0 = __SMLAD(x0, c0, sum0);
00122
00123       /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
00124       c0 = *__SIMD32(pb)++;
00125
00126       /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
00127       x0 = *__SIMD32(px)++;
00128
00129       /* Perform the multiply-accumulate */
00130       sum0 = __SMLAD(x0, c0, sum0);
00131
00132       /* Decrement the loop counter */
00133       tapCnt--;
00134     }
00135
00136     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00137     tapCnt = numTaps % 0x4u;
00138
00139     while(tapCnt > 0u)
00140     {
00141       /* Read coefficients */
00142       c0 = *pb++;
00143
00144       /* Fetch 1 state variable */
00145       x0 = *px++;
00146
00147       /* Perform the multiply-accumulate */
00148       sum0 = __SMLAD(x0, c0, sum0);
00149
00150       /* Decrement the loop counter */
00151       tapCnt--;
00152     }
00153
00154     /* Advance the state pointer by the decimation factor
00155      * to process the next group of decimation factor number samples */
00156     pState = pState + S->M;
00157
00158     /* Store filter output , smlad returns the values in 2.14 format */
00159     /* so downsacle by 15 to get output in 1.15 */
00160     *pDst++ = (q15_t) ((sum0 >> 15));
00161
00162     /* Decrement the loop counter */
00163     blkCnt--;
00164   }
00165
00166   /* Processing is complete.
00167    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00168    ** This prepares the state buffer for the next function call. */
00169
00170   /* Points to the start of the state buffer */
00171   pStateCurnt = S->pState;
00172
00173   i = (numTaps - 1u) >> 2u;
00174
00175   /* copy data */
00176   while(i > 0u)
00177   {
00178     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00179     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00180
00181     /* Decrement the loop counter */
00182     i--;
00183   }
00184
00185   i = (numTaps - 1u) % 0x04u;
00186
00187   /* copy data */
00188   while(i > 0u)
00189   {
00190     *pStateCurnt++ = *pState++;
00191
00192     /* Decrement the loop counter */
00193     i--;
00194   }
00195 }
00196
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CMSIS DSP Software Library: arm_fir_decimate_fast_q31.c File Reference

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arm_fir_decimate_fast_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_decimate_fast_q31 (arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_decimate_fast_q31.c Source File

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arm_fir_decimate_fast_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_decimate_fast_q31.c
00009 *
00010 * Description:  Fast Q31 FIR Decimator.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00065 void arm_fir_decimate_fast_q31(
00066   arm_fir_decimate_instance_q31 * S,
00067   q31_t * pSrc,
00068   q31_t * pDst,
00069   uint32_t blockSize)
00070 {
00071   q31_t *pState = S->pState;                     /* State pointer */
00072   q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00073   q31_t *pStateCurnt;                            /* Points to the current sample of the state */
00074   q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
00075   q31_t *px;                                     /* Temporary pointers for state buffer */
00076   q31_t *pb;                                     /* Temporary pointers for coefficient buffer */
00077   q63_t sum0;                                    /* Accumulator */
00078   uint32_t numTaps = S->numTaps;                 /* Number of taps */
00079   uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
00080
00081
00082   /* S->pState buffer contains previous frame (numTaps - 1) samples */
00083   /* pStateCurnt points to the location where the new input data should be written */
00084   pStateCurnt = S->pState + (numTaps - 1u);
00085
00086   /* Total number of output samples to be computed */
00087   blkCnt = outBlockSize;
00088
00089   while(blkCnt > 0u)
00090   {
00091     /* Copy decimation factor number of new input samples into the state buffer */
00092     i = S->M;
00093
00094     do
00095     {
00096       *pStateCurnt++ = *pSrc++;
00097
00098     } while(--i);
00099
00100     /* Set accumulator to zero */
00101     sum0 = 0;
00102
00103     /* Initialize state pointer */
00104     px = pState;
00105
00106     /* Initialize coeff pointer */
00107     pb = pCoeffs;
00108
00109     /* Loop unrolling.  Process 4 taps at a time. */
00110     tapCnt = numTaps >> 2;
00111
00112     /* Loop over the number of taps.  Unroll by a factor of 4.
00113      ** Repeat until we've computed numTaps-4 coefficients. */
00114     while(tapCnt > 0u)
00115     {
00116       /* Read the b[numTaps-1] coefficient */
00117       c0 = *(pb++);
00118
00119       /* Read x[n-numTaps-1] sample */
00120       x0 = *(px++);
00121
00122       /* Perform the multiply-accumulate */
00123       sum0 = (q31_t) ((((q63_t) x0 * c0) + (sum0 << 32)) >> 32);
00124
00125       /* Read the b[numTaps-2] coefficient */
00126       c0 = *(pb++);
00127
00128       /* Read x[n-numTaps-2] sample */
00129       x0 = *(px++);
00130
00131       /* Perform the multiply-accumulate */
00132       sum0 = (q31_t) ((((q63_t) x0 * c0) + (sum0 << 32)) >> 32);
00133
00134       /* Read the b[numTaps-3] coefficient */
00135       c0 = *(pb++);
00136
00137       /* Read x[n-numTaps-3] sample */
00138       x0 = *(px++);
00139
00140       /* Perform the multiply-accumulate */
00141       sum0 = (q31_t) ((((q63_t) x0 * c0) + (sum0 << 32)) >> 32);
00142
00143       /* Read the b[numTaps-4] coefficient */
00144       c0 = *(pb++);
00145
00146       /* Read x[n-numTaps-4] sample */
00147       x0 = *(px++);
00148
00149       /* Perform the multiply-accumulate */
00150       sum0 = (q31_t) ((((q63_t) x0 * c0) + (sum0 << 32)) >> 32);
00151
00152       /* Decrement the loop counter */
00153       tapCnt--;
00154     }
00155
00156     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00157     tapCnt = numTaps % 0x4u;
00158
00159     while(tapCnt > 0u)
00160     {
00161       /* Read coefficients */
00162       c0 = *(pb++);
00163
00164       /* Fetch 1 state variable */
00165       x0 = *(px++);
00166
00167       /* Perform the multiply-accumulate */
00168       sum0 = (q31_t) ((((q63_t) x0 * c0) + (sum0 << 32)) >> 32);
00169
00170       /* Decrement the loop counter */
00171       tapCnt--;
00172     }
00173
00174     /* Advance the state pointer by the decimation factor
00175      * to process the next group of decimation factor number samples */
00176     pState = pState + S->M;
00177
00178     /* The result is in the accumulator, store in the destination buffer. */
00179     *pDst++ = (q31_t) (sum0 << 1);
00180
00181     /* Decrement the loop counter */
00182     blkCnt--;
00183   }
00184
00185   /* Processing is complete.
00186    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00187    ** This prepares the state buffer for the next function call. */
00188
00189   /* Points to the start of the state buffer */
00190   pStateCurnt = S->pState;
00191
00192   i = (numTaps - 1u) >> 2u;
00193
00194   /* copy data */
00195   while(i > 0u)
00196   {
00197     *pStateCurnt++ = *pState++;
00198     *pStateCurnt++ = *pState++;
00199     *pStateCurnt++ = *pState++;
00200     *pStateCurnt++ = *pState++;
00201
00202     /* Decrement the loop counter */
00203     i--;
00204   }
00205
00206   i = (numTaps - 1u) % 0x04u;
00207
00208   /* copy data */
00209   while(i > 0u)
00210   {
00211     *pStateCurnt++ = *pState++;
00212
00213     /* Decrement the loop counter */
00214     i--;
00215   }
00216 }
00217
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CMSIS DSP Software Library: arm_fir_decimate_init_f32.c File Reference

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arm_fir_decimate_init_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_fir_decimate_init_f32 (arm_fir_decimate_instance_f32 *S, uint16_t numTaps, uint8_t M, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_decimate_init_f32.c Source File

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arm_fir_decimate_init_f32.c

Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_decimate_init_f32.c
00009 *
00010 * Description:  Floating-point FIR Decimator initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00067 arm_status arm_fir_decimate_init_f32(
00068   arm_fir_decimate_instance_f32 * S,
00069   uint16_t numTaps,
00070   uint8_t M,
00071   float32_t * pCoeffs,
00072   float32_t * pState,
00073   uint32_t blockSize)
00074 {
00075   arm_status status;
00076
00077   /* The size of the input block must be a multiple of the decimation factor */
00078   if((blockSize % M) != 0u)
00079   {
00080     /* Set status as ARM_MATH_LENGTH_ERROR */
00081     status = ARM_MATH_LENGTH_ERROR;
00082   }
00083   else
00084   {
00085     /* Assign filter taps */
00086     S->numTaps = numTaps;
00087
00088     /* Assign coefficient pointer */
00089     S->pCoeffs = pCoeffs;
00090
00091     /* Clear state buffer and size is always (blockSize + numTaps - 1) */
00092     memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
00093
00094     /* Assign state pointer */
00095     S->pState = pState;
00096
00097     /* Assign Decimation Factor */
00098     S->M = M;
00099
00100     status = ARM_MATH_SUCCESS;
00101   }
00102
00103   return (status);
00104
00105 }
00106
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CMSIS DSP Software Library: arm_fir_decimate_init_q15.c File Reference

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arm_fir_decimate_init_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_fir_decimate_init_q15 (arm_fir_decimate_instance_q15 *S, uint16_t numTaps, uint8_t M, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_decimate_init_q15.c Source File

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arm_fir_decimate_init_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_decimate_init_q15.c
00009 *
00010 * Description:  Initialization function for the Q15 FIR Decimator.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00068 arm_status arm_fir_decimate_init_q15(
00069   arm_fir_decimate_instance_q15 * S,
00070   uint16_t numTaps,
00071   uint8_t M,
00072   q15_t * pCoeffs,
00073   q15_t * pState,
00074   uint32_t blockSize)
00075 {
00076
00077   arm_status status;
00078
00079   /* The size of the input block must be a multiple of the decimation factor */
00080   if((blockSize % M) != 0u)
00081   {
00082     /* Set status as ARM_MATH_LENGTH_ERROR */
00083     status = ARM_MATH_LENGTH_ERROR;
00084   }
00085   else
00086   {
00087     /* Assign filter taps */
00088     S->numTaps = numTaps;
00089
00090     /* Assign coefficient pointer */
00091     S->pCoeffs = pCoeffs;
00092
00093     /* Clear the state buffer.  The size of buffer is always (blockSize + numTaps - 1) */
00094     memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
00095
00096     /* Assign state pointer */
00097     S->pState = pState;
00098
00099     /* Assign Decimation factor */
00100     S->M = M;
00101
00102     status = ARM_MATH_SUCCESS;
00103   }
00104
00105   return (status);
00106
00107 }
00108
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CMSIS DSP Software Library: arm_fir_decimate_init_q31.c File Reference

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arm_fir_decimate_init_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_fir_decimate_init_q31 (arm_fir_decimate_instance_q31 *S, uint16_t numTaps, uint8_t M, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_decimate_init_q31.c Source File

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arm_fir_decimate_init_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_decimate_init_q31.c
00009 *
00010 * Description:  Initialization function for Q31 FIR Decimation filter.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00067 arm_status arm_fir_decimate_init_q31(
00068   arm_fir_decimate_instance_q31 * S,
00069   uint16_t numTaps,
00070   uint8_t M,
00071   q31_t * pCoeffs,
00072   q31_t * pState,
00073   uint32_t blockSize)
00074 {
00075   arm_status status;
00076
00077   /* The size of the input block must be a multiple of the decimation factor */
00078   if((blockSize % M) != 0u)
00079   {
00080     /* Set status as ARM_MATH_LENGTH_ERROR */
00081     status = ARM_MATH_LENGTH_ERROR;
00082   }
00083   else
00084   {
00085     /* Assign filter taps */
00086     S->numTaps = numTaps;
00087
00088     /* Assign coefficient pointer */
00089     S->pCoeffs = pCoeffs;
00090
00091     /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
00092     memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(q31_t));
00093
00094     /* Assign state pointer */
00095     S->pState = pState;
00096
00097     /* Assign Decimation factor */
00098     S->M = M;
00099
00100     status = ARM_MATH_SUCCESS;
00101   }
00102
00103   return (status);
00104
00105 }
00106
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CMSIS DSP Software Library: arm_fir_decimate_q15.c File Reference

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arm_fir_decimate_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_decimate_q15 (const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_decimate_q15.c Source File

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arm_fir_decimate_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_decimate_q15.c
00009 *
00010 * Description:  Q15 FIR Decimator.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00065 void arm_fir_decimate_q15(
00066   const arm_fir_decimate_instance_q15 * S,
00067   q15_t * pSrc,
00068   q15_t * pDst,
00069   uint32_t blockSize)
00070 {
00071   q15_t *pState = S->pState;                     /* State pointer */
00072   q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00073   q15_t *pStateCurnt;                            /* Points to the current sample of the state */
00074   q15_t *px;                                     /* Temporary pointer for state buffer */
00075   q15_t *pb;                                     /* Temporary pointer coefficient buffer */
00076   q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
00077   q63_t sum0;                                    /* Accumulators */
00078   uint32_t numTaps = S->numTaps;                 /* Number of taps */
00079   uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
00080
00081 #ifndef ARM_MATH_CM0
00082
00083   /* Run the below code for Cortex-M4 and Cortex-M3 */
00084
00085   /* S->pState buffer contains previous frame (numTaps - 1) samples */
00086   /* pStateCurnt points to the location where the new input data should be written */
00087   pStateCurnt = S->pState + (numTaps - 1u);
00088
00089   /* Total number of output samples to be computed */
00090   blkCnt = outBlockSize;
00091
00092   while(blkCnt > 0u)
00093   {
00094     /* Copy decimation factor number of new input samples into the state buffer */
00095     i = S->M;
00096
00097     do
00098     {
00099       *pStateCurnt++ = *pSrc++;
00100
00101     } while(--i);
00102
00103     /*Set sum to zero */
00104     sum0 = 0;
00105
00106     /* Initialize state pointer */
00107     px = pState;
00108
00109     /* Initialize coeff pointer */
00110     pb = pCoeffs;
00111
00112     /* Loop unrolling.  Process 4 taps at a time. */
00113     tapCnt = numTaps >> 2;
00114
00115     /* Loop over the number of taps.  Unroll by a factor of 4.
00116      ** Repeat until we've computed numTaps-4 coefficients. */
00117     while(tapCnt > 0u)
00118     {
00119       /* Read the Read b[numTaps-1] and b[numTaps-2]  coefficients */
00120       c0 = *__SIMD32(pb)++;
00121
00122       /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
00123       x0 = *__SIMD32(px)++;
00124
00125       /* Perform the multiply-accumulate */
00126       sum0 = __SMLALD(x0, c0, sum0);
00127
00128       /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
00129       c0 = *__SIMD32(pb)++;
00130
00131       /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
00132       x0 = *__SIMD32(px)++;
00133
00134       /* Perform the multiply-accumulate */
00135       sum0 = __SMLALD(x0, c0, sum0);
00136
00137       /* Decrement the loop counter */
00138       tapCnt--;
00139     }
00140
00141     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00142     tapCnt = numTaps % 0x4u;
00143
00144     while(tapCnt > 0u)
00145     {
00146       /* Read coefficients */
00147       c0 = *pb++;
00148
00149       /* Fetch 1 state variable */
00150       x0 = *px++;
00151
00152       /* Perform the multiply-accumulate */
00153       sum0 = __SMLALD(x0, c0, sum0);
00154
00155       /* Decrement the loop counter */
00156       tapCnt--;
00157     }
00158
00159     /* Advance the state pointer by the decimation factor
00160      * to process the next group of decimation factor number samples */
00161     pState = pState + S->M;
00162
00163     /* Store filter output, smlad returns the values in 2.14 format */
00164     /* so downsacle by 15 to get output in 1.15 */
00165     *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
00166
00167     /* Decrement the loop counter */
00168     blkCnt--;
00169   }
00170
00171   /* Processing is complete.
00172    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00173    ** This prepares the state buffer for the next function call. */
00174
00175   /* Points to the start of the state buffer */
00176   pStateCurnt = S->pState;
00177
00178   i = (numTaps - 1u) >> 2u;
00179
00180   /* copy data */
00181   while(i > 0u)
00182   {
00183     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00184     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00185
00186     /* Decrement the loop counter */
00187     i--;
00188   }
00189
00190   i = (numTaps - 1u) % 0x04u;
00191
00192   /* copy data */
00193   while(i > 0u)
00194   {
00195     *pStateCurnt++ = *pState++;
00196
00197     /* Decrement the loop counter */
00198     i--;
00199   }
00200
00201 #else
00202
00203 /* Run the below code for Cortex-M0 */
00204
00205   /* S->pState buffer contains previous frame (numTaps - 1) samples */
00206   /* pStateCurnt points to the location where the new input data should be written */
00207   pStateCurnt = S->pState + (numTaps - 1u);
00208
00209   /* Total number of output samples to be computed */
00210   blkCnt = outBlockSize;
00211
00212   while(blkCnt > 0u)
00213   {
00214     /* Copy decimation factor number of new input samples into the state buffer */
00215     i = S->M;
00216
00217     do
00218     {
00219       *pStateCurnt++ = *pSrc++;
00220
00221     } while(--i);
00222
00223     /*Set sum to zero */
00224     sum0 = 0;
00225
00226     /* Initialize state pointer */
00227     px = pState;
00228
00229     /* Initialize coeff pointer */
00230     pb = pCoeffs;
00231
00232     tapCnt = numTaps;
00233
00234     while(tapCnt > 0u)
00235     {
00236       /* Read coefficients */
00237       c0 = *pb++;
00238
00239       /* Fetch 1 state variable */
00240       x0 = *px++;
00241
00242       /* Perform the multiply-accumulate */
00243       sum0 += (q31_t) x0 *c0;
00244
00245       /* Decrement the loop counter */
00246       tapCnt--;
00247     }
00248
00249     /* Advance the state pointer by the decimation factor
00250      * to process the next group of decimation factor number samples */
00251     pState = pState + S->M;
00252
00253     /*Store filter output , smlad will return the values in 2.14 format */
00254     /* so downsacle by 15 to get output in 1.15 */
00255     *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
00256
00257     /* Decrement the loop counter */
00258     blkCnt--;
00259   }
00260
00261   /* Processing is complete.
00262    ** Now copy the last numTaps - 1 samples to the start of the state buffer.
00263    ** This prepares the state buffer for the next function call. */
00264
00265   /* Points to the start of the state buffer */
00266   pStateCurnt = S->pState;
00267
00268   i = numTaps - 1u;
00269
00270   /* copy data */
00271   while(i > 0u)
00272   {
00273     *pStateCurnt++ = *pState++;
00274
00275     /* Decrement the loop counter */
00276     i--;
00277   }
00278
00279 #endif /*   #ifndef ARM_MATH_CM0 */
00280
00281 }
00282
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CMSIS DSP Software Library: arm_fir_decimate_q31.c File Reference

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arm_fir_decimate_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_decimate_q31 (const arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_decimate_q31.c Source File

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arm_fir_decimate_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_decimate_q31.c
00009 *
00010 * Description:  Q31 FIR Decimator.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00064 void arm_fir_decimate_q31(
00065   const arm_fir_decimate_instance_q31 * S,
00066   q31_t * pSrc,
00067   q31_t * pDst,
00068   uint32_t blockSize)
00069 {
00070   q31_t *pState = S->pState;                     /* State pointer */
00071   q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00072   q31_t *pStateCurnt;                            /* Points to the current sample of the state */
00073   q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
00074   q31_t *px;                                     /* Temporary pointers for state buffer */
00075   q31_t *pb;                                     /* Temporary pointers for coefficient buffer */
00076   q63_t sum0;                                    /* Accumulator */
00077   uint32_t numTaps = S->numTaps;                 /* Number of taps */
00078   uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
00079
00080
00081 #ifndef ARM_MATH_CM0
00082
00083   /* Run the below code for Cortex-M4 and Cortex-M3 */
00084
00085   /* S->pState buffer contains previous frame (numTaps - 1) samples */
00086   /* pStateCurnt points to the location where the new input data should be written */
00087   pStateCurnt = S->pState + (numTaps - 1u);
00088
00089   /* Total number of output samples to be computed */
00090   blkCnt = outBlockSize;
00091
00092   while(blkCnt > 0u)
00093   {
00094     /* Copy decimation factor number of new input samples into the state buffer */
00095     i = S->M;
00096
00097     do
00098     {
00099       *pStateCurnt++ = *pSrc++;
00100
00101     } while(--i);
00102
00103     /* Set accumulator to zero */
00104     sum0 = 0;
00105
00106     /* Initialize state pointer */
00107     px = pState;
00108
00109     /* Initialize coeff pointer */
00110     pb = pCoeffs;
00111
00112     /* Loop unrolling.  Process 4 taps at a time. */
00113     tapCnt = numTaps >> 2;
00114
00115     /* Loop over the number of taps.  Unroll by a factor of 4.
00116      ** Repeat until we've computed numTaps-4 coefficients. */
00117     while(tapCnt > 0u)
00118     {
00119       /* Read the b[numTaps-1] coefficient */
00120       c0 = *(pb++);
00121
00122       /* Read x[n-numTaps-1] sample */
00123       x0 = *(px++);
00124
00125       /* Perform the multiply-accumulate */
00126       sum0 += (q63_t) x0 *c0;
00127
00128       /* Read the b[numTaps-2] coefficient */
00129       c0 = *(pb++);
00130
00131       /* Read x[n-numTaps-2] sample */
00132       x0 = *(px++);
00133
00134       /* Perform the multiply-accumulate */
00135       sum0 += (q63_t) x0 *c0;
00136
00137       /* Read the b[numTaps-3] coefficient */
00138       c0 = *(pb++);
00139
00140       /* Read x[n-numTaps-3] sample */
00141       x0 = *(px++);
00142
00143       /* Perform the multiply-accumulate */
00144       sum0 += (q63_t) x0 *c0;
00145
00146       /* Read the b[numTaps-4] coefficient */
00147       c0 = *(pb++);
00148
00149       /* Read x[n-numTaps-4] sample */
00150       x0 = *(px++);
00151
00152       /* Perform the multiply-accumulate */
00153       sum0 += (q63_t) x0 *c0;
00154
00155       /* Decrement the loop counter */
00156       tapCnt--;
00157     }
00158
00159     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00160     tapCnt = numTaps % 0x4u;
00161
00162     while(tapCnt > 0u)
00163     {
00164       /* Read coefficients */
00165       c0 = *(pb++);
00166
00167       /* Fetch 1 state variable */
00168       x0 = *(px++);
00169
00170       /* Perform the multiply-accumulate */
00171       sum0 += (q63_t) x0 *c0;
00172
00173       /* Decrement the loop counter */
00174       tapCnt--;
00175     }
00176
00177     /* Advance the state pointer by the decimation factor
00178      * to process the next group of decimation factor number samples */
00179     pState = pState + S->M;
00180
00181     /* The result is in the accumulator, store in the destination buffer. */
00182     *pDst++ = (q31_t) (sum0 >> 31);
00183
00184     /* Decrement the loop counter */
00185     blkCnt--;
00186   }
00187
00188   /* Processing is complete.
00189    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00190    ** This prepares the state buffer for the next function call. */
00191
00192   /* Points to the start of the state buffer */
00193   pStateCurnt = S->pState;
00194
00195   i = (numTaps - 1u) >> 2u;
00196
00197   /* copy data */
00198   while(i > 0u)
00199   {
00200     *pStateCurnt++ = *pState++;
00201     *pStateCurnt++ = *pState++;
00202     *pStateCurnt++ = *pState++;
00203     *pStateCurnt++ = *pState++;
00204
00205     /* Decrement the loop counter */
00206     i--;
00207   }
00208
00209   i = (numTaps - 1u) % 0x04u;
00210
00211   /* copy data */
00212   while(i > 0u)
00213   {
00214     *pStateCurnt++ = *pState++;
00215
00216     /* Decrement the loop counter */
00217     i--;
00218   }
00219
00220 #else
00221
00222 /* Run the below code for Cortex-M0 */
00223
00224   /* S->pState buffer contains previous frame (numTaps - 1) samples */
00225   /* pStateCurnt points to the location where the new input data should be written */
00226   pStateCurnt = S->pState + (numTaps - 1u);
00227
00228   /* Total number of output samples to be computed */
00229   blkCnt = outBlockSize;
00230
00231   while(blkCnt > 0u)
00232   {
00233     /* Copy decimation factor number of new input samples into the state buffer */
00234     i = S->M;
00235
00236     do
00237     {
00238       *pStateCurnt++ = *pSrc++;
00239
00240     } while(--i);
00241
00242     /* Set accumulator to zero */
00243     sum0 = 0;
00244
00245     /* Initialize state pointer */
00246     px = pState;
00247
00248     /* Initialize coeff pointer */
00249     pb = pCoeffs;
00250
00251     tapCnt = numTaps;
00252
00253     while(tapCnt > 0u)
00254     {
00255       /* Read coefficients */
00256       c0 = *pb++;
00257
00258       /* Fetch 1 state variable */
00259       x0 = *px++;
00260
00261       /* Perform the multiply-accumulate */
00262       sum0 += (q63_t) x0 *c0;
00263
00264       /* Decrement the loop counter */
00265       tapCnt--;
00266     }
00267
00268     /* Advance the state pointer by the decimation factor
00269      * to process the next group of decimation factor number samples */
00270     pState = pState + S->M;
00271
00272     /* The result is in the accumulator, store in the destination buffer. */
00273     *pDst++ = (q31_t) (sum0 >> 31);
00274
00275     /* Decrement the loop counter */
00276     blkCnt--;
00277   }
00278
00279   /* Processing is complete.
00280    ** Now copy the last numTaps - 1 samples to the start of the state buffer.
00281    ** This prepares the state buffer for the next function call. */
00282
00283   /* Points to the start of the state buffer */
00284   pStateCurnt = S->pState;
00285
00286   i = numTaps - 1u;
00287
00288   /* copy data */
00289   while(i > 0u)
00290   {
00291     *pStateCurnt++ = *pState++;
00292
00293     /* Decrement the loop counter */
00294     i--;
00295   }
00296
00297 #endif /*   #ifndef ARM_MATH_CM0 */
00298
00299 }
00300
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CMSIS DSP Software Library: arm_fir_example_f32.c File Reference

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  • File List
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Defines | Functions | Variables

arm_fir_example_f32.c File Reference

#include "arm_math.h"
#include "math_helper.h"

Go to the source code of this file.

Defines

#define | TEST_LENGTH_SAMPLES 320
#define | SNR_THRESHOLD_F32 140.0f
#define | BLOCK_SIZE 32
#define | NUM_TAPS 29

Functions

int32_t | main (void)

Variables

float32_t | testInput_f32_1kHz_15kHz [TEST_LENGTH_SAMPLES]
float32_t | refOutput [TEST_LENGTH_SAMPLES]
static float32_t | testOutput [TEST_LENGTH_SAMPLES]
static float32_t | firStateF32 [BLOCK_SIZE+NUM_TAPS-1]
const float32_t | firCoeffs32 [NUM_TAPS]
uint32_t | blockSize = BLOCK_SIZE
uint32_t | numBlocks = TEST_LENGTH_SAMPLES/BLOCK_SIZE
float32_t snr

Define Documentation

#define TEST_LENGTH_SAMPLES 320

Definition at line 116 of file arm_fir_example_f32.c.

#define SNR_THRESHOLD_F32 140.0f
Examples:
arm_fir_example_f32.c, and arm_graphic_equalizer_example_q31.c.

Definition at line 117 of file arm_fir_example_f32.c.

#define BLOCK_SIZE 32
Examples:
arm_fir_example_f32.c.

Definition at line 118 of file arm_fir_example_f32.c.

#define NUM_TAPS 29
Examples:
arm_fir_example_f32.c.

Definition at line 119 of file arm_fir_example_f32.c.

Function Documentation

int32_t main ( void )

Definition at line 166 of file arm_fir_example_f32.c.

Variable Documentation

float32_t testInput_f32_1kHz_15kHz[TEST_LENGTH_SAMPLES]
Examples:
arm_fir_example_f32.c.
float32_t refOutput[TEST_LENGTH_SAMPLES]
Examples:
arm_fir_example_f32.c.
float32_t testOutput[TEST_LENGTH_SAMPLES] [static]

Definition at line 133 of file arm_fir_example_f32.c.

float32_t firStateF32[BLOCK_SIZE+NUM_TAPS-1] [static]

Definition at line 139 of file arm_fir_example_f32.c.

const float32_t firCoeffs32[NUM_TAPS]
Initial value:
 {
-0.0018225230f, -0.0015879294f, +0.0000000000f, +0.0036977508f, +0.0080754303f, +0.0085302217f, -0.0000000000f, -0.0173976984f,
-0.0341458607f, -0.0333591565f, +0.0000000000f, +0.0676308395f, +0.1522061835f, +0.2229246956f, +0.2504960933f, +0.2229246956f,
+0.1522061835f, +0.0676308395f, +0.0000000000f, -0.0333591565f, -0.0341458607f, -0.0173976984f, -0.0000000000f, +0.0085302217f,
+0.0080754303f, +0.0036977508f, +0.0000000000f, -0.0015879294f, -0.0018225230f
}
Examples:
arm_fir_example_f32.c.

Definition at line 146 of file arm_fir_example_f32.c.

uint32_t blockSize = BLOCK_SIZE
Examples:
arm_fir_example_f32.c, arm_signal_converge_example_f32.c, arm_sin_cos_example_f32.c, and arm_variance_example_f32.c.

Definition at line 157 of file arm_fir_example_f32.c.

uint32_t numBlocks = TEST_LENGTH_SAMPLES/BLOCK_SIZE
Examples:
arm_fir_example_f32.c.

Definition at line 158 of file arm_fir_example_f32.c.

float32_t snr

Definition at line 160 of file arm_fir_example_f32.c.

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CMSIS DSP Software Library: arm_fir_example_f32.c Source File

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  • File List
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arm_fir_example_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002  * Copyright (C) 2010 ARM Limited. All rights reserved.
00003  *
00004  * $Date:           29. November 2010
00005  * $Revision:       V1.0.3
00006  *
00007  * Project:         CMSIS DSP Library
00008  * Title:           arm_fir_example_f32.c
00009  *
00010  * Description: Example code demonstrating how an FIR filter can be used
00011  *               as a low pass filter.
00012  *
00013  * Target Processor: Cortex-M4/Cortex-M3
00014  *
00015  *
00016  * Version 1.0.3 2010/11/29
00017  *    Re-organized the CMSIS folders and updated documentation.
00018  *
00019  * Version 1.0.1 2010/10/05 KK
00020  *    Production release and review comments incorporated.
00021  *
00022  * Version 1.0.0 2010/09/20 KK
00023  *    Production release and review comments incorporated.
00024  * ------------------------------------------------------------------- */
00025
00105 /* ----------------------------------------------------------------------
00106 ** Include Files
00107 ** ------------------------------------------------------------------- */
00108
00109 #include "arm_math.h"
00110 #include "math_helper.h"
00111
00112 /* ----------------------------------------------------------------------
00113 ** Macro Defines
00114 ** ------------------------------------------------------------------- */
00115
00116 #define TEST_LENGTH_SAMPLES 320
00117 #define SNR_THRESHOLD_F32   140.0f
00118 #define BLOCK_SIZE          32
00119 #define NUM_TAPS            29
00120
00121 /* -------------------------------------------------------------------
00122  * The input signal and reference output (computed with MATLAB)
00123  * are defined externally in arm_fir_lpf_data.c.
00124  * ------------------------------------------------------------------- */
00125
00126 extern float32_t testInput_f32_1kHz_15kHz[TEST_LENGTH_SAMPLES];
00127 extern float32_t refOutput[TEST_LENGTH_SAMPLES];
00128
00129 /* -------------------------------------------------------------------
00130  * Declare Test output buffer
00131  * ------------------------------------------------------------------- */
00132
00133 static float32_t testOutput[TEST_LENGTH_SAMPLES];
00134
00135 /* -------------------------------------------------------------------
00136  * Declare State buffer of size (numTaps + blockSize - 1)
00137  * ------------------------------------------------------------------- */
00138
00139 static float32_t firStateF32[BLOCK_SIZE + NUM_TAPS - 1];
00140
00141 /* ----------------------------------------------------------------------
00142 ** FIR Coefficients buffer generated using fir1() MATLAB function.
00143 ** fir1(28, 6/24)
00144 ** ------------------------------------------------------------------- */
00145
00146 const float32_t firCoeffs32[NUM_TAPS] = {
00147 -0.0018225230f, -0.0015879294f, +0.0000000000f, +0.0036977508f, +0.0080754303f, +0.0085302217f, -0.0000000000f, -0.0173976984f,
00148 -0.0341458607f, -0.0333591565f, +0.0000000000f, +0.0676308395f, +0.1522061835f, +0.2229246956f, +0.2504960933f, +0.2229246956f,
00149 +0.1522061835f, +0.0676308395f, +0.0000000000f, -0.0333591565f, -0.0341458607f, -0.0173976984f, -0.0000000000f, +0.0085302217f,
00150 +0.0080754303f, +0.0036977508f, +0.0000000000f, -0.0015879294f, -0.0018225230f
00151 };
00152
00153 /* ------------------------------------------------------------------
00154  * Global variables for FIR LPF Example
00155  * ------------------------------------------------------------------- */
00156
00157 uint32_t blockSize = BLOCK_SIZE;
00158 uint32_t numBlocks = TEST_LENGTH_SAMPLES/BLOCK_SIZE;
00159
00160 float32_t  snr;
00161
00162 /* ----------------------------------------------------------------------
00163  * FIR LPF Example
00164  * ------------------------------------------------------------------- */
00165
00166 int32_t main(void)
00167 {
00168   uint32_t i;
00169   arm_fir_instance_f32 S;
00170   arm_status status;
00171   float32_t  *inputF32, *outputF32;
00172
00173   /* Initialize input and output buffer pointers */
00174   inputF32 = &testInput_f32_1kHz_15kHz[0];
00175   outputF32 = &testOutput[0];
00176
00177   /* Call FIR init function to initialize the instance structure. */
00178   arm_fir_init_f32(&S, NUM_TAPS, (float32_t *)&firCoeffs32[0], &firStateF32[0], blockSize);
00179
00180   /* ----------------------------------------------------------------------
00181   ** Call the FIR process function for every blockSize samples
00182   ** ------------------------------------------------------------------- */
00183
00184   for(i=0; i < numBlocks; i++)
00185     {
00186       arm_fir_f32(&S, inputF32 + (i * blockSize), outputF32 + (i * blockSize), blockSize);
00187     }
00188
00189   /* ----------------------------------------------------------------------
00190   ** Compare the generated output against the reference output computed
00191   ** in MATLAB.
00192   ** ------------------------------------------------------------------- */
00193
00194   snr = arm_snr_f32(&refOutput[0], &testOutput[0], TEST_LENGTH_SAMPLES);
00195
00196   if (snr < SNR_THRESHOLD_F32)
00197     {
00198       status = ARM_MATH_TEST_FAILURE;
00199     }
00200   else
00201     {
00202       status = ARM_MATH_SUCCESS;
00203     }
00204
00205   /* ----------------------------------------------------------------------
00206   ** Loop here if the signal does not match the reference output.
00207   ** ------------------------------------------------------------------- */
00208
00209   if( status != ARM_MATH_SUCCESS)
00210     {
00211       while(1);
00212     }
00213 }
00214
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CMSIS DSP Software Library: arm_fir_f32.c File Reference

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  • File List
  • Globals
Functions

arm_fir_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_f32 (const arm_fir_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
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CMSIS DSP Software Library: arm_fir_f32.c Source File

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arm_fir_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_f32.c
00009 *
00010 * Description:  Floating-point FIR filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00128 void arm_fir_f32(
00129   const arm_fir_instance_f32 * S,
00130   float32_t * pSrc,
00131   float32_t * pDst,
00132   uint32_t blockSize)
00133 {
00134
00135   float32_t *pState = S->pState;                 /* State pointer */
00136   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
00137   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
00138   float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
00139   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00140   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
00141
00142
00143 #ifndef ARM_MATH_CM0
00144
00145   /* Run the below code for Cortex-M4 and Cortex-M3 */
00146
00147   float32_t acc0, acc1, acc2, acc3;              /* Accumulators */
00148   float32_t x0, x1, x2, x3, c0;                  /* Temporary variables to hold state and coefficient values */
00149
00150
00151   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
00152   /* pStateCurnt points to the location where the new input data should be written */
00153   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00154
00155   /* Apply loop unrolling and compute 4 output values simultaneously.
00156    * The variables acc0 ... acc3 hold output values that are being computed:
00157    *
00158    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
00159    *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
00160    *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
00161    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
00162    */
00163   blkCnt = blockSize >> 2;
00164
00165   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00166    ** a second loop below computes the remaining 1 to 3 samples. */
00167   while(blkCnt > 0u)
00168   {
00169     /* Copy four new input samples into the state buffer */
00170     *pStateCurnt++ = *pSrc++;
00171     *pStateCurnt++ = *pSrc++;
00172     *pStateCurnt++ = *pSrc++;
00173     *pStateCurnt++ = *pSrc++;
00174
00175     /* Set all accumulators to zero */
00176     acc0 = 0.0f;
00177     acc1 = 0.0f;
00178     acc2 = 0.0f;
00179     acc3 = 0.0f;
00180
00181     /* Initialize state pointer */
00182     px = pState;
00183
00184     /* Initialize coeff pointer */
00185     pb = (pCoeffs);
00186
00187     /* Read the first three samples from the state buffer:  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
00188     x0 = *px++;
00189     x1 = *px++;
00190     x2 = *px++;
00191
00192     /* Loop unrolling.  Process 4 taps at a time. */
00193     tapCnt = numTaps >> 2u;
00194
00195     /* Loop over the number of taps.  Unroll by a factor of 4.
00196      ** Repeat until we've computed numTaps-4 coefficients. */
00197     while(tapCnt > 0u)
00198     {
00199       /* Read the b[numTaps-1] coefficient */
00200       c0 = *(pb++);
00201
00202       /* Read x[n-numTaps-3] sample */
00203       x3 = *(px++);
00204
00205       /* acc0 +=  b[numTaps-1] * x[n-numTaps] */
00206       acc0 += x0 * c0;
00207
00208       /* acc1 +=  b[numTaps-1] * x[n-numTaps-1] */
00209       acc1 += x1 * c0;
00210
00211       /* acc2 +=  b[numTaps-1] * x[n-numTaps-2] */
00212       acc2 += x2 * c0;
00213
00214       /* acc3 +=  b[numTaps-1] * x[n-numTaps-3] */
00215       acc3 += x3 * c0;
00216
00217       /* Read the b[numTaps-2] coefficient */
00218       c0 = *(pb++);
00219
00220       /* Read x[n-numTaps-4] sample */
00221       x0 = *(px++);
00222
00223       /* Perform the multiply-accumulate */
00224       acc0 += x1 * c0;
00225       acc1 += x2 * c0;
00226       acc2 += x3 * c0;
00227       acc3 += x0 * c0;
00228
00229       /* Read the b[numTaps-3] coefficient */
00230       c0 = *(pb++);
00231
00232       /* Read x[n-numTaps-5] sample */
00233       x1 = *(px++);
00234
00235       /* Perform the multiply-accumulates */
00236       acc0 += x2 * c0;
00237       acc1 += x3 * c0;
00238       acc2 += x0 * c0;
00239       acc3 += x1 * c0;
00240
00241       /* Read the b[numTaps-4] coefficient */
00242       c0 = *(pb++);
00243
00244       /* Read x[n-numTaps-6] sample */
00245       x2 = *(px++);
00246
00247       /* Perform the multiply-accumulates */
00248       acc0 += x3 * c0;
00249       acc1 += x0 * c0;
00250       acc2 += x1 * c0;
00251       acc3 += x2 * c0;
00252
00253       tapCnt--;
00254     }
00255
00256     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00257     tapCnt = numTaps % 0x4u;
00258
00259     while(tapCnt > 0u)
00260     {
00261       /* Read coefficients */
00262       c0 = *(pb++);
00263
00264       /* Fetch 1 state variable */
00265       x3 = *(px++);
00266
00267       /* Perform the multiply-accumulates */
00268       acc0 += x0 * c0;
00269       acc1 += x1 * c0;
00270       acc2 += x2 * c0;
00271       acc3 += x3 * c0;
00272
00273       /* Reuse the present sample states for next sample */
00274       x0 = x1;
00275       x1 = x2;
00276       x2 = x3;
00277
00278       /* Decrement the loop counter */
00279       tapCnt--;
00280     }
00281
00282     /* Advance the state pointer by 4 to process the next group of 4 samples */
00283     pState = pState + 4;
00284
00285     /* The results in the 4 accumulators, store in the destination buffer. */
00286     *pDst++ = acc0;
00287     *pDst++ = acc1;
00288     *pDst++ = acc2;
00289     *pDst++ = acc3;
00290
00291     blkCnt--;
00292   }
00293
00294   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00295    ** No loop unrolling is used. */
00296   blkCnt = blockSize % 0x4u;
00297
00298   while(blkCnt > 0u)
00299   {
00300     /* Copy one sample at a time into state buffer */
00301     *pStateCurnt++ = *pSrc++;
00302
00303     /* Set the accumulator to zero */
00304     acc0 = 0.0f;
00305
00306     /* Initialize state pointer */
00307     px = pState;
00308
00309     /* Initialize Coefficient pointer */
00310     pb = (pCoeffs);
00311
00312     i = numTaps;
00313
00314     /* Perform the multiply-accumulates */
00315     do
00316     {
00317       acc0 += *px++ * *pb++;
00318       i--;
00319
00320     } while(i > 0u);
00321
00322     /* The result is store in the destination buffer. */
00323     *pDst++ = acc0;
00324
00325     /* Advance state pointer by 1 for the next sample */
00326     pState = pState + 1;
00327
00328     blkCnt--;
00329   }
00330
00331   /* Processing is complete.
00332    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00333    ** This prepares the state buffer for the next function call. */
00334
00335   /* Points to the start of the state buffer */
00336   pStateCurnt = S->pState;
00337
00338   tapCnt = (numTaps - 1u) >> 2u;
00339
00340   /* copy data */
00341   while(tapCnt > 0u)
00342   {
00343     *pStateCurnt++ = *pState++;
00344     *pStateCurnt++ = *pState++;
00345     *pStateCurnt++ = *pState++;
00346     *pStateCurnt++ = *pState++;
00347
00348     /* Decrement the loop counter */
00349     tapCnt--;
00350   }
00351
00352   /* Calculate remaining number of copies */
00353   tapCnt = (numTaps - 1u) % 0x4u;
00354
00355   /* Copy the remaining q31_t data */
00356   while(tapCnt > 0u)
00357   {
00358     *pStateCurnt++ = *pState++;
00359
00360     /* Decrement the loop counter */
00361     tapCnt--;
00362   }
00363
00364 #else
00365
00366   /* Run the below code for Cortex-M0 */
00367
00368   float32_t acc;
00369
00370   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
00371   /* pStateCurnt points to the location where the new input data should be written */
00372   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00373
00374   /* Initialize blkCnt with blockSize */
00375   blkCnt = blockSize;
00376
00377   while(blkCnt > 0u)
00378   {
00379     /* Copy one sample at a time into state buffer */
00380     *pStateCurnt++ = *pSrc++;
00381
00382     /* Set the accumulator to zero */
00383     acc = 0.0f;
00384
00385     /* Initialize state pointer */
00386     px = pState;
00387
00388     /* Initialize Coefficient pointer */
00389     pb = pCoeffs;
00390
00391     i = numTaps;
00392
00393     /* Perform the multiply-accumulates */
00394     do
00395     {
00396       /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
00397       acc += *px++ * *pb++;
00398       i--;
00399
00400     } while(i > 0u);
00401
00402     /* The result is store in the destination buffer. */
00403     *pDst++ = acc;
00404
00405     /* Advance state pointer by 1 for the next sample */
00406     pState = pState + 1;
00407
00408     blkCnt--;
00409   }
00410
00411   /* Processing is complete.
00412    ** Now copy the last numTaps - 1 samples to the starting of the state buffer.
00413    ** This prepares the state buffer for the next function call. */
00414
00415   /* Points to the start of the state buffer */
00416   pStateCurnt = S->pState;
00417
00418   /* Copy numTaps number of values */
00419   tapCnt = numTaps - 1u;
00420
00421   /* Copy data */
00422   while(tapCnt > 0u)
00423   {
00424     *pStateCurnt++ = *pState++;
00425
00426     /* Decrement the loop counter */
00427     tapCnt--;
00428   }
00429
00430 #endif /*   #ifndef ARM_MATH_CM0 */
00431
00432 }
00433
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CMSIS DSP Software Library: arm_fir_fast_q15.c File Reference

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Functions

arm_fir_fast_q15.c File Reference

#include "arm_math.h"

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Functions

void arm_fir_fast_q15 (const arm_fir_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_fast_q15.c Source File

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arm_fir_fast_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_fast_q15.c
00009 *
00010 * Description:  Q15 Fast FIR filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.9  2010/08/16
00030 *    Initial version
00031 *
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00065 void arm_fir_fast_q15(
00066   const arm_fir_instance_q15 * S,
00067   q15_t * pSrc,
00068   q15_t * pDst,
00069   uint32_t blockSize)
00070 {
00071   q15_t *pState = S->pState;                     /* State pointer */
00072   q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00073   q15_t *pStateCurnt;                            /* Points to the current sample of the state */
00074   q15_t *px1;                                    /* Temporary q15 pointer for state buffer */
00075   q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
00076   q31_t *px2;                                    /* Temporary q31 pointer for SIMD state buffer accesses */
00077   q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold SIMD state and coefficient values */
00078   q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
00079   uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
00080   uint32_t tapCnt, blkCnt;                       /* Loop counters */
00081
00082   /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
00083   /* pStateCurnt points to the location where the new input data should be written */
00084   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00085
00086   /* Apply loop unrolling and compute 4 output values simultaneously.
00087    * The variables acc0 ... acc3 hold output values that are being computed:
00088    *
00089    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
00090    *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
00091    *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
00092    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
00093    */
00094   blkCnt = blockSize >> 2;
00095
00096   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00097    ** a second loop below computes the remaining 1 to 3 samples. */
00098   while(blkCnt > 0u)
00099   {
00100     /* Copy four new input samples into the state buffer.
00101      ** Use 32-bit SIMD to move the 16-bit data.  Only requires two copies. */
00102     *__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++;
00103     *__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++;
00104
00105     /* Set all accumulators to zero */
00106     acc0 = 0;
00107     acc1 = 0;
00108     acc2 = 0;
00109     acc3 = 0;
00110
00111     /* Initialize state pointer of type q15 */
00112     px1 = pState;
00113
00114     /* Initialize coeff pointer of type q31 */
00115     pb = (q31_t *) (pCoeffs);
00116
00117     /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
00118     x0 = *(q31_t *) (px1++);
00119
00120     /* Read the third and forth samples from the state buffer: x[n-N-1], x[n-N-2] */
00121     x1 = *(q31_t *) (px1++);
00122
00123     /* Loop over the number of taps.  Unroll by a factor of 4.
00124      ** Repeat until we've computed numTaps-4 coefficients. */
00125     tapCnt = numTaps >> 2;
00126     do
00127     {
00128       /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
00129       c0 = *(pb++);
00130
00131       /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
00132       acc0 = __SMLAD(x0, c0, acc0);
00133
00134       /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
00135       acc1 = __SMLAD(x1, c0, acc1);
00136
00137       /* Read state x[n-N-2], x[n-N-3] */
00138       x2 = *(q31_t *) (px1++);
00139
00140       /* Read state x[n-N-3], x[n-N-4] */
00141       x3 = *(q31_t *) (px1++);
00142
00143       /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
00144       acc2 = __SMLAD(x2, c0, acc2);
00145
00146       /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
00147       acc3 = __SMLAD(x3, c0, acc3);
00148
00149       /* Read coefficients b[N-2], b[N-3] */
00150       c0 = *(pb++);
00151
00152       /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
00153       acc0 = __SMLAD(x2, c0, acc0);
00154
00155       /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
00156       acc1 = __SMLAD(x3, c0, acc1);
00157
00158       /* Read state x[n-N-4], x[n-N-5] */
00159       x0 = *(q31_t *) (px1++);
00160
00161       /* Read state x[n-N-5], x[n-N-6] */
00162       x1 = *(q31_t *) (px1++);
00163
00164       /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
00165       acc2 = __SMLAD(x0, c0, acc2);
00166
00167       /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
00168       acc3 = __SMLAD(x1, c0, acc3);
00169       tapCnt--;
00170
00171     }
00172     while(tapCnt > 0u);
00173
00174     /* If the filter length is not a multiple of 4, compute the remaining filter taps.
00175      ** This is always 2 taps since the filter length is always even. */
00176     if((numTaps & 0x3u) != 0u)
00177     {
00178       /* Read 2 coefficients */
00179       c0 = *(pb++);
00180       /* Fetch 4 state variables */
00181       x2 = *(q31_t *) (px1++);
00182       x3 = *(q31_t *) (px1++);
00183
00184       /* Perform the multiply-accumulates */
00185       acc0 = __SMLAD(x0, c0, acc0);
00186       acc1 = __SMLAD(x1, c0, acc1);
00187       acc2 = __SMLAD(x2, c0, acc2);
00188       acc3 = __SMLAD(x3, c0, acc3);
00189     }
00190
00191     /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.15 with saturation.
00192      ** Then store the 4 outputs in the destination buffer. */
00193
00194 #ifndef ARM_MATH_BIG_ENDIAN
00195
00196     *__SIMD32(pDst)++ = __PKHBT((acc0 >> 15), (acc1 >> 15), 16u);
00197     *__SIMD32(pDst)++ = __PKHBT((acc2 >> 15), (acc3 >> 15), 16u);
00198
00199 #else
00200
00201     *__SIMD32(pDst)++ = __PKHBT((acc1 >> 15), (acc0 >> 15), 16u);
00202     *__SIMD32(pDst)++ = __PKHBT((acc3 >> 15), (acc2 >> 15), 16u);
00203
00204 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00205
00206     /* Advance the state pointer by 4 to process the next group of 4 samples */
00207     pState = pState + 4;
00208
00209     /* Decrement the loop counter */
00210     blkCnt--;
00211   }
00212
00213   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00214    ** No loop unrolling is used. */
00215   blkCnt = blockSize % 0x4u;
00216   while(blkCnt > 0u)
00217   {
00218     /* Copy two samples into state buffer */
00219     *pStateCurnt++ = *pSrc++;
00220
00221     /* Set the accumulator to zero */
00222     acc0 = 0;
00223
00224     /* Use SIMD to hold states and coefficients */
00225     px2 = (q31_t *) pState;
00226     pb = (q31_t *) (pCoeffs);
00227     tapCnt = numTaps >> 1;
00228
00229     do
00230     {
00231       acc0 = __SMLAD(*px2++, *(pb++), acc0);
00232       tapCnt--;
00233     }
00234     while(tapCnt > 0u);
00235
00236     /* The result is in 2.30 format.  Convert to 1.15 with saturation.
00237      ** Then store the output in the destination buffer. */
00238     *pDst++ = (q15_t) ((acc0 >> 15));
00239
00240     /* Advance state pointer by 1 for the next sample */
00241     pState = pState + 1;
00242
00243     /* Decrement the loop counter */
00244     blkCnt--;
00245   }
00246
00247   /* Processing is complete.
00248    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00249    ** This prepares the state buffer for the next function call. */
00250
00251   /* Points to the start of the state buffer */
00252   pStateCurnt = S->pState;
00253   /* Calculation of count for copying integer writes */
00254   tapCnt = (numTaps - 1u) >> 2;
00255
00256   while(tapCnt > 0u)
00257   {
00258     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00259     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00260
00261     tapCnt--;
00262   }
00263
00264   /* Calculation of count for remaining q15_t data */
00265   tapCnt = (numTaps - 1u) % 0x4u;
00266
00267   /* copy remaining data */
00268   while(tapCnt > 0u)
00269   {
00270     *pStateCurnt++ = *pState++;
00271
00272     /* Decrement the loop counter */
00273     tapCnt--;
00274   }
00275 }
00276
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CMSIS DSP Software Library: arm_fir_fast_q31.c File Reference

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arm_fir_fast_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_fir_fast_q31 (const arm_fir_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_fast_q31.c Source File

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arm_fir_fast_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_fast_q31.c
00009 *
00010 * Description:  Processing function for the Q31 Fast FIR filter.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.9  2010/08/27
00030 *    Initial version
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00066 void arm_fir_fast_q31(
00067   const arm_fir_instance_q31 * S,
00068   q31_t * pSrc,
00069   q31_t * pDst,
00070   uint32_t blockSize)
00071 {
00072   q31_t *pState = S->pState;                     /* State pointer */
00073   q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00074   q31_t *pStateCurnt;                            /* Points to the current sample of the state */
00075   q31_t x0, x1, x2, x3;                          /* Temporary variables to hold state */
00076   q31_t c0;                                      /* Temporary variable to hold coefficient value */
00077   q31_t *px;                                     /* Temporary pointer for state */
00078   q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
00079   q63_t acc0, acc1, acc2, acc3;                  /* Accumulators */
00080   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00081   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
00082
00083   /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
00084   /* pStateCurnt points to the location where the new input data should be written */
00085   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00086
00087   /* Apply loop unrolling and compute 4 output values simultaneously.
00088    * The variables acc0 ... acc3 hold output values that are being computed:
00089    *
00090    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
00091    *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
00092    *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
00093    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
00094    */
00095   blkCnt = blockSize >> 2;
00096
00097   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00098    ** a second loop below computes the remaining 1 to 3 samples. */
00099   while(blkCnt > 0u)
00100   {
00101     /* Copy four new input samples into the state buffer */
00102     *pStateCurnt++ = *pSrc++;
00103     *pStateCurnt++ = *pSrc++;
00104     *pStateCurnt++ = *pSrc++;
00105     *pStateCurnt++ = *pSrc++;
00106
00107     /* Set all accumulators to zero */
00108     acc0 = 0;
00109     acc1 = 0;
00110     acc2 = 0;
00111     acc3 = 0;
00112
00113     /* Initialize state pointer */
00114     px = pState;
00115
00116     /* Initialize coefficient pointer */
00117     pb = pCoeffs;
00118
00119     /* Read the first three samples from the state buffer:
00120      *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
00121     x0 = *(px++);
00122     x1 = *(px++);
00123     x2 = *(px++);
00124
00125     /* Loop unrolling.  Process 4 taps at a time. */
00126     tapCnt = numTaps >> 2;
00127     i = tapCnt;
00128
00129     while(i > 0u)
00130     {
00131       /* Read the b[numTaps] coefficient */
00132       c0 = *(pb++);
00133
00134       /* Read x[n-numTaps-3] sample */
00135       x3 = *(px++);
00136
00137       /* acc0 +=  b[numTaps] * x[n-numTaps] */
00138       acc0 = (q31_t) ((((q63_t) x0 * c0) + (acc0 << 32)) >> 32);
00139
00140       /* acc1 +=  b[numTaps] * x[n-numTaps-1] */
00141       acc1 = (q31_t) ((((q63_t) x1 * c0) + (acc1 << 32)) >> 32);
00142
00143       /* acc2 +=  b[numTaps] * x[n-numTaps-2] */
00144       acc2 = (q31_t) ((((q63_t) x2 * c0) + (acc2 << 32)) >> 32);
00145
00146       /* acc3 +=  b[numTaps] * x[n-numTaps-3] */
00147       acc3 = (q31_t) ((((q63_t) x3 * c0) + (acc3 << 32)) >> 32);
00148
00149       /* Read the b[numTaps-1] coefficient */
00150       c0 = *(pb++);
00151
00152       /* Read x[n-numTaps-4] sample */
00153       x0 = *(px++);
00154
00155       /* Perform the multiply-accumulates */
00156       acc0 = (q31_t) ((((q63_t) x1 * c0) + (acc0 << 32)) >> 32);
00157       acc1 = (q31_t) ((((q63_t) x2 * c0) + (acc1 << 32)) >> 32);
00158       acc2 = (q31_t) ((((q63_t) x3 * c0) + (acc2 << 32)) >> 32);
00159       acc3 = (q31_t) ((((q63_t) x0 * c0) + (acc3 << 32)) >> 32);
00160
00161       /* Read the b[numTaps-2] coefficient */
00162       c0 = *(pb++);
00163
00164       /* Read x[n-numTaps-5] sample */
00165       x1 = *(px++);
00166
00167       /* Perform the multiply-accumulates */
00168       acc0 = (q31_t) ((((q63_t) x2 * c0) + (acc0 << 32)) >> 32);
00169       acc1 = (q31_t) ((((q63_t) x3 * c0) + (acc1 << 32)) >> 32);
00170       acc2 = (q31_t) ((((q63_t) x0 * c0) + (acc2 << 32)) >> 32);
00171       acc3 = (q31_t) ((((q63_t) x1 * c0) + (acc3 << 32)) >> 32);
00172
00173       /* Read the b[numTaps-3] coefficients */
00174       c0 = *(pb++);
00175
00176       /* Read x[n-numTaps-6] sample */
00177       x2 = *(px++);
00178
00179       /* Perform the multiply-accumulates */
00180       acc0 = (q31_t) ((((q63_t) x3 * c0) + (acc0 << 32)) >> 32);
00181       acc1 = (q31_t) ((((q63_t) x0 * c0) + (acc1 << 32)) >> 32);
00182       acc2 = (q31_t) ((((q63_t) x1 * c0) + (acc2 << 32)) >> 32);
00183       acc3 = (q31_t) ((((q63_t) x2 * c0) + (acc3 << 32)) >> 32);
00184       i--;
00185     }
00186
00187     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00188
00189     i = numTaps - (tapCnt * 4u);
00190     while(i > 0u)
00191     {
00192       /* Read coefficients */
00193       c0 = *(pb++);
00194
00195       /* Fetch 1 state variable */
00196       x3 = *(px++);
00197
00198       /* Perform the multiply-accumulates */
00199       acc0 = (q31_t) ((((q63_t) x0 * c0) + (acc0 << 32)) >> 32);
00200       acc1 = (q31_t) ((((q63_t) x1 * c0) + (acc1 << 32)) >> 32);
00201       acc2 = (q31_t) ((((q63_t) x2 * c0) + (acc2 << 32)) >> 32);
00202       acc3 = (q31_t) ((((q63_t) x3 * c0) + (acc3 << 32)) >> 32);
00203
00204       /* Reuse the present sample states for next sample */
00205       x0 = x1;
00206       x1 = x2;
00207       x2 = x3;
00208
00209       /* Decrement the loop counter */
00210       i--;
00211     }
00212
00213     /* Advance the state pointer by 4 to process the next group of 4 samples */
00214     pState = pState + 4;
00215
00216     /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.31
00217      ** Then store the 4 outputs in the destination buffer. */
00218     *pDst++ = (q31_t) (acc0 << 1);
00219     *pDst++ = (q31_t) (acc1 << 1);
00220     *pDst++ = (q31_t) (acc2 << 1);
00221     *pDst++ = (q31_t) (acc3 << 1);
00222
00223     /* Decrement the samples loop counter */
00224     blkCnt--;
00225   }
00226
00227
00228   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00229    ** No loop unrolling is used. */
00230   blkCnt = blockSize % 4u;
00231
00232   while(blkCnt > 0u)
00233   {
00234     /* Copy one sample at a time into state buffer */
00235     *pStateCurnt++ = *pSrc++;
00236
00237     /* Set the accumulator to zero */
00238     acc0 = 0;
00239
00240     /* Initialize state pointer */
00241     px = pState;
00242
00243     /* Initialize Coefficient pointer */
00244     pb = (pCoeffs);
00245
00246     i = numTaps;
00247
00248     /* Perform the multiply-accumulates */
00249     do
00250     {
00251       acc0 = (q31_t) ((((q63_t) * (px++) * (*(pb++))) + (acc0 << 32)) >> 32);
00252       i--;
00253     } while(i > 0u);
00254
00255     /* The result is in 2.30 format.  Convert to 1.31
00256      ** Then store the output in the destination buffer. */
00257     *pDst++ = (q31_t) (acc0 << 1);
00258
00259     /* Advance state pointer by 1 for the next sample */
00260     pState = pState + 1;
00261
00262     /* Decrement the samples loop counter */
00263     blkCnt--;
00264   }
00265
00266   /* Processing is complete.
00267    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00268    ** This prepares the state buffer for the next function call. */
00269
00270   /* Points to the start of the state buffer */
00271   pStateCurnt = S->pState;
00272
00273   tapCnt = (numTaps - 1u) >> 2u;
00274
00275   /* copy data */
00276   while(tapCnt > 0u)
00277   {
00278     *pStateCurnt++ = *pState++;
00279     *pStateCurnt++ = *pState++;
00280     *pStateCurnt++ = *pState++;
00281     *pStateCurnt++ = *pState++;
00282
00283     /* Decrement the loop counter */
00284     tapCnt--;
00285   }
00286
00287   /* Calculate remaining number of copies */
00288   tapCnt = (numTaps - 1u) % 0x4u;
00289
00290   /* Copy the remaining q31_t data */
00291   while(tapCnt > 0u)
00292   {
00293     *pStateCurnt++ = *pState++;
00294
00295     /* Decrement the loop counter */
00296     tapCnt--;
00297   }
00298
00299 }
00300
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CMSIS DSP Software Library: arm_fir_init_f32.c File Reference

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arm_fir_init_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_init_f32 (arm_fir_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_init_f32.c Source File

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arm_fir_init_f32.c

Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_init_f32.c
00009 *
00010 * Description:  Floating-point FIR filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * ---------------------------------------------------------------------------*/
00035
00036 #include "arm_math.h"
00037
00068 void arm_fir_init_f32(
00069   arm_fir_instance_f32 * S,
00070   uint16_t numTaps,
00071   float32_t * pCoeffs,
00072   float32_t * pState,
00073   uint32_t blockSize)
00074 {
00075   /* Assign filter taps */
00076   S->numTaps = numTaps;
00077
00078   /* Assign coefficient pointer */
00079   S->pCoeffs = pCoeffs;
00080
00081   /* Clear state buffer and the size of state buffer is (blockSize + numTaps - 1) */
00082   memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
00083
00084   /* Assign state pointer */
00085   S->pState = pState;
00086
00087 }
00088
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CMSIS DSP Software Library: arm_fir_init_q7.c File Reference

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arm_fir_init_q7.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_init_q7 (arm_fir_instance_q7 *S, uint16_t numTaps, q7_t *pCoeffs, q7_t *pState, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_init_q7.c Source File

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arm_fir_init_q7.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_init_q7.c
00009 *
00010 * Description:  Q7 FIR filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * ------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00065 void arm_fir_init_q7(
00066   arm_fir_instance_q7 * S,
00067   uint16_t numTaps,
00068   q7_t * pCoeffs,
00069   q7_t * pState,
00070   uint32_t blockSize)
00071 {
00072
00073   /* Assign filter taps */
00074   S->numTaps = numTaps;
00075
00076   /* Assign coefficient pointer */
00077   S->pCoeffs = pCoeffs;
00078
00079   /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
00080   memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q7_t));
00081
00082   /* Assign state pointer */
00083   S->pState = pState;
00084
00085 }
00086
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CMSIS DSP Software Library: arm_fir_init_q15.c File Reference

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arm_fir_init_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_fir_init_q15 (arm_fir_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_init_q15.c Source File

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arm_fir_init_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_init_q15.c
00009 *
00010 * Description:  Q15 FIR filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * ------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00085 arm_status arm_fir_init_q15(
00086   arm_fir_instance_q15 * S,
00087   uint16_t numTaps,
00088   q15_t * pCoeffs,
00089   q15_t * pState,
00090   uint32_t blockSize)
00091 {
00092   arm_status status;
00093
00094
00095 #ifndef ARM_MATH_CM0
00096
00097   /* Run the below code for Cortex-M4 and Cortex-M3 */
00098
00099   /* The Number of filter coefficients in the filter must be even and at least 4 */
00100   if((numTaps < 4u) || (numTaps & 0x1u))
00101   {
00102     status = ARM_MATH_ARGUMENT_ERROR;
00103   }
00104   else
00105   {
00106     /* Assign filter taps */
00107     S->numTaps = numTaps;
00108
00109     /* Assign coefficient pointer */
00110     S->pCoeffs = pCoeffs;
00111
00112     /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
00113     memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
00114
00115     /* Assign state pointer */
00116     S->pState = pState;
00117
00118     status = ARM_MATH_SUCCESS;
00119   }
00120
00121   return (status);
00122
00123 #else
00124
00125   /* Run the below code for Cortex-M0 */
00126
00127   /* Assign filter taps */
00128   S->numTaps = numTaps;
00129
00130   /* Assign coefficient pointer */
00131   S->pCoeffs = pCoeffs;
00132
00133   /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
00134   memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
00135
00136   /* Assign state pointer */
00137   S->pState = pState;
00138
00139   status = ARM_MATH_SUCCESS;
00140
00141   return (status);
00142
00143 #endif /*  #ifndef ARM_MATH_CM0 */
00144
00145 }
00146
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CMSIS DSP Software Library: arm_fir_init_q31.c File Reference

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arm_fir_init_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_init_q31 (arm_fir_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_init_q31.c Source File

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arm_fir_init_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_init_q31.c
00009 *
00010 * Description:  Q31 FIR filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00068 void arm_fir_init_q31(
00069   arm_fir_instance_q31 * S,
00070   uint16_t numTaps,
00071   q31_t * pCoeffs,
00072   q31_t * pState,
00073   uint32_t blockSize)
00074 {
00075   /* Assign filter taps */
00076   S->numTaps = numTaps;
00077
00078   /* Assign coefficient pointer */
00079   S->pCoeffs = pCoeffs;
00080
00081   /* Clear state buffer and state array size is (blockSize + numTaps - 1) */
00082   memset(pState, 0, (blockSize + ((uint32_t) numTaps - 1u)) * sizeof(q31_t));
00083
00084   /* Assign state pointer */
00085   S->pState = pState;
00086
00087 }
00088
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CMSIS DSP Software Library: arm_fir_interpolate_f32.c File Reference

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arm_fir_interpolate_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_interpolate_f32 (const arm_fir_interpolate_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_interpolate_f32.c Source File

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arm_fir_interpolate_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_interpolate_f32.c
00009 *
00010 * Description:  FIR interpolation for floating-point sequences.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00135 void arm_fir_interpolate_f32(
00136   const arm_fir_interpolate_instance_f32 * S,
00137   float32_t * pSrc,
00138   float32_t * pDst,
00139   uint32_t blockSize)
00140 {
00141   float32_t *pState = S->pState;                 /* State pointer */
00142   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
00143   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
00144   float32_t *ptr1, *ptr2;                        /* Temporary pointers for state and coefficient buffers */
00145
00146
00147 #ifndef ARM_MATH_CM0
00148
00149   /* Run the below code for Cortex-M4 and Cortex-M3 */
00150
00151   float32_t sum0;                                /* Accumulators */
00152   float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
00153   uint32_t i, blkCnt, j;                         /* Loop counters */
00154   uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
00155
00156
00157   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
00158   /* pStateCurnt points to the location where the new input data should be written */
00159   pStateCurnt = S->pState + (phaseLen - 1u);
00160
00161   /* Total number of intput samples */
00162   blkCnt = blockSize;
00163
00164   /* Loop over the blockSize. */
00165   while(blkCnt > 0u)
00166   {
00167     /* Copy new input sample into the state buffer */
00168     *pStateCurnt++ = *pSrc++;
00169
00170     /* Address modifier index of coefficient buffer */
00171     j = 1u;
00172
00173     /* Loop over the Interpolation factor. */
00174     i = S->L;
00175     while(i > 0u)
00176     {
00177       /* Set accumulator to zero */
00178       sum0 = 0.0f;
00179
00180       /* Initialize state pointer */
00181       ptr1 = pState;
00182
00183       /* Initialize coefficient pointer */
00184       ptr2 = pCoeffs + (S->L - j);
00185
00186       /* Loop over the polyPhase length. Unroll by a factor of 4.
00187        ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
00188       tapCnt = phaseLen >> 2u;
00189       while(tapCnt > 0u)
00190       {
00191
00192         /* Read the coefficient */
00193         c0 = *(ptr2);
00194
00195         /* Upsampling is done by stuffing L-1 zeros between each sample.
00196          * So instead of multiplying zeros with coefficients,
00197          * Increment the coefficient pointer by interpolation factor times. */
00198         ptr2 += S->L;
00199
00200         /* Read the input sample */
00201         x0 = *(ptr1++);
00202
00203         /* Perform the multiply-accumulate */
00204         sum0 += x0 * c0;
00205
00206         /* Read the coefficient */
00207         c0 = *(ptr2);
00208
00209         /* Increment the coefficient pointer by interpolation factor times. */
00210         ptr2 += S->L;
00211
00212         /* Read the input sample */
00213         x0 = *(ptr1++);
00214
00215         /* Perform the multiply-accumulate */
00216         sum0 += x0 * c0;
00217
00218         /* Read the coefficient */
00219         c0 = *(ptr2);
00220
00221         /* Increment the coefficient pointer by interpolation factor times. */
00222         ptr2 += S->L;
00223
00224         /* Read the input sample */
00225         x0 = *(ptr1++);
00226
00227         /* Perform the multiply-accumulate */
00228         sum0 += x0 * c0;
00229
00230         /* Read the coefficient */
00231         c0 = *(ptr2);
00232
00233         /* Increment the coefficient pointer by interpolation factor times. */
00234         ptr2 += S->L;
00235
00236         /* Read the input sample */
00237         x0 = *(ptr1++);
00238
00239         /* Perform the multiply-accumulate */
00240         sum0 += x0 * c0;
00241
00242         /* Decrement the loop counter */
00243         tapCnt--;
00244       }
00245
00246       /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
00247       tapCnt = phaseLen % 0x4u;
00248
00249       while(tapCnt > 0u)
00250       {
00251         /* Perform the multiply-accumulate */
00252         sum0 += *(ptr1++) * (*ptr2);
00253
00254         /* Increment the coefficient pointer by interpolation factor times. */
00255         ptr2 += S->L;
00256
00257         /* Decrement the loop counter */
00258         tapCnt--;
00259       }
00260
00261       /* The result is in the accumulator, store in the destination buffer. */
00262       *pDst++ = sum0;
00263
00264       /* Increment the address modifier index of coefficient buffer */
00265       j++;
00266
00267       /* Decrement the loop counter */
00268       i--;
00269     }
00270
00271     /* Advance the state pointer by 1
00272      * to process the next group of interpolation factor number samples */
00273     pState = pState + 1;
00274
00275     /* Decrement the loop counter */
00276     blkCnt--;
00277   }
00278
00279   /* Processing is complete.
00280    ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
00281    ** This prepares the state buffer for the next function call. */
00282
00283   /* Points to the start of the state buffer */
00284   pStateCurnt = S->pState;
00285
00286   tapCnt = (phaseLen - 1u) >> 2u;
00287
00288   /* copy data */
00289   while(tapCnt > 0u)
00290   {
00291     *pStateCurnt++ = *pState++;
00292     *pStateCurnt++ = *pState++;
00293     *pStateCurnt++ = *pState++;
00294     *pStateCurnt++ = *pState++;
00295
00296     /* Decrement the loop counter */
00297     tapCnt--;
00298   }
00299
00300   tapCnt = (phaseLen - 1u) % 0x04u;
00301
00302   while(tapCnt > 0u)
00303   {
00304     *pStateCurnt++ = *pState++;
00305
00306     /* Decrement the loop counter */
00307     tapCnt--;
00308   }
00309
00310 #else
00311
00312   /* Run the below code for Cortex-M0 */
00313
00314   float32_t sum;                                 /* Accumulator */
00315   uint32_t i, blkCnt;                            /* Loop counters */
00316   uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
00317
00318
00319   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
00320   /* pStateCurnt points to the location where the new input data should be written */
00321   pStateCurnt = S->pState + (phaseLen - 1u);
00322
00323   /* Total number of intput samples */
00324   blkCnt = blockSize;
00325
00326   /* Loop over the blockSize. */
00327   while(blkCnt > 0u)
00328   {
00329     /* Copy new input sample into the state buffer */
00330     *pStateCurnt++ = *pSrc++;
00331
00332     /* Loop over the Interpolation factor. */
00333     i = S->L;
00334
00335     while(i > 0u)
00336     {
00337       /* Set accumulator to zero */
00338       sum = 0.0f;
00339
00340       /* Initialize state pointer */
00341       ptr1 = pState;
00342
00343       /* Initialize coefficient pointer */
00344       ptr2 = pCoeffs + (i - 1u);
00345
00346       /* Loop over the polyPhase length */
00347       tapCnt = phaseLen;
00348
00349       while(tapCnt > 0u)
00350       {
00351         /* Perform the multiply-accumulate */
00352         sum += *ptr1++ * *ptr2;
00353
00354         /* Increment the coefficient pointer by interpolation factor times. */
00355         ptr2 += S->L;
00356
00357         /* Decrement the loop counter */
00358         tapCnt--;
00359       }
00360
00361       /* The result is in the accumulator, store in the destination buffer. */
00362       *pDst++ = sum;
00363
00364       /* Decrement the loop counter */
00365       i--;
00366     }
00367
00368     /* Advance the state pointer by 1
00369      * to process the next group of interpolation factor number samples */
00370     pState = pState + 1;
00371
00372     /* Decrement the loop counter */
00373     blkCnt--;
00374   }
00375
00376   /* Processing is complete.
00377    ** Now copy the last phaseLen - 1 samples to the start of the state buffer.
00378    ** This prepares the state buffer for the next function call. */
00379
00380   /* Points to the start of the state buffer */
00381   pStateCurnt = S->pState;
00382
00383   tapCnt = phaseLen - 1u;
00384
00385   while(tapCnt > 0u)
00386   {
00387     *pStateCurnt++ = *pState++;
00388
00389     /* Decrement the loop counter */
00390     tapCnt--;
00391   }
00392
00393 #endif /*   #ifndef ARM_MATH_CM0 */
00394
00395 }
00396
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CMSIS DSP Software Library: arm_fir_interpolate_init_f32.c File Reference

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arm_fir_interpolate_init_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_fir_interpolate_init_f32 (arm_fir_interpolate_instance_f32 *S, uint8_t L, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_interpolate_init_f32.c Source File

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arm_fir_interpolate_init_f32.c

Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_interpolate_init_f32.c
00009 *
00010 * Description:  Floating-point FIR interpolator initialization function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00068 arm_status arm_fir_interpolate_init_f32(
00069   arm_fir_interpolate_instance_f32 * S,
00070   uint8_t L,
00071   uint16_t numTaps,
00072   float32_t * pCoeffs,
00073   float32_t * pState,
00074   uint32_t blockSize)
00075 {
00076   arm_status status;
00077
00078   /* The filter length must be a multiple of the interpolation factor */
00079   if((numTaps % L) != 0u)
00080   {
00081     /* Set status as ARM_MATH_LENGTH_ERROR */
00082     status = ARM_MATH_LENGTH_ERROR;
00083   }
00084   else
00085   {
00086
00087     /* Assign coefficient pointer */
00088     S->pCoeffs = pCoeffs;
00089
00090     /* Assign Interpolation factor */
00091     S->L = L;
00092
00093     /* Assign polyPhaseLength */
00094     S->phaseLength = numTaps / L;
00095
00096     /* Clear state buffer and size of state array is always phaseLength + blockSize - 1 */
00097     memset(pState, 0,
00098            (blockSize +
00099             ((uint32_t) S->phaseLength - 1u)) * sizeof(float32_t));
00100
00101     /* Assign state pointer */
00102     S->pState = pState;
00103
00104     status = ARM_MATH_SUCCESS;
00105   }
00106
00107   return (status);
00108
00109 }
00110
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CMSIS DSP Software Library: arm_fir_interpolate_init_q15.c File Reference

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arm_fir_interpolate_init_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_fir_interpolate_init_q15 (arm_fir_interpolate_instance_q15 *S, uint8_t L, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_interpolate_init_q15.c Source File

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arm_fir_interpolate_init_q15.c

Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_interpolate_init_q15.c
00009 *
00010 * Description:  Q15 FIR interpolator initialization function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00068 arm_status arm_fir_interpolate_init_q15(
00069   arm_fir_interpolate_instance_q15 * S,
00070   uint8_t L,
00071   uint16_t numTaps,
00072   q15_t * pCoeffs,
00073   q15_t * pState,
00074   uint32_t blockSize)
00075 {
00076   arm_status status;
00077
00078   /* The filter length must be a multiple of the interpolation factor */
00079   if((numTaps % L) != 0u)
00080   {
00081     /* Set status as ARM_MATH_LENGTH_ERROR */
00082     status = ARM_MATH_LENGTH_ERROR;
00083   }
00084   else
00085   {
00086
00087     /* Assign coefficient pointer */
00088     S->pCoeffs = pCoeffs;
00089
00090     /* Assign Interpolation factor */
00091     S->L = L;
00092
00093     /* Assign polyPhaseLength */
00094     S->phaseLength = numTaps / L;
00095
00096     /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
00097     memset(pState, 0,
00098            (blockSize + ((uint32_t) S->phaseLength - 1u)) * sizeof(q15_t));
00099
00100     /* Assign state pointer */
00101     S->pState = pState;
00102
00103     status = ARM_MATH_SUCCESS;
00104   }
00105
00106   return (status);
00107
00108 }
00109
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CMSIS DSP Software Library: arm_fir_interpolate_init_q31.c File Reference

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arm_fir_interpolate_init_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_fir_interpolate_init_q31 (arm_fir_interpolate_instance_q31 *S, uint8_t L, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_interpolate_init_q31.c Source File

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arm_fir_interpolate_init_q31.c

Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_interpolate_init_q31.c
00009 *
00010 * Description:  Q31 FIR interpolator initialization function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00069 arm_status arm_fir_interpolate_init_q31(
00070   arm_fir_interpolate_instance_q31 * S,
00071   uint8_t L,
00072   uint16_t numTaps,
00073   q31_t * pCoeffs,
00074   q31_t * pState,
00075   uint32_t blockSize)
00076 {
00077   arm_status status;
00078
00079   /* The filter length must be a multiple of the interpolation factor */
00080   if((numTaps % L) != 0u)
00081   {
00082     /* Set status as ARM_MATH_LENGTH_ERROR */
00083     status = ARM_MATH_LENGTH_ERROR;
00084   }
00085   else
00086   {
00087
00088     /* Assign coefficient pointer */
00089     S->pCoeffs = pCoeffs;
00090
00091     /* Assign Interpolation factor */
00092     S->L = L;
00093
00094     /* Assign polyPhaseLength */
00095     S->phaseLength = numTaps / L;
00096
00097     /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
00098     memset(pState, 0,
00099            (blockSize + ((uint32_t) S->phaseLength - 1u)) * sizeof(q31_t));
00100
00101     /* Assign state pointer */
00102     S->pState = pState;
00103
00104     status = ARM_MATH_SUCCESS;
00105   }
00106
00107   return (status);
00108
00109 }
00110
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CMSIS DSP Software Library: arm_fir_interpolate_q15.c File Reference

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arm_fir_interpolate_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_interpolate_q15 (const arm_fir_interpolate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_interpolate_q15.c Source File

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arm_fir_interpolate_q15.c

Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_interpolate_q15.c
00009 *
00010 * Description:  Q15 FIR interpolation.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00062 void arm_fir_interpolate_q15(
00063   const arm_fir_interpolate_instance_q15 * S,
00064   q15_t * pSrc,
00065   q15_t * pDst,
00066   uint32_t blockSize)
00067 {
00068   q15_t *pState = S->pState;                     /* State pointer                                            */
00069   q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer                                      */
00070   q15_t *pStateCurnt;                            /* Points to the current sample of the state                */
00071   q15_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers     */
00072
00073
00074 #ifndef ARM_MATH_CM0
00075
00076   /* Run the below code for Cortex-M4 and Cortex-M3 */
00077
00078   q63_t sum0;                                    /* Accumulators                                             */
00079   q15_t x0, c0, c1;                              /* Temporary variables to hold state and coefficient values */
00080   q31_t c, x;
00081   uint32_t i, blkCnt, j, tapCnt;                 /* Loop counters                                            */
00082   uint16_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
00083
00084
00085   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
00086   /* pStateCurnt points to the location where the new input data should be written */
00087   pStateCurnt = S->pState + (phaseLen - 1u);
00088
00089   /* Total number of intput samples */
00090   blkCnt = blockSize;
00091
00092   /* Loop over the blockSize. */
00093   while(blkCnt > 0u)
00094   {
00095     /* Copy new input sample into the state buffer */
00096     *pStateCurnt++ = *pSrc++;
00097
00098     /* Address modifier index of coefficient buffer */
00099     j = 1u;
00100
00101     /* Loop over the Interpolation factor. */
00102     i = S->L;
00103     while(i > 0u)
00104     {
00105       /* Set accumulator to zero */
00106       sum0 = 0;
00107
00108       /* Initialize state pointer */
00109       ptr1 = pState;
00110
00111       /* Initialize coefficient pointer */
00112       ptr2 = pCoeffs + (S->L - j);
00113
00114       /* Loop over the polyPhase length. Unroll by a factor of 4.
00115        ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
00116       tapCnt = (uint32_t) phaseLen >> 2u;
00117       while(tapCnt > 0u)
00118       {
00119         /* Read the coefficient */
00120         c0 = *(ptr2);
00121
00122         /* Upsampling is done by stuffing L-1 zeros between each sample.
00123          * So instead of multiplying zeros with coefficients,
00124          * Increment the coefficient pointer by interpolation factor times. */
00125         ptr2 += S->L;
00126
00127         /* Read the coefficient */
00128         c1 = *(ptr2);
00129
00130         /* Increment the coefficient pointer by interpolation factor times. */
00131         ptr2 += S->L;
00132
00133         /* Pack the coefficients */
00134 #ifndef  ARM_MATH_BIG_ENDIAN
00135
00136         c = __PKHBT(c0, c1, 16);
00137
00138 #else
00139
00140         c = __PKHBT(c1, c0, 16);
00141
00142 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00143
00144         /* Read twp consecutive input samples */
00145         x = *__SIMD32(ptr1)++;
00146
00147         /* Perform the multiply-accumulate */
00148         sum0 = __SMLALD(x, c, sum0);
00149
00150         /* Read the coefficient */
00151         c0 = *(ptr2);
00152
00153         /* Upsampling is done by stuffing L-1 zeros between each sample.
00154          * So insted of multiplying zeros with coefficients,
00155          * Increment the coefficient pointer by interpolation factor times. */
00156         ptr2 += S->L;
00157
00158         /* Read the coefficient */
00159         c1 = *(ptr2);
00160
00161         /* Increment the coefficient pointer by interpolation factor times. */
00162         ptr2 += S->L;
00163
00164         /* Pack the coefficients */
00165 #ifndef  ARM_MATH_BIG_ENDIAN
00166
00167         c = __PKHBT(c0, c1, 16);
00168
00169 #else
00170
00171         c = __PKHBT(c1, c0, 16);
00172
00173 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN            */
00174
00175         /* Read twp consecutive input samples */
00176         x = *__SIMD32(ptr1)++;
00177
00178         /* Perform the multiply-accumulate */
00179         sum0 = __SMLALD(x, c, sum0);
00180
00181         /* Decrement the loop counter */
00182         tapCnt--;
00183       }
00184
00185       /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
00186       tapCnt = (uint32_t) phaseLen & 0x3u;
00187
00188       while(tapCnt > 0u)
00189       {
00190         /* Read the coefficient */
00191         c0 = *(ptr2);
00192
00193         /* Increment the coefficient pointer by interpolation factor times. */
00194         ptr2 += S->L;
00195
00196         /* Read the input sample */
00197         x0 = *(ptr1++);
00198
00199         /* Perform the multiply-accumulate */
00200         sum0 = __SMLALD(x0, c0, sum0);
00201
00202         /* Decrement the loop counter */
00203         tapCnt--;
00204       }
00205
00206       /* The result is in the accumulator, store in the destination buffer. */
00207       *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
00208
00209       /* Increment the address modifier index of coefficient buffer */
00210       j++;
00211
00212       /* Decrement the loop counter */
00213       i--;
00214     }
00215
00216     /* Advance the state pointer by 1
00217      * to process the next group of interpolation factor number samples */
00218     pState = pState + 1;
00219
00220     /* Decrement the loop counter */
00221     blkCnt--;
00222   }
00223
00224   /* Processing is complete.
00225    ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
00226    ** This prepares the state buffer for the next function call. */
00227
00228   /* Points to the start of the state buffer */
00229   pStateCurnt = S->pState;
00230
00231   i = ((uint32_t) phaseLen - 1u) >> 2u;
00232
00233   /* copy data */
00234   while(i > 0u)
00235   {
00236     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00237     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00238
00239     /* Decrement the loop counter */
00240     i--;
00241   }
00242
00243   i = ((uint32_t) phaseLen - 1u) % 0x04u;
00244
00245   while(i > 0u)
00246   {
00247     *pStateCurnt++ = *pState++;
00248
00249     /* Decrement the loop counter */
00250     i--;
00251   }
00252
00253 #else
00254
00255   /* Run the below code for Cortex-M0 */
00256
00257   q63_t sum;                                     /* Accumulator */
00258   q15_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
00259   uint32_t i, blkCnt, tapCnt;                    /* Loop counters                                            */
00260   uint16_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
00261
00262
00263   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
00264   /* pStateCurnt points to the location where the new input data should be written */
00265   pStateCurnt = S->pState + (phaseLen - 1u);
00266
00267   /* Total number of intput samples */
00268   blkCnt = blockSize;
00269
00270   /* Loop over the blockSize. */
00271   while(blkCnt > 0u)
00272   {
00273     /* Copy new input sample into the state buffer */
00274     *pStateCurnt++ = *pSrc++;
00275
00276     /* Loop over the Interpolation factor. */
00277     i = S->L;
00278
00279     while(i > 0u)
00280     {
00281       /* Set accumulator to zero */
00282       sum = 0;
00283
00284       /* Initialize state pointer */
00285       ptr1 = pState;
00286
00287       /* Initialize coefficient pointer */
00288       ptr2 = pCoeffs + (i - 1u);
00289
00290       /* Loop over the polyPhase length */
00291       tapCnt = (uint32_t) phaseLen;
00292
00293       while(tapCnt > 0u)
00294       {
00295         /* Read the coefficient */
00296         c0 = *ptr2;
00297
00298         /* Increment the coefficient pointer by interpolation factor times. */
00299         ptr2 += S->L;
00300
00301         /* Read the input sample */
00302         x0 = *ptr1++;
00303
00304         /* Perform the multiply-accumulate */
00305         sum += ((q31_t) x0 * c0);
00306
00307         /* Decrement the loop counter */
00308         tapCnt--;
00309       }
00310
00311       /* Store the result after converting to 1.15 format in the destination buffer */
00312       *pDst++ = (q15_t) (__SSAT((sum >> 15), 16));
00313
00314       /* Decrement the loop counter */
00315       i--;
00316     }
00317
00318     /* Advance the state pointer by 1
00319      * to process the next group of interpolation factor number samples */
00320     pState = pState + 1;
00321
00322     /* Decrement the loop counter */
00323     blkCnt--;
00324   }
00325
00326   /* Processing is complete.
00327    ** Now copy the last phaseLen - 1 samples to the start of the state buffer.
00328    ** This prepares the state buffer for the next function call. */
00329
00330   /* Points to the start of the state buffer */
00331   pStateCurnt = S->pState;
00332
00333   i = (uint32_t) phaseLen - 1u;
00334
00335   while(i > 0u)
00336   {
00337     *pStateCurnt++ = *pState++;
00338
00339     /* Decrement the loop counter */
00340     i--;
00341   }
00342
00343 #endif /*   #ifndef ARM_MATH_CM0 */
00344
00345 }
00346
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CMSIS DSP Software Library: arm_fir_interpolate_q31.c File Reference

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arm_fir_interpolate_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_interpolate_q31 (const arm_fir_interpolate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_interpolate_q31.c Source File

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arm_fir_interpolate_q31.c

Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_interpolate_q31.c
00009 *
00010 * Description:  Q31 FIR interpolation.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00063 void arm_fir_interpolate_q31(
00064   const arm_fir_interpolate_instance_q31 * S,
00065   q31_t * pSrc,
00066   q31_t * pDst,
00067   uint32_t blockSize)
00068 {
00069   q31_t *pState = S->pState;                     /* State pointer */
00070   q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00071   q31_t *pStateCurnt;                            /* Points to the current sample of the state */
00072   q31_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers */
00073
00074 #ifndef ARM_MATH_CM0
00075
00076   /* Run the below code for Cortex-M4 and Cortex-M3 */
00077
00078   q63_t sum0;                                    /* Accumulators */
00079   q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
00080   uint32_t i, blkCnt, j;                         /* Loop counters */
00081   uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
00082
00083
00084   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
00085   /* pStateCurnt points to the location where the new input data should be written */
00086   pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
00087
00088   /* Total number of intput samples */
00089   blkCnt = blockSize;
00090
00091   /* Loop over the blockSize. */
00092   while(blkCnt > 0u)
00093   {
00094     /* Copy new input sample into the state buffer */
00095     *pStateCurnt++ = *pSrc++;
00096
00097     /* Address modifier index of coefficient buffer */
00098     j = 1u;
00099
00100     /* Loop over the Interpolation factor. */
00101     i = S->L;
00102     while(i > 0u)
00103     {
00104       /* Set accumulator to zero */
00105       sum0 = 0;
00106
00107       /* Initialize state pointer */
00108       ptr1 = pState;
00109
00110       /* Initialize coefficient pointer */
00111       ptr2 = pCoeffs + (S->L - j);
00112
00113       /* Loop over the polyPhase length. Unroll by a factor of 4.
00114        ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
00115       tapCnt = phaseLen >> 2;
00116       while(tapCnt > 0u)
00117       {
00118
00119         /* Read the coefficient */
00120         c0 = *(ptr2);
00121
00122         /* Upsampling is done by stuffing L-1 zeros between each sample.
00123          * So instead of multiplying zeros with coefficients,
00124          * Increment the coefficient pointer by interpolation factor times. */
00125         ptr2 += S->L;
00126
00127         /* Read the input sample */
00128         x0 = *(ptr1++);
00129
00130         /* Perform the multiply-accumulate */
00131         sum0 += (q63_t) x0 *c0;
00132
00133         /* Read the coefficient */
00134         c0 = *(ptr2);
00135
00136         /* Increment the coefficient pointer by interpolation factor times. */
00137         ptr2 += S->L;
00138
00139         /* Read the input sample */
00140         x0 = *(ptr1++);
00141
00142         /* Perform the multiply-accumulate */
00143         sum0 += (q63_t) x0 *c0;
00144
00145         /* Read the coefficient */
00146         c0 = *(ptr2);
00147
00148         /* Increment the coefficient pointer by interpolation factor times. */
00149         ptr2 += S->L;
00150
00151         /* Read the input sample */
00152         x0 = *(ptr1++);
00153
00154         /* Perform the multiply-accumulate */
00155         sum0 += (q63_t) x0 *c0;
00156
00157         /* Read the coefficient */
00158         c0 = *(ptr2);
00159
00160         /* Increment the coefficient pointer by interpolation factor times. */
00161         ptr2 += S->L;
00162
00163         /* Read the input sample */
00164         x0 = *(ptr1++);
00165
00166         /* Perform the multiply-accumulate */
00167         sum0 += (q63_t) x0 *c0;
00168
00169         /* Decrement the loop counter */
00170         tapCnt--;
00171       }
00172
00173       /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
00174       tapCnt = phaseLen & 0x3u;
00175
00176       while(tapCnt > 0u)
00177       {
00178         /* Read the coefficient */
00179         c0 = *(ptr2);
00180
00181         /* Increment the coefficient pointer by interpolation factor times. */
00182         ptr2 += S->L;
00183
00184         /* Read the input sample */
00185         x0 = *(ptr1++);
00186
00187         /* Perform the multiply-accumulate */
00188         sum0 += (q63_t) x0 *c0;
00189
00190         /* Decrement the loop counter */
00191         tapCnt--;
00192       }
00193
00194       /* The result is in the accumulator, store in the destination buffer. */
00195       *pDst++ = (q31_t) (sum0 >> 31);
00196
00197       /* Increment the address modifier index of coefficient buffer */
00198       j++;
00199
00200       /* Decrement the loop counter */
00201       i--;
00202     }
00203
00204     /* Advance the state pointer by 1
00205      * to process the next group of interpolation factor number samples */
00206     pState = pState + 1;
00207
00208     /* Decrement the loop counter */
00209     blkCnt--;
00210   }
00211
00212   /* Processing is complete.
00213    ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
00214    ** This prepares the state buffer for the next function call. */
00215
00216   /* Points to the start of the state buffer */
00217   pStateCurnt = S->pState;
00218
00219   tapCnt = (phaseLen - 1u) >> 2u;
00220
00221   /* copy data */
00222   while(tapCnt > 0u)
00223   {
00224     *pStateCurnt++ = *pState++;
00225     *pStateCurnt++ = *pState++;
00226     *pStateCurnt++ = *pState++;
00227     *pStateCurnt++ = *pState++;
00228
00229     /* Decrement the loop counter */
00230     tapCnt--;
00231   }
00232
00233   tapCnt = (phaseLen - 1u) % 0x04u;
00234
00235   /* copy data */
00236   while(tapCnt > 0u)
00237   {
00238     *pStateCurnt++ = *pState++;
00239
00240     /* Decrement the loop counter */
00241     tapCnt--;
00242   }
00243
00244 #else
00245
00246   /* Run the below code for Cortex-M0 */
00247
00248   q63_t sum;                                     /* Accumulator */
00249   q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
00250   uint32_t i, blkCnt;                            /* Loop counters */
00251   uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
00252
00253
00254   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
00255   /* pStateCurnt points to the location where the new input data should be written */
00256   pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
00257
00258   /* Total number of intput samples */
00259   blkCnt = blockSize;
00260
00261   /* Loop over the blockSize. */
00262   while(blkCnt > 0u)
00263   {
00264     /* Copy new input sample into the state buffer */
00265     *pStateCurnt++ = *pSrc++;
00266
00267     /* Loop over the Interpolation factor. */
00268     i = S->L;
00269
00270     while(i > 0u)
00271     {
00272       /* Set accumulator to zero */
00273       sum = 0;
00274
00275       /* Initialize state pointer */
00276       ptr1 = pState;
00277
00278       /* Initialize coefficient pointer */
00279       ptr2 = pCoeffs + (i - 1u);
00280
00281       tapCnt = phaseLen;
00282
00283       while(tapCnt > 0u)
00284       {
00285         /* Read the coefficient */
00286         c0 = *(ptr2);
00287
00288         /* Increment the coefficient pointer by interpolation factor times. */
00289         ptr2 += S->L;
00290
00291         /* Read the input sample */
00292         x0 = *ptr1++;
00293
00294         /* Perform the multiply-accumulate */
00295         sum += (q63_t) x0 *c0;
00296
00297         /* Decrement the loop counter */
00298         tapCnt--;
00299       }
00300
00301       /* The result is in the accumulator, store in the destination buffer. */
00302       *pDst++ = (q31_t) (sum >> 31);
00303
00304       /* Decrement the loop counter */
00305       i--;
00306     }
00307
00308     /* Advance the state pointer by 1
00309      * to process the next group of interpolation factor number samples */
00310     pState = pState + 1;
00311
00312     /* Decrement the loop counter */
00313     blkCnt--;
00314   }
00315
00316   /* Processing is complete.
00317    ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
00318    ** This prepares the state buffer for the next function call. */
00319
00320   /* Points to the start of the state buffer */
00321   pStateCurnt = S->pState;
00322
00323   tapCnt = phaseLen - 1u;
00324
00325   /* copy data */
00326   while(tapCnt > 0u)
00327   {
00328     *pStateCurnt++ = *pState++;
00329
00330     /* Decrement the loop counter */
00331     tapCnt--;
00332   }
00333
00334 #endif /*   #ifndef ARM_MATH_CM0 */
00335
00336 }
00337
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CMSIS DSP Software Library: arm_fir_lattice_f32.c File Reference

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arm_fir_lattice_f32.c File Reference

#include "arm_math.h"

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void arm_fir_lattice_f32 (const arm_fir_lattice_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_lattice_f32.c Source File

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arm_fir_lattice_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_lattice_f32.c
00009 *
00010 * Description:  Processing function for the floating-point FIR Lattice filter.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00121 void arm_fir_lattice_f32(
00122   const arm_fir_lattice_instance_f32 * S,
00123   float32_t * pSrc,
00124   float32_t * pDst,
00125   uint32_t blockSize)
00126 {
00127   float32_t *pState;                             /* State pointer */
00128   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
00129   float32_t *px;                                 /* temporary state pointer */
00130   float32_t *pk;                                 /* temporary coefficient pointer */
00131
00132
00133 #ifndef ARM_MATH_CM0
00134
00135   /* Run the below code for Cortex-M4 and Cortex-M3 */
00136
00137   float32_t fcurr1, fnext1, gcurr1, gnext1;      /* temporary variables for first sample in loop unrolling */
00138   float32_t fcurr2, fnext2, gnext2;              /* temporary variables for second sample in loop unrolling */
00139   float32_t fcurr3, fnext3, gnext3;              /* temporary variables for third sample in loop unrolling */
00140   float32_t fcurr4, fnext4, gnext4;              /* temporary variables for fourth sample in loop unrolling */
00141   uint32_t numStages = S->numStages;             /* Number of stages in the filter */
00142   uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
00143
00144   gcurr1 = 0.0f;
00145   pState = &S->pState[0];
00146
00147   blkCnt = blockSize >> 2;
00148
00149   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00150      a second loop below computes the remaining 1 to 3 samples. */
00151   while(blkCnt > 0u)
00152   {
00153
00154     /* Read two samples from input buffer */
00155     /* f0(n) = x(n) */
00156     fcurr1 = *pSrc++;
00157     fcurr2 = *pSrc++;
00158
00159     /* Initialize coeff pointer */
00160     pk = (pCoeffs);
00161
00162     /* Initialize state pointer */
00163     px = pState;
00164
00165     /* Read g0(n-1) from state */
00166     gcurr1 = *px;
00167
00168     /* Process first sample for first tap */
00169     /* f1(n) = f0(n) +  K1 * g0(n-1) */
00170     fnext1 = fcurr1 + ((*pk) * gcurr1);
00171     /* g1(n) = f0(n) * K1  +  g0(n-1) */
00172     gnext1 = (fcurr1 * (*pk)) + gcurr1;
00173
00174     /* Process second sample for first tap */
00175     /* for sample 2 processing */
00176     fnext2 = fcurr2 + ((*pk) * fcurr1);
00177     gnext2 = (fcurr2 * (*pk)) + fcurr1;
00178
00179     /* Read next two samples from input buffer */
00180     /* f0(n+2) = x(n+2) */
00181     fcurr3 = *pSrc++;
00182     fcurr4 = *pSrc++;
00183
00184     /* Copy only last input samples into the state buffer
00185        which will be used for next four samples processing */
00186     *px++ = fcurr4;
00187
00188     /* Process third sample for first tap */
00189     fnext3 = fcurr3 + ((*pk) * fcurr2);
00190     gnext3 = (fcurr3 * (*pk)) + fcurr2;
00191
00192     /* Process fourth sample for first tap */
00193     fnext4 = fcurr4 + ((*pk) * fcurr3);
00194     gnext4 = (fcurr4 * (*pk++)) + fcurr3;
00195
00196     /* Update of f values for next coefficient set processing */
00197     fcurr1 = fnext1;
00198     fcurr2 = fnext2;
00199     fcurr3 = fnext3;
00200     fcurr4 = fnext4;
00201
00202     /* Loop unrolling.  Process 4 taps at a time . */
00203     stageCnt = (numStages - 1u) >> 2u;
00204
00205     /* Loop over the number of taps.  Unroll by a factor of 4.
00206      ** Repeat until we've computed numStages-3 coefficients. */
00207
00208     /* Process 2nd, 3rd, 4th and 5th taps ... here */
00209     while(stageCnt > 0u)
00210     {
00211       /* Read g1(n-1), g3(n-1) .... from state */
00212       gcurr1 = *px;
00213
00214       /* save g1(n) in state buffer */
00215       *px++ = gnext4;
00216
00217       /* Process first sample for 2nd, 6th .. tap */
00218       /* Sample processing for K2, K6.... */
00219       /* f2(n) = f1(n) +  K2 * g1(n-1) */
00220       fnext1 = fcurr1 + ((*pk) * gcurr1);
00221       /* Process second sample for 2nd, 6th .. tap */
00222       /* for sample 2 processing */
00223       fnext2 = fcurr2 + ((*pk) * gnext1);
00224       /* Process third sample for 2nd, 6th .. tap */
00225       fnext3 = fcurr3 + ((*pk) * gnext2);
00226       /* Process fourth sample for 2nd, 6th .. tap */
00227       fnext4 = fcurr4 + ((*pk) * gnext3);
00228
00229       /* g2(n) = f1(n) * K2  +  g1(n-1) */
00230       /* Calculation of state values for next stage */
00231       gnext4 = (fcurr4 * (*pk)) + gnext3;
00232       gnext3 = (fcurr3 * (*pk)) + gnext2;
00233       gnext2 = (fcurr2 * (*pk)) + gnext1;
00234       gnext1 = (fcurr1 * (*pk++)) + gcurr1;
00235
00236
00237       /* Read g2(n-1), g4(n-1) .... from state */
00238       gcurr1 = *px;
00239
00240       /* save g2(n) in state buffer */
00241       *px++ = gnext4;
00242
00243       /* Sample processing for K3, K7.... */
00244       /* Process first sample for 3rd, 7th .. tap */
00245       /* f3(n) = f2(n) +  K3 * g2(n-1) */
00246       fcurr1 = fnext1 + ((*pk) * gcurr1);
00247       /* Process second sample for 3rd, 7th .. tap */
00248       fcurr2 = fnext2 + ((*pk) * gnext1);
00249       /* Process third sample for 3rd, 7th .. tap */
00250       fcurr3 = fnext3 + ((*pk) * gnext2);
00251       /* Process fourth sample for 3rd, 7th .. tap */
00252       fcurr4 = fnext4 + ((*pk) * gnext3);
00253
00254       /* Calculation of state values for next stage */
00255       /* g3(n) = f2(n) * K3  +  g2(n-1) */
00256       gnext4 = (fnext4 * (*pk)) + gnext3;
00257       gnext3 = (fnext3 * (*pk)) + gnext2;
00258       gnext2 = (fnext2 * (*pk)) + gnext1;
00259       gnext1 = (fnext1 * (*pk++)) + gcurr1;
00260
00261
00262       /* Read g1(n-1), g3(n-1) .... from state */
00263       gcurr1 = *px;
00264
00265       /* save g3(n) in state buffer */
00266       *px++ = gnext4;
00267
00268       /* Sample processing for K4, K8.... */
00269       /* Process first sample for 4th, 8th .. tap */
00270       /* f4(n) = f3(n) +  K4 * g3(n-1) */
00271       fnext1 = fcurr1 + ((*pk) * gcurr1);
00272       /* Process second sample for 4th, 8th .. tap */
00273       /* for sample 2 processing */
00274       fnext2 = fcurr2 + ((*pk) * gnext1);
00275       /* Process third sample for 4th, 8th .. tap */
00276       fnext3 = fcurr3 + ((*pk) * gnext2);
00277       /* Process fourth sample for 4th, 8th .. tap */
00278       fnext4 = fcurr4 + ((*pk) * gnext3);
00279
00280       /* g4(n) = f3(n) * K4  +  g3(n-1) */
00281       /* Calculation of state values for next stage */
00282       gnext4 = (fcurr4 * (*pk)) + gnext3;
00283       gnext3 = (fcurr3 * (*pk)) + gnext2;
00284       gnext2 = (fcurr2 * (*pk)) + gnext1;
00285       gnext1 = (fcurr1 * (*pk++)) + gcurr1;
00286
00287       /* Read g2(n-1), g4(n-1) .... from state */
00288       gcurr1 = *px;
00289
00290       /* save g4(n) in state buffer */
00291       *px++ = gnext4;
00292
00293       /* Sample processing for K5, K9.... */
00294       /* Process first sample for 5th, 9th .. tap */
00295       /* f5(n) = f4(n) +  K5 * g4(n-1) */
00296       fcurr1 = fnext1 + ((*pk) * gcurr1);
00297       /* Process second sample for 5th, 9th .. tap */
00298       fcurr2 = fnext2 + ((*pk) * gnext1);
00299       /* Process third sample for 5th, 9th .. tap */
00300       fcurr3 = fnext3 + ((*pk) * gnext2);
00301       /* Process fourth sample for 5th, 9th .. tap */
00302       fcurr4 = fnext4 + ((*pk) * gnext3);
00303
00304       /* Calculation of state values for next stage */
00305       /* g5(n) = f4(n) * K5  +  g4(n-1) */
00306       gnext4 = (fnext4 * (*pk)) + gnext3;
00307       gnext3 = (fnext3 * (*pk)) + gnext2;
00308       gnext2 = (fnext2 * (*pk)) + gnext1;
00309       gnext1 = (fnext1 * (*pk++)) + gcurr1;
00310
00311       stageCnt--;
00312     }
00313
00314     /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
00315     stageCnt = (numStages - 1u) % 0x4u;
00316
00317     while(stageCnt > 0u)
00318     {
00319       gcurr1 = *px;
00320
00321       /* save g value in state buffer */
00322       *px++ = gnext4;
00323
00324       /* Process four samples for last three taps here */
00325       fnext1 = fcurr1 + ((*pk) * gcurr1);
00326       fnext2 = fcurr2 + ((*pk) * gnext1);
00327       fnext3 = fcurr3 + ((*pk) * gnext2);
00328       fnext4 = fcurr4 + ((*pk) * gnext3);
00329
00330       /* g1(n) = f0(n) * K1  +  g0(n-1) */
00331       gnext4 = (fcurr4 * (*pk)) + gnext3;
00332       gnext3 = (fcurr3 * (*pk)) + gnext2;
00333       gnext2 = (fcurr2 * (*pk)) + gnext1;
00334       gnext1 = (fcurr1 * (*pk++)) + gcurr1;
00335
00336       /* Update of f values for next coefficient set processing */
00337       fcurr1 = fnext1;
00338       fcurr2 = fnext2;
00339       fcurr3 = fnext3;
00340       fcurr4 = fnext4;
00341
00342       stageCnt--;
00343
00344     }
00345
00346     /* The results in the 4 accumulators, store in the destination buffer. */
00347     /* y(n) = fN(n) */
00348     *pDst++ = fcurr1;
00349     *pDst++ = fcurr2;
00350     *pDst++ = fcurr3;
00351     *pDst++ = fcurr4;
00352
00353     blkCnt--;
00354   }
00355
00356   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00357    ** No loop unrolling is used. */
00358   blkCnt = blockSize % 0x4u;
00359
00360   while(blkCnt > 0u)
00361   {
00362     /* f0(n) = x(n) */
00363     fcurr1 = *pSrc++;
00364
00365     /* Initialize coeff pointer */
00366     pk = (pCoeffs);
00367
00368     /* Initialize state pointer */
00369     px = pState;
00370
00371     /* read g2(n) from state buffer */
00372     gcurr1 = *px;
00373
00374     /* for sample 1 processing */
00375     /* f1(n) = f0(n) +  K1 * g0(n-1) */
00376     fnext1 = fcurr1 + ((*pk) * gcurr1);
00377     /* g1(n) = f0(n) * K1  +  g0(n-1) */
00378     gnext1 = (fcurr1 * (*pk++)) + gcurr1;
00379
00380     /* save g1(n) in state buffer */
00381     *px++ = fcurr1;
00382
00383     /* f1(n) is saved in fcurr1
00384        for next stage processing */
00385     fcurr1 = fnext1;
00386
00387     stageCnt = (numStages - 1u);
00388
00389     /* stage loop */
00390     while(stageCnt > 0u)
00391     {
00392       /* read g2(n) from state buffer */
00393       gcurr1 = *px;
00394
00395       /* save g1(n) in state buffer */
00396       *px++ = gnext1;
00397
00398       /* Sample processing for K2, K3.... */
00399       /* f2(n) = f1(n) +  K2 * g1(n-1) */
00400       fnext1 = fcurr1 + ((*pk) * gcurr1);
00401       /* g2(n) = f1(n) * K2  +  g1(n-1) */
00402       gnext1 = (fcurr1 * (*pk++)) + gcurr1;
00403
00404       /* f1(n) is saved in fcurr1
00405          for next stage processing */
00406       fcurr1 = fnext1;
00407
00408       stageCnt--;
00409
00410     }
00411
00412     /* y(n) = fN(n) */
00413     *pDst++ = fcurr1;
00414
00415     blkCnt--;
00416
00417   }
00418
00419 #else
00420
00421   /* Run the below code for Cortex-M0 */
00422
00423   float32_t fcurr, fnext, gcurr, gnext;          /* temporary variables */
00424   uint32_t numStages = S->numStages;             /* Length of the filter */
00425   uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
00426
00427   pState = &S->pState[0];
00428
00429   blkCnt = blockSize;
00430
00431   while(blkCnt > 0u)
00432   {
00433     /* f0(n) = x(n) */
00434     fcurr = *pSrc++;
00435
00436     /* Initialize coeff pointer */
00437     pk = pCoeffs;
00438
00439     /* Initialize state pointer */
00440     px = pState;
00441
00442     /* read g0(n-1) from state buffer */
00443     gcurr = *px;
00444
00445     /* for sample 1 processing */
00446     /* f1(n) = f0(n) +  K1 * g0(n-1) */
00447     fnext = fcurr + ((*pk) * gcurr);
00448     /* g1(n) = f0(n) * K1  +  g0(n-1) */
00449     gnext = (fcurr * (*pk++)) + gcurr;
00450
00451     /* save f0(n) in state buffer */
00452     *px++ = fcurr;
00453
00454     /* f1(n) is saved in fcurr
00455        for next stage processing */
00456     fcurr = fnext;
00457
00458     stageCnt = (numStages - 1u);
00459
00460     /* stage loop */
00461     while(stageCnt > 0u)
00462     {
00463       /* read g2(n) from state buffer */
00464       gcurr = *px;
00465
00466       /* save g1(n) in state buffer */
00467       *px++ = gnext;
00468
00469       /* Sample processing for K2, K3.... */
00470       /* f2(n) = f1(n) +  K2 * g1(n-1) */
00471       fnext = fcurr + ((*pk) * gcurr);
00472       /* g2(n) = f1(n) * K2  +  g1(n-1) */
00473       gnext = (fcurr * (*pk++)) + gcurr;
00474
00475       /* f1(n) is saved in fcurr1
00476          for next stage processing */
00477       fcurr = fnext;
00478
00479       stageCnt--;
00480
00481     }
00482
00483     /* y(n) = fN(n) */
00484     *pDst++ = fcurr;
00485
00486     blkCnt--;
00487
00488   }
00489
00490 #endif /*   #ifndef ARM_MATH_CM0 */
00491
00492 }
00493
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CMSIS DSP Software Library: arm_fir_lattice_init_f32.c File Reference

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arm_fir_lattice_init_f32.c File Reference

#include "arm_math.h"

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Functions

void arm_fir_lattice_init_f32 (arm_fir_lattice_instance_f32 *S, uint16_t numStages, float32_t *pCoeffs, float32_t *pState)
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CMSIS DSP Software Library: arm_fir_lattice_init_f32.c Source File

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arm_fir_lattice_init_f32.c

Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_lattice_init_f32.c
00009 *
00010 * Description:  Floating-point FIR Lattice filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00053 void arm_fir_lattice_init_f32(
00054   arm_fir_lattice_instance_f32 * S,
00055   uint16_t numStages,
00056   float32_t * pCoeffs,
00057   float32_t * pState)
00058 {
00059   /* Assign filter taps */
00060   S->numStages = numStages;
00061
00062   /* Assign coefficient pointer */
00063   S->pCoeffs = pCoeffs;
00064
00065   /* Clear state buffer and size is always numStages */
00066   memset(pState, 0, (numStages) * sizeof(float32_t));
00067
00068   /* Assign state pointer */
00069   S->pState = pState;
00070
00071 }
00072
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CMSIS DSP Software Library: arm_fir_lattice_init_q15.c File Reference

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arm_fir_lattice_init_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_lattice_init_q15 (arm_fir_lattice_instance_q15 *S, uint16_t numStages, q15_t *pCoeffs, q15_t *pState)
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CMSIS DSP Software Library: arm_fir_lattice_init_q15.c Source File

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arm_fir_lattice_init_q15.c

Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_lattice_init_q15.c
00009 *
00010 * Description:  Q15 FIR Lattice filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00053 void arm_fir_lattice_init_q15(
00054   arm_fir_lattice_instance_q15 * S,
00055   uint16_t numStages,
00056   q15_t * pCoeffs,
00057   q15_t * pState)
00058 {
00059   /* Assign filter taps */
00060   S->numStages = numStages;
00061
00062   /* Assign coefficient pointer */
00063   S->pCoeffs = pCoeffs;
00064
00065   /* Clear state buffer and size is always numStages */
00066   memset(pState, 0, (numStages) * sizeof(q15_t));
00067
00068   /* Assign state pointer */
00069   S->pState = pState;
00070
00071 }
00072
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CMSIS DSP Software Library: arm_fir_lattice_init_q31.c File Reference

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arm_fir_lattice_init_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_lattice_init_q31 (arm_fir_lattice_instance_q31 *S, uint16_t numStages, q31_t *pCoeffs, q31_t *pState)
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CMSIS DSP Software Library: arm_fir_lattice_init_q31.c Source File

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arm_fir_lattice_init_q31.c

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00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_lattice_init_q31.c
00009 *
00010 * Description:  Q31 FIR lattice filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00053 void arm_fir_lattice_init_q31(
00054   arm_fir_lattice_instance_q31 * S,
00055   uint16_t numStages,
00056   q31_t * pCoeffs,
00057   q31_t * pState)
00058 {
00059   /* Assign filter taps */
00060   S->numStages = numStages;
00061
00062   /* Assign coefficient pointer */
00063   S->pCoeffs = pCoeffs;
00064
00065   /* Clear state buffer and size is always numStages */
00066   memset(pState, 0, (numStages) * sizeof(q31_t));
00067
00068   /* Assign state pointer */
00069   S->pState = pState;
00070
00071 }
00072
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CMSIS DSP Software Library: arm_fir_lattice_q15.c File Reference

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arm_fir_lattice_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_lattice_q15 (const arm_fir_lattice_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_lattice_q15.c Source File

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arm_fir_lattice_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_lattice_q15.c
00009 *
00010 * Description:  Q15 FIR lattice filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00054 void arm_fir_lattice_q15(
00055   const arm_fir_lattice_instance_q15 * S,
00056   q15_t * pSrc,
00057   q15_t * pDst,
00058   uint32_t blockSize)
00059 {
00060   q15_t *pState;                                 /* State pointer */
00061   q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00062   q15_t *px;                                     /* temporary state pointer */
00063   q15_t *pk;                                     /* temporary coefficient pointer */
00064
00065
00066 #ifndef ARM_MATH_CM0
00067
00068   /* Run the below code for Cortex-M4 and Cortex-M3 */
00069
00070   q31_t fcurnt1, fnext1, gcurnt1 = 0, gnext1;    /* temporary variables for first sample in loop unrolling */
00071   q31_t fcurnt2, fnext2, gnext2;                 /* temporary variables for second sample in loop unrolling */
00072   q31_t fcurnt3, fnext3, gnext3;                 /* temporary variables for third sample in loop unrolling */
00073   q31_t fcurnt4, fnext4, gnext4;                 /* temporary variables for fourth sample in loop unrolling */
00074   uint32_t numStages = S->numStages;             /* Number of stages in the filter */
00075   uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
00076
00077   pState = &S->pState[0];
00078
00079   blkCnt = blockSize >> 2u;
00080
00081   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00082    ** a second loop below computes the remaining 1 to 3 samples. */
00083   while(blkCnt > 0u)
00084   {
00085
00086     /* Read two samples from input buffer */
00087     /* f0(n) = x(n) */
00088     fcurnt1 = *pSrc++;
00089     fcurnt2 = *pSrc++;
00090
00091     /* Initialize coeff pointer */
00092     pk = (pCoeffs);
00093
00094     /* Initialize state pointer */
00095     px = pState;
00096
00097     /* Read g0(n-1) from state */
00098     gcurnt1 = *px;
00099
00100     /* Process first sample for first tap */
00101     /* f1(n) = f0(n) +  K1 * g0(n-1) */
00102     fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
00103     fnext1 = __SSAT(fnext1, 16);
00104
00105     /* g1(n) = f0(n) * K1  +  g0(n-1) */
00106     gnext1 = (q31_t) ((fcurnt1 * (*pk)) >> 15u) + gcurnt1;
00107     gnext1 = __SSAT(gnext1, 16);
00108
00109     /* Process second sample for first tap */
00110     /* for sample 2 processing */
00111     fnext2 = (q31_t) ((fcurnt1 * (*pk)) >> 15u) + fcurnt2;
00112     fnext2 = __SSAT(fnext2, 16);
00113
00114     gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + fcurnt1;
00115     gnext2 = __SSAT(gnext2, 16);
00116
00117
00118     /* Read next two samples from input buffer */
00119     /* f0(n+2) = x(n+2) */
00120     fcurnt3 = *pSrc++;
00121     fcurnt4 = *pSrc++;
00122
00123     /* Copy only last input samples into the state buffer
00124        which is used for next four samples processing */
00125     *px++ = (q15_t) fcurnt4;
00126
00127     /* Process third sample for first tap */
00128     fnext3 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + fcurnt3;
00129     fnext3 = __SSAT(fnext3, 16);
00130     gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + fcurnt2;
00131     gnext3 = __SSAT(gnext3, 16);
00132
00133     /* Process fourth sample for first tap */
00134     fnext4 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + fcurnt4;
00135     fnext4 = __SSAT(fnext4, 16);
00136     gnext4 = (q31_t) ((fcurnt4 * (*pk++)) >> 15u) + fcurnt3;
00137     gnext4 = __SSAT(gnext4, 16);
00138
00139     /* Update of f values for next coefficient set processing */
00140     fcurnt1 = fnext1;
00141     fcurnt2 = fnext2;
00142     fcurnt3 = fnext3;
00143     fcurnt4 = fnext4;
00144
00145
00146     /* Loop unrolling.  Process 4 taps at a time . */
00147     stageCnt = (numStages - 1u) >> 2;
00148
00149
00150     /* Loop over the number of taps.  Unroll by a factor of 4.
00151      ** Repeat until we've computed numStages-3 coefficients. */
00152
00153     /* Process 2nd, 3rd, 4th and 5th taps ... here */
00154     while(stageCnt > 0u)
00155     {
00156       /* Read g1(n-1), g3(n-1) .... from state */
00157       gcurnt1 = *px;
00158
00159       /* save g1(n) in state buffer */
00160       *px++ = (q15_t) gnext4;
00161
00162       /* Process first sample for 2nd, 6th .. tap */
00163       /* Sample processing for K2, K6.... */
00164       /* f1(n) = f0(n) +  K1 * g0(n-1) */
00165       fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
00166       fnext1 = __SSAT(fnext1, 16);
00167
00168
00169       /* Process second sample for 2nd, 6th .. tap */
00170       /* for sample 2 processing */
00171       fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2;
00172       fnext2 = __SSAT(fnext2, 16);
00173       /* Process third sample for 2nd, 6th .. tap */
00174       fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3;
00175       fnext3 = __SSAT(fnext3, 16);
00176       /* Process fourth sample for 2nd, 6th .. tap */
00177       /* fnext4 = fcurnt4 + (*pk) * gnext3; */
00178       fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4;
00179       fnext4 = __SSAT(fnext4, 16);
00180
00181       /* g1(n) = f0(n) * K1  +  g0(n-1) */
00182       /* Calculation of state values for next stage */
00183       gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3;
00184       gnext4 = __SSAT(gnext4, 16);
00185       gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2;
00186       gnext3 = __SSAT(gnext3, 16);
00187
00188       gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1;
00189       gnext2 = __SSAT(gnext2, 16);
00190
00191       gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
00192       gnext1 = __SSAT(gnext1, 16);
00193
00194
00195       /* Read g2(n-1), g4(n-1) .... from state */
00196       gcurnt1 = *px;
00197
00198       /* save g1(n) in state buffer */
00199       *px++ = (q15_t) gnext4;
00200
00201       /* Sample processing for K3, K7.... */
00202       /* Process first sample for 3rd, 7th .. tap */
00203       /* f3(n) = f2(n) +  K3 * g2(n-1) */
00204       fcurnt1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fnext1;
00205       fcurnt1 = __SSAT(fcurnt1, 16);
00206
00207       /* Process second sample for 3rd, 7th .. tap */
00208       fcurnt2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fnext2;
00209       fcurnt2 = __SSAT(fcurnt2, 16);
00210
00211       /* Process third sample for 3rd, 7th .. tap */
00212       fcurnt3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fnext3;
00213       fcurnt3 = __SSAT(fcurnt3, 16);
00214
00215       /* Process fourth sample for 3rd, 7th .. tap */
00216       fcurnt4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fnext4;
00217       fcurnt4 = __SSAT(fcurnt4, 16);
00218
00219       /* Calculation of state values for next stage */
00220       /* g3(n) = f2(n) * K3  +  g2(n-1) */
00221       gnext4 = (q31_t) ((fnext4 * (*pk)) >> 15u) + gnext3;
00222       gnext4 = __SSAT(gnext4, 16);
00223
00224       gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15u) + gnext2;
00225       gnext3 = __SSAT(gnext3, 16);
00226
00227       gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15u) + gnext1;
00228       gnext2 = __SSAT(gnext2, 16);
00229
00230       gnext1 = (q31_t) ((fnext1 * (*pk++)) >> 15u) + gcurnt1;
00231       gnext1 = __SSAT(gnext1, 16);
00232
00233       /* Read g1(n-1), g3(n-1) .... from state */
00234       gcurnt1 = *px;
00235
00236       /* save g1(n) in state buffer */
00237       *px++ = (q15_t) gnext4;
00238
00239       /* Sample processing for K4, K8.... */
00240       /* Process first sample for 4th, 8th .. tap */
00241       /* f4(n) = f3(n) +  K4 * g3(n-1) */
00242       fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
00243       fnext1 = __SSAT(fnext1, 16);
00244
00245       /* Process second sample for 4th, 8th .. tap */
00246       /* for sample 2 processing */
00247       fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2;
00248       fnext2 = __SSAT(fnext2, 16);
00249
00250       /* Process third sample for 4th, 8th .. tap */
00251       fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3;
00252       fnext3 = __SSAT(fnext3, 16);
00253
00254       /* Process fourth sample for 4th, 8th .. tap */
00255       fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4;
00256       fnext4 = __SSAT(fnext4, 16);
00257
00258       /* g4(n) = f3(n) * K4  +  g3(n-1) */
00259       /* Calculation of state values for next stage */
00260       gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3;
00261       gnext4 = __SSAT(gnext4, 16);
00262
00263       gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2;
00264       gnext3 = __SSAT(gnext3, 16);
00265
00266       gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1;
00267       gnext2 = __SSAT(gnext2, 16);
00268       gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
00269       gnext1 = __SSAT(gnext1, 16);
00270
00271
00272       /* Read g2(n-1), g4(n-1) .... from state */
00273       gcurnt1 = *px;
00274
00275       /* save g4(n) in state buffer */
00276       *px++ = (q15_t) gnext4;
00277
00278       /* Sample processing for K5, K9.... */
00279       /* Process first sample for 5th, 9th .. tap */
00280       /* f5(n) = f4(n) +  K5 * g4(n-1) */
00281       fcurnt1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fnext1;
00282       fcurnt1 = __SSAT(fcurnt1, 16);
00283
00284       /* Process second sample for 5th, 9th .. tap */
00285       fcurnt2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fnext2;
00286       fcurnt2 = __SSAT(fcurnt2, 16);
00287
00288       /* Process third sample for 5th, 9th .. tap */
00289       fcurnt3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fnext3;
00290       fcurnt3 = __SSAT(fcurnt3, 16);
00291
00292       /* Process fourth sample for 5th, 9th .. tap */
00293       fcurnt4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fnext4;
00294       fcurnt4 = __SSAT(fcurnt4, 16);
00295
00296       /* Calculation of state values for next stage */
00297       /* g5(n) = f4(n) * K5  +  g4(n-1) */
00298       gnext4 = (q31_t) ((fnext4 * (*pk)) >> 15u) + gnext3;
00299       gnext4 = __SSAT(gnext4, 16);
00300       gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15u) + gnext2;
00301       gnext3 = __SSAT(gnext3, 16);
00302       gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15u) + gnext1;
00303       gnext2 = __SSAT(gnext2, 16);
00304       gnext1 = (q31_t) ((fnext1 * (*pk++)) >> 15u) + gcurnt1;
00305       gnext1 = __SSAT(gnext1, 16);
00306
00307       stageCnt--;
00308     }
00309
00310     /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
00311     stageCnt = (numStages - 1u) % 0x4u;
00312
00313     while(stageCnt > 0u)
00314     {
00315       gcurnt1 = *px;
00316
00317       /* save g value in state buffer */
00318       *px++ = (q15_t) gnext4;
00319
00320       /* Process four samples for last three taps here */
00321       fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
00322       fnext1 = __SSAT(fnext1, 16);
00323       fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2;
00324       fnext2 = __SSAT(fnext2, 16);
00325
00326       fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3;
00327       fnext3 = __SSAT(fnext3, 16);
00328
00329       fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4;
00330       fnext4 = __SSAT(fnext4, 16);
00331
00332       /* g1(n) = f0(n) * K1  +  g0(n-1) */
00333       gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3;
00334       gnext4 = __SSAT(gnext4, 16);
00335       gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2;
00336       gnext3 = __SSAT(gnext3, 16);
00337       gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1;
00338       gnext2 = __SSAT(gnext2, 16);
00339       gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
00340       gnext1 = __SSAT(gnext1, 16);
00341
00342       /* Update of f values for next coefficient set processing */
00343       fcurnt1 = fnext1;
00344       fcurnt2 = fnext2;
00345       fcurnt3 = fnext3;
00346       fcurnt4 = fnext4;
00347
00348       stageCnt--;
00349
00350     }
00351
00352     /* The results in the 4 accumulators, store in the destination buffer. */
00353     /* y(n) = fN(n) */
00354
00355 #ifndef  ARM_MATH_BIG_ENDIAN
00356
00357     *__SIMD32(pDst)++ = __PKHBT(fcurnt1, fcurnt2, 16);
00358     *__SIMD32(pDst)++ = __PKHBT(fcurnt3, fcurnt4, 16);
00359
00360 #else
00361
00362     *__SIMD32(pDst)++ = __PKHBT(fcurnt2, fcurnt1, 16);
00363     *__SIMD32(pDst)++ = __PKHBT(fcurnt4, fcurnt3, 16);
00364
00365 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00366
00367     blkCnt--;
00368   }
00369
00370   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00371    ** No loop unrolling is used. */
00372   blkCnt = blockSize % 0x4u;
00373
00374   while(blkCnt > 0u)
00375   {
00376     /* f0(n) = x(n) */
00377     fcurnt1 = *pSrc++;
00378
00379     /* Initialize coeff pointer */
00380     pk = (pCoeffs);
00381
00382     /* Initialize state pointer */
00383     px = pState;
00384
00385     /* read g2(n) from state buffer */
00386     gcurnt1 = *px;
00387
00388     /* for sample 1 processing */
00389     /* f1(n) = f0(n) +  K1 * g0(n-1) */
00390     fnext1 = (((q31_t) gcurnt1 * (*pk)) >> 15u) + fcurnt1;
00391     fnext1 = __SSAT(fnext1, 16);
00392
00393
00394     /* g1(n) = f0(n) * K1  +  g0(n-1) */
00395     gnext1 = (((q31_t) fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
00396     gnext1 = __SSAT(gnext1, 16);
00397
00398     /* save g1(n) in state buffer */
00399     *px++ = (q15_t) fcurnt1;
00400
00401     /* f1(n) is saved in fcurnt1
00402        for next stage processing */
00403     fcurnt1 = fnext1;
00404
00405     stageCnt = (numStages - 1u);
00406
00407     /* stage loop */
00408     while(stageCnt > 0u)
00409     {
00410       /* read g2(n) from state buffer */
00411       gcurnt1 = *px;
00412
00413       /* save g1(n) in state buffer */
00414       *px++ = (q15_t) gnext1;
00415
00416       /* Sample processing for K2, K3.... */
00417       /* f2(n) = f1(n) +  K2 * g1(n-1) */
00418       fnext1 = (((q31_t) gcurnt1 * (*pk)) >> 15u) + fcurnt1;
00419       fnext1 = __SSAT(fnext1, 16);
00420
00421       /* g2(n) = f1(n) * K2  +  g1(n-1) */
00422       gnext1 = (((q31_t) fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
00423       gnext1 = __SSAT(gnext1, 16);
00424
00425
00426       /* f1(n) is saved in fcurnt1
00427          for next stage processing */
00428       fcurnt1 = fnext1;
00429
00430       stageCnt--;
00431
00432     }
00433
00434     /* y(n) = fN(n) */
00435     *pDst++ = __SSAT(fcurnt1, 16);
00436
00437
00438     blkCnt--;
00439
00440   }
00441
00442 #else
00443
00444   /* Run the below code for Cortex-M0 */
00445
00446   q31_t fcurnt, fnext, gcurnt, gnext;            /* temporary variables */
00447   uint32_t numStages = S->numStages;             /* Length of the filter */
00448   uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
00449
00450   pState = &S->pState[0];
00451
00452   blkCnt = blockSize;
00453
00454   while(blkCnt > 0u)
00455   {
00456     /* f0(n) = x(n) */
00457     fcurnt = *pSrc++;
00458
00459     /* Initialize coeff pointer */
00460     pk = (pCoeffs);
00461
00462     /* Initialize state pointer */
00463     px = pState;
00464
00465     /* read g0(n-1) from state buffer */
00466     gcurnt = *px;
00467
00468     /* for sample 1 processing */
00469     /* f1(n) = f0(n) +  K1 * g0(n-1) */
00470     fnext = ((gcurnt * (*pk)) >> 15u) + fcurnt;
00471     fnext = __SSAT(fnext, 16);
00472
00473
00474     /* g1(n) = f0(n) * K1  +  g0(n-1) */
00475     gnext = ((fcurnt * (*pk++)) >> 15u) + gcurnt;
00476     gnext = __SSAT(gnext, 16);
00477
00478     /* save f0(n) in state buffer */
00479     *px++ = (q15_t) fcurnt;
00480
00481     /* f1(n) is saved in fcurnt
00482        for next stage processing */
00483     fcurnt = fnext;
00484
00485     stageCnt = (numStages - 1u);
00486
00487     /* stage loop */
00488     while(stageCnt > 0u)
00489     {
00490       /* read g1(n-1) from state buffer */
00491       gcurnt = *px;
00492
00493       /* save g0(n-1) in state buffer */
00494       *px++ = (q15_t) gnext;
00495
00496       /* Sample processing for K2, K3.... */
00497       /* f2(n) = f1(n) +  K2 * g1(n-1) */
00498       fnext = ((gcurnt * (*pk)) >> 15u) + fcurnt;
00499       fnext = __SSAT(fnext, 16);
00500
00501       /* g2(n) = f1(n) * K2  +  g1(n-1) */
00502       gnext = ((fcurnt * (*pk++)) >> 15u) + gcurnt;
00503       gnext = __SSAT(gnext, 16);
00504
00505
00506       /* f1(n) is saved in fcurnt
00507          for next stage processing */
00508       fcurnt = fnext;
00509
00510       stageCnt--;
00511
00512     }
00513
00514     /* y(n) = fN(n) */
00515     *pDst++ = __SSAT(fcurnt, 16);
00516
00517
00518     blkCnt--;
00519
00520   }
00521
00522 #endif /*   #ifndef ARM_MATH_CM0 */
00523
00524 }
00525
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CMSIS DSP Software Library: arm_fir_lattice_q31.c File Reference

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arm_fir_lattice_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_fir_lattice_q31 (const arm_fir_lattice_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_lattice_q31.c Source File

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arm_fir_lattice_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_lattice_q31.c
00009 *
00010 * Description:  Q31 FIR lattice filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_fir_lattice_q31(
00059   const arm_fir_lattice_instance_q31 * S,
00060   q31_t * pSrc,
00061   q31_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   q31_t *pState;                                 /* State pointer */
00065   q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00066   q31_t *px;                                     /* temporary state pointer */
00067   q31_t *pk;                                     /* temporary coefficient pointer */
00068
00069
00070 #ifndef ARM_MATH_CM0
00071
00072   /* Run the below code for Cortex-M4 and Cortex-M3 */
00073
00074   q31_t fcurr1, fnext1, gcurr1 = 0, gnext1;      /* temporary variables for first sample in loop unrolling */
00075   q63_t fcurr2, fnext2, gnext2;                  /* temporary variables for second sample in loop unrolling */
00076   q63_t fcurr3, fnext3, gnext3;                  /* temporary variables for third sample in loop unrolling */
00077   q63_t fcurr4, fnext4, gnext4;                  /* temporary variables for fourth sample in loop unrolling */
00078   uint32_t numStages = S->numStages;             /* Length of the filter */
00079   uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
00080
00081   pState = &S->pState[0];
00082
00083   blkCnt = blockSize >> 2u;
00084
00085   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00086    ** a second loop below computes the remaining 1 to 3 samples. */
00087   while(blkCnt > 0u)
00088   {
00089
00090     /* Read two samples from input buffer */
00091     /* f0(n) = x(n) */
00092     fcurr1 = *pSrc++;
00093     /* f0(n) = x(n) */
00094     fcurr2 = *pSrc++;
00095
00096     /* Initialize coeff pointer */
00097     pk = (pCoeffs);
00098
00099     /* Initialize state pointer */
00100     px = pState;
00101
00102     /* Read g0(n-1) from state */
00103     gcurr1 = *px;
00104
00105     /* Process first sample for first tap */
00106     /* f1(n) = f0(n) +  K1 * g0(n-1) */
00107     fnext1 = (q31_t) (((q63_t) gcurr1 * (*pk)) >> 31) + fcurr1;
00108     /* g1(n) = f0(n) * K1  +  g0(n-1) */
00109     gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 31) + gcurr1;
00110
00111     /* Process second sample for first tap */
00112     /* for sample 2 processing */
00113     fnext2 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 31) + fcurr2;
00114     gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 31) + fcurr1;
00115
00116
00117     /* Read next two samples from input buffer */
00118     /* f0(n+2) = x(n+2) */
00119     fcurr3 = *pSrc++;
00120     fcurr4 = *pSrc++;
00121
00122     /* Copy only last input samples into the state buffer
00123        which will be used for next four samples processing */
00124     *px++ = (q31_t) fcurr4;
00125
00126     /* Process third sample for first tap */
00127     fnext3 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 31) + fcurr3;
00128     gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 31) + fcurr2;
00129
00130     /* Process fourth sample for first tap */
00131     fnext4 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 31) + fcurr4;
00132     gnext4 = (q31_t) (((q63_t) fcurr4 * (*pk++)) >> 31) + fcurr3;
00133
00134     /* save g1(n) in state buffer for next sample processing */
00135     /* *px++ = gnext4;       */
00136
00137     /* Update of f values for next coefficient set processing */
00138     fcurr1 = fnext1;
00139     fcurr2 = fnext2;
00140     fcurr3 = fnext3;
00141     fcurr4 = fnext4;
00142
00143
00144     /* Loop unrolling.  Process 4 taps at a time . */
00145     stageCnt = (numStages - 1u) >> 2u;
00146
00147
00148     /* Loop over the number of taps.  Unroll by a factor of 4.
00149      ** Repeat until we've computed numStages-3 coefficients. */
00150
00151     /* Process 2nd, 3rd, 4th and 5th taps ... here */
00152     while(stageCnt > 0u)
00153     {
00154       /* Read g1(n-1), g3(n-1) .... from state */
00155       gcurr1 = *px;
00156
00157       /* save g1(n) in state buffer */
00158       *px++ = (q31_t) gnext4;
00159
00160       /* Process first sample for 2nd, 6th .. tap */
00161       /* Sample processing for K2, K6.... */
00162       /* f2(n) = f1(n) +  K2 * g1(n-1) */
00163       fnext1 = (q31_t) (((q63_t) gcurr1 * (*pk)) >> 31) + fcurr1;
00164       /* Process second sample for 2nd, 6th .. tap */
00165       /* for sample 2 processing */
00166       fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 31) + fcurr2;
00167       /* Process third sample for 2nd, 6th .. tap */
00168       fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 31) + fcurr3;
00169       /* Process fourth sample for 2nd, 6th .. tap */
00170       fnext4 = (q31_t) (((q63_t) gnext3 * (*pk)) >> 31) + fcurr4;
00171
00172       /* g2(n) = f1(n) * K2  +  g1(n-1) */
00173       /* Calculation of state values for next stage */
00174       gnext4 = (q31_t) (((q63_t) fcurr4 * (*pk)) >> 31) + gnext3;
00175       gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 31) + gnext2;
00176       gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 31) + gnext1;
00177       gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk++)) >> 31) + gcurr1;
00178
00179
00180       /* Read g2(n-1), g4(n-1) .... from state */
00181       gcurr1 = *px;
00182
00183       /* save g2(n) in state buffer */
00184       *px++ = (q31_t) gnext4;
00185
00186       /* Sample processing for K3, K7.... */
00187       /* Process first sample for 3rd, 7th .. tap */
00188       /* f3(n) = f2(n) +  K3 * g2(n-1) */
00189       fcurr1 = (q31_t) (((q63_t) gcurr1 * (*pk)) >> 31) + fnext1;
00190       /* Process second sample for 3rd, 7th .. tap */
00191       fcurr2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 31) + fnext2;
00192       /* Process third sample for 3rd, 7th .. tap */
00193       fcurr3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 31) + fnext3;
00194       /* Process fourth sample for 3rd, 7th .. tap */
00195       fcurr4 = (q31_t) (((q63_t) gnext3 * (*pk)) >> 31) + fnext4;
00196
00197       /* Calculation of state values for next stage */
00198       /*  gnext4 = fnext4 * (*pk) +  gnext3; */
00199       gnext4 = (q31_t) (((q63_t) fnext4 * (*pk)) >> 31) + gnext3;
00200       gnext3 = (q31_t) (((q63_t) fnext3 * (*pk)) >> 31) + gnext2;
00201       /*  gnext2 = fnext2 * (*pk) +  gnext1; */
00202       gnext2 = (q31_t) (((q63_t) fnext2 * (*pk)) >> 31) + gnext1;
00203
00204       /* g1(n) = f0(n) * K1  +  g0(n-1) */
00205       /*  gnext1 = fnext1 * (*pk++) +  gcurr1; */
00206       gnext1 = (q31_t) (((q63_t) fnext1 * (*pk++)) >> 31) + gcurr1;
00207
00208       /* Read g1(n-1), g3(n-1) .... from state */
00209       gcurr1 = *px;
00210
00211       /* save g1(n) in state buffer */
00212       *px++ = (q31_t) gnext4;
00213
00214       /* Sample processing for K4, K8.... */
00215       /* Process first sample for 4th, 8th .. tap */
00216       /* f4(n) = f3(n) +  K4 * g3(n-1) */
00217       fnext1 = (q31_t) (((q63_t) gcurr1 * (*pk)) >> 31) + fcurr1;
00218       /* Process second sample for 4th, 8th .. tap */
00219       /* for sample 2 processing */
00220       fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 31) + fcurr2;
00221       /* Process third sample for 4th, 8th .. tap */
00222       fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 31) + fcurr3;
00223       /* Process fourth sample for 4th, 8th .. tap */
00224       fnext4 = (q31_t) (((q63_t) gnext3 * (*pk)) >> 31) + fcurr4;
00225
00226       /* g4(n) = f3(n) * K4  +  g3(n-1) */
00227       /* Calculation of state values for next stage */
00228       gnext4 = (q31_t) (((q63_t) fcurr4 * (*pk)) >> 31) + gnext3;
00229       gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 31) + gnext2;
00230       gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 31) + gnext1;
00231       gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk++)) >> 31) + gcurr1;
00232
00233       /* Read g2(n-1), g4(n-1) .... from state */
00234       gcurr1 = *px;
00235
00236       /* save g4(n) in state buffer */
00237       *px++ = (q31_t) gnext4;
00238
00239       /* Sample processing for K5, K9.... */
00240       /* Process first sample for 5th, 9th .. tap */
00241       /* f5(n) = f4(n) +  K5 * g4(n-1) */
00242       fcurr1 = (q31_t) (((q63_t) gcurr1 * (*pk)) >> 31) + fnext1;
00243       /* Process second sample for 5th, 9th .. tap */
00244       fcurr2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 31) + fnext2;
00245       /* Process third sample for 5th, 9th .. tap */
00246       fcurr3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 31) + fnext3;
00247       /* Process fourth sample for 5th, 9th .. tap */
00248       fcurr4 = (q31_t) (((q63_t) gnext3 * (*pk)) >> 31) + fnext4;
00249
00250       /* Calculation of state values for next stage */
00251       /* g5(n) = f4(n) * K5  +  g4(n-1) */
00252       gnext4 = (q31_t) (((q63_t) fnext4 * (*pk)) >> 31) + gnext3;
00253       gnext3 = (q31_t) (((q63_t) fnext3 * (*pk)) >> 31) + gnext2;
00254       gnext2 = (q31_t) (((q63_t) fnext2 * (*pk)) >> 31) + gnext1;
00255       gnext1 = (q31_t) (((q63_t) fnext1 * (*pk++)) >> 31) + gcurr1;
00256
00257       stageCnt--;
00258     }
00259
00260     /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
00261     stageCnt = (numStages - 1u) % 0x4u;
00262
00263     while(stageCnt > 0u)
00264     {
00265       gcurr1 = *px;
00266
00267       /* save g value in state buffer */
00268       *px++ = (q31_t) gnext4;
00269
00270       /* Process four samples for last three taps here */
00271       fnext1 = (q31_t) (((q63_t) gcurr1 * (*pk)) >> 31) + fcurr1;
00272       fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 31) + fcurr2;
00273       fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 31) + fcurr3;
00274       fnext4 = (q31_t) (((q63_t) gnext3 * (*pk)) >> 31) + fcurr4;
00275
00276       /* g1(n) = f0(n) * K1  +  g0(n-1) */
00277       gnext4 = (q31_t) (((q63_t) fcurr4 * (*pk)) >> 31) + gnext3;
00278       gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 31) + gnext2;
00279       gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 31) + gnext1;
00280       gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk++)) >> 31) + gcurr1;
00281
00282       /* Update of f values for next coefficient set processing */
00283       fcurr1 = fnext1;
00284       fcurr2 = fnext2;
00285       fcurr3 = fnext3;
00286       fcurr4 = fnext4;
00287
00288       stageCnt--;
00289
00290     }
00291
00292     /* The results in the 4 accumulators, store in the destination buffer. */
00293     /* y(n) = fN(n) */
00294     *pDst++ = fcurr1;
00295     *pDst++ = (q31_t) fcurr2;
00296     *pDst++ = (q31_t) fcurr3;
00297     *pDst++ = (q31_t) fcurr4;
00298
00299     blkCnt--;
00300   }
00301
00302   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00303    ** No loop unrolling is used. */
00304   blkCnt = blockSize % 0x4u;
00305
00306   while(blkCnt > 0u)
00307   {
00308     /* f0(n) = x(n) */
00309     fcurr1 = *pSrc++;
00310
00311     /* Initialize coeff pointer */
00312     pk = (pCoeffs);
00313
00314     /* Initialize state pointer */
00315     px = pState;
00316
00317     /* read g2(n) from state buffer */
00318     gcurr1 = *px;
00319
00320     /* for sample 1 processing */
00321     /* f1(n) = f0(n) +  K1 * g0(n-1) */
00322     fnext1 = (q31_t) (((q63_t) gcurr1 * (*pk)) >> 31) + fcurr1;
00323     /* g1(n) = f0(n) * K1  +  g0(n-1) */
00324     gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk++)) >> 31) + gcurr1;
00325     /* save g1(n) in state buffer */
00326     *px++ = fcurr1;
00327
00328     /* f1(n) is saved in fcurr1
00329        for next stage processing */
00330     fcurr1 = fnext1;
00331
00332     stageCnt = (numStages - 1u);
00333
00334     /* stage loop */
00335     while(stageCnt > 0u)
00336     {
00337       /* read g2(n) from state buffer */
00338       gcurr1 = *px;
00339
00340       /* save g1(n) in state buffer */
00341       *px++ = gnext1;
00342
00343       /* Sample processing for K2, K3.... */
00344       /* f2(n) = f1(n) +  K2 * g1(n-1) */
00345       fnext1 = (q31_t) (((q63_t) gcurr1 * (*pk)) >> 31) + fcurr1;
00346       /* g2(n) = f1(n) * K2  +  g1(n-1) */
00347       gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk++)) >> 31) + gcurr1;
00348
00349       /* f1(n) is saved in fcurr1
00350          for next stage processing */
00351       fcurr1 = fnext1;
00352
00353       stageCnt--;
00354
00355     }
00356
00357     /* y(n) = fN(n) */
00358     *pDst++ = fcurr1;
00359
00360     blkCnt--;
00361
00362   }
00363
00364 #else
00365
00366 /* Run the below code for Cortex-M0 */
00367
00368   q31_t fcurr, fnext, gcurr, gnext;              /* temporary variables */
00369   uint32_t numStages = S->numStages;             /* Length of the filter */
00370   uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
00371
00372   pState = &S->pState[0];
00373
00374   blkCnt = blockSize;
00375
00376   while(blkCnt > 0u)
00377   {
00378     /* f0(n) = x(n) */
00379     fcurr = *pSrc++;
00380
00381     /* Initialize coeff pointer */
00382     pk = (pCoeffs);
00383
00384     /* Initialize state pointer */
00385     px = pState;
00386
00387     /* read g0(n-1) from state buffer */
00388     gcurr = *px;
00389
00390     /* for sample 1 processing */
00391     /* f1(n) = f0(n) +  K1 * g0(n-1) */
00392     fnext = (q31_t) (((q63_t) gcurr * (*pk)) >> 31) + fcurr;
00393     /* g1(n) = f0(n) * K1  +  g0(n-1) */
00394     gnext = (q31_t) (((q63_t) fcurr * (*pk++)) >> 31) + gcurr;
00395     /* save g1(n) in state buffer */
00396     *px++ = fcurr;
00397
00398     /* f1(n) is saved in fcurr1
00399        for next stage processing */
00400     fcurr = fnext;
00401
00402     stageCnt = (numStages - 1u);
00403
00404     /* stage loop */
00405     while(stageCnt > 0u)
00406     {
00407       /* read g2(n) from state buffer */
00408       gcurr = *px;
00409
00410       /* save g1(n) in state buffer */
00411       *px++ = gnext;
00412
00413       /* Sample processing for K2, K3.... */
00414       /* f2(n) = f1(n) +  K2 * g1(n-1) */
00415       fnext = (q31_t) (((q63_t) gcurr * (*pk)) >> 31) + fcurr;
00416       /* g2(n) = f1(n) * K2  +  g1(n-1) */
00417       gnext = (q31_t) (((q63_t) fcurr * (*pk++)) >> 31) + gcurr;
00418
00419       /* f1(n) is saved in fcurr1
00420          for next stage processing */
00421       fcurr = fnext;
00422
00423       stageCnt--;
00424
00425     }
00426
00427     /* y(n) = fN(n) */
00428     *pDst++ = fcurr;
00429
00430     blkCnt--;
00431
00432   }
00433
00434 #endif /*   #ifndef ARM_MATH_CM0 */
00435
00436 }
00437
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CMSIS DSP Software Library: arm_fir_q7.c File Reference

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arm_fir_q7.c File Reference

#include "arm_math.h"

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Functions

void arm_fir_q7 (const arm_fir_instance_q7 *S, q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_q7.c Source File

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arm_fir_q7.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_q7.c
00009 *
00010 * Description:  Q7 FIR filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00064 void arm_fir_q7(
00065   const arm_fir_instance_q7 * S,
00066   q7_t * pSrc,
00067   q7_t * pDst,
00068   uint32_t blockSize)
00069 {
00070
00071 #ifndef ARM_MATH_CM0
00072
00073   /* Run the below code for Cortex-M4 and Cortex-M3 */
00074
00075   q7_t *pState = S->pState;                      /* State pointer */
00076   q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
00077   q7_t *pStateCurnt;                             /* Points to the current sample of the state */
00078   q7_t x0, x1, x2, x3;                           /* Temporary variables to hold state */
00079   q7_t c0;                                       /* Temporary variable to hold coefficient value */
00080   q7_t *px;                                      /* Temporary pointer for state */
00081   q7_t *pb;                                      /* Temporary pointer for coefficient buffer */
00082   q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
00083   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00084   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
00085
00086   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
00087   /* pStateCurnt points to the location where the new input data should be written */
00088   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00089
00090   /* Apply loop unrolling and compute 4 output values simultaneously.
00091    * The variables acc0 ... acc3 hold output values that are being computed:
00092    *
00093    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
00094    *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
00095    *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
00096    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
00097    */
00098   blkCnt = blockSize >> 2;
00099
00100   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00101    ** a second loop below computes the remaining 1 to 3 samples. */
00102   while(blkCnt > 0u)
00103   {
00104     /* Copy four new input samples into the state buffer */
00105     *pStateCurnt++ = *pSrc++;
00106     *pStateCurnt++ = *pSrc++;
00107     *pStateCurnt++ = *pSrc++;
00108     *pStateCurnt++ = *pSrc++;
00109
00110     /* Set all accumulators to zero */
00111     acc0 = 0;
00112     acc1 = 0;
00113     acc2 = 0;
00114     acc3 = 0;
00115
00116     /* Initialize state pointer */
00117     px = pState;
00118
00119     /* Initialize coefficient pointer */
00120     pb = pCoeffs;
00121
00122     /* Read the first three samples from the state buffer:
00123      *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
00124     x0 = *(px++);
00125     x1 = *(px++);
00126     x2 = *(px++);
00127
00128     /* Loop unrolling.  Process 4 taps at a time. */
00129     tapCnt = numTaps >> 2;
00130     i = tapCnt;
00131
00132     while(i > 0u)
00133     {
00134       /* Read the b[numTaps] coefficient */
00135       c0 = *(pb++);
00136
00137       /* Read x[n-numTaps-3] sample */
00138       x3 = *(px++);
00139
00140       /* acc0 +=  b[numTaps] * x[n-numTaps] */
00141       acc0 += ((q15_t) x0 * c0);
00142
00143       /* acc1 +=  b[numTaps] * x[n-numTaps-1] */
00144       acc1 += ((q15_t) x1 * c0);
00145
00146       /* acc2 +=  b[numTaps] * x[n-numTaps-2] */
00147       acc2 += ((q15_t) x2 * c0);
00148
00149       /* acc3 +=  b[numTaps] * x[n-numTaps-3] */
00150       acc3 += ((q15_t) x3 * c0);
00151
00152       /* Read the b[numTaps-1] coefficient */
00153       c0 = *(pb++);
00154
00155       /* Read x[n-numTaps-4] sample */
00156       x0 = *(px++);
00157
00158       /* Perform the multiply-accumulates */
00159       acc0 += ((q15_t) x1 * c0);
00160       acc1 += ((q15_t) x2 * c0);
00161       acc2 += ((q15_t) x3 * c0);
00162       acc3 += ((q15_t) x0 * c0);
00163
00164       /* Read the b[numTaps-2] coefficient */
00165       c0 = *(pb++);
00166
00167       /* Read x[n-numTaps-5] sample */
00168       x1 = *(px++);
00169
00170       /* Perform the multiply-accumulates */
00171       acc0 += ((q15_t) x2 * c0);
00172       acc1 += ((q15_t) x3 * c0);
00173       acc2 += ((q15_t) x0 * c0);
00174       acc3 += ((q15_t) x1 * c0);
00175       /* Read the b[numTaps-3] coefficients */
00176       c0 = *(pb++);
00177
00178       /* Read x[n-numTaps-6] sample */
00179       x2 = *(px++);
00180
00181       /* Perform the multiply-accumulates */
00182       acc0 += ((q15_t) x3 * c0);
00183       acc1 += ((q15_t) x0 * c0);
00184       acc2 += ((q15_t) x1 * c0);
00185       acc3 += ((q15_t) x2 * c0);
00186       i--;
00187     }
00188
00189     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00190
00191     i = numTaps - (tapCnt * 4u);
00192     while(i > 0u)
00193     {
00194       /* Read coefficients */
00195       c0 = *(pb++);
00196
00197       /* Fetch 1 state variable */
00198       x3 = *(px++);
00199
00200       /* Perform the multiply-accumulates */
00201       acc0 += ((q15_t) x0 * c0);
00202       acc1 += ((q15_t) x1 * c0);
00203       acc2 += ((q15_t) x2 * c0);
00204       acc3 += ((q15_t) x3 * c0);
00205
00206       /* Reuse the present sample states for next sample */
00207       x0 = x1;
00208       x1 = x2;
00209       x2 = x3;
00210
00211       /* Decrement the loop counter */
00212       i--;
00213     }
00214
00215     /* Advance the state pointer by 4 to process the next group of 4 samples */
00216     pState = pState + 4;
00217
00218     /* The results in the 4 accumulators are in 2.62 format.  Convert to 1.31
00219      ** Then store the 4 outputs in the destination buffer. */
00220     acc0 = __SSAT((acc0 >> 7u), 8);
00221     *pDst++ = acc0;
00222     acc1 = __SSAT((acc1 >> 7u), 8);
00223     *pDst++ = acc1;
00224     acc2 = __SSAT((acc2 >> 7u), 8);
00225     *pDst++ = acc2;
00226     acc3 = __SSAT((acc3 >> 7u), 8);
00227     *pDst++ = acc3;
00228
00229     /* Decrement the samples loop counter */
00230     blkCnt--;
00231   }
00232
00233
00234   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00235    ** No loop unrolling is used. */
00236   blkCnt = blockSize % 4u;
00237
00238   while(blkCnt > 0u)
00239   {
00240     /* Copy one sample at a time into state buffer */
00241     *pStateCurnt++ = *pSrc++;
00242
00243     /* Set the accumulator to zero */
00244     acc0 = 0;
00245
00246     /* Initialize state pointer */
00247     px = pState;
00248
00249     /* Initialize Coefficient pointer */
00250     pb = (pCoeffs);
00251
00252     i = numTaps;
00253
00254     /* Perform the multiply-accumulates */
00255     do
00256     {
00257       acc0 += (q15_t) * (px++) * (*(pb++));
00258       i--;
00259     } while(i > 0u);
00260
00261     /* The result is in 2.14 format.  Convert to 1.7
00262      ** Then store the output in the destination buffer. */
00263     *pDst++ = __SSAT((acc0 >> 7u), 8);
00264
00265     /* Advance state pointer by 1 for the next sample */
00266     pState = pState + 1;
00267
00268     /* Decrement the samples loop counter */
00269     blkCnt--;
00270   }
00271
00272   /* Processing is complete.
00273    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00274    ** This prepares the state buffer for the next function call. */
00275
00276   /* Points to the start of the state buffer */
00277   pStateCurnt = S->pState;
00278
00279   tapCnt = (numTaps - 1u) >> 2u;
00280
00281   /* copy data */
00282   while(tapCnt > 0u)
00283   {
00284     *pStateCurnt++ = *pState++;
00285     *pStateCurnt++ = *pState++;
00286     *pStateCurnt++ = *pState++;
00287     *pStateCurnt++ = *pState++;
00288
00289     /* Decrement the loop counter */
00290     tapCnt--;
00291   }
00292
00293   /* Calculate remaining number of copies */
00294   tapCnt = (numTaps - 1u) % 0x4u;
00295
00296   /* Copy the remaining q31_t data */
00297   while(tapCnt > 0u)
00298   {
00299     *pStateCurnt++ = *pState++;
00300
00301     /* Decrement the loop counter */
00302     tapCnt--;
00303   }
00304
00305 #else
00306
00307 /* Run the below code for Cortex-M0 */
00308
00309   uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
00310   uint32_t i, blkCnt;                            /* Loop counters */
00311   q7_t *pState = S->pState;                      /* State pointer */
00312   q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
00313   q7_t *px, *pb;                                 /* Temporary pointers to state and coeff */
00314   q31_t acc = 0;                                 /* Accumlator */
00315   q7_t *pStateCurnt;                             /* Points to the current sample of the state */
00316
00317
00318   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
00319   /* pStateCurnt points to the location where the new input data should be written */
00320   pStateCurnt = S->pState + (numTaps - 1u);
00321
00322   /* Initialize blkCnt with blockSize */
00323   blkCnt = blockSize;
00324
00325   /* Perform filtering upto BlockSize - BlockSize%4  */
00326   while(blkCnt > 0u)
00327   {
00328     /* Copy one sample at a time into state buffer */
00329     *pStateCurnt++ = *pSrc++;
00330
00331     /* Set accumulator to zero */
00332     acc = 0;
00333
00334     /* Initialize state pointer of type q7 */
00335     px = pState;
00336
00337     /* Initialize coeff pointer of type q7 */
00338     pb = pCoeffs;
00339
00340
00341     i = numTaps;
00342
00343     while(i > 0u)
00344     {
00345       /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
00346       acc += (q15_t) * px++ * *pb++;
00347       i--;
00348     }
00349
00350     /* Store the 1.7 format filter output in destination buffer */
00351     *pDst++ = (q7_t) __SSAT((acc >> 7), 8);
00352
00353     /* Advance the state pointer by 1 to process the next sample */
00354     pState = pState + 1;
00355
00356     /* Decrement the loop counter */
00357     blkCnt--;
00358   }
00359
00360   /* Processing is complete.
00361    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00362    ** This prepares the state buffer for the next function call. */
00363
00364
00365   /* Points to the start of the state buffer */
00366   pStateCurnt = S->pState;
00367
00368
00369   /* Copy numTaps number of values */
00370   i = (numTaps - 1u);
00371
00372   /* Copy q7_t data */
00373   while(i > 0u)
00374   {
00375     *pStateCurnt++ = *pState++;
00376     i--;
00377   }
00378
00379 #endif /*   #ifndef ARM_MATH_CM0 */
00380
00381 }
00382
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CMSIS DSP Software Library: arm_fir_q15.c File Reference

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arm_fir_q15.c File Reference

#include "arm_math.h"

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void arm_fir_q15 (const arm_fir_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_q15.c Source File

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arm_fir_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_q15.c
00009 *
00010 * Description:  Q15 FIR filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00068 void arm_fir_q15(
00069   const arm_fir_instance_q15 * S,
00070   q15_t * pSrc,
00071   q15_t * pDst,
00072   uint32_t blockSize)
00073 {
00074   q15_t *pState = S->pState;                     /* State pointer */
00075   q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00076   q15_t *pStateCurnt;                            /* Points to the current sample of the state */
00077
00078
00079 #ifndef ARM_MATH_CM0
00080
00081   /* Run the below code for Cortex-M4 and Cortex-M3 */
00082
00083   q15_t *px1;                                    /* Temporary q15 pointer for state buffer */
00084   q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
00085   q31_t *px2;                                    /* Temporary q31 pointer for SIMD state buffer accesses */
00086   q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold SIMD state and coefficient values */
00087   q63_t acc0, acc1, acc2, acc3;                  /* Accumulators */
00088   uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
00089   uint32_t tapCnt, blkCnt;                       /* Loop counters */
00090
00091   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
00092   /* pStateCurnt points to the location where the new input data should be written */
00093   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00094
00095   /* Apply loop unrolling and compute 4 output values simultaneously.
00096    * The variables acc0 ... acc3 hold output values that are being computed:
00097    *
00098    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
00099    *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
00100    *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
00101    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
00102    */
00103   blkCnt = blockSize >> 2;
00104
00105   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00106    ** a second loop below computes the remaining 1 to 3 samples. */
00107   while(blkCnt > 0u)
00108   {
00109     /* Copy four new input samples into the state buffer.
00110      ** Use 32-bit SIMD to move the 16-bit data.  Only requires two copies. */
00111     *__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++;
00112     *__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++;
00113
00114     /* Set all accumulators to zero */
00115     acc0 = 0;
00116     acc1 = 0;
00117     acc2 = 0;
00118     acc3 = 0;
00119
00120     /* Initialize state pointer of type q15 */
00121     px1 = pState;
00122
00123     /* Initialize coeff pointer of type q31 */
00124     pb = (q31_t *) (pCoeffs);
00125
00126     /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
00127     x0 = *(q31_t *) (px1++);
00128
00129     /* Read the third and forth samples from the state buffer: x[n-N-1], x[n-N-2] */
00130     x1 = *(q31_t *) (px1++);
00131
00132     /* Loop over the number of taps.  Unroll by a factor of 4.
00133      ** Repeat until we've computed numTaps-4 coefficients. */
00134     tapCnt = numTaps >> 2;
00135     do
00136     {
00137       /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
00138       c0 = *(pb++);
00139
00140       /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
00141       acc0 = __SMLALD(x0, c0, acc0);
00142
00143       /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
00144       acc1 = __SMLALD(x1, c0, acc1);
00145
00146       /* Read state x[n-N-2], x[n-N-3] */
00147       x2 = *(q31_t *) (px1++);
00148
00149       /* Read state x[n-N-3], x[n-N-4] */
00150       x3 = *(q31_t *) (px1++);
00151
00152       /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
00153       acc2 = __SMLALD(x2, c0, acc2);
00154
00155       /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
00156       acc3 = __SMLALD(x3, c0, acc3);
00157
00158       /* Read coefficients b[N-2], b[N-3] */
00159       c0 = *(pb++);
00160
00161       /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
00162       acc0 = __SMLALD(x2, c0, acc0);
00163
00164       /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
00165       acc1 = __SMLALD(x3, c0, acc1);
00166
00167       /* Read state x[n-N-4], x[n-N-5] */
00168       x0 = *(q31_t *) (px1++);
00169
00170       /* Read state x[n-N-5], x[n-N-6] */
00171       x1 = *(q31_t *) (px1++);
00172
00173       /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
00174       acc2 = __SMLALD(x0, c0, acc2);
00175
00176       /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
00177       acc3 = __SMLALD(x1, c0, acc3);
00178       tapCnt--;
00179
00180     }
00181     while(tapCnt > 0u);
00182
00183     /* If the filter length is not a multiple of 4, compute the remaining filter taps.
00184      ** This is always be 2 taps since the filter length is even. */
00185     if((numTaps & 0x3u) != 0u)
00186     {
00187       /* Read 2 coefficients */
00188       c0 = *(pb++);
00189       /* Fetch 4 state variables */
00190       x2 = *(q31_t *) (px1++);
00191       x3 = *(q31_t *) (px1++);
00192
00193       /* Perform the multiply-accumulates */
00194       acc0 = __SMLALD(x0, c0, acc0);
00195       acc1 = __SMLALD(x1, c0, acc1);
00196       acc2 = __SMLALD(x2, c0, acc2);
00197       acc3 = __SMLALD(x3, c0, acc3);
00198     }
00199
00200     /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.15 with saturation.
00201      ** Then store the 4 outputs in the destination buffer. */
00202
00203 #ifndef ARM_MATH_BIG_ENDIAN
00204
00205     *__SIMD32(pDst)++ =
00206       __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
00207     *__SIMD32(pDst)++ =
00208       __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
00209
00210 #else
00211
00212     *__SIMD32(pDst)++ =
00213       __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
00214     *__SIMD32(pDst)++ =
00215       __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
00216
00217 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
00218
00219     /* Advance the state pointer by 4 to process the next group of 4 samples */
00220     pState = pState + 4;
00221
00222     /* Decrement the loop counter */
00223     blkCnt--;
00224   }
00225
00226   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00227    ** No loop unrolling is used. */
00228   blkCnt = blockSize % 0x4u;
00229   while(blkCnt > 0u)
00230   {
00231     /* Copy two samples into state buffer */
00232     *pStateCurnt++ = *pSrc++;
00233
00234     /* Set the accumulator to zero */
00235     acc0 = 0;
00236
00237     /* Use SIMD to hold states and coefficients */
00238     px2 = (q31_t *) pState;
00239     pb = (q31_t *) (pCoeffs);
00240     tapCnt = numTaps >> 1;
00241
00242     do
00243     {
00244       acc0 = __SMLALD(*px2++, *(pb++), acc0);
00245       tapCnt--;
00246     }
00247     while(tapCnt > 0u);
00248
00249     /* The result is in 2.30 format.  Convert to 1.15 with saturation.
00250      ** Then store the output in the destination buffer. */
00251     *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
00252
00253     /* Advance state pointer by 1 for the next sample */
00254     pState = pState + 1;
00255
00256     /* Decrement the loop counter */
00257     blkCnt--;
00258   }
00259
00260   /* Processing is complete.
00261    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00262    ** This prepares the state buffer for the next function call. */
00263
00264   /* Points to the start of the state buffer */
00265   pStateCurnt = S->pState;
00266
00267   /* Calculation of count for copying integer writes */
00268   tapCnt = (numTaps - 1u) >> 2;
00269
00270   while(tapCnt > 0u)
00271   {
00272     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00273     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00274
00275     tapCnt--;
00276
00277   }
00278
00279   /* Calculation of count for remaining q15_t data */
00280   tapCnt = (numTaps - 1u) % 0x4u;
00281
00282   /* copy remaining data */
00283   while(tapCnt > 0u)
00284   {
00285     *pStateCurnt++ = *pState++;
00286
00287     /* Decrement the loop counter */
00288     tapCnt--;
00289   }
00290
00291 #else
00292
00293   /* Run the below code for Cortex-M0 */
00294
00295   q15_t *px;                                     /* Temporary pointer for state buffer */
00296   q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
00297   q63_t acc;                                     /* Accumulator */
00298   uint32_t numTaps = S->numTaps;                 /* Number of nTaps in the filter */
00299   uint32_t tapCnt, blkCnt;                       /* Loop counters */
00300
00301   /* S->pState buffer contains previous frame (numTaps - 1) samples */
00302   /* pStateCurnt points to the location where the new input data should be written */
00303   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00304
00305   /* Initialize blkCnt with blockSize */
00306   blkCnt = blockSize;
00307
00308   while(blkCnt > 0u)
00309   {
00310     /* Copy one sample at a time into state buffer */
00311     *pStateCurnt++ = *pSrc++;
00312
00313     /* Set the accumulator to zero */
00314     acc = 0;
00315
00316     /* Initialize state pointer */
00317     px = pState;
00318
00319     /* Initialize Coefficient pointer */
00320     pb = pCoeffs;
00321
00322     tapCnt = numTaps;
00323
00324     /* Perform the multiply-accumulates */
00325     do
00326     {
00327       /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
00328       acc += (q31_t) * px++ * *pb++;
00329       tapCnt--;
00330     } while(tapCnt > 0u);
00331
00332     /* The result is in 2.30 format.  Convert to 1.15
00333      ** Then store the output in the destination buffer. */
00334     *pDst++ = (q15_t) __SSAT((acc >> 15u), 16);
00335
00336     /* Advance state pointer by 1 for the next sample */
00337     pState = pState + 1;
00338
00339     /* Decrement the samples loop counter */
00340     blkCnt--;
00341   }
00342
00343   /* Processing is complete.
00344    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00345    ** This prepares the state buffer for the next function call. */
00346
00347   /* Points to the start of the state buffer */
00348   pStateCurnt = S->pState;
00349
00350   /* Copy numTaps number of values */
00351   tapCnt = (numTaps - 1u);
00352
00353   /* copy data */
00354   while(tapCnt > 0u)
00355   {
00356     *pStateCurnt++ = *pState++;
00357
00358     /* Decrement the loop counter */
00359     tapCnt--;
00360   }
00361
00362 #endif /* #ifndef ARM_MATH_CM0 */
00363
00364 }
00365
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CMSIS DSP Software Library: arm_fir_q31.c File Reference

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arm_fir_q31.c File Reference

#include "arm_math.h"

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void arm_fir_q31 (const arm_fir_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_q31.c Source File

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arm_fir_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_q31.c
00009 *
00010 * Description:  Q31 FIR filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00067 void arm_fir_q31(
00068   const arm_fir_instance_q31 * S,
00069   q31_t * pSrc,
00070   q31_t * pDst,
00071   uint32_t blockSize)
00072 {
00073   q31_t *pState = S->pState;                     /* State pointer */
00074   q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00075   q31_t *pStateCurnt;                            /* Points to the current sample of the state */
00076
00077
00078 #ifndef ARM_MATH_CM0
00079
00080   /* Run the below code for Cortex-M4 and Cortex-M3 */
00081
00082   q31_t x0, x1, x2, x3;                          /* Temporary variables to hold state */
00083   q31_t c0;                                      /* Temporary variable to hold coefficient value */
00084   q31_t *px;                                     /* Temporary pointer for state */
00085   q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
00086   q63_t acc0, acc1, acc2, acc3;                  /* Accumulators */
00087   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00088   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
00089
00090   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
00091   /* pStateCurnt points to the location where the new input data should be written */
00092   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00093
00094   /* Apply loop unrolling and compute 4 output values simultaneously.
00095    * The variables acc0 ... acc3 hold output values that are being computed:
00096    *
00097    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
00098    *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
00099    *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
00100    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
00101    */
00102   blkCnt = blockSize >> 2;
00103
00104   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00105    ** a second loop below computes the remaining 1 to 3 samples. */
00106   while(blkCnt > 0u)
00107   {
00108     /* Copy four new input samples into the state buffer */
00109     *pStateCurnt++ = *pSrc++;
00110     *pStateCurnt++ = *pSrc++;
00111     *pStateCurnt++ = *pSrc++;
00112     *pStateCurnt++ = *pSrc++;
00113
00114     /* Set all accumulators to zero */
00115     acc0 = 0;
00116     acc1 = 0;
00117     acc2 = 0;
00118     acc3 = 0;
00119
00120     /* Initialize state pointer */
00121     px = pState;
00122
00123     /* Initialize coefficient pointer */
00124     pb = pCoeffs;
00125
00126     /* Read the first three samples from the state buffer:
00127      *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
00128     x0 = *(px++);
00129     x1 = *(px++);
00130     x2 = *(px++);
00131
00132     /* Loop unrolling.  Process 4 taps at a time. */
00133     tapCnt = numTaps >> 2;
00134     i = tapCnt;
00135
00136     while(i > 0u)
00137     {
00138       /* Read the b[numTaps] coefficient */
00139       c0 = *(pb++);
00140
00141       /* Read x[n-numTaps-3] sample */
00142       x3 = *(px++);
00143
00144       /* acc0 +=  b[numTaps] * x[n-numTaps] */
00145       acc0 += ((q63_t) x0 * c0);
00146
00147       /* acc1 +=  b[numTaps] * x[n-numTaps-1] */
00148       acc1 += ((q63_t) x1 * c0);
00149
00150       /* acc2 +=  b[numTaps] * x[n-numTaps-2] */
00151       acc2 += ((q63_t) x2 * c0);
00152
00153       /* acc3 +=  b[numTaps] * x[n-numTaps-3] */
00154       acc3 += ((q63_t) x3 * c0);
00155
00156       /* Read the b[numTaps-1] coefficient */
00157       c0 = *(pb++);
00158
00159       /* Read x[n-numTaps-4] sample */
00160       x0 = *(px++);
00161
00162       /* Perform the multiply-accumulates */
00163       acc0 += ((q63_t) x1 * c0);
00164       acc1 += ((q63_t) x2 * c0);
00165       acc2 += ((q63_t) x3 * c0);
00166       acc3 += ((q63_t) x0 * c0);
00167
00168       /* Read the b[numTaps-2] coefficient */
00169       c0 = *(pb++);
00170
00171       /* Read x[n-numTaps-5] sample */
00172       x1 = *(px++);
00173
00174       /* Perform the multiply-accumulates */
00175       acc0 += ((q63_t) x2 * c0);
00176       acc1 += ((q63_t) x3 * c0);
00177       acc2 += ((q63_t) x0 * c0);
00178       acc3 += ((q63_t) x1 * c0);
00179       /* Read the b[numTaps-3] coefficients */
00180       c0 = *(pb++);
00181
00182       /* Read x[n-numTaps-6] sample */
00183       x2 = *(px++);
00184
00185       /* Perform the multiply-accumulates */
00186       acc0 += ((q63_t) x3 * c0);
00187       acc1 += ((q63_t) x0 * c0);
00188       acc2 += ((q63_t) x1 * c0);
00189       acc3 += ((q63_t) x2 * c0);
00190       i--;
00191     }
00192
00193     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00194
00195     i = numTaps - (tapCnt * 4u);
00196     while(i > 0u)
00197     {
00198       /* Read coefficients */
00199       c0 = *(pb++);
00200
00201       /* Fetch 1 state variable */
00202       x3 = *(px++);
00203
00204       /* Perform the multiply-accumulates */
00205       acc0 += ((q63_t) x0 * c0);
00206       acc1 += ((q63_t) x1 * c0);
00207       acc2 += ((q63_t) x2 * c0);
00208       acc3 += ((q63_t) x3 * c0);
00209
00210       /* Reuse the present sample states for next sample */
00211       x0 = x1;
00212       x1 = x2;
00213       x2 = x3;
00214
00215       /* Decrement the loop counter */
00216       i--;
00217     }
00218
00219     /* Advance the state pointer by 4 to process the next group of 4 samples */
00220     pState = pState + 4;
00221
00222     /* The results in the 4 accumulators are in 2.62 format.  Convert to 1.31
00223      ** Then store the 4 outputs in the destination buffer. */
00224     *pDst++ = (q31_t) (acc0 >> 31u);
00225     *pDst++ = (q31_t) (acc1 >> 31u);
00226     *pDst++ = (q31_t) (acc2 >> 31u);
00227     *pDst++ = (q31_t) (acc3 >> 31u);
00228
00229     /* Decrement the samples loop counter */
00230     blkCnt--;
00231   }
00232
00233
00234   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00235    ** No loop unrolling is used. */
00236   blkCnt = blockSize % 4u;
00237
00238   while(blkCnt > 0u)
00239   {
00240     /* Copy one sample at a time into state buffer */
00241     *pStateCurnt++ = *pSrc++;
00242
00243     /* Set the accumulator to zero */
00244     acc0 = 0;
00245
00246     /* Initialize state pointer */
00247     px = pState;
00248
00249     /* Initialize Coefficient pointer */
00250     pb = (pCoeffs);
00251
00252     i = numTaps;
00253
00254     /* Perform the multiply-accumulates */
00255     do
00256     {
00257       acc0 += (q63_t) * (px++) * (*(pb++));
00258       i--;
00259     } while(i > 0u);
00260
00261     /* The result is in 2.62 format.  Convert to 1.31
00262      ** Then store the output in the destination buffer. */
00263     *pDst++ = (q31_t) (acc0 >> 31u);
00264
00265     /* Advance state pointer by 1 for the next sample */
00266     pState = pState + 1;
00267
00268     /* Decrement the samples loop counter */
00269     blkCnt--;
00270   }
00271
00272   /* Processing is complete.
00273    ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
00274    ** This prepares the state buffer for the next function call. */
00275
00276   /* Points to the start of the state buffer */
00277   pStateCurnt = S->pState;
00278
00279   tapCnt = (numTaps - 1u) >> 2u;
00280
00281   /* copy data */
00282   while(tapCnt > 0u)
00283   {
00284     *pStateCurnt++ = *pState++;
00285     *pStateCurnt++ = *pState++;
00286     *pStateCurnt++ = *pState++;
00287     *pStateCurnt++ = *pState++;
00288
00289     /* Decrement the loop counter */
00290     tapCnt--;
00291   }
00292
00293   /* Calculate remaining number of copies */
00294   tapCnt = (numTaps - 1u) % 0x4u;
00295
00296   /* Copy the remaining q31_t data */
00297   while(tapCnt > 0u)
00298   {
00299     *pStateCurnt++ = *pState++;
00300
00301     /* Decrement the loop counter */
00302     tapCnt--;
00303   }
00304
00305 #else
00306
00307 /* Run the below code for Cortex-M0 */
00308
00309   q31_t *px;                                     /* Temporary pointer for state */
00310   q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
00311   q63_t acc;                                     /* Accumulator */
00312   uint32_t numTaps = S->numTaps;                 /* Length of the filter */
00313   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
00314
00315   /* S->pState buffer contains previous frame (numTaps - 1) samples */
00316   /* pStateCurnt points to the location where the new input data should be written */
00317   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00318
00319   /* Initialize blkCnt with blockSize */
00320   blkCnt = blockSize;
00321
00322   while(blkCnt > 0u)
00323   {
00324     /* Copy one sample at a time into state buffer */
00325     *pStateCurnt++ = *pSrc++;
00326
00327     /* Set the accumulator to zero */
00328     acc = 0;
00329
00330     /* Initialize state pointer */
00331     px = pState;
00332
00333     /* Initialize Coefficient pointer */
00334     pb = pCoeffs;
00335
00336     i = numTaps;
00337
00338     /* Perform the multiply-accumulates */
00339     do
00340     {
00341       /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
00342       acc += (q63_t) * px++ * *pb++;
00343       i--;
00344     } while(i > 0u);
00345
00346     /* The result is in 2.62 format.  Convert to 1.31
00347      ** Then store the output in the destination buffer. */
00348     *pDst++ = (q31_t) (acc >> 31u);
00349
00350     /* Advance state pointer by 1 for the next sample */
00351     pState = pState + 1;
00352
00353     /* Decrement the samples loop counter */
00354     blkCnt--;
00355   }
00356
00357   /* Processing is complete.
00358    ** Now copy the last numTaps - 1 samples to the starting of the state buffer.
00359    ** This prepares the state buffer for the next function call. */
00360
00361   /* Points to the start of the state buffer */
00362   pStateCurnt = S->pState;
00363
00364   /* Copy numTaps number of values */
00365   tapCnt = numTaps - 1u;
00366
00367   /* Copy the data */
00368   while(tapCnt > 0u)
00369   {
00370     *pStateCurnt++ = *pState++;
00371
00372     /* Decrement the loop counter */
00373     tapCnt--;
00374   }
00375
00376
00377 #endif /*  #ifndef ARM_MATH_CM0 */
00378
00379 }
00380
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CMSIS DSP Software Library: arm_fir_sparse_f32.c File Reference

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arm_fir_sparse_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_sparse_f32 (arm_fir_sparse_instance_f32 *S, float32_t *pSrc, float32_t *pDst, float32_t *pScratchIn, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_sparse_f32.c Source File

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arm_fir_sparse_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_sparse_f32.c
00009 *
00010 * Description:  Floating-point sparse FIR filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ------------------------------------------------------------------- */
00032 #include "arm_math.h"
00033
00113 void arm_fir_sparse_f32(
00114   arm_fir_sparse_instance_f32 * S,
00115   float32_t * pSrc,
00116   float32_t * pDst,
00117   float32_t * pScratchIn,
00118   uint32_t blockSize)
00119 {
00120
00121   float32_t *pState = S->pState;                 /* State pointer */
00122   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
00123   float32_t *px;                                 /* Scratch buffer pointer */
00124   float32_t *py = pState;                        /* Temporary pointers for state buffer */
00125   float32_t *pb = pScratchIn;                    /* Temporary pointers for scratch buffer */
00126   float32_t *pOut;                               /* Destination pointer */
00127   int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
00128   uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
00129   uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
00130   int32_t readIndex;                             /* Read index of the state buffer */
00131   uint32_t tapCnt, blkCnt;                       /* loop counters */
00132   float32_t coeff = *pCoeffs++;                  /* Read the first coefficient value */
00133
00134
00135
00136   /* BlockSize of Input samples are copied into the state buffer */
00137   /* StateIndex points to the starting position to write in the state buffer */
00138   arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1,
00139                         (int32_t *) pSrc, 1, blockSize);
00140
00141
00142   /* Read Index, from where the state buffer should be read, is calculated. */
00143   readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
00144
00145   /* Wraparound of readIndex */
00146   if(readIndex < 0)
00147   {
00148     readIndex += (int32_t) delaySize;
00149   }
00150
00151   /* Working pointer for state buffer is updated */
00152   py = pState;
00153
00154   /* blockSize samples are read from the state buffer */
00155   arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
00156                        (int32_t *) pb, (int32_t *) pb, blockSize, 1,
00157                        blockSize);
00158
00159   /* Working pointer for the scratch buffer */
00160   px = pb;
00161
00162   /* Working pointer for destination buffer */
00163   pOut = pDst;
00164
00165
00166 #ifndef ARM_MATH_CM0
00167
00168   /* Run the below code for Cortex-M4 and Cortex-M3 */
00169
00170   /* Loop over the blockSize. Unroll by a factor of 4.
00171    * Compute 4 Multiplications at a time. */
00172   blkCnt = blockSize >> 2u;
00173
00174   while(blkCnt > 0u)
00175   {
00176     /* Perform Multiplications and store in destination buffer */
00177     *pOut++ = *px++ * coeff;
00178     *pOut++ = *px++ * coeff;
00179     *pOut++ = *px++ * coeff;
00180     *pOut++ = *px++ * coeff;
00181
00182     /* Decrement the loop counter */
00183     blkCnt--;
00184   }
00185
00186   /* If the blockSize is not a multiple of 4,
00187    * compute the remaining samples */
00188   blkCnt = blockSize % 0x4u;
00189
00190   while(blkCnt > 0u)
00191   {
00192     /* Perform Multiplications and store in destination buffer */
00193     *pOut++ = *px++ * coeff;
00194
00195     /* Decrement the loop counter */
00196     blkCnt--;
00197   }
00198
00199   /* Load the coefficient value and
00200    * increment the coefficient buffer for the next set of state values */
00201   coeff = *pCoeffs++;
00202
00203   /* Read Index, from where the state buffer should be read, is calculated. */
00204   readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
00205
00206   /* Wraparound of readIndex */
00207   if(readIndex < 0)
00208   {
00209     readIndex += (int32_t) delaySize;
00210   }
00211
00212   /* Loop over the number of taps. */
00213   tapCnt = (uint32_t) numTaps - 1u;
00214
00215   while(tapCnt > 0u)
00216   {
00217
00218     /* Working pointer for state buffer is updated */
00219     py = pState;
00220
00221     /* blockSize samples are read from the state buffer */
00222     arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
00223                          (int32_t *) pb, (int32_t *) pb, blockSize, 1,
00224                          blockSize);
00225
00226     /* Working pointer for the scratch buffer */
00227     px = pb;
00228
00229     /* Working pointer for destination buffer */
00230     pOut = pDst;
00231
00232     /* Loop over the blockSize. Unroll by a factor of 4.
00233      * Compute 4 MACS at a time. */
00234     blkCnt = blockSize >> 2u;
00235
00236     while(blkCnt > 0u)
00237     {
00238       /* Perform Multiply-Accumulate */
00239       *pOut++ += *px++ * coeff;
00240       *pOut++ += *px++ * coeff;
00241       *pOut++ += *px++ * coeff;
00242       *pOut++ += *px++ * coeff;
00243
00244       /* Decrement the loop counter */
00245       blkCnt--;
00246     }
00247
00248     /* If the blockSize is not a multiple of 4,
00249      * compute the remaining samples */
00250     blkCnt = blockSize % 0x4u;
00251
00252     while(blkCnt > 0u)
00253     {
00254       /* Perform Multiply-Accumulate */
00255       *pOut++ += *px++ * coeff;
00256
00257       /* Decrement the loop counter */
00258       blkCnt--;
00259     }
00260
00261     /* Load the coefficient value and
00262      * increment the coefficient buffer for the next set of state values */
00263     coeff = *pCoeffs++;
00264
00265     /* Read Index, from where the state buffer should be read, is calculated. */
00266     readIndex = ((int32_t) S->stateIndex -
00267                  (int32_t) blockSize) - *pTapDelay++;
00268
00269     /* Wraparound of readIndex */
00270     if(readIndex < 0)
00271     {
00272       readIndex += (int32_t) delaySize;
00273     }
00274
00275     /* Decrement the tap loop counter */
00276     tapCnt--;
00277   }
00278
00279 #else
00280
00281 /* Run the below code for Cortex-M0 */
00282
00283   blkCnt = blockSize;
00284
00285   while(blkCnt > 0u)
00286   {
00287     /* Perform Multiplications and store in destination buffer */
00288     *pOut++ = *px++ * coeff;
00289
00290     /* Decrement the loop counter */
00291     blkCnt--;
00292   }
00293
00294   /* Load the coefficient value and
00295    * increment the coefficient buffer for the next set of state values */
00296   coeff = *pCoeffs++;
00297
00298   /* Read Index, from where the state buffer should be read, is calculated. */
00299   readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
00300
00301   /* Wraparound of readIndex */
00302   if(readIndex < 0)
00303   {
00304     readIndex += (int32_t) delaySize;
00305   }
00306
00307   /* Loop over the number of taps. */
00308   tapCnt = (uint32_t) numTaps - 1u;
00309
00310   while(tapCnt > 0u)
00311   {
00312
00313     /* Working pointer for state buffer is updated */
00314     py = pState;
00315
00316     /* blockSize samples are read from the state buffer */
00317     arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
00318                          (int32_t *) pb, (int32_t *) pb, blockSize, 1,
00319                          blockSize);
00320
00321     /* Working pointer for the scratch buffer */
00322     px = pb;
00323
00324     /* Working pointer for destination buffer */
00325     pOut = pDst;
00326
00327     blkCnt = blockSize;
00328
00329     while(blkCnt > 0u)
00330     {
00331       /* Perform Multiply-Accumulate */
00332       *pOut++ += *px++ * coeff;
00333
00334       /* Decrement the loop counter */
00335       blkCnt--;
00336     }
00337
00338     /* Load the coefficient value and
00339      * increment the coefficient buffer for the next set of state values */
00340     coeff = *pCoeffs++;
00341
00342     /* Read Index, from where the state buffer should be read, is calculated. */
00343     readIndex =
00344       ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
00345
00346     /* Wraparound of readIndex */
00347     if(readIndex < 0)
00348     {
00349       readIndex += (int32_t) delaySize;
00350     }
00351
00352     /* Decrement the tap loop counter */
00353     tapCnt--;
00354   }
00355
00356 #endif /*   #ifndef ARM_MATH_CM0        */
00357
00358 }
00359
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CMSIS DSP Software Library: arm_fir_sparse_init_f32.c File Reference

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arm_fir_sparse_init_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_sparse_init_f32 (arm_fir_sparse_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_sparse_init_f32.c Source File

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arm_fir_sparse_init_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_sparse_init_f32.c
00009 *
00010 * Description:  Floating-point sparse FIR filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00065 void arm_fir_sparse_init_f32(
00066   arm_fir_sparse_instance_f32 * S,
00067   uint16_t numTaps,
00068   float32_t * pCoeffs,
00069   float32_t * pState,
00070   int32_t * pTapDelay,
00071   uint16_t maxDelay,
00072   uint32_t blockSize)
00073 {
00074   /* Assign filter taps */
00075   S->numTaps = numTaps;
00076
00077   /* Assign coefficient pointer */
00078   S->pCoeffs = pCoeffs;
00079
00080   /* Assign TapDelay pointer */
00081   S->pTapDelay = pTapDelay;
00082
00083   /* Assign MaxDelay */
00084   S->maxDelay = maxDelay;
00085
00086   /* reset the stateIndex to 0 */
00087   S->stateIndex = 0u;
00088
00089   /* Clear state buffer and size is always maxDelay + blockSize */
00090   memset(pState, 0, (maxDelay + blockSize) * sizeof(float32_t));
00091
00092   /* Assign state pointer */
00093   S->pState = pState;
00094
00095 }
00096
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CMSIS DSP Software Library: arm_fir_sparse_init_q7.c File Reference

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arm_fir_sparse_init_q7.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_sparse_init_q7 (arm_fir_sparse_instance_q7 *S, uint16_t numTaps, q7_t *pCoeffs, q7_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_sparse_init_q7.c Source File

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arm_fir_sparse_init_q7.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_sparse_init_q7.c
00009 *
00010 * Description:  Q7 sparse FIR filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00065 void arm_fir_sparse_init_q7(
00066   arm_fir_sparse_instance_q7 * S,
00067   uint16_t numTaps,
00068   q7_t * pCoeffs,
00069   q7_t * pState,
00070   int32_t * pTapDelay,
00071   uint16_t maxDelay,
00072   uint32_t blockSize)
00073 {
00074   /* Assign filter taps */
00075   S->numTaps = numTaps;
00076
00077   /* Assign coefficient pointer */
00078   S->pCoeffs = pCoeffs;
00079
00080   /* Assign TapDelay pointer */
00081   S->pTapDelay = pTapDelay;
00082
00083   /* Assign MaxDelay */
00084   S->maxDelay = maxDelay;
00085
00086   /* reset the stateIndex to 0 */
00087   S->stateIndex = 0u;
00088
00089   /* Clear state buffer and size is always maxDelay + blockSize */
00090   memset(pState, 0, (maxDelay + blockSize) * sizeof(q7_t));
00091
00092   /* Assign state pointer */
00093   S->pState = pState;
00094
00095 }
00096
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CMSIS DSP Software Library: arm_fir_sparse_init_q15.c File Reference

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arm_fir_sparse_init_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_sparse_init_q15 (arm_fir_sparse_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_sparse_init_q15.c Source File

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arm_fir_sparse_init_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_sparse_init_q15.c
00009 *
00010 * Description:  Q15 sparse FIR filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00065 void arm_fir_sparse_init_q15(
00066   arm_fir_sparse_instance_q15 * S,
00067   uint16_t numTaps,
00068   q15_t * pCoeffs,
00069   q15_t * pState,
00070   int32_t * pTapDelay,
00071   uint16_t maxDelay,
00072   uint32_t blockSize)
00073 {
00074   /* Assign filter taps */
00075   S->numTaps = numTaps;
00076
00077   /* Assign coefficient pointer */
00078   S->pCoeffs = pCoeffs;
00079
00080   /* Assign TapDelay pointer */
00081   S->pTapDelay = pTapDelay;
00082
00083   /* Assign MaxDelay */
00084   S->maxDelay = maxDelay;
00085
00086   /* reset the stateIndex to 0 */
00087   S->stateIndex = 0u;
00088
00089   /* Clear state buffer and size is always maxDelay + blockSize */
00090   memset(pState, 0, (maxDelay + blockSize) * sizeof(q15_t));
00091
00092   /* Assign state pointer */
00093   S->pState = pState;
00094
00095 }
00096
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CMSIS DSP Software Library: arm_fir_sparse_init_q31.c File Reference

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arm_fir_sparse_init_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_sparse_init_q31 (arm_fir_sparse_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_sparse_init_q31.c Source File

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arm_fir_sparse_init_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_sparse_init_q31.c
00009 *
00010 * Description:  Q31 sparse FIR filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00064 void arm_fir_sparse_init_q31(
00065   arm_fir_sparse_instance_q31 * S,
00066   uint16_t numTaps,
00067   q31_t * pCoeffs,
00068   q31_t * pState,
00069   int32_t * pTapDelay,
00070   uint16_t maxDelay,
00071   uint32_t blockSize)
00072 {
00073   /* Assign filter taps */
00074   S->numTaps = numTaps;
00075
00076   /* Assign coefficient pointer */
00077   S->pCoeffs = pCoeffs;
00078
00079   /* Assign TapDelay pointer */
00080   S->pTapDelay = pTapDelay;
00081
00082   /* Assign MaxDelay */
00083   S->maxDelay = maxDelay;
00084
00085   /* reset the stateIndex to 0 */
00086   S->stateIndex = 0u;
00087
00088   /* Clear state buffer and size is always maxDelay + blockSize */
00089   memset(pState, 0, (maxDelay + blockSize) * sizeof(q31_t));
00090
00091   /* Assign state pointer */
00092   S->pState = pState;
00093
00094 }
00095
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CMSIS DSP Software Library: arm_fir_sparse_q7.c File Reference

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arm_fir_sparse_q7.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_sparse_q7 (arm_fir_sparse_instance_q7 *S, q7_t *pSrc, q7_t *pDst, q7_t *pScratchIn, q31_t *pScratchOut, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_sparse_q7.c Source File

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arm_fir_sparse_q7.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_sparse_q7.c
00009 *
00010 * Description:  Q7 sparse FIR filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ------------------------------------------------------------------- */
00032 #include "arm_math.h"
00033
00034
00065 void arm_fir_sparse_q7(
00066   arm_fir_sparse_instance_q7 * S,
00067   q7_t * pSrc,
00068   q7_t * pDst,
00069   q7_t * pScratchIn,
00070   q31_t * pScratchOut,
00071   uint32_t blockSize)
00072 {
00073
00074   q7_t *pState = S->pState;                      /* State pointer */
00075   q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
00076   q7_t *px;                                      /* Scratch buffer pointer */
00077   q7_t *py = pState;                             /* Temporary pointers for state buffer */
00078   q7_t *pb = pScratchIn;                         /* Temporary pointers for scratch buffer */
00079   q7_t *pOut = pDst;                             /* Destination pointer */
00080   int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
00081   uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
00082   uint16_t numTaps = S->numTaps;                 /* Filter order */
00083   int32_t readIndex;                             /* Read index of the state buffer */
00084   uint32_t tapCnt, blkCnt;                       /* loop counters */
00085   q7_t coeff = *pCoeffs++;                       /* Read the coefficient value */
00086   q31_t *pScr2 = pScratchOut;                    /* Working pointer for scratch buffer of output values */
00087   q31_t in;
00088
00089
00090 #ifndef ARM_MATH_CM0
00091
00092   /* Run the below code for Cortex-M4 and Cortex-M3 */
00093
00094   q7_t in1, in2, in3, in4;
00095
00096   /* BlockSize of Input samples are copied into the state buffer */
00097   /* StateIndex points to the starting position to write in the state buffer */
00098   arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1,
00099                        blockSize);
00100
00101   /* Loop over the number of taps. */
00102   tapCnt = numTaps;
00103
00104   /* Read Index, from where the state buffer should be read, is calculated. */
00105   readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
00106
00107   /* Wraparound of readIndex */
00108   if(readIndex < 0)
00109   {
00110     readIndex += (int32_t) delaySize;
00111   }
00112
00113   /* Working pointer for state buffer is updated */
00114   py = pState;
00115
00116   /* blockSize samples are read from the state buffer */
00117   arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
00118                       (int32_t) blockSize, 1, blockSize);
00119
00120   /* Working pointer for the scratch buffer of state values */
00121   px = pb;
00122
00123   /* Working pointer for scratch buffer of output values */
00124   pScratchOut = pScr2;
00125
00126   /* Loop over the blockSize. Unroll by a factor of 4.
00127    * Compute 4 multiplications at a time. */
00128   blkCnt = blockSize >> 2;
00129
00130   while(blkCnt > 0u)
00131   {
00132     /* Perform multiplication and store in the scratch buffer */
00133     *pScratchOut++ = ((q31_t) * px++ * coeff);
00134     *pScratchOut++ = ((q31_t) * px++ * coeff);
00135     *pScratchOut++ = ((q31_t) * px++ * coeff);
00136     *pScratchOut++ = ((q31_t) * px++ * coeff);
00137
00138     /* Decrement the loop counter */
00139     blkCnt--;
00140   }
00141
00142   /* If the blockSize is not a multiple of 4,
00143    * compute the remaining samples */
00144   blkCnt = blockSize % 0x4u;
00145
00146   while(blkCnt > 0u)
00147   {
00148     /* Perform multiplication and store in the scratch buffer */
00149     *pScratchOut++ = ((q31_t) * px++ * coeff);
00150
00151     /* Decrement the loop counter */
00152     blkCnt--;
00153   }
00154
00155   /* Load the coefficient value and
00156    * increment the coefficient buffer for the next set of state values */
00157   coeff = *pCoeffs++;
00158
00159   /* Read Index, from where the state buffer should be read, is calculated. */
00160   readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
00161
00162   /* Wraparound of readIndex */
00163   if(readIndex < 0)
00164   {
00165     readIndex += (int32_t) delaySize;
00166   }
00167
00168   /* Loop over the number of taps. */
00169   tapCnt = (uint32_t) numTaps - 1u;
00170
00171   while(tapCnt > 0u)
00172   {
00173     /* Working pointer for state buffer is updated */
00174     py = pState;
00175
00176     /* blockSize samples are read from the state buffer */
00177     arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
00178                         (int32_t) blockSize, 1, blockSize);
00179
00180     /* Working pointer for the scratch buffer of state values */
00181     px = pb;
00182
00183     /* Working pointer for scratch buffer of output values */
00184     pScratchOut = pScr2;
00185
00186     /* Loop over the blockSize. Unroll by a factor of 4.
00187      * Compute 4 MACS at a time. */
00188     blkCnt = blockSize >> 2;
00189
00190     while(blkCnt > 0u)
00191     {
00192       /* Perform Multiply-Accumulate */
00193       in = *pScratchOut + ((q31_t) * px++ * coeff);
00194       *pScratchOut++ = in;
00195       in = *pScratchOut + ((q31_t) * px++ * coeff);
00196       *pScratchOut++ = in;
00197       in = *pScratchOut + ((q31_t) * px++ * coeff);
00198       *pScratchOut++ = in;
00199       in = *pScratchOut + ((q31_t) * px++ * coeff);
00200       *pScratchOut++ = in;
00201
00202       /* Decrement the loop counter */
00203       blkCnt--;
00204     }
00205
00206     /* If the blockSize is not a multiple of 4,
00207      * compute the remaining samples */
00208     blkCnt = blockSize % 0x4u;
00209
00210     while(blkCnt > 0u)
00211     {
00212       /* Perform Multiply-Accumulate */
00213       in = *pScratchOut + ((q31_t) * px++ * coeff);
00214       *pScratchOut++ = in;
00215
00216       /* Decrement the loop counter */
00217       blkCnt--;
00218     }
00219
00220     /* Load the coefficient value and
00221      * increment the coefficient buffer for the next set of state values */
00222     coeff = *pCoeffs++;
00223
00224     /* Read Index, from where the state buffer should be read, is calculated. */
00225     readIndex = ((int32_t) S->stateIndex -
00226                  (int32_t) blockSize) - *pTapDelay++;
00227
00228     /* Wraparound of readIndex */
00229     if(readIndex < 0)
00230     {
00231       readIndex += (int32_t) delaySize;
00232     }
00233
00234     /* Decrement the tap loop counter */
00235     tapCnt--;
00236   }
00237
00238   /* All the output values are in pScratchOut buffer.
00239      Convert them into 1.15 format, saturate and store in the destination buffer. */
00240   /* Loop over the blockSize. */
00241   blkCnt = blockSize >> 2;
00242
00243   while(blkCnt > 0u)
00244   {
00245     in1 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
00246     in2 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
00247     in3 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
00248     in4 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
00249
00250     *__SIMD32(pOut)++ = __PACKq7(in1, in2, in3, in4);
00251
00252     /* Decrement the blockSize loop counter */
00253     blkCnt--;
00254   }
00255
00256   /* If the blockSize is not a multiple of 4,
00257      remaining samples are processed in the below loop */
00258   blkCnt = blockSize % 0x4u;
00259
00260   while(blkCnt > 0u)
00261   {
00262     *pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8);
00263
00264     /* Decrement the blockSize loop counter */
00265     blkCnt--;
00266   }
00267
00268 #else
00269
00270   /* Run the below code for Cortex-M0 */
00271
00272   /* BlockSize of Input samples are copied into the state buffer */
00273   /* StateIndex points to the starting position to write in the state buffer */
00274   arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1,
00275                        blockSize);
00276
00277   /* Loop over the number of taps. */
00278   tapCnt = numTaps;
00279
00280   /* Read Index, from where the state buffer should be read, is calculated. */
00281   readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
00282
00283   /* Wraparound of readIndex */
00284   if(readIndex < 0)
00285   {
00286     readIndex += (int32_t) delaySize;
00287   }
00288
00289   /* Working pointer for state buffer is updated */
00290   py = pState;
00291
00292   /* blockSize samples are read from the state buffer */
00293   arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
00294                       (int32_t) blockSize, 1, blockSize);
00295
00296   /* Working pointer for the scratch buffer of state values */
00297   px = pb;
00298
00299   /* Working pointer for scratch buffer of output values */
00300   pScratchOut = pScr2;
00301
00302   /* Loop over the blockSize */
00303   blkCnt = blockSize;
00304
00305   while(blkCnt > 0u)
00306   {
00307     /* Perform multiplication and store in the scratch buffer */
00308     *pScratchOut++ = ((q31_t) * px++ * coeff);
00309
00310     /* Decrement the loop counter */
00311     blkCnt--;
00312   }
00313
00314   /* Load the coefficient value and
00315    * increment the coefficient buffer for the next set of state values */
00316   coeff = *pCoeffs++;
00317
00318   /* Read Index, from where the state buffer should be read, is calculated. */
00319   readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
00320
00321   /* Wraparound of readIndex */
00322   if(readIndex < 0)
00323   {
00324     readIndex += (int32_t) delaySize;
00325   }
00326
00327   /* Loop over the number of taps. */
00328   tapCnt = (uint32_t) numTaps - 1u;
00329
00330   while(tapCnt > 0u)
00331   {
00332     /* Working pointer for state buffer is updated */
00333     py = pState;
00334
00335     /* blockSize samples are read from the state buffer */
00336     arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
00337                         (int32_t) blockSize, 1, blockSize);
00338
00339     /* Working pointer for the scratch buffer of state values */
00340     px = pb;
00341
00342     /* Working pointer for scratch buffer of output values */
00343     pScratchOut = pScr2;
00344
00345     /* Loop over the blockSize */
00346     blkCnt = blockSize;
00347
00348     while(blkCnt > 0u)
00349     {
00350       /* Perform Multiply-Accumulate */
00351       in = *pScratchOut + ((q31_t) * px++ * coeff);
00352       *pScratchOut++ = in;
00353
00354       /* Decrement the loop counter */
00355       blkCnt--;
00356     }
00357
00358     /* Load the coefficient value and
00359      * increment the coefficient buffer for the next set of state values */
00360     coeff = *pCoeffs++;
00361
00362     /* Read Index, from where the state buffer should be read, is calculated. */
00363     readIndex =
00364       ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
00365
00366     /* Wraparound of readIndex */
00367     if(readIndex < 0)
00368     {
00369       readIndex += (int32_t) delaySize;
00370     }
00371
00372     /* Decrement the tap loop counter */
00373     tapCnt--;
00374   }
00375
00376   /* All the output values are in pScratchOut buffer.
00377      Convert them into 1.15 format, saturate and store in the destination buffer. */
00378   /* Loop over the blockSize. */
00379   blkCnt = blockSize;
00380
00381   while(blkCnt > 0u)
00382   {
00383     *pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8);
00384
00385     /* Decrement the blockSize loop counter */
00386     blkCnt--;
00387   }
00388
00389 #endif /*   #ifndef ARM_MATH_CM0 */
00390
00391 }
00392
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CMSIS DSP Software Library: arm_fir_sparse_q15.c File Reference

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arm_fir_sparse_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_fir_sparse_q15 (arm_fir_sparse_instance_q15 *S, q15_t *pSrc, q15_t *pDst, q15_t *pScratchIn, q31_t *pScratchOut, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_sparse_q15.c Source File

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arm_fir_sparse_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_sparse_q15.c
00009 *
00010 * Description:  Q15 sparse FIR filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ------------------------------------------------------------------- */
00032 #include "arm_math.h"
00033
00060 void arm_fir_sparse_q15(
00061   arm_fir_sparse_instance_q15 * S,
00062   q15_t * pSrc,
00063   q15_t * pDst,
00064   q15_t * pScratchIn,
00065   q31_t * pScratchOut,
00066   uint32_t blockSize)
00067 {
00068
00069   q15_t *pState = S->pState;                     /* State pointer */
00070   q15_t *pIn = pSrc;                             /* Working pointer for input */
00071   q15_t *pOut = pDst;                            /* Working pointer for output */
00072   q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00073   q15_t *px;                                     /* Temporary pointers for scratch buffer */
00074   q15_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
00075   q15_t *py = pState;                            /* Temporary pointers for state buffer */
00076   int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
00077   uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
00078   uint16_t numTaps = S->numTaps;                 /* Filter order */
00079   int32_t readIndex;                             /* Read index of the state buffer */
00080   uint32_t tapCnt, blkCnt;                       /* loop counters */
00081   q15_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
00082   q31_t *pScr2 = pScratchOut;                    /* Working pointer for pScratchOut */
00083
00084
00085 #ifndef ARM_MATH_CM0
00086
00087   /* Run the below code for Cortex-M4 and Cortex-M3 */
00088
00089   q31_t in1, in2;                                /* Temporary variables */
00090
00091
00092   /* BlockSize of Input samples are copied into the state buffer */
00093   /* StateIndex points to the starting position to write in the state buffer */
00094   arm_circularWrite_q15(py, delaySize, &S->stateIndex, 1, pIn, 1, blockSize);
00095
00096   /* Loop over the number of taps. */
00097   tapCnt = numTaps;
00098
00099   /* Read Index, from where the state buffer should be read, is calculated. */
00100   readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
00101
00102   /* Wraparound of readIndex */
00103   if(readIndex < 0)
00104   {
00105     readIndex += (int32_t) delaySize;
00106   }
00107
00108   /* Working pointer for state buffer is updated */
00109   py = pState;
00110
00111   /* blockSize samples are read from the state buffer */
00112   arm_circularRead_q15(py, delaySize, &readIndex, 1,
00113                        pb, pb, blockSize, 1, blockSize);
00114
00115   /* Working pointer for the scratch buffer of state values */
00116   px = pb;
00117
00118   /* Working pointer for scratch buffer of output values */
00119   pScratchOut = pScr2;
00120
00121   /* Loop over the blockSize. Unroll by a factor of 4.
00122    * Compute 4 multiplications at a time. */
00123   blkCnt = blockSize >> 2;
00124
00125   while(blkCnt > 0u)
00126   {
00127     /* Perform multiplication and store in the scratch buffer */
00128     *pScratchOut++ = ((q31_t) * px++ * coeff);
00129     *pScratchOut++ = ((q31_t) * px++ * coeff);
00130     *pScratchOut++ = ((q31_t) * px++ * coeff);
00131     *pScratchOut++ = ((q31_t) * px++ * coeff);
00132
00133     /* Decrement the loop counter */
00134     blkCnt--;
00135   }
00136
00137   /* If the blockSize is not a multiple of 4,
00138    * compute the remaining samples */
00139   blkCnt = blockSize % 0x4u;
00140
00141   while(blkCnt > 0u)
00142   {
00143     /* Perform multiplication and store in the scratch buffer */
00144     *pScratchOut++ = ((q31_t) * px++ * coeff);
00145
00146     /* Decrement the loop counter */
00147     blkCnt--;
00148   }
00149
00150   /* Load the coefficient value and
00151    * increment the coefficient buffer for the next set of state values */
00152   coeff = *pCoeffs++;
00153
00154   /* Read Index, from where the state buffer should be read, is calculated. */
00155   readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
00156
00157   /* Wraparound of readIndex */
00158   if(readIndex < 0)
00159   {
00160     readIndex += (int32_t) delaySize;
00161   }
00162
00163   /* Loop over the number of taps. */
00164   tapCnt = (uint32_t) numTaps - 1u;
00165
00166   while(tapCnt > 0u)
00167   {
00168     /* Working pointer for state buffer is updated */
00169     py = pState;
00170
00171     /* blockSize samples are read from the state buffer */
00172     arm_circularRead_q15(py, delaySize, &readIndex, 1,
00173                          pb, pb, blockSize, 1, blockSize);
00174
00175     /* Working pointer for the scratch buffer of state values */
00176     px = pb;
00177
00178     /* Working pointer for scratch buffer of output values */
00179     pScratchOut = pScr2;
00180
00181     /* Loop over the blockSize. Unroll by a factor of 4.
00182      * Compute 4 MACS at a time. */
00183     blkCnt = blockSize >> 2;
00184
00185     while(blkCnt > 0u)
00186     {
00187       /* Perform Multiply-Accumulate */
00188       *pScratchOut++ += (q31_t) * px++ * coeff;
00189       *pScratchOut++ += (q31_t) * px++ * coeff;
00190       *pScratchOut++ += (q31_t) * px++ * coeff;
00191       *pScratchOut++ += (q31_t) * px++ * coeff;
00192
00193       /* Decrement the loop counter */
00194       blkCnt--;
00195     }
00196
00197     /* If the blockSize is not a multiple of 4,
00198      * compute the remaining samples */
00199     blkCnt = blockSize % 0x4u;
00200
00201     while(blkCnt > 0u)
00202     {
00203       /* Perform Multiply-Accumulate */
00204       *pScratchOut++ += (q31_t) * px++ * coeff;
00205
00206       /* Decrement the loop counter */
00207       blkCnt--;
00208     }
00209
00210     /* Load the coefficient value and
00211      * increment the coefficient buffer for the next set of state values */
00212     coeff = *pCoeffs++;
00213
00214     /* Read Index, from where the state buffer should be read, is calculated. */
00215     readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
00216
00217     /* Wraparound of readIndex */
00218     if(readIndex < 0)
00219     {
00220       readIndex += (int32_t) delaySize;
00221     }
00222
00223     /* Decrement the tap loop counter */
00224     tapCnt--;
00225   }
00226
00227   /* All the output values are in pScratchOut buffer.
00228      Convert them into 1.15 format, saturate and store in the destination buffer. */
00229   /* Loop over the blockSize. */
00230   blkCnt = blockSize >> 2;
00231
00232   while(blkCnt > 0u)
00233   {
00234     in1 = *pScr2++;
00235     in2 = *pScr2++;
00236
00237 #ifndef  ARM_MATH_BIG_ENDIAN
00238
00239     *__SIMD32(pOut)++ =
00240       __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16),
00241               16);
00242
00243 #else
00244     *__SIMD32(pOut)++ =
00245       __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16),
00246               16);
00247
00248 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00249
00250     in1 = *pScr2++;
00251
00252     in2 = *pScr2++;
00253
00254 #ifndef  ARM_MATH_BIG_ENDIAN
00255
00256     *__SIMD32(pOut)++ =
00257       __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16),
00258               16);
00259
00260 #else
00261
00262     *__SIMD32(pOut)++ =
00263       __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16),
00264               16);
00265
00266 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00267
00268
00269     blkCnt--;
00270
00271   }
00272
00273   /* If the blockSize is not a multiple of 4,
00274      remaining samples are processed in the below loop */
00275   blkCnt = blockSize % 0x4u;
00276
00277   while(blkCnt > 0u)
00278   {
00279     *pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16);
00280     blkCnt--;
00281   }
00282
00283 #else
00284
00285   /* Run the below code for Cortex-M0 */
00286
00287   /* BlockSize of Input samples are copied into the state buffer */
00288   /* StateIndex points to the starting position to write in the state buffer */
00289   arm_circularWrite_q15(py, delaySize, &S->stateIndex, 1, pIn, 1, blockSize);
00290
00291   /* Loop over the number of taps. */
00292   tapCnt = numTaps;
00293
00294   /* Read Index, from where the state buffer should be read, is calculated. */
00295   readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
00296
00297   /* Wraparound of readIndex */
00298   if(readIndex < 0)
00299   {
00300     readIndex += (int32_t) delaySize;
00301   }
00302
00303   /* Working pointer for state buffer is updated */
00304   py = pState;
00305
00306   /* blockSize samples are read from the state buffer */
00307   arm_circularRead_q15(py, delaySize, &readIndex, 1,
00308                        pb, pb, blockSize, 1, blockSize);
00309
00310   /* Working pointer for the scratch buffer of state values */
00311   px = pb;
00312
00313   /* Working pointer for scratch buffer of output values */
00314   pScratchOut = pScr2;
00315
00316   blkCnt = blockSize;
00317
00318   while(blkCnt > 0u)
00319   {
00320     /* Perform multiplication and store in the scratch buffer */
00321     *pScratchOut++ = ((q31_t) * px++ * coeff);
00322
00323     /* Decrement the loop counter */
00324     blkCnt--;
00325   }
00326
00327   /* Load the coefficient value and
00328    * increment the coefficient buffer for the next set of state values */
00329   coeff = *pCoeffs++;
00330
00331   /* Read Index, from where the state buffer should be read, is calculated. */
00332   readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
00333
00334   /* Wraparound of readIndex */
00335   if(readIndex < 0)
00336   {
00337     readIndex += (int32_t) delaySize;
00338   }
00339
00340   /* Loop over the number of taps. */
00341   tapCnt = (uint32_t) numTaps - 1u;
00342
00343   while(tapCnt > 0u)
00344   {
00345     /* Working pointer for state buffer is updated */
00346     py = pState;
00347
00348     /* blockSize samples are read from the state buffer */
00349     arm_circularRead_q15(py, delaySize, &readIndex, 1,
00350                          pb, pb, blockSize, 1, blockSize);
00351
00352     /* Working pointer for the scratch buffer of state values */
00353     px = pb;
00354
00355     /* Working pointer for scratch buffer of output values */
00356     pScratchOut = pScr2;
00357
00358     blkCnt = blockSize;
00359
00360     while(blkCnt > 0u)
00361     {
00362       /* Perform Multiply-Accumulate */
00363       *pScratchOut++ += (q31_t) * px++ * coeff;
00364
00365       /* Decrement the loop counter */
00366       blkCnt--;
00367     }
00368
00369     /* Load the coefficient value and
00370      * increment the coefficient buffer for the next set of state values */
00371     coeff = *pCoeffs++;
00372
00373     /* Read Index, from where the state buffer should be read, is calculated. */
00374     readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
00375
00376     /* Wraparound of readIndex */
00377     if(readIndex < 0)
00378     {
00379       readIndex += (int32_t) delaySize;
00380     }
00381
00382     /* Decrement the tap loop counter */
00383     tapCnt--;
00384   }
00385
00386   /* All the output values are in pScratchOut buffer.
00387      Convert them into 1.15 format, saturate and store in the destination buffer. */
00388   /* Loop over the blockSize. */
00389   blkCnt = blockSize;
00390
00391   while(blkCnt > 0u)
00392   {
00393     *pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16);
00394     blkCnt--;
00395   }
00396
00397 #endif /*   #ifndef ARM_MATH_CM0 */
00398
00399 }
00400
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CMSIS DSP Software Library: arm_fir_sparse_q31.c File Reference

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arm_fir_sparse_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_fir_sparse_q31 (arm_fir_sparse_instance_q31 *S, q31_t *pSrc, q31_t *pDst, q31_t *pScratchIn, uint32_t blockSize)
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CMSIS DSP Software Library: arm_fir_sparse_q31.c Source File

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arm_fir_sparse_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_fir_sparse_q31.c
00009 *
00010 * Description:  Q31 sparse FIR filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ------------------------------------------------------------------- */
00032 #include "arm_math.h"
00033
00034
00058 void arm_fir_sparse_q31(
00059   arm_fir_sparse_instance_q31 * S,
00060   q31_t * pSrc,
00061   q31_t * pDst,
00062   q31_t * pScratchIn,
00063   uint32_t blockSize)
00064 {
00065
00066   q31_t *pState = S->pState;                     /* State pointer */
00067   q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00068   q31_t *px;                                     /* Scratch buffer pointer */
00069   q31_t *py = pState;                            /* Temporary pointers for state buffer */
00070   q31_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
00071   q31_t *pOut;                                   /* Destination pointer */
00072   q63_t out;                                     /* Temporary output variable */
00073   int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
00074   uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
00075   uint16_t numTaps = S->numTaps;                 /* Filter order */
00076   int32_t readIndex;                             /* Read index of the state buffer */
00077   uint32_t tapCnt, blkCnt;                       /* loop counters */
00078   q31_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
00079   q31_t in;
00080
00081
00082   /* BlockSize of Input samples are copied into the state buffer */
00083   /* StateIndex points to the starting position to write in the state buffer */
00084   arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1,
00085                         (int32_t *) pSrc, 1, blockSize);
00086
00087   /* Read Index, from where the state buffer should be read, is calculated. */
00088   readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
00089
00090   /* Wraparound of readIndex */
00091   if(readIndex < 0)
00092   {
00093     readIndex += (int32_t) delaySize;
00094   }
00095
00096   /* Working pointer for state buffer is updated */
00097   py = pState;
00098
00099   /* blockSize samples are read from the state buffer */
00100   arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
00101                        (int32_t *) pb, (int32_t *) pb, blockSize, 1,
00102                        blockSize);
00103
00104   /* Working pointer for the scratch buffer of state values */
00105   px = pb;
00106
00107   /* Working pointer for scratch buffer of output values */
00108   pOut = pDst;
00109
00110
00111 #ifndef ARM_MATH_CM0
00112
00113   /* Run the below code for Cortex-M4 and Cortex-M3 */
00114
00115   /* Loop over the blockSize. Unroll by a factor of 4.
00116    * Compute 4 Multiplications at a time. */
00117   blkCnt = blockSize >> 2;
00118
00119   while(blkCnt > 0u)
00120   {
00121     /* Perform Multiplications and store in the destination buffer */
00122     *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
00123     *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
00124     *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
00125     *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
00126
00127     /* Decrement the loop counter */
00128     blkCnt--;
00129   }
00130
00131   /* If the blockSize is not a multiple of 4,
00132    * compute the remaining samples */
00133   blkCnt = blockSize % 0x4u;
00134
00135   while(blkCnt > 0u)
00136   {
00137     /* Perform Multiplications and store in the destination buffer */
00138     *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
00139
00140     /* Decrement the loop counter */
00141     blkCnt--;
00142   }
00143
00144   /* Load the coefficient value and
00145    * increment the coefficient buffer for the next set of state values */
00146   coeff = *pCoeffs++;
00147
00148   /* Read Index, from where the state buffer should be read, is calculated. */
00149   readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
00150
00151   /* Wraparound of readIndex */
00152   if(readIndex < 0)
00153   {
00154     readIndex += (int32_t) delaySize;
00155   }
00156
00157   /* Loop over the number of taps. */
00158   tapCnt = (uint32_t) numTaps - 1u;
00159
00160   while(tapCnt > 0u)
00161   {
00162     /* Working pointer for state buffer is updated */
00163     py = pState;
00164
00165     /* blockSize samples are read from the state buffer */
00166     arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
00167                          (int32_t *) pb, (int32_t *) pb, blockSize, 1,
00168                          blockSize);
00169
00170     /* Working pointer for the scratch buffer of state values */
00171     px = pb;
00172
00173     /* Working pointer for scratch buffer of output values */
00174     pOut = pDst;
00175
00176     /* Loop over the blockSize. Unroll by a factor of 4.
00177      * Compute 4 MACS at a time. */
00178     blkCnt = blockSize >> 2;
00179
00180     while(blkCnt > 0u)
00181     {
00182       out = *pOut;
00183       out += ((q63_t) * px++ * coeff) >> 32;
00184       *pOut++ = (q31_t) (out);
00185
00186       out = *pOut;
00187       out += ((q63_t) * px++ * coeff) >> 32;
00188       *pOut++ = (q31_t) (out);
00189
00190       out = *pOut;
00191       out += ((q63_t) * px++ * coeff) >> 32;
00192       *pOut++ = (q31_t) (out);
00193
00194       out = *pOut;
00195       out += ((q63_t) * px++ * coeff) >> 32;
00196       *pOut++ = (q31_t) (out);
00197
00198       /* Decrement the loop counter */
00199       blkCnt--;
00200     }
00201
00202     /* If the blockSize is not a multiple of 4,
00203      * compute the remaining samples */
00204     blkCnt = blockSize % 0x4u;
00205
00206     while(blkCnt > 0u)
00207     {
00208       /* Perform Multiply-Accumulate */
00209       out = *pOut;
00210       out += ((q63_t) * px++ * coeff) >> 32;
00211       *pOut++ = (q31_t) (out);
00212
00213       /* Decrement the loop counter */
00214       blkCnt--;
00215     }
00216
00217     /* Load the coefficient value and
00218      * increment the coefficient buffer for the next set of state values */
00219     coeff = *pCoeffs++;
00220
00221     /* Read Index, from where the state buffer should be read, is calculated. */
00222     readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
00223
00224     /* Wraparound of readIndex */
00225     if(readIndex < 0)
00226     {
00227       readIndex += (int32_t) delaySize;
00228     }
00229
00230     /* Decrement the tap loop counter */
00231     tapCnt--;
00232   }
00233
00234   /* Working output pointer is updated */
00235   pOut = pDst;
00236
00237   /* Output is converted into 1.31 format. */
00238   /* Loop over the blockSize. Unroll by a factor of 4.
00239    * process 4 output samples at a time. */
00240   blkCnt = blockSize >> 2;
00241
00242   while(blkCnt > 0u)
00243   {
00244     in = *pOut << 1;
00245     *pOut++ = in;
00246     in = *pOut << 1;
00247     *pOut++ = in;
00248     in = *pOut << 1;
00249     *pOut++ = in;
00250     in = *pOut << 1;
00251     *pOut++ = in;
00252
00253     /* Decrement the loop counter */
00254     blkCnt--;
00255   }
00256
00257   /* If the blockSize is not a multiple of 4,
00258    * process the remaining output samples */
00259   blkCnt = blockSize % 0x4u;
00260
00261   while(blkCnt > 0u)
00262   {
00263     in = *pOut << 1;
00264     *pOut++ = in;
00265
00266     /* Decrement the loop counter */
00267     blkCnt--;
00268   }
00269
00270 #else
00271
00272   /* Run the below code for Cortex-M0 */
00273   blkCnt = blockSize;
00274
00275   while(blkCnt > 0u)
00276   {
00277     /* Perform Multiplications and store in the destination buffer */
00278     *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
00279
00280     /* Decrement the loop counter */
00281     blkCnt--;
00282   }
00283
00284   /* Load the coefficient value and
00285    * increment the coefficient buffer for the next set of state values */
00286   coeff = *pCoeffs++;
00287
00288   /* Read Index, from where the state buffer should be read, is calculated. */
00289   readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
00290
00291   /* Wraparound of readIndex */
00292   if(readIndex < 0)
00293   {
00294     readIndex += (int32_t) delaySize;
00295   }
00296
00297   /* Loop over the number of taps. */
00298   tapCnt = (uint32_t) numTaps - 1u;
00299
00300   while(tapCnt > 0u)
00301   {
00302     /* Working pointer for state buffer is updated */
00303     py = pState;
00304
00305     /* blockSize samples are read from the state buffer */
00306     arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
00307                          (int32_t *) pb, (int32_t *) pb, blockSize, 1,
00308                          blockSize);
00309
00310     /* Working pointer for the scratch buffer of state values */
00311     px = pb;
00312
00313     /* Working pointer for scratch buffer of output values */
00314     pOut = pDst;
00315
00316     blkCnt = blockSize;
00317
00318     while(blkCnt > 0u)
00319     {
00320       /* Perform Multiply-Accumulate */
00321       out = *pOut;
00322       out += ((q63_t) * px++ * coeff) >> 32;
00323       *pOut++ = (q31_t) (out);
00324
00325       /* Decrement the loop counter */
00326       blkCnt--;
00327     }
00328
00329     /* Load the coefficient value and
00330      * increment the coefficient buffer for the next set of state values */
00331     coeff = *pCoeffs++;
00332
00333     /* Read Index, from where the state buffer should be read, is calculated. */
00334     readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
00335
00336     /* Wraparound of readIndex */
00337     if(readIndex < 0)
00338     {
00339       readIndex += (int32_t) delaySize;
00340     }
00341
00342     /* Decrement the tap loop counter */
00343     tapCnt--;
00344   }
00345
00346   /* Working output pointer is updated */
00347   pOut = pDst;
00348
00349   /* Output is converted into 1.31 format. */
00350   blkCnt = blockSize;
00351
00352   while(blkCnt > 0u)
00353   {
00354     in = *pOut << 1;
00355     *pOut++ = in;
00356
00357     /* Decrement the loop counter */
00358     blkCnt--;
00359   }
00360
00361 #endif /*   #ifndef ARM_MATH_CM0 */
00362
00363 }
00364
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CMSIS DSP Software Library: arm_float_to_q7.c File Reference

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arm_float_to_q7.c File Reference

#include "arm_math.h"

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Functions

void arm_float_to_q7 (float32_t *pSrc, q7_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_float_to_q7.c Source File

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arm_float_to_q7.c

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00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_float_to_q7.c
00009 *
00010 * Description:  Converts the elements of the floating-point vector to Q7 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00064 void arm_float_to_q7(
00065   float32_t * pSrc,
00066   q7_t * pDst,
00067   uint32_t blockSize)
00068 {
00069   float32_t *pIn = pSrc;                         /* Src pointer */
00070   uint32_t blkCnt;                               /* loop counter */
00071
00072 #ifdef ARM_MATH_ROUNDING
00073
00074   float32_t in;
00075
00076 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00077
00078 #ifndef ARM_MATH_CM0
00079
00080   /* Run the below code for Cortex-M4 and Cortex-M3 */
00081
00082   /*loop Unrolling */
00083   blkCnt = blockSize >> 2u;
00084
00085   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00086    ** a second loop below computes the remaining 1 to 3 samples. */
00087   while(blkCnt > 0u)
00088   {
00089
00090 #ifdef ARM_MATH_ROUNDING
00091     /* C = A * 128 */
00092     /* convert from float to q7 and then store the results in the destination buffer */
00093     in = *pIn++;
00094     in = (in * 128);
00095     in += in > 0 ? 0.5 : -0.5;
00096     *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
00097
00098     in = *pIn++;
00099     in = (in * 128);
00100     in += in > 0 ? 0.5 : -0.5;
00101     *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
00102
00103     in = *pIn++;
00104     in = (in * 128);
00105     in += in > 0 ? 0.5 : -0.5;
00106     *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
00107
00108     in = *pIn++;
00109     in = (in * 128);
00110     in += in > 0 ? 0.5 : -0.5;
00111     *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
00112
00113 #else
00114
00115     /* C = A * 128 */
00116     /* convert from float to q7 and then store the results in the destination buffer */
00117     *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
00118     *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
00119     *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
00120     *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
00121
00122 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00123
00124     /* Decrement the loop counter */
00125     blkCnt--;
00126   }
00127
00128   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00129    ** No loop unrolling is used. */
00130   blkCnt = blockSize % 0x4u;
00131
00132   while(blkCnt > 0u)
00133   {
00134
00135 #ifdef ARM_MATH_ROUNDING
00136     /* C = A * 128 */
00137     /* convert from float to q7 and then store the results in the destination buffer */
00138     in = *pIn++;
00139     in = (in * 128);
00140     in += in > 0 ? 0.5 : -0.5;
00141     *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
00142
00143 #else
00144
00145     /* C = A * 128 */
00146     /* convert from float to q7 and then store the results in the destination buffer */
00147     *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
00148
00149 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00150
00151     /* Decrement the loop counter */
00152     blkCnt--;
00153   }
00154
00155
00156 #else
00157
00158   /* Run the below code for Cortex-M0 */
00159
00160
00161   /* Loop over blockSize number of values */
00162   blkCnt = blockSize;
00163
00164   while(blkCnt > 0u)
00165   {
00166 #ifdef ARM_MATH_ROUNDING
00167     /* C = A * 128 */
00168     /* convert from float to q7 and then store the results in the destination buffer */
00169     in = *pIn++;
00170     in = (in * 128.0f);
00171     in += in > 0 ? 0.5f : -0.5f;
00172     *pDst++ = (q7_t) (__SSAT((q31_t) (in), 8));
00173
00174 #else
00175
00176     /* C = A * 128 */
00177     /* convert from float to q7 and then store the results in the destination buffer */
00178     *pDst++ = (q7_t) __SSAT((q31_t) (*pIn++ * 128.0f), 8);
00179
00180 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00181
00182     /* Decrement the loop counter */
00183     blkCnt--;
00184   }
00185
00186 #endif /* #ifndef ARM_MATH_CM0 */
00187
00188 }
00189
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CMSIS DSP Software Library: arm_float_to_q15.c File Reference

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Functions

arm_float_to_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_float_to_q15 (float32_t *pSrc, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_float_to_q15.c Source File

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arm_float_to_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_float_to_q15.c
00009 *
00010 * Description:  Converts the elements of the floating-point vector to Q15 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00065 void arm_float_to_q15(
00066   float32_t * pSrc,
00067   q15_t * pDst,
00068   uint32_t blockSize)
00069 {
00070   float32_t *pIn = pSrc;                         /* Src pointer */
00071   uint32_t blkCnt;                               /* loop counter */
00072
00073 #ifdef ARM_MATH_ROUNDING
00074
00075   float32_t in;
00076
00077 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00078
00079 #ifndef ARM_MATH_CM0
00080
00081   /* Run the below code for Cortex-M4 and Cortex-M3 */
00082
00083   /*loop Unrolling */
00084   blkCnt = blockSize >> 2u;
00085
00086   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00087    ** a second loop below computes the remaining 1 to 3 samples. */
00088   while(blkCnt > 0u)
00089   {
00090
00091 #ifdef ARM_MATH_ROUNDING
00092     /* C = A * 32768 */
00093     /* convert from float to q15 and then store the results in the destination buffer */
00094     in = *pIn++;
00095     in = (in * 32768.0f);
00096     in += in > 0 ? 0.5 : -0.5;
00097     *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
00098
00099     in = *pIn++;
00100     in = (in * 32768.0f);
00101     in += in > 0 ? 0.5 : -0.5;
00102     *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
00103
00104     in = *pIn++;
00105     in = (in * 32768.0f);
00106     in += in > 0 ? 0.5 : -0.5;
00107     *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
00108
00109     in = *pIn++;
00110     in = (in * 32768.0f);
00111     in += in > 0 ? 0.5 : -0.5;
00112     *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
00113
00114 #else
00115
00116     /* C = A * 32768 */
00117     /* convert from float to q15 and then store the results in the destination buffer */
00118     *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
00119     *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
00120     *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
00121     *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
00122
00123 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00124
00125     /* Decrement the loop counter */
00126     blkCnt--;
00127   }
00128
00129   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00130    ** No loop unrolling is used. */
00131   blkCnt = blockSize % 0x4u;
00132
00133   while(blkCnt > 0u)
00134   {
00135
00136 #ifdef ARM_MATH_ROUNDING
00137     /* C = A * 32768 */
00138     /* convert from float to q15 and then store the results in the destination buffer */
00139     in = *pIn++;
00140     in = (in * 32768.0f);
00141     in += in > 0 ? 0.5 : -0.5;
00142     *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
00143
00144 #else
00145
00146     /* C = A * 32768 */
00147     /* convert from float to q15 and then store the results in the destination buffer */
00148     *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
00149
00150 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00151
00152     /* Decrement the loop counter */
00153     blkCnt--;
00154   }
00155
00156
00157 #else
00158
00159   /* Run the below code for Cortex-M0 */
00160
00161   /* Loop over blockSize number of values */
00162   blkCnt = blockSize;
00163
00164   while(blkCnt > 0u)
00165   {
00166
00167 #ifdef ARM_MATH_ROUNDING
00168     /* C = A * 32768 */
00169     /* convert from float to q15 and then store the results in the destination buffer */
00170     in = *pIn++;
00171     in = (in * 32768.0f);
00172     in += in > 0 ? 0.5f : -0.5f;
00173     *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
00174
00175 #else
00176
00177     /* C = A * 32768 */
00178     /* convert from float to q15 and then store the results in the destination buffer */
00179     *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
00180
00181 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00182
00183     /* Decrement the loop counter */
00184     blkCnt--;
00185   }
00186
00187 #endif /* #ifndef ARM_MATH_CM0 */
00188
00189 }
00190
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CMSIS DSP Software Library: arm_float_to_q31.c File Reference

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Functions

arm_float_to_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_float_to_q31 (float32_t *pSrc, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_float_to_q31.c Source File

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arm_float_to_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_float_to_q31.c
00009 *
00010 * Description:  Converts the elements of the floating-point vector to Q31 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00069 void arm_float_to_q31(
00070   float32_t * pSrc,
00071   q31_t * pDst,
00072   uint32_t blockSize)
00073 {
00074   float32_t *pIn = pSrc;                         /* Src pointer */
00075   uint32_t blkCnt;                               /* loop counter */
00076
00077 #ifdef ARM_MATH_ROUNDING
00078
00079   float32_t in;
00080
00081 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00082
00083 #ifndef ARM_MATH_CM0
00084
00085   /* Run the below code for Cortex-M4 and Cortex-M3 */
00086
00087   /*loop Unrolling */
00088   blkCnt = blockSize >> 2u;
00089
00090   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00091    ** a second loop below computes the remaining 1 to 3 samples. */
00092   while(blkCnt > 0u)
00093   {
00094
00095 #ifdef ARM_MATH_ROUNDING
00096
00097     /* C = A * 32768 */
00098     /* convert from float to Q31 and then store the results in the destination buffer */
00099     in = *pIn++;
00100     in = (in * 2147483648.0f);
00101     in += in > 0 ? 0.5 : -0.5;
00102     *pDst++ = clip_q63_to_q31((q63_t) (in));
00103
00104     in = *pIn++;
00105     in = (in * 2147483648.0f);
00106     in += in > 0 ? 0.5 : -0.5;
00107     *pDst++ = clip_q63_to_q31((q63_t) (in));
00108
00109     in = *pIn++;
00110     in = (in * 2147483648.0f);
00111     in += in > 0 ? 0.5 : -0.5;
00112     *pDst++ = clip_q63_to_q31((q63_t) (in));
00113
00114     in = *pIn++;
00115     in = (in * 2147483648.0f);
00116     in += in > 0 ? 0.5 : -0.5;
00117     *pDst++ = clip_q63_to_q31((q63_t) (in));
00118
00119 #else
00120
00121     /* C = A * 2147483648 */
00122     /* convert from float to Q31 and then store the results in the destination buffer */
00123     *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
00124     *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
00125     *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
00126     *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
00127
00128 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00129
00130     /* Decrement the loop counter */
00131     blkCnt--;
00132   }
00133
00134   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00135    ** No loop unrolling is used. */
00136   blkCnt = blockSize % 0x4u;
00137
00138   while(blkCnt > 0u)
00139   {
00140
00141 #ifdef ARM_MATH_ROUNDING
00142
00143     /* C = A * 2147483648 */
00144     /* convert from float to Q31 and then store the results in the destination buffer */
00145     in = *pIn++;
00146     in = (in * 2147483648.0f);
00147     in += in > 0 ? 0.5 : -0.5;
00148     *pDst++ = clip_q63_to_q31((q63_t) (in));
00149
00150 #else
00151
00152     /* C = A * 2147483648 */
00153     /* convert from float to Q31 and then store the results in the destination buffer */
00154     *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
00155
00156 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00157
00158     /* Decrement the loop counter */
00159     blkCnt--;
00160   }
00161
00162
00163 #else
00164
00165   /* Run the below code for Cortex-M0 */
00166
00167   /* Loop over blockSize number of values */
00168   blkCnt = blockSize;
00169
00170   while(blkCnt > 0u)
00171   {
00172
00173 #ifdef ARM_MATH_ROUNDING
00174
00175     /* C = A * 2147483648 */
00176     /* convert from float to Q31 and then store the results in the destination buffer */
00177     in = *pIn++;
00178     in = (in * 2147483648.0f);
00179     in += in > 0 ? 0.5f : -0.5f;
00180     *pDst++ = clip_q63_to_q31((q63_t) (in));
00181
00182 #else
00183
00184     /* C = A * 2147483648 */
00185     /* convert from float to Q31 and then store the results in the destination buffer */
00186     *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
00187
00188 #endif /*      #ifdef ARM_MATH_ROUNDING        */
00189
00190     /* Decrement the loop counter */
00191     blkCnt--;
00192   }
00193
00194 #endif /* #ifndef ARM_MATH_CM0 */
00195
00196 }
00197
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CMSIS DSP Software Library: arm_graphic_equalizer_example_q31.c File Reference

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Defines | Functions | Variables

arm_graphic_equalizer_example_q31.c File Reference

#include "arm_math.h"
#include "math_helper.h"

Go to the source code of this file.

Defines

#define | TESTLENGTH 320
#define | BLOCKSIZE 32
#define | NUMBLOCKS (TESTLENGTH/BLOCKSIZE)
#define | NUMSTAGES 2
#define | SNR_THRESHOLD_F32 98

Functions

int32_t | main (void)

Variables

float32_t | testInput_f32 [TESTLENGTH]
static float32_t | testOutput [TESTLENGTH]
float32_t | testRefOutput_f32 [TESTLENGTH]
static q63_t | biquadStateBand1Q31 [4 *2]
static q63_t | biquadStateBand2Q31 [4 *2]
static q31_t | biquadStateBand3Q31 [4 *2]
static q31_t | biquadStateBand4Q31 [4 *2]
static q31_t | biquadStateBand5Q31 [4 *2]
q31_t | inputQ31 [BLOCKSIZE]
q31_t | outputQ31 [BLOCKSIZE]
const q31_t | coeffTable [950]
int | gainDB [5] = {0, -3, 6, 4, -6}
float32_t snr

Define Documentation

#define TESTLENGTH 320
Examples:
arm_graphic_equalizer_example_q31.c.

Definition at line 117 of file arm_graphic_equalizer_example_q31.c.

#define BLOCKSIZE 32
Examples:
arm_graphic_equalizer_example_q31.c, and arm_signal_converge_example_f32.c.

Definition at line 120 of file arm_graphic_equalizer_example_q31.c.

#define NUMBLOCKS (TESTLENGTH/BLOCKSIZE)
Examples:
arm_graphic_equalizer_example_q31.c.

Definition at line 123 of file arm_graphic_equalizer_example_q31.c.

#define NUMSTAGES 2
Examples:
arm_graphic_equalizer_example_q31.c.

Definition at line 126 of file arm_graphic_equalizer_example_q31.c.

#define SNR_THRESHOLD_F32 98

Definition at line 128 of file arm_graphic_equalizer_example_q31.c.

Function Documentation

int32_t main ( void )

Definition at line 285 of file arm_graphic_equalizer_example_q31.c.

Variable Documentation

float32_t testInput_f32[TESTLENGTH]
Examples:
arm_graphic_equalizer_example_q31.c, arm_signal_converge_example_f32.c, arm_sin_cos_example_f32.c, and arm_variance_example_f32.c.

Definition at line 83 of file arm_sin_cos_example_f32.c.

float32_t testOutput[TESTLENGTH] [static]

Definition at line 135 of file arm_graphic_equalizer_example_q31.c.

float32_t testRefOutput_f32[TESTLENGTH]

Definition at line 141 of file arm_convolution_example_f32.c.

q63_t biquadStateBand1Q31[4 *2] [static]
Examples:
arm_graphic_equalizer_example_q31.c.

Definition at line 143 of file arm_graphic_equalizer_example_q31.c.

q63_t biquadStateBand2Q31[4 *2] [static]
Examples:
arm_graphic_equalizer_example_q31.c.

Definition at line 144 of file arm_graphic_equalizer_example_q31.c.

q31_t biquadStateBand3Q31[4 *2] [static]
Examples:
arm_graphic_equalizer_example_q31.c.

Definition at line 145 of file arm_graphic_equalizer_example_q31.c.

q31_t biquadStateBand4Q31[4 *2] [static]
Examples:
arm_graphic_equalizer_example_q31.c.

Definition at line 146 of file arm_graphic_equalizer_example_q31.c.

q31_t biquadStateBand5Q31[4 *2] [static]
Examples:
arm_graphic_equalizer_example_q31.c.

Definition at line 147 of file arm_graphic_equalizer_example_q31.c.

q31_t inputQ31[BLOCKSIZE]
Examples:
arm_graphic_equalizer_example_q31.c.

Definition at line 153 of file arm_graphic_equalizer_example_q31.c.

q31_t outputQ31[BLOCKSIZE]
Examples:
arm_graphic_equalizer_example_q31.c.

Definition at line 154 of file arm_graphic_equalizer_example_q31.c.

const q31_t coeffTable[950]
Examples:
arm_graphic_equalizer_example_q31.c.

Definition at line 167 of file arm_graphic_equalizer_example_q31.c.

int gainDB[5] = {0, -3, 6, 4, -6}
Examples:
arm_graphic_equalizer_example_q31.c.

Definition at line 276 of file arm_graphic_equalizer_example_q31.c.

float32_t snr

Definition at line 278 of file arm_graphic_equalizer_example_q31.c.

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CMSIS DSP Software Library: arm_graphic_equalizer_example_q31.c Source File

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arm_graphic_equalizer_example_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:         29. November 2010
00005 * $Revision:      V1.0.3
00006 *
00007 * Project:    CMSIS DSP Library
00008 * Title:          arm_graphic_equalizer_example_q31.c
00009 *
00010 * Description:  Example showing an audio graphic equalizer constructed
00011 *              out of Biquad filters.
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3
00014 *
00015 *
00016 * Version 1.0.3 2010/11/29
00017 *    Re-organized the CMSIS folders and updated documentation.
00018 *
00019 * Version 1.0.1 2010/10/05 KK
00020 *    Production release and review comments incorporated.
00021 *
00022 * Version 1.0.0 2010/09/20 KK
00023 *    Production release and review comments incorporated.
00024 * ------------------------------------------------------------------- */
00025
00113 #include "arm_math.h"
00114 #include "math_helper.h"
00115
00116 /* Length of the overall data in the test */
00117 #define TESTLENGTH 320
00118
00119 /* Block size for the underlying processing */
00120 #define BLOCKSIZE 32
00121
00122 /* Total number of blocks to run */
00123 #define NUMBLOCKS (TESTLENGTH/BLOCKSIZE)
00124
00125 /* Number of 2nd order Biquad stages per filter */
00126 #define NUMSTAGES 2
00127
00128 #define SNR_THRESHOLD_F32  98
00129
00130 /* -------------------------------------------------------------------
00131  * External Declarations for Input and Output buffers
00132  * ------------------------------------------------------------------- */
00133
00134 extern float32_t testInput_f32[TESTLENGTH];
00135 static float32_t testOutput[TESTLENGTH];
00136
00137 extern float32_t testRefOutput_f32[TESTLENGTH];
00138
00139 /* ----------------------------------------------------------------------
00140 ** Q31 state buffers for Band1, Band2, Band3, Band4, Band5
00141 ** ------------------------------------------------------------------- */
00142
00143 static q63_t biquadStateBand1Q31[4 * 2];
00144 static q63_t biquadStateBand2Q31[4 * 2];
00145 static q31_t biquadStateBand3Q31[4 * 2];
00146 static q31_t biquadStateBand4Q31[4 * 2];
00147 static q31_t biquadStateBand5Q31[4 * 2];
00148
00149 /* ----------------------------------------------------------------------
00150 ** Q31 input and output buffers
00151 ** ------------------------------------------------------------------- */
00152
00153 q31_t inputQ31[BLOCKSIZE];
00154 q31_t outputQ31[BLOCKSIZE];
00155
00156 /* ----------------------------------------------------------------------
00157 ** Entire coefficient table.  There are 10 coefficients per 4th order Biquad
00158 ** cascade filter.  The first 10 coefficients correspond to the -9 dB gain
00159 ** setting of band 1; the next 10 coefficient correspond to the -8 dB gain
00160 ** setting of band 1; and so on.  There are 10*19=190 coefficients in total
00161 ** for band 1 (gains = -9, -8, -7, ..., 9).  After this come the 190 coefficients
00162 ** for band 2.
00163 **
00164 ** The coefficients are in Q29 format and require a postShift of 2.
00165 ** ------------------------------------------------------------------- */
00166
00167 const q31_t coeffTable[950] = {
00168
00169     /* Band 1, -9 dB gain */
00170     535576962, -1071153923, 535576962, 1073741824, -536870912, 535576962, -1063501998, 527979313, 1060865294, -524146981,
00171     /* Band 1, -8 dB gain */
00172     535723226, -1071446451, 535723226, 1073741824, -536870912, 535723226, -1063568947, 527903217, 1061230578, -524503778,
00173     535868593, -1071737186, 535868593, 1073741824, -536870912, 535868593, -1063627467, 527819780, 1061585502, -524850686,
00174     536013181, -1072026363, 536013181, 1073741824, -536870912, 536013181, -1063677598, 527728935, 1061930361, -525187972,
00175     536157109, -1072314217, 536157109, 1073741824, -536870912, 536157109, -1063719372, 527630607, 1062265438, -525515897,
00176     536300492, -1072600983, 536300492, 1073741824, -536870912, 536300492, -1063752815, 527524720, 1062591011, -525834716,
00177     536443447, -1072886894, 536443447, 1073741824, -536870912, 536443447, -1063777945, 527411186, 1062907350, -526144676,
00178     536586091, -1073172183, 536586091, 1073741824, -536870912, 536586091, -1063794775, 527289917, 1063214717, -526446017,
00179     536728541, -1073457082, 536728541, 1073741824, -536870912, 536728541, -1063803308, 527160815, 1063513366, -526738975,
00180     536870912, -1073741824, 536870912, 1073741824, -536870912, 536870912, -1063803543, 527023777, 1063803543, -527023777,
00181     537013321, -1074026642, 537013321, 1073741824, -536870912, 537013321, -1063795470, 526878696, 1064085490, -527300648,
00182     537155884, -1074311768, 537155884, 1073741824, -536870912, 537155884, -1063779073, 526725455, 1064359439, -527569803,
00183     537298718, -1074597435, 537298718, 1073741824, -536870912, 537298718, -1063754328, 526563934, 1064625617, -527831454,
00184     537441939, -1074883878, 537441939, 1073741824, -536870912, 537441939, -1063721205, 526394005, 1064884245, -528085806,
00185     537585666, -1075171331, 537585666, 1073741824, -536870912, 537585666, -1063679666, 526215534, 1065135536, -528333059,
00186     537730015, -1075460030, 537730015, 1073741824, -536870912, 537730015, -1063629666, 526028380, 1065379699, -528573409,
00187     537875106, -1075750212, 537875106, 1073741824, -536870912, 537875106, -1063571152, 525832396, 1065616936, -528807045,
00188     538021057, -1076042114, 538021057, 1073741824, -536870912, 538021057, -1063504065, 525627429, 1065847444, -529034151,
00189     538167989, -1076335977, 538167989, 1073741824, -536870912, 538167989, -1063428338, 525413317, 1066071412, -529254907,
00190
00191     /* Band 2, -9 dB gain */
00192     531784976, -1055497692, 523873415, 1066213307, -529420241, 531784976, -1040357886, 509828014, 1028908252, -494627367,
00193     /* Band 2, -8 dB gain */
00194     532357636, -1056601982, 524400080, 1066115844, -529326645, 532357636, -1040623406, 509562600, 1030462237, -496062122,
00195     532927392, -1057707729, 524931110, 1066024274, -529239070, 532927392, -1040848253, 509262081, 1031969246, -497457090,
00196     533494678, -1058816094, 525467240, 1065939047, -529157961, 533494678, -1041032161, 508925950, 1033429976, -498812573,
00197     534059929, -1059928204, 526009170, 1065860582, -529083734, 534059929, -1041174868, 508553717, 1034845124, -500128887,
00198     534623580, -1061045148, 526557561, 1065789260, -529016764, 534623580, -1041276126, 508144920, 1036215393, -501406373,
00199     535186068, -1062167969, 527113032, 1065725420, -528957385, 535186068, -1041335703, 507699125, 1037541500, -502645399,
00200     535747827, -1063297666, 527676151, 1065669351, -528905879, 535747827, -1041353386, 507215934, 1038824183, -503846368,
00201     536309295, -1064435183, 528247436, 1065621289, -528862476, 536309295, -1041328990, 506694984, 1040064203, -505009724,
00202     536870912, -1065581413, 528827349, 1065581413, -528827349, 536870912, -1041262354, 506135953, 1041262354, -506135953,
00203     537433117, -1066737194, 529416295, 1065549847, -528800610, 537433117, -1041153346, 505538564, 1042419457, -507225588,
00204     537996352, -1067903307, 530014622, 1065526651, -528782316, 537996352, -1041001864, 504902578, 1043536370, -508279208,
00205     538561061, -1069080480, 530622620, 1065511830, -528772462, 538561061, -1040807833, 504227800, 1044613981, -509297437,
00206     539127690, -1070269387, 531240527, 1065505333, -528770987, 539127690, -1040571205, 503514074, 1045653211, -510280946,
00207     539696690, -1071470656, 531868525, 1065507054, -528777778, 539696690, -1040291951, 502761277, 1046655011, -511230450,
00208     540268512, -1072684867, 532506750, 1065516837, -528792672, 540268512, -1039970063, 501969320, 1047620358, -512146700,
00209     540843613, -1073912567, 533155297, 1065534483, -528815459, 540843613, -1039605542, 501138139, 1048550251, -513030484,
00210     541422451, -1075154268, 533814224, 1065559750, -528845892, 541422451, -1039198394, 500267687, 1049445708, -513882621,
00211     542005489, -1076410460, 534483561, 1065592362, -528883686, 542005489, -1038748624, 499357932, 1050307760, -514703956,
00212     518903861, -1001986830, 486725277, 1037235801, -502367695, 518903861, -945834422, 446371043, 902366163, -400700571,
00213     520899989, -1005630916, 488289126, 1036926846, -502147311, 520899989, -946490935, 445581846, 907921945, -404936158,
00214     522893209, -1009290002, 489869792, 1036650484, -501961419, 522893209, -947006359, 444685310, 913306106, -409075225,
00215     524884763, -1012968199, 491470256, 1036407567, -501810737, 524884763, -947377809, 443679533, 918521018, -413116221,
00216     526875910, -1016669649, 493093518, 1036198712, -501695739, 526875910, -947602324, 442562672, 923569247, -417057897,
00217     528867927, -1020398503, 494742575, 1036024293, -501616651, 528867927, -947676875, 441332970, 928453558, -420899319,
00218     530862111, -1024158905, 496420407, 1035884447, -501573457, 530862111, -947598385, 439988777, 933176909, -424639872,
00219     532859778, -1027954970, 498129955, 1035779077, -501565907, 532859778, -947363742, 438528571, 937742446, -428279254,
00220     534862260, -1031790763, 499874098, 1035707863, -501593525, 534862260, -946969823, 436950987, 942153486, -431817474,
00221     536870912, -1035670279, 501655630, 1035670279, -501655630, 536870912, -946413508, 435254839, 946413508, -435254839,
00222     538887107, -1039597419, 503477238, 1035665609, -501751354, 538887107, -945691703, 433439146, 950526127, -438591937,
00223     540912240, -1043575967, 505341475, 1035692963, -501879659, 540912240, -944801359, 431503152, 954495080, -441829621,
00224     542947726, -1047609569, 507250741, 1035751307, -502039364, 542947726, -943739490, 429446349, 958324201, -444968987,
00225     544995000, -1051701717, 509207261, 1035839473, -502229165, 544995000, -942503190, 427268492, 962017400, -448011351,
00226     547055523, -1055855728, 511213065, 1035956193, -502447657, 547055523, -941089647, 424969617, 965578640, -450958226,
00227     549130774, -1060074734, 513269973, 1036100110, -502693359, 549130774, -939496155, 422550049, 969011913, -453811298,
00228     551222259, -1064361672, 515379585, 1036269804, -502964731, 551222259, -937720119, 420010407, 972321228, -456572401,
00229     553331507, -1068719280, 517543273, 1036463810, -503260192, 553331507, -935759057, 417351601, 975510582, -459243495,
00230     555460072, -1073150100, 519762181, 1036680633, -503578144, 555460072, -933610600, 414574832, 978583948, -461826644,
00231     494084017, -851422604, 404056273, 930151631, -423619864, 494084017, -673714108, 339502486, 561843007, -265801750,
00232     498713542, -859177141, 406587077, 929211656, -423786402, 498713542, -673274906, 338185129, 573719128, -272222942,
00233     503369016, -867012190, 409148384, 928362985, -424054784, 503369016, -672533059, 336693984, 585290277, -278599028,
00234     508052536, -874935599, 411746438, 927604291, -424422151, 508052536, -671478538, 335026905, 596558312, -284920289,
00235     512766286, -882955583, 414387826, 926933782, -424885216, 512766286, -670100998, 333182045, 607525792, -291177811,
00236     517512534, -891080712, 417079474, 926349262, -425440318, 517512534, -668389789, 331157902, 618195914, -297363485,
00237     522293635, -899319903, 419828635, 925848177, -426083491, 522293635, -666333963, 328953368, 628572440, -303470012,
00238     527112032, -907682405, 422642886, 925427679, -426810526, 527112032, -663922286, 326567785, 638659631, -309490882,
00239     531970251, -916177781, 425530105, 925084675, -427617023, 531970251, -661143261, 324000998, 648462180, -315420352,
00240     536870912, -924815881, 428498454, 924815881, -428498454, 536870912, -657985147, 321253420, 657985147, -321253420,
00241     541816719, -933606817, 431556352, 924617870, -429450209, 541816719, -654435997, 318326093, 667233900, -326985786,
00242     546810467, -942560921, 434712438, 924487114, -430467639, 546810467, -650483688, 315220754, 676214053, -332613816,
00243     551855042, -951688708, 437975532, 924420027, -431546101, 551855042, -646115970, 311939896, 684931422, -338134495,
00244     556953421, -961000826, 441354588, 924413001, -432680993, 556953421, -641320513, 308486839, 693391970, -343545389,
00245     562108672, -970508005, 444858642, 924462435, -433867780, 562108672, -636084967, 304865786, 701601770, -348844597,
00246     567323959, -980220994, 448496743, 924564764, -435102022, 567323959, -630397020, 301081886, 709566963, -354030710,
00247     572602539, -990150500, 452277894, 924716482, -436379394, 572602539, -624244471, 297141281, 717293726, -359102767,
00248     577947763, -1000307125, 456210977, 924914158, -437695705, 577947763, -617615296, 293051155, 724788245, -364060214,
00249     583363084, -1010701292, 460304674, 925154455, -439046908, 583363084, -610497723, 288819761, 732056685, -368902865,
00250     387379495, -506912469, 196933274, 840112184, -347208270, 387379495, 506912469, 196933274, -840112184, -347208270,
00251     401658082, -532275898, 207149427, 833765363, -343175316, 401658082, 532275898, 207149427, -833765363, -343175316,
00252     416472483, -558722695, 217902617, 827270154, -339107319, 416472483, 558722695, 217902617, -827270154, -339107319,
00253     431841949, -586290861, 229212798, 820624988, -335007540, 431841949, 586290861, 229212798, -820624988, -335007540,
00254     447786335, -615019650, 241100489, 813828443, -330879528, 447786335, 615019650, 241100489, -813828443, -330879528,
00255     464326111, -644949597, 253586805, 806879270, -326727141, 464326111, 644949597, 253586805, -806879270, -326727141,
00256     481482377, -676122557, 266693475, 799776409, -322554559, 481482377, 676122557, 266693475, -799776409, -322554559,
00257     499276882, -708581728, 280442865, 792519013, -318366296, 499276882, 708581728, 280442865, -792519013, -318366296,
00258     517732032, -742371685, 294857996, 785106465, -314167221, 517732032, 742371685, 294857996, -785106465, -314167221,
00259     536870912, -777538408, 309962566, 777538408, -309962566, 536870912, 777538408, 309962566, -777538408, -309962566,
00260     556717294, -814129313, 325780968, 769814766, -305757943, 556717294, 814129313, 325780968, -769814766, -305757943,
00261     577295658, -852193284, 342338310, 761935777, -301559360, 577295658, 852193284, 342338310, -761935777, -301559360,
00262     598631206, -891780698, 359660433, 753902014, -297373230, 598631206, 891780698, 359660433, -753902014, -297373230,
00263     620749877, -932943463, 377773927, 745714425, -293206383, 620749877, 932943463, 377773927, -745714425, -293206383,
00264     643678365, -975735041, 396706151, 737374355, -289066077, 643678365, 975735041, 396706151, -737374355, -289066077,
00265     667444134, -1020210487, 416485252, 728883588, -284960004, 667444134, 1020210487, 416485252, -728883588, -284960004,
00266     692075438, -1066426476, 437140179, 720244375, -280896294, 692075438, 1066426476, 437140179, -720244375, -280896294,
00267     717601336, -1114441339, 458700704, 711459472, -276883515, 717601336, 1114441339, 458700704, -711459472, -276883515,
00268     744051710, -1164315096, 481197437, 702532174, -272930673, 744051710, 1164315096, 481197437, -702532174, -272930673
00269
00270 };
00271
00272 /* ----------------------------------------------------------------------
00273 ** Desired gains, in dB, per band
00274 ** ------------------------------------------------------------------- */
00275
00276 int gainDB[5] = {0, -3, 6, 4, -6};
00277
00278 float32_t snr;
00279
00280
00281 /* ----------------------------------------------------------------------
00282  * Graphic equalizer Example
00283  * ------------------------------------------------------------------- */
00284
00285 int32_t main(void)
00286 {
00287   float32_t  *inputF32, *outputF32;
00288   arm_biquad_cas_df1_32x64_ins_q31 S1;
00289   arm_biquad_cas_df1_32x64_ins_q31 S2;
00290   arm_biquad_casd_df1_inst_q31 S3;
00291   arm_biquad_casd_df1_inst_q31 S4;
00292   arm_biquad_casd_df1_inst_q31 S5;
00293   int i;
00294   int32_t status;
00295
00296   inputF32 = &testInput_f32[0];
00297   outputF32 = &testOutput[0];
00298
00299   /* Initialize the state and coefficient buffers for all Biquad sections */
00300
00301   arm_biquad_cas_df1_32x64_init_q31(&S1, NUMSTAGES,
00302                     (q31_t *) &coeffTable[190*0 + 10*(gainDB[0] + 9)],
00303                     &biquadStateBand1Q31[0], 2);
00304
00305   arm_biquad_cas_df1_32x64_init_q31(&S2, NUMSTAGES,
00306                     (q31_t *) &coeffTable[190*1 + 10*(gainDB[1] + 9)],
00307                     &biquadStateBand2Q31[0], 2);
00308
00309   arm_biquad_cascade_df1_init_q31(&S3, NUMSTAGES,
00310                   (q31_t *) &coeffTable[190*2 + 10*(gainDB[2] + 9)],
00311                   &biquadStateBand3Q31[0], 2);
00312
00313   arm_biquad_cascade_df1_init_q31(&S4, NUMSTAGES,
00314                   (q31_t *) &coeffTable[190*3 + 10*(gainDB[3] + 9)],
00315                   &biquadStateBand4Q31[0], 2);
00316
00317   arm_biquad_cascade_df1_init_q31(&S5, NUMSTAGES,
00318                   (q31_t *) &coeffTable[190*4 + 10*(gainDB[4] + 9)],
00319                   &biquadStateBand5Q31[0], 2);
00320
00321
00322   /* Call the process functions and needs to change filter coefficients
00323      for varying the gain of each band */
00324
00325   for(i=0; i < NUMBLOCKS; i++)
00326     {
00327
00328       /* ----------------------------------------------------------------------
00329       ** Convert block of input data from float to Q31
00330       ** ------------------------------------------------------------------- */
00331
00332       arm_float_to_q31(inputF32 + (i*BLOCKSIZE), inputQ31, BLOCKSIZE);
00333
00334       /* ----------------------------------------------------------------------
00335       ** Scale down by 1/8.  This provides additional headroom so that the
00336       ** graphic EQ can apply gain.
00337       ** ------------------------------------------------------------------- */
00338
00339       arm_scale_q31(inputQ31, 0x7FFFFFFF, -3, inputQ31, BLOCKSIZE);
00340
00341       /* ----------------------------------------------------------------------
00342       ** Call the Q31 Biquad Cascade DF1 32x64 process function for band1, band2
00343       ** ------------------------------------------------------------------- */
00344
00345       arm_biquad_cas_df1_32x64_q31(&S1, inputQ31, outputQ31, BLOCKSIZE);
00346       arm_biquad_cas_df1_32x64_q31(&S2, outputQ31, outputQ31, BLOCKSIZE);
00347
00348       /* ----------------------------------------------------------------------
00349       ** Call the Q31 Biquad Cascade DF1 process function for band3, band4, band5
00350       ** ------------------------------------------------------------------- */
00351
00352       arm_biquad_cascade_df1_q31(&S3, outputQ31, outputQ31, BLOCKSIZE);
00353       arm_biquad_cascade_df1_q31(&S4, outputQ31, outputQ31, BLOCKSIZE);
00354       arm_biquad_cascade_df1_q31(&S5, outputQ31, outputQ31, BLOCKSIZE);
00355
00356       /* ----------------------------------------------------------------------
00357       ** Convert Q31 result back to float
00358       ** ------------------------------------------------------------------- */
00359
00360       arm_q31_to_float(outputQ31, outputF32 + (i * BLOCKSIZE), BLOCKSIZE);
00361
00362       /* ----------------------------------------------------------------------
00363       ** Scale back up
00364       ** ------------------------------------------------------------------- */
00365
00366       arm_scale_f32(outputF32 + (i * BLOCKSIZE), 8.0f, outputF32 + (i * BLOCKSIZE), BLOCKSIZE);
00367     };
00368
00369     snr = arm_snr_f32(testRefOutput_f32, testOutput, TESTLENGTH);
00370
00371     if (snr < SNR_THRESHOLD_F32)
00372     {
00373         status = ARM_MATH_TEST_FAILURE;
00374     }
00375     else
00376     {
00377         status = ARM_MATH_SUCCESS;
00378     }
00379
00380   /* ----------------------------------------------------------------------
00381   ** Loop here if the signal does not match the reference output.
00382   ** ------------------------------------------------------------------- */
00383
00384   if( status != ARM_MATH_SUCCESS)
00385     {
00386       while(1);
00387     }
00388
00389
00390 }
00391
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CMSIS DSP Software Library: arm_iir_lattice_f32.c File Reference

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arm_iir_lattice_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_iir_lattice_f32 (const arm_iir_lattice_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_iir_lattice_f32.c Source File

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arm_iir_lattice_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_iir_lattice_f32.c
00009 *
00010 * Description:  Floating-point IIR Lattice filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00120 void arm_iir_lattice_f32(
00121   const arm_iir_lattice_instance_f32 * S,
00122   float32_t * pSrc,
00123   float32_t * pDst,
00124   uint32_t blockSize)
00125 {
00126   float32_t fcurr, fnext = 0, gcurr, gnext;      /* Temporary variables for lattice stages */
00127   float32_t acc;                                 /* Accumlator */
00128   uint32_t blkCnt, tapCnt;                       /* temporary variables for counts */
00129   float32_t *px1, *px2, *pk, *pv;                /* temporary pointers for state and coef */
00130   uint32_t numStages = S->numStages;             /* number of stages */
00131   float32_t *pState;                             /* State pointer */
00132   float32_t *pStateCurnt;                        /* State current pointer */
00133
00134
00135 #ifndef ARM_MATH_CM0
00136
00137   /* Run the below code for Cortex-M4 and Cortex-M3 */
00138
00139   gcurr = 0.0f;
00140   blkCnt = blockSize;
00141
00142   pState = &S->pState[0];
00143
00144   /* Sample processing */
00145   while(blkCnt > 0u)
00146   {
00147     /* Read Sample from input buffer */
00148     /* fN(n) = x(n) */
00149     fcurr = *pSrc++;
00150
00151     /* Initialize state read pointer */
00152     px1 = pState;
00153     /* Initialize state write pointer */
00154     px2 = pState;
00155     /* Set accumulator to zero */
00156     acc = 0.0f;
00157     /* Initialize Ladder coeff pointer */
00158     pv = &S->pvCoeffs[0];
00159     /* Initialize Reflection coeff pointer */
00160     pk = &S->pkCoeffs[0];
00161
00162
00163     /* Process sample for first tap */
00164     gcurr = *px1++;
00165     /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
00166     fnext = fcurr - ((*pk) * gcurr);
00167     /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
00168     gnext = (fnext * (*pk++)) + gcurr;
00169     /* write gN(n) into state for next sample processing */
00170     *px2++ = gnext;
00171     /* y(n) += gN(n) * vN  */
00172     acc += (gnext * (*pv++));
00173
00174     /* Update f values for next coefficient processing */
00175     fcurr = fnext;
00176
00177     /* Loop unrolling.  Process 4 taps at a time. */
00178     tapCnt = (numStages - 1u) >> 2;
00179
00180     while(tapCnt > 0u)
00181     {
00182       /* Process sample for 2nd, 6th ...taps */
00183       /* Read gN-2(n-1) from state buffer */
00184       gcurr = *px1++;
00185       /* Process sample for 2nd, 6th .. taps */
00186       /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
00187       fnext = fcurr - ((*pk) * gcurr);
00188       /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
00189       gnext = (fnext * (*pk++)) + gcurr;
00190       /* y(n) += gN-1(n) * vN-1  */
00191       /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
00192       acc += (gnext * (*pv++));
00193       /* write gN-1(n) into state for next sample processing */
00194       *px2++ = gnext;
00195
00196
00197       /* Process sample for 3nd, 7th ...taps */
00198       /* Read gN-3(n-1) from state buffer */
00199       gcurr = *px1++;
00200       /* Process sample for 3rd, 7th .. taps */
00201       /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
00202       fcurr = fnext - ((*pk) * gcurr);
00203       /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
00204       gnext = (fcurr * (*pk++)) + gcurr;
00205       /* y(n) += gN-2(n) * vN-2  */
00206       /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
00207       acc += (gnext * (*pv++));
00208       /* write gN-2(n) into state for next sample processing */
00209       *px2++ = gnext;
00210
00211
00212       /* Process sample for 4th, 8th ...taps */
00213       /* Read gN-4(n-1) from state buffer */
00214       gcurr = *px1++;
00215       /* Process sample for 4th, 8th .. taps */
00216       /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
00217       fnext = fcurr - ((*pk) * gcurr);
00218       /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
00219       gnext = (fnext * (*pk++)) + gcurr;
00220       /* y(n) += gN-3(n) * vN-3  */
00221       /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
00222       acc += (gnext * (*pv++));
00223       /* write gN-3(n) into state for next sample processing */
00224       *px2++ = gnext;
00225
00226
00227       /* Process sample for 5th, 9th ...taps */
00228       /* Read gN-5(n-1) from state buffer */
00229       gcurr = *px1++;
00230       /* Process sample for 5th, 9th .. taps */
00231       /* fN-5(n) = fN-4(n) - kN-4 * gN-1(n-1) */
00232       fcurr = fnext - ((*pk) * gcurr);
00233       /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
00234       gnext = (fcurr * (*pk++)) + gcurr;
00235       /* y(n) += gN-4(n) * vN-4  */
00236       /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
00237       acc += (gnext * (*pv++));
00238       /* write gN-4(n) into state for next sample processing */
00239       *px2++ = gnext;
00240
00241       tapCnt--;
00242
00243     }
00244
00245     fnext = fcurr;
00246
00247     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00248     tapCnt = (numStages - 1u) % 0x4u;
00249
00250     while(tapCnt > 0u)
00251     {
00252       gcurr = *px1++;
00253       /* Process sample for last taps */
00254       fnext = fcurr - ((*pk) * gcurr);
00255       gnext = (fnext * (*pk++)) + gcurr;
00256       /* Output samples for last taps */
00257       acc += (gnext * (*pv++));
00258       *px2++ = gnext;
00259       fcurr = fnext;
00260
00261       tapCnt--;
00262
00263     }
00264
00265
00266     /* y(n) += g0(n) * v0 */
00267     acc += (fnext * (*pv));
00268
00269     *px2++ = fnext;
00270
00271     /* write out into pDst */
00272     *pDst++ = acc;
00273
00274     /* Advance the state pointer by 4 to process the next group of 4 samples */
00275     pState = pState + 1u;
00276     blkCnt--;
00277
00278   }
00279
00280   /* Processing is complete. Now copy last S->numStages samples to start of the buffer
00281      for the preperation of next frame process */
00282
00283   /* Points to the start of the state buffer */
00284   pStateCurnt = &S->pState[0];
00285   pState = &S->pState[blockSize];
00286
00287   tapCnt = numStages >> 2u;
00288
00289   /* copy data */
00290   while(tapCnt > 0u)
00291   {
00292     *pStateCurnt++ = *pState++;
00293     *pStateCurnt++ = *pState++;
00294     *pStateCurnt++ = *pState++;
00295     *pStateCurnt++ = *pState++;
00296
00297     /* Decrement the loop counter */
00298     tapCnt--;
00299
00300   }
00301
00302   /* Calculate remaining number of copies */
00303   tapCnt = (numStages) % 0x4u;
00304
00305   /* Copy the remaining q31_t data */
00306   while(tapCnt > 0u)
00307   {
00308     *pStateCurnt++ = *pState++;
00309
00310     /* Decrement the loop counter */
00311     tapCnt--;
00312   }
00313
00314 #else
00315
00316   /* Run the below code for Cortex-M0 */
00317
00318   blkCnt = blockSize;
00319
00320   pState = &S->pState[0];
00321
00322   /* Sample processing */
00323   while(blkCnt > 0u)
00324   {
00325     /* Read Sample from input buffer */
00326     /* fN(n) = x(n) */
00327     fcurr = *pSrc++;
00328
00329     /* Initialize state read pointer */
00330     px1 = pState;
00331     /* Initialize state write pointer */
00332     px2 = pState;
00333     /* Set accumulator to zero */
00334     acc = 0.0f;
00335     /* Initialize Ladder coeff pointer */
00336     pv = &S->pvCoeffs[0];
00337     /* Initialize Reflection coeff pointer */
00338     pk = &S->pkCoeffs[0];
00339
00340
00341     /* Process sample for numStages */
00342     tapCnt = numStages;
00343
00344     while(tapCnt > 0u)
00345     {
00346       gcurr = *px1++;
00347       /* Process sample for last taps */
00348       fnext = fcurr - ((*pk) * gcurr);
00349       gnext = (fnext * (*pk++)) + gcurr;
00350
00351       /* Output samples for last taps */
00352       acc += (gnext * (*pv++));
00353       *px2++ = gnext;
00354       fcurr = fnext;
00355
00356       /* Decrementing loop counter */
00357       tapCnt--;
00358
00359     }
00360
00361     /* y(n) += g0(n) * v0 */
00362     acc += (fnext * (*pv));
00363
00364     *px2++ = fnext;
00365
00366     /* write out into pDst */
00367     *pDst++ = acc;
00368
00369     /* Advance the state pointer by 1 to process the next group of samples */
00370     pState = pState + 1u;
00371     blkCnt--;
00372
00373   }
00374
00375   /* Processing is complete. Now copy last S->numStages samples to start of the buffer
00376      for the preperation of next frame process */
00377
00378   /* Points to the start of the state buffer */
00379   pStateCurnt = &S->pState[0];
00380   pState = &S->pState[blockSize];
00381
00382   tapCnt = numStages;
00383
00384   /* Copy the data */
00385   while(tapCnt > 0u)
00386   {
00387     *pStateCurnt++ = *pState++;
00388
00389     /* Decrement the loop counter */
00390     tapCnt--;
00391   }
00392
00393 #endif /*   #ifndef ARM_MATH_CM0 */
00394
00395 }
00396
00397
00398
00399
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CMSIS DSP Software Library: arm_iir_lattice_init_f32.c File Reference

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arm_iir_lattice_init_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_iir_lattice_init_f32 (arm_iir_lattice_instance_f32 *S, uint16_t numStages, float32_t *pkCoeffs, float32_t *pvCoeffs, float32_t *pState, uint32_t blockSize)
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CMSIS DSP Software Library: arm_iir_lattice_init_f32.c Source File

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arm_iir_lattice_init_f32.c

Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_iir_lattice_init_f32.c
00009 *
00010 * Description:  Floating-point IIR lattice filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00055 void arm_iir_lattice_init_f32(
00056   arm_iir_lattice_instance_f32 * S,
00057   uint16_t numStages,
00058   float32_t * pkCoeffs,
00059   float32_t * pvCoeffs,
00060   float32_t * pState,
00061   uint32_t blockSize)
00062 {
00063   /* Assign filter taps */
00064   S->numStages = numStages;
00065
00066   /* Assign reflection coefficient pointer */
00067   S->pkCoeffs = pkCoeffs;
00068
00069   /* Assign ladder coefficient pointer */
00070   S->pvCoeffs = pvCoeffs;
00071
00072   /* Clear state buffer and size is always blockSize + numStages */
00073   memset(pState, 0, (numStages + blockSize) * sizeof(float32_t));
00074
00075   /* Assign state pointer */
00076   S->pState = pState;
00077
00078
00079 }
00080
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CMSIS DSP Software Library: arm_iir_lattice_init_q15.c File Reference

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Functions

arm_iir_lattice_init_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_iir_lattice_init_q15 (arm_iir_lattice_instance_q15 *S, uint16_t numStages, q15_t *pkCoeffs, q15_t *pvCoeffs, q15_t *pState, uint32_t blockSize)
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CMSIS DSP Software Library: arm_iir_lattice_init_q15.c Source File

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arm_iir_lattice_init_q15.c

Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_iir_lattice_init_q15.c
00009 *
00010 * Description:  Q15 IIR lattice filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00055 void arm_iir_lattice_init_q15(
00056   arm_iir_lattice_instance_q15 * S,
00057   uint16_t numStages,
00058   q15_t * pkCoeffs,
00059   q15_t * pvCoeffs,
00060   q15_t * pState,
00061   uint32_t blockSize)
00062 {
00063   /* Assign filter taps */
00064   S->numStages = numStages;
00065
00066   /* Assign reflection coefficient pointer */
00067   S->pkCoeffs = pkCoeffs;
00068
00069   /* Assign ladder coefficient pointer */
00070   S->pvCoeffs = pvCoeffs;
00071
00072   /* Clear state buffer and size is always blockSize + numStages */
00073   memset(pState, 0, (numStages + blockSize) * sizeof(q15_t));
00074
00075   /* Assign state pointer */
00076   S->pState = pState;
00077
00078
00079 }
00080
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CMSIS DSP Software Library: arm_iir_lattice_init_q31.c File Reference

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Functions

arm_iir_lattice_init_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_iir_lattice_init_q31 (arm_iir_lattice_instance_q31 *S, uint16_t numStages, q31_t *pkCoeffs, q31_t *pvCoeffs, q31_t *pState, uint32_t blockSize)
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CMSIS DSP Software Library: arm_iir_lattice_init_q31.c Source File

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arm_iir_lattice_init_q31.c

Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_iir_lattice_init_q31.c
00009 *
00010 * Description:  Initialization function for the Q31 IIR lattice filter.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00055 void arm_iir_lattice_init_q31(
00056   arm_iir_lattice_instance_q31 * S,
00057   uint16_t numStages,
00058   q31_t * pkCoeffs,
00059   q31_t * pvCoeffs,
00060   q31_t * pState,
00061   uint32_t blockSize)
00062 {
00063   /* Assign filter taps */
00064   S->numStages = numStages;
00065
00066   /* Assign reflection coefficient pointer */
00067   S->pkCoeffs = pkCoeffs;
00068
00069   /* Assign ladder coefficient pointer */
00070   S->pvCoeffs = pvCoeffs;
00071
00072   /* Clear state buffer and size is always blockSize + numStages */
00073   memset(pState, 0, (numStages + blockSize) * sizeof(q31_t));
00074
00075   /* Assign state pointer */
00076   S->pState = pState;
00077
00078
00079 }
00080
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CMSIS DSP Software Library: arm_iir_lattice_q15.c File Reference

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Functions

arm_iir_lattice_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_iir_lattice_q15 (const arm_iir_lattice_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_iir_lattice_q15.c Source File

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arm_iir_lattice_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_iir_lattice_q15.c
00009 *
00010 * Description:  Q15 IIR lattice filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00063 void arm_iir_lattice_q15(
00064   const arm_iir_lattice_instance_q15 * S,
00065   q15_t * pSrc,
00066   q15_t * pDst,
00067   uint32_t blockSize)
00068 {
00069
00070
00071 #ifndef ARM_MATH_CM0
00072
00073   /* Run the below code for Cortex-M4 and Cortex-M3 */
00074
00075   q31_t fcurr, fnext, gcurr = 0, gnext;          /* Temporary variables for lattice stages */
00076   q15_t gnext1, gnext2;                          /* Temporary variables for lattice stages */
00077   uint32_t stgCnt;                               /* Temporary variables for counts */
00078   q63_t acc;                                     /* Accumlator */
00079   uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
00080   q15_t *px1, *px2, *pk, *pv;                    /* temporary pointers for state and coef */
00081   uint32_t numStages = S->numStages;             /* number of stages */
00082   q15_t *pState;                                 /* State pointer */
00083   q15_t *pStateCurnt;                            /* State current pointer */
00084   q15_t out;                                     /* Temporary variable for output */
00085   q31_t v;                                       /* Temporary variable for ladder coefficient */
00086
00087
00088   blkCnt = blockSize;
00089
00090   pState = &S->pState[0];
00091
00092   /* Sample processing */
00093   while(blkCnt > 0u)
00094   {
00095     /* Read Sample from input buffer */
00096     /* fN(n) = x(n) */
00097     fcurr = *pSrc++;
00098
00099     /* Initialize state read pointer */
00100     px1 = pState;
00101     /* Initialize state write pointer */
00102     px2 = pState;
00103     /* Set accumulator to zero */
00104     acc = 0;
00105     /* Initialize Ladder coeff pointer */
00106     pv = &S->pvCoeffs[0];
00107     /* Initialize Reflection coeff pointer */
00108     pk = &S->pkCoeffs[0];
00109
00110
00111     /* Process sample for first tap */
00112     gcurr = *px1++;
00113     /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
00114     fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
00115     fnext = __SSAT(fnext, 16);
00116     /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
00117     gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
00118     gnext = __SSAT(gnext, 16);
00119     /* write gN(n) into state for next sample processing */
00120     *px2++ = (q15_t) gnext;
00121     /* y(n) += gN(n) * vN  */
00122     acc += (q31_t) ((gnext * (*pv++)));
00123
00124
00125     /* Update f values for next coefficient processing */
00126     fcurr = fnext;
00127
00128     /* Loop unrolling.  Process 4 taps at a time. */
00129     tapCnt = (numStages - 1u) >> 2;
00130
00131     while(tapCnt > 0u)
00132     {
00133
00134       /* Process sample for 2nd, 6th ...taps */
00135       /* Read gN-2(n-1) from state buffer */
00136       gcurr = *px1++;
00137       /* Process sample for 2nd, 6th .. taps */
00138       /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
00139       fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
00140       fnext = __SSAT(fnext, 16);
00141       /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
00142       gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
00143       gnext1 = (q15_t) __SSAT(gnext, 16);
00144       /* write gN-1(n) into state */
00145       *px2++ = (q15_t) gnext1;
00146
00147
00148       /* Process sample for 3nd, 7th ...taps */
00149       /* Read gN-3(n-1) from state */
00150       gcurr = *px1++;
00151       /* Process sample for 3rd, 7th .. taps */
00152       /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
00153       fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15);
00154       fcurr = __SSAT(fcurr, 16);
00155       /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
00156       gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr;
00157       gnext2 = (q15_t) __SSAT(gnext, 16);
00158       /* write gN-2(n) into state */
00159       *px2++ = (q15_t) gnext2;
00160
00161       /* Read vN-1 and vN-2 at a time */
00162       v = *__SIMD32(pv)++;
00163
00164
00165       /* Pack gN-1(n) and gN-2(n) */
00166
00167 #ifndef  ARM_MATH_BIG_ENDIAN
00168
00169       gnext = __PKHBT(gnext1, gnext2, 16);
00170
00171 #else
00172
00173       gnext = __PKHBT(gnext2, gnext1, 16);
00174
00175 #endif /*   #ifndef  ARM_MATH_BIG_ENDIAN    */
00176
00177       /* y(n) += gN-1(n) * vN-1  */
00178       /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
00179       /* y(n) += gN-2(n) * vN-2  */
00180       /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
00181       acc = __SMLALD(gnext, v, acc);
00182
00183
00184       /* Process sample for 4th, 8th ...taps */
00185       /* Read gN-4(n-1) from state */
00186       gcurr = *px1++;
00187       /* Process sample for 4th, 8th .. taps */
00188       /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
00189       fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
00190       fnext = __SSAT(fnext, 16);
00191       /* gN-3(n) = kN-3 * fN-1(n) + gN-1(n-1) */
00192       gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
00193       gnext1 = (q15_t) __SSAT(gnext, 16);
00194       /* write  gN-3(n) for the next sample process */
00195       *px2++ = (q15_t) gnext1;
00196
00197
00198       /* Process sample for 5th, 9th ...taps */
00199       /* Read gN-5(n-1) from state */
00200       gcurr = *px1++;
00201       /* Process sample for 5th, 9th .. taps */
00202       /* fN-5(n) = fN-4(n) - kN-4 * gN-5(n-1) */
00203       fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15);
00204       fcurr = __SSAT(fcurr, 16);
00205       /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
00206       gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr;
00207       gnext2 = (q15_t) __SSAT(gnext, 16);
00208       /* write      gN-4(n) for the next sample process */
00209       *px2++ = (q15_t) gnext2;
00210
00211       /* Read vN-3 and vN-4 at a time */
00212       v = *__SIMD32(pv)++;
00213
00214       /* Pack gN-3(n) and gN-4(n) */
00215 #ifndef  ARM_MATH_BIG_ENDIAN
00216
00217       gnext = __PKHBT(gnext1, gnext2, 16);
00218
00219 #else
00220
00221       gnext = __PKHBT(gnext2, gnext1, 16);
00222
00223 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00224
00225       /* y(n) += gN-4(n) * vN-4  */
00226       /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
00227       /* y(n) += gN-3(n) * vN-3  */
00228       /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
00229       acc = __SMLALD(gnext, v, acc);
00230
00231       tapCnt--;
00232
00233     }
00234
00235     fnext = fcurr;
00236
00237     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00238     tapCnt = (numStages - 1u) % 0x4u;
00239
00240     while(tapCnt > 0u)
00241     {
00242       gcurr = *px1++;
00243       /* Process sample for last taps */
00244       fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
00245       fnext = __SSAT(fnext, 16);
00246       gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
00247       gnext = __SSAT(gnext, 16);
00248       /* Output samples for last taps */
00249       acc += (q31_t) (((q31_t) gnext * (*pv++)));
00250       *px2++ = (q15_t) gnext;
00251       fcurr = fnext;
00252
00253       tapCnt--;
00254     }
00255
00256     /* y(n) += g0(n) * v0 */
00257     acc += (q31_t) (((q31_t) fnext * (*pv++)));
00258
00259     out = (q15_t) __SSAT(acc >> 15, 16);
00260     *px2++ = (q15_t) fnext;
00261
00262     /* write out into pDst */
00263     *pDst++ = out;
00264
00265     /* Advance the state pointer by 4 to process the next group of 4 samples */
00266     pState = pState + 1u;
00267     blkCnt--;
00268
00269   }
00270
00271   /* Processing is complete. Now copy last S->numStages samples to start of the buffer
00272      for the preperation of next frame process */
00273   /* Points to the start of the state buffer */
00274   pStateCurnt = &S->pState[0];
00275   pState = &S->pState[blockSize];
00276
00277   stgCnt = (numStages >> 2u);
00278
00279   /* copy data */
00280   while(stgCnt > 0u)
00281   {
00282     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00283     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00284
00285     /* Decrement the loop counter */
00286     stgCnt--;
00287
00288   }
00289
00290   /* Calculation of count for remaining q15_t data */
00291   stgCnt = (numStages) % 0x4u;
00292
00293   /* copy data */
00294   while(stgCnt > 0u)
00295   {
00296     *pStateCurnt++ = *pState++;
00297
00298     /* Decrement the loop counter */
00299     stgCnt--;
00300   }
00301
00302 #else
00303
00304   /* Run the below code for Cortex-M0 */
00305
00306   q31_t fcurr, fnext = 0, gcurr = 0, gnext;      /* Temporary variables for lattice stages */
00307   uint32_t stgCnt;                               /* Temporary variables for counts */
00308   q63_t acc;                                     /* Accumlator */
00309   uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
00310   q15_t *px1, *px2, *pk, *pv;                    /* temporary pointers for state and coef */
00311   uint32_t numStages = S->numStages;             /* number of stages */
00312   q15_t *pState;                                 /* State pointer */
00313   q15_t *pStateCurnt;                            /* State current pointer */
00314   q15_t out;                                     /* Temporary variable for output */
00315
00316
00317   blkCnt = blockSize;
00318
00319   pState = &S->pState[0];
00320
00321   /* Sample processing */
00322   while(blkCnt > 0u)
00323   {
00324     /* Read Sample from input buffer */
00325     /* fN(n) = x(n) */
00326     fcurr = *pSrc++;
00327
00328     /* Initialize state read pointer */
00329     px1 = pState;
00330     /* Initialize state write pointer */
00331     px2 = pState;
00332     /* Set accumulator to zero */
00333     acc = 0;
00334     /* Initialize Ladder coeff pointer */
00335     pv = &S->pvCoeffs[0];
00336     /* Initialize Reflection coeff pointer */
00337     pk = &S->pkCoeffs[0];
00338
00339     tapCnt = numStages;
00340
00341     while(tapCnt > 0u)
00342     {
00343       gcurr = *px1++;
00344       /* Process sample */
00345       /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
00346       fnext = fcurr - ((gcurr * (*pk)) >> 15);
00347       fnext = __SSAT(fnext, 16);
00348       /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
00349       gnext = ((fnext * (*pk++)) >> 15) + gcurr;
00350       gnext = __SSAT(gnext, 16);
00351       /* Output samples */
00352       /* y(n) += gN(n) * vN */
00353       acc += (q31_t) ((gnext * (*pv++)));
00354       /* write gN(n) into state for next sample processing */
00355       *px2++ = (q15_t) gnext;
00356       /* Update f values for next coefficient processing */
00357       fcurr = fnext;
00358
00359       tapCnt--;
00360     }
00361
00362     /* y(n) += g0(n) * v0 */
00363     acc += (q31_t) ((fnext * (*pv++)));
00364
00365     out = (q15_t) __SSAT(acc >> 15, 16);
00366     *px2++ = (q15_t) fnext;
00367
00368     /* write out into pDst */
00369     *pDst++ = out;
00370
00371     /* Advance the state pointer by 1 to process the next group of samples */
00372     pState = pState + 1u;
00373     blkCnt--;
00374
00375   }
00376
00377   /* Processing is complete. Now copy last S->numStages samples to start of the buffer
00378      for the preperation of next frame process */
00379   /* Points to the start of the state buffer */
00380   pStateCurnt = &S->pState[0];
00381   pState = &S->pState[blockSize];
00382
00383   stgCnt = numStages;
00384
00385   /* copy data */
00386   while(stgCnt > 0u)
00387   {
00388     *pStateCurnt++ = *pState++;
00389
00390     /* Decrement the loop counter */
00391     stgCnt--;
00392   }
00393
00394 #endif /*   #ifndef ARM_MATH_CM0 */
00395
00396 }
00397
00398
00399
00400
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CMSIS DSP Software Library: arm_iir_lattice_q31.c File Reference

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arm_iir_lattice_q31.c File Reference

#include "arm_math.h"

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void arm_iir_lattice_q31 (const arm_iir_lattice_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_iir_lattice_q31.c Source File

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arm_iir_lattice_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_iir_lattice_q31.c
00009 *
00010 * Description:  Q31 IIR lattice filter processing function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00062 void arm_iir_lattice_q31(
00063   const arm_iir_lattice_instance_q31 * S,
00064   q31_t * pSrc,
00065   q31_t * pDst,
00066   uint32_t blockSize)
00067 {
00068   q31_t fcurr, fnext = 0, gcurr = 0, gnext;      /* Temporary variables for lattice stages */
00069   q63_t acc;                                     /* Accumlator */
00070   uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
00071   q31_t *px1, *px2, *pk, *pv;                    /* Temporary pointers for state and coef */
00072   uint32_t numStages = S->numStages;             /* number of stages */
00073   q31_t *pState;                                 /* State pointer */
00074   q31_t *pStateCurnt;                            /* State current pointer */
00075
00076   blkCnt = blockSize;
00077
00078   pState = &S->pState[0];
00079
00080
00081 #ifndef ARM_MATH_CM0
00082
00083   /* Run the below code for Cortex-M4 and Cortex-M3 */
00084
00085   /* Sample processing */
00086   while(blkCnt > 0u)
00087   {
00088     /* Read Sample from input buffer */
00089     /* fN(n) = x(n) */
00090     fcurr = *pSrc++;
00091
00092     /* Initialize state read pointer */
00093     px1 = pState;
00094     /* Initialize state write pointer */
00095     px2 = pState;
00096     /* Set accumulator to zero */
00097     acc = 0;
00098     /* Initialize Ladder coeff pointer */
00099     pv = &S->pvCoeffs[0];
00100     /* Initialize Reflection coeff pointer */
00101     pk = &S->pkCoeffs[0];
00102
00103
00104     /* Process sample for first tap */
00105     gcurr = *px1++;
00106     /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
00107     fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
00108     /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
00109     gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
00110     /* write gN-1(n-1) into state for next sample processing */
00111     *px2++ = gnext;
00112     /* y(n) += gN(n) * vN  */
00113     acc += ((q63_t) gnext * *pv++);
00114
00115     /* Update f values for next coefficient processing */
00116     fcurr = fnext;
00117
00118     /* Loop unrolling.  Process 4 taps at a time. */
00119     tapCnt = (numStages - 1u) >> 2;
00120
00121     while(tapCnt > 0u)
00122     {
00123
00124       /* Process sample for 2nd, 6th .. taps */
00125       /* Read gN-2(n-1) from state buffer */
00126       gcurr = *px1++;
00127       /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
00128       fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
00129       /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
00130       gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
00131       /* y(n) += gN-1(n) * vN-1  */
00132       /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
00133       acc += ((q63_t) gnext * *pv++);
00134       /* write gN-1(n) into state for next sample processing */
00135       *px2++ = gnext;
00136
00137       /* Process sample for 3nd, 7th ...taps */
00138       /* Read gN-3(n-1) from state buffer */
00139       gcurr = *px1++;
00140       /* Process sample for 3rd, 7th .. taps */
00141       /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
00142       fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
00143       /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
00144       gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
00145       /* y(n) += gN-2(n) * vN-2  */
00146       /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
00147       acc += ((q63_t) gnext * *pv++);
00148       /* write gN-2(n) into state for next sample processing */
00149       *px2++ = gnext;
00150
00151
00152       /* Process sample for 4th, 8th ...taps */
00153       /* Read gN-4(n-1) from state buffer */
00154       gcurr = *px1++;
00155       /* Process sample for 4th, 8th .. taps */
00156       /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
00157       fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
00158       /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
00159       gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
00160       /* y(n) += gN-3(n) * vN-3  */
00161       /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
00162       acc += ((q63_t) gnext * *pv++);
00163       /* write gN-3(n) into state for next sample processing */
00164       *px2++ = gnext;
00165
00166
00167       /* Process sample for 5th, 9th ...taps */
00168       /* Read gN-5(n-1) from state buffer */
00169       gcurr = *px1++;
00170       /* Process sample for 5th, 9th .. taps */
00171       /* fN-5(n) = fN-4(n) - kN-4 * gN-1(n-1) */
00172       fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
00173       /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
00174       gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
00175       /* y(n) += gN-4(n) * vN-4  */
00176       /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
00177       acc += ((q63_t) gnext * *pv++);
00178       /* write gN-4(n) into state for next sample processing */
00179       *px2++ = gnext;
00180
00181       tapCnt--;
00182
00183     }
00184
00185     fnext = fcurr;
00186
00187     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00188     tapCnt = (numStages - 1u) % 0x4u;
00189
00190     while(tapCnt > 0u)
00191     {
00192       gcurr = *px1++;
00193       /* Process sample for last taps */
00194       fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
00195       gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
00196       /* Output samples for last taps */
00197       acc += ((q63_t) gnext * *pv++);
00198       *px2++ = gnext;
00199       fcurr = fnext;
00200
00201       tapCnt--;
00202
00203     }
00204
00205     /* y(n) += g0(n) * v0 */
00206     acc += (q63_t) fnext *(
00207   *pv++);
00208
00209     *px2++ = fnext;
00210
00211     /* write out into pDst */
00212     *pDst++ = (q31_t) (acc >> 31u);
00213
00214     /* Advance the state pointer by 4 to process the next group of 4 samples */
00215     pState = pState + 1u;
00216     blkCnt--;
00217
00218   }
00219
00220   /* Processing is complete. Now copy last S->numStages samples to start of the buffer
00221      for the preperation of next frame process */
00222
00223   /* Points to the start of the state buffer */
00224   pStateCurnt = &S->pState[0];
00225   pState = &S->pState[blockSize];
00226
00227   tapCnt = numStages >> 2u;
00228
00229   /* copy data */
00230   while(tapCnt > 0u)
00231   {
00232     *pStateCurnt++ = *pState++;
00233     *pStateCurnt++ = *pState++;
00234     *pStateCurnt++ = *pState++;
00235     *pStateCurnt++ = *pState++;
00236
00237     /* Decrement the loop counter */
00238     tapCnt--;
00239
00240   }
00241
00242   /* Calculate remaining number of copies */
00243   tapCnt = (numStages) % 0x4u;
00244
00245   /* Copy the remaining q31_t data */
00246   while(tapCnt > 0u)
00247   {
00248     *pStateCurnt++ = *pState++;
00249
00250     /* Decrement the loop counter */
00251     tapCnt--;
00252   };
00253
00254 #else
00255
00256   /* Run the below code for Cortex-M0 */
00257   /* Sample processing */
00258   while(blkCnt > 0u)
00259   {
00260     /* Read Sample from input buffer */
00261     /* fN(n) = x(n) */
00262     fcurr = *pSrc++;
00263
00264     /* Initialize state read pointer */
00265     px1 = pState;
00266     /* Initialize state write pointer */
00267     px2 = pState;
00268     /* Set accumulator to zero */
00269     acc = 0;
00270     /* Initialize Ladder coeff pointer */
00271     pv = &S->pvCoeffs[0];
00272     /* Initialize Reflection coeff pointer */
00273     pk = &S->pkCoeffs[0];
00274
00275     tapCnt = numStages;
00276
00277     while(tapCnt > 0u)
00278     {
00279       gcurr = *px1++;
00280       /* Process sample */
00281       /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
00282       fnext =
00283         clip_q63_to_q31(((q63_t) fcurr -
00284                          ((q31_t) (((q63_t) gcurr * (*pk)) >> 31))));
00285       /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
00286       gnext =
00287         clip_q63_to_q31(((q63_t) gcurr +
00288                          ((q31_t) (((q63_t) fnext * (*pk++)) >> 31))));
00289       /* Output samples */
00290       /* y(n) += gN(n) * vN  */
00291       acc += ((q63_t) gnext * *pv++);
00292       /* write gN-1(n-1) into state for next sample processing */
00293       *px2++ = gnext;
00294       /* Update f values for next coefficient processing */
00295       fcurr = fnext;
00296
00297       tapCnt--;
00298     }
00299
00300     /* y(n) += g0(n) * v0 */
00301     acc += (q63_t) fnext *(
00302   *pv++);
00303
00304     *px2++ = fnext;
00305
00306     /* write out into pDst */
00307     *pDst++ = (q31_t) (acc >> 31u);
00308
00309     /* Advance the state pointer by 1 to process the next group of samples */
00310     pState = pState + 1u;
00311     blkCnt--;
00312
00313   }
00314
00315   /* Processing is complete. Now copy last S->numStages samples to start of the buffer
00316      for the preperation of next frame process */
00317
00318   /* Points to the start of the state buffer */
00319   pStateCurnt = &S->pState[0];
00320   pState = &S->pState[blockSize];
00321
00322   tapCnt = numStages;
00323
00324   /* Copy the remaining q31_t data */
00325   while(tapCnt > 0u)
00326   {
00327     *pStateCurnt++ = *pState++;
00328
00329     /* Decrement the loop counter */
00330     tapCnt--;
00331   }
00332
00333 #endif /*   #ifndef ARM_MATH_CM0 */
00334
00335 }
00336
00337
00338
00339
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CMSIS DSP Software Library: arm_linear_interp_example_f32.c File Reference

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Defines | Functions | Variables

arm_linear_interp_example_f32.c File Reference

#include "arm_math.h"
#include "math_helper.h"

Go to the source code of this file.

Defines

#define | SNR_THRESHOLD 90
#define | TEST_LENGTH_SAMPLES 10
#define | XSPACING (0.00005f)

Functions

int32_t | main (void)

Variables

float32_t | testInputSin_f32 [TEST_LENGTH_SAMPLES]
float32_t | testRefSinOutput32_f32 [TEST_LENGTH_SAMPLES]
float32_t | testOutput [TEST_LENGTH_SAMPLES]
float32_t | testLinIntOutput [TEST_LENGTH_SAMPLES]
float32_t | arm_linear_interep_table [188495]
float32_t snr1
float32_t snr2

Define Documentation

#define SNR_THRESHOLD 90

Definition at line 73 of file arm_linear_interp_example_f32.c.

#define TEST_LENGTH_SAMPLES 10

Definition at line 74 of file arm_linear_interp_example_f32.c.

#define XSPACING (0.00005f)
Examples:
arm_linear_interp_example_f32.c.

Definition at line 75 of file arm_linear_interp_example_f32.c.

Function Documentation

int32_t main ( void )

Definition at line 123 of file arm_linear_interp_example_f32.c.

Variable Documentation

float32_t testInputSin_f32[TEST_LENGTH_SAMPLES]
Initial value:

{
    -0.649716504673081170,  -2.501723745497831200,  0.188250329003310100,   0.432092748487532540,   -1.722010988459680800,  1.788766476323060600,   1.786136060975809500,   -0.056525543169408797,
    0.491596272728153760,   0.262309671126153390
}
Examples:
arm_linear_interp_example_f32.c.

Definition at line 83 of file arm_linear_interp_example_f32.c.

float32_t testRefSinOutput32_f32[TEST_LENGTH_SAMPLES]
Initial value:

{
    -0.604960695383043530,  -0.597090287967934840,  0.187140422442966500,   0.418772124875992690,   -0.988588831792106880,  0.976338412038794010,   0.976903856413481100,   -0.056495446835214236,
    0.472033731854734240,   0.259311907228582830
}
Examples:
arm_linear_interp_example_f32.c.

Definition at line 93 of file arm_linear_interp_example_f32.c.

float32_t testOutput[TEST_LENGTH_SAMPLES]

Definition at line 102 of file arm_linear_interp_example_f32.c.

float32_t testLinIntOutput[TEST_LENGTH_SAMPLES]
Examples:
arm_linear_interp_example_f32.c.

Definition at line 107 of file arm_linear_interp_example_f32.c.

float32_t arm_linear_interep_table[188495]
Examples:
arm_linear_interp_example_f32.c.
float32_t snr1
Examples:
arm_linear_interp_example_f32.c.

Definition at line 117 of file arm_linear_interp_example_f32.c.

float32_t snr2
Examples:
arm_linear_interp_example_f32.c.

Definition at line 118 of file arm_linear_interp_example_f32.c.

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CMSIS DSP Software Library: arm_linear_interp_example_f32.c Source File

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arm_linear_interp_example_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        29. November 2010
00005 * $Revision:    V1.0.3
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_linear_interp_example_f32.c
00009 *
00010 * Description:  Example code demonstrating usage of sin function
00011 *               and uses linear interpolation to get higher precision
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3
00014 *
00015 *
00016 * Version 1.0.3 2010/11/29
00017 *    Re-organized the CMSIS folders and updated documentation.
00018 *
00019 * Version 1.0.1 2010/10/05 KK
00020 *    Production release and review comments incorporated.
00021 *
00022 * Version 1.0.0 2010/09/20 KK
00023 *    Production release and review comments incorporated.
00024 * ------------------------------------------------------------------- */
00025
00070 #include "arm_math.h"
00071 #include "math_helper.h"
00072
00073 #define SNR_THRESHOLD           90
00074 #define TEST_LENGTH_SAMPLES     10
00075 #define XSPACING                (0.00005f)
00076
00077 /* ----------------------------------------------------------------------
00078 * Test input data for F32 SIN function
00079 * Generated by the MATLAB rand() function
00080 * randn('state', 0)
00081 * xi = (((1/4.18318581819710)* randn(blockSize, 1) * 2* pi));
00082 * --------------------------------------------------------------------*/
00083 float32_t testInputSin_f32[TEST_LENGTH_SAMPLES] =
00084 {
00085     -0.649716504673081170,  -2.501723745497831200,  0.188250329003310100,   0.432092748487532540,   -1.722010988459680800,  1.788766476323060600,   1.786136060975809500,   -0.056525543169408797,
00086     0.491596272728153760,   0.262309671126153390
00087 };
00088
00089 /*------------------------------------------------------------------------------
00090 *  Reference out of SIN F32 function for Block Size = 10
00091 *  Calculated from sin(testInputSin_f32)
00092 *------------------------------------------------------------------------------*/
00093 float32_t testRefSinOutput32_f32[TEST_LENGTH_SAMPLES] =
00094 {
00095     -0.604960695383043530,  -0.597090287967934840,  0.187140422442966500,   0.418772124875992690,   -0.988588831792106880,  0.976338412038794010,   0.976903856413481100,   -0.056495446835214236,
00096     0.472033731854734240,   0.259311907228582830
00097 };
00098
00099 /*------------------------------------------------------------------------------
00100 *  Method 1: Test out Buffer Calculated from Cubic Interpolation
00101 *------------------------------------------------------------------------------*/
00102 float32_t testOutput[TEST_LENGTH_SAMPLES];
00103
00104 /*------------------------------------------------------------------------------
00105 *  Method 2: Test out buffer Calculated from Linear Interpolation
00106 *------------------------------------------------------------------------------*/
00107 float32_t testLinIntOutput[TEST_LENGTH_SAMPLES];
00108
00109 /*------------------------------------------------------------------------------
00110 *  External table used for linear interpolation
00111 *------------------------------------------------------------------------------*/
00112 extern float32_t arm_linear_interep_table[188495];
00113
00114 /* ----------------------------------------------------------------------
00115 * Global Variables for caluclating SNR's for Method1 & Method 2
00116 * ------------------------------------------------------------------- */
00117 float32_t snr1;
00118 float32_t snr2;
00119
00120 /* ----------------------------------------------------------------------------
00121 * Calculation of Sine values from Cubic Interpolation and Linear interpolation
00122 * ---------------------------------------------------------------------------- */
00123 int32_t main(void)
00124 {
00125     uint32_t i;
00126     arm_status status;
00127
00128     arm_linear_interp_instance_f32 S = {188495, -3.141592653589793238, XSPACING, &arm_linear_interep_table[0]};
00129
00130     /*------------------------------------------------------------------------------
00131     *  Method 1: Test out Calculated from Cubic Interpolation
00132     *------------------------------------------------------------------------------*/
00133     for(i=0; i< TEST_LENGTH_SAMPLES; i++)
00134     {
00135         testOutput[i] = arm_sin_f32(testInputSin_f32[i]);
00136     }
00137
00138     /*------------------------------------------------------------------------------
00139     *  Method 2: Test out Calculated from Cubic Interpolation and Linear interpolation
00140     *------------------------------------------------------------------------------*/
00141
00142     for(i=0; i< TEST_LENGTH_SAMPLES; i++)
00143     {
00144         testLinIntOutput[i] = arm_linear_interp_f32(&S, testInputSin_f32[i]);
00145     }
00146
00147     /*------------------------------------------------------------------------------
00148     *                   SNR calculation for method 1
00149     *------------------------------------------------------------------------------*/
00150     snr1 = arm_snr_f32(testRefSinOutput32_f32, testOutput, 2);
00151
00152     /*------------------------------------------------------------------------------
00153     *                   SNR calculation for method 2
00154     *------------------------------------------------------------------------------*/
00155     snr2 = arm_snr_f32(testRefSinOutput32_f32, testLinIntOutput, 2);
00156
00157     /*------------------------------------------------------------------------------
00158     *                   Initialise status depending on SNR calculations
00159     *------------------------------------------------------------------------------*/
00160     if( snr2 > snr1)
00161     {
00162         status = ARM_MATH_SUCCESS;
00163     }
00164     else
00165     {
00166         status = ARM_MATH_TEST_FAILURE;
00167     }
00168
00169     /* ----------------------------------------------------------------------
00170     ** Loop here if the signals fail the PASS check.
00171     ** This denotes a test failure
00172     ** ------------------------------------------------------------------- */
00173     if( status != ARM_MATH_SUCCESS)
00174     {
00175         while(1);
00176     }
00177 }
00178
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CMSIS DSP Software Library: arm_lms_f32.c File Reference

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  • File List
  • Globals
Functions

arm_lms_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_lms_f32 (const arm_lms_instance_f32 *S, float32_t *pSrc, float32_t *pRef, float32_t *pOut, float32_t *pErr, uint32_t blockSize)
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
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CMSIS DSP Software Library: arm_lms_f32.c Source File

  • Examples
  • File List
  • Globals

arm_lms_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_lms_f32.c
00009 *
00010 * Description:  Processing function for the floating-point LMS filter.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00170 void arm_lms_f32(
00171   const arm_lms_instance_f32 * S,
00172   float32_t * pSrc,
00173   float32_t * pRef,
00174   float32_t * pOut,
00175   float32_t * pErr,
00176   uint32_t blockSize)
00177 {
00178   float32_t *pState = S->pState;                 /* State pointer */
00179   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
00180   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
00181   float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
00182   float32_t mu = S->mu;                          /* Adaptive factor */
00183   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00184   uint32_t tapCnt, blkCnt;                       /* Loop counters */
00185   float32_t sum, e, d;                           /* accumulator, error, reference data sample */
00186   float32_t w = 0.0f;                            /* weight factor */
00187
00188   e = 0.0f;
00189   d = 0.0f;
00190
00191   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
00192   /* pStateCurnt points to the location where the new input data should be written */
00193   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00194
00195   blkCnt = blockSize;
00196
00197
00198 #ifndef ARM_MATH_CM0
00199
00200   /* Run the below code for Cortex-M4 and Cortex-M3 */
00201
00202   while(blkCnt > 0u)
00203   {
00204     /* Copy the new input sample into the state buffer */
00205     *pStateCurnt++ = *pSrc++;
00206
00207     /* Initialize pState pointer */
00208     px = pState;
00209
00210     /* Initialize coeff pointer */
00211     pb = (pCoeffs);
00212
00213     /* Set the accumulator to zero */
00214     sum = 0.0f;
00215
00216     /* Loop unrolling.  Process 4 taps at a time. */
00217     tapCnt = numTaps >> 2;
00218
00219     while(tapCnt > 0u)
00220     {
00221       /* Perform the multiply-accumulate */
00222       sum += (*px++) * (*pb++);
00223       sum += (*px++) * (*pb++);
00224       sum += (*px++) * (*pb++);
00225       sum += (*px++) * (*pb++);
00226
00227       /* Decrement the loop counter */
00228       tapCnt--;
00229     }
00230
00231     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00232     tapCnt = numTaps % 0x4u;
00233
00234     while(tapCnt > 0u)
00235     {
00236       /* Perform the multiply-accumulate */
00237       sum += (*px++) * (*pb++);
00238
00239       /* Decrement the loop counter */
00240       tapCnt--;
00241     }
00242
00243     /* The result in the accumulator, store in the destination buffer. */
00244     *pOut++ = sum;
00245
00246     /* Compute and store error */
00247     d = (float32_t) (*pRef++);
00248     e = d - sum;
00249     *pErr++ = e;
00250
00251     /* Calculation of Weighting factor for the updating filter coefficients */
00252     w = e * mu;
00253
00254     /* Initialize pState pointer */
00255     px = pState;
00256
00257     /* Initialize coeff pointer */
00258     pb = (pCoeffs);
00259
00260     /* Loop unrolling.  Process 4 taps at a time. */
00261     tapCnt = numTaps >> 2;
00262
00263     /* Update filter coefficients */
00264     while(tapCnt > 0u)
00265     {
00266       /* Perform the multiply-accumulate */
00267       *pb = *pb + (w * (*px++));
00268       pb++;
00269
00270       *pb = *pb + (w * (*px++));
00271       pb++;
00272
00273       *pb = *pb + (w * (*px++));
00274       pb++;
00275
00276       *pb = *pb + (w * (*px++));
00277       pb++;
00278
00279       /* Decrement the loop counter */
00280       tapCnt--;
00281     }
00282
00283     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00284     tapCnt = numTaps % 0x4u;
00285
00286     while(tapCnt > 0u)
00287     {
00288       /* Perform the multiply-accumulate */
00289       *pb = *pb + (w * (*px++));
00290       pb++;
00291
00292       /* Decrement the loop counter */
00293       tapCnt--;
00294     }
00295
00296     /* Advance state pointer by 1 for the next sample */
00297     pState = pState + 1;
00298
00299     /* Decrement the loop counter */
00300     blkCnt--;
00301   }
00302
00303
00304   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00305      satrt of the state buffer. This prepares the state buffer for the
00306      next function call. */
00307
00308   /* Points to the start of the pState buffer */
00309   pStateCurnt = S->pState;
00310
00311   /* Loop unrolling for (numTaps - 1u) samples copy */
00312   tapCnt = (numTaps - 1u) >> 2u;
00313
00314   /* copy data */
00315   while(tapCnt > 0u)
00316   {
00317     *pStateCurnt++ = *pState++;
00318     *pStateCurnt++ = *pState++;
00319     *pStateCurnt++ = *pState++;
00320     *pStateCurnt++ = *pState++;
00321
00322     /* Decrement the loop counter */
00323     tapCnt--;
00324   }
00325
00326   /* Calculate remaining number of copies */
00327   tapCnt = (numTaps - 1u) % 0x4u;
00328
00329   /* Copy the remaining q31_t data */
00330   while(tapCnt > 0u)
00331   {
00332     *pStateCurnt++ = *pState++;
00333
00334     /* Decrement the loop counter */
00335     tapCnt--;
00336   }
00337
00338 #else
00339
00340   /* Run the below code for Cortex-M0 */
00341
00342   while(blkCnt > 0u)
00343   {
00344     /* Copy the new input sample into the state buffer */
00345     *pStateCurnt++ = *pSrc++;
00346
00347     /* Initialize pState pointer */
00348     px = pState;
00349
00350     /* Initialize pCoeffs pointer */
00351     pb = pCoeffs;
00352
00353     /* Set the accumulator to zero */
00354     sum = 0.0f;
00355
00356     /* Loop over numTaps number of values */
00357     tapCnt = numTaps;
00358
00359     while(tapCnt > 0u)
00360     {
00361       /* Perform the multiply-accumulate */
00362       sum += (*px++) * (*pb++);
00363
00364       /* Decrement the loop counter */
00365       tapCnt--;
00366     }
00367
00368     /* The result is stored in the destination buffer. */
00369     *pOut++ = sum;
00370
00371     /* Compute and store error */
00372     d = (float32_t) (*pRef++);
00373     e = d - sum;
00374     *pErr++ = e;
00375
00376     /* Weighting factor for the LMS version */
00377     w = e * mu;
00378
00379     /* Initialize pState pointer */
00380     px = pState;
00381
00382     /* Initialize pCoeffs pointer */
00383     pb = pCoeffs;
00384
00385     /* Loop over numTaps number of values */
00386     tapCnt = numTaps;
00387
00388     while(tapCnt > 0u)
00389     {
00390       /* Perform the multiply-accumulate */
00391       *pb = *pb + (w * (*px++));
00392       pb++;
00393
00394       /* Decrement the loop counter */
00395       tapCnt--;
00396     }
00397
00398     /* Advance state pointer by 1 for the next sample */
00399     pState = pState + 1;
00400
00401     /* Decrement the loop counter */
00402     blkCnt--;
00403   }
00404
00405
00406   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00407    * start of the state buffer. This prepares the state buffer for the
00408    * next function call. */
00409
00410   /* Points to the start of the pState buffer */
00411   pStateCurnt = S->pState;
00412
00413   /*  Copy (numTaps - 1u) samples  */
00414   tapCnt = (numTaps - 1u);
00415
00416   /* Copy the data */
00417   while(tapCnt > 0u)
00418   {
00419     *pStateCurnt++ = *pState++;
00420
00421     /* Decrement the loop counter */
00422     tapCnt--;
00423   }
00424
00425 #endif /*   #ifndef ARM_MATH_CM0 */
00426
00427 }
00428
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CMSIS DSP Software Library: arm_lms_init_f32.c File Reference

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arm_lms_init_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_lms_init_f32 (arm_lms_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, float32_t mu, uint32_t blockSize)
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CMSIS DSP Software Library: arm_lms_init_f32.c Source File

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arm_lms_init_f32.c

Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_lms_init_f32.c
00009 *
00010 * Description:  Floating-point LMS filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00061 void arm_lms_init_f32(
00062   arm_lms_instance_f32 * S,
00063   uint16_t numTaps,
00064   float32_t * pCoeffs,
00065   float32_t * pState,
00066   float32_t mu,
00067   uint32_t blockSize)
00068 {
00069   /* Assign filter taps */
00070   S->numTaps = numTaps;
00071
00072   /* Assign coefficient pointer */
00073   S->pCoeffs = pCoeffs;
00074
00075   /* Clear state buffer and size is always blockSize + numTaps */
00076   memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(float32_t));
00077
00078   /* Assign state pointer */
00079   S->pState = pState;
00080
00081   /* Assign Step size value */
00082   S->mu = mu;
00083 }
00084
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CMSIS DSP Software Library: arm_lms_init_q15.c File Reference

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arm_lms_init_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_lms_init_q15 (arm_lms_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, q15_t mu, uint32_t blockSize, uint32_t postShift)
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CMSIS DSP Software Library: arm_lms_init_q15.c Source File

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arm_lms_init_q15.c

Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_lms_init_q15.c
00009 *
00010 * Description:  Q15 LMS filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00066 void arm_lms_init_q15(
00067   arm_lms_instance_q15 * S,
00068   uint16_t numTaps,
00069   q15_t * pCoeffs,
00070   q15_t * pState,
00071   q15_t mu,
00072   uint32_t blockSize,
00073   uint32_t postShift)
00074 {
00075   /* Assign filter taps */
00076   S->numTaps = numTaps;
00077
00078   /* Assign coefficient pointer */
00079   S->pCoeffs = pCoeffs;
00080
00081   /* Clear state buffer and size is always blockSize + numTaps - 1 */
00082   memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
00083
00084   /* Assign state pointer */
00085   S->pState = pState;
00086
00087   /* Assign Step size value */
00088   S->mu = mu;
00089
00090   /* Assign postShift value to be applied */
00091   S->postShift = postShift;
00092
00093 }
00094
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CMSIS DSP Software Library: arm_lms_init_q31.c File Reference

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Functions

arm_lms_init_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_lms_init_q31 (arm_lms_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, q31_t mu, uint32_t blockSize, uint32_t postShift)
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CMSIS DSP Software Library: arm_lms_init_q31.c Source File

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arm_lms_init_q31.c

Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_lms_init_q31.c
00009 *
00010 * Description:  Q31 LMS filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00066 void arm_lms_init_q31(
00067   arm_lms_instance_q31 * S,
00068   uint16_t numTaps,
00069   q31_t * pCoeffs,
00070   q31_t * pState,
00071   q31_t mu,
00072   uint32_t blockSize,
00073   uint32_t postShift)
00074 {
00075   /* Assign filter taps */
00076   S->numTaps = numTaps;
00077
00078   /* Assign coefficient pointer */
00079   S->pCoeffs = pCoeffs;
00080
00081   /* Clear state buffer and size is always blockSize + numTaps - 1 */
00082   memset(pState, 0, ((uint32_t) numTaps + (blockSize - 1u)) * sizeof(q31_t));
00083
00084   /* Assign state pointer */
00085   S->pState = pState;
00086
00087   /* Assign Step size value */
00088   S->mu = mu;
00089
00090   /* Assign postShift value to be applied */
00091   S->postShift = postShift;
00092
00093 }
00094
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CMSIS DSP Software Library: arm_lms_norm_f32.c File Reference

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Functions

arm_lms_norm_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_lms_norm_f32 (arm_lms_norm_instance_f32 *S, float32_t *pSrc, float32_t *pRef, float32_t *pOut, float32_t *pErr, uint32_t blockSize)
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CMSIS DSP Software Library: arm_lms_norm_f32.c Source File

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arm_lms_norm_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_lms_norm_f32.c
00009 *
00010 * Description:  Processing function for the floating-point Normalised LMS.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00160 void arm_lms_norm_f32(
00161   arm_lms_norm_instance_f32 * S,
00162   float32_t * pSrc,
00163   float32_t * pRef,
00164   float32_t * pOut,
00165   float32_t * pErr,
00166   uint32_t blockSize)
00167 {
00168   float32_t *pState = S->pState;                 /* State pointer */
00169   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
00170   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
00171   float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
00172   float32_t mu = S->mu;                          /* Adaptive factor */
00173   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00174   uint32_t tapCnt, blkCnt;                       /* Loop counters */
00175   float32_t energy;                              /* Energy of the input */
00176   float32_t sum, e, d;                           /* accumulator, error, reference data sample */
00177   float32_t w, x0, in;                           /* weight factor, temporary variable to hold input sample and state */
00178
00179   /* Initializations of error,  difference, Coefficient update */
00180   e = 0.0f;
00181   d = 0.0f;
00182   w = 0.0f;
00183
00184   energy = S->energy;
00185   x0 = S->x0;
00186
00187   /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
00188   /* pStateCurnt points to the location where the new input data should be written */
00189   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00190
00191   /* Loop over blockSize number of values */
00192   blkCnt = blockSize;
00193
00194
00195 #ifndef ARM_MATH_CM0
00196
00197   /* Run the below code for Cortex-M4 and Cortex-M3 */
00198
00199   while(blkCnt > 0u)
00200   {
00201     /* Copy the new input sample into the state buffer */
00202     *pStateCurnt++ = *pSrc;
00203
00204     /* Initialize pState pointer */
00205     px = pState;
00206
00207     /* Initialize coeff pointer */
00208     pb = (pCoeffs);
00209
00210     /* Read the sample from input buffer */
00211     in = *pSrc++;
00212
00213     /* Update the energy calculation */
00214     energy -= x0 * x0;
00215     energy += in * in;
00216
00217     /* Set the accumulator to zero */
00218     sum = 0.0f;
00219
00220     /* Loop unrolling.  Process 4 taps at a time. */
00221     tapCnt = numTaps >> 2;
00222
00223     while(tapCnt > 0u)
00224     {
00225       /* Perform the multiply-accumulate */
00226       sum += (*px++) * (*pb++);
00227       sum += (*px++) * (*pb++);
00228       sum += (*px++) * (*pb++);
00229       sum += (*px++) * (*pb++);
00230
00231       /* Decrement the loop counter */
00232       tapCnt--;
00233     }
00234
00235     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00236     tapCnt = numTaps % 0x4u;
00237
00238     while(tapCnt > 0u)
00239     {
00240       /* Perform the multiply-accumulate */
00241       sum += (*px++) * (*pb++);
00242
00243       /* Decrement the loop counter */
00244       tapCnt--;
00245     }
00246
00247     /* The result in the accumulator, store in the destination buffer. */
00248     *pOut++ = sum;
00249
00250     /* Compute and store error */
00251     d = (float32_t) (*pRef++);
00252     e = d - sum;
00253     *pErr++ = e;
00254
00255     /* Calculation of Weighting factor for updating filter coefficients */
00256     /* epsilon value 0.000000119209289f */
00257     w = (e * mu) / (energy + 0.000000119209289f);
00258
00259     /* Initialize pState pointer */
00260     px = pState;
00261
00262     /* Initialize coeff pointer */
00263     pb = (pCoeffs);
00264
00265     /* Loop unrolling.  Process 4 taps at a time. */
00266     tapCnt = numTaps >> 2;
00267
00268     /* Update filter coefficients */
00269     while(tapCnt > 0u)
00270     {
00271       /* Perform the multiply-accumulate */
00272       *pb += w * (*px++);
00273       pb++;
00274
00275       *pb += w * (*px++);
00276       pb++;
00277
00278       *pb += w * (*px++);
00279       pb++;
00280
00281       *pb += w * (*px++);
00282       pb++;
00283
00284
00285       /* Decrement the loop counter */
00286       tapCnt--;
00287     }
00288
00289     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00290     tapCnt = numTaps % 0x4u;
00291
00292     while(tapCnt > 0u)
00293     {
00294       /* Perform the multiply-accumulate */
00295       *pb += w * (*px++);
00296       pb++;
00297
00298       /* Decrement the loop counter */
00299       tapCnt--;
00300     }
00301
00302     x0 = *pState;
00303
00304     /* Advance state pointer by 1 for the next sample */
00305     pState = pState + 1;
00306
00307     /* Decrement the loop counter */
00308     blkCnt--;
00309   }
00310
00311   S->energy = energy;
00312   S->x0 = x0;
00313
00314   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00315      satrt of the state buffer. This prepares the state buffer for the
00316      next function call. */
00317
00318   /* Points to the start of the pState buffer */
00319   pStateCurnt = S->pState;
00320
00321   /* Loop unrolling for (numTaps - 1u)/4 samples copy */
00322   tapCnt = (numTaps - 1u) >> 2u;
00323
00324   /* copy data */
00325   while(tapCnt > 0u)
00326   {
00327     *pStateCurnt++ = *pState++;
00328     *pStateCurnt++ = *pState++;
00329     *pStateCurnt++ = *pState++;
00330     *pStateCurnt++ = *pState++;
00331
00332     /* Decrement the loop counter */
00333     tapCnt--;
00334   }
00335
00336   /* Calculate remaining number of copies */
00337   tapCnt = (numTaps - 1u) % 0x4u;
00338
00339   /* Copy the remaining q31_t data */
00340   while(tapCnt > 0u)
00341   {
00342     *pStateCurnt++ = *pState++;
00343
00344     /* Decrement the loop counter */
00345     tapCnt--;
00346   }
00347
00348 #else
00349
00350   /* Run the below code for Cortex-M0 */
00351
00352   while(blkCnt > 0u)
00353   {
00354     /* Copy the new input sample into the state buffer */
00355     *pStateCurnt++ = *pSrc;
00356
00357     /* Initialize pState pointer */
00358     px = pState;
00359
00360     /* Initialize pCoeffs pointer */
00361     pb = pCoeffs;
00362
00363     /* Read the sample from input buffer */
00364     in = *pSrc++;
00365
00366     /* Update the energy calculation */
00367     energy -= x0 * x0;
00368     energy += in * in;
00369
00370     /* Set the accumulator to zero */
00371     sum = 0.0f;
00372
00373     /* Loop over numTaps number of values */
00374     tapCnt = numTaps;
00375
00376     while(tapCnt > 0u)
00377     {
00378       /* Perform the multiply-accumulate */
00379       sum += (*px++) * (*pb++);
00380
00381       /* Decrement the loop counter */
00382       tapCnt--;
00383     }
00384
00385     /* The result in the accumulator is stored in the destination buffer. */
00386     *pOut++ = sum;
00387
00388     /* Compute and store error */
00389     d = (float32_t) (*pRef++);
00390     e = d - sum;
00391     *pErr++ = e;
00392
00393     /* Calculation of Weighting factor for updating filter coefficients */
00394     /* epsilon value 0.000000119209289f */
00395     w = (e * mu) / (energy + 0.000000119209289f);
00396
00397     /* Initialize pState pointer */
00398     px = pState;
00399
00400     /* Initialize pCcoeffs pointer */
00401     pb = pCoeffs;
00402
00403     /* Loop over numTaps number of values */
00404     tapCnt = numTaps;
00405
00406     while(tapCnt > 0u)
00407     {
00408       /* Perform the multiply-accumulate */
00409       *pb += w * (*px++);
00410       pb++;
00411
00412       /* Decrement the loop counter */
00413       tapCnt--;
00414     }
00415
00416     x0 = *pState;
00417
00418     /* Advance state pointer by 1 for the next sample */
00419     pState = pState + 1;
00420
00421     /* Decrement the loop counter */
00422     blkCnt--;
00423   }
00424
00425   S->energy = energy;
00426   S->x0 = x0;
00427
00428   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00429      satrt of the state buffer. This prepares the state buffer for the
00430      next function call. */
00431
00432   /* Points to the start of the pState buffer */
00433   pStateCurnt = S->pState;
00434
00435   /* Copy (numTaps - 1u) samples  */
00436   tapCnt = (numTaps - 1u);
00437
00438   /* Copy the remaining q31_t data */
00439   while(tapCnt > 0u)
00440   {
00441     *pStateCurnt++ = *pState++;
00442
00443     /* Decrement the loop counter */
00444     tapCnt--;
00445   }
00446
00447 #endif /*   #ifndef ARM_MATH_CM0 */
00448
00449 }
00450
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CMSIS DSP Software Library: arm_lms_norm_init_f32.c File Reference

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arm_lms_norm_init_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_lms_norm_init_f32 (arm_lms_norm_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, float32_t mu, uint32_t blockSize)
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CMSIS DSP Software Library: arm_lms_norm_init_f32.c Source File

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arm_lms_norm_init_f32.c

Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_lms_norm_init_f32.c
00009 *
00010 * Description:  Floating-point NLMS filter initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034
00064 void arm_lms_norm_init_f32(
00065   arm_lms_norm_instance_f32 * S,
00066   uint16_t numTaps,
00067   float32_t * pCoeffs,
00068   float32_t * pState,
00069   float32_t mu,
00070   uint32_t blockSize)
00071 {
00072   /* Assign filter taps */
00073   S->numTaps = numTaps;
00074
00075   /* Assign coefficient pointer */
00076   S->pCoeffs = pCoeffs;
00077
00078   /* Clear state buffer and size is always blockSize + numTaps - 1 */
00079   memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
00080
00081   /* Assign state pointer */
00082   S->pState = pState;
00083
00084   /* Assign Step size value */
00085   S->mu = mu;
00086
00087   /* Initialise Energy to zero */
00088   S->energy = 0.0f;
00089
00090   /* Initialise x0 to zero */
00091   S->x0 = 0.0f;
00092
00093 }
00094
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CMSIS DSP Software Library: arm_lms_norm_init_q15.c File Reference

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arm_lms_norm_init_q15.c File Reference

#include "arm_math.h"
#include "arm_common_tables.h"

Go to the source code of this file.

Functions

void arm_lms_norm_init_q15 (arm_lms_norm_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, q15_t mu, uint32_t blockSize, uint8_t postShift)
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CMSIS DSP Software Library: arm_lms_norm_init_q15.c Source File

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arm_lms_norm_init_q15.c

Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_lms_norm_init_q15.c
00009 *
00010 * Description:  Q15 NLMS initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034 #include "arm_common_tables.h"
00035
00064 void arm_lms_norm_init_q15(
00065   arm_lms_norm_instance_q15 * S,
00066   uint16_t numTaps,
00067   q15_t * pCoeffs,
00068   q15_t * pState,
00069   q15_t mu,
00070   uint32_t blockSize,
00071   uint8_t postShift)
00072 {
00073   /* Assign filter taps */
00074   S->numTaps = numTaps;
00075
00076   /* Assign coefficient pointer */
00077   S->pCoeffs = pCoeffs;
00078
00079   /* Clear state buffer and size is always blockSize + numTaps - 1 */
00080   memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
00081
00082   /* Assign post Shift value applied to coefficients */
00083   S->postShift = postShift;
00084
00085   /* Assign state pointer */
00086   S->pState = pState;
00087
00088   /* Assign Step size value */
00089   S->mu = mu;
00090
00091   /* Initialize reciprocal pointer table */
00092   S->recipTable = armRecipTableQ15;
00093
00094   /* Initialise Energy to zero */
00095   S->energy = 0;
00096
00097   /* Initialise x0 to zero */
00098   S->x0 = 0;
00099
00100 }
00101
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CMSIS DSP Software Library: arm_lms_norm_init_q31.c File Reference

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arm_lms_norm_init_q31.c File Reference

#include "arm_math.h"
#include "arm_common_tables.h"

Go to the source code of this file.

Functions

void arm_lms_norm_init_q31 (arm_lms_norm_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, q31_t mu, uint32_t blockSize, uint8_t postShift)
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CMSIS DSP Software Library: arm_lms_norm_init_q31.c Source File

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arm_lms_norm_init_q31.c

Go to the documentation of this file.
00001 /*-----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_lms_norm_init_q31.c
00009 *
00010 * Description:  Q31 NLMS initialization function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------*/
00032
00033 #include "arm_math.h"
00034 #include "arm_common_tables.h"
00035
00063 void arm_lms_norm_init_q31(
00064   arm_lms_norm_instance_q31 * S,
00065   uint16_t numTaps,
00066   q31_t * pCoeffs,
00067   q31_t * pState,
00068   q31_t mu,
00069   uint32_t blockSize,
00070   uint8_t postShift)
00071 {
00072   /* Assign filter taps */
00073   S->numTaps = numTaps;
00074
00075   /* Assign coefficient pointer */
00076   S->pCoeffs = pCoeffs;
00077
00078   /* Clear state buffer and size is always blockSize + numTaps - 1  */
00079   memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q31_t));
00080
00081   /* Assign post Shift value applied to coefficients */
00082   S->postShift = postShift;
00083
00084   /* Assign state pointer */
00085   S->pState = pState;
00086
00087   /* Assign Step size value */
00088   S->mu = mu;
00089
00090   /* Initialize reciprocal pointer table */
00091   S->recipTable = armRecipTableQ31;
00092
00093   /* Initialise Energy to zero */
00094   S->energy = 0;
00095
00096   /* Initialise x0 to zero */
00097   S->x0 = 0;
00098
00099 }
00100
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CMSIS DSP Software Library: arm_lms_norm_q15.c File Reference

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Functions

arm_lms_norm_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_lms_norm_q15 (arm_lms_norm_instance_q15 *S, q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize)
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CMSIS DSP Software Library: arm_lms_norm_q15.c Source File

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arm_lms_norm_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_lms_norm_q15.c
00009 *
00010 * Description:  Q15 NLMS filter.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00071 void arm_lms_norm_q15(
00072   arm_lms_norm_instance_q15 * S,
00073   q15_t * pSrc,
00074   q15_t * pRef,
00075   q15_t * pOut,
00076   q15_t * pErr,
00077   uint32_t blockSize)
00078 {
00079   q15_t *pState = S->pState;                     /* State pointer */
00080   q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00081   q15_t *pStateCurnt;                            /* Points to the current sample of the state */
00082   q15_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
00083   q15_t mu = S->mu;                              /* Adaptive factor */
00084   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00085   uint32_t tapCnt, blkCnt;                       /* Loop counters */
00086   q31_t energy;                                  /* Energy of the input */
00087   q63_t acc;                                     /* Accumulator */
00088   q15_t e = 0, d = 0;                            /* error, reference data sample */
00089   q15_t w = 0, in;                               /* weight factor and state */
00090   q15_t x0;                                      /* temporary variable to hold input sample */
00091   uint32_t shift = (uint32_t) S->postShift + 1u; /* Shift to be applied to the output */
00092   q15_t errorXmu, oneByEnergy;                   /* Temporary variables to store error and mu product and reciprocal of energy */
00093   q15_t postShift;                               /* Post shift to be applied to weight after reciprocal calculation */
00094   q31_t coef;                                    /* Teporary variable for coefficient */
00095
00096   energy = S->energy;
00097   x0 = S->x0;
00098
00099   /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
00100   /* pStateCurnt points to the location where the new input data should be written */
00101   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00102
00103   /* Loop over blockSize number of values */
00104   blkCnt = blockSize;
00105
00106
00107 #ifndef ARM_MATH_CM0
00108
00109   /* Run the below code for Cortex-M4 and Cortex-M3 */
00110
00111   while(blkCnt > 0u)
00112   {
00113     /* Copy the new input sample into the state buffer */
00114     *pStateCurnt++ = *pSrc;
00115
00116     /* Initialize pState pointer */
00117     px = pState;
00118
00119     /* Initialize coeff pointer */
00120     pb = (pCoeffs);
00121
00122     /* Read the sample from input buffer */
00123     in = *pSrc++;
00124
00125     /* Update the energy calculation */
00126     energy -= (((q31_t) x0 * (x0)) >> 15);
00127     energy += (((q31_t) in * (in)) >> 15);
00128
00129     /* Set the accumulator to zero */
00130     acc = 0;
00131
00132     /* Loop unrolling.  Process 4 taps at a time. */
00133     tapCnt = numTaps >> 2;
00134
00135     while(tapCnt > 0u)
00136     {
00137
00138       /* Perform the multiply-accumulate */
00139       acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
00140       acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
00141
00142       /* Decrement the loop counter */
00143       tapCnt--;
00144     }
00145
00146     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00147     tapCnt = numTaps % 0x4u;
00148
00149     while(tapCnt > 0u)
00150     {
00151       /* Perform the multiply-accumulate */
00152       acc += (((q31_t) * px++ * (*pb++)));
00153
00154       /* Decrement the loop counter */
00155       tapCnt--;
00156     }
00157
00158     /* Converting the result to 1.15 format */
00159     acc = __SSAT((acc >> (16u - shift)), 16u);
00160
00161     /* Store the result from accumulator into the destination buffer. */
00162     *pOut++ = (q15_t) acc;
00163
00164     /* Compute and store error */
00165     d = *pRef++;
00166     e = d - (q15_t) acc;
00167     *pErr++ = e;
00168
00169     /* Calculation of 1/energy */
00170     postShift = arm_recip_q15((q15_t) energy + DELTA_Q15,
00171                               &oneByEnergy, S->recipTable);
00172
00173     /* Calculation of e * mu value */
00174     errorXmu = (q15_t) (((q31_t) e * mu) >> 15);
00175
00176     /* Calculation of (e * mu) * (1/energy) value */
00177     acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift));
00178
00179     /* Weighting factor for the normalized version */
00180     w = (q15_t) __SSAT((q31_t) acc, 16);
00181
00182     /* Initialize pState pointer */
00183     px = pState;
00184
00185     /* Initialize coeff pointer */
00186     pb = (pCoeffs);
00187
00188     /* Loop unrolling.  Process 4 taps at a time. */
00189     tapCnt = numTaps >> 2;
00190
00191     /* Update filter coefficients */
00192     while(tapCnt > 0u)
00193     {
00194       coef = *pb + (((q31_t) w * (*px++)) >> 15);
00195       *pb++ = (q15_t) __SSAT((coef), 16);
00196       coef = *pb + (((q31_t) w * (*px++)) >> 15);
00197       *pb++ = (q15_t) __SSAT((coef), 16);
00198       coef = *pb + (((q31_t) w * (*px++)) >> 15);
00199       *pb++ = (q15_t) __SSAT((coef), 16);
00200       coef = *pb + (((q31_t) w * (*px++)) >> 15);
00201       *pb++ = (q15_t) __SSAT((coef), 16);
00202
00203       /* Decrement the loop counter */
00204       tapCnt--;
00205     }
00206
00207     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00208     tapCnt = numTaps % 0x4u;
00209
00210     while(tapCnt > 0u)
00211     {
00212       /* Perform the multiply-accumulate */
00213       coef = *pb + (((q31_t) w * (*px++)) >> 15);
00214       *pb++ = (q15_t) __SSAT((coef), 16);
00215
00216       /* Decrement the loop counter */
00217       tapCnt--;
00218     }
00219
00220     /* Read the sample from state buffer */
00221     x0 = *pState;
00222
00223     /* Advance state pointer by 1 for the next sample */
00224     pState = pState + 1u;
00225
00226     /* Decrement the loop counter */
00227     blkCnt--;
00228   }
00229
00230   /* Save energy and x0 values for the next frame */
00231   S->energy = (q15_t) energy;
00232   S->x0 = x0;
00233
00234   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00235      satrt of the state buffer. This prepares the state buffer for the
00236      next function call. */
00237
00238   /* Points to the start of the pState buffer */
00239   pStateCurnt = S->pState;
00240
00241   /* Calculation of count for copying integer writes */
00242   tapCnt = (numTaps - 1u) >> 2;
00243
00244   while(tapCnt > 0u)
00245   {
00246
00247     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00248     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00249
00250     tapCnt--;
00251
00252   }
00253
00254   /* Calculation of count for remaining q15_t data */
00255   tapCnt = (numTaps - 1u) % 0x4u;
00256
00257   /* copy data */
00258   while(tapCnt > 0u)
00259   {
00260     *pStateCurnt++ = *pState++;
00261
00262     /* Decrement the loop counter */
00263     tapCnt--;
00264   }
00265
00266 #else
00267
00268   /* Run the below code for Cortex-M0 */
00269
00270   while(blkCnt > 0u)
00271   {
00272     /* Copy the new input sample into the state buffer */
00273     *pStateCurnt++ = *pSrc;
00274
00275     /* Initialize pState pointer */
00276     px = pState;
00277
00278     /* Initialize pCoeffs pointer */
00279     pb = pCoeffs;
00280
00281     /* Read the sample from input buffer */
00282     in = *pSrc++;
00283
00284     /* Update the energy calculation */
00285     energy -= (((q31_t) x0 * (x0)) >> 15);
00286     energy += (((q31_t) in * (in)) >> 15);
00287
00288     /* Set the accumulator to zero */
00289     acc = 0;
00290
00291     /* Loop over numTaps number of values */
00292     tapCnt = numTaps;
00293
00294     while(tapCnt > 0u)
00295     {
00296       /* Perform the multiply-accumulate */
00297       acc += (((q31_t) * px++ * (*pb++)));
00298
00299       /* Decrement the loop counter */
00300       tapCnt--;
00301     }
00302
00303     /* Converting the result to 1.15 format */
00304     acc = __SSAT((acc >> (16u - shift)), 16u);
00305
00306     /* Store the result from accumulator into the destination buffer. */
00307     *pOut++ = (q15_t) acc;
00308
00309     /* Compute and store error */
00310     d = *pRef++;
00311     e = d - (q15_t) acc;
00312     *pErr++ = e;
00313
00314     /* Calculation of 1/energy */
00315     postShift = arm_recip_q15((q15_t) energy + DELTA_Q15,
00316                               &oneByEnergy, S->recipTable);
00317
00318     /* Calculation of e * mu value */
00319     errorXmu = (q15_t) (((q31_t) e * mu) >> 15);
00320
00321     /* Calculation of (e * mu) * (1/energy) value */
00322     acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift));
00323
00324     /* Weighting factor for the normalized version */
00325     w = (q15_t) __SSAT((q31_t) acc, 16);
00326
00327     /* Initialize pState pointer */
00328     px = pState;
00329
00330     /* Initialize coeff pointer */
00331     pb = (pCoeffs);
00332
00333     /* Loop over numTaps number of values */
00334     tapCnt = numTaps;
00335
00336     while(tapCnt > 0u)
00337     {
00338       /* Perform the multiply-accumulate */
00339       coef = *pb + (((q31_t) w * (*px++)) >> 15);
00340       *pb++ = (q15_t) __SSAT((coef), 16);
00341
00342       /* Decrement the loop counter */
00343       tapCnt--;
00344     }
00345
00346     /* Read the sample from state buffer */
00347     x0 = *pState;
00348
00349     /* Advance state pointer by 1 for the next sample */
00350     pState = pState + 1u;
00351
00352     /* Decrement the loop counter */
00353     blkCnt--;
00354   }
00355
00356   /* Save energy and x0 values for the next frame */
00357   S->energy = (q15_t) energy;
00358   S->x0 = x0;
00359
00360   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00361      satrt of the state buffer. This prepares the state buffer for the
00362      next function call. */
00363
00364   /* Points to the start of the pState buffer */
00365   pStateCurnt = S->pState;
00366
00367   /* copy (numTaps - 1u) data */
00368   tapCnt = (numTaps - 1u);
00369
00370   /* copy data */
00371   while(tapCnt > 0u)
00372   {
00373     *pStateCurnt++ = *pState++;
00374
00375     /* Decrement the loop counter */
00376     tapCnt--;
00377   }
00378
00379 #endif /*   #ifndef ARM_MATH_CM0 */
00380
00381 }
00382
00383
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CMSIS DSP Software Library: arm_lms_norm_q31.c File Reference

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arm_lms_norm_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_lms_norm_q31 (arm_lms_norm_instance_q31 *S, q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize)
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CMSIS DSP Software Library: arm_lms_norm_q31.c Source File

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arm_lms_norm_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_lms_norm_q31.c
00009 *
00010 * Description:  Processing function for the Q31 NLMS filter.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00072 void arm_lms_norm_q31(
00073   arm_lms_norm_instance_q31 * S,
00074   q31_t * pSrc,
00075   q31_t * pRef,
00076   q31_t * pOut,
00077   q31_t * pErr,
00078   uint32_t blockSize)
00079 {
00080   q31_t *pState = S->pState;                     /* State pointer */
00081   q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00082   q31_t *pStateCurnt;                            /* Points to the current sample of the state */
00083   q31_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
00084   q31_t mu = S->mu;                              /* Adaptive factor */
00085   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00086   uint32_t tapCnt, blkCnt;                       /* Loop counters */
00087   q63_t energy;                                  /* Energy of the input */
00088   q63_t acc;                                     /* Accumulator */
00089   q31_t e = 0, d = 0;                            /* error, reference data sample */
00090   q31_t w = 0, in;                               /* weight factor and state */
00091   q31_t x0;                                      /* temporary variable to hold input sample */
00092   uint32_t shift = 32u - ((uint32_t) S->postShift + 1u);        /* Shift to be applied to the output */
00093   q31_t errorXmu, oneByEnergy;                   /* Temporary variables to store error and mu product and reciprocal of energy */
00094   q31_t postShift;                               /* Post shift to be applied to weight after reciprocal calculation */
00095   q31_t coef;                                    /* Temporary variable for coef */
00096
00097   energy = S->energy;
00098   x0 = S->x0;
00099
00100   /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
00101   /* pStateCurnt points to the location where the new input data should be written */
00102   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00103
00104   /* Loop over blockSize number of values */
00105   blkCnt = blockSize;
00106
00107
00108 #ifndef ARM_MATH_CM0
00109
00110   /* Run the below code for Cortex-M4 and Cortex-M3 */
00111
00112   while(blkCnt > 0u)
00113   {
00114
00115     /* Copy the new input sample into the state buffer */
00116     *pStateCurnt++ = *pSrc;
00117
00118     /* Initialize pState pointer */
00119     px = pState;
00120
00121     /* Initialize coeff pointer */
00122     pb = (pCoeffs);
00123
00124     /* Read the sample from input buffer */
00125     in = *pSrc++;
00126
00127     /* Update the energy calculation */
00128     energy = (q31_t) ((((q63_t) energy << 32) -
00129                        (((q63_t) x0 * x0) << 1)) >> 32);
00130     energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32);
00131
00132     /* Set the accumulator to zero */
00133     acc = 0;
00134
00135     /* Loop unrolling.  Process 4 taps at a time. */
00136     tapCnt = numTaps >> 2;
00137
00138     while(tapCnt > 0u)
00139     {
00140       /* Perform the multiply-accumulate */
00141       acc += ((q63_t) (*px++)) * (*pb++);
00142       acc += ((q63_t) (*px++)) * (*pb++);
00143       acc += ((q63_t) (*px++)) * (*pb++);
00144       acc += ((q63_t) (*px++)) * (*pb++);
00145
00146       /* Decrement the loop counter */
00147       tapCnt--;
00148     }
00149
00150     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00151     tapCnt = numTaps % 0x4u;
00152
00153     while(tapCnt > 0u)
00154     {
00155       /* Perform the multiply-accumulate */
00156       acc += ((q63_t) (*px++)) * (*pb++);
00157
00158       /* Decrement the loop counter */
00159       tapCnt--;
00160     }
00161
00162     /* Converting the result to 1.31 format */
00163     acc = (q31_t) (acc >> shift);
00164
00165     /* Store the result from accumulator into the destination buffer. */
00166     *pOut++ = (q31_t) acc;
00167
00168     /* Compute and store error */
00169     d = *pRef++;
00170     e = d - (q31_t) acc;
00171     *pErr++ = e;
00172
00173     /* Calculates the reciprocal of energy */
00174     postShift = arm_recip_q31(energy + DELTA_Q31,
00175                               &oneByEnergy, &S->recipTable[0]);
00176
00177     /* Calculation of product of (e * mu) */
00178     errorXmu = (q31_t) (((q63_t) e * mu) >> 31);
00179
00180     /* Weighting factor for the normalized version */
00181     w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift));
00182
00183     /* Initialize pState pointer */
00184     px = pState;
00185
00186     /* Initialize coeff pointer */
00187     pb = (pCoeffs);
00188
00189     /* Loop unrolling.  Process 4 taps at a time. */
00190     tapCnt = numTaps >> 2;
00191
00192     /* Update filter coefficients */
00193     while(tapCnt > 0u)
00194     {
00195       /* Perform the multiply-accumulate */
00196
00197       /* coef is in 2.30 format */
00198       coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
00199       /* get coef in 1.31 format by left shifting */
00200       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00201       /* update coefficient buffer to next coefficient */
00202       pb++;
00203
00204       coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
00205       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00206       pb++;
00207
00208       coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
00209       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00210       pb++;
00211
00212       coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
00213       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00214       pb++;
00215
00216       /* Decrement the loop counter */
00217       tapCnt--;
00218     }
00219
00220     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00221     tapCnt = numTaps % 0x4u;
00222
00223     while(tapCnt > 0u)
00224     {
00225       /* Perform the multiply-accumulate */
00226       coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
00227       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00228       pb++;
00229
00230       /* Decrement the loop counter */
00231       tapCnt--;
00232     }
00233
00234     /* Read the sample from state buffer */
00235     x0 = *pState;
00236
00237     /* Advance state pointer by 1 for the next sample */
00238     pState = pState + 1;
00239
00240     /* Decrement the loop counter */
00241     blkCnt--;
00242   }
00243
00244   /* Save energy and x0 values for the next frame */
00245   S->energy = (q31_t) energy;
00246   S->x0 = x0;
00247
00248   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00249      satrt of the state buffer. This prepares the state buffer for the
00250      next function call. */
00251
00252   /* Points to the start of the pState buffer */
00253   pStateCurnt = S->pState;
00254
00255   /* Loop unrolling for (numTaps - 1u) samples copy */
00256   tapCnt = (numTaps - 1u) >> 2u;
00257
00258   /* copy data */
00259   while(tapCnt > 0u)
00260   {
00261     *pStateCurnt++ = *pState++;
00262     *pStateCurnt++ = *pState++;
00263     *pStateCurnt++ = *pState++;
00264     *pStateCurnt++ = *pState++;
00265
00266     /* Decrement the loop counter */
00267     tapCnt--;
00268   }
00269
00270   /* Calculate remaining number of copies */
00271   tapCnt = (numTaps - 1u) % 0x4u;
00272
00273   /* Copy the remaining q31_t data */
00274   while(tapCnt > 0u)
00275   {
00276     *pStateCurnt++ = *pState++;
00277
00278     /* Decrement the loop counter */
00279     tapCnt--;
00280   }
00281
00282 #else
00283
00284   /* Run the below code for Cortex-M0 */
00285
00286   while(blkCnt > 0u)
00287   {
00288
00289     /* Copy the new input sample into the state buffer */
00290     *pStateCurnt++ = *pSrc;
00291
00292     /* Initialize pState pointer */
00293     px = pState;
00294
00295     /* Initialize pCoeffs pointer */
00296     pb = pCoeffs;
00297
00298     /* Read the sample from input buffer */
00299     in = *pSrc++;
00300
00301     /* Update the energy calculation */
00302     energy =
00303       (q31_t) ((((q63_t) energy << 32) - (((q63_t) x0 * x0) << 1)) >> 32);
00304     energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32);
00305
00306     /* Set the accumulator to zero */
00307     acc = 0;
00308
00309     /* Loop over numTaps number of values */
00310     tapCnt = numTaps;
00311
00312     while(tapCnt > 0u)
00313     {
00314       /* Perform the multiply-accumulate */
00315       acc += ((q63_t) (*px++)) * (*pb++);
00316
00317       /* Decrement the loop counter */
00318       tapCnt--;
00319     }
00320
00321     /* Converting the result to 1.31 format */
00322     acc = (q31_t) (acc >> shift);
00323
00324     /* Store the result from accumulator into the destination buffer. */
00325     *pOut++ = (q31_t) acc;
00326
00327     /* Compute and store error */
00328     d = *pRef++;
00329     e = d - (q31_t) acc;
00330     *pErr++ = e;
00331
00332     /* Calculates the reciprocal of energy */
00333     postShift =
00334       arm_recip_q31(energy + DELTA_Q31, &oneByEnergy, &S->recipTable[0]);
00335
00336     /* Calculation of product of (e * mu) */
00337     errorXmu = (q31_t) (((q63_t) e * mu) >> 31);
00338
00339     /* Weighting factor for the normalized version */
00340     w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift));
00341
00342     /* Initialize pState pointer */
00343     px = pState;
00344
00345     /* Initialize coeff pointer */
00346     pb = (pCoeffs);
00347
00348     /* Loop over numTaps number of values */
00349     tapCnt = numTaps;
00350
00351     while(tapCnt > 0u)
00352     {
00353       /* Perform the multiply-accumulate */
00354       /* coef is in 2.30 format */
00355       coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
00356       /* get coef in 1.31 format by left shifting */
00357       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00358       /* update coefficient buffer to next coefficient */
00359       pb++;
00360
00361       /* Decrement the loop counter */
00362       tapCnt--;
00363     }
00364
00365     /* Read the sample from state buffer */
00366     x0 = *pState;
00367
00368     /* Advance state pointer by 1 for the next sample */
00369     pState = pState + 1;
00370
00371     /* Decrement the loop counter */
00372     blkCnt--;
00373   }
00374
00375   /* Save energy and x0 values for the next frame */
00376   S->energy = (q31_t) energy;
00377   S->x0 = x0;
00378
00379   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00380      start of the state buffer. This prepares the state buffer for the
00381      next function call. */
00382
00383   /* Points to the start of the pState buffer */
00384   pStateCurnt = S->pState;
00385
00386   /* Loop for (numTaps - 1u) samples copy */
00387   tapCnt = (numTaps - 1u);
00388
00389   /* Copy the remaining q31_t data */
00390   while(tapCnt > 0u)
00391   {
00392     *pStateCurnt++ = *pState++;
00393
00394     /* Decrement the loop counter */
00395     tapCnt--;
00396   }
00397
00398 #endif /*   #ifndef ARM_MATH_CM0 */
00399
00400 }
00401
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CMSIS DSP Software Library: arm_lms_q15.c File Reference

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arm_lms_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_lms_q15 (const arm_lms_instance_q15 *S, q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize)
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CMSIS DSP Software Library: arm_lms_q15.c Source File

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arm_lms_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_lms_q15.c
00009 *
00010 * Description:  Processing function for the Q15 LMS filter.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00066 void arm_lms_q15(
00067   const arm_lms_instance_q15 * S,
00068   q15_t * pSrc,
00069   q15_t * pRef,
00070   q15_t * pOut,
00071   q15_t * pErr,
00072   uint32_t blockSize)
00073 {
00074   q15_t *pState = S->pState;                     /* State pointer */
00075   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00076   q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00077   q15_t *pStateCurnt;                            /* Points to the current sample of the state */
00078   q15_t mu = S->mu;                              /* Adaptive factor */
00079   q15_t *px;                                     /* Temporary pointer for state */
00080   q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
00081   uint32_t tapCnt, blkCnt;                       /* Loop counters */
00082   q63_t acc;                                     /* Accumulator */
00083   q15_t e = 0;                                   /* error of data sample */
00084   q15_t alpha;                                   /* Intermediate constant for taps update */
00085   uint32_t shift = S->postShift + 1u;            /* Shift to be applied to the output */
00086
00087
00088 #ifndef ARM_MATH_CM0
00089
00090   /* Run the below code for Cortex-M4 and Cortex-M3 */
00091
00092   q31_t coef;                                    /* Teporary variable for coefficient */
00093
00094   /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
00095   /* pStateCurnt points to the location where the new input data should be written */
00096   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00097
00098   /* Initializing blkCnt with blockSize */
00099   blkCnt = blockSize;
00100
00101   while(blkCnt > 0u)
00102   {
00103     /* Copy the new input sample into the state buffer */
00104     *pStateCurnt++ = *pSrc++;
00105
00106     /* Initialize state pointer */
00107     px = pState;
00108
00109     /* Initialize coefficient pointer */
00110     pb = pCoeffs;
00111
00112     /* Set the accumulator to zero */
00113     acc = 0;
00114
00115     /* Loop unrolling.  Process 4 taps at a time. */
00116     tapCnt = numTaps >> 2u;
00117
00118     while(tapCnt > 0u)
00119     {
00120       /* acc +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
00121       /* Perform the multiply-accumulate */
00122       acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
00123       acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
00124
00125       /* Decrement the loop counter */
00126       tapCnt--;
00127     }
00128
00129     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00130     tapCnt = numTaps % 0x4u;
00131
00132     while(tapCnt > 0u)
00133     {
00134       /* Perform the multiply-accumulate */
00135       acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
00136
00137       /* Decrement the loop counter */
00138       tapCnt--;
00139     }
00140
00141     /* Converting the result to 1.15 format and saturate the output */
00142     acc = __SSAT((acc >> (16 - shift)), 16);
00143
00144     /* Store the result from accumulator into the destination buffer. */
00145     *pOut++ = (q15_t) acc;
00146
00147     /* Compute and store error */
00148     e = *pRef++ - (q15_t) acc;
00149
00150     *pErr++ = (q15_t) e;
00151
00152     /* Compute alpha i.e. intermediate constant for taps update */
00153     alpha = (q15_t) (((q31_t) e * (mu)) >> 15);
00154
00155     /* Initialize state pointer */
00156     /* Advance state pointer by 1 for the next sample */
00157     px = pState++;
00158
00159     /* Initialize coefficient pointer */
00160     pb = pCoeffs;
00161
00162     /* Loop unrolling.  Process 4 taps at a time. */
00163     tapCnt = numTaps >> 2u;
00164
00165     /* Update filter coefficients */
00166     while(tapCnt > 0u)
00167     {
00168       coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
00169       *pb++ = (q15_t) __SSAT((coef), 16);
00170       coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
00171       *pb++ = (q15_t) __SSAT((coef), 16);
00172       coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
00173       *pb++ = (q15_t) __SSAT((coef), 16);
00174       coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
00175       *pb++ = (q15_t) __SSAT((coef), 16);
00176
00177       /* Decrement the loop counter */
00178       tapCnt--;
00179     }
00180
00181     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00182     tapCnt = numTaps % 0x4u;
00183
00184     while(tapCnt > 0u)
00185     {
00186       /* Perform the multiply-accumulate */
00187       coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
00188       *pb++ = (q15_t) __SSAT((coef), 16);
00189
00190       /* Decrement the loop counter */
00191       tapCnt--;
00192     }
00193
00194     /* Decrement the loop counter */
00195     blkCnt--;
00196
00197   }
00198
00199   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00200      satrt of the state buffer. This prepares the state buffer for the
00201      next function call. */
00202
00203   /* Points to the start of the pState buffer */
00204   pStateCurnt = S->pState;
00205
00206   /* Calculation of count for copying integer writes */
00207   tapCnt = (numTaps - 1u) >> 2;
00208
00209   while(tapCnt > 0u)
00210   {
00211
00212     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00213     *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
00214
00215     tapCnt--;
00216
00217   }
00218
00219   /* Calculation of count for remaining q15_t data */
00220   tapCnt = (numTaps - 1u) % 0x4u;
00221
00222   /* copy data */
00223   while(tapCnt > 0u)
00224   {
00225     *pStateCurnt++ = *pState++;
00226
00227     /* Decrement the loop counter */
00228     tapCnt--;
00229   }
00230
00231 #else
00232
00233   /* Run the below code for Cortex-M0 */
00234
00235   /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
00236   /* pStateCurnt points to the location where the new input data should be written */
00237   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00238
00239   /* Loop over blockSize number of values */
00240   blkCnt = blockSize;
00241
00242   while(blkCnt > 0u)
00243   {
00244     /* Copy the new input sample into the state buffer */
00245     *pStateCurnt++ = *pSrc++;
00246
00247     /* Initialize pState pointer */
00248     px = pState;
00249
00250     /* Initialize pCoeffs pointer */
00251     pb = pCoeffs;
00252
00253     /* Set the accumulator to zero */
00254     acc = 0;
00255
00256     /* Loop over numTaps number of values */
00257     tapCnt = numTaps;
00258
00259     while(tapCnt > 0u)
00260     {
00261       /* Perform the multiply-accumulate */
00262       acc += (q63_t) ((q31_t) (*px++) * (*pb++));
00263
00264       /* Decrement the loop counter */
00265       tapCnt--;
00266     }
00267
00268     /* Converting the result to 1.15 format and saturate the output */
00269     acc = __SSAT((acc >> (16 - shift)), 16);
00270
00271     /* Store the result from accumulator into the destination buffer. */
00272     *pOut++ = (q15_t) acc;
00273
00274     /* Compute and store error */
00275     e = *pRef++ - (q15_t) acc;
00276
00277     *pErr++ = (q15_t) e;
00278
00279     /* Compute alpha i.e. intermediate constant for taps update */
00280     alpha = (q15_t) (((q31_t) e * (mu)) >> 15);
00281
00282     /* Initialize pState pointer */
00283     /* Advance state pointer by 1 for the next sample */
00284     px = pState++;
00285
00286     /* Initialize pCoeffs pointer */
00287     pb = pCoeffs;
00288
00289     /* Loop over numTaps number of values */
00290     tapCnt = numTaps;
00291
00292     while(tapCnt > 0u)
00293     {
00294       /* Perform the multiply-accumulate */
00295       *pb++ += (q15_t) (((q31_t) alpha * (*px++)) >> 15);
00296
00297       /* Decrement the loop counter */
00298       tapCnt--;
00299     }
00300
00301     /* Decrement the loop counter */
00302     blkCnt--;
00303
00304   }
00305
00306   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00307      start of the state buffer. This prepares the state buffer for the
00308      next function call. */
00309
00310   /* Points to the start of the pState buffer */
00311   pStateCurnt = S->pState;
00312
00313   /*  Copy (numTaps - 1u) samples  */
00314   tapCnt = (numTaps - 1u);
00315
00316   /* Copy the data */
00317   while(tapCnt > 0u)
00318   {
00319     *pStateCurnt++ = *pState++;
00320
00321     /* Decrement the loop counter */
00322     tapCnt--;
00323   }
00324
00325 #endif /*   #ifndef ARM_MATH_CM0 */
00326
00327 }
00328
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CMSIS DSP Software Library: arm_lms_q31.c File Reference

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arm_lms_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_lms_q31 (const arm_lms_instance_q31 *S, q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize)
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CMSIS DSP Software Library: arm_lms_q31.c Source File

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arm_lms_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_lms_q31.c
00009 *
00010 * Description:  Processing function for the Q31 LMS filter.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00069 void arm_lms_q31(
00070   const arm_lms_instance_q31 * S,
00071   q31_t * pSrc,
00072   q31_t * pRef,
00073   q31_t * pOut,
00074   q31_t * pErr,
00075   uint32_t blockSize)
00076 {
00077   q31_t *pState = S->pState;                     /* State pointer */
00078   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
00079   q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
00080   q31_t *pStateCurnt;                            /* Points to the current sample of the state */
00081   q31_t mu = S->mu;                              /* Adaptive factor */
00082   q31_t *px;                                     /* Temporary pointer for state */
00083   q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
00084   uint32_t tapCnt, blkCnt;                       /* Loop counters */
00085   q63_t acc;                                     /* Accumulator */
00086   q31_t e = 0;                                   /* error of data sample */
00087   q31_t alpha;                                   /* Intermediate constant for taps update */
00088   uint8_t shift = (uint8_t) (32u - (S->postShift + 1u));        /* Shift to be applied to the output */
00089   q31_t coef;                                    /* Temporary variable for coef */
00090
00091   /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
00092   /* pStateCurnt points to the location where the new input data should be written */
00093   pStateCurnt = &(S->pState[(numTaps - 1u)]);
00094
00095   /* Initializing blkCnt with blockSize */
00096   blkCnt = blockSize;
00097
00098
00099 #ifndef ARM_MATH_CM0
00100
00101   /* Run the below code for Cortex-M4 and Cortex-M3 */
00102
00103   while(blkCnt > 0u)
00104   {
00105     /* Copy the new input sample into the state buffer */
00106     *pStateCurnt++ = *pSrc++;
00107
00108     /* Initialize state pointer */
00109     px = pState;
00110
00111     /* Initialize coefficient pointer */
00112     pb = pCoeffs;
00113
00114     /* Set the accumulator to zero */
00115     acc = 0;
00116
00117     /* Loop unrolling.  Process 4 taps at a time. */
00118     tapCnt = numTaps >> 2;
00119
00120     while(tapCnt > 0u)
00121     {
00122       /* Perform the multiply-accumulate */
00123       /* acc +=  b[N] * x[n-N] */
00124       acc += ((q63_t) (*px++)) * (*pb++);
00125
00126       /* acc +=  b[N-1] * x[n-N-1] */
00127       acc += ((q63_t) (*px++)) * (*pb++);
00128
00129       /* acc +=  b[N-2] * x[n-N-2] */
00130       acc += ((q63_t) (*px++)) * (*pb++);
00131
00132       /* acc +=  b[N-3] * x[n-N-3] */
00133       acc += ((q63_t) (*px++)) * (*pb++);
00134
00135       /* Decrement the loop counter */
00136       tapCnt--;
00137     }
00138
00139     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00140     tapCnt = numTaps % 0x4u;
00141
00142     while(tapCnt > 0u)
00143     {
00144       /* Perform the multiply-accumulate */
00145       acc += ((q63_t) (*px++)) * (*pb++);
00146
00147       /* Decrement the loop counter */
00148       tapCnt--;
00149     }
00150
00151     /* Converting the result to 1.31 format */
00152     /* Store the result from accumulator into the destination buffer. */
00153     acc = (q31_t) (acc >> shift);
00154
00155     *pOut++ = (q31_t) acc;
00156
00157     /* Compute and store error */
00158     e = *pRef++ - (q31_t) acc;
00159
00160     *pErr++ = (q31_t) e;
00161
00162     /* Compute alpha i.e. intermediate constant for taps update */
00163     alpha = (q31_t) (((q63_t) e * mu) >> 31);
00164
00165     /* Initialize state pointer */
00166     /* Advance state pointer by 1 for the next sample */
00167     px = pState++;
00168
00169     /* Initialize coefficient pointer */
00170     pb = pCoeffs;
00171
00172     /* Loop unrolling.  Process 4 taps at a time. */
00173     tapCnt = numTaps >> 2;
00174
00175     /* Update filter coefficients */
00176     while(tapCnt > 0u)
00177     {
00178       /* coef is in 2.30 format */
00179       coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
00180       /* get coef in 1.31 format by left shifting */
00181       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00182       /* update coefficient buffer to next coefficient */
00183       pb++;
00184
00185       coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
00186       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00187       pb++;
00188
00189       coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
00190       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00191       pb++;
00192
00193       coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
00194       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00195       pb++;
00196
00197       /* Decrement the loop counter */
00198       tapCnt--;
00199     }
00200
00201     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
00202     tapCnt = numTaps % 0x4u;
00203
00204     while(tapCnt > 0u)
00205     {
00206       /* Perform the multiply-accumulate */
00207       coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
00208       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
00209       pb++;
00210
00211       /* Decrement the loop counter */
00212       tapCnt--;
00213     }
00214
00215     /* Decrement the loop counter */
00216     blkCnt--;
00217   }
00218
00219   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00220      satrt of the state buffer. This prepares the state buffer for the
00221      next function call. */
00222
00223   /* Points to the start of the pState buffer */
00224   pStateCurnt = S->pState;
00225
00226   /* Loop unrolling for (numTaps - 1u) samples copy */
00227   tapCnt = (numTaps - 1u) >> 2u;
00228
00229   /* copy data */
00230   while(tapCnt > 0u)
00231   {
00232     *pStateCurnt++ = *pState++;
00233     *pStateCurnt++ = *pState++;
00234     *pStateCurnt++ = *pState++;
00235     *pStateCurnt++ = *pState++;
00236
00237     /* Decrement the loop counter */
00238     tapCnt--;
00239   }
00240
00241   /* Calculate remaining number of copies */
00242   tapCnt = (numTaps - 1u) % 0x4u;
00243
00244   /* Copy the remaining q31_t data */
00245   while(tapCnt > 0u)
00246   {
00247     *pStateCurnt++ = *pState++;
00248
00249     /* Decrement the loop counter */
00250     tapCnt--;
00251   }
00252
00253 #else
00254
00255   /* Run the below code for Cortex-M0 */
00256
00257   while(blkCnt > 0u)
00258   {
00259     /* Copy the new input sample into the state buffer */
00260     *pStateCurnt++ = *pSrc++;
00261
00262     /* Initialize pState pointer */
00263     px = pState;
00264
00265     /* Initialize pCoeffs pointer */
00266     pb = pCoeffs;
00267
00268     /* Set the accumulator to zero */
00269     acc = 0;
00270
00271     /* Loop over numTaps number of values */
00272     tapCnt = numTaps;
00273
00274     while(tapCnt > 0u)
00275     {
00276       /* Perform the multiply-accumulate */
00277       acc += ((q63_t) (*px++)) * (*pb++);
00278
00279       /* Decrement the loop counter */
00280       tapCnt--;
00281     }
00282
00283     /* Converting the result to 1.31 format */
00284     /* Store the result from accumulator into the destination buffer. */
00285     acc = (q31_t) (acc >> shift);
00286
00287     *pOut++ = (q31_t) acc;
00288
00289     /* Compute and store error */
00290     e = *pRef++ - (q31_t) acc;
00291
00292     *pErr++ = (q31_t) e;
00293
00294     /* Weighting factor for the LMS version */
00295     alpha = (q31_t) (((q63_t) e * mu) >> 31);
00296
00297     /* Initialize pState pointer */
00298     /* Advance state pointer by 1 for the next sample */
00299     px = pState++;
00300
00301     /* Initialize pCoeffs pointer */
00302     pb = pCoeffs;
00303
00304     /* Loop over numTaps number of values */
00305     tapCnt = numTaps;
00306
00307     while(tapCnt > 0u)
00308     {
00309       /* Perform the multiply-accumulate */
00310       coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
00311       *pb += (coef << 1u);
00312       pb++;
00313
00314       /* Decrement the loop counter */
00315       tapCnt--;
00316     }
00317
00318     /* Decrement the loop counter */
00319     blkCnt--;
00320   }
00321
00322   /* Processing is complete. Now copy the last numTaps - 1 samples to the
00323      start of the state buffer. This prepares the state buffer for the
00324      next function call. */
00325
00326   /* Points to the start of the pState buffer */
00327   pStateCurnt = S->pState;
00328
00329   /*  Copy (numTaps - 1u) samples  */
00330   tapCnt = (numTaps - 1u);
00331
00332   /* Copy the data */
00333   while(tapCnt > 0u)
00334   {
00335     *pStateCurnt++ = *pState++;
00336
00337     /* Decrement the loop counter */
00338     tapCnt--;
00339   }
00340
00341 #endif /*   #ifndef ARM_MATH_CM0 */
00342
00343 }
00344
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CMSIS DSP Software Library: arm_mat_add_f32.c File Reference

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arm_mat_add_f32.c File Reference

#include "arm_math.h"

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Functions

arm_status arm_mat_add_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
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CMSIS DSP Software Library: arm_mat_add_f32.c Source File

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arm_mat_add_f32.c

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00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_add_f32.c
00009 *
00010 * Description:  Floating-point matrix addition
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00068 arm_status arm_mat_add_f32(
00069   const arm_matrix_instance_f32 * pSrcA,
00070   const arm_matrix_instance_f32 * pSrcB,
00071   arm_matrix_instance_f32 * pDst)
00072 {
00073   float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A  */
00074   float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B  */
00075   float32_t *pOut = pDst->pData;                 /* output data matrix pointer   */
00076   uint32_t numSamples;                           /* total number of elements in the matrix  */
00077   uint32_t blkCnt;                               /* loop counters */
00078   arm_status status;                             /* status of matrix addition */
00079
00080 #ifdef ARM_MATH_MATRIX_CHECK
00081
00082
00083   /* Check for matrix mismatch condition */
00084   if((pSrcA->numRows != pSrcB->numRows) ||
00085      (pSrcA->numCols != pSrcB->numCols) ||
00086      (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
00087   {
00088     /* Set status as ARM_MATH_SIZE_MISMATCH */
00089     status = ARM_MATH_SIZE_MISMATCH;
00090   }
00091   else
00092 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00093
00094   {
00095
00096     /* Total number of samples in the input matrix */
00097     numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
00098
00099 #ifndef ARM_MATH_CM0
00100
00101     /* Run the below code for Cortex-M4 and Cortex-M3 */
00102
00103     /* Loop unrolling */
00104     blkCnt = numSamples >> 2u;
00105
00106     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00107      ** a second loop below computes the remaining 1 to 3 samples. */
00108     while(blkCnt > 0u)
00109     {
00110       /* C(m,n) = A(m,n) + B(m,n) */
00111       /* Add and then store the results in the destination buffer. */
00112       *pOut++ = (*pIn1++) + (*pIn2++);
00113       *pOut++ = (*pIn1++) + (*pIn2++);
00114       *pOut++ = (*pIn1++) + (*pIn2++);
00115       *pOut++ = (*pIn1++) + (*pIn2++);
00116
00117       /* Decrement the loop counter */
00118       blkCnt--;
00119     }
00120
00121     /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00122      ** No loop unrolling is used. */
00123     blkCnt = numSamples % 0x4u;
00124
00125 #else
00126
00127     /* Run the below code for Cortex-M0 */
00128
00129     /* Initialize blkCnt with number of samples */
00130     blkCnt = numSamples;
00131
00132 #endif /* #ifndef ARM_MATH_CM0 */
00133
00134     while(blkCnt > 0u)
00135     {
00136       /* C(m,n) = A(m,n) + B(m,n) */
00137       /* Add and then store the results in the destination buffer. */
00138       *pOut++ = (*pIn1++) + (*pIn2++);
00139
00140       /* Decrement the loop counter */
00141       blkCnt--;
00142     }
00143     /* set status as ARM_MATH_SUCCESS */
00144     status = ARM_MATH_SUCCESS;
00145
00146   }
00147
00148   /* Return to application */
00149   return (status);
00150 }
00151
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CMSIS DSP Software Library: arm_mat_add_q15.c File Reference

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arm_mat_add_q15.c File Reference

#include "arm_math.h"

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Functions

arm_status arm_mat_add_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst)
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CMSIS DSP Software Library: arm_mat_add_q15.c Source File

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arm_mat_add_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_add_q15.c
00009 *
00010 * Description:  Q15 matrix addition
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00061 arm_status arm_mat_add_q15(
00062   const arm_matrix_instance_q15 * pSrcA,
00063   const arm_matrix_instance_q15 * pSrcB,
00064   arm_matrix_instance_q15 * pDst)
00065 {
00066   q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A  */
00067   q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
00068   q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
00069   uint16_t numSamples;                           /* total number of elements in the matrix  */
00070   uint32_t blkCnt;                               /* loop counters  */
00071   arm_status status;                             /* status of matrix addition  */
00072
00073 #ifdef ARM_MATH_MATRIX_CHECK
00074
00075
00076   /* Check for matrix mismatch condition */
00077   if((pSrcA->numRows != pSrcB->numRows) ||
00078      (pSrcA->numCols != pSrcB->numCols) ||
00079      (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
00080   {
00081     /* Set status as ARM_MATH_SIZE_MISMATCH */
00082     status = ARM_MATH_SIZE_MISMATCH;
00083   }
00084   else
00085 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00086
00087   {
00088     /* Total number of samples in the input matrix */
00089     numSamples = (uint16_t) (pSrcA->numRows * pSrcA->numCols);
00090
00091 #ifndef ARM_MATH_CM0
00092
00093     /* Run the below code for Cortex-M4 and Cortex-M3 */
00094
00095     /* Loop unrolling */
00096     blkCnt = (uint32_t) numSamples >> 2u;
00097
00098     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00099      ** a second loop below computes the remaining 1 to 3 samples. */
00100     while(blkCnt > 0u)
00101     {
00102       /* C(m,n) = A(m,n) + B(m,n) */
00103       /* Add, Saturate and then store the results in the destination buffer. */
00104       *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
00105       *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
00106
00107       /* Decrement the loop counter */
00108       blkCnt--;
00109     }
00110
00111     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00112      ** No loop unrolling is used. */
00113     blkCnt = (uint32_t) numSamples % 0x4u;
00114
00115     /* q15 pointers of input and output are initialized */
00116
00117     while(blkCnt > 0u)
00118     {
00119       /* C(m,n) = A(m,n) + B(m,n) */
00120       /* Add, Saturate and then store the results in the destination buffer. */
00121       *pOut++ = (q15_t) __QADD16(*pInA++, *pInB++);
00122
00123       /* Decrement the loop counter */
00124       blkCnt--;
00125     }
00126
00127 #else
00128
00129     /* Run the below code for Cortex-M0 */
00130
00131     /* Initialize blkCnt with number of samples */
00132     blkCnt = (uint32_t) numSamples;
00133
00134
00135     /* q15 pointers of input and output are initialized */
00136     while(blkCnt > 0u)
00137     {
00138       /* C(m,n) = A(m,n) + B(m,n) */
00139       /* Add, Saturate and then store the results in the destination buffer. */
00140       *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ + *pInB++), 16);
00141
00142       /* Decrement the loop counter */
00143       blkCnt--;
00144     }
00145
00146 #endif /* #ifndef ARM_MATH_CM0 */
00147
00148     /* set status as ARM_MATH_SUCCESS */
00149     status = ARM_MATH_SUCCESS;
00150   }
00151
00152   /* Return to application */
00153   return (status);
00154 }
00155
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CMSIS DSP Software Library: arm_mat_add_q31.c File Reference

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arm_mat_add_q31.c File Reference

#include "arm_math.h"

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Functions

arm_status arm_mat_add_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
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CMSIS DSP Software Library: arm_mat_add_q31.c Source File

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arm_mat_add_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_add_q31.c
00009 *
00010 * Description:  Q31 matrix addition
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00061 arm_status arm_mat_add_q31(
00062   const arm_matrix_instance_q31 * pSrcA,
00063   const arm_matrix_instance_q31 * pSrcB,
00064   arm_matrix_instance_q31 * pDst)
00065 {
00066   q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
00067   q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
00068   q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
00069   uint32_t numSamples;                           /* total number of elements in the matrix  */
00070   uint32_t blkCnt;                               /* loop counters */
00071   arm_status status;                             /* status of matrix addition */
00072
00073 #ifdef ARM_MATH_MATRIX_CHECK
00074
00075
00076   /* Check for matrix mismatch condition */
00077   if((pSrcA->numRows != pSrcB->numRows) ||
00078      (pSrcA->numCols != pSrcB->numCols) ||
00079      (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
00080   {
00081     /* Set status as ARM_MATH_SIZE_MISMATCH */
00082     status = ARM_MATH_SIZE_MISMATCH;
00083   }
00084   else
00085 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00086
00087   {
00088     /* Total number of samples in the input matrix */
00089     numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
00090
00091 #ifndef ARM_MATH_CM0
00092
00093     /* Run the below code for Cortex-M4 and Cortex-M3 */
00094
00095     /* Loop Unrolling */
00096     blkCnt = numSamples >> 2u;
00097
00098
00099     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00100      ** a second loop below computes the remaining 1 to 3 samples. */
00101     while(blkCnt > 0u)
00102     {
00103       /* C(m,n) = A(m,n) + B(m,n) */
00104       /* Add, saturate and then store the results in the destination buffer. */
00105       *pOut++ = __QADD(*pIn1++, *pIn2++);
00106       *pOut++ = __QADD(*pIn1++, *pIn2++);
00107       *pOut++ = __QADD(*pIn1++, *pIn2++);
00108       *pOut++ = __QADD(*pIn1++, *pIn2++);
00109
00110       /* Decrement the loop counter */
00111       blkCnt--;
00112     }
00113
00114     /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00115      ** No loop unrolling is used. */
00116     blkCnt = numSamples % 0x4u;
00117
00118     while(blkCnt > 0u)
00119     {
00120       /* C(m,n) = A(m,n) + B(m,n) */
00121       /* Add, saturate and then store the results in the destination buffer. */
00122       *pOut++ = __QADD(*pIn1++, *pIn2++);
00123
00124       /* Decrement the loop counter */
00125       blkCnt--;
00126     }
00127
00128 #else
00129
00130     /* Run the below code for Cortex-M0 */
00131
00132     /* Initialize blkCnt with number of samples */
00133     blkCnt = numSamples;
00134
00135     while(blkCnt > 0u)
00136     {
00137       /* C(m,n) = A(m,n) + B(m,n) */
00138       /* Add, saturate and then store the results in the destination buffer. */
00139       *pOut++ = clip_q63_to_q31(((q63_t) (*pIn1++)) + (*pIn2++));
00140
00141       /* Decrement the loop counter */
00142       blkCnt--;
00143     }
00144
00145 #endif /* #ifndef ARM_MATH_CM0 */
00146
00147     /* set status as ARM_MATH_SUCCESS */
00148     status = ARM_MATH_SUCCESS;
00149   }
00150
00151   /* Return to application */
00152   return (status);
00153 }
00154
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CMSIS DSP Software Library: arm_mat_init_f32.c File Reference

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arm_mat_init_f32.c File Reference

#include "arm_math.h"

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void arm_mat_init_f32 (arm_matrix_instance_f32 *S, uint16_t nRows, uint16_t nColumns, float32_t *pData)
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CMSIS DSP Software Library: arm_mat_init_f32.c Source File

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arm_mat_init_f32.c

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00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_init_f32.c
00009 *
00010 * Description:  Floating-point matrix initialization.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00065 void arm_mat_init_f32(
00066   arm_matrix_instance_f32 * S,
00067   uint16_t nRows,
00068   uint16_t nColumns,
00069   float32_t * pData)
00070 {
00071   /* Assign Number of Rows */
00072   S->numRows = nRows;
00073
00074   /* Assign Number of Columns */
00075   S->numCols = nColumns;
00076
00077   /* Assign Data pointer */
00078   S->pData = pData;
00079 }
00080
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CMSIS DSP Software Library: arm_mat_init_q15.c File Reference

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arm_mat_init_q15.c File Reference

#include "arm_math.h"

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Functions

void arm_mat_init_q15 (arm_matrix_instance_q15 *S, uint16_t nRows, uint16_t nColumns, q15_t *pData)
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CMSIS DSP Software Library: arm_mat_init_q15.c Source File

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arm_mat_init_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_init_q15.c
00009 *
00010 * Description:  Q15 matrix initialization.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------------- */
00035
00036
00037 #include "arm_math.h"
00038
00057 void arm_mat_init_q15(
00058   arm_matrix_instance_q15 * S,
00059   uint16_t nRows,
00060   uint16_t nColumns,
00061   q15_t * pData)
00062 {
00063   /* Assign Number of Rows */
00064   S->numRows = nRows;
00065
00066   /* Assign Number of Columns */
00067   S->numCols = nColumns;
00068
00069   /* Assign Data pointer */
00070   S->pData = pData;
00071 }
00072
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CMSIS DSP Software Library: arm_mat_init_q31.c File Reference

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arm_mat_init_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_mat_init_q31 (arm_matrix_instance_q31 *S, uint16_t nRows, uint16_t nColumns, q31_t *pData)
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CMSIS DSP Software Library: arm_mat_init_q31.c Source File

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arm_mat_init_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_init_q31.c
00009 *
00010 * Description:  Q31 matrix initialization.
00011 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00012 *
00013 * Version 1.0.10 2011/7/15
00014 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00015 *
00016 * Version 1.0.3 2010/11/29
00017 *    Re-organized the CMSIS folders and updated documentation.
00018 *
00019 * Version 1.0.2 2010/11/11
00020 *    Documentation updated.
00021 *
00022 * Version 1.0.1 2010/10/05
00023 *    Production release and review comments incorporated.
00024 *
00025 * Version 1.0.0 2010/09/20
00026 *    Production release and review comments incorporated.
00027 *
00028 * Version 0.0.5  2010/04/26
00029 *    incorporated review comments and updated with latest CMSIS layer
00030 *
00031 * Version 0.0.3  2010/03/10
00032 *    Initial version
00033 * -------------------------------------------------------------------------- */
00034
00035
00036 #include "arm_math.h"
00037
00061 void arm_mat_init_q31(
00062   arm_matrix_instance_q31 * S,
00063   uint16_t nRows,
00064   uint16_t nColumns,
00065   q31_t * pData)
00066 {
00067   /* Assign Number of Rows */
00068   S->numRows = nRows;
00069
00070   /* Assign Number of Columns */
00071   S->numCols = nColumns;
00072
00073   /* Assign Data pointer */
00074   S->pData = pData;
00075 }
00076
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CMSIS DSP Software Library: arm_mat_inverse_f32.c File Reference

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arm_mat_inverse_f32.c File Reference

#include "arm_math.h"

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Functions

arm_status arm_mat_inverse_f32 (const arm_matrix_instance_f32 *pSrc, arm_matrix_instance_f32 *pDst)
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CMSIS DSP Software Library: arm_mat_inverse_f32.c Source File

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arm_mat_inverse_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_inverse_f32.c
00009 *
00010 * Description:  Floating-point matrix inverse.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00074 arm_status arm_mat_inverse_f32(
00075   const arm_matrix_instance_f32 * pSrc,
00076   arm_matrix_instance_f32 * pDst)
00077 {
00078   float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
00079   float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
00080   float32_t *pInT1, *pInT2;                      /* Temporary input data matrix pointer */
00081   float32_t *pInT3, *pInT4;                      /* Temporary output data matrix pointer */
00082   float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst;  /* Temporary input and output data matrix pointer */
00083   uint32_t numRows = pSrc->numRows;              /* Number of rows in the matrix  */
00084   uint32_t numCols = pSrc->numCols;              /* Number of Cols in the matrix  */
00085
00086 #ifndef ARM_MATH_CM0
00087
00088   /* Run the below code for Cortex-M4 and Cortex-M3 */
00089
00090   float32_t Xchg, in = 0.0f, in1;                /* Temporary input values  */
00091   uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l;      /* loop counters */
00092   arm_status status;                             /* status of matrix inverse */
00093
00094 #ifdef ARM_MATH_MATRIX_CHECK
00095
00096
00097   /* Check for matrix mismatch condition */
00098   if((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
00099      || (pSrc->numRows != pDst->numRows))
00100   {
00101     /* Set status as ARM_MATH_SIZE_MISMATCH */
00102     status = ARM_MATH_SIZE_MISMATCH;
00103   }
00104   else
00105 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00106
00107   {
00108
00109     /*--------------------------------------------------------------------------------------------------------------
00110      * Matrix Inverse can be solved using elementary row operations.
00111      *
00112      *  Gauss-Jordan Method:
00113      *
00114      *     1. First combine the identity matrix and the input matrix separated by a bar to form an
00115      *        augmented matrix as follows:
00116      *                      _                  _         _         _
00117      *                     |  a11  a12 | 1   0  |       |  X11 X12  |
00118      *                     |           |        |   =   |           |
00119      *                     |_ a21  a22 | 0   1 _|       |_ X21 X21 _|
00120      *
00121      *      2. In our implementation, pDst Matrix is used as identity matrix.
00122      *
00123      *      3. Begin with the first row. Let i = 1.
00124      *
00125      *      4. Check to see if the pivot for row i is zero.
00126      *         The pivot is the element of the main diagonal that is on the current row.
00127      *         For instance, if working with row i, then the pivot element is aii.
00128      *         If the pivot is zero, exchange that row with a row below it that does not
00129      *         contain a zero in column i. If this is not possible, then an inverse
00130      *         to that matrix does not exist.
00131      *
00132      *      5. Divide every element of row i by the pivot.
00133      *
00134      *      6. For every row below and  row i, replace that row with the sum of that row and
00135      *         a multiple of row i so that each new element in column i below row i is zero.
00136      *
00137      *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
00138      *         for every element below and above the main diagonal.
00139      *
00140      *      8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
00141      *         Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
00142      *----------------------------------------------------------------------------------------------------------------*/
00143
00144     /* Working pointer for destination matrix */
00145     pInT2 = pOut;
00146
00147     /* Loop over the number of rows */
00148     rowCnt = numRows;
00149
00150     /* Making the destination matrix as identity matrix */
00151     while(rowCnt > 0u)
00152     {
00153       /* Writing all zeroes in lower triangle of the destination matrix */
00154       j = numRows - rowCnt;
00155       while(j > 0u)
00156       {
00157         *pInT2++ = 0.0f;
00158         j--;
00159       }
00160
00161       /* Writing all ones in the diagonal of the destination matrix */
00162       *pInT2++ = 1.0f;
00163
00164       /* Writing all zeroes in upper triangle of the destination matrix */
00165       j = rowCnt - 1u;
00166       while(j > 0u)
00167       {
00168         *pInT2++ = 0.0f;
00169         j--;
00170       }
00171
00172       /* Decrement the loop counter */
00173       rowCnt--;
00174     }
00175
00176     /* Loop over the number of columns of the input matrix.
00177        All the elements in each column are processed by the row operations */
00178     loopCnt = numCols;
00179
00180     /* Index modifier to navigate through the columns */
00181     l = 0u;
00182
00183     while(loopCnt > 0u)
00184     {
00185       /* Check if the pivot element is zero..
00186        * If it is zero then interchange the row with non zero row below.
00187        * If there is no non zero element to replace in the rows below,
00188        * then the matrix is Singular. */
00189
00190       /* Working pointer for the input matrix that points
00191        * to the pivot element of the particular row  */
00192       pInT1 = pIn + (l * numCols);
00193
00194       /* Working pointer for the destination matrix that points
00195        * to the pivot element of the particular row  */
00196       pInT3 = pOut + (l * numCols);
00197
00198       /* Temporary variable to hold the pivot value */
00199       in = *pInT1;
00200
00201       /* Destination pointer modifier */
00202       k = 1u;
00203
00204       /* Check if the pivot element is zero */
00205       if(*pInT1 == 0.0f)
00206       {
00207         /* Loop over the number rows present below */
00208         i = numRows - (l + 1u);
00209
00210         while(i > 0u)
00211         {
00212           /* Update the input and destination pointers */
00213           pInT2 = pInT1 + (numCols * l);
00214           pInT4 = pInT3 + (numCols * k);
00215
00216           /* Check if there is a non zero pivot element to
00217            * replace in the rows below */
00218           if(*pInT2 != 0.0f)
00219           {
00220             /* Loop over number of columns
00221              * to the right of the pilot element */
00222             j = numCols - l;
00223
00224             while(j > 0u)
00225             {
00226               /* Exchange the row elements of the input matrix */
00227               Xchg = *pInT2;
00228               *pInT2++ = *pInT1;
00229               *pInT1++ = Xchg;
00230
00231               /* Decrement the loop counter */
00232               j--;
00233             }
00234
00235             /* Loop over number of columns of the destination matrix */
00236             j = numCols;
00237
00238             while(j > 0u)
00239             {
00240               /* Exchange the row elements of the destination matrix */
00241               Xchg = *pInT4;
00242               *pInT4++ = *pInT3;
00243               *pInT3++ = Xchg;
00244
00245               /* Decrement the loop counter */
00246               j--;
00247             }
00248
00249             /* Flag to indicate whether exchange is done or not */
00250             flag = 1u;
00251
00252             /* Break after exchange is done */
00253             break;
00254           }
00255
00256           /* Update the destination pointer modifier */
00257           k++;
00258
00259           /* Decrement the loop counter */
00260           i--;
00261         }
00262       }
00263
00264       /* Update the status if the matrix is singular */
00265       if((flag != 1u) && (in == 0.0f))
00266       {
00267         status = ARM_MATH_SINGULAR;
00268
00269         break;
00270       }
00271
00272       /* Points to the pivot row of input and destination matrices */
00273       pPivotRowIn = pIn + (l * numCols);
00274       pPivotRowDst = pOut + (l * numCols);
00275
00276       /* Temporary pointers to the pivot row pointers */
00277       pInT1 = pPivotRowIn;
00278       pInT2 = pPivotRowDst;
00279
00280       /* Pivot element of the row */
00281       in = *(pIn + (l * numCols));
00282
00283       /* Loop over number of columns
00284        * to the right of the pilot element */
00285       j = (numCols - l);
00286
00287       while(j > 0u)
00288       {
00289         /* Divide each element of the row of the input matrix
00290          * by the pivot element */
00291         in1 = *pInT1;
00292         *pInT1++ = in1 / in;
00293
00294         /* Decrement the loop counter */
00295         j--;
00296       }
00297
00298       /* Loop over number of columns of the destination matrix */
00299       j = numCols;
00300
00301       while(j > 0u)
00302       {
00303         /* Divide each element of the row of the destination matrix
00304          * by the pivot element */
00305         in1 = *pInT2;
00306         *pInT2++ = in1 / in;
00307
00308         /* Decrement the loop counter */
00309         j--;
00310       }
00311
00312       /* Replace the rows with the sum of that row and a multiple of row i
00313        * so that each new element in column i above row i is zero.*/
00314
00315       /* Temporary pointers for input and destination matrices */
00316       pInT1 = pIn;
00317       pInT2 = pOut;
00318
00319       /* index used to check for pivot element */
00320       i = 0u;
00321
00322       /* Loop over number of rows */
00323       /*  to be replaced by the sum of that row and a multiple of row i */
00324       k = numRows;
00325
00326       while(k > 0u)
00327       {
00328         /* Check for the pivot element */
00329         if(i == l)
00330         {
00331           /* If the processing element is the pivot element,
00332              only the columns to the right are to be processed */
00333           pInT1 += numCols - l;
00334
00335           pInT2 += numCols;
00336         }
00337         else
00338         {
00339           /* Element of the reference row */
00340           in = *pInT1;
00341
00342           /* Working pointers for input and destination pivot rows */
00343           pPRT_in = pPivotRowIn;
00344           pPRT_pDst = pPivotRowDst;
00345
00346           /* Loop over the number of columns to the right of the pivot element,
00347              to replace the elements in the input matrix */
00348           j = (numCols - l);
00349
00350           while(j > 0u)
00351           {
00352             /* Replace the element by the sum of that row
00353                and a multiple of the reference row  */
00354             in1 = *pInT1;
00355             *pInT1++ = in1 - (in * *pPRT_in++);
00356
00357             /* Decrement the loop counter */
00358             j--;
00359           }
00360
00361           /* Loop over the number of columns to
00362              replace the elements in the destination matrix */
00363           j = numCols;
00364
00365           while(j > 0u)
00366           {
00367             /* Replace the element by the sum of that row
00368                and a multiple of the reference row  */
00369             in1 = *pInT2;
00370             *pInT2++ = in1 - (in * *pPRT_pDst++);
00371
00372             /* Decrement the loop counter */
00373             j--;
00374           }
00375
00376         }
00377
00378         /* Increment the temporary input pointer */
00379         pInT1 = pInT1 + l;
00380
00381         /* Decrement the loop counter */
00382         k--;
00383
00384         /* Increment the pivot index */
00385         i++;
00386       }
00387
00388       /* Increment the input pointer */
00389       pIn++;
00390
00391       /* Decrement the loop counter */
00392       loopCnt--;
00393
00394       /* Increment the index modifier */
00395       l++;
00396     }
00397
00398
00399 #else
00400
00401   /* Run the below code for Cortex-M0 */
00402
00403   float32_t Xchg, in = 0.0f;                     /* Temporary input values  */
00404   uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l;      /* loop counters */
00405   arm_status status;                             /* status of matrix inverse */
00406
00407 #ifdef ARM_MATH_MATRIX_CHECK
00408
00409   /* Check for matrix mismatch condition */
00410   if((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
00411      || (pSrc->numRows != pDst->numRows))
00412   {
00413     /* Set status as ARM_MATH_SIZE_MISMATCH */
00414     status = ARM_MATH_SIZE_MISMATCH;
00415   }
00416   else
00417 #endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
00418   {
00419
00420     /*--------------------------------------------------------------------------------------------------------------
00421      * Matrix Inverse can be solved using elementary row operations.
00422      *
00423      *  Gauss-Jordan Method:
00424      *
00425      *     1. First combine the identity matrix and the input matrix separated by a bar to form an
00426      *        augmented matrix as follows:
00427      *                      _  _          _     _      _   _         _         _
00428      *                     |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |
00429      *                     |  |            | | |        |   |   =   |           |
00430      *                     |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|
00431      *
00432      *      2. In our implementation, pDst Matrix is used as identity matrix.
00433      *
00434      *      3. Begin with the first row. Let i = 1.
00435      *
00436      *      4. Check to see if the pivot for row i is zero.
00437      *         The pivot is the element of the main diagonal that is on the current row.
00438      *         For instance, if working with row i, then the pivot element is aii.
00439      *         If the pivot is zero, exchange that row with a row below it that does not
00440      *         contain a zero in column i. If this is not possible, then an inverse
00441      *         to that matrix does not exist.
00442      *
00443      *      5. Divide every element of row i by the pivot.
00444      *
00445      *      6. For every row below and  row i, replace that row with the sum of that row and
00446      *         a multiple of row i so that each new element in column i below row i is zero.
00447      *
00448      *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
00449      *         for every element below and above the main diagonal.
00450      *
00451      *      8. Now an identical matrix is formed to the left of the bar(input matrix, src).
00452      *         Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).
00453      *----------------------------------------------------------------------------------------------------------------*/
00454
00455     /* Working pointer for destination matrix */
00456     pInT2 = pOut;
00457
00458     /* Loop over the number of rows */
00459     rowCnt = numRows;
00460
00461     /* Making the destination matrix as identity matrix */
00462     while(rowCnt > 0u)
00463     {
00464       /* Writing all zeroes in lower triangle of the destination matrix */
00465       j = numRows - rowCnt;
00466       while(j > 0u)
00467       {
00468         *pInT2++ = 0.0f;
00469         j--;
00470       }
00471
00472       /* Writing all ones in the diagonal of the destination matrix */
00473       *pInT2++ = 1.0f;
00474
00475       /* Writing all zeroes in upper triangle of the destination matrix */
00476       j = rowCnt - 1u;
00477       while(j > 0u)
00478       {
00479         *pInT2++ = 0.0f;
00480         j--;
00481       }
00482
00483       /* Decrement the loop counter */
00484       rowCnt--;
00485     }
00486
00487     /* Loop over the number of columns of the input matrix.
00488        All the elements in each column are processed by the row operations */
00489     loopCnt = numCols;
00490
00491     /* Index modifier to navigate through the columns */
00492     l = 0u;
00493     //for(loopCnt = 0u; loopCnt < numCols; loopCnt++)
00494     while(loopCnt > 0u)
00495     {
00496       /* Check if the pivot element is zero..
00497        * If it is zero then interchange the row with non zero row below.
00498        * If there is no non zero element to replace in the rows below,
00499        * then the matrix is Singular. */
00500
00501       /* Working pointer for the input matrix that points
00502        * to the pivot element of the particular row  */
00503       pInT1 = pIn + (l * numCols);
00504
00505       /* Working pointer for the destination matrix that points
00506        * to the pivot element of the particular row  */
00507       pInT3 = pOut + (l * numCols);
00508
00509       /* Temporary variable to hold the pivot value */
00510       in = *pInT1;
00511
00512       /* Destination pointer modifier */
00513       k = 1u;
00514
00515       /* Check if the pivot element is zero */
00516       if(*pInT1 == 0.0f)
00517       {
00518         /* Loop over the number rows present below */
00519         for (i = (l + 1u); i < numRows; i++)
00520         {
00521           /* Update the input and destination pointers */
00522           pInT2 = pInT1 + (numCols * l);
00523           pInT4 = pInT3 + (numCols * k);
00524
00525           /* Check if there is a non zero pivot element to
00526            * replace in the rows below */
00527           if(*pInT2 != 0.0f)
00528           {
00529             /* Loop over number of columns
00530              * to the right of the pilot element */
00531             for (j = 0u; j < (numCols - l); j++)
00532             {
00533               /* Exchange the row elements of the input matrix */
00534               Xchg = *pInT2;
00535               *pInT2++ = *pInT1;
00536               *pInT1++ = Xchg;
00537             }
00538
00539             for (j = 0u; j < numCols; j++)
00540             {
00541               Xchg = *pInT4;
00542               *pInT4++ = *pInT3;
00543               *pInT3++ = Xchg;
00544             }
00545
00546             /* Flag to indicate whether exchange is done or not */
00547             flag = 1u;
00548
00549             /* Break after exchange is done */
00550             break;
00551           }
00552
00553           /* Update the destination pointer modifier */
00554           k++;
00555         }
00556       }
00557
00558       /* Update the status if the matrix is singular */
00559       if((flag != 1u) && (in == 0.0f))
00560       {
00561         status = ARM_MATH_SINGULAR;
00562
00563         break;
00564       }
00565
00566       /* Points to the pivot row of input and destination matrices */
00567       pPivotRowIn = pIn + (l * numCols);
00568       pPivotRowDst = pOut + (l * numCols);
00569
00570       /* Temporary pointers to the pivot row pointers */
00571       pInT1 = pPivotRowIn;
00572       pInT2 = pPivotRowDst;
00573
00574       /* Pivot element of the row */
00575       in = *(pIn + (l * numCols));
00576
00577       /* Loop over number of columns
00578        * to the right of the pilot element */
00579       for (j = 0u; j < (numCols - l); j++)
00580       {
00581         /* Divide each element of the row of the input matrix
00582          * by the pivot element */
00583         *pInT1++ = *pInT1 / in;
00584       }
00585       for (j = 0u; j < numCols; j++)
00586       {
00587         /* Divide each element of the row of the destination matrix
00588          * by the pivot element */
00589         *pInT2++ = *pInT2 / in;
00590       }
00591
00592       /* Replace the rows with the sum of that row and a multiple of row i
00593        * so that each new element in column i above row i is zero.*/
00594
00595       /* Temporary pointers for input and destination matrices */
00596       pInT1 = pIn;
00597       pInT2 = pOut;
00598
00599       for (i = 0u; i < numRows; i++)
00600       {
00601         /* Check for the pivot element */
00602         if(i == l)
00603         {
00604           /* If the processing element is the pivot element,
00605              only the columns to the right are to be processed */
00606           pInT1 += numCols - l;
00607           pInT2 += numCols;
00608         }
00609         else
00610         {
00611           /* Element of the reference row */
00612           in = *pInT1;
00613
00614           /* Working pointers for input and destination pivot rows */
00615           pPRT_in = pPivotRowIn;
00616           pPRT_pDst = pPivotRowDst;
00617
00618           /* Loop over the number of columns to the right of the pivot element,
00619              to replace the elements in the input matrix */
00620           for (j = 0u; j < (numCols - l); j++)
00621           {
00622             /* Replace the element by the sum of that row
00623                and a multiple of the reference row  */
00624             *pInT1++ = *pInT1 - (in * *pPRT_in++);
00625           }
00626           /* Loop over the number of columns to
00627              replace the elements in the destination matrix */
00628           for (j = 0u; j < numCols; j++)
00629           {
00630             /* Replace the element by the sum of that row
00631                and a multiple of the reference row  */
00632             *pInT2++ = *pInT2 - (in * *pPRT_pDst++);
00633           }
00634
00635         }
00636         /* Increment the temporary input pointer */
00637         pInT1 = pInT1 + l;
00638       }
00639       /* Increment the input pointer */
00640       pIn++;
00641
00642       /* Decrement the loop counter */
00643       loopCnt--;
00644       /* Increment the index modifier */
00645       l++;
00646     }
00647
00648
00649 #endif /* #ifndef ARM_MATH_CM0 */
00650
00651     /* Set status as ARM_MATH_SUCCESS */
00652     status = ARM_MATH_SUCCESS;
00653
00654     if((flag != 1u) && (in == 0.0f))
00655     {
00656       status = ARM_MATH_SINGULAR;
00657     }
00658   }
00659   /* Return to application */
00660   return (status);
00661 }
00662
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CMSIS DSP Software Library: arm_mat_mult_f32.c File Reference

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arm_mat_mult_f32.c File Reference

#include "arm_math.h"

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Functions

arm_status arm_mat_mult_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
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CMSIS DSP Software Library: arm_mat_mult_f32.c Source File

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arm_mat_mult_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_mult_f32.c
00009 *
00010 * Description:  Floating-point matrix multiplication.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00073 arm_status arm_mat_mult_f32(
00074   const arm_matrix_instance_f32 * pSrcA,
00075   const arm_matrix_instance_f32 * pSrcB,
00076   arm_matrix_instance_f32 * pDst)
00077 {
00078   float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
00079   float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
00080   float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A  */
00081   float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
00082   float32_t *px;                                 /* Temporary output data matrix pointer */
00083   float32_t sum;                                 /* Accumulator */
00084   uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
00085   uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
00086   uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
00087
00088 #ifndef ARM_MATH_CM0
00089
00090   /* Run the below code for Cortex-M4 and Cortex-M3 */
00091
00092   uint16_t col, i = 0u, j, row = numRowsA, colCnt;      /* loop counters */
00093   arm_status status;                             /* status of matrix multiplication */
00094
00095 #ifdef ARM_MATH_MATRIX_CHECK
00096
00097
00098   /* Check for matrix mismatch condition */
00099   if((pSrcA->numCols != pSrcB->numRows) ||
00100      (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
00101   {
00102
00103     /* Set status as ARM_MATH_SIZE_MISMATCH */
00104     status = ARM_MATH_SIZE_MISMATCH;
00105   }
00106   else
00107 #endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
00108
00109   {
00110     /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
00111     /* row loop */
00112     do
00113     {
00114       /* Output pointer is set to starting address of the row being processed */
00115       px = pOut + i;
00116
00117       /* For every row wise process, the column loop counter is to be initiated */
00118       col = numColsB;
00119
00120       /* For every row wise process, the pIn2 pointer is set
00121        ** to the starting address of the pSrcB data */
00122       pIn2 = pSrcB->pData;
00123
00124       j = 0u;
00125
00126       /* column loop */
00127       do
00128       {
00129         /* Set the variable sum, that acts as accumulator, to zero */
00130         sum = 0.0f;
00131
00132         /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
00133         pIn1 = pInA;
00134
00135         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00136         colCnt = numColsA >> 2;
00137
00138         /* matrix multiplication        */
00139         while(colCnt > 0u)
00140         {
00141           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00142           sum += *pIn1++ * (*pIn2);
00143           pIn2 += numColsB;
00144           sum += *pIn1++ * (*pIn2);
00145           pIn2 += numColsB;
00146           sum += *pIn1++ * (*pIn2);
00147           pIn2 += numColsB;
00148           sum += *pIn1++ * (*pIn2);
00149           pIn2 += numColsB;
00150
00151           /* Decrement the loop count */
00152           colCnt--;
00153         }
00154
00155         /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
00156          ** No loop unrolling is used. */
00157         colCnt = numColsA % 0x4u;
00158
00159         while(colCnt > 0u)
00160         {
00161           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00162           sum += *pIn1++ * (*pIn2);
00163           pIn2 += numColsB;
00164
00165           /* Decrement the loop counter */
00166           colCnt--;
00167         }
00168
00169         /* Store the result in the destination buffer */
00170         *px++ = sum;
00171
00172         /* Update the pointer pIn2 to point to the  starting address of the next column */
00173         j++;
00174         pIn2 = pSrcB->pData + j;
00175
00176         /* Decrement the column loop counter */
00177         col--;
00178
00179       } while(col > 0u);
00180
00181 #else
00182
00183   /* Run the below code for Cortex-M0 */
00184
00185   float32_t *pInB = pSrcB->pData;                /* input data matrix pointer B */
00186   uint16_t col, i = 0u, row = numRowsA, colCnt;  /* loop counters */
00187   arm_status status;                             /* status of matrix multiplication */
00188
00189 #ifdef ARM_MATH_MATRIX_CHECK
00190
00191   /* Check for matrix mismatch condition */
00192   if((pSrcA->numCols != pSrcB->numRows) ||
00193      (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
00194   {
00195
00196     /* Set status as ARM_MATH_SIZE_MISMATCH */
00197     status = ARM_MATH_SIZE_MISMATCH;
00198   }
00199   else
00200 #endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
00201
00202   {
00203     /* The following loop performs the dot-product of each row in pInA with each column in pInB */
00204     /* row loop */
00205     do
00206     {
00207       /* Output pointer is set to starting address of the row being processed */
00208       px = pOut + i;
00209
00210       /* For every row wise process, the column loop counter is to be initiated */
00211       col = numColsB;
00212
00213       /* For every row wise process, the pIn2 pointer is set
00214        ** to the starting address of the pSrcB data */
00215       pIn2 = pSrcB->pData;
00216
00217       /* column loop */
00218       do
00219       {
00220         /* Set the variable sum, that acts as accumulator, to zero */
00221         sum = 0.0f;
00222
00223         /* Initialize the pointer pIn1 to point to the starting address of the row being processed */
00224         pIn1 = pInA;
00225
00226         /* Matrix A columns number of MAC operations are to be performed */
00227         colCnt = numColsA;
00228
00229         while(colCnt > 0u)
00230         {
00231           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00232           sum += *pIn1++ * (*pIn2);
00233           pIn2 += numColsB;
00234
00235           /* Decrement the loop counter */
00236           colCnt--;
00237         }
00238
00239         /* Store the result in the destination buffer */
00240         *px++ = sum;
00241
00242         /* Decrement the column loop counter */
00243         col--;
00244
00245         /* Update the pointer pIn2 to point to the  starting address of the next column */
00246         pIn2 = pInB + (numColsB - col);
00247
00248       } while(col > 0u);
00249
00250 #endif /* #ifndef ARM_MATH_CM0 */
00251
00252       /* Update the pointer pInA to point to the  starting address of the next row */
00253       i = i + numColsB;
00254       pInA = pInA + numColsA;
00255
00256       /* Decrement the row loop counter */
00257       row--;
00258
00259     } while(row > 0u);
00260     /* Set status as ARM_MATH_SUCCESS */
00261     status = ARM_MATH_SUCCESS;
00262   }
00263
00264   /* Return to application */
00265   return (status);
00266 }
00267
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CMSIS DSP Software Library: arm_mat_mult_fast_q15.c File Reference

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arm_mat_mult_fast_q15.c File Reference

#include "arm_math.h"

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Functions

arm_status arm_mat_mult_fast_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pState)
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CMSIS DSP Software Library: arm_mat_mult_fast_q15.c Source File

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arm_mat_mult_fast_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_mult_fast_q15.c
00009 *
00010 * Description:   Q15 matrix multiplication (fast variant)
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00074 arm_status arm_mat_mult_fast_q15(
00075   const arm_matrix_instance_q15 * pSrcA,
00076   const arm_matrix_instance_q15 * pSrcB,
00077   arm_matrix_instance_q15 * pDst,
00078   q15_t * pState)
00079 {
00080   q31_t sum;                                     /* accumulator */
00081   q31_t in;                                      /* Temporary variable to hold the input value */
00082   q15_t *pSrcBT = pState;                        /* input data matrix pointer for transpose */
00083   q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
00084   q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
00085 //  q15_t *pDst = pDst->pData;                   /* output data matrix pointer */
00086   q15_t *px;                                     /* Temporary output data matrix pointer */
00087   uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
00088   uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
00089   uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
00090   uint16_t numRowsB = pSrcB->numRows;            /* number of rows of input matrix A    */
00091   uint16_t col, i = 0u, row = numRowsB, colCnt;  /* loop counters */
00092   arm_status status;                             /* status of matrix multiplication */
00093
00094 #ifdef ARM_MATH_MATRIX_CHECK
00095
00096
00097   /* Check for matrix mismatch condition */
00098
00099   if((pSrcA->numCols != pSrcB->numRows) ||
00100      (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
00101   {
00102     /* Set status as ARM_MATH_SIZE_MISMATCH */
00103     status = ARM_MATH_SIZE_MISMATCH;
00104   }
00105   else
00106 #endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
00107
00108   {
00109     /* Matrix transpose */
00110     do
00111     {
00112       /* Apply loop unrolling and exchange the columns with row elements */
00113       col = numColsB >> 2;
00114
00115       /* The pointer px is set to starting address of the column being processed */
00116       px = pSrcBT + i;
00117
00118       /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00119        ** a second loop below computes the remaining 1 to 3 samples. */
00120       while(col > 0u)
00121       {
00122         /* Read two elements from the row */
00123         in = *__SIMD32(pInB)++;
00124
00125         /* Unpack and store one element in the destination */
00126 #ifndef ARM_MATH_BIG_ENDIAN
00127
00128         *px = (q15_t) in;
00129
00130 #else
00131
00132         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00133
00134 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00135
00136         /* Update the pointer px to point to the next row of the transposed matrix */
00137         px += numRowsB;
00138
00139         /* Unpack and store the second element in the destination */
00140 #ifndef ARM_MATH_BIG_ENDIAN
00141
00142         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00143
00144 #else
00145
00146         *px = (q15_t) in;
00147
00148 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00149
00150
00151         /* Update the pointer px to point to the next row of the transposed matrix */
00152         px += numRowsB;
00153
00154         /* Read two elements from the row */
00155         in = *__SIMD32(pInB)++;
00156
00157         /* Unpack and store one element in the destination */
00158 #ifndef ARM_MATH_BIG_ENDIAN
00159
00160         *px = (q15_t) in;
00161
00162 #else
00163
00164         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00165
00166 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00167
00168         /* Update the pointer px to point to the next row of the transposed matrix */
00169         px += numRowsB;
00170
00171         /* Unpack and store the second element in the destination */
00172
00173 #ifndef ARM_MATH_BIG_ENDIAN
00174
00175         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00176
00177 #else
00178
00179         *px = (q15_t) in;
00180
00181 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00182
00183         /* Update the pointer px to point to the next row of the transposed matrix */
00184         px += numRowsB;
00185
00186         /* Decrement the column loop counter */
00187         col--;
00188       }
00189
00190       /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
00191        ** No loop unrolling is used. */
00192       col = numColsB % 0x4u;
00193
00194       while(col > 0u)
00195       {
00196         /* Read and store the input element in the destination */
00197         *px = *pInB++;
00198
00199         /* Update the pointer px to point to the next row of the transposed matrix */
00200         px += numRowsB;
00201
00202         /* Decrement the column loop counter */
00203         col--;
00204       }
00205
00206       i++;
00207
00208       /* Decrement the row loop counter */
00209       row--;
00210
00211     } while(row > 0u);
00212
00213     /* Reset the variables for the usage in the following multiplication process */
00214     row = numRowsA;
00215     i = 0u;
00216     px = pDst->pData;
00217
00218     /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
00219     /* row loop */
00220     do
00221     {
00222       /* For every row wise process, the column loop counter is to be initiated */
00223       col = numColsB;
00224
00225       /* For every row wise process, the pIn2 pointer is set
00226        ** to the starting address of the transposed pSrcB data */
00227       pInB = pSrcBT;
00228
00229       /* column loop */
00230       do
00231       {
00232         /* Set the variable sum, that acts as accumulator, to zero */
00233         sum = 0;
00234
00235         /* Apply loop unrolling and compute 2 MACs simultaneously. */
00236         colCnt = numColsA >> 1;
00237
00238         /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
00239         pInA = pSrcA->pData + i;
00240
00241         /* matrix multiplication */
00242         while(colCnt > 0u)
00243         {
00244           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00245           sum = __SMLAD(*__SIMD32(pInA)++, *__SIMD32(pInB)++, sum);
00246
00247           /* Decrement the loop counter */
00248           colCnt--;
00249         }
00250
00251         /* process odd column samples */
00252         if((numColsA & 0x1u) > 0u)
00253         {
00254           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00255           sum += ((q31_t) * pInA * (*pInB++));
00256         }
00257
00258         /* Saturate and store the result in the destination buffer */
00259         *px = (q15_t) (sum >> 15);
00260         px++;
00261
00262         /* Decrement the column loop counter */
00263         col--;
00264
00265       } while(col > 0u);
00266
00267       i = i + numColsA;
00268
00269       /* Decrement the row loop counter */
00270       row--;
00271
00272     } while(row > 0u);
00273
00274     /* set status as ARM_MATH_SUCCESS */
00275     status = ARM_MATH_SUCCESS;
00276   }
00277
00278   /* Return to application */
00279   return (status);
00280 }
00281
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CMSIS DSP Software Library: arm_mat_mult_fast_q31.c File Reference

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arm_mat_mult_fast_q31.c File Reference

#include "arm_math.h"

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Functions

arm_status arm_mat_mult_fast_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
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CMSIS DSP Software Library: arm_mat_mult_fast_q31.c Source File

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arm_mat_mult_fast_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_mult_fast_q31.c
00009 *
00010 * Description:   Q31 matrix multiplication (fast variant).
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00072 arm_status arm_mat_mult_fast_q31(
00073   const arm_matrix_instance_q31 * pSrcA,
00074   const arm_matrix_instance_q31 * pSrcB,
00075   arm_matrix_instance_q31 * pDst)
00076 {
00077   q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
00078   q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
00079   q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
00080 //  q31_t *pSrcB = pSrcB->pData;                    /* input data matrix pointer B */
00081   q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
00082   q31_t *px;                                     /* Temporary output data matrix pointer */
00083   q31_t sum;                                     /* Accumulator */
00084   uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
00085   uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
00086   uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
00087   uint16_t col, i = 0u, j, row = numRowsA, colCnt;      /* loop counters */
00088   arm_status status;                             /* status of matrix multiplication */
00089
00090
00091 #ifdef ARM_MATH_MATRIX_CHECK
00092
00093
00094   /* Check for matrix mismatch condition */
00095   if((pSrcA->numCols != pSrcB->numRows) ||
00096      (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
00097   {
00098     /* Set status as ARM_MATH_SIZE_MISMATCH */
00099     status = ARM_MATH_SIZE_MISMATCH;
00100   }
00101   else
00102 #endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
00103
00104   {
00105     /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
00106     /* row loop */
00107     do
00108     {
00109       /* Output pointer is set to starting address of the row being processed */
00110       px = pOut + i;
00111
00112       /* For every row wise process, the column loop counter is to be initiated */
00113       col = numColsB;
00114
00115       /* For every row wise process, the pIn2 pointer is set
00116        ** to the starting address of the pSrcB data */
00117       pIn2 = pSrcB->pData;
00118
00119       j = 0u;
00120
00121       /* column loop */
00122       do
00123       {
00124         /* Set the variable sum, that acts as accumulator, to zero */
00125         sum = 0;
00126
00127         /* Initiate the pointer pIn1 to point to the starting address of pInA */
00128         pIn1 = pInA;
00129
00130         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00131         colCnt = numColsA >> 2;
00132
00133
00134         /* matrix multiplication */
00135         while(colCnt > 0u)
00136         {
00137           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00138           /* Perform the multiply-accumulates */
00139           sum = (q31_t) ((((q63_t) sum << 32) +
00140                           ((q63_t) * pIn1++ * (*pIn2))) >> 32);
00141           pIn2 += numColsB;
00142           sum = (q31_t) ((((q63_t) sum << 32) +
00143                           ((q63_t) * pIn1++ * (*pIn2))) >> 32);
00144           pIn2 += numColsB;
00145           sum = (q31_t) ((((q63_t) sum << 32) +
00146                           ((q63_t) * pIn1++ * (*pIn2))) >> 32);
00147           pIn2 += numColsB;
00148           sum = (q31_t) ((((q63_t) sum << 32) +
00149                           ((q63_t) * pIn1++ * (*pIn2))) >> 32);
00150           pIn2 += numColsB;
00151
00152           /* Decrement the loop counter */
00153           colCnt--;
00154         }
00155
00156         /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here.
00157          ** No loop unrolling is used. */
00158         colCnt = numColsA % 0x4u;
00159
00160         while(colCnt > 0u)
00161         {
00162           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00163           /* Perform the multiply-accumulates */
00164           sum = (q31_t) ((((q63_t) sum << 32) +
00165                           ((q63_t) * pIn1++ * (*pIn2))) >> 32);
00166           pIn2 += numColsB;
00167
00168           /* Decrement the loop counter */
00169           colCnt--;
00170         }
00171
00172         /* Convert the result from 2.30 to 1.31 format and store in destination buffer */
00173         *px++ = sum << 1;
00174
00175         /* Update the pointer pIn2 to point to the  starting address of the next column */
00176         j++;
00177         pIn2 = pSrcB->pData + j;
00178
00179         /* Decrement the column loop counter */
00180         col--;
00181
00182       } while(col > 0u);
00183
00184       /* Update the pointer pInA to point to the  starting address of the next row */
00185       i = i + numColsB;
00186       pInA = pInA + numColsA;
00187
00188       /* Decrement the row loop counter */
00189       row--;
00190
00191     } while(row > 0u);
00192
00193     /* set status as ARM_MATH_SUCCESS */
00194     status = ARM_MATH_SUCCESS;
00195   }
00196   /* Return to application */
00197   return (status);
00198 }
00199
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CMSIS DSP Software Library: arm_mat_mult_q15.c File Reference

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arm_mat_mult_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_mult_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pState)
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CMSIS DSP Software Library: arm_mat_mult_q15.c Source File

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arm_mat_mult_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_mult_q15.c
00009 *
00010 * Description:   Q15 matrix multiplication.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00074 arm_status arm_mat_mult_q15(
00075   const arm_matrix_instance_q15 * pSrcA,
00076   const arm_matrix_instance_q15 * pSrcB,
00077   arm_matrix_instance_q15 * pDst,
00078   q15_t * pState)
00079 {
00080   q63_t sum;                                     /* accumulator */
00081
00082 #ifndef ARM_MATH_CM0
00083
00084   /* Run the below code for Cortex-M4 and Cortex-M3 */
00085
00086   q31_t in;                                      /* Temporary variable to hold the input value */
00087   q15_t *pSrcBT = pState;                        /* input data matrix pointer for transpose */
00088   q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
00089   q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
00090   q15_t *px;                                     /* Temporary output data matrix pointer */
00091   uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
00092   uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
00093   uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
00094   uint16_t numRowsB = pSrcB->numRows;            /* number of rows of input matrix A    */
00095   uint16_t col, i = 0u, row = numRowsB, colCnt;  /* loop counters */
00096   arm_status status;                             /* status of matrix multiplication */
00097
00098 #ifdef ARM_MATH_MATRIX_CHECK
00099
00100
00101   /* Check for matrix mismatch condition */
00102
00103   if((pSrcA->numCols != pSrcB->numRows) ||
00104      (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
00105   {
00106     /* Set status as ARM_MATH_SIZE_MISMATCH */
00107     status = ARM_MATH_SIZE_MISMATCH;
00108   }
00109   else
00110 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00111
00112   {
00113     /* Matrix transpose */
00114     do
00115     {
00116       /* Apply loop unrolling and exchange the columns with row elements */
00117       col = numColsB >> 2;
00118
00119       /* The pointer px is set to starting address of the column being processed */
00120       px = pSrcBT + i;
00121
00122       /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00123        ** a second loop below computes the remaining 1 to 3 samples. */
00124       while(col > 0u)
00125       {
00126         /* Read two elements from the row */
00127         in = *__SIMD32(pInB)++;
00128
00129         /* Unpack and store one element in the destination */
00130 #ifndef ARM_MATH_BIG_ENDIAN
00131
00132         *px = (q15_t) in;
00133
00134 #else
00135
00136         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00137
00138 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00139
00140         /* Update the pointer px to point to the next row of the transposed matrix */
00141         px += numRowsB;
00142
00143         /* Unpack and store the second element in the destination */
00144 #ifndef ARM_MATH_BIG_ENDIAN
00145
00146         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00147
00148 #else
00149
00150         *px = (q15_t) in;
00151
00152 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00153
00154
00155         /* Update the pointer px to point to the next row of the transposed matrix */
00156         px += numRowsB;
00157
00158         /* Read two elements from the row */
00159         in = *__SIMD32(pInB)++;
00160
00161         /* Unpack and store one element in the destination */
00162 #ifndef ARM_MATH_BIG_ENDIAN
00163
00164         *px = (q15_t) in;
00165
00166 #else
00167
00168         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00169
00170 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00171
00172         /* Update the pointer px to point to the next row of the transposed matrix */
00173         px += numRowsB;
00174
00175         /* Unpack and store the second element in the destination */
00176
00177 #ifndef ARM_MATH_BIG_ENDIAN
00178
00179         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00180
00181 #else
00182
00183         *px = (q15_t) in;
00184
00185 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00186
00187         /* Update the pointer px to point to the next row of the transposed matrix */
00188         px += numRowsB;
00189
00190         /* Decrement the column loop counter */
00191         col--;
00192       }
00193
00194       /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
00195        ** No loop unrolling is used. */
00196       col = numColsB % 0x4u;
00197
00198       while(col > 0u)
00199       {
00200         /* Read and store the input element in the destination */
00201         *px = *pInB++;
00202
00203         /* Update the pointer px to point to the next row of the transposed matrix */
00204         px += numRowsB;
00205
00206         /* Decrement the column loop counter */
00207         col--;
00208       }
00209
00210       i++;
00211
00212       /* Decrement the row loop counter */
00213       row--;
00214
00215     } while(row > 0u);
00216
00217     /* Reset the variables for the usage in the following multiplication process */
00218     row = numRowsA;
00219     i = 0u;
00220     px = pDst->pData;
00221
00222     /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
00223     /* row loop */
00224     do
00225     {
00226       /* For every row wise process, the column loop counter is to be initiated */
00227       col = numColsB;
00228
00229       /* For every row wise process, the pIn2 pointer is set
00230        ** to the starting address of the transposed pSrcB data */
00231       pInB = pSrcBT;
00232
00233       /* column loop */
00234       do
00235       {
00236         /* Set the variable sum, that acts as accumulator, to zero */
00237         sum = 0;
00238
00239         /* Apply loop unrolling and compute 2 MACs simultaneously. */
00240         colCnt = numColsA >> 1;
00241
00242         /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
00243         pInA = pSrcA->pData + i;
00244
00245         /* matrix multiplication */
00246         while(colCnt > 0u)
00247         {
00248           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00249           sum = __SMLALD(*__SIMD32(pInA)++, *__SIMD32(pInB)++, sum);
00250
00251           /* Decrement the loop counter */
00252           colCnt--;
00253         }
00254
00255         /* process odd column samples */
00256         if((numColsA & 0x1u) > 0u)
00257         {
00258           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00259           sum += ((q31_t) * pInA * (*pInB++));
00260         }
00261
00262         /* Saturate and store the result in the destination buffer */
00263         *px = (q15_t) (__SSAT((sum >> 15), 16));
00264         px++;
00265
00266         /* Decrement the column loop counter */
00267         col--;
00268
00269       } while(col > 0u);
00270
00271       i = i + numColsA;
00272
00273       /* Decrement the row loop counter */
00274       row--;
00275
00276     } while(row > 0u);
00277
00278 #else
00279
00280   /* Run the below code for Cortex-M0 */
00281
00282   q15_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
00283   q15_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
00284   q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
00285   q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
00286   q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
00287   q15_t *px;                                     /* Temporary output data matrix pointer */
00288   uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
00289   uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
00290   uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
00291   uint16_t col, i = 0u, row = numRowsA, colCnt;  /* loop counters */
00292   arm_status status;                             /* status of matrix multiplication */
00293
00294 #ifdef ARM_MATH_MATRIX_CHECK
00295
00296   /* Check for matrix mismatch condition */
00297   if((pSrcA->numCols != pSrcB->numRows) ||
00298      (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
00299   {
00300     /* Set status as ARM_MATH_SIZE_MISMATCH */
00301     status = ARM_MATH_SIZE_MISMATCH;
00302   }
00303   else
00304 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00305
00306   {
00307     /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
00308     /* row loop */
00309     do
00310     {
00311       /* Output pointer is set to starting address of the row being processed */
00312       px = pOut + i;
00313
00314       /* For every row wise process, the column loop counter is to be initiated */
00315       col = numColsB;
00316
00317       /* For every row wise process, the pIn2 pointer is set
00318        ** to the starting address of the pSrcB data */
00319       pIn2 = pSrcB->pData;
00320
00321       /* column loop */
00322       do
00323       {
00324         /* Set the variable sum, that acts as accumulator, to zero */
00325         sum = 0;
00326
00327         /* Initiate the pointer pIn1 to point to the starting address of pSrcA */
00328         pIn1 = pInA;
00329
00330         /* Matrix A columns number of MAC operations are to be performed */
00331         colCnt = numColsA;
00332
00333         /* matrix multiplication */
00334         while(colCnt > 0u)
00335         {
00336           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00337           /* Perform the multiply-accumulates */
00338           sum += (q31_t) * pIn1++ * *pIn2;
00339           pIn2 += numColsB;
00340
00341           /* Decrement the loop counter */
00342           colCnt--;
00343         }
00344
00345         /* Convert the result from 34.30 to 1.15 format and store the saturated value in destination buffer */
00346         /* Saturate and store the result in the destination buffer */
00347         *px++ = (q15_t) __SSAT((sum >> 15), 16);
00348
00349         /* Decrement the column loop counter */
00350         col--;
00351
00352         /* Update the pointer pIn2 to point to the  starting address of the next column */
00353         pIn2 = pInB + (numColsB - col);
00354
00355       } while(col > 0u);
00356
00357       /* Update the pointer pSrcA to point to the  starting address of the next row */
00358       i = i + numColsB;
00359       pInA = pInA + numColsA;
00360
00361       /* Decrement the row loop counter */
00362       row--;
00363
00364     } while(row > 0u);
00365
00366 #endif /* #ifndef ARM_MATH_CM0 */
00367
00368     /* set status as ARM_MATH_SUCCESS */
00369     status = ARM_MATH_SUCCESS;
00370   }
00371
00372   /* Return to application */
00373   return (status);
00374 }
00375
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CMSIS DSP Software Library: arm_mat_mult_q31.c File Reference

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arm_mat_mult_q31.c File Reference

#include "arm_math.h"

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Functions

arm_status arm_mat_mult_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
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CMSIS DSP Software Library: arm_mat_mult_q31.c Source File

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arm_mat_mult_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_mult_q31.c
00009 *
00010 * Description:   Q31 matrix multiplication.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00073 arm_status arm_mat_mult_q31(
00074   const arm_matrix_instance_q31 * pSrcA,
00075   const arm_matrix_instance_q31 * pSrcB,
00076   arm_matrix_instance_q31 * pDst)
00077 {
00078   q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
00079   q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
00080   q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
00081   q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
00082   q31_t *px;                                     /* Temporary output data matrix pointer */
00083   q63_t sum;                                     /* Accumulator */
00084   uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
00085   uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
00086   uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
00087
00088 #ifndef ARM_MATH_CM0
00089
00090   /* Run the below code for Cortex-M4 and Cortex-M3 */
00091
00092   uint16_t col, i = 0u, j, row = numRowsA, colCnt;      /* loop counters */
00093   arm_status status;                             /* status of matrix multiplication */
00094
00095
00096 #ifdef ARM_MATH_MATRIX_CHECK
00097
00098
00099   /* Check for matrix mismatch condition */
00100   if((pSrcA->numCols != pSrcB->numRows) ||
00101      (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
00102   {
00103     /* Set status as ARM_MATH_SIZE_MISMATCH */
00104     status = ARM_MATH_SIZE_MISMATCH;
00105   }
00106   else
00107 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00108
00109   {
00110     /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
00111     /* row loop */
00112     do
00113     {
00114       /* Output pointer is set to starting address of the row being processed */
00115       px = pOut + i;
00116
00117       /* For every row wise process, the column loop counter is to be initiated */
00118       col = numColsB;
00119
00120       /* For every row wise process, the pIn2 pointer is set
00121        ** to the starting address of the pSrcB data */
00122       pIn2 = pSrcB->pData;
00123
00124       j = 0u;
00125
00126       /* column loop */
00127       do
00128       {
00129         /* Set the variable sum, that acts as accumulator, to zero */
00130         sum = 0;
00131
00132         /* Initiate the pointer pIn1 to point to the starting address of pInA */
00133         pIn1 = pInA;
00134
00135         /* Apply loop unrolling and compute 4 MACs simultaneously. */
00136         colCnt = numColsA >> 2;
00137
00138
00139         /* matrix multiplication */
00140         while(colCnt > 0u)
00141         {
00142           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00143           /* Perform the multiply-accumulates */
00144           sum += (q63_t) * pIn1++ * *pIn2;
00145           pIn2 += numColsB;
00146
00147           sum += (q63_t) * pIn1++ * *pIn2;
00148           pIn2 += numColsB;
00149
00150           sum += (q63_t) * pIn1++ * *pIn2;
00151           pIn2 += numColsB;
00152
00153           sum += (q63_t) * pIn1++ * *pIn2;
00154           pIn2 += numColsB;
00155
00156           /* Decrement the loop counter */
00157           colCnt--;
00158         }
00159
00160         /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here.
00161          ** No loop unrolling is used. */
00162         colCnt = numColsA % 0x4u;
00163
00164         while(colCnt > 0u)
00165         {
00166           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00167           /* Perform the multiply-accumulates */
00168           sum += (q63_t) * pIn1++ * *pIn2;
00169           pIn2 += numColsB;
00170
00171           /* Decrement the loop counter */
00172           colCnt--;
00173         }
00174
00175         /* Convert the result from 2.62 to 1.31 format and store in destination buffer */
00176         *px++ = (q31_t) (sum >> 31);
00177
00178         /* Update the pointer pIn2 to point to the  starting address of the next column */
00179         j++;
00180         pIn2 = (pSrcB->pData) + j;
00181
00182         /* Decrement the column loop counter */
00183         col--;
00184
00185       } while(col > 0u);
00186
00187 #else
00188
00189   /* Run the below code for Cortex-M0 */
00190
00191   q31_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
00192   uint16_t col, i = 0u, row = numRowsA, colCnt;  /* loop counters */
00193   arm_status status;                             /* status of matrix multiplication */
00194
00195
00196 #ifdef ARM_MATH_MATRIX_CHECK
00197
00198   /* Check for matrix mismatch condition */
00199   if((pSrcA->numCols != pSrcB->numRows) ||
00200      (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
00201   {
00202     /* Set status as ARM_MATH_SIZE_MISMATCH */
00203     status = ARM_MATH_SIZE_MISMATCH;
00204   }
00205   else
00206 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00207
00208   {
00209     /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
00210     /* row loop */
00211     do
00212     {
00213       /* Output pointer is set to starting address of the row being processed */
00214       px = pOut + i;
00215
00216       /* For every row wise process, the column loop counter is to be initiated */
00217       col = numColsB;
00218
00219       /* For every row wise process, the pIn2 pointer is set
00220        ** to the starting address of the pSrcB data */
00221       pIn2 = pSrcB->pData;
00222
00223       /* column loop */
00224       do
00225       {
00226         /* Set the variable sum, that acts as accumulator, to zero */
00227         sum = 0;
00228
00229         /* Initiate the pointer pIn1 to point to the starting address of pInA */
00230         pIn1 = pInA;
00231
00232         /* Matrix A columns number of MAC operations are to be performed */
00233         colCnt = numColsA;
00234
00235         /* matrix multiplication */
00236         while(colCnt > 0u)
00237         {
00238           /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
00239           /* Perform the multiply-accumulates */
00240           sum += (q63_t) * pIn1++ * *pIn2;
00241           pIn2 += numColsB;
00242
00243           /* Decrement the loop counter */
00244           colCnt--;
00245         }
00246
00247         /* Convert the result from 2.62 to 1.31 format and store in destination buffer */
00248         *px++ = (q31_t) (sum >> 31);
00249
00250         /* Decrement the column loop counter */
00251         col--;
00252
00253         /* Update the pointer pIn2 to point to the  starting address of the next column */
00254         pIn2 = pInB + (numColsB - col);
00255
00256       } while(col > 0u);
00257
00258 #endif
00259
00260       /* Update the pointer pInA to point to the  starting address of the next row */
00261       i = i + numColsB;
00262       pInA = pInA + numColsA;
00263
00264       /* Decrement the row loop counter */
00265       row--;
00266
00267     } while(row > 0u);
00268
00269     /* set status as ARM_MATH_SUCCESS */
00270     status = ARM_MATH_SUCCESS;
00271   }
00272   /* Return to application */
00273   return (status);
00274 }
00275
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CMSIS DSP Software Library: arm_mat_scale_f32.c File Reference

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arm_mat_scale_f32.c File Reference

#include "arm_math.h"

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Functions

arm_status arm_mat_scale_f32 (const arm_matrix_instance_f32 *pSrc, float32_t scale, arm_matrix_instance_f32 *pDst)
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CMSIS DSP Software Library: arm_mat_scale_f32.c Source File

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arm_mat_scale_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_scale_f32.c
00009 *
00010 * Description:  Multiplies a floating-point matrix by a scalar.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00075 arm_status arm_mat_scale_f32(
00076   const arm_matrix_instance_f32 * pSrc,
00077   float32_t scale,
00078   arm_matrix_instance_f32 * pDst)
00079 {
00080   float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
00081   float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
00082   uint32_t numSamples;                           /* total number of elements in the matrix */
00083   uint32_t blkCnt;                               /* loop counters */
00084   arm_status status;                             /* status of matrix scaling     */
00085
00086 #ifdef ARM_MATH_MATRIX_CHECK
00087
00088
00089   /* Check for matrix mismatch condition */
00090   if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
00091   {
00092     /* Set status as ARM_MATH_SIZE_MISMATCH */
00093     status = ARM_MATH_SIZE_MISMATCH;
00094   }
00095   else
00096 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00097
00098   {
00099     /* Total number of samples in the input matrix */
00100     numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
00101
00102 #ifndef ARM_MATH_CM0
00103
00104     /* Run the below code for Cortex-M4 and Cortex-M3 */
00105
00106     /* Loop Unrolling */
00107     blkCnt = numSamples >> 2;
00108
00109     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00110      ** a second loop below computes the remaining 1 to 3 samples. */
00111     while(blkCnt > 0u)
00112     {
00113       /* C(m,n) = A(m,n) * scale */
00114       /* Scaling and results are stored in the destination buffer. */
00115       *pOut++ = (*pIn++) * scale;
00116       *pOut++ = (*pIn++) * scale;
00117       *pOut++ = (*pIn++) * scale;
00118       *pOut++ = (*pIn++) * scale;
00119
00120       /* Decrement the numSamples loop counter */
00121       blkCnt--;
00122     }
00123
00124     /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00125      ** No loop unrolling is used. */
00126     blkCnt = numSamples % 0x4u;
00127
00128 #else
00129
00130     /* Run the below code for Cortex-M0 */
00131
00132     /* Initialize blkCnt with number of samples */
00133     blkCnt = numSamples;
00134
00135 #endif /* #ifndef ARM_MATH_CM0 */
00136
00137     while(blkCnt > 0u)
00138     {
00139       /* C(m,n) = A(m,n) * scale */
00140       /* The results are stored in the destination buffer. */
00141       *pOut++ = (*pIn++) * scale;
00142
00143       /* Decrement the loop counter */
00144       blkCnt--;
00145     }
00146     /* Set status as ARM_MATH_SUCCESS */
00147     status = ARM_MATH_SUCCESS;
00148   }
00149
00150   /* Return to application */
00151   return (status);
00152 }
00153
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CMSIS DSP Software Library: arm_mat_scale_q15.c File Reference

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arm_mat_scale_q15.c File Reference

#include "arm_math.h"

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Functions

arm_status arm_mat_scale_q15 (const arm_matrix_instance_q15 *pSrc, q15_t scaleFract, int32_t shift, arm_matrix_instance_q15 *pDst)
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CMSIS DSP Software Library: arm_mat_scale_q15.c Source File

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arm_mat_scale_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_scale_q15.c
00009 *
00010 * Description:  Multiplies a Q15 matrix by a scalar.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00063 arm_status arm_mat_scale_q15(
00064   const arm_matrix_instance_q15 * pSrc,
00065   q15_t scaleFract,
00066   int32_t shift,
00067   arm_matrix_instance_q15 * pDst)
00068 {
00069   q15_t *pIn = pSrc->pData;                      /* input data matrix pointer */
00070   q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
00071   uint32_t numSamples;                           /* total number of elements in the matrix */
00072   int32_t totShift = 15 - shift;                 /* total shift to apply after scaling */
00073   uint32_t blkCnt;                               /* loop counters */
00074   arm_status status;                             /* status of matrix scaling     */
00075
00076 #ifdef ARM_MATH_MATRIX_CHECK
00077
00078
00079   /* Check for matrix mismatch */
00080   if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
00081   {
00082     /* Set status as ARM_MATH_SIZE_MISMATCH */
00083     status = ARM_MATH_SIZE_MISMATCH;
00084   }
00085   else
00086 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00087
00088   {
00089     /* Total number of samples in the input matrix */
00090     numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
00091
00092 #ifndef ARM_MATH_CM0
00093
00094     /* Run the below code for Cortex-M4 and Cortex-M3 */
00095     /* Loop Unrolling */
00096     blkCnt = numSamples >> 2;
00097
00098     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00099      ** a second loop below computes the remaining 1 to 3 samples. */
00100     while(blkCnt > 0u)
00101     {
00102       /* C(m,n) = A(m,n) * k */
00103       /* Scale, saturate and then store the results in the destination buffer. */
00104       *pOut++ =
00105         (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16));
00106       *pOut++ =
00107         (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16));
00108       *pOut++ =
00109         (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16));
00110       *pOut++ =
00111         (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16));
00112
00113       /* Decrement the numSamples loop counter */
00114       blkCnt--;
00115     }
00116
00117     /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00118      ** No loop unrolling is used. */
00119     blkCnt = numSamples % 0x4u;
00120
00121 #else
00122
00123     /* Run the below code for Cortex-M0 */
00124
00125     /* Initialize blkCnt with number of samples */
00126     blkCnt = numSamples;
00127
00128 #endif /* #ifndef ARM_MATH_CM0 */
00129
00130     while(blkCnt > 0u)
00131     {
00132       /* C(m,n) = A(m,n) * k */
00133       /* Scale, saturate and then store the results in the destination buffer. */
00134       *pOut++ =
00135         (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16));
00136
00137       /* Decrement the numSamples loop counter */
00138       blkCnt--;
00139     }
00140     /* Set status as ARM_MATH_SUCCESS */
00141     status = ARM_MATH_SUCCESS;
00142   }
00143
00144   /* Return to application */
00145   return (status);
00146 }
00147
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CMSIS DSP Software Library: arm_mat_scale_q31.c File Reference

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arm_mat_scale_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_scale_q31 (const arm_matrix_instance_q31 *pSrc, q31_t scaleFract, int32_t shift, arm_matrix_instance_q31 *pDst)
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CMSIS DSP Software Library: arm_mat_scale_q31.c Source File

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arm_mat_scale_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_scale_q31.c
00009 *
00010 * Description:  Multiplies a Q31 matrix by a scalar.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00063 arm_status arm_mat_scale_q31(
00064   const arm_matrix_instance_q31 * pSrc,
00065   q31_t scaleFract,
00066   int32_t shift,
00067   arm_matrix_instance_q31 * pDst)
00068 {
00069   q31_t *pIn = pSrc->pData;                      /* input data matrix pointer */
00070   q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
00071   q63_t out;                                     /* temporary variable to hold output value */
00072   uint32_t numSamples;                           /* total number of elements in the matrix */
00073   int32_t totShift = 31 - shift;                 /* shift to apply after scaling */
00074   uint32_t blkCnt;                               /* loop counters  */
00075   arm_status status;                             /* status of matrix scaling      */
00076
00077 #ifdef ARM_MATH_MATRIX_CHECK
00078
00079
00080   /* Check for matrix mismatch  */
00081   if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
00082   {
00083     /* Set status as ARM_MATH_SIZE_MISMATCH */
00084     status = ARM_MATH_SIZE_MISMATCH;
00085   }
00086   else
00087 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00088
00089   {
00090     /* Total number of samples in the input matrix */
00091     numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
00092
00093 #ifndef ARM_MATH_CM0
00094
00095     /* Run the below code for Cortex-M4 and Cortex-M3 */
00096
00097     /* Loop Unrolling */
00098     blkCnt = numSamples >> 2u;
00099
00100     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00101      ** a second loop below computes the remaining 1 to 3 samples. */
00102     while(blkCnt > 0u)
00103     {
00104       /* C(m,n) = A(m,n) * k */
00105       /* Scale, saturate and then store the results in the destination buffer. */
00106       out = ((q63_t) * pIn++ * scaleFract) >> totShift;
00107       *pOut++ = clip_q63_to_q31(out);
00108       out = ((q63_t) * pIn++ * scaleFract) >> totShift;
00109       *pOut++ = clip_q63_to_q31(out);
00110       out = ((q63_t) * pIn++ * scaleFract) >> totShift;
00111       *pOut++ = clip_q63_to_q31(out);
00112       out = ((q63_t) * pIn++ * scaleFract) >> totShift;
00113       *pOut++ = clip_q63_to_q31(out);
00114
00115       /* Decrement the numSamples loop counter */
00116       blkCnt--;
00117     }
00118
00119     /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00120      ** No loop unrolling is used. */
00121     blkCnt = numSamples % 0x4u;
00122
00123 #else
00124
00125     /* Run the below code for Cortex-M0 */
00126
00127     /* Initialize blkCnt with number of samples */
00128     blkCnt = numSamples;
00129
00130 #endif /* #ifndef ARM_MATH_CM0 */
00131
00132     while(blkCnt > 0u)
00133     {
00134       /* C(m,n) = A(m,n) * k */
00135       /* Scale, saturate and then store the results in the destination buffer. */
00136       out = ((q63_t) * pIn++ * scaleFract) >> totShift;
00137       *pOut++ = clip_q63_to_q31(out);
00138
00139       /* Decrement the numSamples loop counter */
00140       blkCnt--;
00141     }
00142     /* Set status as ARM_MATH_SUCCESS */
00143     status = ARM_MATH_SUCCESS;
00144   }
00145
00146   /* Return to application */
00147   return (status);
00148 }
00149
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CMSIS DSP Software Library: arm_mat_sub_f32.c File Reference

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arm_mat_sub_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_sub_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
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CMSIS DSP Software Library: arm_mat_sub_f32.c Source File

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arm_mat_sub_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_sub_f32.c
00009 *
00010 * Description:  Floating-point matrix subtraction.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00067 arm_status arm_mat_sub_f32(
00068   const arm_matrix_instance_f32 * pSrcA,
00069   const arm_matrix_instance_f32 * pSrcB,
00070   arm_matrix_instance_f32 * pDst)
00071 {
00072   float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
00073   float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
00074   float32_t *pOut = pDst->pData;                 /* output data matrix pointer  */
00075   uint32_t numSamples;                           /* total number of elements in the matrix  */
00076   uint32_t blkCnt;                               /* loop counters */
00077   arm_status status;                             /* status of matrix subtraction */
00078
00079 #ifdef ARM_MATH_MATRIX_CHECK
00080
00081
00082   /* Check for matrix mismatch condition */
00083   if((pSrcA->numRows != pSrcB->numRows) ||
00084      (pSrcA->numCols != pSrcB->numCols) ||
00085      (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
00086   {
00087     /* Set status as ARM_MATH_SIZE_MISMATCH */
00088     status = ARM_MATH_SIZE_MISMATCH;
00089   }
00090   else
00091 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00092
00093   {
00094     /* Total number of samples in the input matrix */
00095     numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
00096
00097 #ifndef ARM_MATH_CM0
00098
00099     /* Run the below code for Cortex-M4 and Cortex-M3 */
00100
00101     /* Loop Unrolling */
00102     blkCnt = numSamples >> 2u;
00103
00104     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00105      ** a second loop below computes the remaining 1 to 3 samples. */
00106     while(blkCnt > 0u)
00107     {
00108       /* C(m,n) = A(m,n) - B(m,n) */
00109       /* Subtract and then store the results in the destination buffer. */
00110       *pOut++ = (*pIn1++) - (*pIn2++);
00111       *pOut++ = (*pIn1++) - (*pIn2++);
00112       *pOut++ = (*pIn1++) - (*pIn2++);
00113       *pOut++ = (*pIn1++) - (*pIn2++);
00114
00115       /* Decrement the loop counter */
00116       blkCnt--;
00117     }
00118
00119     /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00120      ** No loop unrolling is used. */
00121     blkCnt = numSamples % 0x4u;
00122
00123 #else
00124
00125     /* Run the below code for Cortex-M0 */
00126
00127     /* Initialize blkCnt with number of samples */
00128     blkCnt = numSamples;
00129
00130 #endif /* #ifndef ARM_MATH_CM0 */
00131
00132     while(blkCnt > 0u)
00133     {
00134       /* C(m,n) = A(m,n) - B(m,n) */
00135       /* Subtract and then store the results in the destination buffer. */
00136       *pOut++ = (*pIn1++) - (*pIn2++);
00137
00138       /* Decrement the loop counter */
00139       blkCnt--;
00140     }
00141     /* Set status as ARM_MATH_SUCCESS */
00142     status = ARM_MATH_SUCCESS;
00143   }
00144
00145   /* Return to application */
00146   return (status);
00147 }
00148
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CMSIS DSP Software Library: arm_mat_sub_q15.c File Reference

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arm_mat_sub_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_sub_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst)
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CMSIS DSP Software Library: arm_mat_sub_q15.c Source File

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arm_mat_sub_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_sub_q15.c
00009 *
00010 * Description:  Q15 Matrix subtraction
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00061 arm_status arm_mat_sub_q15(
00062   const arm_matrix_instance_q15 * pSrcA,
00063   const arm_matrix_instance_q15 * pSrcB,
00064   arm_matrix_instance_q15 * pDst)
00065 {
00066   q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
00067   q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
00068   q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
00069   uint32_t numSamples;                           /* total number of elements in the matrix */
00070   uint32_t blkCnt;                               /* loop counters  */
00071   arm_status status;                             /* status of matrix subtraction  */
00072
00073
00074 #ifdef ARM_MATH_MATRIX_CHECK
00075
00076
00077   /* Check for matrix mismatch condition */
00078   if((pSrcA->numRows != pSrcB->numRows) ||
00079      (pSrcA->numCols != pSrcB->numCols) ||
00080      (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
00081   {
00082     /* Set status as ARM_MATH_SIZE_MISMATCH */
00083     status = ARM_MATH_SIZE_MISMATCH;
00084   }
00085   else
00086 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00087
00088   {
00089     /* Total number of samples in the input matrix */
00090     numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
00091
00092 #ifndef ARM_MATH_CM0
00093
00094     /* Run the below code for Cortex-M4 and Cortex-M3 */
00095
00096     /* Apply loop unrolling */
00097     blkCnt = numSamples >> 2u;
00098
00099     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00100      ** a second loop below computes the remaining 1 to 3 samples. */
00101     while(blkCnt > 0u)
00102     {
00103       /* C(m,n) = A(m,n) - B(m,n) */
00104       /* Subtract, Saturate and then store the results in the destination buffer. */
00105       *__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
00106       *__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
00107
00108       /* Decrement the loop counter */
00109       blkCnt--;
00110     }
00111
00112     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00113      ** No loop unrolling is used. */
00114     blkCnt = numSamples % 0x4u;
00115
00116     while(blkCnt > 0u)
00117     {
00118       /* C(m,n) = A(m,n) - B(m,n) */
00119       /* Subtract and then store the results in the destination buffer. */
00120       *pOut++ = (q15_t) __QSUB16(*pInA++, *pInB++);
00121
00122       /* Decrement the loop counter */
00123       blkCnt--;
00124     }
00125
00126 #else
00127
00128     /* Run the below code for Cortex-M0 */
00129
00130     /* Initialize blkCnt with number of samples */
00131     blkCnt = numSamples;
00132
00133     while(blkCnt > 0u)
00134     {
00135       /* C(m,n) = A(m,n) - B(m,n) */
00136       /* Subtract and then store the results in the destination buffer. */
00137       *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
00138
00139       /* Decrement the loop counter */
00140       blkCnt--;
00141     }
00142
00143 #endif /* #ifndef ARM_MATH_CM0 */
00144
00145     /* Set status as ARM_MATH_SUCCESS */
00146     status = ARM_MATH_SUCCESS;
00147   }
00148
00149   /* Return to application */
00150   return (status);
00151 }
00152
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CMSIS DSP Software Library: arm_mat_sub_q31.c File Reference

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arm_mat_sub_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_sub_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
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CMSIS DSP Software Library: arm_mat_sub_q31.c Source File

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arm_mat_sub_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_sub_q31.c
00009 *
00010 * Description:  Q31 matrix subtraction
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00062 arm_status arm_mat_sub_q31(
00063   const arm_matrix_instance_q31 * pSrcA,
00064   const arm_matrix_instance_q31 * pSrcB,
00065   arm_matrix_instance_q31 * pDst)
00066 {
00067   q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
00068   q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
00069   q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
00070   uint32_t numSamples;                           /* total number of elements in the matrix  */
00071   uint32_t blkCnt;                               /* loop counters */
00072   arm_status status;                             /* status of matrix subtraction */
00073
00074
00075 #ifdef ARM_MATH_MATRIX_CHECK
00076
00077
00078   /* Check for matrix mismatch condition  */
00079   if((pSrcA->numRows != pSrcB->numRows) ||
00080      (pSrcA->numCols != pSrcB->numCols) ||
00081      (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
00082   {
00083     /* Set status as ARM_MATH_SIZE_MISMATCH */
00084     status = ARM_MATH_SIZE_MISMATCH;
00085   }
00086   else
00087 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00088
00089   {
00090     /* Total number of samples in the input matrix */
00091     numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
00092
00093 #ifndef ARM_MATH_CM0
00094
00095     /* Run the below code for Cortex-M4 and Cortex-M3 */
00096
00097     /* Loop Unrolling */
00098     blkCnt = numSamples >> 2u;
00099
00100     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00101      ** a second loop below computes the remaining 1 to 3 samples. */
00102     while(blkCnt > 0u)
00103     {
00104       /* C(m,n) = A(m,n) - B(m,n) */
00105       /* Subtract, saturate and then store the results in the destination buffer. */
00106       *pOut++ = __QSUB(*pIn1++, *pIn2++);
00107       *pOut++ = __QSUB(*pIn1++, *pIn2++);
00108       *pOut++ = __QSUB(*pIn1++, *pIn2++);
00109       *pOut++ = __QSUB(*pIn1++, *pIn2++);
00110
00111       /* Decrement the loop counter */
00112       blkCnt--;
00113     }
00114
00115     /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
00116      ** No loop unrolling is used. */
00117     blkCnt = numSamples % 0x4u;
00118
00119     while(blkCnt > 0u)
00120     {
00121       /* C(m,n) = A(m,n) - B(m,n) */
00122       /* Subtract, saturate and then store the results in the destination buffer. */
00123       *pOut++ = __QSUB(*pIn1++, *pIn2++);
00124
00125       /* Decrement the loop counter */
00126       blkCnt--;
00127     }
00128
00129 #else
00130
00131     /* Run the below code for Cortex-M0 */
00132
00133     /* Initialize blkCnt with number of samples */
00134     blkCnt = numSamples;
00135
00136     while(blkCnt > 0u)
00137     {
00138       /* C(m,n) = A(m,n) - B(m,n) */
00139       /* Subtract, saturate and then store the results in the destination buffer. */
00140       *pOut++ = clip_q63_to_q31(((q63_t) (*pIn1++)) - (*pIn2++));
00141
00142       /* Decrement the loop counter */
00143       blkCnt--;
00144     }
00145
00146 #endif /* #ifndef ARM_MATH_CM0 */
00147
00148     /* Set status as ARM_MATH_SUCCESS */
00149     status = ARM_MATH_SUCCESS;
00150   }
00151
00152   /* Return to application */
00153   return (status);
00154 }
00155
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CMSIS DSP Software Library: arm_mat_trans_f32.c File Reference

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arm_mat_trans_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_trans_f32 (const arm_matrix_instance_f32 *pSrc, arm_matrix_instance_f32 *pDst)
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CMSIS DSP Software Library: arm_mat_trans_f32.c Source File

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arm_mat_trans_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_trans_f32.c
00009 *
00010 * Description:  Floating-point matrix transpose.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00044 #include "arm_math.h"
00045
00064 arm_status arm_mat_trans_f32(
00065   const arm_matrix_instance_f32 * pSrc,
00066   arm_matrix_instance_f32 * pDst)
00067 {
00068   float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
00069   float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
00070   float32_t *px;                                 /* Temporary output data matrix pointer */
00071   uint16_t nRows = pSrc->numRows;                /* number of rows */
00072   uint16_t nColumns = pSrc->numCols;             /* number of columns */
00073
00074 #ifndef ARM_MATH_CM0
00075
00076   /* Run the below code for Cortex-M4 and Cortex-M3 */
00077
00078   uint16_t blkCnt, i = 0u, row = nRows;          /* loop counters */
00079   arm_status status;                             /* status of matrix transpose  */
00080
00081
00082 #ifdef ARM_MATH_MATRIX_CHECK
00083
00084
00085   /* Check for matrix mismatch condition */
00086   if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
00087   {
00088     /* Set status as ARM_MATH_SIZE_MISMATCH */
00089     status = ARM_MATH_SIZE_MISMATCH;
00090   }
00091   else
00092 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00093
00094   {
00095     /* Matrix transpose by exchanging the rows with columns */
00096     /* row loop     */
00097     do
00098     {
00099       /* Loop Unrolling */
00100       blkCnt = nColumns >> 2;
00101
00102       /* The pointer px is set to starting address of the column being processed */
00103       px = pOut + i;
00104
00105       /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00106        ** a second loop below computes the remaining 1 to 3 samples. */
00107       while(blkCnt > 0u)        /* column loop */
00108       {
00109         /* Read and store the input element in the destination */
00110         *px = *pIn++;
00111
00112         /* Update the pointer px to point to the next row of the transposed matrix */
00113         px += nRows;
00114
00115         /* Read and store the input element in the destination */
00116         *px = *pIn++;
00117
00118         /* Update the pointer px to point to the next row of the transposed matrix */
00119         px += nRows;
00120
00121         /* Read and store the input element in the destination */
00122         *px = *pIn++;
00123
00124         /* Update the pointer px to point to the next row of the transposed matrix */
00125         px += nRows;
00126
00127         /* Read and store the input element in the destination */
00128         *px = *pIn++;
00129
00130         /* Update the pointer px to point to the next row of the transposed matrix */
00131         px += nRows;
00132
00133         /* Decrement the column loop counter */
00134         blkCnt--;
00135       }
00136
00137       /* Perform matrix transpose for last 3 samples here. */
00138       blkCnt = nColumns % 0x4u;
00139
00140       while(blkCnt > 0u)
00141       {
00142         /* Read and store the input element in the destination */
00143         *px = *pIn++;
00144
00145         /* Update the pointer px to point to the next row of the transposed matrix */
00146         px += nRows;
00147
00148         /* Decrement the column loop counter */
00149         blkCnt--;
00150       }
00151
00152 #else
00153
00154   /* Run the below code for Cortex-M0 */
00155
00156   uint16_t col, i = 0u, row = nRows;             /* loop counters */
00157   arm_status status;                             /* status of matrix transpose  */
00158
00159
00160 #ifdef ARM_MATH_MATRIX_CHECK
00161
00162   /* Check for matrix mismatch condition */
00163   if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
00164   {
00165     /* Set status as ARM_MATH_SIZE_MISMATCH */
00166     status = ARM_MATH_SIZE_MISMATCH;
00167   }
00168   else
00169 #endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
00170
00171   {
00172     /* Matrix transpose by exchanging the rows with columns */
00173     /* row loop     */
00174     do
00175     {
00176       /* The pointer px is set to starting address of the column being processed */
00177       px = pOut + i;
00178
00179       /* Initialize column loop counter */
00180       col = nColumns;
00181
00182       while(col > 0u)
00183       {
00184         /* Read and store the input element in the destination */
00185         *px = *pIn++;
00186
00187         /* Update the pointer px to point to the next row of the transposed matrix */
00188         px += nRows;
00189
00190         /* Decrement the column loop counter */
00191         col--;
00192       }
00193
00194 #endif /* #ifndef ARM_MATH_CM0 */
00195
00196       i++;
00197
00198       /* Decrement the row loop counter */
00199       row--;
00200
00201     } while(row > 0u);          /* row loop end  */
00202
00203     /* Set status as ARM_MATH_SUCCESS */
00204     status = ARM_MATH_SUCCESS;
00205   }
00206
00207   /* Return to application */
00208   return (status);
00209 }
00210
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CMSIS DSP Software Library: arm_mat_trans_q15.c File Reference

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arm_mat_trans_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_trans_q15 (const arm_matrix_instance_q15 *pSrc, arm_matrix_instance_q15 *pDst)
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CMSIS DSP Software Library: arm_mat_trans_q15.c Source File

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arm_mat_trans_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_trans_q15.c
00009 *
00010 * Description:  Q15 matrix transpose.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00047 /*
00048  * @brief Q15 matrix transpose.
00049  * @param[in]  *pSrc points to the input matrix
00050  * @param[out] *pDst points to the output matrix
00051  * @return  The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
00052  * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
00053  */
00054
00055 arm_status arm_mat_trans_q15(
00056   const arm_matrix_instance_q15 * pSrc,
00057   arm_matrix_instance_q15 * pDst)
00058 {
00059   q15_t *pSrcA = pSrc->pData;                    /* input data matrix pointer */
00060   q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
00061   uint16_t nRows = pSrc->numRows;                /* number of nRows */
00062   uint16_t nColumns = pSrc->numCols;             /* number of nColumns */
00063   uint16_t col, row = nRows, i = 0u;             /* row and column loop counters */
00064   arm_status status;                             /* status of matrix transpose */
00065
00066 #ifndef ARM_MATH_CM0
00067
00068   /* Run the below code for Cortex-M4 and Cortex-M3 */
00069
00070   q31_t in;                                      /* variable to hold temporary output  */
00071
00072
00073 #ifdef ARM_MATH_MATRIX_CHECK
00074
00075
00076   /* Check for matrix mismatch condition */
00077   if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
00078   {
00079     /* Set status as ARM_MATH_SIZE_MISMATCH */
00080     status = ARM_MATH_SIZE_MISMATCH;
00081   }
00082   else
00083 #endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
00084
00085   {
00086     /* Matrix transpose by exchanging the rows with columns */
00087     /* row loop     */
00088     do
00089     {
00090       /* Apply loop unrolling and exchange the columns with row elements */
00091       col = nColumns >> 2u;
00092
00093       /* The pointer pOut is set to starting address of the column being processed */
00094       pOut = pDst->pData + i;
00095
00096       /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00097        ** a second loop below computes the remaining 1 to 3 samples. */
00098       while(col > 0u)
00099       {
00100         /* Read two elements from the row */
00101         in = *__SIMD32(pSrcA)++;
00102
00103         /* Unpack and store one element in the destination */
00104 #ifndef ARM_MATH_BIG_ENDIAN
00105
00106         *pOut = (q15_t) in;
00107
00108 #else
00109
00110         *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00111
00112 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00113
00114         /* Update the pointer pOut to point to the next row of the transposed matrix */
00115         pOut += nRows;
00116
00117         /* Unpack and store the second element in the destination */
00118
00119 #ifndef ARM_MATH_BIG_ENDIAN
00120
00121         *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00122
00123 #else
00124
00125         *pOut = (q15_t) in;
00126
00127 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00128
00129         /* Update the pointer pOut to point to the next row of the transposed matrix */
00130         pOut += nRows;
00131
00132         /* Read two elements from the row */
00133 #ifndef ARM_MATH_BIG_ENDIAN
00134
00135         in = *__SIMD32(pSrcA)++;
00136
00137 #else
00138
00139         in = *__SIMD32(pSrcA)++;
00140
00141 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00142
00143         /* Unpack and store one element in the destination */
00144 #ifndef ARM_MATH_BIG_ENDIAN
00145
00146         *pOut = (q15_t) in;
00147
00148 #else
00149
00150         *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00151
00152 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00153
00154         /* Update the pointer pOut to point to the next row of the transposed matrix */
00155         pOut += nRows;
00156
00157         /* Unpack and store the second element in the destination */
00158 #ifndef ARM_MATH_BIG_ENDIAN
00159
00160         *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
00161
00162 #else
00163
00164         *pOut = (q15_t) in;
00165
00166 #endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
00167
00168         /* Update the pointer pOut to point to the next row of the transposed matrix */
00169         pOut += nRows;
00170
00171         /* Decrement the column loop counter */
00172         col--;
00173       }
00174
00175       /* Perform matrix transpose for last 3 samples here. */
00176       col = nColumns % 0x4u;
00177
00178 #else
00179
00180   /* Run the below code for Cortex-M0 */
00181
00182 #ifdef ARM_MATH_MATRIX_CHECK
00183
00184   /* Check for matrix mismatch condition */
00185   if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
00186   {
00187     /* Set status as ARM_MATH_SIZE_MISMATCH */
00188     status = ARM_MATH_SIZE_MISMATCH;
00189   }
00190   else
00191 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00192
00193   {
00194     /* Matrix transpose by exchanging the rows with columns */
00195     /* row loop     */
00196     do
00197     {
00198       /* The pointer pOut is set to starting address of the column being processed */
00199       pOut = pDst->pData + i;
00200
00201       /* Initialize column loop counter */
00202       col = nColumns;
00203
00204 #endif /* #ifndef ARM_MATH_CM0 */
00205
00206       while(col > 0u)
00207       {
00208         /* Read and store the input element in the destination */
00209         *pOut = *pSrcA++;
00210
00211         /* Update the pointer pOut to point to the next row of the transposed matrix */
00212         pOut += nRows;
00213
00214         /* Decrement the column loop counter */
00215         col--;
00216       }
00217
00218       i++;
00219
00220       /* Decrement the row loop counter */
00221       row--;
00222
00223     } while(row > 0u);
00224
00225     /* set status as ARM_MATH_SUCCESS */
00226     status = ARM_MATH_SUCCESS;
00227   }
00228   /* Return to application */
00229   return (status);
00230 }
00231
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CMSIS DSP Software Library: arm_mat_trans_q31.c File Reference

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arm_mat_trans_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status arm_mat_trans_q31 (const arm_matrix_instance_q31 *pSrc, arm_matrix_instance_q31 *pDst)
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CMSIS DSP Software Library: arm_mat_trans_q31.c Source File

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arm_mat_trans_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mat_trans_q31.c
00009 *
00010 * Description:  Q31 matrix transpose.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00047 /*
00048   * @brief Q31 matrix transpose.
00049   * @param[in]  *pSrc points to the input matrix
00050   * @param[out] *pDst points to the output matrix
00051   * @return     The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
00052   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
00053  */
00054
00055 arm_status arm_mat_trans_q31(
00056   const arm_matrix_instance_q31 * pSrc,
00057   arm_matrix_instance_q31 * pDst)
00058 {
00059   q31_t *pIn = pSrc->pData;                      /* input data matrix pointer  */
00060   q31_t *pOut = pDst->pData;                     /* output data matrix pointer  */
00061   q31_t *px;                                     /* Temporary output data matrix pointer */
00062   uint16_t nRows = pSrc->numRows;                /* number of nRows */
00063   uint16_t nColumns = pSrc->numCols;             /* number of nColumns  */
00064
00065 #ifndef ARM_MATH_CM0
00066
00067   /* Run the below code for Cortex-M4 and Cortex-M3 */
00068
00069   uint16_t blkCnt, i = 0u, row = nRows;          /* loop counters */
00070   arm_status status;                             /* status of matrix transpose */
00071
00072
00073 #ifdef ARM_MATH_MATRIX_CHECK
00074
00075
00076   /* Check for matrix mismatch condition */
00077   if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
00078   {
00079     /* Set status as ARM_MATH_SIZE_MISMATCH */
00080     status = ARM_MATH_SIZE_MISMATCH;
00081   }
00082   else
00083 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00084
00085   {
00086     /* Matrix transpose by exchanging the rows with columns */
00087     /* row loop     */
00088     do
00089     {
00090       /* Apply loop unrolling and exchange the columns with row elements */
00091       blkCnt = nColumns >> 2u;
00092
00093       /* The pointer px is set to starting address of the column being processed */
00094       px = pOut + i;
00095
00096       /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00097        ** a second loop below computes the remaining 1 to 3 samples. */
00098       while(blkCnt > 0u)
00099       {
00100         /* Read and store the input element in the destination */
00101         *px = *pIn++;
00102
00103         /* Update the pointer px to point to the next row of the transposed matrix */
00104         px += nRows;
00105
00106         /* Read and store the input element in the destination */
00107         *px = *pIn++;
00108
00109         /* Update the pointer px to point to the next row of the transposed matrix */
00110         px += nRows;
00111
00112         /* Read and store the input element in the destination */
00113         *px = *pIn++;
00114
00115         /* Update the pointer px to point to the next row of the transposed matrix */
00116         px += nRows;
00117
00118         /* Read and store the input element in the destination */
00119         *px = *pIn++;
00120
00121         /* Update the pointer px to point to the next row of the transposed matrix */
00122         px += nRows;
00123
00124         /* Decrement the column loop counter */
00125         blkCnt--;
00126       }
00127
00128       /* Perform matrix transpose for last 3 samples here. */
00129       blkCnt = nColumns % 0x4u;
00130
00131       while(blkCnt > 0u)
00132       {
00133         /* Read and store the input element in the destination */
00134         *px = *pIn++;
00135
00136         /* Update the pointer px to point to the next row of the transposed matrix */
00137         px += nRows;
00138
00139         /* Decrement the column loop counter */
00140         blkCnt--;
00141       }
00142
00143 #else
00144
00145   /* Run the below code for Cortex-M0 */
00146
00147   uint16_t col, i = 0u, row = nRows;             /* loop counters */
00148   arm_status status;                             /* status of matrix transpose */
00149
00150
00151 #ifdef ARM_MATH_MATRIX_CHECK
00152
00153   /* Check for matrix mismatch condition */
00154   if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
00155   {
00156     /* Set status as ARM_MATH_SIZE_MISMATCH */
00157     status = ARM_MATH_SIZE_MISMATCH;
00158   }
00159   else
00160 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
00161
00162   {
00163     /* Matrix transpose by exchanging the rows with columns */
00164     /* row loop     */
00165     do
00166     {
00167       /* The pointer px is set to starting address of the column being processed */
00168       px = pOut + i;
00169
00170       /* Initialize column loop counter */
00171       col = nColumns;
00172
00173       while(col > 0u)
00174       {
00175         /* Read and store the input element in the destination */
00176         *px = *pIn++;
00177
00178         /* Update the pointer px to point to the next row of the transposed matrix */
00179         px += nRows;
00180
00181         /* Decrement the column loop counter */
00182         col--;
00183       }
00184
00185 #endif /* #ifndef ARM_MATH_CM0 */
00186
00187       i++;
00188
00189       /* Decrement the row loop counter */
00190       row--;
00191
00192     }
00193     while(row > 0u);            /* row loop end */
00194
00195     /* set status as ARM_MATH_SUCCESS */
00196     status = ARM_MATH_SUCCESS;
00197   }
00198
00199   /* Return to application */
00200   return (status);
00201 }
00202
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CMSIS DSP Software Library: arm_math.h File Reference

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arm_math.h File Reference

#include "ARMCM4.h"
#include "string.h"
#include "math.h"

Go to the source code of this file.

Data Structures

struct | arm_fir_instance_q7
Instance structure for the Q7 FIR filter. More...
struct | arm_fir_instance_q15
Instance structure for the Q15 FIR filter. More...
struct | arm_fir_instance_q31
Instance structure for the Q31 FIR filter. More...
struct | arm_fir_instance_f32
Instance structure for the floating-point FIR filter. More...
struct | arm_biquad_casd_df1_inst_q15
Instance structure for the Q15 Biquad cascade filter. More...
struct | arm_biquad_casd_df1_inst_q31
Instance structure for the Q31 Biquad cascade filter. More...
struct | arm_biquad_casd_df1_inst_f32
Instance structure for the floating-point Biquad cascade filter. More...
struct | arm_matrix_instance_f32
Instance structure for the floating-point matrix structure. More...
struct | arm_matrix_instance_q15
Instance structure for the Q15 matrix structure. More...
struct | arm_matrix_instance_q31
Instance structure for the Q31 matrix structure. More...
struct | arm_pid_instance_q15
Instance structure for the Q15 PID Control. More...
struct | arm_pid_instance_q31
Instance structure for the Q31 PID Control. More...
struct | arm_pid_instance_f32
Instance structure for the floating-point PID Control. More...
struct | arm_linear_interp_instance_f32
Instance structure for the floating-point Linear Interpolate function. More...
struct | arm_bilinear_interp_instance_f32
Instance structure for the floating-point bilinear interpolation function. More...
struct | arm_bilinear_interp_instance_q31
Instance structure for the Q31 bilinear interpolation function. More...
struct | arm_bilinear_interp_instance_q15
Instance structure for the Q15 bilinear interpolation function. More...
struct | arm_bilinear_interp_instance_q7
Instance structure for the Q15 bilinear interpolation function. More...
struct | arm_cfft_radix4_instance_q15
Instance structure for the Q15 CFFT/CIFFT function. More...
struct | arm_cfft_radix4_instance_q31
Instance structure for the Q31 CFFT/CIFFT function. More...
struct | arm_cfft_radix4_instance_f32
Instance structure for the floating-point CFFT/CIFFT function. More...
struct | arm_rfft_instance_q15
Instance structure for the Q15 RFFT/RIFFT function. More...
struct | arm_rfft_instance_q31
Instance structure for the Q31 RFFT/RIFFT function. More...
struct | arm_rfft_instance_f32
Instance structure for the floating-point RFFT/RIFFT function. More...
struct | arm_dct4_instance_f32
Instance structure for the floating-point DCT4/IDCT4 function. More...
struct | arm_dct4_instance_q31
Instance structure for the Q31 DCT4/IDCT4 function. More...
struct | arm_dct4_instance_q15
Instance structure for the Q15 DCT4/IDCT4 function. More...
struct | arm_fir_decimate_instance_q15
Instance structure for the Q15 FIR decimator. More...
struct | arm_fir_decimate_instance_q31
Instance structure for the Q31 FIR decimator. More...
struct | arm_fir_decimate_instance_f32
Instance structure for the floating-point FIR decimator. More...
struct | arm_fir_interpolate_instance_q15
Instance structure for the Q15 FIR interpolator. More...
struct | arm_fir_interpolate_instance_q31
Instance structure for the Q31 FIR interpolator. More...
struct | arm_fir_interpolate_instance_f32
Instance structure for the floating-point FIR interpolator. More...
struct | arm_biquad_cas_df1_32x64_ins_q31
Instance structure for the high precision Q31 Biquad cascade filter. More...
struct | arm_biquad_cascade_df2T_instance_f32
Instance structure for the floating-point transposed direct form II Biquad cascade filter. More...
struct | arm_fir_lattice_instance_q15
Instance structure for the Q15 FIR lattice filter. More...
struct | arm_fir_lattice_instance_q31
Instance structure for the Q31 FIR lattice filter. More...
struct | arm_fir_lattice_instance_f32
Instance structure for the floating-point FIR lattice filter. More...
struct | arm_iir_lattice_instance_q15
Instance structure for the Q15 IIR lattice filter. More...
struct | arm_iir_lattice_instance_q31
Instance structure for the Q31 IIR lattice filter. More...
struct | arm_iir_lattice_instance_f32
Instance structure for the floating-point IIR lattice filter. More...
struct | arm_lms_instance_f32
Instance structure for the floating-point LMS filter. More...
struct | arm_lms_instance_q15
Instance structure for the Q15 LMS filter. More...
struct | arm_lms_instance_q31
Instance structure for the Q31 LMS filter. More...
struct | arm_lms_norm_instance_f32
Instance structure for the floating-point normalized LMS filter. More...
struct | arm_lms_norm_instance_q31
Instance structure for the Q31 normalized LMS filter. More...
struct | arm_lms_norm_instance_q15
Instance structure for the Q15 normalized LMS filter. More...
struct | arm_fir_sparse_instance_f32
Instance structure for the floating-point sparse FIR filter. More...
struct | arm_fir_sparse_instance_q31
Instance structure for the Q31 sparse FIR filter. More...
struct | arm_fir_sparse_instance_q15
Instance structure for the Q15 sparse FIR filter. More...
struct | arm_fir_sparse_instance_q7
Instance structure for the Q7 sparse FIR filter. More...

Defines

#define | __CMSIS_GENERIC
#define | DELTA_Q31 (0x100)
#define | DELTA_Q15 0x5
#define | INDEX_MASK 0x0000003F
#define | PI 3.14159265358979f
#define | TABLE_SIZE 256
#define | TABLE_SPACING_Q31 0x800000
#define | TABLE_SPACING_Q15 0x80
#define | INPUT_SPACING 0xB60B61
#define | __SIMD32(addr) (*(int32_t **) & (addr))
#define | __PACKq7(v0, v1, v2, v3)

Typedefs

typedef int8_t | q7_t
typedef int16_t | q15_t
typedef int32_t | q31_t
typedef int64_t | q63_t
typedef float | float32_t
typedef double | float64_t

Enumerations

enum arm_status {
ARM_MATH_SUCCESS = 0, ARM_MATH_ARGUMENT_ERROR = -1, ARM_MATH_LENGTH_ERROR = -2, ARM_MATH_SIZE_MISMATCH = -3,
ARM_MATH_NANINF = -4, ARM_MATH_SINGULAR = -5, ARM_MATH_TEST_FAILURE = -6
}

Functions

static __INLINE q31_t | clip_q63_to_q31 (q63_t x)
static __INLINE q15_t | clip_q63_to_q15 (q63_t x)
static __INLINE q7_t | clip_q31_to_q7 (q31_t x)
static __INLINE q15_t | clip_q31_to_q15 (q31_t x)
static __INLINE q63_t | mult32x64 (q63_t x, q31_t y)
static __INLINE uint32_t | arm_recip_q31 (q31_t in, q31_t *dst, q31_t *pRecipTable)
static __INLINE uint32_t | arm_recip_q15 (q15_t in, q15_t *dst, q15_t *pRecipTable)
void | arm_fir_q7 (const arm_fir_instance_q7 *S, q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
void | arm_fir_init_q7 (arm_fir_instance_q7 *S, uint16_t numTaps, q7_t *pCoeffs, q7_t *pState, uint32_t blockSize)
void | arm_fir_q15 (const arm_fir_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
void | arm_fir_fast_q15 (const arm_fir_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
arm_status | arm_fir_init_q15 (arm_fir_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
void | arm_fir_q31 (const arm_fir_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_fir_fast_q31 (const arm_fir_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_fir_init_q31 (arm_fir_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
void | arm_fir_f32 (const arm_fir_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | arm_fir_init_f32 (arm_fir_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
void | arm_biquad_cascade_df1_q15 (const arm_biquad_casd_df1_inst_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
void | arm_biquad_cascade_df1_init_q15 (arm_biquad_casd_df1_inst_q15 *S, uint8_t numStages, q15_t *pCoeffs, q15_t *pState, int8_t postShift)
void | arm_biquad_cascade_df1_fast_q15 (const arm_biquad_casd_df1_inst_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
void | arm_biquad_cascade_df1_q31 (const arm_biquad_casd_df1_inst_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_biquad_cascade_df1_fast_q31 (const arm_biquad_casd_df1_inst_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_biquad_cascade_df1_init_q31 (arm_biquad_casd_df1_inst_q31 *S, uint8_t numStages, q31_t *pCoeffs, q31_t *pState, int8_t postShift)
void | arm_biquad_cascade_df1_f32 (const arm_biquad_casd_df1_inst_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | arm_biquad_cascade_df1_init_f32 (arm_biquad_casd_df1_inst_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
arm_status | arm_mat_add_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
arm_status | arm_mat_add_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst)
arm_status | arm_mat_add_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
arm_status | arm_mat_trans_f32 (const arm_matrix_instance_f32 *pSrc, arm_matrix_instance_f32 *pDst)
arm_status | arm_mat_trans_q15 (const arm_matrix_instance_q15 *pSrc, arm_matrix_instance_q15 *pDst)
arm_status | arm_mat_trans_q31 (const arm_matrix_instance_q31 *pSrc, arm_matrix_instance_q31 *pDst)
arm_status | arm_mat_mult_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
arm_status | arm_mat_mult_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pState)
arm_status | arm_mat_mult_fast_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pState)
arm_status | arm_mat_mult_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
arm_status | arm_mat_mult_fast_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
arm_status | arm_mat_sub_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
arm_status | arm_mat_sub_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst)
arm_status | arm_mat_sub_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
arm_status | arm_mat_scale_f32 (const arm_matrix_instance_f32 *pSrc, float32_t scale, arm_matrix_instance_f32 *pDst)
arm_status | arm_mat_scale_q15 (const arm_matrix_instance_q15 *pSrc, q15_t scaleFract, int32_t shift, arm_matrix_instance_q15 *pDst)
arm_status | arm_mat_scale_q31 (const arm_matrix_instance_q31 *pSrc, q31_t scaleFract, int32_t shift, arm_matrix_instance_q31 *pDst)
void | arm_mat_init_q31 (arm_matrix_instance_q31 *S, uint16_t nRows, uint16_t nColumns, q31_t *pData)
void | arm_mat_init_q15 (arm_matrix_instance_q15 *S, uint16_t nRows, uint16_t nColumns, q15_t *pData)
void | arm_mat_init_f32 (arm_matrix_instance_f32 *S, uint16_t nRows, uint16_t nColumns, float32_t *pData)
void | arm_pid_init_f32 (arm_pid_instance_f32 *S, int32_t resetStateFlag)
void | arm_pid_reset_f32 (arm_pid_instance_f32 *S)
void | arm_pid_init_q31 (arm_pid_instance_q31 *S, int32_t resetStateFlag)
void | arm_pid_reset_q31 (arm_pid_instance_q31 *S)
void | arm_pid_init_q15 (arm_pid_instance_q15 *S, int32_t resetStateFlag)
void | arm_pid_reset_q15 (arm_pid_instance_q15 *S)
void | arm_mult_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
void | arm_mult_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
void | arm_mult_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
void | arm_mult_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
void | arm_cfft_radix4_q15 (const arm_cfft_radix4_instance_q15 *S, q15_t *pSrc)
arm_status | arm_cfft_radix4_init_q15 (arm_cfft_radix4_instance_q15 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
void | arm_cfft_radix4_q31 (const arm_cfft_radix4_instance_q31 *S, q31_t *pSrc)
arm_status | arm_cfft_radix4_init_q31 (arm_cfft_radix4_instance_q31 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
void | arm_cfft_radix4_f32 (const arm_cfft_radix4_instance_f32 *S, float32_t *pSrc)
arm_status | arm_cfft_radix4_init_f32 (arm_cfft_radix4_instance_f32 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
void | arm_radix4_butterfly_f32 (float32_t *pSrc, uint16_t fftLen, float32_t *pCoef, uint16_t twidCoefModifier)
void | arm_radix4_butterfly_inverse_f32 (float32_t *pSrc, uint16_t fftLen, float32_t *pCoef, uint16_t twidCoefModifier, float32_t onebyfftLen)
void | arm_bitreversal_f32 (float32_t *pSrc, uint16_t fftSize, uint16_t bitRevFactor, uint16_t *pBitRevTab)
void | arm_radix4_butterfly_q31 (q31_t *pSrc, uint32_t fftLen, q31_t *pCoef, uint32_t twidCoefModifier)
void | arm_radix4_butterfly_inverse_q31 (q31_t *pSrc, uint32_t fftLen, q31_t *pCoef, uint32_t twidCoefModifier)
void | arm_bitreversal_q31 (q31_t *pSrc, uint32_t fftLen, uint16_t bitRevFactor, uint16_t *pBitRevTab)
void | arm_radix4_butterfly_q15 (q15_t *pSrc16, uint32_t fftLen, q15_t *pCoef16, uint32_t twidCoefModifier)
void | arm_radix4_butterfly_inverse_q15 (q15_t *pSrc16, uint32_t fftLen, q15_t *pCoef16, uint32_t twidCoefModifier)
void | arm_bitreversal_q15 (q15_t *pSrc, uint32_t fftLen, uint16_t bitRevFactor, uint16_t *pBitRevTab)
void | arm_rfft_q15 (const arm_rfft_instance_q15 *S, q15_t *pSrc, q15_t *pDst)
arm_status | arm_rfft_init_q15 (arm_rfft_instance_q15 *S, arm_cfft_radix4_instance_q15 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
void | arm_rfft_q31 (const arm_rfft_instance_q31 *S, q31_t *pSrc, q31_t *pDst)
arm_status | arm_rfft_init_q31 (arm_rfft_instance_q31 *S, arm_cfft_radix4_instance_q31 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
arm_status | arm_rfft_init_f32 (arm_rfft_instance_f32 *S, arm_cfft_radix4_instance_f32 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
void | arm_rfft_f32 (const arm_rfft_instance_f32 *S, float32_t *pSrc, float32_t *pDst)
arm_status | arm_dct4_init_f32 (arm_dct4_instance_f32 *S, arm_rfft_instance_f32 *S_RFFT, arm_cfft_radix4_instance_f32 *S_CFFT, uint16_t N, uint16_t Nby2, float32_t normalize)
void | arm_dct4_f32 (const arm_dct4_instance_f32 *S, float32_t *pState, float32_t *pInlineBuffer)
arm_status | arm_dct4_init_q31 (arm_dct4_instance_q31 *S, arm_rfft_instance_q31 *S_RFFT, arm_cfft_radix4_instance_q31 *S_CFFT, uint16_t N, uint16_t Nby2, q31_t normalize)
void | arm_dct4_q31 (const arm_dct4_instance_q31 *S, q31_t *pState, q31_t *pInlineBuffer)
arm_status | arm_dct4_init_q15 (arm_dct4_instance_q15 *S, arm_rfft_instance_q15 *S_RFFT, arm_cfft_radix4_instance_q15 *S_CFFT, uint16_t N, uint16_t Nby2, q15_t normalize)
void | arm_dct4_q15 (const arm_dct4_instance_q15 *S, q15_t *pState, q15_t *pInlineBuffer)
void | arm_add_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
void | arm_add_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
void | arm_add_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
void | arm_add_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
void | arm_sub_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
void | arm_sub_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
void | arm_sub_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
void | arm_sub_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
void | arm_scale_f32 (float32_t *pSrc, float32_t scale, float32_t *pDst, uint32_t blockSize)
void | arm_scale_q7 (q7_t *pSrc, q7_t scaleFract, int8_t shift, q7_t *pDst, uint32_t blockSize)
void | arm_scale_q15 (q15_t *pSrc, q15_t scaleFract, int8_t shift, q15_t *pDst, uint32_t blockSize)
void | arm_scale_q31 (q31_t *pSrc, q31_t scaleFract, int8_t shift, q31_t *pDst, uint32_t blockSize)
void | arm_abs_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
void | arm_abs_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | arm_abs_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
void | arm_abs_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_dot_prod_f32 (float32_t *pSrcA, float32_t *pSrcB, uint32_t blockSize, float32_t *result)
void | arm_dot_prod_q7 (q7_t *pSrcA, q7_t *pSrcB, uint32_t blockSize, q31_t *result)
void | arm_dot_prod_q15 (q15_t *pSrcA, q15_t *pSrcB, uint32_t blockSize, q63_t *result)
void | arm_dot_prod_q31 (q31_t *pSrcA, q31_t *pSrcB, uint32_t blockSize, q63_t *result)
void | arm_shift_q7 (q7_t *pSrc, int8_t shiftBits, q7_t *pDst, uint32_t blockSize)
void | arm_shift_q15 (q15_t *pSrc, int8_t shiftBits, q15_t *pDst, uint32_t blockSize)
void | arm_shift_q31 (q31_t *pSrc, int8_t shiftBits, q31_t *pDst, uint32_t blockSize)
void | arm_offset_f32 (float32_t *pSrc, float32_t offset, float32_t *pDst, uint32_t blockSize)
void | arm_offset_q7 (q7_t *pSrc, q7_t offset, q7_t *pDst, uint32_t blockSize)
void | arm_offset_q15 (q15_t *pSrc, q15_t offset, q15_t *pDst, uint32_t blockSize)
void | arm_offset_q31 (q31_t *pSrc, q31_t offset, q31_t *pDst, uint32_t blockSize)
void | arm_negate_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | arm_negate_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
void | arm_negate_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
void | arm_negate_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_copy_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | arm_copy_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
void | arm_copy_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
void | arm_copy_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_fill_f32 (float32_t value, float32_t *pDst, uint32_t blockSize)
void | arm_fill_q7 (q7_t value, q7_t *pDst, uint32_t blockSize)
void | arm_fill_q15 (q15_t value, q15_t *pDst, uint32_t blockSize)
void | arm_fill_q31 (q31_t value, q31_t *pDst, uint32_t blockSize)
void | arm_conv_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst)
void | arm_conv_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
void | arm_conv_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
void | arm_conv_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
void | arm_conv_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
void | arm_conv_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst)
arm_status | arm_conv_partial_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst, uint32_t firstIndex, uint32_t numPoints)
arm_status | arm_conv_partial_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints)
arm_status | arm_conv_partial_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints)
arm_status | arm_conv_partial_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst, uint32_t firstIndex, uint32_t numPoints)
arm_status | arm_conv_partial_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst, uint32_t firstIndex, uint32_t numPoints)
arm_status | arm_conv_partial_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, uint32_t firstIndex, uint32_t numPoints)
void | arm_fir_decimate_f32 (const arm_fir_decimate_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
arm_status | arm_fir_decimate_init_f32 (arm_fir_decimate_instance_f32 *S, uint16_t numTaps, uint8_t M, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
void | arm_fir_decimate_q15 (const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
void | arm_fir_decimate_fast_q15 (const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
arm_status | arm_fir_decimate_init_q15 (arm_fir_decimate_instance_q15 *S, uint16_t numTaps, uint8_t M, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
void | arm_fir_decimate_q31 (const arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_fir_decimate_fast_q31 (arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
arm_status | arm_fir_decimate_init_q31 (arm_fir_decimate_instance_q31 *S, uint16_t numTaps, uint8_t M, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
void | arm_fir_interpolate_q15 (const arm_fir_interpolate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
arm_status | arm_fir_interpolate_init_q15 (arm_fir_interpolate_instance_q15 *S, uint8_t L, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
void | arm_fir_interpolate_q31 (const arm_fir_interpolate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
arm_status | arm_fir_interpolate_init_q31 (arm_fir_interpolate_instance_q31 *S, uint8_t L, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
void | arm_fir_interpolate_f32 (const arm_fir_interpolate_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
arm_status | arm_fir_interpolate_init_f32 (arm_fir_interpolate_instance_f32 *S, uint8_t L, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
void | arm_biquad_cas_df1_32x64_q31 (const arm_biquad_cas_df1_32x64_ins_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_biquad_cas_df1_32x64_init_q31 (arm_biquad_cas_df1_32x64_ins_q31 *S, uint8_t numStages, q31_t *pCoeffs, q63_t *pState, uint8_t postShift)
void | arm_biquad_cascade_df2T_f32 (const arm_biquad_cascade_df2T_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | arm_biquad_cascade_df2T_init_f32 (arm_biquad_cascade_df2T_instance_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
void | arm_fir_lattice_init_q15 (arm_fir_lattice_instance_q15 *S, uint16_t numStages, q15_t *pCoeffs, q15_t *pState)
void | arm_fir_lattice_q15 (const arm_fir_lattice_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
void | arm_fir_lattice_init_q31 (arm_fir_lattice_instance_q31 *S, uint16_t numStages, q31_t *pCoeffs, q31_t *pState)
void | arm_fir_lattice_q31 (const arm_fir_lattice_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_fir_lattice_init_f32 (arm_fir_lattice_instance_f32 *S, uint16_t numStages, float32_t *pCoeffs, float32_t *pState)
void | arm_fir_lattice_f32 (const arm_fir_lattice_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | arm_iir_lattice_f32 (const arm_iir_lattice_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | arm_iir_lattice_init_f32 (arm_iir_lattice_instance_f32 *S, uint16_t numStages, float32_t *pkCoeffs, float32_t *pvCoeffs, float32_t *pState, uint32_t blockSize)
void | arm_iir_lattice_q31 (const arm_iir_lattice_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_iir_lattice_init_q31 (arm_iir_lattice_instance_q31 *S, uint16_t numStages, q31_t *pkCoeffs, q31_t *pvCoeffs, q31_t *pState, uint32_t blockSize)
void | arm_iir_lattice_q15 (const arm_iir_lattice_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
void | arm_iir_lattice_init_q15 (arm_iir_lattice_instance_q15 *S, uint16_t numStages, q15_t *pkCoeffs, q15_t *pvCoeffs, q15_t *pState, uint32_t blockSize)
void | arm_lms_f32 (const arm_lms_instance_f32 *S, float32_t *pSrc, float32_t *pRef, float32_t *pOut, float32_t *pErr, uint32_t blockSize)
void | arm_lms_init_f32 (arm_lms_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, float32_t mu, uint32_t blockSize)
void | arm_lms_init_q15 (arm_lms_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, q15_t mu, uint32_t blockSize, uint32_t postShift)
void | arm_lms_q15 (const arm_lms_instance_q15 *S, q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize)
void | arm_lms_q31 (const arm_lms_instance_q31 *S, q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize)
void | arm_lms_init_q31 (arm_lms_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, q31_t mu, uint32_t blockSize, uint32_t postShift)
void | arm_lms_norm_f32 (arm_lms_norm_instance_f32 *S, float32_t *pSrc, float32_t *pRef, float32_t *pOut, float32_t *pErr, uint32_t blockSize)
void | arm_lms_norm_init_f32 (arm_lms_norm_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, float32_t mu, uint32_t blockSize)
void | arm_lms_norm_q31 (arm_lms_norm_instance_q31 *S, q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize)
void | arm_lms_norm_init_q31 (arm_lms_norm_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, q31_t mu, uint32_t blockSize, uint8_t postShift)
void | arm_lms_norm_q15 (arm_lms_norm_instance_q15 *S, q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize)
void | arm_lms_norm_init_q15 (arm_lms_norm_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, q15_t mu, uint32_t blockSize, uint8_t postShift)
void | arm_correlate_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst)
void | arm_correlate_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
void | arm_correlate_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
void | arm_correlate_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
void | arm_correlate_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
void | arm_correlate_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst)
void | arm_fir_sparse_f32 (arm_fir_sparse_instance_f32 *S, float32_t *pSrc, float32_t *pDst, float32_t *pScratchIn, uint32_t blockSize)
void | arm_fir_sparse_init_f32 (arm_fir_sparse_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
void | arm_fir_sparse_q31 (arm_fir_sparse_instance_q31 *S, q31_t *pSrc, q31_t *pDst, q31_t *pScratchIn, uint32_t blockSize)
void | arm_fir_sparse_init_q31 (arm_fir_sparse_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
void | arm_fir_sparse_q15 (arm_fir_sparse_instance_q15 *S, q15_t *pSrc, q15_t *pDst, q15_t *pScratchIn, q31_t *pScratchOut, uint32_t blockSize)
void | arm_fir_sparse_init_q15 (arm_fir_sparse_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
void | arm_fir_sparse_q7 (arm_fir_sparse_instance_q7 *S, q7_t *pSrc, q7_t *pDst, q7_t *pScratchIn, q31_t *pScratchOut, uint32_t blockSize)
void | arm_fir_sparse_init_q7 (arm_fir_sparse_instance_q7 *S, uint16_t numTaps, q7_t *pCoeffs, q7_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
void | arm_sin_cos_f32 (float32_t theta, float32_t *pSinVal, float32_t *pCcosVal)
void | arm_sin_cos_q31 (q31_t theta, q31_t *pSinVal, q31_t *pCosVal)
void | arm_cmplx_conj_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
void | arm_cmplx_conj_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
void | arm_cmplx_conj_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
void | arm_cmplx_mag_squared_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
void | arm_cmplx_mag_squared_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
void | arm_cmplx_mag_squared_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
static __INLINE float32_t | arm_pid_f32 (arm_pid_instance_f32 *S, float32_t in)
static __INLINE q31_t | arm_pid_q31 (arm_pid_instance_q31 *S, q31_t in)
static __INLINE q15_t | arm_pid_q15 (arm_pid_instance_q15 *S, q15_t in)
arm_status | arm_mat_inverse_f32 (const arm_matrix_instance_f32 *src, arm_matrix_instance_f32 *dst)
static __INLINE void | arm_clarke_f32 (float32_t Ia, float32_t Ib, float32_t *pIalpha, float32_t *pIbeta)
static __INLINE void | arm_clarke_q31 (q31_t Ia, q31_t Ib, q31_t *pIalpha, q31_t *pIbeta)
void | arm_q7_to_q31 (q7_t *pSrc, q31_t *pDst, uint32_t blockSize)
static __INLINE void | arm_inv_clarke_f32 (float32_t Ialpha, float32_t Ibeta, float32_t *pIa, float32_t *pIb)
static __INLINE void | arm_inv_clarke_q31 (q31_t Ialpha, q31_t Ibeta, q31_t *pIa, q31_t *pIb)
void | arm_q7_to_q15 (q7_t *pSrc, q15_t *pDst, uint32_t blockSize)
static __INLINE void | arm_park_f32 (float32_t Ialpha, float32_t Ibeta, float32_t *pId, float32_t *pIq, float32_t sinVal, float32_t cosVal)
static __INLINE void | arm_park_q31 (q31_t Ialpha, q31_t Ibeta, q31_t *pId, q31_t *pIq, q31_t sinVal, q31_t cosVal)
void | arm_q7_to_float (q7_t *pSrc, float32_t *pDst, uint32_t blockSize)
static __INLINE void | arm_inv_park_f32 (float32_t Id, float32_t Iq, float32_t *pIalpha, float32_t *pIbeta, float32_t sinVal, float32_t cosVal)
static __INLINE void | arm_inv_park_q31 (q31_t Id, q31_t Iq, q31_t *pIalpha, q31_t *pIbeta, q31_t sinVal, q31_t cosVal)
void | arm_q31_to_float (q31_t *pSrc, float32_t *pDst, uint32_t blockSize)
static __INLINE float32_t | arm_linear_interp_f32 (arm_linear_interp_instance_f32 *S, float32_t x)
static __INLINE q31_t | arm_linear_interp_q31 (q31_t *pYData, q31_t x, uint32_t nValues)
static __INLINE q15_t | arm_linear_interp_q15 (q15_t *pYData, q31_t x, uint32_t nValues)
static __INLINE q7_t | arm_linear_interp_q7 (q7_t *pYData, q31_t x, uint32_t nValues)
float32_t | arm_sin_f32 (float32_t x)
q31_t | arm_sin_q31 (q31_t x)
q15_t | arm_sin_q15 (q15_t x)
float32_t | arm_cos_f32 (float32_t x)
q31_t | arm_cos_q31 (q31_t x)
q15_t | arm_cos_q15 (q15_t x)
static __INLINE arm_status | arm_sqrt_f32 (float32_t in, float32_t *pOut)
arm_status | arm_sqrt_q31 (q31_t in, q31_t *pOut)
arm_status | arm_sqrt_q15 (q15_t in, q15_t *pOut)
static __INLINE void | arm_circularWrite_f32 (int32_t *circBuffer, int32_t L, uint16_t *writeOffset, int32_t bufferInc, const int32_t *src, int32_t srcInc, uint32_t blockSize)
static __INLINE void | arm_circularRead_f32 (int32_t *circBuffer, int32_t L, int32_t *readOffset, int32_t bufferInc, int32_t *dst, int32_t *dst_base, int32_t dst_length, int32_t dstInc, uint32_t blockSize)
static __INLINE void | arm_circularWrite_q15 (q15_t *circBuffer, int32_t L, uint16_t *writeOffset, int32_t bufferInc, const q15_t *src, int32_t srcInc, uint32_t blockSize)
static __INLINE void | arm_circularRead_q15 (q15_t *circBuffer, int32_t L, int32_t *readOffset, int32_t bufferInc, q15_t *dst, q15_t *dst_base, int32_t dst_length, int32_t dstInc, uint32_t blockSize)
static __INLINE void | arm_circularWrite_q7 (q7_t *circBuffer, int32_t L, uint16_t *writeOffset, int32_t bufferInc, const q7_t *src, int32_t srcInc, uint32_t blockSize)
static __INLINE void | arm_circularRead_q7 (q7_t *circBuffer, int32_t L, int32_t *readOffset, int32_t bufferInc, q7_t *dst, q7_t *dst_base, int32_t dst_length, int32_t dstInc, uint32_t blockSize)
void | arm_power_q31 (q31_t *pSrc, uint32_t blockSize, q63_t *pResult)
void | arm_power_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
void | arm_power_q15 (q15_t *pSrc, uint32_t blockSize, q63_t *pResult)
void | arm_power_q7 (q7_t *pSrc, uint32_t blockSize, q31_t *pResult)
void | arm_mean_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult)
void | arm_mean_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
void | arm_mean_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
void | arm_mean_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
void | arm_var_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
void | arm_var_q31 (q31_t *pSrc, uint32_t blockSize, q63_t *pResult)
void | arm_var_q15 (q15_t *pSrc, uint32_t blockSize, q31_t *pResult)
void | arm_rms_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
void | arm_rms_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
void | arm_rms_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
void | arm_std_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
void | arm_std_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
void | arm_std_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
void | arm_cmplx_mag_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
void | arm_cmplx_mag_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
void | arm_cmplx_mag_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
void | arm_cmplx_dot_prod_q15 (q15_t *pSrcA, q15_t *pSrcB, uint32_t numSamples, q31_t *realResult, q31_t *imagResult)
void | arm_cmplx_dot_prod_q31 (q31_t *pSrcA, q31_t *pSrcB, uint32_t numSamples, q63_t *realResult, q63_t *imagResult)
void | arm_cmplx_dot_prod_f32 (float32_t *pSrcA, float32_t *pSrcB, uint32_t numSamples, float32_t *realResult, float32_t *imagResult)
void | arm_cmplx_mult_real_q15 (q15_t *pSrcCmplx, q15_t *pSrcReal, q15_t *pCmplxDst, uint32_t numSamples)
void | arm_cmplx_mult_real_q31 (q31_t *pSrcCmplx, q31_t *pSrcReal, q31_t *pCmplxDst, uint32_t numSamples)
void | arm_cmplx_mult_real_f32 (float32_t *pSrcCmplx, float32_t *pSrcReal, float32_t *pCmplxDst, uint32_t numSamples)
void | arm_min_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *result, uint32_t *index)
void | arm_min_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult, uint32_t *pIndex)
void | arm_min_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult, uint32_t *pIndex)
void | arm_min_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult, uint32_t *pIndex)
void | arm_max_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult, uint32_t *pIndex)
void | arm_max_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult, uint32_t *pIndex)
void | arm_max_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult, uint32_t *pIndex)
void | arm_max_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult, uint32_t *pIndex)
void | arm_cmplx_mult_cmplx_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t numSamples)
void | arm_cmplx_mult_cmplx_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t numSamples)
void | arm_cmplx_mult_cmplx_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t numSamples)
void | arm_float_to_q31 (float32_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_float_to_q15 (float32_t *pSrc, q15_t *pDst, uint32_t blockSize)
void | arm_float_to_q7 (float32_t *pSrc, q7_t *pDst, uint32_t blockSize)
void | arm_q31_to_q15 (q31_t *pSrc, q15_t *pDst, uint32_t blockSize)
void | arm_q31_to_q7 (q31_t *pSrc, q7_t *pDst, uint32_t blockSize)
void | arm_q15_to_float (q15_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | arm_q15_to_q31 (q15_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_q15_to_q7 (q15_t *pSrc, q7_t *pDst, uint32_t blockSize)
static __INLINE float32_t | arm_bilinear_interp_f32 (const arm_bilinear_interp_instance_f32 *S, float32_t X, float32_t Y)
static __INLINE q31_t | arm_bilinear_interp_q31 (arm_bilinear_interp_instance_q31 *S, q31_t X, q31_t Y)
static __INLINE q15_t | arm_bilinear_interp_q15 (arm_bilinear_interp_instance_q15 *S, q31_t X, q31_t Y)
static __INLINE q7_t | arm_bilinear_interp_q7 (arm_bilinear_interp_instance_q7 *S, q31_t X, q31_t Y)

Define Documentation

#define __CMSIS_GENERIC

Definition at line 254 of file arm_math.h.

#define DELTA_Q31 (0x100)

Macros required for reciprocal calculation in Normalized LMS.

Definition at line 280 of file arm_math.h.

#define DELTA_Q15 0x5

Definition at line 281 of file arm_math.h.

#define INDEX_MASK 0x0000003F

Definition at line 282 of file arm_math.h.

#define PI 3.14159265358979f

Definition at line 283 of file arm_math.h.

#define TABLE_SIZE 256

Macros required for SINE and COSINE Fast math approximations.

Definition at line 289 of file arm_math.h.

#define TABLE_SPACING_Q31 0x800000

Definition at line 290 of file arm_math.h.

#define TABLE_SPACING_Q15 0x80

Definition at line 291 of file arm_math.h.

#define INPUT_SPACING 0xB60B61

Macros required for SINE and COSINE Controller functions.

Definition at line 298 of file arm_math.h.

#define __SIMD32 ( addr ) (*(int32_t **) & (addr))

definition to read/write two 16 bit values.

Definition at line 349 of file arm_math.h.

#define __PACKq7 | ( | v0,
 |  | v1,
 |  | v2,
 |  | v3
 | ) |
Value:
( (((int32_t)(v0) <<  0) & (int32_t)0x000000FF) |   \
                                (((int32_t)(v1) <<  8) & (int32_t)0x0000FF00) | \
                                (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \
                                (((int32_t)(v3) << 24) & (int32_t)0xFF000000)  )

definition to pack four 8 bit values.

Definition at line 366 of file arm_math.h.

Typedef Documentation

typedef int8_t q7_t

8-bit fractional data type in 1.7 format.

Definition at line 319 of file arm_math.h.

typedef int16_t q15_t

16-bit fractional data type in 1.15 format.

Definition at line 324 of file arm_math.h.

typedef int32_t q31_t

32-bit fractional data type in 1.31 format.

Definition at line 329 of file arm_math.h.

typedef int64_t q63_t

64-bit fractional data type in 1.63 format.

Definition at line 334 of file arm_math.h.

typedef float float32_t

32-bit floating-point type definition.

Definition at line 339 of file arm_math.h.

typedef double float64_t

64-bit floating-point type definition.

Definition at line 344 of file arm_math.h.

Enumeration Type Documentation

enum arm_status

Error status returned by some functions in the library.

Enumerator:
ARM_MATH_SUCCESS

No error

ARM_MATH_ARGUMENT_ERROR

One or more arguments are incorrect

ARM_MATH_LENGTH_ERROR

Length of data buffer is incorrect

ARM_MATH_SIZE_MISMATCH

Size of matrices is not compatible with the operation.

ARM_MATH_NANINF

Not-a-number (NaN) or infinity is generated

ARM_MATH_SINGULAR

Generated by matrix inversion if the input matrix is singular and cannot be inverted.

ARM_MATH_TEST_FAILURE

Test Failed

Definition at line 305 of file arm_math.h.

Function Documentation

static __INLINE q31_t clip_q63_to_q31 ( q63_t x ) [static]

Clips Q63 to Q31 values.

Definition at line 383 of file arm_math.h.

static __INLINE q15_t clip_q63_to_q15 ( q63_t x ) [static]

Clips Q63 to Q15 values.

Definition at line 393 of file arm_math.h.

static __INLINE q7_t clip_q31_to_q7 ( q31_t x ) [static]

Clips Q31 to Q7 values.

Definition at line 403 of file arm_math.h.

static __INLINE q15_t clip_q31_to_q15 ( q31_t x ) [static]

Clips Q31 to Q15 values.

Definition at line 413 of file arm_math.h.

static __INLINE q63_t mult32x64 | ( | q63_t | x,
 |  | q31_t | y
 | ) |  | [static]

Multiplies 32 X 64 and returns 32 bit result in 2.30 format.

Definition at line 424 of file arm_math.h.

static __INLINE uint32_t arm_recip_q31 | ( | q31_t | in,
 |  | q31_t * | dst,
 |  | q31_t * | pRecipTable
 | ) |  | [static]

Function to Calculates 1/in(reciprocal) value of Q31 Data type.

Definition at line 463 of file arm_math.h.

static __INLINE uint32_t arm_recip_q15 | ( | q15_t | in,
 |  | q15_t * | dst,
 |  | q15_t * | pRecipTable
 | ) |  | [static]

Function to Calculates 1/in(reciprocal) value of Q15 Data type.

Definition at line 514 of file arm_math.h.

void arm_radix4_butterfly_f32 | ( | float32_t * | pSrc,
 |  | uint16_t | fftLen,
 |  | float32_t * | pCoef,
 |  | uint16_t | twidCoefModifier
 | ) |  |

Core function for the floating-point CFFT butterfly process.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of floating-point data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef | points to the twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

end of CFFT_CIFFT group

Definition at line 223 of file arm_cfft_radix4_f32.c.

void arm_radix4_butterfly_inverse_f32 | ( | float32_t * | pSrc,
 |  | uint16_t | fftLen,
 |  | float32_t * | pCoef,
 |  | uint16_t | twidCoefModifier,
 |  | float32_t | onebyfftLen
 | ) |  |

Core function for the floating-point CIFFT butterfly process.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of floating-point data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
[in] | onebyfftLen | value of 1/fftLen.
Returns:
none.

Definition at line 660 of file arm_cfft_radix4_f32.c.

void arm_bitreversal_f32 | ( | float32_t * | pSrc,
 |  | uint16_t | fftSize,
 |  | uint16_t | bitRevFactor,
 |  | uint16_t * | pBitRevTab
 | ) |  |

In-place bit reversal function.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of floating-point data type.
[in] | fftSize | length of the FFT.
[in] | bitRevFactor | bit reversal modifier that supports different size FFTs with the same bit reversal table.
[in] | *pBitRevTab | points to the bit reversal table.
Returns:
none.

Definition at line 1177 of file arm_cfft_radix4_f32.c.

void arm_radix4_butterfly_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | q31_t * | pCoef,
 |  | uint32_t | twidCoefModifier
 | ) |  |

Core function for the Q31 CFFT butterfly process.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of Q31 data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

end of CFFT_CIFFT group

Parameters:
[in,out] | *pSrc | points to the in-place buffer of Q31 data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 139 of file arm_cfft_radix4_q31.c.

void arm_radix4_butterfly_inverse_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | q31_t * | pCoef,
 |  | uint32_t | twidCoefModifier
 | ) |  |

Core function for the Q31 CIFFT butterfly process.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of Q31 data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 517 of file arm_cfft_radix4_q31.c.

void arm_bitreversal_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | uint16_t | bitRevFactor,
 |  | uint16_t * | pBitRevTab
 | ) |  |

In-place bit reversal function.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of Q31 data type.
[in] | fftLen | length of the FFT.
[in] | bitRevFactor | bit reversal modifier that supports different size FFTs with the same bit reversal table
[in] | *pBitRevTab | points to bit reversal table.
Returns:
none.

Definition at line 848 of file arm_cfft_radix4_q31.c.

void arm_radix4_butterfly_q15 | ( | q15_t * | pSrc16,
 |  | uint32_t | fftLen,
 |  | q15_t * | pCoef16,
 |  | uint32_t | twidCoefModifier
 | ) |  |

Core function for the Q15 CFFT butterfly process.

Parameters:
[in,out] | *pSrc16 | points to the in-place buffer of Q15 data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef16 | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

end of CFFT_CIFFT group

Parameters:
[in,out] | *pSrc16 | points to the in-place buffer of Q15 data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef16 | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 138 of file arm_cfft_radix4_q15.c.

void arm_radix4_butterfly_inverse_q15 | ( | q15_t * | pSrc16,
 |  | uint32_t | fftLen,
 |  | q15_t * | pCoef16,
 |  | uint32_t | twidCoefModifier
 | ) |  |

Core function for the Q15 CIFFT butterfly process.

Parameters:
[in,out] | *pSrc16 | points to the in-place buffer of Q15 data type.
[in] | fftLen | length of the FFT.
[in] | *pCoef16 | points to twiddle coefficient buffer.
[in] | twidCoefModifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 1053 of file arm_cfft_radix4_q15.c.

void arm_bitreversal_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | uint16_t | bitRevFactor,
 |  | uint16_t * | pBitRevTab
 | ) |  |

In-place bit reversal function.

Parameters:
[in,out] | *pSrc | points to the in-place buffer of Q15 data type.
[in] | fftLen | length of the FFT.
[in] | bitRevFactor | bit reversal modifier that supports different size FFTs with the same bit reversal table
[in] | *pBitRevTab | points to bit reversal table.
Returns:
none.

Definition at line 1906 of file arm_cfft_radix4_q15.c.

static __INLINE void arm_circularWrite_f32 | ( | int32_t * | circBuffer,
 |  | int32_t | L,
 |  | uint16_t * | writeOffset,
 |  | int32_t | bufferInc,
 |  | const int32_t * | src,
 |  | int32_t | srcInc,
 |  | uint32_t | blockSize
 | ) |  | [static]

floating-point Circular write function.

end of SQRT group

Definition at line 5751 of file arm_math.h.

static __INLINE void arm_circularRead_f32 | ( | int32_t * | circBuffer,
 |  | int32_t | L,
 |  | int32_t * | readOffset,
 |  | int32_t | bufferInc,
 |  | int32_t * | dst,
 |  | int32_t * | dst_base,
 |  | int32_t | dst_length,
 |  | int32_t | dstInc,
 |  | uint32_t | blockSize
 | ) |  | [static]

floating-point Circular Read function.

Definition at line 5796 of file arm_math.h.

static __INLINE void arm_circularWrite_q15 | ( | q15_t * | circBuffer,
 |  | int32_t | L,
 |  | uint16_t * | writeOffset,
 |  | int32_t | bufferInc,
 |  | const q15_t * | src,
 |  | int32_t | srcInc,
 |  | uint32_t | blockSize
 | ) |  | [static]

Q15 Circular write function.

Definition at line 5851 of file arm_math.h.

static __INLINE void arm_circularRead_q15 | ( | q15_t * | circBuffer,
 |  | int32_t | L,
 |  | int32_t * | readOffset,
 |  | int32_t | bufferInc,
 |  | q15_t * | dst,
 |  | q15_t * | dst_base,
 |  | int32_t | dst_length,
 |  | int32_t | dstInc,
 |  | uint32_t | blockSize
 | ) |  | [static]

Q15 Circular Read function.

Definition at line 5896 of file arm_math.h.

static __INLINE void arm_circularWrite_q7 | ( | q7_t * | circBuffer,
 |  | int32_t | L,
 |  | uint16_t * | writeOffset,
 |  | int32_t | bufferInc,
 |  | const q7_t * | src,
 |  | int32_t | srcInc,
 |  | uint32_t | blockSize
 | ) |  | [static]

Q7 Circular write function.

Definition at line 5953 of file arm_math.h.

static __INLINE void arm_circularRead_q7 | ( | q7_t * | circBuffer,
 |  | int32_t | L,
 |  | int32_t * | readOffset,
 |  | int32_t | bufferInc,
 |  | q7_t * | dst,
 |  | q7_t * | dst_base,
 |  | int32_t | dst_length,
 |  | int32_t | dstInc,
 |  | uint32_t | blockSize
 | ) |  | [static]

Q7 Circular Read function.

Definition at line 5998 of file arm_math.h.

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CMSIS DSP Software Library: arm_math.h Source File

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arm_math.h

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00001 /* ----------------------------------------------------------------------
00002  * Copyright (C) 2010 ARM Limited. All rights reserved.
00003  *
00004  * $Date:        15. July 2011
00005  * $Revision:   V1.0.10
00006  *
00007  * Project:         CMSIS DSP Library
00008  * Title:        arm_math.h
00009  *
00010  * Description:  Public header file for CMSIS DSP Library
00011  *
00012  * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013  *
00014  * Version 1.0.10 2011/7/15
00015  *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016  *
00017  * Version 1.0.3 2010/11/29
00018  *    Re-organized the CMSIS folders and updated documentation.
00019  *
00020  * Version 1.0.2 2010/11/11
00021  *    Documentation updated.
00022  *
00023  * Version 1.0.1 2010/10/05
00024  *    Production release and review comments incorporated.
00025  *
00026  * Version 1.0.0 2010/09/20
00027  *    Production release and review comments incorporated.
00028  * -------------------------------------------------------------------- */
00029
00251 #ifndef _ARM_MATH_H
00252 #define _ARM_MATH_H
00253
00254 #define __CMSIS_GENERIC              /* disable NVIC and Systick functions */
00255
00256 #if defined (ARM_MATH_CM4)
00257   #include "core_cm4.h"
00258 #elif defined (ARM_MATH_CM3)
00259   #include "core_cm3.h"
00260 #elif defined (ARM_MATH_CM0)
00261   #include "core_cm0.h"
00262 #else
00263 #include "ARMCM4.h"
00264 #warning "Define either ARM_MATH_CM4 OR ARM_MATH_CM3...By Default building on ARM_MATH_CM4....."
00265 #endif
00266
00267 #undef  __CMSIS_GENERIC              /* enable NVIC and Systick functions */
00268 #include "string.h"
00269     #include "math.h"
00270 #ifdef  __cplusplus
00271 extern "C"
00272 {
00273 #endif
00274
00275
00280 #define DELTA_Q31           (0x100)
00281 #define DELTA_Q15           0x5
00282 #define INDEX_MASK          0x0000003F
00283 #define PI                  3.14159265358979f
00284
00289 #define TABLE_SIZE          256
00290 #define TABLE_SPACING_Q31   0x800000
00291 #define TABLE_SPACING_Q15   0x80
00292
00296   /* 1.31(q31) Fixed value of 2/360 */
00297   /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
00298 #define INPUT_SPACING           0xB60B61
00299
00300
00305   typedef enum
00306     {
00307       ARM_MATH_SUCCESS = 0,
00308       ARM_MATH_ARGUMENT_ERROR = -1,
00309       ARM_MATH_LENGTH_ERROR = -2,
00310       ARM_MATH_SIZE_MISMATCH = -3,
00311       ARM_MATH_NANINF = -4,
00312       ARM_MATH_SINGULAR = -5,
00313       ARM_MATH_TEST_FAILURE = -6
00314     } arm_status;
00315
00319   typedef int8_t q7_t;
00320
00324   typedef int16_t q15_t;
00325
00329   typedef int32_t q31_t;
00330
00334   typedef int64_t q63_t;
00335
00339   typedef float float32_t;
00340
00344   typedef double float64_t;
00345
00349 #define __SIMD32(addr)  (*(int32_t **) & (addr))
00350
00351 #if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0)
00352
00355 #define __PKHBT(ARG1, ARG2, ARG3)      ( (((int32_t)(ARG1) <<  0) & (int32_t)0x0000FFFF) | \
00356                                          (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000)  )
00357
00358 #endif
00359
00360
00364 #ifndef ARM_MATH_BIG_ENDIAN
00365
00366 #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) <<  0) & (int32_t)0x000000FF) | \
00367                                 (((int32_t)(v1) <<  8) & (int32_t)0x0000FF00) | \
00368                                 (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \
00369                                 (((int32_t)(v3) << 24) & (int32_t)0xFF000000)  )
00370 #else
00371
00372 #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) <<  0) & (int32_t)0x000000FF) | \
00373                                 (((int32_t)(v2) <<  8) & (int32_t)0x0000FF00) | \
00374                                 (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \
00375                                 (((int32_t)(v0) << 24) & (int32_t)0xFF000000)  )
00376
00377 #endif
00378
00379
00383   static __INLINE q31_t clip_q63_to_q31(
00384                     q63_t x)
00385   {
00386     return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
00387       ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x;
00388   }
00389
00393   static __INLINE q15_t clip_q63_to_q15(
00394                     q63_t x)
00395   {
00396     return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
00397       ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15);
00398   }
00399
00403   static __INLINE q7_t clip_q31_to_q7(
00404                       q31_t x)
00405   {
00406     return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ?
00407       ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x;
00408   }
00409
00413   static __INLINE q15_t clip_q31_to_q15(
00414                     q31_t x)
00415   {
00416     return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ?
00417       ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x;
00418   }
00419
00424   static __INLINE q63_t mult32x64(
00425                   q63_t x,
00426                   q31_t y)
00427   {
00428     return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) +
00429             (((q63_t) (x >> 32) * y)));
00430   }
00431
00432
00433 #if defined (ARM_MATH_CM0) && defined ( __CC_ARM   )
00434 #define __CLZ __clz
00435 #endif
00436
00437 #if defined (ARM_MATH_CM0) && ((defined (__ICCARM__)) ||(defined (__GNUC__)) || defined (__TASKING__) )
00438
00439     uint32_t __CLZ(q31_t data);
00440
00441
00442   static __INLINE uint32_t __CLZ(q31_t data)
00443   {
00444       uint32_t count = 0;
00445       uint32_t mask = 0x80000000;
00446
00447       while((data & mask) ==  0)
00448       {
00449           count += 1u;
00450           mask = mask >> 1u;
00451       }
00452
00453       return(count);
00454
00455   }
00456
00457 #endif
00458
00463   static __INLINE uint32_t arm_recip_q31(
00464                      q31_t in,
00465                      q31_t * dst,
00466                      q31_t * pRecipTable)
00467   {
00468
00469     uint32_t out, tempVal;
00470     uint32_t index, i;
00471     uint32_t signBits;
00472
00473     if(in > 0)
00474       {
00475     signBits = __CLZ(in) - 1;
00476       }
00477     else
00478       {
00479     signBits = __CLZ(-in) - 1;
00480       }
00481
00482     /* Convert input sample to 1.31 format */
00483     in = in << signBits;
00484
00485     /* calculation of index for initial approximated Val */
00486     index = (uint32_t) (in >> 24u);
00487     index = (index & INDEX_MASK);
00488
00489     /* 1.31 with exp 1 */
00490     out = pRecipTable[index];
00491
00492     /* calculation of reciprocal value */
00493     /* running approximation for two iterations */
00494     for (i = 0u; i < 2u; i++)
00495       {
00496     tempVal = (q31_t) (((q63_t) in * out) >> 31u);
00497     tempVal = 0x7FFFFFFF - tempVal;
00498     /*      1.31 with exp 1 */
00499     //out = (q31_t) (((q63_t) out * tempVal) >> 30u);
00500     out = (q31_t) clip_q63_to_q31(((q63_t) out * tempVal) >> 30u);
00501       }
00502
00503     /* write output */
00504     *dst = out;
00505
00506     /* return num of signbits of out = 1/in value */
00507     return (signBits + 1u);
00508
00509   }
00510
00514   static __INLINE uint32_t arm_recip_q15(
00515                      q15_t in,
00516                      q15_t * dst,
00517                      q15_t * pRecipTable)
00518   {
00519
00520     uint32_t out = 0, tempVal = 0;
00521     uint32_t index = 0, i = 0;
00522     uint32_t signBits = 0;
00523
00524     if(in > 0)
00525       {
00526     signBits = __CLZ(in) - 17;
00527       }
00528     else
00529       {
00530     signBits = __CLZ(-in) - 17;
00531       }
00532
00533     /* Convert input sample to 1.15 format */
00534     in = in << signBits;
00535
00536     /* calculation of index for initial approximated Val */
00537     index = in >> 8;
00538     index = (index & INDEX_MASK);
00539
00540     /*      1.15 with exp 1  */
00541     out = pRecipTable[index];
00542
00543     /* calculation of reciprocal value */
00544     /* running approximation for two iterations */
00545     for (i = 0; i < 2; i++)
00546       {
00547     tempVal = (q15_t) (((q31_t) in * out) >> 15);
00548     tempVal = 0x7FFF - tempVal;
00549     /*      1.15 with exp 1 */
00550     out = (q15_t) (((q31_t) out * tempVal) >> 14);
00551       }
00552
00553     /* write output */
00554     *dst = out;
00555
00556     /* return num of signbits of out = 1/in value */
00557     return (signBits + 1);
00558
00559   }
00560
00561
00562   /*
00563    * @brief C custom defined intrinisic function for only M0 processors
00564    */
00565 #if defined(ARM_MATH_CM0)
00566
00567   static __INLINE q31_t __SSAT(
00568                    q31_t x,
00569                    uint32_t y)
00570   {
00571     int32_t posMax, negMin;
00572     uint32_t i;
00573
00574     posMax = 1;
00575     for (i = 0; i < (y - 1); i++)
00576       {
00577     posMax = posMax * 2;
00578       }
00579
00580     if(x > 0)
00581       {
00582     posMax = (posMax - 1);
00583
00584     if(x > posMax)
00585       {
00586         x = posMax;
00587       }
00588       }
00589     else
00590       {
00591     negMin = -posMax;
00592
00593     if(x < negMin)
00594       {
00595         x = negMin;
00596       }
00597       }
00598     return (x);
00599
00600
00601   }
00602
00603 #endif /* end of ARM_MATH_CM0 */
00604
00605
00606
00607   /*
00608    * @brief C custom defined intrinsic function for M3 and M0 processors
00609    */
00610 #if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0)
00611
00612   /*
00613    * @brief C custom defined QADD8 for M3 and M0 processors
00614    */
00615   static __INLINE q31_t __QADD8(
00616                 q31_t x,
00617                 q31_t y)
00618   {
00619
00620     q31_t sum;
00621     q7_t r, s, t, u;
00622
00623     r = (char) x;
00624     s = (char) y;
00625
00626     r = __SSAT((q31_t) (r + s), 8);
00627     s = __SSAT(((q31_t) (((x << 16) >> 24) + ((y << 16) >> 24))), 8);
00628     t = __SSAT(((q31_t) (((x << 8) >> 24) + ((y << 8) >> 24))), 8);
00629     u = __SSAT(((q31_t) ((x >> 24) + (y >> 24))), 8);
00630
00631     sum = (((q31_t) u << 24) & 0xFF000000) | (((q31_t) t << 16) & 0x00FF0000) |
00632       (((q31_t) s << 8) & 0x0000FF00) | (r & 0x000000FF);
00633
00634     return sum;
00635
00636   }
00637
00638   /*
00639    * @brief C custom defined QSUB8 for M3 and M0 processors
00640    */
00641   static __INLINE q31_t __QSUB8(
00642                 q31_t x,
00643                 q31_t y)
00644   {
00645
00646     q31_t sum;
00647     q31_t r, s, t, u;
00648
00649     r = (char) x;
00650     s = (char) y;
00651
00652     r = __SSAT((r - s), 8);
00653     s = __SSAT(((q31_t) (((x << 16) >> 24) - ((y << 16) >> 24))), 8) << 8;
00654     t = __SSAT(((q31_t) (((x << 8) >> 24) - ((y << 8) >> 24))), 8) << 16;
00655     u = __SSAT(((q31_t) ((x >> 24) - (y >> 24))), 8) << 24;
00656
00657     sum =
00658       (u & 0xFF000000) | (t & 0x00FF0000) | (s & 0x0000FF00) | (r & 0x000000FF);
00659
00660     return sum;
00661   }
00662
00663   /*
00664    * @brief C custom defined QADD16 for M3 and M0 processors
00665    */
00666
00667   /*
00668    * @brief C custom defined QADD16 for M3 and M0 processors
00669    */
00670   static __INLINE q31_t __QADD16(
00671                  q31_t x,
00672                  q31_t y)
00673   {
00674
00675     q31_t sum;
00676     q31_t r, s;
00677
00678     r = (short) x;
00679     s = (short) y;
00680
00681     r = __SSAT(r + s, 16);
00682     s = __SSAT(((q31_t) ((x >> 16) + (y >> 16))), 16) << 16;
00683
00684     sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
00685
00686     return sum;
00687
00688   }
00689
00690   /*
00691    * @brief C custom defined SHADD16 for M3 and M0 processors
00692    */
00693   static __INLINE q31_t __SHADD16(
00694                   q31_t x,
00695                   q31_t y)
00696   {
00697
00698     q31_t sum;
00699     q31_t r, s;
00700
00701     r = (short) x;
00702     s = (short) y;
00703
00704     r = ((r >> 1) + (s >> 1));
00705     s = ((q31_t) ((x >> 17) + (y >> 17))) << 16;
00706
00707     sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
00708
00709     return sum;
00710
00711   }
00712
00713   /*
00714    * @brief C custom defined QSUB16 for M3 and M0 processors
00715    */
00716   static __INLINE q31_t __QSUB16(
00717                  q31_t x,
00718                  q31_t y)
00719   {
00720
00721     q31_t sum;
00722     q31_t r, s;
00723
00724     r = (short) x;
00725     s = (short) y;
00726
00727     r = __SSAT(r - s, 16);
00728     s = __SSAT(((q31_t) ((x >> 16) - (y >> 16))), 16) << 16;
00729
00730     sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
00731
00732     return sum;
00733   }
00734
00735   /*
00736    * @brief C custom defined SHSUB16 for M3 and M0 processors
00737    */
00738   static __INLINE q31_t __SHSUB16(
00739                   q31_t x,
00740                   q31_t y)
00741   {
00742
00743     q31_t diff;
00744     q31_t r, s;
00745
00746     r = (short) x;
00747     s = (short) y;
00748
00749     r = ((r >> 1) - (s >> 1));
00750     s = (((x >> 17) - (y >> 17)) << 16);
00751
00752     diff = (s & 0xFFFF0000) | (r & 0x0000FFFF);
00753
00754     return diff;
00755   }
00756
00757   /*
00758    * @brief C custom defined QASX for M3 and M0 processors
00759    */
00760   static __INLINE q31_t __QASX(
00761                    q31_t x,
00762                    q31_t y)
00763   {
00764
00765     q31_t sum = 0;
00766
00767     sum = ((sum + clip_q31_to_q15((q31_t) ((short) (x >> 16) + (short) y))) << 16) +
00768       clip_q31_to_q15((q31_t) ((short) x - (short) (y >> 16)));
00769
00770     return sum;
00771   }
00772
00773   /*
00774    * @brief C custom defined SHASX for M3 and M0 processors
00775    */
00776   static __INLINE q31_t __SHASX(
00777                 q31_t x,
00778                 q31_t y)
00779   {
00780
00781     q31_t sum;
00782     q31_t r, s;
00783
00784     r = (short) x;
00785     s = (short) y;
00786
00787     r = ((r >> 1) - (y >> 17));
00788     s = (((x >> 17) + (s >> 1)) << 16);
00789
00790     sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
00791
00792     return sum;
00793   }
00794
00795
00796   /*
00797    * @brief C custom defined QSAX for M3 and M0 processors
00798    */
00799   static __INLINE q31_t __QSAX(
00800                    q31_t x,
00801                    q31_t y)
00802   {
00803
00804     q31_t sum = 0;
00805
00806     sum = ((sum + clip_q31_to_q15((q31_t) ((short) (x >> 16) - (short) y))) << 16) +
00807       clip_q31_to_q15((q31_t) ((short) x + (short) (y >> 16)));
00808
00809     return sum;
00810   }
00811
00812   /*
00813    * @brief C custom defined SHSAX for M3 and M0 processors
00814    */
00815   static __INLINE q31_t __SHSAX(
00816                 q31_t x,
00817                 q31_t y)
00818   {
00819
00820     q31_t sum;
00821     q31_t r, s;
00822
00823     r = (short) x;
00824     s = (short) y;
00825
00826     r = ((r >> 1) + (y >> 17));
00827     s = (((x >> 17) - (s >> 1)) << 16);
00828
00829     sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
00830
00831     return sum;
00832   }
00833
00834   /*
00835    * @brief C custom defined SMUSDX for M3 and M0 processors
00836    */
00837   static __INLINE q31_t __SMUSDX(
00838                  q31_t x,
00839                  q31_t y)
00840   {
00841
00842     return ((q31_t)(((short) x * (short) (y >> 16)) -
00843             ((short) (x >> 16) * (short) y)));
00844   }
00845
00846   /*
00847    * @brief C custom defined SMUADX for M3 and M0 processors
00848    */
00849   static __INLINE q31_t __SMUADX(
00850                  q31_t x,
00851                  q31_t y)
00852   {
00853
00854     return ((q31_t)(((short) x * (short) (y >> 16)) +
00855             ((short) (x >> 16) * (short) y)));
00856   }
00857
00858   /*
00859    * @brief C custom defined QADD for M3 and M0 processors
00860    */
00861   static __INLINE q31_t __QADD(
00862                    q31_t x,
00863                    q31_t y)
00864   {
00865     return clip_q63_to_q31((q63_t) x + y);
00866   }
00867
00868   /*
00869    * @brief C custom defined QSUB for M3 and M0 processors
00870    */
00871   static __INLINE q31_t __QSUB(
00872                    q31_t x,
00873                    q31_t y)
00874   {
00875     return clip_q63_to_q31((q63_t) x - y);
00876   }
00877
00878   /*
00879    * @brief C custom defined SMLAD for M3 and M0 processors
00880    */
00881   static __INLINE q31_t __SMLAD(
00882                 q31_t x,
00883                 q31_t y,
00884                 q31_t sum)
00885   {
00886
00887     return (sum + ((short) (x >> 16) * (short) (y >> 16)) +
00888             ((short) x * (short) y));
00889   }
00890
00891   /*
00892    * @brief C custom defined SMLADX for M3 and M0 processors
00893    */
00894   static __INLINE q31_t __SMLADX(
00895                  q31_t x,
00896                  q31_t y,
00897                  q31_t sum)
00898   {
00899
00900     return (sum + ((short) (x >> 16) * (short) (y)) +
00901             ((short) x * (short) (y >> 16)));
00902   }
00903
00904   /*
00905    * @brief C custom defined SMLSDX for M3 and M0 processors
00906    */
00907   static __INLINE q31_t __SMLSDX(
00908                  q31_t x,
00909                  q31_t y,
00910                  q31_t sum)
00911   {
00912
00913     return (sum - ((short) (x >> 16) * (short) (y)) +
00914             ((short) x * (short) (y >> 16)));
00915   }
00916
00917   /*
00918    * @brief C custom defined SMLALD for M3 and M0 processors
00919    */
00920   static __INLINE q63_t __SMLALD(
00921                  q31_t x,
00922                  q31_t y,
00923                  q63_t sum)
00924   {
00925
00926     return (sum + ((short) (x >> 16) * (short) (y >> 16)) +
00927             ((short) x * (short) y));
00928   }
00929
00930   /*
00931    * @brief C custom defined SMLALDX for M3 and M0 processors
00932    */
00933   static __INLINE q63_t __SMLALDX(
00934                   q31_t x,
00935                   q31_t y,
00936                   q63_t sum)
00937   {
00938
00939     return (sum + ((short) (x >> 16) * (short) y)) +
00940       ((short) x * (short) (y >> 16));
00941   }
00942
00943   /*
00944    * @brief C custom defined SMUAD for M3 and M0 processors
00945    */
00946   static __INLINE q31_t __SMUAD(
00947                 q31_t x,
00948                 q31_t y)
00949   {
00950
00951     return (((x >> 16) * (y >> 16)) +
00952             (((x << 16) >> 16) * ((y << 16) >> 16)));
00953   }
00954
00955   /*
00956    * @brief C custom defined SMUSD for M3 and M0 processors
00957    */
00958   static __INLINE q31_t __SMUSD(
00959                 q31_t x,
00960                 q31_t y)
00961   {
00962
00963     return (-((x >> 16) * (y >> 16)) +
00964             (((x << 16) >> 16) * ((y << 16) >> 16)));
00965   }
00966
00967
00968
00969
00970 #endif /* (ARM_MATH_CM3) || defined (ARM_MATH_CM0) */
00971
00972
00976   typedef struct
00977   {
00978     uint16_t numTaps;
00979     q7_t *pState;
00980     q7_t *pCoeffs;
00981   } arm_fir_instance_q7;
00982
00986   typedef struct
00987   {
00988     uint16_t numTaps;
00989     q15_t *pState;
00990     q15_t *pCoeffs;
00991   } arm_fir_instance_q15;
00992
00996   typedef struct
00997   {
00998     uint16_t numTaps;
00999     q31_t *pState;
01000     q31_t *pCoeffs;
01001   } arm_fir_instance_q31;
01002
01006   typedef struct
01007   {
01008     uint16_t numTaps;
01009     float32_t *pState;
01010     float32_t *pCoeffs;
01011   } arm_fir_instance_f32;
01012
01013
01022   void arm_fir_q7(
01023           const arm_fir_instance_q7 * S,
01024            q7_t * pSrc,
01025           q7_t * pDst,
01026           uint32_t blockSize);
01027
01028
01038   void arm_fir_init_q7(
01039                arm_fir_instance_q7 * S,
01040                uint16_t numTaps,
01041                q7_t * pCoeffs,
01042                q7_t * pState,
01043                uint32_t blockSize);
01044
01045
01054   void arm_fir_q15(
01055            const arm_fir_instance_q15 * S,
01056             q15_t * pSrc,
01057            q15_t * pDst,
01058            uint32_t blockSize);
01059
01068   void arm_fir_fast_q15(
01069             const arm_fir_instance_q15 * S,
01070              q15_t * pSrc,
01071             q15_t * pDst,
01072             uint32_t blockSize);
01073
01085        arm_status arm_fir_init_q15(
01086                   arm_fir_instance_q15 * S,
01087                   uint16_t numTaps,
01088                   q15_t * pCoeffs,
01089                   q15_t * pState,
01090                   uint32_t blockSize);
01091
01100   void arm_fir_q31(
01101            const arm_fir_instance_q31 * S,
01102             q31_t * pSrc,
01103            q31_t * pDst,
01104            uint32_t blockSize);
01105
01114   void arm_fir_fast_q31(
01115             const arm_fir_instance_q31 * S,
01116              q31_t * pSrc,
01117             q31_t * pDst,
01118             uint32_t blockSize);
01119
01129   void arm_fir_init_q31(
01130             arm_fir_instance_q31 * S,
01131             uint16_t numTaps,
01132             q31_t * pCoeffs,
01133             q31_t * pState,
01134             uint32_t blockSize);
01135
01144   void arm_fir_f32(
01145            const arm_fir_instance_f32 * S,
01146             float32_t * pSrc,
01147            float32_t * pDst,
01148            uint32_t blockSize);
01149
01159   void arm_fir_init_f32(
01160             arm_fir_instance_f32 * S,
01161             uint16_t numTaps,
01162             float32_t * pCoeffs,
01163             float32_t * pState,
01164             uint32_t blockSize);
01165
01166
01170   typedef struct
01171   {
01172     int8_t numStages;
01173     q15_t *pState;
01174     q15_t *pCoeffs;
01175     int8_t postShift;
01177   } arm_biquad_casd_df1_inst_q15;
01178
01179
01183   typedef struct
01184   {
01185     uint32_t numStages;
01186     q31_t *pState;
01187     q31_t *pCoeffs;
01188     uint8_t postShift;
01190   } arm_biquad_casd_df1_inst_q31;
01191
01195   typedef struct
01196   {
01197     uint32_t numStages;
01198     float32_t *pState;
01199     float32_t *pCoeffs;
01202   } arm_biquad_casd_df1_inst_f32;
01203
01204
01205
01215   void arm_biquad_cascade_df1_q15(
01216                   const arm_biquad_casd_df1_inst_q15 * S,
01217                    q15_t * pSrc,
01218                   q15_t * pDst,
01219                   uint32_t blockSize);
01220
01231   void arm_biquad_cascade_df1_init_q15(
01232                        arm_biquad_casd_df1_inst_q15 * S,
01233                        uint8_t numStages,
01234                        q15_t * pCoeffs,
01235                        q15_t * pState,
01236                        int8_t postShift);
01237
01238
01248   void arm_biquad_cascade_df1_fast_q15(
01249                        const arm_biquad_casd_df1_inst_q15 * S,
01250                         q15_t * pSrc,
01251                        q15_t * pDst,
01252                        uint32_t blockSize);
01253
01254
01264   void arm_biquad_cascade_df1_q31(
01265                   const arm_biquad_casd_df1_inst_q31 * S,
01266                    q31_t * pSrc,
01267                   q31_t * pDst,
01268                   uint32_t blockSize);
01269
01279   void arm_biquad_cascade_df1_fast_q31(
01280                        const arm_biquad_casd_df1_inst_q31 * S,
01281                         q31_t * pSrc,
01282                        q31_t * pDst,
01283                        uint32_t blockSize);
01284
01295   void arm_biquad_cascade_df1_init_q31(
01296                        arm_biquad_casd_df1_inst_q31 * S,
01297                        uint8_t numStages,
01298                        q31_t * pCoeffs,
01299                        q31_t * pState,
01300                        int8_t postShift);
01301
01311   void arm_biquad_cascade_df1_f32(
01312                   const arm_biquad_casd_df1_inst_f32 * S,
01313                    float32_t * pSrc,
01314                   float32_t * pDst,
01315                   uint32_t blockSize);
01316
01326   void arm_biquad_cascade_df1_init_f32(
01327                        arm_biquad_casd_df1_inst_f32 * S,
01328                        uint8_t numStages,
01329                        float32_t * pCoeffs,
01330                        float32_t * pState);
01331
01332
01337   typedef struct
01338   {
01339     uint16_t numRows;
01340     uint16_t numCols;
01341     float32_t *pData;
01342   } arm_matrix_instance_f32;
01343
01348   typedef struct
01349   {
01350     uint16_t numRows;
01351     uint16_t numCols;
01352     q15_t *pData;
01354   } arm_matrix_instance_q15;
01355
01360   typedef struct
01361   {
01362     uint16_t numRows;
01363     uint16_t numCols;
01364     q31_t *pData;
01366   } arm_matrix_instance_q31;
01367
01368
01369
01379   arm_status arm_mat_add_f32(
01380                  const arm_matrix_instance_f32 * pSrcA,
01381                  const arm_matrix_instance_f32 * pSrcB,
01382                  arm_matrix_instance_f32 * pDst);
01383
01393   arm_status arm_mat_add_q15(
01394                  const arm_matrix_instance_q15 * pSrcA,
01395                  const arm_matrix_instance_q15 * pSrcB,
01396                  arm_matrix_instance_q15 * pDst);
01397
01407   arm_status arm_mat_add_q31(
01408                  const arm_matrix_instance_q31 * pSrcA,
01409                  const arm_matrix_instance_q31 * pSrcB,
01410                  arm_matrix_instance_q31 * pDst);
01411
01412
01421   arm_status arm_mat_trans_f32(
01422                    const arm_matrix_instance_f32 * pSrc,
01423                    arm_matrix_instance_f32 * pDst);
01424
01425
01434   arm_status arm_mat_trans_q15(
01435                    const arm_matrix_instance_q15 * pSrc,
01436                    arm_matrix_instance_q15 * pDst);
01437
01446   arm_status arm_mat_trans_q31(
01447                    const arm_matrix_instance_q31 * pSrc,
01448                    arm_matrix_instance_q31 * pDst);
01449
01450
01460   arm_status arm_mat_mult_f32(
01461                   const arm_matrix_instance_f32 * pSrcA,
01462                   const arm_matrix_instance_f32 * pSrcB,
01463                   arm_matrix_instance_f32 * pDst);
01464
01474   arm_status arm_mat_mult_q15(
01475                   const arm_matrix_instance_q15 * pSrcA,
01476                   const arm_matrix_instance_q15 * pSrcB,
01477                   arm_matrix_instance_q15 * pDst,
01478                   q15_t * pState);
01479
01490   arm_status arm_mat_mult_fast_q15(
01491                    const arm_matrix_instance_q15 * pSrcA,
01492                    const arm_matrix_instance_q15 * pSrcB,
01493                    arm_matrix_instance_q15 * pDst,
01494                    q15_t * pState);
01495
01505   arm_status arm_mat_mult_q31(
01506                   const arm_matrix_instance_q31 * pSrcA,
01507                   const arm_matrix_instance_q31 * pSrcB,
01508                   arm_matrix_instance_q31 * pDst);
01509
01519   arm_status arm_mat_mult_fast_q31(
01520                    const arm_matrix_instance_q31 * pSrcA,
01521                    const arm_matrix_instance_q31 * pSrcB,
01522                    arm_matrix_instance_q31 * pDst);
01523
01524
01534   arm_status arm_mat_sub_f32(
01535                  const arm_matrix_instance_f32 * pSrcA,
01536                  const arm_matrix_instance_f32 * pSrcB,
01537                  arm_matrix_instance_f32 * pDst);
01538
01548   arm_status arm_mat_sub_q15(
01549                  const arm_matrix_instance_q15 * pSrcA,
01550                  const arm_matrix_instance_q15 * pSrcB,
01551                  arm_matrix_instance_q15 * pDst);
01552
01562   arm_status arm_mat_sub_q31(
01563                  const arm_matrix_instance_q31 * pSrcA,
01564                  const arm_matrix_instance_q31 * pSrcB,
01565                  arm_matrix_instance_q31 * pDst);
01566
01576   arm_status arm_mat_scale_f32(
01577                    const arm_matrix_instance_f32 * pSrc,
01578                    float32_t scale,
01579                    arm_matrix_instance_f32 * pDst);
01580
01591   arm_status arm_mat_scale_q15(
01592                    const arm_matrix_instance_q15 * pSrc,
01593                    q15_t scaleFract,
01594                    int32_t shift,
01595                    arm_matrix_instance_q15 * pDst);
01596
01607   arm_status arm_mat_scale_q31(
01608                    const arm_matrix_instance_q31 * pSrc,
01609                    q31_t scaleFract,
01610                    int32_t shift,
01611                    arm_matrix_instance_q31 * pDst);
01612
01613
01623   void arm_mat_init_q31(
01624             arm_matrix_instance_q31 * S,
01625             uint16_t nRows,
01626             uint16_t nColumns,
01627             q31_t   *pData);
01628
01638   void arm_mat_init_q15(
01639             arm_matrix_instance_q15 * S,
01640             uint16_t nRows,
01641             uint16_t nColumns,
01642             q15_t    *pData);
01643
01653   void arm_mat_init_f32(
01654             arm_matrix_instance_f32 * S,
01655             uint16_t nRows,
01656             uint16_t nColumns,
01657             float32_t   *pData);
01658
01659
01660
01664   typedef struct
01665   {
01666     q15_t A0;
01667     #ifdef ARM_MATH_CM0
01668     q15_t A1;
01669     q15_t A2;
01670     #else
01671     q31_t A1;
01672     #endif
01673     q15_t state[3];
01674     q15_t Kp;
01675     q15_t Ki;
01676     q15_t Kd;
01677   } arm_pid_instance_q15;
01678
01682   typedef struct
01683   {
01684     q31_t A0;
01685     q31_t A1;
01686     q31_t A2;
01687     q31_t state[3];
01688     q31_t Kp;
01689     q31_t Ki;
01690     q31_t Kd;
01692   } arm_pid_instance_q31;
01693
01697   typedef struct
01698   {
01699     float32_t A0;
01700     float32_t A1;
01701     float32_t A2;
01702     float32_t state[3];
01703     float32_t Kp;
01704     float32_t Ki;
01705     float32_t Kd;
01706   } arm_pid_instance_f32;
01707
01708
01709
01716   void arm_pid_init_f32(
01717             arm_pid_instance_f32 * S,
01718             int32_t resetStateFlag);
01719
01725   void arm_pid_reset_f32(
01726              arm_pid_instance_f32 * S);
01727
01728
01735   void arm_pid_init_q31(
01736             arm_pid_instance_q31 * S,
01737             int32_t resetStateFlag);
01738
01739
01746   void arm_pid_reset_q31(
01747              arm_pid_instance_q31 * S);
01748
01755   void arm_pid_init_q15(
01756             arm_pid_instance_q15 * S,
01757             int32_t resetStateFlag);
01758
01764   void arm_pid_reset_q15(
01765              arm_pid_instance_q15 * S);
01766
01767
01771   typedef struct
01772   {
01773     uint32_t nValues;
01774     float32_t x1;
01775     float32_t xSpacing;
01776     float32_t *pYData;
01777   } arm_linear_interp_instance_f32;
01778
01783   typedef struct
01784   {
01785     uint16_t numRows;
01786     uint16_t numCols;
01787     float32_t *pData;
01788   } arm_bilinear_interp_instance_f32;
01789
01794   typedef struct
01795   {
01796     uint16_t numRows;
01797     uint16_t numCols;
01798     q31_t *pData;
01799   } arm_bilinear_interp_instance_q31;
01800
01805   typedef struct
01806   {
01807     uint16_t numRows;
01808     uint16_t numCols;
01809     q15_t *pData;
01810   } arm_bilinear_interp_instance_q15;
01811
01816   typedef struct
01817   {
01818     uint16_t numRows;
01819     uint16_t numCols;
01820     q7_t *pData;
01821   } arm_bilinear_interp_instance_q7;
01822
01823
01833   void arm_mult_q7(
01834             q7_t * pSrcA,
01835             q7_t * pSrcB,
01836            q7_t * pDst,
01837            uint32_t blockSize);
01838
01848   void arm_mult_q15(
01849              q15_t * pSrcA,
01850              q15_t * pSrcB,
01851             q15_t * pDst,
01852             uint32_t blockSize);
01853
01863   void arm_mult_q31(
01864              q31_t * pSrcA,
01865              q31_t * pSrcB,
01866             q31_t * pDst,
01867             uint32_t blockSize);
01868
01878   void arm_mult_f32(
01879              float32_t * pSrcA,
01880              float32_t * pSrcB,
01881             float32_t * pDst,
01882             uint32_t blockSize);
01883
01884
01889   typedef struct
01890   {
01891     uint16_t  fftLen;
01892     uint8_t   ifftFlag;
01893     uint8_t   bitReverseFlag;
01894     q15_t     *pTwiddle;
01895     uint16_t  *pBitRevTable;
01896     uint16_t  twidCoefModifier;
01897     uint16_t  bitRevFactor;
01898   } arm_cfft_radix4_instance_q15;
01899
01904   typedef struct
01905   {
01906     uint16_t    fftLen;
01907     uint8_t     ifftFlag;
01908     uint8_t     bitReverseFlag;
01909     q31_t       *pTwiddle;
01910     uint16_t    *pBitRevTable;
01911     uint16_t    twidCoefModifier;
01912     uint16_t    bitRevFactor;
01913   } arm_cfft_radix4_instance_q31;
01914
01919   typedef struct
01920   {
01921     uint16_t     fftLen;
01922     uint8_t      ifftFlag;
01923     uint8_t      bitReverseFlag;
01924     float32_t    *pTwiddle;
01925     uint16_t     *pBitRevTable;
01926     uint16_t     twidCoefModifier;
01927     uint16_t     bitRevFactor;
01928     float32_t    onebyfftLen;
01929   } arm_cfft_radix4_instance_f32;
01930
01938   void arm_cfft_radix4_q15(
01939                const arm_cfft_radix4_instance_q15 * S,
01940                q15_t * pSrc);
01941
01951   arm_status arm_cfft_radix4_init_q15(
01952                       arm_cfft_radix4_instance_q15 * S,
01953                       uint16_t fftLen,
01954                       uint8_t ifftFlag,
01955                       uint8_t bitReverseFlag);
01956
01964   void arm_cfft_radix4_q31(
01965                const arm_cfft_radix4_instance_q31 * S,
01966                q31_t * pSrc);
01967
01977   arm_status arm_cfft_radix4_init_q31(
01978                       arm_cfft_radix4_instance_q31 * S,
01979                       uint16_t fftLen,
01980                       uint8_t ifftFlag,
01981                       uint8_t bitReverseFlag);
01982
01990   void arm_cfft_radix4_f32(
01991                const arm_cfft_radix4_instance_f32 * S,
01992                float32_t * pSrc);
01993
02003   arm_status arm_cfft_radix4_init_f32(
02004                       arm_cfft_radix4_instance_f32 * S,
02005                       uint16_t fftLen,
02006                       uint8_t ifftFlag,
02007                       uint8_t bitReverseFlag);
02008
02009
02010
02011   /*----------------------------------------------------------------------
02012    *        Internal functions prototypes FFT function
02013    ----------------------------------------------------------------------*/
02014
02024   void arm_radix4_butterfly_f32(
02025                 float32_t * pSrc,
02026                 uint16_t fftLen,
02027                 float32_t * pCoef,
02028                 uint16_t twidCoefModifier);
02029
02040   void arm_radix4_butterfly_inverse_f32(
02041                     float32_t * pSrc,
02042                     uint16_t fftLen,
02043                     float32_t * pCoef,
02044                     uint16_t twidCoefModifier,
02045                     float32_t onebyfftLen);
02046
02056   void arm_bitreversal_f32(
02057                float32_t *pSrc,
02058                uint16_t fftSize,
02059                uint16_t bitRevFactor,
02060                uint16_t *pBitRevTab);
02061
02071   void arm_radix4_butterfly_q31(
02072                 q31_t *pSrc,
02073                 uint32_t fftLen,
02074                 q31_t *pCoef,
02075                 uint32_t twidCoefModifier);
02076
02086   void arm_radix4_butterfly_inverse_q31(
02087                     q31_t * pSrc,
02088                     uint32_t fftLen,
02089                     q31_t * pCoef,
02090                     uint32_t twidCoefModifier);
02091
02101   void arm_bitreversal_q31(
02102                q31_t * pSrc,
02103                uint32_t fftLen,
02104                uint16_t bitRevFactor,
02105                uint16_t *pBitRevTab);
02106
02116   void arm_radix4_butterfly_q15(
02117                 q15_t *pSrc16,
02118                 uint32_t fftLen,
02119                 q15_t *pCoef16,
02120                 uint32_t twidCoefModifier);
02121
02131   void arm_radix4_butterfly_inverse_q15(
02132                     q15_t *pSrc16,
02133                     uint32_t fftLen,
02134                     q15_t *pCoef16,
02135                     uint32_t twidCoefModifier);
02136
02146   void arm_bitreversal_q15(
02147                q15_t * pSrc,
02148                uint32_t fftLen,
02149                uint16_t bitRevFactor,
02150                uint16_t *pBitRevTab);
02151
02156   typedef struct
02157   {
02158     uint32_t fftLenReal;
02159     uint32_t fftLenBy2;
02160     uint8_t  ifftFlagR;
02161     uint8_t  bitReverseFlagR;
02162     uint32_t twidCoefRModifier;
02163     q15_t    *pTwiddleAReal;
02164     q15_t    *pTwiddleBReal;
02165     arm_cfft_radix4_instance_q15 *pCfft;
02166   } arm_rfft_instance_q15;
02167
02172   typedef struct
02173   {
02174     uint32_t fftLenReal;
02175     uint32_t fftLenBy2;
02176     uint8_t  ifftFlagR;
02177     uint8_t  bitReverseFlagR;
02178     uint32_t twidCoefRModifier;
02179     q31_t    *pTwiddleAReal;
02180     q31_t    *pTwiddleBReal;
02181     arm_cfft_radix4_instance_q31 *pCfft;
02182   } arm_rfft_instance_q31;
02183
02188   typedef struct
02189   {
02190     uint32_t  fftLenReal;
02191     uint16_t  fftLenBy2;
02192     uint8_t   ifftFlagR;
02193     uint8_t   bitReverseFlagR;
02194     uint32_t  twidCoefRModifier;
02195     float32_t *pTwiddleAReal;
02196     float32_t *pTwiddleBReal;
02197     arm_cfft_radix4_instance_f32 *pCfft;
02198   } arm_rfft_instance_f32;
02199
02208   void arm_rfft_q15(
02209             const arm_rfft_instance_q15 * S,
02210             q15_t * pSrc,
02211             q15_t * pDst);
02212
02223   arm_status arm_rfft_init_q15(
02224                    arm_rfft_instance_q15 * S,
02225                    arm_cfft_radix4_instance_q15 * S_CFFT,
02226                    uint32_t fftLenReal,
02227                    uint32_t ifftFlagR,
02228                    uint32_t bitReverseFlag);
02229
02238   void arm_rfft_q31(
02239             const arm_rfft_instance_q31 * S,
02240             q31_t * pSrc,
02241             q31_t * pDst);
02242
02253   arm_status arm_rfft_init_q31(
02254                    arm_rfft_instance_q31 * S,
02255                    arm_cfft_radix4_instance_q31 * S_CFFT,
02256                    uint32_t fftLenReal,
02257                    uint32_t ifftFlagR,
02258                    uint32_t bitReverseFlag);
02259
02270   arm_status arm_rfft_init_f32(
02271                    arm_rfft_instance_f32 * S,
02272                    arm_cfft_radix4_instance_f32 * S_CFFT,
02273                    uint32_t fftLenReal,
02274                    uint32_t ifftFlagR,
02275                    uint32_t bitReverseFlag);
02276
02285   void arm_rfft_f32(
02286             const arm_rfft_instance_f32 * S,
02287             float32_t * pSrc,
02288             float32_t * pDst);
02289
02294   typedef struct
02295   {
02296     uint16_t N;
02297     uint16_t Nby2;
02298     float32_t normalize;
02299     float32_t *pTwiddle;
02300     float32_t *pCosFactor;
02301     arm_rfft_instance_f32 *pRfft;
02302     arm_cfft_radix4_instance_f32 *pCfft;
02303   } arm_dct4_instance_f32;
02304
02316   arm_status arm_dct4_init_f32(
02317                    arm_dct4_instance_f32 * S,
02318                    arm_rfft_instance_f32 * S_RFFT,
02319                    arm_cfft_radix4_instance_f32 * S_CFFT,
02320                    uint16_t N,
02321                    uint16_t Nby2,
02322                    float32_t normalize);
02323
02332   void arm_dct4_f32(
02333             const arm_dct4_instance_f32 * S,
02334             float32_t * pState,
02335             float32_t * pInlineBuffer);
02336
02341   typedef struct
02342   {
02343     uint16_t N;
02344     uint16_t Nby2;
02345     q31_t normalize;
02346     q31_t *pTwiddle;
02347     q31_t *pCosFactor;
02348     arm_rfft_instance_q31 *pRfft;
02349     arm_cfft_radix4_instance_q31 *pCfft;
02350   } arm_dct4_instance_q31;
02351
02363   arm_status arm_dct4_init_q31(
02364                    arm_dct4_instance_q31 * S,
02365                    arm_rfft_instance_q31 * S_RFFT,
02366                    arm_cfft_radix4_instance_q31 * S_CFFT,
02367                    uint16_t N,
02368                    uint16_t Nby2,
02369                    q31_t normalize);
02370
02379   void arm_dct4_q31(
02380             const arm_dct4_instance_q31 * S,
02381             q31_t * pState,
02382             q31_t * pInlineBuffer);
02383
02388   typedef struct
02389   {
02390     uint16_t N;
02391     uint16_t Nby2;
02392     q15_t normalize;
02393     q15_t *pTwiddle;
02394     q15_t *pCosFactor;
02395     arm_rfft_instance_q15 *pRfft;
02396     arm_cfft_radix4_instance_q15 *pCfft;
02397   } arm_dct4_instance_q15;
02398
02410   arm_status arm_dct4_init_q15(
02411                    arm_dct4_instance_q15 * S,
02412                    arm_rfft_instance_q15 * S_RFFT,
02413                    arm_cfft_radix4_instance_q15 * S_CFFT,
02414                    uint16_t N,
02415                    uint16_t Nby2,
02416                    q15_t normalize);
02417
02426   void arm_dct4_q15(
02427             const arm_dct4_instance_q15 * S,
02428             q15_t * pState,
02429             q15_t * pInlineBuffer);
02430
02440   void arm_add_f32(
02441            float32_t * pSrcA,
02442            float32_t * pSrcB,
02443            float32_t * pDst,
02444            uint32_t blockSize);
02445
02455   void arm_add_q7(
02456           q7_t * pSrcA,
02457           q7_t * pSrcB,
02458           q7_t * pDst,
02459           uint32_t blockSize);
02460
02470   void arm_add_q15(
02471             q15_t * pSrcA,
02472             q15_t * pSrcB,
02473            q15_t * pDst,
02474            uint32_t blockSize);
02475
02485   void arm_add_q31(
02486             q31_t * pSrcA,
02487             q31_t * pSrcB,
02488            q31_t * pDst,
02489            uint32_t blockSize);
02490
02500   void arm_sub_f32(
02501             float32_t * pSrcA,
02502             float32_t * pSrcB,
02503            float32_t * pDst,
02504            uint32_t blockSize);
02505
02515   void arm_sub_q7(
02516            q7_t * pSrcA,
02517            q7_t * pSrcB,
02518           q7_t * pDst,
02519           uint32_t blockSize);
02520
02530   void arm_sub_q15(
02531             q15_t * pSrcA,
02532             q15_t * pSrcB,
02533            q15_t * pDst,
02534            uint32_t blockSize);
02535
02545   void arm_sub_q31(
02546             q31_t * pSrcA,
02547             q31_t * pSrcB,
02548            q31_t * pDst,
02549            uint32_t blockSize);
02550
02560   void arm_scale_f32(
02561               float32_t * pSrc,
02562              float32_t scale,
02563              float32_t * pDst,
02564              uint32_t blockSize);
02565
02576   void arm_scale_q7(
02577              q7_t * pSrc,
02578             q7_t scaleFract,
02579             int8_t shift,
02580             q7_t * pDst,
02581             uint32_t blockSize);
02582
02593   void arm_scale_q15(
02594               q15_t * pSrc,
02595              q15_t scaleFract,
02596              int8_t shift,
02597              q15_t * pDst,
02598              uint32_t blockSize);
02599
02610   void arm_scale_q31(
02611               q31_t * pSrc,
02612              q31_t scaleFract,
02613              int8_t shift,
02614              q31_t * pDst,
02615              uint32_t blockSize);
02616
02625   void arm_abs_q7(
02626            q7_t * pSrc,
02627           q7_t * pDst,
02628           uint32_t blockSize);
02629
02638   void arm_abs_f32(
02639             float32_t * pSrc,
02640            float32_t * pDst,
02641            uint32_t blockSize);
02642
02651   void arm_abs_q15(
02652             q15_t * pSrc,
02653            q15_t * pDst,
02654            uint32_t blockSize);
02655
02664   void arm_abs_q31(
02665             q31_t * pSrc,
02666            q31_t * pDst,
02667            uint32_t blockSize);
02668
02678   void arm_dot_prod_f32(
02679              float32_t * pSrcA,
02680              float32_t * pSrcB,
02681             uint32_t blockSize,
02682             float32_t * result);
02683
02693   void arm_dot_prod_q7(
02694                 q7_t * pSrcA,
02695                 q7_t * pSrcB,
02696                uint32_t blockSize,
02697                q31_t * result);
02698
02708   void arm_dot_prod_q15(
02709              q15_t * pSrcA,
02710              q15_t * pSrcB,
02711             uint32_t blockSize,
02712             q63_t * result);
02713
02723   void arm_dot_prod_q31(
02724              q31_t * pSrcA,
02725              q31_t * pSrcB,
02726             uint32_t blockSize,
02727             q63_t * result);
02728
02738   void arm_shift_q7(
02739              q7_t * pSrc,
02740             int8_t shiftBits,
02741             q7_t * pDst,
02742             uint32_t blockSize);
02743
02753   void arm_shift_q15(
02754               q15_t * pSrc,
02755              int8_t shiftBits,
02756              q15_t * pDst,
02757              uint32_t blockSize);
02758
02768   void arm_shift_q31(
02769               q31_t * pSrc,
02770              int8_t shiftBits,
02771              q31_t * pDst,
02772              uint32_t blockSize);
02773
02783   void arm_offset_f32(
02784                float32_t * pSrc,
02785               float32_t offset,
02786               float32_t * pDst,
02787               uint32_t blockSize);
02788
02798   void arm_offset_q7(
02799               q7_t * pSrc,
02800              q7_t offset,
02801              q7_t * pDst,
02802              uint32_t blockSize);
02803
02813   void arm_offset_q15(
02814                q15_t * pSrc,
02815               q15_t offset,
02816               q15_t * pDst,
02817               uint32_t blockSize);
02818
02828   void arm_offset_q31(
02829                q31_t * pSrc,
02830               q31_t offset,
02831               q31_t * pDst,
02832               uint32_t blockSize);
02833
02842   void arm_negate_f32(
02843                float32_t * pSrc,
02844               float32_t * pDst,
02845               uint32_t blockSize);
02846
02855   void arm_negate_q7(
02856               q7_t * pSrc,
02857              q7_t * pDst,
02858              uint32_t blockSize);
02859
02868   void arm_negate_q15(
02869                q15_t * pSrc,
02870               q15_t * pDst,
02871               uint32_t blockSize);
02872
02881   void arm_negate_q31(
02882                q31_t * pSrc,
02883               q31_t * pDst,
02884               uint32_t blockSize);
02892   void arm_copy_f32(
02893              float32_t * pSrc,
02894             float32_t * pDst,
02895             uint32_t blockSize);
02896
02904   void arm_copy_q7(
02905             q7_t * pSrc,
02906            q7_t * pDst,
02907            uint32_t blockSize);
02908
02916   void arm_copy_q15(
02917              q15_t * pSrc,
02918             q15_t * pDst,
02919             uint32_t blockSize);
02920
02928   void arm_copy_q31(
02929              q31_t * pSrc,
02930             q31_t * pDst,
02931             uint32_t blockSize);
02939   void arm_fill_f32(
02940              float32_t value,
02941             float32_t * pDst,
02942             uint32_t blockSize);
02943
02951   void arm_fill_q7(
02952             q7_t value,
02953            q7_t * pDst,
02954            uint32_t blockSize);
02955
02963   void arm_fill_q15(
02964              q15_t value,
02965             q15_t * pDst,
02966             uint32_t blockSize);
02967
02975   void arm_fill_q31(
02976              q31_t value,
02977             q31_t * pDst,
02978             uint32_t blockSize);
02979
02990   void arm_conv_f32(
02991              float32_t * pSrcA,
02992             uint32_t srcALen,
02993              float32_t * pSrcB,
02994             uint32_t srcBLen,
02995             float32_t * pDst);
02996
03007   void arm_conv_q15(
03008              q15_t * pSrcA,
03009             uint32_t srcALen,
03010              q15_t * pSrcB,
03011             uint32_t srcBLen,
03012             q15_t * pDst);
03013
03024   void arm_conv_fast_q15(
03025               q15_t * pSrcA,
03026              uint32_t srcALen,
03027               q15_t * pSrcB,
03028              uint32_t srcBLen,
03029              q15_t * pDst);
03030
03041   void arm_conv_q31(
03042              q31_t * pSrcA,
03043             uint32_t srcALen,
03044              q31_t * pSrcB,
03045             uint32_t srcBLen,
03046             q31_t * pDst);
03047
03058   void arm_conv_fast_q31(
03059               q31_t * pSrcA,
03060              uint32_t srcALen,
03061               q31_t * pSrcB,
03062              uint32_t srcBLen,
03063              q31_t * pDst);
03064
03075   void arm_conv_q7(
03076             q7_t * pSrcA,
03077            uint32_t srcALen,
03078             q7_t * pSrcB,
03079            uint32_t srcBLen,
03080            q7_t * pDst);
03081
03094   arm_status arm_conv_partial_f32(
03095                    float32_t * pSrcA,
03096                   uint32_t srcALen,
03097                    float32_t * pSrcB,
03098                   uint32_t srcBLen,
03099                   float32_t * pDst,
03100                   uint32_t firstIndex,
03101                   uint32_t numPoints);
03102
03115   arm_status arm_conv_partial_q15(
03116                    q15_t * pSrcA,
03117                   uint32_t srcALen,
03118                    q15_t * pSrcB,
03119                   uint32_t srcBLen,
03120                   q15_t * pDst,
03121                   uint32_t firstIndex,
03122                   uint32_t numPoints);
03123
03136   arm_status arm_conv_partial_fast_q15(
03137                         q15_t * pSrcA,
03138                        uint32_t srcALen,
03139                         q15_t * pSrcB,
03140                        uint32_t srcBLen,
03141                        q15_t * pDst,
03142                        uint32_t firstIndex,
03143                        uint32_t numPoints);
03144
03157   arm_status arm_conv_partial_q31(
03158                    q31_t * pSrcA,
03159                   uint32_t srcALen,
03160                    q31_t * pSrcB,
03161                   uint32_t srcBLen,
03162                   q31_t * pDst,
03163                   uint32_t firstIndex,
03164                   uint32_t numPoints);
03165
03166
03179   arm_status arm_conv_partial_fast_q31(
03180                         q31_t * pSrcA,
03181                        uint32_t srcALen,
03182                         q31_t * pSrcB,
03183                        uint32_t srcBLen,
03184                        q31_t * pDst,
03185                        uint32_t firstIndex,
03186                        uint32_t numPoints);
03187
03200   arm_status arm_conv_partial_q7(
03201                   q7_t * pSrcA,
03202                  uint32_t srcALen,
03203                   q7_t * pSrcB,
03204                  uint32_t srcBLen,
03205                  q7_t * pDst,
03206                  uint32_t firstIndex,
03207                  uint32_t numPoints);
03208
03209
03214   typedef struct
03215   {
03216     uint8_t M;
03217     uint16_t numTaps;
03218     q15_t *pCoeffs;
03219     q15_t *pState;
03220   } arm_fir_decimate_instance_q15;
03221
03226   typedef struct
03227   {
03228     uint8_t M;
03229     uint16_t numTaps;
03230     q31_t *pCoeffs;
03231     q31_t *pState;
03233   } arm_fir_decimate_instance_q31;
03234
03239   typedef struct
03240   {
03241     uint8_t M;
03242     uint16_t numTaps;
03243     float32_t *pCoeffs;
03244     float32_t *pState;
03246   } arm_fir_decimate_instance_f32;
03247
03248
03249
03259   void arm_fir_decimate_f32(
03260                 const arm_fir_decimate_instance_f32 * S,
03261                  float32_t * pSrc,
03262                 float32_t * pDst,
03263                 uint32_t blockSize);
03264
03265
03278   arm_status arm_fir_decimate_init_f32(
03279                        arm_fir_decimate_instance_f32 * S,
03280                        uint16_t numTaps,
03281                        uint8_t M,
03282                        float32_t * pCoeffs,
03283                        float32_t * pState,
03284                        uint32_t blockSize);
03285
03295   void arm_fir_decimate_q15(
03296                 const arm_fir_decimate_instance_q15 * S,
03297                  q15_t * pSrc,
03298                 q15_t * pDst,
03299                 uint32_t blockSize);
03300
03310   void arm_fir_decimate_fast_q15(
03311                  const arm_fir_decimate_instance_q15 * S,
03312                   q15_t * pSrc,
03313                  q15_t * pDst,
03314                  uint32_t blockSize);
03315
03316
03317
03330   arm_status arm_fir_decimate_init_q15(
03331                        arm_fir_decimate_instance_q15 * S,
03332                        uint16_t numTaps,
03333                        uint8_t M,
03334                        q15_t * pCoeffs,
03335                        q15_t * pState,
03336                        uint32_t blockSize);
03337
03347   void arm_fir_decimate_q31(
03348                 const arm_fir_decimate_instance_q31 * S,
03349                  q31_t * pSrc,
03350                 q31_t * pDst,
03351                 uint32_t blockSize);
03352
03362   void arm_fir_decimate_fast_q31(
03363                  arm_fir_decimate_instance_q31 * S,
03364                   q31_t * pSrc,
03365                  q31_t * pDst,
03366                  uint32_t blockSize);
03367
03368
03381   arm_status arm_fir_decimate_init_q31(
03382                        arm_fir_decimate_instance_q31 * S,
03383                        uint16_t numTaps,
03384                        uint8_t M,
03385                        q31_t * pCoeffs,
03386                        q31_t * pState,
03387                        uint32_t blockSize);
03388
03389
03390
03395   typedef struct
03396   {
03397     uint8_t L;
03398     uint16_t phaseLength;
03399     q15_t *pCoeffs;
03400     q15_t *pState;
03401   } arm_fir_interpolate_instance_q15;
03402
03407   typedef struct
03408   {
03409     uint8_t L;
03410     uint16_t phaseLength;
03411     q31_t *pCoeffs;
03412     q31_t *pState;
03413   } arm_fir_interpolate_instance_q31;
03414
03419   typedef struct
03420   {
03421     uint8_t L;
03422     uint16_t phaseLength;
03423     float32_t *pCoeffs;
03424     float32_t *pState;
03425   } arm_fir_interpolate_instance_f32;
03426
03427
03437   void arm_fir_interpolate_q15(
03438                    const arm_fir_interpolate_instance_q15 * S,
03439                     q15_t * pSrc,
03440                    q15_t * pDst,
03441                    uint32_t blockSize);
03442
03443
03456   arm_status arm_fir_interpolate_init_q15(
03457                       arm_fir_interpolate_instance_q15 * S,
03458                       uint8_t L,
03459                       uint16_t numTaps,
03460                       q15_t * pCoeffs,
03461                       q15_t * pState,
03462                       uint32_t blockSize);
03463
03473   void arm_fir_interpolate_q31(
03474                    const arm_fir_interpolate_instance_q31 * S,
03475                     q31_t * pSrc,
03476                    q31_t * pDst,
03477                    uint32_t blockSize);
03478
03491   arm_status arm_fir_interpolate_init_q31(
03492                       arm_fir_interpolate_instance_q31 * S,
03493                       uint8_t L,
03494                       uint16_t numTaps,
03495                       q31_t * pCoeffs,
03496                       q31_t * pState,
03497                       uint32_t blockSize);
03498
03499
03509   void arm_fir_interpolate_f32(
03510                    const arm_fir_interpolate_instance_f32 * S,
03511                     float32_t * pSrc,
03512                    float32_t * pDst,
03513                    uint32_t blockSize);
03514
03527   arm_status arm_fir_interpolate_init_f32(
03528                       arm_fir_interpolate_instance_f32 * S,
03529                       uint8_t L,
03530                       uint16_t numTaps,
03531                       float32_t * pCoeffs,
03532                       float32_t * pState,
03533                       uint32_t blockSize);
03534
03539   typedef struct
03540   {
03541     uint8_t numStages;
03542     q63_t *pState;
03543     q31_t *pCoeffs;
03544     uint8_t postShift;
03546   } arm_biquad_cas_df1_32x64_ins_q31;
03547
03548
03557   void arm_biquad_cas_df1_32x64_q31(
03558                     const arm_biquad_cas_df1_32x64_ins_q31 * S,
03559                      q31_t * pSrc,
03560                     q31_t * pDst,
03561                     uint32_t blockSize);
03562
03563
03573   void arm_biquad_cas_df1_32x64_init_q31(
03574                      arm_biquad_cas_df1_32x64_ins_q31 * S,
03575                      uint8_t numStages,
03576                      q31_t * pCoeffs,
03577                      q63_t * pState,
03578                      uint8_t postShift);
03579
03580
03581
03586   typedef struct
03587   {
03588     uint8_t   numStages;
03589     float32_t *pState;
03590     float32_t *pCoeffs;
03591   } arm_biquad_cascade_df2T_instance_f32;
03592
03593
03603   void arm_biquad_cascade_df2T_f32(
03604                    const arm_biquad_cascade_df2T_instance_f32 * S,
03605                     float32_t * pSrc,
03606                    float32_t * pDst,
03607                    uint32_t blockSize);
03608
03609
03619   void arm_biquad_cascade_df2T_init_f32(
03620                     arm_biquad_cascade_df2T_instance_f32 * S,
03621                     uint8_t numStages,
03622                     float32_t * pCoeffs,
03623                     float32_t * pState);
03624
03625
03626
03631   typedef struct
03632   {
03633     uint16_t numStages;
03634     q15_t *pState;
03635     q15_t *pCoeffs;
03636   } arm_fir_lattice_instance_q15;
03637
03642   typedef struct
03643   {
03644     uint16_t numStages;
03645     q31_t *pState;
03646     q31_t *pCoeffs;
03647   } arm_fir_lattice_instance_q31;
03648
03653   typedef struct
03654   {
03655     uint16_t numStages;
03656     float32_t *pState;
03657     float32_t *pCoeffs;
03658   } arm_fir_lattice_instance_f32;
03659
03669   void arm_fir_lattice_init_q15(
03670                 arm_fir_lattice_instance_q15 * S,
03671                 uint16_t numStages,
03672                 q15_t * pCoeffs,
03673                 q15_t * pState);
03674
03675
03684   void arm_fir_lattice_q15(
03685                const arm_fir_lattice_instance_q15 * S,
03686                 q15_t * pSrc,
03687                q15_t * pDst,
03688                uint32_t blockSize);
03689
03699   void arm_fir_lattice_init_q31(
03700                 arm_fir_lattice_instance_q31 * S,
03701                 uint16_t numStages,
03702                 q31_t * pCoeffs,
03703                 q31_t * pState);
03704
03705
03715   void arm_fir_lattice_q31(
03716                const arm_fir_lattice_instance_q31 * S,
03717                 q31_t * pSrc,
03718                q31_t * pDst,
03719                uint32_t blockSize);
03720
03730   void arm_fir_lattice_init_f32(
03731                 arm_fir_lattice_instance_f32 * S,
03732                 uint16_t numStages,
03733                 float32_t * pCoeffs,
03734                 float32_t * pState);
03735
03745   void arm_fir_lattice_f32(
03746                const arm_fir_lattice_instance_f32 * S,
03747                 float32_t * pSrc,
03748                float32_t * pDst,
03749                uint32_t blockSize);
03750
03754   typedef struct
03755   {
03756     uint16_t numStages;
03757     q15_t *pState;
03758     q15_t *pkCoeffs;
03759     q15_t *pvCoeffs;
03760   } arm_iir_lattice_instance_q15;
03761
03765   typedef struct
03766   {
03767     uint16_t numStages;
03768     q31_t *pState;
03769     q31_t *pkCoeffs;
03770     q31_t *pvCoeffs;
03771   } arm_iir_lattice_instance_q31;
03772
03776   typedef struct
03777   {
03778     uint16_t numStages;
03779     float32_t *pState;
03780     float32_t *pkCoeffs;
03781     float32_t *pvCoeffs;
03782   } arm_iir_lattice_instance_f32;
03783
03793   void arm_iir_lattice_f32(
03794                const arm_iir_lattice_instance_f32 * S,
03795                 float32_t * pSrc,
03796                float32_t * pDst,
03797                uint32_t blockSize);
03798
03810   void arm_iir_lattice_init_f32(
03811                 arm_iir_lattice_instance_f32 * S,
03812                 uint16_t numStages,
03813                 float32_t *pkCoeffs,
03814                 float32_t *pvCoeffs,
03815                 float32_t *pState,
03816                 uint32_t blockSize);
03817
03818
03828   void arm_iir_lattice_q31(
03829                const arm_iir_lattice_instance_q31 * S,
03830                 q31_t * pSrc,
03831                q31_t * pDst,
03832                uint32_t blockSize);
03833
03834
03846   void arm_iir_lattice_init_q31(
03847                 arm_iir_lattice_instance_q31 * S,
03848                 uint16_t numStages,
03849                 q31_t *pkCoeffs,
03850                 q31_t *pvCoeffs,
03851                 q31_t *pState,
03852                 uint32_t blockSize);
03853
03854
03864   void arm_iir_lattice_q15(
03865                const arm_iir_lattice_instance_q15 * S,
03866                 q15_t * pSrc,
03867                q15_t * pDst,
03868                uint32_t blockSize);
03869
03870
03882   void arm_iir_lattice_init_q15(
03883                 arm_iir_lattice_instance_q15 * S,
03884                 uint16_t numStages,
03885                 q15_t *pkCoeffs,
03886                 q15_t *pvCoeffs,
03887                 q15_t *pState,
03888                 uint32_t blockSize);
03889
03894   typedef struct
03895   {
03896     uint16_t numTaps;
03897     float32_t *pState;
03898     float32_t *pCoeffs;
03899     float32_t mu;
03900   } arm_lms_instance_f32;
03901
03913   void arm_lms_f32(
03914            const arm_lms_instance_f32 * S,
03915             float32_t * pSrc,
03916             float32_t * pRef,
03917            float32_t * pOut,
03918            float32_t * pErr,
03919            uint32_t blockSize);
03920
03932   void arm_lms_init_f32(
03933             arm_lms_instance_f32 * S,
03934             uint16_t numTaps,
03935             float32_t * pCoeffs,
03936             float32_t * pState,
03937             float32_t mu,
03938             uint32_t blockSize);
03939
03944   typedef struct
03945   {
03946     uint16_t numTaps;
03947     q15_t *pState;
03948     q15_t *pCoeffs;
03949     q15_t mu;
03950     uint32_t postShift;
03951   } arm_lms_instance_q15;
03952
03953
03966   void arm_lms_init_q15(
03967             arm_lms_instance_q15 * S,
03968             uint16_t numTaps,
03969             q15_t * pCoeffs,
03970             q15_t * pState,
03971             q15_t mu,
03972             uint32_t blockSize,
03973             uint32_t postShift);
03974
03986   void arm_lms_q15(
03987            const arm_lms_instance_q15 * S,
03988             q15_t * pSrc,
03989             q15_t * pRef,
03990            q15_t * pOut,
03991            q15_t * pErr,
03992            uint32_t blockSize);
03993
03994
03999   typedef struct
04000   {
04001     uint16_t numTaps;
04002     q31_t *pState;
04003     q31_t *pCoeffs;
04004     q31_t mu;
04005     uint32_t postShift;
04007   } arm_lms_instance_q31;
04008
04020   void arm_lms_q31(
04021            const arm_lms_instance_q31 * S,
04022             q31_t * pSrc,
04023             q31_t * pRef,
04024            q31_t * pOut,
04025            q31_t * pErr,
04026            uint32_t blockSize);
04027
04040   void arm_lms_init_q31(
04041             arm_lms_instance_q31 * S,
04042             uint16_t numTaps,
04043             q31_t *pCoeffs,
04044             q31_t *pState,
04045             q31_t mu,
04046             uint32_t blockSize,
04047             uint32_t postShift);
04048
04053   typedef struct
04054   {
04055     uint16_t  numTaps;
04056     float32_t *pState;
04057     float32_t *pCoeffs;
04058     float32_t mu;
04059     float32_t energy;
04060     float32_t x0;
04061   } arm_lms_norm_instance_f32;
04062
04074   void arm_lms_norm_f32(
04075             arm_lms_norm_instance_f32 * S,
04076              float32_t * pSrc,
04077              float32_t * pRef,
04078             float32_t * pOut,
04079             float32_t * pErr,
04080             uint32_t blockSize);
04081
04093   void arm_lms_norm_init_f32(
04094                  arm_lms_norm_instance_f32 * S,
04095                  uint16_t numTaps,
04096                  float32_t * pCoeffs,
04097                  float32_t * pState,
04098                  float32_t mu,
04099                  uint32_t blockSize);
04100
04101
04105   typedef struct
04106   {
04107     uint16_t numTaps;
04108     q31_t *pState;
04109     q31_t *pCoeffs;
04110     q31_t mu;
04111     uint8_t postShift;
04112     q31_t *recipTable;
04113     q31_t energy;
04114     q31_t x0;
04115   } arm_lms_norm_instance_q31;
04116
04128   void arm_lms_norm_q31(
04129             arm_lms_norm_instance_q31 * S,
04130              q31_t * pSrc,
04131              q31_t * pRef,
04132             q31_t * pOut,
04133             q31_t * pErr,
04134             uint32_t blockSize);
04135
04148   void arm_lms_norm_init_q31(
04149                  arm_lms_norm_instance_q31 * S,
04150                  uint16_t numTaps,
04151                  q31_t * pCoeffs,
04152                  q31_t * pState,
04153                  q31_t mu,
04154                  uint32_t blockSize,
04155                  uint8_t postShift);
04156
04161   typedef struct
04162   {
04163     uint16_t numTaps;
04164     q15_t *pState;
04165     q15_t *pCoeffs;
04166     q15_t mu;
04167     uint8_t postShift;
04168     q15_t *recipTable;
04169     q15_t energy;
04170     q15_t x0;
04171   } arm_lms_norm_instance_q15;
04172
04184   void arm_lms_norm_q15(
04185             arm_lms_norm_instance_q15 * S,
04186              q15_t * pSrc,
04187              q15_t * pRef,
04188             q15_t * pOut,
04189             q15_t * pErr,
04190             uint32_t blockSize);
04191
04192
04205   void arm_lms_norm_init_q15(
04206                  arm_lms_norm_instance_q15 * S,
04207                  uint16_t numTaps,
04208                  q15_t * pCoeffs,
04209                  q15_t * pState,
04210                  q15_t mu,
04211                  uint32_t blockSize,
04212                  uint8_t postShift);
04213
04224   void arm_correlate_f32(
04225               float32_t * pSrcA,
04226              uint32_t srcALen,
04227               float32_t * pSrcB,
04228              uint32_t srcBLen,
04229              float32_t * pDst);
04230
04241   void arm_correlate_q15(
04242               q15_t * pSrcA,
04243              uint32_t srcALen,
04244               q15_t * pSrcB,
04245              uint32_t srcBLen,
04246              q15_t * pDst);
04247
04258   void arm_correlate_fast_q15(
04259                    q15_t * pSrcA,
04260                   uint32_t srcALen,
04261                    q15_t * pSrcB,
04262                   uint32_t srcBLen,
04263                   q15_t * pDst);
04264
04275   void arm_correlate_q31(
04276               q31_t * pSrcA,
04277              uint32_t srcALen,
04278               q31_t * pSrcB,
04279              uint32_t srcBLen,
04280              q31_t * pDst);
04281
04292   void arm_correlate_fast_q31(
04293                    q31_t * pSrcA,
04294                   uint32_t srcALen,
04295                    q31_t * pSrcB,
04296                   uint32_t srcBLen,
04297                   q31_t * pDst);
04298
04309   void arm_correlate_q7(
04310              q7_t * pSrcA,
04311             uint32_t srcALen,
04312              q7_t * pSrcB,
04313             uint32_t srcBLen,
04314             q7_t * pDst);
04315
04319   typedef struct
04320   {
04321     uint16_t numTaps;
04322     uint16_t stateIndex;
04323     float32_t *pState;
04324     float32_t *pCoeffs;
04325     uint16_t maxDelay;
04326     int32_t *pTapDelay;
04327   } arm_fir_sparse_instance_f32;
04328
04333   typedef struct
04334   {
04335     uint16_t numTaps;
04336     uint16_t stateIndex;
04337     q31_t *pState;
04338     q31_t *pCoeffs;
04339     uint16_t maxDelay;
04340     int32_t *pTapDelay;
04341   } arm_fir_sparse_instance_q31;
04342
04347   typedef struct
04348   {
04349     uint16_t numTaps;
04350     uint16_t stateIndex;
04351     q15_t *pState;
04352     q15_t *pCoeffs;
04353     uint16_t maxDelay;
04354     int32_t *pTapDelay;
04355   } arm_fir_sparse_instance_q15;
04356
04361   typedef struct
04362   {
04363     uint16_t numTaps;
04364     uint16_t stateIndex;
04365     q7_t *pState;
04366     q7_t *pCoeffs;
04367     uint16_t maxDelay;
04368     int32_t *pTapDelay;
04369   } arm_fir_sparse_instance_q7;
04370
04381   void arm_fir_sparse_f32(
04382               arm_fir_sparse_instance_f32 * S,
04383                float32_t * pSrc,
04384               float32_t * pDst,
04385               float32_t * pScratchIn,
04386               uint32_t blockSize);
04387
04400   void arm_fir_sparse_init_f32(
04401                    arm_fir_sparse_instance_f32 * S,
04402                    uint16_t numTaps,
04403                    float32_t * pCoeffs,
04404                    float32_t * pState,
04405                    int32_t * pTapDelay,
04406                    uint16_t maxDelay,
04407                    uint32_t blockSize);
04408
04419   void arm_fir_sparse_q31(
04420               arm_fir_sparse_instance_q31 * S,
04421                q31_t * pSrc,
04422               q31_t * pDst,
04423               q31_t * pScratchIn,
04424               uint32_t blockSize);
04425
04438   void arm_fir_sparse_init_q31(
04439                    arm_fir_sparse_instance_q31 * S,
04440                    uint16_t numTaps,
04441                    q31_t * pCoeffs,
04442                    q31_t * pState,
04443                    int32_t * pTapDelay,
04444                    uint16_t maxDelay,
04445                    uint32_t blockSize);
04446
04458   void arm_fir_sparse_q15(
04459               arm_fir_sparse_instance_q15 * S,
04460                q15_t * pSrc,
04461               q15_t * pDst,
04462               q15_t * pScratchIn,
04463               q31_t * pScratchOut,
04464               uint32_t blockSize);
04465
04466
04479   void arm_fir_sparse_init_q15(
04480                    arm_fir_sparse_instance_q15 * S,
04481                    uint16_t numTaps,
04482                    q15_t * pCoeffs,
04483                    q15_t * pState,
04484                    int32_t * pTapDelay,
04485                    uint16_t maxDelay,
04486                    uint32_t blockSize);
04487
04499   void arm_fir_sparse_q7(
04500              arm_fir_sparse_instance_q7 * S,
04501               q7_t * pSrc,
04502              q7_t * pDst,
04503              q7_t * pScratchIn,
04504              q31_t * pScratchOut,
04505              uint32_t blockSize);
04506
04519   void arm_fir_sparse_init_q7(
04520                   arm_fir_sparse_instance_q7 * S,
04521                   uint16_t numTaps,
04522                   q7_t * pCoeffs,
04523                   q7_t * pState,
04524                   int32_t *pTapDelay,
04525                   uint16_t maxDelay,
04526                   uint32_t blockSize);
04527
04528
04529   /*
04530    * @brief  Floating-point sin_cos function.
04531    * @param[in]  theta    input value in degrees
04532    * @param[out] *pSinVal points to the processed sine output.
04533    * @param[out] *pCosVal points to the processed cos output.
04534    * @return none.
04535    */
04536
04537   void arm_sin_cos_f32(
04538                float32_t theta,
04539                float32_t *pSinVal,
04540                float32_t *pCcosVal);
04541
04542   /*
04543    * @brief  Q31 sin_cos function.
04544    * @param[in]  theta    scaled input value in degrees
04545    * @param[out] *pSinVal points to the processed sine output.
04546    * @param[out] *pCosVal points to the processed cosine output.
04547    * @return none.
04548    */
04549
04550   void arm_sin_cos_q31(
04551                q31_t theta,
04552                q31_t *pSinVal,
04553                q31_t *pCosVal);
04554
04555
04564   void arm_cmplx_conj_f32(
04565                float32_t * pSrc,
04566               float32_t * pDst,
04567               uint32_t numSamples);
04568
04577   void arm_cmplx_conj_q31(
04578                q31_t * pSrc,
04579               q31_t * pDst,
04580               uint32_t numSamples);
04581
04590   void arm_cmplx_conj_q15(
04591                q15_t * pSrc,
04592               q15_t * pDst,
04593               uint32_t numSamples);
04594
04595
04596
04605   void arm_cmplx_mag_squared_f32(
04606                   float32_t * pSrc,
04607                  float32_t * pDst,
04608                  uint32_t numSamples);
04609
04618   void arm_cmplx_mag_squared_q31(
04619                   q31_t * pSrc,
04620                  q31_t * pDst,
04621                  uint32_t numSamples);
04622
04631   void arm_cmplx_mag_squared_q15(
04632                   q15_t * pSrc,
04633                  q15_t * pDst,
04634                  uint32_t numSamples);
04635
04636
04711   static __INLINE float32_t arm_pid_f32(
04712                     arm_pid_instance_f32 * S,
04713                     float32_t in)
04714   {
04715     float32_t out;
04716
04717     /* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]  */
04718     out = (S->A0 * in) +
04719       (S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]);
04720
04721     /* Update state */
04722     S->state[1] = S->state[0];
04723     S->state[0] = in;
04724     S->state[2] = out;
04725
04726     /* return to application */
04727     return (out);
04728
04729   }
04730
04746   static __INLINE q31_t arm_pid_q31(
04747                     arm_pid_instance_q31 * S,
04748                     q31_t in)
04749   {
04750     q63_t acc;
04751     q31_t out;
04752
04753     /* acc = A0 * x[n]  */
04754     acc = (q63_t) S->A0 * in;
04755
04756     /* acc += A1 * x[n-1] */
04757     acc += (q63_t) S->A1 * S->state[0];
04758
04759     /* acc += A2 * x[n-2]  */
04760     acc += (q63_t) S->A2 * S->state[1];
04761
04762     /* convert output to 1.31 format to add y[n-1] */
04763     out = (q31_t) (acc >> 31u);
04764
04765     /* out += y[n-1] */
04766     out += S->state[2];
04767
04768     /* Update state */
04769     S->state[1] = S->state[0];
04770     S->state[0] = in;
04771     S->state[2] = out;
04772
04773     /* return to application */
04774     return (out);
04775
04776   }
04777
04794   static __INLINE q15_t arm_pid_q15(
04795                     arm_pid_instance_q15 * S,
04796                     q15_t in)
04797   {
04798     q63_t acc;
04799     q15_t out;
04800
04801     /* Implementation of PID controller */
04802
04803     #ifdef ARM_MATH_CM0
04804
04805     /* acc = A0 * x[n]  */
04806     acc = ((q31_t) S->A0 )* in ;
04807
04808     #else
04809
04810     /* acc = A0 * x[n]  */
04811     acc = (q31_t) __SMUAD(S->A0, in);
04812
04813     #endif
04814
04815     #ifdef ARM_MATH_CM0
04816
04817     /* acc += A1 * x[n-1] + A2 * x[n-2]  */
04818     acc += (q31_t) S->A1  *  S->state[0] ;
04819     acc += (q31_t) S->A2  *  S->state[1] ;
04820
04821     #else
04822
04823     /* acc += A1 * x[n-1] + A2 * x[n-2]  */
04824     acc = __SMLALD(S->A1, (q31_t)__SIMD32(S->state), acc);
04825
04826     #endif
04827
04828     /* acc += y[n-1] */
04829     acc += (q31_t) S->state[2] << 15;
04830
04831     /* saturate the output */
04832     out = (q15_t) (__SSAT((acc >> 15), 16));
04833
04834     /* Update state */
04835     S->state[1] = S->state[0];
04836     S->state[0] = in;
04837     S->state[2] = out;
04838
04839     /* return to application */
04840     return (out);
04841
04842   }
04843
04857   arm_status arm_mat_inverse_f32(
04858                  const arm_matrix_instance_f32 * src,
04859                  arm_matrix_instance_f32 * dst);
04860
04861
04862
04905   static __INLINE void arm_clarke_f32(
04906                       float32_t Ia,
04907                       float32_t Ib,
04908                       float32_t * pIalpha,
04909                       float32_t * pIbeta)
04910   {
04911     /* Calculate pIalpha using the equation, pIalpha = Ia */
04912     *pIalpha = Ia;
04913
04914     /* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */
04915     *pIbeta = ((float32_t) 0.57735026919 * Ia + (float32_t) 1.15470053838 * Ib);
04916
04917   }
04918
04934   static __INLINE void arm_clarke_q31(
04935                       q31_t Ia,
04936                       q31_t Ib,
04937                       q31_t * pIalpha,
04938                       q31_t * pIbeta)
04939   {
04940     q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
04941
04942     /* Calculating pIalpha from Ia by equation pIalpha = Ia */
04943     *pIalpha = Ia;
04944
04945     /* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */
04946     product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30);
04947
04948     /* Intermediate product is calculated by (2/sqrt(3) * Ib) */
04949     product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30);
04950
04951     /* pIbeta is calculated by adding the intermediate products */
04952     *pIbeta = __QADD(product1, product2);
04953   }
04954
04966   void arm_q7_to_q31(
04967              q7_t * pSrc,
04968              q31_t * pDst,
04969              uint32_t blockSize);
04970
04971
04972
04973
05009   static __INLINE void arm_inv_clarke_f32(
05010                       float32_t Ialpha,
05011                       float32_t Ibeta,
05012                       float32_t * pIa,
05013                       float32_t * pIb)
05014   {
05015     /* Calculating pIa from Ialpha by equation pIa = Ialpha */
05016     *pIa = Ialpha;
05017
05018     /* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibeta */
05019     *pIb = -0.5 * Ialpha + (float32_t) 0.8660254039 *Ibeta;
05020
05021   }
05022
05038   static __INLINE void arm_inv_clarke_q31(
05039                       q31_t Ialpha,
05040                       q31_t Ibeta,
05041                       q31_t * pIa,
05042                       q31_t * pIb)
05043   {
05044     q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
05045
05046     /* Calculating pIa from Ialpha by equation pIa = Ialpha */
05047     *pIa = Ialpha;
05048
05049     /* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */
05050     product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31);
05051
05052     /* Intermediate product is calculated by (1/sqrt(3) * pIb) */
05053     product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31);
05054
05055     /* pIb is calculated by subtracting the products */
05056     *pIb = __QSUB(product2, product1);
05057
05058   }
05059
05071   void arm_q7_to_q15(
05072               q7_t * pSrc,
05073              q15_t * pDst,
05074              uint32_t blockSize);
05075
05076
05077
05125   static __INLINE void arm_park_f32(
05126                     float32_t Ialpha,
05127                     float32_t Ibeta,
05128                     float32_t * pId,
05129                     float32_t * pIq,
05130                     float32_t sinVal,
05131                     float32_t cosVal)
05132   {
05133     /* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */
05134     *pId = Ialpha * cosVal + Ibeta * sinVal;
05135
05136     /* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */
05137     *pIq = -Ialpha * sinVal + Ibeta * cosVal;
05138
05139   }
05140
05159   static __INLINE void arm_park_q31(
05160                     q31_t Ialpha,
05161                     q31_t Ibeta,
05162                     q31_t * pId,
05163                     q31_t * pIq,
05164                     q31_t sinVal,
05165                     q31_t cosVal)
05166   {
05167     q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
05168     q31_t product3, product4;                    /* Temporary variables used to store intermediate results */
05169
05170     /* Intermediate product is calculated by (Ialpha * cosVal) */
05171     product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31);
05172
05173     /* Intermediate product is calculated by (Ibeta * sinVal) */
05174     product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31);
05175
05176
05177     /* Intermediate product is calculated by (Ialpha * sinVal) */
05178     product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31);
05179
05180     /* Intermediate product is calculated by (Ibeta * cosVal) */
05181     product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31);
05182
05183     /* Calculate pId by adding the two intermediate products 1 and 2 */
05184     *pId = __QADD(product1, product2);
05185
05186     /* Calculate pIq by subtracting the two intermediate products 3 from 4 */
05187     *pIq = __QSUB(product4, product3);
05188   }
05189
05201   void arm_q7_to_float(
05202                 q7_t * pSrc,
05203                float32_t * pDst,
05204                uint32_t blockSize);
05205
05206
05244   static __INLINE void arm_inv_park_f32(
05245                     float32_t Id,
05246                     float32_t Iq,
05247                     float32_t * pIalpha,
05248                     float32_t * pIbeta,
05249                     float32_t sinVal,
05250                     float32_t cosVal)
05251   {
05252     /* Calculate pIalpha using the equation, pIalpha = Id * cosVal - Iq * sinVal */
05253     *pIalpha = Id * cosVal - Iq * sinVal;
05254
05255     /* Calculate pIbeta using the equation, pIbeta = Id * sinVal + Iq * cosVal */
05256     *pIbeta = Id * sinVal + Iq * cosVal;
05257
05258   }
05259
05260
05279   static __INLINE void arm_inv_park_q31(
05280                     q31_t Id,
05281                     q31_t Iq,
05282                     q31_t * pIalpha,
05283                     q31_t * pIbeta,
05284                     q31_t sinVal,
05285                     q31_t cosVal)
05286   {
05287     q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
05288     q31_t product3, product4;                    /* Temporary variables used to store intermediate results */
05289
05290     /* Intermediate product is calculated by (Id * cosVal) */
05291     product1 = (q31_t) (((q63_t) (Id) * (cosVal)) >> 31);
05292
05293     /* Intermediate product is calculated by (Iq * sinVal) */
05294     product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31);
05295
05296
05297     /* Intermediate product is calculated by (Id * sinVal) */
05298     product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31);
05299
05300     /* Intermediate product is calculated by (Iq * cosVal) */
05301     product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31);
05302
05303     /* Calculate pIalpha by using the two intermediate products 1 and 2 */
05304     *pIalpha = __QSUB(product1, product2);
05305
05306     /* Calculate pIbeta by using the two intermediate products 3 and 4 */
05307     *pIbeta = __QADD(product4, product3);
05308
05309   }
05310
05323   void arm_q31_to_float(
05324              q31_t * pSrc,
05325             float32_t * pDst,
05326             uint32_t blockSize);
05327
05377   static __INLINE float32_t arm_linear_interp_f32(
05378                           arm_linear_interp_instance_f32 * S,
05379                           float32_t x)
05380   {
05381
05382       float32_t y;
05383       float32_t x0, x1;                     /* Nearest input values */
05384       float32_t y0, y1;                     /* Nearest output values */
05385       float32_t xSpacing = S->xSpacing;     /* spacing between input values */
05386       int32_t i;                            /* Index variable */
05387       float32_t *pYData = S->pYData;        /* pointer to output table */
05388
05389       /* Calculation of index */
05390       i =   (x - S->x1) / xSpacing;
05391
05392       if(i < 0)
05393       {
05394          /* Iniatilize output for below specified range as least output value of table */
05395          y = pYData[0];
05396       }
05397       else if(i >= S->nValues)
05398       {
05399           /* Iniatilize output for above specified range as last output value of table */
05400           y = pYData[S->nValues-1];
05401       }
05402       else
05403       {
05404           /* Calculation of nearest input values */
05405           x0 = S->x1 + i * xSpacing;
05406           x1 = S->x1 + (i +1) * xSpacing;
05407
05408          /* Read of nearest output values */
05409           y0 = pYData[i];
05410           y1 = pYData[i + 1];
05411
05412           /* Calculation of output */
05413           y = y0 + (x - x0) * ((y1 - y0)/(x1-x0));
05414
05415       }
05416
05417       /* returns output value */
05418       return (y);
05419   }
05420
05436   static __INLINE q31_t arm_linear_interp_q31(q31_t *pYData,
05437                           q31_t x, uint32_t nValues)
05438   {
05439     q31_t y;                                   /* output */
05440     q31_t y0, y1;                                /* Nearest output values */
05441     q31_t fract;                                 /* fractional part */
05442     int32_t index;                              /* Index to read nearest output values */
05443
05444     /* Input is in 12.20 format */
05445     /* 12 bits for the table index */
05446     /* Index value calculation */
05447     index = ((x & 0xFFF00000) >> 20);
05448
05449     if(index >= (nValues - 1))
05450     {
05451         return(pYData[nValues - 1]);
05452     }
05453     else if(index < 0)
05454     {
05455         return(pYData[0]);
05456     }
05457     else
05458     {
05459
05460         /* 20 bits for the fractional part */
05461         /* shift left by 11 to keep fract in 1.31 format */
05462         fract = (x & 0x000FFFFF) << 11;
05463
05464         /* Read two nearest output values from the index in 1.31(q31) format */
05465         y0 = pYData[index];
05466         y1 = pYData[index + 1u];
05467
05468         /* Calculation of y0 * (1-fract) and y is in 2.30 format */
05469         y = ((q31_t) ((q63_t) y0 * (0x7FFFFFFF - fract) >> 32));
05470
05471         /* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */
05472         y += ((q31_t) (((q63_t) y1 * fract) >> 32));
05473
05474         /* Convert y to 1.31 format */
05475         return (y << 1u);
05476
05477     }
05478
05479   }
05480
05496   static __INLINE q15_t arm_linear_interp_q15(q15_t *pYData, q31_t x, uint32_t nValues)
05497   {
05498     q63_t y;                                   /* output */
05499     q15_t y0, y1;                              /* Nearest output values */
05500     q31_t fract;                               /* fractional part */
05501     int32_t index;                            /* Index to read nearest output values */
05502
05503     /* Input is in 12.20 format */
05504     /* 12 bits for the table index */
05505     /* Index value calculation */
05506     index = ((x & 0xFFF00000) >> 20u);
05507
05508     if(index >= (nValues - 1))
05509     {
05510         return(pYData[nValues - 1]);
05511     }
05512     else if(index < 0)
05513     {
05514         return(pYData[0]);
05515     }
05516     else
05517     {
05518         /* 20 bits for the fractional part */
05519         /* fract is in 12.20 format */
05520         fract = (x & 0x000FFFFF);
05521
05522         /* Read two nearest output values from the index */
05523         y0 = pYData[index];
05524         y1 = pYData[index + 1u];
05525
05526         /* Calculation of y0 * (1-fract) and y is in 13.35 format */
05527         y = ((q63_t) y0 * (0xFFFFF - fract));
05528
05529         /* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */
05530         y += ((q63_t) y1 * (fract));
05531
05532         /* convert y to 1.15 format */
05533         return (y >> 20);
05534     }
05535
05536
05537   }
05538
05553   static __INLINE q7_t arm_linear_interp_q7(q7_t *pYData, q31_t x,  uint32_t nValues)
05554   {
05555     q31_t y;                                   /* output */
05556     q7_t y0, y1;                                 /* Nearest output values */
05557     q31_t fract;                                 /* fractional part */
05558     int32_t index;                              /* Index to read nearest output values */
05559
05560     /* Input is in 12.20 format */
05561     /* 12 bits for the table index */
05562     /* Index value calculation */
05563     index = ((x & 0xFFF00000) >> 20u);
05564
05565
05566     if(index >= (nValues - 1))
05567     {
05568         return(pYData[nValues - 1]);
05569     }
05570     else if(index < 0)
05571     {
05572         return(pYData[0]);
05573     }
05574     else
05575     {
05576
05577         /* 20 bits for the fractional part */
05578         /* fract is in 12.20 format */
05579         fract = (x & 0x000FFFFF);
05580
05581         /* Read two nearest output values from the index and are in 1.7(q7) format */
05582         y0 = pYData[index];
05583         y1 = pYData[index + 1u];
05584
05585         /* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */
05586         y = ((y0 * (0xFFFFF - fract)));
05587
05588         /* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */
05589         y += (y1 * fract);
05590
05591         /* convert y to 1.7(q7) format */
05592         return (y >> 20u);
05593
05594     }
05595
05596   }
05607   float32_t arm_sin_f32(
05608              float32_t x);
05609
05616   q31_t arm_sin_q31(
05617              q31_t x);
05618
05625   q15_t arm_sin_q15(
05626              q15_t x);
05627
05634   float32_t arm_cos_f32(
05635              float32_t x);
05636
05643   q31_t arm_cos_q31(
05644              q31_t x);
05645
05652   q15_t arm_cos_q15(
05653              q15_t x);
05654
05655
05695   static __INLINE arm_status  arm_sqrt_f32(
05696                       float32_t in, float32_t *pOut)
05697   {
05698     if(in > 0)
05699     {
05700
05701     #if __FPU_USED
05702         *pOut = __sqrtf(in);
05703     #else
05704         *pOut = sqrtf(in);
05705     #endif
05706
05707         return (ARM_MATH_SUCCESS);
05708     }
05709     else
05710     {
05711         *pOut = 0.0f;
05712         return (ARM_MATH_ARGUMENT_ERROR);
05713     }
05714
05715   }
05716
05717
05725   arm_status arm_sqrt_q31(
05726               q31_t in, q31_t *pOut);
05727
05735   arm_status arm_sqrt_q15(
05736               q15_t in, q15_t *pOut);
05737
05751   static __INLINE void arm_circularWrite_f32(
05752                          int32_t * circBuffer,
05753                          int32_t L,
05754                          uint16_t * writeOffset,
05755                          int32_t bufferInc,
05756                          const int32_t * src,
05757                          int32_t srcInc,
05758                          uint32_t blockSize)
05759   {
05760     uint32_t i = 0u;
05761     int32_t wOffset;
05762
05763     /* Copy the value of Index pointer that points
05764      * to the current location where the input samples to be copied */
05765     wOffset = *writeOffset;
05766
05767     /* Loop over the blockSize */
05768     i = blockSize;
05769
05770     while(i > 0u)
05771       {
05772     /* copy the input sample to the circular buffer */
05773     circBuffer[wOffset] = *src;
05774
05775     /* Update the input pointer */
05776     src += srcInc;
05777
05778     /* Circularly update wOffset.  Watch out for positive and negative value */
05779     wOffset += bufferInc;
05780     if(wOffset >= L)
05781       wOffset -= L;
05782
05783     /* Decrement the loop counter */
05784     i--;
05785       }
05786
05787     /* Update the index pointer */
05788     *writeOffset = wOffset;
05789   }
05790
05791
05792
05796   static __INLINE void arm_circularRead_f32(
05797                         int32_t * circBuffer,
05798                         int32_t L,
05799                         int32_t * readOffset,
05800                         int32_t bufferInc,
05801                         int32_t * dst,
05802                         int32_t * dst_base,
05803                         int32_t dst_length,
05804                         int32_t dstInc,
05805                         uint32_t blockSize)
05806   {
05807     uint32_t i = 0u;
05808     int32_t rOffset, dst_end;
05809
05810     /* Copy the value of Index pointer that points
05811      * to the current location from where the input samples to be read */
05812     rOffset = *readOffset;
05813     dst_end = (int32_t) (dst_base + dst_length);
05814
05815     /* Loop over the blockSize */
05816     i = blockSize;
05817
05818     while(i > 0u)
05819       {
05820     /* copy the sample from the circular buffer to the destination buffer */
05821     *dst = circBuffer[rOffset];
05822
05823     /* Update the input pointer */
05824     dst += dstInc;
05825
05826     if(dst == (int32_t *) dst_end)
05827       {
05828         dst = dst_base;
05829       }
05830
05831     /* Circularly update rOffset.  Watch out for positive and negative value  */
05832     rOffset += bufferInc;
05833
05834     if(rOffset >= L)
05835       {
05836         rOffset -= L;
05837       }
05838
05839     /* Decrement the loop counter */
05840     i--;
05841       }
05842
05843     /* Update the index pointer */
05844     *readOffset = rOffset;
05845   }
05846
05851   static __INLINE void arm_circularWrite_q15(
05852                          q15_t * circBuffer,
05853                          int32_t L,
05854                          uint16_t * writeOffset,
05855                          int32_t bufferInc,
05856                          const q15_t * src,
05857                          int32_t srcInc,
05858                          uint32_t blockSize)
05859   {
05860     uint32_t i = 0u;
05861     int32_t wOffset;
05862
05863     /* Copy the value of Index pointer that points
05864      * to the current location where the input samples to be copied */
05865     wOffset = *writeOffset;
05866
05867     /* Loop over the blockSize */
05868     i = blockSize;
05869
05870     while(i > 0u)
05871       {
05872     /* copy the input sample to the circular buffer */
05873     circBuffer[wOffset] = *src;
05874
05875     /* Update the input pointer */
05876     src += srcInc;
05877
05878     /* Circularly update wOffset.  Watch out for positive and negative value */
05879     wOffset += bufferInc;
05880     if(wOffset >= L)
05881       wOffset -= L;
05882
05883     /* Decrement the loop counter */
05884     i--;
05885       }
05886
05887     /* Update the index pointer */
05888     *writeOffset = wOffset;
05889   }
05890
05891
05892
05896   static __INLINE void arm_circularRead_q15(
05897                         q15_t * circBuffer,
05898                         int32_t L,
05899                         int32_t * readOffset,
05900                         int32_t bufferInc,
05901                         q15_t * dst,
05902                         q15_t * dst_base,
05903                         int32_t dst_length,
05904                         int32_t dstInc,
05905                         uint32_t blockSize)
05906   {
05907     uint32_t i = 0;
05908     int32_t rOffset, dst_end;
05909
05910     /* Copy the value of Index pointer that points
05911      * to the current location from where the input samples to be read */
05912     rOffset = *readOffset;
05913
05914     dst_end = (int32_t) (dst_base + dst_length);
05915
05916     /* Loop over the blockSize */
05917     i = blockSize;
05918
05919     while(i > 0u)
05920       {
05921     /* copy the sample from the circular buffer to the destination buffer */
05922     *dst = circBuffer[rOffset];
05923
05924     /* Update the input pointer */
05925     dst += dstInc;
05926
05927     if(dst == (q15_t *) dst_end)
05928       {
05929         dst = dst_base;
05930       }
05931
05932     /* Circularly update wOffset.  Watch out for positive and negative value */
05933     rOffset += bufferInc;
05934
05935     if(rOffset >= L)
05936       {
05937         rOffset -= L;
05938       }
05939
05940     /* Decrement the loop counter */
05941     i--;
05942       }
05943
05944     /* Update the index pointer */
05945     *readOffset = rOffset;
05946   }
05947
05948
05953   static __INLINE void arm_circularWrite_q7(
05954                         q7_t * circBuffer,
05955                         int32_t L,
05956                         uint16_t * writeOffset,
05957                         int32_t bufferInc,
05958                         const q7_t * src,
05959                         int32_t srcInc,
05960                         uint32_t blockSize)
05961   {
05962     uint32_t i = 0u;
05963     int32_t wOffset;
05964
05965     /* Copy the value of Index pointer that points
05966      * to the current location where the input samples to be copied */
05967     wOffset = *writeOffset;
05968
05969     /* Loop over the blockSize */
05970     i = blockSize;
05971
05972     while(i > 0u)
05973       {
05974     /* copy the input sample to the circular buffer */
05975     circBuffer[wOffset] = *src;
05976
05977     /* Update the input pointer */
05978     src += srcInc;
05979
05980     /* Circularly update wOffset.  Watch out for positive and negative value */
05981     wOffset += bufferInc;
05982     if(wOffset >= L)
05983       wOffset -= L;
05984
05985     /* Decrement the loop counter */
05986     i--;
05987       }
05988
05989     /* Update the index pointer */
05990     *writeOffset = wOffset;
05991   }
05992
05993
05994
05998   static __INLINE void arm_circularRead_q7(
05999                        q7_t * circBuffer,
06000                        int32_t L,
06001                        int32_t * readOffset,
06002                        int32_t bufferInc,
06003                        q7_t * dst,
06004                        q7_t * dst_base,
06005                        int32_t dst_length,
06006                        int32_t dstInc,
06007                        uint32_t blockSize)
06008   {
06009     uint32_t i = 0;
06010     int32_t rOffset, dst_end;
06011
06012     /* Copy the value of Index pointer that points
06013      * to the current location from where the input samples to be read */
06014     rOffset = *readOffset;
06015
06016     dst_end = (int32_t) (dst_base + dst_length);
06017
06018     /* Loop over the blockSize */
06019     i = blockSize;
06020
06021     while(i > 0u)
06022       {
06023     /* copy the sample from the circular buffer to the destination buffer */
06024     *dst = circBuffer[rOffset];
06025
06026     /* Update the input pointer */
06027     dst += dstInc;
06028
06029     if(dst == (q7_t *) dst_end)
06030       {
06031         dst = dst_base;
06032       }
06033
06034     /* Circularly update rOffset.  Watch out for positive and negative value */
06035     rOffset += bufferInc;
06036
06037     if(rOffset >= L)
06038       {
06039         rOffset -= L;
06040       }
06041
06042     /* Decrement the loop counter */
06043     i--;
06044       }
06045
06046     /* Update the index pointer */
06047     *readOffset = rOffset;
06048   }
06049
06050
06059   void arm_power_q31(
06060               q31_t * pSrc,
06061              uint32_t blockSize,
06062              q63_t * pResult);
06063
06072   void arm_power_f32(
06073               float32_t * pSrc,
06074              uint32_t blockSize,
06075              float32_t * pResult);
06076
06085   void arm_power_q15(
06086               q15_t * pSrc,
06087              uint32_t blockSize,
06088              q63_t * pResult);
06089
06098   void arm_power_q7(
06099              q7_t * pSrc,
06100             uint32_t blockSize,
06101             q31_t * pResult);
06102
06111   void arm_mean_q7(
06112             q7_t * pSrc,
06113            uint32_t blockSize,
06114            q7_t * pResult);
06115
06123   void arm_mean_q15(
06124              q15_t * pSrc,
06125             uint32_t blockSize,
06126             q15_t * pResult);
06127
06135   void arm_mean_q31(
06136              q31_t * pSrc,
06137             uint32_t blockSize,
06138             q31_t * pResult);
06139
06147   void arm_mean_f32(
06148              float32_t * pSrc,
06149             uint32_t blockSize,
06150             float32_t * pResult);
06151
06160   void arm_var_f32(
06161             float32_t * pSrc,
06162            uint32_t blockSize,
06163            float32_t * pResult);
06164
06173   void arm_var_q31(
06174             q31_t * pSrc,
06175            uint32_t blockSize,
06176            q63_t * pResult);
06177
06186   void arm_var_q15(
06187             q15_t * pSrc,
06188            uint32_t blockSize,
06189            q31_t * pResult);
06190
06199   void arm_rms_f32(
06200             float32_t * pSrc,
06201            uint32_t blockSize,
06202            float32_t * pResult);
06203
06212   void arm_rms_q31(
06213             q31_t * pSrc,
06214            uint32_t blockSize,
06215            q31_t * pResult);
06216
06225   void arm_rms_q15(
06226             q15_t * pSrc,
06227            uint32_t blockSize,
06228            q15_t * pResult);
06229
06238   void arm_std_f32(
06239             float32_t * pSrc,
06240            uint32_t blockSize,
06241            float32_t * pResult);
06242
06251   void arm_std_q31(
06252             q31_t * pSrc,
06253            uint32_t blockSize,
06254            q31_t * pResult);
06255
06264   void arm_std_q15(
06265             q15_t * pSrc,
06266            uint32_t blockSize,
06267            q15_t * pResult);
06268
06277   void arm_cmplx_mag_f32(
06278               float32_t * pSrc,
06279              float32_t * pDst,
06280              uint32_t numSamples);
06281
06290   void arm_cmplx_mag_q31(
06291               q31_t * pSrc,
06292              q31_t * pDst,
06293              uint32_t numSamples);
06294
06303   void arm_cmplx_mag_q15(
06304               q15_t * pSrc,
06305              q15_t * pDst,
06306              uint32_t numSamples);
06307
06318   void arm_cmplx_dot_prod_q15(
06319                    q15_t * pSrcA,
06320                    q15_t * pSrcB,
06321                   uint32_t numSamples,
06322                   q31_t * realResult,
06323                   q31_t * imagResult);
06324
06335   void arm_cmplx_dot_prod_q31(
06336                    q31_t * pSrcA,
06337                    q31_t * pSrcB,
06338                   uint32_t numSamples,
06339                   q63_t * realResult,
06340                   q63_t * imagResult);
06341
06352   void arm_cmplx_dot_prod_f32(
06353                    float32_t * pSrcA,
06354                    float32_t * pSrcB,
06355                   uint32_t numSamples,
06356                   float32_t * realResult,
06357                   float32_t * imagResult);
06358
06368   void arm_cmplx_mult_real_q15(
06369                     q15_t * pSrcCmplx,
06370                     q15_t * pSrcReal,
06371                    q15_t * pCmplxDst,
06372                    uint32_t numSamples);
06373
06383   void arm_cmplx_mult_real_q31(
06384                     q31_t * pSrcCmplx,
06385                     q31_t * pSrcReal,
06386                    q31_t * pCmplxDst,
06387                    uint32_t numSamples);
06388
06398   void arm_cmplx_mult_real_f32(
06399                     float32_t * pSrcCmplx,
06400                     float32_t * pSrcReal,
06401                    float32_t * pCmplxDst,
06402                    uint32_t numSamples);
06403
06413   void arm_min_q7(
06414            q7_t * pSrc,
06415           uint32_t blockSize,
06416           q7_t * result,
06417           uint32_t * index);
06418
06428   void arm_min_q15(
06429             q15_t * pSrc,
06430            uint32_t blockSize,
06431            q15_t * pResult,
06432            uint32_t * pIndex);
06433
06442   void arm_min_q31(
06443             q31_t * pSrc,
06444            uint32_t blockSize,
06445            q31_t * pResult,
06446            uint32_t * pIndex);
06447
06457   void arm_min_f32(
06458             float32_t * pSrc,
06459            uint32_t blockSize,
06460            float32_t * pResult,
06461            uint32_t * pIndex);
06462
06472   void arm_max_q7(
06473            q7_t * pSrc,
06474           uint32_t blockSize,
06475           q7_t * pResult,
06476           uint32_t * pIndex);
06477
06487   void arm_max_q15(
06488             q15_t * pSrc,
06489            uint32_t blockSize,
06490            q15_t * pResult,
06491            uint32_t * pIndex);
06492
06502   void arm_max_q31(
06503             q31_t * pSrc,
06504            uint32_t blockSize,
06505            q31_t * pResult,
06506            uint32_t * pIndex);
06507
06517   void arm_max_f32(
06518             float32_t * pSrc,
06519            uint32_t blockSize,
06520            float32_t * pResult,
06521            uint32_t * pIndex);
06522
06532   void arm_cmplx_mult_cmplx_q15(
06533                     q15_t * pSrcA,
06534                     q15_t * pSrcB,
06535                    q15_t * pDst,
06536                    uint32_t numSamples);
06537
06547   void arm_cmplx_mult_cmplx_q31(
06548                     q31_t * pSrcA,
06549                     q31_t * pSrcB,
06550                    q31_t * pDst,
06551                    uint32_t numSamples);
06552
06562   void arm_cmplx_mult_cmplx_f32(
06563                     float32_t * pSrcA,
06564                     float32_t * pSrcB,
06565                    float32_t * pDst,
06566                    uint32_t numSamples);
06567
06575   void arm_float_to_q31(
06576                    float32_t * pSrc,
06577                   q31_t * pDst,
06578                   uint32_t blockSize);
06579
06587   void arm_float_to_q15(
06588                    float32_t * pSrc,
06589                   q15_t * pDst,
06590                   uint32_t blockSize);
06591
06599   void arm_float_to_q7(
06600                   float32_t * pSrc,
06601                  q7_t * pDst,
06602                  uint32_t blockSize);
06603
06604
06612   void arm_q31_to_q15(
06613                q31_t * pSrc,
06614               q15_t * pDst,
06615               uint32_t blockSize);
06616
06624   void arm_q31_to_q7(
06625               q31_t * pSrc,
06626              q7_t * pDst,
06627              uint32_t blockSize);
06628
06636   void arm_q15_to_float(
06637              q15_t * pSrc,
06638             float32_t * pDst,
06639             uint32_t blockSize);
06640
06641
06649   void arm_q15_to_q31(
06650                q15_t * pSrc,
06651               q31_t * pDst,
06652               uint32_t blockSize);
06653
06654
06662   void arm_q15_to_q7(
06663               q15_t * pSrc,
06664              q7_t * pDst,
06665              uint32_t blockSize);
06666
06667
06739   static __INLINE float32_t arm_bilinear_interp_f32(
06740                             const arm_bilinear_interp_instance_f32 * S,
06741                             float32_t X,
06742                             float32_t Y)
06743   {
06744     float32_t out;
06745     float32_t f00, f01, f10, f11;
06746     float32_t *pData = S->pData;
06747     int32_t xIndex, yIndex, index;
06748     float32_t xdiff, ydiff;
06749     float32_t b1, b2, b3, b4;
06750
06751     xIndex = (int32_t) X;
06752     yIndex = (int32_t) Y;
06753
06754     /* Care taken for table outside boundary */
06755     /* Returns zero output when values are outside table boundary */
06756     if(xIndex < 0 || xIndex > (S->numRows-1) || yIndex < 0  || yIndex > ( S->numCols-1))
06757     {
06758         return(0);
06759     }
06760
06761     /* Calculation of index for two nearest points in X-direction */
06762     index = (xIndex - 1) + (yIndex-1) *  S->numCols ;
06763
06764
06765     /* Read two nearest points in X-direction */
06766     f00 = pData[index];
06767     f01 = pData[index + 1];
06768
06769     /* Calculation of index for two nearest points in Y-direction */
06770     index = (xIndex-1) + (yIndex) * S->numCols;
06771
06772
06773     /* Read two nearest points in Y-direction */
06774     f10 = pData[index];
06775     f11 = pData[index + 1];
06776
06777     /* Calculation of intermediate values */
06778     b1 = f00;
06779     b2 = f01 - f00;
06780     b3 = f10 - f00;
06781     b4 = f00 - f01 - f10 + f11;
06782
06783     /* Calculation of fractional part in X */
06784     xdiff = X - xIndex;
06785
06786     /* Calculation of fractional part in Y */
06787     ydiff = Y - yIndex;
06788
06789     /* Calculation of bi-linear interpolated output */
06790      out = b1 + b2 * xdiff + b3 * ydiff + b4 * xdiff * ydiff;
06791
06792    /* return to application */
06793     return (out);
06794
06795   }
06796
06806   static __INLINE q31_t arm_bilinear_interp_q31(
06807                         arm_bilinear_interp_instance_q31 * S,
06808                         q31_t X,
06809                         q31_t Y)
06810   {
06811     q31_t out;                                   /* Temporary output */
06812     q31_t acc = 0;                               /* output */
06813     q31_t xfract, yfract;                        /* X, Y fractional parts */
06814     q31_t x1, x2, y1, y2;                        /* Nearest output values */
06815     int32_t rI, cI;                             /* Row and column indices */
06816     q31_t *pYData = S->pData;                    /* pointer to output table values */
06817     uint32_t nCols = S->numCols;                 /* num of rows */
06818
06819
06820     /* Input is in 12.20 format */
06821     /* 12 bits for the table index */
06822     /* Index value calculation */
06823     rI = ((X & 0xFFF00000) >> 20u);
06824
06825     /* Input is in 12.20 format */
06826     /* 12 bits for the table index */
06827     /* Index value calculation */
06828     cI = ((Y & 0xFFF00000) >> 20u);
06829
06830     /* Care taken for table outside boundary */
06831     /* Returns zero output when values are outside table boundary */
06832     if(rI < 0 || rI > (S->numRows-1) || cI < 0  || cI > ( S->numCols-1))
06833     {
06834         return(0);
06835     }
06836
06837     /* 20 bits for the fractional part */
06838     /* shift left xfract by 11 to keep 1.31 format */
06839     xfract = (X & 0x000FFFFF) << 11u;
06840
06841     /* Read two nearest output values from the index */
06842     x1 = pYData[(rI) + nCols * (cI)];
06843     x2 = pYData[(rI) + nCols * (cI) + 1u];
06844
06845     /* 20 bits for the fractional part */
06846     /* shift left yfract by 11 to keep 1.31 format */
06847     yfract = (Y & 0x000FFFFF) << 11u;
06848
06849     /* Read two nearest output values from the index */
06850     y1 = pYData[(rI) + nCols * (cI + 1)];
06851     y2 = pYData[(rI) + nCols * (cI + 1) + 1u];
06852
06853     /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 3.29(q29) format */
06854     out = ((q31_t) (((q63_t) x1 * (0x7FFFFFFF - xfract)) >> 32));
06855     acc = ((q31_t) (((q63_t) out * (0x7FFFFFFF - yfract)) >> 32));
06856
06857     /* x2 * (xfract) * (1-yfract)  in 3.29(q29) and adding to acc */
06858     out = ((q31_t) ((q63_t) x2 * (0x7FFFFFFF - yfract) >> 32));
06859     acc += ((q31_t) ((q63_t) out * (xfract) >> 32));
06860
06861     /* y1 * (1 - xfract) * (yfract)  in 3.29(q29) and adding to acc */
06862     out = ((q31_t) ((q63_t) y1 * (0x7FFFFFFF - xfract) >> 32));
06863     acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
06864
06865     /* y2 * (xfract) * (yfract)  in 3.29(q29) and adding to acc */
06866     out = ((q31_t) ((q63_t) y2 * (xfract) >> 32));
06867     acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
06868
06869     /* Convert acc to 1.31(q31) format */
06870     return (acc << 2u);
06871
06872   }
06873
06882   static __INLINE q15_t arm_bilinear_interp_q15(
06883                         arm_bilinear_interp_instance_q15 * S,
06884                         q31_t X,
06885                         q31_t Y)
06886   {
06887     q63_t acc = 0;                               /* output */
06888     q31_t out;                                   /* Temporary output */
06889     q15_t x1, x2, y1, y2;                        /* Nearest output values */
06890     q31_t xfract, yfract;                        /* X, Y fractional parts */
06891     int32_t rI, cI;                             /* Row and column indices */
06892     q15_t *pYData = S->pData;                    /* pointer to output table values */
06893     uint32_t nCols = S->numCols;                 /* num of rows */
06894
06895     /* Input is in 12.20 format */
06896     /* 12 bits for the table index */
06897     /* Index value calculation */
06898     rI = ((X & 0xFFF00000) >> 20);
06899
06900     /* Input is in 12.20 format */
06901     /* 12 bits for the table index */
06902     /* Index value calculation */
06903     cI = ((Y & 0xFFF00000) >> 20);
06904
06905     /* Care taken for table outside boundary */
06906     /* Returns zero output when values are outside table boundary */
06907     if(rI < 0 || rI > (S->numRows-1) || cI < 0  || cI > ( S->numCols-1))
06908     {
06909         return(0);
06910     }
06911
06912     /* 20 bits for the fractional part */
06913     /* xfract should be in 12.20 format */
06914     xfract = (X & 0x000FFFFF);
06915
06916     /* Read two nearest output values from the index */
06917     x1 = pYData[(rI) + nCols * (cI)];
06918     x2 = pYData[(rI) + nCols * (cI) + 1u];
06919
06920
06921     /* 20 bits for the fractional part */
06922     /* yfract should be in 12.20 format */
06923     yfract = (Y & 0x000FFFFF);
06924
06925     /* Read two nearest output values from the index */
06926     y1 = pYData[(rI) + nCols * (cI + 1)];
06927     y2 = pYData[(rI) + nCols * (cI + 1) + 1u];
06928
06929     /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 13.51 format */
06930
06931     /* x1 is in 1.15(q15), xfract in 12.20 format and out is in 13.35 format */
06932     /* convert 13.35 to 13.31 by right shifting  and out is in 1.31 */
06933     out = (q31_t) (((q63_t) x1 * (0xFFFFF - xfract)) >> 4u);
06934     acc = ((q63_t) out * (0xFFFFF - yfract));
06935
06936     /* x2 * (xfract) * (1-yfract)  in 1.51 and adding to acc */
06937     out = (q31_t) (((q63_t) x2 * (0xFFFFF - yfract)) >> 4u);
06938     acc += ((q63_t) out * (xfract));
06939
06940     /* y1 * (1 - xfract) * (yfract)  in 1.51 and adding to acc */
06941     out = (q31_t) (((q63_t) y1 * (0xFFFFF - xfract)) >> 4u);
06942     acc += ((q63_t) out * (yfract));
06943
06944     /* y2 * (xfract) * (yfract)  in 1.51 and adding to acc */
06945     out = (q31_t) (((q63_t) y2 * (xfract)) >> 4u);
06946     acc += ((q63_t) out * (yfract));
06947
06948     /* acc is in 13.51 format and down shift acc by 36 times */
06949     /* Convert out to 1.15 format */
06950     return (acc >> 36);
06951
06952   }
06953
06962   static __INLINE q7_t arm_bilinear_interp_q7(
06963                           arm_bilinear_interp_instance_q7 * S,
06964                           q31_t X,
06965                           q31_t Y)
06966   {
06967     q63_t acc = 0;                               /* output */
06968     q31_t out;                                   /* Temporary output */
06969     q31_t xfract, yfract;                        /* X, Y fractional parts */
06970     q7_t x1, x2, y1, y2;                         /* Nearest output values */
06971     int32_t rI, cI;                             /* Row and column indices */
06972     q7_t *pYData = S->pData;                     /* pointer to output table values */
06973     uint32_t nCols = S->numCols;                 /* num of rows */
06974
06975     /* Input is in 12.20 format */
06976     /* 12 bits for the table index */
06977     /* Index value calculation */
06978     rI = ((X & 0xFFF00000) >> 20);
06979
06980     /* Input is in 12.20 format */
06981     /* 12 bits for the table index */
06982     /* Index value calculation */
06983     cI = ((Y & 0xFFF00000) >> 20);
06984
06985     /* Care taken for table outside boundary */
06986     /* Returns zero output when values are outside table boundary */
06987     if(rI < 0 || rI > (S->numRows-1) || cI < 0  || cI > ( S->numCols-1))
06988     {
06989         return(0);
06990     }
06991
06992     /* 20 bits for the fractional part */
06993     /* xfract should be in 12.20 format */
06994     xfract = (X & 0x000FFFFF);
06995
06996     /* Read two nearest output values from the index */
06997     x1 = pYData[(rI) + nCols * (cI)];
06998     x2 = pYData[(rI) + nCols * (cI) + 1u];
06999
07000
07001     /* 20 bits for the fractional part */
07002     /* yfract should be in 12.20 format */
07003     yfract = (Y & 0x000FFFFF);
07004
07005     /* Read two nearest output values from the index */
07006     y1 = pYData[(rI) + nCols * (cI + 1)];
07007     y2 = pYData[(rI) + nCols * (cI + 1) + 1u];
07008
07009     /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 16.47 format */
07010     out = ((x1 * (0xFFFFF - xfract)));
07011     acc = (((q63_t) out * (0xFFFFF - yfract)));
07012
07013     /* x2 * (xfract) * (1-yfract)  in 2.22 and adding to acc */
07014     out = ((x2 * (0xFFFFF - yfract)));
07015     acc += (((q63_t) out * (xfract)));
07016
07017     /* y1 * (1 - xfract) * (yfract)  in 2.22 and adding to acc */
07018     out = ((y1 * (0xFFFFF - xfract)));
07019     acc += (((q63_t) out * (yfract)));
07020
07021     /* y2 * (xfract) * (yfract)  in 2.22 and adding to acc */
07022     out = ((y2 * (yfract)));
07023     acc += (((q63_t) out * (xfract)));
07024
07025     /* acc in 16.47 format and down shift by 40 to convert to 1.7 format */
07026     return (acc >> 40);
07027
07028   }
07029
07039 #ifdef  __cplusplus
07040 }
07041 #endif
07042
07043
07044 #endif /* _ARM_MATH_H */
07045
07046
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CMSIS DSP Software Library: arm_matrix_example_f32.c File Reference

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Defines | Functions | Variables

arm_matrix_example_f32.c File Reference

#include "arm_math.h"
#include "math_helper.h"

Go to the source code of this file.

Defines

#define | SNR_THRESHOLD 90

Functions

int32_t | main (void)

Variables

const float32_t | B_f32 [4]
const float32_t | A_f32 [16]
float32_t | AT_f32 [16]
float32_t | ATMA_f32 [16]
float32_t | ATMAI_f32 [16]
float32_t | X_f32 [4]
const float32_t | xRef_f32 [4] = {73.0, 8.0, 21.25, 2.875}
float32_t snr

Define Documentation

#define SNR_THRESHOLD 90

Definition at line 80 of file arm_matrix_example_f32.c.

Function Documentation

int32_t main ( void )

Definition at line 130 of file arm_matrix_example_f32.c.

Variable Documentation

const float32_t B_f32[4]
Initial value:

{
    782.0, 7577.0, 470.0, 4505.0
}
Examples:
arm_matrix_example_f32.c.

Definition at line 87 of file arm_matrix_example_f32.c.

const float32_t A_f32[16]
Initial value:

{

    1.0,        32.0,       4.0,        128.0,
    1.0,        32.0,       64.0,       2048.0,
    1.0,        16.0,       4.0,        64.0,
    1.0,        16.0,       64.0,       1024.0,
}
Examples:
arm_matrix_example_f32.c.

Definition at line 96 of file arm_matrix_example_f32.c.

float32_t AT_f32[16]
Examples:
arm_matrix_example_f32.c.

Definition at line 110 of file arm_matrix_example_f32.c.

float32_t ATMA_f32[16]
Examples:
arm_matrix_example_f32.c.

Definition at line 112 of file arm_matrix_example_f32.c.

float32_t ATMAI_f32[16]
Examples:
arm_matrix_example_f32.c.

Definition at line 114 of file arm_matrix_example_f32.c.

float32_t X_f32[4]
Examples:
arm_matrix_example_f32.c.

Definition at line 116 of file arm_matrix_example_f32.c.

const float32_t xRef_f32[4] = {73.0, 8.0, 21.25, 2.875}
Examples:
arm_matrix_example_f32.c.

Definition at line 121 of file arm_matrix_example_f32.c.

float32_t snr

Definition at line 123 of file arm_matrix_example_f32.c.

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CMSIS DSP Software Library: arm_matrix_example_f32.c Source File

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arm_matrix_example_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        29. November 2010
00005 * $Revision:    V1.0.3
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_matrix_example_f32.c
00009 *
00010 * Description:  Example code demonstrating least square fit to data
00011 *               using matrix functions
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3
00014 *
00015 *
00016 * Version 1.0.3 2010/11/29
00017 *    Re-organized the CMSIS folders and updated documentation.
00018 *
00019 * Version 1.0.1 2010/10/05 KK
00020 *    Production release and review comments incorporated.
00021 *
00022 * Version 1.0.0 2010/09/20 KK
00023 *    Production release and review comments incorporated.
00024 * ------------------------------------------------------------------- */
00025
00077 #include "arm_math.h"
00078 #include "math_helper.h"
00079
00080 #define SNR_THRESHOLD   90
00081
00082 /* --------------------------------------------------------------------------------
00083 * Test input data(Cycles) taken from FIR Q15 module for differant cases of blockSize
00084 * and tapSize
00085 * --------------------------------------------------------------------------------- */
00086
00087 const float32_t B_f32[4] =
00088 {
00089     782.0, 7577.0, 470.0, 4505.0
00090 };
00091
00092 /* --------------------------------------------------------------------------------
00093 * Formula to fit is  C1 + C2 * numTaps + C3 * blockSize + C4 * numTaps * blockSize
00094 * -------------------------------------------------------------------------------- */
00095
00096 const float32_t A_f32[16] =
00097 {
00098     /* Const,   numTaps,    blockSize,  numTaps*blockSize */
00099     1.0,        32.0,       4.0,        128.0,
00100     1.0,        32.0,       64.0,       2048.0,
00101     1.0,        16.0,       4.0,        64.0,
00102     1.0,        16.0,       64.0,       1024.0,
00103 };
00104
00105
00106 /* ----------------------------------------------------------------------
00107 * Temporary buffers  for storing intermediate values
00108 * ------------------------------------------------------------------- */
00109 /* Transpose of A Buffer */
00110 float32_t AT_f32[16];
00111 /* (Transpose of A * A) Buffer */
00112 float32_t ATMA_f32[16];
00113 /* Inverse(Transpose of A * A)  Buffer */
00114 float32_t ATMAI_f32[16];
00115 /* Test Output Buffer */
00116 float32_t X_f32[4];
00117
00118 /* ----------------------------------------------------------------------
00119 * Reference ouput buffer C1, C2, C3 and C4 taken from MATLAB
00120 * ------------------------------------------------------------------- */
00121 const float32_t xRef_f32[4] = {73.0, 8.0, 21.25, 2.875};
00122
00123 float32_t snr;
00124
00125
00126 /* ----------------------------------------------------------------------
00127 * Max magnitude FFT Bin test
00128 * ------------------------------------------------------------------- */
00129
00130 int32_t main(void)
00131 {
00132
00133     arm_matrix_instance_f32 A;      /* Matrix A Instance */
00134     arm_matrix_instance_f32 AT;     /* Matrix AT(A transpose) instance */
00135     arm_matrix_instance_f32 ATMA;   /* Matrix ATMA( AT multiply with A) instance */
00136     arm_matrix_instance_f32 ATMAI;  /* Matrix ATMAI(Inverse of ATMA) instance */
00137     arm_matrix_instance_f32 B;      /* Matrix B instance */
00138     arm_matrix_instance_f32 X;      /* Matrix X(Unknown Matrix) instance */
00139
00140     uint32_t srcRows, srcColumns;   /* Temporary variables */
00141     arm_status status;
00142
00143     /* Initialise A Matrix Instance with numRows, numCols and data array(A_f32) */
00144     srcRows = 4;
00145     srcColumns = 4;
00146     arm_mat_init_f32(&A, srcRows, srcColumns, (float32_t *)A_f32);
00147
00148     /* Initialise Matrix Instance AT with numRows, numCols and data array(AT_f32) */
00149     srcRows = 4;
00150     srcColumns = 4;
00151     arm_mat_init_f32(&AT, srcRows, srcColumns, AT_f32);
00152
00153     /* calculation of A transpose */
00154     status = arm_mat_trans_f32(&A, &AT);
00155
00156
00157     /* Initialise ATMA Matrix Instance with numRows, numCols and data array(ATMA_f32) */
00158     srcRows = 4;
00159     srcColumns = 4;
00160     arm_mat_init_f32(&ATMA, srcRows, srcColumns, ATMA_f32);
00161
00162     /* calculation of AT Multiply with A */
00163     status = arm_mat_mult_f32(&AT, &A, &ATMA);
00164
00165     /* Initialise ATMAI Matrix Instance with numRows, numCols and data array(ATMAI_f32) */
00166     srcRows = 4;
00167     srcColumns = 4;
00168     arm_mat_init_f32(&ATMAI, srcRows, srcColumns, ATMAI_f32);
00169
00170     /* calculation of Inverse((Transpose(A) * A) */
00171     status = arm_mat_inverse_f32(&ATMA, &ATMAI);
00172
00173     /* calculation of (Inverse((Transpose(A) * A)) *  Transpose(A)) */
00174     status = arm_mat_mult_f32(&ATMAI, &AT, &ATMA);
00175
00176     /* Initialise B Matrix Instance with numRows, numCols and data array(B_f32) */
00177     srcRows = 4;
00178     srcColumns = 1;
00179     arm_mat_init_f32(&B, srcRows, srcColumns, (float32_t *)B_f32);
00180
00181     /* Initialise X Matrix Instance with numRows, numCols and data array(X_f32) */
00182     srcRows = 4;
00183     srcColumns = 1;
00184     arm_mat_init_f32(&X, srcRows, srcColumns, X_f32);
00185
00186     /* calculation ((Inverse((Transpose(A) * A)) *  Transpose(A)) * B) */
00187     status = arm_mat_mult_f32(&ATMA, &B, &X);
00188
00189     /* Comparison of reference with test output */
00190     snr = arm_snr_f32((float32_t *)xRef_f32, X_f32, 4);
00191
00192     /*------------------------------------------------------------------------------
00193     *                   Initialise status depending on SNR calculations
00194     *------------------------------------------------------------------------------*/
00195     if( snr > SNR_THRESHOLD)
00196     {
00197         status = ARM_MATH_SUCCESS;
00198     }
00199     else
00200     {
00201         status = ARM_MATH_TEST_FAILURE;
00202     }
00203
00204
00205     /* ----------------------------------------------------------------------
00206     ** Loop here if the signals fail the PASS check.
00207     ** This denotes a test failure
00208     ** ------------------------------------------------------------------- */
00209     if( status != ARM_MATH_SUCCESS)
00210     {
00211       while(1);
00212     }
00213 }
00214
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CMSIS DSP Software Library: arm_max_f32.c File Reference

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Functions

arm_max_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_max_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult, uint32_t *pIndex)
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CMSIS DSP Software Library: arm_max_f32.c Source File

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arm_max_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_max_f32.c
00009 *
00010 * Description:  Maximum value of a floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00059 void arm_max_f32(
00060   float32_t * pSrc,
00061   uint32_t blockSize,
00062   float32_t * pResult,
00063   uint32_t * pIndex)
00064 {
00065   float32_t maxVal, out;                         /* Temporary variables to store the output value. */
00066   uint32_t blkCnt, outIndex;                     /* loop counter */
00067
00068   /* Initialise the index value to zero. */
00069   outIndex = 0u;
00070   /* Load first input value that act as reference value for comparision */
00071   out = *pSrc++;
00072
00073   /* Loop over blockSize number of values */
00074   blkCnt = (blockSize - 1u);
00075
00076 #ifndef ARM_MATH_CM0
00077
00078   /* Run the below code for Cortex-M4 and Cortex-M3 */
00079
00080   do
00081   {
00082     /* Initialize maxVal to the next consecutive values one by one */
00083     maxVal = *pSrc++;
00084
00085     /* compare for the maximum value */
00086     if(out < maxVal)
00087     {
00088       /* Update the maximum value and it's index */
00089       out = maxVal;
00090       outIndex = blockSize - blkCnt;
00091     }
00092     /* Decrement the loop counter */
00093     blkCnt--;
00094
00095   } while(blkCnt > 0u);
00096
00097 #else
00098
00099   /* Run the below code for Cortex-M0 */
00100   while(blkCnt > 0u)
00101   {
00102     /* Initialize maxVal to the next consecutive values one by one */
00103     maxVal = *pSrc++;
00104
00105     /* compare for the maximum value */
00106     if(out < maxVal)
00107     {
00108       /* Update the maximum value and it's index */
00109       out = maxVal;
00110       outIndex = blockSize - blkCnt;
00111     }
00112     /* Decrement the loop counter */
00113     blkCnt--;
00114
00115   }
00116
00117 #endif /* #ifndef ARM_MATH_CM0 */
00118
00119
00120   /* Store the maximum value and it's index into destination pointers */
00121   *pResult = out;
00122   *pIndex = outIndex;
00123 }
00124
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CMSIS DSP Software Library: arm_max_q7.c File Reference

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Functions

arm_max_q7.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_max_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult, uint32_t *pIndex)
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CMSIS DSP Software Library: arm_max_q7.c Source File

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arm_max_q7.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_max_q7.c
00009 *
00010 * Description:  Maximum value of a Q7 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00051 void arm_max_q7(
00052   q7_t * pSrc,
00053   uint32_t blockSize,
00054   q7_t * pResult,
00055   uint32_t * pIndex)
00056 {
00057
00058 #ifndef ARM_MATH_CM0
00059
00060   /* Run the below code for Cortex-M4 and Cortex-M3 */
00061
00062   q7_t res, maxVal, x0, x1, maxVal2, maxVal1;    /* Temporary variables to store the output value. */
00063   uint32_t blkCnt, index1, index2, index3, indx, indxMod;       /* loop counter */
00064
00065   /* Initialise the index value to zero. */
00066   indx = 0u;
00067
00068   /* Load first input value that act as reference value for comparision */
00069   res = *pSrc++;
00070
00071   /* Loop unrolling */
00072   blkCnt = (blockSize - 1u) >> 2u;
00073
00074   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00075    ** a second loop below computes the remaining 1 to 3 samples. */
00076   while(blkCnt > 0u)
00077   {
00078     indxMod = blockSize - (blkCnt * 4u);
00079
00080     /* Load two input values for comparision */
00081     x0 = *pSrc++;
00082     x1 = *pSrc++;
00083
00084     if(x0 < x1)
00085     {
00086       /* Update the maximum value and its index */
00087       maxVal1 = x1;
00088       index1 = indxMod + 1u;
00089     }
00090     else
00091     {
00092       /* Update the maximum value and its index */
00093       maxVal1 = x0;
00094       index1 = indxMod;
00095     }
00096
00097     /* Load two input values for comparision */
00098     x0 = *pSrc++;
00099     x1 = *pSrc++;
00100
00101     if(x0 < x1)
00102     {
00103       /* Update the maximum value and its index */
00104       maxVal2 = x1;
00105       index2 = indxMod + 3u;
00106     }
00107     else
00108     {
00109       /* Update the maximum value and its index */
00110       maxVal2 = x0;
00111       index2 = indxMod + 2u;
00112     }
00113
00114     if(maxVal1 < maxVal2)
00115     {
00116       /* Update the maximum value and its index */
00117       maxVal = maxVal2;
00118       index3 = index2;
00119     }
00120     else
00121     {
00122       /* Update the maximum value and its index */
00123       maxVal = maxVal1;
00124       index3 = index1;
00125     }
00126
00127     if(res < maxVal)
00128     {
00129       /* Update the maximum value and its index */
00130       res = maxVal;
00131       indx = index3;
00132     }
00133
00134     /* Decrement the loop counter */
00135     blkCnt--;
00136
00137   }
00138
00139   /* If the blockSize - 1 is not a multiple of 4, compute any remaining output samples here.
00140    ** No loop unrolling is used. */
00141   blkCnt = (blockSize - 1u) % 0x04u;
00142
00143   while(blkCnt > 0u)
00144   {
00145     /* Initialize maxVal to the next consecutive values one by one */
00146     maxVal = *pSrc++;
00147
00148     /* compare for the maximum value */
00149     if(res < maxVal)
00150     {
00151       /* Update the maximum value and its index */
00152       res = maxVal;
00153       indx = blockSize - blkCnt;
00154     }
00155
00156     /* Decrement the loop counter */
00157     blkCnt--;
00158   }
00159
00160   /* Store the maximum value and its index into destination pointers */
00161   *pResult = res;
00162   *pIndex = indx;
00163
00164 #else
00165
00166   /* Run the below code for Cortex-M0 */
00167
00168   q7_t maxVal, out;                              /* Temporary variables to store the output value. */
00169   uint32_t blkCnt, outIndex;                     /* loop counter */
00170
00171   /* Initialise the index value to zero. */
00172   outIndex = 0u;
00173   /* Load first input value that act as reference value for comparision */
00174   out = *pSrc++;
00175
00176   /* Loop over blockSize - 1 number of values */
00177   blkCnt = (blockSize - 1u);
00178
00179   while(blkCnt > 0u)
00180   {
00181     /* Initialize maxVal to the next consecutive values one by one */
00182     maxVal = *pSrc++;
00183
00184     /* compare for the maximum value */
00185     if(out < maxVal)
00186     {
00187       /* Update the maximum value and its index */
00188       out = maxVal;
00189       outIndex = blockSize - blkCnt;
00190     }
00191     /* Decrement the loop counter */
00192     blkCnt--;
00193
00194   }
00195
00196   /* Store the maximum value and its index into destination pointers */
00197   *pResult = out;
00198   *pIndex = outIndex;
00199
00200 #endif /* #ifndef ARM_MATH_CM0 */
00201
00202 }
00203
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CMSIS DSP Software Library: arm_max_q15.c File Reference

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arm_max_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_max_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult, uint32_t *pIndex)
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CMSIS DSP Software Library: arm_max_q15.c Source File

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arm_max_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_max_q15.c
00009 *
00010 * Description:  Maximum value of a Q15 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00051 void arm_max_q15(
00052   q15_t * pSrc,
00053   uint32_t blockSize,
00054   q15_t * pResult,
00055   uint32_t * pIndex)
00056 {
00057   q15_t maxVal, out;                             /* Temporary variables to store the output value. */
00058   uint32_t blkCnt, outIndex;                     /* loop counter */
00059
00060   /* Initialise the index value to zero. */
00061   outIndex = 0u;
00062   /* Load first input value that act as reference value for comparision */
00063   out = *pSrc++;
00064
00065   /* Loop over blockSize number of values */
00066   blkCnt = (blockSize - 1u);
00067
00068 #ifndef ARM_MATH_CM0
00069
00070   /* Run the below code for Cortex-M4 and Cortex-M3 */
00071
00072   do
00073   {
00074     /* Initialize maxVal to the next consecutive values one by one */
00075     maxVal = *pSrc++;
00076
00077     /* compare for the maximum value */
00078     if(out < maxVal)
00079     {
00080       /* Update the maximum value and its index */
00081       out = maxVal;
00082       outIndex = blockSize - blkCnt;
00083     }
00084
00085     blkCnt--;
00086
00087   } while(blkCnt > 0u);
00088
00089 #else
00090
00091   /* Run the below code for Cortex-M0 */
00092
00093   while(blkCnt > 0u)
00094   {
00095     /* Initialize maxVal to the next consecutive values one by one */
00096     maxVal = *pSrc++;
00097
00098     /* compare for the maximum value */
00099     if(out < maxVal)
00100     {
00101       /* Update the maximum value and its index */
00102       out = maxVal;
00103       outIndex = blockSize - blkCnt;
00104     }
00105     /* Decrement the loop counter */
00106     blkCnt--;
00107
00108   }
00109
00110 #endif /* #ifndef ARM_MATH_CM0 */
00111
00112   /* Store the maximum value and its index into destination pointers */
00113   *pResult = out;
00114   *pIndex = outIndex;
00115 }
00116
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CMSIS DSP Software Library: arm_max_q31.c File Reference

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arm_max_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_max_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult, uint32_t *pIndex)
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CMSIS DSP Software Library: arm_max_q31.c Source File

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arm_max_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_max_q31.c
00009 *
00010 * Description:  Maximum value of a Q31 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00051 void arm_max_q31(
00052   q31_t * pSrc,
00053   uint32_t blockSize,
00054   q31_t * pResult,
00055   uint32_t * pIndex)
00056 {
00057   q31_t maxVal, out;                             /* Temporary variables to store the output value. */
00058   uint32_t blkCnt, outIndex;                     /* loop counter */
00059
00060   /* Initialise the index value to zero. */
00061   outIndex = 0u;
00062   /* Load first input value that act as reference value for comparision */
00063   out = *pSrc++;
00064
00065   /* Loop over blockSize number of values */
00066   blkCnt = (blockSize - 1u);
00067
00068 #ifndef ARM_MATH_CM0
00069
00070   /* Run the below code for Cortex-M4 and Cortex-M3 */
00071
00072   do
00073   {
00074     /* Initialize maxVal to the next consecutive values one by one */
00075     maxVal = *pSrc++;
00076
00077     /* compare for the maximum value */
00078     if(out < maxVal)
00079     {
00080       /* Update the maximum value and its index */
00081       out = maxVal;
00082       outIndex = blockSize - blkCnt;
00083     }
00084
00085     /* Decrement the loop counter */
00086     blkCnt--;
00087
00088   } while(blkCnt > 0u);
00089
00090 #else
00091
00092   /* Run the below code for Cortex-M0 */
00093
00094   while(blkCnt > 0u)
00095   {
00096     /* Initialize maxVal to the next consecutive values one by one */
00097     maxVal = *pSrc++;
00098
00099     /* Compare for the maximum value */
00100     if(out < maxVal)
00101     {
00102       /* Update the maximum value and its index */
00103       out = maxVal;
00104       outIndex = blockSize - blkCnt;
00105     }
00106
00107     /* Decrement the loop counter */
00108     blkCnt--;
00109
00110   }
00111
00112 #endif /* #ifndef ARM_MATH_CM0 */
00113
00114   /* Store the maximum value and its index into destination pointers */
00115   *pResult = out;
00116   *pIndex = outIndex;
00117 }
00118
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CMSIS DSP Software Library: arm_mean_f32.c File Reference

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arm_mean_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_mean_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
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CMSIS DSP Software Library: arm_mean_f32.c Source File

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arm_mean_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mean_f32.c
00009 *
00010 * Description:  Mean value of a floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00064 void arm_mean_f32(
00065   float32_t * pSrc,
00066   uint32_t blockSize,
00067   float32_t * pResult)
00068 {
00069   float32_t sum = 0.0f;                          /* Temporary result storage */
00070   uint32_t blkCnt;                               /* loop counter */
00071
00072 #ifndef ARM_MATH_CM0
00073
00074   /* Run the below code for Cortex-M4 and Cortex-M3 */
00075
00076   /*loop Unrolling */
00077   blkCnt = blockSize >> 2u;
00078
00079   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00080    ** a second loop below computes the remaining 1 to 3 samples. */
00081   while(blkCnt > 0u)
00082   {
00083     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00084     sum += *pSrc++;
00085     sum += *pSrc++;
00086     sum += *pSrc++;
00087     sum += *pSrc++;
00088
00089     /* Decrement the loop counter */
00090     blkCnt--;
00091   }
00092
00093   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00094    ** No loop unrolling is used. */
00095   blkCnt = blockSize % 0x4u;
00096
00097 #else
00098
00099   /* Run the below code for Cortex-M0 */
00100
00101   /* Loop over blockSize number of values */
00102   blkCnt = blockSize;
00103
00104 #endif /* #ifndef ARM_MATH_CM0 */
00105
00106   while(blkCnt > 0u)
00107   {
00108     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00109     sum += *pSrc++;
00110
00111     /* Decrement the loop counter */
00112     blkCnt--;
00113   }
00114
00115   /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
00116   /* Store the result to the destination */
00117   *pResult = sum / (float32_t) blockSize;
00118 }
00119
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CMSIS DSP Software Library: arm_mean_q7.c File Reference

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arm_mean_q7.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_mean_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult)
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CMSIS DSP Software Library: arm_mean_q7.c Source File

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arm_mean_q7.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mean_q7.c
00009 *
00010 * Description:  Mean value of a Q7 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00061 void arm_mean_q7(
00062   q7_t * pSrc,
00063   uint32_t blockSize,
00064   q7_t * pResult)
00065 {
00066   q31_t sum = 0;                                 /* Temporary result storage */
00067   uint32_t blkCnt;                               /* loop counter */
00068
00069 #ifndef ARM_MATH_CM0
00070
00071   /* Run the below code for Cortex-M4 and Cortex-M3 */
00072
00073   /*loop Unrolling */
00074   blkCnt = blockSize >> 2u;
00075
00076   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00077    ** a second loop below computes the remaining 1 to 3 samples. */
00078   while(blkCnt > 0u)
00079   {
00080     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00081     sum += *pSrc++;
00082     sum += *pSrc++;
00083     sum += *pSrc++;
00084     sum += *pSrc++;
00085
00086     /* Decrement the loop counter */
00087     blkCnt--;
00088   }
00089
00090   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00091    ** No loop unrolling is used. */
00092   blkCnt = blockSize % 0x4u;
00093
00094 #else
00095
00096   /* Run the below code for Cortex-M0 */
00097
00098   /* Loop over blockSize number of values */
00099   blkCnt = blockSize;
00100
00101 #endif /* #ifndef ARM_MATH_CM0 */
00102
00103   while(blkCnt > 0u)
00104   {
00105     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00106     sum += *pSrc++;
00107
00108     /* Decrement the loop counter */
00109     blkCnt--;
00110   }
00111
00112   /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
00113   /* Store the result to the destination */
00114   *pResult = (q7_t) (sum / (int32_t) blockSize);
00115 }
00116
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CMSIS DSP Software Library: arm_mean_q15.c File Reference

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arm_mean_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_mean_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
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CMSIS DSP Software Library: arm_mean_q15.c Source File

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arm_mean_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mean_q15.c
00009 *
00010 * Description:  Mean value of a Q15 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00061 void arm_mean_q15(
00062   q15_t * pSrc,
00063   uint32_t blockSize,
00064   q15_t * pResult)
00065 {
00066   q31_t sum = 0;                                 /* Temporary result storage */
00067   uint32_t blkCnt;                               /* loop counter */
00068
00069 #ifndef ARM_MATH_CM0
00070
00071   /* Run the below code for Cortex-M4 and Cortex-M3 */
00072
00073   /*loop Unrolling */
00074   blkCnt = blockSize >> 2u;
00075
00076   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00077    ** a second loop below computes the remaining 1 to 3 samples. */
00078   while(blkCnt > 0u)
00079   {
00080     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00081     sum += *pSrc++;
00082     sum += *pSrc++;
00083     sum += *pSrc++;
00084     sum += *pSrc++;
00085
00086     /* Decrement the loop counter */
00087     blkCnt--;
00088   }
00089
00090   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00091    ** No loop unrolling is used. */
00092   blkCnt = blockSize % 0x4u;
00093
00094 #else
00095
00096   /* Run the below code for Cortex-M0 */
00097
00098   /* Loop over blockSize number of values */
00099   blkCnt = blockSize;
00100
00101 #endif /* #ifndef ARM_MATH_CM0 */
00102
00103   while(blkCnt > 0u)
00104   {
00105     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00106     sum += *pSrc++;
00107
00108     /* Decrement the loop counter */
00109     blkCnt--;
00110   }
00111
00112   /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
00113   /* Store the result to the destination */
00114   *pResult = (q15_t) (sum / blockSize);
00115 }
00116
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CMSIS DSP Software Library: arm_mean_q31.c File Reference

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arm_mean_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_mean_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
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CMSIS DSP Software Library: arm_mean_q31.c Source File

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arm_mean_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mean_q31.c
00009 *
00010 * Description:  Mean value of a Q31 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00061 void arm_mean_q31(
00062   q31_t * pSrc,
00063   uint32_t blockSize,
00064   q31_t * pResult)
00065 {
00066   q63_t sum = 0;                                 /* Temporary result storage */
00067   uint32_t blkCnt;                               /* loop counter */
00068
00069 #ifndef ARM_MATH_CM0
00070
00071   /* Run the below code for Cortex-M4 and Cortex-M3 */
00072
00073   /*loop Unrolling */
00074   blkCnt = blockSize >> 2u;
00075
00076   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00077    ** a second loop below computes the remaining 1 to 3 samples. */
00078   while(blkCnt > 0u)
00079   {
00080     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00081     sum += *pSrc++;
00082     sum += *pSrc++;
00083     sum += *pSrc++;
00084     sum += *pSrc++;
00085
00086     /* Decrement the loop counter */
00087     blkCnt--;
00088   }
00089
00090   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00091    ** No loop unrolling is used. */
00092   blkCnt = blockSize % 0x4u;
00093
00094 #else
00095
00096   /* Run the below code for Cortex-M0 */
00097
00098   /* Loop over blockSize number of values */
00099   blkCnt = blockSize;
00100
00101 #endif /* #ifndef ARM_MATH_CM0 */
00102
00103   while(blkCnt > 0u)
00104   {
00105     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00106     sum += *pSrc++;
00107
00108     /* Decrement the loop counter */
00109     blkCnt--;
00110   }
00111
00112   /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
00113   /* Store the result to the destination */
00114   *pResult = (q31_t) (sum / (int32_t) blockSize);
00115 }
00116
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CMSIS DSP Software Library: arm_min_f32.c File Reference

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arm_min_f32.c File Reference

#include "arm_math.h"

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Functions

void arm_min_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult, uint32_t *pIndex)
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CMSIS DSP Software Library: arm_min_f32.c Source File

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arm_min_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_min_f32.c
00009 *
00010 * Description:  Minimum value of a floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00060 void arm_min_f32(
00061   float32_t * pSrc,
00062   uint32_t blockSize,
00063   float32_t * pResult,
00064   uint32_t * pIndex)
00065 {
00066   float32_t minVal, out;                         /* Temporary variables to store the output value. */
00067   uint32_t blkCnt, outIndex;                     /* loop counter */
00068
00069   /* Initialise the index value to zero. */
00070   outIndex = 0u;
00071   /* Load first input value that act as reference value for comparision */
00072   out = *pSrc++;
00073
00074 #ifndef ARM_MATH_CM0
00075
00076   /* Run the below code for Cortex-M4 and Cortex-M3 */
00077
00078
00079   /* Loop over blockSize number of values */
00080   blkCnt = (blockSize - 1u);
00081
00082   do
00083   {
00084     /* Initialize minVal to the next consecutive values one by one */
00085     minVal = *pSrc++;
00086
00087     /* compare for the minimum value */
00088     if(out > minVal)
00089     {
00090       /* Update the minimum value and it's index */
00091       out = minVal;
00092       outIndex = blockSize - blkCnt;
00093     }
00094
00095     blkCnt--;
00096
00097   } while(blkCnt > 0u);
00098
00099 #else
00100
00101   /* Run the below code for Cortex-M0 */
00102
00103   /* Loop over blockSize - 1 number of values */
00104   blkCnt = (blockSize - 1u);
00105
00106   while(blkCnt > 0u)
00107   {
00108     /* Initialize minVal to the next consecutive values one by one */
00109     minVal = *pSrc++;
00110
00111     /* compare for the minimum value */
00112     if(out > minVal)
00113     {
00114       /* Update the minimum value and it's index */
00115       out = minVal;
00116       outIndex = blockSize - blkCnt;
00117     }
00118     /* Decrement the loop counter */
00119     blkCnt--;
00120
00121   }
00122
00123 #endif /* #ifndef ARM_MATH_CM0 */
00124
00125
00126   /* Store the minimum value and it's index into destination pointers */
00127   *pResult = out;
00128   *pIndex = outIndex;
00129 }
00130
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CMSIS DSP Software Library: arm_min_q7.c File Reference

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arm_min_q7.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_min_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult, uint32_t *pIndex)
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CMSIS DSP Software Library: arm_min_q7.c Source File

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arm_min_q7.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_min_q7.c
00009 *
00010 * Description:  Minimum value of a Q7 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00052 void arm_min_q7(
00053   q7_t * pSrc,
00054   uint32_t blockSize,
00055   q7_t * pResult,
00056   uint32_t * pIndex)
00057 {
00058
00059 #ifndef ARM_MATH_CM0
00060
00061   /* Run the below code for Cortex-M4 and Cortex-M3 */
00062
00063   q7_t minVal, minVal1, minVal2, res, x0, x1;    /* Temporary variables to store the output value. */
00064   uint32_t blkCnt, indx, index1, index2, index3, indxMod;       /* loop counter */
00065
00066   /* Initialise the index value to zero. */
00067   indx = 0u;
00068
00069   /* Load first input value that act as reference value for comparision */
00070   res = *pSrc++;
00071
00072   /* Loop over blockSize number of values */
00073   blkCnt = (blockSize - 1u) >> 2u;
00074
00075   while(blkCnt > 0u)
00076   {
00077     indxMod = blockSize - (blkCnt * 4u);
00078
00079     /* Load two input values for comparision */
00080     x0 = *pSrc++;
00081     x1 = *pSrc++;
00082
00083     if(x0 > x1)
00084     {
00085       /* Update the minimum value and its index */
00086       minVal1 = x1;
00087       index1 = indxMod + 1u;
00088     }
00089     else
00090     {
00091       /* Update the minimum value and its index */
00092       minVal1 = x0;
00093       index1 = indxMod;
00094     }
00095
00096     /* Load two input values for comparision */
00097     x0 = *pSrc++;
00098     x1 = *pSrc++;
00099
00100     if(x0 > x1)
00101     {
00102       /* Update the minimum value and its index */
00103       minVal2 = x1;
00104       index2 = indxMod + 3u;
00105     }
00106     else
00107     {
00108       /* Update the minimum value and its index */
00109       minVal2 = x0;
00110       index2 = indxMod + 2u;
00111     }
00112
00113     if(minVal1 > minVal2)
00114     {
00115       /* Update the minimum value and its index */
00116       minVal = minVal2;
00117       index3 = index2;
00118     }
00119     else
00120     {
00121       /* Update the minimum value and its index */
00122       minVal = minVal1;
00123       index3 = index1;
00124     }
00125
00126     if(res > minVal)
00127     {
00128       /* Update the minimum value and its index */
00129       res = minVal;
00130       indx = index3;
00131     }
00132
00133     /* Decrement the loop counter */
00134     blkCnt--;
00135
00136   }
00137
00138   blkCnt = (blockSize - 1u) % 0x04u;
00139
00140   while(blkCnt > 0u)
00141   {
00142     /* Initialize minVal to the next consecutive values one by one */
00143     minVal = *pSrc++;
00144
00145     /* compare for the minimum value */
00146     if(res > minVal)
00147     {
00148       /* Update the minimum value and its index */
00149       res = minVal;
00150       indx = blockSize - blkCnt;
00151     }
00152
00153     /* Decrement the loop counter */
00154     blkCnt--;
00155   }
00156
00157   /* Store the minimum value and its index into destination pointers */
00158   *pResult = res;
00159   *pIndex = indx;
00160
00161 #else
00162
00163   /* Run the below code for Cortex-M0 */
00164
00165   q7_t minVal, out;                              /* Temporary variables to store the output value. */
00166   uint32_t blkCnt, outIndex;                     /* loop counter */
00167
00168   /* Initialise the index value to zero. */
00169   outIndex = 0u;
00170
00171   /* Load first input value that act as reference value for comparision */
00172   out = *pSrc++;
00173
00174   /* Loop over blockSize - 1 number of values */
00175   blkCnt = (blockSize - 1u);
00176
00177   while(blkCnt > 0u)
00178   {
00179     /* Initialize minVal to the next consecutive values one by one */
00180     minVal = *pSrc++;
00181
00182     /* compare for the minimum value */
00183     if(out > minVal)
00184     {
00185       /* Update the minimum value and its index */
00186       out = minVal;
00187       outIndex = blockSize - blkCnt;
00188     }
00189
00190     /* Decrement the loop counter */
00191     blkCnt--;
00192   }
00193
00194   /* Store the minimum value and its index into destination pointers */
00195   *pResult = out;
00196   *pIndex = outIndex;
00197
00198 #endif /* #ifndef ARM_MATH_CM0 */
00199
00200 }
00201
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CMSIS DSP Software Library: arm_min_q15.c File Reference

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arm_min_q15.c File Reference

#include "arm_math.h"

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Functions

void arm_min_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult, uint32_t *pIndex)
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CMSIS DSP Software Library: arm_min_q15.c Source File

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arm_min_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_min_q15.c
00009 *
00010 * Description:  Minimum value of a Q15 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00053 void arm_min_q15(
00054   q15_t * pSrc,
00055   uint32_t blockSize,
00056   q15_t * pResult,
00057   uint32_t * pIndex)
00058 {
00059   q15_t minVal, out;                             /* Temporary variables to store the output value. */
00060   uint32_t blkCnt, outIndex;                     /* loop counter */
00061
00062   /* Initialise the index value to zero. */
00063   outIndex = 0u;
00064   /* Load first input value that act as reference value for comparision */
00065   out = *pSrc++;
00066
00067 #ifndef ARM_MATH_CM0
00068
00069   /* Run the below code for Cortex-M4 and Cortex-M3 */
00070
00071
00072   /* Loop over blockSize number of values */
00073   blkCnt = (blockSize - 1u);
00074
00075   do
00076   {
00077     /* Initialize minVal to the next consecutive values one by one */
00078     minVal = *pSrc++;
00079
00080     /* compare for the minimum value */
00081     if(out > minVal)
00082     {
00083       /* Update the minimum value and its index */
00084       out = minVal;
00085       outIndex = blockSize - blkCnt;
00086     }
00087
00088     blkCnt--;
00089
00090   } while(blkCnt > 0u);
00091
00092 #else
00093
00094   /* Run the below code for Cortex-M0 */
00095
00096   /* Loop over blockSize - 1 number of values */
00097   blkCnt = (blockSize - 1u);
00098
00099   while(blkCnt > 0u)
00100   {
00101     /* Initialize minVal to the next consecutive values one by one */
00102     minVal = *pSrc++;
00103
00104     /* compare for the minimum value */
00105     if(out > minVal)
00106     {
00107       /* Update the minimum value and its index */
00108       out = minVal;
00109       outIndex = blockSize - blkCnt;
00110     }
00111
00112     /* Decrement the loop counter */
00113     blkCnt--;
00114
00115   }
00116
00117 #endif /* #ifndef ARM_MATH_CM0 */
00118
00119
00120   /* Store the minimum value and its index into destination pointers */
00121   *pResult = out;
00122   *pIndex = outIndex;
00123 }
00124
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CMSIS DSP Software Library: arm_min_q31.c File Reference

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arm_min_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_min_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult, uint32_t *pIndex)
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CMSIS DSP Software Library: arm_min_q31.c Source File

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arm_min_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_min_q31.c
00009 *
00010 * Description:  Minimum value of a Q31 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00053 void arm_min_q31(
00054   q31_t * pSrc,
00055   uint32_t blockSize,
00056   q31_t * pResult,
00057   uint32_t * pIndex)
00058 {
00059   q31_t minVal, out;                             /* Temporary variables to store the output value. */
00060   uint32_t blkCnt, outIndex;                     /* loop counter */
00061
00062   /* Initialise the index value to zero. */
00063   outIndex = 0u;
00064   /* Load first input value that act as reference value for comparision */
00065   out = *pSrc++;
00066
00067 #ifndef ARM_MATH_CM0
00068
00069   /* Run the below code for Cortex-M4 and Cortex-M3 */
00070
00071   /* Loop over blockSize number of values */
00072   blkCnt = (blockSize - 1u);
00073
00074   do
00075   {
00076     /* Initialize minVal to the next consecutive values one by one */
00077     minVal = *pSrc++;
00078
00079     /* compare for the minimum value */
00080     if(out > minVal)
00081     {
00082       /* Update the minimum value and its index */
00083       out = minVal;
00084       outIndex = blockSize - blkCnt;
00085     }
00086
00087     blkCnt--;
00088
00089   } while(blkCnt > 0u);
00090
00091 #else
00092
00093   /* Run the below code for Cortex-M0 */
00094
00095   /* Loop over blockSize -1 number of values */
00096   blkCnt = (blockSize - 1u);
00097
00098   while(blkCnt > 0u)
00099   {
00100     /* Initialize minVal to the next consecutive values one by one */
00101     minVal = *pSrc++;
00102
00103     /* compare for the minimum value */
00104     if(out > minVal)
00105     {
00106       /* Update the minimum value and its index */
00107       out = minVal;
00108       outIndex = blockSize - blkCnt;
00109     }
00110
00111     /* Decrement the loop counter */
00112     blkCnt--;
00113
00114   }
00115
00116 #endif /* #ifndef ARM_MATH_CM0 */
00117
00118   /* Store the minimum value and its index into destination pointers */
00119   *pResult = out;
00120   *pIndex = outIndex;
00121 }
00122
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CMSIS DSP Software Library: arm_mult_f32.c File Reference

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arm_mult_f32.c File Reference

#include "arm_math.h"

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Functions

void arm_mult_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_mult_f32.c Source File

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arm_mult_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mult_f32.c
00009 *
00010 * Description:  Floating-point vector multiplication.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00068 void arm_mult_f32(
00069   float32_t * pSrcA,
00070   float32_t * pSrcB,
00071   float32_t * pDst,
00072   uint32_t blockSize)
00073 {
00074   uint32_t blkCnt;                               /* loop counters */
00075
00076 #ifndef ARM_MATH_CM0
00077
00078 /* Run the below code for Cortex-M4 and Cortex-M3 */
00079
00080   /* loop Unrolling */
00081   blkCnt = blockSize >> 2u;
00082
00083   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00084    ** a second loop below computes the remaining 1 to 3 samples. */
00085   while(blkCnt > 0u)
00086   {
00087     /* C = A * B */
00088     /* Multiply the inputs and store the results in output buffer */
00089     *pDst++ = (*pSrcA++) * (*pSrcB++);
00090     *pDst++ = (*pSrcA++) * (*pSrcB++);
00091     *pDst++ = (*pSrcA++) * (*pSrcB++);
00092     *pDst++ = (*pSrcA++) * (*pSrcB++);
00093
00094     /* Decrement the blockSize loop counter */
00095     blkCnt--;
00096   }
00097
00098   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00099    ** No loop unrolling is used. */
00100   blkCnt = blockSize % 0x4u;
00101
00102 #else
00103
00104   /* Run the below code for Cortex-M0 */
00105
00106   /* Initialize blkCnt with number of samples */
00107   blkCnt = blockSize;
00108
00109 #endif /* #ifndef ARM_MATH_CM0 */
00110
00111
00112   while(blkCnt > 0u)
00113   {
00114     /* C = A * B */
00115     /* Multiply the inputs and store the results in output buffer */
00116     *pDst++ = (*pSrcA++) * (*pSrcB++);
00117
00118     /* Decrement the blockSize loop counter */
00119     blkCnt--;
00120   }
00121
00122 }
00123
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CMSIS DSP Software Library: arm_mult_q7.c File Reference

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arm_mult_q7.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_mult_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_mult_q7.c Source File

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arm_mult_q7.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mult_q7.c
00009 *
00010 * Description:  Q7 vector multiplication.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 *
00032 * Version 0.0.5  2010/04/26
00033 *    incorporated review comments and updated with latest CMSIS layer
00034 *
00035 * Version 0.0.3  2010/03/10 DP
00036 *    Initial version
00037 * -------------------------------------------------------------------- */
00038
00039 #include "arm_math.h"
00040
00064 void arm_mult_q7(
00065   q7_t * pSrcA,
00066   q7_t * pSrcB,
00067   q7_t * pDst,
00068   uint32_t blockSize)
00069 {
00070   uint32_t blkCnt;                               /* loop counters */
00071
00072 #ifndef ARM_MATH_CM0
00073
00074 /* Run the below code for Cortex-M4 and Cortex-M3 */
00075   q7_t out1, out2, out3, out4;                   /* Temporary variables to store the product */
00076
00077   /* loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079
00080   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00081    ** a second loop below computes the remaining 1 to 3 samples. */
00082   while(blkCnt > 0u)
00083   {
00084     /* C = A * B */
00085     /* Multiply the inputs and store the results in temporary variables */
00086     out1 = (q7_t) (((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7);
00087     out2 = (q7_t) (((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7);
00088     out3 = (q7_t) (((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7);
00089     out4 = (q7_t) (((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7);
00090
00091     /* Store the results of 4 inputs in the destination buffer in single cycle by packing */
00092     *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
00093
00094     /* Decrement the blockSize loop counter */
00095     blkCnt--;
00096   }
00097
00098   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00099    ** No loop unrolling is used. */
00100   blkCnt = blockSize % 0x4u;
00101
00102 #else
00103
00104   /* Run the below code for Cortex-M0 */
00105
00106   /* Initialize blkCnt with number of samples */
00107   blkCnt = blockSize;
00108
00109 #endif /* #ifndef ARM_MATH_CM0 */
00110
00111
00112   while(blkCnt > 0u)
00113   {
00114     /* C = A * B */
00115     /* Multiply the inputs and store the result in the destination buffer */
00116     *pDst++ = (q7_t) (((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7);
00117
00118     /* Decrement the blockSize loop counter */
00119     blkCnt--;
00120   }
00121 }
00122
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CMSIS DSP Software Library: arm_mult_q15.c File Reference

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arm_mult_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_mult_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_mult_q15.c Source File

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arm_mult_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mult_q15.c
00009 *
00010 * Description:  Q15 vector multiplication.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00062 void arm_mult_q15(
00063   q15_t * pSrcA,
00064   q15_t * pSrcB,
00065   q15_t * pDst,
00066   uint32_t blockSize)
00067 {
00068   uint32_t blkCnt;                               /* loop counters */
00069
00070 #ifndef ARM_MATH_CM0
00071
00072 /* Run the below code for Cortex-M4 and Cortex-M3 */
00073
00074   /* loop Unrolling */
00075   blkCnt = blockSize >> 2u;
00076
00077   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00078    ** a second loop below computes the remaining 1 to 3 samples. */
00079   while(blkCnt > 0u)
00080   {
00081     /* C = A * B */
00082     /* Multiply the inputs and store the result in the destination buffer */
00083     *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
00084     *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
00085     *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
00086     *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
00087
00088     /* Decrement the blockSize loop counter */
00089     blkCnt--;
00090   }
00091
00092   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00093    ** No loop unrolling is used. */
00094   blkCnt = blockSize % 0x4u;
00095
00096 #else
00097
00098   /* Run the below code for Cortex-M0 */
00099
00100   /* Initialize blkCnt with number of samples */
00101   blkCnt = blockSize;
00102
00103 #endif /* #ifndef ARM_MATH_CM0 */
00104
00105
00106   while(blkCnt > 0u)
00107   {
00108     /* C = A * B */
00109     /* Multiply the inputs and store the result in the destination buffer */
00110     *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
00111
00112     /* Decrement the blockSize loop counter */
00113     blkCnt--;
00114   }
00115 }
00116
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CMSIS DSP Software Library: arm_mult_q31.c File Reference

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arm_mult_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_mult_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_mult_q31.c Source File

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arm_mult_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_mult_q31.c
00009 *
00010 * Description:  Q31 vector multiplication.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.5  2010/04/26
00030 *    incorporated review comments and updated with latest CMSIS layer
00031 *
00032 * Version 0.0.3  2010/03/10
00033 *    Initial version
00034 * -------------------------------------------------------------------- */
00035
00036 #include "arm_math.h"
00037
00061 void arm_mult_q31(
00062   q31_t * pSrcA,
00063   q31_t * pSrcB,
00064   q31_t * pDst,
00065   uint32_t blockSize)
00066 {
00067   uint32_t blkCnt;                               /* loop counters */
00068
00069 #ifndef ARM_MATH_CM0
00070
00071 /* Run the below code for Cortex-M4 and Cortex-M3 */
00072   /* loop Unrolling */
00073   blkCnt = blockSize >> 2u;
00074
00075   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00076    ** a second loop below computes the remaining 1 to 3 samples. */
00077   while(blkCnt > 0u)
00078   {
00079     /* C = A * B */
00080     /* Multiply the inputs and then store the results in the destination buffer. */
00081     *pDst++ =
00082       (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
00083     *pDst++ =
00084       (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
00085     *pDst++ =
00086       (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
00087     *pDst++ =
00088       (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
00089
00090     /* Decrement the blockSize loop counter */
00091     blkCnt--;
00092   }
00093
00094   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00095    ** No loop unrolling is used. */
00096   blkCnt = blockSize % 0x4u;
00097
00098 #else
00099
00100   /* Run the below code for Cortex-M0 */
00101
00102   /* Initialize blkCnt with number of samples */
00103   blkCnt = blockSize;
00104
00105 #endif /* #ifndef ARM_MATH_CM0 */
00106
00107   while(blkCnt > 0u)
00108   {
00109     /* C = A * B */
00110     /* Multiply the inputs and then store the results in the destination buffer. */
00111     *pDst++ =
00112       (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
00113
00114     /* Decrement the blockSize loop counter */
00115     blkCnt--;
00116   }
00117 }
00118
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CMSIS DSP Software Library: arm_negate_f32.c File Reference

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arm_negate_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_negate_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_negate_f32.c Source File

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arm_negate_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_negate_f32.c
00009 *
00010 * Description:  Negates floating-point vectors.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00062 void arm_negate_f32(
00063   float32_t * pSrc,
00064   float32_t * pDst,
00065   uint32_t blockSize)
00066 {
00067   uint32_t blkCnt;                               /* loop counter */
00068
00069
00070 #ifndef ARM_MATH_CM0
00071
00072 /* Run the below code for Cortex-M4 and Cortex-M3 */
00073   /*loop Unrolling */
00074   blkCnt = blockSize >> 2u;
00075
00076   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00077    ** a second loop below computes the remaining 1 to 3 samples. */
00078   while(blkCnt > 0u)
00079   {
00080     /* C = -A */
00081     /* Negate and then store the results in the destination buffer. */
00082     *pDst++ = -*pSrc++;
00083     *pDst++ = -*pSrc++;
00084     *pDst++ = -*pSrc++;
00085     *pDst++ = -*pSrc++;
00086
00087     /* Decrement the loop counter */
00088     blkCnt--;
00089   }
00090
00091   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00092    ** No loop unrolling is used. */
00093   blkCnt = blockSize % 0x4u;
00094
00095 #else
00096
00097   /* Run the below code for Cortex-M0 */
00098
00099   /* Initialize blkCnt with number of samples */
00100   blkCnt = blockSize;
00101
00102 #endif /* #ifndef ARM_MATH_CM0 */
00103
00104   while(blkCnt > 0u)
00105   {
00106     /* C = -A */
00107     /* Negate and then store the results in the destination buffer. */
00108     *pDst++ = -*pSrc++;
00109
00110     /* Decrement the loop counter */
00111     blkCnt--;
00112   }
00113 }
00114
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CMSIS DSP Software Library: arm_negate_q7.c File Reference

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arm_negate_q7.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_negate_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_negate_q7.c Source File

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arm_negate_q7.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_negate_q7.c
00009 *
00010 * Description:  Negates Q7 vectors.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00057 void arm_negate_q7(
00058   q7_t * pSrc,
00059   q7_t * pDst,
00060   uint32_t blockSize)
00061 {
00062   uint32_t blkCnt;                               /* loop counter */
00063
00064 #ifndef ARM_MATH_CM0
00065
00066 /* Run the below code for Cortex-M4 and Cortex-M3 */
00067   q7_t in1;                                      /* Input value1 */
00068   q7_t in2;                                      /* Input value2 */
00069   q7_t in3;                                      /* Input value3 */
00070   q7_t in4;                                      /* Input value4 */
00071
00072
00073   /*loop Unrolling */
00074   blkCnt = blockSize >> 2u;
00075
00076   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00077    ** a second loop below computes the remaining 1 to 3 samples. */
00078   while(blkCnt > 0u)
00079   {
00080     /* C = -A */
00081     /* Read four inputs */
00082     in1 = *pSrc++;
00083     in2 = *pSrc++;
00084     in3 = *pSrc++;
00085     in4 = *pSrc++;
00086
00087     /* Store the Negated results in the destination buffer in a single cycle by packing the results */
00088     *__SIMD32(pDst)++ =
00089       __PACKq7(__SSAT(-in1, 8), __SSAT(-in2, 8), __SSAT(-in3, 8),
00090                __SSAT(-in4, 8));
00091
00092     /* Decrement the loop counter */
00093     blkCnt--;
00094   }
00095
00096   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00097    ** No loop unrolling is used. */
00098   blkCnt = blockSize % 0x4u;
00099
00100 #else
00101
00102   /* Run the below code for Cortex-M0 */
00103
00104   /* Initialize blkCnt with number of samples */
00105   blkCnt = blockSize;
00106
00107 #endif /* #ifndef ARM_MATH_CM0 */
00108
00109   while(blkCnt > 0u)
00110   {
00111     /* C = -A */
00112     /* Negate and then store the results in the destination buffer. */
00113     *pDst++ = __SSAT(-*pSrc++, 8);
00114
00115     /* Decrement the loop counter */
00116     blkCnt--;
00117   }
00118 }
00119
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CMSIS DSP Software Library: arm_negate_q15.c File Reference

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arm_negate_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_negate_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_negate_q15.c Source File

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arm_negate_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_negate_q15.c
00009 *
00010 * Description:  Negates Q15 vectors.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00057 void arm_negate_q15(
00058   q15_t * pSrc,
00059   q15_t * pDst,
00060   uint32_t blockSize)
00061 {
00062   uint32_t blkCnt;                               /* loop counter */
00063
00064
00065 #ifndef ARM_MATH_CM0
00066
00067 /* Run the below code for Cortex-M4 and Cortex-M3 */
00068
00069   q15_t in1, in2;                                /* Temporary variables */
00070
00071
00072   /*loop Unrolling */
00073   blkCnt = blockSize >> 2u;
00074
00075   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00076    ** a second loop below computes the remaining 1 to 3 samples. */
00077   while(blkCnt > 0u)
00078   {
00079     /* C = -A */
00080     /* Read two inputs */
00081     in1 = *pSrc++;
00082     in2 = *pSrc++;
00083     /* Negate and then store the results in the destination buffer by packing. */
00084
00085 #ifndef  ARM_MATH_BIG_ENDIAN
00086
00087     *__SIMD32(pDst)++ = __PKHBT(__SSAT(-in1, 16), __SSAT(-in2, 16), 16);
00088
00089 #else
00090
00091     *__SIMD32(pDst)++ = __PKHBT(__SSAT(-in2, 16), __SSAT(-in1, 16), 16);
00092
00093 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
00094
00095     in1 = *pSrc++;
00096     in2 = *pSrc++;
00097
00098 #ifndef  ARM_MATH_BIG_ENDIAN
00099
00100     *__SIMD32(pDst)++ = __PKHBT(__SSAT(-in1, 16), __SSAT(-in2, 16), 16);
00101
00102 #else
00103
00104
00105     *__SIMD32(pDst)++ = __PKHBT(__SSAT(-in2, 16), __SSAT(-in1, 16), 16);
00106
00107 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
00108
00109     /* Decrement the loop counter */
00110     blkCnt--;
00111   }
00112
00113   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00114    ** No loop unrolling is used. */
00115   blkCnt = blockSize % 0x4u;
00116
00117 #else
00118
00119   /* Run the below code for Cortex-M0 */
00120
00121   /* Initialize blkCnt with number of samples */
00122   blkCnt = blockSize;
00123
00124 #endif /* #ifndef ARM_MATH_CM0 */
00125
00126   while(blkCnt > 0u)
00127   {
00128     /* C = -A */
00129     /* Negate and then store the result in the destination buffer. */
00130     *pDst++ = __SSAT(-*pSrc++, 16);
00131
00132     /* Decrement the loop counter */
00133     blkCnt--;
00134   }
00135
00136 }
00137
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CMSIS DSP Software Library: arm_negate_q31.c File Reference

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arm_negate_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_negate_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_negate_q31.c Source File

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arm_negate_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_negate_q31.c
00009 *
00010 * Description:  Negates Q31 vectors.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00057 void arm_negate_q31(
00058   q31_t * pSrc,
00059   q31_t * pDst,
00060   uint32_t blockSize)
00061 {
00062   q31_t in;                                      /* Temporary variable */
00063   uint32_t blkCnt;                               /* loop counter */
00064
00065 #ifndef ARM_MATH_CM0
00066
00067 /* Run the below code for Cortex-M4 and Cortex-M3 */
00068
00069   /*loop Unrolling */
00070   blkCnt = blockSize >> 2u;
00071
00072   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00073    ** a second loop below computes the remaining 1 to 3 samples. */
00074   while(blkCnt > 0u)
00075   {
00076     /* C = -A */
00077     /* Negate and then store the results in the destination buffer. */
00078     in = *pSrc++;
00079     *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
00080     in = *pSrc++;
00081     *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
00082     in = *pSrc++;
00083     *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
00084     in = *pSrc++;
00085     *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
00086
00087     /* Decrement the loop counter */
00088     blkCnt--;
00089   }
00090
00091   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00092    ** No loop unrolling is used. */
00093   blkCnt = blockSize % 0x4u;
00094
00095 #else
00096
00097   /* Run the below code for Cortex-M0 */
00098
00099   /* Initialize blkCnt with number of samples */
00100   blkCnt = blockSize;
00101
00102 #endif /* #ifndef ARM_MATH_CM0 */
00103
00104
00105   while(blkCnt > 0u)
00106   {
00107     /* C = -A */
00108     /* Negate and then store the result in the destination buffer. */
00109     in = *pSrc++;
00110     *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
00111
00112     /* Decrement the loop counter */
00113     blkCnt--;
00114   }
00115 }
00116
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CMSIS DSP Software Library: arm_offset_f32.c File Reference

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arm_offset_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_offset_f32 (float32_t *pSrc, float32_t offset, float32_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_offset_f32.c Source File

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arm_offset_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_offset_f32.c
00009 *
00010 * Description:  Floating-point vector offset.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00066 void arm_offset_f32(
00067   float32_t * pSrc,
00068   float32_t offset,
00069   float32_t * pDst,
00070   uint32_t blockSize)
00071 {
00072   uint32_t blkCnt;                               /* loop counter */
00073
00074 #ifndef ARM_MATH_CM0
00075
00076 /* Run the below code for Cortex-M4 and Cortex-M3 */
00077
00078   /*loop Unrolling */
00079   blkCnt = blockSize >> 2u;
00080
00081   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00082    ** a second loop below computes the remaining 1 to 3 samples. */
00083   while(blkCnt > 0u)
00084   {
00085     /* C = A + offset */
00086     /* Add offset and then store the results in the destination buffer. */
00087     *pDst++ = (*pSrc++) + offset;
00088     *pDst++ = (*pSrc++) + offset;
00089     *pDst++ = (*pSrc++) + offset;
00090     *pDst++ = (*pSrc++) + offset;
00091
00092     /* Decrement the loop counter */
00093     blkCnt--;
00094   }
00095
00096   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00097    ** No loop unrolling is used. */
00098   blkCnt = blockSize % 0x4u;
00099
00100 #else
00101
00102   /* Run the below code for Cortex-M0 */
00103
00104   /* Initialize blkCnt with number of samples */
00105   blkCnt = blockSize;
00106
00107 #endif /* #ifndef ARM_MATH_CM0 */
00108
00109   while(blkCnt > 0u)
00110   {
00111     /* C = A + offset */
00112     /* Add offset and then store the result in the destination buffer. */
00113     *pDst++ = (*pSrc++) + offset;
00114
00115     /* Decrement the loop counter */
00116     blkCnt--;
00117   }
00118 }
00119
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CMSIS DSP Software Library: arm_offset_q7.c File Reference

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arm_offset_q7.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_offset_q7 (q7_t *pSrc, q7_t offset, q7_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_offset_q7.c Source File

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arm_offset_q7.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_offset_q7.c
00009 *
00010 * Description:  Q7 vector offset.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_offset_q7(
00059   q7_t * pSrc,
00060   q7_t offset,
00061   q7_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   uint32_t blkCnt;                               /* loop counter */
00065
00066 #ifndef ARM_MATH_CM0
00067
00068 /* Run the below code for Cortex-M4 and Cortex-M3 */
00069   q31_t offset_packed;                           /* Offset packed to 32 bit */
00070
00071
00072   /*loop Unrolling */
00073   blkCnt = blockSize >> 2u;
00074
00075   /* Offset is packed to 32 bit in order to use SIMD32 for addition */
00076   offset_packed = __PACKq7(offset, offset, offset, offset);
00077
00078   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00079    ** a second loop below computes the remaining 1 to 3 samples. */
00080   while(blkCnt > 0u)
00081   {
00082     /* C = A + offset */
00083     /* Add offset and then store the results in the destination bufferfor 4 samples at a time. */
00084     *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrc)++, offset_packed);
00085
00086     /* Decrement the loop counter */
00087     blkCnt--;
00088   }
00089
00090   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00091    ** No loop unrolling is used. */
00092   blkCnt = blockSize % 0x4u;
00093
00094   while(blkCnt > 0u)
00095   {
00096     /* C = A + offset */
00097     /* Add offset and then store the result in the destination buffer. */
00098     *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
00099
00100     /* Decrement the loop counter */
00101     blkCnt--;
00102   }
00103
00104 #else
00105
00106   /* Run the below code for Cortex-M0 */
00107
00108   /* Initialize blkCnt with number of samples */
00109   blkCnt = blockSize;
00110
00111   while(blkCnt > 0u)
00112   {
00113     /* C = A + offset */
00114     /* Add offset and then store the result in the destination buffer. */
00115     *pDst++ = (q7_t) __SSAT((q15_t) * pSrc++ + offset, 8);
00116
00117     /* Decrement the loop counter */
00118     blkCnt--;
00119   }
00120
00121 #endif /* #ifndef ARM_MATH_CM0 */
00122
00123 }
00124
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CMSIS DSP Software Library: arm_offset_q15.c File Reference

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arm_offset_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_offset_q15 (q15_t *pSrc, q15_t offset, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_offset_q15.c Source File

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arm_offset_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_offset_q15.c
00009 *
00010 * Description:  Q15 vector offset.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_offset_q15(
00059   q15_t * pSrc,
00060   q15_t offset,
00061   q15_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   uint32_t blkCnt;                               /* loop counter */
00065
00066 #ifndef ARM_MATH_CM0
00067
00068 /* Run the below code for Cortex-M4 and Cortex-M3 */
00069   q31_t offset_packed;                           /* Offset packed to 32 bit */
00070
00071
00072   /*loop Unrolling */
00073   blkCnt = blockSize >> 2u;
00074
00075   /* Offset is packed to 32 bit in order to use SIMD32 for addition */
00076   offset_packed = __PKHBT(offset, offset, 16);
00077
00078   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00079    ** a second loop below computes the remaining 1 to 3 samples. */
00080   while(blkCnt > 0u)
00081   {
00082     /* C = A + offset */
00083     /* Add offset and then store the results in the destination buffer, 2 samples at a time. */
00084     *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
00085     *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
00086
00087     /* Decrement the loop counter */
00088     blkCnt--;
00089   }
00090
00091   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00092    ** No loop unrolling is used. */
00093   blkCnt = blockSize % 0x4u;
00094
00095   while(blkCnt > 0u)
00096   {
00097     /* C = A + offset */
00098     /* Add offset and then store the results in the destination buffer. */
00099     *pDst++ = (q15_t) __QADD16(*pSrc++, offset);
00100
00101     /* Decrement the loop counter */
00102     blkCnt--;
00103   }
00104
00105 #else
00106
00107   /* Run the below code for Cortex-M0 */
00108
00109   /* Initialize blkCnt with number of samples */
00110   blkCnt = blockSize;
00111
00112   while(blkCnt > 0u)
00113   {
00114     /* C = A + offset */
00115     /* Add offset and then store the results in the destination buffer. */
00116     *pDst++ = (q15_t) __SSAT(((q31_t) * pSrc++ + offset), 16);
00117
00118     /* Decrement the loop counter */
00119     blkCnt--;
00120   }
00121
00122 #endif /* #ifndef ARM_MATH_CM0 */
00123
00124 }
00125
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CMSIS DSP Software Library: arm_offset_q31.c File Reference

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arm_offset_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_offset_q31 (q31_t *pSrc, q31_t offset, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_offset_q31.c Source File

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arm_offset_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_offset_q31.c
00009 *
00010 * Description:  Q31 vector offset.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_offset_q31(
00059   q31_t * pSrc,
00060   q31_t offset,
00061   q31_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   uint32_t blkCnt;                               /* loop counter */
00065
00066 #ifndef ARM_MATH_CM0
00067
00068 /* Run the below code for Cortex-M4 and Cortex-M3 */
00069
00070
00071   /*loop Unrolling */
00072   blkCnt = blockSize >> 2u;
00073
00074   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00075    ** a second loop below computes the remaining 1 to 3 samples. */
00076   while(blkCnt > 0u)
00077   {
00078     /* C = A + offset */
00079     /* Add offset and then store the results in the destination buffer. */
00080     *pDst++ = __QADD(*pSrc++, offset);
00081     *pDst++ = __QADD(*pSrc++, offset);
00082     *pDst++ = __QADD(*pSrc++, offset);
00083     *pDst++ = __QADD(*pSrc++, offset);
00084
00085     /* Decrement the loop counter */
00086     blkCnt--;
00087   }
00088
00089   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00090    ** No loop unrolling is used. */
00091   blkCnt = blockSize % 0x4u;
00092
00093   while(blkCnt > 0u)
00094   {
00095     /* C = A + offset */
00096     /* Add offset and then store the result in the destination buffer. */
00097     *pDst++ = __QADD(*pSrc++, offset);
00098
00099     /* Decrement the loop counter */
00100     blkCnt--;
00101   }
00102
00103 #else
00104
00105   /* Run the below code for Cortex-M0 */
00106
00107   /* Initialize blkCnt with number of samples */
00108   blkCnt = blockSize;
00109
00110   while(blkCnt > 0u)
00111   {
00112     /* C = A + offset */
00113     /* Add offset and then store the result in the destination buffer. */
00114     *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
00115
00116     /* Decrement the loop counter */
00117     blkCnt--;
00118   }
00119
00120 #endif /* #ifndef ARM_MATH_CM0 */
00121
00122 }
00123
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CMSIS DSP Software Library: arm_pid_init_f32.c File Reference

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arm_pid_init_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_pid_init_f32 (arm_pid_instance_f32 *S, int32_t resetStateFlag)
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CMSIS DSP Software Library: arm_pid_init_f32.c Source File

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arm_pid_init_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_pid_init_f32.c
00009 *
00010 * Description:  Floating-point PID Control initialization function
00011 *
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 * ------------------------------------------------------------------- */
00030
00031 #include "arm_math.h"
00032
00051 void arm_pid_init_f32(
00052   arm_pid_instance_f32 * S,
00053   int32_t resetStateFlag)
00054 {
00055
00056   /* Derived coefficient A0 */
00057   S->A0 = S->Kp + S->Ki + S->Kd;
00058
00059   /* Derived coefficient A1 */
00060   S->A1 = (-S->Kp) - ((float32_t) 2.0 * S->Kd);
00061
00062   /* Derived coefficient A2 */
00063   S->A2 = S->Kd;
00064
00065   /* Check whether state needs reset or not */
00066   if(resetStateFlag)
00067   {
00068     /* Clear the state buffer.  The size will be always 3 samples */
00069     memset(S->state, 0, 3u * sizeof(float32_t));
00070   }
00071
00072 }
00073
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CMSIS DSP Software Library: arm_pid_init_q15.c File Reference

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arm_pid_init_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_pid_init_q15 (arm_pid_instance_q15 *S, int32_t resetStateFlag)
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CMSIS DSP Software Library: arm_pid_init_q15.c Source File

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arm_pid_init_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_pid_init_q15.c
00009 *
00010 * Description:  Q15 PID Control initialization function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00050 void arm_pid_init_q15(
00051   arm_pid_instance_q15 * S,
00052   int32_t resetStateFlag)
00053 {
00054
00055 #ifndef ARM_MATH_CM0
00056
00057   /* Run the below code for Cortex-M4 and Cortex-M3 */
00058
00059   /* Derived coefficient A0 */
00060   S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd);
00061
00062   /* Derived coefficients and pack into A1 */
00063
00064 #ifndef  ARM_MATH_BIG_ENDIAN
00065
00066   S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16);
00067
00068 #else
00069
00070   S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16);
00071
00072 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
00073
00074   /* Check whether state needs reset or not */
00075   if(resetStateFlag)
00076   {
00077     /* Clear the state buffer.  The size will be always 3 samples */
00078     memset(S->state, 0, 3u * sizeof(q15_t));
00079   }
00080
00081 #else
00082
00083   /* Run the below code for Cortex-M0 */
00084
00085   q31_t temp;                                    /*to store the sum */
00086
00087   /* Derived coefficient A0 */
00088   temp = S->Kp + S->Ki + S->Kd;
00089   S->A0 = (q15_t) __SSAT(temp, 16);
00090
00091   /* Derived coefficients and pack into A1 */
00092   temp = -(S->Kd + S->Kd + S->Kp);
00093   S->A1 = (q15_t) __SSAT(temp, 16);
00094   S->A2 = S->Kd;
00095
00096
00097
00098   /* Check whether state needs reset or not */
00099   if(resetStateFlag)
00100   {
00101     /* Clear the state buffer.  The size will be always 3 samples */
00102     memset(S->state, 0, 3u * sizeof(q15_t));
00103   }
00104
00105 #endif /* #ifndef ARM_MATH_CM0 */
00106
00107 }
00108
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CMSIS DSP Software Library: arm_pid_init_q31.c File Reference

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arm_pid_init_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_pid_init_q31 (arm_pid_instance_q31 *S, int32_t resetStateFlag)
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CMSIS DSP Software Library: arm_pid_init_q31.c Source File

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arm_pid_init_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_pid_init_q31.c
00009 *
00010 * Description:  Q31 PID Control initialization function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00050 void arm_pid_init_q31(
00051   arm_pid_instance_q31 * S,
00052   int32_t resetStateFlag)
00053 {
00054
00055 #ifndef ARM_MATH_CM0
00056
00057   /* Run the below code for Cortex-M4 and Cortex-M3 */
00058
00059   /* Derived coefficient A0 */
00060   S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd);
00061
00062   /* Derived coefficient A1 */
00063   S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp);
00064
00065
00066 #else
00067
00068   /* Run the below code for Cortex-M0 */
00069
00070   q31_t temp;
00071
00072   /* Derived coefficient A0 */
00073   temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki);
00074   S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd);
00075
00076   /* Derived coefficient A1 */
00077   temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd);
00078   S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp);
00079
00080 #endif /* #ifndef ARM_MATH_CM0 */
00081
00082   /* Derived coefficient A2 */
00083   S->A2 = S->Kd;
00084
00085   /* Check whether state needs reset or not */
00086   if(resetStateFlag)
00087   {
00088     /* Clear the state buffer.  The size will be always 3 samples */
00089     memset(S->state, 0, 3u * sizeof(q31_t));
00090   }
00091
00092 }
00093
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CMSIS DSP Software Library: arm_pid_reset_f32.c File Reference

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arm_pid_reset_f32.c File Reference

#include "arm_math.h"

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Functions

void arm_pid_reset_f32 (arm_pid_instance_f32 *S)
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CMSIS DSP Software Library: arm_pid_reset_f32.c Source File

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arm_pid_reset_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_pid_reset_f32.c
00009 *
00010 * Description:  Floating-point PID Control reset function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00044 void arm_pid_reset_f32(
00045   arm_pid_instance_f32 * S)
00046 {
00047
00048   /* Clear the state buffer.  The size will be always 3 samples */
00049   memset(S->state, 0, 3u * sizeof(float32_t));
00050 }
00051
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CMSIS DSP Software Library: arm_pid_reset_q15.c File Reference

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arm_pid_reset_q15.c File Reference

#include "arm_math.h"

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Functions

void arm_pid_reset_q15 (arm_pid_instance_q15 *S)
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CMSIS DSP Software Library: arm_pid_reset_q15.c Source File

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arm_pid_reset_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_pid_reset_q15.c
00009 *
00010 * Description:  Q15 PID Control reset function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00044 void arm_pid_reset_q15(
00045   arm_pid_instance_q15 * S)
00046 {
00047   /* Reset state to zero, The size will be always 3 samples */
00048   memset(S->state, 0, 3u * sizeof(q15_t));
00049 }
00050
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CMSIS DSP Software Library: arm_pid_reset_q31.c File Reference

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arm_pid_reset_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_pid_reset_q31 (arm_pid_instance_q31 *S)
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CMSIS DSP Software Library: arm_pid_reset_q31.c Source File

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arm_pid_reset_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_pid_reset_q31.c
00009 *
00010 * Description:  Q31 PID Control reset function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00044 void arm_pid_reset_q31(
00045   arm_pid_instance_q31 * S)
00046 {
00047
00048   /* Clear the state buffer.  The size will be always 3 samples */
00049   memset(S->state, 0, 3u * sizeof(q31_t));
00050 }
00051
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CMSIS DSP Software Library: arm_power_f32.c File Reference

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arm_power_f32.c File Reference

#include "arm_math.h"

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Functions

void arm_power_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
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CMSIS DSP Software Library: arm_power_f32.c Source File

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arm_power_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_power_f32.c
00009 *
00010 * Description:  Sum of the squares of the elements of a floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00068 void arm_power_f32(
00069   float32_t * pSrc,
00070   uint32_t blockSize,
00071   float32_t * pResult)
00072 {
00073   float32_t sum = 0.0f;                          /* accumulator */
00074   float32_t in;                                  /* Temporary variable to store input value */
00075   uint32_t blkCnt;                               /* loop counter */
00076
00077 #ifndef ARM_MATH_CM0
00078
00079   /* Run the below code for Cortex-M4 and Cortex-M3 */
00080
00081   /*loop Unrolling */
00082   blkCnt = blockSize >> 2u;
00083
00084   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00085    ** a second loop below computes the remaining 1 to 3 samples. */
00086   while(blkCnt > 0u)
00087   {
00088     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00089     /* Compute Power and then store the result in a temporary variable, sum. */
00090     in = *pSrc++;
00091     sum += in * in;
00092     in = *pSrc++;
00093     sum += in * in;
00094     in = *pSrc++;
00095     sum += in * in;
00096     in = *pSrc++;
00097     sum += in * in;
00098
00099     /* Decrement the loop counter */
00100     blkCnt--;
00101   }
00102
00103   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00104    ** No loop unrolling is used. */
00105   blkCnt = blockSize % 0x4u;
00106
00107
00108 #else
00109
00110   /* Run the below code for Cortex-M0 */
00111
00112   /* Loop over blockSize number of values */
00113   blkCnt = blockSize;
00114
00115 #endif /* #ifndef ARM_MATH_CM0 */
00116
00117
00118   while(blkCnt > 0u)
00119   {
00120     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00121     /* compute power and then store the result in a temporary variable, sum. */
00122     in = *pSrc++;
00123     sum += in * in;
00124
00125     /* Decrement the loop counter */
00126     blkCnt--;
00127   }
00128
00129   /* Store the result to the destination */
00130   *pResult = sum;
00131 }
00132
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CMSIS DSP Software Library: arm_power_q7.c File Reference

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arm_power_q7.c File Reference

#include "arm_math.h"

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Functions

void arm_power_q7 (q7_t *pSrc, uint32_t blockSize, q31_t *pResult)
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CMSIS DSP Software Library: arm_power_q7.c Source File

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arm_power_q7.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_power_q7.c
00009 *
00010 * Description:  Sum of the squares of the elements of a Q7 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00062 void arm_power_q7(
00063   q7_t * pSrc,
00064   uint32_t blockSize,
00065   q31_t * pResult)
00066 {
00067   q31_t sum = 0;                                 /* Temporary result storage */
00068   q7_t in;                                       /* Temporary variable to store input */
00069   uint32_t blkCnt;                               /* loop counter */
00070
00071 #ifndef ARM_MATH_CM0
00072
00073   /* Run the below code for Cortex-M4 and Cortex-M3 */
00074
00075   q31_t input1;                                  /* Temporary variable to store packed input */
00076   q15_t in1, in2;                                /* Temporary variables to store input */
00077
00078   /*loop Unrolling */
00079   blkCnt = blockSize >> 2u;
00080
00081   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00082    ** a second loop below computes the remaining 1 to 3 samples. */
00083   while(blkCnt > 0u)
00084   {
00085     /* Reading two inputs of pSrc vector and packing */
00086     in1 = (q15_t) * pSrc++;
00087     in2 = (q15_t) * pSrc++;
00088     input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00089
00090     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00091     /* Compute Power and then store the result in a temporary variable, sum. */
00092     sum = __SMLAD(input1, input1, sum);
00093
00094     /* Reading two inputs of pSrc vector and packing */
00095     in1 = (q15_t) * pSrc++;
00096     in2 = (q15_t) * pSrc++;
00097     input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
00098
00099     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00100     /* Compute Power and then store the result in a temporary variable, sum. */
00101     sum = __SMLAD(input1, input1, sum);
00102
00103     /* Decrement the loop counter */
00104     blkCnt--;
00105   }
00106
00107   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00108    ** No loop unrolling is used. */
00109   blkCnt = blockSize % 0x4u;
00110
00111 #else
00112
00113   /* Run the below code for Cortex-M0 */
00114
00115   /* Loop over blockSize number of values */
00116   blkCnt = blockSize;
00117
00118 #endif /* #ifndef ARM_MATH_CM0 */
00119
00120   while(blkCnt > 0u)
00121   {
00122     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00123     /* Compute Power and then store the result in a temporary variable, sum. */
00124     in = *pSrc++;
00125     sum += ((q15_t) in * in);
00126
00127     /* Decrement the loop counter */
00128     blkCnt--;
00129   }
00130
00131   /* Store the result in 18.14 format  */
00132   *pResult = sum;
00133 }
00134
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CMSIS DSP Software Library: arm_power_q15.c File Reference

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arm_power_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_power_q15 (q15_t *pSrc, uint32_t blockSize, q63_t *pResult)
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CMSIS DSP Software Library: arm_power_q15.c Source File

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arm_power_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_power_q15.c
00009 *
00010 * Description:  Sum of the squares of the elements of a Q15 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00062 void arm_power_q15(
00063   q15_t * pSrc,
00064   uint32_t blockSize,
00065   q63_t * pResult)
00066 {
00067   q63_t sum = 0;                                 /* Temporary result storage */
00068
00069 #ifndef ARM_MATH_CM0
00070
00071   /* Run the below code for Cortex-M4 and Cortex-M3 */
00072
00073   q31_t in32;                                    /* Temporary variable to store input value */
00074   q15_t in16;                                    /* Temporary variable to store input value */
00075   uint32_t blkCnt;                               /* loop counter */
00076
00077
00078   /* loop Unrolling */
00079   blkCnt = blockSize >> 2u;
00080
00081   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00082    ** a second loop below computes the remaining 1 to 3 samples. */
00083   while(blkCnt > 0u)
00084   {
00085     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00086     /* Compute Power and then store the result in a temporary variable, sum. */
00087     in32 = *__SIMD32(pSrc)++;
00088     sum = __SMLALD(in32, in32, sum);
00089     in32 = *__SIMD32(pSrc)++;
00090     sum = __SMLALD(in32, in32, sum);
00091
00092     /* Decrement the loop counter */
00093     blkCnt--;
00094   }
00095
00096   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00097    ** No loop unrolling is used. */
00098   blkCnt = blockSize % 0x4u;
00099
00100   while(blkCnt > 0u)
00101   {
00102     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00103     /* Compute Power and then store the result in a temporary variable, sum. */
00104     in16 = *pSrc++;
00105     sum = __SMLALD(in16, in16, sum);
00106
00107     /* Decrement the loop counter */
00108     blkCnt--;
00109   }
00110
00111 #else
00112
00113   /* Run the below code for Cortex-M0 */
00114
00115   q15_t in;                                      /* Temporary variable to store input value */
00116   uint32_t blkCnt;                               /* loop counter */
00117
00118
00119   /* Loop over blockSize number of values */
00120   blkCnt = blockSize;
00121
00122   while(blkCnt > 0u)
00123   {
00124     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00125     /* Compute Power and then store the result in a temporary variable, sum. */
00126     in = *pSrc++;
00127     sum += ((q31_t) in * in);
00128
00129     /* Decrement the loop counter */
00130     blkCnt--;
00131   }
00132
00133 #endif /* #ifndef ARM_MATH_CM0 */
00134
00135   /* Store the results in 34.30 format  */
00136   *pResult = sum;
00137 }
00138
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CMSIS DSP Software Library: arm_power_q31.c File Reference

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arm_power_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_power_q31 (q31_t *pSrc, uint32_t blockSize, q63_t *pResult)
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CMSIS DSP Software Library: arm_power_q31.c Source File

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arm_power_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_power_q31.c
00009 *
00010 * Description:  Sum of the squares of the elements of a Q31 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00063 void arm_power_q31(
00064   q31_t * pSrc,
00065   uint32_t blockSize,
00066   q63_t * pResult)
00067 {
00068   q63_t sum = 0;                                 /* Temporary result storage */
00069   q31_t in;
00070   uint32_t blkCnt;                               /* loop counter */
00071
00072
00073 #ifndef ARM_MATH_CM0
00074
00075   /* Run the below code for Cortex-M4 and Cortex-M3 */
00076
00077   /*loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079
00080   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00081    ** a second loop below computes the remaining 1 to 3 samples. */
00082   while(blkCnt > 0u)
00083   {
00084     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00085     /* Compute Power then shift intermediate results by 14 bits to maintain 16.48 format and then store the result in a temporary variable sum, providing 15 guard bits. */
00086     in = *pSrc++;
00087     sum += ((q63_t) in * in) >> 14u;
00088
00089     in = *pSrc++;
00090     sum += ((q63_t) in * in) >> 14u;
00091
00092     in = *pSrc++;
00093     sum += ((q63_t) in * in) >> 14u;
00094
00095     in = *pSrc++;
00096     sum += ((q63_t) in * in) >> 14u;
00097
00098     /* Decrement the loop counter */
00099     blkCnt--;
00100   }
00101
00102   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00103    ** No loop unrolling is used. */
00104   blkCnt = blockSize % 0x4u;
00105
00106 #else
00107
00108   /* Run the below code for Cortex-M0 */
00109
00110   /* Loop over blockSize number of values */
00111   blkCnt = blockSize;
00112
00113 #endif /* #ifndef ARM_MATH_CM0 */
00114
00115   while(blkCnt > 0u)
00116   {
00117     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00118     /* Compute Power and then store the result in a temporary variable, sum. */
00119     in = *pSrc++;
00120     sum += ((q63_t) in * in) >> 14u;
00121
00122     /* Decrement the loop counter */
00123     blkCnt--;
00124   }
00125
00126   /* Store the results in 16.48 format  */
00127   *pResult = sum;
00128 }
00129
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CMSIS DSP Software Library: arm_q7_to_float.c File Reference

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arm_q7_to_float.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_q7_to_float (q7_t *pSrc, float32_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_q7_to_float.c Source File

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arm_q7_to_float.c

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00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_q7_to_float.c
00009 *
00010 * Description:  Converts the elements of the Q7 vector to floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00063 void arm_q7_to_float(
00064   q7_t * pSrc,
00065   float32_t * pDst,
00066   uint32_t blockSize)
00067 {
00068   q7_t *pIn = pSrc;                              /* Src pointer */
00069   uint32_t blkCnt;                               /* loop counter */
00070
00071
00072 #ifndef ARM_MATH_CM0
00073
00074   /* Run the below code for Cortex-M4 and Cortex-M3 */
00075
00076   /*loop Unrolling */
00077   blkCnt = blockSize >> 2u;
00078
00079   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00080    ** a second loop below computes the remaining 1 to 3 samples. */
00081   while(blkCnt > 0u)
00082   {
00083     /* C = (float32_t) A / 128 */
00084     /* convert from q7 to float and then store the results in the destination buffer */
00085     *pDst++ = ((float32_t) * pIn++ / 128.0f);
00086     *pDst++ = ((float32_t) * pIn++ / 128.0f);
00087     *pDst++ = ((float32_t) * pIn++ / 128.0f);
00088     *pDst++ = ((float32_t) * pIn++ / 128.0f);
00089
00090     /* Decrement the loop counter */
00091     blkCnt--;
00092   }
00093
00094   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00095    ** No loop unrolling is used. */
00096   blkCnt = blockSize % 0x4u;
00097
00098 #else
00099
00100   /* Run the below code for Cortex-M0 */
00101
00102   /* Loop over blockSize number of values */
00103   blkCnt = blockSize;
00104
00105 #endif /* #ifndef ARM_MATH_CM0 */
00106
00107   while(blkCnt > 0u)
00108   {
00109     /* C = (float32_t) A / 128 */
00110     /* convert from q7 to float and then store the results in the destination buffer */
00111     *pDst++ = ((float32_t) * pIn++ / 128.0f);
00112
00113     /* Decrement the loop counter */
00114     blkCnt--;
00115   }
00116 }
00117
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CMSIS DSP Software Library: arm_q7_to_q15.c File Reference

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arm_q7_to_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_q7_to_q15 (q7_t *pSrc, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_q7_to_q15.c Source File

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arm_q7_to_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_q7_to_q15.c
00009 *
00010 * Description:  Converts the elements of the Q7 vector to Q15 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00062 void arm_q7_to_q15(
00063   q7_t * pSrc,
00064   q15_t * pDst,
00065   uint32_t blockSize)
00066 {
00067   q7_t *pIn = pSrc;                              /* Src pointer */
00068   uint32_t blkCnt;                               /* loop counter */
00069
00070 #ifndef ARM_MATH_CM0
00071
00072   /* Run the below code for Cortex-M4 and Cortex-M3 */
00073
00074   /*loop Unrolling */
00075   blkCnt = blockSize >> 2u;
00076
00077   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00078    ** a second loop below computes the remaining 1 to 3 samples. */
00079   while(blkCnt > 0u)
00080   {
00081     /* C = (q15_t) A << 8 */
00082     /* convert from q7 to q15 and then store the results in the destination buffer */
00083     *pDst++ = (q15_t) * pIn++ << 8;
00084     *pDst++ = (q15_t) * pIn++ << 8;
00085     *pDst++ = (q15_t) * pIn++ << 8;
00086     *pDst++ = (q15_t) * pIn++ << 8;
00087
00088     /* Decrement the loop counter */
00089     blkCnt--;
00090   }
00091
00092   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00093    ** No loop unrolling is used. */
00094   blkCnt = blockSize % 0x4u;
00095
00096 #else
00097
00098   /* Run the below code for Cortex-M0 */
00099
00100   /* Loop over blockSize number of values */
00101   blkCnt = blockSize;
00102
00103 #endif /* #ifndef ARM_MATH_CM0 */
00104
00105   while(blkCnt > 0u)
00106   {
00107     /* C = (q15_t) A << 8 */
00108     /* convert from q7 to q15 and then store the results in the destination buffer */
00109     *pDst++ = (q15_t) * pIn++ << 8;
00110
00111     /* Decrement the loop counter */
00112     blkCnt--;
00113   }
00114
00115 }
00116
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CMSIS DSP Software Library: arm_q7_to_q31.c File Reference

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arm_q7_to_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_q7_to_q31 (q7_t *pSrc, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_q7_to_q31.c Source File

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arm_q7_to_q31.c

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00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_q7_to_q31.c
00009 *
00010 * Description:  Converts the elements of the Q7 vector to Q31 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00059 void arm_q7_to_q31(
00060   q7_t * pSrc,
00061   q31_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   q7_t *pIn = pSrc;                              /* Src pointer */
00065   uint32_t blkCnt;                               /* loop counter */
00066
00067 #ifndef ARM_MATH_CM0
00068
00069   /* Run the below code for Cortex-M4 and Cortex-M3 */
00070
00071   /*loop Unrolling */
00072   blkCnt = blockSize >> 2u;
00073
00074   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00075    ** a second loop below computes the remaining 1 to 3 samples. */
00076   while(blkCnt > 0u)
00077   {
00078     /* C = (q31_t) A << 24 */
00079     /* convert from q7 to q31 and then store the results in the destination buffer */
00080     *pDst++ = (q31_t) * pIn++ << 24;
00081     *pDst++ = (q31_t) * pIn++ << 24;
00082     *pDst++ = (q31_t) * pIn++ << 24;
00083     *pDst++ = (q31_t) * pIn++ << 24;
00084
00085     /* Decrement the loop counter */
00086     blkCnt--;
00087   }
00088
00089   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00090    ** No loop unrolling is used. */
00091   blkCnt = blockSize % 0x4u;
00092
00093 #else
00094
00095   /* Run the below code for Cortex-M0 */
00096
00097   /* Loop over blockSize number of values */
00098   blkCnt = blockSize;
00099
00100 #endif /* #ifndef ARM_MATH_CM0 */
00101
00102   while(blkCnt > 0u)
00103   {
00104     /* C = (q31_t) A << 24 */
00105     /* convert from q7 to q31 and then store the results in the destination buffer */
00106     *pDst++ = (q31_t) * pIn++ << 24;
00107
00108     /* Decrement the loop counter */
00109     blkCnt--;
00110   }
00111
00112 }
00113
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CMSIS DSP Software Library: arm_q15_to_float.c File Reference

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arm_q15_to_float.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_q15_to_float (q15_t *pSrc, float32_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_q15_to_float.c Source File

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arm_q15_to_float.c

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00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_q15_to_float.c
00009 *
00010 * Description:  Converts the elements of the Q15 vector to floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00066 void arm_q15_to_float(
00067   q15_t * pSrc,
00068   float32_t * pDst,
00069   uint32_t blockSize)
00070 {
00071   q15_t *pIn = pSrc;                             /* Src pointer */
00072   uint32_t blkCnt;                               /* loop counter */
00073
00074
00075 #ifndef ARM_MATH_CM0
00076
00077   /* Run the below code for Cortex-M4 and Cortex-M3 */
00078
00079   /*loop Unrolling */
00080   blkCnt = blockSize >> 2u;
00081
00082   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00083    ** a second loop below computes the remaining 1 to 3 samples. */
00084   while(blkCnt > 0u)
00085   {
00086     /* C = (float32_t) A / 32768 */
00087     /* convert from q15 to float and then store the results in the destination buffer */
00088     *pDst++ = ((float32_t) * pIn++ / 32768.0f);
00089     *pDst++ = ((float32_t) * pIn++ / 32768.0f);
00090     *pDst++ = ((float32_t) * pIn++ / 32768.0f);
00091     *pDst++ = ((float32_t) * pIn++ / 32768.0f);
00092
00093     /* Decrement the loop counter */
00094     blkCnt--;
00095   }
00096
00097   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00098    ** No loop unrolling is used. */
00099   blkCnt = blockSize % 0x4u;
00100
00101 #else
00102
00103   /* Run the below code for Cortex-M0 */
00104
00105   /* Loop over blockSize number of values */
00106   blkCnt = blockSize;
00107
00108 #endif /* #ifndef ARM_MATH_CM0 */
00109
00110   while(blkCnt > 0u)
00111   {
00112     /* C = (float32_t) A / 32768 */
00113     /* convert from q15 to float and then store the results in the destination buffer */
00114     *pDst++ = ((float32_t) * pIn++ / 32768.0f);
00115
00116     /* Decrement the loop counter */
00117     blkCnt--;
00118   }
00119 }
00120
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CMSIS DSP Software Library: arm_q15_to_q7.c File Reference

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arm_q15_to_q7.c File Reference

#include "arm_math.h"

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Functions

void arm_q15_to_q7 (q15_t *pSrc, q7_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_q15_to_q7.c Source File

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arm_q15_to_q7.c

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00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_q15_to_q7.c
00009 *
00010 * Description:  Converts the elements of the Q15 vector to Q7 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00060 void arm_q15_to_q7(
00061   q15_t * pSrc,
00062   q7_t * pDst,
00063   uint32_t blockSize)
00064 {
00065   q15_t *pIn = pSrc;                             /* Src pointer */
00066   uint32_t blkCnt;                               /* loop counter */
00067
00068 #ifndef ARM_MATH_CM0
00069
00070   /* Run the below code for Cortex-M4 and Cortex-M3 */
00071
00072   /*loop Unrolling */
00073   blkCnt = blockSize >> 2u;
00074
00075   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00076    ** a second loop below computes the remaining 1 to 3 samples. */
00077   while(blkCnt > 0u)
00078   {
00079     /* C = (q7_t) A >> 8 */
00080     /* convert from q15 to q7 and then store the results in the destination buffer */
00081     *pDst++ = (q7_t) (*pIn++ >> 8);
00082     *pDst++ = (q7_t) (*pIn++ >> 8);
00083     *pDst++ = (q7_t) (*pIn++ >> 8);
00084     *pDst++ = (q7_t) (*pIn++ >> 8);
00085
00086     /* Decrement the loop counter */
00087     blkCnt--;
00088   }
00089
00090   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00091    ** No loop unrolling is used. */
00092   blkCnt = blockSize % 0x4u;
00093
00094 #else
00095
00096   /* Run the below code for Cortex-M0 */
00097
00098   /* Loop over blockSize number of values */
00099   blkCnt = blockSize;
00100
00101 #endif /* #ifndef ARM_MATH_CM0 */
00102
00103   while(blkCnt > 0u)
00104   {
00105     /* C = (q7_t) A >> 8 */
00106     /* convert from q15 to q7 and then store the results in the destination buffer */
00107     *pDst++ = (q7_t) (*pIn++ >> 8);
00108
00109     /* Decrement the loop counter */
00110     blkCnt--;
00111   }
00112
00113 }
00114
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CMSIS DSP Software Library: arm_q15_to_q31.c File Reference

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arm_q15_to_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_q15_to_q31 (q15_t *pSrc, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_q15_to_q31.c Source File

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arm_q15_to_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_q15_to_q31.c
00009 *
00010 * Description:  Converts the elements of the Q15 vector to Q31 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00059 void arm_q15_to_q31(
00060   q15_t * pSrc,
00061   q31_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   q15_t *pIn = pSrc;                             /* Src pointer */
00065   uint32_t blkCnt;                               /* loop counter */
00066
00067 #ifndef ARM_MATH_CM0
00068
00069   /* Run the below code for Cortex-M4 and Cortex-M3 */
00070
00071   /*loop Unrolling */
00072   blkCnt = blockSize >> 2u;
00073
00074   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00075    ** a second loop below computes the remaining 1 to 3 samples. */
00076   while(blkCnt > 0u)
00077   {
00078     /* C = (q31_t)A << 16 */
00079     /* convert from q15 to q31 and then store the results in the destination buffer */
00080     *pDst++ = (q31_t) * pIn++ << 16;
00081     *pDst++ = (q31_t) * pIn++ << 16;
00082     *pDst++ = (q31_t) * pIn++ << 16;
00083     *pDst++ = (q31_t) * pIn++ << 16;
00084
00085     /* Decrement the loop counter */
00086     blkCnt--;
00087   }
00088
00089   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00090    ** No loop unrolling is used. */
00091   blkCnt = blockSize % 0x4u;
00092
00093 #else
00094
00095   /* Run the below code for Cortex-M0 */
00096
00097   /* Loop over blockSize number of values */
00098   blkCnt = blockSize;
00099
00100 #endif /* #ifndef ARM_MATH_CM0 */
00101
00102   while(blkCnt > 0u)
00103   {
00104     /* C = (q31_t)A << 16 */
00105     /* convert from q15 to q31 and then store the results in the destination buffer */
00106     *pDst++ = (q31_t) * pIn++ << 16;
00107
00108     /* Decrement the loop counter */
00109     blkCnt--;
00110   }
00111
00112 }
00113
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CMSIS DSP Software Library: arm_q31_to_float.c File Reference

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arm_q31_to_float.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_q31_to_float (q31_t *pSrc, float32_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_q31_to_float.c Source File

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arm_q31_to_float.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_q31_to_float.c
00009 *
00010 * Description:  Converts the elements of the Q31 vector to floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00063 void arm_q31_to_float(
00064   q31_t * pSrc,
00065   float32_t * pDst,
00066   uint32_t blockSize)
00067 {
00068   q31_t *pIn = pSrc;                             /* Src pointer */
00069   uint32_t blkCnt;                               /* loop counter */
00070
00071
00072 #ifndef ARM_MATH_CM0
00073
00074   /* Run the below code for Cortex-M4 and Cortex-M3 */
00075
00076   /*loop Unrolling */
00077   blkCnt = blockSize >> 2u;
00078
00079   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00080    ** a second loop below computes the remaining 1 to 3 samples. */
00081   while(blkCnt > 0u)
00082   {
00083     /* C = (float32_t) A / 2147483648 */
00084     /* convert from q31 to float and then store the results in the destination buffer */
00085     *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
00086     *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
00087     *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
00088     *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
00089
00090     /* Decrement the loop counter */
00091     blkCnt--;
00092   }
00093
00094   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00095    ** No loop unrolling is used. */
00096   blkCnt = blockSize % 0x4u;
00097
00098 #else
00099
00100   /* Run the below code for Cortex-M0 */
00101
00102   /* Loop over blockSize number of values */
00103   blkCnt = blockSize;
00104
00105 #endif /* #ifndef ARM_MATH_CM0 */
00106
00107   while(blkCnt > 0u)
00108   {
00109     /* C = (float32_t) A / 2147483648 */
00110     /* convert from q31 to float and then store the results in the destination buffer */
00111     *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
00112
00113     /* Decrement the loop counter */
00114     blkCnt--;
00115   }
00116 }
00117
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CMSIS DSP Software Library: arm_q31_to_q7.c File Reference

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arm_q31_to_q7.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_q31_to_q7 (q31_t *pSrc, q7_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_q31_to_q7.c Source File

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arm_q31_to_q7.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_q31_to_q7.c
00009 *
00010 * Description:  Converts the elements of the Q31 vector to Q7 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00059 void arm_q31_to_q7(
00060   q31_t * pSrc,
00061   q7_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   q31_t *pIn = pSrc;                             /* Src pointer */
00065   uint32_t blkCnt;                               /* loop counter */
00066
00067 #ifndef ARM_MATH_CM0
00068
00069   /* Run the below code for Cortex-M4 and Cortex-M3 */
00070
00071   /*loop Unrolling */
00072   blkCnt = blockSize >> 2u;
00073
00074   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00075    ** a second loop below computes the remaining 1 to 3 samples. */
00076   while(blkCnt > 0u)
00077   {
00078     /* C = (q7_t) A >> 24 */
00079     /* convert from q31 to q7 and then store the results in the destination buffer */
00080     *pDst++ = (q7_t) (*pIn++ >> 24);
00081     *pDst++ = (q7_t) (*pIn++ >> 24);
00082     *pDst++ = (q7_t) (*pIn++ >> 24);
00083     *pDst++ = (q7_t) (*pIn++ >> 24);
00084
00085     /* Decrement the loop counter */
00086     blkCnt--;
00087   }
00088
00089   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00090    ** No loop unrolling is used. */
00091   blkCnt = blockSize % 0x4u;
00092
00093 #else
00094
00095   /* Run the below code for Cortex-M0 */
00096
00097   /* Loop over blockSize number of values */
00098   blkCnt = blockSize;
00099
00100 #endif /* #ifndef ARM_MATH_CM0 */
00101
00102   while(blkCnt > 0u)
00103   {
00104     /* C = (q7_t) A >> 24 */
00105     /* convert from q31 to q7 and then store the results in the destination buffer */
00106     *pDst++ = (q7_t) (*pIn++ >> 24);
00107
00108     /* Decrement the loop counter */
00109     blkCnt--;
00110   }
00111
00112 }
00113
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CMSIS DSP Software Library: arm_q31_to_q15.c File Reference

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arm_q31_to_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_q31_to_q15 (q31_t *pSrc, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_q31_to_q15.c Source File

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arm_q31_to_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_q31_to_q15.c
00009 *
00010 * Description:  Converts the elements of the Q31 vector to Q15 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00059 void arm_q31_to_q15(
00060   q31_t * pSrc,
00061   q15_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   q31_t *pIn = pSrc;                             /* Src pointer */
00065   uint32_t blkCnt;                               /* loop counter */
00066
00067 #ifndef ARM_MATH_CM0
00068
00069   /* Run the below code for Cortex-M4 and Cortex-M3 */
00070
00071   /*loop Unrolling */
00072   blkCnt = blockSize >> 2u;
00073
00074   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00075    ** a second loop below computes the remaining 1 to 3 samples. */
00076   while(blkCnt > 0u)
00077   {
00078     /* C = (q15_t) A >> 16 */
00079     /* convert from q31 to q15 and then store the results in the destination buffer */
00080     *pDst++ = (q15_t) (*pIn++ >> 16);
00081     *pDst++ = (q15_t) (*pIn++ >> 16);
00082     *pDst++ = (q15_t) (*pIn++ >> 16);
00083     *pDst++ = (q15_t) (*pIn++ >> 16);
00084
00085     /* Decrement the loop counter */
00086     blkCnt--;
00087   }
00088
00089   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00090    ** No loop unrolling is used. */
00091   blkCnt = blockSize % 0x4u;
00092
00093 #else
00094
00095   /* Run the below code for Cortex-M0 */
00096
00097   /* Loop over blockSize number of values */
00098   blkCnt = blockSize;
00099
00100 #endif /* #ifndef ARM_MATH_CM0 */
00101
00102   while(blkCnt > 0u)
00103   {
00104     /* C = (q15_t) A >> 16 */
00105     /* convert from q31 to q15 and then store the results in the destination buffer */
00106     *pDst++ = (q15_t) (*pIn++ >> 16);
00107
00108     /* Decrement the loop counter */
00109     blkCnt--;
00110   }
00111
00112 }
00113
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CMSIS DSP Software Library: arm_rfft_f32.c File Reference

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arm_rfft_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void | arm_split_rfft_f32 (float32_t *pSrc, uint32_t fftLen, float32_t *pATable, float32_t *pBTable, float32_t *pDst, uint32_t modifier)
void | arm_split_rifft_f32 (float32_t *pSrc, uint32_t fftLen, float32_t *pATable, float32_t *pBTable, float32_t *pDst, uint32_t modifier)
void | arm_rfft_f32 (const arm_rfft_instance_f32 *S, float32_t *pSrc, float32_t *pDst)

Function Documentation

void arm_split_rfft_f32 | ( | float32_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | float32_t * | pATable,
 |  | float32_t * | pBTable,
 |  | float32_t * | pDst,
 |  | uint32_t | modifier
 | ) |  |

Core Real FFT process.

end of RFFT_RIFFT group

Parameters:
[in] | *pSrc | points to the input buffer.
[in] | fftLen | length of FFT.
[in] | *pATable | points to the twiddle Coef A buffer.
[in] | *pBTable | points to the twiddle Coef B buffer.
[out] | *pDst | points to the output buffer.
[in] | modifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 218 of file arm_rfft_f32.c.

void arm_split_rifft_f32 | ( | float32_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | float32_t * | pATable,
 |  | float32_t * | pBTable,
 |  | float32_t * | pDst,
 |  | uint32_t | modifier
 | ) |  |

Core Real IFFT process.

Parameters:
[in] | *pSrc | points to the input buffer.
[in] | fftLen | length of FFT.
[in] | *pATable | points to the twiddle Coef A buffer.
[in] | *pBTable | points to the twiddle Coef B buffer.
[out] | *pDst | points to the output buffer.
[in] | modifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 316 of file arm_rfft_f32.c.

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CMSIS DSP Software Library: arm_rfft_f32.c Source File

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arm_rfft_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_rfft_f32.c
00009 *
00010 * Description:  RFFT & RIFFT Floating point process function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00118 /*--------------------------------------------------------------------
00119  *      Internal functions prototypes
00120  *--------------------------------------------------------------------*/
00121
00122 void arm_split_rfft_f32(
00123   float32_t * pSrc,
00124   uint32_t fftLen,
00125   float32_t * pATable,
00126   float32_t * pBTable,
00127   float32_t * pDst,
00128   uint32_t modifier);
00129 void arm_split_rifft_f32(
00130   float32_t * pSrc,
00131   uint32_t fftLen,
00132   float32_t * pATable,
00133   float32_t * pBTable,
00134   float32_t * pDst,
00135   uint32_t modifier);
00136
00150 void arm_rfft_f32(
00151   const arm_rfft_instance_f32 * S,
00152   float32_t * pSrc,
00153   float32_t * pDst)
00154 {
00155   const arm_cfft_radix4_instance_f32 *S_CFFT = S->pCfft;
00156
00157
00158   /* Calculation of Real IFFT of input */
00159   if(S->ifftFlagR == 1u)
00160   {
00161     /*  Real IFFT core process */
00162     arm_split_rifft_f32(pSrc, S->fftLenBy2, S->pTwiddleAReal,
00163                         S->pTwiddleBReal, pDst, S->twidCoefRModifier);
00164
00165
00166     /* Complex radix-4 IFFT process */
00167     arm_radix4_butterfly_inverse_f32(pDst, S_CFFT->fftLen,
00168                                      S_CFFT->pTwiddle,
00169                                      S_CFFT->twidCoefModifier,
00170                                      S_CFFT->onebyfftLen);
00171
00172     /* Bit reversal process */
00173     if(S->bitReverseFlagR == 1u)
00174     {
00175       arm_bitreversal_f32(pDst, S_CFFT->fftLen,
00176                           S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
00177     }
00178   }
00179   else
00180   {
00181
00182     /* Calculation of RFFT of input */
00183
00184     /* Complex radix-4 FFT process */
00185     arm_radix4_butterfly_f32(pSrc, S_CFFT->fftLen,
00186                              S_CFFT->pTwiddle, S_CFFT->twidCoefModifier);
00187
00188     /* Bit reversal process */
00189     if(S->bitReverseFlagR == 1u)
00190     {
00191       arm_bitreversal_f32(pSrc, S_CFFT->fftLen,
00192                           S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
00193     }
00194
00195
00196     /*  Real FFT core process */
00197     arm_split_rfft_f32(pSrc, S->fftLenBy2, S->pTwiddleAReal,
00198                        S->pTwiddleBReal, pDst, S->twidCoefRModifier);
00199   }
00200
00201 }
00202
00218 void arm_split_rfft_f32(
00219   float32_t * pSrc,
00220   uint32_t fftLen,
00221   float32_t * pATable,
00222   float32_t * pBTable,
00223   float32_t * pDst,
00224   uint32_t modifier)
00225 {
00226   uint32_t i;                                    /* Loop Counter */
00227   float32_t outR, outI;                          /* Temporary variables for output */
00228   float32_t *pCoefA, *pCoefB;                    /* Temporary pointers for twiddle factors */
00229   float32_t CoefA1, CoefA2, CoefB1;              /* Temporary variables for twiddle coefficients */
00230   float32_t *pDst1 = &pDst[2], *pDst2 = &pDst[(4u * fftLen) - 1u];      /* temp pointers for output buffer */
00231   float32_t *pSrc1 = &pSrc[2], *pSrc2 = &pSrc[(2u * fftLen) - 1u];      /* temp pointers for input buffer */
00232
00233
00234   pSrc[2u * fftLen] = pSrc[0];
00235   pSrc[(2u * fftLen) + 1u] = pSrc[1];
00236
00237   /* Init coefficient pointers */
00238   pCoefA = &pATable[modifier * 2u];
00239   pCoefB = &pBTable[modifier * 2u];
00240
00241   i = fftLen - 1u;
00242
00243   while(i > 0u)
00244   {
00245     /*
00246        outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]
00247        + pSrc[2 * n - 2 * i] * pBTable[2 * i] +
00248        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
00249      */
00250
00251     /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +
00252        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
00253        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
00254
00255     /* read pATable[2 * i] */
00256     CoefA1 = *pCoefA++;
00257     /* pATable[2 * i + 1] */
00258     CoefA2 = *pCoefA;
00259
00260     /* pSrc[2 * i] * pATable[2 * i] */
00261     outR = *pSrc1 * CoefA1;
00262     /* pSrc[2 * i] * CoefA2 */
00263     outI = *pSrc1++ * CoefA2;
00264
00265     /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */
00266     outR -= (*pSrc1 + *pSrc2) * CoefA2;
00267     /* pSrc[2 * i + 1] * CoefA1 */
00268     outI += *pSrc1++ * CoefA1;
00269
00270     CoefB1 = *pCoefB;
00271
00272     /* pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */
00273     outI -= *pSrc2-- * CoefB1;
00274     /* pSrc[2 * fftLen - 2 * i] * CoefA2 */
00275     outI -= *pSrc2 * CoefA2;
00276
00277     /* pSrc[2 * fftLen - 2 * i] * CoefB1 */
00278     outR += *pSrc2-- * CoefB1;
00279
00280     /* write output */
00281     *pDst1++ = outR;
00282     *pDst1++ = outI;
00283
00284     /* write complex conjugate output */
00285     *pDst2-- = -outI;
00286     *pDst2-- = outR;
00287
00288     /* update coefficient pointer */
00289     pCoefB = pCoefB + (modifier * 2u);
00290     pCoefA = pCoefA + ((modifier * 2u) - 1u);
00291
00292     i--;
00293
00294   }
00295
00296   pDst[2u * fftLen] = pSrc[0] - pSrc[1];
00297   pDst[(2u * fftLen) + 1u] = 0.0f;
00298
00299   pDst[0] = pSrc[0] + pSrc[1];
00300   pDst[1] = 0.0f;
00301
00302 }
00303
00304
00316 void arm_split_rifft_f32(
00317   float32_t * pSrc,
00318   uint32_t fftLen,
00319   float32_t * pATable,
00320   float32_t * pBTable,
00321   float32_t * pDst,
00322   uint32_t modifier)
00323 {
00324   float32_t outR, outI;                          /* Temporary variables for output */
00325   float32_t *pCoefA, *pCoefB;                    /* Temporary pointers for twiddle factors */
00326   float32_t CoefA1, CoefA2, CoefB1;              /* Temporary variables for twiddle coefficients */
00327   float32_t *pSrc1 = &pSrc[0], *pSrc2 = &pSrc[(2u * fftLen) + 1u];
00328
00329   pCoefA = &pATable[0];
00330   pCoefB = &pBTable[0];
00331
00332   while(fftLen > 0u)
00333   {
00334     /*
00335        outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
00336        pIn[2 * n - 2 * i] * pBTable[2 * i] -
00337        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
00338
00339        outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -
00340        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
00341        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
00342
00343      */
00344
00345     CoefA1 = *pCoefA++;
00346     CoefA2 = *pCoefA;
00347
00348     /* outR = (pSrc[2 * i] * CoefA1 */
00349     outR = *pSrc1 * CoefA1;
00350
00351     /* - pSrc[2 * i] * CoefA2 */
00352     outI = -(*pSrc1++) * CoefA2;
00353
00354     /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */
00355     outR += (*pSrc1 + *pSrc2) * CoefA2;
00356
00357     /* pSrc[2 * i + 1] * CoefA1 */
00358     outI += (*pSrc1++) * CoefA1;
00359
00360     CoefB1 = *pCoefB;
00361
00362     /* - pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */
00363     outI -= *pSrc2-- * CoefB1;
00364
00365     /* pSrc[2 * fftLen - 2 * i] * CoefB1 */
00366     outR += *pSrc2 * CoefB1;
00367
00368     /* pSrc[2 * fftLen - 2 * i] * CoefA2 */
00369     outI += *pSrc2-- * CoefA2;
00370
00371     /* write output */
00372     *pDst++ = outR;
00373     *pDst++ = outI;
00374
00375     /* update coefficient pointer */
00376     pCoefB = pCoefB + (modifier * 2u);
00377     pCoefA = pCoefA + ((modifier * 2u) - 1u);
00378
00379     /* Decrement loop count */
00380     fftLen--;
00381   }
00382
00383 }
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
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CMSIS DSP Software Library: arm_rfft_init_f32.c File Reference

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  • File List
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Functions | Variables

arm_rfft_init_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status | arm_rfft_init_f32 (arm_rfft_instance_f32 *S, arm_cfft_radix4_instance_f32 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)

Variables

static const float32_t | realCoefA [2048]
static const float32_t | realCoefB [2048]
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
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CMSIS DSP Software Library: arm_rfft_init_q15.c File Reference

  • Examples
  • File List
  • Globals
Functions | Variables

arm_rfft_init_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status | arm_rfft_init_q15 (arm_rfft_instance_q15 *S, arm_cfft_radix4_instance_q15 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)

Variables

static const q15_t | realCoefAQ15 [2048]
static const q15_t | realCoefBQ15 [2048]
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
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CMSIS DSP Software Library: arm_rfft_init_q15.c Source File

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  • File List
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arm_rfft_init_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_rfft_init_q15.c
00009 *
00010 * Description:  RFFT & RIFFT Q15 initialisation function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033
00034 #include "arm_math.h"
00035
00063 static const q15_t realCoefAQ15[2048] = {
00064
00065   0x4000, 0xc000, 0x3fce, 0xc000, 0x3f9b, 0xc000, 0x3f69, 0xc001,
00066   0x3f37, 0xc001, 0x3f05, 0xc002, 0x3ed2, 0xc003, 0x3ea0, 0xc004,
00067   0x3e6e, 0xc005, 0x3e3c, 0xc006, 0x3e09, 0xc008, 0x3dd7, 0xc009,
00068   0x3da5, 0xc00b, 0x3d73, 0xc00d, 0x3d40, 0xc00f, 0x3d0e, 0xc011,
00069   0x3cdc, 0xc014, 0x3caa, 0xc016, 0x3c78, 0xc019, 0x3c45, 0xc01c,
00070   0x3c13, 0xc01f, 0x3be1, 0xc022, 0x3baf, 0xc025, 0x3b7d, 0xc029,
00071   0x3b4b, 0xc02c, 0x3b19, 0xc030, 0x3ae6, 0xc034, 0x3ab4, 0xc038,
00072   0x3a82, 0xc03c, 0x3a50, 0xc041, 0x3a1e, 0xc045, 0x39ec, 0xc04a,
00073   0x39ba, 0xc04f, 0x3988, 0xc054, 0x3956, 0xc059, 0x3924, 0xc05e,
00074   0x38f2, 0xc064, 0x38c0, 0xc069, 0x388e, 0xc06f, 0x385c, 0xc075,
00075   0x382a, 0xc07b, 0x37f9, 0xc081, 0x37c7, 0xc088, 0x3795, 0xc08e,
00076   0x3763, 0xc095, 0x3731, 0xc09c, 0x36ff, 0xc0a3, 0x36ce, 0xc0aa,
00077   0x369c, 0xc0b1, 0x366a, 0xc0b9, 0x3639, 0xc0c0, 0x3607, 0xc0c8,
00078   0x35d5, 0xc0d0, 0x35a4, 0xc0d8, 0x3572, 0xc0e0, 0x3540, 0xc0e9,
00079   0x350f, 0xc0f1, 0x34dd, 0xc0fa, 0x34ac, 0xc103, 0x347b, 0xc10c,
00080   0x3449, 0xc115, 0x3418, 0xc11e, 0x33e6, 0xc128, 0x33b5, 0xc131,
00081   0x3384, 0xc13b, 0x3352, 0xc145, 0x3321, 0xc14f, 0x32f0, 0xc159,
00082   0x32bf, 0xc163, 0x328e, 0xc16e, 0x325c, 0xc178, 0x322b, 0xc183,
00083   0x31fa, 0xc18e, 0x31c9, 0xc199, 0x3198, 0xc1a4, 0x3167, 0xc1b0,
00084   0x3136, 0xc1bb, 0x3105, 0xc1c7, 0x30d5, 0xc1d3, 0x30a4, 0xc1df,
00085   0x3073, 0xc1eb, 0x3042, 0xc1f7, 0x3012, 0xc204, 0x2fe1, 0xc210,
00086   0x2fb0, 0xc21d, 0x2f80, 0xc22a, 0x2f4f, 0xc237, 0x2f1f, 0xc244,
00087   0x2eee, 0xc251, 0x2ebe, 0xc25f, 0x2e8d, 0xc26d, 0x2e5d, 0xc27a,
00088   0x2e2d, 0xc288, 0x2dfc, 0xc296, 0x2dcc, 0xc2a5, 0x2d9c, 0xc2b3,
00089   0x2d6c, 0xc2c1, 0x2d3c, 0xc2d0, 0x2d0c, 0xc2df, 0x2cdc, 0xc2ee,
00090   0x2cac, 0xc2fd, 0x2c7c, 0xc30c, 0x2c4c, 0xc31c, 0x2c1c, 0xc32b,
00091   0x2bed, 0xc33b, 0x2bbd, 0xc34b, 0x2b8d, 0xc35b, 0x2b5e, 0xc36b,
00092   0x2b2e, 0xc37b, 0x2aff, 0xc38c, 0x2acf, 0xc39c, 0x2aa0, 0xc3ad,
00093   0x2a70, 0xc3be, 0x2a41, 0xc3cf, 0x2a12, 0xc3e0, 0x29e3, 0xc3f1,
00094   0x29b4, 0xc403, 0x2984, 0xc414, 0x2955, 0xc426, 0x2926, 0xc438,
00095   0x28f7, 0xc44a, 0x28c9, 0xc45c, 0x289a, 0xc46e, 0x286b, 0xc481,
00096   0x283c, 0xc493, 0x280e, 0xc4a6, 0x27df, 0xc4b9, 0x27b1, 0xc4cc,
00097   0x2782, 0xc4df, 0x2754, 0xc4f2, 0x2725, 0xc506, 0x26f7, 0xc51a,
00098   0x26c9, 0xc52d, 0x269b, 0xc541, 0x266d, 0xc555, 0x263f, 0xc569,
00099   0x2611, 0xc57e, 0x25e3, 0xc592, 0x25b5, 0xc5a7, 0x2587, 0xc5bb,
00100   0x2559, 0xc5d0, 0x252c, 0xc5e5, 0x24fe, 0xc5fa, 0x24d0, 0xc610,
00101   0x24a3, 0xc625, 0x2476, 0xc63b, 0x2448, 0xc650, 0x241b, 0xc666,
00102   0x23ee, 0xc67c, 0x23c1, 0xc692, 0x2394, 0xc6a8, 0x2367, 0xc6bf,
00103   0x233a, 0xc6d5, 0x230d, 0xc6ec, 0x22e0, 0xc703, 0x22b3, 0xc71a,
00104   0x2287, 0xc731, 0x225a, 0xc748, 0x222d, 0xc75f, 0x2201, 0xc777,
00105   0x21d5, 0xc78f, 0x21a8, 0xc7a6, 0x217c, 0xc7be, 0x2150, 0xc7d6,
00106   0x2124, 0xc7ee, 0x20f8, 0xc807, 0x20cc, 0xc81f, 0x20a0, 0xc838,
00107   0x2074, 0xc850, 0x2049, 0xc869, 0x201d, 0xc882, 0x1ff1, 0xc89b,
00108   0x1fc6, 0xc8b5, 0x1f9b, 0xc8ce, 0x1f6f, 0xc8e8, 0x1f44, 0xc901,
00109   0x1f19, 0xc91b, 0x1eee, 0xc935, 0x1ec3, 0xc94f, 0x1e98, 0xc969,
00110   0x1e6d, 0xc983, 0x1e42, 0xc99e, 0x1e18, 0xc9b8, 0x1ded, 0xc9d3,
00111   0x1dc3, 0xc9ee, 0x1d98, 0xca09, 0x1d6e, 0xca24, 0x1d44, 0xca3f,
00112   0x1d19, 0xca5b, 0x1cef, 0xca76, 0x1cc5, 0xca92, 0x1c9b, 0xcaad,
00113   0x1c72, 0xcac9, 0x1c48, 0xcae5, 0x1c1e, 0xcb01, 0x1bf5, 0xcb1e,
00114   0x1bcb, 0xcb3a, 0x1ba2, 0xcb56, 0x1b78, 0xcb73, 0x1b4f, 0xcb90,
00115   0x1b26, 0xcbad, 0x1afd, 0xcbca, 0x1ad4, 0xcbe7, 0x1aab, 0xcc04,
00116   0x1a82, 0xcc21, 0x1a5a, 0xcc3f, 0x1a31, 0xcc5d, 0x1a08, 0xcc7a,
00117   0x19e0, 0xcc98, 0x19b8, 0xccb6, 0x198f, 0xccd4, 0x1967, 0xccf3,
00118   0x193f, 0xcd11, 0x1917, 0xcd30, 0x18ef, 0xcd4e, 0x18c8, 0xcd6d,
00119   0x18a0, 0xcd8c, 0x1878, 0xcdab, 0x1851, 0xcdca, 0x182a, 0xcde9,
00120   0x1802, 0xce08, 0x17db, 0xce28, 0x17b4, 0xce47, 0x178d, 0xce67,
00121   0x1766, 0xce87, 0x173f, 0xcea7, 0x1719, 0xcec7, 0x16f2, 0xcee7,
00122   0x16cb, 0xcf07, 0x16a5, 0xcf28, 0x167f, 0xcf48, 0x1659, 0xcf69,
00123   0x1632, 0xcf8a, 0x160c, 0xcfab, 0x15e6, 0xcfcc, 0x15c1, 0xcfed,
00124   0x159b, 0xd00e, 0x1575, 0xd030, 0x1550, 0xd051, 0x152a, 0xd073,
00125   0x1505, 0xd094, 0x14e0, 0xd0b6, 0x14bb, 0xd0d8, 0x1496, 0xd0fa,
00126   0x1471, 0xd11c, 0x144c, 0xd13e, 0x1428, 0xd161, 0x1403, 0xd183,
00127   0x13df, 0xd1a6, 0x13ba, 0xd1c9, 0x1396, 0xd1eb, 0x1372, 0xd20e,
00128   0x134e, 0xd231, 0x132a, 0xd255, 0x1306, 0xd278, 0x12e2, 0xd29b,
00129   0x12bf, 0xd2bf, 0x129b, 0xd2e2, 0x1278, 0xd306, 0x1255, 0xd32a,
00130   0x1231, 0xd34e, 0x120e, 0xd372, 0x11eb, 0xd396, 0x11c9, 0xd3ba,
00131   0x11a6, 0xd3df, 0x1183, 0xd403, 0x1161, 0xd428, 0x113e, 0xd44c,
00132   0x111c, 0xd471, 0x10fa, 0xd496, 0x10d8, 0xd4bb, 0x10b6, 0xd4e0,
00133   0x1094, 0xd505, 0x1073, 0xd52a, 0x1051, 0xd550, 0x1030, 0xd575,
00134   0x100e, 0xd59b, 0xfed, 0xd5c1, 0xfcc, 0xd5e6, 0xfab, 0xd60c,
00135   0xf8a, 0xd632, 0xf69, 0xd659, 0xf48, 0xd67f, 0xf28, 0xd6a5,
00136   0xf07, 0xd6cb, 0xee7, 0xd6f2, 0xec7, 0xd719, 0xea7, 0xd73f,
00137   0xe87, 0xd766, 0xe67, 0xd78d, 0xe47, 0xd7b4, 0xe28, 0xd7db,
00138   0xe08, 0xd802, 0xde9, 0xd82a, 0xdca, 0xd851, 0xdab, 0xd878,
00139   0xd8c, 0xd8a0, 0xd6d, 0xd8c8, 0xd4e, 0xd8ef, 0xd30, 0xd917,
00140   0xd11, 0xd93f, 0xcf3, 0xd967, 0xcd4, 0xd98f, 0xcb6, 0xd9b8,
00141   0xc98, 0xd9e0, 0xc7a, 0xda08, 0xc5d, 0xda31, 0xc3f, 0xda5a,
00142   0xc21, 0xda82, 0xc04, 0xdaab, 0xbe7, 0xdad4, 0xbca, 0xdafd,
00143   0xbad, 0xdb26, 0xb90, 0xdb4f, 0xb73, 0xdb78, 0xb56, 0xdba2,
00144   0xb3a, 0xdbcb, 0xb1e, 0xdbf5, 0xb01, 0xdc1e, 0xae5, 0xdc48,
00145   0xac9, 0xdc72, 0xaad, 0xdc9b, 0xa92, 0xdcc5, 0xa76, 0xdcef,
00146   0xa5b, 0xdd19, 0xa3f, 0xdd44, 0xa24, 0xdd6e, 0xa09, 0xdd98,
00147   0x9ee, 0xddc3, 0x9d3, 0xdded, 0x9b8, 0xde18, 0x99e, 0xde42,
00148   0x983, 0xde6d, 0x969, 0xde98, 0x94f, 0xdec3, 0x935, 0xdeee,
00149   0x91b, 0xdf19, 0x901, 0xdf44, 0x8e8, 0xdf6f, 0x8ce, 0xdf9b,
00150   0x8b5, 0xdfc6, 0x89b, 0xdff1, 0x882, 0xe01d, 0x869, 0xe049,
00151   0x850, 0xe074, 0x838, 0xe0a0, 0x81f, 0xe0cc, 0x807, 0xe0f8,
00152   0x7ee, 0xe124, 0x7d6, 0xe150, 0x7be, 0xe17c, 0x7a6, 0xe1a8,
00153   0x78f, 0xe1d5, 0x777, 0xe201, 0x75f, 0xe22d, 0x748, 0xe25a,
00154   0x731, 0xe287, 0x71a, 0xe2b3, 0x703, 0xe2e0, 0x6ec, 0xe30d,
00155   0x6d5, 0xe33a, 0x6bf, 0xe367, 0x6a8, 0xe394, 0x692, 0xe3c1,
00156   0x67c, 0xe3ee, 0x666, 0xe41b, 0x650, 0xe448, 0x63b, 0xe476,
00157   0x625, 0xe4a3, 0x610, 0xe4d0, 0x5fa, 0xe4fe, 0x5e5, 0xe52c,
00158   0x5d0, 0xe559, 0x5bb, 0xe587, 0x5a7, 0xe5b5, 0x592, 0xe5e3,
00159   0x57e, 0xe611, 0x569, 0xe63f, 0x555, 0xe66d, 0x541, 0xe69b,
00160   0x52d, 0xe6c9, 0x51a, 0xe6f7, 0x506, 0xe725, 0x4f2, 0xe754,
00161   0x4df, 0xe782, 0x4cc, 0xe7b1, 0x4b9, 0xe7df, 0x4a6, 0xe80e,
00162   0x493, 0xe83c, 0x481, 0xe86b, 0x46e, 0xe89a, 0x45c, 0xe8c9,
00163   0x44a, 0xe8f7, 0x438, 0xe926, 0x426, 0xe955, 0x414, 0xe984,
00164   0x403, 0xe9b4, 0x3f1, 0xe9e3, 0x3e0, 0xea12, 0x3cf, 0xea41,
00165   0x3be, 0xea70, 0x3ad, 0xeaa0, 0x39c, 0xeacf, 0x38c, 0xeaff,
00166   0x37b, 0xeb2e, 0x36b, 0xeb5e, 0x35b, 0xeb8d, 0x34b, 0xebbd,
00167   0x33b, 0xebed, 0x32b, 0xec1c, 0x31c, 0xec4c, 0x30c, 0xec7c,
00168   0x2fd, 0xecac, 0x2ee, 0xecdc, 0x2df, 0xed0c, 0x2d0, 0xed3c,
00169   0x2c1, 0xed6c, 0x2b3, 0xed9c, 0x2a5, 0xedcc, 0x296, 0xedfc,
00170   0x288, 0xee2d, 0x27a, 0xee5d, 0x26d, 0xee8d, 0x25f, 0xeebe,
00171   0x251, 0xeeee, 0x244, 0xef1f, 0x237, 0xef4f, 0x22a, 0xef80,
00172   0x21d, 0xefb0, 0x210, 0xefe1, 0x204, 0xf012, 0x1f7, 0xf042,
00173   0x1eb, 0xf073, 0x1df, 0xf0a4, 0x1d3, 0xf0d5, 0x1c7, 0xf105,
00174   0x1bb, 0xf136, 0x1b0, 0xf167, 0x1a4, 0xf198, 0x199, 0xf1c9,
00175   0x18e, 0xf1fa, 0x183, 0xf22b, 0x178, 0xf25c, 0x16e, 0xf28e,
00176   0x163, 0xf2bf, 0x159, 0xf2f0, 0x14f, 0xf321, 0x145, 0xf352,
00177   0x13b, 0xf384, 0x131, 0xf3b5, 0x128, 0xf3e6, 0x11e, 0xf418,
00178   0x115, 0xf449, 0x10c, 0xf47b, 0x103, 0xf4ac, 0xfa, 0xf4dd,
00179   0xf1, 0xf50f, 0xe9, 0xf540, 0xe0, 0xf572, 0xd8, 0xf5a4,
00180   0xd0, 0xf5d5, 0xc8, 0xf607, 0xc0, 0xf639, 0xb9, 0xf66a,
00181   0xb1, 0xf69c, 0xaa, 0xf6ce, 0xa3, 0xf6ff, 0x9c, 0xf731,
00182   0x95, 0xf763, 0x8e, 0xf795, 0x88, 0xf7c7, 0x81, 0xf7f9,
00183   0x7b, 0xf82a, 0x75, 0xf85c, 0x6f, 0xf88e, 0x69, 0xf8c0,
00184   0x64, 0xf8f2, 0x5e, 0xf924, 0x59, 0xf956, 0x54, 0xf988,
00185   0x4f, 0xf9ba, 0x4a, 0xf9ec, 0x45, 0xfa1e, 0x41, 0xfa50,
00186   0x3c, 0xfa82, 0x38, 0xfab4, 0x34, 0xfae6, 0x30, 0xfb19,
00187   0x2c, 0xfb4b, 0x29, 0xfb7d, 0x25, 0xfbaf, 0x22, 0xfbe1,
00188   0x1f, 0xfc13, 0x1c, 0xfc45, 0x19, 0xfc78, 0x16, 0xfcaa,
00189   0x14, 0xfcdc, 0x11, 0xfd0e, 0xf, 0xfd40, 0xd, 0xfd73,
00190   0xb, 0xfda5, 0x9, 0xfdd7, 0x8, 0xfe09, 0x6, 0xfe3c,
00191   0x5, 0xfe6e, 0x4, 0xfea0, 0x3, 0xfed2, 0x2, 0xff05,
00192   0x1, 0xff37, 0x1, 0xff69, 0x0, 0xff9b, 0x0, 0xffce,
00193   0x0, 0x0, 0x0, 0x32, 0x0, 0x65, 0x1, 0x97,
00194   0x1, 0xc9, 0x2, 0xfb, 0x3, 0x12e, 0x4, 0x160,
00195   0x5, 0x192, 0x6, 0x1c4, 0x8, 0x1f7, 0x9, 0x229,
00196   0xb, 0x25b, 0xd, 0x28d, 0xf, 0x2c0, 0x11, 0x2f2,
00197   0x14, 0x324, 0x16, 0x356, 0x19, 0x388, 0x1c, 0x3bb,
00198   0x1f, 0x3ed, 0x22, 0x41f, 0x25, 0x451, 0x29, 0x483,
00199   0x2c, 0x4b5, 0x30, 0x4e7, 0x34, 0x51a, 0x38, 0x54c,
00200   0x3c, 0x57e, 0x41, 0x5b0, 0x45, 0x5e2, 0x4a, 0x614,
00201   0x4f, 0x646, 0x54, 0x678, 0x59, 0x6aa, 0x5e, 0x6dc,
00202   0x64, 0x70e, 0x69, 0x740, 0x6f, 0x772, 0x75, 0x7a4,
00203   0x7b, 0x7d6, 0x81, 0x807, 0x88, 0x839, 0x8e, 0x86b,
00204   0x95, 0x89d, 0x9c, 0x8cf, 0xa3, 0x901, 0xaa, 0x932,
00205   0xb1, 0x964, 0xb9, 0x996, 0xc0, 0x9c7, 0xc8, 0x9f9,
00206   0xd0, 0xa2b, 0xd8, 0xa5c, 0xe0, 0xa8e, 0xe9, 0xac0,
00207   0xf1, 0xaf1, 0xfa, 0xb23, 0x103, 0xb54, 0x10c, 0xb85,
00208   0x115, 0xbb7, 0x11e, 0xbe8, 0x128, 0xc1a, 0x131, 0xc4b,
00209   0x13b, 0xc7c, 0x145, 0xcae, 0x14f, 0xcdf, 0x159, 0xd10,
00210   0x163, 0xd41, 0x16e, 0xd72, 0x178, 0xda4, 0x183, 0xdd5,
00211   0x18e, 0xe06, 0x199, 0xe37, 0x1a4, 0xe68, 0x1b0, 0xe99,
00212   0x1bb, 0xeca, 0x1c7, 0xefb, 0x1d3, 0xf2b, 0x1df, 0xf5c,
00213   0x1eb, 0xf8d, 0x1f7, 0xfbe, 0x204, 0xfee, 0x210, 0x101f,
00214   0x21d, 0x1050, 0x22a, 0x1080, 0x237, 0x10b1, 0x244, 0x10e1,
00215   0x251, 0x1112, 0x25f, 0x1142, 0x26d, 0x1173, 0x27a, 0x11a3,
00216   0x288, 0x11d3, 0x296, 0x1204, 0x2a5, 0x1234, 0x2b3, 0x1264,
00217   0x2c1, 0x1294, 0x2d0, 0x12c4, 0x2df, 0x12f4, 0x2ee, 0x1324,
00218   0x2fd, 0x1354, 0x30c, 0x1384, 0x31c, 0x13b4, 0x32b, 0x13e4,
00219   0x33b, 0x1413, 0x34b, 0x1443, 0x35b, 0x1473, 0x36b, 0x14a2,
00220   0x37b, 0x14d2, 0x38c, 0x1501, 0x39c, 0x1531, 0x3ad, 0x1560,
00221   0x3be, 0x1590, 0x3cf, 0x15bf, 0x3e0, 0x15ee, 0x3f1, 0x161d,
00222   0x403, 0x164c, 0x414, 0x167c, 0x426, 0x16ab, 0x438, 0x16da,
00223   0x44a, 0x1709, 0x45c, 0x1737, 0x46e, 0x1766, 0x481, 0x1795,
00224   0x493, 0x17c4, 0x4a6, 0x17f2, 0x4b9, 0x1821, 0x4cc, 0x184f,
00225   0x4df, 0x187e, 0x4f2, 0x18ac, 0x506, 0x18db, 0x51a, 0x1909,
00226   0x52d, 0x1937, 0x541, 0x1965, 0x555, 0x1993, 0x569, 0x19c1,
00227   0x57e, 0x19ef, 0x592, 0x1a1d, 0x5a7, 0x1a4b, 0x5bb, 0x1a79,
00228   0x5d0, 0x1aa7, 0x5e5, 0x1ad4, 0x5fa, 0x1b02, 0x610, 0x1b30,
00229   0x625, 0x1b5d, 0x63b, 0x1b8a, 0x650, 0x1bb8, 0x666, 0x1be5,
00230   0x67c, 0x1c12, 0x692, 0x1c3f, 0x6a8, 0x1c6c, 0x6bf, 0x1c99,
00231   0x6d5, 0x1cc6, 0x6ec, 0x1cf3, 0x703, 0x1d20, 0x71a, 0x1d4d,
00232   0x731, 0x1d79, 0x748, 0x1da6, 0x75f, 0x1dd3, 0x777, 0x1dff,
00233   0x78f, 0x1e2b, 0x7a6, 0x1e58, 0x7be, 0x1e84, 0x7d6, 0x1eb0,
00234   0x7ee, 0x1edc, 0x807, 0x1f08, 0x81f, 0x1f34, 0x838, 0x1f60,
00235   0x850, 0x1f8c, 0x869, 0x1fb7, 0x882, 0x1fe3, 0x89b, 0x200f,
00236   0x8b5, 0x203a, 0x8ce, 0x2065, 0x8e8, 0x2091, 0x901, 0x20bc,
00237   0x91b, 0x20e7, 0x935, 0x2112, 0x94f, 0x213d, 0x969, 0x2168,
00238   0x983, 0x2193, 0x99e, 0x21be, 0x9b8, 0x21e8, 0x9d3, 0x2213,
00239   0x9ee, 0x223d, 0xa09, 0x2268, 0xa24, 0x2292, 0xa3f, 0x22bc,
00240   0xa5b, 0x22e7, 0xa76, 0x2311, 0xa92, 0x233b, 0xaad, 0x2365,
00241   0xac9, 0x238e, 0xae5, 0x23b8, 0xb01, 0x23e2, 0xb1e, 0x240b,
00242   0xb3a, 0x2435, 0xb56, 0x245e, 0xb73, 0x2488, 0xb90, 0x24b1,
00243   0xbad, 0x24da, 0xbca, 0x2503, 0xbe7, 0x252c, 0xc04, 0x2555,
00244   0xc21, 0x257e, 0xc3f, 0x25a6, 0xc5d, 0x25cf, 0xc7a, 0x25f8,
00245   0xc98, 0x2620, 0xcb6, 0x2648, 0xcd4, 0x2671, 0xcf3, 0x2699,
00246   0xd11, 0x26c1, 0xd30, 0x26e9, 0xd4e, 0x2711, 0xd6d, 0x2738,
00247   0xd8c, 0x2760, 0xdab, 0x2788, 0xdca, 0x27af, 0xde9, 0x27d6,
00248   0xe08, 0x27fe, 0xe28, 0x2825, 0xe47, 0x284c, 0xe67, 0x2873,
00249   0xe87, 0x289a, 0xea7, 0x28c1, 0xec7, 0x28e7, 0xee7, 0x290e,
00250   0xf07, 0x2935, 0xf28, 0x295b, 0xf48, 0x2981, 0xf69, 0x29a7,
00251   0xf8a, 0x29ce, 0xfab, 0x29f4, 0xfcc, 0x2a1a, 0xfed, 0x2a3f,
00252   0x100e, 0x2a65, 0x1030, 0x2a8b, 0x1051, 0x2ab0, 0x1073, 0x2ad6,
00253   0x1094, 0x2afb, 0x10b6, 0x2b20, 0x10d8, 0x2b45, 0x10fa, 0x2b6a,
00254   0x111c, 0x2b8f, 0x113e, 0x2bb4, 0x1161, 0x2bd8, 0x1183, 0x2bfd,
00255   0x11a6, 0x2c21, 0x11c9, 0x2c46, 0x11eb, 0x2c6a, 0x120e, 0x2c8e,
00256   0x1231, 0x2cb2, 0x1255, 0x2cd6, 0x1278, 0x2cfa, 0x129b, 0x2d1e,
00257   0x12bf, 0x2d41, 0x12e2, 0x2d65, 0x1306, 0x2d88, 0x132a, 0x2dab,
00258   0x134e, 0x2dcf, 0x1372, 0x2df2, 0x1396, 0x2e15, 0x13ba, 0x2e37,
00259   0x13df, 0x2e5a, 0x1403, 0x2e7d, 0x1428, 0x2e9f, 0x144c, 0x2ec2,
00260   0x1471, 0x2ee4, 0x1496, 0x2f06, 0x14bb, 0x2f28, 0x14e0, 0x2f4a,
00261   0x1505, 0x2f6c, 0x152a, 0x2f8d, 0x1550, 0x2faf, 0x1575, 0x2fd0,
00262   0x159b, 0x2ff2, 0x15c1, 0x3013, 0x15e6, 0x3034, 0x160c, 0x3055,
00263   0x1632, 0x3076, 0x1659, 0x3097, 0x167f, 0x30b8, 0x16a5, 0x30d8,
00264   0x16cb, 0x30f9, 0x16f2, 0x3119, 0x1719, 0x3139, 0x173f, 0x3159,
00265   0x1766, 0x3179, 0x178d, 0x3199, 0x17b4, 0x31b9, 0x17db, 0x31d8,
00266   0x1802, 0x31f8, 0x182a, 0x3217, 0x1851, 0x3236, 0x1878, 0x3255,
00267   0x18a0, 0x3274, 0x18c8, 0x3293, 0x18ef, 0x32b2, 0x1917, 0x32d0,
00268   0x193f, 0x32ef, 0x1967, 0x330d, 0x198f, 0x332c, 0x19b8, 0x334a,
00269   0x19e0, 0x3368, 0x1a08, 0x3386, 0x1a31, 0x33a3, 0x1a5a, 0x33c1,
00270   0x1a82, 0x33df, 0x1aab, 0x33fc, 0x1ad4, 0x3419, 0x1afd, 0x3436,
00271   0x1b26, 0x3453, 0x1b4f, 0x3470, 0x1b78, 0x348d, 0x1ba2, 0x34aa,
00272   0x1bcb, 0x34c6, 0x1bf5, 0x34e2, 0x1c1e, 0x34ff, 0x1c48, 0x351b,
00273   0x1c72, 0x3537, 0x1c9b, 0x3553, 0x1cc5, 0x356e, 0x1cef, 0x358a,
00274   0x1d19, 0x35a5, 0x1d44, 0x35c1, 0x1d6e, 0x35dc, 0x1d98, 0x35f7,
00275   0x1dc3, 0x3612, 0x1ded, 0x362d, 0x1e18, 0x3648, 0x1e42, 0x3662,
00276   0x1e6d, 0x367d, 0x1e98, 0x3697, 0x1ec3, 0x36b1, 0x1eee, 0x36cb,
00277   0x1f19, 0x36e5, 0x1f44, 0x36ff, 0x1f6f, 0x3718, 0x1f9b, 0x3732,
00278   0x1fc6, 0x374b, 0x1ff1, 0x3765, 0x201d, 0x377e, 0x2049, 0x3797,
00279   0x2074, 0x37b0, 0x20a0, 0x37c8, 0x20cc, 0x37e1, 0x20f8, 0x37f9,
00280   0x2124, 0x3812, 0x2150, 0x382a, 0x217c, 0x3842, 0x21a8, 0x385a,
00281   0x21d5, 0x3871, 0x2201, 0x3889, 0x222d, 0x38a1, 0x225a, 0x38b8,
00282   0x2287, 0x38cf, 0x22b3, 0x38e6, 0x22e0, 0x38fd, 0x230d, 0x3914,
00283   0x233a, 0x392b, 0x2367, 0x3941, 0x2394, 0x3958, 0x23c1, 0x396e,
00284   0x23ee, 0x3984, 0x241b, 0x399a, 0x2448, 0x39b0, 0x2476, 0x39c5,
00285   0x24a3, 0x39db, 0x24d0, 0x39f0, 0x24fe, 0x3a06, 0x252c, 0x3a1b,
00286   0x2559, 0x3a30, 0x2587, 0x3a45, 0x25b5, 0x3a59, 0x25e3, 0x3a6e,
00287   0x2611, 0x3a82, 0x263f, 0x3a97, 0x266d, 0x3aab, 0x269b, 0x3abf,
00288   0x26c9, 0x3ad3, 0x26f7, 0x3ae6, 0x2725, 0x3afa, 0x2754, 0x3b0e,
00289   0x2782, 0x3b21, 0x27b1, 0x3b34, 0x27df, 0x3b47, 0x280e, 0x3b5a,
00290   0x283c, 0x3b6d, 0x286b, 0x3b7f, 0x289a, 0x3b92, 0x28c9, 0x3ba4,
00291   0x28f7, 0x3bb6, 0x2926, 0x3bc8, 0x2955, 0x3bda, 0x2984, 0x3bec,
00292   0x29b4, 0x3bfd, 0x29e3, 0x3c0f, 0x2a12, 0x3c20, 0x2a41, 0x3c31,
00293   0x2a70, 0x3c42, 0x2aa0, 0x3c53, 0x2acf, 0x3c64, 0x2aff, 0x3c74,
00294   0x2b2e, 0x3c85, 0x2b5e, 0x3c95, 0x2b8d, 0x3ca5, 0x2bbd, 0x3cb5,
00295   0x2bed, 0x3cc5, 0x2c1c, 0x3cd5, 0x2c4c, 0x3ce4, 0x2c7c, 0x3cf4,
00296   0x2cac, 0x3d03, 0x2cdc, 0x3d12, 0x2d0c, 0x3d21, 0x2d3c, 0x3d30,
00297   0x2d6c, 0x3d3f, 0x2d9c, 0x3d4d, 0x2dcc, 0x3d5b, 0x2dfc, 0x3d6a,
00298   0x2e2d, 0x3d78, 0x2e5d, 0x3d86, 0x2e8d, 0x3d93, 0x2ebe, 0x3da1,
00299   0x2eee, 0x3daf, 0x2f1f, 0x3dbc, 0x2f4f, 0x3dc9, 0x2f80, 0x3dd6,
00300   0x2fb0, 0x3de3, 0x2fe1, 0x3df0, 0x3012, 0x3dfc, 0x3042, 0x3e09,
00301   0x3073, 0x3e15, 0x30a4, 0x3e21, 0x30d5, 0x3e2d, 0x3105, 0x3e39,
00302   0x3136, 0x3e45, 0x3167, 0x3e50, 0x3198, 0x3e5c, 0x31c9, 0x3e67,
00303   0x31fa, 0x3e72, 0x322b, 0x3e7d, 0x325c, 0x3e88, 0x328e, 0x3e92,
00304   0x32bf, 0x3e9d, 0x32f0, 0x3ea7, 0x3321, 0x3eb1, 0x3352, 0x3ebb,
00305   0x3384, 0x3ec5, 0x33b5, 0x3ecf, 0x33e6, 0x3ed8, 0x3418, 0x3ee2,
00306   0x3449, 0x3eeb, 0x347b, 0x3ef4, 0x34ac, 0x3efd, 0x34dd, 0x3f06,
00307   0x350f, 0x3f0f, 0x3540, 0x3f17, 0x3572, 0x3f20, 0x35a4, 0x3f28,
00308   0x35d5, 0x3f30, 0x3607, 0x3f38, 0x3639, 0x3f40, 0x366a, 0x3f47,
00309   0x369c, 0x3f4f, 0x36ce, 0x3f56, 0x36ff, 0x3f5d, 0x3731, 0x3f64,
00310   0x3763, 0x3f6b, 0x3795, 0x3f72, 0x37c7, 0x3f78, 0x37f9, 0x3f7f,
00311   0x382a, 0x3f85, 0x385c, 0x3f8b, 0x388e, 0x3f91, 0x38c0, 0x3f97,
00312   0x38f2, 0x3f9c, 0x3924, 0x3fa2, 0x3956, 0x3fa7, 0x3988, 0x3fac,
00313   0x39ba, 0x3fb1, 0x39ec, 0x3fb6, 0x3a1e, 0x3fbb, 0x3a50, 0x3fbf,
00314   0x3a82, 0x3fc4, 0x3ab4, 0x3fc8, 0x3ae6, 0x3fcc, 0x3b19, 0x3fd0,
00315   0x3b4b, 0x3fd4, 0x3b7d, 0x3fd7, 0x3baf, 0x3fdb, 0x3be1, 0x3fde,
00316   0x3c13, 0x3fe1, 0x3c45, 0x3fe4, 0x3c78, 0x3fe7, 0x3caa, 0x3fea,
00317   0x3cdc, 0x3fec, 0x3d0e, 0x3fef, 0x3d40, 0x3ff1, 0x3d73, 0x3ff3,
00318   0x3da5, 0x3ff5, 0x3dd7, 0x3ff7, 0x3e09, 0x3ff8, 0x3e3c, 0x3ffa,
00319   0x3e6e, 0x3ffb, 0x3ea0, 0x3ffc, 0x3ed2, 0x3ffd, 0x3f05, 0x3ffe,
00320   0x3f37, 0x3fff, 0x3f69, 0x3fff, 0x3f9b, 0x4000, 0x3fce, 0x4000
00321 };
00322
00339 static const q15_t realCoefBQ15[2048] = {
00340   0x4000, 0x4000, 0x4032, 0x4000, 0x4065, 0x4000, 0x4097, 0x3fff,
00341   0x40c9, 0x3fff, 0x40fb, 0x3ffe, 0x412e, 0x3ffd, 0x4160, 0x3ffc,
00342   0x4192, 0x3ffb, 0x41c4, 0x3ffa, 0x41f7, 0x3ff8, 0x4229, 0x3ff7,
00343   0x425b, 0x3ff5, 0x428d, 0x3ff3, 0x42c0, 0x3ff1, 0x42f2, 0x3fef,
00344   0x4324, 0x3fec, 0x4356, 0x3fea, 0x4388, 0x3fe7, 0x43bb, 0x3fe4,
00345   0x43ed, 0x3fe1, 0x441f, 0x3fde, 0x4451, 0x3fdb, 0x4483, 0x3fd7,
00346   0x44b5, 0x3fd4, 0x44e7, 0x3fd0, 0x451a, 0x3fcc, 0x454c, 0x3fc8,
00347   0x457e, 0x3fc4, 0x45b0, 0x3fbf, 0x45e2, 0x3fbb, 0x4614, 0x3fb6,
00348   0x4646, 0x3fb1, 0x4678, 0x3fac, 0x46aa, 0x3fa7, 0x46dc, 0x3fa2,
00349   0x470e, 0x3f9c, 0x4740, 0x3f97, 0x4772, 0x3f91, 0x47a4, 0x3f8b,
00350   0x47d6, 0x3f85, 0x4807, 0x3f7f, 0x4839, 0x3f78, 0x486b, 0x3f72,
00351   0x489d, 0x3f6b, 0x48cf, 0x3f64, 0x4901, 0x3f5d, 0x4932, 0x3f56,
00352   0x4964, 0x3f4f, 0x4996, 0x3f47, 0x49c7, 0x3f40, 0x49f9, 0x3f38,
00353   0x4a2b, 0x3f30, 0x4a5c, 0x3f28, 0x4a8e, 0x3f20, 0x4ac0, 0x3f17,
00354   0x4af1, 0x3f0f, 0x4b23, 0x3f06, 0x4b54, 0x3efd, 0x4b85, 0x3ef4,
00355   0x4bb7, 0x3eeb, 0x4be8, 0x3ee2, 0x4c1a, 0x3ed8, 0x4c4b, 0x3ecf,
00356   0x4c7c, 0x3ec5, 0x4cae, 0x3ebb, 0x4cdf, 0x3eb1, 0x4d10, 0x3ea7,
00357   0x4d41, 0x3e9d, 0x4d72, 0x3e92, 0x4da4, 0x3e88, 0x4dd5, 0x3e7d,
00358   0x4e06, 0x3e72, 0x4e37, 0x3e67, 0x4e68, 0x3e5c, 0x4e99, 0x3e50,
00359   0x4eca, 0x3e45, 0x4efb, 0x3e39, 0x4f2b, 0x3e2d, 0x4f5c, 0x3e21,
00360   0x4f8d, 0x3e15, 0x4fbe, 0x3e09, 0x4fee, 0x3dfc, 0x501f, 0x3df0,
00361   0x5050, 0x3de3, 0x5080, 0x3dd6, 0x50b1, 0x3dc9, 0x50e1, 0x3dbc,
00362   0x5112, 0x3daf, 0x5142, 0x3da1, 0x5173, 0x3d93, 0x51a3, 0x3d86,
00363   0x51d3, 0x3d78, 0x5204, 0x3d6a, 0x5234, 0x3d5b, 0x5264, 0x3d4d,
00364   0x5294, 0x3d3f, 0x52c4, 0x3d30, 0x52f4, 0x3d21, 0x5324, 0x3d12,
00365   0x5354, 0x3d03, 0x5384, 0x3cf4, 0x53b4, 0x3ce4, 0x53e4, 0x3cd5,
00366   0x5413, 0x3cc5, 0x5443, 0x3cb5, 0x5473, 0x3ca5, 0x54a2, 0x3c95,
00367   0x54d2, 0x3c85, 0x5501, 0x3c74, 0x5531, 0x3c64, 0x5560, 0x3c53,
00368   0x5590, 0x3c42, 0x55bf, 0x3c31, 0x55ee, 0x3c20, 0x561d, 0x3c0f,
00369   0x564c, 0x3bfd, 0x567c, 0x3bec, 0x56ab, 0x3bda, 0x56da, 0x3bc8,
00370   0x5709, 0x3bb6, 0x5737, 0x3ba4, 0x5766, 0x3b92, 0x5795, 0x3b7f,
00371   0x57c4, 0x3b6d, 0x57f2, 0x3b5a, 0x5821, 0x3b47, 0x584f, 0x3b34,
00372   0x587e, 0x3b21, 0x58ac, 0x3b0e, 0x58db, 0x3afa, 0x5909, 0x3ae6,
00373   0x5937, 0x3ad3, 0x5965, 0x3abf, 0x5993, 0x3aab, 0x59c1, 0x3a97,
00374   0x59ef, 0x3a82, 0x5a1d, 0x3a6e, 0x5a4b, 0x3a59, 0x5a79, 0x3a45,
00375   0x5aa7, 0x3a30, 0x5ad4, 0x3a1b, 0x5b02, 0x3a06, 0x5b30, 0x39f0,
00376   0x5b5d, 0x39db, 0x5b8a, 0x39c5, 0x5bb8, 0x39b0, 0x5be5, 0x399a,
00377   0x5c12, 0x3984, 0x5c3f, 0x396e, 0x5c6c, 0x3958, 0x5c99, 0x3941,
00378   0x5cc6, 0x392b, 0x5cf3, 0x3914, 0x5d20, 0x38fd, 0x5d4d, 0x38e6,
00379   0x5d79, 0x38cf, 0x5da6, 0x38b8, 0x5dd3, 0x38a1, 0x5dff, 0x3889,
00380   0x5e2b, 0x3871, 0x5e58, 0x385a, 0x5e84, 0x3842, 0x5eb0, 0x382a,
00381   0x5edc, 0x3812, 0x5f08, 0x37f9, 0x5f34, 0x37e1, 0x5f60, 0x37c8,
00382   0x5f8c, 0x37b0, 0x5fb7, 0x3797, 0x5fe3, 0x377e, 0x600f, 0x3765,
00383   0x603a, 0x374b, 0x6065, 0x3732, 0x6091, 0x3718, 0x60bc, 0x36ff,
00384   0x60e7, 0x36e5, 0x6112, 0x36cb, 0x613d, 0x36b1, 0x6168, 0x3697,
00385   0x6193, 0x367d, 0x61be, 0x3662, 0x61e8, 0x3648, 0x6213, 0x362d,
00386   0x623d, 0x3612, 0x6268, 0x35f7, 0x6292, 0x35dc, 0x62bc, 0x35c1,
00387   0x62e7, 0x35a5, 0x6311, 0x358a, 0x633b, 0x356e, 0x6365, 0x3553,
00388   0x638e, 0x3537, 0x63b8, 0x351b, 0x63e2, 0x34ff, 0x640b, 0x34e2,
00389   0x6435, 0x34c6, 0x645e, 0x34aa, 0x6488, 0x348d, 0x64b1, 0x3470,
00390   0x64da, 0x3453, 0x6503, 0x3436, 0x652c, 0x3419, 0x6555, 0x33fc,
00391   0x657e, 0x33df, 0x65a6, 0x33c1, 0x65cf, 0x33a3, 0x65f8, 0x3386,
00392   0x6620, 0x3368, 0x6648, 0x334a, 0x6671, 0x332c, 0x6699, 0x330d,
00393   0x66c1, 0x32ef, 0x66e9, 0x32d0, 0x6711, 0x32b2, 0x6738, 0x3293,
00394   0x6760, 0x3274, 0x6788, 0x3255, 0x67af, 0x3236, 0x67d6, 0x3217,
00395   0x67fe, 0x31f8, 0x6825, 0x31d8, 0x684c, 0x31b9, 0x6873, 0x3199,
00396   0x689a, 0x3179, 0x68c1, 0x3159, 0x68e7, 0x3139, 0x690e, 0x3119,
00397   0x6935, 0x30f9, 0x695b, 0x30d8, 0x6981, 0x30b8, 0x69a7, 0x3097,
00398   0x69ce, 0x3076, 0x69f4, 0x3055, 0x6a1a, 0x3034, 0x6a3f, 0x3013,
00399   0x6a65, 0x2ff2, 0x6a8b, 0x2fd0, 0x6ab0, 0x2faf, 0x6ad6, 0x2f8d,
00400   0x6afb, 0x2f6c, 0x6b20, 0x2f4a, 0x6b45, 0x2f28, 0x6b6a, 0x2f06,
00401   0x6b8f, 0x2ee4, 0x6bb4, 0x2ec2, 0x6bd8, 0x2e9f, 0x6bfd, 0x2e7d,
00402   0x6c21, 0x2e5a, 0x6c46, 0x2e37, 0x6c6a, 0x2e15, 0x6c8e, 0x2df2,
00403   0x6cb2, 0x2dcf, 0x6cd6, 0x2dab, 0x6cfa, 0x2d88, 0x6d1e, 0x2d65,
00404   0x6d41, 0x2d41, 0x6d65, 0x2d1e, 0x6d88, 0x2cfa, 0x6dab, 0x2cd6,
00405   0x6dcf, 0x2cb2, 0x6df2, 0x2c8e, 0x6e15, 0x2c6a, 0x6e37, 0x2c46,
00406   0x6e5a, 0x2c21, 0x6e7d, 0x2bfd, 0x6e9f, 0x2bd8, 0x6ec2, 0x2bb4,
00407   0x6ee4, 0x2b8f, 0x6f06, 0x2b6a, 0x6f28, 0x2b45, 0x6f4a, 0x2b20,
00408   0x6f6c, 0x2afb, 0x6f8d, 0x2ad6, 0x6faf, 0x2ab0, 0x6fd0, 0x2a8b,
00409   0x6ff2, 0x2a65, 0x7013, 0x2a3f, 0x7034, 0x2a1a, 0x7055, 0x29f4,
00410   0x7076, 0x29ce, 0x7097, 0x29a7, 0x70b8, 0x2981, 0x70d8, 0x295b,
00411   0x70f9, 0x2935, 0x7119, 0x290e, 0x7139, 0x28e7, 0x7159, 0x28c1,
00412   0x7179, 0x289a, 0x7199, 0x2873, 0x71b9, 0x284c, 0x71d8, 0x2825,
00413   0x71f8, 0x27fe, 0x7217, 0x27d6, 0x7236, 0x27af, 0x7255, 0x2788,
00414   0x7274, 0x2760, 0x7293, 0x2738, 0x72b2, 0x2711, 0x72d0, 0x26e9,
00415   0x72ef, 0x26c1, 0x730d, 0x2699, 0x732c, 0x2671, 0x734a, 0x2648,
00416   0x7368, 0x2620, 0x7386, 0x25f8, 0x73a3, 0x25cf, 0x73c1, 0x25a6,
00417   0x73df, 0x257e, 0x73fc, 0x2555, 0x7419, 0x252c, 0x7436, 0x2503,
00418   0x7453, 0x24da, 0x7470, 0x24b1, 0x748d, 0x2488, 0x74aa, 0x245e,
00419   0x74c6, 0x2435, 0x74e2, 0x240b, 0x74ff, 0x23e2, 0x751b, 0x23b8,
00420   0x7537, 0x238e, 0x7553, 0x2365, 0x756e, 0x233b, 0x758a, 0x2311,
00421   0x75a5, 0x22e7, 0x75c1, 0x22bc, 0x75dc, 0x2292, 0x75f7, 0x2268,
00422   0x7612, 0x223d, 0x762d, 0x2213, 0x7648, 0x21e8, 0x7662, 0x21be,
00423   0x767d, 0x2193, 0x7697, 0x2168, 0x76b1, 0x213d, 0x76cb, 0x2112,
00424   0x76e5, 0x20e7, 0x76ff, 0x20bc, 0x7718, 0x2091, 0x7732, 0x2065,
00425   0x774b, 0x203a, 0x7765, 0x200f, 0x777e, 0x1fe3, 0x7797, 0x1fb7,
00426   0x77b0, 0x1f8c, 0x77c8, 0x1f60, 0x77e1, 0x1f34, 0x77f9, 0x1f08,
00427   0x7812, 0x1edc, 0x782a, 0x1eb0, 0x7842, 0x1e84, 0x785a, 0x1e58,
00428   0x7871, 0x1e2b, 0x7889, 0x1dff, 0x78a1, 0x1dd3, 0x78b8, 0x1da6,
00429   0x78cf, 0x1d79, 0x78e6, 0x1d4d, 0x78fd, 0x1d20, 0x7914, 0x1cf3,
00430   0x792b, 0x1cc6, 0x7941, 0x1c99, 0x7958, 0x1c6c, 0x796e, 0x1c3f,
00431   0x7984, 0x1c12, 0x799a, 0x1be5, 0x79b0, 0x1bb8, 0x79c5, 0x1b8a,
00432   0x79db, 0x1b5d, 0x79f0, 0x1b30, 0x7a06, 0x1b02, 0x7a1b, 0x1ad4,
00433   0x7a30, 0x1aa7, 0x7a45, 0x1a79, 0x7a59, 0x1a4b, 0x7a6e, 0x1a1d,
00434   0x7a82, 0x19ef, 0x7a97, 0x19c1, 0x7aab, 0x1993, 0x7abf, 0x1965,
00435   0x7ad3, 0x1937, 0x7ae6, 0x1909, 0x7afa, 0x18db, 0x7b0e, 0x18ac,
00436   0x7b21, 0x187e, 0x7b34, 0x184f, 0x7b47, 0x1821, 0x7b5a, 0x17f2,
00437   0x7b6d, 0x17c4, 0x7b7f, 0x1795, 0x7b92, 0x1766, 0x7ba4, 0x1737,
00438   0x7bb6, 0x1709, 0x7bc8, 0x16da, 0x7bda, 0x16ab, 0x7bec, 0x167c,
00439   0x7bfd, 0x164c, 0x7c0f, 0x161d, 0x7c20, 0x15ee, 0x7c31, 0x15bf,
00440   0x7c42, 0x1590, 0x7c53, 0x1560, 0x7c64, 0x1531, 0x7c74, 0x1501,
00441   0x7c85, 0x14d2, 0x7c95, 0x14a2, 0x7ca5, 0x1473, 0x7cb5, 0x1443,
00442   0x7cc5, 0x1413, 0x7cd5, 0x13e4, 0x7ce4, 0x13b4, 0x7cf4, 0x1384,
00443   0x7d03, 0x1354, 0x7d12, 0x1324, 0x7d21, 0x12f4, 0x7d30, 0x12c4,
00444   0x7d3f, 0x1294, 0x7d4d, 0x1264, 0x7d5b, 0x1234, 0x7d6a, 0x1204,
00445   0x7d78, 0x11d3, 0x7d86, 0x11a3, 0x7d93, 0x1173, 0x7da1, 0x1142,
00446   0x7daf, 0x1112, 0x7dbc, 0x10e1, 0x7dc9, 0x10b1, 0x7dd6, 0x1080,
00447   0x7de3, 0x1050, 0x7df0, 0x101f, 0x7dfc, 0xfee, 0x7e09, 0xfbe,
00448   0x7e15, 0xf8d, 0x7e21, 0xf5c, 0x7e2d, 0xf2b, 0x7e39, 0xefb,
00449   0x7e45, 0xeca, 0x7e50, 0xe99, 0x7e5c, 0xe68, 0x7e67, 0xe37,
00450   0x7e72, 0xe06, 0x7e7d, 0xdd5, 0x7e88, 0xda4, 0x7e92, 0xd72,
00451   0x7e9d, 0xd41, 0x7ea7, 0xd10, 0x7eb1, 0xcdf, 0x7ebb, 0xcae,
00452   0x7ec5, 0xc7c, 0x7ecf, 0xc4b, 0x7ed8, 0xc1a, 0x7ee2, 0xbe8,
00453   0x7eeb, 0xbb7, 0x7ef4, 0xb85, 0x7efd, 0xb54, 0x7f06, 0xb23,
00454   0x7f0f, 0xaf1, 0x7f17, 0xac0, 0x7f20, 0xa8e, 0x7f28, 0xa5c,
00455   0x7f30, 0xa2b, 0x7f38, 0x9f9, 0x7f40, 0x9c7, 0x7f47, 0x996,
00456   0x7f4f, 0x964, 0x7f56, 0x932, 0x7f5d, 0x901, 0x7f64, 0x8cf,
00457   0x7f6b, 0x89d, 0x7f72, 0x86b, 0x7f78, 0x839, 0x7f7f, 0x807,
00458   0x7f85, 0x7d6, 0x7f8b, 0x7a4, 0x7f91, 0x772, 0x7f97, 0x740,
00459   0x7f9c, 0x70e, 0x7fa2, 0x6dc, 0x7fa7, 0x6aa, 0x7fac, 0x678,
00460   0x7fb1, 0x646, 0x7fb6, 0x614, 0x7fbb, 0x5e2, 0x7fbf, 0x5b0,
00461   0x7fc4, 0x57e, 0x7fc8, 0x54c, 0x7fcc, 0x51a, 0x7fd0, 0x4e7,
00462   0x7fd4, 0x4b5, 0x7fd7, 0x483, 0x7fdb, 0x451, 0x7fde, 0x41f,
00463   0x7fe1, 0x3ed, 0x7fe4, 0x3bb, 0x7fe7, 0x388, 0x7fea, 0x356,
00464   0x7fec, 0x324, 0x7fef, 0x2f2, 0x7ff1, 0x2c0, 0x7ff3, 0x28d,
00465   0x7ff5, 0x25b, 0x7ff7, 0x229, 0x7ff8, 0x1f7, 0x7ffa, 0x1c4,
00466   0x7ffb, 0x192, 0x7ffc, 0x160, 0x7ffd, 0x12e, 0x7ffe, 0xfb,
00467   0x7fff, 0xc9, 0x7fff, 0x97, 0x7fff, 0x65, 0x7fff, 0x32,
00468   0x7fff, 0x0, 0x7fff, 0xffce, 0x7fff, 0xff9b, 0x7fff, 0xff69,
00469   0x7fff, 0xff37, 0x7ffe, 0xff05, 0x7ffd, 0xfed2, 0x7ffc, 0xfea0,
00470   0x7ffb, 0xfe6e, 0x7ffa, 0xfe3c, 0x7ff8, 0xfe09, 0x7ff7, 0xfdd7,
00471   0x7ff5, 0xfda5, 0x7ff3, 0xfd73, 0x7ff1, 0xfd40, 0x7fef, 0xfd0e,
00472   0x7fec, 0xfcdc, 0x7fea, 0xfcaa, 0x7fe7, 0xfc78, 0x7fe4, 0xfc45,
00473   0x7fe1, 0xfc13, 0x7fde, 0xfbe1, 0x7fdb, 0xfbaf, 0x7fd7, 0xfb7d,
00474   0x7fd4, 0xfb4b, 0x7fd0, 0xfb19, 0x7fcc, 0xfae6, 0x7fc8, 0xfab4,
00475   0x7fc4, 0xfa82, 0x7fbf, 0xfa50, 0x7fbb, 0xfa1e, 0x7fb6, 0xf9ec,
00476   0x7fb1, 0xf9ba, 0x7fac, 0xf988, 0x7fa7, 0xf956, 0x7fa2, 0xf924,
00477   0x7f9c, 0xf8f2, 0x7f97, 0xf8c0, 0x7f91, 0xf88e, 0x7f8b, 0xf85c,
00478   0x7f85, 0xf82a, 0x7f7f, 0xf7f9, 0x7f78, 0xf7c7, 0x7f72, 0xf795,
00479   0x7f6b, 0xf763, 0x7f64, 0xf731, 0x7f5d, 0xf6ff, 0x7f56, 0xf6ce,
00480   0x7f4f, 0xf69c, 0x7f47, 0xf66a, 0x7f40, 0xf639, 0x7f38, 0xf607,
00481   0x7f30, 0xf5d5, 0x7f28, 0xf5a4, 0x7f20, 0xf572, 0x7f17, 0xf540,
00482   0x7f0f, 0xf50f, 0x7f06, 0xf4dd, 0x7efd, 0xf4ac, 0x7ef4, 0xf47b,
00483   0x7eeb, 0xf449, 0x7ee2, 0xf418, 0x7ed8, 0xf3e6, 0x7ecf, 0xf3b5,
00484   0x7ec5, 0xf384, 0x7ebb, 0xf352, 0x7eb1, 0xf321, 0x7ea7, 0xf2f0,
00485   0x7e9d, 0xf2bf, 0x7e92, 0xf28e, 0x7e88, 0xf25c, 0x7e7d, 0xf22b,
00486   0x7e72, 0xf1fa, 0x7e67, 0xf1c9, 0x7e5c, 0xf198, 0x7e50, 0xf167,
00487   0x7e45, 0xf136, 0x7e39, 0xf105, 0x7e2d, 0xf0d5, 0x7e21, 0xf0a4,
00488   0x7e15, 0xf073, 0x7e09, 0xf042, 0x7dfc, 0xf012, 0x7df0, 0xefe1,
00489   0x7de3, 0xefb0, 0x7dd6, 0xef80, 0x7dc9, 0xef4f, 0x7dbc, 0xef1f,
00490   0x7daf, 0xeeee, 0x7da1, 0xeebe, 0x7d93, 0xee8d, 0x7d86, 0xee5d,
00491   0x7d78, 0xee2d, 0x7d6a, 0xedfc, 0x7d5b, 0xedcc, 0x7d4d, 0xed9c,
00492   0x7d3f, 0xed6c, 0x7d30, 0xed3c, 0x7d21, 0xed0c, 0x7d12, 0xecdc,
00493   0x7d03, 0xecac, 0x7cf4, 0xec7c, 0x7ce4, 0xec4c, 0x7cd5, 0xec1c,
00494   0x7cc5, 0xebed, 0x7cb5, 0xebbd, 0x7ca5, 0xeb8d, 0x7c95, 0xeb5e,
00495   0x7c85, 0xeb2e, 0x7c74, 0xeaff, 0x7c64, 0xeacf, 0x7c53, 0xeaa0,
00496   0x7c42, 0xea70, 0x7c31, 0xea41, 0x7c20, 0xea12, 0x7c0f, 0xe9e3,
00497   0x7bfd, 0xe9b4, 0x7bec, 0xe984, 0x7bda, 0xe955, 0x7bc8, 0xe926,
00498   0x7bb6, 0xe8f7, 0x7ba4, 0xe8c9, 0x7b92, 0xe89a, 0x7b7f, 0xe86b,
00499   0x7b6d, 0xe83c, 0x7b5a, 0xe80e, 0x7b47, 0xe7df, 0x7b34, 0xe7b1,
00500   0x7b21, 0xe782, 0x7b0e, 0xe754, 0x7afa, 0xe725, 0x7ae6, 0xe6f7,
00501   0x7ad3, 0xe6c9, 0x7abf, 0xe69b, 0x7aab, 0xe66d, 0x7a97, 0xe63f,
00502   0x7a82, 0xe611, 0x7a6e, 0xe5e3, 0x7a59, 0xe5b5, 0x7a45, 0xe587,
00503   0x7a30, 0xe559, 0x7a1b, 0xe52c, 0x7a06, 0xe4fe, 0x79f0, 0xe4d0,
00504   0x79db, 0xe4a3, 0x79c5, 0xe476, 0x79b0, 0xe448, 0x799a, 0xe41b,
00505   0x7984, 0xe3ee, 0x796e, 0xe3c1, 0x7958, 0xe394, 0x7941, 0xe367,
00506   0x792b, 0xe33a, 0x7914, 0xe30d, 0x78fd, 0xe2e0, 0x78e6, 0xe2b3,
00507   0x78cf, 0xe287, 0x78b8, 0xe25a, 0x78a1, 0xe22d, 0x7889, 0xe201,
00508   0x7871, 0xe1d5, 0x785a, 0xe1a8, 0x7842, 0xe17c, 0x782a, 0xe150,
00509   0x7812, 0xe124, 0x77f9, 0xe0f8, 0x77e1, 0xe0cc, 0x77c8, 0xe0a0,
00510   0x77b0, 0xe074, 0x7797, 0xe049, 0x777e, 0xe01d, 0x7765, 0xdff1,
00511   0x774b, 0xdfc6, 0x7732, 0xdf9b, 0x7718, 0xdf6f, 0x76ff, 0xdf44,
00512   0x76e5, 0xdf19, 0x76cb, 0xdeee, 0x76b1, 0xdec3, 0x7697, 0xde98,
00513   0x767d, 0xde6d, 0x7662, 0xde42, 0x7648, 0xde18, 0x762d, 0xdded,
00514   0x7612, 0xddc3, 0x75f7, 0xdd98, 0x75dc, 0xdd6e, 0x75c1, 0xdd44,
00515   0x75a5, 0xdd19, 0x758a, 0xdcef, 0x756e, 0xdcc5, 0x7553, 0xdc9b,
00516   0x7537, 0xdc72, 0x751b, 0xdc48, 0x74ff, 0xdc1e, 0x74e2, 0xdbf5,
00517   0x74c6, 0xdbcb, 0x74aa, 0xdba2, 0x748d, 0xdb78, 0x7470, 0xdb4f,
00518   0x7453, 0xdb26, 0x7436, 0xdafd, 0x7419, 0xdad4, 0x73fc, 0xdaab,
00519   0x73df, 0xda82, 0x73c1, 0xda5a, 0x73a3, 0xda31, 0x7386, 0xda08,
00520   0x7368, 0xd9e0, 0x734a, 0xd9b8, 0x732c, 0xd98f, 0x730d, 0xd967,
00521   0x72ef, 0xd93f, 0x72d0, 0xd917, 0x72b2, 0xd8ef, 0x7293, 0xd8c8,
00522   0x7274, 0xd8a0, 0x7255, 0xd878, 0x7236, 0xd851, 0x7217, 0xd82a,
00523   0x71f8, 0xd802, 0x71d8, 0xd7db, 0x71b9, 0xd7b4, 0x7199, 0xd78d,
00524   0x7179, 0xd766, 0x7159, 0xd73f, 0x7139, 0xd719, 0x7119, 0xd6f2,
00525   0x70f9, 0xd6cb, 0x70d8, 0xd6a5, 0x70b8, 0xd67f, 0x7097, 0xd659,
00526   0x7076, 0xd632, 0x7055, 0xd60c, 0x7034, 0xd5e6, 0x7013, 0xd5c1,
00527   0x6ff2, 0xd59b, 0x6fd0, 0xd575, 0x6faf, 0xd550, 0x6f8d, 0xd52a,
00528   0x6f6c, 0xd505, 0x6f4a, 0xd4e0, 0x6f28, 0xd4bb, 0x6f06, 0xd496,
00529   0x6ee4, 0xd471, 0x6ec2, 0xd44c, 0x6e9f, 0xd428, 0x6e7d, 0xd403,
00530   0x6e5a, 0xd3df, 0x6e37, 0xd3ba, 0x6e15, 0xd396, 0x6df2, 0xd372,
00531   0x6dcf, 0xd34e, 0x6dab, 0xd32a, 0x6d88, 0xd306, 0x6d65, 0xd2e2,
00532   0x6d41, 0xd2bf, 0x6d1e, 0xd29b, 0x6cfa, 0xd278, 0x6cd6, 0xd255,
00533   0x6cb2, 0xd231, 0x6c8e, 0xd20e, 0x6c6a, 0xd1eb, 0x6c46, 0xd1c9,
00534   0x6c21, 0xd1a6, 0x6bfd, 0xd183, 0x6bd8, 0xd161, 0x6bb4, 0xd13e,
00535   0x6b8f, 0xd11c, 0x6b6a, 0xd0fa, 0x6b45, 0xd0d8, 0x6b20, 0xd0b6,
00536   0x6afb, 0xd094, 0x6ad6, 0xd073, 0x6ab0, 0xd051, 0x6a8b, 0xd030,
00537   0x6a65, 0xd00e, 0x6a3f, 0xcfed, 0x6a1a, 0xcfcc, 0x69f4, 0xcfab,
00538   0x69ce, 0xcf8a, 0x69a7, 0xcf69, 0x6981, 0xcf48, 0x695b, 0xcf28,
00539   0x6935, 0xcf07, 0x690e, 0xcee7, 0x68e7, 0xcec7, 0x68c1, 0xcea7,
00540   0x689a, 0xce87, 0x6873, 0xce67, 0x684c, 0xce47, 0x6825, 0xce28,
00541   0x67fe, 0xce08, 0x67d6, 0xcde9, 0x67af, 0xcdca, 0x6788, 0xcdab,
00542   0x6760, 0xcd8c, 0x6738, 0xcd6d, 0x6711, 0xcd4e, 0x66e9, 0xcd30,
00543   0x66c1, 0xcd11, 0x6699, 0xccf3, 0x6671, 0xccd4, 0x6648, 0xccb6,
00544   0x6620, 0xcc98, 0x65f8, 0xcc7a, 0x65cf, 0xcc5d, 0x65a6, 0xcc3f,
00545   0x657e, 0xcc21, 0x6555, 0xcc04, 0x652c, 0xcbe7, 0x6503, 0xcbca,
00546   0x64da, 0xcbad, 0x64b1, 0xcb90, 0x6488, 0xcb73, 0x645e, 0xcb56,
00547   0x6435, 0xcb3a, 0x640b, 0xcb1e, 0x63e2, 0xcb01, 0x63b8, 0xcae5,
00548   0x638e, 0xcac9, 0x6365, 0xcaad, 0x633b, 0xca92, 0x6311, 0xca76,
00549   0x62e7, 0xca5b, 0x62bc, 0xca3f, 0x6292, 0xca24, 0x6268, 0xca09,
00550   0x623d, 0xc9ee, 0x6213, 0xc9d3, 0x61e8, 0xc9b8, 0x61be, 0xc99e,
00551   0x6193, 0xc983, 0x6168, 0xc969, 0x613d, 0xc94f, 0x6112, 0xc935,
00552   0x60e7, 0xc91b, 0x60bc, 0xc901, 0x6091, 0xc8e8, 0x6065, 0xc8ce,
00553   0x603a, 0xc8b5, 0x600f, 0xc89b, 0x5fe3, 0xc882, 0x5fb7, 0xc869,
00554   0x5f8c, 0xc850, 0x5f60, 0xc838, 0x5f34, 0xc81f, 0x5f08, 0xc807,
00555   0x5edc, 0xc7ee, 0x5eb0, 0xc7d6, 0x5e84, 0xc7be, 0x5e58, 0xc7a6,
00556   0x5e2b, 0xc78f, 0x5dff, 0xc777, 0x5dd3, 0xc75f, 0x5da6, 0xc748,
00557   0x5d79, 0xc731, 0x5d4d, 0xc71a, 0x5d20, 0xc703, 0x5cf3, 0xc6ec,
00558   0x5cc6, 0xc6d5, 0x5c99, 0xc6bf, 0x5c6c, 0xc6a8, 0x5c3f, 0xc692,
00559   0x5c12, 0xc67c, 0x5be5, 0xc666, 0x5bb8, 0xc650, 0x5b8a, 0xc63b,
00560   0x5b5d, 0xc625, 0x5b30, 0xc610, 0x5b02, 0xc5fa, 0x5ad4, 0xc5e5,
00561   0x5aa7, 0xc5d0, 0x5a79, 0xc5bb, 0x5a4b, 0xc5a7, 0x5a1d, 0xc592,
00562   0x59ef, 0xc57e, 0x59c1, 0xc569, 0x5993, 0xc555, 0x5965, 0xc541,
00563   0x5937, 0xc52d, 0x5909, 0xc51a, 0x58db, 0xc506, 0x58ac, 0xc4f2,
00564   0x587e, 0xc4df, 0x584f, 0xc4cc, 0x5821, 0xc4b9, 0x57f2, 0xc4a6,
00565   0x57c4, 0xc493, 0x5795, 0xc481, 0x5766, 0xc46e, 0x5737, 0xc45c,
00566   0x5709, 0xc44a, 0x56da, 0xc438, 0x56ab, 0xc426, 0x567c, 0xc414,
00567   0x564c, 0xc403, 0x561d, 0xc3f1, 0x55ee, 0xc3e0, 0x55bf, 0xc3cf,
00568   0x5590, 0xc3be, 0x5560, 0xc3ad, 0x5531, 0xc39c, 0x5501, 0xc38c,
00569   0x54d2, 0xc37b, 0x54a2, 0xc36b, 0x5473, 0xc35b, 0x5443, 0xc34b,
00570   0x5413, 0xc33b, 0x53e4, 0xc32b, 0x53b4, 0xc31c, 0x5384, 0xc30c,
00571   0x5354, 0xc2fd, 0x5324, 0xc2ee, 0x52f4, 0xc2df, 0x52c4, 0xc2d0,
00572   0x5294, 0xc2c1, 0x5264, 0xc2b3, 0x5234, 0xc2a5, 0x5204, 0xc296,
00573   0x51d3, 0xc288, 0x51a3, 0xc27a, 0x5173, 0xc26d, 0x5142, 0xc25f,
00574   0x5112, 0xc251, 0x50e1, 0xc244, 0x50b1, 0xc237, 0x5080, 0xc22a,
00575   0x5050, 0xc21d, 0x501f, 0xc210, 0x4fee, 0xc204, 0x4fbe, 0xc1f7,
00576   0x4f8d, 0xc1eb, 0x4f5c, 0xc1df, 0x4f2b, 0xc1d3, 0x4efb, 0xc1c7,
00577   0x4eca, 0xc1bb, 0x4e99, 0xc1b0, 0x4e68, 0xc1a4, 0x4e37, 0xc199,
00578   0x4e06, 0xc18e, 0x4dd5, 0xc183, 0x4da4, 0xc178, 0x4d72, 0xc16e,
00579   0x4d41, 0xc163, 0x4d10, 0xc159, 0x4cdf, 0xc14f, 0x4cae, 0xc145,
00580   0x4c7c, 0xc13b, 0x4c4b, 0xc131, 0x4c1a, 0xc128, 0x4be8, 0xc11e,
00581   0x4bb7, 0xc115, 0x4b85, 0xc10c, 0x4b54, 0xc103, 0x4b23, 0xc0fa,
00582   0x4af1, 0xc0f1, 0x4ac0, 0xc0e9, 0x4a8e, 0xc0e0, 0x4a5c, 0xc0d8,
00583   0x4a2b, 0xc0d0, 0x49f9, 0xc0c8, 0x49c7, 0xc0c0, 0x4996, 0xc0b9,
00584   0x4964, 0xc0b1, 0x4932, 0xc0aa, 0x4901, 0xc0a3, 0x48cf, 0xc09c,
00585   0x489d, 0xc095, 0x486b, 0xc08e, 0x4839, 0xc088, 0x4807, 0xc081,
00586   0x47d6, 0xc07b, 0x47a4, 0xc075, 0x4772, 0xc06f, 0x4740, 0xc069,
00587   0x470e, 0xc064, 0x46dc, 0xc05e, 0x46aa, 0xc059, 0x4678, 0xc054,
00588   0x4646, 0xc04f, 0x4614, 0xc04a, 0x45e2, 0xc045, 0x45b0, 0xc041,
00589   0x457e, 0xc03c, 0x454c, 0xc038, 0x451a, 0xc034, 0x44e7, 0xc030,
00590   0x44b5, 0xc02c, 0x4483, 0xc029, 0x4451, 0xc025, 0x441f, 0xc022,
00591   0x43ed, 0xc01f, 0x43bb, 0xc01c, 0x4388, 0xc019, 0x4356, 0xc016,
00592   0x4324, 0xc014, 0x42f2, 0xc011, 0x42c0, 0xc00f, 0x428d, 0xc00d,
00593   0x425b, 0xc00b, 0x4229, 0xc009, 0x41f7, 0xc008, 0x41c4, 0xc006,
00594   0x4192, 0xc005, 0x4160, 0xc004, 0x412e, 0xc003, 0x40fb, 0xc002,
00595   0x40c9, 0xc001, 0x4097, 0xc001, 0x4065, 0xc000, 0x4032, 0xc000
00596 };
00597
00620 arm_status arm_rfft_init_q15(
00621   arm_rfft_instance_q15 * S,
00622   arm_cfft_radix4_instance_q15 * S_CFFT,
00623   uint32_t fftLenReal,
00624   uint32_t ifftFlagR,
00625   uint32_t bitReverseFlag)
00626 {
00627
00628   /*  Initialise the default arm status */
00629   arm_status status = ARM_MATH_SUCCESS;
00630
00631   /*  Initialize the Real FFT length */
00632   S->fftLenReal = (uint16_t) fftLenReal;
00633
00634   /*  Initialize the Complex FFT length */
00635   S->fftLenBy2 = (uint16_t) fftLenReal / 2u;
00636
00637   /*  Initialize the Twiddle coefficientA pointer */
00638   S->pTwiddleAReal = (q15_t *) realCoefAQ15;
00639
00640   /*  Initialize the Twiddle coefficientB pointer */
00641   S->pTwiddleBReal = (q15_t *) realCoefBQ15;
00642
00643   /*  Initialize the Flag for selection of RFFT or RIFFT */
00644   S->ifftFlagR = (uint8_t) ifftFlagR;
00645
00646   /*  Initialize the Flag for calculation Bit reversal or not */
00647   S->bitReverseFlagR = (uint8_t) bitReverseFlag;
00648
00649   /*  Initialization of coef modifier depending on the FFT length */
00650   switch (S->fftLenReal)
00651   {
00652   case 2048u:
00653     S->twidCoefRModifier = 1u;
00654     break;
00655   case 512u:
00656     S->twidCoefRModifier = 4u;
00657     break;
00658   case 128u:
00659     S->twidCoefRModifier = 16u;
00660     break;
00661   default:
00662     /*  Reporting argument error if rfftSize is not valid value */
00663     status = ARM_MATH_ARGUMENT_ERROR;
00664     break;
00665   }
00666
00667   /* Init Complex FFT Instance */
00668   S->pCfft = S_CFFT;
00669
00670   if(S->ifftFlagR)
00671   {
00672     /* Initializes the CIFFT Module for fftLenreal/2 length */
00673     arm_cfft_radix4_init_q15(S->pCfft, S->fftLenBy2, 1u, 1u);
00674   }
00675   else
00676   {
00677     /* Initializes the CFFT Module for fftLenreal/2 length */
00678     arm_cfft_radix4_init_q15(S->pCfft, S->fftLenBy2, 0u, 1u);
00679   }
00680
00681   /* return the status of RFFT Init function */
00682   return (status);
00683
00684 }
00685
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CMSIS DSP Software Library: arm_rfft_init_q31.c File Reference

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  • File List
  • Globals
Functions | Variables

arm_rfft_init_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

arm_status | arm_rfft_init_q31 (arm_rfft_instance_q31 *S, arm_cfft_radix4_instance_q31 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)

Variables

const q31_t | realCoefAQ31 [1024]
const q31_t | realCoefBQ31 [1024]
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:19 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_rfft_init_q31.c Source File

  • Examples
  • File List
  • Globals

arm_rfft_init_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_rfft_init_q31.c
00009 *
00010 * Description:  RFFT & RIFFT Q31 initialisation function
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00060 const q31_t realCoefAQ31[1024] = {
00061   0x40000000, 0xc0000000, 0x3f9b783c, 0xc0004ef5,
00062   0x3f36f170, 0xc0013bd3, 0x3ed26c94, 0xc002c697,
00063   0x3e6deaa1, 0xc004ef3f, 0x3e096c8d, 0xc007b5c4,
00064   0x3da4f351, 0xc00b1a20, 0x3d407fe6, 0xc00f1c4a,
00065   0x3cdc1342, 0xc013bc39, 0x3c77ae5e, 0xc018f9e1,
00066   0x3c135231, 0xc01ed535, 0x3baeffb3, 0xc0254e27,
00067   0x3b4ab7db, 0xc02c64a6, 0x3ae67ba2, 0xc03418a2,
00068   0x3a824bfd, 0xc03c6a07, 0x3a1e29e5, 0xc04558c0,
00069   0x39ba1651, 0xc04ee4b8, 0x39561237, 0xc0590dd8,
00070   0x38f21e8e, 0xc063d405, 0x388e3c4d, 0xc06f3726,
00071   0x382a6c6a, 0xc07b371e, 0x37c6afdc, 0xc087d3d0,
00072   0x37630799, 0xc0950d1d, 0x36ff7496, 0xc0a2e2e3,
00073   0x369bf7c9, 0xc0b15502, 0x36389228, 0xc0c06355,
00074   0x35d544a7, 0xc0d00db6, 0x3572103d, 0xc0e05401,
00075   0x350ef5de, 0xc0f1360b, 0x34abf67e, 0xc102b3ac,
00076   0x34491311, 0xc114ccb9, 0x33e64c8c, 0xc1278104,
00077   0x3383a3e2, 0xc13ad060, 0x33211a07, 0xc14eba9d,
00078   0x32beafed, 0xc1633f8a, 0x325c6688, 0xc1785ef4,
00079   0x31fa3ecb, 0xc18e18a7, 0x319839a6, 0xc1a46c6e,
00080   0x3136580d, 0xc1bb5a11, 0x30d49af1, 0xc1d2e158,
00081   0x30730342, 0xc1eb0209, 0x301191f3, 0xc203bbe8,
00082   0x2fb047f2, 0xc21d0eb8, 0x2f4f2630, 0xc236fa3b,
00083   0x2eee2d9d, 0xc2517e31, 0x2e8d5f29, 0xc26c9a58,
00084   0x2e2cbbc1, 0xc2884e6e, 0x2dcc4454, 0xc2a49a2e,
00085   0x2d6bf9d1, 0xc2c17d52, 0x2d0bdd25, 0xc2def794,
00086   0x2cabef3d, 0xc2fd08a9, 0x2c4c3106, 0xc31bb049,
00087   0x2beca36c, 0xc33aee27, 0x2b8d475b, 0xc35ac1f7,
00088   0x2b2e1dbe, 0xc37b2b6a, 0x2acf277f, 0xc39c2a2f,
00089   0x2a70658a, 0xc3bdbdf6, 0x2a11d8c8, 0xc3dfe66c,
00090   0x29b38223, 0xc402a33c, 0x29556282, 0xc425f410,
00091   0x28f77acf, 0xc449d892, 0x2899cbf1, 0xc46e5069,
00092   0x283c56cf, 0xc4935b3c, 0x27df1c50, 0xc4b8f8ad,
00093   0x27821d59, 0xc4df2862, 0x27255ad1, 0xc505e9fb,
00094   0x26c8d59c, 0xc52d3d18, 0x266c8e9f, 0xc555215a,
00095   0x261086bc, 0xc57d965d, 0x25b4bed8, 0xc5a69bbe,
00096   0x255937d5, 0xc5d03118, 0x24fdf294, 0xc5fa5603,
00097   0x24a2eff6, 0xc6250a18, 0x244830dd, 0xc6504ced,
00098   0x23edb628, 0xc67c1e18, 0x239380b6, 0xc6a87d2d,
00099   0x23399167, 0xc6d569be, 0x22dfe917, 0xc702e35c,
00100   0x228688a4, 0xc730e997, 0x222d70eb, 0xc75f7bfe,
00101   0x21d4a2c8, 0xc78e9a1d, 0x217c1f15, 0xc7be4381,
00102   0x2123e6ad, 0xc7ee77b3, 0x20cbfa6a, 0xc81f363d,
00103   0x20745b24, 0xc8507ea7, 0x201d09b4, 0xc8825077,
00104   0x1fc606f1, 0xc8b4ab32, 0x1f6f53b3, 0xc8e78e5b,
00105   0x1f18f0ce, 0xc91af976, 0x1ec2df18, 0xc94eec03,
00106   0x1e6d1f65, 0xc9836582, 0x1e17b28a, 0xc9b86572,
00107   0x1dc29958, 0xc9edeb50, 0x1d6dd4a2, 0xca23f698,
00108   0x1d196538, 0xca5a86c4, 0x1cc54bec, 0xca919b4e,
00109   0x1c71898d, 0xcac933ae, 0x1c1e1ee9, 0xcb014f5b,
00110   0x1bcb0cce, 0xcb39edca, 0x1b785409, 0xcb730e70,
00111   0x1b25f566, 0xcbacb0bf, 0x1ad3f1b1, 0xcbe6d42b,
00112   0x1a8249b4, 0xcc217822, 0x1a30fe38, 0xcc5c9c14,
00113   0x19e01006, 0xcc983f70, 0x198f7fe6, 0xccd461a2,
00114   0x193f4e9e, 0xcd110216, 0x18ef7cf4, 0xcd4e2037,
00115   0x18a00bae, 0xcd8bbb6d, 0x1850fb8e, 0xcdc9d320,
00116   0x18024d59, 0xce0866b8, 0x17b401d1, 0xce47759a,
00117   0x176619b6, 0xce86ff2a, 0x171895c9, 0xcec702cb,
00118   0x16cb76c9, 0xcf077fe1, 0x167ebd74, 0xcf4875ca,
00119   0x16326a88, 0xcf89e3e8, 0x15e67ec1, 0xcfcbc999,
00120   0x159afadb, 0xd00e2639, 0x154fdf8f, 0xd050f926,
00121   0x15052d97, 0xd09441bb, 0x14bae5ab, 0xd0d7ff51,
00122   0x14710883, 0xd11c3142, 0x142796d5, 0xd160d6e5,
00123   0x13de9156, 0xd1a5ef90, 0x1395f8ba, 0xd1eb7a9a,
00124   0x134dcdb4, 0xd2317756, 0x130610f7, 0xd277e518,
00125   0x12bec333, 0xd2bec333, 0x1277e518, 0xd30610f7,
00126   0x12317756, 0xd34dcdb4, 0x11eb7a9a, 0xd395f8ba,
00127   0x11a5ef90, 0xd3de9156, 0x1160d6e5, 0xd42796d5,
00128   0x111c3142, 0xd4710883, 0x10d7ff51, 0xd4bae5ab,
00129   0x109441bb, 0xd5052d97, 0x1050f926, 0xd54fdf8f,
00130   0x100e2639, 0xd59afadb, 0xfcbc999, 0xd5e67ec1,
00131   0xf89e3e8, 0xd6326a88, 0xf4875ca, 0xd67ebd74,
00132   0xf077fe1, 0xd6cb76c9, 0xec702cb, 0xd71895c9,
00133   0xe86ff2a, 0xd76619b6, 0xe47759a, 0xd7b401d1,
00134   0xe0866b8, 0xd8024d59, 0xdc9d320, 0xd850fb8e,
00135   0xd8bbb6d, 0xd8a00bae, 0xd4e2037, 0xd8ef7cf4,
00136   0xd110216, 0xd93f4e9e, 0xcd461a2, 0xd98f7fe6,
00137   0xc983f70, 0xd9e01006, 0xc5c9c14, 0xda30fe38,
00138   0xc217822, 0xda8249b4, 0xbe6d42b, 0xdad3f1b1,
00139   0xbacb0bf, 0xdb25f566, 0xb730e70, 0xdb785409,
00140   0xb39edca, 0xdbcb0cce, 0xb014f5b, 0xdc1e1ee9,
00141   0xac933ae, 0xdc71898d, 0xa919b4e, 0xdcc54bec,
00142   0xa5a86c4, 0xdd196538, 0xa23f698, 0xdd6dd4a2,
00143   0x9edeb50, 0xddc29958, 0x9b86572, 0xde17b28a,
00144   0x9836582, 0xde6d1f65, 0x94eec03, 0xdec2df18,
00145   0x91af976, 0xdf18f0ce, 0x8e78e5b, 0xdf6f53b3,
00146   0x8b4ab32, 0xdfc606f1, 0x8825077, 0xe01d09b4,
00147   0x8507ea7, 0xe0745b24, 0x81f363d, 0xe0cbfa6a,
00148   0x7ee77b3, 0xe123e6ad, 0x7be4381, 0xe17c1f15,
00149   0x78e9a1d, 0xe1d4a2c8, 0x75f7bfe, 0xe22d70eb,
00150   0x730e997, 0xe28688a4, 0x702e35c, 0xe2dfe917,
00151   0x6d569be, 0xe3399167, 0x6a87d2d, 0xe39380b6,
00152   0x67c1e18, 0xe3edb628, 0x6504ced, 0xe44830dd,
00153   0x6250a18, 0xe4a2eff6, 0x5fa5603, 0xe4fdf294,
00154   0x5d03118, 0xe55937d5, 0x5a69bbe, 0xe5b4bed8,
00155   0x57d965d, 0xe61086bc, 0x555215a, 0xe66c8e9f,
00156   0x52d3d18, 0xe6c8d59c, 0x505e9fb, 0xe7255ad1,
00157   0x4df2862, 0xe7821d59, 0x4b8f8ad, 0xe7df1c50,
00158   0x4935b3c, 0xe83c56cf, 0x46e5069, 0xe899cbf1,
00159   0x449d892, 0xe8f77acf, 0x425f410, 0xe9556282,
00160   0x402a33c, 0xe9b38223, 0x3dfe66c, 0xea11d8c8,
00161   0x3bdbdf6, 0xea70658a, 0x39c2a2f, 0xeacf277f,
00162   0x37b2b6a, 0xeb2e1dbe, 0x35ac1f7, 0xeb8d475b,
00163   0x33aee27, 0xebeca36c, 0x31bb049, 0xec4c3106,
00164   0x2fd08a9, 0xecabef3d, 0x2def794, 0xed0bdd25,
00165   0x2c17d52, 0xed6bf9d1, 0x2a49a2e, 0xedcc4454,
00166   0x2884e6e, 0xee2cbbc1, 0x26c9a58, 0xee8d5f29,
00167   0x2517e31, 0xeeee2d9d, 0x236fa3b, 0xef4f2630,
00168   0x21d0eb8, 0xefb047f2, 0x203bbe8, 0xf01191f3,
00169   0x1eb0209, 0xf0730342, 0x1d2e158, 0xf0d49af1,
00170   0x1bb5a11, 0xf136580d, 0x1a46c6e, 0xf19839a6,
00171   0x18e18a7, 0xf1fa3ecb, 0x1785ef4, 0xf25c6688,
00172   0x1633f8a, 0xf2beafed, 0x14eba9d, 0xf3211a07,
00173   0x13ad060, 0xf383a3e2, 0x1278104, 0xf3e64c8c,
00174   0x114ccb9, 0xf4491311, 0x102b3ac, 0xf4abf67e,
00175   0xf1360b, 0xf50ef5de, 0xe05401, 0xf572103d,
00176   0xd00db6, 0xf5d544a7, 0xc06355, 0xf6389228,
00177   0xb15502, 0xf69bf7c9, 0xa2e2e3, 0xf6ff7496,
00178   0x950d1d, 0xf7630799, 0x87d3d0, 0xf7c6afdc,
00179   0x7b371e, 0xf82a6c6a, 0x6f3726, 0xf88e3c4d,
00180   0x63d405, 0xf8f21e8e, 0x590dd8, 0xf9561237,
00181   0x4ee4b8, 0xf9ba1651, 0x4558c0, 0xfa1e29e5,
00182   0x3c6a07, 0xfa824bfd, 0x3418a2, 0xfae67ba2,
00183   0x2c64a6, 0xfb4ab7db, 0x254e27, 0xfbaeffb3,
00184   0x1ed535, 0xfc135231, 0x18f9e1, 0xfc77ae5e,
00185   0x13bc39, 0xfcdc1342, 0xf1c4a, 0xfd407fe6,
00186   0xb1a20, 0xfda4f351, 0x7b5c4, 0xfe096c8d,
00187   0x4ef3f, 0xfe6deaa1, 0x2c697, 0xfed26c94,
00188   0x13bd3, 0xff36f170, 0x4ef5, 0xff9b783c,
00189   0x0, 0x0, 0x4ef5, 0x6487c4,
00190   0x13bd3, 0xc90e90, 0x2c697, 0x12d936c,
00191   0x4ef3f, 0x192155f, 0x7b5c4, 0x1f69373,
00192   0xb1a20, 0x25b0caf, 0xf1c4a, 0x2bf801a,
00193   0x13bc39, 0x323ecbe, 0x18f9e1, 0x38851a2,
00194   0x1ed535, 0x3ecadcf, 0x254e27, 0x451004d,
00195   0x2c64a6, 0x4b54825, 0x3418a2, 0x519845e,
00196   0x3c6a07, 0x57db403, 0x4558c0, 0x5e1d61b,
00197   0x4ee4b8, 0x645e9af, 0x590dd8, 0x6a9edc9,
00198   0x63d405, 0x70de172, 0x6f3726, 0x771c3b3,
00199   0x7b371e, 0x7d59396, 0x87d3d0, 0x8395024,
00200   0x950d1d, 0x89cf867, 0xa2e2e3, 0x9008b6a,
00201   0xb15502, 0x9640837, 0xc06355, 0x9c76dd8,
00202   0xd00db6, 0xa2abb59, 0xe05401, 0xa8defc3,
00203   0xf1360b, 0xaf10a22, 0x102b3ac, 0xb540982,
00204   0x114ccb9, 0xbb6ecef, 0x1278104, 0xc19b374,
00205   0x13ad060, 0xc7c5c1e, 0x14eba9d, 0xcdee5f9,
00206   0x1633f8a, 0xd415013, 0x1785ef4, 0xda39978,
00207   0x18e18a7, 0xe05c135, 0x1a46c6e, 0xe67c65a,
00208   0x1bb5a11, 0xec9a7f3, 0x1d2e158, 0xf2b650f,
00209   0x1eb0209, 0xf8cfcbe, 0x203bbe8, 0xfee6e0d,
00210   0x21d0eb8, 0x104fb80e, 0x236fa3b, 0x10b0d9d0,
00211   0x2517e31, 0x1111d263, 0x26c9a58, 0x1172a0d7,
00212   0x2884e6e, 0x11d3443f, 0x2a49a2e, 0x1233bbac,
00213   0x2c17d52, 0x1294062f, 0x2def794, 0x12f422db,
00214   0x2fd08a9, 0x135410c3, 0x31bb049, 0x13b3cefa,
00215   0x33aee27, 0x14135c94, 0x35ac1f7, 0x1472b8a5,
00216   0x37b2b6a, 0x14d1e242, 0x39c2a2f, 0x1530d881,
00217   0x3bdbdf6, 0x158f9a76, 0x3dfe66c, 0x15ee2738,
00218   0x402a33c, 0x164c7ddd, 0x425f410, 0x16aa9d7e,
00219   0x449d892, 0x17088531, 0x46e5069, 0x1766340f,
00220   0x4935b3c, 0x17c3a931, 0x4b8f8ad, 0x1820e3b0,
00221   0x4df2862, 0x187de2a7, 0x505e9fb, 0x18daa52f,
00222   0x52d3d18, 0x19372a64, 0x555215a, 0x19937161,
00223   0x57d965d, 0x19ef7944, 0x5a69bbe, 0x1a4b4128,
00224   0x5d03118, 0x1aa6c82b, 0x5fa5603, 0x1b020d6c,
00225   0x6250a18, 0x1b5d100a, 0x6504ced, 0x1bb7cf23,
00226   0x67c1e18, 0x1c1249d8, 0x6a87d2d, 0x1c6c7f4a,
00227   0x6d569be, 0x1cc66e99, 0x702e35c, 0x1d2016e9,
00228   0x730e997, 0x1d79775c, 0x75f7bfe, 0x1dd28f15,
00229   0x78e9a1d, 0x1e2b5d38, 0x7be4381, 0x1e83e0eb,
00230   0x7ee77b3, 0x1edc1953, 0x81f363d, 0x1f340596,
00231   0x8507ea7, 0x1f8ba4dc, 0x8825077, 0x1fe2f64c,
00232   0x8b4ab32, 0x2039f90f, 0x8e78e5b, 0x2090ac4d,
00233   0x91af976, 0x20e70f32, 0x94eec03, 0x213d20e8,
00234   0x9836582, 0x2192e09b, 0x9b86572, 0x21e84d76,
00235   0x9edeb50, 0x223d66a8, 0xa23f698, 0x22922b5e,
00236   0xa5a86c4, 0x22e69ac8, 0xa919b4e, 0x233ab414,
00237   0xac933ae, 0x238e7673, 0xb014f5b, 0x23e1e117,
00238   0xb39edca, 0x2434f332, 0xb730e70, 0x2487abf7,
00239   0xbacb0bf, 0x24da0a9a, 0xbe6d42b, 0x252c0e4f,
00240   0xc217822, 0x257db64c, 0xc5c9c14, 0x25cf01c8,
00241   0xc983f70, 0x261feffa, 0xcd461a2, 0x2670801a,
00242   0xd110216, 0x26c0b162, 0xd4e2037, 0x2710830c,
00243   0xd8bbb6d, 0x275ff452, 0xdc9d320, 0x27af0472,
00244   0xe0866b8, 0x27fdb2a7, 0xe47759a, 0x284bfe2f,
00245   0xe86ff2a, 0x2899e64a, 0xec702cb, 0x28e76a37,
00246   0xf077fe1, 0x29348937, 0xf4875ca, 0x2981428c,
00247   0xf89e3e8, 0x29cd9578, 0xfcbc999, 0x2a19813f,
00248   0x100e2639, 0x2a650525, 0x1050f926, 0x2ab02071,
00249   0x109441bb, 0x2afad269, 0x10d7ff51, 0x2b451a55,
00250   0x111c3142, 0x2b8ef77d, 0x1160d6e5, 0x2bd8692b,
00251   0x11a5ef90, 0x2c216eaa, 0x11eb7a9a, 0x2c6a0746,
00252   0x12317756, 0x2cb2324c, 0x1277e518, 0x2cf9ef09,
00253   0x12bec333, 0x2d413ccd, 0x130610f7, 0x2d881ae8,
00254   0x134dcdb4, 0x2dce88aa, 0x1395f8ba, 0x2e148566,
00255   0x13de9156, 0x2e5a1070, 0x142796d5, 0x2e9f291b,
00256   0x14710883, 0x2ee3cebe, 0x14bae5ab, 0x2f2800af,
00257   0x15052d97, 0x2f6bbe45, 0x154fdf8f, 0x2faf06da,
00258   0x159afadb, 0x2ff1d9c7, 0x15e67ec1, 0x30343667,
00259   0x16326a88, 0x30761c18, 0x167ebd74, 0x30b78a36,
00260   0x16cb76c9, 0x30f8801f, 0x171895c9, 0x3138fd35,
00261   0x176619b6, 0x317900d6, 0x17b401d1, 0x31b88a66,
00262   0x18024d59, 0x31f79948, 0x1850fb8e, 0x32362ce0,
00263   0x18a00bae, 0x32744493, 0x18ef7cf4, 0x32b1dfc9,
00264   0x193f4e9e, 0x32eefdea, 0x198f7fe6, 0x332b9e5e,
00265   0x19e01006, 0x3367c090, 0x1a30fe38, 0x33a363ec,
00266   0x1a8249b4, 0x33de87de, 0x1ad3f1b1, 0x34192bd5,
00267   0x1b25f566, 0x34534f41, 0x1b785409, 0x348cf190,
00268   0x1bcb0cce, 0x34c61236, 0x1c1e1ee9, 0x34feb0a5,
00269   0x1c71898d, 0x3536cc52, 0x1cc54bec, 0x356e64b2,
00270   0x1d196538, 0x35a5793c, 0x1d6dd4a2, 0x35dc0968,
00271   0x1dc29958, 0x361214b0, 0x1e17b28a, 0x36479a8e,
00272   0x1e6d1f65, 0x367c9a7e, 0x1ec2df18, 0x36b113fd,
00273   0x1f18f0ce, 0x36e5068a, 0x1f6f53b3, 0x371871a5,
00274   0x1fc606f1, 0x374b54ce, 0x201d09b4, 0x377daf89,
00275   0x20745b24, 0x37af8159, 0x20cbfa6a, 0x37e0c9c3,
00276   0x2123e6ad, 0x3811884d, 0x217c1f15, 0x3841bc7f,
00277   0x21d4a2c8, 0x387165e3, 0x222d70eb, 0x38a08402,
00278   0x228688a4, 0x38cf1669, 0x22dfe917, 0x38fd1ca4,
00279   0x23399167, 0x392a9642, 0x239380b6, 0x395782d3,
00280   0x23edb628, 0x3983e1e8, 0x244830dd, 0x39afb313,
00281   0x24a2eff6, 0x39daf5e8, 0x24fdf294, 0x3a05a9fd,
00282   0x255937d5, 0x3a2fcee8, 0x25b4bed8, 0x3a596442,
00283   0x261086bc, 0x3a8269a3, 0x266c8e9f, 0x3aaadea6,
00284   0x26c8d59c, 0x3ad2c2e8, 0x27255ad1, 0x3afa1605,
00285   0x27821d59, 0x3b20d79e, 0x27df1c50, 0x3b470753,
00286   0x283c56cf, 0x3b6ca4c4, 0x2899cbf1, 0x3b91af97,
00287   0x28f77acf, 0x3bb6276e, 0x29556282, 0x3bda0bf0,
00288   0x29b38223, 0x3bfd5cc4, 0x2a11d8c8, 0x3c201994,
00289   0x2a70658a, 0x3c42420a, 0x2acf277f, 0x3c63d5d1,
00290   0x2b2e1dbe, 0x3c84d496, 0x2b8d475b, 0x3ca53e09,
00291   0x2beca36c, 0x3cc511d9, 0x2c4c3106, 0x3ce44fb7,
00292   0x2cabef3d, 0x3d02f757, 0x2d0bdd25, 0x3d21086c,
00293   0x2d6bf9d1, 0x3d3e82ae, 0x2dcc4454, 0x3d5b65d2,
00294   0x2e2cbbc1, 0x3d77b192, 0x2e8d5f29, 0x3d9365a8,
00295   0x2eee2d9d, 0x3dae81cf, 0x2f4f2630, 0x3dc905c5,
00296   0x2fb047f2, 0x3de2f148, 0x301191f3, 0x3dfc4418,
00297   0x30730342, 0x3e14fdf7, 0x30d49af1, 0x3e2d1ea8,
00298   0x3136580d, 0x3e44a5ef, 0x319839a6, 0x3e5b9392,
00299   0x31fa3ecb, 0x3e71e759, 0x325c6688, 0x3e87a10c,
00300   0x32beafed, 0x3e9cc076, 0x33211a07, 0x3eb14563,
00301   0x3383a3e2, 0x3ec52fa0, 0x33e64c8c, 0x3ed87efc,
00302   0x34491311, 0x3eeb3347, 0x34abf67e, 0x3efd4c54,
00303   0x350ef5de, 0x3f0ec9f5, 0x3572103d, 0x3f1fabff,
00304   0x35d544a7, 0x3f2ff24a, 0x36389228, 0x3f3f9cab,
00305   0x369bf7c9, 0x3f4eaafe, 0x36ff7496, 0x3f5d1d1d,
00306   0x37630799, 0x3f6af2e3, 0x37c6afdc, 0x3f782c30,
00307   0x382a6c6a, 0x3f84c8e2, 0x388e3c4d, 0x3f90c8da,
00308   0x38f21e8e, 0x3f9c2bfb, 0x39561237, 0x3fa6f228,
00309   0x39ba1651, 0x3fb11b48, 0x3a1e29e5, 0x3fbaa740,
00310   0x3a824bfd, 0x3fc395f9, 0x3ae67ba2, 0x3fcbe75e,
00311   0x3b4ab7db, 0x3fd39b5a, 0x3baeffb3, 0x3fdab1d9,
00312   0x3c135231, 0x3fe12acb, 0x3c77ae5e, 0x3fe7061f,
00313   0x3cdc1342, 0x3fec43c7, 0x3d407fe6, 0x3ff0e3b6,
00314   0x3da4f351, 0x3ff4e5e0, 0x3e096c8d, 0x3ff84a3c,
00315   0x3e6deaa1, 0x3ffb10c1, 0x3ed26c94, 0x3ffd3969,
00316   0x3f36f170, 0x3ffec42d, 0x3f9b783c, 0x3fffb10b
00317 };
00318
00319
00336 const q31_t realCoefBQ31[1024] = {
00337   0x40000000, 0x40000000, 0x406487c4, 0x3fffb10b,
00338   0x40c90e90, 0x3ffec42d, 0x412d936c, 0x3ffd3969,
00339   0x4192155f, 0x3ffb10c1, 0x41f69373, 0x3ff84a3c,
00340   0x425b0caf, 0x3ff4e5e0, 0x42bf801a, 0x3ff0e3b6,
00341   0x4323ecbe, 0x3fec43c7, 0x438851a2, 0x3fe7061f,
00342   0x43ecadcf, 0x3fe12acb, 0x4451004d, 0x3fdab1d9,
00343   0x44b54825, 0x3fd39b5a, 0x4519845e, 0x3fcbe75e,
00344   0x457db403, 0x3fc395f9, 0x45e1d61b, 0x3fbaa740,
00345   0x4645e9af, 0x3fb11b48, 0x46a9edc9, 0x3fa6f228,
00346   0x470de172, 0x3f9c2bfb, 0x4771c3b3, 0x3f90c8da,
00347   0x47d59396, 0x3f84c8e2, 0x48395024, 0x3f782c30,
00348   0x489cf867, 0x3f6af2e3, 0x49008b6a, 0x3f5d1d1d,
00349   0x49640837, 0x3f4eaafe, 0x49c76dd8, 0x3f3f9cab,
00350   0x4a2abb59, 0x3f2ff24a, 0x4a8defc3, 0x3f1fabff,
00351   0x4af10a22, 0x3f0ec9f5, 0x4b540982, 0x3efd4c54,
00352   0x4bb6ecef, 0x3eeb3347, 0x4c19b374, 0x3ed87efc,
00353   0x4c7c5c1e, 0x3ec52fa0, 0x4cdee5f9, 0x3eb14563,
00354   0x4d415013, 0x3e9cc076, 0x4da39978, 0x3e87a10c,
00355   0x4e05c135, 0x3e71e759, 0x4e67c65a, 0x3e5b9392,
00356   0x4ec9a7f3, 0x3e44a5ef, 0x4f2b650f, 0x3e2d1ea8,
00357   0x4f8cfcbe, 0x3e14fdf7, 0x4fee6e0d, 0x3dfc4418,
00358   0x504fb80e, 0x3de2f148, 0x50b0d9d0, 0x3dc905c5,
00359   0x5111d263, 0x3dae81cf, 0x5172a0d7, 0x3d9365a8,
00360   0x51d3443f, 0x3d77b192, 0x5233bbac, 0x3d5b65d2,
00361   0x5294062f, 0x3d3e82ae, 0x52f422db, 0x3d21086c,
00362   0x535410c3, 0x3d02f757, 0x53b3cefa, 0x3ce44fb7,
00363   0x54135c94, 0x3cc511d9, 0x5472b8a5, 0x3ca53e09,
00364   0x54d1e242, 0x3c84d496, 0x5530d881, 0x3c63d5d1,
00365   0x558f9a76, 0x3c42420a, 0x55ee2738, 0x3c201994,
00366   0x564c7ddd, 0x3bfd5cc4, 0x56aa9d7e, 0x3bda0bf0,
00367   0x57088531, 0x3bb6276e, 0x5766340f, 0x3b91af97,
00368   0x57c3a931, 0x3b6ca4c4, 0x5820e3b0, 0x3b470753,
00369   0x587de2a7, 0x3b20d79e, 0x58daa52f, 0x3afa1605,
00370   0x59372a64, 0x3ad2c2e8, 0x59937161, 0x3aaadea6,
00371   0x59ef7944, 0x3a8269a3, 0x5a4b4128, 0x3a596442,
00372   0x5aa6c82b, 0x3a2fcee8, 0x5b020d6c, 0x3a05a9fd,
00373   0x5b5d100a, 0x39daf5e8, 0x5bb7cf23, 0x39afb313,
00374   0x5c1249d8, 0x3983e1e8, 0x5c6c7f4a, 0x395782d3,
00375   0x5cc66e99, 0x392a9642, 0x5d2016e9, 0x38fd1ca4,
00376   0x5d79775c, 0x38cf1669, 0x5dd28f15, 0x38a08402,
00377   0x5e2b5d38, 0x387165e3, 0x5e83e0eb, 0x3841bc7f,
00378   0x5edc1953, 0x3811884d, 0x5f340596, 0x37e0c9c3,
00379   0x5f8ba4dc, 0x37af8159, 0x5fe2f64c, 0x377daf89,
00380   0x6039f90f, 0x374b54ce, 0x6090ac4d, 0x371871a5,
00381   0x60e70f32, 0x36e5068a, 0x613d20e8, 0x36b113fd,
00382   0x6192e09b, 0x367c9a7e, 0x61e84d76, 0x36479a8e,
00383   0x623d66a8, 0x361214b0, 0x62922b5e, 0x35dc0968,
00384   0x62e69ac8, 0x35a5793c, 0x633ab414, 0x356e64b2,
00385   0x638e7673, 0x3536cc52, 0x63e1e117, 0x34feb0a5,
00386   0x6434f332, 0x34c61236, 0x6487abf7, 0x348cf190,
00387   0x64da0a9a, 0x34534f41, 0x652c0e4f, 0x34192bd5,
00388   0x657db64c, 0x33de87de, 0x65cf01c8, 0x33a363ec,
00389   0x661feffa, 0x3367c090, 0x6670801a, 0x332b9e5e,
00390   0x66c0b162, 0x32eefdea, 0x6710830c, 0x32b1dfc9,
00391   0x675ff452, 0x32744493, 0x67af0472, 0x32362ce0,
00392   0x67fdb2a7, 0x31f79948, 0x684bfe2f, 0x31b88a66,
00393   0x6899e64a, 0x317900d6, 0x68e76a37, 0x3138fd35,
00394   0x69348937, 0x30f8801f, 0x6981428c, 0x30b78a36,
00395   0x69cd9578, 0x30761c18, 0x6a19813f, 0x30343667,
00396   0x6a650525, 0x2ff1d9c7, 0x6ab02071, 0x2faf06da,
00397   0x6afad269, 0x2f6bbe45, 0x6b451a55, 0x2f2800af,
00398   0x6b8ef77d, 0x2ee3cebe, 0x6bd8692b, 0x2e9f291b,
00399   0x6c216eaa, 0x2e5a1070, 0x6c6a0746, 0x2e148566,
00400   0x6cb2324c, 0x2dce88aa, 0x6cf9ef09, 0x2d881ae8,
00401   0x6d413ccd, 0x2d413ccd, 0x6d881ae8, 0x2cf9ef09,
00402   0x6dce88aa, 0x2cb2324c, 0x6e148566, 0x2c6a0746,
00403   0x6e5a1070, 0x2c216eaa, 0x6e9f291b, 0x2bd8692b,
00404   0x6ee3cebe, 0x2b8ef77d, 0x6f2800af, 0x2b451a55,
00405   0x6f6bbe45, 0x2afad269, 0x6faf06da, 0x2ab02071,
00406   0x6ff1d9c7, 0x2a650525, 0x70343667, 0x2a19813f,
00407   0x70761c18, 0x29cd9578, 0x70b78a36, 0x2981428c,
00408   0x70f8801f, 0x29348937, 0x7138fd35, 0x28e76a37,
00409   0x717900d6, 0x2899e64a, 0x71b88a66, 0x284bfe2f,
00410   0x71f79948, 0x27fdb2a7, 0x72362ce0, 0x27af0472,
00411   0x72744493, 0x275ff452, 0x72b1dfc9, 0x2710830c,
00412   0x72eefdea, 0x26c0b162, 0x732b9e5e, 0x2670801a,
00413   0x7367c090, 0x261feffa, 0x73a363ec, 0x25cf01c8,
00414   0x73de87de, 0x257db64c, 0x74192bd5, 0x252c0e4f,
00415   0x74534f41, 0x24da0a9a, 0x748cf190, 0x2487abf7,
00416   0x74c61236, 0x2434f332, 0x74feb0a5, 0x23e1e117,
00417   0x7536cc52, 0x238e7673, 0x756e64b2, 0x233ab414,
00418   0x75a5793c, 0x22e69ac8, 0x75dc0968, 0x22922b5e,
00419   0x761214b0, 0x223d66a8, 0x76479a8e, 0x21e84d76,
00420   0x767c9a7e, 0x2192e09b, 0x76b113fd, 0x213d20e8,
00421   0x76e5068a, 0x20e70f32, 0x771871a5, 0x2090ac4d,
00422   0x774b54ce, 0x2039f90f, 0x777daf89, 0x1fe2f64c,
00423   0x77af8159, 0x1f8ba4dc, 0x77e0c9c3, 0x1f340596,
00424   0x7811884d, 0x1edc1953, 0x7841bc7f, 0x1e83e0eb,
00425   0x787165e3, 0x1e2b5d38, 0x78a08402, 0x1dd28f15,
00426   0x78cf1669, 0x1d79775c, 0x78fd1ca4, 0x1d2016e9,
00427   0x792a9642, 0x1cc66e99, 0x795782d3, 0x1c6c7f4a,
00428   0x7983e1e8, 0x1c1249d8, 0x79afb313, 0x1bb7cf23,
00429   0x79daf5e8, 0x1b5d100a, 0x7a05a9fd, 0x1b020d6c,
00430   0x7a2fcee8, 0x1aa6c82b, 0x7a596442, 0x1a4b4128,
00431   0x7a8269a3, 0x19ef7944, 0x7aaadea6, 0x19937161,
00432   0x7ad2c2e8, 0x19372a64, 0x7afa1605, 0x18daa52f,
00433   0x7b20d79e, 0x187de2a7, 0x7b470753, 0x1820e3b0,
00434   0x7b6ca4c4, 0x17c3a931, 0x7b91af97, 0x1766340f,
00435   0x7bb6276e, 0x17088531, 0x7bda0bf0, 0x16aa9d7e,
00436   0x7bfd5cc4, 0x164c7ddd, 0x7c201994, 0x15ee2738,
00437   0x7c42420a, 0x158f9a76, 0x7c63d5d1, 0x1530d881,
00438   0x7c84d496, 0x14d1e242, 0x7ca53e09, 0x1472b8a5,
00439   0x7cc511d9, 0x14135c94, 0x7ce44fb7, 0x13b3cefa,
00440   0x7d02f757, 0x135410c3, 0x7d21086c, 0x12f422db,
00441   0x7d3e82ae, 0x1294062f, 0x7d5b65d2, 0x1233bbac,
00442   0x7d77b192, 0x11d3443f, 0x7d9365a8, 0x1172a0d7,
00443   0x7dae81cf, 0x1111d263, 0x7dc905c5, 0x10b0d9d0,
00444   0x7de2f148, 0x104fb80e, 0x7dfc4418, 0xfee6e0d,
00445   0x7e14fdf7, 0xf8cfcbe, 0x7e2d1ea8, 0xf2b650f,
00446   0x7e44a5ef, 0xec9a7f3, 0x7e5b9392, 0xe67c65a,
00447   0x7e71e759, 0xe05c135, 0x7e87a10c, 0xda39978,
00448   0x7e9cc076, 0xd415013, 0x7eb14563, 0xcdee5f9,
00449   0x7ec52fa0, 0xc7c5c1e, 0x7ed87efc, 0xc19b374,
00450   0x7eeb3347, 0xbb6ecef, 0x7efd4c54, 0xb540982,
00451   0x7f0ec9f5, 0xaf10a22, 0x7f1fabff, 0xa8defc3,
00452   0x7f2ff24a, 0xa2abb59, 0x7f3f9cab, 0x9c76dd8,
00453   0x7f4eaafe, 0x9640837, 0x7f5d1d1d, 0x9008b6a,
00454   0x7f6af2e3, 0x89cf867, 0x7f782c30, 0x8395024,
00455   0x7f84c8e2, 0x7d59396, 0x7f90c8da, 0x771c3b3,
00456   0x7f9c2bfb, 0x70de172, 0x7fa6f228, 0x6a9edc9,
00457   0x7fb11b48, 0x645e9af, 0x7fbaa740, 0x5e1d61b,
00458   0x7fc395f9, 0x57db403, 0x7fcbe75e, 0x519845e,
00459   0x7fd39b5a, 0x4b54825, 0x7fdab1d9, 0x451004d,
00460   0x7fe12acb, 0x3ecadcf, 0x7fe7061f, 0x38851a2,
00461   0x7fec43c7, 0x323ecbe, 0x7ff0e3b6, 0x2bf801a,
00462   0x7ff4e5e0, 0x25b0caf, 0x7ff84a3c, 0x1f69373,
00463   0x7ffb10c1, 0x192155f, 0x7ffd3969, 0x12d936c,
00464   0x7ffec42d, 0xc90e90, 0x7fffb10b, 0x6487c4,
00465   0x7fffffff, 0x0, 0x7fffb10b, 0xff9b783c,
00466   0x7ffec42d, 0xff36f170, 0x7ffd3969, 0xfed26c94,
00467   0x7ffb10c1, 0xfe6deaa1, 0x7ff84a3c, 0xfe096c8d,
00468   0x7ff4e5e0, 0xfda4f351, 0x7ff0e3b6, 0xfd407fe6,
00469   0x7fec43c7, 0xfcdc1342, 0x7fe7061f, 0xfc77ae5e,
00470   0x7fe12acb, 0xfc135231, 0x7fdab1d9, 0xfbaeffb3,
00471   0x7fd39b5a, 0xfb4ab7db, 0x7fcbe75e, 0xfae67ba2,
00472   0x7fc395f9, 0xfa824bfd, 0x7fbaa740, 0xfa1e29e5,
00473   0x7fb11b48, 0xf9ba1651, 0x7fa6f228, 0xf9561237,
00474   0x7f9c2bfb, 0xf8f21e8e, 0x7f90c8da, 0xf88e3c4d,
00475   0x7f84c8e2, 0xf82a6c6a, 0x7f782c30, 0xf7c6afdc,
00476   0x7f6af2e3, 0xf7630799, 0x7f5d1d1d, 0xf6ff7496,
00477   0x7f4eaafe, 0xf69bf7c9, 0x7f3f9cab, 0xf6389228,
00478   0x7f2ff24a, 0xf5d544a7, 0x7f1fabff, 0xf572103d,
00479   0x7f0ec9f5, 0xf50ef5de, 0x7efd4c54, 0xf4abf67e,
00480   0x7eeb3347, 0xf4491311, 0x7ed87efc, 0xf3e64c8c,
00481   0x7ec52fa0, 0xf383a3e2, 0x7eb14563, 0xf3211a07,
00482   0x7e9cc076, 0xf2beafed, 0x7e87a10c, 0xf25c6688,
00483   0x7e71e759, 0xf1fa3ecb, 0x7e5b9392, 0xf19839a6,
00484   0x7e44a5ef, 0xf136580d, 0x7e2d1ea8, 0xf0d49af1,
00485   0x7e14fdf7, 0xf0730342, 0x7dfc4418, 0xf01191f3,
00486   0x7de2f148, 0xefb047f2, 0x7dc905c5, 0xef4f2630,
00487   0x7dae81cf, 0xeeee2d9d, 0x7d9365a8, 0xee8d5f29,
00488   0x7d77b192, 0xee2cbbc1, 0x7d5b65d2, 0xedcc4454,
00489   0x7d3e82ae, 0xed6bf9d1, 0x7d21086c, 0xed0bdd25,
00490   0x7d02f757, 0xecabef3d, 0x7ce44fb7, 0xec4c3106,
00491   0x7cc511d9, 0xebeca36c, 0x7ca53e09, 0xeb8d475b,
00492   0x7c84d496, 0xeb2e1dbe, 0x7c63d5d1, 0xeacf277f,
00493   0x7c42420a, 0xea70658a, 0x7c201994, 0xea11d8c8,
00494   0x7bfd5cc4, 0xe9b38223, 0x7bda0bf0, 0xe9556282,
00495   0x7bb6276e, 0xe8f77acf, 0x7b91af97, 0xe899cbf1,
00496   0x7b6ca4c4, 0xe83c56cf, 0x7b470753, 0xe7df1c50,
00497   0x7b20d79e, 0xe7821d59, 0x7afa1605, 0xe7255ad1,
00498   0x7ad2c2e8, 0xe6c8d59c, 0x7aaadea6, 0xe66c8e9f,
00499   0x7a8269a3, 0xe61086bc, 0x7a596442, 0xe5b4bed8,
00500   0x7a2fcee8, 0xe55937d5, 0x7a05a9fd, 0xe4fdf294,
00501   0x79daf5e8, 0xe4a2eff6, 0x79afb313, 0xe44830dd,
00502   0x7983e1e8, 0xe3edb628, 0x795782d3, 0xe39380b6,
00503   0x792a9642, 0xe3399167, 0x78fd1ca4, 0xe2dfe917,
00504   0x78cf1669, 0xe28688a4, 0x78a08402, 0xe22d70eb,
00505   0x787165e3, 0xe1d4a2c8, 0x7841bc7f, 0xe17c1f15,
00506   0x7811884d, 0xe123e6ad, 0x77e0c9c3, 0xe0cbfa6a,
00507   0x77af8159, 0xe0745b24, 0x777daf89, 0xe01d09b4,
00508   0x774b54ce, 0xdfc606f1, 0x771871a5, 0xdf6f53b3,
00509   0x76e5068a, 0xdf18f0ce, 0x76b113fd, 0xdec2df18,
00510   0x767c9a7e, 0xde6d1f65, 0x76479a8e, 0xde17b28a,
00511   0x761214b0, 0xddc29958, 0x75dc0968, 0xdd6dd4a2,
00512   0x75a5793c, 0xdd196538, 0x756e64b2, 0xdcc54bec,
00513   0x7536cc52, 0xdc71898d, 0x74feb0a5, 0xdc1e1ee9,
00514   0x74c61236, 0xdbcb0cce, 0x748cf190, 0xdb785409,
00515   0x74534f41, 0xdb25f566, 0x74192bd5, 0xdad3f1b1,
00516   0x73de87de, 0xda8249b4, 0x73a363ec, 0xda30fe38,
00517   0x7367c090, 0xd9e01006, 0x732b9e5e, 0xd98f7fe6,
00518   0x72eefdea, 0xd93f4e9e, 0x72b1dfc9, 0xd8ef7cf4,
00519   0x72744493, 0xd8a00bae, 0x72362ce0, 0xd850fb8e,
00520   0x71f79948, 0xd8024d59, 0x71b88a66, 0xd7b401d1,
00521   0x717900d6, 0xd76619b6, 0x7138fd35, 0xd71895c9,
00522   0x70f8801f, 0xd6cb76c9, 0x70b78a36, 0xd67ebd74,
00523   0x70761c18, 0xd6326a88, 0x70343667, 0xd5e67ec1,
00524   0x6ff1d9c7, 0xd59afadb, 0x6faf06da, 0xd54fdf8f,
00525   0x6f6bbe45, 0xd5052d97, 0x6f2800af, 0xd4bae5ab,
00526   0x6ee3cebe, 0xd4710883, 0x6e9f291b, 0xd42796d5,
00527   0x6e5a1070, 0xd3de9156, 0x6e148566, 0xd395f8ba,
00528   0x6dce88aa, 0xd34dcdb4, 0x6d881ae8, 0xd30610f7,
00529   0x6d413ccd, 0xd2bec333, 0x6cf9ef09, 0xd277e518,
00530   0x6cb2324c, 0xd2317756, 0x6c6a0746, 0xd1eb7a9a,
00531   0x6c216eaa, 0xd1a5ef90, 0x6bd8692b, 0xd160d6e5,
00532   0x6b8ef77d, 0xd11c3142, 0x6b451a55, 0xd0d7ff51,
00533   0x6afad269, 0xd09441bb, 0x6ab02071, 0xd050f926,
00534   0x6a650525, 0xd00e2639, 0x6a19813f, 0xcfcbc999,
00535   0x69cd9578, 0xcf89e3e8, 0x6981428c, 0xcf4875ca,
00536   0x69348937, 0xcf077fe1, 0x68e76a37, 0xcec702cb,
00537   0x6899e64a, 0xce86ff2a, 0x684bfe2f, 0xce47759a,
00538   0x67fdb2a7, 0xce0866b8, 0x67af0472, 0xcdc9d320,
00539   0x675ff452, 0xcd8bbb6d, 0x6710830c, 0xcd4e2037,
00540   0x66c0b162, 0xcd110216, 0x6670801a, 0xccd461a2,
00541   0x661feffa, 0xcc983f70, 0x65cf01c8, 0xcc5c9c14,
00542   0x657db64c, 0xcc217822, 0x652c0e4f, 0xcbe6d42b,
00543   0x64da0a9a, 0xcbacb0bf, 0x6487abf7, 0xcb730e70,
00544   0x6434f332, 0xcb39edca, 0x63e1e117, 0xcb014f5b,
00545   0x638e7673, 0xcac933ae, 0x633ab414, 0xca919b4e,
00546   0x62e69ac8, 0xca5a86c4, 0x62922b5e, 0xca23f698,
00547   0x623d66a8, 0xc9edeb50, 0x61e84d76, 0xc9b86572,
00548   0x6192e09b, 0xc9836582, 0x613d20e8, 0xc94eec03,
00549   0x60e70f32, 0xc91af976, 0x6090ac4d, 0xc8e78e5b,
00550   0x6039f90f, 0xc8b4ab32, 0x5fe2f64c, 0xc8825077,
00551   0x5f8ba4dc, 0xc8507ea7, 0x5f340596, 0xc81f363d,
00552   0x5edc1953, 0xc7ee77b3, 0x5e83e0eb, 0xc7be4381,
00553   0x5e2b5d38, 0xc78e9a1d, 0x5dd28f15, 0xc75f7bfe,
00554   0x5d79775c, 0xc730e997, 0x5d2016e9, 0xc702e35c,
00555   0x5cc66e99, 0xc6d569be, 0x5c6c7f4a, 0xc6a87d2d,
00556   0x5c1249d8, 0xc67c1e18, 0x5bb7cf23, 0xc6504ced,
00557   0x5b5d100a, 0xc6250a18, 0x5b020d6c, 0xc5fa5603,
00558   0x5aa6c82b, 0xc5d03118, 0x5a4b4128, 0xc5a69bbe,
00559   0x59ef7944, 0xc57d965d, 0x59937161, 0xc555215a,
00560   0x59372a64, 0xc52d3d18, 0x58daa52f, 0xc505e9fb,
00561   0x587de2a7, 0xc4df2862, 0x5820e3b0, 0xc4b8f8ad,
00562   0x57c3a931, 0xc4935b3c, 0x5766340f, 0xc46e5069,
00563   0x57088531, 0xc449d892, 0x56aa9d7e, 0xc425f410,
00564   0x564c7ddd, 0xc402a33c, 0x55ee2738, 0xc3dfe66c,
00565   0x558f9a76, 0xc3bdbdf6, 0x5530d881, 0xc39c2a2f,
00566   0x54d1e242, 0xc37b2b6a, 0x5472b8a5, 0xc35ac1f7,
00567   0x54135c94, 0xc33aee27, 0x53b3cefa, 0xc31bb049,
00568   0x535410c3, 0xc2fd08a9, 0x52f422db, 0xc2def794,
00569   0x5294062f, 0xc2c17d52, 0x5233bbac, 0xc2a49a2e,
00570   0x51d3443f, 0xc2884e6e, 0x5172a0d7, 0xc26c9a58,
00571   0x5111d263, 0xc2517e31, 0x50b0d9d0, 0xc236fa3b,
00572   0x504fb80e, 0xc21d0eb8, 0x4fee6e0d, 0xc203bbe8,
00573   0x4f8cfcbe, 0xc1eb0209, 0x4f2b650f, 0xc1d2e158,
00574   0x4ec9a7f3, 0xc1bb5a11, 0x4e67c65a, 0xc1a46c6e,
00575   0x4e05c135, 0xc18e18a7, 0x4da39978, 0xc1785ef4,
00576   0x4d415013, 0xc1633f8a, 0x4cdee5f9, 0xc14eba9d,
00577   0x4c7c5c1e, 0xc13ad060, 0x4c19b374, 0xc1278104,
00578   0x4bb6ecef, 0xc114ccb9, 0x4b540982, 0xc102b3ac,
00579   0x4af10a22, 0xc0f1360b, 0x4a8defc3, 0xc0e05401,
00580   0x4a2abb59, 0xc0d00db6, 0x49c76dd8, 0xc0c06355,
00581   0x49640837, 0xc0b15502, 0x49008b6a, 0xc0a2e2e3,
00582   0x489cf867, 0xc0950d1d, 0x48395024, 0xc087d3d0,
00583   0x47d59396, 0xc07b371e, 0x4771c3b3, 0xc06f3726,
00584   0x470de172, 0xc063d405, 0x46a9edc9, 0xc0590dd8,
00585   0x4645e9af, 0xc04ee4b8, 0x45e1d61b, 0xc04558c0,
00586   0x457db403, 0xc03c6a07, 0x4519845e, 0xc03418a2,
00587   0x44b54825, 0xc02c64a6, 0x4451004d, 0xc0254e27,
00588   0x43ecadcf, 0xc01ed535, 0x438851a2, 0xc018f9e1,
00589   0x4323ecbe, 0xc013bc39, 0x42bf801a, 0xc00f1c4a,
00590   0x425b0caf, 0xc00b1a20, 0x41f69373, 0xc007b5c4,
00591   0x4192155f, 0xc004ef3f, 0x412d936c, 0xc002c697,
00592   0x40c90e90, 0xc0013bd3, 0x406487c4, 0xc0004ef5
00593 };
00594
00617 arm_status arm_rfft_init_q31(
00618   arm_rfft_instance_q31 * S,
00619   arm_cfft_radix4_instance_q31 * S_CFFT,
00620   uint32_t fftLenReal,
00621   uint32_t ifftFlagR,
00622   uint32_t bitReverseFlag)
00623 {
00624   /*  Initialise the default arm status */
00625   arm_status status = ARM_MATH_SUCCESS;
00626
00627   /*  Initialize the Real FFT length */
00628   S->fftLenReal = (uint16_t) fftLenReal;
00629
00630   /*  Initialize the Complex FFT length */
00631   S->fftLenBy2 = (uint16_t) fftLenReal / 2u;
00632
00633   /*  Initialize the Twiddle coefficientA pointer */
00634   S->pTwiddleAReal = (q31_t *) realCoefAQ31;
00635
00636   /*  Initialize the Twiddle coefficientB pointer */
00637   S->pTwiddleBReal = (q31_t *) realCoefBQ31;
00638
00639   /*  Initialize the Flag for selection of RFFT or RIFFT */
00640   S->ifftFlagR = (uint8_t) ifftFlagR;
00641
00642   /*  Initialize the Flag for calculation Bit reversal or not */
00643   S->bitReverseFlagR = (uint8_t) bitReverseFlag;
00644
00645   /*  Initialization of coef modifier depending on the FFT length */
00646   switch (S->fftLenReal)
00647   {
00648   case 512u:
00649     S->twidCoefRModifier = 2u;
00650     break;
00651   case 128u:
00652     S->twidCoefRModifier = 8u;
00653     break;
00654   default:
00655     /*  Reporting argument error if rfftSize is not valid value */
00656     status = ARM_MATH_ARGUMENT_ERROR;
00657     break;
00658   }
00659
00660   /* Init Complex FFT Instance */
00661   S->pCfft = S_CFFT;
00662
00663   if(S->ifftFlagR)
00664   {
00665     /* Initializes the CIFFT Module for fftLenreal/2 length */
00666     arm_cfft_radix4_init_q31(S->pCfft, (uint16_t) S->fftLenBy2, 1u, 1u);
00667   }
00668   else
00669   {
00670     /* Initializes the CFFT Module for fftLenreal/2 length */
00671     arm_cfft_radix4_init_q31(S->pCfft, (uint16_t) S->fftLenBy2, 0u, 1u);
00672   }
00673
00674   /* return the status of RFFT Init function */
00675   return (status);
00676
00677 }
00678
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CMSIS DSP Software Library: arm_rfft_q15.c File Reference

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Functions

arm_rfft_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void | arm_split_rfft_q15 (q15_t *pSrc, uint32_t fftLen, q15_t *pATable, q15_t *pBTable, q15_t *pDst, uint32_t modifier)
void | arm_split_rifft_q15 (q15_t *pSrc, uint32_t fftLen, q15_t *pATable, q15_t *pBTable, q15_t *pDst, uint32_t modifier)
void | arm_rfft_q15 (const arm_rfft_instance_q15 *S, q15_t *pSrc, q15_t *pDst)

Function Documentation

void arm_split_rfft_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | q15_t * | pATable,
 |  | q15_t * | pBTable,
 |  | q15_t * | pDst,
 |  | uint32_t | modifier
 | ) |  |

Core Real FFT process.

end of RFFT_RIFFT group

Parameters:
*pSrc | points to the input buffer.
fftLen | length of FFT.
*pATable | points to the A twiddle Coef buffer.
*pBTable | points to the B twiddle Coef buffer.
*pDst | points to the output buffer.
modifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none. The function implements a Real FFT

Definition at line 143 of file arm_rfft_q15.c.

void arm_split_rifft_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | q15_t * | pATable,
 |  | q15_t * | pBTable,
 |  | q15_t * | pDst,
 |  | uint32_t | modifier
 | ) |  |

Core Real IFFT process.

Parameters:
[in] | *pSrc | points to the input buffer.
[in] | fftLen | length of FFT.
[in] | *pATable | points to the twiddle Coef A buffer.
[in] | *pBTable | points to the twiddle Coef B buffer.
[out] | *pDst | points to the output buffer.
[in] | modifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none. The function implements a Real IFFT

Definition at line 312 of file arm_rfft_q15.c.

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CMSIS DSP Software Library: arm_rfft_q15.c Source File

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arm_rfft_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_rfft_q15.c
00009 *
00010 * Description:  RFFT & RIFFT Q15 process function
00011 *
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated
00029 *
00030 * Version 0.0.7  2010/06/10
00031 *    Misra-C changes done
00032 * -------------------------------------------------------------------- */
00033
00034
00035 #include "arm_math.h"
00036
00037 /*--------------------------------------------------------------------
00038 *       Internal functions prototypes
00039 --------------------------------------------------------------------*/
00040
00041 void arm_split_rfft_q15(
00042   q15_t * pSrc,
00043   uint32_t fftLen,
00044   q15_t * pATable,
00045   q15_t * pBTable,
00046   q15_t * pDst,
00047   uint32_t modifier);
00048
00049 void arm_split_rifft_q15(
00050   q15_t * pSrc,
00051   uint32_t fftLen,
00052   q15_t * pATable,
00053   q15_t * pBTable,
00054   q15_t * pDst,
00055   uint32_t modifier);
00056
00080 void arm_rfft_q15(
00081   const arm_rfft_instance_q15 * S,
00082   q15_t * pSrc,
00083   q15_t * pDst)
00084 {
00085   const arm_cfft_radix4_instance_q15 *S_CFFT = S->pCfft;
00086
00087   /* Calculation of RIFFT of input */
00088   if(S->ifftFlagR == 1u)
00089   {
00090     /*  Real IFFT core process */
00091     arm_split_rifft_q15(pSrc, S->fftLenBy2, S->pTwiddleAReal,
00092                         S->pTwiddleBReal, pDst, S->twidCoefRModifier);
00093
00094     /* Complex readix-4 IFFT process */
00095     arm_radix4_butterfly_inverse_q15(pDst, S_CFFT->fftLen,
00096                                      S_CFFT->pTwiddle,
00097                                      S_CFFT->twidCoefModifier);
00098
00099     /* Bit reversal process */
00100     if(S->bitReverseFlagR == 1u)
00101     {
00102       arm_bitreversal_q15(pDst, S_CFFT->fftLen,
00103                           S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
00104     }
00105   }
00106   else
00107   {
00108     /* Calculation of RFFT of input */
00109
00110     /* Complex readix-4 FFT process */
00111     arm_radix4_butterfly_q15(pSrc, S_CFFT->fftLen,
00112                              S_CFFT->pTwiddle, S_CFFT->twidCoefModifier);
00113
00114     /* Bit reversal process */
00115     if(S->bitReverseFlagR == 1u)
00116     {
00117       arm_bitreversal_q15(pSrc, S_CFFT->fftLen,
00118                           S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
00119     }
00120
00121     arm_split_rfft_q15(pSrc, S->fftLenBy2, S->pTwiddleAReal,
00122                        S->pTwiddleBReal, pDst, S->twidCoefRModifier);
00123   }
00124
00125 }
00126
00143 void arm_split_rfft_q15(
00144   q15_t * pSrc,
00145   uint32_t fftLen,
00146   q15_t * pATable,
00147   q15_t * pBTable,
00148   q15_t * pDst,
00149   uint32_t modifier)
00150 {
00151   uint32_t i;                                    /* Loop Counter */
00152   q31_t outR, outI;                              /* Temporary variables for output */
00153   q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
00154   q15_t *pSrc1, *pSrc2;
00155
00156
00157   pSrc[2u * fftLen] = pSrc[0];
00158   pSrc[(2u * fftLen) + 1u] = pSrc[1];
00159
00160   pCoefA = &pATable[modifier * 2u];
00161   pCoefB = &pBTable[modifier * 2u];
00162
00163   pSrc1 = &pSrc[2];
00164   pSrc2 = &pSrc[(2u * fftLen) - 2u];
00165
00166 #ifndef ARM_MATH_CM0
00167
00168   /* Run the below code for Cortex-M4 and Cortex-M3 */
00169
00170   i = 1u;
00171
00172   while(i < fftLen)
00173   {
00174     /*
00175        outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]
00176        + pSrc[2 * n - 2 * i] * pBTable[2 * i] +
00177        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
00178      */
00179
00180     /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +
00181        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
00182        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
00183
00184
00185 #ifndef ARM_MATH_BIG_ENDIAN
00186
00187     /* pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1] */
00188     outR = __SMUSD(*__SIMD32(pSrc1), *__SIMD32(pCoefA));
00189
00190 #else
00191
00192     /* -(pSrc[2 * i + 1] * pATable[2 * i + 1] - pSrc[2 * i] * pATable[2 * i]) */
00193     outR = -(__SMUSD(*__SIMD32(pSrc1), *__SIMD32(pCoefA)));
00194
00195 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00196
00197     /* pSrc[2 * n - 2 * i] * pBTable[2 * i] +
00198        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
00199     outR = __SMLAD(*__SIMD32(pSrc2), *__SIMD32(pCoefB), outR) >> 15u;
00200
00201     /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
00202        pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
00203
00204 #ifndef ARM_MATH_BIG_ENDIAN
00205
00206     outI = __SMUSDX(*__SIMD32(pSrc2)--, *__SIMD32(pCoefB));
00207
00208 #else
00209
00210     outI = __SMUSDX(*__SIMD32(pCoefB), *__SIMD32(pSrc2)--);
00211
00212 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00213
00214     /* (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] */
00215     outI = __SMLADX(*__SIMD32(pSrc1)++, *__SIMD32(pCoefA), outI);
00216
00217     /* write output */
00218     pDst[2u * i] = (q15_t) outR;
00219     pDst[(2u * i) + 1u] = outI >> 15u;
00220
00221     /* write complex conjugate output */
00222     pDst[(4u * fftLen) - (2u * i)] = (q15_t) outR;
00223     pDst[((4u * fftLen) - (2u * i)) + 1u] = -(outI >> 15u);
00224
00225     /* update coefficient pointer */
00226     pCoefB = pCoefB + (2u * modifier);
00227     pCoefA = pCoefA + (2u * modifier);
00228
00229     i++;
00230
00231   }
00232
00233   pDst[2u * fftLen] = pSrc[0] - pSrc[1];
00234   pDst[(2u * fftLen) + 1u] = 0;
00235
00236   pDst[0] = pSrc[0] + pSrc[1];
00237   pDst[1] = 0;
00238
00239
00240 #else
00241
00242   /* Run the below code for Cortex-M0 */
00243
00244   i = 1u;
00245
00246   while(i < fftLen)
00247   {
00248     /*
00249        outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]
00250        + pSrc[2 * n - 2 * i] * pBTable[2 * i] +
00251        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
00252      */
00253
00254     outR = *pSrc1 * *pCoefA;
00255     outR = outR - (*(pSrc1 + 1) * *(pCoefA + 1));
00256     outR = outR + (*pSrc2 * *pCoefB);
00257     outR = (outR + (*(pSrc2 + 1) * *(pCoefB + 1))) >> 15;
00258
00259
00260     /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +
00261        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
00262        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
00263      */
00264
00265     outI = *pSrc2 * *(pCoefB + 1);
00266     outI = outI - (*(pSrc2 + 1) * *pCoefB);
00267     outI = outI + (*(pSrc1 + 1) * *pCoefA);
00268     outI = outI + (*pSrc1 * *(pCoefA + 1));
00269
00270     /* update input pointers */
00271     pSrc1 += 2u;
00272     pSrc2 -= 2u;
00273
00274     /* write output */
00275     pDst[2u * i] = (q15_t) outR;
00276     pDst[(2u * i) + 1u] = outI >> 15u;
00277
00278     /* write complex conjugate output */
00279     pDst[(4u * fftLen) - (2u * i)] = (q15_t) outR;
00280     pDst[((4u * fftLen) - (2u * i)) + 1u] = -(outI >> 15u);
00281
00282     /* update coefficient pointer */
00283     pCoefB = pCoefB + (2u * modifier);
00284     pCoefA = pCoefA + (2u * modifier);
00285
00286     i++;
00287
00288   }
00289
00290   pDst[2u * fftLen] = pSrc[0] - pSrc[1];
00291   pDst[(2u * fftLen) + 1u] = 0;
00292
00293   pDst[0] = pSrc[0] + pSrc[1];
00294   pDst[1] = 0;
00295
00296 #endif /* #ifndef ARM_MATH_CM0 */
00297
00298 }
00299
00300
00312 void arm_split_rifft_q15(
00313   q15_t * pSrc,
00314   uint32_t fftLen,
00315   q15_t * pATable,
00316   q15_t * pBTable,
00317   q15_t * pDst,
00318   uint32_t modifier)
00319 {
00320   uint32_t i;                                    /* Loop Counter */
00321   q31_t outR, outI;                              /* Temporary variables for output */
00322   q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
00323   q15_t *pSrc1, *pSrc2;
00324   q15_t *pDst1 = &pDst[0];
00325
00326   pCoefA = &pATable[0];
00327   pCoefB = &pBTable[0];
00328
00329   pSrc1 = &pSrc[0];
00330   pSrc2 = &pSrc[2u * fftLen];
00331
00332 #ifndef ARM_MATH_CM0
00333
00334   /* Run the below code for Cortex-M4 and Cortex-M3 */
00335
00336   i = fftLen;
00337
00338   while(i > 0u)
00339   {
00340
00341     /*
00342        outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
00343        pIn[2 * n - 2 * i] * pBTable[2 * i] -
00344        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
00345
00346        outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -
00347        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
00348        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
00349
00350      */
00351
00352
00353 #ifndef ARM_MATH_BIG_ENDIAN
00354
00355     /* pIn[2 * n - 2 * i] * pBTable[2 * i] -
00356        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
00357     outR = __SMUSD(*__SIMD32(pSrc2), *__SIMD32(pCoefB));
00358
00359 #else
00360
00361     /* -(-pIn[2 * n - 2 * i] * pBTable[2 * i] +
00362        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1])) */
00363     outR = -(__SMUSD(*__SIMD32(pSrc2), *__SIMD32(pCoefB)));
00364
00365 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00366
00367     /* pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
00368        pIn[2 * n - 2 * i] * pBTable[2 * i] */
00369     outR = __SMLAD(*__SIMD32(pSrc1), *__SIMD32(pCoefA), outR) >> 15u;
00370
00371     /*
00372        -pIn[2 * n - 2 * i] * pBTable[2 * i + 1] +
00373        pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
00374     outI = __SMUADX(*__SIMD32(pSrc2)--, *__SIMD32(pCoefB));
00375
00376     /* pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] */
00377
00378 #ifndef ARM_MATH_BIG_ENDIAN
00379
00380     outI = __SMLSDX(*__SIMD32(pCoefA), *__SIMD32(pSrc1)++, -outI);
00381
00382 #else
00383
00384     outI = __SMLSDX(*__SIMD32(pSrc1)++, *__SIMD32(pCoefA), -outI);
00385
00386 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00387     /* write output */
00388
00389 #ifndef ARM_MATH_BIG_ENDIAN
00390
00391     *__SIMD32(pDst1)++ = __PKHBT(outR, (outI >> 15u), 16);
00392
00393 #else
00394
00395     *__SIMD32(pDst1)++ = __PKHBT((outI >> 15u), outR, 16);
00396
00397 #endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
00398
00399     /* update coefficient pointer */
00400     pCoefB = pCoefB + (2u * modifier);
00401     pCoefA = pCoefA + (2u * modifier);
00402
00403     i--;
00404
00405   }
00406
00407
00408 #else
00409
00410   /* Run the below code for Cortex-M0 */
00411
00412   i = fftLen;
00413
00414   while(i > 0u)
00415   {
00416
00417     /*
00418        outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
00419        pIn[2 * n - 2 * i] * pBTable[2 * i] -
00420        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
00421      */
00422
00423     outR = *pSrc2 * *pCoefB;
00424     outR = outR - (*(pSrc2 + 1) * *(pCoefB + 1));
00425     outR = outR + (*pSrc1 * *pCoefA);
00426     outR = (outR + (*(pSrc1 + 1) * *(pCoefA + 1))) >> 15;
00427
00428     /*
00429        outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -
00430        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
00431        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
00432      */
00433
00434     outI = *(pSrc1 + 1) * *pCoefA;
00435     outI = outI - (*pSrc1 * *(pCoefA + 1));
00436     outI = outI - (*pSrc2 * *(pCoefB + 1));
00437     outI = outI - (*(pSrc2 + 1) * *(pCoefB));
00438
00439     /* update input pointers */
00440     pSrc1 += 2u;
00441     pSrc2 -= 2u;
00442
00443     /* write output */
00444     *pDst1++ = (q15_t) outR;
00445     *pDst1++ = (q15_t) (outI >> 15);
00446
00447     /* update coefficient pointer */
00448     pCoefB = pCoefB + (2u * modifier);
00449     pCoefA = pCoefA + (2u * modifier);
00450
00451     i--;
00452
00453   }
00454
00455 #endif /* #ifndef ARM_MATH_CM0 */
00456
00457 }
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CMSIS DSP Software Library: arm_rfft_q31.c File Reference

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  • File List
  • Globals
Functions

arm_rfft_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void | arm_split_rfft_q31 (q31_t *pSrc, uint32_t fftLen, q31_t *pATable, q31_t *pBTable, q31_t *pDst, uint32_t modifier)
void | arm_split_rifft_q31 (q31_t *pSrc, uint32_t fftLen, q31_t *pATable, q31_t *pBTable, q31_t *pDst, uint32_t modifier)
void | arm_rfft_q31 (const arm_rfft_instance_q31 *S, q31_t *pSrc, q31_t *pDst)

Function Documentation

void arm_split_rfft_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | q31_t * | pATable,
 |  | q31_t * | pBTable,
 |  | q31_t * | pDst,
 |  | uint32_t | modifier
 | ) |  |

Core Real FFT process.

end of RFFT_RIFFT group

Parameters:
[in] | *pSrc | points to the input buffer.
[in] | fftLen | length of FFT.
[in] | *pATable | points to the twiddle Coef A buffer.
[in] | *pBTable | points to the twiddle Coef B buffer.
[out] | *pDst | points to the output buffer.
[in] | modifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 143 of file arm_rfft_q31.c.

void arm_split_rifft_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | fftLen,
 |  | q31_t * | pATable,
 |  | q31_t * | pBTable,
 |  | q31_t * | pDst,
 |  | uint32_t | modifier
 | ) |  |

Core Real IFFT process.

Parameters:
[in] | *pSrc | points to the input buffer.
[in] | fftLen | length of FFT.
[in] | *pATable | points to the twiddle Coef A buffer.
[in] | *pBTable | points to the twiddle Coef B buffer.
[out] | *pDst | points to the output buffer.
[in] | modifier | twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
Returns:
none.

Definition at line 249 of file arm_rfft_q31.c.

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CMSIS DSP Software Library: arm_rfft_q31.c Source File

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arm_rfft_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_rfft_q31.c
00009 *
00010 * Description:  RFFT & RIFFT Q31 process function
00011 *
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00014 *
00015 * Version 1.0.10 2011/7/15
00016 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00017 *
00018 * Version 1.0.3 2010/11/29
00019 *    Re-organized the CMSIS folders and updated documentation.
00020 *
00021 * Version 1.0.2 2010/11/11
00022 *    Documentation updated.
00023 *
00024 * Version 1.0.1 2010/10/05
00025 *    Production release and review comments incorporated.
00026 *
00027 * Version 1.0.0 2010/09/20
00028 *    Production release and review comments incorporated.
00029 *
00030 * Version 0.0.7  2010/06/10
00031 *    Misra-C changes done
00032 * -------------------------------------------------------------------- */
00033
00034 #include "arm_math.h"
00035
00036 /*--------------------------------------------------------------------
00037 *       Internal functions prototypes
00038 --------------------------------------------------------------------*/
00039
00040 void arm_split_rfft_q31(
00041   q31_t * pSrc,
00042   uint32_t fftLen,
00043   q31_t * pATable,
00044   q31_t * pBTable,
00045   q31_t * pDst,
00046   uint32_t modifier);
00047
00048 void arm_split_rifft_q31(
00049   q31_t * pSrc,
00050   uint32_t fftLen,
00051   q31_t * pATable,
00052   q31_t * pBTable,
00053   q31_t * pDst,
00054   uint32_t modifier);
00055
00080 void arm_rfft_q31(
00081   const arm_rfft_instance_q31 * S,
00082   q31_t * pSrc,
00083   q31_t * pDst)
00084 {
00085   const arm_cfft_radix4_instance_q31 *S_CFFT = S->pCfft;
00086
00087   /* Calculation of RIFFT of input */
00088   if(S->ifftFlagR == 1u)
00089   {
00090     /*  Real IFFT core process */
00091     arm_split_rifft_q31(pSrc, S->fftLenBy2, S->pTwiddleAReal,
00092                         S->pTwiddleBReal, pDst, S->twidCoefRModifier);
00093
00094     /* Complex readix-4 IFFT process */
00095     arm_radix4_butterfly_inverse_q31(pDst, S_CFFT->fftLen,
00096                                      S_CFFT->pTwiddle,
00097                                      S_CFFT->twidCoefModifier);
00098     /* Bit reversal process */
00099     if(S->bitReverseFlagR == 1u)
00100     {
00101       arm_bitreversal_q31(pDst, S_CFFT->fftLen,
00102                           S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
00103     }
00104   }
00105   else
00106   {
00107     /* Calculation of RFFT of input */
00108
00109     /* Complex readix-4 FFT process */
00110     arm_radix4_butterfly_q31(pSrc, S_CFFT->fftLen,
00111                              S_CFFT->pTwiddle, S_CFFT->twidCoefModifier);
00112
00113     /* Bit reversal process */
00114     if(S->bitReverseFlagR == 1u)
00115     {
00116       arm_bitreversal_q31(pSrc, S_CFFT->fftLen,
00117                           S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
00118     }
00119
00120     /*  Real FFT core process */
00121     arm_split_rfft_q31(pSrc, S->fftLenBy2, S->pTwiddleAReal,
00122                        S->pTwiddleBReal, pDst, S->twidCoefRModifier);
00123   }
00124
00125 }
00126
00127
00143 void arm_split_rfft_q31(
00144   q31_t * pSrc,
00145   uint32_t fftLen,
00146   q31_t * pATable,
00147   q31_t * pBTable,
00148   q31_t * pDst,
00149   uint32_t modifier)
00150 {
00151   uint32_t i;                                    /* Loop Counter */
00152   q31_t outR, outI;                              /* Temporary variables for output */
00153   q31_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
00154   q31_t CoefA1, CoefA2, CoefB1;                  /* Temporary variables for twiddle coefficients */
00155   q31_t *pOut1 = &pDst[2], *pOut2 = &pDst[(4u * fftLen) - 1u];
00156   q31_t *pIn1 = &pSrc[2], *pIn2 = &pSrc[(2u * fftLen) - 1u];
00157
00158   pSrc[2u * fftLen] = pSrc[0];
00159   pSrc[(2u * fftLen) + 1u] = pSrc[1];
00160
00161   /* Init coefficient pointers */
00162   pCoefA = &pATable[modifier * 2u];
00163   pCoefB = &pBTable[modifier * 2u];
00164
00165   i = fftLen - 1u;
00166
00167   while(i > 0u)
00168   {
00169     /*
00170        outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]
00171        + pSrc[2 * n - 2 * i] * pBTable[2 * i] +
00172        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
00173      */
00174
00175     /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +
00176        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
00177        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
00178
00179     CoefA1 = *pCoefA++;
00180     CoefA2 = *pCoefA;
00181
00182     /* outR = (pSrc[2 * i] * pATable[2 * i] */
00183     outR = ((int32_t) (((q63_t) * pIn1 * CoefA1) >> 32));
00184
00185     /* outI = pIn[2 * i] * pATable[2 * i + 1] */
00186     outI = ((int32_t) (((q63_t) * pIn1++ * CoefA2) >> 32));
00187
00188     /* - pSrc[2 * i + 1] * pATable[2 * i + 1] */
00189     outR =
00190       (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn1 * (-CoefA2))) >> 32);
00191
00192     /* (pIn[2 * i + 1] * pATable[2 * i] */
00193     outI =
00194       (q31_t) ((((q63_t) outI << 32) + ((q63_t) * pIn1++ * (CoefA1))) >> 32);
00195
00196     /* pSrc[2 * n - 2 * i] * pBTable[2 * i]  */
00197     outR =
00198       (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn2 * (-CoefA2))) >> 32);
00199     CoefB1 = *pCoefB;
00200
00201     /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
00202     outI =
00203       (q31_t) ((((q63_t) outI << 32) + ((q63_t) * pIn2-- * (-CoefB1))) >> 32);
00204
00205     /* pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
00206     outR =
00207       (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn2 * (CoefB1))) >> 32);
00208
00209     /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
00210     outI =
00211       (q31_t) ((((q63_t) outI << 32) + ((q63_t) * pIn2-- * (-CoefA2))) >> 32);
00212
00213     /* write output */
00214     *pOut1++ = (outR << 1u);
00215     *pOut1++ = (outI << 1u);
00216
00217     /* write complex conjugate output */
00218     *pOut2-- = -(outI << 1u);
00219     *pOut2-- = (outR << 1u);
00220
00221     /* update coefficient pointer */
00222     pCoefB = pCoefB + (modifier * 2u);
00223     pCoefA = pCoefA + ((modifier * 2u) - 1u);
00224
00225     i--;
00226
00227   }
00228
00229   pDst[2u * fftLen] = pSrc[0] - pSrc[1];
00230   pDst[(2u * fftLen) + 1u] = 0;
00231
00232   pDst[0] = pSrc[0] + pSrc[1];
00233   pDst[1] = 0;
00234
00235 }
00236
00237
00249 void arm_split_rifft_q31(
00250   q31_t * pSrc,
00251   uint32_t fftLen,
00252   q31_t * pATable,
00253   q31_t * pBTable,
00254   q31_t * pDst,
00255   uint32_t modifier)
00256 {
00257   q31_t outR, outI;                              /* Temporary variables for output */
00258   q31_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
00259   q31_t CoefA1, CoefA2, CoefB1;                  /* Temporary variables for twiddle coefficients */
00260   q31_t *pIn1 = &pSrc[0], *pIn2 = &pSrc[(2u * fftLen) + 1u];
00261
00262   pCoefA = &pATable[0];
00263   pCoefB = &pBTable[0];
00264
00265   while(fftLen > 0u)
00266   {
00267     /*
00268        outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
00269        pIn[2 * n - 2 * i] * pBTable[2 * i] -
00270        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
00271
00272        outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -
00273        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
00274        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
00275
00276      */
00277     CoefA1 = *pCoefA++;
00278     CoefA2 = *pCoefA;
00279
00280     /* outR = (pIn[2 * i] * pATable[2 * i] */
00281     outR = ((int32_t) (((q63_t) * pIn1 * CoefA1) >> 32));
00282
00283     /* - pIn[2 * i] * pATable[2 * i + 1] */
00284     outI = -((int32_t) (((q63_t) * pIn1++ * CoefA2) >> 32));
00285
00286     /* pIn[2 * i + 1] * pATable[2 * i + 1] */
00287     outR =
00288       (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn1 * (CoefA2))) >> 32);
00289
00290     /* pIn[2 * i + 1] * pATable[2 * i] */
00291     outI =
00292       (q31_t) ((((q63_t) outI << 32) + ((q63_t) * pIn1++ * (CoefA1))) >> 32);
00293
00294     /* pIn[2 * n - 2 * i] * pBTable[2 * i] */
00295     outR =
00296       (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn2 * (CoefA2))) >> 32);
00297
00298     CoefB1 = *pCoefB;
00299
00300     /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
00301     outI =
00302       (q31_t) ((((q63_t) outI << 32) - ((q63_t) * pIn2-- * (CoefB1))) >> 32);
00303
00304     /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
00305     outR =
00306       (q31_t) ((((q63_t) outR << 32) + ((q63_t) * pIn2 * (CoefB1))) >> 32);
00307
00308     /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
00309     outI =
00310       (q31_t) ((((q63_t) outI << 32) + ((q63_t) * pIn2-- * (CoefA2))) >> 32);
00311
00312     /* write output */
00313     *pDst++ = (outR << 1u);
00314     *pDst++ = (outI << 1u);
00315
00316     /* update coefficient pointer */
00317     pCoefB = pCoefB + (modifier * 2u);
00318     pCoefA = pCoefA + ((modifier * 2u) - 1u);
00319
00320     /* Decrement loop count */
00321     fftLen--;
00322
00323   }
00324
00325
00326 }
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CMSIS DSP Software Library: arm_rms_f32.c File Reference

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arm_rms_f32.c File Reference

#include "arm_math.h"

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Functions

void arm_rms_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
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CMSIS DSP Software Library: arm_rms_f32.c Source File

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arm_rms_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_rms_f32.c
00009 *
00010 * Description:  Root mean square value of an array of F32 type
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00065 void arm_rms_f32(
00066   float32_t * pSrc,
00067   uint32_t blockSize,
00068   float32_t * pResult)
00069 {
00070   float32_t sum = 0.0f;                          /* Accumulator */
00071   float32_t in;                                  /* Tempoprary variable to store input value */
00072   uint32_t blkCnt;                               /* loop counter */
00073
00074 #ifndef ARM_MATH_CM0
00075
00076   /* Run the below code for Cortex-M4 and Cortex-M3 */
00077
00078   /* loop Unrolling */
00079   blkCnt = blockSize >> 2u;
00080
00081   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00082    ** a second loop below computes the remaining 1 to 3 samples. */
00083   while(blkCnt > 0u)
00084   {
00085     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00086     /* Compute sum of the squares and then store the result in a temporary variable, sum  */
00087     in = *pSrc++;
00088     sum += in * in;
00089     in = *pSrc++;
00090     sum += in * in;
00091     in = *pSrc++;
00092     sum += in * in;
00093     in = *pSrc++;
00094     sum += in * in;
00095
00096     /* Decrement the loop counter */
00097     blkCnt--;
00098   }
00099
00100   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00101    ** No loop unrolling is used. */
00102   blkCnt = blockSize % 0x4u;
00103
00104 #else
00105
00106   /* Run the below code for Cortex-M0 */
00107
00108   /* Loop over blockSize number of values */
00109   blkCnt = blockSize;
00110
00111 #endif /* #ifndef ARM_MATH_CM0 */
00112
00113   while(blkCnt > 0u)
00114   {
00115     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00116     /* Compute sum of the squares and then store the results in a temporary variable, sum  */
00117     in = *pSrc++;
00118     sum += in * in;
00119
00120     /* Decrement the loop counter */
00121     blkCnt--;
00122   }
00123
00124   /* Compute Rms and store the result in the destination */
00125   arm_sqrt_f32(sum / (float32_t) blockSize, pResult);
00126 }
00127
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CMSIS DSP Software Library: arm_rms_q15.c File Reference

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arm_rms_q15.c File Reference

#include "arm_math.h"

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Functions

void arm_rms_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
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CMSIS DSP Software Library: arm_rms_q15.c Source File

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arm_rms_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_rms_q15.c
00009 *
00010 * Description:  Root Mean Square of the elements of a Q15 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00059 void arm_rms_q15(
00060   q15_t * pSrc,
00061   uint32_t blockSize,
00062   q15_t * pResult)
00063 {
00064   q63_t sum = 0;                                 /* accumulator */
00065
00066 #ifndef ARM_MATH_CM0
00067
00068   /* Run the below code for Cortex-M4 and Cortex-M3 */
00069
00070   q31_t in;                                      /* temporary variable to store the input value */
00071   q15_t in1;                                     /* temporary variable to store the input value */
00072   uint32_t blkCnt;                               /* loop counter */
00073
00074   /* loop Unrolling */
00075   blkCnt = blockSize >> 2u;
00076
00077   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00078    ** a second loop below computes the remaining 1 to 3 samples. */
00079   while(blkCnt > 0u)
00080   {
00081     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00082     /* Compute sum of the squares and then store the results in a temporary variable, sum */
00083     in = *__SIMD32(pSrc)++;
00084     sum = __SMLALD(in, in, sum);
00085     in = *__SIMD32(pSrc)++;
00086     sum = __SMLALD(in, in, sum);
00087
00088     /* Decrement the loop counter */
00089     blkCnt--;
00090   }
00091
00092   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00093    ** No loop unrolling is used. */
00094   blkCnt = blockSize % 0x4u;
00095
00096   while(blkCnt > 0u)
00097   {
00098     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00099     /* Compute sum of the squares and then store the results in a temporary variable, sum */
00100     in1 = *pSrc++;
00101     sum = __SMLALD(in1, in1, sum);
00102
00103     /* Decrement the loop counter */
00104     blkCnt--;
00105   }
00106
00107   /* Truncating and saturating the accumulator to 1.15 format */
00108   sum = __SSAT((q31_t) (sum >> 15), 16);
00109
00110   in1 = (q15_t) (sum / blockSize);
00111
00112   /* Store the result in the destination */
00113   arm_sqrt_q15(in1, pResult);
00114
00115 #else
00116
00117   /* Run the below code for Cortex-M0 */
00118
00119   q15_t in;                                      /* temporary variable to store the input value */
00120   uint32_t blkCnt;                               /* loop counter */
00121
00122   /* Loop over blockSize number of values */
00123   blkCnt = blockSize;
00124
00125   while(blkCnt > 0u)
00126   {
00127     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00128     /* Compute sum of the squares and then store the results in a temporary variable, sum */
00129     in = *pSrc++;
00130     sum += ((q31_t) in * in);
00131
00132     /* Decrement the loop counter */
00133     blkCnt--;
00134   }
00135
00136   /* Truncating and saturating the accumulator to 1.15 format */
00137   sum = __SSAT((q31_t) (sum >> 15), 16);
00138
00139   in = (q15_t) (sum / blockSize);
00140
00141   /* Store the result in the destination */
00142   arm_sqrt_q15(in, pResult);
00143
00144 #endif /* #ifndef ARM_MATH_CM0 */
00145
00146 }
00147
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CMSIS DSP Software Library: arm_rms_q31.c File Reference

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arm_rms_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_rms_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
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CMSIS DSP Software Library: arm_rms_q31.c Source File

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arm_rms_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_rms_q31.c
00009 *
00010 * Description:  Root Mean Square of the elements of a Q31 vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00062 void arm_rms_q31(
00063   q31_t * pSrc,
00064   uint32_t blockSize,
00065   q31_t * pResult)
00066 {
00067   q63_t sum = 0;                                 /* accumulator */
00068   q31_t in;                                      /* Temporary variable to store the input */
00069   uint32_t blkCnt;                               /* loop counter */
00070
00071 #ifndef ARM_MATH_CM0
00072
00073   /* Run the below code for Cortex-M4 and Cortex-M3 */
00074
00075   q31_t *pIn1 = pSrc;                            /* SrcA pointer */
00076
00077   /*loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079
00080   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00081    ** a second loop below computes the remaining 1 to 3 samples. */
00082   while(blkCnt > 0u)
00083   {
00084     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00085     /* Compute sum of the squares and then store the result in a temporary variable, sum */
00086     in = *pIn1++;
00087     sum += (q63_t) in *in;
00088     in = *pIn1++;
00089     sum += (q63_t) in *in;
00090     in = *pIn1++;
00091     sum += (q63_t) in *in;
00092     in = *pIn1++;
00093     sum += (q63_t) in *in;
00094
00095     /* Decrement the loop counter */
00096     blkCnt--;
00097   }
00098
00099   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00100    ** No loop unrolling is used. */
00101   blkCnt = blockSize % 0x4u;
00102
00103   while(blkCnt > 0u)
00104   {
00105     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00106     /* Compute sum of the squares and then store the results in a temporary variable, sum */
00107     in = *pIn1++;
00108     sum += (q63_t) in *in;
00109
00110     /* Decrement the loop counter */
00111     blkCnt--;
00112   }
00113
00114 #else
00115
00116   /* Run the below code for Cortex-M0 */
00117
00118   /* Loop over blockSize number of values */
00119   blkCnt = blockSize;
00120
00121   while(blkCnt > 0u)
00122   {
00123     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
00124     /* Compute sum of the squares and then store the results in a temporary variable, sum */
00125     in = *pSrc++;
00126     sum += (q63_t) in *in;
00127
00128     /* Decrement the loop counter */
00129     blkCnt--;
00130   }
00131
00132 #endif /* #ifndef ARM_MATH_CM0 */
00133
00134   /* Convert data in 2.62 to 1.31 by 31 right shifts */
00135   sum = sum >> 31;
00136
00137   /* Compute Rms and store the result in the destination vector */
00138   arm_sqrt_q31((q31_t) (sum / (int32_t) blockSize), pResult);
00139 }
00140
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CMSIS DSP Software Library: arm_scale_f32.c File Reference

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arm_scale_f32.c File Reference

#include "arm_math.h"

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Functions

void arm_scale_f32 (float32_t *pSrc, float32_t scale, float32_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_scale_f32.c Source File

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arm_scale_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_scale_f32.c
00009 *
00010 * Description:  Multiplies a floating-point vector by a scalar.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00078 void arm_scale_f32(
00079   float32_t * pSrc,
00080   float32_t scale,
00081   float32_t * pDst,
00082   uint32_t blockSize)
00083 {
00084   uint32_t blkCnt;                               /* loop counter */
00085
00086 #ifndef ARM_MATH_CM0
00087
00088 /* Run the below code for Cortex-M4 and Cortex-M3 */
00089   /*loop Unrolling */
00090   blkCnt = blockSize >> 2u;
00091
00092   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00093    ** a second loop below computes the remaining 1 to 3 samples. */
00094   while(blkCnt > 0u)
00095   {
00096     /* C = A * scale */
00097     /* Scale the input and then store the results in the destination buffer. */
00098     *pDst++ = (*pSrc++) * scale;
00099     *pDst++ = (*pSrc++) * scale;
00100     *pDst++ = (*pSrc++) * scale;
00101     *pDst++ = (*pSrc++) * scale;
00102
00103     /* Decrement the loop counter */
00104     blkCnt--;
00105   }
00106
00107   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00108    ** No loop unrolling is used. */
00109   blkCnt = blockSize % 0x4u;
00110
00111 #else
00112
00113   /* Run the below code for Cortex-M0 */
00114
00115   /* Initialize blkCnt with number of samples */
00116   blkCnt = blockSize;
00117
00118 #endif /* #ifndef ARM_MATH_CM0 */
00119
00120   while(blkCnt > 0u)
00121   {
00122     /* C = A * scale */
00123     /* Scale the input and then store the result in the destination buffer. */
00124     *pDst++ = (*pSrc++) * scale;
00125
00126     /* Decrement the loop counter */
00127     blkCnt--;
00128   }
00129 }
00130
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CMSIS DSP Software Library: arm_scale_q7.c File Reference

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arm_scale_q7.c File Reference

#include "arm_math.h"

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Functions

void arm_scale_q7 (q7_t *pSrc, q7_t scaleFract, int8_t shift, q7_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_scale_q7.c Source File

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arm_scale_q7.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_scale_q7.c
00009 *
00010 * Description:  Multiplies a Q7 vector by a scalar.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00059 void arm_scale_q7(
00060   q7_t * pSrc,
00061   q7_t scaleFract,
00062   int8_t shift,
00063   q7_t * pDst,
00064   uint32_t blockSize)
00065 {
00066   int8_t kShift = 7 - shift;                     /* shift to apply after scaling */
00067   uint32_t blkCnt;                               /* loop counter */
00068
00069 #ifndef ARM_MATH_CM0
00070
00071 /* Run the below code for Cortex-M4 and Cortex-M3 */
00072   q7_t in1, in2, in3, in4, out1, out2, out3, out4;      /* Temporary variables to store input & output */
00073
00074
00075   /*loop Unrolling */
00076   blkCnt = blockSize >> 2u;
00077
00078
00079   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00080    ** a second loop below computes the remaining 1 to 3 samples. */
00081   while(blkCnt > 0u)
00082   {
00083     /* Reading 4 inputs from memory */
00084     in1 = *pSrc++;
00085     in2 = *pSrc++;
00086     in3 = *pSrc++;
00087     in4 = *pSrc++;
00088
00089     /* C = A * scale */
00090     /* Scale the inputs and then store the results in the temporary variables. */
00091     out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8));
00092     out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8));
00093     out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8));
00094     out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8));
00095
00096     /* Packing the individual outputs into 32bit and storing in
00097      * destination buffer in single write */
00098     *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
00099
00100     /* Decrement the loop counter */
00101     blkCnt--;
00102   }
00103
00104   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00105    ** No loop unrolling is used. */
00106   blkCnt = blockSize % 0x4u;
00107
00108   while(blkCnt > 0u)
00109   {
00110     /* C = A * scale */
00111     /* Scale the input and then store the result in the destination buffer. */
00112     *pDst++ = (q7_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 8));
00113
00114     /* Decrement the loop counter */
00115     blkCnt--;
00116   }
00117
00118 #else
00119
00120   /* Run the below code for Cortex-M0 */
00121
00122   /* Initialize blkCnt with number of samples */
00123   blkCnt = blockSize;
00124
00125   while(blkCnt > 0u)
00126   {
00127     /* C = A * scale */
00128     /* Scale the input and then store the result in the destination buffer. */
00129     *pDst++ = (q7_t) (__SSAT((((q15_t) * pSrc++ * scaleFract) >> kShift), 8));
00130
00131     /* Decrement the loop counter */
00132     blkCnt--;
00133   }
00134
00135 #endif /* #ifndef ARM_MATH_CM0 */
00136
00137 }
00138
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CMSIS DSP Software Library: arm_scale_q15.c File Reference

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arm_scale_q15.c File Reference

#include "arm_math.h"

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Functions

void arm_scale_q15 (q15_t *pSrc, q15_t scaleFract, int8_t shift, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_scale_q15.c Source File

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arm_scale_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_scale_q15.c
00009 *
00010 * Description:  Multiplies a Q15 vector by a scalar.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00060 void arm_scale_q15(
00061   q15_t * pSrc,
00062   q15_t scaleFract,
00063   int8_t shift,
00064   q15_t * pDst,
00065   uint32_t blockSize)
00066 {
00067   int8_t kShift = 15 - shift;                    /* shift to apply after scaling */
00068   uint32_t blkCnt;                               /* loop counter */
00069
00070 #ifndef ARM_MATH_CM0
00071
00072 /* Run the below code for Cortex-M4 and Cortex-M3 */
00073
00074   q15_t in1, in2;                                /* Temporary variables */
00075
00076
00077   /*loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079
00080   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00081    ** a second loop below computes the remaining 1 to 3 samples. */
00082   while(blkCnt > 0u)
00083   {
00084     /* Reading 2 inputs from memory */
00085     in1 = *pSrc++;
00086     in2 = *pSrc++;
00087     /* C = A * scale */
00088     /* Scale the inputs and then store the 2 results in the destination buffer
00089      * in single cycle by packing the outputs */
00090 #ifndef  ARM_MATH_BIG_ENDIAN
00091
00092     *__SIMD32(pDst)++ =
00093       __PKHBT(__SSAT((in1 * scaleFract) >> kShift, 16),
00094               __SSAT((in2 * scaleFract) >> kShift, 16), 16);
00095
00096 #else
00097
00098     *__SIMD32(pDst)++ =
00099       __PKHBT(__SSAT((in2 * scaleFract) >> kShift, 16),
00100               __SSAT((in1 * scaleFract) >> kShift, 16), 16);
00101
00102 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
00103
00104     in1 = *pSrc++;
00105     in2 = *pSrc++;
00106
00107 #ifndef  ARM_MATH_BIG_ENDIAN
00108
00109     *__SIMD32(pDst)++ =
00110       __PKHBT(__SSAT((in1 * scaleFract) >> kShift, 16),
00111               __SSAT((in2 * scaleFract) >> kShift, 16), 16);
00112
00113 #else
00114
00115     *__SIMD32(pDst)++ =
00116       __PKHBT(__SSAT((in2 * scaleFract) >> kShift, 16),
00117               __SSAT((in1 * scaleFract) >> kShift, 16), 16);
00118
00119 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
00120
00121     /* Decrement the loop counter */
00122     blkCnt--;
00123   }
00124
00125   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00126    ** No loop unrolling is used. */
00127   blkCnt = blockSize % 0x4u;
00128
00129   while(blkCnt > 0u)
00130   {
00131     /* C = A * scale */
00132     /* Scale the input and then store the result in the destination buffer. */
00133     *pDst++ = (q15_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 16));
00134
00135     /* Decrement the loop counter */
00136     blkCnt--;
00137   }
00138
00139 #else
00140
00141   /* Run the below code for Cortex-M0 */
00142
00143   /* Initialize blkCnt with number of samples */
00144   blkCnt = blockSize;
00145
00146   while(blkCnt > 0u)
00147   {
00148     /* C = A * scale */
00149     /* Scale the input and then store the result in the destination buffer. */
00150     *pDst++ = (q15_t) (__SSAT(((q31_t) * pSrc++ * scaleFract) >> kShift, 16));
00151
00152     /* Decrement the loop counter */
00153     blkCnt--;
00154   }
00155
00156 #endif /* #ifndef ARM_MATH_CM0 */
00157
00158 }
00159
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CMSIS DSP Software Library: arm_scale_q31.c File Reference

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arm_scale_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_scale_q31 (q31_t *pSrc, q31_t scaleFract, int8_t shift, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_scale_q31.c Source File

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arm_scale_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_scale_q31.c
00009 *
00010 * Description:  Multiplies a Q31 vector by a scalar.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00059 void arm_scale_q31(
00060   q31_t * pSrc,
00061   q31_t scaleFract,
00062   int8_t shift,
00063   q31_t * pDst,
00064   uint32_t blockSize)
00065 {
00066   int8_t kShift = 31 - shift;                    /* Shift to apply after scaling */
00067   uint32_t blkCnt;                               /* loop counter */
00068
00069 #ifndef ARM_MATH_CM0
00070
00071 /* Run the below code for Cortex-M4 and Cortex-M3 */
00072
00073   /*loop Unrolling */
00074   blkCnt = blockSize >> 2u;
00075
00076   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00077    ** a second loop below computes the remaining 1 to 3 samples. */
00078   while(blkCnt > 0u)
00079   {
00080     /* C = A * scale */
00081     /* Scale the input and then store the results in the destination buffer. */
00082     *pDst++ = clip_q63_to_q31(((q63_t) * pSrc++ * scaleFract) >> kShift);
00083     *pDst++ = clip_q63_to_q31(((q63_t) * pSrc++ * scaleFract) >> kShift);
00084     *pDst++ = clip_q63_to_q31(((q63_t) * pSrc++ * scaleFract) >> kShift);
00085     *pDst++ = clip_q63_to_q31(((q63_t) * pSrc++ * scaleFract) >> kShift);
00086
00087     /* Decrement the loop counter */
00088     blkCnt--;
00089   }
00090
00091   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00092    ** No loop unrolling is used. */
00093   blkCnt = blockSize % 0x4u;
00094
00095 #else
00096
00097   /* Run the below code for Cortex-M0 */
00098
00099   /* Initialize blkCnt with number of samples */
00100   blkCnt = blockSize;
00101
00102 #endif /* #ifndef ARM_MATH_CM0 */
00103
00104   while(blkCnt > 0u)
00105   {
00106     /* C = A * scale */
00107     /* Scale the input and then store the result in the destination buffer. */
00108     *pDst++ = clip_q63_to_q31(((q63_t) * pSrc++ * scaleFract) >> kShift);
00109
00110     /* Decrement the loop counter */
00111     blkCnt--;
00112   }
00113 }
00114
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CMSIS DSP Software Library: arm_shift_q7.c File Reference

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arm_shift_q7.c File Reference

#include "arm_math.h"

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Functions

void arm_shift_q7 (q7_t *pSrc, int8_t shiftBits, q7_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_shift_q7.c Source File

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arm_shift_q7.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_shift_q7.c
00009 *
00010 * Description:  Processing function for the Q7 Shifting
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00059 void arm_shift_q7(
00060   q7_t * pSrc,
00061   int8_t shiftBits,
00062   q7_t * pDst,
00063   uint32_t blockSize)
00064 {
00065   uint32_t blkCnt;                               /* loop counter */
00066   uint8_t sign;                                  /* Sign of shiftBits */
00067
00068 #ifndef ARM_MATH_CM0
00069
00070 /* Run the below code for Cortex-M4 and Cortex-M3 */
00071   q7_t in1;                                      /* Input value1 */
00072   q7_t in2;                                      /* Input value2 */
00073   q7_t in3;                                      /* Input value3 */
00074   q7_t in4;                                      /* Input value4 */
00075
00076
00077   /*loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079
00080   /* Getting the sign of shiftBits */
00081   sign = (shiftBits & 0x80);
00082
00083   /* If the shift value is positive then do right shift else left shift */
00084   if(sign == 0u)
00085   {
00086     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00087      ** a second loop below computes the remaining 1 to 3 samples. */
00088     while(blkCnt > 0u)
00089     {
00090       /* C = A << shiftBits */
00091       /* Read 4 inputs */
00092       in1 = *pSrc++;
00093       in2 = *pSrc++;
00094       in3 = *pSrc++;
00095       in4 = *pSrc++;
00096
00097       /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
00098       *__SIMD32(pDst)++ = __PACKq7(__SSAT((in1 << shiftBits), 8),
00099                                    __SSAT((in2 << shiftBits), 8),
00100                                    __SSAT((in3 << shiftBits), 8),
00101                                    __SSAT((in4 << shiftBits), 8));
00102
00103       /* Decrement the loop counter */
00104       blkCnt--;
00105     }
00106
00107     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00108      ** No loop unrolling is used. */
00109     blkCnt = blockSize % 0x4u;
00110
00111     while(blkCnt > 0u)
00112     {
00113       /* C = A << shiftBits */
00114       /* Shift the input and then store the result in the destination buffer. */
00115       *pDst++ = (q7_t) __SSAT((*pSrc++ << shiftBits), 8);
00116
00117       /* Decrement the loop counter */
00118       blkCnt--;
00119     }
00120   }
00121   else
00122   {
00123     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00124      ** a second loop below computes the remaining 1 to 3 samples. */
00125     while(blkCnt > 0u)
00126     {
00127       /* C = A >> shiftBits */
00128       /* Read 4 inputs */
00129       in1 = *pSrc++;
00130       in2 = *pSrc++;
00131       in3 = *pSrc++;
00132       in4 = *pSrc++;
00133
00134       /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
00135       *__SIMD32(pDst)++ = __PACKq7((in1 >> -shiftBits), (in2 >> -shiftBits),
00136                                    (in3 >> -shiftBits), (in4 >> -shiftBits));
00137
00138       /* Decrement the loop counter */
00139       blkCnt--;
00140     }
00141
00142     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00143      ** No loop unrolling is used. */
00144     blkCnt = blockSize % 0x4u;
00145
00146     while(blkCnt > 0u)
00147     {
00148       /* C = A >> shiftBits */
00149       /* Shift the input and then store the result in the destination buffer. */
00150       *pDst++ = (*pSrc++ >> -shiftBits);
00151
00152       /* Decrement the loop counter */
00153       blkCnt--;
00154     }
00155   }
00156
00157 #else
00158
00159   /* Run the below code for Cortex-M0 */
00160
00161   /* Getting the sign of shiftBits */
00162   sign = (shiftBits & 0x80);
00163
00164   /* If the shift value is positive then do right shift else left shift */
00165   if(sign == 0u)
00166   {
00167     /* Initialize blkCnt with number of samples */
00168     blkCnt = blockSize;
00169
00170     while(blkCnt > 0u)
00171     {
00172       /* C = A << shiftBits */
00173       /* Shift the input and then store the result in the destination buffer. */
00174       *pDst++ = (q7_t) __SSAT(((q15_t) * pSrc++ << shiftBits), 8);
00175
00176       /* Decrement the loop counter */
00177       blkCnt--;
00178     }
00179   }
00180   else
00181   {
00182     /* Initialize blkCnt with number of samples */
00183     blkCnt = blockSize;
00184
00185     while(blkCnt > 0u)
00186     {
00187       /* C = A >> shiftBits */
00188       /* Shift the input and then store the result in the destination buffer. */
00189       *pDst++ = (*pSrc++ >> -shiftBits);
00190
00191       /* Decrement the loop counter */
00192       blkCnt--;
00193     }
00194   }
00195
00196 #endif /* #ifndef ARM_MATH_CM0 */
00197
00198 }
00199
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CMSIS DSP Software Library: arm_shift_q15.c File Reference

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Functions

arm_shift_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_shift_q15 (q15_t *pSrc, int8_t shiftBits, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_shift_q15.c Source File

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arm_shift_q15.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_shift_q15.c
00009 *
00010 * Description:  Shifts the elements of a Q15 vector by a specified number of bits.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_shift_q15(
00059   q15_t * pSrc,
00060   int8_t shiftBits,
00061   q15_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   uint32_t blkCnt;                               /* loop counter */
00065   uint8_t sign;                                  /* Sign of shiftBits */
00066
00067 #ifndef ARM_MATH_CM0
00068
00069 /* Run the below code for Cortex-M4 and Cortex-M3 */
00070
00071   q15_t in1, in2;                                /* Temporary variables */
00072
00073
00074   /*loop Unrolling */
00075   blkCnt = blockSize >> 2u;
00076
00077   /* Getting the sign of shiftBits */
00078   sign = (shiftBits & 0x80);
00079
00080   /* If the shift value is positive then do right shift else left shift */
00081   if(sign == 0u)
00082   {
00083     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00084      ** a second loop below computes the remaining 1 to 3 samples. */
00085     while(blkCnt > 0u)
00086     {
00087       /* Read 2 inputs */
00088       in1 = *pSrc++;
00089       in2 = *pSrc++;
00090       /* C = A << shiftBits */
00091       /* Shift the inputs and then store the results in the destination buffer. */
00092 #ifndef  ARM_MATH_BIG_ENDIAN
00093
00094       *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
00095                                   __SSAT((in2 << shiftBits), 16), 16);
00096
00097 #else
00098
00099       *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
00100                                   __SSAT((in1 << shiftBits), 16), 16);
00101
00102 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
00103
00104       in1 = *pSrc++;
00105       in2 = *pSrc++;
00106
00107 #ifndef  ARM_MATH_BIG_ENDIAN
00108
00109       *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
00110                                   __SSAT((in2 << shiftBits), 16), 16);
00111
00112 #else
00113
00114       *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
00115                                   __SSAT((in1 << shiftBits), 16), 16);
00116
00117 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
00118
00119       /* Decrement the loop counter */
00120       blkCnt--;
00121     }
00122
00123     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00124      ** No loop unrolling is used. */
00125     blkCnt = blockSize % 0x4u;
00126
00127     while(blkCnt > 0u)
00128     {
00129       /* C = A << shiftBits */
00130       /* Shift and then store the results in the destination buffer. */
00131       *pDst++ = __SSAT((*pSrc++ << shiftBits), 16);
00132
00133       /* Decrement the loop counter */
00134       blkCnt--;
00135     }
00136   }
00137   else
00138   {
00139     /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00140      ** a second loop below computes the remaining 1 to 3 samples. */
00141     while(blkCnt > 0u)
00142     {
00143       /* Read 2 inputs */
00144       in1 = *pSrc++;
00145       in2 = *pSrc++;
00146       /* C = A >> shiftBits */
00147       /* Shift the inputs and then store the results in the destination buffer. */
00148 #ifndef  ARM_MATH_BIG_ENDIAN
00149
00150       *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
00151                                   (in2 >> -shiftBits), 16);
00152
00153 #else
00154
00155       *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
00156                                   (in1 >> -shiftBits), 16);
00157
00158 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
00159
00160       in1 = *pSrc++;
00161       in2 = *pSrc++;
00162
00163 #ifndef  ARM_MATH_BIG_ENDIAN
00164
00165       *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
00166                                   (in2 >> -shiftBits), 16);
00167
00168 #else
00169
00170       *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
00171                                   (in1 >> -shiftBits), 16);
00172
00173 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
00174
00175       /* Decrement the loop counter */
00176       blkCnt--;
00177     }
00178
00179     /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00180      ** No loop unrolling is used. */
00181     blkCnt = blockSize % 0x4u;
00182
00183     while(blkCnt > 0u)
00184     {
00185       /* C = A >> shiftBits */
00186       /* Shift the inputs and then store the results in the destination buffer. */
00187       *pDst++ = (*pSrc++ >> -shiftBits);
00188
00189       /* Decrement the loop counter */
00190       blkCnt--;
00191     }
00192   }
00193
00194 #else
00195
00196   /* Run the below code for Cortex-M0 */
00197
00198   /* Getting the sign of shiftBits */
00199   sign = (shiftBits & 0x80);
00200
00201   /* If the shift value is positive then do right shift else left shift */
00202   if(sign == 0u)
00203   {
00204     /* Initialize blkCnt with number of samples */
00205     blkCnt = blockSize;
00206
00207     while(blkCnt > 0u)
00208     {
00209       /* C = A << shiftBits */
00210       /* Shift and then store the results in the destination buffer. */
00211       *pDst++ = __SSAT(((q31_t) * pSrc++ << shiftBits), 16);
00212
00213       /* Decrement the loop counter */
00214       blkCnt--;
00215     }
00216   }
00217   else
00218   {
00219     /* Initialize blkCnt with number of samples */
00220     blkCnt = blockSize;
00221
00222     while(blkCnt > 0u)
00223     {
00224       /* C = A >> shiftBits */
00225       /* Shift the inputs and then store the results in the destination buffer. */
00226       *pDst++ = (*pSrc++ >> -shiftBits);
00227
00228       /* Decrement the loop counter */
00229       blkCnt--;
00230     }
00231   }
00232
00233 #endif /* #ifndef ARM_MATH_CM0 */
00234
00235 }
00236
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CMSIS DSP Software Library: arm_shift_q31.c File Reference

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Functions

arm_shift_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_shift_q31 (q31_t *pSrc, int8_t shiftBits, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_shift_q31.c Source File

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arm_shift_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_shift_q31.c
00009 *
00010 * Description:  Shifts the elements of a Q31 vector by a specified number of bits.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00073 void arm_shift_q31(
00074   q31_t * pSrc,
00075   int8_t shiftBits,
00076   q31_t * pDst,
00077   uint32_t blockSize)
00078 {
00079   uint32_t blkCnt;                               /* loop counter */
00080   uint8_t sign;                                  /* Sign of shiftBits */
00081   /* Getting the sign of shiftBits */
00082   sign = (shiftBits & 0x80);
00083
00084
00085 #ifndef ARM_MATH_CM0
00086
00087 /* Run the below code for Cortex-M4 and Cortex-M3 */
00088   /*loop Unrolling */
00089   blkCnt = blockSize >> 2u;
00090
00091
00092   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00093    ** a second loop below computes the remaining 1 to 3 samples. */
00094   while(blkCnt > 0u)
00095   {
00096     /* C = A (>> or <<) shiftBits */
00097     /* Shift the input and then store the results in the destination buffer. */
00098     *pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
00099       (*pSrc++ >> -shiftBits);
00100     *pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
00101       (*pSrc++ >> -shiftBits);
00102     *pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
00103       (*pSrc++ >> -shiftBits);
00104     *pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
00105       (*pSrc++ >> -shiftBits);
00106
00107     /* Decrement the loop counter */
00108     blkCnt--;
00109   }
00110
00111   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00112    ** No loop unrolling is used. */
00113   blkCnt = blockSize % 0x4u;
00114
00115 #else
00116
00117   /* Run the below code for Cortex-M0 */
00118
00119
00120   /* Initialize blkCnt with number of samples */
00121   blkCnt = blockSize;
00122
00123 #endif /* #ifndef ARM_MATH_CM0 */
00124
00125
00126   while(blkCnt > 0u)
00127   {
00128     /* C = A (>> or <<) shiftBits */
00129     /* Shift the input and then store the result in the destination buffer. */
00130     *pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
00131       (*pSrc++ >> -shiftBits);
00132
00133     /* Decrement the loop counter */
00134     blkCnt--;
00135   }
00136
00137 }
00138
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CMSIS DSP Software Library: arm_signal_converge_example_f32.c File Reference

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Defines | Functions | Variables

arm_signal_converge_example_f32.c File Reference

#include "arm_math.h"
#include "math_helper.h"

Go to the source code of this file.

Defines

#define | TEST_LENGTH_SAMPLES 1536
#define | NUMTAPS 32
#define | BLOCKSIZE 32
#define | DELTA_ERROR 0.000001f
#define | DELTA_COEFF 0.0001f
#define | MU 0.5f
#define | NUMFRAMES (TEST_LENGTH_SAMPLES / BLOCKSIZE)

Functions

arm_status | test_signal_converge_example (void)
arm_status | test_signal_converge (float32_t *err_signal, uint32_t blockSize)
void | getinput (float32_t *input, uint32_t fr_cnt, uint32_t blockSize)
int32_t | main (void)

Variables

float32_t | firStateF32 [NUMTAPS+BLOCKSIZE]
arm_fir_instance_f32 LPF_instance
float32_t | lmsStateF32 [NUMTAPS+BLOCKSIZE]
float32_t | errOutput [TEST_LENGTH_SAMPLES]
arm_lms_norm_instance_f32 lmsNorm_instance
float32_t | testInput_f32 [TEST_LENGTH_SAMPLES]
float32_t | lmsNormCoeff_f32 [32]
const float32_t | FIRCoeff_f32 [32]
float32_t | wire1 [BLOCKSIZE]
float32_t | wire2 [BLOCKSIZE]
float32_t | wire3 [BLOCKSIZE]
float32_t | err_signal [BLOCKSIZE]

Define Documentation

#define TEST_LENGTH_SAMPLES 1536

Definition at line 100 of file arm_signal_converge_example_f32.c.

#define NUMTAPS 32
Examples:
arm_signal_converge_example_f32.c.

Definition at line 101 of file arm_signal_converge_example_f32.c.

#define BLOCKSIZE 32

Definition at line 102 of file arm_signal_converge_example_f32.c.

#define DELTA_ERROR 0.000001f
Examples:
arm_signal_converge_example_f32.c.

Definition at line 103 of file arm_signal_converge_example_f32.c.

#define DELTA_COEFF 0.0001f
Examples:
arm_signal_converge_example_f32.c.

Definition at line 104 of file arm_signal_converge_example_f32.c.

#define MU 0.5f
Examples:
arm_signal_converge_example_f32.c.

Definition at line 105 of file arm_signal_converge_example_f32.c.

#define NUMFRAMES (TEST_LENGTH_SAMPLES / BLOCKSIZE)
Examples:
arm_signal_converge_example_f32.c.

Definition at line 107 of file arm_signal_converge_example_f32.c.

Function Documentation

arm_status test_signal_converge_example ( void )
Examples:
arm_signal_converge_example_f32.c.
arm_status test_signal_converge | ( | float32_t * | err_signal,
 |  | uint32_t | blockSize
 | ) |  |
Examples:
arm_signal_converge_example_f32.c.
void getinput | ( | float32_t * | input,
 |  | uint32_t | fr_cnt,
 |  | uint32_t | blockSize
 | ) |  |
Examples:
arm_signal_converge_example_f32.c.
int32_t main ( void )

Definition at line 163 of file arm_signal_converge_example_f32.c.

Variable Documentation

float32_t firStateF32[NUMTAPS+BLOCKSIZE]
Examples:
arm_fir_example_f32.c, and arm_signal_converge_example_f32.c.

Definition at line 113 of file arm_signal_converge_example_f32.c.

arm_fir_instance_f32 LPF_instance
Examples:
arm_signal_converge_example_f32.c.

Definition at line 114 of file arm_signal_converge_example_f32.c.

float32_t lmsStateF32[NUMTAPS+BLOCKSIZE]
Examples:
arm_signal_converge_example_f32.c.

Definition at line 120 of file arm_signal_converge_example_f32.c.

float32_t errOutput[TEST_LENGTH_SAMPLES]
Examples:
arm_signal_converge_example_f32.c.

Definition at line 121 of file arm_signal_converge_example_f32.c.

arm_lms_norm_instance_f32 lmsNorm_instance
Examples:
arm_signal_converge_example_f32.c.

Definition at line 122 of file arm_signal_converge_example_f32.c.

float32_t testInput_f32[TEST_LENGTH_SAMPLES]

Definition at line 83 of file arm_sin_cos_example_f32.c.

float32_t lmsNormCoeff_f32[32]
Examples:
arm_signal_converge_example_f32.c.
const float32_t FIRCoeff_f32[32]
Examples:
arm_signal_converge_example_f32.c.
float32_t wire1[BLOCKSIZE]
Examples:
arm_signal_converge_example_f32.c, and arm_variance_example_f32.c.

Definition at line 154 of file arm_signal_converge_example_f32.c.

float32_t wire2[BLOCKSIZE]
Examples:
arm_signal_converge_example_f32.c, and arm_variance_example_f32.c.

Definition at line 155 of file arm_signal_converge_example_f32.c.

float32_t wire3[BLOCKSIZE]
Examples:
arm_signal_converge_example_f32.c, and arm_variance_example_f32.c.

Definition at line 156 of file arm_signal_converge_example_f32.c.

float32_t err_signal[BLOCKSIZE]
Examples:
arm_signal_converge_example_f32.c.

Definition at line 157 of file arm_signal_converge_example_f32.c.

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CMSIS DSP Software Library: arm_signal_converge_example_f32.c Source File

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arm_signal_converge_example_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        29. November 2010
00005 * $Revision:    V1.0.3
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_signal_converge_example_f32.c
00009 *
00010 * Description:  Example code demonstrating convergence of an adaptive
00011 *               filter.
00012 *
00013 * Target Processor: Cortex-M4/Cortex-M3
00014 *
00015 *
00016 * Version 1.0.3 2010/11/29
00017 *    Re-organized the CMSIS folders and updated documentation.
00018 *
00019 * Version 1.0.1 2010/10/05 KK
00020 *    Production release and review comments incorporated.
00021 *
00022 * Version 1.0.0 2010/09/20 KK
00023 *    Production release and review comments incorporated.
00024 * ------------------------------------------------------------------- */
00025
00093 #include "arm_math.h"
00094 #include "math_helper.h"
00095
00096 /* ----------------------------------------------------------------------
00097 ** Global defines for the simulation
00098 * ------------------------------------------------------------------- */
00099
00100 #define TEST_LENGTH_SAMPLES 1536
00101 #define NUMTAPS             32
00102 #define BLOCKSIZE           32
00103 #define DELTA_ERROR         0.000001f
00104 #define DELTA_COEFF         0.0001f
00105 #define MU                  0.5f
00106
00107 #define NUMFRAMES (TEST_LENGTH_SAMPLES / BLOCKSIZE)
00108
00109 /* ----------------------------------------------------------------------
00110 * Declare FIR state buffers and structure
00111 * ------------------------------------------------------------------- */
00112
00113 float32_t firStateF32[NUMTAPS + BLOCKSIZE];
00114 arm_fir_instance_f32 LPF_instance;
00115
00116 /* ----------------------------------------------------------------------
00117 * Declare LMSNorm state buffers and structure
00118 * ------------------------------------------------------------------- */
00119
00120 float32_t lmsStateF32[NUMTAPS + BLOCKSIZE];
00121 float32_t errOutput[TEST_LENGTH_SAMPLES];
00122 arm_lms_norm_instance_f32 lmsNorm_instance;
00123
00124
00125 /* ----------------------------------------------------------------------
00126 * Function Declarations for Signal Convergence Example
00127 * ------------------------------------------------------------------- */
00128
00129 arm_status test_signal_converge_example( void );
00130
00131
00132 /* ----------------------------------------------------------------------
00133 * Internal functions
00134 * ------------------------------------------------------------------- */
00135 arm_status test_signal_converge(float32_t* err_signal,
00136                                  uint32_t blockSize);
00137
00138 void getinput(float32_t* input,
00139          uint32_t fr_cnt,
00140          uint32_t blockSize);
00141
00142 /* ----------------------------------------------------------------------
00143 * External Declarations for FIR F32 module Test
00144 * ------------------------------------------------------------------- */
00145 extern float32_t testInput_f32[TEST_LENGTH_SAMPLES];
00146 extern float32_t lmsNormCoeff_f32[32];
00147 extern const float32_t FIRCoeff_f32[32];
00148 extern arm_lms_norm_instance_f32 lmsNorm_instance;
00149
00150 /* ----------------------------------------------------------------------
00151 * Declare I/O buffers
00152 * ------------------------------------------------------------------- */
00153
00154 float32_t wire1[BLOCKSIZE];
00155 float32_t wire2[BLOCKSIZE];
00156 float32_t wire3[BLOCKSIZE];
00157 float32_t err_signal[BLOCKSIZE];
00158
00159 /* ----------------------------------------------------------------------
00160 * Signal converge test
00161 * ------------------------------------------------------------------- */
00162
00163 int32_t main(void)
00164 {
00165   uint32_t i;
00166   arm_status status;
00167   uint32_t index;
00168   float32_t minValue;
00169
00170   /* Initialize the LMSNorm data structure */
00171   arm_lms_norm_init_f32(&lmsNorm_instance, NUMTAPS, lmsNormCoeff_f32, lmsStateF32, MU, BLOCKSIZE);
00172
00173   /* Initialize the FIR data structure */
00174   arm_fir_init_f32(&LPF_instance, NUMTAPS, (float32_t *)FIRCoeff_f32, firStateF32, BLOCKSIZE);
00175
00176   /* ----------------------------------------------------------------------
00177   * Loop over the frames of data and execute each of the processing
00178   * functions in the system.
00179   * ------------------------------------------------------------------- */
00180
00181   for(i=0; i < NUMFRAMES; i++)
00182     {
00183       /* Read the input data - uniformly distributed random noise - into wire1 */
00184       arm_copy_f32(testInput_f32 + (i * BLOCKSIZE), wire1, BLOCKSIZE);
00185
00186       /* Execute the FIR processing function.  Input wire1 and output wire2 */
00187       arm_fir_f32(&LPF_instance, wire1, wire2, BLOCKSIZE);
00188
00189       /* Execute the LMS Norm processing function*/
00190
00191       arm_lms_norm_f32(&lmsNorm_instance, /* LMSNorm instance */
00192                wire1,                     /* Input signal */
00193                wire2,                     /* Reference Signal */
00194                wire3,                     /* Converged Signal */
00195                err_signal,                /* Error Signal, this will become small as the signal converges */
00196                BLOCKSIZE);                /* BlockSize */
00197
00198       /* apply overall gain */
00199       arm_scale_f32(wire3, 5, wire3, BLOCKSIZE);     /* in-place buffer */
00200     }
00201
00202   status = ARM_MATH_SUCCESS;
00203
00204   /* -------------------------------------------------------------------------------
00205   * Test whether the error signal has reached towards 0.
00206   * ----------------------------------------------------------------------------- */
00207
00208   arm_abs_f32(err_signal, err_signal, BLOCKSIZE);
00209   arm_min_f32(err_signal, BLOCKSIZE, &minValue, &index);
00210
00211   if (minValue > DELTA_ERROR)
00212   {
00213       status = ARM_MATH_TEST_FAILURE;
00214   }
00215
00216   /* ----------------------------------------------------------------------
00217   * Test whether the filter coefficients have converged.
00218   * ------------------------------------------------------------------- */
00219
00220   arm_sub_f32((float32_t *)FIRCoeff_f32, lmsNormCoeff_f32, lmsNormCoeff_f32, NUMTAPS);
00221
00222   arm_abs_f32(lmsNormCoeff_f32, lmsNormCoeff_f32, NUMTAPS);
00223   arm_min_f32(lmsNormCoeff_f32, NUMTAPS, &minValue, &index);
00224
00225   if (minValue > DELTA_COEFF)
00226   {
00227       status = ARM_MATH_TEST_FAILURE;
00228   }
00229
00230   /* ----------------------------------------------------------------------
00231   * Loop here if the signals did not pass the convergence check.
00232   * This denotes a test failure
00233   * ------------------------------------------------------------------- */
00234
00235   if( status != ARM_MATH_SUCCESS)
00236   {
00237       while(1);
00238   }
00239 }
00240
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CMSIS DSP Software Library: arm_sin_cos_example_f32.c File Reference

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  • File List
  • Globals
Defines | Functions | Variables

arm_sin_cos_example_f32.c File Reference

#include <math.h>
#include "arm_math.h"

Go to the source code of this file.

Defines

#define | MAX_BLOCKSIZE 32
#define | DELTA (0.000001f)

Functions

int32_t | main (void)

Variables

const float32_t | testInput_f32 [MAX_BLOCKSIZE]
const float32_t | testRefOutput_f32 = 1.000000000
uint32_t | blockSize = 32
float32_t testOutput
float32_t cosOutput
float32_t sinOutput
float32_t cosSquareOutput
float32_t sinSquareOutput
arm_status status

Define Documentation

#define MAX_BLOCKSIZE 32

Definition at line 74 of file arm_sin_cos_example_f32.c.

#define DELTA (0.000001f)

Definition at line 75 of file arm_sin_cos_example_f32.c.

Function Documentation

int32_t main ( void )

Definition at line 111 of file arm_sin_cos_example_f32.c.

Variable Documentation

const float32_t testInput_f32[MAX_BLOCKSIZE]
Initial value:

{
    -1.244916875853235400,  -4.793533929171324800,  0.360705030233248850,   0.827929644170887320,   -3.299532218312426900,  3.427441903227623800,   3.422401784294607700,   -0.108308165334010680,
    0.941943896490312180,   0.502609575000365850,   -0.537345278736373500,  2.088817392965764500,   -1.693168684143455700,  6.283185307179590700,   -0.392545884746175080,  0.327893095115825040,
    3.070147440456292300,   0.170611405884662230,   -0.275275082396073010,  -2.395492805446796300,  0.847311163536506600,   -3.845517018083148800,  2.055818378415868300,   4.672594161978930800,
    -1.990923030266425800,  2.469305197656249500,   3.609002606064021000,   -4.586736582331667500,  -4.147080139136136300,  1.643756718868359500,   -1.150866392366494800,  1.985805026477433800

}

Definition at line 83 of file arm_sin_cos_example_f32.c.

const float32_t testRefOutput_f32 = 1.000000000

Definition at line 93 of file arm_sin_cos_example_f32.c.

uint32_t blockSize = 32

Definition at line 98 of file arm_sin_cos_example_f32.c.

float32_t testOutput

Definition at line 99 of file arm_sin_cos_example_f32.c.

float32_t cosOutput
Examples:
arm_sin_cos_example_f32.c.

Definition at line 100 of file arm_sin_cos_example_f32.c.

float32_t sinOutput
Examples:
arm_sin_cos_example_f32.c.

Definition at line 101 of file arm_sin_cos_example_f32.c.

float32_t cosSquareOutput
Examples:
arm_sin_cos_example_f32.c.

Definition at line 102 of file arm_sin_cos_example_f32.c.

float32_t sinSquareOutput
Examples:
arm_sin_cos_example_f32.c.

Definition at line 103 of file arm_sin_cos_example_f32.c.

arm_status status

Definition at line 109 of file arm_sin_cos_example_f32.c.

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CMSIS DSP Software Library: arm_sin_cos_example_f32.c Source File

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  • File List
  • Globals

arm_sin_cos_example_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        29. November 2010
00005 * $Revision:    V1.0.3
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_sin_cos_example_f32.c
00009 *
00010 * Description:  Example code demonstrating sin and cos calculation of input signal.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 *
00015 * Version 1.0.3 2010/11/29
00016 *    Re-organized the CMSIS folders and updated documentation.
00017 *
00018 * Version 1.0.1 2010/10/05 KK
00019 *    Production release and review comments incorporated.
00020 *
00021 * Version 1.0.0 2010/09/20 KK
00022 *    Production release and review comments incorporated.
00023 * ------------------------------------------------------------------- */
00024
00068 #include <math.h>
00069 #include "arm_math.h"
00070
00071 /* ----------------------------------------------------------------------
00072 * Defines each of the tests performed
00073 * ------------------------------------------------------------------- */
00074 #define MAX_BLOCKSIZE   32
00075 #define DELTA           (0.000001f)
00076
00077
00078 /* ----------------------------------------------------------------------
00079 * Test input data for Floating point sin_cos example for 32-blockSize
00080 * Generated by the MATLAB randn() function
00081 * ------------------------------------------------------------------- */
00082
00083 const float32_t testInput_f32[MAX_BLOCKSIZE] =
00084 {
00085     -1.244916875853235400,  -4.793533929171324800,  0.360705030233248850,   0.827929644170887320,   -3.299532218312426900,  3.427441903227623800,   3.422401784294607700,   -0.108308165334010680,
00086     0.941943896490312180,   0.502609575000365850,   -0.537345278736373500,  2.088817392965764500,   -1.693168684143455700,  6.283185307179590700,   -0.392545884746175080,  0.327893095115825040,
00087     3.070147440456292300,   0.170611405884662230,   -0.275275082396073010,  -2.395492805446796300,  0.847311163536506600,   -3.845517018083148800,  2.055818378415868300,   4.672594161978930800,
00088     -1.990923030266425800,  2.469305197656249500,   3.609002606064021000,   -4.586736582331667500,  -4.147080139136136300,  1.643756718868359500,   -1.150866392366494800,  1.985805026477433800
00089
00090
00091 };
00092
00093 const float32_t testRefOutput_f32 = 1.000000000;
00094
00095 /* ----------------------------------------------------------------------
00096 * Declare Global variables
00097 * ------------------------------------------------------------------- */
00098 uint32_t blockSize = 32;
00099 float32_t  testOutput;
00100 float32_t  cosOutput;
00101 float32_t  sinOutput;
00102 float32_t  cosSquareOutput;
00103 float32_t  sinSquareOutput;
00104
00105 /* ----------------------------------------------------------------------
00106 * Max magnitude FFT Bin test
00107 * ------------------------------------------------------------------- */
00108
00109 arm_status status;
00110
00111 int32_t main(void)
00112 {
00113     float32_t diff;
00114     uint32_t i;
00115
00116     for(i=0; i< blockSize; i++)
00117     {
00118         cosOutput = arm_cos_f32(testInput_f32[i]);
00119         sinOutput = arm_sin_f32(testInput_f32[i]);
00120
00121         arm_mult_f32(&cosOutput, &cosOutput, &cosSquareOutput, 1);
00122         arm_mult_f32(&sinOutput, &sinOutput, &sinSquareOutput, 1);
00123
00124         arm_add_f32(&cosSquareOutput, &sinSquareOutput, &testOutput, 1);
00125
00126         /* absolute value of difference between ref and test */
00127         diff = fabsf(testRefOutput_f32 - testOutput);
00128
00129         /* Comparison of sin_cos value with reference */
00130         if(diff > DELTA)
00131         {
00132            status = ARM_MATH_TEST_FAILURE;
00133         }
00134
00135         if( status == ARM_MATH_TEST_FAILURE)
00136         {
00137            while(1);
00138         }
00139
00140     }
00141 }
00142
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CMSIS DSP Software Library: arm_sin_cos_f32.c File Reference

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  • File List
  • Globals
Functions | Variables

arm_sin_cos_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void | arm_sin_cos_f32 (float32_t theta, float32_t *pSinVal, float32_t *pCosVal)

Variables

static const float32_t | cosTable [360]
static const float32_t | sinTable [360]
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
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CMSIS DSP Software Library: arm_sin_cos_q31.c File Reference

  • Examples
  • File List
  • Globals
Functions | Variables

arm_sin_cos_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void | arm_sin_cos_q31 (q31_t theta, q31_t *pSinVal, q31_t *pCosVal)

Variables

static const int32_t | sinTableQ31 [360]
static const int32_t | cosTableQ31 [360]
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
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CMSIS DSP Software Library: arm_sin_cos_q31.c Source File

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  • File List
  • Globals

arm_sin_cos_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_sin_cos_q31.c
00009 *
00010 * Description:  Cosine & Sine calculation for Q31 values.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00051 static const int32_t sinTableQ31[360] = {
00052
00053   0x0, 0xfdc41e9b, 0xfb8869ce, 0xf94d0e2e, 0xf7123849, 0xf4d814a4, 0xf29ecfb2,
00054   0xf06695da,
00055   0xee2f9369, 0xebf9f498, 0xe9c5e582, 0xe7939223, 0xe5632654, 0xe334cdc9,
00056   0xe108b40d, 0xdedf047d,
00057   0xdcb7ea46, 0xda939061, 0xd8722192, 0xd653c860, 0xd438af17, 0xd220ffc0,
00058   0xd00ce422, 0xcdfc85bb,
00059   0xcbf00dbe, 0xc9e7a512, 0xc7e3744b, 0xc5e3a3a9, 0xc3e85b18, 0xc1f1c224,
00060   0xc0000000, 0xbe133b7c,
00061   0xbc2b9b05, 0xba4944a2, 0xb86c5df0, 0xb6950c1e, 0xb4c373ee, 0xb2f7b9af,
00062   0xb1320139, 0xaf726def,
00063   0xadb922b7, 0xac0641fb, 0xaa59eda4, 0xa8b4471a, 0xa7156f3c, 0xa57d8666,
00064   0xa3ecac65, 0xa263007d,
00065   0xa0e0a15f, 0x9f65ad2d, 0x9df24175, 0x9c867b2c, 0x9b2276b0, 0x99c64fc5,
00066   0x98722192, 0x9726069c,
00067   0x95e218c9, 0x94a6715d, 0x937328f5, 0x92485786, 0x9126145f, 0x900c7621,
00068   0x8efb92c2, 0x8df37f8b,
00069   0x8cf45113, 0x8bfe1b3f, 0x8b10f144, 0x8a2ce59f, 0x89520a1a, 0x88806fc4,
00070   0x87b826f7, 0x86f93f50,
00071   0x8643c7b3, 0x8597ce46, 0x84f56073, 0x845c8ae3, 0x83cd5982, 0x8347d77b,
00072   0x82cc0f36, 0x825a0a5b,
00073   0x81f1d1ce, 0x81936daf, 0x813ee55b, 0x80f43f69, 0x80b381ac, 0x807cb130,
00074   0x804fd23a, 0x802ce84c,
00075   0x8013f61d, 0x8004fda0, 0x80000000, 0x8004fda0, 0x8013f61d, 0x802ce84c,
00076   0x804fd23a, 0x807cb130,
00077   0x80b381ac, 0x80f43f69, 0x813ee55b, 0x81936daf, 0x81f1d1ce, 0x825a0a5b,
00078   0x82cc0f36, 0x8347d77b,
00079   0x83cd5982, 0x845c8ae3, 0x84f56073, 0x8597ce46, 0x8643c7b3, 0x86f93f50,
00080   0x87b826f7, 0x88806fc4,
00081   0x89520a1a, 0x8a2ce59f, 0x8b10f144, 0x8bfe1b3f, 0x8cf45113, 0x8df37f8b,
00082   0x8efb92c2, 0x900c7621,
00083   0x9126145f, 0x92485786, 0x937328f5, 0x94a6715d, 0x95e218c9, 0x9726069c,
00084   0x98722192, 0x99c64fc5,
00085   0x9b2276b0, 0x9c867b2c, 0x9df24175, 0x9f65ad2d, 0xa0e0a15f, 0xa263007d,
00086   0xa3ecac65, 0xa57d8666,
00087   0xa7156f3c, 0xa8b4471a, 0xaa59eda4, 0xac0641fb, 0xadb922b7, 0xaf726def,
00088   0xb1320139, 0xb2f7b9af,
00089   0xb4c373ee, 0xb6950c1e, 0xb86c5df0, 0xba4944a2, 0xbc2b9b05, 0xbe133b7c,
00090   0xc0000000, 0xc1f1c224,
00091   0xc3e85b18, 0xc5e3a3a9, 0xc7e3744b, 0xc9e7a512, 0xcbf00dbe, 0xcdfc85bb,
00092   0xd00ce422, 0xd220ffc0,
00093   0xd438af17, 0xd653c860, 0xd8722192, 0xda939061, 0xdcb7ea46, 0xdedf047d,
00094   0xe108b40d, 0xe334cdc9,
00095   0xe5632654, 0xe7939223, 0xe9c5e582, 0xebf9f498, 0xee2f9369, 0xf06695da,
00096   0xf29ecfb2, 0xf4d814a4,
00097   0xf7123849, 0xf94d0e2e, 0xfb8869ce, 0xfdc41e9b, 0x0, 0x23be165, 0x4779632,
00098   0x6b2f1d2,
00099   0x8edc7b7, 0xb27eb5c, 0xd61304e, 0xf996a26, 0x11d06c97, 0x14060b68,
00100   0x163a1a7e, 0x186c6ddd,
00101   0x1a9cd9ac, 0x1ccb3237, 0x1ef74bf3, 0x2120fb83, 0x234815ba, 0x256c6f9f,
00102   0x278dde6e, 0x29ac37a0,
00103   0x2bc750e9, 0x2ddf0040, 0x2ff31bde, 0x32037a45, 0x340ff242, 0x36185aee,
00104   0x381c8bb5, 0x3a1c5c57,
00105   0x3c17a4e8, 0x3e0e3ddc, 0x40000000, 0x41ecc484, 0x43d464fb, 0x45b6bb5e,
00106   0x4793a210, 0x496af3e2,
00107   0x4b3c8c12, 0x4d084651, 0x4ecdfec7, 0x508d9211, 0x5246dd49, 0x53f9be05,
00108   0x55a6125c, 0x574bb8e6,
00109   0x58ea90c4, 0x5a82799a, 0x5c13539b, 0x5d9cff83, 0x5f1f5ea1, 0x609a52d3,
00110   0x620dbe8b, 0x637984d4,
00111   0x64dd8950, 0x6639b03b, 0x678dde6e, 0x68d9f964, 0x6a1de737, 0x6b598ea3,
00112   0x6c8cd70b, 0x6db7a87a,
00113   0x6ed9eba1, 0x6ff389df, 0x71046d3e, 0x720c8075, 0x730baeed, 0x7401e4c1,
00114   0x74ef0ebc, 0x75d31a61,
00115   0x76adf5e6, 0x777f903c, 0x7847d909, 0x7906c0b0, 0x79bc384d, 0x7a6831ba,
00116   0x7b0a9f8d, 0x7ba3751d,
00117   0x7c32a67e, 0x7cb82885, 0x7d33f0ca, 0x7da5f5a5, 0x7e0e2e32, 0x7e6c9251,
00118   0x7ec11aa5, 0x7f0bc097,
00119   0x7f4c7e54, 0x7f834ed0, 0x7fb02dc6, 0x7fd317b4, 0x7fec09e3, 0x7ffb0260,
00120   0x7fffffff, 0x7ffb0260,
00121   0x7fec09e3, 0x7fd317b4, 0x7fb02dc6, 0x7f834ed0, 0x7f4c7e54, 0x7f0bc097,
00122   0x7ec11aa5, 0x7e6c9251,
00123   0x7e0e2e32, 0x7da5f5a5, 0x7d33f0ca, 0x7cb82885, 0x7c32a67e, 0x7ba3751d,
00124   0x7b0a9f8d, 0x7a6831ba,
00125   0x79bc384d, 0x7906c0b0, 0x7847d909, 0x777f903c, 0x76adf5e6, 0x75d31a61,
00126   0x74ef0ebc, 0x7401e4c1,
00127   0x730baeed, 0x720c8075, 0x71046d3e, 0x6ff389df, 0x6ed9eba1, 0x6db7a87a,
00128   0x6c8cd70b, 0x6b598ea3,
00129   0x6a1de737, 0x68d9f964, 0x678dde6e, 0x6639b03b, 0x64dd8950, 0x637984d4,
00130   0x620dbe8b, 0x609a52d3,
00131   0x5f1f5ea1, 0x5d9cff83, 0x5c13539b, 0x5a82799a, 0x58ea90c4, 0x574bb8e6,
00132   0x55a6125c, 0x53f9be05,
00133   0x5246dd49, 0x508d9211, 0x4ecdfec7, 0x4d084651, 0x4b3c8c12, 0x496af3e2,
00134   0x4793a210, 0x45b6bb5e,
00135   0x43d464fb, 0x41ecc484, 0x40000000, 0x3e0e3ddc, 0x3c17a4e8, 0x3a1c5c57,
00136   0x381c8bb5, 0x36185aee,
00137   0x340ff242, 0x32037a45, 0x2ff31bde, 0x2ddf0040, 0x2bc750e9, 0x29ac37a0,
00138   0x278dde6e, 0x256c6f9f,
00139   0x234815ba, 0x2120fb83, 0x1ef74bf3, 0x1ccb3237, 0x1a9cd9ac, 0x186c6ddd,
00140   0x163a1a7e, 0x14060b68,
00141   0x11d06c97, 0xf996a26, 0xd61304e, 0xb27eb5c, 0x8edc7b7, 0x6b2f1d2,
00142   0x4779632, 0x23be165,
00143
00144
00145 };
00146
00157 static const int32_t cosTableQ31[360] = {
00158   0x80000000, 0x8004fda0, 0x8013f61d, 0x802ce84c, 0x804fd23a, 0x807cb130,
00159   0x80b381ac, 0x80f43f69,
00160   0x813ee55b, 0x81936daf, 0x81f1d1ce, 0x825a0a5b, 0x82cc0f36, 0x8347d77b,
00161   0x83cd5982, 0x845c8ae3,
00162   0x84f56073, 0x8597ce46, 0x8643c7b3, 0x86f93f50, 0x87b826f7, 0x88806fc4,
00163   0x89520a1a, 0x8a2ce59f,
00164   0x8b10f144, 0x8bfe1b3f, 0x8cf45113, 0x8df37f8b, 0x8efb92c2, 0x900c7621,
00165   0x9126145f, 0x92485786,
00166   0x937328f5, 0x94a6715d, 0x95e218c9, 0x9726069c, 0x98722192, 0x99c64fc5,
00167   0x9b2276b0, 0x9c867b2c,
00168   0x9df24175, 0x9f65ad2d, 0xa0e0a15f, 0xa263007d, 0xa3ecac65, 0xa57d8666,
00169   0xa7156f3c, 0xa8b4471a,
00170   0xaa59eda4, 0xac0641fb, 0xadb922b7, 0xaf726def, 0xb1320139, 0xb2f7b9af,
00171   0xb4c373ee, 0xb6950c1e,
00172   0xb86c5df0, 0xba4944a2, 0xbc2b9b05, 0xbe133b7c, 0xc0000000, 0xc1f1c224,
00173   0xc3e85b18, 0xc5e3a3a9,
00174   0xc7e3744b, 0xc9e7a512, 0xcbf00dbe, 0xcdfc85bb, 0xd00ce422, 0xd220ffc0,
00175   0xd438af17, 0xd653c860,
00176   0xd8722192, 0xda939061, 0xdcb7ea46, 0xdedf047d, 0xe108b40d, 0xe334cdc9,
00177   0xe5632654, 0xe7939223,
00178   0xe9c5e582, 0xebf9f498, 0xee2f9369, 0xf06695da, 0xf29ecfb2, 0xf4d814a4,
00179   0xf7123849, 0xf94d0e2e,
00180   0xfb8869ce, 0xfdc41e9b, 0x0, 0x23be165, 0x4779632, 0x6b2f1d2, 0x8edc7b7,
00181   0xb27eb5c,
00182   0xd61304e, 0xf996a26, 0x11d06c97, 0x14060b68, 0x163a1a7e, 0x186c6ddd,
00183   0x1a9cd9ac, 0x1ccb3237,
00184   0x1ef74bf3, 0x2120fb83, 0x234815ba, 0x256c6f9f, 0x278dde6e, 0x29ac37a0,
00185   0x2bc750e9, 0x2ddf0040,
00186   0x2ff31bde, 0x32037a45, 0x340ff242, 0x36185aee, 0x381c8bb5, 0x3a1c5c57,
00187   0x3c17a4e8, 0x3e0e3ddc,
00188   0x40000000, 0x41ecc484, 0x43d464fb, 0x45b6bb5e, 0x4793a210, 0x496af3e2,
00189   0x4b3c8c12, 0x4d084651,
00190   0x4ecdfec7, 0x508d9211, 0x5246dd49, 0x53f9be05, 0x55a6125c, 0x574bb8e6,
00191   0x58ea90c4, 0x5a82799a,
00192   0x5c13539b, 0x5d9cff83, 0x5f1f5ea1, 0x609a52d3, 0x620dbe8b, 0x637984d4,
00193   0x64dd8950, 0x6639b03b,
00194   0x678dde6e, 0x68d9f964, 0x6a1de737, 0x6b598ea3, 0x6c8cd70b, 0x6db7a87a,
00195   0x6ed9eba1, 0x6ff389df,
00196   0x71046d3e, 0x720c8075, 0x730baeed, 0x7401e4c1, 0x74ef0ebc, 0x75d31a61,
00197   0x76adf5e6, 0x777f903c,
00198   0x7847d909, 0x7906c0b0, 0x79bc384d, 0x7a6831ba, 0x7b0a9f8d, 0x7ba3751d,
00199   0x7c32a67e, 0x7cb82885,
00200   0x7d33f0ca, 0x7da5f5a5, 0x7e0e2e32, 0x7e6c9251, 0x7ec11aa5, 0x7f0bc097,
00201   0x7f4c7e54, 0x7f834ed0,
00202   0x7fb02dc6, 0x7fd317b4, 0x7fec09e3, 0x7ffb0260, 0x7fffffff, 0x7ffb0260,
00203   0x7fec09e3, 0x7fd317b4,
00204   0x7fb02dc6, 0x7f834ed0, 0x7f4c7e54, 0x7f0bc097, 0x7ec11aa5, 0x7e6c9251,
00205   0x7e0e2e32, 0x7da5f5a5,
00206   0x7d33f0ca, 0x7cb82885, 0x7c32a67e, 0x7ba3751d, 0x7b0a9f8d, 0x7a6831ba,
00207   0x79bc384d, 0x7906c0b0,
00208   0x7847d909, 0x777f903c, 0x76adf5e6, 0x75d31a61, 0x74ef0ebc, 0x7401e4c1,
00209   0x730baeed, 0x720c8075,
00210   0x71046d3e, 0x6ff389df, 0x6ed9eba1, 0x6db7a87a, 0x6c8cd70b, 0x6b598ea3,
00211   0x6a1de737, 0x68d9f964,
00212   0x678dde6e, 0x6639b03b, 0x64dd8950, 0x637984d4, 0x620dbe8b, 0x609a52d3,
00213   0x5f1f5ea1, 0x5d9cff83,
00214   0x5c13539b, 0x5a82799a, 0x58ea90c4, 0x574bb8e6, 0x55a6125c, 0x53f9be05,
00215   0x5246dd49, 0x508d9211,
00216   0x4ecdfec7, 0x4d084651, 0x4b3c8c12, 0x496af3e2, 0x4793a210, 0x45b6bb5e,
00217   0x43d464fb, 0x41ecc484,
00218   0x40000000, 0x3e0e3ddc, 0x3c17a4e8, 0x3a1c5c57, 0x381c8bb5, 0x36185aee,
00219   0x340ff242, 0x32037a45,
00220   0x2ff31bde, 0x2ddf0040, 0x2bc750e9, 0x29ac37a0, 0x278dde6e, 0x256c6f9f,
00221   0x234815ba, 0x2120fb83,
00222   0x1ef74bf3, 0x1ccb3237, 0x1a9cd9ac, 0x186c6ddd, 0x163a1a7e, 0x14060b68,
00223   0x11d06c97, 0xf996a26,
00224   0xd61304e, 0xb27eb5c, 0x8edc7b7, 0x6b2f1d2, 0x4779632, 0x23be165, 0x0,
00225   0xfdc41e9b,
00226   0xfb8869ce, 0xf94d0e2e, 0xf7123849, 0xf4d814a4, 0xf29ecfb2, 0xf06695da,
00227   0xee2f9369, 0xebf9f498,
00228   0xe9c5e582, 0xe7939223, 0xe5632654, 0xe334cdc9, 0xe108b40d, 0xdedf047d,
00229   0xdcb7ea46, 0xda939061,
00230   0xd8722192, 0xd653c860, 0xd438af17, 0xd220ffc0, 0xd00ce422, 0xcdfc85bb,
00231   0xcbf00dbe, 0xc9e7a512,
00232   0xc7e3744b, 0xc5e3a3a9, 0xc3e85b18, 0xc1f1c224, 0xc0000000, 0xbe133b7c,
00233   0xbc2b9b05, 0xba4944a2,
00234   0xb86c5df0, 0xb6950c1e, 0xb4c373ee, 0xb2f7b9af, 0xb1320139, 0xaf726def,
00235   0xadb922b7, 0xac0641fb,
00236   0xaa59eda4, 0xa8b4471a, 0xa7156f3c, 0xa57d8666, 0xa3ecac65, 0xa263007d,
00237   0xa0e0a15f, 0x9f65ad2d,
00238   0x9df24175, 0x9c867b2c, 0x9b2276b0, 0x99c64fc5, 0x98722192, 0x9726069c,
00239   0x95e218c9, 0x94a6715d,
00240   0x937328f5, 0x92485786, 0x9126145f, 0x900c7621, 0x8efb92c2, 0x8df37f8b,
00241   0x8cf45113, 0x8bfe1b3f,
00242   0x8b10f144, 0x8a2ce59f, 0x89520a1a, 0x88806fc4, 0x87b826f7, 0x86f93f50,
00243   0x8643c7b3, 0x8597ce46,
00244   0x84f56073, 0x845c8ae3, 0x83cd5982, 0x8347d77b, 0x82cc0f36, 0x825a0a5b,
00245   0x81f1d1ce, 0x81936daf,
00246   0x813ee55b, 0x80f43f69, 0x80b381ac, 0x807cb130, 0x804fd23a, 0x802ce84c,
00247   0x8013f61d, 0x8004fda0,
00248
00249 };
00250
00251
00264 void arm_sin_cos_q31(
00265   q31_t theta,
00266   q31_t * pSinVal,
00267   q31_t * pCosVal)
00268 {
00269   q31_t x0;                                      /* Nearest input value */
00270   q31_t y0, y1;                                  /* Nearest output values */
00271   q31_t xSpacing = INPUT_SPACING;                /* Spaing between inputs */
00272   uint32_t i;                                    /* Index */
00273   q31_t oneByXSpacing;                           /* 1/ xSpacing value */
00274   q31_t out;                                     /* temporary variable */
00275   uint32_t sign_bits;                            /* No.of sign bits */
00276   uint32_t firstX = 0x80000000;                  /* First X value */
00277
00278   /* Calculation of index */
00279   i = ((uint32_t) theta - firstX) / (uint32_t) xSpacing;
00280
00281   /* Calculation of first nearest input value */
00282   x0 = (q31_t) firstX + ((q31_t) i * xSpacing);
00283
00284   /* Reading nearest sine output values from table */
00285   y0 = sinTableQ31[i];
00286   y1 = sinTableQ31[i + 1u];
00287
00288   /* Calculation of 1/(x1-x0) */
00289   /* (x1-x0) is xSpacing which is fixed value */
00290   sign_bits = 8u;
00291   oneByXSpacing = 0x5A000000;
00292
00293   /* Calculation of (theta - x0)/(x1-x0) */
00294   out =
00295     (((q31_t) (((q63_t) (theta - x0) * oneByXSpacing) >> 32)) << sign_bits);
00296
00297   /* Calculation of y0 + (y1 - y0) * ((theta - x0)/(x1-x0)) */
00298   *pSinVal = y0 + ((q31_t) (((q63_t) (y1 - y0) * out) >> 30));
00299
00300   /* Reading nearest cosine output values from table */
00301   y0 = cosTableQ31[i];
00302   y1 = cosTableQ31[i + 1u];
00303
00304   /* Calculation of y0 + (y1 - y0) * ((theta - x0)/(x1-x0)) */
00305   *pCosVal = y0 + ((q31_t) (((q63_t) (y1 - y0) * out) >> 30));
00306
00307 }
00308
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CMSIS DSP Software Library: arm_sin_f32.c File Reference

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Functions | Variables

arm_sin_f32.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

float32_t | arm_sin_f32 (float32_t x)

Variables

static const float32_t | sinTable [259]
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
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CMSIS DSP Software Library: arm_sin_f32.c Source File

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arm_sin_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_sin_f32.c
00009 *
00010 * Description:  Fast sine calculation for floating-point values.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00088 static const float32_t sinTable[259] = {
00089   -0.024541229009628296f, 0.000000000000000000f, 0.024541229009628296f,
00090   0.049067676067352295f, 0.073564566671848297f, 0.098017141222953796f,
00091   0.122410677373409270f, 0.146730467677116390f,
00092   0.170961886644363400f, 0.195090323686599730f, 0.219101235270500180f,
00093   0.242980182170867920f, 0.266712754964828490f, 0.290284663438797000f,
00094   0.313681751489639280f, 0.336889863014221190f,
00095   0.359895050525665280f, 0.382683426141738890f, 0.405241310596466060f,
00096   0.427555084228515630f, 0.449611335992813110f, 0.471396744251251220f,
00097   0.492898195981979370f, 0.514102756977081300f,
00098   0.534997642040252690f, 0.555570244789123540f, 0.575808167457580570f,
00099   0.595699310302734380f, 0.615231573581695560f, 0.634393274784088130f,
00100   0.653172850608825680f, 0.671558976173400880f,
00101   0.689540565013885500f, 0.707106769084930420f, 0.724247097969055180f,
00102   0.740951120853424070f, 0.757208824157714840f, 0.773010432720184330f,
00103   0.788346409797668460f, 0.803207516670227050f,
00104   0.817584812641143800f, 0.831469595432281490f, 0.844853579998016360f,
00105   0.857728600502014160f, 0.870086967945098880f, 0.881921291351318360f,
00106   0.893224298954010010f, 0.903989315032958980f,
00107   0.914209783077239990f, 0.923879504203796390f, 0.932992815971374510f,
00108   0.941544055938720700f, 0.949528157711029050f, 0.956940352916717530f,
00109   0.963776051998138430f, 0.970031261444091800f,
00110   0.975702106952667240f, 0.980785250663757320f, 0.985277652740478520f,
00111   0.989176511764526370f, 0.992479562759399410f, 0.995184719562530520f,
00112   0.997290432453155520f, 0.998795449733734130f,
00113   0.999698817729949950f, 1.000000000000000000f, 0.999698817729949950f,
00114   0.998795449733734130f, 0.997290432453155520f, 0.995184719562530520f,
00115   0.992479562759399410f, 0.989176511764526370f,
00116   0.985277652740478520f, 0.980785250663757320f, 0.975702106952667240f,
00117   0.970031261444091800f, 0.963776051998138430f, 0.956940352916717530f,
00118   0.949528157711029050f, 0.941544055938720700f,
00119   0.932992815971374510f, 0.923879504203796390f, 0.914209783077239990f,
00120   0.903989315032958980f, 0.893224298954010010f, 0.881921291351318360f,
00121   0.870086967945098880f, 0.857728600502014160f,
00122   0.844853579998016360f, 0.831469595432281490f, 0.817584812641143800f,
00123   0.803207516670227050f, 0.788346409797668460f, 0.773010432720184330f,
00124   0.757208824157714840f, 0.740951120853424070f,
00125   0.724247097969055180f, 0.707106769084930420f, 0.689540565013885500f,
00126   0.671558976173400880f, 0.653172850608825680f, 0.634393274784088130f,
00127   0.615231573581695560f, 0.595699310302734380f,
00128   0.575808167457580570f, 0.555570244789123540f, 0.534997642040252690f,
00129   0.514102756977081300f, 0.492898195981979370f, 0.471396744251251220f,
00130   0.449611335992813110f, 0.427555084228515630f,
00131   0.405241310596466060f, 0.382683426141738890f, 0.359895050525665280f,
00132   0.336889863014221190f, 0.313681751489639280f, 0.290284663438797000f,
00133   0.266712754964828490f, 0.242980182170867920f,
00134   0.219101235270500180f, 0.195090323686599730f, 0.170961886644363400f,
00135   0.146730467677116390f, 0.122410677373409270f, 0.098017141222953796f,
00136   0.073564566671848297f, 0.049067676067352295f,
00137   0.024541229009628296f, 0.000000000000000122f, -0.024541229009628296f,
00138   -0.049067676067352295f, -0.073564566671848297f, -0.098017141222953796f,
00139   -0.122410677373409270f, -0.146730467677116390f,
00140   -0.170961886644363400f, -0.195090323686599730f, -0.219101235270500180f,
00141   -0.242980182170867920f, -0.266712754964828490f, -0.290284663438797000f,
00142   -0.313681751489639280f, -0.336889863014221190f,
00143   -0.359895050525665280f, -0.382683426141738890f, -0.405241310596466060f,
00144   -0.427555084228515630f, -0.449611335992813110f, -0.471396744251251220f,
00145   -0.492898195981979370f, -0.514102756977081300f,
00146   -0.534997642040252690f, -0.555570244789123540f, -0.575808167457580570f,
00147   -0.595699310302734380f, -0.615231573581695560f, -0.634393274784088130f,
00148   -0.653172850608825680f, -0.671558976173400880f,
00149   -0.689540565013885500f, -0.707106769084930420f, -0.724247097969055180f,
00150   -0.740951120853424070f, -0.757208824157714840f, -0.773010432720184330f,
00151   -0.788346409797668460f, -0.803207516670227050f,
00152   -0.817584812641143800f, -0.831469595432281490f, -0.844853579998016360f,
00153   -0.857728600502014160f, -0.870086967945098880f, -0.881921291351318360f,
00154   -0.893224298954010010f, -0.903989315032958980f,
00155   -0.914209783077239990f, -0.923879504203796390f, -0.932992815971374510f,
00156   -0.941544055938720700f, -0.949528157711029050f, -0.956940352916717530f,
00157   -0.963776051998138430f, -0.970031261444091800f,
00158   -0.975702106952667240f, -0.980785250663757320f, -0.985277652740478520f,
00159   -0.989176511764526370f, -0.992479562759399410f, -0.995184719562530520f,
00160   -0.997290432453155520f, -0.998795449733734130f,
00161   -0.999698817729949950f, -1.000000000000000000f, -0.999698817729949950f,
00162   -0.998795449733734130f, -0.997290432453155520f, -0.995184719562530520f,
00163   -0.992479562759399410f, -0.989176511764526370f,
00164   -0.985277652740478520f, -0.980785250663757320f, -0.975702106952667240f,
00165   -0.970031261444091800f, -0.963776051998138430f, -0.956940352916717530f,
00166   -0.949528157711029050f, -0.941544055938720700f,
00167   -0.932992815971374510f, -0.923879504203796390f, -0.914209783077239990f,
00168   -0.903989315032958980f, -0.893224298954010010f, -0.881921291351318360f,
00169   -0.870086967945098880f, -0.857728600502014160f,
00170   -0.844853579998016360f, -0.831469595432281490f, -0.817584812641143800f,
00171   -0.803207516670227050f, -0.788346409797668460f, -0.773010432720184330f,
00172   -0.757208824157714840f, -0.740951120853424070f,
00173   -0.724247097969055180f, -0.707106769084930420f, -0.689540565013885500f,
00174   -0.671558976173400880f, -0.653172850608825680f, -0.634393274784088130f,
00175   -0.615231573581695560f, -0.595699310302734380f,
00176   -0.575808167457580570f, -0.555570244789123540f, -0.534997642040252690f,
00177   -0.514102756977081300f, -0.492898195981979370f, -0.471396744251251220f,
00178   -0.449611335992813110f, -0.427555084228515630f,
00179   -0.405241310596466060f, -0.382683426141738890f, -0.359895050525665280f,
00180   -0.336889863014221190f, -0.313681751489639280f, -0.290284663438797000f,
00181   -0.266712754964828490f, -0.242980182170867920f,
00182   -0.219101235270500180f, -0.195090323686599730f, -0.170961886644363400f,
00183   -0.146730467677116390f, -0.122410677373409270f, -0.098017141222953796f,
00184   -0.073564566671848297f, -0.049067676067352295f,
00185   -0.024541229009628296f, -0.000000000000000245f, 0.024541229009628296f
00186 };
00187
00188
00195 float32_t arm_sin_f32(
00196   float32_t x)
00197 {
00198   float32_t sinVal, fract, in;                   /* Temporary variables for input, output */
00199   uint32_t index;                                /* Index variable */
00200   uint32_t tableSize = (uint32_t) TABLE_SIZE;    /* Initialise tablesize */
00201   float32_t wa, wb, wc, wd;                      /* Cubic interpolation coefficients */
00202   float32_t a, b, c, d;                          /* Four nearest output values */
00203   float32_t *tablePtr;                           /* Pointer to table */
00204   int32_t n;
00205
00206   /* input x is in radians */
00207   /* Scale the input to [0 1] range from [0 2*PI] , divide input by 2*pi */
00208   in = x * 0.159154943092f;
00209
00210   /* Calculation of floor value of input */
00211   n = (int32_t) in;
00212
00213   /* Make negative values towards -infinity */
00214   if(x < 0.0f)
00215   {
00216     n = n - 1;
00217   }
00218
00219   /* Map input value to [0 1] */
00220   in = in - (float32_t) n;
00221
00222   /* Calculation of index of the table */
00223   index = (uint32_t) (tableSize * in);
00224
00225   /* fractional value calculation */
00226   fract = ((float32_t) tableSize * in) - (float32_t) index;
00227
00228   /* Initialise table pointer */
00229   tablePtr = (float32_t *) & sinTable[index];
00230
00231   /* Read four nearest values of output value from the sin table */
00232   a = *tablePtr++;
00233   b = *tablePtr++;
00234   c = *tablePtr++;
00235   d = *tablePtr++;
00236
00237   /* Cubic interpolation process */
00238   wa = -(((0.166666667f) * (fract * (fract * fract))) +
00239          ((0.3333333333333f) * fract)) + ((0.5f) * (fract * fract));
00240   wb = (((0.5f) * (fract * (fract * fract))) -
00241         ((fract * fract) + ((0.5f) * fract))) + 1.0f;
00242   wc = (-((0.5f) * (fract * (fract * fract))) +
00243         ((0.5f) * (fract * fract))) + fract;
00244   wd = ((0.166666667f) * (fract * (fract * fract))) -
00245     ((0.166666667f) * fract);
00246
00247   /* Calculate sin value */
00248   sinVal = ((a * wa) + (b * wb)) + ((c * wc) + (d * wd));
00249
00250   /* Return the output value */
00251   return (sinVal);
00252
00253 }
00254
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CMSIS DSP Software Library: arm_sin_q15.c File Reference

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arm_sin_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

q15_t | arm_sin_q15 (q15_t x)

Variables

static const q15_t | sinTableQ15 [259]
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CMSIS DSP Software Library: arm_sin_q15.c Source File

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arm_sin_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_sin_q15.c
00009 *
00010 * Description:  Fast sine calculation for Q15 values.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00061 static const q15_t sinTableQ15[259] = {
00062   0xfcdc, 0x0, 0x324, 0x648, 0x96b, 0xc8c, 0xfab, 0x12c8,
00063   0x15e2, 0x18f9, 0x1c0c, 0x1f1a, 0x2224, 0x2528, 0x2827, 0x2b1f,
00064   0x2e11, 0x30fc, 0x33df, 0x36ba, 0x398d, 0x3c57, 0x3f17, 0x41ce,
00065   0x447b, 0x471d, 0x49b4, 0x4c40, 0x4ec0, 0x5134, 0x539b, 0x55f6,
00066   0x5843, 0x5a82, 0x5cb4, 0x5ed7, 0x60ec, 0x62f2, 0x64e9, 0x66d0,
00067   0x68a7, 0x6a6e, 0x6c24, 0x6dca, 0x6f5f, 0x70e3, 0x7255, 0x73b6,
00068   0x7505, 0x7642, 0x776c, 0x7885, 0x798a, 0x7a7d, 0x7b5d, 0x7c2a,
00069   0x7ce4, 0x7d8a, 0x7e1e, 0x7e9d, 0x7f0a, 0x7f62, 0x7fa7, 0x7fd9,
00070   0x7ff6, 0x7fff, 0x7ff6, 0x7fd9, 0x7fa7, 0x7f62, 0x7f0a, 0x7e9d,
00071   0x7e1e, 0x7d8a, 0x7ce4, 0x7c2a, 0x7b5d, 0x7a7d, 0x798a, 0x7885,
00072   0x776c, 0x7642, 0x7505, 0x73b6, 0x7255, 0x70e3, 0x6f5f, 0x6dca,
00073   0x6c24, 0x6a6e, 0x68a7, 0x66d0, 0x64e9, 0x62f2, 0x60ec, 0x5ed7,
00074   0x5cb4, 0x5a82, 0x5843, 0x55f6, 0x539b, 0x5134, 0x4ec0, 0x4c40,
00075   0x49b4, 0x471d, 0x447b, 0x41ce, 0x3f17, 0x3c57, 0x398d, 0x36ba,
00076   0x33df, 0x30fc, 0x2e11, 0x2b1f, 0x2827, 0x2528, 0x2224, 0x1f1a,
00077   0x1c0c, 0x18f9, 0x15e2, 0x12c8, 0xfab, 0xc8c, 0x96b, 0x648,
00078   0x324, 0x0, 0xfcdc, 0xf9b8, 0xf695, 0xf374, 0xf055, 0xed38,
00079   0xea1e, 0xe707, 0xe3f4, 0xe0e6, 0xdddc, 0xdad8, 0xd7d9, 0xd4e1,
00080   0xd1ef, 0xcf04, 0xcc21, 0xc946, 0xc673, 0xc3a9, 0xc0e9, 0xbe32,
00081   0xbb85, 0xb8e3, 0xb64c, 0xb3c0, 0xb140, 0xaecc, 0xac65, 0xaa0a,
00082   0xa7bd, 0xa57e, 0xa34c, 0xa129, 0x9f14, 0x9d0e, 0x9b17, 0x9930,
00083   0x9759, 0x9592, 0x93dc, 0x9236, 0x90a1, 0x8f1d, 0x8dab, 0x8c4a,
00084   0x8afb, 0x89be, 0x8894, 0x877b, 0x8676, 0x8583, 0x84a3, 0x83d6,
00085   0x831c, 0x8276, 0x81e2, 0x8163, 0x80f6, 0x809e, 0x8059, 0x8027,
00086   0x800a, 0x8000, 0x800a, 0x8027, 0x8059, 0x809e, 0x80f6, 0x8163,
00087   0x81e2, 0x8276, 0x831c, 0x83d6, 0x84a3, 0x8583, 0x8676, 0x877b,
00088   0x8894, 0x89be, 0x8afb, 0x8c4a, 0x8dab, 0x8f1d, 0x90a1, 0x9236,
00089   0x93dc, 0x9592, 0x9759, 0x9930, 0x9b17, 0x9d0e, 0x9f14, 0xa129,
00090   0xa34c, 0xa57e, 0xa7bd, 0xaa0a, 0xac65, 0xaecc, 0xb140, 0xb3c0,
00091   0xb64c, 0xb8e3, 0xbb85, 0xbe32, 0xc0e9, 0xc3a9, 0xc673, 0xc946,
00092   0xcc21, 0xcf04, 0xd1ef, 0xd4e1, 0xd7d9, 0xdad8, 0xdddc, 0xe0e6,
00093   0xe3f4, 0xe707, 0xea1e, 0xed38, 0xf055, 0xf374, 0xf695, 0xf9b8,
00094   0xfcdc, 0x0, 0x324
00095 };
00096
00097
00106 q15_t arm_sin_q15(
00107   q15_t x)
00108 {
00109   q31_t sinVal;                                  /* Temporary variables output */
00110   q15_t *tablePtr;                               /* Pointer to table */
00111   q15_t fract, in, in2;                          /* Temporary variables for input, output */
00112   q31_t wa, wb, wc, wd;                          /* Cubic interpolation coefficients */
00113   q15_t a, b, c, d;                              /* Four nearest output values */
00114   q15_t fractCube, fractSquare;                  /* Temporary values for fractional value */
00115   q15_t oneBy6 = 0x1555;                         /* Fixed point value of 1/6 */
00116   q15_t tableSpacing = TABLE_SPACING_Q15;        /* Table spacing */
00117   int32_t index;                                 /* Index variable */
00118
00119   in = x;
00120
00121   /* Calculate the nearest index */
00122   index = (int32_t) in / tableSpacing;
00123
00124   /* Calculate the nearest value of input */
00125   in2 = (q15_t) ((index) * tableSpacing);
00126
00127   /* Calculation of fractional value */
00128   fract = (in - in2) << 8;
00129
00130   /* fractSquare = fract * fract */
00131   fractSquare = (q15_t) ((fract * fract) >> 15);
00132
00133   /* fractCube = fract * fract * fract */
00134   fractCube = (q15_t) ((fractSquare * fract) >> 15);
00135
00136   /* Initialise table pointer */
00137   tablePtr = (q15_t *) & sinTableQ15[index];
00138
00139   /* Cubic interpolation process */
00140   /* Calculation of wa */
00141   /* wa = -(oneBy6)*fractCube + (fractSquare >> 1u) - (0x2AAA)*fract; */
00142   wa = (q31_t) oneBy6 *fractCube;
00143   wa += (q31_t) 0x2AAA *fract;
00144   wa = -(wa >> 15);
00145   wa += ((q31_t) fractSquare >> 1u);
00146
00147   /* Read first nearest value of output from the sin table */
00148   a = *tablePtr++;
00149
00150   /* sinVal = a * wa */
00151   sinVal = a * wa;
00152
00153   /* Calculation of wb */
00154   wb = (((q31_t) fractCube >> 1u) - (q31_t) fractSquare) -
00155     (((q31_t) fract >> 1u) - 0x7FFF);
00156
00157   /* Read second nearest value of output from the sin table */
00158   b = *tablePtr++;
00159
00160   /*      sinVal += b*wb */
00161   sinVal += b * wb;
00162
00163
00164   /* Calculation of wc */
00165   wc = -(q31_t) fractCube + fractSquare;
00166   wc = (wc >> 1u) + fract;
00167
00168   /* Read third nearest value of output from the sin table */
00169   c = *tablePtr++;
00170
00171   /*      sinVal += c*wc */
00172   sinVal += c * wc;
00173
00174   /* Calculation of wd */
00175   /* wd = (oneBy6)*fractCube - (oneBy6)*fract; */
00176   fractCube = fractCube - fract;
00177   wd = ((q15_t) (((q31_t) oneBy6 * fractCube) >> 15));
00178
00179   /* Read fourth nearest value of output from the sin table */
00180   d = *tablePtr++;
00181
00182   /* sinVal += d*wd; */
00183   sinVal += d * wd;
00184
00185   /* Return the output value in 1.15(q15) format */
00186   return ((q15_t) (sinVal >> 15u));
00187
00188 }
00189
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CMSIS DSP Software Library: arm_sin_q31.c File Reference

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arm_sin_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

q31_t | arm_sin_q31 (q31_t x)

Variables

static const q31_t | sinTableQ31 [259]
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CMSIS DSP Software Library: arm_sin_q31.c Source File

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arm_sin_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_sin_q31.c
00009 *
00010 * Description:  Fast sine calculation for Q31 values.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00059 static const q31_t sinTableQ31[259] = {
00060   0xfcdbd541, 0x0, 0x3242abf, 0x647d97c, 0x96a9049, 0xc8bd35e, 0xfab272b,
00061   0x12c8106f,
00062   0x15e21445, 0x18f8b83c, 0x1c0b826a, 0x1f19f97b, 0x2223a4c5, 0x25280c5e,
00063   0x2826b928, 0x2b1f34eb,
00064   0x2e110a62, 0x30fbc54d, 0x33def287, 0x36ba2014, 0x398cdd32, 0x3c56ba70,
00065   0x3f1749b8, 0x41ce1e65,
00066   0x447acd50, 0x471cece7, 0x49b41533, 0x4c3fdff4, 0x4ebfe8a5, 0x5133cc94,
00067   0x539b2af0, 0x55f5a4d2,
00068   0x5842dd54, 0x5a82799a, 0x5cb420e0, 0x5ed77c8a, 0x60ec3830, 0x62f201ac,
00069   0x64e88926, 0x66cf8120,
00070   0x68a69e81, 0x6a6d98a4, 0x6c242960, 0x6dca0d14, 0x6f5f02b2, 0x70e2cbc6,
00071   0x72552c85, 0x73b5ebd1,
00072   0x7504d345, 0x7641af3d, 0x776c4edb, 0x78848414, 0x798a23b1, 0x7a7d055b,
00073   0x7b5d039e, 0x7c29fbee,
00074   0x7ce3ceb2, 0x7d8a5f40, 0x7e1d93ea, 0x7e9d55fc, 0x7f0991c4, 0x7f62368f,
00075   0x7fa736b4, 0x7fd8878e,
00076   0x7ff62182, 0x7fffffff, 0x7ff62182, 0x7fd8878e, 0x7fa736b4, 0x7f62368f,
00077   0x7f0991c4, 0x7e9d55fc,
00078   0x7e1d93ea, 0x7d8a5f40, 0x7ce3ceb2, 0x7c29fbee, 0x7b5d039e, 0x7a7d055b,
00079   0x798a23b1, 0x78848414,
00080   0x776c4edb, 0x7641af3d, 0x7504d345, 0x73b5ebd1, 0x72552c85, 0x70e2cbc6,
00081   0x6f5f02b2, 0x6dca0d14,
00082   0x6c242960, 0x6a6d98a4, 0x68a69e81, 0x66cf8120, 0x64e88926, 0x62f201ac,
00083   0x60ec3830, 0x5ed77c8a,
00084   0x5cb420e0, 0x5a82799a, 0x5842dd54, 0x55f5a4d2, 0x539b2af0, 0x5133cc94,
00085   0x4ebfe8a5, 0x4c3fdff4,
00086   0x49b41533, 0x471cece7, 0x447acd50, 0x41ce1e65, 0x3f1749b8, 0x3c56ba70,
00087   0x398cdd32, 0x36ba2014,
00088   0x33def287, 0x30fbc54d, 0x2e110a62, 0x2b1f34eb, 0x2826b928, 0x25280c5e,
00089   0x2223a4c5, 0x1f19f97b,
00090   0x1c0b826a, 0x18f8b83c, 0x15e21445, 0x12c8106f, 0xfab272b, 0xc8bd35e,
00091   0x96a9049, 0x647d97c,
00092   0x3242abf, 0x0, 0xfcdbd541, 0xf9b82684, 0xf6956fb7, 0xf3742ca2, 0xf054d8d5,
00093   0xed37ef91,
00094   0xea1debbb, 0xe70747c4, 0xe3f47d96, 0xe0e60685, 0xdddc5b3b, 0xdad7f3a2,
00095   0xd7d946d8, 0xd4e0cb15,
00096   0xd1eef59e, 0xcf043ab3, 0xcc210d79, 0xc945dfec, 0xc67322ce, 0xc3a94590,
00097   0xc0e8b648, 0xbe31e19b,
00098   0xbb8532b0, 0xb8e31319, 0xb64beacd, 0xb3c0200c, 0xb140175b, 0xaecc336c,
00099   0xac64d510, 0xaa0a5b2e,
00100   0xa7bd22ac, 0xa57d8666, 0xa34bdf20, 0xa1288376, 0x9f13c7d0, 0x9d0dfe54,
00101   0x9b1776da, 0x99307ee0,
00102   0x9759617f, 0x9592675c, 0x93dbd6a0, 0x9235f2ec, 0x90a0fd4e, 0x8f1d343a,
00103   0x8daad37b, 0x8c4a142f,
00104   0x8afb2cbb, 0x89be50c3, 0x8893b125, 0x877b7bec, 0x8675dc4f, 0x8582faa5,
00105   0x84a2fc62, 0x83d60412,
00106   0x831c314e, 0x8275a0c0, 0x81e26c16, 0x8162aa04, 0x80f66e3c, 0x809dc971,
00107   0x8058c94c, 0x80277872,
00108   0x8009de7e, 0x80000000, 0x8009de7e, 0x80277872, 0x8058c94c, 0x809dc971,
00109   0x80f66e3c, 0x8162aa04,
00110   0x81e26c16, 0x8275a0c0, 0x831c314e, 0x83d60412, 0x84a2fc62, 0x8582faa5,
00111   0x8675dc4f, 0x877b7bec,
00112   0x8893b125, 0x89be50c3, 0x8afb2cbb, 0x8c4a142f, 0x8daad37b, 0x8f1d343a,
00113   0x90a0fd4e, 0x9235f2ec,
00114   0x93dbd6a0, 0x9592675c, 0x9759617f, 0x99307ee0, 0x9b1776da, 0x9d0dfe54,
00115   0x9f13c7d0, 0xa1288376,
00116   0xa34bdf20, 0xa57d8666, 0xa7bd22ac, 0xaa0a5b2e, 0xac64d510, 0xaecc336c,
00117   0xb140175b, 0xb3c0200c,
00118   0xb64beacd, 0xb8e31319, 0xbb8532b0, 0xbe31e19b, 0xc0e8b648, 0xc3a94590,
00119   0xc67322ce, 0xc945dfec,
00120   0xcc210d79, 0xcf043ab3, 0xd1eef59e, 0xd4e0cb15, 0xd7d946d8, 0xdad7f3a2,
00121   0xdddc5b3b, 0xe0e60685,
00122   0xe3f47d96, 0xe70747c4, 0xea1debbb, 0xed37ef91, 0xf054d8d5, 0xf3742ca2,
00123   0xf6956fb7, 0xf9b82684,
00124   0xfcdbd541, 0x0, 0x3242abf
00125 };
00126
00127
00136 q31_t arm_sin_q31(
00137   q31_t x)
00138 {
00139   q31_t sinVal, in, in2;                         /* Temporary variables for input, output */
00140   uint32_t index;                                /* Index variables */
00141   q31_t wa, wb, wc, wd;                          /* Cubic interpolation coefficients */
00142   q31_t a, b, c, d;                              /* Four nearest output values */
00143   q31_t *tablePtr;                               /* Pointer to table */
00144   q31_t fract, fractCube, fractSquare;           /* Temporary values for fractional values */
00145   q31_t oneBy6 = 0x15555555;                     /* Fixed point value of 1/6 */
00146   q31_t tableSpacing = TABLE_SPACING_Q31;        /* Table spacing */
00147   q31_t temp;                                    /* Temporary variable for intermediate process */
00148
00149   in = x;
00150
00151   /* Calculate the nearest index */
00152   index = (uint32_t) in / (uint32_t) tableSpacing;
00153
00154   /* Calculate the nearest value of input */
00155   in2 = (q31_t) index *tableSpacing;
00156
00157   /* Calculation of fractional value */
00158   fract = (in - in2) << 8;
00159
00160   /* fractSquare = fract * fract */
00161   fractSquare = ((q31_t) (((q63_t) fract * fract) >> 32));
00162   fractSquare = fractSquare << 1;
00163
00164   /* fractCube = fract * fract * fract */
00165   fractCube = ((q31_t) (((q63_t) fractSquare * fract) >> 32));
00166   fractCube = fractCube << 1;
00167
00168   /* Initialise table pointer */
00169   tablePtr = (q31_t *) & sinTableQ31[index];
00170
00171   /* Cubic interpolation process */
00172   /* Calculation of wa */
00173   /* wa = -(oneBy6)*fractCube + (fractSquare >> 1u) - (0x2AAAAAAA)*fract; */
00174   wa = ((q31_t) (((q63_t) oneBy6 * fractCube) >> 32));
00175   temp = 0x2AAAAAAA;
00176   wa = (q31_t) ((((q63_t) wa << 32) + ((q63_t) temp * fract)) >> 32);
00177   wa = -(wa << 1u);
00178   wa += (fractSquare >> 1u);
00179
00180   /* Read first nearest value of output from the sin table */
00181   a = *tablePtr++;
00182
00183   /* sinVal = a*wa */
00184   sinVal = ((q31_t) (((q63_t) a * wa) >> 32));
00185
00186   /* q31(1.31) Fixed point value of 1 */
00187   temp = 0x7FFFFFFF;
00188
00189   /* Calculation of wb */
00190   wb = ((fractCube >> 1u) - (fractSquare + (fract >> 1u))) + temp;
00191
00192   /* Read second nearest value of output from the sin table */
00193   b = *tablePtr++;
00194
00195   /*  sinVal += b*wb */
00196   sinVal = (q31_t) ((((q63_t) sinVal << 32) + (q63_t) b * (wb)) >> 32);
00197
00198   /* Calculation of wc */
00199   wc = -fractCube + fractSquare;
00200   wc = (wc >> 1u) + fract;
00201
00202   /* Read third nearest value of output from the sin table */
00203   c = *tablePtr++;
00204
00205   /*      sinVal += c*wc */
00206   sinVal = (q31_t) ((((q63_t) sinVal << 32) + ((q63_t) c * wc)) >> 32);
00207
00208   /* Calculation of wd */
00209   /* wd = (oneBy6) * fractCube - (oneBy6) * fract; */
00210   fractCube = fractCube - fract;
00211   wd = ((q31_t) (((q63_t) oneBy6 * fractCube) >> 32));
00212   wd = (wd << 1u);
00213
00214   /* Read fourth nearest value of output from the sin table */
00215   d = *tablePtr++;
00216
00217   /* sinVal += d*wd; */
00218   sinVal = (q31_t) ((((q63_t) sinVal << 32) + ((q63_t) d * wd)) >> 32);
00219
00220   /* convert sinVal in 2.30 format to 1.31 format */
00221   return (sinVal << 1u);
00222
00223 }
00224
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CMSIS DSP Software Library: arm_sqrt_q15.c File Reference

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arm_sqrt_q15.c File Reference

#include "arm_math.h"
#include "arm_common_tables.h"

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Functions

arm_status arm_sqrt_q15 (q15_t in, q15_t *pOut)
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CMSIS DSP Software Library: arm_sqrt_q15.c Source File

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arm_sqrt_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_sqrt_q15.c
00009 *
00010 * Description:  Q15 square root function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031 #include "arm_common_tables.h"
00032
00033
00051 arm_status arm_sqrt_q15(
00052   q15_t in,
00053   q15_t * pOut)
00054 {
00055   q31_t prevOut;
00056   q15_t oneByOut;
00057   uint32_t sign_bits;
00058
00059 #ifndef ARM_MATH_CM0
00060
00061   /* Run the below code for Cortex-M4 and Cortex-M3 */
00062
00063   q31_t out;
00064
00065   if(in > 0)
00066   {
00067     /* run for ten iterations */
00068
00069     /* Take initial guess as half of the input and first iteration */
00070     out = ((q31_t) in >> 1u) + 0x3FFF;
00071
00072     /* Calculation of reciprocal of out */
00073     /* oneByOut contains reciprocal of out which is in 2.14 format
00074        and oneByOut should be upscaled by signBits */
00075     sign_bits = arm_recip_q15((q15_t) out, &oneByOut, armRecipTableQ15);
00076
00077     /* 0.5 * (out) */
00078     out = out >> 1u;
00079     /* prevOut = 0.5 * out + (in * (oneByOut << signBits))) */
00080     prevOut = out + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00081
00082     /* Third iteration */
00083     sign_bits = arm_recip_q15((q15_t) prevOut, &oneByOut, armRecipTableQ15);
00084     prevOut = prevOut >> 1u;
00085     out = prevOut + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00086
00087     sign_bits = arm_recip_q15((q15_t) out, &oneByOut, armRecipTableQ15);
00088     out = out >> 1u;
00089     prevOut = out + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00090
00091     /* Fifth iteration */
00092     sign_bits = arm_recip_q15((q15_t) prevOut, &oneByOut, armRecipTableQ15);
00093     prevOut = prevOut >> 1u;
00094     out = prevOut + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00095
00096     sign_bits = arm_recip_q15((q15_t) out, &oneByOut, armRecipTableQ15);
00097     out = out >> 1u;
00098     prevOut = out + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00099
00100     /* Seventh iteration */
00101     sign_bits = arm_recip_q15((q15_t) prevOut, &oneByOut, armRecipTableQ15);
00102     prevOut = prevOut >> 1u;
00103     out = prevOut + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00104
00105     sign_bits = arm_recip_q15((q15_t) out, &oneByOut, armRecipTableQ15);
00106     out = out >> 1u;
00107     prevOut = out + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00108
00109     sign_bits = arm_recip_q15((q15_t) prevOut, &oneByOut, armRecipTableQ15);
00110     prevOut = prevOut >> 1u;
00111     out = prevOut + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00112
00113     /* tenth iteration */
00114     sign_bits = arm_recip_q15((q15_t) out, &oneByOut, armRecipTableQ15);
00115     out = out >> 1u;
00116     *pOut = out + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00117
00118     return (ARM_MATH_SUCCESS);
00119   }
00120
00121 #else
00122
00123   /* Run the below code for Cortex-M0 */
00124
00125   q31_t out, loopVar;                            /* Temporary variable for output, loop variable */
00126   if(in > 0)
00127   {
00128     /* run for ten iterations */
00129
00130     /* Take initial guess as half of the input and first iteration */
00131     out = ((q31_t) in >> 1u) + 0x3FFF;
00132
00133     /* Calculation of reciprocal of out */
00134
00135     /* oneByOut contains reciprocal of out which is in 2.14 format
00136        and oneByOut should be upscaled by sign bits */
00137     sign_bits = arm_recip_q15((q15_t) out, &oneByOut, armRecipTableQ15);
00138
00139     /* 0.5 * (out) */
00140     out = out >> 1u;
00141     /* prevOut = 0.5 * out + (in * oneByOut) << signbits))) */
00142     prevOut = out + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00143
00144     /* loop for third iteration to tenth iteration */
00145
00146     for (loopVar = 1; loopVar <= 8; loopVar++)
00147     {
00148
00149       sign_bits = arm_recip_q15((q15_t) prevOut, &oneByOut, armRecipTableQ15);
00150       /* 0.5 * (prevOut) */
00151       prevOut = prevOut >> 1u;
00152       /* prevOut = 0.5 * prevOut+ (in * oneByOut) << signbits))) */
00153       out =
00154         prevOut + (((q15_t) (((q31_t) in * oneByOut) >> 16)) << sign_bits);
00155       /* prevOut      = out */
00156       prevOut = out;
00157
00158     }
00159     /* output is moved to pOut pointer */
00160     *pOut = prevOut;
00161
00162     return (ARM_MATH_SUCCESS);
00163   }
00164
00165 #endif /* #ifndef ARM_MATH_CM0 */
00166
00167   else
00168   {
00169
00170     *pOut = 0;
00171     return (ARM_MATH_ARGUMENT_ERROR);
00172   }
00173
00174 }
00175
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CMSIS DSP Software Library: arm_sqrt_q31.c File Reference

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arm_sqrt_q31.c File Reference

#include "arm_math.h"
#include "arm_common_tables.h"

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Functions

arm_status arm_sqrt_q31 (q31_t in, q31_t *pOut)
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CMSIS DSP Software Library: arm_sqrt_q31.c Source File

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arm_sqrt_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_sqrt_q31.c
00009 *
00010 * Description:  Q31 square root function.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.2 2010/11/11
00018 *    Documentation updated.
00019 *
00020 * Version 1.0.1 2010/10/05
00021 *    Production release and review comments incorporated.
00022 *
00023 * Version 1.0.0 2010/09/20
00024 *    Production release and review comments incorporated.
00025 * -------------------------------------------------------------------- */
00026
00027 #include "arm_math.h"
00028 #include "arm_common_tables.h"
00029
00047 arm_status arm_sqrt_q31(
00048   q31_t in,
00049   q31_t * pOut)
00050 {
00051   q63_t prevOut;
00052   q31_t oneByOut;
00053   uint32_t signBits;
00054
00055 #ifndef ARM_MATH_CM0
00056
00057   /* Run the below code for Cortex-M4 and Cortex-M3 */
00058
00059   q63_t out;
00060
00061   if(in > 0)
00062   {
00063
00064     /* run for ten iterations */
00065
00066     /* Take initial guess as half of the input and first iteration */
00067     out = (in >> 1) + 0x3FFFFFFF;
00068
00069     /* Calculation of reciprocal of out */
00070     /* oneByOut contains reciprocal of out which is in 2.30 format
00071        and oneByOut should be upscaled by signBits */
00072     signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
00073
00074     /* 0.5 * (out) */
00075     out = out >> 1u;
00076
00077     /* prevOut = 0.5 * out + (in * (oneByOut << signBits))) */
00078     prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00079
00080     /* Third iteration */
00081     signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
00082     prevOut = prevOut >> 1u;
00083     out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00084
00085     signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
00086     out = out >> 1u;
00087     prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00088
00089     /* Fifth iteration */
00090     signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
00091     prevOut = prevOut >> 1u;
00092     out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00093
00094     signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
00095     out = out >> 1u;
00096     prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00097
00098     /* Seventh iteration */
00099     signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
00100     prevOut = prevOut >> 1u;
00101     out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00102
00103     signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
00104     out = out >> 1u;
00105     prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00106
00107     signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
00108     prevOut = prevOut >> 1u;
00109     out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00110
00111     signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
00112     out = out >> 1u;
00113     prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00114
00115     signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
00116     prevOut = prevOut >> 1u;
00117     out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00118
00119     signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
00120     out = out >> 1u;
00121     prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00122
00123     signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
00124     prevOut = prevOut >> 1u;
00125     out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00126
00127     signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
00128     out = out >> 1u;
00129     prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00130
00131     signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
00132     prevOut = prevOut >> 1u;
00133     out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00134
00135     /* tenth iteration */
00136     signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
00137     out = out >> 1u;
00138     *pOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00139
00140     return (ARM_MATH_SUCCESS);
00141   }
00142
00143 #else
00144
00145   /* Run the below code for Cortex-M0 */
00146
00147   q63_t out, loopVar;                            /* Temporary variable for output, loop variable */
00148   if(in > 0)
00149   {
00150
00151     /* run for ten iterations */
00152
00153     /* Take initial guess as half of the input and first iteration */
00154     out = (in >> 1) + 0x3FFFFFFF;
00155
00156     /* Calculation of reciprocal of out */
00157     /* oneByOut contains reciprocal of out which is in 2.30 format
00158        and oneByOut should be upscaled by sign bits */
00159     signBits = arm_recip_q31((q31_t) out, &oneByOut, armRecipTableQ31);
00160
00161     /* 0.5 * (out) */
00162     out = out >> 1u;
00163
00164     /* prevOut = 0.5 * out + (in * (oneByOut) << signbits) */
00165     prevOut = out + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00166
00167
00168     /* loop for third iteration to tength iteration */
00169
00170     for (loopVar = 1; loopVar <= 14; loopVar++)
00171     {
00172
00173       signBits = arm_recip_q31((q31_t) prevOut, &oneByOut, armRecipTableQ31);
00174       /* 0.5 * (prevOut) */
00175       prevOut = prevOut >> 1u;
00176       /* out = 0.5 * prevOut + (in * oneByOut) << signbits))) */
00177       out = prevOut + (((q31_t) (((q63_t) in * oneByOut) >> 32)) << signBits);
00178       /* prevOut      = out */
00179       prevOut = out;
00180
00181     }
00182     /* output is moved to pOut pointer */
00183     *pOut = prevOut;
00184
00185     return (ARM_MATH_SUCCESS);
00186   }
00187
00188 #endif /* #ifndef ARM_MATH_CM0 */
00189
00190   else
00191   {
00192     *pOut = 0;
00193     return (ARM_MATH_ARGUMENT_ERROR);
00194   }
00195 }
00196
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CMSIS DSP Software Library: arm_std_f32.c File Reference

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arm_std_f32.c File Reference

#include "arm_math.h"

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Functions

void arm_std_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
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CMSIS DSP Software Library: arm_std_f32.c Source File

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arm_std_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_std_f32.c
00009 *
00010 * Description:  Standard deviation of the elements of a floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00069 void arm_std_f32(
00070   float32_t * pSrc,
00071   uint32_t blockSize,
00072   float32_t * pResult)
00073 {
00074   float32_t sum = 0.0f;                          /* Temporary result storage */
00075
00076 #ifndef ARM_MATH_CM0
00077
00078   /* Run the below code for Cortex-M4 and Cortex-M3 */
00079
00080   float32_t meanOfSquares, mean, in, squareOfMean;
00081   uint32_t blkCnt;                               /* loop counter */
00082   float32_t *pIn;                                /* Temporary pointer */
00083
00084   pIn = pSrc;
00085
00086
00087   /*loop Unrolling */
00088   blkCnt = blockSize >> 2u;
00089
00090   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00091    ** a second loop below computes the remaining 1 to 3 samples. */
00092   while(blkCnt > 0u)
00093   {
00094     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
00095     /* Compute Sum of squares of the input samples
00096      * and then store the result in a temporary variable, sum. */
00097     in = *pSrc++;
00098     sum += in * in;
00099     in = *pSrc++;
00100     sum += in * in;
00101     in = *pSrc++;
00102     sum += in * in;
00103     in = *pSrc++;
00104     sum += in * in;
00105
00106     /* Decrement the loop counter */
00107     blkCnt--;
00108   }
00109
00110   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00111    ** No loop unrolling is used. */
00112   blkCnt = blockSize % 0x4u;
00113
00114   while(blkCnt > 0u)
00115   {
00116     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00117     /* Compute Sum of squares of the input samples
00118      * and then store the result in a temporary variable, sum. */
00119     in = *pSrc++;
00120     sum += in * in;
00121
00122     /* Decrement the loop counter */
00123     blkCnt--;
00124   }
00125
00126   /* Compute Mean of squares of the input samples
00127    * and then store the result in a temporary variable, meanOfSquares. */
00128   meanOfSquares = sum / ((float32_t) blockSize - 1.0f);
00129
00130   /* Reset the accumulator */
00131   sum = 0.0f;
00132
00133   /*loop Unrolling */
00134   blkCnt = blockSize >> 2u;
00135
00136   /* Reset the input working pointer */
00137   pSrc = pIn;
00138
00139   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00140    ** a second loop below computes the remaining 1 to 3 samples. */
00141   while(blkCnt > 0u)
00142   {
00143     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00144     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00145     sum += *pSrc++;
00146     sum += *pSrc++;
00147     sum += *pSrc++;
00148     sum += *pSrc++;
00149
00150     /* Decrement the loop counter */
00151     blkCnt--;
00152   }
00153
00154   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00155    ** No loop unrolling is used. */
00156   blkCnt = blockSize % 0x4u;
00157
00158   while(blkCnt > 0u)
00159   {
00160     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00161     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00162     sum += *pSrc++;
00163
00164     /* Decrement the loop counter */
00165     blkCnt--;
00166   }
00167   /* Compute mean of all input values */
00168   mean = sum / (float32_t) blockSize;
00169
00170   /* Compute square of mean */
00171   squareOfMean = (mean * mean) * (((float32_t) blockSize) /
00172                                   ((float32_t) blockSize - 1.0f));
00173
00174   /* Compute standard deviation and then store the result to the destination */
00175   arm_sqrt_f32((meanOfSquares - squareOfMean), pResult);
00176
00177 #else
00178
00179   /* Run the below code for Cortex-M0 */
00180
00181   float32_t sumOfSquares = 0.0f;                 /* Sum of squares */
00182   float32_t squareOfSum;                         /* Square of Sum */
00183   float32_t in;                                  /* input value */
00184   float32_t var;                                 /* Temporary varaince storage */
00185   uint32_t blkCnt;                               /* loop counter */
00186
00187   /* Loop over blockSize number of values */
00188   blkCnt = blockSize;
00189
00190   while(blkCnt > 0u)
00191   {
00192     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00193     /* Compute Sum of squares of the input samples
00194      * and then store the result in a temporary variable, sumOfSquares. */
00195     in = *pSrc++;
00196     sumOfSquares += in * in;
00197
00198     /* C = (A[0] + A[1] + ... + A[blockSize-1]) */
00199     /* Compute Sum of the input samples
00200      * and then store the result in a temporary variable, sum. */
00201     sum += in;
00202
00203     /* Decrement the loop counter */
00204     blkCnt--;
00205   }
00206
00207   /* Compute the square of sum */
00208   squareOfSum = ((sum * sum) / (float32_t) blockSize);
00209
00210   /* Compute the variance */
00211   var = ((sumOfSquares - squareOfSum) / (float32_t) (blockSize - 1.0f));
00212
00213   /* Compute standard deviation and then store the result to the destination */
00214   arm_sqrt_f32(var, pResult);
00215
00216 #endif /* #ifndef ARM_MATH_CM0 */
00217
00218 }
00219
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CMSIS DSP Software Library: arm_std_q15.c File Reference

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arm_std_q15.c File Reference

#include "arm_math.h"

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void arm_std_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
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CMSIS DSP Software Library: arm_std_q15.c Source File

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arm_std_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_std_q15.c
00009 *
00010 * Description:  Standard deviation of an array of Q15 type.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00062 void arm_std_q15(
00063   q15_t * pSrc,
00064   uint32_t blockSize,
00065   q15_t * pResult)
00066 {
00067   q63_t sum = 0;                                 /* Accumulator */
00068   q31_t meanOfSquares, squareOfMean;             /* square of mean and mean of square */
00069   q15_t mean;                                    /* mean */
00070   uint32_t blkCnt;                               /* loop counter */
00071   q15_t t;                                       /* Temporary variable */
00072
00073 #ifndef ARM_MATH_CM0
00074
00075   /* Run the below code for Cortex-M4 and Cortex-M3 */
00076
00077   q15_t *pIn;                                    /* Temporary pointer */
00078   q31_t in;                                      /* input value */
00079   q15_t in1;                                     /* input value */
00080
00081   pIn = pSrc;
00082
00083   /*loop Unrolling */
00084   blkCnt = blockSize >> 2u;
00085
00086   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00087    ** a second loop below computes the remaining 1 to 3 samples. */
00088   while(blkCnt > 0u)
00089   {
00090     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
00091     /* Compute Sum of squares of the input samples
00092      * and then store the result in a temporary variable, sum. */
00093     in = *__SIMD32(pSrc)++;
00094     sum = __SMLALD(in, in, sum);
00095     in = *__SIMD32(pSrc)++;
00096     sum = __SMLALD(in, in, sum);
00097
00098     /* Decrement the loop counter */
00099     blkCnt--;
00100   }
00101
00102   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00103    ** No loop unrolling is used. */
00104   blkCnt = blockSize % 0x4u;
00105
00106   while(blkCnt > 0u)
00107   {
00108     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00109     /* Compute Sum of squares of the input samples
00110      * and then store the result in a temporary variable, sum. */
00111     in1 = *pSrc++;
00112     sum = __SMLALD(in1, in1, sum);
00113
00114     /* Decrement the loop counter */
00115     blkCnt--;
00116   }
00117
00118   /* Compute Mean of squares of the input samples
00119    * and then store the result in a temporary variable, meanOfSquares. */
00120   t = (q15_t) ((1.0 / (blockSize - 1)) * 16384LL);
00121   sum = __SSAT((sum >> 15u), 16u);
00122
00123   meanOfSquares = (q31_t) ((sum * t) >> 14u);
00124
00125   /* Reset the accumulator */
00126   sum = 0;
00127
00128   /*loop Unrolling */
00129   blkCnt = blockSize >> 2u;
00130
00131   /* Reset the input working pointer */
00132   pSrc = pIn;
00133
00134   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00135    ** a second loop below computes the remaining 1 to 3 samples. */
00136   while(blkCnt > 0u)
00137   {
00138     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00139     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00140     sum += *pSrc++;
00141     sum += *pSrc++;
00142     sum += *pSrc++;
00143     sum += *pSrc++;
00144
00145     /* Decrement the loop counter */
00146     blkCnt--;
00147   }
00148
00149   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00150    ** No loop unrolling is used. */
00151   blkCnt = blockSize % 0x4u;
00152
00153   while(blkCnt > 0u)
00154   {
00155     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00156     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00157     sum += *pSrc++;
00158
00159     /* Decrement the loop counter */
00160     blkCnt--;
00161   }
00162   /* Compute mean of all input values */
00163   t = (q15_t) ((1.0 / (blockSize * (blockSize - 1))) * 32768LL);
00164   mean = (q15_t) __SSAT(sum, 16u);
00165
00166   /* Compute square of mean */
00167   squareOfMean = ((q31_t) mean * mean) >> 15;
00168   squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 15);
00169
00170   /* mean of the squares minus the square of the mean. */
00171   in1 = (q15_t) (meanOfSquares - squareOfMean);
00172
00173   /* Compute standard deviation and store the result to the destination */
00174   arm_sqrt_q15(in1, pResult);
00175
00176 #else
00177
00178   /* Run the below code for Cortex-M0 */
00179
00180   q63_t sumOfSquares = 0;                        /* Accumulator */
00181   q15_t in;                                      /* input value */
00182   /* Loop over blockSize number of values */
00183   blkCnt = blockSize;
00184
00185   while(blkCnt > 0u)
00186   {
00187     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00188     /* Compute Sum of squares of the input samples
00189      * and then store the result in a temporary variable, sumOfSquares. */
00190     in = *pSrc++;
00191     sumOfSquares += (in * in);
00192
00193     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00194     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00195     sum += in;
00196
00197     /* Decrement the loop counter */
00198     blkCnt--;
00199   }
00200
00201   /* Compute Mean of squares of the input samples
00202    * and then store the result in a temporary variable, meanOfSquares. */
00203   t = (q15_t) ((1.0 / (blockSize - 1)) * 16384LL);
00204   sumOfSquares = __SSAT((sumOfSquares >> 15u), 16u);
00205   meanOfSquares = (q31_t) ((sumOfSquares * t) >> 14u);
00206
00207   /* Compute mean of all input values */
00208   mean = (q15_t) __SSAT(sum, 16u);
00209
00210   /* Compute square of mean of the input samples
00211    * and then store the result in a temporary variable, squareOfMean.*/
00212   t = (q15_t) ((1.0 / (blockSize * (blockSize - 1))) * 32768LL);
00213   squareOfMean = ((q31_t) mean * mean) >> 15;
00214   squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 15);
00215
00216   /* mean of the squares minus the square of the mean. */
00217   in = (q15_t) (meanOfSquares - squareOfMean);
00218
00219   /* Compute standard deviation and store the result to the destination */
00220   arm_sqrt_q15(in, pResult);
00221
00222 #endif /* #ifndef ARM_MATH_CM0 */
00223
00224
00225 }
00226
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CMSIS DSP Software Library: arm_std_q31.c File Reference

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arm_std_q31.c File Reference

#include "arm_math.h"

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void arm_std_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
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CMSIS DSP Software Library: arm_std_q31.c Source File

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arm_std_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_std_q31.c
00009 *
00010 * Description:  Standard deviation of an array of Q31 type.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00066 void arm_std_q31(
00067   q31_t * pSrc,
00068   uint32_t blockSize,
00069   q31_t * pResult)
00070 {
00071   q63_t sum = 0;                                 /* Accumulator */
00072   q31_t meanOfSquares, squareOfMean;             /* square of mean and mean of square */
00073   q31_t mean;                                    /* mean */
00074   q31_t in;                                      /* input value */
00075   q31_t t;                                       /* Temporary variable */
00076   uint32_t blkCnt;                               /* loop counter */
00077
00078
00079 #ifndef ARM_MATH_CM0
00080
00081   /* Run the below code for Cortex-M4 and Cortex-M3 */
00082
00083   q31_t *pIn;                                    /* Temporary pointer */
00084
00085   pIn = pSrc;
00086
00087   /*loop Unrolling */
00088   blkCnt = blockSize >> 2u;
00089
00090   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00091    ** a second loop below computes the remaining 1 to 3 samples. */
00092   while(blkCnt > 0u)
00093   {
00094     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
00095     /* Compute Sum of squares of the input samples
00096      * and then store the result in a temporary variable, sum. */
00097     in = *pSrc++;
00098     sum += ((q63_t) (in) * (in));
00099     in = *pSrc++;
00100     sum += ((q63_t) (in) * (in));
00101     in = *pSrc++;
00102     sum += ((q63_t) (in) * (in));
00103     in = *pSrc++;
00104     sum += ((q63_t) (in) * (in));
00105
00106     /* Decrement the loop counter */
00107     blkCnt--;
00108   }
00109
00110   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00111    ** No loop unrolling is used. */
00112   blkCnt = blockSize % 0x4u;
00113
00114   while(blkCnt > 0u)
00115   {
00116     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00117     /* Compute Sum of squares of the input samples
00118      * and then store the result in a temporary variable, sum. */
00119     in = *pSrc++;
00120     sum += ((q63_t) (in) * (in));
00121
00122     /* Decrement the loop counter */
00123     blkCnt--;
00124   }
00125
00126   t = (q31_t) ((1.0f / (float32_t) (blockSize - 1u)) * 1073741824.0f);
00127
00128   /* Compute Mean of squares of the input samples
00129    * and then store the result in a temporary variable, meanOfSquares. */
00130   sum = (sum >> 31);
00131   meanOfSquares = (q31_t) ((sum * t) >> 30);
00132
00133   /* Reset the accumulator */
00134   sum = 0;
00135
00136   /*loop Unrolling */
00137   blkCnt = blockSize >> 2u;
00138
00139   /* Reset the input working pointer */
00140   pSrc = pIn;
00141
00142   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00143    ** a second loop below computes the remaining 1 to 3 samples. */
00144   while(blkCnt > 0u)
00145   {
00146     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00147     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00148     sum += *pSrc++;
00149     sum += *pSrc++;
00150     sum += *pSrc++;
00151     sum += *pSrc++;
00152
00153     /* Decrement the loop counter */
00154     blkCnt--;
00155   }
00156
00157   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00158    ** No loop unrolling is used. */
00159   blkCnt = blockSize % 0x4u;
00160
00161   while(blkCnt > 0u)
00162   {
00163     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00164     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00165     sum += *pSrc++;
00166
00167     /* Decrement the loop counter */
00168     blkCnt--;
00169   }
00170
00171 #else
00172
00173   /* Run the below code for Cortex-M0 */
00174
00175   q63_t sumOfSquares = 0;                        /* Accumulator */
00176   /* Loop over blockSize number of values */
00177   blkCnt = blockSize;
00178
00179   while(blkCnt > 0u)
00180   {
00181     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00182     /* Compute Sum of squares of the input samples
00183      * and then store the result in a temporary variable, sumOfSquares. */
00184     in = *pSrc++;
00185     sumOfSquares += ((q63_t) (in) * (in));
00186
00187     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00188     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00189     sum += in;
00190
00191     /* Decrement the loop counter */
00192     blkCnt--;
00193   }
00194
00195   /* Compute Mean of squares of the input samples
00196    * and then store the result in a temporary variable, meanOfSquares. */
00197   t = (q31_t) ((1.0f / (float32_t) (blockSize - 1u)) * 1073741824.0f);
00198   sumOfSquares = (sumOfSquares >> 31);
00199   meanOfSquares = (q31_t) ((sumOfSquares * t) >> 30);
00200
00201 #endif /* #ifndef ARM_MATH_CM0 */
00202
00203   /* Compute mean of all input values */
00204   t = (q31_t) ((1.0f / (blockSize * (blockSize - 1u))) * 2147483648.0f);
00205   mean = (q31_t) (sum);
00206
00207   /* Compute square of mean */
00208   squareOfMean = (q31_t) (((q63_t) mean * mean) >> 31);
00209   squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 31);
00210
00211
00212   /* Compute standard deviation and then store the result to the destination */
00213   arm_sqrt_q31(meanOfSquares - squareOfMean, pResult);
00214
00215 }
00216
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CMSIS DSP Software Library: arm_sub_f32.c File Reference

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arm_sub_f32.c File Reference

#include "arm_math.h"

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void arm_sub_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_sub_f32.c Source File

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arm_sub_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_sub_f32.c
00009 *
00010 * Description:  Floating-point vector subtraction.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * ---------------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00066 void arm_sub_f32(
00067   float32_t * pSrcA,
00068   float32_t * pSrcB,
00069   float32_t * pDst,
00070   uint32_t blockSize)
00071 {
00072   uint32_t blkCnt;                               /* loop counter */
00073
00074 #ifndef ARM_MATH_CM0
00075
00076 /* Run the below code for Cortex-M4 and Cortex-M3 */
00077   /*loop Unrolling */
00078   blkCnt = blockSize >> 2u;
00079
00080   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00081    ** a second loop below computes the remaining 1 to 3 samples. */
00082   while(blkCnt > 0u)
00083   {
00084     /* C = A - B */
00085     /* Subtract and then store the results in the destination buffer. */
00086     *pDst++ = (*pSrcA++) - (*pSrcB++);
00087     *pDst++ = (*pSrcA++) - (*pSrcB++);
00088     *pDst++ = (*pSrcA++) - (*pSrcB++);
00089     *pDst++ = (*pSrcA++) - (*pSrcB++);
00090
00091     /* Decrement the loop counter */
00092     blkCnt--;
00093   }
00094
00095   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00096    ** No loop unrolling is used. */
00097   blkCnt = blockSize % 0x4u;
00098
00099 #else
00100
00101   /* Run the below code for Cortex-M0 */
00102
00103   /* Initialize blkCnt with number of samples */
00104   blkCnt = blockSize;
00105
00106 #endif /* #ifndef ARM_MATH_CM0 */
00107
00108
00109   while(blkCnt > 0u)
00110   {
00111     /* C = A - B */
00112     /* Subtract and then store the results in the destination buffer. */
00113     *pDst++ = (*pSrcA++) - (*pSrcB++);
00114
00115     /* Decrement the loop counter */
00116     blkCnt--;
00117   }
00118 }
00119
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CMSIS DSP Software Library: arm_sub_q7.c File Reference

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arm_sub_q7.c File Reference

#include "arm_math.h"

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Functions

void arm_sub_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_sub_q7.c Source File

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arm_sub_q7.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_sub_q7.c
00009 *
00010 * Description:  Q7 vector subtraction.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_sub_q7(
00059   q7_t * pSrcA,
00060   q7_t * pSrcB,
00061   q7_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   uint32_t blkCnt;                               /* loop counter */
00065
00066 #ifndef ARM_MATH_CM0
00067
00068 /* Run the below code for Cortex-M4 and Cortex-M3 */
00069
00070   /*loop Unrolling */
00071   blkCnt = blockSize >> 2u;
00072
00073   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00074    ** a second loop below computes the remaining 1 to 3 samples. */
00075   while(blkCnt > 0u)
00076   {
00077     /* C = A - B */
00078     /* Subtract and then store the results in the destination buffer 4 samples at a time. */
00079     *__SIMD32(pDst)++ = __QSUB8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
00080
00081     /* Decrement the loop counter */
00082     blkCnt--;
00083   }
00084
00085   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00086    ** No loop unrolling is used. */
00087   blkCnt = blockSize % 0x4u;
00088
00089   while(blkCnt > 0u)
00090   {
00091     /* C = A - B */
00092     /* Subtract and then store the result in the destination buffer. */
00093     *pDst++ = __SSAT(*pSrcA++ - *pSrcB++, 8);
00094
00095     /* Decrement the loop counter */
00096     blkCnt--;
00097   }
00098
00099 #else
00100
00101   /* Run the below code for Cortex-M0 */
00102
00103   /* Initialize blkCnt with number of samples */
00104   blkCnt = blockSize;
00105
00106   while(blkCnt > 0u)
00107   {
00108     /* C = A - B */
00109     /* Subtract and then store the result in the destination buffer. */
00110     *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ - *pSrcB++, 8);
00111
00112     /* Decrement the loop counter */
00113     blkCnt--;
00114   }
00115
00116 #endif /* #ifndef ARM_MATH_CM0 */
00117
00118
00119 }
00120
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CMSIS DSP Software Library: arm_sub_q15.c File Reference

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arm_sub_q15.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_sub_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_sub_q15.c Source File

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arm_sub_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_sub_q15.c
00009 *
00010 * Description:  Q15 vector subtraction.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_sub_q15(
00059   q15_t * pSrcA,
00060   q15_t * pSrcB,
00061   q15_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   uint32_t blkCnt;                               /* loop counter */
00065
00066
00067 #ifndef ARM_MATH_CM0
00068
00069 /* Run the below code for Cortex-M4 and Cortex-M3 */
00070   /*loop Unrolling */
00071   blkCnt = blockSize >> 2u;
00072
00073   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00074    ** a second loop below computes the remaining 1 to 3 samples. */
00075   while(blkCnt > 0u)
00076   {
00077     /* C = A - B */
00078     /* Subtract and then store the results in the destination buffer two samples at a time. */
00079     *__SIMD32(pDst)++ = __QSUB16(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
00080     *__SIMD32(pDst)++ = __QSUB16(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
00081
00082     /* Decrement the loop counter */
00083     blkCnt--;
00084   }
00085
00086   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00087    ** No loop unrolling is used. */
00088   blkCnt = blockSize % 0x4u;
00089
00090   while(blkCnt > 0u)
00091   {
00092     /* C = A - B */
00093     /* Subtract and then store the result in the destination buffer. */
00094     *pDst++ = (q15_t) __QSUB16(*pSrcA++, *pSrcB++);
00095
00096     /* Decrement the loop counter */
00097     blkCnt--;
00098   }
00099
00100 #else
00101
00102   /* Run the below code for Cortex-M0 */
00103
00104   /* Initialize blkCnt with number of samples */
00105   blkCnt = blockSize;
00106
00107   while(blkCnt > 0u)
00108   {
00109     /* C = A - B */
00110     /* Subtract and then store the result in the destination buffer. */
00111     *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ - *pSrcB++), 16);
00112
00113     /* Decrement the loop counter */
00114     blkCnt--;
00115   }
00116
00117 #endif /* #ifndef ARM_MATH_CM0 */
00118
00119
00120 }
00121
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CMSIS DSP Software Library: arm_sub_q31.c File Reference

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arm_sub_q31.c File Reference

#include "arm_math.h"

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Functions

void arm_sub_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
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CMSIS DSP Software Library: arm_sub_q31.c Source File

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arm_sub_q31.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_sub_q31.c
00009 *
00010 * Description:  Q31 vector subtraction.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 *
00029 * Version 0.0.7  2010/06/10
00030 *    Misra-C changes done
00031 * -------------------------------------------------------------------- */
00032
00033 #include "arm_math.h"
00034
00058 void arm_sub_q31(
00059   q31_t * pSrcA,
00060   q31_t * pSrcB,
00061   q31_t * pDst,
00062   uint32_t blockSize)
00063 {
00064   uint32_t blkCnt;                               /* loop counter */
00065
00066
00067 #ifndef ARM_MATH_CM0
00068
00069 /* Run the below code for Cortex-M4 and Cortex-M3 */
00070   /*loop Unrolling */
00071   blkCnt = blockSize >> 2u;
00072
00073   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00074    ** a second loop below computes the remaining 1 to 3 samples. */
00075   while(blkCnt > 0u)
00076   {
00077     /* C = A - B */
00078     /* Subtract and then store the results in the destination buffer. */
00079     *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
00080     *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
00081     *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
00082     *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
00083
00084     /* Decrement the loop counter */
00085     blkCnt--;
00086   }
00087
00088   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00089    ** No loop unrolling is used. */
00090   blkCnt = blockSize % 0x4u;
00091
00092   while(blkCnt > 0u)
00093   {
00094     /* C = A - B */
00095     /* Subtract and then store the result in the destination buffer. */
00096     *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
00097
00098     /* Decrement the loop counter */
00099     blkCnt--;
00100   }
00101
00102 #else
00103
00104   /* Run the below code for Cortex-M0 */
00105
00106   /* Initialize blkCnt with number of samples */
00107   blkCnt = blockSize;
00108
00109   while(blkCnt > 0u)
00110   {
00111     /* C = A - B */
00112     /* Subtract and then store the result in the destination buffer. */
00113     *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ - *pSrcB++);
00114
00115     /* Decrement the loop counter */
00116     blkCnt--;
00117   }
00118
00119 #endif /* #ifndef ARM_MATH_CM0 */
00120
00121 }
00122
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CMSIS DSP Software Library: arm_var_f32.c File Reference

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arm_var_f32.c File Reference

#include "arm_math.h"

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Functions

void arm_var_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
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CMSIS DSP Software Library: arm_var_f32.c Source File

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arm_var_f32.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_var_f32.c
00009 *
00010 * Description:  Variance of the elements of a floating-point vector.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * ---------------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00069 void arm_var_f32(
00070   float32_t * pSrc,
00071   uint32_t blockSize,
00072   float32_t * pResult)
00073 {
00074
00075 #ifndef ARM_MATH_CM0
00076
00077   /* Run the below code for Cortex-M4 and Cortex-M3 */
00078
00079   float32_t sum = (float32_t) 0.0;               /* Accumulator */
00080   float32_t meanOfSquares, mean, in, squareOfMean;      /* Temporary variables */
00081   uint32_t blkCnt;                               /* loop counter */
00082   float32_t *pIn;                                /* Temporary pointer */
00083
00084   /* updating temporary pointer */
00085   pIn = pSrc;
00086
00087   /*loop Unrolling */
00088   blkCnt = blockSize >> 2u;
00089
00090   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00091    ** a second loop below computes the remaining 1 to 3 samples. */
00092   while(blkCnt > 0u)
00093   {
00094     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
00095     /* Compute Sum of squares of the input samples
00096      * and then store the result in a temporary variable, sum. */
00097     in = *pSrc++;
00098     sum += in * in;
00099     in = *pSrc++;
00100     sum += in * in;
00101     in = *pSrc++;
00102     sum += in * in;
00103     in = *pSrc++;
00104     sum += in * in;
00105
00106     /* Decrement the loop counter */
00107     blkCnt--;
00108   }
00109
00110   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00111    ** No loop unrolling is used. */
00112   blkCnt = blockSize % 0x4u;
00113
00114   while(blkCnt > 0u)
00115   {
00116     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00117     /* Compute Sum of squares of the input samples
00118      * and then store the result in a temporary variable, sum. */
00119     in = *pSrc++;
00120     sum += in * in;
00121
00122     /* Decrement the loop counter */
00123     blkCnt--;
00124   }
00125
00126   /* Compute Mean of squares of the input samples
00127    * and then store the result in a temporary variable, meanOfSquares. */
00128   meanOfSquares = sum / ((float32_t) blockSize - 1.0f);
00129
00130   /* Reset the accumulator */
00131   sum = 0.0f;
00132
00133   /*loop Unrolling */
00134   blkCnt = blockSize >> 2u;
00135
00136   /* Reset the input working pointer */
00137   pSrc = pIn;
00138
00139   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00140    ** a second loop below computes the remaining 1 to 3 samples. */
00141   while(blkCnt > 0u)
00142   {
00143     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00144     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00145     sum += *pSrc++;
00146     sum += *pSrc++;
00147     sum += *pSrc++;
00148     sum += *pSrc++;
00149
00150     /* Decrement the loop counter */
00151     blkCnt--;
00152   }
00153
00154   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00155    ** No loop unrolling is used. */
00156   blkCnt = blockSize % 0x4u;
00157
00158   while(blkCnt > 0u)
00159   {
00160     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00161     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00162     sum += *pSrc++;
00163
00164     /* Decrement the loop counter */
00165     blkCnt--;
00166   }
00167   /* Compute mean of all input values */
00168   mean = sum / (float32_t) blockSize;
00169
00170   /* Compute square of mean */
00171   squareOfMean = (mean * mean) * (((float32_t) blockSize) /
00172                                   ((float32_t) blockSize - 1.0f));
00173
00174   /* Compute variance and then store the result to the destination */
00175   *pResult = meanOfSquares - squareOfMean;
00176
00177 #else
00178
00179   /* Run the below code for Cortex-M0 */
00180
00181   float32_t sum = 0.0f;                          /* Temporary result storage */
00182   float32_t sumOfSquares = 0.0f;                 /* Sum of squares */
00183   float32_t squareOfSum;                         /* Square of Sum */
00184   float32_t in;                                  /* input value */
00185   uint32_t blkCnt;                               /* loop counter */
00186
00187   /* Loop over blockSize number of values */
00188   blkCnt = blockSize;
00189
00190   while(blkCnt > 0u)
00191   {
00192     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00193     /* Compute Sum of squares of the input samples
00194      * and then store the result in a temporary variable, sumOfSquares. */
00195     in = *pSrc++;
00196     sumOfSquares += in * in;
00197
00198     /* C = (A[0] + A[1] + ... + A[blockSize-1]) */
00199     /* Compute Sum of the input samples
00200      * and then store the result in a temporary variable, sum. */
00201     sum += in;
00202
00203     /* Decrement the loop counter */
00204     blkCnt--;
00205   }
00206
00207   /* Compute the square of sum */
00208   squareOfSum = ((sum * sum) / (float32_t) blockSize);
00209
00210   /* Compute the variance */
00211   *pResult = ((sumOfSquares - squareOfSum) / (float32_t) (blockSize - 1.0f));
00212
00213 #endif /* #ifndef ARM_MATH_CM0 */
00214
00215 }
00216
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CMSIS DSP Software Library: arm_var_q15.c File Reference

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arm_var_q15.c File Reference

#include "arm_math.h"

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Functions

void arm_var_q15 (q15_t *pSrc, uint32_t blockSize, q31_t *pResult)
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CMSIS DSP Software Library: arm_var_q15.c Source File

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arm_var_q15.c

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00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_var_q15.c
00009 *
00010 * Description:  Variance of an array of Q15 type.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00064 void arm_var_q15(
00065   q15_t * pSrc,
00066   uint32_t blockSize,
00067   q31_t * pResult)
00068 {
00069   q63_t sum = 0;                                 /* Accumulator */
00070   q31_t meanOfSquares, squareOfMean;             /* Mean of square and square of mean */
00071   q15_t mean;                                    /* mean */
00072   uint32_t blkCnt;                               /* loop counter */
00073   q15_t t;                                       /* Temporary variable */
00074
00075 #ifndef ARM_MATH_CM0
00076
00077   /* Run the below code for Cortex-M4 and Cortex-M3 */
00078
00079   q31_t in;                                      /* Input variable */
00080   q15_t in1;                                     /* Temporary variable */
00081   q15_t *pIn;                                    /* Temporary pointer */
00082
00083   pIn = pSrc;
00084
00085   /*loop Unrolling */
00086   blkCnt = blockSize >> 2u;
00087
00088   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00089    ** a second loop below computes the remaining 1 to 3 samples. */
00090   while(blkCnt > 0u)
00091   {
00092     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
00093     /* Compute Sum of squares of the input samples
00094      * and then store the result in a temporary variable, sum. */
00095     in = *__SIMD32(pSrc)++;
00096     sum = __SMLALD(in, in, sum);
00097     in = *__SIMD32(pSrc)++;
00098     sum = __SMLALD(in, in, sum);
00099
00100     /* Decrement the loop counter */
00101     blkCnt--;
00102   }
00103
00104   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00105    ** No loop unrolling is used. */
00106   blkCnt = blockSize % 0x4u;
00107
00108   while(blkCnt > 0u)
00109   {
00110     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00111     /* Compute Sum of squares of the input samples
00112      * and then store the result in a temporary variable, sum. */
00113     in1 = *pSrc++;
00114     sum = __SMLALD(in1, in1, sum);
00115
00116     /* Decrement the loop counter */
00117     blkCnt--;
00118   }
00119
00120   /* Compute Mean of squares of the input samples
00121    * and then store the result in a temporary variable, meanOfSquares. */
00122   t = (q15_t) ((1.0f / (float32_t) (blockSize - 1u)) * 16384);
00123   sum = __SSAT((sum >> 15u), 16u);
00124
00125   meanOfSquares = (q31_t) ((sum * t) >> 14u);
00126
00127   /* Reset the accumulator */
00128   sum = 0;
00129
00130   /*loop Unrolling */
00131   blkCnt = blockSize >> 2u;
00132
00133   /* Reset the input working pointer */
00134   pSrc = pIn;
00135
00136   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00137    ** a second loop below computes the remaining 1 to 3 samples. */
00138   while(blkCnt > 0u)
00139   {
00140     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00141     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00142     sum += *pSrc++;
00143     sum += *pSrc++;
00144     sum += *pSrc++;
00145     sum += *pSrc++;
00146
00147     /* Decrement the loop counter */
00148     blkCnt--;
00149   }
00150
00151   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00152    ** No loop unrolling is used. */
00153   blkCnt = blockSize % 0x4u;
00154
00155   while(blkCnt > 0u)
00156   {
00157     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00158     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00159     sum += *pSrc++;
00160
00161     /* Decrement the loop counter */
00162     blkCnt--;
00163   }
00164
00165 #else
00166
00167   /* Run the below code for Cortex-M0 */
00168
00169   q63_t sumOfSquares = 0;                        /* Accumulator */
00170   q15_t in;                                      /* Temporary variable */
00171   /* Loop over blockSize number of values */
00172   blkCnt = blockSize;
00173
00174   while(blkCnt > 0u)
00175   {
00176     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00177     /* Compute Sum of squares of the input samples
00178      * and then store the result in a temporary variable, sumOfSquares. */
00179     in = *pSrc++;
00180     sumOfSquares += (in * in);
00181
00182     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00183     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00184     sum += in;
00185
00186     /* Decrement the loop counter */
00187     blkCnt--;
00188   }
00189
00190   /* Compute Mean of squares of the input samples
00191    * and then store the result in a temporary variable, meanOfSquares. */
00192   t = (q15_t) ((1.0f / (float32_t) (blockSize - 1u)) * 16384);
00193   sumOfSquares = __SSAT((sumOfSquares >> 15u), 16u);
00194   meanOfSquares = (q31_t) ((sumOfSquares * t) >> 14u);
00195
00196
00197 #endif /* #ifndef ARM_MATH_CM0 */
00198
00199   /* Compute mean of all input values */
00200   t = (q15_t) ((1.0f / (float32_t) (blockSize * (blockSize - 1u))) * 32768);
00201   mean = __SSAT(sum, 16u);
00202
00203   /* Compute square of mean */
00204   squareOfMean = ((q31_t) mean * mean) >> 15;
00205   squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 15);
00206
00207   /* Compute variance and then store the result to the destination */
00208   *pResult = (meanOfSquares - squareOfMean);
00209
00210 }
00211
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CMSIS DSP Software Library: arm_var_q31.c File Reference

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Functions

arm_var_q31.c File Reference

#include "arm_math.h"

Go to the source code of this file.

Functions

void arm_var_q31 (q31_t *pSrc, uint32_t blockSize, q63_t *pResult)
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CMSIS DSP Software Library: arm_var_q31.c Source File

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  • File List
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arm_var_q31.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        15. July 2011
00005 * $Revision:    V1.0.10
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_var_q31.c
00009 *
00010 * Description:  Variance of an array of Q31 type.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *
00014 * Version 1.0.10 2011/7/15
00015 *    Big Endian support added and Merged M0 and M3/M4 Source code.
00016 *
00017 * Version 1.0.3 2010/11/29
00018 *    Re-organized the CMSIS folders and updated documentation.
00019 *
00020 * Version 1.0.2 2010/11/11
00021 *    Documentation updated.
00022 *
00023 * Version 1.0.1 2010/10/05
00024 *    Production release and review comments incorporated.
00025 *
00026 * Version 1.0.0 2010/09/20
00027 *    Production release and review comments incorporated.
00028 * -------------------------------------------------------------------- */
00029
00030 #include "arm_math.h"
00031
00066 void arm_var_q31(
00067   q31_t * pSrc,
00068   uint32_t blockSize,
00069   q63_t * pResult)
00070 {
00071   q63_t sum = 0;                                 /* Accumulator */
00072   q31_t meanOfSquares, squareOfMean;             /* Mean of square and square of mean */
00073   q31_t mean;                                    /* Mean */
00074   q31_t in;                                      /* Input variable */
00075   q31_t t;                                       /* Temporary variable */
00076   uint32_t blkCnt;                               /* loop counter */
00077
00078 #ifndef ARM_MATH_CM0
00079
00080   /* Run the below code for Cortex-M4 and Cortex-M3 */
00081
00082   q31_t *pIn;                                    /* Temporary pointer */
00083
00084   pIn = pSrc;
00085
00086   /*loop Unrolling */
00087   blkCnt = blockSize >> 2u;
00088
00089   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00090    ** a second loop below computes the remaining 1 to 3 samples. */
00091   while(blkCnt > 0u)
00092   {
00093     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
00094     /* Compute Sum of squares of the input samples
00095      * and then store the result in a temporary variable, sum. */
00096     in = *pSrc++;
00097     sum += ((q63_t) (in) * (in));
00098     in = *pSrc++;
00099     sum += ((q63_t) (in) * (in));
00100     in = *pSrc++;
00101     sum += ((q63_t) (in) * (in));
00102     in = *pSrc++;
00103     sum += ((q63_t) (in) * (in));
00104
00105     /* Decrement the loop counter */
00106     blkCnt--;
00107   }
00108
00109   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00110    ** No loop unrolling is used. */
00111   blkCnt = blockSize % 0x4u;
00112
00113   while(blkCnt > 0u)
00114   {
00115     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
00116     /* Compute Sum of squares of the input samples
00117      * and then store the result in a temporary variable, sum. */
00118     in = *pSrc++;
00119     sum += ((q63_t) (in) * (in));
00120
00121     /* Decrement the loop counter */
00122     blkCnt--;
00123   }
00124
00125   /* Compute Mean of squares of the input samples
00126    * and then store the result in a temporary variable, meanOfSquares. */
00127   t = (q31_t) ((1.0 / (blockSize - 1)) * 1073741824LL);
00128   sum = (sum >> 31);
00129   meanOfSquares = (q31_t) ((sum * t) >> 30);
00130
00131   /* Reset the accumulator */
00132   sum = 0;
00133
00134   /*loop Unrolling */
00135   blkCnt = blockSize >> 2u;
00136
00137   /* Reset the input working pointer */
00138   pSrc = pIn;
00139
00140   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00141    ** a second loop below computes the remaining 1 to 3 samples. */
00142   while(blkCnt > 0u)
00143   {
00144     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00145     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00146     sum += *pSrc++;
00147     sum += *pSrc++;
00148     sum += *pSrc++;
00149     sum += *pSrc++;
00150
00151     /* Decrement the loop counter */
00152     blkCnt--;
00153   }
00154
00155   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00156    ** No loop unrolling is used. */
00157   blkCnt = blockSize % 0x4u;
00158
00159   while(blkCnt > 0u)
00160   {
00161     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00162     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00163     sum += *pSrc++;
00164
00165     /* Decrement the loop counter */
00166     blkCnt--;
00167   }
00168
00169 #else
00170
00171   /* Run the below code for Cortex-M0 */
00172
00173   q63_t sumOfSquares = 0;                        /* Accumulator */
00174   /* Loop over blockSize number of values */
00175   blkCnt = blockSize;
00176
00177   while(blkCnt > 0u)
00178   {
00179     /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
00180     /* Compute Sum of squares of the input samples
00181      * and then store the result in a temporary variable, sumOfSquares. */
00182     in = *pSrc++;
00183     sumOfSquares += ((q63_t) (in) * (in));
00184
00185     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
00186     /* Compute sum of all input values and then store the result in a temporary variable, sum. */
00187     sum += in;
00188
00189     /* Decrement the loop counter */
00190     blkCnt--;
00191   }
00192
00193   /* Compute Mean of squares of the input samples
00194    * and then store the result in a temporary variable, meanOfSquares. */
00195   t = (q31_t) ((1.0 / (blockSize - 1)) * 1073741824LL);
00196   sumOfSquares = (sumOfSquares >> 31);
00197   meanOfSquares = (q31_t) ((sumOfSquares * t) >> 30);
00198
00199 #endif /* #ifndef ARM_MATH_CM0 */
00200
00201   /* Compute mean of all input values */
00202   t = (q31_t) ((1.0 / (blockSize * (blockSize - 1u))) * 2147483648LL);
00203   mean = (q31_t) (sum);
00204
00205   /* Compute square of mean */
00206   squareOfMean = (q31_t) (((q63_t) mean * mean) >> 31);
00207   squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 31);
00208
00209   /* Compute variance and then store the result to the destination */
00210   *pResult = (q63_t) meanOfSquares - squareOfMean;
00211
00212 }
00213
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CMSIS DSP Software Library: arm_variance_example_f32.c File Reference

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Defines | Functions | Variables

arm_variance_example_f32.c File Reference

#include <math.h>
#include "arm_math.h"

Go to the source code of this file.

Defines

#define | MAX_BLOCKSIZE 32
#define | DELTA (0.000001f)

Functions

int32_t | main (void)

Variables

float32_t | wire1 [MAX_BLOCKSIZE]
float32_t | wire2 [MAX_BLOCKSIZE]
float32_t | wire3 [MAX_BLOCKSIZE]
float32_t | testInput_f32 [32]
uint32_t | blockSize = 32
float32_t | refVarianceOut = 0.903941793931839

Define Documentation

#define MAX_BLOCKSIZE 32

Definition at line 83 of file arm_variance_example_f32.c.

#define DELTA (0.000001f)

Definition at line 84 of file arm_variance_example_f32.c.

Function Documentation

int32_t main ( void )

Definition at line 122 of file arm_variance_example_f32.c.

Variable Documentation

float32_t wire1[MAX_BLOCKSIZE]

Definition at line 90 of file arm_variance_example_f32.c.

float32_t wire2[MAX_BLOCKSIZE]

Definition at line 91 of file arm_variance_example_f32.c.

float32_t wire3[MAX_BLOCKSIZE]

Definition at line 92 of file arm_variance_example_f32.c.

float32_t testInput_f32[32]
Initial value:

{
-0.432564811528221,     -1.665584378238097,     0.125332306474831,      0.287676420358549,
-1.146471350681464,     1.190915465642999,      1.189164201652103,      -0.037633276593318,
0.327292361408654,      0.174639142820925,      -0.186708577681439,     0.725790548293303,
-0.588316543014189,     2.183185818197101,      -0.136395883086596,     0.113931313520810,
1.066768211359189,      0.059281460523605,      -0.095648405483669,     -0.832349463650022,
0.294410816392640,      -1.336181857937804,     0.714324551818952,      1.623562064446271,
-0.691775701702287,     0.857996672828263,      1.254001421602532,      -1.593729576447477,
-1.440964431901020,     0.571147623658178,      -0.399885577715363,     0.689997375464345

}

Definition at line 99 of file arm_variance_example_f32.c.

uint32_t blockSize = 32

Definition at line 115 of file arm_variance_example_f32.c.

float32_t refVarianceOut = 0.903941793931839
Examples:
arm_variance_example_f32.c.

Definition at line 116 of file arm_variance_example_f32.c.

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CMSIS DSP Software Library: arm_variance_example_f32.c Source File

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arm_variance_example_f32.c

Go to the documentation of this file.
00001 /* ----------------------------------------------------------------------
00002 * Copyright (C) 2010 ARM Limited. All rights reserved.
00003 *
00004 * $Date:        29. November 2010
00005 * $Revision:    V1.0.3
00006 *
00007 * Project:      CMSIS DSP Library
00008 * Title:        arm_variance_example_f32.c
00009 *
00010 * Description:  Example code demonstrating variance calculation of input sequence.
00011 *
00012 * Target Processor: Cortex-M4/Cortex-M3
00013 *
00014 *
00015 * Version 1.0.3 2010/11/29
00016 *    Re-organized the CMSIS folders and updated documentation.
00017 *
00018 * Version 1.0.1 2010/10/05 KK
00019 *    Production release and review comments incorporated.
00020 *
00021 * Version 1.0.0 2010/09/20 KK
00022 *    Production release and review comments incorporated.
00023 * ------------------------------------------------------------------- */
00024
00077 #include <math.h>
00078 #include "arm_math.h"
00079
00080 /* ----------------------------------------------------------------------
00081 * Defines each of the tests performed
00082 * ------------------------------------------------------------------- */
00083 #define MAX_BLOCKSIZE   32
00084 #define DELTA           (0.000001f)
00085
00086
00087 /* ----------------------------------------------------------------------
00088 * Declare I/O buffers
00089 * ------------------------------------------------------------------- */
00090 float32_t wire1[MAX_BLOCKSIZE];
00091 float32_t wire2[MAX_BLOCKSIZE];
00092 float32_t wire3[MAX_BLOCKSIZE];
00093
00094 /* ----------------------------------------------------------------------
00095 * Test input data for Floating point Variance example for 32-blockSize
00096 * Generated by the MATLAB randn() function
00097 * ------------------------------------------------------------------- */
00098
00099 float32_t testInput_f32[32] =
00100 {
00101 -0.432564811528221,     -1.665584378238097,     0.125332306474831,      0.287676420358549,
00102 -1.146471350681464,     1.190915465642999,      1.189164201652103,      -0.037633276593318,
00103 0.327292361408654,      0.174639142820925,      -0.186708577681439,     0.725790548293303,
00104 -0.588316543014189,     2.183185818197101,      -0.136395883086596,     0.113931313520810,
00105 1.066768211359189,      0.059281460523605,      -0.095648405483669,     -0.832349463650022,
00106 0.294410816392640,      -1.336181857937804,     0.714324551818952,      1.623562064446271,
00107 -0.691775701702287,     0.857996672828263,      1.254001421602532,      -1.593729576447477,
00108 -1.440964431901020,     0.571147623658178,      -0.399885577715363,     0.689997375464345
00109
00110 };
00111
00112 /* ----------------------------------------------------------------------
00113 * Declare Global variables
00114 * ------------------------------------------------------------------- */
00115 uint32_t blockSize = 32;
00116 float32_t  refVarianceOut = 0.903941793931839;
00117
00118 /* ----------------------------------------------------------------------
00119 * Variance calculation test
00120 * ------------------------------------------------------------------- */
00121
00122 int32_t main(void)
00123 {
00124     arm_status status;
00125     float32_t mean, oneByBlockSize;
00126     float32_t variance;
00127     float32_t diff;
00128
00129     status = ARM_MATH_SUCCESS;
00130
00131     /* Calculation of mean value of input */
00132
00133     /* x' = 1/blockSize * (x(0)* 1 + x(1) * 1 + ... + x(n-1) * 1) */
00134
00135     /* Fill wire1 buffer with 1.0 value */
00136     arm_fill_f32(1.0,  wire1, blockSize);
00137
00138     /* Calculate the dot product of wire1 and wire2 */
00139     /* (x(0)* 1 + x(1) * 1 + ...+ x(n-1) * 1) */
00140     arm_dot_prod_f32(testInput_f32, wire1, blockSize, &mean);
00141
00142     /* Calculation of 1/blockSize */
00143     oneByBlockSize = 1.0 / (blockSize);
00144
00145     /* 1/blockSize * (x(0)* 1 + x(1) * 1 + ... + x(n-1) * 1)  */
00146     arm_mult_f32(&mean, &oneByBlockSize, &mean, 1);
00147
00148
00149     /* Calculation of variance value of input */
00150
00151     /* (1/blockSize) * (x(0) - x') * (x(0) - x') + (x(1) - x') * (x(1) - x') + ... + (x(n-1) - x') * (x(n-1) - x') */
00152
00153     /* Fill wire2 with mean value x' */
00154     arm_fill_f32(mean,  wire2, blockSize);
00155
00156     /* wire3 contains (x-x') */
00157     arm_sub_f32(testInput_f32, wire2, wire3, blockSize);
00158
00159     /* wire2 contains (x-x') */
00160     arm_copy_f32(wire3, wire2, blockSize);
00161
00162     /* (x(0) - x') * (x(0) - x') + (x(1) - x') * (x(1) - x') + ... + (x(n-1) - x') * (x(n-1) - x') */
00163     arm_dot_prod_f32(wire2, wire3, blockSize, &variance);
00164
00165     /* Calculation of 1/blockSize */
00166     oneByBlockSize = 1.0 / (blockSize - 1);
00167
00168     /* Calculation of variance */
00169     arm_mult_f32(&variance, &oneByBlockSize, &variance, 1);
00170
00171     /* absolute value of difference between ref and test */
00172     diff = fabsf(refVarianceOut - variance);
00173
00174     /* Comparison of variance value with reference */
00175     if(diff > DELTA)
00176     {
00177         status = ARM_MATH_TEST_FAILURE;
00178     }
00179
00180     if( status != ARM_MATH_SUCCESS)
00181     {
00182       while(1);
00183     }
00184 }
00185
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CMSIS DSP Software Library: arm_class_marks_example_f32.c

  • Examples

arm_class_marks_example_f32.c

/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date:        29. November 2010
* $Revision:    V1.0.3
*
* Project:      CMSIS DSP Library
* Title:        arm_class_marks_example_f32.c
*
* Description:  Example code to calculate Minimum, Maximum
*               Mean, std and variance of marks obtained in a class
*
* Target Processor: Cortex-M4/Cortex-M3
*
* Version 1.0.3 2010/11/29
*    Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.1 2010/10/05 KK
*    Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20 KK
*    Production release and review comments incorporated.
* ------------------------------------------------------------------- */

#include "arm_math.h"

#define USE_STATIC_INIT

 /* ----------------------------------------------------------------------
** Global defines
** ------------------------------------------------------------------- */

#define TEST_LENGTH_SAMPLES     (20*4)

/* ----------------------------------------------------------------------
** List of Marks scored by 20 students for 4 subjects
** ------------------------------------------------------------------- */
const float32_t testMarks_f32[TEST_LENGTH_SAMPLES] =
{
    42.000000,  37.000000,  81.000000,  28.000000,
    83.000000,  72.000000,  36.000000,  38.000000,
    32.000000,  51.000000,  63.000000,  64.000000,
    97.000000,  82.000000,  95.000000,  90.000000,
    66.000000,  51.000000,  54.000000,  42.000000,
    67.000000,  56.000000,  45.000000,  57.000000,
    67.000000,  69.000000,  35.000000,  52.000000,
    29.000000,  81.000000,  58.000000,  47.000000,
    38.000000,  76.000000,  100.000000, 29.000000,
    33.000000,  47.000000,  29.000000,  50.000000,
    34.000000,  41.000000,  61.000000,  46.000000,
    52.000000,  50.000000,  48.000000,  36.000000,
    47.000000,  55.000000,  44.000000,  40.000000,
    100.000000, 94.000000,  84.000000,  37.000000,
    32.000000,  71.000000,  47.000000,  77.000000,
    31.000000,  50.000000,  49.000000,  35.000000,
    63.000000,  67.000000,  40.000000,  31.000000,
    29.000000,  68.000000,  61.000000,  38.000000,
    31.000000,  28.000000,  28.000000,  76.000000,
    55.000000,  33.000000,  29.000000,  39.000000
};

/* ----------------------------------------------------------------------
* Number of subjects X 1
* ------------------------------------------------------------------- */
const float32_t testUnity_f32[4] =
{
    1.000,  1.000,  1.000,  1.000
};

/* ----------------------------------------------------------------------
** f32 Output buffer
** ------------------------------------------------------------------- */
static float32_t testOutput[TEST_LENGTH_SAMPLES];

/* ------------------------------------------------------------------
* Global defines
*------------------------------------------------------------------- */
#define     NUMSTUDENTS  20
#define     NUMSUBJECTS  4

/* ------------------------------------------------------------------
* Global variables
*------------------------------------------------------------------- */

uint32_t    numStudents = 20;
uint32_t    numSubjects = 4;
float32_t   max_marks, min_marks, mean, std, var;
uint32_t    student_num;

/* ----------------------------------------------------------------------------------
* Main f32 test function.  It returns maximum marks secured and student number
* ------------------------------------------------------------------------------- */

int32_t main()
{

#ifndef  USE_STATIC_INIT

    arm_matrix_instance_f32 srcA;
    arm_matrix_instance_f32 srcB;
    arm_matrix_instance_f32 dstC;

    /* Input and output matrices initializations */
    arm_mat_init_f32(&srcA, numStudents, numSubjects, (float32_t *)testMarks_f32);
    arm_mat_init_f32(&srcB, numSubjects, 1, (float32_t *)testUnity_f32);
    arm_mat_init_f32(&dstC, numStudents, 1, testOutput);

#else

    /* Static Initializations of Input and output matrix sizes and array */
    arm_matrix_instance_f32 srcA = {NUMSTUDENTS, NUMSUBJECTS, (float32_t *)testMarks_f32};
    arm_matrix_instance_f32 srcB = {NUMSUBJECTS, 1, (float32_t *)testUnity_f32};
    arm_matrix_instance_f32 dstC = {NUMSTUDENTS, 1, testOutput};

#endif

    /* ----------------------------------------------------------------------
    *Call the Matrix multiplication process function
    * ------------------------------------------------------------------- */
    arm_mat_mult_f32(&srcA, &srcB, &dstC);

    /* ----------------------------------------------------------------------
    ** Call the Max function to calculate max marks among numStudents
    ** ------------------------------------------------------------------- */
    arm_max_f32(testOutput, numStudents, &max_marks, &student_num);

    /* ----------------------------------------------------------------------
    ** Call the Min function to calculate min marks among numStudents
    ** ------------------------------------------------------------------- */
    arm_min_f32(testOutput, numStudents, &min_marks, &student_num);

    /* ----------------------------------------------------------------------
    ** Call the Mean function to calculate mean
    ** ------------------------------------------------------------------- */
    arm_mean_f32(testOutput, numStudents, &mean);

    /* ----------------------------------------------------------------------
    ** Call the std function to calculate standard deviation
    ** ------------------------------------------------------------------- */
    arm_std_f32(testOutput, numStudents, &std);

    /* ----------------------------------------------------------------------
    ** Call the var function to calculate variance
    ** ------------------------------------------------------------------- */
    arm_var_f32(testOutput, numStudents, &var);

}
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
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CMSIS DSP Software Library: arm_convolution_example_f32.c

  • Examples

arm_convolution_example_f32.c

/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date:        29. November 2010
* $Revision:    V1.0.3
*
* Project:      CMSIS DSP Library
* Title:        arm_convolution_example_f32.c
*
* Description:  Example code demonstrating Convolution of two input signals using fft.
*
* Target Processor: Cortex-M4/Cortex-M3
*
*
* Version 1.0.3 2010/11/29
*    Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.1 2010/10/05 KK
*    Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20 KK
*    Production release and review comments incorporated.
* ------------------------------------------------------------------- */

#include "arm_math.h"
#include "math_helper.h"

/* ----------------------------------------------------------------------
* Defines each of the tests performed
* ------------------------------------------------------------------- */
#define MAX_BLOCKSIZE   128
#define DELTA           (0.000001f)
#define SNR_THRESHOLD   90

/* ----------------------------------------------------------------------
* Declare I/O buffers
* ------------------------------------------------------------------- */
float32_t Ak[MAX_BLOCKSIZE];        /* Input A */
float32_t Bk[MAX_BLOCKSIZE];        /* Input B */
float32_t AxB[MAX_BLOCKSIZE * 2];   /* Output */

/* ----------------------------------------------------------------------
* Test input data for Floating point Convolution example for 32-blockSize
* Generated by the MATLAB randn() function
* ------------------------------------------------------------------- */
float32_t testInputA_f32[64] =
{
-0.808920,  1.357369,   1.180861,   -0.504544,  1.762637,   -0.703285,
1.696966,   0.620571,   -0.151093,  -0.100235,  -0.872382,  -0.403579,
-0.860749,  -0.382648,  -1.052338,  0.128113,   -0.646269,  1.093377,
-2.209198,  0.471706,   0.408901,   1.266242,   0.598252,   1.176827,
-0.203421,  0.213596,   -0.851964,  -0.466958,  0.021841,   -0.698938,
-0.604107,  0.461778,   -0.318219,  0.942520,   0.577585,   0.417619,
0.614665,   0.563679,   -1.295073,  -0.764437,  0.952194,   -0.859222,
-0.618554,  -2.268542,  -1.210592,  1.655853,   -2.627219,  -0.994249,
-1.374704,  0.343799,   0.025619,   1.227481,   -0.708031,  0.069355,
-1.845228,  -1.570886,  1.010668,   -1.802084,  1.630088,   1.286090,
-0.161050,  -0.940794,  0.367961,   0.291907

};

float32_t testInputB_f32[64] =
{
0.933724,   0.046881,   1.316470,   0.438345,   0.332682,   2.094885,
0.512081,   0.035546,   0.050894,   -2.320371,  0.168711,   -1.830493,
-0.444834,  -1.003242,  -0.531494,  -1.365600,  -0.155420,  -0.757692,
-0.431880,  -0.380021,  0.096243,   -0.695835,  0.558850,   -1.648962,
0.020369,   -0.363630,  0.887146,   0.845503,   -0.252864,  -0.330397,
1.269131,   -1.109295,  -1.027876,  0.135940,   0.116721,   -0.293399,
-1.349799,  0.166078,   -0.802201,  0.369367,   -0.964568,  -2.266011,
0.465178,   0.651222,   -0.325426,  0.320245,   -0.784178,  -0.579456,
0.093374,   0.604778,   -0.048225,  0.376297,   -0.394412,  0.578182,
-1.218141,  -1.387326,  0.692462,   -0.631297,  0.153137,   -0.638952,
0.635474,   -0.970468,  1.334057,   -0.111370
};

const float testRefOutput_f32[126] =
{
-0.818943,  1.229484,   -0.533664,  1.016604,   0.341875,   -1.963656,
5.171476,   3.478033,   7.616361,   6.648384,   0.479069,   1.792012,
-1.295591,  -7.447818,  0.315830,   -10.657445, -2.483469,  -6.524236,
-7.380591,  -3.739005,  -8.388957,  0.184147,   -1.554888,  3.786508,
-1.684421,  5.400610,   -1.578126,  7.403361,   8.315999,   2.080267,
11.077776,  2.749673,   7.138962,   2.748762,   0.660363,   0.981552,
1.442275,   0.552721,   -2.576892,  4.703989,   0.989156,   8.759344,
-0.564825,  -3.994680,  0.954710,   -5.014144,  6.592329,   1.599488,
-13.979146, -0.391891,  -4.453369,  -2.311242,  -2.948764,  1.761415,
-0.138322,  10.433007,  -2.309103,  4.297153,   8.535523,   3.209462,
8.695819,   5.569919,   2.514304,   5.582029,   2.060199,   0.642280,
7.024616,   1.686615,   -6.481756,  1.343084,   -3.526451,  1.099073,
-2.965764,  -0.173723,  -4.111484,  6.528384,   -6.965658,  1.726291,
1.535172,   11.023435,  2.338401,   -4.690188,  1.298210,   3.943885,
8.407885,   5.168365,   0.684131,   1.559181,   1.859998,   2.852417,
8.574070,   -6.369078,  6.023458,   11.837963,  -6.027632,  4.469678,
-6.799093,  -2.674048,  6.250367,   -6.809971,  -3.459360,  9.112410,
-2.711621,  -1.336678,  1.564249,   -1.564297,  -1.296760,  8.904013,
-3.230109,  6.878013,   -7.819823,  3.369909,   -1.657410,  -2.007358,
-4.112825,  1.370685,   -3.420525,  -6.276605,  3.244873,   -3.352638,
1.545372,   0.902211,   0.197489,   -1.408732,  0.523390,   0.348440
};

/* ----------------------------------------------------------------------
* Declare Global variables
* ------------------------------------------------------------------- */
uint32_t srcALen = 64;   /* Length of Input A */
uint32_t srcBLen = 64;   /* Length of Input B */
uint32_t outLen;         /* Length of convolution output */
float32_t snr;           /* output SNR */

int32_t main(void)
{
    arm_status status;     /* Status of the example */
    arm_cfft_radix4_instance_f32 cfft_instance; /* CFFT Structure instance */

    /* CFFT Structure instance pointer */
    arm_cfft_radix4_instance_f32 *cfft_instance_ptr =
            (arm_cfft_radix4_instance_f32*) &cfft_instance;

    /* output length of convolution */
    outLen = srcALen + srcBLen - 1;

    /* Initialise the fft input buffers with all zeros */
    arm_fill_f32(0.0,  Ak, MAX_BLOCKSIZE);
    arm_fill_f32(0.0,  Bk, MAX_BLOCKSIZE);

    /* Copy the input values to the fft input buffers */
    arm_copy_f32(testInputA_f32,  Ak, MAX_BLOCKSIZE/2);
    arm_copy_f32(testInputB_f32,  Bk, MAX_BLOCKSIZE/2);

    /* Initialize the CFFT function to compute 64 point fft */
    status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 0, 1);

    /* Transform input a[n] from time domain to frequency domain A[k] */
    arm_cfft_radix4_f32(cfft_instance_ptr, Ak);
    /* Transform input b[n] from time domain to frequency domain B[k] */
    arm_cfft_radix4_f32(cfft_instance_ptr, Bk);

    /* Complex Multiplication of the two input buffers in frequency domain */
    arm_cmplx_mult_cmplx_f32(Ak, Bk, AxB, MAX_BLOCKSIZE/2);

    /* Initialize the CIFFT function to compute 64 point ifft */
    status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 1, 1);

    /* Transform the multiplication output from frequency domain to time domain,
       that gives the convolved output  */
    arm_cfft_radix4_f32(cfft_instance_ptr, AxB);

    /* SNR Calculation */
    snr = arm_snr_f32((float32_t *)testRefOutput_f32, AxB, srcALen + srcBLen - 1);

    /* Compare the SNR with threshold to test whether the
       computed output is matched with the reference output values. */
    if( snr > SNR_THRESHOLD)
    {
        status = ARM_MATH_SUCCESS;
    }

    if( status != ARM_MATH_SUCCESS)
    {
      while(1);
    }
}
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CMSIS DSP Software Library: arm_dotproduct_example_f32.c

  • Examples

arm_dotproduct_example_f32.c

/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date:        29. November 2010
* $Revision:    V1.0.3
*
* Project:      CMSIS DSP Library
* Title:        arm_dotproduct_example_f32.c
*
* Description:  Example code computing dot product of two vectors.
*
* Target Processor: Cortex-M4/Cortex-M3
*
*
* Version 1.0.3 2010/11/29
*    Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.1 2010/10/05 KK
*    Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20 KK
*    Production release and review comments incorporated.
* ------------------------------------------------------------------- */

#include <math.h>
#include "arm_math.h"

/* ----------------------------------------------------------------------
* Defines each of the tests performed
* ------------------------------------------------------------------- */
#define MAX_BLOCKSIZE   32
#define DELTA           (0.000001f)

/* ----------------------------------------------------------------------
* Test input data for Floating point Dot Product example for 32-blockSize
* Generated by the MATLAB randn() function
* ------------------------------------------------------------------- */
/* ----------------------------------------------------------------------
** Test input data of srcA for blockSize 32
** ------------------------------------------------------------------- */
float32_t srcA_buf_f32[MAX_BLOCKSIZE] =
{
-0.4325648115282207,    -1.6655843782380970,    0.1253323064748307,
 0.2876764203585489,    -1.1464713506814637,    1.1909154656429988,
 1.1891642016521031,    -0.0376332765933176,    0.3272923614086541,
 0.1746391428209245,    -0.1867085776814394,    0.7257905482933027,
-0.5883165430141887,     2.1831858181971011,   -0.1363958830865957,
 0.1139313135208096,     1.0667682113591888,    0.0592814605236053,
-0.0956484054836690,    -0.8323494636500225,    0.2944108163926404,
-1.3361818579378040,     0.7143245518189522,    1.6235620644462707,
-0.6917757017022868,     0.8579966728282626,    1.2540014216025324,
-1.5937295764474768,    -1.4409644319010200,    0.5711476236581780,
-0.3998855777153632,     0.6899973754643451
};

/* ----------------------------------------------------------------------
** Test input data of srcB for blockSize 32
** ------------------------------------------------------------------- */
float32_t srcB_buf_f32[MAX_BLOCKSIZE] =
{
 1.7491401329284098,    0.1325982188803279,  0.3252281811989881,
-0.7938091410349637,    0.3149236145048914, -0.5272704888029532,
 0.9322666565031119,    1.1646643544607362, -2.0456694357357357,
-0.6443728590041911,    1.7410657940825480,  0.4867684246821860,
 1.0488288293660140,    1.4885752747099299,  1.2705014969484090,
-1.8561241921210170,    2.1343209047321410,  1.4358467535865909,
-0.9173023332875400,   -1.1060770780029008,  0.8105708062681296,
 0.6985430696369063,   -0.4015827425012831,  1.2687512030669628,
-0.7836083053674872,    0.2132664971465569,  0.7878984786088954,
 0.8966819356782295,   -0.1869172943544062,  1.0131816724341454,
 0.2484350696132857,    0.0596083377937976
};

/* Reference dot product output */
float32_t  refDotProdOut = 5.9273644806352142;

/* ----------------------------------------------------------------------
* Declare Global variables
* ------------------------------------------------------------------- */
float32_t multOutput[MAX_BLOCKSIZE];  /* Intermediate output */
float32_t testOutput;  /* Final ouput */

arm_status status;   /* Status of the example */

int32_t main(void)
{
    uint32_t i;          /* Loop counter */
    float32_t diff;      /* Difference between reference and test outputs */

    /* Multiplication of two input buffers */
    arm_mult_f32(srcA_buf_f32, srcB_buf_f32, multOutput, MAX_BLOCKSIZE);

    /* Accumulate the multiplication output values to
       get the dot product of the two inputs */
    for(i=0; i< MAX_BLOCKSIZE; i++)
    {
        arm_add_f32(&testOutput, &multOutput[i], &testOutput, 1);
    }

    /* absolute value of difference between ref and test */
    diff = fabsf(refDotProdOut - testOutput);

    /* Comparison of dot product value with reference */
    if(diff > DELTA)
    {
        status = ARM_MATH_TEST_FAILURE;
    }

    if( status == ARM_MATH_TEST_FAILURE)
    {
      while(1);
    }
}
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CMSIS DSP Software Library: arm_fft_bin_example_f32.c

  • Examples

arm_fft_bin_example_f32.c

/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date:        29. November 2010
* $Revision:    V1.0.3
*
* Project:      CMSIS DSP Library
* Title:        arm_fft_bin_example_f32.c
*
* Description:  Example code demonstrating calculation of Max energy bin of
*               frequency domain of input signal.
*
* Target Processor: Cortex-M4/Cortex-M3
*
*
* Version 1.0.3 2010/11/29
*    Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.1 2010/10/05 KK
*    Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20 KK
*    Production release and review comments incorporated.
* ------------------------------------------------------------------- */

#include "arm_math.h"

#define TEST_LENGTH_SAMPLES 2048

/* -------------------------------------------------------------------
* External Input and Output buffer Declarations for FFT Bin Example
* ------------------------------------------------------------------- */
extern float32_t testInput_f32_10khz[TEST_LENGTH_SAMPLES];
static float32_t testOutput[TEST_LENGTH_SAMPLES/2];

/* ------------------------------------------------------------------
* Global variables for FFT Bin Example
* ------------------------------------------------------------------- */
uint32_t fftSize = 1024;
uint32_t ifftFlag = 0;
uint32_t doBitReverse = 1;

/* Reference index at which max energy of bin ocuurs */
uint32_t refIndex = 213, testIndex = 0;

/* ----------------------------------------------------------------------
* Max magnitude FFT Bin test
* ------------------------------------------------------------------- */

int32_t main(void)
{

    arm_status status;
    arm_cfft_radix4_instance_f32 S;
    float32_t maxValue;

    status = ARM_MATH_SUCCESS;

    /* Initialize the CFFT/CIFFT module */
    status = arm_cfft_radix4_init_f32(&S, fftSize,
                                    ifftFlag, doBitReverse);

    /* Process the data through the CFFT/CIFFT module */
    arm_cfft_radix4_f32(&S, testInput_f32_10khz);

    /* Process the data through the Complex Magnitude Module for
    calculating the magnitude at each bin */
    arm_cmplx_mag_f32(testInput_f32_10khz, testOutput,
                    fftSize);

    /* Calculates maxValue and returns corresponding BIN value */
    arm_max_f32(testOutput, fftSize, &maxValue, &testIndex);

    if(testIndex !=  refIndex)
    {
        status = ARM_MATH_TEST_FAILURE;
    }

    /* ----------------------------------------------------------------------
    ** Loop here if the signals fail the PASS check.
    ** This denotes a test failure
    ** ------------------------------------------------------------------- */

    if( status != ARM_MATH_SUCCESS)
    {
        while(1);
    }
}
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CMSIS DSP Software Library: arm_fir_example_f32.c

  • Examples

arm_fir_example_f32.c

/* ----------------------------------------------------------------------
 * Copyright (C) 2010 ARM Limited. All rights reserved.
 *
 * $Date:           29. November 2010
 * $Revision:       V1.0.3
 *
 * Project:         CMSIS DSP Library
 * Title:           arm_fir_example_f32.c
 *
 * Description: Example code demonstrating how an FIR filter can be used
 *               as a low pass filter.
 *
 * Target Processor: Cortex-M4/Cortex-M3
 *
 *
 * Version 1.0.3 2010/11/29
 *    Re-organized the CMSIS folders and updated documentation.
 *
 * Version 1.0.1 2010/10/05 KK
 *    Production release and review comments incorporated.
 *
 * Version 1.0.0 2010/09/20 KK
 *    Production release and review comments incorporated.
 * ------------------------------------------------------------------- */

/* ----------------------------------------------------------------------
** Include Files
** ------------------------------------------------------------------- */

#include "arm_math.h"
#include "math_helper.h"

/* ----------------------------------------------------------------------
** Macro Defines
** ------------------------------------------------------------------- */

#define TEST_LENGTH_SAMPLES 320
#define SNR_THRESHOLD_F32   140.0f
#define BLOCK_SIZE          32
#define NUM_TAPS            29

/* -------------------------------------------------------------------
 * The input signal and reference output (computed with MATLAB)
 * are defined externally in arm_fir_lpf_data.c.
 * ------------------------------------------------------------------- */

extern float32_t testInput_f32_1kHz_15kHz[TEST_LENGTH_SAMPLES];
extern float32_t refOutput[TEST_LENGTH_SAMPLES];

/* -------------------------------------------------------------------
 * Declare Test output buffer
 * ------------------------------------------------------------------- */

static float32_t testOutput[TEST_LENGTH_SAMPLES];

/* -------------------------------------------------------------------
 * Declare State buffer of size (numTaps + blockSize - 1)
 * ------------------------------------------------------------------- */

static float32_t firStateF32[BLOCK_SIZE + NUM_TAPS - 1];

/* ----------------------------------------------------------------------
** FIR Coefficients buffer generated using fir1() MATLAB function.
** fir1(28, 6/24)
** ------------------------------------------------------------------- */

const float32_t firCoeffs32[NUM_TAPS] = {
-0.0018225230f, -0.0015879294f, +0.0000000000f, +0.0036977508f, +0.0080754303f, +0.0085302217f, -0.0000000000f, -0.0173976984f,
-0.0341458607f, -0.0333591565f, +0.0000000000f, +0.0676308395f, +0.1522061835f, +0.2229246956f, +0.2504960933f, +0.2229246956f,
+0.1522061835f, +0.0676308395f, +0.0000000000f, -0.0333591565f, -0.0341458607f, -0.0173976984f, -0.0000000000f, +0.0085302217f,
+0.0080754303f, +0.0036977508f, +0.0000000000f, -0.0015879294f, -0.0018225230f
};

/* ------------------------------------------------------------------
 * Global variables for FIR LPF Example
 * ------------------------------------------------------------------- */

uint32_t blockSize = BLOCK_SIZE;
uint32_t numBlocks = TEST_LENGTH_SAMPLES/BLOCK_SIZE;

float32_t  snr;

/* ----------------------------------------------------------------------
 * FIR LPF Example
 * ------------------------------------------------------------------- */

int32_t main(void)
{
  uint32_t i;
  arm_fir_instance_f32 S;
  arm_status status;
  float32_t  *inputF32, *outputF32;

  /* Initialize input and output buffer pointers */
  inputF32 = &testInput_f32_1kHz_15kHz[0];
  outputF32 = &testOutput[0];

  /* Call FIR init function to initialize the instance structure. */
  arm_fir_init_f32(&S, NUM_TAPS, (float32_t *)&firCoeffs32[0], &firStateF32[0], blockSize);

  /* ----------------------------------------------------------------------
  ** Call the FIR process function for every blockSize samples
  ** ------------------------------------------------------------------- */

  for(i=0; i < numBlocks; i++)
    {
      arm_fir_f32(&S, inputF32 + (i * blockSize), outputF32 + (i * blockSize), blockSize);
    }

  /* ----------------------------------------------------------------------
  ** Compare the generated output against the reference output computed
  ** in MATLAB.
  ** ------------------------------------------------------------------- */

  snr = arm_snr_f32(&refOutput[0], &testOutput[0], TEST_LENGTH_SAMPLES);

  if (snr < SNR_THRESHOLD_F32)
    {
      status = ARM_MATH_TEST_FAILURE;
    }
  else
    {
      status = ARM_MATH_SUCCESS;
    }

  /* ----------------------------------------------------------------------
  ** Loop here if the signal does not match the reference output.
  ** ------------------------------------------------------------------- */

  if( status != ARM_MATH_SUCCESS)
    {
      while(1);
    }
}
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:15 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_graphic_equalizer_example_q31.c

  • Examples

arm_graphic_equalizer_example_q31.c

/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date:         29. November 2010
* $Revision:      V1.0.3
*
* Project:    CMSIS DSP Library
* Title:          arm_graphic_equalizer_example_q31.c
*
* Description:  Example showing an audio graphic equalizer constructed
*              out of Biquad filters.
*
* Target Processor: Cortex-M4/Cortex-M3
*
*
* Version 1.0.3 2010/11/29
*    Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.1 2010/10/05 KK
*    Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20 KK
*    Production release and review comments incorporated.
* ------------------------------------------------------------------- */

#include "arm_math.h"
#include "math_helper.h"

/* Length of the overall data in the test */
#define TESTLENGTH 320

/* Block size for the underlying processing */
#define BLOCKSIZE 32

/* Total number of blocks to run */
#define NUMBLOCKS (TESTLENGTH/BLOCKSIZE)

/* Number of 2nd order Biquad stages per filter */
#define NUMSTAGES 2

#define SNR_THRESHOLD_F32  98

/* -------------------------------------------------------------------
 * External Declarations for Input and Output buffers
 * ------------------------------------------------------------------- */

extern float32_t testInput_f32[TESTLENGTH];
static float32_t testOutput[TESTLENGTH];

extern float32_t testRefOutput_f32[TESTLENGTH];

/* ----------------------------------------------------------------------
** Q31 state buffers for Band1, Band2, Band3, Band4, Band5
** ------------------------------------------------------------------- */

static q63_t biquadStateBand1Q31[4 * 2];
static q63_t biquadStateBand2Q31[4 * 2];
static q31_t biquadStateBand3Q31[4 * 2];
static q31_t biquadStateBand4Q31[4 * 2];
static q31_t biquadStateBand5Q31[4 * 2];

/* ----------------------------------------------------------------------
** Q31 input and output buffers
** ------------------------------------------------------------------- */

q31_t inputQ31[BLOCKSIZE];
q31_t outputQ31[BLOCKSIZE];

/* ----------------------------------------------------------------------
** Entire coefficient table.  There are 10 coefficients per 4th order Biquad
** cascade filter.  The first 10 coefficients correspond to the -9 dB gain
** setting of band 1; the next 10 coefficient correspond to the -8 dB gain
** setting of band 1; and so on.  There are 10*19=190 coefficients in total
** for band 1 (gains = -9, -8, -7, ..., 9).  After this come the 190 coefficients
** for band 2.
**
** The coefficients are in Q29 format and require a postShift of 2.
** ------------------------------------------------------------------- */

const q31_t coeffTable[950] = {

    /* Band 1, -9 dB gain */
    535576962, -1071153923, 535576962, 1073741824, -536870912, 535576962, -1063501998, 527979313, 1060865294, -524146981,
    /* Band 1, -8 dB gain */
    535723226, -1071446451, 535723226, 1073741824, -536870912, 535723226, -1063568947, 527903217, 1061230578, -524503778,
    535868593, -1071737186, 535868593, 1073741824, -536870912, 535868593, -1063627467, 527819780, 1061585502, -524850686,
    536013181, -1072026363, 536013181, 1073741824, -536870912, 536013181, -1063677598, 527728935, 1061930361, -525187972,
    536157109, -1072314217, 536157109, 1073741824, -536870912, 536157109, -1063719372, 527630607, 1062265438, -525515897,
    536300492, -1072600983, 536300492, 1073741824, -536870912, 536300492, -1063752815, 527524720, 1062591011, -525834716,
    536443447, -1072886894, 536443447, 1073741824, -536870912, 536443447, -1063777945, 527411186, 1062907350, -526144676,
    536586091, -1073172183, 536586091, 1073741824, -536870912, 536586091, -1063794775, 527289917, 1063214717, -526446017,
    536728541, -1073457082, 536728541, 1073741824, -536870912, 536728541, -1063803308, 527160815, 1063513366, -526738975,
    536870912, -1073741824, 536870912, 1073741824, -536870912, 536870912, -1063803543, 527023777, 1063803543, -527023777,
    537013321, -1074026642, 537013321, 1073741824, -536870912, 537013321, -1063795470, 526878696, 1064085490, -527300648,
    537155884, -1074311768, 537155884, 1073741824, -536870912, 537155884, -1063779073, 526725455, 1064359439, -527569803,
    537298718, -1074597435, 537298718, 1073741824, -536870912, 537298718, -1063754328, 526563934, 1064625617, -527831454,
    537441939, -1074883878, 537441939, 1073741824, -536870912, 537441939, -1063721205, 526394005, 1064884245, -528085806,
    537585666, -1075171331, 537585666, 1073741824, -536870912, 537585666, -1063679666, 526215534, 1065135536, -528333059,
    537730015, -1075460030, 537730015, 1073741824, -536870912, 537730015, -1063629666, 526028380, 1065379699, -528573409,
    537875106, -1075750212, 537875106, 1073741824, -536870912, 537875106, -1063571152, 525832396, 1065616936, -528807045,
    538021057, -1076042114, 538021057, 1073741824, -536870912, 538021057, -1063504065, 525627429, 1065847444, -529034151,
    538167989, -1076335977, 538167989, 1073741824, -536870912, 538167989, -1063428338, 525413317, 1066071412, -529254907,

    /* Band 2, -9 dB gain */
    531784976, -1055497692, 523873415, 1066213307, -529420241, 531784976, -1040357886, 509828014, 1028908252, -494627367,
    /* Band 2, -8 dB gain */
    532357636, -1056601982, 524400080, 1066115844, -529326645, 532357636, -1040623406, 509562600, 1030462237, -496062122,
    532927392, -1057707729, 524931110, 1066024274, -529239070, 532927392, -1040848253, 509262081, 1031969246, -497457090,
    533494678, -1058816094, 525467240, 1065939047, -529157961, 533494678, -1041032161, 508925950, 1033429976, -498812573,
    534059929, -1059928204, 526009170, 1065860582, -529083734, 534059929, -1041174868, 508553717, 1034845124, -500128887,
    534623580, -1061045148, 526557561, 1065789260, -529016764, 534623580, -1041276126, 508144920, 1036215393, -501406373,
    535186068, -1062167969, 527113032, 1065725420, -528957385, 535186068, -1041335703, 507699125, 1037541500, -502645399,
    535747827, -1063297666, 527676151, 1065669351, -528905879, 535747827, -1041353386, 507215934, 1038824183, -503846368,
    536309295, -1064435183, 528247436, 1065621289, -528862476, 536309295, -1041328990, 506694984, 1040064203, -505009724,
    536870912, -1065581413, 528827349, 1065581413, -528827349, 536870912, -1041262354, 506135953, 1041262354, -506135953,
    537433117, -1066737194, 529416295, 1065549847, -528800610, 537433117, -1041153346, 505538564, 1042419457, -507225588,
    537996352, -1067903307, 530014622, 1065526651, -528782316, 537996352, -1041001864, 504902578, 1043536370, -508279208,
    538561061, -1069080480, 530622620, 1065511830, -528772462, 538561061, -1040807833, 504227800, 1044613981, -509297437,
    539127690, -1070269387, 531240527, 1065505333, -528770987, 539127690, -1040571205, 503514074, 1045653211, -510280946,
    539696690, -1071470656, 531868525, 1065507054, -528777778, 539696690, -1040291951, 502761277, 1046655011, -511230450,
    540268512, -1072684867, 532506750, 1065516837, -528792672, 540268512, -1039970063, 501969320, 1047620358, -512146700,
    540843613, -1073912567, 533155297, 1065534483, -528815459, 540843613, -1039605542, 501138139, 1048550251, -513030484,
    541422451, -1075154268, 533814224, 1065559750, -528845892, 541422451, -1039198394, 500267687, 1049445708, -513882621,
    542005489, -1076410460, 534483561, 1065592362, -528883686, 542005489, -1038748624, 499357932, 1050307760, -514703956,
    518903861, -1001986830, 486725277, 1037235801, -502367695, 518903861, -945834422, 446371043, 902366163, -400700571,
    520899989, -1005630916, 488289126, 1036926846, -502147311, 520899989, -946490935, 445581846, 907921945, -404936158,
    522893209, -1009290002, 489869792, 1036650484, -501961419, 522893209, -947006359, 444685310, 913306106, -409075225,
    524884763, -1012968199, 491470256, 1036407567, -501810737, 524884763, -947377809, 443679533, 918521018, -413116221,
    526875910, -1016669649, 493093518, 1036198712, -501695739, 526875910, -947602324, 442562672, 923569247, -417057897,
    528867927, -1020398503, 494742575, 1036024293, -501616651, 528867927, -947676875, 441332970, 928453558, -420899319,
    530862111, -1024158905, 496420407, 1035884447, -501573457, 530862111, -947598385, 439988777, 933176909, -424639872,
    532859778, -1027954970, 498129955, 1035779077, -501565907, 532859778, -947363742, 438528571, 937742446, -428279254,
    534862260, -1031790763, 499874098, 1035707863, -501593525, 534862260, -946969823, 436950987, 942153486, -431817474,
    536870912, -1035670279, 501655630, 1035670279, -501655630, 536870912, -946413508, 435254839, 946413508, -435254839,
    538887107, -1039597419, 503477238, 1035665609, -501751354, 538887107, -945691703, 433439146, 950526127, -438591937,
    540912240, -1043575967, 505341475, 1035692963, -501879659, 540912240, -944801359, 431503152, 954495080, -441829621,
    542947726, -1047609569, 507250741, 1035751307, -502039364, 542947726, -943739490, 429446349, 958324201, -444968987,
    544995000, -1051701717, 509207261, 1035839473, -502229165, 544995000, -942503190, 427268492, 962017400, -448011351,
    547055523, -1055855728, 511213065, 1035956193, -502447657, 547055523, -941089647, 424969617, 965578640, -450958226,
    549130774, -1060074734, 513269973, 1036100110, -502693359, 549130774, -939496155, 422550049, 969011913, -453811298,
    551222259, -1064361672, 515379585, 1036269804, -502964731, 551222259, -937720119, 420010407, 972321228, -456572401,
    553331507, -1068719280, 517543273, 1036463810, -503260192, 553331507, -935759057, 417351601, 975510582, -459243495,
    555460072, -1073150100, 519762181, 1036680633, -503578144, 555460072, -933610600, 414574832, 978583948, -461826644,
    494084017, -851422604, 404056273, 930151631, -423619864, 494084017, -673714108, 339502486, 561843007, -265801750,
    498713542, -859177141, 406587077, 929211656, -423786402, 498713542, -673274906, 338185129, 573719128, -272222942,
    503369016, -867012190, 409148384, 928362985, -424054784, 503369016, -672533059, 336693984, 585290277, -278599028,
    508052536, -874935599, 411746438, 927604291, -424422151, 508052536, -671478538, 335026905, 596558312, -284920289,
    512766286, -882955583, 414387826, 926933782, -424885216, 512766286, -670100998, 333182045, 607525792, -291177811,
    517512534, -891080712, 417079474, 926349262, -425440318, 517512534, -668389789, 331157902, 618195914, -297363485,
    522293635, -899319903, 419828635, 925848177, -426083491, 522293635, -666333963, 328953368, 628572440, -303470012,
    527112032, -907682405, 422642886, 925427679, -426810526, 527112032, -663922286, 326567785, 638659631, -309490882,
    531970251, -916177781, 425530105, 925084675, -427617023, 531970251, -661143261, 324000998, 648462180, -315420352,
    536870912, -924815881, 428498454, 924815881, -428498454, 536870912, -657985147, 321253420, 657985147, -321253420,
    541816719, -933606817, 431556352, 924617870, -429450209, 541816719, -654435997, 318326093, 667233900, -326985786,
    546810467, -942560921, 434712438, 924487114, -430467639, 546810467, -650483688, 315220754, 676214053, -332613816,
    551855042, -951688708, 437975532, 924420027, -431546101, 551855042, -646115970, 311939896, 684931422, -338134495,
    556953421, -961000826, 441354588, 924413001, -432680993, 556953421, -641320513, 308486839, 693391970, -343545389,
    562108672, -970508005, 444858642, 924462435, -433867780, 562108672, -636084967, 304865786, 701601770, -348844597,
    567323959, -980220994, 448496743, 924564764, -435102022, 567323959, -630397020, 301081886, 709566963, -354030710,
    572602539, -990150500, 452277894, 924716482, -436379394, 572602539, -624244471, 297141281, 717293726, -359102767,
    577947763, -1000307125, 456210977, 924914158, -437695705, 577947763, -617615296, 293051155, 724788245, -364060214,
    583363084, -1010701292, 460304674, 925154455, -439046908, 583363084, -610497723, 288819761, 732056685, -368902865,
    387379495, -506912469, 196933274, 840112184, -347208270, 387379495, 506912469, 196933274, -840112184, -347208270,
    401658082, -532275898, 207149427, 833765363, -343175316, 401658082, 532275898, 207149427, -833765363, -343175316,
    416472483, -558722695, 217902617, 827270154, -339107319, 416472483, 558722695, 217902617, -827270154, -339107319,
    431841949, -586290861, 229212798, 820624988, -335007540, 431841949, 586290861, 229212798, -820624988, -335007540,
    447786335, -615019650, 241100489, 813828443, -330879528, 447786335, 615019650, 241100489, -813828443, -330879528,
    464326111, -644949597, 253586805, 806879270, -326727141, 464326111, 644949597, 253586805, -806879270, -326727141,
    481482377, -676122557, 266693475, 799776409, -322554559, 481482377, 676122557, 266693475, -799776409, -322554559,
    499276882, -708581728, 280442865, 792519013, -318366296, 499276882, 708581728, 280442865, -792519013, -318366296,
    517732032, -742371685, 294857996, 785106465, -314167221, 517732032, 742371685, 294857996, -785106465, -314167221,
    536870912, -777538408, 309962566, 777538408, -309962566, 536870912, 777538408, 309962566, -777538408, -309962566,
    556717294, -814129313, 325780968, 769814766, -305757943, 556717294, 814129313, 325780968, -769814766, -305757943,
    577295658, -852193284, 342338310, 761935777, -301559360, 577295658, 852193284, 342338310, -761935777, -301559360,
    598631206, -891780698, 359660433, 753902014, -297373230, 598631206, 891780698, 359660433, -753902014, -297373230,
    620749877, -932943463, 377773927, 745714425, -293206383, 620749877, 932943463, 377773927, -745714425, -293206383,
    643678365, -975735041, 396706151, 737374355, -289066077, 643678365, 975735041, 396706151, -737374355, -289066077,
    667444134, -1020210487, 416485252, 728883588, -284960004, 667444134, 1020210487, 416485252, -728883588, -284960004,
    692075438, -1066426476, 437140179, 720244375, -280896294, 692075438, 1066426476, 437140179, -720244375, -280896294,
    717601336, -1114441339, 458700704, 711459472, -276883515, 717601336, 1114441339, 458700704, -711459472, -276883515,
    744051710, -1164315096, 481197437, 702532174, -272930673, 744051710, 1164315096, 481197437, -702532174, -272930673

};

/* ----------------------------------------------------------------------
** Desired gains, in dB, per band
** ------------------------------------------------------------------- */

int gainDB[5] = {0, -3, 6, 4, -6};

float32_t snr;

/* ----------------------------------------------------------------------
 * Graphic equalizer Example
 * ------------------------------------------------------------------- */

int32_t main(void)
{
  float32_t  *inputF32, *outputF32;
  arm_biquad_cas_df1_32x64_ins_q31 S1;
  arm_biquad_cas_df1_32x64_ins_q31 S2;
  arm_biquad_casd_df1_inst_q31 S3;
  arm_biquad_casd_df1_inst_q31 S4;
  arm_biquad_casd_df1_inst_q31 S5;
  int i;
  int32_t status;

  inputF32 = &testInput_f32[0];
  outputF32 = &testOutput[0];

  /* Initialize the state and coefficient buffers for all Biquad sections */

  arm_biquad_cas_df1_32x64_init_q31(&S1, NUMSTAGES,
                    (q31_t *) &coeffTable[190*0 + 10*(gainDB[0] + 9)],
                    &biquadStateBand1Q31[0], 2);

  arm_biquad_cas_df1_32x64_init_q31(&S2, NUMSTAGES,
                    (q31_t *) &coeffTable[190*1 + 10*(gainDB[1] + 9)],
                    &biquadStateBand2Q31[0], 2);

  arm_biquad_cascade_df1_init_q31(&S3, NUMSTAGES,
                  (q31_t *) &coeffTable[190*2 + 10*(gainDB[2] + 9)],
                  &biquadStateBand3Q31[0], 2);

  arm_biquad_cascade_df1_init_q31(&S4, NUMSTAGES,
                  (q31_t *) &coeffTable[190*3 + 10*(gainDB[3] + 9)],
                  &biquadStateBand4Q31[0], 2);

  arm_biquad_cascade_df1_init_q31(&S5, NUMSTAGES,
                  (q31_t *) &coeffTable[190*4 + 10*(gainDB[4] + 9)],
                  &biquadStateBand5Q31[0], 2);

  /* Call the process functions and needs to change filter coefficients
     for varying the gain of each band */

  for(i=0; i < NUMBLOCKS; i++)
    {

      /* ----------------------------------------------------------------------
      ** Convert block of input data from float to Q31
      ** ------------------------------------------------------------------- */

      arm_float_to_q31(inputF32 + (i*BLOCKSIZE), inputQ31, BLOCKSIZE);

      /* ----------------------------------------------------------------------
      ** Scale down by 1/8.  This provides additional headroom so that the
      ** graphic EQ can apply gain.
      ** ------------------------------------------------------------------- */

      arm_scale_q31(inputQ31, 0x7FFFFFFF, -3, inputQ31, BLOCKSIZE);

      /* ----------------------------------------------------------------------
      ** Call the Q31 Biquad Cascade DF1 32x64 process function for band1, band2
      ** ------------------------------------------------------------------- */

      arm_biquad_cas_df1_32x64_q31(&S1, inputQ31, outputQ31, BLOCKSIZE);
      arm_biquad_cas_df1_32x64_q31(&S2, outputQ31, outputQ31, BLOCKSIZE);

      /* ----------------------------------------------------------------------
      ** Call the Q31 Biquad Cascade DF1 process function for band3, band4, band5
      ** ------------------------------------------------------------------- */

      arm_biquad_cascade_df1_q31(&S3, outputQ31, outputQ31, BLOCKSIZE);
      arm_biquad_cascade_df1_q31(&S4, outputQ31, outputQ31, BLOCKSIZE);
      arm_biquad_cascade_df1_q31(&S5, outputQ31, outputQ31, BLOCKSIZE);

      /* ----------------------------------------------------------------------
      ** Convert Q31 result back to float
      ** ------------------------------------------------------------------- */

      arm_q31_to_float(outputQ31, outputF32 + (i * BLOCKSIZE), BLOCKSIZE);

      /* ----------------------------------------------------------------------
      ** Scale back up
      ** ------------------------------------------------------------------- */

      arm_scale_f32(outputF32 + (i * BLOCKSIZE), 8.0f, outputF32 + (i * BLOCKSIZE), BLOCKSIZE);
    };

    snr = arm_snr_f32(testRefOutput_f32, testOutput, TESTLENGTH);

    if (snr < SNR_THRESHOLD_F32)
    {
        status = ARM_MATH_TEST_FAILURE;
    }
    else
    {
        status = ARM_MATH_SUCCESS;
    }

  /* ----------------------------------------------------------------------
  ** Loop here if the signal does not match the reference output.
  ** ------------------------------------------------------------------- */

  if( status != ARM_MATH_SUCCESS)
    {
      while(1);
    }

}
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:15 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_linear_interp_example_f32.c

  • Examples

arm_linear_interp_example_f32.c

/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date:        29. November 2010
* $Revision:    V1.0.3
*
* Project:      CMSIS DSP Library
* Title:        arm_linear_interp_example_f32.c
*
* Description:  Example code demonstrating usage of sin function
*               and uses linear interpolation to get higher precision
*
* Target Processor: Cortex-M4/Cortex-M3
*
*
* Version 1.0.3 2010/11/29
*    Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.1 2010/10/05 KK
*    Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20 KK
*    Production release and review comments incorporated.
* ------------------------------------------------------------------- */

#include "arm_math.h"
#include "math_helper.h"

#define SNR_THRESHOLD           90
#define TEST_LENGTH_SAMPLES     10
#define XSPACING                (0.00005f)

/* ----------------------------------------------------------------------
* Test input data for F32 SIN function
* Generated by the MATLAB rand() function
* randn('state', 0)
* xi = (((1/4.18318581819710)* randn(blockSize, 1) * 2* pi));
* --------------------------------------------------------------------*/
float32_t testInputSin_f32[TEST_LENGTH_SAMPLES] =
{
    -0.649716504673081170,  -2.501723745497831200,  0.188250329003310100,   0.432092748487532540,   -1.722010988459680800,  1.788766476323060600,   1.786136060975809500,   -0.056525543169408797,
    0.491596272728153760,   0.262309671126153390
};

/*------------------------------------------------------------------------------
*  Reference out of SIN F32 function for Block Size = 10
*  Calculated from sin(testInputSin_f32)
*------------------------------------------------------------------------------*/
float32_t testRefSinOutput32_f32[TEST_LENGTH_SAMPLES] =
{
    -0.604960695383043530,  -0.597090287967934840,  0.187140422442966500,   0.418772124875992690,   -0.988588831792106880,  0.976338412038794010,   0.976903856413481100,   -0.056495446835214236,
    0.472033731854734240,   0.259311907228582830
};

/*------------------------------------------------------------------------------
*  Method 1: Test out Buffer Calculated from Cubic Interpolation
*------------------------------------------------------------------------------*/
float32_t testOutput[TEST_LENGTH_SAMPLES];

/*------------------------------------------------------------------------------
*  Method 2: Test out buffer Calculated from Linear Interpolation
*------------------------------------------------------------------------------*/
float32_t testLinIntOutput[TEST_LENGTH_SAMPLES];

/*------------------------------------------------------------------------------
*  External table used for linear interpolation
*------------------------------------------------------------------------------*/
extern float32_t arm_linear_interep_table[188495];

/* ----------------------------------------------------------------------
* Global Variables for caluclating SNR's for Method1 & Method 2
* ------------------------------------------------------------------- */
float32_t snr1;
float32_t snr2;

/* ----------------------------------------------------------------------------
* Calculation of Sine values from Cubic Interpolation and Linear interpolation
* ---------------------------------------------------------------------------- */
int32_t main(void)
{
    uint32_t i;
    arm_status status;

    arm_linear_interp_instance_f32 S = {188495, -3.141592653589793238, XSPACING, &arm_linear_interep_table[0]};

    /*------------------------------------------------------------------------------
    *  Method 1: Test out Calculated from Cubic Interpolation
    *------------------------------------------------------------------------------*/
    for(i=0; i< TEST_LENGTH_SAMPLES; i++)
    {
        testOutput[i] = arm_sin_f32(testInputSin_f32[i]);
    }

    /*------------------------------------------------------------------------------
    *  Method 2: Test out Calculated from Cubic Interpolation and Linear interpolation
    *------------------------------------------------------------------------------*/

    for(i=0; i< TEST_LENGTH_SAMPLES; i++)
    {
        testLinIntOutput[i] = arm_linear_interp_f32(&S, testInputSin_f32[i]);
    }

    /*------------------------------------------------------------------------------
    *                   SNR calculation for method 1
    *------------------------------------------------------------------------------*/
    snr1 = arm_snr_f32(testRefSinOutput32_f32, testOutput, 2);

    /*------------------------------------------------------------------------------
    *                   SNR calculation for method 2
    *------------------------------------------------------------------------------*/
    snr2 = arm_snr_f32(testRefSinOutput32_f32, testLinIntOutput, 2);

    /*------------------------------------------------------------------------------
    *                   Initialise status depending on SNR calculations
    *------------------------------------------------------------------------------*/
    if( snr2 > snr1)
    {
        status = ARM_MATH_SUCCESS;
    }
    else
    {
        status = ARM_MATH_TEST_FAILURE;
    }

    /* ----------------------------------------------------------------------
    ** Loop here if the signals fail the PASS check.
    ** This denotes a test failure
    ** ------------------------------------------------------------------- */
    if( status != ARM_MATH_SUCCESS)
    {
        while(1);
    }
}
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CMSIS DSP Software Library: arm_matrix_example_f32.c

  • Examples

arm_matrix_example_f32.c

/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date:        29. November 2010
* $Revision:    V1.0.3
*
* Project:      CMSIS DSP Library
* Title:        arm_matrix_example_f32.c
*
* Description:  Example code demonstrating least square fit to data
*               using matrix functions
*
* Target Processor: Cortex-M4/Cortex-M3
*
*
* Version 1.0.3 2010/11/29
*    Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.1 2010/10/05 KK
*    Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20 KK
*    Production release and review comments incorporated.
* ------------------------------------------------------------------- */

#include "arm_math.h"
#include "math_helper.h"

#define SNR_THRESHOLD   90

/* --------------------------------------------------------------------------------
* Test input data(Cycles) taken from FIR Q15 module for differant cases of blockSize
* and tapSize
* --------------------------------------------------------------------------------- */

const float32_t B_f32[4] =
{
    782.0, 7577.0, 470.0, 4505.0
};

/* --------------------------------------------------------------------------------
* Formula to fit is  C1 + C2 * numTaps + C3 * blockSize + C4 * numTaps * blockSize
* -------------------------------------------------------------------------------- */

const float32_t A_f32[16] =
{
    /* Const,   numTaps,    blockSize,  numTaps*blockSize */
    1.0,        32.0,       4.0,        128.0,
    1.0,        32.0,       64.0,       2048.0,
    1.0,        16.0,       4.0,        64.0,
    1.0,        16.0,       64.0,       1024.0,
};

/* ----------------------------------------------------------------------
* Temporary buffers  for storing intermediate values
* ------------------------------------------------------------------- */
/* Transpose of A Buffer */
float32_t AT_f32[16];
/* (Transpose of A * A) Buffer */
float32_t ATMA_f32[16];
/* Inverse(Transpose of A * A)  Buffer */
float32_t ATMAI_f32[16];
/* Test Output Buffer */
float32_t X_f32[4];

/* ----------------------------------------------------------------------
* Reference ouput buffer C1, C2, C3 and C4 taken from MATLAB
* ------------------------------------------------------------------- */
const float32_t xRef_f32[4] = {73.0, 8.0, 21.25, 2.875};

float32_t snr;

/* ----------------------------------------------------------------------
* Max magnitude FFT Bin test
* ------------------------------------------------------------------- */

int32_t main(void)
{

    arm_matrix_instance_f32 A;      /* Matrix A Instance */
    arm_matrix_instance_f32 AT;     /* Matrix AT(A transpose) instance */
    arm_matrix_instance_f32 ATMA;   /* Matrix ATMA( AT multiply with A) instance */
    arm_matrix_instance_f32 ATMAI;  /* Matrix ATMAI(Inverse of ATMA) instance */
    arm_matrix_instance_f32 B;      /* Matrix B instance */
    arm_matrix_instance_f32 X;      /* Matrix X(Unknown Matrix) instance */

    uint32_t srcRows, srcColumns;   /* Temporary variables */
    arm_status status;

    /* Initialise A Matrix Instance with numRows, numCols and data array(A_f32) */
    srcRows = 4;
    srcColumns = 4;
    arm_mat_init_f32(&A, srcRows, srcColumns, (float32_t *)A_f32);

    /* Initialise Matrix Instance AT with numRows, numCols and data array(AT_f32) */
    srcRows = 4;
    srcColumns = 4;
    arm_mat_init_f32(&AT, srcRows, srcColumns, AT_f32);

    /* calculation of A transpose */
    status = arm_mat_trans_f32(&A, &AT);

    /* Initialise ATMA Matrix Instance with numRows, numCols and data array(ATMA_f32) */
    srcRows = 4;
    srcColumns = 4;
    arm_mat_init_f32(&ATMA, srcRows, srcColumns, ATMA_f32);

    /* calculation of AT Multiply with A */
    status = arm_mat_mult_f32(&AT, &A, &ATMA);

    /* Initialise ATMAI Matrix Instance with numRows, numCols and data array(ATMAI_f32) */
    srcRows = 4;
    srcColumns = 4;
    arm_mat_init_f32(&ATMAI, srcRows, srcColumns, ATMAI_f32);

    /* calculation of Inverse((Transpose(A) * A) */
    status = arm_mat_inverse_f32(&ATMA, &ATMAI);

    /* calculation of (Inverse((Transpose(A) * A)) *  Transpose(A)) */
    status = arm_mat_mult_f32(&ATMAI, &AT, &ATMA);

    /* Initialise B Matrix Instance with numRows, numCols and data array(B_f32) */
    srcRows = 4;
    srcColumns = 1;
    arm_mat_init_f32(&B, srcRows, srcColumns, (float32_t *)B_f32);

    /* Initialise X Matrix Instance with numRows, numCols and data array(X_f32) */
    srcRows = 4;
    srcColumns = 1;
    arm_mat_init_f32(&X, srcRows, srcColumns, X_f32);

    /* calculation ((Inverse((Transpose(A) * A)) *  Transpose(A)) * B) */
    status = arm_mat_mult_f32(&ATMA, &B, &X);

    /* Comparison of reference with test output */
    snr = arm_snr_f32((float32_t *)xRef_f32, X_f32, 4);

    /*------------------------------------------------------------------------------
    *                   Initialise status depending on SNR calculations
    *------------------------------------------------------------------------------*/
    if( snr > SNR_THRESHOLD)
    {
        status = ARM_MATH_SUCCESS;
    }
    else
    {
        status = ARM_MATH_TEST_FAILURE;
    }

    /* ----------------------------------------------------------------------
    ** Loop here if the signals fail the PASS check.
    ** This denotes a test failure
    ** ------------------------------------------------------------------- */
    if( status != ARM_MATH_SUCCESS)
    {
      while(1);
    }
}
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CMSIS DSP Software Library: arm_signal_converge_example_f32.c

  • Examples

arm_signal_converge_example_f32.c

/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date:        29. November 2010
* $Revision:    V1.0.3
*
* Project:      CMSIS DSP Library
* Title:        arm_signal_converge_example_f32.c
*
* Description:  Example code demonstrating convergence of an adaptive
*               filter.
*
* Target Processor: Cortex-M4/Cortex-M3
*
*
* Version 1.0.3 2010/11/29
*    Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.1 2010/10/05 KK
*    Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20 KK
*    Production release and review comments incorporated.
* ------------------------------------------------------------------- */

#include "arm_math.h"
#include "math_helper.h"

/* ----------------------------------------------------------------------
** Global defines for the simulation
* ------------------------------------------------------------------- */

#define TEST_LENGTH_SAMPLES 1536
#define NUMTAPS             32
#define BLOCKSIZE           32
#define DELTA_ERROR         0.000001f
#define DELTA_COEFF         0.0001f
#define MU                  0.5f

#define NUMFRAMES (TEST_LENGTH_SAMPLES / BLOCKSIZE)

/* ----------------------------------------------------------------------
* Declare FIR state buffers and structure
* ------------------------------------------------------------------- */

float32_t firStateF32[NUMTAPS + BLOCKSIZE];
arm_fir_instance_f32 LPF_instance;

/* ----------------------------------------------------------------------
* Declare LMSNorm state buffers and structure
* ------------------------------------------------------------------- */

float32_t lmsStateF32[NUMTAPS + BLOCKSIZE];
float32_t errOutput[TEST_LENGTH_SAMPLES];
arm_lms_norm_instance_f32 lmsNorm_instance;

/* ----------------------------------------------------------------------
* Function Declarations for Signal Convergence Example
* ------------------------------------------------------------------- */

arm_status test_signal_converge_example( void );

/* ----------------------------------------------------------------------
* Internal functions
* ------------------------------------------------------------------- */
arm_status test_signal_converge(float32_t* err_signal,
                                 uint32_t blockSize);

void getinput(float32_t* input,
         uint32_t fr_cnt,
         uint32_t blockSize);

/* ----------------------------------------------------------------------
* External Declarations for FIR F32 module Test
* ------------------------------------------------------------------- */
extern float32_t testInput_f32[TEST_LENGTH_SAMPLES];
extern float32_t lmsNormCoeff_f32[32];
extern const float32_t FIRCoeff_f32[32];
extern arm_lms_norm_instance_f32 lmsNorm_instance;

/* ----------------------------------------------------------------------
* Declare I/O buffers
* ------------------------------------------------------------------- */

float32_t wire1[BLOCKSIZE];
float32_t wire2[BLOCKSIZE];
float32_t wire3[BLOCKSIZE];
float32_t err_signal[BLOCKSIZE];

/* ----------------------------------------------------------------------
* Signal converge test
* ------------------------------------------------------------------- */

int32_t main(void)
{
  uint32_t i;
  arm_status status;
  uint32_t index;
  float32_t minValue;

  /* Initialize the LMSNorm data structure */
  arm_lms_norm_init_f32(&lmsNorm_instance, NUMTAPS, lmsNormCoeff_f32, lmsStateF32, MU, BLOCKSIZE);

  /* Initialize the FIR data structure */
  arm_fir_init_f32(&LPF_instance, NUMTAPS, (float32_t *)FIRCoeff_f32, firStateF32, BLOCKSIZE);

  /* ----------------------------------------------------------------------
  * Loop over the frames of data and execute each of the processing
  * functions in the system.
  * ------------------------------------------------------------------- */

  for(i=0; i < NUMFRAMES; i++)
    {
      /* Read the input data - uniformly distributed random noise - into wire1 */
      arm_copy_f32(testInput_f32 + (i * BLOCKSIZE), wire1, BLOCKSIZE);

      /* Execute the FIR processing function.  Input wire1 and output wire2 */
      arm_fir_f32(&LPF_instance, wire1, wire2, BLOCKSIZE);

      /* Execute the LMS Norm processing function*/

      arm_lms_norm_f32(&lmsNorm_instance, /* LMSNorm instance */
               wire1,                     /* Input signal */
               wire2,                     /* Reference Signal */
               wire3,                     /* Converged Signal */
               err_signal,                /* Error Signal, this will become small as the signal converges */
               BLOCKSIZE);                /* BlockSize */

      /* apply overall gain */
      arm_scale_f32(wire3, 5, wire3, BLOCKSIZE);     /* in-place buffer */
    }

  status = ARM_MATH_SUCCESS;

  /* -------------------------------------------------------------------------------
  * Test whether the error signal has reached towards 0.
  * ----------------------------------------------------------------------------- */

  arm_abs_f32(err_signal, err_signal, BLOCKSIZE);
  arm_min_f32(err_signal, BLOCKSIZE, &minValue, &index);

  if (minValue > DELTA_ERROR)
  {
      status = ARM_MATH_TEST_FAILURE;
  }

  /* ----------------------------------------------------------------------
  * Test whether the filter coefficients have converged.
  * ------------------------------------------------------------------- */

  arm_sub_f32((float32_t *)FIRCoeff_f32, lmsNormCoeff_f32, lmsNormCoeff_f32, NUMTAPS);

  arm_abs_f32(lmsNormCoeff_f32, lmsNormCoeff_f32, NUMTAPS);
  arm_min_f32(lmsNormCoeff_f32, NUMTAPS, &minValue, &index);

  if (minValue > DELTA_COEFF)
  {
      status = ARM_MATH_TEST_FAILURE;
  }

  /* ----------------------------------------------------------------------
  * Loop here if the signals did not pass the convergence check.
  * This denotes a test failure
  * ------------------------------------------------------------------- */

  if( status != ARM_MATH_SUCCESS)
  {
      while(1);
  }
}
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CMSIS DSP Software Library: arm_sin_cos_example_f32.c

  • Examples

arm_sin_cos_example_f32.c

/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date:        29. November 2010
* $Revision:    V1.0.3
*
* Project:      CMSIS DSP Library
* Title:        arm_sin_cos_example_f32.c
*
* Description:  Example code demonstrating sin and cos calculation of input signal.
*
* Target Processor: Cortex-M4/Cortex-M3
*
*
* Version 1.0.3 2010/11/29
*    Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.1 2010/10/05 KK
*    Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20 KK
*    Production release and review comments incorporated.
* ------------------------------------------------------------------- */

#include <math.h>
#include "arm_math.h"

/* ----------------------------------------------------------------------
* Defines each of the tests performed
* ------------------------------------------------------------------- */
#define MAX_BLOCKSIZE   32
#define DELTA           (0.000001f)

/* ----------------------------------------------------------------------
* Test input data for Floating point sin_cos example for 32-blockSize
* Generated by the MATLAB randn() function
* ------------------------------------------------------------------- */

const float32_t testInput_f32[MAX_BLOCKSIZE] =
{
    -1.244916875853235400,  -4.793533929171324800,  0.360705030233248850,   0.827929644170887320,   -3.299532218312426900,  3.427441903227623800,   3.422401784294607700,   -0.108308165334010680,
    0.941943896490312180,   0.502609575000365850,   -0.537345278736373500,  2.088817392965764500,   -1.693168684143455700,  6.283185307179590700,   -0.392545884746175080,  0.327893095115825040,
    3.070147440456292300,   0.170611405884662230,   -0.275275082396073010,  -2.395492805446796300,  0.847311163536506600,   -3.845517018083148800,  2.055818378415868300,   4.672594161978930800,
    -1.990923030266425800,  2.469305197656249500,   3.609002606064021000,   -4.586736582331667500,  -4.147080139136136300,  1.643756718868359500,   -1.150866392366494800,  1.985805026477433800

};

const float32_t testRefOutput_f32 = 1.000000000;

/* ----------------------------------------------------------------------
* Declare Global variables
* ------------------------------------------------------------------- */
uint32_t blockSize = 32;
float32_t  testOutput;
float32_t  cosOutput;
float32_t  sinOutput;
float32_t  cosSquareOutput;
float32_t  sinSquareOutput;

/* ----------------------------------------------------------------------
* Max magnitude FFT Bin test
* ------------------------------------------------------------------- */

arm_status status;

int32_t main(void)
{
    float32_t diff;
    uint32_t i;

    for(i=0; i< blockSize; i++)
    {
        cosOutput = arm_cos_f32(testInput_f32[i]);
        sinOutput = arm_sin_f32(testInput_f32[i]);

        arm_mult_f32(&cosOutput, &cosOutput, &cosSquareOutput, 1);
        arm_mult_f32(&sinOutput, &sinOutput, &sinSquareOutput, 1);

        arm_add_f32(&cosSquareOutput, &sinSquareOutput, &testOutput, 1);

        /* absolute value of difference between ref and test */
        diff = fabsf(testRefOutput_f32 - testOutput);

        /* Comparison of sin_cos value with reference */
        if(diff > DELTA)
        {
           status = ARM_MATH_TEST_FAILURE;
        }

        if( status == ARM_MATH_TEST_FAILURE)
        {
           while(1);
        }

    }
}
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CMSIS DSP Software Library: arm_variance_example_f32.c

  • Examples

arm_variance_example_f32.c

/* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved.
*
* $Date:        29. November 2010
* $Revision:    V1.0.3
*
* Project:      CMSIS DSP Library
* Title:        arm_variance_example_f32.c
*
* Description:  Example code demonstrating variance calculation of input sequence.
*
* Target Processor: Cortex-M4/Cortex-M3
*
*
* Version 1.0.3 2010/11/29
*    Re-organized the CMSIS folders and updated documentation.
*
* Version 1.0.1 2010/10/05 KK
*    Production release and review comments incorporated.
*
* Version 1.0.0 2010/09/20 KK
*    Production release and review comments incorporated.
* ------------------------------------------------------------------- */

#include <math.h>
#include "arm_math.h"

/* ----------------------------------------------------------------------
* Defines each of the tests performed
* ------------------------------------------------------------------- */
#define MAX_BLOCKSIZE   32
#define DELTA           (0.000001f)

/* ----------------------------------------------------------------------
* Declare I/O buffers
* ------------------------------------------------------------------- */
float32_t wire1[MAX_BLOCKSIZE];
float32_t wire2[MAX_BLOCKSIZE];
float32_t wire3[MAX_BLOCKSIZE];

/* ----------------------------------------------------------------------
* Test input data for Floating point Variance example for 32-blockSize
* Generated by the MATLAB randn() function
* ------------------------------------------------------------------- */

float32_t testInput_f32[32] =
{
-0.432564811528221,     -1.665584378238097,     0.125332306474831,      0.287676420358549,
-1.146471350681464,     1.190915465642999,      1.189164201652103,      -0.037633276593318,
0.327292361408654,      0.174639142820925,      -0.186708577681439,     0.725790548293303,
-0.588316543014189,     2.183185818197101,      -0.136395883086596,     0.113931313520810,
1.066768211359189,      0.059281460523605,      -0.095648405483669,     -0.832349463650022,
0.294410816392640,      -1.336181857937804,     0.714324551818952,      1.623562064446271,
-0.691775701702287,     0.857996672828263,      1.254001421602532,      -1.593729576447477,
-1.440964431901020,     0.571147623658178,      -0.399885577715363,     0.689997375464345

};

/* ----------------------------------------------------------------------
* Declare Global variables
* ------------------------------------------------------------------- */
uint32_t blockSize = 32;
float32_t  refVarianceOut = 0.903941793931839;

/* ----------------------------------------------------------------------
* Variance calculation test
* ------------------------------------------------------------------- */

int32_t main(void)
{
    arm_status status;
    float32_t mean, oneByBlockSize;
    float32_t variance;
    float32_t diff;

    status = ARM_MATH_SUCCESS;

    /* Calculation of mean value of input */

    /* x' = 1/blockSize * (x(0)* 1 + x(1) * 1 + ... + x(n-1) * 1) */

    /* Fill wire1 buffer with 1.0 value */
    arm_fill_f32(1.0,  wire1, blockSize);

    /* Calculate the dot product of wire1 and wire2 */
    /* (x(0)* 1 + x(1) * 1 + ...+ x(n-1) * 1) */
    arm_dot_prod_f32(testInput_f32, wire1, blockSize, &mean);

    /* Calculation of 1/blockSize */
    oneByBlockSize = 1.0 / (blockSize);

    /* 1/blockSize * (x(0)* 1 + x(1) * 1 + ... + x(n-1) * 1)  */
    arm_mult_f32(&mean, &oneByBlockSize, &mean, 1);

    /* Calculation of variance value of input */

    /* (1/blockSize) * (x(0) - x') * (x(0) - x') + (x(1) - x') * (x(1) - x') + ... + (x(n-1) - x') * (x(n-1) - x') */

    /* Fill wire2 with mean value x' */
    arm_fill_f32(mean,  wire2, blockSize);

    /* wire3 contains (x-x') */
    arm_sub_f32(testInput_f32, wire2, wire3, blockSize);

    /* wire2 contains (x-x') */
    arm_copy_f32(wire3, wire2, blockSize);

    /* (x(0) - x') * (x(0) - x') + (x(1) - x') * (x(1) - x') + ... + (x(n-1) - x') * (x(n-1) - x') */
    arm_dot_prod_f32(wire2, wire3, blockSize, &variance);

    /* Calculation of 1/blockSize */
    oneByBlockSize = 1.0 / (blockSize - 1);

    /* Calculation of variance */
    arm_mult_f32(&variance, &oneByBlockSize, &variance, 1);

    /* absolute value of difference between ref and test */
    diff = fabsf(refVarianceOut - variance);

    /* Comparison of variance value with reference */
    if(diff > DELTA)
    {
        status = ARM_MATH_TEST_FAILURE;
    }

    if( status != ARM_MATH_SUCCESS)
    {
      while(1);
    }
}
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CMSIS DSP Software Library: Examples

  • Examples

Examples

Here is a list of all examples:
  • arm_class_marks_example_f32.c
  • arm_convolution_example_f32.c
  • arm_dotproduct_example_f32.c
  • arm_fft_bin_example_f32.c
  • arm_fir_example_f32.c
  • arm_graphic_equalizer_example_q31.c
  • arm_linear_interp_example_f32.c
  • arm_matrix_example_f32.c
  • arm_signal_converge_example_f32.c
  • arm_sin_cos_example_f32.c
  • arm_variance_example_f32.c
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CMSIS DSP Software Library: File Index

  • Examples
  • File List
  • Globals

File List

Here is a list of all files with brief descriptions:
arm_abs_f32.c [code]
arm_abs_q15.c [code]
arm_abs_q31.c [code]
arm_abs_q7.c [code]
arm_add_f32.c [code]
arm_add_q15.c [code]
arm_add_q31.c [code]
arm_add_q7.c [code]
arm_biquad_cascade_df1_32x64_init_q31.c [code]
arm_biquad_cascade_df1_32x64_q31.c [code]
arm_biquad_cascade_df1_f32.c [code]
arm_biquad_cascade_df1_fast_q15.c [code]
arm_biquad_cascade_df1_fast_q31.c [code]
arm_biquad_cascade_df1_init_f32.c [code]
arm_biquad_cascade_df1_init_q15.c [code]
arm_biquad_cascade_df1_init_q31.c [code]
arm_biquad_cascade_df1_q15.c [code]
arm_biquad_cascade_df1_q31.c [code]
arm_biquad_cascade_df2T_f32.c [code]
arm_biquad_cascade_df2T_init_f32.c [code]
arm_cfft_radix4_f32.c [code]
arm_cfft_radix4_init_f32.c [code]
arm_cfft_radix4_init_q15.c [code]
arm_cfft_radix4_init_q31.c [code]
arm_cfft_radix4_q15.c [code]
arm_cfft_radix4_q31.c [code]
arm_class_marks_example_f32.c [code]
arm_cmplx_conj_f32.c [code]
arm_cmplx_conj_q15.c [code]
arm_cmplx_conj_q31.c [code]
arm_cmplx_dot_prod_f32.c [code]
arm_cmplx_dot_prod_q15.c [code]
arm_cmplx_dot_prod_q31.c [code]
arm_cmplx_mag_f32.c [code]
arm_cmplx_mag_q15.c [code]
arm_cmplx_mag_q31.c [code]
arm_cmplx_mag_squared_f32.c [code]
arm_cmplx_mag_squared_q15.c [code]
arm_cmplx_mag_squared_q31.c [code]
arm_cmplx_mult_cmplx_f32.c [code]
arm_cmplx_mult_cmplx_q15.c [code]
arm_cmplx_mult_cmplx_q31.c [code]
arm_cmplx_mult_real_f32.c [code]
arm_cmplx_mult_real_q15.c [code]
arm_cmplx_mult_real_q31.c [code]
arm_common_tables.c [code]
arm_conv_f32.c [code]
arm_conv_fast_q15.c [code]
arm_conv_fast_q31.c [code]
arm_conv_partial_f32.c [code]
arm_conv_partial_fast_q15.c [code]
arm_conv_partial_fast_q31.c [code]
arm_conv_partial_q15.c [code]
arm_conv_partial_q31.c [code]
arm_conv_partial_q7.c [code]
arm_conv_q15.c [code]
arm_conv_q31.c [code]
arm_conv_q7.c [code]
arm_convolution_example_f32.c [code]
arm_copy_f32.c [code]
arm_copy_q15.c [code]
arm_copy_q31.c [code]
arm_copy_q7.c [code]
arm_correlate_f32.c [code]
arm_correlate_fast_q15.c [code]
arm_correlate_fast_q31.c [code]
arm_correlate_q15.c [code]
arm_correlate_q31.c [code]
arm_correlate_q7.c [code]
arm_cos_f32.c [code]
arm_cos_q15.c [code]
arm_cos_q31.c [code]
arm_dct4_f32.c [code]
arm_dct4_init_f32.c [code]
arm_dct4_init_q15.c [code]
arm_dct4_init_q31.c [code]
arm_dct4_q15.c [code]
arm_dct4_q31.c [code]
arm_dot_prod_f32.c [code]
arm_dot_prod_q15.c [code]
arm_dot_prod_q31.c [code]
arm_dot_prod_q7.c [code]
arm_dotproduct_example_f32.c [code]
arm_fft_bin_example_f32.c [code]
arm_fill_f32.c [code]
arm_fill_q15.c [code]
arm_fill_q31.c [code]
arm_fill_q7.c [code]
arm_fir_decimate_f32.c [code]
arm_fir_decimate_fast_q15.c [code]
arm_fir_decimate_fast_q31.c [code]
arm_fir_decimate_init_f32.c [code]
arm_fir_decimate_init_q15.c [code]
arm_fir_decimate_init_q31.c [code]
arm_fir_decimate_q15.c [code]
arm_fir_decimate_q31.c [code]
arm_fir_example_f32.c [code]
arm_fir_f32.c [code]
arm_fir_fast_q15.c [code]
arm_fir_fast_q31.c [code]
arm_fir_init_f32.c [code]
arm_fir_init_q15.c [code]
arm_fir_init_q31.c [code]
arm_fir_init_q7.c [code]
arm_fir_interpolate_f32.c [code]
arm_fir_interpolate_init_f32.c [code]
arm_fir_interpolate_init_q15.c [code]
arm_fir_interpolate_init_q31.c [code]
arm_fir_interpolate_q15.c [code]
arm_fir_interpolate_q31.c [code]
arm_fir_lattice_f32.c [code]
arm_fir_lattice_init_f32.c [code]
arm_fir_lattice_init_q15.c [code]
arm_fir_lattice_init_q31.c [code]
arm_fir_lattice_q15.c [code]
arm_fir_lattice_q31.c [code]
arm_fir_q15.c [code]
arm_fir_q31.c [code]
arm_fir_q7.c [code]
arm_fir_sparse_f32.c [code]
arm_fir_sparse_init_f32.c [code]
arm_fir_sparse_init_q15.c [code]
arm_fir_sparse_init_q31.c [code]
arm_fir_sparse_init_q7.c [code]
arm_fir_sparse_q15.c [code]
arm_fir_sparse_q31.c [code]
arm_fir_sparse_q7.c [code]
arm_float_to_q15.c [code]
arm_float_to_q31.c [code]
arm_float_to_q7.c [code]
arm_graphic_equalizer_example_q31.c [code]
arm_iir_lattice_f32.c [code]
arm_iir_lattice_init_f32.c [code]
arm_iir_lattice_init_q15.c [code]
arm_iir_lattice_init_q31.c [code]
arm_iir_lattice_q15.c [code]
arm_iir_lattice_q31.c [code]
arm_linear_interp_example_f32.c [code]
arm_lms_f32.c [code]
arm_lms_init_f32.c [code]
arm_lms_init_q15.c [code]
arm_lms_init_q31.c [code]
arm_lms_norm_f32.c [code]
arm_lms_norm_init_f32.c [code]
arm_lms_norm_init_q15.c [code]
arm_lms_norm_init_q31.c [code]
arm_lms_norm_q15.c [code]
arm_lms_norm_q31.c [code]
arm_lms_q15.c [code]
arm_lms_q31.c [code]
arm_mat_add_f32.c [code]
arm_mat_add_q15.c [code]
arm_mat_add_q31.c [code]
arm_mat_init_f32.c [code]
arm_mat_init_q15.c [code]
arm_mat_init_q31.c [code]
arm_mat_inverse_f32.c [code]
arm_mat_mult_f32.c [code]
arm_mat_mult_fast_q15.c [code]
arm_mat_mult_fast_q31.c [code]
arm_mat_mult_q15.c [code]
arm_mat_mult_q31.c [code]
arm_mat_scale_f32.c [code]
arm_mat_scale_q15.c [code]
arm_mat_scale_q31.c [code]
arm_mat_sub_f32.c [code]
arm_mat_sub_q15.c [code]
arm_mat_sub_q31.c [code]
arm_mat_trans_f32.c [code]
arm_mat_trans_q15.c [code]
arm_mat_trans_q31.c [code]
arm_math.h [code]
arm_matrix_example_f32.c [code]
arm_max_f32.c [code]
arm_max_q15.c [code]
arm_max_q31.c [code]
arm_max_q7.c [code]
arm_mean_f32.c [code]
arm_mean_q15.c [code]
arm_mean_q31.c [code]
arm_mean_q7.c [code]
arm_min_f32.c [code]
arm_min_q15.c [code]
arm_min_q31.c [code]
arm_min_q7.c [code]
arm_mult_f32.c [code]
arm_mult_q15.c [code]
arm_mult_q31.c [code]
arm_mult_q7.c [code]
arm_negate_f32.c [code]
arm_negate_q15.c [code]
arm_negate_q31.c [code]
arm_negate_q7.c [code]
arm_offset_f32.c [code]
arm_offset_q15.c [code]
arm_offset_q31.c [code]
arm_offset_q7.c [code]
arm_pid_init_f32.c [code]
arm_pid_init_q15.c [code]
arm_pid_init_q31.c [code]
arm_pid_reset_f32.c [code]
arm_pid_reset_q15.c [code]
arm_pid_reset_q31.c [code]
arm_power_f32.c [code]
arm_power_q15.c [code]
arm_power_q31.c [code]
arm_power_q7.c [code]
arm_q15_to_float.c [code]
arm_q15_to_q31.c [code]
arm_q15_to_q7.c [code]
arm_q31_to_float.c [code]
arm_q31_to_q15.c [code]
arm_q31_to_q7.c [code]
arm_q7_to_float.c [code]
arm_q7_to_q15.c [code]
arm_q7_to_q31.c [code]
arm_rfft_f32.c [code]
arm_rfft_init_f32.c [code]
arm_rfft_init_q15.c [code]
arm_rfft_init_q31.c [code]
arm_rfft_q15.c [code]
arm_rfft_q31.c [code]
arm_rms_f32.c [code]
arm_rms_q15.c [code]
arm_rms_q31.c [code]
arm_scale_f32.c [code]
arm_scale_q15.c [code]
arm_scale_q31.c [code]
arm_scale_q7.c [code]
arm_shift_q15.c [code]
arm_shift_q31.c [code]
arm_shift_q7.c [code]
arm_signal_converge_example_f32.c [code]
arm_sin_cos_example_f32.c [code]
arm_sin_cos_f32.c [code]
arm_sin_cos_q31.c [code]
arm_sin_f32.c [code]
arm_sin_q15.c [code]
arm_sin_q31.c [code]
arm_sqrt_q15.c [code]
arm_sqrt_q31.c [code]
arm_std_f32.c [code]
arm_std_q15.c [code]
arm_std_q31.c [code]
arm_sub_f32.c [code]
arm_sub_q15.c [code]
arm_sub_q31.c [code]
arm_sub_q7.c [code]
arm_var_f32.c [code]
arm_var_q15.c [code]
arm_var_q31.c [code]
arm_variance_example_f32.c [code]
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • Data Structures
  • Data Fields
  • All
  • Variables
  • a
  • b
  • e
  • f
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • x
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- a -

  • A0 : arm_pid_instance_q15 , arm_pid_instance_q31 , arm_pid_instance_f32
  • A1 : arm_pid_instance_q15 , arm_pid_instance_q31 , arm_pid_instance_f32
  • A2 : arm_pid_instance_f32 , arm_pid_instance_q31
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • Data Structures
  • Data Fields
  • All
  • Variables
  • a
  • b
  • e
  • f
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • x
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- k -

  • Kd : arm_pid_instance_q15 , arm_pid_instance_q31 , arm_pid_instance_f32
  • Ki : arm_pid_instance_q15 , arm_pid_instance_q31 , arm_pid_instance_f32
  • Kp : arm_pid_instance_f32 , arm_pid_instance_q15 , arm_pid_instance_q31
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • Data Structures
  • Data Fields
  • All
  • Variables
  • a
  • b
  • e
  • f
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • x
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- l -

  • L : arm_fir_interpolate_instance_q15 , arm_fir_interpolate_instance_f32 , arm_fir_interpolate_instance_q31
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • Data Structures
  • Data Fields
  • All
  • Variables
  • a
  • b
  • e
  • f
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • x
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- m -

  • M : arm_fir_decimate_instance_q15 , arm_fir_decimate_instance_q31 , arm_fir_decimate_instance_f32
  • maxDelay : arm_fir_sparse_instance_f32 , arm_fir_sparse_instance_q31 , arm_fir_sparse_instance_q15 , arm_fir_sparse_instance_q7
  • mu : arm_lms_instance_q15 , arm_lms_norm_instance_q31 , arm_lms_norm_instance_f32 , arm_lms_norm_instance_q15 , arm_lms_instance_f32 , arm_lms_instance_q31
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • Data Structures
  • Data Fields
  • All
  • Variables
  • a
  • b
  • e
  • f
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • x
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- n -

  • N : arm_dct4_instance_f32 , arm_dct4_instance_q31 , arm_dct4_instance_q15
  • Nby2 : arm_dct4_instance_f32 , arm_dct4_instance_q31 , arm_dct4_instance_q15
  • normalize : arm_dct4_instance_q31 , arm_dct4_instance_q15 , arm_dct4_instance_f32
  • numCols : arm_bilinear_interp_instance_q7 , arm_matrix_instance_f32 , arm_matrix_instance_q15 , arm_matrix_instance_q31 , arm_bilinear_interp_instance_f32 , arm_bilinear_interp_instance_q31 , arm_bilinear_interp_instance_q15
  • numRows : arm_matrix_instance_f32 , arm_matrix_instance_q15 , arm_matrix_instance_q31 , arm_bilinear_interp_instance_f32 , arm_bilinear_interp_instance_q31 , arm_bilinear_interp_instance_q15 , arm_bilinear_interp_instance_q7
  • numStages : arm_fir_lattice_instance_f32 , arm_iir_lattice_instance_q15 , arm_iir_lattice_instance_q31 , arm_biquad_cas_df1_32x64_ins_q31 , arm_iir_lattice_instance_f32 , arm_biquad_casd_df1_inst_q15 , arm_biquad_casd_df1_inst_q31 , arm_biquad_casd_df1_inst_f32 , arm_biquad_cascade_df2T_instance_f32 , arm_fir_lattice_instance_q15 , arm_fir_lattice_instance_q31
  • numTaps : arm_lms_instance_f32 , arm_fir_sparse_instance_q31 , arm_fir_decimate_instance_q31 , arm_fir_instance_q15 , arm_lms_instance_q31 , arm_lms_norm_instance_q15 , arm_fir_decimate_instance_f32 , arm_lms_norm_instance_f32 , arm_lms_norm_instance_q31 , arm_fir_sparse_instance_q15 , arm_fir_instance_q31 , arm_fir_sparse_instance_f32 , arm_lms_instance_q15 , arm_fir_instance_f32 , arm_fir_instance_q7 , arm_fir_decimate_instance_q15 , arm_fir_sparse_instance_q7
  • nValues : arm_linear_interp_instance_f32
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • Data Structures
  • Data Fields
  • All
  • Variables
  • a
  • b
  • e
  • f
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • x
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- o -

  • onebyfftLen : arm_cfft_radix4_instance_f32
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • Data Structures
  • Data Fields
  • All
  • Variables
  • a
  • b
  • e
  • f
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • x
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- b -

  • bitReverseFlag : arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31 , arm_cfft_radix4_instance_f32
  • bitReverseFlagR : arm_rfft_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32
  • bitRevFactor : arm_cfft_radix4_instance_f32 , arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • Data Structures
  • Data Fields
  • All
  • Variables
  • a
  • b
  • e
  • f
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • x
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- e -

  • energy : arm_lms_norm_instance_f32 , arm_lms_norm_instance_q15 , arm_lms_norm_instance_q31
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • Data Structures
  • Data Fields
  • All
  • Variables
  • a
  • b
  • e
  • f
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • x
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- f -

  • fftLen : arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31 , arm_cfft_radix4_instance_f32
  • fftLenBy2 : arm_rfft_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32
  • fftLenReal : arm_rfft_instance_f32 , arm_rfft_instance_q15 , arm_rfft_instance_q31
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • Data Structures
  • Data Fields
  • All
  • Variables
  • a
  • b
  • e
  • f
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • x
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- i -

  • ifftFlag : arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31 , arm_cfft_radix4_instance_f32
  • ifftFlagR : arm_rfft_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • Data Structures
  • Data Fields
  • All
  • Variables
  • a
  • b
  • e
  • f
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • x
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- p -

  • pBitRevTable : arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31 , arm_cfft_radix4_instance_f32
  • pCfft : arm_rfft_instance_q15 , arm_dct4_instance_q31 , arm_dct4_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32 , arm_dct4_instance_f32
  • pCoeffs : arm_biquad_casd_df1_inst_f32 , arm_lms_norm_instance_q31 , arm_lms_norm_instance_q15 , arm_fir_decimate_instance_q15 , arm_fir_sparse_instance_f32 , arm_fir_sparse_instance_q31 , arm_fir_decimate_instance_q31 , arm_fir_sparse_instance_q15 , arm_fir_sparse_instance_q7 , arm_fir_decimate_instance_f32 , arm_fir_instance_q7 , arm_fir_interpolate_instance_q15 , arm_fir_interpolate_instance_q31 , arm_fir_instance_q15 , arm_fir_interpolate_instance_f32 , arm_biquad_cas_df1_32x64_ins_q31 , arm_fir_instance_q31 , arm_biquad_cascade_df2T_instance_f32 , arm_fir_lattice_instance_q15 , arm_fir_instance_f32 , arm_fir_lattice_instance_q31 , arm_fir_lattice_instance_f32 , arm_biquad_casd_df1_inst_q15 , arm_lms_instance_f32 , arm_lms_instance_q15 , arm_biquad_casd_df1_inst_q31 , arm_lms_instance_q31 , arm_lms_norm_instance_f32
  • pCosFactor : arm_dct4_instance_f32 , arm_dct4_instance_q31 , arm_dct4_instance_q15
  • pData : arm_matrix_instance_f32 , arm_matrix_instance_q15 , arm_matrix_instance_q31 , arm_bilinear_interp_instance_f32 , arm_bilinear_interp_instance_q31 , arm_bilinear_interp_instance_q15 , arm_bilinear_interp_instance_q7
  • phaseLength : arm_fir_interpolate_instance_q15 , arm_fir_interpolate_instance_q31 , arm_fir_interpolate_instance_f32
  • pkCoeffs : arm_iir_lattice_instance_q15 , arm_iir_lattice_instance_q31 , arm_iir_lattice_instance_f32
  • postShift : arm_biquad_casd_df1_inst_q15 , arm_biquad_casd_df1_inst_q31 , arm_biquad_cas_df1_32x64_ins_q31 , arm_lms_instance_q15 , arm_lms_instance_q31 , arm_lms_norm_instance_q31 , arm_lms_norm_instance_q15
  • pRfft : arm_dct4_instance_q15 , arm_dct4_instance_f32 , arm_dct4_instance_q31
  • pState : arm_fir_instance_q7 , arm_fir_instance_q15 , arm_fir_instance_q31 , arm_fir_instance_f32 , arm_biquad_casd_df1_inst_q15 , arm_biquad_casd_df1_inst_q31 , arm_biquad_casd_df1_inst_f32 , arm_fir_sparse_instance_q15 , arm_fir_sparse_instance_f32 , arm_fir_decimate_instance_q31 , arm_fir_decimate_instance_f32 , arm_iir_lattice_instance_q15 , arm_fir_interpolate_instance_q15 , arm_fir_interpolate_instance_f32 , arm_biquad_cas_df1_32x64_ins_q31 , arm_biquad_cascade_df2T_instance_f32 , arm_fir_interpolate_instance_q31 , arm_fir_sparse_instance_q31 , arm_fir_lattice_instance_q31 , arm_iir_lattice_instance_f32 , arm_fir_decimate_instance_q15 , arm_lms_norm_instance_f32 , arm_fir_sparse_instance_q7 , arm_lms_instance_q15 , arm_lms_norm_instance_q15 , arm_fir_lattice_instance_q15 , arm_lms_norm_instance_q31 , arm_lms_instance_q31 , arm_fir_lattice_instance_f32 , arm_iir_lattice_instance_q31 , arm_lms_instance_f32
  • pTapDelay : arm_fir_sparse_instance_q7 , arm_fir_sparse_instance_q15 , arm_fir_sparse_instance_q31 , arm_fir_sparse_instance_f32
  • pTwiddle : arm_dct4_instance_q31 , arm_dct4_instance_q15 , arm_cfft_radix4_instance_q15 , arm_dct4_instance_f32 , arm_cfft_radix4_instance_f32 , arm_cfft_radix4_instance_q31
  • pTwiddleAReal : arm_rfft_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32
  • pTwiddleBReal : arm_rfft_instance_f32 , arm_rfft_instance_q31 , arm_rfft_instance_q15
  • pvCoeffs : arm_iir_lattice_instance_q31 , arm_iir_lattice_instance_q15 , arm_iir_lattice_instance_f32
  • pYData : arm_linear_interp_instance_f32
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CMSIS DSP Software Library: Data Fields

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Here is a list of all struct and union fields with links to the structures/unions they belong to:

- r -

  • recipTable : arm_lms_norm_instance_q31 , arm_lms_norm_instance_q15
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CMSIS DSP Software Library: Data Fields

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Here is a list of all struct and union fields with links to the structures/unions they belong to:

- s -

  • state : arm_pid_instance_q15 , arm_pid_instance_q31 , arm_pid_instance_f32
  • stateIndex : arm_fir_sparse_instance_q31 , arm_fir_sparse_instance_f32 , arm_fir_sparse_instance_q15 , arm_fir_sparse_instance_q7
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CMSIS DSP Software Library: Data Fields

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Here is a list of all struct and union fields with links to the structures/unions they belong to:

- t -

  • twidCoefModifier : arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31 , arm_cfft_radix4_instance_f32
  • twidCoefRModifier : arm_rfft_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32
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CMSIS DSP Software Library: Data Fields

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  • x
Here is a list of all struct and union fields with links to the structures/unions they belong to:

- x -

  • x0 : arm_lms_norm_instance_f32 , arm_lms_norm_instance_q31 , arm_lms_norm_instance_q15
  • x1 : arm_linear_interp_instance_f32
  • xSpacing : arm_linear_interp_instance_f32
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CMSIS DSP Software Library: Data Fields - Variables

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  • x

- a -

  • A0 : arm_pid_instance_q15 , arm_pid_instance_q31 , arm_pid_instance_f32
  • A1 : arm_pid_instance_q15 , arm_pid_instance_q31 , arm_pid_instance_f32
  • A2 : arm_pid_instance_f32 , arm_pid_instance_q31
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Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields - Variables

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- k -

  • Kd : arm_pid_instance_q15 , arm_pid_instance_q31 , arm_pid_instance_f32
  • Ki : arm_pid_instance_q15 , arm_pid_instance_q31 , arm_pid_instance_f32
  • Kp : arm_pid_instance_f32 , arm_pid_instance_q15 , arm_pid_instance_q31
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Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields - Variables

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- l -

  • L : arm_fir_interpolate_instance_q15 , arm_fir_interpolate_instance_f32 , arm_fir_interpolate_instance_q31
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CMSIS DSP Software Library: Data Fields - Variables

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  • t
  • x

- m -

  • M : arm_fir_decimate_instance_q15 , arm_fir_decimate_instance_q31 , arm_fir_decimate_instance_f32
  • maxDelay : arm_fir_sparse_instance_f32 , arm_fir_sparse_instance_q31 , arm_fir_sparse_instance_q15 , arm_fir_sparse_instance_q7
  • mu : arm_lms_instance_q15 , arm_lms_norm_instance_q31 , arm_lms_norm_instance_f32 , arm_lms_norm_instance_q15 , arm_lms_instance_f32 , arm_lms_instance_q31
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Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields - Variables

  • Examples
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  • Variables
  • a
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  • p
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  • s
  • t
  • x

- n -

  • N : arm_dct4_instance_f32 , arm_dct4_instance_q31 , arm_dct4_instance_q15
  • Nby2 : arm_dct4_instance_f32 , arm_dct4_instance_q31 , arm_dct4_instance_q15
  • normalize : arm_dct4_instance_q31 , arm_dct4_instance_q15 , arm_dct4_instance_f32
  • numCols : arm_bilinear_interp_instance_q7 , arm_matrix_instance_f32 , arm_matrix_instance_q15 , arm_matrix_instance_q31 , arm_bilinear_interp_instance_f32 , arm_bilinear_interp_instance_q31 , arm_bilinear_interp_instance_q15
  • numRows : arm_matrix_instance_f32 , arm_matrix_instance_q15 , arm_matrix_instance_q31 , arm_bilinear_interp_instance_f32 , arm_bilinear_interp_instance_q31 , arm_bilinear_interp_instance_q15 , arm_bilinear_interp_instance_q7
  • numStages : arm_fir_lattice_instance_f32 , arm_iir_lattice_instance_q15 , arm_iir_lattice_instance_q31 , arm_biquad_cas_df1_32x64_ins_q31 , arm_iir_lattice_instance_f32 , arm_biquad_casd_df1_inst_q15 , arm_biquad_casd_df1_inst_q31 , arm_biquad_casd_df1_inst_f32 , arm_biquad_cascade_df2T_instance_f32 , arm_fir_lattice_instance_q15 , arm_fir_lattice_instance_q31
  • numTaps : arm_lms_instance_f32 , arm_fir_sparse_instance_q31 , arm_fir_decimate_instance_q31 , arm_fir_instance_q15 , arm_lms_instance_q31 , arm_lms_norm_instance_q15 , arm_fir_decimate_instance_f32 , arm_lms_norm_instance_f32 , arm_lms_norm_instance_q31 , arm_fir_sparse_instance_q15 , arm_fir_instance_q31 , arm_fir_sparse_instance_f32 , arm_lms_instance_q15 , arm_fir_instance_f32 , arm_fir_instance_q7 , arm_fir_decimate_instance_q15 , arm_fir_sparse_instance_q7
  • nValues : arm_linear_interp_instance_f32
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Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields - Variables

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- o -

  • onebyfftLen : arm_cfft_radix4_instance_f32
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Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields - Variables

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- b -

  • bitReverseFlag : arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31 , arm_cfft_radix4_instance_f32
  • bitReverseFlagR : arm_rfft_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32
  • bitRevFactor : arm_cfft_radix4_instance_f32 , arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31
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Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields - Variables

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  • x

- e -

  • energy : arm_lms_norm_instance_f32 , arm_lms_norm_instance_q15 , arm_lms_norm_instance_q31
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Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields - Variables

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  • x

- f -

  • fftLen : arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31 , arm_cfft_radix4_instance_f32
  • fftLenBy2 : arm_rfft_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32
  • fftLenReal : arm_rfft_instance_f32 , arm_rfft_instance_q15 , arm_rfft_instance_q31
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Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields - Variables

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  • x

- i -

  • ifftFlag : arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31 , arm_cfft_radix4_instance_f32
  • ifftFlagR : arm_rfft_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32
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Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields - Variables

  • Examples
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  • Variables
  • a
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  • s
  • t
  • x

- p -

  • pBitRevTable : arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31 , arm_cfft_radix4_instance_f32
  • pCfft : arm_rfft_instance_q15 , arm_dct4_instance_q31 , arm_dct4_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32 , arm_dct4_instance_f32
  • pCoeffs : arm_biquad_casd_df1_inst_f32 , arm_lms_norm_instance_q31 , arm_lms_norm_instance_q15 , arm_fir_decimate_instance_q15 , arm_fir_sparse_instance_f32 , arm_fir_sparse_instance_q31 , arm_fir_decimate_instance_q31 , arm_fir_sparse_instance_q15 , arm_fir_sparse_instance_q7 , arm_fir_decimate_instance_f32 , arm_fir_instance_q7 , arm_fir_interpolate_instance_q15 , arm_fir_interpolate_instance_q31 , arm_fir_instance_q15 , arm_fir_interpolate_instance_f32 , arm_biquad_cas_df1_32x64_ins_q31 , arm_fir_instance_q31 , arm_biquad_cascade_df2T_instance_f32 , arm_fir_lattice_instance_q15 , arm_fir_instance_f32 , arm_fir_lattice_instance_q31 , arm_fir_lattice_instance_f32 , arm_biquad_casd_df1_inst_q15 , arm_lms_instance_f32 , arm_lms_instance_q15 , arm_biquad_casd_df1_inst_q31 , arm_lms_instance_q31 , arm_lms_norm_instance_f32
  • pCosFactor : arm_dct4_instance_f32 , arm_dct4_instance_q31 , arm_dct4_instance_q15
  • pData : arm_matrix_instance_f32 , arm_matrix_instance_q15 , arm_matrix_instance_q31 , arm_bilinear_interp_instance_f32 , arm_bilinear_interp_instance_q31 , arm_bilinear_interp_instance_q15 , arm_bilinear_interp_instance_q7
  • phaseLength : arm_fir_interpolate_instance_q15 , arm_fir_interpolate_instance_q31 , arm_fir_interpolate_instance_f32
  • pkCoeffs : arm_iir_lattice_instance_q15 , arm_iir_lattice_instance_q31 , arm_iir_lattice_instance_f32
  • postShift : arm_biquad_casd_df1_inst_q15 , arm_biquad_casd_df1_inst_q31 , arm_biquad_cas_df1_32x64_ins_q31 , arm_lms_instance_q15 , arm_lms_instance_q31 , arm_lms_norm_instance_q31 , arm_lms_norm_instance_q15
  • pRfft : arm_dct4_instance_q15 , arm_dct4_instance_f32 , arm_dct4_instance_q31
  • pState : arm_fir_instance_q7 , arm_fir_instance_q15 , arm_fir_instance_q31 , arm_fir_instance_f32 , arm_biquad_casd_df1_inst_q15 , arm_biquad_casd_df1_inst_q31 , arm_biquad_casd_df1_inst_f32 , arm_fir_sparse_instance_q15 , arm_fir_sparse_instance_f32 , arm_fir_decimate_instance_q31 , arm_fir_decimate_instance_f32 , arm_iir_lattice_instance_q15 , arm_fir_interpolate_instance_q15 , arm_fir_interpolate_instance_f32 , arm_biquad_cas_df1_32x64_ins_q31 , arm_biquad_cascade_df2T_instance_f32 , arm_fir_interpolate_instance_q31 , arm_fir_sparse_instance_q31 , arm_fir_lattice_instance_q31 , arm_iir_lattice_instance_f32 , arm_fir_decimate_instance_q15 , arm_lms_norm_instance_f32 , arm_fir_sparse_instance_q7 , arm_lms_instance_q15 , arm_lms_norm_instance_q15 , arm_fir_lattice_instance_q15 , arm_lms_norm_instance_q31 , arm_lms_instance_q31 , arm_fir_lattice_instance_f32 , arm_iir_lattice_instance_q31 , arm_lms_instance_f32
  • pTapDelay : arm_fir_sparse_instance_q7 , arm_fir_sparse_instance_q15 , arm_fir_sparse_instance_q31 , arm_fir_sparse_instance_f32
  • pTwiddle : arm_dct4_instance_q31 , arm_dct4_instance_q15 , arm_cfft_radix4_instance_q15 , arm_dct4_instance_f32 , arm_cfft_radix4_instance_f32 , arm_cfft_radix4_instance_q31
  • pTwiddleAReal : arm_rfft_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32
  • pTwiddleBReal : arm_rfft_instance_f32 , arm_rfft_instance_q31 , arm_rfft_instance_q15
  • pvCoeffs : arm_iir_lattice_instance_q31 , arm_iir_lattice_instance_q15 , arm_iir_lattice_instance_f32
  • pYData : arm_linear_interp_instance_f32
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CMSIS DSP Software Library: Data Fields - Variables

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- r -

  • recipTable : arm_lms_norm_instance_q31 , arm_lms_norm_instance_q15
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Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields - Variables

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  • x

- s -

  • state : arm_pid_instance_q15 , arm_pid_instance_q31 , arm_pid_instance_f32
  • stateIndex : arm_fir_sparse_instance_q31 , arm_fir_sparse_instance_f32 , arm_fir_sparse_instance_q15 , arm_fir_sparse_instance_q7
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CMSIS DSP Software Library: Data Fields - Variables

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  • x

- t -

  • twidCoefModifier : arm_cfft_radix4_instance_q15 , arm_cfft_radix4_instance_q31 , arm_cfft_radix4_instance_f32
  • twidCoefRModifier : arm_rfft_instance_q15 , arm_rfft_instance_q31 , arm_rfft_instance_f32
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CMSIS DSP Software Library: Data Fields - Variables

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  • x

- x -

  • x0 : arm_lms_norm_instance_f32 , arm_lms_norm_instance_q31 , arm_lms_norm_instance_q15
  • x1 : arm_linear_interp_instance_f32
  • xSpacing : arm_linear_interp_instance_f32
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CMSIS DSP Software Library: Data Fields

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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- _ -

  • __CMSIS_GENERIC : arm_math.h
  • __PACKq7 : arm_math.h
  • __SIMD32 : arm_math.h
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CMSIS DSP Software Library: Data Fields

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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- l -

  • lmsNorm_instance : arm_signal_converge_example_f32.c
  • lmsNormCoeff_f32 : arm_signal_converge_example_f32.c
  • lmsStateF32 : arm_signal_converge_example_f32.c
  • LPF_instance : arm_signal_converge_example_f32.c
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CMSIS DSP Software Library: Data Fields

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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- m -

  • main() : arm_class_marks_example_f32.c , arm_convolution_example_f32.c , arm_fir_example_f32.c , arm_matrix_example_f32.c , arm_signal_converge_example_f32.c , arm_fft_bin_example_f32.c , arm_sin_cos_example_f32.c , arm_variance_example_f32.c , arm_dotproduct_example_f32.c , arm_graphic_equalizer_example_q31.c , arm_linear_interp_example_f32.c
  • MAX_BLOCKSIZE : arm_variance_example_f32.c , arm_convolution_example_f32.c , arm_sin_cos_example_f32.c , arm_dotproduct_example_f32.c
  • max_marks : arm_class_marks_example_f32.c
  • mean : arm_class_marks_example_f32.c
  • min_marks : arm_class_marks_example_f32.c
  • MU : arm_signal_converge_example_f32.c
  • mult32x64() : arm_math.h
  • multOutput : arm_dotproduct_example_f32.c
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CMSIS DSP Software Library: Data Fields

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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- n -

  • NUM_TAPS : arm_fir_example_f32.c
  • numBlocks : arm_fir_example_f32.c
  • NUMBLOCKS : arm_graphic_equalizer_example_q31.c
  • NUMFRAMES : arm_signal_converge_example_f32.c
  • NUMSTAGES : arm_graphic_equalizer_example_q31.c
  • numStudents : arm_class_marks_example_f32.c
  • NUMSTUDENTS : arm_class_marks_example_f32.c
  • NUMSUBJECTS : arm_class_marks_example_f32.c
  • numSubjects : arm_class_marks_example_f32.c
  • NUMTAPS : arm_signal_converge_example_f32.c
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- o -

  • outLen : arm_convolution_example_f32.c
  • outputQ31 : arm_graphic_equalizer_example_q31.c
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- a -

  • A_f32 : arm_matrix_example_f32.c
  • Ak : arm_convolution_example_f32.c
  • arm_abs_f32() : arm_math.h , arm_abs_f32.c
  • arm_abs_q15() : arm_abs_q15.c , arm_math.h
  • arm_abs_q31() : arm_math.h , arm_abs_q31.c
  • arm_abs_q7() : arm_abs_q7.c , arm_math.h
  • arm_add_f32() : arm_add_f32.c , arm_math.h
  • arm_add_q15() : arm_add_q15.c , arm_math.h
  • arm_add_q31() : arm_math.h , arm_add_q31.c
  • arm_add_q7() : arm_add_q7.c , arm_math.h
  • arm_bilinear_interp_f32() : arm_math.h
  • arm_bilinear_interp_q15() : arm_math.h
  • arm_bilinear_interp_q31() : arm_math.h
  • arm_bilinear_interp_q7() : arm_math.h
  • arm_biquad_cas_df1_32x64_init_q31() : arm_biquad_cascade_df1_32x64_init_q31.c , arm_math.h
  • arm_biquad_cas_df1_32x64_q31() : arm_biquad_cascade_df1_32x64_q31.c , arm_math.h
  • arm_biquad_cascade_df1_f32() : arm_biquad_cascade_df1_f32.c , arm_math.h
  • arm_biquad_cascade_df1_fast_q15() : arm_biquad_cascade_df1_fast_q15.c , arm_math.h
  • arm_biquad_cascade_df1_fast_q31() : arm_math.h , arm_biquad_cascade_df1_fast_q31.c
  • arm_biquad_cascade_df1_init_f32() : arm_biquad_cascade_df1_init_f32.c , arm_math.h
  • arm_biquad_cascade_df1_init_q15() : arm_biquad_cascade_df1_init_q15.c , arm_math.h
  • arm_biquad_cascade_df1_init_q31() : arm_biquad_cascade_df1_init_q31.c , arm_math.h
  • arm_biquad_cascade_df1_q15() : arm_biquad_cascade_df1_q15.c , arm_math.h
  • arm_biquad_cascade_df1_q31() : arm_biquad_cascade_df1_q31.c , arm_math.h
  • arm_biquad_cascade_df2T_f32() : arm_biquad_cascade_df2T_f32.c , arm_math.h
  • arm_biquad_cascade_df2T_init_f32() : arm_biquad_cascade_df2T_init_f32.c , arm_math.h
  • arm_bitreversal_f32() : arm_cfft_radix4_f32.c , arm_math.h
  • arm_bitreversal_q15() : arm_cfft_radix4_q15.c , arm_math.h
  • arm_bitreversal_q31() : arm_cfft_radix4_q31.c , arm_math.h
  • arm_cfft_radix4_f32() : arm_cfft_radix4_f32.c , arm_math.h
  • arm_cfft_radix4_init_f32() : arm_cfft_radix4_init_f32.c , arm_math.h
  • arm_cfft_radix4_init_q15() : arm_cfft_radix4_init_q15.c , arm_math.h
  • arm_cfft_radix4_init_q31() : arm_cfft_radix4_init_q31.c , arm_math.h
  • arm_cfft_radix4_q15() : arm_cfft_radix4_q15.c , arm_math.h
  • arm_cfft_radix4_q31() : arm_math.h , arm_cfft_radix4_q31.c
  • arm_circularRead_f32() : arm_math.h
  • arm_circularRead_q15() : arm_math.h
  • arm_circularRead_q7() : arm_math.h
  • arm_circularWrite_f32() : arm_math.h
  • arm_circularWrite_q15() : arm_math.h
  • arm_circularWrite_q7() : arm_math.h
  • arm_clarke_f32() : arm_math.h
  • arm_clarke_q31() : arm_math.h
  • arm_cmplx_conj_f32() : arm_cmplx_conj_f32.c , arm_math.h
  • arm_cmplx_conj_q15() : arm_cmplx_conj_q15.c , arm_math.h
  • arm_cmplx_conj_q31() : arm_cmplx_conj_q31.c , arm_math.h
  • arm_cmplx_dot_prod_f32() : arm_cmplx_dot_prod_f32.c , arm_math.h
  • arm_cmplx_dot_prod_q15() : arm_cmplx_dot_prod_q15.c , arm_math.h
  • arm_cmplx_dot_prod_q31() : arm_cmplx_dot_prod_q31.c , arm_math.h
  • arm_cmplx_mag_f32() : arm_cmplx_mag_f32.c , arm_math.h
  • arm_cmplx_mag_q15() : arm_cmplx_mag_q15.c , arm_math.h
  • arm_cmplx_mag_q31() : arm_cmplx_mag_q31.c , arm_math.h
  • arm_cmplx_mag_squared_f32() : arm_cmplx_mag_squared_f32.c , arm_math.h
  • arm_cmplx_mag_squared_q15() : arm_cmplx_mag_squared_q15.c , arm_math.h
  • arm_cmplx_mag_squared_q31() : arm_cmplx_mag_squared_q31.c , arm_math.h
  • arm_cmplx_mult_cmplx_f32() : arm_cmplx_mult_cmplx_f32.c , arm_math.h
  • arm_cmplx_mult_cmplx_q15() : arm_cmplx_mult_cmplx_q15.c , arm_math.h
  • arm_cmplx_mult_cmplx_q31() : arm_cmplx_mult_cmplx_q31.c , arm_math.h
  • arm_cmplx_mult_real_f32() : arm_cmplx_mult_real_f32.c , arm_math.h
  • arm_cmplx_mult_real_q15() : arm_cmplx_mult_real_q15.c , arm_math.h
  • arm_cmplx_mult_real_q31() : arm_cmplx_mult_real_q31.c , arm_math.h
  • arm_conv_f32() : arm_conv_f32.c , arm_math.h
  • arm_conv_fast_q15() : arm_conv_fast_q15.c , arm_math.h
  • arm_conv_fast_q31() : arm_conv_fast_q31.c , arm_math.h
  • arm_conv_partial_f32() : arm_conv_partial_f32.c , arm_math.h
  • arm_conv_partial_fast_q15() : arm_conv_partial_fast_q15.c , arm_math.h
  • arm_conv_partial_fast_q31() : arm_conv_partial_fast_q31.c , arm_math.h
  • arm_conv_partial_q15() : arm_conv_partial_q15.c , arm_math.h
  • arm_conv_partial_q31() : arm_conv_partial_q31.c , arm_math.h
  • arm_conv_partial_q7() : arm_conv_partial_q7.c , arm_math.h
  • arm_conv_q15() : arm_math.h , arm_conv_q15.c
  • arm_conv_q31() : arm_conv_q31.c , arm_math.h
  • arm_conv_q7() : arm_conv_q7.c , arm_math.h
  • arm_copy_f32() : arm_copy_f32.c , arm_math.h
  • arm_copy_q15() : arm_copy_q15.c , arm_math.h
  • arm_copy_q31() : arm_copy_q31.c , arm_math.h
  • arm_copy_q7() : arm_copy_q7.c , arm_math.h
  • arm_correlate_f32() : arm_correlate_f32.c , arm_math.h
  • arm_correlate_fast_q15() : arm_correlate_fast_q15.c , arm_math.h
  • arm_correlate_fast_q31() : arm_correlate_fast_q31.c , arm_math.h
  • arm_correlate_q15() : arm_correlate_q15.c , arm_math.h
  • arm_correlate_q31() : arm_correlate_q31.c , arm_math.h
  • arm_correlate_q7() : arm_correlate_q7.c , arm_math.h
  • arm_cos_f32() : arm_cos_f32.c , arm_math.h
  • arm_cos_q15() : arm_cos_q15.c , arm_math.h
  • arm_cos_q31() : arm_cos_q31.c , arm_math.h
  • arm_dct4_f32() : arm_dct4_f32.c , arm_math.h
  • arm_dct4_init_f32() : arm_dct4_init_f32.c , arm_math.h
  • arm_dct4_init_q15() : arm_dct4_init_q15.c , arm_math.h
  • arm_dct4_init_q31() : arm_dct4_init_q31.c , arm_math.h
  • arm_dct4_q15() : arm_dct4_q15.c , arm_math.h
  • arm_dct4_q31() : arm_dct4_q31.c , arm_math.h
  • arm_dot_prod_f32() : arm_dot_prod_f32.c , arm_math.h
  • arm_dot_prod_q15() : arm_dot_prod_q15.c , arm_math.h
  • arm_dot_prod_q31() : arm_dot_prod_q31.c , arm_math.h
  • arm_dot_prod_q7() : arm_dot_prod_q7.c , arm_math.h
  • arm_fill_f32() : arm_fill_f32.c , arm_math.h
  • arm_fill_q15() : arm_fill_q15.c , arm_math.h
  • arm_fill_q31() : arm_fill_q31.c , arm_math.h
  • arm_fill_q7() : arm_fill_q7.c , arm_math.h
  • arm_fir_decimate_f32() : arm_fir_decimate_f32.c , arm_math.h
  • arm_fir_decimate_fast_q15() : arm_fir_decimate_fast_q15.c , arm_math.h
  • arm_fir_decimate_fast_q31() : arm_fir_decimate_fast_q31.c , arm_math.h
  • arm_fir_decimate_init_f32() : arm_fir_decimate_init_f32.c , arm_math.h
  • arm_fir_decimate_init_q15() : arm_fir_decimate_init_q15.c , arm_math.h
  • arm_fir_decimate_init_q31() : arm_fir_decimate_init_q31.c , arm_math.h
  • arm_fir_decimate_q15() : arm_fir_decimate_q15.c , arm_math.h
  • arm_fir_decimate_q31() : arm_fir_decimate_q31.c , arm_math.h
  • arm_fir_f32() : arm_fir_f32.c , arm_math.h
  • arm_fir_fast_q15() : arm_fir_fast_q15.c , arm_math.h
  • arm_fir_fast_q31() : arm_fir_fast_q31.c , arm_math.h
  • arm_fir_init_f32() : arm_fir_init_f32.c , arm_math.h
  • arm_fir_init_q15() : arm_fir_init_q15.c , arm_math.h
  • arm_fir_init_q31() : arm_fir_init_q31.c , arm_math.h
  • arm_fir_init_q7() : arm_fir_init_q7.c , arm_math.h
  • arm_fir_interpolate_f32() : arm_fir_interpolate_f32.c , arm_math.h
  • arm_fir_interpolate_init_f32() : arm_fir_interpolate_init_f32.c , arm_math.h
  • arm_fir_interpolate_init_q15() : arm_fir_interpolate_init_q15.c , arm_math.h
  • arm_fir_interpolate_init_q31() : arm_fir_interpolate_init_q31.c , arm_math.h
  • arm_fir_interpolate_q15() : arm_fir_interpolate_q15.c , arm_math.h
  • arm_fir_interpolate_q31() : arm_fir_interpolate_q31.c , arm_math.h
  • arm_fir_lattice_f32() : arm_fir_lattice_f32.c , arm_math.h
  • arm_fir_lattice_init_f32() : arm_fir_lattice_init_f32.c , arm_math.h
  • arm_fir_lattice_init_q15() : arm_fir_lattice_init_q15.c , arm_math.h
  • arm_fir_lattice_init_q31() : arm_fir_lattice_init_q31.c , arm_math.h
  • arm_fir_lattice_q15() : arm_fir_lattice_q15.c , arm_math.h
  • arm_fir_lattice_q31() : arm_fir_lattice_q31.c , arm_math.h
  • arm_fir_q15() : arm_fir_q15.c , arm_math.h
  • arm_fir_q31() : arm_fir_q31.c , arm_math.h
  • arm_fir_q7() : arm_fir_q7.c , arm_math.h
  • arm_fir_sparse_f32() : arm_fir_sparse_f32.c , arm_math.h
  • arm_fir_sparse_init_f32() : arm_fir_sparse_init_f32.c , arm_math.h
  • arm_fir_sparse_init_q15() : arm_fir_sparse_init_q15.c , arm_math.h
  • arm_fir_sparse_init_q31() : arm_fir_sparse_init_q31.c , arm_math.h
  • arm_fir_sparse_init_q7() : arm_math.h , arm_fir_sparse_init_q7.c
  • arm_fir_sparse_q15() : arm_fir_sparse_q15.c , arm_math.h
  • arm_fir_sparse_q31() : arm_fir_sparse_q31.c , arm_math.h
  • arm_fir_sparse_q7() : arm_fir_sparse_q7.c , arm_math.h
  • arm_float_to_q15() : arm_float_to_q15.c , arm_math.h
  • arm_float_to_q31() : arm_float_to_q31.c , arm_math.h
  • arm_float_to_q7() : arm_float_to_q7.c , arm_math.h
  • arm_iir_lattice_f32() : arm_iir_lattice_f32.c , arm_math.h
  • arm_iir_lattice_init_f32() : arm_iir_lattice_init_f32.c , arm_math.h
  • arm_iir_lattice_init_q15() : arm_iir_lattice_init_q15.c , arm_math.h
  • arm_iir_lattice_init_q31() : arm_iir_lattice_init_q31.c , arm_math.h
  • arm_iir_lattice_q15() : arm_iir_lattice_q15.c , arm_math.h
  • arm_iir_lattice_q31() : arm_iir_lattice_q31.c , arm_math.h
  • arm_inv_clarke_f32() : arm_math.h
  • arm_inv_clarke_q31() : arm_math.h
  • arm_inv_park_f32() : arm_math.h
  • arm_inv_park_q31() : arm_math.h
  • arm_linear_interep_table : arm_linear_interp_example_f32.c
  • arm_linear_interp_f32() : arm_math.h
  • arm_linear_interp_q15() : arm_math.h
  • arm_linear_interp_q31() : arm_math.h
  • arm_linear_interp_q7() : arm_math.h
  • arm_lms_f32() : arm_lms_f32.c , arm_math.h
  • arm_lms_init_f32() : arm_lms_init_f32.c , arm_math.h
  • arm_lms_init_q15() : arm_lms_init_q15.c , arm_math.h
  • arm_lms_init_q31() : arm_lms_init_q31.c , arm_math.h
  • arm_lms_norm_f32() : arm_lms_norm_f32.c , arm_math.h
  • arm_lms_norm_init_f32() : arm_lms_norm_init_f32.c , arm_math.h
  • arm_lms_norm_init_q15() : arm_lms_norm_init_q15.c , arm_math.h
  • arm_lms_norm_init_q31() : arm_lms_norm_init_q31.c , arm_math.h
  • arm_lms_norm_q15() : arm_lms_norm_q15.c , arm_math.h
  • arm_lms_norm_q31() : arm_lms_norm_q31.c , arm_math.h
  • arm_lms_q15() : arm_lms_q15.c , arm_math.h
  • arm_lms_q31() : arm_lms_q31.c , arm_math.h
  • arm_mat_add_f32() : arm_mat_add_f32.c , arm_math.h
  • arm_mat_add_q15() : arm_mat_add_q15.c , arm_math.h
  • arm_mat_add_q31() : arm_mat_add_q31.c , arm_math.h
  • arm_mat_init_f32() : arm_mat_init_f32.c , arm_math.h
  • arm_mat_init_q15() : arm_mat_init_q15.c , arm_math.h
  • arm_mat_init_q31() : arm_mat_init_q31.c , arm_math.h
  • arm_mat_inverse_f32() : arm_mat_inverse_f32.c , arm_math.h
  • arm_mat_mult_f32() : arm_mat_mult_f32.c , arm_math.h
  • arm_mat_mult_fast_q15() : arm_mat_mult_fast_q15.c , arm_math.h
  • arm_mat_mult_fast_q31() : arm_mat_mult_fast_q31.c , arm_math.h
  • arm_mat_mult_q15() : arm_mat_mult_q15.c , arm_math.h
  • arm_mat_mult_q31() : arm_mat_mult_q31.c , arm_math.h
  • arm_mat_scale_f32() : arm_mat_scale_f32.c , arm_math.h
  • arm_mat_scale_q15() : arm_mat_scale_q15.c , arm_math.h
  • arm_mat_scale_q31() : arm_mat_scale_q31.c , arm_math.h
  • arm_mat_sub_f32() : arm_mat_sub_f32.c , arm_math.h
  • arm_mat_sub_q15() : arm_mat_sub_q15.c , arm_math.h
  • arm_mat_sub_q31() : arm_mat_sub_q31.c , arm_math.h
  • arm_mat_trans_f32() : arm_mat_trans_f32.c , arm_math.h
  • arm_mat_trans_q15() : arm_mat_trans_q15.c , arm_math.h
  • arm_mat_trans_q31() : arm_mat_trans_q31.c , arm_math.h
  • ARM_MATH_ARGUMENT_ERROR : arm_math.h
  • ARM_MATH_LENGTH_ERROR : arm_math.h
  • ARM_MATH_NANINF : arm_math.h
  • ARM_MATH_SINGULAR : arm_math.h
  • ARM_MATH_SIZE_MISMATCH : arm_math.h
  • ARM_MATH_SUCCESS : arm_math.h
  • ARM_MATH_TEST_FAILURE : arm_math.h
  • arm_max_f32() : arm_math.h , arm_max_f32.c
  • arm_max_q15() : arm_max_q15.c , arm_math.h
  • arm_max_q31() : arm_math.h , arm_max_q31.c
  • arm_max_q7() : arm_math.h , arm_max_q7.c
  • arm_mean_f32() : arm_math.h , arm_mean_f32.c
  • arm_mean_q15() : arm_math.h , arm_mean_q15.c
  • arm_mean_q31() : arm_mean_q31.c , arm_math.h
  • arm_mean_q7() : arm_mean_q7.c , arm_math.h
  • arm_min_f32() : arm_math.h , arm_min_f32.c
  • arm_min_q15() : arm_min_q15.c , arm_math.h
  • arm_min_q31() : arm_math.h , arm_min_q31.c
  • arm_min_q7() : arm_min_q7.c , arm_math.h
  • arm_mult_f32() : arm_math.h , arm_mult_f32.c
  • arm_mult_q15() : arm_mult_q15.c , arm_math.h
  • arm_mult_q31() : arm_mult_q31.c , arm_math.h
  • arm_mult_q7() : arm_mult_q7.c , arm_math.h
  • arm_negate_f32() : arm_math.h , arm_negate_f32.c
  • arm_negate_q15() : arm_negate_q15.c , arm_math.h
  • arm_negate_q31() : arm_math.h , arm_negate_q31.c
  • arm_negate_q7() : arm_negate_q7.c , arm_math.h
  • arm_offset_f32() : arm_math.h , arm_offset_f32.c
  • arm_offset_q15() : arm_math.h , arm_offset_q15.c
  • arm_offset_q31() : arm_offset_q31.c , arm_math.h
  • arm_offset_q7() : arm_offset_q7.c , arm_math.h
  • arm_park_f32() : arm_math.h
  • arm_park_q31() : arm_math.h
  • arm_pid_f32() : arm_math.h
  • arm_pid_init_f32() : arm_math.h , arm_pid_init_f32.c
  • arm_pid_init_q15() : arm_pid_init_q15.c , arm_math.h
  • arm_pid_init_q31() : arm_math.h , arm_pid_init_q31.c
  • arm_pid_q15() : arm_math.h
  • arm_pid_q31() : arm_math.h
  • arm_pid_reset_f32() : arm_pid_reset_f32.c , arm_math.h
  • arm_pid_reset_q15() : arm_pid_reset_q15.c , arm_math.h
  • arm_pid_reset_q31() : arm_pid_reset_q31.c , arm_math.h
  • arm_power_f32() : arm_power_f32.c , arm_math.h
  • arm_power_q15() : arm_math.h , arm_power_q15.c
  • arm_power_q31() : arm_power_q31.c , arm_math.h
  • arm_power_q7() : arm_power_q7.c , arm_math.h
  • arm_q15_to_float() : arm_q15_to_float.c , arm_math.h
  • arm_q15_to_q31() : arm_q15_to_q31.c , arm_math.h
  • arm_q15_to_q7() : arm_q15_to_q7.c , arm_math.h
  • arm_q31_to_float() : arm_q31_to_float.c , arm_math.h
  • arm_q31_to_q15() : arm_q31_to_q15.c , arm_math.h
  • arm_q31_to_q7() : arm_math.h , arm_q31_to_q7.c
  • arm_q7_to_float() : arm_math.h , arm_q7_to_float.c
  • arm_q7_to_q15() : arm_q7_to_q15.c , arm_math.h
  • arm_q7_to_q31() : arm_math.h , arm_q7_to_q31.c
  • arm_radix4_butterfly_f32() : arm_math.h , arm_cfft_radix4_f32.c
  • arm_radix4_butterfly_inverse_f32() : arm_math.h , arm_cfft_radix4_f32.c
  • arm_radix4_butterfly_inverse_q15() : arm_cfft_radix4_q15.c , arm_math.h
  • arm_radix4_butterfly_inverse_q31() : arm_math.h , arm_cfft_radix4_q31.c
  • arm_radix4_butterfly_q15() : arm_math.h , arm_cfft_radix4_q15.c
  • arm_radix4_butterfly_q31() : arm_math.h , arm_cfft_radix4_q31.c
  • arm_recip_q15() : arm_math.h
  • arm_recip_q31() : arm_math.h
  • arm_rfft_f32() : arm_rfft_f32.c , arm_math.h
  • arm_rfft_init_f32() : arm_rfft_init_f32.c , arm_math.h
  • arm_rfft_init_q15() : arm_rfft_init_q15.c , arm_math.h
  • arm_rfft_init_q31() : arm_math.h , arm_rfft_init_q31.c
  • arm_rfft_q15() : arm_math.h , arm_rfft_q15.c
  • arm_rfft_q31() : arm_math.h , arm_rfft_q31.c
  • arm_rms_f32() : arm_math.h , arm_rms_f32.c
  • arm_rms_q15() : arm_math.h , arm_rms_q15.c
  • arm_rms_q31() : arm_math.h , arm_rms_q31.c
  • arm_scale_f32() : arm_math.h , arm_scale_f32.c
  • arm_scale_q15() : arm_math.h , arm_scale_q15.c
  • arm_scale_q31() : arm_math.h , arm_scale_q31.c
  • arm_scale_q7() : arm_math.h , arm_scale_q7.c
  • arm_shift_q15() : arm_math.h , arm_shift_q15.c
  • arm_shift_q31() : arm_shift_q31.c , arm_math.h
  • arm_shift_q7() : arm_math.h , arm_shift_q7.c
  • arm_sin_cos_f32() : arm_math.h , arm_sin_cos_f32.c
  • arm_sin_cos_q31() : arm_math.h , arm_sin_cos_q31.c
  • arm_sin_f32() : arm_math.h , arm_sin_f32.c
  • arm_sin_q15() : arm_sin_q15.c , arm_math.h
  • arm_sin_q31() : arm_sin_q31.c , arm_math.h
  • arm_split_rfft_f32() : arm_rfft_f32.c
  • arm_split_rfft_q15() : arm_rfft_q15.c
  • arm_split_rfft_q31() : arm_rfft_q31.c
  • arm_split_rifft_f32() : arm_rfft_f32.c
  • arm_split_rifft_q15() : arm_rfft_q15.c
  • arm_split_rifft_q31() : arm_rfft_q31.c
  • arm_sqrt_f32() : arm_math.h
  • arm_sqrt_q15() : arm_sqrt_q15.c
  • arm_sqrt_q31() : arm_sqrt_q31.c
  • arm_status : arm_math.h
  • arm_std_f32() : arm_std_f32.c , arm_math.h
  • arm_std_q15() : arm_std_q15.c , arm_math.h
  • arm_std_q31() : arm_math.h , arm_std_q31.c
  • arm_sub_f32() : arm_math.h , arm_sub_f32.c
  • arm_sub_q15() : arm_sub_q15.c , arm_math.h
  • arm_sub_q31() : arm_sub_q31.c , arm_math.h
  • arm_sub_q7() : arm_sub_q7.c , arm_math.h
  • arm_var_f32() : arm_math.h , arm_var_f32.c
  • arm_var_q15() : arm_var_q15.c , arm_math.h
  • arm_var_q31() : arm_math.h , arm_var_q31.c
  • armBitRevTable : arm_common_tables.c
  • armRecipTableQ15 : arm_common_tables.c
  • armRecipTableQ31 : arm_common_tables.c
  • AT_f32 : arm_matrix_example_f32.c
  • ATMA_f32 : arm_matrix_example_f32.c
  • ATMAI_f32 : arm_matrix_example_f32.c
  • AxB : arm_convolution_example_f32.c
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CMSIS DSP Software Library: Data Fields

  • Examples
  • File List
  • Globals
  • All
  • Functions
  • Variables
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  • Enumerations
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  • Defines
  • _
  • a
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  • d
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  • f
  • g
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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- b -

  • B_f32 : arm_matrix_example_f32.c
  • biquadStateBand1Q31 : arm_graphic_equalizer_example_q31.c
  • biquadStateBand2Q31 : arm_graphic_equalizer_example_q31.c
  • biquadStateBand3Q31 : arm_graphic_equalizer_example_q31.c
  • biquadStateBand4Q31 : arm_graphic_equalizer_example_q31.c
  • biquadStateBand5Q31 : arm_graphic_equalizer_example_q31.c
  • Bk : arm_convolution_example_f32.c
  • BLOCK_SIZE : arm_fir_example_f32.c
  • BLOCKSIZE : arm_graphic_equalizer_example_q31.c
  • blockSize : arm_variance_example_f32.c , arm_sin_cos_example_f32.c
  • BLOCKSIZE : arm_signal_converge_example_f32.c
  • blockSize : arm_fir_example_f32.c
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • i
  • l
  • m
  • n
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  • p
  • q
  • r
  • s
  • t
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  • v
  • w
  • x
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- c -

  • clip_q31_to_q15() : arm_math.h
  • clip_q31_to_q7() : arm_math.h
  • clip_q63_to_q15() : arm_math.h
  • clip_q63_to_q31() : arm_math.h
  • coeffTable : arm_graphic_equalizer_example_q31.c
  • cos_factors_128 : arm_dct4_init_f32.c
  • cos_factors_2048 : arm_dct4_init_f32.c
  • cos_factors_512 : arm_dct4_init_f32.c
  • cos_factorsQ15_128 : arm_dct4_init_q15.c
  • cos_factorsQ15_2048 : arm_dct4_init_q15.c
  • cos_factorsQ15_512 : arm_dct4_init_q15.c
  • cos_factorsQ31_128 : arm_dct4_init_q31.c
  • cos_factorsQ31_2048 : arm_dct4_init_q31.c
  • cos_factorsQ31_512 : arm_dct4_init_q31.c
  • cosOutput : arm_sin_cos_example_f32.c
  • cosSquareOutput : arm_sin_cos_example_f32.c
  • cosTable : arm_sin_cos_f32.c , arm_cos_f32.c
  • cosTableQ15 : arm_cos_q15.c
  • cosTableQ31 : arm_cos_q31.c , arm_sin_cos_q31.c
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • File List
  • Globals
  • All
  • Functions
  • Variables
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  • Enumerations
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  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • i
  • l
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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- d -

  • DELTA : arm_convolution_example_f32.c , arm_dotproduct_example_f32.c , arm_variance_example_f32.c , arm_sin_cos_example_f32.c
  • DELTA_COEFF : arm_signal_converge_example_f32.c
  • DELTA_ERROR : arm_signal_converge_example_f32.c
  • DELTA_Q15 : arm_math.h
  • DELTA_Q31 : arm_math.h
  • doBitReverse : arm_fft_bin_example_f32.c
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
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  • d
  • e
  • f
  • g
  • i
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  • x
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- e -

  • err_signal : arm_signal_converge_example_f32.c
  • errOutput : arm_signal_converge_example_f32.c
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
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  • _
  • a
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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- f -

  • fftSize : arm_fft_bin_example_f32.c
  • FIRCoeff_f32 : arm_signal_converge_example_f32.c
  • firCoeffs32 : arm_fir_example_f32.c
  • firStateF32 : arm_signal_converge_example_f32.c , arm_fir_example_f32.c
  • float32_t : arm_math.h
  • float64_t : arm_math.h
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • i
  • l
  • m
  • n
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  • r
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  • x
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- g -

  • gainDB : arm_graphic_equalizer_example_q31.c
  • getinput() : arm_signal_converge_example_f32.c
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
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  • _
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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- i -

  • ifftFlag : arm_fft_bin_example_f32.c
  • INDEX_MASK : arm_math.h
  • INPUT_SPACING : arm_math.h
  • inputQ31 : arm_graphic_equalizer_example_q31.c
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- p -

  • PI : arm_math.h
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
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  • Globals
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  • Functions
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  • Enumerations
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  • _
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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- q -

  • q15_t : arm_math.h
  • q31_t : arm_math.h
  • q63_t : arm_math.h
  • q7_t : arm_math.h
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
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  • _
  • a
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  • x
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- r -

  • realCoefA : arm_rfft_init_f32.c
  • realCoefAQ15 : arm_rfft_init_q15.c
  • realCoefAQ31 : arm_rfft_init_q31.c
  • realCoefB : arm_rfft_init_f32.c
  • realCoefBQ15 : arm_rfft_init_q15.c
  • realCoefBQ31 : arm_rfft_init_q31.c
  • refDotProdOut : arm_dotproduct_example_f32.c
  • refIndex : arm_fft_bin_example_f32.c
  • refOutput : arm_fir_example_f32.c
  • refVarianceOut : arm_variance_example_f32.c
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
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  • _
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  • f
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  • x
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- s -

  • sinOutput : arm_sin_cos_example_f32.c
  • sinSquareOutput : arm_sin_cos_example_f32.c
  • sinTable : arm_sin_f32.c , arm_sin_cos_f32.c
  • sinTableQ15 : arm_sin_q15.c
  • sinTableQ31 : arm_sin_cos_q31.c , arm_sin_q31.c
  • snr : arm_convolution_example_f32.c , arm_fir_example_f32.c , arm_graphic_equalizer_example_q31.c , arm_matrix_example_f32.c
  • snr1 : arm_linear_interp_example_f32.c
  • snr2 : arm_linear_interp_example_f32.c
  • SNR_THRESHOLD : arm_matrix_example_f32.c , arm_linear_interp_example_f32.c , arm_convolution_example_f32.c
  • SNR_THRESHOLD_F32 : arm_fir_example_f32.c , arm_graphic_equalizer_example_q31.c
  • srcA_buf_f32 : arm_dotproduct_example_f32.c
  • srcALen : arm_convolution_example_f32.c
  • srcB_buf_f32 : arm_dotproduct_example_f32.c
  • srcBLen : arm_convolution_example_f32.c
  • status : arm_dotproduct_example_f32.c , arm_sin_cos_example_f32.c
  • std : arm_class_marks_example_f32.c
  • student_num : arm_class_marks_example_f32.c
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
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  • Globals
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  • Functions
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  • Enumerations
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  • x
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- t -

  • TABLE_SIZE : arm_math.h
  • TABLE_SPACING_Q15 : arm_math.h
  • TABLE_SPACING_Q31 : arm_math.h
  • TEST_LENGTH_SAMPLES : arm_class_marks_example_f32.c , arm_signal_converge_example_f32.c , arm_fir_example_f32.c , arm_fft_bin_example_f32.c , arm_linear_interp_example_f32.c
  • test_signal_converge() : arm_signal_converge_example_f32.c
  • test_signal_converge_example() : arm_signal_converge_example_f32.c
  • testIndex : arm_fft_bin_example_f32.c
  • testInput_f32 : arm_graphic_equalizer_example_q31.c , arm_signal_converge_example_f32.c , arm_sin_cos_example_f32.c , arm_variance_example_f32.c
  • testInput_f32_10khz : arm_fft_bin_example_f32.c
  • testInput_f32_1kHz_15kHz : arm_fir_example_f32.c
  • testInputA_f32 : arm_convolution_example_f32.c
  • testInputB_f32 : arm_convolution_example_f32.c
  • testInputSin_f32 : arm_linear_interp_example_f32.c
  • TESTLENGTH : arm_graphic_equalizer_example_q31.c
  • testLinIntOutput : arm_linear_interp_example_f32.c
  • testMarks_f32 : arm_class_marks_example_f32.c
  • testOutput : arm_linear_interp_example_f32.c , arm_fft_bin_example_f32.c , arm_sin_cos_example_f32.c , arm_fir_example_f32.c , arm_class_marks_example_f32.c , arm_dotproduct_example_f32.c , arm_graphic_equalizer_example_q31.c
  • testRefOutput_f32 : arm_graphic_equalizer_example_q31.c , arm_convolution_example_f32.c , arm_sin_cos_example_f32.c
  • testRefSinOutput32_f32 : arm_linear_interp_example_f32.c
  • testUnity_f32 : arm_class_marks_example_f32.c
  • twiddleCoef : arm_cfft_radix4_init_f32.c
  • twiddleCoefQ15 : arm_cfft_radix4_init_q15.c
  • twiddleCoefQ31 : arm_cfft_radix4_init_q31.c
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CMSIS DSP Software Library: Data Fields

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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- u -

  • USE_STATIC_INIT : arm_class_marks_example_f32.c
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CMSIS DSP Software Library: Data Fields

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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- v -

  • var : arm_class_marks_example_f32.c
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CMSIS DSP Software Library: Data Fields

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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- w -

  • Weights_128 : arm_dct4_init_f32.c
  • Weights_2048 : arm_dct4_init_f32.c
  • Weights_512 : arm_dct4_init_f32.c
  • WeightsQ15_128 : arm_dct4_init_q15.c
  • WeightsQ15_2048 : arm_dct4_init_q15.c
  • WeightsQ15_512 : arm_dct4_init_q15.c
  • WeightsQ31_128 : arm_dct4_init_q31.c
  • WeightsQ31_2048 : arm_dct4_init_q31.c
  • WeightsQ31_512 : arm_dct4_init_q31.c
  • wire1 : arm_signal_converge_example_f32.c , arm_variance_example_f32.c
  • wire2 : arm_variance_example_f32.c , arm_signal_converge_example_f32.c
  • wire3 : arm_signal_converge_example_f32.c , arm_variance_example_f32.c
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CMSIS DSP Software Library: Data Fields

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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- x -

  • X_f32 : arm_matrix_example_f32.c
  • xRef_f32 : arm_matrix_example_f32.c
  • XSPACING : arm_linear_interp_example_f32.c
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CMSIS DSP Software Library: Data Fields

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- _ -

  • __CMSIS_GENERIC : arm_math.h
  • __PACKq7 : arm_math.h
  • __SIMD32 : arm_math.h

- b -

  • BLOCK_SIZE : arm_fir_example_f32.c
  • BLOCKSIZE : arm_signal_converge_example_f32.c , arm_graphic_equalizer_example_q31.c

- d -

  • DELTA : arm_convolution_example_f32.c , arm_dotproduct_example_f32.c , arm_variance_example_f32.c , arm_sin_cos_example_f32.c
  • DELTA_COEFF : arm_signal_converge_example_f32.c
  • DELTA_ERROR : arm_signal_converge_example_f32.c
  • DELTA_Q15 : arm_math.h
  • DELTA_Q31 : arm_math.h

- i -

  • INDEX_MASK : arm_math.h
  • INPUT_SPACING : arm_math.h

- m -

  • MAX_BLOCKSIZE : arm_convolution_example_f32.c , arm_dotproduct_example_f32.c , arm_variance_example_f32.c , arm_sin_cos_example_f32.c
  • MU : arm_signal_converge_example_f32.c

- n -

  • NUM_TAPS : arm_fir_example_f32.c
  • NUMBLOCKS : arm_graphic_equalizer_example_q31.c
  • NUMFRAMES : arm_signal_converge_example_f32.c
  • NUMSTAGES : arm_graphic_equalizer_example_q31.c
  • NUMSTUDENTS : arm_class_marks_example_f32.c
  • NUMSUBJECTS : arm_class_marks_example_f32.c
  • NUMTAPS : arm_signal_converge_example_f32.c

- p -

  • PI : arm_math.h

- s -

  • SNR_THRESHOLD : arm_convolution_example_f32.c , arm_linear_interp_example_f32.c , arm_matrix_example_f32.c
  • SNR_THRESHOLD_F32 : arm_fir_example_f32.c , arm_graphic_equalizer_example_q31.c

- t -

  • TABLE_SIZE : arm_math.h
  • TABLE_SPACING_Q15 : arm_math.h
  • TABLE_SPACING_Q31 : arm_math.h
  • TEST_LENGTH_SAMPLES : arm_linear_interp_example_f32.c , arm_class_marks_example_f32.c , arm_fir_example_f32.c , arm_signal_converge_example_f32.c , arm_fft_bin_example_f32.c
  • TESTLENGTH : arm_graphic_equalizer_example_q31.c

- u -

  • USE_STATIC_INIT : arm_class_marks_example_f32.c

- x -

  • XSPACING : arm_linear_interp_example_f32.c
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CMSIS DSP Software Library: Data Fields

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  • arm_status : arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

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  • ARM_MATH_ARGUMENT_ERROR : arm_math.h
  • ARM_MATH_LENGTH_ERROR : arm_math.h
  • ARM_MATH_NANINF : arm_math.h
  • ARM_MATH_SINGULAR : arm_math.h
  • ARM_MATH_SIZE_MISMATCH : arm_math.h
  • ARM_MATH_SUCCESS : arm_math.h
  • ARM_MATH_TEST_FAILURE : arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
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  • a
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- a -

  • arm_abs_f32() : arm_abs_f32.c , arm_math.h
  • arm_abs_q15() : arm_math.h , arm_abs_q15.c
  • arm_abs_q31() : arm_abs_q31.c , arm_math.h
  • arm_abs_q7() : arm_math.h , arm_abs_q7.c
  • arm_add_f32() : arm_add_f32.c , arm_math.h
  • arm_add_q15() : arm_add_q15.c , arm_math.h
  • arm_add_q31() : arm_add_q31.c , arm_math.h
  • arm_add_q7() : arm_math.h , arm_add_q7.c
  • arm_bilinear_interp_f32() : arm_math.h
  • arm_bilinear_interp_q15() : arm_math.h
  • arm_bilinear_interp_q31() : arm_math.h
  • arm_bilinear_interp_q7() : arm_math.h
  • arm_biquad_cas_df1_32x64_init_q31() : arm_biquad_cascade_df1_32x64_init_q31.c , arm_math.h
  • arm_biquad_cas_df1_32x64_q31() : arm_biquad_cascade_df1_32x64_q31.c , arm_math.h
  • arm_biquad_cascade_df1_f32() : arm_biquad_cascade_df1_f32.c , arm_math.h
  • arm_biquad_cascade_df1_fast_q15() : arm_biquad_cascade_df1_fast_q15.c , arm_math.h
  • arm_biquad_cascade_df1_fast_q31() : arm_biquad_cascade_df1_fast_q31.c , arm_math.h
  • arm_biquad_cascade_df1_init_f32() : arm_math.h , arm_biquad_cascade_df1_init_f32.c
  • arm_biquad_cascade_df1_init_q15() : arm_biquad_cascade_df1_init_q15.c , arm_math.h
  • arm_biquad_cascade_df1_init_q31() : arm_biquad_cascade_df1_init_q31.c , arm_math.h
  • arm_biquad_cascade_df1_q15() : arm_biquad_cascade_df1_q15.c , arm_math.h
  • arm_biquad_cascade_df1_q31() : arm_biquad_cascade_df1_q31.c , arm_math.h
  • arm_biquad_cascade_df2T_f32() : arm_biquad_cascade_df2T_f32.c , arm_math.h
  • arm_biquad_cascade_df2T_init_f32() : arm_biquad_cascade_df2T_init_f32.c , arm_math.h
  • arm_bitreversal_f32() : arm_cfft_radix4_f32.c , arm_math.h
  • arm_bitreversal_q15() : arm_cfft_radix4_q15.c , arm_math.h
  • arm_bitreversal_q31() : arm_cfft_radix4_q31.c , arm_math.h
  • arm_cfft_radix4_f32() : arm_cfft_radix4_f32.c , arm_math.h
  • arm_cfft_radix4_init_f32() : arm_cfft_radix4_init_f32.c , arm_math.h
  • arm_cfft_radix4_init_q15() : arm_cfft_radix4_init_q15.c , arm_math.h
  • arm_cfft_radix4_init_q31() : arm_cfft_radix4_init_q31.c , arm_math.h
  • arm_cfft_radix4_q15() : arm_cfft_radix4_q15.c , arm_math.h
  • arm_cfft_radix4_q31() : arm_cfft_radix4_q31.c , arm_math.h
  • arm_circularRead_f32() : arm_math.h
  • arm_circularRead_q15() : arm_math.h
  • arm_circularRead_q7() : arm_math.h
  • arm_circularWrite_f32() : arm_math.h
  • arm_circularWrite_q15() : arm_math.h
  • arm_circularWrite_q7() : arm_math.h
  • arm_clarke_f32() : arm_math.h
  • arm_clarke_q31() : arm_math.h
  • arm_cmplx_conj_f32() : arm_cmplx_conj_f32.c , arm_math.h
  • arm_cmplx_conj_q15() : arm_cmplx_conj_q15.c , arm_math.h
  • arm_cmplx_conj_q31() : arm_cmplx_conj_q31.c , arm_math.h
  • arm_cmplx_dot_prod_f32() : arm_cmplx_dot_prod_f32.c , arm_math.h
  • arm_cmplx_dot_prod_q15() : arm_cmplx_dot_prod_q15.c , arm_math.h
  • arm_cmplx_dot_prod_q31() : arm_cmplx_dot_prod_q31.c , arm_math.h
  • arm_cmplx_mag_f32() : arm_cmplx_mag_f32.c , arm_math.h
  • arm_cmplx_mag_q15() : arm_cmplx_mag_q15.c , arm_math.h
  • arm_cmplx_mag_q31() : arm_cmplx_mag_q31.c , arm_math.h
  • arm_cmplx_mag_squared_f32() : arm_cmplx_mag_squared_f32.c , arm_math.h
  • arm_cmplx_mag_squared_q15() : arm_cmplx_mag_squared_q15.c , arm_math.h
  • arm_cmplx_mag_squared_q31() : arm_cmplx_mag_squared_q31.c , arm_math.h
  • arm_cmplx_mult_cmplx_f32() : arm_cmplx_mult_cmplx_f32.c , arm_math.h
  • arm_cmplx_mult_cmplx_q15() : arm_cmplx_mult_cmplx_q15.c , arm_math.h
  • arm_cmplx_mult_cmplx_q31() : arm_cmplx_mult_cmplx_q31.c , arm_math.h
  • arm_cmplx_mult_real_f32() : arm_cmplx_mult_real_f32.c , arm_math.h
  • arm_cmplx_mult_real_q15() : arm_cmplx_mult_real_q15.c , arm_math.h
  • arm_cmplx_mult_real_q31() : arm_cmplx_mult_real_q31.c , arm_math.h
  • arm_conv_f32() : arm_conv_f32.c , arm_math.h
  • arm_conv_fast_q15() : arm_conv_fast_q15.c , arm_math.h
  • arm_conv_fast_q31() : arm_conv_fast_q31.c , arm_math.h
  • arm_conv_partial_f32() : arm_conv_partial_f32.c , arm_math.h
  • arm_conv_partial_fast_q15() : arm_conv_partial_fast_q15.c , arm_math.h
  • arm_conv_partial_fast_q31() : arm_conv_partial_fast_q31.c , arm_math.h
  • arm_conv_partial_q15() : arm_conv_partial_q15.c , arm_math.h
  • arm_conv_partial_q31() : arm_conv_partial_q31.c , arm_math.h
  • arm_conv_partial_q7() : arm_conv_partial_q7.c , arm_math.h
  • arm_conv_q15() : arm_conv_q15.c , arm_math.h
  • arm_conv_q31() : arm_math.h , arm_conv_q31.c
  • arm_conv_q7() : arm_conv_q7.c , arm_math.h
  • arm_copy_f32() : arm_copy_f32.c , arm_math.h
  • arm_copy_q15() : arm_copy_q15.c , arm_math.h
  • arm_copy_q31() : arm_copy_q31.c , arm_math.h
  • arm_copy_q7() : arm_copy_q7.c , arm_math.h
  • arm_correlate_f32() : arm_correlate_f32.c , arm_math.h
  • arm_correlate_fast_q15() : arm_correlate_fast_q15.c , arm_math.h
  • arm_correlate_fast_q31() : arm_correlate_fast_q31.c , arm_math.h
  • arm_correlate_q15() : arm_correlate_q15.c , arm_math.h
  • arm_correlate_q31() : arm_correlate_q31.c , arm_math.h
  • arm_correlate_q7() : arm_correlate_q7.c , arm_math.h
  • arm_cos_f32() : arm_cos_f32.c , arm_math.h
  • arm_cos_q15() : arm_cos_q15.c , arm_math.h
  • arm_cos_q31() : arm_cos_q31.c , arm_math.h
  • arm_dct4_f32() : arm_dct4_f32.c , arm_math.h
  • arm_dct4_init_f32() : arm_dct4_init_f32.c , arm_math.h
  • arm_dct4_init_q15() : arm_dct4_init_q15.c , arm_math.h
  • arm_dct4_init_q31() : arm_dct4_init_q31.c , arm_math.h
  • arm_dct4_q15() : arm_dct4_q15.c , arm_math.h
  • arm_dct4_q31() : arm_dct4_q31.c , arm_math.h
  • arm_dot_prod_f32() : arm_dot_prod_f32.c , arm_math.h
  • arm_dot_prod_q15() : arm_dot_prod_q15.c , arm_math.h
  • arm_dot_prod_q31() : arm_dot_prod_q31.c , arm_math.h
  • arm_dot_prod_q7() : arm_dot_prod_q7.c , arm_math.h
  • arm_fill_f32() : arm_fill_f32.c , arm_math.h
  • arm_fill_q15() : arm_fill_q15.c , arm_math.h
  • arm_fill_q31() : arm_fill_q31.c , arm_math.h
  • arm_fill_q7() : arm_fill_q7.c , arm_math.h
  • arm_fir_decimate_f32() : arm_fir_decimate_f32.c , arm_math.h
  • arm_fir_decimate_fast_q15() : arm_fir_decimate_fast_q15.c , arm_math.h
  • arm_fir_decimate_fast_q31() : arm_fir_decimate_fast_q31.c , arm_math.h
  • arm_fir_decimate_init_f32() : arm_fir_decimate_init_f32.c , arm_math.h
  • arm_fir_decimate_init_q15() : arm_fir_decimate_init_q15.c , arm_math.h
  • arm_fir_decimate_init_q31() : arm_fir_decimate_init_q31.c , arm_math.h
  • arm_fir_decimate_q15() : arm_fir_decimate_q15.c , arm_math.h
  • arm_fir_decimate_q31() : arm_fir_decimate_q31.c , arm_math.h
  • arm_fir_f32() : arm_fir_f32.c , arm_math.h
  • arm_fir_fast_q15() : arm_fir_fast_q15.c , arm_math.h
  • arm_fir_fast_q31() : arm_fir_fast_q31.c , arm_math.h
  • arm_fir_init_f32() : arm_fir_init_f32.c , arm_math.h
  • arm_fir_init_q15() : arm_fir_init_q15.c , arm_math.h
  • arm_fir_init_q31() : arm_fir_init_q31.c , arm_math.h
  • arm_fir_init_q7() : arm_fir_init_q7.c , arm_math.h
  • arm_fir_interpolate_f32() : arm_fir_interpolate_f32.c , arm_math.h
  • arm_fir_interpolate_init_f32() : arm_fir_interpolate_init_f32.c , arm_math.h
  • arm_fir_interpolate_init_q15() : arm_fir_interpolate_init_q15.c , arm_math.h
  • arm_fir_interpolate_init_q31() : arm_fir_interpolate_init_q31.c , arm_math.h
  • arm_fir_interpolate_q15() : arm_fir_interpolate_q15.c , arm_math.h
  • arm_fir_interpolate_q31() : arm_fir_interpolate_q31.c , arm_math.h
  • arm_fir_lattice_f32() : arm_fir_lattice_f32.c , arm_math.h
  • arm_fir_lattice_init_f32() : arm_fir_lattice_init_f32.c , arm_math.h
  • arm_fir_lattice_init_q15() : arm_fir_lattice_init_q15.c , arm_math.h
  • arm_fir_lattice_init_q31() : arm_fir_lattice_init_q31.c , arm_math.h
  • arm_fir_lattice_q15() : arm_fir_lattice_q15.c , arm_math.h
  • arm_fir_lattice_q31() : arm_fir_lattice_q31.c , arm_math.h
  • arm_fir_q15() : arm_fir_q15.c , arm_math.h
  • arm_fir_q31() : arm_fir_q31.c , arm_math.h
  • arm_fir_q7() : arm_fir_q7.c , arm_math.h
  • arm_fir_sparse_f32() : arm_fir_sparse_f32.c , arm_math.h
  • arm_fir_sparse_init_f32() : arm_fir_sparse_init_f32.c , arm_math.h
  • arm_fir_sparse_init_q15() : arm_fir_sparse_init_q15.c , arm_math.h
  • arm_fir_sparse_init_q31() : arm_fir_sparse_init_q31.c , arm_math.h
  • arm_fir_sparse_init_q7() : arm_fir_sparse_init_q7.c , arm_math.h
  • arm_fir_sparse_q15() : arm_math.h , arm_fir_sparse_q15.c
  • arm_fir_sparse_q31() : arm_fir_sparse_q31.c , arm_math.h
  • arm_fir_sparse_q7() : arm_fir_sparse_q7.c , arm_math.h
  • arm_float_to_q15() : arm_float_to_q15.c , arm_math.h
  • arm_float_to_q31() : arm_float_to_q31.c , arm_math.h
  • arm_float_to_q7() : arm_float_to_q7.c , arm_math.h
  • arm_iir_lattice_f32() : arm_iir_lattice_f32.c , arm_math.h
  • arm_iir_lattice_init_f32() : arm_iir_lattice_init_f32.c , arm_math.h
  • arm_iir_lattice_init_q15() : arm_iir_lattice_init_q15.c , arm_math.h
  • arm_iir_lattice_init_q31() : arm_iir_lattice_init_q31.c , arm_math.h
  • arm_iir_lattice_q15() : arm_iir_lattice_q15.c , arm_math.h
  • arm_iir_lattice_q31() : arm_iir_lattice_q31.c , arm_math.h
  • arm_inv_clarke_f32() : arm_math.h
  • arm_inv_clarke_q31() : arm_math.h
  • arm_inv_park_f32() : arm_math.h
  • arm_inv_park_q31() : arm_math.h
  • arm_linear_interp_f32() : arm_math.h
  • arm_linear_interp_q15() : arm_math.h
  • arm_linear_interp_q31() : arm_math.h
  • arm_linear_interp_q7() : arm_math.h
  • arm_lms_f32() : arm_math.h , arm_lms_f32.c
  • arm_lms_init_f32() : arm_lms_init_f32.c , arm_math.h
  • arm_lms_init_q15() : arm_lms_init_q15.c , arm_math.h
  • arm_lms_init_q31() : arm_lms_init_q31.c , arm_math.h
  • arm_lms_norm_f32() : arm_math.h , arm_lms_norm_f32.c
  • arm_lms_norm_init_f32() : arm_lms_norm_init_f32.c , arm_math.h
  • arm_lms_norm_init_q15() : arm_math.h , arm_lms_norm_init_q15.c
  • arm_lms_norm_init_q31() : arm_lms_norm_init_q31.c , arm_math.h
  • arm_lms_norm_q15() : arm_math.h , arm_lms_norm_q15.c
  • arm_lms_norm_q31() : arm_lms_norm_q31.c , arm_math.h
  • arm_lms_q15() : arm_lms_q15.c , arm_math.h
  • arm_lms_q31() : arm_lms_q31.c , arm_math.h
  • arm_mat_add_f32() : arm_math.h , arm_mat_add_f32.c
  • arm_mat_add_q15() : arm_mat_add_q15.c , arm_math.h
  • arm_mat_add_q31() : arm_math.h , arm_mat_add_q31.c
  • arm_mat_init_f32() : arm_mat_init_f32.c , arm_math.h
  • arm_mat_init_q15() : arm_math.h , arm_mat_init_q15.c
  • arm_mat_init_q31() : arm_mat_init_q31.c , arm_math.h
  • arm_mat_inverse_f32() : arm_mat_inverse_f32.c , arm_math.h
  • arm_mat_mult_f32() : arm_mat_mult_f32.c , arm_math.h
  • arm_mat_mult_fast_q15() : arm_math.h , arm_mat_mult_fast_q15.c
  • arm_mat_mult_fast_q31() : arm_mat_mult_fast_q31.c , arm_math.h
  • arm_mat_mult_q15() : arm_math.h , arm_mat_mult_q15.c
  • arm_mat_mult_q31() : arm_mat_mult_q31.c , arm_math.h
  • arm_mat_scale_f32() : arm_math.h , arm_mat_scale_f32.c
  • arm_mat_scale_q15() : arm_mat_scale_q15.c , arm_math.h
  • arm_mat_scale_q31() : arm_mat_scale_q31.c , arm_math.h
  • arm_mat_sub_f32() : arm_mat_sub_f32.c , arm_math.h
  • arm_mat_sub_q15() : arm_math.h , arm_mat_sub_q15.c
  • arm_mat_sub_q31() : arm_mat_sub_q31.c , arm_math.h
  • arm_mat_trans_f32() : arm_math.h , arm_mat_trans_f32.c
  • arm_mat_trans_q15() : arm_mat_trans_q15.c , arm_math.h
  • arm_mat_trans_q31() : arm_math.h , arm_mat_trans_q31.c
  • arm_max_f32() : arm_max_f32.c , arm_math.h
  • arm_max_q15() : arm_max_q15.c , arm_math.h
  • arm_max_q31() : arm_max_q31.c , arm_math.h
  • arm_max_q7() : arm_max_q7.c , arm_math.h
  • arm_mean_f32() : arm_mean_f32.c , arm_math.h
  • arm_mean_q15() : arm_mean_q15.c , arm_math.h
  • arm_mean_q31() : arm_math.h , arm_mean_q31.c
  • arm_mean_q7() : arm_mean_q7.c , arm_math.h
  • arm_min_f32() : arm_math.h , arm_min_f32.c
  • arm_min_q15() : arm_min_q15.c , arm_math.h
  • arm_min_q31() : arm_min_q31.c , arm_math.h
  • arm_min_q7() : arm_min_q7.c , arm_math.h
  • arm_mult_f32() : arm_math.h , arm_mult_f32.c
  • arm_mult_q15() : arm_mult_q15.c , arm_math.h
  • arm_mult_q31() : arm_mult_q31.c , arm_math.h
  • arm_mult_q7() : arm_mult_q7.c , arm_math.h
  • arm_negate_f32() : arm_negate_f32.c , arm_math.h
  • arm_negate_q15() : arm_negate_q15.c , arm_math.h
  • arm_negate_q31() : arm_math.h , arm_negate_q31.c
  • arm_negate_q7() : arm_negate_q7.c , arm_math.h
  • arm_offset_f32() : arm_math.h , arm_offset_f32.c
  • arm_offset_q15() : arm_offset_q15.c , arm_math.h
  • arm_offset_q31() : arm_math.h , arm_offset_q31.c
  • arm_offset_q7() : arm_offset_q7.c , arm_math.h
  • arm_park_f32() : arm_math.h
  • arm_park_q31() : arm_math.h
  • arm_pid_f32() : arm_math.h
  • arm_pid_init_f32() : arm_pid_init_f32.c , arm_math.h
  • arm_pid_init_q15() : arm_pid_init_q15.c , arm_math.h
  • arm_pid_init_q31() : arm_pid_init_q31.c , arm_math.h
  • arm_pid_q15() : arm_math.h
  • arm_pid_q31() : arm_math.h
  • arm_pid_reset_f32() : arm_pid_reset_f32.c , arm_math.h
  • arm_pid_reset_q15() : arm_pid_reset_q15.c , arm_math.h
  • arm_pid_reset_q31() : arm_pid_reset_q31.c , arm_math.h
  • arm_power_f32() : arm_power_f32.c , arm_math.h
  • arm_power_q15() : arm_math.h , arm_power_q15.c
  • arm_power_q31() : arm_power_q31.c , arm_math.h
  • arm_power_q7() : arm_power_q7.c , arm_math.h
  • arm_q15_to_float() : arm_math.h , arm_q15_to_float.c
  • arm_q15_to_q31() : arm_math.h , arm_q15_to_q31.c
  • arm_q15_to_q7() : arm_q15_to_q7.c , arm_math.h
  • arm_q31_to_float() : arm_q31_to_float.c , arm_math.h
  • arm_q31_to_q15() : arm_math.h , arm_q31_to_q15.c
  • arm_q31_to_q7() : arm_math.h , arm_q31_to_q7.c
  • arm_q7_to_float() : arm_q7_to_float.c , arm_math.h
  • arm_q7_to_q15() : arm_q7_to_q15.c , arm_math.h
  • arm_q7_to_q31() : arm_q7_to_q31.c , arm_math.h
  • arm_radix4_butterfly_f32() : arm_math.h , arm_cfft_radix4_f32.c
  • arm_radix4_butterfly_inverse_f32() : arm_cfft_radix4_f32.c , arm_math.h
  • arm_radix4_butterfly_inverse_q15() : arm_math.h , arm_cfft_radix4_q15.c
  • arm_radix4_butterfly_inverse_q31() : arm_math.h , arm_cfft_radix4_q31.c
  • arm_radix4_butterfly_q15() : arm_cfft_radix4_q15.c , arm_math.h
  • arm_radix4_butterfly_q31() : arm_math.h , arm_cfft_radix4_q31.c
  • arm_recip_q15() : arm_math.h
  • arm_recip_q31() : arm_math.h
  • arm_rfft_f32() : arm_math.h , arm_rfft_f32.c
  • arm_rfft_init_f32() : arm_math.h , arm_rfft_init_f32.c
  • arm_rfft_init_q15() : arm_rfft_init_q15.c , arm_math.h
  • arm_rfft_init_q31() : arm_rfft_init_q31.c , arm_math.h
  • arm_rfft_q15() : arm_rfft_q15.c , arm_math.h
  • arm_rfft_q31() : arm_math.h , arm_rfft_q31.c
  • arm_rms_f32() : arm_math.h , arm_rms_f32.c
  • arm_rms_q15() : arm_math.h , arm_rms_q15.c
  • arm_rms_q31() : arm_math.h , arm_rms_q31.c
  • arm_scale_f32() : arm_scale_f32.c , arm_math.h
  • arm_scale_q15() : arm_math.h , arm_scale_q15.c
  • arm_scale_q31() : arm_scale_q31.c , arm_math.h
  • arm_scale_q7() : arm_math.h , arm_scale_q7.c
  • arm_shift_q15() : arm_math.h , arm_shift_q15.c
  • arm_shift_q31() : arm_shift_q31.c , arm_math.h
  • arm_shift_q7() : arm_math.h , arm_shift_q7.c
  • arm_sin_cos_f32() : arm_sin_cos_f32.c , arm_math.h
  • arm_sin_cos_q31() : arm_math.h , arm_sin_cos_q31.c
  • arm_sin_f32() : arm_math.h , arm_sin_f32.c
  • arm_sin_q15() : arm_math.h , arm_sin_q15.c
  • arm_sin_q31() : arm_math.h , arm_sin_q31.c
  • arm_split_rfft_f32() : arm_rfft_f32.c
  • arm_split_rfft_q15() : arm_rfft_q15.c
  • arm_split_rfft_q31() : arm_rfft_q31.c
  • arm_split_rifft_f32() : arm_rfft_f32.c
  • arm_split_rifft_q15() : arm_rfft_q15.c
  • arm_split_rifft_q31() : arm_rfft_q31.c
  • arm_sqrt_f32() : arm_math.h
  • arm_sqrt_q15() : arm_sqrt_q15.c
  • arm_sqrt_q31() : arm_sqrt_q31.c
  • arm_std_f32() : arm_math.h , arm_std_f32.c
  • arm_std_q15() : arm_math.h , arm_std_q15.c
  • arm_std_q31() : arm_std_q31.c , arm_math.h
  • arm_sub_f32() : arm_sub_f32.c , arm_math.h
  • arm_sub_q15() : arm_sub_q15.c , arm_math.h
  • arm_sub_q31() : arm_sub_q31.c , arm_math.h
  • arm_sub_q7() : arm_math.h , arm_sub_q7.c
  • arm_var_f32() : arm_var_f32.c , arm_math.h
  • arm_var_q15() : arm_math.h , arm_var_q15.c
  • arm_var_q31() : arm_math.h , arm_var_q31.c
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • a
  • c
  • g
  • m
  • t

- m -

  • main() : arm_class_marks_example_f32.c , arm_convolution_example_f32.c , arm_variance_example_f32.c , arm_sin_cos_example_f32.c , arm_signal_converge_example_f32.c , arm_fir_example_f32.c , arm_linear_interp_example_f32.c , arm_graphic_equalizer_example_q31.c , arm_fft_bin_example_f32.c , arm_matrix_example_f32.c , arm_dotproduct_example_f32.c
  • mult32x64() : arm_math.h
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • a
  • c
  • g
  • m
  • t

- c -

  • clip_q31_to_q15() : arm_math.h
  • clip_q31_to_q7() : arm_math.h
  • clip_q63_to_q15() : arm_math.h
  • clip_q63_to_q31() : arm_math.h
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • a
  • c
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  • t

- g -

  • getinput() : arm_signal_converge_example_f32.c
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • a
  • c
  • g
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  • t

- t -

  • test_signal_converge() : arm_signal_converge_example_f32.c
  • test_signal_converge_example() : arm_signal_converge_example_f32.c
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • float32_t : arm_math.h
  • float64_t : arm_math.h
  • q15_t : arm_math.h
  • q31_t : arm_math.h
  • q63_t : arm_math.h
  • q7_t : arm_math.h
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Data Fields

  • Examples
  • File List
  • Globals
  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • i
  • l
  • m
  • n
  • o
  • r
  • s
  • t
  • v
  • w
  • x

- a -

  • A_f32 : arm_matrix_example_f32.c
  • Ak : arm_convolution_example_f32.c
  • arm_linear_interep_table : arm_linear_interp_example_f32.c
  • armBitRevTable : arm_common_tables.c
  • armRecipTableQ15 : arm_common_tables.c
  • armRecipTableQ31 : arm_common_tables.c
  • AT_f32 : arm_matrix_example_f32.c
  • ATMA_f32 : arm_matrix_example_f32.c
  • ATMAI_f32 : arm_matrix_example_f32.c
  • AxB : arm_convolution_example_f32.c

- b -

  • B_f32 : arm_matrix_example_f32.c
  • biquadStateBand1Q31 : arm_graphic_equalizer_example_q31.c
  • biquadStateBand2Q31 : arm_graphic_equalizer_example_q31.c
  • biquadStateBand3Q31 : arm_graphic_equalizer_example_q31.c
  • biquadStateBand4Q31 : arm_graphic_equalizer_example_q31.c
  • biquadStateBand5Q31 : arm_graphic_equalizer_example_q31.c
  • Bk : arm_convolution_example_f32.c
  • blockSize : arm_variance_example_f32.c , arm_sin_cos_example_f32.c , arm_fir_example_f32.c

- c -

  • coeffTable : arm_graphic_equalizer_example_q31.c
  • cos_factors_128 : arm_dct4_init_f32.c
  • cos_factors_2048 : arm_dct4_init_f32.c
  • cos_factors_512 : arm_dct4_init_f32.c
  • cos_factorsQ15_128 : arm_dct4_init_q15.c
  • cos_factorsQ15_2048 : arm_dct4_init_q15.c
  • cos_factorsQ15_512 : arm_dct4_init_q15.c
  • cos_factorsQ31_128 : arm_dct4_init_q31.c
  • cos_factorsQ31_2048 : arm_dct4_init_q31.c
  • cos_factorsQ31_512 : arm_dct4_init_q31.c
  • cosOutput : arm_sin_cos_example_f32.c
  • cosSquareOutput : arm_sin_cos_example_f32.c
  • cosTable : arm_cos_f32.c , arm_sin_cos_f32.c
  • cosTableQ15 : arm_cos_q15.c
  • cosTableQ31 : arm_sin_cos_q31.c , arm_cos_q31.c

- d -

  • doBitReverse : arm_fft_bin_example_f32.c

- e -

  • err_signal : arm_signal_converge_example_f32.c
  • errOutput : arm_signal_converge_example_f32.c

- f -

  • fftSize : arm_fft_bin_example_f32.c
  • FIRCoeff_f32 : arm_signal_converge_example_f32.c
  • firCoeffs32 : arm_fir_example_f32.c
  • firStateF32 : arm_fir_example_f32.c , arm_signal_converge_example_f32.c

- g -

  • gainDB : arm_graphic_equalizer_example_q31.c

- i -

  • ifftFlag : arm_fft_bin_example_f32.c
  • inputQ31 : arm_graphic_equalizer_example_q31.c

- l -

  • lmsNorm_instance : arm_signal_converge_example_f32.c
  • lmsNormCoeff_f32 : arm_signal_converge_example_f32.c
  • lmsStateF32 : arm_signal_converge_example_f32.c
  • LPF_instance : arm_signal_converge_example_f32.c

- m -

  • max_marks : arm_class_marks_example_f32.c
  • mean : arm_class_marks_example_f32.c
  • min_marks : arm_class_marks_example_f32.c
  • multOutput : arm_dotproduct_example_f32.c

- n -

  • numBlocks : arm_fir_example_f32.c
  • numStudents : arm_class_marks_example_f32.c
  • numSubjects : arm_class_marks_example_f32.c

- o -

  • outLen : arm_convolution_example_f32.c
  • outputQ31 : arm_graphic_equalizer_example_q31.c

- r -

  • realCoefA : arm_rfft_init_f32.c
  • realCoefAQ15 : arm_rfft_init_q15.c
  • realCoefAQ31 : arm_rfft_init_q31.c
  • realCoefB : arm_rfft_init_f32.c
  • realCoefBQ15 : arm_rfft_init_q15.c
  • realCoefBQ31 : arm_rfft_init_q31.c
  • refDotProdOut : arm_dotproduct_example_f32.c
  • refIndex : arm_fft_bin_example_f32.c
  • refOutput : arm_fir_example_f32.c
  • refVarianceOut : arm_variance_example_f32.c

- s -

  • sinOutput : arm_sin_cos_example_f32.c
  • sinSquareOutput : arm_sin_cos_example_f32.c
  • sinTable : arm_sin_f32.c , arm_sin_cos_f32.c
  • sinTableQ15 : arm_sin_q15.c
  • sinTableQ31 : arm_sin_cos_q31.c , arm_sin_q31.c
  • snr : arm_convolution_example_f32.c , arm_fir_example_f32.c , arm_graphic_equalizer_example_q31.c , arm_matrix_example_f32.c
  • snr1 : arm_linear_interp_example_f32.c
  • snr2 : arm_linear_interp_example_f32.c
  • srcA_buf_f32 : arm_dotproduct_example_f32.c
  • srcALen : arm_convolution_example_f32.c
  • srcB_buf_f32 : arm_dotproduct_example_f32.c
  • srcBLen : arm_convolution_example_f32.c
  • status : arm_sin_cos_example_f32.c , arm_dotproduct_example_f32.c
  • std : arm_class_marks_example_f32.c
  • student_num : arm_class_marks_example_f32.c

- t -

  • testIndex : arm_fft_bin_example_f32.c
  • testInput_f32 : arm_graphic_equalizer_example_q31.c , arm_sin_cos_example_f32.c , arm_variance_example_f32.c , arm_signal_converge_example_f32.c
  • testInput_f32_10khz : arm_fft_bin_example_f32.c
  • testInput_f32_1kHz_15kHz : arm_fir_example_f32.c
  • testInputA_f32 : arm_convolution_example_f32.c
  • testInputB_f32 : arm_convolution_example_f32.c
  • testInputSin_f32 : arm_linear_interp_example_f32.c
  • testLinIntOutput : arm_linear_interp_example_f32.c
  • testMarks_f32 : arm_class_marks_example_f32.c
  • testOutput : arm_fft_bin_example_f32.c , arm_fir_example_f32.c , arm_graphic_equalizer_example_q31.c , arm_linear_interp_example_f32.c , arm_sin_cos_example_f32.c , arm_class_marks_example_f32.c , arm_dotproduct_example_f32.c
  • testRefOutput_f32 : arm_graphic_equalizer_example_q31.c , arm_convolution_example_f32.c , arm_sin_cos_example_f32.c
  • testRefSinOutput32_f32 : arm_linear_interp_example_f32.c
  • testUnity_f32 : arm_class_marks_example_f32.c
  • twiddleCoef : arm_cfft_radix4_init_f32.c
  • twiddleCoefQ15 : arm_cfft_radix4_init_q15.c
  • twiddleCoefQ31 : arm_cfft_radix4_init_q31.c

- v -

  • var : arm_class_marks_example_f32.c

- w -

  • Weights_128 : arm_dct4_init_f32.c
  • Weights_2048 : arm_dct4_init_f32.c
  • Weights_512 : arm_dct4_init_f32.c
  • WeightsQ15_128 : arm_dct4_init_q15.c
  • WeightsQ15_2048 : arm_dct4_init_q15.c
  • WeightsQ15_512 : arm_dct4_init_q15.c
  • WeightsQ31_128 : arm_dct4_init_q31.c
  • WeightsQ31_2048 : arm_dct4_init_q31.c
  • WeightsQ31_512 : arm_dct4_init_q31.c
  • wire1 : arm_signal_converge_example_f32.c , arm_variance_example_f32.c
  • wire2 : arm_variance_example_f32.c , arm_signal_converge_example_f32.c
  • wire3 : arm_signal_converge_example_f32.c , arm_variance_example_f32.c

- x -

  • X_f32 : arm_matrix_example_f32.c
  • xRef_f32 : arm_matrix_example_f32.c
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Vector Absolute Value

  • Examples
Functions

Vector Absolute Value
[Basic Math Functions]

Functions

void | arm_abs_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | arm_abs_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_abs_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
void | arm_abs_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)

Detailed Description

Computes the absolute value of a vector on an element-by-element basis.

     pDst[n] = abs(pSrcA[n]),   0 <= n < blockSize.

The operation can be done in-place by setting the input and output pointers to the same buffer. There are separate functions for floating-point, Q7, Q15, and Q31 data types.

Function Documentation

void arm_abs_f32 | ( | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Floating-point vector absolute value.

Parameters:
[in] | *pSrc | points to the input buffer
[out] | *pDst | points to the output buffer
[in] | blockSize | number of samples in each vector
Returns:
none.
Examples:
arm_signal_converge_example_f32.c.

Definition at line 66 of file arm_abs_f32.c.

void arm_abs_q31 | ( | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q31 vector absolute value.

Parameters:
[in] | *pSrc | points to the input buffer
[out] | *pDst | points to the output buffer
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.

Definition at line 58 of file arm_abs_q31.c.

void arm_abs_q15 | ( | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q15 vector absolute value.

Parameters:
[in] | *pSrc | points to the input buffer
[out] | *pDst | points to the output buffer
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.

Definition at line 57 of file arm_abs_q15.c.

void arm_abs_q7 | ( | q7_t * | pSrc,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q7 vector absolute value.

Parameters:
[in] | *pSrc | points to the input buffer
[out] | *pDst | points to the output buffer
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.

Definition at line 57 of file arm_abs_q7.c.

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CMSIS DSP Software Library: Vector Addition

  • Examples
Functions

Vector Addition
[Basic Math Functions]

Functions

void | arm_add_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
void | arm_add_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
void | arm_add_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
void | arm_add_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)

Detailed Description

Element-by-element addition of two vectors.

     pDst[n] = pSrcA[n] + pSrcB[n],   0 <= n < blockSize.

There are separate functions for floating-point, Q7, Q15, and Q31 data types.

Function Documentation

void arm_add_f32 | ( | float32_t * | pSrcA,
 |  | float32_t * | pSrcB,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Floating-point vector addition.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.
Examples:
arm_dotproduct_example_f32.c, and arm_sin_cos_example_f32.c.

Definition at line 65 of file arm_add_f32.c.

void arm_add_q31 | ( | q31_t * | pSrcA,
 |  | q31_t * | pSrcB,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q31 vector addition.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.

Definition at line 59 of file arm_add_q31.c.

void arm_add_q15 | ( | q15_t * | pSrcA,
 |  | q15_t * | pSrcB,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q15 vector addition.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.

Definition at line 58 of file arm_add_q15.c.

void arm_add_q7 | ( | q7_t * | pSrcA,
 |  | q7_t * | pSrcB,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q7 vector addition.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.

Definition at line 58 of file arm_add_q7.c.

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CMSIS DSP Software Library: Vector Multiplication

  • Examples
Functions

Vector Multiplication
[Basic Math Functions]

Functions

void | arm_mult_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
void | arm_mult_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
void | arm_mult_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
void | arm_mult_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)

Detailed Description

Element-by-element multiplication of two vectors.

     pDst[n] = pSrcA[n] * pSrcB[n],   0 <= n < blockSize.

There are separate functions for floating-point, Q7, Q15, and Q31 data types.

Function Documentation

void arm_mult_f32 | ( | float32_t * | pSrcA,
 |  | float32_t * | pSrcB,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Floating-point vector multiplication.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.
Examples:
arm_dotproduct_example_f32.c, arm_sin_cos_example_f32.c, and arm_variance_example_f32.c.

Definition at line 68 of file arm_mult_f32.c.

void arm_mult_q31 | ( | q31_t * | pSrcA,
 |  | q31_t * | pSrcB,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q31 vector multiplication.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.

Definition at line 61 of file arm_mult_q31.c.

void arm_mult_q15 | ( | q15_t * | pSrcA,
 |  | q15_t * | pSrcB,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q15 vector multiplication.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.

Definition at line 62 of file arm_mult_q15.c.

void arm_mult_q7 | ( | q7_t * | pSrcA,
 |  | q7_t * | pSrcB,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q7 vector multiplication.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.

Definition at line 64 of file arm_mult_q7.c.

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CMSIS DSP Software Library: Vector Subtraction

  • Examples
Functions

Vector Subtraction
[Basic Math Functions]

Functions

void | arm_sub_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
void | arm_sub_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
void | arm_sub_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
void | arm_sub_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)

Detailed Description

Element-by-element subtraction of two vectors.

     pDst[n] = pSrcA[n] - pSrcB[n],   0 <= n < blockSize.

There are separate functions for floating-point, Q7, Q15, and Q31 data types.

Function Documentation

void arm_sub_f32 | ( | float32_t * | pSrcA,
 |  | float32_t * | pSrcB,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Floating-point vector subtraction.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.
Examples:
arm_signal_converge_example_f32.c, and arm_variance_example_f32.c.

Definition at line 66 of file arm_sub_f32.c.

void arm_sub_q31 | ( | q31_t * | pSrcA,
 |  | q31_t * | pSrcB,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q31 vector subtraction.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.

Definition at line 58 of file arm_sub_q31.c.

void arm_sub_q15 | ( | q15_t * | pSrcA,
 |  | q15_t * | pSrcB,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q15 vector subtraction.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.

Definition at line 58 of file arm_sub_q15.c.

void arm_sub_q7 | ( | q7_t * | pSrcA,
 |  | q7_t * | pSrcB,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Q7 vector subtraction.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.

Definition at line 58 of file arm_sub_q7.c.

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CMSIS DSP Software Library: Bilinear Interpolation

  • Examples
Functions

Bilinear Interpolation
[Interpolation Functions]

Functions

static __INLINE float32_t | arm_bilinear_interp_f32 (const arm_bilinear_interp_instance_f32 *S, float32_t X, float32_t Y)
static __INLINE q31_t | arm_bilinear_interp_q31 (arm_bilinear_interp_instance_q31 *S, q31_t X, q31_t Y)
static __INLINE q15_t | arm_bilinear_interp_q15 (arm_bilinear_interp_instance_q15 *S, q31_t X, q31_t Y)
static __INLINE q7_t | arm_bilinear_interp_q7 (arm_bilinear_interp_instance_q7 *S, q31_t X, q31_t Y)

Detailed Description

Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid. The underlying function f(x, y) is sampled on a regular grid and the interpolation process determines values between the grid points. Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension. Bilinear interpolation is often used in image processing to rescale images. The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types.

Algorithm

The instance structure used by the bilinear interpolation functions describes a two dimensional data table. For floating-point, the instance structure is defined as:
   typedef struct
   {
     uint16_t numRows;
     uint16_t numCols;
     float32_t *pData;
 } arm_bilinear_interp_instance_f32;
where numRows specifies the number of rows in the table; numCols specifies the number of columns in the table; and pData points to an array of size numRows*numCols values. The data table pTable is organized in row order and the supplied data values fall on integer indexes. That is, table element (x,y) is located at pTable[x + y*numCols] where x and y are integers.
Let (x, y) specify the desired interpolation point. Then define:
     XF = floor(x)
     YF = floor(y)
The interpolated output point is computed as:
  f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
           + f(XF+1, YF) * (x-XF)*(1-(y-YF))
           + f(XF, YF+1) * (1-(x-XF))*(y-YF)
           + f(XF+1, YF+1) * (x-XF)*(y-YF)
Note that the coordinates (x, y) contain integer and fractional components. The integer components specify which portion of the table to use while the fractional components control the interpolation processor.
if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.

Function Documentation

static __INLINE float32_t arm_bilinear_interp_f32 | ( | const arm_bilinear_interp_instance_f32 * | S,
 |  | float32_t | X,
 |  | float32_t | Y
 | ) |  | [static]

Floating-point bilinear interpolation.

Parameters:
[in,out] | *S | points to an instance of the interpolation structure.
[in] | X | interpolation coordinate.
[in] | Y | interpolation coordinate.
Returns:
out interpolated value.

Definition at line 6739 of file arm_math.h.

static __INLINE q31_t arm_bilinear_interp_q31 | ( | arm_bilinear_interp_instance_q31 * | S,
 |  | q31_t | X,
 |  | q31_t | Y
 | ) |  | [static]

Q31 bilinear interpolation.

Parameters:
[in,out] | *S | points to an instance of the interpolation structure.
[in] | X | interpolation coordinate in 12.20 format.
[in] | Y | interpolation coordinate in 12.20 format.
Returns:
out interpolated value.

Definition at line 6806 of file arm_math.h.

static __INLINE q15_t arm_bilinear_interp_q15 | ( | arm_bilinear_interp_instance_q15 * | S,
 |  | q31_t | X,
 |  | q31_t | Y
 | ) |  | [static]

Q15 bilinear interpolation.

Parameters:
[in,out] | *S | points to an instance of the interpolation structure.
[in] | X | interpolation coordinate in 12.20 format.
[in] | Y | interpolation coordinate in 12.20 format.
Returns:
out interpolated value.

Definition at line 6882 of file arm_math.h.

static __INLINE q7_t arm_bilinear_interp_q7 | ( | arm_bilinear_interp_instance_q7 * | S,
 |  | q31_t | X,
 |  | q31_t | Y
 | ) |  | [static]

Q7 bilinear interpolation.

Parameters:
[in,out] | *S | points to an instance of the interpolation structure.
[in] | X | interpolation coordinate in 12.20 format.
[in] | Y | interpolation coordinate in 12.20 format.
Returns:
out interpolated value.

Definition at line 6962 of file arm_math.h.

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CMSIS DSP Software Library: Biquad Cascade IIR Filters Using Direct Form I Structure

  • Examples
Functions

Biquad Cascade IIR Filters Using Direct Form I Structure
[Filtering Functions]

Functions

void | arm_biquad_cascade_df1_init_f32 (arm_biquad_casd_df1_inst_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
void | arm_biquad_cascade_df1_f32 (const arm_biquad_casd_df1_inst_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | arm_biquad_cascade_df1_init_q31 (arm_biquad_casd_df1_inst_q31 *S, uint8_t numStages, q31_t *pCoeffs, q31_t *pState, int8_t postShift)
void | arm_biquad_cascade_df1_q31 (const arm_biquad_casd_df1_inst_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_biquad_cascade_df1_fast_q31 (const arm_biquad_casd_df1_inst_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_biquad_cascade_df1_init_q15 (arm_biquad_casd_df1_inst_q15 *S, uint8_t numStages, q15_t *pCoeffs, q15_t *pState, int8_t postShift)
void | arm_biquad_cascade_df1_q15 (const arm_biquad_casd_df1_inst_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
void | arm_biquad_cascade_df1_fast_q15 (const arm_biquad_casd_df1_inst_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)

Detailed Description

This set of functions implements arbitrary order recursive (IIR) filters. The filters are implemented as a cascade of second order Biquad sections. The functions support Q15, Q31 and floating-point data types. Fast version of Q15 and Q31 also supported on CortexM4 and Cortex-M3.

The functions operate on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc points to the array of input data and pDst points to the array of output data. Both arrays contain blockSize values.

Algorithm
Each Biquad stage implements a second order filter using the difference equation:

     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.

Single Biquad filter stage

Coefficients b0, b1 and b2 multiply the input signal x[n] and are referred to as the feedforward coefficients. Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients. Pay careful attention to the sign of the feedback coefficients. Some design tools use the difference equation

     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.
Higher order filters are realized as a cascade of second order sections. numStages refers to the number of second order stages used. For example, an 8th order filter would be realized with numStages=4 second order stages.

8th order filter using a cascade of Biquad stages

A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).
The pState points to state variables array. Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. The state variables are arranged in the pState array as:

     {x[n-1], x[n-2], y[n-1], y[n-2]}
The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of 4*numStages values. The state variables are updated after each block of data is processed, the coefficients are untouched.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. There are separate instance structure declarations for each of the 3 supported data types.
Init Functions
There is also an associated initialization function for each data type. The initialization function performs following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. The code below statically initializes each of the 3 different data type filter instance structures

     arm_biquad_casd_df1_inst_f32 S1 = {numStages, pState, pCoeffs};
     arm_biquad_casd_df1_inst_q15 S2 = {numStages, pState, pCoeffs, postShift};
     arm_biquad_casd_df1_inst_q31 S3 = {numStages, pState, pCoeffs, postShift};
where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer; pCoeffs is the address of the coefficient buffer; postShift shift to be applied.
Fixed-Point Behavior
Care must be taken when using the Q15 and Q31 versions of the Biquad Cascade filter functions. Following issues must be considered:
  • Scaling of coefficients
  • Filter gain
  • Overflow and saturation
Scaling of coefficients: Filter coefficients are represented as fractional values and coefficients are restricted to lie in the range [-1 +1). The fixed-point functions have an additional scaling parameter postShift which allow the filter coefficients to exceed the range [+1 -1). At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.

Fixed-point Biquad with shift by postShift bits after accumulator

This essentially scales the filter coefficients by 2^postShift. For example, to realize the coefficients

    {1.5, -0.8, 1.2, 1.6, -0.9}
set the pCoeffs array to:

    {0.75, -0.4, 0.6, 0.8, -0.45}
and set postShift=1
Filter gain: The frequency response of a Biquad filter is a function of its coefficients. It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies. This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter. To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.
Overflow and saturation: For Q15 and Q31 versions, it is described separately as part of the function specific documentation below.

Function Documentation

void arm_biquad_cascade_df1_init_f32 | ( | arm_biquad_casd_df1_inst_f32 * | S,
 |  | uint8_t | numStages,
 |  | float32_t * | pCoeffs,
 |  | float32_t * | pState
 | ) |  |

Initialization function for the floating-point Biquad cascade filter.

Parameters:
[in,out] | *S | points to an instance of the floating-point Biquad cascade structure.
[in] | numStages | number of 2nd order stages in the filter.
[in] | *pCoeffs | points to the filter coefficients array.
[in] | *pState | points to the state array.
Returns:
none

Coefficient and State Ordering:

The coefficients are stored in the array pCoeffs in the following order:

     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
where b1x and a1x are the coefficients for the first stage, b2x and a2x are the coefficients for the second stage, and so on. The pCoeffs array contains a total of 5*numStages values.
The pState is a pointer to state array. Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. The state variables are arranged in the pState array as:

     {x[n-1], x[n-2], y[n-1], y[n-2]}
The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of 4*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.

Definition at line 83 of file arm_biquad_cascade_df1_init_f32.c.

void arm_biquad_cascade_df1_f32 | ( | const arm_biquad_casd_df1_inst_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the floating-point Biquad cascade filter.

Parameters:
[in] | *S | points to an instance of the floating-point Biquad cascade structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Definition at line 171 of file arm_biquad_cascade_df1_f32.c.

void arm_biquad_cascade_df1_init_q31 | ( | arm_biquad_casd_df1_inst_q31 * | S,
 |  | uint8_t | numStages,
 |  | q31_t * | pCoeffs,
 |  | q31_t * | pState,
 |  | int8_t | postShift
 | ) |  |

Initialization function for the Q31 Biquad cascade filter.

Parameters:
[in,out] | *S | points to an instance of the Q31 Biquad cascade structure.
[in] | numStages | number of 2nd order stages in the filter.
[in] | *pCoeffs | points to the filter coefficients buffer.
[in] | *pState | points to the state buffer.
[in] | postShift | Shift to be applied after the accumulator. Varies according to the coefficients format
Returns:
none

Coefficient and State Ordering:

The coefficients are stored in the array pCoeffs in the following order:

     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
where b1x and a1x are the coefficients for the first stage, b2x and a2x are the coefficients for the second stage, and so on. The pCoeffs array contains a total of 5*numStages values.
The pState points to state variables array. Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. The state variables are arranged in the pState array as:

     {x[n-1], x[n-2], y[n-1], y[n-2]}
The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of 4*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.
Examples:
arm_graphic_equalizer_example_q31.c.

Definition at line 81 of file arm_biquad_cascade_df1_init_q31.c.

void arm_biquad_cascade_df1_q31 | ( | const arm_biquad_casd_df1_inst_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q31 Biquad cascade filter.

Parameters:
[in] | *S | points to an instance of the Q31 Biquad cascade structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25). After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by postShift bits and the result truncated to 1.31 format by discarding the low 32 bits.
Refer to the function arm_biquad_cascade_df1_fast_q31() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.
Examples:
arm_graphic_equalizer_example_q31.c.

Definition at line 69 of file arm_biquad_cascade_df1_q31.c.

void arm_biquad_cascade_df1_fast_q31 | ( | const arm_biquad_casd_df1_inst_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *S | points to an instance of the Q31 Biquad cascade structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are added to a 2.30 accumulator. Finally, the accumulator is saturated and converted to a 1.31 result. The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). Use the intialization function arm_biquad_cascade_df1_init_q31() to initialize filter structure.
Refer to the function arm_biquad_cascade_df1_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision. Both the slow and the fast versions use the same instance structure. Use the function arm_biquad_cascade_df1_init_q31() to initialize the filter structure.

Definition at line 70 of file arm_biquad_cascade_df1_fast_q31.c.

void arm_biquad_cascade_df1_init_q15 | ( | arm_biquad_casd_df1_inst_q15 * | S,
 |  | uint8_t | numStages,
 |  | q15_t * | pCoeffs,
 |  | q15_t * | pState,
 |  | int8_t | postShift
 | ) |  |

Initialization function for the Q15 Biquad cascade filter.

Parameters:
[in,out] | *S | points to an instance of the Q15 Biquad cascade structure.
[in] | numStages | number of 2nd order stages in the filter.
[in] | *pCoeffs | points to the filter coefficients.
[in] | *pState | points to the state buffer.
[in] | postShift | Shift to be applied to the accumulator result. Varies according to the coefficients format
Returns:
none

Coefficient and State Ordering:

The coefficients are stored in the array pCoeffs in the following order:

     {b10, 0, b11, b12, a11, a12, b20, 0, b21, b22, a21, a22, ...}
where b1x and a1x are the coefficients for the first stage, b2x and a2x are the coefficients for the second stage, and so on. The pCoeffs array contains a total of 6*numStages values. The zero coefficient between b1 and b2 facilities use of 16-bit SIMD instructions on the Cortex-M4.
The state variables are stored in the array pState. Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. The state variables are arranged in the pState array as:

     {x[n-1], x[n-2], y[n-1], y[n-2]}
The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of 4*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.

Definition at line 81 of file arm_biquad_cascade_df1_init_q15.c.

void arm_biquad_cascade_df1_q15 | ( | const arm_biquad_casd_df1_inst_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q15 Biquad cascade filter.

Parameters:
[in] | *S | points to an instance of the Q15 Biquad cascade structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the location where the output result is written.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. The accumulator is then shifted by postShift bits to truncate the result to 1.15 format by discarding the low 16 bits. Finally, the result is saturated to 1.15 format.
Refer to the function arm_biquad_cascade_df1_fast_q15() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.

Definition at line 70 of file arm_biquad_cascade_df1_q15.c.

void arm_biquad_cascade_df1_fast_q15 | ( | const arm_biquad_casd_df1_inst_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *S | points to an instance of the Q15 Biquad cascade structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). The 2.30 accumulator is then shifted by postShift bits and the result truncated to 1.15 format by discarding the low 16 bits.
Refer to the function arm_biquad_cascade_df1_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure. Use the function arm_biquad_cascade_df1_init_q15() to initialize the filter structure.

Definition at line 69 of file arm_biquad_cascade_df1_fast_q15.c.

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CMSIS DSP Software Library: High Precision Q31 Biquad Cascade Filter

  • Examples
Functions

High Precision Q31 Biquad Cascade Filter
[Filtering Functions]

Functions

void | arm_biquad_cas_df1_32x64_init_q31 (arm_biquad_cas_df1_32x64_ins_q31 *S, uint8_t numStages, q31_t *pCoeffs, q63_t *pState, uint8_t postShift)
void | arm_biquad_cas_df1_32x64_q31 (const arm_biquad_cas_df1_32x64_ins_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)

Detailed Description

This function implements a high precision Biquad cascade filter which operates on Q31 data values. The filter coefficients are in 1.31 format and the state variables are in 1.63 format. The double precision state variables reduce quantization noise in the filter and provide a cleaner output. These filters are particularly useful when implementing filters in which the singularities are close to the unit circle. This is common for low pass or high pass filters with very low cutoff frequencies.

The function operates on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc and pDst points to input and output arrays containing blockSize Q31 values.

Algorithm
Each Biquad stage implements a second order filter using the difference equation:

     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.

Single Biquad filter stage

Coefficients b0, b1, and b2 multiply the input signal x[n] and are referred to as the feedforward coefficients. Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients. Pay careful attention to the sign of the feedback coefficients. Some design tools use the difference equation

     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.
Higher order filters are realized as a cascade of second order sections. numStages refers to the number of second order stages used. For example, an 8th order filter would be realized with numStages=4 second order stages.

8th order filter using a cascade of Biquad stages

A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).
The pState points to state variables array . Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2] and each state variable in 1.63 format to improve precision. The state variables are arranged in the array as:

     {x[n-1], x[n-2], y[n-1], y[n-2]}
The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of 4*numStages values of data in 1.63 format. The state variables are updated after each block of data is processed; the coefficients are untouched.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
Init Function
There is also an associated initialization function which performs the following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. For example, to statically initialize the filter instance structure use

     arm_biquad_cas_df1_32x64_ins_q31 S1 = {numStages, pState, pCoeffs, postShift};
where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer; pCoeffs is the address of the coefficient buffer; postShift shift to be applied which is described in detail below.
Fixed-Point Behavior
Care must be taken while using Biquad Cascade 32x64 filter function. Following issues must be considered:
  • Scaling of coefficients
  • Filter gain
  • Overflow and saturation
Filter coefficients are represented as fractional values and restricted to lie in the range [-1 +1). The processing function has an additional scaling parameter postShift which allows the filter coefficients to exceed the range [+1 -1). At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.

Fixed-point Biquad with shift by postShift bits after accumulator

This essentially scales the filter coefficients by 2^postShift. For example, to realize the coefficients

    {1.5, -0.8, 1.2, 1.6, -0.9}
set the Coefficient array to:

    {0.75, -0.4, 0.6, 0.8, -0.45}
and set postShift=1
The second thing to keep in mind is the gain through the filter. The frequency response of a Biquad filter is a function of its coefficients. It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies. This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter. To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.
The third item to consider is the overflow and saturation behavior of the fixed-point Q31 version. This is described in the function specific documentation below.

Function Documentation

void arm_biquad_cas_df1_32x64_init_q31 | ( | arm_biquad_cas_df1_32x64_ins_q31 * | S,
 |  | uint8_t | numStages,
 |  | q31_t * | pCoeffs,
 |  | q63_t * | pState,
 |  | uint8_t | postShift
 | ) |  |
Parameters:
[in,out] | *S | points to an instance of the high precision Q31 Biquad cascade filter structure.
[in] | numStages | number of 2nd order stages in the filter.
[in] | *pCoeffs | points to the filter coefficients.
[in] | *pState | points to the state buffer.
[in] | postShift | Shift to be applied after the accumulator. Varies according to the coefficients format.
Returns:
none

Coefficient and State Ordering:

The coefficients are stored in the array pCoeffs in the following order:

     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
where b1x and a1x are the coefficients for the first stage, b2x and a2x are the coefficients for the second stage, and so on. The pCoeffs array contains a total of 5*numStages values.
The pState points to state variables array and size of each state variable is 1.63 format. Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. The state variables are arranged in the state array as:

     {x[n-1], x[n-2], y[n-1], y[n-2]}
The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of 4*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.
Examples:
arm_graphic_equalizer_example_q31.c.

Definition at line 77 of file arm_biquad_cascade_df1_32x64_init_q31.c.

void arm_biquad_cas_df1_32x64_q31 | ( | const arm_biquad_cas_df1_32x64_ins_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |
Parameters:
[in] | *S | points to an instance of the high precision Q31 Biquad cascade filter.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process.
Returns:
none.
The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25). After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by postShift bits and the result truncated to 1.31 format by discarding the low 32 bits.
Two related functions are provided in the CMSIS DSP library. arm_biquad_cascade_df1_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q63 accumulator. arm_biquad_cascade_df1_fast_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q31 accumulator.
Examples:
arm_graphic_equalizer_example_q31.c.

Definition at line 176 of file arm_biquad_cascade_df1_32x64_q31.c.

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CMSIS DSP Software Library: Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure

  • Examples
Functions

Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure
[Filtering Functions]

Functions

void | arm_biquad_cascade_df2T_init_f32 (arm_biquad_cascade_df2T_instance_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
void | arm_biquad_cascade_df2T_f32 (const arm_biquad_cascade_df2T_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)

Detailed Description

This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure. The filters are implemented as a cascade of second order Biquad sections. These functions provide a slight memory savings as compared to the direct form I Biquad filter functions. Only floating-point data is supported.

This function operate on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc points to the array of input data and pDst points to the array of output data. Both arrays contain blockSize values.

Algorithm
Each Biquad stage implements a second order filter using the difference equation:

    y[n] = b0 * x[n] + d1
    d1 = b1 * x[n] + a1 * y[n] + d2
    d2 = b2 * x[n] + a2 * y[n]
where d1 and d2 represent the two state values.
A Biquad filter using a transposed Direct Form II structure is shown below.

Single transposed Direct Form II Biquad

Coefficients b0, b1, and b2 multiply the input signal x[n] and are referred to as the feedforward coefficients. Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients. Pay careful attention to the sign of the feedback coefficients. Some design tools flip the sign of the feedback coefficients:

    y[n] = b0 * x[n] + d1;
    d1 = b1 * x[n] - a1 * y[n] + d2;
    d2 = b2 * x[n] - a2 * y[n];
In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.
Higher order filters are realized as a cascade of second order sections. numStages refers to the number of second order stages used. For example, an 8th order filter would be realized with numStages=4 second order stages. A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).
pState points to the state variable array. Each Biquad stage has 2 state variables d1 and d2. The state variables are arranged in the pState array as:

     {d11, d12, d21, d22, ...}
where d1x refers to the state variables for the first Biquad and d2x refers to the state variables for the second Biquad. The state array has a total length of 2*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.
The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II. The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types. That is why the Direct Form I structure supports Q15 and Q31 data types. The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables d1 and d2. Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad. The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
Init Functions
There is also an associated initialization function. The initialization function performs following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. For example, to statically initialize the instance structure use

     arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};
where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer. pCoeffs is the address of the coefficient buffer;

Function Documentation

void arm_biquad_cascade_df2T_init_f32 | ( | arm_biquad_cascade_df2T_instance_f32 * | S,
 |  | uint8_t | numStages,
 |  | float32_t * | pCoeffs,
 |  | float32_t * | pState
 | ) |  |

Initialization function for the floating-point transposed direct form II Biquad cascade filter.

Parameters:
[in,out] | *S | points to an instance of the filter data structure.
[in] | numStages | number of 2nd order stages in the filter.
[in] | *pCoeffs | points to the filter coefficients.
[in] | *pState | points to the state buffer.
Returns:
none

Coefficient and State Ordering:

The coefficients are stored in the array pCoeffs in the following order:

     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
where b1x and a1x are the coefficients for the first stage, b2x and a2x are the coefficients for the second stage, and so on. The pCoeffs array contains a total of 5*numStages values.
The pState is a pointer to state array. Each Biquad stage has 2 state variables d1, and d2. The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on. The state array has a total length of 2*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.

Definition at line 73 of file arm_biquad_cascade_df2T_init_f32.c.

void arm_biquad_cascade_df2T_f32 | ( | const arm_biquad_cascade_df2T_instance_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the floating-point transposed direct form II Biquad cascade filter.

Parameters:
[in] | *S | points to an instance of the filter data structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | blockSize | number of samples to process.
Returns:
none.

Definition at line 143 of file arm_biquad_cascade_df2T_f32.c.

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CMSIS DSP Software Library: Complex FFT Functions

  • Examples
Functions | Variables

Complex FFT Functions
[Transform Functions]

Functions

arm_status | arm_cfft_radix4_init_f32 (arm_cfft_radix4_instance_f32 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
void | arm_cfft_radix4_f32 (const arm_cfft_radix4_instance_f32 *S, float32_t *pSrc)
arm_status | arm_cfft_radix4_init_q31 (arm_cfft_radix4_instance_q31 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
void | arm_cfft_radix4_q31 (const arm_cfft_radix4_instance_q31 *S, q31_t *pSrc)
arm_status | arm_cfft_radix4_init_q15 (arm_cfft_radix4_instance_q15 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
void | arm_cfft_radix4_q15 (const arm_cfft_radix4_instance_q15 *S, q15_t *pSrc)

Variables

static const float32_t | twiddleCoef [2048]
static const q31_t | twiddleCoefQ31 [2048]
static const q15_t | twiddleCoefQ15 [2048]
const uint16_t | armBitRevTable [256]

Detailed Description

Complex Fast Fourier Transform(CFFT) and Complex Inverse Fast Fourier Transform(CIFFT) is an efficient algorithm to compute Discrete Fourier Transform(DFT) and Inverse Discrete Fourier Transform(IDFT). Computational complexity of CFFT reduces drastically when compared to DFT.
This set of functions implements CFFT/CIFFT for Q15, Q31, and floating-point data types. The functions operates on in-place buffer which uses same buffer for input and output. Complex input is stored in input buffer in an interleaved fashion.
The functions operate on blocks of input and output data and each call to the function processes 2*fftLen samples through the transform. pSrc points to In-place arrays containing 2*fftLen values.
The pSrc points to the array of in-place buffer of size 2*fftLen and inputs and outputs are stored in an interleaved fashion as shown below.
 {real[0], imag[0], real[1], imag[1],..}
Lengths supported by the transform:
Internally, the function utilize a radix-4 decimation in frequency(DIF) algorithm and the size of the FFT supported are of the lengths [16, 64, 256, 1024].
Algorithm:

Complex Fast Fourier Transform:

Input real and imaginary data:

 x(n) = xa + j * ya
 x(n+N/4 ) = xb + j * yb
 x(n+N/2 ) = xc + j * yc
 x(n+3N 4) = xd + j * yd
where N is length of FFT
Output real and imaginary data:

 X(4r) = xa'+ j * ya'
 X(4r+1) = xb'+ j * yb'
 X(4r+2) = xc'+ j * yc'
 X(4r+3) = xd'+ j * yd'
Twiddle factors for radix-4 FFT:

 Wn = co1 + j * (- si1)
 W2n = co2 + j * (- si2)
 W3n = co3 + j * (- si3)

Radix-4 Decimation-in Frequency Complex Fast Fourier Transform

Output from Radix-4 CFFT Results in Digit reversal order. Interchange middle two branches of every butterfly results in Bit reversed output.
Butterfly CFFT equations:

 xa' = xa + xb + xc + xd
 ya' = ya + yb + yc + yd
 xc' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)
 yc' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)
 xb' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)
 yb' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)
 xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)
 yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)

Complex Inverse Fast Fourier Transform:

CIFFT uses same twiddle factor table as CFFT with modifications in the design equation as shown below.
Modified Butterfly CIFFT equations:

 xa' = xa + xb + xc + xd
 ya' = ya + yb + yc + yd
 xc' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)
 yc' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)
 xb' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)
 yb' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)
 xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)
 yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)
Instance Structure
A separate instance structure must be defined for each Instance but the twiddle factors and bit reversal tables can be reused. There are separate instance structure declarations for each of the 3 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Initializes twiddle factor table and bit reversal table pointers
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Manually initialize the instance structure as follows:

arm_cfft_radix4_instance_f32 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor, onebyfftLen};
arm_cfft_radix4_instance_q31 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor};
arm_cfft_radix4_instance_q15 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor};
where fftLen length of CFFT/CIFFT; ifftFlag Flag for selection of CFFT or CIFFT(Set ifftFlag to calculate CIFFT otherwise calculates CFFT); bitReverseFlag Flag for selection of output order(Set bitReverseFlag to output in normal order otherwise output in bit reversed order); pTwiddlepoints to array of twiddle coefficients; pBitRevTable points to the array of bit reversal table. twidCoefModifier modifier for twiddle factor table which supports all FFT lengths with same table; pBitRevTable modifier for bit reversal table which supports all FFT lengths with same table. onebyfftLen value of 1/fftLen to calculate CIFFT;
Fixed-Point Behavior
Care must be taken when using the fixed-point versions of the CFFT/CIFFT function. Refer to the function specific documentation below for usage guidelines.

Function Documentation

arm_status arm_cfft_radix4_init_f32 | ( | arm_cfft_radix4_instance_f32 * | S,
 |  | uint16_t | fftLen,
 |  | uint8_t | ifftFlag,
 |  | uint8_t | bitReverseFlag
 | ) |  |

Initialization function for the floating-point CFFT/CIFFT.

Parameters:
[in,out] | *S | points to an instance of the floating-point CFFT/CIFFT structure.
[in] | fftLen | length of the FFT.
[in] | ifftFlag | flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
[in] | bitReverseFlag | flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
Returns:
The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.
Description:
The parameter ifftFlag controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
Examples:
arm_convolution_example_f32.c, and arm_fft_bin_example_f32.c.

Definition at line 1118 of file arm_cfft_radix4_init_f32.c.

void arm_cfft_radix4_f32 | ( | const arm_cfft_radix4_instance_f32 * | S,
 |  | float32_t * | pSrc
 | ) |  |

Processing function for the floating-point CFFT/CIFFT.

Parameters:
[in] | *S | points to an instance of the floating-point CFFT/CIFFT structure.
[in,out] | *pSrc | points to the complex data buffer of size 2*fftLen. Processing occurs in-place.
Returns:
none.
Examples:
arm_convolution_example_f32.c, and arm_fft_bin_example_f32.c.

Definition at line 177 of file arm_cfft_radix4_f32.c.

arm_status arm_cfft_radix4_init_q31 | ( | arm_cfft_radix4_instance_q31 * | S,
 |  | uint16_t | fftLen,
 |  | uint8_t | ifftFlag,
 |  | uint8_t | bitReverseFlag
 | ) |  |

Initialization function for the Q31 CFFT/CIFFT.

Parameters:
[in,out] | *S | points to an instance of the Q31 CFFT/CIFFT structure.
[in] | fftLen | length of the FFT.
[in] | ifftFlag | flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
[in] | bitReverseFlag | flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
Returns:
The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.
Description:
The parameter ifftFlag controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.

Definition at line 608 of file arm_cfft_radix4_init_q31.c.

void arm_cfft_radix4_q31 | ( | const arm_cfft_radix4_instance_q31 * | S,
 |  | q31_t * | pSrc
 | ) |  |

Processing function for the Q31 CFFT/CIFFT.

Parameters:
[in] | *S | points to an instance of the Q31 CFFT/CIFFT structure.
[in,out] | *pSrc | points to the complex data buffer of size 2*fftLen. Processing occurs in-place.
Returns:
none.
Input and output formats:
Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. Hence the output format is different for different FFT sizes. The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:

Input and Output Formats for Q31 CFFT

Input and Output Formats for Q31 CIFFT

Definition at line 66 of file arm_cfft_radix4_q31.c.

arm_status arm_cfft_radix4_init_q15 | ( | arm_cfft_radix4_instance_q15 * | S,
 |  | uint16_t | fftLen,
 |  | uint8_t | ifftFlag,
 |  | uint8_t | bitReverseFlag
 | ) |  |

Initialization function for the Q15 CFFT/CIFFT.

Parameters:
[in,out] | *S | points to an instance of the Q15 CFFT/CIFFT structure.
[in] | fftLen | length of the FFT.
[in] | ifftFlag | flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
[in] | bitReverseFlag | flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
Returns:
The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.
Description:
The parameter ifftFlag controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.

Definition at line 353 of file arm_cfft_radix4_init_q15.c.

void arm_cfft_radix4_q15 | ( | const arm_cfft_radix4_instance_q15 * | S,
 |  | q15_t * | pSrc
 | ) |  |

Processing function for the Q15 CFFT/CIFFT.

Parameters:
[in] | *S | points to an instance of the Q15 CFFT/CIFFT structure.
[in,out] | *pSrc | points to the complex data buffer. Processing occurs in-place.
Returns:
none.
Input and output formats:
Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. Hence the output format is different for different FFT sizes. The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:

Input and Output Formats for Q15 CFFT

Input and Output Formats for Q15 CIFFT

Definition at line 66 of file arm_cfft_radix4_q15.c.

Variable Documentation

const float32_t twiddleCoef[2048] [static]
Example code for Floating-point Twiddle factors Generation:
for(i = 0; i< N; i++)
 {
    twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
    twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
 }
where N = 1024 and PI = 3.14159265358979
Cos and Sin values are in interleaved fashion

Definition at line 70 of file arm_cfft_radix4_init_f32.c.

const q31_t twiddleCoefQ31[2048] [static]
Example code for Q31 Twiddle factors Generation::
for(i = 0; i< N; i++)
 {
    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
 }
where N = 1024 and PI = 3.14159265358979
Cos and Sin values are interleaved fashion
Convert Floating point to Q31(Fixed point 1.31): round(twiddleCoefQ31(i) * pow(2, 31))

Definition at line 71 of file arm_cfft_radix4_init_q31.c.

const q15_t twiddleCoefQ15[2048] [static]
Example code for Q15 Twiddle factors Generation::
for(i = 0; i< N; i++)
 {
    twiddleCoefQ15[2*i]= cos(i * 2*PI/(float)N);
    twiddleCoefQ15[2*i+1]= sin(i * 2*PI/(float)N);
 }
where N = 1024 and PI = 3.14159265358979
Cos and Sin values are interleaved fashion
Convert Floating point to Q15(Fixed point 1.15): round(twiddleCoefQ15(i) * pow(2, 15))

Definition at line 72 of file arm_cfft_radix4_init_q15.c.

const uint16_t armBitRevTable[256]
Pseudo code for Generation of Bit reversal Table is
for(l=1;l <= N/4;l++)
 {
   for(i=0;i<logN2;i++)
   {
     a[i]=l&(1<<i);
   }
   for(j=0; j<logN2; j++)
   {
     if (a[j]!=0)
     y[l]+=(1<<((logN2-1)-j));
   }
   y[l] = y[l] >> 1;
  }
where N = 1024 logN2 = 10
N is the maximum FFT Size supported

Definition at line 68 of file arm_common_tables.c.

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CMSIS DSP Software Library: Class Marks Example

  • Examples

Class Marks Example
[Examples]

Description:
Demonstrates the use the Maximum, Minimum, Mean, Standard Deviation, Variance and Matrix functions to calculate statistical values of marks obtained in a class.
Note:
This example also demonstrates the usage of static initialization.
Variables Description:
  • testMarks_f32 points to the marks scored by 20 students in 4 subjects
  • max_marks Maximum of all marks
  • min_marks Minimum of all marks
  • mean Mean of all marks
  • var Variance of the marks
  • std Standard deviation of the marks
  • numStudents Total number of students in the class
CMSIS DSP Software Library Functions Used:
  • arm_mat_init_f32()
  • arm_mat_mult_f32()
  • arm_max_f32()
  • arm_min_f32()
  • arm_mean_f32()
  • arm_std_f32()
  • arm_var_f32()

Refer arm_class_marks_example_f32.c

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CMSIS DSP Software Library: Complex-by-Complex Multiplication

  • Examples
Functions

Complex-by-Complex Multiplication
[Complex Math Functions]

Functions

void | arm_cmplx_mult_cmplx_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t numSamples)
void | arm_cmplx_mult_cmplx_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t numSamples)
void | arm_cmplx_mult_cmplx_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t numSamples)

Detailed Description

Multiplies a complex vector by another complex vector and generates a complex result. The data in the complex arrays is stored in an interleaved fashion (real, imag, real, imag, ...). The parameter numSamples represents the number of complex samples processed. The complex arrays have a total of 2*numSamples real values.

The underlying algorithm is used:

 for(n=0; n<numSamples; n++) {
     pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
     pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
 }

There are separate functions for floating-point, Q15, and Q31 data types.

Function Documentation

void arm_cmplx_mult_cmplx_f32 | ( | float32_t * | pSrcA,
 |  | float32_t * | pSrcB,
 |  | float32_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Floating-point complex-by-complex multiplication.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | numSamples | number of complex samples in each vector
Returns:
none.
Examples:
arm_convolution_example_f32.c.

Definition at line 73 of file arm_cmplx_mult_cmplx_f32.c.

void arm_cmplx_mult_cmplx_q31 | ( | q31_t * | pSrcA,
 |  | q31_t * | pSrcB,
 |  | q31_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Q31 complex-by-complex multiplication.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | numSamples | number of complex samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format. Input down scaling is not required.

Definition at line 56 of file arm_cmplx_mult_cmplx_q31.c.

void arm_cmplx_mult_cmplx_q15 | ( | q15_t * | pSrcA,
 |  | q15_t * | pSrcB,
 |  | q15_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Q15 complex-by-complex multiplication.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[out] | *pDst | points to the output vector
[in] | numSamples | number of complex samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.

Definition at line 54 of file arm_cmplx_mult_cmplx_q15.c.

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CMSIS DSP Software Library: Complex-by-Real Multiplication

  • Examples
Functions

Complex-by-Real Multiplication
[Complex Math Functions]

Functions

void | arm_cmplx_mult_real_f32 (float32_t *pSrcCmplx, float32_t *pSrcReal, float32_t *pCmplxDst, uint32_t numSamples)
void | arm_cmplx_mult_real_q31 (q31_t *pSrcCmplx, q31_t *pSrcReal, q31_t *pCmplxDst, uint32_t numSamples)
void | arm_cmplx_mult_real_q15 (q15_t *pSrcCmplx, q15_t *pSrcReal, q15_t *pCmplxDst, uint32_t numSamples)

Detailed Description

Multiplies a complex vector by a real vector and generates a complex result. The data in the complex arrays is stored in an interleaved fashion (real, imag, real, imag, ...). The parameter numSamples represents the number of complex samples processed. The complex arrays have a total of 2*numSamples real values while the real array has a total of numSamples real values.

The underlying algorithm is used:

 for(n=0; n<numSamples; n++) {
     pCmplxDst[(2*n)+0] = pSrcCmplx[(2*n)+0] * pSrcReal[n];
     pCmplxDst[(2*n)+1] = pSrcCmplx[(2*n)+1] * pSrcReal[n];
 }

There are separate functions for floating-point, Q15, and Q31 data types.

Function Documentation

void arm_cmplx_mult_real_f32 | ( | float32_t * | pSrcCmplx,
 |  | float32_t * | pSrcReal,
 |  | float32_t * | pCmplxDst,
 |  | uint32_t | numSamples
 | ) |  |

Floating-point complex-by-real multiplication.

Parameters:
[in] | *pSrcCmplx | points to the complex input vector
[in] | *pSrcReal | points to the real input vector
[out] | *pCmplxDst | points to the complex output vector
[in] | numSamples | number of samples in each vector
Returns:
none.

Definition at line 74 of file arm_cmplx_mult_real_f32.c.

void arm_cmplx_mult_real_q31 | ( | q31_t * | pSrcCmplx,
 |  | q31_t * | pSrcReal,
 |  | q31_t * | pCmplxDst,
 |  | uint32_t | numSamples
 | ) |  |

Q31 complex-by-real multiplication.

Parameters:
[in] | *pSrcCmplx | points to the complex input vector
[in] | *pSrcReal | points to the real input vector
[out] | *pCmplxDst | points to the complex output vector
[in] | numSamples | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.

Definition at line 56 of file arm_cmplx_mult_real_q31.c.

void arm_cmplx_mult_real_q15 | ( | q15_t * | pSrcCmplx,
 |  | q15_t * | pSrcReal,
 |  | q15_t * | pCmplxDst,
 |  | uint32_t | numSamples
 | ) |  |

Q15 complex-by-real multiplication.

Parameters:
[in] | *pSrcCmplx | points to the complex input vector
[in] | *pSrcReal | points to the real input vector
[out] | *pCmplxDst | points to the complex output vector
[in] | numSamples | number of samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.

Definition at line 56 of file arm_cmplx_mult_real_q15.c.

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CMSIS DSP Software Library: Convolution

  • Examples
Functions

Convolution
[Filtering Functions]

Functions

void | arm_conv_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst)
void | arm_conv_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
void | arm_conv_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
void | arm_conv_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
void | arm_conv_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
void | arm_conv_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst)

Detailed Description

Convolution is a mathematical operation that operates on two finite length vectors to generate a finite length output vector. Convolution is similar to correlation and is frequently used in filtering and data analysis. The CMSIS DSP library contains functions for convolving Q7, Q15, Q31, and floating-point data types. The library also provides fast versions of the Q15 and Q31 functions on Cortex-M4 and Cortex-M3.

Algorithm
Let a[n] and b[n] be sequences of length srcALen and srcBLen samples respectively. Then the convolution

                   c[n] = a[n] * b[n]
is defined as
Note that c[n] is of length srcALen + srcBLen - 1 and is defined over the interval n=0, 1, 2, ..., srcALen + srcBLen - 2. pSrcA points to the first input vector of length srcALen and pSrcB points to the second input vector of length srcBLen. The output result is written to pDst and the calling function must allocate srcALen+srcBLen-1 words for the result.
Conceptually, when two signals a[n] and b[n] are convolved, the signal b[n] slides over a[n]. For each offset n, the overlapping portions of a[n] and b[n] are multiplied and summed together.
Note that convolution is a commutative operation:

                   a[n] * b[n] = b[n] * a[n].
This means that switching the A and B arguments to the convolution functions has no effect.

Fixed-Point Behavior

Convolution requires summing up a large number of intermediate products. As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation. Refer to the function specific documentation below for further details of the particular algorithm used.

Function Documentation

void arm_conv_f32 | ( | float32_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | float32_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | float32_t * | pDst
 | ) |  |

Convolution of floating-point sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length srcALen+srcBLen-1.
Returns:
none.

Definition at line 103 of file arm_conv_f32.c.

void arm_conv_q31 | ( | q31_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q31_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q31_t * | pDst
 | ) |  |

Convolution of Q31 sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length srcALen+srcBLen-1.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
See arm_conv_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.

Definition at line 71 of file arm_conv_q31.c.

void arm_conv_fast_q31 | ( | q31_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q31_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q31_t * | pDst
 | ) |  |

Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length srcALen+srcBLen-1.
Returns:
none.

Scaling and Overflow Behavior:

This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.31 result.
The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally.
See arm_conv_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.

Definition at line 68 of file arm_conv_fast_q31.c.

void arm_conv_q15 | ( | q15_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q15_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q15_t * | pDst
 | ) |  |

Convolution of Q15 sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length srcALen+srcBLen-1.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
Refer to arm_conv_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.

Definition at line 68 of file arm_conv_q15.c.

void arm_conv_fast_q15 | ( | q15_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q15_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q15_t * | pDst
 | ) |  |

Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length srcALen+srcBLen-1.
Returns:
none.

Scaling and Overflow Behavior:

This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally. The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
See arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.

Definition at line 66 of file arm_conv_fast_q15.c.

void arm_conv_q7 | ( | q7_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q7_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q7_t * | pDst
 | ) |  |

Convolution of Q7 sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length srcALen+srcBLen-1.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 32-bit internal accumulator. Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072. The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.

Definition at line 65 of file arm_conv_q7.c.

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CMSIS DSP Software Library: Convolution Example

  • Examples

Convolution Example
[Examples]

Description:
Demonstrates the convolution theorem with the use of the Complex FFT, Complex-by-Complex Multiplication, and Support Functions.
Algorithm:
The convolution theorem states that convolution in the time domain corresponds to multiplication in the frequency domain. Therefore, the Fourier transform of the convoution of two signals is equal to the product of their individual Fourier transforms. The Fourier transform of a signal can be evaluated efficiently using the Fast Fourier Transform (FFT).
Two input signals, a[n] and b[n], with lengths n1 and n2 respectively, are zero padded so that their lengths become N, which is greater than or equal to (n1+n2-1) and is a power of 4 as FFT implementation is radix-4. The convolution of a[n] and b[n] is obtained by taking the FFT of the input signals, multiplying the Fourier transforms of the two signals, and taking the inverse FFT of the multiplied result.
This is denoted by the following equations:
 A[k] = FFT(a[n],N)
 B[k] = FFT(b[n],N)
 conv(a[n], b[n]) = IFFT(A[k] * B[k], N)
where A[k] and B[k] are the N-point FFTs of the signals a[n] and b[n] respectively. The length of the convolved signal is (n1+n2-1).
Block Diagram:
Variables Description:
  • testInputA_f32 points to the first input sequence
  • srcALen length of the first input sequence
  • testInputB_f32 points to the second input sequence
  • srcBLen length of the second input sequence
  • outLen length of convolution output sequence, (srcALen + srcBLen - 1)
  • AxB points to the output array where the product of individual FFTs of inputs is stored.
CMSIS DSP Software Library Functions Used:
  • arm_fill_f32()
  • arm_copy_f32()
  • arm_cfft_radix4_init_f32()
  • arm_cfft_radix4_f32()
  • arm_cmplx_mult_cmplx_f32()

Refer arm_convolution_example_f32.c

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CMSIS DSP Software Library: Correlation

  • Examples
Functions

Correlation
[Filtering Functions]

Functions

void | arm_correlate_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst)
void | arm_correlate_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
void | arm_correlate_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
void | arm_correlate_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
void | arm_correlate_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
void | arm_correlate_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst)

Detailed Description

Correlation is a mathematical operation that is similar to convolution. As with convolution, correlation uses two signals to produce a third signal. The underlying algorithms in correlation and convolution are identical except that one of the inputs is flipped in convolution. Correlation is commonly used to measure the similarity between two signals. It has applications in pattern recognition, cryptanalysis, and searching. The CMSIS library provides correlation functions for Q7, Q15, Q31 and floating-point data types. Fast versions of the Q15 and Q31 functions are also provided.

Algorithm
Let a[n] and b[n] be sequences of length srcALen and srcBLen samples respectively. The convolution of the two signals is denoted by

                   c[n] = a[n] * b[n]
In correlation, one of the signals is flipped in time

                   c[n] = a[n] * b[-n]
and this is mathematically defined as
The pSrcA points to the first input vector of length srcALen and pSrcB points to the second input vector of length srcBLen. The result c[n] is of length 2 * max(srcALen, srcBLen) - 1 and is defined over the interval n=0, 1, 2, ..., (2 * max(srcALen, srcBLen) - 2). The output result is written to pDst and the calling function must allocate 2 * max(srcALen, srcBLen) - 1 words for the result.

Note

The pDst should be initialized to all zeros before being used.

Fixed-Point Behavior

Correlation requires summing up a large number of intermediate products. As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation. Refer to the function specific documentation below for further details of the particular algorithm used.

Function Documentation

void arm_correlate_f32 | ( | float32_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | float32_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | float32_t * | pDst
 | ) |  |

Correlation of floating-point sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
Returns:
none.

Definition at line 95 of file arm_correlate_f32.c.

void arm_correlate_q31 | ( | q31_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q31_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q31_t * | pDst
 | ) |  |

Correlation of Q31 sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a maximum of min(srcALen, srcBLen) number of additions is carried internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
See arm_correlate_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.

Definition at line 71 of file arm_correlate_q31.c.

void arm_correlate_fast_q31 | ( | q31_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q31_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q31_t * | pDst
 | ) |  |

Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
Returns:
none.

Scaling and Overflow Behavior:

This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.31 result.
The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. The input signals should be scaled down to avoid intermediate overflows. Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a maximum of min(srcALen, srcBLen) number of additions is carried internally.
See arm_correlate_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.

Definition at line 70 of file arm_correlate_fast_q31.c.

void arm_correlate_q15 | ( | q15_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q15_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q15_t * | pDst
 | ) |  |

Correlation of Q15 sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
Refer to arm_correlate_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.

Definition at line 68 of file arm_correlate_q15.c.

void arm_correlate_fast_q15 | ( | q15_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q15_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q15_t * | pDst
 | ) |  |

Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
Returns:
none.

Scaling and Overflow Behavior:

This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a maximum of min(srcALen, srcBLen) number of additions is carried internally. The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
See arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.

Definition at line 66 of file arm_correlate_fast_q15.c.

void arm_correlate_q7 | ( | q7_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q7_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q7_t * | pDst
 | ) |  |

Correlation of Q7 sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 32-bit internal accumulator. Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072. The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.

Definition at line 65 of file arm_correlate_q7.c.

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CMSIS DSP Software Library: DCT Type IV Functions

  • Examples
Functions | Variables

DCT Type IV Functions
[Transform Functions]

Functions

arm_status | arm_dct4_init_f32 (arm_dct4_instance_f32 *S, arm_rfft_instance_f32 *S_RFFT, arm_cfft_radix4_instance_f32 *S_CFFT, uint16_t N, uint16_t Nby2, float32_t normalize)
void | arm_dct4_f32 (const arm_dct4_instance_f32 *S, float32_t *pState, float32_t *pInlineBuffer)
arm_status | arm_dct4_init_q31 (arm_dct4_instance_q31 *S, arm_rfft_instance_q31 *S_RFFT, arm_cfft_radix4_instance_q31 *S_CFFT, uint16_t N, uint16_t Nby2, q31_t normalize)
void | arm_dct4_q31 (const arm_dct4_instance_q31 *S, q31_t *pState, q31_t *pInlineBuffer)
arm_status | arm_dct4_init_q15 (arm_dct4_instance_q15 *S, arm_rfft_instance_q15 *S_RFFT, arm_cfft_radix4_instance_q15 *S_CFFT, uint16_t N, uint16_t Nby2, q15_t normalize)
void | arm_dct4_q15 (const arm_dct4_instance_q15 *S, q15_t *pState, q15_t *pInlineBuffer)

Variables

static const float32_t | Weights_128 [256]
static const float32_t | Weights_512 [1024]
static const float32_t | Weights_2048 [4096]
static const float32_t | cos_factors_128 [128]
static const float32_t | cos_factors_512 [512]
static const float32_t | cos_factors_2048 [2048]
static const q31_t | WeightsQ31_128 [256]
static const q31_t | WeightsQ31_512 [1024]
static const q31_t | WeightsQ31_2048 [4096]
static const q31_t | cos_factorsQ31_128 [128]
static const q31_t | cos_factorsQ31_512 [512]
static const q31_t | cos_factorsQ31_2048 [2048]
static const q15_t | WeightsQ15_128 [256]
static const q15_t | WeightsQ15_512 [1024]
static const q15_t | WeightsQ15_2048 [4096]
static const q15_t | cos_factorsQ15_128 [128]
static const q15_t | cos_factorsQ15_512 [512]
static const q15_t | cos_factorsQ15_2048 [2048]

Detailed Description

Representation of signals by minimum number of values is important for storage and transmission. The possibility of large discontinuity between the beginning and end of a period of a signal in DFT can be avoided by extending the signal so that it is even-symmetric. Discrete Cosine Transform (DCT) is constructed such that its energy is heavily concentrated in the lower part of the spectrum and is very widely used in signal and image coding applications. The family of DCTs (DCT type- 1,2,3,4) is the outcome of different combinations of homogeneous boundary conditions. DCT has an excellent energy-packing capability, hence has many applications and in data compression in particular.

DCT is essentially the Discrete Fourier Transform(DFT) of an even-extended real signal. Reordering of the input data makes the computation of DCT just a problem of computing the DFT of a real signal with a few additional operations. This approach provides regular, simple, and very efficient DCT algorithms for practical hardware and software implementations.

DCT type-II can be implemented using Fast fourier transform (FFT) internally, as the transform is applied on real values, Real FFT can be used. DCT4 is implemented using DCT2 as their implementations are similar except with some added pre-processing and post-processing. DCT2 implementation can be described in the following steps:

  • Re-ordering input
  • Calculating Real FFT
  • Multiplication of weights and Real FFT output and getting real part from the product.

This process is explained by the block diagram below:

Discrete Cosine Transform - type-IV

Algorithm:
The N-point type-IV DCT is defined as a real, linear transformation by the formula:
where k = 0,1,2,.....N-1
Its inverse is defined as follows:
where n = 0,1,2,.....N-1
The DCT4 matrices become involutory (i.e. they are self-inverse) by multiplying with an overall scale factor of sqrt(2/N). The symmetry of the transform matrix indicates that the fast algorithms for the forward and inverse transform computation are identical. Note that the implementation of Inverse DCT4 and DCT4 is same, hence same process function can be used for both.
Lengths supported by the transform:
As DCT4 internally uses Real FFT, it supports all the lengths supported by arm_rfft_f32(). The library provides separate functions for Q15, Q31, and floating-point data types.
Instance Structure
The instances for Real FFT and FFT, cosine values table and twiddle factor table are stored in an instance data structure. A separate instance structure must be defined for each transform. There are separate instance structure declarations for each of the 3 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Initializes Real FFT as its process function is used internally in DCT4, by calling arm_rfft_init_f32().
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Manually initialize the instance structure as follows:

arm_dct4_instance_f32 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
arm_dct4_instance_q31 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
arm_dct4_instance_q15 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
where N is the length of the DCT4; Nby2 is half of the length of the DCT4; normalize is normalizing factor used and is equal to sqrt(2/N); pTwiddle points to the twiddle factor table; pCosFactor points to the cosFactor table; pRfft points to the real FFT instance; pCfft points to the complex FFT instance; The CFFT and RFFT structures also needs to be initialized, refer to arm_cfft_radix4_f32() and arm_rfft_f32() respectively for details regarding static initialization.
Fixed-Point Behavior
Care must be taken when using the fixed-point versions of the DCT4 transform functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.

Function Documentation

arm_status arm_dct4_init_f32 | ( | arm_dct4_instance_f32 * | S,
 |  | arm_rfft_instance_f32 * | S_RFFT,
 |  | arm_cfft_radix4_instance_f32 * | S_CFFT,
 |  | uint16_t | N,
 |  | uint16_t | Nby2,
 |  | float32_t | normalize
 | ) |  |

Initialization function for the floating-point DCT4/IDCT4.

Parameters:
[in,out] | *S | points to an instance of floating-point DCT4/IDCT4 structure.
[in] | *S_RFFT | points to an instance of floating-point RFFT/RIFFT structure.
[in] | *S_CFFT | points to an instance of floating-point CFFT/CIFFT structure.
[in] | N | length of the DCT4.
[in] | Nby2 | half of the length of the DCT4.
[in] | normalize | normalizing factor.
Returns:
arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported transform length.
Normalizing factor:
The normalizing factor is sqrt(2/N), which depends on the size of transform N. Floating-point normalizing factors are mentioned in the table below for different DCT sizes:

Definition at line 4142 of file arm_dct4_init_f32.c.

void arm_dct4_f32 | ( | const arm_dct4_instance_f32 * | S,
 |  | float32_t * | pState,
 |  | float32_t * | pInlineBuffer
 | ) |  |

Processing function for the floating-point DCT4/IDCT4.

Parameters:
[in] | *S | points to an instance of the floating-point DCT4/IDCT4 structure.
[in] | *pState | points to state buffer.
[in,out] | *pInlineBuffer | points to the in-place input and output buffer.
Returns:
none.

Definition at line 126 of file arm_dct4_f32.c.

arm_status arm_dct4_init_q31 | ( | arm_dct4_instance_q31 * | S,
 |  | arm_rfft_instance_q31 * | S_RFFT,
 |  | arm_cfft_radix4_instance_q31 * | S_CFFT,
 |  | uint16_t | N,
 |  | uint16_t | Nby2,
 |  | q31_t | normalize
 | ) |  |

Initialization function for the Q31 DCT4/IDCT4.

Parameters:
[in,out] | *S | points to an instance of Q31 DCT4/IDCT4 structure.
[in] | *S_RFFT | points to an instance of Q31 RFFT/RIFFT structure
[in] | *S_CFFT | points to an instance of Q31 CFFT/CIFFT structure
[in] | N | length of the DCT4.
[in] | Nby2 | half of the length of the DCT4.
[in] | normalize | normalizing factor.
Returns:
arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.
Normalizing factor:
The normalizing factor is sqrt(2/N), which depends on the size of transform N. Normalizing factors in 1.31 format are mentioned in the table below for different DCT sizes:

Definition at line 2133 of file arm_dct4_init_q31.c.

void arm_dct4_q31 | ( | const arm_dct4_instance_q31 * | S,
 |  | q31_t * | pState,
 |  | q31_t * | pInlineBuffer
 | ) |  |

Processing function for the Q31 DCT4/IDCT4.

Parameters:
[in] | *S | points to an instance of the Q31 DCT4 structure.
[in] | *pState | points to state buffer.
[in,out] | *pInlineBuffer | points to the in-place input and output buffer.
Returns:
none.
Input an output formats:
Input samples need to be downscaled by 1 bit to avoid saturations in the Q31 DCT process, as the conversion from DCT2 to DCT4 involves one subtraction. Internally inputs are downscaled in the RFFT process function to avoid overflows. Number of bits downscaled, depends on the size of the transform. The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below:

Definition at line 53 of file arm_dct4_q31.c.

arm_status arm_dct4_init_q15 | ( | arm_dct4_instance_q15 * | S,
 |  | arm_rfft_instance_q15 * | S_RFFT,
 |  | arm_cfft_radix4_instance_q15 * | S_CFFT,
 |  | uint16_t | N,
 |  | uint16_t | Nby2,
 |  | q15_t | normalize
 | ) |  |

Initialization function for the Q15 DCT4/IDCT4.

Parameters:
[in,out] | *S | points to an instance of Q15 DCT4/IDCT4 structure.
[in] | *S_RFFT | points to an instance of Q15 RFFT/RIFFT structure.
[in] | *S_CFFT | points to an instance of Q15 CFFT/CIFFT structure.
[in] | N | length of the DCT4.
[in] | Nby2 | half of the length of the DCT4.
[in] | normalize | normalizing factor.
Returns:
arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.
Normalizing factor:
The normalizing factor is sqrt(2/N), which depends on the size of transform N. Normalizing factors in 1.15 format are mentioned in the table below for different DCT sizes:

Definition at line 1125 of file arm_dct4_init_q15.c.

void arm_dct4_q15 | ( | const arm_dct4_instance_q15 * | S,
 |  | q15_t * | pState,
 |  | q15_t * | pInlineBuffer
 | ) |  |

Processing function for the Q15 DCT4/IDCT4.

Parameters:
[in] | *S | points to an instance of the Q15 DCT4 structure.
[in] | *pState | points to state buffer.
[in,out] | *pInlineBuffer | points to the in-place input and output buffer.
Returns:
none.
Input an output formats:
Internally inputs are downscaled in the RFFT process function to avoid overflows. Number of bits downscaled, depends on the size of the transform. The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below:

Definition at line 52 of file arm_dct4_q15.c.

Variable Documentation

const float32_t Weights_128[256] [static]
Weights tables are generated using the formula :
weights[n] = e^(-j*n*pi/(2*N))
C command to generate the table

 for(i = 0; i< N; i++)
 {
    weights[2*i]= cos(i*c);
    weights[(2*i)+1]= -sin(i * c);
 }
Where N is the Number of weights to be calculated and c is pi/(2*N)
In the tables below the real and imaginary values are placed alternatively, hence the array length is 2*N.

Definition at line 64 of file arm_dct4_init_f32.c.

const float32_t Weights_512[1024] [static]

Definition at line 195 of file arm_dct4_init_f32.c.

const float32_t Weights_2048[4096] [static]

Definition at line 710 of file arm_dct4_init_f32.c.

const float32_t cos_factors_128[128] [static]
cosFactor tables are generated using the formula :
cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))
C command to generate the table
 for(i = 0; i< N; i++)
 {
    cos_factors[i]= 2 * cos((2*i+1)*c/2);
 }
where N is the number of factors to generate and c is pi/(2*N)

Definition at line 2774 of file arm_dct4_init_f32.c.

const float32_t cos_factors_512[512] [static]

Definition at line 2841 of file arm_dct4_init_f32.c.

const float32_t cos_factors_2048[2048] [static]

Definition at line 3100 of file arm_dct4_init_f32.c.

const q31_t WeightsQ31_128[256] [static]
Weights tables are generated using the formula :
weights[n] = e^(-j*n*pi/(2*N))
C command to generate the table

 for(i = 0; i< N; i++)
 {
   weights[2*i]= cos(i*c);
   weights[(2*i)+1]= -sin(i * c);
 }
where N is the Number of weights to be calculated and c is pi/(2*N)
Convert the output to q31 format by multiplying with 2^31 and saturated if required.
In the tables below the real and imaginary values are placed alternatively, hence the array length is 2*N.

Definition at line 66 of file arm_dct4_init_q31.c.

const q31_t WeightsQ31_512[1024] [static]

Definition at line 133 of file arm_dct4_init_q31.c.

const q31_t WeightsQ31_2048[4096] [static]

Definition at line 392 of file arm_dct4_init_q31.c.

const q31_t cos_factorsQ31_128[128] [static]
cosFactor tables are generated using the formula :
cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))
C command to generate the table

 for(i = 0; i< N; i++)
 {
   cos_factors[i]= 2 * cos((2*i+1)*c/2);
 }
where N is the number of factors to generate and c is pi/(2*N)
Then converted to q31 format by multiplying with 2^31 and saturated if required.

Definition at line 1436 of file arm_dct4_init_q31.c.

const q31_t cos_factorsQ31_512[512] [static]

Definition at line 1471 of file arm_dct4_init_q31.c.

const q31_t cos_factorsQ31_2048[2048] [static]

Definition at line 1602 of file arm_dct4_init_q31.c.

const q15_t WeightsQ15_128[256] [static]
Weights tables are generated using the formula :
weights[n] = e^(-j*n*pi/(2*N))
C command to generate the table

 for(i = 0; i< N; i++)
 {
   weights[2*i]= cos(i*c);
   weights[(2*i)+1]= -sin(i * c);
 }
where N is the Number of weights to be calculated and c is pi/(2*N)
Converted the output to q15 format by multiplying with 2^31 and saturated if required.
In the tables below the real and imaginary values are placed alternatively, hence the array length is 2*N.

Definition at line 66 of file arm_dct4_init_q15.c.

const q15_t WeightsQ15_512[1024] [static]

Definition at line 101 of file arm_dct4_init_q15.c.

const q15_t WeightsQ15_2048[4096] [static]

Definition at line 232 of file arm_dct4_init_q15.c.

const q15_t cos_factorsQ15_128[128] [static]
Initial value:
 {
  0x7fff, 0x7ffa, 0x7ff0, 0x7fe1, 0x7fce, 0x7fb5, 0x7f97, 0x7f75,
  0x7f4d, 0x7f21, 0x7ef0, 0x7eba, 0x7e7f, 0x7e3f, 0x7dfa, 0x7db0,
  0x7d62, 0x7d0f, 0x7cb7, 0x7c5a, 0x7bf8, 0x7b92, 0x7b26, 0x7ab6,
  0x7a42, 0x79c8, 0x794a, 0x78c7, 0x7840, 0x77b4, 0x7723, 0x768e,
  0x75f4, 0x7555, 0x74b2, 0x740b, 0x735f, 0x72af, 0x71fa, 0x7141,
  0x7083, 0x6fc1, 0x6efb, 0x6e30, 0x6d62, 0x6c8f, 0x6bb8, 0x6adc,
  0x69fd, 0x6919, 0x6832, 0x6746, 0x6657, 0x6563, 0x646c, 0x6371,
  0x6271, 0x616f, 0x6068, 0x5f5e, 0x5e50, 0x5d3e, 0x5c29, 0x5b10,
  0x59f3, 0x58d4, 0x57b0, 0x568a, 0x5560, 0x5433, 0x5302, 0x51ce,
  0x5097, 0x4f5e, 0x4e21, 0x4ce1, 0x4b9e, 0x4a58, 0x490f, 0x47c3,
  0x4675, 0x4524, 0x43d0, 0x427a, 0x4121, 0x3fc5, 0x3e68, 0x3d07,
  0x3ba5, 0x3a40, 0x38d8, 0x376f, 0x3604, 0x3496, 0x3326, 0x31b5,
  0x3041, 0x2ecc, 0x2d55, 0x2bdc, 0x2a61, 0x28e5, 0x2767, 0x25e8,
  0x2467, 0x22e5, 0x2161, 0x1fdc, 0x1e56, 0x1ccf, 0x1b47, 0x19bd,
  0x1833, 0x16a8, 0x151b, 0x138e, 0x1201, 0x1072, 0xee3, 0xd53,
  0xbc3, 0xa33, 0x8a2, 0x710, 0x57f, 0x3ed, 0x25b, 0xc9
}
cosFactor tables are generated using the formula :
 cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))
C command to generate the table

 for(i = 0; i< N; i++)
 {
   cos_factors[i]= 2 * cos((2*i+1)*c/2);
 }
where N is the number of factors to generate and c is pi/(2*N)
Then converted to q15 format by multiplying with 2^31 and saturated if required.

Definition at line 764 of file arm_dct4_init_q15.c.

const q15_t cos_factorsQ15_512[512] [static]

Definition at line 783 of file arm_dct4_init_q15.c.

const q15_t cos_factorsQ15_2048[2048] [static]

Definition at line 850 of file arm_dct4_init_q15.c.

All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:21 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Dot Product Example

  • Examples

Dot Product Example
[Examples]

Description:
Demonstrates the use of the Multiply and Add functions to perform the dot product. The dot product of two vectors is obtained by multiplying corresponding elements and summing the products.
Algorithm:
The two input vectors A and B with length n, are multiplied element-by-element and then added to obtain dot product.
This is denoted by the following equation:
  dotProduct = A[0] * B[0] + A[1] * B[1] + ... + A[n-1] * B[n-1]
Block Diagram:
Variables Description:
  • srcA_buf_f32 points to first input vector
  • srcB_buf_f32 points to second input vector
  • testOutput stores dot product of the two input vectors.
CMSIS DSP Software Library Functions Used:
  • arm_mult_f32()
  • arm_add_f32()

Refer arm_dotproduct_example_f32.c

All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:21 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: Finite Impulse Response (FIR) Filters

  • Examples
Functions

Finite Impulse Response (FIR) Filters
[Filtering Functions]

Functions

void | arm_fir_init_f32 (arm_fir_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
void | arm_fir_f32 (const arm_fir_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | arm_fir_init_q31 (arm_fir_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
void | arm_fir_q31 (const arm_fir_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_fir_fast_q31 (const arm_fir_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
arm_status | arm_fir_init_q15 (arm_fir_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
void | arm_fir_q15 (const arm_fir_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
void | arm_fir_fast_q15 (const arm_fir_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
void | arm_fir_init_q7 (arm_fir_instance_q7 *S, uint16_t numTaps, q7_t *pCoeffs, q7_t *pState, uint32_t blockSize)
void | arm_fir_q7 (const arm_fir_instance_q7 *S, q7_t *pSrc, q7_t *pDst, uint32_t blockSize)

Detailed Description

This set of functions implements Finite Impulse Response (FIR) filters for Q7, Q15, Q31, and floating-point data types. Fast versions of Q15 and Q31 are also provided on Cortex-M4 and Cortex-M3. The functions operate on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc and pDst points to input and output arrays containing blockSize values.

Algorithm:
The FIR filter algorithm is based upon a sequence of multiply-accumulate (MAC) operations. Each filter coefficient b[n] is multiplied by a state variable which equals a previous input sample x[n].

    y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]

Finite Impulse Response filter

pCoeffs points to a coefficient array of size numTaps. Coefficients are stored in time reversed order.

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to a state array of size numTaps + blockSize - 1. Samples in the state buffer are stored in the following order.

    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1. The increased state buffer length allows circular addressing, which is traditionally used in the FIR filters, to be avoided and yields a significant speed improvement. The state variables are updated after each block of data is processed; the coefficients are untouched.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. There are separate instance structure declarations for each of the 4 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. The code below statically initializes each of the 4 different data type filter instance structures

arm_fir_instance_f32 S = {numTaps, pState, pCoeffs};
arm_fir_instance_q31 S = {numTaps, pState, pCoeffs};
arm_fir_instance_q15 S = {numTaps, pState, pCoeffs};
arm_fir_instance_q7 S =  {numTaps, pState, pCoeffs};

where numTaps is the number of filter coefficients in the filter; pState is the address of the state buffer; pCoeffs is the address of the coefficient buffer.

Fixed-Point Behavior
Care must be taken when using the fixed-point versions of the FIR filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.

Function Documentation

void arm_fir_init_f32 | ( | arm_fir_instance_f32 * | S,
 |  | uint16_t | numTaps,
 |  | float32_t * | pCoeffs,
 |  | float32_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the floating-point FIR filter.

Parameters:
[in,out] | *S | points to an instance of the floating-point FIR filter structure.
[in] | numTaps | Number of filter coefficients in the filter.
[in] | *pCoeffs | points to the filter coefficients buffer.
[in] | *pState | points to the state buffer.
[in] | blockSize | number of samples that are processed per call.
Returns:
none.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to the array of state variables. pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_f32().
Examples:
arm_fir_example_f32.c, and arm_signal_converge_example_f32.c.

Definition at line 68 of file arm_fir_init_f32.c.

void arm_fir_f32 | ( | const arm_fir_instance_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the floating-point FIR filter.

Parameters:
[in] | *S | points to an instance of the floating-point FIR filter structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process per call.
Returns:
none.
Examples:
arm_fir_example_f32.c, and arm_signal_converge_example_f32.c.

Definition at line 128 of file arm_fir_f32.c.

void arm_fir_init_q31 | ( | arm_fir_instance_q31 * | S,
 |  | uint16_t | numTaps,
 |  | q31_t * | pCoeffs,
 |  | q31_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q31 FIR filter.

Parameters:
[in,out] | *S | points to an instance of the Q31 FIR filter structure.
[in] | numTaps | Number of filter coefficients in the filter.
[in] | *pCoeffs | points to the filter coefficients buffer.
[in] | *pState | points to the state buffer.
[in] | blockSize | number of samples that are processed per call.
Returns:
none.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to the array of state variables. pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q31().

Definition at line 68 of file arm_fir_init_q31.c.

void arm_fir_q31 | ( | const arm_fir_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q31 FIR filter.

Parameters:
[in] | *S | points to an instance of the Q31 FIR filter structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. After all multiply-accumulates are performed, the 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
Refer to the function arm_fir_fast_q31() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.

Definition at line 67 of file arm_fir_q31.c.

void arm_fir_fast_q31 | ( | const arm_fir_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *S | points to an instance of the Q31 structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block output data.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are added to a 2.30 accumulator. Finally, the accumulator is saturated and converted to a 1.31 result. The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
Refer to the function arm_fir_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision. Both the slow and the fast versions use the same instance structure. Use the function arm_fir_init_q31() to initialize the filter structure.

Definition at line 66 of file arm_fir_fast_q31.c.

arm_status arm_fir_init_q15 | ( | arm_fir_instance_q15 * | S,
 |  | uint16_t | numTaps,
 |  | q15_t * | pCoeffs,
 |  | q15_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q15 FIR filter.

Parameters:
[in,out] | *S | points to an instance of the Q15 FIR filter structure.
[in] | numTaps | Number of filter coefficients in the filter. Must be even and greater than or equal to 4.
[in] | *pCoeffs | points to the filter coefficients buffer.
[in] | *pState | points to the state buffer.
[in] | blockSize | is number of samples processed per call.
Returns:
The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if numTaps is not greater than or equal to 4 and even.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
Note that numTaps must be even and greater than or equal to 4. To implement an odd length filter simply increase numTaps by 1 and set the last coefficient to zero. For example, to implement a filter with numTaps=3 and coefficients

     {0.3, -0.8, 0.3}
set numTaps=4 and use the coefficients:

     {0.3, -0.8, 0.3, 0}.
Similarly, to implement a two point filter

     {0.3, -0.3}
set numTaps=4 and use the coefficients:

     {0.3, -0.3, 0, 0}.
pState points to the array of state variables. pState is of length numTaps+blockSize-1, where blockSize is the number of input samples processed by each call to arm_fir_q15().

Definition at line 85 of file arm_fir_init_q15.c.

void arm_fir_q15 | ( | const arm_fir_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q15 FIR filter.

Parameters:
[in] | *S | points to an instance of the Q15 FIR structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.
Refer to the function arm_fir_fast_q15() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.

Definition at line 68 of file arm_fir_q15.c.

void arm_fir_fast_q15 | ( | const arm_fir_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *S | points to an instance of the Q15 FIR filter structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
Refer to the function arm_fir_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure. Use the function arm_fir_init_q15() to initialize the filter structure.

Definition at line 65 of file arm_fir_fast_q15.c.

void arm_fir_init_q7 | ( | arm_fir_instance_q7 * | S,
 |  | uint16_t | numTaps,
 |  | q7_t * | pCoeffs,
 |  | q7_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q7 FIR filter.

Parameters:
[in,out] | *S | points to an instance of the Q7 FIR filter structure.
[in] | numTaps | Number of filter coefficients in the filter.
[in] | *pCoeffs | points to the filter coefficients buffer.
[in] | *pState | points to the state buffer.
[in] | blockSize | number of samples that are processed per call.
Returns:
none

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to the array of state variables. pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q7().

Definition at line 65 of file arm_fir_init_q7.c.

void arm_fir_q7 | ( | const arm_fir_instance_q7 * | S,
 |  | q7_t * | pSrc,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q7 FIR filter.

Parameters:
[in] | *S | points to an instance of the Q7 FIR filter structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 32-bit internal accumulator. Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. The accumulator is converted to 18.7 format by discarding the low 7 bits. Finally, the result is truncated to 1.7 format.

Definition at line 64 of file arm_fir_q7.c.

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CMSIS DSP Software Library: Finite Impulse Response (FIR) Interpolator

  • Examples
Functions

Finite Impulse Response (FIR) Interpolator
[Filtering Functions]

Functions

arm_status | arm_fir_interpolate_init_f32 (arm_fir_interpolate_instance_f32 *S, uint8_t L, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
void | arm_fir_interpolate_f32 (const arm_fir_interpolate_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
arm_status | arm_fir_interpolate_init_q31 (arm_fir_interpolate_instance_q31 *S, uint8_t L, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
void | arm_fir_interpolate_q31 (const arm_fir_interpolate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
arm_status | arm_fir_interpolate_init_q15 (arm_fir_interpolate_instance_q15 *S, uint8_t L, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
void | arm_fir_interpolate_q15 (const arm_fir_interpolate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)

Detailed Description

These functions combine an upsampler (zero stuffer) and an FIR filter. They are used in multirate systems for increasing the sample rate of a signal without introducing high frequency images. Conceptually, the functions are equivalent to the block diagram below:

Components included in the FIR Interpolator functions

After upsampling by a factor of L, the signal should be filtered by a lowpass filter with a normalized cutoff frequency of 1/L in order to eliminate high frequency copies of the spectrum. The user of the function is responsible for providing the filter coefficients.

The FIR interpolator functions provided in the CMSIS DSP Library combine the upsampler and FIR filter in an efficient manner. The upsampler inserts L-1 zeros between each sample. Instead of multiplying by these zero values, the FIR filter is designed to skip them. This leads to an efficient implementation without any wasted effort. The functions operate on blocks of input and output data. pSrc points to an array of blockSize input values and pDst points to an array of blockSize*L output values.

The library provides separate functions for Q15, Q31, and floating-point data types.

Algorithm:
The functions use a polyphase filter structure:

    y[n] = b[0] * x[n] + b[L]   * x[n-1] + ... + b[L*(phaseLength-1)] * x[n-phaseLength+1]
    y[n+1] = b[1] * x[n] + b[L+1] * x[n-1] + ... + b[L*(phaseLength-1)+1] * x[n-phaseLength+1]
    ...
    y[n+(L-1)] = b[L-1] * x[n] + b[2*L-1] * x[n-1] + ....+ b[L*(phaseLength-1)+(L-1)] * x[n-phaseLength+1]
This approach is more efficient than straightforward upsample-then-filter algorithms. With this method the computation is reduced by a factor of 1/L when compared to using a standard FIR filter.
pCoeffs points to a coefficient array of size numTaps. numTaps must be a multiple of the interpolation factor L and this is checked by the initialization functions. Internally, the function divides the FIR filter's impulse response into shorter filters of length phaseLength=numTaps/L. Coefficients are stored in time reversed order.

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to a state array of size blockSize + phaseLength - 1. Samples in the state buffer are stored in the order:

    {x[n-phaseLength+1], x[n-phaseLength], x[n-phaseLength-1], x[n-phaseLength-2]....x[0], x[1], ..., x[blockSize-1]}
The state variables are updated after each block of data is processed, the coefficients are untouched.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable array should be allocated separately. There are separate instance structure declarations for each of the 3 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
  • Checks to make sure that the length of the filter is a multiple of the interpolation factor.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. The code below statically initializes each of the 3 different data type filter instance structures

 arm_fir_interpolate_instance_f32 S = {L, phaseLength, pCoeffs, pState};
 arm_fir_interpolate_instance_q31 S = {L, phaseLength, pCoeffs, pState};
 arm_fir_interpolate_instance_q15 S = {L, phaseLength, pCoeffs, pState};
where L is the interpolation factor; phaseLength=numTaps/L is the length of each of the shorter FIR filters used internally, pCoeffs is the address of the coefficient buffer; pState is the address of the state buffer. Be sure to set the values in the state buffer to zeros when doing static initialization.
Fixed-Point Behavior
Care must be taken when using the fixed-point versions of the FIR interpolate filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.

Function Documentation

arm_status arm_fir_interpolate_init_f32 | ( | arm_fir_interpolate_instance_f32 * | S,
 |  | uint8_t | L,
 |  | uint16_t | numTaps,
 |  | float32_t * | pCoeffs,
 |  | float32_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the floating-point FIR interpolator.

Parameters:
[in,out] | *S | points to an instance of the floating-point FIR interpolator structure.
[in] | L | upsample factor.
[in] | numTaps | number of filter coefficients in the filter.
[in] | *pCoeffs | points to the filter coefficient buffer.
[in] | *pState | points to the state buffer.
[in] | blockSize | number of input samples to process per call.
Returns:
The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if the filter length numTaps is not a multiple of the interpolation factor L.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
The length of the filter numTaps must be a multiple of the interpolation factor L.
pState points to the array of state variables. pState is of length (numTaps/L)+blockSize-1 words where blockSize is the number of input samples processed by each call to arm_fir_interpolate_f32().

Definition at line 68 of file arm_fir_interpolate_init_f32.c.

void arm_fir_interpolate_f32 | ( | const arm_fir_interpolate_instance_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the floating-point FIR interpolator.

Parameters:
[in] | *S | points to an instance of the floating-point FIR interpolator structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of input samples to process per call.
Returns:
none.

Definition at line 135 of file arm_fir_interpolate_f32.c.

arm_status arm_fir_interpolate_init_q31 | ( | arm_fir_interpolate_instance_q31 * | S,
 |  | uint8_t | L,
 |  | uint16_t | numTaps,
 |  | q31_t * | pCoeffs,
 |  | q31_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q31 FIR interpolator.

Parameters:
[in,out] | *S | points to an instance of the Q31 FIR interpolator structure.
[in] | L | upsample factor.
[in] | numTaps | number of filter coefficients in the filter.
[in] | *pCoeffs | points to the filter coefficient buffer.
[in] | *pState | points to the state buffer.
[in] | blockSize | number of input samples to process per call.
Returns:
The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if the filter length numTaps is not a multiple of the interpolation factor L.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
The length of the filter numTaps must be a multiple of the interpolation factor L.
pState points to the array of state variables. pState is of length (numTaps/L)+blockSize-1 words where blockSize is the number of input samples processed by each call to arm_fir_interpolate_q31().

Definition at line 69 of file arm_fir_interpolate_init_q31.c.

void arm_fir_interpolate_q31 | ( | const arm_fir_interpolate_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q31 FIR interpolator.

Parameters:
[in] | *S | points to an instance of the Q31 FIR interpolator structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of input samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 1/(numTaps/L). since numTaps/L additions occur per output sample. After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.

Definition at line 63 of file arm_fir_interpolate_q31.c.

arm_status arm_fir_interpolate_init_q15 | ( | arm_fir_interpolate_instance_q15 * | S,
 |  | uint8_t | L,
 |  | uint16_t | numTaps,
 |  | q15_t * | pCoeffs,
 |  | q15_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q15 FIR interpolator.

Parameters:
[in,out] | *S | points to an instance of the Q15 FIR interpolator structure.
[in] | L | upsample factor.
[in] | numTaps | number of filter coefficients in the filter.
[in] | *pCoeffs | points to the filter coefficient buffer.
[in] | *pState | points to the state buffer.
[in] | blockSize | number of input samples to process per call.
Returns:
The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if the filter length numTaps is not a multiple of the interpolation factor L.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
The length of the filter numTaps must be a multiple of the interpolation factor L.
pState points to the array of state variables. pState is of length (numTaps/L)+blockSize-1 words where blockSize is the number of input samples processed by each call to arm_fir_interpolate_q15().

Definition at line 68 of file arm_fir_interpolate_init_q15.c.

void arm_fir_interpolate_q15 | ( | const arm_fir_interpolate_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q15 FIR interpolator.

Parameters:
[in] | *S | points to an instance of the Q15 FIR interpolator structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of input samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.

Definition at line 62 of file arm_fir_interpolate_q15.c.

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CMSIS DSP Software Library: Finite Impulse Response (FIR) Lattice Filters

  • Examples
Functions

Finite Impulse Response (FIR) Lattice Filters
[Filtering Functions]

Functions

void | arm_fir_lattice_init_f32 (arm_fir_lattice_instance_f32 *S, uint16_t numStages, float32_t *pCoeffs, float32_t *pState)
void | arm_fir_lattice_f32 (const arm_fir_lattice_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | arm_fir_lattice_init_q31 (arm_fir_lattice_instance_q31 *S, uint16_t numStages, q31_t *pCoeffs, q31_t *pState)
void | arm_fir_lattice_q31 (const arm_fir_lattice_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_fir_lattice_init_q15 (arm_fir_lattice_instance_q15 *S, uint16_t numStages, q15_t *pCoeffs, q15_t *pState)
void | arm_fir_lattice_q15 (const arm_fir_lattice_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)

Detailed Description

This set of functions implements Finite Impulse Response (FIR) lattice filters for Q15, Q31 and floating-point data types. Lattice filters are used in a variety of adaptive filter applications. The filter structure is feedforward and the net impulse response is finite length. The functions operate on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc and pDst point to input and output arrays containing blockSize values.

Algorithm:

Finite Impulse Response Lattice filter

The following difference equation is implemented:

    f0[n] = g0[n] = x[n]
    fm[n] = fm-1[n] + km * gm-1[n-1] for m = 1, 2, ...M
    gm[n] = km * fm-1[n] + gm-1[n-1] for m = 1, 2, ...M
    y[n] = fM[n]
pCoeffs points to tha array of reflection coefficients of size numStages. Reflection Coefficients are stored in the following order.

    {k1, k2, ..., kM}
where M is number of stages
pState points to a state array of size numStages. The state variables (g values) hold previous inputs and are stored in the following order.

    {g0[n], g1[n], g2[n] ...gM-1[n]}
The state variables are updated after each block of data is processed; the coefficients are untouched.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. There are separate instance structure declarations for each of the 3 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:

arm_fir_lattice_instance_f32 S = {numStages, pState, pCoeffs};
arm_fir_lattice_instance_q31 S = {numStages, pState, pCoeffs};
arm_fir_lattice_instance_q15 S = {numStages, pState, pCoeffs};
where numStages is the number of stages in the filter; pState is the address of the state buffer; pCoeffs is the address of the coefficient buffer.
Fixed-Point Behavior
Care must be taken when using the fixed-point versions of the FIR Lattice filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.

Function Documentation

void arm_fir_lattice_init_f32 | ( | arm_fir_lattice_instance_f32 * | S,
 |  | uint16_t | numStages,
 |  | float32_t * | pCoeffs,
 |  | float32_t * | pState
 | ) |  |

Initialization function for the floating-point FIR lattice filter.

Parameters:
[in] | *S | points to an instance of the floating-point FIR lattice structure.
[in] | numStages | number of filter stages.
[in] | *pCoeffs | points to the coefficient buffer. The array is of length numStages.
[in] | *pState | points to the state buffer. The array is of length numStages.
Returns:
none.

Definition at line 53 of file arm_fir_lattice_init_f32.c.

void arm_fir_lattice_f32 | ( | const arm_fir_lattice_instance_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the floating-point FIR lattice filter.

Parameters:
[in] | *S | points to an instance of the floating-point FIR lattice structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | blockSize | number of samples to process.
Returns:
none.

Definition at line 121 of file arm_fir_lattice_f32.c.

void arm_fir_lattice_init_q31 | ( | arm_fir_lattice_instance_q31 * | S,
 |  | uint16_t | numStages,
 |  | q31_t * | pCoeffs,
 |  | q31_t * | pState
 | ) |  |

Initialization function for the Q31 FIR lattice filter.

Parameters:
[in] | *S | points to an instance of the Q31 FIR lattice structure.
[in] | numStages | number of filter stages.
[in] | *pCoeffs | points to the coefficient buffer. The array is of length numStages.
[in] | *pState | points to the state buffer. The array is of length numStages.
Returns:
none.

Definition at line 53 of file arm_fir_lattice_init_q31.c.

void arm_fir_lattice_q31 | ( | const arm_fir_lattice_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q31 FIR lattice filter.

Parameters:
[in] | *S | points to an instance of the Q31 FIR lattice structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | blockSize | number of samples to process.
Returns:
none.

Scaling and Overflow Behavior: In order to avoid overflows the input signal must be scaled down by 2*log2(numStages) bits.

Definition at line 58 of file arm_fir_lattice_q31.c.

void arm_fir_lattice_init_q15 | ( | arm_fir_lattice_instance_q15 * | S,
 |  | uint16_t | numStages,
 |  | q15_t * | pCoeffs,
 |  | q15_t * | pState
 | ) |  |

Initialization function for the Q15 FIR lattice filter.

Parameters:
[in] | *S | points to an instance of the Q15 FIR lattice structure.
[in] | numStages | number of filter stages.
[in] | *pCoeffs | points to the coefficient buffer. The array is of length numStages.
[in] | *pState | points to the state buffer. The array is of length numStages.
Returns:
none.

Definition at line 53 of file arm_fir_lattice_init_q15.c.

void arm_fir_lattice_q15 | ( | const arm_fir_lattice_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q15 FIR lattice filter.

Parameters:
[in] | *S | points to an instance of the Q15 FIR lattice structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | blockSize | number of samples to process.
Returns:
none.

Definition at line 54 of file arm_fir_lattice_q15.c.

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CMSIS DSP Software Library: Finite Impulse Response (FIR) Sparse Filters

  • Examples
Functions

Finite Impulse Response (FIR) Sparse Filters
[Filtering Functions]

Functions

void | arm_fir_sparse_init_f32 (arm_fir_sparse_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
void | arm_fir_sparse_f32 (arm_fir_sparse_instance_f32 *S, float32_t *pSrc, float32_t *pDst, float32_t *pScratchIn, uint32_t blockSize)
void | arm_fir_sparse_init_q31 (arm_fir_sparse_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
void | arm_fir_sparse_q31 (arm_fir_sparse_instance_q31 *S, q31_t *pSrc, q31_t *pDst, q31_t *pScratchIn, uint32_t blockSize)
void | arm_fir_sparse_init_q15 (arm_fir_sparse_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
void | arm_fir_sparse_q15 (arm_fir_sparse_instance_q15 *S, q15_t *pSrc, q15_t *pDst, q15_t *pScratchIn, q31_t *pScratchOut, uint32_t blockSize)
void | arm_fir_sparse_init_q7 (arm_fir_sparse_instance_q7 *S, uint16_t numTaps, q7_t *pCoeffs, q7_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
void | arm_fir_sparse_q7 (arm_fir_sparse_instance_q7 *S, q7_t *pSrc, q7_t *pDst, q7_t *pScratchIn, q31_t *pScratchOut, uint32_t blockSize)

Detailed Description

This group of functions implements sparse FIR filters. Sparse FIR filters are equivalent to standard FIR filters except that most of the coefficients are equal to zero. Sparse filters are used for simulating reflections in communications and audio applications.

There are separate functions for Q7, Q15, Q31, and floating-point data types. The functions operate on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc and pDst points to input and output arrays respectively containing blockSize values.

Algorithm:
The sparse filter instant structure contains an array of tap indices pTapDelay which specifies the locations of the non-zero coefficients. This is in addition to the coefficient array b. The implementation essentially skips the multiplications by zero and leads to an efficient realization.

     y[n] = b[0] * x[n-pTapDelay[0]] + b[1] * x[n-pTapDelay[1]] + b[2] * x[n-pTapDelay[2]] + ...+ b[numTaps-1] * x[n-pTapDelay[numTaps-1]]

Sparse FIR filter. b[n] represents the filter coefficients

pCoeffs points to a coefficient array of size numTaps; pTapDelay points to an array of nonzero indices and is also of size numTaps; pState points to a state array of size maxDelay + blockSize, where maxDelay is the largest offset value that is ever used in the pTapDelay array. Some of the processing functions also require temporary working buffers.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient and offset arrays may be shared among several instances while state variable arrays cannot be shared. There are separate instance structure declarations for each of the 4 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. The code below statically initializes each of the 4 different data type filter instance structures

arm_fir_sparse_instance_f32 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
arm_fir_sparse_instance_q31 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
arm_fir_sparse_instance_q15 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
arm_fir_sparse_instance_q7 S =  {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
Fixed-Point Behavior
Care must be taken when using the fixed-point versions of the sparse FIR filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.

Function Documentation

void arm_fir_sparse_init_f32 | ( | arm_fir_sparse_instance_f32 * | S,
 |  | uint16_t | numTaps,
 |  | float32_t * | pCoeffs,
 |  | float32_t * | pState,
 |  | int32_t * | pTapDelay,
 |  | uint16_t | maxDelay,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the floating-point sparse FIR filter.

Parameters:
[in,out] | *S | points to an instance of the floating-point sparse FIR structure.
[in] | numTaps | number of nonzero coefficients in the filter.
[in] | *pCoeffs | points to the array of filter coefficients.
[in] | *pState | points to the state buffer.
[in] | *pTapDelay | points to the array of offset times.
[in] | maxDelay | maximum offset time supported.
[in] | blockSize | number of samples that will be processed per block.
Returns:
none

Description:

pCoeffs holds the filter coefficients and has length numTaps. pState holds the filter's state variables and must be of length maxDelay + blockSize, where maxDelay is the maximum number of delay line values. blockSize is the number of samples processed by the arm_fir_sparse_f32() function.

Definition at line 65 of file arm_fir_sparse_init_f32.c.

void arm_fir_sparse_f32 | ( | arm_fir_sparse_instance_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | float32_t * | pScratchIn,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the floating-point sparse FIR filter.

Parameters:
[in] | *S | points to an instance of the floating-point sparse FIR structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | *pScratchIn | points to a temporary buffer of size blockSize.
[in] | blockSize | number of input samples to process per call.
Returns:
none.

Definition at line 113 of file arm_fir_sparse_f32.c.

void arm_fir_sparse_init_q31 | ( | arm_fir_sparse_instance_q31 * | S,
 |  | uint16_t | numTaps,
 |  | q31_t * | pCoeffs,
 |  | q31_t * | pState,
 |  | int32_t * | pTapDelay,
 |  | uint16_t | maxDelay,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q31 sparse FIR filter.

Parameters:
[in,out] | *S | points to an instance of the Q31 sparse FIR structure.
[in] | numTaps | number of nonzero coefficients in the filter.
[in] | *pCoeffs | points to the array of filter coefficients.
[in] | *pState | points to the state buffer.
[in] | *pTapDelay | points to the array of offset times.
[in] | maxDelay | maximum offset time supported.
[in] | blockSize | number of samples that will be processed per block.
Returns:
none

Description:

pCoeffs holds the filter coefficients and has length numTaps. pState holds the filter's state variables and must be of length maxDelay + blockSize, where maxDelay is the maximum number of delay line values. blockSize is the number of words processed by arm_fir_sparse_q31() function.

Definition at line 64 of file arm_fir_sparse_init_q31.c.

void arm_fir_sparse_q31 | ( | arm_fir_sparse_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | q31_t * | pScratchIn,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q31 sparse FIR filter.

Parameters:
[in] | *S | points to an instance of the Q31 sparse FIR structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | *pScratchIn | points to a temporary buffer of size blockSize.
[in] | blockSize | number of input samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 32-bit accumulator. The 1.31 x 1.31 multiplications are truncated to 2.30 format. This leads to loss of precision on the intermediate multiplications and provides only a single guard bit. If the accumulator result overflows, it wraps around rather than saturate. In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.

Definition at line 58 of file arm_fir_sparse_q31.c.

void arm_fir_sparse_init_q15 | ( | arm_fir_sparse_instance_q15 * | S,
 |  | uint16_t | numTaps,
 |  | q15_t * | pCoeffs,
 |  | q15_t * | pState,
 |  | int32_t * | pTapDelay,
 |  | uint16_t | maxDelay,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q15 sparse FIR filter.

Parameters:
[in,out] | *S | points to an instance of the Q15 sparse FIR structure.
[in] | numTaps | number of nonzero coefficients in the filter.
[in] | *pCoeffs | points to the array of filter coefficients.
[in] | *pState | points to the state buffer.
[in] | *pTapDelay | points to the array of offset times.
[in] | maxDelay | maximum offset time supported.
[in] | blockSize | number of samples that will be processed per block.
Returns:
none

Description:

pCoeffs holds the filter coefficients and has length numTaps. pState holds the filter's state variables and must be of length maxDelay + blockSize, where maxDelay is the maximum number of delay line values. blockSize is the number of words processed by arm_fir_sparse_q15() function.

Definition at line 65 of file arm_fir_sparse_init_q15.c.

void arm_fir_sparse_q15 | ( | arm_fir_sparse_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | q15_t * | pScratchIn,
 |  | q31_t * | pScratchOut,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q15 sparse FIR filter.

Parameters:
[in] | *S | points to an instance of the Q15 sparse FIR structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | *pScratchIn | points to a temporary buffer of size blockSize.
[in] | *pScratchOut | points to a temporary buffer of size blockSize.
[in] | blockSize | number of input samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 32-bit accumulator. The 1.15 x 1.15 multiplications yield a 2.30 result and these are added to a 2.30 accumulator. Thus the full precision of the multiplications is maintained but there is only a single guard bit in the accumulator. If the accumulator result overflows it will wrap around rather than saturate. After all multiply-accumulates are performed, the 2.30 accumulator is truncated to 2.15 format and then saturated to 1.15 format. In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.

Definition at line 60 of file arm_fir_sparse_q15.c.

void arm_fir_sparse_init_q7 | ( | arm_fir_sparse_instance_q7 * | S,
 |  | uint16_t | numTaps,
 |  | q7_t * | pCoeffs,
 |  | q7_t * | pState,
 |  | int32_t * | pTapDelay,
 |  | uint16_t | maxDelay,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q7 sparse FIR filter.

Parameters:
[in,out] | *S | points to an instance of the Q7 sparse FIR structure.
[in] | numTaps | number of nonzero coefficients in the filter.
[in] | *pCoeffs | points to the array of filter coefficients.
[in] | *pState | points to the state buffer.
[in] | *pTapDelay | points to the array of offset times.
[in] | maxDelay | maximum offset time supported.
[in] | blockSize | number of samples that will be processed per block.
Returns:
none

Description:

pCoeffs holds the filter coefficients and has length numTaps. pState holds the filter's state variables and must be of length maxDelay + blockSize, where maxDelay is the maximum number of delay line values. blockSize is the number of samples processed by the arm_fir_sparse_q7() function.

Definition at line 65 of file arm_fir_sparse_init_q7.c.

void arm_fir_sparse_q7 | ( | arm_fir_sparse_instance_q7 * | S,
 |  | q7_t * | pSrc,
 |  | q7_t * | pDst,
 |  | q7_t * | pScratchIn,
 |  | q31_t * | pScratchOut,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q7 sparse FIR filter.

Parameters:
[in] | *S | points to an instance of the Q7 sparse FIR structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | *pScratchIn | points to a temporary buffer of size blockSize.
[in] | *pScratchOut | points to a temporary buffer of size blockSize.
[in] | blockSize | number of input samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 32-bit internal accumulator. Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. The accumulator is then converted to 18.7 format by discarding the low 7 bits. Finally, the result is truncated to 1.7 format.

Definition at line 65 of file arm_fir_sparse_q7.c.

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CMSIS DSP Software Library: Finite Impulse Response (FIR) Decimator

  • Examples
Functions

Finite Impulse Response (FIR) Decimator
[Filtering Functions]

Functions

arm_status | arm_fir_decimate_init_f32 (arm_fir_decimate_instance_f32 *S, uint16_t numTaps, uint8_t M, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
void | arm_fir_decimate_f32 (const arm_fir_decimate_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
arm_status | arm_fir_decimate_init_q31 (arm_fir_decimate_instance_q31 *S, uint16_t numTaps, uint8_t M, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
void | arm_fir_decimate_q31 (const arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_fir_decimate_fast_q31 (arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
arm_status | arm_fir_decimate_init_q15 (arm_fir_decimate_instance_q15 *S, uint16_t numTaps, uint8_t M, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
void | arm_fir_decimate_q15 (const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
void | arm_fir_decimate_fast_q15 (const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)

Detailed Description

These functions combine an FIR filter together with a decimator. They are used in multirate systems for reducing the sample rate of a signal without introducing aliasing distortion. Conceptually, the functions are equivalent to the block diagram below:

Components included in the FIR Decimator functions

When decimating by a factor of M, the signal should be prefiltered by a lowpass filter with a normalized cutoff frequency of 1/M in order to prevent aliasing distortion. The user of the function is responsible for providing the filter coefficients.

The FIR decimator functions provided in the CMSIS DSP Library combine the FIR filter and the decimator in an efficient manner. Instead of calculating all of the FIR filter outputs and discarding M-1 out of every M, only the samples output by the decimator are computed. The functions operate on blocks of input and output data. pSrc points to an array of blockSize input values and pDst points to an array of blockSize/M output values. In order to have an integer number of output samples blockSize must always be a multiple of the decimation factor M.

The library provides separate functions for Q15, Q31 and floating-point data types.

Algorithm:
The FIR portion of the algorithm uses the standard form filter:

    y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
where, b[n] are the filter coefficients.
The pCoeffs points to a coefficient array of size numTaps. Coefficients are stored in time reversed order.

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to a state array of size numTaps + blockSize - 1. Samples in the state buffer are stored in the order:

    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
The state variables are updated after each block of data is processed, the coefficients are untouched.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable array should be allocated separately. There are separate instance structure declarations for each of the 3 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
  • Checks to make sure that the size of the input is a multiple of the decimation factor.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. The code below statically initializes each of the 3 different data type filter instance structures

arm_fir_decimate_instance_f32 S = {M, numTaps, pCoeffs, pState};
arm_fir_decimate_instance_q31 S = {M, numTaps, pCoeffs, pState};
arm_fir_decimate_instance_q15 S = {M, numTaps, pCoeffs, pState};
where M is the decimation factor; numTaps is the number of filter coefficients in the filter; pCoeffs is the address of the coefficient buffer; pState is the address of the state buffer. Be sure to set the values in the state buffer to zeros when doing static initialization.
Fixed-Point Behavior
Care must be taken when using the fixed-point versions of the FIR decimate filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.

Function Documentation

arm_status arm_fir_decimate_init_f32 | ( | arm_fir_decimate_instance_f32 * | S,
 |  | uint16_t | numTaps,
 |  | uint8_t | M,
 |  | float32_t * | pCoeffs,
 |  | float32_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the floating-point FIR decimator.

Parameters:
[in,out] | *S | points to an instance of the floating-point FIR decimator structure.
[in] | numTaps | number of coefficients in the filter.
[in] | M | decimation factor.
[in] | *pCoeffs | points to the filter coefficients.
[in] | *pState | points to the state buffer.
[in] | blockSize | number of input samples to process per call.
Returns:
The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if blockSize is not a multiple of M.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to the array of state variables. pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples passed to arm_fir_decimate_f32(). M is the decimation factor.

Definition at line 67 of file arm_fir_decimate_init_f32.c.

void arm_fir_decimate_f32 | ( | const arm_fir_decimate_instance_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the floating-point FIR decimator.

Parameters:
[in] | *S | points to an instance of the floating-point FIR decimator structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of input samples to process per call.
Returns:
none.

Definition at line 132 of file arm_fir_decimate_f32.c.

arm_status arm_fir_decimate_init_q31 | ( | arm_fir_decimate_instance_q31 * | S,
 |  | uint16_t | numTaps,
 |  | uint8_t | M,
 |  | q31_t * | pCoeffs,
 |  | q31_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q31 FIR decimator.

Parameters:
[in,out] | *S | points to an instance of the Q31 FIR decimator structure.
[in] | numTaps | number of coefficients in the filter.
[in] | M | decimation factor.
[in] | *pCoeffs | points to the filter coefficients.
[in] | *pState | points to the state buffer.
[in] | blockSize | number of input samples to process per call.
Returns:
The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if blockSize is not a multiple of M.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to the array of state variables. pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples passed to arm_fir_decimate_q31(). M is the decimation factor.

Definition at line 67 of file arm_fir_decimate_init_q31.c.

void arm_fir_decimate_q31 | ( | const arm_fir_decimate_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q31 FIR decimator.

Parameters:
[in] | *S | points to an instance of the Q31 FIR decimator structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | blockSize | number of input samples to process per call.
Returns:
none

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2). After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
Refer to the function arm_fir_decimate_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.

Definition at line 64 of file arm_fir_decimate_q31.c.

void arm_fir_decimate_fast_q31 | ( | arm_fir_decimate_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *S | points to an instance of the Q31 FIR decimator structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | blockSize | number of input samples to process per call.
Returns:
none

Scaling and Overflow Behavior:

This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are added to a 2.30 accumulator. Finally, the accumulator is saturated and converted to a 1.31 result. The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).
Refer to the function arm_fir_decimate_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision. Both the slow and the fast versions use the same instance structure. Use the function arm_fir_decimate_init_q31() to initialize the filter structure.

Definition at line 65 of file arm_fir_decimate_fast_q31.c.

arm_status arm_fir_decimate_init_q15 | ( | arm_fir_decimate_instance_q15 * | S,
 |  | uint16_t | numTaps,
 |  | uint8_t | M,
 |  | q15_t * | pCoeffs,
 |  | q15_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q15 FIR decimator.

Parameters:
[in,out] | *S | points to an instance of the Q15 FIR decimator structure.
[in] | numTaps | number of coefficients in the filter.
[in] | M | decimation factor.
[in] | *pCoeffs | points to the filter coefficients.
[in] | *pState | points to the state buffer.
[in] | blockSize | number of input samples to process per call.
Returns:
The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if blockSize is not a multiple of M.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to the array of state variables. pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples to the call arm_fir_decimate_q15(). M is the decimation factor.

Definition at line 68 of file arm_fir_decimate_init_q15.c.

void arm_fir_decimate_q15 | ( | const arm_fir_decimate_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q15 FIR decimator.

Parameters:
[in] | *S | points to an instance of the Q15 FIR decimator structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the location where the output result is written.
[in] | blockSize | number of input samples to process per call.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.
Refer to the function arm_fir_decimate_fast_q15() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.

Definition at line 65 of file arm_fir_decimate_q15.c.

void arm_fir_decimate_fast_q15 | ( | const arm_fir_decimate_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *S | points to an instance of the Q15 FIR decimator structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data
[in] | blockSize | number of input samples to process per call.
Returns:
none

Scaling and Overflow Behavior:

This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (log2 is read as log to the base 2). The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
Refer to the function arm_fir_decimate_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure. Use the function arm_fir_decimate_init_q15() to initialize the filter structure.

Definition at line 63 of file arm_fir_decimate_fast_q15.c.

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CMSIS DSP Software Library: FIR Lowpass Filter Example

  • Examples

FIR Lowpass Filter Example
[Examples]

Description:
Removes high frequency signal components from the input using an FIR lowpass filter. The example demonstrates how to configure an FIR filter and then pass data through it in a block-by-block fashion.
Algorithm:
The input signal is a sum of two sine waves: 1 kHz and 15 kHz. This is processed by an FIR lowpass filter with cutoff frequency 6 kHz. The lowpass filter eliminates the 15 kHz signal leaving only the 1 kHz sine wave at the output.
The lowpass filter was designed using MATLAB with a sample rate of 48 kHz and a length of 29 points. The MATLAB code to generate the filter coefficients is shown below:
     h = fir1(28, 6/24);
The first argument is the "order" of the filter and is always one less than the desired length. The second argument is the normalized cutoff frequency. This is in the range 0 (DC) to 1.0 (Nyquist). A 6 kHz cutoff with a Nyquist frequency of 24 kHz lies at a normalized frequency of 6/24 = 0.25. The CMSIS FIR filter function requires the coefficients to be in time reversed order.
     fliplr(h)
The resulting filter coefficients and are shown below. Note that the filter is symmetric (a property of linear phase FIR filters) and the point of symmetry is sample 14. Thus the filter will have a delay of 14 samples for all frequencies.
The frequency response of the filter is shown next. The passband gain of the filter is 1.0 and it reaches 0.5 at the cutoff frequency 6 kHz.
The input signal is shown below. The left hand side shows the signal in the time domain while the right hand side is a frequency domain representation. The two sine wave components can be clearly seen.
The output of the filter is shown below. The 15 kHz component has been eliminated.
Variables Description:
  • testInput_f32_1kHz_15kHz points to the input data
  • refOutput points to the reference output data
  • testOutput points to the test output data
  • firStateF32 points to state buffer
  • firCoeffs32 points to coefficient buffer
  • blockSize number of samples processed at a time
  • numBlocks number of frames
CMSIS DSP Software Library Functions Used:
  • arm_fir_init_f32()
  • arm_fir_f32()

Refer arm_fir_example_f32.c

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CMSIS DSP Software Library: Vector Fill

  • Examples
Functions

Vector Fill
[Support Functions]

Functions

void | arm_fill_f32 (float32_t value, float32_t *pDst, uint32_t blockSize)
void | arm_fill_q31 (q31_t value, q31_t *pDst, uint32_t blockSize)
void | arm_fill_q15 (q15_t value, q15_t *pDst, uint32_t blockSize)
void | arm_fill_q7 (q7_t value, q7_t *pDst, uint32_t blockSize)

Detailed Description

Fills the destination vector with a constant value.

     pDst[n] = value;   0 <= n < blockSize.

There are separate functions for floating point, Q31, Q15, and Q7 data types.

Function Documentation

void arm_fill_f32 | ( | float32_t | value,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Fills a constant value into a floating-point vector.

Parameters:
[in] | value | input value to be filled
[out] | *pDst | points to output vector
[in] | blockSize | length of the output vector
Returns:
none.
Examples:
arm_convolution_example_f32.c, and arm_variance_example_f32.c.

Definition at line 66 of file arm_fill_f32.c.

void arm_fill_q31 | ( | q31_t | value,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Fills a constant value into a Q31 vector.

Parameters:
[in] | value | input value to be filled
[out] | *pDst | points to output vector
[in] | blockSize | length of the output vector
Returns:
none.

Definition at line 53 of file arm_fill_q31.c.

void arm_fill_q15 | ( | q15_t | value,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Fills a constant value into a Q15 vector.

Parameters:
[in] | value | input value to be filled
[out] | *pDst | points to output vector
[in] | blockSize | length of the output vector
Returns:
none.

Definition at line 53 of file arm_fill_q15.c.

void arm_fill_q7 | ( | q7_t | value,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Fills a constant value into a Q7 vector.

Parameters:
[in] | value | input value to be filled
[out] | *pDst | points to output vector
[in] | blockSize | length of the output vector
Returns:
none.

Definition at line 53 of file arm_fill_q7.c.

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CMSIS DSP Software Library: Frequency Bin Example

  • Examples

Frequency Bin Example
[Examples]

Description
Demonstrates the calculation of the maximum energy bin in the frequency domain of the input signal with the use of Complex FFT, Complex Magnitude, and Maximum functions.
Algorithm:
The input test signal contains a 10 kHz signal with uniformly distributed white noise. Calculating the FFT of the input signal will give us the maximum energy of the bin corresponding to the input frequency of 10 kHz.
Block Diagram:

Block Diagram

The figure below shows the time domain signal of 10 kHz signal with uniformly distributed white noise, and the next figure shows the input in the frequency domain. The bin with maximum energy corresponds to 10 kHz signal.

Input signal in Time domain

Input signal in Frequency domain

Variables Description:
  • testInput_f32_10khz points to the input data
  • testOutput points to the output data
  • fftSize length of FFT
  • ifftFlag flag for the selection of CFFT/CIFFT
  • doBitReverse Flag for selection of normal order or bit reversed order
  • refIndex reference index value at which maximum energy of bin ocuurs
  • testIndex calculated index value at which maximum energy of bin ocuurs
CMSIS DSP Software Library Functions Used:
  • arm_cfft_radix4_init_f32()
  • arm_cfft_radix4_f32()
  • arm_cmplx_mag_f32()
  • arm_max_f32()

Refer arm_fft_bin_example_f32.c

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CMSIS DSP Software Library: Graphic Audio Equalizer Example

  • Examples

Graphic Audio Equalizer Example
[Examples]

Description:
This example demonstrates how a 5-band graphic equalizer can be constructed using the Biquad cascade functions. A graphic equalizer is used in audio applications to vary the tonal quality of the audio.
Block Diagram:
The design is based on a cascade of 5 filter sections.
Each filter section is 4th order and consists of a cascade of two Biquads. Each filter has a nominal gain of 0 dB (1.0 in linear units) and boosts or cuts signals within a specific frequency range. The edge frequencies between the 5 bands are 100, 500, 2000, and 6000 Hz. Each band has an adjustable boost or cut in the range of +/- 9 dB. For example, the band that extends from 500 to 2000 Hz has the response shown below:
With 1 dB steps, each filter has a total of 19 different settings. The filter coefficients for all possible 19 settings were precomputed in MATLAB and stored in a table. With 5 different tables, there are a total of 5 x 19 = 95 different 4th order filters. All 95 responses are shown below:
Each 4th order filter has 10 coefficents for a grand total of 950 different filter coefficients that must be tabulated. The input and output data is in Q31 format. For better noise performance, the two low frequency bands are implemented using the high precision 32x64-bit Biquad filters. The remaining 3 high frequency bands use standard 32x32-bit Biquad filters. The input signal used in the example is a logarithmic chirp.
The array bandGains specifies the gain in dB to apply in each band. For example, if bandGains={0, -3, 6, 4, -6}; then the output signal will be:
Note:
The output chirp signal follows the gain or boost of each band.
Variables Description:
  • testInput_f32 points to the input data
  • testRefOutput_f32 points to the reference output data
  • testOutput points to the test output data
  • inputQ31 temporary input buffer
  • outputQ31 temporary output buffer
  • biquadStateBand1Q31 points to state buffer for band1
  • biquadStateBand2Q31 points to state buffer for band2
  • biquadStateBand3Q31 points to state buffer for band3
  • biquadStateBand4Q31 points to state buffer for band4
  • biquadStateBand5Q31 points to state buffer for band5
  • coeffTable points to coefficient buffer for all bands
  • gainDB gain buffer which has gains applied for all the bands
CMSIS DSP Software Library Functions Used:
  • arm_biquad_cas_df1_32x64_init_q31()
  • arm_biquad_cas_df1_32x64_q31()
  • arm_biquad_cascade_df1_init_q31()
  • arm_biquad_cascade_df1_q31()
  • arm_scale_q31()
  • arm_scale_f32()
  • arm_float_to_q31()
  • arm_q31_to_float()

Refer arm_graphic_equalizer_example_q31.c

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CMSIS DSP Software Library: Infinite Impulse Response (IIR) Lattice Filters

  • Examples
Functions

Infinite Impulse Response (IIR) Lattice Filters
[Filtering Functions]

Functions

void | arm_iir_lattice_init_f32 (arm_iir_lattice_instance_f32 *S, uint16_t numStages, float32_t *pkCoeffs, float32_t *pvCoeffs, float32_t *pState, uint32_t blockSize)
void | arm_iir_lattice_f32 (const arm_iir_lattice_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | arm_iir_lattice_init_q31 (arm_iir_lattice_instance_q31 *S, uint16_t numStages, q31_t *pkCoeffs, q31_t *pvCoeffs, q31_t *pState, uint32_t blockSize)
void | arm_iir_lattice_q31 (const arm_iir_lattice_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_iir_lattice_init_q15 (arm_iir_lattice_instance_q15 *S, uint16_t numStages, q15_t *pkCoeffs, q15_t *pvCoeffs, q15_t *pState, uint32_t blockSize)
void | arm_iir_lattice_q15 (const arm_iir_lattice_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)

Detailed Description

This set of functions implements lattice filters for Q15, Q31 and floating-point data types. Lattice filters are used in a variety of adaptive filter applications. The filter structure has feedforward and feedback components and the net impulse response is infinite length. The functions operate on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc and pDst point to input and output arrays containing blockSize values.

Algorithm:

Infinite Impulse Response Lattice filter

    fN(n)   =  x(n)
    fm-1(n) = fm(n) - km * gm-1(n-1)   for m = N, N-1, ...1
    gm(n)   = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ...1
    y(n)    = vN * gN(n) + vN-1 * gN-1(n) + ...+ v0 * g0(n)
pkCoeffs points to array of reflection coefficients of size numStages. Reflection coefficients are stored in time-reversed order.

    {kN, kN-1, ....k1}
pvCoeffs points to the array of ladder coefficients of size (numStages+1). Ladder coefficients are stored in time-reversed order.

    {vN, vN-1, ...v0}
pState points to a state array of size numStages + blockSize. The state variables shown in the figure above (the g values) are stored in the pState array. The state variables are updated after each block of data is processed; the coefficients are untouched.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. There are separate instance structure declarations for each of the 3 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:

arm_iir_lattice_instance_f32 S = {numStages, pState, pkCoeffs, pvCoeffs};
arm_iir_lattice_instance_q31 S = {numStages, pState, pkCoeffs, pvCoeffs};
arm_iir_lattice_instance_q15 S = {numStages, pState, pkCoeffs, pvCoeffs};
where numStages is the number of stages in the filter; pState points to the state buffer array; pkCoeffs points to array of the reflection coefficients; pvCoeffs points to the array of ladder coefficients.
Fixed-Point Behavior
Care must be taken when using the fixed-point versions of the IIR lattice filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.

Function Documentation

void arm_iir_lattice_init_f32 | ( | arm_iir_lattice_instance_f32 * | S,
 |  | uint16_t | numStages,
 |  | float32_t * | pkCoeffs,
 |  | float32_t * | pvCoeffs,
 |  | float32_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the floating-point IIR lattice filter.

Parameters:
[in] | *S | points to an instance of the floating-point IIR lattice structure.
[in] | numStages | number of stages in the filter.
[in] | *pkCoeffs | points to the reflection coefficient buffer. The array is of length numStages.
[in] | *pvCoeffs | points to the ladder coefficient buffer. The array is of length numStages+1.
[in] | *pState | points to the state buffer. The array is of length numStages+blockSize.
[in] | blockSize | number of samples to process.
Returns:
none.

Definition at line 55 of file arm_iir_lattice_init_f32.c.

void arm_iir_lattice_f32 | ( | const arm_iir_lattice_instance_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the floating-point IIR lattice filter.

Parameters:
[in] | *S | points to an instance of the floating-point IIR lattice structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process.
Returns:
none.

Definition at line 120 of file arm_iir_lattice_f32.c.

void arm_iir_lattice_init_q31 | ( | arm_iir_lattice_instance_q31 * | S,
 |  | uint16_t | numStages,
 |  | q31_t * | pkCoeffs,
 |  | q31_t * | pvCoeffs,
 |  | q31_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q31 IIR lattice filter.

Parameters:
[in] | *S | points to an instance of the Q31 IIR lattice structure.
[in] | numStages | number of stages in the filter.
[in] | *pkCoeffs | points to the reflection coefficient buffer. The array is of length numStages.
[in] | *pvCoeffs | points to the ladder coefficient buffer. The array is of length numStages+1.
[in] | *pState | points to the state buffer. The array is of length numStages+blockSize.
[in] | blockSize | number of samples to process.
Returns:
none.

Definition at line 55 of file arm_iir_lattice_init_q31.c.

void arm_iir_lattice_q31 | ( | const arm_iir_lattice_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q31 IIR lattice filter.

Parameters:
[in] | *S | points to an instance of the Q31 IIR lattice structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 2*log2(numStages) bits. After all multiply-accumulates are performed, the 2.62 accumulator is saturated to 1.32 format and then truncated to 1.31 format.

Definition at line 62 of file arm_iir_lattice_q31.c.

void arm_iir_lattice_init_q15 | ( | arm_iir_lattice_instance_q15 * | S,
 |  | uint16_t | numStages,
 |  | q15_t * | pkCoeffs,
 |  | q15_t * | pvCoeffs,
 |  | q15_t * | pState,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for the Q15 IIR lattice filter.

Parameters:
[in] | *S | points to an instance of the Q15 IIR lattice structure.
[in] | numStages | number of stages in the filter.
[in] | *pkCoeffs | points to reflection coefficient buffer. The array is of length numStages.
[in] | *pvCoeffs | points to ladder coefficient buffer. The array is of length numStages+1.
[in] | *pState | points to state buffer. The array is of length numStages+blockSize.
[in] | blockSize | number of samples to process per call.
Returns:
none.

Definition at line 55 of file arm_iir_lattice_init_q15.c.

void arm_iir_lattice_q15 | ( | const arm_iir_lattice_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for the Q15 IIR lattice filter.

Parameters:
[in] | *S | points to an instance of the Q15 IIR lattice structure.
[in] | *pSrc | points to the block of input data.
[out] | *pDst | points to the block of output data.
[in] | blockSize | number of samples to process.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.

Definition at line 63 of file arm_iir_lattice_q15.c.

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CMSIS DSP Software Library: Least Mean Square (LMS) Filters

  • Examples
Functions

Least Mean Square (LMS) Filters
[Filtering Functions]

Functions

void | arm_lms_init_f32 (arm_lms_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, float32_t mu, uint32_t blockSize)
void | arm_lms_f32 (const arm_lms_instance_f32 *S, float32_t *pSrc, float32_t *pRef, float32_t *pOut, float32_t *pErr, uint32_t blockSize)
void | arm_lms_init_q31 (arm_lms_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, q31_t mu, uint32_t blockSize, uint32_t postShift)
void | arm_lms_q31 (const arm_lms_instance_q31 *S, q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize)
void | arm_lms_init_q15 (arm_lms_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, q15_t mu, uint32_t blockSize, uint32_t postShift)
void | arm_lms_q15 (const arm_lms_instance_q15 *S, q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize)

Detailed Description

LMS filters are a class of adaptive filters that are able to "learn" an unknown transfer functions. LMS filters use a gradient descent method in which the filter coefficients are updated based on the instantaneous error signal. Adaptive filters are often used in communication systems, equalizers, and noise removal. The CMSIS DSP Library contains LMS filter functions that operate on Q15, Q31, and floating-point data types. The library also contains normalized LMS filters in which the filter coefficient adaptation is indepedent of the level of the input signal.

An LMS filter consists of two components as shown below. The first component is a standard transversal or FIR filter. The second component is a coefficient update mechanism. The LMS filter has two input signals. The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter. That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input. The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input. This "error signal" tends towards zero as the filter adapts. The LMS processing functions accept the input and reference input signals and generate the filter output and error signal.

Internal structure of the Least Mean Square filter

The functions operate on blocks of data and each call to the function processes blockSize samples through the filter. pSrc points to input signal, pRef points to reference signal, pOut points to output signal and pErr points to error signal. All arrays contain blockSize values.

The functions operate on a block-by-block basis. Internally, the filter coefficients b[n] are updated on a sample-by-sample basis. The convergence of the LMS filter is slower compared to the normalized LMS algorithm.

Algorithm:
The output signal y[n] is computed by a standard FIR filter:

     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
The error signal equals the difference between the reference signal d[n] and the filter output:

     e[n] = d[n] - y[n].
After each sample of the error signal is computed, the filter coefficients b[k] are updated on a sample-by-sample basis:

     b[k] = b[k] + e[n] * mu * x[n-k],  for k=0, 1, ..., numTaps-1
where mu is the step size and controls the rate of coefficient convergence.
In the APIs, pCoeffs points to a coefficient array of size numTaps. Coefficients are stored in time reversed order.

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to a state array of size numTaps + blockSize - 1. Samples in the state buffer are stored in the order:

    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1 samples. The increased state buffer length allows circular addressing, which is traditionally used in FIR filters, to be avoided and yields a significant speed improvement. The state variables are updated after each block of data is processed.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter and coefficient and state arrays cannot be shared among instances. There are separate instance structure declarations for each of the 3 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. The code below statically initializes each of the 3 different data type filter instance structures

    arm_lms_instance_f32 S = {numTaps, pState, pCoeffs, mu};
    arm_lms_instance_q31 S = {numTaps, pState, pCoeffs, mu, postShift};
    arm_lms_instance_q15 S = {numTaps, pState, pCoeffs, mu, postShift};
where numTaps is the number of filter coefficients in the filter; pState is the address of the state buffer; pCoeffs is the address of the coefficient buffer; mu is the step size parameter; and postShift is the shift applied to coefficients.
Fixed-Point Behavior:
Care must be taken when using the Q15 and Q31 versions of the LMS filter. The following issues must be considered:
  • Scaling of coefficients
  • Overflow and saturation
Scaling of Coefficients:
Filter coefficients are represented as fractional values and coefficients are restricted to lie in the range [-1 +1). The fixed-point functions have an additional scaling parameter postShift. At the output of the filter's accumulator is a shift register which shifts the result by postShift bits. This essentially scales the filter coefficients by 2^postShift and allows the filter coefficients to exceed the range [+1 -1). The value of postShift is set by the user based on the expected gain through the system being modeled.
Overflow and Saturation:
Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are described separately as part of the function specific documentation below.

Function Documentation

void arm_lms_init_f32 | ( | arm_lms_instance_f32 * | S,
 |  | uint16_t | numTaps,
 |  | float32_t * | pCoeffs,
 |  | float32_t * | pState,
 |  | float32_t | mu,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for floating-point LMS filter.

Parameters:
[in] | *S | points to an instance of the floating-point LMS filter structure.
[in] | numTaps | number of filter coefficients.
[in] | *pCoeffs | points to the coefficient buffer.
[in] | *pState | points to state buffer.
[in] | mu | step size that controls filter coefficient updates.
[in] | blockSize | number of samples to process.
Returns:
none.
Description:
pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
The initial filter coefficients serve as a starting point for the adaptive filter. pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_f32().

Definition at line 61 of file arm_lms_init_f32.c.

void arm_lms_f32 | ( | const arm_lms_instance_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pRef,
 |  | float32_t * | pOut,
 |  | float32_t * | pErr,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for floating-point LMS filter.

This function operates on floating-point data types.

Parameters:
[in] | *S | points to an instance of the floating-point LMS filter structure.
[in] | *pSrc | points to the block of input data.
[in] | *pRef | points to the block of reference data.
[out] | *pOut | points to the block of output data.
[out] | *pErr | points to the block of error data.
[in] | blockSize | number of samples to process.
Returns:
none.

Definition at line 170 of file arm_lms_f32.c.

void arm_lms_init_q31 | ( | arm_lms_instance_q31 * | S,
 |  | uint16_t | numTaps,
 |  | q31_t * | pCoeffs,
 |  | q31_t * | pState,
 |  | q31_t | mu,
 |  | uint32_t | blockSize,
 |  | uint32_t | postShift
 | ) |  |

Initialization function for Q31 LMS filter.

Parameters:
[in] | *S | points to an instance of the Q31 LMS filter structure.
[in] | numTaps | number of filter coefficients.
[in] | *pCoeffs | points to coefficient buffer.
[in] | *pState | points to state buffer.
[in] | mu | step size that controls filter coefficient updates.
[in] | blockSize | number of samples to process.
[in] | postShift | bit shift applied to coefficients.
Returns:
none.
Description:
pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
The initial filter coefficients serve as a starting point for the adaptive filter. pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_q31().

Definition at line 66 of file arm_lms_init_q31.c.

void arm_lms_q31 | ( | const arm_lms_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pRef,
 |  | q31_t * | pOut,
 |  | q31_t * | pErr,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for Q31 LMS filter.

Parameters:
[in] | *S | points to an instance of the Q15 LMS filter structure.
[in] | *pSrc | points to the block of input data.
[in] | *pRef | points to the block of reference data.
[out] | *pOut | points to the block of output data.
[out] | *pErr | points to the block of error data.
[in] | blockSize | number of samples to process.
Returns:
none.
Scaling and Overflow Behavior:
The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clips. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. The reference signal should not be scaled down. After all multiply-accumulates are performed, the 2.62 accumulator is shifted and saturated to 1.31 format to yield the final result. The output signal and error signal are in 1.31 format.
In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.

Definition at line 69 of file arm_lms_q31.c.

void arm_lms_init_q15 | ( | arm_lms_instance_q15 * | S,
 |  | uint16_t | numTaps,
 |  | q15_t * | pCoeffs,
 |  | q15_t * | pState,
 |  | q15_t | mu,
 |  | uint32_t | blockSize,
 |  | uint32_t | postShift
 | ) |  |

Initialization function for the Q15 LMS filter.

Parameters:
[in] | *S | points to an instance of the Q15 LMS filter structure.
[in] | numTaps | number of filter coefficients.
[in] | *pCoeffs | points to the coefficient buffer.
[in] | *pState | points to the state buffer.
[in] | mu | step size that controls filter coefficient updates.
[in] | blockSize | number of samples to process.
[in] | postShift | bit shift applied to coefficients.
Returns:
none.
Description:
pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
The initial filter coefficients serve as a starting point for the adaptive filter. pState points to the array of state variables and size of array is numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_q15().

Definition at line 66 of file arm_lms_init_q15.c.

void arm_lms_q15 | ( | const arm_lms_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pRef,
 |  | q15_t * | pOut,
 |  | q15_t * | pErr,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for Q15 LMS filter.

Parameters:
[in] | *S | points to an instance of the Q15 LMS filter structure.
[in] | *pSrc | points to the block of input data.
[in] | *pRef | points to the block of reference data.
[out] | *pOut | points to the block of output data.
[out] | *pErr | points to the block of error data.
[in] | blockSize | number of samples to process.
Returns:
none.
Scaling and Overflow Behavior:
The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.
In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.

Definition at line 66 of file arm_lms_q15.c.

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CMSIS DSP Software Library: Normalized LMS Filters

  • Examples
Functions

Normalized LMS Filters
[Filtering Functions]

Functions

void | arm_lms_norm_init_f32 (arm_lms_norm_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, float32_t mu, uint32_t blockSize)
void | arm_lms_norm_f32 (arm_lms_norm_instance_f32 *S, float32_t *pSrc, float32_t *pRef, float32_t *pOut, float32_t *pErr, uint32_t blockSize)
void | arm_lms_norm_init_q31 (arm_lms_norm_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, q31_t mu, uint32_t blockSize, uint8_t postShift)
void | arm_lms_norm_q31 (arm_lms_norm_instance_q31 *S, q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize)
void | arm_lms_norm_init_q15 (arm_lms_norm_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, q15_t mu, uint32_t blockSize, uint8_t postShift)
void | arm_lms_norm_q15 (arm_lms_norm_instance_q15 *S, q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize)

Detailed Description

This set of functions implements a commonly used adaptive filter. It is related to the Least Mean Square (LMS) adaptive filter and includes an additional normalization factor which increases the adaptation rate of the filter. The CMSIS DSP Library contains normalized LMS filter functions that operate on Q15, Q31, and floating-point data types.

A normalized least mean square (NLMS) filter consists of two components as shown below. The first component is a standard transversal or FIR filter. The second component is a coefficient update mechanism. The NLMS filter has two input signals. The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter. That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input. The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input. This "error signal" tends towards zero as the filter adapts. The NLMS processing functions accept the input and reference input signals and generate the filter output and error signal.

Internal structure of the NLMS adaptive filter

The functions operate on blocks of data and each call to the function processes blockSize samples through the filter. pSrc points to input signal, pRef points to reference signal, pOut points to output signal and pErr points to error signal. All arrays contain blockSize values.

The functions operate on a block-by-block basis. Internally, the filter coefficients b[n] are updated on a sample-by-sample basis. The convergence of the LMS filter is slower compared to the normalized LMS algorithm.

Algorithm:
The output signal y[n] is computed by a standard FIR filter:

     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
The error signal equals the difference between the reference signal d[n] and the filter output:

     e[n] = d[n] - y[n].
After each sample of the error signal is computed the instanteous energy of the filter state variables is calculated:

    E = x[n]^2 + x[n-1]^2 + ... + x[n-numTaps+1]^2.
The filter coefficients b[k] are then updated on a sample-by-sample basis:

     b[k] = b[k] + e[n] * (mu/E) * x[n-k],  for k=0, 1, ..., numTaps-1
where mu is the step size and controls the rate of coefficient convergence.
In the APIs, pCoeffs points to a coefficient array of size numTaps. Coefficients are stored in time reversed order.

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
pState points to a state array of size numTaps + blockSize - 1. Samples in the state buffer are stored in the order:

    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1 samples. The increased state buffer length allows circular addressing, which is traditionally used in FIR filters, to be avoided and yields a significant speed improvement. The state variables are updated after each block of data is processed.
Instance Structure
The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter and coefficient and state arrays cannot be shared among instances. There are separate instance structure declarations for each of the 3 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Zeros out the values in the state buffer.
Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
Fixed-Point Behavior:
Care must be taken when using the Q15 and Q31 versions of the normalised LMS filter. The following issues must be considered:
  • Scaling of coefficients
  • Overflow and saturation
Scaling of Coefficients:
Filter coefficients are represented as fractional values and coefficients are restricted to lie in the range [-1 +1). The fixed-point functions have an additional scaling parameter postShift. At the output of the filter's accumulator is a shift register which shifts the result by postShift bits. This essentially scales the filter coefficients by 2^postShift and allows the filter coefficients to exceed the range [+1 -1). The value of postShift is set by the user based on the expected gain through the system being modeled.
Overflow and Saturation:
Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are described separately as part of the function specific documentation below.

Function Documentation

void arm_lms_norm_init_f32 | ( | arm_lms_norm_instance_f32 * | S,
 |  | uint16_t | numTaps,
 |  | float32_t * | pCoeffs,
 |  | float32_t * | pState,
 |  | float32_t | mu,
 |  | uint32_t | blockSize
 | ) |  |

Initialization function for floating-point normalized LMS filter.

Parameters:
[in] | *S | points to an instance of the floating-point LMS filter structure.
[in] | numTaps | number of filter coefficients.
[in] | *pCoeffs | points to coefficient buffer.
[in] | *pState | points to state buffer.
[in] | mu | step size that controls filter coefficient updates.
[in] | blockSize | number of samples to process.
Returns:
none.
Description:
pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
The initial filter coefficients serve as a starting point for the adaptive filter. pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_norm_f32().
Examples:
arm_signal_converge_example_f32.c.

Definition at line 64 of file arm_lms_norm_init_f32.c.

void arm_lms_norm_f32 | ( | arm_lms_norm_instance_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pRef,
 |  | float32_t * | pOut,
 |  | float32_t * | pErr,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for floating-point normalized LMS filter.

Parameters:
[in] | *S | points to an instance of the floating-point normalized LMS filter structure.
[in] | *pSrc | points to the block of input data.
[in] | *pRef | points to the block of reference data.
[out] | *pOut | points to the block of output data.
[out] | *pErr | points to the block of error data.
[in] | blockSize | number of samples to process.
Returns:
none.
Examples:
arm_signal_converge_example_f32.c.

Definition at line 160 of file arm_lms_norm_f32.c.

void arm_lms_norm_init_q31 | ( | arm_lms_norm_instance_q31 * | S,
 |  | uint16_t | numTaps,
 |  | q31_t * | pCoeffs,
 |  | q31_t * | pState,
 |  | q31_t | mu,
 |  | uint32_t | blockSize,
 |  | uint8_t | postShift
 | ) |  |

Initialization function for Q31 normalized LMS filter.

Parameters:
[in] | *S | points to an instance of the Q31 normalized LMS filter structure.
[in] | numTaps | number of filter coefficients.
[in] | *pCoeffs | points to coefficient buffer.
[in] | *pState | points to state buffer.
[in] | mu | step size that controls filter coefficient updates.
[in] | blockSize | number of samples to process.
[in] | postShift | bit shift applied to coefficients.
Returns:
none.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
The initial filter coefficients serve as a starting point for the adaptive filter. pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_norm_q31().

Definition at line 63 of file arm_lms_norm_init_q31.c.

void arm_lms_norm_q31 | ( | arm_lms_norm_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pRef,
 |  | q31_t * | pOut,
 |  | q31_t * | pErr,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for Q31 normalized LMS filter.

Parameters:
[in] | *S | points to an instance of the Q31 normalized LMS filter structure.
[in] | *pSrc | points to the block of input data.
[in] | *pRef | points to the block of reference data.
[out] | *pOut | points to the block of output data.
[out] | *pErr | points to the block of error data.
[in] | blockSize | number of samples to process.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. The reference signal should not be scaled down. After all multiply-accumulates are performed, the 2.62 accumulator is shifted and saturated to 1.31 format to yield the final result. The output signal and error signal are in 1.31 format.
In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.

Definition at line 72 of file arm_lms_norm_q31.c.

void arm_lms_norm_init_q15 | ( | arm_lms_norm_instance_q15 * | S,
 |  | uint16_t | numTaps,
 |  | q15_t * | pCoeffs,
 |  | q15_t * | pState,
 |  | q15_t | mu,
 |  | uint32_t | blockSize,
 |  | uint8_t | postShift
 | ) |  |

Initialization function for Q15 normalized LMS filter.

Parameters:
[in] | *S | points to an instance of the Q15 normalized LMS filter structure.
[in] | numTaps | number of filter coefficients.
[in] | *pCoeffs | points to coefficient buffer.
[in] | *pState | points to state buffer.
[in] | mu | step size that controls filter coefficient updates.
[in] | blockSize | number of samples to process.
[in] | postShift | bit shift applied to coefficients.
Returns:
none.

Description:

pCoeffs points to the array of filter coefficients stored in time reversed order:

    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
The initial filter coefficients serve as a starting point for the adaptive filter. pState points to the array of state variables and size of array is numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_norm_q15().

Definition at line 64 of file arm_lms_norm_init_q15.c.

void arm_lms_norm_q15 | ( | arm_lms_norm_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pRef,
 |  | q15_t * | pOut,
 |  | q15_t * | pErr,
 |  | uint32_t | blockSize
 | ) |  |

Processing function for Q15 normalized LMS filter.

Parameters:
[in] | *S | points to an instance of the Q15 normalized LMS filter structure.
[in] | *pSrc | points to the block of input data.
[in] | *pRef | points to the block of reference data.
[out] | *pOut | points to the block of output data.
[out] | *pErr | points to the block of error data.
[in] | blockSize | number of samples to process.
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.
In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.

Definition at line 71 of file arm_lms_norm_q15.c.

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CMSIS DSP Software Library: Linear Interpolate Example

  • Examples

Linear Interpolate Example
[Examples]

CMSIS DSP Software Library -- Linear Interpolate Example

Description This example demonstrates usage of linear interpolate modules and fast math modules. Method 1 uses fast math sine function to calculate sine values using cubic interpolation and method 2 uses linear interpolation function and results are compared to reference output. Example shows linear interpolation function can be used to get higher precision compared to fast math sin calculation.

Block Diagram:

Method 1: Sine caluclation using fast math

Method 2: Sine caluclation using interpolation function

Variables Description:
  • testInputSin_f32 points to the input values for sine calculation
  • testRefSinOutput32_f32 points to the reference values caculated from sin() matlab function
  • testOutput points to output buffer calculation from cubic interpolation
  • testLinIntOutput points to output buffer calculation from linear interpolation
  • snr1 Signal to noise ratio for reference and cubic interpolation output
  • snr2 Signal to noise ratio for reference and linear interpolation output
CMSIS DSP Software Library Functions Used:
  • arm_sin_f32()
  • arm_linear_interp_f32()

Refer arm_linear_interp_example_f32.c

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CMSIS DSP Software Library: Linear Interpolation

  • Examples
Functions

Linear Interpolation
[Interpolation Functions]

Functions

static __INLINE float32_t | arm_linear_interp_f32 (arm_linear_interp_instance_f32 *S, float32_t x)
static __INLINE q31_t | arm_linear_interp_q31 (q31_t *pYData, q31_t x, uint32_t nValues)
static __INLINE q15_t | arm_linear_interp_q15 (q15_t *pYData, q31_t x, uint32_t nValues)
static __INLINE q7_t | arm_linear_interp_q7 (q7_t *pYData, q31_t x, uint32_t nValues)

Detailed Description

Linear interpolation is a method of curve fitting using linear polynomials. Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line

Linear interpolation

A Linear Interpolate function calculates an output value(y), for the input(x) using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values)
Algorithm:
       y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
       where x0, x1 are nearest values of input x
             y0, y1 are nearest values to output y
This set of functions implements Linear interpolation process for Q7, Q15, Q31, and floating-point data types. The functions operate on a single sample of data and each call to the function returns a single processed value. S points to an instance of the Linear Interpolate function data structure. x is the input sample value. The functions returns the output value.
if x is outside of the table boundary, Linear interpolation returns first value of the table if x is below input range and returns last value of table if x is above range.

Function Documentation

static __INLINE float32_t arm_linear_interp_f32 | ( | arm_linear_interp_instance_f32 * | S,
 |  | float32_t | x
 | ) |  | [static]

Process function for the floating-point Linear Interpolation Function.

Parameters:
[in,out] | *S | is an instance of the floating-point Linear Interpolation structure
[in] | x | input sample to process
Returns:
y processed output sample.
Examples:
arm_linear_interp_example_f32.c.

Definition at line 5377 of file arm_math.h.

static __INLINE q31_t arm_linear_interp_q31 | ( | q31_t * | pYData,
 |  | q31_t | x,
 |  | uint32_t | nValues
 | ) |  | [static]

Process function for the Q31 Linear Interpolation Function.

Parameters:
[in] | *pYData | pointer to Q31 Linear Interpolation table
[in] | x | input sample to process
[in] | nValues | number of table values
Returns:
y processed output sample.
Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. This function can support maximum of table size 2^12.

Definition at line 5436 of file arm_math.h.

static __INLINE q15_t arm_linear_interp_q15 | ( | q15_t * | pYData,
 |  | q31_t | x,
 |  | uint32_t | nValues
 | ) |  | [static]

Process function for the Q15 Linear Interpolation Function.

Parameters:
[in] | *pYData | pointer to Q15 Linear Interpolation table
[in] | x | input sample to process
[in] | nValues | number of table values
Returns:
y processed output sample.
Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. This function can support maximum of table size 2^12.

Definition at line 5496 of file arm_math.h.

static __INLINE q7_t arm_linear_interp_q7 | ( | q7_t * | pYData,
 |  | q31_t | x,
 |  | uint32_t | nValues
 | ) |  | [static]

Process function for the Q7 Linear Interpolation Function.

Parameters:
[in] | *pYData | pointer to Q7 Linear Interpolation table
[in] | x | input sample to process
[in] | nValues | number of table values
Returns:
y processed output sample.
Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. This function can support maximum of table size 2^12.

Definition at line 5553 of file arm_math.h.

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CMSIS DSP Software Library: Matrix Addition

  • Examples
Functions

Matrix Addition
[Matrix Functions]

Functions

arm_status | arm_mat_add_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
arm_status | arm_mat_add_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
arm_status | arm_mat_add_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst)

Detailed Description

Adds two matrices.

Addition of two 3 x 3 matrices

The functions check to make sure that pSrcA, pSrcB, and pDst have the same number of rows and columns.

Function Documentation

arm_status arm_mat_add_f32 | ( | const arm_matrix_instance_f32 * | pSrcA,
 |  | const arm_matrix_instance_f32 * | pSrcB,
 |  | arm_matrix_instance_f32 * | pDst
 | ) |  |

Floating-point matrix addition.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Definition at line 68 of file arm_mat_add_f32.c.

arm_status arm_mat_add_q31 | ( | const arm_matrix_instance_q31 * | pSrcA,
 |  | const arm_matrix_instance_q31 * | pSrcB,
 |  | arm_matrix_instance_q31 * | pDst
 | ) |  |

Q31 matrix addition.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.

Definition at line 61 of file arm_mat_add_q31.c.

arm_status arm_mat_add_q15 | ( | const arm_matrix_instance_q15 * | pSrcA,
 |  | const arm_matrix_instance_q15 * | pSrcB,
 |  | arm_matrix_instance_q15 * | pDst
 | ) |  |

Q15 matrix addition.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.

Definition at line 61 of file arm_mat_add_q15.c.

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CMSIS DSP Software Library: Matrix Example

  • Examples

Matrix Example
[Examples]

Description:
Demonstrates the use of Matrix Transpose, Matrix Muliplication, and Matrix Inverse functions to apply least squares fitting to input data. Least squares fitting is the procedure for finding the best-fitting curve that minimizes the sum of the squares of the offsets (least square error) from a given set of data.
Algorithm:
The linear combination of parameters considered is as follows:
A * X = B, where X is the unknown value and can be estimated from A & B.
The least squares estimate X is given by the following equation:
X = Inverse(AT * A) * AT * B
Block Diagram:
Variables Description:
  • A_f32 input matrix in the linear combination equation
  • B_f32 output matrix in the linear combination equation
  • X_f32 unknown matrix estimated using A_f32 & B_f32 matrices
CMSIS DSP Software Library Functions Used:
  • arm_mat_init_f32()
  • arm_mat_trans_f32()
  • arm_mat_mult_f32()
  • arm_mat_inverse_f32()

Refer arm_matrix_example_f32.c

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CMSIS DSP Software Library: Matrix Initialization

  • Examples
Functions

Matrix Initialization
[Matrix Functions]

Functions

void | arm_mat_init_f32 (arm_matrix_instance_f32 *S, uint16_t nRows, uint16_t nColumns, float32_t *pData)
void | arm_mat_init_q31 (arm_matrix_instance_q31 *S, uint16_t nRows, uint16_t nColumns, q31_t *pData)
void | arm_mat_init_q15 (arm_matrix_instance_q15 *S, uint16_t nRows, uint16_t nColumns, q15_t *pData)

Detailed Description

Initializes the underlying matrix data structure. The functions set the numRows, numCols, and pData fields of the matrix data structure.

Function Documentation

void arm_mat_init_f32 | ( | arm_matrix_instance_f32 * | S,
 |  | uint16_t | nRows,
 |  | uint16_t | nColumns,
 |  | float32_t * | pData
 | ) |  |

Floating-point matrix initialization.

Parameters:
[in,out] | *S | points to an instance of the floating-point matrix structure.
[in] | nRows | number of rows in the matrix.
[in] | nColumns | number of columns in the matrix.
[in] | *pData | points to the matrix data array.
Returns:
none
Examples:
arm_class_marks_example_f32.c, and arm_matrix_example_f32.c.

Definition at line 65 of file arm_mat_init_f32.c.

void arm_mat_init_q31 | ( | arm_matrix_instance_q31 * | S,
 |  | uint16_t | nRows,
 |  | uint16_t | nColumns,
 |  | q31_t * | pData
 | ) |  |

Q31 matrix initialization.

Parameters:
[in,out] | *S | points to an instance of the floating-point matrix structure.
[in] | nRows | number of rows in the matrix.
[in] | nColumns | number of columns in the matrix.
[in] | *pData | points to the matrix data array.
Returns:
none

Definition at line 61 of file arm_mat_init_q31.c.

void arm_mat_init_q15 | ( | arm_matrix_instance_q15 * | S,
 |  | uint16_t | nRows,
 |  | uint16_t | nColumns,
 |  | q15_t * | pData
 | ) |  |

Q15 matrix initialization.

Parameters:
[in,out] | *S | points to an instance of the floating-point matrix structure.
[in] | nRows | number of rows in the matrix.
[in] | nColumns | number of columns in the matrix.
[in] | *pData | points to the matrix data array.
Returns:
none

Definition at line 57 of file arm_mat_init_q15.c.

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CMSIS DSP Software Library: Matrix Inverse

  • Examples
Functions

Matrix Inverse
[Matrix Functions]

Functions

arm_status arm_mat_inverse_f32 (const arm_matrix_instance_f32 *pSrc, arm_matrix_instance_f32 *pDst)

Detailed Description

Computes the inverse of a matrix.

The inverse is defined only if the input matrix is square and non-singular (the determinant is non-zero). The function checks that the input and output matrices are square and of the same size.

Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix inversion of floating-point matrices.

Algorithm
The Gauss-Jordan method is used to find the inverse. The algorithm performs a sequence of elementary row-operations till it reduces the input matrix to an identity matrix. Applying the same sequence of elementary row-operations to an identity matrix yields the inverse matrix. If the input matrix is singular, then the algorithm terminates and returns error status ARM_MATH_SINGULAR.

Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method

Function Documentation

arm_status arm_mat_inverse_f32 | ( | const arm_matrix_instance_f32 * | pSrc,
 |  | arm_matrix_instance_f32 * | pDst
 | ) |  |

Floating-point matrix inverse.

Parameters:
[in] | *pSrc | points to input matrix structure
[out] | *pDst | points to output matrix structure
Returns:
The function returns ARM_MATH_SIZE_MISMATCH if the input matrix is not square or if the size of the output matrix does not match the size of the input matrix. If the input matrix is found to be singular (non-invertible), then the function returns ARM_MATH_SINGULAR. Otherwise, the function returns ARM_MATH_SUCCESS.
Examples:
arm_matrix_example_f32.c.

Definition at line 74 of file arm_mat_inverse_f32.c.

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CMSIS DSP Software Library: Matrix Multiplication

  • Examples
Functions

Matrix Multiplication
[Matrix Functions]

Functions

arm_status | arm_mat_mult_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
arm_status | arm_mat_mult_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
arm_status | arm_mat_mult_fast_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
arm_status | arm_mat_mult_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pState)
arm_status | arm_mat_mult_fast_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pState)

Detailed Description

Multiplies two matrices.

Multiplication of two 3 x 3 matrices

Matrix multiplication is only defined if the number of columns of the first matrix equals the number of rows of the second matrix. Multiplying an M x N matrix with an N x P matrix results in an M x P matrix. When matrix size checking is enabled, the functions check: (1) that the inner dimensions of pSrcA and pSrcB are equal; and (2) that the size of the output matrix equals the outer dimensions of pSrcA and pSrcB.

Function Documentation

arm_status arm_mat_mult_f32 | ( | const arm_matrix_instance_f32 * | pSrcA,
 |  | const arm_matrix_instance_f32 * | pSrcB,
 |  | arm_matrix_instance_f32 * | pDst
 | ) |  |

Floating-point matrix multiplication.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
Examples:
arm_class_marks_example_f32.c, and arm_matrix_example_f32.c.

Definition at line 73 of file arm_mat_mult_f32.c.

arm_status arm_mat_mult_q31 | ( | const arm_matrix_instance_q31 * | pSrcA,
 |  | const arm_matrix_instance_q31 * | pSrcB,
 |  | arm_matrix_instance_q31 * | pDst
 | ) |  |

Q31 matrix multiplication.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. The input is thus scaled down by log2(numColsA) bits to avoid overflows, as a total of numColsA additions are performed internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
See arm_mat_mult_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.

Definition at line 73 of file arm_mat_mult_q31.c.

arm_status arm_mat_mult_fast_q31 | ( | const arm_matrix_instance_q31 * | pSrcA,
 |  | const arm_matrix_instance_q31 * | pSrcB,
 |  | arm_matrix_instance_q31 * | pDst
 | ) |  |

Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Scaling and Overflow Behavior:

The difference between the function arm_mat_mult_q31() and this fast variant is that the fast variant use a 32-bit rather than a 64-bit accumulator. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.31 result.
The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. Scale down one of the input matrices by log2(numColsA) bits to avoid overflows, as a total of numColsA additions are computed internally for each output element.
See arm_mat_mult_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.

Definition at line 72 of file arm_mat_mult_fast_q31.c.

arm_status arm_mat_mult_q15 | ( | const arm_matrix_instance_q15 * | pSrcA,
 |  | const arm_matrix_instance_q15 * | pSrcB,
 |  | arm_matrix_instance_q15 * | pDst,
 |  | q15_t * | pState
 | ) |  |

Q15 matrix multiplication.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
[in] | *pState | points to the array for storing intermediate results
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. The inputs to the multiplications are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
Refer to arm_mat_mult_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.

Definition at line 74 of file arm_mat_mult_q15.c.

arm_status arm_mat_mult_fast_q15 | ( | const arm_matrix_instance_q15 * | pSrcA,
 |  | const arm_matrix_instance_q15 * | pSrcB,
 |  | arm_matrix_instance_q15 * | pDst,
 |  | q15_t * | pState
 | ) |  |

Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
[in] | *pState | points to the array for storing intermediate results
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Scaling and Overflow Behavior:

The difference between the function arm_mat_mult_q15() and this fast variant is that the fast variant use a 32-bit rather than a 64-bit accumulator. The result of each 1.15 x 1.15 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.15 result.
The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 16 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. Scale down one of the input matrices by log2(numColsA) bits to avoid overflows, as a total of numColsA additions are computed internally for each output element.
See arm_mat_mult_q15() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.

Definition at line 74 of file arm_mat_mult_fast_q15.c.

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CMSIS DSP Software Library: Matrix Scale

  • Examples
Functions

Matrix Scale
[Matrix Functions]

Functions

arm_status | arm_mat_scale_f32 (const arm_matrix_instance_f32 *pSrc, float32_t scale, arm_matrix_instance_f32 *pDst)
arm_status | arm_mat_scale_q31 (const arm_matrix_instance_q31 *pSrc, q31_t scaleFract, int32_t shift, arm_matrix_instance_q31 *pDst)
arm_status | arm_mat_scale_q15 (const arm_matrix_instance_q15 *pSrc, q15_t scaleFract, int32_t shift, arm_matrix_instance_q15 *pDst)

Detailed Description

Multiplies a matrix by a scalar. This is accomplished by multiplying each element in the matrix by the scalar. For example:

Matrix Scaling of a 3 x 3 matrix

The function checks to make sure that the input and output matrices are of the same size.

In the fixed-point Q15 and Q31 functions, scale is represented by a fractional multiplication scaleFract and an arithmetic shift shift. The shift allows the gain of the scaling operation to exceed 1.0. The overall scale factor applied to the fixed-point data is

     scale = scaleFract * 2^shift.

Function Documentation

arm_status arm_mat_scale_f32 | ( | const arm_matrix_instance_f32 * | pSrc,
 |  | float32_t | scale,
 |  | arm_matrix_instance_f32 * | pDst
 | ) |  |

Floating-point matrix scaling.

Parameters:
[in] | *pSrc | points to input matrix structure
[in] | scale | scale factor to be applied
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Definition at line 75 of file arm_mat_scale_f32.c.

arm_status arm_mat_scale_q31 | ( | const arm_matrix_instance_q31 * | pSrc,
 |  | q31_t | scaleFract,
 |  | int32_t | shift,
 |  | arm_matrix_instance_q31 * | pDst
 | ) |  |

Q31 matrix scaling.

Parameters:
[in] | *pSrc | points to input matrix
[in] | scaleFract | fractional portion of the scale factor
[in] | shift | number of bits to shift the result by
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Scaling and Overflow Behavior:

The input data *pSrc and scaleFract are in 1.31 format. These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.

Definition at line 63 of file arm_mat_scale_q31.c.

arm_status arm_mat_scale_q15 | ( | const arm_matrix_instance_q15 * | pSrc,
 |  | q15_t | scaleFract,
 |  | int32_t | shift,
 |  | arm_matrix_instance_q15 * | pDst
 | ) |  |

Q15 matrix scaling.

Parameters:
[in] | *pSrc | points to input matrix
[in] | scaleFract | fractional portion of the scale factor
[in] | shift | number of bits to shift the result by
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Scaling and Overflow Behavior:

The input data *pSrc and scaleFract are in 1.15 format. These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.

Definition at line 63 of file arm_mat_scale_q15.c.

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CMSIS DSP Software Library: Matrix Subtraction

  • Examples
Functions

Matrix Subtraction
[Matrix Functions]

Functions

arm_status | arm_mat_sub_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
arm_status | arm_mat_sub_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
arm_status | arm_mat_sub_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst)

Detailed Description

Subtract two matrices.

Subraction of two 3 x 3 matrices

The functions check to make sure that pSrcA, pSrcB, and pDst have the same number of rows and columns.

Function Documentation

arm_status arm_mat_sub_f32 | ( | const arm_matrix_instance_f32 * | pSrcA,
 |  | const arm_matrix_instance_f32 * | pSrcB,
 |  | arm_matrix_instance_f32 * | pDst
 | ) |  |

Floating-point matrix subtraction.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Definition at line 67 of file arm_mat_sub_f32.c.

arm_status arm_mat_sub_q31 | ( | const arm_matrix_instance_q31 * | pSrcA,
 |  | const arm_matrix_instance_q31 * | pSrcB,
 |  | arm_matrix_instance_q31 * | pDst
 | ) |  |

Q31 matrix subtraction.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.

Definition at line 62 of file arm_mat_sub_q31.c.

arm_status arm_mat_sub_q15 | ( | const arm_matrix_instance_q15 * | pSrcA,
 |  | const arm_matrix_instance_q15 * | pSrcB,
 |  | arm_matrix_instance_q15 * | pDst
 | ) |  |

Q15 matrix subtraction.

Parameters:
[in] | *pSrcA | points to the first input matrix structure
[in] | *pSrcB | points to the second input matrix structure
[out] | *pDst | points to output matrix structure
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.

Definition at line 61 of file arm_mat_sub_q15.c.

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CMSIS DSP Software Library: Matrix Transpose

  • Examples
Functions

Matrix Transpose
[Matrix Functions]

Functions

arm_status | arm_mat_trans_f32 (const arm_matrix_instance_f32 *pSrc, arm_matrix_instance_f32 *pDst)
arm_status | arm_mat_trans_q31 (const arm_matrix_instance_q31 *pSrc, arm_matrix_instance_q31 *pDst)
arm_status | arm_mat_trans_q15 (const arm_matrix_instance_q15 *pSrc, arm_matrix_instance_q15 *pDst)

Detailed Description

Tranposes a matrix. Transposing an M x N matrix flips it around the center diagonal and results in an N x M matrix.

Transpose of a 3 x 3 matrix

Function Documentation

arm_status arm_mat_trans_f32 | ( | const arm_matrix_instance_f32 * | pSrc,
 |  | arm_matrix_instance_f32 * | pDst
 | ) |  |

Floating-point matrix transpose.

Parameters:
[in] | *pSrc | points to the input matrix
[out] | *pDst | points to the output matrix
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
Examples:
arm_matrix_example_f32.c.

Definition at line 64 of file arm_mat_trans_f32.c.

arm_status arm_mat_trans_q31 | ( | const arm_matrix_instance_q31 * | pSrc,
 |  | arm_matrix_instance_q31 * | pDst
 | ) |  |

Q31 matrix transpose.

Parameters:
[in] | *pSrc | points to the input matrix
[out] | *pDst | points to the output matrix
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Definition at line 55 of file arm_mat_trans_q31.c.

arm_status arm_mat_trans_q15 | ( | const arm_matrix_instance_q15 * | pSrc,
 |  | arm_matrix_instance_q15 * | pDst
 | ) |  |

Q15 matrix transpose.

Parameters:
[in] | *pSrc | points to the input matrix
[out] | *pDst | points to the output matrix
Returns:
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.

Definition at line 55 of file arm_mat_trans_q15.c.

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CMSIS DSP Software Library: Maximum

  • Examples
Functions

Maximum
[Statistics Functions]

Functions

void | arm_max_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult, uint32_t *pIndex)
void | arm_max_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult, uint32_t *pIndex)
void | arm_max_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult, uint32_t *pIndex)
void | arm_max_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult, uint32_t *pIndex)

Detailed Description

Computes the maximum value of an array of data. The function returns both the maximum value and its position within the array. There are separate functions for floating-point, Q31, Q15, and Q7 data types.

Function Documentation

void arm_max_f32 | ( | float32_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | float32_t * | pResult,
 |  | uint32_t * | pIndex
 | ) |  |

Maximum value of a floating-point vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | maximum value returned here
[out] | *pIndex | index of maximum value returned here
Returns:
none.
Examples:
arm_class_marks_example_f32.c, and arm_fft_bin_example_f32.c.

Definition at line 59 of file arm_max_f32.c.

void arm_max_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q31_t * | pResult,
 |  | uint32_t * | pIndex
 | ) |  |

Maximum value of a Q31 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | maximum value returned here
[out] | *pIndex | index of maximum value returned here
Returns:
none.

Definition at line 51 of file arm_max_q31.c.

void arm_max_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q15_t * | pResult,
 |  | uint32_t * | pIndex
 | ) |  |

Maximum value of a Q15 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | maximum value returned here
[out] | *pIndex | index of maximum value returned here
Returns:
none.

Definition at line 51 of file arm_max_q15.c.

void arm_max_q7 | ( | q7_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q7_t * | pResult,
 |  | uint32_t * | pIndex
 | ) |  |

Maximum value of a Q7 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | maximum value returned here
[out] | *pIndex | index of maximum value returned here
Returns:
none.

Definition at line 51 of file arm_max_q7.c.

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CMSIS DSP Software Library: Minimum

  • Examples
Functions

Minimum
[Statistics Functions]

Functions

void | arm_min_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult, uint32_t *pIndex)
void | arm_min_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult, uint32_t *pIndex)
void | arm_min_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult, uint32_t *pIndex)
void | arm_min_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult, uint32_t *pIndex)

Detailed Description

Computes the minimum value of an array of data. The function returns both the minimum value and its position within the array. There are separate functions for floating-point, Q31, Q15, and Q7 data types.

Function Documentation

void arm_min_f32 | ( | float32_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | float32_t * | pResult,
 |  | uint32_t * | pIndex
 | ) |  |

Minimum value of a floating-point vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | minimum value returned here
[out] | *pIndex | index of minimum value returned here
Returns:
none.
Examples:
arm_class_marks_example_f32.c, and arm_signal_converge_example_f32.c.

Definition at line 60 of file arm_min_f32.c.

void arm_min_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q31_t * | pResult,
 |  | uint32_t * | pIndex
 | ) |  |

Minimum value of a Q31 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | minimum value returned here
[out] | *pIndex | index of minimum value returned here
Returns:
none.

Definition at line 53 of file arm_min_q31.c.

void arm_min_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q15_t * | pResult,
 |  | uint32_t * | pIndex
 | ) |  |

Minimum value of a Q15 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | minimum value returned here
[out] | *pIndex | index of minimum value returned here
Returns:
none.

Definition at line 53 of file arm_min_q15.c.

void arm_min_q7 | ( | q7_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q7_t * | pResult,
 |  | uint32_t * | pIndex
 | ) |  |

Minimum value of a Q7 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | minimum value returned here
[out] | *pIndex | index of minimum value returned here
Returns:
none.

Definition at line 52 of file arm_min_q7.c.

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CMSIS DSP Software Library: PID Motor Control

  • Examples
Functions

PID Motor Control
[Controller Functions]

Functions

void | arm_pid_reset_f32 (arm_pid_instance_f32 *S)
void | arm_pid_init_f32 (arm_pid_instance_f32 *S, int32_t resetStateFlag)
void | arm_pid_reset_q31 (arm_pid_instance_q31 *S)
void | arm_pid_init_q31 (arm_pid_instance_q31 *S, int32_t resetStateFlag)
void | arm_pid_reset_q15 (arm_pid_instance_q15 *S)
void | arm_pid_init_q15 (arm_pid_instance_q15 *S, int32_t resetStateFlag)
static __INLINE float32_t | arm_pid_f32 (arm_pid_instance_f32 *S, float32_t in)
static __INLINE q31_t | arm_pid_q31 (arm_pid_instance_q31 *S, q31_t in)
static __INLINE q15_t | arm_pid_q15 (arm_pid_instance_q15 *S, q15_t in)

Detailed Description

A Proportional Integral Derivative (PID) controller is a generic feedback control loop mechanism widely used in industrial control systems. A PID controller is the most commonly used type of feedback controller.

This set of functions implements (PID) controllers for Q15, Q31, and floating-point data types. The functions operate on a single sample of data and each call to the function returns a single processed value. S points to an instance of the PID control data structure. in is the input sample value. The functions return the output value.

Algorithm:
    y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
    A0 = Kp + Ki + Kd
    A1 = (-Kp ) - (2 * Kd )
    A2 = Kd
where Kp is proportional constant, Ki is Integral constant and Kd is Derivative constant

Proportional Integral Derivative Controller

The PID controller calculates an "error" value as the difference between the measured output and the reference input. The controller attempts to minimize the error by adjusting the process control inputs. The proportional value determines the reaction to the current error, the integral value determines the reaction based on the sum of recent errors, and the derivative value determines the reaction based on the rate at which the error has been changing.
Instance Structure
The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure. A separate instance structure must be defined for each PID Controller. There are separate instance structure declarations for each of the 3 supported data types.
Reset Functions
There is also an associated reset function for each data type which clears the state array.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains.
  • Zeros out the values in the state buffer.
Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
Fixed-Point Behavior
Care must be taken when using the fixed-point versions of the PID Controller functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.

Function Documentation

void arm_pid_reset_f32 ( arm_pid_instance_f32 * S )

Reset function for the floating-point PID Control.

Parameters:
[in] *S Instance pointer of PID control data structure.
Returns:
none.
Description:
The function resets the state buffer to zeros.

Definition at line 44 of file arm_pid_reset_f32.c.

void arm_pid_init_f32 | ( | arm_pid_instance_f32 * | S,
 |  | int32_t | resetStateFlag
 | ) |  |

Initialization function for the floating-point PID Control.

Parameters:
[in,out] | *S | points to an instance of the PID structure.
[in] | resetStateFlag | flag to reset the state. 0 = no change in state & 1 = reset the state.
Returns:
none.
Description:
The resetStateFlag specifies whether to set state to zero or not.
The function computes the structure fields: A0, A1 A2 using the proportional gain( Kp), integral gain( Ki) and derivative gain( Kd) also sets the state variables to all zeros.

Definition at line 51 of file arm_pid_init_f32.c.

void arm_pid_reset_q31 ( arm_pid_instance_q31 * S )

Reset function for the Q31 PID Control.

Parameters:
[in] *S Instance pointer of PID control data structure.
Returns:
none.
Description:
The function resets the state buffer to zeros.

Definition at line 44 of file arm_pid_reset_q31.c.

void arm_pid_init_q31 | ( | arm_pid_instance_q31 * | S,
 |  | int32_t | resetStateFlag
 | ) |  |

Initialization function for the Q31 PID Control.

Parameters:
[in,out] | *S | points to an instance of the Q31 PID structure.
[in] | resetStateFlag | flag to reset the state. 0 = no change in state 1 = reset the state.
Returns:
none.
Description:
The resetStateFlag specifies whether to set state to zero or not.
The function computes the structure fields: A0, A1 A2 using the proportional gain( Kp), integral gain( Ki) and derivative gain( Kd) also sets the state variables to all zeros.

Definition at line 50 of file arm_pid_init_q31.c.

void arm_pid_reset_q15 ( arm_pid_instance_q15 * S )

Reset function for the Q15 PID Control.

Parameters:
[in] *S Instance pointer of PID control data structure.
Returns:
none.
Description:
The function resets the state buffer to zeros.

Definition at line 44 of file arm_pid_reset_q15.c.

void arm_pid_init_q15 | ( | arm_pid_instance_q15 * | S,
 |  | int32_t | resetStateFlag
 | ) |  |

Initialization function for the Q15 PID Control.

Parameters:
[in,out] | *S | points to an instance of the Q15 PID structure.
[in] | resetStateFlag | flag to reset the state. 0 = no change in state 1 = reset the state.
Returns:
none.
Description:
The resetStateFlag specifies whether to set state to zero or not.
The function computes the structure fields: A0, A1 A2 using the proportional gain( Kp), integral gain( Ki) and derivative gain( Kd) also sets the state variables to all zeros.

Definition at line 50 of file arm_pid_init_q15.c.

static __INLINE float32_t arm_pid_f32 | ( | arm_pid_instance_f32 * | S,
 |  | float32_t | in
 | ) |  | [static]

Process function for the floating-point PID Control.

Parameters:
[in,out] | *S | is an instance of the floating-point PID Control structure
[in] | in | input sample to process
Returns:
out processed output sample.

Definition at line 4711 of file arm_math.h.

static __INLINE q31_t arm_pid_q31 | ( | arm_pid_instance_q31 * | S,
 |  | q31_t | in
 | ) |  | [static]

Process function for the Q31 PID Control.

Parameters:
[in,out] | *S | points to an instance of the Q31 PID Control structure
[in] | in | input sample to process
Returns:
out processed output sample.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions. After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.

Definition at line 4746 of file arm_math.h.

static __INLINE q15_t arm_pid_q15 | ( | arm_pid_instance_q15 * | S,
 |  | q15_t | in
 | ) |  | [static]

Process function for the Q15 PID Control.

Parameters:
[in,out] | *S | points to an instance of the Q15 PID Control structure
[in] | in | input sample to process
Returns:
out processed output sample.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.

Definition at line 4794 of file arm_math.h.

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CMSIS DSP Software Library: Partial Convolution

  • Examples
Functions

Partial Convolution
[Filtering Functions]

Functions

arm_status | arm_conv_partial_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst, uint32_t firstIndex, uint32_t numPoints)
arm_status | arm_conv_partial_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst, uint32_t firstIndex, uint32_t numPoints)
arm_status | arm_conv_partial_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst, uint32_t firstIndex, uint32_t numPoints)
arm_status | arm_conv_partial_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints)
arm_status | arm_conv_partial_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints)
arm_status | arm_conv_partial_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, uint32_t firstIndex, uint32_t numPoints)

Detailed Description

Partial Convolution is equivalent to Convolution except that a subset of the output samples is generated. Each function has two additional arguments. firstIndex specifies the starting index of the subset of output samples. numPoints is the number of output samples to compute. The function computes the output in the range [firstIndex, ..., firstIndex+numPoints-1]. The output array pDst contains numPoints values.

The allowable range of output indices is [0 srcALen+srcBLen-2]. If the requested subset does not fall in this range then the functions return ARM_MATH_ARGUMENT_ERROR. Otherwise the functions return ARM_MATH_SUCCESS.

Note:
Refer arm_conv_f32() for details on fixed point behavior.

Function Documentation

arm_status arm_conv_partial_f32 | ( | float32_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | float32_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | float32_t * | pDst,
 |  | uint32_t | firstIndex,
 |  | uint32_t | numPoints
 | ) |  |

Partial convolution of floating-point sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written.
[in] | firstIndex | is the first output sample to start with.
[in] | numPoints | is the number of output points to be computed.
Returns:
Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].

Definition at line 74 of file arm_conv_partial_f32.c.

arm_status arm_conv_partial_q31 | ( | q31_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q31_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q31_t * | pDst,
 |  | uint32_t | firstIndex,
 |  | uint32_t | numPoints
 | ) |  |

Partial convolution of Q31 sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written.
[in] | firstIndex | is the first output sample to start with.
[in] | numPoints | is the number of output points to be computed.
Returns:
Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].

See arm_conv_partial_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.

Definition at line 59 of file arm_conv_partial_q31.c.

arm_status arm_conv_partial_fast_q31 | ( | q31_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q31_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q31_t * | pDst,
 |  | uint32_t | firstIndex,
 |  | uint32_t | numPoints
 | ) |  |

Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written.
[in] | firstIndex | is the first output sample to start with.
[in] | numPoints | is the number of output points to be computed.
Returns:
Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
See arm_conv_partial_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.

Definition at line 56 of file arm_conv_partial_fast_q31.c.

arm_status arm_conv_partial_q15 | ( | q15_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q15_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q15_t * | pDst,
 |  | uint32_t | firstIndex,
 |  | uint32_t | numPoints
 | ) |  |

Partial convolution of Q15 sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written.
[in] | firstIndex | is the first output sample to start with.
[in] | numPoints | is the number of output points to be computed.
Returns:
Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].

Refer to arm_conv_partial_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.

Definition at line 60 of file arm_conv_partial_q15.c.

arm_status arm_conv_partial_fast_q15 | ( | q15_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q15_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q15_t * | pDst,
 |  | uint32_t | firstIndex,
 |  | uint32_t | numPoints
 | ) |  |

Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written.
[in] | firstIndex | is the first output sample to start with.
[in] | numPoints | is the number of output points to be computed.
Returns:
Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].

See arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.

Definition at line 56 of file arm_conv_partial_fast_q15.c.

arm_status arm_conv_partial_q7 | ( | q7_t * | pSrcA,
 |  | uint32_t | srcALen,
 |  | q7_t * | pSrcB,
 |  | uint32_t | srcBLen,
 |  | q7_t * | pDst,
 |  | uint32_t | firstIndex,
 |  | uint32_t | numPoints
 | ) |  |

Partial convolution of Q7 sequences.

Parameters:
[in] | *pSrcA | points to the first input sequence.
[in] | srcALen | length of the first input sequence.
[in] | *pSrcB | points to the second input sequence.
[in] | srcBLen | length of the second input sequence.
[out] | *pDst | points to the location where the output result is written.
[in] | firstIndex | is the first output sample to start with.
[in] | numPoints | is the number of output points to be computed.
Returns:
Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].

Definition at line 58 of file arm_conv_partial_q7.c.

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CMSIS DSP Software Library: Real FFT Functions

  • Examples
Functions | Variables

Real FFT Functions
[Transform Functions]

Functions

arm_status | arm_rfft_init_f32 (arm_rfft_instance_f32 *S, arm_cfft_radix4_instance_f32 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
void | arm_rfft_f32 (const arm_rfft_instance_f32 *S, float32_t *pSrc, float32_t *pDst)
arm_status | arm_rfft_init_q31 (arm_rfft_instance_q31 *S, arm_cfft_radix4_instance_q31 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
void | arm_rfft_q31 (const arm_rfft_instance_q31 *S, q31_t *pSrc, q31_t *pDst)
arm_status | arm_rfft_init_q15 (arm_rfft_instance_q15 *S, arm_cfft_radix4_instance_q15 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
void | arm_rfft_q15 (const arm_rfft_instance_q15 *S, q15_t *pSrc, q15_t *pDst)

Variables

static const float32_t | realCoefA [2048]
static const float32_t | realCoefB [2048]
const q31_t | realCoefAQ31 [1024]
const q31_t | realCoefBQ31 [1024]
static const q15_t | realCoefAQ15 [2048]
static const q15_t | realCoefBQ15 [2048]

Detailed Description

Complex FFT/IFFT typically assumes complex input and output. However many applications use real valued data in time domain. Real FFT/IFFT efficiently process real valued sequences with the advantage of requirement of low memory and with less complexity.
This set of functions implements Real Fast Fourier Transforms(RFFT) and Real Inverse Fast Fourier Transform(RIFFT) for Q15, Q31, and floating-point data types.
Algorithm:

Real Fast Fourier Transform:

Real FFT of N-point is calculated using CFFT of N/2-point and Split RFFT process as shown below figure.

Real Fast Fourier Transform

The RFFT functions operate on blocks of input and output data and each call to the function processes fftLenR samples through the transform. pSrc points to input array containing fftLenR values. pDst points to output array containing 2*fftLenR values.
Input for real FFT is in the order of
{real[0], real[1], real[2], real[3], ..}
Output for real FFT is complex and are in the order of
{real(0), imag(0), real(1), imag(1), ...}

Real Inverse Fast Fourier Transform:

Real IFFT of N-point is calculated using Split RIFFT process and CFFT of N/2-point as shown below figure.

Real Inverse Fast Fourier Transform

The RIFFT functions operate on blocks of input and output data and each call to the function processes 2*fftLenR samples through the transform. pSrc points to input array containing 2*fftLenR values. pDst points to output array containing fftLenR values.
Input for real IFFT is complex and are in the order of
{real(0), imag(0), real(1), imag(1), ...}
Output for real IFFT is real and in the order of
{real[0], real[1], real[2], real[3], ..}
Lengths supported by the transform:
Real FFT/IFFT supports the lengths [128, 512, 2048], as it internally uses CFFT/CIFFT.
Instance Structure
A separate instance structure must be defined for each Instance but the twiddle factors can be reused. There are separate instance structure declarations for each of the 3 supported data types.
Initialization Functions
There is also an associated initialization function for each data type. The initialization function performs the following operations:
  • Sets the values of the internal structure fields.
  • Initializes twiddle factor tables.
  • Initializes CFFT data structure fields.
Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Manually initialize the instance structure as follows:

arm_rfft_instance_f32 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
arm_rfft_instance_q31 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
where fftLenReal length of RFFT/RIFFT; fftLenBy2 length of CFFT/CIFFT. ifftFlagR Flag for selection of RFFT or RIFFT(Set ifftFlagR to calculate RIFFT otherwise calculates RFFT); bitReverseFlagR Flag for selection of output order(Set bitReverseFlagR to output in normal order otherwise output in bit reversed order); twidCoefRModifier modifier for twiddle factor table which supports 128, 512, 2048 RFFT lengths with same table; pTwiddleARealpoints to A array of twiddle coefficients; pTwiddleBRealpoints to B array of twiddle coefficients; pCfft points to the CFFT Instance structure. The CFFT structure also needs to be initialized, refer to arm_cfft_radix4_f32() for details regarding static initialization of cfft structure.
Fixed-Point Behavior
Care must be taken when using the fixed-point versions of the RFFT/RIFFT function. Refer to the function specific documentation below for usage guidelines.

Function Documentation

arm_status arm_rfft_init_f32 | ( | arm_rfft_instance_f32 * | S,
 |  | arm_cfft_radix4_instance_f32 * | S_CFFT,
 |  | uint32_t | fftLenReal,
 |  | uint32_t | ifftFlagR,
 |  | uint32_t | bitReverseFlag
 | ) |  |

Initialization function for the floating-point RFFT/RIFFT.

Parameters:
[in,out] | *S | points to an instance of the floating-point RFFT/RIFFT structure.
[in,out] | *S_CFFT | points to an instance of the floating-point CFFT/CIFFT structure.
[in] | fftLenReal | length of the FFT.
[in] | ifftFlagR | flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
[in] | bitReverseFlag | flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
Returns:
The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.
Description:
The parameter fftLenReal Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.
The parameter ifftFlagR controls whether a forward or inverse transform is computed. Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
This function also initializes Twiddle factor table.

Definition at line 1638 of file arm_rfft_init_f32.c.

void arm_rfft_f32 | ( | const arm_rfft_instance_f32 * | S,
 |  | float32_t * | pSrc,
 |  | float32_t * | pDst
 | ) |  |

Processing function for the floating-point RFFT/RIFFT.

Parameters:
[in] | *S | points to an instance of the floating-point RFFT/RIFFT structure.
[in] | *pSrc | points to the input buffer.
[out] | *pDst | points to the output buffer.
Returns:
none.

Definition at line 150 of file arm_rfft_f32.c.

arm_status arm_rfft_init_q31 | ( | arm_rfft_instance_q31 * | S,
 |  | arm_cfft_radix4_instance_q31 * | S_CFFT,
 |  | uint32_t | fftLenReal,
 |  | uint32_t | ifftFlagR,
 |  | uint32_t | bitReverseFlag
 | ) |  |

Initialization function for the Q31 RFFT/RIFFT.

Parameters:
[in,out] | *S | points to an instance of the Q31 RFFT/RIFFT structure.
[in,out] | *S_CFFT | points to an instance of the Q31 CFFT/CIFFT structure.
[in] | fftLenReal | length of the FFT.
[in] | ifftFlagR | flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
[in] | bitReverseFlag | flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
Returns:
The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.
Description:
The parameter fftLenReal Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.
The parameter ifftFlagR controls whether a forward or inverse transform is computed. Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
This function also initializes Twiddle factor table.

Definition at line 617 of file arm_rfft_init_q31.c.

void arm_rfft_q31 | ( | const arm_rfft_instance_q31 * | S,
 |  | q31_t * | pSrc,
 |  | q31_t * | pDst
 | ) |  |

Processing function for the Q31 RFFT/RIFFT.

Parameters:
[in] | *S | points to an instance of the Q31 RFFT/RIFFT structure.
[in] | *pSrc | points to the input buffer.
[out] | *pDst | points to the output buffer.
Returns:
none.
Input an output formats:
Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. Hence the output format is different for different RFFT sizes. The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:

Input and Output Formats for Q31 RFFT

Input and Output Formats for Q31 RIFFT

Definition at line 80 of file arm_rfft_q31.c.

arm_status arm_rfft_init_q15 | ( | arm_rfft_instance_q15 * | S,
 |  | arm_cfft_radix4_instance_q15 * | S_CFFT,
 |  | uint32_t | fftLenReal,
 |  | uint32_t | ifftFlagR,
 |  | uint32_t | bitReverseFlag
 | ) |  |

Initialization function for the Q15 RFFT/RIFFT.

Parameters:
[in,out] | *S | points to an instance of the Q15 RFFT/RIFFT structure.
[in] | *S_CFFT | points to an instance of the Q15 CFFT/CIFFT structure.
[in] | fftLenReal | length of the FFT.
[in] | ifftFlagR | flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
[in] | bitReverseFlag | flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
Returns:
The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.
Description:
The parameter fftLenReal Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.
The parameter ifftFlagR controls whether a forward or inverse transform is computed. Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
This function also initializes Twiddle factor table.

Definition at line 620 of file arm_rfft_init_q15.c.

void arm_rfft_q15 | ( | const arm_rfft_instance_q15 * | S,
 |  | q15_t * | pSrc,
 |  | q15_t * | pDst
 | ) |  |

Processing function for the Q15 RFFT/RIFFT.

Parameters:
[in] | *S | points to an instance of the Q15 RFFT/RIFFT structure.
[in] | *pSrc | points to the input buffer.
[out] | *pDst | points to the output buffer.
Returns:
none.
Input an output formats:
Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. Hence the output format is different for different RFFT sizes. The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:

Input and Output Formats for Q15 RFFT

Input and Output Formats for Q15 RIFFT

Definition at line 80 of file arm_rfft_q15.c.

Variable Documentation

const float32_t realCoefA[2048] [static]
Generation of realCoefA array:
n = 1024
for (i = 0; i < n; i++)
  {
    pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
  }

Definition at line 59 of file arm_rfft_init_f32.c.

const float32_t realCoefB[2048] [static]
Generation of realCoefB array:
n = 1024
for (i = 0; i < n; i++)
 {
    pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
  }

Definition at line 843 of file arm_rfft_init_f32.c.

const q31_t realCoefAQ31[1024]
Generation floating point realCoefAQ31 array:
n = 1024
for (i = 0; i < n; i++)
 {
    pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
 }
Convert to fixed point Q31 format round(pATable[i] * pow(2, 31))

Definition at line 60 of file arm_rfft_init_q31.c.

const q31_t realCoefBQ31[1024]
Generation of realCoefBQ31 array:
n = 512
for (i = 0; i < n; i++)
 {
    pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
 }
Convert to fixed point Q31 format round(pBTable[i] * pow(2, 31))

Definition at line 336 of file arm_rfft_init_q31.c.

const q15_t realCoefAQ15[2048] [static]
Generation floating point real_CoefA array:
n = 1024
for (i = 0; i < n; i++)
  {
    pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
  }
Convert to fixed point Q15 format round(pATable[i] * pow(2, 15))

Definition at line 63 of file arm_rfft_init_q15.c.

const q15_t realCoefBQ15[2048] [static]
Generation of real_CoefB array:
n = 1024
for (i = 0; i < n; i++)
  {
    pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
  }
Convert to fixed point Q15 format round(pBTable[i] * pow(2, 15))

Definition at line 339 of file arm_rfft_init_q15.c.

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CMSIS DSP Software Library: Root mean square (RMS)

  • Examples
Functions

Root mean square (RMS)
[Statistics Functions]

Functions

void | arm_rms_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
void | arm_rms_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
void | arm_rms_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)

Detailed Description

Calculates the Root Mean Sqaure of the elements in the input vector. The underlying algorithm is used:

     Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));

There are separate functions for floating point, Q31, and Q15 data types.

Function Documentation

void arm_rms_f32 | ( | float32_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | float32_t * | pResult
 | ) |  |

Root Mean Square of the elements of a floating-point vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | rms value returned here
Returns:
none.

Definition at line 65 of file arm_rms_f32.c.

void arm_rms_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q31_t * | pResult
 | ) |  |

Root Mean Square of the elements of a Q31 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | rms value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The input is represented in 1.31 format, and intermediate multiplication yields a 2.62 format. The accumulator maintains full precision of the intermediate multiplication results, but provides only a single guard bit. There is no saturation on intermediate additions. If the accumulator overflows, it wraps around and distorts the result. In order to avoid overflows completely, the input signal must be scaled down by log2(blockSize) bits, as a total of blockSize additions are performed internally. Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.

Definition at line 62 of file arm_rms_q31.c.

void arm_rms_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q15_t * | pResult
 | ) |  |

Root Mean Square of the elements of a Q15 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | rms value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 15 bits, and then saturated to yield a result in 1.15 format.

Definition at line 59 of file arm_rms_q15.c.

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CMSIS DSP Software Library: Square Root

  • Examples
Functions

Square Root
[Fast Math Functions]

Functions

arm_status | arm_sqrt_q31 (q31_t in, q31_t *pOut)
arm_status | arm_sqrt_q15 (q15_t in, q15_t *pOut)
static __INLINE arm_status | arm_sqrt_f32 (float32_t in, float32_t *pOut)

Detailed Description

Computes the square root of a number. There are separate functions for Q15, Q31, and floating-point data types. The square root function is computed using the Newton-Raphson algorithm. This is an iterative algorithm of the form:

      x1 = x0 - f(x0)/f'(x0)

where x1 is the current estimate, x0 is the previous estimate and f'(x0) is the derivative of f() evaluated at x0. For the square root function, the algorithm reduces to:

     x0 = in/2                         [initial guess]
     x1 = 1/2 * ( x0 + in / x0)        [each iteration]

Function Documentation

arm_status arm_sqrt_q31 | ( | q31_t | in,
 |  | q31_t * | pOut
 | ) |  |

Q31 square root function.

Parameters:
[in] | in | input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.
[out] | *pOut | square root of input value.
Returns:
The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if in is negative value and returns zero output for negative values.

Definition at line 47 of file arm_sqrt_q31.c.

arm_status arm_sqrt_q15 | ( | q15_t | in,
 |  | q15_t * | pOut
 | ) |  |

Q15 square root function.

Parameters:
[in] | in | input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF.
[out] | *pOut | square root of input value.
Returns:
The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if in is negative value and returns zero output for negative values.

Definition at line 51 of file arm_sqrt_q15.c.

static __INLINE arm_status arm_sqrt_f32 | ( | float32_t | in,
 |  | float32_t * | pOut
 | ) |  | [static]

Floating-point square root function.

Parameters:
[in] | in | input value.
[out] | *pOut | square root of input value.
Returns:
The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if in is negative value and returns zero output for negative values.

Definition at line 5695 of file arm_math.h.

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CMSIS DSP Software Library: Standard deviation

  • Examples
Functions

Standard deviation
[Statistics Functions]

Functions

void | arm_std_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
void | arm_std_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
void | arm_std_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)

Detailed Description

Calculates the standard deviation of the elements in the input vector. The underlying algorithm is used:

     Result = sqrt((sumOfSquares - sum2 / blockSize) / (blockSize - 1))
       where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]
                       sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]

There are separate functions for floating point, Q31, and Q15 data types.

Function Documentation

void arm_std_f32 | ( | float32_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | float32_t * | pResult
 | ) |  |

Standard deviation of the elements of a floating-point vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | standard deviation value returned here
Returns:
none.
Examples:
arm_class_marks_example_f32.c.

Definition at line 69 of file arm_std_f32.c.

void arm_std_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q31_t * | pResult
 | ) |  |

Standard deviation of the elements of a Q31 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | standard deviation value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The input is represented in 1.31 format, and intermediate multiplication yields a 2.62 format. The accumulator maintains full precision of the intermediate multiplication results, but provides only a single guard bit. There is no saturation on intermediate additions. If the accumulator overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(blockSize) bits, as a total of blockSize additions are performed internally. Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.

Definition at line 66 of file arm_std_q31.c.

void arm_std_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q15_t * | pResult
 | ) |  |

Standard deviation of the elements of a Q15 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | standard deviation value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 15 bits, and then saturated to yield a result in 1.15 format.

Definition at line 62 of file arm_std_q15.c.

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CMSIS DSP Software Library: Signal Convergence Example

  • Examples

Signal Convergence Example
[Examples]

Description:
Demonstrates the ability of an adaptive filter to "learn" the transfer function of a FIR lowpass filter using the Normalized LMS Filter, Finite Impulse Response (FIR) Filter, and Basic Math Functions.
Algorithm:
The figure below illustrates the signal flow in this example. Uniformly distributed white noise is passed through an FIR lowpass filter. The output of the FIR filter serves as the reference input of the adaptive filter (normalized LMS filter). The white noise is input to the adaptive filter. The adaptive filter learns the transfer function of the FIR filter. The filter outputs two signals: (1) the output of the internal adaptive FIR filter, and (2) the error signal which is the difference between the adaptive filter and the reference output of the FIR filter. Over time as the adaptive filter learns the transfer function of the FIR filter, the first output approaches the reference output of the FIR filter, and the error signal approaches zero.
The adaptive filter converges properly even if the input signal has a large dynamic range (i.e., varies from small to large values). The coefficients of the adaptive filter are initially zero, and then converge over 1536 samples. The internal function test_signal_converge() implements the stopping condition. The function checks if all of the values of the error signal have a magnitude below a threshold DELTA.
Block Diagram:
Variables Description:
  • testInput_f32 points to the input data
  • firStateF32 points to FIR state buffer
  • lmsStateF32 points to Normalised Least mean square FIR filter state buffer
  • FIRCoeff_f32 points to coefficient buffer
  • lmsNormCoeff_f32 points to Normalised Least mean square FIR filter coefficient buffer
  • wire1, wir2, wire3 temporary buffers
  • errOutput, err_signal temporary error buffers
CMSIS DSP Software Library Functions Used:
  • arm_lms_norm_init_f32()
  • arm_fir_init_f32()
  • arm_fir_f32()
  • arm_lms_norm_f32()
  • arm_scale_f32()
  • arm_abs_f32()
  • arm_sub_f32()
  • arm_min_f32()
  • arm_copy_f32()

Refer arm_signal_converge_example_f32.c

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CMSIS DSP Software Library: Sine Cosine

  • Examples
Functions | Variables

Sine Cosine
[Controller Functions]

Functions

void | arm_sin_cos_f32 (float32_t theta, float32_t *pSinVal, float32_t *pCosVal)
void | arm_sin_cos_q31 (q31_t theta, q31_t *pSinVal, q31_t *pCosVal)

Variables

static const float32_t | cosTable [360]
static const float32_t | sinTable [360]
static const int32_t | sinTableQ31 [360]
static const int32_t | cosTableQ31 [360]

Detailed Description

Computes the trigonometric sine and cosine values using a combination of table lookup and linear interpolation. There are separate functions for Q31 and floating-point data types. The input to the floating-point version is in degrees while the fixed-point Q31 have a scaled input with the range [-1 1) mapping to [-180 180) degrees.

The implementation is based on table lookup using 360 values together with linear interpolation. The steps used are:

  1. Calculation of the nearest integer table index.
  2. Compute the fractional portion (fract) of the input.
  3. Fetch the value corresponding to index from sine table to y0 and also value from index+1 to y1.
  4. Sine value is computed as *psinVal = y0 + (fract * (y1 - y0)).
  5. Fetch the value corresponding to index from cosine table to y0 and also value from index+1 to y1.
  6. Cosine value is computed as *pcosVal = y0 + (fract * (y1 - y0)).

Function Documentation

void arm_sin_cos_f32 | ( | float32_t | theta,
 |  | float32_t * | pSinVal,
 |  | float32_t * | pCosVal
 | ) |  |

Floating-point sin_cos function.

Parameters:
[in] | theta | input value in degrees
[out] | *pSinVal | points to the processed sine output.
[out] | *pCosVal | points to the processed cos output.
Returns:
none.

Definition at line 367 of file arm_sin_cos_f32.c.

void arm_sin_cos_q31 | ( | q31_t | theta,
 |  | q31_t * | pSinVal,
 |  | q31_t * | pCosVal
 | ) |  |

Q31 sin_cos function.

Parameters:
[in] | theta | scaled input value in degrees
[out] | *pSinVal | points to the processed sine output.
[out] | *pCosVal | points to the processed cosine output.
Returns:
none.

The Q31 input value is in the range [-1 +1) and is mapped to a degree value in the range [-180 180).

Definition at line 264 of file arm_sin_cos_q31.c.

Variable Documentation

const float32_t cosTable[360] [static]
Cosine Table is generated from following loop
for(i = 0; i < 360; i++)
 {
    cosTable[i]= cos((i-180) * PI/180.0);
 }

Definition at line 71 of file arm_sin_cos_f32.c.

const float32_t sinTable[360] [static]
Sine Table is generated from following loop
for(i = 0; i < 360; i++)
 {
    sinTable[i]= sin((i-180) * PI/180.0);
 }

Definition at line 219 of file arm_sin_cos_f32.c.

const int32_t sinTableQ31[360] [static]
Sine Table is generated from following loop
for(i = 0; i < 360; i++)
 {
    sinTable[i]= sin((i-180) * PI/180.0);
 }
Convert above coefficients to fixed point 1.31 format.

Definition at line 51 of file arm_sin_cos_q31.c.

const int32_t cosTableQ31[360] [static]
Cosine Table is generated from following loop
for(i = 0; i < 360; i++)
 {
    cosTable[i]= cos((i-180) * PI/180.0);
 }
Convert above coefficients to fixed point 1.31 format.

Definition at line 157 of file arm_sin_cos_q31.c.

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CMSIS DSP Software Library: SineCosine Example

  • Examples

SineCosine Example
[Examples]

Description:
Demonstrates the Pythagorean trignometric identity with the use of Cosine, Sine, Vector Multiplication, and Vector Addition functions.
Algorithm:
Mathematically, the Pythagorean trignometric identity is defined by the following equation:
sin(x) * sin(x) + cos(x) * cos(x) = 1
where x is the angle in radians.
Block Diagram:
Variables Description:
  • testInput_f32 array of input angle in radians
  • testOutput stores sum of the squares of sine and cosine values of input angle
CMSIS DSP Software Library Functions Used:
  • arm_cos_f32()
  • arm_sin_f32()
  • arm_mult_f32()
  • arm_add_f32()

Refer arm_sin_cos_example_f32.c

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CMSIS DSP Software Library: Variance Example

  • Examples

Variance Example
[Examples]

Description:
Demonstrates the use of Basic Math and Support Functions to calculate the variance of an input sequence with N samples. Uniformly distributed white noise is taken as input.
Algorithm:
The variance of a sequence is the mean of the squared deviation of the sequence from its mean.
This is denoted by the following equation:
 variance = ((x[0] - x') * (x[0] - x') + (x[1] - x') * (x[1] - x') + ... + * (x[n-1] - x') * (x[n-1] - x')) / (N-1)
where, x[n] is the input sequence, N is the number of input samples, and x' is the mean value of the input sequence, x[n].
The mean value x' is defined as:
 x' = (x[0] + x[1] + ... + x[n-1]) / N
Block Diagram:
Variables Description:
  • testInput_f32 points to the input data
  • wire1, wir2, wire3 temporary buffers
  • blockSize number of samples processed at a time
  • refVarianceOut reference variance value
CMSIS DSP Software Library Functions Used:
  • arm_dot_prod_f32()
  • arm_mult_f32()
  • arm_sub_f32()
  • arm_fill_f32()
  • arm_copy_f32()

Refer arm_variance_example_f32.c

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CMSIS DSP Software Library: Vector Clarke Transform

  • Examples
Functions

Vector Clarke Transform
[Controller Functions]

Functions

static __INLINE void | arm_clarke_f32 (float32_t Ia, float32_t Ib, float32_t *pIalpha, float32_t *pIbeta)
static __INLINE void | arm_clarke_q31 (q31_t Ia, q31_t Ib, q31_t *pIalpha, q31_t *pIbeta)

Detailed Description

Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector. Generally the Clarke transform uses three-phase currents Ia, Ib and Ic to calculate currents in the two-phase orthogonal stator axis Ialpha and Ibeta. When Ialpha is superposed with Ia as shown in the figure below

Stator current space vector and its components in (a,b).

and Ia + Ib + Ic = 0, in this condition Ialpha and Ibeta can be calculated using only Ia and Ib.

The function operates on a single sample of data and each call to the function returns the processed output. The library provides separate functions for Q31 and floating-point data types.

Algorithm
where Ia and Ib are the instantaneous stator phases and pIalpha and pIbeta are the two coordinates of time invariant vector.
Fixed-Point Behavior
Care must be taken when using the Q31 version of the Clarke transform. In particular, the overflow and saturation behavior of the accumulator used must be considered. Refer to the function specific documentation below for usage guidelines.

Function Documentation

static __INLINE void arm_clarke_f32 | ( | float32_t | Ia,
 |  | float32_t | Ib,
 |  | float32_t * | pIalpha,
 |  | float32_t * | pIbeta
 | ) |  | [static]

Floating-point Clarke transform.

Parameters:
[in] | Ia | input three-phase coordinate a
[in] | Ib | input three-phase coordinate b
[out] | *pIalpha | points to output two-phase orthogonal vector axis alpha
[out] | *pIbeta | points to output two-phase orthogonal vector axis beta
Returns:
none.

Definition at line 4905 of file arm_math.h.

static __INLINE void arm_clarke_q31 | ( | q31_t | Ia,
 |  | q31_t | Ib,
 |  | q31_t * | pIalpha,
 |  | q31_t * | pIbeta
 | ) |  | [static]

Clarke transform for Q31 version.

Parameters:
[in] | Ia | input three-phase coordinate a
[in] | Ib | input three-phase coordinate b
[out] | *pIalpha | points to output two-phase orthogonal vector axis alpha
[out] | *pIbeta | points to output two-phase orthogonal vector axis beta
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 32-bit accumulator. The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. There is saturation on the addition, hence there is no risk of overflow.

Definition at line 4934 of file arm_math.h.

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CMSIS DSP Software Library: Complex Conjugate

  • Examples
Functions

Complex Conjugate
[Complex Math Functions]

Functions

void | arm_cmplx_conj_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
void | arm_cmplx_conj_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
void | arm_cmplx_conj_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)

Detailed Description

Conjugates the elements of a complex data vector.

The pSrc points to the source data and pDst points to the where the result should be written. numSamples specifies the number of complex samples and the data in each array is stored in an interleaved fashion (real, imag, real, imag, ...). Each array has a total of 2*numSamples values. The underlying algorithm is used:

 for(n=0; n<numSamples; n++) {
     pDst[(2*n)+0)] = pSrc[(2*n)+0];     // real part
     pDst[(2*n)+1)] = -pSrc[(2*n)+1];    // imag part
 }

There are separate functions for floating-point, Q15, and Q31 data types.

Function Documentation

void arm_cmplx_conj_f32 | ( | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Floating-point complex conjugate.

Parameters:
*pSrc | points to the input vector
*pDst | points to the output vector
numSamples | number of complex samples in each vector
Returns:
none.

Definition at line 72 of file arm_cmplx_conj_f32.c.

void arm_cmplx_conj_q31 | ( | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Q31 complex conjugate.

Parameters:
*pSrc | points to the input vector
*pDst | points to the output vector
numSamples | number of complex samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.

Definition at line 54 of file arm_cmplx_conj_q31.c.

void arm_cmplx_conj_q15 | ( | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Q15 complex conjugate.

Parameters:
*pSrc | points to the input vector
*pDst | points to the output vector
numSamples | number of complex samples in each vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.

Definition at line 54 of file arm_cmplx_conj_q15.c.

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CMSIS DSP Software Library: Complex Dot Product

  • Examples
Functions

Complex Dot Product
[Complex Math Functions]

Functions

void | arm_cmplx_dot_prod_f32 (float32_t *pSrcA, float32_t *pSrcB, uint32_t numSamples, float32_t *realResult, float32_t *imagResult)
void | arm_cmplx_dot_prod_q31 (q31_t *pSrcA, q31_t *pSrcB, uint32_t numSamples, q63_t *realResult, q63_t *imagResult)
void | arm_cmplx_dot_prod_q15 (q15_t *pSrcA, q15_t *pSrcB, uint32_t numSamples, q31_t *realResult, q31_t *imagResult)

Detailed Description

Computes the dot product of two complex vectors. The vectors are multiplied element-by-element and then summed.

The pSrcA points to the first complex input vector and pSrcB points to the second complex input vector. numSamples specifies the number of complex samples and the data in each array is stored in an interleaved fashion (real, imag, real, imag, ...). Each array has a total of 2*numSamples values.

The underlying algorithm is used:

 realResult=0;
 imagResult=0;
 for(n=0; n<numSamples; n++) {
     realResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+0] - pSrcA[(2*n)+1]*pSrcB[(2*n)+1];
     imagResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+1] + pSrcA[(2*n)+1]*pSrcB[(2*n)+0];
 }

There are separate functions for floating-point, Q15, and Q31 data types.

Function Documentation

void arm_cmplx_dot_prod_f32 | ( | float32_t * | pSrcA,
 |  | float32_t * | pSrcB,
 |  | uint32_t | numSamples,
 |  | float32_t * | realResult,
 |  | float32_t * | imagResult
 | ) |  |

Floating-point complex dot product.

Parameters:
*pSrcA | points to the first input vector
*pSrcB | points to the second input vector
numSamples | number of complex samples in each vector
*realResult | real part of the result returned here
*imagResult | imaginary part of the result returned here
Returns:
none.

Definition at line 77 of file arm_cmplx_dot_prod_f32.c.

void arm_cmplx_dot_prod_q31 | ( | q31_t * | pSrcA,
 |  | q31_t * | pSrcB,
 |  | uint32_t | numSamples,
 |  | q63_t * | realResult,
 |  | q63_t * | imagResult
 | ) |  |

Q31 complex dot product.

Parameters:
*pSrcA | points to the first input vector
*pSrcB | points to the second input vector
numSamples | number of complex samples in each vector
*realResult | real part of the result returned here
*imagResult | imaginary part of the result returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format. The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits. Additions are nonsaturating and no overflow will occur as long as numSamples is less than 32768. The return results realResult and imagResult are in 16.48 format. Input down scaling is not required.

Definition at line 60 of file arm_cmplx_dot_prod_q31.c.

void arm_cmplx_dot_prod_q15 | ( | q15_t * | pSrcA,
 |  | q15_t * | pSrcB,
 |  | uint32_t | numSamples,
 |  | q31_t * | realResult,
 |  | q31_t * | imagResult
 | ) |  |

Q15 complex dot product.

Parameters:
*pSrcA | points to the first input vector
*pSrcB | points to the second input vector
numSamples | number of complex samples in each vector
*realResult | real part of the result returned here
*imagResult | imaginary part of the result returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result. These are accumulated in a 64-bit accumulator with 34.30 precision. As a final step, the accumulators are converted to 8.24 format. The return results realResult and imagResult are in 8.24 format.

Definition at line 59 of file arm_cmplx_dot_prod_q15.c.

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CMSIS DSP Software Library: Complex Magnitude

  • Examples
Functions

Complex Magnitude
[Complex Math Functions]

Functions

void | arm_cmplx_mag_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
void | arm_cmplx_mag_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
void | arm_cmplx_mag_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)

Detailed Description

Computes the magnitude of the elements of a complex data vector.

The pSrc points to the source data and pDst points to the where the result should be written. numSamples specifies the number of complex samples in the input array and the data is stored in an interleaved fashion (real, imag, real, imag, ...). The input array has a total of 2*numSamples values; the output array has a total of numSamples values. The underlying algorithm is used:

 for(n=0; n<numSamples; n++) {
     pDst[n] = sqrt(pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2);
 }

There are separate functions for floating-point, Q15, and Q31 data types.

Function Documentation

void arm_cmplx_mag_f32 | ( | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Floating-point complex magnitude.

Parameters:
[in] | *pSrc | points to complex input buffer
[out] | *pDst | points to real output buffer
[in] | numSamples | number of complex samples in the input vector
Returns:
none.
Examples:
arm_fft_bin_example_f32.c.

Definition at line 73 of file arm_cmplx_mag_f32.c.

void arm_cmplx_mag_q31 | ( | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Q31 complex magnitude.

Parameters:
*pSrc | points to the complex input vector
*pDst | points to the real output vector
numSamples | number of complex samples in the input vector
Returns:
none.

Scaling and Overflow Behavior:

The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format. Input down scaling is not required.

Definition at line 54 of file arm_cmplx_mag_q31.c.

void arm_cmplx_mag_q15 | ( | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Q15 complex magnitude.

Parameters:
*pSrc | points to the complex input vector
*pDst | points to the real output vector
numSamples | number of complex samples in the input vector
Returns:
none.

Scaling and Overflow Behavior:

The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format.

Definition at line 54 of file arm_cmplx_mag_q15.c.

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CMSIS DSP Software Library: Complex Magnitude Squared

  • Examples
Functions

Complex Magnitude Squared
[Complex Math Functions]

Functions

void | arm_cmplx_mag_squared_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
void | arm_cmplx_mag_squared_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
void | arm_cmplx_mag_squared_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)

Detailed Description

Computes the magnitude squared of the elements of a complex data vector.

The pSrc points to the source data and pDst points to the where the result should be written. numSamples specifies the number of complex samples in the input array and the data is stored in an interleaved fashion (real, imag, real, imag, ...). The input array has a total of 2*numSamples values; the output array has a total of numSamples values.

The underlying algorithm is used:

 for(n=0; n<numSamples; n++) {
     pDst[n] = pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2;
 }

There are separate functions for floating-point, Q15, and Q31 data types.

Function Documentation

void arm_cmplx_mag_squared_f32 | ( | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Floating-point complex magnitude squared.

Parameters:
[in] | *pSrc | points to the complex input vector
[out] | *pDst | points to the real output vector
[in] | numSamples | number of complex samples in the input vector
Returns:
none.

Definition at line 74 of file arm_cmplx_mag_squared_f32.c.

void arm_cmplx_mag_squared_q31 | ( | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Q31 complex magnitude squared.

Parameters:
*pSrc | points to the complex input vector
*pDst | points to the real output vector
numSamples | number of complex samples in the input vector
Returns:
none.

Scaling and Overflow Behavior:

The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format. Input down scaling is not required.

Definition at line 55 of file arm_cmplx_mag_squared_q31.c.

void arm_cmplx_mag_squared_q15 | ( | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | numSamples
 | ) |  |

Q15 complex magnitude squared.

Parameters:
*pSrc | points to the complex input vector
*pDst | points to the real output vector
numSamples | number of complex samples in the input vector
Returns:
none.

Scaling and Overflow Behavior:

The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.

Definition at line 53 of file arm_cmplx_mag_squared_q15.c.

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CMSIS DSP Software Library: Vector Copy

  • Examples
Functions

Vector Copy
[Support Functions]

Functions

void | arm_copy_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | arm_copy_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_copy_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
void | arm_copy_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)

Detailed Description

Copies sample by sample from source vector to destination vector.

     pDst[n] = pSrc[n];   0 <= n < blockSize.

There are separate functions for floating point, Q31, Q15, and Q7 data types.

Function Documentation

void arm_copy_f32 | ( | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Copies the elements of a floating-point vector.

Parameters:
[in] | *pSrc | points to input vector
[out] | *pDst | points to output vector
[in] | blockSize | length of the input vector
Returns:
none.
Examples:
arm_convolution_example_f32.c, arm_signal_converge_example_f32.c, and arm_variance_example_f32.c.

Definition at line 66 of file arm_copy_f32.c.

void arm_copy_q31 | ( | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Copies the elements of a Q31 vector.

Parameters:
[in] | *pSrc | points to input vector
[out] | *pDst | points to output vector
[in] | blockSize | length of the input vector
Returns:
none.

Definition at line 53 of file arm_copy_q31.c.

void arm_copy_q15 | ( | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Copies the elements of a Q15 vector.

Parameters:
[in] | *pSrc | points to input vector
[out] | *pDst | points to output vector
[in] | blockSize | length of the input vector
Returns:
none.

Definition at line 52 of file arm_copy_q15.c.

void arm_copy_q7 | ( | q7_t * | pSrc,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Copies the elements of a Q7 vector.

Parameters:
[in] | *pSrc | points to input vector
[out] | *pDst | points to output vector
[in] | blockSize | length of the input vector
Returns:
none.

Definition at line 53 of file arm_copy_q7.c.

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CMSIS DSP Software Library: Cosine

  • Examples
Functions | Variables

Cosine
[Fast Math Functions]

Functions

float32_t | arm_cos_f32 (float32_t x)
q31_t | arm_cos_q31 (q31_t x)
q15_t | arm_cos_q15 (q15_t x)

Variables

static const float32_t | cosTable [259]
static const q31_t | cosTableQ31 [259]
static const q15_t | cosTableQ15 [259]

Detailed Description

Computes the trigonometric cosine function using a combination of table lookup and cubic interpolation. There are separate functions for Q15, Q31, and floating-point data types. The input to the floating-point version is in radians while the fixed-point Q15 and Q31 have a scaled input with the range [0 1) mapping to [0 2*pi).

The implementation is based on table lookup using 256 values together with cubic interpolation. The steps used are:

  1. Calculation of the nearest integer table index
  2. Fetch the four table values a, b, c, and d
  3. Compute the fractional portion (fract) of the table index.
  4. Calculation of wa, wb, wc, wd
  5. The final result equals a*wa + b*wb + c*wc + d*wd

where

    a=Table[index-1];
    b=Table[index+0];
    c=Table[index+1];
    d=Table[index+2];

and

    wa=-(1/6)*fract.^3 + (1/2)*fract.^2 - (1/3)*fract;
    wb=(1/2)*fract.^3 - fract.^2 - (1/2)*fract + 1;
    wc=-(1/2)*fract.^3+(1/2)*fract.^2+fract;
    wd=(1/6)*fract.^3 - (1/6)*fract;

Function Documentation

float32_t arm_cos_f32 ( float32_t x )

Fast approximation to the trigonometric cosine function for floating-point data.

Parameters:
[in] x input value in radians.
Returns:
cos(x).
Examples:
arm_sin_cos_example_f32.c.

Definition at line 192 of file arm_cos_f32.c.

q31_t arm_cos_q31 ( q31_t x )

Fast approximation to the trigonometric cosine function for Q31 data.

Parameters:
[in] x Scaled input value in radians.
Returns:
cos(x).

The Q31 input value is in the range [0 +1) and is mapped to a radian value in the range [0 2*pi).

Definition at line 136 of file arm_cos_q31.c.

q15_t arm_cos_q15 ( q15_t x )

Fast approximation to the trigonometric cosine function for Q15 data.

Parameters:
[in] x Scaled input value in radians.
Returns:
cos(x).

The Q15 input value is in the range [0 +1) and is mapped to a radian value in the range [0 2*pi).

Definition at line 105 of file arm_cos_q15.c.

Variable Documentation

const float32_t cosTable[259] [static]
Example code for Generation of Cos Table: tableSize = 256;
for(n = -1; n < (tableSize + 1); n++)
 {
    cosTable[n+1]= cos(2*pi*n/tableSize);
 }
where pi value is 3.14159265358979

Definition at line 86 of file arm_cos_f32.c.

const q31_t cosTableQ31[259] [static]
Table Values are in Q31(1.31 Fixed point format) and generation is done in three steps First Generate cos values in floating point: tableSize = 256;
for(n = -1; n < (tableSize + 1); n++)
 {
    cosTable[n+1]= cos(2*pi*n/tableSize);
 }
where pi value is 3.14159265358979
Secondly Convert Floating point to Q31(Fixed point): (cosTable[i] * pow(2, 31))
Finally Rounding to nearest integer is done cosTable[i] += (cosTable[i] > 0 ? 0.5 :-0.5);

Definition at line 60 of file arm_cos_q31.c.

const q15_t cosTableQ15[259] [static]
Table Values are in Q15(1.15 Fixed point format) and generation is done in three steps
First Generate cos values in floating point: tableSize = 256;
for(n = -1; n < (tableSize + 1); n++)
 {
    cosTable[n+1]= cos(2*pi*n/tableSize);
 }
where pi value is 3.14159265358979
Secondly Convert Floating point to Q15(Fixed point): (cosTable[i] * pow(2, 15))
Finally Rounding to nearest integer is done cosTable[i] += (cosTable[i] > 0 ? 0.5 :-0.5);

Definition at line 60 of file arm_cos_q15.c.

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CMSIS DSP Software Library: Vector Dot Product

  • Examples
Functions

Vector Dot Product
[Basic Math Functions]

Functions

void | arm_dot_prod_f32 (float32_t *pSrcA, float32_t *pSrcB, uint32_t blockSize, float32_t *result)
void | arm_dot_prod_q31 (q31_t *pSrcA, q31_t *pSrcB, uint32_t blockSize, q63_t *result)
void | arm_dot_prod_q15 (q15_t *pSrcA, q15_t *pSrcB, uint32_t blockSize, q63_t *result)
void | arm_dot_prod_q7 (q7_t *pSrcA, q7_t *pSrcB, uint32_t blockSize, q31_t *result)

Detailed Description

Computes the dot product of two vectors. The vectors are multiplied element-by-element and then summed. There are separate functions for floating-point, Q7, Q15, and Q31 data types.

Function Documentation

void arm_dot_prod_f32 | ( | float32_t * | pSrcA,
 |  | float32_t * | pSrcB,
 |  | uint32_t | blockSize,
 |  | float32_t * | result
 | ) |  |

Dot product of floating-point vectors.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[in] | blockSize | number of samples in each vector
[out] | *result | output result returned here
Returns:
none.
Examples:
arm_variance_example_f32.c.

Definition at line 62 of file arm_dot_prod_f32.c.

void arm_dot_prod_q31 | ( | q31_t * | pSrcA,
 |  | q31_t * | pSrcB,
 |  | uint32_t | blockSize,
 |  | q63_t * | result
 | ) |  |

Dot product of Q31 vectors.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[in] | blockSize | number of samples in each vector
[out] | *result | output result returned here
Returns:
none.

Scaling and Overflow Behavior:

The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these are truncated to 2.48 format by discarding the lower 14 bits. The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. There are 15 guard bits in the accumulator and there is no risk of overflow as long as the length of the vectors is less than 2^16 elements. The return result is in 16.48 format.

Definition at line 62 of file arm_dot_prod_q31.c.

void arm_dot_prod_q15 | ( | q15_t * | pSrcA,
 |  | q15_t * | pSrcB,
 |  | uint32_t | blockSize,
 |  | q63_t * | result
 | ) |  |

Dot product of Q15 vectors.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[in] | blockSize | number of samples in each vector
[out] | *result | output result returned here
Returns:
none.

Scaling and Overflow Behavior:

The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these results are added to a 64-bit accumulator in 34.30 format. Nonsaturating additions are used and given that there are 33 guard bits in the accumulator there is no risk of overflow. The return result is in 34.30 format.

Definition at line 61 of file arm_dot_prod_q15.c.

void arm_dot_prod_q7 | ( | q7_t * | pSrcA,
 |  | q7_t * | pSrcB,
 |  | uint32_t | blockSize,
 |  | q31_t * | result
 | ) |  |

Dot product of Q7 vectors.

Parameters:
[in] | *pSrcA | points to the first input vector
[in] | *pSrcB | points to the second input vector
[in] | blockSize | number of samples in each vector
[out] | *result | output result returned here
Returns:
none.

Scaling and Overflow Behavior:

The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these results are added to an accumulator in 18.14 format. Nonsaturating additions are used and there is no danger of wrap around as long as the vectors are less than 2^18 elements long. The return result is in 18.14 format.

Definition at line 61 of file arm_dot_prod_q7.c.

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CMSIS DSP Software Library: Convert 32-bit floating point value

  • Examples
Functions

Convert 32-bit floating point value
[Support Functions]

Functions

void | arm_float_to_q31 (float32_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_float_to_q15 (float32_t *pSrc, q15_t *pDst, uint32_t blockSize)
void | arm_float_to_q7 (float32_t *pSrc, q7_t *pDst, uint32_t blockSize)

Function Documentation

void arm_float_to_q31 | ( | float32_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the floating-point vector to Q31 vector.

Parameters:
[in] | *pSrc | points to the floating-point input vector
[out] | *pDst | points to the Q31 output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:
The equation used for the conversion process is:

     pDst[n] = (q31_t)(pSrc[n] * 2147483648);   0 <= n < blockSize.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
Note:
In order to apply rounding, the library should be rebuilt with the ROUNDING macro defined in the preprocessor section of project options.
Examples:
arm_graphic_equalizer_example_q31.c.

Definition at line 69 of file arm_float_to_q31.c.

void arm_float_to_q15 | ( | float32_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the floating-point vector to Q15 vector.

Parameters:
[in] | *pSrc | points to the floating-point input vector
[out] | *pDst | points to the Q15 output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:
The equation used for the conversion process is:

     pDst[n] = (q15_t)(pSrc[n] * 32768);   0 <= n < blockSize.
Scaling and Overflow Behavior:
The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
Note:
In order to apply rounding, the library should be rebuilt with the ROUNDING macro defined in the preprocessor section of project options.

Definition at line 65 of file arm_float_to_q15.c.

void arm_float_to_q7 | ( | float32_t * | pSrc,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the floating-point vector to Q7 vector.

Parameters:
[in] | *pSrc | points to the floating-point input vector
[out] | *pDst | points to the Q7 output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:
The equation used for the conversion process is:

     pDst[n] = (q7_t)(pSrc[n] * 128);   0 <= n < blockSize.
Scaling and Overflow Behavior:
The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
Note:
In order to apply rounding, the library should be rebuilt with the ROUNDING macro defined in the preprocessor section of project options.

Definition at line 64 of file arm_float_to_q7.c.

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CMSIS DSP Software Library: Complex Math Functions

  • Examples
Modules

Complex Math Functions

Modules

Complex Conjugate
Complex Dot Product
Complex Magnitude
Complex Magnitude Squared
Complex-by-Complex Multiplication
Complex-by-Real Multiplication

Detailed Description

This set of functions operates on complex data vectors. The data in the complex arrays is stored in an interleaved fashion (real, imag, real, imag, ...). In the API functions, the number of samples in a complex array refers to the number of complex values; the array contains twice this number of real values.

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CMSIS DSP Software Library: Controller Functions

  • Examples
Modules

Controller Functions

Modules

Sine Cosine
PID Motor Control
Vector Clarke Transform
Vector Inverse Clarke Transform
Vector Park Transform
Vector Inverse Park transform
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CMSIS DSP Software Library: Examples

  • Examples
Modules

Examples

Modules

Class Marks Example
Convolution Example
Dot Product Example
FIR Lowpass Filter Example
Frequency Bin Example
Graphic Audio Equalizer Example
Linear Interpolate Example
Matrix Example
Signal Convergence Example
SineCosine Example
Variance Example
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CMSIS DSP Software Library: Fast Math Functions

  • Examples
Modules

Fast Math Functions

Modules

Cosine
Sine
Square Root

Detailed Description

This set of functions provides a fast approximation to sine, cosine, and square root. As compared to most of the other functions in the CMSIS math library, the fast math functions operate on individual values and not arrays. There are separate functions for Q15, Q31, and floating-point data.

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CMSIS DSP Software Library: Filtering Functions

  • Examples
Modules

Filtering Functions

Modules

Biquad Cascade IIR Filters Using Direct Form I Structure
Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure
High Precision Q31 Biquad Cascade Filter
Convolution
Partial Convolution
Correlation
Finite Impulse Response (FIR) Decimator
Finite Impulse Response (FIR) Filters
Finite Impulse Response (FIR) Lattice Filters
Finite Impulse Response (FIR) Sparse Filters
Infinite Impulse Response (IIR) Lattice Filters
Least Mean Square (LMS) Filters
Normalized LMS Filters
Finite Impulse Response (FIR) Interpolator
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CMSIS DSP Software Library: Interpolation Functions

  • Examples
Modules

Interpolation Functions

Modules

Linear Interpolation
Bilinear Interpolation

Detailed Description

These functions perform 1- and 2-dimensional interpolation of data. Linear interpolation is used for 1-dimensional data and bilinear interpolation is used for 2-dimensional data.

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CMSIS DSP Software Library: Basic Math Functions

  • Examples
Modules

Basic Math Functions

Modules

Vector Absolute Value
Vector Addition
Vector Dot Product
Vector Multiplication
Vector Negate
Vector Offset
Vector Scale
Vector Shift
Vector Subtraction
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CMSIS DSP Software Library: Matrix Functions

  • Examples
Modules

Matrix Functions

Modules

Matrix Addition
Matrix Initialization
Matrix Inverse
Matrix Multiplication
Matrix Scale
Matrix Subtraction
Matrix Transpose

Detailed Description

This set of functions provides basic matrix math operations. The functions operate on matrix data structures. For example, the type definition for the floating-point matrix structure is shown below:

     typedef struct
     {
       uint16_t numRows;     // number of rows of the matrix.
       uint16_t numCols;     // number of columns of the matrix.
       float32_t *pData;     // points to the data of the matrix.
     } arm_matrix_instance_f32;

There are similar definitions for Q15 and Q31 data types.

The structure specifies the size of the matrix and then points to an array of data. The array is of size numRows X numCols and the values are arranged in row order. That is, the matrix element (i, j) is stored at:

     pData[i*numCols + j]
Init Functions
There is an associated initialization function for each type of matrix data structure. The initialization function sets the values of the internal structure fields. Refer to the function arm_mat_init_f32(), arm_mat_init_q31() and arm_mat_init_q15() for floating-point, Q31 and Q15 types, respectively.
Use of the initialization function is optional. However, if initialization function is used then the instance structure cannot be placed into a const data section. To place the instance structure in a const data section, manually initialize the data structure. For example:
 arm_matrix_instance_f32 S = {nRows, nColumns, pData};
 arm_matrix_instance_q31 S = {nRows, nColumns, pData};
 arm_matrix_instance_q15 S = {nRows, nColumns, pData};
where nRows specifies the number of rows, nColumns specifies the number of columns, and pData points to the data array.
Size Checking
By default all of the matrix functions perform size checking on the input and output matrices. For example, the matrix addition function verifies that the two input matrices and the output matrix all have the same number of rows and columns. If the size check fails the functions return:
     ARM_MATH_SIZE_MISMATCH
Otherwise the functions return
     ARM_MATH_SUCCESS
There is some overhead associated with this matrix size checking. The matrix size checking is enabled via the define
     ARM_MATH_MATRIX_CHECK
within the library project settings. By default this macro is defined and size checking is enabled. By changing the project settings and undefining this macro size checking is eliminated and the functions run a bit faster. With size checking disabled the functions always return ARM_MATH_SUCCESS.
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CMSIS DSP Software Library: Statistics Functions

  • Examples
Modules

Statistics Functions

Modules

Maximum
Mean
Minimum
Power
Root mean square (RMS)
Standard deviation
Variance
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CMSIS DSP Software Library: Support Functions

  • Examples
Modules

Support Functions

Modules

Convert 16-bit Integer value
Convert 32-bit Integer value
Convert 32-bit floating point value
Convert 8-bit Integer value
Vector Copy
Vector Fill
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CMSIS DSP Software Library: Transform Functions

  • Examples
Modules

Transform Functions

Modules

Complex FFT Functions
DCT Type IV Functions
Real FFT Functions
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CMSIS DSP Software Library: Vector Inverse Clarke Transform

  • Examples
Functions

Vector Inverse Clarke Transform
[Controller Functions]

Functions

static __INLINE void | arm_inv_clarke_f32 (float32_t Ialpha, float32_t Ibeta, float32_t *pIa, float32_t *pIb)
static __INLINE void | arm_inv_clarke_q31 (q31_t Ialpha, q31_t Ibeta, q31_t *pIa, q31_t *pIb)

Detailed Description

Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.

The function operates on a single sample of data and each call to the function returns the processed output. The library provides separate functions for Q31 and floating-point data types.

Algorithm
where pIa and pIb are the instantaneous stator phases and Ialpha and Ibeta are the two coordinates of time invariant vector.
Fixed-Point Behavior
Care must be taken when using the Q31 version of the Clarke transform. In particular, the overflow and saturation behavior of the accumulator used must be considered. Refer to the function specific documentation below for usage guidelines.

Function Documentation

static __INLINE void arm_inv_clarke_f32 | ( | float32_t | Ialpha,
 |  | float32_t | Ibeta,
 |  | float32_t * | pIa,
 |  | float32_t * | pIb
 | ) |  | [static]

Floating-point Inverse Clarke transform.

Parameters:
[in] | Ialpha | input two-phase orthogonal vector axis alpha
[in] | Ibeta | input two-phase orthogonal vector axis beta
[out] | *pIa | points to output three-phase coordinate a
[out] | *pIb | points to output three-phase coordinate b
Returns:
none.

Definition at line 5009 of file arm_math.h.

static __INLINE void arm_inv_clarke_q31 | ( | q31_t | Ialpha,
 |  | q31_t | Ibeta,
 |  | q31_t * | pIa,
 |  | q31_t * | pIb
 | ) |  | [static]

Inverse Clarke transform for Q31 version.

Parameters:
[in] | Ialpha | input two-phase orthogonal vector axis alpha
[in] | Ibeta | input two-phase orthogonal vector axis beta
[out] | *pIa | points to output three-phase coordinate a
[out] | *pIb | points to output three-phase coordinate b
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 32-bit accumulator. The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. There is saturation on the subtraction, hence there is no risk of overflow.

Definition at line 5038 of file arm_math.h.

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CMSIS DSP Software Library: Vector Inverse Park transform

  • Examples
Functions

Vector Inverse Park transform
[Controller Functions]

Functions

static __INLINE void | arm_inv_park_f32 (float32_t Id, float32_t Iq, float32_t *pIalpha, float32_t *pIbeta, float32_t sinVal, float32_t cosVal)
static __INLINE void | arm_inv_park_q31 (q31_t Id, q31_t Iq, q31_t *pIalpha, q31_t *pIbeta, q31_t sinVal, q31_t cosVal)

Detailed Description

Inverse Park transform converts the input flux and torque components to two-coordinate vector.

The function operates on a single sample of data and each call to the function returns the processed output. The library provides separate functions for Q31 and floating-point data types.

Algorithm
where pIalpha and pIbeta are the stator vector components, Id and Iq are rotor vector components and cosVal and sinVal are the cosine and sine values of theta (rotor flux position).
Fixed-Point Behavior
Care must be taken when using the Q31 version of the Park transform. In particular, the overflow and saturation behavior of the accumulator used must be considered. Refer to the function specific documentation below for usage guidelines.

Function Documentation

static __INLINE void arm_inv_park_f32 | ( | float32_t | Id,
 |  | float32_t | Iq,
 |  | float32_t * | pIalpha,
 |  | float32_t * | pIbeta,
 |  | float32_t | sinVal,
 |  | float32_t | cosVal
 | ) |  | [static]

Floating-point Inverse Park transform.

Parameters:
[in] | Id | input coordinate of rotor reference frame d
[in] | Iq | input coordinate of rotor reference frame q
[out] | *pIalpha | points to output two-phase orthogonal vector axis alpha
[out] | *pIbeta | points to output two-phase orthogonal vector axis beta
[in] | sinVal | sine value of rotation angle theta
[in] | cosVal | cosine value of rotation angle theta
Returns:
none.

Definition at line 5244 of file arm_math.h.

static __INLINE void arm_inv_park_q31 | ( | q31_t | Id,
 |  | q31_t | Iq,
 |  | q31_t * | pIalpha,
 |  | q31_t * | pIbeta,
 |  | q31_t | sinVal,
 |  | q31_t | cosVal
 | ) |  | [static]

Inverse Park transform for Q31 version.

Parameters:
[in] | Id | input coordinate of rotor reference frame d
[in] | Iq | input coordinate of rotor reference frame q
[out] | *pIalpha | points to output two-phase orthogonal vector axis alpha
[out] | *pIbeta | points to output two-phase orthogonal vector axis beta
[in] | sinVal | sine value of rotation angle theta
[in] | cosVal | cosine value of rotation angle theta
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 32-bit accumulator. The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. There is saturation on the addition, hence there is no risk of overflow.

Definition at line 5279 of file arm_math.h.

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CMSIS DSP Software Library: Mean

  • Examples
Functions

Mean
[Statistics Functions]

Functions

void | arm_mean_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
void | arm_mean_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
void | arm_mean_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
void | arm_mean_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult)

Detailed Description

Calculates the mean of the input vector. Mean is defined as the average of the elements in the vector. The underlying algorithm is used:

     Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;

There are separate functions for floating-point, Q31, Q15, and Q7 data types.

Function Documentation

void arm_mean_f32 | ( | float32_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | float32_t * | pResult
 | ) |  |

Mean value of a floating-point vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | mean value returned here
Returns:
none.
Examples:
arm_class_marks_example_f32.c.

Definition at line 64 of file arm_mean_f32.c.

void arm_mean_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q31_t * | pResult
 | ) |  |

Mean value of a Q31 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | mean value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. The input is represented in 1.31 format and is accumulated in a 64-bit accumulator in 33.31 format. There is no risk of internal overflow with this approach, and the full precision of intermediate result is preserved. Finally, the accumulator is truncated to yield a result of 1.31 format.

Definition at line 61 of file arm_mean_q31.c.

void arm_mean_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q15_t * | pResult
 | ) |  |

Mean value of a Q15 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | mean value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 32-bit internal accumulator. The input is represented in 1.15 format and is accumulated in a 32-bit accumulator in 17.15 format. There is no risk of internal overflow with this approach, and the full precision of intermediate result is preserved. Finally, the accumulator is saturated and truncated to yield a result of 1.15 format.

Definition at line 61 of file arm_mean_q15.c.

void arm_mean_q7 | ( | q7_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q7_t * | pResult
 | ) |  |

Mean value of a Q7 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | mean value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 32-bit internal accumulator. The input is represented in 1.7 format and is accumulated in a 32-bit accumulator in 25.7 format. There is no risk of internal overflow with this approach, and the full precision of intermediate result is preserved. Finally, the accumulator is truncated to yield a result of 1.7 format.

Definition at line 61 of file arm_mean_q7.c.

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CMSIS DSP Software Library: Vector Negate

  • Examples
Functions

Vector Negate
[Basic Math Functions]

Functions

void | arm_negate_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | arm_negate_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_negate_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
void | arm_negate_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)

Detailed Description

Negates the elements of a vector.

     pDst[n] = -pSrc[n],   0 <= n < blockSize.

Function Documentation

void arm_negate_f32 | ( | float32_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Negates the elements of a floating-point vector.

Parameters:
[in] | *pSrc | points to the input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Definition at line 62 of file arm_negate_f32.c.

void arm_negate_q31 | ( | q31_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Negates the elements of a Q31 vector.

Parameters:
[in] | *pSrc | points to the input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.

Definition at line 57 of file arm_negate_q31.c.

void arm_negate_q15 | ( | q15_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Negates the elements of a Q15 vector.

Parameters:
[in] | *pSrc | points to the input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.

Definition at line 57 of file arm_negate_q15.c.

void arm_negate_q7 | ( | q7_t * | pSrc,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Negates the elements of a Q7 vector.

Parameters:
[in] | *pSrc | points to the input vector
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.

Definition at line 57 of file arm_negate_q7.c.

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CMSIS DSP Software Library: Vector Offset

  • Examples
Functions

Vector Offset
[Basic Math Functions]

Functions

void | arm_offset_f32 (float32_t *pSrc, float32_t offset, float32_t *pDst, uint32_t blockSize)
void | arm_offset_q31 (q31_t *pSrc, q31_t offset, q31_t *pDst, uint32_t blockSize)
void | arm_offset_q15 (q15_t *pSrc, q15_t offset, q15_t *pDst, uint32_t blockSize)
void | arm_offset_q7 (q7_t *pSrc, q7_t offset, q7_t *pDst, uint32_t blockSize)

Detailed Description

Adds a constant offset to each element of a vector.

     pDst[n] = pSrc[n] + offset,   0 <= n < blockSize.

There are separate functions for floating-point, Q7, Q15, and Q31 data types.

Function Documentation

void arm_offset_f32 | ( | float32_t * | pSrc,
 |  | float32_t | offset,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Adds a constant offset to a floating-point vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | offset | is the offset to be added
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Definition at line 66 of file arm_offset_f32.c.

void arm_offset_q31 | ( | q31_t * | pSrc,
 |  | q31_t | offset,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Adds a constant offset to a Q31 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | offset | is the offset to be added
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.

Definition at line 58 of file arm_offset_q31.c.

void arm_offset_q15 | ( | q15_t * | pSrc,
 |  | q15_t | offset,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Adds a constant offset to a Q15 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | offset | is the offset to be added
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.

Definition at line 58 of file arm_offset_q15.c.

void arm_offset_q7 | ( | q7_t * | pSrc,
 |  | q7_t | offset,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Adds a constant offset to a Q7 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | offset | is the offset to be added
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] are saturated.

Definition at line 58 of file arm_offset_q7.c.

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CMSIS DSP Software Library: Vector Park Transform

  • Examples
Functions

Vector Park Transform
[Controller Functions]

Functions

static __INLINE void | arm_park_f32 (float32_t Ialpha, float32_t Ibeta, float32_t *pId, float32_t *pIq, float32_t sinVal, float32_t cosVal)
static __INLINE void | arm_park_q31 (q31_t Ialpha, q31_t Ibeta, q31_t *pId, q31_t *pIq, q31_t sinVal, q31_t cosVal)

Detailed Description

Forward Park transform converts the input two-coordinate vector to flux and torque components. The Park transform can be used to realize the transformation of the Ialpha and the Ibeta currents from the stationary to the moving reference frame and control the spatial relationship between the stator vector current and rotor flux vector. If we consider the d axis aligned with the rotor flux, the diagram below shows the current vector and the relationship from the two reference frames:

Stator current space vector and its component in (a,b) and in the d,q rotating reference frame

The function operates on a single sample of data and each call to the function returns the processed output. The library provides separate functions for Q31 and floating-point data types.

Algorithm
where Ialpha and Ibeta are the stator vector components, pId and pIq are rotor vector components and cosVal and sinVal are the cosine and sine values of theta (rotor flux position).
Fixed-Point Behavior
Care must be taken when using the Q31 version of the Park transform. In particular, the overflow and saturation behavior of the accumulator used must be considered. Refer to the function specific documentation below for usage guidelines.

Function Documentation

static __INLINE void arm_park_f32 | ( | float32_t | Ialpha,
 |  | float32_t | Ibeta,
 |  | float32_t * | pId,
 |  | float32_t * | pIq,
 |  | float32_t | sinVal,
 |  | float32_t | cosVal
 | ) |  | [static]

Floating-point Park transform.

Parameters:
[in] | Ialpha | input two-phase vector coordinate alpha
[in] | Ibeta | input two-phase vector coordinate beta
[out] | *pId | points to output rotor reference frame d
[out] | *pIq | points to output rotor reference frame q
[in] | sinVal | sine value of rotation angle theta
[in] | cosVal | cosine value of rotation angle theta
Returns:
none.

The function implements the forward Park transform.

Definition at line 5125 of file arm_math.h.

static __INLINE void arm_park_q31 | ( | q31_t | Ialpha,
 |  | q31_t | Ibeta,
 |  | q31_t * | pId,
 |  | q31_t * | pIq,
 |  | q31_t | sinVal,
 |  | q31_t | cosVal
 | ) |  | [static]

Park transform for Q31 version.

Parameters:
[in] | Ialpha | input two-phase vector coordinate alpha
[in] | Ibeta | input two-phase vector coordinate beta
[out] | *pId | points to output rotor reference frame d
[out] | *pIq | points to output rotor reference frame q
[in] | sinVal | sine value of rotation angle theta
[in] | cosVal | cosine value of rotation angle theta
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 32-bit accumulator. The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. There is saturation on the addition and subtraction, hence there is no risk of overflow.

Definition at line 5159 of file arm_math.h.

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CMSIS DSP Software Library: Power

  • Examples
Functions

Power
[Statistics Functions]

Functions

void | arm_power_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
void | arm_power_q31 (q31_t *pSrc, uint32_t blockSize, q63_t *pResult)
void | arm_power_q15 (q15_t *pSrc, uint32_t blockSize, q63_t *pResult)
void | arm_power_q7 (q7_t *pSrc, uint32_t blockSize, q31_t *pResult)

Detailed Description

Calculates the sum of the squares of the elements in the input vector. The underlying algorithm is used:

     Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];

There are separate functions for floating point, Q31, Q15, and Q7 data types.

Function Documentation

void arm_power_f32 | ( | float32_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | float32_t * | pResult
 | ) |  |

Sum of the squares of the elements of a floating-point vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | sum of the squares value returned here
Returns:
none.

Definition at line 68 of file arm_power_f32.c.

void arm_power_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q63_t * | pResult
 | ) |  |

Sum of the squares of the elements of a Q31 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | sum of the squares value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. The input is represented in 1.31 format. Intermediate multiplication yields a 2.62 format, and this result is truncated to 2.48 format by discarding the lower 14 bits. The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. With 15 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 16.48 format.

Definition at line 63 of file arm_power_q31.c.

void arm_power_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q63_t * | pResult
 | ) |  |

Sum of the squares of the elements of a Q15 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | sum of the squares value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 34.30 format.

Definition at line 62 of file arm_power_q15.c.

void arm_power_q7 | ( | q7_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q31_t * | pResult
 | ) |  |

Sum of the squares of the elements of a Q7 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | sum of the squares value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 32-bit internal accumulator. The input is represented in 1.7 format. Intermediate multiplication yields a 2.14 format, and this result is added without saturation to an accumulator in 18.14 format. With 17 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 18.14 format.

Definition at line 62 of file arm_power_q7.c.

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CMSIS DSP Software Library: Convert 8-bit Integer value

  • Examples
Functions

Convert 8-bit Integer value
[Support Functions]

Functions

void | arm_q7_to_float (q7_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | arm_q7_to_q31 (q7_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_q7_to_q15 (q7_t *pSrc, q15_t *pDst, uint32_t blockSize)

Function Documentation

void arm_q7_to_float | ( | q7_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the Q7 vector to floating-point vector.

Parameters:
[in] | *pSrc | points to the Q7 input vector
[out] | *pDst | points to the floating-point output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:

The equation used for the conversion process is:

     pDst[n] = (float32_t) pSrc[n] / 128;   0 <= n < blockSize.

Definition at line 63 of file arm_q7_to_float.c.

void arm_q7_to_q31 | ( | q7_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the Q7 vector to Q31 vector.

Parameters:
[in] | *pSrc | points to the Q7 input vector
[out] | *pDst | points to the Q31 output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:

The equation used for the conversion process is:

     pDst[n] = (q31_t) pSrc[n] << 24;   0 <= n < blockSize.

Definition at line 59 of file arm_q7_to_q31.c.

void arm_q7_to_q15 | ( | q7_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the Q7 vector to Q15 vector.

Parameters:
[in] | *pSrc | points to the Q7 input vector
[out] | *pDst | points to the Q15 output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:

The equation used for the conversion process is:

     pDst[n] = (q15_t) pSrc[n] << 8;   0 <= n < blockSize.

Definition at line 62 of file arm_q7_to_q15.c.

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CMSIS DSP Software Library: Convert 16-bit Integer value

  • Examples
Functions

Convert 16-bit Integer value
[Support Functions]

Functions

void | arm_q15_to_float (q15_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | arm_q15_to_q31 (q15_t *pSrc, q31_t *pDst, uint32_t blockSize)
void | arm_q15_to_q7 (q15_t *pSrc, q7_t *pDst, uint32_t blockSize)

Function Documentation

void arm_q15_to_float | ( | q15_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the Q15 vector to floating-point vector.

Parameters:
[in] | *pSrc | points to the Q15 input vector
[out] | *pDst | points to the floating-point output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:

The equation used for the conversion process is:

     pDst[n] = (float32_t) pSrc[n] / 32768;   0 <= n < blockSize.

Definition at line 66 of file arm_q15_to_float.c.

void arm_q15_to_q31 | ( | q15_t * | pSrc,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the Q15 vector to Q31 vector.

Parameters:
[in] | *pSrc | points to the Q15 input vector
[out] | *pDst | points to the Q31 output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:

The equation used for the conversion process is:

     pDst[n] = (q31_t) pSrc[n] << 16;   0 <= n < blockSize.

Definition at line 59 of file arm_q15_to_q31.c.

void arm_q15_to_q7 | ( | q15_t * | pSrc,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the Q15 vector to Q7 vector.

Parameters:
[in] | *pSrc | points to the Q15 input vector
[out] | *pDst | points to the Q7 output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:

The equation used for the conversion process is:

     pDst[n] = (q7_t) pSrc[n] >> 8;   0 <= n < blockSize.

Definition at line 60 of file arm_q15_to_q7.c.

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CMSIS DSP Software Library: Convert 32-bit Integer value

  • Examples
Functions

Convert 32-bit Integer value
[Support Functions]

Functions

void | arm_q31_to_float (q31_t *pSrc, float32_t *pDst, uint32_t blockSize)
void | arm_q31_to_q15 (q31_t *pSrc, q15_t *pDst, uint32_t blockSize)
void | arm_q31_to_q7 (q31_t *pSrc, q7_t *pDst, uint32_t blockSize)

Function Documentation

void arm_q31_to_float | ( | q31_t * | pSrc,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the Q31 vector to floating-point vector.

Parameters:
[in] | *pSrc | points to the Q31 input vector
[out] | *pDst | points to the floating-point output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:

The equation used for the conversion process is:

     pDst[n] = (float32_t) pSrc[n] / 2147483648;   0 <= n < blockSize.
Examples:
arm_graphic_equalizer_example_q31.c.

Definition at line 63 of file arm_q31_to_float.c.

void arm_q31_to_q15 | ( | q31_t * | pSrc,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the Q31 vector to Q15 vector.

Parameters:
[in] | *pSrc | points to the Q31 input vector
[out] | *pDst | points to the Q15 output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:

The equation used for the conversion process is:

     pDst[n] = (q15_t) pSrc[n] >> 16;   0 <= n < blockSize.

Definition at line 59 of file arm_q31_to_q15.c.

void arm_q31_to_q7 | ( | q31_t * | pSrc,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Converts the elements of the Q31 vector to Q7 vector.

Parameters:
[in] | *pSrc | points to the Q31 input vector
[out] | *pDst | points to the Q7 output vector
[in] | blockSize | length of the input vector
Returns:
none.
Description:

The equation used for the conversion process is:

     pDst[n] = (q7_t) pSrc[n] >> 24;   0 <= n < blockSize.

Definition at line 59 of file arm_q31_to_q7.c.

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CMSIS DSP Software Library: Vector Scale

  • Examples
Functions

Vector Scale
[Basic Math Functions]

Functions

void | arm_scale_f32 (float32_t *pSrc, float32_t scale, float32_t *pDst, uint32_t blockSize)
void | arm_scale_q31 (q31_t *pSrc, q31_t scaleFract, int8_t shift, q31_t *pDst, uint32_t blockSize)
void | arm_scale_q15 (q15_t *pSrc, q15_t scaleFract, int8_t shift, q15_t *pDst, uint32_t blockSize)
void | arm_scale_q7 (q7_t *pSrc, q7_t scaleFract, int8_t shift, q7_t *pDst, uint32_t blockSize)

Detailed Description

Multiply a vector by a scalar value. For floating-point data, the algorithm used is:

     pDst[n] = pSrc[n] * scale,   0 <= n < blockSize.

In the fixed-point Q7, Q15, and Q31 functions, scale is represented by a fractional multiplication scaleFract and an arithmetic shift shift. The shift allows the gain of the scaling operation to exceed 1.0. The algorithm used with fixed-point data is:

     pDst[n] = (pSrc[n] * scaleFract) << shift,   0 <= n < blockSize.

The overall scale factor applied to the fixed-point data is

     scale = scaleFract * 2^shift.

Function Documentation

void arm_scale_f32 | ( | float32_t * | pSrc,
 |  | float32_t | scale,
 |  | float32_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Multiplies a floating-point vector by a scalar.

Parameters:
[in] | *pSrc | points to the input vector
[in] | scale | scale factor to be applied
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.
Examples:
arm_graphic_equalizer_example_q31.c, and arm_signal_converge_example_f32.c.

Definition at line 78 of file arm_scale_f32.c.

void arm_scale_q31 | ( | q31_t * | pSrc,
 |  | q31_t | scaleFract,
 |  | int8_t | shift,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Multiplies a Q31 vector by a scalar.

Parameters:
[in] | *pSrc | points to the input vector
[in] | scaleFract | fractional portion of the scale value
[in] | shift | number of bits to shift the result by
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The input data *pSrc and scaleFract are in 1.31 format. These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.
Examples:
arm_graphic_equalizer_example_q31.c.

Definition at line 59 of file arm_scale_q31.c.

void arm_scale_q15 | ( | q15_t * | pSrc,
 |  | q15_t | scaleFract,
 |  | int8_t | shift,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Multiplies a Q15 vector by a scalar.

Parameters:
[in] | *pSrc | points to the input vector
[in] | scaleFract | fractional portion of the scale value
[in] | shift | number of bits to shift the result by
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The input data *pSrc and scaleFract are in 1.15 format. These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.

Definition at line 60 of file arm_scale_q15.c.

void arm_scale_q7 | ( | q7_t * | pSrc,
 |  | q7_t | scaleFract,
 |  | int8_t | shift,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Multiplies a Q7 vector by a scalar.

Parameters:
[in] | *pSrc | points to the input vector
[in] | scaleFract | fractional portion of the scale value
[in] | shift | number of bits to shift the result by
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The input data *pSrc and scaleFract are in 1.7 format. These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format.

Definition at line 59 of file arm_scale_q7.c.

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CMSIS DSP Software Library: Vector Shift

  • Examples
Functions

Vector Shift
[Basic Math Functions]

Functions

void | arm_shift_q31 (q31_t *pSrc, int8_t shiftBits, q31_t *pDst, uint32_t blockSize)
void | arm_shift_q15 (q15_t *pSrc, int8_t shiftBits, q15_t *pDst, uint32_t blockSize)
void | arm_shift_q7 (q7_t *pSrc, int8_t shiftBits, q7_t *pDst, uint32_t blockSize)

Detailed Description

Shifts the elements of a fixed-point vector by a specified number of bits. There are separate functions for Q7, Q15, and Q31 data types. The underlying algorithm used is:

     pDst[n] = pSrc[n] << shift,   0 <= n < blockSize.

If shift is positive then the elements of the vector are shifted to the left. If shift is negative then the elements of the vector are shifted to the right.

Function Documentation

void arm_shift_q31 | ( | q31_t * | pSrc,
 |  | int8_t | shiftBits,
 |  | q31_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Shifts the elements of a Q31 vector a specified number of bits.

Parameters:
[in] | *pSrc | points to the input vector
[in] | shiftBits | number of bits to shift. A positive value shifts left; a negative value shifts right.
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.

Definition at line 73 of file arm_shift_q31.c.

void arm_shift_q15 | ( | q15_t * | pSrc,
 |  | int8_t | shiftBits,
 |  | q15_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Shifts the elements of a Q15 vector a specified number of bits.

Parameters:
[in] | *pSrc | points to the input vector
[in] | shiftBits | number of bits to shift. A positive value shifts left; a negative value shifts right.
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.

Definition at line 58 of file arm_shift_q15.c.

void arm_shift_q7 | ( | q7_t * | pSrc,
 |  | int8_t | shiftBits,
 |  | q7_t * | pDst,
 |  | uint32_t | blockSize
 | ) |  |

Shifts the elements of a Q7 vector a specified number of bits.

Parameters:
[in] | *pSrc | points to the input vector
[in] | shiftBits | number of bits to shift. A positive value shifts left; a negative value shifts right.
[out] | *pDst | points to the output vector
[in] | blockSize | number of samples in the vector
Returns:
none.

Scaling and Overflow Behavior:

The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x8 0x7F] will be saturated.

Definition at line 59 of file arm_shift_q7.c.

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CMSIS DSP Software Library: Sine

  • Examples
Functions | Variables

Sine
[Fast Math Functions]

Functions

float32_t | arm_sin_f32 (float32_t x)
q31_t | arm_sin_q31 (q31_t x)
q15_t | arm_sin_q15 (q15_t x)

Variables

static const float32_t | sinTable [259]
static const q31_t | sinTableQ31 [259]
static const q15_t | sinTableQ15 [259]

Detailed Description

Computes the trigonometric sine function using a combination of table lookup and cubic interpolation. There are separate functions for Q15, Q31, and floating-point data types. The input to the floating-point version is in radians while the fixed-point Q15 and Q31 have a scaled input with the range [0 1) mapping to [0 2*pi).

The implementation is based on table lookup using 256 values together with cubic interpolation. The steps used are:

  1. Calculation of the nearest integer table index
  2. Fetch the four table values a, b, c, and d
  3. Compute the fractional portion (fract) of the table index.
  4. Calculation of wa, wb, wc, wd
  5. The final result equals a*wa + b*wb + c*wc + d*wd

where

    a=Table[index-1];
    b=Table[index+0];
    c=Table[index+1];
    d=Table[index+2];

and

    wa=-(1/6)*fract.^3 + (1/2)*fract.^2 - (1/3)*fract;
    wb=(1/2)*fract.^3 - fract.^2 - (1/2)*fract + 1;
    wc=-(1/2)*fract.^3+(1/2)*fract.^2+fract;
    wd=(1/6)*fract.^3 - (1/6)*fract;

Function Documentation

float32_t arm_sin_f32 ( float32_t x )

Fast approximation to the trigonometric sine function for floating-point data.

Parameters:
[in] x input value in radians.
Returns:
sin(x).
Examples:
arm_linear_interp_example_f32.c, and arm_sin_cos_example_f32.c.

Definition at line 195 of file arm_sin_f32.c.

q31_t arm_sin_q31 ( q31_t x )

Fast approximation to the trigonometric sine function for Q31 data.

Parameters:
[in] x Scaled input value in radians.
Returns:
sin(x).

The Q31 input value is in the range [0 +1) and is mapped to a radian value in the range [0 2*pi).

Definition at line 136 of file arm_sin_q31.c.

q15_t arm_sin_q15 ( q15_t x )

Fast approximation to the trigonometric sine function for Q15 data.

Parameters:
[in] x Scaled input value in radians.
Returns:
sin(x).

The Q15 input value is in the range [0 +1) and is mapped to a radian value in the range [0 2*pi).

Definition at line 106 of file arm_sin_q15.c.

Variable Documentation

const float32_t sinTable[259] [static]
Example code for Generation of Floating-point Sin Table: tableSize = 256;
for(n = -1; n < (tableSize + 1); n++)
 {
    sinTable[n+1]=sin(2*pi*n/tableSize);
 }
where pi value is 3.14159265358979

Definition at line 88 of file arm_sin_f32.c.

const q31_t sinTableQ31[259] [static]
Tables generated are in Q31(1.31 Fixed point format) Generation of sin values in floating point:
tableSize = 256;
 for(n = -1; n < (tableSize + 1); n++)
 {
    sinTable[n+1]= sin(2*pi*n/tableSize);
 }
where pi value is 3.14159265358979
Convert Floating point to Q31(Fixed point): (sinTable[i] * pow(2, 31))
rounding to nearest integer is done sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);

Definition at line 59 of file arm_sin_q31.c.

const q15_t sinTableQ15[259] [static]
Example code for Generation of Q15 Sin Table:
tableSize = 256;
 for(n = -1; n < (tableSize + 1); n++)
 {
    sinTable[n+1]=sin(2*pi*n/tableSize);
 }
where pi value is 3.14159265358979
Convert Floating point to Q15(Fixed point): (sinTable[i] * pow(2, 15))
rounding to nearest integer is done sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);

Definition at line 61 of file arm_sin_q15.c.

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CMSIS DSP Software Library: Variance

  • Examples
Functions

Variance
[Statistics Functions]

Functions

void | arm_var_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
void | arm_var_q31 (q31_t *pSrc, uint32_t blockSize, q63_t *pResult)
void | arm_var_q15 (q15_t *pSrc, uint32_t blockSize, q31_t *pResult)

Detailed Description

Calculates the variance of the elements in the input vector. The underlying algorithm is used:

     Result = (sumOfSquares - sum2 / blockSize) / (blockSize - 1)
       where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]
                       sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]

There are separate functions for floating point, Q31, and Q15 data types.

Function Documentation

void arm_var_f32 | ( | float32_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | float32_t * | pResult
 | ) |  |

Variance of the elements of a floating-point vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | variance value returned here
Returns:
none.
Examples:
arm_class_marks_example_f32.c.

Definition at line 69 of file arm_var_f32.c.

void arm_var_q31 | ( | q31_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q63_t * | pResult
 | ) |  |

Variance of the elements of a Q31 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | variance value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The input is represented in 1.31 format, and intermediate multiplication yields a 2.62 format. The accumulator maintains full precision of the intermediate multiplication results, but provides only a single guard bit. There is no saturation on intermediate additions. If the accumulator overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(blockSize) bits, as a total of blockSize additions are performed internally. Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.

Definition at line 66 of file arm_var_q31.c.

void arm_var_q15 | ( | q15_t * | pSrc,
 |  | uint32_t | blockSize,
 |  | q31_t * | pResult
 | ) |  |

Variance of the elements of a Q15 vector.

Parameters:
[in] | *pSrc | points to the input vector
[in] | blockSize | length of the input vector
[out] | *pResult | variance value returned here
Returns:
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 15 bits, and then saturated to yield a result in 1.15 format.

Definition at line 64 of file arm_var_q15.c.

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CMSIS DSP Software Library: CMSIS DSP Software Library

  • Examples

CMSIS DSP Software Library

Version1.0.10

Introduction

This user manual describes the CMSIS DSP software library, a suite of common signal processing functions for use on Cortex-M processor based devices.

The library is divided into a number of modules each covering a specific category:

  • Basic math functions
  • Fast math functions
  • Complex math functions
  • Filters
  • Matrix functions
  • Transforms
  • Motor control functions
  • Statistical functions
  • Support functions
  • Interpolation functions

The library has separate functions for operating on 8-bit integers, 16-bit integers, 32-bit integer and 32-bit floating-point values.

Processor Support

The library is completely written in C and is fully CMSIS compliant. High performance is achieved through maximum use of Cortex-M4 intrinsics.

The supplied library source code also builds and runs on the Cortex-M3 and Cortex-M0 processor, with the DSP intrinsics being emulated through software.

Toolchain Support

The library has been developed and tested with MDK-ARM version 4.21. The library is being tested in GCC and IAR toolchains and updates on this activity will be made available shortly.

Using the Library

The library installer contains prebuilt versions of the libraries in the Lib folder.

  • arm_cortexM4lf_math.lib (Little endian and Floating Point Unit on Cortex-M4)
  • arm_cortexM4bf_math.lib (Big endian and Floating Point Unit on Cortex-M4)
  • arm_cortexM4l_math.lib (Little endian on Cortex-M4)
  • arm_cortexM4b_math.lib (Big endian on Cortex-M4)
  • arm_cortexM3l_math.lib (Little endian on Cortex-M3)
  • arm_cortexM3b_math.lib (Big endian on Cortex-M3)
  • arm_cortexM0l_math.lib (Little endian on Cortex-M0)
  • arm_cortexM0b_math.lib (Big endian on Cortex-M3)

The library functions are declared in the public file arm_math.h which is placed in the Include folder. Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single public header file arm_math.h for Cortex-M4/M3/M0 with little endian and big endian. Same header file will be used for floating point unit(FPU) variants. Define the appropriate pre processor MACRO ARM_MATH_CM4 or ARM_MATH_CM3 or ARM_MATH_CM0 depending on the target processor in the application.

Examples

The library ships with a number of examples which demonstrate how to use the library functions.

Building the Library

The library installer contains project files to re build libraries on MDK Tool chain in the CMSIS folder.

  • arm_cortexM0b_math.uvproj
  • arm_cortexM0l_math.uvproj
  • arm_cortexM3b_math.uvproj
  • arm_cortexM3l_math.uvproj
  • arm_cortexM4b_math.uvproj
  • arm_cortexM4l_math.uvproj
  • arm_cortexM4bf_math.uvproj
  • arm_cortexM4lf_math.uvproj

Each library project have differant pre-processor macros.

ARM_MATH_CMx: Define macro ARM_MATH_CM4 for building the library on Cortex-M4 target, ARM_MATH_CM3 for building library on Cortex-M3 target and ARM_MATH_CM0 for building library on cortex-M0 target.

ARM_MATH_BIG_ENDIAN: Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.

ARM_MATH_MATRIX_CHECK: Define macro for checking on the input and output sizes of matrices

ARM_MATH_ROUNDING: Define macro for rounding on support functions

__FPU_PRESENT: Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for M4bf and M4lf libraries

The project can be built by opening the appropriate project in MDK-ARM 4.21 chain and defining the optional pre processor MACROs detailed above.

Copyright Notice

Copyright (C) 2010 ARM Limited. All rights reserved.

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CMSIS DSP Software Library: Module Index

  • Examples

Modules

Here is a list of all modules:
  • Basic Math Functions
    • Vector Absolute Value
    • Vector Addition
    • Vector Dot Product
    • Vector Multiplication
    • Vector Negate
    • Vector Offset
    • Vector Scale
    • Vector Shift
    • Vector Subtraction
  • Fast Math Functions
    • Cosine
    • Sine
    • Square Root
  • Complex Math Functions
    • Complex Conjugate
    • Complex Dot Product
    • Complex Magnitude
    • Complex Magnitude Squared
    • Complex-by-Complex Multiplication
    • Complex-by-Real Multiplication
  • Filtering Functions
    • Biquad Cascade IIR Filters Using Direct Form I Structure
    • Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure
    • High Precision Q31 Biquad Cascade Filter
    • Convolution
    • Partial Convolution
    • Correlation
    • Finite Impulse Response (FIR) Decimator
    • Finite Impulse Response (FIR) Filters
    • Finite Impulse Response (FIR) Lattice Filters
    • Finite Impulse Response (FIR) Sparse Filters
    • Infinite Impulse Response (IIR) Lattice Filters
    • Least Mean Square (LMS) Filters
    • Normalized LMS Filters
    • Finite Impulse Response (FIR) Interpolator
  • Matrix Functions
    • Matrix Addition
    • Matrix Initialization
    • Matrix Inverse
    • Matrix Multiplication
    • Matrix Scale
    • Matrix Subtraction
    • Matrix Transpose
  • Transform Functions
    • Complex FFT Functions
    • DCT Type IV Functions
    • Real FFT Functions
  • Controller Functions
    • Sine Cosine
    • PID Motor Control
    • Vector Clarke Transform
    • Vector Inverse Clarke Transform
    • Vector Park Transform
    • Vector Inverse Park transform
  • Statistics Functions
    • Maximum
    • Mean
    • Minimum
    • Power
    • Root mean square (RMS)
    • Standard deviation
    • Variance
  • Support Functions
    • Convert 16-bit Integer value
    • Convert 32-bit Integer value
    • Convert 32-bit floating point value
    • Convert 8-bit Integer value
    • Vector Copy
    • Vector Fill
  • Interpolation Functions
    • Linear Interpolation
    • Bilinear Interpolation
  • Examples
    • Class Marks Example
    • Convolution Example
    • Dot Product Example
    • FIR Lowpass Filter Example
    • Frequency Bin Example
    • Graphic Audio Equalizer Example
    • Linear Interpolate Example
    • Matrix Example
    • Signal Convergence Example
    • SineCosine Example
    • Variance Example
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CMSIS DSP Software Library: arm_bilinear_interp_instance_f32 Struct Reference

  • Examples
  • Data Structures
  • Data Fields
Data Fields

arm_bilinear_interp_instance_f32 Struct Reference

Instance structure for the floating-point bilinear interpolation function. More...

#include <arm_math.h>

Data Fields

uint16_t | numRows
uint16_t | numCols
float32_t * pData

Detailed Description

Instance structure for the floating-point bilinear interpolation function.

Definition at line 1783 of file arm_math.h.

Field Documentation

uint16_t arm_bilinear_interp_instance_f32::numRows

number of rows in the data table.

Definition at line 1785 of file arm_math.h.

uint16_t arm_bilinear_interp_instance_f32::numCols

number of columns in the data table.

Definition at line 1786 of file arm_math.h.

float32_t* arm_bilinear_interp_instance_f32::pData

points to the data table.

Definition at line 1787 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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CMSIS DSP Software Library: arm_bilinear_interp_instance_q7 Struct Reference

  • Examples
  • Data Structures
  • Data Fields
Data Fields

arm_bilinear_interp_instance_q7 Struct Reference

Instance structure for the Q15 bilinear interpolation function. More...

#include <arm_math.h>

Data Fields

uint16_t | numRows
uint16_t | numCols
q7_t * pData

Detailed Description

Instance structure for the Q15 bilinear interpolation function.

Definition at line 1816 of file arm_math.h.

Field Documentation

uint16_t arm_bilinear_interp_instance_q7::numRows

number of rows in the data table.

Definition at line 1818 of file arm_math.h.

uint16_t arm_bilinear_interp_instance_q7::numCols

number of columns in the data table.

Definition at line 1819 of file arm_math.h.

q7_t* arm_bilinear_interp_instance_q7::pData

points to the data table.

Definition at line 1820 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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CMSIS DSP Software Library: arm_bilinear_interp_instance_q15 Struct Reference

  • Examples
  • Data Structures
  • Data Fields
Data Fields

arm_bilinear_interp_instance_q15 Struct Reference

Instance structure for the Q15 bilinear interpolation function. More...

#include <arm_math.h>

Data Fields

uint16_t | numRows
uint16_t | numCols
q15_t * pData

Detailed Description

Instance structure for the Q15 bilinear interpolation function.

Definition at line 1805 of file arm_math.h.

Field Documentation

uint16_t arm_bilinear_interp_instance_q15::numRows

number of rows in the data table.

Definition at line 1807 of file arm_math.h.

uint16_t arm_bilinear_interp_instance_q15::numCols

number of columns in the data table.

Definition at line 1808 of file arm_math.h.

q15_t* arm_bilinear_interp_instance_q15::pData

points to the data table.

Definition at line 1809 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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CMSIS DSP Software Library: arm_bilinear_interp_instance_q31 Struct Reference

  • Examples
  • Data Structures
  • Data Fields
Data Fields

arm_bilinear_interp_instance_q31 Struct Reference

Instance structure for the Q31 bilinear interpolation function. More...

#include <arm_math.h>

Data Fields

uint16_t | numRows
uint16_t | numCols
q31_t * pData

Detailed Description

Instance structure for the Q31 bilinear interpolation function.

Definition at line 1794 of file arm_math.h.

Field Documentation

uint16_t arm_bilinear_interp_instance_q31::numRows

number of rows in the data table.

Definition at line 1796 of file arm_math.h.

uint16_t arm_bilinear_interp_instance_q31::numCols

number of columns in the data table.

Definition at line 1797 of file arm_math.h.

q31_t* arm_bilinear_interp_instance_q31::pData

points to the data table.

Definition at line 1798 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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CMSIS DSP Software Library: arm_biquad_cas_df1_32x64_ins_q31 Struct Reference

  • Examples
  • Data Structures
  • Data Fields
Data Fields

arm_biquad_cas_df1_32x64_ins_q31 Struct Reference

Instance structure for the high precision Q31 Biquad cascade filter. More...

#include <arm_math.h>

Data Fields

uint8_t | numStages
q63_t * pState
q31_t * pCoeffs
uint8_t | postShift

Detailed Description

Instance structure for the high precision Q31 Biquad cascade filter.

Examples:

arm_graphic_equalizer_example_q31.c.

Definition at line 3539 of file arm_math.h.

Field Documentation

uint8_t arm_biquad_cas_df1_32x64_ins_q31::numStages

number of 2nd order stages in the filter. Overall order is 2*numStages.

Definition at line 3541 of file arm_math.h.

q63_t* arm_biquad_cas_df1_32x64_ins_q31::pState

points to the array of state coefficients. The array is of length 4*numStages.

Definition at line 3542 of file arm_math.h.

q31_t* arm_biquad_cas_df1_32x64_ins_q31::pCoeffs

points to the array of coefficients. The array is of length 5*numStages.

Definition at line 3543 of file arm_math.h.

uint8_t arm_biquad_cas_df1_32x64_ins_q31::postShift

additional shift, in bits, applied to each output sample.

Definition at line 3544 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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CMSIS DSP Software Library: arm_biquad_cascade_df2T_instance_f32 Struct Reference

  • Examples
  • Data Structures
  • Data Fields
Data Fields

arm_biquad_cascade_df2T_instance_f32 Struct Reference

Instance structure for the floating-point transposed direct form II Biquad cascade filter. More...

#include <arm_math.h>

Data Fields

uint8_t numStages
float32_t * pState
float32_t * pCoeffs

Detailed Description

Instance structure for the floating-point transposed direct form II Biquad cascade filter.

Definition at line 3586 of file arm_math.h.

Field Documentation

uint8_t arm_biquad_cascade_df2T_instance_f32::numStages

number of 2nd order stages in the filter. Overall order is 2*numStages.

Definition at line 3588 of file arm_math.h.

float32_t* arm_biquad_cascade_df2T_instance_f32::pState

points to the array of state coefficients. The array is of length 2*numStages.

Definition at line 3589 of file arm_math.h.

float32_t* arm_biquad_cascade_df2T_instance_f32::pCoeffs

points to the array of coefficients. The array is of length 5*numStages.

Definition at line 3590 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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CMSIS DSP Software Library: arm_biquad_casd_df1_inst_f32 Struct Reference

  • Examples
  • Data Structures
  • Data Fields
Data Fields

arm_biquad_casd_df1_inst_f32 Struct Reference

Instance structure for the floating-point Biquad cascade filter. More...

#include <arm_math.h>

Data Fields

uint32_t numStages
float32_t * pState
float32_t * pCoeffs

Detailed Description

Instance structure for the floating-point Biquad cascade filter.

Definition at line 1195 of file arm_math.h.

Field Documentation

uint32_t arm_biquad_casd_df1_inst_f32::numStages

number of 2nd order stages in the filter. Overall order is 2*numStages.

Definition at line 1197 of file arm_math.h.

float32_t* arm_biquad_casd_df1_inst_f32::pState

Points to the array of state coefficients. The array is of length 4*numStages.

Definition at line 1198 of file arm_math.h.

float32_t* arm_biquad_casd_df1_inst_f32::pCoeffs

Points to the array of coefficients. The array is of length 5*numStages.

Definition at line 1199 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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CMSIS DSP Software Library: arm_biquad_casd_df1_inst_q15 Struct Reference

  • Examples
  • Data Structures
  • Data Fields
Data Fields

arm_biquad_casd_df1_inst_q15 Struct Reference

Instance structure for the Q15 Biquad cascade filter. More...

#include <arm_math.h>

Data Fields

int8_t | numStages
q15_t * pState
q15_t * pCoeffs
int8_t | postShift

Detailed Description

Instance structure for the Q15 Biquad cascade filter.

Definition at line 1170 of file arm_math.h.

Field Documentation

int8_t arm_biquad_casd_df1_inst_q15::numStages

number of 2nd order stages in the filter. Overall order is 2*numStages.

Definition at line 1172 of file arm_math.h.

q15_t* arm_biquad_casd_df1_inst_q15::pState

Points to the array of state coefficients. The array is of length 4*numStages.

Definition at line 1173 of file arm_math.h.

q15_t* arm_biquad_casd_df1_inst_q15::pCoeffs

Points to the array of coefficients. The array is of length 5*numStages.

Definition at line 1174 of file arm_math.h.

int8_t arm_biquad_casd_df1_inst_q15::postShift

Additional shift, in bits, applied to each output sample.

Definition at line 1175 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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CMSIS DSP Software Library: arm_biquad_casd_df1_inst_q31 Struct Reference

  • Examples
  • Data Structures
  • Data Fields
Data Fields

arm_biquad_casd_df1_inst_q31 Struct Reference

Instance structure for the Q31 Biquad cascade filter. More...

#include <arm_math.h>

Data Fields

uint32_t | numStages
q31_t * pState
q31_t * pCoeffs
uint8_t | postShift

Detailed Description

Instance structure for the Q31 Biquad cascade filter.

Examples:

arm_graphic_equalizer_example_q31.c.

Definition at line 1183 of file arm_math.h.

Field Documentation

uint32_t arm_biquad_casd_df1_inst_q31::numStages

number of 2nd order stages in the filter. Overall order is 2*numStages.

Definition at line 1185 of file arm_math.h.

q31_t* arm_biquad_casd_df1_inst_q31::pState

Points to the array of state coefficients. The array is of length 4*numStages.

Definition at line 1186 of file arm_math.h.

q31_t* arm_biquad_casd_df1_inst_q31::pCoeffs

Points to the array of coefficients. The array is of length 5*numStages.

Definition at line 1187 of file arm_math.h.

uint8_t arm_biquad_casd_df1_inst_q31::postShift

Additional shift, in bits, applied to each output sample.

Definition at line 1188 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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CMSIS DSP Software Library: arm_cfft_radix4_instance_f32 Struct Reference

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Data Fields

arm_cfft_radix4_instance_f32 Struct Reference

Instance structure for the floating-point CFFT/CIFFT function. More...

#include <arm_math.h>

Data Fields

uint16_t | fftLen
uint8_t | ifftFlag
uint8_t | bitReverseFlag
float32_t * pTwiddle
uint16_t * | pBitRevTable
uint16_t | twidCoefModifier
uint16_t | bitRevFactor
float32_t onebyfftLen

Detailed Description

Instance structure for the floating-point CFFT/CIFFT function.

Examples:

arm_convolution_example_f32.c, and arm_fft_bin_example_f32.c.

Definition at line 1919 of file arm_math.h.

Field Documentation

uint16_t arm_cfft_radix4_instance_f32::fftLen

length of the FFT.

Definition at line 1921 of file arm_math.h.

uint8_t arm_cfft_radix4_instance_f32::ifftFlag

flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.

Definition at line 1922 of file arm_math.h.

uint8_t arm_cfft_radix4_instance_f32::bitReverseFlag

flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.

Definition at line 1923 of file arm_math.h.

float32_t* arm_cfft_radix4_instance_f32::pTwiddle

points to the twiddle factor table.

Definition at line 1924 of file arm_math.h.

uint16_t* arm_cfft_radix4_instance_f32::pBitRevTable

points to the bit reversal table.

Definition at line 1925 of file arm_math.h.

uint16_t arm_cfft_radix4_instance_f32::twidCoefModifier

twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

Definition at line 1926 of file arm_math.h.

uint16_t arm_cfft_radix4_instance_f32::bitRevFactor

bit reversal modifier that supports different size FFTs with the same bit reversal table.

Definition at line 1927 of file arm_math.h.

float32_t arm_cfft_radix4_instance_f32::onebyfftLen

value of 1/fftLen.

Definition at line 1928 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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CMSIS DSP Software Library: arm_cfft_radix4_instance_q15 Struct Reference

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Data Fields

arm_cfft_radix4_instance_q15 Struct Reference

Instance structure for the Q15 CFFT/CIFFT function. More...

#include <arm_math.h>

Data Fields

uint16_t | fftLen
uint8_t | ifftFlag
uint8_t | bitReverseFlag
q15_t * pTwiddle
uint16_t * | pBitRevTable
uint16_t | twidCoefModifier
uint16_t | bitRevFactor

Detailed Description

Instance structure for the Q15 CFFT/CIFFT function.

Definition at line 1889 of file arm_math.h.

Field Documentation

uint16_t arm_cfft_radix4_instance_q15::fftLen

length of the FFT.

Definition at line 1891 of file arm_math.h.

uint8_t arm_cfft_radix4_instance_q15::ifftFlag

flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.

Definition at line 1892 of file arm_math.h.

uint8_t arm_cfft_radix4_instance_q15::bitReverseFlag

flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.

Definition at line 1893 of file arm_math.h.

q15_t* arm_cfft_radix4_instance_q15::pTwiddle

points to the twiddle factor table.

Definition at line 1894 of file arm_math.h.

uint16_t* arm_cfft_radix4_instance_q15::pBitRevTable

points to the bit reversal table.

Definition at line 1895 of file arm_math.h.

uint16_t arm_cfft_radix4_instance_q15::twidCoefModifier

twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

Definition at line 1896 of file arm_math.h.

uint16_t arm_cfft_radix4_instance_q15::bitRevFactor

bit reversal modifier that supports different size FFTs with the same bit reversal table.

Definition at line 1897 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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CMSIS DSP Software Library: arm_cfft_radix4_instance_q31 Struct Reference

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Data Fields

arm_cfft_radix4_instance_q31 Struct Reference

Instance structure for the Q31 CFFT/CIFFT function. More...

#include <arm_math.h>

Data Fields

uint16_t | fftLen
uint8_t | ifftFlag
uint8_t | bitReverseFlag
q31_t * pTwiddle
uint16_t * | pBitRevTable
uint16_t | twidCoefModifier
uint16_t | bitRevFactor

Detailed Description

Instance structure for the Q31 CFFT/CIFFT function.

Definition at line 1904 of file arm_math.h.

Field Documentation

uint16_t arm_cfft_radix4_instance_q31::fftLen

length of the FFT.

Definition at line 1906 of file arm_math.h.

uint8_t arm_cfft_radix4_instance_q31::ifftFlag

flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.

Definition at line 1907 of file arm_math.h.

uint8_t arm_cfft_radix4_instance_q31::bitReverseFlag

flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.

Definition at line 1908 of file arm_math.h.

q31_t* arm_cfft_radix4_instance_q31::pTwiddle

points to the twiddle factor table.

Definition at line 1909 of file arm_math.h.

uint16_t* arm_cfft_radix4_instance_q31::pBitRevTable

points to the bit reversal table.

Definition at line 1910 of file arm_math.h.

uint16_t arm_cfft_radix4_instance_q31::twidCoefModifier

twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

Definition at line 1911 of file arm_math.h.

uint16_t arm_cfft_radix4_instance_q31::bitRevFactor

bit reversal modifier that supports different size FFTs with the same bit reversal table.

Definition at line 1912 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_dct4_instance_f32 Struct Reference

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Data Fields

arm_dct4_instance_f32 Struct Reference

Instance structure for the floating-point DCT4/IDCT4 function. More...

#include <arm_math.h>

Data Fields

uint16_t | N
uint16_t | Nby2
float32_t normalize
float32_t * pTwiddle
float32_t * pCosFactor
arm_rfft_instance_f32 * pRfft
arm_cfft_radix4_instance_f32 * pCfft

Detailed Description

Instance structure for the floating-point DCT4/IDCT4 function.

Definition at line 2294 of file arm_math.h.

Field Documentation

uint16_t arm_dct4_instance_f32::N

length of the DCT4.

Definition at line 2296 of file arm_math.h.

uint16_t arm_dct4_instance_f32::Nby2

half of the length of the DCT4.

Definition at line 2297 of file arm_math.h.

float32_t arm_dct4_instance_f32::normalize

normalizing factor.

Definition at line 2298 of file arm_math.h.

float32_t* arm_dct4_instance_f32::pTwiddle

points to the twiddle factor table.

Definition at line 2299 of file arm_math.h.

float32_t* arm_dct4_instance_f32::pCosFactor

points to the cosFactor table.

Definition at line 2300 of file arm_math.h.

arm_rfft_instance_f32* arm_dct4_instance_f32::pRfft

points to the real FFT instance.

Definition at line 2301 of file arm_math.h.

arm_cfft_radix4_instance_f32* arm_dct4_instance_f32::pCfft

points to the complex FFT instance.

Definition at line 2302 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_dct4_instance_q15 Struct Reference

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Data Fields

arm_dct4_instance_q15 Struct Reference

Instance structure for the Q15 DCT4/IDCT4 function. More...

#include <arm_math.h>

Data Fields

uint16_t | N
uint16_t | Nby2
q15_t normalize
q15_t * pTwiddle
q15_t * pCosFactor
arm_rfft_instance_q15 * pRfft
arm_cfft_radix4_instance_q15 * pCfft

Detailed Description

Instance structure for the Q15 DCT4/IDCT4 function.

Definition at line 2388 of file arm_math.h.

Field Documentation

uint16_t arm_dct4_instance_q15::N

length of the DCT4.

Definition at line 2390 of file arm_math.h.

uint16_t arm_dct4_instance_q15::Nby2

half of the length of the DCT4.

Definition at line 2391 of file arm_math.h.

q15_t arm_dct4_instance_q15::normalize

normalizing factor.

Definition at line 2392 of file arm_math.h.

q15_t* arm_dct4_instance_q15::pTwiddle

points to the twiddle factor table.

Definition at line 2393 of file arm_math.h.

q15_t* arm_dct4_instance_q15::pCosFactor

points to the cosFactor table.

Definition at line 2394 of file arm_math.h.

arm_rfft_instance_q15* arm_dct4_instance_q15::pRfft

points to the real FFT instance.

Definition at line 2395 of file arm_math.h.

arm_cfft_radix4_instance_q15* arm_dct4_instance_q15::pCfft

points to the complex FFT instance.

Definition at line 2396 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_dct4_instance_q31 Struct Reference

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Data Fields

arm_dct4_instance_q31 Struct Reference

Instance structure for the Q31 DCT4/IDCT4 function. More...

#include <arm_math.h>

Data Fields

uint16_t | N
uint16_t | Nby2
q31_t normalize
q31_t * pTwiddle
q31_t * pCosFactor
arm_rfft_instance_q31 * pRfft
arm_cfft_radix4_instance_q31 * pCfft

Detailed Description

Instance structure for the Q31 DCT4/IDCT4 function.

Definition at line 2341 of file arm_math.h.

Field Documentation

uint16_t arm_dct4_instance_q31::N

length of the DCT4.

Definition at line 2343 of file arm_math.h.

uint16_t arm_dct4_instance_q31::Nby2

half of the length of the DCT4.

Definition at line 2344 of file arm_math.h.

q31_t arm_dct4_instance_q31::normalize

normalizing factor.

Definition at line 2345 of file arm_math.h.

q31_t* arm_dct4_instance_q31::pTwiddle

points to the twiddle factor table.

Definition at line 2346 of file arm_math.h.

q31_t* arm_dct4_instance_q31::pCosFactor

points to the cosFactor table.

Definition at line 2347 of file arm_math.h.

arm_rfft_instance_q31* arm_dct4_instance_q31::pRfft

points to the real FFT instance.

Definition at line 2348 of file arm_math.h.

arm_cfft_radix4_instance_q31* arm_dct4_instance_q31::pCfft

points to the complex FFT instance.

Definition at line 2349 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_fir_decimate_instance_f32 Struct Reference

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Data Fields

arm_fir_decimate_instance_f32 Struct Reference

Instance structure for the floating-point FIR decimator. More...

#include <arm_math.h>

Data Fields

uint8_t | M
uint16_t | numTaps
float32_t * pCoeffs
float32_t * pState

Detailed Description

Instance structure for the floating-point FIR decimator.

Definition at line 3239 of file arm_math.h.

Field Documentation

uint8_t arm_fir_decimate_instance_f32::M

decimation factor.

Definition at line 3241 of file arm_math.h.

uint16_t arm_fir_decimate_instance_f32::numTaps

number of coefficients in the filter.

Definition at line 3242 of file arm_math.h.

float32_t* arm_fir_decimate_instance_f32::pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 3243 of file arm_math.h.

float32_t* arm_fir_decimate_instance_f32::pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 3244 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_fir_decimate_instance_q15 Struct Reference

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Data Fields

arm_fir_decimate_instance_q15 Struct Reference

Instance structure for the Q15 FIR decimator. More...

#include <arm_math.h>

Data Fields

uint8_t | M
uint16_t | numTaps
q15_t * pCoeffs
q15_t * pState

Detailed Description

Instance structure for the Q15 FIR decimator.

Definition at line 3214 of file arm_math.h.

Field Documentation

uint8_t arm_fir_decimate_instance_q15::M

decimation factor.

Definition at line 3216 of file arm_math.h.

uint16_t arm_fir_decimate_instance_q15::numTaps

number of coefficients in the filter.

Definition at line 3217 of file arm_math.h.

q15_t* arm_fir_decimate_instance_q15::pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 3218 of file arm_math.h.

q15_t* arm_fir_decimate_instance_q15::pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 3219 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:22 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_fir_decimate_instance_q31 Struct Reference

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Data Fields

arm_fir_decimate_instance_q31 Struct Reference

Instance structure for the Q31 FIR decimator. More...

#include <arm_math.h>

Data Fields

uint8_t | M
uint16_t | numTaps
q31_t * pCoeffs
q31_t * pState

Detailed Description

Instance structure for the Q31 FIR decimator.

Definition at line 3226 of file arm_math.h.

Field Documentation

uint8_t arm_fir_decimate_instance_q31::M

decimation factor.

Definition at line 3228 of file arm_math.h.

uint16_t arm_fir_decimate_instance_q31::numTaps

number of coefficients in the filter.

Definition at line 3229 of file arm_math.h.

q31_t* arm_fir_decimate_instance_q31::pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 3230 of file arm_math.h.

q31_t* arm_fir_decimate_instance_q31::pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 3231 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_fir_instance_f32 Struct Reference

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Data Fields

arm_fir_instance_f32 Struct Reference

Instance structure for the floating-point FIR filter. More...

#include <arm_math.h>

Data Fields

uint16_t numTaps
float32_t * pState
float32_t * pCoeffs

Detailed Description

Instance structure for the floating-point FIR filter.

Examples:

arm_fir_example_f32.c, and arm_signal_converge_example_f32.c.

Definition at line 1006 of file arm_math.h.

Field Documentation

uint16_t arm_fir_instance_f32::numTaps

number of filter coefficients in the filter.

Definition at line 1008 of file arm_math.h.

float32_t* arm_fir_instance_f32::pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 1009 of file arm_math.h.

float32_t* arm_fir_instance_f32::pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 1010 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_fir_instance_q7 Struct Reference

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Data Fields

arm_fir_instance_q7 Struct Reference

Instance structure for the Q7 FIR filter. More...

#include <arm_math.h>

Data Fields

uint16_t numTaps
q7_t * pState
q7_t * pCoeffs

Detailed Description

Instance structure for the Q7 FIR filter.

Definition at line 976 of file arm_math.h.

Field Documentation

uint16_t arm_fir_instance_q7::numTaps

number of filter coefficients in the filter.

Definition at line 978 of file arm_math.h.

q7_t* arm_fir_instance_q7::pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 979 of file arm_math.h.

q7_t* arm_fir_instance_q7::pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 980 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_fir_instance_q15 Struct Reference

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Data Fields

arm_fir_instance_q15 Struct Reference

Instance structure for the Q15 FIR filter. More...

#include <arm_math.h>

Data Fields

uint16_t numTaps
q15_t * pState
q15_t * pCoeffs

Detailed Description

Instance structure for the Q15 FIR filter.

Definition at line 986 of file arm_math.h.

Field Documentation

uint16_t arm_fir_instance_q15::numTaps

number of filter coefficients in the filter.

Definition at line 988 of file arm_math.h.

q15_t* arm_fir_instance_q15::pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 989 of file arm_math.h.

q15_t* arm_fir_instance_q15::pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 990 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_fir_instance_q31 Struct Reference

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Data Fields

arm_fir_instance_q31 Struct Reference

Instance structure for the Q31 FIR filter. More...

#include <arm_math.h>

Data Fields

uint16_t numTaps
q31_t * pState
q31_t * pCoeffs

Detailed Description

Instance structure for the Q31 FIR filter.

Definition at line 996 of file arm_math.h.

Field Documentation

uint16_t arm_fir_instance_q31::numTaps

number of filter coefficients in the filter.

Definition at line 998 of file arm_math.h.

q31_t* arm_fir_instance_q31::pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 999 of file arm_math.h.

q31_t* arm_fir_instance_q31::pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 1000 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_fir_interpolate_instance_f32 Struct Reference

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arm_fir_interpolate_instance_f32 Struct Reference

Instance structure for the floating-point FIR interpolator. More...

#include <arm_math.h>

Data Fields

uint8_t | L
uint16_t | phaseLength
float32_t * pCoeffs
float32_t * pState

Detailed Description

Instance structure for the floating-point FIR interpolator.

Definition at line 3419 of file arm_math.h.

Field Documentation

uint8_t arm_fir_interpolate_instance_f32::L

upsample factor.

Definition at line 3421 of file arm_math.h.

uint16_t arm_fir_interpolate_instance_f32::phaseLength

length of each polyphase filter component.

Definition at line 3422 of file arm_math.h.

float32_t* arm_fir_interpolate_instance_f32::pCoeffs

points to the coefficient array. The array is of length L*phaseLength.

Definition at line 3423 of file arm_math.h.

float32_t* arm_fir_interpolate_instance_f32::pState

points to the state variable array. The array is of length phaseLength+numTaps-1.

Definition at line 3424 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_fir_interpolate_instance_q15 Struct Reference

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Data Fields

arm_fir_interpolate_instance_q15 Struct Reference

Instance structure for the Q15 FIR interpolator. More...

#include <arm_math.h>

Data Fields

uint8_t | L
uint16_t | phaseLength
q15_t * pCoeffs
q15_t * pState

Detailed Description

Instance structure for the Q15 FIR interpolator.

Definition at line 3395 of file arm_math.h.

Field Documentation

uint8_t arm_fir_interpolate_instance_q15::L

upsample factor.

Definition at line 3397 of file arm_math.h.

uint16_t arm_fir_interpolate_instance_q15::phaseLength

length of each polyphase filter component.

Definition at line 3398 of file arm_math.h.

q15_t* arm_fir_interpolate_instance_q15::pCoeffs

points to the coefficient array. The array is of length L*phaseLength.

Definition at line 3399 of file arm_math.h.

q15_t* arm_fir_interpolate_instance_q15::pState

points to the state variable array. The array is of length blockSize+phaseLength-1.

Definition at line 3400 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_fir_interpolate_instance_q31 Struct Reference

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  • Data Fields
Data Fields

arm_fir_interpolate_instance_q31 Struct Reference

Instance structure for the Q31 FIR interpolator. More...

#include <arm_math.h>

Data Fields

uint8_t | L
uint16_t | phaseLength
q31_t * pCoeffs
q31_t * pState

Detailed Description

Instance structure for the Q31 FIR interpolator.

Definition at line 3407 of file arm_math.h.

Field Documentation

uint8_t arm_fir_interpolate_instance_q31::L

upsample factor.

Definition at line 3409 of file arm_math.h.

uint16_t arm_fir_interpolate_instance_q31::phaseLength

length of each polyphase filter component.

Definition at line 3410 of file arm_math.h.

q31_t* arm_fir_interpolate_instance_q31::pCoeffs

points to the coefficient array. The array is of length L*phaseLength.

Definition at line 3411 of file arm_math.h.

q31_t* arm_fir_interpolate_instance_q31::pState

points to the state variable array. The array is of length blockSize+phaseLength-1.

Definition at line 3412 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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CMSIS DSP Software Library: arm_fir_lattice_instance_f32 Struct Reference

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Data Fields

arm_fir_lattice_instance_f32 Struct Reference

Instance structure for the floating-point FIR lattice filter. More...

#include <arm_math.h>

Data Fields

uint16_t numStages
float32_t * pState
float32_t * pCoeffs

Detailed Description

Instance structure for the floating-point FIR lattice filter.

Definition at line 3653 of file arm_math.h.

Field Documentation

uint16_t arm_fir_lattice_instance_f32::numStages

number of filter stages.

Definition at line 3655 of file arm_math.h.

float32_t* arm_fir_lattice_instance_f32::pState

points to the state variable array. The array is of length numStages.

Definition at line 3656 of file arm_math.h.

float32_t* arm_fir_lattice_instance_f32::pCoeffs

points to the coefficient array. The array is of length numStages.

Definition at line 3657 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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CMSIS DSP Software Library: arm_fir_lattice_instance_q15 Struct Reference

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Data Fields

arm_fir_lattice_instance_q15 Struct Reference

Instance structure for the Q15 FIR lattice filter. More...

#include <arm_math.h>

Data Fields

uint16_t numStages
q15_t * pState
q15_t * pCoeffs

Detailed Description

Instance structure for the Q15 FIR lattice filter.

Definition at line 3631 of file arm_math.h.

Field Documentation

uint16_t arm_fir_lattice_instance_q15::numStages

number of filter stages.

Definition at line 3633 of file arm_math.h.

q15_t* arm_fir_lattice_instance_q15::pState

points to the state variable array. The array is of length numStages.

Definition at line 3634 of file arm_math.h.

q15_t* arm_fir_lattice_instance_q15::pCoeffs

points to the coefficient array. The array is of length numStages.

Definition at line 3635 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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CMSIS DSP Software Library: arm_fir_lattice_instance_q31 Struct Reference

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Data Fields

arm_fir_lattice_instance_q31 Struct Reference

Instance structure for the Q31 FIR lattice filter. More...

#include <arm_math.h>

Data Fields

uint16_t numStages
q31_t * pState
q31_t * pCoeffs

Detailed Description

Instance structure for the Q31 FIR lattice filter.

Definition at line 3642 of file arm_math.h.

Field Documentation

uint16_t arm_fir_lattice_instance_q31::numStages

number of filter stages.

Definition at line 3644 of file arm_math.h.

q31_t* arm_fir_lattice_instance_q31::pState

points to the state variable array. The array is of length numStages.

Definition at line 3645 of file arm_math.h.

q31_t* arm_fir_lattice_instance_q31::pCoeffs

points to the coefficient array. The array is of length numStages.

Definition at line 3646 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_fir_sparse_instance_f32 Struct Reference

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Data Fields

arm_fir_sparse_instance_f32 Struct Reference

Instance structure for the floating-point sparse FIR filter. More...

#include <arm_math.h>

Data Fields

uint16_t | numTaps
uint16_t | stateIndex
float32_t * pState
float32_t * pCoeffs
uint16_t | maxDelay
int32_t * | pTapDelay

Detailed Description

Instance structure for the floating-point sparse FIR filter.

Definition at line 4319 of file arm_math.h.

Field Documentation

uint16_t arm_fir_sparse_instance_f32::numTaps

number of coefficients in the filter.

Definition at line 4321 of file arm_math.h.

uint16_t arm_fir_sparse_instance_f32::stateIndex

state buffer index. Points to the oldest sample in the state buffer.

Definition at line 4322 of file arm_math.h.

float32_t* arm_fir_sparse_instance_f32::pState

points to the state buffer array. The array is of length maxDelay+blockSize-1.

Definition at line 4323 of file arm_math.h.

float32_t* arm_fir_sparse_instance_f32::pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 4324 of file arm_math.h.

uint16_t arm_fir_sparse_instance_f32::maxDelay

maximum offset specified by the pTapDelay array.

Definition at line 4325 of file arm_math.h.

int32_t* arm_fir_sparse_instance_f32::pTapDelay

points to the array of delay values. The array is of length numTaps.

Definition at line 4326 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_fir_sparse_instance_q7 Struct Reference

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Data Fields

arm_fir_sparse_instance_q7 Struct Reference

Instance structure for the Q7 sparse FIR filter. More...

#include <arm_math.h>

Data Fields

uint16_t | numTaps
uint16_t | stateIndex
q7_t * pState
q7_t * pCoeffs
uint16_t | maxDelay
int32_t * | pTapDelay

Detailed Description

Instance structure for the Q7 sparse FIR filter.

Definition at line 4361 of file arm_math.h.

Field Documentation

uint16_t arm_fir_sparse_instance_q7::numTaps

number of coefficients in the filter.

Definition at line 4363 of file arm_math.h.

uint16_t arm_fir_sparse_instance_q7::stateIndex

state buffer index. Points to the oldest sample in the state buffer.

Definition at line 4364 of file arm_math.h.

q7_t* arm_fir_sparse_instance_q7::pState

points to the state buffer array. The array is of length maxDelay+blockSize-1.

Definition at line 4365 of file arm_math.h.

q7_t* arm_fir_sparse_instance_q7::pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 4366 of file arm_math.h.

uint16_t arm_fir_sparse_instance_q7::maxDelay

maximum offset specified by the pTapDelay array.

Definition at line 4367 of file arm_math.h.

int32_t* arm_fir_sparse_instance_q7::pTapDelay

points to the array of delay values. The array is of length numTaps.

Definition at line 4368 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_fir_sparse_instance_q15 Struct Reference

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Data Fields

arm_fir_sparse_instance_q15 Struct Reference

Instance structure for the Q15 sparse FIR filter. More...

#include <arm_math.h>

Data Fields

uint16_t | numTaps
uint16_t | stateIndex
q15_t * pState
q15_t * pCoeffs
uint16_t | maxDelay
int32_t * | pTapDelay

Detailed Description

Instance structure for the Q15 sparse FIR filter.

Definition at line 4347 of file arm_math.h.

Field Documentation

uint16_t arm_fir_sparse_instance_q15::numTaps

number of coefficients in the filter.

Definition at line 4349 of file arm_math.h.

uint16_t arm_fir_sparse_instance_q15::stateIndex

state buffer index. Points to the oldest sample in the state buffer.

Definition at line 4350 of file arm_math.h.

q15_t* arm_fir_sparse_instance_q15::pState

points to the state buffer array. The array is of length maxDelay+blockSize-1.

Definition at line 4351 of file arm_math.h.

q15_t* arm_fir_sparse_instance_q15::pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 4352 of file arm_math.h.

uint16_t arm_fir_sparse_instance_q15::maxDelay

maximum offset specified by the pTapDelay array.

Definition at line 4353 of file arm_math.h.

int32_t* arm_fir_sparse_instance_q15::pTapDelay

points to the array of delay values. The array is of length numTaps.

Definition at line 4354 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_fir_sparse_instance_q31 Struct Reference

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Data Fields

arm_fir_sparse_instance_q31 Struct Reference

Instance structure for the Q31 sparse FIR filter. More...

#include <arm_math.h>

Data Fields

uint16_t | numTaps
uint16_t | stateIndex
q31_t * pState
q31_t * pCoeffs
uint16_t | maxDelay
int32_t * | pTapDelay

Detailed Description

Instance structure for the Q31 sparse FIR filter.

Definition at line 4333 of file arm_math.h.

Field Documentation

uint16_t arm_fir_sparse_instance_q31::numTaps

number of coefficients in the filter.

Definition at line 4335 of file arm_math.h.

uint16_t arm_fir_sparse_instance_q31::stateIndex

state buffer index. Points to the oldest sample in the state buffer.

Definition at line 4336 of file arm_math.h.

q31_t* arm_fir_sparse_instance_q31::pState

points to the state buffer array. The array is of length maxDelay+blockSize-1.

Definition at line 4337 of file arm_math.h.

q31_t* arm_fir_sparse_instance_q31::pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 4338 of file arm_math.h.

uint16_t arm_fir_sparse_instance_q31::maxDelay

maximum offset specified by the pTapDelay array.

Definition at line 4339 of file arm_math.h.

int32_t* arm_fir_sparse_instance_q31::pTapDelay

points to the array of delay values. The array is of length numTaps.

Definition at line 4340 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_iir_lattice_instance_f32 Struct Reference

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arm_iir_lattice_instance_f32 Struct Reference

Instance structure for the floating-point IIR lattice filter. More...

#include <arm_math.h>

Data Fields

uint16_t numStages
float32_t * pState
float32_t * pkCoeffs
float32_t * pvCoeffs

Detailed Description

Instance structure for the floating-point IIR lattice filter.

Definition at line 3776 of file arm_math.h.

Field Documentation

uint16_t arm_iir_lattice_instance_f32::numStages

number of stages in the filter.

Definition at line 3778 of file arm_math.h.

float32_t* arm_iir_lattice_instance_f32::pState

points to the state variable array. The array is of length numStages+blockSize.

Definition at line 3779 of file arm_math.h.

float32_t* arm_iir_lattice_instance_f32::pkCoeffs

points to the reflection coefficient array. The array is of length numStages.

Definition at line 3780 of file arm_math.h.

float32_t* arm_iir_lattice_instance_f32::pvCoeffs

points to the ladder coefficient array. The array is of length numStages+1.

Definition at line 3781 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_iir_lattice_instance_q15 Struct Reference

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Data Fields

arm_iir_lattice_instance_q15 Struct Reference

Instance structure for the Q15 IIR lattice filter. More...

#include <arm_math.h>

Data Fields

uint16_t numStages
q15_t * pState
q15_t * pkCoeffs
q15_t * pvCoeffs

Detailed Description

Instance structure for the Q15 IIR lattice filter.

Definition at line 3754 of file arm_math.h.

Field Documentation

uint16_t arm_iir_lattice_instance_q15::numStages

number of stages in the filter.

Definition at line 3756 of file arm_math.h.

q15_t* arm_iir_lattice_instance_q15::pState

points to the state variable array. The array is of length numStages+blockSize.

Definition at line 3757 of file arm_math.h.

q15_t* arm_iir_lattice_instance_q15::pkCoeffs

points to the reflection coefficient array. The array is of length numStages.

Definition at line 3758 of file arm_math.h.

q15_t* arm_iir_lattice_instance_q15::pvCoeffs

points to the ladder coefficient array. The array is of length numStages+1.

Definition at line 3759 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_iir_lattice_instance_q31 Struct Reference

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Data Fields

arm_iir_lattice_instance_q31 Struct Reference

Instance structure for the Q31 IIR lattice filter. More...

#include <arm_math.h>

Data Fields

uint16_t numStages
q31_t * pState
q31_t * pkCoeffs
q31_t * pvCoeffs

Detailed Description

Instance structure for the Q31 IIR lattice filter.

Definition at line 3765 of file arm_math.h.

Field Documentation

uint16_t arm_iir_lattice_instance_q31::numStages

number of stages in the filter.

Definition at line 3767 of file arm_math.h.

q31_t* arm_iir_lattice_instance_q31::pState

points to the state variable array. The array is of length numStages+blockSize.

Definition at line 3768 of file arm_math.h.

q31_t* arm_iir_lattice_instance_q31::pkCoeffs

points to the reflection coefficient array. The array is of length numStages.

Definition at line 3769 of file arm_math.h.

q31_t* arm_iir_lattice_instance_q31::pvCoeffs

points to the ladder coefficient array. The array is of length numStages+1.

Definition at line 3770 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_linear_interp_instance_f32 Struct Reference

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Data Fields

arm_linear_interp_instance_f32 Struct Reference

Instance structure for the floating-point Linear Interpolate function. More...

#include <arm_math.h>

Data Fields

uint32_t nValues
float32_t x1
float32_t xSpacing
float32_t * pYData

Detailed Description

Instance structure for the floating-point Linear Interpolate function.

Examples:

arm_linear_interp_example_f32.c.

Definition at line 1771 of file arm_math.h.

Field Documentation

uint32_t arm_linear_interp_instance_f32::nValues

Definition at line 1773 of file arm_math.h.

float32_t arm_linear_interp_instance_f32::x1

Definition at line 1774 of file arm_math.h.

float32_t arm_linear_interp_instance_f32::xSpacing

Definition at line 1775 of file arm_math.h.

float32_t* arm_linear_interp_instance_f32::pYData

pointer to the table of Y values

Definition at line 1776 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_lms_instance_f32 Struct Reference

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Data Fields

arm_lms_instance_f32 Struct Reference

Instance structure for the floating-point LMS filter. More...

#include <arm_math.h>

Data Fields

uint16_t numTaps
float32_t * pState
float32_t * pCoeffs
float32_t mu

Detailed Description

Instance structure for the floating-point LMS filter.

Definition at line 3894 of file arm_math.h.

Field Documentation

uint16_t arm_lms_instance_f32::numTaps

number of coefficients in the filter.

Definition at line 3896 of file arm_math.h.

float32_t* arm_lms_instance_f32::pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 3897 of file arm_math.h.

float32_t* arm_lms_instance_f32::pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 3898 of file arm_math.h.

float32_t arm_lms_instance_f32::mu

step size that controls filter coefficient updates.

Definition at line 3899 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_lms_instance_q15 Struct Reference

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Data Fields

arm_lms_instance_q15 Struct Reference

Instance structure for the Q15 LMS filter. More...

#include <arm_math.h>

Data Fields

uint16_t | numTaps
q15_t * pState
q15_t * pCoeffs
q15_t mu
uint32_t | postShift

Detailed Description

Instance structure for the Q15 LMS filter.

Definition at line 3944 of file arm_math.h.

Field Documentation

uint16_t arm_lms_instance_q15::numTaps

number of coefficients in the filter.

Definition at line 3946 of file arm_math.h.

q15_t* arm_lms_instance_q15::pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 3947 of file arm_math.h.

q15_t* arm_lms_instance_q15::pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 3948 of file arm_math.h.

q15_t arm_lms_instance_q15::mu

step size that controls filter coefficient updates.

Definition at line 3949 of file arm_math.h.

uint32_t arm_lms_instance_q15::postShift

bit shift applied to coefficients.

Definition at line 3950 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_lms_instance_q31 Struct Reference

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Data Fields

arm_lms_instance_q31 Struct Reference

Instance structure for the Q31 LMS filter. More...

#include <arm_math.h>

Data Fields

uint16_t | numTaps
q31_t * pState
q31_t * pCoeffs
q31_t mu
uint32_t | postShift

Detailed Description

Instance structure for the Q31 LMS filter.

Definition at line 3999 of file arm_math.h.

Field Documentation

uint16_t arm_lms_instance_q31::numTaps

number of coefficients in the filter.

Definition at line 4001 of file arm_math.h.

q31_t* arm_lms_instance_q31::pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 4002 of file arm_math.h.

q31_t* arm_lms_instance_q31::pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 4003 of file arm_math.h.

q31_t arm_lms_instance_q31::mu

step size that controls filter coefficient updates.

Definition at line 4004 of file arm_math.h.

uint32_t arm_lms_instance_q31::postShift

bit shift applied to coefficients.

Definition at line 4005 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_lms_norm_instance_f32 Struct Reference

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Data Fields

arm_lms_norm_instance_f32 Struct Reference

Instance structure for the floating-point normalized LMS filter. More...

#include <arm_math.h>

Data Fields

uint16_t numTaps
float32_t * pState
float32_t * pCoeffs
float32_t mu
float32_t energy
float32_t x0

Detailed Description

Instance structure for the floating-point normalized LMS filter.

Examples:

arm_signal_converge_example_f32.c.

Definition at line 4053 of file arm_math.h.

Field Documentation

uint16_t arm_lms_norm_instance_f32::numTaps

number of coefficients in the filter.

Definition at line 4055 of file arm_math.h.

float32_t* arm_lms_norm_instance_f32::pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 4056 of file arm_math.h.

float32_t* arm_lms_norm_instance_f32::pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 4057 of file arm_math.h.

float32_t arm_lms_norm_instance_f32::mu

step size that control filter coefficient updates.

Definition at line 4058 of file arm_math.h.

float32_t arm_lms_norm_instance_f32::energy

saves previous frame energy.

Definition at line 4059 of file arm_math.h.

float32_t arm_lms_norm_instance_f32::x0

saves previous input sample.

Definition at line 4060 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_lms_norm_instance_q15 Struct Reference

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Data Fields

arm_lms_norm_instance_q15 Struct Reference

Instance structure for the Q15 normalized LMS filter. More...

#include <arm_math.h>

Data Fields

uint16_t | numTaps
q15_t * pState
q15_t * pCoeffs
q15_t mu
uint8_t | postShift
q15_t * recipTable
q15_t energy
q15_t x0

Detailed Description

Instance structure for the Q15 normalized LMS filter.

Definition at line 4161 of file arm_math.h.

Field Documentation

uint16_t arm_lms_norm_instance_q15::numTaps

Number of coefficients in the filter.

Definition at line 4163 of file arm_math.h.

q15_t* arm_lms_norm_instance_q15::pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 4164 of file arm_math.h.

q15_t* arm_lms_norm_instance_q15::pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 4165 of file arm_math.h.

q15_t arm_lms_norm_instance_q15::mu

step size that controls filter coefficient updates.

Definition at line 4166 of file arm_math.h.

uint8_t arm_lms_norm_instance_q15::postShift

bit shift applied to coefficients.

Definition at line 4167 of file arm_math.h.

q15_t* arm_lms_norm_instance_q15::recipTable

Points to the reciprocal initial value table.

Definition at line 4168 of file arm_math.h.

q15_t arm_lms_norm_instance_q15::energy

saves previous frame energy.

Definition at line 4169 of file arm_math.h.

q15_t arm_lms_norm_instance_q15::x0

saves previous input sample.

Definition at line 4170 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_lms_norm_instance_q31 Struct Reference

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Data Fields

arm_lms_norm_instance_q31 Struct Reference

Instance structure for the Q31 normalized LMS filter. More...

#include <arm_math.h>

Data Fields

uint16_t | numTaps
q31_t * pState
q31_t * pCoeffs
q31_t mu
uint8_t | postShift
q31_t * recipTable
q31_t energy
q31_t x0

Detailed Description

Instance structure for the Q31 normalized LMS filter.

Definition at line 4105 of file arm_math.h.

Field Documentation

uint16_t arm_lms_norm_instance_q31::numTaps

number of coefficients in the filter.

Definition at line 4107 of file arm_math.h.

q31_t* arm_lms_norm_instance_q31::pState

points to the state variable array. The array is of length numTaps+blockSize-1.

Definition at line 4108 of file arm_math.h.

q31_t* arm_lms_norm_instance_q31::pCoeffs

points to the coefficient array. The array is of length numTaps.

Definition at line 4109 of file arm_math.h.

q31_t arm_lms_norm_instance_q31::mu

step size that controls filter coefficient updates.

Definition at line 4110 of file arm_math.h.

uint8_t arm_lms_norm_instance_q31::postShift

bit shift applied to coefficients.

Definition at line 4111 of file arm_math.h.

q31_t* arm_lms_norm_instance_q31::recipTable

points to the reciprocal initial value table.

Definition at line 4112 of file arm_math.h.

q31_t arm_lms_norm_instance_q31::energy

saves previous frame energy.

Definition at line 4113 of file arm_math.h.

q31_t arm_lms_norm_instance_q31::x0

saves previous input sample.

Definition at line 4114 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_matrix_instance_f32 Struct Reference

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Data Fields

arm_matrix_instance_f32 Struct Reference

Instance structure for the floating-point matrix structure. More...

#include <arm_math.h>

Data Fields

uint16_t | numRows
uint16_t | numCols
float32_t * pData

Detailed Description

Instance structure for the floating-point matrix structure.

Examples:

arm_class_marks_example_f32.c, and arm_matrix_example_f32.c.

Definition at line 1337 of file arm_math.h.

Field Documentation

uint16_t arm_matrix_instance_f32::numRows

number of rows of the matrix.

Definition at line 1339 of file arm_math.h.

uint16_t arm_matrix_instance_f32::numCols

number of columns of the matrix.

Definition at line 1340 of file arm_math.h.

float32_t* arm_matrix_instance_f32::pData

points to the data of the matrix.

Definition at line 1341 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
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Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_matrix_instance_q15 Struct Reference

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  • Data Structures
  • Data Fields
Data Fields

arm_matrix_instance_q15 Struct Reference

Instance structure for the Q15 matrix structure. More...

#include <arm_math.h>

Data Fields

uint16_t | numRows
uint16_t | numCols
q15_t * pData

Detailed Description

Instance structure for the Q15 matrix structure.

Definition at line 1348 of file arm_math.h.

Field Documentation

uint16_t arm_matrix_instance_q15::numRows

number of rows of the matrix.

Definition at line 1350 of file arm_math.h.

uint16_t arm_matrix_instance_q15::numCols

number of columns of the matrix.

Definition at line 1351 of file arm_math.h.

q15_t* arm_matrix_instance_q15::pData

points to the data of the matrix.

Definition at line 1352 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_matrix_instance_q31 Struct Reference

  • Examples
  • Data Structures
  • Data Fields
Data Fields

arm_matrix_instance_q31 Struct Reference

Instance structure for the Q31 matrix structure. More...

#include <arm_math.h>

Data Fields

uint16_t | numRows
uint16_t | numCols
q31_t * pData

Detailed Description

Instance structure for the Q31 matrix structure.

Definition at line 1360 of file arm_math.h.

Field Documentation

uint16_t arm_matrix_instance_q31::numRows

number of rows of the matrix.

Definition at line 1362 of file arm_math.h.

uint16_t arm_matrix_instance_q31::numCols

number of columns of the matrix.

Definition at line 1363 of file arm_math.h.

q31_t* arm_matrix_instance_q31::pData

points to the data of the matrix.

Definition at line 1364 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_pid_instance_f32 Struct Reference

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  • Data Structures
  • Data Fields
Data Fields

arm_pid_instance_f32 Struct Reference

Instance structure for the floating-point PID Control. More...

#include <arm_math.h>

Data Fields

float32_t A0
float32_t A1
float32_t A2
float32_t state [3]
float32_t Kp
float32_t Ki
float32_t Kd

Detailed Description

Instance structure for the floating-point PID Control.

Definition at line 1697 of file arm_math.h.

Field Documentation

float32_t arm_pid_instance_f32::A0

The derived gain, A0 = Kp + Ki + Kd .

Definition at line 1699 of file arm_math.h.

float32_t arm_pid_instance_f32::A1

The derived gain, A1 = -Kp - 2Kd.

Definition at line 1700 of file arm_math.h.

float32_t arm_pid_instance_f32::A2

The derived gain, A2 = Kd .

Definition at line 1701 of file arm_math.h.

float32_t arm_pid_instance_f32::state[3]

The state array of length 3.

Definition at line 1702 of file arm_math.h.

float32_t arm_pid_instance_f32::Kp

The proportional gain.

Definition at line 1703 of file arm_math.h.

float32_t arm_pid_instance_f32::Ki

The integral gain.

Definition at line 1704 of file arm_math.h.

float32_t arm_pid_instance_f32::Kd

The derivative gain.

Definition at line 1705 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_pid_instance_q15 Struct Reference

  • Examples
  • Data Structures
  • Data Fields
Data Fields

arm_pid_instance_q15 Struct Reference

Instance structure for the Q15 PID Control. More...

#include <arm_math.h>

Data Fields

q15_t A0
q31_t A1
q15_t state [3]
q15_t Kp
q15_t Ki
q15_t Kd

Detailed Description

Instance structure for the Q15 PID Control.

Definition at line 1664 of file arm_math.h.

Field Documentation

q15_t arm_pid_instance_q15::A0

The derived gain, A0 = Kp + Ki + Kd .

Definition at line 1666 of file arm_math.h.

q31_t arm_pid_instance_q15::A1

The derived gain A1 = -Kp - 2Kd | Kd.

Definition at line 1671 of file arm_math.h.

q15_t arm_pid_instance_q15::state[3]

The state array of length 3.

Definition at line 1673 of file arm_math.h.

q15_t arm_pid_instance_q15::Kp

The proportional gain.

Definition at line 1674 of file arm_math.h.

q15_t arm_pid_instance_q15::Ki

The integral gain.

Definition at line 1675 of file arm_math.h.

q15_t arm_pid_instance_q15::Kd

The derivative gain.

Definition at line 1676 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_pid_instance_q31 Struct Reference

  • Examples
  • Data Structures
  • Data Fields
Data Fields

arm_pid_instance_q31 Struct Reference

Instance structure for the Q31 PID Control. More...

#include <arm_math.h>

Data Fields

q31_t A0
q31_t A1
q31_t A2
q31_t state [3]
q31_t Kp
q31_t Ki
q31_t Kd

Detailed Description

Instance structure for the Q31 PID Control.

Definition at line 1682 of file arm_math.h.

Field Documentation

q31_t arm_pid_instance_q31::A0

The derived gain, A0 = Kp + Ki + Kd .

Definition at line 1684 of file arm_math.h.

q31_t arm_pid_instance_q31::A1

The derived gain, A1 = -Kp - 2Kd.

Definition at line 1685 of file arm_math.h.

q31_t arm_pid_instance_q31::A2

The derived gain, A2 = Kd .

Definition at line 1686 of file arm_math.h.

q31_t arm_pid_instance_q31::state[3]

The state array of length 3.

Definition at line 1687 of file arm_math.h.

q31_t arm_pid_instance_q31::Kp

The proportional gain.

Definition at line 1688 of file arm_math.h.

q31_t arm_pid_instance_q31::Ki

The integral gain.

Definition at line 1689 of file arm_math.h.

q31_t arm_pid_instance_q31::Kd

The derivative gain.

Definition at line 1690 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_rfft_instance_f32 Struct Reference

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  • Data Fields
Data Fields

arm_rfft_instance_f32 Struct Reference

Instance structure for the floating-point RFFT/RIFFT function. More...

#include <arm_math.h>

Data Fields

uint32_t | fftLenReal
uint16_t | fftLenBy2
uint8_t | ifftFlagR
uint8_t | bitReverseFlagR
uint32_t | twidCoefRModifier
float32_t * pTwiddleAReal
float32_t * pTwiddleBReal
arm_cfft_radix4_instance_f32 * pCfft

Detailed Description

Instance structure for the floating-point RFFT/RIFFT function.

Definition at line 2188 of file arm_math.h.

Field Documentation

uint32_t arm_rfft_instance_f32::fftLenReal

length of the real FFT.

Definition at line 2190 of file arm_math.h.

uint16_t arm_rfft_instance_f32::fftLenBy2

length of the complex FFT.

Definition at line 2191 of file arm_math.h.

uint8_t arm_rfft_instance_f32::ifftFlagR

flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.

Definition at line 2192 of file arm_math.h.

uint8_t arm_rfft_instance_f32::bitReverseFlagR

flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output.

Definition at line 2193 of file arm_math.h.

uint32_t arm_rfft_instance_f32::twidCoefRModifier

twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

Definition at line 2194 of file arm_math.h.

float32_t* arm_rfft_instance_f32::pTwiddleAReal

points to the real twiddle factor table.

Definition at line 2195 of file arm_math.h.

float32_t* arm_rfft_instance_f32::pTwiddleBReal

points to the imag twiddle factor table.

Definition at line 2196 of file arm_math.h.

arm_cfft_radix4_instance_f32* arm_rfft_instance_f32::pCfft

points to the complex FFT instance.

Definition at line 2197 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_rfft_instance_q15 Struct Reference

  • Examples
  • Data Structures
  • Data Fields
Data Fields

arm_rfft_instance_q15 Struct Reference

Instance structure for the Q15 RFFT/RIFFT function. More...

#include <arm_math.h>

Data Fields

uint32_t | fftLenReal
uint32_t | fftLenBy2
uint8_t | ifftFlagR
uint8_t | bitReverseFlagR
uint32_t | twidCoefRModifier
q15_t * pTwiddleAReal
q15_t * pTwiddleBReal
arm_cfft_radix4_instance_q15 * pCfft

Detailed Description

Instance structure for the Q15 RFFT/RIFFT function.

Definition at line 2156 of file arm_math.h.

Field Documentation

uint32_t arm_rfft_instance_q15::fftLenReal

length of the real FFT.

Definition at line 2158 of file arm_math.h.

uint32_t arm_rfft_instance_q15::fftLenBy2

length of the complex FFT.

Definition at line 2159 of file arm_math.h.

uint8_t arm_rfft_instance_q15::ifftFlagR

flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.

Definition at line 2160 of file arm_math.h.

uint8_t arm_rfft_instance_q15::bitReverseFlagR

flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output.

Definition at line 2161 of file arm_math.h.

uint32_t arm_rfft_instance_q15::twidCoefRModifier

twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

Definition at line 2162 of file arm_math.h.

q15_t* arm_rfft_instance_q15::pTwiddleAReal

points to the real twiddle factor table.

Definition at line 2163 of file arm_math.h.

q15_t* arm_rfft_instance_q15::pTwiddleBReal

points to the imag twiddle factor table.

Definition at line 2164 of file arm_math.h.

arm_cfft_radix4_instance_q15* arm_rfft_instance_q15::pCfft

points to the complex FFT instance.

Definition at line 2165 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2


CMSIS DSP Software Library: arm_rfft_instance_q31 Struct Reference

  • Examples
  • Data Structures
  • Data Fields
Data Fields

arm_rfft_instance_q31 Struct Reference

Instance structure for the Q31 RFFT/RIFFT function. More...

#include <arm_math.h>

Data Fields

uint32_t | fftLenReal
uint32_t | fftLenBy2
uint8_t | ifftFlagR
uint8_t | bitReverseFlagR
uint32_t | twidCoefRModifier
q31_t * pTwiddleAReal
q31_t * pTwiddleBReal
arm_cfft_radix4_instance_q31 * pCfft

Detailed Description

Instance structure for the Q31 RFFT/RIFFT function.

Definition at line 2172 of file arm_math.h.

Field Documentation

uint32_t arm_rfft_instance_q31::fftLenReal

length of the real FFT.

Definition at line 2174 of file arm_math.h.

uint32_t arm_rfft_instance_q31::fftLenBy2

length of the complex FFT.

Definition at line 2175 of file arm_math.h.

uint8_t arm_rfft_instance_q31::ifftFlagR

flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.

Definition at line 2176 of file arm_math.h.

uint8_t arm_rfft_instance_q31::bitReverseFlagR

flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output.

Definition at line 2177 of file arm_math.h.

uint32_t arm_rfft_instance_q31::twidCoefRModifier

twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

Definition at line 2178 of file arm_math.h.

q31_t* arm_rfft_instance_q31::pTwiddleAReal

points to the real twiddle factor table.

Definition at line 2179 of file arm_math.h.

q31_t* arm_rfft_instance_q31::pTwiddleBReal

points to the imag twiddle factor table.

Definition at line 2180 of file arm_math.h.

arm_cfft_radix4_instance_q31* arm_rfft_instance_q31::pCfft

points to the complex FFT instance.

Definition at line 2181 of file arm_math.h.

The documentation for this struct was generated from the following file:
  • arm_math.h
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Defines
Generated on Fri Jul 15 2011 13:16:23 for CMSIS DSP Software Library by doxygen 1.7.2